Compile fix.

diff --git a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cybootloader.c b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cybootloader.c
index 2292dca63f7a60e7f745063f61a22f7844761582..32543d5e7159f5996c2d0dad450f07646cadab7d 100755 (executable)
--- a/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cybootloader.c
+++ b/software/SCSI2SD/SCSI2SD.cydsn/Generated_Source/PSoC5/cybootloader.c
@@ -31,18 +31,18 @@ const uint8 cy_bootloader[] = {
     0x00u, 0x40u, 0x00u, 0x20u, 0x11u, 0x00u, 0x00u, 0x00u,\r
     0x61u, 0x01u, 0x00u, 0x00u, 0x61u, 0x01u, 0x00u, 0x00u,\r
     0x08u, 0xB5u, 0x04u, 0x4Bu, 0x04u, 0x48u, 0x1Au, 0x68u,\r
-    0x02u, 0x60u, 0x00u, 0xF0u, 0x71u, 0xFCu, 0x00u, 0xF0u,\r
+    0x02u, 0x60u, 0x00u, 0xF0u, 0x7Bu, 0xFCu, 0x00u, 0xF0u,\r
     0xA1u, 0xF8u, 0x00u, 0xBFu, 0xFAu, 0x46u, 0x00u, 0x40u,\r
     0xBCu, 0x76u, 0x00u, 0x40u, 0x10u, 0xB5u, 0x05u, 0x4Cu,\r
     0x23u, 0x78u, 0x33u, 0xB9u, 0x04u, 0x48u, 0x10u, 0xB1u,\r
     0x04u, 0x48u, 0xAFu, 0xF3u, 0x00u, 0x80u, 0x01u, 0x21u,\r
     0x21u, 0x70u, 0x10u, 0xBDu, 0x28u, 0xC1u, 0xFFu, 0x1Fu,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0xF4u, 0x1Fu, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x0Cu, 0x20u, 0x00u, 0x00u,\r
     0x08u, 0xB5u, 0x06u, 0x4Bu, 0x1Bu, 0xB1u, 0x06u, 0x48u,\r
     0x06u, 0x49u, 0xAFu, 0xF3u, 0x00u, 0x80u, 0x06u, 0x48u,\r
     0x01u, 0x68u, 0x11u, 0xB1u, 0x05u, 0x4Au, 0x02u, 0xB1u,\r
     0x90u, 0x47u, 0x08u, 0xBDu, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0xF4u, 0x1Fu, 0x00u, 0x00u, 0x2Cu, 0xC1u, 0xFFu, 0x1Fu,\r
+    0x0Cu, 0x20u, 0x00u, 0x00u, 0x2Cu, 0xC1u, 0xFFu, 0x1Fu,\r
     0x08u, 0xC1u, 0xFFu, 0x1Fu, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x08u, 0xB5u, 0x36u, 0x4Bu, 0x1Au, 0x78u, 0x02u, 0xF0u,\r
     0xFEu, 0x00u, 0x18u, 0x70u, 0x93u, 0xF8u, 0x22u, 0x10u,\r
@@ -70,7 +70,7 @@ const uint8 cy_bootloader[] = {
     0x03u, 0xF8u, 0x0Du, 0x0Cu, 0x13u, 0xF8u, 0x0Eu, 0x1Cu,\r
     0x01u, 0xF0u, 0xFEu, 0x02u, 0x03u, 0xF8u, 0x0Eu, 0x2Cu,\r
     0x13u, 0xF8u, 0x0Fu, 0x0Cu, 0x00u, 0xF0u, 0xFEu, 0x01u,\r
-    0x03u, 0xF8u, 0x0Fu, 0x1Cu, 0x00u, 0xF0u, 0x94u, 0xFBu,\r
+    0x03u, 0xF8u, 0x0Fu, 0x1Cu, 0x00u, 0xF0u, 0x9Eu, 0xFBu,\r
     0xFEu, 0xE7u, 0x00u, 0xBFu, 0x00u, 0x50u, 0x00u, 0x40u,\r
     0xFEu, 0xE7u, 0x00u, 0x00u, 0x08u, 0xB5u, 0x12u, 0x49u,\r
     0x12u, 0x4Bu, 0x4Au, 0x1Cu, 0x1Au, 0xD0u, 0x53u, 0xF8u,\r
@@ -80,9 +80,9 @@ const uint8 cy_bootloader[] = {
     0x04u, 0x32u, 0xF7u, 0xE7u, 0x53u, 0xF8u, 0x04u, 0x0Cu,\r
     0x00u, 0x22u, 0x82u, 0x42u, 0x03u, 0xD0u, 0x00u, 0x25u,\r
     0xA5u, 0x50u, 0x04u, 0x32u, 0xF9u, 0xE7u, 0x01u, 0x39u,\r
-    0x10u, 0x33u, 0xE2u, 0xE7u, 0x01u, 0xF0u, 0xEAu, 0xFEu,\r
+    0x10u, 0x33u, 0xE2u, 0xE7u, 0x01u, 0xF0u, 0xF6u, 0xFEu,\r
     0xFFu, 0xF7u, 0x6Au, 0xFFu, 0xFEu, 0xE7u, 0x00u, 0xBFu,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x38u, 0x22u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0x22u, 0x00u, 0x00u,\r
     0x08u, 0xB5u, 0x10u, 0x4Au, 0x10u, 0x4Bu, 0x1Au, 0x60u,\r
     0x98u, 0x68u, 0x40u, 0xF4u, 0x00u, 0x72u, 0x9Au, 0x60u,\r
     0x00u, 0x23u, 0x03u, 0x2Bu, 0x96u, 0xBFu, 0x0Du, 0x4Au,\r
@@ -96,232 +96,235 @@ const uint8 cy_bootloader[] = {
     0x61u, 0x01u, 0x00u, 0x00u, 0x00u, 0xC0u, 0xFFu, 0x1Fu,\r
     0xBCu, 0x76u, 0x00u, 0x40u, 0x04u, 0xC1u, 0xFFu, 0x1Fu,\r
     0x08u, 0xEDu, 0x00u, 0xE0u, 0x00u, 0xC1u, 0xFFu, 0x1Fu,\r
-    0xF8u, 0xB5u, 0x72u, 0xB6u, 0x5Au, 0x4Bu, 0x01u, 0x22u,\r
+    0xF8u, 0xB5u, 0x72u, 0xB6u, 0x5Fu, 0x4Bu, 0x01u, 0x22u,\r
     0xA3u, 0xF5u, 0xA0u, 0x61u, 0xA1u, 0xF5u, 0x80u, 0x75u,\r
-    0x06u, 0x20u, 0x52u, 0x24u, 0x57u, 0x4Eu, 0x1Au, 0x70u,\r
-    0x08u, 0x70u, 0x2Cu, 0x70u, 0x37u, 0x78u, 0x56u, 0x4Bu,\r
-    0x56u, 0x4Au, 0x40u, 0xF6u, 0x18u, 0x00u, 0x41u, 0xF2u,\r
+    0x06u, 0x20u, 0x52u, 0x24u, 0x5Cu, 0x4Eu, 0x1Au, 0x70u,\r
+    0x08u, 0x70u, 0x2Cu, 0x70u, 0x37u, 0x78u, 0x5Bu, 0x4Bu,\r
+    0x5Bu, 0x4Au, 0x40u, 0xF6u, 0x18u, 0x00u, 0x41u, 0xF2u,\r
     0x51u, 0x21u, 0x17u, 0x70u, 0x19u, 0x25u, 0x18u, 0x80u,\r
-    0x00u, 0x24u, 0x23u, 0xF8u, 0x02u, 0x1Cu, 0x52u, 0x4Eu,\r
+    0x00u, 0x24u, 0x23u, 0xF8u, 0x02u, 0x1Cu, 0x57u, 0x4Eu,\r
     0x4Fu, 0xF4u, 0xF0u, 0x70u, 0x37u, 0x78u, 0x07u, 0xF0u,\r
     0x01u, 0x02u, 0x42u, 0xEAu, 0x44u, 0x04u, 0x00u, 0xF0u,\r
-    0x63u, 0xFBu, 0x01u, 0x3Du, 0x04u, 0xF0u, 0x03u, 0x04u,\r
-    0x17u, 0xD0u, 0x03u, 0x2Cu, 0xEFu, 0xD1u, 0x4Bu, 0x48u,\r
-    0x4Bu, 0x4Fu, 0x00u, 0x26u, 0x4Fu, 0xF4u, 0x80u, 0x73u,\r
-    0x4Au, 0x4Du, 0x07u, 0x21u, 0x48u, 0x22u, 0x02u, 0x24u,\r
+    0x6Fu, 0xFBu, 0x01u, 0x3Du, 0x04u, 0xF0u, 0x03u, 0x04u,\r
+    0x17u, 0xD0u, 0x03u, 0x2Cu, 0xEFu, 0xD1u, 0x50u, 0x48u,\r
+    0x50u, 0x4Fu, 0x00u, 0x26u, 0x4Fu, 0xF4u, 0x80u, 0x73u,\r
+    0x4Fu, 0x4Du, 0x07u, 0x21u, 0x48u, 0x22u, 0x02u, 0x24u,\r
     0x03u, 0x80u, 0x01u, 0x70u, 0x3Eu, 0x70u, 0xBAu, 0x70u,\r
     0x06u, 0x70u, 0x46u, 0x71u, 0x00u, 0xF8u, 0x03u, 0x4Cu,\r
     0x28u, 0x78u, 0x40u, 0xF0u, 0x04u, 0x03u, 0x2Bu, 0x70u,\r
-    0x00u, 0xE0u, 0xFEu, 0xE7u, 0x42u, 0x4Fu, 0x06u, 0x21u,\r
+    0x00u, 0xE0u, 0xFEu, 0xE7u, 0x47u, 0x4Fu, 0x06u, 0x21u,\r
     0x01u, 0xFBu, 0x06u, 0x72u, 0x00u, 0x21u, 0x10u, 0x68u,\r
-    0x01u, 0x36u, 0x92u, 0x88u, 0x01u, 0xF0u, 0x91u, 0xFEu,\r
+    0x01u, 0x36u, 0x92u, 0x88u, 0x01u, 0xF0u, 0x9Du, 0xFEu,\r
     0x08u, 0x2Eu, 0xF3u, 0xD1u, 0x00u, 0x23u, 0x19u, 0x46u,\r
-    0x3Cu, 0x4Cu, 0x00u, 0x22u, 0x18u, 0x59u, 0x30u, 0x34u,\r
+    0x41u, 0x4Cu, 0x00u, 0x22u, 0x18u, 0x59u, 0x30u, 0x34u,\r
     0xC6u, 0xB2u, 0x20u, 0xF0u, 0xFFu, 0x07u, 0x04u, 0xEBu,\r
     0x41u, 0x04u, 0xD5u, 0xB2u, 0xAEu, 0x42u, 0x09u, 0xD0u,\r
     0x04u, 0xEBu, 0x42u, 0x0Cu, 0x14u, 0xF8u, 0x12u, 0x50u,\r
     0x9Cu, 0xF8u, 0x01u, 0xE0u, 0x01u, 0x32u, 0x05u, 0xF8u,\r
     0x07u, 0xE0u, 0xF2u, 0xE7u, 0x04u, 0x33u, 0xC0u, 0xB2u,\r
-    0x30u, 0x2Bu, 0x01u, 0x44u, 0xE4u, 0xD1u, 0x30u, 0x4Cu,\r
+    0x30u, 0x2Bu, 0x01u, 0x44u, 0xE4u, 0xD1u, 0x35u, 0x4Cu,\r
     0x22u, 0x78u, 0x42u, 0xF0u, 0x02u, 0x00u, 0x20u, 0x70u,\r
-    0x21u, 0x7Cu, 0x2Eu, 0x48u, 0x41u, 0xF0u, 0x02u, 0x03u,\r
-    0x2Du, 0x49u, 0x23u, 0x74u, 0x0Cu, 0x78u, 0x44u, 0xF0u,\r
-    0x40u, 0x02u, 0x0Au, 0x70u, 0x03u, 0x78u, 0x2Bu, 0x4Au,\r
-    0x43u, 0xF0u, 0x10u, 0x04u, 0x2Au, 0x4Bu, 0x04u, 0x70u,\r
+    0x21u, 0x7Cu, 0x33u, 0x48u, 0x41u, 0xF0u, 0x02u, 0x03u,\r
+    0x32u, 0x49u, 0x23u, 0x74u, 0x0Cu, 0x78u, 0x44u, 0xF0u,\r
+    0x40u, 0x02u, 0x0Au, 0x70u, 0x03u, 0x78u, 0x30u, 0x4Au,\r
+    0x43u, 0xF0u, 0x10u, 0x04u, 0x2Fu, 0x4Bu, 0x04u, 0x70u,\r
     0x18u, 0x68u, 0x5Cu, 0x68u, 0x10u, 0x60u, 0x54u, 0x60u,\r
-    0x1Au, 0x46u, 0x28u, 0x48u, 0x52u, 0xF8u, 0x08u, 0x4Fu,\r
+    0x1Au, 0x46u, 0x2Du, 0x48u, 0x52u, 0xF8u, 0x08u, 0x4Fu,\r
     0x04u, 0x60u, 0x54u, 0x68u, 0x12u, 0x89u, 0x44u, 0x60u,\r
     0x02u, 0x81u, 0x1Au, 0x46u, 0x52u, 0xF8u, 0x12u, 0x4Fu,\r
-    0x52u, 0x68u, 0x40u, 0xF8u, 0xAEu, 0x4Cu, 0x40u, 0xF8u,\r
-    0xAAu, 0x2Cu, 0x53u, 0xF8u, 0x1Au, 0x0Fu, 0x20u, 0x4Au,\r
-    0x5Bu, 0x68u, 0x10u, 0x60u, 0x1Fu, 0x48u, 0x53u, 0x60u,\r
-    0x02u, 0x78u, 0x42u, 0xF0u, 0x08u, 0x03u, 0x03u, 0x70u,\r
-    0x1Du, 0x48u, 0x1Eu, 0x4Au, 0x03u, 0x78u, 0x03u, 0xF0u,\r
-    0x07u, 0x00u, 0x1Bu, 0x09u, 0x10u, 0x70u, 0x53u, 0x70u,\r
-    0x1Bu, 0x4Au, 0x44u, 0x20u, 0x10u, 0x70u, 0x1Bu, 0x4Au,\r
-    0x0Bu, 0x46u, 0x0Cu, 0x31u, 0x53u, 0xF8u, 0x04u, 0x0Bu,\r
-    0x8Bu, 0x42u, 0x42u, 0xF8u, 0x04u, 0x0Bu, 0xF9u, 0xD1u,\r
-    0x19u, 0x88u, 0x11u, 0x80u, 0xF8u, 0xBDu, 0x00u, 0xBFu,\r
-    0x00u, 0x48u, 0x00u, 0x40u, 0x0Fu, 0x01u, 0x00u, 0x49u,\r
-    0x22u, 0x42u, 0x00u, 0x40u, 0xA1u, 0x46u, 0x00u, 0x40u,\r
-    0x25u, 0x42u, 0x00u, 0x40u, 0x04u, 0x40u, 0x00u, 0x40u,\r
-    0x06u, 0x40u, 0x00u, 0x40u, 0xE8u, 0x46u, 0x00u, 0x40u,\r
-    0xF8u, 0x1Fu, 0x00u, 0x00u, 0x28u, 0x20u, 0x00u, 0x00u,\r
-    0x03u, 0x50u, 0x01u, 0x40u, 0xC2u, 0x43u, 0x00u, 0x40u,\r
-    0xA0u, 0x43u, 0x00u, 0x40u, 0x02u, 0x51u, 0x00u, 0x40u,\r
-    0x84u, 0x20u, 0x00u, 0x00u, 0xF0u, 0x51u, 0x00u, 0x40u,\r
-    0x62u, 0x51u, 0x00u, 0x40u, 0x22u, 0x43u, 0x00u, 0x40u,\r
-    0xCFu, 0x01u, 0x00u, 0x49u, 0x6Eu, 0x58u, 0x00u, 0x40u,\r
-    0x76u, 0x58u, 0x00u, 0x40u, 0xB0u, 0x43u, 0x00u, 0x40u,\r
-    0x00u, 0x47u, 0x00u, 0x00u, 0x43u, 0x1Eu, 0x10u, 0xB5u,\r
-    0x02u, 0x46u, 0x06u, 0x2Bu, 0x0Du, 0xD8u, 0xDFu, 0xE8u,\r
-    0x03u, 0xF0u, 0x06u, 0x0Eu, 0x23u, 0x04u, 0x08u, 0x0Au,\r
-    0x21u, 0x00u, 0x16u, 0x48u, 0x08u, 0xE0u, 0x16u, 0x4Bu,\r
-    0x1Bu, 0xE0u, 0x16u, 0x48u, 0x04u, 0xE0u, 0x16u, 0x48u,\r
-    0x02u, 0xE0u, 0x00u, 0x20u, 0x00u, 0xE0u, 0x15u, 0x48u,\r
-    0x41u, 0x78u, 0x00u, 0x78u, 0x41u, 0xEAu, 0x00u, 0x20u,\r
-    0x02u, 0x2Au, 0x04u, 0xD0u, 0x03u, 0x2Au, 0x07u, 0xD0u,\r
-    0x01u, 0x2Au, 0x15u, 0xD1u, 0x04u, 0xE0u, 0x02u, 0x02u,\r
-    0x42u, 0xEAu, 0x10u, 0x23u, 0x98u, 0xB2u, 0x10u, 0xBDu,\r
-    0x00u, 0xBAu, 0x10u, 0xBDu, 0x0Cu, 0x4Bu, 0x00u, 0xE0u,\r
-    0x0Cu, 0x4Bu, 0xD8u, 0x78u, 0x9Cu, 0x78u, 0x59u, 0x78u,\r
-    0x1Bu, 0x78u, 0x40u, 0xEAu, 0x03u, 0x60u, 0x40u, 0xEAu,\r
-    0x04u, 0x23u, 0x43u, 0xEAu, 0x01u, 0x40u, 0xE3u, 0xE7u,\r
-    0x10u, 0xBDu, 0x00u, 0xBFu, 0xD2u, 0xFFu, 0x01u, 0x00u,\r
-    0xC1u, 0xFFu, 0x01u, 0x00u, 0xD6u, 0xFFu, 0x01u, 0x00u,\r
-    0xD4u, 0xFFu, 0x01u, 0x00u, 0xC5u, 0xFFu, 0x01u, 0x00u,\r
-    0xD8u, 0xFFu, 0x01u, 0x00u, 0xC9u, 0xFFu, 0x01u, 0x00u,\r
-    0x70u, 0xB5u, 0x02u, 0x20u, 0xFFu, 0xF7u, 0xB6u, 0xFFu,\r
-    0x06u, 0x46u, 0x03u, 0x20u, 0xFFu, 0xF7u, 0xB2u, 0xFFu,\r
-    0x71u, 0x1Cu, 0x00u, 0xEBu, 0x01u, 0x26u, 0x02u, 0x20u,\r
-    0xFFu, 0xF7u, 0xACu, 0xFFu, 0x00u, 0x24u, 0x01u, 0x30u,\r
-    0x01u, 0x02u, 0x25u, 0x46u, 0xB1u, 0x42u, 0x09u, 0xD2u,\r
-    0x11u, 0xF8u, 0x01u, 0x0Bu, 0x42u, 0x1Eu, 0xD3u, 0xB2u,\r
-    0x04u, 0x19u, 0xFDu, 0x2Bu, 0x98u, 0xBFu, 0x01u, 0x25u,\r
-    0xE4u, 0xB2u, 0xF3u, 0xE7u, 0x02u, 0x20u, 0xFFu, 0xF7u,\r
-    0x99u, 0xFFu, 0x0Fu, 0x49u, 0x42u, 0x1Cu, 0x13u, 0x02u,\r
-    0xDBu, 0x08u, 0x8Eu, 0x42u, 0x01u, 0xD0u, 0xF6u, 0x08u,\r
-    0x01u, 0xE0u, 0x4Fu, 0xF4u, 0x80u, 0x46u, 0xB3u, 0x42u,\r
-    0x06u, 0xD2u, 0x03u, 0xF1u, 0x90u, 0x41u, 0x08u, 0x78u,\r
-    0x01u, 0x33u, 0x02u, 0x19u, 0xD4u, 0xB2u, 0xF6u, 0xE7u,\r
-    0x05u, 0x48u, 0x64u, 0x42u, 0x02u, 0x78u, 0xE4u, 0xB2u,\r
-    0x94u, 0x42u, 0x01u, 0xD0u, 0x06u, 0x20u, 0x70u, 0xBDu,\r
-    0x00u, 0x2Du, 0xFBu, 0xD0u, 0x00u, 0x20u, 0x70u, 0xBDu,\r
-    0xC0u, 0xFFu, 0x01u, 0x00u, 0x2Du, 0xE9u, 0xF0u, 0x4Fu,\r
-    0xADu, 0xF5u, 0x61u, 0x7Du, 0x80u, 0x46u, 0x00u, 0xF0u,\r
-    0xE3u, 0xFBu, 0x62u, 0xB6u, 0x00u, 0x26u, 0xB2u, 0x46u,\r
-    0x4Fu, 0xF0u, 0x0Au, 0x09u, 0x37u, 0x46u, 0xB8u, 0xF1u,\r
-    0x00u, 0x0Fu, 0x01u, 0xD1u, 0xFFu, 0x23u, 0x00u, 0xE0u,\r
-    0x43u, 0x46u, 0x4Au, 0xA8u, 0x4Fu, 0xF4u, 0x96u, 0x71u,\r
-    0x01u, 0xAAu, 0x00u, 0xF0u, 0x0Bu, 0xFCu, 0xB8u, 0xF1u,\r
-    0x00u, 0x0Fu, 0x03u, 0xD0u, 0x09u, 0xF1u, 0xFFu, 0x39u,\r
-    0x5Fu, 0xFAu, 0x89u, 0xF9u, 0xB9u, 0xF1u, 0x00u, 0x0Fu,\r
-    0x02u, 0xD0u, 0x00u, 0x28u, 0xE7u, 0xD1u, 0x01u, 0xE0u,\r
-    0x00u, 0x28u, 0x71u, 0xD1u, 0xBDu, 0xF8u, 0x04u, 0x20u,\r
-    0x06u, 0x2Au, 0x40u, 0xF2u, 0x7Bu, 0x81u, 0x9Du, 0xF8u,\r
-    0x28u, 0x31u, 0x01u, 0x2Bu, 0x40u, 0xF0u, 0x76u, 0x81u,\r
-    0x9Du, 0xF8u, 0x2Au, 0x01u, 0x9Du, 0xF8u, 0x2Bu, 0x51u,\r
-    0x4Au, 0xA9u, 0x40u, 0xEAu, 0x05u, 0x25u, 0xECu, 0x1Du,\r
-    0x4Bu, 0x19u, 0x94u, 0x42u, 0x58u, 0x79u, 0x19u, 0x79u,\r
-    0x00u, 0xF2u, 0x66u, 0x81u, 0x9Au, 0x79u, 0x17u, 0x2Au,\r
-    0x40u, 0xF0u, 0x64u, 0x81u, 0x2Bu, 0x1Du, 0x9Bu, 0xB2u,\r
-    0x00u, 0x22u, 0x3Bu, 0xB1u, 0x0Du, 0xF2u, 0x27u, 0x14u,\r
-    0xE4u, 0x5Cu, 0x01u, 0x3Bu, 0x12u, 0x19u, 0x92u, 0xB2u,\r
-    0x9Bu, 0xB2u, 0xF6u, 0xE7u, 0x52u, 0x42u, 0x41u, 0xEAu,\r
-    0x00u, 0x20u, 0x91u, 0xB2u, 0x88u, 0x42u, 0x40u, 0xF0u,\r
-    0x53u, 0x81u, 0x4Au, 0xE0u, 0x00u, 0x2Eu, 0x00u, 0xF0u,\r
-    0x4Du, 0x81u, 0x01u, 0x2Du, 0x4Fu, 0xF0u, 0x00u, 0x04u,\r
-    0x40u, 0xF0u, 0x3Cu, 0x81u, 0xBBu, 0xF1u, 0x01u, 0x0Fu,\r
-    0x00u, 0xF2u, 0x38u, 0x81u, 0xFFu, 0x23u, 0x8Du, 0xF8u,\r
-    0x2Cu, 0x41u, 0x8Du, 0xF8u, 0x2Du, 0x41u, 0x25u, 0x46u,\r
-    0x8Du, 0xF8u, 0x2Eu, 0x31u, 0x8Du, 0xF8u, 0x2Fu, 0x61u,\r
-    0x04u, 0x24u, 0x01u, 0x20u, 0x00u, 0x22u, 0x21u, 0x1Du,\r
-    0xADu, 0xF8u, 0x06u, 0x40u, 0x8Du, 0xF8u, 0x28u, 0x01u,\r
-    0x8Du, 0xF8u, 0x29u, 0x51u, 0x8Du, 0xF8u, 0x2Au, 0x41u,\r
-    0x8Du, 0xF8u, 0x2Bu, 0x21u, 0x8Bu, 0xB2u, 0x0Du, 0xF2u,\r
-    0x27u, 0x10u, 0xC1u, 0x5Cu, 0x01u, 0x3Bu, 0x52u, 0x18u,\r
-    0x9Bu, 0xB2u, 0x92u, 0xB2u, 0x00u, 0x2Bu, 0xF6u, 0xD1u,\r
-    0x50u, 0x42u, 0x81u, 0xB2u, 0x08u, 0x0Au, 0x4Bu, 0xAAu,\r
-    0x0Du, 0xF2u, 0x2Du, 0x13u, 0x11u, 0x55u, 0x18u, 0x55u,\r
-    0x17u, 0x21u, 0x0Du, 0xF5u, 0x97u, 0x72u, 0xE3u, 0x1Du,\r
-    0x11u, 0x55u, 0x4Au, 0xA8u, 0x99u, 0xB2u, 0x0Du, 0xF1u,\r
-    0x06u, 0x02u, 0x96u, 0x23u, 0x00u, 0xF0u, 0x60u, 0xFBu,\r
-    0xB8u, 0xF1u, 0x00u, 0x0Fu, 0x3Fu, 0xF4u, 0x72u, 0xAFu,\r
-    0x00u, 0x2Eu, 0x00u, 0xF0u, 0x12u, 0x81u, 0x01u, 0x26u,\r
-    0x69u, 0xE7u, 0x9Du, 0xF8u, 0x29u, 0x21u, 0x9Du, 0xF8u,\r
-    0x2Cu, 0xB1u, 0xA2u, 0xF1u, 0x31u, 0x03u, 0x0Au, 0x2Bu,\r
-    0x00u, 0xF2u, 0xF7u, 0x80u, 0x01u, 0xA1u, 0x51u, 0xF8u,\r
-    0x23u, 0xF0u, 0x00u, 0xBFu, 0x89u, 0x06u, 0x00u, 0x00u,\r
-    0xADu, 0x05u, 0x00u, 0x00u, 0x43u, 0x08u, 0x00u, 0x00u,\r
-    0xA7u, 0x06u, 0x00u, 0x00u, 0x59u, 0x07u, 0x00u, 0x00u,\r
-    0x43u, 0x08u, 0x00u, 0x00u, 0x5Fu, 0x07u, 0x00u, 0x00u,\r
-    0x7Du, 0x07u, 0x00u, 0x00u, 0xA7u, 0x06u, 0x00u, 0x00u,\r
-    0x97u, 0x07u, 0x00u, 0x00u, 0x23u, 0x08u, 0x00u, 0x00u,\r
-    0x00u, 0x2Eu, 0x00u, 0xF0u, 0xDFu, 0x80u, 0x00u, 0x2Du,\r
-    0x40u, 0xF0u, 0xDCu, 0x80u, 0xFFu, 0xF7u, 0xF0u, 0xFEu,\r
-    0xD0u, 0xF1u, 0x01u, 0x02u, 0x38u, 0xBFu, 0x00u, 0x22u,\r
-    0x8Du, 0xF8u, 0x2Cu, 0x21u, 0xBBu, 0xE0u, 0x34u, 0x2Au,\r
-    0x12u, 0xD1u, 0x00u, 0x2Eu, 0x00u, 0xF0u, 0xCEu, 0x80u,\r
-    0x03u, 0x2Du, 0x40u, 0xF0u, 0xCBu, 0x80u, 0xABu, 0xF1u,\r
-    0x40u, 0x07u, 0x3Fu, 0x2Fu, 0x8Cu, 0xBFu, 0x4Fu, 0xF4u,\r
-    0x90u, 0x77u, 0x10u, 0x27u, 0x95u, 0xA8u, 0x00u, 0x21u,\r
-    0x3Au, 0x46u, 0x01u, 0xF0u, 0x86u, 0xFCu, 0x05u, 0xE0u,\r
-    0x00u, 0x2Eu, 0x00u, 0xF0u, 0xBBu, 0x80u, 0x02u, 0x2Du,\r
-    0x40u, 0xF2u, 0xB8u, 0x80u, 0x03u, 0x3Du, 0x95u, 0xABu,\r
-    0x2Au, 0x46u, 0xD8u, 0x19u, 0x0Du, 0xF2u, 0x2Fu, 0x11u,\r
-    0x01u, 0xF0u, 0x6Eu, 0xFCu, 0xABu, 0xF1u, 0x40u, 0x00u,\r
-    0x7Au, 0x19u, 0x3Fu, 0x28u, 0x96u, 0xB2u, 0x03u, 0xD8u,\r
-    0x00u, 0xF0u, 0xD2u, 0xF9u, 0x10u, 0x24u, 0x01u, 0xE0u,\r
-    0x4Fu, 0xF4u, 0x90u, 0x74u, 0xA6u, 0x42u, 0x40u, 0xF0u,\r
-    0x97u, 0x80u, 0x9Du, 0xF8u, 0x2Eu, 0x11u, 0x9Du, 0xF8u,\r
-    0x2Du, 0x71u, 0xBBu, 0xF1u, 0x3Fu, 0x0Fu, 0x47u, 0xEAu,\r
-    0x01u, 0x25u, 0x11u, 0xD8u, 0xBAu, 0xF1u, 0x00u, 0x0Fu,\r
-    0x0Eu, 0xD1u, 0x51u, 0x46u, 0x4Fu, 0xF4u, 0x90u, 0x72u,\r
-    0x02u, 0xA8u, 0x01u, 0xF0u, 0x56u, 0xFCu, 0x01u, 0x20u,\r
-    0xFFu, 0x21u, 0x02u, 0xAAu, 0x4Fu, 0xF4u, 0x90u, 0x73u,\r
-    0x00u, 0xF0u, 0x62u, 0xF9u, 0x4Fu, 0xF0u, 0x01u, 0x0Au,\r
-    0x33u, 0x46u, 0x58u, 0x46u, 0x29u, 0x46u, 0x95u, 0xAAu,\r
-    0x00u, 0xF0u, 0x5Au, 0xF9u, 0x01u, 0x26u, 0x00u, 0x28u,\r
-    0x75u, 0xD0u, 0x00u, 0x27u, 0x0Au, 0x25u, 0x75u, 0xE0u,\r
-    0x00u, 0x2Eu, 0x77u, 0xD0u, 0x7Au, 0xE0u, 0x00u, 0x2Eu,\r
-    0x74u, 0xD0u, 0x7Cu, 0x19u, 0xB4u, 0xF5u, 0x96u, 0x7Fu,\r
-    0x6Eu, 0xD8u, 0x95u, 0xA9u, 0xC8u, 0x19u, 0x2Au, 0x46u,\r
-    0x4Bu, 0xA9u, 0x01u, 0xF0u, 0x29u, 0xFCu, 0xA7u, 0xB2u,\r
-    0x00u, 0x25u, 0x63u, 0xE0u, 0x00u, 0x2Du, 0x65u, 0xD1u,\r
-    0x3Au, 0x48u, 0x02u, 0xAEu, 0x4Bu, 0xACu, 0x03u, 0xC8u,\r
-    0x86u, 0xE8u, 0x03u, 0x00u, 0x84u, 0xE8u, 0x03u, 0x00u,\r
-    0x01u, 0x26u, 0x08u, 0x24u, 0x21u, 0xE7u, 0x00u, 0x2Eu,\r
-    0x58u, 0xD0u, 0x03u, 0x2Du, 0x56u, 0xD1u, 0x9Du, 0xF8u,\r
-    0x2Eu, 0x01u, 0x9Du, 0xF8u, 0x2Du, 0x11u, 0xABu, 0xF1u,\r
-    0x40u, 0x02u, 0x3Fu, 0x2Au, 0x41u, 0xEAu, 0x00u, 0x25u,\r
-    0x0Au, 0xD8u, 0x2Du, 0x01u, 0x00u, 0x23u, 0x10u, 0x22u,\r
-    0x2Du, 0x48u, 0x11u, 0x18u, 0x4Cu, 0x5Du, 0x01u, 0x3Au,\r
-    0x23u, 0x44u, 0xDBu, 0xB2u, 0xF8u, 0xD1u, 0x26u, 0xE0u,\r
-    0x05u, 0xEBu, 0x0Bu, 0x23u, 0x1Cu, 0x02u, 0x4Fu, 0xF4u,\r
-    0x80u, 0x72u, 0x00u, 0x23u, 0x01u, 0x3Au, 0x10u, 0x5Du,\r
-    0x19u, 0x18u, 0xCBu, 0xB2u, 0x00u, 0x2Au, 0xF9u, 0xD1u,\r
-    0xBBu, 0xF1u, 0x3Fu, 0x0Fu, 0x17u, 0xD8u, 0x0Bu, 0xF5u,\r
-    0x10u, 0x34u, 0x05u, 0xEBu, 0x04u, 0x20u, 0x41u, 0x01u,\r
-    0x54u, 0x5Cu, 0x01u, 0x32u, 0x1Bu, 0x19u, 0x20u, 0x2Au,\r
-    0xDBu, 0xB2u, 0xF9u, 0xD1u, 0xBBu, 0xF1u, 0x01u, 0x0Fu,\r
-    0x09u, 0xD1u, 0xFFu, 0x2Du, 0x07u, 0xD1u, 0x1Bu, 0x4Du,\r
-    0x1Bu, 0x4Cu, 0x28u, 0x78u, 0x19u, 0x1Au, 0x23u, 0x78u,\r
-    0xCAu, 0x1Au, 0x02u, 0xF0u, 0xFFu, 0x03u, 0x5Du, 0x42u,\r
-    0x8Du, 0xF8u, 0x2Cu, 0x51u, 0x00u, 0x25u, 0x01u, 0x24u,\r
-    0xDBu, 0xE6u, 0xFFu, 0xF7u, 0x29u, 0xFEu, 0x10u, 0xB9u,\r
-    0x14u, 0x4Du, 0x80u, 0x24u, 0x2Cu, 0x70u, 0x00u, 0xF0u,\r
-    0x45u, 0xF9u, 0x0Bu, 0xE0u, 0x04u, 0x25u, 0xD0u, 0xE6u,\r
-    0x01u, 0x26u, 0x00u, 0x27u, 0x04u, 0xE0u, 0x07u, 0x46u,\r
-    0x9Au, 0xE7u, 0x05u, 0x25u, 0x00u, 0x24u, 0xC8u, 0xE6u,\r
-    0x03u, 0x25u, 0xFBu, 0xE7u, 0x04u, 0x25u, 0xF9u, 0xE7u,\r
-    0x08u, 0x25u, 0xF7u, 0xE7u, 0xB8u, 0xF1u, 0x00u, 0x0Fu,\r
-    0x01u, 0xD1u, 0x47u, 0x46u, 0x5Eu, 0xE6u, 0x00u, 0x27u,\r
-    0xEDu, 0xE6u, 0x0Du, 0xF5u, 0x61u, 0x7Du, 0xBDu, 0xE8u,\r
-    0xF0u, 0x8Fu, 0x00u, 0xBFu, 0xA8u, 0x20u, 0x00u, 0x00u,\r
-    0xFFu, 0x7Fu, 0x00u, 0x40u, 0xD0u, 0xFFu, 0x01u, 0x00u,\r
-    0xD1u, 0xFFu, 0x01u, 0x00u, 0xFAu, 0x46u, 0x00u, 0x40u,\r
-    0x10u, 0xB5u, 0xC8u, 0xB0u, 0x00u, 0xF0u, 0x92u, 0xF8u,\r
-    0x10u, 0xB1u, 0x00u, 0x20u, 0x00u, 0xF0u, 0x14u, 0xF9u,\r
-    0x68u, 0x46u, 0x00u, 0xF0u, 0x9Fu, 0xF8u, 0x10u, 0xB1u,\r
-    0x00u, 0x20u, 0x00u, 0xF0u, 0x0Du, 0xF9u, 0x16u, 0x48u,\r
-    0x03u, 0x68u, 0x19u, 0x68u, 0x00u, 0x23u, 0x0Au, 0x46u,\r
-    0x22u, 0xB1u, 0x12u, 0xF8u, 0x01u, 0x4Du, 0xE3u, 0x18u,\r
-    0xDBu, 0xB2u, 0xF9u, 0xE7u, 0x42u, 0x68u, 0x10u, 0x78u,\r
-    0xC4u, 0x1Au, 0x04u, 0xF0u, 0xFFu, 0x03u, 0x83u, 0x42u,\r
-    0x00u, 0xD1u, 0x11u, 0xB9u, 0x00u, 0x20u, 0x00u, 0xF0u,\r
-    0xF7u, 0xF8u, 0x0Cu, 0x4Cu, 0xFFu, 0xF7u, 0xD4u, 0xFDu,\r
-    0x21u, 0x78u, 0x01u, 0xF0u, 0xC0u, 0x02u, 0x40u, 0x2Au,\r
-    0x00u, 0xD0u, 0x18u, 0xB1u, 0x00u, 0x20u, 0x20u, 0x70u,\r
-    0xFFu, 0xF7u, 0x0Cu, 0xFEu, 0x14u, 0x20u, 0xFFu, 0xF7u,\r
-    0x09u, 0xFEu, 0x80u, 0x20u, 0x20u, 0x70u, 0x00u, 0xF0u,\r
-    0xE5u, 0xF8u, 0x48u, 0xB0u, 0x10u, 0xBDu, 0x00u, 0xBFu,\r
-    0x0Cu, 0xC1u, 0xFFu, 0x1Fu, 0xFAu, 0x46u, 0x00u, 0x40u,\r
-    0x08u, 0xB5u, 0x0Au, 0x4Bu, 0x1Au, 0x78u, 0x02u, 0xF0u,\r
-    0xC0u, 0x00u, 0x80u, 0x28u, 0x0Cu, 0xD1u, 0x00u, 0x21u,\r
-    0x19u, 0x70u, 0x01u, 0x20u, 0xFFu, 0xF7u, 0x6Au, 0xFDu,\r
-    0x30u, 0xB1u, 0x01u, 0x20u, 0xFFu, 0xF7u, 0x66u, 0xFDu,\r
-    0xBDu, 0xE8u, 0x08u, 0x40u, 0xFFu, 0xF7u, 0x60u, 0xBDu,\r
-    0x08u, 0xBDu, 0x00u, 0xBFu, 0xFAu, 0x46u, 0x00u, 0x40u,\r
+    0x40u, 0xF8u, 0xC0u, 0x4Cu, 0x54u, 0x68u, 0x12u, 0x89u,\r
+    0x40u, 0xF8u, 0xBCu, 0x4Cu, 0x20u, 0xF8u, 0xB8u, 0x2Cu,\r
+    0x1Au, 0x46u, 0x52u, 0xF8u, 0x1Cu, 0x4Fu, 0x52u, 0x68u,\r
+    0x40u, 0xF8u, 0xAEu, 0x4Cu, 0x40u, 0xF8u, 0xAAu, 0x2Cu,\r
+    0x53u, 0xF8u, 0x24u, 0x0Fu, 0x1Fu, 0x4Au, 0x5Bu, 0x68u,\r
+    0x10u, 0x60u, 0x1Fu, 0x48u, 0x53u, 0x60u, 0x02u, 0x78u,\r
+    0x42u, 0xF0u, 0x08u, 0x03u, 0x03u, 0x70u, 0x1Du, 0x48u,\r
+    0x1Du, 0x4Au, 0x03u, 0x78u, 0x03u, 0xF0u, 0x07u, 0x00u,\r
+    0x1Bu, 0x09u, 0x10u, 0x70u, 0x53u, 0x70u, 0x1Bu, 0x4Au,\r
+    0x44u, 0x20u, 0x10u, 0x70u, 0x1Au, 0x4Au, 0x0Bu, 0x46u,\r
+    0x0Cu, 0x31u, 0x53u, 0xF8u, 0x04u, 0x0Bu, 0x8Bu, 0x42u,\r
+    0x42u, 0xF8u, 0x04u, 0x0Bu, 0xF9u, 0xD1u, 0x19u, 0x88u,\r
+    0x11u, 0x80u, 0xF8u, 0xBDu, 0x00u, 0x48u, 0x00u, 0x40u,\r
+    0x0Fu, 0x01u, 0x00u, 0x49u, 0x22u, 0x42u, 0x00u, 0x40u,\r
+    0xA1u, 0x46u, 0x00u, 0x40u, 0x25u, 0x42u, 0x00u, 0x40u,\r
+    0x04u, 0x40u, 0x00u, 0x40u, 0x06u, 0x40u, 0x00u, 0x40u,\r
+    0xE8u, 0x46u, 0x00u, 0x40u, 0x10u, 0x20u, 0x00u, 0x00u,\r
+    0x40u, 0x20u, 0x00u, 0x00u, 0x03u, 0x50u, 0x01u, 0x40u,\r
+    0xC2u, 0x43u, 0x00u, 0x40u, 0xA0u, 0x43u, 0x00u, 0x40u,\r
+    0x02u, 0x51u, 0x00u, 0x40u, 0x9Eu, 0x20u, 0x00u, 0x00u,\r
+    0xF0u, 0x51u, 0x00u, 0x40u, 0x62u, 0x51u, 0x00u, 0x40u,\r
+    0x22u, 0x43u, 0x00u, 0x40u, 0xCFu, 0x01u, 0x00u, 0x49u,\r
+    0x6Eu, 0x58u, 0x00u, 0x40u, 0x76u, 0x58u, 0x00u, 0x40u,\r
+    0xB0u, 0x43u, 0x00u, 0x40u, 0x00u, 0x47u, 0x00u, 0x00u,\r
+    0x43u, 0x1Eu, 0x10u, 0xB5u, 0x02u, 0x46u, 0x06u, 0x2Bu,\r
+    0x0Du, 0xD8u, 0xDFu, 0xE8u, 0x03u, 0xF0u, 0x06u, 0x0Eu,\r
+    0x23u, 0x04u, 0x08u, 0x0Au, 0x21u, 0x00u, 0x16u, 0x48u,\r
+    0x08u, 0xE0u, 0x16u, 0x4Bu, 0x1Bu, 0xE0u, 0x16u, 0x48u,\r
+    0x04u, 0xE0u, 0x16u, 0x48u, 0x02u, 0xE0u, 0x00u, 0x20u,\r
+    0x00u, 0xE0u, 0x15u, 0x48u, 0x41u, 0x78u, 0x00u, 0x78u,\r
+    0x41u, 0xEAu, 0x00u, 0x20u, 0x02u, 0x2Au, 0x04u, 0xD0u,\r
+    0x03u, 0x2Au, 0x07u, 0xD0u, 0x01u, 0x2Au, 0x15u, 0xD1u,\r
+    0x04u, 0xE0u, 0x02u, 0x02u, 0x42u, 0xEAu, 0x10u, 0x23u,\r
+    0x98u, 0xB2u, 0x10u, 0xBDu, 0x00u, 0xBAu, 0x10u, 0xBDu,\r
+    0x0Cu, 0x4Bu, 0x00u, 0xE0u, 0x0Cu, 0x4Bu, 0xD8u, 0x78u,\r
+    0x9Cu, 0x78u, 0x59u, 0x78u, 0x1Bu, 0x78u, 0x40u, 0xEAu,\r
+    0x03u, 0x60u, 0x40u, 0xEAu, 0x04u, 0x23u, 0x43u, 0xEAu,\r
+    0x01u, 0x40u, 0xE3u, 0xE7u, 0x10u, 0xBDu, 0x00u, 0xBFu,\r
+    0xD2u, 0xFFu, 0x01u, 0x00u, 0xC1u, 0xFFu, 0x01u, 0x00u,\r
+    0xD6u, 0xFFu, 0x01u, 0x00u, 0xD4u, 0xFFu, 0x01u, 0x00u,\r
+    0xC5u, 0xFFu, 0x01u, 0x00u, 0xD8u, 0xFFu, 0x01u, 0x00u,\r
+    0xC9u, 0xFFu, 0x01u, 0x00u, 0x70u, 0xB5u, 0x02u, 0x20u,\r
+    0xFFu, 0xF7u, 0xB6u, 0xFFu, 0x06u, 0x46u, 0x03u, 0x20u,\r
+    0xFFu, 0xF7u, 0xB2u, 0xFFu, 0x71u, 0x1Cu, 0x00u, 0xEBu,\r
+    0x01u, 0x26u, 0x02u, 0x20u, 0xFFu, 0xF7u, 0xACu, 0xFFu,\r
+    0x00u, 0x24u, 0x01u, 0x30u, 0x01u, 0x02u, 0x25u, 0x46u,\r
+    0xB1u, 0x42u, 0x09u, 0xD2u, 0x11u, 0xF8u, 0x01u, 0x0Bu,\r
+    0x42u, 0x1Eu, 0xD3u, 0xB2u, 0x04u, 0x19u, 0xFDu, 0x2Bu,\r
+    0x98u, 0xBFu, 0x01u, 0x25u, 0xE4u, 0xB2u, 0xF3u, 0xE7u,\r
+    0x02u, 0x20u, 0xFFu, 0xF7u, 0x99u, 0xFFu, 0x0Fu, 0x49u,\r
+    0x42u, 0x1Cu, 0x13u, 0x02u, 0xDBu, 0x08u, 0x8Eu, 0x42u,\r
+    0x01u, 0xD0u, 0xF6u, 0x08u, 0x01u, 0xE0u, 0x4Fu, 0xF4u,\r
+    0x80u, 0x46u, 0xB3u, 0x42u, 0x06u, 0xD2u, 0x03u, 0xF1u,\r
+    0x90u, 0x41u, 0x08u, 0x78u, 0x01u, 0x33u, 0x02u, 0x19u,\r
+    0xD4u, 0xB2u, 0xF6u, 0xE7u, 0x05u, 0x48u, 0x64u, 0x42u,\r
+    0x02u, 0x78u, 0xE4u, 0xB2u, 0x94u, 0x42u, 0x01u, 0xD0u,\r
+    0x06u, 0x20u, 0x70u, 0xBDu, 0x00u, 0x2Du, 0xFBu, 0xD0u,\r
+    0x00u, 0x20u, 0x70u, 0xBDu, 0xC0u, 0xFFu, 0x01u, 0x00u,\r
+    0x2Du, 0xE9u, 0xF0u, 0x4Fu, 0xADu, 0xF5u, 0x61u, 0x7Du,\r
+    0x80u, 0x46u, 0x00u, 0xF0u, 0xE5u, 0xFBu, 0x62u, 0xB6u,\r
+    0x00u, 0x26u, 0xB2u, 0x46u, 0x4Fu, 0xF0u, 0x0Au, 0x09u,\r
+    0x37u, 0x46u, 0xB8u, 0xF1u, 0x00u, 0x0Fu, 0x01u, 0xD1u,\r
+    0xFFu, 0x23u, 0x00u, 0xE0u, 0x43u, 0x46u, 0x4Au, 0xA8u,\r
+    0x4Fu, 0xF4u, 0x96u, 0x71u, 0x01u, 0xAAu, 0x00u, 0xF0u,\r
+    0x0Du, 0xFCu, 0xB8u, 0xF1u, 0x00u, 0x0Fu, 0x03u, 0xD0u,\r
+    0x09u, 0xF1u, 0xFFu, 0x39u, 0x5Fu, 0xFAu, 0x89u, 0xF9u,\r
+    0xB9u, 0xF1u, 0x00u, 0x0Fu, 0x02u, 0xD0u, 0x00u, 0x28u,\r
+    0xE7u, 0xD1u, 0x01u, 0xE0u, 0x00u, 0x28u, 0x71u, 0xD1u,\r
+    0xBDu, 0xF8u, 0x04u, 0x20u, 0x06u, 0x2Au, 0x40u, 0xF2u,\r
+    0x7Bu, 0x81u, 0x9Du, 0xF8u, 0x28u, 0x31u, 0x01u, 0x2Bu,\r
+    0x40u, 0xF0u, 0x76u, 0x81u, 0x9Du, 0xF8u, 0x2Au, 0x01u,\r
+    0x9Du, 0xF8u, 0x2Bu, 0x51u, 0x4Au, 0xA9u, 0x40u, 0xEAu,\r
+    0x05u, 0x25u, 0xECu, 0x1Du, 0x4Bu, 0x19u, 0x94u, 0x42u,\r
+    0x58u, 0x79u, 0x19u, 0x79u, 0x00u, 0xF2u, 0x66u, 0x81u,\r
+    0x9Au, 0x79u, 0x17u, 0x2Au, 0x40u, 0xF0u, 0x64u, 0x81u,\r
+    0x2Bu, 0x1Du, 0x9Bu, 0xB2u, 0x00u, 0x22u, 0x3Bu, 0xB1u,\r
+    0x0Du, 0xF2u, 0x27u, 0x14u, 0xE4u, 0x5Cu, 0x01u, 0x3Bu,\r
+    0x12u, 0x19u, 0x92u, 0xB2u, 0x9Bu, 0xB2u, 0xF6u, 0xE7u,\r
+    0x52u, 0x42u, 0x41u, 0xEAu, 0x00u, 0x20u, 0x91u, 0xB2u,\r
+    0x88u, 0x42u, 0x40u, 0xF0u, 0x53u, 0x81u, 0x4Au, 0xE0u,\r
+    0x00u, 0x2Eu, 0x00u, 0xF0u, 0x4Du, 0x81u, 0x01u, 0x2Du,\r
+    0x4Fu, 0xF0u, 0x00u, 0x04u, 0x40u, 0xF0u, 0x3Cu, 0x81u,\r
+    0xBBu, 0xF1u, 0x01u, 0x0Fu, 0x00u, 0xF2u, 0x38u, 0x81u,\r
+    0xFFu, 0x23u, 0x8Du, 0xF8u, 0x2Cu, 0x41u, 0x8Du, 0xF8u,\r
+    0x2Du, 0x41u, 0x25u, 0x46u, 0x8Du, 0xF8u, 0x2Eu, 0x31u,\r
+    0x8Du, 0xF8u, 0x2Fu, 0x61u, 0x04u, 0x24u, 0x01u, 0x20u,\r
+    0x00u, 0x22u, 0x21u, 0x1Du, 0xADu, 0xF8u, 0x06u, 0x40u,\r
+    0x8Du, 0xF8u, 0x28u, 0x01u, 0x8Du, 0xF8u, 0x29u, 0x51u,\r
+    0x8Du, 0xF8u, 0x2Au, 0x41u, 0x8Du, 0xF8u, 0x2Bu, 0x21u,\r
+    0x8Bu, 0xB2u, 0x0Du, 0xF2u, 0x27u, 0x10u, 0xC1u, 0x5Cu,\r
+    0x01u, 0x3Bu, 0x52u, 0x18u, 0x9Bu, 0xB2u, 0x92u, 0xB2u,\r
+    0x00u, 0x2Bu, 0xF6u, 0xD1u, 0x50u, 0x42u, 0x81u, 0xB2u,\r
+    0x08u, 0x0Au, 0x4Bu, 0xAAu, 0x0Du, 0xF2u, 0x2Du, 0x13u,\r
+    0x11u, 0x55u, 0x18u, 0x55u, 0x17u, 0x21u, 0x0Du, 0xF5u,\r
+    0x97u, 0x72u, 0xE3u, 0x1Du, 0x11u, 0x55u, 0x4Au, 0xA8u,\r
+    0x99u, 0xB2u, 0x0Du, 0xF1u, 0x06u, 0x02u, 0x96u, 0x23u,\r
+    0x00u, 0xF0u, 0x62u, 0xFBu, 0xB8u, 0xF1u, 0x00u, 0x0Fu,\r
+    0x3Fu, 0xF4u, 0x72u, 0xAFu, 0x00u, 0x2Eu, 0x00u, 0xF0u,\r
+    0x12u, 0x81u, 0x01u, 0x26u, 0x69u, 0xE7u, 0x9Du, 0xF8u,\r
+    0x29u, 0x21u, 0x9Du, 0xF8u, 0x2Cu, 0xB1u, 0xA2u, 0xF1u,\r
+    0x31u, 0x03u, 0x0Au, 0x2Bu, 0x00u, 0xF2u, 0xF7u, 0x80u,\r
+    0x01u, 0xA1u, 0x51u, 0xF8u, 0x23u, 0xF0u, 0x00u, 0xBFu,\r
+    0x9Du, 0x06u, 0x00u, 0x00u, 0xC1u, 0x05u, 0x00u, 0x00u,\r
+    0x57u, 0x08u, 0x00u, 0x00u, 0xBBu, 0x06u, 0x00u, 0x00u,\r
+    0x6Du, 0x07u, 0x00u, 0x00u, 0x57u, 0x08u, 0x00u, 0x00u,\r
+    0x73u, 0x07u, 0x00u, 0x00u, 0x91u, 0x07u, 0x00u, 0x00u,\r
+    0xBBu, 0x06u, 0x00u, 0x00u, 0xABu, 0x07u, 0x00u, 0x00u,\r
+    0x37u, 0x08u, 0x00u, 0x00u, 0x00u, 0x2Eu, 0x00u, 0xF0u,\r
+    0xDFu, 0x80u, 0x00u, 0x2Du, 0x40u, 0xF0u, 0xDCu, 0x80u,\r
+    0xFFu, 0xF7u, 0xF0u, 0xFEu, 0xD0u, 0xF1u, 0x01u, 0x02u,\r
+    0x38u, 0xBFu, 0x00u, 0x22u, 0x8Du, 0xF8u, 0x2Cu, 0x21u,\r
+    0xBBu, 0xE0u, 0x34u, 0x2Au, 0x12u, 0xD1u, 0x00u, 0x2Eu,\r
+    0x00u, 0xF0u, 0xCEu, 0x80u, 0x03u, 0x2Du, 0x40u, 0xF0u,\r
+    0xCBu, 0x80u, 0xABu, 0xF1u, 0x40u, 0x07u, 0x3Fu, 0x2Fu,\r
+    0x8Cu, 0xBFu, 0x4Fu, 0xF4u, 0x90u, 0x77u, 0x10u, 0x27u,\r
+    0x95u, 0xA8u, 0x00u, 0x21u, 0x3Au, 0x46u, 0x01u, 0xF0u,\r
+    0x88u, 0xFCu, 0x05u, 0xE0u, 0x00u, 0x2Eu, 0x00u, 0xF0u,\r
+    0xBBu, 0x80u, 0x02u, 0x2Du, 0x40u, 0xF2u, 0xB8u, 0x80u,\r
+    0x03u, 0x3Du, 0x95u, 0xABu, 0x2Au, 0x46u, 0xD8u, 0x19u,\r
+    0x0Du, 0xF2u, 0x2Fu, 0x11u, 0x01u, 0xF0u, 0x70u, 0xFCu,\r
+    0xABu, 0xF1u, 0x40u, 0x00u, 0x7Au, 0x19u, 0x3Fu, 0x28u,\r
+    0x96u, 0xB2u, 0x03u, 0xD8u, 0x00u, 0xF0u, 0xD4u, 0xF9u,\r
+    0x10u, 0x24u, 0x01u, 0xE0u, 0x4Fu, 0xF4u, 0x90u, 0x74u,\r
+    0xA6u, 0x42u, 0x40u, 0xF0u, 0x97u, 0x80u, 0x9Du, 0xF8u,\r
+    0x2Eu, 0x11u, 0x9Du, 0xF8u, 0x2Du, 0x71u, 0xBBu, 0xF1u,\r
+    0x3Fu, 0x0Fu, 0x47u, 0xEAu, 0x01u, 0x25u, 0x11u, 0xD8u,\r
+    0xBAu, 0xF1u, 0x00u, 0x0Fu, 0x0Eu, 0xD1u, 0x51u, 0x46u,\r
+    0x4Fu, 0xF4u, 0x90u, 0x72u, 0x02u, 0xA8u, 0x01u, 0xF0u,\r
+    0x58u, 0xFCu, 0x01u, 0x20u, 0xFFu, 0x21u, 0x02u, 0xAAu,\r
+    0x4Fu, 0xF4u, 0x90u, 0x73u, 0x00u, 0xF0u, 0x64u, 0xF9u,\r
+    0x4Fu, 0xF0u, 0x01u, 0x0Au, 0x33u, 0x46u, 0x58u, 0x46u,\r
+    0x29u, 0x46u, 0x95u, 0xAAu, 0x00u, 0xF0u, 0x5Cu, 0xF9u,\r
+    0x01u, 0x26u, 0x00u, 0x28u, 0x75u, 0xD0u, 0x00u, 0x27u,\r
+    0x0Au, 0x25u, 0x75u, 0xE0u, 0x00u, 0x2Eu, 0x77u, 0xD0u,\r
+    0x7Au, 0xE0u, 0x00u, 0x2Eu, 0x74u, 0xD0u, 0x7Cu, 0x19u,\r
+    0xB4u, 0xF5u, 0x96u, 0x7Fu, 0x6Eu, 0xD8u, 0x95u, 0xA9u,\r
+    0xC8u, 0x19u, 0x2Au, 0x46u, 0x4Bu, 0xA9u, 0x01u, 0xF0u,\r
+    0x2Bu, 0xFCu, 0xA7u, 0xB2u, 0x00u, 0x25u, 0x63u, 0xE0u,\r
+    0x00u, 0x2Du, 0x65u, 0xD1u, 0x3Au, 0x48u, 0x02u, 0xAEu,\r
+    0x4Bu, 0xACu, 0x03u, 0xC8u, 0x86u, 0xE8u, 0x03u, 0x00u,\r
+    0x84u, 0xE8u, 0x03u, 0x00u, 0x01u, 0x26u, 0x08u, 0x24u,\r
+    0x21u, 0xE7u, 0x00u, 0x2Eu, 0x58u, 0xD0u, 0x03u, 0x2Du,\r
+    0x56u, 0xD1u, 0x9Du, 0xF8u, 0x2Eu, 0x01u, 0x9Du, 0xF8u,\r
+    0x2Du, 0x11u, 0xABu, 0xF1u, 0x40u, 0x02u, 0x3Fu, 0x2Au,\r
+    0x41u, 0xEAu, 0x00u, 0x25u, 0x0Au, 0xD8u, 0x2Du, 0x01u,\r
+    0x00u, 0x23u, 0x10u, 0x22u, 0x2Du, 0x48u, 0x11u, 0x18u,\r
+    0x4Cu, 0x5Du, 0x01u, 0x3Au, 0x23u, 0x44u, 0xDBu, 0xB2u,\r
+    0xF8u, 0xD1u, 0x26u, 0xE0u, 0x05u, 0xEBu, 0x0Bu, 0x23u,\r
+    0x1Cu, 0x02u, 0x4Fu, 0xF4u, 0x80u, 0x72u, 0x00u, 0x23u,\r
+    0x01u, 0x3Au, 0x10u, 0x5Du, 0x19u, 0x18u, 0xCBu, 0xB2u,\r
+    0x00u, 0x2Au, 0xF9u, 0xD1u, 0xBBu, 0xF1u, 0x3Fu, 0x0Fu,\r
+    0x17u, 0xD8u, 0x0Bu, 0xF5u, 0x10u, 0x34u, 0x05u, 0xEBu,\r
+    0x04u, 0x20u, 0x41u, 0x01u, 0x54u, 0x5Cu, 0x01u, 0x32u,\r
+    0x1Bu, 0x19u, 0x20u, 0x2Au, 0xDBu, 0xB2u, 0xF9u, 0xD1u,\r
+    0xBBu, 0xF1u, 0x01u, 0x0Fu, 0x09u, 0xD1u, 0xFFu, 0x2Du,\r
+    0x07u, 0xD1u, 0x1Bu, 0x4Du, 0x1Bu, 0x4Cu, 0x28u, 0x78u,\r
+    0x19u, 0x1Au, 0x23u, 0x78u, 0xCAu, 0x1Au, 0x02u, 0xF0u,\r
+    0xFFu, 0x03u, 0x5Du, 0x42u, 0x8Du, 0xF8u, 0x2Cu, 0x51u,\r
+    0x00u, 0x25u, 0x01u, 0x24u, 0xDBu, 0xE6u, 0xFFu, 0xF7u,\r
+    0x29u, 0xFEu, 0x10u, 0xB9u, 0x14u, 0x4Du, 0x80u, 0x24u,\r
+    0x2Cu, 0x70u, 0x00u, 0xF0u, 0x47u, 0xF9u, 0x0Bu, 0xE0u,\r
+    0x04u, 0x25u, 0xD0u, 0xE6u, 0x01u, 0x26u, 0x00u, 0x27u,\r
+    0x04u, 0xE0u, 0x07u, 0x46u, 0x9Au, 0xE7u, 0x05u, 0x25u,\r
+    0x00u, 0x24u, 0xC8u, 0xE6u, 0x03u, 0x25u, 0xFBu, 0xE7u,\r
+    0x04u, 0x25u, 0xF9u, 0xE7u, 0x08u, 0x25u, 0xF7u, 0xE7u,\r
+    0xB8u, 0xF1u, 0x00u, 0x0Fu, 0x01u, 0xD1u, 0x47u, 0x46u,\r
+    0x5Eu, 0xE6u, 0x00u, 0x27u, 0xEDu, 0xE6u, 0x0Du, 0xF5u,\r
+    0x61u, 0x7Du, 0xBDu, 0xE8u, 0xF0u, 0x8Fu, 0x00u, 0xBFu,\r
+    0xCCu, 0x20u, 0x00u, 0x00u, 0xFFu, 0x7Fu, 0x00u, 0x40u,\r
+    0xD0u, 0xFFu, 0x01u, 0x00u, 0xD1u, 0xFFu, 0x01u, 0x00u,\r
+    0xFAu, 0x46u, 0x00u, 0x40u, 0x10u, 0xB5u, 0xC8u, 0xB0u,\r
+    0x00u, 0xF0u, 0x94u, 0xF8u, 0x10u, 0xB1u, 0x00u, 0x20u,\r
+    0x00u, 0xF0u, 0x16u, 0xF9u, 0x68u, 0x46u, 0x00u, 0xF0u,\r
+    0xA1u, 0xF8u, 0x10u, 0xB1u, 0x00u, 0x20u, 0x00u, 0xF0u,\r
+    0x0Fu, 0xF9u, 0x16u, 0x48u, 0x03u, 0x68u, 0x19u, 0x68u,\r
+    0x00u, 0x23u, 0x0Au, 0x46u, 0x22u, 0xB1u, 0x12u, 0xF8u,\r
+    0x01u, 0x4Du, 0xE3u, 0x18u, 0xDBu, 0xB2u, 0xF9u, 0xE7u,\r
+    0x42u, 0x68u, 0x10u, 0x78u, 0xC4u, 0x1Au, 0x04u, 0xF0u,\r
+    0xFFu, 0x03u, 0x83u, 0x42u, 0x00u, 0xD1u, 0x11u, 0xB9u,\r
+    0x00u, 0x20u, 0x00u, 0xF0u, 0xF9u, 0xF8u, 0x0Cu, 0x4Cu,\r
+    0xFFu, 0xF7u, 0xD4u, 0xFDu, 0x21u, 0x78u, 0x01u, 0xF0u,\r
+    0xC0u, 0x02u, 0x40u, 0x2Au, 0x00u, 0xD0u, 0x18u, 0xB1u,\r
+    0x00u, 0x20u, 0x20u, 0x70u, 0xFFu, 0xF7u, 0x0Cu, 0xFEu,\r
+    0x14u, 0x20u, 0xFFu, 0xF7u, 0x09u, 0xFEu, 0x80u, 0x20u,\r
+    0x20u, 0x70u, 0x00u, 0xF0u, 0xE7u, 0xF8u, 0x48u, 0xB0u,\r
+    0x10u, 0xBDu, 0x00u, 0xBFu, 0x0Cu, 0xC1u, 0xFFu, 0x1Fu,\r
+    0xFAu, 0x46u, 0x00u, 0x40u, 0x08u, 0xB5u, 0x0Au, 0x4Bu,\r
+    0x1Au, 0x78u, 0x02u, 0xF0u, 0xC0u, 0x00u, 0x80u, 0x28u,\r
+    0x0Cu, 0xD1u, 0x00u, 0x21u, 0x19u, 0x70u, 0x01u, 0x20u,\r
+    0xFFu, 0xF7u, 0x6Au, 0xFDu, 0x30u, 0xB1u, 0x01u, 0x20u,\r
+    0xFFu, 0xF7u, 0x66u, 0xFDu, 0xBDu, 0xE8u, 0x08u, 0x40u,\r
+    0xFFu, 0xF7u, 0x60u, 0xBDu, 0x08u, 0xBDu, 0x00u, 0xBFu,\r
+    0xFAu, 0x46u, 0x00u, 0x40u, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x02u, 0x30u, 0x80u, 0x08u, 0x00u, 0xF0u, 0x05u, 0x80u,\r
     0x00u, 0xBFu, 0x01u, 0x38u, 0x00u, 0x46u, 0x7Fu, 0xF4u,\r
     0xFCu, 0xAFu, 0x70u, 0x47u, 0xEFu, 0xF3u, 0x10u, 0x80u,\r
@@ -506,9 +509,9 @@ const uint8 cy_bootloader[] = {
     0x23u, 0xBEu, 0x00u, 0xBFu, 0xA5u, 0x43u, 0x00u, 0x40u,\r
     0x9Du, 0x60u, 0x00u, 0x40u, 0x94u, 0x43u, 0x00u, 0x40u,\r
     0x12u, 0x60u, 0x00u, 0x40u, 0xF8u, 0x51u, 0x00u, 0x40u,\r
-    0x84u, 0x60u, 0x00u, 0x40u, 0xF3u, 0x15u, 0x00u, 0x00u,\r
-    0xF1u, 0x15u, 0x00u, 0x00u, 0x31u, 0x14u, 0x00u, 0x00u,\r
-    0x89u, 0x15u, 0x00u, 0x00u, 0xBDu, 0x15u, 0x00u, 0x00u,\r
+    0x84u, 0x60u, 0x00u, 0x40u, 0x0Bu, 0x16u, 0x00u, 0x00u,\r
+    0x09u, 0x16u, 0x00u, 0x00u, 0x49u, 0x14u, 0x00u, 0x00u,\r
+    0xA1u, 0x15u, 0x00u, 0x00u, 0xD5u, 0x15u, 0x00u, 0x00u,\r
     0x18u, 0x4Bu, 0x01u, 0x22u, 0x10u, 0xB5u, 0x1Au, 0x70u,\r
     0x17u, 0x4Bu, 0x4Fu, 0xF4u, 0x00u, 0x04u, 0x1Cu, 0x60u,\r
     0x4Fu, 0xF0u, 0x80u, 0x74u, 0x1Cu, 0x60u, 0x1Au, 0x60u,\r
@@ -822,7 +825,7 @@ const uint8 cy_bootloader[] = {
     0x04u, 0x4Bu, 0x05u, 0x49u, 0x1Au, 0x78u, 0x01u, 0xEBu,\r
     0xC2u, 0x03u, 0x5Au, 0x68u, 0x02u, 0xEBu, 0xC0u, 0x00u,\r
     0xC0u, 0x68u, 0x70u, 0x47u, 0x6Cu, 0xC1u, 0xFFu, 0x1Fu,\r
-    0xB0u, 0x20u, 0x00u, 0x00u, 0xF8u, 0xB5u, 0x3Du, 0x4Bu,\r
+    0xD4u, 0x20u, 0x00u, 0x00u, 0xF8u, 0xB5u, 0x3Du, 0x4Bu,\r
     0x1Au, 0x78u, 0x00u, 0x2Au, 0x74u, 0xD0u, 0x18u, 0x78u,\r
     0x41u, 0x1Eu, 0xC8u, 0xB2u, 0xFFu, 0xF7u, 0xE8u, 0xFFu,\r
     0xC3u, 0x68u, 0x05u, 0x7Au, 0x08u, 0x33u, 0x00u, 0x20u,\r
@@ -1009,9 +1012,9 @@ const uint8 cy_bootloader[] = {
     0x08u, 0x70u, 0x32u, 0xE0u, 0x60u, 0xC1u, 0xFFu, 0x1Fu,\r
     0x00u, 0x60u, 0x00u, 0x40u, 0x01u, 0x60u, 0x00u, 0x40u,\r
     0x03u, 0x60u, 0x00u, 0x40u, 0x6Cu, 0xC1u, 0xFFu, 0x1Fu,\r
-    0xB0u, 0x20u, 0x00u, 0x00u, 0x02u, 0x60u, 0x00u, 0x40u,\r
-    0x76u, 0x21u, 0x00u, 0x00u, 0xF2u, 0x21u, 0x00u, 0x00u,\r
-    0x6Cu, 0x21u, 0x00u, 0x00u, 0x04u, 0x60u, 0x00u, 0x40u,\r
+    0xD4u, 0x20u, 0x00u, 0x00u, 0x02u, 0x60u, 0x00u, 0x40u,\r
+    0x9Au, 0x21u, 0x00u, 0x00u, 0x16u, 0x22u, 0x00u, 0x00u,\r
+    0x90u, 0x21u, 0x00u, 0x00u, 0x04u, 0x60u, 0x00u, 0x40u,\r
     0x78u, 0xC1u, 0xFFu, 0x1Fu, 0x55u, 0xC1u, 0xFFu, 0x1Fu,\r
     0x6Fu, 0xC1u, 0xFFu, 0x1Fu, 0x71u, 0xC1u, 0xFFu, 0x1Fu,\r
     0x5Eu, 0xC1u, 0xFFu, 0x1Fu, 0x5Cu, 0xC1u, 0xFFu, 0x1Fu,\r
@@ -1039,92 +1042,94 @@ const uint8 cy_bootloader[] = {
     0x0Eu, 0x4Bu, 0x00u, 0x24u, 0xE8u, 0x1Au, 0x85u, 0x10u,\r
     0xACu, 0x42u, 0x05u, 0xD0u, 0x0Bu, 0x49u, 0x51u, 0xF8u,\r
     0x24u, 0x20u, 0x90u, 0x47u, 0x01u, 0x34u, 0xF7u, 0xE7u,\r
-    0x00u, 0xF0u, 0x34u, 0xF9u, 0x08u, 0x49u, 0x09u, 0x4Au,\r
+    0x00u, 0xF0u, 0x3Au, 0xF9u, 0x08u, 0x49u, 0x09u, 0x4Au,\r
     0x54u, 0x1Au, 0xA5u, 0x10u, 0x00u, 0x24u, 0xACu, 0x42u,\r
     0x05u, 0xD0u, 0x05u, 0x4Bu, 0x53u, 0xF8u, 0x24u, 0x00u,\r
     0x80u, 0x47u, 0x01u, 0x34u, 0xF7u, 0xE7u, 0x38u, 0xBDu,\r
-    0x10u, 0x22u, 0x00u, 0x00u, 0x10u, 0x22u, 0x00u, 0x00u,\r
-    0x10u, 0x22u, 0x00u, 0x00u, 0x18u, 0x22u, 0x00u, 0x00u,\r
+    0x34u, 0x22u, 0x00u, 0x00u, 0x34u, 0x22u, 0x00u, 0x00u,\r
+    0x34u, 0x22u, 0x00u, 0x00u, 0x3Cu, 0x22u, 0x00u, 0x00u,\r
     0x10u, 0xB5u, 0x00u, 0x23u, 0x93u, 0x42u, 0x03u, 0xD0u,\r
     0xCCu, 0x5Cu, 0xC4u, 0x54u, 0x01u, 0x33u, 0xF9u, 0xE7u,\r
     0x10u, 0xBDu, 0x82u, 0x18u, 0x03u, 0x46u, 0x93u, 0x42u,\r
     0x02u, 0xD0u, 0x03u, 0xF8u, 0x01u, 0x1Bu, 0xFAu, 0xE7u,\r
-    0x70u, 0x47u, 0x00u, 0x00u, 0x58u, 0x22u, 0x00u, 0x00u,\r
-    0x81u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x10u, 0x51u, 0x00u, 0x40u, 0x30u, 0x00u, 0x50u, 0x51u,\r
+    0x70u, 0x47u, 0x00u, 0x00u, 0x80u, 0x22u, 0x00u, 0x00u,\r
+    0x40u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
+    0x10u, 0x51u, 0x00u, 0x40u, 0x20u, 0x00u, 0x50u, 0x51u,\r
     0x00u, 0x40u, 0x10u, 0x00u, 0xC0u, 0x51u, 0x00u, 0x40u,\r
     0x10u, 0x00u, 0x00u, 0x00u, 0x01u, 0x40u, 0x00u, 0x10u,\r
     0x00u, 0x14u, 0x01u, 0x40u, 0x00u, 0x08u, 0x00u, 0x40u,\r
     0x01u, 0x40u, 0x00u, 0x0Au, 0x00u, 0x4Cu, 0x01u, 0x40u,\r
     0x00u, 0x02u, 0x00u, 0x50u, 0x01u, 0x40u, 0x20u, 0x00u,\r
-    0x01u, 0x45u, 0x00u, 0x40u, 0x01u, 0x52u, 0x00u, 0x40u,\r
+    0x01u, 0x45u, 0x00u, 0x40u, 0x02u, 0x52u, 0x00u, 0x40u,\r
     0x01u, 0x17u, 0x01u, 0x40u, 0x01u, 0x19u, 0x01u, 0x40u,\r
     0x03u, 0x40u, 0x01u, 0x40u, 0x02u, 0x41u, 0x01u, 0x40u,\r
     0x02u, 0x42u, 0x01u, 0x40u, 0x02u, 0x43u, 0x01u, 0x40u,\r
     0x03u, 0x47u, 0x01u, 0x40u, 0x03u, 0x48u, 0x01u, 0x40u,\r
     0x02u, 0x4Cu, 0x01u, 0x40u, 0x01u, 0x51u, 0x01u, 0x40u,\r
-    0x7Eu, 0x02u, 0x7Cu, 0x40u, 0xEEu, 0x0Au, 0xEEu, 0x0Au,\r
-    0x33u, 0x80u, 0x36u, 0x40u, 0xCCu, 0x30u, 0xA6u, 0x40u,\r
-    0xA7u, 0x80u, 0xA6u, 0x40u, 0xA7u, 0x80u, 0xA6u, 0x40u,\r
-    0xA7u, 0x80u, 0x08u, 0x08u, 0x0Fu, 0x40u, 0xC2u, 0x0Cu,\r
-    0xAEu, 0x40u, 0xAFu, 0x80u, 0xEEu, 0x50u, 0xACu, 0x08u,\r
-    0xAFu, 0x40u, 0x00u, 0x0Au, 0x00u, 0xFFu, 0xFFu, 0x00u,\r
+    0x7Eu, 0x02u, 0x1Cu, 0x3Eu, 0x7Cu, 0x40u, 0xEEu, 0x0Au,\r
+    0xEEu, 0x0Au, 0x33u, 0x80u, 0x36u, 0x40u, 0xCCu, 0x30u,\r
+    0xA6u, 0x40u, 0xA7u, 0x80u, 0xA6u, 0x40u, 0xA7u, 0x80u,\r
+    0xA6u, 0x40u, 0xA7u, 0x80u, 0x08u, 0x08u, 0x0Fu, 0x40u,\r
+    0xC2u, 0x0Cu, 0xAEu, 0x40u, 0xAFu, 0x80u, 0xEEu, 0x50u,\r
+    0xACu, 0x08u, 0xAFu, 0x40u, 0x00u, 0x0Au, 0x00u, 0xFFu,\r
+    0xFFu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u,\r
+    0x3Eu, 0x00u, 0x00u, 0x3Eu, 0x00u, 0x00u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0xFCu, 0xFCu, 0x00u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x0Fu, 0x0Fu, 0x00u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x69u, 0x30u, 0x13u, 0x2Eu,\r
+    0x00u, 0x14u, 0x01u, 0x01u, 0x01u, 0x00u, 0x00u, 0x00u,\r
+    0xDCu, 0x20u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
+    0x16u, 0x22u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
+    0xECu, 0x20u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
+    0xEDu, 0x21u, 0x00u, 0x00u, 0x02u, 0x00u, 0x00u, 0x00u,\r
+    0x0Eu, 0x21u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
+    0x20u, 0x21u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
+    0x0Cu, 0x21u, 0x00u, 0x00u, 0x03u, 0x00u, 0x00u, 0x00u,\r
+    0x01u, 0x03u, 0x40u, 0x00u, 0x03u, 0x00u, 0x00u, 0x00u,\r
+    0x82u, 0x03u, 0x40u, 0x00u, 0x03u, 0x00u, 0x00u, 0x00u,\r
+    0x01u, 0x00u, 0x00u, 0x00u, 0x28u, 0x21u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x5Cu, 0x21u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x50u, 0x21u, 0x00u, 0x00u,\r
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u, 0x00u, 0xFCu,\r
-    0xFCu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x0Fu,\r
-    0x0Fu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x69u, 0x30u, 0x13u, 0x2Eu, 0x00u, 0x14u, 0x01u, 0x01u,\r
-    0x01u, 0x00u, 0x00u, 0x00u, 0xB8u, 0x20u, 0x00u, 0x00u,\r
-    0x01u, 0x00u, 0x00u, 0x00u, 0xF2u, 0x21u, 0x00u, 0x00u,\r
-    0x01u, 0x00u, 0x00u, 0x00u, 0xC8u, 0x20u, 0x00u, 0x00u,\r
-    0x01u, 0x00u, 0x00u, 0x00u, 0xC9u, 0x21u, 0x00u, 0x00u,\r
-    0x02u, 0x00u, 0x00u, 0x00u, 0xEAu, 0x20u, 0x00u, 0x00u,\r
-    0x01u, 0x00u, 0x00u, 0x00u, 0xFCu, 0x20u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0xE8u, 0x20u, 0x00u, 0x00u,\r
-    0x03u, 0x00u, 0x00u, 0x00u, 0x01u, 0x03u, 0x40u, 0x00u,\r
-    0x03u, 0x00u, 0x00u, 0x00u, 0x82u, 0x03u, 0x40u, 0x00u,\r
-    0x03u, 0x00u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
-    0x04u, 0x21u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x38u, 0x21u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x2Cu, 0x21u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
-    0x44u, 0x21u, 0x00u, 0x00u, 0x01u, 0x00u, 0x00u, 0x00u,\r
-    0xDBu, 0x21u, 0x00u, 0x00u, 0x41u, 0x00u, 0x00u, 0x00u,\r
-    0x33u, 0xC2u, 0xFFu, 0x1Fu, 0x74u, 0xC2u, 0xFFu, 0x1Fu,\r
-    0x41u, 0x00u, 0x00u, 0x00u, 0xF2u, 0xC1u, 0xFFu, 0x1Fu,\r
-    0xEEu, 0xC1u, 0xFFu, 0x1Fu, 0x24u, 0x00u, 0x05u, 0x01u,\r
-    0x09u, 0x00u, 0xA1u, 0x00u, 0x09u, 0x00u, 0xA1u, 0x00u,\r
+    0x01u, 0x00u, 0x00u, 0x00u, 0x68u, 0x21u, 0x00u, 0x00u,\r
+    0x01u, 0x00u, 0x00u, 0x00u, 0xFFu, 0x21u, 0x00u, 0x00u,\r
+    0x41u, 0x00u, 0x00u, 0x00u, 0x33u, 0xC2u, 0xFFu, 0x1Fu,\r
+    0x74u, 0xC2u, 0xFFu, 0x1Fu, 0x41u, 0x00u, 0x00u, 0x00u,\r
+    0xF2u, 0xC1u, 0xFFu, 0x1Fu, 0xEEu, 0xC1u, 0xFFu, 0x1Fu,\r
+    0x24u, 0x00u, 0x05u, 0x01u, 0x09u, 0x00u, 0xA1u, 0x00u,\r
+    0x09u, 0x00u, 0xA1u, 0x00u, 0x09u, 0x00u, 0x15u, 0x00u,\r
+    0x25u, 0xFFu, 0x75u, 0x08u, 0x95u, 0x40u, 0x91u, 0x02u,\r
     0x09u, 0x00u, 0x15u, 0x00u, 0x25u, 0xFFu, 0x75u, 0x08u,\r
-    0x95u, 0x40u, 0x91u, 0x02u, 0x09u, 0x00u, 0x15u, 0x00u,\r
-    0x25u, 0xFFu, 0x75u, 0x08u, 0x95u, 0x40u, 0x81u, 0x02u,\r
-    0xC0u, 0xC0u, 0x00u, 0x00u, 0x0Au, 0x03u, 0x30u, 0x00u,\r
-    0x30u, 0x00u, 0x30u, 0x00u, 0x31u, 0x00u, 0x04u, 0x03u,\r
-    0x09u, 0x04u, 0x2Cu, 0x03u, 0x43u, 0x00u, 0x79u, 0x00u,\r
-    0x70u, 0x00u, 0x72u, 0x00u, 0x65u, 0x00u, 0x73u, 0x00u,\r
-    0x73u, 0x00u, 0x20u, 0x00u, 0x53u, 0x00u, 0x65u, 0x00u,\r
-    0x6Du, 0x00u, 0x69u, 0x00u, 0x63u, 0x00u, 0x6Fu, 0x00u,\r
-    0x6Eu, 0x00u, 0x64u, 0x00u, 0x75u, 0x00u, 0x63u, 0x00u,\r
-    0x74u, 0x00u, 0x6Fu, 0x00u, 0x72u, 0x00u, 0x22u, 0x03u,\r
-    0x50u, 0x00u, 0x53u, 0x00u, 0x6Fu, 0x00u, 0x43u, 0x00u,\r
-    0x33u, 0x00u, 0x20u, 0x00u, 0x42u, 0x00u, 0x6Fu, 0x00u,\r
-    0x6Fu, 0x00u, 0x74u, 0x00u, 0x6Cu, 0x00u, 0x6Fu, 0x00u,\r
-    0x61u, 0x00u, 0x64u, 0x00u, 0x65u, 0x00u, 0x72u, 0x00u,\r
-    0x00u, 0x09u, 0x02u, 0x29u, 0x00u, 0x01u, 0x01u, 0x00u,\r
-    0x80u, 0x00u, 0x09u, 0x04u, 0x00u, 0x00u, 0x02u, 0x03u,\r
-    0x00u, 0x00u, 0x02u, 0x09u, 0x21u, 0x11u, 0x01u, 0x00u,\r
-    0x01u, 0x22u, 0x24u, 0x00u, 0x07u, 0x05u, 0x01u, 0x03u,\r
-    0x40u, 0x00u, 0x01u, 0x07u, 0x05u, 0x82u, 0x03u, 0x40u,\r
-    0x00u, 0x01u, 0x12u, 0x01u, 0x00u, 0x02u, 0x00u, 0x00u,\r
-    0x00u, 0x08u, 0xB4u, 0x04u, 0x1Du, 0xB7u, 0x01u, 0x30u,\r
-    0x01u, 0x02u, 0x80u, 0x01u, 0xF8u, 0xB5u, 0x00u, 0xBFu,\r
-    0xF8u, 0xBCu, 0x08u, 0xBCu, 0x9Eu, 0x46u, 0x70u, 0x47u,\r
-    0x51u, 0x00u, 0x00u, 0x00u, 0xB9u, 0x01u, 0x00u, 0x00u,\r
+    0x95u, 0x40u, 0x81u, 0x02u, 0xC0u, 0xC0u, 0x00u, 0x00u,\r
+    0x0Au, 0x03u, 0x30u, 0x00u, 0x30u, 0x00u, 0x30u, 0x00u,\r
+    0x31u, 0x00u, 0x04u, 0x03u, 0x09u, 0x04u, 0x2Cu, 0x03u,\r
+    0x43u, 0x00u, 0x79u, 0x00u, 0x70u, 0x00u, 0x72u, 0x00u,\r
+    0x65u, 0x00u, 0x73u, 0x00u, 0x73u, 0x00u, 0x20u, 0x00u,\r
+    0x53u, 0x00u, 0x65u, 0x00u, 0x6Du, 0x00u, 0x69u, 0x00u,\r
+    0x63u, 0x00u, 0x6Fu, 0x00u, 0x6Eu, 0x00u, 0x64u, 0x00u,\r
+    0x75u, 0x00u, 0x63u, 0x00u, 0x74u, 0x00u, 0x6Fu, 0x00u,\r
+    0x72u, 0x00u, 0x22u, 0x03u, 0x50u, 0x00u, 0x53u, 0x00u,\r
+    0x6Fu, 0x00u, 0x43u, 0x00u, 0x33u, 0x00u, 0x20u, 0x00u,\r
+    0x42u, 0x00u, 0x6Fu, 0x00u, 0x6Fu, 0x00u, 0x74u, 0x00u,\r
+    0x6Cu, 0x00u, 0x6Fu, 0x00u, 0x61u, 0x00u, 0x64u, 0x00u,\r
+    0x65u, 0x00u, 0x72u, 0x00u, 0x00u, 0x09u, 0x02u, 0x29u,\r
+    0x00u, 0x01u, 0x01u, 0x00u, 0x80u, 0x00u, 0x09u, 0x04u,\r
+    0x00u, 0x00u, 0x02u, 0x03u, 0x00u, 0x00u, 0x02u, 0x09u,\r
+    0x21u, 0x11u, 0x01u, 0x00u, 0x01u, 0x22u, 0x24u, 0x00u,\r
+    0x07u, 0x05u, 0x01u, 0x03u, 0x40u, 0x00u, 0x01u, 0x07u,\r
+    0x05u, 0x82u, 0x03u, 0x40u, 0x00u, 0x01u, 0x12u, 0x01u,\r
+    0x00u, 0x02u, 0x00u, 0x00u, 0x00u, 0x08u, 0xB4u, 0x04u,\r
+    0x1Du, 0xB7u, 0x01u, 0x30u, 0x01u, 0x02u, 0x80u, 0x01u,\r
     0xF8u, 0xB5u, 0x00u, 0xBFu, 0xF8u, 0xBCu, 0x08u, 0xBCu,\r
-    0x9Eu, 0x46u, 0x70u, 0x47u, 0x2Du, 0x00u, 0x00u, 0x00u,\r
-    0x38u, 0x22u, 0x00u, 0x00u, 0x08u, 0xC1u, 0xFFu, 0x1Fu,\r
-    0x20u, 0x00u, 0x00u, 0x00u, 0x50u, 0x01u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0xECu, 0x1Fu, 0x00u, 0x00u,\r
-    0xF0u, 0x1Fu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x7Du,\r
+    0x9Eu, 0x46u, 0x70u, 0x47u, 0x51u, 0x00u, 0x00u, 0x00u,\r
+    0xB9u, 0x01u, 0x00u, 0x00u, 0xF8u, 0xB5u, 0x00u, 0xBFu,\r
+    0xF8u, 0xBCu, 0x08u, 0xBCu, 0x9Eu, 0x46u, 0x70u, 0x47u,\r
+    0x2Du, 0x00u, 0x00u, 0x00u, 0x60u, 0x22u, 0x00u, 0x00u,\r
+    0x08u, 0xC1u, 0xFFu, 0x1Fu, 0x20u, 0x00u, 0x00u, 0x00u,\r
+    0x50u, 0x01u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
+    0x00u, 0x00u, 0x00u, 0x00u, 0x04u, 0x20u, 0x00u, 0x00u,\r
+    0x08u, 0x20u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x7Du,\r
     0x00u, 0xFAu, 0x00u, 0x00u, 0x40u, 0x00u, 0x00u, 0x00u,\r
     0x00u, 0x90u, 0xD0u, 0x03u, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
@@ -1142,11 +1147,6 @@ const uint8 cy_bootloader[] = {
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
     0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
 \r
 #if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
@@ -1158,7 +1158,7 @@ __attribute__ ((__section__(".cymeta"), used))
 #endif\r
 const uint8 cy_metadata[] = {\r
     0x00u, 0x01u, 0x2Eu, 0x13u, 0x30u, 0x69u, 0x00u, 0x01u,\r
-    0x2Eu, 0x1Fu, 0x88u, 0x6Bu};\r
+    0x2Eu, 0x1Fu, 0x8Cu, 0x6Bu};\r
 \r
 #if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
 __attribute__ ((__section__(".cycustnvl"), used))\r

diff --git a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit
index e8e530bdb2728d8c3b3ff0a8dfe636a741ec39f2..d6ca5042ce7d59f0d6b2238f54299bd1a22af9af 100755 (executable)
Binary files a/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit and b/software/SCSI2SD/SCSI2SD.cydsn/SCSI2SD.cyfit differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/ARM_C_FILE.P b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/ARM_C_FILE.P
deleted file mode 100755 (executable)
index 9a9241a..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/ARM_C_FILE.P
+++ /dev/null
@@ -1,170 +0,0 @@
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL_PVT.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmFunc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmInstr.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydisabledsheets.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/project.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL_PVT.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmFunc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmInstr.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydisabledsheets.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/project.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/Cm3Start.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/Cm3Start.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/SD_PULLUP.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_boot.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_boot.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cls.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cls.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_descr.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_descr.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_drv.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_drv.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_episr.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_episr.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL_PVT.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmFunc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmInstr.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydisabledsheets.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/project.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pm.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pm.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_std.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_std.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_vnd.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_vnd.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyutils.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyutils.c : \r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/C_FILE.P b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/C_FILE.P
deleted file mode 100755 (executable)
index aa6db68..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/C_FILE.P
+++ /dev/null
@@ -1,70 +0,0 @@
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL_PVT.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmFunc.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmInstr.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydisabledsheets.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/project.h W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/main.c \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/BL_PVT.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyDmac.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyFlash.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyLib.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CySpc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_DBx_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SCSI_Out_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/SD_PULLUP_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dm_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_Dp_aliases.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_audio.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_cdc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_hid.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_midi.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/USBFS_pvt.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cm3_psoc5.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmFunc.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/core_cmInstr.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyPm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevice_trm.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydisabledsheets.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cypins.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cytypes.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/project.h : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/main.c : \r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/GNU_ARM_ASM_FILE.P b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/GNU_ARM_ASM_FILE.P
deleted file mode 100755 (executable)
index 7595633..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/.deps/GNU_ARM_ASM_FILE.P
+++ /dev/null
@@ -1,10 +0,0 @@
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.o : W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevicegnu.inc W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevicegnu_trm.inc W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfittergnu.inc W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyBootAsmGnu.s \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevicegnu.inc : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cydevicegnu_trm.inc : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfittergnu.inc : \r
-\r
-W:/SCSI2SD/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/CyBootAsmGnu.s : \r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.lst
deleted file mode 100755 (executable)
index 5fc2a5b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.lst
+++ /dev/null
@@ -1,8147 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "BL.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.BL_LaunchBootloadable,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .thumb\r
-  21                           .thumb_func\r
-  22                           .type   BL_LaunchBootloadable, %function\r
-  23                   BL_LaunchBootloadable:\r
-  24                   .LFB62:\r
-  25                           .file 1 ".\\Generated_Source\\PSoC5\\BL.c"\r
-   1:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/BL.c **** * File Name: BL.c\r
-   3:.\Generated_Source\PSoC5/BL.c **** * Version 1.20\r
-   4:.\Generated_Source\PSoC5/BL.c **** *\r
-   5:.\Generated_Source\PSoC5/BL.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/BL.c **** *   Provides an API for the Bootloader component. The API includes functions\r
-   7:.\Generated_Source\PSoC5/BL.c **** *   for starting boot loading operations, validating the application and\r
-   8:.\Generated_Source\PSoC5/BL.c **** *   jumping to the application.\r
-   9:.\Generated_Source\PSoC5/BL.c **** *\r
-  10:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/BL.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/BL.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/BL.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/BL.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/BL.c **** \r
-  17:.\Generated_Source\PSoC5/BL.c **** #include "BL_PVT.h"\r
-  18:.\Generated_Source\PSoC5/BL.c **** \r
-  19:.\Generated_Source\PSoC5/BL.c **** #include "project.h"\r
-  20:.\Generated_Source\PSoC5/BL.c **** #include <string.h>\r
-  21:.\Generated_Source\PSoC5/BL.c **** \r
-  22:.\Generated_Source\PSoC5/BL.c **** \r
-  23:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-  24:.\Generated_Source\PSoC5/BL.c **** * The Checksum and SizeBytes are forcefully set in code. We then post process\r
-  25:.\Generated_Source\PSoC5/BL.c **** * the hex file from the linker and inject their values then. When the hex file\r
-  26:.\Generated_Source\PSoC5/BL.c **** * is loaded onto the device these two variables should have valid values.\r
-  27:.\Generated_Source\PSoC5/BL.c **** * Because the compiler can do optimizations remove the constant\r
-  28:.\Generated_Source\PSoC5/BL.c **** * accesses, these should not be accessed directly. Instead, the variables\r
-  29:.\Generated_Source\PSoC5/BL.c **** * CyBtldr_ChecksumAccess & CyBtldr_SizeBytesAccess should be used to get the\r
-  30:.\Generated_Source\PSoC5/BL.c **** * proper values at runtime.\r
-  31:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
-  32:.\Generated_Source\PSoC5/BL.c **** #if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 2\r
-\r
-\r
-  33:.\Generated_Source\PSoC5/BL.c ****     __attribute__((section (".bootloader")))\r
-  34:.\Generated_Source\PSoC5/BL.c **** #elif defined (__ICCARM__)\r
-  35:.\Generated_Source\PSoC5/BL.c ****     #pragma location=".bootloader"\r
-  36:.\Generated_Source\PSoC5/BL.c **** #endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-  37:.\Generated_Source\PSoC5/BL.c **** \r
-  38:.\Generated_Source\PSoC5/BL.c **** const uint8  CYCODE BL_Checksum = 0u;\r
-  39:.\Generated_Source\PSoC5/BL.c **** const uint8  CYCODE *BL_ChecksumAccess  = (const uint8  CYCODE *)(&BL_Checksum);\r
-  40:.\Generated_Source\PSoC5/BL.c **** \r
-  41:.\Generated_Source\PSoC5/BL.c **** #if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-  42:.\Generated_Source\PSoC5/BL.c ****     __attribute__((section (".bootloader")))\r
-  43:.\Generated_Source\PSoC5/BL.c **** #elif defined (__ICCARM__)\r
-  44:.\Generated_Source\PSoC5/BL.c ****     #pragma location=".bootloader"\r
-  45:.\Generated_Source\PSoC5/BL.c **** #endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-  46:.\Generated_Source\PSoC5/BL.c **** \r
-  47:.\Generated_Source\PSoC5/BL.c **** const uint32 CYCODE BL_SizeBytes = 0xFFFFFFFFu;\r
-  48:.\Generated_Source\PSoC5/BL.c **** const uint32 CYCODE *BL_SizeBytesAccess = (const uint32 CYCODE *)(&BL_SizeBytes);\r
-  49:.\Generated_Source\PSoC5/BL.c **** \r
-  50:.\Generated_Source\PSoC5/BL.c **** \r
-  51:.\Generated_Source\PSoC5/BL.c **** #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-  52:.\Generated_Source\PSoC5/BL.c ****     uint8 BL_activeApp = BL_MD_BTLDB_ACTIVE_NONE;\r
-  53:.\Generated_Source\PSoC5/BL.c **** #else\r
-  54:.\Generated_Source\PSoC5/BL.c ****     #define BL_activeApp      (BL_MD_BTLDB_ACTIVE_0)\r
-  55:.\Generated_Source\PSoC5/BL.c **** #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-  56:.\Generated_Source\PSoC5/BL.c **** \r
-  57:.\Generated_Source\PSoC5/BL.c **** \r
-  58:.\Generated_Source\PSoC5/BL.c **** /***************************************\r
-  59:.\Generated_Source\PSoC5/BL.c **** *     Function Prototypes\r
-  60:.\Generated_Source\PSoC5/BL.c **** ***************************************/\r
-  61:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_WritePacket(uint8 status, uint8 buffer[], uint16 size) CYSMALL \\r
-  62:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  63:.\Generated_Source\PSoC5/BL.c **** \r
-  64:.\Generated_Source\PSoC5/BL.c **** static uint16   BL_CalcPacketChecksum(const uint8 buffer[], uint16 size) CYSMALL \\r
-  65:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  66:.\Generated_Source\PSoC5/BL.c **** \r
-  67:.\Generated_Source\PSoC5/BL.c **** static uint8    BL_Calc8BitFlashSum(uint32 start, uint32 size) CYSMALL \\r
-  68:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  69:.\Generated_Source\PSoC5/BL.c **** #if(!CY_PSOC4)\r
-  70:.\Generated_Source\PSoC5/BL.c **** static uint8    BL_Calc8BitEepromSum(uint32 start, uint32 size) CYSMALL \\r
-  71:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  72:.\Generated_Source\PSoC5/BL.c **** #endif /* (!CY_PSOC4) */\r
-  73:.\Generated_Source\PSoC5/BL.c **** \r
-  74:.\Generated_Source\PSoC5/BL.c **** static void     BL_HostLink(uint8 timeOut) \\r
-  75:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  76:.\Generated_Source\PSoC5/BL.c **** \r
-  77:.\Generated_Source\PSoC5/BL.c **** static void     BL_LaunchApplication(void) CYSMALL \\r
-  78:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  79:.\Generated_Source\PSoC5/BL.c **** \r
-  80:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
-  81:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  82:.\Generated_Source\PSoC5/BL.c **** \r
-  83:.\Generated_Source\PSoC5/BL.c **** static uint32   BL_GetMetadata(uint8 fieldName, uint8 appId)\\r
-  84:.\Generated_Source\PSoC5/BL.c ****                                     ;\r
-  85:.\Generated_Source\PSoC5/BL.c **** \r
-  86:.\Generated_Source\PSoC5/BL.c **** #if(!CY_PSOC3)\r
-  87:.\Generated_Source\PSoC5/BL.c ****     /* Implementation for the PSoC 3 resides in a BL_psoc3.a51 file.  */\r
-  88:.\Generated_Source\PSoC5/BL.c ****     static void     BL_LaunchBootloadable(uint32 appAddr);\r
-  89:.\Generated_Source\PSoC5/BL.c **** #endif  /* (!CY_PSOC3) */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 3\r
-\r
-\r
-  90:.\Generated_Source\PSoC5/BL.c **** \r
-  91:.\Generated_Source\PSoC5/BL.c **** \r
-  92:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-  93:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_CalcPacketChecksum\r
-  94:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
-  95:.\Generated_Source\PSoC5/BL.c **** *\r
-  96:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
-  97:.\Generated_Source\PSoC5/BL.c **** *  This computes the 16 bit checksum for the provided number of bytes contained\r
-  98:.\Generated_Source\PSoC5/BL.c **** *  in the provided buffer\r
-  99:.\Generated_Source\PSoC5/BL.c **** *\r
- 100:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 101:.\Generated_Source\PSoC5/BL.c **** *  buffer:\r
- 102:.\Generated_Source\PSoC5/BL.c **** *     The buffer containing the data to compute the checksum for\r
- 103:.\Generated_Source\PSoC5/BL.c **** *  size:\r
- 104:.\Generated_Source\PSoC5/BL.c **** *     The number of bytes in buffer to compute the checksum for\r
- 105:.\Generated_Source\PSoC5/BL.c **** *\r
- 106:.\Generated_Source\PSoC5/BL.c **** * Returns:\r
- 107:.\Generated_Source\PSoC5/BL.c **** *  16 bit checksum for the provided data\r
- 108:.\Generated_Source\PSoC5/BL.c **** *\r
- 109:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 110:.\Generated_Source\PSoC5/BL.c **** static uint16 BL_CalcPacketChecksum(const uint8 buffer[], uint16 size) \\r
- 111:.\Generated_Source\PSoC5/BL.c ****                     CYSMALL \r
- 112:.\Generated_Source\PSoC5/BL.c **** {\r
- 113:.\Generated_Source\PSoC5/BL.c ****     #if(0u != BL_PACKET_CHECKSUM_CRC)\r
- 114:.\Generated_Source\PSoC5/BL.c **** \r
- 115:.\Generated_Source\PSoC5/BL.c ****         uint16 CYDATA crc = BL_CRC_CCITT_INITIAL_VALUE;\r
- 116:.\Generated_Source\PSoC5/BL.c ****         uint16 CYDATA tmp;\r
- 117:.\Generated_Source\PSoC5/BL.c ****         uint8  CYDATA i;\r
- 118:.\Generated_Source\PSoC5/BL.c ****         uint16 CYDATA tmpIndex = size;\r
- 119:.\Generated_Source\PSoC5/BL.c **** \r
- 120:.\Generated_Source\PSoC5/BL.c ****         if(0u == size)\r
- 121:.\Generated_Source\PSoC5/BL.c ****         {\r
- 122:.\Generated_Source\PSoC5/BL.c ****             crc = ~crc;\r
- 123:.\Generated_Source\PSoC5/BL.c ****         }\r
- 124:.\Generated_Source\PSoC5/BL.c ****         else\r
- 125:.\Generated_Source\PSoC5/BL.c ****         {\r
- 126:.\Generated_Source\PSoC5/BL.c ****             do\r
- 127:.\Generated_Source\PSoC5/BL.c ****             {\r
- 128:.\Generated_Source\PSoC5/BL.c ****                 tmp = buffer[tmpIndex - size];\r
- 129:.\Generated_Source\PSoC5/BL.c **** \r
- 130:.\Generated_Source\PSoC5/BL.c ****                 for (i = 0u; i < 8u; i++)\r
- 131:.\Generated_Source\PSoC5/BL.c ****                 {\r
- 132:.\Generated_Source\PSoC5/BL.c ****                     if (0u != ((crc & 0x0001u) ^ (tmp & 0x0001u)))\r
- 133:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 134:.\Generated_Source\PSoC5/BL.c ****                         crc = (crc >> 1u) ^ BL_CRC_CCITT_POLYNOMIAL;\r
- 135:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 136:.\Generated_Source\PSoC5/BL.c ****                     else\r
- 137:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 138:.\Generated_Source\PSoC5/BL.c ****                         crc >>= 1u;\r
- 139:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 140:.\Generated_Source\PSoC5/BL.c **** \r
- 141:.\Generated_Source\PSoC5/BL.c ****                     tmp >>= 1u;\r
- 142:.\Generated_Source\PSoC5/BL.c ****                 }\r
- 143:.\Generated_Source\PSoC5/BL.c **** \r
- 144:.\Generated_Source\PSoC5/BL.c ****                 size--;\r
- 145:.\Generated_Source\PSoC5/BL.c ****             }\r
- 146:.\Generated_Source\PSoC5/BL.c ****             while(0u != size);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 4\r
-\r
-\r
- 147:.\Generated_Source\PSoC5/BL.c **** \r
- 148:.\Generated_Source\PSoC5/BL.c ****             crc = ~crc;\r
- 149:.\Generated_Source\PSoC5/BL.c ****             tmp = crc;\r
- 150:.\Generated_Source\PSoC5/BL.c ****             crc = ( uint16 )(crc << 8u) | (tmp >> 8u);\r
- 151:.\Generated_Source\PSoC5/BL.c ****         }\r
- 152:.\Generated_Source\PSoC5/BL.c **** \r
- 153:.\Generated_Source\PSoC5/BL.c ****         return(crc);\r
- 154:.\Generated_Source\PSoC5/BL.c **** \r
- 155:.\Generated_Source\PSoC5/BL.c ****     #else\r
- 156:.\Generated_Source\PSoC5/BL.c **** \r
- 157:.\Generated_Source\PSoC5/BL.c ****         uint16 CYDATA sum = 0u;\r
- 158:.\Generated_Source\PSoC5/BL.c **** \r
- 159:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 160:.\Generated_Source\PSoC5/BL.c ****         {\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 162:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 163:.\Generated_Source\PSoC5/BL.c ****         }\r
- 164:.\Generated_Source\PSoC5/BL.c **** \r
- 165:.\Generated_Source\PSoC5/BL.c ****         return(( uint16 )1u + ( uint16 )(~sum));\r
- 166:.\Generated_Source\PSoC5/BL.c **** \r
- 167:.\Generated_Source\PSoC5/BL.c ****     #endif /* (0u != BL_PACKET_CHECKSUM_CRC) */\r
- 168:.\Generated_Source\PSoC5/BL.c **** }\r
- 169:.\Generated_Source\PSoC5/BL.c **** \r
- 170:.\Generated_Source\PSoC5/BL.c **** \r
- 171:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 172:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_Calc8BitFlashSum\r
- 173:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 174:.\Generated_Source\PSoC5/BL.c **** *\r
- 175:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 176:.\Generated_Source\PSoC5/BL.c **** *  This computes the 8 bit sum for the provided number of bytes contained in\r
- 177:.\Generated_Source\PSoC5/BL.c **** *  flash.\r
- 178:.\Generated_Source\PSoC5/BL.c **** *\r
- 179:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 180:.\Generated_Source\PSoC5/BL.c **** *  start:\r
- 181:.\Generated_Source\PSoC5/BL.c **** *     The starting address to start summing data for\r
- 182:.\Generated_Source\PSoC5/BL.c **** *  size:\r
- 183:.\Generated_Source\PSoC5/BL.c **** *     The number of bytes to read and compute the sum for\r
- 184:.\Generated_Source\PSoC5/BL.c **** *\r
- 185:.\Generated_Source\PSoC5/BL.c **** * Returns:\r
- 186:.\Generated_Source\PSoC5/BL.c **** *   8 bit sum for the provided data\r
- 187:.\Generated_Source\PSoC5/BL.c **** *\r
- 188:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 189:.\Generated_Source\PSoC5/BL.c **** static uint8 BL_Calc8BitFlashSum(uint32 start, uint32 size) \\r
- 190:.\Generated_Source\PSoC5/BL.c ****                 CYSMALL \r
- 191:.\Generated_Source\PSoC5/BL.c **** {\r
- 192:.\Generated_Source\PSoC5/BL.c ****     uint8 CYDATA sum = 0u;\r
- 193:.\Generated_Source\PSoC5/BL.c **** \r
- 194:.\Generated_Source\PSoC5/BL.c ****     while (size > 0u)\r
- 195:.\Generated_Source\PSoC5/BL.c ****     {\r
- 196:.\Generated_Source\PSoC5/BL.c ****         size--;\r
- 197:.\Generated_Source\PSoC5/BL.c ****         sum += BL_GET_CODE_BYTE(start + size);\r
- 198:.\Generated_Source\PSoC5/BL.c ****     }\r
- 199:.\Generated_Source\PSoC5/BL.c **** \r
- 200:.\Generated_Source\PSoC5/BL.c ****     return(sum);\r
- 201:.\Generated_Source\PSoC5/BL.c **** }\r
- 202:.\Generated_Source\PSoC5/BL.c **** \r
- 203:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 5\r
-\r
-\r
- 204:.\Generated_Source\PSoC5/BL.c **** #if(!CY_PSOC4)\r
- 205:.\Generated_Source\PSoC5/BL.c **** \r
- 206:.\Generated_Source\PSoC5/BL.c ****     /*******************************************************************************\r
- 207:.\Generated_Source\PSoC5/BL.c ****     * Function Name: BL_Calc8BitEepromSum\r
- 208:.\Generated_Source\PSoC5/BL.c ****     ********************************************************************************\r
- 209:.\Generated_Source\PSoC5/BL.c ****     *\r
- 210:.\Generated_Source\PSoC5/BL.c ****     * Summary:\r
- 211:.\Generated_Source\PSoC5/BL.c ****     *  This computes the 8 bit sum for the provided number of bytes contained in\r
- 212:.\Generated_Source\PSoC5/BL.c ****     *  EEPROM.\r
- 213:.\Generated_Source\PSoC5/BL.c ****     *\r
- 214:.\Generated_Source\PSoC5/BL.c ****     * Parameters:\r
- 215:.\Generated_Source\PSoC5/BL.c ****     *  start:\r
- 216:.\Generated_Source\PSoC5/BL.c ****     *     The starting address to start summing data for\r
- 217:.\Generated_Source\PSoC5/BL.c ****     *  size:\r
- 218:.\Generated_Source\PSoC5/BL.c ****     *     The number of bytes to read and compute the sum for\r
- 219:.\Generated_Source\PSoC5/BL.c ****     *\r
- 220:.\Generated_Source\PSoC5/BL.c ****     * Returns:\r
- 221:.\Generated_Source\PSoC5/BL.c ****     *   8 bit sum for the provided data\r
- 222:.\Generated_Source\PSoC5/BL.c ****     *\r
- 223:.\Generated_Source\PSoC5/BL.c ****     *******************************************************************************/\r
- 224:.\Generated_Source\PSoC5/BL.c ****     static uint8 BL_Calc8BitEepromSum(uint32 start, uint32 size) \\r
- 225:.\Generated_Source\PSoC5/BL.c ****                     CYSMALL \r
- 226:.\Generated_Source\PSoC5/BL.c ****     {\r
- 227:.\Generated_Source\PSoC5/BL.c ****         uint8 CYDATA sum = 0u;\r
- 228:.\Generated_Source\PSoC5/BL.c **** \r
- 229:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 230:.\Generated_Source\PSoC5/BL.c ****         {\r
- 231:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 232:.\Generated_Source\PSoC5/BL.c ****             sum += BL_GET_EEPROM_BYTE(start + size);\r
- 233:.\Generated_Source\PSoC5/BL.c ****         }\r
- 234:.\Generated_Source\PSoC5/BL.c **** \r
- 235:.\Generated_Source\PSoC5/BL.c ****         return(sum);\r
- 236:.\Generated_Source\PSoC5/BL.c ****     }\r
- 237:.\Generated_Source\PSoC5/BL.c **** \r
- 238:.\Generated_Source\PSoC5/BL.c **** #endif  /* (!CY_PSOC4) */\r
- 239:.\Generated_Source\PSoC5/BL.c **** \r
- 240:.\Generated_Source\PSoC5/BL.c **** \r
- 241:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 242:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_Start\r
- 243:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 244:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 245:.\Generated_Source\PSoC5/BL.c **** *  This function is called in order executing following algorithm:\r
- 246:.\Generated_Source\PSoC5/BL.c **** *\r
- 247:.\Generated_Source\PSoC5/BL.c **** *  - Identify active bootloadable application (applicable only to\r
- 248:.\Generated_Source\PSoC5/BL.c **** *    Multi-application bootloader)\r
- 249:.\Generated_Source\PSoC5/BL.c **** *\r
- 250:.\Generated_Source\PSoC5/BL.c **** *  - Validate bootloader application (desing-time configurable, Bootloader\r
- 251:.\Generated_Source\PSoC5/BL.c **** *    application validation option of the component customizer)\r
- 252:.\Generated_Source\PSoC5/BL.c **** *\r
- 253:.\Generated_Source\PSoC5/BL.c **** *  - Validate active bootloadable application\r
- 254:.\Generated_Source\PSoC5/BL.c **** *\r
- 255:.\Generated_Source\PSoC5/BL.c **** *  - Run communication subroutine (desing-time configurable, Wait for command\r
- 256:.\Generated_Source\PSoC5/BL.c **** *    option of the component customizer)\r
- 257:.\Generated_Source\PSoC5/BL.c **** *\r
- 258:.\Generated_Source\PSoC5/BL.c **** *  - Schedule bootloadable and reset device\r
- 259:.\Generated_Source\PSoC5/BL.c **** *\r
- 260:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 6\r
-\r
-\r
- 261:.\Generated_Source\PSoC5/BL.c **** *  None\r
- 262:.\Generated_Source\PSoC5/BL.c **** *\r
- 263:.\Generated_Source\PSoC5/BL.c **** * Return:\r
- 264:.\Generated_Source\PSoC5/BL.c **** *  This method will never return. It will either load a new application and\r
- 265:.\Generated_Source\PSoC5/BL.c **** *  reset the device or it will jump directly to the existing application.\r
- 266:.\Generated_Source\PSoC5/BL.c **** *\r
- 267:.\Generated_Source\PSoC5/BL.c **** * Side Effects:\r
- 268:.\Generated_Source\PSoC5/BL.c **** *  If this method determines that the bootloader appliation itself is corrupt,\r
- 269:.\Generated_Source\PSoC5/BL.c **** *  this method will not return, instead it will simply hang the application.\r
- 270:.\Generated_Source\PSoC5/BL.c **** *\r
- 271:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 272:.\Generated_Source\PSoC5/BL.c **** void BL_Start(void) CYSMALL \r
- 273:.\Generated_Source\PSoC5/BL.c **** {\r
- 274:.\Generated_Source\PSoC5/BL.c ****     #if(0u != BL_BOOTLOADER_APP_VALIDATION)\r
- 275:.\Generated_Source\PSoC5/BL.c ****         uint8 CYDATA calcedChecksum;\r
- 276:.\Generated_Source\PSoC5/BL.c ****     #endif    /* (0u != BL_BOOTLOADER_APP_VALIDATION) */\r
- 277:.\Generated_Source\PSoC5/BL.c **** \r
- 278:.\Generated_Source\PSoC5/BL.c ****     #if(!CY_PSOC4)\r
- 279:.\Generated_Source\PSoC5/BL.c ****         uint8 CYXDATA BL_flashBuffer[BL_FROW_SIZE];\r
- 280:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (!CY_PSOC4) */\r
- 281:.\Generated_Source\PSoC5/BL.c **** \r
- 282:.\Generated_Source\PSoC5/BL.c ****     cystatus tmpStatus;\r
- 283:.\Generated_Source\PSoC5/BL.c **** \r
- 284:.\Generated_Source\PSoC5/BL.c **** \r
- 285:.\Generated_Source\PSoC5/BL.c ****     /* Identify active bootloadable application */\r
- 286:.\Generated_Source\PSoC5/BL.c ****     #if(0u != BL_DUAL_APP_BOOTLOADER)\r
- 287:.\Generated_Source\PSoC5/BL.c **** \r
- 288:.\Generated_Source\PSoC5/BL.c ****         if(BL_MD_BTLDB_ACTIVE_VALUE(0u) == BL_MD_BTLDB_IS_ACTIVE)\r
- 289:.\Generated_Source\PSoC5/BL.c ****         {\r
- 290:.\Generated_Source\PSoC5/BL.c ****             BL_activeApp = BL_MD_BTLDB_ACTIVE_0;\r
- 291:.\Generated_Source\PSoC5/BL.c ****         }\r
- 292:.\Generated_Source\PSoC5/BL.c ****         else if (BL_MD_BTLDB_ACTIVE_VALUE(1u) == BL_MD_BTLDB_IS_ACTIVE)\r
- 293:.\Generated_Source\PSoC5/BL.c ****         {\r
- 294:.\Generated_Source\PSoC5/BL.c ****             BL_activeApp = BL_MD_BTLDB_ACTIVE_1;\r
- 295:.\Generated_Source\PSoC5/BL.c ****         }\r
- 296:.\Generated_Source\PSoC5/BL.c ****         else\r
- 297:.\Generated_Source\PSoC5/BL.c ****         {\r
- 298:.\Generated_Source\PSoC5/BL.c ****             BL_activeApp = BL_MD_BTLDB_ACTIVE_NONE;\r
- 299:.\Generated_Source\PSoC5/BL.c ****         }\r
- 300:.\Generated_Source\PSoC5/BL.c **** \r
- 301:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
- 302:.\Generated_Source\PSoC5/BL.c **** \r
- 303:.\Generated_Source\PSoC5/BL.c **** \r
- 304:.\Generated_Source\PSoC5/BL.c ****     /* Initialize Flash subsystem for non-PSoC 4 devices */\r
- 305:.\Generated_Source\PSoC5/BL.c ****     #if(!CY_PSOC4)\r
- 306:.\Generated_Source\PSoC5/BL.c ****         if (CYRET_SUCCESS != CySetTemp())\r
- 307:.\Generated_Source\PSoC5/BL.c ****         {\r
- 308:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 309:.\Generated_Source\PSoC5/BL.c ****         }\r
- 310:.\Generated_Source\PSoC5/BL.c **** \r
- 311:.\Generated_Source\PSoC5/BL.c ****         if (CYRET_SUCCESS != CySetFlashEEBuffer(BL_flashBuffer))\r
- 312:.\Generated_Source\PSoC5/BL.c ****         {\r
- 313:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 314:.\Generated_Source\PSoC5/BL.c ****         }\r
- 315:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (CY_PSOC4) */\r
- 316:.\Generated_Source\PSoC5/BL.c **** \r
- 317:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 7\r
-\r
-\r
- 318:.\Generated_Source\PSoC5/BL.c ****     /***********************************************************************\r
- 319:.\Generated_Source\PSoC5/BL.c ****     * Bootloader Application Validation\r
- 320:.\Generated_Source\PSoC5/BL.c ****     *\r
- 321:.\Generated_Source\PSoC5/BL.c ****     * Halt device if:\r
- 322:.\Generated_Source\PSoC5/BL.c ****     *  - Calculated checksum does not much one stored in metadata section\r
- 323:.\Generated_Source\PSoC5/BL.c ****     *  - Invalid pointer to the place where bootloader application ends\r
- 324:.\Generated_Source\PSoC5/BL.c ****     *  - Flash subsystem where not initialized correctly\r
- 325:.\Generated_Source\PSoC5/BL.c ****     ***********************************************************************/\r
- 326:.\Generated_Source\PSoC5/BL.c ****     #if(0u != BL_BOOTLOADER_APP_VALIDATION)\r
- 327:.\Generated_Source\PSoC5/BL.c **** \r
- 328:.\Generated_Source\PSoC5/BL.c ****         /* Calculate Bootloader application checksum */\r
- 329:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = BL_Calc8BitFlashSum(BL_MD_BTLDR_ADDR_PTR,\r
- 330:.\Generated_Source\PSoC5/BL.c ****                 *BL_SizeBytesAccess - BL_MD_BTLDR_ADDR_PTR);\r
- 331:.\Generated_Source\PSoC5/BL.c **** \r
- 332:.\Generated_Source\PSoC5/BL.c ****         /* we actually included the checksum, so remove it */\r
- 333:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum -= *BL_ChecksumAccess;\r
- 334:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
- 335:.\Generated_Source\PSoC5/BL.c **** \r
- 336:.\Generated_Source\PSoC5/BL.c ****         /* Checksum and pointer to bootloader verification */\r
- 337:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != *BL_ChecksumAccess) ||\r
- 338:.\Generated_Source\PSoC5/BL.c ****            (0u == *BL_SizeBytesAccess))\r
- 339:.\Generated_Source\PSoC5/BL.c ****         {\r
- 340:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 341:.\Generated_Source\PSoC5/BL.c ****         }\r
- 342:.\Generated_Source\PSoC5/BL.c **** \r
- 343:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (0u != BL_BOOTLOADER_APP_VALIDATION) */\r
- 344:.\Generated_Source\PSoC5/BL.c **** \r
- 345:.\Generated_Source\PSoC5/BL.c **** \r
- 346:.\Generated_Source\PSoC5/BL.c ****     /***********************************************************************\r
- 347:.\Generated_Source\PSoC5/BL.c ****     * Active Bootloadable Application Validation\r
- 348:.\Generated_Source\PSoC5/BL.c ****     *\r
- 349:.\Generated_Source\PSoC5/BL.c ****     * If active bootloadable application is invalid or bootloader\r
- 350:.\Generated_Source\PSoC5/BL.c ****     * application is scheduled - do the following:\r
- 351:.\Generated_Source\PSoC5/BL.c ****     *  - schedule bootloader application to be run after software reset\r
- 352:.\Generated_Source\PSoC5/BL.c ****     *  - Go to the communication subroutine. Will wait for commands forever\r
- 353:.\Generated_Source\PSoC5/BL.c ****     ***********************************************************************/\r
- 354:.\Generated_Source\PSoC5/BL.c ****     tmpStatus = BL_ValidateBootloadable(BL_activeApp);\r
- 355:.\Generated_Source\PSoC5/BL.c **** \r
- 356:.\Generated_Source\PSoC5/BL.c ****     if ((BL_GET_RUN_TYPE == BL_START_BTLDR) ||\r
- 357:.\Generated_Source\PSoC5/BL.c ****         (CYRET_SUCCESS != tmpStatus))\r
- 358:.\Generated_Source\PSoC5/BL.c ****     {\r
- 359:.\Generated_Source\PSoC5/BL.c ****         BL_SET_RUN_TYPE(0u);\r
- 360:.\Generated_Source\PSoC5/BL.c **** \r
- 361:.\Generated_Source\PSoC5/BL.c ****         BL_HostLink(BL_WAIT_FOR_COMMAND_FOREVER);\r
- 362:.\Generated_Source\PSoC5/BL.c ****     }\r
- 363:.\Generated_Source\PSoC5/BL.c **** \r
- 364:.\Generated_Source\PSoC5/BL.c **** \r
- 365:.\Generated_Source\PSoC5/BL.c ****     /* Go to the communication subroutine. Will wait for commands specifed time */\r
- 366:.\Generated_Source\PSoC5/BL.c ****     #if(0u != BL_WAIT_FOR_COMMAND)\r
- 367:.\Generated_Source\PSoC5/BL.c **** \r
- 368:.\Generated_Source\PSoC5/BL.c ****         /* Timeout is in 100s of miliseconds */\r
- 369:.\Generated_Source\PSoC5/BL.c ****         BL_HostLink(BL_WAIT_FOR_COMMAND_TIME);\r
- 370:.\Generated_Source\PSoC5/BL.c **** \r
- 371:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (0u != BL_WAIT_FOR_COMMAND) */\r
- 372:.\Generated_Source\PSoC5/BL.c **** \r
- 373:.\Generated_Source\PSoC5/BL.c **** \r
- 374:.\Generated_Source\PSoC5/BL.c ****     /* Schedule bootloadable application and perform software reset */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 8\r
-\r
-\r
- 375:.\Generated_Source\PSoC5/BL.c ****     BL_LaunchApplication();\r
- 376:.\Generated_Source\PSoC5/BL.c **** }\r
- 377:.\Generated_Source\PSoC5/BL.c **** \r
- 378:.\Generated_Source\PSoC5/BL.c **** \r
- 379:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 380:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_LaunchApplication\r
- 381:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 382:.\Generated_Source\PSoC5/BL.c **** *\r
- 383:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 384:.\Generated_Source\PSoC5/BL.c **** *  Jumps the PC to the start address of the user application in flash.\r
- 385:.\Generated_Source\PSoC5/BL.c **** *\r
- 386:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 387:.\Generated_Source\PSoC5/BL.c **** *  None\r
- 388:.\Generated_Source\PSoC5/BL.c **** *\r
- 389:.\Generated_Source\PSoC5/BL.c **** * Returns:\r
- 390:.\Generated_Source\PSoC5/BL.c **** *  This method will never return if it succesfully goes to the user application.\r
- 391:.\Generated_Source\PSoC5/BL.c **** *\r
- 392:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 393:.\Generated_Source\PSoC5/BL.c **** static void BL_LaunchApplication(void) CYSMALL \r
- 394:.\Generated_Source\PSoC5/BL.c **** {\r
- 395:.\Generated_Source\PSoC5/BL.c ****     /* Schedule Bootloadable to start after reset */\r
- 396:.\Generated_Source\PSoC5/BL.c ****     BL_SET_RUN_TYPE(BL_START_APP);\r
- 397:.\Generated_Source\PSoC5/BL.c **** \r
- 398:.\Generated_Source\PSoC5/BL.c ****     CySoftwareReset();\r
- 399:.\Generated_Source\PSoC5/BL.c **** }\r
- 400:.\Generated_Source\PSoC5/BL.c **** \r
- 401:.\Generated_Source\PSoC5/BL.c **** \r
- 402:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 403:.\Generated_Source\PSoC5/BL.c **** * Function Name: CyBtldr_CheckLaunch\r
- 404:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 405:.\Generated_Source\PSoC5/BL.c **** *\r
- 406:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 407:.\Generated_Source\PSoC5/BL.c **** *  This routine checks to see if the bootloader or the bootloadable application\r
- 408:.\Generated_Source\PSoC5/BL.c **** *  should be run.  If the application is to be run, it will start executing.\r
- 409:.\Generated_Source\PSoC5/BL.c **** *  If the bootloader is to be run, it will return so the bootloader can\r
- 410:.\Generated_Source\PSoC5/BL.c **** *  continue starting up.\r
- 411:.\Generated_Source\PSoC5/BL.c **** *\r
- 412:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 413:.\Generated_Source\PSoC5/BL.c **** *  None\r
- 414:.\Generated_Source\PSoC5/BL.c **** *\r
- 415:.\Generated_Source\PSoC5/BL.c **** * Returns:\r
- 416:.\Generated_Source\PSoC5/BL.c **** *  None\r
- 417:.\Generated_Source\PSoC5/BL.c **** *\r
- 418:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 419:.\Generated_Source\PSoC5/BL.c **** void CyBtldr_CheckLaunch(void) CYSMALL \r
- 420:.\Generated_Source\PSoC5/BL.c **** {\r
- 421:.\Generated_Source\PSoC5/BL.c **** \r
- 422:.\Generated_Source\PSoC5/BL.c **** #if(CY_PSOC4)\r
- 423:.\Generated_Source\PSoC5/BL.c **** \r
- 424:.\Generated_Source\PSoC5/BL.c ****     /*******************************************************************************\r
- 425:.\Generated_Source\PSoC5/BL.c ****     * Set cyBtldrRunType to zero in case of non-software reset occured. This means\r
- 426:.\Generated_Source\PSoC5/BL.c ****     * that bootloader application is scheduled - that is initial clean state. The\r
- 427:.\Generated_Source\PSoC5/BL.c ****     * value of cyBtldrRunType is valid only in case of software reset.\r
- 428:.\Generated_Source\PSoC5/BL.c ****     *******************************************************************************/\r
- 429:.\Generated_Source\PSoC5/BL.c ****     if (0u == (BL_RES_CAUSE_REG & BL_RES_CAUSE_RESET_SOFT))\r
- 430:.\Generated_Source\PSoC5/BL.c ****     {\r
- 431:.\Generated_Source\PSoC5/BL.c ****         cyBtldrRunType = 0u;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 9\r
-\r
-\r
- 432:.\Generated_Source\PSoC5/BL.c ****     }\r
- 433:.\Generated_Source\PSoC5/BL.c **** \r
- 434:.\Generated_Source\PSoC5/BL.c **** #endif /* (CY_PSOC4) */\r
- 435:.\Generated_Source\PSoC5/BL.c **** \r
- 436:.\Generated_Source\PSoC5/BL.c **** \r
- 437:.\Generated_Source\PSoC5/BL.c ****     if (BL_GET_RUN_TYPE == BL_START_APP)\r
- 438:.\Generated_Source\PSoC5/BL.c ****     {\r
- 439:.\Generated_Source\PSoC5/BL.c ****         BL_SET_RUN_TYPE(0u);\r
- 440:.\Generated_Source\PSoC5/BL.c **** \r
- 441:.\Generated_Source\PSoC5/BL.c ****         /*******************************************************************************\r
- 442:.\Generated_Source\PSoC5/BL.c ****         * Indicates that we have told ourselves to jump to the application since we have\r
- 443:.\Generated_Source\PSoC5/BL.c ****         * already told ourselves to jump, we do not do any expensive verification of the\r
- 444:.\Generated_Source\PSoC5/BL.c ****         * application. We just check to make sure that the value at CY_APP_ADDR_ADDRESS\r
- 445:.\Generated_Source\PSoC5/BL.c ****         * is something other than 0.\r
- 446:.\Generated_Source\PSoC5/BL.c ****         *******************************************************************************/\r
- 447:.\Generated_Source\PSoC5/BL.c ****         if(0u != BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR, BL_activeApp))\r
- 448:.\Generated_Source\PSoC5/BL.c ****         {\r
- 449:.\Generated_Source\PSoC5/BL.c ****             /* Never return from this method */\r
- 450:.\Generated_Source\PSoC5/BL.c ****             BL_LaunchBootloadable(BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR,\r
- 451:.\Generated_Source\PSoC5/BL.c ****                                                                              BL_activeApp));\r
- 452:.\Generated_Source\PSoC5/BL.c ****         }\r
- 453:.\Generated_Source\PSoC5/BL.c ****     }\r
- 454:.\Generated_Source\PSoC5/BL.c **** }\r
- 455:.\Generated_Source\PSoC5/BL.c **** \r
- 456:.\Generated_Source\PSoC5/BL.c **** \r
- 457:.\Generated_Source\PSoC5/BL.c **** /* Moves the arguement appAddr (RO) into PC, moving execution to the appAddr */\r
- 458:.\Generated_Source\PSoC5/BL.c **** #if defined (__ARMCC_VERSION)\r
- 459:.\Generated_Source\PSoC5/BL.c **** \r
- 460:.\Generated_Source\PSoC5/BL.c ****     __asm static void BL_LaunchBootloadable(uint32 appAddr)\r
- 461:.\Generated_Source\PSoC5/BL.c ****     {\r
- 462:.\Generated_Source\PSoC5/BL.c ****         BX  R0\r
- 463:.\Generated_Source\PSoC5/BL.c ****         ALIGN\r
- 464:.\Generated_Source\PSoC5/BL.c ****     }\r
- 465:.\Generated_Source\PSoC5/BL.c **** \r
- 466:.\Generated_Source\PSoC5/BL.c **** #elif defined(__GNUC__)\r
- 467:.\Generated_Source\PSoC5/BL.c **** \r
- 468:.\Generated_Source\PSoC5/BL.c ****     __attribute__((noinline)) /* Workaround for GCC toolchain bug with inlining */\r
- 469:.\Generated_Source\PSoC5/BL.c ****     __attribute__((naked))\r
- 470:.\Generated_Source\PSoC5/BL.c ****     static void BL_LaunchBootloadable(uint32 appAddr)\r
- 471:.\Generated_Source\PSoC5/BL.c ****     {\r
-  26                           .loc 1 471 0\r
-  27                           .cfi_startproc\r
-  28                           @ Naked Function: prologue and epilogue provided by programmer.\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                   .LVL0:\r
- 472:.\Generated_Source\PSoC5/BL.c ****         __asm volatile("    BX  R0\n");\r
-  32                           .loc 1 472 0\r
-  33                   @ 472 ".\Generated_Source\PSoC5\BL.c" 1\r
-  34 0000 0047                     BX  R0\r
-  35                   \r
-  36                   @ 0 "" 2\r
- 473:.\Generated_Source\PSoC5/BL.c ****     }\r
-  37                           .loc 1 473 0\r
-  38                           .thumb\r
-  39                           .cfi_endproc\r
-  40                   .LFE62:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 10\r
-\r
-\r
-  41                           .size   BL_LaunchBootloadable, .-BL_LaunchBootloadable\r
-  42                           .section        .text.BL_GetMetadata.constprop.1,"ax",%progbits\r
-  43                           .align  1\r
-  44                           .thumb\r
-  45                           .thumb_func\r
-  46                           .type   BL_GetMetadata.constprop.1, %function\r
-  47                   BL_GetMetadata.constprop.1:\r
-  48                   .LFB69:\r
- 474:.\Generated_Source\PSoC5/BL.c **** \r
- 475:.\Generated_Source\PSoC5/BL.c **** #elif defined (__ICCARM__)\r
- 476:.\Generated_Source\PSoC5/BL.c **** \r
- 477:.\Generated_Source\PSoC5/BL.c ****     static void BL_LaunchBootloadable(uint32 appAddr)\r
- 478:.\Generated_Source\PSoC5/BL.c ****     {\r
- 479:.\Generated_Source\PSoC5/BL.c ****         __asm volatile("    BX  R0\n");\r
- 480:.\Generated_Source\PSoC5/BL.c ****     }\r
- 481:.\Generated_Source\PSoC5/BL.c **** \r
- 482:.\Generated_Source\PSoC5/BL.c **** #endif  /* (__ARMCC_VERSION) */\r
- 483:.\Generated_Source\PSoC5/BL.c **** \r
- 484:.\Generated_Source\PSoC5/BL.c **** \r
- 485:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 486:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_ValidateBootloadable\r
- 487:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 488:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 489:.\Generated_Source\PSoC5/BL.c **** *  This routine computes the checksum, zero check, 0xFF check of the\r
- 490:.\Generated_Source\PSoC5/BL.c **** *  application area to determine whether a valid application is loaded.\r
- 491:.\Generated_Source\PSoC5/BL.c **** *\r
- 492:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 493:.\Generated_Source\PSoC5/BL.c **** *  appId:\r
- 494:.\Generated_Source\PSoC5/BL.c **** *      The application number to verify\r
- 495:.\Generated_Source\PSoC5/BL.c **** *\r
- 496:.\Generated_Source\PSoC5/BL.c **** * Returns:\r
- 497:.\Generated_Source\PSoC5/BL.c **** *  CYRET_SUCCESS  - if successful\r
- 498:.\Generated_Source\PSoC5/BL.c **** *  CYRET_BAD_DATA - if the bootloadable is corrupt\r
- 499:.\Generated_Source\PSoC5/BL.c **** *\r
- 500:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 501:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
- 502:.\Generated_Source\PSoC5/BL.c **** \r
- 503:.\Generated_Source\PSoC5/BL.c ****     {\r
- 504:.\Generated_Source\PSoC5/BL.c ****         uint32 CYDATA idx;\r
- 505:.\Generated_Source\PSoC5/BL.c **** \r
- 506:.\Generated_Source\PSoC5/BL.c ****         uint32 CYDATA end   = BL_FIRST_APP_BYTE(appId) +\r
- 507:.\Generated_Source\PSoC5/BL.c ****                                 BL_GetMetadata(BL_GET_METADATA_BTLDB_LENGTH,\r
- 508:.\Generated_Source\PSoC5/BL.c ****                                                        appId);\r
- 509:.\Generated_Source\PSoC5/BL.c **** \r
- 510:.\Generated_Source\PSoC5/BL.c ****         CYBIT         valid = 0u; /* Assume bad flash image */\r
- 511:.\Generated_Source\PSoC5/BL.c ****         uint8  CYDATA calcedChecksum = 0u;\r
- 512:.\Generated_Source\PSoC5/BL.c **** \r
- 513:.\Generated_Source\PSoC5/BL.c **** \r
- 514:.\Generated_Source\PSoC5/BL.c ****         #if(0u != BL_DUAL_APP_BOOTLOADER)\r
- 515:.\Generated_Source\PSoC5/BL.c **** \r
- 516:.\Generated_Source\PSoC5/BL.c ****             if(appId > 1u)\r
- 517:.\Generated_Source\PSoC5/BL.c ****             {\r
- 518:.\Generated_Source\PSoC5/BL.c ****                 return(CYRET_BAD_DATA);\r
- 519:.\Generated_Source\PSoC5/BL.c ****             }\r
- 520:.\Generated_Source\PSoC5/BL.c **** \r
- 521:.\Generated_Source\PSoC5/BL.c ****         #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
- 522:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 11\r
-\r
-\r
- 523:.\Generated_Source\PSoC5/BL.c **** \r
- 524:.\Generated_Source\PSoC5/BL.c ****         #if(0u != BL_FAST_APP_VALIDATION)\r
- 525:.\Generated_Source\PSoC5/BL.c **** \r
- 526:.\Generated_Source\PSoC5/BL.c ****             if(BL_MD_BTLDB_VERIFIED_VALUE(appId) == BL_MD_BTLDB_IS_VERIFIED)\r
- 527:.\Generated_Source\PSoC5/BL.c ****             {\r
- 528:.\Generated_Source\PSoC5/BL.c ****                 return(CYRET_SUCCESS);\r
- 529:.\Generated_Source\PSoC5/BL.c ****             }\r
- 530:.\Generated_Source\PSoC5/BL.c **** \r
- 531:.\Generated_Source\PSoC5/BL.c ****         #endif  /* (0u != BL_FAST_APP_VALIDATION) */\r
- 532:.\Generated_Source\PSoC5/BL.c **** \r
- 533:.\Generated_Source\PSoC5/BL.c **** \r
- 534:.\Generated_Source\PSoC5/BL.c ****         /* Calculate checksum of bootloadable image */\r
- 535:.\Generated_Source\PSoC5/BL.c ****         for(idx = BL_FIRST_APP_BYTE(appId); idx < end; ++idx)\r
- 536:.\Generated_Source\PSoC5/BL.c ****         {\r
- 537:.\Generated_Source\PSoC5/BL.c ****             uint8 CYDATA curByte = BL_GET_CODE_BYTE(idx);\r
- 538:.\Generated_Source\PSoC5/BL.c **** \r
- 539:.\Generated_Source\PSoC5/BL.c ****             if((curByte != 0u) && (curByte != 0xFFu))\r
- 540:.\Generated_Source\PSoC5/BL.c ****             {\r
- 541:.\Generated_Source\PSoC5/BL.c ****                 valid = 1u;\r
- 542:.\Generated_Source\PSoC5/BL.c ****             }\r
- 543:.\Generated_Source\PSoC5/BL.c **** \r
- 544:.\Generated_Source\PSoC5/BL.c ****             calcedChecksum += curByte;\r
- 545:.\Generated_Source\PSoC5/BL.c ****         }\r
- 546:.\Generated_Source\PSoC5/BL.c **** \r
- 547:.\Generated_Source\PSoC5/BL.c **** \r
- 548:.\Generated_Source\PSoC5/BL.c ****         /***************************************************************************\r
- 549:.\Generated_Source\PSoC5/BL.c ****         * We do not compute checksum over the meta data section, so no need to\r
- 550:.\Generated_Source\PSoC5/BL.c ****         * subtract off App Verified or App Active information here like we do when\r
- 551:.\Generated_Source\PSoC5/BL.c ****         * verifying a row.\r
- 552:.\Generated_Source\PSoC5/BL.c ****         ***************************************************************************/\r
- 553:.\Generated_Source\PSoC5/BL.c **** \r
- 554:.\Generated_Source\PSoC5/BL.c **** \r
- 555:.\Generated_Source\PSoC5/BL.c ****         #if((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u))\r
- 556:.\Generated_Source\PSoC5/BL.c **** \r
- 557:.\Generated_Source\PSoC5/BL.c ****             /* Add ECC data to checksum */\r
- 558:.\Generated_Source\PSoC5/BL.c ****             idx = ((BL_FIRST_APP_BYTE(appId)) >> 3u);\r
- 559:.\Generated_Source\PSoC5/BL.c **** \r
- 560:.\Generated_Source\PSoC5/BL.c ****             /* Flash may run into meta data, ECC does not so use full row */\r
- 561:.\Generated_Source\PSoC5/BL.c ****             end = (end == (CY_FLASH_SIZE - BL_MD_SIZEOF))\r
- 562:.\Generated_Source\PSoC5/BL.c ****                 ? (CY_FLASH_SIZE >> 3u)\r
- 563:.\Generated_Source\PSoC5/BL.c ****                 : (end >> 3u);\r
- 564:.\Generated_Source\PSoC5/BL.c **** \r
- 565:.\Generated_Source\PSoC5/BL.c ****             for (; idx < end; ++idx)\r
- 566:.\Generated_Source\PSoC5/BL.c ****             {\r
- 567:.\Generated_Source\PSoC5/BL.c ****                 calcedChecksum += CY_GET_XTND_REG8((volatile uint8 *)(CYDEV_ECC_BASE + idx));\r
- 568:.\Generated_Source\PSoC5/BL.c ****             }\r
- 569:.\Generated_Source\PSoC5/BL.c **** \r
- 570:.\Generated_Source\PSoC5/BL.c ****         #endif  /* ((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u)) */\r
- 571:.\Generated_Source\PSoC5/BL.c **** \r
- 572:.\Generated_Source\PSoC5/BL.c **** \r
- 573:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
- 574:.\Generated_Source\PSoC5/BL.c **** \r
- 575:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != BL_MD_BTLDB_CHECKSUM_VALUE(appId)) ||\r
- 576:.\Generated_Source\PSoC5/BL.c ****            (0u == valid))\r
- 577:.\Generated_Source\PSoC5/BL.c ****         {\r
- 578:.\Generated_Source\PSoC5/BL.c ****             return(CYRET_BAD_DATA);\r
- 579:.\Generated_Source\PSoC5/BL.c ****         }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 12\r
-\r
-\r
- 580:.\Generated_Source\PSoC5/BL.c **** \r
- 581:.\Generated_Source\PSoC5/BL.c **** \r
- 582:.\Generated_Source\PSoC5/BL.c ****         #if(0u != BL_FAST_APP_VALIDATION)\r
- 583:.\Generated_Source\PSoC5/BL.c ****             BL_SetFlashByte((uint32) BL_MD_BTLDB_VERIFIED_OFFSET(appId),\r
- 584:.\Generated_Source\PSoC5/BL.c ****                                           BL_MD_BTLDB_IS_VERIFIED);\r
- 585:.\Generated_Source\PSoC5/BL.c ****         #endif  /* (0u != BL_FAST_APP_VALIDATION) */\r
- 586:.\Generated_Source\PSoC5/BL.c **** \r
- 587:.\Generated_Source\PSoC5/BL.c **** \r
- 588:.\Generated_Source\PSoC5/BL.c ****         return(CYRET_SUCCESS);\r
- 589:.\Generated_Source\PSoC5/BL.c **** }\r
- 590:.\Generated_Source\PSoC5/BL.c **** \r
- 591:.\Generated_Source\PSoC5/BL.c **** \r
- 592:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
- 593:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_HostLink\r
- 594:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
- 595:.\Generated_Source\PSoC5/BL.c **** *\r
- 596:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
- 597:.\Generated_Source\PSoC5/BL.c **** *  Causes the bootloader to attempt to read data being transmitted by the\r
- 598:.\Generated_Source\PSoC5/BL.c **** *  host application.  If data is sent from the host, this establishes the\r
- 599:.\Generated_Source\PSoC5/BL.c **** *  communication interface to process all requests.\r
- 600:.\Generated_Source\PSoC5/BL.c **** *\r
- 601:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
- 602:.\Generated_Source\PSoC5/BL.c **** *  timeOut:\r
- 603:.\Generated_Source\PSoC5/BL.c **** *   The amount of time to listen for data before giving up. Timeout is\r
- 604:.\Generated_Source\PSoC5/BL.c **** *   measured in 10s of ms.  Use 0 for infinite wait.\r
- 605:.\Generated_Source\PSoC5/BL.c **** *\r
- 606:.\Generated_Source\PSoC5/BL.c **** * Return:\r
- 607:.\Generated_Source\PSoC5/BL.c **** *   None\r
- 608:.\Generated_Source\PSoC5/BL.c **** *\r
- 609:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
- 610:.\Generated_Source\PSoC5/BL.c **** static void BL_HostLink(uint8 timeOut) \r
- 611:.\Generated_Source\PSoC5/BL.c **** {\r
- 612:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA numberRead;\r
- 613:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA rspSize;\r
- 614:.\Generated_Source\PSoC5/BL.c ****     uint8     CYDATA ackCode;\r
- 615:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA pktChecksum;\r
- 616:.\Generated_Source\PSoC5/BL.c ****     cystatus  CYDATA readStat;\r
- 617:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA pktSize    = 0u;\r
- 618:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA dataOffset = 0u;\r
- 619:.\Generated_Source\PSoC5/BL.c ****     uint8     CYDATA timeOutCnt = 10u;\r
- 620:.\Generated_Source\PSoC5/BL.c **** \r
- 621:.\Generated_Source\PSoC5/BL.c ****     #if(0u == BL_DUAL_APP_BOOTLOADER)\r
- 622:.\Generated_Source\PSoC5/BL.c ****         uint8 CYDATA clearedMetaData = 0u;\r
- 623:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (0u == BL_DUAL_APP_BOOTLOADER) */\r
- 624:.\Generated_Source\PSoC5/BL.c **** \r
- 625:.\Generated_Source\PSoC5/BL.c ****     CYBIT     communicationState = BL_COMMUNICATION_STATE_IDLE;\r
- 626:.\Generated_Source\PSoC5/BL.c **** \r
- 627:.\Generated_Source\PSoC5/BL.c ****     uint8     packetBuffer[BL_SIZEOF_COMMAND_BUFFER];\r
- 628:.\Generated_Source\PSoC5/BL.c ****     uint8     dataBuffer  [BL_SIZEOF_COMMAND_BUFFER];\r
- 629:.\Generated_Source\PSoC5/BL.c **** \r
- 630:.\Generated_Source\PSoC5/BL.c **** \r
- 631:.\Generated_Source\PSoC5/BL.c ****     /* Initialize communications channel. */\r
- 632:.\Generated_Source\PSoC5/BL.c ****     CyBtldrCommStart();\r
- 633:.\Generated_Source\PSoC5/BL.c **** \r
- 634:.\Generated_Source\PSoC5/BL.c ****     /* Enable global interrupts */\r
- 635:.\Generated_Source\PSoC5/BL.c ****     CyGlobalIntEnable;\r
- 636:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 13\r
-\r
-\r
- 637:.\Generated_Source\PSoC5/BL.c ****     do\r
- 638:.\Generated_Source\PSoC5/BL.c ****     {\r
- 639:.\Generated_Source\PSoC5/BL.c ****         ackCode = CYRET_SUCCESS;\r
- 640:.\Generated_Source\PSoC5/BL.c **** \r
- 641:.\Generated_Source\PSoC5/BL.c ****         do\r
- 642:.\Generated_Source\PSoC5/BL.c ****         {\r
- 643:.\Generated_Source\PSoC5/BL.c ****             readStat = CyBtldrCommRead(packetBuffer,\r
- 644:.\Generated_Source\PSoC5/BL.c ****                                         BL_SIZEOF_COMMAND_BUFFER,\r
- 645:.\Generated_Source\PSoC5/BL.c ****                                         &numberRead,\r
- 646:.\Generated_Source\PSoC5/BL.c ****                                         (0u == timeOut) ? 0xFFu : timeOut);\r
- 647:.\Generated_Source\PSoC5/BL.c ****             if (0u != timeOut)\r
- 648:.\Generated_Source\PSoC5/BL.c ****             {\r
- 649:.\Generated_Source\PSoC5/BL.c ****                 timeOutCnt--;\r
- 650:.\Generated_Source\PSoC5/BL.c ****             }\r
- 651:.\Generated_Source\PSoC5/BL.c **** \r
- 652:.\Generated_Source\PSoC5/BL.c ****         } while ( (0u != timeOutCnt) && (readStat != CYRET_SUCCESS) );\r
- 653:.\Generated_Source\PSoC5/BL.c **** \r
- 654:.\Generated_Source\PSoC5/BL.c **** \r
- 655:.\Generated_Source\PSoC5/BL.c ****         if( readStat != CYRET_SUCCESS )\r
- 656:.\Generated_Source\PSoC5/BL.c ****         {\r
- 657:.\Generated_Source\PSoC5/BL.c ****             continue;\r
- 658:.\Generated_Source\PSoC5/BL.c ****         }\r
- 659:.\Generated_Source\PSoC5/BL.c **** \r
- 660:.\Generated_Source\PSoC5/BL.c ****         if((numberRead < BL_MIN_PKT_SIZE) ||\r
- 661:.\Generated_Source\PSoC5/BL.c ****            (packetBuffer[BL_SOP_ADDR] != BL_SOP))\r
- 662:.\Generated_Source\PSoC5/BL.c ****         {\r
- 663:.\Generated_Source\PSoC5/BL.c ****             ackCode = BL_ERR_DATA;\r
- 664:.\Generated_Source\PSoC5/BL.c ****         }\r
- 665:.\Generated_Source\PSoC5/BL.c ****         else\r
- 666:.\Generated_Source\PSoC5/BL.c ****         {\r
- 667:.\Generated_Source\PSoC5/BL.c ****             pktSize = ((uint16)((uint16)packetBuffer[BL_SIZE_ADDR + 1u] << 8u)) |\r
- 668:.\Generated_Source\PSoC5/BL.c ****                                packetBuffer[BL_SIZE_ADDR];\r
- 669:.\Generated_Source\PSoC5/BL.c **** \r
- 670:.\Generated_Source\PSoC5/BL.c ****             pktChecksum = ((uint16)((uint16)packetBuffer[BL_CHK_ADDR(pktSize) + 1u] << 8u)) |\r
- 671:.\Generated_Source\PSoC5/BL.c ****                                    packetBuffer[BL_CHK_ADDR(pktSize)];\r
- 672:.\Generated_Source\PSoC5/BL.c **** \r
- 673:.\Generated_Source\PSoC5/BL.c ****             if((pktSize + BL_MIN_PKT_SIZE) > numberRead)\r
- 674:.\Generated_Source\PSoC5/BL.c ****             {\r
- 675:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_LENGTH;\r
- 676:.\Generated_Source\PSoC5/BL.c ****             }\r
- 677:.\Generated_Source\PSoC5/BL.c ****             else if(packetBuffer[BL_EOP_ADDR(pktSize)] != BL_EOP)\r
- 678:.\Generated_Source\PSoC5/BL.c ****             {\r
- 679:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_DATA;\r
- 680:.\Generated_Source\PSoC5/BL.c ****             }\r
- 681:.\Generated_Source\PSoC5/BL.c ****             else if(pktChecksum != BL_CalcPacketChecksum(packetBuffer,\r
- 682:.\Generated_Source\PSoC5/BL.c ****                                                                         pktSize + BL_DATA_ADDR))\r
- 683:.\Generated_Source\PSoC5/BL.c ****             {\r
- 684:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_CHECKSUM;\r
- 685:.\Generated_Source\PSoC5/BL.c ****             }\r
- 686:.\Generated_Source\PSoC5/BL.c ****             else\r
- 687:.\Generated_Source\PSoC5/BL.c ****             {\r
- 688:.\Generated_Source\PSoC5/BL.c ****                 /* Empty section */\r
- 689:.\Generated_Source\PSoC5/BL.c ****             }\r
- 690:.\Generated_Source\PSoC5/BL.c ****         }\r
- 691:.\Generated_Source\PSoC5/BL.c **** \r
- 692:.\Generated_Source\PSoC5/BL.c ****         rspSize = 0u;\r
- 693:.\Generated_Source\PSoC5/BL.c ****         if(ackCode == CYRET_SUCCESS)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 14\r
-\r
-\r
- 694:.\Generated_Source\PSoC5/BL.c ****         {\r
- 695:.\Generated_Source\PSoC5/BL.c ****             uint8 CYDATA btldrData = packetBuffer[BL_DATA_ADDR];\r
- 696:.\Generated_Source\PSoC5/BL.c **** \r
- 697:.\Generated_Source\PSoC5/BL.c ****             ackCode = BL_ERR_DATA;\r
- 698:.\Generated_Source\PSoC5/BL.c ****             switch(packetBuffer[BL_CMD_ADDR])\r
- 699:.\Generated_Source\PSoC5/BL.c ****             {\r
- 700:.\Generated_Source\PSoC5/BL.c **** \r
- 701:.\Generated_Source\PSoC5/BL.c **** \r
- 702:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
- 703:.\Generated_Source\PSoC5/BL.c ****             *   Get metadata\r
- 704:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
- 705:.\Generated_Source\PSoC5/BL.c ****             #if(0u != BL_CMD_GET_METADATA)\r
- 706:.\Generated_Source\PSoC5/BL.c **** \r
- 707:.\Generated_Source\PSoC5/BL.c ****                 case BL_COMMAND_GET_METADATA:\r
- 708:.\Generated_Source\PSoC5/BL.c **** \r
- 709:.\Generated_Source\PSoC5/BL.c ****                     if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
- 710:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 711:.\Generated_Source\PSoC5/BL.c ****                         if (btldrData >= BL_MAX_NUM_OF_BTLDB)\r
- 712:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 713:.\Generated_Source\PSoC5/BL.c ****                             ackCode = BL_ERR_APP;\r
- 714:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 715:.\Generated_Source\PSoC5/BL.c ****                         else if(CYRET_SUCCESS == BL_ValidateBootloadable(btldrData))\r
- 716:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 717:.\Generated_Source\PSoC5/BL.c ****                             #if(CY_PSOC3)\r
- 718:.\Generated_Source\PSoC5/BL.c ****                                 (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
- 719:.\Generated_Source\PSoC5/BL.c ****                                             ((uint8  CYCODE *) (BL_META_BASE(btldrData))), 56);\r
- 720:.\Generated_Source\PSoC5/BL.c ****                             #else\r
- 721:.\Generated_Source\PSoC5/BL.c ****                                 (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
- 722:.\Generated_Source\PSoC5/BL.c ****                                             (uint8 *) BL_META_BASE(btldrData), 56u);\r
- 723:.\Generated_Source\PSoC5/BL.c ****                             #endif  /* (CY_PSOC3) */\r
- 724:.\Generated_Source\PSoC5/BL.c **** \r
- 725:.\Generated_Source\PSoC5/BL.c ****                             rspSize = 56u;\r
- 726:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
- 727:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 728:.\Generated_Source\PSoC5/BL.c ****                         else\r
- 729:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 730:.\Generated_Source\PSoC5/BL.c ****                             ackCode = BL_ERR_APP;\r
- 731:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 732:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 733:.\Generated_Source\PSoC5/BL.c ****                     break;\r
- 734:.\Generated_Source\PSoC5/BL.c **** \r
- 735:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_CMD_GET_METADATA) */\r
- 736:.\Generated_Source\PSoC5/BL.c **** \r
- 737:.\Generated_Source\PSoC5/BL.c **** \r
- 738:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
- 739:.\Generated_Source\PSoC5/BL.c ****             *   Verify checksum\r
- 740:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
- 741:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_CHECKSUM:\r
- 742:.\Generated_Source\PSoC5/BL.c **** \r
- 743:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 0u))\r
- 744:.\Generated_Source\PSoC5/BL.c ****                 {\r
- 745:.\Generated_Source\PSoC5/BL.c ****                     packetBuffer[BL_DATA_ADDR] =\r
- 746:.\Generated_Source\PSoC5/BL.c ****                             (uint8)(BL_ValidateBootloadable(BL_activeApp) == CYRET_SUCCESS);\r
- 747:.\Generated_Source\PSoC5/BL.c **** \r
- 748:.\Generated_Source\PSoC5/BL.c ****                     rspSize = 1u;\r
- 749:.\Generated_Source\PSoC5/BL.c ****                     ackCode = CYRET_SUCCESS;\r
- 750:.\Generated_Source\PSoC5/BL.c ****                 }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 15\r
-\r
-\r
- 751:.\Generated_Source\PSoC5/BL.c ****                 break;\r
- 752:.\Generated_Source\PSoC5/BL.c **** \r
- 753:.\Generated_Source\PSoC5/BL.c **** \r
- 754:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
- 755:.\Generated_Source\PSoC5/BL.c ****             *   Get flash size\r
- 756:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
- 757:.\Generated_Source\PSoC5/BL.c ****             #if(0u != BL_CMD_GET_FLASH_SIZE_AVAIL)\r
- 758:.\Generated_Source\PSoC5/BL.c **** \r
- 759:.\Generated_Source\PSoC5/BL.c ****                 case BL_COMMAND_REPORT_SIZE:\r
- 760:.\Generated_Source\PSoC5/BL.c **** \r
- 761:.\Generated_Source\PSoC5/BL.c ****                     if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
- 762:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 763:.\Generated_Source\PSoC5/BL.c ****                         /* btldrData holds flash array ID sent by host */\r
- 764:.\Generated_Source\PSoC5/BL.c ****                         if(btldrData < BL_NUM_OF_FLASH_ARRAYS)\r
- 765:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 766:.\Generated_Source\PSoC5/BL.c ****                             #if (1u == BL_NUM_OF_FLASH_ARRAYS)\r
- 767:.\Generated_Source\PSoC5/BL.c ****                                 uint16 CYDATA startRow = (uint16)*BL_SizeBytesAccess / CYDEV_FLS_RO\r
- 768:.\Generated_Source\PSoC5/BL.c ****                             #else\r
- 769:.\Generated_Source\PSoC5/BL.c ****                                 uint16 CYDATA startRow = 0u;\r
- 770:.\Generated_Source\PSoC5/BL.c ****                             #endif  /* (1u == BL_NUM_OF_FLASH_ARRAYS) */\r
- 771:.\Generated_Source\PSoC5/BL.c **** \r
- 772:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR]      = LO8(startRow);\r
- 773:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 1u] = HI8(startRow);\r
- 774:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 2u] = LO8(CY_FLASH_NUMBER_ROWS - 1u);\r
- 775:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 3u] = HI8(CY_FLASH_NUMBER_ROWS - 1u);\r
- 776:.\Generated_Source\PSoC5/BL.c **** \r
- 777:.\Generated_Source\PSoC5/BL.c ****                             rspSize = 4u;\r
- 778:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
- 779:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 780:.\Generated_Source\PSoC5/BL.c **** \r
- 781:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 782:.\Generated_Source\PSoC5/BL.c ****                     break;\r
- 783:.\Generated_Source\PSoC5/BL.c **** \r
- 784:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_CMD_GET_FLASH_SIZE_AVAIL) */\r
- 785:.\Generated_Source\PSoC5/BL.c **** \r
- 786:.\Generated_Source\PSoC5/BL.c **** \r
- 787:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
- 788:.\Generated_Source\PSoC5/BL.c ****             *   Get application status\r
- 789:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
- 790:.\Generated_Source\PSoC5/BL.c ****             #if(0u != BL_DUAL_APP_BOOTLOADER)\r
- 791:.\Generated_Source\PSoC5/BL.c **** \r
- 792:.\Generated_Source\PSoC5/BL.c ****                 #if(0u != BL_CMD_GET_APP_STATUS_AVAIL)\r
- 793:.\Generated_Source\PSoC5/BL.c **** \r
- 794:.\Generated_Source\PSoC5/BL.c ****                     case BL_COMMAND_APP_STATUS:\r
- 795:.\Generated_Source\PSoC5/BL.c **** \r
- 796:.\Generated_Source\PSoC5/BL.c ****                         if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u)\r
- 797:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 798:.\Generated_Source\PSoC5/BL.c **** \r
- 799:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR] =\r
- 800:.\Generated_Source\PSoC5/BL.c ****                                 (uint8)BL_ValidateBootloadable(btldrData);\r
- 801:.\Generated_Source\PSoC5/BL.c **** \r
- 802:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 1u] =\r
- 803:.\Generated_Source\PSoC5/BL.c ****                                 (uint8)BL_MD_BTLDB_ACTIVE_VALUE(btldrData);\r
- 804:.\Generated_Source\PSoC5/BL.c **** \r
- 805:.\Generated_Source\PSoC5/BL.c ****                             rspSize = 2u;\r
- 806:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
- 807:.\Generated_Source\PSoC5/BL.c ****                         }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 16\r
-\r
-\r
- 808:.\Generated_Source\PSoC5/BL.c ****                         break;\r
- 809:.\Generated_Source\PSoC5/BL.c **** \r
- 810:.\Generated_Source\PSoC5/BL.c ****                 #endif  /* (0u != BL_CMD_GET_APP_STATUS_AVAIL) */\r
- 811:.\Generated_Source\PSoC5/BL.c **** \r
- 812:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
- 813:.\Generated_Source\PSoC5/BL.c **** \r
- 814:.\Generated_Source\PSoC5/BL.c **** \r
- 815:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
- 816:.\Generated_Source\PSoC5/BL.c ****             *   Program / Erase row\r
- 817:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
- 818:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_PROGRAM:\r
- 819:.\Generated_Source\PSoC5/BL.c **** \r
- 820:.\Generated_Source\PSoC5/BL.c ****             /* The btldrData variable holds Flash Array ID */\r
- 821:.\Generated_Source\PSoC5/BL.c **** \r
- 822:.\Generated_Source\PSoC5/BL.c ****         #if (0u != BL_CMD_ERASE_ROW_AVAIL)\r
- 823:.\Generated_Source\PSoC5/BL.c **** \r
- 824:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_ERASE:\r
- 825:.\Generated_Source\PSoC5/BL.c ****                 if (BL_COMMAND_ERASE == packetBuffer[BL_CMD_ADDR])\r
- 826:.\Generated_Source\PSoC5/BL.c ****                 {\r
- 827:.\Generated_Source\PSoC5/BL.c ****                     if ((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
- 828:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 829:.\Generated_Source\PSoC5/BL.c ****                         #if(!CY_PSOC4)\r
- 830:.\Generated_Source\PSoC5/BL.c ****                             if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 831:.\Generated_Source\PSoC5/BL.c ****                                (btldrData <= BL_LAST_EE_ARRAYID))\r
- 832:.\Generated_Source\PSoC5/BL.c ****                             {\r
- 833:.\Generated_Source\PSoC5/BL.c ****                                 /* Size of EEPROM row */\r
- 834:.\Generated_Source\PSoC5/BL.c ****                                 dataOffset = CY_EEPROM_SIZEOF_ROW;\r
- 835:.\Generated_Source\PSoC5/BL.c ****                             }\r
- 836:.\Generated_Source\PSoC5/BL.c ****                             else\r
- 837:.\Generated_Source\PSoC5/BL.c ****                             {\r
- 838:.\Generated_Source\PSoC5/BL.c ****                                 /* Size of FLASH row (depends on ECC configuration) */\r
- 839:.\Generated_Source\PSoC5/BL.c ****                                 dataOffset = BL_FROW_SIZE;\r
- 840:.\Generated_Source\PSoC5/BL.c ****                             }\r
- 841:.\Generated_Source\PSoC5/BL.c ****                         #else\r
- 842:.\Generated_Source\PSoC5/BL.c ****                             /* Size of FLASH row (no ECC available) */\r
- 843:.\Generated_Source\PSoC5/BL.c ****                             dataOffset = BL_FROW_SIZE;\r
- 844:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (!CY_PSOC4) */\r
- 845:.\Generated_Source\PSoC5/BL.c **** \r
- 846:.\Generated_Source\PSoC5/BL.c ****                         #if(CY_PSOC3)\r
- 847:.\Generated_Source\PSoC5/BL.c ****                             (void) memset(dataBuffer, (char8) 0, (int16) dataOffset);\r
- 848:.\Generated_Source\PSoC5/BL.c ****                         #else\r
- 849:.\Generated_Source\PSoC5/BL.c ****                             (void) memset(dataBuffer, 0, dataOffset);\r
- 850:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (CY_PSOC3) */\r
- 851:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 852:.\Generated_Source\PSoC5/BL.c ****                     else\r
- 853:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 854:.\Generated_Source\PSoC5/BL.c ****                         break;\r
- 855:.\Generated_Source\PSoC5/BL.c ****                     }\r
- 856:.\Generated_Source\PSoC5/BL.c ****                 }\r
- 857:.\Generated_Source\PSoC5/BL.c **** \r
- 858:.\Generated_Source\PSoC5/BL.c ****         #endif  /* (0u != BL_CMD_ERASE_ROW_AVAIL) */\r
- 859:.\Generated_Source\PSoC5/BL.c **** \r
- 860:.\Generated_Source\PSoC5/BL.c **** \r
- 861:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize >= 3u))\r
- 862:.\Generated_Source\PSoC5/BL.c ****                 {\r
- 863:.\Generated_Source\PSoC5/BL.c **** \r
- 864:.\Generated_Source\PSoC5/BL.c ****                     /* The command may be sent along with the last block of data, to program the ro\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 17\r
-\r
-\r
- 865:.\Generated_Source\PSoC5/BL.c ****                     #if(CY_PSOC3)\r
- 866:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&dataBuffer[dataOffset],\r
- 867:.\Generated_Source\PSoC5/BL.c ****                                       &packetBuffer[BL_DATA_ADDR + 3u],\r
- 868:.\Generated_Source\PSoC5/BL.c ****                                       ( int16 )pktSize - 3);\r
- 869:.\Generated_Source\PSoC5/BL.c ****                     #else\r
- 870:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&dataBuffer[dataOffset],\r
- 871:.\Generated_Source\PSoC5/BL.c ****                                       &packetBuffer[BL_DATA_ADDR + 3u],\r
- 872:.\Generated_Source\PSoC5/BL.c ****                                       pktSize - 3u);\r
- 873:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (CY_PSOC3) */\r
- 874:.\Generated_Source\PSoC5/BL.c **** \r
- 875:.\Generated_Source\PSoC5/BL.c ****                     dataOffset += (pktSize - 3u);\r
- 876:.\Generated_Source\PSoC5/BL.c **** \r
- 877:.\Generated_Source\PSoC5/BL.c ****                     #if(!CY_PSOC4)\r
- 878:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 879:.\Generated_Source\PSoC5/BL.c ****                            (btldrData <= BL_LAST_EE_ARRAYID))\r
- 880:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 881:.\Generated_Source\PSoC5/BL.c **** \r
- 882:.\Generated_Source\PSoC5/BL.c ****                             CyEEPROM_Start();\r
- 883:.\Generated_Source\PSoC5/BL.c **** \r
- 884:.\Generated_Source\PSoC5/BL.c ****                             /* Size of EEPROM row */\r
- 885:.\Generated_Source\PSoC5/BL.c ****                             pktSize = CY_EEPROM_SIZEOF_ROW;\r
- 886:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 887:.\Generated_Source\PSoC5/BL.c ****                         else\r
- 888:.\Generated_Source\PSoC5/BL.c ****                         {\r
- 889:.\Generated_Source\PSoC5/BL.c ****                             /* Size of FLASH row (depends on ECC configuration) */\r
- 890:.\Generated_Source\PSoC5/BL.c ****                             pktSize = BL_FROW_SIZE;\r
- 891:.\Generated_Source\PSoC5/BL.c ****                         }\r
- 892:.\Generated_Source\PSoC5/BL.c ****                     #else\r
- 893:.\Generated_Source\PSoC5/BL.c ****                         /* Size of FLASH row (no ECC available) */\r
- 894:.\Generated_Source\PSoC5/BL.c ****                         pktSize = BL_FROW_SIZE;\r
- 895:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (!CY_PSOC4) */\r
- 896:.\Generated_Source\PSoC5/BL.c **** \r
- 897:.\Generated_Source\PSoC5/BL.c **** \r
- 898:.\Generated_Source\PSoC5/BL.c ****                     /* Check if we have all data to program */\r
- 899:.\Generated_Source\PSoC5/BL.c ****                     if(dataOffset == pktSize)\r
- 900:.\Generated_Source\PSoC5/BL.c ****                     {\r
- 901:.\Generated_Source\PSoC5/BL.c ****                         /* Get FLASH/EEPROM row number */\r
- 902:.\Generated_Source\PSoC5/BL.c ****                         dataOffset = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)) |\r
- 903:.\Generated_Source\PSoC5/BL.c ****                                               packetBuffer[BL_DATA_ADDR + 1u];\r
- 904:.\Generated_Source\PSoC5/BL.c **** \r
- 905:.\Generated_Source\PSoC5/BL.c ****                         #if(!CY_PSOC4)\r
- 906:.\Generated_Source\PSoC5/BL.c ****                             if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
- 907:.\Generated_Source\PSoC5/BL.c ****                             {\r
- 908:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (!CY_PSOC4) */\r
- 909:.\Generated_Source\PSoC5/BL.c **** \r
- 910:.\Generated_Source\PSoC5/BL.c ****                         #if(0u == BL_DUAL_APP_BOOTLOADER)\r
- 911:.\Generated_Source\PSoC5/BL.c **** \r
- 912:.\Generated_Source\PSoC5/BL.c ****                             if(0u == clearedMetaData)\r
- 913:.\Generated_Source\PSoC5/BL.c ****                             {\r
- 914:.\Generated_Source\PSoC5/BL.c ****                                 /* Metadata section must be filled with zeroes */\r
- 915:.\Generated_Source\PSoC5/BL.c **** \r
- 916:.\Generated_Source\PSoC5/BL.c ****                                 uint8 erase[BL_FROW_SIZE];\r
- 917:.\Generated_Source\PSoC5/BL.c **** \r
- 918:.\Generated_Source\PSoC5/BL.c ****                                 #if(CY_PSOC3)\r
- 919:.\Generated_Source\PSoC5/BL.c ****                                     (void) memset(erase, (char8) 0, (int16) BL_FROW_SIZE);\r
- 920:.\Generated_Source\PSoC5/BL.c ****                                 #else\r
- 921:.\Generated_Source\PSoC5/BL.c ****                                     (void) memset(erase, 0, BL_FROW_SIZE);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 18\r
-\r
-\r
- 922:.\Generated_Source\PSoC5/BL.c ****                                 #endif  /* (CY_PSOC3) */\r
- 923:.\Generated_Source\PSoC5/BL.c **** \r
- 924:.\Generated_Source\PSoC5/BL.c ****                                 #if(CY_PSOC4)\r
- 925:.\Generated_Source\PSoC5/BL.c ****                                     (void) CySysFlashWriteRow(BL_MD_ROW, erase);\r
- 926:.\Generated_Source\PSoC5/BL.c ****                                 #else\r
- 927:.\Generated_Source\PSoC5/BL.c ****                                     (void) CyWriteRowFull((uint8)  BL_MD_FLASH_ARRAY_NUM,\r
- 928:.\Generated_Source\PSoC5/BL.c ****                                                           (uint16) BL_MD_ROW,\r
- 929:.\Generated_Source\PSoC5/BL.c ****                                                                     erase,\r
- 930:.\Generated_Source\PSoC5/BL.c ****                                                                     BL_FROW_SIZE);\r
- 931:.\Generated_Source\PSoC5/BL.c ****                                 #endif  /* (CY_PSOC4) */\r
- 932:.\Generated_Source\PSoC5/BL.c **** \r
- 933:.\Generated_Source\PSoC5/BL.c ****                                 /* Set up flag that metadata was cleared */\r
- 934:.\Generated_Source\PSoC5/BL.c ****                                 clearedMetaData = 1u;\r
- 935:.\Generated_Source\PSoC5/BL.c ****                             }\r
- 936:.\Generated_Source\PSoC5/BL.c **** \r
- 937:.\Generated_Source\PSoC5/BL.c ****                         #else\r
- 938:.\Generated_Source\PSoC5/BL.c **** \r
- 939:.\Generated_Source\PSoC5/BL.c ****                             if(BL_activeApp < BL_MD_BTLDB_ACTIVE_NONE)\r
- 940:.\Generated_Source\PSoC5/BL.c ****                             {\r
- 941:.\Generated_Source\PSoC5/BL.c ****                                 /* First active bootloadable application row */\r
- 942:.\Generated_Source\PSoC5/BL.c ****                                 uint16 firstRow = (uint16) 1u +\r
- 943:.\Generated_Source\PSoC5/BL.c ****                                     (uint16) BL_GetMetadata(BL_GET_METADATA_BTLDR_LAST_ROW,\r
- 944:.\Generated_Source\PSoC5/BL.c ****                                                                           BL_activeApp);\r
- 945:.\Generated_Source\PSoC5/BL.c **** \r
- 946:.\Generated_Source\PSoC5/BL.c ****                                 #if(CY_PSOC4)\r
- 947:.\Generated_Source\PSoC5/BL.c ****                                     uint16 row = dataOffset;\r
- 948:.\Generated_Source\PSoC5/BL.c ****                                 #else\r
- 949:.\Generated_Source\PSoC5/BL.c ****                                     uint16 row = (uint16)(btldrData * (CYDEV_FLS_SECTOR_SIZE / CYDE\r
- 950:.\Generated_Source\PSoC5/BL.c ****                                                   dataOffset;\r
- 951:.\Generated_Source\PSoC5/BL.c ****                                 #endif  /* (CY_PSOC4) */\r
- 952:.\Generated_Source\PSoC5/BL.c **** \r
- 953:.\Generated_Source\PSoC5/BL.c **** \r
- 954:.\Generated_Source\PSoC5/BL.c ****                                 /******************************************************************\r
- 955:.\Generated_Source\PSoC5/BL.c ****                                 * Last row is equal to the first row plus the number of rows availa\r
- 956:.\Generated_Source\PSoC5/BL.c ****                                 * app. To compute this, we first subtract the number of appliaction\r
- 957:.\Generated_Source\PSoC5/BL.c ****                                 * the total flash rows: (CY_FLASH_NUMBER_ROWS - 2u).\r
- 958:.\Generated_Source\PSoC5/BL.c ****                                 *\r
- 959:.\Generated_Source\PSoC5/BL.c ****                                 * Then subtract off the first row:\r
- 960:.\Generated_Source\PSoC5/BL.c ****                                 * App Rows = (CY_FLASH_NUMBER_ROWS - 2u - firstRow)\r
- 961:.\Generated_Source\PSoC5/BL.c ****                                 * Then divide that number by the number of application that must fi\r
- 962:.\Generated_Source\PSoC5/BL.c ****                                 * space, if we are app1 then that number is 2, if app2 then 1.  Our\r
- 963:.\Generated_Source\PSoC5/BL.c ****                                 * then: (2u - BL_activeApp).\r
- 964:.\Generated_Source\PSoC5/BL.c ****                                 *\r
- 965:.\Generated_Source\PSoC5/BL.c ****                                 * Adding this number to firstRow gives the address right beyond our\r
- 966:.\Generated_Source\PSoC5/BL.c ****                                 * so we subtract 1.\r
- 967:.\Generated_Source\PSoC5/BL.c ****                                 *******************************************************************\r
- 968:.\Generated_Source\PSoC5/BL.c ****                                 uint16 lastRow = (firstRow - 1u) +\r
- 969:.\Generated_Source\PSoC5/BL.c ****                                                   ((uint16)((CYDEV_FLASH_SIZE / CYDEV_FLS_ROW_SIZE)\r
- 970:.\Generated_Source\PSoC5/BL.c ****                                                   ((uint16)2u - (uint16)BL_activeApp));\r
- 971:.\Generated_Source\PSoC5/BL.c **** \r
- 972:.\Generated_Source\PSoC5/BL.c **** \r
- 973:.\Generated_Source\PSoC5/BL.c ****                                 /******************************************************************\r
- 974:.\Generated_Source\PSoC5/BL.c ****                                 * Check to see if the row to program is within the range of the act\r
- 975:.\Generated_Source\PSoC5/BL.c ****                                 * application, or if it maches the active application's metadata ro\r
- 976:.\Generated_Source\PSoC5/BL.c ****                                 * refuse to program as it would corrupt the active app.\r
- 977:.\Generated_Source\PSoC5/BL.c ****                                 *******************************************************************\r
- 978:.\Generated_Source\PSoC5/BL.c ****                                 if(((row >= firstRow) && (row <= lastRow)) ||\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 19\r
-\r
-\r
- 979:.\Generated_Source\PSoC5/BL.c ****                                    ((btldrData == BL_MD_FLASH_ARRAY_NUM) &&\r
- 980:.\Generated_Source\PSoC5/BL.c ****                                    (dataOffset == BL_MD_ROW_NUM(BL_activeApp))))\r
- 981:.\Generated_Source\PSoC5/BL.c ****                                 {\r
- 982:.\Generated_Source\PSoC5/BL.c ****                                     ackCode = BL_ERR_ACTIVE;\r
- 983:.\Generated_Source\PSoC5/BL.c ****                                     dataOffset = 0u;\r
- 984:.\Generated_Source\PSoC5/BL.c ****                                     break;\r
- 985:.\Generated_Source\PSoC5/BL.c ****                                 }\r
- 986:.\Generated_Source\PSoC5/BL.c ****                             }\r
- 987:.\Generated_Source\PSoC5/BL.c **** \r
- 988:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (0u == BL_DUAL_APP_BOOTLOADER) */\r
- 989:.\Generated_Source\PSoC5/BL.c **** \r
- 990:.\Generated_Source\PSoC5/BL.c ****                         #if(!CY_PSOC4)\r
- 991:.\Generated_Source\PSoC5/BL.c ****                             }\r
- 992:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (!CY_PSOC4) */\r
- 993:.\Generated_Source\PSoC5/BL.c **** \r
- 994:.\Generated_Source\PSoC5/BL.c ****                         #if(CY_PSOC4)\r
- 995:.\Generated_Source\PSoC5/BL.c **** \r
- 996:.\Generated_Source\PSoC5/BL.c ****                             ackCode = (CYRET_SUCCESS != CySysFlashWriteRow((uint32) dataOffset, dat\r
- 997:.\Generated_Source\PSoC5/BL.c ****                                 ? BL_ERR_ROW \\r
- 998:.\Generated_Source\PSoC5/BL.c ****                                 : CYRET_SUCCESS;\r
- 999:.\Generated_Source\PSoC5/BL.c **** \r
-1000:.\Generated_Source\PSoC5/BL.c ****                         #else\r
-1001:.\Generated_Source\PSoC5/BL.c **** \r
-1002:.\Generated_Source\PSoC5/BL.c ****                             ackCode = (CYRET_SUCCESS != CyWriteRowFull(btldrData, dataOffset, dataB\r
-1003:.\Generated_Source\PSoC5/BL.c ****                                 ? BL_ERR_ROW \\r
-1004:.\Generated_Source\PSoC5/BL.c ****                                 : CYRET_SUCCESS;\r
-1005:.\Generated_Source\PSoC5/BL.c **** \r
-1006:.\Generated_Source\PSoC5/BL.c ****                         #endif  /* (CY_PSOC4) */\r
-1007:.\Generated_Source\PSoC5/BL.c **** \r
-1008:.\Generated_Source\PSoC5/BL.c ****                     }\r
-1009:.\Generated_Source\PSoC5/BL.c ****                     else\r
-1010:.\Generated_Source\PSoC5/BL.c ****                     {\r
-1011:.\Generated_Source\PSoC5/BL.c ****                         ackCode = BL_ERR_LENGTH;\r
-1012:.\Generated_Source\PSoC5/BL.c ****                     }\r
-1013:.\Generated_Source\PSoC5/BL.c **** \r
-1014:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
-1015:.\Generated_Source\PSoC5/BL.c ****                 }\r
-1016:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1017:.\Generated_Source\PSoC5/BL.c **** \r
-1018:.\Generated_Source\PSoC5/BL.c **** \r
-1019:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1020:.\Generated_Source\PSoC5/BL.c ****             *   Sync bootloader\r
-1021:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1022:.\Generated_Source\PSoC5/BL.c ****             #if(0u != BL_CMD_SYNC_BOOTLOADER_AVAIL)\r
-1023:.\Generated_Source\PSoC5/BL.c **** \r
-1024:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_SYNC:\r
-1025:.\Generated_Source\PSoC5/BL.c **** \r
-1026:.\Generated_Source\PSoC5/BL.c ****                 if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
-1027:.\Generated_Source\PSoC5/BL.c ****                 {\r
-1028:.\Generated_Source\PSoC5/BL.c ****                     /* If something failed the host would send this command to reset the bootloader\r
-1029:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
-1030:.\Generated_Source\PSoC5/BL.c **** \r
-1031:.\Generated_Source\PSoC5/BL.c ****                     /* Don't ack the packet, just get ready to accept the next one */\r
-1032:.\Generated_Source\PSoC5/BL.c ****                     continue;\r
-1033:.\Generated_Source\PSoC5/BL.c ****                 }\r
-1034:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1035:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 20\r
-\r
-\r
-1036:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_CMD_SYNC_BOOTLOADER_AVAIL) */\r
-1037:.\Generated_Source\PSoC5/BL.c **** \r
-1038:.\Generated_Source\PSoC5/BL.c **** \r
-1039:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1040:.\Generated_Source\PSoC5/BL.c ****             *   Set active application\r
-1041:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1042:.\Generated_Source\PSoC5/BL.c ****             #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-1043:.\Generated_Source\PSoC5/BL.c **** \r
-1044:.\Generated_Source\PSoC5/BL.c ****                 case BL_COMMAND_APP_ACTIVE:\r
-1045:.\Generated_Source\PSoC5/BL.c **** \r
-1046:.\Generated_Source\PSoC5/BL.c ****                     if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
-1047:.\Generated_Source\PSoC5/BL.c ****                     {\r
-1048:.\Generated_Source\PSoC5/BL.c ****                         if(CYRET_SUCCESS == BL_ValidateBootloadable(btldrData))\r
-1049:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1050:.\Generated_Source\PSoC5/BL.c ****                             uint8 CYDATA idx;\r
-1051:.\Generated_Source\PSoC5/BL.c **** \r
-1052:.\Generated_Source\PSoC5/BL.c ****                             for(idx = 0u; idx < BL_MAX_NUM_OF_BTLDB; idx++)\r
-1053:.\Generated_Source\PSoC5/BL.c ****                             {\r
-1054:.\Generated_Source\PSoC5/BL.c ****                                 BL_SetFlashByte((uint32) BL_MD_BTLDB_ACTIVE_OFFSET(idx),\r
-1055:.\Generated_Source\PSoC5/BL.c ****                                                               (uint8 )(idx == btldrData));\r
-1056:.\Generated_Source\PSoC5/BL.c ****                             }\r
-1057:.\Generated_Source\PSoC5/BL.c ****                             BL_activeApp = btldrData;\r
-1058:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
-1059:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1060:.\Generated_Source\PSoC5/BL.c ****                         else\r
-1061:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1062:.\Generated_Source\PSoC5/BL.c ****                             ackCode = BL_ERR_APP;\r
-1063:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1064:.\Generated_Source\PSoC5/BL.c ****                     }\r
-1065:.\Generated_Source\PSoC5/BL.c ****                     break;\r
-1066:.\Generated_Source\PSoC5/BL.c **** \r
-1067:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-1068:.\Generated_Source\PSoC5/BL.c **** \r
-1069:.\Generated_Source\PSoC5/BL.c **** \r
-1070:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1071:.\Generated_Source\PSoC5/BL.c ****             *   Send data\r
-1072:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1073:.\Generated_Source\PSoC5/BL.c ****             #if (0u != BL_CMD_SEND_DATA_AVAIL)\r
-1074:.\Generated_Source\PSoC5/BL.c **** \r
-1075:.\Generated_Source\PSoC5/BL.c ****                 case BL_COMMAND_DATA:\r
-1076:.\Generated_Source\PSoC5/BL.c **** \r
-1077:.\Generated_Source\PSoC5/BL.c ****                     if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
-1078:.\Generated_Source\PSoC5/BL.c ****                     {\r
-1079:.\Generated_Source\PSoC5/BL.c ****                         /*  Make sure that dataOffset is valid before copying the data */\r
-1080:.\Generated_Source\PSoC5/BL.c ****                         if((dataOffset + pktSize) <= BL_SIZEOF_COMMAND_BUFFER)\r
-1081:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1082:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
-1083:.\Generated_Source\PSoC5/BL.c **** \r
-1084:.\Generated_Source\PSoC5/BL.c ****                             #if(CY_PSOC3)\r
-1085:.\Generated_Source\PSoC5/BL.c ****                                 (void) memcpy(&dataBuffer[dataOffset],\r
-1086:.\Generated_Source\PSoC5/BL.c ****                                               &packetBuffer[BL_DATA_ADDR],\r
-1087:.\Generated_Source\PSoC5/BL.c ****                                               ( int16 )pktSize);\r
-1088:.\Generated_Source\PSoC5/BL.c ****                             #else\r
-1089:.\Generated_Source\PSoC5/BL.c ****                                 (void) memcpy(&dataBuffer[dataOffset],\r
-1090:.\Generated_Source\PSoC5/BL.c ****                                               &packetBuffer[BL_DATA_ADDR],\r
-1091:.\Generated_Source\PSoC5/BL.c ****                                               pktSize);\r
-1092:.\Generated_Source\PSoC5/BL.c ****                             #endif  /* (CY_PSOC3) */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 21\r
-\r
-\r
-1093:.\Generated_Source\PSoC5/BL.c **** \r
-1094:.\Generated_Source\PSoC5/BL.c ****                             dataOffset += pktSize;\r
-1095:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1096:.\Generated_Source\PSoC5/BL.c ****                         else\r
-1097:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1098:.\Generated_Source\PSoC5/BL.c ****                             ackCode = BL_ERR_LENGTH;\r
-1099:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1100:.\Generated_Source\PSoC5/BL.c ****                     }\r
-1101:.\Generated_Source\PSoC5/BL.c **** \r
-1102:.\Generated_Source\PSoC5/BL.c ****                     break;\r
-1103:.\Generated_Source\PSoC5/BL.c **** \r
-1104:.\Generated_Source\PSoC5/BL.c ****             #endif  /* (0u != BL_CMD_SEND_DATA_AVAIL) */\r
-1105:.\Generated_Source\PSoC5/BL.c **** \r
-1106:.\Generated_Source\PSoC5/BL.c **** \r
-1107:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1108:.\Generated_Source\PSoC5/BL.c ****             *   Enter bootloader\r
-1109:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1110:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_ENTER:\r
-1111:.\Generated_Source\PSoC5/BL.c **** \r
-1112:.\Generated_Source\PSoC5/BL.c ****                 if(pktSize == 0u)\r
-1113:.\Generated_Source\PSoC5/BL.c ****                 {\r
-1114:.\Generated_Source\PSoC5/BL.c ****                     #if(CY_PSOC3)\r
-1115:.\Generated_Source\PSoC5/BL.c **** \r
-1116:.\Generated_Source\PSoC5/BL.c ****                         BL_ENTER CYDATA BtldrVersion =\r
-1117:.\Generated_Source\PSoC5/BL.c ****                             {CYSWAP_ENDIAN32(CYDEV_CHIP_JTAG_ID), CYDEV_CHIP_REV_EXPECT, BL_VERSION\r
-1118:.\Generated_Source\PSoC5/BL.c **** \r
-1119:.\Generated_Source\PSoC5/BL.c ****                     #else\r
-1120:.\Generated_Source\PSoC5/BL.c **** \r
-1121:.\Generated_Source\PSoC5/BL.c ****                         BL_ENTER CYDATA BtldrVersion =\r
-1122:.\Generated_Source\PSoC5/BL.c ****                             {CYDEV_CHIP_JTAG_ID, CYDEV_CHIP_REV_EXPECT, BL_VERSION};\r
-1123:.\Generated_Source\PSoC5/BL.c **** \r
-1124:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (CY_PSOC3) */\r
-1125:.\Generated_Source\PSoC5/BL.c **** \r
-1126:.\Generated_Source\PSoC5/BL.c ****                     communicationState = BL_COMMUNICATION_STATE_ACTIVE;\r
-1127:.\Generated_Source\PSoC5/BL.c **** \r
-1128:.\Generated_Source\PSoC5/BL.c ****                     rspSize = sizeof(BL_ENTER);\r
-1129:.\Generated_Source\PSoC5/BL.c **** \r
-1130:.\Generated_Source\PSoC5/BL.c ****                     #if(CY_PSOC3)\r
-1131:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-1132:.\Generated_Source\PSoC5/BL.c ****                                       &BtldrVersion,\r
-1133:.\Generated_Source\PSoC5/BL.c ****                                       ( int16 )rspSize);\r
-1134:.\Generated_Source\PSoC5/BL.c ****                     #else\r
-1135:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-1136:.\Generated_Source\PSoC5/BL.c ****                                       &BtldrVersion,\r
-1137:.\Generated_Source\PSoC5/BL.c ****                                       rspSize);\r
-1138:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (CY_PSOC3) */\r
-1139:.\Generated_Source\PSoC5/BL.c **** \r
-1140:.\Generated_Source\PSoC5/BL.c ****                     ackCode = CYRET_SUCCESS;\r
-1141:.\Generated_Source\PSoC5/BL.c ****                 }\r
-1142:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1143:.\Generated_Source\PSoC5/BL.c **** \r
-1144:.\Generated_Source\PSoC5/BL.c **** \r
-1145:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1146:.\Generated_Source\PSoC5/BL.c ****             *   Verify row\r
-1147:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1148:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_VERIFY:\r
-1149:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 22\r
-\r
-\r
-1150:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
-1151:.\Generated_Source\PSoC5/BL.c ****                 {\r
-1152:.\Generated_Source\PSoC5/BL.c ****                     /* Get FLASH/EEPROM row number */\r
-1153:.\Generated_Source\PSoC5/BL.c ****                     uint16 CYDATA rowNum = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)\r
-1154:.\Generated_Source\PSoC5/BL.c ****                                                     packetBuffer[BL_DATA_ADDR + 1u];\r
-1155:.\Generated_Source\PSoC5/BL.c **** \r
-1156:.\Generated_Source\PSoC5/BL.c ****                     #if(!CY_PSOC4)\r
-1157:.\Generated_Source\PSoC5/BL.c **** \r
-1158:.\Generated_Source\PSoC5/BL.c ****                         uint32 CYDATA rowAddr;\r
-1159:.\Generated_Source\PSoC5/BL.c ****                         uint8 CYDATA checksum;\r
-1160:.\Generated_Source\PSoC5/BL.c **** \r
-1161:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
-1162:.\Generated_Source\PSoC5/BL.c ****                            (btldrData <= BL_LAST_EE_ARRAYID))\r
-1163:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1164:.\Generated_Source\PSoC5/BL.c ****                             /* EEPROM */\r
-1165:.\Generated_Source\PSoC5/BL.c ****                             /* Both PSoC 3 and PSoC 5LP architectures have one EEPROM array. */\r
-1166:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = (uint32)rowNum * CYDEV_EEPROM_ROW_SIZE;\r
-1167:.\Generated_Source\PSoC5/BL.c **** \r
-1168:.\Generated_Source\PSoC5/BL.c ****                             checksum = BL_Calc8BitEepromSum(rowAddr, CYDEV_EEPROM_ROW_SIZE);\r
-1169:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1170:.\Generated_Source\PSoC5/BL.c ****                         else\r
-1171:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1172:.\Generated_Source\PSoC5/BL.c ****                             /* FLASH */\r
-1173:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = ((uint32)btldrData * CYDEV_FLS_SECTOR_SIZE)\r
-1174:.\Generated_Source\PSoC5/BL.c ****                                        + ((uint32)rowNum * CYDEV_FLS_ROW_SIZE);\r
-1175:.\Generated_Source\PSoC5/BL.c **** \r
-1176:.\Generated_Source\PSoC5/BL.c ****                             checksum = BL_Calc8BitFlashSum(rowAddr, CYDEV_FLS_ROW_SIZE);\r
-1177:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1178:.\Generated_Source\PSoC5/BL.c **** \r
-1179:.\Generated_Source\PSoC5/BL.c ****                     #else\r
-1180:.\Generated_Source\PSoC5/BL.c **** \r
-1181:.\Generated_Source\PSoC5/BL.c ****                         uint32 CYDATA rowAddr = ((uint32)btldrData * CYDEV_FLS_SECTOR_SIZE)\r
-1182:.\Generated_Source\PSoC5/BL.c ****                                             + ((uint32)rowNum * CYDEV_FLS_ROW_SIZE);\r
-1183:.\Generated_Source\PSoC5/BL.c **** \r
-1184:.\Generated_Source\PSoC5/BL.c ****                         uint8 CYDATA checksum = BL_Calc8BitFlashSum(rowAddr, CYDEV_FLS_ROW_SIZE);\r
-1185:.\Generated_Source\PSoC5/BL.c **** \r
-1186:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (!CY_PSOC4) */\r
-1187:.\Generated_Source\PSoC5/BL.c **** \r
-1188:.\Generated_Source\PSoC5/BL.c **** \r
-1189:.\Generated_Source\PSoC5/BL.c ****                     /* Calculate checksum on data from ECC */\r
-1190:.\Generated_Source\PSoC5/BL.c ****                     #if(!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u)\r
-1191:.\Generated_Source\PSoC5/BL.c **** \r
-1192:.\Generated_Source\PSoC5/BL.c ****                         if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
-1193:.\Generated_Source\PSoC5/BL.c ****                         {\r
-1194:.\Generated_Source\PSoC5/BL.c ****                             uint16 CYDATA tmpIndex;\r
-1195:.\Generated_Source\PSoC5/BL.c **** \r
-1196:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = CYDEV_ECC_BASE + ((uint32)btldrData * (CYDEV_FLS_SECTOR_SIZE \r
-1197:.\Generated_Source\PSoC5/BL.c ****                                         + ((uint32)rowNum * CYDEV_ECC_ROW_SIZE);\r
-1198:.\Generated_Source\PSoC5/BL.c **** \r
-1199:.\Generated_Source\PSoC5/BL.c ****                             for(tmpIndex = 0u; tmpIndex < CYDEV_ECC_ROW_SIZE; tmpIndex++)\r
-1200:.\Generated_Source\PSoC5/BL.c ****                             {\r
-1201:.\Generated_Source\PSoC5/BL.c ****                                 checksum += CY_GET_XTND_REG8((uint8 CYFAR *)(rowAddr + tmpIndex));\r
-1202:.\Generated_Source\PSoC5/BL.c ****                             }\r
-1203:.\Generated_Source\PSoC5/BL.c ****                         }\r
-1204:.\Generated_Source\PSoC5/BL.c **** \r
-1205:.\Generated_Source\PSoC5/BL.c ****                     #endif  /* (!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u) */\r
-1206:.\Generated_Source\PSoC5/BL.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 23\r
-\r
-\r
-1207:.\Generated_Source\PSoC5/BL.c **** \r
-1208:.\Generated_Source\PSoC5/BL.c ****                     /******************************************************************************\r
-1209:.\Generated_Source\PSoC5/BL.c ****                     * App Verified & App Active are information that is updated in flash at runtime\r
-1210:.\Generated_Source\PSoC5/BL.c ****                     * remove these items from the checksum to allow the host to verify everything i\r
-1211:.\Generated_Source\PSoC5/BL.c ****                     * correct.\r
-1212:.\Generated_Source\PSoC5/BL.c ****                      ******************************************************************************\r
-1213:.\Generated_Source\PSoC5/BL.c ****                     if((BL_MD_FLASH_ARRAY_NUM == btldrData) &&\r
-1214:.\Generated_Source\PSoC5/BL.c ****                        (BL_CONTAIN_METADATA(rowNum)))\r
-1215:.\Generated_Source\PSoC5/BL.c ****                     {\r
-1216:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_ACTIVE_VALUE  (BL_GET_APP_ID(rowNum));\r
-1217:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_VERIFIED_VALUE(BL_GET_APP_ID(rowNum));\r
-1218:.\Generated_Source\PSoC5/BL.c ****                     }\r
-1219:.\Generated_Source\PSoC5/BL.c **** \r
-1220:.\Generated_Source\PSoC5/BL.c ****                     packetBuffer[BL_DATA_ADDR] = (uint8)1u + (uint8)(~checksum);\r
-1221:.\Generated_Source\PSoC5/BL.c ****                     ackCode = CYRET_SUCCESS;\r
-1222:.\Generated_Source\PSoC5/BL.c ****                     rspSize = 1u;\r
-1223:.\Generated_Source\PSoC5/BL.c ****                 }\r
-1224:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1225:.\Generated_Source\PSoC5/BL.c **** \r
-1226:.\Generated_Source\PSoC5/BL.c **** \r
-1227:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1228:.\Generated_Source\PSoC5/BL.c ****             *   Exit bootloader\r
-1229:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1230:.\Generated_Source\PSoC5/BL.c ****             case BL_COMMAND_EXIT:\r
-1231:.\Generated_Source\PSoC5/BL.c **** \r
-1232:.\Generated_Source\PSoC5/BL.c ****                 if(CYRET_SUCCESS == BL_ValidateBootloadable(BL_activeApp))\r
-1233:.\Generated_Source\PSoC5/BL.c ****                 {\r
-1234:.\Generated_Source\PSoC5/BL.c ****                     BL_SET_RUN_TYPE(BL_START_APP);\r
-1235:.\Generated_Source\PSoC5/BL.c ****                 }\r
-1236:.\Generated_Source\PSoC5/BL.c **** \r
-1237:.\Generated_Source\PSoC5/BL.c ****                 CySoftwareReset();\r
-1238:.\Generated_Source\PSoC5/BL.c **** \r
-1239:.\Generated_Source\PSoC5/BL.c ****                 /* Will never get here */\r
-1240:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1241:.\Generated_Source\PSoC5/BL.c **** \r
-1242:.\Generated_Source\PSoC5/BL.c **** \r
-1243:.\Generated_Source\PSoC5/BL.c ****             /***************************************************************************\r
-1244:.\Generated_Source\PSoC5/BL.c ****             *   Unsupported command\r
-1245:.\Generated_Source\PSoC5/BL.c ****             ***************************************************************************/\r
-1246:.\Generated_Source\PSoC5/BL.c ****             default:\r
-1247:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_CMD;\r
-1248:.\Generated_Source\PSoC5/BL.c ****                 break;\r
-1249:.\Generated_Source\PSoC5/BL.c ****             }\r
-1250:.\Generated_Source\PSoC5/BL.c ****         }\r
-1251:.\Generated_Source\PSoC5/BL.c **** \r
-1252:.\Generated_Source\PSoC5/BL.c ****         /* ?CK the packet and function. */\r
-1253:.\Generated_Source\PSoC5/BL.c ****         (void) BL_WritePacket(ackCode, packetBuffer, rspSize);\r
-1254:.\Generated_Source\PSoC5/BL.c **** \r
-1255:.\Generated_Source\PSoC5/BL.c ****     } while ((0u == timeOut) || (BL_COMMUNICATION_STATE_ACTIVE == communicationState));\r
-1256:.\Generated_Source\PSoC5/BL.c **** }\r
-1257:.\Generated_Source\PSoC5/BL.c **** \r
-1258:.\Generated_Source\PSoC5/BL.c **** \r
-1259:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-1260:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_WritePacket\r
-1261:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
-1262:.\Generated_Source\PSoC5/BL.c **** *\r
-1263:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 24\r
-\r
-\r
-1264:.\Generated_Source\PSoC5/BL.c **** *  Creates a bootloader responce packet and transmits it back to the bootloader\r
-1265:.\Generated_Source\PSoC5/BL.c **** *  host application over the already established communications protocol.\r
-1266:.\Generated_Source\PSoC5/BL.c **** *\r
-1267:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
-1268:.\Generated_Source\PSoC5/BL.c **** *  status:\r
-1269:.\Generated_Source\PSoC5/BL.c **** *      The status code to pass back as the second byte of the packet\r
-1270:.\Generated_Source\PSoC5/BL.c **** *  buffer:\r
-1271:.\Generated_Source\PSoC5/BL.c **** *      The buffer containing the data portion of the packet\r
-1272:.\Generated_Source\PSoC5/BL.c **** *  size:\r
-1273:.\Generated_Source\PSoC5/BL.c **** *      The number of bytes contained within the buffer to pass back\r
-1274:.\Generated_Source\PSoC5/BL.c **** *\r
-1275:.\Generated_Source\PSoC5/BL.c **** * Return:\r
-1276:.\Generated_Source\PSoC5/BL.c **** *   CYRET_SUCCESS if successful.\r
-1277:.\Generated_Source\PSoC5/BL.c **** *   CYRET_UNKNOWN if there was an error tranmitting the packet.\r
-1278:.\Generated_Source\PSoC5/BL.c **** *\r
-1279:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
-1280:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_WritePacket(uint8 status, uint8 buffer[], uint16 size) CYSMALL \\r
-1281:.\Generated_Source\PSoC5/BL.c ****                                             \r
-1282:.\Generated_Source\PSoC5/BL.c **** {\r
-1283:.\Generated_Source\PSoC5/BL.c ****     uint16 CYDATA checksum;\r
-1284:.\Generated_Source\PSoC5/BL.c **** \r
-1285:.\Generated_Source\PSoC5/BL.c ****     /* Start of the packet. */\r
-1286:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SOP_ADDR]      = BL_SOP;\r
-1287:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CMD_ADDR]      = status;\r
-1288:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SIZE_ADDR]     = LO8(size);\r
-1289:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SIZE_ADDR + 1u] = HI8(size);\r
-1290:.\Generated_Source\PSoC5/BL.c **** \r
-1291:.\Generated_Source\PSoC5/BL.c ****     /* Compute the checksum. */\r
-1292:.\Generated_Source\PSoC5/BL.c ****     checksum = BL_CalcPacketChecksum(buffer, size + BL_DATA_ADDR);\r
-1293:.\Generated_Source\PSoC5/BL.c **** \r
-1294:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(size)]     = LO8(checksum);\r
-1295:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(1u + size)] = HI8(checksum);\r
-1296:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_EOP_ADDR(size)]     = BL_EOP;\r
-1297:.\Generated_Source\PSoC5/BL.c **** \r
-1298:.\Generated_Source\PSoC5/BL.c ****     /* Start the packet transmit. */\r
-1299:.\Generated_Source\PSoC5/BL.c ****     return(CyBtldrCommWrite(buffer, size + BL_MIN_PKT_SIZE, &size, 150u));\r
-1300:.\Generated_Source\PSoC5/BL.c **** }\r
-1301:.\Generated_Source\PSoC5/BL.c **** \r
-1302:.\Generated_Source\PSoC5/BL.c **** \r
-1303:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-1304:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_SetFlashByte\r
-1305:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
-1306:.\Generated_Source\PSoC5/BL.c **** *\r
-1307:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
-1308:.\Generated_Source\PSoC5/BL.c **** *  Writes byte a flash memory location\r
-1309:.\Generated_Source\PSoC5/BL.c **** *\r
-1310:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
-1311:.\Generated_Source\PSoC5/BL.c **** *  address:\r
-1312:.\Generated_Source\PSoC5/BL.c **** *      Address in Flash memory where data will be written\r
-1313:.\Generated_Source\PSoC5/BL.c **** *\r
-1314:.\Generated_Source\PSoC5/BL.c **** *  runType:\r
-1315:.\Generated_Source\PSoC5/BL.c **** *      Byte to be written\r
-1316:.\Generated_Source\PSoC5/BL.c **** *\r
-1317:.\Generated_Source\PSoC5/BL.c **** * Return:\r
-1318:.\Generated_Source\PSoC5/BL.c **** *  None\r
-1319:.\Generated_Source\PSoC5/BL.c **** *\r
-1320:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 25\r
-\r
-\r
-1321:.\Generated_Source\PSoC5/BL.c **** void BL_SetFlashByte(uint32 address, uint8 runType) \r
-1322:.\Generated_Source\PSoC5/BL.c **** {\r
-1323:.\Generated_Source\PSoC5/BL.c ****     uint32 flsAddr = address - CYDEV_FLASH_BASE;\r
-1324:.\Generated_Source\PSoC5/BL.c ****     uint8  rowData[CYDEV_FLS_ROW_SIZE];\r
-1325:.\Generated_Source\PSoC5/BL.c **** \r
-1326:.\Generated_Source\PSoC5/BL.c ****     #if !(CY_PSOC4)\r
-1327:.\Generated_Source\PSoC5/BL.c ****         uint8 arrayId = ( uint8 )(flsAddr / CYDEV_FLS_SECTOR_SIZE);\r
-1328:.\Generated_Source\PSoC5/BL.c ****     #endif  /* !(CY_PSOC4) */\r
-1329:.\Generated_Source\PSoC5/BL.c **** \r
-1330:.\Generated_Source\PSoC5/BL.c ****     uint16 rowNum = ( uint16 )((flsAddr % CYDEV_FLS_SECTOR_SIZE) / CYDEV_FLS_ROW_SIZE);\r
-1331:.\Generated_Source\PSoC5/BL.c ****     uint32 baseAddr = address - (address % CYDEV_FLS_ROW_SIZE);\r
-1332:.\Generated_Source\PSoC5/BL.c ****     uint16 idx;\r
-1333:.\Generated_Source\PSoC5/BL.c **** \r
-1334:.\Generated_Source\PSoC5/BL.c ****     for(idx = 0u; idx < CYDEV_FLS_ROW_SIZE; idx++)\r
-1335:.\Generated_Source\PSoC5/BL.c ****     {\r
-1336:.\Generated_Source\PSoC5/BL.c ****         rowData[idx] = BL_GET_CODE_BYTE(baseAddr + idx);\r
-1337:.\Generated_Source\PSoC5/BL.c ****     }\r
-1338:.\Generated_Source\PSoC5/BL.c **** \r
-1339:.\Generated_Source\PSoC5/BL.c ****     rowData[address % CYDEV_FLS_ROW_SIZE] = runType;\r
-1340:.\Generated_Source\PSoC5/BL.c **** \r
-1341:.\Generated_Source\PSoC5/BL.c ****     #if(CY_PSOC4)\r
-1342:.\Generated_Source\PSoC5/BL.c ****         (void) CySysFlashWriteRow((uint32) rowNum, rowData);\r
-1343:.\Generated_Source\PSoC5/BL.c ****     #else\r
-1344:.\Generated_Source\PSoC5/BL.c ****         (void) CyWriteRowData(arrayId, rowNum, rowData);\r
-1345:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (CY_PSOC4) */\r
-1346:.\Generated_Source\PSoC5/BL.c **** }\r
-1347:.\Generated_Source\PSoC5/BL.c **** \r
-1348:.\Generated_Source\PSoC5/BL.c **** \r
-1349:.\Generated_Source\PSoC5/BL.c **** /*******************************************************************************\r
-1350:.\Generated_Source\PSoC5/BL.c **** * Function Name: BL_GetMetadata\r
-1351:.\Generated_Source\PSoC5/BL.c **** ********************************************************************************\r
-1352:.\Generated_Source\PSoC5/BL.c **** *\r
-1353:.\Generated_Source\PSoC5/BL.c **** * Summary:\r
-1354:.\Generated_Source\PSoC5/BL.c **** *  Returns value of the multi-byte field.\r
-1355:.\Generated_Source\PSoC5/BL.c **** *\r
-1356:.\Generated_Source\PSoC5/BL.c **** * Parameters:\r
-1357:.\Generated_Source\PSoC5/BL.c **** *  fieldName:\r
-1358:.\Generated_Source\PSoC5/BL.c **** *   The field to get data from:\r
-1359:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDB_ADDR\r
-1360:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDR_LAST_ROW\r
-1361:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDB_LENGTH\r
-1362:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDR_APP_VERSION\r
-1363:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDB_APP_VERSION\r
-1364:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDB_APP_ID\r
-1365:.\Generated_Source\PSoC5/BL.c **** *     BL_GET_METADATA_BTLDB_APP_CUST_ID\r
-1366:.\Generated_Source\PSoC5/BL.c **** *\r
-1367:.\Generated_Source\PSoC5/BL.c **** *  appId:\r
-1368:.\Generated_Source\PSoC5/BL.c **** *   Number of the bootlodable application.\r
-1369:.\Generated_Source\PSoC5/BL.c **** *\r
-1370:.\Generated_Source\PSoC5/BL.c **** * Return:\r
-1371:.\Generated_Source\PSoC5/BL.c **** *  None\r
-1372:.\Generated_Source\PSoC5/BL.c **** *\r
-1373:.\Generated_Source\PSoC5/BL.c **** *******************************************************************************/\r
-1374:.\Generated_Source\PSoC5/BL.c **** static uint32 BL_GetMetadata(uint8 fieldName, uint8 appId)\r
-  49                           .loc 1 1374 0\r
-  50                           .cfi_startproc\r
-  51                           @ args = 0, pretend = 0, frame = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 26\r
-\r
-\r
-  52                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  53                   .LVL1:\r
-1375:.\Generated_Source\PSoC5/BL.c **** {\r
-1376:.\Generated_Source\PSoC5/BL.c ****     uint32 fieldPtr;\r
-1377:.\Generated_Source\PSoC5/BL.c ****     uint8  fieldSize = 2u;\r
-1378:.\Generated_Source\PSoC5/BL.c ****     uint32 result;\r
-1379:.\Generated_Source\PSoC5/BL.c **** \r
-1380:.\Generated_Source\PSoC5/BL.c ****     switch (fieldName)\r
-  54                           .loc 1 1380 0\r
-  55 0000 431E                 subs    r3, r0, #1\r
-1374:.\Generated_Source\PSoC5/BL.c **** static uint32 BL_GetMetadata(uint8 fieldName, uint8 appId)\r
-  56                           .loc 1 1374 0\r
-  57 0002 10B5                 push    {r4, lr}\r
-  58                   .LCFI0:\r
-  59                           .cfi_def_cfa_offset 8\r
-  60                           .cfi_offset 4, -8\r
-  61                           .cfi_offset 14, -4\r
-1374:.\Generated_Source\PSoC5/BL.c **** static uint32 BL_GetMetadata(uint8 fieldName, uint8 appId)\r
-  62                           .loc 1 1374 0\r
-  63 0004 0246                 mov     r2, r0\r
-  64                           .loc 1 1380 0\r
-  65 0006 062B                 cmp     r3, #6\r
-  66 0008 0DD8                 bhi     .L3\r
-  67 000a DFE803F0             tbb     [pc, r3]\r
-  68                   .L11:\r
-  69 000e 06                   .byte   (.L4-.L11)/2\r
-  70 000f 0E                   .byte   (.L16-.L11)/2\r
-  71 0010 23                   .byte   (.L17-.L11)/2\r
-  72 0011 04                   .byte   (.L7-.L11)/2\r
-  73 0012 08                   .byte   (.L8-.L11)/2\r
-  74 0013 0A                   .byte   (.L9-.L11)/2\r
-  75 0014 21                   .byte   (.L10-.L11)/2\r
-  76 0015 00                   .align  1\r
-  77                   .L7:\r
-1381:.\Generated_Source\PSoC5/BL.c ****     {\r
-1382:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_APP_CUST_ID:\r
-1383:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_APP_CUST_ID_OFFSET(appId);\r
-1384:.\Generated_Source\PSoC5/BL.c ****         fieldSize = 4u;\r
-1385:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1386:.\Generated_Source\PSoC5/BL.c **** \r
-1387:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDR_APP_VERSION:\r
-1388:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDR_APP_VERSION_OFFSET(appId);\r
-  78                           .loc 1 1388 0\r
-  79 0016 1648                 ldr     r0, .L26\r
-  80                   .LVL2:\r
-  81 0018 08E0                 b       .L5\r
-  82                   .LVL3:\r
-  83                   .L4:\r
-1389:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1390:.\Generated_Source\PSoC5/BL.c **** \r
-1391:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_ADDR:\r
-1392:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_ADDR_OFFSET(appId);\r
-  84                           .loc 1 1392 0\r
-  85 001a 164B                 ldr     r3, .L26+4\r
-  86 001c 1BE0                 b       .L6\r
-  87                   .L8:\r
-  88                   .LVL4:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 27\r
-\r
-\r
-1393:.\Generated_Source\PSoC5/BL.c ****     #if(!CY_PSOC3)\r
-1394:.\Generated_Source\PSoC5/BL.c ****         fieldSize = 4u;\r
-1395:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (!CY_PSOC3) */\r
-1396:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1397:.\Generated_Source\PSoC5/BL.c **** \r
-1398:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDR_LAST_ROW:\r
-1399:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDR_LAST_ROW_OFFSET(appId);\r
-1400:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1401:.\Generated_Source\PSoC5/BL.c **** \r
-1402:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_LENGTH:\r
-1403:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_LENGTH_OFFSET(appId);\r
-1404:.\Generated_Source\PSoC5/BL.c ****     #if(!CY_PSOC3)\r
-1405:.\Generated_Source\PSoC5/BL.c ****         fieldSize = 4u;\r
-1406:.\Generated_Source\PSoC5/BL.c ****     #endif  /* (!CY_PSOC3) */\r
-1407:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1408:.\Generated_Source\PSoC5/BL.c **** \r
-1409:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_APP_VERSION:\r
-1410:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_APP_VERSION_OFFSET(appId);\r
-  89                           .loc 1 1410 0\r
-  90 001e 1648                 ldr     r0, .L26+8\r
-  91                   .LVL5:\r
-  92 0020 04E0                 b       .L5\r
-  93                   .LVL6:\r
-  94                   .L9:\r
-1411:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1412:.\Generated_Source\PSoC5/BL.c **** \r
-1413:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_APP_ID:\r
-1414:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_APP_ID_OFFSET(appId);\r
-  95                           .loc 1 1414 0\r
-  96 0022 1648                 ldr     r0, .L26+12\r
-  97                   .LVL7:\r
-  98 0024 02E0                 b       .L5\r
-  99                   .LVL8:\r
- 100                   .L3:\r
-1415:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1416:.\Generated_Source\PSoC5/BL.c **** \r
-1417:.\Generated_Source\PSoC5/BL.c ****     default:\r
-1418:.\Generated_Source\PSoC5/BL.c ****         /* Should never be here */\r
-1419:.\Generated_Source\PSoC5/BL.c ****         CYASSERT(0u != 0u);\r
-1420:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = 0u;\r
- 101                           .loc 1 1420 0\r
- 102 0026 0020                 movs    r0, #0\r
- 103                   .LVL9:\r
- 104 0028 00E0                 b       .L5\r
- 105                   .LVL10:\r
- 106                   .L16:\r
-1399:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDR_LAST_ROW_OFFSET(appId);\r
- 107                           .loc 1 1399 0\r
- 108 002a 1548                 ldr     r0, .L26+16\r
- 109                   .LVL11:\r
- 110                   .L5:\r
-1421:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1422:.\Generated_Source\PSoC5/BL.c ****     }\r
-1423:.\Generated_Source\PSoC5/BL.c **** \r
-1424:.\Generated_Source\PSoC5/BL.c **** \r
-1425:.\Generated_Source\PSoC5/BL.c ****     /* Read all fields as big-endian */\r
-1426:.\Generated_Source\PSoC5/BL.c ****     if (2u == fieldSize)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 28\r
-\r
-\r
-1427:.\Generated_Source\PSoC5/BL.c ****     {\r
-1428:.\Generated_Source\PSoC5/BL.c ****         result =  (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u));\r
- 111                           .loc 1 1428 0\r
- 112 002c 4178                 ldrb    r1, [r0, #1]    @ zero_extendqisi2\r
- 113                   .LVL12:\r
-1429:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *) fieldPtr      ) <<  8u;\r
- 114                           .loc 1 1429 0\r
- 115 002e 0078                 ldrb    r0, [r0, #0]    @ zero_extendqisi2\r
- 116                   .LVL13:\r
- 117 0030 41EA0020             orr     r0, r1, r0, lsl #8\r
- 118                   .LVL14:\r
- 119                   .L15:\r
-1430:.\Generated_Source\PSoC5/BL.c ****     }\r
-1431:.\Generated_Source\PSoC5/BL.c ****     else\r
-1432:.\Generated_Source\PSoC5/BL.c ****     {\r
-1433:.\Generated_Source\PSoC5/BL.c ****         result =  (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 3u));\r
-1434:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 2u)) <<  8u;\r
-1435:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u)) << 16u;\r
-1436:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr     )) << 24u;\r
-1437:.\Generated_Source\PSoC5/BL.c ****     }\r
-1438:.\Generated_Source\PSoC5/BL.c **** \r
-1439:.\Generated_Source\PSoC5/BL.c ****     /* Following fields should be little-endian */\r
-1440:.\Generated_Source\PSoC5/BL.c **** #if(!CY_PSOC3)\r
-1441:.\Generated_Source\PSoC5/BL.c ****     switch (fieldName)\r
- 120                           .loc 1 1441 0\r
- 121 0034 022A                 cmp     r2, #2\r
- 122 0036 04D0                 beq     .L14\r
- 123 0038 032A                 cmp     r2, #3\r
- 124 003a 07D0                 beq     .L13\r
- 125 003c 012A                 cmp     r2, #1\r
- 126 003e 15D1                 bne     .L24\r
- 127 0040 04E0                 b       .L13\r
- 128                   .L14:\r
-1442:.\Generated_Source\PSoC5/BL.c ****     {\r
-1443:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDR_LAST_ROW:\r
-1444:.\Generated_Source\PSoC5/BL.c ****         result = CYSWAP_ENDIAN16(result);\r
- 129                           .loc 1 1444 0\r
- 130 0042 0202                 lsls    r2, r0, #8\r
- 131 0044 42EA1023             orr     r3, r2, r0, lsr #8\r
- 132 0048 98B2                 uxth    r0, r3\r
- 133                   .LVL15:\r
- 134 004a 10BD                 pop     {r4, pc}\r
- 135                   .L13:\r
- 136 004c 00BA                 rev     r0, r0\r
- 137                   .LVL16:\r
- 138 004e 10BD                 pop     {r4, pc}\r
- 139                   .LVL17:\r
- 140                   .L10:\r
-1383:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_APP_CUST_ID_OFFSET(appId);\r
- 141                           .loc 1 1383 0\r
- 142 0050 0C4B                 ldr     r3, .L26+20\r
- 143 0052 00E0                 b       .L6\r
- 144                   .L17:\r
-1403:.\Generated_Source\PSoC5/BL.c ****         fieldPtr  = BL_MD_BTLDB_LENGTH_OFFSET(appId);\r
- 145                           .loc 1 1403 0\r
- 146 0054 0C4B                 ldr     r3, .L26+24\r
- 147                   .L6:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 29\r
-\r
-\r
- 148                   .LVL18:\r
-1433:.\Generated_Source\PSoC5/BL.c ****         result =  (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 3u));\r
- 149                           .loc 1 1433 0\r
- 150 0056 D878                 ldrb    r0, [r3, #3]    @ zero_extendqisi2\r
- 151                   .LVL19:\r
-1434:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 2u)) <<  8u;\r
- 152                           .loc 1 1434 0\r
- 153 0058 9C78                 ldrb    r4, [r3, #2]    @ zero_extendqisi2\r
- 154                   .LVL20:\r
-1435:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u)) << 16u;\r
- 155                           .loc 1 1435 0\r
- 156 005a 5978                 ldrb    r1, [r3, #1]    @ zero_extendqisi2\r
- 157                   .LVL21:\r
-1436:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr     )) << 24u;\r
- 158                           .loc 1 1436 0\r
- 159 005c 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 160                   .LVL22:\r
-1434:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 2u)) <<  8u;\r
- 161                           .loc 1 1434 0\r
- 162 005e 40EA0360             orr     r0, r0, r3, lsl #24\r
- 163                   .LVL23:\r
-1435:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u)) << 16u;\r
- 164                           .loc 1 1435 0\r
- 165 0062 40EA0423             orr     r3, r0, r4, lsl #8\r
-1436:.\Generated_Source\PSoC5/BL.c ****         result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr     )) << 24u;\r
- 166                           .loc 1 1436 0\r
- 167 0066 43EA0140             orr     r0, r3, r1, lsl #16\r
- 168                   .LVL24:\r
- 169 006a E3E7                 b       .L15\r
- 170                   .LVL25:\r
- 171                   .L24:\r
-1445:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1446:.\Generated_Source\PSoC5/BL.c **** \r
-1447:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_ADDR:\r
-1448:.\Generated_Source\PSoC5/BL.c ****     case BL_GET_METADATA_BTLDB_LENGTH:\r
-1449:.\Generated_Source\PSoC5/BL.c ****         result = CYSWAP_ENDIAN32(result);\r
-1450:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1451:.\Generated_Source\PSoC5/BL.c **** \r
-1452:.\Generated_Source\PSoC5/BL.c ****     default:\r
-1453:.\Generated_Source\PSoC5/BL.c ****         break;\r
-1454:.\Generated_Source\PSoC5/BL.c ****     }\r
-1455:.\Generated_Source\PSoC5/BL.c **** \r
-1456:.\Generated_Source\PSoC5/BL.c **** #endif  /* (!CY_PSOC3) */\r
-1457:.\Generated_Source\PSoC5/BL.c **** \r
-1458:.\Generated_Source\PSoC5/BL.c ****     return (result);\r
-1459:.\Generated_Source\PSoC5/BL.c **** }\r
- 172                           .loc 1 1459 0\r
- 173 006c 10BD                 pop     {r4, pc}\r
- 174                   .L27:\r
- 175 006e 00BF                 .align  2\r
- 176                   .L26:\r
- 177 0070 D2FF0100             .word   131026\r
- 178 0074 C1FF0100             .word   131009\r
- 179 0078 D6FF0100             .word   131030\r
- 180 007c D4FF0100             .word   131028\r
- 181 0080 C5FF0100             .word   131013\r
- 182 0084 D8FF0100             .word   131032\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 30\r
-\r
-\r
- 183 0088 C9FF0100             .word   131017\r
- 184                           .cfi_endproc\r
- 185                   .LFE69:\r
- 186                           .size   BL_GetMetadata.constprop.1, .-BL_GetMetadata.constprop.1\r
- 187                           .section        .text.BL_ValidateBootloadable.constprop.0,"ax",%progbits\r
- 188                           .align  1\r
- 189                           .thumb\r
- 190                           .thumb_func\r
- 191                           .type   BL_ValidateBootloadable.constprop.0, %function\r
- 192                   BL_ValidateBootloadable.constprop.0:\r
- 193                   .LFB70:\r
- 501:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
- 194                           .loc 1 501 0\r
- 195                           .cfi_startproc\r
- 196                           @ args = 0, pretend = 0, frame = 0\r
- 197                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 198                   .LVL26:\r
- 199 0000 70B5                 push    {r4, r5, r6, lr}\r
- 200                   .LCFI1:\r
- 201                           .cfi_def_cfa_offset 16\r
- 202                           .cfi_offset 4, -16\r
- 203                           .cfi_offset 5, -12\r
- 204                           .cfi_offset 6, -8\r
- 205                           .cfi_offset 14, -4\r
- 506:.\Generated_Source\PSoC5/BL.c ****         uint32 CYDATA end   = BL_FIRST_APP_BYTE(appId) +\r
- 206                           .loc 1 506 0\r
- 207 0002 0220                 movs    r0, #2\r
- 208 0004 FFF7FEFF             bl      BL_GetMetadata.constprop.1\r
- 209                   .LVL27:\r
- 210 0008 0646                 mov     r6, r0\r
- 507:.\Generated_Source\PSoC5/BL.c ****                                 BL_GetMetadata(BL_GET_METADATA_BTLDB_LENGTH,\r
- 211                           .loc 1 507 0\r
- 212 000a 0320                 movs    r0, #3\r
- 213 000c FFF7FEFF             bl      BL_GetMetadata.constprop.1\r
- 214                   .LVL28:\r
- 506:.\Generated_Source\PSoC5/BL.c ****         uint32 CYDATA end   = BL_FIRST_APP_BYTE(appId) +\r
- 215                           .loc 1 506 0\r
- 216 0010 711C                 adds    r1, r6, #1\r
- 217 0012 00EB0126             add     r6, r0, r1, lsl #8\r
- 218                   .LVL29:\r
- 535:.\Generated_Source\PSoC5/BL.c ****         for(idx = BL_FIRST_APP_BYTE(appId); idx < end; ++idx)\r
- 219                           .loc 1 535 0\r
- 220 0016 0220                 movs    r0, #2\r
- 221 0018 FFF7FEFF             bl      BL_GetMetadata.constprop.1\r
- 222                   .LVL30:\r
- 511:.\Generated_Source\PSoC5/BL.c ****         uint8  CYDATA calcedChecksum = 0u;\r
- 223                           .loc 1 511 0\r
- 224 001c 0024                 movs    r4, #0\r
- 535:.\Generated_Source\PSoC5/BL.c ****         for(idx = BL_FIRST_APP_BYTE(appId); idx < end; ++idx)\r
- 225                           .loc 1 535 0\r
- 226 001e 0130                 adds    r0, r0, #1\r
- 227 0020 0102                 lsls    r1, r0, #8\r
- 228                   .LVL31:\r
- 510:.\Generated_Source\PSoC5/BL.c ****         CYBIT         valid = 0u; /* Assume bad flash image */\r
- 229                           .loc 1 510 0\r
- 230 0022 2546                 mov     r5, r4\r
- 231                   .LVL32:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 31\r
-\r
-\r
- 232                   .L29:\r
- 535:.\Generated_Source\PSoC5/BL.c ****         for(idx = BL_FIRST_APP_BYTE(appId); idx < end; ++idx)\r
- 233                           .loc 1 535 0\r
- 234 0024 B142                 cmp     r1, r6\r
- 235 0026 09D2                 bcs     .L44\r
- 236                   .L31:\r
- 237                   .LBB3:\r
- 537:.\Generated_Source\PSoC5/BL.c ****             uint8 CYDATA curByte = BL_GET_CODE_BYTE(idx);\r
- 238                           .loc 1 537 0\r
- 239 0028 11F8010B             ldrb    r0, [r1], #1    @ zero_extendqisi2\r
- 240                   .LVL33:\r
- 539:.\Generated_Source\PSoC5/BL.c ****             if((curByte != 0u) && (curByte != 0xFFu))\r
- 241                           .loc 1 539 0\r
- 242 002c 421E                 subs    r2, r0, #1\r
- 243 002e D3B2                 uxtb    r3, r2\r
- 544:.\Generated_Source\PSoC5/BL.c ****             calcedChecksum += curByte;\r
- 244                           .loc 1 544 0\r
- 245 0030 0419                 adds    r4, r0, r4\r
- 246                   .LVL34:\r
- 541:.\Generated_Source\PSoC5/BL.c ****                 valid = 1u;\r
- 247                           .loc 1 541 0\r
- 248 0032 FD2B                 cmp     r3, #253\r
- 249 0034 98BF                 it      ls\r
- 250 0036 0125                 movls   r5, #1\r
- 251                   .LVL35:\r
- 544:.\Generated_Source\PSoC5/BL.c ****             calcedChecksum += curByte;\r
- 252                           .loc 1 544 0\r
- 253 0038 E4B2                 uxtb    r4, r4\r
- 254                   .LVL36:\r
- 255 003a F3E7                 b       .L29\r
- 256                   .LVL37:\r
- 257                   .L44:\r
- 258                   .LBE3:\r
- 558:.\Generated_Source\PSoC5/BL.c ****             idx = ((BL_FIRST_APP_BYTE(appId)) >> 3u);\r
- 259                           .loc 1 558 0\r
- 260 003c 0220                 movs    r0, #2\r
- 261 003e FFF7FEFF             bl      BL_GetMetadata.constprop.1\r
- 262                   .LVL38:\r
- 563:.\Generated_Source\PSoC5/BL.c ****                 : (end >> 3u);\r
- 263                           .loc 1 563 0\r
- 264 0042 0F49                 ldr     r1, .L46\r
- 558:.\Generated_Source\PSoC5/BL.c ****             idx = ((BL_FIRST_APP_BYTE(appId)) >> 3u);\r
- 265                           .loc 1 558 0\r
- 266 0044 421C                 adds    r2, r0, #1\r
- 267 0046 1302                 lsls    r3, r2, #8\r
- 268 0048 DB08                 lsrs    r3, r3, #3\r
- 269                   .LVL39:\r
- 563:.\Generated_Source\PSoC5/BL.c ****                 : (end >> 3u);\r
- 270                           .loc 1 563 0\r
- 271 004a 8E42                 cmp     r6, r1\r
- 272 004c 01D0                 beq     .L39\r
- 273 004e F608                 lsrs    r6, r6, #3\r
- 274                   .LVL40:\r
- 275 0050 01E0                 b       .L43\r
- 276                   .LVL41:\r
- 277                   .L39:\r
- 278 0052 4FF48046             mov     r6, #16384\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 32\r
-\r
-\r
- 279                   .LVL42:\r
- 280                   .L43:\r
- 565:.\Generated_Source\PSoC5/BL.c ****             for (; idx < end; ++idx)\r
- 281                           .loc 1 565 0\r
- 282 0056 B342                 cmp     r3, r6\r
- 283 0058 06D2                 bcs     .L45\r
- 284                   .L34:\r
- 501:.\Generated_Source\PSoC5/BL.c **** static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
- 285                           .loc 1 501 0\r
- 286 005a 03F19041             add     r1, r3, #1207959552\r
- 567:.\Generated_Source\PSoC5/BL.c ****                 calcedChecksum += CY_GET_XTND_REG8((volatile uint8 *)(CYDEV_ECC_BASE + idx));\r
- 287                           .loc 1 567 0\r
- 288 005e 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 565:.\Generated_Source\PSoC5/BL.c ****             for (; idx < end; ++idx)\r
- 289                           .loc 1 565 0\r
- 290 0060 0133                 adds    r3, r3, #1\r
- 291                   .LVL43:\r
- 567:.\Generated_Source\PSoC5/BL.c ****                 calcedChecksum += CY_GET_XTND_REG8((volatile uint8 *)(CYDEV_ECC_BASE + idx));\r
- 292                           .loc 1 567 0\r
- 293 0062 0219                 adds    r2, r0, r4\r
- 294 0064 D4B2                 uxtb    r4, r2\r
- 295                   .LVL44:\r
- 296 0066 F6E7                 b       .L43\r
- 297                   .LVL45:\r
- 298                   .L45:\r
- 575:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != BL_MD_BTLDB_CHECKSUM_VALUE(appId)) ||\r
- 299                           .loc 1 575 0\r
- 300 0068 0548                 ldr     r0, .L46\r
- 573:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
- 301                           .loc 1 573 0\r
- 302 006a 6442                 negs    r4, r4\r
- 303                   .LVL46:\r
- 575:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != BL_MD_BTLDB_CHECKSUM_VALUE(appId)) ||\r
- 304                           .loc 1 575 0\r
- 305 006c 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 306 006e E4B2                 uxtb    r4, r4\r
- 307                   .LVL47:\r
- 308 0070 9442                 cmp     r4, r2\r
- 309 0072 01D0                 beq     .L35\r
- 310                   .L37:\r
- 578:.\Generated_Source\PSoC5/BL.c ****             return(CYRET_BAD_DATA);\r
- 311                           .loc 1 578 0\r
- 312 0074 0620                 movs    r0, #6\r
- 313 0076 70BD                 pop     {r4, r5, r6, pc}\r
- 314                   .L35:\r
- 575:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != BL_MD_BTLDB_CHECKSUM_VALUE(appId)) ||\r
- 315                           .loc 1 575 0\r
- 316 0078 002D                 cmp     r5, #0\r
- 317 007a FBD0                 beq     .L37\r
- 588:.\Generated_Source\PSoC5/BL.c ****         return(CYRET_SUCCESS);\r
- 318                           .loc 1 588 0\r
- 319 007c 0020                 movs    r0, #0\r
- 589:.\Generated_Source\PSoC5/BL.c **** }\r
- 320                           .loc 1 589 0\r
- 321 007e 70BD                 pop     {r4, r5, r6, pc}\r
- 322                   .L47:\r
- 323                           .align  2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 33\r
-\r
-\r
- 324                   .L46:\r
- 325 0080 C0FF0100             .word   131008\r
- 326                           .cfi_endproc\r
- 327                   .LFE70:\r
- 328                           .size   BL_ValidateBootloadable.constprop.0, .-BL_ValidateBootloadable.constprop.0\r
- 329                           .section        .text.BL_HostLink,"ax",%progbits\r
- 330                           .align  1\r
- 331                           .thumb\r
- 332                           .thumb_func\r
- 333                           .type   BL_HostLink, %function\r
- 334                   BL_HostLink:\r
- 335                   .LFB64:\r
- 611:.\Generated_Source\PSoC5/BL.c **** {\r
- 336                           .loc 1 611 0\r
- 337                           .cfi_startproc\r
- 338                           @ args = 0, pretend = 0, frame = 896\r
- 339                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 340                   .LVL48:\r
- 341 0000 2DE9F04F             push    {r4, r5, r6, r7, r8, r9, sl, fp, lr}\r
- 342                   .LCFI2:\r
- 343                           .cfi_def_cfa_offset 36\r
- 344                           .cfi_offset 4, -36\r
- 345                           .cfi_offset 5, -32\r
- 346                           .cfi_offset 6, -28\r
- 347                           .cfi_offset 7, -24\r
- 348                           .cfi_offset 8, -20\r
- 349                           .cfi_offset 9, -16\r
- 350                           .cfi_offset 10, -12\r
- 351                           .cfi_offset 11, -8\r
- 352                           .cfi_offset 14, -4\r
- 353 0004 ADF5617D             sub     sp, sp, #900\r
- 354                   .LCFI3:\r
- 355                           .cfi_def_cfa_offset 936\r
- 611:.\Generated_Source\PSoC5/BL.c **** {\r
- 356                           .loc 1 611 0\r
- 357 0008 8046                 mov     r8, r0\r
- 632:.\Generated_Source\PSoC5/BL.c ****     CyBtldrCommStart();\r
- 358                           .loc 1 632 0\r
- 359 000a FFF7FEFF             bl      USBFS_CyBtldrCommStart\r
- 360                   .LVL49:\r
- 635:.\Generated_Source\PSoC5/BL.c ****     CyGlobalIntEnable;\r
- 361                           .loc 1 635 0\r
- 362                   @ 635 ".\Generated_Source\PSoC5\BL.c" 1\r
- 363 000e 62B6                 CPSIE   i\r
- 364                   @ 0 "" 2\r
- 625:.\Generated_Source\PSoC5/BL.c ****     CYBIT     communicationState = BL_COMMUNICATION_STATE_IDLE;\r
- 365                           .loc 1 625 0\r
- 366                           .thumb\r
- 367 0010 0026                 movs    r6, #0\r
- 622:.\Generated_Source\PSoC5/BL.c ****         uint8 CYDATA clearedMetaData = 0u;\r
- 368                           .loc 1 622 0\r
- 369 0012 B246                 mov     sl, r6\r
- 619:.\Generated_Source\PSoC5/BL.c ****     uint8     CYDATA timeOutCnt = 10u;\r
- 370                           .loc 1 619 0\r
- 371 0014 4FF00A09             mov     r9, #10\r
- 618:.\Generated_Source\PSoC5/BL.c ****     uint16    CYDATA dataOffset = 0u;\r
- 372                           .loc 1 618 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 34\r
-\r
-\r
- 373 0018 3746                 mov     r7, r6\r
- 374                   .LVL50:\r
- 375                   .L128:\r
- 643:.\Generated_Source\PSoC5/BL.c ****             readStat = CyBtldrCommRead(packetBuffer,\r
- 376                           .loc 1 643 0\r
- 377 001a B8F1000F             cmp     r8, #0\r
- 378 001e 01D1                 bne     .L86\r
- 379                   .LVL51:\r
- 380                   .L112:\r
- 381 0020 FF23                 movs    r3, #255\r
- 382 0022 00E0                 b       .L50\r
- 383                   .LVL52:\r
- 384                   .L86:\r
- 385 0024 4346                 mov     r3, r8\r
- 386                   .LVL53:\r
- 387                   .L50:\r
- 643:.\Generated_Source\PSoC5/BL.c ****             readStat = CyBtldrCommRead(packetBuffer,\r
- 388                           .loc 1 643 0 is_stmt 0 discriminator 3\r
- 389 0026 4AA8                 add     r0, sp, #296\r
- 390 0028 4FF49671             mov     r1, #300\r
- 391 002c 01AA                 add     r2, sp, #4\r
- 392 002e FFF7FEFF             bl      USBFS_CyBtldrCommRead\r
- 393                   .LVL54:\r
- 647:.\Generated_Source\PSoC5/BL.c ****             if (0u != timeOut)\r
- 394                           .loc 1 647 0 is_stmt 1 discriminator 3\r
- 395 0032 B8F1000F             cmp     r8, #0\r
- 396 0036 03D0                 beq     .L51\r
- 649:.\Generated_Source\PSoC5/BL.c ****                 timeOutCnt--;\r
- 397                           .loc 1 649 0\r
- 398 0038 09F1FF39             add     r9, r9, #-1\r
- 399 003c 5FFA89F9             uxtb    r9, r9\r
- 400                   .LVL55:\r
- 401                   .L51:\r
- 652:.\Generated_Source\PSoC5/BL.c ****         } while ( (0u != timeOutCnt) && (readStat != CYRET_SUCCESS) );\r
- 402                           .loc 1 652 0\r
- 403 0040 B9F1000F             cmp     r9, #0\r
- 404 0044 02D0                 beq     .L52\r
- 652:.\Generated_Source\PSoC5/BL.c ****         } while ( (0u != timeOutCnt) && (readStat != CYRET_SUCCESS) );\r
- 405                           .loc 1 652 0 is_stmt 0 discriminator 1\r
- 406 0046 0028                 cmp     r0, #0\r
- 407 0048 E7D1                 bne     .L128\r
- 408 004a 01E0                 b       .L54\r
- 409                   .L52:\r
- 655:.\Generated_Source\PSoC5/BL.c ****         if( readStat != CYRET_SUCCESS )\r
- 410                           .loc 1 655 0 is_stmt 1\r
- 411 004c 0028                 cmp     r0, #0\r
- 412 004e 71D1                 bne     .L55\r
- 413                   .L54:\r
- 660:.\Generated_Source\PSoC5/BL.c ****         if((numberRead < BL_MIN_PKT_SIZE) ||\r
- 414                           .loc 1 660 0\r
- 415 0050 BDF80420             ldrh    r2, [sp, #4]\r
- 416 0054 062A                 cmp     r2, #6\r
- 417 0056 40F27B81             bls     .L90\r
- 660:.\Generated_Source\PSoC5/BL.c ****         if((numberRead < BL_MIN_PKT_SIZE) ||\r
- 418                           .loc 1 660 0 is_stmt 0 discriminator 1\r
- 419 005a 9DF82831             ldrb    r3, [sp, #296]  @ zero_extendqisi2\r
- 420 005e 012B                 cmp     r3, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 35\r
-\r
-\r
- 421 0060 40F07681             bne     .L90\r
- 667:.\Generated_Source\PSoC5/BL.c ****             pktSize = ((uint16)((uint16)packetBuffer[BL_SIZE_ADDR + 1u] << 8u)) |\r
- 422                           .loc 1 667 0 is_stmt 1\r
- 423 0064 9DF82A01             ldrb    r0, [sp, #298]  @ zero_extendqisi2\r
- 424                   .LVL56:\r
- 425 0068 9DF82B51             ldrb    r5, [sp, #299]  @ zero_extendqisi2\r
- 670:.\Generated_Source\PSoC5/BL.c ****             pktChecksum = ((uint16)((uint16)packetBuffer[BL_CHK_ADDR(pktSize) + 1u] << 8u)) |\r
- 426                           .loc 1 670 0\r
- 427 006c 4AA9                 add     r1, sp, #296\r
- 667:.\Generated_Source\PSoC5/BL.c ****             pktSize = ((uint16)((uint16)packetBuffer[BL_SIZE_ADDR + 1u] << 8u)) |\r
- 428                           .loc 1 667 0\r
- 429 006e 40EA0525             orr     r5, r0, r5, lsl #8\r
- 430                   .LVL57:\r
- 673:.\Generated_Source\PSoC5/BL.c ****             if((pktSize + BL_MIN_PKT_SIZE) > numberRead)\r
- 431                           .loc 1 673 0\r
- 432 0072 EC1D                 adds    r4, r5, #7\r
- 670:.\Generated_Source\PSoC5/BL.c ****             pktChecksum = ((uint16)((uint16)packetBuffer[BL_CHK_ADDR(pktSize) + 1u] << 8u)) |\r
- 433                           .loc 1 670 0\r
- 434 0074 4B19                 adds    r3, r1, r5\r
- 673:.\Generated_Source\PSoC5/BL.c ****             if((pktSize + BL_MIN_PKT_SIZE) > numberRead)\r
- 435                           .loc 1 673 0\r
- 436 0076 9442                 cmp     r4, r2\r
- 670:.\Generated_Source\PSoC5/BL.c ****             pktChecksum = ((uint16)((uint16)packetBuffer[BL_CHK_ADDR(pktSize) + 1u] << 8u)) |\r
- 437                           .loc 1 670 0\r
- 438 0078 5879                 ldrb    r0, [r3, #5]    @ zero_extendqisi2\r
- 671:.\Generated_Source\PSoC5/BL.c ****                                    packetBuffer[BL_CHK_ADDR(pktSize)];\r
- 439                           .loc 1 671 0\r
- 440 007a 1979                 ldrb    r1, [r3, #4]    @ zero_extendqisi2\r
- 441                   .LVL58:\r
- 673:.\Generated_Source\PSoC5/BL.c ****             if((pktSize + BL_MIN_PKT_SIZE) > numberRead)\r
- 442                           .loc 1 673 0\r
- 443 007c 00F26681             bhi     .L89\r
- 677:.\Generated_Source\PSoC5/BL.c ****             else if(packetBuffer[BL_EOP_ADDR(pktSize)] != BL_EOP)\r
- 444                           .loc 1 677 0\r
- 445 0080 9A79                 ldrb    r2, [r3, #6]    @ zero_extendqisi2\r
- 446 0082 172A                 cmp     r2, #23\r
- 447 0084 40F06481             bne     .L90\r
- 681:.\Generated_Source\PSoC5/BL.c ****             else if(pktChecksum != BL_CalcPacketChecksum(packetBuffer,\r
- 448                           .loc 1 681 0\r
- 449 0088 2B1D                 adds    r3, r5, #4\r
- 450 008a 9BB2                 uxth    r3, r3\r
- 451                   .LVL59:\r
- 157:.\Generated_Source\PSoC5/BL.c ****         uint16 CYDATA sum = 0u;\r
- 452                           .loc 1 157 0\r
- 453 008c 0022                 movs    r2, #0\r
- 454                   .LVL60:\r
- 455                   .L57:\r
- 456                   .LBB20:\r
- 457                   .LBB21:\r
- 159:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 458                           .loc 1 159 0\r
- 459 008e 3BB1                 cbz     r3, .L134\r
- 460                   .L58:\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 461                           .loc 1 161 0\r
- 462 0090 0DF22714             addw    r4, sp, #295\r
- 463 0094 E45C                 ldrb    r4, [r4, r3]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 36\r
-\r
-\r
- 162:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 464                           .loc 1 162 0\r
- 465 0096 013B                 subs    r3, r3, #1\r
- 466                   .LVL61:\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 467                           .loc 1 161 0\r
- 468 0098 1219                 adds    r2, r2, r4\r
- 469                   .LVL62:\r
- 470 009a 92B2                 uxth    r2, r2\r
- 471                   .LVL63:\r
- 162:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 472                           .loc 1 162 0\r
- 473 009c 9BB2                 uxth    r3, r3\r
- 474                   .LVL64:\r
- 475 009e F6E7                 b       .L57\r
- 476                   .L134:\r
- 165:.\Generated_Source\PSoC5/BL.c ****         return(( uint16 )1u + ( uint16 )(~sum));\r
- 477                           .loc 1 165 0\r
- 478 00a0 5242                 negs    r2, r2\r
- 479                   .LVL65:\r
- 480                   .LBE21:\r
- 481                   .LBE20:\r
- 681:.\Generated_Source\PSoC5/BL.c ****             else if(pktChecksum != BL_CalcPacketChecksum(packetBuffer,\r
- 482                           .loc 1 681 0\r
- 483 00a2 41EA0020             orr     r0, r1, r0, lsl #8\r
- 484                   .LVL66:\r
- 485 00a6 91B2                 uxth    r1, r2\r
- 486                   .LVL67:\r
- 487 00a8 8842                 cmp     r0, r1\r
- 488 00aa 40F05381             bne     .L91\r
- 489 00ae 4AE0                 b       .L135\r
- 490                   .LVL68:\r
- 491                   .L62:\r
- 492                   .LBB22:\r
- 761:.\Generated_Source\PSoC5/BL.c ****                     if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
- 493                           .loc 1 761 0\r
- 494 00b0 002E                 cmp     r6, #0\r
- 495 00b2 00F04D81             beq     .L90\r
- 761:.\Generated_Source\PSoC5/BL.c ****                     if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
- 496                           .loc 1 761 0 is_stmt 0 discriminator 1\r
- 497 00b6 012D                 cmp     r5, #1\r
- 498 00b8 4FF00004             mov     r4, #0\r
- 499 00bc 40F03C81             bne     .L96\r
- 764:.\Generated_Source\PSoC5/BL.c ****                         if(btldrData < BL_NUM_OF_FLASH_ARRAYS)\r
- 500                           .loc 1 764 0 is_stmt 1\r
- 501 00c0 BBF1010F             cmp     fp, #1\r
- 502 00c4 00F23881             bhi     .L96\r
- 503                   .LVL69:\r
- 504                   .LBB23:\r
- 774:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 2u] = LO8(CY_FLASH_NUMBER_ROWS - 1u);\r
- 505                           .loc 1 774 0\r
- 506 00c8 FF23                 movs    r3, #255\r
- 772:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR]      = LO8(startRow);\r
- 507                           .loc 1 772 0\r
- 508 00ca 8DF82C41             strb    r4, [sp, #300]\r
- 773:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 1u] = HI8(startRow);\r
- 509                           .loc 1 773 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 37\r
-\r
-\r
- 510 00ce 8DF82D41             strb    r4, [sp, #301]\r
- 778:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
- 511                           .loc 1 778 0\r
- 512 00d2 2546                 mov     r5, r4\r
- 513                   .LVL70:\r
- 774:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 2u] = LO8(CY_FLASH_NUMBER_ROWS - 1u);\r
- 514                           .loc 1 774 0\r
- 515 00d4 8DF82E31             strb    r3, [sp, #302]\r
- 775:.\Generated_Source\PSoC5/BL.c ****                             packetBuffer[BL_DATA_ADDR + 3u] = HI8(CY_FLASH_NUMBER_ROWS - 1u);\r
- 516                           .loc 1 775 0\r
- 517 00d8 8DF82F61             strb    r6, [sp, #303]\r
- 518                   .LVL71:\r
- 777:.\Generated_Source\PSoC5/BL.c ****                             rspSize = 4u;\r
- 519                           .loc 1 777 0\r
- 520 00dc 0424                 movs    r4, #4\r
- 521                   .LVL72:\r
- 522                   .L61:\r
- 523                   .LBE23:\r
- 524                   .LBE22:\r
- 525                   .LBB32:\r
- 526                   .LBB33:\r
-1286:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SOP_ADDR]      = BL_SOP;\r
- 527                           .loc 1 1286 0\r
- 528 00de 0120                 movs    r0, #1\r
-1289:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SIZE_ADDR + 1u] = HI8(size);\r
- 529                           .loc 1 1289 0\r
- 530 00e0 0022                 movs    r2, #0\r
-1292:.\Generated_Source\PSoC5/BL.c ****     checksum = BL_CalcPacketChecksum(buffer, size + BL_DATA_ADDR);\r
- 531                           .loc 1 1292 0\r
- 532 00e2 211D                 adds    r1, r4, #4\r
- 533 00e4 ADF80640             strh    r4, [sp, #6]    @ movhi\r
-1286:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SOP_ADDR]      = BL_SOP;\r
- 534                           .loc 1 1286 0\r
- 535 00e8 8DF82801             strb    r0, [sp, #296]\r
-1287:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CMD_ADDR]      = status;\r
- 536                           .loc 1 1287 0\r
- 537 00ec 8DF82951             strb    r5, [sp, #297]\r
-1288:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SIZE_ADDR]     = LO8(size);\r
- 538                           .loc 1 1288 0\r
- 539 00f0 8DF82A41             strb    r4, [sp, #298]\r
-1289:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_SIZE_ADDR + 1u] = HI8(size);\r
- 540                           .loc 1 1289 0\r
- 541 00f4 8DF82B21             strb    r2, [sp, #299]\r
-1292:.\Generated_Source\PSoC5/BL.c ****     checksum = BL_CalcPacketChecksum(buffer, size + BL_DATA_ADDR);\r
- 542                           .loc 1 1292 0\r
- 543 00f8 8BB2                 uxth    r3, r1\r
- 544                   .LVL73:\r
- 545                   .L82:\r
- 546                   .LBB34:\r
- 547                   .LBB35:\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 548                           .loc 1 161 0\r
- 549 00fa 0DF22710             addw    r0, sp, #295\r
- 550 00fe C15C                 ldrb    r1, [r0, r3]    @ zero_extendqisi2\r
- 162:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 551                           .loc 1 162 0\r
- 552 0100 013B                 subs    r3, r3, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 38\r
-\r
-\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 553                           .loc 1 161 0\r
- 554 0102 5218                 adds    r2, r2, r1\r
- 162:.\Generated_Source\PSoC5/BL.c ****             size--;\r
- 555                           .loc 1 162 0\r
- 556 0104 9BB2                 uxth    r3, r3\r
- 161:.\Generated_Source\PSoC5/BL.c ****             sum += buffer[size - 1u];\r
- 557                           .loc 1 161 0\r
- 558 0106 92B2                 uxth    r2, r2\r
- 559                   .LVL74:\r
- 159:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 560                           .loc 1 159 0\r
- 561 0108 002B                 cmp     r3, #0\r
- 562 010a F6D1                 bne     .L82\r
- 165:.\Generated_Source\PSoC5/BL.c ****         return(( uint16 )1u + ( uint16 )(~sum));\r
- 563                           .loc 1 165 0\r
- 564 010c 5042                 negs    r0, r2\r
- 565 010e 81B2                 uxth    r1, r0\r
- 566                   .LBE35:\r
- 567                   .LBE34:\r
-1295:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(1u + size)] = HI8(checksum);\r
- 568                           .loc 1 1295 0\r
- 569 0110 080A                 lsrs    r0, r1, #8\r
-1294:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(size)]     = LO8(checksum);\r
- 570                           .loc 1 1294 0\r
- 571 0112 4BAA                 add     r2, sp, #300\r
- 572                   .LVL75:\r
-1295:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(1u + size)] = HI8(checksum);\r
- 573                           .loc 1 1295 0\r
- 574 0114 0DF22D13             addw    r3, sp, #301\r
- 575                   .LVL76:\r
-1294:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(size)]     = LO8(checksum);\r
- 576                           .loc 1 1294 0\r
- 577 0118 1155                 strb    r1, [r2, r4]\r
-1295:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_CHK_ADDR(1u + size)] = HI8(checksum);\r
- 578                           .loc 1 1295 0\r
- 579 011a 1855                 strb    r0, [r3, r4]\r
-1296:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_EOP_ADDR(size)]     = BL_EOP;\r
- 580                           .loc 1 1296 0\r
- 581 011c 1721                 movs    r1, #23\r
- 582 011e 0DF59772             add     r2, sp, #302\r
-1299:.\Generated_Source\PSoC5/BL.c ****     return(CyBtldrCommWrite(buffer, size + BL_MIN_PKT_SIZE, &size, 150u));\r
- 583                           .loc 1 1299 0\r
- 584 0122 E31D                 adds    r3, r4, #7\r
-1296:.\Generated_Source\PSoC5/BL.c ****     buffer[BL_EOP_ADDR(size)]     = BL_EOP;\r
- 585                           .loc 1 1296 0\r
- 586 0124 1155                 strb    r1, [r2, r4]\r
-1299:.\Generated_Source\PSoC5/BL.c ****     return(CyBtldrCommWrite(buffer, size + BL_MIN_PKT_SIZE, &size, 150u));\r
- 587                           .loc 1 1299 0\r
- 588 0126 4AA8                 add     r0, sp, #296\r
- 589                   .LVL77:\r
- 590 0128 99B2                 uxth    r1, r3\r
- 591 012a 0DF10602             add     r2, sp, #6\r
- 592 012e 9623                 movs    r3, #150\r
- 593 0130 FFF7FEFF             bl      USBFS_CyBtldrCommWrite\r
- 594                   .LVL78:\r
- 595                   .L55:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 39\r
-\r
-\r
- 596                   .LBE33:\r
- 597                   .LBE32:\r
-1255:.\Generated_Source\PSoC5/BL.c ****     } while ((0u == timeOut) || (BL_COMMUNICATION_STATE_ACTIVE == communicationState));\r
- 598                           .loc 1 1255 0\r
- 599 0134 B8F1000F             cmp     r8, #0\r
- 600 0138 3FF472AF             beq     .L112\r
-1255:.\Generated_Source\PSoC5/BL.c ****     } while ((0u == timeOut) || (BL_COMMUNICATION_STATE_ACTIVE == communicationState));\r
- 601                           .loc 1 1255 0 is_stmt 0 discriminator 1\r
- 602 013c 002E                 cmp     r6, #0\r
- 603 013e 00F01281             beq     .L136\r
- 604                   .LVL79:\r
- 605                   .L84:\r
-1029:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
- 606                           .loc 1 1029 0 is_stmt 1\r
- 607 0142 0126                 movs    r6, #1\r
- 608 0144 69E7                 b       .L128\r
- 609                   .LVL80:\r
- 610                   .L135:\r
- 611                   .LBB36:\r
- 698:.\Generated_Source\PSoC5/BL.c ****             switch(packetBuffer[BL_CMD_ADDR])\r
- 612                           .loc 1 698 0\r
- 613 0146 9DF82921             ldrb    r2, [sp, #297]  @ zero_extendqisi2\r
- 614                   .LVL81:\r
- 695:.\Generated_Source\PSoC5/BL.c ****             uint8 CYDATA btldrData = packetBuffer[BL_DATA_ADDR];\r
- 615                           .loc 1 695 0\r
- 616 014a 9DF82CB1             ldrb    fp, [sp, #300]  @ zero_extendqisi2\r
- 617                   .LVL82:\r
- 698:.\Generated_Source\PSoC5/BL.c ****             switch(packetBuffer[BL_CMD_ADDR])\r
- 618                           .loc 1 698 0\r
- 619 014e A2F13103             sub     r3, r2, #49\r
- 620                   .LVL83:\r
- 621 0152 0A2B                 cmp     r3, #10\r
- 622 0154 00F2F780             bhi     .L110\r
- 623 0158 01A1                 adr     r1, .L85\r
- 624 015a 51F823F0             ldr     pc, [r1, r3, lsl #2]\r
- 625 015e 00BF                 .align  2\r
- 626                   .L85:\r
- 627 0160 8D010000             .word   .L60+1\r
- 628 0164 B1000000             .word   .L62+1\r
- 629 0168 47030000             .word   .L110+1\r
- 630 016c AB010000             .word   .L63+1\r
- 631 0170 5D020000             .word   .L69+1\r
- 632 0174 47030000             .word   .L110+1\r
- 633 0178 63020000             .word   .L71+1\r
- 634 017c 81020000             .word   .L72+1\r
- 635 0180 AB010000             .word   .L63+1\r
- 636 0184 9B020000             .word   .L73+1\r
- 637 0188 27030000             .word   .L80+1\r
- 638                   .L60:\r
- 743:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 0u))\r
- 639                           .loc 1 743 0\r
- 640 018c 002E                 cmp     r6, #0\r
- 641 018e 00F0DF80             beq     .L90\r
- 743:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 0u))\r
- 642                           .loc 1 743 0 is_stmt 0 discriminator 1\r
- 643 0192 002D                 cmp     r5, #0\r
- 644 0194 40F0DC80             bne     .L90\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 40\r
-\r
-\r
- 746:.\Generated_Source\PSoC5/BL.c ****                             (uint8)(BL_ValidateBootloadable(BL_activeApp) == CYRET_SUCCESS);\r
- 645                           .loc 1 746 0 is_stmt 1\r
- 646 0198 FFF7FEFF             bl      BL_ValidateBootloadable.constprop.0\r
- 647                   .LVL84:\r
- 648 019c D0F10102             rsbs    r2, r0, #1\r
- 649 01a0 38BF                 it      cc\r
- 650 01a2 0022                 movcc   r2, #0\r
- 651 01a4 8DF82C21             strb    r2, [sp, #300]\r
- 652                   .LVL85:\r
- 653 01a8 BBE0                 b       .L132\r
- 654                   .LVL86:\r
- 655                   .L63:\r
- 825:.\Generated_Source\PSoC5/BL.c ****                 if (BL_COMMAND_ERASE == packetBuffer[BL_CMD_ADDR])\r
- 656                           .loc 1 825 0\r
- 657 01aa 342A                 cmp     r2, #52\r
- 658 01ac 12D1                 bne     .L64\r
- 827:.\Generated_Source\PSoC5/BL.c ****                     if ((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
- 659                           .loc 1 827 0\r
- 660 01ae 002E                 cmp     r6, #0\r
- 661 01b0 00F0CE80             beq     .L90\r
- 827:.\Generated_Source\PSoC5/BL.c ****                     if ((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
- 662                           .loc 1 827 0 is_stmt 0 discriminator 1\r
- 663 01b4 032D                 cmp     r5, #3\r
- 664 01b6 40F0CB80             bne     .L90\r
- 830:.\Generated_Source\PSoC5/BL.c ****                             if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 665                           .loc 1 830 0 is_stmt 1\r
- 666 01ba ABF14007             sub     r7, fp, #64\r
- 834:.\Generated_Source\PSoC5/BL.c ****                                 dataOffset = CY_EEPROM_SIZEOF_ROW;\r
- 667                           .loc 1 834 0\r
- 668 01be 3F2F                 cmp     r7, #63\r
- 669 01c0 8CBF                 ite     hi\r
- 670 01c2 4FF49077             movhi   r7, #288\r
- 671 01c6 1027                 movls   r7, #16\r
- 672                   .LVL87:\r
- 849:.\Generated_Source\PSoC5/BL.c ****                             (void) memset(dataBuffer, 0, dataOffset);\r
- 673                           .loc 1 849 0\r
- 674 01c8 95A8                 add     r0, sp, #596\r
- 675 01ca 0021                 movs    r1, #0\r
- 676 01cc 3A46                 mov     r2, r7\r
- 677 01ce FFF7FEFF             bl      memset\r
- 678                   .LVL88:\r
- 679 01d2 05E0                 b       .L66\r
- 680                   .LVL89:\r
- 681                   .L64:\r
- 861:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize >= 3u))\r
- 682                           .loc 1 861 0\r
- 683 01d4 002E                 cmp     r6, #0\r
- 684 01d6 00F0BB80             beq     .L90\r
- 861:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize >= 3u))\r
- 685                           .loc 1 861 0 is_stmt 0 discriminator 1\r
- 686 01da 022D                 cmp     r5, #2\r
- 687 01dc 40F2B880             bls     .L90\r
- 688                   .LVL90:\r
- 689                   .L66:\r
- 870:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&dataBuffer[dataOffset],\r
- 690                           .loc 1 870 0 is_stmt 1\r
- 691 01e0 033D                 subs    r5, r5, #3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 41\r
-\r
-\r
- 692                   .LVL91:\r
- 693 01e2 95AB                 add     r3, sp, #596\r
- 694 01e4 2A46                 mov     r2, r5\r
- 695 01e6 D819                 adds    r0, r3, r7\r
- 696 01e8 0DF22F11             addw    r1, sp, #303\r
- 697 01ec FFF7FEFF             bl      memcpy\r
- 698                   .LVL92:\r
- 878:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 699                           .loc 1 878 0\r
- 700 01f0 ABF14000             sub     r0, fp, #64\r
- 875:.\Generated_Source\PSoC5/BL.c ****                     dataOffset += (pktSize - 3u);\r
- 701                           .loc 1 875 0\r
- 702 01f4 7A19                 adds    r2, r7, r5\r
- 878:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 703                           .loc 1 878 0\r
- 704 01f6 3F28                 cmp     r0, #63\r
- 875:.\Generated_Source\PSoC5/BL.c ****                     dataOffset += (pktSize - 3u);\r
- 705                           .loc 1 875 0\r
- 706 01f8 96B2                 uxth    r6, r2\r
- 707                   .LVL93:\r
- 878:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 708                           .loc 1 878 0\r
- 709 01fa 03D8                 bhi     .L102\r
- 882:.\Generated_Source\PSoC5/BL.c ****                             CyEEPROM_Start();\r
- 710                           .loc 1 882 0\r
- 711 01fc FFF7FEFF             bl      CyEEPROM_Start\r
- 712                   .LVL94:\r
- 885:.\Generated_Source\PSoC5/BL.c ****                             pktSize = CY_EEPROM_SIZEOF_ROW;\r
- 713                           .loc 1 885 0\r
- 714 0200 1024                 movs    r4, #16\r
- 715 0202 01E0                 b       .L67\r
- 716                   .LVL95:\r
- 717                   .L102:\r
- 890:.\Generated_Source\PSoC5/BL.c ****                             pktSize = BL_FROW_SIZE;\r
- 718                           .loc 1 890 0\r
- 719 0204 4FF49074             mov     r4, #288\r
- 720                   .LVL96:\r
- 721                   .L67:\r
- 899:.\Generated_Source\PSoC5/BL.c ****                     if(dataOffset == pktSize)\r
- 722                           .loc 1 899 0\r
- 723 0208 A642                 cmp     r6, r4\r
- 724 020a 40F09780             bne     .L103\r
- 902:.\Generated_Source\PSoC5/BL.c ****                         dataOffset = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)) |\r
- 725                           .loc 1 902 0\r
- 726 020e 9DF82E11             ldrb    r1, [sp, #302]  @ zero_extendqisi2\r
- 727 0212 9DF82D71             ldrb    r7, [sp, #301]  @ zero_extendqisi2\r
- 906:.\Generated_Source\PSoC5/BL.c ****                             if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
- 728                           .loc 1 906 0\r
- 729 0216 BBF13F0F             cmp     fp, #63\r
- 902:.\Generated_Source\PSoC5/BL.c ****                         dataOffset = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)) |\r
- 730                           .loc 1 902 0\r
- 731 021a 47EA0125             orr     r5, r7, r1, lsl #8\r
- 732                   .LVL97:\r
- 906:.\Generated_Source\PSoC5/BL.c ****                             if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
- 733                           .loc 1 906 0\r
- 734 021e 11D8                 bhi     .L68\r
- 912:.\Generated_Source\PSoC5/BL.c ****                             if(0u == clearedMetaData)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 42\r
-\r
-\r
- 735                           .loc 1 912 0\r
- 736 0220 BAF1000F             cmp     sl, #0\r
- 737 0224 0ED1                 bne     .L68\r
- 738                   .LBB24:\r
- 921:.\Generated_Source\PSoC5/BL.c ****                                     (void) memset(erase, 0, BL_FROW_SIZE);\r
- 739                           .loc 1 921 0\r
- 740 0226 5146                 mov     r1, sl\r
- 741 0228 4FF49072             mov     r2, #288\r
- 742 022c 02A8                 add     r0, sp, #8\r
- 743 022e FFF7FEFF             bl      memset\r
- 744                   .LVL98:\r
- 927:.\Generated_Source\PSoC5/BL.c ****                                     (void) CyWriteRowFull((uint8)  BL_MD_FLASH_ARRAY_NUM,\r
- 745                           .loc 1 927 0\r
- 746 0232 0120                 movs    r0, #1\r
- 747 0234 FF21                 movs    r1, #255\r
- 748 0236 02AA                 add     r2, sp, #8\r
- 749 0238 4FF49073             mov     r3, #288\r
- 750 023c FFF7FEFF             bl      CyWriteRowFull\r
- 751                   .LVL99:\r
- 934:.\Generated_Source\PSoC5/BL.c ****                                 clearedMetaData = 1u;\r
- 752                           .loc 1 934 0\r
- 753 0240 4FF0010A             mov     sl, #1\r
- 754                   .LVL100:\r
- 755                   .L68:\r
- 756                   .LBE24:\r
-1002:.\Generated_Source\PSoC5/BL.c ****                             ackCode = (CYRET_SUCCESS != CyWriteRowFull(btldrData, dataOffset, dataB\r
- 757                           .loc 1 1002 0\r
- 758 0244 3346                 mov     r3, r6\r
- 759 0246 5846                 mov     r0, fp\r
- 760 0248 2946                 mov     r1, r5\r
- 761 024a 95AA                 add     r2, sp, #596\r
- 762 024c FFF7FEFF             bl      CyWriteRowFull\r
- 763                   .LVL101:\r
- 764 0250 0126                 movs    r6, #1\r
- 765 0252 0028                 cmp     r0, #0\r
- 766 0254 75D0                 beq     .L104\r
-1014:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
- 767                           .loc 1 1014 0\r
- 768 0256 0027                 movs    r7, #0\r
-1002:.\Generated_Source\PSoC5/BL.c ****                             ackCode = (CYRET_SUCCESS != CyWriteRowFull(btldrData, dataOffset, dataB\r
- 769                           .loc 1 1002 0\r
- 770 0258 0A25                 movs    r5, #10\r
- 771                   .LVL102:\r
- 772 025a 75E0                 b       .L131\r
- 773                   .LVL103:\r
- 774                   .L69:\r
-1026:.\Generated_Source\PSoC5/BL.c ****                 if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
- 775                           .loc 1 1026 0\r
- 776 025c 002E                 cmp     r6, #0\r
- 777 025e 77D0                 beq     .L90\r
- 778 0260 7AE0                 b       .L70\r
- 779                   .L71:\r
-1077:.\Generated_Source\PSoC5/BL.c ****                     if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
- 780                           .loc 1 1077 0\r
- 781 0262 002E                 cmp     r6, #0\r
- 782 0264 74D0                 beq     .L90\r
-1080:.\Generated_Source\PSoC5/BL.c ****                         if((dataOffset + pktSize) <= BL_SIZEOF_COMMAND_BUFFER)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 43\r
-\r
-\r
- 783                           .loc 1 1080 0\r
- 784 0266 7C19                 adds    r4, r7, r5\r
- 785 0268 B4F5967F             cmp     r4, #300\r
- 786 026c 6ED8                 bhi     .L89\r
- 787                   .LVL104:\r
-1089:.\Generated_Source\PSoC5/BL.c ****                                 (void) memcpy(&dataBuffer[dataOffset],\r
- 788                           .loc 1 1089 0\r
- 789 026e 95A9                 add     r1, sp, #596\r
- 790 0270 C819                 adds    r0, r1, r7\r
- 791 0272 2A46                 mov     r2, r5\r
- 792 0274 4BA9                 add     r1, sp, #300\r
- 793                   .LVL105:\r
- 794 0276 FFF7FEFF             bl      memcpy\r
- 795                   .LVL106:\r
-1094:.\Generated_Source\PSoC5/BL.c ****                             dataOffset += pktSize;\r
- 796                           .loc 1 1094 0\r
- 797 027a A7B2                 uxth    r7, r4\r
- 798                   .LVL107:\r
- 799                   .L133:\r
-1082:.\Generated_Source\PSoC5/BL.c ****                             ackCode = CYRET_SUCCESS;\r
- 800                           .loc 1 1082 0\r
- 801 027c 0025                 movs    r5, #0\r
- 802 027e 63E0                 b       .L131\r
- 803                   .LVL108:\r
- 804                   .L72:\r
-1112:.\Generated_Source\PSoC5/BL.c ****                 if(pktSize == 0u)\r
- 805                           .loc 1 1112 0\r
- 806 0280 002D                 cmp     r5, #0\r
- 807 0282 65D1                 bne     .L90\r
- 808                   .LBB25:\r
-1121:.\Generated_Source\PSoC5/BL.c ****                         BL_ENTER CYDATA BtldrVersion =\r
- 809                           .loc 1 1121 0\r
- 810 0284 3A48                 ldr     r0, .L138\r
- 811 0286 02AE                 add     r6, sp, #8\r
-1135:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
- 812                           .loc 1 1135 0\r
- 813 0288 4BAC                 add     r4, sp, #300\r
- 814                   .LVL109:\r
-1121:.\Generated_Source\PSoC5/BL.c ****                         BL_ENTER CYDATA BtldrVersion =\r
- 815                           .loc 1 1121 0\r
- 816 028a 03C8                 ldmia   r0, {r0, r1}\r
- 817 028c 86E80300             stmia   r6, {r0, r1}\r
- 818                   .LVL110:\r
-1135:.\Generated_Source\PSoC5/BL.c ****                         (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
- 819                           .loc 1 1135 0\r
- 820 0290 84E80300             stmia   r4, {r0, r1}\r
- 821                   .LVL111:\r
-1126:.\Generated_Source\PSoC5/BL.c ****                     communicationState = BL_COMMUNICATION_STATE_ACTIVE;\r
- 822                           .loc 1 1126 0\r
- 823 0294 0126                 movs    r6, #1\r
-1128:.\Generated_Source\PSoC5/BL.c ****                     rspSize = sizeof(BL_ENTER);\r
- 824                           .loc 1 1128 0\r
- 825 0296 0824                 movs    r4, #8\r
- 826                   .LVL112:\r
- 827 0298 21E7                 b       .L61\r
- 828                   .LVL113:\r
- 829                   .L73:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 44\r
-\r
-\r
- 830                   .LBE25:\r
-1150:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
- 831                           .loc 1 1150 0\r
- 832 029a 002E                 cmp     r6, #0\r
- 833 029c 58D0                 beq     .L90\r
-1150:.\Generated_Source\PSoC5/BL.c ****                 if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
- 834                           .loc 1 1150 0 is_stmt 0 discriminator 1\r
- 835 029e 032D                 cmp     r5, #3\r
- 836 02a0 56D1                 bne     .L90\r
- 837                   .LBB26:\r
-1153:.\Generated_Source\PSoC5/BL.c ****                     uint16 CYDATA rowNum = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)\r
- 838                           .loc 1 1153 0 is_stmt 1\r
- 839 02a2 9DF82E01             ldrb    r0, [sp, #302]  @ zero_extendqisi2\r
- 840 02a6 9DF82D11             ldrb    r1, [sp, #301]  @ zero_extendqisi2\r
-1161:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 841                           .loc 1 1161 0\r
- 842 02aa ABF14002             sub     r2, fp, #64\r
- 843 02ae 3F2A                 cmp     r2, #63\r
-1153:.\Generated_Source\PSoC5/BL.c ****                     uint16 CYDATA rowNum = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)\r
- 844                           .loc 1 1153 0\r
- 845 02b0 41EA0025             orr     r5, r1, r0, lsl #8\r
- 846                   .LVL114:\r
-1161:.\Generated_Source\PSoC5/BL.c ****                         if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
- 847                           .loc 1 1161 0\r
- 848 02b4 0AD8                 bhi     .L74\r
-1166:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = (uint32)rowNum * CYDEV_EEPROM_ROW_SIZE;\r
- 849                           .loc 1 1166 0\r
- 850 02b6 2D01                 lsls    r5, r5, #4\r
- 851                   .LVL115:\r
- 227:.\Generated_Source\PSoC5/BL.c ****         uint8 CYDATA sum = 0u;\r
- 852                           .loc 1 227 0\r
- 853 02b8 0023                 movs    r3, #0\r
-1166:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = (uint32)rowNum * CYDEV_EEPROM_ROW_SIZE;\r
- 854                           .loc 1 1166 0\r
- 855 02ba 1022                 movs    r2, #16\r
- 856                   .LVL116:\r
- 857                   .L75:\r
- 858                   .LBB27:\r
- 859                   .LBB28:\r
- 610:.\Generated_Source\PSoC5/BL.c **** static void BL_HostLink(uint8 timeOut) \r
- 860                           .loc 1 610 0\r
- 861 02bc 2D48                 ldr     r0, .L138+4\r
- 862 02be 1118                 adds    r1, r2, r0\r
- 232:.\Generated_Source\PSoC5/BL.c ****             sum += BL_GET_EEPROM_BYTE(start + size);\r
- 863                           .loc 1 232 0\r
- 864 02c0 4C5D                 ldrb    r4, [r1, r5]    @ zero_extendqisi2\r
- 229:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 865                           .loc 1 229 0\r
- 866 02c2 013A                 subs    r2, r2, #1\r
- 867                   .LVL117:\r
- 232:.\Generated_Source\PSoC5/BL.c ****             sum += BL_GET_EEPROM_BYTE(start + size);\r
- 868                           .loc 1 232 0\r
- 869 02c4 2344                 add     r3, r3, r4\r
- 870 02c6 DBB2                 uxtb    r3, r3\r
- 871                   .LVL118:\r
- 229:.\Generated_Source\PSoC5/BL.c ****         while (size > 0u)\r
- 872                           .loc 1 229 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 45\r
-\r
-\r
- 873 02c8 F8D1                 bne     .L75\r
- 874 02ca 26E0                 b       .L79\r
- 875                   .LVL119:\r
- 876                   .L74:\r
- 877                   .LBE28:\r
- 878                   .LBE27:\r
-1174:.\Generated_Source\PSoC5/BL.c ****                                        + ((uint32)rowNum * CYDEV_FLS_ROW_SIZE);\r
- 879                           .loc 1 1174 0\r
- 880 02cc 05EB0B23             add     r3, r5, fp, lsl #8\r
-1173:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = ((uint32)btldrData * CYDEV_FLS_SECTOR_SIZE)\r
- 881                           .loc 1 1173 0\r
- 882 02d0 1C02                 lsls    r4, r3, #8\r
- 883                   .LVL120:\r
- 884 02d2 4FF48072             mov     r2, #256\r
- 192:.\Generated_Source\PSoC5/BL.c ****     uint8 CYDATA sum = 0u;\r
- 885                           .loc 1 192 0\r
- 886 02d6 0023                 movs    r3, #0\r
- 887                   .LVL121:\r
- 888                   .L77:\r
- 889                   .LBB29:\r
- 890                   .LBB30:\r
- 196:.\Generated_Source\PSoC5/BL.c ****         size--;\r
- 891                           .loc 1 196 0\r
- 892 02d8 013A                 subs    r2, r2, #1\r
- 893                   .LVL122:\r
- 197:.\Generated_Source\PSoC5/BL.c ****         sum += BL_GET_CODE_BYTE(start + size);\r
- 894                           .loc 1 197 0\r
- 895 02da 105D                 ldrb    r0, [r2, r4]    @ zero_extendqisi2\r
- 896 02dc 1918                 adds    r1, r3, r0\r
- 897 02de CBB2                 uxtb    r3, r1\r
- 898                   .LVL123:\r
- 194:.\Generated_Source\PSoC5/BL.c ****     while (size > 0u)\r
- 899                           .loc 1 194 0\r
- 900 02e0 002A                 cmp     r2, #0\r
- 901 02e2 F9D1                 bne     .L77\r
- 902                   .LVL124:\r
- 903                   .LBE30:\r
- 904                   .LBE29:\r
-1192:.\Generated_Source\PSoC5/BL.c ****                         if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
- 905                           .loc 1 1192 0\r
- 906 02e4 BBF13F0F             cmp     fp, #63\r
- 907 02e8 17D8                 bhi     .L79\r
- 908                   .LBB31:\r
-1197:.\Generated_Source\PSoC5/BL.c ****                                         + ((uint32)rowNum * CYDEV_ECC_ROW_SIZE);\r
- 909                           .loc 1 1197 0\r
- 910 02ea 0BF51034             add     r4, fp, #147456\r
- 911                   .LVL125:\r
- 912 02ee 05EB0420             add     r0, r5, r4, lsl #8\r
-1196:.\Generated_Source\PSoC5/BL.c ****                             rowAddr = CYDEV_ECC_BASE + ((uint32)btldrData * (CYDEV_FLS_SECTOR_SIZE \r
- 913                           .loc 1 1196 0\r
- 914 02f2 4101                 lsls    r1, r0, #5\r
- 915                   .LVL126:\r
- 916                   .L78:\r
-1201:.\Generated_Source\PSoC5/BL.c ****                                 checksum += CY_GET_XTND_REG8((uint8 CYFAR *)(rowAddr + tmpIndex));\r
- 917                           .loc 1 1201 0 discriminator 2\r
- 918 02f4 545C                 ldrb    r4, [r2, r1]    @ zero_extendqisi2\r
- 919 02f6 0132                 adds    r2, r2, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 46\r
-\r
-\r
- 920 02f8 1B19                 adds    r3, r3, r4\r
-1199:.\Generated_Source\PSoC5/BL.c ****                             for(tmpIndex = 0u; tmpIndex < CYDEV_ECC_ROW_SIZE; tmpIndex++)\r
- 921                           .loc 1 1199 0 discriminator 2\r
- 922 02fa 202A                 cmp     r2, #32\r
-1201:.\Generated_Source\PSoC5/BL.c ****                                 checksum += CY_GET_XTND_REG8((uint8 CYFAR *)(rowAddr + tmpIndex));\r
- 923                           .loc 1 1201 0 discriminator 2\r
- 924 02fc DBB2                 uxtb    r3, r3\r
- 925                   .LVL127:\r
-1199:.\Generated_Source\PSoC5/BL.c ****                             for(tmpIndex = 0u; tmpIndex < CYDEV_ECC_ROW_SIZE; tmpIndex++)\r
- 926                           .loc 1 1199 0 discriminator 2\r
- 927 02fe F9D1                 bne     .L78\r
- 928                   .LBE31:\r
-1213:.\Generated_Source\PSoC5/BL.c ****                     if((BL_MD_FLASH_ARRAY_NUM == btldrData) &&\r
- 929                           .loc 1 1213 0\r
- 930 0300 BBF1010F             cmp     fp, #1\r
- 931 0304 09D1                 bne     .L79\r
-1213:.\Generated_Source\PSoC5/BL.c ****                     if((BL_MD_FLASH_ARRAY_NUM == btldrData) &&\r
- 932                           .loc 1 1213 0 is_stmt 0 discriminator 1\r
- 933 0306 FF2D                 cmp     r5, #255\r
- 934 0308 07D1                 bne     .L79\r
-1216:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_ACTIVE_VALUE  (BL_GET_APP_ID(rowNum));\r
- 935                           .loc 1 1216 0 is_stmt 1\r
- 936 030a 1B4D                 ldr     r5, .L138+8\r
- 937                   .LVL128:\r
-1217:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_VERIFIED_VALUE(BL_GET_APP_ID(rowNum));\r
- 938                           .loc 1 1217 0\r
- 939 030c 1B4C                 ldr     r4, .L138+12\r
-1216:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_ACTIVE_VALUE  (BL_GET_APP_ID(rowNum));\r
- 940                           .loc 1 1216 0\r
- 941 030e 2878                 ldrb    r0, [r5, #0]    @ zero_extendqisi2\r
- 942 0310 191A                 subs    r1, r3, r0\r
- 943                   .LVL129:\r
-1217:.\Generated_Source\PSoC5/BL.c ****                         checksum -= BL_MD_BTLDB_VERIFIED_VALUE(BL_GET_APP_ID(rowNum));\r
- 944                           .loc 1 1217 0\r
- 945 0312 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 946 0314 CA1A                 subs    r2, r1, r3\r
- 947 0316 02F0FF03             and     r3, r2, #255\r
- 948                   .LVL130:\r
- 949                   .L79:\r
-1220:.\Generated_Source\PSoC5/BL.c ****                     packetBuffer[BL_DATA_ADDR] = (uint8)1u + (uint8)(~checksum);\r
- 950                           .loc 1 1220 0\r
- 951 031a 5D42                 negs    r5, r3\r
- 952 031c 8DF82C51             strb    r5, [sp, #300]\r
- 953                   .LVL131:\r
-1221:.\Generated_Source\PSoC5/BL.c ****                     ackCode = CYRET_SUCCESS;\r
- 954                           .loc 1 1221 0\r
- 955 0320 0025                 movs    r5, #0\r
- 956                   .LVL132:\r
- 957                   .L132:\r
-1222:.\Generated_Source\PSoC5/BL.c ****                     rspSize = 1u;\r
- 958                           .loc 1 1222 0\r
- 959 0322 0124                 movs    r4, #1\r
- 960 0324 DBE6                 b       .L61\r
- 961                   .LVL133:\r
- 962                   .L80:\r
- 963                   .LBE26:\r
-1232:.\Generated_Source\PSoC5/BL.c ****                 if(CYRET_SUCCESS == BL_ValidateBootloadable(BL_activeApp))\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 47\r
-\r
-\r
- 964                           .loc 1 1232 0\r
- 965 0326 FFF7FEFF             bl      BL_ValidateBootloadable.constprop.0\r
- 966                   .LVL134:\r
- 967 032a 10B9                 cbnz    r0, .L81\r
-1234:.\Generated_Source\PSoC5/BL.c ****                     BL_SET_RUN_TYPE(BL_START_APP);\r
- 968                           .loc 1 1234 0\r
- 969 032c 144D                 ldr     r5, .L138+16\r
- 970                   .LVL135:\r
- 971 032e 8024                 movs    r4, #128\r
- 972 0330 2C70                 strb    r4, [r5, #0]\r
- 973                   .L81:\r
-1237:.\Generated_Source\PSoC5/BL.c ****                 CySoftwareReset();\r
- 974                           .loc 1 1237 0\r
- 975 0332 FFF7FEFF             bl      CySoftwareReset\r
- 976                   .LVL136:\r
- 977 0336 0BE0                 b       .L90\r
- 978                   .LVL137:\r
- 979                   .L96:\r
- 697:.\Generated_Source\PSoC5/BL.c ****             ackCode = BL_ERR_DATA;\r
- 980                           .loc 1 697 0\r
- 981 0338 0425                 movs    r5, #4\r
- 982                   .LVL138:\r
- 983 033a D0E6                 b       .L61\r
- 984                   .LVL139:\r
- 985                   .L103:\r
- 899:.\Generated_Source\PSoC5/BL.c ****                     if(dataOffset == pktSize)\r
- 986                           .loc 1 899 0\r
- 987 033c 0126                 movs    r6, #1\r
- 988                   .LVL140:\r
-1014:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
- 989                           .loc 1 1014 0\r
- 990 033e 0027                 movs    r7, #0\r
- 991                   .LVL141:\r
- 992 0340 04E0                 b       .L89\r
- 993                   .LVL142:\r
- 994                   .L104:\r
- 995 0342 0746                 mov     r7, r0\r
- 996 0344 9AE7                 b       .L133\r
- 997                   .LVL143:\r
- 998                   .L110:\r
-1247:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_CMD;\r
- 999                           .loc 1 1247 0\r
- 1000 0346 0525                movs    r5, #5\r
- 1001                  .LVL144:\r
- 1002                  .L131:\r
- 692:.\Generated_Source\PSoC5/BL.c ****         rspSize = 0u;\r
- 1003                          .loc 1 692 0\r
- 1004 0348 0024                movs    r4, #0\r
- 1005 034a C8E6                b       .L61\r
- 1006                  .L89:\r
- 1007                  .LBE36:\r
- 675:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_LENGTH;\r
- 1008                          .loc 1 675 0\r
- 1009 034c 0325                movs    r5, #3\r
- 1010 034e FBE7                b       .L131\r
- 1011                  .L90:\r
- 663:.\Generated_Source\PSoC5/BL.c ****             ackCode = BL_ERR_DATA;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 48\r
-\r
-\r
- 1012                          .loc 1 663 0\r
- 1013 0350 0425                movs    r5, #4\r
- 1014 0352 F9E7                b       .L131\r
- 1015                  .LVL145:\r
- 1016                  .L91:\r
- 684:.\Generated_Source\PSoC5/BL.c ****                 ackCode = BL_ERR_CHECKSUM;\r
- 1017                          .loc 1 684 0\r
- 1018 0354 0825                movs    r5, #8\r
- 1019                  .LVL146:\r
- 1020 0356 F7E7                b       .L131\r
- 1021                  .LVL147:\r
- 1022                  .L70:\r
-1255:.\Generated_Source\PSoC5/BL.c ****     } while ((0u == timeOut) || (BL_COMMUNICATION_STATE_ACTIVE == communicationState));\r
- 1023                          .loc 1 1255 0\r
- 1024 0358 B8F1000F            cmp     r8, #0\r
- 1025 035c 01D1                bne     .L137\r
- 1026                  .L111:\r
-1029:.\Generated_Source\PSoC5/BL.c ****                     dataOffset = 0u;\r
- 1027                          .loc 1 1029 0\r
- 1028 035e 4746                mov     r7, r8\r
- 1029 0360 5EE6                b       .L112\r
- 1030                  .L137:\r
- 1031 0362 0027                movs    r7, #0\r
- 1032 0364 EDE6                b       .L84\r
- 1033                  .LVL148:\r
- 1034                  .L136:\r
-1256:.\Generated_Source\PSoC5/BL.c **** }\r
- 1035                          .loc 1 1256 0\r
- 1036 0366 0DF5617D            add     sp, sp, #900\r
- 1037 036a BDE8F08F            pop     {r4, r5, r6, r7, r8, r9, sl, fp, pc}\r
- 1038                  .L139:\r
- 1039 036e 00BF                .align  2\r
- 1040                  .L138:\r
- 1041 0370 00000000            .word   .LANCHOR0\r
- 1042 0374 FF7F0040            .word   1073774591\r
- 1043 0378 D0FF0100            .word   131024\r
- 1044 037c D1FF0100            .word   131025\r
- 1045 0380 FA460040            .word   1073759994\r
- 1046                          .cfi_endproc\r
- 1047                  .LFE64:\r
- 1048                          .size   BL_HostLink, .-BL_HostLink\r
- 1049                          .section        .text.BL_Start,"ax",%progbits\r
- 1050                          .align  1\r
- 1051                          .global BL_Start\r
- 1052                          .thumb\r
- 1053                          .thumb_func\r
- 1054                          .type   BL_Start, %function\r
- 1055                  BL_Start:\r
- 1056                  .LFB59:\r
- 273:.\Generated_Source\PSoC5/BL.c **** {\r
- 1057                          .loc 1 273 0\r
- 1058                          .cfi_startproc\r
- 1059                          @ args = 0, pretend = 0, frame = 288\r
- 1060                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1061 0000 10B5                push    {r4, lr}\r
- 1062                  .LCFI4:\r
- 1063                          .cfi_def_cfa_offset 8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 49\r
-\r
-\r
- 1064                          .cfi_offset 4, -8\r
- 1065                          .cfi_offset 14, -4\r
- 1066 0002 C8B0                sub     sp, sp, #288\r
- 1067                  .LCFI5:\r
- 1068                          .cfi_def_cfa_offset 296\r
- 306:.\Generated_Source\PSoC5/BL.c ****         if (CYRET_SUCCESS != CySetTemp())\r
- 1069                          .loc 1 306 0\r
- 1070 0004 FFF7FEFF            bl      CySetTemp\r
- 1071                  .LVL149:\r
- 1072 0008 10B1                cbz     r0, .L141\r
- 308:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 1073                          .loc 1 308 0\r
- 1074 000a 0020                movs    r0, #0\r
- 1075 000c FFF7FEFF            bl      CyHalt\r
- 1076                  .LVL150:\r
- 1077                  .L141:\r
- 311:.\Generated_Source\PSoC5/BL.c ****         if (CYRET_SUCCESS != CySetFlashEEBuffer(BL_flashBuffer))\r
- 1078                          .loc 1 311 0\r
- 1079 0010 6846                mov     r0, sp\r
- 1080 0012 FFF7FEFF            bl      CySetFlashEEBuffer\r
- 1081                  .LVL151:\r
- 1082 0016 10B1                cbz     r0, .L142\r
- 313:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 1083                          .loc 1 313 0\r
- 1084 0018 0020                movs    r0, #0\r
- 1085 001a FFF7FEFF            bl      CyHalt\r
- 1086                  .LVL152:\r
- 1087                  .L142:\r
- 329:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = BL_Calc8BitFlashSum(BL_MD_BTLDR_ADDR_PTR,\r
- 1088                          .loc 1 329 0\r
- 1089 001e 1648                ldr     r0, .L162\r
- 1090 0020 0368                ldr     r3, [r0, #0]\r
- 1091 0022 1968                ldr     r1, [r3, #0]\r
- 1092                  .LVL153:\r
- 192:.\Generated_Source\PSoC5/BL.c ****     uint8 CYDATA sum = 0u;\r
- 1093                          .loc 1 192 0\r
- 1094 0024 0023                movs    r3, #0\r
- 329:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = BL_Calc8BitFlashSum(BL_MD_BTLDR_ADDR_PTR,\r
- 1095                          .loc 1 329 0\r
- 1096 0026 0A46                mov     r2, r1\r
- 1097                  .LVL154:\r
- 1098                  .L143:\r
- 1099                  .LBB41:\r
- 1100                  .LBB42:\r
- 194:.\Generated_Source\PSoC5/BL.c ****     while (size > 0u)\r
- 1101                          .loc 1 194 0\r
- 1102 0028 22B1                cbz     r2, .L161\r
- 1103                  .L144:\r
- 197:.\Generated_Source\PSoC5/BL.c ****         sum += BL_GET_CODE_BYTE(start + size);\r
- 1104                          .loc 1 197 0\r
- 1105 002a 12F8014D            ldrb    r4, [r2, #-1]!  @ zero_extendqisi2\r
- 1106 002e E318                adds    r3, r4, r3\r
- 1107                  .LVL155:\r
- 1108 0030 DBB2                uxtb    r3, r3\r
- 1109                  .LVL156:\r
- 1110 0032 F9E7                b       .L143\r
- 1111                  .L161:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 50\r
-\r
-\r
- 1112                  .LBE42:\r
- 1113                  .LBE41:\r
- 333:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum -= *BL_ChecksumAccess;\r
- 1114                          .loc 1 333 0\r
- 1115 0034 4268                ldr     r2, [r0, #4]\r
- 1116 0036 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1117                  .LVL157:\r
- 334:.\Generated_Source\PSoC5/BL.c ****         calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
- 1118                          .loc 1 334 0\r
- 1119 0038 C41A                subs    r4, r0, r3\r
- 337:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != *BL_ChecksumAccess) ||\r
- 1120                          .loc 1 337 0\r
- 1121 003a 04F0FF03            and     r3, r4, #255\r
- 1122                  .LVL158:\r
- 1123 003e 8342                cmp     r3, r0\r
- 1124 0040 00D1                bne     .L145\r
- 337:.\Generated_Source\PSoC5/BL.c ****         if((calcedChecksum != *BL_ChecksumAccess) ||\r
- 1125                          .loc 1 337 0 is_stmt 0 discriminator 1\r
- 1126 0042 11B9                cbnz    r1, .L146\r
- 1127                  .L145:\r
- 340:.\Generated_Source\PSoC5/BL.c ****             CyHalt(0x00u);\r
- 1128                          .loc 1 340 0 is_stmt 1\r
- 1129 0044 0020                movs    r0, #0\r
- 1130 0046 FFF7FEFF            bl      CyHalt\r
- 1131                  .LVL159:\r
- 1132                  .L146:\r
- 356:.\Generated_Source\PSoC5/BL.c ****     if ((BL_GET_RUN_TYPE == BL_START_BTLDR) ||\r
- 1133                          .loc 1 356 0\r
- 1134 004a 0C4C                ldr     r4, .L162+4\r
- 354:.\Generated_Source\PSoC5/BL.c ****     tmpStatus = BL_ValidateBootloadable(BL_activeApp);\r
- 1135                          .loc 1 354 0\r
- 1136 004c FFF7FEFF            bl      BL_ValidateBootloadable.constprop.0\r
- 1137                  .LVL160:\r
- 356:.\Generated_Source\PSoC5/BL.c ****     if ((BL_GET_RUN_TYPE == BL_START_BTLDR) ||\r
- 1138                          .loc 1 356 0\r
- 1139 0050 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1140 0052 01F0C002            and     r2, r1, #192\r
- 1141 0056 402A                cmp     r2, #64\r
- 1142 0058 00D0                beq     .L147\r
- 356:.\Generated_Source\PSoC5/BL.c ****     if ((BL_GET_RUN_TYPE == BL_START_BTLDR) ||\r
- 1143                          .loc 1 356 0 is_stmt 0 discriminator 1\r
- 1144 005a 18B1                cbz     r0, .L148\r
- 1145                  .L147:\r
- 359:.\Generated_Source\PSoC5/BL.c ****         BL_SET_RUN_TYPE(0u);\r
- 1146                          .loc 1 359 0 is_stmt 1\r
- 1147 005c 0020                movs    r0, #0\r
- 1148                  .LVL161:\r
- 1149 005e 2070                strb    r0, [r4, #0]\r
- 361:.\Generated_Source\PSoC5/BL.c ****         BL_HostLink(BL_WAIT_FOR_COMMAND_FOREVER);\r
- 1150                          .loc 1 361 0\r
- 1151 0060 FFF7FEFF            bl      BL_HostLink\r
- 1152                  .LVL162:\r
- 1153                  .L148:\r
- 369:.\Generated_Source\PSoC5/BL.c ****         BL_HostLink(BL_WAIT_FOR_COMMAND_TIME);\r
- 1154                          .loc 1 369 0\r
- 1155 0064 1420                movs    r0, #20\r
- 1156 0066 FFF7FEFF            bl      BL_HostLink\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 51\r
-\r
-\r
- 1157                  .LVL163:\r
- 1158                  .LBB43:\r
- 1159                  .LBB44:\r
- 396:.\Generated_Source\PSoC5/BL.c ****     BL_SET_RUN_TYPE(BL_START_APP);\r
- 1160                          .loc 1 396 0\r
- 1161 006a 8020                movs    r0, #128\r
- 1162 006c 2070                strb    r0, [r4, #0]\r
- 398:.\Generated_Source\PSoC5/BL.c ****     CySoftwareReset();\r
- 1163                          .loc 1 398 0\r
- 1164 006e FFF7FEFF            bl      CySoftwareReset\r
- 1165                  .LVL164:\r
- 1166                  .LBE44:\r
- 1167                  .LBE43:\r
- 376:.\Generated_Source\PSoC5/BL.c **** }\r
- 1168                          .loc 1 376 0\r
- 1169 0072 48B0                add     sp, sp, #288\r
- 1170 0074 10BD                pop     {r4, pc}\r
- 1171                  .L163:\r
- 1172 0076 00BF                .align  2\r
- 1173                  .L162:\r
- 1174 0078 00000000            .word   .LANCHOR1\r
- 1175 007c FA460040            .word   1073759994\r
- 1176                          .cfi_endproc\r
- 1177                  .LFE59:\r
- 1178                          .size   BL_Start, .-BL_Start\r
- 1179                          .section        .text.CyBtldr_CheckLaunch,"ax",%progbits\r
- 1180                          .align  1\r
- 1181                          .global CyBtldr_CheckLaunch\r
- 1182                          .thumb\r
- 1183                          .thumb_func\r
- 1184                          .type   CyBtldr_CheckLaunch, %function\r
- 1185                  CyBtldr_CheckLaunch:\r
- 1186                  .LFB61:\r
- 420:.\Generated_Source\PSoC5/BL.c **** {\r
- 1187                          .loc 1 420 0\r
- 1188                          .cfi_startproc\r
- 1189                          @ args = 0, pretend = 0, frame = 0\r
- 1190                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1191 0000 08B5                push    {r3, lr}\r
- 1192                  .LCFI6:\r
- 1193                          .cfi_def_cfa_offset 8\r
- 1194                          .cfi_offset 3, -8\r
- 1195                          .cfi_offset 14, -4\r
- 437:.\Generated_Source\PSoC5/BL.c ****     if (BL_GET_RUN_TYPE == BL_START_APP)\r
- 1196                          .loc 1 437 0\r
- 1197 0002 0A4B                ldr     r3, .L171\r
- 1198 0004 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1199 0006 02F0C000            and     r0, r2, #192\r
- 1200 000a 8028                cmp     r0, #128\r
- 1201 000c 0CD1                bne     .L164\r
- 439:.\Generated_Source\PSoC5/BL.c ****         BL_SET_RUN_TYPE(0u);\r
- 1202                          .loc 1 439 0\r
- 1203 000e 0021                movs    r1, #0\r
- 1204 0010 1970                strb    r1, [r3, #0]\r
- 447:.\Generated_Source\PSoC5/BL.c ****         if(0u != BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR, BL_activeApp))\r
- 1205                          .loc 1 447 0\r
- 1206 0012 0120                movs    r0, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 52\r
-\r
-\r
- 1207 0014 FFF7FEFF            bl      BL_GetMetadata.constprop.1\r
- 1208                  .LVL165:\r
- 1209 0018 30B1                cbz     r0, .L164\r
- 450:.\Generated_Source\PSoC5/BL.c ****             BL_LaunchBootloadable(BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR,\r
- 1210                          .loc 1 450 0\r
- 1211 001a 0120                movs    r0, #1\r
- 1212 001c FFF7FEFF            bl      BL_GetMetadata.constprop.1\r
- 1213                  .LVL166:\r
- 454:.\Generated_Source\PSoC5/BL.c **** }\r
- 1214                          .loc 1 454 0\r
- 1215 0020 BDE80840            pop     {r3, lr}\r
- 450:.\Generated_Source\PSoC5/BL.c ****             BL_LaunchBootloadable(BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR,\r
- 1216                          .loc 1 450 0\r
- 1217 0024 FFF7FEBF            b       BL_LaunchBootloadable\r
- 1218                  .LVL167:\r
- 1219                  .L164:\r
- 1220 0028 08BD                pop     {r3, pc}\r
- 1221                  .L172:\r
- 1222 002a 00BF                .align  2\r
- 1223                  .L171:\r
- 1224 002c FA460040            .word   1073759994\r
- 1225                          .cfi_endproc\r
- 1226                  .LFE61:\r
- 1227                          .size   CyBtldr_CheckLaunch, .-CyBtldr_CheckLaunch\r
- 1228                          .section        .text.BL_SetFlashByte,"ax",%progbits\r
- 1229                          .align  1\r
- 1230                          .global BL_SetFlashByte\r
- 1231                          .thumb\r
- 1232                          .thumb_func\r
- 1233                          .type   BL_SetFlashByte, %function\r
- 1234                  BL_SetFlashByte:\r
- 1235                  .LFB66:\r
-1322:.\Generated_Source\PSoC5/BL.c **** {\r
- 1236                          .loc 1 1322 0\r
- 1237                          .cfi_startproc\r
- 1238                          @ args = 0, pretend = 0, frame = 256\r
- 1239                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1240                  .LVL168:\r
- 1241 0000 70B5                push    {r4, r5, r6, lr}\r
- 1242                  .LCFI7:\r
- 1243                          .cfi_def_cfa_offset 16\r
- 1244                          .cfi_offset 4, -16\r
- 1245                          .cfi_offset 5, -12\r
- 1246                          .cfi_offset 6, -8\r
- 1247                          .cfi_offset 14, -4\r
-1330:.\Generated_Source\PSoC5/BL.c ****     uint16 rowNum = ( uint16 )((flsAddr % CYDEV_FLS_SECTOR_SIZE) / CYDEV_FLS_ROW_SIZE);\r
- 1248                          .loc 1 1330 0\r
- 1249 0002 C0F30722            ubfx    r2, r0, #8, #8\r
-1322:.\Generated_Source\PSoC5/BL.c **** {\r
- 1250                          .loc 1 1322 0\r
- 1251 0006 C0B0                sub     sp, sp, #256\r
- 1252                  .LCFI8:\r
- 1253                          .cfi_def_cfa_offset 272\r
-1327:.\Generated_Source\PSoC5/BL.c ****         uint8 arrayId = ( uint8 )(flsAddr / CYDEV_FLS_SECTOR_SIZE);\r
- 1254                          .loc 1 1327 0\r
- 1255 0008 C0F30744            ubfx    r4, r0, #16, #8\r
- 1256                  .LVL169:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 53\r
-\r
-\r
-1331:.\Generated_Source\PSoC5/BL.c ****     uint32 baseAddr = address - (address % CYDEV_FLS_ROW_SIZE);\r
- 1257                          .loc 1 1331 0\r
- 1258 000c 20F0FF06            bic     r6, r0, #255\r
- 1259                  .LVL170:\r
- 1260 0010 0023                movs    r3, #0\r
- 1261                  .LVL171:\r
- 1262                  .L174:\r
-1336:.\Generated_Source\PSoC5/BL.c ****         rowData[idx] = BL_GET_CODE_BYTE(baseAddr + idx);\r
- 1263                          .loc 1 1336 0 discriminator 2\r
- 1264 0012 9D5D                ldrb    r5, [r3, r6]    @ zero_extendqisi2\r
- 1265 0014 0DF80350            strb    r5, [sp, r3]\r
- 1266 0018 0133                adds    r3, r3, #1\r
-1334:.\Generated_Source\PSoC5/BL.c ****     for(idx = 0u; idx < CYDEV_FLS_ROW_SIZE; idx++)\r
- 1267                          .loc 1 1334 0 discriminator 2\r
- 1268 001a B3F5807F            cmp     r3, #256\r
- 1269 001e F8D1                bne     .L174\r
-1339:.\Generated_Source\PSoC5/BL.c ****     rowData[address % CYDEV_FLS_ROW_SIZE] = runType;\r
- 1270                          .loc 1 1339 0\r
- 1271 0020 C0B2                uxtb    r0, r0\r
- 1272                  .LVL172:\r
- 1273 0022 0DF80010            strb    r1, [sp, r0]\r
-1344:.\Generated_Source\PSoC5/BL.c ****         (void) CyWriteRowData(arrayId, rowNum, rowData);\r
- 1274                          .loc 1 1344 0\r
- 1275 0026 1146                mov     r1, r2\r
- 1276                  .LVL173:\r
- 1277 0028 2046                mov     r0, r4\r
- 1278                  .LVL174:\r
- 1279 002a 6A46                mov     r2, sp\r
- 1280                  .LVL175:\r
- 1281 002c FFF7FEFF            bl      CyWriteRowData\r
- 1282                  .LVL176:\r
-1346:.\Generated_Source\PSoC5/BL.c **** }\r
- 1283                          .loc 1 1346 0\r
- 1284 0030 40B0                add     sp, sp, #256\r
- 1285 0032 70BD                pop     {r4, r5, r6, pc}\r
- 1286                          .cfi_endproc\r
- 1287                  .LFE66:\r
- 1288                          .size   BL_SetFlashByte, .-BL_SetFlashByte\r
- 1289                          .global BL_SizeBytesAccess\r
- 1290                          .global BL_SizeBytes\r
- 1291                          .global BL_ChecksumAccess\r
- 1292                          .global BL_Checksum\r
- 1293                          .section        .rodata\r
- 1294                          .align  2\r
- 1295                          .set    .LANCHOR0,. + 0\r
- 1296                  .LC0:\r
- 1297 0000 6930132E            .word   773009513\r
- 1298 0004 00                  .byte   0\r
- 1299 0005 14                  .byte   20\r
- 1300 0006 01                  .byte   1\r
- 1301 0007 01                  .byte   1\r
- 1302                          .section        .bootloader,"a",%progbits\r
- 1303                          .align  2\r
- 1304                          .type   BL_SizeBytes, %object\r
- 1305                          .size   BL_SizeBytes, 4\r
- 1306                  BL_SizeBytes:\r
- 1307 0000 FFFFFFFF            .word   -1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 54\r
-\r
-\r
- 1308                          .type   BL_Checksum, %object\r
- 1309                          .size   BL_Checksum, 1\r
- 1310                  BL_Checksum:\r
- 1311 0004 00                  .space  1\r
- 1312 0005 000000              .data\r
- 1313                          .align  2\r
- 1314                          .set    .LANCHOR1,. + 0\r
- 1315                          .type   BL_SizeBytesAccess, %object\r
- 1316                          .size   BL_SizeBytesAccess, 4\r
- 1317                  BL_SizeBytesAccess:\r
- 1318 0000 00000000            .word   BL_SizeBytes\r
- 1319                          .type   BL_ChecksumAccess, %object\r
- 1320                          .size   BL_ChecksumAccess, 4\r
- 1321                  BL_ChecksumAccess:\r
- 1322 0004 00000000            .word   BL_Checksum\r
- 1323                          .text\r
- 1324                  .Letext0:\r
- 1325                          .file 2 "c:\\program files (x86)\\cypress\\psoc creator\\3.0\\psoc creator\\import\\gnu_cs\\arm\\4\r
- 1326                          .file 3 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 1327                          .file 4 ".\\Generated_Source\\PSoC5\\BL_PVT.h"\r
- 1328                          .file 5 "./Generated_Source/PSoC5/core_cm3.h"\r
- 1329                          .file 6 "./Generated_Source/PSoC5/CyFlash.h"\r
- 1330                          .file 7 "./Generated_Source/PSoC5/CyLib.h"\r
- 1331                          .file 8 "./Generated_Source/PSoC5/USBFS.h"\r
- 1332                          .section        .debug_info,"",%progbits\r
- 1333                  .Ldebug_info0:\r
- 1334 0000 EE0B0000            .4byte  0xbee\r
- 1335 0004 0200                .2byte  0x2\r
- 1336 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1337 000a 04                  .byte   0x4\r
- 1338 000b 01                  .uleb128 0x1\r
- 1339 000c 0A020000            .4byte  .LASF92\r
- 1340 0010 01                  .byte   0x1\r
- 1341 0011 53020000            .4byte  .LASF93\r
- 1342 0015 13010000            .4byte  .LASF94\r
- 1343 0019 18000000            .4byte  .Ldebug_ranges0+0x18\r
- 1344 001d 00000000            .4byte  0\r
- 1345 0021 00000000            .4byte  0\r
- 1346 0025 00000000            .4byte  .Ldebug_line0\r
- 1347 0029 02                  .uleb128 0x2\r
- 1348 002a 01                  .byte   0x1\r
- 1349 002b 06                  .byte   0x6\r
- 1350 002c 6F010000            .4byte  .LASF0\r
- 1351 0030 02                  .uleb128 0x2\r
- 1352 0031 01                  .byte   0x1\r
- 1353 0032 08                  .byte   0x8\r
- 1354 0033 B0020000            .4byte  .LASF1\r
- 1355 0037 02                  .uleb128 0x2\r
- 1356 0038 02                  .byte   0x2\r
- 1357 0039 05                  .byte   0x5\r
- 1358 003a 5D000000            .4byte  .LASF2\r
- 1359 003e 02                  .uleb128 0x2\r
- 1360 003f 02                  .byte   0x2\r
- 1361 0040 07                  .byte   0x7\r
- 1362 0041 BA030000            .4byte  .LASF3\r
- 1363 0045 03                  .uleb128 0x3\r
- 1364 0046 DF020000            .4byte  .LASF9\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 55\r
-\r
-\r
- 1365 004a 02                  .byte   0x2\r
- 1366 004b 4F                  .byte   0x4f\r
- 1367 004c 50000000            .4byte  0x50\r
- 1368 0050 02                  .uleb128 0x2\r
- 1369 0051 04                  .byte   0x4\r
- 1370 0052 05                  .byte   0x5\r
- 1371 0053 99030000            .4byte  .LASF4\r
- 1372 0057 02                  .uleb128 0x2\r
- 1373 0058 04                  .byte   0x4\r
- 1374 0059 07                  .byte   0x7\r
- 1375 005a 27040000            .4byte  .LASF5\r
- 1376 005e 02                  .uleb128 0x2\r
- 1377 005f 08                  .byte   0x8\r
- 1378 0060 05                  .byte   0x5\r
- 1379 0061 81010000            .4byte  .LASF6\r
- 1380 0065 02                  .uleb128 0x2\r
- 1381 0066 08                  .byte   0x8\r
- 1382 0067 07                  .byte   0x7\r
- 1383 0068 E7020000            .4byte  .LASF7\r
- 1384 006c 04                  .uleb128 0x4\r
- 1385 006d 04                  .byte   0x4\r
- 1386 006e 05                  .byte   0x5\r
- 1387 006f 696E7400            .ascii  "int\000"\r
- 1388 0073 02                  .uleb128 0x2\r
- 1389 0074 04                  .byte   0x4\r
- 1390 0075 07                  .byte   0x7\r
- 1391 0076 BA040000            .4byte  .LASF8\r
- 1392 007a 03                  .uleb128 0x3\r
- 1393 007b 44010000            .4byte  .LASF10\r
- 1394 007f 03                  .byte   0x3\r
- 1395 0080 5B                  .byte   0x5b\r
- 1396 0081 30000000            .4byte  0x30\r
- 1397 0085 03                  .uleb128 0x3\r
- 1398 0086 EB000000            .4byte  .LASF11\r
- 1399 008a 03                  .byte   0x3\r
- 1400 008b 5C                  .byte   0x5c\r
- 1401 008c 3E000000            .4byte  0x3e\r
- 1402 0090 03                  .uleb128 0x3\r
- 1403 0091 1B040000            .4byte  .LASF12\r
- 1404 0095 03                  .byte   0x3\r
- 1405 0096 5D                  .byte   0x5d\r
- 1406 0097 57000000            .4byte  0x57\r
- 1407 009b 02                  .uleb128 0x2\r
- 1408 009c 04                  .byte   0x4\r
- 1409 009d 04                  .byte   0x4\r
- 1410 009e 7B010000            .4byte  .LASF13\r
- 1411 00a2 02                  .uleb128 0x2\r
- 1412 00a3 08                  .byte   0x8\r
- 1413 00a4 04                  .byte   0x4\r
- 1414 00a5 41040000            .4byte  .LASF14\r
- 1415 00a9 02                  .uleb128 0x2\r
- 1416 00aa 01                  .byte   0x1\r
- 1417 00ab 08                  .byte   0x8\r
- 1418 00ac 96010000            .4byte  .LASF15\r
- 1419 00b0 03                  .uleb128 0x3\r
- 1420 00b1 1E030000            .4byte  .LASF16\r
- 1421 00b5 03                  .byte   0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 56\r
-\r
-\r
- 1422 00b6 E8                  .byte   0xe8\r
- 1423 00b7 57000000            .4byte  0x57\r
- 1424 00bb 03                  .uleb128 0x3\r
- 1425 00bc 22040000            .4byte  .LASF17\r
- 1426 00c0 03                  .byte   0x3\r
- 1427 00c1 F0                  .byte   0xf0\r
- 1428 00c2 C6000000            .4byte  0xc6\r
- 1429 00c6 05                  .uleb128 0x5\r
- 1430 00c7 7A000000            .4byte  0x7a\r
- 1431 00cb 06                  .uleb128 0x6\r
- 1432 00cc 08                  .byte   0x8\r
- 1433 00cd 04                  .byte   0x4\r
- 1434 00ce 15                  .byte   0x15\r
- 1435 00cf FE000000            .4byte  0xfe\r
- 1436 00d3 07                  .uleb128 0x7\r
- 1437 00d4 DD030000            .4byte  .LASF18\r
- 1438 00d8 04                  .byte   0x4\r
- 1439 00d9 17                  .byte   0x17\r
- 1440 00da 90000000            .4byte  0x90\r
- 1441 00de 02                  .byte   0x2\r
- 1442 00df 23                  .byte   0x23\r
- 1443 00e0 00                  .uleb128 0\r
- 1444 00e1 07                  .uleb128 0x7\r
- 1445 00e2 A4040000            .4byte  .LASF19\r
- 1446 00e6 04                  .byte   0x4\r
- 1447 00e7 18                  .byte   0x18\r
- 1448 00e8 7A000000            .4byte  0x7a\r
- 1449 00ec 02                  .byte   0x2\r
- 1450 00ed 23                  .byte   0x23\r
- 1451 00ee 04                  .uleb128 0x4\r
- 1452 00ef 07                  .uleb128 0x7\r
- 1453 00f0 5D010000            .4byte  .LASF20\r
- 1454 00f4 04                  .byte   0x4\r
- 1455 00f5 19                  .byte   0x19\r
- 1456 00f6 FE000000            .4byte  0xfe\r
- 1457 00fa 02                  .byte   0x2\r
- 1458 00fb 23                  .byte   0x23\r
- 1459 00fc 05                  .uleb128 0x5\r
- 1460 00fd 00                  .byte   0\r
- 1461 00fe 08                  .uleb128 0x8\r
- 1462 00ff 7A000000            .4byte  0x7a\r
- 1463 0103 0E010000            .4byte  0x10e\r
- 1464 0107 09                  .uleb128 0x9\r
- 1465 0108 0E010000            .4byte  0x10e\r
- 1466 010c 02                  .byte   0x2\r
- 1467 010d 00                  .byte   0\r
- 1468 010e 02                  .uleb128 0x2\r
- 1469 010f 04                  .byte   0x4\r
- 1470 0110 07                  .byte   0x7\r
- 1471 0111 7E000000            .4byte  .LASF21\r
- 1472 0115 03                  .uleb128 0x3\r
- 1473 0116 9B040000            .4byte  .LASF22\r
- 1474 011a 04                  .byte   0x4\r
- 1475 011b 1B                  .byte   0x1b\r
- 1476 011c CB000000            .4byte  0xcb\r
- 1477 0120 0A                  .uleb128 0xa\r
- 1478 0121 04                  .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 57\r
-\r
-\r
- 1479 0122 0B                  .uleb128 0xb\r
- 1480 0123 04                  .byte   0x4\r
- 1481 0124 28010000            .4byte  0x128\r
- 1482 0128 0C                  .uleb128 0xc\r
- 1483 0129 0D                  .uleb128 0xd\r
- 1484 012a 9B010000            .4byte  .LASF25\r
- 1485 012e 01                  .byte   0x1\r
- 1486 012f E0                  .byte   0xe0\r
- 1487 0130 01                  .byte   0x1\r
- 1488 0131 7A000000            .4byte  0x7a\r
- 1489 0135 01                  .byte   0x1\r
- 1490 0136 5C010000            .4byte  0x15c\r
- 1491 013a 0E                  .uleb128 0xe\r
- 1492 013b AA020000            .4byte  .LASF23\r
- 1493 013f 01                  .byte   0x1\r
- 1494 0140 E0                  .byte   0xe0\r
- 1495 0141 90000000            .4byte  0x90\r
- 1496 0145 0E                  .uleb128 0xe\r
- 1497 0146 54040000            .4byte  .LASF24\r
- 1498 014a 01                  .byte   0x1\r
- 1499 014b E0                  .byte   0xe0\r
- 1500 014c 90000000            .4byte  0x90\r
- 1501 0150 0F                  .uleb128 0xf\r
- 1502 0151 73756D00            .ascii  "sum\000"\r
- 1503 0155 01                  .byte   0x1\r
- 1504 0156 E3                  .byte   0xe3\r
- 1505 0157 7A000000            .4byte  0x7a\r
- 1506 015b 00                  .byte   0\r
- 1507 015c 10                  .uleb128 0x10\r
- 1508 015d AB030000            .4byte  .LASF26\r
- 1509 0161 01                  .byte   0x1\r
- 1510 0162 5E05                .2byte  0x55e\r
- 1511 0164 01                  .byte   0x1\r
- 1512 0165 90000000            .4byte  0x90\r
- 1513 0169 01                  .byte   0x1\r
- 1514 016a AB010000            .4byte  0x1ab\r
- 1515 016e 11                  .uleb128 0x11\r
- 1516 016f D6040000            .4byte  .LASF27\r
- 1517 0173 01                  .byte   0x1\r
- 1518 0174 5E05                .2byte  0x55e\r
- 1519 0176 7A000000            .4byte  0x7a\r
- 1520 017a 11                  .uleb128 0x11\r
- 1521 017b 15000000            .4byte  .LASF28\r
- 1522 017f 01                  .byte   0x1\r
- 1523 0180 5E05                .2byte  0x55e\r
- 1524 0182 7A000000            .4byte  0x7a\r
- 1525 0186 12                  .uleb128 0x12\r
- 1526 0187 81020000            .4byte  .LASF29\r
- 1527 018b 01                  .byte   0x1\r
- 1528 018c 6005                .2byte  0x560\r
- 1529 018e 90000000            .4byte  0x90\r
- 1530 0192 12                  .uleb128 0x12\r
- 1531 0193 53030000            .4byte  .LASF30\r
- 1532 0197 01                  .byte   0x1\r
- 1533 0198 6105                .2byte  0x561\r
- 1534 019a 7A000000            .4byte  0x7a\r
- 1535 019e 12                  .uleb128 0x12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 58\r
-\r
-\r
- 1536 019f 1B000000            .4byte  .LASF31\r
- 1537 01a3 01                  .byte   0x1\r
- 1538 01a4 6205                .2byte  0x562\r
- 1539 01a6 90000000            .4byte  0x90\r
- 1540 01aa 00                  .byte   0\r
- 1541 01ab 10                  .uleb128 0x10\r
- 1542 01ac FB000000            .4byte  .LASF32\r
- 1543 01b0 01                  .byte   0x1\r
- 1544 01b1 F501                .2byte  0x1f5\r
- 1545 01b3 01                  .byte   0x1\r
- 1546 01b4 B0000000            .4byte  0xb0\r
- 1547 01b8 01                  .byte   0x1\r
- 1548 01b9 08020000            .4byte  0x208\r
- 1549 01bd 11                  .uleb128 0x11\r
- 1550 01be 15000000            .4byte  .LASF28\r
- 1551 01c2 01                  .byte   0x1\r
- 1552 01c3 F501                .2byte  0x1f5\r
- 1553 01c5 7A000000            .4byte  0x7a\r
- 1554 01c9 13                  .uleb128 0x13\r
- 1555 01ca 69647800            .ascii  "idx\000"\r
- 1556 01ce 01                  .byte   0x1\r
- 1557 01cf F801                .2byte  0x1f8\r
- 1558 01d1 90000000            .4byte  0x90\r
- 1559 01d5 13                  .uleb128 0x13\r
- 1560 01d6 656E6400            .ascii  "end\000"\r
- 1561 01da 01                  .byte   0x1\r
- 1562 01db FA01                .2byte  0x1fa\r
- 1563 01dd 90000000            .4byte  0x90\r
- 1564 01e1 12                  .uleb128 0x12\r
- 1565 01e2 00000000            .4byte  .LASF33\r
- 1566 01e6 01                  .byte   0x1\r
- 1567 01e7 FE01                .2byte  0x1fe\r
- 1568 01e9 7A000000            .4byte  0x7a\r
- 1569 01ed 12                  .uleb128 0x12\r
- 1570 01ee DC010000            .4byte  .LASF34\r
- 1571 01f2 01                  .byte   0x1\r
- 1572 01f3 FF01                .2byte  0x1ff\r
- 1573 01f5 7A000000            .4byte  0x7a\r
- 1574 01f9 14                  .uleb128 0x14\r
- 1575 01fa 12                  .uleb128 0x12\r
- 1576 01fb C0010000            .4byte  .LASF35\r
- 1577 01ff 01                  .byte   0x1\r
- 1578 0200 1902                .2byte  0x219\r
- 1579 0202 7A000000            .4byte  0x7a\r
- 1580 0206 00                  .byte   0\r
- 1581 0207 00                  .byte   0\r
- 1582 0208 15                  .uleb128 0x15\r
- 1583 0209 27030000            .4byte  .LASF42\r
- 1584 020d 01                  .byte   0x1\r
- 1585 020e D601                .2byte  0x1d6\r
- 1586 0210 01                  .byte   0x1\r
- 1587 0211 00000000            .4byte  .LFB62\r
- 1588 0215 02000000            .4byte  .LFE62\r
- 1589 0219 02                  .byte   0x2\r
- 1590 021a 7D                  .byte   0x7d\r
- 1591 021b 00                  .sleb128 0\r
- 1592 021c 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 59\r
-\r
-\r
- 1593 021d 30020000            .4byte  0x230\r
- 1594 0221 16                  .uleb128 0x16\r
- 1595 0222 4D000000            .4byte  .LASF44\r
- 1596 0226 01                  .byte   0x1\r
- 1597 0227 D601                .2byte  0x1d6\r
- 1598 0229 90000000            .4byte  0x90\r
- 1599 022d 01                  .byte   0x1\r
- 1600 022e 50                  .byte   0x50\r
- 1601 022f 00                  .byte   0\r
- 1602 0230 17                  .uleb128 0x17\r
- 1603 0231 5C010000            .4byte  0x15c\r
- 1604 0235 00000000            .4byte  .LFB69\r
- 1605 0239 8C000000            .4byte  .LFE69\r
- 1606 023d 00000000            .4byte  .LLST0\r
- 1607 0241 01                  .byte   0x1\r
- 1608 0242 71020000            .4byte  0x271\r
- 1609 0246 18                  .uleb128 0x18\r
- 1610 0247 6E010000            .4byte  0x16e\r
- 1611 024b 20000000            .4byte  .LLST1\r
- 1612 024f 19                  .uleb128 0x19\r
- 1613 0250 86010000            .4byte  0x186\r
- 1614 0254 BE000000            .4byte  .LLST2\r
- 1615 0258 19                  .uleb128 0x19\r
- 1616 0259 92010000            .4byte  0x192\r
- 1617 025d FC000000            .4byte  .LLST3\r
- 1618 0261 19                  .uleb128 0x19\r
- 1619 0262 9E010000            .4byte  0x19e\r
- 1620 0266 28010000            .4byte  .LLST4\r
- 1621 026a 1A                  .uleb128 0x1a\r
- 1622 026b 7A010000            .4byte  0x17a\r
- 1623 026f 00                  .byte   0\r
- 1624 0270 00                  .byte   0\r
- 1625 0271 17                  .uleb128 0x17\r
- 1626 0272 AB010000            .4byte  0x1ab\r
- 1627 0276 00000000            .4byte  .LFB70\r
- 1628 027a 84000000            .4byte  .LFE70\r
- 1629 027e 8E010000            .4byte  .LLST5\r
- 1630 0282 01                  .byte   0x1\r
- 1631 0283 11030000            .4byte  0x311\r
- 1632 0287 19                  .uleb128 0x19\r
- 1633 0288 C9010000            .4byte  0x1c9\r
- 1634 028c AE010000            .4byte  .LLST6\r
- 1635 0290 19                  .uleb128 0x19\r
- 1636 0291 D5010000            .4byte  0x1d5\r
- 1637 0295 E4010000            .4byte  .LLST7\r
- 1638 0299 19                  .uleb128 0x19\r
- 1639 029a E1010000            .4byte  0x1e1\r
- 1640 029e 02020000            .4byte  .LLST8\r
- 1641 02a2 19                  .uleb128 0x19\r
- 1642 02a3 ED010000            .4byte  0x1ed\r
- 1643 02a7 21020000            .4byte  .LLST9\r
- 1644 02ab 1A                  .uleb128 0x1a\r
- 1645 02ac BD010000            .4byte  0x1bd\r
- 1646 02b0 00                  .byte   0\r
- 1647 02b1 1B                  .uleb128 0x1b\r
- 1648 02b2 28000000            .4byte  .LBB3\r
- 1649 02b6 3C000000            .4byte  .LBE3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 60\r
-\r
-\r
- 1650 02ba C8020000            .4byte  0x2c8\r
- 1651 02be 19                  .uleb128 0x19\r
- 1652 02bf FA010000            .4byte  0x1fa\r
- 1653 02c3 73020000            .4byte  .LLST10\r
- 1654 02c7 00                  .byte   0\r
- 1655 02c8 1C                  .uleb128 0x1c\r
- 1656 02c9 08000000            .4byte  .LVL27\r
- 1657 02cd 30020000            .4byte  0x230\r
- 1658 02d1 DB020000            .4byte  0x2db\r
- 1659 02d5 1D                  .uleb128 0x1d\r
- 1660 02d6 01                  .byte   0x1\r
- 1661 02d7 50                  .byte   0x50\r
- 1662 02d8 01                  .byte   0x1\r
- 1663 02d9 32                  .byte   0x32\r
- 1664 02da 00                  .byte   0\r
- 1665 02db 1C                  .uleb128 0x1c\r
- 1666 02dc 10000000            .4byte  .LVL28\r
- 1667 02e0 30020000            .4byte  0x230\r
- 1668 02e4 EE020000            .4byte  0x2ee\r
- 1669 02e8 1D                  .uleb128 0x1d\r
- 1670 02e9 01                  .byte   0x1\r
- 1671 02ea 50                  .byte   0x50\r
- 1672 02eb 01                  .byte   0x1\r
- 1673 02ec 33                  .byte   0x33\r
- 1674 02ed 00                  .byte   0\r
- 1675 02ee 1C                  .uleb128 0x1c\r
- 1676 02ef 1C000000            .4byte  .LVL30\r
- 1677 02f3 30020000            .4byte  0x230\r
- 1678 02f7 01030000            .4byte  0x301\r
- 1679 02fb 1D                  .uleb128 0x1d\r
- 1680 02fc 01                  .byte   0x1\r
- 1681 02fd 50                  .byte   0x50\r
- 1682 02fe 01                  .byte   0x1\r
- 1683 02ff 32                  .byte   0x32\r
- 1684 0300 00                  .byte   0\r
- 1685 0301 1E                  .uleb128 0x1e\r
- 1686 0302 42000000            .4byte  .LVL38\r
- 1687 0306 30020000            .4byte  0x230\r
- 1688 030a 1D                  .uleb128 0x1d\r
- 1689 030b 01                  .byte   0x1\r
- 1690 030c 50                  .byte   0x50\r
- 1691 030d 01                  .byte   0x1\r
- 1692 030e 32                  .byte   0x32\r
- 1693 030f 00                  .byte   0\r
- 1694 0310 00                  .byte   0\r
- 1695 0311 0D                  .uleb128 0xd\r
- 1696 0312 3D030000            .4byte  .LASF36\r
- 1697 0316 01                  .byte   0x1\r
- 1698 0317 6E                  .byte   0x6e\r
- 1699 0318 01                  .byte   0x1\r
- 1700 0319 85000000            .4byte  0x85\r
- 1701 031d 01                  .byte   0x1\r
- 1702 031e 44030000            .4byte  0x344\r
- 1703 0322 0E                  .uleb128 0xe\r
- 1704 0323 FD030000            .4byte  .LASF37\r
- 1705 0327 01                  .byte   0x1\r
- 1706 0328 6E                  .byte   0x6e\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 61\r
-\r
-\r
- 1707 0329 44030000            .4byte  0x344\r
- 1708 032d 0E                  .uleb128 0xe\r
- 1709 032e 54040000            .4byte  .LASF24\r
- 1710 0332 01                  .byte   0x1\r
- 1711 0333 6E                  .byte   0x6e\r
- 1712 0334 85000000            .4byte  0x85\r
- 1713 0338 0F                  .uleb128 0xf\r
- 1714 0339 73756D00            .ascii  "sum\000"\r
- 1715 033d 01                  .byte   0x1\r
- 1716 033e 9D                  .byte   0x9d\r
- 1717 033f 85000000            .4byte  0x85\r
- 1718 0343 00                  .byte   0\r
- 1719 0344 0B                  .uleb128 0xb\r
- 1720 0345 04                  .byte   0x4\r
- 1721 0346 4A030000            .4byte  0x34a\r
- 1722 034a 1F                  .uleb128 0x1f\r
- 1723 034b 7A000000            .4byte  0x7a\r
- 1724 034f 0D                  .uleb128 0xd\r
- 1725 0350 78030000            .4byte  .LASF38\r
- 1726 0354 01                  .byte   0x1\r
- 1727 0355 BD                  .byte   0xbd\r
- 1728 0356 01                  .byte   0x1\r
- 1729 0357 7A000000            .4byte  0x7a\r
- 1730 035b 01                  .byte   0x1\r
- 1731 035c 82030000            .4byte  0x382\r
- 1732 0360 0E                  .uleb128 0xe\r
- 1733 0361 AA020000            .4byte  .LASF23\r
- 1734 0365 01                  .byte   0x1\r
- 1735 0366 BD                  .byte   0xbd\r
- 1736 0367 90000000            .4byte  0x90\r
- 1737 036b 0E                  .uleb128 0xe\r
- 1738 036c 54040000            .4byte  .LASF24\r
- 1739 0370 01                  .byte   0x1\r
- 1740 0371 BD                  .byte   0xbd\r
- 1741 0372 90000000            .4byte  0x90\r
- 1742 0376 0F                  .uleb128 0xf\r
- 1743 0377 73756D00            .ascii  "sum\000"\r
- 1744 037b 01                  .byte   0x1\r
- 1745 037c C0                  .byte   0xc0\r
- 1746 037d 7A000000            .4byte  0x7a\r
- 1747 0381 00                  .byte   0\r
- 1748 0382 10                  .uleb128 0x10\r
- 1749 0383 06000000            .4byte  .LASF39\r
- 1750 0387 01                  .byte   0x1\r
- 1751 0388 0005                .2byte  0x500\r
- 1752 038a 01                  .byte   0x1\r
- 1753 038b B0000000            .4byte  0xb0\r
- 1754 038f 01                  .byte   0x1\r
- 1755 0390 C5030000            .4byte  0x3c5\r
- 1756 0394 11                  .uleb128 0x11\r
- 1757 0395 5D030000            .4byte  .LASF40\r
- 1758 0399 01                  .byte   0x1\r
- 1759 039a 0005                .2byte  0x500\r
- 1760 039c 7A000000            .4byte  0x7a\r
- 1761 03a0 11                  .uleb128 0x11\r
- 1762 03a1 FD030000            .4byte  .LASF37\r
- 1763 03a5 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 62\r
-\r
-\r
- 1764 03a6 0005                .2byte  0x500\r
- 1765 03a8 C5030000            .4byte  0x3c5\r
- 1766 03ac 11                  .uleb128 0x11\r
- 1767 03ad 54040000            .4byte  .LASF24\r
- 1768 03b1 01                  .byte   0x1\r
- 1769 03b2 0005                .2byte  0x500\r
- 1770 03b4 85000000            .4byte  0x85\r
- 1771 03b8 12                  .uleb128 0x12\r
- 1772 03b9 F2000000            .4byte  .LASF41\r
- 1773 03bd 01                  .byte   0x1\r
- 1774 03be 0305                .2byte  0x503\r
- 1775 03c0 85000000            .4byte  0x85\r
- 1776 03c4 00                  .byte   0\r
- 1777 03c5 0B                  .uleb128 0xb\r
- 1778 03c6 04                  .byte   0x4\r
- 1779 03c7 7A000000            .4byte  0x7a\r
- 1780 03cb 20                  .uleb128 0x20\r
- 1781 03cc EB010000            .4byte  .LASF43\r
- 1782 03d0 01                  .byte   0x1\r
- 1783 03d1 6202                .2byte  0x262\r
- 1784 03d3 01                  .byte   0x1\r
- 1785 03d4 00000000            .4byte  .LFB64\r
- 1786 03d8 84030000            .4byte  .LFE64\r
- 1787 03dc 87020000            .4byte  .LLST11\r
- 1788 03e0 01                  .byte   0x1\r
- 1789 03e1 F3070000            .4byte  0x7f3\r
- 1790 03e5 21                  .uleb128 0x21\r
- 1791 03e6 CD030000            .4byte  .LASF45\r
- 1792 03ea 01                  .byte   0x1\r
- 1793 03eb 6202                .2byte  0x262\r
- 1794 03ed 7A000000            .4byte  0x7a\r
- 1795 03f1 B4020000            .4byte  .LLST12\r
- 1796 03f5 22                  .uleb128 0x22\r
- 1797 03f6 D1010000            .4byte  .LASF46\r
- 1798 03fa 01                  .byte   0x1\r
- 1799 03fb 6402                .2byte  0x264\r
- 1800 03fd 85000000            .4byte  0x85\r
- 1801 0401 03                  .byte   0x3\r
- 1802 0402 91                  .byte   0x91\r
- 1803 0403 DC78                .sleb128 -932\r
- 1804 0405 23                  .uleb128 0x23\r
- 1805 0406 D5030000            .4byte  .LASF47\r
- 1806 040a 01                  .byte   0x1\r
- 1807 040b 6502                .2byte  0x265\r
- 1808 040d 85000000            .4byte  0x85\r
- 1809 0411 D5020000            .4byte  .LLST13\r
- 1810 0415 23                  .uleb128 0x23\r
- 1811 0416 76000000            .4byte  .LASF48\r
- 1812 041a 01                  .byte   0x1\r
- 1813 041b 6602                .2byte  0x266\r
- 1814 041d 7A000000            .4byte  0x7a\r
- 1815 0421 60030000            .4byte  .LLST14\r
- 1816 0425 23                  .uleb128 0x23\r
- 1817 0426 FE020000            .4byte  .LASF49\r
- 1818 042a 01                  .byte   0x1\r
- 1819 042b 6702                .2byte  0x267\r
- 1820 042d 85000000            .4byte  0x85\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 63\r
-\r
-\r
- 1821 0431 1A040000            .4byte  .LLST15\r
- 1822 0435 23                  .uleb128 0x23\r
- 1823 0436 A2030000            .4byte  .LASF50\r
- 1824 043a 01                  .byte   0x1\r
- 1825 043b 6802                .2byte  0x268\r
- 1826 043d B0000000            .4byte  0xb0\r
- 1827 0441 59070000            .4byte  .LLST16\r
- 1828 0445 23                  .uleb128 0x23\r
- 1829 0446 45000000            .4byte  .LASF51\r
- 1830 044a 01                  .byte   0x1\r
- 1831 044b 6902                .2byte  0x269\r
- 1832 044d 85000000            .4byte  0x85\r
- 1833 0451 6C070000            .4byte  .LLST17\r
- 1834 0455 23                  .uleb128 0x23\r
- 1835 0456 9A000000            .4byte  .LASF52\r
- 1836 045a 01                  .byte   0x1\r
- 1837 045b 6A02                .2byte  0x26a\r
- 1838 045d 85000000            .4byte  0x85\r
- 1839 0461 6E080000            .4byte  .LLST18\r
- 1840 0465 23                  .uleb128 0x23\r
- 1841 0466 8A020000            .4byte  .LASF53\r
- 1842 046a 01                  .byte   0x1\r
- 1843 046b 6B02                .2byte  0x26b\r
- 1844 046d 7A000000            .4byte  0x7a\r
- 1845 0471 17090000            .4byte  .LLST19\r
- 1846 0475 23                  .uleb128 0x23\r
- 1847 0476 71020000            .4byte  .LASF54\r
- 1848 047a 01                  .byte   0x1\r
- 1849 047b 6E02                .2byte  0x26e\r
- 1850 047d 7A000000            .4byte  0x7a\r
- 1851 0481 4C090000            .4byte  .LLST20\r
- 1852 0485 23                  .uleb128 0x23\r
- 1853 0486 F7010000            .4byte  .LASF55\r
- 1854 048a 01                  .byte   0x1\r
- 1855 048b 7102                .2byte  0x271\r
- 1856 048d 7A000000            .4byte  0x7a\r
- 1857 0491 98090000            .4byte  .LLST21\r
- 1858 0495 22                  .uleb128 0x22\r
- 1859 0496 6B030000            .4byte  .LASF56\r
- 1860 049a 01                  .byte   0x1\r
- 1861 049b 7302                .2byte  0x273\r
- 1862 049d F3070000            .4byte  0x7f3\r
- 1863 04a1 03                  .byte   0x3\r
- 1864 04a2 91                  .byte   0x91\r
- 1865 04a3 807B                .sleb128 -640\r
- 1866 04a5 22                  .uleb128 0x22\r
- 1867 04a6 BE020000            .4byte  .LASF57\r
- 1868 04aa 01                  .byte   0x1\r
- 1869 04ab 7402                .2byte  0x274\r
- 1870 04ad F3070000            .4byte  0x7f3\r
- 1871 04b1 03                  .byte   0x3\r
- 1872 04b2 91                  .byte   0x91\r
- 1873 04b3 AC7D                .sleb128 -340\r
- 1874 04b5 24                  .uleb128 0x24\r
- 1875 04b6 11030000            .4byte  0x311\r
- 1876 04ba 8E000000            .4byte  .LBB20\r
- 1877 04be A2000000            .4byte  .LBE20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 64\r
-\r
-\r
- 1878 04c2 01                  .byte   0x1\r
- 1879 04c3 A902                .2byte  0x2a9\r
- 1880 04c5 EF040000            .4byte  0x4ef\r
- 1881 04c9 18                  .uleb128 0x18\r
- 1882 04ca 2D030000            .4byte  0x32d\r
- 1883 04ce DA090000            .4byte  .LLST22\r
- 1884 04d2 18                  .uleb128 0x18\r
- 1885 04d3 22030000            .4byte  0x322\r
- 1886 04d7 1B0A0000            .4byte  .LLST23\r
- 1887 04db 25                  .uleb128 0x25\r
- 1888 04dc 8E000000            .4byte  .LBB21\r
- 1889 04e0 A2000000            .4byte  .LBE21\r
- 1890 04e4 19                  .uleb128 0x19\r
- 1891 04e5 38030000            .4byte  0x338\r
- 1892 04e9 4D0A0000            .4byte  .LLST24\r
- 1893 04ed 00                  .byte   0\r
- 1894 04ee 00                  .byte   0\r
- 1895 04ef 26                  .uleb128 0x26\r
- 1896 04f0 00000000            .4byte  .Ldebug_ranges0+0\r
- 1897 04f4 2B070000            .4byte  0x72b\r
- 1898 04f8 23                  .uleb128 0x23\r
- 1899 04f9 90000000            .4byte  .LASF58\r
- 1900 04fd 01                  .byte   0x1\r
- 1901 04fe B702                .2byte  0x2b7\r
- 1902 0500 7A000000            .4byte  0x7a\r
- 1903 0504 A10A0000            .4byte  .LLST25\r
- 1904 0508 1B                  .uleb128 0x1b\r
- 1905 0509 C8000000            .4byte  .LBB23\r
- 1906 050d DE000000            .4byte  .LBE23\r
- 1907 0511 26050000            .4byte  0x526\r
- 1908 0515 23                  .uleb128 0x23\r
- 1909 0516 87000000            .4byte  .LASF59\r
- 1910 051a 01                  .byte   0x1\r
- 1911 051b 0103                .2byte  0x301\r
- 1912 051d 85000000            .4byte  0x85\r
- 1913 0521 9D0B0000            .4byte  .LLST26\r
- 1914 0525 00                  .byte   0\r
- 1915 0526 1B                  .uleb128 0x1b\r
- 1916 0527 26020000            .4byte  .LBB24\r
- 1917 052b 44020000            .4byte  .LBE24\r
- 1918 052f 89050000            .4byte  0x589\r
- 1919 0533 22                  .uleb128 0x22\r
- 1920 0534 95040000            .4byte  .LASF60\r
- 1921 0538 01                  .byte   0x1\r
- 1922 0539 9403                .2byte  0x394\r
- 1923 053b 04080000            .4byte  0x804\r
- 1924 053f 03                  .byte   0x3\r
- 1925 0540 91                  .byte   0x91\r
- 1926 0541 E078                .sleb128 -928\r
- 1927 0543 1C                  .uleb128 0x1c\r
- 1928 0544 32020000            .4byte  .LVL98\r
- 1929 0548 BE0A0000            .4byte  0xabe\r
- 1930 054c 65050000            .4byte  0x565\r
- 1931 0550 1D                  .uleb128 0x1d\r
- 1932 0551 01                  .byte   0x1\r
- 1933 0552 52                  .byte   0x52\r
- 1934 0553 03                  .byte   0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 65\r
-\r
-\r
- 1935 0554 0A                  .byte   0xa\r
- 1936 0555 2001                .2byte  0x120\r
- 1937 0557 1D                  .uleb128 0x1d\r
- 1938 0558 01                  .byte   0x1\r
- 1939 0559 51                  .byte   0x51\r
- 1940 055a 02                  .byte   0x2\r
- 1941 055b 7A                  .byte   0x7a\r
- 1942 055c 00                  .sleb128 0\r
- 1943 055d 1D                  .uleb128 0x1d\r
- 1944 055e 01                  .byte   0x1\r
- 1945 055f 50                  .byte   0x50\r
- 1946 0560 03                  .byte   0x3\r
- 1947 0561 91                  .byte   0x91\r
- 1948 0562 E078                .sleb128 -928\r
- 1949 0564 00                  .byte   0\r
- 1950 0565 1E                  .uleb128 0x1e\r
- 1951 0566 40020000            .4byte  .LVL99\r
- 1952 056a DF0A0000            .4byte  0xadf\r
- 1953 056e 1D                  .uleb128 0x1d\r
- 1954 056f 01                  .byte   0x1\r
- 1955 0570 53                  .byte   0x53\r
- 1956 0571 03                  .byte   0x3\r
- 1957 0572 0A                  .byte   0xa\r
- 1958 0573 2001                .2byte  0x120\r
- 1959 0575 1D                  .uleb128 0x1d\r
- 1960 0576 01                  .byte   0x1\r
- 1961 0577 52                  .byte   0x52\r
- 1962 0578 03                  .byte   0x3\r
- 1963 0579 91                  .byte   0x91\r
- 1964 057a E078                .sleb128 -928\r
- 1965 057c 1D                  .uleb128 0x1d\r
- 1966 057d 01                  .byte   0x1\r
- 1967 057e 51                  .byte   0x51\r
- 1968 057f 02                  .byte   0x2\r
- 1969 0580 08                  .byte   0x8\r
- 1970 0581 FF                  .byte   0xff\r
- 1971 0582 1D                  .uleb128 0x1d\r
- 1972 0583 01                  .byte   0x1\r
- 1973 0584 50                  .byte   0x50\r
- 1974 0585 01                  .byte   0x1\r
- 1975 0586 31                  .byte   0x31\r
- 1976 0587 00                  .byte   0\r
- 1977 0588 00                  .byte   0\r
- 1978 0589 1B                  .uleb128 0x1b\r
- 1979 058a 84020000            .4byte  .LBB25\r
- 1980 058e 9A020000            .4byte  .LBE25\r
- 1981 0592 A7050000            .4byte  0x5a7\r
- 1982 0596 22                  .uleb128 0x22\r
- 1983 0597 B8000000            .4byte  .LASF61\r
- 1984 059b 01                  .byte   0x1\r
- 1985 059c 6104                .2byte  0x461\r
- 1986 059e 15010000            .4byte  0x115\r
- 1987 05a2 03                  .byte   0x3\r
- 1988 05a3 91                  .byte   0x91\r
- 1989 05a4 E078                .sleb128 -928\r
- 1990 05a6 00                  .byte   0\r
- 1991 05a7 1B                  .uleb128 0x1b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 66\r
-\r
-\r
- 1992 05a8 A2020000            .4byte  .LBB26\r
- 1993 05ac 26030000            .4byte  .LBE26\r
- 1994 05b0 6F060000            .4byte  0x66f\r
- 1995 05b4 23                  .uleb128 0x23\r
- 1996 05b5 64030000            .4byte  .LASF62\r
- 1997 05b9 01                  .byte   0x1\r
- 1998 05ba 8104                .2byte  0x481\r
- 1999 05bc 85000000            .4byte  0x85\r
- 2000 05c0 B10B0000            .4byte  .LLST27\r
- 2001 05c4 23                  .uleb128 0x23\r
- 2002 05c5 39040000            .4byte  .LASF63\r
- 2003 05c9 01                  .byte   0x1\r
- 2004 05ca 8604                .2byte  0x486\r
- 2005 05cc 90000000            .4byte  0x90\r
- 2006 05d0 1D0C0000            .4byte  .LLST28\r
- 2007 05d4 23                  .uleb128 0x23\r
- 2008 05d5 F2000000            .4byte  .LASF41\r
- 2009 05d9 01                  .byte   0x1\r
- 2010 05da 8704                .2byte  0x487\r
- 2011 05dc 7A000000            .4byte  0x7a\r
- 2012 05e0 810C0000            .4byte  .LLST29\r
- 2013 05e4 24                  .uleb128 0x24\r
- 2014 05e5 29010000            .4byte  0x129\r
- 2015 05e9 BC020000            .4byte  .LBB27\r
- 2016 05ed CC020000            .4byte  .LBE27\r
- 2017 05f1 01                  .byte   0x1\r
- 2018 05f2 9004                .2byte  0x490\r
- 2019 05f4 1E060000            .4byte  0x61e\r
- 2020 05f8 18                  .uleb128 0x18\r
- 2021 05f9 3A010000            .4byte  0x13a\r
- 2022 05fd B50C0000            .4byte  .LLST30\r
- 2023 0601 25                  .uleb128 0x25\r
- 2024 0602 BC020000            .4byte  .LBB28\r
- 2025 0606 CC020000            .4byte  .LBE28\r
- 2026 060a 19                  .uleb128 0x19\r
- 2027 060b 50010000            .4byte  0x150\r
- 2028 060f C80C0000            .4byte  .LLST31\r
- 2029 0613 18                  .uleb128 0x18\r
- 2030 0614 45010000            .4byte  0x145\r
- 2031 0618 E70C0000            .4byte  .LLST32\r
- 2032 061c 00                  .byte   0\r
- 2033 061d 00                  .byte   0\r
- 2034 061e 24                  .uleb128 0x24\r
- 2035 061f 4F030000            .4byte  0x34f\r
- 2036 0623 D8020000            .4byte  .LBB29\r
- 2037 0627 E4020000            .4byte  .LBE29\r
- 2038 062b 01                  .byte   0x1\r
- 2039 062c 9804                .2byte  0x498\r
- 2040 062e 58060000            .4byte  0x658\r
- 2041 0632 18                  .uleb128 0x18\r
- 2042 0633 6B030000            .4byte  0x36b\r
- 2043 0637 130D0000            .4byte  .LLST33\r
- 2044 063b 18                  .uleb128 0x18\r
- 2045 063c 60030000            .4byte  0x360\r
- 2046 0640 340D0000            .4byte  .LLST34\r
- 2047 0644 25                  .uleb128 0x25\r
- 2048 0645 D8020000            .4byte  .LBB30\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 67\r
-\r
-\r
- 2049 0649 E4020000            .4byte  .LBE30\r
- 2050 064d 19                  .uleb128 0x19\r
- 2051 064e 76030000            .4byte  0x376\r
- 2052 0652 800D0000            .4byte  .LLST35\r
- 2053 0656 00                  .byte   0\r
- 2054 0657 00                  .byte   0\r
- 2055 0658 25                  .uleb128 0x25\r
- 2056 0659 EA020000            .4byte  .LBB31\r
- 2057 065d 00030000            .4byte  .LBE31\r
- 2058 0661 12                  .uleb128 0x12\r
- 2059 0662 C8010000            .4byte  .LASF64\r
- 2060 0666 01                  .byte   0x1\r
- 2061 0667 AA04                .2byte  0x4aa\r
- 2062 0669 85000000            .4byte  0x85\r
- 2063 066d 00                  .byte   0\r
- 2064 066e 00                  .byte   0\r
- 2065 066f 27                  .uleb128 0x27\r
- 2066 0670 9C010000            .4byte  .LVL84\r
- 2067 0674 71020000            .4byte  0x271\r
- 2068 0678 1C                  .uleb128 0x1c\r
- 2069 0679 D2010000            .4byte  .LVL88\r
- 2070 067d BE0A0000            .4byte  0xabe\r
- 2071 0681 98060000            .4byte  0x698\r
- 2072 0685 1D                  .uleb128 0x1d\r
- 2073 0686 01                  .byte   0x1\r
- 2074 0687 52                  .byte   0x52\r
- 2075 0688 02                  .byte   0x2\r
- 2076 0689 77                  .byte   0x77\r
- 2077 068a 00                  .sleb128 0\r
- 2078 068b 1D                  .uleb128 0x1d\r
- 2079 068c 01                  .byte   0x1\r
- 2080 068d 51                  .byte   0x51\r
- 2081 068e 01                  .byte   0x1\r
- 2082 068f 30                  .byte   0x30\r
- 2083 0690 1D                  .uleb128 0x1d\r
- 2084 0691 01                  .byte   0x1\r
- 2085 0692 50                  .byte   0x50\r
- 2086 0693 03                  .byte   0x3\r
- 2087 0694 91                  .byte   0x91\r
- 2088 0695 AC7D                .sleb128 -340\r
- 2089 0697 00                  .byte   0\r
- 2090 0698 1C                  .uleb128 0x1c\r
- 2091 0699 F0010000            .4byte  .LVL92\r
- 2092 069d 060B0000            .4byte  0xb06\r
- 2093 06a1 C0060000            .4byte  0x6c0\r
- 2094 06a5 1D                  .uleb128 0x1d\r
- 2095 06a6 01                  .byte   0x1\r
- 2096 06a7 52                  .byte   0x52\r
- 2097 06a8 02                  .byte   0x2\r
- 2098 06a9 75                  .byte   0x75\r
- 2099 06aa 00                  .sleb128 0\r
- 2100 06ab 1D                  .uleb128 0x1d\r
- 2101 06ac 01                  .byte   0x1\r
- 2102 06ad 51                  .byte   0x51\r
- 2103 06ae 03                  .byte   0x3\r
- 2104 06af 91                  .byte   0x91\r
- 2105 06b0 877B                .sleb128 -633\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 68\r
-\r
-\r
- 2106 06b2 1D                  .uleb128 0x1d\r
- 2107 06b3 01                  .byte   0x1\r
- 2108 06b4 50                  .byte   0x50\r
- 2109 06b5 09                  .byte   0x9\r
- 2110 06b6 91                  .byte   0x91\r
- 2111 06b7 00                  .sleb128 0\r
- 2112 06b8 77                  .byte   0x77\r
- 2113 06b9 00                  .sleb128 0\r
- 2114 06ba 22                  .byte   0x22\r
- 2115 06bb 0A                  .byte   0xa\r
- 2116 06bc 5401                .2byte  0x154\r
- 2117 06be 1C                  .byte   0x1c\r
- 2118 06bf 00                  .byte   0\r
- 2119 06c0 27                  .uleb128 0x27\r
- 2120 06c1 00020000            .4byte  .LVL94\r
- 2121 06c5 270B0000            .4byte  0xb27\r
- 2122 06c9 1C                  .uleb128 0x1c\r
- 2123 06ca 50020000            .4byte  .LVL101\r
- 2124 06ce DF0A0000            .4byte  0xadf\r
- 2125 06d2 F0060000            .4byte  0x6f0\r
- 2126 06d6 1D                  .uleb128 0x1d\r
- 2127 06d7 01                  .byte   0x1\r
- 2128 06d8 53                  .byte   0x53\r
- 2129 06d9 02                  .byte   0x2\r
- 2130 06da 76                  .byte   0x76\r
- 2131 06db 00                  .sleb128 0\r
- 2132 06dc 1D                  .uleb128 0x1d\r
- 2133 06dd 01                  .byte   0x1\r
- 2134 06de 52                  .byte   0x52\r
- 2135 06df 03                  .byte   0x3\r
- 2136 06e0 91                  .byte   0x91\r
- 2137 06e1 AC7D                .sleb128 -340\r
- 2138 06e3 1D                  .uleb128 0x1d\r
- 2139 06e4 01                  .byte   0x1\r
- 2140 06e5 51                  .byte   0x51\r
- 2141 06e6 02                  .byte   0x2\r
- 2142 06e7 75                  .byte   0x75\r
- 2143 06e8 00                  .sleb128 0\r
- 2144 06e9 1D                  .uleb128 0x1d\r
- 2145 06ea 01                  .byte   0x1\r
- 2146 06eb 50                  .byte   0x50\r
- 2147 06ec 02                  .byte   0x2\r
- 2148 06ed 7B                  .byte   0x7b\r
- 2149 06ee 00                  .sleb128 0\r
- 2150 06ef 00                  .byte   0\r
- 2151 06f0 1C                  .uleb128 0x1c\r
- 2152 06f1 7A020000            .4byte  .LVL106\r
- 2153 06f5 060B0000            .4byte  0xb06\r
- 2154 06f9 18070000            .4byte  0x718\r
- 2155 06fd 1D                  .uleb128 0x1d\r
- 2156 06fe 01                  .byte   0x1\r
- 2157 06ff 52                  .byte   0x52\r
- 2158 0700 02                  .byte   0x2\r
- 2159 0701 75                  .byte   0x75\r
- 2160 0702 00                  .sleb128 0\r
- 2161 0703 1D                  .uleb128 0x1d\r
- 2162 0704 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 69\r
-\r
-\r
- 2163 0705 51                  .byte   0x51\r
- 2164 0706 03                  .byte   0x3\r
- 2165 0707 91                  .byte   0x91\r
- 2166 0708 847B                .sleb128 -636\r
- 2167 070a 1D                  .uleb128 0x1d\r
- 2168 070b 01                  .byte   0x1\r
- 2169 070c 50                  .byte   0x50\r
- 2170 070d 09                  .byte   0x9\r
- 2171 070e 91                  .byte   0x91\r
- 2172 070f 00                  .sleb128 0\r
- 2173 0710 77                  .byte   0x77\r
- 2174 0711 00                  .sleb128 0\r
- 2175 0712 22                  .byte   0x22\r
- 2176 0713 0A                  .byte   0xa\r
- 2177 0714 5401                .2byte  0x154\r
- 2178 0716 1C                  .byte   0x1c\r
- 2179 0717 00                  .byte   0\r
- 2180 0718 27                  .uleb128 0x27\r
- 2181 0719 2A030000            .4byte  .LVL134\r
- 2182 071d 71020000            .4byte  0x271\r
- 2183 0721 27                  .uleb128 0x27\r
- 2184 0722 36030000            .4byte  .LVL136\r
- 2185 0726 310B0000            .4byte  0xb31\r
- 2186 072a 00                  .byte   0\r
- 2187 072b 24                  .uleb128 0x24\r
- 2188 072c 82030000            .4byte  0x382\r
- 2189 0730 DE000000            .4byte  .LBB32\r
- 2190 0734 34010000            .4byte  .LBE32\r
- 2191 0738 01                  .byte   0x1\r
- 2192 0739 E504                .2byte  0x4e5\r
- 2193 073b CA070000            .4byte  0x7ca\r
- 2194 073f 28                  .uleb128 0x28\r
- 2195 0740 AC030000            .4byte  0x3ac\r
- 2196 0744 03                  .byte   0x3\r
- 2197 0745 91                  .byte   0x91\r
- 2198 0746 DE78                .sleb128 -930\r
- 2199 0748 18                  .uleb128 0x18\r
- 2200 0749 A0030000            .4byte  0x3a0\r
- 2201 074d 9F0D0000            .4byte  .LLST36\r
- 2202 0751 18                  .uleb128 0x18\r
- 2203 0752 94030000            .4byte  0x394\r
- 2204 0756 CE0D0000            .4byte  .LLST37\r
- 2205 075a 25                  .uleb128 0x25\r
- 2206 075b DE000000            .4byte  .LBB33\r
- 2207 075f 34010000            .4byte  .LBE33\r
- 2208 0763 29                  .uleb128 0x29\r
- 2209 0764 B8030000            .4byte  0x3b8\r
- 2210 0768 01                  .byte   0x1\r
- 2211 0769 52                  .byte   0x52\r
- 2212 076a 24                  .uleb128 0x24\r
- 2213 076b 11030000            .4byte  0x311\r
- 2214 076f FA000000            .4byte  .LBB34\r
- 2215 0773 10010000            .4byte  .LBE34\r
- 2216 0777 01                  .byte   0x1\r
- 2217 0778 0C05                .2byte  0x50c\r
- 2218 077a A4070000            .4byte  0x7a4\r
- 2219 077e 18                  .uleb128 0x18\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 70\r
-\r
-\r
- 2220 077f 2D030000            .4byte  0x32d\r
- 2221 0783 E10D0000            .4byte  .LLST38\r
- 2222 0787 18                  .uleb128 0x18\r
- 2223 0788 22030000            .4byte  0x322\r
- 2224 078c F40D0000            .4byte  .LLST39\r
- 2225 0790 25                  .uleb128 0x25\r
- 2226 0791 FA000000            .4byte  .LBB35\r
- 2227 0795 10010000            .4byte  .LBE35\r
- 2228 0799 19                  .uleb128 0x19\r
- 2229 079a 38030000            .4byte  0x338\r
- 2230 079e 230E0000            .4byte  .LLST40\r
- 2231 07a2 00                  .byte   0\r
- 2232 07a3 00                  .byte   0\r
- 2233 07a4 1E                  .uleb128 0x1e\r
- 2234 07a5 34010000            .4byte  .LVL78\r
- 2235 07a9 3B0B0000            .4byte  0xb3b\r
- 2236 07ad 1D                  .uleb128 0x1d\r
- 2237 07ae 01                  .byte   0x1\r
- 2238 07af 53                  .byte   0x53\r
- 2239 07b0 02                  .byte   0x2\r
- 2240 07b1 09                  .byte   0x9\r
- 2241 07b2 96                  .byte   0x96\r
- 2242 07b3 1D                  .uleb128 0x1d\r
- 2243 07b4 01                  .byte   0x1\r
- 2244 07b5 52                  .byte   0x52\r
- 2245 07b6 03                  .byte   0x3\r
- 2246 07b7 91                  .byte   0x91\r
- 2247 07b8 DE78                .sleb128 -930\r
- 2248 07ba 1D                  .uleb128 0x1d\r
- 2249 07bb 01                  .byte   0x1\r
- 2250 07bc 51                  .byte   0x51\r
- 2251 07bd 02                  .byte   0x2\r
- 2252 07be 74                  .byte   0x74\r
- 2253 07bf 07                  .sleb128 7\r
- 2254 07c0 1D                  .uleb128 0x1d\r
- 2255 07c1 01                  .byte   0x1\r
- 2256 07c2 50                  .byte   0x50\r
- 2257 07c3 03                  .byte   0x3\r
- 2258 07c4 91                  .byte   0x91\r
- 2259 07c5 807B                .sleb128 -640\r
- 2260 07c7 00                  .byte   0\r
- 2261 07c8 00                  .byte   0\r
- 2262 07c9 00                  .byte   0\r
- 2263 07ca 27                  .uleb128 0x27\r
- 2264 07cb 0E000000            .4byte  .LVL49\r
- 2265 07cf 680B0000            .4byte  0xb68\r
- 2266 07d3 1E                  .uleb128 0x1e\r
- 2267 07d4 32000000            .4byte  .LVL54\r
- 2268 07d8 720B0000            .4byte  0xb72\r
- 2269 07dc 1D                  .uleb128 0x1d\r
- 2270 07dd 01                  .byte   0x1\r
- 2271 07de 52                  .byte   0x52\r
- 2272 07df 03                  .byte   0x3\r
- 2273 07e0 91                  .byte   0x91\r
- 2274 07e1 DC78                .sleb128 -932\r
- 2275 07e3 1D                  .uleb128 0x1d\r
- 2276 07e4 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 71\r
-\r
-\r
- 2277 07e5 51                  .byte   0x51\r
- 2278 07e6 03                  .byte   0x3\r
- 2279 07e7 0A                  .byte   0xa\r
- 2280 07e8 2C01                .2byte  0x12c\r
- 2281 07ea 1D                  .uleb128 0x1d\r
- 2282 07eb 01                  .byte   0x1\r
- 2283 07ec 50                  .byte   0x50\r
- 2284 07ed 03                  .byte   0x3\r
- 2285 07ee 91                  .byte   0x91\r
- 2286 07ef 807B                .sleb128 -640\r
- 2287 07f1 00                  .byte   0\r
- 2288 07f2 00                  .byte   0\r
- 2289 07f3 08                  .uleb128 0x8\r
- 2290 07f4 7A000000            .4byte  0x7a\r
- 2291 07f8 04080000            .4byte  0x804\r
- 2292 07fc 2A                  .uleb128 0x2a\r
- 2293 07fd 0E010000            .4byte  0x10e\r
- 2294 0801 2B01                .2byte  0x12b\r
- 2295 0803 00                  .byte   0\r
- 2296 0804 08                  .uleb128 0x8\r
- 2297 0805 7A000000            .4byte  0x7a\r
- 2298 0809 15080000            .4byte  0x815\r
- 2299 080d 2A                  .uleb128 0x2a\r
- 2300 080e 0E010000            .4byte  0x10e\r
- 2301 0812 1F01                .2byte  0x11f\r
- 2302 0814 00                  .byte   0\r
- 2303 0815 2B                  .uleb128 0x2b\r
- 2304 0816 95020000            .4byte  .LASF95\r
- 2305 081a 01                  .byte   0x1\r
- 2306 081b 8901                .2byte  0x189\r
- 2307 081d 01                  .byte   0x1\r
- 2308 081e 01                  .byte   0x1\r
- 2309 081f 2C                  .uleb128 0x2c\r
- 2310 0820 01                  .byte   0x1\r
- 2311 0821 54010000            .4byte  .LASF67\r
- 2312 0825 01                  .byte   0x1\r
- 2313 0826 1001                .2byte  0x110\r
- 2314 0828 01                  .byte   0x1\r
- 2315 0829 00000000            .4byte  .LFB59\r
- 2316 082d 80000000            .4byte  .LFE59\r
- 2317 0831 360E0000            .4byte  .LLST41\r
- 2318 0835 01                  .byte   0x1\r
- 2319 0836 41090000            .4byte  0x941\r
- 2320 083a 23                  .uleb128 0x23\r
- 2321 083b DC010000            .4byte  .LASF34\r
- 2322 083f 01                  .byte   0x1\r
- 2323 0840 1301                .2byte  0x113\r
- 2324 0842 7A000000            .4byte  0x7a\r
- 2325 0846 630E0000            .4byte  .LLST42\r
- 2326 084a 22                  .uleb128 0x22\r
- 2327 084b 67000000            .4byte  .LASF65\r
- 2328 084f 01                  .byte   0x1\r
- 2329 0850 1701                .2byte  0x117\r
- 2330 0852 04080000            .4byte  0x804\r
- 2331 0856 03                  .byte   0x3\r
- 2332 0857 91                  .byte   0x91\r
- 2333 0858 D87D                .sleb128 -296\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 72\r
-\r
-\r
- 2334 085a 23                  .uleb128 0x23\r
- 2335 085b 22000000            .4byte  .LASF66\r
- 2336 085f 01                  .byte   0x1\r
- 2337 0860 1A01                .2byte  0x11a\r
- 2338 0862 B0000000            .4byte  0xb0\r
- 2339 0866 7C0E0000            .4byte  .LLST43\r
- 2340 086a 24                  .uleb128 0x24\r
- 2341 086b 4F030000            .4byte  0x34f\r
- 2342 086f 28000000            .4byte  .LBB41\r
- 2343 0873 34000000            .4byte  .LBE41\r
- 2344 0877 01                  .byte   0x1\r
- 2345 0878 4901                .2byte  0x149\r
- 2346 087a A1080000            .4byte  0x8a1\r
- 2347 087e 18                  .uleb128 0x18\r
- 2348 087f 6B030000            .4byte  0x36b\r
- 2349 0883 8F0E0000            .4byte  .LLST44\r
- 2350 0887 1A                  .uleb128 0x1a\r
- 2351 0888 60030000            .4byte  0x360\r
- 2352 088c 00                  .byte   0\r
- 2353 088d 25                  .uleb128 0x25\r
- 2354 088e 28000000            .4byte  .LBB42\r
- 2355 0892 34000000            .4byte  .LBE42\r
- 2356 0896 19                  .uleb128 0x19\r
- 2357 0897 76030000            .4byte  0x376\r
- 2358 089b A20E0000            .4byte  .LLST45\r
- 2359 089f 00                  .byte   0\r
- 2360 08a0 00                  .byte   0\r
- 2361 08a1 24                  .uleb128 0x24\r
- 2362 08a2 15080000            .4byte  0x815\r
- 2363 08a6 6A000000            .4byte  .LBB43\r
- 2364 08aa 72000000            .4byte  .LBE43\r
- 2365 08ae 01                  .byte   0x1\r
- 2366 08af 7701                .2byte  0x177\r
- 2367 08b1 BF080000            .4byte  0x8bf\r
- 2368 08b5 27                  .uleb128 0x27\r
- 2369 08b6 72000000            .4byte  .LVL164\r
- 2370 08ba 310B0000            .4byte  0xb31\r
- 2371 08be 00                  .byte   0\r
- 2372 08bf 27                  .uleb128 0x27\r
- 2373 08c0 08000000            .4byte  .LVL149\r
- 2374 08c4 990B0000            .4byte  0xb99\r
- 2375 08c8 1C                  .uleb128 0x1c\r
- 2376 08c9 10000000            .4byte  .LVL150\r
- 2377 08cd A70B0000            .4byte  0xba7\r
- 2378 08d1 DB080000            .4byte  0x8db\r
- 2379 08d5 1D                  .uleb128 0x1d\r
- 2380 08d6 01                  .byte   0x1\r
- 2381 08d7 50                  .byte   0x50\r
- 2382 08d8 01                  .byte   0x1\r
- 2383 08d9 30                  .byte   0x30\r
- 2384 08da 00                  .byte   0\r
- 2385 08db 1C                  .uleb128 0x1c\r
- 2386 08dc 16000000            .4byte  .LVL151\r
- 2387 08e0 BB0B0000            .4byte  0xbbb\r
- 2388 08e4 EF080000            .4byte  0x8ef\r
- 2389 08e8 1D                  .uleb128 0x1d\r
- 2390 08e9 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 73\r
-\r
-\r
- 2391 08ea 50                  .byte   0x50\r
- 2392 08eb 02                  .byte   0x2\r
- 2393 08ec 7D                  .byte   0x7d\r
- 2394 08ed 00                  .sleb128 0\r
- 2395 08ee 00                  .byte   0\r
- 2396 08ef 1C                  .uleb128 0x1c\r
- 2397 08f0 1E000000            .4byte  .LVL152\r
- 2398 08f4 A70B0000            .4byte  0xba7\r
- 2399 08f8 02090000            .4byte  0x902\r
- 2400 08fc 1D                  .uleb128 0x1d\r
- 2401 08fd 01                  .byte   0x1\r
- 2402 08fe 50                  .byte   0x50\r
- 2403 08ff 01                  .byte   0x1\r
- 2404 0900 30                  .byte   0x30\r
- 2405 0901 00                  .byte   0\r
- 2406 0902 1C                  .uleb128 0x1c\r
- 2407 0903 4A000000            .4byte  .LVL159\r
- 2408 0907 A70B0000            .4byte  0xba7\r
- 2409 090b 15090000            .4byte  0x915\r
- 2410 090f 1D                  .uleb128 0x1d\r
- 2411 0910 01                  .byte   0x1\r
- 2412 0911 50                  .byte   0x50\r
- 2413 0912 01                  .byte   0x1\r
- 2414 0913 30                  .byte   0x30\r
- 2415 0914 00                  .byte   0\r
- 2416 0915 27                  .uleb128 0x27\r
- 2417 0916 50000000            .4byte  .LVL160\r
- 2418 091a 71020000            .4byte  0x271\r
- 2419 091e 1C                  .uleb128 0x1c\r
- 2420 091f 64000000            .4byte  .LVL162\r
- 2421 0923 CB030000            .4byte  0x3cb\r
- 2422 0927 31090000            .4byte  0x931\r
- 2423 092b 1D                  .uleb128 0x1d\r
- 2424 092c 01                  .byte   0x1\r
- 2425 092d 50                  .byte   0x50\r
- 2426 092e 01                  .byte   0x1\r
- 2427 092f 30                  .byte   0x30\r
- 2428 0930 00                  .byte   0\r
- 2429 0931 1E                  .uleb128 0x1e\r
- 2430 0932 6A000000            .4byte  .LVL163\r
- 2431 0936 CB030000            .4byte  0x3cb\r
- 2432 093a 1D                  .uleb128 0x1d\r
- 2433 093b 01                  .byte   0x1\r
- 2434 093c 50                  .byte   0x50\r
- 2435 093d 01                  .byte   0x1\r
- 2436 093e 44                  .byte   0x44\r
- 2437 093f 00                  .byte   0\r
- 2438 0940 00                  .byte   0\r
- 2439 0941 2C                  .uleb128 0x2c\r
- 2440 0942 01                  .byte   0x1\r
- 2441 0943 0A030000            .4byte  .LASF68\r
- 2442 0947 01                  .byte   0x1\r
- 2443 0948 A301                .2byte  0x1a3\r
- 2444 094a 01                  .byte   0x1\r
- 2445 094b 00000000            .4byte  .LFB61\r
- 2446 094f 30000000            .4byte  .LFE61\r
- 2447 0953 CC0E0000            .4byte  .LLST46\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 74\r
-\r
-\r
- 2448 0957 01                  .byte   0x1\r
- 2449 0958 8D090000            .4byte  0x98d\r
- 2450 095c 1C                  .uleb128 0x1c\r
- 2451 095d 18000000            .4byte  .LVL165\r
- 2452 0961 30020000            .4byte  0x230\r
- 2453 0965 6F090000            .4byte  0x96f\r
- 2454 0969 1D                  .uleb128 0x1d\r
- 2455 096a 01                  .byte   0x1\r
- 2456 096b 50                  .byte   0x50\r
- 2457 096c 01                  .byte   0x1\r
- 2458 096d 31                  .byte   0x31\r
- 2459 096e 00                  .byte   0\r
- 2460 096f 1C                  .uleb128 0x1c\r
- 2461 0970 20000000            .4byte  .LVL166\r
- 2462 0974 30020000            .4byte  0x230\r
- 2463 0978 82090000            .4byte  0x982\r
- 2464 097c 1D                  .uleb128 0x1d\r
- 2465 097d 01                  .byte   0x1\r
- 2466 097e 50                  .byte   0x50\r
- 2467 097f 01                  .byte   0x1\r
- 2468 0980 31                  .byte   0x31\r
- 2469 0981 00                  .byte   0\r
- 2470 0982 2D                  .uleb128 0x2d\r
- 2471 0983 28000000            .4byte  .LVL167\r
- 2472 0987 01                  .byte   0x1\r
- 2473 0988 08020000            .4byte  0x208\r
- 2474 098c 00                  .byte   0\r
- 2475 098d 2C                  .uleb128 0x2c\r
- 2476 098e 01                  .byte   0x1\r
- 2477 098f E0040000            .4byte  .LASF69\r
- 2478 0993 01                  .byte   0x1\r
- 2479 0994 2905                .2byte  0x529\r
- 2480 0996 01                  .byte   0x1\r
- 2481 0997 00000000            .4byte  .LFB66\r
- 2482 099b 34000000            .4byte  .LFE66\r
- 2483 099f EC0E0000            .4byte  .LLST47\r
- 2484 09a3 01                  .byte   0x1\r
- 2485 09a4 480A0000            .4byte  0xa48\r
- 2486 09a8 21                  .uleb128 0x21\r
- 2487 09a9 B8010000            .4byte  .LASF70\r
- 2488 09ad 01                  .byte   0x1\r
- 2489 09ae 2905                .2byte  0x529\r
- 2490 09b0 90000000            .4byte  0x90\r
- 2491 09b4 190F0000            .4byte  .LLST48\r
- 2492 09b8 21                  .uleb128 0x21\r
- 2493 09b9 E3000000            .4byte  .LASF71\r
- 2494 09bd 01                  .byte   0x1\r
- 2495 09be 2905                .2byte  0x529\r
- 2496 09c0 7A000000            .4byte  0x7a\r
- 2497 09c4 3A0F0000            .4byte  .LLST49\r
- 2498 09c8 23                  .uleb128 0x23\r
- 2499 09c9 B0010000            .4byte  .LASF72\r
- 2500 09cd 01                  .byte   0x1\r
- 2501 09ce 2B05                .2byte  0x52b\r
- 2502 09d0 90000000            .4byte  0x90\r
- 2503 09d4 190F0000            .4byte  .LLST48\r
- 2504 09d8 22                  .uleb128 0x22\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 75\r
-\r
-\r
- 2505 09d9 55000000            .4byte  .LASF73\r
- 2506 09dd 01                  .byte   0x1\r
- 2507 09de 2C05                .2byte  0x52c\r
- 2508 09e0 480A0000            .4byte  0xa48\r
- 2509 09e4 03                  .byte   0x3\r
- 2510 09e5 91                  .byte   0x91\r
- 2511 09e6 F07D                .sleb128 -272\r
- 2512 09e8 22                  .uleb128 0x22\r
- 2513 09e9 8D040000            .4byte  .LASF74\r
- 2514 09ed 01                  .byte   0x1\r
- 2515 09ee 2F05                .2byte  0x52f\r
- 2516 09f0 7A000000            .4byte  0x7a\r
- 2517 09f4 01                  .byte   0x1\r
- 2518 09f5 54                  .byte   0x54\r
- 2519 09f6 23                  .uleb128 0x23\r
- 2520 09f7 64030000            .4byte  .LASF62\r
- 2521 09fb 01                  .byte   0x1\r
- 2522 09fc 3205                .2byte  0x532\r
- 2523 09fe 85000000            .4byte  0x85\r
- 2524 0a02 6E0F0000            .4byte  .LLST51\r
- 2525 0a06 22                  .uleb128 0x22\r
- 2526 0a07 2C000000            .4byte  .LASF75\r
- 2527 0a0b 01                  .byte   0x1\r
- 2528 0a0c 3305                .2byte  0x533\r
- 2529 0a0e 90000000            .4byte  0x90\r
- 2530 0a12 01                  .byte   0x1\r
- 2531 0a13 56                  .byte   0x56\r
- 2532 0a14 2E                  .uleb128 0x2e\r
- 2533 0a15 69647800            .ascii  "idx\000"\r
- 2534 0a19 01                  .byte   0x1\r
- 2535 0a1a 3405                .2byte  0x534\r
- 2536 0a1c 85000000            .4byte  0x85\r
- 2537 0a20 A00F0000            .4byte  .LLST52\r
- 2538 0a24 1E                  .uleb128 0x1e\r
- 2539 0a25 30000000            .4byte  .LVL176\r
- 2540 0a29 D30B0000            .4byte  0xbd3\r
- 2541 0a2d 1D                  .uleb128 0x1d\r
- 2542 0a2e 01                  .byte   0x1\r
- 2543 0a2f 52                  .byte   0x52\r
- 2544 0a30 02                  .byte   0x2\r
- 2545 0a31 7D                  .byte   0x7d\r
- 2546 0a32 00                  .sleb128 0\r
- 2547 0a33 1D                  .uleb128 0x1d\r
- 2548 0a34 01                  .byte   0x1\r
- 2549 0a35 51                  .byte   0x51\r
- 2550 0a36 09                  .byte   0x9\r
- 2551 0a37 F3                  .byte   0xf3\r
- 2552 0a38 01                  .uleb128 0x1\r
- 2553 0a39 50                  .byte   0x50\r
- 2554 0a3a 09                  .byte   0x9\r
- 2555 0a3b F4                  .byte   0xf4\r
- 2556 0a3c 24                  .byte   0x24\r
- 2557 0a3d 09                  .byte   0x9\r
- 2558 0a3e FC                  .byte   0xfc\r
- 2559 0a3f 25                  .byte   0x25\r
- 2560 0a40 1D                  .uleb128 0x1d\r
- 2561 0a41 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 76\r
-\r
-\r
- 2562 0a42 50                  .byte   0x50\r
- 2563 0a43 02                  .byte   0x2\r
- 2564 0a44 74                  .byte   0x74\r
- 2565 0a45 00                  .sleb128 0\r
- 2566 0a46 00                  .byte   0\r
- 2567 0a47 00                  .byte   0\r
- 2568 0a48 08                  .uleb128 0x8\r
- 2569 0a49 7A000000            .4byte  0x7a\r
- 2570 0a4d 580A0000            .4byte  0xa58\r
- 2571 0a51 09                  .uleb128 0x9\r
- 2572 0a52 0E010000            .4byte  0x10e\r
- 2573 0a56 FF                  .byte   0xff\r
- 2574 0a57 00                  .byte   0\r
- 2575 0a58 2F                  .uleb128 0x2f\r
- 2576 0a59 48040000            .4byte  .LASF76\r
- 2577 0a5d 01                  .byte   0x1\r
- 2578 0a5e 26                  .byte   0x26\r
- 2579 0a5f 4A030000            .4byte  0x34a\r
- 2580 0a63 01                  .byte   0x1\r
- 2581 0a64 05                  .byte   0x5\r
- 2582 0a65 03                  .byte   0x3\r
- 2583 0a66 00000000            .4byte  BL_Checksum\r
- 2584 0a6a 2F                  .uleb128 0x2f\r
- 2585 0a6b 6C040000            .4byte  .LASF77\r
- 2586 0a6f 01                  .byte   0x1\r
- 2587 0a70 27                  .byte   0x27\r
- 2588 0a71 44030000            .4byte  0x344\r
- 2589 0a75 01                  .byte   0x1\r
- 2590 0a76 05                  .byte   0x5\r
- 2591 0a77 03                  .byte   0x3\r
- 2592 0a78 00000000            .4byte  BL_ChecksumAccess\r
- 2593 0a7c 2F                  .uleb128 0x2f\r
- 2594 0a7d 8C030000            .4byte  .LASF78\r
- 2595 0a81 01                  .byte   0x1\r
- 2596 0a82 2F                  .byte   0x2f\r
- 2597 0a83 8E0A0000            .4byte  0xa8e\r
- 2598 0a87 01                  .byte   0x1\r
- 2599 0a88 05                  .byte   0x5\r
- 2600 0a89 03                  .byte   0x3\r
- 2601 0a8a 00000000            .4byte  BL_SizeBytes\r
- 2602 0a8e 1F                  .uleb128 0x1f\r
- 2603 0a8f 90000000            .4byte  0x90\r
- 2604 0a93 2F                  .uleb128 0x2f\r
- 2605 0a94 A5000000            .4byte  .LASF79\r
- 2606 0a98 01                  .byte   0x1\r
- 2607 0a99 30                  .byte   0x30\r
- 2608 0a9a A50A0000            .4byte  0xaa5\r
- 2609 0a9e 01                  .byte   0x1\r
- 2610 0a9f 05                  .byte   0x5\r
- 2611 0aa0 03                  .byte   0x3\r
- 2612 0aa1 00000000            .4byte  BL_SizeBytesAccess\r
- 2613 0aa5 0B                  .uleb128 0xb\r
- 2614 0aa6 04                  .byte   0x4\r
- 2615 0aa7 8E0A0000            .4byte  0xa8e\r
- 2616 0aab 30                  .uleb128 0x30\r
- 2617 0aac AD040000            .4byte  .LASF80\r
- 2618 0ab0 05                  .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 77\r
-\r
-\r
- 2619 0ab1 1606                .2byte  0x616\r
- 2620 0ab3 B90A0000            .4byte  0xab9\r
- 2621 0ab7 01                  .byte   0x1\r
- 2622 0ab8 01                  .byte   0x1\r
- 2623 0ab9 05                  .uleb128 0x5\r
- 2624 0aba 45000000            .4byte  0x45\r
- 2625 0abe 31                  .uleb128 0x31\r
- 2626 0abf 01                  .byte   0x1\r
- 2627 0ac0 8F010000            .4byte  .LASF81\r
- 2628 0ac4 01                  .byte   0x1\r
- 2629 0ac5 20010000            .4byte  0x120\r
- 2630 0ac9 01                  .byte   0x1\r
- 2631 0aca 01                  .byte   0x1\r
- 2632 0acb DF0A0000            .4byte  0xadf\r
- 2633 0acf 32                  .uleb128 0x32\r
- 2634 0ad0 20010000            .4byte  0x120\r
- 2635 0ad4 32                  .uleb128 0x32\r
- 2636 0ad5 6C000000            .4byte  0x6c\r
- 2637 0ad9 32                  .uleb128 0x32\r
- 2638 0ada 0E010000            .4byte  0x10e\r
- 2639 0ade 00                  .byte   0\r
- 2640 0adf 33                  .uleb128 0x33\r
- 2641 0ae0 01                  .byte   0x1\r
- 2642 0ae1 C7040000            .4byte  .LASF85\r
- 2643 0ae5 06                  .byte   0x6\r
- 2644 0ae6 42                  .byte   0x42\r
- 2645 0ae7 01                  .byte   0x1\r
- 2646 0ae8 B0000000            .4byte  0xb0\r
- 2647 0aec 01                  .byte   0x1\r
- 2648 0aed 060B0000            .4byte  0xb06\r
- 2649 0af1 32                  .uleb128 0x32\r
- 2650 0af2 7A000000            .4byte  0x7a\r
- 2651 0af6 32                  .uleb128 0x32\r
- 2652 0af7 85000000            .4byte  0x85\r
- 2653 0afb 32                  .uleb128 0x32\r
- 2654 0afc 44030000            .4byte  0x344\r
- 2655 0b00 32                  .uleb128 0x32\r
- 2656 0b01 85000000            .4byte  0x85\r
- 2657 0b05 00                  .byte   0\r
- 2658 0b06 31                  .uleb128 0x31\r
- 2659 0b07 01                  .byte   0x1\r
- 2660 0b08 DC000000            .4byte  .LASF82\r
- 2661 0b0c 01                  .byte   0x1\r
- 2662 0b0d 20010000            .4byte  0x120\r
- 2663 0b11 01                  .byte   0x1\r
- 2664 0b12 01                  .byte   0x1\r
- 2665 0b13 270B0000            .4byte  0xb27\r
- 2666 0b17 32                  .uleb128 0x32\r
- 2667 0b18 20010000            .4byte  0x120\r
- 2668 0b1c 32                  .uleb128 0x32\r
- 2669 0b1d 22010000            .4byte  0x122\r
- 2670 0b21 32                  .uleb128 0x32\r
- 2671 0b22 0E010000            .4byte  0x10e\r
- 2672 0b26 00                  .byte   0\r
- 2673 0b27 34                  .uleb128 0x34\r
- 2674 0b28 01                  .byte   0x1\r
- 2675 0b29 C9020000            .4byte  .LASF83\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 78\r
-\r
-\r
- 2676 0b2d 06                  .byte   0x6\r
- 2677 0b2e 4E                  .byte   0x4e\r
- 2678 0b2f 01                  .byte   0x1\r
- 2679 0b30 01                  .byte   0x1\r
- 2680 0b31 34                  .uleb128 0x34\r
- 2681 0b32 01                  .byte   0x1\r
- 2682 0b33 35000000            .4byte  .LASF84\r
- 2683 0b37 07                  .byte   0x7\r
- 2684 0b38 7C                  .byte   0x7c\r
- 2685 0b39 01                  .byte   0x1\r
- 2686 0b3a 01                  .byte   0x1\r
- 2687 0b3b 33                  .uleb128 0x33\r
- 2688 0b3c 01                  .byte   0x1\r
- 2689 0b3d C5000000            .4byte  .LASF86\r
- 2690 0b41 08                  .byte   0x8\r
- 2691 0b42 E6                  .byte   0xe6\r
- 2692 0b43 01                  .byte   0x1\r
- 2693 0b44 B0000000            .4byte  0xb0\r
- 2694 0b48 01                  .byte   0x1\r
- 2695 0b49 620B0000            .4byte  0xb62\r
- 2696 0b4d 32                  .uleb128 0x32\r
- 2697 0b4e C5030000            .4byte  0x3c5\r
- 2698 0b52 32                  .uleb128 0x32\r
- 2699 0b53 85000000            .4byte  0x85\r
- 2700 0b57 32                  .uleb128 0x32\r
- 2701 0b58 620B0000            .4byte  0xb62\r
- 2702 0b5c 32                  .uleb128 0x32\r
- 2703 0b5d 7A000000            .4byte  0x7a\r
- 2704 0b61 00                  .byte   0\r
- 2705 0b62 0B                  .uleb128 0xb\r
- 2706 0b63 04                  .byte   0x4\r
- 2707 0b64 85000000            .4byte  0x85\r
- 2708 0b68 34                  .uleb128 0x34\r
- 2709 0b69 01                  .byte   0x1\r
- 2710 0b6a 04040000            .4byte  .LASF87\r
- 2711 0b6e 08                  .byte   0x8\r
- 2712 0b6f E3                  .byte   0xe3\r
- 2713 0b70 01                  .byte   0x1\r
- 2714 0b71 01                  .byte   0x1\r
- 2715 0b72 33                  .uleb128 0x33\r
- 2716 0b73 01                  .byte   0x1\r
- 2717 0b74 E7030000            .4byte  .LASF88\r
- 2718 0b78 08                  .byte   0x8\r
- 2719 0b79 E8                  .byte   0xe8\r
- 2720 0b7a 01                  .byte   0x1\r
- 2721 0b7b B0000000            .4byte  0xb0\r
- 2722 0b7f 01                  .byte   0x1\r
- 2723 0b80 990B0000            .4byte  0xb99\r
- 2724 0b84 32                  .uleb128 0x32\r
- 2725 0b85 C5030000            .4byte  0x3c5\r
- 2726 0b89 32                  .uleb128 0x32\r
- 2727 0b8a 85000000            .4byte  0x85\r
- 2728 0b8e 32                  .uleb128 0x32\r
- 2729 0b8f 620B0000            .4byte  0xb62\r
- 2730 0b93 32                  .uleb128 0x32\r
- 2731 0b94 7A000000            .4byte  0x7a\r
- 2732 0b98 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 79\r
-\r
-\r
- 2733 0b99 35                  .uleb128 0x35\r
- 2734 0b9a 01                  .byte   0x1\r
- 2735 0b9b 4A010000            .4byte  .LASF96\r
- 2736 0b9f 06                  .byte   0x6\r
- 2737 0ba0 40                  .byte   0x40\r
- 2738 0ba1 01                  .byte   0x1\r
- 2739 0ba2 B0000000            .4byte  0xb0\r
- 2740 0ba6 01                  .byte   0x1\r
- 2741 0ba7 36                  .uleb128 0x36\r
- 2742 0ba8 01                  .byte   0x1\r
- 2743 0ba9 D8020000            .4byte  .LASF89\r
- 2744 0bad 07                  .byte   0x7\r
- 2745 0bae 80                  .byte   0x80\r
- 2746 0baf 01                  .byte   0x1\r
- 2747 0bb0 01                  .byte   0x1\r
- 2748 0bb1 BB0B0000            .4byte  0xbbb\r
- 2749 0bb5 32                  .uleb128 0x32\r
- 2750 0bb6 7A000000            .4byte  0x7a\r
- 2751 0bba 00                  .byte   0\r
- 2752 0bbb 33                  .uleb128 0x33\r
- 2753 0bbc 01                  .byte   0x1\r
- 2754 0bbd 59040000            .4byte  .LASF90\r
- 2755 0bc1 06                  .byte   0x6\r
- 2756 0bc2 41                  .byte   0x41\r
- 2757 0bc3 01                  .byte   0x1\r
- 2758 0bc4 B0000000            .4byte  0xb0\r
- 2759 0bc8 01                  .byte   0x1\r
- 2760 0bc9 D30B0000            .4byte  0xbd3\r
- 2761 0bcd 32                  .uleb128 0x32\r
- 2762 0bce C5030000            .4byte  0x3c5\r
- 2763 0bd2 00                  .byte   0\r
- 2764 0bd3 37                  .uleb128 0x37\r
- 2765 0bd4 01                  .byte   0x1\r
- 2766 0bd5 7E040000            .4byte  .LASF91\r
- 2767 0bd9 06                  .byte   0x6\r
- 2768 0bda 44                  .byte   0x44\r
- 2769 0bdb 01                  .byte   0x1\r
- 2770 0bdc B0000000            .4byte  0xb0\r
- 2771 0be0 01                  .byte   0x1\r
- 2772 0be1 32                  .uleb128 0x32\r
- 2773 0be2 7A000000            .4byte  0x7a\r
- 2774 0be6 32                  .uleb128 0x32\r
- 2775 0be7 85000000            .4byte  0x85\r
- 2776 0beb 32                  .uleb128 0x32\r
- 2777 0bec 44030000            .4byte  0x344\r
- 2778 0bf0 00                  .byte   0\r
- 2779 0bf1 00                  .byte   0\r
- 2780                          .section        .debug_abbrev,"",%progbits\r
- 2781                  .Ldebug_abbrev0:\r
- 2782 0000 01                  .uleb128 0x1\r
- 2783 0001 11                  .uleb128 0x11\r
- 2784 0002 01                  .byte   0x1\r
- 2785 0003 25                  .uleb128 0x25\r
- 2786 0004 0E                  .uleb128 0xe\r
- 2787 0005 13                  .uleb128 0x13\r
- 2788 0006 0B                  .uleb128 0xb\r
- 2789 0007 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 80\r
-\r
-\r
- 2790 0008 0E                  .uleb128 0xe\r
- 2791 0009 1B                  .uleb128 0x1b\r
- 2792 000a 0E                  .uleb128 0xe\r
- 2793 000b 55                  .uleb128 0x55\r
- 2794 000c 06                  .uleb128 0x6\r
- 2795 000d 11                  .uleb128 0x11\r
- 2796 000e 01                  .uleb128 0x1\r
- 2797 000f 52                  .uleb128 0x52\r
- 2798 0010 01                  .uleb128 0x1\r
- 2799 0011 10                  .uleb128 0x10\r
- 2800 0012 06                  .uleb128 0x6\r
- 2801 0013 00                  .byte   0\r
- 2802 0014 00                  .byte   0\r
- 2803 0015 02                  .uleb128 0x2\r
- 2804 0016 24                  .uleb128 0x24\r
- 2805 0017 00                  .byte   0\r
- 2806 0018 0B                  .uleb128 0xb\r
- 2807 0019 0B                  .uleb128 0xb\r
- 2808 001a 3E                  .uleb128 0x3e\r
- 2809 001b 0B                  .uleb128 0xb\r
- 2810 001c 03                  .uleb128 0x3\r
- 2811 001d 0E                  .uleb128 0xe\r
- 2812 001e 00                  .byte   0\r
- 2813 001f 00                  .byte   0\r
- 2814 0020 03                  .uleb128 0x3\r
- 2815 0021 16                  .uleb128 0x16\r
- 2816 0022 00                  .byte   0\r
- 2817 0023 03                  .uleb128 0x3\r
- 2818 0024 0E                  .uleb128 0xe\r
- 2819 0025 3A                  .uleb128 0x3a\r
- 2820 0026 0B                  .uleb128 0xb\r
- 2821 0027 3B                  .uleb128 0x3b\r
- 2822 0028 0B                  .uleb128 0xb\r
- 2823 0029 49                  .uleb128 0x49\r
- 2824 002a 13                  .uleb128 0x13\r
- 2825 002b 00                  .byte   0\r
- 2826 002c 00                  .byte   0\r
- 2827 002d 04                  .uleb128 0x4\r
- 2828 002e 24                  .uleb128 0x24\r
- 2829 002f 00                  .byte   0\r
- 2830 0030 0B                  .uleb128 0xb\r
- 2831 0031 0B                  .uleb128 0xb\r
- 2832 0032 3E                  .uleb128 0x3e\r
- 2833 0033 0B                  .uleb128 0xb\r
- 2834 0034 03                  .uleb128 0x3\r
- 2835 0035 08                  .uleb128 0x8\r
- 2836 0036 00                  .byte   0\r
- 2837 0037 00                  .byte   0\r
- 2838 0038 05                  .uleb128 0x5\r
- 2839 0039 35                  .uleb128 0x35\r
- 2840 003a 00                  .byte   0\r
- 2841 003b 49                  .uleb128 0x49\r
- 2842 003c 13                  .uleb128 0x13\r
- 2843 003d 00                  .byte   0\r
- 2844 003e 00                  .byte   0\r
- 2845 003f 06                  .uleb128 0x6\r
- 2846 0040 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 81\r
-\r
-\r
- 2847 0041 01                  .byte   0x1\r
- 2848 0042 0B                  .uleb128 0xb\r
- 2849 0043 0B                  .uleb128 0xb\r
- 2850 0044 3A                  .uleb128 0x3a\r
- 2851 0045 0B                  .uleb128 0xb\r
- 2852 0046 3B                  .uleb128 0x3b\r
- 2853 0047 0B                  .uleb128 0xb\r
- 2854 0048 01                  .uleb128 0x1\r
- 2855 0049 13                  .uleb128 0x13\r
- 2856 004a 00                  .byte   0\r
- 2857 004b 00                  .byte   0\r
- 2858 004c 07                  .uleb128 0x7\r
- 2859 004d 0D                  .uleb128 0xd\r
- 2860 004e 00                  .byte   0\r
- 2861 004f 03                  .uleb128 0x3\r
- 2862 0050 0E                  .uleb128 0xe\r
- 2863 0051 3A                  .uleb128 0x3a\r
- 2864 0052 0B                  .uleb128 0xb\r
- 2865 0053 3B                  .uleb128 0x3b\r
- 2866 0054 0B                  .uleb128 0xb\r
- 2867 0055 49                  .uleb128 0x49\r
- 2868 0056 13                  .uleb128 0x13\r
- 2869 0057 38                  .uleb128 0x38\r
- 2870 0058 0A                  .uleb128 0xa\r
- 2871 0059 00                  .byte   0\r
- 2872 005a 00                  .byte   0\r
- 2873 005b 08                  .uleb128 0x8\r
- 2874 005c 01                  .uleb128 0x1\r
- 2875 005d 01                  .byte   0x1\r
- 2876 005e 49                  .uleb128 0x49\r
- 2877 005f 13                  .uleb128 0x13\r
- 2878 0060 01                  .uleb128 0x1\r
- 2879 0061 13                  .uleb128 0x13\r
- 2880 0062 00                  .byte   0\r
- 2881 0063 00                  .byte   0\r
- 2882 0064 09                  .uleb128 0x9\r
- 2883 0065 21                  .uleb128 0x21\r
- 2884 0066 00                  .byte   0\r
- 2885 0067 49                  .uleb128 0x49\r
- 2886 0068 13                  .uleb128 0x13\r
- 2887 0069 2F                  .uleb128 0x2f\r
- 2888 006a 0B                  .uleb128 0xb\r
- 2889 006b 00                  .byte   0\r
- 2890 006c 00                  .byte   0\r
- 2891 006d 0A                  .uleb128 0xa\r
- 2892 006e 0F                  .uleb128 0xf\r
- 2893 006f 00                  .byte   0\r
- 2894 0070 0B                  .uleb128 0xb\r
- 2895 0071 0B                  .uleb128 0xb\r
- 2896 0072 00                  .byte   0\r
- 2897 0073 00                  .byte   0\r
- 2898 0074 0B                  .uleb128 0xb\r
- 2899 0075 0F                  .uleb128 0xf\r
- 2900 0076 00                  .byte   0\r
- 2901 0077 0B                  .uleb128 0xb\r
- 2902 0078 0B                  .uleb128 0xb\r
- 2903 0079 49                  .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 82\r
-\r
-\r
- 2904 007a 13                  .uleb128 0x13\r
- 2905 007b 00                  .byte   0\r
- 2906 007c 00                  .byte   0\r
- 2907 007d 0C                  .uleb128 0xc\r
- 2908 007e 26                  .uleb128 0x26\r
- 2909 007f 00                  .byte   0\r
- 2910 0080 00                  .byte   0\r
- 2911 0081 00                  .byte   0\r
- 2912 0082 0D                  .uleb128 0xd\r
- 2913 0083 2E                  .uleb128 0x2e\r
- 2914 0084 01                  .byte   0x1\r
- 2915 0085 03                  .uleb128 0x3\r
- 2916 0086 0E                  .uleb128 0xe\r
- 2917 0087 3A                  .uleb128 0x3a\r
- 2918 0088 0B                  .uleb128 0xb\r
- 2919 0089 3B                  .uleb128 0x3b\r
- 2920 008a 0B                  .uleb128 0xb\r
- 2921 008b 27                  .uleb128 0x27\r
- 2922 008c 0C                  .uleb128 0xc\r
- 2923 008d 49                  .uleb128 0x49\r
- 2924 008e 13                  .uleb128 0x13\r
- 2925 008f 20                  .uleb128 0x20\r
- 2926 0090 0B                  .uleb128 0xb\r
- 2927 0091 01                  .uleb128 0x1\r
- 2928 0092 13                  .uleb128 0x13\r
- 2929 0093 00                  .byte   0\r
- 2930 0094 00                  .byte   0\r
- 2931 0095 0E                  .uleb128 0xe\r
- 2932 0096 05                  .uleb128 0x5\r
- 2933 0097 00                  .byte   0\r
- 2934 0098 03                  .uleb128 0x3\r
- 2935 0099 0E                  .uleb128 0xe\r
- 2936 009a 3A                  .uleb128 0x3a\r
- 2937 009b 0B                  .uleb128 0xb\r
- 2938 009c 3B                  .uleb128 0x3b\r
- 2939 009d 0B                  .uleb128 0xb\r
- 2940 009e 49                  .uleb128 0x49\r
- 2941 009f 13                  .uleb128 0x13\r
- 2942 00a0 00                  .byte   0\r
- 2943 00a1 00                  .byte   0\r
- 2944 00a2 0F                  .uleb128 0xf\r
- 2945 00a3 34                  .uleb128 0x34\r
- 2946 00a4 00                  .byte   0\r
- 2947 00a5 03                  .uleb128 0x3\r
- 2948 00a6 08                  .uleb128 0x8\r
- 2949 00a7 3A                  .uleb128 0x3a\r
- 2950 00a8 0B                  .uleb128 0xb\r
- 2951 00a9 3B                  .uleb128 0x3b\r
- 2952 00aa 0B                  .uleb128 0xb\r
- 2953 00ab 49                  .uleb128 0x49\r
- 2954 00ac 13                  .uleb128 0x13\r
- 2955 00ad 00                  .byte   0\r
- 2956 00ae 00                  .byte   0\r
- 2957 00af 10                  .uleb128 0x10\r
- 2958 00b0 2E                  .uleb128 0x2e\r
- 2959 00b1 01                  .byte   0x1\r
- 2960 00b2 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 83\r
-\r
-\r
- 2961 00b3 0E                  .uleb128 0xe\r
- 2962 00b4 3A                  .uleb128 0x3a\r
- 2963 00b5 0B                  .uleb128 0xb\r
- 2964 00b6 3B                  .uleb128 0x3b\r
- 2965 00b7 05                  .uleb128 0x5\r
- 2966 00b8 27                  .uleb128 0x27\r
- 2967 00b9 0C                  .uleb128 0xc\r
- 2968 00ba 49                  .uleb128 0x49\r
- 2969 00bb 13                  .uleb128 0x13\r
- 2970 00bc 20                  .uleb128 0x20\r
- 2971 00bd 0B                  .uleb128 0xb\r
- 2972 00be 01                  .uleb128 0x1\r
- 2973 00bf 13                  .uleb128 0x13\r
- 2974 00c0 00                  .byte   0\r
- 2975 00c1 00                  .byte   0\r
- 2976 00c2 11                  .uleb128 0x11\r
- 2977 00c3 05                  .uleb128 0x5\r
- 2978 00c4 00                  .byte   0\r
- 2979 00c5 03                  .uleb128 0x3\r
- 2980 00c6 0E                  .uleb128 0xe\r
- 2981 00c7 3A                  .uleb128 0x3a\r
- 2982 00c8 0B                  .uleb128 0xb\r
- 2983 00c9 3B                  .uleb128 0x3b\r
- 2984 00ca 05                  .uleb128 0x5\r
- 2985 00cb 49                  .uleb128 0x49\r
- 2986 00cc 13                  .uleb128 0x13\r
- 2987 00cd 00                  .byte   0\r
- 2988 00ce 00                  .byte   0\r
- 2989 00cf 12                  .uleb128 0x12\r
- 2990 00d0 34                  .uleb128 0x34\r
- 2991 00d1 00                  .byte   0\r
- 2992 00d2 03                  .uleb128 0x3\r
- 2993 00d3 0E                  .uleb128 0xe\r
- 2994 00d4 3A                  .uleb128 0x3a\r
- 2995 00d5 0B                  .uleb128 0xb\r
- 2996 00d6 3B                  .uleb128 0x3b\r
- 2997 00d7 05                  .uleb128 0x5\r
- 2998 00d8 49                  .uleb128 0x49\r
- 2999 00d9 13                  .uleb128 0x13\r
- 3000 00da 00                  .byte   0\r
- 3001 00db 00                  .byte   0\r
- 3002 00dc 13                  .uleb128 0x13\r
- 3003 00dd 34                  .uleb128 0x34\r
- 3004 00de 00                  .byte   0\r
- 3005 00df 03                  .uleb128 0x3\r
- 3006 00e0 08                  .uleb128 0x8\r
- 3007 00e1 3A                  .uleb128 0x3a\r
- 3008 00e2 0B                  .uleb128 0xb\r
- 3009 00e3 3B                  .uleb128 0x3b\r
- 3010 00e4 05                  .uleb128 0x5\r
- 3011 00e5 49                  .uleb128 0x49\r
- 3012 00e6 13                  .uleb128 0x13\r
- 3013 00e7 00                  .byte   0\r
- 3014 00e8 00                  .byte   0\r
- 3015 00e9 14                  .uleb128 0x14\r
- 3016 00ea 0B                  .uleb128 0xb\r
- 3017 00eb 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 84\r
-\r
-\r
- 3018 00ec 00                  .byte   0\r
- 3019 00ed 00                  .byte   0\r
- 3020 00ee 15                  .uleb128 0x15\r
- 3021 00ef 2E                  .uleb128 0x2e\r
- 3022 00f0 01                  .byte   0x1\r
- 3023 00f1 03                  .uleb128 0x3\r
- 3024 00f2 0E                  .uleb128 0xe\r
- 3025 00f3 3A                  .uleb128 0x3a\r
- 3026 00f4 0B                  .uleb128 0xb\r
- 3027 00f5 3B                  .uleb128 0x3b\r
- 3028 00f6 05                  .uleb128 0x5\r
- 3029 00f7 27                  .uleb128 0x27\r
- 3030 00f8 0C                  .uleb128 0xc\r
- 3031 00f9 11                  .uleb128 0x11\r
- 3032 00fa 01                  .uleb128 0x1\r
- 3033 00fb 12                  .uleb128 0x12\r
- 3034 00fc 01                  .uleb128 0x1\r
- 3035 00fd 40                  .uleb128 0x40\r
- 3036 00fe 0A                  .uleb128 0xa\r
- 3037 00ff 9742                .uleb128 0x2117\r
- 3038 0101 0C                  .uleb128 0xc\r
- 3039 0102 01                  .uleb128 0x1\r
- 3040 0103 13                  .uleb128 0x13\r
- 3041 0104 00                  .byte   0\r
- 3042 0105 00                  .byte   0\r
- 3043 0106 16                  .uleb128 0x16\r
- 3044 0107 05                  .uleb128 0x5\r
- 3045 0108 00                  .byte   0\r
- 3046 0109 03                  .uleb128 0x3\r
- 3047 010a 0E                  .uleb128 0xe\r
- 3048 010b 3A                  .uleb128 0x3a\r
- 3049 010c 0B                  .uleb128 0xb\r
- 3050 010d 3B                  .uleb128 0x3b\r
- 3051 010e 05                  .uleb128 0x5\r
- 3052 010f 49                  .uleb128 0x49\r
- 3053 0110 13                  .uleb128 0x13\r
- 3054 0111 02                  .uleb128 0x2\r
- 3055 0112 0A                  .uleb128 0xa\r
- 3056 0113 00                  .byte   0\r
- 3057 0114 00                  .byte   0\r
- 3058 0115 17                  .uleb128 0x17\r
- 3059 0116 2E                  .uleb128 0x2e\r
- 3060 0117 01                  .byte   0x1\r
- 3061 0118 31                  .uleb128 0x31\r
- 3062 0119 13                  .uleb128 0x13\r
- 3063 011a 11                  .uleb128 0x11\r
- 3064 011b 01                  .uleb128 0x1\r
- 3065 011c 12                  .uleb128 0x12\r
- 3066 011d 01                  .uleb128 0x1\r
- 3067 011e 40                  .uleb128 0x40\r
- 3068 011f 06                  .uleb128 0x6\r
- 3069 0120 9742                .uleb128 0x2117\r
- 3070 0122 0C                  .uleb128 0xc\r
- 3071 0123 01                  .uleb128 0x1\r
- 3072 0124 13                  .uleb128 0x13\r
- 3073 0125 00                  .byte   0\r
- 3074 0126 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 85\r
-\r
-\r
- 3075 0127 18                  .uleb128 0x18\r
- 3076 0128 05                  .uleb128 0x5\r
- 3077 0129 00                  .byte   0\r
- 3078 012a 31                  .uleb128 0x31\r
- 3079 012b 13                  .uleb128 0x13\r
- 3080 012c 02                  .uleb128 0x2\r
- 3081 012d 06                  .uleb128 0x6\r
- 3082 012e 00                  .byte   0\r
- 3083 012f 00                  .byte   0\r
- 3084 0130 19                  .uleb128 0x19\r
- 3085 0131 34                  .uleb128 0x34\r
- 3086 0132 00                  .byte   0\r
- 3087 0133 31                  .uleb128 0x31\r
- 3088 0134 13                  .uleb128 0x13\r
- 3089 0135 02                  .uleb128 0x2\r
- 3090 0136 06                  .uleb128 0x6\r
- 3091 0137 00                  .byte   0\r
- 3092 0138 00                  .byte   0\r
- 3093 0139 1A                  .uleb128 0x1a\r
- 3094 013a 05                  .uleb128 0x5\r
- 3095 013b 00                  .byte   0\r
- 3096 013c 31                  .uleb128 0x31\r
- 3097 013d 13                  .uleb128 0x13\r
- 3098 013e 1C                  .uleb128 0x1c\r
- 3099 013f 0B                  .uleb128 0xb\r
- 3100 0140 00                  .byte   0\r
- 3101 0141 00                  .byte   0\r
- 3102 0142 1B                  .uleb128 0x1b\r
- 3103 0143 0B                  .uleb128 0xb\r
- 3104 0144 01                  .byte   0x1\r
- 3105 0145 11                  .uleb128 0x11\r
- 3106 0146 01                  .uleb128 0x1\r
- 3107 0147 12                  .uleb128 0x12\r
- 3108 0148 01                  .uleb128 0x1\r
- 3109 0149 01                  .uleb128 0x1\r
- 3110 014a 13                  .uleb128 0x13\r
- 3111 014b 00                  .byte   0\r
- 3112 014c 00                  .byte   0\r
- 3113 014d 1C                  .uleb128 0x1c\r
- 3114 014e 898201              .uleb128 0x4109\r
- 3115 0151 01                  .byte   0x1\r
- 3116 0152 11                  .uleb128 0x11\r
- 3117 0153 01                  .uleb128 0x1\r
- 3118 0154 31                  .uleb128 0x31\r
- 3119 0155 13                  .uleb128 0x13\r
- 3120 0156 01                  .uleb128 0x1\r
- 3121 0157 13                  .uleb128 0x13\r
- 3122 0158 00                  .byte   0\r
- 3123 0159 00                  .byte   0\r
- 3124 015a 1D                  .uleb128 0x1d\r
- 3125 015b 8A8201              .uleb128 0x410a\r
- 3126 015e 00                  .byte   0\r
- 3127 015f 02                  .uleb128 0x2\r
- 3128 0160 0A                  .uleb128 0xa\r
- 3129 0161 9142                .uleb128 0x2111\r
- 3130 0163 0A                  .uleb128 0xa\r
- 3131 0164 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 86\r
-\r
-\r
- 3132 0165 00                  .byte   0\r
- 3133 0166 1E                  .uleb128 0x1e\r
- 3134 0167 898201              .uleb128 0x4109\r
- 3135 016a 01                  .byte   0x1\r
- 3136 016b 11                  .uleb128 0x11\r
- 3137 016c 01                  .uleb128 0x1\r
- 3138 016d 31                  .uleb128 0x31\r
- 3139 016e 13                  .uleb128 0x13\r
- 3140 016f 00                  .byte   0\r
- 3141 0170 00                  .byte   0\r
- 3142 0171 1F                  .uleb128 0x1f\r
- 3143 0172 26                  .uleb128 0x26\r
- 3144 0173 00                  .byte   0\r
- 3145 0174 49                  .uleb128 0x49\r
- 3146 0175 13                  .uleb128 0x13\r
- 3147 0176 00                  .byte   0\r
- 3148 0177 00                  .byte   0\r
- 3149 0178 20                  .uleb128 0x20\r
- 3150 0179 2E                  .uleb128 0x2e\r
- 3151 017a 01                  .byte   0x1\r
- 3152 017b 03                  .uleb128 0x3\r
- 3153 017c 0E                  .uleb128 0xe\r
- 3154 017d 3A                  .uleb128 0x3a\r
- 3155 017e 0B                  .uleb128 0xb\r
- 3156 017f 3B                  .uleb128 0x3b\r
- 3157 0180 05                  .uleb128 0x5\r
- 3158 0181 27                  .uleb128 0x27\r
- 3159 0182 0C                  .uleb128 0xc\r
- 3160 0183 11                  .uleb128 0x11\r
- 3161 0184 01                  .uleb128 0x1\r
- 3162 0185 12                  .uleb128 0x12\r
- 3163 0186 01                  .uleb128 0x1\r
- 3164 0187 40                  .uleb128 0x40\r
- 3165 0188 06                  .uleb128 0x6\r
- 3166 0189 9742                .uleb128 0x2117\r
- 3167 018b 0C                  .uleb128 0xc\r
- 3168 018c 01                  .uleb128 0x1\r
- 3169 018d 13                  .uleb128 0x13\r
- 3170 018e 00                  .byte   0\r
- 3171 018f 00                  .byte   0\r
- 3172 0190 21                  .uleb128 0x21\r
- 3173 0191 05                  .uleb128 0x5\r
- 3174 0192 00                  .byte   0\r
- 3175 0193 03                  .uleb128 0x3\r
- 3176 0194 0E                  .uleb128 0xe\r
- 3177 0195 3A                  .uleb128 0x3a\r
- 3178 0196 0B                  .uleb128 0xb\r
- 3179 0197 3B                  .uleb128 0x3b\r
- 3180 0198 05                  .uleb128 0x5\r
- 3181 0199 49                  .uleb128 0x49\r
- 3182 019a 13                  .uleb128 0x13\r
- 3183 019b 02                  .uleb128 0x2\r
- 3184 019c 06                  .uleb128 0x6\r
- 3185 019d 00                  .byte   0\r
- 3186 019e 00                  .byte   0\r
- 3187 019f 22                  .uleb128 0x22\r
- 3188 01a0 34                  .uleb128 0x34\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 87\r
-\r
-\r
- 3189 01a1 00                  .byte   0\r
- 3190 01a2 03                  .uleb128 0x3\r
- 3191 01a3 0E                  .uleb128 0xe\r
- 3192 01a4 3A                  .uleb128 0x3a\r
- 3193 01a5 0B                  .uleb128 0xb\r
- 3194 01a6 3B                  .uleb128 0x3b\r
- 3195 01a7 05                  .uleb128 0x5\r
- 3196 01a8 49                  .uleb128 0x49\r
- 3197 01a9 13                  .uleb128 0x13\r
- 3198 01aa 02                  .uleb128 0x2\r
- 3199 01ab 0A                  .uleb128 0xa\r
- 3200 01ac 00                  .byte   0\r
- 3201 01ad 00                  .byte   0\r
- 3202 01ae 23                  .uleb128 0x23\r
- 3203 01af 34                  .uleb128 0x34\r
- 3204 01b0 00                  .byte   0\r
- 3205 01b1 03                  .uleb128 0x3\r
- 3206 01b2 0E                  .uleb128 0xe\r
- 3207 01b3 3A                  .uleb128 0x3a\r
- 3208 01b4 0B                  .uleb128 0xb\r
- 3209 01b5 3B                  .uleb128 0x3b\r
- 3210 01b6 05                  .uleb128 0x5\r
- 3211 01b7 49                  .uleb128 0x49\r
- 3212 01b8 13                  .uleb128 0x13\r
- 3213 01b9 02                  .uleb128 0x2\r
- 3214 01ba 06                  .uleb128 0x6\r
- 3215 01bb 00                  .byte   0\r
- 3216 01bc 00                  .byte   0\r
- 3217 01bd 24                  .uleb128 0x24\r
- 3218 01be 1D                  .uleb128 0x1d\r
- 3219 01bf 01                  .byte   0x1\r
- 3220 01c0 31                  .uleb128 0x31\r
- 3221 01c1 13                  .uleb128 0x13\r
- 3222 01c2 11                  .uleb128 0x11\r
- 3223 01c3 01                  .uleb128 0x1\r
- 3224 01c4 12                  .uleb128 0x12\r
- 3225 01c5 01                  .uleb128 0x1\r
- 3226 01c6 58                  .uleb128 0x58\r
- 3227 01c7 0B                  .uleb128 0xb\r
- 3228 01c8 59                  .uleb128 0x59\r
- 3229 01c9 05                  .uleb128 0x5\r
- 3230 01ca 01                  .uleb128 0x1\r
- 3231 01cb 13                  .uleb128 0x13\r
- 3232 01cc 00                  .byte   0\r
- 3233 01cd 00                  .byte   0\r
- 3234 01ce 25                  .uleb128 0x25\r
- 3235 01cf 0B                  .uleb128 0xb\r
- 3236 01d0 01                  .byte   0x1\r
- 3237 01d1 11                  .uleb128 0x11\r
- 3238 01d2 01                  .uleb128 0x1\r
- 3239 01d3 12                  .uleb128 0x12\r
- 3240 01d4 01                  .uleb128 0x1\r
- 3241 01d5 00                  .byte   0\r
- 3242 01d6 00                  .byte   0\r
- 3243 01d7 26                  .uleb128 0x26\r
- 3244 01d8 0B                  .uleb128 0xb\r
- 3245 01d9 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 88\r
-\r
-\r
- 3246 01da 55                  .uleb128 0x55\r
- 3247 01db 06                  .uleb128 0x6\r
- 3248 01dc 01                  .uleb128 0x1\r
- 3249 01dd 13                  .uleb128 0x13\r
- 3250 01de 00                  .byte   0\r
- 3251 01df 00                  .byte   0\r
- 3252 01e0 27                  .uleb128 0x27\r
- 3253 01e1 898201              .uleb128 0x4109\r
- 3254 01e4 00                  .byte   0\r
- 3255 01e5 11                  .uleb128 0x11\r
- 3256 01e6 01                  .uleb128 0x1\r
- 3257 01e7 31                  .uleb128 0x31\r
- 3258 01e8 13                  .uleb128 0x13\r
- 3259 01e9 00                  .byte   0\r
- 3260 01ea 00                  .byte   0\r
- 3261 01eb 28                  .uleb128 0x28\r
- 3262 01ec 05                  .uleb128 0x5\r
- 3263 01ed 00                  .byte   0\r
- 3264 01ee 31                  .uleb128 0x31\r
- 3265 01ef 13                  .uleb128 0x13\r
- 3266 01f0 02                  .uleb128 0x2\r
- 3267 01f1 0A                  .uleb128 0xa\r
- 3268 01f2 00                  .byte   0\r
- 3269 01f3 00                  .byte   0\r
- 3270 01f4 29                  .uleb128 0x29\r
- 3271 01f5 34                  .uleb128 0x34\r
- 3272 01f6 00                  .byte   0\r
- 3273 01f7 31                  .uleb128 0x31\r
- 3274 01f8 13                  .uleb128 0x13\r
- 3275 01f9 02                  .uleb128 0x2\r
- 3276 01fa 0A                  .uleb128 0xa\r
- 3277 01fb 00                  .byte   0\r
- 3278 01fc 00                  .byte   0\r
- 3279 01fd 2A                  .uleb128 0x2a\r
- 3280 01fe 21                  .uleb128 0x21\r
- 3281 01ff 00                  .byte   0\r
- 3282 0200 49                  .uleb128 0x49\r
- 3283 0201 13                  .uleb128 0x13\r
- 3284 0202 2F                  .uleb128 0x2f\r
- 3285 0203 05                  .uleb128 0x5\r
- 3286 0204 00                  .byte   0\r
- 3287 0205 00                  .byte   0\r
- 3288 0206 2B                  .uleb128 0x2b\r
- 3289 0207 2E                  .uleb128 0x2e\r
- 3290 0208 00                  .byte   0\r
- 3291 0209 03                  .uleb128 0x3\r
- 3292 020a 0E                  .uleb128 0xe\r
- 3293 020b 3A                  .uleb128 0x3a\r
- 3294 020c 0B                  .uleb128 0xb\r
- 3295 020d 3B                  .uleb128 0x3b\r
- 3296 020e 05                  .uleb128 0x5\r
- 3297 020f 27                  .uleb128 0x27\r
- 3298 0210 0C                  .uleb128 0xc\r
- 3299 0211 20                  .uleb128 0x20\r
- 3300 0212 0B                  .uleb128 0xb\r
- 3301 0213 00                  .byte   0\r
- 3302 0214 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 89\r
-\r
-\r
- 3303 0215 2C                  .uleb128 0x2c\r
- 3304 0216 2E                  .uleb128 0x2e\r
- 3305 0217 01                  .byte   0x1\r
- 3306 0218 3F                  .uleb128 0x3f\r
- 3307 0219 0C                  .uleb128 0xc\r
- 3308 021a 03                  .uleb128 0x3\r
- 3309 021b 0E                  .uleb128 0xe\r
- 3310 021c 3A                  .uleb128 0x3a\r
- 3311 021d 0B                  .uleb128 0xb\r
- 3312 021e 3B                  .uleb128 0x3b\r
- 3313 021f 05                  .uleb128 0x5\r
- 3314 0220 27                  .uleb128 0x27\r
- 3315 0221 0C                  .uleb128 0xc\r
- 3316 0222 11                  .uleb128 0x11\r
- 3317 0223 01                  .uleb128 0x1\r
- 3318 0224 12                  .uleb128 0x12\r
- 3319 0225 01                  .uleb128 0x1\r
- 3320 0226 40                  .uleb128 0x40\r
- 3321 0227 06                  .uleb128 0x6\r
- 3322 0228 9742                .uleb128 0x2117\r
- 3323 022a 0C                  .uleb128 0xc\r
- 3324 022b 01                  .uleb128 0x1\r
- 3325 022c 13                  .uleb128 0x13\r
- 3326 022d 00                  .byte   0\r
- 3327 022e 00                  .byte   0\r
- 3328 022f 2D                  .uleb128 0x2d\r
- 3329 0230 898201              .uleb128 0x4109\r
- 3330 0233 00                  .byte   0\r
- 3331 0234 11                  .uleb128 0x11\r
- 3332 0235 01                  .uleb128 0x1\r
- 3333 0236 9542                .uleb128 0x2115\r
- 3334 0238 0C                  .uleb128 0xc\r
- 3335 0239 31                  .uleb128 0x31\r
- 3336 023a 13                  .uleb128 0x13\r
- 3337 023b 00                  .byte   0\r
- 3338 023c 00                  .byte   0\r
- 3339 023d 2E                  .uleb128 0x2e\r
- 3340 023e 34                  .uleb128 0x34\r
- 3341 023f 00                  .byte   0\r
- 3342 0240 03                  .uleb128 0x3\r
- 3343 0241 08                  .uleb128 0x8\r
- 3344 0242 3A                  .uleb128 0x3a\r
- 3345 0243 0B                  .uleb128 0xb\r
- 3346 0244 3B                  .uleb128 0x3b\r
- 3347 0245 05                  .uleb128 0x5\r
- 3348 0246 49                  .uleb128 0x49\r
- 3349 0247 13                  .uleb128 0x13\r
- 3350 0248 02                  .uleb128 0x2\r
- 3351 0249 06                  .uleb128 0x6\r
- 3352 024a 00                  .byte   0\r
- 3353 024b 00                  .byte   0\r
- 3354 024c 2F                  .uleb128 0x2f\r
- 3355 024d 34                  .uleb128 0x34\r
- 3356 024e 00                  .byte   0\r
- 3357 024f 03                  .uleb128 0x3\r
- 3358 0250 0E                  .uleb128 0xe\r
- 3359 0251 3A                  .uleb128 0x3a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 90\r
-\r
-\r
- 3360 0252 0B                  .uleb128 0xb\r
- 3361 0253 3B                  .uleb128 0x3b\r
- 3362 0254 0B                  .uleb128 0xb\r
- 3363 0255 49                  .uleb128 0x49\r
- 3364 0256 13                  .uleb128 0x13\r
- 3365 0257 3F                  .uleb128 0x3f\r
- 3366 0258 0C                  .uleb128 0xc\r
- 3367 0259 02                  .uleb128 0x2\r
- 3368 025a 0A                  .uleb128 0xa\r
- 3369 025b 00                  .byte   0\r
- 3370 025c 00                  .byte   0\r
- 3371 025d 30                  .uleb128 0x30\r
- 3372 025e 34                  .uleb128 0x34\r
- 3373 025f 00                  .byte   0\r
- 3374 0260 03                  .uleb128 0x3\r
- 3375 0261 0E                  .uleb128 0xe\r
- 3376 0262 3A                  .uleb128 0x3a\r
- 3377 0263 0B                  .uleb128 0xb\r
- 3378 0264 3B                  .uleb128 0x3b\r
- 3379 0265 05                  .uleb128 0x5\r
- 3380 0266 49                  .uleb128 0x49\r
- 3381 0267 13                  .uleb128 0x13\r
- 3382 0268 3F                  .uleb128 0x3f\r
- 3383 0269 0C                  .uleb128 0xc\r
- 3384 026a 3C                  .uleb128 0x3c\r
- 3385 026b 0C                  .uleb128 0xc\r
- 3386 026c 00                  .byte   0\r
- 3387 026d 00                  .byte   0\r
- 3388 026e 31                  .uleb128 0x31\r
- 3389 026f 2E                  .uleb128 0x2e\r
- 3390 0270 01                  .byte   0x1\r
- 3391 0271 3F                  .uleb128 0x3f\r
- 3392 0272 0C                  .uleb128 0xc\r
- 3393 0273 03                  .uleb128 0x3\r
- 3394 0274 0E                  .uleb128 0xe\r
- 3395 0275 27                  .uleb128 0x27\r
- 3396 0276 0C                  .uleb128 0xc\r
- 3397 0277 49                  .uleb128 0x49\r
- 3398 0278 13                  .uleb128 0x13\r
- 3399 0279 34                  .uleb128 0x34\r
- 3400 027a 0C                  .uleb128 0xc\r
- 3401 027b 3C                  .uleb128 0x3c\r
- 3402 027c 0C                  .uleb128 0xc\r
- 3403 027d 01                  .uleb128 0x1\r
- 3404 027e 13                  .uleb128 0x13\r
- 3405 027f 00                  .byte   0\r
- 3406 0280 00                  .byte   0\r
- 3407 0281 32                  .uleb128 0x32\r
- 3408 0282 05                  .uleb128 0x5\r
- 3409 0283 00                  .byte   0\r
- 3410 0284 49                  .uleb128 0x49\r
- 3411 0285 13                  .uleb128 0x13\r
- 3412 0286 00                  .byte   0\r
- 3413 0287 00                  .byte   0\r
- 3414 0288 33                  .uleb128 0x33\r
- 3415 0289 2E                  .uleb128 0x2e\r
- 3416 028a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 91\r
-\r
-\r
- 3417 028b 3F                  .uleb128 0x3f\r
- 3418 028c 0C                  .uleb128 0xc\r
- 3419 028d 03                  .uleb128 0x3\r
- 3420 028e 0E                  .uleb128 0xe\r
- 3421 028f 3A                  .uleb128 0x3a\r
- 3422 0290 0B                  .uleb128 0xb\r
- 3423 0291 3B                  .uleb128 0x3b\r
- 3424 0292 0B                  .uleb128 0xb\r
- 3425 0293 27                  .uleb128 0x27\r
- 3426 0294 0C                  .uleb128 0xc\r
- 3427 0295 49                  .uleb128 0x49\r
- 3428 0296 13                  .uleb128 0x13\r
- 3429 0297 3C                  .uleb128 0x3c\r
- 3430 0298 0C                  .uleb128 0xc\r
- 3431 0299 01                  .uleb128 0x1\r
- 3432 029a 13                  .uleb128 0x13\r
- 3433 029b 00                  .byte   0\r
- 3434 029c 00                  .byte   0\r
- 3435 029d 34                  .uleb128 0x34\r
- 3436 029e 2E                  .uleb128 0x2e\r
- 3437 029f 00                  .byte   0\r
- 3438 02a0 3F                  .uleb128 0x3f\r
- 3439 02a1 0C                  .uleb128 0xc\r
- 3440 02a2 03                  .uleb128 0x3\r
- 3441 02a3 0E                  .uleb128 0xe\r
- 3442 02a4 3A                  .uleb128 0x3a\r
- 3443 02a5 0B                  .uleb128 0xb\r
- 3444 02a6 3B                  .uleb128 0x3b\r
- 3445 02a7 0B                  .uleb128 0xb\r
- 3446 02a8 27                  .uleb128 0x27\r
- 3447 02a9 0C                  .uleb128 0xc\r
- 3448 02aa 3C                  .uleb128 0x3c\r
- 3449 02ab 0C                  .uleb128 0xc\r
- 3450 02ac 00                  .byte   0\r
- 3451 02ad 00                  .byte   0\r
- 3452 02ae 35                  .uleb128 0x35\r
- 3453 02af 2E                  .uleb128 0x2e\r
- 3454 02b0 00                  .byte   0\r
- 3455 02b1 3F                  .uleb128 0x3f\r
- 3456 02b2 0C                  .uleb128 0xc\r
- 3457 02b3 03                  .uleb128 0x3\r
- 3458 02b4 0E                  .uleb128 0xe\r
- 3459 02b5 3A                  .uleb128 0x3a\r
- 3460 02b6 0B                  .uleb128 0xb\r
- 3461 02b7 3B                  .uleb128 0x3b\r
- 3462 02b8 0B                  .uleb128 0xb\r
- 3463 02b9 27                  .uleb128 0x27\r
- 3464 02ba 0C                  .uleb128 0xc\r
- 3465 02bb 49                  .uleb128 0x49\r
- 3466 02bc 13                  .uleb128 0x13\r
- 3467 02bd 3C                  .uleb128 0x3c\r
- 3468 02be 0C                  .uleb128 0xc\r
- 3469 02bf 00                  .byte   0\r
- 3470 02c0 00                  .byte   0\r
- 3471 02c1 36                  .uleb128 0x36\r
- 3472 02c2 2E                  .uleb128 0x2e\r
- 3473 02c3 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 92\r
-\r
-\r
- 3474 02c4 3F                  .uleb128 0x3f\r
- 3475 02c5 0C                  .uleb128 0xc\r
- 3476 02c6 03                  .uleb128 0x3\r
- 3477 02c7 0E                  .uleb128 0xe\r
- 3478 02c8 3A                  .uleb128 0x3a\r
- 3479 02c9 0B                  .uleb128 0xb\r
- 3480 02ca 3B                  .uleb128 0x3b\r
- 3481 02cb 0B                  .uleb128 0xb\r
- 3482 02cc 27                  .uleb128 0x27\r
- 3483 02cd 0C                  .uleb128 0xc\r
- 3484 02ce 3C                  .uleb128 0x3c\r
- 3485 02cf 0C                  .uleb128 0xc\r
- 3486 02d0 01                  .uleb128 0x1\r
- 3487 02d1 13                  .uleb128 0x13\r
- 3488 02d2 00                  .byte   0\r
- 3489 02d3 00                  .byte   0\r
- 3490 02d4 37                  .uleb128 0x37\r
- 3491 02d5 2E                  .uleb128 0x2e\r
- 3492 02d6 01                  .byte   0x1\r
- 3493 02d7 3F                  .uleb128 0x3f\r
- 3494 02d8 0C                  .uleb128 0xc\r
- 3495 02d9 03                  .uleb128 0x3\r
- 3496 02da 0E                  .uleb128 0xe\r
- 3497 02db 3A                  .uleb128 0x3a\r
- 3498 02dc 0B                  .uleb128 0xb\r
- 3499 02dd 3B                  .uleb128 0x3b\r
- 3500 02de 0B                  .uleb128 0xb\r
- 3501 02df 27                  .uleb128 0x27\r
- 3502 02e0 0C                  .uleb128 0xc\r
- 3503 02e1 49                  .uleb128 0x49\r
- 3504 02e2 13                  .uleb128 0x13\r
- 3505 02e3 3C                  .uleb128 0x3c\r
- 3506 02e4 0C                  .uleb128 0xc\r
- 3507 02e5 00                  .byte   0\r
- 3508 02e6 00                  .byte   0\r
- 3509 02e7 00                  .byte   0\r
- 3510                          .section        .debug_loc,"",%progbits\r
- 3511                  .Ldebug_loc0:\r
- 3512                  .LLST0:\r
- 3513 0000 00000000            .4byte  .LFB69\r
- 3514 0004 04000000            .4byte  .LCFI0\r
- 3515 0008 0200                .2byte  0x2\r
- 3516 000a 7D                  .byte   0x7d\r
- 3517 000b 00                  .sleb128 0\r
- 3518 000c 04000000            .4byte  .LCFI0\r
- 3519 0010 8C000000            .4byte  .LFE69\r
- 3520 0014 0200                .2byte  0x2\r
- 3521 0016 7D                  .byte   0x7d\r
- 3522 0017 08                  .sleb128 8\r
- 3523 0018 00000000            .4byte  0\r
- 3524 001c 00000000            .4byte  0\r
- 3525                  .LLST1:\r
- 3526 0020 00000000            .4byte  .LVL1\r
- 3527 0024 18000000            .4byte  .LVL2\r
- 3528 0028 0100                .2byte  0x1\r
- 3529 002a 50                  .byte   0x50\r
- 3530 002b 18000000            .4byte  .LVL2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 93\r
-\r
-\r
- 3531 002f 1A000000            .4byte  .LVL3\r
- 3532 0033 0400                .2byte  0x4\r
- 3533 0035 F3                  .byte   0xf3\r
- 3534 0036 01                  .uleb128 0x1\r
- 3535 0037 50                  .byte   0x50\r
- 3536 0038 9F                  .byte   0x9f\r
- 3537 0039 1A000000            .4byte  .LVL3\r
- 3538 003d 20000000            .4byte  .LVL5\r
- 3539 0041 0100                .2byte  0x1\r
- 3540 0043 50                  .byte   0x50\r
- 3541 0044 20000000            .4byte  .LVL5\r
- 3542 0048 22000000            .4byte  .LVL6\r
- 3543 004c 0400                .2byte  0x4\r
- 3544 004e F3                  .byte   0xf3\r
- 3545 004f 01                  .uleb128 0x1\r
- 3546 0050 50                  .byte   0x50\r
- 3547 0051 9F                  .byte   0x9f\r
- 3548 0052 22000000            .4byte  .LVL6\r
- 3549 0056 24000000            .4byte  .LVL7\r
- 3550 005a 0100                .2byte  0x1\r
- 3551 005c 50                  .byte   0x50\r
- 3552 005d 24000000            .4byte  .LVL7\r
- 3553 0061 26000000            .4byte  .LVL8\r
- 3554 0065 0400                .2byte  0x4\r
- 3555 0067 F3                  .byte   0xf3\r
- 3556 0068 01                  .uleb128 0x1\r
- 3557 0069 50                  .byte   0x50\r
- 3558 006a 9F                  .byte   0x9f\r
- 3559 006b 26000000            .4byte  .LVL8\r
- 3560 006f 28000000            .4byte  .LVL9\r
- 3561 0073 0100                .2byte  0x1\r
- 3562 0075 50                  .byte   0x50\r
- 3563 0076 28000000            .4byte  .LVL9\r
- 3564 007a 2A000000            .4byte  .LVL10\r
- 3565 007e 0400                .2byte  0x4\r
- 3566 0080 F3                  .byte   0xf3\r
- 3567 0081 01                  .uleb128 0x1\r
- 3568 0082 50                  .byte   0x50\r
- 3569 0083 9F                  .byte   0x9f\r
- 3570 0084 2A000000            .4byte  .LVL10\r
- 3571 0088 2C000000            .4byte  .LVL11\r
- 3572 008c 0100                .2byte  0x1\r
- 3573 008e 50                  .byte   0x50\r
- 3574 008f 2C000000            .4byte  .LVL11\r
- 3575 0093 50000000            .4byte  .LVL17\r
- 3576 0097 0400                .2byte  0x4\r
- 3577 0099 F3                  .byte   0xf3\r
- 3578 009a 01                  .uleb128 0x1\r
- 3579 009b 50                  .byte   0x50\r
- 3580 009c 9F                  .byte   0x9f\r
- 3581 009d 50000000            .4byte  .LVL17\r
- 3582 00a1 58000000            .4byte  .LVL19\r
- 3583 00a5 0100                .2byte  0x1\r
- 3584 00a7 50                  .byte   0x50\r
- 3585 00a8 58000000            .4byte  .LVL19\r
- 3586 00ac 8C000000            .4byte  .LFE69\r
- 3587 00b0 0400                .2byte  0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 94\r
-\r
-\r
- 3588 00b2 F3                  .byte   0xf3\r
- 3589 00b3 01                  .uleb128 0x1\r
- 3590 00b4 50                  .byte   0x50\r
- 3591 00b5 9F                  .byte   0x9f\r
- 3592 00b6 00000000            .4byte  0\r
- 3593 00ba 00000000            .4byte  0\r
- 3594                  .LLST2:\r
- 3595 00be 1E000000            .4byte  .LVL4\r
- 3596 00c2 22000000            .4byte  .LVL6\r
- 3597 00c6 0600                .2byte  0x6\r
- 3598 00c8 0C                  .byte   0xc\r
- 3599 00c9 D6FF0100            .4byte  0x1ffd6\r
- 3600 00cd 9F                  .byte   0x9f\r
- 3601 00ce 22000000            .4byte  .LVL6\r
- 3602 00d2 26000000            .4byte  .LVL8\r
- 3603 00d6 0600                .2byte  0x6\r
- 3604 00d8 0C                  .byte   0xc\r
- 3605 00d9 D4FF0100            .4byte  0x1ffd4\r
- 3606 00dd 9F                  .byte   0x9f\r
- 3607 00de 2C000000            .4byte  .LVL11\r
- 3608 00e2 30000000            .4byte  .LVL13\r
- 3609 00e6 0100                .2byte  0x1\r
- 3610 00e8 50                  .byte   0x50\r
- 3611 00e9 56000000            .4byte  .LVL18\r
- 3612 00ed 5E000000            .4byte  .LVL22\r
- 3613 00f1 0100                .2byte  0x1\r
- 3614 00f3 53                  .byte   0x53\r
- 3615 00f4 00000000            .4byte  0\r
- 3616 00f8 00000000            .4byte  0\r
- 3617                  .LLST3:\r
- 3618 00fc 00000000            .4byte  .LVL1\r
- 3619 0100 34000000            .4byte  .LVL14\r
- 3620 0104 0200                .2byte  0x2\r
- 3621 0106 32                  .byte   0x32\r
- 3622 0107 9F                  .byte   0x9f\r
- 3623 0108 50000000            .4byte  .LVL17\r
- 3624 010c 56000000            .4byte  .LVL18\r
- 3625 0110 0200                .2byte  0x2\r
- 3626 0112 32                  .byte   0x32\r
- 3627 0113 9F                  .byte   0x9f\r
- 3628 0114 56000000            .4byte  .LVL18\r
- 3629 0118 6C000000            .4byte  .LVL25\r
- 3630 011c 0200                .2byte  0x2\r
- 3631 011e 34                  .byte   0x34\r
- 3632 011f 9F                  .byte   0x9f\r
- 3633 0120 00000000            .4byte  0\r
- 3634 0124 00000000            .4byte  0\r
- 3635                  .LLST4:\r
- 3636 0128 2E000000            .4byte  .LVL12\r
- 3637 012c 34000000            .4byte  .LVL14\r
- 3638 0130 0100                .2byte  0x1\r
- 3639 0132 51                  .byte   0x51\r
- 3640 0133 34000000            .4byte  .LVL14\r
- 3641 0137 50000000            .4byte  .LVL17\r
- 3642 013b 0100                .2byte  0x1\r
- 3643 013d 50                  .byte   0x50\r
- 3644 013e 58000000            .4byte  .LVL19\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 95\r
-\r
-\r
- 3645 0142 5A000000            .4byte  .LVL20\r
- 3646 0146 0100                .2byte  0x1\r
- 3647 0148 50                  .byte   0x50\r
- 3648 0149 5A000000            .4byte  .LVL20\r
- 3649 014d 5C000000            .4byte  .LVL21\r
- 3650 0151 0B00                .2byte  0xb\r
- 3651 0153 74                  .byte   0x74\r
- 3652 0154 00                  .sleb128 0\r
- 3653 0155 08                  .byte   0x8\r
- 3654 0156 FF                  .byte   0xff\r
- 3655 0157 1A                  .byte   0x1a\r
- 3656 0158 38                  .byte   0x38\r
- 3657 0159 24                  .byte   0x24\r
- 3658 015a 70                  .byte   0x70\r
- 3659 015b 00                  .sleb128 0\r
- 3660 015c 21                  .byte   0x21\r
- 3661 015d 9F                  .byte   0x9f\r
- 3662 015e 5C000000            .4byte  .LVL21\r
- 3663 0162 62000000            .4byte  .LVL23\r
- 3664 0166 1300                .2byte  0x13\r
- 3665 0168 74                  .byte   0x74\r
- 3666 0169 00                  .sleb128 0\r
- 3667 016a 08                  .byte   0x8\r
- 3668 016b FF                  .byte   0xff\r
- 3669 016c 1A                  .byte   0x1a\r
- 3670 016d 38                  .byte   0x38\r
- 3671 016e 24                  .byte   0x24\r
- 3672 016f 71                  .byte   0x71\r
- 3673 0170 00                  .sleb128 0\r
- 3674 0171 08                  .byte   0x8\r
- 3675 0172 FF                  .byte   0xff\r
- 3676 0173 1A                  .byte   0x1a\r
- 3677 0174 40                  .byte   0x40\r
- 3678 0175 24                  .byte   0x24\r
- 3679 0176 21                  .byte   0x21\r
- 3680 0177 70                  .byte   0x70\r
- 3681 0178 00                  .sleb128 0\r
- 3682 0179 21                  .byte   0x21\r
- 3683 017a 9F                  .byte   0x9f\r
- 3684 017b 6A000000            .4byte  .LVL24\r
- 3685 017f 8C000000            .4byte  .LFE69\r
- 3686 0183 0100                .2byte  0x1\r
- 3687 0185 50                  .byte   0x50\r
- 3688 0186 00000000            .4byte  0\r
- 3689 018a 00000000            .4byte  0\r
- 3690                  .LLST5:\r
- 3691 018e 00000000            .4byte  .LFB70\r
- 3692 0192 02000000            .4byte  .LCFI1\r
- 3693 0196 0200                .2byte  0x2\r
- 3694 0198 7D                  .byte   0x7d\r
- 3695 0199 00                  .sleb128 0\r
- 3696 019a 02000000            .4byte  .LCFI1\r
- 3697 019e 84000000            .4byte  .LFE70\r
- 3698 01a2 0200                .2byte  0x2\r
- 3699 01a4 7D                  .byte   0x7d\r
- 3700 01a5 10                  .sleb128 16\r
- 3701 01a6 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 96\r
-\r
-\r
- 3702 01aa 00000000            .4byte  0\r
- 3703                  .LLST6:\r
- 3704 01ae 22000000            .4byte  .LVL31\r
- 3705 01b2 24000000            .4byte  .LVL32\r
- 3706 01b6 0100                .2byte  0x1\r
- 3707 01b8 51                  .byte   0x51\r
- 3708 01b9 4A000000            .4byte  .LVL39\r
- 3709 01bd 62000000            .4byte  .LVL43\r
- 3710 01c1 0100                .2byte  0x1\r
- 3711 01c3 53                  .byte   0x53\r
- 3712 01c4 62000000            .4byte  .LVL43\r
- 3713 01c8 68000000            .4byte  .LVL45\r
- 3714 01cc 0300                .2byte  0x3\r
- 3715 01ce 73                  .byte   0x73\r
- 3716 01cf 7F                  .sleb128 -1\r
- 3717 01d0 9F                  .byte   0x9f\r
- 3718 01d1 68000000            .4byte  .LVL45\r
- 3719 01d5 84000000            .4byte  .LFE70\r
- 3720 01d9 0100                .2byte  0x1\r
- 3721 01db 53                  .byte   0x53\r
- 3722 01dc 00000000            .4byte  0\r
- 3723 01e0 00000000            .4byte  0\r
- 3724                  .LLST7:\r
- 3725 01e4 16000000            .4byte  .LVL29\r
- 3726 01e8 50000000            .4byte  .LVL40\r
- 3727 01ec 0100                .2byte  0x1\r
- 3728 01ee 56                  .byte   0x56\r
- 3729 01ef 52000000            .4byte  .LVL41\r
- 3730 01f3 56000000            .4byte  .LVL42\r
- 3731 01f7 0100                .2byte  0x1\r
- 3732 01f9 56                  .byte   0x56\r
- 3733 01fa 00000000            .4byte  0\r
- 3734 01fe 00000000            .4byte  0\r
- 3735                  .LLST8:\r
- 3736 0202 16000000            .4byte  .LVL29\r
- 3737 0206 24000000            .4byte  .LVL32\r
- 3738 020a 0200                .2byte  0x2\r
- 3739 020c 30                  .byte   0x30\r
- 3740 020d 9F                  .byte   0x9f\r
- 3741 020e 24000000            .4byte  .LVL32\r
- 3742 0212 84000000            .4byte  .LFE70\r
- 3743 0216 0100                .2byte  0x1\r
- 3744 0218 55                  .byte   0x55\r
- 3745 0219 00000000            .4byte  0\r
- 3746 021d 00000000            .4byte  0\r
- 3747                  .LLST9:\r
- 3748 0221 16000000            .4byte  .LVL29\r
- 3749 0225 24000000            .4byte  .LVL32\r
- 3750 0229 0200                .2byte  0x2\r
- 3751 022b 30                  .byte   0x30\r
- 3752 022c 9F                  .byte   0x9f\r
- 3753 022d 24000000            .4byte  .LVL32\r
- 3754 0231 32000000            .4byte  .LVL34\r
- 3755 0235 0100                .2byte  0x1\r
- 3756 0237 54                  .byte   0x54\r
- 3757 0238 3A000000            .4byte  .LVL36\r
- 3758 023c 66000000            .4byte  .LVL44\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 97\r
-\r
-\r
- 3759 0240 0100                .2byte  0x1\r
- 3760 0242 54                  .byte   0x54\r
- 3761 0243 66000000            .4byte  .LVL44\r
- 3762 0247 68000000            .4byte  .LVL45\r
- 3763 024b 0100                .2byte  0x1\r
- 3764 024d 52                  .byte   0x52\r
- 3765 024e 68000000            .4byte  .LVL45\r
- 3766 0252 6C000000            .4byte  .LVL46\r
- 3767 0256 0400                .2byte  0x4\r
- 3768 0258 74                  .byte   0x74\r
- 3769 0259 00                  .sleb128 0\r
- 3770 025a 1F                  .byte   0x1f\r
- 3771 025b 9F                  .byte   0x9f\r
- 3772 025c 6C000000            .4byte  .LVL46\r
- 3773 0260 70000000            .4byte  .LVL47\r
- 3774 0264 0500                .2byte  0x5\r
- 3775 0266 74                  .byte   0x74\r
- 3776 0267 00                  .sleb128 0\r
- 3777 0268 1F                  .byte   0x1f\r
- 3778 0269 1F                  .byte   0x1f\r
- 3779 026a 9F                  .byte   0x9f\r
- 3780 026b 00000000            .4byte  0\r
- 3781 026f 00000000            .4byte  0\r
- 3782                  .LLST10:\r
- 3783 0273 2C000000            .4byte  .LVL33\r
- 3784 0277 3C000000            .4byte  .LVL37\r
- 3785 027b 0200                .2byte  0x2\r
- 3786 027d 71                  .byte   0x71\r
- 3787 027e 7F                  .sleb128 -1\r
- 3788 027f 00000000            .4byte  0\r
- 3789 0283 00000000            .4byte  0\r
- 3790                  .LLST11:\r
- 3791 0287 00000000            .4byte  .LFB64\r
- 3792 028b 04000000            .4byte  .LCFI2\r
- 3793 028f 0200                .2byte  0x2\r
- 3794 0291 7D                  .byte   0x7d\r
- 3795 0292 00                  .sleb128 0\r
- 3796 0293 04000000            .4byte  .LCFI2\r
- 3797 0297 08000000            .4byte  .LCFI3\r
- 3798 029b 0200                .2byte  0x2\r
- 3799 029d 7D                  .byte   0x7d\r
- 3800 029e 24                  .sleb128 36\r
- 3801 029f 08000000            .4byte  .LCFI3\r
- 3802 02a3 84030000            .4byte  .LFE64\r
- 3803 02a7 0300                .2byte  0x3\r
- 3804 02a9 7D                  .byte   0x7d\r
- 3805 02aa A807                .sleb128 936\r
- 3806 02ac 00000000            .4byte  0\r
- 3807 02b0 00000000            .4byte  0\r
- 3808                  .LLST12:\r
- 3809 02b4 00000000            .4byte  .LVL48\r
- 3810 02b8 0D000000            .4byte  .LVL49-1\r
- 3811 02bc 0100                .2byte  0x1\r
- 3812 02be 50                  .byte   0x50\r
- 3813 02bf 0D000000            .4byte  .LVL49-1\r
- 3814 02c3 84030000            .4byte  .LFE64\r
- 3815 02c7 0400                .2byte  0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 98\r
-\r
-\r
- 3816 02c9 F3                  .byte   0xf3\r
- 3817 02ca 01                  .uleb128 0x1\r
- 3818 02cb 50                  .byte   0x50\r
- 3819 02cc 9F                  .byte   0x9f\r
- 3820 02cd 00000000            .4byte  0\r
- 3821 02d1 00000000            .4byte  0\r
- 3822                  .LLST13:\r
- 3823 02d5 B0000000            .4byte  .LVL68\r
- 3824 02d9 DC000000            .4byte  .LVL71\r
- 3825 02dd 0200                .2byte  0x2\r
- 3826 02df 30                  .byte   0x30\r
- 3827 02e0 9F                  .byte   0x9f\r
- 3828 02e1 DC000000            .4byte  .LVL71\r
- 3829 02e5 DE000000            .4byte  .LVL72\r
- 3830 02e9 0200                .2byte  0x2\r
- 3831 02eb 34                  .byte   0x34\r
- 3832 02ec 9F                  .byte   0x9f\r
- 3833 02ed DE000000            .4byte  .LVL72\r
- 3834 02f1 34010000            .4byte  .LVL78\r
- 3835 02f5 0100                .2byte  0x1\r
- 3836 02f7 54                  .byte   0x54\r
- 3837 02f8 46010000            .4byte  .LVL80\r
- 3838 02fc A8010000            .4byte  .LVL85\r
- 3839 0300 0200                .2byte  0x2\r
- 3840 0302 30                  .byte   0x30\r
- 3841 0303 9F                  .byte   0x9f\r
- 3842 0304 A8010000            .4byte  .LVL85\r
- 3843 0308 AA010000            .4byte  .LVL86\r
- 3844 030c 0200                .2byte  0x2\r
- 3845 030e 31                  .byte   0x31\r
- 3846 030f 9F                  .byte   0x9f\r
- 3847 0310 AA010000            .4byte  .LVL86\r
- 3848 0314 90020000            .4byte  .LVL110\r
- 3849 0318 0200                .2byte  0x2\r
- 3850 031a 30                  .byte   0x30\r
- 3851 031b 9F                  .byte   0x9f\r
- 3852 031c 90020000            .4byte  .LVL110\r
- 3853 0320 9A020000            .4byte  .LVL113\r
- 3854 0324 0200                .2byte  0x2\r
- 3855 0326 38                  .byte   0x38\r
- 3856 0327 9F                  .byte   0x9f\r
- 3857 0328 9A020000            .4byte  .LVL113\r
- 3858 032c 20030000            .4byte  .LVL131\r
- 3859 0330 0200                .2byte  0x2\r
- 3860 0332 30                  .byte   0x30\r
- 3861 0333 9F                  .byte   0x9f\r
- 3862 0334 20030000            .4byte  .LVL131\r
- 3863 0338 26030000            .4byte  .LVL133\r
- 3864 033c 0200                .2byte  0x2\r
- 3865 033e 31                  .byte   0x31\r
- 3866 033f 9F                  .byte   0x9f\r
- 3867 0340 26030000            .4byte  .LVL133\r
- 3868 0344 48030000            .4byte  .LVL144\r
- 3869 0348 0200                .2byte  0x2\r
- 3870 034a 30                  .byte   0x30\r
- 3871 034b 9F                  .byte   0x9f\r
- 3872 034c 56030000            .4byte  .LVL146\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 99\r
-\r
-\r
- 3873 0350 66030000            .4byte  .LVL148\r
- 3874 0354 0200                .2byte  0x2\r
- 3875 0356 30                  .byte   0x30\r
- 3876 0357 9F                  .byte   0x9f\r
- 3877 0358 00000000            .4byte  0\r
- 3878 035c 00000000            .4byte  0\r
- 3879                  .LLST14:\r
- 3880 0360 B0000000            .4byte  .LVL68\r
- 3881 0364 DC000000            .4byte  .LVL71\r
- 3882 0368 0200                .2byte  0x2\r
- 3883 036a 34                  .byte   0x34\r
- 3884 036b 9F                  .byte   0x9f\r
- 3885 036c DC000000            .4byte  .LVL71\r
- 3886 0370 DE000000            .4byte  .LVL72\r
- 3887 0374 0200                .2byte  0x2\r
- 3888 0376 30                  .byte   0x30\r
- 3889 0377 9F                  .byte   0x9f\r
- 3890 0378 DE000000            .4byte  .LVL72\r
- 3891 037c 34010000            .4byte  .LVL78\r
- 3892 0380 0100                .2byte  0x1\r
- 3893 0382 55                  .byte   0x55\r
- 3894 0383 46010000            .4byte  .LVL80\r
- 3895 0387 4E010000            .4byte  .LVL82\r
- 3896 038b 0200                .2byte  0x2\r
- 3897 038d 30                  .byte   0x30\r
- 3898 038e 9F                  .byte   0x9f\r
- 3899 038f 4E010000            .4byte  .LVL82\r
- 3900 0393 A8010000            .4byte  .LVL85\r
- 3901 0397 0200                .2byte  0x2\r
- 3902 0399 34                  .byte   0x34\r
- 3903 039a 9F                  .byte   0x9f\r
- 3904 039b A8010000            .4byte  .LVL85\r
- 3905 039f AA010000            .4byte  .LVL86\r
- 3906 03a3 0200                .2byte  0x2\r
- 3907 03a5 30                  .byte   0x30\r
- 3908 03a6 9F                  .byte   0x9f\r
- 3909 03a7 AA010000            .4byte  .LVL86\r
- 3910 03ab 6E020000            .4byte  .LVL104\r
- 3911 03af 0200                .2byte  0x2\r
- 3912 03b1 34                  .byte   0x34\r
- 3913 03b2 9F                  .byte   0x9f\r
- 3914 03b3 6E020000            .4byte  .LVL104\r
- 3915 03b7 7C020000            .4byte  .LVL107\r
- 3916 03bb 0200                .2byte  0x2\r
- 3917 03bd 30                  .byte   0x30\r
- 3918 03be 9F                  .byte   0x9f\r
- 3919 03bf 80020000            .4byte  .LVL108\r
- 3920 03c3 94020000            .4byte  .LVL111\r
- 3921 03c7 0200                .2byte  0x2\r
- 3922 03c9 34                  .byte   0x34\r
- 3923 03ca 9F                  .byte   0x9f\r
- 3924 03cb 94020000            .4byte  .LVL111\r
- 3925 03cf 9A020000            .4byte  .LVL113\r
- 3926 03d3 0200                .2byte  0x2\r
- 3927 03d5 30                  .byte   0x30\r
- 3928 03d6 9F                  .byte   0x9f\r
- 3929 03d7 9A020000            .4byte  .LVL113\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 100\r
-\r
-\r
- 3930 03db 20030000            .4byte  .LVL131\r
- 3931 03df 0200                .2byte  0x2\r
- 3932 03e1 34                  .byte   0x34\r
- 3933 03e2 9F                  .byte   0x9f\r
- 3934 03e3 20030000            .4byte  .LVL131\r
- 3935 03e7 26030000            .4byte  .LVL133\r
- 3936 03eb 0200                .2byte  0x2\r
- 3937 03ed 30                  .byte   0x30\r
- 3938 03ee 9F                  .byte   0x9f\r
- 3939 03ef 26030000            .4byte  .LVL133\r
- 3940 03f3 48030000            .4byte  .LVL144\r
- 3941 03f7 0200                .2byte  0x2\r
- 3942 03f9 34                  .byte   0x34\r
- 3943 03fa 9F                  .byte   0x9f\r
- 3944 03fb 56030000            .4byte  .LVL146\r
- 3945 03ff 58030000            .4byte  .LVL147\r
- 3946 0403 0100                .2byte  0x1\r
- 3947 0405 55                  .byte   0x55\r
- 3948 0406 58030000            .4byte  .LVL147\r
- 3949 040a 66030000            .4byte  .LVL148\r
- 3950 040e 0200                .2byte  0x2\r
- 3951 0410 34                  .byte   0x34\r
- 3952 0411 9F                  .byte   0x9f\r
- 3953 0412 00000000            .4byte  0\r
- 3954 0416 00000000            .4byte  0\r
- 3955                  .LLST15:\r
- 3956 041a 7C000000            .4byte  .LVL58\r
- 3957 041e A6000000            .4byte  .LVL66\r
- 3958 0422 0E00                .2byte  0xe\r
- 3959 0424 70                  .byte   0x70\r
- 3960 0425 00                  .sleb128 0\r
- 3961 0426 08                  .byte   0x8\r
- 3962 0427 FF                  .byte   0xff\r
- 3963 0428 1A                  .byte   0x1a\r
- 3964 0429 38                  .byte   0x38\r
- 3965 042a 24                  .byte   0x24\r
- 3966 042b 71                  .byte   0x71\r
- 3967 042c 00                  .sleb128 0\r
- 3968 042d 08                  .byte   0x8\r
- 3969 042e FF                  .byte   0xff\r
- 3970 042f 1A                  .byte   0x1a\r
- 3971 0430 21                  .byte   0x21\r
- 3972 0431 9F                  .byte   0x9f\r
- 3973 0432 A6000000            .4byte  .LVL66\r
- 3974 0436 A8000000            .4byte  .LVL67\r
- 3975 043a 1700                .2byte  0x17\r
- 3976 043c 91                  .byte   0x91\r
- 3977 043d 00                  .sleb128 0\r
- 3978 043e 75                  .byte   0x75\r
- 3979 043f 00                  .sleb128 0\r
- 3980 0440 22                  .byte   0x22\r
- 3981 0441 0A                  .byte   0xa\r
- 3982 0442 7B02                .2byte  0x27b\r
- 3983 0444 1C                  .byte   0x1c\r
- 3984 0445 94                  .byte   0x94\r
- 3985 0446 01                  .byte   0x1\r
- 3986 0447 08                  .byte   0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 101\r
-\r
-\r
- 3987 0448 FF                  .byte   0xff\r
- 3988 0449 1A                  .byte   0x1a\r
- 3989 044a 38                  .byte   0x38\r
- 3990 044b 24                  .byte   0x24\r
- 3991 044c 71                  .byte   0x71\r
- 3992 044d 00                  .sleb128 0\r
- 3993 044e 08                  .byte   0x8\r
- 3994 044f FF                  .byte   0xff\r
- 3995 0450 1A                  .byte   0x1a\r
- 3996 0451 21                  .byte   0x21\r
- 3997 0452 9F                  .byte   0x9f\r
- 3998 0453 A8000000            .4byte  .LVL67\r
- 3999 0457 D4000000            .4byte  .LVL70\r
- 4000 045b 2000                .2byte  0x20\r
- 4001 045d 91                  .byte   0x91\r
- 4002 045e 00                  .sleb128 0\r
- 4003 045f 75                  .byte   0x75\r
- 4004 0460 00                  .sleb128 0\r
- 4005 0461 22                  .byte   0x22\r
- 4006 0462 0A                  .byte   0xa\r
- 4007 0463 7B02                .2byte  0x27b\r
- 4008 0465 1C                  .byte   0x1c\r
- 4009 0466 94                  .byte   0x94\r
- 4010 0467 01                  .byte   0x1\r
- 4011 0468 08                  .byte   0x8\r
- 4012 0469 FF                  .byte   0xff\r
- 4013 046a 1A                  .byte   0x1a\r
- 4014 046b 38                  .byte   0x38\r
- 4015 046c 24                  .byte   0x24\r
- 4016 046d 91                  .byte   0x91\r
- 4017 046e 00                  .sleb128 0\r
- 4018 046f 75                  .byte   0x75\r
- 4019 0470 00                  .sleb128 0\r
- 4020 0471 22                  .byte   0x22\r
- 4021 0472 0A                  .byte   0xa\r
- 4022 0473 7C02                .2byte  0x27c\r
- 4023 0475 1C                  .byte   0x1c\r
- 4024 0476 94                  .byte   0x94\r
- 4025 0477 01                  .byte   0x1\r
- 4026 0478 08                  .byte   0x8\r
- 4027 0479 FF                  .byte   0xff\r
- 4028 047a 1A                  .byte   0x1a\r
- 4029 047b 21                  .byte   0x21\r
- 4030 047c 9F                  .byte   0x9f\r
- 4031 047d D4000000            .4byte  .LVL70\r
- 4032 0481 DE000000            .4byte  .LVL72\r
- 4033 0485 4200                .2byte  0x42\r
- 4034 0487 91                  .byte   0x91\r
- 4035 0488 837B                .sleb128 -637\r
- 4036 048a 94                  .byte   0x94\r
- 4037 048b 01                  .byte   0x1\r
- 4038 048c 08                  .byte   0x8\r
- 4039 048d FF                  .byte   0xff\r
- 4040 048e 1A                  .byte   0x1a\r
- 4041 048f 38                  .byte   0x38\r
- 4042 0490 24                  .byte   0x24\r
- 4043 0491 91                  .byte   0x91\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 102\r
-\r
-\r
- 4044 0492 827B                .sleb128 -638\r
- 4045 0494 94                  .byte   0x94\r
- 4046 0495 01                  .byte   0x1\r
- 4047 0496 08                  .byte   0x8\r
- 4048 0497 FF                  .byte   0xff\r
- 4049 0498 1A                  .byte   0x1a\r
- 4050 0499 21                  .byte   0x21\r
- 4051 049a 91                  .byte   0x91\r
- 4052 049b 00                  .sleb128 0\r
- 4053 049c 22                  .byte   0x22\r
- 4054 049d 0A                  .byte   0xa\r
- 4055 049e 7B02                .2byte  0x27b\r
- 4056 04a0 1C                  .byte   0x1c\r
- 4057 04a1 94                  .byte   0x94\r
- 4058 04a2 01                  .byte   0x1\r
- 4059 04a3 08                  .byte   0x8\r
- 4060 04a4 FF                  .byte   0xff\r
- 4061 04a5 1A                  .byte   0x1a\r
- 4062 04a6 38                  .byte   0x38\r
- 4063 04a7 24                  .byte   0x24\r
- 4064 04a8 91                  .byte   0x91\r
- 4065 04a9 837B                .sleb128 -637\r
- 4066 04ab 94                  .byte   0x94\r
- 4067 04ac 01                  .byte   0x1\r
- 4068 04ad 08                  .byte   0x8\r
- 4069 04ae FF                  .byte   0xff\r
- 4070 04af 1A                  .byte   0x1a\r
- 4071 04b0 38                  .byte   0x38\r
- 4072 04b1 24                  .byte   0x24\r
- 4073 04b2 91                  .byte   0x91\r
- 4074 04b3 827B                .sleb128 -638\r
- 4075 04b5 94                  .byte   0x94\r
- 4076 04b6 01                  .byte   0x1\r
- 4077 04b7 08                  .byte   0x8\r
- 4078 04b8 FF                  .byte   0xff\r
- 4079 04b9 1A                  .byte   0x1a\r
- 4080 04ba 21                  .byte   0x21\r
- 4081 04bb 91                  .byte   0x91\r
- 4082 04bc 00                  .sleb128 0\r
- 4083 04bd 22                  .byte   0x22\r
- 4084 04be 0A                  .byte   0xa\r
- 4085 04bf 7C02                .2byte  0x27c\r
- 4086 04c1 1C                  .byte   0x1c\r
- 4087 04c2 94                  .byte   0x94\r
- 4088 04c3 01                  .byte   0x1\r
- 4089 04c4 08                  .byte   0x8\r
- 4090 04c5 FF                  .byte   0xff\r
- 4091 04c6 1A                  .byte   0x1a\r
- 4092 04c7 21                  .byte   0x21\r
- 4093 04c8 9F                  .byte   0x9f\r
- 4094 04c9 46010000            .4byte  .LVL80\r
- 4095 04cd 9B010000            .4byte  .LVL84-1\r
- 4096 04d1 2000                .2byte  0x20\r
- 4097 04d3 91                  .byte   0x91\r
- 4098 04d4 00                  .sleb128 0\r
- 4099 04d5 75                  .byte   0x75\r
- 4100 04d6 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 103\r
-\r
-\r
- 4101 04d7 22                  .byte   0x22\r
- 4102 04d8 0A                  .byte   0xa\r
- 4103 04d9 7B02                .2byte  0x27b\r
- 4104 04db 1C                  .byte   0x1c\r
- 4105 04dc 94                  .byte   0x94\r
- 4106 04dd 01                  .byte   0x1\r
- 4107 04de 08                  .byte   0x8\r
- 4108 04df FF                  .byte   0xff\r
- 4109 04e0 1A                  .byte   0x1a\r
- 4110 04e1 38                  .byte   0x38\r
- 4111 04e2 24                  .byte   0x24\r
- 4112 04e3 91                  .byte   0x91\r
- 4113 04e4 00                  .sleb128 0\r
- 4114 04e5 75                  .byte   0x75\r
- 4115 04e6 00                  .sleb128 0\r
- 4116 04e7 22                  .byte   0x22\r
- 4117 04e8 0A                  .byte   0xa\r
- 4118 04e9 7C02                .2byte  0x27c\r
- 4119 04eb 1C                  .byte   0x1c\r
- 4120 04ec 94                  .byte   0x94\r
- 4121 04ed 01                  .byte   0x1\r
- 4122 04ee 08                  .byte   0x8\r
- 4123 04ef FF                  .byte   0xff\r
- 4124 04f0 1A                  .byte   0x1a\r
- 4125 04f1 21                  .byte   0x21\r
- 4126 04f2 9F                  .byte   0x9f\r
- 4127 04f3 AA010000            .4byte  .LVL86\r
- 4128 04f7 D1010000            .4byte  .LVL88-1\r
- 4129 04fb 2000                .2byte  0x20\r
- 4130 04fd 91                  .byte   0x91\r
- 4131 04fe 00                  .sleb128 0\r
- 4132 04ff 75                  .byte   0x75\r
- 4133 0500 00                  .sleb128 0\r
- 4134 0501 22                  .byte   0x22\r
- 4135 0502 0A                  .byte   0xa\r
- 4136 0503 7B02                .2byte  0x27b\r
- 4137 0505 1C                  .byte   0x1c\r
- 4138 0506 94                  .byte   0x94\r
- 4139 0507 01                  .byte   0x1\r
- 4140 0508 08                  .byte   0x8\r
- 4141 0509 FF                  .byte   0xff\r
- 4142 050a 1A                  .byte   0x1a\r
- 4143 050b 38                  .byte   0x38\r
- 4144 050c 24                  .byte   0x24\r
- 4145 050d 91                  .byte   0x91\r
- 4146 050e 00                  .sleb128 0\r
- 4147 050f 75                  .byte   0x75\r
- 4148 0510 00                  .sleb128 0\r
- 4149 0511 22                  .byte   0x22\r
- 4150 0512 0A                  .byte   0xa\r
- 4151 0513 7C02                .2byte  0x27c\r
- 4152 0515 1C                  .byte   0x1c\r
- 4153 0516 94                  .byte   0x94\r
- 4154 0517 01                  .byte   0x1\r
- 4155 0518 08                  .byte   0x8\r
- 4156 0519 FF                  .byte   0xff\r
- 4157 051a 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 104\r
-\r
-\r
- 4158 051b 21                  .byte   0x21\r
- 4159 051c 9F                  .byte   0x9f\r
- 4160 051d D4010000            .4byte  .LVL89\r
- 4161 0521 E0010000            .4byte  .LVL90\r
- 4162 0525 2000                .2byte  0x20\r
- 4163 0527 91                  .byte   0x91\r
- 4164 0528 00                  .sleb128 0\r
- 4165 0529 75                  .byte   0x75\r
- 4166 052a 00                  .sleb128 0\r
- 4167 052b 22                  .byte   0x22\r
- 4168 052c 0A                  .byte   0xa\r
- 4169 052d 7B02                .2byte  0x27b\r
- 4170 052f 1C                  .byte   0x1c\r
- 4171 0530 94                  .byte   0x94\r
- 4172 0531 01                  .byte   0x1\r
- 4173 0532 08                  .byte   0x8\r
- 4174 0533 FF                  .byte   0xff\r
- 4175 0534 1A                  .byte   0x1a\r
- 4176 0535 38                  .byte   0x38\r
- 4177 0536 24                  .byte   0x24\r
- 4178 0537 91                  .byte   0x91\r
- 4179 0538 00                  .sleb128 0\r
- 4180 0539 75                  .byte   0x75\r
- 4181 053a 00                  .sleb128 0\r
- 4182 053b 22                  .byte   0x22\r
- 4183 053c 0A                  .byte   0xa\r
- 4184 053d 7C02                .2byte  0x27c\r
- 4185 053f 1C                  .byte   0x1c\r
- 4186 0540 94                  .byte   0x94\r
- 4187 0541 01                  .byte   0x1\r
- 4188 0542 08                  .byte   0x8\r
- 4189 0543 FF                  .byte   0xff\r
- 4190 0544 1A                  .byte   0x1a\r
- 4191 0545 21                  .byte   0x21\r
- 4192 0546 9F                  .byte   0x9f\r
- 4193 0547 5C020000            .4byte  .LVL103\r
- 4194 054b 79020000            .4byte  .LVL106-1\r
- 4195 054f 2000                .2byte  0x20\r
- 4196 0551 91                  .byte   0x91\r
- 4197 0552 00                  .sleb128 0\r
- 4198 0553 75                  .byte   0x75\r
- 4199 0554 00                  .sleb128 0\r
- 4200 0555 22                  .byte   0x22\r
- 4201 0556 0A                  .byte   0xa\r
- 4202 0557 7B02                .2byte  0x27b\r
- 4203 0559 1C                  .byte   0x1c\r
- 4204 055a 94                  .byte   0x94\r
- 4205 055b 01                  .byte   0x1\r
- 4206 055c 08                  .byte   0x8\r
- 4207 055d FF                  .byte   0xff\r
- 4208 055e 1A                  .byte   0x1a\r
- 4209 055f 38                  .byte   0x38\r
- 4210 0560 24                  .byte   0x24\r
- 4211 0561 91                  .byte   0x91\r
- 4212 0562 00                  .sleb128 0\r
- 4213 0563 75                  .byte   0x75\r
- 4214 0564 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 105\r
-\r
-\r
- 4215 0565 22                  .byte   0x22\r
- 4216 0566 0A                  .byte   0xa\r
- 4217 0567 7C02                .2byte  0x27c\r
- 4218 0569 1C                  .byte   0x1c\r
- 4219 056a 94                  .byte   0x94\r
- 4220 056b 01                  .byte   0x1\r
- 4221 056c 08                  .byte   0x8\r
- 4222 056d FF                  .byte   0xff\r
- 4223 056e 1A                  .byte   0x1a\r
- 4224 056f 21                  .byte   0x21\r
- 4225 0570 9F                  .byte   0x9f\r
- 4226 0571 80020000            .4byte  .LVL108\r
- 4227 0575 B4020000            .4byte  .LVL114\r
- 4228 0579 2000                .2byte  0x20\r
- 4229 057b 91                  .byte   0x91\r
- 4230 057c 00                  .sleb128 0\r
- 4231 057d 75                  .byte   0x75\r
- 4232 057e 00                  .sleb128 0\r
- 4233 057f 22                  .byte   0x22\r
- 4234 0580 0A                  .byte   0xa\r
- 4235 0581 7B02                .2byte  0x27b\r
- 4236 0583 1C                  .byte   0x1c\r
- 4237 0584 94                  .byte   0x94\r
- 4238 0585 01                  .byte   0x1\r
- 4239 0586 08                  .byte   0x8\r
- 4240 0587 FF                  .byte   0xff\r
- 4241 0588 1A                  .byte   0x1a\r
- 4242 0589 38                  .byte   0x38\r
- 4243 058a 24                  .byte   0x24\r
- 4244 058b 91                  .byte   0x91\r
- 4245 058c 00                  .sleb128 0\r
- 4246 058d 75                  .byte   0x75\r
- 4247 058e 00                  .sleb128 0\r
- 4248 058f 22                  .byte   0x22\r
- 4249 0590 0A                  .byte   0xa\r
- 4250 0591 7C02                .2byte  0x27c\r
- 4251 0593 1C                  .byte   0x1c\r
- 4252 0594 94                  .byte   0x94\r
- 4253 0595 01                  .byte   0x1\r
- 4254 0596 08                  .byte   0x8\r
- 4255 0597 FF                  .byte   0xff\r
- 4256 0598 1A                  .byte   0x1a\r
- 4257 0599 21                  .byte   0x21\r
- 4258 059a 9F                  .byte   0x9f\r
- 4259 059b B4020000            .4byte  .LVL114\r
- 4260 059f 22030000            .4byte  .LVL132\r
- 4261 05a3 4200                .2byte  0x42\r
- 4262 05a5 91                  .byte   0x91\r
- 4263 05a6 837B                .sleb128 -637\r
- 4264 05a8 94                  .byte   0x94\r
- 4265 05a9 01                  .byte   0x1\r
- 4266 05aa 08                  .byte   0x8\r
- 4267 05ab FF                  .byte   0xff\r
- 4268 05ac 1A                  .byte   0x1a\r
- 4269 05ad 38                  .byte   0x38\r
- 4270 05ae 24                  .byte   0x24\r
- 4271 05af 91                  .byte   0x91\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 106\r
-\r
-\r
- 4272 05b0 827B                .sleb128 -638\r
- 4273 05b2 94                  .byte   0x94\r
- 4274 05b3 01                  .byte   0x1\r
- 4275 05b4 08                  .byte   0x8\r
- 4276 05b5 FF                  .byte   0xff\r
- 4277 05b6 1A                  .byte   0x1a\r
- 4278 05b7 21                  .byte   0x21\r
- 4279 05b8 91                  .byte   0x91\r
- 4280 05b9 00                  .sleb128 0\r
- 4281 05ba 22                  .byte   0x22\r
- 4282 05bb 0A                  .byte   0xa\r
- 4283 05bc 7B02                .2byte  0x27b\r
- 4284 05be 1C                  .byte   0x1c\r
- 4285 05bf 94                  .byte   0x94\r
- 4286 05c0 01                  .byte   0x1\r
- 4287 05c1 08                  .byte   0x8\r
- 4288 05c2 FF                  .byte   0xff\r
- 4289 05c3 1A                  .byte   0x1a\r
- 4290 05c4 38                  .byte   0x38\r
- 4291 05c5 24                  .byte   0x24\r
- 4292 05c6 91                  .byte   0x91\r
- 4293 05c7 837B                .sleb128 -637\r
- 4294 05c9 94                  .byte   0x94\r
- 4295 05ca 01                  .byte   0x1\r
- 4296 05cb 08                  .byte   0x8\r
- 4297 05cc FF                  .byte   0xff\r
- 4298 05cd 1A                  .byte   0x1a\r
- 4299 05ce 38                  .byte   0x38\r
- 4300 05cf 24                  .byte   0x24\r
- 4301 05d0 91                  .byte   0x91\r
- 4302 05d1 827B                .sleb128 -638\r
- 4303 05d3 94                  .byte   0x94\r
- 4304 05d4 01                  .byte   0x1\r
- 4305 05d5 08                  .byte   0x8\r
- 4306 05d6 FF                  .byte   0xff\r
- 4307 05d7 1A                  .byte   0x1a\r
- 4308 05d8 21                  .byte   0x21\r
- 4309 05d9 91                  .byte   0x91\r
- 4310 05da 00                  .sleb128 0\r
- 4311 05db 22                  .byte   0x22\r
- 4312 05dc 0A                  .byte   0xa\r
- 4313 05dd 7C02                .2byte  0x27c\r
- 4314 05df 1C                  .byte   0x1c\r
- 4315 05e0 94                  .byte   0x94\r
- 4316 05e1 01                  .byte   0x1\r
- 4317 05e2 08                  .byte   0x8\r
- 4318 05e3 FF                  .byte   0xff\r
- 4319 05e4 1A                  .byte   0x1a\r
- 4320 05e5 21                  .byte   0x21\r
- 4321 05e6 9F                  .byte   0x9f\r
- 4322 05e7 26030000            .4byte  .LVL133\r
- 4323 05eb 29030000            .4byte  .LVL134-1\r
- 4324 05ef 2000                .2byte  0x20\r
- 4325 05f1 91                  .byte   0x91\r
- 4326 05f2 00                  .sleb128 0\r
- 4327 05f3 75                  .byte   0x75\r
- 4328 05f4 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 107\r
-\r
-\r
- 4329 05f5 22                  .byte   0x22\r
- 4330 05f6 0A                  .byte   0xa\r
- 4331 05f7 7B02                .2byte  0x27b\r
- 4332 05f9 1C                  .byte   0x1c\r
- 4333 05fa 94                  .byte   0x94\r
- 4334 05fb 01                  .byte   0x1\r
- 4335 05fc 08                  .byte   0x8\r
- 4336 05fd FF                  .byte   0xff\r
- 4337 05fe 1A                  .byte   0x1a\r
- 4338 05ff 38                  .byte   0x38\r
- 4339 0600 24                  .byte   0x24\r
- 4340 0601 91                  .byte   0x91\r
- 4341 0602 00                  .sleb128 0\r
- 4342 0603 75                  .byte   0x75\r
- 4343 0604 00                  .sleb128 0\r
- 4344 0605 22                  .byte   0x22\r
- 4345 0606 0A                  .byte   0xa\r
- 4346 0607 7C02                .2byte  0x27c\r
- 4347 0609 1C                  .byte   0x1c\r
- 4348 060a 94                  .byte   0x94\r
- 4349 060b 01                  .byte   0x1\r
- 4350 060c 08                  .byte   0x8\r
- 4351 060d FF                  .byte   0xff\r
- 4352 060e 1A                  .byte   0x1a\r
- 4353 060f 21                  .byte   0x21\r
- 4354 0610 9F                  .byte   0x9f\r
- 4355 0611 38030000            .4byte  .LVL137\r
- 4356 0615 3A030000            .4byte  .LVL138\r
- 4357 0619 2000                .2byte  0x20\r
- 4358 061b 91                  .byte   0x91\r
- 4359 061c 00                  .sleb128 0\r
- 4360 061d 75                  .byte   0x75\r
- 4361 061e 00                  .sleb128 0\r
- 4362 061f 22                  .byte   0x22\r
- 4363 0620 0A                  .byte   0xa\r
- 4364 0621 7B02                .2byte  0x27b\r
- 4365 0623 1C                  .byte   0x1c\r
- 4366 0624 94                  .byte   0x94\r
- 4367 0625 01                  .byte   0x1\r
- 4368 0626 08                  .byte   0x8\r
- 4369 0627 FF                  .byte   0xff\r
- 4370 0628 1A                  .byte   0x1a\r
- 4371 0629 38                  .byte   0x38\r
- 4372 062a 24                  .byte   0x24\r
- 4373 062b 91                  .byte   0x91\r
- 4374 062c 00                  .sleb128 0\r
- 4375 062d 75                  .byte   0x75\r
- 4376 062e 00                  .sleb128 0\r
- 4377 062f 22                  .byte   0x22\r
- 4378 0630 0A                  .byte   0xa\r
- 4379 0631 7C02                .2byte  0x27c\r
- 4380 0633 1C                  .byte   0x1c\r
- 4381 0634 94                  .byte   0x94\r
- 4382 0635 01                  .byte   0x1\r
- 4383 0636 08                  .byte   0x8\r
- 4384 0637 FF                  .byte   0xff\r
- 4385 0638 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 108\r
-\r
-\r
- 4386 0639 21                  .byte   0x21\r
- 4387 063a 9F                  .byte   0x9f\r
- 4388 063b 3A030000            .4byte  .LVL138\r
- 4389 063f 3C030000            .4byte  .LVL139\r
- 4390 0643 4200                .2byte  0x42\r
- 4391 0645 91                  .byte   0x91\r
- 4392 0646 837B                .sleb128 -637\r
- 4393 0648 94                  .byte   0x94\r
- 4394 0649 01                  .byte   0x1\r
- 4395 064a 08                  .byte   0x8\r
- 4396 064b FF                  .byte   0xff\r
- 4397 064c 1A                  .byte   0x1a\r
- 4398 064d 38                  .byte   0x38\r
- 4399 064e 24                  .byte   0x24\r
- 4400 064f 91                  .byte   0x91\r
- 4401 0650 827B                .sleb128 -638\r
- 4402 0652 94                  .byte   0x94\r
- 4403 0653 01                  .byte   0x1\r
- 4404 0654 08                  .byte   0x8\r
- 4405 0655 FF                  .byte   0xff\r
- 4406 0656 1A                  .byte   0x1a\r
- 4407 0657 21                  .byte   0x21\r
- 4408 0658 91                  .byte   0x91\r
- 4409 0659 00                  .sleb128 0\r
- 4410 065a 22                  .byte   0x22\r
- 4411 065b 0A                  .byte   0xa\r
- 4412 065c 7B02                .2byte  0x27b\r
- 4413 065e 1C                  .byte   0x1c\r
- 4414 065f 94                  .byte   0x94\r
- 4415 0660 01                  .byte   0x1\r
- 4416 0661 08                  .byte   0x8\r
- 4417 0662 FF                  .byte   0xff\r
- 4418 0663 1A                  .byte   0x1a\r
- 4419 0664 38                  .byte   0x38\r
- 4420 0665 24                  .byte   0x24\r
- 4421 0666 91                  .byte   0x91\r
- 4422 0667 837B                .sleb128 -637\r
- 4423 0669 94                  .byte   0x94\r
- 4424 066a 01                  .byte   0x1\r
- 4425 066b 08                  .byte   0x8\r
- 4426 066c FF                  .byte   0xff\r
- 4427 066d 1A                  .byte   0x1a\r
- 4428 066e 38                  .byte   0x38\r
- 4429 066f 24                  .byte   0x24\r
- 4430 0670 91                  .byte   0x91\r
- 4431 0671 827B                .sleb128 -638\r
- 4432 0673 94                  .byte   0x94\r
- 4433 0674 01                  .byte   0x1\r
- 4434 0675 08                  .byte   0x8\r
- 4435 0676 FF                  .byte   0xff\r
- 4436 0677 1A                  .byte   0x1a\r
- 4437 0678 21                  .byte   0x21\r
- 4438 0679 91                  .byte   0x91\r
- 4439 067a 00                  .sleb128 0\r
- 4440 067b 22                  .byte   0x22\r
- 4441 067c 0A                  .byte   0xa\r
- 4442 067d 7C02                .2byte  0x27c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 109\r
-\r
-\r
- 4443 067f 1C                  .byte   0x1c\r
- 4444 0680 94                  .byte   0x94\r
- 4445 0681 01                  .byte   0x1\r
- 4446 0682 08                  .byte   0x8\r
- 4447 0683 FF                  .byte   0xff\r
- 4448 0684 1A                  .byte   0x1a\r
- 4449 0685 21                  .byte   0x21\r
- 4450 0686 9F                  .byte   0x9f\r
- 4451 0687 46030000            .4byte  .LVL143\r
- 4452 068b 48030000            .4byte  .LVL144\r
- 4453 068f 2000                .2byte  0x20\r
- 4454 0691 91                  .byte   0x91\r
- 4455 0692 00                  .sleb128 0\r
- 4456 0693 75                  .byte   0x75\r
- 4457 0694 00                  .sleb128 0\r
- 4458 0695 22                  .byte   0x22\r
- 4459 0696 0A                  .byte   0xa\r
- 4460 0697 7B02                .2byte  0x27b\r
- 4461 0699 1C                  .byte   0x1c\r
- 4462 069a 94                  .byte   0x94\r
- 4463 069b 01                  .byte   0x1\r
- 4464 069c 08                  .byte   0x8\r
- 4465 069d FF                  .byte   0xff\r
- 4466 069e 1A                  .byte   0x1a\r
- 4467 069f 38                  .byte   0x38\r
- 4468 06a0 24                  .byte   0x24\r
- 4469 06a1 91                  .byte   0x91\r
- 4470 06a2 00                  .sleb128 0\r
- 4471 06a3 75                  .byte   0x75\r
- 4472 06a4 00                  .sleb128 0\r
- 4473 06a5 22                  .byte   0x22\r
- 4474 06a6 0A                  .byte   0xa\r
- 4475 06a7 7C02                .2byte  0x27c\r
- 4476 06a9 1C                  .byte   0x1c\r
- 4477 06aa 94                  .byte   0x94\r
- 4478 06ab 01                  .byte   0x1\r
- 4479 06ac 08                  .byte   0x8\r
- 4480 06ad FF                  .byte   0xff\r
- 4481 06ae 1A                  .byte   0x1a\r
- 4482 06af 21                  .byte   0x21\r
- 4483 06b0 9F                  .byte   0x9f\r
- 4484 06b1 54030000            .4byte  .LVL145\r
- 4485 06b5 56030000            .4byte  .LVL146\r
- 4486 06b9 2000                .2byte  0x20\r
- 4487 06bb 91                  .byte   0x91\r
- 4488 06bc 00                  .sleb128 0\r
- 4489 06bd 75                  .byte   0x75\r
- 4490 06be 00                  .sleb128 0\r
- 4491 06bf 22                  .byte   0x22\r
- 4492 06c0 0A                  .byte   0xa\r
- 4493 06c1 7B02                .2byte  0x27b\r
- 4494 06c3 1C                  .byte   0x1c\r
- 4495 06c4 94                  .byte   0x94\r
- 4496 06c5 01                  .byte   0x1\r
- 4497 06c6 08                  .byte   0x8\r
- 4498 06c7 FF                  .byte   0xff\r
- 4499 06c8 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 110\r
-\r
-\r
- 4500 06c9 38                  .byte   0x38\r
- 4501 06ca 24                  .byte   0x24\r
- 4502 06cb 91                  .byte   0x91\r
- 4503 06cc 00                  .sleb128 0\r
- 4504 06cd 75                  .byte   0x75\r
- 4505 06ce 00                  .sleb128 0\r
- 4506 06cf 22                  .byte   0x22\r
- 4507 06d0 0A                  .byte   0xa\r
- 4508 06d1 7C02                .2byte  0x27c\r
- 4509 06d3 1C                  .byte   0x1c\r
- 4510 06d4 94                  .byte   0x94\r
- 4511 06d5 01                  .byte   0x1\r
- 4512 06d6 08                  .byte   0x8\r
- 4513 06d7 FF                  .byte   0xff\r
- 4514 06d8 1A                  .byte   0x1a\r
- 4515 06d9 21                  .byte   0x21\r
- 4516 06da 9F                  .byte   0x9f\r
- 4517 06db 56030000            .4byte  .LVL146\r
- 4518 06df 58030000            .4byte  .LVL147\r
- 4519 06e3 4200                .2byte  0x42\r
- 4520 06e5 91                  .byte   0x91\r
- 4521 06e6 837B                .sleb128 -637\r
- 4522 06e8 94                  .byte   0x94\r
- 4523 06e9 01                  .byte   0x1\r
- 4524 06ea 08                  .byte   0x8\r
- 4525 06eb FF                  .byte   0xff\r
- 4526 06ec 1A                  .byte   0x1a\r
- 4527 06ed 38                  .byte   0x38\r
- 4528 06ee 24                  .byte   0x24\r
- 4529 06ef 91                  .byte   0x91\r
- 4530 06f0 827B                .sleb128 -638\r
- 4531 06f2 94                  .byte   0x94\r
- 4532 06f3 01                  .byte   0x1\r
- 4533 06f4 08                  .byte   0x8\r
- 4534 06f5 FF                  .byte   0xff\r
- 4535 06f6 1A                  .byte   0x1a\r
- 4536 06f7 21                  .byte   0x21\r
- 4537 06f8 91                  .byte   0x91\r
- 4538 06f9 00                  .sleb128 0\r
- 4539 06fa 22                  .byte   0x22\r
- 4540 06fb 0A                  .byte   0xa\r
- 4541 06fc 7B02                .2byte  0x27b\r
- 4542 06fe 1C                  .byte   0x1c\r
- 4543 06ff 94                  .byte   0x94\r
- 4544 0700 01                  .byte   0x1\r
- 4545 0701 08                  .byte   0x8\r
- 4546 0702 FF                  .byte   0xff\r
- 4547 0703 1A                  .byte   0x1a\r
- 4548 0704 38                  .byte   0x38\r
- 4549 0705 24                  .byte   0x24\r
- 4550 0706 91                  .byte   0x91\r
- 4551 0707 837B                .sleb128 -637\r
- 4552 0709 94                  .byte   0x94\r
- 4553 070a 01                  .byte   0x1\r
- 4554 070b 08                  .byte   0x8\r
- 4555 070c FF                  .byte   0xff\r
- 4556 070d 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 111\r
-\r
-\r
- 4557 070e 38                  .byte   0x38\r
- 4558 070f 24                  .byte   0x24\r
- 4559 0710 91                  .byte   0x91\r
- 4560 0711 827B                .sleb128 -638\r
- 4561 0713 94                  .byte   0x94\r
- 4562 0714 01                  .byte   0x1\r
- 4563 0715 08                  .byte   0x8\r
- 4564 0716 FF                  .byte   0xff\r
- 4565 0717 1A                  .byte   0x1a\r
- 4566 0718 21                  .byte   0x21\r
- 4567 0719 91                  .byte   0x91\r
- 4568 071a 00                  .sleb128 0\r
- 4569 071b 22                  .byte   0x22\r
- 4570 071c 0A                  .byte   0xa\r
- 4571 071d 7C02                .2byte  0x27c\r
- 4572 071f 1C                  .byte   0x1c\r
- 4573 0720 94                  .byte   0x94\r
- 4574 0721 01                  .byte   0x1\r
- 4575 0722 08                  .byte   0x8\r
- 4576 0723 FF                  .byte   0xff\r
- 4577 0724 1A                  .byte   0x1a\r
- 4578 0725 21                  .byte   0x21\r
- 4579 0726 9F                  .byte   0x9f\r
- 4580 0727 58030000            .4byte  .LVL147\r
- 4581 072b 66030000            .4byte  .LVL148\r
- 4582 072f 2000                .2byte  0x20\r
- 4583 0731 91                  .byte   0x91\r
- 4584 0732 00                  .sleb128 0\r
- 4585 0733 75                  .byte   0x75\r
- 4586 0734 00                  .sleb128 0\r
- 4587 0735 22                  .byte   0x22\r
- 4588 0736 0A                  .byte   0xa\r
- 4589 0737 7B02                .2byte  0x27b\r
- 4590 0739 1C                  .byte   0x1c\r
- 4591 073a 94                  .byte   0x94\r
- 4592 073b 01                  .byte   0x1\r
- 4593 073c 08                  .byte   0x8\r
- 4594 073d FF                  .byte   0xff\r
- 4595 073e 1A                  .byte   0x1a\r
- 4596 073f 38                  .byte   0x38\r
- 4597 0740 24                  .byte   0x24\r
- 4598 0741 91                  .byte   0x91\r
- 4599 0742 00                  .sleb128 0\r
- 4600 0743 75                  .byte   0x75\r
- 4601 0744 00                  .sleb128 0\r
- 4602 0745 22                  .byte   0x22\r
- 4603 0746 0A                  .byte   0xa\r
- 4604 0747 7C02                .2byte  0x27c\r
- 4605 0749 1C                  .byte   0x1c\r
- 4606 074a 94                  .byte   0x94\r
- 4607 074b 01                  .byte   0x1\r
- 4608 074c 08                  .byte   0x8\r
- 4609 074d FF                  .byte   0xff\r
- 4610 074e 1A                  .byte   0x1a\r
- 4611 074f 21                  .byte   0x21\r
- 4612 0750 9F                  .byte   0x9f\r
- 4613 0751 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 112\r
-\r
-\r
- 4614 0755 00000000            .4byte  0\r
- 4615                  .LLST16:\r
- 4616 0759 32000000            .4byte  .LVL54\r
- 4617 075d 68000000            .4byte  .LVL56\r
- 4618 0761 0100                .2byte  0x1\r
- 4619 0763 50                  .byte   0x50\r
- 4620 0764 00000000            .4byte  0\r
- 4621 0768 00000000            .4byte  0\r
- 4622                  .LLST17:\r
- 4623 076c 00000000            .4byte  .LVL48\r
- 4624 0770 1A000000            .4byte  .LVL50\r
- 4625 0774 0200                .2byte  0x2\r
- 4626 0776 30                  .byte   0x30\r
- 4627 0777 9F                  .byte   0x9f\r
- 4628 0778 72000000            .4byte  .LVL57\r
- 4629 077c D4000000            .4byte  .LVL70\r
- 4630 0780 0100                .2byte  0x1\r
- 4631 0782 55                  .byte   0x55\r
- 4632 0783 D4000000            .4byte  .LVL70\r
- 4633 0787 DE000000            .4byte  .LVL72\r
- 4634 078b 1400                .2byte  0x14\r
- 4635 078d 91                  .byte   0x91\r
- 4636 078e 837B                .sleb128 -637\r
- 4637 0790 94                  .byte   0x94\r
- 4638 0791 01                  .byte   0x1\r
- 4639 0792 08                  .byte   0x8\r
- 4640 0793 FF                  .byte   0xff\r
- 4641 0794 1A                  .byte   0x1a\r
- 4642 0795 38                  .byte   0x38\r
- 4643 0796 24                  .byte   0x24\r
- 4644 0797 91                  .byte   0x91\r
- 4645 0798 827B                .sleb128 -638\r
- 4646 079a 94                  .byte   0x94\r
- 4647 079b 01                  .byte   0x1\r
- 4648 079c 08                  .byte   0x8\r
- 4649 079d FF                  .byte   0xff\r
- 4650 079e 1A                  .byte   0x1a\r
- 4651 079f 21                  .byte   0x21\r
- 4652 07a0 9F                  .byte   0x9f\r
- 4653 07a1 46010000            .4byte  .LVL80\r
- 4654 07a5 E2010000            .4byte  .LVL91\r
- 4655 07a9 0100                .2byte  0x1\r
- 4656 07ab 55                  .byte   0x55\r
- 4657 07ac E2010000            .4byte  .LVL91\r
- 4658 07b0 00020000            .4byte  .LVL94\r
- 4659 07b4 0300                .2byte  0x3\r
- 4660 07b6 75                  .byte   0x75\r
- 4661 07b7 03                  .sleb128 3\r
- 4662 07b8 9F                  .byte   0x9f\r
- 4663 07b9 00020000            .4byte  .LVL94\r
- 4664 07bd 04020000            .4byte  .LVL95\r
- 4665 07c1 0200                .2byte  0x2\r
- 4666 07c3 40                  .byte   0x40\r
- 4667 07c4 9F                  .byte   0x9f\r
- 4668 07c5 04020000            .4byte  .LVL95\r
- 4669 07c9 08020000            .4byte  .LVL96\r
- 4670 07cd 0300                .2byte  0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 113\r
-\r
-\r
- 4671 07cf 75                  .byte   0x75\r
- 4672 07d0 03                  .sleb128 3\r
- 4673 07d1 9F                  .byte   0x9f\r
- 4674 07d2 08020000            .4byte  .LVL96\r
- 4675 07d6 5C020000            .4byte  .LVL103\r
- 4676 07da 0100                .2byte  0x1\r
- 4677 07dc 54                  .byte   0x54\r
- 4678 07dd 5C020000            .4byte  .LVL103\r
- 4679 07e1 7C020000            .4byte  .LVL107\r
- 4680 07e5 0100                .2byte  0x1\r
- 4681 07e7 55                  .byte   0x55\r
- 4682 07e8 80020000            .4byte  .LVL108\r
- 4683 07ec B4020000            .4byte  .LVL114\r
- 4684 07f0 0100                .2byte  0x1\r
- 4685 07f2 55                  .byte   0x55\r
- 4686 07f3 B4020000            .4byte  .LVL114\r
- 4687 07f7 22030000            .4byte  .LVL132\r
- 4688 07fb 1400                .2byte  0x14\r
- 4689 07fd 91                  .byte   0x91\r
- 4690 07fe 837B                .sleb128 -637\r
- 4691 0800 94                  .byte   0x94\r
- 4692 0801 01                  .byte   0x1\r
- 4693 0802 08                  .byte   0x8\r
- 4694 0803 FF                  .byte   0xff\r
- 4695 0804 1A                  .byte   0x1a\r
- 4696 0805 38                  .byte   0x38\r
- 4697 0806 24                  .byte   0x24\r
- 4698 0807 91                  .byte   0x91\r
- 4699 0808 827B                .sleb128 -638\r
- 4700 080a 94                  .byte   0x94\r
- 4701 080b 01                  .byte   0x1\r
- 4702 080c 08                  .byte   0x8\r
- 4703 080d FF                  .byte   0xff\r
- 4704 080e 1A                  .byte   0x1a\r
- 4705 080f 21                  .byte   0x21\r
- 4706 0810 9F                  .byte   0x9f\r
- 4707 0811 26030000            .4byte  .LVL133\r
- 4708 0815 2E030000            .4byte  .LVL135\r
- 4709 0819 0100                .2byte  0x1\r
- 4710 081b 55                  .byte   0x55\r
- 4711 081c 38030000            .4byte  .LVL137\r
- 4712 0820 3A030000            .4byte  .LVL138\r
- 4713 0824 0100                .2byte  0x1\r
- 4714 0826 55                  .byte   0x55\r
- 4715 0827 3A030000            .4byte  .LVL138\r
- 4716 082b 3C030000            .4byte  .LVL139\r
- 4717 082f 1400                .2byte  0x14\r
- 4718 0831 91                  .byte   0x91\r
- 4719 0832 837B                .sleb128 -637\r
- 4720 0834 94                  .byte   0x94\r
- 4721 0835 01                  .byte   0x1\r
- 4722 0836 08                  .byte   0x8\r
- 4723 0837 FF                  .byte   0xff\r
- 4724 0838 1A                  .byte   0x1a\r
- 4725 0839 38                  .byte   0x38\r
- 4726 083a 24                  .byte   0x24\r
- 4727 083b 91                  .byte   0x91\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 114\r
-\r
-\r
- 4728 083c 827B                .sleb128 -638\r
- 4729 083e 94                  .byte   0x94\r
- 4730 083f 01                  .byte   0x1\r
- 4731 0840 08                  .byte   0x8\r
- 4732 0841 FF                  .byte   0xff\r
- 4733 0842 1A                  .byte   0x1a\r
- 4734 0843 21                  .byte   0x21\r
- 4735 0844 9F                  .byte   0x9f\r
- 4736 0845 3C030000            .4byte  .LVL139\r
- 4737 0849 46030000            .4byte  .LVL143\r
- 4738 084d 0100                .2byte  0x1\r
- 4739 084f 54                  .byte   0x54\r
- 4740 0850 46030000            .4byte  .LVL143\r
- 4741 0854 48030000            .4byte  .LVL144\r
- 4742 0858 0100                .2byte  0x1\r
- 4743 085a 55                  .byte   0x55\r
- 4744 085b 54030000            .4byte  .LVL145\r
- 4745 085f 56030000            .4byte  .LVL146\r
- 4746 0863 0100                .2byte  0x1\r
- 4747 0865 55                  .byte   0x55\r
- 4748 0866 00000000            .4byte  0\r
- 4749 086a 00000000            .4byte  0\r
- 4750                  .LLST18:\r
- 4751 086e 00000000            .4byte  .LVL48\r
- 4752 0872 1A000000            .4byte  .LVL50\r
- 4753 0876 0200                .2byte  0x2\r
- 4754 0878 30                  .byte   0x30\r
- 4755 0879 9F                  .byte   0x9f\r
- 4756 087a DE000000            .4byte  .LVL72\r
- 4757 087e 42010000            .4byte  .LVL79\r
- 4758 0882 0100                .2byte  0x1\r
- 4759 0884 57                  .byte   0x57\r
- 4760 0885 C8010000            .4byte  .LVL87\r
- 4761 0889 E0010000            .4byte  .LVL90\r
- 4762 088d 0100                .2byte  0x1\r
- 4763 088f 57                  .byte   0x57\r
- 4764 0890 FA010000            .4byte  .LVL93\r
- 4765 0894 FF010000            .4byte  .LVL94-1\r
- 4766 0898 0100                .2byte  0x1\r
- 4767 089a 52                  .byte   0x52\r
- 4768 089b FF010000            .4byte  .LVL94-1\r
- 4769 089f 04020000            .4byte  .LVL95\r
- 4770 08a3 0100                .2byte  0x1\r
- 4771 08a5 56                  .byte   0x56\r
- 4772 08a6 04020000            .4byte  .LVL95\r
- 4773 08aa 08020000            .4byte  .LVL96\r
- 4774 08ae 0100                .2byte  0x1\r
- 4775 08b0 52                  .byte   0x52\r
- 4776 08b1 08020000            .4byte  .LVL96\r
- 4777 08b5 1E020000            .4byte  .LVL97\r
- 4778 08b9 0100                .2byte  0x1\r
- 4779 08bb 56                  .byte   0x56\r
- 4780 08bc 1E020000            .4byte  .LVL97\r
- 4781 08c0 5A020000            .4byte  .LVL102\r
- 4782 08c4 0100                .2byte  0x1\r
- 4783 08c6 55                  .byte   0x55\r
- 4784 08c7 7C020000            .4byte  .LVL107\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 115\r
-\r
-\r
- 4785 08cb 80020000            .4byte  .LVL108\r
- 4786 08cf 0100                .2byte  0x1\r
- 4787 08d1 57                  .byte   0x57\r
- 4788 08d2 3C030000            .4byte  .LVL139\r
- 4789 08d6 3E030000            .4byte  .LVL140\r
- 4790 08da 0100                .2byte  0x1\r
- 4791 08dc 56                  .byte   0x56\r
- 4792 08dd 3E030000            .4byte  .LVL140\r
- 4793 08e1 40030000            .4byte  .LVL141\r
- 4794 08e5 0600                .2byte  0x6\r
- 4795 08e7 77                  .byte   0x77\r
- 4796 08e8 00                  .sleb128 0\r
- 4797 08e9 75                  .byte   0x75\r
- 4798 08ea 00                  .sleb128 0\r
- 4799 08eb 22                  .byte   0x22\r
- 4800 08ec 9F                  .byte   0x9f\r
- 4801 08ed 42030000            .4byte  .LVL142\r
- 4802 08f1 46030000            .4byte  .LVL143\r
- 4803 08f5 0100                .2byte  0x1\r
- 4804 08f7 55                  .byte   0x55\r
- 4805 08f8 58030000            .4byte  .LVL147\r
- 4806 08fc 66030000            .4byte  .LVL148\r
- 4807 0900 0200                .2byte  0x2\r
- 4808 0902 30                  .byte   0x30\r
- 4809 0903 9F                  .byte   0x9f\r
- 4810 0904 66030000            .4byte  .LVL148\r
- 4811 0908 84030000            .4byte  .LFE64\r
- 4812 090c 0100                .2byte  0x1\r
- 4813 090e 57                  .byte   0x57\r
- 4814 090f 00000000            .4byte  0\r
- 4815 0913 00000000            .4byte  0\r
- 4816                  .LLST19:\r
- 4817 0917 00000000            .4byte  .LVL48\r
- 4818 091b 1A000000            .4byte  .LVL50\r
- 4819 091f 0200                .2byte  0x2\r
- 4820 0921 3A                  .byte   0x3a\r
- 4821 0922 9F                  .byte   0x9f\r
- 4822 0923 1A000000            .4byte  .LVL50\r
- 4823 0927 20000000            .4byte  .LVL51\r
- 4824 092b 0100                .2byte  0x1\r
- 4825 092d 59                  .byte   0x59\r
- 4826 092e 24000000            .4byte  .LVL52\r
- 4827 0932 26000000            .4byte  .LVL53\r
- 4828 0936 0100                .2byte  0x1\r
- 4829 0938 59                  .byte   0x59\r
- 4830 0939 40000000            .4byte  .LVL55\r
- 4831 093d 84030000            .4byte  .LFE64\r
- 4832 0941 0100                .2byte  0x1\r
- 4833 0943 59                  .byte   0x59\r
- 4834 0944 00000000            .4byte  0\r
- 4835 0948 00000000            .4byte  0\r
- 4836                  .LLST20:\r
- 4837 094c 00000000            .4byte  .LVL48\r
- 4838 0950 1A000000            .4byte  .LVL50\r
- 4839 0954 0200                .2byte  0x2\r
- 4840 0956 30                  .byte   0x30\r
- 4841 0957 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 116\r
-\r
-\r
- 4842 0958 DE000000            .4byte  .LVL72\r
- 4843 095c 42010000            .4byte  .LVL79\r
- 4844 0960 0100                .2byte  0x1\r
- 4845 0962 5A                  .byte   0x5a\r
- 4846 0963 40020000            .4byte  .LVL99\r
- 4847 0967 44020000            .4byte  .LVL100\r
- 4848 096b 0200                .2byte  0x2\r
- 4849 096d 31                  .byte   0x31\r
- 4850 096e 9F                  .byte   0x9f\r
- 4851 096f 44020000            .4byte  .LVL100\r
- 4852 0973 5C020000            .4byte  .LVL103\r
- 4853 0977 0100                .2byte  0x1\r
- 4854 0979 5A                  .byte   0x5a\r
- 4855 097a 42030000            .4byte  .LVL142\r
- 4856 097e 46030000            .4byte  .LVL143\r
- 4857 0982 0100                .2byte  0x1\r
- 4858 0984 5A                  .byte   0x5a\r
- 4859 0985 58030000            .4byte  .LVL147\r
- 4860 0989 84030000            .4byte  .LFE64\r
- 4861 098d 0100                .2byte  0x1\r
- 4862 098f 5A                  .byte   0x5a\r
- 4863 0990 00000000            .4byte  0\r
- 4864 0994 00000000            .4byte  0\r
- 4865                  .LLST21:\r
- 4866 0998 00000000            .4byte  .LVL48\r
- 4867 099c 1A000000            .4byte  .LVL50\r
- 4868 09a0 0200                .2byte  0x2\r
- 4869 09a2 30                  .byte   0x30\r
- 4870 09a3 9F                  .byte   0x9f\r
- 4871 09a4 DE000000            .4byte  .LVL72\r
- 4872 09a8 42010000            .4byte  .LVL79\r
- 4873 09ac 0100                .2byte  0x1\r
- 4874 09ae 56                  .byte   0x56\r
- 4875 09af 90020000            .4byte  .LVL110\r
- 4876 09b3 9A020000            .4byte  .LVL113\r
- 4877 09b7 0200                .2byte  0x2\r
- 4878 09b9 31                  .byte   0x31\r
- 4879 09ba 9F                  .byte   0x9f\r
- 4880 09bb 58030000            .4byte  .LVL147\r
- 4881 09bf 66030000            .4byte  .LVL148\r
- 4882 09c3 0200                .2byte  0x2\r
- 4883 09c5 31                  .byte   0x31\r
- 4884 09c6 9F                  .byte   0x9f\r
- 4885 09c7 66030000            .4byte  .LVL148\r
- 4886 09cb 84030000            .4byte  .LFE64\r
- 4887 09cf 0100                .2byte  0x1\r
- 4888 09d1 56                  .byte   0x56\r
- 4889 09d2 00000000            .4byte  0\r
- 4890 09d6 00000000            .4byte  0\r
- 4891                  .LLST22:\r
- 4892 09da 8C000000            .4byte  .LVL59\r
- 4893 09de 98000000            .4byte  .LVL61\r
- 4894 09e2 0100                .2byte  0x1\r
- 4895 09e4 53                  .byte   0x53\r
- 4896 09e5 98000000            .4byte  .LVL61\r
- 4897 09e9 9E000000            .4byte  .LVL64\r
- 4898 09ed 0300                .2byte  0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 117\r
-\r
-\r
- 4899 09ef 73                  .byte   0x73\r
- 4900 09f0 01                  .sleb128 1\r
- 4901 09f1 9F                  .byte   0x9f\r
- 4902 09f2 9E000000            .4byte  .LVL64\r
- 4903 09f6 B0000000            .4byte  .LVL68\r
- 4904 09fa 0100                .2byte  0x1\r
- 4905 09fc 53                  .byte   0x53\r
- 4906 09fd 46010000            .4byte  .LVL80\r
- 4907 0a01 52010000            .4byte  .LVL83\r
- 4908 0a05 0100                .2byte  0x1\r
- 4909 0a07 53                  .byte   0x53\r
- 4910 0a08 54030000            .4byte  .LVL145\r
- 4911 0a0c 58030000            .4byte  .LVL147\r
- 4912 0a10 0100                .2byte  0x1\r
- 4913 0a12 53                  .byte   0x53\r
- 4914 0a13 00000000            .4byte  0\r
- 4915 0a17 00000000            .4byte  0\r
- 4916                  .LLST23:\r
- 4917 0a1b 8C000000            .4byte  .LVL59\r
- 4918 0a1f DE000000            .4byte  .LVL72\r
- 4919 0a23 0400                .2byte  0x4\r
- 4920 0a25 91                  .byte   0x91\r
- 4921 0a26 807B                .sleb128 -640\r
- 4922 0a28 9F                  .byte   0x9f\r
- 4923 0a29 46010000            .4byte  .LVL80\r
- 4924 0a2d 48030000            .4byte  .LVL144\r
- 4925 0a31 0400                .2byte  0x4\r
- 4926 0a33 91                  .byte   0x91\r
- 4927 0a34 807B                .sleb128 -640\r
- 4928 0a36 9F                  .byte   0x9f\r
- 4929 0a37 54030000            .4byte  .LVL145\r
- 4930 0a3b 66030000            .4byte  .LVL148\r
- 4931 0a3f 0400                .2byte  0x4\r
- 4932 0a41 91                  .byte   0x91\r
- 4933 0a42 807B                .sleb128 -640\r
- 4934 0a44 9F                  .byte   0x9f\r
- 4935 0a45 00000000            .4byte  0\r
- 4936 0a49 00000000            .4byte  0\r
- 4937                  .LLST24:\r
- 4938 0a4d 8C000000            .4byte  .LVL59\r
- 4939 0a51 8E000000            .4byte  .LVL60\r
- 4940 0a55 0200                .2byte  0x2\r
- 4941 0a57 30                  .byte   0x30\r
- 4942 0a58 9F                  .byte   0x9f\r
- 4943 0a59 8E000000            .4byte  .LVL60\r
- 4944 0a5d 9A000000            .4byte  .LVL62\r
- 4945 0a61 0100                .2byte  0x1\r
- 4946 0a63 52                  .byte   0x52\r
- 4947 0a64 9C000000            .4byte  .LVL63\r
- 4948 0a68 A2000000            .4byte  .LVL65\r
- 4949 0a6c 0100                .2byte  0x1\r
- 4950 0a6e 52                  .byte   0x52\r
- 4951 0a6f A2000000            .4byte  .LVL65\r
- 4952 0a73 B0000000            .4byte  .LVL68\r
- 4953 0a77 0400                .2byte  0x4\r
- 4954 0a79 72                  .byte   0x72\r
- 4955 0a7a 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 118\r
-\r
-\r
- 4956 0a7b 1F                  .byte   0x1f\r
- 4957 0a7c 9F                  .byte   0x9f\r
- 4958 0a7d 46010000            .4byte  .LVL80\r
- 4959 0a81 4A010000            .4byte  .LVL81\r
- 4960 0a85 0400                .2byte  0x4\r
- 4961 0a87 72                  .byte   0x72\r
- 4962 0a88 00                  .sleb128 0\r
- 4963 0a89 1F                  .byte   0x1f\r
- 4964 0a8a 9F                  .byte   0x9f\r
- 4965 0a8b 54030000            .4byte  .LVL145\r
- 4966 0a8f 58030000            .4byte  .LVL147\r
- 4967 0a93 0400                .2byte  0x4\r
- 4968 0a95 72                  .byte   0x72\r
- 4969 0a96 00                  .sleb128 0\r
- 4970 0a97 1F                  .byte   0x1f\r
- 4971 0a98 9F                  .byte   0x9f\r
- 4972 0a99 00000000            .4byte  0\r
- 4973 0a9d 00000000            .4byte  0\r
- 4974                  .LLST25:\r
- 4975 0aa1 B0000000            .4byte  .LVL68\r
- 4976 0aa5 DE000000            .4byte  .LVL72\r
- 4977 0aa9 0300                .2byte  0x3\r
- 4978 0aab 91                  .byte   0x91\r
- 4979 0aac 847B                .sleb128 -636\r
- 4980 0aae 4E010000            .4byte  .LVL82\r
- 4981 0ab2 9B010000            .4byte  .LVL84-1\r
- 4982 0ab6 0300                .2byte  0x3\r
- 4983 0ab8 91                  .byte   0x91\r
- 4984 0ab9 847B                .sleb128 -636\r
- 4985 0abb 9B010000            .4byte  .LVL84-1\r
- 4986 0abf AA010000            .4byte  .LVL86\r
- 4987 0ac3 0100                .2byte  0x1\r
- 4988 0ac5 5B                  .byte   0x5b\r
- 4989 0ac6 AA010000            .4byte  .LVL86\r
- 4990 0aca D1010000            .4byte  .LVL88-1\r
- 4991 0ace 0300                .2byte  0x3\r
- 4992 0ad0 91                  .byte   0x91\r
- 4993 0ad1 847B                .sleb128 -636\r
- 4994 0ad3 D1010000            .4byte  .LVL88-1\r
- 4995 0ad7 D4010000            .4byte  .LVL89\r
- 4996 0adb 0100                .2byte  0x1\r
- 4997 0add 5B                  .byte   0x5b\r
- 4998 0ade D4010000            .4byte  .LVL89\r
- 4999 0ae2 E0010000            .4byte  .LVL90\r
- 5000 0ae6 0300                .2byte  0x3\r
- 5001 0ae8 91                  .byte   0x91\r
- 5002 0ae9 847B                .sleb128 -636\r
- 5003 0aeb E0010000            .4byte  .LVL90\r
- 5004 0aef 5C020000            .4byte  .LVL103\r
- 5005 0af3 0100                .2byte  0x1\r
- 5006 0af5 5B                  .byte   0x5b\r
- 5007 0af6 5C020000            .4byte  .LVL103\r
- 5008 0afa 76020000            .4byte  .LVL105\r
- 5009 0afe 0300                .2byte  0x3\r
- 5010 0b00 91                  .byte   0x91\r
- 5011 0b01 847B                .sleb128 -636\r
- 5012 0b03 76020000            .4byte  .LVL105\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 119\r
-\r
-\r
- 5013 0b07 79020000            .4byte  .LVL106-1\r
- 5014 0b0b 0200                .2byte  0x2\r
- 5015 0b0d 71                  .byte   0x71\r
- 5016 0b0e 00                  .sleb128 0\r
- 5017 0b0f 79020000            .4byte  .LVL106-1\r
- 5018 0b13 80020000            .4byte  .LVL108\r
- 5019 0b17 0100                .2byte  0x1\r
- 5020 0b19 5B                  .byte   0x5b\r
- 5021 0b1a 80020000            .4byte  .LVL108\r
- 5022 0b1e 8A020000            .4byte  .LVL109\r
- 5023 0b22 0300                .2byte  0x3\r
- 5024 0b24 91                  .byte   0x91\r
- 5025 0b25 847B                .sleb128 -636\r
- 5026 0b27 8A020000            .4byte  .LVL109\r
- 5027 0b2b 98020000            .4byte  .LVL112\r
- 5028 0b2f 0200                .2byte  0x2\r
- 5029 0b31 74                  .byte   0x74\r
- 5030 0b32 00                  .sleb128 0\r
- 5031 0b33 98020000            .4byte  .LVL112\r
- 5032 0b37 22030000            .4byte  .LVL132\r
- 5033 0b3b 0300                .2byte  0x3\r
- 5034 0b3d 91                  .byte   0x91\r
- 5035 0b3e 847B                .sleb128 -636\r
- 5036 0b40 22030000            .4byte  .LVL132\r
- 5037 0b44 26030000            .4byte  .LVL133\r
- 5038 0b48 0100                .2byte  0x1\r
- 5039 0b4a 5B                  .byte   0x5b\r
- 5040 0b4b 26030000            .4byte  .LVL133\r
- 5041 0b4f 29030000            .4byte  .LVL134-1\r
- 5042 0b53 0300                .2byte  0x3\r
- 5043 0b55 91                  .byte   0x91\r
- 5044 0b56 847B                .sleb128 -636\r
- 5045 0b58 29030000            .4byte  .LVL134-1\r
- 5046 0b5c 38030000            .4byte  .LVL137\r
- 5047 0b60 0100                .2byte  0x1\r
- 5048 0b62 5B                  .byte   0x5b\r
- 5049 0b63 38030000            .4byte  .LVL137\r
- 5050 0b67 3C030000            .4byte  .LVL139\r
- 5051 0b6b 0300                .2byte  0x3\r
- 5052 0b6d 91                  .byte   0x91\r
- 5053 0b6e 847B                .sleb128 -636\r
- 5054 0b70 3C030000            .4byte  .LVL139\r
- 5055 0b74 46030000            .4byte  .LVL143\r
- 5056 0b78 0100                .2byte  0x1\r
- 5057 0b7a 5B                  .byte   0x5b\r
- 5058 0b7b 46030000            .4byte  .LVL143\r
- 5059 0b7f 48030000            .4byte  .LVL144\r
- 5060 0b83 0300                .2byte  0x3\r
- 5061 0b85 91                  .byte   0x91\r
- 5062 0b86 847B                .sleb128 -636\r
- 5063 0b88 58030000            .4byte  .LVL147\r
- 5064 0b8c 66030000            .4byte  .LVL148\r
- 5065 0b90 0300                .2byte  0x3\r
- 5066 0b92 91                  .byte   0x91\r
- 5067 0b93 847B                .sleb128 -636\r
- 5068 0b95 00000000            .4byte  0\r
- 5069 0b99 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 120\r
-\r
-\r
- 5070                  .LLST26:\r
- 5071 0b9d C8000000            .4byte  .LVL69\r
- 5072 0ba1 DE000000            .4byte  .LVL72\r
- 5073 0ba5 0200                .2byte  0x2\r
- 5074 0ba7 30                  .byte   0x30\r
- 5075 0ba8 9F                  .byte   0x9f\r
- 5076 0ba9 00000000            .4byte  0\r
- 5077 0bad 00000000            .4byte  0\r
- 5078                  .LLST27:\r
- 5079 0bb1 B4020000            .4byte  .LVL114\r
- 5080 0bb5 B8020000            .4byte  .LVL115\r
- 5081 0bb9 0100                .2byte  0x1\r
- 5082 0bbb 55                  .byte   0x55\r
- 5083 0bbc B8020000            .4byte  .LVL115\r
- 5084 0bc0 BC020000            .4byte  .LVL116\r
- 5085 0bc4 0800                .2byte  0x8\r
- 5086 0bc6 70                  .byte   0x70\r
- 5087 0bc7 00                  .sleb128 0\r
- 5088 0bc8 38                  .byte   0x38\r
- 5089 0bc9 24                  .byte   0x24\r
- 5090 0bca 71                  .byte   0x71\r
- 5091 0bcb 00                  .sleb128 0\r
- 5092 0bcc 21                  .byte   0x21\r
- 5093 0bcd 9F                  .byte   0x9f\r
- 5094 0bce BC020000            .4byte  .LVL116\r
- 5095 0bd2 CC020000            .4byte  .LVL119\r
- 5096 0bd6 1400                .2byte  0x14\r
- 5097 0bd8 91                  .byte   0x91\r
- 5098 0bd9 867B                .sleb128 -634\r
- 5099 0bdb 94                  .byte   0x94\r
- 5100 0bdc 01                  .byte   0x1\r
- 5101 0bdd 08                  .byte   0x8\r
- 5102 0bde FF                  .byte   0xff\r
- 5103 0bdf 1A                  .byte   0x1a\r
- 5104 0be0 38                  .byte   0x38\r
- 5105 0be1 24                  .byte   0x24\r
- 5106 0be2 91                  .byte   0x91\r
- 5107 0be3 857B                .sleb128 -635\r
- 5108 0be5 94                  .byte   0x94\r
- 5109 0be6 01                  .byte   0x1\r
- 5110 0be7 08                  .byte   0x8\r
- 5111 0be8 FF                  .byte   0xff\r
- 5112 0be9 1A                  .byte   0x1a\r
- 5113 0bea 21                  .byte   0x21\r
- 5114 0beb 9F                  .byte   0x9f\r
- 5115 0bec CC020000            .4byte  .LVL119\r
- 5116 0bf0 0C030000            .4byte  .LVL128\r
- 5117 0bf4 0100                .2byte  0x1\r
- 5118 0bf6 55                  .byte   0x55\r
- 5119 0bf7 0C030000            .4byte  .LVL128\r
- 5120 0bfb 22030000            .4byte  .LVL132\r
- 5121 0bff 1400                .2byte  0x14\r
- 5122 0c01 91                  .byte   0x91\r
- 5123 0c02 867B                .sleb128 -634\r
- 5124 0c04 94                  .byte   0x94\r
- 5125 0c05 01                  .byte   0x1\r
- 5126 0c06 08                  .byte   0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 121\r
-\r
-\r
- 5127 0c07 FF                  .byte   0xff\r
- 5128 0c08 1A                  .byte   0x1a\r
- 5129 0c09 38                  .byte   0x38\r
- 5130 0c0a 24                  .byte   0x24\r
- 5131 0c0b 91                  .byte   0x91\r
- 5132 0c0c 857B                .sleb128 -635\r
- 5133 0c0e 94                  .byte   0x94\r
- 5134 0c0f 01                  .byte   0x1\r
- 5135 0c10 08                  .byte   0x8\r
- 5136 0c11 FF                  .byte   0xff\r
- 5137 0c12 1A                  .byte   0x1a\r
- 5138 0c13 21                  .byte   0x21\r
- 5139 0c14 9F                  .byte   0x9f\r
- 5140 0c15 00000000            .4byte  0\r
- 5141 0c19 00000000            .4byte  0\r
- 5142                  .LLST28:\r
- 5143 0c1d B8020000            .4byte  .LVL115\r
- 5144 0c21 CC020000            .4byte  .LVL119\r
- 5145 0c25 0100                .2byte  0x1\r
- 5146 0c27 55                  .byte   0x55\r
- 5147 0c28 D2020000            .4byte  .LVL120\r
- 5148 0c2c EE020000            .4byte  .LVL125\r
- 5149 0c30 0100                .2byte  0x1\r
- 5150 0c32 54                  .byte   0x54\r
- 5151 0c33 EE020000            .4byte  .LVL125\r
- 5152 0c37 F4020000            .4byte  .LVL126\r
- 5153 0c3b 0A00                .2byte  0xa\r
- 5154 0c3d 7B                  .byte   0x7b\r
- 5155 0c3e 00                  .sleb128 0\r
- 5156 0c3f 38                  .byte   0x38\r
- 5157 0c40 24                  .byte   0x24\r
- 5158 0c41 75                  .byte   0x75\r
- 5159 0c42 00                  .sleb128 0\r
- 5160 0c43 22                  .byte   0x22\r
- 5161 0c44 38                  .byte   0x38\r
- 5162 0c45 24                  .byte   0x24\r
- 5163 0c46 9F                  .byte   0x9f\r
- 5164 0c47 F4020000            .4byte  .LVL126\r
- 5165 0c4b 12030000            .4byte  .LVL129\r
- 5166 0c4f 0100                .2byte  0x1\r
- 5167 0c51 51                  .byte   0x51\r
- 5168 0c52 12030000            .4byte  .LVL129\r
- 5169 0c56 1A030000            .4byte  .LVL130\r
- 5170 0c5a 1D00                .2byte  0x1d\r
- 5171 0c5c 91                  .byte   0x91\r
- 5172 0c5d 867B                .sleb128 -634\r
- 5173 0c5f 94                  .byte   0x94\r
- 5174 0c60 01                  .byte   0x1\r
- 5175 0c61 08                  .byte   0x8\r
- 5176 0c62 FF                  .byte   0xff\r
- 5177 0c63 1A                  .byte   0x1a\r
- 5178 0c64 38                  .byte   0x38\r
- 5179 0c65 24                  .byte   0x24\r
- 5180 0c66 91                  .byte   0x91\r
- 5181 0c67 857B                .sleb128 -635\r
- 5182 0c69 94                  .byte   0x94\r
- 5183 0c6a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 122\r
-\r
-\r
- 5184 0c6b 08                  .byte   0x8\r
- 5185 0c6c FF                  .byte   0xff\r
- 5186 0c6d 1A                  .byte   0x1a\r
- 5187 0c6e 21                  .byte   0x21\r
- 5188 0c6f 7B                  .byte   0x7b\r
- 5189 0c70 808009              .sleb128 147456\r
- 5190 0c73 38                  .byte   0x38\r
- 5191 0c74 24                  .byte   0x24\r
- 5192 0c75 22                  .byte   0x22\r
- 5193 0c76 35                  .byte   0x35\r
- 5194 0c77 24                  .byte   0x24\r
- 5195 0c78 9F                  .byte   0x9f\r
- 5196 0c79 00000000            .4byte  0\r
- 5197 0c7d 00000000            .4byte  0\r
- 5198                  .LLST29:\r
- 5199 0c81 E4020000            .4byte  .LVL124\r
- 5200 0c85 F4020000            .4byte  .LVL126\r
- 5201 0c89 0100                .2byte  0x1\r
- 5202 0c8b 51                  .byte   0x51\r
- 5203 0c8c FE020000            .4byte  .LVL127\r
- 5204 0c90 12030000            .4byte  .LVL129\r
- 5205 0c94 0100                .2byte  0x1\r
- 5206 0c96 53                  .byte   0x53\r
- 5207 0c97 12030000            .4byte  .LVL129\r
- 5208 0c9b 1A030000            .4byte  .LVL130\r
- 5209 0c9f 0100                .2byte  0x1\r
- 5210 0ca1 51                  .byte   0x51\r
- 5211 0ca2 1A030000            .4byte  .LVL130\r
- 5212 0ca6 22030000            .4byte  .LVL132\r
- 5213 0caa 0100                .2byte  0x1\r
- 5214 0cac 53                  .byte   0x53\r
- 5215 0cad 00000000            .4byte  0\r
- 5216 0cb1 00000000            .4byte  0\r
- 5217                  .LLST30:\r
- 5218 0cb5 B8020000            .4byte  .LVL115\r
- 5219 0cb9 CC020000            .4byte  .LVL119\r
- 5220 0cbd 0100                .2byte  0x1\r
- 5221 0cbf 55                  .byte   0x55\r
- 5222 0cc0 00000000            .4byte  0\r
- 5223 0cc4 00000000            .4byte  0\r
- 5224                  .LLST31:\r
- 5225 0cc8 B8020000            .4byte  .LVL115\r
- 5226 0ccc BC020000            .4byte  .LVL116\r
- 5227 0cd0 0200                .2byte  0x2\r
- 5228 0cd2 30                  .byte   0x30\r
- 5229 0cd3 9F                  .byte   0x9f\r
- 5230 0cd4 C8020000            .4byte  .LVL118\r
- 5231 0cd8 CC020000            .4byte  .LVL119\r
- 5232 0cdc 0100                .2byte  0x1\r
- 5233 0cde 53                  .byte   0x53\r
- 5234 0cdf 00000000            .4byte  0\r
- 5235 0ce3 00000000            .4byte  0\r
- 5236                  .LLST32:\r
- 5237 0ce7 B8020000            .4byte  .LVL115\r
- 5238 0ceb BC020000            .4byte  .LVL116\r
- 5239 0cef 0200                .2byte  0x2\r
- 5240 0cf1 40                  .byte   0x40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 123\r
-\r
-\r
- 5241 0cf2 9F                  .byte   0x9f\r
- 5242 0cf3 BC020000            .4byte  .LVL116\r
- 5243 0cf7 C4020000            .4byte  .LVL117\r
- 5244 0cfb 0300                .2byte  0x3\r
- 5245 0cfd 72                  .byte   0x72\r
- 5246 0cfe 7F                  .sleb128 -1\r
- 5247 0cff 9F                  .byte   0x9f\r
- 5248 0d00 C4020000            .4byte  .LVL117\r
- 5249 0d04 C8020000            .4byte  .LVL118\r
- 5250 0d08 0100                .2byte  0x1\r
- 5251 0d0a 52                  .byte   0x52\r
- 5252 0d0b 00000000            .4byte  0\r
- 5253 0d0f 00000000            .4byte  0\r
- 5254                  .LLST33:\r
- 5255 0d13 D2020000            .4byte  .LVL120\r
- 5256 0d17 D8020000            .4byte  .LVL121\r
- 5257 0d1b 0400                .2byte  0x4\r
- 5258 0d1d 0A                  .byte   0xa\r
- 5259 0d1e 0001                .2byte  0x100\r
- 5260 0d20 9F                  .byte   0x9f\r
- 5261 0d21 DA020000            .4byte  .LVL122\r
- 5262 0d25 F4020000            .4byte  .LVL126\r
- 5263 0d29 0100                .2byte  0x1\r
- 5264 0d2b 52                  .byte   0x52\r
- 5265 0d2c 00000000            .4byte  0\r
- 5266 0d30 00000000            .4byte  0\r
- 5267                  .LLST34:\r
- 5268 0d34 D2020000            .4byte  .LVL120\r
- 5269 0d38 EE020000            .4byte  .LVL125\r
- 5270 0d3c 0100                .2byte  0x1\r
- 5271 0d3e 54                  .byte   0x54\r
- 5272 0d3f EE020000            .4byte  .LVL125\r
- 5273 0d43 0C030000            .4byte  .LVL128\r
- 5274 0d47 0A00                .2byte  0xa\r
- 5275 0d49 7B                  .byte   0x7b\r
- 5276 0d4a 00                  .sleb128 0\r
- 5277 0d4b 38                  .byte   0x38\r
- 5278 0d4c 24                  .byte   0x24\r
- 5279 0d4d 75                  .byte   0x75\r
- 5280 0d4e 00                  .sleb128 0\r
- 5281 0d4f 22                  .byte   0x22\r
- 5282 0d50 38                  .byte   0x38\r
- 5283 0d51 24                  .byte   0x24\r
- 5284 0d52 9F                  .byte   0x9f\r
- 5285 0d53 0C030000            .4byte  .LVL128\r
- 5286 0d57 1A030000            .4byte  .LVL130\r
- 5287 0d5b 1B00                .2byte  0x1b\r
- 5288 0d5d 91                  .byte   0x91\r
- 5289 0d5e 867B                .sleb128 -634\r
- 5290 0d60 94                  .byte   0x94\r
- 5291 0d61 01                  .byte   0x1\r
- 5292 0d62 08                  .byte   0x8\r
- 5293 0d63 FF                  .byte   0xff\r
- 5294 0d64 1A                  .byte   0x1a\r
- 5295 0d65 38                  .byte   0x38\r
- 5296 0d66 24                  .byte   0x24\r
- 5297 0d67 91                  .byte   0x91\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 124\r
-\r
-\r
- 5298 0d68 857B                .sleb128 -635\r
- 5299 0d6a 94                  .byte   0x94\r
- 5300 0d6b 01                  .byte   0x1\r
- 5301 0d6c 08                  .byte   0x8\r
- 5302 0d6d FF                  .byte   0xff\r
- 5303 0d6e 1A                  .byte   0x1a\r
- 5304 0d6f 21                  .byte   0x21\r
- 5305 0d70 7B                  .byte   0x7b\r
- 5306 0d71 00                  .sleb128 0\r
- 5307 0d72 38                  .byte   0x38\r
- 5308 0d73 24                  .byte   0x24\r
- 5309 0d74 22                  .byte   0x22\r
- 5310 0d75 38                  .byte   0x38\r
- 5311 0d76 24                  .byte   0x24\r
- 5312 0d77 9F                  .byte   0x9f\r
- 5313 0d78 00000000            .4byte  0\r
- 5314 0d7c 00000000            .4byte  0\r
- 5315                  .LLST35:\r
- 5316 0d80 D2020000            .4byte  .LVL120\r
- 5317 0d84 D8020000            .4byte  .LVL121\r
- 5318 0d88 0200                .2byte  0x2\r
- 5319 0d8a 30                  .byte   0x30\r
- 5320 0d8b 9F                  .byte   0x9f\r
- 5321 0d8c E0020000            .4byte  .LVL123\r
- 5322 0d90 F4020000            .4byte  .LVL126\r
- 5323 0d94 0100                .2byte  0x1\r
- 5324 0d96 51                  .byte   0x51\r
- 5325 0d97 00000000            .4byte  0\r
- 5326 0d9b 00000000            .4byte  0\r
- 5327                  .LLST36:\r
- 5328 0d9f DE000000            .4byte  .LVL72\r
- 5329 0da3 28010000            .4byte  .LVL77\r
- 5330 0da7 0400                .2byte  0x4\r
- 5331 0da9 91                  .byte   0x91\r
- 5332 0daa 807B                .sleb128 -640\r
- 5333 0dac 9F                  .byte   0x9f\r
- 5334 0dad 28010000            .4byte  .LVL77\r
- 5335 0db1 33010000            .4byte  .LVL78-1\r
- 5336 0db5 0100                .2byte  0x1\r
- 5337 0db7 50                  .byte   0x50\r
- 5338 0db8 33010000            .4byte  .LVL78-1\r
- 5339 0dbc 34010000            .4byte  .LVL78\r
- 5340 0dc0 0400                .2byte  0x4\r
- 5341 0dc2 91                  .byte   0x91\r
- 5342 0dc3 807B                .sleb128 -640\r
- 5343 0dc5 9F                  .byte   0x9f\r
- 5344 0dc6 00000000            .4byte  0\r
- 5345 0dca 00000000            .4byte  0\r
- 5346                  .LLST37:\r
- 5347 0dce DE000000            .4byte  .LVL72\r
- 5348 0dd2 34010000            .4byte  .LVL78\r
- 5349 0dd6 0100                .2byte  0x1\r
- 5350 0dd8 55                  .byte   0x55\r
- 5351 0dd9 00000000            .4byte  0\r
- 5352 0ddd 00000000            .4byte  0\r
- 5353                  .LLST38:\r
- 5354 0de1 08010000            .4byte  .LVL74\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 125\r
-\r
-\r
- 5355 0de5 18010000            .4byte  .LVL76\r
- 5356 0de9 0100                .2byte  0x1\r
- 5357 0deb 53                  .byte   0x53\r
- 5358 0dec 00000000            .4byte  0\r
- 5359 0df0 00000000            .4byte  0\r
- 5360                  .LLST39:\r
- 5361 0df4 FA000000            .4byte  .LVL73\r
- 5362 0df8 28010000            .4byte  .LVL77\r
- 5363 0dfc 0400                .2byte  0x4\r
- 5364 0dfe 91                  .byte   0x91\r
- 5365 0dff 807B                .sleb128 -640\r
- 5366 0e01 9F                  .byte   0x9f\r
- 5367 0e02 28010000            .4byte  .LVL77\r
- 5368 0e06 33010000            .4byte  .LVL78-1\r
- 5369 0e0a 0100                .2byte  0x1\r
- 5370 0e0c 50                  .byte   0x50\r
- 5371 0e0d 33010000            .4byte  .LVL78-1\r
- 5372 0e11 34010000            .4byte  .LVL78\r
- 5373 0e15 0400                .2byte  0x4\r
- 5374 0e17 91                  .byte   0x91\r
- 5375 0e18 807B                .sleb128 -640\r
- 5376 0e1a 9F                  .byte   0x9f\r
- 5377 0e1b 00000000            .4byte  0\r
- 5378 0e1f 00000000            .4byte  0\r
- 5379                  .LLST40:\r
- 5380 0e23 08010000            .4byte  .LVL74\r
- 5381 0e27 14010000            .4byte  .LVL75\r
- 5382 0e2b 0100                .2byte  0x1\r
- 5383 0e2d 52                  .byte   0x52\r
- 5384 0e2e 00000000            .4byte  0\r
- 5385 0e32 00000000            .4byte  0\r
- 5386                  .LLST41:\r
- 5387 0e36 00000000            .4byte  .LFB59\r
- 5388 0e3a 02000000            .4byte  .LCFI4\r
- 5389 0e3e 0200                .2byte  0x2\r
- 5390 0e40 7D                  .byte   0x7d\r
- 5391 0e41 00                  .sleb128 0\r
- 5392 0e42 02000000            .4byte  .LCFI4\r
- 5393 0e46 04000000            .4byte  .LCFI5\r
- 5394 0e4a 0200                .2byte  0x2\r
- 5395 0e4c 7D                  .byte   0x7d\r
- 5396 0e4d 08                  .sleb128 8\r
- 5397 0e4e 04000000            .4byte  .LCFI5\r
- 5398 0e52 80000000            .4byte  .LFE59\r
- 5399 0e56 0300                .2byte  0x3\r
- 5400 0e58 7D                  .byte   0x7d\r
- 5401 0e59 A802                .sleb128 296\r
- 5402 0e5b 00000000            .4byte  0\r
- 5403 0e5f 00000000            .4byte  0\r
- 5404                  .LLST42:\r
- 5405 0e63 38000000            .4byte  .LVL157\r
- 5406 0e67 3E000000            .4byte  .LVL158\r
- 5407 0e6b 0700                .2byte  0x7\r
- 5408 0e6d 73                  .byte   0x73\r
- 5409 0e6e 00                  .sleb128 0\r
- 5410 0e6f 70                  .byte   0x70\r
- 5411 0e70 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 126\r
-\r
-\r
- 5412 0e71 1C                  .byte   0x1c\r
- 5413 0e72 1F                  .byte   0x1f\r
- 5414 0e73 9F                  .byte   0x9f\r
- 5415 0e74 00000000            .4byte  0\r
- 5416 0e78 00000000            .4byte  0\r
- 5417                  .LLST43:\r
- 5418 0e7c 50000000            .4byte  .LVL160\r
- 5419 0e80 5E000000            .4byte  .LVL161\r
- 5420 0e84 0100                .2byte  0x1\r
- 5421 0e86 50                  .byte   0x50\r
- 5422 0e87 00000000            .4byte  0\r
- 5423 0e8b 00000000            .4byte  0\r
- 5424                  .LLST44:\r
- 5425 0e8f 24000000            .4byte  .LVL153\r
- 5426 0e93 28000000            .4byte  .LVL154\r
- 5427 0e97 0100                .2byte  0x1\r
- 5428 0e99 51                  .byte   0x51\r
- 5429 0e9a 00000000            .4byte  0\r
- 5430 0e9e 00000000            .4byte  0\r
- 5431                  .LLST45:\r
- 5432 0ea2 24000000            .4byte  .LVL153\r
- 5433 0ea6 28000000            .4byte  .LVL154\r
- 5434 0eaa 0200                .2byte  0x2\r
- 5435 0eac 30                  .byte   0x30\r
- 5436 0ead 9F                  .byte   0x9f\r
- 5437 0eae 28000000            .4byte  .LVL154\r
- 5438 0eb2 30000000            .4byte  .LVL155\r
- 5439 0eb6 0100                .2byte  0x1\r
- 5440 0eb8 53                  .byte   0x53\r
- 5441 0eb9 32000000            .4byte  .LVL156\r
- 5442 0ebd 3E000000            .4byte  .LVL158\r
- 5443 0ec1 0100                .2byte  0x1\r
- 5444 0ec3 53                  .byte   0x53\r
- 5445 0ec4 00000000            .4byte  0\r
- 5446 0ec8 00000000            .4byte  0\r
- 5447                  .LLST46:\r
- 5448 0ecc 00000000            .4byte  .LFB61\r
- 5449 0ed0 02000000            .4byte  .LCFI6\r
- 5450 0ed4 0200                .2byte  0x2\r
- 5451 0ed6 7D                  .byte   0x7d\r
- 5452 0ed7 00                  .sleb128 0\r
- 5453 0ed8 02000000            .4byte  .LCFI6\r
- 5454 0edc 30000000            .4byte  .LFE61\r
- 5455 0ee0 0200                .2byte  0x2\r
- 5456 0ee2 7D                  .byte   0x7d\r
- 5457 0ee3 08                  .sleb128 8\r
- 5458 0ee4 00000000            .4byte  0\r
- 5459 0ee8 00000000            .4byte  0\r
- 5460                  .LLST47:\r
- 5461 0eec 00000000            .4byte  .LFB66\r
- 5462 0ef0 02000000            .4byte  .LCFI7\r
- 5463 0ef4 0200                .2byte  0x2\r
- 5464 0ef6 7D                  .byte   0x7d\r
- 5465 0ef7 00                  .sleb128 0\r
- 5466 0ef8 02000000            .4byte  .LCFI7\r
- 5467 0efc 08000000            .4byte  .LCFI8\r
- 5468 0f00 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 127\r
-\r
-\r
- 5469 0f02 7D                  .byte   0x7d\r
- 5470 0f03 10                  .sleb128 16\r
- 5471 0f04 08000000            .4byte  .LCFI8\r
- 5472 0f08 34000000            .4byte  .LFE66\r
- 5473 0f0c 0300                .2byte  0x3\r
- 5474 0f0e 7D                  .byte   0x7d\r
- 5475 0f0f 9002                .sleb128 272\r
- 5476 0f11 00000000            .4byte  0\r
- 5477 0f15 00000000            .4byte  0\r
- 5478                  .LLST48:\r
- 5479 0f19 00000000            .4byte  .LVL168\r
- 5480 0f1d 22000000            .4byte  .LVL172\r
- 5481 0f21 0100                .2byte  0x1\r
- 5482 0f23 50                  .byte   0x50\r
- 5483 0f24 22000000            .4byte  .LVL172\r
- 5484 0f28 34000000            .4byte  .LFE66\r
- 5485 0f2c 0400                .2byte  0x4\r
- 5486 0f2e F3                  .byte   0xf3\r
- 5487 0f2f 01                  .uleb128 0x1\r
- 5488 0f30 50                  .byte   0x50\r
- 5489 0f31 9F                  .byte   0x9f\r
- 5490 0f32 00000000            .4byte  0\r
- 5491 0f36 00000000            .4byte  0\r
- 5492                  .LLST49:\r
- 5493 0f3a 00000000            .4byte  .LVL168\r
- 5494 0f3e 28000000            .4byte  .LVL173\r
- 5495 0f42 0100                .2byte  0x1\r
- 5496 0f44 51                  .byte   0x51\r
- 5497 0f45 28000000            .4byte  .LVL173\r
- 5498 0f49 2A000000            .4byte  .LVL174\r
- 5499 0f4d 0900                .2byte  0x9\r
- 5500 0f4f 91                  .byte   0x91\r
- 5501 0f50 00                  .sleb128 0\r
- 5502 0f51 70                  .byte   0x70\r
- 5503 0f52 00                  .sleb128 0\r
- 5504 0f53 22                  .byte   0x22\r
- 5505 0f54 0A                  .byte   0xa\r
- 5506 0f55 1001                .2byte  0x110\r
- 5507 0f57 1C                  .byte   0x1c\r
- 5508 0f58 2A000000            .4byte  .LVL174\r
- 5509 0f5c 34000000            .4byte  .LFE66\r
- 5510 0f60 0400                .2byte  0x4\r
- 5511 0f62 F3                  .byte   0xf3\r
- 5512 0f63 01                  .uleb128 0x1\r
- 5513 0f64 51                  .byte   0x51\r
- 5514 0f65 9F                  .byte   0x9f\r
- 5515 0f66 00000000            .4byte  0\r
- 5516 0f6a 00000000            .4byte  0\r
- 5517                  .LLST51:\r
- 5518 0f6e 0C000000            .4byte  .LVL169\r
- 5519 0f72 2C000000            .4byte  .LVL175\r
- 5520 0f76 0100                .2byte  0x1\r
- 5521 0f78 52                  .byte   0x52\r
- 5522 0f79 2C000000            .4byte  .LVL175\r
- 5523 0f7d 2F000000            .4byte  .LVL176-1\r
- 5524 0f81 0100                .2byte  0x1\r
- 5525 0f83 51                  .byte   0x51\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 128\r
-\r
-\r
- 5526 0f84 2F000000            .4byte  .LVL176-1\r
- 5527 0f88 34000000            .4byte  .LFE66\r
- 5528 0f8c 0A00                .2byte  0xa\r
- 5529 0f8e F3                  .byte   0xf3\r
- 5530 0f8f 01                  .uleb128 0x1\r
- 5531 0f90 50                  .byte   0x50\r
- 5532 0f91 09                  .byte   0x9\r
- 5533 0f92 F4                  .byte   0xf4\r
- 5534 0f93 24                  .byte   0x24\r
- 5535 0f94 09                  .byte   0x9\r
- 5536 0f95 FC                  .byte   0xfc\r
- 5537 0f96 25                  .byte   0x25\r
- 5538 0f97 9F                  .byte   0x9f\r
- 5539 0f98 00000000            .4byte  0\r
- 5540 0f9c 00000000            .4byte  0\r
- 5541                  .LLST52:\r
- 5542 0fa0 10000000            .4byte  .LVL170\r
- 5543 0fa4 12000000            .4byte  .LVL171\r
- 5544 0fa8 0200                .2byte  0x2\r
- 5545 0faa 30                  .byte   0x30\r
- 5546 0fab 9F                  .byte   0x9f\r
- 5547 0fac 00000000            .4byte  0\r
- 5548 0fb0 00000000            .4byte  0\r
- 5549                          .section        .debug_aranges,"",%progbits\r
- 5550 0000 4C000000            .4byte  0x4c\r
- 5551 0004 0200                .2byte  0x2\r
- 5552 0006 00000000            .4byte  .Ldebug_info0\r
- 5553 000a 04                  .byte   0x4\r
- 5554 000b 00                  .byte   0\r
- 5555 000c 0000                .2byte  0\r
- 5556 000e 0000                .2byte  0\r
- 5557 0010 00000000            .4byte  .LFB62\r
- 5558 0014 02000000            .4byte  .LFE62-.LFB62\r
- 5559 0018 00000000            .4byte  .LFB69\r
- 5560 001c 8C000000            .4byte  .LFE69-.LFB69\r
- 5561 0020 00000000            .4byte  .LFB70\r
- 5562 0024 84000000            .4byte  .LFE70-.LFB70\r
- 5563 0028 00000000            .4byte  .LFB64\r
- 5564 002c 84030000            .4byte  .LFE64-.LFB64\r
- 5565 0030 00000000            .4byte  .LFB59\r
- 5566 0034 80000000            .4byte  .LFE59-.LFB59\r
- 5567 0038 00000000            .4byte  .LFB61\r
- 5568 003c 30000000            .4byte  .LFE61-.LFB61\r
- 5569 0040 00000000            .4byte  .LFB66\r
- 5570 0044 34000000            .4byte  .LFE66-.LFB66\r
- 5571 0048 00000000            .4byte  0\r
- 5572 004c 00000000            .4byte  0\r
- 5573                          .section        .debug_ranges,"",%progbits\r
- 5574                  .Ldebug_ranges0:\r
- 5575 0000 B0000000            .4byte  .LBB22\r
- 5576 0004 DE000000            .4byte  .LBE22\r
- 5577 0008 46010000            .4byte  .LBB36\r
- 5578 000c 4C030000            .4byte  .LBE36\r
- 5579 0010 00000000            .4byte  0\r
- 5580 0014 00000000            .4byte  0\r
- 5581 0018 00000000            .4byte  .LFB62\r
- 5582 001c 02000000            .4byte  .LFE62\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 129\r
-\r
-\r
- 5583 0020 00000000            .4byte  .LFB69\r
- 5584 0024 8C000000            .4byte  .LFE69\r
- 5585 0028 00000000            .4byte  .LFB70\r
- 5586 002c 84000000            .4byte  .LFE70\r
- 5587 0030 00000000            .4byte  .LFB64\r
- 5588 0034 84030000            .4byte  .LFE64\r
- 5589 0038 00000000            .4byte  .LFB59\r
- 5590 003c 80000000            .4byte  .LFE59\r
- 5591 0040 00000000            .4byte  .LFB61\r
- 5592 0044 30000000            .4byte  .LFE61\r
- 5593 0048 00000000            .4byte  .LFB66\r
- 5594 004c 34000000            .4byte  .LFE66\r
- 5595 0050 00000000            .4byte  0\r
- 5596 0054 00000000            .4byte  0\r
- 5597                          .section        .debug_line,"",%progbits\r
- 5598                  .Ldebug_line0:\r
- 5599 0000 D2030000            .section        .debug_str,"MS",%progbits,1\r
- 5599      02002401 \r
- 5599      00000201 \r
- 5599      FB0E0D00 \r
- 5599      01010101 \r
- 5600                  .LASF33:\r
- 5601 0000 76616C69            .ascii  "valid\000"\r
- 5601      6400\r
- 5602                  .LASF39:\r
- 5603 0006 424C5F57            .ascii  "BL_WritePacket\000"\r
- 5603      72697465 \r
- 5603      5061636B \r
- 5603      657400\r
- 5604                  .LASF28:\r
- 5605 0015 61707049            .ascii  "appId\000"\r
- 5605      6400\r
- 5606                  .LASF31:\r
- 5607 001b 72657375            .ascii  "result\000"\r
- 5607      6C7400\r
- 5608                  .LASF66:\r
- 5609 0022 746D7053            .ascii  "tmpStatus\000"\r
- 5609      74617475 \r
- 5609      7300\r
- 5610                  .LASF75:\r
- 5611 002c 62617365            .ascii  "baseAddr\000"\r
- 5611      41646472 \r
- 5611      00\r
- 5612                  .LASF84:\r
- 5613 0035 4379536F            .ascii  "CySoftwareReset\000"\r
- 5613      66747761 \r
- 5613      72655265 \r
- 5613      73657400 \r
- 5614                  .LASF51:\r
- 5615 0045 706B7453            .ascii  "pktSize\000"\r
- 5615      697A6500 \r
- 5616                  .LASF44:\r
- 5617 004d 61707041            .ascii  "appAddr\000"\r
- 5617      64647200 \r
- 5618                  .LASF73:\r
- 5619 0055 726F7744            .ascii  "rowData\000"\r
- 5619      61746100 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 130\r
-\r
-\r
- 5620                  .LASF2:\r
- 5621 005d 73686F72            .ascii  "short int\000"\r
- 5621      7420696E \r
- 5621      7400\r
- 5622                  .LASF65:\r
- 5623 0067 424C5F66            .ascii  "BL_flashBuffer\000"\r
- 5623      6C617368 \r
- 5623      42756666 \r
- 5623      657200\r
- 5624                  .LASF48:\r
- 5625 0076 61636B43            .ascii  "ackCode\000"\r
- 5625      6F646500 \r
- 5626                  .LASF21:\r
- 5627 007e 73697A65            .ascii  "sizetype\000"\r
- 5627      74797065 \r
- 5627      00\r
- 5628                  .LASF59:\r
- 5629 0087 73746172            .ascii  "startRow\000"\r
- 5629      74526F77 \r
- 5629      00\r
- 5630                  .LASF58:\r
- 5631 0090 62746C64            .ascii  "btldrData\000"\r
- 5631      72446174 \r
- 5631      6100\r
- 5632                  .LASF52:\r
- 5633 009a 64617461            .ascii  "dataOffset\000"\r
- 5633      4F666673 \r
- 5633      657400\r
- 5634                  .LASF79:\r
- 5635 00a5 424C5F53            .ascii  "BL_SizeBytesAccess\000"\r
- 5635      697A6542 \r
- 5635      79746573 \r
- 5635      41636365 \r
- 5635      737300\r
- 5636                  .LASF61:\r
- 5637 00b8 42746C64            .ascii  "BtldrVersion\000"\r
- 5637      72566572 \r
- 5637      73696F6E \r
- 5637      00\r
- 5638                  .LASF86:\r
- 5639 00c5 55534246            .ascii  "USBFS_CyBtldrCommWrite\000"\r
- 5639      535F4379 \r
- 5639      42746C64 \r
- 5639      72436F6D \r
- 5639      6D577269 \r
- 5640                  .LASF82:\r
- 5641 00dc 6D656D63            .ascii  "memcpy\000"\r
- 5641      707900\r
- 5642                  .LASF71:\r
- 5643 00e3 72756E54            .ascii  "runType\000"\r
- 5643      79706500 \r
- 5644                  .LASF11:\r
- 5645 00eb 75696E74            .ascii  "uint16\000"\r
- 5645      313600\r
- 5646                  .LASF41:\r
- 5647 00f2 63686563            .ascii  "checksum\000"\r
- 5647      6B73756D \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 131\r
-\r
-\r
- 5647      00\r
- 5648                  .LASF32:\r
- 5649 00fb 424C5F56            .ascii  "BL_ValidateBootloadable\000"\r
- 5649      616C6964 \r
- 5649      61746542 \r
- 5649      6F6F746C \r
- 5649      6F616461 \r
- 5650                  .LASF94:\r
- 5651 0113 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 5651      43534932 \r
- 5651      53445C73 \r
- 5651      6F667477 \r
- 5651      6172655C \r
- 5652 0142 6E00                .ascii  "n\000"\r
- 5653                  .LASF10:\r
- 5654 0144 75696E74            .ascii  "uint8\000"\r
- 5654      3800\r
- 5655                  .LASF96:\r
- 5656 014a 43795365            .ascii  "CySetTemp\000"\r
- 5656      7454656D \r
- 5656      7000\r
- 5657                  .LASF67:\r
- 5658 0154 424C5F53            .ascii  "BL_Start\000"\r
- 5658      74617274 \r
- 5658      00\r
- 5659                  .LASF20:\r
- 5660 015d 426F6F74            .ascii  "BootLoaderVersion\000"\r
- 5660      4C6F6164 \r
- 5660      65725665 \r
- 5660      7273696F \r
- 5660      6E00\r
- 5661                  .LASF0:\r
- 5662 016f 7369676E            .ascii  "signed char\000"\r
- 5662      65642063 \r
- 5662      68617200 \r
- 5663                  .LASF13:\r
- 5664 017b 666C6F61            .ascii  "float\000"\r
- 5664      7400\r
- 5665                  .LASF6:\r
- 5666 0181 6C6F6E67            .ascii  "long long int\000"\r
- 5666      206C6F6E \r
- 5666      6720696E \r
- 5666      7400\r
- 5667                  .LASF81:\r
- 5668 018f 6D656D73            .ascii  "memset\000"\r
- 5668      657400\r
- 5669                  .LASF15:\r
- 5670 0196 63686172            .ascii  "char\000"\r
- 5670      00\r
- 5671                  .LASF25:\r
- 5672 019b 424C5F43            .ascii  "BL_Calc8BitEepromSum\000"\r
- 5672      616C6338 \r
- 5672      42697445 \r
- 5672      6570726F \r
- 5672      6D53756D \r
- 5673                  .LASF72:\r
- 5674 01b0 666C7341            .ascii  "flsAddr\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 132\r
-\r
-\r
- 5674      64647200 \r
- 5675                  .LASF70:\r
- 5676 01b8 61646472            .ascii  "address\000"\r
- 5676      65737300 \r
- 5677                  .LASF35:\r
- 5678 01c0 63757242            .ascii  "curByte\000"\r
- 5678      79746500 \r
- 5679                  .LASF64:\r
- 5680 01c8 746D7049            .ascii  "tmpIndex\000"\r
- 5680      6E646578 \r
- 5680      00\r
- 5681                  .LASF46:\r
- 5682 01d1 6E756D62            .ascii  "numberRead\000"\r
- 5682      65725265 \r
- 5682      616400\r
- 5683                  .LASF34:\r
- 5684 01dc 63616C63            .ascii  "calcedChecksum\000"\r
- 5684      65644368 \r
- 5684      65636B73 \r
- 5684      756D00\r
- 5685                  .LASF43:\r
- 5686 01eb 424C5F48            .ascii  "BL_HostLink\000"\r
- 5686      6F73744C \r
- 5686      696E6B00 \r
- 5687                  .LASF55:\r
- 5688 01f7 636F6D6D            .ascii  "communicationState\000"\r
- 5688      756E6963 \r
- 5688      6174696F \r
- 5688      6E537461 \r
- 5688      746500\r
- 5689                  .LASF92:\r
- 5690 020a 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 5690      4320342E \r
- 5690      372E3320 \r
- 5690      32303133 \r
- 5690      30333132 \r
- 5691 023d 616E6368            .ascii  "anch revision 196615]\000"\r
- 5691      20726576 \r
- 5691      6973696F \r
- 5691      6E203139 \r
- 5691      36363135 \r
- 5692                  .LASF93:\r
- 5693 0253 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\BL.c\000"\r
- 5693      6E657261 \r
- 5693      7465645F \r
- 5693      536F7572 \r
- 5693      63655C50 \r
- 5694                  .LASF54:\r
- 5695 0271 636C6561            .ascii  "clearedMetaData\000"\r
- 5695      7265644D \r
- 5695      65746144 \r
- 5695      61746100 \r
- 5696                  .LASF29:\r
- 5697 0281 6669656C            .ascii  "fieldPtr\000"\r
- 5697      64507472 \r
- 5697      00\r
- 5698                  .LASF53:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 133\r
-\r
-\r
- 5699 028a 74696D65            .ascii  "timeOutCnt\000"\r
- 5699      4F757443 \r
- 5699      6E7400\r
- 5700                  .LASF95:\r
- 5701 0295 424C5F4C            .ascii  "BL_LaunchApplication\000"\r
- 5701      61756E63 \r
- 5701      68417070 \r
- 5701      6C696361 \r
- 5701      74696F6E \r
- 5702                  .LASF23:\r
- 5703 02aa 73746172            .ascii  "start\000"\r
- 5703      7400\r
- 5704                  .LASF1:\r
- 5705 02b0 756E7369            .ascii  "unsigned char\000"\r
- 5705      676E6564 \r
- 5705      20636861 \r
- 5705      7200\r
- 5706                  .LASF57:\r
- 5707 02be 64617461            .ascii  "dataBuffer\000"\r
- 5707      42756666 \r
- 5707      657200\r
- 5708                  .LASF83:\r
- 5709 02c9 43794545            .ascii  "CyEEPROM_Start\000"\r
- 5709      50524F4D \r
- 5709      5F537461 \r
- 5709      727400\r
- 5710                  .LASF89:\r
- 5711 02d8 43794861            .ascii  "CyHalt\000"\r
- 5711      6C7400\r
- 5712                  .LASF9:\r
- 5713 02df 696E7433            .ascii  "int32_t\000"\r
- 5713      325F7400 \r
- 5714                  .LASF7:\r
- 5715 02e7 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 5715      206C6F6E \r
- 5715      6720756E \r
- 5715      7369676E \r
- 5715      65642069 \r
- 5716                  .LASF49:\r
- 5717 02fe 706B7443            .ascii  "pktChecksum\000"\r
- 5717      6865636B \r
- 5717      73756D00 \r
- 5718                  .LASF68:\r
- 5719 030a 43794274            .ascii  "CyBtldr_CheckLaunch\000"\r
- 5719      6C64725F \r
- 5719      43686563 \r
- 5719      6B4C6175 \r
- 5719      6E636800 \r
- 5720                  .LASF16:\r
- 5721 031e 63797374            .ascii  "cystatus\000"\r
- 5721      61747573 \r
- 5721      00\r
- 5722                  .LASF42:\r
- 5723 0327 424C5F4C            .ascii  "BL_LaunchBootloadable\000"\r
- 5723      61756E63 \r
- 5723      68426F6F \r
- 5723      746C6F61 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 134\r
-\r
-\r
- 5723      6461626C \r
- 5724                  .LASF36:\r
- 5725 033d 424C5F43            .ascii  "BL_CalcPacketChecksum\000"\r
- 5725      616C6350 \r
- 5725      61636B65 \r
- 5725      74436865 \r
- 5725      636B7375 \r
- 5726                  .LASF30:\r
- 5727 0353 6669656C            .ascii  "fieldSize\000"\r
- 5727      6453697A \r
- 5727      6500\r
- 5728                  .LASF40:\r
- 5729 035d 73746174            .ascii  "status\000"\r
- 5729      757300\r
- 5730                  .LASF62:\r
- 5731 0364 726F774E            .ascii  "rowNum\000"\r
- 5731      756D00\r
- 5732                  .LASF56:\r
- 5733 036b 7061636B            .ascii  "packetBuffer\000"\r
- 5733      65744275 \r
- 5733      66666572 \r
- 5733      00\r
- 5734                  .LASF38:\r
- 5735 0378 424C5F43            .ascii  "BL_Calc8BitFlashSum\000"\r
- 5735      616C6338 \r
- 5735      42697446 \r
- 5735      6C617368 \r
- 5735      53756D00 \r
- 5736                  .LASF78:\r
- 5737 038c 424C5F53            .ascii  "BL_SizeBytes\000"\r
- 5737      697A6542 \r
- 5737      79746573 \r
- 5737      00\r
- 5738                  .LASF4:\r
- 5739 0399 6C6F6E67            .ascii  "long int\000"\r
- 5739      20696E74 \r
- 5739      00\r
- 5740                  .LASF50:\r
- 5741 03a2 72656164            .ascii  "readStat\000"\r
- 5741      53746174 \r
- 5741      00\r
- 5742                  .LASF26:\r
- 5743 03ab 424C5F47            .ascii  "BL_GetMetadata\000"\r
- 5743      65744D65 \r
- 5743      74616461 \r
- 5743      746100\r
- 5744                  .LASF3:\r
- 5745 03ba 73686F72            .ascii  "short unsigned int\000"\r
- 5745      7420756E \r
- 5745      7369676E \r
- 5745      65642069 \r
- 5745      6E7400\r
- 5746                  .LASF45:\r
- 5747 03cd 74696D65            .ascii  "timeOut\000"\r
- 5747      4F757400 \r
- 5748                  .LASF47:\r
- 5749 03d5 72737053            .ascii  "rspSize\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 135\r
-\r
-\r
- 5749      697A6500 \r
- 5750                  .LASF18:\r
- 5751 03dd 53696C69            .ascii  "SiliconId\000"\r
- 5751      636F6E49 \r
- 5751      6400\r
- 5752                  .LASF88:\r
- 5753 03e7 55534246            .ascii  "USBFS_CyBtldrCommRead\000"\r
- 5753      535F4379 \r
- 5753      42746C64 \r
- 5753      72436F6D \r
- 5753      6D526561 \r
- 5754                  .LASF37:\r
- 5755 03fd 62756666            .ascii  "buffer\000"\r
- 5755      657200\r
- 5756                  .LASF87:\r
- 5757 0404 55534246            .ascii  "USBFS_CyBtldrCommStart\000"\r
- 5757      535F4379 \r
- 5757      42746C64 \r
- 5757      72436F6D \r
- 5757      6D537461 \r
- 5758                  .LASF12:\r
- 5759 041b 75696E74            .ascii  "uint32\000"\r
- 5759      333200\r
- 5760                  .LASF17:\r
- 5761 0422 72656738            .ascii  "reg8\000"\r
- 5761      00\r
- 5762                  .LASF5:\r
- 5763 0427 6C6F6E67            .ascii  "long unsigned int\000"\r
- 5763      20756E73 \r
- 5763      69676E65 \r
- 5763      6420696E \r
- 5763      7400\r
- 5764                  .LASF63:\r
- 5765 0439 726F7741            .ascii  "rowAddr\000"\r
- 5765      64647200 \r
- 5766                  .LASF14:\r
- 5767 0441 646F7562            .ascii  "double\000"\r
- 5767      6C6500\r
- 5768                  .LASF76:\r
- 5769 0448 424C5F43            .ascii  "BL_Checksum\000"\r
- 5769      6865636B \r
- 5769      73756D00 \r
- 5770                  .LASF24:\r
- 5771 0454 73697A65            .ascii  "size\000"\r
- 5771      00\r
- 5772                  .LASF90:\r
- 5773 0459 43795365            .ascii  "CySetFlashEEBuffer\000"\r
- 5773      74466C61 \r
- 5773      73684545 \r
- 5773      42756666 \r
- 5773      657200\r
- 5774                  .LASF77:\r
- 5775 046c 424C5F43            .ascii  "BL_ChecksumAccess\000"\r
- 5775      6865636B \r
- 5775      73756D41 \r
- 5775      63636573 \r
- 5775      7300\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccjItj5m.s                      page 136\r
-\r
-\r
- 5776                  .LASF91:\r
- 5777 047e 43795772            .ascii  "CyWriteRowData\000"\r
- 5777      69746552 \r
- 5777      6F774461 \r
- 5777      746100\r
- 5778                  .LASF74:\r
- 5779 048d 61727261            .ascii  "arrayId\000"\r
- 5779      79496400 \r
- 5780                  .LASF60:\r
- 5781 0495 65726173            .ascii  "erase\000"\r
- 5781      6500\r
- 5782                  .LASF22:\r
- 5783 049b 424C5F45            .ascii  "BL_ENTER\000"\r
- 5783      4E544552 \r
- 5783      00\r
- 5784                  .LASF19:\r
- 5785 04a4 52657669            .ascii  "Revision\000"\r
- 5785      73696F6E \r
- 5785      00\r
- 5786                  .LASF80:\r
- 5787 04ad 49544D5F            .ascii  "ITM_RxBuffer\000"\r
- 5787      52784275 \r
- 5787      66666572 \r
- 5787      00\r
- 5788                  .LASF8:\r
- 5789 04ba 756E7369            .ascii  "unsigned int\000"\r
- 5789      676E6564 \r
- 5789      20696E74 \r
- 5789      00\r
- 5790                  .LASF85:\r
- 5791 04c7 43795772            .ascii  "CyWriteRowFull\000"\r
- 5791      69746552 \r
- 5791      6F774675 \r
- 5791      6C6C00\r
- 5792                  .LASF27:\r
- 5793 04d6 6669656C            .ascii  "fieldName\000"\r
- 5793      644E616D \r
- 5793      6500\r
- 5794                  .LASF69:\r
- 5795 04e0 424C5F53            .ascii  "BL_SetFlashByte\000"\r
- 5795      6574466C \r
- 5795      61736842 \r
- 5795      79746500 \r
- 5796                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.o
deleted file mode 100755 (executable)
index c420772..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/BL.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.lst
deleted file mode 100755 (executable)
index 03befd0..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.lst
+++ /dev/null
@@ -1,2082 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "Cm3Start.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.IntDefaultHandler,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global IntDefaultHandler\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   IntDefaultHandler, %function\r
-  24                   IntDefaultHandler:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\Cm3Start.c"\r
-   1:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/Cm3Start.c **** * File Name: Cm3Start.c\r
-   3:.\Generated_Source\PSoC5/Cm3Start.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-   5:.\Generated_Source\PSoC5/Cm3Start.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/Cm3Start.c **** *  Startup code for the ARM CM3.\r
-   7:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-   8:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
-   9:.\Generated_Source\PSoC5/Cm3Start.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-  10:.\Generated_Source\PSoC5/Cm3Start.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  11:.\Generated_Source\PSoC5/Cm3Start.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  12:.\Generated_Source\PSoC5/Cm3Start.c **** * the software package with which this file was provided.\r
-  13:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
-  14:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  15:.\Generated_Source\PSoC5/Cm3Start.c **** #include <limits.h>\r
-  16:.\Generated_Source\PSoC5/Cm3Start.c **** #include "cydevice_trm.h"\r
-  17:.\Generated_Source\PSoC5/Cm3Start.c **** #include "cytypes.h"\r
-  18:.\Generated_Source\PSoC5/Cm3Start.c **** #include "cyfitter_cfg.h"\r
-  19:.\Generated_Source\PSoC5/Cm3Start.c **** #include "CyLib.h"\r
-  20:.\Generated_Source\PSoC5/Cm3Start.c **** #include "CyDmac.h"\r
-  21:.\Generated_Source\PSoC5/Cm3Start.c **** #include "cyfitter.h"\r
-  22:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  23:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NUM_INTERRUPTS           (32u)\r
-  24:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NUM_VECTORS              (CYINT_IRQ_BASE + CY_NUM_INTERRUPTS)\r
-  25:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NUM_ROM_VECTORS          (4u)\r
-  26:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NVIC_APINT_PTR           ((reg32 *) CYREG_NVIC_APPLN_INTR)\r
-  27:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NVIC_CFG_CTRL_PTR        ((reg32 *) CYREG_NVIC_CFG_CONTROL)\r
-  28:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NVIC_APINT_PRIGROUP_3_5  (0x00000400u)  /* Priority group 3.5 split */\r
-  29:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NVIC_APINT_VECTKEY       (0x05FA0000u)  /* This key is required in order to write the NV\r
-  30:.\Generated_Source\PSoC5/Cm3Start.c **** #define CY_NVIC_CFG_STACKALIGN      (0x00000200u)  /* This specifies that the exception stack must \r
-  31:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  33:.\Generated_Source\PSoC5/Cm3Start.c **** /* Extern functions */\r
-  34:.\Generated_Source\PSoC5/Cm3Start.c **** extern void CyBtldr_CheckLaunch(void);\r
-  35:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  36:.\Generated_Source\PSoC5/Cm3Start.c **** /* Function prototypes */\r
-  37:.\Generated_Source\PSoC5/Cm3Start.c **** void initialize_psoc(void);\r
-  38:.\Generated_Source\PSoC5/Cm3Start.c **** CY_ISR(IntDefaultHandler);\r
-  39:.\Generated_Source\PSoC5/Cm3Start.c **** void Reset(void);\r
-  40:.\Generated_Source\PSoC5/Cm3Start.c **** CY_ISR(IntDefaultHandler);\r
-  41:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  42:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined(__ARMCC_VERSION)\r
-  43:.\Generated_Source\PSoC5/Cm3Start.c ****     #define INITIAL_STACK_POINTER ((cyisraddress)(uint32)&Image$$ARM_LIB_STACK$$ZI$$Limit)\r
-  44:.\Generated_Source\PSoC5/Cm3Start.c **** #elif defined (__GNUC__)\r
-  45:.\Generated_Source\PSoC5/Cm3Start.c ****     #define INITIAL_STACK_POINTER (&__cy_stack)\r
-  46:.\Generated_Source\PSoC5/Cm3Start.c **** #elif defined (__ICCARM__)\r
-  47:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma language=extended\r
-  48:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma segment="CSTACK"\r
-  49:.\Generated_Source\PSoC5/Cm3Start.c ****     #define INITIAL_STACK_POINTER  { .__ptr = __sfe( "CSTACK" ) }\r
-  50:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  51:.\Generated_Source\PSoC5/Cm3Start.c ****     extern void __iar_program_start( void );\r
-  52:.\Generated_Source\PSoC5/Cm3Start.c ****     extern void __iar_data_init3 (void);\r
-  53:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* (__ARMCC_VERSION) */\r
-  54:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  55:.\Generated_Source\PSoC5/Cm3Start.c **** /* Global variables */\r
-  56:.\Generated_Source\PSoC5/Cm3Start.c **** #if !defined (__ICCARM__)\r
-  57:.\Generated_Source\PSoC5/Cm3Start.c ****     CY_NOINIT static uint32 cySysNoInitDataValid;\r
-  58:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* !defined (__ICCARM__) */\r
-  59:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  60:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  61:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
-  62:.\Generated_Source\PSoC5/Cm3Start.c **** * Default Ram Interrupt Vector table storage area. Must be 256-byte aligned.\r
-  63:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
-  64:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined (__ICCARM__)\r
-  65:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma location=".ramvectors"\r
-  66:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma data_alignment=256\r
-  67:.\Generated_Source\PSoC5/Cm3Start.c **** #else\r
-  68:.\Generated_Source\PSoC5/Cm3Start.c ****     CY_SECTION(".ramvectors")\r
-  69:.\Generated_Source\PSoC5/Cm3Start.c ****     CY_ALIGN(256)\r
-  70:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* defined (__ICCARM__) */\r
-  71:.\Generated_Source\PSoC5/Cm3Start.c **** cyisraddress CyRamVectors[CY_NUM_VECTORS];\r
-  72:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  73:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  74:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
-  75:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: IntDefaultHandler\r
-  76:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
-  77:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-  78:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
-  79:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function is called for all interrupts, other than reset, that get\r
-  80:.\Generated_Source\PSoC5/Cm3Start.c **** *  called before the system is setup.\r
-  81:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-  82:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
-  83:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
-  84:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-  85:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
-  86:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
-  87:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-  88:.\Generated_Source\PSoC5/Cm3Start.c **** * Theory:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 3\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/Cm3Start.c **** *  Any value other than zero is acceptable.\r
-  90:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
-  91:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
-  92:.\Generated_Source\PSoC5/Cm3Start.c **** CY_ISR(IntDefaultHandler)\r
-  93:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
-  27                           .loc 1 93 0\r
-  28                           .cfi_startproc\r
-  29                           @ Volatile: function does not return.\r
-  30                           @ args = 0, pretend = 0, frame = 0\r
-  31                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  32                           @ link register save eliminated.\r
-  33                   .L2:\r
-  34 0000 FEE7                 b       .L2\r
-  35                           .cfi_endproc\r
-  36                   .LFE0:\r
-  37                           .size   IntDefaultHandler, .-IntDefaultHandler\r
-  38                           .section        .text._exit,"ax",%progbits\r
-  39                           .align  1\r
-  40                           .weak   _exit\r
-  41                           .thumb\r
-  42                           .thumb_func\r
-  43                           .type   _exit, %function\r
-  44                   _exit:\r
-  45                   .LFB2:\r
-  94:.\Generated_Source\PSoC5/Cm3Start.c **** \r
-  95:.\Generated_Source\PSoC5/Cm3Start.c ****     while(1)\r
-  96:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
-  97:.\Generated_Source\PSoC5/Cm3Start.c ****         /***********************************************************************\r
-  98:.\Generated_Source\PSoC5/Cm3Start.c ****         * We should never get here. If we do, a serious problem occured, so go\r
-  99:.\Generated_Source\PSoC5/Cm3Start.c ****         * into an infinite loop.\r
- 100:.\Generated_Source\PSoC5/Cm3Start.c ****         ***********************************************************************/\r
- 101:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
- 102:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 103:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 104:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 105:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined(__ARMCC_VERSION)\r
- 106:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 107:.\Generated_Source\PSoC5/Cm3Start.c **** /* Local function for the device reset. */\r
- 108:.\Generated_Source\PSoC5/Cm3Start.c **** extern void Reset(void);\r
- 109:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 110:.\Generated_Source\PSoC5/Cm3Start.c **** /* Application entry point. */\r
- 111:.\Generated_Source\PSoC5/Cm3Start.c **** extern void $Super$$main(void);\r
- 112:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 113:.\Generated_Source\PSoC5/Cm3Start.c **** /* Linker-generated Stack Base addresses, Two Region and One Region */\r
- 114:.\Generated_Source\PSoC5/Cm3Start.c **** extern uint32 Image$$ARM_LIB_STACK$$ZI$$Limit;\r
- 115:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 116:.\Generated_Source\PSoC5/Cm3Start.c **** /* RealView C Library initialization. */\r
- 117:.\Generated_Source\PSoC5/Cm3Start.c **** extern int __main(void);\r
- 118:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 119:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 120:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 121:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: Reset\r
- 122:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 123:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 124:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 125:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function handles the reset interrupt for the RVDS/MDK toolchains.\r
- 126:.\Generated_Source\PSoC5/Cm3Start.c **** *  This is the first bit of code that is executed at startup.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 4\r
-\r
-\r
- 127:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 128:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 129:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 130:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 131:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 132:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 133:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 134:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 135:.\Generated_Source\PSoC5/Cm3Start.c **** void Reset(void)\r
- 136:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 137:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
- 138:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 139:.\Generated_Source\PSoC5/Cm3Start.c ****         /* For PSoC 5LP, debugging is enabled by default */\r
- 140:.\Generated_Source\PSoC5/Cm3Start.c ****         #if(CYDEV_DEBUGGING_ENABLE == 0)\r
- 141:.\Generated_Source\PSoC5/Cm3Start.c ****             *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
- 142:.\Generated_Source\PSoC5/Cm3Start.c ****         #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
- 143:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 144:.\Generated_Source\PSoC5/Cm3Start.c ****         /* Reset Status Register has Read-to-clear SW access mode.\r
- 145:.\Generated_Source\PSoC5/Cm3Start.c ****         * Preserve current RESET_SR0 state to make it available for next reading.\r
- 146:.\Generated_Source\PSoC5/Cm3Start.c ****         */\r
- 147:.\Generated_Source\PSoC5/Cm3Start.c ****         *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
- 148:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 149:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
- 150:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 151:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(CYDEV_BOOTLOADER_ENABLE)\r
- 152:.\Generated_Source\PSoC5/Cm3Start.c ****         CyBtldr_CheckLaunch();\r
- 153:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif /* (CYDEV_BOOTLOADER_ENABLE) */\r
- 154:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 155:.\Generated_Source\PSoC5/Cm3Start.c ****     __main();\r
- 156:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 157:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 158:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 159:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 160:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: $Sub$$main\r
- 161:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 162:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 163:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 164:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function is called imediatly before the users main\r
- 165:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 166:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 167:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 168:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 169:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 170:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 171:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 172:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 173:.\Generated_Source\PSoC5/Cm3Start.c **** void $Sub$$main(void)\r
- 174:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 175:.\Generated_Source\PSoC5/Cm3Start.c ****     initialize_psoc();\r
- 176:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 177:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Call original main */\r
- 178:.\Generated_Source\PSoC5/Cm3Start.c ****     $Super$$main();\r
- 179:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 180:.\Generated_Source\PSoC5/Cm3Start.c ****     while (1)\r
- 181:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
- 182:.\Generated_Source\PSoC5/Cm3Start.c ****         /* If main returns it is undefined what we should do. */\r
- 183:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 5\r
-\r
-\r
- 184:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 185:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 186:.\Generated_Source\PSoC5/Cm3Start.c **** #elif defined(__GNUC__)\r
- 187:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 188:.\Generated_Source\PSoC5/Cm3Start.c **** void Start_c(void);\r
- 189:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 190:.\Generated_Source\PSoC5/Cm3Start.c **** /* Stack Base address */\r
- 191:.\Generated_Source\PSoC5/Cm3Start.c **** extern void __cy_stack(void);\r
- 192:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 193:.\Generated_Source\PSoC5/Cm3Start.c **** /* Application entry point. */\r
- 194:.\Generated_Source\PSoC5/Cm3Start.c **** extern int main(void);\r
- 195:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 196:.\Generated_Source\PSoC5/Cm3Start.c **** /* The static objects constructors initializer */\r
- 197:.\Generated_Source\PSoC5/Cm3Start.c **** extern void __libc_init_array(void);\r
- 198:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 199:.\Generated_Source\PSoC5/Cm3Start.c **** typedef unsigned char __cy_byte_align8 __attribute ((aligned (8)));\r
- 200:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 201:.\Generated_Source\PSoC5/Cm3Start.c **** struct __cy_region\r
- 202:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 203:.\Generated_Source\PSoC5/Cm3Start.c ****     __cy_byte_align8 *init; /* Initial contents of this region.  */\r
- 204:.\Generated_Source\PSoC5/Cm3Start.c ****     __cy_byte_align8 *data; /* Start address of region.  */\r
- 205:.\Generated_Source\PSoC5/Cm3Start.c ****     size_t init_size;       /* Size of initial data.  */\r
- 206:.\Generated_Source\PSoC5/Cm3Start.c ****     size_t zero_size;       /* Additional size to be zeroed.  */\r
- 207:.\Generated_Source\PSoC5/Cm3Start.c **** };\r
- 208:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 209:.\Generated_Source\PSoC5/Cm3Start.c **** extern const struct __cy_region __cy_regions[];\r
- 210:.\Generated_Source\PSoC5/Cm3Start.c **** extern const char __cy_region_num __attribute__((weak));\r
- 211:.\Generated_Source\PSoC5/Cm3Start.c **** #define __cy_region_num ((size_t)&__cy_region_num)\r
- 212:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 213:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 214:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 215:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: Reset\r
- 216:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 217:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 218:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 219:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function handles the reset interrupt for the GCC toolchain. This is the\r
- 220:.\Generated_Source\PSoC5/Cm3Start.c **** *  first bit of code that is executed at startup.\r
- 221:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 222:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 223:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 224:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 225:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 226:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 227:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 228:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 229:.\Generated_Source\PSoC5/Cm3Start.c **** void Reset(void)\r
- 230:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 231:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
- 232:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 233:.\Generated_Source\PSoC5/Cm3Start.c ****         /* For PSoC 5LP, debugging is enabled by default */\r
- 234:.\Generated_Source\PSoC5/Cm3Start.c ****         #if(CYDEV_DEBUGGING_ENABLE == 0)\r
- 235:.\Generated_Source\PSoC5/Cm3Start.c ****             *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
- 236:.\Generated_Source\PSoC5/Cm3Start.c ****         #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
- 237:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 238:.\Generated_Source\PSoC5/Cm3Start.c ****         /* Reset Status Register has Read-to-clear SW access mode.\r
- 239:.\Generated_Source\PSoC5/Cm3Start.c ****         * Preserve current RESET_SR0 state to make it available for next reading.\r
- 240:.\Generated_Source\PSoC5/Cm3Start.c ****         */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 6\r
-\r
-\r
- 241:.\Generated_Source\PSoC5/Cm3Start.c ****         *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
- 242:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 243:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
- 244:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 245:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(CYDEV_BOOTLOADER_ENABLE)\r
- 246:.\Generated_Source\PSoC5/Cm3Start.c ****         CyBtldr_CheckLaunch();\r
- 247:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif /* (CYDEV_BOOTLOADER_ENABLE) */\r
- 248:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 249:.\Generated_Source\PSoC5/Cm3Start.c ****     Start_c();\r
- 250:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 251:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 252:.\Generated_Source\PSoC5/Cm3Start.c **** __attribute__((weak))\r
- 253:.\Generated_Source\PSoC5/Cm3Start.c **** void _exit(int status)\r
- 254:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
-  46                           .loc 1 254 0\r
-  47                           .cfi_startproc\r
-  48                           @ Volatile: function does not return.\r
-  49                           @ args = 0, pretend = 0, frame = 0\r
-  50                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  51                           @ link register save eliminated.\r
-  52                   .LVL0:\r
-  53                   .L4:\r
-  54 0000 FEE7                 b       .L4\r
-  55                           .cfi_endproc\r
-  56                   .LFE2:\r
-  57                           .size   _exit, .-_exit\r
-  58                           .section        .text.Start_c,"ax",%progbits\r
-  59                           .align  1\r
-  60                           .global Start_c\r
-  61                           .thumb\r
-  62                           .thumb_func\r
-  63                           .type   Start_c, %function\r
-  64                   Start_c:\r
-  65                   .LFB3:\r
- 255:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Cause a divide by 0 exception */\r
- 256:.\Generated_Source\PSoC5/Cm3Start.c ****     int x = status / INT_MAX;\r
- 257:.\Generated_Source\PSoC5/Cm3Start.c ****     x = 4 / x;\r
- 258:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 259:.\Generated_Source\PSoC5/Cm3Start.c ****     while(1)\r
- 260:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
- 261:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
- 262:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 263:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 264:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 265:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: Start_c\r
- 266:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 267:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 268:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 269:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function handles initializing the .data and .bss sections in\r
- 270:.\Generated_Source\PSoC5/Cm3Start.c **** *  preperation for running standard C code.  Once initialization is complete\r
- 271:.\Generated_Source\PSoC5/Cm3Start.c **** *  it will call main(). This function will never return.\r
- 272:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 273:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 274:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 275:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 276:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 277:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 7\r
-\r
-\r
- 278:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 279:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 280:.\Generated_Source\PSoC5/Cm3Start.c **** void Start_c(void)  __attribute__ ((noreturn));\r
- 281:.\Generated_Source\PSoC5/Cm3Start.c **** void Start_c(void)\r
- 282:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
-  66                           .loc 1 282 0\r
-  67                           .cfi_startproc\r
-  68                           @ Volatile: function does not return.\r
-  69                           @ args = 0, pretend = 0, frame = 0\r
-  70                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  71                   .LVL1:\r
-  72                           .loc 1 282 0\r
-  73 0000 08B5                 push    {r3, lr}\r
-  74                   .LCFI0:\r
-  75                           .cfi_def_cfa_offset 8\r
-  76                           .cfi_offset 3, -8\r
-  77                           .cfi_offset 14, -4\r
-  78 0002 1249                 ldr     r1, .L17\r
-  79 0004 124B                 ldr     r3, .L17+4\r
-  80                   .LVL2:\r
-  81                   .L6:\r
- 283:.\Generated_Source\PSoC5/Cm3Start.c ****     unsigned regions = __cy_region_num;\r
- 284:.\Generated_Source\PSoC5/Cm3Start.c ****     const struct __cy_region *rptr = __cy_regions;\r
- 285:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 286:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Initialize memory */\r
- 287:.\Generated_Source\PSoC5/Cm3Start.c ****     for (regions = __cy_region_num, rptr = __cy_regions; regions--; rptr++)\r
-  82                           .loc 1 287 0 discriminator 1\r
-  83 0006 4A1C                 adds    r2, r1, #1\r
-  84 0008 1AD0                 beq     .L14\r
-  85                   .L11:\r
-  86                   .LBB2:\r
- 288:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
- 289:.\Generated_Source\PSoC5/Cm3Start.c ****         uint32 *src = (uint32 *)rptr->init;\r
-  87                           .loc 1 289 0\r
-  88 000a 53F8106C             ldr     r6, [r3, #-16]\r
-  89                   .LVL3:\r
- 290:.\Generated_Source\PSoC5/Cm3Start.c ****         uint32 *dst = (uint32 *)rptr->data;\r
-  90                           .loc 1 290 0\r
-  91 000e 53F80C0C             ldr     r0, [r3, #-12]\r
-  92                   .LVL4:\r
- 291:.\Generated_Source\PSoC5/Cm3Start.c ****         unsigned limit = rptr->init_size;\r
-  93                           .loc 1 291 0\r
-  94 0012 53F8085C             ldr     r5, [r3, #-8]\r
-  95                   .LVL5:\r
- 292:.\Generated_Source\PSoC5/Cm3Start.c ****         unsigned count;\r
- 293:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 294:.\Generated_Source\PSoC5/Cm3Start.c ****         for (count = 0u; count != limit; count += sizeof (uint32))\r
-  96                           .loc 1 294 0\r
-  97 0016 0022                 movs    r2, #0\r
-  98                   .LVL6:\r
-  99                   .L7:\r
- 100                           .loc 1 294 0 is_stmt 0 discriminator 1\r
- 101 0018 AA42                 cmp     r2, r5\r
- 281:.\Generated_Source\PSoC5/Cm3Start.c **** void Start_c(void)\r
- 102                           .loc 1 281 0 is_stmt 1 discriminator 1\r
- 103 001a 00EB0204             add     r4, r0, r2\r
- 104                   .LVL7:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 8\r
-\r
-\r
- 105                           .loc 1 294 0 discriminator 1\r
- 106 001e 03D0                 beq     .L15\r
- 107                   .L8:\r
- 295:.\Generated_Source\PSoC5/Cm3Start.c ****         {\r
- 296:.\Generated_Source\PSoC5/Cm3Start.c ****             *dst++ = *src++;\r
- 108                           .loc 1 296 0 discriminator 2\r
- 109 0020 B458                 ldr     r4, [r6, r2]\r
- 110 0022 8450                 str     r4, [r0, r2]\r
- 294:.\Generated_Source\PSoC5/Cm3Start.c ****         for (count = 0u; count != limit; count += sizeof (uint32))\r
- 111                           .loc 1 294 0 discriminator 2\r
- 112 0024 0432                 adds    r2, r2, #4\r
- 113                   .LVL8:\r
- 114 0026 F7E7                 b       .L7\r
- 115                   .L15:\r
- 297:.\Generated_Source\PSoC5/Cm3Start.c ****         }\r
- 298:.\Generated_Source\PSoC5/Cm3Start.c ****         limit = rptr->zero_size;\r
- 116                           .loc 1 298 0\r
- 117 0028 53F8040C             ldr     r0, [r3, #-4]\r
- 118                   .LVL9:\r
- 299:.\Generated_Source\PSoC5/Cm3Start.c ****         for (count = 0u; count != limit; count += sizeof (uint32))\r
- 119                           .loc 1 299 0\r
- 120 002c 0022                 movs    r2, #0\r
- 121                   .LVL10:\r
- 122                   .L9:\r
- 123                           .loc 1 299 0 is_stmt 0 discriminator 1\r
- 124 002e 8242                 cmp     r2, r0\r
- 125 0030 03D0                 beq     .L16\r
- 126                   .L10:\r
- 300:.\Generated_Source\PSoC5/Cm3Start.c ****         {\r
- 301:.\Generated_Source\PSoC5/Cm3Start.c ****             *dst++ = 0u;\r
- 127                           .loc 1 301 0 is_stmt 1 discriminator 2\r
- 128 0032 0025                 movs    r5, #0\r
- 129 0034 A550                 str     r5, [r4, r2]\r
- 299:.\Generated_Source\PSoC5/Cm3Start.c ****         for (count = 0u; count != limit; count += sizeof (uint32))\r
- 130                           .loc 1 299 0 discriminator 2\r
- 131 0036 0432                 adds    r2, r2, #4\r
- 132                   .LVL11:\r
- 133 0038 F9E7                 b       .L9\r
- 134                   .L16:\r
- 135 003a 0139                 subs    r1, r1, #1\r
- 136 003c 1033                 adds    r3, r3, #16\r
- 137 003e E2E7                 b       .L6\r
- 138                   .LVL12:\r
- 139                   .L14:\r
- 140                   .LBE2:\r
- 302:.\Generated_Source\PSoC5/Cm3Start.c ****         }\r
- 303:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
- 304:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 305:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Invoke static objects constructors */\r
- 306:.\Generated_Source\PSoC5/Cm3Start.c ****     __libc_init_array();\r
- 141                           .loc 1 306 0\r
- 142 0040 FFF7FEFF             bl      __libc_init_array\r
- 143                   .LVL13:\r
- 307:.\Generated_Source\PSoC5/Cm3Start.c ****     (void) main();\r
- 144                           .loc 1 307 0\r
- 145 0044 FFF7FEFF             bl      main\r
- 146                   .LVL14:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 9\r
-\r
-\r
- 147                   .L12:\r
- 148 0048 FEE7                 b       .L12\r
- 149                   .L18:\r
- 150 004a 00BF                 .align  2\r
- 151                   .L17:\r
- 152 004c FFFFFFFF             .word   __cy_region_num-1\r
- 153 0050 10000000             .word   __cy_regions+16\r
- 154                           .cfi_endproc\r
- 155                   .LFE3:\r
- 156                           .size   Start_c, .-Start_c\r
- 157                           .section        .text.Reset,"ax",%progbits\r
- 158                           .align  1\r
- 159                           .global Reset\r
- 160                           .thumb\r
- 161                           .thumb_func\r
- 162                           .type   Reset, %function\r
- 163                   Reset:\r
- 164                   .LFB1:\r
- 230:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 165                           .loc 1 230 0\r
- 166                           .cfi_startproc\r
- 167                           @ args = 0, pretend = 0, frame = 0\r
- 168                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 169 0000 08B5                 push    {r3, lr}\r
- 170                   .LCFI1:\r
- 171                           .cfi_def_cfa_offset 8\r
- 172                           .cfi_offset 3, -8\r
- 173                           .cfi_offset 14, -4\r
- 241:.\Generated_Source\PSoC5/Cm3Start.c ****         *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
- 174                           .loc 1 241 0\r
- 175 0002 044B                 ldr     r3, .L20\r
- 176 0004 0448                 ldr     r0, .L20+4\r
- 177 0006 1A68                 ldr     r2, [r3, #0]\r
- 178 0008 0260                 str     r2, [r0, #0]\r
- 246:.\Generated_Source\PSoC5/Cm3Start.c ****         CyBtldr_CheckLaunch();\r
- 179                           .loc 1 246 0\r
- 180 000a FFF7FEFF             bl      CyBtldr_CheckLaunch\r
- 181                   .LVL15:\r
- 249:.\Generated_Source\PSoC5/Cm3Start.c ****     Start_c();\r
- 182                           .loc 1 249 0\r
- 183 000e FFF7FEFF             bl      Start_c\r
- 184                   .LVL16:\r
- 185                   .L21:\r
- 186 0012 00BF                 .align  2\r
- 187                   .L20:\r
- 188 0014 FA460040             .word   1073759994\r
- 189 0018 BC760040             .word   1073772220\r
- 190                           .cfi_endproc\r
- 191                   .LFE1:\r
- 192                           .size   Reset, .-Reset\r
- 193                           .section        .text.startup.initialize_psoc,"ax",%progbits\r
- 194                           .align  1\r
- 195                           .global initialize_psoc\r
- 196                           .thumb\r
- 197                           .thumb_func\r
- 198                           .type   initialize_psoc, %function\r
- 199                   initialize_psoc:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 10\r
-\r
-\r
- 200                   .LFB4:\r
- 308:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 309:.\Generated_Source\PSoC5/Cm3Start.c ****     while (1)\r
- 310:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
- 311:.\Generated_Source\PSoC5/Cm3Start.c ****         /* If main returns, make sure we don't return. */\r
- 312:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
- 313:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
- 314:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 315:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 316:.\Generated_Source\PSoC5/Cm3Start.c **** #elif defined (__ICCARM__)\r
- 317:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 318:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 319:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: __low_level_init\r
- 320:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 321:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 322:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 323:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function perform early initializations for the IAR Embedded\r
- 324:.\Generated_Source\PSoC5/Cm3Start.c **** *  Workbench IDE. It is executed in the context of reset interrupt handler\r
- 325:.\Generated_Source\PSoC5/Cm3Start.c **** *  before the data sections are initialized.\r
- 326:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 327:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 328:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 329:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 330:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 331:.\Generated_Source\PSoC5/Cm3Start.c **** *  The value that determines whether or not data sections should be initialized\r
- 332:.\Generated_Source\PSoC5/Cm3Start.c **** *  by the system startup code:\r
- 333:.\Generated_Source\PSoC5/Cm3Start.c **** *    0 - skip data sections initialization;\r
- 334:.\Generated_Source\PSoC5/Cm3Start.c **** *    1 - initialize data sections;\r
- 335:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 336:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 337:.\Generated_Source\PSoC5/Cm3Start.c **** int __low_level_init(void)\r
- 338:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 339:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
- 340:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 341:.\Generated_Source\PSoC5/Cm3Start.c ****         /* For PSoC 5LP, debugging is enabled by default */\r
- 342:.\Generated_Source\PSoC5/Cm3Start.c ****         #if(CYDEV_DEBUGGING_ENABLE == 0)\r
- 343:.\Generated_Source\PSoC5/Cm3Start.c ****             *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
- 344:.\Generated_Source\PSoC5/Cm3Start.c ****         #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
- 345:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 346:.\Generated_Source\PSoC5/Cm3Start.c ****         /* Reset Status Register has Read-to-clear SW access mode.\r
- 347:.\Generated_Source\PSoC5/Cm3Start.c ****         * Preserve current RESET_SR0 state to make it available for next reading.\r
- 348:.\Generated_Source\PSoC5/Cm3Start.c ****         */\r
- 349:.\Generated_Source\PSoC5/Cm3Start.c ****         *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
- 350:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 351:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
- 352:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 353:.\Generated_Source\PSoC5/Cm3Start.c ****     #if (CYDEV_BOOTLOADER_ENABLE)\r
- 354:.\Generated_Source\PSoC5/Cm3Start.c ****         CyBtldr_CheckLaunch();\r
- 355:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif /* CYDEV_BOOTLOADER_ENABLE */\r
- 356:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 357:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Initialize data sections */\r
- 358:.\Generated_Source\PSoC5/Cm3Start.c ****     __iar_data_init3();\r
- 359:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 360:.\Generated_Source\PSoC5/Cm3Start.c ****     initialize_psoc();\r
- 361:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 362:.\Generated_Source\PSoC5/Cm3Start.c ****     return 0;\r
- 363:.\Generated_Source\PSoC5/Cm3Start.c **** }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 11\r
-\r
-\r
- 364:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 365:.\Generated_Source\PSoC5/Cm3Start.c **** #endif /* __GNUC__ */\r
- 366:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 367:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 368:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 369:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 370:.\Generated_Source\PSoC5/Cm3Start.c **** * Default Rom Interrupt Vector table.\r
- 371:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 372:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 373:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined(__ARMCC_VERSION)\r
- 374:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Suppress diagnostic message 1296-D: extended constant initialiser used */\r
- 375:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma diag_suppress 1296\r
- 376:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* defined(__ARMCC_VERSION) */\r
- 377:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 378:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined (__ICCARM__)\r
- 379:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma location=".romvectors"\r
- 380:.\Generated_Source\PSoC5/Cm3Start.c ****     const intvec_elem __vector_table[CY_NUM_ROM_VECTORS] =\r
- 381:.\Generated_Source\PSoC5/Cm3Start.c **** #else\r
- 382:.\Generated_Source\PSoC5/Cm3Start.c ****     CY_SECTION(".romvectors")\r
- 383:.\Generated_Source\PSoC5/Cm3Start.c ****     const cyisraddress RomVectors[CY_NUM_ROM_VECTORS] =\r
- 384:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* defined (__ICCARM__) */\r
- 385:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 386:.\Generated_Source\PSoC5/Cm3Start.c ****     INITIAL_STACK_POINTER,   /* The initial stack pointer  0 */\r
- 387:.\Generated_Source\PSoC5/Cm3Start.c ****     #if defined (__ICCARM__) /* The reset handler          1 */\r
- 388:.\Generated_Source\PSoC5/Cm3Start.c ****         __iar_program_start,\r
- 389:.\Generated_Source\PSoC5/Cm3Start.c ****     #else\r
- 390:.\Generated_Source\PSoC5/Cm3Start.c ****         (cyisraddress)&Reset,\r
- 391:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif  /* defined (__ICCARM__) */\r
- 392:.\Generated_Source\PSoC5/Cm3Start.c ****     &IntDefaultHandler,      /* The NMI handler            2 */\r
- 393:.\Generated_Source\PSoC5/Cm3Start.c ****     &IntDefaultHandler,      /* The hard fault handler     3 */\r
- 394:.\Generated_Source\PSoC5/Cm3Start.c **** };\r
- 395:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 396:.\Generated_Source\PSoC5/Cm3Start.c **** #if defined(__ARMCC_VERSION)\r
- 397:.\Generated_Source\PSoC5/Cm3Start.c ****     #pragma diag_default 1296\r
- 398:.\Generated_Source\PSoC5/Cm3Start.c **** #endif  /* defined(__ARMCC_VERSION) */\r
- 399:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 400:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 401:.\Generated_Source\PSoC5/Cm3Start.c **** /*******************************************************************************\r
- 402:.\Generated_Source\PSoC5/Cm3Start.c **** * Function Name: initialize_psoc\r
- 403:.\Generated_Source\PSoC5/Cm3Start.c **** ********************************************************************************\r
- 404:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 405:.\Generated_Source\PSoC5/Cm3Start.c **** * Summary:\r
- 406:.\Generated_Source\PSoC5/Cm3Start.c **** *  This function used to initialize the PSoC chip before calling main.\r
- 407:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 408:.\Generated_Source\PSoC5/Cm3Start.c **** * Parameters:\r
- 409:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 410:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 411:.\Generated_Source\PSoC5/Cm3Start.c **** * Return:\r
- 412:.\Generated_Source\PSoC5/Cm3Start.c **** *  None\r
- 413:.\Generated_Source\PSoC5/Cm3Start.c **** *\r
- 414:.\Generated_Source\PSoC5/Cm3Start.c **** *******************************************************************************/\r
- 415:.\Generated_Source\PSoC5/Cm3Start.c **** #if (defined(__GNUC__) && !defined(__ARMCC_VERSION))\r
- 416:.\Generated_Source\PSoC5/Cm3Start.c **** __attribute__ ((constructor(101)))\r
- 417:.\Generated_Source\PSoC5/Cm3Start.c **** #endif\r
- 418:.\Generated_Source\PSoC5/Cm3Start.c **** void initialize_psoc(void)\r
- 419:.\Generated_Source\PSoC5/Cm3Start.c **** {\r
- 201                           .loc 1 419 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 12\r
-\r
-\r
- 202                           .cfi_startproc\r
- 203                           @ args = 0, pretend = 0, frame = 0\r
- 204                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 205 0000 08B5                 push    {r3, lr}\r
- 206                   .LCFI2:\r
- 207                           .cfi_def_cfa_offset 8\r
- 208                           .cfi_offset 3, -8\r
- 209                           .cfi_offset 14, -4\r
- 420:.\Generated_Source\PSoC5/Cm3Start.c ****     uint32 i;\r
- 421:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 422:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Set Priority group 5. */\r
- 423:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 424:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Writes to NVIC_APINT register require the VECTKEY in the upper half */\r
- 425:.\Generated_Source\PSoC5/Cm3Start.c ****     *CY_NVIC_APINT_PTR = CY_NVIC_APINT_VECTKEY | CY_NVIC_APINT_PRIGROUP_3_5;\r
- 210                           .loc 1 425 0\r
- 211 0002 104A                 ldr     r2, .L27\r
- 212 0004 104B                 ldr     r3, .L27+4\r
- 213 0006 1A60                 str     r2, [r3, #0]\r
- 426:.\Generated_Source\PSoC5/Cm3Start.c ****     *CY_NVIC_CFG_CTRL_PTR |= CY_NVIC_CFG_STACKALIGN;\r
- 214                           .loc 1 426 0\r
- 215 0008 9868                 ldr     r0, [r3, #8]\r
- 216 000a 40F40072             orr     r2, r0, #512\r
- 217 000e 9A60                 str     r2, [r3, #8]\r
- 218                   .LVL17:\r
- 427:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 428:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Set Ram interrupt vectors to default functions. */\r
- 429:.\Generated_Source\PSoC5/Cm3Start.c ****     for (i = 0u; i < CY_NUM_VECTORS; i++)\r
- 219                           .loc 1 429 0\r
- 220 0010 0023                 movs    r3, #0\r
- 221                   .LVL18:\r
- 222                   .L24:\r
- 430:.\Generated_Source\PSoC5/Cm3Start.c ****     {\r
- 431:.\Generated_Source\PSoC5/Cm3Start.c ****         #if defined (__ICCARM__)\r
- 432:.\Generated_Source\PSoC5/Cm3Start.c ****             CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? __vector_table[i].__fun : &IntDefaultHandl\r
- 433:.\Generated_Source\PSoC5/Cm3Start.c ****         #else\r
- 434:.\Generated_Source\PSoC5/Cm3Start.c ****             CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? RomVectors[i] : &IntDefaultHandler;\r
- 223                           .loc 1 434 0\r
- 224 0012 032B                 cmp     r3, #3\r
- 225 0014 96BF                 itet    ls\r
- 226 0016 0D4A                 ldrls   r2, .L27+8\r
- 227 0018 0D49                 ldrhi   r1, .L27+12\r
- 228 001a 52F82310             ldrls   r1, [r2, r3, lsl #2]\r
- 229 001e 0D4A                 ldr     r2, .L27+16\r
- 230 0020 42F82310             str     r1, [r2, r3, lsl #2]\r
- 429:.\Generated_Source\PSoC5/Cm3Start.c ****     for (i = 0u; i < CY_NUM_VECTORS; i++)\r
- 231                           .loc 1 429 0\r
- 232 0024 0133                 adds    r3, r3, #1\r
- 233                   .LVL19:\r
- 234 0026 302B                 cmp     r3, #48\r
- 235 0028 F3D1                 bne     .L24\r
- 435:.\Generated_Source\PSoC5/Cm3Start.c ****         #endif  /* defined (__ICCARM__) */\r
- 436:.\Generated_Source\PSoC5/Cm3Start.c ****     }\r
- 437:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 438:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Was stored in CFGMEM to avoid being cleared while SRAM gets cleared */\r
- 439:.\Generated_Source\PSoC5/Cm3Start.c ****     CyResetStatus = CY_GET_REG8(CYREG_PHUB_CFGMEM23_CFG1);\r
- 236                           .loc 1 439 0\r
- 237 002a 0B49                 ldr     r1, .L27+20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 13\r
-\r
-\r
- 238 002c 0B4B                 ldr     r3, .L27+24\r
- 239                   .LVL20:\r
- 240 002e 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 440:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 441:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Point NVIC at the RAM vector table. */\r
- 442:.\Generated_Source\PSoC5/Cm3Start.c ****     *CYINT_VECT_TABLE = CyRamVectors;\r
- 241                           .loc 1 442 0\r
- 242 0030 0B49                 ldr     r1, .L27+28\r
- 439:.\Generated_Source\PSoC5/Cm3Start.c ****     CyResetStatus = CY_GET_REG8(CYREG_PHUB_CFGMEM23_CFG1);\r
- 243                           .loc 1 439 0\r
- 244 0032 1870                 strb    r0, [r3, #0]\r
- 245                           .loc 1 442 0\r
- 246 0034 0A60                 str     r2, [r1, #0]\r
- 443:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 444:.\Generated_Source\PSoC5/Cm3Start.c ****     /* Initialize the configuration registers. */\r
- 445:.\Generated_Source\PSoC5/Cm3Start.c ****     cyfitter_cfg();\r
- 247                           .loc 1 445 0\r
- 248 0036 FFF7FEFF             bl      cyfitter_cfg\r
- 249                   .LVL21:\r
- 446:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 447:.\Generated_Source\PSoC5/Cm3Start.c ****     #if(0u != DMA_CHANNELS_USED__MASK0)\r
- 448:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 449:.\Generated_Source\PSoC5/Cm3Start.c ****         /* Setup DMA - only necessary if the design contains a DMA component. */\r
- 450:.\Generated_Source\PSoC5/Cm3Start.c ****         CyDmacConfigure();\r
- 451:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 452:.\Generated_Source\PSoC5/Cm3Start.c ****     #endif  /* (0u != DMA_CHANNELS_USED__MASK0) */\r
- 453:.\Generated_Source\PSoC5/Cm3Start.c **** \r
- 454:.\Generated_Source\PSoC5/Cm3Start.c ****     #if !defined (__ICCARM__)\r
- 455:.\Generated_Source\PSoC5/Cm3Start.c ****         /* Actually, no need to clean this variable, just to make compiler happy. */\r
- 456:.\Generated_Source\PSoC5/Cm3Start.c ****         cySysNoInitDataValid = 0u;\r
- 250                           .loc 1 456 0\r
- 251 003a 0A48                 ldr     r0, .L27+32\r
- 252 003c 0022                 movs    r2, #0\r
- 253 003e 0260                 str     r2, [r0, #0]\r
- 254 0040 08BD                 pop     {r3, pc}\r
- 255                   .L28:\r
- 256 0042 00BF                 .align  2\r
- 257                   .L27:\r
- 258 0044 0004FA05             .word   100271104\r
- 259 0048 0CED00E0             .word   -536810228\r
- 260 004c 00000000             .word   .LANCHOR0\r
- 261 0050 00000000             .word   IntDefaultHandler\r
- 262 0054 00000000             .word   .LANCHOR1\r
- 263 0058 BC760040             .word   1073772220\r
- 264 005c 00000000             .word   CyResetStatus\r
- 265 0060 08ED00E0             .word   -536810232\r
- 266 0064 00000000             .word   .LANCHOR2\r
- 267                           .cfi_endproc\r
- 268                   .LFE4:\r
- 269                           .size   initialize_psoc, .-initialize_psoc\r
- 270                           .section        .init_array,"aw",%init_array\r
- 271                           .align  2\r
- 272 0000 00000000             .word   initialize_psoc(target1)\r
- 273                           .global RomVectors\r
- 274                           .global CyRamVectors\r
- 275                           .section        .romvectors,"a",%progbits\r
- 276                           .align  2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 14\r
-\r
-\r
- 277                           .set    .LANCHOR0,. + 0\r
- 278                           .type   RomVectors, %object\r
- 279                           .size   RomVectors, 16\r
- 280                   RomVectors:\r
- 281 0000 00000000             .word   __cy_stack\r
- 282 0004 00000000             .word   Reset\r
- 283 0008 00000000             .word   IntDefaultHandler\r
- 284 000c 00000000             .word   IntDefaultHandler\r
- 285                           .section        .noinit,"aw",%progbits\r
- 286                           .align  2\r
- 287                           .set    .LANCHOR2,. + 0\r
- 288                           .type   cySysNoInitDataValid, %object\r
- 289                           .size   cySysNoInitDataValid, 4\r
- 290                   cySysNoInitDataValid:\r
- 291 0000 00000000             .space  4\r
- 292                           .section        .ramvectors,"aw",%progbits\r
- 293                           .align  8\r
- 294                           .set    .LANCHOR1,. + 0\r
- 295                           .type   CyRamVectors, %object\r
- 296                           .size   CyRamVectors, 192\r
- 297                   CyRamVectors:\r
- 298 0000 00000000             .space  192\r
- 298      00000000 \r
- 298      00000000 \r
- 298      00000000 \r
- 298      00000000 \r
- 299                           .weak   __cy_region_num\r
- 300 00c0 00000000             .text\r
- 300      00000000 \r
- 300      00000000 \r
- 300      00000000 \r
- 300      00000000 \r
- 301                   .Letext0:\r
- 302                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 303                           .file 3 "c:\\program files (x86)\\cypress\\psoc creator\\3.0\\psoc creator\\import\\gnu_cs\\arm\\4\r
- 304                           .file 4 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 305                           .file 5 ".\\Generated_Source\\PSoC5\\cyfitter_cfg.h"\r
- 306                           .section        .debug_info,"",%progbits\r
- 307                   .Ldebug_info0:\r
- 308 0000 41030000             .4byte  0x341\r
- 309 0004 0200                 .2byte  0x2\r
- 310 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 311 000a 04                   .byte   0x4\r
- 312 000b 01                   .uleb128 0x1\r
- 313 000c E4010000             .4byte  .LASF41\r
- 314 0010 01                   .byte   0x1\r
- 315 0011 00000000             .4byte  .LASF42\r
- 316 0015 BB000000             .4byte  .LASF43\r
- 317 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 318 001d 00000000             .4byte  0\r
- 319 0021 00000000             .4byte  0\r
- 320 0025 00000000             .4byte  .Ldebug_line0\r
- 321 0029 02                   .uleb128 0x2\r
- 322 002a 01                   .byte   0x1\r
- 323 002b 06                   .byte   0x6\r
- 324 002c 56020000             .4byte  .LASF0\r
- 325 0030 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 15\r
-\r
-\r
- 326 0031 01                   .byte   0x1\r
- 327 0032 08                   .byte   0x8\r
- 328 0033 90000000             .4byte  .LASF1\r
- 329 0037 02                   .uleb128 0x2\r
- 330 0038 02                   .byte   0x2\r
- 331 0039 05                   .byte   0x5\r
- 332 003a C5010000             .4byte  .LASF2\r
- 333 003e 02                   .uleb128 0x2\r
- 334 003f 02                   .byte   0x2\r
- 335 0040 07                   .byte   0x7\r
- 336 0041 4C000000             .4byte  .LASF3\r
- 337 0045 02                   .uleb128 0x2\r
- 338 0046 04                   .byte   0x4\r
- 339 0047 05                   .byte   0x5\r
- 340 0048 3F020000             .4byte  .LASF4\r
- 341 004c 02                   .uleb128 0x2\r
- 342 004d 04                   .byte   0x4\r
- 343 004e 07                   .byte   0x7\r
- 344 004f A9000000             .4byte  .LASF5\r
- 345 0053 02                   .uleb128 0x2\r
- 346 0054 08                   .byte   0x8\r
- 347 0055 05                   .byte   0x5\r
- 348 0056 9E010000             .4byte  .LASF6\r
- 349 005a 02                   .uleb128 0x2\r
- 350 005b 08                   .byte   0x8\r
- 351 005c 07                   .byte   0x7\r
- 352 005d 4B010000             .4byte  .LASF7\r
- 353 0061 03                   .uleb128 0x3\r
- 354 0062 04                   .byte   0x4\r
- 355 0063 05                   .byte   0x5\r
- 356 0064 696E7400             .ascii  "int\000"\r
- 357 0068 02                   .uleb128 0x2\r
- 358 0069 04                   .byte   0x4\r
- 359 006a 07                   .byte   0x7\r
- 360 006b 31010000             .4byte  .LASF8\r
- 361 006f 04                   .uleb128 0x4\r
- 362 0070 EC000000             .4byte  .LASF9\r
- 363 0074 02                   .byte   0x2\r
- 364 0075 5B                   .byte   0x5b\r
- 365 0076 30000000             .4byte  0x30\r
- 366 007a 04                   .uleb128 0x4\r
- 367 007b 2A010000             .4byte  .LASF10\r
- 368 007f 02                   .byte   0x2\r
- 369 0080 5D                   .byte   0x5d\r
- 370 0081 4C000000             .4byte  0x4c\r
- 371 0085 02                   .uleb128 0x2\r
- 372 0086 04                   .byte   0x4\r
- 373 0087 04                   .byte   0x4\r
- 374 0088 85000000             .4byte  .LASF11\r
- 375 008c 02                   .uleb128 0x2\r
- 376 008d 08                   .byte   0x8\r
- 377 008e 04                   .byte   0x4\r
- 378 008f 62020000             .4byte  .LASF12\r
- 379 0093 02                   .uleb128 0x2\r
- 380 0094 01                   .byte   0x1\r
- 381 0095 08                   .byte   0x8\r
- 382 0096 AC010000             .4byte  .LASF13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 16\r
-\r
-\r
- 383 009a 04                   .uleb128 0x4\r
- 384 009b 90010000             .4byte  .LASF14\r
- 385 009f 02                   .byte   0x2\r
- 386 00a0 F0                   .byte   0xf0\r
- 387 00a1 A5000000             .4byte  0xa5\r
- 388 00a5 05                   .uleb128 0x5\r
- 389 00a6 6F000000             .4byte  0x6f\r
- 390 00aa 04                   .uleb128 0x4\r
- 391 00ab 24000000             .4byte  .LASF15\r
- 392 00af 02                   .byte   0x2\r
- 393 00b0 F2                   .byte   0xf2\r
- 394 00b1 B5000000             .4byte  0xb5\r
- 395 00b5 05                   .uleb128 0x5\r
- 396 00b6 7A000000             .4byte  0x7a\r
- 397 00ba 06                   .uleb128 0x6\r
- 398 00bb 68010000             .4byte  .LASF16\r
- 399 00bf 02                   .byte   0x2\r
- 400 00c0 0201                 .2byte  0x102\r
- 401 00c2 C6000000             .4byte  0xc6\r
- 402 00c6 07                   .uleb128 0x7\r
- 403 00c7 04                   .byte   0x4\r
- 404 00c8 CC000000             .4byte  0xcc\r
- 405 00cc 08                   .uleb128 0x8\r
- 406 00cd 01                   .byte   0x1\r
- 407 00ce 02                   .uleb128 0x2\r
- 408 00cf 04                   .byte   0x4\r
- 409 00d0 07                   .byte   0x7\r
- 410 00d1 95010000             .4byte  .LASF17\r
- 411 00d5 09                   .uleb128 0x9\r
- 412 00d6 93000000             .4byte  0x93\r
- 413 00da 04                   .uleb128 0x4\r
- 414 00db 2A000000             .4byte  .LASF18\r
- 415 00df 03                   .byte   0x3\r
- 416 00e0 D5                   .byte   0xd5\r
- 417 00e1 68000000             .4byte  0x68\r
- 418 00e5 04                   .uleb128 0x4\r
- 419 00e6 7F010000             .4byte  .LASF19\r
- 420 00ea 01                   .byte   0x1\r
- 421 00eb C7                   .byte   0xc7\r
- 422 00ec 30000000             .4byte  0x30\r
- 423 00f0 0A                   .uleb128 0xa\r
- 424 00f1 7E020000             .4byte  .LASF44\r
- 425 00f5 10                   .byte   0x10\r
- 426 00f6 01                   .byte   0x1\r
- 427 00f7 C9                   .byte   0xc9\r
- 428 00f8 35010000             .4byte  0x135\r
- 429 00fc 0B                   .uleb128 0xb\r
- 430 00fd 6F000000             .4byte  .LASF20\r
- 431 0101 01                   .byte   0x1\r
- 432 0102 CB                   .byte   0xcb\r
- 433 0103 35010000             .4byte  0x135\r
- 434 0107 02                   .byte   0x2\r
- 435 0108 23                   .byte   0x23\r
- 436 0109 00                   .uleb128 0\r
- 437 010a 0B                   .uleb128 0xb\r
- 438 010b 8B000000             .4byte  .LASF21\r
- 439 010f 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 17\r
-\r
-\r
- 440 0110 CC                   .byte   0xcc\r
- 441 0111 35010000             .4byte  0x135\r
- 442 0115 02                   .byte   0x2\r
- 443 0116 23                   .byte   0x23\r
- 444 0117 04                   .uleb128 0x4\r
- 445 0118 0B                   .uleb128 0xb\r
- 446 0119 75010000             .4byte  .LASF22\r
- 447 011d 01                   .byte   0x1\r
- 448 011e CD                   .byte   0xcd\r
- 449 011f DA000000             .4byte  0xda\r
- 450 0123 02                   .byte   0x2\r
- 451 0124 23                   .byte   0x23\r
- 452 0125 08                   .uleb128 0x8\r
- 453 0126 0B                   .uleb128 0xb\r
- 454 0127 7B000000             .4byte  .LASF23\r
- 455 012b 01                   .byte   0x1\r
- 456 012c CE                   .byte   0xce\r
- 457 012d DA000000             .4byte  0xda\r
- 458 0131 02                   .byte   0x2\r
- 459 0132 23                   .byte   0x23\r
- 460 0133 0C                   .uleb128 0xc\r
- 461 0134 00                   .byte   0\r
- 462 0135 07                   .uleb128 0x7\r
- 463 0136 04                   .byte   0x4\r
- 464 0137 E5000000             .4byte  0xe5\r
- 465 013b 0C                   .uleb128 0xc\r
- 466 013c 01                   .byte   0x1\r
- 467 013d FE000000             .4byte  .LASF45\r
- 468 0141 01                   .byte   0x1\r
- 469 0142 5C                   .byte   0x5c\r
- 470 0143 01                   .byte   0x1\r
- 471 0144 00000000             .4byte  .LFB0\r
- 472 0148 02000000             .4byte  .LFE0\r
- 473 014c 02                   .byte   0x2\r
- 474 014d 7D                   .byte   0x7d\r
- 475 014e 00                   .sleb128 0\r
- 476 014f 01                   .byte   0x1\r
- 477 0150 0D                   .uleb128 0xd\r
- 478 0151 01                   .byte   0x1\r
- 479 0152 F8000000             .4byte  .LASF24\r
- 480 0156 01                   .byte   0x1\r
- 481 0157 FD                   .byte   0xfd\r
- 482 0158 01                   .byte   0x1\r
- 483 0159 00000000             .4byte  .LFB2\r
- 484 015d 02000000             .4byte  .LFE2\r
- 485 0161 02                   .byte   0x2\r
- 486 0162 7D                   .byte   0x7d\r
- 487 0163 00                   .sleb128 0\r
- 488 0164 01                   .byte   0x1\r
- 489 0165 81010000             .4byte  0x181\r
- 490 0169 0E                   .uleb128 0xe\r
- 491 016a 74000000             .4byte  .LASF46\r
- 492 016e 01                   .byte   0x1\r
- 493 016f FD                   .byte   0xfd\r
- 494 0170 61000000             .4byte  0x61\r
- 495 0174 01                   .byte   0x1\r
- 496 0175 50                   .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 18\r
-\r
-\r
- 497 0176 0F                   .uleb128 0xf\r
- 498 0177 7800                 .ascii  "x\000"\r
- 499 0179 01                   .byte   0x1\r
- 500 017a 0001                 .2byte  0x100\r
- 501 017c 61000000             .4byte  0x61\r
- 502 0180 00                   .byte   0\r
- 503 0181 10                   .uleb128 0x10\r
- 504 0182 01                   .byte   0x1\r
- 505 0183 3E000000             .4byte  .LASF25\r
- 506 0187 01                   .byte   0x1\r
- 507 0188 1901                 .2byte  0x119\r
- 508 018a 01                   .byte   0x1\r
- 509 018b 00000000             .4byte  .LFB3\r
- 510 018f 54000000             .4byte  .LFE3\r
- 511 0193 00000000             .4byte  .LLST0\r
- 512 0197 01                   .byte   0x1\r
- 513 0198 15020000             .4byte  0x215\r
- 514 019c 11                   .uleb128 0x11\r
- 515 019d 76020000             .4byte  .LASF26\r
- 516 01a1 01                   .byte   0x1\r
- 517 01a2 1B01                 .2byte  0x11b\r
- 518 01a4 68000000             .4byte  0x68\r
- 519 01a8 11                   .uleb128 0x11\r
- 520 01a9 10010000             .4byte  .LASF27\r
- 521 01ad 01                   .byte   0x1\r
- 522 01ae 1C01                 .2byte  0x11c\r
- 523 01b0 15020000             .4byte  0x215\r
- 524 01b4 12                   .uleb128 0x12\r
- 525 01b5 0A000000             .4byte  .LBB2\r
- 526 01b9 40000000             .4byte  .LBE2\r
- 527 01bd 02020000             .4byte  0x202\r
- 528 01c1 13                   .uleb128 0x13\r
- 529 01c2 73726300             .ascii  "src\000"\r
- 530 01c6 01                   .byte   0x1\r
- 531 01c7 2101                 .2byte  0x121\r
- 532 01c9 20020000             .4byte  0x220\r
- 533 01cd 20000000             .4byte  .LLST1\r
- 534 01d1 13                   .uleb128 0x13\r
- 535 01d2 64737400             .ascii  "dst\000"\r
- 536 01d6 01                   .byte   0x1\r
- 537 01d7 2201                 .2byte  0x122\r
- 538 01d9 20020000             .4byte  0x220\r
- 539 01dd 33000000             .4byte  .LLST2\r
- 540 01e1 14                   .uleb128 0x14\r
- 541 01e2 62010000             .4byte  .LASF28\r
- 542 01e6 01                   .byte   0x1\r
- 543 01e7 2301                 .2byte  0x123\r
- 544 01e9 68000000             .4byte  0x68\r
- 545 01ed 46000000             .4byte  .LLST3\r
- 546 01f1 14                   .uleb128 0x14\r
- 547 01f2 46000000             .4byte  .LASF29\r
- 548 01f6 01                   .byte   0x1\r
- 549 01f7 2401                 .2byte  0x124\r
- 550 01f9 68000000             .4byte  0x68\r
- 551 01fd 64000000             .4byte  .LLST4\r
- 552 0201 00                   .byte   0\r
- 553 0202 15                   .uleb128 0x15\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 19\r
-\r
-\r
- 554 0203 44000000             .4byte  .LVL13\r
- 555 0207 18030000             .4byte  0x318\r
- 556 020b 15                   .uleb128 0x15\r
- 557 020c 48000000             .4byte  .LVL14\r
- 558 0210 22030000             .4byte  0x322\r
- 559 0214 00                   .byte   0\r
- 560 0215 07                   .uleb128 0x7\r
- 561 0216 04                   .byte   0x4\r
- 562 0217 1B020000             .4byte  0x21b\r
- 563 021b 09                   .uleb128 0x9\r
- 564 021c F0000000             .4byte  0xf0\r
- 565 0220 07                   .uleb128 0x7\r
- 566 0221 04                   .byte   0x4\r
- 567 0222 7A000000             .4byte  0x7a\r
- 568 0226 16                   .uleb128 0x16\r
- 569 0227 01                   .byte   0x1\r
- 570 0228 F2000000             .4byte  .LASF30\r
- 571 022c 01                   .byte   0x1\r
- 572 022d E5                   .byte   0xe5\r
- 573 022e 01                   .byte   0x1\r
- 574 022f 00000000             .4byte  .LFB1\r
- 575 0233 1C000000             .4byte  .LFE1\r
- 576 0237 9A000000             .4byte  .LLST5\r
- 577 023b 01                   .byte   0x1\r
- 578 023c 53020000             .4byte  0x253\r
- 579 0240 15                   .uleb128 0x15\r
- 580 0241 0E000000             .4byte  .LVL15\r
- 581 0245 30030000             .4byte  0x330\r
- 582 0249 15                   .uleb128 0x15\r
- 583 024a 12000000             .4byte  .LVL16\r
- 584 024e 81010000             .4byte  0x181\r
- 585 0252 00                   .byte   0\r
- 586 0253 10                   .uleb128 0x10\r
- 587 0254 01                   .byte   0x1\r
- 588 0255 1A010000             .4byte  .LASF31\r
- 589 0259 01                   .byte   0x1\r
- 590 025a A201                 .2byte  0x1a2\r
- 591 025c 01                   .byte   0x1\r
- 592 025d 00000000             .4byte  .LFB4\r
- 593 0261 68000000             .4byte  .LFE4\r
- 594 0265 BA000000             .4byte  .LLST6\r
- 595 0269 01                   .byte   0x1\r
- 596 026a 86020000             .4byte  0x286\r
- 597 026e 13                   .uleb128 0x13\r
- 598 026f 6900                 .ascii  "i\000"\r
- 599 0271 01                   .byte   0x1\r
- 600 0272 A401                 .2byte  0x1a4\r
- 601 0274 7A000000             .4byte  0x7a\r
- 602 0278 DA000000             .4byte  .LLST7\r
- 603 027c 15                   .uleb128 0x15\r
- 604 027d 3A000000             .4byte  .LVL21\r
- 605 0281 3A030000             .4byte  0x33a\r
- 606 0285 00                   .byte   0\r
- 607 0286 17                   .uleb128 0x17\r
- 608 0287 CF010000             .4byte  .LASF32\r
- 609 028b 01                   .byte   0x1\r
- 610 028c 39                   .byte   0x39\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 20\r
-\r
-\r
- 611 028d 7A000000             .4byte  0x7a\r
- 612 0291 05                   .byte   0x5\r
- 613 0292 03                   .byte   0x3\r
- 614 0293 00000000             .4byte  cySysNoInitDataValid\r
- 615 0297 18                   .uleb128 0x18\r
- 616 0298 48020000             .4byte  .LASF33\r
- 617 029c 04                   .byte   0x4\r
- 618 029d 2D                   .byte   0x2d\r
- 619 029e 6F000000             .4byte  0x6f\r
- 620 02a2 01                   .byte   0x1\r
- 621 02a3 01                   .byte   0x1\r
- 622 02a4 19                   .uleb128 0x19\r
- 623 02a5 BA000000             .4byte  0xba\r
- 624 02a9 B4020000             .4byte  0x2b4\r
- 625 02ad 1A                   .uleb128 0x1a\r
- 626 02ae CE000000             .4byte  0xce\r
- 627 02b2 2F                   .byte   0x2f\r
- 628 02b3 00                   .byte   0\r
- 629 02b4 1B                   .uleb128 0x1b\r
- 630 02b5 31000000             .4byte  .LASF34\r
- 631 02b9 01                   .byte   0x1\r
- 632 02ba 47                   .byte   0x47\r
- 633 02bb A4020000             .4byte  0x2a4\r
- 634 02bf 01                   .byte   0x1\r
- 635 02c0 05                   .byte   0x5\r
- 636 02c1 03                   .byte   0x3\r
- 637 02c2 00000000             .4byte  CyRamVectors\r
- 638 02c6 19                   .uleb128 0x19\r
- 639 02c7 F0000000             .4byte  0xf0\r
- 640 02cb D1020000             .4byte  0x2d1\r
- 641 02cf 1C                   .uleb128 0x1c\r
- 642 02d0 00                   .byte   0\r
- 643 02d1 18                   .uleb128 0x18\r
- 644 02d2 69020000             .4byte  .LASF35\r
- 645 02d6 01                   .byte   0x1\r
- 646 02d7 D1                   .byte   0xd1\r
- 647 02d8 DE020000             .4byte  0x2de\r
- 648 02dc 01                   .byte   0x1\r
- 649 02dd 01                   .byte   0x1\r
- 650 02de 09                   .uleb128 0x9\r
- 651 02df C6020000             .4byte  0x2c6\r
- 652 02e3 18                   .uleb128 0x18\r
- 653 02e4 5F000000             .4byte  .LASF36\r
- 654 02e8 01                   .byte   0x1\r
- 655 02e9 D2                   .byte   0xd2\r
- 656 02ea D5000000             .4byte  0xd5\r
- 657 02ee 01                   .byte   0x1\r
- 658 02ef 01                   .byte   0x1\r
- 659 02f0 19                   .uleb128 0x19\r
- 660 02f1 BA000000             .4byte  0xba\r
- 661 02f5 00030000             .4byte  0x300\r
- 662 02f9 1A                   .uleb128 0x1a\r
- 663 02fa CE000000             .4byte  0xce\r
- 664 02fe 03                   .byte   0x3\r
- 665 02ff 00                   .byte   0\r
- 666 0300 1D                   .uleb128 0x1d\r
- 667 0301 9E000000             .4byte  .LASF37\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 21\r
-\r
-\r
- 668 0305 01                   .byte   0x1\r
- 669 0306 7F01                 .2byte  0x17f\r
- 670 0308 13030000             .4byte  0x313\r
- 671 030c 01                   .byte   0x1\r
- 672 030d 05                   .byte   0x5\r
- 673 030e 03                   .byte   0x3\r
- 674 030f 00000000             .4byte  RomVectors\r
- 675 0313 09                   .uleb128 0x9\r
- 676 0314 F0020000             .4byte  0x2f0\r
- 677 0318 1E                   .uleb128 0x1e\r
- 678 0319 01                   .byte   0x1\r
- 679 031a 2D020000             .4byte  .LASF38\r
- 680 031e 01                   .byte   0x1\r
- 681 031f C5                   .byte   0xc5\r
- 682 0320 01                   .byte   0x1\r
- 683 0321 01                   .byte   0x1\r
- 684 0322 1F                   .uleb128 0x1f\r
- 685 0323 01                   .byte   0x1\r
- 686 0324 15010000             .4byte  .LASF47\r
- 687 0328 01                   .byte   0x1\r
- 688 0329 C2                   .byte   0xc2\r
- 689 032a 01                   .byte   0x1\r
- 690 032b 61000000             .4byte  0x61\r
- 691 032f 01                   .byte   0x1\r
- 692 0330 1E                   .uleb128 0x1e\r
- 693 0331 01                   .byte   0x1\r
- 694 0332 B1010000             .4byte  .LASF39\r
- 695 0336 01                   .byte   0x1\r
- 696 0337 22                   .byte   0x22\r
- 697 0338 01                   .byte   0x1\r
- 698 0339 01                   .byte   0x1\r
- 699 033a 1E                   .uleb128 0x1e\r
- 700 033b 01                   .byte   0x1\r
- 701 033c 3E010000             .4byte  .LASF40\r
- 702 0340 05                   .byte   0x5\r
- 703 0341 14                   .byte   0x14\r
- 704 0342 01                   .byte   0x1\r
- 705 0343 01                   .byte   0x1\r
- 706 0344 00                   .byte   0\r
- 707                           .section        .debug_abbrev,"",%progbits\r
- 708                   .Ldebug_abbrev0:\r
- 709 0000 01                   .uleb128 0x1\r
- 710 0001 11                   .uleb128 0x11\r
- 711 0002 01                   .byte   0x1\r
- 712 0003 25                   .uleb128 0x25\r
- 713 0004 0E                   .uleb128 0xe\r
- 714 0005 13                   .uleb128 0x13\r
- 715 0006 0B                   .uleb128 0xb\r
- 716 0007 03                   .uleb128 0x3\r
- 717 0008 0E                   .uleb128 0xe\r
- 718 0009 1B                   .uleb128 0x1b\r
- 719 000a 0E                   .uleb128 0xe\r
- 720 000b 55                   .uleb128 0x55\r
- 721 000c 06                   .uleb128 0x6\r
- 722 000d 11                   .uleb128 0x11\r
- 723 000e 01                   .uleb128 0x1\r
- 724 000f 52                   .uleb128 0x52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 22\r
-\r
-\r
- 725 0010 01                   .uleb128 0x1\r
- 726 0011 10                   .uleb128 0x10\r
- 727 0012 06                   .uleb128 0x6\r
- 728 0013 00                   .byte   0\r
- 729 0014 00                   .byte   0\r
- 730 0015 02                   .uleb128 0x2\r
- 731 0016 24                   .uleb128 0x24\r
- 732 0017 00                   .byte   0\r
- 733 0018 0B                   .uleb128 0xb\r
- 734 0019 0B                   .uleb128 0xb\r
- 735 001a 3E                   .uleb128 0x3e\r
- 736 001b 0B                   .uleb128 0xb\r
- 737 001c 03                   .uleb128 0x3\r
- 738 001d 0E                   .uleb128 0xe\r
- 739 001e 00                   .byte   0\r
- 740 001f 00                   .byte   0\r
- 741 0020 03                   .uleb128 0x3\r
- 742 0021 24                   .uleb128 0x24\r
- 743 0022 00                   .byte   0\r
- 744 0023 0B                   .uleb128 0xb\r
- 745 0024 0B                   .uleb128 0xb\r
- 746 0025 3E                   .uleb128 0x3e\r
- 747 0026 0B                   .uleb128 0xb\r
- 748 0027 03                   .uleb128 0x3\r
- 749 0028 08                   .uleb128 0x8\r
- 750 0029 00                   .byte   0\r
- 751 002a 00                   .byte   0\r
- 752 002b 04                   .uleb128 0x4\r
- 753 002c 16                   .uleb128 0x16\r
- 754 002d 00                   .byte   0\r
- 755 002e 03                   .uleb128 0x3\r
- 756 002f 0E                   .uleb128 0xe\r
- 757 0030 3A                   .uleb128 0x3a\r
- 758 0031 0B                   .uleb128 0xb\r
- 759 0032 3B                   .uleb128 0x3b\r
- 760 0033 0B                   .uleb128 0xb\r
- 761 0034 49                   .uleb128 0x49\r
- 762 0035 13                   .uleb128 0x13\r
- 763 0036 00                   .byte   0\r
- 764 0037 00                   .byte   0\r
- 765 0038 05                   .uleb128 0x5\r
- 766 0039 35                   .uleb128 0x35\r
- 767 003a 00                   .byte   0\r
- 768 003b 49                   .uleb128 0x49\r
- 769 003c 13                   .uleb128 0x13\r
- 770 003d 00                   .byte   0\r
- 771 003e 00                   .byte   0\r
- 772 003f 06                   .uleb128 0x6\r
- 773 0040 16                   .uleb128 0x16\r
- 774 0041 00                   .byte   0\r
- 775 0042 03                   .uleb128 0x3\r
- 776 0043 0E                   .uleb128 0xe\r
- 777 0044 3A                   .uleb128 0x3a\r
- 778 0045 0B                   .uleb128 0xb\r
- 779 0046 3B                   .uleb128 0x3b\r
- 780 0047 05                   .uleb128 0x5\r
- 781 0048 49                   .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 23\r
-\r
-\r
- 782 0049 13                   .uleb128 0x13\r
- 783 004a 00                   .byte   0\r
- 784 004b 00                   .byte   0\r
- 785 004c 07                   .uleb128 0x7\r
- 786 004d 0F                   .uleb128 0xf\r
- 787 004e 00                   .byte   0\r
- 788 004f 0B                   .uleb128 0xb\r
- 789 0050 0B                   .uleb128 0xb\r
- 790 0051 49                   .uleb128 0x49\r
- 791 0052 13                   .uleb128 0x13\r
- 792 0053 00                   .byte   0\r
- 793 0054 00                   .byte   0\r
- 794 0055 08                   .uleb128 0x8\r
- 795 0056 15                   .uleb128 0x15\r
- 796 0057 00                   .byte   0\r
- 797 0058 27                   .uleb128 0x27\r
- 798 0059 0C                   .uleb128 0xc\r
- 799 005a 00                   .byte   0\r
- 800 005b 00                   .byte   0\r
- 801 005c 09                   .uleb128 0x9\r
- 802 005d 26                   .uleb128 0x26\r
- 803 005e 00                   .byte   0\r
- 804 005f 49                   .uleb128 0x49\r
- 805 0060 13                   .uleb128 0x13\r
- 806 0061 00                   .byte   0\r
- 807 0062 00                   .byte   0\r
- 808 0063 0A                   .uleb128 0xa\r
- 809 0064 13                   .uleb128 0x13\r
- 810 0065 01                   .byte   0x1\r
- 811 0066 03                   .uleb128 0x3\r
- 812 0067 0E                   .uleb128 0xe\r
- 813 0068 0B                   .uleb128 0xb\r
- 814 0069 0B                   .uleb128 0xb\r
- 815 006a 3A                   .uleb128 0x3a\r
- 816 006b 0B                   .uleb128 0xb\r
- 817 006c 3B                   .uleb128 0x3b\r
- 818 006d 0B                   .uleb128 0xb\r
- 819 006e 01                   .uleb128 0x1\r
- 820 006f 13                   .uleb128 0x13\r
- 821 0070 00                   .byte   0\r
- 822 0071 00                   .byte   0\r
- 823 0072 0B                   .uleb128 0xb\r
- 824 0073 0D                   .uleb128 0xd\r
- 825 0074 00                   .byte   0\r
- 826 0075 03                   .uleb128 0x3\r
- 827 0076 0E                   .uleb128 0xe\r
- 828 0077 3A                   .uleb128 0x3a\r
- 829 0078 0B                   .uleb128 0xb\r
- 830 0079 3B                   .uleb128 0x3b\r
- 831 007a 0B                   .uleb128 0xb\r
- 832 007b 49                   .uleb128 0x49\r
- 833 007c 13                   .uleb128 0x13\r
- 834 007d 38                   .uleb128 0x38\r
- 835 007e 0A                   .uleb128 0xa\r
- 836 007f 00                   .byte   0\r
- 837 0080 00                   .byte   0\r
- 838 0081 0C                   .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 24\r
-\r
-\r
- 839 0082 2E                   .uleb128 0x2e\r
- 840 0083 00                   .byte   0\r
- 841 0084 3F                   .uleb128 0x3f\r
- 842 0085 0C                   .uleb128 0xc\r
- 843 0086 03                   .uleb128 0x3\r
- 844 0087 0E                   .uleb128 0xe\r
- 845 0088 3A                   .uleb128 0x3a\r
- 846 0089 0B                   .uleb128 0xb\r
- 847 008a 3B                   .uleb128 0x3b\r
- 848 008b 0B                   .uleb128 0xb\r
- 849 008c 27                   .uleb128 0x27\r
- 850 008d 0C                   .uleb128 0xc\r
- 851 008e 11                   .uleb128 0x11\r
- 852 008f 01                   .uleb128 0x1\r
- 853 0090 12                   .uleb128 0x12\r
- 854 0091 01                   .uleb128 0x1\r
- 855 0092 40                   .uleb128 0x40\r
- 856 0093 0A                   .uleb128 0xa\r
- 857 0094 9742                 .uleb128 0x2117\r
- 858 0096 0C                   .uleb128 0xc\r
- 859 0097 00                   .byte   0\r
- 860 0098 00                   .byte   0\r
- 861 0099 0D                   .uleb128 0xd\r
- 862 009a 2E                   .uleb128 0x2e\r
- 863 009b 01                   .byte   0x1\r
- 864 009c 3F                   .uleb128 0x3f\r
- 865 009d 0C                   .uleb128 0xc\r
- 866 009e 03                   .uleb128 0x3\r
- 867 009f 0E                   .uleb128 0xe\r
- 868 00a0 3A                   .uleb128 0x3a\r
- 869 00a1 0B                   .uleb128 0xb\r
- 870 00a2 3B                   .uleb128 0x3b\r
- 871 00a3 0B                   .uleb128 0xb\r
- 872 00a4 27                   .uleb128 0x27\r
- 873 00a5 0C                   .uleb128 0xc\r
- 874 00a6 11                   .uleb128 0x11\r
- 875 00a7 01                   .uleb128 0x1\r
- 876 00a8 12                   .uleb128 0x12\r
- 877 00a9 01                   .uleb128 0x1\r
- 878 00aa 40                   .uleb128 0x40\r
- 879 00ab 0A                   .uleb128 0xa\r
- 880 00ac 9742                 .uleb128 0x2117\r
- 881 00ae 0C                   .uleb128 0xc\r
- 882 00af 01                   .uleb128 0x1\r
- 883 00b0 13                   .uleb128 0x13\r
- 884 00b1 00                   .byte   0\r
- 885 00b2 00                   .byte   0\r
- 886 00b3 0E                   .uleb128 0xe\r
- 887 00b4 05                   .uleb128 0x5\r
- 888 00b5 00                   .byte   0\r
- 889 00b6 03                   .uleb128 0x3\r
- 890 00b7 0E                   .uleb128 0xe\r
- 891 00b8 3A                   .uleb128 0x3a\r
- 892 00b9 0B                   .uleb128 0xb\r
- 893 00ba 3B                   .uleb128 0x3b\r
- 894 00bb 0B                   .uleb128 0xb\r
- 895 00bc 49                   .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 25\r
-\r
-\r
- 896 00bd 13                   .uleb128 0x13\r
- 897 00be 02                   .uleb128 0x2\r
- 898 00bf 0A                   .uleb128 0xa\r
- 899 00c0 00                   .byte   0\r
- 900 00c1 00                   .byte   0\r
- 901 00c2 0F                   .uleb128 0xf\r
- 902 00c3 34                   .uleb128 0x34\r
- 903 00c4 00                   .byte   0\r
- 904 00c5 03                   .uleb128 0x3\r
- 905 00c6 08                   .uleb128 0x8\r
- 906 00c7 3A                   .uleb128 0x3a\r
- 907 00c8 0B                   .uleb128 0xb\r
- 908 00c9 3B                   .uleb128 0x3b\r
- 909 00ca 05                   .uleb128 0x5\r
- 910 00cb 49                   .uleb128 0x49\r
- 911 00cc 13                   .uleb128 0x13\r
- 912 00cd 00                   .byte   0\r
- 913 00ce 00                   .byte   0\r
- 914 00cf 10                   .uleb128 0x10\r
- 915 00d0 2E                   .uleb128 0x2e\r
- 916 00d1 01                   .byte   0x1\r
- 917 00d2 3F                   .uleb128 0x3f\r
- 918 00d3 0C                   .uleb128 0xc\r
- 919 00d4 03                   .uleb128 0x3\r
- 920 00d5 0E                   .uleb128 0xe\r
- 921 00d6 3A                   .uleb128 0x3a\r
- 922 00d7 0B                   .uleb128 0xb\r
- 923 00d8 3B                   .uleb128 0x3b\r
- 924 00d9 05                   .uleb128 0x5\r
- 925 00da 27                   .uleb128 0x27\r
- 926 00db 0C                   .uleb128 0xc\r
- 927 00dc 11                   .uleb128 0x11\r
- 928 00dd 01                   .uleb128 0x1\r
- 929 00de 12                   .uleb128 0x12\r
- 930 00df 01                   .uleb128 0x1\r
- 931 00e0 40                   .uleb128 0x40\r
- 932 00e1 06                   .uleb128 0x6\r
- 933 00e2 9742                 .uleb128 0x2117\r
- 934 00e4 0C                   .uleb128 0xc\r
- 935 00e5 01                   .uleb128 0x1\r
- 936 00e6 13                   .uleb128 0x13\r
- 937 00e7 00                   .byte   0\r
- 938 00e8 00                   .byte   0\r
- 939 00e9 11                   .uleb128 0x11\r
- 940 00ea 34                   .uleb128 0x34\r
- 941 00eb 00                   .byte   0\r
- 942 00ec 03                   .uleb128 0x3\r
- 943 00ed 0E                   .uleb128 0xe\r
- 944 00ee 3A                   .uleb128 0x3a\r
- 945 00ef 0B                   .uleb128 0xb\r
- 946 00f0 3B                   .uleb128 0x3b\r
- 947 00f1 05                   .uleb128 0x5\r
- 948 00f2 49                   .uleb128 0x49\r
- 949 00f3 13                   .uleb128 0x13\r
- 950 00f4 00                   .byte   0\r
- 951 00f5 00                   .byte   0\r
- 952 00f6 12                   .uleb128 0x12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 26\r
-\r
-\r
- 953 00f7 0B                   .uleb128 0xb\r
- 954 00f8 01                   .byte   0x1\r
- 955 00f9 11                   .uleb128 0x11\r
- 956 00fa 01                   .uleb128 0x1\r
- 957 00fb 12                   .uleb128 0x12\r
- 958 00fc 01                   .uleb128 0x1\r
- 959 00fd 01                   .uleb128 0x1\r
- 960 00fe 13                   .uleb128 0x13\r
- 961 00ff 00                   .byte   0\r
- 962 0100 00                   .byte   0\r
- 963 0101 13                   .uleb128 0x13\r
- 964 0102 34                   .uleb128 0x34\r
- 965 0103 00                   .byte   0\r
- 966 0104 03                   .uleb128 0x3\r
- 967 0105 08                   .uleb128 0x8\r
- 968 0106 3A                   .uleb128 0x3a\r
- 969 0107 0B                   .uleb128 0xb\r
- 970 0108 3B                   .uleb128 0x3b\r
- 971 0109 05                   .uleb128 0x5\r
- 972 010a 49                   .uleb128 0x49\r
- 973 010b 13                   .uleb128 0x13\r
- 974 010c 02                   .uleb128 0x2\r
- 975 010d 06                   .uleb128 0x6\r
- 976 010e 00                   .byte   0\r
- 977 010f 00                   .byte   0\r
- 978 0110 14                   .uleb128 0x14\r
- 979 0111 34                   .uleb128 0x34\r
- 980 0112 00                   .byte   0\r
- 981 0113 03                   .uleb128 0x3\r
- 982 0114 0E                   .uleb128 0xe\r
- 983 0115 3A                   .uleb128 0x3a\r
- 984 0116 0B                   .uleb128 0xb\r
- 985 0117 3B                   .uleb128 0x3b\r
- 986 0118 05                   .uleb128 0x5\r
- 987 0119 49                   .uleb128 0x49\r
- 988 011a 13                   .uleb128 0x13\r
- 989 011b 02                   .uleb128 0x2\r
- 990 011c 06                   .uleb128 0x6\r
- 991 011d 00                   .byte   0\r
- 992 011e 00                   .byte   0\r
- 993 011f 15                   .uleb128 0x15\r
- 994 0120 898201               .uleb128 0x4109\r
- 995 0123 00                   .byte   0\r
- 996 0124 11                   .uleb128 0x11\r
- 997 0125 01                   .uleb128 0x1\r
- 998 0126 31                   .uleb128 0x31\r
- 999 0127 13                   .uleb128 0x13\r
- 1000 0128 00                  .byte   0\r
- 1001 0129 00                  .byte   0\r
- 1002 012a 16                  .uleb128 0x16\r
- 1003 012b 2E                  .uleb128 0x2e\r
- 1004 012c 01                  .byte   0x1\r
- 1005 012d 3F                  .uleb128 0x3f\r
- 1006 012e 0C                  .uleb128 0xc\r
- 1007 012f 03                  .uleb128 0x3\r
- 1008 0130 0E                  .uleb128 0xe\r
- 1009 0131 3A                  .uleb128 0x3a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 27\r
-\r
-\r
- 1010 0132 0B                  .uleb128 0xb\r
- 1011 0133 3B                  .uleb128 0x3b\r
- 1012 0134 0B                  .uleb128 0xb\r
- 1013 0135 27                  .uleb128 0x27\r
- 1014 0136 0C                  .uleb128 0xc\r
- 1015 0137 11                  .uleb128 0x11\r
- 1016 0138 01                  .uleb128 0x1\r
- 1017 0139 12                  .uleb128 0x12\r
- 1018 013a 01                  .uleb128 0x1\r
- 1019 013b 40                  .uleb128 0x40\r
- 1020 013c 06                  .uleb128 0x6\r
- 1021 013d 9742                .uleb128 0x2117\r
- 1022 013f 0C                  .uleb128 0xc\r
- 1023 0140 01                  .uleb128 0x1\r
- 1024 0141 13                  .uleb128 0x13\r
- 1025 0142 00                  .byte   0\r
- 1026 0143 00                  .byte   0\r
- 1027 0144 17                  .uleb128 0x17\r
- 1028 0145 34                  .uleb128 0x34\r
- 1029 0146 00                  .byte   0\r
- 1030 0147 03                  .uleb128 0x3\r
- 1031 0148 0E                  .uleb128 0xe\r
- 1032 0149 3A                  .uleb128 0x3a\r
- 1033 014a 0B                  .uleb128 0xb\r
- 1034 014b 3B                  .uleb128 0x3b\r
- 1035 014c 0B                  .uleb128 0xb\r
- 1036 014d 49                  .uleb128 0x49\r
- 1037 014e 13                  .uleb128 0x13\r
- 1038 014f 02                  .uleb128 0x2\r
- 1039 0150 0A                  .uleb128 0xa\r
- 1040 0151 00                  .byte   0\r
- 1041 0152 00                  .byte   0\r
- 1042 0153 18                  .uleb128 0x18\r
- 1043 0154 34                  .uleb128 0x34\r
- 1044 0155 00                  .byte   0\r
- 1045 0156 03                  .uleb128 0x3\r
- 1046 0157 0E                  .uleb128 0xe\r
- 1047 0158 3A                  .uleb128 0x3a\r
- 1048 0159 0B                  .uleb128 0xb\r
- 1049 015a 3B                  .uleb128 0x3b\r
- 1050 015b 0B                  .uleb128 0xb\r
- 1051 015c 49                  .uleb128 0x49\r
- 1052 015d 13                  .uleb128 0x13\r
- 1053 015e 3F                  .uleb128 0x3f\r
- 1054 015f 0C                  .uleb128 0xc\r
- 1055 0160 3C                  .uleb128 0x3c\r
- 1056 0161 0C                  .uleb128 0xc\r
- 1057 0162 00                  .byte   0\r
- 1058 0163 00                  .byte   0\r
- 1059 0164 19                  .uleb128 0x19\r
- 1060 0165 01                  .uleb128 0x1\r
- 1061 0166 01                  .byte   0x1\r
- 1062 0167 49                  .uleb128 0x49\r
- 1063 0168 13                  .uleb128 0x13\r
- 1064 0169 01                  .uleb128 0x1\r
- 1065 016a 13                  .uleb128 0x13\r
- 1066 016b 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 28\r
-\r
-\r
- 1067 016c 00                  .byte   0\r
- 1068 016d 1A                  .uleb128 0x1a\r
- 1069 016e 21                  .uleb128 0x21\r
- 1070 016f 00                  .byte   0\r
- 1071 0170 49                  .uleb128 0x49\r
- 1072 0171 13                  .uleb128 0x13\r
- 1073 0172 2F                  .uleb128 0x2f\r
- 1074 0173 0B                  .uleb128 0xb\r
- 1075 0174 00                  .byte   0\r
- 1076 0175 00                  .byte   0\r
- 1077 0176 1B                  .uleb128 0x1b\r
- 1078 0177 34                  .uleb128 0x34\r
- 1079 0178 00                  .byte   0\r
- 1080 0179 03                  .uleb128 0x3\r
- 1081 017a 0E                  .uleb128 0xe\r
- 1082 017b 3A                  .uleb128 0x3a\r
- 1083 017c 0B                  .uleb128 0xb\r
- 1084 017d 3B                  .uleb128 0x3b\r
- 1085 017e 0B                  .uleb128 0xb\r
- 1086 017f 49                  .uleb128 0x49\r
- 1087 0180 13                  .uleb128 0x13\r
- 1088 0181 3F                  .uleb128 0x3f\r
- 1089 0182 0C                  .uleb128 0xc\r
- 1090 0183 02                  .uleb128 0x2\r
- 1091 0184 0A                  .uleb128 0xa\r
- 1092 0185 00                  .byte   0\r
- 1093 0186 00                  .byte   0\r
- 1094 0187 1C                  .uleb128 0x1c\r
- 1095 0188 21                  .uleb128 0x21\r
- 1096 0189 00                  .byte   0\r
- 1097 018a 00                  .byte   0\r
- 1098 018b 00                  .byte   0\r
- 1099 018c 1D                  .uleb128 0x1d\r
- 1100 018d 34                  .uleb128 0x34\r
- 1101 018e 00                  .byte   0\r
- 1102 018f 03                  .uleb128 0x3\r
- 1103 0190 0E                  .uleb128 0xe\r
- 1104 0191 3A                  .uleb128 0x3a\r
- 1105 0192 0B                  .uleb128 0xb\r
- 1106 0193 3B                  .uleb128 0x3b\r
- 1107 0194 05                  .uleb128 0x5\r
- 1108 0195 49                  .uleb128 0x49\r
- 1109 0196 13                  .uleb128 0x13\r
- 1110 0197 3F                  .uleb128 0x3f\r
- 1111 0198 0C                  .uleb128 0xc\r
- 1112 0199 02                  .uleb128 0x2\r
- 1113 019a 0A                  .uleb128 0xa\r
- 1114 019b 00                  .byte   0\r
- 1115 019c 00                  .byte   0\r
- 1116 019d 1E                  .uleb128 0x1e\r
- 1117 019e 2E                  .uleb128 0x2e\r
- 1118 019f 00                  .byte   0\r
- 1119 01a0 3F                  .uleb128 0x3f\r
- 1120 01a1 0C                  .uleb128 0xc\r
- 1121 01a2 03                  .uleb128 0x3\r
- 1122 01a3 0E                  .uleb128 0xe\r
- 1123 01a4 3A                  .uleb128 0x3a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 29\r
-\r
-\r
- 1124 01a5 0B                  .uleb128 0xb\r
- 1125 01a6 3B                  .uleb128 0x3b\r
- 1126 01a7 0B                  .uleb128 0xb\r
- 1127 01a8 27                  .uleb128 0x27\r
- 1128 01a9 0C                  .uleb128 0xc\r
- 1129 01aa 3C                  .uleb128 0x3c\r
- 1130 01ab 0C                  .uleb128 0xc\r
- 1131 01ac 00                  .byte   0\r
- 1132 01ad 00                  .byte   0\r
- 1133 01ae 1F                  .uleb128 0x1f\r
- 1134 01af 2E                  .uleb128 0x2e\r
- 1135 01b0 00                  .byte   0\r
- 1136 01b1 3F                  .uleb128 0x3f\r
- 1137 01b2 0C                  .uleb128 0xc\r
- 1138 01b3 03                  .uleb128 0x3\r
- 1139 01b4 0E                  .uleb128 0xe\r
- 1140 01b5 3A                  .uleb128 0x3a\r
- 1141 01b6 0B                  .uleb128 0xb\r
- 1142 01b7 3B                  .uleb128 0x3b\r
- 1143 01b8 0B                  .uleb128 0xb\r
- 1144 01b9 27                  .uleb128 0x27\r
- 1145 01ba 0C                  .uleb128 0xc\r
- 1146 01bb 49                  .uleb128 0x49\r
- 1147 01bc 13                  .uleb128 0x13\r
- 1148 01bd 3C                  .uleb128 0x3c\r
- 1149 01be 0C                  .uleb128 0xc\r
- 1150 01bf 00                  .byte   0\r
- 1151 01c0 00                  .byte   0\r
- 1152 01c1 00                  .byte   0\r
- 1153                          .section        .debug_loc,"",%progbits\r
- 1154                  .Ldebug_loc0:\r
- 1155                  .LLST0:\r
- 1156 0000 00000000            .4byte  .LFB3\r
- 1157 0004 02000000            .4byte  .LCFI0\r
- 1158 0008 0200                .2byte  0x2\r
- 1159 000a 7D                  .byte   0x7d\r
- 1160 000b 00                  .sleb128 0\r
- 1161 000c 02000000            .4byte  .LCFI0\r
- 1162 0010 54000000            .4byte  .LFE3\r
- 1163 0014 0200                .2byte  0x2\r
- 1164 0016 7D                  .byte   0x7d\r
- 1165 0017 08                  .sleb128 8\r
- 1166 0018 00000000            .4byte  0\r
- 1167 001c 00000000            .4byte  0\r
- 1168                  .LLST1:\r
- 1169 0020 0E000000            .4byte  .LVL3\r
- 1170 0024 18000000            .4byte  .LVL6\r
- 1171 0028 0100                .2byte  0x1\r
- 1172 002a 56                  .byte   0x56\r
- 1173 002b 00000000            .4byte  0\r
- 1174 002f 00000000            .4byte  0\r
- 1175                  .LLST2:\r
- 1176 0033 12000000            .4byte  .LVL4\r
- 1177 0037 18000000            .4byte  .LVL6\r
- 1178 003b 0100                .2byte  0x1\r
- 1179 003d 50                  .byte   0x50\r
- 1180 003e 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 30\r
-\r
-\r
- 1181 0042 00000000            .4byte  0\r
- 1182                  .LLST3:\r
- 1183 0046 16000000            .4byte  .LVL5\r
- 1184 004a 2C000000            .4byte  .LVL9\r
- 1185 004e 0100                .2byte  0x1\r
- 1186 0050 55                  .byte   0x55\r
- 1187 0051 2C000000            .4byte  .LVL9\r
- 1188 0055 40000000            .4byte  .LVL12\r
- 1189 0059 0100                .2byte  0x1\r
- 1190 005b 50                  .byte   0x50\r
- 1191 005c 00000000            .4byte  0\r
- 1192 0060 00000000            .4byte  0\r
- 1193                  .LLST4:\r
- 1194 0064 16000000            .4byte  .LVL5\r
- 1195 0068 18000000            .4byte  .LVL6\r
- 1196 006c 0200                .2byte  0x2\r
- 1197 006e 30                  .byte   0x30\r
- 1198 006f 9F                  .byte   0x9f\r
- 1199 0070 1E000000            .4byte  .LVL7\r
- 1200 0074 2C000000            .4byte  .LVL9\r
- 1201 0078 0100                .2byte  0x1\r
- 1202 007a 52                  .byte   0x52\r
- 1203 007b 2C000000            .4byte  .LVL9\r
- 1204 007f 2E000000            .4byte  .LVL10\r
- 1205 0083 0200                .2byte  0x2\r
- 1206 0085 30                  .byte   0x30\r
- 1207 0086 9F                  .byte   0x9f\r
- 1208 0087 2E000000            .4byte  .LVL10\r
- 1209 008b 40000000            .4byte  .LVL12\r
- 1210 008f 0100                .2byte  0x1\r
- 1211 0091 52                  .byte   0x52\r
- 1212 0092 00000000            .4byte  0\r
- 1213 0096 00000000            .4byte  0\r
- 1214                  .LLST5:\r
- 1215 009a 00000000            .4byte  .LFB1\r
- 1216 009e 02000000            .4byte  .LCFI1\r
- 1217 00a2 0200                .2byte  0x2\r
- 1218 00a4 7D                  .byte   0x7d\r
- 1219 00a5 00                  .sleb128 0\r
- 1220 00a6 02000000            .4byte  .LCFI1\r
- 1221 00aa 1C000000            .4byte  .LFE1\r
- 1222 00ae 0200                .2byte  0x2\r
- 1223 00b0 7D                  .byte   0x7d\r
- 1224 00b1 08                  .sleb128 8\r
- 1225 00b2 00000000            .4byte  0\r
- 1226 00b6 00000000            .4byte  0\r
- 1227                  .LLST6:\r
- 1228 00ba 00000000            .4byte  .LFB4\r
- 1229 00be 02000000            .4byte  .LCFI2\r
- 1230 00c2 0200                .2byte  0x2\r
- 1231 00c4 7D                  .byte   0x7d\r
- 1232 00c5 00                  .sleb128 0\r
- 1233 00c6 02000000            .4byte  .LCFI2\r
- 1234 00ca 68000000            .4byte  .LFE4\r
- 1235 00ce 0200                .2byte  0x2\r
- 1236 00d0 7D                  .byte   0x7d\r
- 1237 00d1 08                  .sleb128 8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 31\r
-\r
-\r
- 1238 00d2 00000000            .4byte  0\r
- 1239 00d6 00000000            .4byte  0\r
- 1240                  .LLST7:\r
- 1241 00da 10000000            .4byte  .LVL17\r
- 1242 00de 12000000            .4byte  .LVL18\r
- 1243 00e2 0200                .2byte  0x2\r
- 1244 00e4 30                  .byte   0x30\r
- 1245 00e5 9F                  .byte   0x9f\r
- 1246 00e6 26000000            .4byte  .LVL19\r
- 1247 00ea 2E000000            .4byte  .LVL20\r
- 1248 00ee 0100                .2byte  0x1\r
- 1249 00f0 53                  .byte   0x53\r
- 1250 00f1 00000000            .4byte  0\r
- 1251 00f5 00000000            .4byte  0\r
- 1252                          .section        .debug_aranges,"",%progbits\r
- 1253 0000 3C000000            .4byte  0x3c\r
- 1254 0004 0200                .2byte  0x2\r
- 1255 0006 00000000            .4byte  .Ldebug_info0\r
- 1256 000a 04                  .byte   0x4\r
- 1257 000b 00                  .byte   0\r
- 1258 000c 0000                .2byte  0\r
- 1259 000e 0000                .2byte  0\r
- 1260 0010 00000000            .4byte  .LFB0\r
- 1261 0014 02000000            .4byte  .LFE0-.LFB0\r
- 1262 0018 00000000            .4byte  .LFB2\r
- 1263 001c 02000000            .4byte  .LFE2-.LFB2\r
- 1264 0020 00000000            .4byte  .LFB3\r
- 1265 0024 54000000            .4byte  .LFE3-.LFB3\r
- 1266 0028 00000000            .4byte  .LFB1\r
- 1267 002c 1C000000            .4byte  .LFE1-.LFB1\r
- 1268 0030 00000000            .4byte  .LFB4\r
- 1269 0034 68000000            .4byte  .LFE4-.LFB4\r
- 1270 0038 00000000            .4byte  0\r
- 1271 003c 00000000            .4byte  0\r
- 1272                          .section        .debug_ranges,"",%progbits\r
- 1273                  .Ldebug_ranges0:\r
- 1274 0000 00000000            .4byte  .LFB0\r
- 1275 0004 02000000            .4byte  .LFE0\r
- 1276 0008 00000000            .4byte  .LFB2\r
- 1277 000c 02000000            .4byte  .LFE2\r
- 1278 0010 00000000            .4byte  .LFB3\r
- 1279 0014 54000000            .4byte  .LFE3\r
- 1280 0018 00000000            .4byte  .LFB1\r
- 1281 001c 1C000000            .4byte  .LFE1\r
- 1282 0020 00000000            .4byte  .LFB4\r
- 1283 0024 68000000            .4byte  .LFE4\r
- 1284 0028 00000000            .4byte  0\r
- 1285 002c 00000000            .4byte  0\r
- 1286                          .section        .debug_line,"",%progbits\r
- 1287                  .Ldebug_line0:\r
- 1288 0000 98010000            .section        .debug_str,"MS",%progbits,1\r
- 1288      0200F000 \r
- 1288      00000201 \r
- 1288      FB0E0D00 \r
- 1288      01010101 \r
- 1289                  .LASF42:\r
- 1290 0000 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\Cm3Start.c\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 32\r
-\r
-\r
- 1290      6E657261 \r
- 1290      7465645F \r
- 1290      536F7572 \r
- 1290      63655C50 \r
- 1291                  .LASF15:\r
- 1292 0024 72656733            .ascii  "reg32\000"\r
- 1292      3200\r
- 1293                  .LASF18:\r
- 1294 002a 73697A65            .ascii  "size_t\000"\r
- 1294      5F7400\r
- 1295                  .LASF34:\r
- 1296 0031 43795261            .ascii  "CyRamVectors\000"\r
- 1296      6D566563 \r
- 1296      746F7273 \r
- 1296      00\r
- 1297                  .LASF25:\r
- 1298 003e 53746172            .ascii  "Start_c\000"\r
- 1298      745F6300 \r
- 1299                  .LASF29:\r
- 1300 0046 636F756E            .ascii  "count\000"\r
- 1300      7400\r
- 1301                  .LASF3:\r
- 1302 004c 73686F72            .ascii  "short unsigned int\000"\r
- 1302      7420756E \r
- 1302      7369676E \r
- 1302      65642069 \r
- 1302      6E7400\r
- 1303                  .LASF36:\r
- 1304 005f 5F5F6379            .ascii  "__cy_region_num\000"\r
- 1304      5F726567 \r
- 1304      696F6E5F \r
- 1304      6E756D00 \r
- 1305                  .LASF20:\r
- 1306 006f 696E6974            .ascii  "init\000"\r
- 1306      00\r
- 1307                  .LASF46:\r
- 1308 0074 73746174            .ascii  "status\000"\r
- 1308      757300\r
- 1309                  .LASF23:\r
- 1310 007b 7A65726F            .ascii  "zero_size\000"\r
- 1310      5F73697A \r
- 1310      6500\r
- 1311                  .LASF11:\r
- 1312 0085 666C6F61            .ascii  "float\000"\r
- 1312      7400\r
- 1313                  .LASF21:\r
- 1314 008b 64617461            .ascii  "data\000"\r
- 1314      00\r
- 1315                  .LASF1:\r
- 1316 0090 756E7369            .ascii  "unsigned char\000"\r
- 1316      676E6564 \r
- 1316      20636861 \r
- 1316      7200\r
- 1317                  .LASF37:\r
- 1318 009e 526F6D56            .ascii  "RomVectors\000"\r
- 1318      6563746F \r
- 1318      727300\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 33\r
-\r
-\r
- 1319                  .LASF5:\r
- 1320 00a9 6C6F6E67            .ascii  "long unsigned int\000"\r
- 1320      20756E73 \r
- 1320      69676E65 \r
- 1320      6420696E \r
- 1320      7400\r
- 1321                  .LASF43:\r
- 1322 00bb 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 1322      43534932 \r
- 1322      53445C73 \r
- 1322      6F667477 \r
- 1322      6172655C \r
- 1323 00ea 6E00                .ascii  "n\000"\r
- 1324                  .LASF9:\r
- 1325 00ec 75696E74            .ascii  "uint8\000"\r
- 1325      3800\r
- 1326                  .LASF30:\r
- 1327 00f2 52657365            .ascii  "Reset\000"\r
- 1327      7400\r
- 1328                  .LASF24:\r
- 1329 00f8 5F657869            .ascii  "_exit\000"\r
- 1329      7400\r
- 1330                  .LASF45:\r
- 1331 00fe 496E7444            .ascii  "IntDefaultHandler\000"\r
- 1331      65666175 \r
- 1331      6C744861 \r
- 1331      6E646C65 \r
- 1331      7200\r
- 1332                  .LASF27:\r
- 1333 0110 72707472            .ascii  "rptr\000"\r
- 1333      00\r
- 1334                  .LASF47:\r
- 1335 0115 6D61696E            .ascii  "main\000"\r
- 1335      00\r
- 1336                  .LASF31:\r
- 1337 011a 696E6974            .ascii  "initialize_psoc\000"\r
- 1337      69616C69 \r
- 1337      7A655F70 \r
- 1337      736F6300 \r
- 1338                  .LASF10:\r
- 1339 012a 75696E74            .ascii  "uint32\000"\r
- 1339      333200\r
- 1340                  .LASF8:\r
- 1341 0131 756E7369            .ascii  "unsigned int\000"\r
- 1341      676E6564 \r
- 1341      20696E74 \r
- 1341      00\r
- 1342                  .LASF40:\r
- 1343 013e 63796669            .ascii  "cyfitter_cfg\000"\r
- 1343      74746572 \r
- 1343      5F636667 \r
- 1343      00\r
- 1344                  .LASF7:\r
- 1345 014b 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1345      206C6F6E \r
- 1345      6720756E \r
- 1345      7369676E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 34\r
-\r
-\r
- 1345      65642069 \r
- 1346                  .LASF28:\r
- 1347 0162 6C696D69            .ascii  "limit\000"\r
- 1347      7400\r
- 1348                  .LASF16:\r
- 1349 0168 63796973            .ascii  "cyisraddress\000"\r
- 1349      72616464 \r
- 1349      72657373 \r
- 1349      00\r
- 1350                  .LASF22:\r
- 1351 0175 696E6974            .ascii  "init_size\000"\r
- 1351      5F73697A \r
- 1351      6500\r
- 1352                  .LASF19:\r
- 1353 017f 5F5F6379            .ascii  "__cy_byte_align8\000"\r
- 1353      5F627974 \r
- 1353      655F616C \r
- 1353      69676E38 \r
- 1353      00\r
- 1354                  .LASF14:\r
- 1355 0190 72656738            .ascii  "reg8\000"\r
- 1355      00\r
- 1356                  .LASF17:\r
- 1357 0195 73697A65            .ascii  "sizetype\000"\r
- 1357      74797065 \r
- 1357      00\r
- 1358                  .LASF6:\r
- 1359 019e 6C6F6E67            .ascii  "long long int\000"\r
- 1359      206C6F6E \r
- 1359      6720696E \r
- 1359      7400\r
- 1360                  .LASF13:\r
- 1361 01ac 63686172            .ascii  "char\000"\r
- 1361      00\r
- 1362                  .LASF39:\r
- 1363 01b1 43794274            .ascii  "CyBtldr_CheckLaunch\000"\r
- 1363      6C64725F \r
- 1363      43686563 \r
- 1363      6B4C6175 \r
- 1363      6E636800 \r
- 1364                  .LASF2:\r
- 1365 01c5 73686F72            .ascii  "short int\000"\r
- 1365      7420696E \r
- 1365      7400\r
- 1366                  .LASF32:\r
- 1367 01cf 63795379            .ascii  "cySysNoInitDataValid\000"\r
- 1367      734E6F49 \r
- 1367      6E697444 \r
- 1367      61746156 \r
- 1367      616C6964 \r
- 1368                  .LASF41:\r
- 1369 01e4 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 1369      4320342E \r
- 1369      372E3320 \r
- 1369      32303133 \r
- 1369      30333132 \r
- 1370 0217 616E6368            .ascii  "anch revision 196615]\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccFLxuTR.s                      page 35\r
-\r
-\r
- 1370      20726576 \r
- 1370      6973696F \r
- 1370      6E203139 \r
- 1370      36363135 \r
- 1371                  .LASF38:\r
- 1372 022d 5F5F6C69            .ascii  "__libc_init_array\000"\r
- 1372      62635F69 \r
- 1372      6E69745F \r
- 1372      61727261 \r
- 1372      7900\r
- 1373                  .LASF4:\r
- 1374 023f 6C6F6E67            .ascii  "long int\000"\r
- 1374      20696E74 \r
- 1374      00\r
- 1375                  .LASF33:\r
- 1376 0248 43795265            .ascii  "CyResetStatus\000"\r
- 1376      73657453 \r
- 1376      74617475 \r
- 1376      7300\r
- 1377                  .LASF0:\r
- 1378 0256 7369676E            .ascii  "signed char\000"\r
- 1378      65642063 \r
- 1378      68617200 \r
- 1379                  .LASF12:\r
- 1380 0262 646F7562            .ascii  "double\000"\r
- 1380      6C6500\r
- 1381                  .LASF35:\r
- 1382 0269 5F5F6379            .ascii  "__cy_regions\000"\r
- 1382      5F726567 \r
- 1382      696F6E73 \r
- 1382      00\r
- 1383                  .LASF26:\r
- 1384 0276 72656769            .ascii  "regions\000"\r
- 1384      6F6E7300 \r
- 1385                  .LASF44:\r
- 1386 027e 5F5F6379            .ascii  "__cy_region\000"\r
- 1386      5F726567 \r
- 1386      696F6E00 \r
- 1387                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.o
deleted file mode 100755 (executable)
index 75da190..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/Cm3Start.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.lst
deleted file mode 100755 (executable)
index 190593b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.lst
+++ /dev/null
@@ -1,12936 +0,0 @@
-ARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                       page 1\r
-\r
-\r
-   1                   /*******************************************************************************\r
-   2                   * File Name: CyBootAsmGnu.s\r
-   3                   * Version 4.0\r
-   4                   *\r
-   5                   *  Description:\r
-   6                   *   Assembly routines for GNU as.\r
-   7                   *\r
-   8                   ********************************************************************************\r
-   9                   * Copyright 2010-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  10                   * You may use this file only in accordance with the license, terms, conditions,\r
-  11                   * disclaimers, and limitations in the end user license agreement accompanying\r
-  12                   * the software package with which this file was provided.\r
-  13                   *******************************************************************************/\r
-  14                   \r
-  15                   .include "cyfittergnu.inc"\r
-   1                   .ifndef INCLUDED_CYFITTERGNU_INC\r
-   2                   .set INCLUDED_CYFITTERGNU_INC, 1\r
-   3                   .include "cydevicegnu.inc"\r
-   1                   /*******************************************************************************\r
-   2                   * FILENAME: cydevicegnu.inc\r
-   3                   * OBSOLETE: Do not use this file. Use the _trm version instead.\r
-   4                   * PSoC Creator 3.0 Component Pack 7\r
-   5                   *\r
-   6                   * DESCRIPTION:\r
-   7                   * This file provides all of the address values for the entire PSoC device.\r
-   8                   * This file is automatically generated by PSoC Creator.\r
-   9                   *\r
-  10                   ********************************************************************************\r
-  11                   * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12                   * You may use this file only in accordance with the license, terms, conditions, \r
-  13                   * disclaimers, and limitations in the end user license agreement accompanying \r
-  14                   * the software package with which this file was provided.\r
-  15                   ********************************************************************************/\r
-  16                   \r
-  17                   .set CYDEV_FLASH_BASE, 0x00000000\r
-  18                   .set CYDEV_FLASH_SIZE, 0x00020000\r
-  19                   .set CYDEV_FLASH_DATA_MBASE, 0x00000000\r
-  20                   .set CYDEV_FLASH_DATA_MSIZE, 0x00020000\r
-  21                   .set CYDEV_SRAM_BASE, 0x1fffc000\r
-  22                   .set CYDEV_SRAM_SIZE, 0x00008000\r
-  23                   .set CYDEV_SRAM_CODE64K_MBASE, 0x1fff8000\r
-  24                   .set CYDEV_SRAM_CODE64K_MSIZE, 0x00004000\r
-  25                   .set CYDEV_SRAM_CODE32K_MBASE, 0x1fffc000\r
-  26                   .set CYDEV_SRAM_CODE32K_MSIZE, 0x00002000\r
-  27                   .set CYDEV_SRAM_CODE16K_MBASE, 0x1fffe000\r
-  28                   .set CYDEV_SRAM_CODE16K_MSIZE, 0x00001000\r
-  29                   .set CYDEV_SRAM_CODE_MBASE, 0x1fffc000\r
-  30                   .set CYDEV_SRAM_CODE_MSIZE, 0x00004000\r
-  31                   .set CYDEV_SRAM_DATA_MBASE, 0x20000000\r
-  32                   .set CYDEV_SRAM_DATA_MSIZE, 0x00004000\r
-  33                   .set CYDEV_SRAM_DATA16K_MBASE, 0x20001000\r
-  34                   .set CYDEV_SRAM_DATA16K_MSIZE, 0x00001000\r
-  35                   .set CYDEV_SRAM_DATA32K_MBASE, 0x20002000\r
-  36                   .set CYDEV_SRAM_DATA32K_MSIZE, 0x00002000\r
-  37                   .set CYDEV_SRAM_DATA64K_MBASE, 0x20004000\r
-  38                   .set CYDEV_SRAM_DATA64K_MSIZE, 0x00004000\r
-  39                   .set CYDEV_DMA_BASE, 0x20008000\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 2\r
-\r
-\r
-  40                   .set CYDEV_DMA_SIZE, 0x00008000\r
-  41                   .set CYDEV_DMA_SRAM64K_MBASE, 0x20008000\r
-  42                   .set CYDEV_DMA_SRAM64K_MSIZE, 0x00004000\r
-  43                   .set CYDEV_DMA_SRAM32K_MBASE, 0x2000c000\r
-  44                   .set CYDEV_DMA_SRAM32K_MSIZE, 0x00002000\r
-  45                   .set CYDEV_DMA_SRAM16K_MBASE, 0x2000e000\r
-  46                   .set CYDEV_DMA_SRAM16K_MSIZE, 0x00001000\r
-  47                   .set CYDEV_DMA_SRAM_MBASE, 0x2000f000\r
-  48                   .set CYDEV_DMA_SRAM_MSIZE, 0x00001000\r
-  49                   .set CYDEV_CLKDIST_BASE, 0x40004000\r
-  50                   .set CYDEV_CLKDIST_SIZE, 0x00000110\r
-  51                   .set CYDEV_CLKDIST_CR, 0x40004000\r
-  52                   .set CYDEV_CLKDIST_LD, 0x40004001\r
-  53                   .set CYDEV_CLKDIST_WRK0, 0x40004002\r
-  54                   .set CYDEV_CLKDIST_WRK1, 0x40004003\r
-  55                   .set CYDEV_CLKDIST_MSTR0, 0x40004004\r
-  56                   .set CYDEV_CLKDIST_MSTR1, 0x40004005\r
-  57                   .set CYDEV_CLKDIST_BCFG0, 0x40004006\r
-  58                   .set CYDEV_CLKDIST_BCFG1, 0x40004007\r
-  59                   .set CYDEV_CLKDIST_BCFG2, 0x40004008\r
-  60                   .set CYDEV_CLKDIST_UCFG, 0x40004009\r
-  61                   .set CYDEV_CLKDIST_DLY0, 0x4000400a\r
-  62                   .set CYDEV_CLKDIST_DLY1, 0x4000400b\r
-  63                   .set CYDEV_CLKDIST_DMASK, 0x40004010\r
-  64                   .set CYDEV_CLKDIST_AMASK, 0x40004014\r
-  65                   .set CYDEV_CLKDIST_DCFG0_BASE, 0x40004080\r
-  66                   .set CYDEV_CLKDIST_DCFG0_SIZE, 0x00000003\r
-  67                   .set CYDEV_CLKDIST_DCFG0_CFG0, 0x40004080\r
-  68                   .set CYDEV_CLKDIST_DCFG0_CFG1, 0x40004081\r
-  69                   .set CYDEV_CLKDIST_DCFG0_CFG2, 0x40004082\r
-  70                   .set CYDEV_CLKDIST_DCFG1_BASE, 0x40004084\r
-  71                   .set CYDEV_CLKDIST_DCFG1_SIZE, 0x00000003\r
-  72                   .set CYDEV_CLKDIST_DCFG1_CFG0, 0x40004084\r
-  73                   .set CYDEV_CLKDIST_DCFG1_CFG1, 0x40004085\r
-  74                   .set CYDEV_CLKDIST_DCFG1_CFG2, 0x40004086\r
-  75                   .set CYDEV_CLKDIST_DCFG2_BASE, 0x40004088\r
-  76                   .set CYDEV_CLKDIST_DCFG2_SIZE, 0x00000003\r
-  77                   .set CYDEV_CLKDIST_DCFG2_CFG0, 0x40004088\r
-  78                   .set CYDEV_CLKDIST_DCFG2_CFG1, 0x40004089\r
-  79                   .set CYDEV_CLKDIST_DCFG2_CFG2, 0x4000408a\r
-  80                   .set CYDEV_CLKDIST_DCFG3_BASE, 0x4000408c\r
-  81                   .set CYDEV_CLKDIST_DCFG3_SIZE, 0x00000003\r
-  82                   .set CYDEV_CLKDIST_DCFG3_CFG0, 0x4000408c\r
-  83                   .set CYDEV_CLKDIST_DCFG3_CFG1, 0x4000408d\r
-  84                   .set CYDEV_CLKDIST_DCFG3_CFG2, 0x4000408e\r
-  85                   .set CYDEV_CLKDIST_DCFG4_BASE, 0x40004090\r
-  86                   .set CYDEV_CLKDIST_DCFG4_SIZE, 0x00000003\r
-  87                   .set CYDEV_CLKDIST_DCFG4_CFG0, 0x40004090\r
-  88                   .set CYDEV_CLKDIST_DCFG4_CFG1, 0x40004091\r
-  89                   .set CYDEV_CLKDIST_DCFG4_CFG2, 0x40004092\r
-  90                   .set CYDEV_CLKDIST_DCFG5_BASE, 0x40004094\r
-  91                   .set CYDEV_CLKDIST_DCFG5_SIZE, 0x00000003\r
-  92                   .set CYDEV_CLKDIST_DCFG5_CFG0, 0x40004094\r
-  93                   .set CYDEV_CLKDIST_DCFG5_CFG1, 0x40004095\r
-  94                   .set CYDEV_CLKDIST_DCFG5_CFG2, 0x40004096\r
-  95                   .set CYDEV_CLKDIST_DCFG6_BASE, 0x40004098\r
-  96                   .set CYDEV_CLKDIST_DCFG6_SIZE, 0x00000003\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 3\r
-\r
-\r
-  97                   .set CYDEV_CLKDIST_DCFG6_CFG0, 0x40004098\r
-  98                   .set CYDEV_CLKDIST_DCFG6_CFG1, 0x40004099\r
-  99                   .set CYDEV_CLKDIST_DCFG6_CFG2, 0x4000409a\r
- 100                   .set CYDEV_CLKDIST_DCFG7_BASE, 0x4000409c\r
- 101                   .set CYDEV_CLKDIST_DCFG7_SIZE, 0x00000003\r
- 102                   .set CYDEV_CLKDIST_DCFG7_CFG0, 0x4000409c\r
- 103                   .set CYDEV_CLKDIST_DCFG7_CFG1, 0x4000409d\r
- 104                   .set CYDEV_CLKDIST_DCFG7_CFG2, 0x4000409e\r
- 105                   .set CYDEV_CLKDIST_ACFG0_BASE, 0x40004100\r
- 106                   .set CYDEV_CLKDIST_ACFG0_SIZE, 0x00000004\r
- 107                   .set CYDEV_CLKDIST_ACFG0_CFG0, 0x40004100\r
- 108                   .set CYDEV_CLKDIST_ACFG0_CFG1, 0x40004101\r
- 109                   .set CYDEV_CLKDIST_ACFG0_CFG2, 0x40004102\r
- 110                   .set CYDEV_CLKDIST_ACFG0_CFG3, 0x40004103\r
- 111                   .set CYDEV_CLKDIST_ACFG1_BASE, 0x40004104\r
- 112                   .set CYDEV_CLKDIST_ACFG1_SIZE, 0x00000004\r
- 113                   .set CYDEV_CLKDIST_ACFG1_CFG0, 0x40004104\r
- 114                   .set CYDEV_CLKDIST_ACFG1_CFG1, 0x40004105\r
- 115                   .set CYDEV_CLKDIST_ACFG1_CFG2, 0x40004106\r
- 116                   .set CYDEV_CLKDIST_ACFG1_CFG3, 0x40004107\r
- 117                   .set CYDEV_CLKDIST_ACFG2_BASE, 0x40004108\r
- 118                   .set CYDEV_CLKDIST_ACFG2_SIZE, 0x00000004\r
- 119                   .set CYDEV_CLKDIST_ACFG2_CFG0, 0x40004108\r
- 120                   .set CYDEV_CLKDIST_ACFG2_CFG1, 0x40004109\r
- 121                   .set CYDEV_CLKDIST_ACFG2_CFG2, 0x4000410a\r
- 122                   .set CYDEV_CLKDIST_ACFG2_CFG3, 0x4000410b\r
- 123                   .set CYDEV_CLKDIST_ACFG3_BASE, 0x4000410c\r
- 124                   .set CYDEV_CLKDIST_ACFG3_SIZE, 0x00000004\r
- 125                   .set CYDEV_CLKDIST_ACFG3_CFG0, 0x4000410c\r
- 126                   .set CYDEV_CLKDIST_ACFG3_CFG1, 0x4000410d\r
- 127                   .set CYDEV_CLKDIST_ACFG3_CFG2, 0x4000410e\r
- 128                   .set CYDEV_CLKDIST_ACFG3_CFG3, 0x4000410f\r
- 129                   .set CYDEV_FASTCLK_BASE, 0x40004200\r
- 130                   .set CYDEV_FASTCLK_SIZE, 0x00000026\r
- 131                   .set CYDEV_FASTCLK_IMO_BASE, 0x40004200\r
- 132                   .set CYDEV_FASTCLK_IMO_SIZE, 0x00000001\r
- 133                   .set CYDEV_FASTCLK_IMO_CR, 0x40004200\r
- 134                   .set CYDEV_FASTCLK_XMHZ_BASE, 0x40004210\r
- 135                   .set CYDEV_FASTCLK_XMHZ_SIZE, 0x00000004\r
- 136                   .set CYDEV_FASTCLK_XMHZ_CSR, 0x40004210\r
- 137                   .set CYDEV_FASTCLK_XMHZ_CFG0, 0x40004212\r
- 138                   .set CYDEV_FASTCLK_XMHZ_CFG1, 0x40004213\r
- 139                   .set CYDEV_FASTCLK_PLL_BASE, 0x40004220\r
- 140                   .set CYDEV_FASTCLK_PLL_SIZE, 0x00000006\r
- 141                   .set CYDEV_FASTCLK_PLL_CFG0, 0x40004220\r
- 142                   .set CYDEV_FASTCLK_PLL_CFG1, 0x40004221\r
- 143                   .set CYDEV_FASTCLK_PLL_P, 0x40004222\r
- 144                   .set CYDEV_FASTCLK_PLL_Q, 0x40004223\r
- 145                   .set CYDEV_FASTCLK_PLL_SR, 0x40004225\r
- 146                   .set CYDEV_SLOWCLK_BASE, 0x40004300\r
- 147                   .set CYDEV_SLOWCLK_SIZE, 0x0000000b\r
- 148                   .set CYDEV_SLOWCLK_ILO_BASE, 0x40004300\r
- 149                   .set CYDEV_SLOWCLK_ILO_SIZE, 0x00000002\r
- 150                   .set CYDEV_SLOWCLK_ILO_CR0, 0x40004300\r
- 151                   .set CYDEV_SLOWCLK_ILO_CR1, 0x40004301\r
- 152                   .set CYDEV_SLOWCLK_X32_BASE, 0x40004308\r
- 153                   .set CYDEV_SLOWCLK_X32_SIZE, 0x00000003\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 4\r
-\r
-\r
- 154                   .set CYDEV_SLOWCLK_X32_CR, 0x40004308\r
- 155                   .set CYDEV_SLOWCLK_X32_CFG, 0x40004309\r
- 156                   .set CYDEV_SLOWCLK_X32_TST, 0x4000430a\r
- 157                   .set CYDEV_BOOST_BASE, 0x40004320\r
- 158                   .set CYDEV_BOOST_SIZE, 0x00000007\r
- 159                   .set CYDEV_BOOST_CR0, 0x40004320\r
- 160                   .set CYDEV_BOOST_CR1, 0x40004321\r
- 161                   .set CYDEV_BOOST_CR2, 0x40004322\r
- 162                   .set CYDEV_BOOST_CR3, 0x40004323\r
- 163                   .set CYDEV_BOOST_SR, 0x40004324\r
- 164                   .set CYDEV_BOOST_CR4, 0x40004325\r
- 165                   .set CYDEV_BOOST_SR2, 0x40004326\r
- 166                   .set CYDEV_PWRSYS_BASE, 0x40004330\r
- 167                   .set CYDEV_PWRSYS_SIZE, 0x00000002\r
- 168                   .set CYDEV_PWRSYS_CR0, 0x40004330\r
- 169                   .set CYDEV_PWRSYS_CR1, 0x40004331\r
- 170                   .set CYDEV_PM_BASE, 0x40004380\r
- 171                   .set CYDEV_PM_SIZE, 0x00000057\r
- 172                   .set CYDEV_PM_TW_CFG0, 0x40004380\r
- 173                   .set CYDEV_PM_TW_CFG1, 0x40004381\r
- 174                   .set CYDEV_PM_TW_CFG2, 0x40004382\r
- 175                   .set CYDEV_PM_WDT_CFG, 0x40004383\r
- 176                   .set CYDEV_PM_WDT_CR, 0x40004384\r
- 177                   .set CYDEV_PM_INT_SR, 0x40004390\r
- 178                   .set CYDEV_PM_MODE_CFG0, 0x40004391\r
- 179                   .set CYDEV_PM_MODE_CFG1, 0x40004392\r
- 180                   .set CYDEV_PM_MODE_CSR, 0x40004393\r
- 181                   .set CYDEV_PM_USB_CR0, 0x40004394\r
- 182                   .set CYDEV_PM_WAKEUP_CFG0, 0x40004398\r
- 183                   .set CYDEV_PM_WAKEUP_CFG1, 0x40004399\r
- 184                   .set CYDEV_PM_WAKEUP_CFG2, 0x4000439a\r
- 185                   .set CYDEV_PM_ACT_BASE, 0x400043a0\r
- 186                   .set CYDEV_PM_ACT_SIZE, 0x0000000e\r
- 187                   .set CYDEV_PM_ACT_CFG0, 0x400043a0\r
- 188                   .set CYDEV_PM_ACT_CFG1, 0x400043a1\r
- 189                   .set CYDEV_PM_ACT_CFG2, 0x400043a2\r
- 190                   .set CYDEV_PM_ACT_CFG3, 0x400043a3\r
- 191                   .set CYDEV_PM_ACT_CFG4, 0x400043a4\r
- 192                   .set CYDEV_PM_ACT_CFG5, 0x400043a5\r
- 193                   .set CYDEV_PM_ACT_CFG6, 0x400043a6\r
- 194                   .set CYDEV_PM_ACT_CFG7, 0x400043a7\r
- 195                   .set CYDEV_PM_ACT_CFG8, 0x400043a8\r
- 196                   .set CYDEV_PM_ACT_CFG9, 0x400043a9\r
- 197                   .set CYDEV_PM_ACT_CFG10, 0x400043aa\r
- 198                   .set CYDEV_PM_ACT_CFG11, 0x400043ab\r
- 199                   .set CYDEV_PM_ACT_CFG12, 0x400043ac\r
- 200                   .set CYDEV_PM_ACT_CFG13, 0x400043ad\r
- 201                   .set CYDEV_PM_STBY_BASE, 0x400043b0\r
- 202                   .set CYDEV_PM_STBY_SIZE, 0x0000000e\r
- 203                   .set CYDEV_PM_STBY_CFG0, 0x400043b0\r
- 204                   .set CYDEV_PM_STBY_CFG1, 0x400043b1\r
- 205                   .set CYDEV_PM_STBY_CFG2, 0x400043b2\r
- 206                   .set CYDEV_PM_STBY_CFG3, 0x400043b3\r
- 207                   .set CYDEV_PM_STBY_CFG4, 0x400043b4\r
- 208                   .set CYDEV_PM_STBY_CFG5, 0x400043b5\r
- 209                   .set CYDEV_PM_STBY_CFG6, 0x400043b6\r
- 210                   .set CYDEV_PM_STBY_CFG7, 0x400043b7\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 5\r
-\r
-\r
- 211                   .set CYDEV_PM_STBY_CFG8, 0x400043b8\r
- 212                   .set CYDEV_PM_STBY_CFG9, 0x400043b9\r
- 213                   .set CYDEV_PM_STBY_CFG10, 0x400043ba\r
- 214                   .set CYDEV_PM_STBY_CFG11, 0x400043bb\r
- 215                   .set CYDEV_PM_STBY_CFG12, 0x400043bc\r
- 216                   .set CYDEV_PM_STBY_CFG13, 0x400043bd\r
- 217                   .set CYDEV_PM_AVAIL_BASE, 0x400043c0\r
- 218                   .set CYDEV_PM_AVAIL_SIZE, 0x00000017\r
- 219                   .set CYDEV_PM_AVAIL_CR0, 0x400043c0\r
- 220                   .set CYDEV_PM_AVAIL_CR1, 0x400043c1\r
- 221                   .set CYDEV_PM_AVAIL_CR2, 0x400043c2\r
- 222                   .set CYDEV_PM_AVAIL_CR3, 0x400043c3\r
- 223                   .set CYDEV_PM_AVAIL_CR4, 0x400043c4\r
- 224                   .set CYDEV_PM_AVAIL_CR5, 0x400043c5\r
- 225                   .set CYDEV_PM_AVAIL_CR6, 0x400043c6\r
- 226                   .set CYDEV_PM_AVAIL_SR0, 0x400043d0\r
- 227                   .set CYDEV_PM_AVAIL_SR1, 0x400043d1\r
- 228                   .set CYDEV_PM_AVAIL_SR2, 0x400043d2\r
- 229                   .set CYDEV_PM_AVAIL_SR3, 0x400043d3\r
- 230                   .set CYDEV_PM_AVAIL_SR4, 0x400043d4\r
- 231                   .set CYDEV_PM_AVAIL_SR5, 0x400043d5\r
- 232                   .set CYDEV_PM_AVAIL_SR6, 0x400043d6\r
- 233                   .set CYDEV_PICU_BASE, 0x40004500\r
- 234                   .set CYDEV_PICU_SIZE, 0x000000b0\r
- 235                   .set CYDEV_PICU_INTTYPE_BASE, 0x40004500\r
- 236                   .set CYDEV_PICU_INTTYPE_SIZE, 0x00000080\r
- 237                   .set CYDEV_PICU_INTTYPE_PICU0_BASE, 0x40004500\r
- 238                   .set CYDEV_PICU_INTTYPE_PICU0_SIZE, 0x00000008\r
- 239                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE0, 0x40004500\r
- 240                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE1, 0x40004501\r
- 241                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE2, 0x40004502\r
- 242                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE3, 0x40004503\r
- 243                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE4, 0x40004504\r
- 244                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE5, 0x40004505\r
- 245                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE6, 0x40004506\r
- 246                   .set CYDEV_PICU_INTTYPE_PICU0_INTTYPE7, 0x40004507\r
- 247                   .set CYDEV_PICU_INTTYPE_PICU1_BASE, 0x40004508\r
- 248                   .set CYDEV_PICU_INTTYPE_PICU1_SIZE, 0x00000008\r
- 249                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE0, 0x40004508\r
- 250                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE1, 0x40004509\r
- 251                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE2, 0x4000450a\r
- 252                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE3, 0x4000450b\r
- 253                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE4, 0x4000450c\r
- 254                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE5, 0x4000450d\r
- 255                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE6, 0x4000450e\r
- 256                   .set CYDEV_PICU_INTTYPE_PICU1_INTTYPE7, 0x4000450f\r
- 257                   .set CYDEV_PICU_INTTYPE_PICU2_BASE, 0x40004510\r
- 258                   .set CYDEV_PICU_INTTYPE_PICU2_SIZE, 0x00000008\r
- 259                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE0, 0x40004510\r
- 260                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE1, 0x40004511\r
- 261                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE2, 0x40004512\r
- 262                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE3, 0x40004513\r
- 263                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE4, 0x40004514\r
- 264                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE5, 0x40004515\r
- 265                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE6, 0x40004516\r
- 266                   .set CYDEV_PICU_INTTYPE_PICU2_INTTYPE7, 0x40004517\r
- 267                   .set CYDEV_PICU_INTTYPE_PICU3_BASE, 0x40004518\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 6\r
-\r
-\r
- 268                   .set CYDEV_PICU_INTTYPE_PICU3_SIZE, 0x00000008\r
- 269                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE0, 0x40004518\r
- 270                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE1, 0x40004519\r
- 271                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE2, 0x4000451a\r
- 272                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE3, 0x4000451b\r
- 273                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE4, 0x4000451c\r
- 274                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE5, 0x4000451d\r
- 275                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE6, 0x4000451e\r
- 276                   .set CYDEV_PICU_INTTYPE_PICU3_INTTYPE7, 0x4000451f\r
- 277                   .set CYDEV_PICU_INTTYPE_PICU4_BASE, 0x40004520\r
- 278                   .set CYDEV_PICU_INTTYPE_PICU4_SIZE, 0x00000008\r
- 279                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE0, 0x40004520\r
- 280                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE1, 0x40004521\r
- 281                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE2, 0x40004522\r
- 282                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE3, 0x40004523\r
- 283                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE4, 0x40004524\r
- 284                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE5, 0x40004525\r
- 285                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE6, 0x40004526\r
- 286                   .set CYDEV_PICU_INTTYPE_PICU4_INTTYPE7, 0x40004527\r
- 287                   .set CYDEV_PICU_INTTYPE_PICU5_BASE, 0x40004528\r
- 288                   .set CYDEV_PICU_INTTYPE_PICU5_SIZE, 0x00000008\r
- 289                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE0, 0x40004528\r
- 290                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE1, 0x40004529\r
- 291                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE2, 0x4000452a\r
- 292                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE3, 0x4000452b\r
- 293                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE4, 0x4000452c\r
- 294                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE5, 0x4000452d\r
- 295                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE6, 0x4000452e\r
- 296                   .set CYDEV_PICU_INTTYPE_PICU5_INTTYPE7, 0x4000452f\r
- 297                   .set CYDEV_PICU_INTTYPE_PICU6_BASE, 0x40004530\r
- 298                   .set CYDEV_PICU_INTTYPE_PICU6_SIZE, 0x00000008\r
- 299                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE0, 0x40004530\r
- 300                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE1, 0x40004531\r
- 301                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE2, 0x40004532\r
- 302                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE3, 0x40004533\r
- 303                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE4, 0x40004534\r
- 304                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE5, 0x40004535\r
- 305                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE6, 0x40004536\r
- 306                   .set CYDEV_PICU_INTTYPE_PICU6_INTTYPE7, 0x40004537\r
- 307                   .set CYDEV_PICU_INTTYPE_PICU12_BASE, 0x40004560\r
- 308                   .set CYDEV_PICU_INTTYPE_PICU12_SIZE, 0x00000008\r
- 309                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE0, 0x40004560\r
- 310                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE1, 0x40004561\r
- 311                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE2, 0x40004562\r
- 312                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE3, 0x40004563\r
- 313                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE4, 0x40004564\r
- 314                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE5, 0x40004565\r
- 315                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE6, 0x40004566\r
- 316                   .set CYDEV_PICU_INTTYPE_PICU12_INTTYPE7, 0x40004567\r
- 317                   .set CYDEV_PICU_INTTYPE_PICU15_BASE, 0x40004578\r
- 318                   .set CYDEV_PICU_INTTYPE_PICU15_SIZE, 0x00000008\r
- 319                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE0, 0x40004578\r
- 320                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE1, 0x40004579\r
- 321                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE2, 0x4000457a\r
- 322                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE3, 0x4000457b\r
- 323                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE4, 0x4000457c\r
- 324                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE5, 0x4000457d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 7\r
-\r
-\r
- 325                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE6, 0x4000457e\r
- 326                   .set CYDEV_PICU_INTTYPE_PICU15_INTTYPE7, 0x4000457f\r
- 327                   .set CYDEV_PICU_STAT_BASE, 0x40004580\r
- 328                   .set CYDEV_PICU_STAT_SIZE, 0x00000010\r
- 329                   .set CYDEV_PICU_STAT_PICU0_BASE, 0x40004580\r
- 330                   .set CYDEV_PICU_STAT_PICU0_SIZE, 0x00000001\r
- 331                   .set CYDEV_PICU_STAT_PICU0_INTSTAT, 0x40004580\r
- 332                   .set CYDEV_PICU_STAT_PICU1_BASE, 0x40004581\r
- 333                   .set CYDEV_PICU_STAT_PICU1_SIZE, 0x00000001\r
- 334                   .set CYDEV_PICU_STAT_PICU1_INTSTAT, 0x40004581\r
- 335                   .set CYDEV_PICU_STAT_PICU2_BASE, 0x40004582\r
- 336                   .set CYDEV_PICU_STAT_PICU2_SIZE, 0x00000001\r
- 337                   .set CYDEV_PICU_STAT_PICU2_INTSTAT, 0x40004582\r
- 338                   .set CYDEV_PICU_STAT_PICU3_BASE, 0x40004583\r
- 339                   .set CYDEV_PICU_STAT_PICU3_SIZE, 0x00000001\r
- 340                   .set CYDEV_PICU_STAT_PICU3_INTSTAT, 0x40004583\r
- 341                   .set CYDEV_PICU_STAT_PICU4_BASE, 0x40004584\r
- 342                   .set CYDEV_PICU_STAT_PICU4_SIZE, 0x00000001\r
- 343                   .set CYDEV_PICU_STAT_PICU4_INTSTAT, 0x40004584\r
- 344                   .set CYDEV_PICU_STAT_PICU5_BASE, 0x40004585\r
- 345                   .set CYDEV_PICU_STAT_PICU5_SIZE, 0x00000001\r
- 346                   .set CYDEV_PICU_STAT_PICU5_INTSTAT, 0x40004585\r
- 347                   .set CYDEV_PICU_STAT_PICU6_BASE, 0x40004586\r
- 348                   .set CYDEV_PICU_STAT_PICU6_SIZE, 0x00000001\r
- 349                   .set CYDEV_PICU_STAT_PICU6_INTSTAT, 0x40004586\r
- 350                   .set CYDEV_PICU_STAT_PICU12_BASE, 0x4000458c\r
- 351                   .set CYDEV_PICU_STAT_PICU12_SIZE, 0x00000001\r
- 352                   .set CYDEV_PICU_STAT_PICU12_INTSTAT, 0x4000458c\r
- 353                   .set CYDEV_PICU_STAT_PICU15_BASE, 0x4000458f\r
- 354                   .set CYDEV_PICU_STAT_PICU15_SIZE, 0x00000001\r
- 355                   .set CYDEV_PICU_STAT_PICU15_INTSTAT, 0x4000458f\r
- 356                   .set CYDEV_PICU_SNAP_BASE, 0x40004590\r
- 357                   .set CYDEV_PICU_SNAP_SIZE, 0x00000010\r
- 358                   .set CYDEV_PICU_SNAP_PICU0_BASE, 0x40004590\r
- 359                   .set CYDEV_PICU_SNAP_PICU0_SIZE, 0x00000001\r
- 360                   .set CYDEV_PICU_SNAP_PICU0_SNAP, 0x40004590\r
- 361                   .set CYDEV_PICU_SNAP_PICU1_BASE, 0x40004591\r
- 362                   .set CYDEV_PICU_SNAP_PICU1_SIZE, 0x00000001\r
- 363                   .set CYDEV_PICU_SNAP_PICU1_SNAP, 0x40004591\r
- 364                   .set CYDEV_PICU_SNAP_PICU2_BASE, 0x40004592\r
- 365                   .set CYDEV_PICU_SNAP_PICU2_SIZE, 0x00000001\r
- 366                   .set CYDEV_PICU_SNAP_PICU2_SNAP, 0x40004592\r
- 367                   .set CYDEV_PICU_SNAP_PICU3_BASE, 0x40004593\r
- 368                   .set CYDEV_PICU_SNAP_PICU3_SIZE, 0x00000001\r
- 369                   .set CYDEV_PICU_SNAP_PICU3_SNAP, 0x40004593\r
- 370                   .set CYDEV_PICU_SNAP_PICU4_BASE, 0x40004594\r
- 371                   .set CYDEV_PICU_SNAP_PICU4_SIZE, 0x00000001\r
- 372                   .set CYDEV_PICU_SNAP_PICU4_SNAP, 0x40004594\r
- 373                   .set CYDEV_PICU_SNAP_PICU5_BASE, 0x40004595\r
- 374                   .set CYDEV_PICU_SNAP_PICU5_SIZE, 0x00000001\r
- 375                   .set CYDEV_PICU_SNAP_PICU5_SNAP, 0x40004595\r
- 376                   .set CYDEV_PICU_SNAP_PICU6_BASE, 0x40004596\r
- 377                   .set CYDEV_PICU_SNAP_PICU6_SIZE, 0x00000001\r
- 378                   .set CYDEV_PICU_SNAP_PICU6_SNAP, 0x40004596\r
- 379                   .set CYDEV_PICU_SNAP_PICU12_BASE, 0x4000459c\r
- 380                   .set CYDEV_PICU_SNAP_PICU12_SIZE, 0x00000001\r
- 381                   .set CYDEV_PICU_SNAP_PICU12_SNAP, 0x4000459c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 8\r
-\r
-\r
- 382                   .set CYDEV_PICU_SNAP_PICU_15_BASE, 0x4000459f\r
- 383                   .set CYDEV_PICU_SNAP_PICU_15_SIZE, 0x00000001\r
- 384                   .set CYDEV_PICU_SNAP_PICU_15_SNAP_15, 0x4000459f\r
- 385                   .set CYDEV_PICU_DISABLE_COR_BASE, 0x400045a0\r
- 386                   .set CYDEV_PICU_DISABLE_COR_SIZE, 0x00000010\r
- 387                   .set CYDEV_PICU_DISABLE_COR_PICU0_BASE, 0x400045a0\r
- 388                   .set CYDEV_PICU_DISABLE_COR_PICU0_SIZE, 0x00000001\r
- 389                   .set CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR, 0x400045a0\r
- 390                   .set CYDEV_PICU_DISABLE_COR_PICU1_BASE, 0x400045a1\r
- 391                   .set CYDEV_PICU_DISABLE_COR_PICU1_SIZE, 0x00000001\r
- 392                   .set CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR, 0x400045a1\r
- 393                   .set CYDEV_PICU_DISABLE_COR_PICU2_BASE, 0x400045a2\r
- 394                   .set CYDEV_PICU_DISABLE_COR_PICU2_SIZE, 0x00000001\r
- 395                   .set CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR, 0x400045a2\r
- 396                   .set CYDEV_PICU_DISABLE_COR_PICU3_BASE, 0x400045a3\r
- 397                   .set CYDEV_PICU_DISABLE_COR_PICU3_SIZE, 0x00000001\r
- 398                   .set CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR, 0x400045a3\r
- 399                   .set CYDEV_PICU_DISABLE_COR_PICU4_BASE, 0x400045a4\r
- 400                   .set CYDEV_PICU_DISABLE_COR_PICU4_SIZE, 0x00000001\r
- 401                   .set CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR, 0x400045a4\r
- 402                   .set CYDEV_PICU_DISABLE_COR_PICU5_BASE, 0x400045a5\r
- 403                   .set CYDEV_PICU_DISABLE_COR_PICU5_SIZE, 0x00000001\r
- 404                   .set CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR, 0x400045a5\r
- 405                   .set CYDEV_PICU_DISABLE_COR_PICU6_BASE, 0x400045a6\r
- 406                   .set CYDEV_PICU_DISABLE_COR_PICU6_SIZE, 0x00000001\r
- 407                   .set CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR, 0x400045a6\r
- 408                   .set CYDEV_PICU_DISABLE_COR_PICU12_BASE, 0x400045ac\r
- 409                   .set CYDEV_PICU_DISABLE_COR_PICU12_SIZE, 0x00000001\r
- 410                   .set CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR, 0x400045ac\r
- 411                   .set CYDEV_PICU_DISABLE_COR_PICU15_BASE, 0x400045af\r
- 412                   .set CYDEV_PICU_DISABLE_COR_PICU15_SIZE, 0x00000001\r
- 413                   .set CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR, 0x400045af\r
- 414                   .set CYDEV_MFGCFG_BASE, 0x40004600\r
- 415                   .set CYDEV_MFGCFG_SIZE, 0x000000ed\r
- 416                   .set CYDEV_MFGCFG_ANAIF_BASE, 0x40004600\r
- 417                   .set CYDEV_MFGCFG_ANAIF_SIZE, 0x00000038\r
- 418                   .set CYDEV_MFGCFG_ANAIF_DAC0_BASE, 0x40004608\r
- 419                   .set CYDEV_MFGCFG_ANAIF_DAC0_SIZE, 0x00000001\r
- 420                   .set CYDEV_MFGCFG_ANAIF_DAC0_TR, 0x40004608\r
- 421                   .set CYDEV_MFGCFG_ANAIF_DAC1_BASE, 0x40004609\r
- 422                   .set CYDEV_MFGCFG_ANAIF_DAC1_SIZE, 0x00000001\r
- 423                   .set CYDEV_MFGCFG_ANAIF_DAC1_TR, 0x40004609\r
- 424                   .set CYDEV_MFGCFG_ANAIF_DAC2_BASE, 0x4000460a\r
- 425                   .set CYDEV_MFGCFG_ANAIF_DAC2_SIZE, 0x00000001\r
- 426                   .set CYDEV_MFGCFG_ANAIF_DAC2_TR, 0x4000460a\r
- 427                   .set CYDEV_MFGCFG_ANAIF_DAC3_BASE, 0x4000460b\r
- 428                   .set CYDEV_MFGCFG_ANAIF_DAC3_SIZE, 0x00000001\r
- 429                   .set CYDEV_MFGCFG_ANAIF_DAC3_TR, 0x4000460b\r
- 430                   .set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE, 0x40004610\r
- 431                   .set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE, 0x00000001\r
- 432                   .set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0, 0x40004610\r
- 433                   .set CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE, 0x40004611\r
- 434                   .set CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE, 0x00000001\r
- 435                   .set CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0, 0x40004611\r
- 436                   .set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE, 0x40004612\r
- 437                   .set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE, 0x00000001\r
- 438                   .set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0, 0x40004612\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 9\r
-\r
-\r
- 439                   .set CYDEV_MFGCFG_ANAIF_SAR0_BASE, 0x40004614\r
- 440                   .set CYDEV_MFGCFG_ANAIF_SAR0_SIZE, 0x00000001\r
- 441                   .set CYDEV_MFGCFG_ANAIF_SAR0_TR0, 0x40004614\r
- 442                   .set CYDEV_MFGCFG_ANAIF_SAR1_BASE, 0x40004616\r
- 443                   .set CYDEV_MFGCFG_ANAIF_SAR1_SIZE, 0x00000001\r
- 444                   .set CYDEV_MFGCFG_ANAIF_SAR1_TR0, 0x40004616\r
- 445                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_BASE, 0x40004620\r
- 446                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE, 0x00000002\r
- 447                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_TR0, 0x40004620\r
- 448                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_TR1, 0x40004621\r
- 449                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_BASE, 0x40004622\r
- 450                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE, 0x00000002\r
- 451                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_TR0, 0x40004622\r
- 452                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_TR1, 0x40004623\r
- 453                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_BASE, 0x40004624\r
- 454                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE, 0x00000002\r
- 455                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_TR0, 0x40004624\r
- 456                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_TR1, 0x40004625\r
- 457                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_BASE, 0x40004626\r
- 458                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE, 0x00000002\r
- 459                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_TR0, 0x40004626\r
- 460                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_TR1, 0x40004627\r
- 461                   .set CYDEV_MFGCFG_ANAIF_CMP0_BASE, 0x40004630\r
- 462                   .set CYDEV_MFGCFG_ANAIF_CMP0_SIZE, 0x00000002\r
- 463                   .set CYDEV_MFGCFG_ANAIF_CMP0_TR0, 0x40004630\r
- 464                   .set CYDEV_MFGCFG_ANAIF_CMP0_TR1, 0x40004631\r
- 465                   .set CYDEV_MFGCFG_ANAIF_CMP1_BASE, 0x40004632\r
- 466                   .set CYDEV_MFGCFG_ANAIF_CMP1_SIZE, 0x00000002\r
- 467                   .set CYDEV_MFGCFG_ANAIF_CMP1_TR0, 0x40004632\r
- 468                   .set CYDEV_MFGCFG_ANAIF_CMP1_TR1, 0x40004633\r
- 469                   .set CYDEV_MFGCFG_ANAIF_CMP2_BASE, 0x40004634\r
- 470                   .set CYDEV_MFGCFG_ANAIF_CMP2_SIZE, 0x00000002\r
- 471                   .set CYDEV_MFGCFG_ANAIF_CMP2_TR0, 0x40004634\r
- 472                   .set CYDEV_MFGCFG_ANAIF_CMP2_TR1, 0x40004635\r
- 473                   .set CYDEV_MFGCFG_ANAIF_CMP3_BASE, 0x40004636\r
- 474                   .set CYDEV_MFGCFG_ANAIF_CMP3_SIZE, 0x00000002\r
- 475                   .set CYDEV_MFGCFG_ANAIF_CMP3_TR0, 0x40004636\r
- 476                   .set CYDEV_MFGCFG_ANAIF_CMP3_TR1, 0x40004637\r
- 477                   .set CYDEV_MFGCFG_PWRSYS_BASE, 0x40004680\r
- 478                   .set CYDEV_MFGCFG_PWRSYS_SIZE, 0x0000000b\r
- 479                   .set CYDEV_MFGCFG_PWRSYS_HIB_TR0, 0x40004680\r
- 480                   .set CYDEV_MFGCFG_PWRSYS_HIB_TR1, 0x40004681\r
- 481                   .set CYDEV_MFGCFG_PWRSYS_I2C_TR, 0x40004682\r
- 482                   .set CYDEV_MFGCFG_PWRSYS_SLP_TR, 0x40004683\r
- 483                   .set CYDEV_MFGCFG_PWRSYS_BUZZ_TR, 0x40004684\r
- 484                   .set CYDEV_MFGCFG_PWRSYS_WAKE_TR0, 0x40004685\r
- 485                   .set CYDEV_MFGCFG_PWRSYS_WAKE_TR1, 0x40004686\r
- 486                   .set CYDEV_MFGCFG_PWRSYS_BREF_TR, 0x40004687\r
- 487                   .set CYDEV_MFGCFG_PWRSYS_BG_TR, 0x40004688\r
- 488                   .set CYDEV_MFGCFG_PWRSYS_WAKE_TR2, 0x40004689\r
- 489                   .set CYDEV_MFGCFG_PWRSYS_WAKE_TR3, 0x4000468a\r
- 490                   .set CYDEV_MFGCFG_ILO_BASE, 0x40004690\r
- 491                   .set CYDEV_MFGCFG_ILO_SIZE, 0x00000002\r
- 492                   .set CYDEV_MFGCFG_ILO_TR0, 0x40004690\r
- 493                   .set CYDEV_MFGCFG_ILO_TR1, 0x40004691\r
- 494                   .set CYDEV_MFGCFG_X32_BASE, 0x40004698\r
- 495                   .set CYDEV_MFGCFG_X32_SIZE, 0x00000001\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 10\r
-\r
-\r
- 496                   .set CYDEV_MFGCFG_X32_TR, 0x40004698\r
- 497                   .set CYDEV_MFGCFG_IMO_BASE, 0x400046a0\r
- 498                   .set CYDEV_MFGCFG_IMO_SIZE, 0x00000005\r
- 499                   .set CYDEV_MFGCFG_IMO_TR0, 0x400046a0\r
- 500                   .set CYDEV_MFGCFG_IMO_TR1, 0x400046a1\r
- 501                   .set CYDEV_MFGCFG_IMO_GAIN, 0x400046a2\r
- 502                   .set CYDEV_MFGCFG_IMO_C36M, 0x400046a3\r
- 503                   .set CYDEV_MFGCFG_IMO_TR2, 0x400046a4\r
- 504                   .set CYDEV_MFGCFG_XMHZ_BASE, 0x400046a8\r
- 505                   .set CYDEV_MFGCFG_XMHZ_SIZE, 0x00000001\r
- 506                   .set CYDEV_MFGCFG_XMHZ_TR, 0x400046a8\r
- 507                   .set CYDEV_MFGCFG_DLY, 0x400046c0\r
- 508                   .set CYDEV_MFGCFG_MLOGIC_BASE, 0x400046e0\r
- 509                   .set CYDEV_MFGCFG_MLOGIC_SIZE, 0x0000000d\r
- 510                   .set CYDEV_MFGCFG_MLOGIC_DMPSTR, 0x400046e2\r
- 511                   .set CYDEV_MFGCFG_MLOGIC_SEG_BASE, 0x400046e4\r
- 512                   .set CYDEV_MFGCFG_MLOGIC_SEG_SIZE, 0x00000002\r
- 513                   .set CYDEV_MFGCFG_MLOGIC_SEG_CR, 0x400046e4\r
- 514                   .set CYDEV_MFGCFG_MLOGIC_SEG_CFG0, 0x400046e5\r
- 515                   .set CYDEV_MFGCFG_MLOGIC_DEBUG, 0x400046e8\r
- 516                   .set CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE, 0x400046ea\r
- 517                   .set CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE, 0x00000001\r
- 518                   .set CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR, 0x400046ea\r
- 519                   .set CYDEV_MFGCFG_MLOGIC_REV_ID, 0x400046ec\r
- 520                   .set CYDEV_RESET_BASE, 0x400046f0\r
- 521                   .set CYDEV_RESET_SIZE, 0x0000000f\r
- 522                   .set CYDEV_RESET_IPOR_CR0, 0x400046f0\r
- 523                   .set CYDEV_RESET_IPOR_CR1, 0x400046f1\r
- 524                   .set CYDEV_RESET_IPOR_CR2, 0x400046f2\r
- 525                   .set CYDEV_RESET_IPOR_CR3, 0x400046f3\r
- 526                   .set CYDEV_RESET_CR0, 0x400046f4\r
- 527                   .set CYDEV_RESET_CR1, 0x400046f5\r
- 528                   .set CYDEV_RESET_CR2, 0x400046f6\r
- 529                   .set CYDEV_RESET_CR3, 0x400046f7\r
- 530                   .set CYDEV_RESET_CR4, 0x400046f8\r
- 531                   .set CYDEV_RESET_CR5, 0x400046f9\r
- 532                   .set CYDEV_RESET_SR0, 0x400046fa\r
- 533                   .set CYDEV_RESET_SR1, 0x400046fb\r
- 534                   .set CYDEV_RESET_SR2, 0x400046fc\r
- 535                   .set CYDEV_RESET_SR3, 0x400046fd\r
- 536                   .set CYDEV_RESET_TR, 0x400046fe\r
- 537                   .set CYDEV_SPC_BASE, 0x40004700\r
- 538                   .set CYDEV_SPC_SIZE, 0x00000100\r
- 539                   .set CYDEV_SPC_FM_EE_CR, 0x40004700\r
- 540                   .set CYDEV_SPC_FM_EE_WAKE_CNT, 0x40004701\r
- 541                   .set CYDEV_SPC_EE_SCR, 0x40004702\r
- 542                   .set CYDEV_SPC_EE_ERR, 0x40004703\r
- 543                   .set CYDEV_SPC_CPU_DATA, 0x40004720\r
- 544                   .set CYDEV_SPC_DMA_DATA, 0x40004721\r
- 545                   .set CYDEV_SPC_SR, 0x40004722\r
- 546                   .set CYDEV_SPC_CR, 0x40004723\r
- 547                   .set CYDEV_SPC_DMM_MAP_BASE, 0x40004780\r
- 548                   .set CYDEV_SPC_DMM_MAP_SIZE, 0x00000080\r
- 549                   .set CYDEV_SPC_DMM_MAP_SRAM_MBASE, 0x40004780\r
- 550                   .set CYDEV_SPC_DMM_MAP_SRAM_MSIZE, 0x00000080\r
- 551                   .set CYDEV_CACHE_BASE, 0x40004800\r
- 552                   .set CYDEV_CACHE_SIZE, 0x0000009c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 11\r
-\r
-\r
- 553                   .set CYDEV_CACHE_CC_CTL, 0x40004800\r
- 554                   .set CYDEV_CACHE_ECC_CORR, 0x40004880\r
- 555                   .set CYDEV_CACHE_ECC_ERR, 0x40004888\r
- 556                   .set CYDEV_CACHE_FLASH_ERR, 0x40004890\r
- 557                   .set CYDEV_CACHE_HITMISS, 0x40004898\r
- 558                   .set CYDEV_I2C_BASE, 0x40004900\r
- 559                   .set CYDEV_I2C_SIZE, 0x000000e1\r
- 560                   .set CYDEV_I2C_XCFG, 0x400049c8\r
- 561                   .set CYDEV_I2C_ADR, 0x400049ca\r
- 562                   .set CYDEV_I2C_CFG, 0x400049d6\r
- 563                   .set CYDEV_I2C_CSR, 0x400049d7\r
- 564                   .set CYDEV_I2C_D, 0x400049d8\r
- 565                   .set CYDEV_I2C_MCSR, 0x400049d9\r
- 566                   .set CYDEV_I2C_CLK_DIV1, 0x400049db\r
- 567                   .set CYDEV_I2C_CLK_DIV2, 0x400049dc\r
- 568                   .set CYDEV_I2C_TMOUT_CSR, 0x400049dd\r
- 569                   .set CYDEV_I2C_TMOUT_SR, 0x400049de\r
- 570                   .set CYDEV_I2C_TMOUT_CFG0, 0x400049df\r
- 571                   .set CYDEV_I2C_TMOUT_CFG1, 0x400049e0\r
- 572                   .set CYDEV_DEC_BASE, 0x40004e00\r
- 573                   .set CYDEV_DEC_SIZE, 0x00000015\r
- 574                   .set CYDEV_DEC_CR, 0x40004e00\r
- 575                   .set CYDEV_DEC_SR, 0x40004e01\r
- 576                   .set CYDEV_DEC_SHIFT1, 0x40004e02\r
- 577                   .set CYDEV_DEC_SHIFT2, 0x40004e03\r
- 578                   .set CYDEV_DEC_DR2, 0x40004e04\r
- 579                   .set CYDEV_DEC_DR2H, 0x40004e05\r
- 580                   .set CYDEV_DEC_DR1, 0x40004e06\r
- 581                   .set CYDEV_DEC_OCOR, 0x40004e08\r
- 582                   .set CYDEV_DEC_OCORM, 0x40004e09\r
- 583                   .set CYDEV_DEC_OCORH, 0x40004e0a\r
- 584                   .set CYDEV_DEC_GCOR, 0x40004e0c\r
- 585                   .set CYDEV_DEC_GCORH, 0x40004e0d\r
- 586                   .set CYDEV_DEC_GVAL, 0x40004e0e\r
- 587                   .set CYDEV_DEC_OUTSAMP, 0x40004e10\r
- 588                   .set CYDEV_DEC_OUTSAMPM, 0x40004e11\r
- 589                   .set CYDEV_DEC_OUTSAMPH, 0x40004e12\r
- 590                   .set CYDEV_DEC_OUTSAMPS, 0x40004e13\r
- 591                   .set CYDEV_DEC_COHER, 0x40004e14\r
- 592                   .set CYDEV_TMR0_BASE, 0x40004f00\r
- 593                   .set CYDEV_TMR0_SIZE, 0x0000000c\r
- 594                   .set CYDEV_TMR0_CFG0, 0x40004f00\r
- 595                   .set CYDEV_TMR0_CFG1, 0x40004f01\r
- 596                   .set CYDEV_TMR0_CFG2, 0x40004f02\r
- 597                   .set CYDEV_TMR0_SR0, 0x40004f03\r
- 598                   .set CYDEV_TMR0_PER0, 0x40004f04\r
- 599                   .set CYDEV_TMR0_PER1, 0x40004f05\r
- 600                   .set CYDEV_TMR0_CNT_CMP0, 0x40004f06\r
- 601                   .set CYDEV_TMR0_CNT_CMP1, 0x40004f07\r
- 602                   .set CYDEV_TMR0_CAP0, 0x40004f08\r
- 603                   .set CYDEV_TMR0_CAP1, 0x40004f09\r
- 604                   .set CYDEV_TMR0_RT0, 0x40004f0a\r
- 605                   .set CYDEV_TMR0_RT1, 0x40004f0b\r
- 606                   .set CYDEV_TMR1_BASE, 0x40004f0c\r
- 607                   .set CYDEV_TMR1_SIZE, 0x0000000c\r
- 608                   .set CYDEV_TMR1_CFG0, 0x40004f0c\r
- 609                   .set CYDEV_TMR1_CFG1, 0x40004f0d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 12\r
-\r
-\r
- 610                   .set CYDEV_TMR1_CFG2, 0x40004f0e\r
- 611                   .set CYDEV_TMR1_SR0, 0x40004f0f\r
- 612                   .set CYDEV_TMR1_PER0, 0x40004f10\r
- 613                   .set CYDEV_TMR1_PER1, 0x40004f11\r
- 614                   .set CYDEV_TMR1_CNT_CMP0, 0x40004f12\r
- 615                   .set CYDEV_TMR1_CNT_CMP1, 0x40004f13\r
- 616                   .set CYDEV_TMR1_CAP0, 0x40004f14\r
- 617                   .set CYDEV_TMR1_CAP1, 0x40004f15\r
- 618                   .set CYDEV_TMR1_RT0, 0x40004f16\r
- 619                   .set CYDEV_TMR1_RT1, 0x40004f17\r
- 620                   .set CYDEV_TMR2_BASE, 0x40004f18\r
- 621                   .set CYDEV_TMR2_SIZE, 0x0000000c\r
- 622                   .set CYDEV_TMR2_CFG0, 0x40004f18\r
- 623                   .set CYDEV_TMR2_CFG1, 0x40004f19\r
- 624                   .set CYDEV_TMR2_CFG2, 0x40004f1a\r
- 625                   .set CYDEV_TMR2_SR0, 0x40004f1b\r
- 626                   .set CYDEV_TMR2_PER0, 0x40004f1c\r
- 627                   .set CYDEV_TMR2_PER1, 0x40004f1d\r
- 628                   .set CYDEV_TMR2_CNT_CMP0, 0x40004f1e\r
- 629                   .set CYDEV_TMR2_CNT_CMP1, 0x40004f1f\r
- 630                   .set CYDEV_TMR2_CAP0, 0x40004f20\r
- 631                   .set CYDEV_TMR2_CAP1, 0x40004f21\r
- 632                   .set CYDEV_TMR2_RT0, 0x40004f22\r
- 633                   .set CYDEV_TMR2_RT1, 0x40004f23\r
- 634                   .set CYDEV_TMR3_BASE, 0x40004f24\r
- 635                   .set CYDEV_TMR3_SIZE, 0x0000000c\r
- 636                   .set CYDEV_TMR3_CFG0, 0x40004f24\r
- 637                   .set CYDEV_TMR3_CFG1, 0x40004f25\r
- 638                   .set CYDEV_TMR3_CFG2, 0x40004f26\r
- 639                   .set CYDEV_TMR3_SR0, 0x40004f27\r
- 640                   .set CYDEV_TMR3_PER0, 0x40004f28\r
- 641                   .set CYDEV_TMR3_PER1, 0x40004f29\r
- 642                   .set CYDEV_TMR3_CNT_CMP0, 0x40004f2a\r
- 643                   .set CYDEV_TMR3_CNT_CMP1, 0x40004f2b\r
- 644                   .set CYDEV_TMR3_CAP0, 0x40004f2c\r
- 645                   .set CYDEV_TMR3_CAP1, 0x40004f2d\r
- 646                   .set CYDEV_TMR3_RT0, 0x40004f2e\r
- 647                   .set CYDEV_TMR3_RT1, 0x40004f2f\r
- 648                   .set CYDEV_IO_BASE, 0x40005000\r
- 649                   .set CYDEV_IO_SIZE, 0x00000200\r
- 650                   .set CYDEV_IO_PC_BASE, 0x40005000\r
- 651                   .set CYDEV_IO_PC_SIZE, 0x00000080\r
- 652                   .set CYDEV_IO_PC_PRT0_BASE, 0x40005000\r
- 653                   .set CYDEV_IO_PC_PRT0_SIZE, 0x00000008\r
- 654                   .set CYDEV_IO_PC_PRT0_PC0, 0x40005000\r
- 655                   .set CYDEV_IO_PC_PRT0_PC1, 0x40005001\r
- 656                   .set CYDEV_IO_PC_PRT0_PC2, 0x40005002\r
- 657                   .set CYDEV_IO_PC_PRT0_PC3, 0x40005003\r
- 658                   .set CYDEV_IO_PC_PRT0_PC4, 0x40005004\r
- 659                   .set CYDEV_IO_PC_PRT0_PC5, 0x40005005\r
- 660                   .set CYDEV_IO_PC_PRT0_PC6, 0x40005006\r
- 661                   .set CYDEV_IO_PC_PRT0_PC7, 0x40005007\r
- 662                   .set CYDEV_IO_PC_PRT1_BASE, 0x40005008\r
- 663                   .set CYDEV_IO_PC_PRT1_SIZE, 0x00000008\r
- 664                   .set CYDEV_IO_PC_PRT1_PC0, 0x40005008\r
- 665                   .set CYDEV_IO_PC_PRT1_PC1, 0x40005009\r
- 666                   .set CYDEV_IO_PC_PRT1_PC2, 0x4000500a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 13\r
-\r
-\r
- 667                   .set CYDEV_IO_PC_PRT1_PC3, 0x4000500b\r
- 668                   .set CYDEV_IO_PC_PRT1_PC4, 0x4000500c\r
- 669                   .set CYDEV_IO_PC_PRT1_PC5, 0x4000500d\r
- 670                   .set CYDEV_IO_PC_PRT1_PC6, 0x4000500e\r
- 671                   .set CYDEV_IO_PC_PRT1_PC7, 0x4000500f\r
- 672                   .set CYDEV_IO_PC_PRT2_BASE, 0x40005010\r
- 673                   .set CYDEV_IO_PC_PRT2_SIZE, 0x00000008\r
- 674                   .set CYDEV_IO_PC_PRT2_PC0, 0x40005010\r
- 675                   .set CYDEV_IO_PC_PRT2_PC1, 0x40005011\r
- 676                   .set CYDEV_IO_PC_PRT2_PC2, 0x40005012\r
- 677                   .set CYDEV_IO_PC_PRT2_PC3, 0x40005013\r
- 678                   .set CYDEV_IO_PC_PRT2_PC4, 0x40005014\r
- 679                   .set CYDEV_IO_PC_PRT2_PC5, 0x40005015\r
- 680                   .set CYDEV_IO_PC_PRT2_PC6, 0x40005016\r
- 681                   .set CYDEV_IO_PC_PRT2_PC7, 0x40005017\r
- 682                   .set CYDEV_IO_PC_PRT3_BASE, 0x40005018\r
- 683                   .set CYDEV_IO_PC_PRT3_SIZE, 0x00000008\r
- 684                   .set CYDEV_IO_PC_PRT3_PC0, 0x40005018\r
- 685                   .set CYDEV_IO_PC_PRT3_PC1, 0x40005019\r
- 686                   .set CYDEV_IO_PC_PRT3_PC2, 0x4000501a\r
- 687                   .set CYDEV_IO_PC_PRT3_PC3, 0x4000501b\r
- 688                   .set CYDEV_IO_PC_PRT3_PC4, 0x4000501c\r
- 689                   .set CYDEV_IO_PC_PRT3_PC5, 0x4000501d\r
- 690                   .set CYDEV_IO_PC_PRT3_PC6, 0x4000501e\r
- 691                   .set CYDEV_IO_PC_PRT3_PC7, 0x4000501f\r
- 692                   .set CYDEV_IO_PC_PRT4_BASE, 0x40005020\r
- 693                   .set CYDEV_IO_PC_PRT4_SIZE, 0x00000008\r
- 694                   .set CYDEV_IO_PC_PRT4_PC0, 0x40005020\r
- 695                   .set CYDEV_IO_PC_PRT4_PC1, 0x40005021\r
- 696                   .set CYDEV_IO_PC_PRT4_PC2, 0x40005022\r
- 697                   .set CYDEV_IO_PC_PRT4_PC3, 0x40005023\r
- 698                   .set CYDEV_IO_PC_PRT4_PC4, 0x40005024\r
- 699                   .set CYDEV_IO_PC_PRT4_PC5, 0x40005025\r
- 700                   .set CYDEV_IO_PC_PRT4_PC6, 0x40005026\r
- 701                   .set CYDEV_IO_PC_PRT4_PC7, 0x40005027\r
- 702                   .set CYDEV_IO_PC_PRT5_BASE, 0x40005028\r
- 703                   .set CYDEV_IO_PC_PRT5_SIZE, 0x00000008\r
- 704                   .set CYDEV_IO_PC_PRT5_PC0, 0x40005028\r
- 705                   .set CYDEV_IO_PC_PRT5_PC1, 0x40005029\r
- 706                   .set CYDEV_IO_PC_PRT5_PC2, 0x4000502a\r
- 707                   .set CYDEV_IO_PC_PRT5_PC3, 0x4000502b\r
- 708                   .set CYDEV_IO_PC_PRT5_PC4, 0x4000502c\r
- 709                   .set CYDEV_IO_PC_PRT5_PC5, 0x4000502d\r
- 710                   .set CYDEV_IO_PC_PRT5_PC6, 0x4000502e\r
- 711                   .set CYDEV_IO_PC_PRT5_PC7, 0x4000502f\r
- 712                   .set CYDEV_IO_PC_PRT6_BASE, 0x40005030\r
- 713                   .set CYDEV_IO_PC_PRT6_SIZE, 0x00000008\r
- 714                   .set CYDEV_IO_PC_PRT6_PC0, 0x40005030\r
- 715                   .set CYDEV_IO_PC_PRT6_PC1, 0x40005031\r
- 716                   .set CYDEV_IO_PC_PRT6_PC2, 0x40005032\r
- 717                   .set CYDEV_IO_PC_PRT6_PC3, 0x40005033\r
- 718                   .set CYDEV_IO_PC_PRT6_PC4, 0x40005034\r
- 719                   .set CYDEV_IO_PC_PRT6_PC5, 0x40005035\r
- 720                   .set CYDEV_IO_PC_PRT6_PC6, 0x40005036\r
- 721                   .set CYDEV_IO_PC_PRT6_PC7, 0x40005037\r
- 722                   .set CYDEV_IO_PC_PRT12_BASE, 0x40005060\r
- 723                   .set CYDEV_IO_PC_PRT12_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 14\r
-\r
-\r
- 724                   .set CYDEV_IO_PC_PRT12_PC0, 0x40005060\r
- 725                   .set CYDEV_IO_PC_PRT12_PC1, 0x40005061\r
- 726                   .set CYDEV_IO_PC_PRT12_PC2, 0x40005062\r
- 727                   .set CYDEV_IO_PC_PRT12_PC3, 0x40005063\r
- 728                   .set CYDEV_IO_PC_PRT12_PC4, 0x40005064\r
- 729                   .set CYDEV_IO_PC_PRT12_PC5, 0x40005065\r
- 730                   .set CYDEV_IO_PC_PRT12_PC6, 0x40005066\r
- 731                   .set CYDEV_IO_PC_PRT12_PC7, 0x40005067\r
- 732                   .set CYDEV_IO_PC_PRT15_BASE, 0x40005078\r
- 733                   .set CYDEV_IO_PC_PRT15_SIZE, 0x00000006\r
- 734                   .set CYDEV_IO_PC_PRT15_PC0, 0x40005078\r
- 735                   .set CYDEV_IO_PC_PRT15_PC1, 0x40005079\r
- 736                   .set CYDEV_IO_PC_PRT15_PC2, 0x4000507a\r
- 737                   .set CYDEV_IO_PC_PRT15_PC3, 0x4000507b\r
- 738                   .set CYDEV_IO_PC_PRT15_PC4, 0x4000507c\r
- 739                   .set CYDEV_IO_PC_PRT15_PC5, 0x4000507d\r
- 740                   .set CYDEV_IO_PC_PRT15_7_6_BASE, 0x4000507e\r
- 741                   .set CYDEV_IO_PC_PRT15_7_6_SIZE, 0x00000002\r
- 742                   .set CYDEV_IO_PC_PRT15_7_6_PC0, 0x4000507e\r
- 743                   .set CYDEV_IO_PC_PRT15_7_6_PC1, 0x4000507f\r
- 744                   .set CYDEV_IO_DR_BASE, 0x40005080\r
- 745                   .set CYDEV_IO_DR_SIZE, 0x00000010\r
- 746                   .set CYDEV_IO_DR_PRT0_BASE, 0x40005080\r
- 747                   .set CYDEV_IO_DR_PRT0_SIZE, 0x00000001\r
- 748                   .set CYDEV_IO_DR_PRT0_DR_ALIAS, 0x40005080\r
- 749                   .set CYDEV_IO_DR_PRT1_BASE, 0x40005081\r
- 750                   .set CYDEV_IO_DR_PRT1_SIZE, 0x00000001\r
- 751                   .set CYDEV_IO_DR_PRT1_DR_ALIAS, 0x40005081\r
- 752                   .set CYDEV_IO_DR_PRT2_BASE, 0x40005082\r
- 753                   .set CYDEV_IO_DR_PRT2_SIZE, 0x00000001\r
- 754                   .set CYDEV_IO_DR_PRT2_DR_ALIAS, 0x40005082\r
- 755                   .set CYDEV_IO_DR_PRT3_BASE, 0x40005083\r
- 756                   .set CYDEV_IO_DR_PRT3_SIZE, 0x00000001\r
- 757                   .set CYDEV_IO_DR_PRT3_DR_ALIAS, 0x40005083\r
- 758                   .set CYDEV_IO_DR_PRT4_BASE, 0x40005084\r
- 759                   .set CYDEV_IO_DR_PRT4_SIZE, 0x00000001\r
- 760                   .set CYDEV_IO_DR_PRT4_DR_ALIAS, 0x40005084\r
- 761                   .set CYDEV_IO_DR_PRT5_BASE, 0x40005085\r
- 762                   .set CYDEV_IO_DR_PRT5_SIZE, 0x00000001\r
- 763                   .set CYDEV_IO_DR_PRT5_DR_ALIAS, 0x40005085\r
- 764                   .set CYDEV_IO_DR_PRT6_BASE, 0x40005086\r
- 765                   .set CYDEV_IO_DR_PRT6_SIZE, 0x00000001\r
- 766                   .set CYDEV_IO_DR_PRT6_DR_ALIAS, 0x40005086\r
- 767                   .set CYDEV_IO_DR_PRT12_BASE, 0x4000508c\r
- 768                   .set CYDEV_IO_DR_PRT12_SIZE, 0x00000001\r
- 769                   .set CYDEV_IO_DR_PRT12_DR_ALIAS, 0x4000508c\r
- 770                   .set CYDEV_IO_DR_PRT15_BASE, 0x4000508f\r
- 771                   .set CYDEV_IO_DR_PRT15_SIZE, 0x00000001\r
- 772                   .set CYDEV_IO_DR_PRT15_DR_15_ALIAS, 0x4000508f\r
- 773                   .set CYDEV_IO_PS_BASE, 0x40005090\r
- 774                   .set CYDEV_IO_PS_SIZE, 0x00000010\r
- 775                   .set CYDEV_IO_PS_PRT0_BASE, 0x40005090\r
- 776                   .set CYDEV_IO_PS_PRT0_SIZE, 0x00000001\r
- 777                   .set CYDEV_IO_PS_PRT0_PS_ALIAS, 0x40005090\r
- 778                   .set CYDEV_IO_PS_PRT1_BASE, 0x40005091\r
- 779                   .set CYDEV_IO_PS_PRT1_SIZE, 0x00000001\r
- 780                   .set CYDEV_IO_PS_PRT1_PS_ALIAS, 0x40005091\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 15\r
-\r
-\r
- 781                   .set CYDEV_IO_PS_PRT2_BASE, 0x40005092\r
- 782                   .set CYDEV_IO_PS_PRT2_SIZE, 0x00000001\r
- 783                   .set CYDEV_IO_PS_PRT2_PS_ALIAS, 0x40005092\r
- 784                   .set CYDEV_IO_PS_PRT3_BASE, 0x40005093\r
- 785                   .set CYDEV_IO_PS_PRT3_SIZE, 0x00000001\r
- 786                   .set CYDEV_IO_PS_PRT3_PS_ALIAS, 0x40005093\r
- 787                   .set CYDEV_IO_PS_PRT4_BASE, 0x40005094\r
- 788                   .set CYDEV_IO_PS_PRT4_SIZE, 0x00000001\r
- 789                   .set CYDEV_IO_PS_PRT4_PS_ALIAS, 0x40005094\r
- 790                   .set CYDEV_IO_PS_PRT5_BASE, 0x40005095\r
- 791                   .set CYDEV_IO_PS_PRT5_SIZE, 0x00000001\r
- 792                   .set CYDEV_IO_PS_PRT5_PS_ALIAS, 0x40005095\r
- 793                   .set CYDEV_IO_PS_PRT6_BASE, 0x40005096\r
- 794                   .set CYDEV_IO_PS_PRT6_SIZE, 0x00000001\r
- 795                   .set CYDEV_IO_PS_PRT6_PS_ALIAS, 0x40005096\r
- 796                   .set CYDEV_IO_PS_PRT12_BASE, 0x4000509c\r
- 797                   .set CYDEV_IO_PS_PRT12_SIZE, 0x00000001\r
- 798                   .set CYDEV_IO_PS_PRT12_PS_ALIAS, 0x4000509c\r
- 799                   .set CYDEV_IO_PS_PRT15_BASE, 0x4000509f\r
- 800                   .set CYDEV_IO_PS_PRT15_SIZE, 0x00000001\r
- 801                   .set CYDEV_IO_PS_PRT15_PS15_ALIAS, 0x4000509f\r
- 802                   .set CYDEV_IO_PRT_BASE, 0x40005100\r
- 803                   .set CYDEV_IO_PRT_SIZE, 0x00000100\r
- 804                   .set CYDEV_IO_PRT_PRT0_BASE, 0x40005100\r
- 805                   .set CYDEV_IO_PRT_PRT0_SIZE, 0x00000010\r
- 806                   .set CYDEV_IO_PRT_PRT0_DR, 0x40005100\r
- 807                   .set CYDEV_IO_PRT_PRT0_PS, 0x40005101\r
- 808                   .set CYDEV_IO_PRT_PRT0_DM0, 0x40005102\r
- 809                   .set CYDEV_IO_PRT_PRT0_DM1, 0x40005103\r
- 810                   .set CYDEV_IO_PRT_PRT0_DM2, 0x40005104\r
- 811                   .set CYDEV_IO_PRT_PRT0_SLW, 0x40005105\r
- 812                   .set CYDEV_IO_PRT_PRT0_BYP, 0x40005106\r
- 813                   .set CYDEV_IO_PRT_PRT0_BIE, 0x40005107\r
- 814                   .set CYDEV_IO_PRT_PRT0_INP_DIS, 0x40005108\r
- 815                   .set CYDEV_IO_PRT_PRT0_CTL, 0x40005109\r
- 816                   .set CYDEV_IO_PRT_PRT0_PRT, 0x4000510a\r
- 817                   .set CYDEV_IO_PRT_PRT0_BIT_MASK, 0x4000510b\r
- 818                   .set CYDEV_IO_PRT_PRT0_AMUX, 0x4000510c\r
- 819                   .set CYDEV_IO_PRT_PRT0_AG, 0x4000510d\r
- 820                   .set CYDEV_IO_PRT_PRT0_LCD_COM_SEG, 0x4000510e\r
- 821                   .set CYDEV_IO_PRT_PRT0_LCD_EN, 0x4000510f\r
- 822                   .set CYDEV_IO_PRT_PRT1_BASE, 0x40005110\r
- 823                   .set CYDEV_IO_PRT_PRT1_SIZE, 0x00000010\r
- 824                   .set CYDEV_IO_PRT_PRT1_DR, 0x40005110\r
- 825                   .set CYDEV_IO_PRT_PRT1_PS, 0x40005111\r
- 826                   .set CYDEV_IO_PRT_PRT1_DM0, 0x40005112\r
- 827                   .set CYDEV_IO_PRT_PRT1_DM1, 0x40005113\r
- 828                   .set CYDEV_IO_PRT_PRT1_DM2, 0x40005114\r
- 829                   .set CYDEV_IO_PRT_PRT1_SLW, 0x40005115\r
- 830                   .set CYDEV_IO_PRT_PRT1_BYP, 0x40005116\r
- 831                   .set CYDEV_IO_PRT_PRT1_BIE, 0x40005117\r
- 832                   .set CYDEV_IO_PRT_PRT1_INP_DIS, 0x40005118\r
- 833                   .set CYDEV_IO_PRT_PRT1_CTL, 0x40005119\r
- 834                   .set CYDEV_IO_PRT_PRT1_PRT, 0x4000511a\r
- 835                   .set CYDEV_IO_PRT_PRT1_BIT_MASK, 0x4000511b\r
- 836                   .set CYDEV_IO_PRT_PRT1_AMUX, 0x4000511c\r
- 837                   .set CYDEV_IO_PRT_PRT1_AG, 0x4000511d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 16\r
-\r
-\r
- 838                   .set CYDEV_IO_PRT_PRT1_LCD_COM_SEG, 0x4000511e\r
- 839                   .set CYDEV_IO_PRT_PRT1_LCD_EN, 0x4000511f\r
- 840                   .set CYDEV_IO_PRT_PRT2_BASE, 0x40005120\r
- 841                   .set CYDEV_IO_PRT_PRT2_SIZE, 0x00000010\r
- 842                   .set CYDEV_IO_PRT_PRT2_DR, 0x40005120\r
- 843                   .set CYDEV_IO_PRT_PRT2_PS, 0x40005121\r
- 844                   .set CYDEV_IO_PRT_PRT2_DM0, 0x40005122\r
- 845                   .set CYDEV_IO_PRT_PRT2_DM1, 0x40005123\r
- 846                   .set CYDEV_IO_PRT_PRT2_DM2, 0x40005124\r
- 847                   .set CYDEV_IO_PRT_PRT2_SLW, 0x40005125\r
- 848                   .set CYDEV_IO_PRT_PRT2_BYP, 0x40005126\r
- 849                   .set CYDEV_IO_PRT_PRT2_BIE, 0x40005127\r
- 850                   .set CYDEV_IO_PRT_PRT2_INP_DIS, 0x40005128\r
- 851                   .set CYDEV_IO_PRT_PRT2_CTL, 0x40005129\r
- 852                   .set CYDEV_IO_PRT_PRT2_PRT, 0x4000512a\r
- 853                   .set CYDEV_IO_PRT_PRT2_BIT_MASK, 0x4000512b\r
- 854                   .set CYDEV_IO_PRT_PRT2_AMUX, 0x4000512c\r
- 855                   .set CYDEV_IO_PRT_PRT2_AG, 0x4000512d\r
- 856                   .set CYDEV_IO_PRT_PRT2_LCD_COM_SEG, 0x4000512e\r
- 857                   .set CYDEV_IO_PRT_PRT2_LCD_EN, 0x4000512f\r
- 858                   .set CYDEV_IO_PRT_PRT3_BASE, 0x40005130\r
- 859                   .set CYDEV_IO_PRT_PRT3_SIZE, 0x00000010\r
- 860                   .set CYDEV_IO_PRT_PRT3_DR, 0x40005130\r
- 861                   .set CYDEV_IO_PRT_PRT3_PS, 0x40005131\r
- 862                   .set CYDEV_IO_PRT_PRT3_DM0, 0x40005132\r
- 863                   .set CYDEV_IO_PRT_PRT3_DM1, 0x40005133\r
- 864                   .set CYDEV_IO_PRT_PRT3_DM2, 0x40005134\r
- 865                   .set CYDEV_IO_PRT_PRT3_SLW, 0x40005135\r
- 866                   .set CYDEV_IO_PRT_PRT3_BYP, 0x40005136\r
- 867                   .set CYDEV_IO_PRT_PRT3_BIE, 0x40005137\r
- 868                   .set CYDEV_IO_PRT_PRT3_INP_DIS, 0x40005138\r
- 869                   .set CYDEV_IO_PRT_PRT3_CTL, 0x40005139\r
- 870                   .set CYDEV_IO_PRT_PRT3_PRT, 0x4000513a\r
- 871                   .set CYDEV_IO_PRT_PRT3_BIT_MASK, 0x4000513b\r
- 872                   .set CYDEV_IO_PRT_PRT3_AMUX, 0x4000513c\r
- 873                   .set CYDEV_IO_PRT_PRT3_AG, 0x4000513d\r
- 874                   .set CYDEV_IO_PRT_PRT3_LCD_COM_SEG, 0x4000513e\r
- 875                   .set CYDEV_IO_PRT_PRT3_LCD_EN, 0x4000513f\r
- 876                   .set CYDEV_IO_PRT_PRT4_BASE, 0x40005140\r
- 877                   .set CYDEV_IO_PRT_PRT4_SIZE, 0x00000010\r
- 878                   .set CYDEV_IO_PRT_PRT4_DR, 0x40005140\r
- 879                   .set CYDEV_IO_PRT_PRT4_PS, 0x40005141\r
- 880                   .set CYDEV_IO_PRT_PRT4_DM0, 0x40005142\r
- 881                   .set CYDEV_IO_PRT_PRT4_DM1, 0x40005143\r
- 882                   .set CYDEV_IO_PRT_PRT4_DM2, 0x40005144\r
- 883                   .set CYDEV_IO_PRT_PRT4_SLW, 0x40005145\r
- 884                   .set CYDEV_IO_PRT_PRT4_BYP, 0x40005146\r
- 885                   .set CYDEV_IO_PRT_PRT4_BIE, 0x40005147\r
- 886                   .set CYDEV_IO_PRT_PRT4_INP_DIS, 0x40005148\r
- 887                   .set CYDEV_IO_PRT_PRT4_CTL, 0x40005149\r
- 888                   .set CYDEV_IO_PRT_PRT4_PRT, 0x4000514a\r
- 889                   .set CYDEV_IO_PRT_PRT4_BIT_MASK, 0x4000514b\r
- 890                   .set CYDEV_IO_PRT_PRT4_AMUX, 0x4000514c\r
- 891                   .set CYDEV_IO_PRT_PRT4_AG, 0x4000514d\r
- 892                   .set CYDEV_IO_PRT_PRT4_LCD_COM_SEG, 0x4000514e\r
- 893                   .set CYDEV_IO_PRT_PRT4_LCD_EN, 0x4000514f\r
- 894                   .set CYDEV_IO_PRT_PRT5_BASE, 0x40005150\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 17\r
-\r
-\r
- 895                   .set CYDEV_IO_PRT_PRT5_SIZE, 0x00000010\r
- 896                   .set CYDEV_IO_PRT_PRT5_DR, 0x40005150\r
- 897                   .set CYDEV_IO_PRT_PRT5_PS, 0x40005151\r
- 898                   .set CYDEV_IO_PRT_PRT5_DM0, 0x40005152\r
- 899                   .set CYDEV_IO_PRT_PRT5_DM1, 0x40005153\r
- 900                   .set CYDEV_IO_PRT_PRT5_DM2, 0x40005154\r
- 901                   .set CYDEV_IO_PRT_PRT5_SLW, 0x40005155\r
- 902                   .set CYDEV_IO_PRT_PRT5_BYP, 0x40005156\r
- 903                   .set CYDEV_IO_PRT_PRT5_BIE, 0x40005157\r
- 904                   .set CYDEV_IO_PRT_PRT5_INP_DIS, 0x40005158\r
- 905                   .set CYDEV_IO_PRT_PRT5_CTL, 0x40005159\r
- 906                   .set CYDEV_IO_PRT_PRT5_PRT, 0x4000515a\r
- 907                   .set CYDEV_IO_PRT_PRT5_BIT_MASK, 0x4000515b\r
- 908                   .set CYDEV_IO_PRT_PRT5_AMUX, 0x4000515c\r
- 909                   .set CYDEV_IO_PRT_PRT5_AG, 0x4000515d\r
- 910                   .set CYDEV_IO_PRT_PRT5_LCD_COM_SEG, 0x4000515e\r
- 911                   .set CYDEV_IO_PRT_PRT5_LCD_EN, 0x4000515f\r
- 912                   .set CYDEV_IO_PRT_PRT6_BASE, 0x40005160\r
- 913                   .set CYDEV_IO_PRT_PRT6_SIZE, 0x00000010\r
- 914                   .set CYDEV_IO_PRT_PRT6_DR, 0x40005160\r
- 915                   .set CYDEV_IO_PRT_PRT6_PS, 0x40005161\r
- 916                   .set CYDEV_IO_PRT_PRT6_DM0, 0x40005162\r
- 917                   .set CYDEV_IO_PRT_PRT6_DM1, 0x40005163\r
- 918                   .set CYDEV_IO_PRT_PRT6_DM2, 0x40005164\r
- 919                   .set CYDEV_IO_PRT_PRT6_SLW, 0x40005165\r
- 920                   .set CYDEV_IO_PRT_PRT6_BYP, 0x40005166\r
- 921                   .set CYDEV_IO_PRT_PRT6_BIE, 0x40005167\r
- 922                   .set CYDEV_IO_PRT_PRT6_INP_DIS, 0x40005168\r
- 923                   .set CYDEV_IO_PRT_PRT6_CTL, 0x40005169\r
- 924                   .set CYDEV_IO_PRT_PRT6_PRT, 0x4000516a\r
- 925                   .set CYDEV_IO_PRT_PRT6_BIT_MASK, 0x4000516b\r
- 926                   .set CYDEV_IO_PRT_PRT6_AMUX, 0x4000516c\r
- 927                   .set CYDEV_IO_PRT_PRT6_AG, 0x4000516d\r
- 928                   .set CYDEV_IO_PRT_PRT6_LCD_COM_SEG, 0x4000516e\r
- 929                   .set CYDEV_IO_PRT_PRT6_LCD_EN, 0x4000516f\r
- 930                   .set CYDEV_IO_PRT_PRT12_BASE, 0x400051c0\r
- 931                   .set CYDEV_IO_PRT_PRT12_SIZE, 0x00000010\r
- 932                   .set CYDEV_IO_PRT_PRT12_DR, 0x400051c0\r
- 933                   .set CYDEV_IO_PRT_PRT12_PS, 0x400051c1\r
- 934                   .set CYDEV_IO_PRT_PRT12_DM0, 0x400051c2\r
- 935                   .set CYDEV_IO_PRT_PRT12_DM1, 0x400051c3\r
- 936                   .set CYDEV_IO_PRT_PRT12_DM2, 0x400051c4\r
- 937                   .set CYDEV_IO_PRT_PRT12_SLW, 0x400051c5\r
- 938                   .set CYDEV_IO_PRT_PRT12_BYP, 0x400051c6\r
- 939                   .set CYDEV_IO_PRT_PRT12_BIE, 0x400051c7\r
- 940                   .set CYDEV_IO_PRT_PRT12_INP_DIS, 0x400051c8\r
- 941                   .set CYDEV_IO_PRT_PRT12_SIO_HYST_EN, 0x400051c9\r
- 942                   .set CYDEV_IO_PRT_PRT12_PRT, 0x400051ca\r
- 943                   .set CYDEV_IO_PRT_PRT12_BIT_MASK, 0x400051cb\r
- 944                   .set CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ, 0x400051cc\r
- 945                   .set CYDEV_IO_PRT_PRT12_AG, 0x400051cd\r
- 946                   .set CYDEV_IO_PRT_PRT12_SIO_CFG, 0x400051ce\r
- 947                   .set CYDEV_IO_PRT_PRT12_SIO_DIFF, 0x400051cf\r
- 948                   .set CYDEV_IO_PRT_PRT15_BASE, 0x400051f0\r
- 949                   .set CYDEV_IO_PRT_PRT15_SIZE, 0x00000010\r
- 950                   .set CYDEV_IO_PRT_PRT15_DR, 0x400051f0\r
- 951                   .set CYDEV_IO_PRT_PRT15_PS, 0x400051f1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 18\r
-\r
-\r
- 952                   .set CYDEV_IO_PRT_PRT15_DM0, 0x400051f2\r
- 953                   .set CYDEV_IO_PRT_PRT15_DM1, 0x400051f3\r
- 954                   .set CYDEV_IO_PRT_PRT15_DM2, 0x400051f4\r
- 955                   .set CYDEV_IO_PRT_PRT15_SLW, 0x400051f5\r
- 956                   .set CYDEV_IO_PRT_PRT15_BYP, 0x400051f6\r
- 957                   .set CYDEV_IO_PRT_PRT15_BIE, 0x400051f7\r
- 958                   .set CYDEV_IO_PRT_PRT15_INP_DIS, 0x400051f8\r
- 959                   .set CYDEV_IO_PRT_PRT15_CTL, 0x400051f9\r
- 960                   .set CYDEV_IO_PRT_PRT15_PRT, 0x400051fa\r
- 961                   .set CYDEV_IO_PRT_PRT15_BIT_MASK, 0x400051fb\r
- 962                   .set CYDEV_IO_PRT_PRT15_AMUX, 0x400051fc\r
- 963                   .set CYDEV_IO_PRT_PRT15_AG, 0x400051fd\r
- 964                   .set CYDEV_IO_PRT_PRT15_LCD_COM_SEG, 0x400051fe\r
- 965                   .set CYDEV_IO_PRT_PRT15_LCD_EN, 0x400051ff\r
- 966                   .set CYDEV_PRTDSI_BASE, 0x40005200\r
- 967                   .set CYDEV_PRTDSI_SIZE, 0x0000007f\r
- 968                   .set CYDEV_PRTDSI_PRT0_BASE, 0x40005200\r
- 969                   .set CYDEV_PRTDSI_PRT0_SIZE, 0x00000007\r
- 970                   .set CYDEV_PRTDSI_PRT0_OUT_SEL0, 0x40005200\r
- 971                   .set CYDEV_PRTDSI_PRT0_OUT_SEL1, 0x40005201\r
- 972                   .set CYDEV_PRTDSI_PRT0_OE_SEL0, 0x40005202\r
- 973                   .set CYDEV_PRTDSI_PRT0_OE_SEL1, 0x40005203\r
- 974                   .set CYDEV_PRTDSI_PRT0_DBL_SYNC_IN, 0x40005204\r
- 975                   .set CYDEV_PRTDSI_PRT0_SYNC_OUT, 0x40005205\r
- 976                   .set CYDEV_PRTDSI_PRT0_CAPS_SEL, 0x40005206\r
- 977                   .set CYDEV_PRTDSI_PRT1_BASE, 0x40005208\r
- 978                   .set CYDEV_PRTDSI_PRT1_SIZE, 0x00000007\r
- 979                   .set CYDEV_PRTDSI_PRT1_OUT_SEL0, 0x40005208\r
- 980                   .set CYDEV_PRTDSI_PRT1_OUT_SEL1, 0x40005209\r
- 981                   .set CYDEV_PRTDSI_PRT1_OE_SEL0, 0x4000520a\r
- 982                   .set CYDEV_PRTDSI_PRT1_OE_SEL1, 0x4000520b\r
- 983                   .set CYDEV_PRTDSI_PRT1_DBL_SYNC_IN, 0x4000520c\r
- 984                   .set CYDEV_PRTDSI_PRT1_SYNC_OUT, 0x4000520d\r
- 985                   .set CYDEV_PRTDSI_PRT1_CAPS_SEL, 0x4000520e\r
- 986                   .set CYDEV_PRTDSI_PRT2_BASE, 0x40005210\r
- 987                   .set CYDEV_PRTDSI_PRT2_SIZE, 0x00000007\r
- 988                   .set CYDEV_PRTDSI_PRT2_OUT_SEL0, 0x40005210\r
- 989                   .set CYDEV_PRTDSI_PRT2_OUT_SEL1, 0x40005211\r
- 990                   .set CYDEV_PRTDSI_PRT2_OE_SEL0, 0x40005212\r
- 991                   .set CYDEV_PRTDSI_PRT2_OE_SEL1, 0x40005213\r
- 992                   .set CYDEV_PRTDSI_PRT2_DBL_SYNC_IN, 0x40005214\r
- 993                   .set CYDEV_PRTDSI_PRT2_SYNC_OUT, 0x40005215\r
- 994                   .set CYDEV_PRTDSI_PRT2_CAPS_SEL, 0x40005216\r
- 995                   .set CYDEV_PRTDSI_PRT3_BASE, 0x40005218\r
- 996                   .set CYDEV_PRTDSI_PRT3_SIZE, 0x00000007\r
- 997                   .set CYDEV_PRTDSI_PRT3_OUT_SEL0, 0x40005218\r
- 998                   .set CYDEV_PRTDSI_PRT3_OUT_SEL1, 0x40005219\r
- 999                   .set CYDEV_PRTDSI_PRT3_OE_SEL0, 0x4000521a\r
- 1000                  .set CYDEV_PRTDSI_PRT3_OE_SEL1, 0x4000521b\r
- 1001                  .set CYDEV_PRTDSI_PRT3_DBL_SYNC_IN, 0x4000521c\r
- 1002                  .set CYDEV_PRTDSI_PRT3_SYNC_OUT, 0x4000521d\r
- 1003                  .set CYDEV_PRTDSI_PRT3_CAPS_SEL, 0x4000521e\r
- 1004                  .set CYDEV_PRTDSI_PRT4_BASE, 0x40005220\r
- 1005                  .set CYDEV_PRTDSI_PRT4_SIZE, 0x00000007\r
- 1006                  .set CYDEV_PRTDSI_PRT4_OUT_SEL0, 0x40005220\r
- 1007                  .set CYDEV_PRTDSI_PRT4_OUT_SEL1, 0x40005221\r
- 1008                  .set CYDEV_PRTDSI_PRT4_OE_SEL0, 0x40005222\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 19\r
-\r
-\r
- 1009                  .set CYDEV_PRTDSI_PRT4_OE_SEL1, 0x40005223\r
- 1010                  .set CYDEV_PRTDSI_PRT4_DBL_SYNC_IN, 0x40005224\r
- 1011                  .set CYDEV_PRTDSI_PRT4_SYNC_OUT, 0x40005225\r
- 1012                  .set CYDEV_PRTDSI_PRT4_CAPS_SEL, 0x40005226\r
- 1013                  .set CYDEV_PRTDSI_PRT5_BASE, 0x40005228\r
- 1014                  .set CYDEV_PRTDSI_PRT5_SIZE, 0x00000007\r
- 1015                  .set CYDEV_PRTDSI_PRT5_OUT_SEL0, 0x40005228\r
- 1016                  .set CYDEV_PRTDSI_PRT5_OUT_SEL1, 0x40005229\r
- 1017                  .set CYDEV_PRTDSI_PRT5_OE_SEL0, 0x4000522a\r
- 1018                  .set CYDEV_PRTDSI_PRT5_OE_SEL1, 0x4000522b\r
- 1019                  .set CYDEV_PRTDSI_PRT5_DBL_SYNC_IN, 0x4000522c\r
- 1020                  .set CYDEV_PRTDSI_PRT5_SYNC_OUT, 0x4000522d\r
- 1021                  .set CYDEV_PRTDSI_PRT5_CAPS_SEL, 0x4000522e\r
- 1022                  .set CYDEV_PRTDSI_PRT6_BASE, 0x40005230\r
- 1023                  .set CYDEV_PRTDSI_PRT6_SIZE, 0x00000007\r
- 1024                  .set CYDEV_PRTDSI_PRT6_OUT_SEL0, 0x40005230\r
- 1025                  .set CYDEV_PRTDSI_PRT6_OUT_SEL1, 0x40005231\r
- 1026                  .set CYDEV_PRTDSI_PRT6_OE_SEL0, 0x40005232\r
- 1027                  .set CYDEV_PRTDSI_PRT6_OE_SEL1, 0x40005233\r
- 1028                  .set CYDEV_PRTDSI_PRT6_DBL_SYNC_IN, 0x40005234\r
- 1029                  .set CYDEV_PRTDSI_PRT6_SYNC_OUT, 0x40005235\r
- 1030                  .set CYDEV_PRTDSI_PRT6_CAPS_SEL, 0x40005236\r
- 1031                  .set CYDEV_PRTDSI_PRT12_BASE, 0x40005260\r
- 1032                  .set CYDEV_PRTDSI_PRT12_SIZE, 0x00000006\r
- 1033                  .set CYDEV_PRTDSI_PRT12_OUT_SEL0, 0x40005260\r
- 1034                  .set CYDEV_PRTDSI_PRT12_OUT_SEL1, 0x40005261\r
- 1035                  .set CYDEV_PRTDSI_PRT12_OE_SEL0, 0x40005262\r
- 1036                  .set CYDEV_PRTDSI_PRT12_OE_SEL1, 0x40005263\r
- 1037                  .set CYDEV_PRTDSI_PRT12_DBL_SYNC_IN, 0x40005264\r
- 1038                  .set CYDEV_PRTDSI_PRT12_SYNC_OUT, 0x40005265\r
- 1039                  .set CYDEV_PRTDSI_PRT15_BASE, 0x40005278\r
- 1040                  .set CYDEV_PRTDSI_PRT15_SIZE, 0x00000007\r
- 1041                  .set CYDEV_PRTDSI_PRT15_OUT_SEL0, 0x40005278\r
- 1042                  .set CYDEV_PRTDSI_PRT15_OUT_SEL1, 0x40005279\r
- 1043                  .set CYDEV_PRTDSI_PRT15_OE_SEL0, 0x4000527a\r
- 1044                  .set CYDEV_PRTDSI_PRT15_OE_SEL1, 0x4000527b\r
- 1045                  .set CYDEV_PRTDSI_PRT15_DBL_SYNC_IN, 0x4000527c\r
- 1046                  .set CYDEV_PRTDSI_PRT15_SYNC_OUT, 0x4000527d\r
- 1047                  .set CYDEV_PRTDSI_PRT15_CAPS_SEL, 0x4000527e\r
- 1048                  .set CYDEV_EMIF_BASE, 0x40005400\r
- 1049                  .set CYDEV_EMIF_SIZE, 0x00000007\r
- 1050                  .set CYDEV_EMIF_NO_UDB, 0x40005400\r
- 1051                  .set CYDEV_EMIF_RP_WAIT_STATES, 0x40005401\r
- 1052                  .set CYDEV_EMIF_MEM_DWN, 0x40005402\r
- 1053                  .set CYDEV_EMIF_MEMCLK_DIV, 0x40005403\r
- 1054                  .set CYDEV_EMIF_CLOCK_EN, 0x40005404\r
- 1055                  .set CYDEV_EMIF_EM_TYPE, 0x40005405\r
- 1056                  .set CYDEV_EMIF_WP_WAIT_STATES, 0x40005406\r
- 1057                  .set CYDEV_ANAIF_BASE, 0x40005800\r
- 1058                  .set CYDEV_ANAIF_SIZE, 0x000003a9\r
- 1059                  .set CYDEV_ANAIF_CFG_BASE, 0x40005800\r
- 1060                  .set CYDEV_ANAIF_CFG_SIZE, 0x0000010f\r
- 1061                  .set CYDEV_ANAIF_CFG_SC0_BASE, 0x40005800\r
- 1062                  .set CYDEV_ANAIF_CFG_SC0_SIZE, 0x00000003\r
- 1063                  .set CYDEV_ANAIF_CFG_SC0_CR0, 0x40005800\r
- 1064                  .set CYDEV_ANAIF_CFG_SC0_CR1, 0x40005801\r
- 1065                  .set CYDEV_ANAIF_CFG_SC0_CR2, 0x40005802\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 20\r
-\r
-\r
- 1066                  .set CYDEV_ANAIF_CFG_SC1_BASE, 0x40005804\r
- 1067                  .set CYDEV_ANAIF_CFG_SC1_SIZE, 0x00000003\r
- 1068                  .set CYDEV_ANAIF_CFG_SC1_CR0, 0x40005804\r
- 1069                  .set CYDEV_ANAIF_CFG_SC1_CR1, 0x40005805\r
- 1070                  .set CYDEV_ANAIF_CFG_SC1_CR2, 0x40005806\r
- 1071                  .set CYDEV_ANAIF_CFG_SC2_BASE, 0x40005808\r
- 1072                  .set CYDEV_ANAIF_CFG_SC2_SIZE, 0x00000003\r
- 1073                  .set CYDEV_ANAIF_CFG_SC2_CR0, 0x40005808\r
- 1074                  .set CYDEV_ANAIF_CFG_SC2_CR1, 0x40005809\r
- 1075                  .set CYDEV_ANAIF_CFG_SC2_CR2, 0x4000580a\r
- 1076                  .set CYDEV_ANAIF_CFG_SC3_BASE, 0x4000580c\r
- 1077                  .set CYDEV_ANAIF_CFG_SC3_SIZE, 0x00000003\r
- 1078                  .set CYDEV_ANAIF_CFG_SC3_CR0, 0x4000580c\r
- 1079                  .set CYDEV_ANAIF_CFG_SC3_CR1, 0x4000580d\r
- 1080                  .set CYDEV_ANAIF_CFG_SC3_CR2, 0x4000580e\r
- 1081                  .set CYDEV_ANAIF_CFG_DAC0_BASE, 0x40005820\r
- 1082                  .set CYDEV_ANAIF_CFG_DAC0_SIZE, 0x00000003\r
- 1083                  .set CYDEV_ANAIF_CFG_DAC0_CR0, 0x40005820\r
- 1084                  .set CYDEV_ANAIF_CFG_DAC0_CR1, 0x40005821\r
- 1085                  .set CYDEV_ANAIF_CFG_DAC0_TST, 0x40005822\r
- 1086                  .set CYDEV_ANAIF_CFG_DAC1_BASE, 0x40005824\r
- 1087                  .set CYDEV_ANAIF_CFG_DAC1_SIZE, 0x00000003\r
- 1088                  .set CYDEV_ANAIF_CFG_DAC1_CR0, 0x40005824\r
- 1089                  .set CYDEV_ANAIF_CFG_DAC1_CR1, 0x40005825\r
- 1090                  .set CYDEV_ANAIF_CFG_DAC1_TST, 0x40005826\r
- 1091                  .set CYDEV_ANAIF_CFG_DAC2_BASE, 0x40005828\r
- 1092                  .set CYDEV_ANAIF_CFG_DAC2_SIZE, 0x00000003\r
- 1093                  .set CYDEV_ANAIF_CFG_DAC2_CR0, 0x40005828\r
- 1094                  .set CYDEV_ANAIF_CFG_DAC2_CR1, 0x40005829\r
- 1095                  .set CYDEV_ANAIF_CFG_DAC2_TST, 0x4000582a\r
- 1096                  .set CYDEV_ANAIF_CFG_DAC3_BASE, 0x4000582c\r
- 1097                  .set CYDEV_ANAIF_CFG_DAC3_SIZE, 0x00000003\r
- 1098                  .set CYDEV_ANAIF_CFG_DAC3_CR0, 0x4000582c\r
- 1099                  .set CYDEV_ANAIF_CFG_DAC3_CR1, 0x4000582d\r
- 1100                  .set CYDEV_ANAIF_CFG_DAC3_TST, 0x4000582e\r
- 1101                  .set CYDEV_ANAIF_CFG_CMP0_BASE, 0x40005840\r
- 1102                  .set CYDEV_ANAIF_CFG_CMP0_SIZE, 0x00000001\r
- 1103                  .set CYDEV_ANAIF_CFG_CMP0_CR, 0x40005840\r
- 1104                  .set CYDEV_ANAIF_CFG_CMP1_BASE, 0x40005841\r
- 1105                  .set CYDEV_ANAIF_CFG_CMP1_SIZE, 0x00000001\r
- 1106                  .set CYDEV_ANAIF_CFG_CMP1_CR, 0x40005841\r
- 1107                  .set CYDEV_ANAIF_CFG_CMP2_BASE, 0x40005842\r
- 1108                  .set CYDEV_ANAIF_CFG_CMP2_SIZE, 0x00000001\r
- 1109                  .set CYDEV_ANAIF_CFG_CMP2_CR, 0x40005842\r
- 1110                  .set CYDEV_ANAIF_CFG_CMP3_BASE, 0x40005843\r
- 1111                  .set CYDEV_ANAIF_CFG_CMP3_SIZE, 0x00000001\r
- 1112                  .set CYDEV_ANAIF_CFG_CMP3_CR, 0x40005843\r
- 1113                  .set CYDEV_ANAIF_CFG_LUT0_BASE, 0x40005848\r
- 1114                  .set CYDEV_ANAIF_CFG_LUT0_SIZE, 0x00000002\r
- 1115                  .set CYDEV_ANAIF_CFG_LUT0_CR, 0x40005848\r
- 1116                  .set CYDEV_ANAIF_CFG_LUT0_MX, 0x40005849\r
- 1117                  .set CYDEV_ANAIF_CFG_LUT1_BASE, 0x4000584a\r
- 1118                  .set CYDEV_ANAIF_CFG_LUT1_SIZE, 0x00000002\r
- 1119                  .set CYDEV_ANAIF_CFG_LUT1_CR, 0x4000584a\r
- 1120                  .set CYDEV_ANAIF_CFG_LUT1_MX, 0x4000584b\r
- 1121                  .set CYDEV_ANAIF_CFG_LUT2_BASE, 0x4000584c\r
- 1122                  .set CYDEV_ANAIF_CFG_LUT2_SIZE, 0x00000002\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 21\r
-\r
-\r
- 1123                  .set CYDEV_ANAIF_CFG_LUT2_CR, 0x4000584c\r
- 1124                  .set CYDEV_ANAIF_CFG_LUT2_MX, 0x4000584d\r
- 1125                  .set CYDEV_ANAIF_CFG_LUT3_BASE, 0x4000584e\r
- 1126                  .set CYDEV_ANAIF_CFG_LUT3_SIZE, 0x00000002\r
- 1127                  .set CYDEV_ANAIF_CFG_LUT3_CR, 0x4000584e\r
- 1128                  .set CYDEV_ANAIF_CFG_LUT3_MX, 0x4000584f\r
- 1129                  .set CYDEV_ANAIF_CFG_OPAMP0_BASE, 0x40005858\r
- 1130                  .set CYDEV_ANAIF_CFG_OPAMP0_SIZE, 0x00000002\r
- 1131                  .set CYDEV_ANAIF_CFG_OPAMP0_CR, 0x40005858\r
- 1132                  .set CYDEV_ANAIF_CFG_OPAMP0_RSVD, 0x40005859\r
- 1133                  .set CYDEV_ANAIF_CFG_OPAMP1_BASE, 0x4000585a\r
- 1134                  .set CYDEV_ANAIF_CFG_OPAMP1_SIZE, 0x00000002\r
- 1135                  .set CYDEV_ANAIF_CFG_OPAMP1_CR, 0x4000585a\r
- 1136                  .set CYDEV_ANAIF_CFG_OPAMP1_RSVD, 0x4000585b\r
- 1137                  .set CYDEV_ANAIF_CFG_OPAMP2_BASE, 0x4000585c\r
- 1138                  .set CYDEV_ANAIF_CFG_OPAMP2_SIZE, 0x00000002\r
- 1139                  .set CYDEV_ANAIF_CFG_OPAMP2_CR, 0x4000585c\r
- 1140                  .set CYDEV_ANAIF_CFG_OPAMP2_RSVD, 0x4000585d\r
- 1141                  .set CYDEV_ANAIF_CFG_OPAMP3_BASE, 0x4000585e\r
- 1142                  .set CYDEV_ANAIF_CFG_OPAMP3_SIZE, 0x00000002\r
- 1143                  .set CYDEV_ANAIF_CFG_OPAMP3_CR, 0x4000585e\r
- 1144                  .set CYDEV_ANAIF_CFG_OPAMP3_RSVD, 0x4000585f\r
- 1145                  .set CYDEV_ANAIF_CFG_LCDDAC_BASE, 0x40005868\r
- 1146                  .set CYDEV_ANAIF_CFG_LCDDAC_SIZE, 0x00000002\r
- 1147                  .set CYDEV_ANAIF_CFG_LCDDAC_CR0, 0x40005868\r
- 1148                  .set CYDEV_ANAIF_CFG_LCDDAC_CR1, 0x40005869\r
- 1149                  .set CYDEV_ANAIF_CFG_LCDDRV_BASE, 0x4000586a\r
- 1150                  .set CYDEV_ANAIF_CFG_LCDDRV_SIZE, 0x00000001\r
- 1151                  .set CYDEV_ANAIF_CFG_LCDDRV_CR, 0x4000586a\r
- 1152                  .set CYDEV_ANAIF_CFG_LCDTMR_BASE, 0x4000586b\r
- 1153                  .set CYDEV_ANAIF_CFG_LCDTMR_SIZE, 0x00000001\r
- 1154                  .set CYDEV_ANAIF_CFG_LCDTMR_CFG, 0x4000586b\r
- 1155                  .set CYDEV_ANAIF_CFG_BG_BASE, 0x4000586c\r
- 1156                  .set CYDEV_ANAIF_CFG_BG_SIZE, 0x00000004\r
- 1157                  .set CYDEV_ANAIF_CFG_BG_CR0, 0x4000586c\r
- 1158                  .set CYDEV_ANAIF_CFG_BG_RSVD, 0x4000586d\r
- 1159                  .set CYDEV_ANAIF_CFG_BG_DFT0, 0x4000586e\r
- 1160                  .set CYDEV_ANAIF_CFG_BG_DFT1, 0x4000586f\r
- 1161                  .set CYDEV_ANAIF_CFG_CAPSL_BASE, 0x40005870\r
- 1162                  .set CYDEV_ANAIF_CFG_CAPSL_SIZE, 0x00000002\r
- 1163                  .set CYDEV_ANAIF_CFG_CAPSL_CFG0, 0x40005870\r
- 1164                  .set CYDEV_ANAIF_CFG_CAPSL_CFG1, 0x40005871\r
- 1165                  .set CYDEV_ANAIF_CFG_CAPSR_BASE, 0x40005872\r
- 1166                  .set CYDEV_ANAIF_CFG_CAPSR_SIZE, 0x00000002\r
- 1167                  .set CYDEV_ANAIF_CFG_CAPSR_CFG0, 0x40005872\r
- 1168                  .set CYDEV_ANAIF_CFG_CAPSR_CFG1, 0x40005873\r
- 1169                  .set CYDEV_ANAIF_CFG_PUMP_BASE, 0x40005876\r
- 1170                  .set CYDEV_ANAIF_CFG_PUMP_SIZE, 0x00000002\r
- 1171                  .set CYDEV_ANAIF_CFG_PUMP_CR0, 0x40005876\r
- 1172                  .set CYDEV_ANAIF_CFG_PUMP_CR1, 0x40005877\r
- 1173                  .set CYDEV_ANAIF_CFG_LPF0_BASE, 0x40005878\r
- 1174                  .set CYDEV_ANAIF_CFG_LPF0_SIZE, 0x00000002\r
- 1175                  .set CYDEV_ANAIF_CFG_LPF0_CR0, 0x40005878\r
- 1176                  .set CYDEV_ANAIF_CFG_LPF0_RSVD, 0x40005879\r
- 1177                  .set CYDEV_ANAIF_CFG_LPF1_BASE, 0x4000587a\r
- 1178                  .set CYDEV_ANAIF_CFG_LPF1_SIZE, 0x00000002\r
- 1179                  .set CYDEV_ANAIF_CFG_LPF1_CR0, 0x4000587a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 22\r
-\r
-\r
- 1180                  .set CYDEV_ANAIF_CFG_LPF1_RSVD, 0x4000587b\r
- 1181                  .set CYDEV_ANAIF_CFG_MISC_BASE, 0x4000587c\r
- 1182                  .set CYDEV_ANAIF_CFG_MISC_SIZE, 0x00000001\r
- 1183                  .set CYDEV_ANAIF_CFG_MISC_CR0, 0x4000587c\r
- 1184                  .set CYDEV_ANAIF_CFG_DSM0_BASE, 0x40005880\r
- 1185                  .set CYDEV_ANAIF_CFG_DSM0_SIZE, 0x00000020\r
- 1186                  .set CYDEV_ANAIF_CFG_DSM0_CR0, 0x40005880\r
- 1187                  .set CYDEV_ANAIF_CFG_DSM0_CR1, 0x40005881\r
- 1188                  .set CYDEV_ANAIF_CFG_DSM0_CR2, 0x40005882\r
- 1189                  .set CYDEV_ANAIF_CFG_DSM0_CR3, 0x40005883\r
- 1190                  .set CYDEV_ANAIF_CFG_DSM0_CR4, 0x40005884\r
- 1191                  .set CYDEV_ANAIF_CFG_DSM0_CR5, 0x40005885\r
- 1192                  .set CYDEV_ANAIF_CFG_DSM0_CR6, 0x40005886\r
- 1193                  .set CYDEV_ANAIF_CFG_DSM0_CR7, 0x40005887\r
- 1194                  .set CYDEV_ANAIF_CFG_DSM0_CR8, 0x40005888\r
- 1195                  .set CYDEV_ANAIF_CFG_DSM0_CR9, 0x40005889\r
- 1196                  .set CYDEV_ANAIF_CFG_DSM0_CR10, 0x4000588a\r
- 1197                  .set CYDEV_ANAIF_CFG_DSM0_CR11, 0x4000588b\r
- 1198                  .set CYDEV_ANAIF_CFG_DSM0_CR12, 0x4000588c\r
- 1199                  .set CYDEV_ANAIF_CFG_DSM0_CR13, 0x4000588d\r
- 1200                  .set CYDEV_ANAIF_CFG_DSM0_CR14, 0x4000588e\r
- 1201                  .set CYDEV_ANAIF_CFG_DSM0_CR15, 0x4000588f\r
- 1202                  .set CYDEV_ANAIF_CFG_DSM0_CR16, 0x40005890\r
- 1203                  .set CYDEV_ANAIF_CFG_DSM0_CR17, 0x40005891\r
- 1204                  .set CYDEV_ANAIF_CFG_DSM0_REF0, 0x40005892\r
- 1205                  .set CYDEV_ANAIF_CFG_DSM0_REF1, 0x40005893\r
- 1206                  .set CYDEV_ANAIF_CFG_DSM0_REF2, 0x40005894\r
- 1207                  .set CYDEV_ANAIF_CFG_DSM0_REF3, 0x40005895\r
- 1208                  .set CYDEV_ANAIF_CFG_DSM0_DEM0, 0x40005896\r
- 1209                  .set CYDEV_ANAIF_CFG_DSM0_DEM1, 0x40005897\r
- 1210                  .set CYDEV_ANAIF_CFG_DSM0_TST0, 0x40005898\r
- 1211                  .set CYDEV_ANAIF_CFG_DSM0_TST1, 0x40005899\r
- 1212                  .set CYDEV_ANAIF_CFG_DSM0_BUF0, 0x4000589a\r
- 1213                  .set CYDEV_ANAIF_CFG_DSM0_BUF1, 0x4000589b\r
- 1214                  .set CYDEV_ANAIF_CFG_DSM0_BUF2, 0x4000589c\r
- 1215                  .set CYDEV_ANAIF_CFG_DSM0_BUF3, 0x4000589d\r
- 1216                  .set CYDEV_ANAIF_CFG_DSM0_MISC, 0x4000589e\r
- 1217                  .set CYDEV_ANAIF_CFG_DSM0_RSVD1, 0x4000589f\r
- 1218                  .set CYDEV_ANAIF_CFG_SAR0_BASE, 0x40005900\r
- 1219                  .set CYDEV_ANAIF_CFG_SAR0_SIZE, 0x00000007\r
- 1220                  .set CYDEV_ANAIF_CFG_SAR0_CSR0, 0x40005900\r
- 1221                  .set CYDEV_ANAIF_CFG_SAR0_CSR1, 0x40005901\r
- 1222                  .set CYDEV_ANAIF_CFG_SAR0_CSR2, 0x40005902\r
- 1223                  .set CYDEV_ANAIF_CFG_SAR0_CSR3, 0x40005903\r
- 1224                  .set CYDEV_ANAIF_CFG_SAR0_CSR4, 0x40005904\r
- 1225                  .set CYDEV_ANAIF_CFG_SAR0_CSR5, 0x40005905\r
- 1226                  .set CYDEV_ANAIF_CFG_SAR0_CSR6, 0x40005906\r
- 1227                  .set CYDEV_ANAIF_CFG_SAR1_BASE, 0x40005908\r
- 1228                  .set CYDEV_ANAIF_CFG_SAR1_SIZE, 0x00000007\r
- 1229                  .set CYDEV_ANAIF_CFG_SAR1_CSR0, 0x40005908\r
- 1230                  .set CYDEV_ANAIF_CFG_SAR1_CSR1, 0x40005909\r
- 1231                  .set CYDEV_ANAIF_CFG_SAR1_CSR2, 0x4000590a\r
- 1232                  .set CYDEV_ANAIF_CFG_SAR1_CSR3, 0x4000590b\r
- 1233                  .set CYDEV_ANAIF_CFG_SAR1_CSR4, 0x4000590c\r
- 1234                  .set CYDEV_ANAIF_CFG_SAR1_CSR5, 0x4000590d\r
- 1235                  .set CYDEV_ANAIF_CFG_SAR1_CSR6, 0x4000590e\r
- 1236                  .set CYDEV_ANAIF_RT_BASE, 0x40005a00\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 23\r
-\r
-\r
- 1237                  .set CYDEV_ANAIF_RT_SIZE, 0x00000162\r
- 1238                  .set CYDEV_ANAIF_RT_SC0_BASE, 0x40005a00\r
- 1239                  .set CYDEV_ANAIF_RT_SC0_SIZE, 0x0000000d\r
- 1240                  .set CYDEV_ANAIF_RT_SC0_SW0, 0x40005a00\r
- 1241                  .set CYDEV_ANAIF_RT_SC0_SW2, 0x40005a02\r
- 1242                  .set CYDEV_ANAIF_RT_SC0_SW3, 0x40005a03\r
- 1243                  .set CYDEV_ANAIF_RT_SC0_SW4, 0x40005a04\r
- 1244                  .set CYDEV_ANAIF_RT_SC0_SW6, 0x40005a06\r
- 1245                  .set CYDEV_ANAIF_RT_SC0_SW7, 0x40005a07\r
- 1246                  .set CYDEV_ANAIF_RT_SC0_SW8, 0x40005a08\r
- 1247                  .set CYDEV_ANAIF_RT_SC0_SW10, 0x40005a0a\r
- 1248                  .set CYDEV_ANAIF_RT_SC0_CLK, 0x40005a0b\r
- 1249                  .set CYDEV_ANAIF_RT_SC0_BST, 0x40005a0c\r
- 1250                  .set CYDEV_ANAIF_RT_SC1_BASE, 0x40005a10\r
- 1251                  .set CYDEV_ANAIF_RT_SC1_SIZE, 0x0000000d\r
- 1252                  .set CYDEV_ANAIF_RT_SC1_SW0, 0x40005a10\r
- 1253                  .set CYDEV_ANAIF_RT_SC1_SW2, 0x40005a12\r
- 1254                  .set CYDEV_ANAIF_RT_SC1_SW3, 0x40005a13\r
- 1255                  .set CYDEV_ANAIF_RT_SC1_SW4, 0x40005a14\r
- 1256                  .set CYDEV_ANAIF_RT_SC1_SW6, 0x40005a16\r
- 1257                  .set CYDEV_ANAIF_RT_SC1_SW7, 0x40005a17\r
- 1258                  .set CYDEV_ANAIF_RT_SC1_SW8, 0x40005a18\r
- 1259                  .set CYDEV_ANAIF_RT_SC1_SW10, 0x40005a1a\r
- 1260                  .set CYDEV_ANAIF_RT_SC1_CLK, 0x40005a1b\r
- 1261                  .set CYDEV_ANAIF_RT_SC1_BST, 0x40005a1c\r
- 1262                  .set CYDEV_ANAIF_RT_SC2_BASE, 0x40005a20\r
- 1263                  .set CYDEV_ANAIF_RT_SC2_SIZE, 0x0000000d\r
- 1264                  .set CYDEV_ANAIF_RT_SC2_SW0, 0x40005a20\r
- 1265                  .set CYDEV_ANAIF_RT_SC2_SW2, 0x40005a22\r
- 1266                  .set CYDEV_ANAIF_RT_SC2_SW3, 0x40005a23\r
- 1267                  .set CYDEV_ANAIF_RT_SC2_SW4, 0x40005a24\r
- 1268                  .set CYDEV_ANAIF_RT_SC2_SW6, 0x40005a26\r
- 1269                  .set CYDEV_ANAIF_RT_SC2_SW7, 0x40005a27\r
- 1270                  .set CYDEV_ANAIF_RT_SC2_SW8, 0x40005a28\r
- 1271                  .set CYDEV_ANAIF_RT_SC2_SW10, 0x40005a2a\r
- 1272                  .set CYDEV_ANAIF_RT_SC2_CLK, 0x40005a2b\r
- 1273                  .set CYDEV_ANAIF_RT_SC2_BST, 0x40005a2c\r
- 1274                  .set CYDEV_ANAIF_RT_SC3_BASE, 0x40005a30\r
- 1275                  .set CYDEV_ANAIF_RT_SC3_SIZE, 0x0000000d\r
- 1276                  .set CYDEV_ANAIF_RT_SC3_SW0, 0x40005a30\r
- 1277                  .set CYDEV_ANAIF_RT_SC3_SW2, 0x40005a32\r
- 1278                  .set CYDEV_ANAIF_RT_SC3_SW3, 0x40005a33\r
- 1279                  .set CYDEV_ANAIF_RT_SC3_SW4, 0x40005a34\r
- 1280                  .set CYDEV_ANAIF_RT_SC3_SW6, 0x40005a36\r
- 1281                  .set CYDEV_ANAIF_RT_SC3_SW7, 0x40005a37\r
- 1282                  .set CYDEV_ANAIF_RT_SC3_SW8, 0x40005a38\r
- 1283                  .set CYDEV_ANAIF_RT_SC3_SW10, 0x40005a3a\r
- 1284                  .set CYDEV_ANAIF_RT_SC3_CLK, 0x40005a3b\r
- 1285                  .set CYDEV_ANAIF_RT_SC3_BST, 0x40005a3c\r
- 1286                  .set CYDEV_ANAIF_RT_DAC0_BASE, 0x40005a80\r
- 1287                  .set CYDEV_ANAIF_RT_DAC0_SIZE, 0x00000008\r
- 1288                  .set CYDEV_ANAIF_RT_DAC0_SW0, 0x40005a80\r
- 1289                  .set CYDEV_ANAIF_RT_DAC0_SW2, 0x40005a82\r
- 1290                  .set CYDEV_ANAIF_RT_DAC0_SW3, 0x40005a83\r
- 1291                  .set CYDEV_ANAIF_RT_DAC0_SW4, 0x40005a84\r
- 1292                  .set CYDEV_ANAIF_RT_DAC0_STROBE, 0x40005a87\r
- 1293                  .set CYDEV_ANAIF_RT_DAC1_BASE, 0x40005a88\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 24\r
-\r
-\r
- 1294                  .set CYDEV_ANAIF_RT_DAC1_SIZE, 0x00000008\r
- 1295                  .set CYDEV_ANAIF_RT_DAC1_SW0, 0x40005a88\r
- 1296                  .set CYDEV_ANAIF_RT_DAC1_SW2, 0x40005a8a\r
- 1297                  .set CYDEV_ANAIF_RT_DAC1_SW3, 0x40005a8b\r
- 1298                  .set CYDEV_ANAIF_RT_DAC1_SW4, 0x40005a8c\r
- 1299                  .set CYDEV_ANAIF_RT_DAC1_STROBE, 0x40005a8f\r
- 1300                  .set CYDEV_ANAIF_RT_DAC2_BASE, 0x40005a90\r
- 1301                  .set CYDEV_ANAIF_RT_DAC2_SIZE, 0x00000008\r
- 1302                  .set CYDEV_ANAIF_RT_DAC2_SW0, 0x40005a90\r
- 1303                  .set CYDEV_ANAIF_RT_DAC2_SW2, 0x40005a92\r
- 1304                  .set CYDEV_ANAIF_RT_DAC2_SW3, 0x40005a93\r
- 1305                  .set CYDEV_ANAIF_RT_DAC2_SW4, 0x40005a94\r
- 1306                  .set CYDEV_ANAIF_RT_DAC2_STROBE, 0x40005a97\r
- 1307                  .set CYDEV_ANAIF_RT_DAC3_BASE, 0x40005a98\r
- 1308                  .set CYDEV_ANAIF_RT_DAC3_SIZE, 0x00000008\r
- 1309                  .set CYDEV_ANAIF_RT_DAC3_SW0, 0x40005a98\r
- 1310                  .set CYDEV_ANAIF_RT_DAC3_SW2, 0x40005a9a\r
- 1311                  .set CYDEV_ANAIF_RT_DAC3_SW3, 0x40005a9b\r
- 1312                  .set CYDEV_ANAIF_RT_DAC3_SW4, 0x40005a9c\r
- 1313                  .set CYDEV_ANAIF_RT_DAC3_STROBE, 0x40005a9f\r
- 1314                  .set CYDEV_ANAIF_RT_CMP0_BASE, 0x40005ac0\r
- 1315                  .set CYDEV_ANAIF_RT_CMP0_SIZE, 0x00000008\r
- 1316                  .set CYDEV_ANAIF_RT_CMP0_SW0, 0x40005ac0\r
- 1317                  .set CYDEV_ANAIF_RT_CMP0_SW2, 0x40005ac2\r
- 1318                  .set CYDEV_ANAIF_RT_CMP0_SW3, 0x40005ac3\r
- 1319                  .set CYDEV_ANAIF_RT_CMP0_SW4, 0x40005ac4\r
- 1320                  .set CYDEV_ANAIF_RT_CMP0_SW6, 0x40005ac6\r
- 1321                  .set CYDEV_ANAIF_RT_CMP0_CLK, 0x40005ac7\r
- 1322                  .set CYDEV_ANAIF_RT_CMP1_BASE, 0x40005ac8\r
- 1323                  .set CYDEV_ANAIF_RT_CMP1_SIZE, 0x00000008\r
- 1324                  .set CYDEV_ANAIF_RT_CMP1_SW0, 0x40005ac8\r
- 1325                  .set CYDEV_ANAIF_RT_CMP1_SW2, 0x40005aca\r
- 1326                  .set CYDEV_ANAIF_RT_CMP1_SW3, 0x40005acb\r
- 1327                  .set CYDEV_ANAIF_RT_CMP1_SW4, 0x40005acc\r
- 1328                  .set CYDEV_ANAIF_RT_CMP1_SW6, 0x40005ace\r
- 1329                  .set CYDEV_ANAIF_RT_CMP1_CLK, 0x40005acf\r
- 1330                  .set CYDEV_ANAIF_RT_CMP2_BASE, 0x40005ad0\r
- 1331                  .set CYDEV_ANAIF_RT_CMP2_SIZE, 0x00000008\r
- 1332                  .set CYDEV_ANAIF_RT_CMP2_SW0, 0x40005ad0\r
- 1333                  .set CYDEV_ANAIF_RT_CMP2_SW2, 0x40005ad2\r
- 1334                  .set CYDEV_ANAIF_RT_CMP2_SW3, 0x40005ad3\r
- 1335                  .set CYDEV_ANAIF_RT_CMP2_SW4, 0x40005ad4\r
- 1336                  .set CYDEV_ANAIF_RT_CMP2_SW6, 0x40005ad6\r
- 1337                  .set CYDEV_ANAIF_RT_CMP2_CLK, 0x40005ad7\r
- 1338                  .set CYDEV_ANAIF_RT_CMP3_BASE, 0x40005ad8\r
- 1339                  .set CYDEV_ANAIF_RT_CMP3_SIZE, 0x00000008\r
- 1340                  .set CYDEV_ANAIF_RT_CMP3_SW0, 0x40005ad8\r
- 1341                  .set CYDEV_ANAIF_RT_CMP3_SW2, 0x40005ada\r
- 1342                  .set CYDEV_ANAIF_RT_CMP3_SW3, 0x40005adb\r
- 1343                  .set CYDEV_ANAIF_RT_CMP3_SW4, 0x40005adc\r
- 1344                  .set CYDEV_ANAIF_RT_CMP3_SW6, 0x40005ade\r
- 1345                  .set CYDEV_ANAIF_RT_CMP3_CLK, 0x40005adf\r
- 1346                  .set CYDEV_ANAIF_RT_DSM0_BASE, 0x40005b00\r
- 1347                  .set CYDEV_ANAIF_RT_DSM0_SIZE, 0x00000008\r
- 1348                  .set CYDEV_ANAIF_RT_DSM0_SW0, 0x40005b00\r
- 1349                  .set CYDEV_ANAIF_RT_DSM0_SW2, 0x40005b02\r
- 1350                  .set CYDEV_ANAIF_RT_DSM0_SW3, 0x40005b03\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 25\r
-\r
-\r
- 1351                  .set CYDEV_ANAIF_RT_DSM0_SW4, 0x40005b04\r
- 1352                  .set CYDEV_ANAIF_RT_DSM0_SW6, 0x40005b06\r
- 1353                  .set CYDEV_ANAIF_RT_DSM0_CLK, 0x40005b07\r
- 1354                  .set CYDEV_ANAIF_RT_SAR0_BASE, 0x40005b20\r
- 1355                  .set CYDEV_ANAIF_RT_SAR0_SIZE, 0x00000008\r
- 1356                  .set CYDEV_ANAIF_RT_SAR0_SW0, 0x40005b20\r
- 1357                  .set CYDEV_ANAIF_RT_SAR0_SW2, 0x40005b22\r
- 1358                  .set CYDEV_ANAIF_RT_SAR0_SW3, 0x40005b23\r
- 1359                  .set CYDEV_ANAIF_RT_SAR0_SW4, 0x40005b24\r
- 1360                  .set CYDEV_ANAIF_RT_SAR0_SW6, 0x40005b26\r
- 1361                  .set CYDEV_ANAIF_RT_SAR0_CLK, 0x40005b27\r
- 1362                  .set CYDEV_ANAIF_RT_SAR1_BASE, 0x40005b28\r
- 1363                  .set CYDEV_ANAIF_RT_SAR1_SIZE, 0x00000008\r
- 1364                  .set CYDEV_ANAIF_RT_SAR1_SW0, 0x40005b28\r
- 1365                  .set CYDEV_ANAIF_RT_SAR1_SW2, 0x40005b2a\r
- 1366                  .set CYDEV_ANAIF_RT_SAR1_SW3, 0x40005b2b\r
- 1367                  .set CYDEV_ANAIF_RT_SAR1_SW4, 0x40005b2c\r
- 1368                  .set CYDEV_ANAIF_RT_SAR1_SW6, 0x40005b2e\r
- 1369                  .set CYDEV_ANAIF_RT_SAR1_CLK, 0x40005b2f\r
- 1370                  .set CYDEV_ANAIF_RT_OPAMP0_BASE, 0x40005b40\r
- 1371                  .set CYDEV_ANAIF_RT_OPAMP0_SIZE, 0x00000002\r
- 1372                  .set CYDEV_ANAIF_RT_OPAMP0_MX, 0x40005b40\r
- 1373                  .set CYDEV_ANAIF_RT_OPAMP0_SW, 0x40005b41\r
- 1374                  .set CYDEV_ANAIF_RT_OPAMP1_BASE, 0x40005b42\r
- 1375                  .set CYDEV_ANAIF_RT_OPAMP1_SIZE, 0x00000002\r
- 1376                  .set CYDEV_ANAIF_RT_OPAMP1_MX, 0x40005b42\r
- 1377                  .set CYDEV_ANAIF_RT_OPAMP1_SW, 0x40005b43\r
- 1378                  .set CYDEV_ANAIF_RT_OPAMP2_BASE, 0x40005b44\r
- 1379                  .set CYDEV_ANAIF_RT_OPAMP2_SIZE, 0x00000002\r
- 1380                  .set CYDEV_ANAIF_RT_OPAMP2_MX, 0x40005b44\r
- 1381                  .set CYDEV_ANAIF_RT_OPAMP2_SW, 0x40005b45\r
- 1382                  .set CYDEV_ANAIF_RT_OPAMP3_BASE, 0x40005b46\r
- 1383                  .set CYDEV_ANAIF_RT_OPAMP3_SIZE, 0x00000002\r
- 1384                  .set CYDEV_ANAIF_RT_OPAMP3_MX, 0x40005b46\r
- 1385                  .set CYDEV_ANAIF_RT_OPAMP3_SW, 0x40005b47\r
- 1386                  .set CYDEV_ANAIF_RT_LCDDAC_BASE, 0x40005b50\r
- 1387                  .set CYDEV_ANAIF_RT_LCDDAC_SIZE, 0x00000005\r
- 1388                  .set CYDEV_ANAIF_RT_LCDDAC_SW0, 0x40005b50\r
- 1389                  .set CYDEV_ANAIF_RT_LCDDAC_SW1, 0x40005b51\r
- 1390                  .set CYDEV_ANAIF_RT_LCDDAC_SW2, 0x40005b52\r
- 1391                  .set CYDEV_ANAIF_RT_LCDDAC_SW3, 0x40005b53\r
- 1392                  .set CYDEV_ANAIF_RT_LCDDAC_SW4, 0x40005b54\r
- 1393                  .set CYDEV_ANAIF_RT_SC_BASE, 0x40005b56\r
- 1394                  .set CYDEV_ANAIF_RT_SC_SIZE, 0x00000001\r
- 1395                  .set CYDEV_ANAIF_RT_SC_MISC, 0x40005b56\r
- 1396                  .set CYDEV_ANAIF_RT_BUS_BASE, 0x40005b58\r
- 1397                  .set CYDEV_ANAIF_RT_BUS_SIZE, 0x00000004\r
- 1398                  .set CYDEV_ANAIF_RT_BUS_SW0, 0x40005b58\r
- 1399                  .set CYDEV_ANAIF_RT_BUS_SW2, 0x40005b5a\r
- 1400                  .set CYDEV_ANAIF_RT_BUS_SW3, 0x40005b5b\r
- 1401                  .set CYDEV_ANAIF_RT_DFT_BASE, 0x40005b5c\r
- 1402                  .set CYDEV_ANAIF_RT_DFT_SIZE, 0x00000006\r
- 1403                  .set CYDEV_ANAIF_RT_DFT_CR0, 0x40005b5c\r
- 1404                  .set CYDEV_ANAIF_RT_DFT_CR1, 0x40005b5d\r
- 1405                  .set CYDEV_ANAIF_RT_DFT_CR2, 0x40005b5e\r
- 1406                  .set CYDEV_ANAIF_RT_DFT_CR3, 0x40005b5f\r
- 1407                  .set CYDEV_ANAIF_RT_DFT_CR4, 0x40005b60\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 26\r
-\r
-\r
- 1408                  .set CYDEV_ANAIF_RT_DFT_CR5, 0x40005b61\r
- 1409                  .set CYDEV_ANAIF_WRK_BASE, 0x40005b80\r
- 1410                  .set CYDEV_ANAIF_WRK_SIZE, 0x00000029\r
- 1411                  .set CYDEV_ANAIF_WRK_DAC0_BASE, 0x40005b80\r
- 1412                  .set CYDEV_ANAIF_WRK_DAC0_SIZE, 0x00000001\r
- 1413                  .set CYDEV_ANAIF_WRK_DAC0_D, 0x40005b80\r
- 1414                  .set CYDEV_ANAIF_WRK_DAC1_BASE, 0x40005b81\r
- 1415                  .set CYDEV_ANAIF_WRK_DAC1_SIZE, 0x00000001\r
- 1416                  .set CYDEV_ANAIF_WRK_DAC1_D, 0x40005b81\r
- 1417                  .set CYDEV_ANAIF_WRK_DAC2_BASE, 0x40005b82\r
- 1418                  .set CYDEV_ANAIF_WRK_DAC2_SIZE, 0x00000001\r
- 1419                  .set CYDEV_ANAIF_WRK_DAC2_D, 0x40005b82\r
- 1420                  .set CYDEV_ANAIF_WRK_DAC3_BASE, 0x40005b83\r
- 1421                  .set CYDEV_ANAIF_WRK_DAC3_SIZE, 0x00000001\r
- 1422                  .set CYDEV_ANAIF_WRK_DAC3_D, 0x40005b83\r
- 1423                  .set CYDEV_ANAIF_WRK_DSM0_BASE, 0x40005b88\r
- 1424                  .set CYDEV_ANAIF_WRK_DSM0_SIZE, 0x00000002\r
- 1425                  .set CYDEV_ANAIF_WRK_DSM0_OUT0, 0x40005b88\r
- 1426                  .set CYDEV_ANAIF_WRK_DSM0_OUT1, 0x40005b89\r
- 1427                  .set CYDEV_ANAIF_WRK_LUT_BASE, 0x40005b90\r
- 1428                  .set CYDEV_ANAIF_WRK_LUT_SIZE, 0x00000005\r
- 1429                  .set CYDEV_ANAIF_WRK_LUT_SR, 0x40005b90\r
- 1430                  .set CYDEV_ANAIF_WRK_LUT_WRK1, 0x40005b91\r
- 1431                  .set CYDEV_ANAIF_WRK_LUT_MSK, 0x40005b92\r
- 1432                  .set CYDEV_ANAIF_WRK_LUT_CLK, 0x40005b93\r
- 1433                  .set CYDEV_ANAIF_WRK_LUT_CPTR, 0x40005b94\r
- 1434                  .set CYDEV_ANAIF_WRK_CMP_BASE, 0x40005b96\r
- 1435                  .set CYDEV_ANAIF_WRK_CMP_SIZE, 0x00000002\r
- 1436                  .set CYDEV_ANAIF_WRK_CMP_WRK, 0x40005b96\r
- 1437                  .set CYDEV_ANAIF_WRK_CMP_TST, 0x40005b97\r
- 1438                  .set CYDEV_ANAIF_WRK_SC_BASE, 0x40005b98\r
- 1439                  .set CYDEV_ANAIF_WRK_SC_SIZE, 0x00000005\r
- 1440                  .set CYDEV_ANAIF_WRK_SC_SR, 0x40005b98\r
- 1441                  .set CYDEV_ANAIF_WRK_SC_WRK1, 0x40005b99\r
- 1442                  .set CYDEV_ANAIF_WRK_SC_MSK, 0x40005b9a\r
- 1443                  .set CYDEV_ANAIF_WRK_SC_CMPINV, 0x40005b9b\r
- 1444                  .set CYDEV_ANAIF_WRK_SC_CPTR, 0x40005b9c\r
- 1445                  .set CYDEV_ANAIF_WRK_SAR0_BASE, 0x40005ba0\r
- 1446                  .set CYDEV_ANAIF_WRK_SAR0_SIZE, 0x00000002\r
- 1447                  .set CYDEV_ANAIF_WRK_SAR0_WRK0, 0x40005ba0\r
- 1448                  .set CYDEV_ANAIF_WRK_SAR0_WRK1, 0x40005ba1\r
- 1449                  .set CYDEV_ANAIF_WRK_SAR1_BASE, 0x40005ba2\r
- 1450                  .set CYDEV_ANAIF_WRK_SAR1_SIZE, 0x00000002\r
- 1451                  .set CYDEV_ANAIF_WRK_SAR1_WRK0, 0x40005ba2\r
- 1452                  .set CYDEV_ANAIF_WRK_SAR1_WRK1, 0x40005ba3\r
- 1453                  .set CYDEV_ANAIF_WRK_SARS_BASE, 0x40005ba8\r
- 1454                  .set CYDEV_ANAIF_WRK_SARS_SIZE, 0x00000001\r
- 1455                  .set CYDEV_ANAIF_WRK_SARS_SOF, 0x40005ba8\r
- 1456                  .set CYDEV_USB_BASE, 0x40006000\r
- 1457                  .set CYDEV_USB_SIZE, 0x00000300\r
- 1458                  .set CYDEV_USB_EP0_DR0, 0x40006000\r
- 1459                  .set CYDEV_USB_EP0_DR1, 0x40006001\r
- 1460                  .set CYDEV_USB_EP0_DR2, 0x40006002\r
- 1461                  .set CYDEV_USB_EP0_DR3, 0x40006003\r
- 1462                  .set CYDEV_USB_EP0_DR4, 0x40006004\r
- 1463                  .set CYDEV_USB_EP0_DR5, 0x40006005\r
- 1464                  .set CYDEV_USB_EP0_DR6, 0x40006006\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 27\r
-\r
-\r
- 1465                  .set CYDEV_USB_EP0_DR7, 0x40006007\r
- 1466                  .set CYDEV_USB_CR0, 0x40006008\r
- 1467                  .set CYDEV_USB_CR1, 0x40006009\r
- 1468                  .set CYDEV_USB_SIE_EP_INT_EN, 0x4000600a\r
- 1469                  .set CYDEV_USB_SIE_EP_INT_SR, 0x4000600b\r
- 1470                  .set CYDEV_USB_SIE_EP1_BASE, 0x4000600c\r
- 1471                  .set CYDEV_USB_SIE_EP1_SIZE, 0x00000003\r
- 1472                  .set CYDEV_USB_SIE_EP1_CNT0, 0x4000600c\r
- 1473                  .set CYDEV_USB_SIE_EP1_CNT1, 0x4000600d\r
- 1474                  .set CYDEV_USB_SIE_EP1_CR0, 0x4000600e\r
- 1475                  .set CYDEV_USB_USBIO_CR0, 0x40006010\r
- 1476                  .set CYDEV_USB_USBIO_CR1, 0x40006012\r
- 1477                  .set CYDEV_USB_DYN_RECONFIG, 0x40006014\r
- 1478                  .set CYDEV_USB_SOF0, 0x40006018\r
- 1479                  .set CYDEV_USB_SOF1, 0x40006019\r
- 1480                  .set CYDEV_USB_SIE_EP2_BASE, 0x4000601c\r
- 1481                  .set CYDEV_USB_SIE_EP2_SIZE, 0x00000003\r
- 1482                  .set CYDEV_USB_SIE_EP2_CNT0, 0x4000601c\r
- 1483                  .set CYDEV_USB_SIE_EP2_CNT1, 0x4000601d\r
- 1484                  .set CYDEV_USB_SIE_EP2_CR0, 0x4000601e\r
- 1485                  .set CYDEV_USB_EP0_CR, 0x40006028\r
- 1486                  .set CYDEV_USB_EP0_CNT, 0x40006029\r
- 1487                  .set CYDEV_USB_SIE_EP3_BASE, 0x4000602c\r
- 1488                  .set CYDEV_USB_SIE_EP3_SIZE, 0x00000003\r
- 1489                  .set CYDEV_USB_SIE_EP3_CNT0, 0x4000602c\r
- 1490                  .set CYDEV_USB_SIE_EP3_CNT1, 0x4000602d\r
- 1491                  .set CYDEV_USB_SIE_EP3_CR0, 0x4000602e\r
- 1492                  .set CYDEV_USB_SIE_EP4_BASE, 0x4000603c\r
- 1493                  .set CYDEV_USB_SIE_EP4_SIZE, 0x00000003\r
- 1494                  .set CYDEV_USB_SIE_EP4_CNT0, 0x4000603c\r
- 1495                  .set CYDEV_USB_SIE_EP4_CNT1, 0x4000603d\r
- 1496                  .set CYDEV_USB_SIE_EP4_CR0, 0x4000603e\r
- 1497                  .set CYDEV_USB_SIE_EP5_BASE, 0x4000604c\r
- 1498                  .set CYDEV_USB_SIE_EP5_SIZE, 0x00000003\r
- 1499                  .set CYDEV_USB_SIE_EP5_CNT0, 0x4000604c\r
- 1500                  .set CYDEV_USB_SIE_EP5_CNT1, 0x4000604d\r
- 1501                  .set CYDEV_USB_SIE_EP5_CR0, 0x4000604e\r
- 1502                  .set CYDEV_USB_SIE_EP6_BASE, 0x4000605c\r
- 1503                  .set CYDEV_USB_SIE_EP6_SIZE, 0x00000003\r
- 1504                  .set CYDEV_USB_SIE_EP6_CNT0, 0x4000605c\r
- 1505                  .set CYDEV_USB_SIE_EP6_CNT1, 0x4000605d\r
- 1506                  .set CYDEV_USB_SIE_EP6_CR0, 0x4000605e\r
- 1507                  .set CYDEV_USB_SIE_EP7_BASE, 0x4000606c\r
- 1508                  .set CYDEV_USB_SIE_EP7_SIZE, 0x00000003\r
- 1509                  .set CYDEV_USB_SIE_EP7_CNT0, 0x4000606c\r
- 1510                  .set CYDEV_USB_SIE_EP7_CNT1, 0x4000606d\r
- 1511                  .set CYDEV_USB_SIE_EP7_CR0, 0x4000606e\r
- 1512                  .set CYDEV_USB_SIE_EP8_BASE, 0x4000607c\r
- 1513                  .set CYDEV_USB_SIE_EP8_SIZE, 0x00000003\r
- 1514                  .set CYDEV_USB_SIE_EP8_CNT0, 0x4000607c\r
- 1515                  .set CYDEV_USB_SIE_EP8_CNT1, 0x4000607d\r
- 1516                  .set CYDEV_USB_SIE_EP8_CR0, 0x4000607e\r
- 1517                  .set CYDEV_USB_ARB_EP1_BASE, 0x40006080\r
- 1518                  .set CYDEV_USB_ARB_EP1_SIZE, 0x00000003\r
- 1519                  .set CYDEV_USB_ARB_EP1_CFG, 0x40006080\r
- 1520                  .set CYDEV_USB_ARB_EP1_INT_EN, 0x40006081\r
- 1521                  .set CYDEV_USB_ARB_EP1_SR, 0x40006082\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 28\r
-\r
-\r
- 1522                  .set CYDEV_USB_ARB_RW1_BASE, 0x40006084\r
- 1523                  .set CYDEV_USB_ARB_RW1_SIZE, 0x00000005\r
- 1524                  .set CYDEV_USB_ARB_RW1_WA, 0x40006084\r
- 1525                  .set CYDEV_USB_ARB_RW1_WA_MSB, 0x40006085\r
- 1526                  .set CYDEV_USB_ARB_RW1_RA, 0x40006086\r
- 1527                  .set CYDEV_USB_ARB_RW1_RA_MSB, 0x40006087\r
- 1528                  .set CYDEV_USB_ARB_RW1_DR, 0x40006088\r
- 1529                  .set CYDEV_USB_BUF_SIZE, 0x4000608c\r
- 1530                  .set CYDEV_USB_EP_ACTIVE, 0x4000608e\r
- 1531                  .set CYDEV_USB_EP_TYPE, 0x4000608f\r
- 1532                  .set CYDEV_USB_ARB_EP2_BASE, 0x40006090\r
- 1533                  .set CYDEV_USB_ARB_EP2_SIZE, 0x00000003\r
- 1534                  .set CYDEV_USB_ARB_EP2_CFG, 0x40006090\r
- 1535                  .set CYDEV_USB_ARB_EP2_INT_EN, 0x40006091\r
- 1536                  .set CYDEV_USB_ARB_EP2_SR, 0x40006092\r
- 1537                  .set CYDEV_USB_ARB_RW2_BASE, 0x40006094\r
- 1538                  .set CYDEV_USB_ARB_RW2_SIZE, 0x00000005\r
- 1539                  .set CYDEV_USB_ARB_RW2_WA, 0x40006094\r
- 1540                  .set CYDEV_USB_ARB_RW2_WA_MSB, 0x40006095\r
- 1541                  .set CYDEV_USB_ARB_RW2_RA, 0x40006096\r
- 1542                  .set CYDEV_USB_ARB_RW2_RA_MSB, 0x40006097\r
- 1543                  .set CYDEV_USB_ARB_RW2_DR, 0x40006098\r
- 1544                  .set CYDEV_USB_ARB_CFG, 0x4000609c\r
- 1545                  .set CYDEV_USB_USB_CLK_EN, 0x4000609d\r
- 1546                  .set CYDEV_USB_ARB_INT_EN, 0x4000609e\r
- 1547                  .set CYDEV_USB_ARB_INT_SR, 0x4000609f\r
- 1548                  .set CYDEV_USB_ARB_EP3_BASE, 0x400060a0\r
- 1549                  .set CYDEV_USB_ARB_EP3_SIZE, 0x00000003\r
- 1550                  .set CYDEV_USB_ARB_EP3_CFG, 0x400060a0\r
- 1551                  .set CYDEV_USB_ARB_EP3_INT_EN, 0x400060a1\r
- 1552                  .set CYDEV_USB_ARB_EP3_SR, 0x400060a2\r
- 1553                  .set CYDEV_USB_ARB_RW3_BASE, 0x400060a4\r
- 1554                  .set CYDEV_USB_ARB_RW3_SIZE, 0x00000005\r
- 1555                  .set CYDEV_USB_ARB_RW3_WA, 0x400060a4\r
- 1556                  .set CYDEV_USB_ARB_RW3_WA_MSB, 0x400060a5\r
- 1557                  .set CYDEV_USB_ARB_RW3_RA, 0x400060a6\r
- 1558                  .set CYDEV_USB_ARB_RW3_RA_MSB, 0x400060a7\r
- 1559                  .set CYDEV_USB_ARB_RW3_DR, 0x400060a8\r
- 1560                  .set CYDEV_USB_CWA, 0x400060ac\r
- 1561                  .set CYDEV_USB_CWA_MSB, 0x400060ad\r
- 1562                  .set CYDEV_USB_ARB_EP4_BASE, 0x400060b0\r
- 1563                  .set CYDEV_USB_ARB_EP4_SIZE, 0x00000003\r
- 1564                  .set CYDEV_USB_ARB_EP4_CFG, 0x400060b0\r
- 1565                  .set CYDEV_USB_ARB_EP4_INT_EN, 0x400060b1\r
- 1566                  .set CYDEV_USB_ARB_EP4_SR, 0x400060b2\r
- 1567                  .set CYDEV_USB_ARB_RW4_BASE, 0x400060b4\r
- 1568                  .set CYDEV_USB_ARB_RW4_SIZE, 0x00000005\r
- 1569                  .set CYDEV_USB_ARB_RW4_WA, 0x400060b4\r
- 1570                  .set CYDEV_USB_ARB_RW4_WA_MSB, 0x400060b5\r
- 1571                  .set CYDEV_USB_ARB_RW4_RA, 0x400060b6\r
- 1572                  .set CYDEV_USB_ARB_RW4_RA_MSB, 0x400060b7\r
- 1573                  .set CYDEV_USB_ARB_RW4_DR, 0x400060b8\r
- 1574                  .set CYDEV_USB_DMA_THRES, 0x400060bc\r
- 1575                  .set CYDEV_USB_DMA_THRES_MSB, 0x400060bd\r
- 1576                  .set CYDEV_USB_ARB_EP5_BASE, 0x400060c0\r
- 1577                  .set CYDEV_USB_ARB_EP5_SIZE, 0x00000003\r
- 1578                  .set CYDEV_USB_ARB_EP5_CFG, 0x400060c0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 29\r
-\r
-\r
- 1579                  .set CYDEV_USB_ARB_EP5_INT_EN, 0x400060c1\r
- 1580                  .set CYDEV_USB_ARB_EP5_SR, 0x400060c2\r
- 1581                  .set CYDEV_USB_ARB_RW5_BASE, 0x400060c4\r
- 1582                  .set CYDEV_USB_ARB_RW5_SIZE, 0x00000005\r
- 1583                  .set CYDEV_USB_ARB_RW5_WA, 0x400060c4\r
- 1584                  .set CYDEV_USB_ARB_RW5_WA_MSB, 0x400060c5\r
- 1585                  .set CYDEV_USB_ARB_RW5_RA, 0x400060c6\r
- 1586                  .set CYDEV_USB_ARB_RW5_RA_MSB, 0x400060c7\r
- 1587                  .set CYDEV_USB_ARB_RW5_DR, 0x400060c8\r
- 1588                  .set CYDEV_USB_BUS_RST_CNT, 0x400060cc\r
- 1589                  .set CYDEV_USB_ARB_EP6_BASE, 0x400060d0\r
- 1590                  .set CYDEV_USB_ARB_EP6_SIZE, 0x00000003\r
- 1591                  .set CYDEV_USB_ARB_EP6_CFG, 0x400060d0\r
- 1592                  .set CYDEV_USB_ARB_EP6_INT_EN, 0x400060d1\r
- 1593                  .set CYDEV_USB_ARB_EP6_SR, 0x400060d2\r
- 1594                  .set CYDEV_USB_ARB_RW6_BASE, 0x400060d4\r
- 1595                  .set CYDEV_USB_ARB_RW6_SIZE, 0x00000005\r
- 1596                  .set CYDEV_USB_ARB_RW6_WA, 0x400060d4\r
- 1597                  .set CYDEV_USB_ARB_RW6_WA_MSB, 0x400060d5\r
- 1598                  .set CYDEV_USB_ARB_RW6_RA, 0x400060d6\r
- 1599                  .set CYDEV_USB_ARB_RW6_RA_MSB, 0x400060d7\r
- 1600                  .set CYDEV_USB_ARB_RW6_DR, 0x400060d8\r
- 1601                  .set CYDEV_USB_ARB_EP7_BASE, 0x400060e0\r
- 1602                  .set CYDEV_USB_ARB_EP7_SIZE, 0x00000003\r
- 1603                  .set CYDEV_USB_ARB_EP7_CFG, 0x400060e0\r
- 1604                  .set CYDEV_USB_ARB_EP7_INT_EN, 0x400060e1\r
- 1605                  .set CYDEV_USB_ARB_EP7_SR, 0x400060e2\r
- 1606                  .set CYDEV_USB_ARB_RW7_BASE, 0x400060e4\r
- 1607                  .set CYDEV_USB_ARB_RW7_SIZE, 0x00000005\r
- 1608                  .set CYDEV_USB_ARB_RW7_WA, 0x400060e4\r
- 1609                  .set CYDEV_USB_ARB_RW7_WA_MSB, 0x400060e5\r
- 1610                  .set CYDEV_USB_ARB_RW7_RA, 0x400060e6\r
- 1611                  .set CYDEV_USB_ARB_RW7_RA_MSB, 0x400060e7\r
- 1612                  .set CYDEV_USB_ARB_RW7_DR, 0x400060e8\r
- 1613                  .set CYDEV_USB_ARB_EP8_BASE, 0x400060f0\r
- 1614                  .set CYDEV_USB_ARB_EP8_SIZE, 0x00000003\r
- 1615                  .set CYDEV_USB_ARB_EP8_CFG, 0x400060f0\r
- 1616                  .set CYDEV_USB_ARB_EP8_INT_EN, 0x400060f1\r
- 1617                  .set CYDEV_USB_ARB_EP8_SR, 0x400060f2\r
- 1618                  .set CYDEV_USB_ARB_RW8_BASE, 0x400060f4\r
- 1619                  .set CYDEV_USB_ARB_RW8_SIZE, 0x00000005\r
- 1620                  .set CYDEV_USB_ARB_RW8_WA, 0x400060f4\r
- 1621                  .set CYDEV_USB_ARB_RW8_WA_MSB, 0x400060f5\r
- 1622                  .set CYDEV_USB_ARB_RW8_RA, 0x400060f6\r
- 1623                  .set CYDEV_USB_ARB_RW8_RA_MSB, 0x400060f7\r
- 1624                  .set CYDEV_USB_ARB_RW8_DR, 0x400060f8\r
- 1625                  .set CYDEV_USB_MEM_BASE, 0x40006100\r
- 1626                  .set CYDEV_USB_MEM_SIZE, 0x00000200\r
- 1627                  .set CYDEV_USB_MEM_DATA_MBASE, 0x40006100\r
- 1628                  .set CYDEV_USB_MEM_DATA_MSIZE, 0x00000200\r
- 1629                  .set CYDEV_UWRK_BASE, 0x40006400\r
- 1630                  .set CYDEV_UWRK_SIZE, 0x00000b60\r
- 1631                  .set CYDEV_UWRK_UWRK8_BASE, 0x40006400\r
- 1632                  .set CYDEV_UWRK_UWRK8_SIZE, 0x000003b0\r
- 1633                  .set CYDEV_UWRK_UWRK8_B0_BASE, 0x40006400\r
- 1634                  .set CYDEV_UWRK_UWRK8_B0_SIZE, 0x000000b0\r
- 1635                  .set CYDEV_UWRK_UWRK8_B0_UDB00_A0, 0x40006400\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 30\r
-\r
-\r
- 1636                  .set CYDEV_UWRK_UWRK8_B0_UDB01_A0, 0x40006401\r
- 1637                  .set CYDEV_UWRK_UWRK8_B0_UDB02_A0, 0x40006402\r
- 1638                  .set CYDEV_UWRK_UWRK8_B0_UDB03_A0, 0x40006403\r
- 1639                  .set CYDEV_UWRK_UWRK8_B0_UDB04_A0, 0x40006404\r
- 1640                  .set CYDEV_UWRK_UWRK8_B0_UDB05_A0, 0x40006405\r
- 1641                  .set CYDEV_UWRK_UWRK8_B0_UDB06_A0, 0x40006406\r
- 1642                  .set CYDEV_UWRK_UWRK8_B0_UDB07_A0, 0x40006407\r
- 1643                  .set CYDEV_UWRK_UWRK8_B0_UDB08_A0, 0x40006408\r
- 1644                  .set CYDEV_UWRK_UWRK8_B0_UDB09_A0, 0x40006409\r
- 1645                  .set CYDEV_UWRK_UWRK8_B0_UDB10_A0, 0x4000640a\r
- 1646                  .set CYDEV_UWRK_UWRK8_B0_UDB11_A0, 0x4000640b\r
- 1647                  .set CYDEV_UWRK_UWRK8_B0_UDB12_A0, 0x4000640c\r
- 1648                  .set CYDEV_UWRK_UWRK8_B0_UDB13_A0, 0x4000640d\r
- 1649                  .set CYDEV_UWRK_UWRK8_B0_UDB14_A0, 0x4000640e\r
- 1650                  .set CYDEV_UWRK_UWRK8_B0_UDB15_A0, 0x4000640f\r
- 1651                  .set CYDEV_UWRK_UWRK8_B0_UDB00_A1, 0x40006410\r
- 1652                  .set CYDEV_UWRK_UWRK8_B0_UDB01_A1, 0x40006411\r
- 1653                  .set CYDEV_UWRK_UWRK8_B0_UDB02_A1, 0x40006412\r
- 1654                  .set CYDEV_UWRK_UWRK8_B0_UDB03_A1, 0x40006413\r
- 1655                  .set CYDEV_UWRK_UWRK8_B0_UDB04_A1, 0x40006414\r
- 1656                  .set CYDEV_UWRK_UWRK8_B0_UDB05_A1, 0x40006415\r
- 1657                  .set CYDEV_UWRK_UWRK8_B0_UDB06_A1, 0x40006416\r
- 1658                  .set CYDEV_UWRK_UWRK8_B0_UDB07_A1, 0x40006417\r
- 1659                  .set CYDEV_UWRK_UWRK8_B0_UDB08_A1, 0x40006418\r
- 1660                  .set CYDEV_UWRK_UWRK8_B0_UDB09_A1, 0x40006419\r
- 1661                  .set CYDEV_UWRK_UWRK8_B0_UDB10_A1, 0x4000641a\r
- 1662                  .set CYDEV_UWRK_UWRK8_B0_UDB11_A1, 0x4000641b\r
- 1663                  .set CYDEV_UWRK_UWRK8_B0_UDB12_A1, 0x4000641c\r
- 1664                  .set CYDEV_UWRK_UWRK8_B0_UDB13_A1, 0x4000641d\r
- 1665                  .set CYDEV_UWRK_UWRK8_B0_UDB14_A1, 0x4000641e\r
- 1666                  .set CYDEV_UWRK_UWRK8_B0_UDB15_A1, 0x4000641f\r
- 1667                  .set CYDEV_UWRK_UWRK8_B0_UDB00_D0, 0x40006420\r
- 1668                  .set CYDEV_UWRK_UWRK8_B0_UDB01_D0, 0x40006421\r
- 1669                  .set CYDEV_UWRK_UWRK8_B0_UDB02_D0, 0x40006422\r
- 1670                  .set CYDEV_UWRK_UWRK8_B0_UDB03_D0, 0x40006423\r
- 1671                  .set CYDEV_UWRK_UWRK8_B0_UDB04_D0, 0x40006424\r
- 1672                  .set CYDEV_UWRK_UWRK8_B0_UDB05_D0, 0x40006425\r
- 1673                  .set CYDEV_UWRK_UWRK8_B0_UDB06_D0, 0x40006426\r
- 1674                  .set CYDEV_UWRK_UWRK8_B0_UDB07_D0, 0x40006427\r
- 1675                  .set CYDEV_UWRK_UWRK8_B0_UDB08_D0, 0x40006428\r
- 1676                  .set CYDEV_UWRK_UWRK8_B0_UDB09_D0, 0x40006429\r
- 1677                  .set CYDEV_UWRK_UWRK8_B0_UDB10_D0, 0x4000642a\r
- 1678                  .set CYDEV_UWRK_UWRK8_B0_UDB11_D0, 0x4000642b\r
- 1679                  .set CYDEV_UWRK_UWRK8_B0_UDB12_D0, 0x4000642c\r
- 1680                  .set CYDEV_UWRK_UWRK8_B0_UDB13_D0, 0x4000642d\r
- 1681                  .set CYDEV_UWRK_UWRK8_B0_UDB14_D0, 0x4000642e\r
- 1682                  .set CYDEV_UWRK_UWRK8_B0_UDB15_D0, 0x4000642f\r
- 1683                  .set CYDEV_UWRK_UWRK8_B0_UDB00_D1, 0x40006430\r
- 1684                  .set CYDEV_UWRK_UWRK8_B0_UDB01_D1, 0x40006431\r
- 1685                  .set CYDEV_UWRK_UWRK8_B0_UDB02_D1, 0x40006432\r
- 1686                  .set CYDEV_UWRK_UWRK8_B0_UDB03_D1, 0x40006433\r
- 1687                  .set CYDEV_UWRK_UWRK8_B0_UDB04_D1, 0x40006434\r
- 1688                  .set CYDEV_UWRK_UWRK8_B0_UDB05_D1, 0x40006435\r
- 1689                  .set CYDEV_UWRK_UWRK8_B0_UDB06_D1, 0x40006436\r
- 1690                  .set CYDEV_UWRK_UWRK8_B0_UDB07_D1, 0x40006437\r
- 1691                  .set CYDEV_UWRK_UWRK8_B0_UDB08_D1, 0x40006438\r
- 1692                  .set CYDEV_UWRK_UWRK8_B0_UDB09_D1, 0x40006439\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 31\r
-\r
-\r
- 1693                  .set CYDEV_UWRK_UWRK8_B0_UDB10_D1, 0x4000643a\r
- 1694                  .set CYDEV_UWRK_UWRK8_B0_UDB11_D1, 0x4000643b\r
- 1695                  .set CYDEV_UWRK_UWRK8_B0_UDB12_D1, 0x4000643c\r
- 1696                  .set CYDEV_UWRK_UWRK8_B0_UDB13_D1, 0x4000643d\r
- 1697                  .set CYDEV_UWRK_UWRK8_B0_UDB14_D1, 0x4000643e\r
- 1698                  .set CYDEV_UWRK_UWRK8_B0_UDB15_D1, 0x4000643f\r
- 1699                  .set CYDEV_UWRK_UWRK8_B0_UDB00_F0, 0x40006440\r
- 1700                  .set CYDEV_UWRK_UWRK8_B0_UDB01_F0, 0x40006441\r
- 1701                  .set CYDEV_UWRK_UWRK8_B0_UDB02_F0, 0x40006442\r
- 1702                  .set CYDEV_UWRK_UWRK8_B0_UDB03_F0, 0x40006443\r
- 1703                  .set CYDEV_UWRK_UWRK8_B0_UDB04_F0, 0x40006444\r
- 1704                  .set CYDEV_UWRK_UWRK8_B0_UDB05_F0, 0x40006445\r
- 1705                  .set CYDEV_UWRK_UWRK8_B0_UDB06_F0, 0x40006446\r
- 1706                  .set CYDEV_UWRK_UWRK8_B0_UDB07_F0, 0x40006447\r
- 1707                  .set CYDEV_UWRK_UWRK8_B0_UDB08_F0, 0x40006448\r
- 1708                  .set CYDEV_UWRK_UWRK8_B0_UDB09_F0, 0x40006449\r
- 1709                  .set CYDEV_UWRK_UWRK8_B0_UDB10_F0, 0x4000644a\r
- 1710                  .set CYDEV_UWRK_UWRK8_B0_UDB11_F0, 0x4000644b\r
- 1711                  .set CYDEV_UWRK_UWRK8_B0_UDB12_F0, 0x4000644c\r
- 1712                  .set CYDEV_UWRK_UWRK8_B0_UDB13_F0, 0x4000644d\r
- 1713                  .set CYDEV_UWRK_UWRK8_B0_UDB14_F0, 0x4000644e\r
- 1714                  .set CYDEV_UWRK_UWRK8_B0_UDB15_F0, 0x4000644f\r
- 1715                  .set CYDEV_UWRK_UWRK8_B0_UDB00_F1, 0x40006450\r
- 1716                  .set CYDEV_UWRK_UWRK8_B0_UDB01_F1, 0x40006451\r
- 1717                  .set CYDEV_UWRK_UWRK8_B0_UDB02_F1, 0x40006452\r
- 1718                  .set CYDEV_UWRK_UWRK8_B0_UDB03_F1, 0x40006453\r
- 1719                  .set CYDEV_UWRK_UWRK8_B0_UDB04_F1, 0x40006454\r
- 1720                  .set CYDEV_UWRK_UWRK8_B0_UDB05_F1, 0x40006455\r
- 1721                  .set CYDEV_UWRK_UWRK8_B0_UDB06_F1, 0x40006456\r
- 1722                  .set CYDEV_UWRK_UWRK8_B0_UDB07_F1, 0x40006457\r
- 1723                  .set CYDEV_UWRK_UWRK8_B0_UDB08_F1, 0x40006458\r
- 1724                  .set CYDEV_UWRK_UWRK8_B0_UDB09_F1, 0x40006459\r
- 1725                  .set CYDEV_UWRK_UWRK8_B0_UDB10_F1, 0x4000645a\r
- 1726                  .set CYDEV_UWRK_UWRK8_B0_UDB11_F1, 0x4000645b\r
- 1727                  .set CYDEV_UWRK_UWRK8_B0_UDB12_F1, 0x4000645c\r
- 1728                  .set CYDEV_UWRK_UWRK8_B0_UDB13_F1, 0x4000645d\r
- 1729                  .set CYDEV_UWRK_UWRK8_B0_UDB14_F1, 0x4000645e\r
- 1730                  .set CYDEV_UWRK_UWRK8_B0_UDB15_F1, 0x4000645f\r
- 1731                  .set CYDEV_UWRK_UWRK8_B0_UDB00_ST, 0x40006460\r
- 1732                  .set CYDEV_UWRK_UWRK8_B0_UDB01_ST, 0x40006461\r
- 1733                  .set CYDEV_UWRK_UWRK8_B0_UDB02_ST, 0x40006462\r
- 1734                  .set CYDEV_UWRK_UWRK8_B0_UDB03_ST, 0x40006463\r
- 1735                  .set CYDEV_UWRK_UWRK8_B0_UDB04_ST, 0x40006464\r
- 1736                  .set CYDEV_UWRK_UWRK8_B0_UDB05_ST, 0x40006465\r
- 1737                  .set CYDEV_UWRK_UWRK8_B0_UDB06_ST, 0x40006466\r
- 1738                  .set CYDEV_UWRK_UWRK8_B0_UDB07_ST, 0x40006467\r
- 1739                  .set CYDEV_UWRK_UWRK8_B0_UDB08_ST, 0x40006468\r
- 1740                  .set CYDEV_UWRK_UWRK8_B0_UDB09_ST, 0x40006469\r
- 1741                  .set CYDEV_UWRK_UWRK8_B0_UDB10_ST, 0x4000646a\r
- 1742                  .set CYDEV_UWRK_UWRK8_B0_UDB11_ST, 0x4000646b\r
- 1743                  .set CYDEV_UWRK_UWRK8_B0_UDB12_ST, 0x4000646c\r
- 1744                  .set CYDEV_UWRK_UWRK8_B0_UDB13_ST, 0x4000646d\r
- 1745                  .set CYDEV_UWRK_UWRK8_B0_UDB14_ST, 0x4000646e\r
- 1746                  .set CYDEV_UWRK_UWRK8_B0_UDB15_ST, 0x4000646f\r
- 1747                  .set CYDEV_UWRK_UWRK8_B0_UDB00_CTL, 0x40006470\r
- 1748                  .set CYDEV_UWRK_UWRK8_B0_UDB01_CTL, 0x40006471\r
- 1749                  .set CYDEV_UWRK_UWRK8_B0_UDB02_CTL, 0x40006472\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 32\r
-\r
-\r
- 1750                  .set CYDEV_UWRK_UWRK8_B0_UDB03_CTL, 0x40006473\r
- 1751                  .set CYDEV_UWRK_UWRK8_B0_UDB04_CTL, 0x40006474\r
- 1752                  .set CYDEV_UWRK_UWRK8_B0_UDB05_CTL, 0x40006475\r
- 1753                  .set CYDEV_UWRK_UWRK8_B0_UDB06_CTL, 0x40006476\r
- 1754                  .set CYDEV_UWRK_UWRK8_B0_UDB07_CTL, 0x40006477\r
- 1755                  .set CYDEV_UWRK_UWRK8_B0_UDB08_CTL, 0x40006478\r
- 1756                  .set CYDEV_UWRK_UWRK8_B0_UDB09_CTL, 0x40006479\r
- 1757                  .set CYDEV_UWRK_UWRK8_B0_UDB10_CTL, 0x4000647a\r
- 1758                  .set CYDEV_UWRK_UWRK8_B0_UDB11_CTL, 0x4000647b\r
- 1759                  .set CYDEV_UWRK_UWRK8_B0_UDB12_CTL, 0x4000647c\r
- 1760                  .set CYDEV_UWRK_UWRK8_B0_UDB13_CTL, 0x4000647d\r
- 1761                  .set CYDEV_UWRK_UWRK8_B0_UDB14_CTL, 0x4000647e\r
- 1762                  .set CYDEV_UWRK_UWRK8_B0_UDB15_CTL, 0x4000647f\r
- 1763                  .set CYDEV_UWRK_UWRK8_B0_UDB00_MSK, 0x40006480\r
- 1764                  .set CYDEV_UWRK_UWRK8_B0_UDB01_MSK, 0x40006481\r
- 1765                  .set CYDEV_UWRK_UWRK8_B0_UDB02_MSK, 0x40006482\r
- 1766                  .set CYDEV_UWRK_UWRK8_B0_UDB03_MSK, 0x40006483\r
- 1767                  .set CYDEV_UWRK_UWRK8_B0_UDB04_MSK, 0x40006484\r
- 1768                  .set CYDEV_UWRK_UWRK8_B0_UDB05_MSK, 0x40006485\r
- 1769                  .set CYDEV_UWRK_UWRK8_B0_UDB06_MSK, 0x40006486\r
- 1770                  .set CYDEV_UWRK_UWRK8_B0_UDB07_MSK, 0x40006487\r
- 1771                  .set CYDEV_UWRK_UWRK8_B0_UDB08_MSK, 0x40006488\r
- 1772                  .set CYDEV_UWRK_UWRK8_B0_UDB09_MSK, 0x40006489\r
- 1773                  .set CYDEV_UWRK_UWRK8_B0_UDB10_MSK, 0x4000648a\r
- 1774                  .set CYDEV_UWRK_UWRK8_B0_UDB11_MSK, 0x4000648b\r
- 1775                  .set CYDEV_UWRK_UWRK8_B0_UDB12_MSK, 0x4000648c\r
- 1776                  .set CYDEV_UWRK_UWRK8_B0_UDB13_MSK, 0x4000648d\r
- 1777                  .set CYDEV_UWRK_UWRK8_B0_UDB14_MSK, 0x4000648e\r
- 1778                  .set CYDEV_UWRK_UWRK8_B0_UDB15_MSK, 0x4000648f\r
- 1779                  .set CYDEV_UWRK_UWRK8_B0_UDB00_ACTL, 0x40006490\r
- 1780                  .set CYDEV_UWRK_UWRK8_B0_UDB01_ACTL, 0x40006491\r
- 1781                  .set CYDEV_UWRK_UWRK8_B0_UDB02_ACTL, 0x40006492\r
- 1782                  .set CYDEV_UWRK_UWRK8_B0_UDB03_ACTL, 0x40006493\r
- 1783                  .set CYDEV_UWRK_UWRK8_B0_UDB04_ACTL, 0x40006494\r
- 1784                  .set CYDEV_UWRK_UWRK8_B0_UDB05_ACTL, 0x40006495\r
- 1785                  .set CYDEV_UWRK_UWRK8_B0_UDB06_ACTL, 0x40006496\r
- 1786                  .set CYDEV_UWRK_UWRK8_B0_UDB07_ACTL, 0x40006497\r
- 1787                  .set CYDEV_UWRK_UWRK8_B0_UDB08_ACTL, 0x40006498\r
- 1788                  .set CYDEV_UWRK_UWRK8_B0_UDB09_ACTL, 0x40006499\r
- 1789                  .set CYDEV_UWRK_UWRK8_B0_UDB10_ACTL, 0x4000649a\r
- 1790                  .set CYDEV_UWRK_UWRK8_B0_UDB11_ACTL, 0x4000649b\r
- 1791                  .set CYDEV_UWRK_UWRK8_B0_UDB12_ACTL, 0x4000649c\r
- 1792                  .set CYDEV_UWRK_UWRK8_B0_UDB13_ACTL, 0x4000649d\r
- 1793                  .set CYDEV_UWRK_UWRK8_B0_UDB14_ACTL, 0x4000649e\r
- 1794                  .set CYDEV_UWRK_UWRK8_B0_UDB15_ACTL, 0x4000649f\r
- 1795                  .set CYDEV_UWRK_UWRK8_B0_UDB00_MC, 0x400064a0\r
- 1796                  .set CYDEV_UWRK_UWRK8_B0_UDB01_MC, 0x400064a1\r
- 1797                  .set CYDEV_UWRK_UWRK8_B0_UDB02_MC, 0x400064a2\r
- 1798                  .set CYDEV_UWRK_UWRK8_B0_UDB03_MC, 0x400064a3\r
- 1799                  .set CYDEV_UWRK_UWRK8_B0_UDB04_MC, 0x400064a4\r
- 1800                  .set CYDEV_UWRK_UWRK8_B0_UDB05_MC, 0x400064a5\r
- 1801                  .set CYDEV_UWRK_UWRK8_B0_UDB06_MC, 0x400064a6\r
- 1802                  .set CYDEV_UWRK_UWRK8_B0_UDB07_MC, 0x400064a7\r
- 1803                  .set CYDEV_UWRK_UWRK8_B0_UDB08_MC, 0x400064a8\r
- 1804                  .set CYDEV_UWRK_UWRK8_B0_UDB09_MC, 0x400064a9\r
- 1805                  .set CYDEV_UWRK_UWRK8_B0_UDB10_MC, 0x400064aa\r
- 1806                  .set CYDEV_UWRK_UWRK8_B0_UDB11_MC, 0x400064ab\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 33\r
-\r
-\r
- 1807                  .set CYDEV_UWRK_UWRK8_B0_UDB12_MC, 0x400064ac\r
- 1808                  .set CYDEV_UWRK_UWRK8_B0_UDB13_MC, 0x400064ad\r
- 1809                  .set CYDEV_UWRK_UWRK8_B0_UDB14_MC, 0x400064ae\r
- 1810                  .set CYDEV_UWRK_UWRK8_B0_UDB15_MC, 0x400064af\r
- 1811                  .set CYDEV_UWRK_UWRK8_B1_BASE, 0x40006500\r
- 1812                  .set CYDEV_UWRK_UWRK8_B1_SIZE, 0x000000b0\r
- 1813                  .set CYDEV_UWRK_UWRK8_B1_UDB04_A0, 0x40006504\r
- 1814                  .set CYDEV_UWRK_UWRK8_B1_UDB05_A0, 0x40006505\r
- 1815                  .set CYDEV_UWRK_UWRK8_B1_UDB06_A0, 0x40006506\r
- 1816                  .set CYDEV_UWRK_UWRK8_B1_UDB07_A0, 0x40006507\r
- 1817                  .set CYDEV_UWRK_UWRK8_B1_UDB08_A0, 0x40006508\r
- 1818                  .set CYDEV_UWRK_UWRK8_B1_UDB09_A0, 0x40006509\r
- 1819                  .set CYDEV_UWRK_UWRK8_B1_UDB10_A0, 0x4000650a\r
- 1820                  .set CYDEV_UWRK_UWRK8_B1_UDB11_A0, 0x4000650b\r
- 1821                  .set CYDEV_UWRK_UWRK8_B1_UDB04_A1, 0x40006514\r
- 1822                  .set CYDEV_UWRK_UWRK8_B1_UDB05_A1, 0x40006515\r
- 1823                  .set CYDEV_UWRK_UWRK8_B1_UDB06_A1, 0x40006516\r
- 1824                  .set CYDEV_UWRK_UWRK8_B1_UDB07_A1, 0x40006517\r
- 1825                  .set CYDEV_UWRK_UWRK8_B1_UDB08_A1, 0x40006518\r
- 1826                  .set CYDEV_UWRK_UWRK8_B1_UDB09_A1, 0x40006519\r
- 1827                  .set CYDEV_UWRK_UWRK8_B1_UDB10_A1, 0x4000651a\r
- 1828                  .set CYDEV_UWRK_UWRK8_B1_UDB11_A1, 0x4000651b\r
- 1829                  .set CYDEV_UWRK_UWRK8_B1_UDB04_D0, 0x40006524\r
- 1830                  .set CYDEV_UWRK_UWRK8_B1_UDB05_D0, 0x40006525\r
- 1831                  .set CYDEV_UWRK_UWRK8_B1_UDB06_D0, 0x40006526\r
- 1832                  .set CYDEV_UWRK_UWRK8_B1_UDB07_D0, 0x40006527\r
- 1833                  .set CYDEV_UWRK_UWRK8_B1_UDB08_D0, 0x40006528\r
- 1834                  .set CYDEV_UWRK_UWRK8_B1_UDB09_D0, 0x40006529\r
- 1835                  .set CYDEV_UWRK_UWRK8_B1_UDB10_D0, 0x4000652a\r
- 1836                  .set CYDEV_UWRK_UWRK8_B1_UDB11_D0, 0x4000652b\r
- 1837                  .set CYDEV_UWRK_UWRK8_B1_UDB04_D1, 0x40006534\r
- 1838                  .set CYDEV_UWRK_UWRK8_B1_UDB05_D1, 0x40006535\r
- 1839                  .set CYDEV_UWRK_UWRK8_B1_UDB06_D1, 0x40006536\r
- 1840                  .set CYDEV_UWRK_UWRK8_B1_UDB07_D1, 0x40006537\r
- 1841                  .set CYDEV_UWRK_UWRK8_B1_UDB08_D1, 0x40006538\r
- 1842                  .set CYDEV_UWRK_UWRK8_B1_UDB09_D1, 0x40006539\r
- 1843                  .set CYDEV_UWRK_UWRK8_B1_UDB10_D1, 0x4000653a\r
- 1844                  .set CYDEV_UWRK_UWRK8_B1_UDB11_D1, 0x4000653b\r
- 1845                  .set CYDEV_UWRK_UWRK8_B1_UDB04_F0, 0x40006544\r
- 1846                  .set CYDEV_UWRK_UWRK8_B1_UDB05_F0, 0x40006545\r
- 1847                  .set CYDEV_UWRK_UWRK8_B1_UDB06_F0, 0x40006546\r
- 1848                  .set CYDEV_UWRK_UWRK8_B1_UDB07_F0, 0x40006547\r
- 1849                  .set CYDEV_UWRK_UWRK8_B1_UDB08_F0, 0x40006548\r
- 1850                  .set CYDEV_UWRK_UWRK8_B1_UDB09_F0, 0x40006549\r
- 1851                  .set CYDEV_UWRK_UWRK8_B1_UDB10_F0, 0x4000654a\r
- 1852                  .set CYDEV_UWRK_UWRK8_B1_UDB11_F0, 0x4000654b\r
- 1853                  .set CYDEV_UWRK_UWRK8_B1_UDB04_F1, 0x40006554\r
- 1854                  .set CYDEV_UWRK_UWRK8_B1_UDB05_F1, 0x40006555\r
- 1855                  .set CYDEV_UWRK_UWRK8_B1_UDB06_F1, 0x40006556\r
- 1856                  .set CYDEV_UWRK_UWRK8_B1_UDB07_F1, 0x40006557\r
- 1857                  .set CYDEV_UWRK_UWRK8_B1_UDB08_F1, 0x40006558\r
- 1858                  .set CYDEV_UWRK_UWRK8_B1_UDB09_F1, 0x40006559\r
- 1859                  .set CYDEV_UWRK_UWRK8_B1_UDB10_F1, 0x4000655a\r
- 1860                  .set CYDEV_UWRK_UWRK8_B1_UDB11_F1, 0x4000655b\r
- 1861                  .set CYDEV_UWRK_UWRK8_B1_UDB04_ST, 0x40006564\r
- 1862                  .set CYDEV_UWRK_UWRK8_B1_UDB05_ST, 0x40006565\r
- 1863                  .set CYDEV_UWRK_UWRK8_B1_UDB06_ST, 0x40006566\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 34\r
-\r
-\r
- 1864                  .set CYDEV_UWRK_UWRK8_B1_UDB07_ST, 0x40006567\r
- 1865                  .set CYDEV_UWRK_UWRK8_B1_UDB08_ST, 0x40006568\r
- 1866                  .set CYDEV_UWRK_UWRK8_B1_UDB09_ST, 0x40006569\r
- 1867                  .set CYDEV_UWRK_UWRK8_B1_UDB10_ST, 0x4000656a\r
- 1868                  .set CYDEV_UWRK_UWRK8_B1_UDB11_ST, 0x4000656b\r
- 1869                  .set CYDEV_UWRK_UWRK8_B1_UDB04_CTL, 0x40006574\r
- 1870                  .set CYDEV_UWRK_UWRK8_B1_UDB05_CTL, 0x40006575\r
- 1871                  .set CYDEV_UWRK_UWRK8_B1_UDB06_CTL, 0x40006576\r
- 1872                  .set CYDEV_UWRK_UWRK8_B1_UDB07_CTL, 0x40006577\r
- 1873                  .set CYDEV_UWRK_UWRK8_B1_UDB08_CTL, 0x40006578\r
- 1874                  .set CYDEV_UWRK_UWRK8_B1_UDB09_CTL, 0x40006579\r
- 1875                  .set CYDEV_UWRK_UWRK8_B1_UDB10_CTL, 0x4000657a\r
- 1876                  .set CYDEV_UWRK_UWRK8_B1_UDB11_CTL, 0x4000657b\r
- 1877                  .set CYDEV_UWRK_UWRK8_B1_UDB04_MSK, 0x40006584\r
- 1878                  .set CYDEV_UWRK_UWRK8_B1_UDB05_MSK, 0x40006585\r
- 1879                  .set CYDEV_UWRK_UWRK8_B1_UDB06_MSK, 0x40006586\r
- 1880                  .set CYDEV_UWRK_UWRK8_B1_UDB07_MSK, 0x40006587\r
- 1881                  .set CYDEV_UWRK_UWRK8_B1_UDB08_MSK, 0x40006588\r
- 1882                  .set CYDEV_UWRK_UWRK8_B1_UDB09_MSK, 0x40006589\r
- 1883                  .set CYDEV_UWRK_UWRK8_B1_UDB10_MSK, 0x4000658a\r
- 1884                  .set CYDEV_UWRK_UWRK8_B1_UDB11_MSK, 0x4000658b\r
- 1885                  .set CYDEV_UWRK_UWRK8_B1_UDB04_ACTL, 0x40006594\r
- 1886                  .set CYDEV_UWRK_UWRK8_B1_UDB05_ACTL, 0x40006595\r
- 1887                  .set CYDEV_UWRK_UWRK8_B1_UDB06_ACTL, 0x40006596\r
- 1888                  .set CYDEV_UWRK_UWRK8_B1_UDB07_ACTL, 0x40006597\r
- 1889                  .set CYDEV_UWRK_UWRK8_B1_UDB08_ACTL, 0x40006598\r
- 1890                  .set CYDEV_UWRK_UWRK8_B1_UDB09_ACTL, 0x40006599\r
- 1891                  .set CYDEV_UWRK_UWRK8_B1_UDB10_ACTL, 0x4000659a\r
- 1892                  .set CYDEV_UWRK_UWRK8_B1_UDB11_ACTL, 0x4000659b\r
- 1893                  .set CYDEV_UWRK_UWRK8_B1_UDB04_MC, 0x400065a4\r
- 1894                  .set CYDEV_UWRK_UWRK8_B1_UDB05_MC, 0x400065a5\r
- 1895                  .set CYDEV_UWRK_UWRK8_B1_UDB06_MC, 0x400065a6\r
- 1896                  .set CYDEV_UWRK_UWRK8_B1_UDB07_MC, 0x400065a7\r
- 1897                  .set CYDEV_UWRK_UWRK8_B1_UDB08_MC, 0x400065a8\r
- 1898                  .set CYDEV_UWRK_UWRK8_B1_UDB09_MC, 0x400065a9\r
- 1899                  .set CYDEV_UWRK_UWRK8_B1_UDB10_MC, 0x400065aa\r
- 1900                  .set CYDEV_UWRK_UWRK8_B1_UDB11_MC, 0x400065ab\r
- 1901                  .set CYDEV_UWRK_UWRK16_BASE, 0x40006800\r
- 1902                  .set CYDEV_UWRK_UWRK16_SIZE, 0x00000760\r
- 1903                  .set CYDEV_UWRK_UWRK16_CAT_BASE, 0x40006800\r
- 1904                  .set CYDEV_UWRK_UWRK16_CAT_SIZE, 0x00000760\r
- 1905                  .set CYDEV_UWRK_UWRK16_CAT_B0_BASE, 0x40006800\r
- 1906                  .set CYDEV_UWRK_UWRK16_CAT_B0_SIZE, 0x00000160\r
- 1907                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1, 0x40006800\r
- 1908                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1, 0x40006802\r
- 1909                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1, 0x40006804\r
- 1910                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1, 0x40006806\r
- 1911                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1, 0x40006808\r
- 1912                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1, 0x4000680a\r
- 1913                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1, 0x4000680c\r
- 1914                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1, 0x4000680e\r
- 1915                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1, 0x40006810\r
- 1916                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1, 0x40006812\r
- 1917                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1, 0x40006814\r
- 1918                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1, 0x40006816\r
- 1919                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1, 0x40006818\r
- 1920                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1, 0x4000681a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 35\r
-\r
-\r
- 1921                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1, 0x4000681c\r
- 1922                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1, 0x4000681e\r
- 1923                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1, 0x40006840\r
- 1924                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1, 0x40006842\r
- 1925                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1, 0x40006844\r
- 1926                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1, 0x40006846\r
- 1927                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1, 0x40006848\r
- 1928                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1, 0x4000684a\r
- 1929                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1, 0x4000684c\r
- 1930                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1, 0x4000684e\r
- 1931                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1, 0x40006850\r
- 1932                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1, 0x40006852\r
- 1933                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1, 0x40006854\r
- 1934                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1, 0x40006856\r
- 1935                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1, 0x40006858\r
- 1936                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1, 0x4000685a\r
- 1937                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1, 0x4000685c\r
- 1938                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1, 0x4000685e\r
- 1939                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1, 0x40006880\r
- 1940                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1, 0x40006882\r
- 1941                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1, 0x40006884\r
- 1942                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1, 0x40006886\r
- 1943                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1, 0x40006888\r
- 1944                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1, 0x4000688a\r
- 1945                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1, 0x4000688c\r
- 1946                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1, 0x4000688e\r
- 1947                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1, 0x40006890\r
- 1948                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1, 0x40006892\r
- 1949                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1, 0x40006894\r
- 1950                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1, 0x40006896\r
- 1951                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1, 0x40006898\r
- 1952                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1, 0x4000689a\r
- 1953                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1, 0x4000689c\r
- 1954                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1, 0x4000689e\r
- 1955                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL, 0x400068c0\r
- 1956                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL, 0x400068c2\r
- 1957                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL, 0x400068c4\r
- 1958                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL, 0x400068c6\r
- 1959                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL, 0x400068c8\r
- 1960                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL, 0x400068ca\r
- 1961                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL, 0x400068cc\r
- 1962                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL, 0x400068ce\r
- 1963                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL, 0x400068d0\r
- 1964                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL, 0x400068d2\r
- 1965                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL, 0x400068d4\r
- 1966                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL, 0x400068d6\r
- 1967                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL, 0x400068d8\r
- 1968                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL, 0x400068da\r
- 1969                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL, 0x400068dc\r
- 1970                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL, 0x400068de\r
- 1971                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL, 0x40006900\r
- 1972                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL, 0x40006902\r
- 1973                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL, 0x40006904\r
- 1974                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL, 0x40006906\r
- 1975                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL, 0x40006908\r
- 1976                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL, 0x4000690a\r
- 1977                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL, 0x4000690c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 36\r
-\r
-\r
- 1978                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL, 0x4000690e\r
- 1979                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL, 0x40006910\r
- 1980                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL, 0x40006912\r
- 1981                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL, 0x40006914\r
- 1982                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL, 0x40006916\r
- 1983                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL, 0x40006918\r
- 1984                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL, 0x4000691a\r
- 1985                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL, 0x4000691c\r
- 1986                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL, 0x4000691e\r
- 1987                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00, 0x40006940\r
- 1988                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00, 0x40006942\r
- 1989                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00, 0x40006944\r
- 1990                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00, 0x40006946\r
- 1991                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00, 0x40006948\r
- 1992                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00, 0x4000694a\r
- 1993                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00, 0x4000694c\r
- 1994                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00, 0x4000694e\r
- 1995                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00, 0x40006950\r
- 1996                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00, 0x40006952\r
- 1997                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00, 0x40006954\r
- 1998                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00, 0x40006956\r
- 1999                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00, 0x40006958\r
- 2000                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00, 0x4000695a\r
- 2001                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00, 0x4000695c\r
- 2002                  .set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00, 0x4000695e\r
- 2003                  .set CYDEV_UWRK_UWRK16_CAT_B1_BASE, 0x40006a00\r
- 2004                  .set CYDEV_UWRK_UWRK16_CAT_B1_SIZE, 0x00000160\r
- 2005                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1, 0x40006a08\r
- 2006                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1, 0x40006a0a\r
- 2007                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1, 0x40006a0c\r
- 2008                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1, 0x40006a0e\r
- 2009                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1, 0x40006a10\r
- 2010                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1, 0x40006a12\r
- 2011                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1, 0x40006a14\r
- 2012                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1, 0x40006a16\r
- 2013                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1, 0x40006a48\r
- 2014                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1, 0x40006a4a\r
- 2015                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1, 0x40006a4c\r
- 2016                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1, 0x40006a4e\r
- 2017                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1, 0x40006a50\r
- 2018                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1, 0x40006a52\r
- 2019                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1, 0x40006a54\r
- 2020                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1, 0x40006a56\r
- 2021                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1, 0x40006a88\r
- 2022                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1, 0x40006a8a\r
- 2023                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1, 0x40006a8c\r
- 2024                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1, 0x40006a8e\r
- 2025                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1, 0x40006a90\r
- 2026                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1, 0x40006a92\r
- 2027                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1, 0x40006a94\r
- 2028                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1, 0x40006a96\r
- 2029                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL, 0x40006ac8\r
- 2030                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL, 0x40006aca\r
- 2031                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL, 0x40006acc\r
- 2032                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL, 0x40006ace\r
- 2033                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL, 0x40006ad0\r
- 2034                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL, 0x40006ad2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 37\r
-\r
-\r
- 2035                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL, 0x40006ad4\r
- 2036                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL, 0x40006ad6\r
- 2037                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL, 0x40006b08\r
- 2038                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL, 0x40006b0a\r
- 2039                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL, 0x40006b0c\r
- 2040                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL, 0x40006b0e\r
- 2041                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL, 0x40006b10\r
- 2042                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL, 0x40006b12\r
- 2043                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL, 0x40006b14\r
- 2044                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL, 0x40006b16\r
- 2045                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00, 0x40006b48\r
- 2046                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00, 0x40006b4a\r
- 2047                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00, 0x40006b4c\r
- 2048                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00, 0x40006b4e\r
- 2049                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00, 0x40006b50\r
- 2050                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00, 0x40006b52\r
- 2051                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00, 0x40006b54\r
- 2052                  .set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00, 0x40006b56\r
- 2053                  .set CYDEV_UWRK_UWRK16_DEF_BASE, 0x40006800\r
- 2054                  .set CYDEV_UWRK_UWRK16_DEF_SIZE, 0x0000075e\r
- 2055                  .set CYDEV_UWRK_UWRK16_DEF_B0_BASE, 0x40006800\r
- 2056                  .set CYDEV_UWRK_UWRK16_DEF_B0_SIZE, 0x0000015e\r
- 2057                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0, 0x40006800\r
- 2058                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0, 0x40006802\r
- 2059                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0, 0x40006804\r
- 2060                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0, 0x40006806\r
- 2061                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0, 0x40006808\r
- 2062                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0, 0x4000680a\r
- 2063                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0, 0x4000680c\r
- 2064                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0, 0x4000680e\r
- 2065                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0, 0x40006810\r
- 2066                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0, 0x40006812\r
- 2067                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0, 0x40006814\r
- 2068                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0, 0x40006816\r
- 2069                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0, 0x40006818\r
- 2070                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0, 0x4000681a\r
- 2071                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0, 0x4000681c\r
- 2072                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1, 0x40006820\r
- 2073                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1, 0x40006822\r
- 2074                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1, 0x40006824\r
- 2075                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1, 0x40006826\r
- 2076                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1, 0x40006828\r
- 2077                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1, 0x4000682a\r
- 2078                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1, 0x4000682c\r
- 2079                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1, 0x4000682e\r
- 2080                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1, 0x40006830\r
- 2081                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1, 0x40006832\r
- 2082                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1, 0x40006834\r
- 2083                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1, 0x40006836\r
- 2084                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1, 0x40006838\r
- 2085                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1, 0x4000683a\r
- 2086                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1, 0x4000683c\r
- 2087                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0, 0x40006840\r
- 2088                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0, 0x40006842\r
- 2089                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0, 0x40006844\r
- 2090                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0, 0x40006846\r
- 2091                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0, 0x40006848\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 38\r
-\r
-\r
- 2092                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0, 0x4000684a\r
- 2093                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0, 0x4000684c\r
- 2094                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0, 0x4000684e\r
- 2095                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0, 0x40006850\r
- 2096                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0, 0x40006852\r
- 2097                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0, 0x40006854\r
- 2098                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0, 0x40006856\r
- 2099                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0, 0x40006858\r
- 2100                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0, 0x4000685a\r
- 2101                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0, 0x4000685c\r
- 2102                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1, 0x40006860\r
- 2103                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1, 0x40006862\r
- 2104                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1, 0x40006864\r
- 2105                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1, 0x40006866\r
- 2106                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1, 0x40006868\r
- 2107                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1, 0x4000686a\r
- 2108                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1, 0x4000686c\r
- 2109                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1, 0x4000686e\r
- 2110                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1, 0x40006870\r
- 2111                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1, 0x40006872\r
- 2112                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1, 0x40006874\r
- 2113                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1, 0x40006876\r
- 2114                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1, 0x40006878\r
- 2115                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1, 0x4000687a\r
- 2116                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1, 0x4000687c\r
- 2117                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0, 0x40006880\r
- 2118                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0, 0x40006882\r
- 2119                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0, 0x40006884\r
- 2120                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0, 0x40006886\r
- 2121                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0, 0x40006888\r
- 2122                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0, 0x4000688a\r
- 2123                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0, 0x4000688c\r
- 2124                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0, 0x4000688e\r
- 2125                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0, 0x40006890\r
- 2126                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0, 0x40006892\r
- 2127                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0, 0x40006894\r
- 2128                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0, 0x40006896\r
- 2129                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0, 0x40006898\r
- 2130                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0, 0x4000689a\r
- 2131                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0, 0x4000689c\r
- 2132                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1, 0x400068a0\r
- 2133                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1, 0x400068a2\r
- 2134                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1, 0x400068a4\r
- 2135                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1, 0x400068a6\r
- 2136                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1, 0x400068a8\r
- 2137                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1, 0x400068aa\r
- 2138                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1, 0x400068ac\r
- 2139                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1, 0x400068ae\r
- 2140                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1, 0x400068b0\r
- 2141                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1, 0x400068b2\r
- 2142                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1, 0x400068b4\r
- 2143                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1, 0x400068b6\r
- 2144                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1, 0x400068b8\r
- 2145                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1, 0x400068ba\r
- 2146                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1, 0x400068bc\r
- 2147                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST, 0x400068c0\r
- 2148                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST, 0x400068c2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 39\r
-\r
-\r
- 2149                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST, 0x400068c4\r
- 2150                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST, 0x400068c6\r
- 2151                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST, 0x400068c8\r
- 2152                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST, 0x400068ca\r
- 2153                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST, 0x400068cc\r
- 2154                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST, 0x400068ce\r
- 2155                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST, 0x400068d0\r
- 2156                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST, 0x400068d2\r
- 2157                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST, 0x400068d4\r
- 2158                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST, 0x400068d6\r
- 2159                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST, 0x400068d8\r
- 2160                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST, 0x400068da\r
- 2161                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST, 0x400068dc\r
- 2162                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL, 0x400068e0\r
- 2163                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL, 0x400068e2\r
- 2164                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL, 0x400068e4\r
- 2165                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL, 0x400068e6\r
- 2166                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL, 0x400068e8\r
- 2167                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL, 0x400068ea\r
- 2168                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL, 0x400068ec\r
- 2169                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL, 0x400068ee\r
- 2170                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL, 0x400068f0\r
- 2171                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL, 0x400068f2\r
- 2172                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL, 0x400068f4\r
- 2173                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL, 0x400068f6\r
- 2174                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL, 0x400068f8\r
- 2175                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL, 0x400068fa\r
- 2176                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL, 0x400068fc\r
- 2177                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK, 0x40006900\r
- 2178                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK, 0x40006902\r
- 2179                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK, 0x40006904\r
- 2180                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK, 0x40006906\r
- 2181                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK, 0x40006908\r
- 2182                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK, 0x4000690a\r
- 2183                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK, 0x4000690c\r
- 2184                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK, 0x4000690e\r
- 2185                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK, 0x40006910\r
- 2186                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK, 0x40006912\r
- 2187                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK, 0x40006914\r
- 2188                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK, 0x40006916\r
- 2189                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK, 0x40006918\r
- 2190                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK, 0x4000691a\r
- 2191                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK, 0x4000691c\r
- 2192                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL, 0x40006920\r
- 2193                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL, 0x40006922\r
- 2194                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL, 0x40006924\r
- 2195                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL, 0x40006926\r
- 2196                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL, 0x40006928\r
- 2197                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL, 0x4000692a\r
- 2198                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL, 0x4000692c\r
- 2199                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL, 0x4000692e\r
- 2200                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL, 0x40006930\r
- 2201                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL, 0x40006932\r
- 2202                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL, 0x40006934\r
- 2203                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL, 0x40006936\r
- 2204                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL, 0x40006938\r
- 2205                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL, 0x4000693a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 40\r
-\r
-\r
- 2206                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL, 0x4000693c\r
- 2207                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC, 0x40006940\r
- 2208                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC, 0x40006942\r
- 2209                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC, 0x40006944\r
- 2210                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC, 0x40006946\r
- 2211                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC, 0x40006948\r
- 2212                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC, 0x4000694a\r
- 2213                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC, 0x4000694c\r
- 2214                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC, 0x4000694e\r
- 2215                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC, 0x40006950\r
- 2216                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC, 0x40006952\r
- 2217                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC, 0x40006954\r
- 2218                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC, 0x40006956\r
- 2219                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC, 0x40006958\r
- 2220                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC, 0x4000695a\r
- 2221                  .set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC, 0x4000695c\r
- 2222                  .set CYDEV_UWRK_UWRK16_DEF_B1_BASE, 0x40006a00\r
- 2223                  .set CYDEV_UWRK_UWRK16_DEF_B1_SIZE, 0x0000015e\r
- 2224                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0, 0x40006a08\r
- 2225                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0, 0x40006a0a\r
- 2226                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0, 0x40006a0c\r
- 2227                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0, 0x40006a0e\r
- 2228                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0, 0x40006a10\r
- 2229                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0, 0x40006a12\r
- 2230                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0, 0x40006a14\r
- 2231                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0, 0x40006a16\r
- 2232                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1, 0x40006a28\r
- 2233                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1, 0x40006a2a\r
- 2234                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1, 0x40006a2c\r
- 2235                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1, 0x40006a2e\r
- 2236                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1, 0x40006a30\r
- 2237                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1, 0x40006a32\r
- 2238                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1, 0x40006a34\r
- 2239                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1, 0x40006a36\r
- 2240                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0, 0x40006a48\r
- 2241                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0, 0x40006a4a\r
- 2242                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0, 0x40006a4c\r
- 2243                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0, 0x40006a4e\r
- 2244                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0, 0x40006a50\r
- 2245                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0, 0x40006a52\r
- 2246                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0, 0x40006a54\r
- 2247                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0, 0x40006a56\r
- 2248                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1, 0x40006a68\r
- 2249                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1, 0x40006a6a\r
- 2250                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1, 0x40006a6c\r
- 2251                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1, 0x40006a6e\r
- 2252                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1, 0x40006a70\r
- 2253                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1, 0x40006a72\r
- 2254                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1, 0x40006a74\r
- 2255                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1, 0x40006a76\r
- 2256                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0, 0x40006a88\r
- 2257                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0, 0x40006a8a\r
- 2258                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0, 0x40006a8c\r
- 2259                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0, 0x40006a8e\r
- 2260                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0, 0x40006a90\r
- 2261                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0, 0x40006a92\r
- 2262                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0, 0x40006a94\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 41\r
-\r
-\r
- 2263                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0, 0x40006a96\r
- 2264                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1, 0x40006aa8\r
- 2265                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1, 0x40006aaa\r
- 2266                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1, 0x40006aac\r
- 2267                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1, 0x40006aae\r
- 2268                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1, 0x40006ab0\r
- 2269                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1, 0x40006ab2\r
- 2270                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1, 0x40006ab4\r
- 2271                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1, 0x40006ab6\r
- 2272                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST, 0x40006ac8\r
- 2273                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST, 0x40006aca\r
- 2274                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST, 0x40006acc\r
- 2275                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST, 0x40006ace\r
- 2276                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST, 0x40006ad0\r
- 2277                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST, 0x40006ad2\r
- 2278                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST, 0x40006ad4\r
- 2279                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST, 0x40006ad6\r
- 2280                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL, 0x40006ae8\r
- 2281                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL, 0x40006aea\r
- 2282                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL, 0x40006aec\r
- 2283                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL, 0x40006aee\r
- 2284                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL, 0x40006af0\r
- 2285                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL, 0x40006af2\r
- 2286                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL, 0x40006af4\r
- 2287                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL, 0x40006af6\r
- 2288                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK, 0x40006b08\r
- 2289                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK, 0x40006b0a\r
- 2290                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK, 0x40006b0c\r
- 2291                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK, 0x40006b0e\r
- 2292                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK, 0x40006b10\r
- 2293                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK, 0x40006b12\r
- 2294                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK, 0x40006b14\r
- 2295                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK, 0x40006b16\r
- 2296                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL, 0x40006b28\r
- 2297                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL, 0x40006b2a\r
- 2298                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL, 0x40006b2c\r
- 2299                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL, 0x40006b2e\r
- 2300                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL, 0x40006b30\r
- 2301                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL, 0x40006b32\r
- 2302                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL, 0x40006b34\r
- 2303                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL, 0x40006b36\r
- 2304                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC, 0x40006b48\r
- 2305                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC, 0x40006b4a\r
- 2306                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC, 0x40006b4c\r
- 2307                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC, 0x40006b4e\r
- 2308                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC, 0x40006b50\r
- 2309                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC, 0x40006b52\r
- 2310                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC, 0x40006b54\r
- 2311                  .set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC, 0x40006b56\r
- 2312                  .set CYDEV_PHUB_BASE, 0x40007000\r
- 2313                  .set CYDEV_PHUB_SIZE, 0x00000c00\r
- 2314                  .set CYDEV_PHUB_CFG, 0x40007000\r
- 2315                  .set CYDEV_PHUB_ERR, 0x40007004\r
- 2316                  .set CYDEV_PHUB_ERR_ADR, 0x40007008\r
- 2317                  .set CYDEV_PHUB_CH0_BASE, 0x40007010\r
- 2318                  .set CYDEV_PHUB_CH0_SIZE, 0x0000000c\r
- 2319                  .set CYDEV_PHUB_CH0_BASIC_CFG, 0x40007010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 42\r
-\r
-\r
- 2320                  .set CYDEV_PHUB_CH0_ACTION, 0x40007014\r
- 2321                  .set CYDEV_PHUB_CH0_BASIC_STATUS, 0x40007018\r
- 2322                  .set CYDEV_PHUB_CH1_BASE, 0x40007020\r
- 2323                  .set CYDEV_PHUB_CH1_SIZE, 0x0000000c\r
- 2324                  .set CYDEV_PHUB_CH1_BASIC_CFG, 0x40007020\r
- 2325                  .set CYDEV_PHUB_CH1_ACTION, 0x40007024\r
- 2326                  .set CYDEV_PHUB_CH1_BASIC_STATUS, 0x40007028\r
- 2327                  .set CYDEV_PHUB_CH2_BASE, 0x40007030\r
- 2328                  .set CYDEV_PHUB_CH2_SIZE, 0x0000000c\r
- 2329                  .set CYDEV_PHUB_CH2_BASIC_CFG, 0x40007030\r
- 2330                  .set CYDEV_PHUB_CH2_ACTION, 0x40007034\r
- 2331                  .set CYDEV_PHUB_CH2_BASIC_STATUS, 0x40007038\r
- 2332                  .set CYDEV_PHUB_CH3_BASE, 0x40007040\r
- 2333                  .set CYDEV_PHUB_CH3_SIZE, 0x0000000c\r
- 2334                  .set CYDEV_PHUB_CH3_BASIC_CFG, 0x40007040\r
- 2335                  .set CYDEV_PHUB_CH3_ACTION, 0x40007044\r
- 2336                  .set CYDEV_PHUB_CH3_BASIC_STATUS, 0x40007048\r
- 2337                  .set CYDEV_PHUB_CH4_BASE, 0x40007050\r
- 2338                  .set CYDEV_PHUB_CH4_SIZE, 0x0000000c\r
- 2339                  .set CYDEV_PHUB_CH4_BASIC_CFG, 0x40007050\r
- 2340                  .set CYDEV_PHUB_CH4_ACTION, 0x40007054\r
- 2341                  .set CYDEV_PHUB_CH4_BASIC_STATUS, 0x40007058\r
- 2342                  .set CYDEV_PHUB_CH5_BASE, 0x40007060\r
- 2343                  .set CYDEV_PHUB_CH5_SIZE, 0x0000000c\r
- 2344                  .set CYDEV_PHUB_CH5_BASIC_CFG, 0x40007060\r
- 2345                  .set CYDEV_PHUB_CH5_ACTION, 0x40007064\r
- 2346                  .set CYDEV_PHUB_CH5_BASIC_STATUS, 0x40007068\r
- 2347                  .set CYDEV_PHUB_CH6_BASE, 0x40007070\r
- 2348                  .set CYDEV_PHUB_CH6_SIZE, 0x0000000c\r
- 2349                  .set CYDEV_PHUB_CH6_BASIC_CFG, 0x40007070\r
- 2350                  .set CYDEV_PHUB_CH6_ACTION, 0x40007074\r
- 2351                  .set CYDEV_PHUB_CH6_BASIC_STATUS, 0x40007078\r
- 2352                  .set CYDEV_PHUB_CH7_BASE, 0x40007080\r
- 2353                  .set CYDEV_PHUB_CH7_SIZE, 0x0000000c\r
- 2354                  .set CYDEV_PHUB_CH7_BASIC_CFG, 0x40007080\r
- 2355                  .set CYDEV_PHUB_CH7_ACTION, 0x40007084\r
- 2356                  .set CYDEV_PHUB_CH7_BASIC_STATUS, 0x40007088\r
- 2357                  .set CYDEV_PHUB_CH8_BASE, 0x40007090\r
- 2358                  .set CYDEV_PHUB_CH8_SIZE, 0x0000000c\r
- 2359                  .set CYDEV_PHUB_CH8_BASIC_CFG, 0x40007090\r
- 2360                  .set CYDEV_PHUB_CH8_ACTION, 0x40007094\r
- 2361                  .set CYDEV_PHUB_CH8_BASIC_STATUS, 0x40007098\r
- 2362                  .set CYDEV_PHUB_CH9_BASE, 0x400070a0\r
- 2363                  .set CYDEV_PHUB_CH9_SIZE, 0x0000000c\r
- 2364                  .set CYDEV_PHUB_CH9_BASIC_CFG, 0x400070a0\r
- 2365                  .set CYDEV_PHUB_CH9_ACTION, 0x400070a4\r
- 2366                  .set CYDEV_PHUB_CH9_BASIC_STATUS, 0x400070a8\r
- 2367                  .set CYDEV_PHUB_CH10_BASE, 0x400070b0\r
- 2368                  .set CYDEV_PHUB_CH10_SIZE, 0x0000000c\r
- 2369                  .set CYDEV_PHUB_CH10_BASIC_CFG, 0x400070b0\r
- 2370                  .set CYDEV_PHUB_CH10_ACTION, 0x400070b4\r
- 2371                  .set CYDEV_PHUB_CH10_BASIC_STATUS, 0x400070b8\r
- 2372                  .set CYDEV_PHUB_CH11_BASE, 0x400070c0\r
- 2373                  .set CYDEV_PHUB_CH11_SIZE, 0x0000000c\r
- 2374                  .set CYDEV_PHUB_CH11_BASIC_CFG, 0x400070c0\r
- 2375                  .set CYDEV_PHUB_CH11_ACTION, 0x400070c4\r
- 2376                  .set CYDEV_PHUB_CH11_BASIC_STATUS, 0x400070c8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 43\r
-\r
-\r
- 2377                  .set CYDEV_PHUB_CH12_BASE, 0x400070d0\r
- 2378                  .set CYDEV_PHUB_CH12_SIZE, 0x0000000c\r
- 2379                  .set CYDEV_PHUB_CH12_BASIC_CFG, 0x400070d0\r
- 2380                  .set CYDEV_PHUB_CH12_ACTION, 0x400070d4\r
- 2381                  .set CYDEV_PHUB_CH12_BASIC_STATUS, 0x400070d8\r
- 2382                  .set CYDEV_PHUB_CH13_BASE, 0x400070e0\r
- 2383                  .set CYDEV_PHUB_CH13_SIZE, 0x0000000c\r
- 2384                  .set CYDEV_PHUB_CH13_BASIC_CFG, 0x400070e0\r
- 2385                  .set CYDEV_PHUB_CH13_ACTION, 0x400070e4\r
- 2386                  .set CYDEV_PHUB_CH13_BASIC_STATUS, 0x400070e8\r
- 2387                  .set CYDEV_PHUB_CH14_BASE, 0x400070f0\r
- 2388                  .set CYDEV_PHUB_CH14_SIZE, 0x0000000c\r
- 2389                  .set CYDEV_PHUB_CH14_BASIC_CFG, 0x400070f0\r
- 2390                  .set CYDEV_PHUB_CH14_ACTION, 0x400070f4\r
- 2391                  .set CYDEV_PHUB_CH14_BASIC_STATUS, 0x400070f8\r
- 2392                  .set CYDEV_PHUB_CH15_BASE, 0x40007100\r
- 2393                  .set CYDEV_PHUB_CH15_SIZE, 0x0000000c\r
- 2394                  .set CYDEV_PHUB_CH15_BASIC_CFG, 0x40007100\r
- 2395                  .set CYDEV_PHUB_CH15_ACTION, 0x40007104\r
- 2396                  .set CYDEV_PHUB_CH15_BASIC_STATUS, 0x40007108\r
- 2397                  .set CYDEV_PHUB_CH16_BASE, 0x40007110\r
- 2398                  .set CYDEV_PHUB_CH16_SIZE, 0x0000000c\r
- 2399                  .set CYDEV_PHUB_CH16_BASIC_CFG, 0x40007110\r
- 2400                  .set CYDEV_PHUB_CH16_ACTION, 0x40007114\r
- 2401                  .set CYDEV_PHUB_CH16_BASIC_STATUS, 0x40007118\r
- 2402                  .set CYDEV_PHUB_CH17_BASE, 0x40007120\r
- 2403                  .set CYDEV_PHUB_CH17_SIZE, 0x0000000c\r
- 2404                  .set CYDEV_PHUB_CH17_BASIC_CFG, 0x40007120\r
- 2405                  .set CYDEV_PHUB_CH17_ACTION, 0x40007124\r
- 2406                  .set CYDEV_PHUB_CH17_BASIC_STATUS, 0x40007128\r
- 2407                  .set CYDEV_PHUB_CH18_BASE, 0x40007130\r
- 2408                  .set CYDEV_PHUB_CH18_SIZE, 0x0000000c\r
- 2409                  .set CYDEV_PHUB_CH18_BASIC_CFG, 0x40007130\r
- 2410                  .set CYDEV_PHUB_CH18_ACTION, 0x40007134\r
- 2411                  .set CYDEV_PHUB_CH18_BASIC_STATUS, 0x40007138\r
- 2412                  .set CYDEV_PHUB_CH19_BASE, 0x40007140\r
- 2413                  .set CYDEV_PHUB_CH19_SIZE, 0x0000000c\r
- 2414                  .set CYDEV_PHUB_CH19_BASIC_CFG, 0x40007140\r
- 2415                  .set CYDEV_PHUB_CH19_ACTION, 0x40007144\r
- 2416                  .set CYDEV_PHUB_CH19_BASIC_STATUS, 0x40007148\r
- 2417                  .set CYDEV_PHUB_CH20_BASE, 0x40007150\r
- 2418                  .set CYDEV_PHUB_CH20_SIZE, 0x0000000c\r
- 2419                  .set CYDEV_PHUB_CH20_BASIC_CFG, 0x40007150\r
- 2420                  .set CYDEV_PHUB_CH20_ACTION, 0x40007154\r
- 2421                  .set CYDEV_PHUB_CH20_BASIC_STATUS, 0x40007158\r
- 2422                  .set CYDEV_PHUB_CH21_BASE, 0x40007160\r
- 2423                  .set CYDEV_PHUB_CH21_SIZE, 0x0000000c\r
- 2424                  .set CYDEV_PHUB_CH21_BASIC_CFG, 0x40007160\r
- 2425                  .set CYDEV_PHUB_CH21_ACTION, 0x40007164\r
- 2426                  .set CYDEV_PHUB_CH21_BASIC_STATUS, 0x40007168\r
- 2427                  .set CYDEV_PHUB_CH22_BASE, 0x40007170\r
- 2428                  .set CYDEV_PHUB_CH22_SIZE, 0x0000000c\r
- 2429                  .set CYDEV_PHUB_CH22_BASIC_CFG, 0x40007170\r
- 2430                  .set CYDEV_PHUB_CH22_ACTION, 0x40007174\r
- 2431                  .set CYDEV_PHUB_CH22_BASIC_STATUS, 0x40007178\r
- 2432                  .set CYDEV_PHUB_CH23_BASE, 0x40007180\r
- 2433                  .set CYDEV_PHUB_CH23_SIZE, 0x0000000c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 44\r
-\r
-\r
- 2434                  .set CYDEV_PHUB_CH23_BASIC_CFG, 0x40007180\r
- 2435                  .set CYDEV_PHUB_CH23_ACTION, 0x40007184\r
- 2436                  .set CYDEV_PHUB_CH23_BASIC_STATUS, 0x40007188\r
- 2437                  .set CYDEV_PHUB_CFGMEM0_BASE, 0x40007600\r
- 2438                  .set CYDEV_PHUB_CFGMEM0_SIZE, 0x00000008\r
- 2439                  .set CYDEV_PHUB_CFGMEM0_CFG0, 0x40007600\r
- 2440                  .set CYDEV_PHUB_CFGMEM0_CFG1, 0x40007604\r
- 2441                  .set CYDEV_PHUB_CFGMEM1_BASE, 0x40007608\r
- 2442                  .set CYDEV_PHUB_CFGMEM1_SIZE, 0x00000008\r
- 2443                  .set CYDEV_PHUB_CFGMEM1_CFG0, 0x40007608\r
- 2444                  .set CYDEV_PHUB_CFGMEM1_CFG1, 0x4000760c\r
- 2445                  .set CYDEV_PHUB_CFGMEM2_BASE, 0x40007610\r
- 2446                  .set CYDEV_PHUB_CFGMEM2_SIZE, 0x00000008\r
- 2447                  .set CYDEV_PHUB_CFGMEM2_CFG0, 0x40007610\r
- 2448                  .set CYDEV_PHUB_CFGMEM2_CFG1, 0x40007614\r
- 2449                  .set CYDEV_PHUB_CFGMEM3_BASE, 0x40007618\r
- 2450                  .set CYDEV_PHUB_CFGMEM3_SIZE, 0x00000008\r
- 2451                  .set CYDEV_PHUB_CFGMEM3_CFG0, 0x40007618\r
- 2452                  .set CYDEV_PHUB_CFGMEM3_CFG1, 0x4000761c\r
- 2453                  .set CYDEV_PHUB_CFGMEM4_BASE, 0x40007620\r
- 2454                  .set CYDEV_PHUB_CFGMEM4_SIZE, 0x00000008\r
- 2455                  .set CYDEV_PHUB_CFGMEM4_CFG0, 0x40007620\r
- 2456                  .set CYDEV_PHUB_CFGMEM4_CFG1, 0x40007624\r
- 2457                  .set CYDEV_PHUB_CFGMEM5_BASE, 0x40007628\r
- 2458                  .set CYDEV_PHUB_CFGMEM5_SIZE, 0x00000008\r
- 2459                  .set CYDEV_PHUB_CFGMEM5_CFG0, 0x40007628\r
- 2460                  .set CYDEV_PHUB_CFGMEM5_CFG1, 0x4000762c\r
- 2461                  .set CYDEV_PHUB_CFGMEM6_BASE, 0x40007630\r
- 2462                  .set CYDEV_PHUB_CFGMEM6_SIZE, 0x00000008\r
- 2463                  .set CYDEV_PHUB_CFGMEM6_CFG0, 0x40007630\r
- 2464                  .set CYDEV_PHUB_CFGMEM6_CFG1, 0x40007634\r
- 2465                  .set CYDEV_PHUB_CFGMEM7_BASE, 0x40007638\r
- 2466                  .set CYDEV_PHUB_CFGMEM7_SIZE, 0x00000008\r
- 2467                  .set CYDEV_PHUB_CFGMEM7_CFG0, 0x40007638\r
- 2468                  .set CYDEV_PHUB_CFGMEM7_CFG1, 0x4000763c\r
- 2469                  .set CYDEV_PHUB_CFGMEM8_BASE, 0x40007640\r
- 2470                  .set CYDEV_PHUB_CFGMEM8_SIZE, 0x00000008\r
- 2471                  .set CYDEV_PHUB_CFGMEM8_CFG0, 0x40007640\r
- 2472                  .set CYDEV_PHUB_CFGMEM8_CFG1, 0x40007644\r
- 2473                  .set CYDEV_PHUB_CFGMEM9_BASE, 0x40007648\r
- 2474                  .set CYDEV_PHUB_CFGMEM9_SIZE, 0x00000008\r
- 2475                  .set CYDEV_PHUB_CFGMEM9_CFG0, 0x40007648\r
- 2476                  .set CYDEV_PHUB_CFGMEM9_CFG1, 0x4000764c\r
- 2477                  .set CYDEV_PHUB_CFGMEM10_BASE, 0x40007650\r
- 2478                  .set CYDEV_PHUB_CFGMEM10_SIZE, 0x00000008\r
- 2479                  .set CYDEV_PHUB_CFGMEM10_CFG0, 0x40007650\r
- 2480                  .set CYDEV_PHUB_CFGMEM10_CFG1, 0x40007654\r
- 2481                  .set CYDEV_PHUB_CFGMEM11_BASE, 0x40007658\r
- 2482                  .set CYDEV_PHUB_CFGMEM11_SIZE, 0x00000008\r
- 2483                  .set CYDEV_PHUB_CFGMEM11_CFG0, 0x40007658\r
- 2484                  .set CYDEV_PHUB_CFGMEM11_CFG1, 0x4000765c\r
- 2485                  .set CYDEV_PHUB_CFGMEM12_BASE, 0x40007660\r
- 2486                  .set CYDEV_PHUB_CFGMEM12_SIZE, 0x00000008\r
- 2487                  .set CYDEV_PHUB_CFGMEM12_CFG0, 0x40007660\r
- 2488                  .set CYDEV_PHUB_CFGMEM12_CFG1, 0x40007664\r
- 2489                  .set CYDEV_PHUB_CFGMEM13_BASE, 0x40007668\r
- 2490                  .set CYDEV_PHUB_CFGMEM13_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 45\r
-\r
-\r
- 2491                  .set CYDEV_PHUB_CFGMEM13_CFG0, 0x40007668\r
- 2492                  .set CYDEV_PHUB_CFGMEM13_CFG1, 0x4000766c\r
- 2493                  .set CYDEV_PHUB_CFGMEM14_BASE, 0x40007670\r
- 2494                  .set CYDEV_PHUB_CFGMEM14_SIZE, 0x00000008\r
- 2495                  .set CYDEV_PHUB_CFGMEM14_CFG0, 0x40007670\r
- 2496                  .set CYDEV_PHUB_CFGMEM14_CFG1, 0x40007674\r
- 2497                  .set CYDEV_PHUB_CFGMEM15_BASE, 0x40007678\r
- 2498                  .set CYDEV_PHUB_CFGMEM15_SIZE, 0x00000008\r
- 2499                  .set CYDEV_PHUB_CFGMEM15_CFG0, 0x40007678\r
- 2500                  .set CYDEV_PHUB_CFGMEM15_CFG1, 0x4000767c\r
- 2501                  .set CYDEV_PHUB_CFGMEM16_BASE, 0x40007680\r
- 2502                  .set CYDEV_PHUB_CFGMEM16_SIZE, 0x00000008\r
- 2503                  .set CYDEV_PHUB_CFGMEM16_CFG0, 0x40007680\r
- 2504                  .set CYDEV_PHUB_CFGMEM16_CFG1, 0x40007684\r
- 2505                  .set CYDEV_PHUB_CFGMEM17_BASE, 0x40007688\r
- 2506                  .set CYDEV_PHUB_CFGMEM17_SIZE, 0x00000008\r
- 2507                  .set CYDEV_PHUB_CFGMEM17_CFG0, 0x40007688\r
- 2508                  .set CYDEV_PHUB_CFGMEM17_CFG1, 0x4000768c\r
- 2509                  .set CYDEV_PHUB_CFGMEM18_BASE, 0x40007690\r
- 2510                  .set CYDEV_PHUB_CFGMEM18_SIZE, 0x00000008\r
- 2511                  .set CYDEV_PHUB_CFGMEM18_CFG0, 0x40007690\r
- 2512                  .set CYDEV_PHUB_CFGMEM18_CFG1, 0x40007694\r
- 2513                  .set CYDEV_PHUB_CFGMEM19_BASE, 0x40007698\r
- 2514                  .set CYDEV_PHUB_CFGMEM19_SIZE, 0x00000008\r
- 2515                  .set CYDEV_PHUB_CFGMEM19_CFG0, 0x40007698\r
- 2516                  .set CYDEV_PHUB_CFGMEM19_CFG1, 0x4000769c\r
- 2517                  .set CYDEV_PHUB_CFGMEM20_BASE, 0x400076a0\r
- 2518                  .set CYDEV_PHUB_CFGMEM20_SIZE, 0x00000008\r
- 2519                  .set CYDEV_PHUB_CFGMEM20_CFG0, 0x400076a0\r
- 2520                  .set CYDEV_PHUB_CFGMEM20_CFG1, 0x400076a4\r
- 2521                  .set CYDEV_PHUB_CFGMEM21_BASE, 0x400076a8\r
- 2522                  .set CYDEV_PHUB_CFGMEM21_SIZE, 0x00000008\r
- 2523                  .set CYDEV_PHUB_CFGMEM21_CFG0, 0x400076a8\r
- 2524                  .set CYDEV_PHUB_CFGMEM21_CFG1, 0x400076ac\r
- 2525                  .set CYDEV_PHUB_CFGMEM22_BASE, 0x400076b0\r
- 2526                  .set CYDEV_PHUB_CFGMEM22_SIZE, 0x00000008\r
- 2527                  .set CYDEV_PHUB_CFGMEM22_CFG0, 0x400076b0\r
- 2528                  .set CYDEV_PHUB_CFGMEM22_CFG1, 0x400076b4\r
- 2529                  .set CYDEV_PHUB_CFGMEM23_BASE, 0x400076b8\r
- 2530                  .set CYDEV_PHUB_CFGMEM23_SIZE, 0x00000008\r
- 2531                  .set CYDEV_PHUB_CFGMEM23_CFG0, 0x400076b8\r
- 2532                  .set CYDEV_PHUB_CFGMEM23_CFG1, 0x400076bc\r
- 2533                  .set CYDEV_PHUB_TDMEM0_BASE, 0x40007800\r
- 2534                  .set CYDEV_PHUB_TDMEM0_SIZE, 0x00000008\r
- 2535                  .set CYDEV_PHUB_TDMEM0_ORIG_TD0, 0x40007800\r
- 2536                  .set CYDEV_PHUB_TDMEM0_ORIG_TD1, 0x40007804\r
- 2537                  .set CYDEV_PHUB_TDMEM1_BASE, 0x40007808\r
- 2538                  .set CYDEV_PHUB_TDMEM1_SIZE, 0x00000008\r
- 2539                  .set CYDEV_PHUB_TDMEM1_ORIG_TD0, 0x40007808\r
- 2540                  .set CYDEV_PHUB_TDMEM1_ORIG_TD1, 0x4000780c\r
- 2541                  .set CYDEV_PHUB_TDMEM2_BASE, 0x40007810\r
- 2542                  .set CYDEV_PHUB_TDMEM2_SIZE, 0x00000008\r
- 2543                  .set CYDEV_PHUB_TDMEM2_ORIG_TD0, 0x40007810\r
- 2544                  .set CYDEV_PHUB_TDMEM2_ORIG_TD1, 0x40007814\r
- 2545                  .set CYDEV_PHUB_TDMEM3_BASE, 0x40007818\r
- 2546                  .set CYDEV_PHUB_TDMEM3_SIZE, 0x00000008\r
- 2547                  .set CYDEV_PHUB_TDMEM3_ORIG_TD0, 0x40007818\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 46\r
-\r
-\r
- 2548                  .set CYDEV_PHUB_TDMEM3_ORIG_TD1, 0x4000781c\r
- 2549                  .set CYDEV_PHUB_TDMEM4_BASE, 0x40007820\r
- 2550                  .set CYDEV_PHUB_TDMEM4_SIZE, 0x00000008\r
- 2551                  .set CYDEV_PHUB_TDMEM4_ORIG_TD0, 0x40007820\r
- 2552                  .set CYDEV_PHUB_TDMEM4_ORIG_TD1, 0x40007824\r
- 2553                  .set CYDEV_PHUB_TDMEM5_BASE, 0x40007828\r
- 2554                  .set CYDEV_PHUB_TDMEM5_SIZE, 0x00000008\r
- 2555                  .set CYDEV_PHUB_TDMEM5_ORIG_TD0, 0x40007828\r
- 2556                  .set CYDEV_PHUB_TDMEM5_ORIG_TD1, 0x4000782c\r
- 2557                  .set CYDEV_PHUB_TDMEM6_BASE, 0x40007830\r
- 2558                  .set CYDEV_PHUB_TDMEM6_SIZE, 0x00000008\r
- 2559                  .set CYDEV_PHUB_TDMEM6_ORIG_TD0, 0x40007830\r
- 2560                  .set CYDEV_PHUB_TDMEM6_ORIG_TD1, 0x40007834\r
- 2561                  .set CYDEV_PHUB_TDMEM7_BASE, 0x40007838\r
- 2562                  .set CYDEV_PHUB_TDMEM7_SIZE, 0x00000008\r
- 2563                  .set CYDEV_PHUB_TDMEM7_ORIG_TD0, 0x40007838\r
- 2564                  .set CYDEV_PHUB_TDMEM7_ORIG_TD1, 0x4000783c\r
- 2565                  .set CYDEV_PHUB_TDMEM8_BASE, 0x40007840\r
- 2566                  .set CYDEV_PHUB_TDMEM8_SIZE, 0x00000008\r
- 2567                  .set CYDEV_PHUB_TDMEM8_ORIG_TD0, 0x40007840\r
- 2568                  .set CYDEV_PHUB_TDMEM8_ORIG_TD1, 0x40007844\r
- 2569                  .set CYDEV_PHUB_TDMEM9_BASE, 0x40007848\r
- 2570                  .set CYDEV_PHUB_TDMEM9_SIZE, 0x00000008\r
- 2571                  .set CYDEV_PHUB_TDMEM9_ORIG_TD0, 0x40007848\r
- 2572                  .set CYDEV_PHUB_TDMEM9_ORIG_TD1, 0x4000784c\r
- 2573                  .set CYDEV_PHUB_TDMEM10_BASE, 0x40007850\r
- 2574                  .set CYDEV_PHUB_TDMEM10_SIZE, 0x00000008\r
- 2575                  .set CYDEV_PHUB_TDMEM10_ORIG_TD0, 0x40007850\r
- 2576                  .set CYDEV_PHUB_TDMEM10_ORIG_TD1, 0x40007854\r
- 2577                  .set CYDEV_PHUB_TDMEM11_BASE, 0x40007858\r
- 2578                  .set CYDEV_PHUB_TDMEM11_SIZE, 0x00000008\r
- 2579                  .set CYDEV_PHUB_TDMEM11_ORIG_TD0, 0x40007858\r
- 2580                  .set CYDEV_PHUB_TDMEM11_ORIG_TD1, 0x4000785c\r
- 2581                  .set CYDEV_PHUB_TDMEM12_BASE, 0x40007860\r
- 2582                  .set CYDEV_PHUB_TDMEM12_SIZE, 0x00000008\r
- 2583                  .set CYDEV_PHUB_TDMEM12_ORIG_TD0, 0x40007860\r
- 2584                  .set CYDEV_PHUB_TDMEM12_ORIG_TD1, 0x40007864\r
- 2585                  .set CYDEV_PHUB_TDMEM13_BASE, 0x40007868\r
- 2586                  .set CYDEV_PHUB_TDMEM13_SIZE, 0x00000008\r
- 2587                  .set CYDEV_PHUB_TDMEM13_ORIG_TD0, 0x40007868\r
- 2588                  .set CYDEV_PHUB_TDMEM13_ORIG_TD1, 0x4000786c\r
- 2589                  .set CYDEV_PHUB_TDMEM14_BASE, 0x40007870\r
- 2590                  .set CYDEV_PHUB_TDMEM14_SIZE, 0x00000008\r
- 2591                  .set CYDEV_PHUB_TDMEM14_ORIG_TD0, 0x40007870\r
- 2592                  .set CYDEV_PHUB_TDMEM14_ORIG_TD1, 0x40007874\r
- 2593                  .set CYDEV_PHUB_TDMEM15_BASE, 0x40007878\r
- 2594                  .set CYDEV_PHUB_TDMEM15_SIZE, 0x00000008\r
- 2595                  .set CYDEV_PHUB_TDMEM15_ORIG_TD0, 0x40007878\r
- 2596                  .set CYDEV_PHUB_TDMEM15_ORIG_TD1, 0x4000787c\r
- 2597                  .set CYDEV_PHUB_TDMEM16_BASE, 0x40007880\r
- 2598                  .set CYDEV_PHUB_TDMEM16_SIZE, 0x00000008\r
- 2599                  .set CYDEV_PHUB_TDMEM16_ORIG_TD0, 0x40007880\r
- 2600                  .set CYDEV_PHUB_TDMEM16_ORIG_TD1, 0x40007884\r
- 2601                  .set CYDEV_PHUB_TDMEM17_BASE, 0x40007888\r
- 2602                  .set CYDEV_PHUB_TDMEM17_SIZE, 0x00000008\r
- 2603                  .set CYDEV_PHUB_TDMEM17_ORIG_TD0, 0x40007888\r
- 2604                  .set CYDEV_PHUB_TDMEM17_ORIG_TD1, 0x4000788c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 47\r
-\r
-\r
- 2605                  .set CYDEV_PHUB_TDMEM18_BASE, 0x40007890\r
- 2606                  .set CYDEV_PHUB_TDMEM18_SIZE, 0x00000008\r
- 2607                  .set CYDEV_PHUB_TDMEM18_ORIG_TD0, 0x40007890\r
- 2608                  .set CYDEV_PHUB_TDMEM18_ORIG_TD1, 0x40007894\r
- 2609                  .set CYDEV_PHUB_TDMEM19_BASE, 0x40007898\r
- 2610                  .set CYDEV_PHUB_TDMEM19_SIZE, 0x00000008\r
- 2611                  .set CYDEV_PHUB_TDMEM19_ORIG_TD0, 0x40007898\r
- 2612                  .set CYDEV_PHUB_TDMEM19_ORIG_TD1, 0x4000789c\r
- 2613                  .set CYDEV_PHUB_TDMEM20_BASE, 0x400078a0\r
- 2614                  .set CYDEV_PHUB_TDMEM20_SIZE, 0x00000008\r
- 2615                  .set CYDEV_PHUB_TDMEM20_ORIG_TD0, 0x400078a0\r
- 2616                  .set CYDEV_PHUB_TDMEM20_ORIG_TD1, 0x400078a4\r
- 2617                  .set CYDEV_PHUB_TDMEM21_BASE, 0x400078a8\r
- 2618                  .set CYDEV_PHUB_TDMEM21_SIZE, 0x00000008\r
- 2619                  .set CYDEV_PHUB_TDMEM21_ORIG_TD0, 0x400078a8\r
- 2620                  .set CYDEV_PHUB_TDMEM21_ORIG_TD1, 0x400078ac\r
- 2621                  .set CYDEV_PHUB_TDMEM22_BASE, 0x400078b0\r
- 2622                  .set CYDEV_PHUB_TDMEM22_SIZE, 0x00000008\r
- 2623                  .set CYDEV_PHUB_TDMEM22_ORIG_TD0, 0x400078b0\r
- 2624                  .set CYDEV_PHUB_TDMEM22_ORIG_TD1, 0x400078b4\r
- 2625                  .set CYDEV_PHUB_TDMEM23_BASE, 0x400078b8\r
- 2626                  .set CYDEV_PHUB_TDMEM23_SIZE, 0x00000008\r
- 2627                  .set CYDEV_PHUB_TDMEM23_ORIG_TD0, 0x400078b8\r
- 2628                  .set CYDEV_PHUB_TDMEM23_ORIG_TD1, 0x400078bc\r
- 2629                  .set CYDEV_PHUB_TDMEM24_BASE, 0x400078c0\r
- 2630                  .set CYDEV_PHUB_TDMEM24_SIZE, 0x00000008\r
- 2631                  .set CYDEV_PHUB_TDMEM24_ORIG_TD0, 0x400078c0\r
- 2632                  .set CYDEV_PHUB_TDMEM24_ORIG_TD1, 0x400078c4\r
- 2633                  .set CYDEV_PHUB_TDMEM25_BASE, 0x400078c8\r
- 2634                  .set CYDEV_PHUB_TDMEM25_SIZE, 0x00000008\r
- 2635                  .set CYDEV_PHUB_TDMEM25_ORIG_TD0, 0x400078c8\r
- 2636                  .set CYDEV_PHUB_TDMEM25_ORIG_TD1, 0x400078cc\r
- 2637                  .set CYDEV_PHUB_TDMEM26_BASE, 0x400078d0\r
- 2638                  .set CYDEV_PHUB_TDMEM26_SIZE, 0x00000008\r
- 2639                  .set CYDEV_PHUB_TDMEM26_ORIG_TD0, 0x400078d0\r
- 2640                  .set CYDEV_PHUB_TDMEM26_ORIG_TD1, 0x400078d4\r
- 2641                  .set CYDEV_PHUB_TDMEM27_BASE, 0x400078d8\r
- 2642                  .set CYDEV_PHUB_TDMEM27_SIZE, 0x00000008\r
- 2643                  .set CYDEV_PHUB_TDMEM27_ORIG_TD0, 0x400078d8\r
- 2644                  .set CYDEV_PHUB_TDMEM27_ORIG_TD1, 0x400078dc\r
- 2645                  .set CYDEV_PHUB_TDMEM28_BASE, 0x400078e0\r
- 2646                  .set CYDEV_PHUB_TDMEM28_SIZE, 0x00000008\r
- 2647                  .set CYDEV_PHUB_TDMEM28_ORIG_TD0, 0x400078e0\r
- 2648                  .set CYDEV_PHUB_TDMEM28_ORIG_TD1, 0x400078e4\r
- 2649                  .set CYDEV_PHUB_TDMEM29_BASE, 0x400078e8\r
- 2650                  .set CYDEV_PHUB_TDMEM29_SIZE, 0x00000008\r
- 2651                  .set CYDEV_PHUB_TDMEM29_ORIG_TD0, 0x400078e8\r
- 2652                  .set CYDEV_PHUB_TDMEM29_ORIG_TD1, 0x400078ec\r
- 2653                  .set CYDEV_PHUB_TDMEM30_BASE, 0x400078f0\r
- 2654                  .set CYDEV_PHUB_TDMEM30_SIZE, 0x00000008\r
- 2655                  .set CYDEV_PHUB_TDMEM30_ORIG_TD0, 0x400078f0\r
- 2656                  .set CYDEV_PHUB_TDMEM30_ORIG_TD1, 0x400078f4\r
- 2657                  .set CYDEV_PHUB_TDMEM31_BASE, 0x400078f8\r
- 2658                  .set CYDEV_PHUB_TDMEM31_SIZE, 0x00000008\r
- 2659                  .set CYDEV_PHUB_TDMEM31_ORIG_TD0, 0x400078f8\r
- 2660                  .set CYDEV_PHUB_TDMEM31_ORIG_TD1, 0x400078fc\r
- 2661                  .set CYDEV_PHUB_TDMEM32_BASE, 0x40007900\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 48\r
-\r
-\r
- 2662                  .set CYDEV_PHUB_TDMEM32_SIZE, 0x00000008\r
- 2663                  .set CYDEV_PHUB_TDMEM32_ORIG_TD0, 0x40007900\r
- 2664                  .set CYDEV_PHUB_TDMEM32_ORIG_TD1, 0x40007904\r
- 2665                  .set CYDEV_PHUB_TDMEM33_BASE, 0x40007908\r
- 2666                  .set CYDEV_PHUB_TDMEM33_SIZE, 0x00000008\r
- 2667                  .set CYDEV_PHUB_TDMEM33_ORIG_TD0, 0x40007908\r
- 2668                  .set CYDEV_PHUB_TDMEM33_ORIG_TD1, 0x4000790c\r
- 2669                  .set CYDEV_PHUB_TDMEM34_BASE, 0x40007910\r
- 2670                  .set CYDEV_PHUB_TDMEM34_SIZE, 0x00000008\r
- 2671                  .set CYDEV_PHUB_TDMEM34_ORIG_TD0, 0x40007910\r
- 2672                  .set CYDEV_PHUB_TDMEM34_ORIG_TD1, 0x40007914\r
- 2673                  .set CYDEV_PHUB_TDMEM35_BASE, 0x40007918\r
- 2674                  .set CYDEV_PHUB_TDMEM35_SIZE, 0x00000008\r
- 2675                  .set CYDEV_PHUB_TDMEM35_ORIG_TD0, 0x40007918\r
- 2676                  .set CYDEV_PHUB_TDMEM35_ORIG_TD1, 0x4000791c\r
- 2677                  .set CYDEV_PHUB_TDMEM36_BASE, 0x40007920\r
- 2678                  .set CYDEV_PHUB_TDMEM36_SIZE, 0x00000008\r
- 2679                  .set CYDEV_PHUB_TDMEM36_ORIG_TD0, 0x40007920\r
- 2680                  .set CYDEV_PHUB_TDMEM36_ORIG_TD1, 0x40007924\r
- 2681                  .set CYDEV_PHUB_TDMEM37_BASE, 0x40007928\r
- 2682                  .set CYDEV_PHUB_TDMEM37_SIZE, 0x00000008\r
- 2683                  .set CYDEV_PHUB_TDMEM37_ORIG_TD0, 0x40007928\r
- 2684                  .set CYDEV_PHUB_TDMEM37_ORIG_TD1, 0x4000792c\r
- 2685                  .set CYDEV_PHUB_TDMEM38_BASE, 0x40007930\r
- 2686                  .set CYDEV_PHUB_TDMEM38_SIZE, 0x00000008\r
- 2687                  .set CYDEV_PHUB_TDMEM38_ORIG_TD0, 0x40007930\r
- 2688                  .set CYDEV_PHUB_TDMEM38_ORIG_TD1, 0x40007934\r
- 2689                  .set CYDEV_PHUB_TDMEM39_BASE, 0x40007938\r
- 2690                  .set CYDEV_PHUB_TDMEM39_SIZE, 0x00000008\r
- 2691                  .set CYDEV_PHUB_TDMEM39_ORIG_TD0, 0x40007938\r
- 2692                  .set CYDEV_PHUB_TDMEM39_ORIG_TD1, 0x4000793c\r
- 2693                  .set CYDEV_PHUB_TDMEM40_BASE, 0x40007940\r
- 2694                  .set CYDEV_PHUB_TDMEM40_SIZE, 0x00000008\r
- 2695                  .set CYDEV_PHUB_TDMEM40_ORIG_TD0, 0x40007940\r
- 2696                  .set CYDEV_PHUB_TDMEM40_ORIG_TD1, 0x40007944\r
- 2697                  .set CYDEV_PHUB_TDMEM41_BASE, 0x40007948\r
- 2698                  .set CYDEV_PHUB_TDMEM41_SIZE, 0x00000008\r
- 2699                  .set CYDEV_PHUB_TDMEM41_ORIG_TD0, 0x40007948\r
- 2700                  .set CYDEV_PHUB_TDMEM41_ORIG_TD1, 0x4000794c\r
- 2701                  .set CYDEV_PHUB_TDMEM42_BASE, 0x40007950\r
- 2702                  .set CYDEV_PHUB_TDMEM42_SIZE, 0x00000008\r
- 2703                  .set CYDEV_PHUB_TDMEM42_ORIG_TD0, 0x40007950\r
- 2704                  .set CYDEV_PHUB_TDMEM42_ORIG_TD1, 0x40007954\r
- 2705                  .set CYDEV_PHUB_TDMEM43_BASE, 0x40007958\r
- 2706                  .set CYDEV_PHUB_TDMEM43_SIZE, 0x00000008\r
- 2707                  .set CYDEV_PHUB_TDMEM43_ORIG_TD0, 0x40007958\r
- 2708                  .set CYDEV_PHUB_TDMEM43_ORIG_TD1, 0x4000795c\r
- 2709                  .set CYDEV_PHUB_TDMEM44_BASE, 0x40007960\r
- 2710                  .set CYDEV_PHUB_TDMEM44_SIZE, 0x00000008\r
- 2711                  .set CYDEV_PHUB_TDMEM44_ORIG_TD0, 0x40007960\r
- 2712                  .set CYDEV_PHUB_TDMEM44_ORIG_TD1, 0x40007964\r
- 2713                  .set CYDEV_PHUB_TDMEM45_BASE, 0x40007968\r
- 2714                  .set CYDEV_PHUB_TDMEM45_SIZE, 0x00000008\r
- 2715                  .set CYDEV_PHUB_TDMEM45_ORIG_TD0, 0x40007968\r
- 2716                  .set CYDEV_PHUB_TDMEM45_ORIG_TD1, 0x4000796c\r
- 2717                  .set CYDEV_PHUB_TDMEM46_BASE, 0x40007970\r
- 2718                  .set CYDEV_PHUB_TDMEM46_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 49\r
-\r
-\r
- 2719                  .set CYDEV_PHUB_TDMEM46_ORIG_TD0, 0x40007970\r
- 2720                  .set CYDEV_PHUB_TDMEM46_ORIG_TD1, 0x40007974\r
- 2721                  .set CYDEV_PHUB_TDMEM47_BASE, 0x40007978\r
- 2722                  .set CYDEV_PHUB_TDMEM47_SIZE, 0x00000008\r
- 2723                  .set CYDEV_PHUB_TDMEM47_ORIG_TD0, 0x40007978\r
- 2724                  .set CYDEV_PHUB_TDMEM47_ORIG_TD1, 0x4000797c\r
- 2725                  .set CYDEV_PHUB_TDMEM48_BASE, 0x40007980\r
- 2726                  .set CYDEV_PHUB_TDMEM48_SIZE, 0x00000008\r
- 2727                  .set CYDEV_PHUB_TDMEM48_ORIG_TD0, 0x40007980\r
- 2728                  .set CYDEV_PHUB_TDMEM48_ORIG_TD1, 0x40007984\r
- 2729                  .set CYDEV_PHUB_TDMEM49_BASE, 0x40007988\r
- 2730                  .set CYDEV_PHUB_TDMEM49_SIZE, 0x00000008\r
- 2731                  .set CYDEV_PHUB_TDMEM49_ORIG_TD0, 0x40007988\r
- 2732                  .set CYDEV_PHUB_TDMEM49_ORIG_TD1, 0x4000798c\r
- 2733                  .set CYDEV_PHUB_TDMEM50_BASE, 0x40007990\r
- 2734                  .set CYDEV_PHUB_TDMEM50_SIZE, 0x00000008\r
- 2735                  .set CYDEV_PHUB_TDMEM50_ORIG_TD0, 0x40007990\r
- 2736                  .set CYDEV_PHUB_TDMEM50_ORIG_TD1, 0x40007994\r
- 2737                  .set CYDEV_PHUB_TDMEM51_BASE, 0x40007998\r
- 2738                  .set CYDEV_PHUB_TDMEM51_SIZE, 0x00000008\r
- 2739                  .set CYDEV_PHUB_TDMEM51_ORIG_TD0, 0x40007998\r
- 2740                  .set CYDEV_PHUB_TDMEM51_ORIG_TD1, 0x4000799c\r
- 2741                  .set CYDEV_PHUB_TDMEM52_BASE, 0x400079a0\r
- 2742                  .set CYDEV_PHUB_TDMEM52_SIZE, 0x00000008\r
- 2743                  .set CYDEV_PHUB_TDMEM52_ORIG_TD0, 0x400079a0\r
- 2744                  .set CYDEV_PHUB_TDMEM52_ORIG_TD1, 0x400079a4\r
- 2745                  .set CYDEV_PHUB_TDMEM53_BASE, 0x400079a8\r
- 2746                  .set CYDEV_PHUB_TDMEM53_SIZE, 0x00000008\r
- 2747                  .set CYDEV_PHUB_TDMEM53_ORIG_TD0, 0x400079a8\r
- 2748                  .set CYDEV_PHUB_TDMEM53_ORIG_TD1, 0x400079ac\r
- 2749                  .set CYDEV_PHUB_TDMEM54_BASE, 0x400079b0\r
- 2750                  .set CYDEV_PHUB_TDMEM54_SIZE, 0x00000008\r
- 2751                  .set CYDEV_PHUB_TDMEM54_ORIG_TD0, 0x400079b0\r
- 2752                  .set CYDEV_PHUB_TDMEM54_ORIG_TD1, 0x400079b4\r
- 2753                  .set CYDEV_PHUB_TDMEM55_BASE, 0x400079b8\r
- 2754                  .set CYDEV_PHUB_TDMEM55_SIZE, 0x00000008\r
- 2755                  .set CYDEV_PHUB_TDMEM55_ORIG_TD0, 0x400079b8\r
- 2756                  .set CYDEV_PHUB_TDMEM55_ORIG_TD1, 0x400079bc\r
- 2757                  .set CYDEV_PHUB_TDMEM56_BASE, 0x400079c0\r
- 2758                  .set CYDEV_PHUB_TDMEM56_SIZE, 0x00000008\r
- 2759                  .set CYDEV_PHUB_TDMEM56_ORIG_TD0, 0x400079c0\r
- 2760                  .set CYDEV_PHUB_TDMEM56_ORIG_TD1, 0x400079c4\r
- 2761                  .set CYDEV_PHUB_TDMEM57_BASE, 0x400079c8\r
- 2762                  .set CYDEV_PHUB_TDMEM57_SIZE, 0x00000008\r
- 2763                  .set CYDEV_PHUB_TDMEM57_ORIG_TD0, 0x400079c8\r
- 2764                  .set CYDEV_PHUB_TDMEM57_ORIG_TD1, 0x400079cc\r
- 2765                  .set CYDEV_PHUB_TDMEM58_BASE, 0x400079d0\r
- 2766                  .set CYDEV_PHUB_TDMEM58_SIZE, 0x00000008\r
- 2767                  .set CYDEV_PHUB_TDMEM58_ORIG_TD0, 0x400079d0\r
- 2768                  .set CYDEV_PHUB_TDMEM58_ORIG_TD1, 0x400079d4\r
- 2769                  .set CYDEV_PHUB_TDMEM59_BASE, 0x400079d8\r
- 2770                  .set CYDEV_PHUB_TDMEM59_SIZE, 0x00000008\r
- 2771                  .set CYDEV_PHUB_TDMEM59_ORIG_TD0, 0x400079d8\r
- 2772                  .set CYDEV_PHUB_TDMEM59_ORIG_TD1, 0x400079dc\r
- 2773                  .set CYDEV_PHUB_TDMEM60_BASE, 0x400079e0\r
- 2774                  .set CYDEV_PHUB_TDMEM60_SIZE, 0x00000008\r
- 2775                  .set CYDEV_PHUB_TDMEM60_ORIG_TD0, 0x400079e0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 50\r
-\r
-\r
- 2776                  .set CYDEV_PHUB_TDMEM60_ORIG_TD1, 0x400079e4\r
- 2777                  .set CYDEV_PHUB_TDMEM61_BASE, 0x400079e8\r
- 2778                  .set CYDEV_PHUB_TDMEM61_SIZE, 0x00000008\r
- 2779                  .set CYDEV_PHUB_TDMEM61_ORIG_TD0, 0x400079e8\r
- 2780                  .set CYDEV_PHUB_TDMEM61_ORIG_TD1, 0x400079ec\r
- 2781                  .set CYDEV_PHUB_TDMEM62_BASE, 0x400079f0\r
- 2782                  .set CYDEV_PHUB_TDMEM62_SIZE, 0x00000008\r
- 2783                  .set CYDEV_PHUB_TDMEM62_ORIG_TD0, 0x400079f0\r
- 2784                  .set CYDEV_PHUB_TDMEM62_ORIG_TD1, 0x400079f4\r
- 2785                  .set CYDEV_PHUB_TDMEM63_BASE, 0x400079f8\r
- 2786                  .set CYDEV_PHUB_TDMEM63_SIZE, 0x00000008\r
- 2787                  .set CYDEV_PHUB_TDMEM63_ORIG_TD0, 0x400079f8\r
- 2788                  .set CYDEV_PHUB_TDMEM63_ORIG_TD1, 0x400079fc\r
- 2789                  .set CYDEV_PHUB_TDMEM64_BASE, 0x40007a00\r
- 2790                  .set CYDEV_PHUB_TDMEM64_SIZE, 0x00000008\r
- 2791                  .set CYDEV_PHUB_TDMEM64_ORIG_TD0, 0x40007a00\r
- 2792                  .set CYDEV_PHUB_TDMEM64_ORIG_TD1, 0x40007a04\r
- 2793                  .set CYDEV_PHUB_TDMEM65_BASE, 0x40007a08\r
- 2794                  .set CYDEV_PHUB_TDMEM65_SIZE, 0x00000008\r
- 2795                  .set CYDEV_PHUB_TDMEM65_ORIG_TD0, 0x40007a08\r
- 2796                  .set CYDEV_PHUB_TDMEM65_ORIG_TD1, 0x40007a0c\r
- 2797                  .set CYDEV_PHUB_TDMEM66_BASE, 0x40007a10\r
- 2798                  .set CYDEV_PHUB_TDMEM66_SIZE, 0x00000008\r
- 2799                  .set CYDEV_PHUB_TDMEM66_ORIG_TD0, 0x40007a10\r
- 2800                  .set CYDEV_PHUB_TDMEM66_ORIG_TD1, 0x40007a14\r
- 2801                  .set CYDEV_PHUB_TDMEM67_BASE, 0x40007a18\r
- 2802                  .set CYDEV_PHUB_TDMEM67_SIZE, 0x00000008\r
- 2803                  .set CYDEV_PHUB_TDMEM67_ORIG_TD0, 0x40007a18\r
- 2804                  .set CYDEV_PHUB_TDMEM67_ORIG_TD1, 0x40007a1c\r
- 2805                  .set CYDEV_PHUB_TDMEM68_BASE, 0x40007a20\r
- 2806                  .set CYDEV_PHUB_TDMEM68_SIZE, 0x00000008\r
- 2807                  .set CYDEV_PHUB_TDMEM68_ORIG_TD0, 0x40007a20\r
- 2808                  .set CYDEV_PHUB_TDMEM68_ORIG_TD1, 0x40007a24\r
- 2809                  .set CYDEV_PHUB_TDMEM69_BASE, 0x40007a28\r
- 2810                  .set CYDEV_PHUB_TDMEM69_SIZE, 0x00000008\r
- 2811                  .set CYDEV_PHUB_TDMEM69_ORIG_TD0, 0x40007a28\r
- 2812                  .set CYDEV_PHUB_TDMEM69_ORIG_TD1, 0x40007a2c\r
- 2813                  .set CYDEV_PHUB_TDMEM70_BASE, 0x40007a30\r
- 2814                  .set CYDEV_PHUB_TDMEM70_SIZE, 0x00000008\r
- 2815                  .set CYDEV_PHUB_TDMEM70_ORIG_TD0, 0x40007a30\r
- 2816                  .set CYDEV_PHUB_TDMEM70_ORIG_TD1, 0x40007a34\r
- 2817                  .set CYDEV_PHUB_TDMEM71_BASE, 0x40007a38\r
- 2818                  .set CYDEV_PHUB_TDMEM71_SIZE, 0x00000008\r
- 2819                  .set CYDEV_PHUB_TDMEM71_ORIG_TD0, 0x40007a38\r
- 2820                  .set CYDEV_PHUB_TDMEM71_ORIG_TD1, 0x40007a3c\r
- 2821                  .set CYDEV_PHUB_TDMEM72_BASE, 0x40007a40\r
- 2822                  .set CYDEV_PHUB_TDMEM72_SIZE, 0x00000008\r
- 2823                  .set CYDEV_PHUB_TDMEM72_ORIG_TD0, 0x40007a40\r
- 2824                  .set CYDEV_PHUB_TDMEM72_ORIG_TD1, 0x40007a44\r
- 2825                  .set CYDEV_PHUB_TDMEM73_BASE, 0x40007a48\r
- 2826                  .set CYDEV_PHUB_TDMEM73_SIZE, 0x00000008\r
- 2827                  .set CYDEV_PHUB_TDMEM73_ORIG_TD0, 0x40007a48\r
- 2828                  .set CYDEV_PHUB_TDMEM73_ORIG_TD1, 0x40007a4c\r
- 2829                  .set CYDEV_PHUB_TDMEM74_BASE, 0x40007a50\r
- 2830                  .set CYDEV_PHUB_TDMEM74_SIZE, 0x00000008\r
- 2831                  .set CYDEV_PHUB_TDMEM74_ORIG_TD0, 0x40007a50\r
- 2832                  .set CYDEV_PHUB_TDMEM74_ORIG_TD1, 0x40007a54\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 51\r
-\r
-\r
- 2833                  .set CYDEV_PHUB_TDMEM75_BASE, 0x40007a58\r
- 2834                  .set CYDEV_PHUB_TDMEM75_SIZE, 0x00000008\r
- 2835                  .set CYDEV_PHUB_TDMEM75_ORIG_TD0, 0x40007a58\r
- 2836                  .set CYDEV_PHUB_TDMEM75_ORIG_TD1, 0x40007a5c\r
- 2837                  .set CYDEV_PHUB_TDMEM76_BASE, 0x40007a60\r
- 2838                  .set CYDEV_PHUB_TDMEM76_SIZE, 0x00000008\r
- 2839                  .set CYDEV_PHUB_TDMEM76_ORIG_TD0, 0x40007a60\r
- 2840                  .set CYDEV_PHUB_TDMEM76_ORIG_TD1, 0x40007a64\r
- 2841                  .set CYDEV_PHUB_TDMEM77_BASE, 0x40007a68\r
- 2842                  .set CYDEV_PHUB_TDMEM77_SIZE, 0x00000008\r
- 2843                  .set CYDEV_PHUB_TDMEM77_ORIG_TD0, 0x40007a68\r
- 2844                  .set CYDEV_PHUB_TDMEM77_ORIG_TD1, 0x40007a6c\r
- 2845                  .set CYDEV_PHUB_TDMEM78_BASE, 0x40007a70\r
- 2846                  .set CYDEV_PHUB_TDMEM78_SIZE, 0x00000008\r
- 2847                  .set CYDEV_PHUB_TDMEM78_ORIG_TD0, 0x40007a70\r
- 2848                  .set CYDEV_PHUB_TDMEM78_ORIG_TD1, 0x40007a74\r
- 2849                  .set CYDEV_PHUB_TDMEM79_BASE, 0x40007a78\r
- 2850                  .set CYDEV_PHUB_TDMEM79_SIZE, 0x00000008\r
- 2851                  .set CYDEV_PHUB_TDMEM79_ORIG_TD0, 0x40007a78\r
- 2852                  .set CYDEV_PHUB_TDMEM79_ORIG_TD1, 0x40007a7c\r
- 2853                  .set CYDEV_PHUB_TDMEM80_BASE, 0x40007a80\r
- 2854                  .set CYDEV_PHUB_TDMEM80_SIZE, 0x00000008\r
- 2855                  .set CYDEV_PHUB_TDMEM80_ORIG_TD0, 0x40007a80\r
- 2856                  .set CYDEV_PHUB_TDMEM80_ORIG_TD1, 0x40007a84\r
- 2857                  .set CYDEV_PHUB_TDMEM81_BASE, 0x40007a88\r
- 2858                  .set CYDEV_PHUB_TDMEM81_SIZE, 0x00000008\r
- 2859                  .set CYDEV_PHUB_TDMEM81_ORIG_TD0, 0x40007a88\r
- 2860                  .set CYDEV_PHUB_TDMEM81_ORIG_TD1, 0x40007a8c\r
- 2861                  .set CYDEV_PHUB_TDMEM82_BASE, 0x40007a90\r
- 2862                  .set CYDEV_PHUB_TDMEM82_SIZE, 0x00000008\r
- 2863                  .set CYDEV_PHUB_TDMEM82_ORIG_TD0, 0x40007a90\r
- 2864                  .set CYDEV_PHUB_TDMEM82_ORIG_TD1, 0x40007a94\r
- 2865                  .set CYDEV_PHUB_TDMEM83_BASE, 0x40007a98\r
- 2866                  .set CYDEV_PHUB_TDMEM83_SIZE, 0x00000008\r
- 2867                  .set CYDEV_PHUB_TDMEM83_ORIG_TD0, 0x40007a98\r
- 2868                  .set CYDEV_PHUB_TDMEM83_ORIG_TD1, 0x40007a9c\r
- 2869                  .set CYDEV_PHUB_TDMEM84_BASE, 0x40007aa0\r
- 2870                  .set CYDEV_PHUB_TDMEM84_SIZE, 0x00000008\r
- 2871                  .set CYDEV_PHUB_TDMEM84_ORIG_TD0, 0x40007aa0\r
- 2872                  .set CYDEV_PHUB_TDMEM84_ORIG_TD1, 0x40007aa4\r
- 2873                  .set CYDEV_PHUB_TDMEM85_BASE, 0x40007aa8\r
- 2874                  .set CYDEV_PHUB_TDMEM85_SIZE, 0x00000008\r
- 2875                  .set CYDEV_PHUB_TDMEM85_ORIG_TD0, 0x40007aa8\r
- 2876                  .set CYDEV_PHUB_TDMEM85_ORIG_TD1, 0x40007aac\r
- 2877                  .set CYDEV_PHUB_TDMEM86_BASE, 0x40007ab0\r
- 2878                  .set CYDEV_PHUB_TDMEM86_SIZE, 0x00000008\r
- 2879                  .set CYDEV_PHUB_TDMEM86_ORIG_TD0, 0x40007ab0\r
- 2880                  .set CYDEV_PHUB_TDMEM86_ORIG_TD1, 0x40007ab4\r
- 2881                  .set CYDEV_PHUB_TDMEM87_BASE, 0x40007ab8\r
- 2882                  .set CYDEV_PHUB_TDMEM87_SIZE, 0x00000008\r
- 2883                  .set CYDEV_PHUB_TDMEM87_ORIG_TD0, 0x40007ab8\r
- 2884                  .set CYDEV_PHUB_TDMEM87_ORIG_TD1, 0x40007abc\r
- 2885                  .set CYDEV_PHUB_TDMEM88_BASE, 0x40007ac0\r
- 2886                  .set CYDEV_PHUB_TDMEM88_SIZE, 0x00000008\r
- 2887                  .set CYDEV_PHUB_TDMEM88_ORIG_TD0, 0x40007ac0\r
- 2888                  .set CYDEV_PHUB_TDMEM88_ORIG_TD1, 0x40007ac4\r
- 2889                  .set CYDEV_PHUB_TDMEM89_BASE, 0x40007ac8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 52\r
-\r
-\r
- 2890                  .set CYDEV_PHUB_TDMEM89_SIZE, 0x00000008\r
- 2891                  .set CYDEV_PHUB_TDMEM89_ORIG_TD0, 0x40007ac8\r
- 2892                  .set CYDEV_PHUB_TDMEM89_ORIG_TD1, 0x40007acc\r
- 2893                  .set CYDEV_PHUB_TDMEM90_BASE, 0x40007ad0\r
- 2894                  .set CYDEV_PHUB_TDMEM90_SIZE, 0x00000008\r
- 2895                  .set CYDEV_PHUB_TDMEM90_ORIG_TD0, 0x40007ad0\r
- 2896                  .set CYDEV_PHUB_TDMEM90_ORIG_TD1, 0x40007ad4\r
- 2897                  .set CYDEV_PHUB_TDMEM91_BASE, 0x40007ad8\r
- 2898                  .set CYDEV_PHUB_TDMEM91_SIZE, 0x00000008\r
- 2899                  .set CYDEV_PHUB_TDMEM91_ORIG_TD0, 0x40007ad8\r
- 2900                  .set CYDEV_PHUB_TDMEM91_ORIG_TD1, 0x40007adc\r
- 2901                  .set CYDEV_PHUB_TDMEM92_BASE, 0x40007ae0\r
- 2902                  .set CYDEV_PHUB_TDMEM92_SIZE, 0x00000008\r
- 2903                  .set CYDEV_PHUB_TDMEM92_ORIG_TD0, 0x40007ae0\r
- 2904                  .set CYDEV_PHUB_TDMEM92_ORIG_TD1, 0x40007ae4\r
- 2905                  .set CYDEV_PHUB_TDMEM93_BASE, 0x40007ae8\r
- 2906                  .set CYDEV_PHUB_TDMEM93_SIZE, 0x00000008\r
- 2907                  .set CYDEV_PHUB_TDMEM93_ORIG_TD0, 0x40007ae8\r
- 2908                  .set CYDEV_PHUB_TDMEM93_ORIG_TD1, 0x40007aec\r
- 2909                  .set CYDEV_PHUB_TDMEM94_BASE, 0x40007af0\r
- 2910                  .set CYDEV_PHUB_TDMEM94_SIZE, 0x00000008\r
- 2911                  .set CYDEV_PHUB_TDMEM94_ORIG_TD0, 0x40007af0\r
- 2912                  .set CYDEV_PHUB_TDMEM94_ORIG_TD1, 0x40007af4\r
- 2913                  .set CYDEV_PHUB_TDMEM95_BASE, 0x40007af8\r
- 2914                  .set CYDEV_PHUB_TDMEM95_SIZE, 0x00000008\r
- 2915                  .set CYDEV_PHUB_TDMEM95_ORIG_TD0, 0x40007af8\r
- 2916                  .set CYDEV_PHUB_TDMEM95_ORIG_TD1, 0x40007afc\r
- 2917                  .set CYDEV_PHUB_TDMEM96_BASE, 0x40007b00\r
- 2918                  .set CYDEV_PHUB_TDMEM96_SIZE, 0x00000008\r
- 2919                  .set CYDEV_PHUB_TDMEM96_ORIG_TD0, 0x40007b00\r
- 2920                  .set CYDEV_PHUB_TDMEM96_ORIG_TD1, 0x40007b04\r
- 2921                  .set CYDEV_PHUB_TDMEM97_BASE, 0x40007b08\r
- 2922                  .set CYDEV_PHUB_TDMEM97_SIZE, 0x00000008\r
- 2923                  .set CYDEV_PHUB_TDMEM97_ORIG_TD0, 0x40007b08\r
- 2924                  .set CYDEV_PHUB_TDMEM97_ORIG_TD1, 0x40007b0c\r
- 2925                  .set CYDEV_PHUB_TDMEM98_BASE, 0x40007b10\r
- 2926                  .set CYDEV_PHUB_TDMEM98_SIZE, 0x00000008\r
- 2927                  .set CYDEV_PHUB_TDMEM98_ORIG_TD0, 0x40007b10\r
- 2928                  .set CYDEV_PHUB_TDMEM98_ORIG_TD1, 0x40007b14\r
- 2929                  .set CYDEV_PHUB_TDMEM99_BASE, 0x40007b18\r
- 2930                  .set CYDEV_PHUB_TDMEM99_SIZE, 0x00000008\r
- 2931                  .set CYDEV_PHUB_TDMEM99_ORIG_TD0, 0x40007b18\r
- 2932                  .set CYDEV_PHUB_TDMEM99_ORIG_TD1, 0x40007b1c\r
- 2933                  .set CYDEV_PHUB_TDMEM100_BASE, 0x40007b20\r
- 2934                  .set CYDEV_PHUB_TDMEM100_SIZE, 0x00000008\r
- 2935                  .set CYDEV_PHUB_TDMEM100_ORIG_TD0, 0x40007b20\r
- 2936                  .set CYDEV_PHUB_TDMEM100_ORIG_TD1, 0x40007b24\r
- 2937                  .set CYDEV_PHUB_TDMEM101_BASE, 0x40007b28\r
- 2938                  .set CYDEV_PHUB_TDMEM101_SIZE, 0x00000008\r
- 2939                  .set CYDEV_PHUB_TDMEM101_ORIG_TD0, 0x40007b28\r
- 2940                  .set CYDEV_PHUB_TDMEM101_ORIG_TD1, 0x40007b2c\r
- 2941                  .set CYDEV_PHUB_TDMEM102_BASE, 0x40007b30\r
- 2942                  .set CYDEV_PHUB_TDMEM102_SIZE, 0x00000008\r
- 2943                  .set CYDEV_PHUB_TDMEM102_ORIG_TD0, 0x40007b30\r
- 2944                  .set CYDEV_PHUB_TDMEM102_ORIG_TD1, 0x40007b34\r
- 2945                  .set CYDEV_PHUB_TDMEM103_BASE, 0x40007b38\r
- 2946                  .set CYDEV_PHUB_TDMEM103_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 53\r
-\r
-\r
- 2947                  .set CYDEV_PHUB_TDMEM103_ORIG_TD0, 0x40007b38\r
- 2948                  .set CYDEV_PHUB_TDMEM103_ORIG_TD1, 0x40007b3c\r
- 2949                  .set CYDEV_PHUB_TDMEM104_BASE, 0x40007b40\r
- 2950                  .set CYDEV_PHUB_TDMEM104_SIZE, 0x00000008\r
- 2951                  .set CYDEV_PHUB_TDMEM104_ORIG_TD0, 0x40007b40\r
- 2952                  .set CYDEV_PHUB_TDMEM104_ORIG_TD1, 0x40007b44\r
- 2953                  .set CYDEV_PHUB_TDMEM105_BASE, 0x40007b48\r
- 2954                  .set CYDEV_PHUB_TDMEM105_SIZE, 0x00000008\r
- 2955                  .set CYDEV_PHUB_TDMEM105_ORIG_TD0, 0x40007b48\r
- 2956                  .set CYDEV_PHUB_TDMEM105_ORIG_TD1, 0x40007b4c\r
- 2957                  .set CYDEV_PHUB_TDMEM106_BASE, 0x40007b50\r
- 2958                  .set CYDEV_PHUB_TDMEM106_SIZE, 0x00000008\r
- 2959                  .set CYDEV_PHUB_TDMEM106_ORIG_TD0, 0x40007b50\r
- 2960                  .set CYDEV_PHUB_TDMEM106_ORIG_TD1, 0x40007b54\r
- 2961                  .set CYDEV_PHUB_TDMEM107_BASE, 0x40007b58\r
- 2962                  .set CYDEV_PHUB_TDMEM107_SIZE, 0x00000008\r
- 2963                  .set CYDEV_PHUB_TDMEM107_ORIG_TD0, 0x40007b58\r
- 2964                  .set CYDEV_PHUB_TDMEM107_ORIG_TD1, 0x40007b5c\r
- 2965                  .set CYDEV_PHUB_TDMEM108_BASE, 0x40007b60\r
- 2966                  .set CYDEV_PHUB_TDMEM108_SIZE, 0x00000008\r
- 2967                  .set CYDEV_PHUB_TDMEM108_ORIG_TD0, 0x40007b60\r
- 2968                  .set CYDEV_PHUB_TDMEM108_ORIG_TD1, 0x40007b64\r
- 2969                  .set CYDEV_PHUB_TDMEM109_BASE, 0x40007b68\r
- 2970                  .set CYDEV_PHUB_TDMEM109_SIZE, 0x00000008\r
- 2971                  .set CYDEV_PHUB_TDMEM109_ORIG_TD0, 0x40007b68\r
- 2972                  .set CYDEV_PHUB_TDMEM109_ORIG_TD1, 0x40007b6c\r
- 2973                  .set CYDEV_PHUB_TDMEM110_BASE, 0x40007b70\r
- 2974                  .set CYDEV_PHUB_TDMEM110_SIZE, 0x00000008\r
- 2975                  .set CYDEV_PHUB_TDMEM110_ORIG_TD0, 0x40007b70\r
- 2976                  .set CYDEV_PHUB_TDMEM110_ORIG_TD1, 0x40007b74\r
- 2977                  .set CYDEV_PHUB_TDMEM111_BASE, 0x40007b78\r
- 2978                  .set CYDEV_PHUB_TDMEM111_SIZE, 0x00000008\r
- 2979                  .set CYDEV_PHUB_TDMEM111_ORIG_TD0, 0x40007b78\r
- 2980                  .set CYDEV_PHUB_TDMEM111_ORIG_TD1, 0x40007b7c\r
- 2981                  .set CYDEV_PHUB_TDMEM112_BASE, 0x40007b80\r
- 2982                  .set CYDEV_PHUB_TDMEM112_SIZE, 0x00000008\r
- 2983                  .set CYDEV_PHUB_TDMEM112_ORIG_TD0, 0x40007b80\r
- 2984                  .set CYDEV_PHUB_TDMEM112_ORIG_TD1, 0x40007b84\r
- 2985                  .set CYDEV_PHUB_TDMEM113_BASE, 0x40007b88\r
- 2986                  .set CYDEV_PHUB_TDMEM113_SIZE, 0x00000008\r
- 2987                  .set CYDEV_PHUB_TDMEM113_ORIG_TD0, 0x40007b88\r
- 2988                  .set CYDEV_PHUB_TDMEM113_ORIG_TD1, 0x40007b8c\r
- 2989                  .set CYDEV_PHUB_TDMEM114_BASE, 0x40007b90\r
- 2990                  .set CYDEV_PHUB_TDMEM114_SIZE, 0x00000008\r
- 2991                  .set CYDEV_PHUB_TDMEM114_ORIG_TD0, 0x40007b90\r
- 2992                  .set CYDEV_PHUB_TDMEM114_ORIG_TD1, 0x40007b94\r
- 2993                  .set CYDEV_PHUB_TDMEM115_BASE, 0x40007b98\r
- 2994                  .set CYDEV_PHUB_TDMEM115_SIZE, 0x00000008\r
- 2995                  .set CYDEV_PHUB_TDMEM115_ORIG_TD0, 0x40007b98\r
- 2996                  .set CYDEV_PHUB_TDMEM115_ORIG_TD1, 0x40007b9c\r
- 2997                  .set CYDEV_PHUB_TDMEM116_BASE, 0x40007ba0\r
- 2998                  .set CYDEV_PHUB_TDMEM116_SIZE, 0x00000008\r
- 2999                  .set CYDEV_PHUB_TDMEM116_ORIG_TD0, 0x40007ba0\r
- 3000                  .set CYDEV_PHUB_TDMEM116_ORIG_TD1, 0x40007ba4\r
- 3001                  .set CYDEV_PHUB_TDMEM117_BASE, 0x40007ba8\r
- 3002                  .set CYDEV_PHUB_TDMEM117_SIZE, 0x00000008\r
- 3003                  .set CYDEV_PHUB_TDMEM117_ORIG_TD0, 0x40007ba8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 54\r
-\r
-\r
- 3004                  .set CYDEV_PHUB_TDMEM117_ORIG_TD1, 0x40007bac\r
- 3005                  .set CYDEV_PHUB_TDMEM118_BASE, 0x40007bb0\r
- 3006                  .set CYDEV_PHUB_TDMEM118_SIZE, 0x00000008\r
- 3007                  .set CYDEV_PHUB_TDMEM118_ORIG_TD0, 0x40007bb0\r
- 3008                  .set CYDEV_PHUB_TDMEM118_ORIG_TD1, 0x40007bb4\r
- 3009                  .set CYDEV_PHUB_TDMEM119_BASE, 0x40007bb8\r
- 3010                  .set CYDEV_PHUB_TDMEM119_SIZE, 0x00000008\r
- 3011                  .set CYDEV_PHUB_TDMEM119_ORIG_TD0, 0x40007bb8\r
- 3012                  .set CYDEV_PHUB_TDMEM119_ORIG_TD1, 0x40007bbc\r
- 3013                  .set CYDEV_PHUB_TDMEM120_BASE, 0x40007bc0\r
- 3014                  .set CYDEV_PHUB_TDMEM120_SIZE, 0x00000008\r
- 3015                  .set CYDEV_PHUB_TDMEM120_ORIG_TD0, 0x40007bc0\r
- 3016                  .set CYDEV_PHUB_TDMEM120_ORIG_TD1, 0x40007bc4\r
- 3017                  .set CYDEV_PHUB_TDMEM121_BASE, 0x40007bc8\r
- 3018                  .set CYDEV_PHUB_TDMEM121_SIZE, 0x00000008\r
- 3019                  .set CYDEV_PHUB_TDMEM121_ORIG_TD0, 0x40007bc8\r
- 3020                  .set CYDEV_PHUB_TDMEM121_ORIG_TD1, 0x40007bcc\r
- 3021                  .set CYDEV_PHUB_TDMEM122_BASE, 0x40007bd0\r
- 3022                  .set CYDEV_PHUB_TDMEM122_SIZE, 0x00000008\r
- 3023                  .set CYDEV_PHUB_TDMEM122_ORIG_TD0, 0x40007bd0\r
- 3024                  .set CYDEV_PHUB_TDMEM122_ORIG_TD1, 0x40007bd4\r
- 3025                  .set CYDEV_PHUB_TDMEM123_BASE, 0x40007bd8\r
- 3026                  .set CYDEV_PHUB_TDMEM123_SIZE, 0x00000008\r
- 3027                  .set CYDEV_PHUB_TDMEM123_ORIG_TD0, 0x40007bd8\r
- 3028                  .set CYDEV_PHUB_TDMEM123_ORIG_TD1, 0x40007bdc\r
- 3029                  .set CYDEV_PHUB_TDMEM124_BASE, 0x40007be0\r
- 3030                  .set CYDEV_PHUB_TDMEM124_SIZE, 0x00000008\r
- 3031                  .set CYDEV_PHUB_TDMEM124_ORIG_TD0, 0x40007be0\r
- 3032                  .set CYDEV_PHUB_TDMEM124_ORIG_TD1, 0x40007be4\r
- 3033                  .set CYDEV_PHUB_TDMEM125_BASE, 0x40007be8\r
- 3034                  .set CYDEV_PHUB_TDMEM125_SIZE, 0x00000008\r
- 3035                  .set CYDEV_PHUB_TDMEM125_ORIG_TD0, 0x40007be8\r
- 3036                  .set CYDEV_PHUB_TDMEM125_ORIG_TD1, 0x40007bec\r
- 3037                  .set CYDEV_PHUB_TDMEM126_BASE, 0x40007bf0\r
- 3038                  .set CYDEV_PHUB_TDMEM126_SIZE, 0x00000008\r
- 3039                  .set CYDEV_PHUB_TDMEM126_ORIG_TD0, 0x40007bf0\r
- 3040                  .set CYDEV_PHUB_TDMEM126_ORIG_TD1, 0x40007bf4\r
- 3041                  .set CYDEV_PHUB_TDMEM127_BASE, 0x40007bf8\r
- 3042                  .set CYDEV_PHUB_TDMEM127_SIZE, 0x00000008\r
- 3043                  .set CYDEV_PHUB_TDMEM127_ORIG_TD0, 0x40007bf8\r
- 3044                  .set CYDEV_PHUB_TDMEM127_ORIG_TD1, 0x40007bfc\r
- 3045                  .set CYDEV_EE_BASE, 0x40008000\r
- 3046                  .set CYDEV_EE_SIZE, 0x00000800\r
- 3047                  .set CYDEV_EE_DATA_MBASE, 0x40008000\r
- 3048                  .set CYDEV_EE_DATA_MSIZE, 0x00000800\r
- 3049                  .set CYDEV_CAN0_BASE, 0x4000a000\r
- 3050                  .set CYDEV_CAN0_SIZE, 0x000002a0\r
- 3051                  .set CYDEV_CAN0_CSR_BASE, 0x4000a000\r
- 3052                  .set CYDEV_CAN0_CSR_SIZE, 0x00000018\r
- 3053                  .set CYDEV_CAN0_CSR_INT_SR, 0x4000a000\r
- 3054                  .set CYDEV_CAN0_CSR_INT_EN, 0x4000a004\r
- 3055                  .set CYDEV_CAN0_CSR_BUF_SR, 0x4000a008\r
- 3056                  .set CYDEV_CAN0_CSR_ERR_SR, 0x4000a00c\r
- 3057                  .set CYDEV_CAN0_CSR_CMD, 0x4000a010\r
- 3058                  .set CYDEV_CAN0_CSR_CFG, 0x4000a014\r
- 3059                  .set CYDEV_CAN0_TX0_BASE, 0x4000a020\r
- 3060                  .set CYDEV_CAN0_TX0_SIZE, 0x00000010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 55\r
-\r
-\r
- 3061                  .set CYDEV_CAN0_TX0_CMD, 0x4000a020\r
- 3062                  .set CYDEV_CAN0_TX0_ID, 0x4000a024\r
- 3063                  .set CYDEV_CAN0_TX0_DH, 0x4000a028\r
- 3064                  .set CYDEV_CAN0_TX0_DL, 0x4000a02c\r
- 3065                  .set CYDEV_CAN0_TX1_BASE, 0x4000a030\r
- 3066                  .set CYDEV_CAN0_TX1_SIZE, 0x00000010\r
- 3067                  .set CYDEV_CAN0_TX1_CMD, 0x4000a030\r
- 3068                  .set CYDEV_CAN0_TX1_ID, 0x4000a034\r
- 3069                  .set CYDEV_CAN0_TX1_DH, 0x4000a038\r
- 3070                  .set CYDEV_CAN0_TX1_DL, 0x4000a03c\r
- 3071                  .set CYDEV_CAN0_TX2_BASE, 0x4000a040\r
- 3072                  .set CYDEV_CAN0_TX2_SIZE, 0x00000010\r
- 3073                  .set CYDEV_CAN0_TX2_CMD, 0x4000a040\r
- 3074                  .set CYDEV_CAN0_TX2_ID, 0x4000a044\r
- 3075                  .set CYDEV_CAN0_TX2_DH, 0x4000a048\r
- 3076                  .set CYDEV_CAN0_TX2_DL, 0x4000a04c\r
- 3077                  .set CYDEV_CAN0_TX3_BASE, 0x4000a050\r
- 3078                  .set CYDEV_CAN0_TX3_SIZE, 0x00000010\r
- 3079                  .set CYDEV_CAN0_TX3_CMD, 0x4000a050\r
- 3080                  .set CYDEV_CAN0_TX3_ID, 0x4000a054\r
- 3081                  .set CYDEV_CAN0_TX3_DH, 0x4000a058\r
- 3082                  .set CYDEV_CAN0_TX3_DL, 0x4000a05c\r
- 3083                  .set CYDEV_CAN0_TX4_BASE, 0x4000a060\r
- 3084                  .set CYDEV_CAN0_TX4_SIZE, 0x00000010\r
- 3085                  .set CYDEV_CAN0_TX4_CMD, 0x4000a060\r
- 3086                  .set CYDEV_CAN0_TX4_ID, 0x4000a064\r
- 3087                  .set CYDEV_CAN0_TX4_DH, 0x4000a068\r
- 3088                  .set CYDEV_CAN0_TX4_DL, 0x4000a06c\r
- 3089                  .set CYDEV_CAN0_TX5_BASE, 0x4000a070\r
- 3090                  .set CYDEV_CAN0_TX5_SIZE, 0x00000010\r
- 3091                  .set CYDEV_CAN0_TX5_CMD, 0x4000a070\r
- 3092                  .set CYDEV_CAN0_TX5_ID, 0x4000a074\r
- 3093                  .set CYDEV_CAN0_TX5_DH, 0x4000a078\r
- 3094                  .set CYDEV_CAN0_TX5_DL, 0x4000a07c\r
- 3095                  .set CYDEV_CAN0_TX6_BASE, 0x4000a080\r
- 3096                  .set CYDEV_CAN0_TX6_SIZE, 0x00000010\r
- 3097                  .set CYDEV_CAN0_TX6_CMD, 0x4000a080\r
- 3098                  .set CYDEV_CAN0_TX6_ID, 0x4000a084\r
- 3099                  .set CYDEV_CAN0_TX6_DH, 0x4000a088\r
- 3100                  .set CYDEV_CAN0_TX6_DL, 0x4000a08c\r
- 3101                  .set CYDEV_CAN0_TX7_BASE, 0x4000a090\r
- 3102                  .set CYDEV_CAN0_TX7_SIZE, 0x00000010\r
- 3103                  .set CYDEV_CAN0_TX7_CMD, 0x4000a090\r
- 3104                  .set CYDEV_CAN0_TX7_ID, 0x4000a094\r
- 3105                  .set CYDEV_CAN0_TX7_DH, 0x4000a098\r
- 3106                  .set CYDEV_CAN0_TX7_DL, 0x4000a09c\r
- 3107                  .set CYDEV_CAN0_RX0_BASE, 0x4000a0a0\r
- 3108                  .set CYDEV_CAN0_RX0_SIZE, 0x00000020\r
- 3109                  .set CYDEV_CAN0_RX0_CMD, 0x4000a0a0\r
- 3110                  .set CYDEV_CAN0_RX0_ID, 0x4000a0a4\r
- 3111                  .set CYDEV_CAN0_RX0_DH, 0x4000a0a8\r
- 3112                  .set CYDEV_CAN0_RX0_DL, 0x4000a0ac\r
- 3113                  .set CYDEV_CAN0_RX0_AMR, 0x4000a0b0\r
- 3114                  .set CYDEV_CAN0_RX0_ACR, 0x4000a0b4\r
- 3115                  .set CYDEV_CAN0_RX0_AMRD, 0x4000a0b8\r
- 3116                  .set CYDEV_CAN0_RX0_ACRD, 0x4000a0bc\r
- 3117                  .set CYDEV_CAN0_RX1_BASE, 0x4000a0c0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 56\r
-\r
-\r
- 3118                  .set CYDEV_CAN0_RX1_SIZE, 0x00000020\r
- 3119                  .set CYDEV_CAN0_RX1_CMD, 0x4000a0c0\r
- 3120                  .set CYDEV_CAN0_RX1_ID, 0x4000a0c4\r
- 3121                  .set CYDEV_CAN0_RX1_DH, 0x4000a0c8\r
- 3122                  .set CYDEV_CAN0_RX1_DL, 0x4000a0cc\r
- 3123                  .set CYDEV_CAN0_RX1_AMR, 0x4000a0d0\r
- 3124                  .set CYDEV_CAN0_RX1_ACR, 0x4000a0d4\r
- 3125                  .set CYDEV_CAN0_RX1_AMRD, 0x4000a0d8\r
- 3126                  .set CYDEV_CAN0_RX1_ACRD, 0x4000a0dc\r
- 3127                  .set CYDEV_CAN0_RX2_BASE, 0x4000a0e0\r
- 3128                  .set CYDEV_CAN0_RX2_SIZE, 0x00000020\r
- 3129                  .set CYDEV_CAN0_RX2_CMD, 0x4000a0e0\r
- 3130                  .set CYDEV_CAN0_RX2_ID, 0x4000a0e4\r
- 3131                  .set CYDEV_CAN0_RX2_DH, 0x4000a0e8\r
- 3132                  .set CYDEV_CAN0_RX2_DL, 0x4000a0ec\r
- 3133                  .set CYDEV_CAN0_RX2_AMR, 0x4000a0f0\r
- 3134                  .set CYDEV_CAN0_RX2_ACR, 0x4000a0f4\r
- 3135                  .set CYDEV_CAN0_RX2_AMRD, 0x4000a0f8\r
- 3136                  .set CYDEV_CAN0_RX2_ACRD, 0x4000a0fc\r
- 3137                  .set CYDEV_CAN0_RX3_BASE, 0x4000a100\r
- 3138                  .set CYDEV_CAN0_RX3_SIZE, 0x00000020\r
- 3139                  .set CYDEV_CAN0_RX3_CMD, 0x4000a100\r
- 3140                  .set CYDEV_CAN0_RX3_ID, 0x4000a104\r
- 3141                  .set CYDEV_CAN0_RX3_DH, 0x4000a108\r
- 3142                  .set CYDEV_CAN0_RX3_DL, 0x4000a10c\r
- 3143                  .set CYDEV_CAN0_RX3_AMR, 0x4000a110\r
- 3144                  .set CYDEV_CAN0_RX3_ACR, 0x4000a114\r
- 3145                  .set CYDEV_CAN0_RX3_AMRD, 0x4000a118\r
- 3146                  .set CYDEV_CAN0_RX3_ACRD, 0x4000a11c\r
- 3147                  .set CYDEV_CAN0_RX4_BASE, 0x4000a120\r
- 3148                  .set CYDEV_CAN0_RX4_SIZE, 0x00000020\r
- 3149                  .set CYDEV_CAN0_RX4_CMD, 0x4000a120\r
- 3150                  .set CYDEV_CAN0_RX4_ID, 0x4000a124\r
- 3151                  .set CYDEV_CAN0_RX4_DH, 0x4000a128\r
- 3152                  .set CYDEV_CAN0_RX4_DL, 0x4000a12c\r
- 3153                  .set CYDEV_CAN0_RX4_AMR, 0x4000a130\r
- 3154                  .set CYDEV_CAN0_RX4_ACR, 0x4000a134\r
- 3155                  .set CYDEV_CAN0_RX4_AMRD, 0x4000a138\r
- 3156                  .set CYDEV_CAN0_RX4_ACRD, 0x4000a13c\r
- 3157                  .set CYDEV_CAN0_RX5_BASE, 0x4000a140\r
- 3158                  .set CYDEV_CAN0_RX5_SIZE, 0x00000020\r
- 3159                  .set CYDEV_CAN0_RX5_CMD, 0x4000a140\r
- 3160                  .set CYDEV_CAN0_RX5_ID, 0x4000a144\r
- 3161                  .set CYDEV_CAN0_RX5_DH, 0x4000a148\r
- 3162                  .set CYDEV_CAN0_RX5_DL, 0x4000a14c\r
- 3163                  .set CYDEV_CAN0_RX5_AMR, 0x4000a150\r
- 3164                  .set CYDEV_CAN0_RX5_ACR, 0x4000a154\r
- 3165                  .set CYDEV_CAN0_RX5_AMRD, 0x4000a158\r
- 3166                  .set CYDEV_CAN0_RX5_ACRD, 0x4000a15c\r
- 3167                  .set CYDEV_CAN0_RX6_BASE, 0x4000a160\r
- 3168                  .set CYDEV_CAN0_RX6_SIZE, 0x00000020\r
- 3169                  .set CYDEV_CAN0_RX6_CMD, 0x4000a160\r
- 3170                  .set CYDEV_CAN0_RX6_ID, 0x4000a164\r
- 3171                  .set CYDEV_CAN0_RX6_DH, 0x4000a168\r
- 3172                  .set CYDEV_CAN0_RX6_DL, 0x4000a16c\r
- 3173                  .set CYDEV_CAN0_RX6_AMR, 0x4000a170\r
- 3174                  .set CYDEV_CAN0_RX6_ACR, 0x4000a174\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 57\r
-\r
-\r
- 3175                  .set CYDEV_CAN0_RX6_AMRD, 0x4000a178\r
- 3176                  .set CYDEV_CAN0_RX6_ACRD, 0x4000a17c\r
- 3177                  .set CYDEV_CAN0_RX7_BASE, 0x4000a180\r
- 3178                  .set CYDEV_CAN0_RX7_SIZE, 0x00000020\r
- 3179                  .set CYDEV_CAN0_RX7_CMD, 0x4000a180\r
- 3180                  .set CYDEV_CAN0_RX7_ID, 0x4000a184\r
- 3181                  .set CYDEV_CAN0_RX7_DH, 0x4000a188\r
- 3182                  .set CYDEV_CAN0_RX7_DL, 0x4000a18c\r
- 3183                  .set CYDEV_CAN0_RX7_AMR, 0x4000a190\r
- 3184                  .set CYDEV_CAN0_RX7_ACR, 0x4000a194\r
- 3185                  .set CYDEV_CAN0_RX7_AMRD, 0x4000a198\r
- 3186                  .set CYDEV_CAN0_RX7_ACRD, 0x4000a19c\r
- 3187                  .set CYDEV_CAN0_RX8_BASE, 0x4000a1a0\r
- 3188                  .set CYDEV_CAN0_RX8_SIZE, 0x00000020\r
- 3189                  .set CYDEV_CAN0_RX8_CMD, 0x4000a1a0\r
- 3190                  .set CYDEV_CAN0_RX8_ID, 0x4000a1a4\r
- 3191                  .set CYDEV_CAN0_RX8_DH, 0x4000a1a8\r
- 3192                  .set CYDEV_CAN0_RX8_DL, 0x4000a1ac\r
- 3193                  .set CYDEV_CAN0_RX8_AMR, 0x4000a1b0\r
- 3194                  .set CYDEV_CAN0_RX8_ACR, 0x4000a1b4\r
- 3195                  .set CYDEV_CAN0_RX8_AMRD, 0x4000a1b8\r
- 3196                  .set CYDEV_CAN0_RX8_ACRD, 0x4000a1bc\r
- 3197                  .set CYDEV_CAN0_RX9_BASE, 0x4000a1c0\r
- 3198                  .set CYDEV_CAN0_RX9_SIZE, 0x00000020\r
- 3199                  .set CYDEV_CAN0_RX9_CMD, 0x4000a1c0\r
- 3200                  .set CYDEV_CAN0_RX9_ID, 0x4000a1c4\r
- 3201                  .set CYDEV_CAN0_RX9_DH, 0x4000a1c8\r
- 3202                  .set CYDEV_CAN0_RX9_DL, 0x4000a1cc\r
- 3203                  .set CYDEV_CAN0_RX9_AMR, 0x4000a1d0\r
- 3204                  .set CYDEV_CAN0_RX9_ACR, 0x4000a1d4\r
- 3205                  .set CYDEV_CAN0_RX9_AMRD, 0x4000a1d8\r
- 3206                  .set CYDEV_CAN0_RX9_ACRD, 0x4000a1dc\r
- 3207                  .set CYDEV_CAN0_RX10_BASE, 0x4000a1e0\r
- 3208                  .set CYDEV_CAN0_RX10_SIZE, 0x00000020\r
- 3209                  .set CYDEV_CAN0_RX10_CMD, 0x4000a1e0\r
- 3210                  .set CYDEV_CAN0_RX10_ID, 0x4000a1e4\r
- 3211                  .set CYDEV_CAN0_RX10_DH, 0x4000a1e8\r
- 3212                  .set CYDEV_CAN0_RX10_DL, 0x4000a1ec\r
- 3213                  .set CYDEV_CAN0_RX10_AMR, 0x4000a1f0\r
- 3214                  .set CYDEV_CAN0_RX10_ACR, 0x4000a1f4\r
- 3215                  .set CYDEV_CAN0_RX10_AMRD, 0x4000a1f8\r
- 3216                  .set CYDEV_CAN0_RX10_ACRD, 0x4000a1fc\r
- 3217                  .set CYDEV_CAN0_RX11_BASE, 0x4000a200\r
- 3218                  .set CYDEV_CAN0_RX11_SIZE, 0x00000020\r
- 3219                  .set CYDEV_CAN0_RX11_CMD, 0x4000a200\r
- 3220                  .set CYDEV_CAN0_RX11_ID, 0x4000a204\r
- 3221                  .set CYDEV_CAN0_RX11_DH, 0x4000a208\r
- 3222                  .set CYDEV_CAN0_RX11_DL, 0x4000a20c\r
- 3223                  .set CYDEV_CAN0_RX11_AMR, 0x4000a210\r
- 3224                  .set CYDEV_CAN0_RX11_ACR, 0x4000a214\r
- 3225                  .set CYDEV_CAN0_RX11_AMRD, 0x4000a218\r
- 3226                  .set CYDEV_CAN0_RX11_ACRD, 0x4000a21c\r
- 3227                  .set CYDEV_CAN0_RX12_BASE, 0x4000a220\r
- 3228                  .set CYDEV_CAN0_RX12_SIZE, 0x00000020\r
- 3229                  .set CYDEV_CAN0_RX12_CMD, 0x4000a220\r
- 3230                  .set CYDEV_CAN0_RX12_ID, 0x4000a224\r
- 3231                  .set CYDEV_CAN0_RX12_DH, 0x4000a228\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 58\r
-\r
-\r
- 3232                  .set CYDEV_CAN0_RX12_DL, 0x4000a22c\r
- 3233                  .set CYDEV_CAN0_RX12_AMR, 0x4000a230\r
- 3234                  .set CYDEV_CAN0_RX12_ACR, 0x4000a234\r
- 3235                  .set CYDEV_CAN0_RX12_AMRD, 0x4000a238\r
- 3236                  .set CYDEV_CAN0_RX12_ACRD, 0x4000a23c\r
- 3237                  .set CYDEV_CAN0_RX13_BASE, 0x4000a240\r
- 3238                  .set CYDEV_CAN0_RX13_SIZE, 0x00000020\r
- 3239                  .set CYDEV_CAN0_RX13_CMD, 0x4000a240\r
- 3240                  .set CYDEV_CAN0_RX13_ID, 0x4000a244\r
- 3241                  .set CYDEV_CAN0_RX13_DH, 0x4000a248\r
- 3242                  .set CYDEV_CAN0_RX13_DL, 0x4000a24c\r
- 3243                  .set CYDEV_CAN0_RX13_AMR, 0x4000a250\r
- 3244                  .set CYDEV_CAN0_RX13_ACR, 0x4000a254\r
- 3245                  .set CYDEV_CAN0_RX13_AMRD, 0x4000a258\r
- 3246                  .set CYDEV_CAN0_RX13_ACRD, 0x4000a25c\r
- 3247                  .set CYDEV_CAN0_RX14_BASE, 0x4000a260\r
- 3248                  .set CYDEV_CAN0_RX14_SIZE, 0x00000020\r
- 3249                  .set CYDEV_CAN0_RX14_CMD, 0x4000a260\r
- 3250                  .set CYDEV_CAN0_RX14_ID, 0x4000a264\r
- 3251                  .set CYDEV_CAN0_RX14_DH, 0x4000a268\r
- 3252                  .set CYDEV_CAN0_RX14_DL, 0x4000a26c\r
- 3253                  .set CYDEV_CAN0_RX14_AMR, 0x4000a270\r
- 3254                  .set CYDEV_CAN0_RX14_ACR, 0x4000a274\r
- 3255                  .set CYDEV_CAN0_RX14_AMRD, 0x4000a278\r
- 3256                  .set CYDEV_CAN0_RX14_ACRD, 0x4000a27c\r
- 3257                  .set CYDEV_CAN0_RX15_BASE, 0x4000a280\r
- 3258                  .set CYDEV_CAN0_RX15_SIZE, 0x00000020\r
- 3259                  .set CYDEV_CAN0_RX15_CMD, 0x4000a280\r
- 3260                  .set CYDEV_CAN0_RX15_ID, 0x4000a284\r
- 3261                  .set CYDEV_CAN0_RX15_DH, 0x4000a288\r
- 3262                  .set CYDEV_CAN0_RX15_DL, 0x4000a28c\r
- 3263                  .set CYDEV_CAN0_RX15_AMR, 0x4000a290\r
- 3264                  .set CYDEV_CAN0_RX15_ACR, 0x4000a294\r
- 3265                  .set CYDEV_CAN0_RX15_AMRD, 0x4000a298\r
- 3266                  .set CYDEV_CAN0_RX15_ACRD, 0x4000a29c\r
- 3267                  .set CYDEV_DFB0_BASE, 0x4000c000\r
- 3268                  .set CYDEV_DFB0_SIZE, 0x000007b5\r
- 3269                  .set CYDEV_DFB0_DPA_SRAM_BASE, 0x4000c000\r
- 3270                  .set CYDEV_DFB0_DPA_SRAM_SIZE, 0x00000200\r
- 3271                  .set CYDEV_DFB0_DPA_SRAM_DATA_MBASE, 0x4000c000\r
- 3272                  .set CYDEV_DFB0_DPA_SRAM_DATA_MSIZE, 0x00000200\r
- 3273                  .set CYDEV_DFB0_DPB_SRAM_BASE, 0x4000c200\r
- 3274                  .set CYDEV_DFB0_DPB_SRAM_SIZE, 0x00000200\r
- 3275                  .set CYDEV_DFB0_DPB_SRAM_DATA_MBASE, 0x4000c200\r
- 3276                  .set CYDEV_DFB0_DPB_SRAM_DATA_MSIZE, 0x00000200\r
- 3277                  .set CYDEV_DFB0_CSA_SRAM_BASE, 0x4000c400\r
- 3278                  .set CYDEV_DFB0_CSA_SRAM_SIZE, 0x00000100\r
- 3279                  .set CYDEV_DFB0_CSA_SRAM_DATA_MBASE, 0x4000c400\r
- 3280                  .set CYDEV_DFB0_CSA_SRAM_DATA_MSIZE, 0x00000100\r
- 3281                  .set CYDEV_DFB0_CSB_SRAM_BASE, 0x4000c500\r
- 3282                  .set CYDEV_DFB0_CSB_SRAM_SIZE, 0x00000100\r
- 3283                  .set CYDEV_DFB0_CSB_SRAM_DATA_MBASE, 0x4000c500\r
- 3284                  .set CYDEV_DFB0_CSB_SRAM_DATA_MSIZE, 0x00000100\r
- 3285                  .set CYDEV_DFB0_FSM_SRAM_BASE, 0x4000c600\r
- 3286                  .set CYDEV_DFB0_FSM_SRAM_SIZE, 0x00000100\r
- 3287                  .set CYDEV_DFB0_FSM_SRAM_DATA_MBASE, 0x4000c600\r
- 3288                  .set CYDEV_DFB0_FSM_SRAM_DATA_MSIZE, 0x00000100\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 59\r
-\r
-\r
- 3289                  .set CYDEV_DFB0_ACU_SRAM_BASE, 0x4000c700\r
- 3290                  .set CYDEV_DFB0_ACU_SRAM_SIZE, 0x00000040\r
- 3291                  .set CYDEV_DFB0_ACU_SRAM_DATA_MBASE, 0x4000c700\r
- 3292                  .set CYDEV_DFB0_ACU_SRAM_DATA_MSIZE, 0x00000040\r
- 3293                  .set CYDEV_DFB0_CR, 0x4000c780\r
- 3294                  .set CYDEV_DFB0_SR, 0x4000c784\r
- 3295                  .set CYDEV_DFB0_RAM_EN, 0x4000c788\r
- 3296                  .set CYDEV_DFB0_RAM_DIR, 0x4000c78c\r
- 3297                  .set CYDEV_DFB0_SEMA, 0x4000c790\r
- 3298                  .set CYDEV_DFB0_DSI_CTRL, 0x4000c794\r
- 3299                  .set CYDEV_DFB0_INT_CTRL, 0x4000c798\r
- 3300                  .set CYDEV_DFB0_DMA_CTRL, 0x4000c79c\r
- 3301                  .set CYDEV_DFB0_STAGEA, 0x4000c7a0\r
- 3302                  .set CYDEV_DFB0_STAGEAM, 0x4000c7a1\r
- 3303                  .set CYDEV_DFB0_STAGEAH, 0x4000c7a2\r
- 3304                  .set CYDEV_DFB0_STAGEB, 0x4000c7a4\r
- 3305                  .set CYDEV_DFB0_STAGEBM, 0x4000c7a5\r
- 3306                  .set CYDEV_DFB0_STAGEBH, 0x4000c7a6\r
- 3307                  .set CYDEV_DFB0_HOLDA, 0x4000c7a8\r
- 3308                  .set CYDEV_DFB0_HOLDAM, 0x4000c7a9\r
- 3309                  .set CYDEV_DFB0_HOLDAH, 0x4000c7aa\r
- 3310                  .set CYDEV_DFB0_HOLDAS, 0x4000c7ab\r
- 3311                  .set CYDEV_DFB0_HOLDB, 0x4000c7ac\r
- 3312                  .set CYDEV_DFB0_HOLDBM, 0x4000c7ad\r
- 3313                  .set CYDEV_DFB0_HOLDBH, 0x4000c7ae\r
- 3314                  .set CYDEV_DFB0_HOLDBS, 0x4000c7af\r
- 3315                  .set CYDEV_DFB0_COHER, 0x4000c7b0\r
- 3316                  .set CYDEV_DFB0_DALIGN, 0x4000c7b4\r
- 3317                  .set CYDEV_UCFG_BASE, 0x40010000\r
- 3318                  .set CYDEV_UCFG_SIZE, 0x00005040\r
- 3319                  .set CYDEV_UCFG_B0_BASE, 0x40010000\r
- 3320                  .set CYDEV_UCFG_B0_SIZE, 0x00000fef\r
- 3321                  .set CYDEV_UCFG_B0_P0_BASE, 0x40010000\r
- 3322                  .set CYDEV_UCFG_B0_P0_SIZE, 0x000001ef\r
- 3323                  .set CYDEV_UCFG_B0_P0_U0_BASE, 0x40010000\r
- 3324                  .set CYDEV_UCFG_B0_P0_U0_SIZE, 0x00000070\r
- 3325                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT0, 0x40010000\r
- 3326                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT1, 0x40010004\r
- 3327                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT2, 0x40010008\r
- 3328                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT3, 0x4001000c\r
- 3329                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT4, 0x40010010\r
- 3330                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT5, 0x40010014\r
- 3331                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT6, 0x40010018\r
- 3332                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT7, 0x4001001c\r
- 3333                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT8, 0x40010020\r
- 3334                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT9, 0x40010024\r
- 3335                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT10, 0x40010028\r
- 3336                  .set CYDEV_UCFG_B0_P0_U0_PLD_IT11, 0x4001002c\r
- 3337                  .set CYDEV_UCFG_B0_P0_U0_PLD_ORT0, 0x40010030\r
- 3338                  .set CYDEV_UCFG_B0_P0_U0_PLD_ORT1, 0x40010032\r
- 3339                  .set CYDEV_UCFG_B0_P0_U0_PLD_ORT2, 0x40010034\r
- 3340                  .set CYDEV_UCFG_B0_P0_U0_PLD_ORT3, 0x40010036\r
- 3341                  .set CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST, 0x40010038\r
- 3342                  .set CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB, 0x4001003a\r
- 3343                  .set CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET, 0x4001003c\r
- 3344                  .set CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS, 0x4001003e\r
- 3345                  .set CYDEV_UCFG_B0_P0_U0_CFG0, 0x40010040\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 60\r
-\r
-\r
- 3346                  .set CYDEV_UCFG_B0_P0_U0_CFG1, 0x40010041\r
- 3347                  .set CYDEV_UCFG_B0_P0_U0_CFG2, 0x40010042\r
- 3348                  .set CYDEV_UCFG_B0_P0_U0_CFG3, 0x40010043\r
- 3349                  .set CYDEV_UCFG_B0_P0_U0_CFG4, 0x40010044\r
- 3350                  .set CYDEV_UCFG_B0_P0_U0_CFG5, 0x40010045\r
- 3351                  .set CYDEV_UCFG_B0_P0_U0_CFG6, 0x40010046\r
- 3352                  .set CYDEV_UCFG_B0_P0_U0_CFG7, 0x40010047\r
- 3353                  .set CYDEV_UCFG_B0_P0_U0_CFG8, 0x40010048\r
- 3354                  .set CYDEV_UCFG_B0_P0_U0_CFG9, 0x40010049\r
- 3355                  .set CYDEV_UCFG_B0_P0_U0_CFG10, 0x4001004a\r
- 3356                  .set CYDEV_UCFG_B0_P0_U0_CFG11, 0x4001004b\r
- 3357                  .set CYDEV_UCFG_B0_P0_U0_CFG12, 0x4001004c\r
- 3358                  .set CYDEV_UCFG_B0_P0_U0_CFG13, 0x4001004d\r
- 3359                  .set CYDEV_UCFG_B0_P0_U0_CFG14, 0x4001004e\r
- 3360                  .set CYDEV_UCFG_B0_P0_U0_CFG15, 0x4001004f\r
- 3361                  .set CYDEV_UCFG_B0_P0_U0_CFG16, 0x40010050\r
- 3362                  .set CYDEV_UCFG_B0_P0_U0_CFG17, 0x40010051\r
- 3363                  .set CYDEV_UCFG_B0_P0_U0_CFG18, 0x40010052\r
- 3364                  .set CYDEV_UCFG_B0_P0_U0_CFG19, 0x40010053\r
- 3365                  .set CYDEV_UCFG_B0_P0_U0_CFG20, 0x40010054\r
- 3366                  .set CYDEV_UCFG_B0_P0_U0_CFG21, 0x40010055\r
- 3367                  .set CYDEV_UCFG_B0_P0_U0_CFG22, 0x40010056\r
- 3368                  .set CYDEV_UCFG_B0_P0_U0_CFG23, 0x40010057\r
- 3369                  .set CYDEV_UCFG_B0_P0_U0_CFG24, 0x40010058\r
- 3370                  .set CYDEV_UCFG_B0_P0_U0_CFG25, 0x40010059\r
- 3371                  .set CYDEV_UCFG_B0_P0_U0_CFG26, 0x4001005a\r
- 3372                  .set CYDEV_UCFG_B0_P0_U0_CFG27, 0x4001005b\r
- 3373                  .set CYDEV_UCFG_B0_P0_U0_CFG28, 0x4001005c\r
- 3374                  .set CYDEV_UCFG_B0_P0_U0_CFG29, 0x4001005d\r
- 3375                  .set CYDEV_UCFG_B0_P0_U0_CFG30, 0x4001005e\r
- 3376                  .set CYDEV_UCFG_B0_P0_U0_CFG31, 0x4001005f\r
- 3377                  .set CYDEV_UCFG_B0_P0_U0_DCFG0, 0x40010060\r
- 3378                  .set CYDEV_UCFG_B0_P0_U0_DCFG1, 0x40010062\r
- 3379                  .set CYDEV_UCFG_B0_P0_U0_DCFG2, 0x40010064\r
- 3380                  .set CYDEV_UCFG_B0_P0_U0_DCFG3, 0x40010066\r
- 3381                  .set CYDEV_UCFG_B0_P0_U0_DCFG4, 0x40010068\r
- 3382                  .set CYDEV_UCFG_B0_P0_U0_DCFG5, 0x4001006a\r
- 3383                  .set CYDEV_UCFG_B0_P0_U0_DCFG6, 0x4001006c\r
- 3384                  .set CYDEV_UCFG_B0_P0_U0_DCFG7, 0x4001006e\r
- 3385                  .set CYDEV_UCFG_B0_P0_U1_BASE, 0x40010080\r
- 3386                  .set CYDEV_UCFG_B0_P0_U1_SIZE, 0x00000070\r
- 3387                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT0, 0x40010080\r
- 3388                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT1, 0x40010084\r
- 3389                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT2, 0x40010088\r
- 3390                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT3, 0x4001008c\r
- 3391                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT4, 0x40010090\r
- 3392                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT5, 0x40010094\r
- 3393                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT6, 0x40010098\r
- 3394                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT7, 0x4001009c\r
- 3395                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT8, 0x400100a0\r
- 3396                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT9, 0x400100a4\r
- 3397                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT10, 0x400100a8\r
- 3398                  .set CYDEV_UCFG_B0_P0_U1_PLD_IT11, 0x400100ac\r
- 3399                  .set CYDEV_UCFG_B0_P0_U1_PLD_ORT0, 0x400100b0\r
- 3400                  .set CYDEV_UCFG_B0_P0_U1_PLD_ORT1, 0x400100b2\r
- 3401                  .set CYDEV_UCFG_B0_P0_U1_PLD_ORT2, 0x400100b4\r
- 3402                  .set CYDEV_UCFG_B0_P0_U1_PLD_ORT3, 0x400100b6\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 61\r
-\r
-\r
- 3403                  .set CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST, 0x400100b8\r
- 3404                  .set CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB, 0x400100ba\r
- 3405                  .set CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET, 0x400100bc\r
- 3406                  .set CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS, 0x400100be\r
- 3407                  .set CYDEV_UCFG_B0_P0_U1_CFG0, 0x400100c0\r
- 3408                  .set CYDEV_UCFG_B0_P0_U1_CFG1, 0x400100c1\r
- 3409                  .set CYDEV_UCFG_B0_P0_U1_CFG2, 0x400100c2\r
- 3410                  .set CYDEV_UCFG_B0_P0_U1_CFG3, 0x400100c3\r
- 3411                  .set CYDEV_UCFG_B0_P0_U1_CFG4, 0x400100c4\r
- 3412                  .set CYDEV_UCFG_B0_P0_U1_CFG5, 0x400100c5\r
- 3413                  .set CYDEV_UCFG_B0_P0_U1_CFG6, 0x400100c6\r
- 3414                  .set CYDEV_UCFG_B0_P0_U1_CFG7, 0x400100c7\r
- 3415                  .set CYDEV_UCFG_B0_P0_U1_CFG8, 0x400100c8\r
- 3416                  .set CYDEV_UCFG_B0_P0_U1_CFG9, 0x400100c9\r
- 3417                  .set CYDEV_UCFG_B0_P0_U1_CFG10, 0x400100ca\r
- 3418                  .set CYDEV_UCFG_B0_P0_U1_CFG11, 0x400100cb\r
- 3419                  .set CYDEV_UCFG_B0_P0_U1_CFG12, 0x400100cc\r
- 3420                  .set CYDEV_UCFG_B0_P0_U1_CFG13, 0x400100cd\r
- 3421                  .set CYDEV_UCFG_B0_P0_U1_CFG14, 0x400100ce\r
- 3422                  .set CYDEV_UCFG_B0_P0_U1_CFG15, 0x400100cf\r
- 3423                  .set CYDEV_UCFG_B0_P0_U1_CFG16, 0x400100d0\r
- 3424                  .set CYDEV_UCFG_B0_P0_U1_CFG17, 0x400100d1\r
- 3425                  .set CYDEV_UCFG_B0_P0_U1_CFG18, 0x400100d2\r
- 3426                  .set CYDEV_UCFG_B0_P0_U1_CFG19, 0x400100d3\r
- 3427                  .set CYDEV_UCFG_B0_P0_U1_CFG20, 0x400100d4\r
- 3428                  .set CYDEV_UCFG_B0_P0_U1_CFG21, 0x400100d5\r
- 3429                  .set CYDEV_UCFG_B0_P0_U1_CFG22, 0x400100d6\r
- 3430                  .set CYDEV_UCFG_B0_P0_U1_CFG23, 0x400100d7\r
- 3431                  .set CYDEV_UCFG_B0_P0_U1_CFG24, 0x400100d8\r
- 3432                  .set CYDEV_UCFG_B0_P0_U1_CFG25, 0x400100d9\r
- 3433                  .set CYDEV_UCFG_B0_P0_U1_CFG26, 0x400100da\r
- 3434                  .set CYDEV_UCFG_B0_P0_U1_CFG27, 0x400100db\r
- 3435                  .set CYDEV_UCFG_B0_P0_U1_CFG28, 0x400100dc\r
- 3436                  .set CYDEV_UCFG_B0_P0_U1_CFG29, 0x400100dd\r
- 3437                  .set CYDEV_UCFG_B0_P0_U1_CFG30, 0x400100de\r
- 3438                  .set CYDEV_UCFG_B0_P0_U1_CFG31, 0x400100df\r
- 3439                  .set CYDEV_UCFG_B0_P0_U1_DCFG0, 0x400100e0\r
- 3440                  .set CYDEV_UCFG_B0_P0_U1_DCFG1, 0x400100e2\r
- 3441                  .set CYDEV_UCFG_B0_P0_U1_DCFG2, 0x400100e4\r
- 3442                  .set CYDEV_UCFG_B0_P0_U1_DCFG3, 0x400100e6\r
- 3443                  .set CYDEV_UCFG_B0_P0_U1_DCFG4, 0x400100e8\r
- 3444                  .set CYDEV_UCFG_B0_P0_U1_DCFG5, 0x400100ea\r
- 3445                  .set CYDEV_UCFG_B0_P0_U1_DCFG6, 0x400100ec\r
- 3446                  .set CYDEV_UCFG_B0_P0_U1_DCFG7, 0x400100ee\r
- 3447                  .set CYDEV_UCFG_B0_P0_ROUTE_BASE, 0x40010100\r
- 3448                  .set CYDEV_UCFG_B0_P0_ROUTE_SIZE, 0x000000ef\r
- 3449                  .set CYDEV_UCFG_B0_P1_BASE, 0x40010200\r
- 3450                  .set CYDEV_UCFG_B0_P1_SIZE, 0x000001ef\r
- 3451                  .set CYDEV_UCFG_B0_P1_U0_BASE, 0x40010200\r
- 3452                  .set CYDEV_UCFG_B0_P1_U0_SIZE, 0x00000070\r
- 3453                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT0, 0x40010200\r
- 3454                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT1, 0x40010204\r
- 3455                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT2, 0x40010208\r
- 3456                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT3, 0x4001020c\r
- 3457                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT4, 0x40010210\r
- 3458                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT5, 0x40010214\r
- 3459                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT6, 0x40010218\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 62\r
-\r
-\r
- 3460                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT7, 0x4001021c\r
- 3461                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT8, 0x40010220\r
- 3462                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT9, 0x40010224\r
- 3463                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT10, 0x40010228\r
- 3464                  .set CYDEV_UCFG_B0_P1_U0_PLD_IT11, 0x4001022c\r
- 3465                  .set CYDEV_UCFG_B0_P1_U0_PLD_ORT0, 0x40010230\r
- 3466                  .set CYDEV_UCFG_B0_P1_U0_PLD_ORT1, 0x40010232\r
- 3467                  .set CYDEV_UCFG_B0_P1_U0_PLD_ORT2, 0x40010234\r
- 3468                  .set CYDEV_UCFG_B0_P1_U0_PLD_ORT3, 0x40010236\r
- 3469                  .set CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST, 0x40010238\r
- 3470                  .set CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB, 0x4001023a\r
- 3471                  .set CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET, 0x4001023c\r
- 3472                  .set CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS, 0x4001023e\r
- 3473                  .set CYDEV_UCFG_B0_P1_U0_CFG0, 0x40010240\r
- 3474                  .set CYDEV_UCFG_B0_P1_U0_CFG1, 0x40010241\r
- 3475                  .set CYDEV_UCFG_B0_P1_U0_CFG2, 0x40010242\r
- 3476                  .set CYDEV_UCFG_B0_P1_U0_CFG3, 0x40010243\r
- 3477                  .set CYDEV_UCFG_B0_P1_U0_CFG4, 0x40010244\r
- 3478                  .set CYDEV_UCFG_B0_P1_U0_CFG5, 0x40010245\r
- 3479                  .set CYDEV_UCFG_B0_P1_U0_CFG6, 0x40010246\r
- 3480                  .set CYDEV_UCFG_B0_P1_U0_CFG7, 0x40010247\r
- 3481                  .set CYDEV_UCFG_B0_P1_U0_CFG8, 0x40010248\r
- 3482                  .set CYDEV_UCFG_B0_P1_U0_CFG9, 0x40010249\r
- 3483                  .set CYDEV_UCFG_B0_P1_U0_CFG10, 0x4001024a\r
- 3484                  .set CYDEV_UCFG_B0_P1_U0_CFG11, 0x4001024b\r
- 3485                  .set CYDEV_UCFG_B0_P1_U0_CFG12, 0x4001024c\r
- 3486                  .set CYDEV_UCFG_B0_P1_U0_CFG13, 0x4001024d\r
- 3487                  .set CYDEV_UCFG_B0_P1_U0_CFG14, 0x4001024e\r
- 3488                  .set CYDEV_UCFG_B0_P1_U0_CFG15, 0x4001024f\r
- 3489                  .set CYDEV_UCFG_B0_P1_U0_CFG16, 0x40010250\r
- 3490                  .set CYDEV_UCFG_B0_P1_U0_CFG17, 0x40010251\r
- 3491                  .set CYDEV_UCFG_B0_P1_U0_CFG18, 0x40010252\r
- 3492                  .set CYDEV_UCFG_B0_P1_U0_CFG19, 0x40010253\r
- 3493                  .set CYDEV_UCFG_B0_P1_U0_CFG20, 0x40010254\r
- 3494                  .set CYDEV_UCFG_B0_P1_U0_CFG21, 0x40010255\r
- 3495                  .set CYDEV_UCFG_B0_P1_U0_CFG22, 0x40010256\r
- 3496                  .set CYDEV_UCFG_B0_P1_U0_CFG23, 0x40010257\r
- 3497                  .set CYDEV_UCFG_B0_P1_U0_CFG24, 0x40010258\r
- 3498                  .set CYDEV_UCFG_B0_P1_U0_CFG25, 0x40010259\r
- 3499                  .set CYDEV_UCFG_B0_P1_U0_CFG26, 0x4001025a\r
- 3500                  .set CYDEV_UCFG_B0_P1_U0_CFG27, 0x4001025b\r
- 3501                  .set CYDEV_UCFG_B0_P1_U0_CFG28, 0x4001025c\r
- 3502                  .set CYDEV_UCFG_B0_P1_U0_CFG29, 0x4001025d\r
- 3503                  .set CYDEV_UCFG_B0_P1_U0_CFG30, 0x4001025e\r
- 3504                  .set CYDEV_UCFG_B0_P1_U0_CFG31, 0x4001025f\r
- 3505                  .set CYDEV_UCFG_B0_P1_U0_DCFG0, 0x40010260\r
- 3506                  .set CYDEV_UCFG_B0_P1_U0_DCFG1, 0x40010262\r
- 3507                  .set CYDEV_UCFG_B0_P1_U0_DCFG2, 0x40010264\r
- 3508                  .set CYDEV_UCFG_B0_P1_U0_DCFG3, 0x40010266\r
- 3509                  .set CYDEV_UCFG_B0_P1_U0_DCFG4, 0x40010268\r
- 3510                  .set CYDEV_UCFG_B0_P1_U0_DCFG5, 0x4001026a\r
- 3511                  .set CYDEV_UCFG_B0_P1_U0_DCFG6, 0x4001026c\r
- 3512                  .set CYDEV_UCFG_B0_P1_U0_DCFG7, 0x4001026e\r
- 3513                  .set CYDEV_UCFG_B0_P1_U1_BASE, 0x40010280\r
- 3514                  .set CYDEV_UCFG_B0_P1_U1_SIZE, 0x00000070\r
- 3515                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT0, 0x40010280\r
- 3516                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT1, 0x40010284\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 63\r
-\r
-\r
- 3517                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT2, 0x40010288\r
- 3518                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT3, 0x4001028c\r
- 3519                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT4, 0x40010290\r
- 3520                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT5, 0x40010294\r
- 3521                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT6, 0x40010298\r
- 3522                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT7, 0x4001029c\r
- 3523                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT8, 0x400102a0\r
- 3524                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT9, 0x400102a4\r
- 3525                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT10, 0x400102a8\r
- 3526                  .set CYDEV_UCFG_B0_P1_U1_PLD_IT11, 0x400102ac\r
- 3527                  .set CYDEV_UCFG_B0_P1_U1_PLD_ORT0, 0x400102b0\r
- 3528                  .set CYDEV_UCFG_B0_P1_U1_PLD_ORT1, 0x400102b2\r
- 3529                  .set CYDEV_UCFG_B0_P1_U1_PLD_ORT2, 0x400102b4\r
- 3530                  .set CYDEV_UCFG_B0_P1_U1_PLD_ORT3, 0x400102b6\r
- 3531                  .set CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST, 0x400102b8\r
- 3532                  .set CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB, 0x400102ba\r
- 3533                  .set CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET, 0x400102bc\r
- 3534                  .set CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS, 0x400102be\r
- 3535                  .set CYDEV_UCFG_B0_P1_U1_CFG0, 0x400102c0\r
- 3536                  .set CYDEV_UCFG_B0_P1_U1_CFG1, 0x400102c1\r
- 3537                  .set CYDEV_UCFG_B0_P1_U1_CFG2, 0x400102c2\r
- 3538                  .set CYDEV_UCFG_B0_P1_U1_CFG3, 0x400102c3\r
- 3539                  .set CYDEV_UCFG_B0_P1_U1_CFG4, 0x400102c4\r
- 3540                  .set CYDEV_UCFG_B0_P1_U1_CFG5, 0x400102c5\r
- 3541                  .set CYDEV_UCFG_B0_P1_U1_CFG6, 0x400102c6\r
- 3542                  .set CYDEV_UCFG_B0_P1_U1_CFG7, 0x400102c7\r
- 3543                  .set CYDEV_UCFG_B0_P1_U1_CFG8, 0x400102c8\r
- 3544                  .set CYDEV_UCFG_B0_P1_U1_CFG9, 0x400102c9\r
- 3545                  .set CYDEV_UCFG_B0_P1_U1_CFG10, 0x400102ca\r
- 3546                  .set CYDEV_UCFG_B0_P1_U1_CFG11, 0x400102cb\r
- 3547                  .set CYDEV_UCFG_B0_P1_U1_CFG12, 0x400102cc\r
- 3548                  .set CYDEV_UCFG_B0_P1_U1_CFG13, 0x400102cd\r
- 3549                  .set CYDEV_UCFG_B0_P1_U1_CFG14, 0x400102ce\r
- 3550                  .set CYDEV_UCFG_B0_P1_U1_CFG15, 0x400102cf\r
- 3551                  .set CYDEV_UCFG_B0_P1_U1_CFG16, 0x400102d0\r
- 3552                  .set CYDEV_UCFG_B0_P1_U1_CFG17, 0x400102d1\r
- 3553                  .set CYDEV_UCFG_B0_P1_U1_CFG18, 0x400102d2\r
- 3554                  .set CYDEV_UCFG_B0_P1_U1_CFG19, 0x400102d3\r
- 3555                  .set CYDEV_UCFG_B0_P1_U1_CFG20, 0x400102d4\r
- 3556                  .set CYDEV_UCFG_B0_P1_U1_CFG21, 0x400102d5\r
- 3557                  .set CYDEV_UCFG_B0_P1_U1_CFG22, 0x400102d6\r
- 3558                  .set CYDEV_UCFG_B0_P1_U1_CFG23, 0x400102d7\r
- 3559                  .set CYDEV_UCFG_B0_P1_U1_CFG24, 0x400102d8\r
- 3560                  .set CYDEV_UCFG_B0_P1_U1_CFG25, 0x400102d9\r
- 3561                  .set CYDEV_UCFG_B0_P1_U1_CFG26, 0x400102da\r
- 3562                  .set CYDEV_UCFG_B0_P1_U1_CFG27, 0x400102db\r
- 3563                  .set CYDEV_UCFG_B0_P1_U1_CFG28, 0x400102dc\r
- 3564                  .set CYDEV_UCFG_B0_P1_U1_CFG29, 0x400102dd\r
- 3565                  .set CYDEV_UCFG_B0_P1_U1_CFG30, 0x400102de\r
- 3566                  .set CYDEV_UCFG_B0_P1_U1_CFG31, 0x400102df\r
- 3567                  .set CYDEV_UCFG_B0_P1_U1_DCFG0, 0x400102e0\r
- 3568                  .set CYDEV_UCFG_B0_P1_U1_DCFG1, 0x400102e2\r
- 3569                  .set CYDEV_UCFG_B0_P1_U1_DCFG2, 0x400102e4\r
- 3570                  .set CYDEV_UCFG_B0_P1_U1_DCFG3, 0x400102e6\r
- 3571                  .set CYDEV_UCFG_B0_P1_U1_DCFG4, 0x400102e8\r
- 3572                  .set CYDEV_UCFG_B0_P1_U1_DCFG5, 0x400102ea\r
- 3573                  .set CYDEV_UCFG_B0_P1_U1_DCFG6, 0x400102ec\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 64\r
-\r
-\r
- 3574                  .set CYDEV_UCFG_B0_P1_U1_DCFG7, 0x400102ee\r
- 3575                  .set CYDEV_UCFG_B0_P1_ROUTE_BASE, 0x40010300\r
- 3576                  .set CYDEV_UCFG_B0_P1_ROUTE_SIZE, 0x000000ef\r
- 3577                  .set CYDEV_UCFG_B0_P2_BASE, 0x40010400\r
- 3578                  .set CYDEV_UCFG_B0_P2_SIZE, 0x000001ef\r
- 3579                  .set CYDEV_UCFG_B0_P2_U0_BASE, 0x40010400\r
- 3580                  .set CYDEV_UCFG_B0_P2_U0_SIZE, 0x00000070\r
- 3581                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT0, 0x40010400\r
- 3582                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT1, 0x40010404\r
- 3583                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT2, 0x40010408\r
- 3584                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT3, 0x4001040c\r
- 3585                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT4, 0x40010410\r
- 3586                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT5, 0x40010414\r
- 3587                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT6, 0x40010418\r
- 3588                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT7, 0x4001041c\r
- 3589                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT8, 0x40010420\r
- 3590                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT9, 0x40010424\r
- 3591                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT10, 0x40010428\r
- 3592                  .set CYDEV_UCFG_B0_P2_U0_PLD_IT11, 0x4001042c\r
- 3593                  .set CYDEV_UCFG_B0_P2_U0_PLD_ORT0, 0x40010430\r
- 3594                  .set CYDEV_UCFG_B0_P2_U0_PLD_ORT1, 0x40010432\r
- 3595                  .set CYDEV_UCFG_B0_P2_U0_PLD_ORT2, 0x40010434\r
- 3596                  .set CYDEV_UCFG_B0_P2_U0_PLD_ORT3, 0x40010436\r
- 3597                  .set CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST, 0x40010438\r
- 3598                  .set CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB, 0x4001043a\r
- 3599                  .set CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET, 0x4001043c\r
- 3600                  .set CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS, 0x4001043e\r
- 3601                  .set CYDEV_UCFG_B0_P2_U0_CFG0, 0x40010440\r
- 3602                  .set CYDEV_UCFG_B0_P2_U0_CFG1, 0x40010441\r
- 3603                  .set CYDEV_UCFG_B0_P2_U0_CFG2, 0x40010442\r
- 3604                  .set CYDEV_UCFG_B0_P2_U0_CFG3, 0x40010443\r
- 3605                  .set CYDEV_UCFG_B0_P2_U0_CFG4, 0x40010444\r
- 3606                  .set CYDEV_UCFG_B0_P2_U0_CFG5, 0x40010445\r
- 3607                  .set CYDEV_UCFG_B0_P2_U0_CFG6, 0x40010446\r
- 3608                  .set CYDEV_UCFG_B0_P2_U0_CFG7, 0x40010447\r
- 3609                  .set CYDEV_UCFG_B0_P2_U0_CFG8, 0x40010448\r
- 3610                  .set CYDEV_UCFG_B0_P2_U0_CFG9, 0x40010449\r
- 3611                  .set CYDEV_UCFG_B0_P2_U0_CFG10, 0x4001044a\r
- 3612                  .set CYDEV_UCFG_B0_P2_U0_CFG11, 0x4001044b\r
- 3613                  .set CYDEV_UCFG_B0_P2_U0_CFG12, 0x4001044c\r
- 3614                  .set CYDEV_UCFG_B0_P2_U0_CFG13, 0x4001044d\r
- 3615                  .set CYDEV_UCFG_B0_P2_U0_CFG14, 0x4001044e\r
- 3616                  .set CYDEV_UCFG_B0_P2_U0_CFG15, 0x4001044f\r
- 3617                  .set CYDEV_UCFG_B0_P2_U0_CFG16, 0x40010450\r
- 3618                  .set CYDEV_UCFG_B0_P2_U0_CFG17, 0x40010451\r
- 3619                  .set CYDEV_UCFG_B0_P2_U0_CFG18, 0x40010452\r
- 3620                  .set CYDEV_UCFG_B0_P2_U0_CFG19, 0x40010453\r
- 3621                  .set CYDEV_UCFG_B0_P2_U0_CFG20, 0x40010454\r
- 3622                  .set CYDEV_UCFG_B0_P2_U0_CFG21, 0x40010455\r
- 3623                  .set CYDEV_UCFG_B0_P2_U0_CFG22, 0x40010456\r
- 3624                  .set CYDEV_UCFG_B0_P2_U0_CFG23, 0x40010457\r
- 3625                  .set CYDEV_UCFG_B0_P2_U0_CFG24, 0x40010458\r
- 3626                  .set CYDEV_UCFG_B0_P2_U0_CFG25, 0x40010459\r
- 3627                  .set CYDEV_UCFG_B0_P2_U0_CFG26, 0x4001045a\r
- 3628                  .set CYDEV_UCFG_B0_P2_U0_CFG27, 0x4001045b\r
- 3629                  .set CYDEV_UCFG_B0_P2_U0_CFG28, 0x4001045c\r
- 3630                  .set CYDEV_UCFG_B0_P2_U0_CFG29, 0x4001045d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 65\r
-\r
-\r
- 3631                  .set CYDEV_UCFG_B0_P2_U0_CFG30, 0x4001045e\r
- 3632                  .set CYDEV_UCFG_B0_P2_U0_CFG31, 0x4001045f\r
- 3633                  .set CYDEV_UCFG_B0_P2_U0_DCFG0, 0x40010460\r
- 3634                  .set CYDEV_UCFG_B0_P2_U0_DCFG1, 0x40010462\r
- 3635                  .set CYDEV_UCFG_B0_P2_U0_DCFG2, 0x40010464\r
- 3636                  .set CYDEV_UCFG_B0_P2_U0_DCFG3, 0x40010466\r
- 3637                  .set CYDEV_UCFG_B0_P2_U0_DCFG4, 0x40010468\r
- 3638                  .set CYDEV_UCFG_B0_P2_U0_DCFG5, 0x4001046a\r
- 3639                  .set CYDEV_UCFG_B0_P2_U0_DCFG6, 0x4001046c\r
- 3640                  .set CYDEV_UCFG_B0_P2_U0_DCFG7, 0x4001046e\r
- 3641                  .set CYDEV_UCFG_B0_P2_U1_BASE, 0x40010480\r
- 3642                  .set CYDEV_UCFG_B0_P2_U1_SIZE, 0x00000070\r
- 3643                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT0, 0x40010480\r
- 3644                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT1, 0x40010484\r
- 3645                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT2, 0x40010488\r
- 3646                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT3, 0x4001048c\r
- 3647                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT4, 0x40010490\r
- 3648                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT5, 0x40010494\r
- 3649                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT6, 0x40010498\r
- 3650                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT7, 0x4001049c\r
- 3651                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT8, 0x400104a0\r
- 3652                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT9, 0x400104a4\r
- 3653                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT10, 0x400104a8\r
- 3654                  .set CYDEV_UCFG_B0_P2_U1_PLD_IT11, 0x400104ac\r
- 3655                  .set CYDEV_UCFG_B0_P2_U1_PLD_ORT0, 0x400104b0\r
- 3656                  .set CYDEV_UCFG_B0_P2_U1_PLD_ORT1, 0x400104b2\r
- 3657                  .set CYDEV_UCFG_B0_P2_U1_PLD_ORT2, 0x400104b4\r
- 3658                  .set CYDEV_UCFG_B0_P2_U1_PLD_ORT3, 0x400104b6\r
- 3659                  .set CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST, 0x400104b8\r
- 3660                  .set CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB, 0x400104ba\r
- 3661                  .set CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET, 0x400104bc\r
- 3662                  .set CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS, 0x400104be\r
- 3663                  .set CYDEV_UCFG_B0_P2_U1_CFG0, 0x400104c0\r
- 3664                  .set CYDEV_UCFG_B0_P2_U1_CFG1, 0x400104c1\r
- 3665                  .set CYDEV_UCFG_B0_P2_U1_CFG2, 0x400104c2\r
- 3666                  .set CYDEV_UCFG_B0_P2_U1_CFG3, 0x400104c3\r
- 3667                  .set CYDEV_UCFG_B0_P2_U1_CFG4, 0x400104c4\r
- 3668                  .set CYDEV_UCFG_B0_P2_U1_CFG5, 0x400104c5\r
- 3669                  .set CYDEV_UCFG_B0_P2_U1_CFG6, 0x400104c6\r
- 3670                  .set CYDEV_UCFG_B0_P2_U1_CFG7, 0x400104c7\r
- 3671                  .set CYDEV_UCFG_B0_P2_U1_CFG8, 0x400104c8\r
- 3672                  .set CYDEV_UCFG_B0_P2_U1_CFG9, 0x400104c9\r
- 3673                  .set CYDEV_UCFG_B0_P2_U1_CFG10, 0x400104ca\r
- 3674                  .set CYDEV_UCFG_B0_P2_U1_CFG11, 0x400104cb\r
- 3675                  .set CYDEV_UCFG_B0_P2_U1_CFG12, 0x400104cc\r
- 3676                  .set CYDEV_UCFG_B0_P2_U1_CFG13, 0x400104cd\r
- 3677                  .set CYDEV_UCFG_B0_P2_U1_CFG14, 0x400104ce\r
- 3678                  .set CYDEV_UCFG_B0_P2_U1_CFG15, 0x400104cf\r
- 3679                  .set CYDEV_UCFG_B0_P2_U1_CFG16, 0x400104d0\r
- 3680                  .set CYDEV_UCFG_B0_P2_U1_CFG17, 0x400104d1\r
- 3681                  .set CYDEV_UCFG_B0_P2_U1_CFG18, 0x400104d2\r
- 3682                  .set CYDEV_UCFG_B0_P2_U1_CFG19, 0x400104d3\r
- 3683                  .set CYDEV_UCFG_B0_P2_U1_CFG20, 0x400104d4\r
- 3684                  .set CYDEV_UCFG_B0_P2_U1_CFG21, 0x400104d5\r
- 3685                  .set CYDEV_UCFG_B0_P2_U1_CFG22, 0x400104d6\r
- 3686                  .set CYDEV_UCFG_B0_P2_U1_CFG23, 0x400104d7\r
- 3687                  .set CYDEV_UCFG_B0_P2_U1_CFG24, 0x400104d8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 66\r
-\r
-\r
- 3688                  .set CYDEV_UCFG_B0_P2_U1_CFG25, 0x400104d9\r
- 3689                  .set CYDEV_UCFG_B0_P2_U1_CFG26, 0x400104da\r
- 3690                  .set CYDEV_UCFG_B0_P2_U1_CFG27, 0x400104db\r
- 3691                  .set CYDEV_UCFG_B0_P2_U1_CFG28, 0x400104dc\r
- 3692                  .set CYDEV_UCFG_B0_P2_U1_CFG29, 0x400104dd\r
- 3693                  .set CYDEV_UCFG_B0_P2_U1_CFG30, 0x400104de\r
- 3694                  .set CYDEV_UCFG_B0_P2_U1_CFG31, 0x400104df\r
- 3695                  .set CYDEV_UCFG_B0_P2_U1_DCFG0, 0x400104e0\r
- 3696                  .set CYDEV_UCFG_B0_P2_U1_DCFG1, 0x400104e2\r
- 3697                  .set CYDEV_UCFG_B0_P2_U1_DCFG2, 0x400104e4\r
- 3698                  .set CYDEV_UCFG_B0_P2_U1_DCFG3, 0x400104e6\r
- 3699                  .set CYDEV_UCFG_B0_P2_U1_DCFG4, 0x400104e8\r
- 3700                  .set CYDEV_UCFG_B0_P2_U1_DCFG5, 0x400104ea\r
- 3701                  .set CYDEV_UCFG_B0_P2_U1_DCFG6, 0x400104ec\r
- 3702                  .set CYDEV_UCFG_B0_P2_U1_DCFG7, 0x400104ee\r
- 3703                  .set CYDEV_UCFG_B0_P2_ROUTE_BASE, 0x40010500\r
- 3704                  .set CYDEV_UCFG_B0_P2_ROUTE_SIZE, 0x000000ef\r
- 3705                  .set CYDEV_UCFG_B0_P3_BASE, 0x40010600\r
- 3706                  .set CYDEV_UCFG_B0_P3_SIZE, 0x000001ef\r
- 3707                  .set CYDEV_UCFG_B0_P3_U0_BASE, 0x40010600\r
- 3708                  .set CYDEV_UCFG_B0_P3_U0_SIZE, 0x00000070\r
- 3709                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT0, 0x40010600\r
- 3710                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT1, 0x40010604\r
- 3711                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT2, 0x40010608\r
- 3712                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT3, 0x4001060c\r
- 3713                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT4, 0x40010610\r
- 3714                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT5, 0x40010614\r
- 3715                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT6, 0x40010618\r
- 3716                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT7, 0x4001061c\r
- 3717                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT8, 0x40010620\r
- 3718                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT9, 0x40010624\r
- 3719                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT10, 0x40010628\r
- 3720                  .set CYDEV_UCFG_B0_P3_U0_PLD_IT11, 0x4001062c\r
- 3721                  .set CYDEV_UCFG_B0_P3_U0_PLD_ORT0, 0x40010630\r
- 3722                  .set CYDEV_UCFG_B0_P3_U0_PLD_ORT1, 0x40010632\r
- 3723                  .set CYDEV_UCFG_B0_P3_U0_PLD_ORT2, 0x40010634\r
- 3724                  .set CYDEV_UCFG_B0_P3_U0_PLD_ORT3, 0x40010636\r
- 3725                  .set CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST, 0x40010638\r
- 3726                  .set CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB, 0x4001063a\r
- 3727                  .set CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET, 0x4001063c\r
- 3728                  .set CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS, 0x4001063e\r
- 3729                  .set CYDEV_UCFG_B0_P3_U0_CFG0, 0x40010640\r
- 3730                  .set CYDEV_UCFG_B0_P3_U0_CFG1, 0x40010641\r
- 3731                  .set CYDEV_UCFG_B0_P3_U0_CFG2, 0x40010642\r
- 3732                  .set CYDEV_UCFG_B0_P3_U0_CFG3, 0x40010643\r
- 3733                  .set CYDEV_UCFG_B0_P3_U0_CFG4, 0x40010644\r
- 3734                  .set CYDEV_UCFG_B0_P3_U0_CFG5, 0x40010645\r
- 3735                  .set CYDEV_UCFG_B0_P3_U0_CFG6, 0x40010646\r
- 3736                  .set CYDEV_UCFG_B0_P3_U0_CFG7, 0x40010647\r
- 3737                  .set CYDEV_UCFG_B0_P3_U0_CFG8, 0x40010648\r
- 3738                  .set CYDEV_UCFG_B0_P3_U0_CFG9, 0x40010649\r
- 3739                  .set CYDEV_UCFG_B0_P3_U0_CFG10, 0x4001064a\r
- 3740                  .set CYDEV_UCFG_B0_P3_U0_CFG11, 0x4001064b\r
- 3741                  .set CYDEV_UCFG_B0_P3_U0_CFG12, 0x4001064c\r
- 3742                  .set CYDEV_UCFG_B0_P3_U0_CFG13, 0x4001064d\r
- 3743                  .set CYDEV_UCFG_B0_P3_U0_CFG14, 0x4001064e\r
- 3744                  .set CYDEV_UCFG_B0_P3_U0_CFG15, 0x4001064f\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 67\r
-\r
-\r
- 3745                  .set CYDEV_UCFG_B0_P3_U0_CFG16, 0x40010650\r
- 3746                  .set CYDEV_UCFG_B0_P3_U0_CFG17, 0x40010651\r
- 3747                  .set CYDEV_UCFG_B0_P3_U0_CFG18, 0x40010652\r
- 3748                  .set CYDEV_UCFG_B0_P3_U0_CFG19, 0x40010653\r
- 3749                  .set CYDEV_UCFG_B0_P3_U0_CFG20, 0x40010654\r
- 3750                  .set CYDEV_UCFG_B0_P3_U0_CFG21, 0x40010655\r
- 3751                  .set CYDEV_UCFG_B0_P3_U0_CFG22, 0x40010656\r
- 3752                  .set CYDEV_UCFG_B0_P3_U0_CFG23, 0x40010657\r
- 3753                  .set CYDEV_UCFG_B0_P3_U0_CFG24, 0x40010658\r
- 3754                  .set CYDEV_UCFG_B0_P3_U0_CFG25, 0x40010659\r
- 3755                  .set CYDEV_UCFG_B0_P3_U0_CFG26, 0x4001065a\r
- 3756                  .set CYDEV_UCFG_B0_P3_U0_CFG27, 0x4001065b\r
- 3757                  .set CYDEV_UCFG_B0_P3_U0_CFG28, 0x4001065c\r
- 3758                  .set CYDEV_UCFG_B0_P3_U0_CFG29, 0x4001065d\r
- 3759                  .set CYDEV_UCFG_B0_P3_U0_CFG30, 0x4001065e\r
- 3760                  .set CYDEV_UCFG_B0_P3_U0_CFG31, 0x4001065f\r
- 3761                  .set CYDEV_UCFG_B0_P3_U0_DCFG0, 0x40010660\r
- 3762                  .set CYDEV_UCFG_B0_P3_U0_DCFG1, 0x40010662\r
- 3763                  .set CYDEV_UCFG_B0_P3_U0_DCFG2, 0x40010664\r
- 3764                  .set CYDEV_UCFG_B0_P3_U0_DCFG3, 0x40010666\r
- 3765                  .set CYDEV_UCFG_B0_P3_U0_DCFG4, 0x40010668\r
- 3766                  .set CYDEV_UCFG_B0_P3_U0_DCFG5, 0x4001066a\r
- 3767                  .set CYDEV_UCFG_B0_P3_U0_DCFG6, 0x4001066c\r
- 3768                  .set CYDEV_UCFG_B0_P3_U0_DCFG7, 0x4001066e\r
- 3769                  .set CYDEV_UCFG_B0_P3_U1_BASE, 0x40010680\r
- 3770                  .set CYDEV_UCFG_B0_P3_U1_SIZE, 0x00000070\r
- 3771                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT0, 0x40010680\r
- 3772                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT1, 0x40010684\r
- 3773                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT2, 0x40010688\r
- 3774                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT3, 0x4001068c\r
- 3775                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT4, 0x40010690\r
- 3776                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT5, 0x40010694\r
- 3777                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT6, 0x40010698\r
- 3778                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT7, 0x4001069c\r
- 3779                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT8, 0x400106a0\r
- 3780                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT9, 0x400106a4\r
- 3781                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT10, 0x400106a8\r
- 3782                  .set CYDEV_UCFG_B0_P3_U1_PLD_IT11, 0x400106ac\r
- 3783                  .set CYDEV_UCFG_B0_P3_U1_PLD_ORT0, 0x400106b0\r
- 3784                  .set CYDEV_UCFG_B0_P3_U1_PLD_ORT1, 0x400106b2\r
- 3785                  .set CYDEV_UCFG_B0_P3_U1_PLD_ORT2, 0x400106b4\r
- 3786                  .set CYDEV_UCFG_B0_P3_U1_PLD_ORT3, 0x400106b6\r
- 3787                  .set CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST, 0x400106b8\r
- 3788                  .set CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB, 0x400106ba\r
- 3789                  .set CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET, 0x400106bc\r
- 3790                  .set CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS, 0x400106be\r
- 3791                  .set CYDEV_UCFG_B0_P3_U1_CFG0, 0x400106c0\r
- 3792                  .set CYDEV_UCFG_B0_P3_U1_CFG1, 0x400106c1\r
- 3793                  .set CYDEV_UCFG_B0_P3_U1_CFG2, 0x400106c2\r
- 3794                  .set CYDEV_UCFG_B0_P3_U1_CFG3, 0x400106c3\r
- 3795                  .set CYDEV_UCFG_B0_P3_U1_CFG4, 0x400106c4\r
- 3796                  .set CYDEV_UCFG_B0_P3_U1_CFG5, 0x400106c5\r
- 3797                  .set CYDEV_UCFG_B0_P3_U1_CFG6, 0x400106c6\r
- 3798                  .set CYDEV_UCFG_B0_P3_U1_CFG7, 0x400106c7\r
- 3799                  .set CYDEV_UCFG_B0_P3_U1_CFG8, 0x400106c8\r
- 3800                  .set CYDEV_UCFG_B0_P3_U1_CFG9, 0x400106c9\r
- 3801                  .set CYDEV_UCFG_B0_P3_U1_CFG10, 0x400106ca\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 68\r
-\r
-\r
- 3802                  .set CYDEV_UCFG_B0_P3_U1_CFG11, 0x400106cb\r
- 3803                  .set CYDEV_UCFG_B0_P3_U1_CFG12, 0x400106cc\r
- 3804                  .set CYDEV_UCFG_B0_P3_U1_CFG13, 0x400106cd\r
- 3805                  .set CYDEV_UCFG_B0_P3_U1_CFG14, 0x400106ce\r
- 3806                  .set CYDEV_UCFG_B0_P3_U1_CFG15, 0x400106cf\r
- 3807                  .set CYDEV_UCFG_B0_P3_U1_CFG16, 0x400106d0\r
- 3808                  .set CYDEV_UCFG_B0_P3_U1_CFG17, 0x400106d1\r
- 3809                  .set CYDEV_UCFG_B0_P3_U1_CFG18, 0x400106d2\r
- 3810                  .set CYDEV_UCFG_B0_P3_U1_CFG19, 0x400106d3\r
- 3811                  .set CYDEV_UCFG_B0_P3_U1_CFG20, 0x400106d4\r
- 3812                  .set CYDEV_UCFG_B0_P3_U1_CFG21, 0x400106d5\r
- 3813                  .set CYDEV_UCFG_B0_P3_U1_CFG22, 0x400106d6\r
- 3814                  .set CYDEV_UCFG_B0_P3_U1_CFG23, 0x400106d7\r
- 3815                  .set CYDEV_UCFG_B0_P3_U1_CFG24, 0x400106d8\r
- 3816                  .set CYDEV_UCFG_B0_P3_U1_CFG25, 0x400106d9\r
- 3817                  .set CYDEV_UCFG_B0_P3_U1_CFG26, 0x400106da\r
- 3818                  .set CYDEV_UCFG_B0_P3_U1_CFG27, 0x400106db\r
- 3819                  .set CYDEV_UCFG_B0_P3_U1_CFG28, 0x400106dc\r
- 3820                  .set CYDEV_UCFG_B0_P3_U1_CFG29, 0x400106dd\r
- 3821                  .set CYDEV_UCFG_B0_P3_U1_CFG30, 0x400106de\r
- 3822                  .set CYDEV_UCFG_B0_P3_U1_CFG31, 0x400106df\r
- 3823                  .set CYDEV_UCFG_B0_P3_U1_DCFG0, 0x400106e0\r
- 3824                  .set CYDEV_UCFG_B0_P3_U1_DCFG1, 0x400106e2\r
- 3825                  .set CYDEV_UCFG_B0_P3_U1_DCFG2, 0x400106e4\r
- 3826                  .set CYDEV_UCFG_B0_P3_U1_DCFG3, 0x400106e6\r
- 3827                  .set CYDEV_UCFG_B0_P3_U1_DCFG4, 0x400106e8\r
- 3828                  .set CYDEV_UCFG_B0_P3_U1_DCFG5, 0x400106ea\r
- 3829                  .set CYDEV_UCFG_B0_P3_U1_DCFG6, 0x400106ec\r
- 3830                  .set CYDEV_UCFG_B0_P3_U1_DCFG7, 0x400106ee\r
- 3831                  .set CYDEV_UCFG_B0_P3_ROUTE_BASE, 0x40010700\r
- 3832                  .set CYDEV_UCFG_B0_P3_ROUTE_SIZE, 0x000000ef\r
- 3833                  .set CYDEV_UCFG_B0_P4_BASE, 0x40010800\r
- 3834                  .set CYDEV_UCFG_B0_P4_SIZE, 0x000001ef\r
- 3835                  .set CYDEV_UCFG_B0_P4_U0_BASE, 0x40010800\r
- 3836                  .set CYDEV_UCFG_B0_P4_U0_SIZE, 0x00000070\r
- 3837                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT0, 0x40010800\r
- 3838                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT1, 0x40010804\r
- 3839                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT2, 0x40010808\r
- 3840                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT3, 0x4001080c\r
- 3841                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT4, 0x40010810\r
- 3842                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT5, 0x40010814\r
- 3843                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT6, 0x40010818\r
- 3844                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT7, 0x4001081c\r
- 3845                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT8, 0x40010820\r
- 3846                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT9, 0x40010824\r
- 3847                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT10, 0x40010828\r
- 3848                  .set CYDEV_UCFG_B0_P4_U0_PLD_IT11, 0x4001082c\r
- 3849                  .set CYDEV_UCFG_B0_P4_U0_PLD_ORT0, 0x40010830\r
- 3850                  .set CYDEV_UCFG_B0_P4_U0_PLD_ORT1, 0x40010832\r
- 3851                  .set CYDEV_UCFG_B0_P4_U0_PLD_ORT2, 0x40010834\r
- 3852                  .set CYDEV_UCFG_B0_P4_U0_PLD_ORT3, 0x40010836\r
- 3853                  .set CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST, 0x40010838\r
- 3854                  .set CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB, 0x4001083a\r
- 3855                  .set CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET, 0x4001083c\r
- 3856                  .set CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS, 0x4001083e\r
- 3857                  .set CYDEV_UCFG_B0_P4_U0_CFG0, 0x40010840\r
- 3858                  .set CYDEV_UCFG_B0_P4_U0_CFG1, 0x40010841\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 69\r
-\r
-\r
- 3859                  .set CYDEV_UCFG_B0_P4_U0_CFG2, 0x40010842\r
- 3860                  .set CYDEV_UCFG_B0_P4_U0_CFG3, 0x40010843\r
- 3861                  .set CYDEV_UCFG_B0_P4_U0_CFG4, 0x40010844\r
- 3862                  .set CYDEV_UCFG_B0_P4_U0_CFG5, 0x40010845\r
- 3863                  .set CYDEV_UCFG_B0_P4_U0_CFG6, 0x40010846\r
- 3864                  .set CYDEV_UCFG_B0_P4_U0_CFG7, 0x40010847\r
- 3865                  .set CYDEV_UCFG_B0_P4_U0_CFG8, 0x40010848\r
- 3866                  .set CYDEV_UCFG_B0_P4_U0_CFG9, 0x40010849\r
- 3867                  .set CYDEV_UCFG_B0_P4_U0_CFG10, 0x4001084a\r
- 3868                  .set CYDEV_UCFG_B0_P4_U0_CFG11, 0x4001084b\r
- 3869                  .set CYDEV_UCFG_B0_P4_U0_CFG12, 0x4001084c\r
- 3870                  .set CYDEV_UCFG_B0_P4_U0_CFG13, 0x4001084d\r
- 3871                  .set CYDEV_UCFG_B0_P4_U0_CFG14, 0x4001084e\r
- 3872                  .set CYDEV_UCFG_B0_P4_U0_CFG15, 0x4001084f\r
- 3873                  .set CYDEV_UCFG_B0_P4_U0_CFG16, 0x40010850\r
- 3874                  .set CYDEV_UCFG_B0_P4_U0_CFG17, 0x40010851\r
- 3875                  .set CYDEV_UCFG_B0_P4_U0_CFG18, 0x40010852\r
- 3876                  .set CYDEV_UCFG_B0_P4_U0_CFG19, 0x40010853\r
- 3877                  .set CYDEV_UCFG_B0_P4_U0_CFG20, 0x40010854\r
- 3878                  .set CYDEV_UCFG_B0_P4_U0_CFG21, 0x40010855\r
- 3879                  .set CYDEV_UCFG_B0_P4_U0_CFG22, 0x40010856\r
- 3880                  .set CYDEV_UCFG_B0_P4_U0_CFG23, 0x40010857\r
- 3881                  .set CYDEV_UCFG_B0_P4_U0_CFG24, 0x40010858\r
- 3882                  .set CYDEV_UCFG_B0_P4_U0_CFG25, 0x40010859\r
- 3883                  .set CYDEV_UCFG_B0_P4_U0_CFG26, 0x4001085a\r
- 3884                  .set CYDEV_UCFG_B0_P4_U0_CFG27, 0x4001085b\r
- 3885                  .set CYDEV_UCFG_B0_P4_U0_CFG28, 0x4001085c\r
- 3886                  .set CYDEV_UCFG_B0_P4_U0_CFG29, 0x4001085d\r
- 3887                  .set CYDEV_UCFG_B0_P4_U0_CFG30, 0x4001085e\r
- 3888                  .set CYDEV_UCFG_B0_P4_U0_CFG31, 0x4001085f\r
- 3889                  .set CYDEV_UCFG_B0_P4_U0_DCFG0, 0x40010860\r
- 3890                  .set CYDEV_UCFG_B0_P4_U0_DCFG1, 0x40010862\r
- 3891                  .set CYDEV_UCFG_B0_P4_U0_DCFG2, 0x40010864\r
- 3892                  .set CYDEV_UCFG_B0_P4_U0_DCFG3, 0x40010866\r
- 3893                  .set CYDEV_UCFG_B0_P4_U0_DCFG4, 0x40010868\r
- 3894                  .set CYDEV_UCFG_B0_P4_U0_DCFG5, 0x4001086a\r
- 3895                  .set CYDEV_UCFG_B0_P4_U0_DCFG6, 0x4001086c\r
- 3896                  .set CYDEV_UCFG_B0_P4_U0_DCFG7, 0x4001086e\r
- 3897                  .set CYDEV_UCFG_B0_P4_U1_BASE, 0x40010880\r
- 3898                  .set CYDEV_UCFG_B0_P4_U1_SIZE, 0x00000070\r
- 3899                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT0, 0x40010880\r
- 3900                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT1, 0x40010884\r
- 3901                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT2, 0x40010888\r
- 3902                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT3, 0x4001088c\r
- 3903                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT4, 0x40010890\r
- 3904                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT5, 0x40010894\r
- 3905                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT6, 0x40010898\r
- 3906                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT7, 0x4001089c\r
- 3907                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT8, 0x400108a0\r
- 3908                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT9, 0x400108a4\r
- 3909                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT10, 0x400108a8\r
- 3910                  .set CYDEV_UCFG_B0_P4_U1_PLD_IT11, 0x400108ac\r
- 3911                  .set CYDEV_UCFG_B0_P4_U1_PLD_ORT0, 0x400108b0\r
- 3912                  .set CYDEV_UCFG_B0_P4_U1_PLD_ORT1, 0x400108b2\r
- 3913                  .set CYDEV_UCFG_B0_P4_U1_PLD_ORT2, 0x400108b4\r
- 3914                  .set CYDEV_UCFG_B0_P4_U1_PLD_ORT3, 0x400108b6\r
- 3915                  .set CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST, 0x400108b8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 70\r
-\r
-\r
- 3916                  .set CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB, 0x400108ba\r
- 3917                  .set CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET, 0x400108bc\r
- 3918                  .set CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS, 0x400108be\r
- 3919                  .set CYDEV_UCFG_B0_P4_U1_CFG0, 0x400108c0\r
- 3920                  .set CYDEV_UCFG_B0_P4_U1_CFG1, 0x400108c1\r
- 3921                  .set CYDEV_UCFG_B0_P4_U1_CFG2, 0x400108c2\r
- 3922                  .set CYDEV_UCFG_B0_P4_U1_CFG3, 0x400108c3\r
- 3923                  .set CYDEV_UCFG_B0_P4_U1_CFG4, 0x400108c4\r
- 3924                  .set CYDEV_UCFG_B0_P4_U1_CFG5, 0x400108c5\r
- 3925                  .set CYDEV_UCFG_B0_P4_U1_CFG6, 0x400108c6\r
- 3926                  .set CYDEV_UCFG_B0_P4_U1_CFG7, 0x400108c7\r
- 3927                  .set CYDEV_UCFG_B0_P4_U1_CFG8, 0x400108c8\r
- 3928                  .set CYDEV_UCFG_B0_P4_U1_CFG9, 0x400108c9\r
- 3929                  .set CYDEV_UCFG_B0_P4_U1_CFG10, 0x400108ca\r
- 3930                  .set CYDEV_UCFG_B0_P4_U1_CFG11, 0x400108cb\r
- 3931                  .set CYDEV_UCFG_B0_P4_U1_CFG12, 0x400108cc\r
- 3932                  .set CYDEV_UCFG_B0_P4_U1_CFG13, 0x400108cd\r
- 3933                  .set CYDEV_UCFG_B0_P4_U1_CFG14, 0x400108ce\r
- 3934                  .set CYDEV_UCFG_B0_P4_U1_CFG15, 0x400108cf\r
- 3935                  .set CYDEV_UCFG_B0_P4_U1_CFG16, 0x400108d0\r
- 3936                  .set CYDEV_UCFG_B0_P4_U1_CFG17, 0x400108d1\r
- 3937                  .set CYDEV_UCFG_B0_P4_U1_CFG18, 0x400108d2\r
- 3938                  .set CYDEV_UCFG_B0_P4_U1_CFG19, 0x400108d3\r
- 3939                  .set CYDEV_UCFG_B0_P4_U1_CFG20, 0x400108d4\r
- 3940                  .set CYDEV_UCFG_B0_P4_U1_CFG21, 0x400108d5\r
- 3941                  .set CYDEV_UCFG_B0_P4_U1_CFG22, 0x400108d6\r
- 3942                  .set CYDEV_UCFG_B0_P4_U1_CFG23, 0x400108d7\r
- 3943                  .set CYDEV_UCFG_B0_P4_U1_CFG24, 0x400108d8\r
- 3944                  .set CYDEV_UCFG_B0_P4_U1_CFG25, 0x400108d9\r
- 3945                  .set CYDEV_UCFG_B0_P4_U1_CFG26, 0x400108da\r
- 3946                  .set CYDEV_UCFG_B0_P4_U1_CFG27, 0x400108db\r
- 3947                  .set CYDEV_UCFG_B0_P4_U1_CFG28, 0x400108dc\r
- 3948                  .set CYDEV_UCFG_B0_P4_U1_CFG29, 0x400108dd\r
- 3949                  .set CYDEV_UCFG_B0_P4_U1_CFG30, 0x400108de\r
- 3950                  .set CYDEV_UCFG_B0_P4_U1_CFG31, 0x400108df\r
- 3951                  .set CYDEV_UCFG_B0_P4_U1_DCFG0, 0x400108e0\r
- 3952                  .set CYDEV_UCFG_B0_P4_U1_DCFG1, 0x400108e2\r
- 3953                  .set CYDEV_UCFG_B0_P4_U1_DCFG2, 0x400108e4\r
- 3954                  .set CYDEV_UCFG_B0_P4_U1_DCFG3, 0x400108e6\r
- 3955                  .set CYDEV_UCFG_B0_P4_U1_DCFG4, 0x400108e8\r
- 3956                  .set CYDEV_UCFG_B0_P4_U1_DCFG5, 0x400108ea\r
- 3957                  .set CYDEV_UCFG_B0_P4_U1_DCFG6, 0x400108ec\r
- 3958                  .set CYDEV_UCFG_B0_P4_U1_DCFG7, 0x400108ee\r
- 3959                  .set CYDEV_UCFG_B0_P4_ROUTE_BASE, 0x40010900\r
- 3960                  .set CYDEV_UCFG_B0_P4_ROUTE_SIZE, 0x000000ef\r
- 3961                  .set CYDEV_UCFG_B0_P5_BASE, 0x40010a00\r
- 3962                  .set CYDEV_UCFG_B0_P5_SIZE, 0x000001ef\r
- 3963                  .set CYDEV_UCFG_B0_P5_U0_BASE, 0x40010a00\r
- 3964                  .set CYDEV_UCFG_B0_P5_U0_SIZE, 0x00000070\r
- 3965                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT0, 0x40010a00\r
- 3966                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT1, 0x40010a04\r
- 3967                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT2, 0x40010a08\r
- 3968                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT3, 0x40010a0c\r
- 3969                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT4, 0x40010a10\r
- 3970                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT5, 0x40010a14\r
- 3971                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT6, 0x40010a18\r
- 3972                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT7, 0x40010a1c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 71\r
-\r
-\r
- 3973                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT8, 0x40010a20\r
- 3974                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT9, 0x40010a24\r
- 3975                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT10, 0x40010a28\r
- 3976                  .set CYDEV_UCFG_B0_P5_U0_PLD_IT11, 0x40010a2c\r
- 3977                  .set CYDEV_UCFG_B0_P5_U0_PLD_ORT0, 0x40010a30\r
- 3978                  .set CYDEV_UCFG_B0_P5_U0_PLD_ORT1, 0x40010a32\r
- 3979                  .set CYDEV_UCFG_B0_P5_U0_PLD_ORT2, 0x40010a34\r
- 3980                  .set CYDEV_UCFG_B0_P5_U0_PLD_ORT3, 0x40010a36\r
- 3981                  .set CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST, 0x40010a38\r
- 3982                  .set CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB, 0x40010a3a\r
- 3983                  .set CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET, 0x40010a3c\r
- 3984                  .set CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS, 0x40010a3e\r
- 3985                  .set CYDEV_UCFG_B0_P5_U0_CFG0, 0x40010a40\r
- 3986                  .set CYDEV_UCFG_B0_P5_U0_CFG1, 0x40010a41\r
- 3987                  .set CYDEV_UCFG_B0_P5_U0_CFG2, 0x40010a42\r
- 3988                  .set CYDEV_UCFG_B0_P5_U0_CFG3, 0x40010a43\r
- 3989                  .set CYDEV_UCFG_B0_P5_U0_CFG4, 0x40010a44\r
- 3990                  .set CYDEV_UCFG_B0_P5_U0_CFG5, 0x40010a45\r
- 3991                  .set CYDEV_UCFG_B0_P5_U0_CFG6, 0x40010a46\r
- 3992                  .set CYDEV_UCFG_B0_P5_U0_CFG7, 0x40010a47\r
- 3993                  .set CYDEV_UCFG_B0_P5_U0_CFG8, 0x40010a48\r
- 3994                  .set CYDEV_UCFG_B0_P5_U0_CFG9, 0x40010a49\r
- 3995                  .set CYDEV_UCFG_B0_P5_U0_CFG10, 0x40010a4a\r
- 3996                  .set CYDEV_UCFG_B0_P5_U0_CFG11, 0x40010a4b\r
- 3997                  .set CYDEV_UCFG_B0_P5_U0_CFG12, 0x40010a4c\r
- 3998                  .set CYDEV_UCFG_B0_P5_U0_CFG13, 0x40010a4d\r
- 3999                  .set CYDEV_UCFG_B0_P5_U0_CFG14, 0x40010a4e\r
- 4000                  .set CYDEV_UCFG_B0_P5_U0_CFG15, 0x40010a4f\r
- 4001                  .set CYDEV_UCFG_B0_P5_U0_CFG16, 0x40010a50\r
- 4002                  .set CYDEV_UCFG_B0_P5_U0_CFG17, 0x40010a51\r
- 4003                  .set CYDEV_UCFG_B0_P5_U0_CFG18, 0x40010a52\r
- 4004                  .set CYDEV_UCFG_B0_P5_U0_CFG19, 0x40010a53\r
- 4005                  .set CYDEV_UCFG_B0_P5_U0_CFG20, 0x40010a54\r
- 4006                  .set CYDEV_UCFG_B0_P5_U0_CFG21, 0x40010a55\r
- 4007                  .set CYDEV_UCFG_B0_P5_U0_CFG22, 0x40010a56\r
- 4008                  .set CYDEV_UCFG_B0_P5_U0_CFG23, 0x40010a57\r
- 4009                  .set CYDEV_UCFG_B0_P5_U0_CFG24, 0x40010a58\r
- 4010                  .set CYDEV_UCFG_B0_P5_U0_CFG25, 0x40010a59\r
- 4011                  .set CYDEV_UCFG_B0_P5_U0_CFG26, 0x40010a5a\r
- 4012                  .set CYDEV_UCFG_B0_P5_U0_CFG27, 0x40010a5b\r
- 4013                  .set CYDEV_UCFG_B0_P5_U0_CFG28, 0x40010a5c\r
- 4014                  .set CYDEV_UCFG_B0_P5_U0_CFG29, 0x40010a5d\r
- 4015                  .set CYDEV_UCFG_B0_P5_U0_CFG30, 0x40010a5e\r
- 4016                  .set CYDEV_UCFG_B0_P5_U0_CFG31, 0x40010a5f\r
- 4017                  .set CYDEV_UCFG_B0_P5_U0_DCFG0, 0x40010a60\r
- 4018                  .set CYDEV_UCFG_B0_P5_U0_DCFG1, 0x40010a62\r
- 4019                  .set CYDEV_UCFG_B0_P5_U0_DCFG2, 0x40010a64\r
- 4020                  .set CYDEV_UCFG_B0_P5_U0_DCFG3, 0x40010a66\r
- 4021                  .set CYDEV_UCFG_B0_P5_U0_DCFG4, 0x40010a68\r
- 4022                  .set CYDEV_UCFG_B0_P5_U0_DCFG5, 0x40010a6a\r
- 4023                  .set CYDEV_UCFG_B0_P5_U0_DCFG6, 0x40010a6c\r
- 4024                  .set CYDEV_UCFG_B0_P5_U0_DCFG7, 0x40010a6e\r
- 4025                  .set CYDEV_UCFG_B0_P5_U1_BASE, 0x40010a80\r
- 4026                  .set CYDEV_UCFG_B0_P5_U1_SIZE, 0x00000070\r
- 4027                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT0, 0x40010a80\r
- 4028                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT1, 0x40010a84\r
- 4029                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT2, 0x40010a88\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 72\r
-\r
-\r
- 4030                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT3, 0x40010a8c\r
- 4031                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT4, 0x40010a90\r
- 4032                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT5, 0x40010a94\r
- 4033                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT6, 0x40010a98\r
- 4034                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT7, 0x40010a9c\r
- 4035                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT8, 0x40010aa0\r
- 4036                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT9, 0x40010aa4\r
- 4037                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT10, 0x40010aa8\r
- 4038                  .set CYDEV_UCFG_B0_P5_U1_PLD_IT11, 0x40010aac\r
- 4039                  .set CYDEV_UCFG_B0_P5_U1_PLD_ORT0, 0x40010ab0\r
- 4040                  .set CYDEV_UCFG_B0_P5_U1_PLD_ORT1, 0x40010ab2\r
- 4041                  .set CYDEV_UCFG_B0_P5_U1_PLD_ORT2, 0x40010ab4\r
- 4042                  .set CYDEV_UCFG_B0_P5_U1_PLD_ORT3, 0x40010ab6\r
- 4043                  .set CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST, 0x40010ab8\r
- 4044                  .set CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB, 0x40010aba\r
- 4045                  .set CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET, 0x40010abc\r
- 4046                  .set CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS, 0x40010abe\r
- 4047                  .set CYDEV_UCFG_B0_P5_U1_CFG0, 0x40010ac0\r
- 4048                  .set CYDEV_UCFG_B0_P5_U1_CFG1, 0x40010ac1\r
- 4049                  .set CYDEV_UCFG_B0_P5_U1_CFG2, 0x40010ac2\r
- 4050                  .set CYDEV_UCFG_B0_P5_U1_CFG3, 0x40010ac3\r
- 4051                  .set CYDEV_UCFG_B0_P5_U1_CFG4, 0x40010ac4\r
- 4052                  .set CYDEV_UCFG_B0_P5_U1_CFG5, 0x40010ac5\r
- 4053                  .set CYDEV_UCFG_B0_P5_U1_CFG6, 0x40010ac6\r
- 4054                  .set CYDEV_UCFG_B0_P5_U1_CFG7, 0x40010ac7\r
- 4055                  .set CYDEV_UCFG_B0_P5_U1_CFG8, 0x40010ac8\r
- 4056                  .set CYDEV_UCFG_B0_P5_U1_CFG9, 0x40010ac9\r
- 4057                  .set CYDEV_UCFG_B0_P5_U1_CFG10, 0x40010aca\r
- 4058                  .set CYDEV_UCFG_B0_P5_U1_CFG11, 0x40010acb\r
- 4059                  .set CYDEV_UCFG_B0_P5_U1_CFG12, 0x40010acc\r
- 4060                  .set CYDEV_UCFG_B0_P5_U1_CFG13, 0x40010acd\r
- 4061                  .set CYDEV_UCFG_B0_P5_U1_CFG14, 0x40010ace\r
- 4062                  .set CYDEV_UCFG_B0_P5_U1_CFG15, 0x40010acf\r
- 4063                  .set CYDEV_UCFG_B0_P5_U1_CFG16, 0x40010ad0\r
- 4064                  .set CYDEV_UCFG_B0_P5_U1_CFG17, 0x40010ad1\r
- 4065                  .set CYDEV_UCFG_B0_P5_U1_CFG18, 0x40010ad2\r
- 4066                  .set CYDEV_UCFG_B0_P5_U1_CFG19, 0x40010ad3\r
- 4067                  .set CYDEV_UCFG_B0_P5_U1_CFG20, 0x40010ad4\r
- 4068                  .set CYDEV_UCFG_B0_P5_U1_CFG21, 0x40010ad5\r
- 4069                  .set CYDEV_UCFG_B0_P5_U1_CFG22, 0x40010ad6\r
- 4070                  .set CYDEV_UCFG_B0_P5_U1_CFG23, 0x40010ad7\r
- 4071                  .set CYDEV_UCFG_B0_P5_U1_CFG24, 0x40010ad8\r
- 4072                  .set CYDEV_UCFG_B0_P5_U1_CFG25, 0x40010ad9\r
- 4073                  .set CYDEV_UCFG_B0_P5_U1_CFG26, 0x40010ada\r
- 4074                  .set CYDEV_UCFG_B0_P5_U1_CFG27, 0x40010adb\r
- 4075                  .set CYDEV_UCFG_B0_P5_U1_CFG28, 0x40010adc\r
- 4076                  .set CYDEV_UCFG_B0_P5_U1_CFG29, 0x40010add\r
- 4077                  .set CYDEV_UCFG_B0_P5_U1_CFG30, 0x40010ade\r
- 4078                  .set CYDEV_UCFG_B0_P5_U1_CFG31, 0x40010adf\r
- 4079                  .set CYDEV_UCFG_B0_P5_U1_DCFG0, 0x40010ae0\r
- 4080                  .set CYDEV_UCFG_B0_P5_U1_DCFG1, 0x40010ae2\r
- 4081                  .set CYDEV_UCFG_B0_P5_U1_DCFG2, 0x40010ae4\r
- 4082                  .set CYDEV_UCFG_B0_P5_U1_DCFG3, 0x40010ae6\r
- 4083                  .set CYDEV_UCFG_B0_P5_U1_DCFG4, 0x40010ae8\r
- 4084                  .set CYDEV_UCFG_B0_P5_U1_DCFG5, 0x40010aea\r
- 4085                  .set CYDEV_UCFG_B0_P5_U1_DCFG6, 0x40010aec\r
- 4086                  .set CYDEV_UCFG_B0_P5_U1_DCFG7, 0x40010aee\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 73\r
-\r
-\r
- 4087                  .set CYDEV_UCFG_B0_P5_ROUTE_BASE, 0x40010b00\r
- 4088                  .set CYDEV_UCFG_B0_P5_ROUTE_SIZE, 0x000000ef\r
- 4089                  .set CYDEV_UCFG_B0_P6_BASE, 0x40010c00\r
- 4090                  .set CYDEV_UCFG_B0_P6_SIZE, 0x000001ef\r
- 4091                  .set CYDEV_UCFG_B0_P6_U0_BASE, 0x40010c00\r
- 4092                  .set CYDEV_UCFG_B0_P6_U0_SIZE, 0x00000070\r
- 4093                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT0, 0x40010c00\r
- 4094                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT1, 0x40010c04\r
- 4095                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT2, 0x40010c08\r
- 4096                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT3, 0x40010c0c\r
- 4097                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT4, 0x40010c10\r
- 4098                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT5, 0x40010c14\r
- 4099                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT6, 0x40010c18\r
- 4100                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT7, 0x40010c1c\r
- 4101                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT8, 0x40010c20\r
- 4102                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT9, 0x40010c24\r
- 4103                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT10, 0x40010c28\r
- 4104                  .set CYDEV_UCFG_B0_P6_U0_PLD_IT11, 0x40010c2c\r
- 4105                  .set CYDEV_UCFG_B0_P6_U0_PLD_ORT0, 0x40010c30\r
- 4106                  .set CYDEV_UCFG_B0_P6_U0_PLD_ORT1, 0x40010c32\r
- 4107                  .set CYDEV_UCFG_B0_P6_U0_PLD_ORT2, 0x40010c34\r
- 4108                  .set CYDEV_UCFG_B0_P6_U0_PLD_ORT3, 0x40010c36\r
- 4109                  .set CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST, 0x40010c38\r
- 4110                  .set CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB, 0x40010c3a\r
- 4111                  .set CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET, 0x40010c3c\r
- 4112                  .set CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS, 0x40010c3e\r
- 4113                  .set CYDEV_UCFG_B0_P6_U0_CFG0, 0x40010c40\r
- 4114                  .set CYDEV_UCFG_B0_P6_U0_CFG1, 0x40010c41\r
- 4115                  .set CYDEV_UCFG_B0_P6_U0_CFG2, 0x40010c42\r
- 4116                  .set CYDEV_UCFG_B0_P6_U0_CFG3, 0x40010c43\r
- 4117                  .set CYDEV_UCFG_B0_P6_U0_CFG4, 0x40010c44\r
- 4118                  .set CYDEV_UCFG_B0_P6_U0_CFG5, 0x40010c45\r
- 4119                  .set CYDEV_UCFG_B0_P6_U0_CFG6, 0x40010c46\r
- 4120                  .set CYDEV_UCFG_B0_P6_U0_CFG7, 0x40010c47\r
- 4121                  .set CYDEV_UCFG_B0_P6_U0_CFG8, 0x40010c48\r
- 4122                  .set CYDEV_UCFG_B0_P6_U0_CFG9, 0x40010c49\r
- 4123                  .set CYDEV_UCFG_B0_P6_U0_CFG10, 0x40010c4a\r
- 4124                  .set CYDEV_UCFG_B0_P6_U0_CFG11, 0x40010c4b\r
- 4125                  .set CYDEV_UCFG_B0_P6_U0_CFG12, 0x40010c4c\r
- 4126                  .set CYDEV_UCFG_B0_P6_U0_CFG13, 0x40010c4d\r
- 4127                  .set CYDEV_UCFG_B0_P6_U0_CFG14, 0x40010c4e\r
- 4128                  .set CYDEV_UCFG_B0_P6_U0_CFG15, 0x40010c4f\r
- 4129                  .set CYDEV_UCFG_B0_P6_U0_CFG16, 0x40010c50\r
- 4130                  .set CYDEV_UCFG_B0_P6_U0_CFG17, 0x40010c51\r
- 4131                  .set CYDEV_UCFG_B0_P6_U0_CFG18, 0x40010c52\r
- 4132                  .set CYDEV_UCFG_B0_P6_U0_CFG19, 0x40010c53\r
- 4133                  .set CYDEV_UCFG_B0_P6_U0_CFG20, 0x40010c54\r
- 4134                  .set CYDEV_UCFG_B0_P6_U0_CFG21, 0x40010c55\r
- 4135                  .set CYDEV_UCFG_B0_P6_U0_CFG22, 0x40010c56\r
- 4136                  .set CYDEV_UCFG_B0_P6_U0_CFG23, 0x40010c57\r
- 4137                  .set CYDEV_UCFG_B0_P6_U0_CFG24, 0x40010c58\r
- 4138                  .set CYDEV_UCFG_B0_P6_U0_CFG25, 0x40010c59\r
- 4139                  .set CYDEV_UCFG_B0_P6_U0_CFG26, 0x40010c5a\r
- 4140                  .set CYDEV_UCFG_B0_P6_U0_CFG27, 0x40010c5b\r
- 4141                  .set CYDEV_UCFG_B0_P6_U0_CFG28, 0x40010c5c\r
- 4142                  .set CYDEV_UCFG_B0_P6_U0_CFG29, 0x40010c5d\r
- 4143                  .set CYDEV_UCFG_B0_P6_U0_CFG30, 0x40010c5e\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 74\r
-\r
-\r
- 4144                  .set CYDEV_UCFG_B0_P6_U0_CFG31, 0x40010c5f\r
- 4145                  .set CYDEV_UCFG_B0_P6_U0_DCFG0, 0x40010c60\r
- 4146                  .set CYDEV_UCFG_B0_P6_U0_DCFG1, 0x40010c62\r
- 4147                  .set CYDEV_UCFG_B0_P6_U0_DCFG2, 0x40010c64\r
- 4148                  .set CYDEV_UCFG_B0_P6_U0_DCFG3, 0x40010c66\r
- 4149                  .set CYDEV_UCFG_B0_P6_U0_DCFG4, 0x40010c68\r
- 4150                  .set CYDEV_UCFG_B0_P6_U0_DCFG5, 0x40010c6a\r
- 4151                  .set CYDEV_UCFG_B0_P6_U0_DCFG6, 0x40010c6c\r
- 4152                  .set CYDEV_UCFG_B0_P6_U0_DCFG7, 0x40010c6e\r
- 4153                  .set CYDEV_UCFG_B0_P6_U1_BASE, 0x40010c80\r
- 4154                  .set CYDEV_UCFG_B0_P6_U1_SIZE, 0x00000070\r
- 4155                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT0, 0x40010c80\r
- 4156                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT1, 0x40010c84\r
- 4157                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT2, 0x40010c88\r
- 4158                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT3, 0x40010c8c\r
- 4159                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT4, 0x40010c90\r
- 4160                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT5, 0x40010c94\r
- 4161                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT6, 0x40010c98\r
- 4162                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT7, 0x40010c9c\r
- 4163                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT8, 0x40010ca0\r
- 4164                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT9, 0x40010ca4\r
- 4165                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT10, 0x40010ca8\r
- 4166                  .set CYDEV_UCFG_B0_P6_U1_PLD_IT11, 0x40010cac\r
- 4167                  .set CYDEV_UCFG_B0_P6_U1_PLD_ORT0, 0x40010cb0\r
- 4168                  .set CYDEV_UCFG_B0_P6_U1_PLD_ORT1, 0x40010cb2\r
- 4169                  .set CYDEV_UCFG_B0_P6_U1_PLD_ORT2, 0x40010cb4\r
- 4170                  .set CYDEV_UCFG_B0_P6_U1_PLD_ORT3, 0x40010cb6\r
- 4171                  .set CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST, 0x40010cb8\r
- 4172                  .set CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB, 0x40010cba\r
- 4173                  .set CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET, 0x40010cbc\r
- 4174                  .set CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS, 0x40010cbe\r
- 4175                  .set CYDEV_UCFG_B0_P6_U1_CFG0, 0x40010cc0\r
- 4176                  .set CYDEV_UCFG_B0_P6_U1_CFG1, 0x40010cc1\r
- 4177                  .set CYDEV_UCFG_B0_P6_U1_CFG2, 0x40010cc2\r
- 4178                  .set CYDEV_UCFG_B0_P6_U1_CFG3, 0x40010cc3\r
- 4179                  .set CYDEV_UCFG_B0_P6_U1_CFG4, 0x40010cc4\r
- 4180                  .set CYDEV_UCFG_B0_P6_U1_CFG5, 0x40010cc5\r
- 4181                  .set CYDEV_UCFG_B0_P6_U1_CFG6, 0x40010cc6\r
- 4182                  .set CYDEV_UCFG_B0_P6_U1_CFG7, 0x40010cc7\r
- 4183                  .set CYDEV_UCFG_B0_P6_U1_CFG8, 0x40010cc8\r
- 4184                  .set CYDEV_UCFG_B0_P6_U1_CFG9, 0x40010cc9\r
- 4185                  .set CYDEV_UCFG_B0_P6_U1_CFG10, 0x40010cca\r
- 4186                  .set CYDEV_UCFG_B0_P6_U1_CFG11, 0x40010ccb\r
- 4187                  .set CYDEV_UCFG_B0_P6_U1_CFG12, 0x40010ccc\r
- 4188                  .set CYDEV_UCFG_B0_P6_U1_CFG13, 0x40010ccd\r
- 4189                  .set CYDEV_UCFG_B0_P6_U1_CFG14, 0x40010cce\r
- 4190                  .set CYDEV_UCFG_B0_P6_U1_CFG15, 0x40010ccf\r
- 4191                  .set CYDEV_UCFG_B0_P6_U1_CFG16, 0x40010cd0\r
- 4192                  .set CYDEV_UCFG_B0_P6_U1_CFG17, 0x40010cd1\r
- 4193                  .set CYDEV_UCFG_B0_P6_U1_CFG18, 0x40010cd2\r
- 4194                  .set CYDEV_UCFG_B0_P6_U1_CFG19, 0x40010cd3\r
- 4195                  .set CYDEV_UCFG_B0_P6_U1_CFG20, 0x40010cd4\r
- 4196                  .set CYDEV_UCFG_B0_P6_U1_CFG21, 0x40010cd5\r
- 4197                  .set CYDEV_UCFG_B0_P6_U1_CFG22, 0x40010cd6\r
- 4198                  .set CYDEV_UCFG_B0_P6_U1_CFG23, 0x40010cd7\r
- 4199                  .set CYDEV_UCFG_B0_P6_U1_CFG24, 0x40010cd8\r
- 4200                  .set CYDEV_UCFG_B0_P6_U1_CFG25, 0x40010cd9\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 75\r
-\r
-\r
- 4201                  .set CYDEV_UCFG_B0_P6_U1_CFG26, 0x40010cda\r
- 4202                  .set CYDEV_UCFG_B0_P6_U1_CFG27, 0x40010cdb\r
- 4203                  .set CYDEV_UCFG_B0_P6_U1_CFG28, 0x40010cdc\r
- 4204                  .set CYDEV_UCFG_B0_P6_U1_CFG29, 0x40010cdd\r
- 4205                  .set CYDEV_UCFG_B0_P6_U1_CFG30, 0x40010cde\r
- 4206                  .set CYDEV_UCFG_B0_P6_U1_CFG31, 0x40010cdf\r
- 4207                  .set CYDEV_UCFG_B0_P6_U1_DCFG0, 0x40010ce0\r
- 4208                  .set CYDEV_UCFG_B0_P6_U1_DCFG1, 0x40010ce2\r
- 4209                  .set CYDEV_UCFG_B0_P6_U1_DCFG2, 0x40010ce4\r
- 4210                  .set CYDEV_UCFG_B0_P6_U1_DCFG3, 0x40010ce6\r
- 4211                  .set CYDEV_UCFG_B0_P6_U1_DCFG4, 0x40010ce8\r
- 4212                  .set CYDEV_UCFG_B0_P6_U1_DCFG5, 0x40010cea\r
- 4213                  .set CYDEV_UCFG_B0_P6_U1_DCFG6, 0x40010cec\r
- 4214                  .set CYDEV_UCFG_B0_P6_U1_DCFG7, 0x40010cee\r
- 4215                  .set CYDEV_UCFG_B0_P6_ROUTE_BASE, 0x40010d00\r
- 4216                  .set CYDEV_UCFG_B0_P6_ROUTE_SIZE, 0x000000ef\r
- 4217                  .set CYDEV_UCFG_B0_P7_BASE, 0x40010e00\r
- 4218                  .set CYDEV_UCFG_B0_P7_SIZE, 0x000001ef\r
- 4219                  .set CYDEV_UCFG_B0_P7_U0_BASE, 0x40010e00\r
- 4220                  .set CYDEV_UCFG_B0_P7_U0_SIZE, 0x00000070\r
- 4221                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT0, 0x40010e00\r
- 4222                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT1, 0x40010e04\r
- 4223                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT2, 0x40010e08\r
- 4224                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT3, 0x40010e0c\r
- 4225                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT4, 0x40010e10\r
- 4226                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT5, 0x40010e14\r
- 4227                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT6, 0x40010e18\r
- 4228                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT7, 0x40010e1c\r
- 4229                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT8, 0x40010e20\r
- 4230                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT9, 0x40010e24\r
- 4231                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT10, 0x40010e28\r
- 4232                  .set CYDEV_UCFG_B0_P7_U0_PLD_IT11, 0x40010e2c\r
- 4233                  .set CYDEV_UCFG_B0_P7_U0_PLD_ORT0, 0x40010e30\r
- 4234                  .set CYDEV_UCFG_B0_P7_U0_PLD_ORT1, 0x40010e32\r
- 4235                  .set CYDEV_UCFG_B0_P7_U0_PLD_ORT2, 0x40010e34\r
- 4236                  .set CYDEV_UCFG_B0_P7_U0_PLD_ORT3, 0x40010e36\r
- 4237                  .set CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST, 0x40010e38\r
- 4238                  .set CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB, 0x40010e3a\r
- 4239                  .set CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET, 0x40010e3c\r
- 4240                  .set CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS, 0x40010e3e\r
- 4241                  .set CYDEV_UCFG_B0_P7_U0_CFG0, 0x40010e40\r
- 4242                  .set CYDEV_UCFG_B0_P7_U0_CFG1, 0x40010e41\r
- 4243                  .set CYDEV_UCFG_B0_P7_U0_CFG2, 0x40010e42\r
- 4244                  .set CYDEV_UCFG_B0_P7_U0_CFG3, 0x40010e43\r
- 4245                  .set CYDEV_UCFG_B0_P7_U0_CFG4, 0x40010e44\r
- 4246                  .set CYDEV_UCFG_B0_P7_U0_CFG5, 0x40010e45\r
- 4247                  .set CYDEV_UCFG_B0_P7_U0_CFG6, 0x40010e46\r
- 4248                  .set CYDEV_UCFG_B0_P7_U0_CFG7, 0x40010e47\r
- 4249                  .set CYDEV_UCFG_B0_P7_U0_CFG8, 0x40010e48\r
- 4250                  .set CYDEV_UCFG_B0_P7_U0_CFG9, 0x40010e49\r
- 4251                  .set CYDEV_UCFG_B0_P7_U0_CFG10, 0x40010e4a\r
- 4252                  .set CYDEV_UCFG_B0_P7_U0_CFG11, 0x40010e4b\r
- 4253                  .set CYDEV_UCFG_B0_P7_U0_CFG12, 0x40010e4c\r
- 4254                  .set CYDEV_UCFG_B0_P7_U0_CFG13, 0x40010e4d\r
- 4255                  .set CYDEV_UCFG_B0_P7_U0_CFG14, 0x40010e4e\r
- 4256                  .set CYDEV_UCFG_B0_P7_U0_CFG15, 0x40010e4f\r
- 4257                  .set CYDEV_UCFG_B0_P7_U0_CFG16, 0x40010e50\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 76\r
-\r
-\r
- 4258                  .set CYDEV_UCFG_B0_P7_U0_CFG17, 0x40010e51\r
- 4259                  .set CYDEV_UCFG_B0_P7_U0_CFG18, 0x40010e52\r
- 4260                  .set CYDEV_UCFG_B0_P7_U0_CFG19, 0x40010e53\r
- 4261                  .set CYDEV_UCFG_B0_P7_U0_CFG20, 0x40010e54\r
- 4262                  .set CYDEV_UCFG_B0_P7_U0_CFG21, 0x40010e55\r
- 4263                  .set CYDEV_UCFG_B0_P7_U0_CFG22, 0x40010e56\r
- 4264                  .set CYDEV_UCFG_B0_P7_U0_CFG23, 0x40010e57\r
- 4265                  .set CYDEV_UCFG_B0_P7_U0_CFG24, 0x40010e58\r
- 4266                  .set CYDEV_UCFG_B0_P7_U0_CFG25, 0x40010e59\r
- 4267                  .set CYDEV_UCFG_B0_P7_U0_CFG26, 0x40010e5a\r
- 4268                  .set CYDEV_UCFG_B0_P7_U0_CFG27, 0x40010e5b\r
- 4269                  .set CYDEV_UCFG_B0_P7_U0_CFG28, 0x40010e5c\r
- 4270                  .set CYDEV_UCFG_B0_P7_U0_CFG29, 0x40010e5d\r
- 4271                  .set CYDEV_UCFG_B0_P7_U0_CFG30, 0x40010e5e\r
- 4272                  .set CYDEV_UCFG_B0_P7_U0_CFG31, 0x40010e5f\r
- 4273                  .set CYDEV_UCFG_B0_P7_U0_DCFG0, 0x40010e60\r
- 4274                  .set CYDEV_UCFG_B0_P7_U0_DCFG1, 0x40010e62\r
- 4275                  .set CYDEV_UCFG_B0_P7_U0_DCFG2, 0x40010e64\r
- 4276                  .set CYDEV_UCFG_B0_P7_U0_DCFG3, 0x40010e66\r
- 4277                  .set CYDEV_UCFG_B0_P7_U0_DCFG4, 0x40010e68\r
- 4278                  .set CYDEV_UCFG_B0_P7_U0_DCFG5, 0x40010e6a\r
- 4279                  .set CYDEV_UCFG_B0_P7_U0_DCFG6, 0x40010e6c\r
- 4280                  .set CYDEV_UCFG_B0_P7_U0_DCFG7, 0x40010e6e\r
- 4281                  .set CYDEV_UCFG_B0_P7_U1_BASE, 0x40010e80\r
- 4282                  .set CYDEV_UCFG_B0_P7_U1_SIZE, 0x00000070\r
- 4283                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT0, 0x40010e80\r
- 4284                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT1, 0x40010e84\r
- 4285                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT2, 0x40010e88\r
- 4286                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT3, 0x40010e8c\r
- 4287                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT4, 0x40010e90\r
- 4288                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT5, 0x40010e94\r
- 4289                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT6, 0x40010e98\r
- 4290                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT7, 0x40010e9c\r
- 4291                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT8, 0x40010ea0\r
- 4292                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT9, 0x40010ea4\r
- 4293                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT10, 0x40010ea8\r
- 4294                  .set CYDEV_UCFG_B0_P7_U1_PLD_IT11, 0x40010eac\r
- 4295                  .set CYDEV_UCFG_B0_P7_U1_PLD_ORT0, 0x40010eb0\r
- 4296                  .set CYDEV_UCFG_B0_P7_U1_PLD_ORT1, 0x40010eb2\r
- 4297                  .set CYDEV_UCFG_B0_P7_U1_PLD_ORT2, 0x40010eb4\r
- 4298                  .set CYDEV_UCFG_B0_P7_U1_PLD_ORT3, 0x40010eb6\r
- 4299                  .set CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST, 0x40010eb8\r
- 4300                  .set CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB, 0x40010eba\r
- 4301                  .set CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET, 0x40010ebc\r
- 4302                  .set CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS, 0x40010ebe\r
- 4303                  .set CYDEV_UCFG_B0_P7_U1_CFG0, 0x40010ec0\r
- 4304                  .set CYDEV_UCFG_B0_P7_U1_CFG1, 0x40010ec1\r
- 4305                  .set CYDEV_UCFG_B0_P7_U1_CFG2, 0x40010ec2\r
- 4306                  .set CYDEV_UCFG_B0_P7_U1_CFG3, 0x40010ec3\r
- 4307                  .set CYDEV_UCFG_B0_P7_U1_CFG4, 0x40010ec4\r
- 4308                  .set CYDEV_UCFG_B0_P7_U1_CFG5, 0x40010ec5\r
- 4309                  .set CYDEV_UCFG_B0_P7_U1_CFG6, 0x40010ec6\r
- 4310                  .set CYDEV_UCFG_B0_P7_U1_CFG7, 0x40010ec7\r
- 4311                  .set CYDEV_UCFG_B0_P7_U1_CFG8, 0x40010ec8\r
- 4312                  .set CYDEV_UCFG_B0_P7_U1_CFG9, 0x40010ec9\r
- 4313                  .set CYDEV_UCFG_B0_P7_U1_CFG10, 0x40010eca\r
- 4314                  .set CYDEV_UCFG_B0_P7_U1_CFG11, 0x40010ecb\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 77\r
-\r
-\r
- 4315                  .set CYDEV_UCFG_B0_P7_U1_CFG12, 0x40010ecc\r
- 4316                  .set CYDEV_UCFG_B0_P7_U1_CFG13, 0x40010ecd\r
- 4317                  .set CYDEV_UCFG_B0_P7_U1_CFG14, 0x40010ece\r
- 4318                  .set CYDEV_UCFG_B0_P7_U1_CFG15, 0x40010ecf\r
- 4319                  .set CYDEV_UCFG_B0_P7_U1_CFG16, 0x40010ed0\r
- 4320                  .set CYDEV_UCFG_B0_P7_U1_CFG17, 0x40010ed1\r
- 4321                  .set CYDEV_UCFG_B0_P7_U1_CFG18, 0x40010ed2\r
- 4322                  .set CYDEV_UCFG_B0_P7_U1_CFG19, 0x40010ed3\r
- 4323                  .set CYDEV_UCFG_B0_P7_U1_CFG20, 0x40010ed4\r
- 4324                  .set CYDEV_UCFG_B0_P7_U1_CFG21, 0x40010ed5\r
- 4325                  .set CYDEV_UCFG_B0_P7_U1_CFG22, 0x40010ed6\r
- 4326                  .set CYDEV_UCFG_B0_P7_U1_CFG23, 0x40010ed7\r
- 4327                  .set CYDEV_UCFG_B0_P7_U1_CFG24, 0x40010ed8\r
- 4328                  .set CYDEV_UCFG_B0_P7_U1_CFG25, 0x40010ed9\r
- 4329                  .set CYDEV_UCFG_B0_P7_U1_CFG26, 0x40010eda\r
- 4330                  .set CYDEV_UCFG_B0_P7_U1_CFG27, 0x40010edb\r
- 4331                  .set CYDEV_UCFG_B0_P7_U1_CFG28, 0x40010edc\r
- 4332                  .set CYDEV_UCFG_B0_P7_U1_CFG29, 0x40010edd\r
- 4333                  .set CYDEV_UCFG_B0_P7_U1_CFG30, 0x40010ede\r
- 4334                  .set CYDEV_UCFG_B0_P7_U1_CFG31, 0x40010edf\r
- 4335                  .set CYDEV_UCFG_B0_P7_U1_DCFG0, 0x40010ee0\r
- 4336                  .set CYDEV_UCFG_B0_P7_U1_DCFG1, 0x40010ee2\r
- 4337                  .set CYDEV_UCFG_B0_P7_U1_DCFG2, 0x40010ee4\r
- 4338                  .set CYDEV_UCFG_B0_P7_U1_DCFG3, 0x40010ee6\r
- 4339                  .set CYDEV_UCFG_B0_P7_U1_DCFG4, 0x40010ee8\r
- 4340                  .set CYDEV_UCFG_B0_P7_U1_DCFG5, 0x40010eea\r
- 4341                  .set CYDEV_UCFG_B0_P7_U1_DCFG6, 0x40010eec\r
- 4342                  .set CYDEV_UCFG_B0_P7_U1_DCFG7, 0x40010eee\r
- 4343                  .set CYDEV_UCFG_B0_P7_ROUTE_BASE, 0x40010f00\r
- 4344                  .set CYDEV_UCFG_B0_P7_ROUTE_SIZE, 0x000000ef\r
- 4345                  .set CYDEV_UCFG_B1_BASE, 0x40011000\r
- 4346                  .set CYDEV_UCFG_B1_SIZE, 0x00000fef\r
- 4347                  .set CYDEV_UCFG_B1_P2_BASE, 0x40011400\r
- 4348                  .set CYDEV_UCFG_B1_P2_SIZE, 0x000001ef\r
- 4349                  .set CYDEV_UCFG_B1_P2_U0_BASE, 0x40011400\r
- 4350                  .set CYDEV_UCFG_B1_P2_U0_SIZE, 0x00000070\r
- 4351                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT0, 0x40011400\r
- 4352                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT1, 0x40011404\r
- 4353                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT2, 0x40011408\r
- 4354                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT3, 0x4001140c\r
- 4355                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT4, 0x40011410\r
- 4356                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT5, 0x40011414\r
- 4357                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT6, 0x40011418\r
- 4358                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT7, 0x4001141c\r
- 4359                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT8, 0x40011420\r
- 4360                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT9, 0x40011424\r
- 4361                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT10, 0x40011428\r
- 4362                  .set CYDEV_UCFG_B1_P2_U0_PLD_IT11, 0x4001142c\r
- 4363                  .set CYDEV_UCFG_B1_P2_U0_PLD_ORT0, 0x40011430\r
- 4364                  .set CYDEV_UCFG_B1_P2_U0_PLD_ORT1, 0x40011432\r
- 4365                  .set CYDEV_UCFG_B1_P2_U0_PLD_ORT2, 0x40011434\r
- 4366                  .set CYDEV_UCFG_B1_P2_U0_PLD_ORT3, 0x40011436\r
- 4367                  .set CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST, 0x40011438\r
- 4368                  .set CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB, 0x4001143a\r
- 4369                  .set CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET, 0x4001143c\r
- 4370                  .set CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS, 0x4001143e\r
- 4371                  .set CYDEV_UCFG_B1_P2_U0_CFG0, 0x40011440\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 78\r
-\r
-\r
- 4372                  .set CYDEV_UCFG_B1_P2_U0_CFG1, 0x40011441\r
- 4373                  .set CYDEV_UCFG_B1_P2_U0_CFG2, 0x40011442\r
- 4374                  .set CYDEV_UCFG_B1_P2_U0_CFG3, 0x40011443\r
- 4375                  .set CYDEV_UCFG_B1_P2_U0_CFG4, 0x40011444\r
- 4376                  .set CYDEV_UCFG_B1_P2_U0_CFG5, 0x40011445\r
- 4377                  .set CYDEV_UCFG_B1_P2_U0_CFG6, 0x40011446\r
- 4378                  .set CYDEV_UCFG_B1_P2_U0_CFG7, 0x40011447\r
- 4379                  .set CYDEV_UCFG_B1_P2_U0_CFG8, 0x40011448\r
- 4380                  .set CYDEV_UCFG_B1_P2_U0_CFG9, 0x40011449\r
- 4381                  .set CYDEV_UCFG_B1_P2_U0_CFG10, 0x4001144a\r
- 4382                  .set CYDEV_UCFG_B1_P2_U0_CFG11, 0x4001144b\r
- 4383                  .set CYDEV_UCFG_B1_P2_U0_CFG12, 0x4001144c\r
- 4384                  .set CYDEV_UCFG_B1_P2_U0_CFG13, 0x4001144d\r
- 4385                  .set CYDEV_UCFG_B1_P2_U0_CFG14, 0x4001144e\r
- 4386                  .set CYDEV_UCFG_B1_P2_U0_CFG15, 0x4001144f\r
- 4387                  .set CYDEV_UCFG_B1_P2_U0_CFG16, 0x40011450\r
- 4388                  .set CYDEV_UCFG_B1_P2_U0_CFG17, 0x40011451\r
- 4389                  .set CYDEV_UCFG_B1_P2_U0_CFG18, 0x40011452\r
- 4390                  .set CYDEV_UCFG_B1_P2_U0_CFG19, 0x40011453\r
- 4391                  .set CYDEV_UCFG_B1_P2_U0_CFG20, 0x40011454\r
- 4392                  .set CYDEV_UCFG_B1_P2_U0_CFG21, 0x40011455\r
- 4393                  .set CYDEV_UCFG_B1_P2_U0_CFG22, 0x40011456\r
- 4394                  .set CYDEV_UCFG_B1_P2_U0_CFG23, 0x40011457\r
- 4395                  .set CYDEV_UCFG_B1_P2_U0_CFG24, 0x40011458\r
- 4396                  .set CYDEV_UCFG_B1_P2_U0_CFG25, 0x40011459\r
- 4397                  .set CYDEV_UCFG_B1_P2_U0_CFG26, 0x4001145a\r
- 4398                  .set CYDEV_UCFG_B1_P2_U0_CFG27, 0x4001145b\r
- 4399                  .set CYDEV_UCFG_B1_P2_U0_CFG28, 0x4001145c\r
- 4400                  .set CYDEV_UCFG_B1_P2_U0_CFG29, 0x4001145d\r
- 4401                  .set CYDEV_UCFG_B1_P2_U0_CFG30, 0x4001145e\r
- 4402                  .set CYDEV_UCFG_B1_P2_U0_CFG31, 0x4001145f\r
- 4403                  .set CYDEV_UCFG_B1_P2_U0_DCFG0, 0x40011460\r
- 4404                  .set CYDEV_UCFG_B1_P2_U0_DCFG1, 0x40011462\r
- 4405                  .set CYDEV_UCFG_B1_P2_U0_DCFG2, 0x40011464\r
- 4406                  .set CYDEV_UCFG_B1_P2_U0_DCFG3, 0x40011466\r
- 4407                  .set CYDEV_UCFG_B1_P2_U0_DCFG4, 0x40011468\r
- 4408                  .set CYDEV_UCFG_B1_P2_U0_DCFG5, 0x4001146a\r
- 4409                  .set CYDEV_UCFG_B1_P2_U0_DCFG6, 0x4001146c\r
- 4410                  .set CYDEV_UCFG_B1_P2_U0_DCFG7, 0x4001146e\r
- 4411                  .set CYDEV_UCFG_B1_P2_U1_BASE, 0x40011480\r
- 4412                  .set CYDEV_UCFG_B1_P2_U1_SIZE, 0x00000070\r
- 4413                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT0, 0x40011480\r
- 4414                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT1, 0x40011484\r
- 4415                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT2, 0x40011488\r
- 4416                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT3, 0x4001148c\r
- 4417                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT4, 0x40011490\r
- 4418                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT5, 0x40011494\r
- 4419                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT6, 0x40011498\r
- 4420                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT7, 0x4001149c\r
- 4421                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT8, 0x400114a0\r
- 4422                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT9, 0x400114a4\r
- 4423                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT10, 0x400114a8\r
- 4424                  .set CYDEV_UCFG_B1_P2_U1_PLD_IT11, 0x400114ac\r
- 4425                  .set CYDEV_UCFG_B1_P2_U1_PLD_ORT0, 0x400114b0\r
- 4426                  .set CYDEV_UCFG_B1_P2_U1_PLD_ORT1, 0x400114b2\r
- 4427                  .set CYDEV_UCFG_B1_P2_U1_PLD_ORT2, 0x400114b4\r
- 4428                  .set CYDEV_UCFG_B1_P2_U1_PLD_ORT3, 0x400114b6\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 79\r
-\r
-\r
- 4429                  .set CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST, 0x400114b8\r
- 4430                  .set CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB, 0x400114ba\r
- 4431                  .set CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET, 0x400114bc\r
- 4432                  .set CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS, 0x400114be\r
- 4433                  .set CYDEV_UCFG_B1_P2_U1_CFG0, 0x400114c0\r
- 4434                  .set CYDEV_UCFG_B1_P2_U1_CFG1, 0x400114c1\r
- 4435                  .set CYDEV_UCFG_B1_P2_U1_CFG2, 0x400114c2\r
- 4436                  .set CYDEV_UCFG_B1_P2_U1_CFG3, 0x400114c3\r
- 4437                  .set CYDEV_UCFG_B1_P2_U1_CFG4, 0x400114c4\r
- 4438                  .set CYDEV_UCFG_B1_P2_U1_CFG5, 0x400114c5\r
- 4439                  .set CYDEV_UCFG_B1_P2_U1_CFG6, 0x400114c6\r
- 4440                  .set CYDEV_UCFG_B1_P2_U1_CFG7, 0x400114c7\r
- 4441                  .set CYDEV_UCFG_B1_P2_U1_CFG8, 0x400114c8\r
- 4442                  .set CYDEV_UCFG_B1_P2_U1_CFG9, 0x400114c9\r
- 4443                  .set CYDEV_UCFG_B1_P2_U1_CFG10, 0x400114ca\r
- 4444                  .set CYDEV_UCFG_B1_P2_U1_CFG11, 0x400114cb\r
- 4445                  .set CYDEV_UCFG_B1_P2_U1_CFG12, 0x400114cc\r
- 4446                  .set CYDEV_UCFG_B1_P2_U1_CFG13, 0x400114cd\r
- 4447                  .set CYDEV_UCFG_B1_P2_U1_CFG14, 0x400114ce\r
- 4448                  .set CYDEV_UCFG_B1_P2_U1_CFG15, 0x400114cf\r
- 4449                  .set CYDEV_UCFG_B1_P2_U1_CFG16, 0x400114d0\r
- 4450                  .set CYDEV_UCFG_B1_P2_U1_CFG17, 0x400114d1\r
- 4451                  .set CYDEV_UCFG_B1_P2_U1_CFG18, 0x400114d2\r
- 4452                  .set CYDEV_UCFG_B1_P2_U1_CFG19, 0x400114d3\r
- 4453                  .set CYDEV_UCFG_B1_P2_U1_CFG20, 0x400114d4\r
- 4454                  .set CYDEV_UCFG_B1_P2_U1_CFG21, 0x400114d5\r
- 4455                  .set CYDEV_UCFG_B1_P2_U1_CFG22, 0x400114d6\r
- 4456                  .set CYDEV_UCFG_B1_P2_U1_CFG23, 0x400114d7\r
- 4457                  .set CYDEV_UCFG_B1_P2_U1_CFG24, 0x400114d8\r
- 4458                  .set CYDEV_UCFG_B1_P2_U1_CFG25, 0x400114d9\r
- 4459                  .set CYDEV_UCFG_B1_P2_U1_CFG26, 0x400114da\r
- 4460                  .set CYDEV_UCFG_B1_P2_U1_CFG27, 0x400114db\r
- 4461                  .set CYDEV_UCFG_B1_P2_U1_CFG28, 0x400114dc\r
- 4462                  .set CYDEV_UCFG_B1_P2_U1_CFG29, 0x400114dd\r
- 4463                  .set CYDEV_UCFG_B1_P2_U1_CFG30, 0x400114de\r
- 4464                  .set CYDEV_UCFG_B1_P2_U1_CFG31, 0x400114df\r
- 4465                  .set CYDEV_UCFG_B1_P2_U1_DCFG0, 0x400114e0\r
- 4466                  .set CYDEV_UCFG_B1_P2_U1_DCFG1, 0x400114e2\r
- 4467                  .set CYDEV_UCFG_B1_P2_U1_DCFG2, 0x400114e4\r
- 4468                  .set CYDEV_UCFG_B1_P2_U1_DCFG3, 0x400114e6\r
- 4469                  .set CYDEV_UCFG_B1_P2_U1_DCFG4, 0x400114e8\r
- 4470                  .set CYDEV_UCFG_B1_P2_U1_DCFG5, 0x400114ea\r
- 4471                  .set CYDEV_UCFG_B1_P2_U1_DCFG6, 0x400114ec\r
- 4472                  .set CYDEV_UCFG_B1_P2_U1_DCFG7, 0x400114ee\r
- 4473                  .set CYDEV_UCFG_B1_P2_ROUTE_BASE, 0x40011500\r
- 4474                  .set CYDEV_UCFG_B1_P2_ROUTE_SIZE, 0x000000ef\r
- 4475                  .set CYDEV_UCFG_B1_P3_BASE, 0x40011600\r
- 4476                  .set CYDEV_UCFG_B1_P3_SIZE, 0x000001ef\r
- 4477                  .set CYDEV_UCFG_B1_P3_U0_BASE, 0x40011600\r
- 4478                  .set CYDEV_UCFG_B1_P3_U0_SIZE, 0x00000070\r
- 4479                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT0, 0x40011600\r
- 4480                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT1, 0x40011604\r
- 4481                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT2, 0x40011608\r
- 4482                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT3, 0x4001160c\r
- 4483                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT4, 0x40011610\r
- 4484                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT5, 0x40011614\r
- 4485                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT6, 0x40011618\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 80\r
-\r
-\r
- 4486                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT7, 0x4001161c\r
- 4487                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT8, 0x40011620\r
- 4488                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT9, 0x40011624\r
- 4489                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT10, 0x40011628\r
- 4490                  .set CYDEV_UCFG_B1_P3_U0_PLD_IT11, 0x4001162c\r
- 4491                  .set CYDEV_UCFG_B1_P3_U0_PLD_ORT0, 0x40011630\r
- 4492                  .set CYDEV_UCFG_B1_P3_U0_PLD_ORT1, 0x40011632\r
- 4493                  .set CYDEV_UCFG_B1_P3_U0_PLD_ORT2, 0x40011634\r
- 4494                  .set CYDEV_UCFG_B1_P3_U0_PLD_ORT3, 0x40011636\r
- 4495                  .set CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST, 0x40011638\r
- 4496                  .set CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB, 0x4001163a\r
- 4497                  .set CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET, 0x4001163c\r
- 4498                  .set CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS, 0x4001163e\r
- 4499                  .set CYDEV_UCFG_B1_P3_U0_CFG0, 0x40011640\r
- 4500                  .set CYDEV_UCFG_B1_P3_U0_CFG1, 0x40011641\r
- 4501                  .set CYDEV_UCFG_B1_P3_U0_CFG2, 0x40011642\r
- 4502                  .set CYDEV_UCFG_B1_P3_U0_CFG3, 0x40011643\r
- 4503                  .set CYDEV_UCFG_B1_P3_U0_CFG4, 0x40011644\r
- 4504                  .set CYDEV_UCFG_B1_P3_U0_CFG5, 0x40011645\r
- 4505                  .set CYDEV_UCFG_B1_P3_U0_CFG6, 0x40011646\r
- 4506                  .set CYDEV_UCFG_B1_P3_U0_CFG7, 0x40011647\r
- 4507                  .set CYDEV_UCFG_B1_P3_U0_CFG8, 0x40011648\r
- 4508                  .set CYDEV_UCFG_B1_P3_U0_CFG9, 0x40011649\r
- 4509                  .set CYDEV_UCFG_B1_P3_U0_CFG10, 0x4001164a\r
- 4510                  .set CYDEV_UCFG_B1_P3_U0_CFG11, 0x4001164b\r
- 4511                  .set CYDEV_UCFG_B1_P3_U0_CFG12, 0x4001164c\r
- 4512                  .set CYDEV_UCFG_B1_P3_U0_CFG13, 0x4001164d\r
- 4513                  .set CYDEV_UCFG_B1_P3_U0_CFG14, 0x4001164e\r
- 4514                  .set CYDEV_UCFG_B1_P3_U0_CFG15, 0x4001164f\r
- 4515                  .set CYDEV_UCFG_B1_P3_U0_CFG16, 0x40011650\r
- 4516                  .set CYDEV_UCFG_B1_P3_U0_CFG17, 0x40011651\r
- 4517                  .set CYDEV_UCFG_B1_P3_U0_CFG18, 0x40011652\r
- 4518                  .set CYDEV_UCFG_B1_P3_U0_CFG19, 0x40011653\r
- 4519                  .set CYDEV_UCFG_B1_P3_U0_CFG20, 0x40011654\r
- 4520                  .set CYDEV_UCFG_B1_P3_U0_CFG21, 0x40011655\r
- 4521                  .set CYDEV_UCFG_B1_P3_U0_CFG22, 0x40011656\r
- 4522                  .set CYDEV_UCFG_B1_P3_U0_CFG23, 0x40011657\r
- 4523                  .set CYDEV_UCFG_B1_P3_U0_CFG24, 0x40011658\r
- 4524                  .set CYDEV_UCFG_B1_P3_U0_CFG25, 0x40011659\r
- 4525                  .set CYDEV_UCFG_B1_P3_U0_CFG26, 0x4001165a\r
- 4526                  .set CYDEV_UCFG_B1_P3_U0_CFG27, 0x4001165b\r
- 4527                  .set CYDEV_UCFG_B1_P3_U0_CFG28, 0x4001165c\r
- 4528                  .set CYDEV_UCFG_B1_P3_U0_CFG29, 0x4001165d\r
- 4529                  .set CYDEV_UCFG_B1_P3_U0_CFG30, 0x4001165e\r
- 4530                  .set CYDEV_UCFG_B1_P3_U0_CFG31, 0x4001165f\r
- 4531                  .set CYDEV_UCFG_B1_P3_U0_DCFG0, 0x40011660\r
- 4532                  .set CYDEV_UCFG_B1_P3_U0_DCFG1, 0x40011662\r
- 4533                  .set CYDEV_UCFG_B1_P3_U0_DCFG2, 0x40011664\r
- 4534                  .set CYDEV_UCFG_B1_P3_U0_DCFG3, 0x40011666\r
- 4535                  .set CYDEV_UCFG_B1_P3_U0_DCFG4, 0x40011668\r
- 4536                  .set CYDEV_UCFG_B1_P3_U0_DCFG5, 0x4001166a\r
- 4537                  .set CYDEV_UCFG_B1_P3_U0_DCFG6, 0x4001166c\r
- 4538                  .set CYDEV_UCFG_B1_P3_U0_DCFG7, 0x4001166e\r
- 4539                  .set CYDEV_UCFG_B1_P3_U1_BASE, 0x40011680\r
- 4540                  .set CYDEV_UCFG_B1_P3_U1_SIZE, 0x00000070\r
- 4541                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT0, 0x40011680\r
- 4542                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT1, 0x40011684\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 81\r
-\r
-\r
- 4543                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT2, 0x40011688\r
- 4544                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT3, 0x4001168c\r
- 4545                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT4, 0x40011690\r
- 4546                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT5, 0x40011694\r
- 4547                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT6, 0x40011698\r
- 4548                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT7, 0x4001169c\r
- 4549                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT8, 0x400116a0\r
- 4550                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT9, 0x400116a4\r
- 4551                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT10, 0x400116a8\r
- 4552                  .set CYDEV_UCFG_B1_P3_U1_PLD_IT11, 0x400116ac\r
- 4553                  .set CYDEV_UCFG_B1_P3_U1_PLD_ORT0, 0x400116b0\r
- 4554                  .set CYDEV_UCFG_B1_P3_U1_PLD_ORT1, 0x400116b2\r
- 4555                  .set CYDEV_UCFG_B1_P3_U1_PLD_ORT2, 0x400116b4\r
- 4556                  .set CYDEV_UCFG_B1_P3_U1_PLD_ORT3, 0x400116b6\r
- 4557                  .set CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST, 0x400116b8\r
- 4558                  .set CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB, 0x400116ba\r
- 4559                  .set CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET, 0x400116bc\r
- 4560                  .set CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS, 0x400116be\r
- 4561                  .set CYDEV_UCFG_B1_P3_U1_CFG0, 0x400116c0\r
- 4562                  .set CYDEV_UCFG_B1_P3_U1_CFG1, 0x400116c1\r
- 4563                  .set CYDEV_UCFG_B1_P3_U1_CFG2, 0x400116c2\r
- 4564                  .set CYDEV_UCFG_B1_P3_U1_CFG3, 0x400116c3\r
- 4565                  .set CYDEV_UCFG_B1_P3_U1_CFG4, 0x400116c4\r
- 4566                  .set CYDEV_UCFG_B1_P3_U1_CFG5, 0x400116c5\r
- 4567                  .set CYDEV_UCFG_B1_P3_U1_CFG6, 0x400116c6\r
- 4568                  .set CYDEV_UCFG_B1_P3_U1_CFG7, 0x400116c7\r
- 4569                  .set CYDEV_UCFG_B1_P3_U1_CFG8, 0x400116c8\r
- 4570                  .set CYDEV_UCFG_B1_P3_U1_CFG9, 0x400116c9\r
- 4571                  .set CYDEV_UCFG_B1_P3_U1_CFG10, 0x400116ca\r
- 4572                  .set CYDEV_UCFG_B1_P3_U1_CFG11, 0x400116cb\r
- 4573                  .set CYDEV_UCFG_B1_P3_U1_CFG12, 0x400116cc\r
- 4574                  .set CYDEV_UCFG_B1_P3_U1_CFG13, 0x400116cd\r
- 4575                  .set CYDEV_UCFG_B1_P3_U1_CFG14, 0x400116ce\r
- 4576                  .set CYDEV_UCFG_B1_P3_U1_CFG15, 0x400116cf\r
- 4577                  .set CYDEV_UCFG_B1_P3_U1_CFG16, 0x400116d0\r
- 4578                  .set CYDEV_UCFG_B1_P3_U1_CFG17, 0x400116d1\r
- 4579                  .set CYDEV_UCFG_B1_P3_U1_CFG18, 0x400116d2\r
- 4580                  .set CYDEV_UCFG_B1_P3_U1_CFG19, 0x400116d3\r
- 4581                  .set CYDEV_UCFG_B1_P3_U1_CFG20, 0x400116d4\r
- 4582                  .set CYDEV_UCFG_B1_P3_U1_CFG21, 0x400116d5\r
- 4583                  .set CYDEV_UCFG_B1_P3_U1_CFG22, 0x400116d6\r
- 4584                  .set CYDEV_UCFG_B1_P3_U1_CFG23, 0x400116d7\r
- 4585                  .set CYDEV_UCFG_B1_P3_U1_CFG24, 0x400116d8\r
- 4586                  .set CYDEV_UCFG_B1_P3_U1_CFG25, 0x400116d9\r
- 4587                  .set CYDEV_UCFG_B1_P3_U1_CFG26, 0x400116da\r
- 4588                  .set CYDEV_UCFG_B1_P3_U1_CFG27, 0x400116db\r
- 4589                  .set CYDEV_UCFG_B1_P3_U1_CFG28, 0x400116dc\r
- 4590                  .set CYDEV_UCFG_B1_P3_U1_CFG29, 0x400116dd\r
- 4591                  .set CYDEV_UCFG_B1_P3_U1_CFG30, 0x400116de\r
- 4592                  .set CYDEV_UCFG_B1_P3_U1_CFG31, 0x400116df\r
- 4593                  .set CYDEV_UCFG_B1_P3_U1_DCFG0, 0x400116e0\r
- 4594                  .set CYDEV_UCFG_B1_P3_U1_DCFG1, 0x400116e2\r
- 4595                  .set CYDEV_UCFG_B1_P3_U1_DCFG2, 0x400116e4\r
- 4596                  .set CYDEV_UCFG_B1_P3_U1_DCFG3, 0x400116e6\r
- 4597                  .set CYDEV_UCFG_B1_P3_U1_DCFG4, 0x400116e8\r
- 4598                  .set CYDEV_UCFG_B1_P3_U1_DCFG5, 0x400116ea\r
- 4599                  .set CYDEV_UCFG_B1_P3_U1_DCFG6, 0x400116ec\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 82\r
-\r
-\r
- 4600                  .set CYDEV_UCFG_B1_P3_U1_DCFG7, 0x400116ee\r
- 4601                  .set CYDEV_UCFG_B1_P3_ROUTE_BASE, 0x40011700\r
- 4602                  .set CYDEV_UCFG_B1_P3_ROUTE_SIZE, 0x000000ef\r
- 4603                  .set CYDEV_UCFG_B1_P4_BASE, 0x40011800\r
- 4604                  .set CYDEV_UCFG_B1_P4_SIZE, 0x000001ef\r
- 4605                  .set CYDEV_UCFG_B1_P4_U0_BASE, 0x40011800\r
- 4606                  .set CYDEV_UCFG_B1_P4_U0_SIZE, 0x00000070\r
- 4607                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT0, 0x40011800\r
- 4608                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT1, 0x40011804\r
- 4609                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT2, 0x40011808\r
- 4610                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT3, 0x4001180c\r
- 4611                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT4, 0x40011810\r
- 4612                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT5, 0x40011814\r
- 4613                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT6, 0x40011818\r
- 4614                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT7, 0x4001181c\r
- 4615                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT8, 0x40011820\r
- 4616                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT9, 0x40011824\r
- 4617                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT10, 0x40011828\r
- 4618                  .set CYDEV_UCFG_B1_P4_U0_PLD_IT11, 0x4001182c\r
- 4619                  .set CYDEV_UCFG_B1_P4_U0_PLD_ORT0, 0x40011830\r
- 4620                  .set CYDEV_UCFG_B1_P4_U0_PLD_ORT1, 0x40011832\r
- 4621                  .set CYDEV_UCFG_B1_P4_U0_PLD_ORT2, 0x40011834\r
- 4622                  .set CYDEV_UCFG_B1_P4_U0_PLD_ORT3, 0x40011836\r
- 4623                  .set CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST, 0x40011838\r
- 4624                  .set CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB, 0x4001183a\r
- 4625                  .set CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET, 0x4001183c\r
- 4626                  .set CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS, 0x4001183e\r
- 4627                  .set CYDEV_UCFG_B1_P4_U0_CFG0, 0x40011840\r
- 4628                  .set CYDEV_UCFG_B1_P4_U0_CFG1, 0x40011841\r
- 4629                  .set CYDEV_UCFG_B1_P4_U0_CFG2, 0x40011842\r
- 4630                  .set CYDEV_UCFG_B1_P4_U0_CFG3, 0x40011843\r
- 4631                  .set CYDEV_UCFG_B1_P4_U0_CFG4, 0x40011844\r
- 4632                  .set CYDEV_UCFG_B1_P4_U0_CFG5, 0x40011845\r
- 4633                  .set CYDEV_UCFG_B1_P4_U0_CFG6, 0x40011846\r
- 4634                  .set CYDEV_UCFG_B1_P4_U0_CFG7, 0x40011847\r
- 4635                  .set CYDEV_UCFG_B1_P4_U0_CFG8, 0x40011848\r
- 4636                  .set CYDEV_UCFG_B1_P4_U0_CFG9, 0x40011849\r
- 4637                  .set CYDEV_UCFG_B1_P4_U0_CFG10, 0x4001184a\r
- 4638                  .set CYDEV_UCFG_B1_P4_U0_CFG11, 0x4001184b\r
- 4639                  .set CYDEV_UCFG_B1_P4_U0_CFG12, 0x4001184c\r
- 4640                  .set CYDEV_UCFG_B1_P4_U0_CFG13, 0x4001184d\r
- 4641                  .set CYDEV_UCFG_B1_P4_U0_CFG14, 0x4001184e\r
- 4642                  .set CYDEV_UCFG_B1_P4_U0_CFG15, 0x4001184f\r
- 4643                  .set CYDEV_UCFG_B1_P4_U0_CFG16, 0x40011850\r
- 4644                  .set CYDEV_UCFG_B1_P4_U0_CFG17, 0x40011851\r
- 4645                  .set CYDEV_UCFG_B1_P4_U0_CFG18, 0x40011852\r
- 4646                  .set CYDEV_UCFG_B1_P4_U0_CFG19, 0x40011853\r
- 4647                  .set CYDEV_UCFG_B1_P4_U0_CFG20, 0x40011854\r
- 4648                  .set CYDEV_UCFG_B1_P4_U0_CFG21, 0x40011855\r
- 4649                  .set CYDEV_UCFG_B1_P4_U0_CFG22, 0x40011856\r
- 4650                  .set CYDEV_UCFG_B1_P4_U0_CFG23, 0x40011857\r
- 4651                  .set CYDEV_UCFG_B1_P4_U0_CFG24, 0x40011858\r
- 4652                  .set CYDEV_UCFG_B1_P4_U0_CFG25, 0x40011859\r
- 4653                  .set CYDEV_UCFG_B1_P4_U0_CFG26, 0x4001185a\r
- 4654                  .set CYDEV_UCFG_B1_P4_U0_CFG27, 0x4001185b\r
- 4655                  .set CYDEV_UCFG_B1_P4_U0_CFG28, 0x4001185c\r
- 4656                  .set CYDEV_UCFG_B1_P4_U0_CFG29, 0x4001185d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 83\r
-\r
-\r
- 4657                  .set CYDEV_UCFG_B1_P4_U0_CFG30, 0x4001185e\r
- 4658                  .set CYDEV_UCFG_B1_P4_U0_CFG31, 0x4001185f\r
- 4659                  .set CYDEV_UCFG_B1_P4_U0_DCFG0, 0x40011860\r
- 4660                  .set CYDEV_UCFG_B1_P4_U0_DCFG1, 0x40011862\r
- 4661                  .set CYDEV_UCFG_B1_P4_U0_DCFG2, 0x40011864\r
- 4662                  .set CYDEV_UCFG_B1_P4_U0_DCFG3, 0x40011866\r
- 4663                  .set CYDEV_UCFG_B1_P4_U0_DCFG4, 0x40011868\r
- 4664                  .set CYDEV_UCFG_B1_P4_U0_DCFG5, 0x4001186a\r
- 4665                  .set CYDEV_UCFG_B1_P4_U0_DCFG6, 0x4001186c\r
- 4666                  .set CYDEV_UCFG_B1_P4_U0_DCFG7, 0x4001186e\r
- 4667                  .set CYDEV_UCFG_B1_P4_U1_BASE, 0x40011880\r
- 4668                  .set CYDEV_UCFG_B1_P4_U1_SIZE, 0x00000070\r
- 4669                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT0, 0x40011880\r
- 4670                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT1, 0x40011884\r
- 4671                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT2, 0x40011888\r
- 4672                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT3, 0x4001188c\r
- 4673                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT4, 0x40011890\r
- 4674                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT5, 0x40011894\r
- 4675                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT6, 0x40011898\r
- 4676                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT7, 0x4001189c\r
- 4677                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT8, 0x400118a0\r
- 4678                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT9, 0x400118a4\r
- 4679                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT10, 0x400118a8\r
- 4680                  .set CYDEV_UCFG_B1_P4_U1_PLD_IT11, 0x400118ac\r
- 4681                  .set CYDEV_UCFG_B1_P4_U1_PLD_ORT0, 0x400118b0\r
- 4682                  .set CYDEV_UCFG_B1_P4_U1_PLD_ORT1, 0x400118b2\r
- 4683                  .set CYDEV_UCFG_B1_P4_U1_PLD_ORT2, 0x400118b4\r
- 4684                  .set CYDEV_UCFG_B1_P4_U1_PLD_ORT3, 0x400118b6\r
- 4685                  .set CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST, 0x400118b8\r
- 4686                  .set CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB, 0x400118ba\r
- 4687                  .set CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET, 0x400118bc\r
- 4688                  .set CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS, 0x400118be\r
- 4689                  .set CYDEV_UCFG_B1_P4_U1_CFG0, 0x400118c0\r
- 4690                  .set CYDEV_UCFG_B1_P4_U1_CFG1, 0x400118c1\r
- 4691                  .set CYDEV_UCFG_B1_P4_U1_CFG2, 0x400118c2\r
- 4692                  .set CYDEV_UCFG_B1_P4_U1_CFG3, 0x400118c3\r
- 4693                  .set CYDEV_UCFG_B1_P4_U1_CFG4, 0x400118c4\r
- 4694                  .set CYDEV_UCFG_B1_P4_U1_CFG5, 0x400118c5\r
- 4695                  .set CYDEV_UCFG_B1_P4_U1_CFG6, 0x400118c6\r
- 4696                  .set CYDEV_UCFG_B1_P4_U1_CFG7, 0x400118c7\r
- 4697                  .set CYDEV_UCFG_B1_P4_U1_CFG8, 0x400118c8\r
- 4698                  .set CYDEV_UCFG_B1_P4_U1_CFG9, 0x400118c9\r
- 4699                  .set CYDEV_UCFG_B1_P4_U1_CFG10, 0x400118ca\r
- 4700                  .set CYDEV_UCFG_B1_P4_U1_CFG11, 0x400118cb\r
- 4701                  .set CYDEV_UCFG_B1_P4_U1_CFG12, 0x400118cc\r
- 4702                  .set CYDEV_UCFG_B1_P4_U1_CFG13, 0x400118cd\r
- 4703                  .set CYDEV_UCFG_B1_P4_U1_CFG14, 0x400118ce\r
- 4704                  .set CYDEV_UCFG_B1_P4_U1_CFG15, 0x400118cf\r
- 4705                  .set CYDEV_UCFG_B1_P4_U1_CFG16, 0x400118d0\r
- 4706                  .set CYDEV_UCFG_B1_P4_U1_CFG17, 0x400118d1\r
- 4707                  .set CYDEV_UCFG_B1_P4_U1_CFG18, 0x400118d2\r
- 4708                  .set CYDEV_UCFG_B1_P4_U1_CFG19, 0x400118d3\r
- 4709                  .set CYDEV_UCFG_B1_P4_U1_CFG20, 0x400118d4\r
- 4710                  .set CYDEV_UCFG_B1_P4_U1_CFG21, 0x400118d5\r
- 4711                  .set CYDEV_UCFG_B1_P4_U1_CFG22, 0x400118d6\r
- 4712                  .set CYDEV_UCFG_B1_P4_U1_CFG23, 0x400118d7\r
- 4713                  .set CYDEV_UCFG_B1_P4_U1_CFG24, 0x400118d8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 84\r
-\r
-\r
- 4714                  .set CYDEV_UCFG_B1_P4_U1_CFG25, 0x400118d9\r
- 4715                  .set CYDEV_UCFG_B1_P4_U1_CFG26, 0x400118da\r
- 4716                  .set CYDEV_UCFG_B1_P4_U1_CFG27, 0x400118db\r
- 4717                  .set CYDEV_UCFG_B1_P4_U1_CFG28, 0x400118dc\r
- 4718                  .set CYDEV_UCFG_B1_P4_U1_CFG29, 0x400118dd\r
- 4719                  .set CYDEV_UCFG_B1_P4_U1_CFG30, 0x400118de\r
- 4720                  .set CYDEV_UCFG_B1_P4_U1_CFG31, 0x400118df\r
- 4721                  .set CYDEV_UCFG_B1_P4_U1_DCFG0, 0x400118e0\r
- 4722                  .set CYDEV_UCFG_B1_P4_U1_DCFG1, 0x400118e2\r
- 4723                  .set CYDEV_UCFG_B1_P4_U1_DCFG2, 0x400118e4\r
- 4724                  .set CYDEV_UCFG_B1_P4_U1_DCFG3, 0x400118e6\r
- 4725                  .set CYDEV_UCFG_B1_P4_U1_DCFG4, 0x400118e8\r
- 4726                  .set CYDEV_UCFG_B1_P4_U1_DCFG5, 0x400118ea\r
- 4727                  .set CYDEV_UCFG_B1_P4_U1_DCFG6, 0x400118ec\r
- 4728                  .set CYDEV_UCFG_B1_P4_U1_DCFG7, 0x400118ee\r
- 4729                  .set CYDEV_UCFG_B1_P4_ROUTE_BASE, 0x40011900\r
- 4730                  .set CYDEV_UCFG_B1_P4_ROUTE_SIZE, 0x000000ef\r
- 4731                  .set CYDEV_UCFG_B1_P5_BASE, 0x40011a00\r
- 4732                  .set CYDEV_UCFG_B1_P5_SIZE, 0x000001ef\r
- 4733                  .set CYDEV_UCFG_B1_P5_U0_BASE, 0x40011a00\r
- 4734                  .set CYDEV_UCFG_B1_P5_U0_SIZE, 0x00000070\r
- 4735                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT0, 0x40011a00\r
- 4736                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT1, 0x40011a04\r
- 4737                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT2, 0x40011a08\r
- 4738                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT3, 0x40011a0c\r
- 4739                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT4, 0x40011a10\r
- 4740                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT5, 0x40011a14\r
- 4741                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT6, 0x40011a18\r
- 4742                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT7, 0x40011a1c\r
- 4743                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT8, 0x40011a20\r
- 4744                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT9, 0x40011a24\r
- 4745                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT10, 0x40011a28\r
- 4746                  .set CYDEV_UCFG_B1_P5_U0_PLD_IT11, 0x40011a2c\r
- 4747                  .set CYDEV_UCFG_B1_P5_U0_PLD_ORT0, 0x40011a30\r
- 4748                  .set CYDEV_UCFG_B1_P5_U0_PLD_ORT1, 0x40011a32\r
- 4749                  .set CYDEV_UCFG_B1_P5_U0_PLD_ORT2, 0x40011a34\r
- 4750                  .set CYDEV_UCFG_B1_P5_U0_PLD_ORT3, 0x40011a36\r
- 4751                  .set CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST, 0x40011a38\r
- 4752                  .set CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB, 0x40011a3a\r
- 4753                  .set CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET, 0x40011a3c\r
- 4754                  .set CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS, 0x40011a3e\r
- 4755                  .set CYDEV_UCFG_B1_P5_U0_CFG0, 0x40011a40\r
- 4756                  .set CYDEV_UCFG_B1_P5_U0_CFG1, 0x40011a41\r
- 4757                  .set CYDEV_UCFG_B1_P5_U0_CFG2, 0x40011a42\r
- 4758                  .set CYDEV_UCFG_B1_P5_U0_CFG3, 0x40011a43\r
- 4759                  .set CYDEV_UCFG_B1_P5_U0_CFG4, 0x40011a44\r
- 4760                  .set CYDEV_UCFG_B1_P5_U0_CFG5, 0x40011a45\r
- 4761                  .set CYDEV_UCFG_B1_P5_U0_CFG6, 0x40011a46\r
- 4762                  .set CYDEV_UCFG_B1_P5_U0_CFG7, 0x40011a47\r
- 4763                  .set CYDEV_UCFG_B1_P5_U0_CFG8, 0x40011a48\r
- 4764                  .set CYDEV_UCFG_B1_P5_U0_CFG9, 0x40011a49\r
- 4765                  .set CYDEV_UCFG_B1_P5_U0_CFG10, 0x40011a4a\r
- 4766                  .set CYDEV_UCFG_B1_P5_U0_CFG11, 0x40011a4b\r
- 4767                  .set CYDEV_UCFG_B1_P5_U0_CFG12, 0x40011a4c\r
- 4768                  .set CYDEV_UCFG_B1_P5_U0_CFG13, 0x40011a4d\r
- 4769                  .set CYDEV_UCFG_B1_P5_U0_CFG14, 0x40011a4e\r
- 4770                  .set CYDEV_UCFG_B1_P5_U0_CFG15, 0x40011a4f\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 85\r
-\r
-\r
- 4771                  .set CYDEV_UCFG_B1_P5_U0_CFG16, 0x40011a50\r
- 4772                  .set CYDEV_UCFG_B1_P5_U0_CFG17, 0x40011a51\r
- 4773                  .set CYDEV_UCFG_B1_P5_U0_CFG18, 0x40011a52\r
- 4774                  .set CYDEV_UCFG_B1_P5_U0_CFG19, 0x40011a53\r
- 4775                  .set CYDEV_UCFG_B1_P5_U0_CFG20, 0x40011a54\r
- 4776                  .set CYDEV_UCFG_B1_P5_U0_CFG21, 0x40011a55\r
- 4777                  .set CYDEV_UCFG_B1_P5_U0_CFG22, 0x40011a56\r
- 4778                  .set CYDEV_UCFG_B1_P5_U0_CFG23, 0x40011a57\r
- 4779                  .set CYDEV_UCFG_B1_P5_U0_CFG24, 0x40011a58\r
- 4780                  .set CYDEV_UCFG_B1_P5_U0_CFG25, 0x40011a59\r
- 4781                  .set CYDEV_UCFG_B1_P5_U0_CFG26, 0x40011a5a\r
- 4782                  .set CYDEV_UCFG_B1_P5_U0_CFG27, 0x40011a5b\r
- 4783                  .set CYDEV_UCFG_B1_P5_U0_CFG28, 0x40011a5c\r
- 4784                  .set CYDEV_UCFG_B1_P5_U0_CFG29, 0x40011a5d\r
- 4785                  .set CYDEV_UCFG_B1_P5_U0_CFG30, 0x40011a5e\r
- 4786                  .set CYDEV_UCFG_B1_P5_U0_CFG31, 0x40011a5f\r
- 4787                  .set CYDEV_UCFG_B1_P5_U0_DCFG0, 0x40011a60\r
- 4788                  .set CYDEV_UCFG_B1_P5_U0_DCFG1, 0x40011a62\r
- 4789                  .set CYDEV_UCFG_B1_P5_U0_DCFG2, 0x40011a64\r
- 4790                  .set CYDEV_UCFG_B1_P5_U0_DCFG3, 0x40011a66\r
- 4791                  .set CYDEV_UCFG_B1_P5_U0_DCFG4, 0x40011a68\r
- 4792                  .set CYDEV_UCFG_B1_P5_U0_DCFG5, 0x40011a6a\r
- 4793                  .set CYDEV_UCFG_B1_P5_U0_DCFG6, 0x40011a6c\r
- 4794                  .set CYDEV_UCFG_B1_P5_U0_DCFG7, 0x40011a6e\r
- 4795                  .set CYDEV_UCFG_B1_P5_U1_BASE, 0x40011a80\r
- 4796                  .set CYDEV_UCFG_B1_P5_U1_SIZE, 0x00000070\r
- 4797                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT0, 0x40011a80\r
- 4798                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT1, 0x40011a84\r
- 4799                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT2, 0x40011a88\r
- 4800                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT3, 0x40011a8c\r
- 4801                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT4, 0x40011a90\r
- 4802                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT5, 0x40011a94\r
- 4803                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT6, 0x40011a98\r
- 4804                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT7, 0x40011a9c\r
- 4805                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT8, 0x40011aa0\r
- 4806                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT9, 0x40011aa4\r
- 4807                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT10, 0x40011aa8\r
- 4808                  .set CYDEV_UCFG_B1_P5_U1_PLD_IT11, 0x40011aac\r
- 4809                  .set CYDEV_UCFG_B1_P5_U1_PLD_ORT0, 0x40011ab0\r
- 4810                  .set CYDEV_UCFG_B1_P5_U1_PLD_ORT1, 0x40011ab2\r
- 4811                  .set CYDEV_UCFG_B1_P5_U1_PLD_ORT2, 0x40011ab4\r
- 4812                  .set CYDEV_UCFG_B1_P5_U1_PLD_ORT3, 0x40011ab6\r
- 4813                  .set CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST, 0x40011ab8\r
- 4814                  .set CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB, 0x40011aba\r
- 4815                  .set CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET, 0x40011abc\r
- 4816                  .set CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS, 0x40011abe\r
- 4817                  .set CYDEV_UCFG_B1_P5_U1_CFG0, 0x40011ac0\r
- 4818                  .set CYDEV_UCFG_B1_P5_U1_CFG1, 0x40011ac1\r
- 4819                  .set CYDEV_UCFG_B1_P5_U1_CFG2, 0x40011ac2\r
- 4820                  .set CYDEV_UCFG_B1_P5_U1_CFG3, 0x40011ac3\r
- 4821                  .set CYDEV_UCFG_B1_P5_U1_CFG4, 0x40011ac4\r
- 4822                  .set CYDEV_UCFG_B1_P5_U1_CFG5, 0x40011ac5\r
- 4823                  .set CYDEV_UCFG_B1_P5_U1_CFG6, 0x40011ac6\r
- 4824                  .set CYDEV_UCFG_B1_P5_U1_CFG7, 0x40011ac7\r
- 4825                  .set CYDEV_UCFG_B1_P5_U1_CFG8, 0x40011ac8\r
- 4826                  .set CYDEV_UCFG_B1_P5_U1_CFG9, 0x40011ac9\r
- 4827                  .set CYDEV_UCFG_B1_P5_U1_CFG10, 0x40011aca\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 86\r
-\r
-\r
- 4828                  .set CYDEV_UCFG_B1_P5_U1_CFG11, 0x40011acb\r
- 4829                  .set CYDEV_UCFG_B1_P5_U1_CFG12, 0x40011acc\r
- 4830                  .set CYDEV_UCFG_B1_P5_U1_CFG13, 0x40011acd\r
- 4831                  .set CYDEV_UCFG_B1_P5_U1_CFG14, 0x40011ace\r
- 4832                  .set CYDEV_UCFG_B1_P5_U1_CFG15, 0x40011acf\r
- 4833                  .set CYDEV_UCFG_B1_P5_U1_CFG16, 0x40011ad0\r
- 4834                  .set CYDEV_UCFG_B1_P5_U1_CFG17, 0x40011ad1\r
- 4835                  .set CYDEV_UCFG_B1_P5_U1_CFG18, 0x40011ad2\r
- 4836                  .set CYDEV_UCFG_B1_P5_U1_CFG19, 0x40011ad3\r
- 4837                  .set CYDEV_UCFG_B1_P5_U1_CFG20, 0x40011ad4\r
- 4838                  .set CYDEV_UCFG_B1_P5_U1_CFG21, 0x40011ad5\r
- 4839                  .set CYDEV_UCFG_B1_P5_U1_CFG22, 0x40011ad6\r
- 4840                  .set CYDEV_UCFG_B1_P5_U1_CFG23, 0x40011ad7\r
- 4841                  .set CYDEV_UCFG_B1_P5_U1_CFG24, 0x40011ad8\r
- 4842                  .set CYDEV_UCFG_B1_P5_U1_CFG25, 0x40011ad9\r
- 4843                  .set CYDEV_UCFG_B1_P5_U1_CFG26, 0x40011ada\r
- 4844                  .set CYDEV_UCFG_B1_P5_U1_CFG27, 0x40011adb\r
- 4845                  .set CYDEV_UCFG_B1_P5_U1_CFG28, 0x40011adc\r
- 4846                  .set CYDEV_UCFG_B1_P5_U1_CFG29, 0x40011add\r
- 4847                  .set CYDEV_UCFG_B1_P5_U1_CFG30, 0x40011ade\r
- 4848                  .set CYDEV_UCFG_B1_P5_U1_CFG31, 0x40011adf\r
- 4849                  .set CYDEV_UCFG_B1_P5_U1_DCFG0, 0x40011ae0\r
- 4850                  .set CYDEV_UCFG_B1_P5_U1_DCFG1, 0x40011ae2\r
- 4851                  .set CYDEV_UCFG_B1_P5_U1_DCFG2, 0x40011ae4\r
- 4852                  .set CYDEV_UCFG_B1_P5_U1_DCFG3, 0x40011ae6\r
- 4853                  .set CYDEV_UCFG_B1_P5_U1_DCFG4, 0x40011ae8\r
- 4854                  .set CYDEV_UCFG_B1_P5_U1_DCFG5, 0x40011aea\r
- 4855                  .set CYDEV_UCFG_B1_P5_U1_DCFG6, 0x40011aec\r
- 4856                  .set CYDEV_UCFG_B1_P5_U1_DCFG7, 0x40011aee\r
- 4857                  .set CYDEV_UCFG_B1_P5_ROUTE_BASE, 0x40011b00\r
- 4858                  .set CYDEV_UCFG_B1_P5_ROUTE_SIZE, 0x000000ef\r
- 4859                  .set CYDEV_UCFG_DSI0_BASE, 0x40014000\r
- 4860                  .set CYDEV_UCFG_DSI0_SIZE, 0x000000ef\r
- 4861                  .set CYDEV_UCFG_DSI1_BASE, 0x40014100\r
- 4862                  .set CYDEV_UCFG_DSI1_SIZE, 0x000000ef\r
- 4863                  .set CYDEV_UCFG_DSI2_BASE, 0x40014200\r
- 4864                  .set CYDEV_UCFG_DSI2_SIZE, 0x000000ef\r
- 4865                  .set CYDEV_UCFG_DSI3_BASE, 0x40014300\r
- 4866                  .set CYDEV_UCFG_DSI3_SIZE, 0x000000ef\r
- 4867                  .set CYDEV_UCFG_DSI4_BASE, 0x40014400\r
- 4868                  .set CYDEV_UCFG_DSI4_SIZE, 0x000000ef\r
- 4869                  .set CYDEV_UCFG_DSI5_BASE, 0x40014500\r
- 4870                  .set CYDEV_UCFG_DSI5_SIZE, 0x000000ef\r
- 4871                  .set CYDEV_UCFG_DSI6_BASE, 0x40014600\r
- 4872                  .set CYDEV_UCFG_DSI6_SIZE, 0x000000ef\r
- 4873                  .set CYDEV_UCFG_DSI7_BASE, 0x40014700\r
- 4874                  .set CYDEV_UCFG_DSI7_SIZE, 0x000000ef\r
- 4875                  .set CYDEV_UCFG_DSI8_BASE, 0x40014800\r
- 4876                  .set CYDEV_UCFG_DSI8_SIZE, 0x000000ef\r
- 4877                  .set CYDEV_UCFG_DSI9_BASE, 0x40014900\r
- 4878                  .set CYDEV_UCFG_DSI9_SIZE, 0x000000ef\r
- 4879                  .set CYDEV_UCFG_DSI12_BASE, 0x40014c00\r
- 4880                  .set CYDEV_UCFG_DSI12_SIZE, 0x000000ef\r
- 4881                  .set CYDEV_UCFG_DSI13_BASE, 0x40014d00\r
- 4882                  .set CYDEV_UCFG_DSI13_SIZE, 0x000000ef\r
- 4883                  .set CYDEV_UCFG_BCTL0_BASE, 0x40015000\r
- 4884                  .set CYDEV_UCFG_BCTL0_SIZE, 0x00000010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 87\r
-\r
-\r
- 4885                  .set CYDEV_UCFG_BCTL0_MDCLK_EN, 0x40015000\r
- 4886                  .set CYDEV_UCFG_BCTL0_MBCLK_EN, 0x40015001\r
- 4887                  .set CYDEV_UCFG_BCTL0_WAIT_CFG, 0x40015002\r
- 4888                  .set CYDEV_UCFG_BCTL0_BANK_CTL, 0x40015003\r
- 4889                  .set CYDEV_UCFG_BCTL0_UDB_TEST_3, 0x40015007\r
- 4890                  .set CYDEV_UCFG_BCTL0_DCLK_EN0, 0x40015008\r
- 4891                  .set CYDEV_UCFG_BCTL0_BCLK_EN0, 0x40015009\r
- 4892                  .set CYDEV_UCFG_BCTL0_DCLK_EN1, 0x4001500a\r
- 4893                  .set CYDEV_UCFG_BCTL0_BCLK_EN1, 0x4001500b\r
- 4894                  .set CYDEV_UCFG_BCTL0_DCLK_EN2, 0x4001500c\r
- 4895                  .set CYDEV_UCFG_BCTL0_BCLK_EN2, 0x4001500d\r
- 4896                  .set CYDEV_UCFG_BCTL0_DCLK_EN3, 0x4001500e\r
- 4897                  .set CYDEV_UCFG_BCTL0_BCLK_EN3, 0x4001500f\r
- 4898                  .set CYDEV_UCFG_BCTL1_BASE, 0x40015010\r
- 4899                  .set CYDEV_UCFG_BCTL1_SIZE, 0x00000010\r
- 4900                  .set CYDEV_UCFG_BCTL1_MDCLK_EN, 0x40015010\r
- 4901                  .set CYDEV_UCFG_BCTL1_MBCLK_EN, 0x40015011\r
- 4902                  .set CYDEV_UCFG_BCTL1_WAIT_CFG, 0x40015012\r
- 4903                  .set CYDEV_UCFG_BCTL1_BANK_CTL, 0x40015013\r
- 4904                  .set CYDEV_UCFG_BCTL1_UDB_TEST_3, 0x40015017\r
- 4905                  .set CYDEV_UCFG_BCTL1_DCLK_EN0, 0x40015018\r
- 4906                  .set CYDEV_UCFG_BCTL1_BCLK_EN0, 0x40015019\r
- 4907                  .set CYDEV_UCFG_BCTL1_DCLK_EN1, 0x4001501a\r
- 4908                  .set CYDEV_UCFG_BCTL1_BCLK_EN1, 0x4001501b\r
- 4909                  .set CYDEV_UCFG_BCTL1_DCLK_EN2, 0x4001501c\r
- 4910                  .set CYDEV_UCFG_BCTL1_BCLK_EN2, 0x4001501d\r
- 4911                  .set CYDEV_UCFG_BCTL1_DCLK_EN3, 0x4001501e\r
- 4912                  .set CYDEV_UCFG_BCTL1_BCLK_EN3, 0x4001501f\r
- 4913                  .set CYDEV_IDMUX_BASE, 0x40015100\r
- 4914                  .set CYDEV_IDMUX_SIZE, 0x00000016\r
- 4915                  .set CYDEV_IDMUX_IRQ_CTL0, 0x40015100\r
- 4916                  .set CYDEV_IDMUX_IRQ_CTL1, 0x40015101\r
- 4917                  .set CYDEV_IDMUX_IRQ_CTL2, 0x40015102\r
- 4918                  .set CYDEV_IDMUX_IRQ_CTL3, 0x40015103\r
- 4919                  .set CYDEV_IDMUX_IRQ_CTL4, 0x40015104\r
- 4920                  .set CYDEV_IDMUX_IRQ_CTL5, 0x40015105\r
- 4921                  .set CYDEV_IDMUX_IRQ_CTL6, 0x40015106\r
- 4922                  .set CYDEV_IDMUX_IRQ_CTL7, 0x40015107\r
- 4923                  .set CYDEV_IDMUX_DRQ_CTL0, 0x40015110\r
- 4924                  .set CYDEV_IDMUX_DRQ_CTL1, 0x40015111\r
- 4925                  .set CYDEV_IDMUX_DRQ_CTL2, 0x40015112\r
- 4926                  .set CYDEV_IDMUX_DRQ_CTL3, 0x40015113\r
- 4927                  .set CYDEV_IDMUX_DRQ_CTL4, 0x40015114\r
- 4928                  .set CYDEV_IDMUX_DRQ_CTL5, 0x40015115\r
- 4929                  .set CYDEV_CACHERAM_BASE, 0x40030000\r
- 4930                  .set CYDEV_CACHERAM_SIZE, 0x00000400\r
- 4931                  .set CYDEV_CACHERAM_DATA_MBASE, 0x40030000\r
- 4932                  .set CYDEV_CACHERAM_DATA_MSIZE, 0x00000400\r
- 4933                  .set CYDEV_SFR_BASE, 0x40050100\r
- 4934                  .set CYDEV_SFR_SIZE, 0x000000fb\r
- 4935                  .set CYDEV_SFR_GPIO0, 0x40050180\r
- 4936                  .set CYDEV_SFR_GPIRD0, 0x40050189\r
- 4937                  .set CYDEV_SFR_GPIO0_SEL, 0x4005018a\r
- 4938                  .set CYDEV_SFR_GPIO1, 0x40050190\r
- 4939                  .set CYDEV_SFR_GPIRD1, 0x40050191\r
- 4940                  .set CYDEV_SFR_GPIO2, 0x40050198\r
- 4941                  .set CYDEV_SFR_GPIRD2, 0x40050199\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 88\r
-\r
-\r
- 4942                  .set CYDEV_SFR_GPIO2_SEL, 0x4005019a\r
- 4943                  .set CYDEV_SFR_GPIO1_SEL, 0x400501a2\r
- 4944                  .set CYDEV_SFR_GPIO3, 0x400501b0\r
- 4945                  .set CYDEV_SFR_GPIRD3, 0x400501b1\r
- 4946                  .set CYDEV_SFR_GPIO3_SEL, 0x400501b2\r
- 4947                  .set CYDEV_SFR_GPIO4, 0x400501c0\r
- 4948                  .set CYDEV_SFR_GPIRD4, 0x400501c1\r
- 4949                  .set CYDEV_SFR_GPIO4_SEL, 0x400501c2\r
- 4950                  .set CYDEV_SFR_GPIO5, 0x400501c8\r
- 4951                  .set CYDEV_SFR_GPIRD5, 0x400501c9\r
- 4952                  .set CYDEV_SFR_GPIO5_SEL, 0x400501ca\r
- 4953                  .set CYDEV_SFR_GPIO6, 0x400501d8\r
- 4954                  .set CYDEV_SFR_GPIRD6, 0x400501d9\r
- 4955                  .set CYDEV_SFR_GPIO6_SEL, 0x400501da\r
- 4956                  .set CYDEV_SFR_GPIO12, 0x400501e8\r
- 4957                  .set CYDEV_SFR_GPIRD12, 0x400501e9\r
- 4958                  .set CYDEV_SFR_GPIO12_SEL, 0x400501f2\r
- 4959                  .set CYDEV_SFR_GPIO15, 0x400501f8\r
- 4960                  .set CYDEV_SFR_GPIRD15, 0x400501f9\r
- 4961                  .set CYDEV_SFR_GPIO15_SEL, 0x400501fa\r
- 4962                  .set CYDEV_P3BA_BASE, 0x40050300\r
- 4963                  .set CYDEV_P3BA_SIZE, 0x0000002b\r
- 4964                  .set CYDEV_P3BA_Y_START, 0x40050300\r
- 4965                  .set CYDEV_P3BA_YROLL, 0x40050301\r
- 4966                  .set CYDEV_P3BA_YCFG, 0x40050302\r
- 4967                  .set CYDEV_P3BA_X_START1, 0x40050303\r
- 4968                  .set CYDEV_P3BA_X_START2, 0x40050304\r
- 4969                  .set CYDEV_P3BA_XROLL1, 0x40050305\r
- 4970                  .set CYDEV_P3BA_XROLL2, 0x40050306\r
- 4971                  .set CYDEV_P3BA_XINC, 0x40050307\r
- 4972                  .set CYDEV_P3BA_XCFG, 0x40050308\r
- 4973                  .set CYDEV_P3BA_OFFSETADDR1, 0x40050309\r
- 4974                  .set CYDEV_P3BA_OFFSETADDR2, 0x4005030a\r
- 4975                  .set CYDEV_P3BA_OFFSETADDR3, 0x4005030b\r
- 4976                  .set CYDEV_P3BA_ABSADDR1, 0x4005030c\r
- 4977                  .set CYDEV_P3BA_ABSADDR2, 0x4005030d\r
- 4978                  .set CYDEV_P3BA_ABSADDR3, 0x4005030e\r
- 4979                  .set CYDEV_P3BA_ABSADDR4, 0x4005030f\r
- 4980                  .set CYDEV_P3BA_DATCFG1, 0x40050310\r
- 4981                  .set CYDEV_P3BA_DATCFG2, 0x40050311\r
- 4982                  .set CYDEV_P3BA_CMP_RSLT1, 0x40050314\r
- 4983                  .set CYDEV_P3BA_CMP_RSLT2, 0x40050315\r
- 4984                  .set CYDEV_P3BA_CMP_RSLT3, 0x40050316\r
- 4985                  .set CYDEV_P3BA_CMP_RSLT4, 0x40050317\r
- 4986                  .set CYDEV_P3BA_DATA_REG1, 0x40050318\r
- 4987                  .set CYDEV_P3BA_DATA_REG2, 0x40050319\r
- 4988                  .set CYDEV_P3BA_DATA_REG3, 0x4005031a\r
- 4989                  .set CYDEV_P3BA_DATA_REG4, 0x4005031b\r
- 4990                  .set CYDEV_P3BA_EXP_DATA1, 0x4005031c\r
- 4991                  .set CYDEV_P3BA_EXP_DATA2, 0x4005031d\r
- 4992                  .set CYDEV_P3BA_EXP_DATA3, 0x4005031e\r
- 4993                  .set CYDEV_P3BA_EXP_DATA4, 0x4005031f\r
- 4994                  .set CYDEV_P3BA_MSTR_HRDATA1, 0x40050320\r
- 4995                  .set CYDEV_P3BA_MSTR_HRDATA2, 0x40050321\r
- 4996                  .set CYDEV_P3BA_MSTR_HRDATA3, 0x40050322\r
- 4997                  .set CYDEV_P3BA_MSTR_HRDATA4, 0x40050323\r
- 4998                  .set CYDEV_P3BA_BIST_EN, 0x40050324\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 89\r
-\r
-\r
- 4999                  .set CYDEV_P3BA_PHUB_MASTER_SSR, 0x40050325\r
- 5000                  .set CYDEV_P3BA_SEQCFG1, 0x40050326\r
- 5001                  .set CYDEV_P3BA_SEQCFG2, 0x40050327\r
- 5002                  .set CYDEV_P3BA_Y_CURR, 0x40050328\r
- 5003                  .set CYDEV_P3BA_X_CURR1, 0x40050329\r
- 5004                  .set CYDEV_P3BA_X_CURR2, 0x4005032a\r
- 5005                  .set CYDEV_PANTHER_BASE, 0x40080000\r
- 5006                  .set CYDEV_PANTHER_SIZE, 0x00000020\r
- 5007                  .set CYDEV_PANTHER_STCALIB_CFG, 0x40080000\r
- 5008                  .set CYDEV_PANTHER_WAITPIPE, 0x40080004\r
- 5009                  .set CYDEV_PANTHER_TRACE_CFG, 0x40080008\r
- 5010                  .set CYDEV_PANTHER_DBG_CFG, 0x4008000c\r
- 5011                  .set CYDEV_PANTHER_CM3_LCKRST_STAT, 0x40080018\r
- 5012                  .set CYDEV_PANTHER_DEVICE_ID, 0x4008001c\r
- 5013                  .set CYDEV_FLSECC_BASE, 0x48000000\r
- 5014                  .set CYDEV_FLSECC_SIZE, 0x00008000\r
- 5015                  .set CYDEV_FLSECC_DATA_MBASE, 0x48000000\r
- 5016                  .set CYDEV_FLSECC_DATA_MSIZE, 0x00008000\r
- 5017                  .set CYDEV_FLSHID_BASE, 0x49000000\r
- 5018                  .set CYDEV_FLSHID_SIZE, 0x00000200\r
- 5019                  .set CYDEV_FLSHID_RSVD_MBASE, 0x49000000\r
- 5020                  .set CYDEV_FLSHID_RSVD_MSIZE, 0x00000080\r
- 5021                  .set CYDEV_FLSHID_CUST_MDATA_MBASE, 0x49000080\r
- 5022                  .set CYDEV_FLSHID_CUST_MDATA_MSIZE, 0x00000080\r
- 5023                  .set CYDEV_FLSHID_CUST_TABLES_BASE, 0x49000100\r
- 5024                  .set CYDEV_FLSHID_CUST_TABLES_SIZE, 0x00000040\r
- 5025                  .set CYDEV_FLSHID_CUST_TABLES_Y_LOC, 0x49000100\r
- 5026                  .set CYDEV_FLSHID_CUST_TABLES_X_LOC, 0x49000101\r
- 5027                  .set CYDEV_FLSHID_CUST_TABLES_WAFER_NUM, 0x49000102\r
- 5028                  .set CYDEV_FLSHID_CUST_TABLES_LOT_LSB, 0x49000103\r
- 5029                  .set CYDEV_FLSHID_CUST_TABLES_LOT_MSB, 0x49000104\r
- 5030                  .set CYDEV_FLSHID_CUST_TABLES_WRK_WK, 0x49000105\r
- 5031                  .set CYDEV_FLSHID_CUST_TABLES_FAB_YR, 0x49000106\r
- 5032                  .set CYDEV_FLSHID_CUST_TABLES_MINOR, 0x49000107\r
- 5033                  .set CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ, 0x49000108\r
- 5034                  .set CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ, 0x49000109\r
- 5035                  .set CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ, 0x4900010a\r
- 5036                  .set CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ, 0x4900010b\r
- 5037                  .set CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ, 0x4900010c\r
- 5038                  .set CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ, 0x4900010d\r
- 5039                  .set CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ, 0x4900010e\r
- 5040                  .set CYDEV_FLSHID_CUST_TABLES_IMO_USB, 0x4900010f\r
- 5041                  .set CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS, 0x49000110\r
- 5042                  .set CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS, 0x49000111\r
- 5043                  .set CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS, 0x49000112\r
- 5044                  .set CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS, 0x49000113\r
- 5045                  .set CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS, 0x49000114\r
- 5046                  .set CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS, 0x49000115\r
- 5047                  .set CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS, 0x49000116\r
- 5048                  .set CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS, 0x49000117\r
- 5049                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M1, 0x49000118\r
- 5050                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M2, 0x49000119\r
- 5051                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M3, 0x4900011a\r
- 5052                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M4, 0x4900011b\r
- 5053                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M5, 0x4900011c\r
- 5054                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M6, 0x4900011d\r
- 5055                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M7, 0x4900011e\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 90\r
-\r
-\r
- 5056                  .set CYDEV_FLSHID_CUST_TABLES_DEC_M8, 0x4900011f\r
- 5057                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M1, 0x49000120\r
- 5058                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M2, 0x49000121\r
- 5059                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M3, 0x49000122\r
- 5060                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M4, 0x49000123\r
- 5061                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M5, 0x49000124\r
- 5062                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M6, 0x49000125\r
- 5063                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M7, 0x49000126\r
- 5064                  .set CYDEV_FLSHID_CUST_TABLES_DAC0_M8, 0x49000127\r
- 5065                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M1, 0x49000128\r
- 5066                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M2, 0x49000129\r
- 5067                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M3, 0x4900012a\r
- 5068                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M4, 0x4900012b\r
- 5069                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M5, 0x4900012c\r
- 5070                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M6, 0x4900012d\r
- 5071                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M7, 0x4900012e\r
- 5072                  .set CYDEV_FLSHID_CUST_TABLES_DAC2_M8, 0x4900012f\r
- 5073                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M1, 0x49000130\r
- 5074                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M2, 0x49000131\r
- 5075                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M3, 0x49000132\r
- 5076                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M4, 0x49000133\r
- 5077                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M5, 0x49000134\r
- 5078                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M6, 0x49000135\r
- 5079                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M7, 0x49000136\r
- 5080                  .set CYDEV_FLSHID_CUST_TABLES_DAC1_M8, 0x49000137\r
- 5081                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M1, 0x49000138\r
- 5082                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M2, 0x49000139\r
- 5083                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M3, 0x4900013a\r
- 5084                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M4, 0x4900013b\r
- 5085                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M5, 0x4900013c\r
- 5086                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M6, 0x4900013d\r
- 5087                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M7, 0x4900013e\r
- 5088                  .set CYDEV_FLSHID_CUST_TABLES_DAC3_M8, 0x4900013f\r
- 5089                  .set CYDEV_FLSHID_MFG_CFG_BASE, 0x49000180\r
- 5090                  .set CYDEV_FLSHID_MFG_CFG_SIZE, 0x00000080\r
- 5091                  .set CYDEV_FLSHID_MFG_CFG_IMO_TR1, 0x49000188\r
- 5092                  .set CYDEV_FLSHID_MFG_CFG_CMP0_TR0, 0x490001ac\r
- 5093                  .set CYDEV_FLSHID_MFG_CFG_CMP1_TR0, 0x490001ae\r
- 5094                  .set CYDEV_FLSHID_MFG_CFG_CMP2_TR0, 0x490001b0\r
- 5095                  .set CYDEV_FLSHID_MFG_CFG_CMP3_TR0, 0x490001b2\r
- 5096                  .set CYDEV_FLSHID_MFG_CFG_CMP0_TR1, 0x490001b4\r
- 5097                  .set CYDEV_FLSHID_MFG_CFG_CMP1_TR1, 0x490001b6\r
- 5098                  .set CYDEV_FLSHID_MFG_CFG_CMP2_TR1, 0x490001b8\r
- 5099                  .set CYDEV_FLSHID_MFG_CFG_CMP3_TR1, 0x490001ba\r
- 5100                  .set CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM, 0x490001ce\r
- 5101                  .set CYDEV_EXTMEM_BASE, 0x60000000\r
- 5102                  .set CYDEV_EXTMEM_SIZE, 0x00800000\r
- 5103                  .set CYDEV_EXTMEM_DATA_MBASE, 0x60000000\r
- 5104                  .set CYDEV_EXTMEM_DATA_MSIZE, 0x00800000\r
- 5105                  .set CYDEV_ITM_BASE, 0xe0000000\r
- 5106                  .set CYDEV_ITM_SIZE, 0x00001000\r
- 5107                  .set CYDEV_ITM_TRACE_EN, 0xe0000e00\r
- 5108                  .set CYDEV_ITM_TRACE_PRIVILEGE, 0xe0000e40\r
- 5109                  .set CYDEV_ITM_TRACE_CTRL, 0xe0000e80\r
- 5110                  .set CYDEV_ITM_LOCK_ACCESS, 0xe0000fb0\r
- 5111                  .set CYDEV_ITM_LOCK_STATUS, 0xe0000fb4\r
- 5112                  .set CYDEV_ITM_PID4, 0xe0000fd0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 91\r
-\r
-\r
- 5113                  .set CYDEV_ITM_PID5, 0xe0000fd4\r
- 5114                  .set CYDEV_ITM_PID6, 0xe0000fd8\r
- 5115                  .set CYDEV_ITM_PID7, 0xe0000fdc\r
- 5116                  .set CYDEV_ITM_PID0, 0xe0000fe0\r
- 5117                  .set CYDEV_ITM_PID1, 0xe0000fe4\r
- 5118                  .set CYDEV_ITM_PID2, 0xe0000fe8\r
- 5119                  .set CYDEV_ITM_PID3, 0xe0000fec\r
- 5120                  .set CYDEV_ITM_CID0, 0xe0000ff0\r
- 5121                  .set CYDEV_ITM_CID1, 0xe0000ff4\r
- 5122                  .set CYDEV_ITM_CID2, 0xe0000ff8\r
- 5123                  .set CYDEV_ITM_CID3, 0xe0000ffc\r
- 5124                  .set CYDEV_DWT_BASE, 0xe0001000\r
- 5125                  .set CYDEV_DWT_SIZE, 0x0000005c\r
- 5126                  .set CYDEV_DWT_CTRL, 0xe0001000\r
- 5127                  .set CYDEV_DWT_CYCLE_COUNT, 0xe0001004\r
- 5128                  .set CYDEV_DWT_CPI_COUNT, 0xe0001008\r
- 5129                  .set CYDEV_DWT_EXC_OVHD_COUNT, 0xe000100c\r
- 5130                  .set CYDEV_DWT_SLEEP_COUNT, 0xe0001010\r
- 5131                  .set CYDEV_DWT_LSU_COUNT, 0xe0001014\r
- 5132                  .set CYDEV_DWT_FOLD_COUNT, 0xe0001018\r
- 5133                  .set CYDEV_DWT_PC_SAMPLE, 0xe000101c\r
- 5134                  .set CYDEV_DWT_COMP_0, 0xe0001020\r
- 5135                  .set CYDEV_DWT_MASK_0, 0xe0001024\r
- 5136                  .set CYDEV_DWT_FUNCTION_0, 0xe0001028\r
- 5137                  .set CYDEV_DWT_COMP_1, 0xe0001030\r
- 5138                  .set CYDEV_DWT_MASK_1, 0xe0001034\r
- 5139                  .set CYDEV_DWT_FUNCTION_1, 0xe0001038\r
- 5140                  .set CYDEV_DWT_COMP_2, 0xe0001040\r
- 5141                  .set CYDEV_DWT_MASK_2, 0xe0001044\r
- 5142                  .set CYDEV_DWT_FUNCTION_2, 0xe0001048\r
- 5143                  .set CYDEV_DWT_COMP_3, 0xe0001050\r
- 5144                  .set CYDEV_DWT_MASK_3, 0xe0001054\r
- 5145                  .set CYDEV_DWT_FUNCTION_3, 0xe0001058\r
- 5146                  .set CYDEV_FPB_BASE, 0xe0002000\r
- 5147                  .set CYDEV_FPB_SIZE, 0x00001000\r
- 5148                  .set CYDEV_FPB_CTRL, 0xe0002000\r
- 5149                  .set CYDEV_FPB_REMAP, 0xe0002004\r
- 5150                  .set CYDEV_FPB_FP_COMP_0, 0xe0002008\r
- 5151                  .set CYDEV_FPB_FP_COMP_1, 0xe000200c\r
- 5152                  .set CYDEV_FPB_FP_COMP_2, 0xe0002010\r
- 5153                  .set CYDEV_FPB_FP_COMP_3, 0xe0002014\r
- 5154                  .set CYDEV_FPB_FP_COMP_4, 0xe0002018\r
- 5155                  .set CYDEV_FPB_FP_COMP_5, 0xe000201c\r
- 5156                  .set CYDEV_FPB_FP_COMP_6, 0xe0002020\r
- 5157                  .set CYDEV_FPB_FP_COMP_7, 0xe0002024\r
- 5158                  .set CYDEV_FPB_PID4, 0xe0002fd0\r
- 5159                  .set CYDEV_FPB_PID5, 0xe0002fd4\r
- 5160                  .set CYDEV_FPB_PID6, 0xe0002fd8\r
- 5161                  .set CYDEV_FPB_PID7, 0xe0002fdc\r
- 5162                  .set CYDEV_FPB_PID0, 0xe0002fe0\r
- 5163                  .set CYDEV_FPB_PID1, 0xe0002fe4\r
- 5164                  .set CYDEV_FPB_PID2, 0xe0002fe8\r
- 5165                  .set CYDEV_FPB_PID3, 0xe0002fec\r
- 5166                  .set CYDEV_FPB_CID0, 0xe0002ff0\r
- 5167                  .set CYDEV_FPB_CID1, 0xe0002ff4\r
- 5168                  .set CYDEV_FPB_CID2, 0xe0002ff8\r
- 5169                  .set CYDEV_FPB_CID3, 0xe0002ffc\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 92\r
-\r
-\r
- 5170                  .set CYDEV_NVIC_BASE, 0xe000e000\r
- 5171                  .set CYDEV_NVIC_SIZE, 0x00000d3c\r
- 5172                  .set CYDEV_NVIC_INT_CTL_TYPE, 0xe000e004\r
- 5173                  .set CYDEV_NVIC_SYSTICK_CTL, 0xe000e010\r
- 5174                  .set CYDEV_NVIC_SYSTICK_RELOAD, 0xe000e014\r
- 5175                  .set CYDEV_NVIC_SYSTICK_CURRENT, 0xe000e018\r
- 5176                  .set CYDEV_NVIC_SYSTICK_CAL, 0xe000e01c\r
- 5177                  .set CYDEV_NVIC_SETENA0, 0xe000e100\r
- 5178                  .set CYDEV_NVIC_CLRENA0, 0xe000e180\r
- 5179                  .set CYDEV_NVIC_SETPEND0, 0xe000e200\r
- 5180                  .set CYDEV_NVIC_CLRPEND0, 0xe000e280\r
- 5181                  .set CYDEV_NVIC_ACTIVE0, 0xe000e300\r
- 5182                  .set CYDEV_NVIC_PRI_0, 0xe000e400\r
- 5183                  .set CYDEV_NVIC_PRI_1, 0xe000e401\r
- 5184                  .set CYDEV_NVIC_PRI_2, 0xe000e402\r
- 5185                  .set CYDEV_NVIC_PRI_3, 0xe000e403\r
- 5186                  .set CYDEV_NVIC_PRI_4, 0xe000e404\r
- 5187                  .set CYDEV_NVIC_PRI_5, 0xe000e405\r
- 5188                  .set CYDEV_NVIC_PRI_6, 0xe000e406\r
- 5189                  .set CYDEV_NVIC_PRI_7, 0xe000e407\r
- 5190                  .set CYDEV_NVIC_PRI_8, 0xe000e408\r
- 5191                  .set CYDEV_NVIC_PRI_9, 0xe000e409\r
- 5192                  .set CYDEV_NVIC_PRI_10, 0xe000e40a\r
- 5193                  .set CYDEV_NVIC_PRI_11, 0xe000e40b\r
- 5194                  .set CYDEV_NVIC_PRI_12, 0xe000e40c\r
- 5195                  .set CYDEV_NVIC_PRI_13, 0xe000e40d\r
- 5196                  .set CYDEV_NVIC_PRI_14, 0xe000e40e\r
- 5197                  .set CYDEV_NVIC_PRI_15, 0xe000e40f\r
- 5198                  .set CYDEV_NVIC_PRI_16, 0xe000e410\r
- 5199                  .set CYDEV_NVIC_PRI_17, 0xe000e411\r
- 5200                  .set CYDEV_NVIC_PRI_18, 0xe000e412\r
- 5201                  .set CYDEV_NVIC_PRI_19, 0xe000e413\r
- 5202                  .set CYDEV_NVIC_PRI_20, 0xe000e414\r
- 5203                  .set CYDEV_NVIC_PRI_21, 0xe000e415\r
- 5204                  .set CYDEV_NVIC_PRI_22, 0xe000e416\r
- 5205                  .set CYDEV_NVIC_PRI_23, 0xe000e417\r
- 5206                  .set CYDEV_NVIC_PRI_24, 0xe000e418\r
- 5207                  .set CYDEV_NVIC_PRI_25, 0xe000e419\r
- 5208                  .set CYDEV_NVIC_PRI_26, 0xe000e41a\r
- 5209                  .set CYDEV_NVIC_PRI_27, 0xe000e41b\r
- 5210                  .set CYDEV_NVIC_PRI_28, 0xe000e41c\r
- 5211                  .set CYDEV_NVIC_PRI_29, 0xe000e41d\r
- 5212                  .set CYDEV_NVIC_PRI_30, 0xe000e41e\r
- 5213                  .set CYDEV_NVIC_PRI_31, 0xe000e41f\r
- 5214                  .set CYDEV_NVIC_CPUID_BASE, 0xe000ed00\r
- 5215                  .set CYDEV_NVIC_INTR_CTRL_STATE, 0xe000ed04\r
- 5216                  .set CYDEV_NVIC_VECT_OFFSET, 0xe000ed08\r
- 5217                  .set CYDEV_NVIC_APPLN_INTR, 0xe000ed0c\r
- 5218                  .set CYDEV_NVIC_SYSTEM_CONTROL, 0xe000ed10\r
- 5219                  .set CYDEV_NVIC_CFG_CONTROL, 0xe000ed14\r
- 5220                  .set CYDEV_NVIC_SYS_PRIO_HANDLER_4_7, 0xe000ed18\r
- 5221                  .set CYDEV_NVIC_SYS_PRIO_HANDLER_8_11, 0xe000ed1c\r
- 5222                  .set CYDEV_NVIC_SYS_PRIO_HANDLER_12_15, 0xe000ed20\r
- 5223                  .set CYDEV_NVIC_SYS_HANDLER_CSR, 0xe000ed24\r
- 5224                  .set CYDEV_NVIC_MEMMAN_FAULT_STATUS, 0xe000ed28\r
- 5225                  .set CYDEV_NVIC_BUS_FAULT_STATUS, 0xe000ed29\r
- 5226                  .set CYDEV_NVIC_USAGE_FAULT_STATUS, 0xe000ed2a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 93\r
-\r
-\r
- 5227                  .set CYDEV_NVIC_HARD_FAULT_STATUS, 0xe000ed2c\r
- 5228                  .set CYDEV_NVIC_DEBUG_FAULT_STATUS, 0xe000ed30\r
- 5229                  .set CYDEV_NVIC_MEMMAN_FAULT_ADD, 0xe000ed34\r
- 5230                  .set CYDEV_NVIC_BUS_FAULT_ADD, 0xe000ed38\r
- 5231                  .set CYDEV_CORE_DBG_BASE, 0xe000edf0\r
- 5232                  .set CYDEV_CORE_DBG_SIZE, 0x00000010\r
- 5233                  .set CYDEV_CORE_DBG_DBG_HLT_CS, 0xe000edf0\r
- 5234                  .set CYDEV_CORE_DBG_DBG_REG_SEL, 0xe000edf4\r
- 5235                  .set CYDEV_CORE_DBG_DBG_REG_DATA, 0xe000edf8\r
- 5236                  .set CYDEV_CORE_DBG_EXC_MON_CTL, 0xe000edfc\r
- 5237                  .set CYDEV_TPIU_BASE, 0xe0040000\r
- 5238                  .set CYDEV_TPIU_SIZE, 0x00001000\r
- 5239                  .set CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ, 0xe0040000\r
- 5240                  .set CYDEV_TPIU_CURRENT_SYNC_PRT_SZ, 0xe0040004\r
- 5241                  .set CYDEV_TPIU_ASYNC_CLK_PRESCALER, 0xe0040010\r
- 5242                  .set CYDEV_TPIU_PROTOCOL, 0xe00400f0\r
- 5243                  .set CYDEV_TPIU_FORM_FLUSH_STAT, 0xe0040300\r
- 5244                  .set CYDEV_TPIU_FORM_FLUSH_CTRL, 0xe0040304\r
- 5245                  .set CYDEV_TPIU_TRIGGER, 0xe0040ee8\r
- 5246                  .set CYDEV_TPIU_ITETMDATA, 0xe0040eec\r
- 5247                  .set CYDEV_TPIU_ITATBCTR2, 0xe0040ef0\r
- 5248                  .set CYDEV_TPIU_ITATBCTR0, 0xe0040ef8\r
- 5249                  .set CYDEV_TPIU_ITITMDATA, 0xe0040efc\r
- 5250                  .set CYDEV_TPIU_ITCTRL, 0xe0040f00\r
- 5251                  .set CYDEV_TPIU_DEVID, 0xe0040fc8\r
- 5252                  .set CYDEV_TPIU_DEVTYPE, 0xe0040fcc\r
- 5253                  .set CYDEV_TPIU_PID4, 0xe0040fd0\r
- 5254                  .set CYDEV_TPIU_PID5, 0xe0040fd4\r
- 5255                  .set CYDEV_TPIU_PID6, 0xe0040fd8\r
- 5256                  .set CYDEV_TPIU_PID7, 0xe0040fdc\r
- 5257                  .set CYDEV_TPIU_PID0, 0xe0040fe0\r
- 5258                  .set CYDEV_TPIU_PID1, 0xe0040fe4\r
- 5259                  .set CYDEV_TPIU_PID2, 0xe0040fe8\r
- 5260                  .set CYDEV_TPIU_PID3, 0xe0040fec\r
- 5261                  .set CYDEV_TPIU_CID0, 0xe0040ff0\r
- 5262                  .set CYDEV_TPIU_CID1, 0xe0040ff4\r
- 5263                  .set CYDEV_TPIU_CID2, 0xe0040ff8\r
- 5264                  .set CYDEV_TPIU_CID3, 0xe0040ffc\r
- 5265                  .set CYDEV_ETM_BASE, 0xe0041000\r
- 5266                  .set CYDEV_ETM_SIZE, 0x00001000\r
- 5267                  .set CYDEV_ETM_CTL, 0xe0041000\r
- 5268                  .set CYDEV_ETM_CFG_CODE, 0xe0041004\r
- 5269                  .set CYDEV_ETM_TRIG_EVENT, 0xe0041008\r
- 5270                  .set CYDEV_ETM_STATUS, 0xe0041010\r
- 5271                  .set CYDEV_ETM_SYS_CFG, 0xe0041014\r
- 5272                  .set CYDEV_ETM_TRACE_ENB_EVENT, 0xe0041020\r
- 5273                  .set CYDEV_ETM_TRACE_EN_CTRL1, 0xe0041024\r
- 5274                  .set CYDEV_ETM_FIFOFULL_LEVEL, 0xe004102c\r
- 5275                  .set CYDEV_ETM_SYNC_FREQ, 0xe00411e0\r
- 5276                  .set CYDEV_ETM_ETM_ID, 0xe00411e4\r
- 5277                  .set CYDEV_ETM_CFG_CODE_EXT, 0xe00411e8\r
- 5278                  .set CYDEV_ETM_TR_SS_EMBICE_CTRL, 0xe00411f0\r
- 5279                  .set CYDEV_ETM_CS_TRACE_ID, 0xe0041200\r
- 5280                  .set CYDEV_ETM_OS_LOCK_ACCESS, 0xe0041300\r
- 5281                  .set CYDEV_ETM_OS_LOCK_STATUS, 0xe0041304\r
- 5282                  .set CYDEV_ETM_PDSR, 0xe0041314\r
- 5283                  .set CYDEV_ETM_ITMISCIN, 0xe0041ee0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 94\r
-\r
-\r
- 5284                  .set CYDEV_ETM_ITTRIGOUT, 0xe0041ee8\r
- 5285                  .set CYDEV_ETM_ITATBCTR2, 0xe0041ef0\r
- 5286                  .set CYDEV_ETM_ITATBCTR0, 0xe0041ef8\r
- 5287                  .set CYDEV_ETM_INT_MODE_CTRL, 0xe0041f00\r
- 5288                  .set CYDEV_ETM_CLM_TAG_SET, 0xe0041fa0\r
- 5289                  .set CYDEV_ETM_CLM_TAG_CLR, 0xe0041fa4\r
- 5290                  .set CYDEV_ETM_LOCK_ACCESS, 0xe0041fb0\r
- 5291                  .set CYDEV_ETM_LOCK_STATUS, 0xe0041fb4\r
- 5292                  .set CYDEV_ETM_AUTH_STATUS, 0xe0041fb8\r
- 5293                  .set CYDEV_ETM_DEV_TYPE, 0xe0041fcc\r
- 5294                  .set CYDEV_ETM_PID4, 0xe0041fd0\r
- 5295                  .set CYDEV_ETM_PID5, 0xe0041fd4\r
- 5296                  .set CYDEV_ETM_PID6, 0xe0041fd8\r
- 5297                  .set CYDEV_ETM_PID7, 0xe0041fdc\r
- 5298                  .set CYDEV_ETM_PID0, 0xe0041fe0\r
- 5299                  .set CYDEV_ETM_PID1, 0xe0041fe4\r
- 5300                  .set CYDEV_ETM_PID2, 0xe0041fe8\r
- 5301                  .set CYDEV_ETM_PID3, 0xe0041fec\r
- 5302                  .set CYDEV_ETM_CID0, 0xe0041ff0\r
- 5303                  .set CYDEV_ETM_CID1, 0xe0041ff4\r
- 5304                  .set CYDEV_ETM_CID2, 0xe0041ff8\r
- 5305                  .set CYDEV_ETM_CID3, 0xe0041ffc\r
- 5306                  .set CYDEV_ROM_TABLE_BASE, 0xe00ff000\r
- 5307                  .set CYDEV_ROM_TABLE_SIZE, 0x00001000\r
- 5308                  .set CYDEV_ROM_TABLE_NVIC, 0xe00ff000\r
- 5309                  .set CYDEV_ROM_TABLE_DWT, 0xe00ff004\r
- 5310                  .set CYDEV_ROM_TABLE_FPB, 0xe00ff008\r
- 5311                  .set CYDEV_ROM_TABLE_ITM, 0xe00ff00c\r
- 5312                  .set CYDEV_ROM_TABLE_TPIU, 0xe00ff010\r
- 5313                  .set CYDEV_ROM_TABLE_ETM, 0xe00ff014\r
- 5314                  .set CYDEV_ROM_TABLE_END, 0xe00ff018\r
- 5315                  .set CYDEV_ROM_TABLE_MEMTYPE, 0xe00fffcc\r
- 5316                  .set CYDEV_ROM_TABLE_PID4, 0xe00fffd0\r
- 5317                  .set CYDEV_ROM_TABLE_PID5, 0xe00fffd4\r
- 5318                  .set CYDEV_ROM_TABLE_PID6, 0xe00fffd8\r
- 5319                  .set CYDEV_ROM_TABLE_PID7, 0xe00fffdc\r
- 5320                  .set CYDEV_ROM_TABLE_PID0, 0xe00fffe0\r
- 5321                  .set CYDEV_ROM_TABLE_PID1, 0xe00fffe4\r
- 5322                  .set CYDEV_ROM_TABLE_PID2, 0xe00fffe8\r
- 5323                  .set CYDEV_ROM_TABLE_PID3, 0xe00fffec\r
- 5324                  .set CYDEV_ROM_TABLE_CID0, 0xe00ffff0\r
- 5325                  .set CYDEV_ROM_TABLE_CID1, 0xe00ffff4\r
- 5326                  .set CYDEV_ROM_TABLE_CID2, 0xe00ffff8\r
- 5327                  .set CYDEV_ROM_TABLE_CID3, 0xe00ffffc\r
- 5328                  .set CYDEV_FLS_SIZE, CYDEV_FLASH_SIZE\r
- 5329                  .set CYDEV_ECC_BASE, CYDEV_FLSECC_BASE\r
- 5330                  .set CYDEV_FLS_SECTOR_SIZE, 0x00010000\r
- 5331                  .set CYDEV_FLS_ROW_SIZE, 0x00000100\r
- 5332                  .set CYDEV_ECC_SECTOR_SIZE, 0x00002000\r
- 5333                  .set CYDEV_ECC_ROW_SIZE, 0x00000020\r
- 5334                  .set CYDEV_EEPROM_SECTOR_SIZE, 0x00000400\r
- 5335                  .set CYDEV_EEPROM_ROW_SIZE, 0x00000010\r
- 5336                  .set CYDEV_PERIPH_BASE, CYDEV_CLKDIST_BASE\r
- 5337                  .set CYCLK_LD_DISABLE, 0x00000004\r
- 5338                  .set CYCLK_LD_SYNC_EN, 0x00000002\r
- 5339                  .set CYCLK_LD_LOAD, 0x00000001\r
- 5340                  .set CYCLK_PIPE, 0x00000080\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 95\r
-\r
-\r
- 5341                  .set CYCLK_SSS, 0x00000040\r
- 5342                  .set CYCLK_EARLY, 0x00000020\r
- 5343                  .set CYCLK_DUTY, 0x00000010\r
- 5344                  .set CYCLK_SYNC, 0x00000008\r
- 5345                  .set CYCLK_SRC_SEL_CLK_SYNC_D, 0\r
- 5346                  .set CYCLK_SRC_SEL_SYNC_DIG, 0\r
- 5347                  .set CYCLK_SRC_SEL_IMO, 1\r
- 5348                  .set CYCLK_SRC_SEL_XTAL_MHZ, 2\r
- 5349                  .set CYCLK_SRC_SEL_XTALM, 2\r
- 5350                  .set CYCLK_SRC_SEL_ILO, 3\r
- 5351                  .set CYCLK_SRC_SEL_PLL, 4\r
- 5352                  .set CYCLK_SRC_SEL_XTAL_KHZ, 5\r
- 5353                  .set CYCLK_SRC_SEL_XTALK, 5\r
- 5354                  .set CYCLK_SRC_SEL_DSI_G, 6\r
- 5355                  .set CYCLK_SRC_SEL_DSI_D, 7\r
- 5356                  .set CYCLK_SRC_SEL_CLK_SYNC_A, 0\r
- 5357                  .set CYCLK_SRC_SEL_DSI_A, 7\r
-   4                   .include "cydevicegnu_trm.inc"\r
-   1                   /*******************************************************************************\r
-   2                   * FILENAME: cydevicegnu_trm.inc\r
-   3                   * \r
-   4                   * PSoC Creator 3.0 Component Pack 7\r
-   5                   *\r
-   6                   * DESCRIPTION:\r
-   7                   * This file provides all of the address values for the entire PSoC device.\r
-   8                   * This file is automatically generated by PSoC Creator.\r
-   9                   *\r
-  10                   ********************************************************************************\r
-  11                   * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12                   * You may use this file only in accordance with the license, terms, conditions, \r
-  13                   * disclaimers, and limitations in the end user license agreement accompanying \r
-  14                   * the software package with which this file was provided.\r
-  15                   ********************************************************************************/\r
-  16                   \r
-  17                   .set CYDEV_FLASH_BASE, 0x00000000\r
-  18                   .set CYDEV_FLASH_SIZE, 0x00020000\r
-  19                   .set CYREG_FLASH_DATA_MBASE, 0x00000000\r
-  20                   .set CYREG_FLASH_DATA_MSIZE, 0x00020000\r
-  21                   .set CYDEV_SRAM_BASE, 0x1fffc000\r
-  22                   .set CYDEV_SRAM_SIZE, 0x00008000\r
-  23                   .set CYREG_SRAM_CODE64K_MBASE, 0x1fff8000\r
-  24                   .set CYREG_SRAM_CODE64K_MSIZE, 0x00004000\r
-  25                   .set CYREG_SRAM_CODE32K_MBASE, 0x1fffc000\r
-  26                   .set CYREG_SRAM_CODE32K_MSIZE, 0x00002000\r
-  27                   .set CYREG_SRAM_CODE16K_MBASE, 0x1fffe000\r
-  28                   .set CYREG_SRAM_CODE16K_MSIZE, 0x00001000\r
-  29                   .set CYREG_SRAM_CODE_MBASE, 0x1fffc000\r
-  30                   .set CYREG_SRAM_CODE_MSIZE, 0x00004000\r
-  31                   .set CYREG_SRAM_DATA_MBASE, 0x20000000\r
-  32                   .set CYREG_SRAM_DATA_MSIZE, 0x00004000\r
-  33                   .set CYREG_SRAM_DATA16K_MBASE, 0x20001000\r
-  34                   .set CYREG_SRAM_DATA16K_MSIZE, 0x00001000\r
-  35                   .set CYREG_SRAM_DATA32K_MBASE, 0x20002000\r
-  36                   .set CYREG_SRAM_DATA32K_MSIZE, 0x00002000\r
-  37                   .set CYREG_SRAM_DATA64K_MBASE, 0x20004000\r
-  38                   .set CYREG_SRAM_DATA64K_MSIZE, 0x00004000\r
-  39                   .set CYDEV_DMA_BASE, 0x20008000\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 96\r
-\r
-\r
-  40                   .set CYDEV_DMA_SIZE, 0x00008000\r
-  41                   .set CYREG_DMA_SRAM64K_MBASE, 0x20008000\r
-  42                   .set CYREG_DMA_SRAM64K_MSIZE, 0x00004000\r
-  43                   .set CYREG_DMA_SRAM32K_MBASE, 0x2000c000\r
-  44                   .set CYREG_DMA_SRAM32K_MSIZE, 0x00002000\r
-  45                   .set CYREG_DMA_SRAM16K_MBASE, 0x2000e000\r
-  46                   .set CYREG_DMA_SRAM16K_MSIZE, 0x00001000\r
-  47                   .set CYREG_DMA_SRAM_MBASE, 0x2000f000\r
-  48                   .set CYREG_DMA_SRAM_MSIZE, 0x00001000\r
-  49                   .set CYDEV_CLKDIST_BASE, 0x40004000\r
-  50                   .set CYDEV_CLKDIST_SIZE, 0x00000110\r
-  51                   .set CYREG_CLKDIST_CR, 0x40004000\r
-  52                   .set CYREG_CLKDIST_LD, 0x40004001\r
-  53                   .set CYREG_CLKDIST_WRK0, 0x40004002\r
-  54                   .set CYREG_CLKDIST_WRK1, 0x40004003\r
-  55                   .set CYREG_CLKDIST_MSTR0, 0x40004004\r
-  56                   .set CYREG_CLKDIST_MSTR1, 0x40004005\r
-  57                   .set CYREG_CLKDIST_BCFG0, 0x40004006\r
-  58                   .set CYREG_CLKDIST_BCFG1, 0x40004007\r
-  59                   .set CYREG_CLKDIST_BCFG2, 0x40004008\r
-  60                   .set CYREG_CLKDIST_UCFG, 0x40004009\r
-  61                   .set CYREG_CLKDIST_DLY0, 0x4000400a\r
-  62                   .set CYREG_CLKDIST_DLY1, 0x4000400b\r
-  63                   .set CYREG_CLKDIST_DMASK, 0x40004010\r
-  64                   .set CYREG_CLKDIST_AMASK, 0x40004014\r
-  65                   .set CYDEV_CLKDIST_DCFG0_BASE, 0x40004080\r
-  66                   .set CYDEV_CLKDIST_DCFG0_SIZE, 0x00000003\r
-  67                   .set CYREG_CLKDIST_DCFG0_CFG0, 0x40004080\r
-  68                   .set CYREG_CLKDIST_DCFG0_CFG1, 0x40004081\r
-  69                   .set CYREG_CLKDIST_DCFG0_CFG2, 0x40004082\r
-  70                   .set CYDEV_CLKDIST_DCFG1_BASE, 0x40004084\r
-  71                   .set CYDEV_CLKDIST_DCFG1_SIZE, 0x00000003\r
-  72                   .set CYREG_CLKDIST_DCFG1_CFG0, 0x40004084\r
-  73                   .set CYREG_CLKDIST_DCFG1_CFG1, 0x40004085\r
-  74                   .set CYREG_CLKDIST_DCFG1_CFG2, 0x40004086\r
-  75                   .set CYDEV_CLKDIST_DCFG2_BASE, 0x40004088\r
-  76                   .set CYDEV_CLKDIST_DCFG2_SIZE, 0x00000003\r
-  77                   .set CYREG_CLKDIST_DCFG2_CFG0, 0x40004088\r
-  78                   .set CYREG_CLKDIST_DCFG2_CFG1, 0x40004089\r
-  79                   .set CYREG_CLKDIST_DCFG2_CFG2, 0x4000408a\r
-  80                   .set CYDEV_CLKDIST_DCFG3_BASE, 0x4000408c\r
-  81                   .set CYDEV_CLKDIST_DCFG3_SIZE, 0x00000003\r
-  82                   .set CYREG_CLKDIST_DCFG3_CFG0, 0x4000408c\r
-  83                   .set CYREG_CLKDIST_DCFG3_CFG1, 0x4000408d\r
-  84                   .set CYREG_CLKDIST_DCFG3_CFG2, 0x4000408e\r
-  85                   .set CYDEV_CLKDIST_DCFG4_BASE, 0x40004090\r
-  86                   .set CYDEV_CLKDIST_DCFG4_SIZE, 0x00000003\r
-  87                   .set CYREG_CLKDIST_DCFG4_CFG0, 0x40004090\r
-  88                   .set CYREG_CLKDIST_DCFG4_CFG1, 0x40004091\r
-  89                   .set CYREG_CLKDIST_DCFG4_CFG2, 0x40004092\r
-  90                   .set CYDEV_CLKDIST_DCFG5_BASE, 0x40004094\r
-  91                   .set CYDEV_CLKDIST_DCFG5_SIZE, 0x00000003\r
-  92                   .set CYREG_CLKDIST_DCFG5_CFG0, 0x40004094\r
-  93                   .set CYREG_CLKDIST_DCFG5_CFG1, 0x40004095\r
-  94                   .set CYREG_CLKDIST_DCFG5_CFG2, 0x40004096\r
-  95                   .set CYDEV_CLKDIST_DCFG6_BASE, 0x40004098\r
-  96                   .set CYDEV_CLKDIST_DCFG6_SIZE, 0x00000003\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 97\r
-\r
-\r
-  97                   .set CYREG_CLKDIST_DCFG6_CFG0, 0x40004098\r
-  98                   .set CYREG_CLKDIST_DCFG6_CFG1, 0x40004099\r
-  99                   .set CYREG_CLKDIST_DCFG6_CFG2, 0x4000409a\r
- 100                   .set CYDEV_CLKDIST_DCFG7_BASE, 0x4000409c\r
- 101                   .set CYDEV_CLKDIST_DCFG7_SIZE, 0x00000003\r
- 102                   .set CYREG_CLKDIST_DCFG7_CFG0, 0x4000409c\r
- 103                   .set CYREG_CLKDIST_DCFG7_CFG1, 0x4000409d\r
- 104                   .set CYREG_CLKDIST_DCFG7_CFG2, 0x4000409e\r
- 105                   .set CYDEV_CLKDIST_ACFG0_BASE, 0x40004100\r
- 106                   .set CYDEV_CLKDIST_ACFG0_SIZE, 0x00000004\r
- 107                   .set CYREG_CLKDIST_ACFG0_CFG0, 0x40004100\r
- 108                   .set CYREG_CLKDIST_ACFG0_CFG1, 0x40004101\r
- 109                   .set CYREG_CLKDIST_ACFG0_CFG2, 0x40004102\r
- 110                   .set CYREG_CLKDIST_ACFG0_CFG3, 0x40004103\r
- 111                   .set CYDEV_CLKDIST_ACFG1_BASE, 0x40004104\r
- 112                   .set CYDEV_CLKDIST_ACFG1_SIZE, 0x00000004\r
- 113                   .set CYREG_CLKDIST_ACFG1_CFG0, 0x40004104\r
- 114                   .set CYREG_CLKDIST_ACFG1_CFG1, 0x40004105\r
- 115                   .set CYREG_CLKDIST_ACFG1_CFG2, 0x40004106\r
- 116                   .set CYREG_CLKDIST_ACFG1_CFG3, 0x40004107\r
- 117                   .set CYDEV_CLKDIST_ACFG2_BASE, 0x40004108\r
- 118                   .set CYDEV_CLKDIST_ACFG2_SIZE, 0x00000004\r
- 119                   .set CYREG_CLKDIST_ACFG2_CFG0, 0x40004108\r
- 120                   .set CYREG_CLKDIST_ACFG2_CFG1, 0x40004109\r
- 121                   .set CYREG_CLKDIST_ACFG2_CFG2, 0x4000410a\r
- 122                   .set CYREG_CLKDIST_ACFG2_CFG3, 0x4000410b\r
- 123                   .set CYDEV_CLKDIST_ACFG3_BASE, 0x4000410c\r
- 124                   .set CYDEV_CLKDIST_ACFG3_SIZE, 0x00000004\r
- 125                   .set CYREG_CLKDIST_ACFG3_CFG0, 0x4000410c\r
- 126                   .set CYREG_CLKDIST_ACFG3_CFG1, 0x4000410d\r
- 127                   .set CYREG_CLKDIST_ACFG3_CFG2, 0x4000410e\r
- 128                   .set CYREG_CLKDIST_ACFG3_CFG3, 0x4000410f\r
- 129                   .set CYDEV_FASTCLK_BASE, 0x40004200\r
- 130                   .set CYDEV_FASTCLK_SIZE, 0x00000026\r
- 131                   .set CYDEV_FASTCLK_IMO_BASE, 0x40004200\r
- 132                   .set CYDEV_FASTCLK_IMO_SIZE, 0x00000001\r
- 133                   .set CYREG_FASTCLK_IMO_CR, 0x40004200\r
- 134                   .set CYDEV_FASTCLK_XMHZ_BASE, 0x40004210\r
- 135                   .set CYDEV_FASTCLK_XMHZ_SIZE, 0x00000004\r
- 136                   .set CYREG_FASTCLK_XMHZ_CSR, 0x40004210\r
- 137                   .set CYREG_FASTCLK_XMHZ_CFG0, 0x40004212\r
- 138                   .set CYREG_FASTCLK_XMHZ_CFG1, 0x40004213\r
- 139                   .set CYDEV_FASTCLK_PLL_BASE, 0x40004220\r
- 140                   .set CYDEV_FASTCLK_PLL_SIZE, 0x00000006\r
- 141                   .set CYREG_FASTCLK_PLL_CFG0, 0x40004220\r
- 142                   .set CYREG_FASTCLK_PLL_CFG1, 0x40004221\r
- 143                   .set CYREG_FASTCLK_PLL_P, 0x40004222\r
- 144                   .set CYREG_FASTCLK_PLL_Q, 0x40004223\r
- 145                   .set CYREG_FASTCLK_PLL_SR, 0x40004225\r
- 146                   .set CYDEV_SLOWCLK_BASE, 0x40004300\r
- 147                   .set CYDEV_SLOWCLK_SIZE, 0x0000000b\r
- 148                   .set CYDEV_SLOWCLK_ILO_BASE, 0x40004300\r
- 149                   .set CYDEV_SLOWCLK_ILO_SIZE, 0x00000002\r
- 150                   .set CYREG_SLOWCLK_ILO_CR0, 0x40004300\r
- 151                   .set CYREG_SLOWCLK_ILO_CR1, 0x40004301\r
- 152                   .set CYDEV_SLOWCLK_X32_BASE, 0x40004308\r
- 153                   .set CYDEV_SLOWCLK_X32_SIZE, 0x00000003\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 98\r
-\r
-\r
- 154                   .set CYREG_SLOWCLK_X32_CR, 0x40004308\r
- 155                   .set CYREG_SLOWCLK_X32_CFG, 0x40004309\r
- 156                   .set CYREG_SLOWCLK_X32_TST, 0x4000430a\r
- 157                   .set CYDEV_BOOST_BASE, 0x40004320\r
- 158                   .set CYDEV_BOOST_SIZE, 0x00000007\r
- 159                   .set CYREG_BOOST_CR0, 0x40004320\r
- 160                   .set CYREG_BOOST_CR1, 0x40004321\r
- 161                   .set CYREG_BOOST_CR2, 0x40004322\r
- 162                   .set CYREG_BOOST_CR3, 0x40004323\r
- 163                   .set CYREG_BOOST_SR, 0x40004324\r
- 164                   .set CYREG_BOOST_CR4, 0x40004325\r
- 165                   .set CYREG_BOOST_SR2, 0x40004326\r
- 166                   .set CYDEV_PWRSYS_BASE, 0x40004330\r
- 167                   .set CYDEV_PWRSYS_SIZE, 0x00000002\r
- 168                   .set CYREG_PWRSYS_CR0, 0x40004330\r
- 169                   .set CYREG_PWRSYS_CR1, 0x40004331\r
- 170                   .set CYDEV_PM_BASE, 0x40004380\r
- 171                   .set CYDEV_PM_SIZE, 0x00000057\r
- 172                   .set CYREG_PM_TW_CFG0, 0x40004380\r
- 173                   .set CYREG_PM_TW_CFG1, 0x40004381\r
- 174                   .set CYREG_PM_TW_CFG2, 0x40004382\r
- 175                   .set CYREG_PM_WDT_CFG, 0x40004383\r
- 176                   .set CYREG_PM_WDT_CR, 0x40004384\r
- 177                   .set CYREG_PM_INT_SR, 0x40004390\r
- 178                   .set CYREG_PM_MODE_CFG0, 0x40004391\r
- 179                   .set CYREG_PM_MODE_CFG1, 0x40004392\r
- 180                   .set CYREG_PM_MODE_CSR, 0x40004393\r
- 181                   .set CYREG_PM_USB_CR0, 0x40004394\r
- 182                   .set CYREG_PM_WAKEUP_CFG0, 0x40004398\r
- 183                   .set CYREG_PM_WAKEUP_CFG1, 0x40004399\r
- 184                   .set CYREG_PM_WAKEUP_CFG2, 0x4000439a\r
- 185                   .set CYDEV_PM_ACT_BASE, 0x400043a0\r
- 186                   .set CYDEV_PM_ACT_SIZE, 0x0000000e\r
- 187                   .set CYREG_PM_ACT_CFG0, 0x400043a0\r
- 188                   .set CYREG_PM_ACT_CFG1, 0x400043a1\r
- 189                   .set CYREG_PM_ACT_CFG2, 0x400043a2\r
- 190                   .set CYREG_PM_ACT_CFG3, 0x400043a3\r
- 191                   .set CYREG_PM_ACT_CFG4, 0x400043a4\r
- 192                   .set CYREG_PM_ACT_CFG5, 0x400043a5\r
- 193                   .set CYREG_PM_ACT_CFG6, 0x400043a6\r
- 194                   .set CYREG_PM_ACT_CFG7, 0x400043a7\r
- 195                   .set CYREG_PM_ACT_CFG8, 0x400043a8\r
- 196                   .set CYREG_PM_ACT_CFG9, 0x400043a9\r
- 197                   .set CYREG_PM_ACT_CFG10, 0x400043aa\r
- 198                   .set CYREG_PM_ACT_CFG11, 0x400043ab\r
- 199                   .set CYREG_PM_ACT_CFG12, 0x400043ac\r
- 200                   .set CYREG_PM_ACT_CFG13, 0x400043ad\r
- 201                   .set CYDEV_PM_STBY_BASE, 0x400043b0\r
- 202                   .set CYDEV_PM_STBY_SIZE, 0x0000000e\r
- 203                   .set CYREG_PM_STBY_CFG0, 0x400043b0\r
- 204                   .set CYREG_PM_STBY_CFG1, 0x400043b1\r
- 205                   .set CYREG_PM_STBY_CFG2, 0x400043b2\r
- 206                   .set CYREG_PM_STBY_CFG3, 0x400043b3\r
- 207                   .set CYREG_PM_STBY_CFG4, 0x400043b4\r
- 208                   .set CYREG_PM_STBY_CFG5, 0x400043b5\r
- 209                   .set CYREG_PM_STBY_CFG6, 0x400043b6\r
- 210                   .set CYREG_PM_STBY_CFG7, 0x400043b7\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 99\r
-\r
-\r
- 211                   .set CYREG_PM_STBY_CFG8, 0x400043b8\r
- 212                   .set CYREG_PM_STBY_CFG9, 0x400043b9\r
- 213                   .set CYREG_PM_STBY_CFG10, 0x400043ba\r
- 214                   .set CYREG_PM_STBY_CFG11, 0x400043bb\r
- 215                   .set CYREG_PM_STBY_CFG12, 0x400043bc\r
- 216                   .set CYREG_PM_STBY_CFG13, 0x400043bd\r
- 217                   .set CYDEV_PM_AVAIL_BASE, 0x400043c0\r
- 218                   .set CYDEV_PM_AVAIL_SIZE, 0x00000017\r
- 219                   .set CYREG_PM_AVAIL_CR0, 0x400043c0\r
- 220                   .set CYREG_PM_AVAIL_CR1, 0x400043c1\r
- 221                   .set CYREG_PM_AVAIL_CR2, 0x400043c2\r
- 222                   .set CYREG_PM_AVAIL_CR3, 0x400043c3\r
- 223                   .set CYREG_PM_AVAIL_CR4, 0x400043c4\r
- 224                   .set CYREG_PM_AVAIL_CR5, 0x400043c5\r
- 225                   .set CYREG_PM_AVAIL_CR6, 0x400043c6\r
- 226                   .set CYREG_PM_AVAIL_SR0, 0x400043d0\r
- 227                   .set CYREG_PM_AVAIL_SR1, 0x400043d1\r
- 228                   .set CYREG_PM_AVAIL_SR2, 0x400043d2\r
- 229                   .set CYREG_PM_AVAIL_SR3, 0x400043d3\r
- 230                   .set CYREG_PM_AVAIL_SR4, 0x400043d4\r
- 231                   .set CYREG_PM_AVAIL_SR5, 0x400043d5\r
- 232                   .set CYREG_PM_AVAIL_SR6, 0x400043d6\r
- 233                   .set CYDEV_PICU_BASE, 0x40004500\r
- 234                   .set CYDEV_PICU_SIZE, 0x000000b0\r
- 235                   .set CYDEV_PICU_INTTYPE_BASE, 0x40004500\r
- 236                   .set CYDEV_PICU_INTTYPE_SIZE, 0x00000080\r
- 237                   .set CYDEV_PICU_INTTYPE_PICU0_BASE, 0x40004500\r
- 238                   .set CYDEV_PICU_INTTYPE_PICU0_SIZE, 0x00000008\r
- 239                   .set CYREG_PICU0_INTTYPE0, 0x40004500\r
- 240                   .set CYREG_PICU0_INTTYPE1, 0x40004501\r
- 241                   .set CYREG_PICU0_INTTYPE2, 0x40004502\r
- 242                   .set CYREG_PICU0_INTTYPE3, 0x40004503\r
- 243                   .set CYREG_PICU0_INTTYPE4, 0x40004504\r
- 244                   .set CYREG_PICU0_INTTYPE5, 0x40004505\r
- 245                   .set CYREG_PICU0_INTTYPE6, 0x40004506\r
- 246                   .set CYREG_PICU0_INTTYPE7, 0x40004507\r
- 247                   .set CYDEV_PICU_INTTYPE_PICU1_BASE, 0x40004508\r
- 248                   .set CYDEV_PICU_INTTYPE_PICU1_SIZE, 0x00000008\r
- 249                   .set CYREG_PICU1_INTTYPE0, 0x40004508\r
- 250                   .set CYREG_PICU1_INTTYPE1, 0x40004509\r
- 251                   .set CYREG_PICU1_INTTYPE2, 0x4000450a\r
- 252                   .set CYREG_PICU1_INTTYPE3, 0x4000450b\r
- 253                   .set CYREG_PICU1_INTTYPE4, 0x4000450c\r
- 254                   .set CYREG_PICU1_INTTYPE5, 0x4000450d\r
- 255                   .set CYREG_PICU1_INTTYPE6, 0x4000450e\r
- 256                   .set CYREG_PICU1_INTTYPE7, 0x4000450f\r
- 257                   .set CYDEV_PICU_INTTYPE_PICU2_BASE, 0x40004510\r
- 258                   .set CYDEV_PICU_INTTYPE_PICU2_SIZE, 0x00000008\r
- 259                   .set CYREG_PICU2_INTTYPE0, 0x40004510\r
- 260                   .set CYREG_PICU2_INTTYPE1, 0x40004511\r
- 261                   .set CYREG_PICU2_INTTYPE2, 0x40004512\r
- 262                   .set CYREG_PICU2_INTTYPE3, 0x40004513\r
- 263                   .set CYREG_PICU2_INTTYPE4, 0x40004514\r
- 264                   .set CYREG_PICU2_INTTYPE5, 0x40004515\r
- 265                   .set CYREG_PICU2_INTTYPE6, 0x40004516\r
- 266                   .set CYREG_PICU2_INTTYPE7, 0x40004517\r
- 267                   .set CYDEV_PICU_INTTYPE_PICU3_BASE, 0x40004518\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 100\r
-\r
-\r
- 268                   .set CYDEV_PICU_INTTYPE_PICU3_SIZE, 0x00000008\r
- 269                   .set CYREG_PICU3_INTTYPE0, 0x40004518\r
- 270                   .set CYREG_PICU3_INTTYPE1, 0x40004519\r
- 271                   .set CYREG_PICU3_INTTYPE2, 0x4000451a\r
- 272                   .set CYREG_PICU3_INTTYPE3, 0x4000451b\r
- 273                   .set CYREG_PICU3_INTTYPE4, 0x4000451c\r
- 274                   .set CYREG_PICU3_INTTYPE5, 0x4000451d\r
- 275                   .set CYREG_PICU3_INTTYPE6, 0x4000451e\r
- 276                   .set CYREG_PICU3_INTTYPE7, 0x4000451f\r
- 277                   .set CYDEV_PICU_INTTYPE_PICU4_BASE, 0x40004520\r
- 278                   .set CYDEV_PICU_INTTYPE_PICU4_SIZE, 0x00000008\r
- 279                   .set CYREG_PICU4_INTTYPE0, 0x40004520\r
- 280                   .set CYREG_PICU4_INTTYPE1, 0x40004521\r
- 281                   .set CYREG_PICU4_INTTYPE2, 0x40004522\r
- 282                   .set CYREG_PICU4_INTTYPE3, 0x40004523\r
- 283                   .set CYREG_PICU4_INTTYPE4, 0x40004524\r
- 284                   .set CYREG_PICU4_INTTYPE5, 0x40004525\r
- 285                   .set CYREG_PICU4_INTTYPE6, 0x40004526\r
- 286                   .set CYREG_PICU4_INTTYPE7, 0x40004527\r
- 287                   .set CYDEV_PICU_INTTYPE_PICU5_BASE, 0x40004528\r
- 288                   .set CYDEV_PICU_INTTYPE_PICU5_SIZE, 0x00000008\r
- 289                   .set CYREG_PICU5_INTTYPE0, 0x40004528\r
- 290                   .set CYREG_PICU5_INTTYPE1, 0x40004529\r
- 291                   .set CYREG_PICU5_INTTYPE2, 0x4000452a\r
- 292                   .set CYREG_PICU5_INTTYPE3, 0x4000452b\r
- 293                   .set CYREG_PICU5_INTTYPE4, 0x4000452c\r
- 294                   .set CYREG_PICU5_INTTYPE5, 0x4000452d\r
- 295                   .set CYREG_PICU5_INTTYPE6, 0x4000452e\r
- 296                   .set CYREG_PICU5_INTTYPE7, 0x4000452f\r
- 297                   .set CYDEV_PICU_INTTYPE_PICU6_BASE, 0x40004530\r
- 298                   .set CYDEV_PICU_INTTYPE_PICU6_SIZE, 0x00000008\r
- 299                   .set CYREG_PICU6_INTTYPE0, 0x40004530\r
- 300                   .set CYREG_PICU6_INTTYPE1, 0x40004531\r
- 301                   .set CYREG_PICU6_INTTYPE2, 0x40004532\r
- 302                   .set CYREG_PICU6_INTTYPE3, 0x40004533\r
- 303                   .set CYREG_PICU6_INTTYPE4, 0x40004534\r
- 304                   .set CYREG_PICU6_INTTYPE5, 0x40004535\r
- 305                   .set CYREG_PICU6_INTTYPE6, 0x40004536\r
- 306                   .set CYREG_PICU6_INTTYPE7, 0x40004537\r
- 307                   .set CYDEV_PICU_INTTYPE_PICU12_BASE, 0x40004560\r
- 308                   .set CYDEV_PICU_INTTYPE_PICU12_SIZE, 0x00000008\r
- 309                   .set CYREG_PICU12_INTTYPE0, 0x40004560\r
- 310                   .set CYREG_PICU12_INTTYPE1, 0x40004561\r
- 311                   .set CYREG_PICU12_INTTYPE2, 0x40004562\r
- 312                   .set CYREG_PICU12_INTTYPE3, 0x40004563\r
- 313                   .set CYREG_PICU12_INTTYPE4, 0x40004564\r
- 314                   .set CYREG_PICU12_INTTYPE5, 0x40004565\r
- 315                   .set CYREG_PICU12_INTTYPE6, 0x40004566\r
- 316                   .set CYREG_PICU12_INTTYPE7, 0x40004567\r
- 317                   .set CYDEV_PICU_INTTYPE_PICU15_BASE, 0x40004578\r
- 318                   .set CYDEV_PICU_INTTYPE_PICU15_SIZE, 0x00000008\r
- 319                   .set CYREG_PICU15_INTTYPE0, 0x40004578\r
- 320                   .set CYREG_PICU15_INTTYPE1, 0x40004579\r
- 321                   .set CYREG_PICU15_INTTYPE2, 0x4000457a\r
- 322                   .set CYREG_PICU15_INTTYPE3, 0x4000457b\r
- 323                   .set CYREG_PICU15_INTTYPE4, 0x4000457c\r
- 324                   .set CYREG_PICU15_INTTYPE5, 0x4000457d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 101\r
-\r
-\r
- 325                   .set CYREG_PICU15_INTTYPE6, 0x4000457e\r
- 326                   .set CYREG_PICU15_INTTYPE7, 0x4000457f\r
- 327                   .set CYDEV_PICU_STAT_BASE, 0x40004580\r
- 328                   .set CYDEV_PICU_STAT_SIZE, 0x00000010\r
- 329                   .set CYDEV_PICU_STAT_PICU0_BASE, 0x40004580\r
- 330                   .set CYDEV_PICU_STAT_PICU0_SIZE, 0x00000001\r
- 331                   .set CYREG_PICU0_INTSTAT, 0x40004580\r
- 332                   .set CYDEV_PICU_STAT_PICU1_BASE, 0x40004581\r
- 333                   .set CYDEV_PICU_STAT_PICU1_SIZE, 0x00000001\r
- 334                   .set CYREG_PICU1_INTSTAT, 0x40004581\r
- 335                   .set CYDEV_PICU_STAT_PICU2_BASE, 0x40004582\r
- 336                   .set CYDEV_PICU_STAT_PICU2_SIZE, 0x00000001\r
- 337                   .set CYREG_PICU2_INTSTAT, 0x40004582\r
- 338                   .set CYDEV_PICU_STAT_PICU3_BASE, 0x40004583\r
- 339                   .set CYDEV_PICU_STAT_PICU3_SIZE, 0x00000001\r
- 340                   .set CYREG_PICU3_INTSTAT, 0x40004583\r
- 341                   .set CYDEV_PICU_STAT_PICU4_BASE, 0x40004584\r
- 342                   .set CYDEV_PICU_STAT_PICU4_SIZE, 0x00000001\r
- 343                   .set CYREG_PICU4_INTSTAT, 0x40004584\r
- 344                   .set CYDEV_PICU_STAT_PICU5_BASE, 0x40004585\r
- 345                   .set CYDEV_PICU_STAT_PICU5_SIZE, 0x00000001\r
- 346                   .set CYREG_PICU5_INTSTAT, 0x40004585\r
- 347                   .set CYDEV_PICU_STAT_PICU6_BASE, 0x40004586\r
- 348                   .set CYDEV_PICU_STAT_PICU6_SIZE, 0x00000001\r
- 349                   .set CYREG_PICU6_INTSTAT, 0x40004586\r
- 350                   .set CYDEV_PICU_STAT_PICU12_BASE, 0x4000458c\r
- 351                   .set CYDEV_PICU_STAT_PICU12_SIZE, 0x00000001\r
- 352                   .set CYREG_PICU12_INTSTAT, 0x4000458c\r
- 353                   .set CYDEV_PICU_STAT_PICU15_BASE, 0x4000458f\r
- 354                   .set CYDEV_PICU_STAT_PICU15_SIZE, 0x00000001\r
- 355                   .set CYREG_PICU15_INTSTAT, 0x4000458f\r
- 356                   .set CYDEV_PICU_SNAP_BASE, 0x40004590\r
- 357                   .set CYDEV_PICU_SNAP_SIZE, 0x00000010\r
- 358                   .set CYDEV_PICU_SNAP_PICU0_BASE, 0x40004590\r
- 359                   .set CYDEV_PICU_SNAP_PICU0_SIZE, 0x00000001\r
- 360                   .set CYREG_PICU0_SNAP, 0x40004590\r
- 361                   .set CYDEV_PICU_SNAP_PICU1_BASE, 0x40004591\r
- 362                   .set CYDEV_PICU_SNAP_PICU1_SIZE, 0x00000001\r
- 363                   .set CYREG_PICU1_SNAP, 0x40004591\r
- 364                   .set CYDEV_PICU_SNAP_PICU2_BASE, 0x40004592\r
- 365                   .set CYDEV_PICU_SNAP_PICU2_SIZE, 0x00000001\r
- 366                   .set CYREG_PICU2_SNAP, 0x40004592\r
- 367                   .set CYDEV_PICU_SNAP_PICU3_BASE, 0x40004593\r
- 368                   .set CYDEV_PICU_SNAP_PICU3_SIZE, 0x00000001\r
- 369                   .set CYREG_PICU3_SNAP, 0x40004593\r
- 370                   .set CYDEV_PICU_SNAP_PICU4_BASE, 0x40004594\r
- 371                   .set CYDEV_PICU_SNAP_PICU4_SIZE, 0x00000001\r
- 372                   .set CYREG_PICU4_SNAP, 0x40004594\r
- 373                   .set CYDEV_PICU_SNAP_PICU5_BASE, 0x40004595\r
- 374                   .set CYDEV_PICU_SNAP_PICU5_SIZE, 0x00000001\r
- 375                   .set CYREG_PICU5_SNAP, 0x40004595\r
- 376                   .set CYDEV_PICU_SNAP_PICU6_BASE, 0x40004596\r
- 377                   .set CYDEV_PICU_SNAP_PICU6_SIZE, 0x00000001\r
- 378                   .set CYREG_PICU6_SNAP, 0x40004596\r
- 379                   .set CYDEV_PICU_SNAP_PICU12_BASE, 0x4000459c\r
- 380                   .set CYDEV_PICU_SNAP_PICU12_SIZE, 0x00000001\r
- 381                   .set CYREG_PICU12_SNAP, 0x4000459c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 102\r
-\r
-\r
- 382                   .set CYDEV_PICU_SNAP_PICU_15_BASE, 0x4000459f\r
- 383                   .set CYDEV_PICU_SNAP_PICU_15_SIZE, 0x00000001\r
- 384                   .set CYREG_PICU_15_SNAP_15, 0x4000459f\r
- 385                   .set CYDEV_PICU_DISABLE_COR_BASE, 0x400045a0\r
- 386                   .set CYDEV_PICU_DISABLE_COR_SIZE, 0x00000010\r
- 387                   .set CYDEV_PICU_DISABLE_COR_PICU0_BASE, 0x400045a0\r
- 388                   .set CYDEV_PICU_DISABLE_COR_PICU0_SIZE, 0x00000001\r
- 389                   .set CYREG_PICU0_DISABLE_COR, 0x400045a0\r
- 390                   .set CYDEV_PICU_DISABLE_COR_PICU1_BASE, 0x400045a1\r
- 391                   .set CYDEV_PICU_DISABLE_COR_PICU1_SIZE, 0x00000001\r
- 392                   .set CYREG_PICU1_DISABLE_COR, 0x400045a1\r
- 393                   .set CYDEV_PICU_DISABLE_COR_PICU2_BASE, 0x400045a2\r
- 394                   .set CYDEV_PICU_DISABLE_COR_PICU2_SIZE, 0x00000001\r
- 395                   .set CYREG_PICU2_DISABLE_COR, 0x400045a2\r
- 396                   .set CYDEV_PICU_DISABLE_COR_PICU3_BASE, 0x400045a3\r
- 397                   .set CYDEV_PICU_DISABLE_COR_PICU3_SIZE, 0x00000001\r
- 398                   .set CYREG_PICU3_DISABLE_COR, 0x400045a3\r
- 399                   .set CYDEV_PICU_DISABLE_COR_PICU4_BASE, 0x400045a4\r
- 400                   .set CYDEV_PICU_DISABLE_COR_PICU4_SIZE, 0x00000001\r
- 401                   .set CYREG_PICU4_DISABLE_COR, 0x400045a4\r
- 402                   .set CYDEV_PICU_DISABLE_COR_PICU5_BASE, 0x400045a5\r
- 403                   .set CYDEV_PICU_DISABLE_COR_PICU5_SIZE, 0x00000001\r
- 404                   .set CYREG_PICU5_DISABLE_COR, 0x400045a5\r
- 405                   .set CYDEV_PICU_DISABLE_COR_PICU6_BASE, 0x400045a6\r
- 406                   .set CYDEV_PICU_DISABLE_COR_PICU6_SIZE, 0x00000001\r
- 407                   .set CYREG_PICU6_DISABLE_COR, 0x400045a6\r
- 408                   .set CYDEV_PICU_DISABLE_COR_PICU12_BASE, 0x400045ac\r
- 409                   .set CYDEV_PICU_DISABLE_COR_PICU12_SIZE, 0x00000001\r
- 410                   .set CYREG_PICU12_DISABLE_COR, 0x400045ac\r
- 411                   .set CYDEV_PICU_DISABLE_COR_PICU15_BASE, 0x400045af\r
- 412                   .set CYDEV_PICU_DISABLE_COR_PICU15_SIZE, 0x00000001\r
- 413                   .set CYREG_PICU15_DISABLE_COR, 0x400045af\r
- 414                   .set CYDEV_MFGCFG_BASE, 0x40004600\r
- 415                   .set CYDEV_MFGCFG_SIZE, 0x000000ed\r
- 416                   .set CYDEV_MFGCFG_ANAIF_BASE, 0x40004600\r
- 417                   .set CYDEV_MFGCFG_ANAIF_SIZE, 0x00000038\r
- 418                   .set CYDEV_MFGCFG_ANAIF_DAC0_BASE, 0x40004608\r
- 419                   .set CYDEV_MFGCFG_ANAIF_DAC0_SIZE, 0x00000001\r
- 420                   .set CYREG_DAC0_TR, 0x40004608\r
- 421                   .set CYDEV_MFGCFG_ANAIF_DAC1_BASE, 0x40004609\r
- 422                   .set CYDEV_MFGCFG_ANAIF_DAC1_SIZE, 0x00000001\r
- 423                   .set CYREG_DAC1_TR, 0x40004609\r
- 424                   .set CYDEV_MFGCFG_ANAIF_DAC2_BASE, 0x4000460a\r
- 425                   .set CYDEV_MFGCFG_ANAIF_DAC2_SIZE, 0x00000001\r
- 426                   .set CYREG_DAC2_TR, 0x4000460a\r
- 427                   .set CYDEV_MFGCFG_ANAIF_DAC3_BASE, 0x4000460b\r
- 428                   .set CYDEV_MFGCFG_ANAIF_DAC3_SIZE, 0x00000001\r
- 429                   .set CYREG_DAC3_TR, 0x4000460b\r
- 430                   .set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE, 0x40004610\r
- 431                   .set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE, 0x00000001\r
- 432                   .set CYREG_NPUMP_DSM_TR0, 0x40004610\r
- 433                   .set CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE, 0x40004611\r
- 434                   .set CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE, 0x00000001\r
- 435                   .set CYREG_NPUMP_SC_TR0, 0x40004611\r
- 436                   .set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE, 0x40004612\r
- 437                   .set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE, 0x00000001\r
- 438                   .set CYREG_NPUMP_OPAMP_TR0, 0x40004612\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 103\r
-\r
-\r
- 439                   .set CYDEV_MFGCFG_ANAIF_SAR0_BASE, 0x40004614\r
- 440                   .set CYDEV_MFGCFG_ANAIF_SAR0_SIZE, 0x00000001\r
- 441                   .set CYREG_SAR0_TR0, 0x40004614\r
- 442                   .set CYDEV_MFGCFG_ANAIF_SAR1_BASE, 0x40004616\r
- 443                   .set CYDEV_MFGCFG_ANAIF_SAR1_SIZE, 0x00000001\r
- 444                   .set CYREG_SAR1_TR0, 0x40004616\r
- 445                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_BASE, 0x40004620\r
- 446                   .set CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE, 0x00000002\r
- 447                   .set CYREG_OPAMP0_TR0, 0x40004620\r
- 448                   .set CYREG_OPAMP0_TR1, 0x40004621\r
- 449                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_BASE, 0x40004622\r
- 450                   .set CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE, 0x00000002\r
- 451                   .set CYREG_OPAMP1_TR0, 0x40004622\r
- 452                   .set CYREG_OPAMP1_TR1, 0x40004623\r
- 453                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_BASE, 0x40004624\r
- 454                   .set CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE, 0x00000002\r
- 455                   .set CYREG_OPAMP2_TR0, 0x40004624\r
- 456                   .set CYREG_OPAMP2_TR1, 0x40004625\r
- 457                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_BASE, 0x40004626\r
- 458                   .set CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE, 0x00000002\r
- 459                   .set CYREG_OPAMP3_TR0, 0x40004626\r
- 460                   .set CYREG_OPAMP3_TR1, 0x40004627\r
- 461                   .set CYDEV_MFGCFG_ANAIF_CMP0_BASE, 0x40004630\r
- 462                   .set CYDEV_MFGCFG_ANAIF_CMP0_SIZE, 0x00000002\r
- 463                   .set CYREG_CMP0_TR0, 0x40004630\r
- 464                   .set CYREG_CMP0_TR1, 0x40004631\r
- 465                   .set CYDEV_MFGCFG_ANAIF_CMP1_BASE, 0x40004632\r
- 466                   .set CYDEV_MFGCFG_ANAIF_CMP1_SIZE, 0x00000002\r
- 467                   .set CYREG_CMP1_TR0, 0x40004632\r
- 468                   .set CYREG_CMP1_TR1, 0x40004633\r
- 469                   .set CYDEV_MFGCFG_ANAIF_CMP2_BASE, 0x40004634\r
- 470                   .set CYDEV_MFGCFG_ANAIF_CMP2_SIZE, 0x00000002\r
- 471                   .set CYREG_CMP2_TR0, 0x40004634\r
- 472                   .set CYREG_CMP2_TR1, 0x40004635\r
- 473                   .set CYDEV_MFGCFG_ANAIF_CMP3_BASE, 0x40004636\r
- 474                   .set CYDEV_MFGCFG_ANAIF_CMP3_SIZE, 0x00000002\r
- 475                   .set CYREG_CMP3_TR0, 0x40004636\r
- 476                   .set CYREG_CMP3_TR1, 0x40004637\r
- 477                   .set CYDEV_MFGCFG_PWRSYS_BASE, 0x40004680\r
- 478                   .set CYDEV_MFGCFG_PWRSYS_SIZE, 0x0000000b\r
- 479                   .set CYREG_PWRSYS_HIB_TR0, 0x40004680\r
- 480                   .set CYREG_PWRSYS_HIB_TR1, 0x40004681\r
- 481                   .set CYREG_PWRSYS_I2C_TR, 0x40004682\r
- 482                   .set CYREG_PWRSYS_SLP_TR, 0x40004683\r
- 483                   .set CYREG_PWRSYS_BUZZ_TR, 0x40004684\r
- 484                   .set CYREG_PWRSYS_WAKE_TR0, 0x40004685\r
- 485                   .set CYREG_PWRSYS_WAKE_TR1, 0x40004686\r
- 486                   .set CYREG_PWRSYS_BREF_TR, 0x40004687\r
- 487                   .set CYREG_PWRSYS_BG_TR, 0x40004688\r
- 488                   .set CYREG_PWRSYS_WAKE_TR2, 0x40004689\r
- 489                   .set CYREG_PWRSYS_WAKE_TR3, 0x4000468a\r
- 490                   .set CYDEV_MFGCFG_ILO_BASE, 0x40004690\r
- 491                   .set CYDEV_MFGCFG_ILO_SIZE, 0x00000002\r
- 492                   .set CYREG_ILO_TR0, 0x40004690\r
- 493                   .set CYREG_ILO_TR1, 0x40004691\r
- 494                   .set CYDEV_MFGCFG_X32_BASE, 0x40004698\r
- 495                   .set CYDEV_MFGCFG_X32_SIZE, 0x00000001\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 104\r
-\r
-\r
- 496                   .set CYREG_X32_TR, 0x40004698\r
- 497                   .set CYDEV_MFGCFG_IMO_BASE, 0x400046a0\r
- 498                   .set CYDEV_MFGCFG_IMO_SIZE, 0x00000005\r
- 499                   .set CYREG_IMO_TR0, 0x400046a0\r
- 500                   .set CYREG_IMO_TR1, 0x400046a1\r
- 501                   .set CYREG_IMO_GAIN, 0x400046a2\r
- 502                   .set CYREG_IMO_C36M, 0x400046a3\r
- 503                   .set CYREG_IMO_TR2, 0x400046a4\r
- 504                   .set CYDEV_MFGCFG_XMHZ_BASE, 0x400046a8\r
- 505                   .set CYDEV_MFGCFG_XMHZ_SIZE, 0x00000001\r
- 506                   .set CYREG_XMHZ_TR, 0x400046a8\r
- 507                   .set CYREG_MFGCFG_DLY, 0x400046c0\r
- 508                   .set CYDEV_MFGCFG_MLOGIC_BASE, 0x400046e0\r
- 509                   .set CYDEV_MFGCFG_MLOGIC_SIZE, 0x0000000d\r
- 510                   .set CYREG_MLOGIC_DMPSTR, 0x400046e2\r
- 511                   .set CYDEV_MFGCFG_MLOGIC_SEG_BASE, 0x400046e4\r
- 512                   .set CYDEV_MFGCFG_MLOGIC_SEG_SIZE, 0x00000002\r
- 513                   .set CYREG_MLOGIC_SEG_CR, 0x400046e4\r
- 514                   .set CYREG_MLOGIC_SEG_CFG0, 0x400046e5\r
- 515                   .set CYREG_MLOGIC_DEBUG, 0x400046e8\r
- 516                   .set CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE, 0x400046ea\r
- 517                   .set CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE, 0x00000001\r
- 518                   .set CYREG_MLOGIC_CPU_SCR_CPU_SCR, 0x400046ea\r
- 519                   .set CYREG_MLOGIC_REV_ID, 0x400046ec\r
- 520                   .set CYDEV_RESET_BASE, 0x400046f0\r
- 521                   .set CYDEV_RESET_SIZE, 0x0000000f\r
- 522                   .set CYREG_RESET_IPOR_CR0, 0x400046f0\r
- 523                   .set CYREG_RESET_IPOR_CR1, 0x400046f1\r
- 524                   .set CYREG_RESET_IPOR_CR2, 0x400046f2\r
- 525                   .set CYREG_RESET_IPOR_CR3, 0x400046f3\r
- 526                   .set CYREG_RESET_CR0, 0x400046f4\r
- 527                   .set CYREG_RESET_CR1, 0x400046f5\r
- 528                   .set CYREG_RESET_CR2, 0x400046f6\r
- 529                   .set CYREG_RESET_CR3, 0x400046f7\r
- 530                   .set CYREG_RESET_CR4, 0x400046f8\r
- 531                   .set CYREG_RESET_CR5, 0x400046f9\r
- 532                   .set CYREG_RESET_SR0, 0x400046fa\r
- 533                   .set CYREG_RESET_SR1, 0x400046fb\r
- 534                   .set CYREG_RESET_SR2, 0x400046fc\r
- 535                   .set CYREG_RESET_SR3, 0x400046fd\r
- 536                   .set CYREG_RESET_TR, 0x400046fe\r
- 537                   .set CYDEV_SPC_BASE, 0x40004700\r
- 538                   .set CYDEV_SPC_SIZE, 0x00000100\r
- 539                   .set CYREG_SPC_FM_EE_CR, 0x40004700\r
- 540                   .set CYREG_SPC_FM_EE_WAKE_CNT, 0x40004701\r
- 541                   .set CYREG_SPC_EE_SCR, 0x40004702\r
- 542                   .set CYREG_SPC_EE_ERR, 0x40004703\r
- 543                   .set CYREG_SPC_CPU_DATA, 0x40004720\r
- 544                   .set CYREG_SPC_DMA_DATA, 0x40004721\r
- 545                   .set CYREG_SPC_SR, 0x40004722\r
- 546                   .set CYREG_SPC_CR, 0x40004723\r
- 547                   .set CYDEV_SPC_DMM_MAP_BASE, 0x40004780\r
- 548                   .set CYDEV_SPC_DMM_MAP_SIZE, 0x00000080\r
- 549                   .set CYREG_SPC_DMM_MAP_SRAM_MBASE, 0x40004780\r
- 550                   .set CYREG_SPC_DMM_MAP_SRAM_MSIZE, 0x00000080\r
- 551                   .set CYDEV_CACHE_BASE, 0x40004800\r
- 552                   .set CYDEV_CACHE_SIZE, 0x0000009c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 105\r
-\r
-\r
- 553                   .set CYREG_CACHE_CC_CTL, 0x40004800\r
- 554                   .set CYREG_CACHE_ECC_CORR, 0x40004880\r
- 555                   .set CYREG_CACHE_ECC_ERR, 0x40004888\r
- 556                   .set CYREG_CACHE_FLASH_ERR, 0x40004890\r
- 557                   .set CYREG_CACHE_HITMISS, 0x40004898\r
- 558                   .set CYDEV_I2C_BASE, 0x40004900\r
- 559                   .set CYDEV_I2C_SIZE, 0x000000e1\r
- 560                   .set CYREG_I2C_XCFG, 0x400049c8\r
- 561                   .set CYREG_I2C_ADR, 0x400049ca\r
- 562                   .set CYREG_I2C_CFG, 0x400049d6\r
- 563                   .set CYREG_I2C_CSR, 0x400049d7\r
- 564                   .set CYREG_I2C_D, 0x400049d8\r
- 565                   .set CYREG_I2C_MCSR, 0x400049d9\r
- 566                   .set CYREG_I2C_CLK_DIV1, 0x400049db\r
- 567                   .set CYREG_I2C_CLK_DIV2, 0x400049dc\r
- 568                   .set CYREG_I2C_TMOUT_CSR, 0x400049dd\r
- 569                   .set CYREG_I2C_TMOUT_SR, 0x400049de\r
- 570                   .set CYREG_I2C_TMOUT_CFG0, 0x400049df\r
- 571                   .set CYREG_I2C_TMOUT_CFG1, 0x400049e0\r
- 572                   .set CYDEV_DEC_BASE, 0x40004e00\r
- 573                   .set CYDEV_DEC_SIZE, 0x00000015\r
- 574                   .set CYREG_DEC_CR, 0x40004e00\r
- 575                   .set CYREG_DEC_SR, 0x40004e01\r
- 576                   .set CYREG_DEC_SHIFT1, 0x40004e02\r
- 577                   .set CYREG_DEC_SHIFT2, 0x40004e03\r
- 578                   .set CYREG_DEC_DR2, 0x40004e04\r
- 579                   .set CYREG_DEC_DR2H, 0x40004e05\r
- 580                   .set CYREG_DEC_DR1, 0x40004e06\r
- 581                   .set CYREG_DEC_OCOR, 0x40004e08\r
- 582                   .set CYREG_DEC_OCORM, 0x40004e09\r
- 583                   .set CYREG_DEC_OCORH, 0x40004e0a\r
- 584                   .set CYREG_DEC_GCOR, 0x40004e0c\r
- 585                   .set CYREG_DEC_GCORH, 0x40004e0d\r
- 586                   .set CYREG_DEC_GVAL, 0x40004e0e\r
- 587                   .set CYREG_DEC_OUTSAMP, 0x40004e10\r
- 588                   .set CYREG_DEC_OUTSAMPM, 0x40004e11\r
- 589                   .set CYREG_DEC_OUTSAMPH, 0x40004e12\r
- 590                   .set CYREG_DEC_OUTSAMPS, 0x40004e13\r
- 591                   .set CYREG_DEC_COHER, 0x40004e14\r
- 592                   .set CYDEV_TMR0_BASE, 0x40004f00\r
- 593                   .set CYDEV_TMR0_SIZE, 0x0000000c\r
- 594                   .set CYREG_TMR0_CFG0, 0x40004f00\r
- 595                   .set CYREG_TMR0_CFG1, 0x40004f01\r
- 596                   .set CYREG_TMR0_CFG2, 0x40004f02\r
- 597                   .set CYREG_TMR0_SR0, 0x40004f03\r
- 598                   .set CYREG_TMR0_PER0, 0x40004f04\r
- 599                   .set CYREG_TMR0_PER1, 0x40004f05\r
- 600                   .set CYREG_TMR0_CNT_CMP0, 0x40004f06\r
- 601                   .set CYREG_TMR0_CNT_CMP1, 0x40004f07\r
- 602                   .set CYREG_TMR0_CAP0, 0x40004f08\r
- 603                   .set CYREG_TMR0_CAP1, 0x40004f09\r
- 604                   .set CYREG_TMR0_RT0, 0x40004f0a\r
- 605                   .set CYREG_TMR0_RT1, 0x40004f0b\r
- 606                   .set CYDEV_TMR1_BASE, 0x40004f0c\r
- 607                   .set CYDEV_TMR1_SIZE, 0x0000000c\r
- 608                   .set CYREG_TMR1_CFG0, 0x40004f0c\r
- 609                   .set CYREG_TMR1_CFG1, 0x40004f0d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 106\r
-\r
-\r
- 610                   .set CYREG_TMR1_CFG2, 0x40004f0e\r
- 611                   .set CYREG_TMR1_SR0, 0x40004f0f\r
- 612                   .set CYREG_TMR1_PER0, 0x40004f10\r
- 613                   .set CYREG_TMR1_PER1, 0x40004f11\r
- 614                   .set CYREG_TMR1_CNT_CMP0, 0x40004f12\r
- 615                   .set CYREG_TMR1_CNT_CMP1, 0x40004f13\r
- 616                   .set CYREG_TMR1_CAP0, 0x40004f14\r
- 617                   .set CYREG_TMR1_CAP1, 0x40004f15\r
- 618                   .set CYREG_TMR1_RT0, 0x40004f16\r
- 619                   .set CYREG_TMR1_RT1, 0x40004f17\r
- 620                   .set CYDEV_TMR2_BASE, 0x40004f18\r
- 621                   .set CYDEV_TMR2_SIZE, 0x0000000c\r
- 622                   .set CYREG_TMR2_CFG0, 0x40004f18\r
- 623                   .set CYREG_TMR2_CFG1, 0x40004f19\r
- 624                   .set CYREG_TMR2_CFG2, 0x40004f1a\r
- 625                   .set CYREG_TMR2_SR0, 0x40004f1b\r
- 626                   .set CYREG_TMR2_PER0, 0x40004f1c\r
- 627                   .set CYREG_TMR2_PER1, 0x40004f1d\r
- 628                   .set CYREG_TMR2_CNT_CMP0, 0x40004f1e\r
- 629                   .set CYREG_TMR2_CNT_CMP1, 0x40004f1f\r
- 630                   .set CYREG_TMR2_CAP0, 0x40004f20\r
- 631                   .set CYREG_TMR2_CAP1, 0x40004f21\r
- 632                   .set CYREG_TMR2_RT0, 0x40004f22\r
- 633                   .set CYREG_TMR2_RT1, 0x40004f23\r
- 634                   .set CYDEV_TMR3_BASE, 0x40004f24\r
- 635                   .set CYDEV_TMR3_SIZE, 0x0000000c\r
- 636                   .set CYREG_TMR3_CFG0, 0x40004f24\r
- 637                   .set CYREG_TMR3_CFG1, 0x40004f25\r
- 638                   .set CYREG_TMR3_CFG2, 0x40004f26\r
- 639                   .set CYREG_TMR3_SR0, 0x40004f27\r
- 640                   .set CYREG_TMR3_PER0, 0x40004f28\r
- 641                   .set CYREG_TMR3_PER1, 0x40004f29\r
- 642                   .set CYREG_TMR3_CNT_CMP0, 0x40004f2a\r
- 643                   .set CYREG_TMR3_CNT_CMP1, 0x40004f2b\r
- 644                   .set CYREG_TMR3_CAP0, 0x40004f2c\r
- 645                   .set CYREG_TMR3_CAP1, 0x40004f2d\r
- 646                   .set CYREG_TMR3_RT0, 0x40004f2e\r
- 647                   .set CYREG_TMR3_RT1, 0x40004f2f\r
- 648                   .set CYDEV_IO_BASE, 0x40005000\r
- 649                   .set CYDEV_IO_SIZE, 0x00000200\r
- 650                   .set CYDEV_IO_PC_BASE, 0x40005000\r
- 651                   .set CYDEV_IO_PC_SIZE, 0x00000080\r
- 652                   .set CYDEV_IO_PC_PRT0_BASE, 0x40005000\r
- 653                   .set CYDEV_IO_PC_PRT0_SIZE, 0x00000008\r
- 654                   .set CYREG_PRT0_PC0, 0x40005000\r
- 655                   .set CYREG_PRT0_PC1, 0x40005001\r
- 656                   .set CYREG_PRT0_PC2, 0x40005002\r
- 657                   .set CYREG_PRT0_PC3, 0x40005003\r
- 658                   .set CYREG_PRT0_PC4, 0x40005004\r
- 659                   .set CYREG_PRT0_PC5, 0x40005005\r
- 660                   .set CYREG_PRT0_PC6, 0x40005006\r
- 661                   .set CYREG_PRT0_PC7, 0x40005007\r
- 662                   .set CYDEV_IO_PC_PRT1_BASE, 0x40005008\r
- 663                   .set CYDEV_IO_PC_PRT1_SIZE, 0x00000008\r
- 664                   .set CYREG_PRT1_PC0, 0x40005008\r
- 665                   .set CYREG_PRT1_PC1, 0x40005009\r
- 666                   .set CYREG_PRT1_PC2, 0x4000500a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 107\r
-\r
-\r
- 667                   .set CYREG_PRT1_PC3, 0x4000500b\r
- 668                   .set CYREG_PRT1_PC4, 0x4000500c\r
- 669                   .set CYREG_PRT1_PC5, 0x4000500d\r
- 670                   .set CYREG_PRT1_PC6, 0x4000500e\r
- 671                   .set CYREG_PRT1_PC7, 0x4000500f\r
- 672                   .set CYDEV_IO_PC_PRT2_BASE, 0x40005010\r
- 673                   .set CYDEV_IO_PC_PRT2_SIZE, 0x00000008\r
- 674                   .set CYREG_PRT2_PC0, 0x40005010\r
- 675                   .set CYREG_PRT2_PC1, 0x40005011\r
- 676                   .set CYREG_PRT2_PC2, 0x40005012\r
- 677                   .set CYREG_PRT2_PC3, 0x40005013\r
- 678                   .set CYREG_PRT2_PC4, 0x40005014\r
- 679                   .set CYREG_PRT2_PC5, 0x40005015\r
- 680                   .set CYREG_PRT2_PC6, 0x40005016\r
- 681                   .set CYREG_PRT2_PC7, 0x40005017\r
- 682                   .set CYDEV_IO_PC_PRT3_BASE, 0x40005018\r
- 683                   .set CYDEV_IO_PC_PRT3_SIZE, 0x00000008\r
- 684                   .set CYREG_PRT3_PC0, 0x40005018\r
- 685                   .set CYREG_PRT3_PC1, 0x40005019\r
- 686                   .set CYREG_PRT3_PC2, 0x4000501a\r
- 687                   .set CYREG_PRT3_PC3, 0x4000501b\r
- 688                   .set CYREG_PRT3_PC4, 0x4000501c\r
- 689                   .set CYREG_PRT3_PC5, 0x4000501d\r
- 690                   .set CYREG_PRT3_PC6, 0x4000501e\r
- 691                   .set CYREG_PRT3_PC7, 0x4000501f\r
- 692                   .set CYDEV_IO_PC_PRT4_BASE, 0x40005020\r
- 693                   .set CYDEV_IO_PC_PRT4_SIZE, 0x00000008\r
- 694                   .set CYREG_PRT4_PC0, 0x40005020\r
- 695                   .set CYREG_PRT4_PC1, 0x40005021\r
- 696                   .set CYREG_PRT4_PC2, 0x40005022\r
- 697                   .set CYREG_PRT4_PC3, 0x40005023\r
- 698                   .set CYREG_PRT4_PC4, 0x40005024\r
- 699                   .set CYREG_PRT4_PC5, 0x40005025\r
- 700                   .set CYREG_PRT4_PC6, 0x40005026\r
- 701                   .set CYREG_PRT4_PC7, 0x40005027\r
- 702                   .set CYDEV_IO_PC_PRT5_BASE, 0x40005028\r
- 703                   .set CYDEV_IO_PC_PRT5_SIZE, 0x00000008\r
- 704                   .set CYREG_PRT5_PC0, 0x40005028\r
- 705                   .set CYREG_PRT5_PC1, 0x40005029\r
- 706                   .set CYREG_PRT5_PC2, 0x4000502a\r
- 707                   .set CYREG_PRT5_PC3, 0x4000502b\r
- 708                   .set CYREG_PRT5_PC4, 0x4000502c\r
- 709                   .set CYREG_PRT5_PC5, 0x4000502d\r
- 710                   .set CYREG_PRT5_PC6, 0x4000502e\r
- 711                   .set CYREG_PRT5_PC7, 0x4000502f\r
- 712                   .set CYDEV_IO_PC_PRT6_BASE, 0x40005030\r
- 713                   .set CYDEV_IO_PC_PRT6_SIZE, 0x00000008\r
- 714                   .set CYREG_PRT6_PC0, 0x40005030\r
- 715                   .set CYREG_PRT6_PC1, 0x40005031\r
- 716                   .set CYREG_PRT6_PC2, 0x40005032\r
- 717                   .set CYREG_PRT6_PC3, 0x40005033\r
- 718                   .set CYREG_PRT6_PC4, 0x40005034\r
- 719                   .set CYREG_PRT6_PC5, 0x40005035\r
- 720                   .set CYREG_PRT6_PC6, 0x40005036\r
- 721                   .set CYREG_PRT6_PC7, 0x40005037\r
- 722                   .set CYDEV_IO_PC_PRT12_BASE, 0x40005060\r
- 723                   .set CYDEV_IO_PC_PRT12_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 108\r
-\r
-\r
- 724                   .set CYREG_PRT12_PC0, 0x40005060\r
- 725                   .set CYREG_PRT12_PC1, 0x40005061\r
- 726                   .set CYREG_PRT12_PC2, 0x40005062\r
- 727                   .set CYREG_PRT12_PC3, 0x40005063\r
- 728                   .set CYREG_PRT12_PC4, 0x40005064\r
- 729                   .set CYREG_PRT12_PC5, 0x40005065\r
- 730                   .set CYREG_PRT12_PC6, 0x40005066\r
- 731                   .set CYREG_PRT12_PC7, 0x40005067\r
- 732                   .set CYDEV_IO_PC_PRT15_BASE, 0x40005078\r
- 733                   .set CYDEV_IO_PC_PRT15_SIZE, 0x00000006\r
- 734                   .set CYREG_IO_PC_PRT15_PC0, 0x40005078\r
- 735                   .set CYREG_IO_PC_PRT15_PC1, 0x40005079\r
- 736                   .set CYREG_IO_PC_PRT15_PC2, 0x4000507a\r
- 737                   .set CYREG_IO_PC_PRT15_PC3, 0x4000507b\r
- 738                   .set CYREG_IO_PC_PRT15_PC4, 0x4000507c\r
- 739                   .set CYREG_IO_PC_PRT15_PC5, 0x4000507d\r
- 740                   .set CYDEV_IO_PC_PRT15_7_6_BASE, 0x4000507e\r
- 741                   .set CYDEV_IO_PC_PRT15_7_6_SIZE, 0x00000002\r
- 742                   .set CYREG_IO_PC_PRT15_7_6_PC0, 0x4000507e\r
- 743                   .set CYREG_IO_PC_PRT15_7_6_PC1, 0x4000507f\r
- 744                   .set CYDEV_IO_DR_BASE, 0x40005080\r
- 745                   .set CYDEV_IO_DR_SIZE, 0x00000010\r
- 746                   .set CYDEV_IO_DR_PRT0_BASE, 0x40005080\r
- 747                   .set CYDEV_IO_DR_PRT0_SIZE, 0x00000001\r
- 748                   .set CYREG_PRT0_DR_ALIAS, 0x40005080\r
- 749                   .set CYDEV_IO_DR_PRT1_BASE, 0x40005081\r
- 750                   .set CYDEV_IO_DR_PRT1_SIZE, 0x00000001\r
- 751                   .set CYREG_PRT1_DR_ALIAS, 0x40005081\r
- 752                   .set CYDEV_IO_DR_PRT2_BASE, 0x40005082\r
- 753                   .set CYDEV_IO_DR_PRT2_SIZE, 0x00000001\r
- 754                   .set CYREG_PRT2_DR_ALIAS, 0x40005082\r
- 755                   .set CYDEV_IO_DR_PRT3_BASE, 0x40005083\r
- 756                   .set CYDEV_IO_DR_PRT3_SIZE, 0x00000001\r
- 757                   .set CYREG_PRT3_DR_ALIAS, 0x40005083\r
- 758                   .set CYDEV_IO_DR_PRT4_BASE, 0x40005084\r
- 759                   .set CYDEV_IO_DR_PRT4_SIZE, 0x00000001\r
- 760                   .set CYREG_PRT4_DR_ALIAS, 0x40005084\r
- 761                   .set CYDEV_IO_DR_PRT5_BASE, 0x40005085\r
- 762                   .set CYDEV_IO_DR_PRT5_SIZE, 0x00000001\r
- 763                   .set CYREG_PRT5_DR_ALIAS, 0x40005085\r
- 764                   .set CYDEV_IO_DR_PRT6_BASE, 0x40005086\r
- 765                   .set CYDEV_IO_DR_PRT6_SIZE, 0x00000001\r
- 766                   .set CYREG_PRT6_DR_ALIAS, 0x40005086\r
- 767                   .set CYDEV_IO_DR_PRT12_BASE, 0x4000508c\r
- 768                   .set CYDEV_IO_DR_PRT12_SIZE, 0x00000001\r
- 769                   .set CYREG_PRT12_DR_ALIAS, 0x4000508c\r
- 770                   .set CYDEV_IO_DR_PRT15_BASE, 0x4000508f\r
- 771                   .set CYDEV_IO_DR_PRT15_SIZE, 0x00000001\r
- 772                   .set CYREG_PRT15_DR_15_ALIAS, 0x4000508f\r
- 773                   .set CYDEV_IO_PS_BASE, 0x40005090\r
- 774                   .set CYDEV_IO_PS_SIZE, 0x00000010\r
- 775                   .set CYDEV_IO_PS_PRT0_BASE, 0x40005090\r
- 776                   .set CYDEV_IO_PS_PRT0_SIZE, 0x00000001\r
- 777                   .set CYREG_PRT0_PS_ALIAS, 0x40005090\r
- 778                   .set CYDEV_IO_PS_PRT1_BASE, 0x40005091\r
- 779                   .set CYDEV_IO_PS_PRT1_SIZE, 0x00000001\r
- 780                   .set CYREG_PRT1_PS_ALIAS, 0x40005091\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 109\r
-\r
-\r
- 781                   .set CYDEV_IO_PS_PRT2_BASE, 0x40005092\r
- 782                   .set CYDEV_IO_PS_PRT2_SIZE, 0x00000001\r
- 783                   .set CYREG_PRT2_PS_ALIAS, 0x40005092\r
- 784                   .set CYDEV_IO_PS_PRT3_BASE, 0x40005093\r
- 785                   .set CYDEV_IO_PS_PRT3_SIZE, 0x00000001\r
- 786                   .set CYREG_PRT3_PS_ALIAS, 0x40005093\r
- 787                   .set CYDEV_IO_PS_PRT4_BASE, 0x40005094\r
- 788                   .set CYDEV_IO_PS_PRT4_SIZE, 0x00000001\r
- 789                   .set CYREG_PRT4_PS_ALIAS, 0x40005094\r
- 790                   .set CYDEV_IO_PS_PRT5_BASE, 0x40005095\r
- 791                   .set CYDEV_IO_PS_PRT5_SIZE, 0x00000001\r
- 792                   .set CYREG_PRT5_PS_ALIAS, 0x40005095\r
- 793                   .set CYDEV_IO_PS_PRT6_BASE, 0x40005096\r
- 794                   .set CYDEV_IO_PS_PRT6_SIZE, 0x00000001\r
- 795                   .set CYREG_PRT6_PS_ALIAS, 0x40005096\r
- 796                   .set CYDEV_IO_PS_PRT12_BASE, 0x4000509c\r
- 797                   .set CYDEV_IO_PS_PRT12_SIZE, 0x00000001\r
- 798                   .set CYREG_PRT12_PS_ALIAS, 0x4000509c\r
- 799                   .set CYDEV_IO_PS_PRT15_BASE, 0x4000509f\r
- 800                   .set CYDEV_IO_PS_PRT15_SIZE, 0x00000001\r
- 801                   .set CYREG_PRT15_PS15_ALIAS, 0x4000509f\r
- 802                   .set CYDEV_IO_PRT_BASE, 0x40005100\r
- 803                   .set CYDEV_IO_PRT_SIZE, 0x00000100\r
- 804                   .set CYDEV_IO_PRT_PRT0_BASE, 0x40005100\r
- 805                   .set CYDEV_IO_PRT_PRT0_SIZE, 0x00000010\r
- 806                   .set CYREG_PRT0_DR, 0x40005100\r
- 807                   .set CYREG_PRT0_PS, 0x40005101\r
- 808                   .set CYREG_PRT0_DM0, 0x40005102\r
- 809                   .set CYREG_PRT0_DM1, 0x40005103\r
- 810                   .set CYREG_PRT0_DM2, 0x40005104\r
- 811                   .set CYREG_PRT0_SLW, 0x40005105\r
- 812                   .set CYREG_PRT0_BYP, 0x40005106\r
- 813                   .set CYREG_PRT0_BIE, 0x40005107\r
- 814                   .set CYREG_PRT0_INP_DIS, 0x40005108\r
- 815                   .set CYREG_PRT0_CTL, 0x40005109\r
- 816                   .set CYREG_PRT0_PRT, 0x4000510a\r
- 817                   .set CYREG_PRT0_BIT_MASK, 0x4000510b\r
- 818                   .set CYREG_PRT0_AMUX, 0x4000510c\r
- 819                   .set CYREG_PRT0_AG, 0x4000510d\r
- 820                   .set CYREG_PRT0_LCD_COM_SEG, 0x4000510e\r
- 821                   .set CYREG_PRT0_LCD_EN, 0x4000510f\r
- 822                   .set CYDEV_IO_PRT_PRT1_BASE, 0x40005110\r
- 823                   .set CYDEV_IO_PRT_PRT1_SIZE, 0x00000010\r
- 824                   .set CYREG_PRT1_DR, 0x40005110\r
- 825                   .set CYREG_PRT1_PS, 0x40005111\r
- 826                   .set CYREG_PRT1_DM0, 0x40005112\r
- 827                   .set CYREG_PRT1_DM1, 0x40005113\r
- 828                   .set CYREG_PRT1_DM2, 0x40005114\r
- 829                   .set CYREG_PRT1_SLW, 0x40005115\r
- 830                   .set CYREG_PRT1_BYP, 0x40005116\r
- 831                   .set CYREG_PRT1_BIE, 0x40005117\r
- 832                   .set CYREG_PRT1_INP_DIS, 0x40005118\r
- 833                   .set CYREG_PRT1_CTL, 0x40005119\r
- 834                   .set CYREG_PRT1_PRT, 0x4000511a\r
- 835                   .set CYREG_PRT1_BIT_MASK, 0x4000511b\r
- 836                   .set CYREG_PRT1_AMUX, 0x4000511c\r
- 837                   .set CYREG_PRT1_AG, 0x4000511d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 110\r
-\r
-\r
- 838                   .set CYREG_PRT1_LCD_COM_SEG, 0x4000511e\r
- 839                   .set CYREG_PRT1_LCD_EN, 0x4000511f\r
- 840                   .set CYDEV_IO_PRT_PRT2_BASE, 0x40005120\r
- 841                   .set CYDEV_IO_PRT_PRT2_SIZE, 0x00000010\r
- 842                   .set CYREG_PRT2_DR, 0x40005120\r
- 843                   .set CYREG_PRT2_PS, 0x40005121\r
- 844                   .set CYREG_PRT2_DM0, 0x40005122\r
- 845                   .set CYREG_PRT2_DM1, 0x40005123\r
- 846                   .set CYREG_PRT2_DM2, 0x40005124\r
- 847                   .set CYREG_PRT2_SLW, 0x40005125\r
- 848                   .set CYREG_PRT2_BYP, 0x40005126\r
- 849                   .set CYREG_PRT2_BIE, 0x40005127\r
- 850                   .set CYREG_PRT2_INP_DIS, 0x40005128\r
- 851                   .set CYREG_PRT2_CTL, 0x40005129\r
- 852                   .set CYREG_PRT2_PRT, 0x4000512a\r
- 853                   .set CYREG_PRT2_BIT_MASK, 0x4000512b\r
- 854                   .set CYREG_PRT2_AMUX, 0x4000512c\r
- 855                   .set CYREG_PRT2_AG, 0x4000512d\r
- 856                   .set CYREG_PRT2_LCD_COM_SEG, 0x4000512e\r
- 857                   .set CYREG_PRT2_LCD_EN, 0x4000512f\r
- 858                   .set CYDEV_IO_PRT_PRT3_BASE, 0x40005130\r
- 859                   .set CYDEV_IO_PRT_PRT3_SIZE, 0x00000010\r
- 860                   .set CYREG_PRT3_DR, 0x40005130\r
- 861                   .set CYREG_PRT3_PS, 0x40005131\r
- 862                   .set CYREG_PRT3_DM0, 0x40005132\r
- 863                   .set CYREG_PRT3_DM1, 0x40005133\r
- 864                   .set CYREG_PRT3_DM2, 0x40005134\r
- 865                   .set CYREG_PRT3_SLW, 0x40005135\r
- 866                   .set CYREG_PRT3_BYP, 0x40005136\r
- 867                   .set CYREG_PRT3_BIE, 0x40005137\r
- 868                   .set CYREG_PRT3_INP_DIS, 0x40005138\r
- 869                   .set CYREG_PRT3_CTL, 0x40005139\r
- 870                   .set CYREG_PRT3_PRT, 0x4000513a\r
- 871                   .set CYREG_PRT3_BIT_MASK, 0x4000513b\r
- 872                   .set CYREG_PRT3_AMUX, 0x4000513c\r
- 873                   .set CYREG_PRT3_AG, 0x4000513d\r
- 874                   .set CYREG_PRT3_LCD_COM_SEG, 0x4000513e\r
- 875                   .set CYREG_PRT3_LCD_EN, 0x4000513f\r
- 876                   .set CYDEV_IO_PRT_PRT4_BASE, 0x40005140\r
- 877                   .set CYDEV_IO_PRT_PRT4_SIZE, 0x00000010\r
- 878                   .set CYREG_PRT4_DR, 0x40005140\r
- 879                   .set CYREG_PRT4_PS, 0x40005141\r
- 880                   .set CYREG_PRT4_DM0, 0x40005142\r
- 881                   .set CYREG_PRT4_DM1, 0x40005143\r
- 882                   .set CYREG_PRT4_DM2, 0x40005144\r
- 883                   .set CYREG_PRT4_SLW, 0x40005145\r
- 884                   .set CYREG_PRT4_BYP, 0x40005146\r
- 885                   .set CYREG_PRT4_BIE, 0x40005147\r
- 886                   .set CYREG_PRT4_INP_DIS, 0x40005148\r
- 887                   .set CYREG_PRT4_CTL, 0x40005149\r
- 888                   .set CYREG_PRT4_PRT, 0x4000514a\r
- 889                   .set CYREG_PRT4_BIT_MASK, 0x4000514b\r
- 890                   .set CYREG_PRT4_AMUX, 0x4000514c\r
- 891                   .set CYREG_PRT4_AG, 0x4000514d\r
- 892                   .set CYREG_PRT4_LCD_COM_SEG, 0x4000514e\r
- 893                   .set CYREG_PRT4_LCD_EN, 0x4000514f\r
- 894                   .set CYDEV_IO_PRT_PRT5_BASE, 0x40005150\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 111\r
-\r
-\r
- 895                   .set CYDEV_IO_PRT_PRT5_SIZE, 0x00000010\r
- 896                   .set CYREG_PRT5_DR, 0x40005150\r
- 897                   .set CYREG_PRT5_PS, 0x40005151\r
- 898                   .set CYREG_PRT5_DM0, 0x40005152\r
- 899                   .set CYREG_PRT5_DM1, 0x40005153\r
- 900                   .set CYREG_PRT5_DM2, 0x40005154\r
- 901                   .set CYREG_PRT5_SLW, 0x40005155\r
- 902                   .set CYREG_PRT5_BYP, 0x40005156\r
- 903                   .set CYREG_PRT5_BIE, 0x40005157\r
- 904                   .set CYREG_PRT5_INP_DIS, 0x40005158\r
- 905                   .set CYREG_PRT5_CTL, 0x40005159\r
- 906                   .set CYREG_PRT5_PRT, 0x4000515a\r
- 907                   .set CYREG_PRT5_BIT_MASK, 0x4000515b\r
- 908                   .set CYREG_PRT5_AMUX, 0x4000515c\r
- 909                   .set CYREG_PRT5_AG, 0x4000515d\r
- 910                   .set CYREG_PRT5_LCD_COM_SEG, 0x4000515e\r
- 911                   .set CYREG_PRT5_LCD_EN, 0x4000515f\r
- 912                   .set CYDEV_IO_PRT_PRT6_BASE, 0x40005160\r
- 913                   .set CYDEV_IO_PRT_PRT6_SIZE, 0x00000010\r
- 914                   .set CYREG_PRT6_DR, 0x40005160\r
- 915                   .set CYREG_PRT6_PS, 0x40005161\r
- 916                   .set CYREG_PRT6_DM0, 0x40005162\r
- 917                   .set CYREG_PRT6_DM1, 0x40005163\r
- 918                   .set CYREG_PRT6_DM2, 0x40005164\r
- 919                   .set CYREG_PRT6_SLW, 0x40005165\r
- 920                   .set CYREG_PRT6_BYP, 0x40005166\r
- 921                   .set CYREG_PRT6_BIE, 0x40005167\r
- 922                   .set CYREG_PRT6_INP_DIS, 0x40005168\r
- 923                   .set CYREG_PRT6_CTL, 0x40005169\r
- 924                   .set CYREG_PRT6_PRT, 0x4000516a\r
- 925                   .set CYREG_PRT6_BIT_MASK, 0x4000516b\r
- 926                   .set CYREG_PRT6_AMUX, 0x4000516c\r
- 927                   .set CYREG_PRT6_AG, 0x4000516d\r
- 928                   .set CYREG_PRT6_LCD_COM_SEG, 0x4000516e\r
- 929                   .set CYREG_PRT6_LCD_EN, 0x4000516f\r
- 930                   .set CYDEV_IO_PRT_PRT12_BASE, 0x400051c0\r
- 931                   .set CYDEV_IO_PRT_PRT12_SIZE, 0x00000010\r
- 932                   .set CYREG_PRT12_DR, 0x400051c0\r
- 933                   .set CYREG_PRT12_PS, 0x400051c1\r
- 934                   .set CYREG_PRT12_DM0, 0x400051c2\r
- 935                   .set CYREG_PRT12_DM1, 0x400051c3\r
- 936                   .set CYREG_PRT12_DM2, 0x400051c4\r
- 937                   .set CYREG_PRT12_SLW, 0x400051c5\r
- 938                   .set CYREG_PRT12_BYP, 0x400051c6\r
- 939                   .set CYREG_PRT12_BIE, 0x400051c7\r
- 940                   .set CYREG_PRT12_INP_DIS, 0x400051c8\r
- 941                   .set CYREG_PRT12_SIO_HYST_EN, 0x400051c9\r
- 942                   .set CYREG_PRT12_PRT, 0x400051ca\r
- 943                   .set CYREG_PRT12_BIT_MASK, 0x400051cb\r
- 944                   .set CYREG_PRT12_SIO_REG_HIFREQ, 0x400051cc\r
- 945                   .set CYREG_PRT12_AG, 0x400051cd\r
- 946                   .set CYREG_PRT12_SIO_CFG, 0x400051ce\r
- 947                   .set CYREG_PRT12_SIO_DIFF, 0x400051cf\r
- 948                   .set CYDEV_IO_PRT_PRT15_BASE, 0x400051f0\r
- 949                   .set CYDEV_IO_PRT_PRT15_SIZE, 0x00000010\r
- 950                   .set CYREG_PRT15_DR, 0x400051f0\r
- 951                   .set CYREG_PRT15_PS, 0x400051f1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 112\r
-\r
-\r
- 952                   .set CYREG_PRT15_DM0, 0x400051f2\r
- 953                   .set CYREG_PRT15_DM1, 0x400051f3\r
- 954                   .set CYREG_PRT15_DM2, 0x400051f4\r
- 955                   .set CYREG_PRT15_SLW, 0x400051f5\r
- 956                   .set CYREG_PRT15_BYP, 0x400051f6\r
- 957                   .set CYREG_PRT15_BIE, 0x400051f7\r
- 958                   .set CYREG_PRT15_INP_DIS, 0x400051f8\r
- 959                   .set CYREG_PRT15_CTL, 0x400051f9\r
- 960                   .set CYREG_PRT15_PRT, 0x400051fa\r
- 961                   .set CYREG_PRT15_BIT_MASK, 0x400051fb\r
- 962                   .set CYREG_PRT15_AMUX, 0x400051fc\r
- 963                   .set CYREG_PRT15_AG, 0x400051fd\r
- 964                   .set CYREG_PRT15_LCD_COM_SEG, 0x400051fe\r
- 965                   .set CYREG_PRT15_LCD_EN, 0x400051ff\r
- 966                   .set CYDEV_PRTDSI_BASE, 0x40005200\r
- 967                   .set CYDEV_PRTDSI_SIZE, 0x0000007f\r
- 968                   .set CYDEV_PRTDSI_PRT0_BASE, 0x40005200\r
- 969                   .set CYDEV_PRTDSI_PRT0_SIZE, 0x00000007\r
- 970                   .set CYREG_PRT0_OUT_SEL0, 0x40005200\r
- 971                   .set CYREG_PRT0_OUT_SEL1, 0x40005201\r
- 972                   .set CYREG_PRT0_OE_SEL0, 0x40005202\r
- 973                   .set CYREG_PRT0_OE_SEL1, 0x40005203\r
- 974                   .set CYREG_PRT0_DBL_SYNC_IN, 0x40005204\r
- 975                   .set CYREG_PRT0_SYNC_OUT, 0x40005205\r
- 976                   .set CYREG_PRT0_CAPS_SEL, 0x40005206\r
- 977                   .set CYDEV_PRTDSI_PRT1_BASE, 0x40005208\r
- 978                   .set CYDEV_PRTDSI_PRT1_SIZE, 0x00000007\r
- 979                   .set CYREG_PRT1_OUT_SEL0, 0x40005208\r
- 980                   .set CYREG_PRT1_OUT_SEL1, 0x40005209\r
- 981                   .set CYREG_PRT1_OE_SEL0, 0x4000520a\r
- 982                   .set CYREG_PRT1_OE_SEL1, 0x4000520b\r
- 983                   .set CYREG_PRT1_DBL_SYNC_IN, 0x4000520c\r
- 984                   .set CYREG_PRT1_SYNC_OUT, 0x4000520d\r
- 985                   .set CYREG_PRT1_CAPS_SEL, 0x4000520e\r
- 986                   .set CYDEV_PRTDSI_PRT2_BASE, 0x40005210\r
- 987                   .set CYDEV_PRTDSI_PRT2_SIZE, 0x00000007\r
- 988                   .set CYREG_PRT2_OUT_SEL0, 0x40005210\r
- 989                   .set CYREG_PRT2_OUT_SEL1, 0x40005211\r
- 990                   .set CYREG_PRT2_OE_SEL0, 0x40005212\r
- 991                   .set CYREG_PRT2_OE_SEL1, 0x40005213\r
- 992                   .set CYREG_PRT2_DBL_SYNC_IN, 0x40005214\r
- 993                   .set CYREG_PRT2_SYNC_OUT, 0x40005215\r
- 994                   .set CYREG_PRT2_CAPS_SEL, 0x40005216\r
- 995                   .set CYDEV_PRTDSI_PRT3_BASE, 0x40005218\r
- 996                   .set CYDEV_PRTDSI_PRT3_SIZE, 0x00000007\r
- 997                   .set CYREG_PRT3_OUT_SEL0, 0x40005218\r
- 998                   .set CYREG_PRT3_OUT_SEL1, 0x40005219\r
- 999                   .set CYREG_PRT3_OE_SEL0, 0x4000521a\r
- 1000                  .set CYREG_PRT3_OE_SEL1, 0x4000521b\r
- 1001                  .set CYREG_PRT3_DBL_SYNC_IN, 0x4000521c\r
- 1002                  .set CYREG_PRT3_SYNC_OUT, 0x4000521d\r
- 1003                  .set CYREG_PRT3_CAPS_SEL, 0x4000521e\r
- 1004                  .set CYDEV_PRTDSI_PRT4_BASE, 0x40005220\r
- 1005                  .set CYDEV_PRTDSI_PRT4_SIZE, 0x00000007\r
- 1006                  .set CYREG_PRT4_OUT_SEL0, 0x40005220\r
- 1007                  .set CYREG_PRT4_OUT_SEL1, 0x40005221\r
- 1008                  .set CYREG_PRT4_OE_SEL0, 0x40005222\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 113\r
-\r
-\r
- 1009                  .set CYREG_PRT4_OE_SEL1, 0x40005223\r
- 1010                  .set CYREG_PRT4_DBL_SYNC_IN, 0x40005224\r
- 1011                  .set CYREG_PRT4_SYNC_OUT, 0x40005225\r
- 1012                  .set CYREG_PRT4_CAPS_SEL, 0x40005226\r
- 1013                  .set CYDEV_PRTDSI_PRT5_BASE, 0x40005228\r
- 1014                  .set CYDEV_PRTDSI_PRT5_SIZE, 0x00000007\r
- 1015                  .set CYREG_PRT5_OUT_SEL0, 0x40005228\r
- 1016                  .set CYREG_PRT5_OUT_SEL1, 0x40005229\r
- 1017                  .set CYREG_PRT5_OE_SEL0, 0x4000522a\r
- 1018                  .set CYREG_PRT5_OE_SEL1, 0x4000522b\r
- 1019                  .set CYREG_PRT5_DBL_SYNC_IN, 0x4000522c\r
- 1020                  .set CYREG_PRT5_SYNC_OUT, 0x4000522d\r
- 1021                  .set CYREG_PRT5_CAPS_SEL, 0x4000522e\r
- 1022                  .set CYDEV_PRTDSI_PRT6_BASE, 0x40005230\r
- 1023                  .set CYDEV_PRTDSI_PRT6_SIZE, 0x00000007\r
- 1024                  .set CYREG_PRT6_OUT_SEL0, 0x40005230\r
- 1025                  .set CYREG_PRT6_OUT_SEL1, 0x40005231\r
- 1026                  .set CYREG_PRT6_OE_SEL0, 0x40005232\r
- 1027                  .set CYREG_PRT6_OE_SEL1, 0x40005233\r
- 1028                  .set CYREG_PRT6_DBL_SYNC_IN, 0x40005234\r
- 1029                  .set CYREG_PRT6_SYNC_OUT, 0x40005235\r
- 1030                  .set CYREG_PRT6_CAPS_SEL, 0x40005236\r
- 1031                  .set CYDEV_PRTDSI_PRT12_BASE, 0x40005260\r
- 1032                  .set CYDEV_PRTDSI_PRT12_SIZE, 0x00000006\r
- 1033                  .set CYREG_PRT12_OUT_SEL0, 0x40005260\r
- 1034                  .set CYREG_PRT12_OUT_SEL1, 0x40005261\r
- 1035                  .set CYREG_PRT12_OE_SEL0, 0x40005262\r
- 1036                  .set CYREG_PRT12_OE_SEL1, 0x40005263\r
- 1037                  .set CYREG_PRT12_DBL_SYNC_IN, 0x40005264\r
- 1038                  .set CYREG_PRT12_SYNC_OUT, 0x40005265\r
- 1039                  .set CYDEV_PRTDSI_PRT15_BASE, 0x40005278\r
- 1040                  .set CYDEV_PRTDSI_PRT15_SIZE, 0x00000007\r
- 1041                  .set CYREG_PRT15_OUT_SEL0, 0x40005278\r
- 1042                  .set CYREG_PRT15_OUT_SEL1, 0x40005279\r
- 1043                  .set CYREG_PRT15_OE_SEL0, 0x4000527a\r
- 1044                  .set CYREG_PRT15_OE_SEL1, 0x4000527b\r
- 1045                  .set CYREG_PRT15_DBL_SYNC_IN, 0x4000527c\r
- 1046                  .set CYREG_PRT15_SYNC_OUT, 0x4000527d\r
- 1047                  .set CYREG_PRT15_CAPS_SEL, 0x4000527e\r
- 1048                  .set CYDEV_EMIF_BASE, 0x40005400\r
- 1049                  .set CYDEV_EMIF_SIZE, 0x00000007\r
- 1050                  .set CYREG_EMIF_NO_UDB, 0x40005400\r
- 1051                  .set CYREG_EMIF_RP_WAIT_STATES, 0x40005401\r
- 1052                  .set CYREG_EMIF_MEM_DWN, 0x40005402\r
- 1053                  .set CYREG_EMIF_MEMCLK_DIV, 0x40005403\r
- 1054                  .set CYREG_EMIF_CLOCK_EN, 0x40005404\r
- 1055                  .set CYREG_EMIF_EM_TYPE, 0x40005405\r
- 1056                  .set CYREG_EMIF_WP_WAIT_STATES, 0x40005406\r
- 1057                  .set CYDEV_ANAIF_BASE, 0x40005800\r
- 1058                  .set CYDEV_ANAIF_SIZE, 0x000003a9\r
- 1059                  .set CYDEV_ANAIF_CFG_BASE, 0x40005800\r
- 1060                  .set CYDEV_ANAIF_CFG_SIZE, 0x0000010f\r
- 1061                  .set CYDEV_ANAIF_CFG_SC0_BASE, 0x40005800\r
- 1062                  .set CYDEV_ANAIF_CFG_SC0_SIZE, 0x00000003\r
- 1063                  .set CYREG_SC0_CR0, 0x40005800\r
- 1064                  .set CYREG_SC0_CR1, 0x40005801\r
- 1065                  .set CYREG_SC0_CR2, 0x40005802\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 114\r
-\r
-\r
- 1066                  .set CYDEV_ANAIF_CFG_SC1_BASE, 0x40005804\r
- 1067                  .set CYDEV_ANAIF_CFG_SC1_SIZE, 0x00000003\r
- 1068                  .set CYREG_SC1_CR0, 0x40005804\r
- 1069                  .set CYREG_SC1_CR1, 0x40005805\r
- 1070                  .set CYREG_SC1_CR2, 0x40005806\r
- 1071                  .set CYDEV_ANAIF_CFG_SC2_BASE, 0x40005808\r
- 1072                  .set CYDEV_ANAIF_CFG_SC2_SIZE, 0x00000003\r
- 1073                  .set CYREG_SC2_CR0, 0x40005808\r
- 1074                  .set CYREG_SC2_CR1, 0x40005809\r
- 1075                  .set CYREG_SC2_CR2, 0x4000580a\r
- 1076                  .set CYDEV_ANAIF_CFG_SC3_BASE, 0x4000580c\r
- 1077                  .set CYDEV_ANAIF_CFG_SC3_SIZE, 0x00000003\r
- 1078                  .set CYREG_SC3_CR0, 0x4000580c\r
- 1079                  .set CYREG_SC3_CR1, 0x4000580d\r
- 1080                  .set CYREG_SC3_CR2, 0x4000580e\r
- 1081                  .set CYDEV_ANAIF_CFG_DAC0_BASE, 0x40005820\r
- 1082                  .set CYDEV_ANAIF_CFG_DAC0_SIZE, 0x00000003\r
- 1083                  .set CYREG_DAC0_CR0, 0x40005820\r
- 1084                  .set CYREG_DAC0_CR1, 0x40005821\r
- 1085                  .set CYREG_DAC0_TST, 0x40005822\r
- 1086                  .set CYDEV_ANAIF_CFG_DAC1_BASE, 0x40005824\r
- 1087                  .set CYDEV_ANAIF_CFG_DAC1_SIZE, 0x00000003\r
- 1088                  .set CYREG_DAC1_CR0, 0x40005824\r
- 1089                  .set CYREG_DAC1_CR1, 0x40005825\r
- 1090                  .set CYREG_DAC1_TST, 0x40005826\r
- 1091                  .set CYDEV_ANAIF_CFG_DAC2_BASE, 0x40005828\r
- 1092                  .set CYDEV_ANAIF_CFG_DAC2_SIZE, 0x00000003\r
- 1093                  .set CYREG_DAC2_CR0, 0x40005828\r
- 1094                  .set CYREG_DAC2_CR1, 0x40005829\r
- 1095                  .set CYREG_DAC2_TST, 0x4000582a\r
- 1096                  .set CYDEV_ANAIF_CFG_DAC3_BASE, 0x4000582c\r
- 1097                  .set CYDEV_ANAIF_CFG_DAC3_SIZE, 0x00000003\r
- 1098                  .set CYREG_DAC3_CR0, 0x4000582c\r
- 1099                  .set CYREG_DAC3_CR1, 0x4000582d\r
- 1100                  .set CYREG_DAC3_TST, 0x4000582e\r
- 1101                  .set CYDEV_ANAIF_CFG_CMP0_BASE, 0x40005840\r
- 1102                  .set CYDEV_ANAIF_CFG_CMP0_SIZE, 0x00000001\r
- 1103                  .set CYREG_CMP0_CR, 0x40005840\r
- 1104                  .set CYDEV_ANAIF_CFG_CMP1_BASE, 0x40005841\r
- 1105                  .set CYDEV_ANAIF_CFG_CMP1_SIZE, 0x00000001\r
- 1106                  .set CYREG_CMP1_CR, 0x40005841\r
- 1107                  .set CYDEV_ANAIF_CFG_CMP2_BASE, 0x40005842\r
- 1108                  .set CYDEV_ANAIF_CFG_CMP2_SIZE, 0x00000001\r
- 1109                  .set CYREG_CMP2_CR, 0x40005842\r
- 1110                  .set CYDEV_ANAIF_CFG_CMP3_BASE, 0x40005843\r
- 1111                  .set CYDEV_ANAIF_CFG_CMP3_SIZE, 0x00000001\r
- 1112                  .set CYREG_CMP3_CR, 0x40005843\r
- 1113                  .set CYDEV_ANAIF_CFG_LUT0_BASE, 0x40005848\r
- 1114                  .set CYDEV_ANAIF_CFG_LUT0_SIZE, 0x00000002\r
- 1115                  .set CYREG_LUT0_CR, 0x40005848\r
- 1116                  .set CYREG_LUT0_MX, 0x40005849\r
- 1117                  .set CYDEV_ANAIF_CFG_LUT1_BASE, 0x4000584a\r
- 1118                  .set CYDEV_ANAIF_CFG_LUT1_SIZE, 0x00000002\r
- 1119                  .set CYREG_LUT1_CR, 0x4000584a\r
- 1120                  .set CYREG_LUT1_MX, 0x4000584b\r
- 1121                  .set CYDEV_ANAIF_CFG_LUT2_BASE, 0x4000584c\r
- 1122                  .set CYDEV_ANAIF_CFG_LUT2_SIZE, 0x00000002\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 115\r
-\r
-\r
- 1123                  .set CYREG_LUT2_CR, 0x4000584c\r
- 1124                  .set CYREG_LUT2_MX, 0x4000584d\r
- 1125                  .set CYDEV_ANAIF_CFG_LUT3_BASE, 0x4000584e\r
- 1126                  .set CYDEV_ANAIF_CFG_LUT3_SIZE, 0x00000002\r
- 1127                  .set CYREG_LUT3_CR, 0x4000584e\r
- 1128                  .set CYREG_LUT3_MX, 0x4000584f\r
- 1129                  .set CYDEV_ANAIF_CFG_OPAMP0_BASE, 0x40005858\r
- 1130                  .set CYDEV_ANAIF_CFG_OPAMP0_SIZE, 0x00000002\r
- 1131                  .set CYREG_OPAMP0_CR, 0x40005858\r
- 1132                  .set CYREG_OPAMP0_RSVD, 0x40005859\r
- 1133                  .set CYDEV_ANAIF_CFG_OPAMP1_BASE, 0x4000585a\r
- 1134                  .set CYDEV_ANAIF_CFG_OPAMP1_SIZE, 0x00000002\r
- 1135                  .set CYREG_OPAMP1_CR, 0x4000585a\r
- 1136                  .set CYREG_OPAMP1_RSVD, 0x4000585b\r
- 1137                  .set CYDEV_ANAIF_CFG_OPAMP2_BASE, 0x4000585c\r
- 1138                  .set CYDEV_ANAIF_CFG_OPAMP2_SIZE, 0x00000002\r
- 1139                  .set CYREG_OPAMP2_CR, 0x4000585c\r
- 1140                  .set CYREG_OPAMP2_RSVD, 0x4000585d\r
- 1141                  .set CYDEV_ANAIF_CFG_OPAMP3_BASE, 0x4000585e\r
- 1142                  .set CYDEV_ANAIF_CFG_OPAMP3_SIZE, 0x00000002\r
- 1143                  .set CYREG_OPAMP3_CR, 0x4000585e\r
- 1144                  .set CYREG_OPAMP3_RSVD, 0x4000585f\r
- 1145                  .set CYDEV_ANAIF_CFG_LCDDAC_BASE, 0x40005868\r
- 1146                  .set CYDEV_ANAIF_CFG_LCDDAC_SIZE, 0x00000002\r
- 1147                  .set CYREG_LCDDAC_CR0, 0x40005868\r
- 1148                  .set CYREG_LCDDAC_CR1, 0x40005869\r
- 1149                  .set CYDEV_ANAIF_CFG_LCDDRV_BASE, 0x4000586a\r
- 1150                  .set CYDEV_ANAIF_CFG_LCDDRV_SIZE, 0x00000001\r
- 1151                  .set CYREG_LCDDRV_CR, 0x4000586a\r
- 1152                  .set CYDEV_ANAIF_CFG_LCDTMR_BASE, 0x4000586b\r
- 1153                  .set CYDEV_ANAIF_CFG_LCDTMR_SIZE, 0x00000001\r
- 1154                  .set CYREG_LCDTMR_CFG, 0x4000586b\r
- 1155                  .set CYDEV_ANAIF_CFG_BG_BASE, 0x4000586c\r
- 1156                  .set CYDEV_ANAIF_CFG_BG_SIZE, 0x00000004\r
- 1157                  .set CYREG_BG_CR0, 0x4000586c\r
- 1158                  .set CYREG_BG_RSVD, 0x4000586d\r
- 1159                  .set CYREG_BG_DFT0, 0x4000586e\r
- 1160                  .set CYREG_BG_DFT1, 0x4000586f\r
- 1161                  .set CYDEV_ANAIF_CFG_CAPSL_BASE, 0x40005870\r
- 1162                  .set CYDEV_ANAIF_CFG_CAPSL_SIZE, 0x00000002\r
- 1163                  .set CYREG_CAPSL_CFG0, 0x40005870\r
- 1164                  .set CYREG_CAPSL_CFG1, 0x40005871\r
- 1165                  .set CYDEV_ANAIF_CFG_CAPSR_BASE, 0x40005872\r
- 1166                  .set CYDEV_ANAIF_CFG_CAPSR_SIZE, 0x00000002\r
- 1167                  .set CYREG_CAPSR_CFG0, 0x40005872\r
- 1168                  .set CYREG_CAPSR_CFG1, 0x40005873\r
- 1169                  .set CYDEV_ANAIF_CFG_PUMP_BASE, 0x40005876\r
- 1170                  .set CYDEV_ANAIF_CFG_PUMP_SIZE, 0x00000002\r
- 1171                  .set CYREG_PUMP_CR0, 0x40005876\r
- 1172                  .set CYREG_PUMP_CR1, 0x40005877\r
- 1173                  .set CYDEV_ANAIF_CFG_LPF0_BASE, 0x40005878\r
- 1174                  .set CYDEV_ANAIF_CFG_LPF0_SIZE, 0x00000002\r
- 1175                  .set CYREG_LPF0_CR0, 0x40005878\r
- 1176                  .set CYREG_LPF0_RSVD, 0x40005879\r
- 1177                  .set CYDEV_ANAIF_CFG_LPF1_BASE, 0x4000587a\r
- 1178                  .set CYDEV_ANAIF_CFG_LPF1_SIZE, 0x00000002\r
- 1179                  .set CYREG_LPF1_CR0, 0x4000587a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 116\r
-\r
-\r
- 1180                  .set CYREG_LPF1_RSVD, 0x4000587b\r
- 1181                  .set CYDEV_ANAIF_CFG_MISC_BASE, 0x4000587c\r
- 1182                  .set CYDEV_ANAIF_CFG_MISC_SIZE, 0x00000001\r
- 1183                  .set CYREG_ANAIF_CFG_MISC_CR0, 0x4000587c\r
- 1184                  .set CYDEV_ANAIF_CFG_DSM0_BASE, 0x40005880\r
- 1185                  .set CYDEV_ANAIF_CFG_DSM0_SIZE, 0x00000020\r
- 1186                  .set CYREG_DSM0_CR0, 0x40005880\r
- 1187                  .set CYREG_DSM0_CR1, 0x40005881\r
- 1188                  .set CYREG_DSM0_CR2, 0x40005882\r
- 1189                  .set CYREG_DSM0_CR3, 0x40005883\r
- 1190                  .set CYREG_DSM0_CR4, 0x40005884\r
- 1191                  .set CYREG_DSM0_CR5, 0x40005885\r
- 1192                  .set CYREG_DSM0_CR6, 0x40005886\r
- 1193                  .set CYREG_DSM0_CR7, 0x40005887\r
- 1194                  .set CYREG_DSM0_CR8, 0x40005888\r
- 1195                  .set CYREG_DSM0_CR9, 0x40005889\r
- 1196                  .set CYREG_DSM0_CR10, 0x4000588a\r
- 1197                  .set CYREG_DSM0_CR11, 0x4000588b\r
- 1198                  .set CYREG_DSM0_CR12, 0x4000588c\r
- 1199                  .set CYREG_DSM0_CR13, 0x4000588d\r
- 1200                  .set CYREG_DSM0_CR14, 0x4000588e\r
- 1201                  .set CYREG_DSM0_CR15, 0x4000588f\r
- 1202                  .set CYREG_DSM0_CR16, 0x40005890\r
- 1203                  .set CYREG_DSM0_CR17, 0x40005891\r
- 1204                  .set CYREG_DSM0_REF0, 0x40005892\r
- 1205                  .set CYREG_DSM0_REF1, 0x40005893\r
- 1206                  .set CYREG_DSM0_REF2, 0x40005894\r
- 1207                  .set CYREG_DSM0_REF3, 0x40005895\r
- 1208                  .set CYREG_DSM0_DEM0, 0x40005896\r
- 1209                  .set CYREG_DSM0_DEM1, 0x40005897\r
- 1210                  .set CYREG_DSM0_TST0, 0x40005898\r
- 1211                  .set CYREG_DSM0_TST1, 0x40005899\r
- 1212                  .set CYREG_DSM0_BUF0, 0x4000589a\r
- 1213                  .set CYREG_DSM0_BUF1, 0x4000589b\r
- 1214                  .set CYREG_DSM0_BUF2, 0x4000589c\r
- 1215                  .set CYREG_DSM0_BUF3, 0x4000589d\r
- 1216                  .set CYREG_DSM0_MISC, 0x4000589e\r
- 1217                  .set CYREG_DSM0_RSVD1, 0x4000589f\r
- 1218                  .set CYDEV_ANAIF_CFG_SAR0_BASE, 0x40005900\r
- 1219                  .set CYDEV_ANAIF_CFG_SAR0_SIZE, 0x00000007\r
- 1220                  .set CYREG_SAR0_CSR0, 0x40005900\r
- 1221                  .set CYREG_SAR0_CSR1, 0x40005901\r
- 1222                  .set CYREG_SAR0_CSR2, 0x40005902\r
- 1223                  .set CYREG_SAR0_CSR3, 0x40005903\r
- 1224                  .set CYREG_SAR0_CSR4, 0x40005904\r
- 1225                  .set CYREG_SAR0_CSR5, 0x40005905\r
- 1226                  .set CYREG_SAR0_CSR6, 0x40005906\r
- 1227                  .set CYDEV_ANAIF_CFG_SAR1_BASE, 0x40005908\r
- 1228                  .set CYDEV_ANAIF_CFG_SAR1_SIZE, 0x00000007\r
- 1229                  .set CYREG_SAR1_CSR0, 0x40005908\r
- 1230                  .set CYREG_SAR1_CSR1, 0x40005909\r
- 1231                  .set CYREG_SAR1_CSR2, 0x4000590a\r
- 1232                  .set CYREG_SAR1_CSR3, 0x4000590b\r
- 1233                  .set CYREG_SAR1_CSR4, 0x4000590c\r
- 1234                  .set CYREG_SAR1_CSR5, 0x4000590d\r
- 1235                  .set CYREG_SAR1_CSR6, 0x4000590e\r
- 1236                  .set CYDEV_ANAIF_RT_BASE, 0x40005a00\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 117\r
-\r
-\r
- 1237                  .set CYDEV_ANAIF_RT_SIZE, 0x00000162\r
- 1238                  .set CYDEV_ANAIF_RT_SC0_BASE, 0x40005a00\r
- 1239                  .set CYDEV_ANAIF_RT_SC0_SIZE, 0x0000000d\r
- 1240                  .set CYREG_SC0_SW0, 0x40005a00\r
- 1241                  .set CYREG_SC0_SW2, 0x40005a02\r
- 1242                  .set CYREG_SC0_SW3, 0x40005a03\r
- 1243                  .set CYREG_SC0_SW4, 0x40005a04\r
- 1244                  .set CYREG_SC0_SW6, 0x40005a06\r
- 1245                  .set CYREG_SC0_SW7, 0x40005a07\r
- 1246                  .set CYREG_SC0_SW8, 0x40005a08\r
- 1247                  .set CYREG_SC0_SW10, 0x40005a0a\r
- 1248                  .set CYREG_SC0_CLK, 0x40005a0b\r
- 1249                  .set CYREG_SC0_BST, 0x40005a0c\r
- 1250                  .set CYDEV_ANAIF_RT_SC1_BASE, 0x40005a10\r
- 1251                  .set CYDEV_ANAIF_RT_SC1_SIZE, 0x0000000d\r
- 1252                  .set CYREG_SC1_SW0, 0x40005a10\r
- 1253                  .set CYREG_SC1_SW2, 0x40005a12\r
- 1254                  .set CYREG_SC1_SW3, 0x40005a13\r
- 1255                  .set CYREG_SC1_SW4, 0x40005a14\r
- 1256                  .set CYREG_SC1_SW6, 0x40005a16\r
- 1257                  .set CYREG_SC1_SW7, 0x40005a17\r
- 1258                  .set CYREG_SC1_SW8, 0x40005a18\r
- 1259                  .set CYREG_SC1_SW10, 0x40005a1a\r
- 1260                  .set CYREG_SC1_CLK, 0x40005a1b\r
- 1261                  .set CYREG_SC1_BST, 0x40005a1c\r
- 1262                  .set CYDEV_ANAIF_RT_SC2_BASE, 0x40005a20\r
- 1263                  .set CYDEV_ANAIF_RT_SC2_SIZE, 0x0000000d\r
- 1264                  .set CYREG_SC2_SW0, 0x40005a20\r
- 1265                  .set CYREG_SC2_SW2, 0x40005a22\r
- 1266                  .set CYREG_SC2_SW3, 0x40005a23\r
- 1267                  .set CYREG_SC2_SW4, 0x40005a24\r
- 1268                  .set CYREG_SC2_SW6, 0x40005a26\r
- 1269                  .set CYREG_SC2_SW7, 0x40005a27\r
- 1270                  .set CYREG_SC2_SW8, 0x40005a28\r
- 1271                  .set CYREG_SC2_SW10, 0x40005a2a\r
- 1272                  .set CYREG_SC2_CLK, 0x40005a2b\r
- 1273                  .set CYREG_SC2_BST, 0x40005a2c\r
- 1274                  .set CYDEV_ANAIF_RT_SC3_BASE, 0x40005a30\r
- 1275                  .set CYDEV_ANAIF_RT_SC3_SIZE, 0x0000000d\r
- 1276                  .set CYREG_SC3_SW0, 0x40005a30\r
- 1277                  .set CYREG_SC3_SW2, 0x40005a32\r
- 1278                  .set CYREG_SC3_SW3, 0x40005a33\r
- 1279                  .set CYREG_SC3_SW4, 0x40005a34\r
- 1280                  .set CYREG_SC3_SW6, 0x40005a36\r
- 1281                  .set CYREG_SC3_SW7, 0x40005a37\r
- 1282                  .set CYREG_SC3_SW8, 0x40005a38\r
- 1283                  .set CYREG_SC3_SW10, 0x40005a3a\r
- 1284                  .set CYREG_SC3_CLK, 0x40005a3b\r
- 1285                  .set CYREG_SC3_BST, 0x40005a3c\r
- 1286                  .set CYDEV_ANAIF_RT_DAC0_BASE, 0x40005a80\r
- 1287                  .set CYDEV_ANAIF_RT_DAC0_SIZE, 0x00000008\r
- 1288                  .set CYREG_DAC0_SW0, 0x40005a80\r
- 1289                  .set CYREG_DAC0_SW2, 0x40005a82\r
- 1290                  .set CYREG_DAC0_SW3, 0x40005a83\r
- 1291                  .set CYREG_DAC0_SW4, 0x40005a84\r
- 1292                  .set CYREG_DAC0_STROBE, 0x40005a87\r
- 1293                  .set CYDEV_ANAIF_RT_DAC1_BASE, 0x40005a88\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 118\r
-\r
-\r
- 1294                  .set CYDEV_ANAIF_RT_DAC1_SIZE, 0x00000008\r
- 1295                  .set CYREG_DAC1_SW0, 0x40005a88\r
- 1296                  .set CYREG_DAC1_SW2, 0x40005a8a\r
- 1297                  .set CYREG_DAC1_SW3, 0x40005a8b\r
- 1298                  .set CYREG_DAC1_SW4, 0x40005a8c\r
- 1299                  .set CYREG_DAC1_STROBE, 0x40005a8f\r
- 1300                  .set CYDEV_ANAIF_RT_DAC2_BASE, 0x40005a90\r
- 1301                  .set CYDEV_ANAIF_RT_DAC2_SIZE, 0x00000008\r
- 1302                  .set CYREG_DAC2_SW0, 0x40005a90\r
- 1303                  .set CYREG_DAC2_SW2, 0x40005a92\r
- 1304                  .set CYREG_DAC2_SW3, 0x40005a93\r
- 1305                  .set CYREG_DAC2_SW4, 0x40005a94\r
- 1306                  .set CYREG_DAC2_STROBE, 0x40005a97\r
- 1307                  .set CYDEV_ANAIF_RT_DAC3_BASE, 0x40005a98\r
- 1308                  .set CYDEV_ANAIF_RT_DAC3_SIZE, 0x00000008\r
- 1309                  .set CYREG_DAC3_SW0, 0x40005a98\r
- 1310                  .set CYREG_DAC3_SW2, 0x40005a9a\r
- 1311                  .set CYREG_DAC3_SW3, 0x40005a9b\r
- 1312                  .set CYREG_DAC3_SW4, 0x40005a9c\r
- 1313                  .set CYREG_DAC3_STROBE, 0x40005a9f\r
- 1314                  .set CYDEV_ANAIF_RT_CMP0_BASE, 0x40005ac0\r
- 1315                  .set CYDEV_ANAIF_RT_CMP0_SIZE, 0x00000008\r
- 1316                  .set CYREG_CMP0_SW0, 0x40005ac0\r
- 1317                  .set CYREG_CMP0_SW2, 0x40005ac2\r
- 1318                  .set CYREG_CMP0_SW3, 0x40005ac3\r
- 1319                  .set CYREG_CMP0_SW4, 0x40005ac4\r
- 1320                  .set CYREG_CMP0_SW6, 0x40005ac6\r
- 1321                  .set CYREG_CMP0_CLK, 0x40005ac7\r
- 1322                  .set CYDEV_ANAIF_RT_CMP1_BASE, 0x40005ac8\r
- 1323                  .set CYDEV_ANAIF_RT_CMP1_SIZE, 0x00000008\r
- 1324                  .set CYREG_CMP1_SW0, 0x40005ac8\r
- 1325                  .set CYREG_CMP1_SW2, 0x40005aca\r
- 1326                  .set CYREG_CMP1_SW3, 0x40005acb\r
- 1327                  .set CYREG_CMP1_SW4, 0x40005acc\r
- 1328                  .set CYREG_CMP1_SW6, 0x40005ace\r
- 1329                  .set CYREG_CMP1_CLK, 0x40005acf\r
- 1330                  .set CYDEV_ANAIF_RT_CMP2_BASE, 0x40005ad0\r
- 1331                  .set CYDEV_ANAIF_RT_CMP2_SIZE, 0x00000008\r
- 1332                  .set CYREG_CMP2_SW0, 0x40005ad0\r
- 1333                  .set CYREG_CMP2_SW2, 0x40005ad2\r
- 1334                  .set CYREG_CMP2_SW3, 0x40005ad3\r
- 1335                  .set CYREG_CMP2_SW4, 0x40005ad4\r
- 1336                  .set CYREG_CMP2_SW6, 0x40005ad6\r
- 1337                  .set CYREG_CMP2_CLK, 0x40005ad7\r
- 1338                  .set CYDEV_ANAIF_RT_CMP3_BASE, 0x40005ad8\r
- 1339                  .set CYDEV_ANAIF_RT_CMP3_SIZE, 0x00000008\r
- 1340                  .set CYREG_CMP3_SW0, 0x40005ad8\r
- 1341                  .set CYREG_CMP3_SW2, 0x40005ada\r
- 1342                  .set CYREG_CMP3_SW3, 0x40005adb\r
- 1343                  .set CYREG_CMP3_SW4, 0x40005adc\r
- 1344                  .set CYREG_CMP3_SW6, 0x40005ade\r
- 1345                  .set CYREG_CMP3_CLK, 0x40005adf\r
- 1346                  .set CYDEV_ANAIF_RT_DSM0_BASE, 0x40005b00\r
- 1347                  .set CYDEV_ANAIF_RT_DSM0_SIZE, 0x00000008\r
- 1348                  .set CYREG_DSM0_SW0, 0x40005b00\r
- 1349                  .set CYREG_DSM0_SW2, 0x40005b02\r
- 1350                  .set CYREG_DSM0_SW3, 0x40005b03\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 119\r
-\r
-\r
- 1351                  .set CYREG_DSM0_SW4, 0x40005b04\r
- 1352                  .set CYREG_DSM0_SW6, 0x40005b06\r
- 1353                  .set CYREG_DSM0_CLK, 0x40005b07\r
- 1354                  .set CYDEV_ANAIF_RT_SAR0_BASE, 0x40005b20\r
- 1355                  .set CYDEV_ANAIF_RT_SAR0_SIZE, 0x00000008\r
- 1356                  .set CYREG_SAR0_SW0, 0x40005b20\r
- 1357                  .set CYREG_SAR0_SW2, 0x40005b22\r
- 1358                  .set CYREG_SAR0_SW3, 0x40005b23\r
- 1359                  .set CYREG_SAR0_SW4, 0x40005b24\r
- 1360                  .set CYREG_SAR0_SW6, 0x40005b26\r
- 1361                  .set CYREG_SAR0_CLK, 0x40005b27\r
- 1362                  .set CYDEV_ANAIF_RT_SAR1_BASE, 0x40005b28\r
- 1363                  .set CYDEV_ANAIF_RT_SAR1_SIZE, 0x00000008\r
- 1364                  .set CYREG_SAR1_SW0, 0x40005b28\r
- 1365                  .set CYREG_SAR1_SW2, 0x40005b2a\r
- 1366                  .set CYREG_SAR1_SW3, 0x40005b2b\r
- 1367                  .set CYREG_SAR1_SW4, 0x40005b2c\r
- 1368                  .set CYREG_SAR1_SW6, 0x40005b2e\r
- 1369                  .set CYREG_SAR1_CLK, 0x40005b2f\r
- 1370                  .set CYDEV_ANAIF_RT_OPAMP0_BASE, 0x40005b40\r
- 1371                  .set CYDEV_ANAIF_RT_OPAMP0_SIZE, 0x00000002\r
- 1372                  .set CYREG_OPAMP0_MX, 0x40005b40\r
- 1373                  .set CYREG_OPAMP0_SW, 0x40005b41\r
- 1374                  .set CYDEV_ANAIF_RT_OPAMP1_BASE, 0x40005b42\r
- 1375                  .set CYDEV_ANAIF_RT_OPAMP1_SIZE, 0x00000002\r
- 1376                  .set CYREG_OPAMP1_MX, 0x40005b42\r
- 1377                  .set CYREG_OPAMP1_SW, 0x40005b43\r
- 1378                  .set CYDEV_ANAIF_RT_OPAMP2_BASE, 0x40005b44\r
- 1379                  .set CYDEV_ANAIF_RT_OPAMP2_SIZE, 0x00000002\r
- 1380                  .set CYREG_OPAMP2_MX, 0x40005b44\r
- 1381                  .set CYREG_OPAMP2_SW, 0x40005b45\r
- 1382                  .set CYDEV_ANAIF_RT_OPAMP3_BASE, 0x40005b46\r
- 1383                  .set CYDEV_ANAIF_RT_OPAMP3_SIZE, 0x00000002\r
- 1384                  .set CYREG_OPAMP3_MX, 0x40005b46\r
- 1385                  .set CYREG_OPAMP3_SW, 0x40005b47\r
- 1386                  .set CYDEV_ANAIF_RT_LCDDAC_BASE, 0x40005b50\r
- 1387                  .set CYDEV_ANAIF_RT_LCDDAC_SIZE, 0x00000005\r
- 1388                  .set CYREG_LCDDAC_SW0, 0x40005b50\r
- 1389                  .set CYREG_LCDDAC_SW1, 0x40005b51\r
- 1390                  .set CYREG_LCDDAC_SW2, 0x40005b52\r
- 1391                  .set CYREG_LCDDAC_SW3, 0x40005b53\r
- 1392                  .set CYREG_LCDDAC_SW4, 0x40005b54\r
- 1393                  .set CYDEV_ANAIF_RT_SC_BASE, 0x40005b56\r
- 1394                  .set CYDEV_ANAIF_RT_SC_SIZE, 0x00000001\r
- 1395                  .set CYREG_SC_MISC, 0x40005b56\r
- 1396                  .set CYDEV_ANAIF_RT_BUS_BASE, 0x40005b58\r
- 1397                  .set CYDEV_ANAIF_RT_BUS_SIZE, 0x00000004\r
- 1398                  .set CYREG_BUS_SW0, 0x40005b58\r
- 1399                  .set CYREG_BUS_SW2, 0x40005b5a\r
- 1400                  .set CYREG_BUS_SW3, 0x40005b5b\r
- 1401                  .set CYDEV_ANAIF_RT_DFT_BASE, 0x40005b5c\r
- 1402                  .set CYDEV_ANAIF_RT_DFT_SIZE, 0x00000006\r
- 1403                  .set CYREG_DFT_CR0, 0x40005b5c\r
- 1404                  .set CYREG_DFT_CR1, 0x40005b5d\r
- 1405                  .set CYREG_DFT_CR2, 0x40005b5e\r
- 1406                  .set CYREG_DFT_CR3, 0x40005b5f\r
- 1407                  .set CYREG_DFT_CR4, 0x40005b60\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 120\r
-\r
-\r
- 1408                  .set CYREG_DFT_CR5, 0x40005b61\r
- 1409                  .set CYDEV_ANAIF_WRK_BASE, 0x40005b80\r
- 1410                  .set CYDEV_ANAIF_WRK_SIZE, 0x00000029\r
- 1411                  .set CYDEV_ANAIF_WRK_DAC0_BASE, 0x40005b80\r
- 1412                  .set CYDEV_ANAIF_WRK_DAC0_SIZE, 0x00000001\r
- 1413                  .set CYREG_DAC0_D, 0x40005b80\r
- 1414                  .set CYDEV_ANAIF_WRK_DAC1_BASE, 0x40005b81\r
- 1415                  .set CYDEV_ANAIF_WRK_DAC1_SIZE, 0x00000001\r
- 1416                  .set CYREG_DAC1_D, 0x40005b81\r
- 1417                  .set CYDEV_ANAIF_WRK_DAC2_BASE, 0x40005b82\r
- 1418                  .set CYDEV_ANAIF_WRK_DAC2_SIZE, 0x00000001\r
- 1419                  .set CYREG_DAC2_D, 0x40005b82\r
- 1420                  .set CYDEV_ANAIF_WRK_DAC3_BASE, 0x40005b83\r
- 1421                  .set CYDEV_ANAIF_WRK_DAC3_SIZE, 0x00000001\r
- 1422                  .set CYREG_DAC3_D, 0x40005b83\r
- 1423                  .set CYDEV_ANAIF_WRK_DSM0_BASE, 0x40005b88\r
- 1424                  .set CYDEV_ANAIF_WRK_DSM0_SIZE, 0x00000002\r
- 1425                  .set CYREG_DSM0_OUT0, 0x40005b88\r
- 1426                  .set CYREG_DSM0_OUT1, 0x40005b89\r
- 1427                  .set CYDEV_ANAIF_WRK_LUT_BASE, 0x40005b90\r
- 1428                  .set CYDEV_ANAIF_WRK_LUT_SIZE, 0x00000005\r
- 1429                  .set CYREG_LUT_SR, 0x40005b90\r
- 1430                  .set CYREG_LUT_WRK1, 0x40005b91\r
- 1431                  .set CYREG_LUT_MSK, 0x40005b92\r
- 1432                  .set CYREG_LUT_CLK, 0x40005b93\r
- 1433                  .set CYREG_LUT_CPTR, 0x40005b94\r
- 1434                  .set CYDEV_ANAIF_WRK_CMP_BASE, 0x40005b96\r
- 1435                  .set CYDEV_ANAIF_WRK_CMP_SIZE, 0x00000002\r
- 1436                  .set CYREG_CMP_WRK, 0x40005b96\r
- 1437                  .set CYREG_CMP_TST, 0x40005b97\r
- 1438                  .set CYDEV_ANAIF_WRK_SC_BASE, 0x40005b98\r
- 1439                  .set CYDEV_ANAIF_WRK_SC_SIZE, 0x00000005\r
- 1440                  .set CYREG_SC_SR, 0x40005b98\r
- 1441                  .set CYREG_SC_WRK1, 0x40005b99\r
- 1442                  .set CYREG_SC_MSK, 0x40005b9a\r
- 1443                  .set CYREG_SC_CMPINV, 0x40005b9b\r
- 1444                  .set CYREG_SC_CPTR, 0x40005b9c\r
- 1445                  .set CYDEV_ANAIF_WRK_SAR0_BASE, 0x40005ba0\r
- 1446                  .set CYDEV_ANAIF_WRK_SAR0_SIZE, 0x00000002\r
- 1447                  .set CYREG_SAR0_WRK0, 0x40005ba0\r
- 1448                  .set CYREG_SAR0_WRK1, 0x40005ba1\r
- 1449                  .set CYDEV_ANAIF_WRK_SAR1_BASE, 0x40005ba2\r
- 1450                  .set CYDEV_ANAIF_WRK_SAR1_SIZE, 0x00000002\r
- 1451                  .set CYREG_SAR1_WRK0, 0x40005ba2\r
- 1452                  .set CYREG_SAR1_WRK1, 0x40005ba3\r
- 1453                  .set CYDEV_ANAIF_WRK_SARS_BASE, 0x40005ba8\r
- 1454                  .set CYDEV_ANAIF_WRK_SARS_SIZE, 0x00000001\r
- 1455                  .set CYREG_ANAIF_WRK_SARS_SOF, 0x40005ba8\r
- 1456                  .set CYDEV_USB_BASE, 0x40006000\r
- 1457                  .set CYDEV_USB_SIZE, 0x00000300\r
- 1458                  .set CYREG_USB_EP0_DR0, 0x40006000\r
- 1459                  .set CYREG_USB_EP0_DR1, 0x40006001\r
- 1460                  .set CYREG_USB_EP0_DR2, 0x40006002\r
- 1461                  .set CYREG_USB_EP0_DR3, 0x40006003\r
- 1462                  .set CYREG_USB_EP0_DR4, 0x40006004\r
- 1463                  .set CYREG_USB_EP0_DR5, 0x40006005\r
- 1464                  .set CYREG_USB_EP0_DR6, 0x40006006\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 121\r
-\r
-\r
- 1465                  .set CYREG_USB_EP0_DR7, 0x40006007\r
- 1466                  .set CYREG_USB_CR0, 0x40006008\r
- 1467                  .set CYREG_USB_CR1, 0x40006009\r
- 1468                  .set CYREG_USB_SIE_EP_INT_EN, 0x4000600a\r
- 1469                  .set CYREG_USB_SIE_EP_INT_SR, 0x4000600b\r
- 1470                  .set CYDEV_USB_SIE_EP1_BASE, 0x4000600c\r
- 1471                  .set CYDEV_USB_SIE_EP1_SIZE, 0x00000003\r
- 1472                  .set CYREG_USB_SIE_EP1_CNT0, 0x4000600c\r
- 1473                  .set CYREG_USB_SIE_EP1_CNT1, 0x4000600d\r
- 1474                  .set CYREG_USB_SIE_EP1_CR0, 0x4000600e\r
- 1475                  .set CYREG_USB_USBIO_CR0, 0x40006010\r
- 1476                  .set CYREG_USB_USBIO_CR1, 0x40006012\r
- 1477                  .set CYREG_USB_DYN_RECONFIG, 0x40006014\r
- 1478                  .set CYREG_USB_SOF0, 0x40006018\r
- 1479                  .set CYREG_USB_SOF1, 0x40006019\r
- 1480                  .set CYDEV_USB_SIE_EP2_BASE, 0x4000601c\r
- 1481                  .set CYDEV_USB_SIE_EP2_SIZE, 0x00000003\r
- 1482                  .set CYREG_USB_SIE_EP2_CNT0, 0x4000601c\r
- 1483                  .set CYREG_USB_SIE_EP2_CNT1, 0x4000601d\r
- 1484                  .set CYREG_USB_SIE_EP2_CR0, 0x4000601e\r
- 1485                  .set CYREG_USB_EP0_CR, 0x40006028\r
- 1486                  .set CYREG_USB_EP0_CNT, 0x40006029\r
- 1487                  .set CYDEV_USB_SIE_EP3_BASE, 0x4000602c\r
- 1488                  .set CYDEV_USB_SIE_EP3_SIZE, 0x00000003\r
- 1489                  .set CYREG_USB_SIE_EP3_CNT0, 0x4000602c\r
- 1490                  .set CYREG_USB_SIE_EP3_CNT1, 0x4000602d\r
- 1491                  .set CYREG_USB_SIE_EP3_CR0, 0x4000602e\r
- 1492                  .set CYDEV_USB_SIE_EP4_BASE, 0x4000603c\r
- 1493                  .set CYDEV_USB_SIE_EP4_SIZE, 0x00000003\r
- 1494                  .set CYREG_USB_SIE_EP4_CNT0, 0x4000603c\r
- 1495                  .set CYREG_USB_SIE_EP4_CNT1, 0x4000603d\r
- 1496                  .set CYREG_USB_SIE_EP4_CR0, 0x4000603e\r
- 1497                  .set CYDEV_USB_SIE_EP5_BASE, 0x4000604c\r
- 1498                  .set CYDEV_USB_SIE_EP5_SIZE, 0x00000003\r
- 1499                  .set CYREG_USB_SIE_EP5_CNT0, 0x4000604c\r
- 1500                  .set CYREG_USB_SIE_EP5_CNT1, 0x4000604d\r
- 1501                  .set CYREG_USB_SIE_EP5_CR0, 0x4000604e\r
- 1502                  .set CYDEV_USB_SIE_EP6_BASE, 0x4000605c\r
- 1503                  .set CYDEV_USB_SIE_EP6_SIZE, 0x00000003\r
- 1504                  .set CYREG_USB_SIE_EP6_CNT0, 0x4000605c\r
- 1505                  .set CYREG_USB_SIE_EP6_CNT1, 0x4000605d\r
- 1506                  .set CYREG_USB_SIE_EP6_CR0, 0x4000605e\r
- 1507                  .set CYDEV_USB_SIE_EP7_BASE, 0x4000606c\r
- 1508                  .set CYDEV_USB_SIE_EP7_SIZE, 0x00000003\r
- 1509                  .set CYREG_USB_SIE_EP7_CNT0, 0x4000606c\r
- 1510                  .set CYREG_USB_SIE_EP7_CNT1, 0x4000606d\r
- 1511                  .set CYREG_USB_SIE_EP7_CR0, 0x4000606e\r
- 1512                  .set CYDEV_USB_SIE_EP8_BASE, 0x4000607c\r
- 1513                  .set CYDEV_USB_SIE_EP8_SIZE, 0x00000003\r
- 1514                  .set CYREG_USB_SIE_EP8_CNT0, 0x4000607c\r
- 1515                  .set CYREG_USB_SIE_EP8_CNT1, 0x4000607d\r
- 1516                  .set CYREG_USB_SIE_EP8_CR0, 0x4000607e\r
- 1517                  .set CYDEV_USB_ARB_EP1_BASE, 0x40006080\r
- 1518                  .set CYDEV_USB_ARB_EP1_SIZE, 0x00000003\r
- 1519                  .set CYREG_USB_ARB_EP1_CFG, 0x40006080\r
- 1520                  .set CYREG_USB_ARB_EP1_INT_EN, 0x40006081\r
- 1521                  .set CYREG_USB_ARB_EP1_SR, 0x40006082\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 122\r
-\r
-\r
- 1522                  .set CYDEV_USB_ARB_RW1_BASE, 0x40006084\r
- 1523                  .set CYDEV_USB_ARB_RW1_SIZE, 0x00000005\r
- 1524                  .set CYREG_USB_ARB_RW1_WA, 0x40006084\r
- 1525                  .set CYREG_USB_ARB_RW1_WA_MSB, 0x40006085\r
- 1526                  .set CYREG_USB_ARB_RW1_RA, 0x40006086\r
- 1527                  .set CYREG_USB_ARB_RW1_RA_MSB, 0x40006087\r
- 1528                  .set CYREG_USB_ARB_RW1_DR, 0x40006088\r
- 1529                  .set CYREG_USB_BUF_SIZE, 0x4000608c\r
- 1530                  .set CYREG_USB_EP_ACTIVE, 0x4000608e\r
- 1531                  .set CYREG_USB_EP_TYPE, 0x4000608f\r
- 1532                  .set CYDEV_USB_ARB_EP2_BASE, 0x40006090\r
- 1533                  .set CYDEV_USB_ARB_EP2_SIZE, 0x00000003\r
- 1534                  .set CYREG_USB_ARB_EP2_CFG, 0x40006090\r
- 1535                  .set CYREG_USB_ARB_EP2_INT_EN, 0x40006091\r
- 1536                  .set CYREG_USB_ARB_EP2_SR, 0x40006092\r
- 1537                  .set CYDEV_USB_ARB_RW2_BASE, 0x40006094\r
- 1538                  .set CYDEV_USB_ARB_RW2_SIZE, 0x00000005\r
- 1539                  .set CYREG_USB_ARB_RW2_WA, 0x40006094\r
- 1540                  .set CYREG_USB_ARB_RW2_WA_MSB, 0x40006095\r
- 1541                  .set CYREG_USB_ARB_RW2_RA, 0x40006096\r
- 1542                  .set CYREG_USB_ARB_RW2_RA_MSB, 0x40006097\r
- 1543                  .set CYREG_USB_ARB_RW2_DR, 0x40006098\r
- 1544                  .set CYREG_USB_ARB_CFG, 0x4000609c\r
- 1545                  .set CYREG_USB_USB_CLK_EN, 0x4000609d\r
- 1546                  .set CYREG_USB_ARB_INT_EN, 0x4000609e\r
- 1547                  .set CYREG_USB_ARB_INT_SR, 0x4000609f\r
- 1548                  .set CYDEV_USB_ARB_EP3_BASE, 0x400060a0\r
- 1549                  .set CYDEV_USB_ARB_EP3_SIZE, 0x00000003\r
- 1550                  .set CYREG_USB_ARB_EP3_CFG, 0x400060a0\r
- 1551                  .set CYREG_USB_ARB_EP3_INT_EN, 0x400060a1\r
- 1552                  .set CYREG_USB_ARB_EP3_SR, 0x400060a2\r
- 1553                  .set CYDEV_USB_ARB_RW3_BASE, 0x400060a4\r
- 1554                  .set CYDEV_USB_ARB_RW3_SIZE, 0x00000005\r
- 1555                  .set CYREG_USB_ARB_RW3_WA, 0x400060a4\r
- 1556                  .set CYREG_USB_ARB_RW3_WA_MSB, 0x400060a5\r
- 1557                  .set CYREG_USB_ARB_RW3_RA, 0x400060a6\r
- 1558                  .set CYREG_USB_ARB_RW3_RA_MSB, 0x400060a7\r
- 1559                  .set CYREG_USB_ARB_RW3_DR, 0x400060a8\r
- 1560                  .set CYREG_USB_CWA, 0x400060ac\r
- 1561                  .set CYREG_USB_CWA_MSB, 0x400060ad\r
- 1562                  .set CYDEV_USB_ARB_EP4_BASE, 0x400060b0\r
- 1563                  .set CYDEV_USB_ARB_EP4_SIZE, 0x00000003\r
- 1564                  .set CYREG_USB_ARB_EP4_CFG, 0x400060b0\r
- 1565                  .set CYREG_USB_ARB_EP4_INT_EN, 0x400060b1\r
- 1566                  .set CYREG_USB_ARB_EP4_SR, 0x400060b2\r
- 1567                  .set CYDEV_USB_ARB_RW4_BASE, 0x400060b4\r
- 1568                  .set CYDEV_USB_ARB_RW4_SIZE, 0x00000005\r
- 1569                  .set CYREG_USB_ARB_RW4_WA, 0x400060b4\r
- 1570                  .set CYREG_USB_ARB_RW4_WA_MSB, 0x400060b5\r
- 1571                  .set CYREG_USB_ARB_RW4_RA, 0x400060b6\r
- 1572                  .set CYREG_USB_ARB_RW4_RA_MSB, 0x400060b7\r
- 1573                  .set CYREG_USB_ARB_RW4_DR, 0x400060b8\r
- 1574                  .set CYREG_USB_DMA_THRES, 0x400060bc\r
- 1575                  .set CYREG_USB_DMA_THRES_MSB, 0x400060bd\r
- 1576                  .set CYDEV_USB_ARB_EP5_BASE, 0x400060c0\r
- 1577                  .set CYDEV_USB_ARB_EP5_SIZE, 0x00000003\r
- 1578                  .set CYREG_USB_ARB_EP5_CFG, 0x400060c0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 123\r
-\r
-\r
- 1579                  .set CYREG_USB_ARB_EP5_INT_EN, 0x400060c1\r
- 1580                  .set CYREG_USB_ARB_EP5_SR, 0x400060c2\r
- 1581                  .set CYDEV_USB_ARB_RW5_BASE, 0x400060c4\r
- 1582                  .set CYDEV_USB_ARB_RW5_SIZE, 0x00000005\r
- 1583                  .set CYREG_USB_ARB_RW5_WA, 0x400060c4\r
- 1584                  .set CYREG_USB_ARB_RW5_WA_MSB, 0x400060c5\r
- 1585                  .set CYREG_USB_ARB_RW5_RA, 0x400060c6\r
- 1586                  .set CYREG_USB_ARB_RW5_RA_MSB, 0x400060c7\r
- 1587                  .set CYREG_USB_ARB_RW5_DR, 0x400060c8\r
- 1588                  .set CYREG_USB_BUS_RST_CNT, 0x400060cc\r
- 1589                  .set CYDEV_USB_ARB_EP6_BASE, 0x400060d0\r
- 1590                  .set CYDEV_USB_ARB_EP6_SIZE, 0x00000003\r
- 1591                  .set CYREG_USB_ARB_EP6_CFG, 0x400060d0\r
- 1592                  .set CYREG_USB_ARB_EP6_INT_EN, 0x400060d1\r
- 1593                  .set CYREG_USB_ARB_EP6_SR, 0x400060d2\r
- 1594                  .set CYDEV_USB_ARB_RW6_BASE, 0x400060d4\r
- 1595                  .set CYDEV_USB_ARB_RW6_SIZE, 0x00000005\r
- 1596                  .set CYREG_USB_ARB_RW6_WA, 0x400060d4\r
- 1597                  .set CYREG_USB_ARB_RW6_WA_MSB, 0x400060d5\r
- 1598                  .set CYREG_USB_ARB_RW6_RA, 0x400060d6\r
- 1599                  .set CYREG_USB_ARB_RW6_RA_MSB, 0x400060d7\r
- 1600                  .set CYREG_USB_ARB_RW6_DR, 0x400060d8\r
- 1601                  .set CYDEV_USB_ARB_EP7_BASE, 0x400060e0\r
- 1602                  .set CYDEV_USB_ARB_EP7_SIZE, 0x00000003\r
- 1603                  .set CYREG_USB_ARB_EP7_CFG, 0x400060e0\r
- 1604                  .set CYREG_USB_ARB_EP7_INT_EN, 0x400060e1\r
- 1605                  .set CYREG_USB_ARB_EP7_SR, 0x400060e2\r
- 1606                  .set CYDEV_USB_ARB_RW7_BASE, 0x400060e4\r
- 1607                  .set CYDEV_USB_ARB_RW7_SIZE, 0x00000005\r
- 1608                  .set CYREG_USB_ARB_RW7_WA, 0x400060e4\r
- 1609                  .set CYREG_USB_ARB_RW7_WA_MSB, 0x400060e5\r
- 1610                  .set CYREG_USB_ARB_RW7_RA, 0x400060e6\r
- 1611                  .set CYREG_USB_ARB_RW7_RA_MSB, 0x400060e7\r
- 1612                  .set CYREG_USB_ARB_RW7_DR, 0x400060e8\r
- 1613                  .set CYDEV_USB_ARB_EP8_BASE, 0x400060f0\r
- 1614                  .set CYDEV_USB_ARB_EP8_SIZE, 0x00000003\r
- 1615                  .set CYREG_USB_ARB_EP8_CFG, 0x400060f0\r
- 1616                  .set CYREG_USB_ARB_EP8_INT_EN, 0x400060f1\r
- 1617                  .set CYREG_USB_ARB_EP8_SR, 0x400060f2\r
- 1618                  .set CYDEV_USB_ARB_RW8_BASE, 0x400060f4\r
- 1619                  .set CYDEV_USB_ARB_RW8_SIZE, 0x00000005\r
- 1620                  .set CYREG_USB_ARB_RW8_WA, 0x400060f4\r
- 1621                  .set CYREG_USB_ARB_RW8_WA_MSB, 0x400060f5\r
- 1622                  .set CYREG_USB_ARB_RW8_RA, 0x400060f6\r
- 1623                  .set CYREG_USB_ARB_RW8_RA_MSB, 0x400060f7\r
- 1624                  .set CYREG_USB_ARB_RW8_DR, 0x400060f8\r
- 1625                  .set CYDEV_USB_MEM_BASE, 0x40006100\r
- 1626                  .set CYDEV_USB_MEM_SIZE, 0x00000200\r
- 1627                  .set CYREG_USB_MEM_DATA_MBASE, 0x40006100\r
- 1628                  .set CYREG_USB_MEM_DATA_MSIZE, 0x00000200\r
- 1629                  .set CYDEV_UWRK_BASE, 0x40006400\r
- 1630                  .set CYDEV_UWRK_SIZE, 0x00000b60\r
- 1631                  .set CYDEV_UWRK_UWRK8_BASE, 0x40006400\r
- 1632                  .set CYDEV_UWRK_UWRK8_SIZE, 0x000003b0\r
- 1633                  .set CYDEV_UWRK_UWRK8_B0_BASE, 0x40006400\r
- 1634                  .set CYDEV_UWRK_UWRK8_B0_SIZE, 0x000000b0\r
- 1635                  .set CYREG_B0_UDB00_A0, 0x40006400\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 124\r
-\r
-\r
- 1636                  .set CYREG_B0_UDB01_A0, 0x40006401\r
- 1637                  .set CYREG_B0_UDB02_A0, 0x40006402\r
- 1638                  .set CYREG_B0_UDB03_A0, 0x40006403\r
- 1639                  .set CYREG_B0_UDB04_A0, 0x40006404\r
- 1640                  .set CYREG_B0_UDB05_A0, 0x40006405\r
- 1641                  .set CYREG_B0_UDB06_A0, 0x40006406\r
- 1642                  .set CYREG_B0_UDB07_A0, 0x40006407\r
- 1643                  .set CYREG_B0_UDB08_A0, 0x40006408\r
- 1644                  .set CYREG_B0_UDB09_A0, 0x40006409\r
- 1645                  .set CYREG_B0_UDB10_A0, 0x4000640a\r
- 1646                  .set CYREG_B0_UDB11_A0, 0x4000640b\r
- 1647                  .set CYREG_B0_UDB12_A0, 0x4000640c\r
- 1648                  .set CYREG_B0_UDB13_A0, 0x4000640d\r
- 1649                  .set CYREG_B0_UDB14_A0, 0x4000640e\r
- 1650                  .set CYREG_B0_UDB15_A0, 0x4000640f\r
- 1651                  .set CYREG_B0_UDB00_A1, 0x40006410\r
- 1652                  .set CYREG_B0_UDB01_A1, 0x40006411\r
- 1653                  .set CYREG_B0_UDB02_A1, 0x40006412\r
- 1654                  .set CYREG_B0_UDB03_A1, 0x40006413\r
- 1655                  .set CYREG_B0_UDB04_A1, 0x40006414\r
- 1656                  .set CYREG_B0_UDB05_A1, 0x40006415\r
- 1657                  .set CYREG_B0_UDB06_A1, 0x40006416\r
- 1658                  .set CYREG_B0_UDB07_A1, 0x40006417\r
- 1659                  .set CYREG_B0_UDB08_A1, 0x40006418\r
- 1660                  .set CYREG_B0_UDB09_A1, 0x40006419\r
- 1661                  .set CYREG_B0_UDB10_A1, 0x4000641a\r
- 1662                  .set CYREG_B0_UDB11_A1, 0x4000641b\r
- 1663                  .set CYREG_B0_UDB12_A1, 0x4000641c\r
- 1664                  .set CYREG_B0_UDB13_A1, 0x4000641d\r
- 1665                  .set CYREG_B0_UDB14_A1, 0x4000641e\r
- 1666                  .set CYREG_B0_UDB15_A1, 0x4000641f\r
- 1667                  .set CYREG_B0_UDB00_D0, 0x40006420\r
- 1668                  .set CYREG_B0_UDB01_D0, 0x40006421\r
- 1669                  .set CYREG_B0_UDB02_D0, 0x40006422\r
- 1670                  .set CYREG_B0_UDB03_D0, 0x40006423\r
- 1671                  .set CYREG_B0_UDB04_D0, 0x40006424\r
- 1672                  .set CYREG_B0_UDB05_D0, 0x40006425\r
- 1673                  .set CYREG_B0_UDB06_D0, 0x40006426\r
- 1674                  .set CYREG_B0_UDB07_D0, 0x40006427\r
- 1675                  .set CYREG_B0_UDB08_D0, 0x40006428\r
- 1676                  .set CYREG_B0_UDB09_D0, 0x40006429\r
- 1677                  .set CYREG_B0_UDB10_D0, 0x4000642a\r
- 1678                  .set CYREG_B0_UDB11_D0, 0x4000642b\r
- 1679                  .set CYREG_B0_UDB12_D0, 0x4000642c\r
- 1680                  .set CYREG_B0_UDB13_D0, 0x4000642d\r
- 1681                  .set CYREG_B0_UDB14_D0, 0x4000642e\r
- 1682                  .set CYREG_B0_UDB15_D0, 0x4000642f\r
- 1683                  .set CYREG_B0_UDB00_D1, 0x40006430\r
- 1684                  .set CYREG_B0_UDB01_D1, 0x40006431\r
- 1685                  .set CYREG_B0_UDB02_D1, 0x40006432\r
- 1686                  .set CYREG_B0_UDB03_D1, 0x40006433\r
- 1687                  .set CYREG_B0_UDB04_D1, 0x40006434\r
- 1688                  .set CYREG_B0_UDB05_D1, 0x40006435\r
- 1689                  .set CYREG_B0_UDB06_D1, 0x40006436\r
- 1690                  .set CYREG_B0_UDB07_D1, 0x40006437\r
- 1691                  .set CYREG_B0_UDB08_D1, 0x40006438\r
- 1692                  .set CYREG_B0_UDB09_D1, 0x40006439\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 125\r
-\r
-\r
- 1693                  .set CYREG_B0_UDB10_D1, 0x4000643a\r
- 1694                  .set CYREG_B0_UDB11_D1, 0x4000643b\r
- 1695                  .set CYREG_B0_UDB12_D1, 0x4000643c\r
- 1696                  .set CYREG_B0_UDB13_D1, 0x4000643d\r
- 1697                  .set CYREG_B0_UDB14_D1, 0x4000643e\r
- 1698                  .set CYREG_B0_UDB15_D1, 0x4000643f\r
- 1699                  .set CYREG_B0_UDB00_F0, 0x40006440\r
- 1700                  .set CYREG_B0_UDB01_F0, 0x40006441\r
- 1701                  .set CYREG_B0_UDB02_F0, 0x40006442\r
- 1702                  .set CYREG_B0_UDB03_F0, 0x40006443\r
- 1703                  .set CYREG_B0_UDB04_F0, 0x40006444\r
- 1704                  .set CYREG_B0_UDB05_F0, 0x40006445\r
- 1705                  .set CYREG_B0_UDB06_F0, 0x40006446\r
- 1706                  .set CYREG_B0_UDB07_F0, 0x40006447\r
- 1707                  .set CYREG_B0_UDB08_F0, 0x40006448\r
- 1708                  .set CYREG_B0_UDB09_F0, 0x40006449\r
- 1709                  .set CYREG_B0_UDB10_F0, 0x4000644a\r
- 1710                  .set CYREG_B0_UDB11_F0, 0x4000644b\r
- 1711                  .set CYREG_B0_UDB12_F0, 0x4000644c\r
- 1712                  .set CYREG_B0_UDB13_F0, 0x4000644d\r
- 1713                  .set CYREG_B0_UDB14_F0, 0x4000644e\r
- 1714                  .set CYREG_B0_UDB15_F0, 0x4000644f\r
- 1715                  .set CYREG_B0_UDB00_F1, 0x40006450\r
- 1716                  .set CYREG_B0_UDB01_F1, 0x40006451\r
- 1717                  .set CYREG_B0_UDB02_F1, 0x40006452\r
- 1718                  .set CYREG_B0_UDB03_F1, 0x40006453\r
- 1719                  .set CYREG_B0_UDB04_F1, 0x40006454\r
- 1720                  .set CYREG_B0_UDB05_F1, 0x40006455\r
- 1721                  .set CYREG_B0_UDB06_F1, 0x40006456\r
- 1722                  .set CYREG_B0_UDB07_F1, 0x40006457\r
- 1723                  .set CYREG_B0_UDB08_F1, 0x40006458\r
- 1724                  .set CYREG_B0_UDB09_F1, 0x40006459\r
- 1725                  .set CYREG_B0_UDB10_F1, 0x4000645a\r
- 1726                  .set CYREG_B0_UDB11_F1, 0x4000645b\r
- 1727                  .set CYREG_B0_UDB12_F1, 0x4000645c\r
- 1728                  .set CYREG_B0_UDB13_F1, 0x4000645d\r
- 1729                  .set CYREG_B0_UDB14_F1, 0x4000645e\r
- 1730                  .set CYREG_B0_UDB15_F1, 0x4000645f\r
- 1731                  .set CYREG_B0_UDB00_ST, 0x40006460\r
- 1732                  .set CYREG_B0_UDB01_ST, 0x40006461\r
- 1733                  .set CYREG_B0_UDB02_ST, 0x40006462\r
- 1734                  .set CYREG_B0_UDB03_ST, 0x40006463\r
- 1735                  .set CYREG_B0_UDB04_ST, 0x40006464\r
- 1736                  .set CYREG_B0_UDB05_ST, 0x40006465\r
- 1737                  .set CYREG_B0_UDB06_ST, 0x40006466\r
- 1738                  .set CYREG_B0_UDB07_ST, 0x40006467\r
- 1739                  .set CYREG_B0_UDB08_ST, 0x40006468\r
- 1740                  .set CYREG_B0_UDB09_ST, 0x40006469\r
- 1741                  .set CYREG_B0_UDB10_ST, 0x4000646a\r
- 1742                  .set CYREG_B0_UDB11_ST, 0x4000646b\r
- 1743                  .set CYREG_B0_UDB12_ST, 0x4000646c\r
- 1744                  .set CYREG_B0_UDB13_ST, 0x4000646d\r
- 1745                  .set CYREG_B0_UDB14_ST, 0x4000646e\r
- 1746                  .set CYREG_B0_UDB15_ST, 0x4000646f\r
- 1747                  .set CYREG_B0_UDB00_CTL, 0x40006470\r
- 1748                  .set CYREG_B0_UDB01_CTL, 0x40006471\r
- 1749                  .set CYREG_B0_UDB02_CTL, 0x40006472\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 126\r
-\r
-\r
- 1750                  .set CYREG_B0_UDB03_CTL, 0x40006473\r
- 1751                  .set CYREG_B0_UDB04_CTL, 0x40006474\r
- 1752                  .set CYREG_B0_UDB05_CTL, 0x40006475\r
- 1753                  .set CYREG_B0_UDB06_CTL, 0x40006476\r
- 1754                  .set CYREG_B0_UDB07_CTL, 0x40006477\r
- 1755                  .set CYREG_B0_UDB08_CTL, 0x40006478\r
- 1756                  .set CYREG_B0_UDB09_CTL, 0x40006479\r
- 1757                  .set CYREG_B0_UDB10_CTL, 0x4000647a\r
- 1758                  .set CYREG_B0_UDB11_CTL, 0x4000647b\r
- 1759                  .set CYREG_B0_UDB12_CTL, 0x4000647c\r
- 1760                  .set CYREG_B0_UDB13_CTL, 0x4000647d\r
- 1761                  .set CYREG_B0_UDB14_CTL, 0x4000647e\r
- 1762                  .set CYREG_B0_UDB15_CTL, 0x4000647f\r
- 1763                  .set CYREG_B0_UDB00_MSK, 0x40006480\r
- 1764                  .set CYREG_B0_UDB01_MSK, 0x40006481\r
- 1765                  .set CYREG_B0_UDB02_MSK, 0x40006482\r
- 1766                  .set CYREG_B0_UDB03_MSK, 0x40006483\r
- 1767                  .set CYREG_B0_UDB04_MSK, 0x40006484\r
- 1768                  .set CYREG_B0_UDB05_MSK, 0x40006485\r
- 1769                  .set CYREG_B0_UDB06_MSK, 0x40006486\r
- 1770                  .set CYREG_B0_UDB07_MSK, 0x40006487\r
- 1771                  .set CYREG_B0_UDB08_MSK, 0x40006488\r
- 1772                  .set CYREG_B0_UDB09_MSK, 0x40006489\r
- 1773                  .set CYREG_B0_UDB10_MSK, 0x4000648a\r
- 1774                  .set CYREG_B0_UDB11_MSK, 0x4000648b\r
- 1775                  .set CYREG_B0_UDB12_MSK, 0x4000648c\r
- 1776                  .set CYREG_B0_UDB13_MSK, 0x4000648d\r
- 1777                  .set CYREG_B0_UDB14_MSK, 0x4000648e\r
- 1778                  .set CYREG_B0_UDB15_MSK, 0x4000648f\r
- 1779                  .set CYREG_B0_UDB00_ACTL, 0x40006490\r
- 1780                  .set CYREG_B0_UDB01_ACTL, 0x40006491\r
- 1781                  .set CYREG_B0_UDB02_ACTL, 0x40006492\r
- 1782                  .set CYREG_B0_UDB03_ACTL, 0x40006493\r
- 1783                  .set CYREG_B0_UDB04_ACTL, 0x40006494\r
- 1784                  .set CYREG_B0_UDB05_ACTL, 0x40006495\r
- 1785                  .set CYREG_B0_UDB06_ACTL, 0x40006496\r
- 1786                  .set CYREG_B0_UDB07_ACTL, 0x40006497\r
- 1787                  .set CYREG_B0_UDB08_ACTL, 0x40006498\r
- 1788                  .set CYREG_B0_UDB09_ACTL, 0x40006499\r
- 1789                  .set CYREG_B0_UDB10_ACTL, 0x4000649a\r
- 1790                  .set CYREG_B0_UDB11_ACTL, 0x4000649b\r
- 1791                  .set CYREG_B0_UDB12_ACTL, 0x4000649c\r
- 1792                  .set CYREG_B0_UDB13_ACTL, 0x4000649d\r
- 1793                  .set CYREG_B0_UDB14_ACTL, 0x4000649e\r
- 1794                  .set CYREG_B0_UDB15_ACTL, 0x4000649f\r
- 1795                  .set CYREG_B0_UDB00_MC, 0x400064a0\r
- 1796                  .set CYREG_B0_UDB01_MC, 0x400064a1\r
- 1797                  .set CYREG_B0_UDB02_MC, 0x400064a2\r
- 1798                  .set CYREG_B0_UDB03_MC, 0x400064a3\r
- 1799                  .set CYREG_B0_UDB04_MC, 0x400064a4\r
- 1800                  .set CYREG_B0_UDB05_MC, 0x400064a5\r
- 1801                  .set CYREG_B0_UDB06_MC, 0x400064a6\r
- 1802                  .set CYREG_B0_UDB07_MC, 0x400064a7\r
- 1803                  .set CYREG_B0_UDB08_MC, 0x400064a8\r
- 1804                  .set CYREG_B0_UDB09_MC, 0x400064a9\r
- 1805                  .set CYREG_B0_UDB10_MC, 0x400064aa\r
- 1806                  .set CYREG_B0_UDB11_MC, 0x400064ab\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 127\r
-\r
-\r
- 1807                  .set CYREG_B0_UDB12_MC, 0x400064ac\r
- 1808                  .set CYREG_B0_UDB13_MC, 0x400064ad\r
- 1809                  .set CYREG_B0_UDB14_MC, 0x400064ae\r
- 1810                  .set CYREG_B0_UDB15_MC, 0x400064af\r
- 1811                  .set CYDEV_UWRK_UWRK8_B1_BASE, 0x40006500\r
- 1812                  .set CYDEV_UWRK_UWRK8_B1_SIZE, 0x000000b0\r
- 1813                  .set CYREG_B1_UDB04_A0, 0x40006504\r
- 1814                  .set CYREG_B1_UDB05_A0, 0x40006505\r
- 1815                  .set CYREG_B1_UDB06_A0, 0x40006506\r
- 1816                  .set CYREG_B1_UDB07_A0, 0x40006507\r
- 1817                  .set CYREG_B1_UDB08_A0, 0x40006508\r
- 1818                  .set CYREG_B1_UDB09_A0, 0x40006509\r
- 1819                  .set CYREG_B1_UDB10_A0, 0x4000650a\r
- 1820                  .set CYREG_B1_UDB11_A0, 0x4000650b\r
- 1821                  .set CYREG_B1_UDB04_A1, 0x40006514\r
- 1822                  .set CYREG_B1_UDB05_A1, 0x40006515\r
- 1823                  .set CYREG_B1_UDB06_A1, 0x40006516\r
- 1824                  .set CYREG_B1_UDB07_A1, 0x40006517\r
- 1825                  .set CYREG_B1_UDB08_A1, 0x40006518\r
- 1826                  .set CYREG_B1_UDB09_A1, 0x40006519\r
- 1827                  .set CYREG_B1_UDB10_A1, 0x4000651a\r
- 1828                  .set CYREG_B1_UDB11_A1, 0x4000651b\r
- 1829                  .set CYREG_B1_UDB04_D0, 0x40006524\r
- 1830                  .set CYREG_B1_UDB05_D0, 0x40006525\r
- 1831                  .set CYREG_B1_UDB06_D0, 0x40006526\r
- 1832                  .set CYREG_B1_UDB07_D0, 0x40006527\r
- 1833                  .set CYREG_B1_UDB08_D0, 0x40006528\r
- 1834                  .set CYREG_B1_UDB09_D0, 0x40006529\r
- 1835                  .set CYREG_B1_UDB10_D0, 0x4000652a\r
- 1836                  .set CYREG_B1_UDB11_D0, 0x4000652b\r
- 1837                  .set CYREG_B1_UDB04_D1, 0x40006534\r
- 1838                  .set CYREG_B1_UDB05_D1, 0x40006535\r
- 1839                  .set CYREG_B1_UDB06_D1, 0x40006536\r
- 1840                  .set CYREG_B1_UDB07_D1, 0x40006537\r
- 1841                  .set CYREG_B1_UDB08_D1, 0x40006538\r
- 1842                  .set CYREG_B1_UDB09_D1, 0x40006539\r
- 1843                  .set CYREG_B1_UDB10_D1, 0x4000653a\r
- 1844                  .set CYREG_B1_UDB11_D1, 0x4000653b\r
- 1845                  .set CYREG_B1_UDB04_F0, 0x40006544\r
- 1846                  .set CYREG_B1_UDB05_F0, 0x40006545\r
- 1847                  .set CYREG_B1_UDB06_F0, 0x40006546\r
- 1848                  .set CYREG_B1_UDB07_F0, 0x40006547\r
- 1849                  .set CYREG_B1_UDB08_F0, 0x40006548\r
- 1850                  .set CYREG_B1_UDB09_F0, 0x40006549\r
- 1851                  .set CYREG_B1_UDB10_F0, 0x4000654a\r
- 1852                  .set CYREG_B1_UDB11_F0, 0x4000654b\r
- 1853                  .set CYREG_B1_UDB04_F1, 0x40006554\r
- 1854                  .set CYREG_B1_UDB05_F1, 0x40006555\r
- 1855                  .set CYREG_B1_UDB06_F1, 0x40006556\r
- 1856                  .set CYREG_B1_UDB07_F1, 0x40006557\r
- 1857                  .set CYREG_B1_UDB08_F1, 0x40006558\r
- 1858                  .set CYREG_B1_UDB09_F1, 0x40006559\r
- 1859                  .set CYREG_B1_UDB10_F1, 0x4000655a\r
- 1860                  .set CYREG_B1_UDB11_F1, 0x4000655b\r
- 1861                  .set CYREG_B1_UDB04_ST, 0x40006564\r
- 1862                  .set CYREG_B1_UDB05_ST, 0x40006565\r
- 1863                  .set CYREG_B1_UDB06_ST, 0x40006566\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 128\r
-\r
-\r
- 1864                  .set CYREG_B1_UDB07_ST, 0x40006567\r
- 1865                  .set CYREG_B1_UDB08_ST, 0x40006568\r
- 1866                  .set CYREG_B1_UDB09_ST, 0x40006569\r
- 1867                  .set CYREG_B1_UDB10_ST, 0x4000656a\r
- 1868                  .set CYREG_B1_UDB11_ST, 0x4000656b\r
- 1869                  .set CYREG_B1_UDB04_CTL, 0x40006574\r
- 1870                  .set CYREG_B1_UDB05_CTL, 0x40006575\r
- 1871                  .set CYREG_B1_UDB06_CTL, 0x40006576\r
- 1872                  .set CYREG_B1_UDB07_CTL, 0x40006577\r
- 1873                  .set CYREG_B1_UDB08_CTL, 0x40006578\r
- 1874                  .set CYREG_B1_UDB09_CTL, 0x40006579\r
- 1875                  .set CYREG_B1_UDB10_CTL, 0x4000657a\r
- 1876                  .set CYREG_B1_UDB11_CTL, 0x4000657b\r
- 1877                  .set CYREG_B1_UDB04_MSK, 0x40006584\r
- 1878                  .set CYREG_B1_UDB05_MSK, 0x40006585\r
- 1879                  .set CYREG_B1_UDB06_MSK, 0x40006586\r
- 1880                  .set CYREG_B1_UDB07_MSK, 0x40006587\r
- 1881                  .set CYREG_B1_UDB08_MSK, 0x40006588\r
- 1882                  .set CYREG_B1_UDB09_MSK, 0x40006589\r
- 1883                  .set CYREG_B1_UDB10_MSK, 0x4000658a\r
- 1884                  .set CYREG_B1_UDB11_MSK, 0x4000658b\r
- 1885                  .set CYREG_B1_UDB04_ACTL, 0x40006594\r
- 1886                  .set CYREG_B1_UDB05_ACTL, 0x40006595\r
- 1887                  .set CYREG_B1_UDB06_ACTL, 0x40006596\r
- 1888                  .set CYREG_B1_UDB07_ACTL, 0x40006597\r
- 1889                  .set CYREG_B1_UDB08_ACTL, 0x40006598\r
- 1890                  .set CYREG_B1_UDB09_ACTL, 0x40006599\r
- 1891                  .set CYREG_B1_UDB10_ACTL, 0x4000659a\r
- 1892                  .set CYREG_B1_UDB11_ACTL, 0x4000659b\r
- 1893                  .set CYREG_B1_UDB04_MC, 0x400065a4\r
- 1894                  .set CYREG_B1_UDB05_MC, 0x400065a5\r
- 1895                  .set CYREG_B1_UDB06_MC, 0x400065a6\r
- 1896                  .set CYREG_B1_UDB07_MC, 0x400065a7\r
- 1897                  .set CYREG_B1_UDB08_MC, 0x400065a8\r
- 1898                  .set CYREG_B1_UDB09_MC, 0x400065a9\r
- 1899                  .set CYREG_B1_UDB10_MC, 0x400065aa\r
- 1900                  .set CYREG_B1_UDB11_MC, 0x400065ab\r
- 1901                  .set CYDEV_UWRK_UWRK16_BASE, 0x40006800\r
- 1902                  .set CYDEV_UWRK_UWRK16_SIZE, 0x00000760\r
- 1903                  .set CYDEV_UWRK_UWRK16_CAT_BASE, 0x40006800\r
- 1904                  .set CYDEV_UWRK_UWRK16_CAT_SIZE, 0x00000760\r
- 1905                  .set CYDEV_UWRK_UWRK16_CAT_B0_BASE, 0x40006800\r
- 1906                  .set CYDEV_UWRK_UWRK16_CAT_B0_SIZE, 0x00000160\r
- 1907                  .set CYREG_B0_UDB00_A0_A1, 0x40006800\r
- 1908                  .set CYREG_B0_UDB01_A0_A1, 0x40006802\r
- 1909                  .set CYREG_B0_UDB02_A0_A1, 0x40006804\r
- 1910                  .set CYREG_B0_UDB03_A0_A1, 0x40006806\r
- 1911                  .set CYREG_B0_UDB04_A0_A1, 0x40006808\r
- 1912                  .set CYREG_B0_UDB05_A0_A1, 0x4000680a\r
- 1913                  .set CYREG_B0_UDB06_A0_A1, 0x4000680c\r
- 1914                  .set CYREG_B0_UDB07_A0_A1, 0x4000680e\r
- 1915                  .set CYREG_B0_UDB08_A0_A1, 0x40006810\r
- 1916                  .set CYREG_B0_UDB09_A0_A1, 0x40006812\r
- 1917                  .set CYREG_B0_UDB10_A0_A1, 0x40006814\r
- 1918                  .set CYREG_B0_UDB11_A0_A1, 0x40006816\r
- 1919                  .set CYREG_B0_UDB12_A0_A1, 0x40006818\r
- 1920                  .set CYREG_B0_UDB13_A0_A1, 0x4000681a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 129\r
-\r
-\r
- 1921                  .set CYREG_B0_UDB14_A0_A1, 0x4000681c\r
- 1922                  .set CYREG_B0_UDB15_A0_A1, 0x4000681e\r
- 1923                  .set CYREG_B0_UDB00_D0_D1, 0x40006840\r
- 1924                  .set CYREG_B0_UDB01_D0_D1, 0x40006842\r
- 1925                  .set CYREG_B0_UDB02_D0_D1, 0x40006844\r
- 1926                  .set CYREG_B0_UDB03_D0_D1, 0x40006846\r
- 1927                  .set CYREG_B0_UDB04_D0_D1, 0x40006848\r
- 1928                  .set CYREG_B0_UDB05_D0_D1, 0x4000684a\r
- 1929                  .set CYREG_B0_UDB06_D0_D1, 0x4000684c\r
- 1930                  .set CYREG_B0_UDB07_D0_D1, 0x4000684e\r
- 1931                  .set CYREG_B0_UDB08_D0_D1, 0x40006850\r
- 1932                  .set CYREG_B0_UDB09_D0_D1, 0x40006852\r
- 1933                  .set CYREG_B0_UDB10_D0_D1, 0x40006854\r
- 1934                  .set CYREG_B0_UDB11_D0_D1, 0x40006856\r
- 1935                  .set CYREG_B0_UDB12_D0_D1, 0x40006858\r
- 1936                  .set CYREG_B0_UDB13_D0_D1, 0x4000685a\r
- 1937                  .set CYREG_B0_UDB14_D0_D1, 0x4000685c\r
- 1938                  .set CYREG_B0_UDB15_D0_D1, 0x4000685e\r
- 1939                  .set CYREG_B0_UDB00_F0_F1, 0x40006880\r
- 1940                  .set CYREG_B0_UDB01_F0_F1, 0x40006882\r
- 1941                  .set CYREG_B0_UDB02_F0_F1, 0x40006884\r
- 1942                  .set CYREG_B0_UDB03_F0_F1, 0x40006886\r
- 1943                  .set CYREG_B0_UDB04_F0_F1, 0x40006888\r
- 1944                  .set CYREG_B0_UDB05_F0_F1, 0x4000688a\r
- 1945                  .set CYREG_B0_UDB06_F0_F1, 0x4000688c\r
- 1946                  .set CYREG_B0_UDB07_F0_F1, 0x4000688e\r
- 1947                  .set CYREG_B0_UDB08_F0_F1, 0x40006890\r
- 1948                  .set CYREG_B0_UDB09_F0_F1, 0x40006892\r
- 1949                  .set CYREG_B0_UDB10_F0_F1, 0x40006894\r
- 1950                  .set CYREG_B0_UDB11_F0_F1, 0x40006896\r
- 1951                  .set CYREG_B0_UDB12_F0_F1, 0x40006898\r
- 1952                  .set CYREG_B0_UDB13_F0_F1, 0x4000689a\r
- 1953                  .set CYREG_B0_UDB14_F0_F1, 0x4000689c\r
- 1954                  .set CYREG_B0_UDB15_F0_F1, 0x4000689e\r
- 1955                  .set CYREG_B0_UDB00_ST_CTL, 0x400068c0\r
- 1956                  .set CYREG_B0_UDB01_ST_CTL, 0x400068c2\r
- 1957                  .set CYREG_B0_UDB02_ST_CTL, 0x400068c4\r
- 1958                  .set CYREG_B0_UDB03_ST_CTL, 0x400068c6\r
- 1959                  .set CYREG_B0_UDB04_ST_CTL, 0x400068c8\r
- 1960                  .set CYREG_B0_UDB05_ST_CTL, 0x400068ca\r
- 1961                  .set CYREG_B0_UDB06_ST_CTL, 0x400068cc\r
- 1962                  .set CYREG_B0_UDB07_ST_CTL, 0x400068ce\r
- 1963                  .set CYREG_B0_UDB08_ST_CTL, 0x400068d0\r
- 1964                  .set CYREG_B0_UDB09_ST_CTL, 0x400068d2\r
- 1965                  .set CYREG_B0_UDB10_ST_CTL, 0x400068d4\r
- 1966                  .set CYREG_B0_UDB11_ST_CTL, 0x400068d6\r
- 1967                  .set CYREG_B0_UDB12_ST_CTL, 0x400068d8\r
- 1968                  .set CYREG_B0_UDB13_ST_CTL, 0x400068da\r
- 1969                  .set CYREG_B0_UDB14_ST_CTL, 0x400068dc\r
- 1970                  .set CYREG_B0_UDB15_ST_CTL, 0x400068de\r
- 1971                  .set CYREG_B0_UDB00_MSK_ACTL, 0x40006900\r
- 1972                  .set CYREG_B0_UDB01_MSK_ACTL, 0x40006902\r
- 1973                  .set CYREG_B0_UDB02_MSK_ACTL, 0x40006904\r
- 1974                  .set CYREG_B0_UDB03_MSK_ACTL, 0x40006906\r
- 1975                  .set CYREG_B0_UDB04_MSK_ACTL, 0x40006908\r
- 1976                  .set CYREG_B0_UDB05_MSK_ACTL, 0x4000690a\r
- 1977                  .set CYREG_B0_UDB06_MSK_ACTL, 0x4000690c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 130\r
-\r
-\r
- 1978                  .set CYREG_B0_UDB07_MSK_ACTL, 0x4000690e\r
- 1979                  .set CYREG_B0_UDB08_MSK_ACTL, 0x40006910\r
- 1980                  .set CYREG_B0_UDB09_MSK_ACTL, 0x40006912\r
- 1981                  .set CYREG_B0_UDB10_MSK_ACTL, 0x40006914\r
- 1982                  .set CYREG_B0_UDB11_MSK_ACTL, 0x40006916\r
- 1983                  .set CYREG_B0_UDB12_MSK_ACTL, 0x40006918\r
- 1984                  .set CYREG_B0_UDB13_MSK_ACTL, 0x4000691a\r
- 1985                  .set CYREG_B0_UDB14_MSK_ACTL, 0x4000691c\r
- 1986                  .set CYREG_B0_UDB15_MSK_ACTL, 0x4000691e\r
- 1987                  .set CYREG_B0_UDB00_MC_00, 0x40006940\r
- 1988                  .set CYREG_B0_UDB01_MC_00, 0x40006942\r
- 1989                  .set CYREG_B0_UDB02_MC_00, 0x40006944\r
- 1990                  .set CYREG_B0_UDB03_MC_00, 0x40006946\r
- 1991                  .set CYREG_B0_UDB04_MC_00, 0x40006948\r
- 1992                  .set CYREG_B0_UDB05_MC_00, 0x4000694a\r
- 1993                  .set CYREG_B0_UDB06_MC_00, 0x4000694c\r
- 1994                  .set CYREG_B0_UDB07_MC_00, 0x4000694e\r
- 1995                  .set CYREG_B0_UDB08_MC_00, 0x40006950\r
- 1996                  .set CYREG_B0_UDB09_MC_00, 0x40006952\r
- 1997                  .set CYREG_B0_UDB10_MC_00, 0x40006954\r
- 1998                  .set CYREG_B0_UDB11_MC_00, 0x40006956\r
- 1999                  .set CYREG_B0_UDB12_MC_00, 0x40006958\r
- 2000                  .set CYREG_B0_UDB13_MC_00, 0x4000695a\r
- 2001                  .set CYREG_B0_UDB14_MC_00, 0x4000695c\r
- 2002                  .set CYREG_B0_UDB15_MC_00, 0x4000695e\r
- 2003                  .set CYDEV_UWRK_UWRK16_CAT_B1_BASE, 0x40006a00\r
- 2004                  .set CYDEV_UWRK_UWRK16_CAT_B1_SIZE, 0x00000160\r
- 2005                  .set CYREG_B1_UDB04_A0_A1, 0x40006a08\r
- 2006                  .set CYREG_B1_UDB05_A0_A1, 0x40006a0a\r
- 2007                  .set CYREG_B1_UDB06_A0_A1, 0x40006a0c\r
- 2008                  .set CYREG_B1_UDB07_A0_A1, 0x40006a0e\r
- 2009                  .set CYREG_B1_UDB08_A0_A1, 0x40006a10\r
- 2010                  .set CYREG_B1_UDB09_A0_A1, 0x40006a12\r
- 2011                  .set CYREG_B1_UDB10_A0_A1, 0x40006a14\r
- 2012                  .set CYREG_B1_UDB11_A0_A1, 0x40006a16\r
- 2013                  .set CYREG_B1_UDB04_D0_D1, 0x40006a48\r
- 2014                  .set CYREG_B1_UDB05_D0_D1, 0x40006a4a\r
- 2015                  .set CYREG_B1_UDB06_D0_D1, 0x40006a4c\r
- 2016                  .set CYREG_B1_UDB07_D0_D1, 0x40006a4e\r
- 2017                  .set CYREG_B1_UDB08_D0_D1, 0x40006a50\r
- 2018                  .set CYREG_B1_UDB09_D0_D1, 0x40006a52\r
- 2019                  .set CYREG_B1_UDB10_D0_D1, 0x40006a54\r
- 2020                  .set CYREG_B1_UDB11_D0_D1, 0x40006a56\r
- 2021                  .set CYREG_B1_UDB04_F0_F1, 0x40006a88\r
- 2022                  .set CYREG_B1_UDB05_F0_F1, 0x40006a8a\r
- 2023                  .set CYREG_B1_UDB06_F0_F1, 0x40006a8c\r
- 2024                  .set CYREG_B1_UDB07_F0_F1, 0x40006a8e\r
- 2025                  .set CYREG_B1_UDB08_F0_F1, 0x40006a90\r
- 2026                  .set CYREG_B1_UDB09_F0_F1, 0x40006a92\r
- 2027                  .set CYREG_B1_UDB10_F0_F1, 0x40006a94\r
- 2028                  .set CYREG_B1_UDB11_F0_F1, 0x40006a96\r
- 2029                  .set CYREG_B1_UDB04_ST_CTL, 0x40006ac8\r
- 2030                  .set CYREG_B1_UDB05_ST_CTL, 0x40006aca\r
- 2031                  .set CYREG_B1_UDB06_ST_CTL, 0x40006acc\r
- 2032                  .set CYREG_B1_UDB07_ST_CTL, 0x40006ace\r
- 2033                  .set CYREG_B1_UDB08_ST_CTL, 0x40006ad0\r
- 2034                  .set CYREG_B1_UDB09_ST_CTL, 0x40006ad2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 131\r
-\r
-\r
- 2035                  .set CYREG_B1_UDB10_ST_CTL, 0x40006ad4\r
- 2036                  .set CYREG_B1_UDB11_ST_CTL, 0x40006ad6\r
- 2037                  .set CYREG_B1_UDB04_MSK_ACTL, 0x40006b08\r
- 2038                  .set CYREG_B1_UDB05_MSK_ACTL, 0x40006b0a\r
- 2039                  .set CYREG_B1_UDB06_MSK_ACTL, 0x40006b0c\r
- 2040                  .set CYREG_B1_UDB07_MSK_ACTL, 0x40006b0e\r
- 2041                  .set CYREG_B1_UDB08_MSK_ACTL, 0x40006b10\r
- 2042                  .set CYREG_B1_UDB09_MSK_ACTL, 0x40006b12\r
- 2043                  .set CYREG_B1_UDB10_MSK_ACTL, 0x40006b14\r
- 2044                  .set CYREG_B1_UDB11_MSK_ACTL, 0x40006b16\r
- 2045                  .set CYREG_B1_UDB04_MC_00, 0x40006b48\r
- 2046                  .set CYREG_B1_UDB05_MC_00, 0x40006b4a\r
- 2047                  .set CYREG_B1_UDB06_MC_00, 0x40006b4c\r
- 2048                  .set CYREG_B1_UDB07_MC_00, 0x40006b4e\r
- 2049                  .set CYREG_B1_UDB08_MC_00, 0x40006b50\r
- 2050                  .set CYREG_B1_UDB09_MC_00, 0x40006b52\r
- 2051                  .set CYREG_B1_UDB10_MC_00, 0x40006b54\r
- 2052                  .set CYREG_B1_UDB11_MC_00, 0x40006b56\r
- 2053                  .set CYDEV_UWRK_UWRK16_DEF_BASE, 0x40006800\r
- 2054                  .set CYDEV_UWRK_UWRK16_DEF_SIZE, 0x0000075e\r
- 2055                  .set CYDEV_UWRK_UWRK16_DEF_B0_BASE, 0x40006800\r
- 2056                  .set CYDEV_UWRK_UWRK16_DEF_B0_SIZE, 0x0000015e\r
- 2057                  .set CYREG_B0_UDB00_01_A0, 0x40006800\r
- 2058                  .set CYREG_B0_UDB01_02_A0, 0x40006802\r
- 2059                  .set CYREG_B0_UDB02_03_A0, 0x40006804\r
- 2060                  .set CYREG_B0_UDB03_04_A0, 0x40006806\r
- 2061                  .set CYREG_B0_UDB04_05_A0, 0x40006808\r
- 2062                  .set CYREG_B0_UDB05_06_A0, 0x4000680a\r
- 2063                  .set CYREG_B0_UDB06_07_A0, 0x4000680c\r
- 2064                  .set CYREG_B0_UDB07_08_A0, 0x4000680e\r
- 2065                  .set CYREG_B0_UDB08_09_A0, 0x40006810\r
- 2066                  .set CYREG_B0_UDB09_10_A0, 0x40006812\r
- 2067                  .set CYREG_B0_UDB10_11_A0, 0x40006814\r
- 2068                  .set CYREG_B0_UDB11_12_A0, 0x40006816\r
- 2069                  .set CYREG_B0_UDB12_13_A0, 0x40006818\r
- 2070                  .set CYREG_B0_UDB13_14_A0, 0x4000681a\r
- 2071                  .set CYREG_B0_UDB14_15_A0, 0x4000681c\r
- 2072                  .set CYREG_B0_UDB00_01_A1, 0x40006820\r
- 2073                  .set CYREG_B0_UDB01_02_A1, 0x40006822\r
- 2074                  .set CYREG_B0_UDB02_03_A1, 0x40006824\r
- 2075                  .set CYREG_B0_UDB03_04_A1, 0x40006826\r
- 2076                  .set CYREG_B0_UDB04_05_A1, 0x40006828\r
- 2077                  .set CYREG_B0_UDB05_06_A1, 0x4000682a\r
- 2078                  .set CYREG_B0_UDB06_07_A1, 0x4000682c\r
- 2079                  .set CYREG_B0_UDB07_08_A1, 0x4000682e\r
- 2080                  .set CYREG_B0_UDB08_09_A1, 0x40006830\r
- 2081                  .set CYREG_B0_UDB09_10_A1, 0x40006832\r
- 2082                  .set CYREG_B0_UDB10_11_A1, 0x40006834\r
- 2083                  .set CYREG_B0_UDB11_12_A1, 0x40006836\r
- 2084                  .set CYREG_B0_UDB12_13_A1, 0x40006838\r
- 2085                  .set CYREG_B0_UDB13_14_A1, 0x4000683a\r
- 2086                  .set CYREG_B0_UDB14_15_A1, 0x4000683c\r
- 2087                  .set CYREG_B0_UDB00_01_D0, 0x40006840\r
- 2088                  .set CYREG_B0_UDB01_02_D0, 0x40006842\r
- 2089                  .set CYREG_B0_UDB02_03_D0, 0x40006844\r
- 2090                  .set CYREG_B0_UDB03_04_D0, 0x40006846\r
- 2091                  .set CYREG_B0_UDB04_05_D0, 0x40006848\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 132\r
-\r
-\r
- 2092                  .set CYREG_B0_UDB05_06_D0, 0x4000684a\r
- 2093                  .set CYREG_B0_UDB06_07_D0, 0x4000684c\r
- 2094                  .set CYREG_B0_UDB07_08_D0, 0x4000684e\r
- 2095                  .set CYREG_B0_UDB08_09_D0, 0x40006850\r
- 2096                  .set CYREG_B0_UDB09_10_D0, 0x40006852\r
- 2097                  .set CYREG_B0_UDB10_11_D0, 0x40006854\r
- 2098                  .set CYREG_B0_UDB11_12_D0, 0x40006856\r
- 2099                  .set CYREG_B0_UDB12_13_D0, 0x40006858\r
- 2100                  .set CYREG_B0_UDB13_14_D0, 0x4000685a\r
- 2101                  .set CYREG_B0_UDB14_15_D0, 0x4000685c\r
- 2102                  .set CYREG_B0_UDB00_01_D1, 0x40006860\r
- 2103                  .set CYREG_B0_UDB01_02_D1, 0x40006862\r
- 2104                  .set CYREG_B0_UDB02_03_D1, 0x40006864\r
- 2105                  .set CYREG_B0_UDB03_04_D1, 0x40006866\r
- 2106                  .set CYREG_B0_UDB04_05_D1, 0x40006868\r
- 2107                  .set CYREG_B0_UDB05_06_D1, 0x4000686a\r
- 2108                  .set CYREG_B0_UDB06_07_D1, 0x4000686c\r
- 2109                  .set CYREG_B0_UDB07_08_D1, 0x4000686e\r
- 2110                  .set CYREG_B0_UDB08_09_D1, 0x40006870\r
- 2111                  .set CYREG_B0_UDB09_10_D1, 0x40006872\r
- 2112                  .set CYREG_B0_UDB10_11_D1, 0x40006874\r
- 2113                  .set CYREG_B0_UDB11_12_D1, 0x40006876\r
- 2114                  .set CYREG_B0_UDB12_13_D1, 0x40006878\r
- 2115                  .set CYREG_B0_UDB13_14_D1, 0x4000687a\r
- 2116                  .set CYREG_B0_UDB14_15_D1, 0x4000687c\r
- 2117                  .set CYREG_B0_UDB00_01_F0, 0x40006880\r
- 2118                  .set CYREG_B0_UDB01_02_F0, 0x40006882\r
- 2119                  .set CYREG_B0_UDB02_03_F0, 0x40006884\r
- 2120                  .set CYREG_B0_UDB03_04_F0, 0x40006886\r
- 2121                  .set CYREG_B0_UDB04_05_F0, 0x40006888\r
- 2122                  .set CYREG_B0_UDB05_06_F0, 0x4000688a\r
- 2123                  .set CYREG_B0_UDB06_07_F0, 0x4000688c\r
- 2124                  .set CYREG_B0_UDB07_08_F0, 0x4000688e\r
- 2125                  .set CYREG_B0_UDB08_09_F0, 0x40006890\r
- 2126                  .set CYREG_B0_UDB09_10_F0, 0x40006892\r
- 2127                  .set CYREG_B0_UDB10_11_F0, 0x40006894\r
- 2128                  .set CYREG_B0_UDB11_12_F0, 0x40006896\r
- 2129                  .set CYREG_B0_UDB12_13_F0, 0x40006898\r
- 2130                  .set CYREG_B0_UDB13_14_F0, 0x4000689a\r
- 2131                  .set CYREG_B0_UDB14_15_F0, 0x4000689c\r
- 2132                  .set CYREG_B0_UDB00_01_F1, 0x400068a0\r
- 2133                  .set CYREG_B0_UDB01_02_F1, 0x400068a2\r
- 2134                  .set CYREG_B0_UDB02_03_F1, 0x400068a4\r
- 2135                  .set CYREG_B0_UDB03_04_F1, 0x400068a6\r
- 2136                  .set CYREG_B0_UDB04_05_F1, 0x400068a8\r
- 2137                  .set CYREG_B0_UDB05_06_F1, 0x400068aa\r
- 2138                  .set CYREG_B0_UDB06_07_F1, 0x400068ac\r
- 2139                  .set CYREG_B0_UDB07_08_F1, 0x400068ae\r
- 2140                  .set CYREG_B0_UDB08_09_F1, 0x400068b0\r
- 2141                  .set CYREG_B0_UDB09_10_F1, 0x400068b2\r
- 2142                  .set CYREG_B0_UDB10_11_F1, 0x400068b4\r
- 2143                  .set CYREG_B0_UDB11_12_F1, 0x400068b6\r
- 2144                  .set CYREG_B0_UDB12_13_F1, 0x400068b8\r
- 2145                  .set CYREG_B0_UDB13_14_F1, 0x400068ba\r
- 2146                  .set CYREG_B0_UDB14_15_F1, 0x400068bc\r
- 2147                  .set CYREG_B0_UDB00_01_ST, 0x400068c0\r
- 2148                  .set CYREG_B0_UDB01_02_ST, 0x400068c2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 133\r
-\r
-\r
- 2149                  .set CYREG_B0_UDB02_03_ST, 0x400068c4\r
- 2150                  .set CYREG_B0_UDB03_04_ST, 0x400068c6\r
- 2151                  .set CYREG_B0_UDB04_05_ST, 0x400068c8\r
- 2152                  .set CYREG_B0_UDB05_06_ST, 0x400068ca\r
- 2153                  .set CYREG_B0_UDB06_07_ST, 0x400068cc\r
- 2154                  .set CYREG_B0_UDB07_08_ST, 0x400068ce\r
- 2155                  .set CYREG_B0_UDB08_09_ST, 0x400068d0\r
- 2156                  .set CYREG_B0_UDB09_10_ST, 0x400068d2\r
- 2157                  .set CYREG_B0_UDB10_11_ST, 0x400068d4\r
- 2158                  .set CYREG_B0_UDB11_12_ST, 0x400068d6\r
- 2159                  .set CYREG_B0_UDB12_13_ST, 0x400068d8\r
- 2160                  .set CYREG_B0_UDB13_14_ST, 0x400068da\r
- 2161                  .set CYREG_B0_UDB14_15_ST, 0x400068dc\r
- 2162                  .set CYREG_B0_UDB00_01_CTL, 0x400068e0\r
- 2163                  .set CYREG_B0_UDB01_02_CTL, 0x400068e2\r
- 2164                  .set CYREG_B0_UDB02_03_CTL, 0x400068e4\r
- 2165                  .set CYREG_B0_UDB03_04_CTL, 0x400068e6\r
- 2166                  .set CYREG_B0_UDB04_05_CTL, 0x400068e8\r
- 2167                  .set CYREG_B0_UDB05_06_CTL, 0x400068ea\r
- 2168                  .set CYREG_B0_UDB06_07_CTL, 0x400068ec\r
- 2169                  .set CYREG_B0_UDB07_08_CTL, 0x400068ee\r
- 2170                  .set CYREG_B0_UDB08_09_CTL, 0x400068f0\r
- 2171                  .set CYREG_B0_UDB09_10_CTL, 0x400068f2\r
- 2172                  .set CYREG_B0_UDB10_11_CTL, 0x400068f4\r
- 2173                  .set CYREG_B0_UDB11_12_CTL, 0x400068f6\r
- 2174                  .set CYREG_B0_UDB12_13_CTL, 0x400068f8\r
- 2175                  .set CYREG_B0_UDB13_14_CTL, 0x400068fa\r
- 2176                  .set CYREG_B0_UDB14_15_CTL, 0x400068fc\r
- 2177                  .set CYREG_B0_UDB00_01_MSK, 0x40006900\r
- 2178                  .set CYREG_B0_UDB01_02_MSK, 0x40006902\r
- 2179                  .set CYREG_B0_UDB02_03_MSK, 0x40006904\r
- 2180                  .set CYREG_B0_UDB03_04_MSK, 0x40006906\r
- 2181                  .set CYREG_B0_UDB04_05_MSK, 0x40006908\r
- 2182                  .set CYREG_B0_UDB05_06_MSK, 0x4000690a\r
- 2183                  .set CYREG_B0_UDB06_07_MSK, 0x4000690c\r
- 2184                  .set CYREG_B0_UDB07_08_MSK, 0x4000690e\r
- 2185                  .set CYREG_B0_UDB08_09_MSK, 0x40006910\r
- 2186                  .set CYREG_B0_UDB09_10_MSK, 0x40006912\r
- 2187                  .set CYREG_B0_UDB10_11_MSK, 0x40006914\r
- 2188                  .set CYREG_B0_UDB11_12_MSK, 0x40006916\r
- 2189                  .set CYREG_B0_UDB12_13_MSK, 0x40006918\r
- 2190                  .set CYREG_B0_UDB13_14_MSK, 0x4000691a\r
- 2191                  .set CYREG_B0_UDB14_15_MSK, 0x4000691c\r
- 2192                  .set CYREG_B0_UDB00_01_ACTL, 0x40006920\r
- 2193                  .set CYREG_B0_UDB01_02_ACTL, 0x40006922\r
- 2194                  .set CYREG_B0_UDB02_03_ACTL, 0x40006924\r
- 2195                  .set CYREG_B0_UDB03_04_ACTL, 0x40006926\r
- 2196                  .set CYREG_B0_UDB04_05_ACTL, 0x40006928\r
- 2197                  .set CYREG_B0_UDB05_06_ACTL, 0x4000692a\r
- 2198                  .set CYREG_B0_UDB06_07_ACTL, 0x4000692c\r
- 2199                  .set CYREG_B0_UDB07_08_ACTL, 0x4000692e\r
- 2200                  .set CYREG_B0_UDB08_09_ACTL, 0x40006930\r
- 2201                  .set CYREG_B0_UDB09_10_ACTL, 0x40006932\r
- 2202                  .set CYREG_B0_UDB10_11_ACTL, 0x40006934\r
- 2203                  .set CYREG_B0_UDB11_12_ACTL, 0x40006936\r
- 2204                  .set CYREG_B0_UDB12_13_ACTL, 0x40006938\r
- 2205                  .set CYREG_B0_UDB13_14_ACTL, 0x4000693a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 134\r
-\r
-\r
- 2206                  .set CYREG_B0_UDB14_15_ACTL, 0x4000693c\r
- 2207                  .set CYREG_B0_UDB00_01_MC, 0x40006940\r
- 2208                  .set CYREG_B0_UDB01_02_MC, 0x40006942\r
- 2209                  .set CYREG_B0_UDB02_03_MC, 0x40006944\r
- 2210                  .set CYREG_B0_UDB03_04_MC, 0x40006946\r
- 2211                  .set CYREG_B0_UDB04_05_MC, 0x40006948\r
- 2212                  .set CYREG_B0_UDB05_06_MC, 0x4000694a\r
- 2213                  .set CYREG_B0_UDB06_07_MC, 0x4000694c\r
- 2214                  .set CYREG_B0_UDB07_08_MC, 0x4000694e\r
- 2215                  .set CYREG_B0_UDB08_09_MC, 0x40006950\r
- 2216                  .set CYREG_B0_UDB09_10_MC, 0x40006952\r
- 2217                  .set CYREG_B0_UDB10_11_MC, 0x40006954\r
- 2218                  .set CYREG_B0_UDB11_12_MC, 0x40006956\r
- 2219                  .set CYREG_B0_UDB12_13_MC, 0x40006958\r
- 2220                  .set CYREG_B0_UDB13_14_MC, 0x4000695a\r
- 2221                  .set CYREG_B0_UDB14_15_MC, 0x4000695c\r
- 2222                  .set CYDEV_UWRK_UWRK16_DEF_B1_BASE, 0x40006a00\r
- 2223                  .set CYDEV_UWRK_UWRK16_DEF_B1_SIZE, 0x0000015e\r
- 2224                  .set CYREG_B1_UDB04_05_A0, 0x40006a08\r
- 2225                  .set CYREG_B1_UDB05_06_A0, 0x40006a0a\r
- 2226                  .set CYREG_B1_UDB06_07_A0, 0x40006a0c\r
- 2227                  .set CYREG_B1_UDB07_08_A0, 0x40006a0e\r
- 2228                  .set CYREG_B1_UDB08_09_A0, 0x40006a10\r
- 2229                  .set CYREG_B1_UDB09_10_A0, 0x40006a12\r
- 2230                  .set CYREG_B1_UDB10_11_A0, 0x40006a14\r
- 2231                  .set CYREG_B1_UDB11_12_A0, 0x40006a16\r
- 2232                  .set CYREG_B1_UDB04_05_A1, 0x40006a28\r
- 2233                  .set CYREG_B1_UDB05_06_A1, 0x40006a2a\r
- 2234                  .set CYREG_B1_UDB06_07_A1, 0x40006a2c\r
- 2235                  .set CYREG_B1_UDB07_08_A1, 0x40006a2e\r
- 2236                  .set CYREG_B1_UDB08_09_A1, 0x40006a30\r
- 2237                  .set CYREG_B1_UDB09_10_A1, 0x40006a32\r
- 2238                  .set CYREG_B1_UDB10_11_A1, 0x40006a34\r
- 2239                  .set CYREG_B1_UDB11_12_A1, 0x40006a36\r
- 2240                  .set CYREG_B1_UDB04_05_D0, 0x40006a48\r
- 2241                  .set CYREG_B1_UDB05_06_D0, 0x40006a4a\r
- 2242                  .set CYREG_B1_UDB06_07_D0, 0x40006a4c\r
- 2243                  .set CYREG_B1_UDB07_08_D0, 0x40006a4e\r
- 2244                  .set CYREG_B1_UDB08_09_D0, 0x40006a50\r
- 2245                  .set CYREG_B1_UDB09_10_D0, 0x40006a52\r
- 2246                  .set CYREG_B1_UDB10_11_D0, 0x40006a54\r
- 2247                  .set CYREG_B1_UDB11_12_D0, 0x40006a56\r
- 2248                  .set CYREG_B1_UDB04_05_D1, 0x40006a68\r
- 2249                  .set CYREG_B1_UDB05_06_D1, 0x40006a6a\r
- 2250                  .set CYREG_B1_UDB06_07_D1, 0x40006a6c\r
- 2251                  .set CYREG_B1_UDB07_08_D1, 0x40006a6e\r
- 2252                  .set CYREG_B1_UDB08_09_D1, 0x40006a70\r
- 2253                  .set CYREG_B1_UDB09_10_D1, 0x40006a72\r
- 2254                  .set CYREG_B1_UDB10_11_D1, 0x40006a74\r
- 2255                  .set CYREG_B1_UDB11_12_D1, 0x40006a76\r
- 2256                  .set CYREG_B1_UDB04_05_F0, 0x40006a88\r
- 2257                  .set CYREG_B1_UDB05_06_F0, 0x40006a8a\r
- 2258                  .set CYREG_B1_UDB06_07_F0, 0x40006a8c\r
- 2259                  .set CYREG_B1_UDB07_08_F0, 0x40006a8e\r
- 2260                  .set CYREG_B1_UDB08_09_F0, 0x40006a90\r
- 2261                  .set CYREG_B1_UDB09_10_F0, 0x40006a92\r
- 2262                  .set CYREG_B1_UDB10_11_F0, 0x40006a94\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 135\r
-\r
-\r
- 2263                  .set CYREG_B1_UDB11_12_F0, 0x40006a96\r
- 2264                  .set CYREG_B1_UDB04_05_F1, 0x40006aa8\r
- 2265                  .set CYREG_B1_UDB05_06_F1, 0x40006aaa\r
- 2266                  .set CYREG_B1_UDB06_07_F1, 0x40006aac\r
- 2267                  .set CYREG_B1_UDB07_08_F1, 0x40006aae\r
- 2268                  .set CYREG_B1_UDB08_09_F1, 0x40006ab0\r
- 2269                  .set CYREG_B1_UDB09_10_F1, 0x40006ab2\r
- 2270                  .set CYREG_B1_UDB10_11_F1, 0x40006ab4\r
- 2271                  .set CYREG_B1_UDB11_12_F1, 0x40006ab6\r
- 2272                  .set CYREG_B1_UDB04_05_ST, 0x40006ac8\r
- 2273                  .set CYREG_B1_UDB05_06_ST, 0x40006aca\r
- 2274                  .set CYREG_B1_UDB06_07_ST, 0x40006acc\r
- 2275                  .set CYREG_B1_UDB07_08_ST, 0x40006ace\r
- 2276                  .set CYREG_B1_UDB08_09_ST, 0x40006ad0\r
- 2277                  .set CYREG_B1_UDB09_10_ST, 0x40006ad2\r
- 2278                  .set CYREG_B1_UDB10_11_ST, 0x40006ad4\r
- 2279                  .set CYREG_B1_UDB11_12_ST, 0x40006ad6\r
- 2280                  .set CYREG_B1_UDB04_05_CTL, 0x40006ae8\r
- 2281                  .set CYREG_B1_UDB05_06_CTL, 0x40006aea\r
- 2282                  .set CYREG_B1_UDB06_07_CTL, 0x40006aec\r
- 2283                  .set CYREG_B1_UDB07_08_CTL, 0x40006aee\r
- 2284                  .set CYREG_B1_UDB08_09_CTL, 0x40006af0\r
- 2285                  .set CYREG_B1_UDB09_10_CTL, 0x40006af2\r
- 2286                  .set CYREG_B1_UDB10_11_CTL, 0x40006af4\r
- 2287                  .set CYREG_B1_UDB11_12_CTL, 0x40006af6\r
- 2288                  .set CYREG_B1_UDB04_05_MSK, 0x40006b08\r
- 2289                  .set CYREG_B1_UDB05_06_MSK, 0x40006b0a\r
- 2290                  .set CYREG_B1_UDB06_07_MSK, 0x40006b0c\r
- 2291                  .set CYREG_B1_UDB07_08_MSK, 0x40006b0e\r
- 2292                  .set CYREG_B1_UDB08_09_MSK, 0x40006b10\r
- 2293                  .set CYREG_B1_UDB09_10_MSK, 0x40006b12\r
- 2294                  .set CYREG_B1_UDB10_11_MSK, 0x40006b14\r
- 2295                  .set CYREG_B1_UDB11_12_MSK, 0x40006b16\r
- 2296                  .set CYREG_B1_UDB04_05_ACTL, 0x40006b28\r
- 2297                  .set CYREG_B1_UDB05_06_ACTL, 0x40006b2a\r
- 2298                  .set CYREG_B1_UDB06_07_ACTL, 0x40006b2c\r
- 2299                  .set CYREG_B1_UDB07_08_ACTL, 0x40006b2e\r
- 2300                  .set CYREG_B1_UDB08_09_ACTL, 0x40006b30\r
- 2301                  .set CYREG_B1_UDB09_10_ACTL, 0x40006b32\r
- 2302                  .set CYREG_B1_UDB10_11_ACTL, 0x40006b34\r
- 2303                  .set CYREG_B1_UDB11_12_ACTL, 0x40006b36\r
- 2304                  .set CYREG_B1_UDB04_05_MC, 0x40006b48\r
- 2305                  .set CYREG_B1_UDB05_06_MC, 0x40006b4a\r
- 2306                  .set CYREG_B1_UDB06_07_MC, 0x40006b4c\r
- 2307                  .set CYREG_B1_UDB07_08_MC, 0x40006b4e\r
- 2308                  .set CYREG_B1_UDB08_09_MC, 0x40006b50\r
- 2309                  .set CYREG_B1_UDB09_10_MC, 0x40006b52\r
- 2310                  .set CYREG_B1_UDB10_11_MC, 0x40006b54\r
- 2311                  .set CYREG_B1_UDB11_12_MC, 0x40006b56\r
- 2312                  .set CYDEV_PHUB_BASE, 0x40007000\r
- 2313                  .set CYDEV_PHUB_SIZE, 0x00000c00\r
- 2314                  .set CYREG_PHUB_CFG, 0x40007000\r
- 2315                  .set CYREG_PHUB_ERR, 0x40007004\r
- 2316                  .set CYREG_PHUB_ERR_ADR, 0x40007008\r
- 2317                  .set CYDEV_PHUB_CH0_BASE, 0x40007010\r
- 2318                  .set CYDEV_PHUB_CH0_SIZE, 0x0000000c\r
- 2319                  .set CYREG_PHUB_CH0_BASIC_CFG, 0x40007010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 136\r
-\r
-\r
- 2320                  .set CYREG_PHUB_CH0_ACTION, 0x40007014\r
- 2321                  .set CYREG_PHUB_CH0_BASIC_STATUS, 0x40007018\r
- 2322                  .set CYDEV_PHUB_CH1_BASE, 0x40007020\r
- 2323                  .set CYDEV_PHUB_CH1_SIZE, 0x0000000c\r
- 2324                  .set CYREG_PHUB_CH1_BASIC_CFG, 0x40007020\r
- 2325                  .set CYREG_PHUB_CH1_ACTION, 0x40007024\r
- 2326                  .set CYREG_PHUB_CH1_BASIC_STATUS, 0x40007028\r
- 2327                  .set CYDEV_PHUB_CH2_BASE, 0x40007030\r
- 2328                  .set CYDEV_PHUB_CH2_SIZE, 0x0000000c\r
- 2329                  .set CYREG_PHUB_CH2_BASIC_CFG, 0x40007030\r
- 2330                  .set CYREG_PHUB_CH2_ACTION, 0x40007034\r
- 2331                  .set CYREG_PHUB_CH2_BASIC_STATUS, 0x40007038\r
- 2332                  .set CYDEV_PHUB_CH3_BASE, 0x40007040\r
- 2333                  .set CYDEV_PHUB_CH3_SIZE, 0x0000000c\r
- 2334                  .set CYREG_PHUB_CH3_BASIC_CFG, 0x40007040\r
- 2335                  .set CYREG_PHUB_CH3_ACTION, 0x40007044\r
- 2336                  .set CYREG_PHUB_CH3_BASIC_STATUS, 0x40007048\r
- 2337                  .set CYDEV_PHUB_CH4_BASE, 0x40007050\r
- 2338                  .set CYDEV_PHUB_CH4_SIZE, 0x0000000c\r
- 2339                  .set CYREG_PHUB_CH4_BASIC_CFG, 0x40007050\r
- 2340                  .set CYREG_PHUB_CH4_ACTION, 0x40007054\r
- 2341                  .set CYREG_PHUB_CH4_BASIC_STATUS, 0x40007058\r
- 2342                  .set CYDEV_PHUB_CH5_BASE, 0x40007060\r
- 2343                  .set CYDEV_PHUB_CH5_SIZE, 0x0000000c\r
- 2344                  .set CYREG_PHUB_CH5_BASIC_CFG, 0x40007060\r
- 2345                  .set CYREG_PHUB_CH5_ACTION, 0x40007064\r
- 2346                  .set CYREG_PHUB_CH5_BASIC_STATUS, 0x40007068\r
- 2347                  .set CYDEV_PHUB_CH6_BASE, 0x40007070\r
- 2348                  .set CYDEV_PHUB_CH6_SIZE, 0x0000000c\r
- 2349                  .set CYREG_PHUB_CH6_BASIC_CFG, 0x40007070\r
- 2350                  .set CYREG_PHUB_CH6_ACTION, 0x40007074\r
- 2351                  .set CYREG_PHUB_CH6_BASIC_STATUS, 0x40007078\r
- 2352                  .set CYDEV_PHUB_CH7_BASE, 0x40007080\r
- 2353                  .set CYDEV_PHUB_CH7_SIZE, 0x0000000c\r
- 2354                  .set CYREG_PHUB_CH7_BASIC_CFG, 0x40007080\r
- 2355                  .set CYREG_PHUB_CH7_ACTION, 0x40007084\r
- 2356                  .set CYREG_PHUB_CH7_BASIC_STATUS, 0x40007088\r
- 2357                  .set CYDEV_PHUB_CH8_BASE, 0x40007090\r
- 2358                  .set CYDEV_PHUB_CH8_SIZE, 0x0000000c\r
- 2359                  .set CYREG_PHUB_CH8_BASIC_CFG, 0x40007090\r
- 2360                  .set CYREG_PHUB_CH8_ACTION, 0x40007094\r
- 2361                  .set CYREG_PHUB_CH8_BASIC_STATUS, 0x40007098\r
- 2362                  .set CYDEV_PHUB_CH9_BASE, 0x400070a0\r
- 2363                  .set CYDEV_PHUB_CH9_SIZE, 0x0000000c\r
- 2364                  .set CYREG_PHUB_CH9_BASIC_CFG, 0x400070a0\r
- 2365                  .set CYREG_PHUB_CH9_ACTION, 0x400070a4\r
- 2366                  .set CYREG_PHUB_CH9_BASIC_STATUS, 0x400070a8\r
- 2367                  .set CYDEV_PHUB_CH10_BASE, 0x400070b0\r
- 2368                  .set CYDEV_PHUB_CH10_SIZE, 0x0000000c\r
- 2369                  .set CYREG_PHUB_CH10_BASIC_CFG, 0x400070b0\r
- 2370                  .set CYREG_PHUB_CH10_ACTION, 0x400070b4\r
- 2371                  .set CYREG_PHUB_CH10_BASIC_STATUS, 0x400070b8\r
- 2372                  .set CYDEV_PHUB_CH11_BASE, 0x400070c0\r
- 2373                  .set CYDEV_PHUB_CH11_SIZE, 0x0000000c\r
- 2374                  .set CYREG_PHUB_CH11_BASIC_CFG, 0x400070c0\r
- 2375                  .set CYREG_PHUB_CH11_ACTION, 0x400070c4\r
- 2376                  .set CYREG_PHUB_CH11_BASIC_STATUS, 0x400070c8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 137\r
-\r
-\r
- 2377                  .set CYDEV_PHUB_CH12_BASE, 0x400070d0\r
- 2378                  .set CYDEV_PHUB_CH12_SIZE, 0x0000000c\r
- 2379                  .set CYREG_PHUB_CH12_BASIC_CFG, 0x400070d0\r
- 2380                  .set CYREG_PHUB_CH12_ACTION, 0x400070d4\r
- 2381                  .set CYREG_PHUB_CH12_BASIC_STATUS, 0x400070d8\r
- 2382                  .set CYDEV_PHUB_CH13_BASE, 0x400070e0\r
- 2383                  .set CYDEV_PHUB_CH13_SIZE, 0x0000000c\r
- 2384                  .set CYREG_PHUB_CH13_BASIC_CFG, 0x400070e0\r
- 2385                  .set CYREG_PHUB_CH13_ACTION, 0x400070e4\r
- 2386                  .set CYREG_PHUB_CH13_BASIC_STATUS, 0x400070e8\r
- 2387                  .set CYDEV_PHUB_CH14_BASE, 0x400070f0\r
- 2388                  .set CYDEV_PHUB_CH14_SIZE, 0x0000000c\r
- 2389                  .set CYREG_PHUB_CH14_BASIC_CFG, 0x400070f0\r
- 2390                  .set CYREG_PHUB_CH14_ACTION, 0x400070f4\r
- 2391                  .set CYREG_PHUB_CH14_BASIC_STATUS, 0x400070f8\r
- 2392                  .set CYDEV_PHUB_CH15_BASE, 0x40007100\r
- 2393                  .set CYDEV_PHUB_CH15_SIZE, 0x0000000c\r
- 2394                  .set CYREG_PHUB_CH15_BASIC_CFG, 0x40007100\r
- 2395                  .set CYREG_PHUB_CH15_ACTION, 0x40007104\r
- 2396                  .set CYREG_PHUB_CH15_BASIC_STATUS, 0x40007108\r
- 2397                  .set CYDEV_PHUB_CH16_BASE, 0x40007110\r
- 2398                  .set CYDEV_PHUB_CH16_SIZE, 0x0000000c\r
- 2399                  .set CYREG_PHUB_CH16_BASIC_CFG, 0x40007110\r
- 2400                  .set CYREG_PHUB_CH16_ACTION, 0x40007114\r
- 2401                  .set CYREG_PHUB_CH16_BASIC_STATUS, 0x40007118\r
- 2402                  .set CYDEV_PHUB_CH17_BASE, 0x40007120\r
- 2403                  .set CYDEV_PHUB_CH17_SIZE, 0x0000000c\r
- 2404                  .set CYREG_PHUB_CH17_BASIC_CFG, 0x40007120\r
- 2405                  .set CYREG_PHUB_CH17_ACTION, 0x40007124\r
- 2406                  .set CYREG_PHUB_CH17_BASIC_STATUS, 0x40007128\r
- 2407                  .set CYDEV_PHUB_CH18_BASE, 0x40007130\r
- 2408                  .set CYDEV_PHUB_CH18_SIZE, 0x0000000c\r
- 2409                  .set CYREG_PHUB_CH18_BASIC_CFG, 0x40007130\r
- 2410                  .set CYREG_PHUB_CH18_ACTION, 0x40007134\r
- 2411                  .set CYREG_PHUB_CH18_BASIC_STATUS, 0x40007138\r
- 2412                  .set CYDEV_PHUB_CH19_BASE, 0x40007140\r
- 2413                  .set CYDEV_PHUB_CH19_SIZE, 0x0000000c\r
- 2414                  .set CYREG_PHUB_CH19_BASIC_CFG, 0x40007140\r
- 2415                  .set CYREG_PHUB_CH19_ACTION, 0x40007144\r
- 2416                  .set CYREG_PHUB_CH19_BASIC_STATUS, 0x40007148\r
- 2417                  .set CYDEV_PHUB_CH20_BASE, 0x40007150\r
- 2418                  .set CYDEV_PHUB_CH20_SIZE, 0x0000000c\r
- 2419                  .set CYREG_PHUB_CH20_BASIC_CFG, 0x40007150\r
- 2420                  .set CYREG_PHUB_CH20_ACTION, 0x40007154\r
- 2421                  .set CYREG_PHUB_CH20_BASIC_STATUS, 0x40007158\r
- 2422                  .set CYDEV_PHUB_CH21_BASE, 0x40007160\r
- 2423                  .set CYDEV_PHUB_CH21_SIZE, 0x0000000c\r
- 2424                  .set CYREG_PHUB_CH21_BASIC_CFG, 0x40007160\r
- 2425                  .set CYREG_PHUB_CH21_ACTION, 0x40007164\r
- 2426                  .set CYREG_PHUB_CH21_BASIC_STATUS, 0x40007168\r
- 2427                  .set CYDEV_PHUB_CH22_BASE, 0x40007170\r
- 2428                  .set CYDEV_PHUB_CH22_SIZE, 0x0000000c\r
- 2429                  .set CYREG_PHUB_CH22_BASIC_CFG, 0x40007170\r
- 2430                  .set CYREG_PHUB_CH22_ACTION, 0x40007174\r
- 2431                  .set CYREG_PHUB_CH22_BASIC_STATUS, 0x40007178\r
- 2432                  .set CYDEV_PHUB_CH23_BASE, 0x40007180\r
- 2433                  .set CYDEV_PHUB_CH23_SIZE, 0x0000000c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 138\r
-\r
-\r
- 2434                  .set CYREG_PHUB_CH23_BASIC_CFG, 0x40007180\r
- 2435                  .set CYREG_PHUB_CH23_ACTION, 0x40007184\r
- 2436                  .set CYREG_PHUB_CH23_BASIC_STATUS, 0x40007188\r
- 2437                  .set CYDEV_PHUB_CFGMEM0_BASE, 0x40007600\r
- 2438                  .set CYDEV_PHUB_CFGMEM0_SIZE, 0x00000008\r
- 2439                  .set CYREG_PHUB_CFGMEM0_CFG0, 0x40007600\r
- 2440                  .set CYREG_PHUB_CFGMEM0_CFG1, 0x40007604\r
- 2441                  .set CYDEV_PHUB_CFGMEM1_BASE, 0x40007608\r
- 2442                  .set CYDEV_PHUB_CFGMEM1_SIZE, 0x00000008\r
- 2443                  .set CYREG_PHUB_CFGMEM1_CFG0, 0x40007608\r
- 2444                  .set CYREG_PHUB_CFGMEM1_CFG1, 0x4000760c\r
- 2445                  .set CYDEV_PHUB_CFGMEM2_BASE, 0x40007610\r
- 2446                  .set CYDEV_PHUB_CFGMEM2_SIZE, 0x00000008\r
- 2447                  .set CYREG_PHUB_CFGMEM2_CFG0, 0x40007610\r
- 2448                  .set CYREG_PHUB_CFGMEM2_CFG1, 0x40007614\r
- 2449                  .set CYDEV_PHUB_CFGMEM3_BASE, 0x40007618\r
- 2450                  .set CYDEV_PHUB_CFGMEM3_SIZE, 0x00000008\r
- 2451                  .set CYREG_PHUB_CFGMEM3_CFG0, 0x40007618\r
- 2452                  .set CYREG_PHUB_CFGMEM3_CFG1, 0x4000761c\r
- 2453                  .set CYDEV_PHUB_CFGMEM4_BASE, 0x40007620\r
- 2454                  .set CYDEV_PHUB_CFGMEM4_SIZE, 0x00000008\r
- 2455                  .set CYREG_PHUB_CFGMEM4_CFG0, 0x40007620\r
- 2456                  .set CYREG_PHUB_CFGMEM4_CFG1, 0x40007624\r
- 2457                  .set CYDEV_PHUB_CFGMEM5_BASE, 0x40007628\r
- 2458                  .set CYDEV_PHUB_CFGMEM5_SIZE, 0x00000008\r
- 2459                  .set CYREG_PHUB_CFGMEM5_CFG0, 0x40007628\r
- 2460                  .set CYREG_PHUB_CFGMEM5_CFG1, 0x4000762c\r
- 2461                  .set CYDEV_PHUB_CFGMEM6_BASE, 0x40007630\r
- 2462                  .set CYDEV_PHUB_CFGMEM6_SIZE, 0x00000008\r
- 2463                  .set CYREG_PHUB_CFGMEM6_CFG0, 0x40007630\r
- 2464                  .set CYREG_PHUB_CFGMEM6_CFG1, 0x40007634\r
- 2465                  .set CYDEV_PHUB_CFGMEM7_BASE, 0x40007638\r
- 2466                  .set CYDEV_PHUB_CFGMEM7_SIZE, 0x00000008\r
- 2467                  .set CYREG_PHUB_CFGMEM7_CFG0, 0x40007638\r
- 2468                  .set CYREG_PHUB_CFGMEM7_CFG1, 0x4000763c\r
- 2469                  .set CYDEV_PHUB_CFGMEM8_BASE, 0x40007640\r
- 2470                  .set CYDEV_PHUB_CFGMEM8_SIZE, 0x00000008\r
- 2471                  .set CYREG_PHUB_CFGMEM8_CFG0, 0x40007640\r
- 2472                  .set CYREG_PHUB_CFGMEM8_CFG1, 0x40007644\r
- 2473                  .set CYDEV_PHUB_CFGMEM9_BASE, 0x40007648\r
- 2474                  .set CYDEV_PHUB_CFGMEM9_SIZE, 0x00000008\r
- 2475                  .set CYREG_PHUB_CFGMEM9_CFG0, 0x40007648\r
- 2476                  .set CYREG_PHUB_CFGMEM9_CFG1, 0x4000764c\r
- 2477                  .set CYDEV_PHUB_CFGMEM10_BASE, 0x40007650\r
- 2478                  .set CYDEV_PHUB_CFGMEM10_SIZE, 0x00000008\r
- 2479                  .set CYREG_PHUB_CFGMEM10_CFG0, 0x40007650\r
- 2480                  .set CYREG_PHUB_CFGMEM10_CFG1, 0x40007654\r
- 2481                  .set CYDEV_PHUB_CFGMEM11_BASE, 0x40007658\r
- 2482                  .set CYDEV_PHUB_CFGMEM11_SIZE, 0x00000008\r
- 2483                  .set CYREG_PHUB_CFGMEM11_CFG0, 0x40007658\r
- 2484                  .set CYREG_PHUB_CFGMEM11_CFG1, 0x4000765c\r
- 2485                  .set CYDEV_PHUB_CFGMEM12_BASE, 0x40007660\r
- 2486                  .set CYDEV_PHUB_CFGMEM12_SIZE, 0x00000008\r
- 2487                  .set CYREG_PHUB_CFGMEM12_CFG0, 0x40007660\r
- 2488                  .set CYREG_PHUB_CFGMEM12_CFG1, 0x40007664\r
- 2489                  .set CYDEV_PHUB_CFGMEM13_BASE, 0x40007668\r
- 2490                  .set CYDEV_PHUB_CFGMEM13_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 139\r
-\r
-\r
- 2491                  .set CYREG_PHUB_CFGMEM13_CFG0, 0x40007668\r
- 2492                  .set CYREG_PHUB_CFGMEM13_CFG1, 0x4000766c\r
- 2493                  .set CYDEV_PHUB_CFGMEM14_BASE, 0x40007670\r
- 2494                  .set CYDEV_PHUB_CFGMEM14_SIZE, 0x00000008\r
- 2495                  .set CYREG_PHUB_CFGMEM14_CFG0, 0x40007670\r
- 2496                  .set CYREG_PHUB_CFGMEM14_CFG1, 0x40007674\r
- 2497                  .set CYDEV_PHUB_CFGMEM15_BASE, 0x40007678\r
- 2498                  .set CYDEV_PHUB_CFGMEM15_SIZE, 0x00000008\r
- 2499                  .set CYREG_PHUB_CFGMEM15_CFG0, 0x40007678\r
- 2500                  .set CYREG_PHUB_CFGMEM15_CFG1, 0x4000767c\r
- 2501                  .set CYDEV_PHUB_CFGMEM16_BASE, 0x40007680\r
- 2502                  .set CYDEV_PHUB_CFGMEM16_SIZE, 0x00000008\r
- 2503                  .set CYREG_PHUB_CFGMEM16_CFG0, 0x40007680\r
- 2504                  .set CYREG_PHUB_CFGMEM16_CFG1, 0x40007684\r
- 2505                  .set CYDEV_PHUB_CFGMEM17_BASE, 0x40007688\r
- 2506                  .set CYDEV_PHUB_CFGMEM17_SIZE, 0x00000008\r
- 2507                  .set CYREG_PHUB_CFGMEM17_CFG0, 0x40007688\r
- 2508                  .set CYREG_PHUB_CFGMEM17_CFG1, 0x4000768c\r
- 2509                  .set CYDEV_PHUB_CFGMEM18_BASE, 0x40007690\r
- 2510                  .set CYDEV_PHUB_CFGMEM18_SIZE, 0x00000008\r
- 2511                  .set CYREG_PHUB_CFGMEM18_CFG0, 0x40007690\r
- 2512                  .set CYREG_PHUB_CFGMEM18_CFG1, 0x40007694\r
- 2513                  .set CYDEV_PHUB_CFGMEM19_BASE, 0x40007698\r
- 2514                  .set CYDEV_PHUB_CFGMEM19_SIZE, 0x00000008\r
- 2515                  .set CYREG_PHUB_CFGMEM19_CFG0, 0x40007698\r
- 2516                  .set CYREG_PHUB_CFGMEM19_CFG1, 0x4000769c\r
- 2517                  .set CYDEV_PHUB_CFGMEM20_BASE, 0x400076a0\r
- 2518                  .set CYDEV_PHUB_CFGMEM20_SIZE, 0x00000008\r
- 2519                  .set CYREG_PHUB_CFGMEM20_CFG0, 0x400076a0\r
- 2520                  .set CYREG_PHUB_CFGMEM20_CFG1, 0x400076a4\r
- 2521                  .set CYDEV_PHUB_CFGMEM21_BASE, 0x400076a8\r
- 2522                  .set CYDEV_PHUB_CFGMEM21_SIZE, 0x00000008\r
- 2523                  .set CYREG_PHUB_CFGMEM21_CFG0, 0x400076a8\r
- 2524                  .set CYREG_PHUB_CFGMEM21_CFG1, 0x400076ac\r
- 2525                  .set CYDEV_PHUB_CFGMEM22_BASE, 0x400076b0\r
- 2526                  .set CYDEV_PHUB_CFGMEM22_SIZE, 0x00000008\r
- 2527                  .set CYREG_PHUB_CFGMEM22_CFG0, 0x400076b0\r
- 2528                  .set CYREG_PHUB_CFGMEM22_CFG1, 0x400076b4\r
- 2529                  .set CYDEV_PHUB_CFGMEM23_BASE, 0x400076b8\r
- 2530                  .set CYDEV_PHUB_CFGMEM23_SIZE, 0x00000008\r
- 2531                  .set CYREG_PHUB_CFGMEM23_CFG0, 0x400076b8\r
- 2532                  .set CYREG_PHUB_CFGMEM23_CFG1, 0x400076bc\r
- 2533                  .set CYDEV_PHUB_TDMEM0_BASE, 0x40007800\r
- 2534                  .set CYDEV_PHUB_TDMEM0_SIZE, 0x00000008\r
- 2535                  .set CYREG_PHUB_TDMEM0_ORIG_TD0, 0x40007800\r
- 2536                  .set CYREG_PHUB_TDMEM0_ORIG_TD1, 0x40007804\r
- 2537                  .set CYDEV_PHUB_TDMEM1_BASE, 0x40007808\r
- 2538                  .set CYDEV_PHUB_TDMEM1_SIZE, 0x00000008\r
- 2539                  .set CYREG_PHUB_TDMEM1_ORIG_TD0, 0x40007808\r
- 2540                  .set CYREG_PHUB_TDMEM1_ORIG_TD1, 0x4000780c\r
- 2541                  .set CYDEV_PHUB_TDMEM2_BASE, 0x40007810\r
- 2542                  .set CYDEV_PHUB_TDMEM2_SIZE, 0x00000008\r
- 2543                  .set CYREG_PHUB_TDMEM2_ORIG_TD0, 0x40007810\r
- 2544                  .set CYREG_PHUB_TDMEM2_ORIG_TD1, 0x40007814\r
- 2545                  .set CYDEV_PHUB_TDMEM3_BASE, 0x40007818\r
- 2546                  .set CYDEV_PHUB_TDMEM3_SIZE, 0x00000008\r
- 2547                  .set CYREG_PHUB_TDMEM3_ORIG_TD0, 0x40007818\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 140\r
-\r
-\r
- 2548                  .set CYREG_PHUB_TDMEM3_ORIG_TD1, 0x4000781c\r
- 2549                  .set CYDEV_PHUB_TDMEM4_BASE, 0x40007820\r
- 2550                  .set CYDEV_PHUB_TDMEM4_SIZE, 0x00000008\r
- 2551                  .set CYREG_PHUB_TDMEM4_ORIG_TD0, 0x40007820\r
- 2552                  .set CYREG_PHUB_TDMEM4_ORIG_TD1, 0x40007824\r
- 2553                  .set CYDEV_PHUB_TDMEM5_BASE, 0x40007828\r
- 2554                  .set CYDEV_PHUB_TDMEM5_SIZE, 0x00000008\r
- 2555                  .set CYREG_PHUB_TDMEM5_ORIG_TD0, 0x40007828\r
- 2556                  .set CYREG_PHUB_TDMEM5_ORIG_TD1, 0x4000782c\r
- 2557                  .set CYDEV_PHUB_TDMEM6_BASE, 0x40007830\r
- 2558                  .set CYDEV_PHUB_TDMEM6_SIZE, 0x00000008\r
- 2559                  .set CYREG_PHUB_TDMEM6_ORIG_TD0, 0x40007830\r
- 2560                  .set CYREG_PHUB_TDMEM6_ORIG_TD1, 0x40007834\r
- 2561                  .set CYDEV_PHUB_TDMEM7_BASE, 0x40007838\r
- 2562                  .set CYDEV_PHUB_TDMEM7_SIZE, 0x00000008\r
- 2563                  .set CYREG_PHUB_TDMEM7_ORIG_TD0, 0x40007838\r
- 2564                  .set CYREG_PHUB_TDMEM7_ORIG_TD1, 0x4000783c\r
- 2565                  .set CYDEV_PHUB_TDMEM8_BASE, 0x40007840\r
- 2566                  .set CYDEV_PHUB_TDMEM8_SIZE, 0x00000008\r
- 2567                  .set CYREG_PHUB_TDMEM8_ORIG_TD0, 0x40007840\r
- 2568                  .set CYREG_PHUB_TDMEM8_ORIG_TD1, 0x40007844\r
- 2569                  .set CYDEV_PHUB_TDMEM9_BASE, 0x40007848\r
- 2570                  .set CYDEV_PHUB_TDMEM9_SIZE, 0x00000008\r
- 2571                  .set CYREG_PHUB_TDMEM9_ORIG_TD0, 0x40007848\r
- 2572                  .set CYREG_PHUB_TDMEM9_ORIG_TD1, 0x4000784c\r
- 2573                  .set CYDEV_PHUB_TDMEM10_BASE, 0x40007850\r
- 2574                  .set CYDEV_PHUB_TDMEM10_SIZE, 0x00000008\r
- 2575                  .set CYREG_PHUB_TDMEM10_ORIG_TD0, 0x40007850\r
- 2576                  .set CYREG_PHUB_TDMEM10_ORIG_TD1, 0x40007854\r
- 2577                  .set CYDEV_PHUB_TDMEM11_BASE, 0x40007858\r
- 2578                  .set CYDEV_PHUB_TDMEM11_SIZE, 0x00000008\r
- 2579                  .set CYREG_PHUB_TDMEM11_ORIG_TD0, 0x40007858\r
- 2580                  .set CYREG_PHUB_TDMEM11_ORIG_TD1, 0x4000785c\r
- 2581                  .set CYDEV_PHUB_TDMEM12_BASE, 0x40007860\r
- 2582                  .set CYDEV_PHUB_TDMEM12_SIZE, 0x00000008\r
- 2583                  .set CYREG_PHUB_TDMEM12_ORIG_TD0, 0x40007860\r
- 2584                  .set CYREG_PHUB_TDMEM12_ORIG_TD1, 0x40007864\r
- 2585                  .set CYDEV_PHUB_TDMEM13_BASE, 0x40007868\r
- 2586                  .set CYDEV_PHUB_TDMEM13_SIZE, 0x00000008\r
- 2587                  .set CYREG_PHUB_TDMEM13_ORIG_TD0, 0x40007868\r
- 2588                  .set CYREG_PHUB_TDMEM13_ORIG_TD1, 0x4000786c\r
- 2589                  .set CYDEV_PHUB_TDMEM14_BASE, 0x40007870\r
- 2590                  .set CYDEV_PHUB_TDMEM14_SIZE, 0x00000008\r
- 2591                  .set CYREG_PHUB_TDMEM14_ORIG_TD0, 0x40007870\r
- 2592                  .set CYREG_PHUB_TDMEM14_ORIG_TD1, 0x40007874\r
- 2593                  .set CYDEV_PHUB_TDMEM15_BASE, 0x40007878\r
- 2594                  .set CYDEV_PHUB_TDMEM15_SIZE, 0x00000008\r
- 2595                  .set CYREG_PHUB_TDMEM15_ORIG_TD0, 0x40007878\r
- 2596                  .set CYREG_PHUB_TDMEM15_ORIG_TD1, 0x4000787c\r
- 2597                  .set CYDEV_PHUB_TDMEM16_BASE, 0x40007880\r
- 2598                  .set CYDEV_PHUB_TDMEM16_SIZE, 0x00000008\r
- 2599                  .set CYREG_PHUB_TDMEM16_ORIG_TD0, 0x40007880\r
- 2600                  .set CYREG_PHUB_TDMEM16_ORIG_TD1, 0x40007884\r
- 2601                  .set CYDEV_PHUB_TDMEM17_BASE, 0x40007888\r
- 2602                  .set CYDEV_PHUB_TDMEM17_SIZE, 0x00000008\r
- 2603                  .set CYREG_PHUB_TDMEM17_ORIG_TD0, 0x40007888\r
- 2604                  .set CYREG_PHUB_TDMEM17_ORIG_TD1, 0x4000788c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 141\r
-\r
-\r
- 2605                  .set CYDEV_PHUB_TDMEM18_BASE, 0x40007890\r
- 2606                  .set CYDEV_PHUB_TDMEM18_SIZE, 0x00000008\r
- 2607                  .set CYREG_PHUB_TDMEM18_ORIG_TD0, 0x40007890\r
- 2608                  .set CYREG_PHUB_TDMEM18_ORIG_TD1, 0x40007894\r
- 2609                  .set CYDEV_PHUB_TDMEM19_BASE, 0x40007898\r
- 2610                  .set CYDEV_PHUB_TDMEM19_SIZE, 0x00000008\r
- 2611                  .set CYREG_PHUB_TDMEM19_ORIG_TD0, 0x40007898\r
- 2612                  .set CYREG_PHUB_TDMEM19_ORIG_TD1, 0x4000789c\r
- 2613                  .set CYDEV_PHUB_TDMEM20_BASE, 0x400078a0\r
- 2614                  .set CYDEV_PHUB_TDMEM20_SIZE, 0x00000008\r
- 2615                  .set CYREG_PHUB_TDMEM20_ORIG_TD0, 0x400078a0\r
- 2616                  .set CYREG_PHUB_TDMEM20_ORIG_TD1, 0x400078a4\r
- 2617                  .set CYDEV_PHUB_TDMEM21_BASE, 0x400078a8\r
- 2618                  .set CYDEV_PHUB_TDMEM21_SIZE, 0x00000008\r
- 2619                  .set CYREG_PHUB_TDMEM21_ORIG_TD0, 0x400078a8\r
- 2620                  .set CYREG_PHUB_TDMEM21_ORIG_TD1, 0x400078ac\r
- 2621                  .set CYDEV_PHUB_TDMEM22_BASE, 0x400078b0\r
- 2622                  .set CYDEV_PHUB_TDMEM22_SIZE, 0x00000008\r
- 2623                  .set CYREG_PHUB_TDMEM22_ORIG_TD0, 0x400078b0\r
- 2624                  .set CYREG_PHUB_TDMEM22_ORIG_TD1, 0x400078b4\r
- 2625                  .set CYDEV_PHUB_TDMEM23_BASE, 0x400078b8\r
- 2626                  .set CYDEV_PHUB_TDMEM23_SIZE, 0x00000008\r
- 2627                  .set CYREG_PHUB_TDMEM23_ORIG_TD0, 0x400078b8\r
- 2628                  .set CYREG_PHUB_TDMEM23_ORIG_TD1, 0x400078bc\r
- 2629                  .set CYDEV_PHUB_TDMEM24_BASE, 0x400078c0\r
- 2630                  .set CYDEV_PHUB_TDMEM24_SIZE, 0x00000008\r
- 2631                  .set CYREG_PHUB_TDMEM24_ORIG_TD0, 0x400078c0\r
- 2632                  .set CYREG_PHUB_TDMEM24_ORIG_TD1, 0x400078c4\r
- 2633                  .set CYDEV_PHUB_TDMEM25_BASE, 0x400078c8\r
- 2634                  .set CYDEV_PHUB_TDMEM25_SIZE, 0x00000008\r
- 2635                  .set CYREG_PHUB_TDMEM25_ORIG_TD0, 0x400078c8\r
- 2636                  .set CYREG_PHUB_TDMEM25_ORIG_TD1, 0x400078cc\r
- 2637                  .set CYDEV_PHUB_TDMEM26_BASE, 0x400078d0\r
- 2638                  .set CYDEV_PHUB_TDMEM26_SIZE, 0x00000008\r
- 2639                  .set CYREG_PHUB_TDMEM26_ORIG_TD0, 0x400078d0\r
- 2640                  .set CYREG_PHUB_TDMEM26_ORIG_TD1, 0x400078d4\r
- 2641                  .set CYDEV_PHUB_TDMEM27_BASE, 0x400078d8\r
- 2642                  .set CYDEV_PHUB_TDMEM27_SIZE, 0x00000008\r
- 2643                  .set CYREG_PHUB_TDMEM27_ORIG_TD0, 0x400078d8\r
- 2644                  .set CYREG_PHUB_TDMEM27_ORIG_TD1, 0x400078dc\r
- 2645                  .set CYDEV_PHUB_TDMEM28_BASE, 0x400078e0\r
- 2646                  .set CYDEV_PHUB_TDMEM28_SIZE, 0x00000008\r
- 2647                  .set CYREG_PHUB_TDMEM28_ORIG_TD0, 0x400078e0\r
- 2648                  .set CYREG_PHUB_TDMEM28_ORIG_TD1, 0x400078e4\r
- 2649                  .set CYDEV_PHUB_TDMEM29_BASE, 0x400078e8\r
- 2650                  .set CYDEV_PHUB_TDMEM29_SIZE, 0x00000008\r
- 2651                  .set CYREG_PHUB_TDMEM29_ORIG_TD0, 0x400078e8\r
- 2652                  .set CYREG_PHUB_TDMEM29_ORIG_TD1, 0x400078ec\r
- 2653                  .set CYDEV_PHUB_TDMEM30_BASE, 0x400078f0\r
- 2654                  .set CYDEV_PHUB_TDMEM30_SIZE, 0x00000008\r
- 2655                  .set CYREG_PHUB_TDMEM30_ORIG_TD0, 0x400078f0\r
- 2656                  .set CYREG_PHUB_TDMEM30_ORIG_TD1, 0x400078f4\r
- 2657                  .set CYDEV_PHUB_TDMEM31_BASE, 0x400078f8\r
- 2658                  .set CYDEV_PHUB_TDMEM31_SIZE, 0x00000008\r
- 2659                  .set CYREG_PHUB_TDMEM31_ORIG_TD0, 0x400078f8\r
- 2660                  .set CYREG_PHUB_TDMEM31_ORIG_TD1, 0x400078fc\r
- 2661                  .set CYDEV_PHUB_TDMEM32_BASE, 0x40007900\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 142\r
-\r
-\r
- 2662                  .set CYDEV_PHUB_TDMEM32_SIZE, 0x00000008\r
- 2663                  .set CYREG_PHUB_TDMEM32_ORIG_TD0, 0x40007900\r
- 2664                  .set CYREG_PHUB_TDMEM32_ORIG_TD1, 0x40007904\r
- 2665                  .set CYDEV_PHUB_TDMEM33_BASE, 0x40007908\r
- 2666                  .set CYDEV_PHUB_TDMEM33_SIZE, 0x00000008\r
- 2667                  .set CYREG_PHUB_TDMEM33_ORIG_TD0, 0x40007908\r
- 2668                  .set CYREG_PHUB_TDMEM33_ORIG_TD1, 0x4000790c\r
- 2669                  .set CYDEV_PHUB_TDMEM34_BASE, 0x40007910\r
- 2670                  .set CYDEV_PHUB_TDMEM34_SIZE, 0x00000008\r
- 2671                  .set CYREG_PHUB_TDMEM34_ORIG_TD0, 0x40007910\r
- 2672                  .set CYREG_PHUB_TDMEM34_ORIG_TD1, 0x40007914\r
- 2673                  .set CYDEV_PHUB_TDMEM35_BASE, 0x40007918\r
- 2674                  .set CYDEV_PHUB_TDMEM35_SIZE, 0x00000008\r
- 2675                  .set CYREG_PHUB_TDMEM35_ORIG_TD0, 0x40007918\r
- 2676                  .set CYREG_PHUB_TDMEM35_ORIG_TD1, 0x4000791c\r
- 2677                  .set CYDEV_PHUB_TDMEM36_BASE, 0x40007920\r
- 2678                  .set CYDEV_PHUB_TDMEM36_SIZE, 0x00000008\r
- 2679                  .set CYREG_PHUB_TDMEM36_ORIG_TD0, 0x40007920\r
- 2680                  .set CYREG_PHUB_TDMEM36_ORIG_TD1, 0x40007924\r
- 2681                  .set CYDEV_PHUB_TDMEM37_BASE, 0x40007928\r
- 2682                  .set CYDEV_PHUB_TDMEM37_SIZE, 0x00000008\r
- 2683                  .set CYREG_PHUB_TDMEM37_ORIG_TD0, 0x40007928\r
- 2684                  .set CYREG_PHUB_TDMEM37_ORIG_TD1, 0x4000792c\r
- 2685                  .set CYDEV_PHUB_TDMEM38_BASE, 0x40007930\r
- 2686                  .set CYDEV_PHUB_TDMEM38_SIZE, 0x00000008\r
- 2687                  .set CYREG_PHUB_TDMEM38_ORIG_TD0, 0x40007930\r
- 2688                  .set CYREG_PHUB_TDMEM38_ORIG_TD1, 0x40007934\r
- 2689                  .set CYDEV_PHUB_TDMEM39_BASE, 0x40007938\r
- 2690                  .set CYDEV_PHUB_TDMEM39_SIZE, 0x00000008\r
- 2691                  .set CYREG_PHUB_TDMEM39_ORIG_TD0, 0x40007938\r
- 2692                  .set CYREG_PHUB_TDMEM39_ORIG_TD1, 0x4000793c\r
- 2693                  .set CYDEV_PHUB_TDMEM40_BASE, 0x40007940\r
- 2694                  .set CYDEV_PHUB_TDMEM40_SIZE, 0x00000008\r
- 2695                  .set CYREG_PHUB_TDMEM40_ORIG_TD0, 0x40007940\r
- 2696                  .set CYREG_PHUB_TDMEM40_ORIG_TD1, 0x40007944\r
- 2697                  .set CYDEV_PHUB_TDMEM41_BASE, 0x40007948\r
- 2698                  .set CYDEV_PHUB_TDMEM41_SIZE, 0x00000008\r
- 2699                  .set CYREG_PHUB_TDMEM41_ORIG_TD0, 0x40007948\r
- 2700                  .set CYREG_PHUB_TDMEM41_ORIG_TD1, 0x4000794c\r
- 2701                  .set CYDEV_PHUB_TDMEM42_BASE, 0x40007950\r
- 2702                  .set CYDEV_PHUB_TDMEM42_SIZE, 0x00000008\r
- 2703                  .set CYREG_PHUB_TDMEM42_ORIG_TD0, 0x40007950\r
- 2704                  .set CYREG_PHUB_TDMEM42_ORIG_TD1, 0x40007954\r
- 2705                  .set CYDEV_PHUB_TDMEM43_BASE, 0x40007958\r
- 2706                  .set CYDEV_PHUB_TDMEM43_SIZE, 0x00000008\r
- 2707                  .set CYREG_PHUB_TDMEM43_ORIG_TD0, 0x40007958\r
- 2708                  .set CYREG_PHUB_TDMEM43_ORIG_TD1, 0x4000795c\r
- 2709                  .set CYDEV_PHUB_TDMEM44_BASE, 0x40007960\r
- 2710                  .set CYDEV_PHUB_TDMEM44_SIZE, 0x00000008\r
- 2711                  .set CYREG_PHUB_TDMEM44_ORIG_TD0, 0x40007960\r
- 2712                  .set CYREG_PHUB_TDMEM44_ORIG_TD1, 0x40007964\r
- 2713                  .set CYDEV_PHUB_TDMEM45_BASE, 0x40007968\r
- 2714                  .set CYDEV_PHUB_TDMEM45_SIZE, 0x00000008\r
- 2715                  .set CYREG_PHUB_TDMEM45_ORIG_TD0, 0x40007968\r
- 2716                  .set CYREG_PHUB_TDMEM45_ORIG_TD1, 0x4000796c\r
- 2717                  .set CYDEV_PHUB_TDMEM46_BASE, 0x40007970\r
- 2718                  .set CYDEV_PHUB_TDMEM46_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 143\r
-\r
-\r
- 2719                  .set CYREG_PHUB_TDMEM46_ORIG_TD0, 0x40007970\r
- 2720                  .set CYREG_PHUB_TDMEM46_ORIG_TD1, 0x40007974\r
- 2721                  .set CYDEV_PHUB_TDMEM47_BASE, 0x40007978\r
- 2722                  .set CYDEV_PHUB_TDMEM47_SIZE, 0x00000008\r
- 2723                  .set CYREG_PHUB_TDMEM47_ORIG_TD0, 0x40007978\r
- 2724                  .set CYREG_PHUB_TDMEM47_ORIG_TD1, 0x4000797c\r
- 2725                  .set CYDEV_PHUB_TDMEM48_BASE, 0x40007980\r
- 2726                  .set CYDEV_PHUB_TDMEM48_SIZE, 0x00000008\r
- 2727                  .set CYREG_PHUB_TDMEM48_ORIG_TD0, 0x40007980\r
- 2728                  .set CYREG_PHUB_TDMEM48_ORIG_TD1, 0x40007984\r
- 2729                  .set CYDEV_PHUB_TDMEM49_BASE, 0x40007988\r
- 2730                  .set CYDEV_PHUB_TDMEM49_SIZE, 0x00000008\r
- 2731                  .set CYREG_PHUB_TDMEM49_ORIG_TD0, 0x40007988\r
- 2732                  .set CYREG_PHUB_TDMEM49_ORIG_TD1, 0x4000798c\r
- 2733                  .set CYDEV_PHUB_TDMEM50_BASE, 0x40007990\r
- 2734                  .set CYDEV_PHUB_TDMEM50_SIZE, 0x00000008\r
- 2735                  .set CYREG_PHUB_TDMEM50_ORIG_TD0, 0x40007990\r
- 2736                  .set CYREG_PHUB_TDMEM50_ORIG_TD1, 0x40007994\r
- 2737                  .set CYDEV_PHUB_TDMEM51_BASE, 0x40007998\r
- 2738                  .set CYDEV_PHUB_TDMEM51_SIZE, 0x00000008\r
- 2739                  .set CYREG_PHUB_TDMEM51_ORIG_TD0, 0x40007998\r
- 2740                  .set CYREG_PHUB_TDMEM51_ORIG_TD1, 0x4000799c\r
- 2741                  .set CYDEV_PHUB_TDMEM52_BASE, 0x400079a0\r
- 2742                  .set CYDEV_PHUB_TDMEM52_SIZE, 0x00000008\r
- 2743                  .set CYREG_PHUB_TDMEM52_ORIG_TD0, 0x400079a0\r
- 2744                  .set CYREG_PHUB_TDMEM52_ORIG_TD1, 0x400079a4\r
- 2745                  .set CYDEV_PHUB_TDMEM53_BASE, 0x400079a8\r
- 2746                  .set CYDEV_PHUB_TDMEM53_SIZE, 0x00000008\r
- 2747                  .set CYREG_PHUB_TDMEM53_ORIG_TD0, 0x400079a8\r
- 2748                  .set CYREG_PHUB_TDMEM53_ORIG_TD1, 0x400079ac\r
- 2749                  .set CYDEV_PHUB_TDMEM54_BASE, 0x400079b0\r
- 2750                  .set CYDEV_PHUB_TDMEM54_SIZE, 0x00000008\r
- 2751                  .set CYREG_PHUB_TDMEM54_ORIG_TD0, 0x400079b0\r
- 2752                  .set CYREG_PHUB_TDMEM54_ORIG_TD1, 0x400079b4\r
- 2753                  .set CYDEV_PHUB_TDMEM55_BASE, 0x400079b8\r
- 2754                  .set CYDEV_PHUB_TDMEM55_SIZE, 0x00000008\r
- 2755                  .set CYREG_PHUB_TDMEM55_ORIG_TD0, 0x400079b8\r
- 2756                  .set CYREG_PHUB_TDMEM55_ORIG_TD1, 0x400079bc\r
- 2757                  .set CYDEV_PHUB_TDMEM56_BASE, 0x400079c0\r
- 2758                  .set CYDEV_PHUB_TDMEM56_SIZE, 0x00000008\r
- 2759                  .set CYREG_PHUB_TDMEM56_ORIG_TD0, 0x400079c0\r
- 2760                  .set CYREG_PHUB_TDMEM56_ORIG_TD1, 0x400079c4\r
- 2761                  .set CYDEV_PHUB_TDMEM57_BASE, 0x400079c8\r
- 2762                  .set CYDEV_PHUB_TDMEM57_SIZE, 0x00000008\r
- 2763                  .set CYREG_PHUB_TDMEM57_ORIG_TD0, 0x400079c8\r
- 2764                  .set CYREG_PHUB_TDMEM57_ORIG_TD1, 0x400079cc\r
- 2765                  .set CYDEV_PHUB_TDMEM58_BASE, 0x400079d0\r
- 2766                  .set CYDEV_PHUB_TDMEM58_SIZE, 0x00000008\r
- 2767                  .set CYREG_PHUB_TDMEM58_ORIG_TD0, 0x400079d0\r
- 2768                  .set CYREG_PHUB_TDMEM58_ORIG_TD1, 0x400079d4\r
- 2769                  .set CYDEV_PHUB_TDMEM59_BASE, 0x400079d8\r
- 2770                  .set CYDEV_PHUB_TDMEM59_SIZE, 0x00000008\r
- 2771                  .set CYREG_PHUB_TDMEM59_ORIG_TD0, 0x400079d8\r
- 2772                  .set CYREG_PHUB_TDMEM59_ORIG_TD1, 0x400079dc\r
- 2773                  .set CYDEV_PHUB_TDMEM60_BASE, 0x400079e0\r
- 2774                  .set CYDEV_PHUB_TDMEM60_SIZE, 0x00000008\r
- 2775                  .set CYREG_PHUB_TDMEM60_ORIG_TD0, 0x400079e0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 144\r
-\r
-\r
- 2776                  .set CYREG_PHUB_TDMEM60_ORIG_TD1, 0x400079e4\r
- 2777                  .set CYDEV_PHUB_TDMEM61_BASE, 0x400079e8\r
- 2778                  .set CYDEV_PHUB_TDMEM61_SIZE, 0x00000008\r
- 2779                  .set CYREG_PHUB_TDMEM61_ORIG_TD0, 0x400079e8\r
- 2780                  .set CYREG_PHUB_TDMEM61_ORIG_TD1, 0x400079ec\r
- 2781                  .set CYDEV_PHUB_TDMEM62_BASE, 0x400079f0\r
- 2782                  .set CYDEV_PHUB_TDMEM62_SIZE, 0x00000008\r
- 2783                  .set CYREG_PHUB_TDMEM62_ORIG_TD0, 0x400079f0\r
- 2784                  .set CYREG_PHUB_TDMEM62_ORIG_TD1, 0x400079f4\r
- 2785                  .set CYDEV_PHUB_TDMEM63_BASE, 0x400079f8\r
- 2786                  .set CYDEV_PHUB_TDMEM63_SIZE, 0x00000008\r
- 2787                  .set CYREG_PHUB_TDMEM63_ORIG_TD0, 0x400079f8\r
- 2788                  .set CYREG_PHUB_TDMEM63_ORIG_TD1, 0x400079fc\r
- 2789                  .set CYDEV_PHUB_TDMEM64_BASE, 0x40007a00\r
- 2790                  .set CYDEV_PHUB_TDMEM64_SIZE, 0x00000008\r
- 2791                  .set CYREG_PHUB_TDMEM64_ORIG_TD0, 0x40007a00\r
- 2792                  .set CYREG_PHUB_TDMEM64_ORIG_TD1, 0x40007a04\r
- 2793                  .set CYDEV_PHUB_TDMEM65_BASE, 0x40007a08\r
- 2794                  .set CYDEV_PHUB_TDMEM65_SIZE, 0x00000008\r
- 2795                  .set CYREG_PHUB_TDMEM65_ORIG_TD0, 0x40007a08\r
- 2796                  .set CYREG_PHUB_TDMEM65_ORIG_TD1, 0x40007a0c\r
- 2797                  .set CYDEV_PHUB_TDMEM66_BASE, 0x40007a10\r
- 2798                  .set CYDEV_PHUB_TDMEM66_SIZE, 0x00000008\r
- 2799                  .set CYREG_PHUB_TDMEM66_ORIG_TD0, 0x40007a10\r
- 2800                  .set CYREG_PHUB_TDMEM66_ORIG_TD1, 0x40007a14\r
- 2801                  .set CYDEV_PHUB_TDMEM67_BASE, 0x40007a18\r
- 2802                  .set CYDEV_PHUB_TDMEM67_SIZE, 0x00000008\r
- 2803                  .set CYREG_PHUB_TDMEM67_ORIG_TD0, 0x40007a18\r
- 2804                  .set CYREG_PHUB_TDMEM67_ORIG_TD1, 0x40007a1c\r
- 2805                  .set CYDEV_PHUB_TDMEM68_BASE, 0x40007a20\r
- 2806                  .set CYDEV_PHUB_TDMEM68_SIZE, 0x00000008\r
- 2807                  .set CYREG_PHUB_TDMEM68_ORIG_TD0, 0x40007a20\r
- 2808                  .set CYREG_PHUB_TDMEM68_ORIG_TD1, 0x40007a24\r
- 2809                  .set CYDEV_PHUB_TDMEM69_BASE, 0x40007a28\r
- 2810                  .set CYDEV_PHUB_TDMEM69_SIZE, 0x00000008\r
- 2811                  .set CYREG_PHUB_TDMEM69_ORIG_TD0, 0x40007a28\r
- 2812                  .set CYREG_PHUB_TDMEM69_ORIG_TD1, 0x40007a2c\r
- 2813                  .set CYDEV_PHUB_TDMEM70_BASE, 0x40007a30\r
- 2814                  .set CYDEV_PHUB_TDMEM70_SIZE, 0x00000008\r
- 2815                  .set CYREG_PHUB_TDMEM70_ORIG_TD0, 0x40007a30\r
- 2816                  .set CYREG_PHUB_TDMEM70_ORIG_TD1, 0x40007a34\r
- 2817                  .set CYDEV_PHUB_TDMEM71_BASE, 0x40007a38\r
- 2818                  .set CYDEV_PHUB_TDMEM71_SIZE, 0x00000008\r
- 2819                  .set CYREG_PHUB_TDMEM71_ORIG_TD0, 0x40007a38\r
- 2820                  .set CYREG_PHUB_TDMEM71_ORIG_TD1, 0x40007a3c\r
- 2821                  .set CYDEV_PHUB_TDMEM72_BASE, 0x40007a40\r
- 2822                  .set CYDEV_PHUB_TDMEM72_SIZE, 0x00000008\r
- 2823                  .set CYREG_PHUB_TDMEM72_ORIG_TD0, 0x40007a40\r
- 2824                  .set CYREG_PHUB_TDMEM72_ORIG_TD1, 0x40007a44\r
- 2825                  .set CYDEV_PHUB_TDMEM73_BASE, 0x40007a48\r
- 2826                  .set CYDEV_PHUB_TDMEM73_SIZE, 0x00000008\r
- 2827                  .set CYREG_PHUB_TDMEM73_ORIG_TD0, 0x40007a48\r
- 2828                  .set CYREG_PHUB_TDMEM73_ORIG_TD1, 0x40007a4c\r
- 2829                  .set CYDEV_PHUB_TDMEM74_BASE, 0x40007a50\r
- 2830                  .set CYDEV_PHUB_TDMEM74_SIZE, 0x00000008\r
- 2831                  .set CYREG_PHUB_TDMEM74_ORIG_TD0, 0x40007a50\r
- 2832                  .set CYREG_PHUB_TDMEM74_ORIG_TD1, 0x40007a54\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 145\r
-\r
-\r
- 2833                  .set CYDEV_PHUB_TDMEM75_BASE, 0x40007a58\r
- 2834                  .set CYDEV_PHUB_TDMEM75_SIZE, 0x00000008\r
- 2835                  .set CYREG_PHUB_TDMEM75_ORIG_TD0, 0x40007a58\r
- 2836                  .set CYREG_PHUB_TDMEM75_ORIG_TD1, 0x40007a5c\r
- 2837                  .set CYDEV_PHUB_TDMEM76_BASE, 0x40007a60\r
- 2838                  .set CYDEV_PHUB_TDMEM76_SIZE, 0x00000008\r
- 2839                  .set CYREG_PHUB_TDMEM76_ORIG_TD0, 0x40007a60\r
- 2840                  .set CYREG_PHUB_TDMEM76_ORIG_TD1, 0x40007a64\r
- 2841                  .set CYDEV_PHUB_TDMEM77_BASE, 0x40007a68\r
- 2842                  .set CYDEV_PHUB_TDMEM77_SIZE, 0x00000008\r
- 2843                  .set CYREG_PHUB_TDMEM77_ORIG_TD0, 0x40007a68\r
- 2844                  .set CYREG_PHUB_TDMEM77_ORIG_TD1, 0x40007a6c\r
- 2845                  .set CYDEV_PHUB_TDMEM78_BASE, 0x40007a70\r
- 2846                  .set CYDEV_PHUB_TDMEM78_SIZE, 0x00000008\r
- 2847                  .set CYREG_PHUB_TDMEM78_ORIG_TD0, 0x40007a70\r
- 2848                  .set CYREG_PHUB_TDMEM78_ORIG_TD1, 0x40007a74\r
- 2849                  .set CYDEV_PHUB_TDMEM79_BASE, 0x40007a78\r
- 2850                  .set CYDEV_PHUB_TDMEM79_SIZE, 0x00000008\r
- 2851                  .set CYREG_PHUB_TDMEM79_ORIG_TD0, 0x40007a78\r
- 2852                  .set CYREG_PHUB_TDMEM79_ORIG_TD1, 0x40007a7c\r
- 2853                  .set CYDEV_PHUB_TDMEM80_BASE, 0x40007a80\r
- 2854                  .set CYDEV_PHUB_TDMEM80_SIZE, 0x00000008\r
- 2855                  .set CYREG_PHUB_TDMEM80_ORIG_TD0, 0x40007a80\r
- 2856                  .set CYREG_PHUB_TDMEM80_ORIG_TD1, 0x40007a84\r
- 2857                  .set CYDEV_PHUB_TDMEM81_BASE, 0x40007a88\r
- 2858                  .set CYDEV_PHUB_TDMEM81_SIZE, 0x00000008\r
- 2859                  .set CYREG_PHUB_TDMEM81_ORIG_TD0, 0x40007a88\r
- 2860                  .set CYREG_PHUB_TDMEM81_ORIG_TD1, 0x40007a8c\r
- 2861                  .set CYDEV_PHUB_TDMEM82_BASE, 0x40007a90\r
- 2862                  .set CYDEV_PHUB_TDMEM82_SIZE, 0x00000008\r
- 2863                  .set CYREG_PHUB_TDMEM82_ORIG_TD0, 0x40007a90\r
- 2864                  .set CYREG_PHUB_TDMEM82_ORIG_TD1, 0x40007a94\r
- 2865                  .set CYDEV_PHUB_TDMEM83_BASE, 0x40007a98\r
- 2866                  .set CYDEV_PHUB_TDMEM83_SIZE, 0x00000008\r
- 2867                  .set CYREG_PHUB_TDMEM83_ORIG_TD0, 0x40007a98\r
- 2868                  .set CYREG_PHUB_TDMEM83_ORIG_TD1, 0x40007a9c\r
- 2869                  .set CYDEV_PHUB_TDMEM84_BASE, 0x40007aa0\r
- 2870                  .set CYDEV_PHUB_TDMEM84_SIZE, 0x00000008\r
- 2871                  .set CYREG_PHUB_TDMEM84_ORIG_TD0, 0x40007aa0\r
- 2872                  .set CYREG_PHUB_TDMEM84_ORIG_TD1, 0x40007aa4\r
- 2873                  .set CYDEV_PHUB_TDMEM85_BASE, 0x40007aa8\r
- 2874                  .set CYDEV_PHUB_TDMEM85_SIZE, 0x00000008\r
- 2875                  .set CYREG_PHUB_TDMEM85_ORIG_TD0, 0x40007aa8\r
- 2876                  .set CYREG_PHUB_TDMEM85_ORIG_TD1, 0x40007aac\r
- 2877                  .set CYDEV_PHUB_TDMEM86_BASE, 0x40007ab0\r
- 2878                  .set CYDEV_PHUB_TDMEM86_SIZE, 0x00000008\r
- 2879                  .set CYREG_PHUB_TDMEM86_ORIG_TD0, 0x40007ab0\r
- 2880                  .set CYREG_PHUB_TDMEM86_ORIG_TD1, 0x40007ab4\r
- 2881                  .set CYDEV_PHUB_TDMEM87_BASE, 0x40007ab8\r
- 2882                  .set CYDEV_PHUB_TDMEM87_SIZE, 0x00000008\r
- 2883                  .set CYREG_PHUB_TDMEM87_ORIG_TD0, 0x40007ab8\r
- 2884                  .set CYREG_PHUB_TDMEM87_ORIG_TD1, 0x40007abc\r
- 2885                  .set CYDEV_PHUB_TDMEM88_BASE, 0x40007ac0\r
- 2886                  .set CYDEV_PHUB_TDMEM88_SIZE, 0x00000008\r
- 2887                  .set CYREG_PHUB_TDMEM88_ORIG_TD0, 0x40007ac0\r
- 2888                  .set CYREG_PHUB_TDMEM88_ORIG_TD1, 0x40007ac4\r
- 2889                  .set CYDEV_PHUB_TDMEM89_BASE, 0x40007ac8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 146\r
-\r
-\r
- 2890                  .set CYDEV_PHUB_TDMEM89_SIZE, 0x00000008\r
- 2891                  .set CYREG_PHUB_TDMEM89_ORIG_TD0, 0x40007ac8\r
- 2892                  .set CYREG_PHUB_TDMEM89_ORIG_TD1, 0x40007acc\r
- 2893                  .set CYDEV_PHUB_TDMEM90_BASE, 0x40007ad0\r
- 2894                  .set CYDEV_PHUB_TDMEM90_SIZE, 0x00000008\r
- 2895                  .set CYREG_PHUB_TDMEM90_ORIG_TD0, 0x40007ad0\r
- 2896                  .set CYREG_PHUB_TDMEM90_ORIG_TD1, 0x40007ad4\r
- 2897                  .set CYDEV_PHUB_TDMEM91_BASE, 0x40007ad8\r
- 2898                  .set CYDEV_PHUB_TDMEM91_SIZE, 0x00000008\r
- 2899                  .set CYREG_PHUB_TDMEM91_ORIG_TD0, 0x40007ad8\r
- 2900                  .set CYREG_PHUB_TDMEM91_ORIG_TD1, 0x40007adc\r
- 2901                  .set CYDEV_PHUB_TDMEM92_BASE, 0x40007ae0\r
- 2902                  .set CYDEV_PHUB_TDMEM92_SIZE, 0x00000008\r
- 2903                  .set CYREG_PHUB_TDMEM92_ORIG_TD0, 0x40007ae0\r
- 2904                  .set CYREG_PHUB_TDMEM92_ORIG_TD1, 0x40007ae4\r
- 2905                  .set CYDEV_PHUB_TDMEM93_BASE, 0x40007ae8\r
- 2906                  .set CYDEV_PHUB_TDMEM93_SIZE, 0x00000008\r
- 2907                  .set CYREG_PHUB_TDMEM93_ORIG_TD0, 0x40007ae8\r
- 2908                  .set CYREG_PHUB_TDMEM93_ORIG_TD1, 0x40007aec\r
- 2909                  .set CYDEV_PHUB_TDMEM94_BASE, 0x40007af0\r
- 2910                  .set CYDEV_PHUB_TDMEM94_SIZE, 0x00000008\r
- 2911                  .set CYREG_PHUB_TDMEM94_ORIG_TD0, 0x40007af0\r
- 2912                  .set CYREG_PHUB_TDMEM94_ORIG_TD1, 0x40007af4\r
- 2913                  .set CYDEV_PHUB_TDMEM95_BASE, 0x40007af8\r
- 2914                  .set CYDEV_PHUB_TDMEM95_SIZE, 0x00000008\r
- 2915                  .set CYREG_PHUB_TDMEM95_ORIG_TD0, 0x40007af8\r
- 2916                  .set CYREG_PHUB_TDMEM95_ORIG_TD1, 0x40007afc\r
- 2917                  .set CYDEV_PHUB_TDMEM96_BASE, 0x40007b00\r
- 2918                  .set CYDEV_PHUB_TDMEM96_SIZE, 0x00000008\r
- 2919                  .set CYREG_PHUB_TDMEM96_ORIG_TD0, 0x40007b00\r
- 2920                  .set CYREG_PHUB_TDMEM96_ORIG_TD1, 0x40007b04\r
- 2921                  .set CYDEV_PHUB_TDMEM97_BASE, 0x40007b08\r
- 2922                  .set CYDEV_PHUB_TDMEM97_SIZE, 0x00000008\r
- 2923                  .set CYREG_PHUB_TDMEM97_ORIG_TD0, 0x40007b08\r
- 2924                  .set CYREG_PHUB_TDMEM97_ORIG_TD1, 0x40007b0c\r
- 2925                  .set CYDEV_PHUB_TDMEM98_BASE, 0x40007b10\r
- 2926                  .set CYDEV_PHUB_TDMEM98_SIZE, 0x00000008\r
- 2927                  .set CYREG_PHUB_TDMEM98_ORIG_TD0, 0x40007b10\r
- 2928                  .set CYREG_PHUB_TDMEM98_ORIG_TD1, 0x40007b14\r
- 2929                  .set CYDEV_PHUB_TDMEM99_BASE, 0x40007b18\r
- 2930                  .set CYDEV_PHUB_TDMEM99_SIZE, 0x00000008\r
- 2931                  .set CYREG_PHUB_TDMEM99_ORIG_TD0, 0x40007b18\r
- 2932                  .set CYREG_PHUB_TDMEM99_ORIG_TD1, 0x40007b1c\r
- 2933                  .set CYDEV_PHUB_TDMEM100_BASE, 0x40007b20\r
- 2934                  .set CYDEV_PHUB_TDMEM100_SIZE, 0x00000008\r
- 2935                  .set CYREG_PHUB_TDMEM100_ORIG_TD0, 0x40007b20\r
- 2936                  .set CYREG_PHUB_TDMEM100_ORIG_TD1, 0x40007b24\r
- 2937                  .set CYDEV_PHUB_TDMEM101_BASE, 0x40007b28\r
- 2938                  .set CYDEV_PHUB_TDMEM101_SIZE, 0x00000008\r
- 2939                  .set CYREG_PHUB_TDMEM101_ORIG_TD0, 0x40007b28\r
- 2940                  .set CYREG_PHUB_TDMEM101_ORIG_TD1, 0x40007b2c\r
- 2941                  .set CYDEV_PHUB_TDMEM102_BASE, 0x40007b30\r
- 2942                  .set CYDEV_PHUB_TDMEM102_SIZE, 0x00000008\r
- 2943                  .set CYREG_PHUB_TDMEM102_ORIG_TD0, 0x40007b30\r
- 2944                  .set CYREG_PHUB_TDMEM102_ORIG_TD1, 0x40007b34\r
- 2945                  .set CYDEV_PHUB_TDMEM103_BASE, 0x40007b38\r
- 2946                  .set CYDEV_PHUB_TDMEM103_SIZE, 0x00000008\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 147\r
-\r
-\r
- 2947                  .set CYREG_PHUB_TDMEM103_ORIG_TD0, 0x40007b38\r
- 2948                  .set CYREG_PHUB_TDMEM103_ORIG_TD1, 0x40007b3c\r
- 2949                  .set CYDEV_PHUB_TDMEM104_BASE, 0x40007b40\r
- 2950                  .set CYDEV_PHUB_TDMEM104_SIZE, 0x00000008\r
- 2951                  .set CYREG_PHUB_TDMEM104_ORIG_TD0, 0x40007b40\r
- 2952                  .set CYREG_PHUB_TDMEM104_ORIG_TD1, 0x40007b44\r
- 2953                  .set CYDEV_PHUB_TDMEM105_BASE, 0x40007b48\r
- 2954                  .set CYDEV_PHUB_TDMEM105_SIZE, 0x00000008\r
- 2955                  .set CYREG_PHUB_TDMEM105_ORIG_TD0, 0x40007b48\r
- 2956                  .set CYREG_PHUB_TDMEM105_ORIG_TD1, 0x40007b4c\r
- 2957                  .set CYDEV_PHUB_TDMEM106_BASE, 0x40007b50\r
- 2958                  .set CYDEV_PHUB_TDMEM106_SIZE, 0x00000008\r
- 2959                  .set CYREG_PHUB_TDMEM106_ORIG_TD0, 0x40007b50\r
- 2960                  .set CYREG_PHUB_TDMEM106_ORIG_TD1, 0x40007b54\r
- 2961                  .set CYDEV_PHUB_TDMEM107_BASE, 0x40007b58\r
- 2962                  .set CYDEV_PHUB_TDMEM107_SIZE, 0x00000008\r
- 2963                  .set CYREG_PHUB_TDMEM107_ORIG_TD0, 0x40007b58\r
- 2964                  .set CYREG_PHUB_TDMEM107_ORIG_TD1, 0x40007b5c\r
- 2965                  .set CYDEV_PHUB_TDMEM108_BASE, 0x40007b60\r
- 2966                  .set CYDEV_PHUB_TDMEM108_SIZE, 0x00000008\r
- 2967                  .set CYREG_PHUB_TDMEM108_ORIG_TD0, 0x40007b60\r
- 2968                  .set CYREG_PHUB_TDMEM108_ORIG_TD1, 0x40007b64\r
- 2969                  .set CYDEV_PHUB_TDMEM109_BASE, 0x40007b68\r
- 2970                  .set CYDEV_PHUB_TDMEM109_SIZE, 0x00000008\r
- 2971                  .set CYREG_PHUB_TDMEM109_ORIG_TD0, 0x40007b68\r
- 2972                  .set CYREG_PHUB_TDMEM109_ORIG_TD1, 0x40007b6c\r
- 2973                  .set CYDEV_PHUB_TDMEM110_BASE, 0x40007b70\r
- 2974                  .set CYDEV_PHUB_TDMEM110_SIZE, 0x00000008\r
- 2975                  .set CYREG_PHUB_TDMEM110_ORIG_TD0, 0x40007b70\r
- 2976                  .set CYREG_PHUB_TDMEM110_ORIG_TD1, 0x40007b74\r
- 2977                  .set CYDEV_PHUB_TDMEM111_BASE, 0x40007b78\r
- 2978                  .set CYDEV_PHUB_TDMEM111_SIZE, 0x00000008\r
- 2979                  .set CYREG_PHUB_TDMEM111_ORIG_TD0, 0x40007b78\r
- 2980                  .set CYREG_PHUB_TDMEM111_ORIG_TD1, 0x40007b7c\r
- 2981                  .set CYDEV_PHUB_TDMEM112_BASE, 0x40007b80\r
- 2982                  .set CYDEV_PHUB_TDMEM112_SIZE, 0x00000008\r
- 2983                  .set CYREG_PHUB_TDMEM112_ORIG_TD0, 0x40007b80\r
- 2984                  .set CYREG_PHUB_TDMEM112_ORIG_TD1, 0x40007b84\r
- 2985                  .set CYDEV_PHUB_TDMEM113_BASE, 0x40007b88\r
- 2986                  .set CYDEV_PHUB_TDMEM113_SIZE, 0x00000008\r
- 2987                  .set CYREG_PHUB_TDMEM113_ORIG_TD0, 0x40007b88\r
- 2988                  .set CYREG_PHUB_TDMEM113_ORIG_TD1, 0x40007b8c\r
- 2989                  .set CYDEV_PHUB_TDMEM114_BASE, 0x40007b90\r
- 2990                  .set CYDEV_PHUB_TDMEM114_SIZE, 0x00000008\r
- 2991                  .set CYREG_PHUB_TDMEM114_ORIG_TD0, 0x40007b90\r
- 2992                  .set CYREG_PHUB_TDMEM114_ORIG_TD1, 0x40007b94\r
- 2993                  .set CYDEV_PHUB_TDMEM115_BASE, 0x40007b98\r
- 2994                  .set CYDEV_PHUB_TDMEM115_SIZE, 0x00000008\r
- 2995                  .set CYREG_PHUB_TDMEM115_ORIG_TD0, 0x40007b98\r
- 2996                  .set CYREG_PHUB_TDMEM115_ORIG_TD1, 0x40007b9c\r
- 2997                  .set CYDEV_PHUB_TDMEM116_BASE, 0x40007ba0\r
- 2998                  .set CYDEV_PHUB_TDMEM116_SIZE, 0x00000008\r
- 2999                  .set CYREG_PHUB_TDMEM116_ORIG_TD0, 0x40007ba0\r
- 3000                  .set CYREG_PHUB_TDMEM116_ORIG_TD1, 0x40007ba4\r
- 3001                  .set CYDEV_PHUB_TDMEM117_BASE, 0x40007ba8\r
- 3002                  .set CYDEV_PHUB_TDMEM117_SIZE, 0x00000008\r
- 3003                  .set CYREG_PHUB_TDMEM117_ORIG_TD0, 0x40007ba8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 148\r
-\r
-\r
- 3004                  .set CYREG_PHUB_TDMEM117_ORIG_TD1, 0x40007bac\r
- 3005                  .set CYDEV_PHUB_TDMEM118_BASE, 0x40007bb0\r
- 3006                  .set CYDEV_PHUB_TDMEM118_SIZE, 0x00000008\r
- 3007                  .set CYREG_PHUB_TDMEM118_ORIG_TD0, 0x40007bb0\r
- 3008                  .set CYREG_PHUB_TDMEM118_ORIG_TD1, 0x40007bb4\r
- 3009                  .set CYDEV_PHUB_TDMEM119_BASE, 0x40007bb8\r
- 3010                  .set CYDEV_PHUB_TDMEM119_SIZE, 0x00000008\r
- 3011                  .set CYREG_PHUB_TDMEM119_ORIG_TD0, 0x40007bb8\r
- 3012                  .set CYREG_PHUB_TDMEM119_ORIG_TD1, 0x40007bbc\r
- 3013                  .set CYDEV_PHUB_TDMEM120_BASE, 0x40007bc0\r
- 3014                  .set CYDEV_PHUB_TDMEM120_SIZE, 0x00000008\r
- 3015                  .set CYREG_PHUB_TDMEM120_ORIG_TD0, 0x40007bc0\r
- 3016                  .set CYREG_PHUB_TDMEM120_ORIG_TD1, 0x40007bc4\r
- 3017                  .set CYDEV_PHUB_TDMEM121_BASE, 0x40007bc8\r
- 3018                  .set CYDEV_PHUB_TDMEM121_SIZE, 0x00000008\r
- 3019                  .set CYREG_PHUB_TDMEM121_ORIG_TD0, 0x40007bc8\r
- 3020                  .set CYREG_PHUB_TDMEM121_ORIG_TD1, 0x40007bcc\r
- 3021                  .set CYDEV_PHUB_TDMEM122_BASE, 0x40007bd0\r
- 3022                  .set CYDEV_PHUB_TDMEM122_SIZE, 0x00000008\r
- 3023                  .set CYREG_PHUB_TDMEM122_ORIG_TD0, 0x40007bd0\r
- 3024                  .set CYREG_PHUB_TDMEM122_ORIG_TD1, 0x40007bd4\r
- 3025                  .set CYDEV_PHUB_TDMEM123_BASE, 0x40007bd8\r
- 3026                  .set CYDEV_PHUB_TDMEM123_SIZE, 0x00000008\r
- 3027                  .set CYREG_PHUB_TDMEM123_ORIG_TD0, 0x40007bd8\r
- 3028                  .set CYREG_PHUB_TDMEM123_ORIG_TD1, 0x40007bdc\r
- 3029                  .set CYDEV_PHUB_TDMEM124_BASE, 0x40007be0\r
- 3030                  .set CYDEV_PHUB_TDMEM124_SIZE, 0x00000008\r
- 3031                  .set CYREG_PHUB_TDMEM124_ORIG_TD0, 0x40007be0\r
- 3032                  .set CYREG_PHUB_TDMEM124_ORIG_TD1, 0x40007be4\r
- 3033                  .set CYDEV_PHUB_TDMEM125_BASE, 0x40007be8\r
- 3034                  .set CYDEV_PHUB_TDMEM125_SIZE, 0x00000008\r
- 3035                  .set CYREG_PHUB_TDMEM125_ORIG_TD0, 0x40007be8\r
- 3036                  .set CYREG_PHUB_TDMEM125_ORIG_TD1, 0x40007bec\r
- 3037                  .set CYDEV_PHUB_TDMEM126_BASE, 0x40007bf0\r
- 3038                  .set CYDEV_PHUB_TDMEM126_SIZE, 0x00000008\r
- 3039                  .set CYREG_PHUB_TDMEM126_ORIG_TD0, 0x40007bf0\r
- 3040                  .set CYREG_PHUB_TDMEM126_ORIG_TD1, 0x40007bf4\r
- 3041                  .set CYDEV_PHUB_TDMEM127_BASE, 0x40007bf8\r
- 3042                  .set CYDEV_PHUB_TDMEM127_SIZE, 0x00000008\r
- 3043                  .set CYREG_PHUB_TDMEM127_ORIG_TD0, 0x40007bf8\r
- 3044                  .set CYREG_PHUB_TDMEM127_ORIG_TD1, 0x40007bfc\r
- 3045                  .set CYDEV_EE_BASE, 0x40008000\r
- 3046                  .set CYDEV_EE_SIZE, 0x00000800\r
- 3047                  .set CYREG_EE_DATA_MBASE, 0x40008000\r
- 3048                  .set CYREG_EE_DATA_MSIZE, 0x00000800\r
- 3049                  .set CYDEV_CAN0_BASE, 0x4000a000\r
- 3050                  .set CYDEV_CAN0_SIZE, 0x000002a0\r
- 3051                  .set CYDEV_CAN0_CSR_BASE, 0x4000a000\r
- 3052                  .set CYDEV_CAN0_CSR_SIZE, 0x00000018\r
- 3053                  .set CYREG_CAN0_CSR_INT_SR, 0x4000a000\r
- 3054                  .set CYREG_CAN0_CSR_INT_EN, 0x4000a004\r
- 3055                  .set CYREG_CAN0_CSR_BUF_SR, 0x4000a008\r
- 3056                  .set CYREG_CAN0_CSR_ERR_SR, 0x4000a00c\r
- 3057                  .set CYREG_CAN0_CSR_CMD, 0x4000a010\r
- 3058                  .set CYREG_CAN0_CSR_CFG, 0x4000a014\r
- 3059                  .set CYDEV_CAN0_TX0_BASE, 0x4000a020\r
- 3060                  .set CYDEV_CAN0_TX0_SIZE, 0x00000010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 149\r
-\r
-\r
- 3061                  .set CYREG_CAN0_TX0_CMD, 0x4000a020\r
- 3062                  .set CYREG_CAN0_TX0_ID, 0x4000a024\r
- 3063                  .set CYREG_CAN0_TX0_DH, 0x4000a028\r
- 3064                  .set CYREG_CAN0_TX0_DL, 0x4000a02c\r
- 3065                  .set CYDEV_CAN0_TX1_BASE, 0x4000a030\r
- 3066                  .set CYDEV_CAN0_TX1_SIZE, 0x00000010\r
- 3067                  .set CYREG_CAN0_TX1_CMD, 0x4000a030\r
- 3068                  .set CYREG_CAN0_TX1_ID, 0x4000a034\r
- 3069                  .set CYREG_CAN0_TX1_DH, 0x4000a038\r
- 3070                  .set CYREG_CAN0_TX1_DL, 0x4000a03c\r
- 3071                  .set CYDEV_CAN0_TX2_BASE, 0x4000a040\r
- 3072                  .set CYDEV_CAN0_TX2_SIZE, 0x00000010\r
- 3073                  .set CYREG_CAN0_TX2_CMD, 0x4000a040\r
- 3074                  .set CYREG_CAN0_TX2_ID, 0x4000a044\r
- 3075                  .set CYREG_CAN0_TX2_DH, 0x4000a048\r
- 3076                  .set CYREG_CAN0_TX2_DL, 0x4000a04c\r
- 3077                  .set CYDEV_CAN0_TX3_BASE, 0x4000a050\r
- 3078                  .set CYDEV_CAN0_TX3_SIZE, 0x00000010\r
- 3079                  .set CYREG_CAN0_TX3_CMD, 0x4000a050\r
- 3080                  .set CYREG_CAN0_TX3_ID, 0x4000a054\r
- 3081                  .set CYREG_CAN0_TX3_DH, 0x4000a058\r
- 3082                  .set CYREG_CAN0_TX3_DL, 0x4000a05c\r
- 3083                  .set CYDEV_CAN0_TX4_BASE, 0x4000a060\r
- 3084                  .set CYDEV_CAN0_TX4_SIZE, 0x00000010\r
- 3085                  .set CYREG_CAN0_TX4_CMD, 0x4000a060\r
- 3086                  .set CYREG_CAN0_TX4_ID, 0x4000a064\r
- 3087                  .set CYREG_CAN0_TX4_DH, 0x4000a068\r
- 3088                  .set CYREG_CAN0_TX4_DL, 0x4000a06c\r
- 3089                  .set CYDEV_CAN0_TX5_BASE, 0x4000a070\r
- 3090                  .set CYDEV_CAN0_TX5_SIZE, 0x00000010\r
- 3091                  .set CYREG_CAN0_TX5_CMD, 0x4000a070\r
- 3092                  .set CYREG_CAN0_TX5_ID, 0x4000a074\r
- 3093                  .set CYREG_CAN0_TX5_DH, 0x4000a078\r
- 3094                  .set CYREG_CAN0_TX5_DL, 0x4000a07c\r
- 3095                  .set CYDEV_CAN0_TX6_BASE, 0x4000a080\r
- 3096                  .set CYDEV_CAN0_TX6_SIZE, 0x00000010\r
- 3097                  .set CYREG_CAN0_TX6_CMD, 0x4000a080\r
- 3098                  .set CYREG_CAN0_TX6_ID, 0x4000a084\r
- 3099                  .set CYREG_CAN0_TX6_DH, 0x4000a088\r
- 3100                  .set CYREG_CAN0_TX6_DL, 0x4000a08c\r
- 3101                  .set CYDEV_CAN0_TX7_BASE, 0x4000a090\r
- 3102                  .set CYDEV_CAN0_TX7_SIZE, 0x00000010\r
- 3103                  .set CYREG_CAN0_TX7_CMD, 0x4000a090\r
- 3104                  .set CYREG_CAN0_TX7_ID, 0x4000a094\r
- 3105                  .set CYREG_CAN0_TX7_DH, 0x4000a098\r
- 3106                  .set CYREG_CAN0_TX7_DL, 0x4000a09c\r
- 3107                  .set CYDEV_CAN0_RX0_BASE, 0x4000a0a0\r
- 3108                  .set CYDEV_CAN0_RX0_SIZE, 0x00000020\r
- 3109                  .set CYREG_CAN0_RX0_CMD, 0x4000a0a0\r
- 3110                  .set CYREG_CAN0_RX0_ID, 0x4000a0a4\r
- 3111                  .set CYREG_CAN0_RX0_DH, 0x4000a0a8\r
- 3112                  .set CYREG_CAN0_RX0_DL, 0x4000a0ac\r
- 3113                  .set CYREG_CAN0_RX0_AMR, 0x4000a0b0\r
- 3114                  .set CYREG_CAN0_RX0_ACR, 0x4000a0b4\r
- 3115                  .set CYREG_CAN0_RX0_AMRD, 0x4000a0b8\r
- 3116                  .set CYREG_CAN0_RX0_ACRD, 0x4000a0bc\r
- 3117                  .set CYDEV_CAN0_RX1_BASE, 0x4000a0c0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 150\r
-\r
-\r
- 3118                  .set CYDEV_CAN0_RX1_SIZE, 0x00000020\r
- 3119                  .set CYREG_CAN0_RX1_CMD, 0x4000a0c0\r
- 3120                  .set CYREG_CAN0_RX1_ID, 0x4000a0c4\r
- 3121                  .set CYREG_CAN0_RX1_DH, 0x4000a0c8\r
- 3122                  .set CYREG_CAN0_RX1_DL, 0x4000a0cc\r
- 3123                  .set CYREG_CAN0_RX1_AMR, 0x4000a0d0\r
- 3124                  .set CYREG_CAN0_RX1_ACR, 0x4000a0d4\r
- 3125                  .set CYREG_CAN0_RX1_AMRD, 0x4000a0d8\r
- 3126                  .set CYREG_CAN0_RX1_ACRD, 0x4000a0dc\r
- 3127                  .set CYDEV_CAN0_RX2_BASE, 0x4000a0e0\r
- 3128                  .set CYDEV_CAN0_RX2_SIZE, 0x00000020\r
- 3129                  .set CYREG_CAN0_RX2_CMD, 0x4000a0e0\r
- 3130                  .set CYREG_CAN0_RX2_ID, 0x4000a0e4\r
- 3131                  .set CYREG_CAN0_RX2_DH, 0x4000a0e8\r
- 3132                  .set CYREG_CAN0_RX2_DL, 0x4000a0ec\r
- 3133                  .set CYREG_CAN0_RX2_AMR, 0x4000a0f0\r
- 3134                  .set CYREG_CAN0_RX2_ACR, 0x4000a0f4\r
- 3135                  .set CYREG_CAN0_RX2_AMRD, 0x4000a0f8\r
- 3136                  .set CYREG_CAN0_RX2_ACRD, 0x4000a0fc\r
- 3137                  .set CYDEV_CAN0_RX3_BASE, 0x4000a100\r
- 3138                  .set CYDEV_CAN0_RX3_SIZE, 0x00000020\r
- 3139                  .set CYREG_CAN0_RX3_CMD, 0x4000a100\r
- 3140                  .set CYREG_CAN0_RX3_ID, 0x4000a104\r
- 3141                  .set CYREG_CAN0_RX3_DH, 0x4000a108\r
- 3142                  .set CYREG_CAN0_RX3_DL, 0x4000a10c\r
- 3143                  .set CYREG_CAN0_RX3_AMR, 0x4000a110\r
- 3144                  .set CYREG_CAN0_RX3_ACR, 0x4000a114\r
- 3145                  .set CYREG_CAN0_RX3_AMRD, 0x4000a118\r
- 3146                  .set CYREG_CAN0_RX3_ACRD, 0x4000a11c\r
- 3147                  .set CYDEV_CAN0_RX4_BASE, 0x4000a120\r
- 3148                  .set CYDEV_CAN0_RX4_SIZE, 0x00000020\r
- 3149                  .set CYREG_CAN0_RX4_CMD, 0x4000a120\r
- 3150                  .set CYREG_CAN0_RX4_ID, 0x4000a124\r
- 3151                  .set CYREG_CAN0_RX4_DH, 0x4000a128\r
- 3152                  .set CYREG_CAN0_RX4_DL, 0x4000a12c\r
- 3153                  .set CYREG_CAN0_RX4_AMR, 0x4000a130\r
- 3154                  .set CYREG_CAN0_RX4_ACR, 0x4000a134\r
- 3155                  .set CYREG_CAN0_RX4_AMRD, 0x4000a138\r
- 3156                  .set CYREG_CAN0_RX4_ACRD, 0x4000a13c\r
- 3157                  .set CYDEV_CAN0_RX5_BASE, 0x4000a140\r
- 3158                  .set CYDEV_CAN0_RX5_SIZE, 0x00000020\r
- 3159                  .set CYREG_CAN0_RX5_CMD, 0x4000a140\r
- 3160                  .set CYREG_CAN0_RX5_ID, 0x4000a144\r
- 3161                  .set CYREG_CAN0_RX5_DH, 0x4000a148\r
- 3162                  .set CYREG_CAN0_RX5_DL, 0x4000a14c\r
- 3163                  .set CYREG_CAN0_RX5_AMR, 0x4000a150\r
- 3164                  .set CYREG_CAN0_RX5_ACR, 0x4000a154\r
- 3165                  .set CYREG_CAN0_RX5_AMRD, 0x4000a158\r
- 3166                  .set CYREG_CAN0_RX5_ACRD, 0x4000a15c\r
- 3167                  .set CYDEV_CAN0_RX6_BASE, 0x4000a160\r
- 3168                  .set CYDEV_CAN0_RX6_SIZE, 0x00000020\r
- 3169                  .set CYREG_CAN0_RX6_CMD, 0x4000a160\r
- 3170                  .set CYREG_CAN0_RX6_ID, 0x4000a164\r
- 3171                  .set CYREG_CAN0_RX6_DH, 0x4000a168\r
- 3172                  .set CYREG_CAN0_RX6_DL, 0x4000a16c\r
- 3173                  .set CYREG_CAN0_RX6_AMR, 0x4000a170\r
- 3174                  .set CYREG_CAN0_RX6_ACR, 0x4000a174\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 151\r
-\r
-\r
- 3175                  .set CYREG_CAN0_RX6_AMRD, 0x4000a178\r
- 3176                  .set CYREG_CAN0_RX6_ACRD, 0x4000a17c\r
- 3177                  .set CYDEV_CAN0_RX7_BASE, 0x4000a180\r
- 3178                  .set CYDEV_CAN0_RX7_SIZE, 0x00000020\r
- 3179                  .set CYREG_CAN0_RX7_CMD, 0x4000a180\r
- 3180                  .set CYREG_CAN0_RX7_ID, 0x4000a184\r
- 3181                  .set CYREG_CAN0_RX7_DH, 0x4000a188\r
- 3182                  .set CYREG_CAN0_RX7_DL, 0x4000a18c\r
- 3183                  .set CYREG_CAN0_RX7_AMR, 0x4000a190\r
- 3184                  .set CYREG_CAN0_RX7_ACR, 0x4000a194\r
- 3185                  .set CYREG_CAN0_RX7_AMRD, 0x4000a198\r
- 3186                  .set CYREG_CAN0_RX7_ACRD, 0x4000a19c\r
- 3187                  .set CYDEV_CAN0_RX8_BASE, 0x4000a1a0\r
- 3188                  .set CYDEV_CAN0_RX8_SIZE, 0x00000020\r
- 3189                  .set CYREG_CAN0_RX8_CMD, 0x4000a1a0\r
- 3190                  .set CYREG_CAN0_RX8_ID, 0x4000a1a4\r
- 3191                  .set CYREG_CAN0_RX8_DH, 0x4000a1a8\r
- 3192                  .set CYREG_CAN0_RX8_DL, 0x4000a1ac\r
- 3193                  .set CYREG_CAN0_RX8_AMR, 0x4000a1b0\r
- 3194                  .set CYREG_CAN0_RX8_ACR, 0x4000a1b4\r
- 3195                  .set CYREG_CAN0_RX8_AMRD, 0x4000a1b8\r
- 3196                  .set CYREG_CAN0_RX8_ACRD, 0x4000a1bc\r
- 3197                  .set CYDEV_CAN0_RX9_BASE, 0x4000a1c0\r
- 3198                  .set CYDEV_CAN0_RX9_SIZE, 0x00000020\r
- 3199                  .set CYREG_CAN0_RX9_CMD, 0x4000a1c0\r
- 3200                  .set CYREG_CAN0_RX9_ID, 0x4000a1c4\r
- 3201                  .set CYREG_CAN0_RX9_DH, 0x4000a1c8\r
- 3202                  .set CYREG_CAN0_RX9_DL, 0x4000a1cc\r
- 3203                  .set CYREG_CAN0_RX9_AMR, 0x4000a1d0\r
- 3204                  .set CYREG_CAN0_RX9_ACR, 0x4000a1d4\r
- 3205                  .set CYREG_CAN0_RX9_AMRD, 0x4000a1d8\r
- 3206                  .set CYREG_CAN0_RX9_ACRD, 0x4000a1dc\r
- 3207                  .set CYDEV_CAN0_RX10_BASE, 0x4000a1e0\r
- 3208                  .set CYDEV_CAN0_RX10_SIZE, 0x00000020\r
- 3209                  .set CYREG_CAN0_RX10_CMD, 0x4000a1e0\r
- 3210                  .set CYREG_CAN0_RX10_ID, 0x4000a1e4\r
- 3211                  .set CYREG_CAN0_RX10_DH, 0x4000a1e8\r
- 3212                  .set CYREG_CAN0_RX10_DL, 0x4000a1ec\r
- 3213                  .set CYREG_CAN0_RX10_AMR, 0x4000a1f0\r
- 3214                  .set CYREG_CAN0_RX10_ACR, 0x4000a1f4\r
- 3215                  .set CYREG_CAN0_RX10_AMRD, 0x4000a1f8\r
- 3216                  .set CYREG_CAN0_RX10_ACRD, 0x4000a1fc\r
- 3217                  .set CYDEV_CAN0_RX11_BASE, 0x4000a200\r
- 3218                  .set CYDEV_CAN0_RX11_SIZE, 0x00000020\r
- 3219                  .set CYREG_CAN0_RX11_CMD, 0x4000a200\r
- 3220                  .set CYREG_CAN0_RX11_ID, 0x4000a204\r
- 3221                  .set CYREG_CAN0_RX11_DH, 0x4000a208\r
- 3222                  .set CYREG_CAN0_RX11_DL, 0x4000a20c\r
- 3223                  .set CYREG_CAN0_RX11_AMR, 0x4000a210\r
- 3224                  .set CYREG_CAN0_RX11_ACR, 0x4000a214\r
- 3225                  .set CYREG_CAN0_RX11_AMRD, 0x4000a218\r
- 3226                  .set CYREG_CAN0_RX11_ACRD, 0x4000a21c\r
- 3227                  .set CYDEV_CAN0_RX12_BASE, 0x4000a220\r
- 3228                  .set CYDEV_CAN0_RX12_SIZE, 0x00000020\r
- 3229                  .set CYREG_CAN0_RX12_CMD, 0x4000a220\r
- 3230                  .set CYREG_CAN0_RX12_ID, 0x4000a224\r
- 3231                  .set CYREG_CAN0_RX12_DH, 0x4000a228\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 152\r
-\r
-\r
- 3232                  .set CYREG_CAN0_RX12_DL, 0x4000a22c\r
- 3233                  .set CYREG_CAN0_RX12_AMR, 0x4000a230\r
- 3234                  .set CYREG_CAN0_RX12_ACR, 0x4000a234\r
- 3235                  .set CYREG_CAN0_RX12_AMRD, 0x4000a238\r
- 3236                  .set CYREG_CAN0_RX12_ACRD, 0x4000a23c\r
- 3237                  .set CYDEV_CAN0_RX13_BASE, 0x4000a240\r
- 3238                  .set CYDEV_CAN0_RX13_SIZE, 0x00000020\r
- 3239                  .set CYREG_CAN0_RX13_CMD, 0x4000a240\r
- 3240                  .set CYREG_CAN0_RX13_ID, 0x4000a244\r
- 3241                  .set CYREG_CAN0_RX13_DH, 0x4000a248\r
- 3242                  .set CYREG_CAN0_RX13_DL, 0x4000a24c\r
- 3243                  .set CYREG_CAN0_RX13_AMR, 0x4000a250\r
- 3244                  .set CYREG_CAN0_RX13_ACR, 0x4000a254\r
- 3245                  .set CYREG_CAN0_RX13_AMRD, 0x4000a258\r
- 3246                  .set CYREG_CAN0_RX13_ACRD, 0x4000a25c\r
- 3247                  .set CYDEV_CAN0_RX14_BASE, 0x4000a260\r
- 3248                  .set CYDEV_CAN0_RX14_SIZE, 0x00000020\r
- 3249                  .set CYREG_CAN0_RX14_CMD, 0x4000a260\r
- 3250                  .set CYREG_CAN0_RX14_ID, 0x4000a264\r
- 3251                  .set CYREG_CAN0_RX14_DH, 0x4000a268\r
- 3252                  .set CYREG_CAN0_RX14_DL, 0x4000a26c\r
- 3253                  .set CYREG_CAN0_RX14_AMR, 0x4000a270\r
- 3254                  .set CYREG_CAN0_RX14_ACR, 0x4000a274\r
- 3255                  .set CYREG_CAN0_RX14_AMRD, 0x4000a278\r
- 3256                  .set CYREG_CAN0_RX14_ACRD, 0x4000a27c\r
- 3257                  .set CYDEV_CAN0_RX15_BASE, 0x4000a280\r
- 3258                  .set CYDEV_CAN0_RX15_SIZE, 0x00000020\r
- 3259                  .set CYREG_CAN0_RX15_CMD, 0x4000a280\r
- 3260                  .set CYREG_CAN0_RX15_ID, 0x4000a284\r
- 3261                  .set CYREG_CAN0_RX15_DH, 0x4000a288\r
- 3262                  .set CYREG_CAN0_RX15_DL, 0x4000a28c\r
- 3263                  .set CYREG_CAN0_RX15_AMR, 0x4000a290\r
- 3264                  .set CYREG_CAN0_RX15_ACR, 0x4000a294\r
- 3265                  .set CYREG_CAN0_RX15_AMRD, 0x4000a298\r
- 3266                  .set CYREG_CAN0_RX15_ACRD, 0x4000a29c\r
- 3267                  .set CYDEV_DFB0_BASE, 0x4000c000\r
- 3268                  .set CYDEV_DFB0_SIZE, 0x000007b5\r
- 3269                  .set CYDEV_DFB0_DPA_SRAM_BASE, 0x4000c000\r
- 3270                  .set CYDEV_DFB0_DPA_SRAM_SIZE, 0x00000200\r
- 3271                  .set CYREG_DFB0_DPA_SRAM_DATA_MBASE, 0x4000c000\r
- 3272                  .set CYREG_DFB0_DPA_SRAM_DATA_MSIZE, 0x00000200\r
- 3273                  .set CYDEV_DFB0_DPB_SRAM_BASE, 0x4000c200\r
- 3274                  .set CYDEV_DFB0_DPB_SRAM_SIZE, 0x00000200\r
- 3275                  .set CYREG_DFB0_DPB_SRAM_DATA_MBASE, 0x4000c200\r
- 3276                  .set CYREG_DFB0_DPB_SRAM_DATA_MSIZE, 0x00000200\r
- 3277                  .set CYDEV_DFB0_CSA_SRAM_BASE, 0x4000c400\r
- 3278                  .set CYDEV_DFB0_CSA_SRAM_SIZE, 0x00000100\r
- 3279                  .set CYREG_DFB0_CSA_SRAM_DATA_MBASE, 0x4000c400\r
- 3280                  .set CYREG_DFB0_CSA_SRAM_DATA_MSIZE, 0x00000100\r
- 3281                  .set CYDEV_DFB0_CSB_SRAM_BASE, 0x4000c500\r
- 3282                  .set CYDEV_DFB0_CSB_SRAM_SIZE, 0x00000100\r
- 3283                  .set CYREG_DFB0_CSB_SRAM_DATA_MBASE, 0x4000c500\r
- 3284                  .set CYREG_DFB0_CSB_SRAM_DATA_MSIZE, 0x00000100\r
- 3285                  .set CYDEV_DFB0_FSM_SRAM_BASE, 0x4000c600\r
- 3286                  .set CYDEV_DFB0_FSM_SRAM_SIZE, 0x00000100\r
- 3287                  .set CYREG_DFB0_FSM_SRAM_DATA_MBASE, 0x4000c600\r
- 3288                  .set CYREG_DFB0_FSM_SRAM_DATA_MSIZE, 0x00000100\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 153\r
-\r
-\r
- 3289                  .set CYDEV_DFB0_ACU_SRAM_BASE, 0x4000c700\r
- 3290                  .set CYDEV_DFB0_ACU_SRAM_SIZE, 0x00000040\r
- 3291                  .set CYREG_DFB0_ACU_SRAM_DATA_MBASE, 0x4000c700\r
- 3292                  .set CYREG_DFB0_ACU_SRAM_DATA_MSIZE, 0x00000040\r
- 3293                  .set CYREG_DFB0_CR, 0x4000c780\r
- 3294                  .set CYREG_DFB0_SR, 0x4000c784\r
- 3295                  .set CYREG_DFB0_RAM_EN, 0x4000c788\r
- 3296                  .set CYREG_DFB0_RAM_DIR, 0x4000c78c\r
- 3297                  .set CYREG_DFB0_SEMA, 0x4000c790\r
- 3298                  .set CYREG_DFB0_DSI_CTRL, 0x4000c794\r
- 3299                  .set CYREG_DFB0_INT_CTRL, 0x4000c798\r
- 3300                  .set CYREG_DFB0_DMA_CTRL, 0x4000c79c\r
- 3301                  .set CYREG_DFB0_STAGEA, 0x4000c7a0\r
- 3302                  .set CYREG_DFB0_STAGEAM, 0x4000c7a1\r
- 3303                  .set CYREG_DFB0_STAGEAH, 0x4000c7a2\r
- 3304                  .set CYREG_DFB0_STAGEB, 0x4000c7a4\r
- 3305                  .set CYREG_DFB0_STAGEBM, 0x4000c7a5\r
- 3306                  .set CYREG_DFB0_STAGEBH, 0x4000c7a6\r
- 3307                  .set CYREG_DFB0_HOLDA, 0x4000c7a8\r
- 3308                  .set CYREG_DFB0_HOLDAM, 0x4000c7a9\r
- 3309                  .set CYREG_DFB0_HOLDAH, 0x4000c7aa\r
- 3310                  .set CYREG_DFB0_HOLDAS, 0x4000c7ab\r
- 3311                  .set CYREG_DFB0_HOLDB, 0x4000c7ac\r
- 3312                  .set CYREG_DFB0_HOLDBM, 0x4000c7ad\r
- 3313                  .set CYREG_DFB0_HOLDBH, 0x4000c7ae\r
- 3314                  .set CYREG_DFB0_HOLDBS, 0x4000c7af\r
- 3315                  .set CYREG_DFB0_COHER, 0x4000c7b0\r
- 3316                  .set CYREG_DFB0_DALIGN, 0x4000c7b4\r
- 3317                  .set CYDEV_UCFG_BASE, 0x40010000\r
- 3318                  .set CYDEV_UCFG_SIZE, 0x00005040\r
- 3319                  .set CYDEV_UCFG_B0_BASE, 0x40010000\r
- 3320                  .set CYDEV_UCFG_B0_SIZE, 0x00000fef\r
- 3321                  .set CYDEV_UCFG_B0_P0_BASE, 0x40010000\r
- 3322                  .set CYDEV_UCFG_B0_P0_SIZE, 0x000001ef\r
- 3323                  .set CYDEV_UCFG_B0_P0_U0_BASE, 0x40010000\r
- 3324                  .set CYDEV_UCFG_B0_P0_U0_SIZE, 0x00000070\r
- 3325                  .set CYREG_B0_P0_U0_PLD_IT0, 0x40010000\r
- 3326                  .set CYREG_B0_P0_U0_PLD_IT1, 0x40010004\r
- 3327                  .set CYREG_B0_P0_U0_PLD_IT2, 0x40010008\r
- 3328                  .set CYREG_B0_P0_U0_PLD_IT3, 0x4001000c\r
- 3329                  .set CYREG_B0_P0_U0_PLD_IT4, 0x40010010\r
- 3330                  .set CYREG_B0_P0_U0_PLD_IT5, 0x40010014\r
- 3331                  .set CYREG_B0_P0_U0_PLD_IT6, 0x40010018\r
- 3332                  .set CYREG_B0_P0_U0_PLD_IT7, 0x4001001c\r
- 3333                  .set CYREG_B0_P0_U0_PLD_IT8, 0x40010020\r
- 3334                  .set CYREG_B0_P0_U0_PLD_IT9, 0x40010024\r
- 3335                  .set CYREG_B0_P0_U0_PLD_IT10, 0x40010028\r
- 3336                  .set CYREG_B0_P0_U0_PLD_IT11, 0x4001002c\r
- 3337                  .set CYREG_B0_P0_U0_PLD_ORT0, 0x40010030\r
- 3338                  .set CYREG_B0_P0_U0_PLD_ORT1, 0x40010032\r
- 3339                  .set CYREG_B0_P0_U0_PLD_ORT2, 0x40010034\r
- 3340                  .set CYREG_B0_P0_U0_PLD_ORT3, 0x40010036\r
- 3341                  .set CYREG_B0_P0_U0_MC_CFG_CEN_CONST, 0x40010038\r
- 3342                  .set CYREG_B0_P0_U0_MC_CFG_XORFB, 0x4001003a\r
- 3343                  .set CYREG_B0_P0_U0_MC_CFG_SET_RESET, 0x4001003c\r
- 3344                  .set CYREG_B0_P0_U0_MC_CFG_BYPASS, 0x4001003e\r
- 3345                  .set CYREG_B0_P0_U0_CFG0, 0x40010040\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 154\r
-\r
-\r
- 3346                  .set CYREG_B0_P0_U0_CFG1, 0x40010041\r
- 3347                  .set CYREG_B0_P0_U0_CFG2, 0x40010042\r
- 3348                  .set CYREG_B0_P0_U0_CFG3, 0x40010043\r
- 3349                  .set CYREG_B0_P0_U0_CFG4, 0x40010044\r
- 3350                  .set CYREG_B0_P0_U0_CFG5, 0x40010045\r
- 3351                  .set CYREG_B0_P0_U0_CFG6, 0x40010046\r
- 3352                  .set CYREG_B0_P0_U0_CFG7, 0x40010047\r
- 3353                  .set CYREG_B0_P0_U0_CFG8, 0x40010048\r
- 3354                  .set CYREG_B0_P0_U0_CFG9, 0x40010049\r
- 3355                  .set CYREG_B0_P0_U0_CFG10, 0x4001004a\r
- 3356                  .set CYREG_B0_P0_U0_CFG11, 0x4001004b\r
- 3357                  .set CYREG_B0_P0_U0_CFG12, 0x4001004c\r
- 3358                  .set CYREG_B0_P0_U0_CFG13, 0x4001004d\r
- 3359                  .set CYREG_B0_P0_U0_CFG14, 0x4001004e\r
- 3360                  .set CYREG_B0_P0_U0_CFG15, 0x4001004f\r
- 3361                  .set CYREG_B0_P0_U0_CFG16, 0x40010050\r
- 3362                  .set CYREG_B0_P0_U0_CFG17, 0x40010051\r
- 3363                  .set CYREG_B0_P0_U0_CFG18, 0x40010052\r
- 3364                  .set CYREG_B0_P0_U0_CFG19, 0x40010053\r
- 3365                  .set CYREG_B0_P0_U0_CFG20, 0x40010054\r
- 3366                  .set CYREG_B0_P0_U0_CFG21, 0x40010055\r
- 3367                  .set CYREG_B0_P0_U0_CFG22, 0x40010056\r
- 3368                  .set CYREG_B0_P0_U0_CFG23, 0x40010057\r
- 3369                  .set CYREG_B0_P0_U0_CFG24, 0x40010058\r
- 3370                  .set CYREG_B0_P0_U0_CFG25, 0x40010059\r
- 3371                  .set CYREG_B0_P0_U0_CFG26, 0x4001005a\r
- 3372                  .set CYREG_B0_P0_U0_CFG27, 0x4001005b\r
- 3373                  .set CYREG_B0_P0_U0_CFG28, 0x4001005c\r
- 3374                  .set CYREG_B0_P0_U0_CFG29, 0x4001005d\r
- 3375                  .set CYREG_B0_P0_U0_CFG30, 0x4001005e\r
- 3376                  .set CYREG_B0_P0_U0_CFG31, 0x4001005f\r
- 3377                  .set CYREG_B0_P0_U0_DCFG0, 0x40010060\r
- 3378                  .set CYREG_B0_P0_U0_DCFG1, 0x40010062\r
- 3379                  .set CYREG_B0_P0_U0_DCFG2, 0x40010064\r
- 3380                  .set CYREG_B0_P0_U0_DCFG3, 0x40010066\r
- 3381                  .set CYREG_B0_P0_U0_DCFG4, 0x40010068\r
- 3382                  .set CYREG_B0_P0_U0_DCFG5, 0x4001006a\r
- 3383                  .set CYREG_B0_P0_U0_DCFG6, 0x4001006c\r
- 3384                  .set CYREG_B0_P0_U0_DCFG7, 0x4001006e\r
- 3385                  .set CYDEV_UCFG_B0_P0_U1_BASE, 0x40010080\r
- 3386                  .set CYDEV_UCFG_B0_P0_U1_SIZE, 0x00000070\r
- 3387                  .set CYREG_B0_P0_U1_PLD_IT0, 0x40010080\r
- 3388                  .set CYREG_B0_P0_U1_PLD_IT1, 0x40010084\r
- 3389                  .set CYREG_B0_P0_U1_PLD_IT2, 0x40010088\r
- 3390                  .set CYREG_B0_P0_U1_PLD_IT3, 0x4001008c\r
- 3391                  .set CYREG_B0_P0_U1_PLD_IT4, 0x40010090\r
- 3392                  .set CYREG_B0_P0_U1_PLD_IT5, 0x40010094\r
- 3393                  .set CYREG_B0_P0_U1_PLD_IT6, 0x40010098\r
- 3394                  .set CYREG_B0_P0_U1_PLD_IT7, 0x4001009c\r
- 3395                  .set CYREG_B0_P0_U1_PLD_IT8, 0x400100a0\r
- 3396                  .set CYREG_B0_P0_U1_PLD_IT9, 0x400100a4\r
- 3397                  .set CYREG_B0_P0_U1_PLD_IT10, 0x400100a8\r
- 3398                  .set CYREG_B0_P0_U1_PLD_IT11, 0x400100ac\r
- 3399                  .set CYREG_B0_P0_U1_PLD_ORT0, 0x400100b0\r
- 3400                  .set CYREG_B0_P0_U1_PLD_ORT1, 0x400100b2\r
- 3401                  .set CYREG_B0_P0_U1_PLD_ORT2, 0x400100b4\r
- 3402                  .set CYREG_B0_P0_U1_PLD_ORT3, 0x400100b6\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 155\r
-\r
-\r
- 3403                  .set CYREG_B0_P0_U1_MC_CFG_CEN_CONST, 0x400100b8\r
- 3404                  .set CYREG_B0_P0_U1_MC_CFG_XORFB, 0x400100ba\r
- 3405                  .set CYREG_B0_P0_U1_MC_CFG_SET_RESET, 0x400100bc\r
- 3406                  .set CYREG_B0_P0_U1_MC_CFG_BYPASS, 0x400100be\r
- 3407                  .set CYREG_B0_P0_U1_CFG0, 0x400100c0\r
- 3408                  .set CYREG_B0_P0_U1_CFG1, 0x400100c1\r
- 3409                  .set CYREG_B0_P0_U1_CFG2, 0x400100c2\r
- 3410                  .set CYREG_B0_P0_U1_CFG3, 0x400100c3\r
- 3411                  .set CYREG_B0_P0_U1_CFG4, 0x400100c4\r
- 3412                  .set CYREG_B0_P0_U1_CFG5, 0x400100c5\r
- 3413                  .set CYREG_B0_P0_U1_CFG6, 0x400100c6\r
- 3414                  .set CYREG_B0_P0_U1_CFG7, 0x400100c7\r
- 3415                  .set CYREG_B0_P0_U1_CFG8, 0x400100c8\r
- 3416                  .set CYREG_B0_P0_U1_CFG9, 0x400100c9\r
- 3417                  .set CYREG_B0_P0_U1_CFG10, 0x400100ca\r
- 3418                  .set CYREG_B0_P0_U1_CFG11, 0x400100cb\r
- 3419                  .set CYREG_B0_P0_U1_CFG12, 0x400100cc\r
- 3420                  .set CYREG_B0_P0_U1_CFG13, 0x400100cd\r
- 3421                  .set CYREG_B0_P0_U1_CFG14, 0x400100ce\r
- 3422                  .set CYREG_B0_P0_U1_CFG15, 0x400100cf\r
- 3423                  .set CYREG_B0_P0_U1_CFG16, 0x400100d0\r
- 3424                  .set CYREG_B0_P0_U1_CFG17, 0x400100d1\r
- 3425                  .set CYREG_B0_P0_U1_CFG18, 0x400100d2\r
- 3426                  .set CYREG_B0_P0_U1_CFG19, 0x400100d3\r
- 3427                  .set CYREG_B0_P0_U1_CFG20, 0x400100d4\r
- 3428                  .set CYREG_B0_P0_U1_CFG21, 0x400100d5\r
- 3429                  .set CYREG_B0_P0_U1_CFG22, 0x400100d6\r
- 3430                  .set CYREG_B0_P0_U1_CFG23, 0x400100d7\r
- 3431                  .set CYREG_B0_P0_U1_CFG24, 0x400100d8\r
- 3432                  .set CYREG_B0_P0_U1_CFG25, 0x400100d9\r
- 3433                  .set CYREG_B0_P0_U1_CFG26, 0x400100da\r
- 3434                  .set CYREG_B0_P0_U1_CFG27, 0x400100db\r
- 3435                  .set CYREG_B0_P0_U1_CFG28, 0x400100dc\r
- 3436                  .set CYREG_B0_P0_U1_CFG29, 0x400100dd\r
- 3437                  .set CYREG_B0_P0_U1_CFG30, 0x400100de\r
- 3438                  .set CYREG_B0_P0_U1_CFG31, 0x400100df\r
- 3439                  .set CYREG_B0_P0_U1_DCFG0, 0x400100e0\r
- 3440                  .set CYREG_B0_P0_U1_DCFG1, 0x400100e2\r
- 3441                  .set CYREG_B0_P0_U1_DCFG2, 0x400100e4\r
- 3442                  .set CYREG_B0_P0_U1_DCFG3, 0x400100e6\r
- 3443                  .set CYREG_B0_P0_U1_DCFG4, 0x400100e8\r
- 3444                  .set CYREG_B0_P0_U1_DCFG5, 0x400100ea\r
- 3445                  .set CYREG_B0_P0_U1_DCFG6, 0x400100ec\r
- 3446                  .set CYREG_B0_P0_U1_DCFG7, 0x400100ee\r
- 3447                  .set CYDEV_UCFG_B0_P0_ROUTE_BASE, 0x40010100\r
- 3448                  .set CYDEV_UCFG_B0_P0_ROUTE_SIZE, 0x000000ef\r
- 3449                  .set CYDEV_UCFG_B0_P1_BASE, 0x40010200\r
- 3450                  .set CYDEV_UCFG_B0_P1_SIZE, 0x000001ef\r
- 3451                  .set CYDEV_UCFG_B0_P1_U0_BASE, 0x40010200\r
- 3452                  .set CYDEV_UCFG_B0_P1_U0_SIZE, 0x00000070\r
- 3453                  .set CYREG_B0_P1_U0_PLD_IT0, 0x40010200\r
- 3454                  .set CYREG_B0_P1_U0_PLD_IT1, 0x40010204\r
- 3455                  .set CYREG_B0_P1_U0_PLD_IT2, 0x40010208\r
- 3456                  .set CYREG_B0_P1_U0_PLD_IT3, 0x4001020c\r
- 3457                  .set CYREG_B0_P1_U0_PLD_IT4, 0x40010210\r
- 3458                  .set CYREG_B0_P1_U0_PLD_IT5, 0x40010214\r
- 3459                  .set CYREG_B0_P1_U0_PLD_IT6, 0x40010218\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 156\r
-\r
-\r
- 3460                  .set CYREG_B0_P1_U0_PLD_IT7, 0x4001021c\r
- 3461                  .set CYREG_B0_P1_U0_PLD_IT8, 0x40010220\r
- 3462                  .set CYREG_B0_P1_U0_PLD_IT9, 0x40010224\r
- 3463                  .set CYREG_B0_P1_U0_PLD_IT10, 0x40010228\r
- 3464                  .set CYREG_B0_P1_U0_PLD_IT11, 0x4001022c\r
- 3465                  .set CYREG_B0_P1_U0_PLD_ORT0, 0x40010230\r
- 3466                  .set CYREG_B0_P1_U0_PLD_ORT1, 0x40010232\r
- 3467                  .set CYREG_B0_P1_U0_PLD_ORT2, 0x40010234\r
- 3468                  .set CYREG_B0_P1_U0_PLD_ORT3, 0x40010236\r
- 3469                  .set CYREG_B0_P1_U0_MC_CFG_CEN_CONST, 0x40010238\r
- 3470                  .set CYREG_B0_P1_U0_MC_CFG_XORFB, 0x4001023a\r
- 3471                  .set CYREG_B0_P1_U0_MC_CFG_SET_RESET, 0x4001023c\r
- 3472                  .set CYREG_B0_P1_U0_MC_CFG_BYPASS, 0x4001023e\r
- 3473                  .set CYREG_B0_P1_U0_CFG0, 0x40010240\r
- 3474                  .set CYREG_B0_P1_U0_CFG1, 0x40010241\r
- 3475                  .set CYREG_B0_P1_U0_CFG2, 0x40010242\r
- 3476                  .set CYREG_B0_P1_U0_CFG3, 0x40010243\r
- 3477                  .set CYREG_B0_P1_U0_CFG4, 0x40010244\r
- 3478                  .set CYREG_B0_P1_U0_CFG5, 0x40010245\r
- 3479                  .set CYREG_B0_P1_U0_CFG6, 0x40010246\r
- 3480                  .set CYREG_B0_P1_U0_CFG7, 0x40010247\r
- 3481                  .set CYREG_B0_P1_U0_CFG8, 0x40010248\r
- 3482                  .set CYREG_B0_P1_U0_CFG9, 0x40010249\r
- 3483                  .set CYREG_B0_P1_U0_CFG10, 0x4001024a\r
- 3484                  .set CYREG_B0_P1_U0_CFG11, 0x4001024b\r
- 3485                  .set CYREG_B0_P1_U0_CFG12, 0x4001024c\r
- 3486                  .set CYREG_B0_P1_U0_CFG13, 0x4001024d\r
- 3487                  .set CYREG_B0_P1_U0_CFG14, 0x4001024e\r
- 3488                  .set CYREG_B0_P1_U0_CFG15, 0x4001024f\r
- 3489                  .set CYREG_B0_P1_U0_CFG16, 0x40010250\r
- 3490                  .set CYREG_B0_P1_U0_CFG17, 0x40010251\r
- 3491                  .set CYREG_B0_P1_U0_CFG18, 0x40010252\r
- 3492                  .set CYREG_B0_P1_U0_CFG19, 0x40010253\r
- 3493                  .set CYREG_B0_P1_U0_CFG20, 0x40010254\r
- 3494                  .set CYREG_B0_P1_U0_CFG21, 0x40010255\r
- 3495                  .set CYREG_B0_P1_U0_CFG22, 0x40010256\r
- 3496                  .set CYREG_B0_P1_U0_CFG23, 0x40010257\r
- 3497                  .set CYREG_B0_P1_U0_CFG24, 0x40010258\r
- 3498                  .set CYREG_B0_P1_U0_CFG25, 0x40010259\r
- 3499                  .set CYREG_B0_P1_U0_CFG26, 0x4001025a\r
- 3500                  .set CYREG_B0_P1_U0_CFG27, 0x4001025b\r
- 3501                  .set CYREG_B0_P1_U0_CFG28, 0x4001025c\r
- 3502                  .set CYREG_B0_P1_U0_CFG29, 0x4001025d\r
- 3503                  .set CYREG_B0_P1_U0_CFG30, 0x4001025e\r
- 3504                  .set CYREG_B0_P1_U0_CFG31, 0x4001025f\r
- 3505                  .set CYREG_B0_P1_U0_DCFG0, 0x40010260\r
- 3506                  .set CYREG_B0_P1_U0_DCFG1, 0x40010262\r
- 3507                  .set CYREG_B0_P1_U0_DCFG2, 0x40010264\r
- 3508                  .set CYREG_B0_P1_U0_DCFG3, 0x40010266\r
- 3509                  .set CYREG_B0_P1_U0_DCFG4, 0x40010268\r
- 3510                  .set CYREG_B0_P1_U0_DCFG5, 0x4001026a\r
- 3511                  .set CYREG_B0_P1_U0_DCFG6, 0x4001026c\r
- 3512                  .set CYREG_B0_P1_U0_DCFG7, 0x4001026e\r
- 3513                  .set CYDEV_UCFG_B0_P1_U1_BASE, 0x40010280\r
- 3514                  .set CYDEV_UCFG_B0_P1_U1_SIZE, 0x00000070\r
- 3515                  .set CYREG_B0_P1_U1_PLD_IT0, 0x40010280\r
- 3516                  .set CYREG_B0_P1_U1_PLD_IT1, 0x40010284\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 157\r
-\r
-\r
- 3517                  .set CYREG_B0_P1_U1_PLD_IT2, 0x40010288\r
- 3518                  .set CYREG_B0_P1_U1_PLD_IT3, 0x4001028c\r
- 3519                  .set CYREG_B0_P1_U1_PLD_IT4, 0x40010290\r
- 3520                  .set CYREG_B0_P1_U1_PLD_IT5, 0x40010294\r
- 3521                  .set CYREG_B0_P1_U1_PLD_IT6, 0x40010298\r
- 3522                  .set CYREG_B0_P1_U1_PLD_IT7, 0x4001029c\r
- 3523                  .set CYREG_B0_P1_U1_PLD_IT8, 0x400102a0\r
- 3524                  .set CYREG_B0_P1_U1_PLD_IT9, 0x400102a4\r
- 3525                  .set CYREG_B0_P1_U1_PLD_IT10, 0x400102a8\r
- 3526                  .set CYREG_B0_P1_U1_PLD_IT11, 0x400102ac\r
- 3527                  .set CYREG_B0_P1_U1_PLD_ORT0, 0x400102b0\r
- 3528                  .set CYREG_B0_P1_U1_PLD_ORT1, 0x400102b2\r
- 3529                  .set CYREG_B0_P1_U1_PLD_ORT2, 0x400102b4\r
- 3530                  .set CYREG_B0_P1_U1_PLD_ORT3, 0x400102b6\r
- 3531                  .set CYREG_B0_P1_U1_MC_CFG_CEN_CONST, 0x400102b8\r
- 3532                  .set CYREG_B0_P1_U1_MC_CFG_XORFB, 0x400102ba\r
- 3533                  .set CYREG_B0_P1_U1_MC_CFG_SET_RESET, 0x400102bc\r
- 3534                  .set CYREG_B0_P1_U1_MC_CFG_BYPASS, 0x400102be\r
- 3535                  .set CYREG_B0_P1_U1_CFG0, 0x400102c0\r
- 3536                  .set CYREG_B0_P1_U1_CFG1, 0x400102c1\r
- 3537                  .set CYREG_B0_P1_U1_CFG2, 0x400102c2\r
- 3538                  .set CYREG_B0_P1_U1_CFG3, 0x400102c3\r
- 3539                  .set CYREG_B0_P1_U1_CFG4, 0x400102c4\r
- 3540                  .set CYREG_B0_P1_U1_CFG5, 0x400102c5\r
- 3541                  .set CYREG_B0_P1_U1_CFG6, 0x400102c6\r
- 3542                  .set CYREG_B0_P1_U1_CFG7, 0x400102c7\r
- 3543                  .set CYREG_B0_P1_U1_CFG8, 0x400102c8\r
- 3544                  .set CYREG_B0_P1_U1_CFG9, 0x400102c9\r
- 3545                  .set CYREG_B0_P1_U1_CFG10, 0x400102ca\r
- 3546                  .set CYREG_B0_P1_U1_CFG11, 0x400102cb\r
- 3547                  .set CYREG_B0_P1_U1_CFG12, 0x400102cc\r
- 3548                  .set CYREG_B0_P1_U1_CFG13, 0x400102cd\r
- 3549                  .set CYREG_B0_P1_U1_CFG14, 0x400102ce\r
- 3550                  .set CYREG_B0_P1_U1_CFG15, 0x400102cf\r
- 3551                  .set CYREG_B0_P1_U1_CFG16, 0x400102d0\r
- 3552                  .set CYREG_B0_P1_U1_CFG17, 0x400102d1\r
- 3553                  .set CYREG_B0_P1_U1_CFG18, 0x400102d2\r
- 3554                  .set CYREG_B0_P1_U1_CFG19, 0x400102d3\r
- 3555                  .set CYREG_B0_P1_U1_CFG20, 0x400102d4\r
- 3556                  .set CYREG_B0_P1_U1_CFG21, 0x400102d5\r
- 3557                  .set CYREG_B0_P1_U1_CFG22, 0x400102d6\r
- 3558                  .set CYREG_B0_P1_U1_CFG23, 0x400102d7\r
- 3559                  .set CYREG_B0_P1_U1_CFG24, 0x400102d8\r
- 3560                  .set CYREG_B0_P1_U1_CFG25, 0x400102d9\r
- 3561                  .set CYREG_B0_P1_U1_CFG26, 0x400102da\r
- 3562                  .set CYREG_B0_P1_U1_CFG27, 0x400102db\r
- 3563                  .set CYREG_B0_P1_U1_CFG28, 0x400102dc\r
- 3564                  .set CYREG_B0_P1_U1_CFG29, 0x400102dd\r
- 3565                  .set CYREG_B0_P1_U1_CFG30, 0x400102de\r
- 3566                  .set CYREG_B0_P1_U1_CFG31, 0x400102df\r
- 3567                  .set CYREG_B0_P1_U1_DCFG0, 0x400102e0\r
- 3568                  .set CYREG_B0_P1_U1_DCFG1, 0x400102e2\r
- 3569                  .set CYREG_B0_P1_U1_DCFG2, 0x400102e4\r
- 3570                  .set CYREG_B0_P1_U1_DCFG3, 0x400102e6\r
- 3571                  .set CYREG_B0_P1_U1_DCFG4, 0x400102e8\r
- 3572                  .set CYREG_B0_P1_U1_DCFG5, 0x400102ea\r
- 3573                  .set CYREG_B0_P1_U1_DCFG6, 0x400102ec\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 158\r
-\r
-\r
- 3574                  .set CYREG_B0_P1_U1_DCFG7, 0x400102ee\r
- 3575                  .set CYDEV_UCFG_B0_P1_ROUTE_BASE, 0x40010300\r
- 3576                  .set CYDEV_UCFG_B0_P1_ROUTE_SIZE, 0x000000ef\r
- 3577                  .set CYDEV_UCFG_B0_P2_BASE, 0x40010400\r
- 3578                  .set CYDEV_UCFG_B0_P2_SIZE, 0x000001ef\r
- 3579                  .set CYDEV_UCFG_B0_P2_U0_BASE, 0x40010400\r
- 3580                  .set CYDEV_UCFG_B0_P2_U0_SIZE, 0x00000070\r
- 3581                  .set CYREG_B0_P2_U0_PLD_IT0, 0x40010400\r
- 3582                  .set CYREG_B0_P2_U0_PLD_IT1, 0x40010404\r
- 3583                  .set CYREG_B0_P2_U0_PLD_IT2, 0x40010408\r
- 3584                  .set CYREG_B0_P2_U0_PLD_IT3, 0x4001040c\r
- 3585                  .set CYREG_B0_P2_U0_PLD_IT4, 0x40010410\r
- 3586                  .set CYREG_B0_P2_U0_PLD_IT5, 0x40010414\r
- 3587                  .set CYREG_B0_P2_U0_PLD_IT6, 0x40010418\r
- 3588                  .set CYREG_B0_P2_U0_PLD_IT7, 0x4001041c\r
- 3589                  .set CYREG_B0_P2_U0_PLD_IT8, 0x40010420\r
- 3590                  .set CYREG_B0_P2_U0_PLD_IT9, 0x40010424\r
- 3591                  .set CYREG_B0_P2_U0_PLD_IT10, 0x40010428\r
- 3592                  .set CYREG_B0_P2_U0_PLD_IT11, 0x4001042c\r
- 3593                  .set CYREG_B0_P2_U0_PLD_ORT0, 0x40010430\r
- 3594                  .set CYREG_B0_P2_U0_PLD_ORT1, 0x40010432\r
- 3595                  .set CYREG_B0_P2_U0_PLD_ORT2, 0x40010434\r
- 3596                  .set CYREG_B0_P2_U0_PLD_ORT3, 0x40010436\r
- 3597                  .set CYREG_B0_P2_U0_MC_CFG_CEN_CONST, 0x40010438\r
- 3598                  .set CYREG_B0_P2_U0_MC_CFG_XORFB, 0x4001043a\r
- 3599                  .set CYREG_B0_P2_U0_MC_CFG_SET_RESET, 0x4001043c\r
- 3600                  .set CYREG_B0_P2_U0_MC_CFG_BYPASS, 0x4001043e\r
- 3601                  .set CYREG_B0_P2_U0_CFG0, 0x40010440\r
- 3602                  .set CYREG_B0_P2_U0_CFG1, 0x40010441\r
- 3603                  .set CYREG_B0_P2_U0_CFG2, 0x40010442\r
- 3604                  .set CYREG_B0_P2_U0_CFG3, 0x40010443\r
- 3605                  .set CYREG_B0_P2_U0_CFG4, 0x40010444\r
- 3606                  .set CYREG_B0_P2_U0_CFG5, 0x40010445\r
- 3607                  .set CYREG_B0_P2_U0_CFG6, 0x40010446\r
- 3608                  .set CYREG_B0_P2_U0_CFG7, 0x40010447\r
- 3609                  .set CYREG_B0_P2_U0_CFG8, 0x40010448\r
- 3610                  .set CYREG_B0_P2_U0_CFG9, 0x40010449\r
- 3611                  .set CYREG_B0_P2_U0_CFG10, 0x4001044a\r
- 3612                  .set CYREG_B0_P2_U0_CFG11, 0x4001044b\r
- 3613                  .set CYREG_B0_P2_U0_CFG12, 0x4001044c\r
- 3614                  .set CYREG_B0_P2_U0_CFG13, 0x4001044d\r
- 3615                  .set CYREG_B0_P2_U0_CFG14, 0x4001044e\r
- 3616                  .set CYREG_B0_P2_U0_CFG15, 0x4001044f\r
- 3617                  .set CYREG_B0_P2_U0_CFG16, 0x40010450\r
- 3618                  .set CYREG_B0_P2_U0_CFG17, 0x40010451\r
- 3619                  .set CYREG_B0_P2_U0_CFG18, 0x40010452\r
- 3620                  .set CYREG_B0_P2_U0_CFG19, 0x40010453\r
- 3621                  .set CYREG_B0_P2_U0_CFG20, 0x40010454\r
- 3622                  .set CYREG_B0_P2_U0_CFG21, 0x40010455\r
- 3623                  .set CYREG_B0_P2_U0_CFG22, 0x40010456\r
- 3624                  .set CYREG_B0_P2_U0_CFG23, 0x40010457\r
- 3625                  .set CYREG_B0_P2_U0_CFG24, 0x40010458\r
- 3626                  .set CYREG_B0_P2_U0_CFG25, 0x40010459\r
- 3627                  .set CYREG_B0_P2_U0_CFG26, 0x4001045a\r
- 3628                  .set CYREG_B0_P2_U0_CFG27, 0x4001045b\r
- 3629                  .set CYREG_B0_P2_U0_CFG28, 0x4001045c\r
- 3630                  .set CYREG_B0_P2_U0_CFG29, 0x4001045d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 159\r
-\r
-\r
- 3631                  .set CYREG_B0_P2_U0_CFG30, 0x4001045e\r
- 3632                  .set CYREG_B0_P2_U0_CFG31, 0x4001045f\r
- 3633                  .set CYREG_B0_P2_U0_DCFG0, 0x40010460\r
- 3634                  .set CYREG_B0_P2_U0_DCFG1, 0x40010462\r
- 3635                  .set CYREG_B0_P2_U0_DCFG2, 0x40010464\r
- 3636                  .set CYREG_B0_P2_U0_DCFG3, 0x40010466\r
- 3637                  .set CYREG_B0_P2_U0_DCFG4, 0x40010468\r
- 3638                  .set CYREG_B0_P2_U0_DCFG5, 0x4001046a\r
- 3639                  .set CYREG_B0_P2_U0_DCFG6, 0x4001046c\r
- 3640                  .set CYREG_B0_P2_U0_DCFG7, 0x4001046e\r
- 3641                  .set CYDEV_UCFG_B0_P2_U1_BASE, 0x40010480\r
- 3642                  .set CYDEV_UCFG_B0_P2_U1_SIZE, 0x00000070\r
- 3643                  .set CYREG_B0_P2_U1_PLD_IT0, 0x40010480\r
- 3644                  .set CYREG_B0_P2_U1_PLD_IT1, 0x40010484\r
- 3645                  .set CYREG_B0_P2_U1_PLD_IT2, 0x40010488\r
- 3646                  .set CYREG_B0_P2_U1_PLD_IT3, 0x4001048c\r
- 3647                  .set CYREG_B0_P2_U1_PLD_IT4, 0x40010490\r
- 3648                  .set CYREG_B0_P2_U1_PLD_IT5, 0x40010494\r
- 3649                  .set CYREG_B0_P2_U1_PLD_IT6, 0x40010498\r
- 3650                  .set CYREG_B0_P2_U1_PLD_IT7, 0x4001049c\r
- 3651                  .set CYREG_B0_P2_U1_PLD_IT8, 0x400104a0\r
- 3652                  .set CYREG_B0_P2_U1_PLD_IT9, 0x400104a4\r
- 3653                  .set CYREG_B0_P2_U1_PLD_IT10, 0x400104a8\r
- 3654                  .set CYREG_B0_P2_U1_PLD_IT11, 0x400104ac\r
- 3655                  .set CYREG_B0_P2_U1_PLD_ORT0, 0x400104b0\r
- 3656                  .set CYREG_B0_P2_U1_PLD_ORT1, 0x400104b2\r
- 3657                  .set CYREG_B0_P2_U1_PLD_ORT2, 0x400104b4\r
- 3658                  .set CYREG_B0_P2_U1_PLD_ORT3, 0x400104b6\r
- 3659                  .set CYREG_B0_P2_U1_MC_CFG_CEN_CONST, 0x400104b8\r
- 3660                  .set CYREG_B0_P2_U1_MC_CFG_XORFB, 0x400104ba\r
- 3661                  .set CYREG_B0_P2_U1_MC_CFG_SET_RESET, 0x400104bc\r
- 3662                  .set CYREG_B0_P2_U1_MC_CFG_BYPASS, 0x400104be\r
- 3663                  .set CYREG_B0_P2_U1_CFG0, 0x400104c0\r
- 3664                  .set CYREG_B0_P2_U1_CFG1, 0x400104c1\r
- 3665                  .set CYREG_B0_P2_U1_CFG2, 0x400104c2\r
- 3666                  .set CYREG_B0_P2_U1_CFG3, 0x400104c3\r
- 3667                  .set CYREG_B0_P2_U1_CFG4, 0x400104c4\r
- 3668                  .set CYREG_B0_P2_U1_CFG5, 0x400104c5\r
- 3669                  .set CYREG_B0_P2_U1_CFG6, 0x400104c6\r
- 3670                  .set CYREG_B0_P2_U1_CFG7, 0x400104c7\r
- 3671                  .set CYREG_B0_P2_U1_CFG8, 0x400104c8\r
- 3672                  .set CYREG_B0_P2_U1_CFG9, 0x400104c9\r
- 3673                  .set CYREG_B0_P2_U1_CFG10, 0x400104ca\r
- 3674                  .set CYREG_B0_P2_U1_CFG11, 0x400104cb\r
- 3675                  .set CYREG_B0_P2_U1_CFG12, 0x400104cc\r
- 3676                  .set CYREG_B0_P2_U1_CFG13, 0x400104cd\r
- 3677                  .set CYREG_B0_P2_U1_CFG14, 0x400104ce\r
- 3678                  .set CYREG_B0_P2_U1_CFG15, 0x400104cf\r
- 3679                  .set CYREG_B0_P2_U1_CFG16, 0x400104d0\r
- 3680                  .set CYREG_B0_P2_U1_CFG17, 0x400104d1\r
- 3681                  .set CYREG_B0_P2_U1_CFG18, 0x400104d2\r
- 3682                  .set CYREG_B0_P2_U1_CFG19, 0x400104d3\r
- 3683                  .set CYREG_B0_P2_U1_CFG20, 0x400104d4\r
- 3684                  .set CYREG_B0_P2_U1_CFG21, 0x400104d5\r
- 3685                  .set CYREG_B0_P2_U1_CFG22, 0x400104d6\r
- 3686                  .set CYREG_B0_P2_U1_CFG23, 0x400104d7\r
- 3687                  .set CYREG_B0_P2_U1_CFG24, 0x400104d8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 160\r
-\r
-\r
- 3688                  .set CYREG_B0_P2_U1_CFG25, 0x400104d9\r
- 3689                  .set CYREG_B0_P2_U1_CFG26, 0x400104da\r
- 3690                  .set CYREG_B0_P2_U1_CFG27, 0x400104db\r
- 3691                  .set CYREG_B0_P2_U1_CFG28, 0x400104dc\r
- 3692                  .set CYREG_B0_P2_U1_CFG29, 0x400104dd\r
- 3693                  .set CYREG_B0_P2_U1_CFG30, 0x400104de\r
- 3694                  .set CYREG_B0_P2_U1_CFG31, 0x400104df\r
- 3695                  .set CYREG_B0_P2_U1_DCFG0, 0x400104e0\r
- 3696                  .set CYREG_B0_P2_U1_DCFG1, 0x400104e2\r
- 3697                  .set CYREG_B0_P2_U1_DCFG2, 0x400104e4\r
- 3698                  .set CYREG_B0_P2_U1_DCFG3, 0x400104e6\r
- 3699                  .set CYREG_B0_P2_U1_DCFG4, 0x400104e8\r
- 3700                  .set CYREG_B0_P2_U1_DCFG5, 0x400104ea\r
- 3701                  .set CYREG_B0_P2_U1_DCFG6, 0x400104ec\r
- 3702                  .set CYREG_B0_P2_U1_DCFG7, 0x400104ee\r
- 3703                  .set CYDEV_UCFG_B0_P2_ROUTE_BASE, 0x40010500\r
- 3704                  .set CYDEV_UCFG_B0_P2_ROUTE_SIZE, 0x000000ef\r
- 3705                  .set CYDEV_UCFG_B0_P3_BASE, 0x40010600\r
- 3706                  .set CYDEV_UCFG_B0_P3_SIZE, 0x000001ef\r
- 3707                  .set CYDEV_UCFG_B0_P3_U0_BASE, 0x40010600\r
- 3708                  .set CYDEV_UCFG_B0_P3_U0_SIZE, 0x00000070\r
- 3709                  .set CYREG_B0_P3_U0_PLD_IT0, 0x40010600\r
- 3710                  .set CYREG_B0_P3_U0_PLD_IT1, 0x40010604\r
- 3711                  .set CYREG_B0_P3_U0_PLD_IT2, 0x40010608\r
- 3712                  .set CYREG_B0_P3_U0_PLD_IT3, 0x4001060c\r
- 3713                  .set CYREG_B0_P3_U0_PLD_IT4, 0x40010610\r
- 3714                  .set CYREG_B0_P3_U0_PLD_IT5, 0x40010614\r
- 3715                  .set CYREG_B0_P3_U0_PLD_IT6, 0x40010618\r
- 3716                  .set CYREG_B0_P3_U0_PLD_IT7, 0x4001061c\r
- 3717                  .set CYREG_B0_P3_U0_PLD_IT8, 0x40010620\r
- 3718                  .set CYREG_B0_P3_U0_PLD_IT9, 0x40010624\r
- 3719                  .set CYREG_B0_P3_U0_PLD_IT10, 0x40010628\r
- 3720                  .set CYREG_B0_P3_U0_PLD_IT11, 0x4001062c\r
- 3721                  .set CYREG_B0_P3_U0_PLD_ORT0, 0x40010630\r
- 3722                  .set CYREG_B0_P3_U0_PLD_ORT1, 0x40010632\r
- 3723                  .set CYREG_B0_P3_U0_PLD_ORT2, 0x40010634\r
- 3724                  .set CYREG_B0_P3_U0_PLD_ORT3, 0x40010636\r
- 3725                  .set CYREG_B0_P3_U0_MC_CFG_CEN_CONST, 0x40010638\r
- 3726                  .set CYREG_B0_P3_U0_MC_CFG_XORFB, 0x4001063a\r
- 3727                  .set CYREG_B0_P3_U0_MC_CFG_SET_RESET, 0x4001063c\r
- 3728                  .set CYREG_B0_P3_U0_MC_CFG_BYPASS, 0x4001063e\r
- 3729                  .set CYREG_B0_P3_U0_CFG0, 0x40010640\r
- 3730                  .set CYREG_B0_P3_U0_CFG1, 0x40010641\r
- 3731                  .set CYREG_B0_P3_U0_CFG2, 0x40010642\r
- 3732                  .set CYREG_B0_P3_U0_CFG3, 0x40010643\r
- 3733                  .set CYREG_B0_P3_U0_CFG4, 0x40010644\r
- 3734                  .set CYREG_B0_P3_U0_CFG5, 0x40010645\r
- 3735                  .set CYREG_B0_P3_U0_CFG6, 0x40010646\r
- 3736                  .set CYREG_B0_P3_U0_CFG7, 0x40010647\r
- 3737                  .set CYREG_B0_P3_U0_CFG8, 0x40010648\r
- 3738                  .set CYREG_B0_P3_U0_CFG9, 0x40010649\r
- 3739                  .set CYREG_B0_P3_U0_CFG10, 0x4001064a\r
- 3740                  .set CYREG_B0_P3_U0_CFG11, 0x4001064b\r
- 3741                  .set CYREG_B0_P3_U0_CFG12, 0x4001064c\r
- 3742                  .set CYREG_B0_P3_U0_CFG13, 0x4001064d\r
- 3743                  .set CYREG_B0_P3_U0_CFG14, 0x4001064e\r
- 3744                  .set CYREG_B0_P3_U0_CFG15, 0x4001064f\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 161\r
-\r
-\r
- 3745                  .set CYREG_B0_P3_U0_CFG16, 0x40010650\r
- 3746                  .set CYREG_B0_P3_U0_CFG17, 0x40010651\r
- 3747                  .set CYREG_B0_P3_U0_CFG18, 0x40010652\r
- 3748                  .set CYREG_B0_P3_U0_CFG19, 0x40010653\r
- 3749                  .set CYREG_B0_P3_U0_CFG20, 0x40010654\r
- 3750                  .set CYREG_B0_P3_U0_CFG21, 0x40010655\r
- 3751                  .set CYREG_B0_P3_U0_CFG22, 0x40010656\r
- 3752                  .set CYREG_B0_P3_U0_CFG23, 0x40010657\r
- 3753                  .set CYREG_B0_P3_U0_CFG24, 0x40010658\r
- 3754                  .set CYREG_B0_P3_U0_CFG25, 0x40010659\r
- 3755                  .set CYREG_B0_P3_U0_CFG26, 0x4001065a\r
- 3756                  .set CYREG_B0_P3_U0_CFG27, 0x4001065b\r
- 3757                  .set CYREG_B0_P3_U0_CFG28, 0x4001065c\r
- 3758                  .set CYREG_B0_P3_U0_CFG29, 0x4001065d\r
- 3759                  .set CYREG_B0_P3_U0_CFG30, 0x4001065e\r
- 3760                  .set CYREG_B0_P3_U0_CFG31, 0x4001065f\r
- 3761                  .set CYREG_B0_P3_U0_DCFG0, 0x40010660\r
- 3762                  .set CYREG_B0_P3_U0_DCFG1, 0x40010662\r
- 3763                  .set CYREG_B0_P3_U0_DCFG2, 0x40010664\r
- 3764                  .set CYREG_B0_P3_U0_DCFG3, 0x40010666\r
- 3765                  .set CYREG_B0_P3_U0_DCFG4, 0x40010668\r
- 3766                  .set CYREG_B0_P3_U0_DCFG5, 0x4001066a\r
- 3767                  .set CYREG_B0_P3_U0_DCFG6, 0x4001066c\r
- 3768                  .set CYREG_B0_P3_U0_DCFG7, 0x4001066e\r
- 3769                  .set CYDEV_UCFG_B0_P3_U1_BASE, 0x40010680\r
- 3770                  .set CYDEV_UCFG_B0_P3_U1_SIZE, 0x00000070\r
- 3771                  .set CYREG_B0_P3_U1_PLD_IT0, 0x40010680\r
- 3772                  .set CYREG_B0_P3_U1_PLD_IT1, 0x40010684\r
- 3773                  .set CYREG_B0_P3_U1_PLD_IT2, 0x40010688\r
- 3774                  .set CYREG_B0_P3_U1_PLD_IT3, 0x4001068c\r
- 3775                  .set CYREG_B0_P3_U1_PLD_IT4, 0x40010690\r
- 3776                  .set CYREG_B0_P3_U1_PLD_IT5, 0x40010694\r
- 3777                  .set CYREG_B0_P3_U1_PLD_IT6, 0x40010698\r
- 3778                  .set CYREG_B0_P3_U1_PLD_IT7, 0x4001069c\r
- 3779                  .set CYREG_B0_P3_U1_PLD_IT8, 0x400106a0\r
- 3780                  .set CYREG_B0_P3_U1_PLD_IT9, 0x400106a4\r
- 3781                  .set CYREG_B0_P3_U1_PLD_IT10, 0x400106a8\r
- 3782                  .set CYREG_B0_P3_U1_PLD_IT11, 0x400106ac\r
- 3783                  .set CYREG_B0_P3_U1_PLD_ORT0, 0x400106b0\r
- 3784                  .set CYREG_B0_P3_U1_PLD_ORT1, 0x400106b2\r
- 3785                  .set CYREG_B0_P3_U1_PLD_ORT2, 0x400106b4\r
- 3786                  .set CYREG_B0_P3_U1_PLD_ORT3, 0x400106b6\r
- 3787                  .set CYREG_B0_P3_U1_MC_CFG_CEN_CONST, 0x400106b8\r
- 3788                  .set CYREG_B0_P3_U1_MC_CFG_XORFB, 0x400106ba\r
- 3789                  .set CYREG_B0_P3_U1_MC_CFG_SET_RESET, 0x400106bc\r
- 3790                  .set CYREG_B0_P3_U1_MC_CFG_BYPASS, 0x400106be\r
- 3791                  .set CYREG_B0_P3_U1_CFG0, 0x400106c0\r
- 3792                  .set CYREG_B0_P3_U1_CFG1, 0x400106c1\r
- 3793                  .set CYREG_B0_P3_U1_CFG2, 0x400106c2\r
- 3794                  .set CYREG_B0_P3_U1_CFG3, 0x400106c3\r
- 3795                  .set CYREG_B0_P3_U1_CFG4, 0x400106c4\r
- 3796                  .set CYREG_B0_P3_U1_CFG5, 0x400106c5\r
- 3797                  .set CYREG_B0_P3_U1_CFG6, 0x400106c6\r
- 3798                  .set CYREG_B0_P3_U1_CFG7, 0x400106c7\r
- 3799                  .set CYREG_B0_P3_U1_CFG8, 0x400106c8\r
- 3800                  .set CYREG_B0_P3_U1_CFG9, 0x400106c9\r
- 3801                  .set CYREG_B0_P3_U1_CFG10, 0x400106ca\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 162\r
-\r
-\r
- 3802                  .set CYREG_B0_P3_U1_CFG11, 0x400106cb\r
- 3803                  .set CYREG_B0_P3_U1_CFG12, 0x400106cc\r
- 3804                  .set CYREG_B0_P3_U1_CFG13, 0x400106cd\r
- 3805                  .set CYREG_B0_P3_U1_CFG14, 0x400106ce\r
- 3806                  .set CYREG_B0_P3_U1_CFG15, 0x400106cf\r
- 3807                  .set CYREG_B0_P3_U1_CFG16, 0x400106d0\r
- 3808                  .set CYREG_B0_P3_U1_CFG17, 0x400106d1\r
- 3809                  .set CYREG_B0_P3_U1_CFG18, 0x400106d2\r
- 3810                  .set CYREG_B0_P3_U1_CFG19, 0x400106d3\r
- 3811                  .set CYREG_B0_P3_U1_CFG20, 0x400106d4\r
- 3812                  .set CYREG_B0_P3_U1_CFG21, 0x400106d5\r
- 3813                  .set CYREG_B0_P3_U1_CFG22, 0x400106d6\r
- 3814                  .set CYREG_B0_P3_U1_CFG23, 0x400106d7\r
- 3815                  .set CYREG_B0_P3_U1_CFG24, 0x400106d8\r
- 3816                  .set CYREG_B0_P3_U1_CFG25, 0x400106d9\r
- 3817                  .set CYREG_B0_P3_U1_CFG26, 0x400106da\r
- 3818                  .set CYREG_B0_P3_U1_CFG27, 0x400106db\r
- 3819                  .set CYREG_B0_P3_U1_CFG28, 0x400106dc\r
- 3820                  .set CYREG_B0_P3_U1_CFG29, 0x400106dd\r
- 3821                  .set CYREG_B0_P3_U1_CFG30, 0x400106de\r
- 3822                  .set CYREG_B0_P3_U1_CFG31, 0x400106df\r
- 3823                  .set CYREG_B0_P3_U1_DCFG0, 0x400106e0\r
- 3824                  .set CYREG_B0_P3_U1_DCFG1, 0x400106e2\r
- 3825                  .set CYREG_B0_P3_U1_DCFG2, 0x400106e4\r
- 3826                  .set CYREG_B0_P3_U1_DCFG3, 0x400106e6\r
- 3827                  .set CYREG_B0_P3_U1_DCFG4, 0x400106e8\r
- 3828                  .set CYREG_B0_P3_U1_DCFG5, 0x400106ea\r
- 3829                  .set CYREG_B0_P3_U1_DCFG6, 0x400106ec\r
- 3830                  .set CYREG_B0_P3_U1_DCFG7, 0x400106ee\r
- 3831                  .set CYDEV_UCFG_B0_P3_ROUTE_BASE, 0x40010700\r
- 3832                  .set CYDEV_UCFG_B0_P3_ROUTE_SIZE, 0x000000ef\r
- 3833                  .set CYDEV_UCFG_B0_P4_BASE, 0x40010800\r
- 3834                  .set CYDEV_UCFG_B0_P4_SIZE, 0x000001ef\r
- 3835                  .set CYDEV_UCFG_B0_P4_U0_BASE, 0x40010800\r
- 3836                  .set CYDEV_UCFG_B0_P4_U0_SIZE, 0x00000070\r
- 3837                  .set CYREG_B0_P4_U0_PLD_IT0, 0x40010800\r
- 3838                  .set CYREG_B0_P4_U0_PLD_IT1, 0x40010804\r
- 3839                  .set CYREG_B0_P4_U0_PLD_IT2, 0x40010808\r
- 3840                  .set CYREG_B0_P4_U0_PLD_IT3, 0x4001080c\r
- 3841                  .set CYREG_B0_P4_U0_PLD_IT4, 0x40010810\r
- 3842                  .set CYREG_B0_P4_U0_PLD_IT5, 0x40010814\r
- 3843                  .set CYREG_B0_P4_U0_PLD_IT6, 0x40010818\r
- 3844                  .set CYREG_B0_P4_U0_PLD_IT7, 0x4001081c\r
- 3845                  .set CYREG_B0_P4_U0_PLD_IT8, 0x40010820\r
- 3846                  .set CYREG_B0_P4_U0_PLD_IT9, 0x40010824\r
- 3847                  .set CYREG_B0_P4_U0_PLD_IT10, 0x40010828\r
- 3848                  .set CYREG_B0_P4_U0_PLD_IT11, 0x4001082c\r
- 3849                  .set CYREG_B0_P4_U0_PLD_ORT0, 0x40010830\r
- 3850                  .set CYREG_B0_P4_U0_PLD_ORT1, 0x40010832\r
- 3851                  .set CYREG_B0_P4_U0_PLD_ORT2, 0x40010834\r
- 3852                  .set CYREG_B0_P4_U0_PLD_ORT3, 0x40010836\r
- 3853                  .set CYREG_B0_P4_U0_MC_CFG_CEN_CONST, 0x40010838\r
- 3854                  .set CYREG_B0_P4_U0_MC_CFG_XORFB, 0x4001083a\r
- 3855                  .set CYREG_B0_P4_U0_MC_CFG_SET_RESET, 0x4001083c\r
- 3856                  .set CYREG_B0_P4_U0_MC_CFG_BYPASS, 0x4001083e\r
- 3857                  .set CYREG_B0_P4_U0_CFG0, 0x40010840\r
- 3858                  .set CYREG_B0_P4_U0_CFG1, 0x40010841\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 163\r
-\r
-\r
- 3859                  .set CYREG_B0_P4_U0_CFG2, 0x40010842\r
- 3860                  .set CYREG_B0_P4_U0_CFG3, 0x40010843\r
- 3861                  .set CYREG_B0_P4_U0_CFG4, 0x40010844\r
- 3862                  .set CYREG_B0_P4_U0_CFG5, 0x40010845\r
- 3863                  .set CYREG_B0_P4_U0_CFG6, 0x40010846\r
- 3864                  .set CYREG_B0_P4_U0_CFG7, 0x40010847\r
- 3865                  .set CYREG_B0_P4_U0_CFG8, 0x40010848\r
- 3866                  .set CYREG_B0_P4_U0_CFG9, 0x40010849\r
- 3867                  .set CYREG_B0_P4_U0_CFG10, 0x4001084a\r
- 3868                  .set CYREG_B0_P4_U0_CFG11, 0x4001084b\r
- 3869                  .set CYREG_B0_P4_U0_CFG12, 0x4001084c\r
- 3870                  .set CYREG_B0_P4_U0_CFG13, 0x4001084d\r
- 3871                  .set CYREG_B0_P4_U0_CFG14, 0x4001084e\r
- 3872                  .set CYREG_B0_P4_U0_CFG15, 0x4001084f\r
- 3873                  .set CYREG_B0_P4_U0_CFG16, 0x40010850\r
- 3874                  .set CYREG_B0_P4_U0_CFG17, 0x40010851\r
- 3875                  .set CYREG_B0_P4_U0_CFG18, 0x40010852\r
- 3876                  .set CYREG_B0_P4_U0_CFG19, 0x40010853\r
- 3877                  .set CYREG_B0_P4_U0_CFG20, 0x40010854\r
- 3878                  .set CYREG_B0_P4_U0_CFG21, 0x40010855\r
- 3879                  .set CYREG_B0_P4_U0_CFG22, 0x40010856\r
- 3880                  .set CYREG_B0_P4_U0_CFG23, 0x40010857\r
- 3881                  .set CYREG_B0_P4_U0_CFG24, 0x40010858\r
- 3882                  .set CYREG_B0_P4_U0_CFG25, 0x40010859\r
- 3883                  .set CYREG_B0_P4_U0_CFG26, 0x4001085a\r
- 3884                  .set CYREG_B0_P4_U0_CFG27, 0x4001085b\r
- 3885                  .set CYREG_B0_P4_U0_CFG28, 0x4001085c\r
- 3886                  .set CYREG_B0_P4_U0_CFG29, 0x4001085d\r
- 3887                  .set CYREG_B0_P4_U0_CFG30, 0x4001085e\r
- 3888                  .set CYREG_B0_P4_U0_CFG31, 0x4001085f\r
- 3889                  .set CYREG_B0_P4_U0_DCFG0, 0x40010860\r
- 3890                  .set CYREG_B0_P4_U0_DCFG1, 0x40010862\r
- 3891                  .set CYREG_B0_P4_U0_DCFG2, 0x40010864\r
- 3892                  .set CYREG_B0_P4_U0_DCFG3, 0x40010866\r
- 3893                  .set CYREG_B0_P4_U0_DCFG4, 0x40010868\r
- 3894                  .set CYREG_B0_P4_U0_DCFG5, 0x4001086a\r
- 3895                  .set CYREG_B0_P4_U0_DCFG6, 0x4001086c\r
- 3896                  .set CYREG_B0_P4_U0_DCFG7, 0x4001086e\r
- 3897                  .set CYDEV_UCFG_B0_P4_U1_BASE, 0x40010880\r
- 3898                  .set CYDEV_UCFG_B0_P4_U1_SIZE, 0x00000070\r
- 3899                  .set CYREG_B0_P4_U1_PLD_IT0, 0x40010880\r
- 3900                  .set CYREG_B0_P4_U1_PLD_IT1, 0x40010884\r
- 3901                  .set CYREG_B0_P4_U1_PLD_IT2, 0x40010888\r
- 3902                  .set CYREG_B0_P4_U1_PLD_IT3, 0x4001088c\r
- 3903                  .set CYREG_B0_P4_U1_PLD_IT4, 0x40010890\r
- 3904                  .set CYREG_B0_P4_U1_PLD_IT5, 0x40010894\r
- 3905                  .set CYREG_B0_P4_U1_PLD_IT6, 0x40010898\r
- 3906                  .set CYREG_B0_P4_U1_PLD_IT7, 0x4001089c\r
- 3907                  .set CYREG_B0_P4_U1_PLD_IT8, 0x400108a0\r
- 3908                  .set CYREG_B0_P4_U1_PLD_IT9, 0x400108a4\r
- 3909                  .set CYREG_B0_P4_U1_PLD_IT10, 0x400108a8\r
- 3910                  .set CYREG_B0_P4_U1_PLD_IT11, 0x400108ac\r
- 3911                  .set CYREG_B0_P4_U1_PLD_ORT0, 0x400108b0\r
- 3912                  .set CYREG_B0_P4_U1_PLD_ORT1, 0x400108b2\r
- 3913                  .set CYREG_B0_P4_U1_PLD_ORT2, 0x400108b4\r
- 3914                  .set CYREG_B0_P4_U1_PLD_ORT3, 0x400108b6\r
- 3915                  .set CYREG_B0_P4_U1_MC_CFG_CEN_CONST, 0x400108b8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 164\r
-\r
-\r
- 3916                  .set CYREG_B0_P4_U1_MC_CFG_XORFB, 0x400108ba\r
- 3917                  .set CYREG_B0_P4_U1_MC_CFG_SET_RESET, 0x400108bc\r
- 3918                  .set CYREG_B0_P4_U1_MC_CFG_BYPASS, 0x400108be\r
- 3919                  .set CYREG_B0_P4_U1_CFG0, 0x400108c0\r
- 3920                  .set CYREG_B0_P4_U1_CFG1, 0x400108c1\r
- 3921                  .set CYREG_B0_P4_U1_CFG2, 0x400108c2\r
- 3922                  .set CYREG_B0_P4_U1_CFG3, 0x400108c3\r
- 3923                  .set CYREG_B0_P4_U1_CFG4, 0x400108c4\r
- 3924                  .set CYREG_B0_P4_U1_CFG5, 0x400108c5\r
- 3925                  .set CYREG_B0_P4_U1_CFG6, 0x400108c6\r
- 3926                  .set CYREG_B0_P4_U1_CFG7, 0x400108c7\r
- 3927                  .set CYREG_B0_P4_U1_CFG8, 0x400108c8\r
- 3928                  .set CYREG_B0_P4_U1_CFG9, 0x400108c9\r
- 3929                  .set CYREG_B0_P4_U1_CFG10, 0x400108ca\r
- 3930                  .set CYREG_B0_P4_U1_CFG11, 0x400108cb\r
- 3931                  .set CYREG_B0_P4_U1_CFG12, 0x400108cc\r
- 3932                  .set CYREG_B0_P4_U1_CFG13, 0x400108cd\r
- 3933                  .set CYREG_B0_P4_U1_CFG14, 0x400108ce\r
- 3934                  .set CYREG_B0_P4_U1_CFG15, 0x400108cf\r
- 3935                  .set CYREG_B0_P4_U1_CFG16, 0x400108d0\r
- 3936                  .set CYREG_B0_P4_U1_CFG17, 0x400108d1\r
- 3937                  .set CYREG_B0_P4_U1_CFG18, 0x400108d2\r
- 3938                  .set CYREG_B0_P4_U1_CFG19, 0x400108d3\r
- 3939                  .set CYREG_B0_P4_U1_CFG20, 0x400108d4\r
- 3940                  .set CYREG_B0_P4_U1_CFG21, 0x400108d5\r
- 3941                  .set CYREG_B0_P4_U1_CFG22, 0x400108d6\r
- 3942                  .set CYREG_B0_P4_U1_CFG23, 0x400108d7\r
- 3943                  .set CYREG_B0_P4_U1_CFG24, 0x400108d8\r
- 3944                  .set CYREG_B0_P4_U1_CFG25, 0x400108d9\r
- 3945                  .set CYREG_B0_P4_U1_CFG26, 0x400108da\r
- 3946                  .set CYREG_B0_P4_U1_CFG27, 0x400108db\r
- 3947                  .set CYREG_B0_P4_U1_CFG28, 0x400108dc\r
- 3948                  .set CYREG_B0_P4_U1_CFG29, 0x400108dd\r
- 3949                  .set CYREG_B0_P4_U1_CFG30, 0x400108de\r
- 3950                  .set CYREG_B0_P4_U1_CFG31, 0x400108df\r
- 3951                  .set CYREG_B0_P4_U1_DCFG0, 0x400108e0\r
- 3952                  .set CYREG_B0_P4_U1_DCFG1, 0x400108e2\r
- 3953                  .set CYREG_B0_P4_U1_DCFG2, 0x400108e4\r
- 3954                  .set CYREG_B0_P4_U1_DCFG3, 0x400108e6\r
- 3955                  .set CYREG_B0_P4_U1_DCFG4, 0x400108e8\r
- 3956                  .set CYREG_B0_P4_U1_DCFG5, 0x400108ea\r
- 3957                  .set CYREG_B0_P4_U1_DCFG6, 0x400108ec\r
- 3958                  .set CYREG_B0_P4_U1_DCFG7, 0x400108ee\r
- 3959                  .set CYDEV_UCFG_B0_P4_ROUTE_BASE, 0x40010900\r
- 3960                  .set CYDEV_UCFG_B0_P4_ROUTE_SIZE, 0x000000ef\r
- 3961                  .set CYDEV_UCFG_B0_P5_BASE, 0x40010a00\r
- 3962                  .set CYDEV_UCFG_B0_P5_SIZE, 0x000001ef\r
- 3963                  .set CYDEV_UCFG_B0_P5_U0_BASE, 0x40010a00\r
- 3964                  .set CYDEV_UCFG_B0_P5_U0_SIZE, 0x00000070\r
- 3965                  .set CYREG_B0_P5_U0_PLD_IT0, 0x40010a00\r
- 3966                  .set CYREG_B0_P5_U0_PLD_IT1, 0x40010a04\r
- 3967                  .set CYREG_B0_P5_U0_PLD_IT2, 0x40010a08\r
- 3968                  .set CYREG_B0_P5_U0_PLD_IT3, 0x40010a0c\r
- 3969                  .set CYREG_B0_P5_U0_PLD_IT4, 0x40010a10\r
- 3970                  .set CYREG_B0_P5_U0_PLD_IT5, 0x40010a14\r
- 3971                  .set CYREG_B0_P5_U0_PLD_IT6, 0x40010a18\r
- 3972                  .set CYREG_B0_P5_U0_PLD_IT7, 0x40010a1c\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 165\r
-\r
-\r
- 3973                  .set CYREG_B0_P5_U0_PLD_IT8, 0x40010a20\r
- 3974                  .set CYREG_B0_P5_U0_PLD_IT9, 0x40010a24\r
- 3975                  .set CYREG_B0_P5_U0_PLD_IT10, 0x40010a28\r
- 3976                  .set CYREG_B0_P5_U0_PLD_IT11, 0x40010a2c\r
- 3977                  .set CYREG_B0_P5_U0_PLD_ORT0, 0x40010a30\r
- 3978                  .set CYREG_B0_P5_U0_PLD_ORT1, 0x40010a32\r
- 3979                  .set CYREG_B0_P5_U0_PLD_ORT2, 0x40010a34\r
- 3980                  .set CYREG_B0_P5_U0_PLD_ORT3, 0x40010a36\r
- 3981                  .set CYREG_B0_P5_U0_MC_CFG_CEN_CONST, 0x40010a38\r
- 3982                  .set CYREG_B0_P5_U0_MC_CFG_XORFB, 0x40010a3a\r
- 3983                  .set CYREG_B0_P5_U0_MC_CFG_SET_RESET, 0x40010a3c\r
- 3984                  .set CYREG_B0_P5_U0_MC_CFG_BYPASS, 0x40010a3e\r
- 3985                  .set CYREG_B0_P5_U0_CFG0, 0x40010a40\r
- 3986                  .set CYREG_B0_P5_U0_CFG1, 0x40010a41\r
- 3987                  .set CYREG_B0_P5_U0_CFG2, 0x40010a42\r
- 3988                  .set CYREG_B0_P5_U0_CFG3, 0x40010a43\r
- 3989                  .set CYREG_B0_P5_U0_CFG4, 0x40010a44\r
- 3990                  .set CYREG_B0_P5_U0_CFG5, 0x40010a45\r
- 3991                  .set CYREG_B0_P5_U0_CFG6, 0x40010a46\r
- 3992                  .set CYREG_B0_P5_U0_CFG7, 0x40010a47\r
- 3993                  .set CYREG_B0_P5_U0_CFG8, 0x40010a48\r
- 3994                  .set CYREG_B0_P5_U0_CFG9, 0x40010a49\r
- 3995                  .set CYREG_B0_P5_U0_CFG10, 0x40010a4a\r
- 3996                  .set CYREG_B0_P5_U0_CFG11, 0x40010a4b\r
- 3997                  .set CYREG_B0_P5_U0_CFG12, 0x40010a4c\r
- 3998                  .set CYREG_B0_P5_U0_CFG13, 0x40010a4d\r
- 3999                  .set CYREG_B0_P5_U0_CFG14, 0x40010a4e\r
- 4000                  .set CYREG_B0_P5_U0_CFG15, 0x40010a4f\r
- 4001                  .set CYREG_B0_P5_U0_CFG16, 0x40010a50\r
- 4002                  .set CYREG_B0_P5_U0_CFG17, 0x40010a51\r
- 4003                  .set CYREG_B0_P5_U0_CFG18, 0x40010a52\r
- 4004                  .set CYREG_B0_P5_U0_CFG19, 0x40010a53\r
- 4005                  .set CYREG_B0_P5_U0_CFG20, 0x40010a54\r
- 4006                  .set CYREG_B0_P5_U0_CFG21, 0x40010a55\r
- 4007                  .set CYREG_B0_P5_U0_CFG22, 0x40010a56\r
- 4008                  .set CYREG_B0_P5_U0_CFG23, 0x40010a57\r
- 4009                  .set CYREG_B0_P5_U0_CFG24, 0x40010a58\r
- 4010                  .set CYREG_B0_P5_U0_CFG25, 0x40010a59\r
- 4011                  .set CYREG_B0_P5_U0_CFG26, 0x40010a5a\r
- 4012                  .set CYREG_B0_P5_U0_CFG27, 0x40010a5b\r
- 4013                  .set CYREG_B0_P5_U0_CFG28, 0x40010a5c\r
- 4014                  .set CYREG_B0_P5_U0_CFG29, 0x40010a5d\r
- 4015                  .set CYREG_B0_P5_U0_CFG30, 0x40010a5e\r
- 4016                  .set CYREG_B0_P5_U0_CFG31, 0x40010a5f\r
- 4017                  .set CYREG_B0_P5_U0_DCFG0, 0x40010a60\r
- 4018                  .set CYREG_B0_P5_U0_DCFG1, 0x40010a62\r
- 4019                  .set CYREG_B0_P5_U0_DCFG2, 0x40010a64\r
- 4020                  .set CYREG_B0_P5_U0_DCFG3, 0x40010a66\r
- 4021                  .set CYREG_B0_P5_U0_DCFG4, 0x40010a68\r
- 4022                  .set CYREG_B0_P5_U0_DCFG5, 0x40010a6a\r
- 4023                  .set CYREG_B0_P5_U0_DCFG6, 0x40010a6c\r
- 4024                  .set CYREG_B0_P5_U0_DCFG7, 0x40010a6e\r
- 4025                  .set CYDEV_UCFG_B0_P5_U1_BASE, 0x40010a80\r
- 4026                  .set CYDEV_UCFG_B0_P5_U1_SIZE, 0x00000070\r
- 4027                  .set CYREG_B0_P5_U1_PLD_IT0, 0x40010a80\r
- 4028                  .set CYREG_B0_P5_U1_PLD_IT1, 0x40010a84\r
- 4029                  .set CYREG_B0_P5_U1_PLD_IT2, 0x40010a88\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 166\r
-\r
-\r
- 4030                  .set CYREG_B0_P5_U1_PLD_IT3, 0x40010a8c\r
- 4031                  .set CYREG_B0_P5_U1_PLD_IT4, 0x40010a90\r
- 4032                  .set CYREG_B0_P5_U1_PLD_IT5, 0x40010a94\r
- 4033                  .set CYREG_B0_P5_U1_PLD_IT6, 0x40010a98\r
- 4034                  .set CYREG_B0_P5_U1_PLD_IT7, 0x40010a9c\r
- 4035                  .set CYREG_B0_P5_U1_PLD_IT8, 0x40010aa0\r
- 4036                  .set CYREG_B0_P5_U1_PLD_IT9, 0x40010aa4\r
- 4037                  .set CYREG_B0_P5_U1_PLD_IT10, 0x40010aa8\r
- 4038                  .set CYREG_B0_P5_U1_PLD_IT11, 0x40010aac\r
- 4039                  .set CYREG_B0_P5_U1_PLD_ORT0, 0x40010ab0\r
- 4040                  .set CYREG_B0_P5_U1_PLD_ORT1, 0x40010ab2\r
- 4041                  .set CYREG_B0_P5_U1_PLD_ORT2, 0x40010ab4\r
- 4042                  .set CYREG_B0_P5_U1_PLD_ORT3, 0x40010ab6\r
- 4043                  .set CYREG_B0_P5_U1_MC_CFG_CEN_CONST, 0x40010ab8\r
- 4044                  .set CYREG_B0_P5_U1_MC_CFG_XORFB, 0x40010aba\r
- 4045                  .set CYREG_B0_P5_U1_MC_CFG_SET_RESET, 0x40010abc\r
- 4046                  .set CYREG_B0_P5_U1_MC_CFG_BYPASS, 0x40010abe\r
- 4047                  .set CYREG_B0_P5_U1_CFG0, 0x40010ac0\r
- 4048                  .set CYREG_B0_P5_U1_CFG1, 0x40010ac1\r
- 4049                  .set CYREG_B0_P5_U1_CFG2, 0x40010ac2\r
- 4050                  .set CYREG_B0_P5_U1_CFG3, 0x40010ac3\r
- 4051                  .set CYREG_B0_P5_U1_CFG4, 0x40010ac4\r
- 4052                  .set CYREG_B0_P5_U1_CFG5, 0x40010ac5\r
- 4053                  .set CYREG_B0_P5_U1_CFG6, 0x40010ac6\r
- 4054                  .set CYREG_B0_P5_U1_CFG7, 0x40010ac7\r
- 4055                  .set CYREG_B0_P5_U1_CFG8, 0x40010ac8\r
- 4056                  .set CYREG_B0_P5_U1_CFG9, 0x40010ac9\r
- 4057                  .set CYREG_B0_P5_U1_CFG10, 0x40010aca\r
- 4058                  .set CYREG_B0_P5_U1_CFG11, 0x40010acb\r
- 4059                  .set CYREG_B0_P5_U1_CFG12, 0x40010acc\r
- 4060                  .set CYREG_B0_P5_U1_CFG13, 0x40010acd\r
- 4061                  .set CYREG_B0_P5_U1_CFG14, 0x40010ace\r
- 4062                  .set CYREG_B0_P5_U1_CFG15, 0x40010acf\r
- 4063                  .set CYREG_B0_P5_U1_CFG16, 0x40010ad0\r
- 4064                  .set CYREG_B0_P5_U1_CFG17, 0x40010ad1\r
- 4065                  .set CYREG_B0_P5_U1_CFG18, 0x40010ad2\r
- 4066                  .set CYREG_B0_P5_U1_CFG19, 0x40010ad3\r
- 4067                  .set CYREG_B0_P5_U1_CFG20, 0x40010ad4\r
- 4068                  .set CYREG_B0_P5_U1_CFG21, 0x40010ad5\r
- 4069                  .set CYREG_B0_P5_U1_CFG22, 0x40010ad6\r
- 4070                  .set CYREG_B0_P5_U1_CFG23, 0x40010ad7\r
- 4071                  .set CYREG_B0_P5_U1_CFG24, 0x40010ad8\r
- 4072                  .set CYREG_B0_P5_U1_CFG25, 0x40010ad9\r
- 4073                  .set CYREG_B0_P5_U1_CFG26, 0x40010ada\r
- 4074                  .set CYREG_B0_P5_U1_CFG27, 0x40010adb\r
- 4075                  .set CYREG_B0_P5_U1_CFG28, 0x40010adc\r
- 4076                  .set CYREG_B0_P5_U1_CFG29, 0x40010add\r
- 4077                  .set CYREG_B0_P5_U1_CFG30, 0x40010ade\r
- 4078                  .set CYREG_B0_P5_U1_CFG31, 0x40010adf\r
- 4079                  .set CYREG_B0_P5_U1_DCFG0, 0x40010ae0\r
- 4080                  .set CYREG_B0_P5_U1_DCFG1, 0x40010ae2\r
- 4081                  .set CYREG_B0_P5_U1_DCFG2, 0x40010ae4\r
- 4082                  .set CYREG_B0_P5_U1_DCFG3, 0x40010ae6\r
- 4083                  .set CYREG_B0_P5_U1_DCFG4, 0x40010ae8\r
- 4084                  .set CYREG_B0_P5_U1_DCFG5, 0x40010aea\r
- 4085                  .set CYREG_B0_P5_U1_DCFG6, 0x40010aec\r
- 4086                  .set CYREG_B0_P5_U1_DCFG7, 0x40010aee\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 167\r
-\r
-\r
- 4087                  .set CYDEV_UCFG_B0_P5_ROUTE_BASE, 0x40010b00\r
- 4088                  .set CYDEV_UCFG_B0_P5_ROUTE_SIZE, 0x000000ef\r
- 4089                  .set CYDEV_UCFG_B0_P6_BASE, 0x40010c00\r
- 4090                  .set CYDEV_UCFG_B0_P6_SIZE, 0x000001ef\r
- 4091                  .set CYDEV_UCFG_B0_P6_U0_BASE, 0x40010c00\r
- 4092                  .set CYDEV_UCFG_B0_P6_U0_SIZE, 0x00000070\r
- 4093                  .set CYREG_B0_P6_U0_PLD_IT0, 0x40010c00\r
- 4094                  .set CYREG_B0_P6_U0_PLD_IT1, 0x40010c04\r
- 4095                  .set CYREG_B0_P6_U0_PLD_IT2, 0x40010c08\r
- 4096                  .set CYREG_B0_P6_U0_PLD_IT3, 0x40010c0c\r
- 4097                  .set CYREG_B0_P6_U0_PLD_IT4, 0x40010c10\r
- 4098                  .set CYREG_B0_P6_U0_PLD_IT5, 0x40010c14\r
- 4099                  .set CYREG_B0_P6_U0_PLD_IT6, 0x40010c18\r
- 4100                  .set CYREG_B0_P6_U0_PLD_IT7, 0x40010c1c\r
- 4101                  .set CYREG_B0_P6_U0_PLD_IT8, 0x40010c20\r
- 4102                  .set CYREG_B0_P6_U0_PLD_IT9, 0x40010c24\r
- 4103                  .set CYREG_B0_P6_U0_PLD_IT10, 0x40010c28\r
- 4104                  .set CYREG_B0_P6_U0_PLD_IT11, 0x40010c2c\r
- 4105                  .set CYREG_B0_P6_U0_PLD_ORT0, 0x40010c30\r
- 4106                  .set CYREG_B0_P6_U0_PLD_ORT1, 0x40010c32\r
- 4107                  .set CYREG_B0_P6_U0_PLD_ORT2, 0x40010c34\r
- 4108                  .set CYREG_B0_P6_U0_PLD_ORT3, 0x40010c36\r
- 4109                  .set CYREG_B0_P6_U0_MC_CFG_CEN_CONST, 0x40010c38\r
- 4110                  .set CYREG_B0_P6_U0_MC_CFG_XORFB, 0x40010c3a\r
- 4111                  .set CYREG_B0_P6_U0_MC_CFG_SET_RESET, 0x40010c3c\r
- 4112                  .set CYREG_B0_P6_U0_MC_CFG_BYPASS, 0x40010c3e\r
- 4113                  .set CYREG_B0_P6_U0_CFG0, 0x40010c40\r
- 4114                  .set CYREG_B0_P6_U0_CFG1, 0x40010c41\r
- 4115                  .set CYREG_B0_P6_U0_CFG2, 0x40010c42\r
- 4116                  .set CYREG_B0_P6_U0_CFG3, 0x40010c43\r
- 4117                  .set CYREG_B0_P6_U0_CFG4, 0x40010c44\r
- 4118                  .set CYREG_B0_P6_U0_CFG5, 0x40010c45\r
- 4119                  .set CYREG_B0_P6_U0_CFG6, 0x40010c46\r
- 4120                  .set CYREG_B0_P6_U0_CFG7, 0x40010c47\r
- 4121                  .set CYREG_B0_P6_U0_CFG8, 0x40010c48\r
- 4122                  .set CYREG_B0_P6_U0_CFG9, 0x40010c49\r
- 4123                  .set CYREG_B0_P6_U0_CFG10, 0x40010c4a\r
- 4124                  .set CYREG_B0_P6_U0_CFG11, 0x40010c4b\r
- 4125                  .set CYREG_B0_P6_U0_CFG12, 0x40010c4c\r
- 4126                  .set CYREG_B0_P6_U0_CFG13, 0x40010c4d\r
- 4127                  .set CYREG_B0_P6_U0_CFG14, 0x40010c4e\r
- 4128                  .set CYREG_B0_P6_U0_CFG15, 0x40010c4f\r
- 4129                  .set CYREG_B0_P6_U0_CFG16, 0x40010c50\r
- 4130                  .set CYREG_B0_P6_U0_CFG17, 0x40010c51\r
- 4131                  .set CYREG_B0_P6_U0_CFG18, 0x40010c52\r
- 4132                  .set CYREG_B0_P6_U0_CFG19, 0x40010c53\r
- 4133                  .set CYREG_B0_P6_U0_CFG20, 0x40010c54\r
- 4134                  .set CYREG_B0_P6_U0_CFG21, 0x40010c55\r
- 4135                  .set CYREG_B0_P6_U0_CFG22, 0x40010c56\r
- 4136                  .set CYREG_B0_P6_U0_CFG23, 0x40010c57\r
- 4137                  .set CYREG_B0_P6_U0_CFG24, 0x40010c58\r
- 4138                  .set CYREG_B0_P6_U0_CFG25, 0x40010c59\r
- 4139                  .set CYREG_B0_P6_U0_CFG26, 0x40010c5a\r
- 4140                  .set CYREG_B0_P6_U0_CFG27, 0x40010c5b\r
- 4141                  .set CYREG_B0_P6_U0_CFG28, 0x40010c5c\r
- 4142                  .set CYREG_B0_P6_U0_CFG29, 0x40010c5d\r
- 4143                  .set CYREG_B0_P6_U0_CFG30, 0x40010c5e\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 168\r
-\r
-\r
- 4144                  .set CYREG_B0_P6_U0_CFG31, 0x40010c5f\r
- 4145                  .set CYREG_B0_P6_U0_DCFG0, 0x40010c60\r
- 4146                  .set CYREG_B0_P6_U0_DCFG1, 0x40010c62\r
- 4147                  .set CYREG_B0_P6_U0_DCFG2, 0x40010c64\r
- 4148                  .set CYREG_B0_P6_U0_DCFG3, 0x40010c66\r
- 4149                  .set CYREG_B0_P6_U0_DCFG4, 0x40010c68\r
- 4150                  .set CYREG_B0_P6_U0_DCFG5, 0x40010c6a\r
- 4151                  .set CYREG_B0_P6_U0_DCFG6, 0x40010c6c\r
- 4152                  .set CYREG_B0_P6_U0_DCFG7, 0x40010c6e\r
- 4153                  .set CYDEV_UCFG_B0_P6_U1_BASE, 0x40010c80\r
- 4154                  .set CYDEV_UCFG_B0_P6_U1_SIZE, 0x00000070\r
- 4155                  .set CYREG_B0_P6_U1_PLD_IT0, 0x40010c80\r
- 4156                  .set CYREG_B0_P6_U1_PLD_IT1, 0x40010c84\r
- 4157                  .set CYREG_B0_P6_U1_PLD_IT2, 0x40010c88\r
- 4158                  .set CYREG_B0_P6_U1_PLD_IT3, 0x40010c8c\r
- 4159                  .set CYREG_B0_P6_U1_PLD_IT4, 0x40010c90\r
- 4160                  .set CYREG_B0_P6_U1_PLD_IT5, 0x40010c94\r
- 4161                  .set CYREG_B0_P6_U1_PLD_IT6, 0x40010c98\r
- 4162                  .set CYREG_B0_P6_U1_PLD_IT7, 0x40010c9c\r
- 4163                  .set CYREG_B0_P6_U1_PLD_IT8, 0x40010ca0\r
- 4164                  .set CYREG_B0_P6_U1_PLD_IT9, 0x40010ca4\r
- 4165                  .set CYREG_B0_P6_U1_PLD_IT10, 0x40010ca8\r
- 4166                  .set CYREG_B0_P6_U1_PLD_IT11, 0x40010cac\r
- 4167                  .set CYREG_B0_P6_U1_PLD_ORT0, 0x40010cb0\r
- 4168                  .set CYREG_B0_P6_U1_PLD_ORT1, 0x40010cb2\r
- 4169                  .set CYREG_B0_P6_U1_PLD_ORT2, 0x40010cb4\r
- 4170                  .set CYREG_B0_P6_U1_PLD_ORT3, 0x40010cb6\r
- 4171                  .set CYREG_B0_P6_U1_MC_CFG_CEN_CONST, 0x40010cb8\r
- 4172                  .set CYREG_B0_P6_U1_MC_CFG_XORFB, 0x40010cba\r
- 4173                  .set CYREG_B0_P6_U1_MC_CFG_SET_RESET, 0x40010cbc\r
- 4174                  .set CYREG_B0_P6_U1_MC_CFG_BYPASS, 0x40010cbe\r
- 4175                  .set CYREG_B0_P6_U1_CFG0, 0x40010cc0\r
- 4176                  .set CYREG_B0_P6_U1_CFG1, 0x40010cc1\r
- 4177                  .set CYREG_B0_P6_U1_CFG2, 0x40010cc2\r
- 4178                  .set CYREG_B0_P6_U1_CFG3, 0x40010cc3\r
- 4179                  .set CYREG_B0_P6_U1_CFG4, 0x40010cc4\r
- 4180                  .set CYREG_B0_P6_U1_CFG5, 0x40010cc5\r
- 4181                  .set CYREG_B0_P6_U1_CFG6, 0x40010cc6\r
- 4182                  .set CYREG_B0_P6_U1_CFG7, 0x40010cc7\r
- 4183                  .set CYREG_B0_P6_U1_CFG8, 0x40010cc8\r
- 4184                  .set CYREG_B0_P6_U1_CFG9, 0x40010cc9\r
- 4185                  .set CYREG_B0_P6_U1_CFG10, 0x40010cca\r
- 4186                  .set CYREG_B0_P6_U1_CFG11, 0x40010ccb\r
- 4187                  .set CYREG_B0_P6_U1_CFG12, 0x40010ccc\r
- 4188                  .set CYREG_B0_P6_U1_CFG13, 0x40010ccd\r
- 4189                  .set CYREG_B0_P6_U1_CFG14, 0x40010cce\r
- 4190                  .set CYREG_B0_P6_U1_CFG15, 0x40010ccf\r
- 4191                  .set CYREG_B0_P6_U1_CFG16, 0x40010cd0\r
- 4192                  .set CYREG_B0_P6_U1_CFG17, 0x40010cd1\r
- 4193                  .set CYREG_B0_P6_U1_CFG18, 0x40010cd2\r
- 4194                  .set CYREG_B0_P6_U1_CFG19, 0x40010cd3\r
- 4195                  .set CYREG_B0_P6_U1_CFG20, 0x40010cd4\r
- 4196                  .set CYREG_B0_P6_U1_CFG21, 0x40010cd5\r
- 4197                  .set CYREG_B0_P6_U1_CFG22, 0x40010cd6\r
- 4198                  .set CYREG_B0_P6_U1_CFG23, 0x40010cd7\r
- 4199                  .set CYREG_B0_P6_U1_CFG24, 0x40010cd8\r
- 4200                  .set CYREG_B0_P6_U1_CFG25, 0x40010cd9\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 169\r
-\r
-\r
- 4201                  .set CYREG_B0_P6_U1_CFG26, 0x40010cda\r
- 4202                  .set CYREG_B0_P6_U1_CFG27, 0x40010cdb\r
- 4203                  .set CYREG_B0_P6_U1_CFG28, 0x40010cdc\r
- 4204                  .set CYREG_B0_P6_U1_CFG29, 0x40010cdd\r
- 4205                  .set CYREG_B0_P6_U1_CFG30, 0x40010cde\r
- 4206                  .set CYREG_B0_P6_U1_CFG31, 0x40010cdf\r
- 4207                  .set CYREG_B0_P6_U1_DCFG0, 0x40010ce0\r
- 4208                  .set CYREG_B0_P6_U1_DCFG1, 0x40010ce2\r
- 4209                  .set CYREG_B0_P6_U1_DCFG2, 0x40010ce4\r
- 4210                  .set CYREG_B0_P6_U1_DCFG3, 0x40010ce6\r
- 4211                  .set CYREG_B0_P6_U1_DCFG4, 0x40010ce8\r
- 4212                  .set CYREG_B0_P6_U1_DCFG5, 0x40010cea\r
- 4213                  .set CYREG_B0_P6_U1_DCFG6, 0x40010cec\r
- 4214                  .set CYREG_B0_P6_U1_DCFG7, 0x40010cee\r
- 4215                  .set CYDEV_UCFG_B0_P6_ROUTE_BASE, 0x40010d00\r
- 4216                  .set CYDEV_UCFG_B0_P6_ROUTE_SIZE, 0x000000ef\r
- 4217                  .set CYDEV_UCFG_B0_P7_BASE, 0x40010e00\r
- 4218                  .set CYDEV_UCFG_B0_P7_SIZE, 0x000001ef\r
- 4219                  .set CYDEV_UCFG_B0_P7_U0_BASE, 0x40010e00\r
- 4220                  .set CYDEV_UCFG_B0_P7_U0_SIZE, 0x00000070\r
- 4221                  .set CYREG_B0_P7_U0_PLD_IT0, 0x40010e00\r
- 4222                  .set CYREG_B0_P7_U0_PLD_IT1, 0x40010e04\r
- 4223                  .set CYREG_B0_P7_U0_PLD_IT2, 0x40010e08\r
- 4224                  .set CYREG_B0_P7_U0_PLD_IT3, 0x40010e0c\r
- 4225                  .set CYREG_B0_P7_U0_PLD_IT4, 0x40010e10\r
- 4226                  .set CYREG_B0_P7_U0_PLD_IT5, 0x40010e14\r
- 4227                  .set CYREG_B0_P7_U0_PLD_IT6, 0x40010e18\r
- 4228                  .set CYREG_B0_P7_U0_PLD_IT7, 0x40010e1c\r
- 4229                  .set CYREG_B0_P7_U0_PLD_IT8, 0x40010e20\r
- 4230                  .set CYREG_B0_P7_U0_PLD_IT9, 0x40010e24\r
- 4231                  .set CYREG_B0_P7_U0_PLD_IT10, 0x40010e28\r
- 4232                  .set CYREG_B0_P7_U0_PLD_IT11, 0x40010e2c\r
- 4233                  .set CYREG_B0_P7_U0_PLD_ORT0, 0x40010e30\r
- 4234                  .set CYREG_B0_P7_U0_PLD_ORT1, 0x40010e32\r
- 4235                  .set CYREG_B0_P7_U0_PLD_ORT2, 0x40010e34\r
- 4236                  .set CYREG_B0_P7_U0_PLD_ORT3, 0x40010e36\r
- 4237                  .set CYREG_B0_P7_U0_MC_CFG_CEN_CONST, 0x40010e38\r
- 4238                  .set CYREG_B0_P7_U0_MC_CFG_XORFB, 0x40010e3a\r
- 4239                  .set CYREG_B0_P7_U0_MC_CFG_SET_RESET, 0x40010e3c\r
- 4240                  .set CYREG_B0_P7_U0_MC_CFG_BYPASS, 0x40010e3e\r
- 4241                  .set CYREG_B0_P7_U0_CFG0, 0x40010e40\r
- 4242                  .set CYREG_B0_P7_U0_CFG1, 0x40010e41\r
- 4243                  .set CYREG_B0_P7_U0_CFG2, 0x40010e42\r
- 4244                  .set CYREG_B0_P7_U0_CFG3, 0x40010e43\r
- 4245                  .set CYREG_B0_P7_U0_CFG4, 0x40010e44\r
- 4246                  .set CYREG_B0_P7_U0_CFG5, 0x40010e45\r
- 4247                  .set CYREG_B0_P7_U0_CFG6, 0x40010e46\r
- 4248                  .set CYREG_B0_P7_U0_CFG7, 0x40010e47\r
- 4249                  .set CYREG_B0_P7_U0_CFG8, 0x40010e48\r
- 4250                  .set CYREG_B0_P7_U0_CFG9, 0x40010e49\r
- 4251                  .set CYREG_B0_P7_U0_CFG10, 0x40010e4a\r
- 4252                  .set CYREG_B0_P7_U0_CFG11, 0x40010e4b\r
- 4253                  .set CYREG_B0_P7_U0_CFG12, 0x40010e4c\r
- 4254                  .set CYREG_B0_P7_U0_CFG13, 0x40010e4d\r
- 4255                  .set CYREG_B0_P7_U0_CFG14, 0x40010e4e\r
- 4256                  .set CYREG_B0_P7_U0_CFG15, 0x40010e4f\r
- 4257                  .set CYREG_B0_P7_U0_CFG16, 0x40010e50\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 170\r
-\r
-\r
- 4258                  .set CYREG_B0_P7_U0_CFG17, 0x40010e51\r
- 4259                  .set CYREG_B0_P7_U0_CFG18, 0x40010e52\r
- 4260                  .set CYREG_B0_P7_U0_CFG19, 0x40010e53\r
- 4261                  .set CYREG_B0_P7_U0_CFG20, 0x40010e54\r
- 4262                  .set CYREG_B0_P7_U0_CFG21, 0x40010e55\r
- 4263                  .set CYREG_B0_P7_U0_CFG22, 0x40010e56\r
- 4264                  .set CYREG_B0_P7_U0_CFG23, 0x40010e57\r
- 4265                  .set CYREG_B0_P7_U0_CFG24, 0x40010e58\r
- 4266                  .set CYREG_B0_P7_U0_CFG25, 0x40010e59\r
- 4267                  .set CYREG_B0_P7_U0_CFG26, 0x40010e5a\r
- 4268                  .set CYREG_B0_P7_U0_CFG27, 0x40010e5b\r
- 4269                  .set CYREG_B0_P7_U0_CFG28, 0x40010e5c\r
- 4270                  .set CYREG_B0_P7_U0_CFG29, 0x40010e5d\r
- 4271                  .set CYREG_B0_P7_U0_CFG30, 0x40010e5e\r
- 4272                  .set CYREG_B0_P7_U0_CFG31, 0x40010e5f\r
- 4273                  .set CYREG_B0_P7_U0_DCFG0, 0x40010e60\r
- 4274                  .set CYREG_B0_P7_U0_DCFG1, 0x40010e62\r
- 4275                  .set CYREG_B0_P7_U0_DCFG2, 0x40010e64\r
- 4276                  .set CYREG_B0_P7_U0_DCFG3, 0x40010e66\r
- 4277                  .set CYREG_B0_P7_U0_DCFG4, 0x40010e68\r
- 4278                  .set CYREG_B0_P7_U0_DCFG5, 0x40010e6a\r
- 4279                  .set CYREG_B0_P7_U0_DCFG6, 0x40010e6c\r
- 4280                  .set CYREG_B0_P7_U0_DCFG7, 0x40010e6e\r
- 4281                  .set CYDEV_UCFG_B0_P7_U1_BASE, 0x40010e80\r
- 4282                  .set CYDEV_UCFG_B0_P7_U1_SIZE, 0x00000070\r
- 4283                  .set CYREG_B0_P7_U1_PLD_IT0, 0x40010e80\r
- 4284                  .set CYREG_B0_P7_U1_PLD_IT1, 0x40010e84\r
- 4285                  .set CYREG_B0_P7_U1_PLD_IT2, 0x40010e88\r
- 4286                  .set CYREG_B0_P7_U1_PLD_IT3, 0x40010e8c\r
- 4287                  .set CYREG_B0_P7_U1_PLD_IT4, 0x40010e90\r
- 4288                  .set CYREG_B0_P7_U1_PLD_IT5, 0x40010e94\r
- 4289                  .set CYREG_B0_P7_U1_PLD_IT6, 0x40010e98\r
- 4290                  .set CYREG_B0_P7_U1_PLD_IT7, 0x40010e9c\r
- 4291                  .set CYREG_B0_P7_U1_PLD_IT8, 0x40010ea0\r
- 4292                  .set CYREG_B0_P7_U1_PLD_IT9, 0x40010ea4\r
- 4293                  .set CYREG_B0_P7_U1_PLD_IT10, 0x40010ea8\r
- 4294                  .set CYREG_B0_P7_U1_PLD_IT11, 0x40010eac\r
- 4295                  .set CYREG_B0_P7_U1_PLD_ORT0, 0x40010eb0\r
- 4296                  .set CYREG_B0_P7_U1_PLD_ORT1, 0x40010eb2\r
- 4297                  .set CYREG_B0_P7_U1_PLD_ORT2, 0x40010eb4\r
- 4298                  .set CYREG_B0_P7_U1_PLD_ORT3, 0x40010eb6\r
- 4299                  .set CYREG_B0_P7_U1_MC_CFG_CEN_CONST, 0x40010eb8\r
- 4300                  .set CYREG_B0_P7_U1_MC_CFG_XORFB, 0x40010eba\r
- 4301                  .set CYREG_B0_P7_U1_MC_CFG_SET_RESET, 0x40010ebc\r
- 4302                  .set CYREG_B0_P7_U1_MC_CFG_BYPASS, 0x40010ebe\r
- 4303                  .set CYREG_B0_P7_U1_CFG0, 0x40010ec0\r
- 4304                  .set CYREG_B0_P7_U1_CFG1, 0x40010ec1\r
- 4305                  .set CYREG_B0_P7_U1_CFG2, 0x40010ec2\r
- 4306                  .set CYREG_B0_P7_U1_CFG3, 0x40010ec3\r
- 4307                  .set CYREG_B0_P7_U1_CFG4, 0x40010ec4\r
- 4308                  .set CYREG_B0_P7_U1_CFG5, 0x40010ec5\r
- 4309                  .set CYREG_B0_P7_U1_CFG6, 0x40010ec6\r
- 4310                  .set CYREG_B0_P7_U1_CFG7, 0x40010ec7\r
- 4311                  .set CYREG_B0_P7_U1_CFG8, 0x40010ec8\r
- 4312                  .set CYREG_B0_P7_U1_CFG9, 0x40010ec9\r
- 4313                  .set CYREG_B0_P7_U1_CFG10, 0x40010eca\r
- 4314                  .set CYREG_B0_P7_U1_CFG11, 0x40010ecb\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 171\r
-\r
-\r
- 4315                  .set CYREG_B0_P7_U1_CFG12, 0x40010ecc\r
- 4316                  .set CYREG_B0_P7_U1_CFG13, 0x40010ecd\r
- 4317                  .set CYREG_B0_P7_U1_CFG14, 0x40010ece\r
- 4318                  .set CYREG_B0_P7_U1_CFG15, 0x40010ecf\r
- 4319                  .set CYREG_B0_P7_U1_CFG16, 0x40010ed0\r
- 4320                  .set CYREG_B0_P7_U1_CFG17, 0x40010ed1\r
- 4321                  .set CYREG_B0_P7_U1_CFG18, 0x40010ed2\r
- 4322                  .set CYREG_B0_P7_U1_CFG19, 0x40010ed3\r
- 4323                  .set CYREG_B0_P7_U1_CFG20, 0x40010ed4\r
- 4324                  .set CYREG_B0_P7_U1_CFG21, 0x40010ed5\r
- 4325                  .set CYREG_B0_P7_U1_CFG22, 0x40010ed6\r
- 4326                  .set CYREG_B0_P7_U1_CFG23, 0x40010ed7\r
- 4327                  .set CYREG_B0_P7_U1_CFG24, 0x40010ed8\r
- 4328                  .set CYREG_B0_P7_U1_CFG25, 0x40010ed9\r
- 4329                  .set CYREG_B0_P7_U1_CFG26, 0x40010eda\r
- 4330                  .set CYREG_B0_P7_U1_CFG27, 0x40010edb\r
- 4331                  .set CYREG_B0_P7_U1_CFG28, 0x40010edc\r
- 4332                  .set CYREG_B0_P7_U1_CFG29, 0x40010edd\r
- 4333                  .set CYREG_B0_P7_U1_CFG30, 0x40010ede\r
- 4334                  .set CYREG_B0_P7_U1_CFG31, 0x40010edf\r
- 4335                  .set CYREG_B0_P7_U1_DCFG0, 0x40010ee0\r
- 4336                  .set CYREG_B0_P7_U1_DCFG1, 0x40010ee2\r
- 4337                  .set CYREG_B0_P7_U1_DCFG2, 0x40010ee4\r
- 4338                  .set CYREG_B0_P7_U1_DCFG3, 0x40010ee6\r
- 4339                  .set CYREG_B0_P7_U1_DCFG4, 0x40010ee8\r
- 4340                  .set CYREG_B0_P7_U1_DCFG5, 0x40010eea\r
- 4341                  .set CYREG_B0_P7_U1_DCFG6, 0x40010eec\r
- 4342                  .set CYREG_B0_P7_U1_DCFG7, 0x40010eee\r
- 4343                  .set CYDEV_UCFG_B0_P7_ROUTE_BASE, 0x40010f00\r
- 4344                  .set CYDEV_UCFG_B0_P7_ROUTE_SIZE, 0x000000ef\r
- 4345                  .set CYDEV_UCFG_B1_BASE, 0x40011000\r
- 4346                  .set CYDEV_UCFG_B1_SIZE, 0x00000fef\r
- 4347                  .set CYDEV_UCFG_B1_P2_BASE, 0x40011400\r
- 4348                  .set CYDEV_UCFG_B1_P2_SIZE, 0x000001ef\r
- 4349                  .set CYDEV_UCFG_B1_P2_U0_BASE, 0x40011400\r
- 4350                  .set CYDEV_UCFG_B1_P2_U0_SIZE, 0x00000070\r
- 4351                  .set CYREG_B1_P2_U0_PLD_IT0, 0x40011400\r
- 4352                  .set CYREG_B1_P2_U0_PLD_IT1, 0x40011404\r
- 4353                  .set CYREG_B1_P2_U0_PLD_IT2, 0x40011408\r
- 4354                  .set CYREG_B1_P2_U0_PLD_IT3, 0x4001140c\r
- 4355                  .set CYREG_B1_P2_U0_PLD_IT4, 0x40011410\r
- 4356                  .set CYREG_B1_P2_U0_PLD_IT5, 0x40011414\r
- 4357                  .set CYREG_B1_P2_U0_PLD_IT6, 0x40011418\r
- 4358                  .set CYREG_B1_P2_U0_PLD_IT7, 0x4001141c\r
- 4359                  .set CYREG_B1_P2_U0_PLD_IT8, 0x40011420\r
- 4360                  .set CYREG_B1_P2_U0_PLD_IT9, 0x40011424\r
- 4361                  .set CYREG_B1_P2_U0_PLD_IT10, 0x40011428\r
- 4362                  .set CYREG_B1_P2_U0_PLD_IT11, 0x4001142c\r
- 4363                  .set CYREG_B1_P2_U0_PLD_ORT0, 0x40011430\r
- 4364                  .set CYREG_B1_P2_U0_PLD_ORT1, 0x40011432\r
- 4365                  .set CYREG_B1_P2_U0_PLD_ORT2, 0x40011434\r
- 4366                  .set CYREG_B1_P2_U0_PLD_ORT3, 0x40011436\r
- 4367                  .set CYREG_B1_P2_U0_MC_CFG_CEN_CONST, 0x40011438\r
- 4368                  .set CYREG_B1_P2_U0_MC_CFG_XORFB, 0x4001143a\r
- 4369                  .set CYREG_B1_P2_U0_MC_CFG_SET_RESET, 0x4001143c\r
- 4370                  .set CYREG_B1_P2_U0_MC_CFG_BYPASS, 0x4001143e\r
- 4371                  .set CYREG_B1_P2_U0_CFG0, 0x40011440\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 172\r
-\r
-\r
- 4372                  .set CYREG_B1_P2_U0_CFG1, 0x40011441\r
- 4373                  .set CYREG_B1_P2_U0_CFG2, 0x40011442\r
- 4374                  .set CYREG_B1_P2_U0_CFG3, 0x40011443\r
- 4375                  .set CYREG_B1_P2_U0_CFG4, 0x40011444\r
- 4376                  .set CYREG_B1_P2_U0_CFG5, 0x40011445\r
- 4377                  .set CYREG_B1_P2_U0_CFG6, 0x40011446\r
- 4378                  .set CYREG_B1_P2_U0_CFG7, 0x40011447\r
- 4379                  .set CYREG_B1_P2_U0_CFG8, 0x40011448\r
- 4380                  .set CYREG_B1_P2_U0_CFG9, 0x40011449\r
- 4381                  .set CYREG_B1_P2_U0_CFG10, 0x4001144a\r
- 4382                  .set CYREG_B1_P2_U0_CFG11, 0x4001144b\r
- 4383                  .set CYREG_B1_P2_U0_CFG12, 0x4001144c\r
- 4384                  .set CYREG_B1_P2_U0_CFG13, 0x4001144d\r
- 4385                  .set CYREG_B1_P2_U0_CFG14, 0x4001144e\r
- 4386                  .set CYREG_B1_P2_U0_CFG15, 0x4001144f\r
- 4387                  .set CYREG_B1_P2_U0_CFG16, 0x40011450\r
- 4388                  .set CYREG_B1_P2_U0_CFG17, 0x40011451\r
- 4389                  .set CYREG_B1_P2_U0_CFG18, 0x40011452\r
- 4390                  .set CYREG_B1_P2_U0_CFG19, 0x40011453\r
- 4391                  .set CYREG_B1_P2_U0_CFG20, 0x40011454\r
- 4392                  .set CYREG_B1_P2_U0_CFG21, 0x40011455\r
- 4393                  .set CYREG_B1_P2_U0_CFG22, 0x40011456\r
- 4394                  .set CYREG_B1_P2_U0_CFG23, 0x40011457\r
- 4395                  .set CYREG_B1_P2_U0_CFG24, 0x40011458\r
- 4396                  .set CYREG_B1_P2_U0_CFG25, 0x40011459\r
- 4397                  .set CYREG_B1_P2_U0_CFG26, 0x4001145a\r
- 4398                  .set CYREG_B1_P2_U0_CFG27, 0x4001145b\r
- 4399                  .set CYREG_B1_P2_U0_CFG28, 0x4001145c\r
- 4400                  .set CYREG_B1_P2_U0_CFG29, 0x4001145d\r
- 4401                  .set CYREG_B1_P2_U0_CFG30, 0x4001145e\r
- 4402                  .set CYREG_B1_P2_U0_CFG31, 0x4001145f\r
- 4403                  .set CYREG_B1_P2_U0_DCFG0, 0x40011460\r
- 4404                  .set CYREG_B1_P2_U0_DCFG1, 0x40011462\r
- 4405                  .set CYREG_B1_P2_U0_DCFG2, 0x40011464\r
- 4406                  .set CYREG_B1_P2_U0_DCFG3, 0x40011466\r
- 4407                  .set CYREG_B1_P2_U0_DCFG4, 0x40011468\r
- 4408                  .set CYREG_B1_P2_U0_DCFG5, 0x4001146a\r
- 4409                  .set CYREG_B1_P2_U0_DCFG6, 0x4001146c\r
- 4410                  .set CYREG_B1_P2_U0_DCFG7, 0x4001146e\r
- 4411                  .set CYDEV_UCFG_B1_P2_U1_BASE, 0x40011480\r
- 4412                  .set CYDEV_UCFG_B1_P2_U1_SIZE, 0x00000070\r
- 4413                  .set CYREG_B1_P2_U1_PLD_IT0, 0x40011480\r
- 4414                  .set CYREG_B1_P2_U1_PLD_IT1, 0x40011484\r
- 4415                  .set CYREG_B1_P2_U1_PLD_IT2, 0x40011488\r
- 4416                  .set CYREG_B1_P2_U1_PLD_IT3, 0x4001148c\r
- 4417                  .set CYREG_B1_P2_U1_PLD_IT4, 0x40011490\r
- 4418                  .set CYREG_B1_P2_U1_PLD_IT5, 0x40011494\r
- 4419                  .set CYREG_B1_P2_U1_PLD_IT6, 0x40011498\r
- 4420                  .set CYREG_B1_P2_U1_PLD_IT7, 0x4001149c\r
- 4421                  .set CYREG_B1_P2_U1_PLD_IT8, 0x400114a0\r
- 4422                  .set CYREG_B1_P2_U1_PLD_IT9, 0x400114a4\r
- 4423                  .set CYREG_B1_P2_U1_PLD_IT10, 0x400114a8\r
- 4424                  .set CYREG_B1_P2_U1_PLD_IT11, 0x400114ac\r
- 4425                  .set CYREG_B1_P2_U1_PLD_ORT0, 0x400114b0\r
- 4426                  .set CYREG_B1_P2_U1_PLD_ORT1, 0x400114b2\r
- 4427                  .set CYREG_B1_P2_U1_PLD_ORT2, 0x400114b4\r
- 4428                  .set CYREG_B1_P2_U1_PLD_ORT3, 0x400114b6\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 173\r
-\r
-\r
- 4429                  .set CYREG_B1_P2_U1_MC_CFG_CEN_CONST, 0x400114b8\r
- 4430                  .set CYREG_B1_P2_U1_MC_CFG_XORFB, 0x400114ba\r
- 4431                  .set CYREG_B1_P2_U1_MC_CFG_SET_RESET, 0x400114bc\r
- 4432                  .set CYREG_B1_P2_U1_MC_CFG_BYPASS, 0x400114be\r
- 4433                  .set CYREG_B1_P2_U1_CFG0, 0x400114c0\r
- 4434                  .set CYREG_B1_P2_U1_CFG1, 0x400114c1\r
- 4435                  .set CYREG_B1_P2_U1_CFG2, 0x400114c2\r
- 4436                  .set CYREG_B1_P2_U1_CFG3, 0x400114c3\r
- 4437                  .set CYREG_B1_P2_U1_CFG4, 0x400114c4\r
- 4438                  .set CYREG_B1_P2_U1_CFG5, 0x400114c5\r
- 4439                  .set CYREG_B1_P2_U1_CFG6, 0x400114c6\r
- 4440                  .set CYREG_B1_P2_U1_CFG7, 0x400114c7\r
- 4441                  .set CYREG_B1_P2_U1_CFG8, 0x400114c8\r
- 4442                  .set CYREG_B1_P2_U1_CFG9, 0x400114c9\r
- 4443                  .set CYREG_B1_P2_U1_CFG10, 0x400114ca\r
- 4444                  .set CYREG_B1_P2_U1_CFG11, 0x400114cb\r
- 4445                  .set CYREG_B1_P2_U1_CFG12, 0x400114cc\r
- 4446                  .set CYREG_B1_P2_U1_CFG13, 0x400114cd\r
- 4447                  .set CYREG_B1_P2_U1_CFG14, 0x400114ce\r
- 4448                  .set CYREG_B1_P2_U1_CFG15, 0x400114cf\r
- 4449                  .set CYREG_B1_P2_U1_CFG16, 0x400114d0\r
- 4450                  .set CYREG_B1_P2_U1_CFG17, 0x400114d1\r
- 4451                  .set CYREG_B1_P2_U1_CFG18, 0x400114d2\r
- 4452                  .set CYREG_B1_P2_U1_CFG19, 0x400114d3\r
- 4453                  .set CYREG_B1_P2_U1_CFG20, 0x400114d4\r
- 4454                  .set CYREG_B1_P2_U1_CFG21, 0x400114d5\r
- 4455                  .set CYREG_B1_P2_U1_CFG22, 0x400114d6\r
- 4456                  .set CYREG_B1_P2_U1_CFG23, 0x400114d7\r
- 4457                  .set CYREG_B1_P2_U1_CFG24, 0x400114d8\r
- 4458                  .set CYREG_B1_P2_U1_CFG25, 0x400114d9\r
- 4459                  .set CYREG_B1_P2_U1_CFG26, 0x400114da\r
- 4460                  .set CYREG_B1_P2_U1_CFG27, 0x400114db\r
- 4461                  .set CYREG_B1_P2_U1_CFG28, 0x400114dc\r
- 4462                  .set CYREG_B1_P2_U1_CFG29, 0x400114dd\r
- 4463                  .set CYREG_B1_P2_U1_CFG30, 0x400114de\r
- 4464                  .set CYREG_B1_P2_U1_CFG31, 0x400114df\r
- 4465                  .set CYREG_B1_P2_U1_DCFG0, 0x400114e0\r
- 4466                  .set CYREG_B1_P2_U1_DCFG1, 0x400114e2\r
- 4467                  .set CYREG_B1_P2_U1_DCFG2, 0x400114e4\r
- 4468                  .set CYREG_B1_P2_U1_DCFG3, 0x400114e6\r
- 4469                  .set CYREG_B1_P2_U1_DCFG4, 0x400114e8\r
- 4470                  .set CYREG_B1_P2_U1_DCFG5, 0x400114ea\r
- 4471                  .set CYREG_B1_P2_U1_DCFG6, 0x400114ec\r
- 4472                  .set CYREG_B1_P2_U1_DCFG7, 0x400114ee\r
- 4473                  .set CYDEV_UCFG_B1_P2_ROUTE_BASE, 0x40011500\r
- 4474                  .set CYDEV_UCFG_B1_P2_ROUTE_SIZE, 0x000000ef\r
- 4475                  .set CYDEV_UCFG_B1_P3_BASE, 0x40011600\r
- 4476                  .set CYDEV_UCFG_B1_P3_SIZE, 0x000001ef\r
- 4477                  .set CYDEV_UCFG_B1_P3_U0_BASE, 0x40011600\r
- 4478                  .set CYDEV_UCFG_B1_P3_U0_SIZE, 0x00000070\r
- 4479                  .set CYREG_B1_P3_U0_PLD_IT0, 0x40011600\r
- 4480                  .set CYREG_B1_P3_U0_PLD_IT1, 0x40011604\r
- 4481                  .set CYREG_B1_P3_U0_PLD_IT2, 0x40011608\r
- 4482                  .set CYREG_B1_P3_U0_PLD_IT3, 0x4001160c\r
- 4483                  .set CYREG_B1_P3_U0_PLD_IT4, 0x40011610\r
- 4484                  .set CYREG_B1_P3_U0_PLD_IT5, 0x40011614\r
- 4485                  .set CYREG_B1_P3_U0_PLD_IT6, 0x40011618\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 174\r
-\r
-\r
- 4486                  .set CYREG_B1_P3_U0_PLD_IT7, 0x4001161c\r
- 4487                  .set CYREG_B1_P3_U0_PLD_IT8, 0x40011620\r
- 4488                  .set CYREG_B1_P3_U0_PLD_IT9, 0x40011624\r
- 4489                  .set CYREG_B1_P3_U0_PLD_IT10, 0x40011628\r
- 4490                  .set CYREG_B1_P3_U0_PLD_IT11, 0x4001162c\r
- 4491                  .set CYREG_B1_P3_U0_PLD_ORT0, 0x40011630\r
- 4492                  .set CYREG_B1_P3_U0_PLD_ORT1, 0x40011632\r
- 4493                  .set CYREG_B1_P3_U0_PLD_ORT2, 0x40011634\r
- 4494                  .set CYREG_B1_P3_U0_PLD_ORT3, 0x40011636\r
- 4495                  .set CYREG_B1_P3_U0_MC_CFG_CEN_CONST, 0x40011638\r
- 4496                  .set CYREG_B1_P3_U0_MC_CFG_XORFB, 0x4001163a\r
- 4497                  .set CYREG_B1_P3_U0_MC_CFG_SET_RESET, 0x4001163c\r
- 4498                  .set CYREG_B1_P3_U0_MC_CFG_BYPASS, 0x4001163e\r
- 4499                  .set CYREG_B1_P3_U0_CFG0, 0x40011640\r
- 4500                  .set CYREG_B1_P3_U0_CFG1, 0x40011641\r
- 4501                  .set CYREG_B1_P3_U0_CFG2, 0x40011642\r
- 4502                  .set CYREG_B1_P3_U0_CFG3, 0x40011643\r
- 4503                  .set CYREG_B1_P3_U0_CFG4, 0x40011644\r
- 4504                  .set CYREG_B1_P3_U0_CFG5, 0x40011645\r
- 4505                  .set CYREG_B1_P3_U0_CFG6, 0x40011646\r
- 4506                  .set CYREG_B1_P3_U0_CFG7, 0x40011647\r
- 4507                  .set CYREG_B1_P3_U0_CFG8, 0x40011648\r
- 4508                  .set CYREG_B1_P3_U0_CFG9, 0x40011649\r
- 4509                  .set CYREG_B1_P3_U0_CFG10, 0x4001164a\r
- 4510                  .set CYREG_B1_P3_U0_CFG11, 0x4001164b\r
- 4511                  .set CYREG_B1_P3_U0_CFG12, 0x4001164c\r
- 4512                  .set CYREG_B1_P3_U0_CFG13, 0x4001164d\r
- 4513                  .set CYREG_B1_P3_U0_CFG14, 0x4001164e\r
- 4514                  .set CYREG_B1_P3_U0_CFG15, 0x4001164f\r
- 4515                  .set CYREG_B1_P3_U0_CFG16, 0x40011650\r
- 4516                  .set CYREG_B1_P3_U0_CFG17, 0x40011651\r
- 4517                  .set CYREG_B1_P3_U0_CFG18, 0x40011652\r
- 4518                  .set CYREG_B1_P3_U0_CFG19, 0x40011653\r
- 4519                  .set CYREG_B1_P3_U0_CFG20, 0x40011654\r
- 4520                  .set CYREG_B1_P3_U0_CFG21, 0x40011655\r
- 4521                  .set CYREG_B1_P3_U0_CFG22, 0x40011656\r
- 4522                  .set CYREG_B1_P3_U0_CFG23, 0x40011657\r
- 4523                  .set CYREG_B1_P3_U0_CFG24, 0x40011658\r
- 4524                  .set CYREG_B1_P3_U0_CFG25, 0x40011659\r
- 4525                  .set CYREG_B1_P3_U0_CFG26, 0x4001165a\r
- 4526                  .set CYREG_B1_P3_U0_CFG27, 0x4001165b\r
- 4527                  .set CYREG_B1_P3_U0_CFG28, 0x4001165c\r
- 4528                  .set CYREG_B1_P3_U0_CFG29, 0x4001165d\r
- 4529                  .set CYREG_B1_P3_U0_CFG30, 0x4001165e\r
- 4530                  .set CYREG_B1_P3_U0_CFG31, 0x4001165f\r
- 4531                  .set CYREG_B1_P3_U0_DCFG0, 0x40011660\r
- 4532                  .set CYREG_B1_P3_U0_DCFG1, 0x40011662\r
- 4533                  .set CYREG_B1_P3_U0_DCFG2, 0x40011664\r
- 4534                  .set CYREG_B1_P3_U0_DCFG3, 0x40011666\r
- 4535                  .set CYREG_B1_P3_U0_DCFG4, 0x40011668\r
- 4536                  .set CYREG_B1_P3_U0_DCFG5, 0x4001166a\r
- 4537                  .set CYREG_B1_P3_U0_DCFG6, 0x4001166c\r
- 4538                  .set CYREG_B1_P3_U0_DCFG7, 0x4001166e\r
- 4539                  .set CYDEV_UCFG_B1_P3_U1_BASE, 0x40011680\r
- 4540                  .set CYDEV_UCFG_B1_P3_U1_SIZE, 0x00000070\r
- 4541                  .set CYREG_B1_P3_U1_PLD_IT0, 0x40011680\r
- 4542                  .set CYREG_B1_P3_U1_PLD_IT1, 0x40011684\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 175\r
-\r
-\r
- 4543                  .set CYREG_B1_P3_U1_PLD_IT2, 0x40011688\r
- 4544                  .set CYREG_B1_P3_U1_PLD_IT3, 0x4001168c\r
- 4545                  .set CYREG_B1_P3_U1_PLD_IT4, 0x40011690\r
- 4546                  .set CYREG_B1_P3_U1_PLD_IT5, 0x40011694\r
- 4547                  .set CYREG_B1_P3_U1_PLD_IT6, 0x40011698\r
- 4548                  .set CYREG_B1_P3_U1_PLD_IT7, 0x4001169c\r
- 4549                  .set CYREG_B1_P3_U1_PLD_IT8, 0x400116a0\r
- 4550                  .set CYREG_B1_P3_U1_PLD_IT9, 0x400116a4\r
- 4551                  .set CYREG_B1_P3_U1_PLD_IT10, 0x400116a8\r
- 4552                  .set CYREG_B1_P3_U1_PLD_IT11, 0x400116ac\r
- 4553                  .set CYREG_B1_P3_U1_PLD_ORT0, 0x400116b0\r
- 4554                  .set CYREG_B1_P3_U1_PLD_ORT1, 0x400116b2\r
- 4555                  .set CYREG_B1_P3_U1_PLD_ORT2, 0x400116b4\r
- 4556                  .set CYREG_B1_P3_U1_PLD_ORT3, 0x400116b6\r
- 4557                  .set CYREG_B1_P3_U1_MC_CFG_CEN_CONST, 0x400116b8\r
- 4558                  .set CYREG_B1_P3_U1_MC_CFG_XORFB, 0x400116ba\r
- 4559                  .set CYREG_B1_P3_U1_MC_CFG_SET_RESET, 0x400116bc\r
- 4560                  .set CYREG_B1_P3_U1_MC_CFG_BYPASS, 0x400116be\r
- 4561                  .set CYREG_B1_P3_U1_CFG0, 0x400116c0\r
- 4562                  .set CYREG_B1_P3_U1_CFG1, 0x400116c1\r
- 4563                  .set CYREG_B1_P3_U1_CFG2, 0x400116c2\r
- 4564                  .set CYREG_B1_P3_U1_CFG3, 0x400116c3\r
- 4565                  .set CYREG_B1_P3_U1_CFG4, 0x400116c4\r
- 4566                  .set CYREG_B1_P3_U1_CFG5, 0x400116c5\r
- 4567                  .set CYREG_B1_P3_U1_CFG6, 0x400116c6\r
- 4568                  .set CYREG_B1_P3_U1_CFG7, 0x400116c7\r
- 4569                  .set CYREG_B1_P3_U1_CFG8, 0x400116c8\r
- 4570                  .set CYREG_B1_P3_U1_CFG9, 0x400116c9\r
- 4571                  .set CYREG_B1_P3_U1_CFG10, 0x400116ca\r
- 4572                  .set CYREG_B1_P3_U1_CFG11, 0x400116cb\r
- 4573                  .set CYREG_B1_P3_U1_CFG12, 0x400116cc\r
- 4574                  .set CYREG_B1_P3_U1_CFG13, 0x400116cd\r
- 4575                  .set CYREG_B1_P3_U1_CFG14, 0x400116ce\r
- 4576                  .set CYREG_B1_P3_U1_CFG15, 0x400116cf\r
- 4577                  .set CYREG_B1_P3_U1_CFG16, 0x400116d0\r
- 4578                  .set CYREG_B1_P3_U1_CFG17, 0x400116d1\r
- 4579                  .set CYREG_B1_P3_U1_CFG18, 0x400116d2\r
- 4580                  .set CYREG_B1_P3_U1_CFG19, 0x400116d3\r
- 4581                  .set CYREG_B1_P3_U1_CFG20, 0x400116d4\r
- 4582                  .set CYREG_B1_P3_U1_CFG21, 0x400116d5\r
- 4583                  .set CYREG_B1_P3_U1_CFG22, 0x400116d6\r
- 4584                  .set CYREG_B1_P3_U1_CFG23, 0x400116d7\r
- 4585                  .set CYREG_B1_P3_U1_CFG24, 0x400116d8\r
- 4586                  .set CYREG_B1_P3_U1_CFG25, 0x400116d9\r
- 4587                  .set CYREG_B1_P3_U1_CFG26, 0x400116da\r
- 4588                  .set CYREG_B1_P3_U1_CFG27, 0x400116db\r
- 4589                  .set CYREG_B1_P3_U1_CFG28, 0x400116dc\r
- 4590                  .set CYREG_B1_P3_U1_CFG29, 0x400116dd\r
- 4591                  .set CYREG_B1_P3_U1_CFG30, 0x400116de\r
- 4592                  .set CYREG_B1_P3_U1_CFG31, 0x400116df\r
- 4593                  .set CYREG_B1_P3_U1_DCFG0, 0x400116e0\r
- 4594                  .set CYREG_B1_P3_U1_DCFG1, 0x400116e2\r
- 4595                  .set CYREG_B1_P3_U1_DCFG2, 0x400116e4\r
- 4596                  .set CYREG_B1_P3_U1_DCFG3, 0x400116e6\r
- 4597                  .set CYREG_B1_P3_U1_DCFG4, 0x400116e8\r
- 4598                  .set CYREG_B1_P3_U1_DCFG5, 0x400116ea\r
- 4599                  .set CYREG_B1_P3_U1_DCFG6, 0x400116ec\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 176\r
-\r
-\r
- 4600                  .set CYREG_B1_P3_U1_DCFG7, 0x400116ee\r
- 4601                  .set CYDEV_UCFG_B1_P3_ROUTE_BASE, 0x40011700\r
- 4602                  .set CYDEV_UCFG_B1_P3_ROUTE_SIZE, 0x000000ef\r
- 4603                  .set CYDEV_UCFG_B1_P4_BASE, 0x40011800\r
- 4604                  .set CYDEV_UCFG_B1_P4_SIZE, 0x000001ef\r
- 4605                  .set CYDEV_UCFG_B1_P4_U0_BASE, 0x40011800\r
- 4606                  .set CYDEV_UCFG_B1_P4_U0_SIZE, 0x00000070\r
- 4607                  .set CYREG_B1_P4_U0_PLD_IT0, 0x40011800\r
- 4608                  .set CYREG_B1_P4_U0_PLD_IT1, 0x40011804\r
- 4609                  .set CYREG_B1_P4_U0_PLD_IT2, 0x40011808\r
- 4610                  .set CYREG_B1_P4_U0_PLD_IT3, 0x4001180c\r
- 4611                  .set CYREG_B1_P4_U0_PLD_IT4, 0x40011810\r
- 4612                  .set CYREG_B1_P4_U0_PLD_IT5, 0x40011814\r
- 4613                  .set CYREG_B1_P4_U0_PLD_IT6, 0x40011818\r
- 4614                  .set CYREG_B1_P4_U0_PLD_IT7, 0x4001181c\r
- 4615                  .set CYREG_B1_P4_U0_PLD_IT8, 0x40011820\r
- 4616                  .set CYREG_B1_P4_U0_PLD_IT9, 0x40011824\r
- 4617                  .set CYREG_B1_P4_U0_PLD_IT10, 0x40011828\r
- 4618                  .set CYREG_B1_P4_U0_PLD_IT11, 0x4001182c\r
- 4619                  .set CYREG_B1_P4_U0_PLD_ORT0, 0x40011830\r
- 4620                  .set CYREG_B1_P4_U0_PLD_ORT1, 0x40011832\r
- 4621                  .set CYREG_B1_P4_U0_PLD_ORT2, 0x40011834\r
- 4622                  .set CYREG_B1_P4_U0_PLD_ORT3, 0x40011836\r
- 4623                  .set CYREG_B1_P4_U0_MC_CFG_CEN_CONST, 0x40011838\r
- 4624                  .set CYREG_B1_P4_U0_MC_CFG_XORFB, 0x4001183a\r
- 4625                  .set CYREG_B1_P4_U0_MC_CFG_SET_RESET, 0x4001183c\r
- 4626                  .set CYREG_B1_P4_U0_MC_CFG_BYPASS, 0x4001183e\r
- 4627                  .set CYREG_B1_P4_U0_CFG0, 0x40011840\r
- 4628                  .set CYREG_B1_P4_U0_CFG1, 0x40011841\r
- 4629                  .set CYREG_B1_P4_U0_CFG2, 0x40011842\r
- 4630                  .set CYREG_B1_P4_U0_CFG3, 0x40011843\r
- 4631                  .set CYREG_B1_P4_U0_CFG4, 0x40011844\r
- 4632                  .set CYREG_B1_P4_U0_CFG5, 0x40011845\r
- 4633                  .set CYREG_B1_P4_U0_CFG6, 0x40011846\r
- 4634                  .set CYREG_B1_P4_U0_CFG7, 0x40011847\r
- 4635                  .set CYREG_B1_P4_U0_CFG8, 0x40011848\r
- 4636                  .set CYREG_B1_P4_U0_CFG9, 0x40011849\r
- 4637                  .set CYREG_B1_P4_U0_CFG10, 0x4001184a\r
- 4638                  .set CYREG_B1_P4_U0_CFG11, 0x4001184b\r
- 4639                  .set CYREG_B1_P4_U0_CFG12, 0x4001184c\r
- 4640                  .set CYREG_B1_P4_U0_CFG13, 0x4001184d\r
- 4641                  .set CYREG_B1_P4_U0_CFG14, 0x4001184e\r
- 4642                  .set CYREG_B1_P4_U0_CFG15, 0x4001184f\r
- 4643                  .set CYREG_B1_P4_U0_CFG16, 0x40011850\r
- 4644                  .set CYREG_B1_P4_U0_CFG17, 0x40011851\r
- 4645                  .set CYREG_B1_P4_U0_CFG18, 0x40011852\r
- 4646                  .set CYREG_B1_P4_U0_CFG19, 0x40011853\r
- 4647                  .set CYREG_B1_P4_U0_CFG20, 0x40011854\r
- 4648                  .set CYREG_B1_P4_U0_CFG21, 0x40011855\r
- 4649                  .set CYREG_B1_P4_U0_CFG22, 0x40011856\r
- 4650                  .set CYREG_B1_P4_U0_CFG23, 0x40011857\r
- 4651                  .set CYREG_B1_P4_U0_CFG24, 0x40011858\r
- 4652                  .set CYREG_B1_P4_U0_CFG25, 0x40011859\r
- 4653                  .set CYREG_B1_P4_U0_CFG26, 0x4001185a\r
- 4654                  .set CYREG_B1_P4_U0_CFG27, 0x4001185b\r
- 4655                  .set CYREG_B1_P4_U0_CFG28, 0x4001185c\r
- 4656                  .set CYREG_B1_P4_U0_CFG29, 0x4001185d\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 177\r
-\r
-\r
- 4657                  .set CYREG_B1_P4_U0_CFG30, 0x4001185e\r
- 4658                  .set CYREG_B1_P4_U0_CFG31, 0x4001185f\r
- 4659                  .set CYREG_B1_P4_U0_DCFG0, 0x40011860\r
- 4660                  .set CYREG_B1_P4_U0_DCFG1, 0x40011862\r
- 4661                  .set CYREG_B1_P4_U0_DCFG2, 0x40011864\r
- 4662                  .set CYREG_B1_P4_U0_DCFG3, 0x40011866\r
- 4663                  .set CYREG_B1_P4_U0_DCFG4, 0x40011868\r
- 4664                  .set CYREG_B1_P4_U0_DCFG5, 0x4001186a\r
- 4665                  .set CYREG_B1_P4_U0_DCFG6, 0x4001186c\r
- 4666                  .set CYREG_B1_P4_U0_DCFG7, 0x4001186e\r
- 4667                  .set CYDEV_UCFG_B1_P4_U1_BASE, 0x40011880\r
- 4668                  .set CYDEV_UCFG_B1_P4_U1_SIZE, 0x00000070\r
- 4669                  .set CYREG_B1_P4_U1_PLD_IT0, 0x40011880\r
- 4670                  .set CYREG_B1_P4_U1_PLD_IT1, 0x40011884\r
- 4671                  .set CYREG_B1_P4_U1_PLD_IT2, 0x40011888\r
- 4672                  .set CYREG_B1_P4_U1_PLD_IT3, 0x4001188c\r
- 4673                  .set CYREG_B1_P4_U1_PLD_IT4, 0x40011890\r
- 4674                  .set CYREG_B1_P4_U1_PLD_IT5, 0x40011894\r
- 4675                  .set CYREG_B1_P4_U1_PLD_IT6, 0x40011898\r
- 4676                  .set CYREG_B1_P4_U1_PLD_IT7, 0x4001189c\r
- 4677                  .set CYREG_B1_P4_U1_PLD_IT8, 0x400118a0\r
- 4678                  .set CYREG_B1_P4_U1_PLD_IT9, 0x400118a4\r
- 4679                  .set CYREG_B1_P4_U1_PLD_IT10, 0x400118a8\r
- 4680                  .set CYREG_B1_P4_U1_PLD_IT11, 0x400118ac\r
- 4681                  .set CYREG_B1_P4_U1_PLD_ORT0, 0x400118b0\r
- 4682                  .set CYREG_B1_P4_U1_PLD_ORT1, 0x400118b2\r
- 4683                  .set CYREG_B1_P4_U1_PLD_ORT2, 0x400118b4\r
- 4684                  .set CYREG_B1_P4_U1_PLD_ORT3, 0x400118b6\r
- 4685                  .set CYREG_B1_P4_U1_MC_CFG_CEN_CONST, 0x400118b8\r
- 4686                  .set CYREG_B1_P4_U1_MC_CFG_XORFB, 0x400118ba\r
- 4687                  .set CYREG_B1_P4_U1_MC_CFG_SET_RESET, 0x400118bc\r
- 4688                  .set CYREG_B1_P4_U1_MC_CFG_BYPASS, 0x400118be\r
- 4689                  .set CYREG_B1_P4_U1_CFG0, 0x400118c0\r
- 4690                  .set CYREG_B1_P4_U1_CFG1, 0x400118c1\r
- 4691                  .set CYREG_B1_P4_U1_CFG2, 0x400118c2\r
- 4692                  .set CYREG_B1_P4_U1_CFG3, 0x400118c3\r
- 4693                  .set CYREG_B1_P4_U1_CFG4, 0x400118c4\r
- 4694                  .set CYREG_B1_P4_U1_CFG5, 0x400118c5\r
- 4695                  .set CYREG_B1_P4_U1_CFG6, 0x400118c6\r
- 4696                  .set CYREG_B1_P4_U1_CFG7, 0x400118c7\r
- 4697                  .set CYREG_B1_P4_U1_CFG8, 0x400118c8\r
- 4698                  .set CYREG_B1_P4_U1_CFG9, 0x400118c9\r
- 4699                  .set CYREG_B1_P4_U1_CFG10, 0x400118ca\r
- 4700                  .set CYREG_B1_P4_U1_CFG11, 0x400118cb\r
- 4701                  .set CYREG_B1_P4_U1_CFG12, 0x400118cc\r
- 4702                  .set CYREG_B1_P4_U1_CFG13, 0x400118cd\r
- 4703                  .set CYREG_B1_P4_U1_CFG14, 0x400118ce\r
- 4704                  .set CYREG_B1_P4_U1_CFG15, 0x400118cf\r
- 4705                  .set CYREG_B1_P4_U1_CFG16, 0x400118d0\r
- 4706                  .set CYREG_B1_P4_U1_CFG17, 0x400118d1\r
- 4707                  .set CYREG_B1_P4_U1_CFG18, 0x400118d2\r
- 4708                  .set CYREG_B1_P4_U1_CFG19, 0x400118d3\r
- 4709                  .set CYREG_B1_P4_U1_CFG20, 0x400118d4\r
- 4710                  .set CYREG_B1_P4_U1_CFG21, 0x400118d5\r
- 4711                  .set CYREG_B1_P4_U1_CFG22, 0x400118d6\r
- 4712                  .set CYREG_B1_P4_U1_CFG23, 0x400118d7\r
- 4713                  .set CYREG_B1_P4_U1_CFG24, 0x400118d8\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 178\r
-\r
-\r
- 4714                  .set CYREG_B1_P4_U1_CFG25, 0x400118d9\r
- 4715                  .set CYREG_B1_P4_U1_CFG26, 0x400118da\r
- 4716                  .set CYREG_B1_P4_U1_CFG27, 0x400118db\r
- 4717                  .set CYREG_B1_P4_U1_CFG28, 0x400118dc\r
- 4718                  .set CYREG_B1_P4_U1_CFG29, 0x400118dd\r
- 4719                  .set CYREG_B1_P4_U1_CFG30, 0x400118de\r
- 4720                  .set CYREG_B1_P4_U1_CFG31, 0x400118df\r
- 4721                  .set CYREG_B1_P4_U1_DCFG0, 0x400118e0\r
- 4722                  .set CYREG_B1_P4_U1_DCFG1, 0x400118e2\r
- 4723                  .set CYREG_B1_P4_U1_DCFG2, 0x400118e4\r
- 4724                  .set CYREG_B1_P4_U1_DCFG3, 0x400118e6\r
- 4725                  .set CYREG_B1_P4_U1_DCFG4, 0x400118e8\r
- 4726                  .set CYREG_B1_P4_U1_DCFG5, 0x400118ea\r
- 4727                  .set CYREG_B1_P4_U1_DCFG6, 0x400118ec\r
- 4728                  .set CYREG_B1_P4_U1_DCFG7, 0x400118ee\r
- 4729                  .set CYDEV_UCFG_B1_P4_ROUTE_BASE, 0x40011900\r
- 4730                  .set CYDEV_UCFG_B1_P4_ROUTE_SIZE, 0x000000ef\r
- 4731                  .set CYDEV_UCFG_B1_P5_BASE, 0x40011a00\r
- 4732                  .set CYDEV_UCFG_B1_P5_SIZE, 0x000001ef\r
- 4733                  .set CYDEV_UCFG_B1_P5_U0_BASE, 0x40011a00\r
- 4734                  .set CYDEV_UCFG_B1_P5_U0_SIZE, 0x00000070\r
- 4735                  .set CYREG_B1_P5_U0_PLD_IT0, 0x40011a00\r
- 4736                  .set CYREG_B1_P5_U0_PLD_IT1, 0x40011a04\r
- 4737                  .set CYREG_B1_P5_U0_PLD_IT2, 0x40011a08\r
- 4738                  .set CYREG_B1_P5_U0_PLD_IT3, 0x40011a0c\r
- 4739                  .set CYREG_B1_P5_U0_PLD_IT4, 0x40011a10\r
- 4740                  .set CYREG_B1_P5_U0_PLD_IT5, 0x40011a14\r
- 4741                  .set CYREG_B1_P5_U0_PLD_IT6, 0x40011a18\r
- 4742                  .set CYREG_B1_P5_U0_PLD_IT7, 0x40011a1c\r
- 4743                  .set CYREG_B1_P5_U0_PLD_IT8, 0x40011a20\r
- 4744                  .set CYREG_B1_P5_U0_PLD_IT9, 0x40011a24\r
- 4745                  .set CYREG_B1_P5_U0_PLD_IT10, 0x40011a28\r
- 4746                  .set CYREG_B1_P5_U0_PLD_IT11, 0x40011a2c\r
- 4747                  .set CYREG_B1_P5_U0_PLD_ORT0, 0x40011a30\r
- 4748                  .set CYREG_B1_P5_U0_PLD_ORT1, 0x40011a32\r
- 4749                  .set CYREG_B1_P5_U0_PLD_ORT2, 0x40011a34\r
- 4750                  .set CYREG_B1_P5_U0_PLD_ORT3, 0x40011a36\r
- 4751                  .set CYREG_B1_P5_U0_MC_CFG_CEN_CONST, 0x40011a38\r
- 4752                  .set CYREG_B1_P5_U0_MC_CFG_XORFB, 0x40011a3a\r
- 4753                  .set CYREG_B1_P5_U0_MC_CFG_SET_RESET, 0x40011a3c\r
- 4754                  .set CYREG_B1_P5_U0_MC_CFG_BYPASS, 0x40011a3e\r
- 4755                  .set CYREG_B1_P5_U0_CFG0, 0x40011a40\r
- 4756                  .set CYREG_B1_P5_U0_CFG1, 0x40011a41\r
- 4757                  .set CYREG_B1_P5_U0_CFG2, 0x40011a42\r
- 4758                  .set CYREG_B1_P5_U0_CFG3, 0x40011a43\r
- 4759                  .set CYREG_B1_P5_U0_CFG4, 0x40011a44\r
- 4760                  .set CYREG_B1_P5_U0_CFG5, 0x40011a45\r
- 4761                  .set CYREG_B1_P5_U0_CFG6, 0x40011a46\r
- 4762                  .set CYREG_B1_P5_U0_CFG7, 0x40011a47\r
- 4763                  .set CYREG_B1_P5_U0_CFG8, 0x40011a48\r
- 4764                  .set CYREG_B1_P5_U0_CFG9, 0x40011a49\r
- 4765                  .set CYREG_B1_P5_U0_CFG10, 0x40011a4a\r
- 4766                  .set CYREG_B1_P5_U0_CFG11, 0x40011a4b\r
- 4767                  .set CYREG_B1_P5_U0_CFG12, 0x40011a4c\r
- 4768                  .set CYREG_B1_P5_U0_CFG13, 0x40011a4d\r
- 4769                  .set CYREG_B1_P5_U0_CFG14, 0x40011a4e\r
- 4770                  .set CYREG_B1_P5_U0_CFG15, 0x40011a4f\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 179\r
-\r
-\r
- 4771                  .set CYREG_B1_P5_U0_CFG16, 0x40011a50\r
- 4772                  .set CYREG_B1_P5_U0_CFG17, 0x40011a51\r
- 4773                  .set CYREG_B1_P5_U0_CFG18, 0x40011a52\r
- 4774                  .set CYREG_B1_P5_U0_CFG19, 0x40011a53\r
- 4775                  .set CYREG_B1_P5_U0_CFG20, 0x40011a54\r
- 4776                  .set CYREG_B1_P5_U0_CFG21, 0x40011a55\r
- 4777                  .set CYREG_B1_P5_U0_CFG22, 0x40011a56\r
- 4778                  .set CYREG_B1_P5_U0_CFG23, 0x40011a57\r
- 4779                  .set CYREG_B1_P5_U0_CFG24, 0x40011a58\r
- 4780                  .set CYREG_B1_P5_U0_CFG25, 0x40011a59\r
- 4781                  .set CYREG_B1_P5_U0_CFG26, 0x40011a5a\r
- 4782                  .set CYREG_B1_P5_U0_CFG27, 0x40011a5b\r
- 4783                  .set CYREG_B1_P5_U0_CFG28, 0x40011a5c\r
- 4784                  .set CYREG_B1_P5_U0_CFG29, 0x40011a5d\r
- 4785                  .set CYREG_B1_P5_U0_CFG30, 0x40011a5e\r
- 4786                  .set CYREG_B1_P5_U0_CFG31, 0x40011a5f\r
- 4787                  .set CYREG_B1_P5_U0_DCFG0, 0x40011a60\r
- 4788                  .set CYREG_B1_P5_U0_DCFG1, 0x40011a62\r
- 4789                  .set CYREG_B1_P5_U0_DCFG2, 0x40011a64\r
- 4790                  .set CYREG_B1_P5_U0_DCFG3, 0x40011a66\r
- 4791                  .set CYREG_B1_P5_U0_DCFG4, 0x40011a68\r
- 4792                  .set CYREG_B1_P5_U0_DCFG5, 0x40011a6a\r
- 4793                  .set CYREG_B1_P5_U0_DCFG6, 0x40011a6c\r
- 4794                  .set CYREG_B1_P5_U0_DCFG7, 0x40011a6e\r
- 4795                  .set CYDEV_UCFG_B1_P5_U1_BASE, 0x40011a80\r
- 4796                  .set CYDEV_UCFG_B1_P5_U1_SIZE, 0x00000070\r
- 4797                  .set CYREG_B1_P5_U1_PLD_IT0, 0x40011a80\r
- 4798                  .set CYREG_B1_P5_U1_PLD_IT1, 0x40011a84\r
- 4799                  .set CYREG_B1_P5_U1_PLD_IT2, 0x40011a88\r
- 4800                  .set CYREG_B1_P5_U1_PLD_IT3, 0x40011a8c\r
- 4801                  .set CYREG_B1_P5_U1_PLD_IT4, 0x40011a90\r
- 4802                  .set CYREG_B1_P5_U1_PLD_IT5, 0x40011a94\r
- 4803                  .set CYREG_B1_P5_U1_PLD_IT6, 0x40011a98\r
- 4804                  .set CYREG_B1_P5_U1_PLD_IT7, 0x40011a9c\r
- 4805                  .set CYREG_B1_P5_U1_PLD_IT8, 0x40011aa0\r
- 4806                  .set CYREG_B1_P5_U1_PLD_IT9, 0x40011aa4\r
- 4807                  .set CYREG_B1_P5_U1_PLD_IT10, 0x40011aa8\r
- 4808                  .set CYREG_B1_P5_U1_PLD_IT11, 0x40011aac\r
- 4809                  .set CYREG_B1_P5_U1_PLD_ORT0, 0x40011ab0\r
- 4810                  .set CYREG_B1_P5_U1_PLD_ORT1, 0x40011ab2\r
- 4811                  .set CYREG_B1_P5_U1_PLD_ORT2, 0x40011ab4\r
- 4812                  .set CYREG_B1_P5_U1_PLD_ORT3, 0x40011ab6\r
- 4813                  .set CYREG_B1_P5_U1_MC_CFG_CEN_CONST, 0x40011ab8\r
- 4814                  .set CYREG_B1_P5_U1_MC_CFG_XORFB, 0x40011aba\r
- 4815                  .set CYREG_B1_P5_U1_MC_CFG_SET_RESET, 0x40011abc\r
- 4816                  .set CYREG_B1_P5_U1_MC_CFG_BYPASS, 0x40011abe\r
- 4817                  .set CYREG_B1_P5_U1_CFG0, 0x40011ac0\r
- 4818                  .set CYREG_B1_P5_U1_CFG1, 0x40011ac1\r
- 4819                  .set CYREG_B1_P5_U1_CFG2, 0x40011ac2\r
- 4820                  .set CYREG_B1_P5_U1_CFG3, 0x40011ac3\r
- 4821                  .set CYREG_B1_P5_U1_CFG4, 0x40011ac4\r
- 4822                  .set CYREG_B1_P5_U1_CFG5, 0x40011ac5\r
- 4823                  .set CYREG_B1_P5_U1_CFG6, 0x40011ac6\r
- 4824                  .set CYREG_B1_P5_U1_CFG7, 0x40011ac7\r
- 4825                  .set CYREG_B1_P5_U1_CFG8, 0x40011ac8\r
- 4826                  .set CYREG_B1_P5_U1_CFG9, 0x40011ac9\r
- 4827                  .set CYREG_B1_P5_U1_CFG10, 0x40011aca\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 180\r
-\r
-\r
- 4828                  .set CYREG_B1_P5_U1_CFG11, 0x40011acb\r
- 4829                  .set CYREG_B1_P5_U1_CFG12, 0x40011acc\r
- 4830                  .set CYREG_B1_P5_U1_CFG13, 0x40011acd\r
- 4831                  .set CYREG_B1_P5_U1_CFG14, 0x40011ace\r
- 4832                  .set CYREG_B1_P5_U1_CFG15, 0x40011acf\r
- 4833                  .set CYREG_B1_P5_U1_CFG16, 0x40011ad0\r
- 4834                  .set CYREG_B1_P5_U1_CFG17, 0x40011ad1\r
- 4835                  .set CYREG_B1_P5_U1_CFG18, 0x40011ad2\r
- 4836                  .set CYREG_B1_P5_U1_CFG19, 0x40011ad3\r
- 4837                  .set CYREG_B1_P5_U1_CFG20, 0x40011ad4\r
- 4838                  .set CYREG_B1_P5_U1_CFG21, 0x40011ad5\r
- 4839                  .set CYREG_B1_P5_U1_CFG22, 0x40011ad6\r
- 4840                  .set CYREG_B1_P5_U1_CFG23, 0x40011ad7\r
- 4841                  .set CYREG_B1_P5_U1_CFG24, 0x40011ad8\r
- 4842                  .set CYREG_B1_P5_U1_CFG25, 0x40011ad9\r
- 4843                  .set CYREG_B1_P5_U1_CFG26, 0x40011ada\r
- 4844                  .set CYREG_B1_P5_U1_CFG27, 0x40011adb\r
- 4845                  .set CYREG_B1_P5_U1_CFG28, 0x40011adc\r
- 4846                  .set CYREG_B1_P5_U1_CFG29, 0x40011add\r
- 4847                  .set CYREG_B1_P5_U1_CFG30, 0x40011ade\r
- 4848                  .set CYREG_B1_P5_U1_CFG31, 0x40011adf\r
- 4849                  .set CYREG_B1_P5_U1_DCFG0, 0x40011ae0\r
- 4850                  .set CYREG_B1_P5_U1_DCFG1, 0x40011ae2\r
- 4851                  .set CYREG_B1_P5_U1_DCFG2, 0x40011ae4\r
- 4852                  .set CYREG_B1_P5_U1_DCFG3, 0x40011ae6\r
- 4853                  .set CYREG_B1_P5_U1_DCFG4, 0x40011ae8\r
- 4854                  .set CYREG_B1_P5_U1_DCFG5, 0x40011aea\r
- 4855                  .set CYREG_B1_P5_U1_DCFG6, 0x40011aec\r
- 4856                  .set CYREG_B1_P5_U1_DCFG7, 0x40011aee\r
- 4857                  .set CYDEV_UCFG_B1_P5_ROUTE_BASE, 0x40011b00\r
- 4858                  .set CYDEV_UCFG_B1_P5_ROUTE_SIZE, 0x000000ef\r
- 4859                  .set CYDEV_UCFG_DSI0_BASE, 0x40014000\r
- 4860                  .set CYDEV_UCFG_DSI0_SIZE, 0x000000ef\r
- 4861                  .set CYDEV_UCFG_DSI1_BASE, 0x40014100\r
- 4862                  .set CYDEV_UCFG_DSI1_SIZE, 0x000000ef\r
- 4863                  .set CYDEV_UCFG_DSI2_BASE, 0x40014200\r
- 4864                  .set CYDEV_UCFG_DSI2_SIZE, 0x000000ef\r
- 4865                  .set CYDEV_UCFG_DSI3_BASE, 0x40014300\r
- 4866                  .set CYDEV_UCFG_DSI3_SIZE, 0x000000ef\r
- 4867                  .set CYDEV_UCFG_DSI4_BASE, 0x40014400\r
- 4868                  .set CYDEV_UCFG_DSI4_SIZE, 0x000000ef\r
- 4869                  .set CYDEV_UCFG_DSI5_BASE, 0x40014500\r
- 4870                  .set CYDEV_UCFG_DSI5_SIZE, 0x000000ef\r
- 4871                  .set CYDEV_UCFG_DSI6_BASE, 0x40014600\r
- 4872                  .set CYDEV_UCFG_DSI6_SIZE, 0x000000ef\r
- 4873                  .set CYDEV_UCFG_DSI7_BASE, 0x40014700\r
- 4874                  .set CYDEV_UCFG_DSI7_SIZE, 0x000000ef\r
- 4875                  .set CYDEV_UCFG_DSI8_BASE, 0x40014800\r
- 4876                  .set CYDEV_UCFG_DSI8_SIZE, 0x000000ef\r
- 4877                  .set CYDEV_UCFG_DSI9_BASE, 0x40014900\r
- 4878                  .set CYDEV_UCFG_DSI9_SIZE, 0x000000ef\r
- 4879                  .set CYDEV_UCFG_DSI12_BASE, 0x40014c00\r
- 4880                  .set CYDEV_UCFG_DSI12_SIZE, 0x000000ef\r
- 4881                  .set CYDEV_UCFG_DSI13_BASE, 0x40014d00\r
- 4882                  .set CYDEV_UCFG_DSI13_SIZE, 0x000000ef\r
- 4883                  .set CYDEV_UCFG_BCTL0_BASE, 0x40015000\r
- 4884                  .set CYDEV_UCFG_BCTL0_SIZE, 0x00000010\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 181\r
-\r
-\r
- 4885                  .set CYREG_BCTL0_MDCLK_EN, 0x40015000\r
- 4886                  .set CYREG_BCTL0_MBCLK_EN, 0x40015001\r
- 4887                  .set CYREG_BCTL0_WAIT_CFG, 0x40015002\r
- 4888                  .set CYREG_BCTL0_BANK_CTL, 0x40015003\r
- 4889                  .set CYREG_BCTL0_UDB_TEST_3, 0x40015007\r
- 4890                  .set CYREG_BCTL0_DCLK_EN0, 0x40015008\r
- 4891                  .set CYREG_BCTL0_BCLK_EN0, 0x40015009\r
- 4892                  .set CYREG_BCTL0_DCLK_EN1, 0x4001500a\r
- 4893                  .set CYREG_BCTL0_BCLK_EN1, 0x4001500b\r
- 4894                  .set CYREG_BCTL0_DCLK_EN2, 0x4001500c\r
- 4895                  .set CYREG_BCTL0_BCLK_EN2, 0x4001500d\r
- 4896                  .set CYREG_BCTL0_DCLK_EN3, 0x4001500e\r
- 4897                  .set CYREG_BCTL0_BCLK_EN3, 0x4001500f\r
- 4898                  .set CYDEV_UCFG_BCTL1_BASE, 0x40015010\r
- 4899                  .set CYDEV_UCFG_BCTL1_SIZE, 0x00000010\r
- 4900                  .set CYREG_BCTL1_MDCLK_EN, 0x40015010\r
- 4901                  .set CYREG_BCTL1_MBCLK_EN, 0x40015011\r
- 4902                  .set CYREG_BCTL1_WAIT_CFG, 0x40015012\r
- 4903                  .set CYREG_BCTL1_BANK_CTL, 0x40015013\r
- 4904                  .set CYREG_BCTL1_UDB_TEST_3, 0x40015017\r
- 4905                  .set CYREG_BCTL1_DCLK_EN0, 0x40015018\r
- 4906                  .set CYREG_BCTL1_BCLK_EN0, 0x40015019\r
- 4907                  .set CYREG_BCTL1_DCLK_EN1, 0x4001501a\r
- 4908                  .set CYREG_BCTL1_BCLK_EN1, 0x4001501b\r
- 4909                  .set CYREG_BCTL1_DCLK_EN2, 0x4001501c\r
- 4910                  .set CYREG_BCTL1_BCLK_EN2, 0x4001501d\r
- 4911                  .set CYREG_BCTL1_DCLK_EN3, 0x4001501e\r
- 4912                  .set CYREG_BCTL1_BCLK_EN3, 0x4001501f\r
- 4913                  .set CYDEV_IDMUX_BASE, 0x40015100\r
- 4914                  .set CYDEV_IDMUX_SIZE, 0x00000016\r
- 4915                  .set CYREG_IDMUX_IRQ_CTL0, 0x40015100\r
- 4916                  .set CYREG_IDMUX_IRQ_CTL1, 0x40015101\r
- 4917                  .set CYREG_IDMUX_IRQ_CTL2, 0x40015102\r
- 4918                  .set CYREG_IDMUX_IRQ_CTL3, 0x40015103\r
- 4919                  .set CYREG_IDMUX_IRQ_CTL4, 0x40015104\r
- 4920                  .set CYREG_IDMUX_IRQ_CTL5, 0x40015105\r
- 4921                  .set CYREG_IDMUX_IRQ_CTL6, 0x40015106\r
- 4922                  .set CYREG_IDMUX_IRQ_CTL7, 0x40015107\r
- 4923                  .set CYREG_IDMUX_DRQ_CTL0, 0x40015110\r
- 4924                  .set CYREG_IDMUX_DRQ_CTL1, 0x40015111\r
- 4925                  .set CYREG_IDMUX_DRQ_CTL2, 0x40015112\r
- 4926                  .set CYREG_IDMUX_DRQ_CTL3, 0x40015113\r
- 4927                  .set CYREG_IDMUX_DRQ_CTL4, 0x40015114\r
- 4928                  .set CYREG_IDMUX_DRQ_CTL5, 0x40015115\r
- 4929                  .set CYDEV_CACHERAM_BASE, 0x40030000\r
- 4930                  .set CYDEV_CACHERAM_SIZE, 0x00000400\r
- 4931                  .set CYREG_CACHERAM_DATA_MBASE, 0x40030000\r
- 4932                  .set CYREG_CACHERAM_DATA_MSIZE, 0x00000400\r
- 4933                  .set CYDEV_SFR_BASE, 0x40050100\r
- 4934                  .set CYDEV_SFR_SIZE, 0x000000fb\r
- 4935                  .set CYREG_SFR_GPIO0, 0x40050180\r
- 4936                  .set CYREG_SFR_GPIRD0, 0x40050189\r
- 4937                  .set CYREG_SFR_GPIO0_SEL, 0x4005018a\r
- 4938                  .set CYREG_SFR_GPIO1, 0x40050190\r
- 4939                  .set CYREG_SFR_GPIRD1, 0x40050191\r
- 4940                  .set CYREG_SFR_GPIO2, 0x40050198\r
- 4941                  .set CYREG_SFR_GPIRD2, 0x40050199\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 182\r
-\r
-\r
- 4942                  .set CYREG_SFR_GPIO2_SEL, 0x4005019a\r
- 4943                  .set CYREG_SFR_GPIO1_SEL, 0x400501a2\r
- 4944                  .set CYREG_SFR_GPIO3, 0x400501b0\r
- 4945                  .set CYREG_SFR_GPIRD3, 0x400501b1\r
- 4946                  .set CYREG_SFR_GPIO3_SEL, 0x400501b2\r
- 4947                  .set CYREG_SFR_GPIO4, 0x400501c0\r
- 4948                  .set CYREG_SFR_GPIRD4, 0x400501c1\r
- 4949                  .set CYREG_SFR_GPIO4_SEL, 0x400501c2\r
- 4950                  .set CYREG_SFR_GPIO5, 0x400501c8\r
- 4951                  .set CYREG_SFR_GPIRD5, 0x400501c9\r
- 4952                  .set CYREG_SFR_GPIO5_SEL, 0x400501ca\r
- 4953                  .set CYREG_SFR_GPIO6, 0x400501d8\r
- 4954                  .set CYREG_SFR_GPIRD6, 0x400501d9\r
- 4955                  .set CYREG_SFR_GPIO6_SEL, 0x400501da\r
- 4956                  .set CYREG_SFR_GPIO12, 0x400501e8\r
- 4957                  .set CYREG_SFR_GPIRD12, 0x400501e9\r
- 4958                  .set CYREG_SFR_GPIO12_SEL, 0x400501f2\r
- 4959                  .set CYREG_SFR_GPIO15, 0x400501f8\r
- 4960                  .set CYREG_SFR_GPIRD15, 0x400501f9\r
- 4961                  .set CYREG_SFR_GPIO15_SEL, 0x400501fa\r
- 4962                  .set CYDEV_P3BA_BASE, 0x40050300\r
- 4963                  .set CYDEV_P3BA_SIZE, 0x0000002b\r
- 4964                  .set CYREG_P3BA_Y_START, 0x40050300\r
- 4965                  .set CYREG_P3BA_YROLL, 0x40050301\r
- 4966                  .set CYREG_P3BA_YCFG, 0x40050302\r
- 4967                  .set CYREG_P3BA_X_START1, 0x40050303\r
- 4968                  .set CYREG_P3BA_X_START2, 0x40050304\r
- 4969                  .set CYREG_P3BA_XROLL1, 0x40050305\r
- 4970                  .set CYREG_P3BA_XROLL2, 0x40050306\r
- 4971                  .set CYREG_P3BA_XINC, 0x40050307\r
- 4972                  .set CYREG_P3BA_XCFG, 0x40050308\r
- 4973                  .set CYREG_P3BA_OFFSETADDR1, 0x40050309\r
- 4974                  .set CYREG_P3BA_OFFSETADDR2, 0x4005030a\r
- 4975                  .set CYREG_P3BA_OFFSETADDR3, 0x4005030b\r
- 4976                  .set CYREG_P3BA_ABSADDR1, 0x4005030c\r
- 4977                  .set CYREG_P3BA_ABSADDR2, 0x4005030d\r
- 4978                  .set CYREG_P3BA_ABSADDR3, 0x4005030e\r
- 4979                  .set CYREG_P3BA_ABSADDR4, 0x4005030f\r
- 4980                  .set CYREG_P3BA_DATCFG1, 0x40050310\r
- 4981                  .set CYREG_P3BA_DATCFG2, 0x40050311\r
- 4982                  .set CYREG_P3BA_CMP_RSLT1, 0x40050314\r
- 4983                  .set CYREG_P3BA_CMP_RSLT2, 0x40050315\r
- 4984                  .set CYREG_P3BA_CMP_RSLT3, 0x40050316\r
- 4985                  .set CYREG_P3BA_CMP_RSLT4, 0x40050317\r
- 4986                  .set CYREG_P3BA_DATA_REG1, 0x40050318\r
- 4987                  .set CYREG_P3BA_DATA_REG2, 0x40050319\r
- 4988                  .set CYREG_P3BA_DATA_REG3, 0x4005031a\r
- 4989                  .set CYREG_P3BA_DATA_REG4, 0x4005031b\r
- 4990                  .set CYREG_P3BA_EXP_DATA1, 0x4005031c\r
- 4991                  .set CYREG_P3BA_EXP_DATA2, 0x4005031d\r
- 4992                  .set CYREG_P3BA_EXP_DATA3, 0x4005031e\r
- 4993                  .set CYREG_P3BA_EXP_DATA4, 0x4005031f\r
- 4994                  .set CYREG_P3BA_MSTR_HRDATA1, 0x40050320\r
- 4995                  .set CYREG_P3BA_MSTR_HRDATA2, 0x40050321\r
- 4996                  .set CYREG_P3BA_MSTR_HRDATA3, 0x40050322\r
- 4997                  .set CYREG_P3BA_MSTR_HRDATA4, 0x40050323\r
- 4998                  .set CYREG_P3BA_BIST_EN, 0x40050324\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 183\r
-\r
-\r
- 4999                  .set CYREG_P3BA_PHUB_MASTER_SSR, 0x40050325\r
- 5000                  .set CYREG_P3BA_SEQCFG1, 0x40050326\r
- 5001                  .set CYREG_P3BA_SEQCFG2, 0x40050327\r
- 5002                  .set CYREG_P3BA_Y_CURR, 0x40050328\r
- 5003                  .set CYREG_P3BA_X_CURR1, 0x40050329\r
- 5004                  .set CYREG_P3BA_X_CURR2, 0x4005032a\r
- 5005                  .set CYDEV_PANTHER_BASE, 0x40080000\r
- 5006                  .set CYDEV_PANTHER_SIZE, 0x00000020\r
- 5007                  .set CYREG_PANTHER_STCALIB_CFG, 0x40080000\r
- 5008                  .set CYREG_PANTHER_WAITPIPE, 0x40080004\r
- 5009                  .set CYREG_PANTHER_TRACE_CFG, 0x40080008\r
- 5010                  .set CYREG_PANTHER_DBG_CFG, 0x4008000c\r
- 5011                  .set CYREG_PANTHER_CM3_LCKRST_STAT, 0x40080018\r
- 5012                  .set CYREG_PANTHER_DEVICE_ID, 0x4008001c\r
- 5013                  .set CYDEV_FLSECC_BASE, 0x48000000\r
- 5014                  .set CYDEV_FLSECC_SIZE, 0x00008000\r
- 5015                  .set CYREG_FLSECC_DATA_MBASE, 0x48000000\r
- 5016                  .set CYREG_FLSECC_DATA_MSIZE, 0x00008000\r
- 5017                  .set CYDEV_FLSHID_BASE, 0x49000000\r
- 5018                  .set CYDEV_FLSHID_SIZE, 0x00000200\r
- 5019                  .set CYREG_FLSHID_RSVD_MBASE, 0x49000000\r
- 5020                  .set CYREG_FLSHID_RSVD_MSIZE, 0x00000080\r
- 5021                  .set CYREG_FLSHID_CUST_MDATA_MBASE, 0x49000080\r
- 5022                  .set CYREG_FLSHID_CUST_MDATA_MSIZE, 0x00000080\r
- 5023                  .set CYDEV_FLSHID_CUST_TABLES_BASE, 0x49000100\r
- 5024                  .set CYDEV_FLSHID_CUST_TABLES_SIZE, 0x00000040\r
- 5025                  .set CYREG_FLSHID_CUST_TABLES_Y_LOC, 0x49000100\r
- 5026                  .set CYREG_FLSHID_CUST_TABLES_X_LOC, 0x49000101\r
- 5027                  .set CYREG_FLSHID_CUST_TABLES_WAFER_NUM, 0x49000102\r
- 5028                  .set CYREG_FLSHID_CUST_TABLES_LOT_LSB, 0x49000103\r
- 5029                  .set CYREG_FLSHID_CUST_TABLES_LOT_MSB, 0x49000104\r
- 5030                  .set CYREG_FLSHID_CUST_TABLES_WRK_WK, 0x49000105\r
- 5031                  .set CYREG_FLSHID_CUST_TABLES_FAB_YR, 0x49000106\r
- 5032                  .set CYREG_FLSHID_CUST_TABLES_MINOR, 0x49000107\r
- 5033                  .set CYREG_FLSHID_CUST_TABLES_IMO_3MHZ, 0x49000108\r
- 5034                  .set CYREG_FLSHID_CUST_TABLES_IMO_6MHZ, 0x49000109\r
- 5035                  .set CYREG_FLSHID_CUST_TABLES_IMO_12MHZ, 0x4900010a\r
- 5036                  .set CYREG_FLSHID_CUST_TABLES_IMO_24MHZ, 0x4900010b\r
- 5037                  .set CYREG_FLSHID_CUST_TABLES_IMO_67MHZ, 0x4900010c\r
- 5038                  .set CYREG_FLSHID_CUST_TABLES_IMO_80MHZ, 0x4900010d\r
- 5039                  .set CYREG_FLSHID_CUST_TABLES_IMO_92MHZ, 0x4900010e\r
- 5040                  .set CYREG_FLSHID_CUST_TABLES_IMO_USB, 0x4900010f\r
- 5041                  .set CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS, 0x49000110\r
- 5042                  .set CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS, 0x49000111\r
- 5043                  .set CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS, 0x49000112\r
- 5044                  .set CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS, 0x49000113\r
- 5045                  .set CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS, 0x49000114\r
- 5046                  .set CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS, 0x49000115\r
- 5047                  .set CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS, 0x49000116\r
- 5048                  .set CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS, 0x49000117\r
- 5049                  .set CYREG_FLSHID_CUST_TABLES_DEC_M1, 0x49000118\r
- 5050                  .set CYREG_FLSHID_CUST_TABLES_DEC_M2, 0x49000119\r
- 5051                  .set CYREG_FLSHID_CUST_TABLES_DEC_M3, 0x4900011a\r
- 5052                  .set CYREG_FLSHID_CUST_TABLES_DEC_M4, 0x4900011b\r
- 5053                  .set CYREG_FLSHID_CUST_TABLES_DEC_M5, 0x4900011c\r
- 5054                  .set CYREG_FLSHID_CUST_TABLES_DEC_M6, 0x4900011d\r
- 5055                  .set CYREG_FLSHID_CUST_TABLES_DEC_M7, 0x4900011e\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 184\r
-\r
-\r
- 5056                  .set CYREG_FLSHID_CUST_TABLES_DEC_M8, 0x4900011f\r
- 5057                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M1, 0x49000120\r
- 5058                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M2, 0x49000121\r
- 5059                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M3, 0x49000122\r
- 5060                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M4, 0x49000123\r
- 5061                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M5, 0x49000124\r
- 5062                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M6, 0x49000125\r
- 5063                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M7, 0x49000126\r
- 5064                  .set CYREG_FLSHID_CUST_TABLES_DAC0_M8, 0x49000127\r
- 5065                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M1, 0x49000128\r
- 5066                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M2, 0x49000129\r
- 5067                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M3, 0x4900012a\r
- 5068                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M4, 0x4900012b\r
- 5069                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M5, 0x4900012c\r
- 5070                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M6, 0x4900012d\r
- 5071                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M7, 0x4900012e\r
- 5072                  .set CYREG_FLSHID_CUST_TABLES_DAC2_M8, 0x4900012f\r
- 5073                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M1, 0x49000130\r
- 5074                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M2, 0x49000131\r
- 5075                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M3, 0x49000132\r
- 5076                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M4, 0x49000133\r
- 5077                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M5, 0x49000134\r
- 5078                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M6, 0x49000135\r
- 5079                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M7, 0x49000136\r
- 5080                  .set CYREG_FLSHID_CUST_TABLES_DAC1_M8, 0x49000137\r
- 5081                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M1, 0x49000138\r
- 5082                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M2, 0x49000139\r
- 5083                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M3, 0x4900013a\r
- 5084                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M4, 0x4900013b\r
- 5085                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M5, 0x4900013c\r
- 5086                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M6, 0x4900013d\r
- 5087                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M7, 0x4900013e\r
- 5088                  .set CYREG_FLSHID_CUST_TABLES_DAC3_M8, 0x4900013f\r
- 5089                  .set CYDEV_FLSHID_MFG_CFG_BASE, 0x49000180\r
- 5090                  .set CYDEV_FLSHID_MFG_CFG_SIZE, 0x00000080\r
- 5091                  .set CYREG_FLSHID_MFG_CFG_IMO_TR1, 0x49000188\r
- 5092                  .set CYREG_FLSHID_MFG_CFG_CMP0_TR0, 0x490001ac\r
- 5093                  .set CYREG_FLSHID_MFG_CFG_CMP1_TR0, 0x490001ae\r
- 5094                  .set CYREG_FLSHID_MFG_CFG_CMP2_TR0, 0x490001b0\r
- 5095                  .set CYREG_FLSHID_MFG_CFG_CMP3_TR0, 0x490001b2\r
- 5096                  .set CYREG_FLSHID_MFG_CFG_CMP0_TR1, 0x490001b4\r
- 5097                  .set CYREG_FLSHID_MFG_CFG_CMP1_TR1, 0x490001b6\r
- 5098                  .set CYREG_FLSHID_MFG_CFG_CMP2_TR1, 0x490001b8\r
- 5099                  .set CYREG_FLSHID_MFG_CFG_CMP3_TR1, 0x490001ba\r
- 5100                  .set CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM, 0x490001ce\r
- 5101                  .set CYDEV_EXTMEM_BASE, 0x60000000\r
- 5102                  .set CYDEV_EXTMEM_SIZE, 0x00800000\r
- 5103                  .set CYREG_EXTMEM_DATA_MBASE, 0x60000000\r
- 5104                  .set CYREG_EXTMEM_DATA_MSIZE, 0x00800000\r
- 5105                  .set CYDEV_ITM_BASE, 0xe0000000\r
- 5106                  .set CYDEV_ITM_SIZE, 0x00001000\r
- 5107                  .set CYREG_ITM_TRACE_EN, 0xe0000e00\r
- 5108                  .set CYREG_ITM_TRACE_PRIVILEGE, 0xe0000e40\r
- 5109                  .set CYREG_ITM_TRACE_CTRL, 0xe0000e80\r
- 5110                  .set CYREG_ITM_LOCK_ACCESS, 0xe0000fb0\r
- 5111                  .set CYREG_ITM_LOCK_STATUS, 0xe0000fb4\r
- 5112                  .set CYREG_ITM_PID4, 0xe0000fd0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 185\r
-\r
-\r
- 5113                  .set CYREG_ITM_PID5, 0xe0000fd4\r
- 5114                  .set CYREG_ITM_PID6, 0xe0000fd8\r
- 5115                  .set CYREG_ITM_PID7, 0xe0000fdc\r
- 5116                  .set CYREG_ITM_PID0, 0xe0000fe0\r
- 5117                  .set CYREG_ITM_PID1, 0xe0000fe4\r
- 5118                  .set CYREG_ITM_PID2, 0xe0000fe8\r
- 5119                  .set CYREG_ITM_PID3, 0xe0000fec\r
- 5120                  .set CYREG_ITM_CID0, 0xe0000ff0\r
- 5121                  .set CYREG_ITM_CID1, 0xe0000ff4\r
- 5122                  .set CYREG_ITM_CID2, 0xe0000ff8\r
- 5123                  .set CYREG_ITM_CID3, 0xe0000ffc\r
- 5124                  .set CYDEV_DWT_BASE, 0xe0001000\r
- 5125                  .set CYDEV_DWT_SIZE, 0x0000005c\r
- 5126                  .set CYREG_DWT_CTRL, 0xe0001000\r
- 5127                  .set CYREG_DWT_CYCLE_COUNT, 0xe0001004\r
- 5128                  .set CYREG_DWT_CPI_COUNT, 0xe0001008\r
- 5129                  .set CYREG_DWT_EXC_OVHD_COUNT, 0xe000100c\r
- 5130                  .set CYREG_DWT_SLEEP_COUNT, 0xe0001010\r
- 5131                  .set CYREG_DWT_LSU_COUNT, 0xe0001014\r
- 5132                  .set CYREG_DWT_FOLD_COUNT, 0xe0001018\r
- 5133                  .set CYREG_DWT_PC_SAMPLE, 0xe000101c\r
- 5134                  .set CYREG_DWT_COMP_0, 0xe0001020\r
- 5135                  .set CYREG_DWT_MASK_0, 0xe0001024\r
- 5136                  .set CYREG_DWT_FUNCTION_0, 0xe0001028\r
- 5137                  .set CYREG_DWT_COMP_1, 0xe0001030\r
- 5138                  .set CYREG_DWT_MASK_1, 0xe0001034\r
- 5139                  .set CYREG_DWT_FUNCTION_1, 0xe0001038\r
- 5140                  .set CYREG_DWT_COMP_2, 0xe0001040\r
- 5141                  .set CYREG_DWT_MASK_2, 0xe0001044\r
- 5142                  .set CYREG_DWT_FUNCTION_2, 0xe0001048\r
- 5143                  .set CYREG_DWT_COMP_3, 0xe0001050\r
- 5144                  .set CYREG_DWT_MASK_3, 0xe0001054\r
- 5145                  .set CYREG_DWT_FUNCTION_3, 0xe0001058\r
- 5146                  .set CYDEV_FPB_BASE, 0xe0002000\r
- 5147                  .set CYDEV_FPB_SIZE, 0x00001000\r
- 5148                  .set CYREG_FPB_CTRL, 0xe0002000\r
- 5149                  .set CYREG_FPB_REMAP, 0xe0002004\r
- 5150                  .set CYREG_FPB_FP_COMP_0, 0xe0002008\r
- 5151                  .set CYREG_FPB_FP_COMP_1, 0xe000200c\r
- 5152                  .set CYREG_FPB_FP_COMP_2, 0xe0002010\r
- 5153                  .set CYREG_FPB_FP_COMP_3, 0xe0002014\r
- 5154                  .set CYREG_FPB_FP_COMP_4, 0xe0002018\r
- 5155                  .set CYREG_FPB_FP_COMP_5, 0xe000201c\r
- 5156                  .set CYREG_FPB_FP_COMP_6, 0xe0002020\r
- 5157                  .set CYREG_FPB_FP_COMP_7, 0xe0002024\r
- 5158                  .set CYREG_FPB_PID4, 0xe0002fd0\r
- 5159                  .set CYREG_FPB_PID5, 0xe0002fd4\r
- 5160                  .set CYREG_FPB_PID6, 0xe0002fd8\r
- 5161                  .set CYREG_FPB_PID7, 0xe0002fdc\r
- 5162                  .set CYREG_FPB_PID0, 0xe0002fe0\r
- 5163                  .set CYREG_FPB_PID1, 0xe0002fe4\r
- 5164                  .set CYREG_FPB_PID2, 0xe0002fe8\r
- 5165                  .set CYREG_FPB_PID3, 0xe0002fec\r
- 5166                  .set CYREG_FPB_CID0, 0xe0002ff0\r
- 5167                  .set CYREG_FPB_CID1, 0xe0002ff4\r
- 5168                  .set CYREG_FPB_CID2, 0xe0002ff8\r
- 5169                  .set CYREG_FPB_CID3, 0xe0002ffc\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 186\r
-\r
-\r
- 5170                  .set CYDEV_NVIC_BASE, 0xe000e000\r
- 5171                  .set CYDEV_NVIC_SIZE, 0x00000d3c\r
- 5172                  .set CYREG_NVIC_INT_CTL_TYPE, 0xe000e004\r
- 5173                  .set CYREG_NVIC_SYSTICK_CTL, 0xe000e010\r
- 5174                  .set CYREG_NVIC_SYSTICK_RELOAD, 0xe000e014\r
- 5175                  .set CYREG_NVIC_SYSTICK_CURRENT, 0xe000e018\r
- 5176                  .set CYREG_NVIC_SYSTICK_CAL, 0xe000e01c\r
- 5177                  .set CYREG_NVIC_SETENA0, 0xe000e100\r
- 5178                  .set CYREG_NVIC_CLRENA0, 0xe000e180\r
- 5179                  .set CYREG_NVIC_SETPEND0, 0xe000e200\r
- 5180                  .set CYREG_NVIC_CLRPEND0, 0xe000e280\r
- 5181                  .set CYREG_NVIC_ACTIVE0, 0xe000e300\r
- 5182                  .set CYREG_NVIC_PRI_0, 0xe000e400\r
- 5183                  .set CYREG_NVIC_PRI_1, 0xe000e401\r
- 5184                  .set CYREG_NVIC_PRI_2, 0xe000e402\r
- 5185                  .set CYREG_NVIC_PRI_3, 0xe000e403\r
- 5186                  .set CYREG_NVIC_PRI_4, 0xe000e404\r
- 5187                  .set CYREG_NVIC_PRI_5, 0xe000e405\r
- 5188                  .set CYREG_NVIC_PRI_6, 0xe000e406\r
- 5189                  .set CYREG_NVIC_PRI_7, 0xe000e407\r
- 5190                  .set CYREG_NVIC_PRI_8, 0xe000e408\r
- 5191                  .set CYREG_NVIC_PRI_9, 0xe000e409\r
- 5192                  .set CYREG_NVIC_PRI_10, 0xe000e40a\r
- 5193                  .set CYREG_NVIC_PRI_11, 0xe000e40b\r
- 5194                  .set CYREG_NVIC_PRI_12, 0xe000e40c\r
- 5195                  .set CYREG_NVIC_PRI_13, 0xe000e40d\r
- 5196                  .set CYREG_NVIC_PRI_14, 0xe000e40e\r
- 5197                  .set CYREG_NVIC_PRI_15, 0xe000e40f\r
- 5198                  .set CYREG_NVIC_PRI_16, 0xe000e410\r
- 5199                  .set CYREG_NVIC_PRI_17, 0xe000e411\r
- 5200                  .set CYREG_NVIC_PRI_18, 0xe000e412\r
- 5201                  .set CYREG_NVIC_PRI_19, 0xe000e413\r
- 5202                  .set CYREG_NVIC_PRI_20, 0xe000e414\r
- 5203                  .set CYREG_NVIC_PRI_21, 0xe000e415\r
- 5204                  .set CYREG_NVIC_PRI_22, 0xe000e416\r
- 5205                  .set CYREG_NVIC_PRI_23, 0xe000e417\r
- 5206                  .set CYREG_NVIC_PRI_24, 0xe000e418\r
- 5207                  .set CYREG_NVIC_PRI_25, 0xe000e419\r
- 5208                  .set CYREG_NVIC_PRI_26, 0xe000e41a\r
- 5209                  .set CYREG_NVIC_PRI_27, 0xe000e41b\r
- 5210                  .set CYREG_NVIC_PRI_28, 0xe000e41c\r
- 5211                  .set CYREG_NVIC_PRI_29, 0xe000e41d\r
- 5212                  .set CYREG_NVIC_PRI_30, 0xe000e41e\r
- 5213                  .set CYREG_NVIC_PRI_31, 0xe000e41f\r
- 5214                  .set CYREG_NVIC_CPUID_BASE, 0xe000ed00\r
- 5215                  .set CYREG_NVIC_INTR_CTRL_STATE, 0xe000ed04\r
- 5216                  .set CYREG_NVIC_VECT_OFFSET, 0xe000ed08\r
- 5217                  .set CYREG_NVIC_APPLN_INTR, 0xe000ed0c\r
- 5218                  .set CYREG_NVIC_SYSTEM_CONTROL, 0xe000ed10\r
- 5219                  .set CYREG_NVIC_CFG_CONTROL, 0xe000ed14\r
- 5220                  .set CYREG_NVIC_SYS_PRIO_HANDLER_4_7, 0xe000ed18\r
- 5221                  .set CYREG_NVIC_SYS_PRIO_HANDLER_8_11, 0xe000ed1c\r
- 5222                  .set CYREG_NVIC_SYS_PRIO_HANDLER_12_15, 0xe000ed20\r
- 5223                  .set CYREG_NVIC_SYS_HANDLER_CSR, 0xe000ed24\r
- 5224                  .set CYREG_NVIC_MEMMAN_FAULT_STATUS, 0xe000ed28\r
- 5225                  .set CYREG_NVIC_BUS_FAULT_STATUS, 0xe000ed29\r
- 5226                  .set CYREG_NVIC_USAGE_FAULT_STATUS, 0xe000ed2a\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 187\r
-\r
-\r
- 5227                  .set CYREG_NVIC_HARD_FAULT_STATUS, 0xe000ed2c\r
- 5228                  .set CYREG_NVIC_DEBUG_FAULT_STATUS, 0xe000ed30\r
- 5229                  .set CYREG_NVIC_MEMMAN_FAULT_ADD, 0xe000ed34\r
- 5230                  .set CYREG_NVIC_BUS_FAULT_ADD, 0xe000ed38\r
- 5231                  .set CYDEV_CORE_DBG_BASE, 0xe000edf0\r
- 5232                  .set CYDEV_CORE_DBG_SIZE, 0x00000010\r
- 5233                  .set CYREG_CORE_DBG_DBG_HLT_CS, 0xe000edf0\r
- 5234                  .set CYREG_CORE_DBG_DBG_REG_SEL, 0xe000edf4\r
- 5235                  .set CYREG_CORE_DBG_DBG_REG_DATA, 0xe000edf8\r
- 5236                  .set CYREG_CORE_DBG_EXC_MON_CTL, 0xe000edfc\r
- 5237                  .set CYDEV_TPIU_BASE, 0xe0040000\r
- 5238                  .set CYDEV_TPIU_SIZE, 0x00001000\r
- 5239                  .set CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ, 0xe0040000\r
- 5240                  .set CYREG_TPIU_CURRENT_SYNC_PRT_SZ, 0xe0040004\r
- 5241                  .set CYREG_TPIU_ASYNC_CLK_PRESCALER, 0xe0040010\r
- 5242                  .set CYREG_TPIU_PROTOCOL, 0xe00400f0\r
- 5243                  .set CYREG_TPIU_FORM_FLUSH_STAT, 0xe0040300\r
- 5244                  .set CYREG_TPIU_FORM_FLUSH_CTRL, 0xe0040304\r
- 5245                  .set CYREG_TPIU_TRIGGER, 0xe0040ee8\r
- 5246                  .set CYREG_TPIU_ITETMDATA, 0xe0040eec\r
- 5247                  .set CYREG_TPIU_ITATBCTR2, 0xe0040ef0\r
- 5248                  .set CYREG_TPIU_ITATBCTR0, 0xe0040ef8\r
- 5249                  .set CYREG_TPIU_ITITMDATA, 0xe0040efc\r
- 5250                  .set CYREG_TPIU_ITCTRL, 0xe0040f00\r
- 5251                  .set CYREG_TPIU_DEVID, 0xe0040fc8\r
- 5252                  .set CYREG_TPIU_DEVTYPE, 0xe0040fcc\r
- 5253                  .set CYREG_TPIU_PID4, 0xe0040fd0\r
- 5254                  .set CYREG_TPIU_PID5, 0xe0040fd4\r
- 5255                  .set CYREG_TPIU_PID6, 0xe0040fd8\r
- 5256                  .set CYREG_TPIU_PID7, 0xe0040fdc\r
- 5257                  .set CYREG_TPIU_PID0, 0xe0040fe0\r
- 5258                  .set CYREG_TPIU_PID1, 0xe0040fe4\r
- 5259                  .set CYREG_TPIU_PID2, 0xe0040fe8\r
- 5260                  .set CYREG_TPIU_PID3, 0xe0040fec\r
- 5261                  .set CYREG_TPIU_CID0, 0xe0040ff0\r
- 5262                  .set CYREG_TPIU_CID1, 0xe0040ff4\r
- 5263                  .set CYREG_TPIU_CID2, 0xe0040ff8\r
- 5264                  .set CYREG_TPIU_CID3, 0xe0040ffc\r
- 5265                  .set CYDEV_ETM_BASE, 0xe0041000\r
- 5266                  .set CYDEV_ETM_SIZE, 0x00001000\r
- 5267                  .set CYREG_ETM_CTL, 0xe0041000\r
- 5268                  .set CYREG_ETM_CFG_CODE, 0xe0041004\r
- 5269                  .set CYREG_ETM_TRIG_EVENT, 0xe0041008\r
- 5270                  .set CYREG_ETM_STATUS, 0xe0041010\r
- 5271                  .set CYREG_ETM_SYS_CFG, 0xe0041014\r
- 5272                  .set CYREG_ETM_TRACE_ENB_EVENT, 0xe0041020\r
- 5273                  .set CYREG_ETM_TRACE_EN_CTRL1, 0xe0041024\r
- 5274                  .set CYREG_ETM_FIFOFULL_LEVEL, 0xe004102c\r
- 5275                  .set CYREG_ETM_SYNC_FREQ, 0xe00411e0\r
- 5276                  .set CYREG_ETM_ETM_ID, 0xe00411e4\r
- 5277                  .set CYREG_ETM_CFG_CODE_EXT, 0xe00411e8\r
- 5278                  .set CYREG_ETM_TR_SS_EMBICE_CTRL, 0xe00411f0\r
- 5279                  .set CYREG_ETM_CS_TRACE_ID, 0xe0041200\r
- 5280                  .set CYREG_ETM_OS_LOCK_ACCESS, 0xe0041300\r
- 5281                  .set CYREG_ETM_OS_LOCK_STATUS, 0xe0041304\r
- 5282                  .set CYREG_ETM_PDSR, 0xe0041314\r
- 5283                  .set CYREG_ETM_ITMISCIN, 0xe0041ee0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 188\r
-\r
-\r
- 5284                  .set CYREG_ETM_ITTRIGOUT, 0xe0041ee8\r
- 5285                  .set CYREG_ETM_ITATBCTR2, 0xe0041ef0\r
- 5286                  .set CYREG_ETM_ITATBCTR0, 0xe0041ef8\r
- 5287                  .set CYREG_ETM_INT_MODE_CTRL, 0xe0041f00\r
- 5288                  .set CYREG_ETM_CLM_TAG_SET, 0xe0041fa0\r
- 5289                  .set CYREG_ETM_CLM_TAG_CLR, 0xe0041fa4\r
- 5290                  .set CYREG_ETM_LOCK_ACCESS, 0xe0041fb0\r
- 5291                  .set CYREG_ETM_LOCK_STATUS, 0xe0041fb4\r
- 5292                  .set CYREG_ETM_AUTH_STATUS, 0xe0041fb8\r
- 5293                  .set CYREG_ETM_DEV_TYPE, 0xe0041fcc\r
- 5294                  .set CYREG_ETM_PID4, 0xe0041fd0\r
- 5295                  .set CYREG_ETM_PID5, 0xe0041fd4\r
- 5296                  .set CYREG_ETM_PID6, 0xe0041fd8\r
- 5297                  .set CYREG_ETM_PID7, 0xe0041fdc\r
- 5298                  .set CYREG_ETM_PID0, 0xe0041fe0\r
- 5299                  .set CYREG_ETM_PID1, 0xe0041fe4\r
- 5300                  .set CYREG_ETM_PID2, 0xe0041fe8\r
- 5301                  .set CYREG_ETM_PID3, 0xe0041fec\r
- 5302                  .set CYREG_ETM_CID0, 0xe0041ff0\r
- 5303                  .set CYREG_ETM_CID1, 0xe0041ff4\r
- 5304                  .set CYREG_ETM_CID2, 0xe0041ff8\r
- 5305                  .set CYREG_ETM_CID3, 0xe0041ffc\r
- 5306                  .set CYDEV_ROM_TABLE_BASE, 0xe00ff000\r
- 5307                  .set CYDEV_ROM_TABLE_SIZE, 0x00001000\r
- 5308                  .set CYREG_ROM_TABLE_NVIC, 0xe00ff000\r
- 5309                  .set CYREG_ROM_TABLE_DWT, 0xe00ff004\r
- 5310                  .set CYREG_ROM_TABLE_FPB, 0xe00ff008\r
- 5311                  .set CYREG_ROM_TABLE_ITM, 0xe00ff00c\r
- 5312                  .set CYREG_ROM_TABLE_TPIU, 0xe00ff010\r
- 5313                  .set CYREG_ROM_TABLE_ETM, 0xe00ff014\r
- 5314                  .set CYREG_ROM_TABLE_END, 0xe00ff018\r
- 5315                  .set CYREG_ROM_TABLE_MEMTYPE, 0xe00fffcc\r
- 5316                  .set CYREG_ROM_TABLE_PID4, 0xe00fffd0\r
- 5317                  .set CYREG_ROM_TABLE_PID5, 0xe00fffd4\r
- 5318                  .set CYREG_ROM_TABLE_PID6, 0xe00fffd8\r
- 5319                  .set CYREG_ROM_TABLE_PID7, 0xe00fffdc\r
- 5320                  .set CYREG_ROM_TABLE_PID0, 0xe00fffe0\r
- 5321                  .set CYREG_ROM_TABLE_PID1, 0xe00fffe4\r
- 5322                  .set CYREG_ROM_TABLE_PID2, 0xe00fffe8\r
- 5323                  .set CYREG_ROM_TABLE_PID3, 0xe00fffec\r
- 5324                  .set CYREG_ROM_TABLE_CID0, 0xe00ffff0\r
- 5325                  .set CYREG_ROM_TABLE_CID1, 0xe00ffff4\r
- 5326                  .set CYREG_ROM_TABLE_CID2, 0xe00ffff8\r
- 5327                  .set CYREG_ROM_TABLE_CID3, 0xe00ffffc\r
- 5328                  .set CYDEV_FLS_SIZE, CYDEV_FLASH_SIZE\r
- 5329                  .set CYDEV_ECC_BASE, CYDEV_FLSECC_BASE\r
- 5330                  .set CYDEV_FLS_SECTOR_SIZE, 0x00010000\r
- 5331                  .set CYDEV_FLS_ROW_SIZE, 0x00000100\r
- 5332                  .set CYDEV_ECC_SECTOR_SIZE, 0x00002000\r
- 5333                  .set CYDEV_ECC_ROW_SIZE, 0x00000020\r
- 5334                  .set CYDEV_EEPROM_SECTOR_SIZE, 0x00000400\r
- 5335                  .set CYDEV_EEPROM_ROW_SIZE, 0x00000010\r
- 5336                  .set CYDEV_PERIPH_BASE, CYDEV_CLKDIST_BASE\r
- 5337                  .set CYCLK_LD_DISABLE, 0x00000004\r
- 5338                  .set CYCLK_LD_SYNC_EN, 0x00000002\r
- 5339                  .set CYCLK_LD_LOAD, 0x00000001\r
- 5340                  .set CYCLK_PIPE, 0x00000080\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 189\r
-\r
-\r
- 5341                  .set CYCLK_SSS, 0x00000040\r
- 5342                  .set CYCLK_EARLY, 0x00000020\r
- 5343                  .set CYCLK_DUTY, 0x00000010\r
- 5344                  .set CYCLK_SYNC, 0x00000008\r
- 5345                  .set CYCLK_SRC_SEL_CLK_SYNC_D, 0\r
- 5346                  .set CYCLK_SRC_SEL_SYNC_DIG, 0\r
- 5347                  .set CYCLK_SRC_SEL_IMO, 1\r
- 5348                  .set CYCLK_SRC_SEL_XTAL_MHZ, 2\r
- 5349                  .set CYCLK_SRC_SEL_XTALM, 2\r
- 5350                  .set CYCLK_SRC_SEL_ILO, 3\r
- 5351                  .set CYCLK_SRC_SEL_PLL, 4\r
- 5352                  .set CYCLK_SRC_SEL_XTAL_KHZ, 5\r
- 5353                  .set CYCLK_SRC_SEL_XTALK, 5\r
- 5354                  .set CYCLK_SRC_SEL_DSI_G, 6\r
- 5355                  .set CYCLK_SRC_SEL_DSI_D, 7\r
- 5356                  .set CYCLK_SRC_SEL_CLK_SYNC_A, 0\r
- 5357                  .set CYCLK_SRC_SEL_DSI_A, 7\r
-   5                   \r
-   6                   /* USBFS_bus_reset */\r
-   7                   .set USBFS_bus_reset__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-   8                   .set USBFS_bus_reset__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-   9                   .set USBFS_bus_reset__INTC_MASK, 0x800000\r
-  10                   .set USBFS_bus_reset__INTC_NUMBER, 23\r
-  11                   .set USBFS_bus_reset__INTC_PRIOR_NUM, 7\r
-  12                   .set USBFS_bus_reset__INTC_PRIOR_REG, CYREG_NVIC_PRI_23\r
-  13                   .set USBFS_bus_reset__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-  14                   .set USBFS_bus_reset__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-  15                   \r
-  16                   /* USBFS_arb_int */\r
-  17                   .set USBFS_arb_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-  18                   .set USBFS_arb_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-  19                   .set USBFS_arb_int__INTC_MASK, 0x400000\r
-  20                   .set USBFS_arb_int__INTC_NUMBER, 22\r
-  21                   .set USBFS_arb_int__INTC_PRIOR_NUM, 7\r
-  22                   .set USBFS_arb_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_22\r
-  23                   .set USBFS_arb_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-  24                   .set USBFS_arb_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-  25                   \r
-  26                   /* USBFS_sof_int */\r
-  27                   .set USBFS_sof_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-  28                   .set USBFS_sof_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-  29                   .set USBFS_sof_int__INTC_MASK, 0x200000\r
-  30                   .set USBFS_sof_int__INTC_NUMBER, 21\r
-  31                   .set USBFS_sof_int__INTC_PRIOR_NUM, 7\r
-  32                   .set USBFS_sof_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_21\r
-  33                   .set USBFS_sof_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-  34                   .set USBFS_sof_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-  35                   \r
-  36                   /* SCSI_Out_DBx */\r
-  37                   .set SCSI_Out_DBx__0__AG, CYREG_PRT6_AG\r
-  38                   .set SCSI_Out_DBx__0__AMUX, CYREG_PRT6_AMUX\r
-  39                   .set SCSI_Out_DBx__0__BIE, CYREG_PRT6_BIE\r
-  40                   .set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-  41                   .set SCSI_Out_DBx__0__BYP, CYREG_PRT6_BYP\r
-  42                   .set SCSI_Out_DBx__0__CTL, CYREG_PRT6_CTL\r
-  43                   .set SCSI_Out_DBx__0__DM0, CYREG_PRT6_DM0\r
-  44                   .set SCSI_Out_DBx__0__DM1, CYREG_PRT6_DM1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 190\r
-\r
-\r
-  45                   .set SCSI_Out_DBx__0__DM2, CYREG_PRT6_DM2\r
-  46                   .set SCSI_Out_DBx__0__DR, CYREG_PRT6_DR\r
-  47                   .set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS\r
-  48                   .set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-  49                   .set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN\r
-  50                   .set SCSI_Out_DBx__0__MASK, 0x08\r
-  51                   .set SCSI_Out_DBx__0__PC, CYREG_PRT6_PC3\r
-  52                   .set SCSI_Out_DBx__0__PORT, 6\r
-  53                   .set SCSI_Out_DBx__0__PRT, CYREG_PRT6_PRT\r
-  54                   .set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-  55                   .set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-  56                   .set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-  57                   .set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-  58                   .set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-  59                   .set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-  60                   .set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-  61                   .set SCSI_Out_DBx__0__PS, CYREG_PRT6_PS\r
-  62                   .set SCSI_Out_DBx__0__SHIFT, 3\r
-  63                   .set SCSI_Out_DBx__0__SLW, CYREG_PRT6_SLW\r
-  64                   .set SCSI_Out_DBx__1__AG, CYREG_PRT6_AG\r
-  65                   .set SCSI_Out_DBx__1__AMUX, CYREG_PRT6_AMUX\r
-  66                   .set SCSI_Out_DBx__1__BIE, CYREG_PRT6_BIE\r
-  67                   .set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-  68                   .set SCSI_Out_DBx__1__BYP, CYREG_PRT6_BYP\r
-  69                   .set SCSI_Out_DBx__1__CTL, CYREG_PRT6_CTL\r
-  70                   .set SCSI_Out_DBx__1__DM0, CYREG_PRT6_DM0\r
-  71                   .set SCSI_Out_DBx__1__DM1, CYREG_PRT6_DM1\r
-  72                   .set SCSI_Out_DBx__1__DM2, CYREG_PRT6_DM2\r
-  73                   .set SCSI_Out_DBx__1__DR, CYREG_PRT6_DR\r
-  74                   .set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS\r
-  75                   .set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-  76                   .set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN\r
-  77                   .set SCSI_Out_DBx__1__MASK, 0x04\r
-  78                   .set SCSI_Out_DBx__1__PC, CYREG_PRT6_PC2\r
-  79                   .set SCSI_Out_DBx__1__PORT, 6\r
-  80                   .set SCSI_Out_DBx__1__PRT, CYREG_PRT6_PRT\r
-  81                   .set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-  82                   .set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-  83                   .set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-  84                   .set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-  85                   .set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-  86                   .set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-  87                   .set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-  88                   .set SCSI_Out_DBx__1__PS, CYREG_PRT6_PS\r
-  89                   .set SCSI_Out_DBx__1__SHIFT, 2\r
-  90                   .set SCSI_Out_DBx__1__SLW, CYREG_PRT6_SLW\r
-  91                   .set SCSI_Out_DBx__2__AG, CYREG_PRT6_AG\r
-  92                   .set SCSI_Out_DBx__2__AMUX, CYREG_PRT6_AMUX\r
-  93                   .set SCSI_Out_DBx__2__BIE, CYREG_PRT6_BIE\r
-  94                   .set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-  95                   .set SCSI_Out_DBx__2__BYP, CYREG_PRT6_BYP\r
-  96                   .set SCSI_Out_DBx__2__CTL, CYREG_PRT6_CTL\r
-  97                   .set SCSI_Out_DBx__2__DM0, CYREG_PRT6_DM0\r
-  98                   .set SCSI_Out_DBx__2__DM1, CYREG_PRT6_DM1\r
-  99                   .set SCSI_Out_DBx__2__DM2, CYREG_PRT6_DM2\r
- 100                   .set SCSI_Out_DBx__2__DR, CYREG_PRT6_DR\r
- 101                   .set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 191\r
-\r
-\r
- 102                   .set SCSI_Out_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 103                   .set SCSI_Out_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
- 104                   .set SCSI_Out_DBx__2__MASK, 0x02\r
- 105                   .set SCSI_Out_DBx__2__PC, CYREG_PRT6_PC1\r
- 106                   .set SCSI_Out_DBx__2__PORT, 6\r
- 107                   .set SCSI_Out_DBx__2__PRT, CYREG_PRT6_PRT\r
- 108                   .set SCSI_Out_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 109                   .set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 110                   .set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
- 111                   .set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 112                   .set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 113                   .set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
- 114                   .set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 115                   .set SCSI_Out_DBx__2__PS, CYREG_PRT6_PS\r
- 116                   .set SCSI_Out_DBx__2__SHIFT, 1\r
- 117                   .set SCSI_Out_DBx__2__SLW, CYREG_PRT6_SLW\r
- 118                   .set SCSI_Out_DBx__3__AG, CYREG_PRT6_AG\r
- 119                   .set SCSI_Out_DBx__3__AMUX, CYREG_PRT6_AMUX\r
- 120                   .set SCSI_Out_DBx__3__BIE, CYREG_PRT6_BIE\r
- 121                   .set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
- 122                   .set SCSI_Out_DBx__3__BYP, CYREG_PRT6_BYP\r
- 123                   .set SCSI_Out_DBx__3__CTL, CYREG_PRT6_CTL\r
- 124                   .set SCSI_Out_DBx__3__DM0, CYREG_PRT6_DM0\r
- 125                   .set SCSI_Out_DBx__3__DM1, CYREG_PRT6_DM1\r
- 126                   .set SCSI_Out_DBx__3__DM2, CYREG_PRT6_DM2\r
- 127                   .set SCSI_Out_DBx__3__DR, CYREG_PRT6_DR\r
- 128                   .set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
- 129                   .set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 130                   .set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
- 131                   .set SCSI_Out_DBx__3__MASK, 0x01\r
- 132                   .set SCSI_Out_DBx__3__PC, CYREG_PRT6_PC0\r
- 133                   .set SCSI_Out_DBx__3__PORT, 6\r
- 134                   .set SCSI_Out_DBx__3__PRT, CYREG_PRT6_PRT\r
- 135                   .set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 136                   .set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 137                   .set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
- 138                   .set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 139                   .set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 140                   .set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
- 141                   .set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 142                   .set SCSI_Out_DBx__3__PS, CYREG_PRT6_PS\r
- 143                   .set SCSI_Out_DBx__3__SHIFT, 0\r
- 144                   .set SCSI_Out_DBx__3__SLW, CYREG_PRT6_SLW\r
- 145                   .set SCSI_Out_DBx__4__AG, CYREG_PRT4_AG\r
- 146                   .set SCSI_Out_DBx__4__AMUX, CYREG_PRT4_AMUX\r
- 147                   .set SCSI_Out_DBx__4__BIE, CYREG_PRT4_BIE\r
- 148                   .set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 149                   .set SCSI_Out_DBx__4__BYP, CYREG_PRT4_BYP\r
- 150                   .set SCSI_Out_DBx__4__CTL, CYREG_PRT4_CTL\r
- 151                   .set SCSI_Out_DBx__4__DM0, CYREG_PRT4_DM0\r
- 152                   .set SCSI_Out_DBx__4__DM1, CYREG_PRT4_DM1\r
- 153                   .set SCSI_Out_DBx__4__DM2, CYREG_PRT4_DM2\r
- 154                   .set SCSI_Out_DBx__4__DR, CYREG_PRT4_DR\r
- 155                   .set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT4_INP_DIS\r
- 156                   .set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 157                   .set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT4_LCD_EN\r
- 158                   .set SCSI_Out_DBx__4__MASK, 0x80\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 192\r
-\r
-\r
- 159                   .set SCSI_Out_DBx__4__PC, CYREG_PRT4_PC7\r
- 160                   .set SCSI_Out_DBx__4__PORT, 4\r
- 161                   .set SCSI_Out_DBx__4__PRT, CYREG_PRT4_PRT\r
- 162                   .set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 163                   .set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 164                   .set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 165                   .set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 166                   .set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 167                   .set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 168                   .set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 169                   .set SCSI_Out_DBx__4__PS, CYREG_PRT4_PS\r
- 170                   .set SCSI_Out_DBx__4__SHIFT, 7\r
- 171                   .set SCSI_Out_DBx__4__SLW, CYREG_PRT4_SLW\r
- 172                   .set SCSI_Out_DBx__5__AG, CYREG_PRT4_AG\r
- 173                   .set SCSI_Out_DBx__5__AMUX, CYREG_PRT4_AMUX\r
- 174                   .set SCSI_Out_DBx__5__BIE, CYREG_PRT4_BIE\r
- 175                   .set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 176                   .set SCSI_Out_DBx__5__BYP, CYREG_PRT4_BYP\r
- 177                   .set SCSI_Out_DBx__5__CTL, CYREG_PRT4_CTL\r
- 178                   .set SCSI_Out_DBx__5__DM0, CYREG_PRT4_DM0\r
- 179                   .set SCSI_Out_DBx__5__DM1, CYREG_PRT4_DM1\r
- 180                   .set SCSI_Out_DBx__5__DM2, CYREG_PRT4_DM2\r
- 181                   .set SCSI_Out_DBx__5__DR, CYREG_PRT4_DR\r
- 182                   .set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT4_INP_DIS\r
- 183                   .set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 184                   .set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT4_LCD_EN\r
- 185                   .set SCSI_Out_DBx__5__MASK, 0x40\r
- 186                   .set SCSI_Out_DBx__5__PC, CYREG_PRT4_PC6\r
- 187                   .set SCSI_Out_DBx__5__PORT, 4\r
- 188                   .set SCSI_Out_DBx__5__PRT, CYREG_PRT4_PRT\r
- 189                   .set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 190                   .set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 191                   .set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 192                   .set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 193                   .set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 194                   .set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 195                   .set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 196                   .set SCSI_Out_DBx__5__PS, CYREG_PRT4_PS\r
- 197                   .set SCSI_Out_DBx__5__SHIFT, 6\r
- 198                   .set SCSI_Out_DBx__5__SLW, CYREG_PRT4_SLW\r
- 199                   .set SCSI_Out_DBx__6__AG, CYREG_PRT4_AG\r
- 200                   .set SCSI_Out_DBx__6__AMUX, CYREG_PRT4_AMUX\r
- 201                   .set SCSI_Out_DBx__6__BIE, CYREG_PRT4_BIE\r
- 202                   .set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 203                   .set SCSI_Out_DBx__6__BYP, CYREG_PRT4_BYP\r
- 204                   .set SCSI_Out_DBx__6__CTL, CYREG_PRT4_CTL\r
- 205                   .set SCSI_Out_DBx__6__DM0, CYREG_PRT4_DM0\r
- 206                   .set SCSI_Out_DBx__6__DM1, CYREG_PRT4_DM1\r
- 207                   .set SCSI_Out_DBx__6__DM2, CYREG_PRT4_DM2\r
- 208                   .set SCSI_Out_DBx__6__DR, CYREG_PRT4_DR\r
- 209                   .set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT4_INP_DIS\r
- 210                   .set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 211                   .set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT4_LCD_EN\r
- 212                   .set SCSI_Out_DBx__6__MASK, 0x20\r
- 213                   .set SCSI_Out_DBx__6__PC, CYREG_PRT4_PC5\r
- 214                   .set SCSI_Out_DBx__6__PORT, 4\r
- 215                   .set SCSI_Out_DBx__6__PRT, CYREG_PRT4_PRT\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 193\r
-\r
-\r
- 216                   .set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 217                   .set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 218                   .set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 219                   .set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 220                   .set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 221                   .set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 222                   .set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 223                   .set SCSI_Out_DBx__6__PS, CYREG_PRT4_PS\r
- 224                   .set SCSI_Out_DBx__6__SHIFT, 5\r
- 225                   .set SCSI_Out_DBx__6__SLW, CYREG_PRT4_SLW\r
- 226                   .set SCSI_Out_DBx__7__AG, CYREG_PRT4_AG\r
- 227                   .set SCSI_Out_DBx__7__AMUX, CYREG_PRT4_AMUX\r
- 228                   .set SCSI_Out_DBx__7__BIE, CYREG_PRT4_BIE\r
- 229                   .set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 230                   .set SCSI_Out_DBx__7__BYP, CYREG_PRT4_BYP\r
- 231                   .set SCSI_Out_DBx__7__CTL, CYREG_PRT4_CTL\r
- 232                   .set SCSI_Out_DBx__7__DM0, CYREG_PRT4_DM0\r
- 233                   .set SCSI_Out_DBx__7__DM1, CYREG_PRT4_DM1\r
- 234                   .set SCSI_Out_DBx__7__DM2, CYREG_PRT4_DM2\r
- 235                   .set SCSI_Out_DBx__7__DR, CYREG_PRT4_DR\r
- 236                   .set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT4_INP_DIS\r
- 237                   .set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 238                   .set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT4_LCD_EN\r
- 239                   .set SCSI_Out_DBx__7__MASK, 0x10\r
- 240                   .set SCSI_Out_DBx__7__PC, CYREG_PRT4_PC4\r
- 241                   .set SCSI_Out_DBx__7__PORT, 4\r
- 242                   .set SCSI_Out_DBx__7__PRT, CYREG_PRT4_PRT\r
- 243                   .set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 244                   .set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 245                   .set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 246                   .set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 247                   .set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 248                   .set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 249                   .set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 250                   .set SCSI_Out_DBx__7__PS, CYREG_PRT4_PS\r
- 251                   .set SCSI_Out_DBx__7__SHIFT, 4\r
- 252                   .set SCSI_Out_DBx__7__SLW, CYREG_PRT4_SLW\r
- 253                   .set SCSI_Out_DBx__DB0__AG, CYREG_PRT6_AG\r
- 254                   .set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT6_AMUX\r
- 255                   .set SCSI_Out_DBx__DB0__BIE, CYREG_PRT6_BIE\r
- 256                   .set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK\r
- 257                   .set SCSI_Out_DBx__DB0__BYP, CYREG_PRT6_BYP\r
- 258                   .set SCSI_Out_DBx__DB0__CTL, CYREG_PRT6_CTL\r
- 259                   .set SCSI_Out_DBx__DB0__DM0, CYREG_PRT6_DM0\r
- 260                   .set SCSI_Out_DBx__DB0__DM1, CYREG_PRT6_DM1\r
- 261                   .set SCSI_Out_DBx__DB0__DM2, CYREG_PRT6_DM2\r
- 262                   .set SCSI_Out_DBx__DB0__DR, CYREG_PRT6_DR\r
- 263                   .set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS\r
- 264                   .set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 265                   .set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN\r
- 266                   .set SCSI_Out_DBx__DB0__MASK, 0x08\r
- 267                   .set SCSI_Out_DBx__DB0__PC, CYREG_PRT6_PC3\r
- 268                   .set SCSI_Out_DBx__DB0__PORT, 6\r
- 269                   .set SCSI_Out_DBx__DB0__PRT, CYREG_PRT6_PRT\r
- 270                   .set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 271                   .set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 272                   .set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 194\r
-\r
-\r
- 273                   .set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 274                   .set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 275                   .set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
- 276                   .set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 277                   .set SCSI_Out_DBx__DB0__PS, CYREG_PRT6_PS\r
- 278                   .set SCSI_Out_DBx__DB0__SHIFT, 3\r
- 279                   .set SCSI_Out_DBx__DB0__SLW, CYREG_PRT6_SLW\r
- 280                   .set SCSI_Out_DBx__DB1__AG, CYREG_PRT6_AG\r
- 281                   .set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT6_AMUX\r
- 282                   .set SCSI_Out_DBx__DB1__BIE, CYREG_PRT6_BIE\r
- 283                   .set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
- 284                   .set SCSI_Out_DBx__DB1__BYP, CYREG_PRT6_BYP\r
- 285                   .set SCSI_Out_DBx__DB1__CTL, CYREG_PRT6_CTL\r
- 286                   .set SCSI_Out_DBx__DB1__DM0, CYREG_PRT6_DM0\r
- 287                   .set SCSI_Out_DBx__DB1__DM1, CYREG_PRT6_DM1\r
- 288                   .set SCSI_Out_DBx__DB1__DM2, CYREG_PRT6_DM2\r
- 289                   .set SCSI_Out_DBx__DB1__DR, CYREG_PRT6_DR\r
- 290                   .set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS\r
- 291                   .set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 292                   .set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN\r
- 293                   .set SCSI_Out_DBx__DB1__MASK, 0x04\r
- 294                   .set SCSI_Out_DBx__DB1__PC, CYREG_PRT6_PC2\r
- 295                   .set SCSI_Out_DBx__DB1__PORT, 6\r
- 296                   .set SCSI_Out_DBx__DB1__PRT, CYREG_PRT6_PRT\r
- 297                   .set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 298                   .set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 299                   .set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
- 300                   .set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 301                   .set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 302                   .set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
- 303                   .set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 304                   .set SCSI_Out_DBx__DB1__PS, CYREG_PRT6_PS\r
- 305                   .set SCSI_Out_DBx__DB1__SHIFT, 2\r
- 306                   .set SCSI_Out_DBx__DB1__SLW, CYREG_PRT6_SLW\r
- 307                   .set SCSI_Out_DBx__DB2__AG, CYREG_PRT6_AG\r
- 308                   .set SCSI_Out_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
- 309                   .set SCSI_Out_DBx__DB2__BIE, CYREG_PRT6_BIE\r
- 310                   .set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
- 311                   .set SCSI_Out_DBx__DB2__BYP, CYREG_PRT6_BYP\r
- 312                   .set SCSI_Out_DBx__DB2__CTL, CYREG_PRT6_CTL\r
- 313                   .set SCSI_Out_DBx__DB2__DM0, CYREG_PRT6_DM0\r
- 314                   .set SCSI_Out_DBx__DB2__DM1, CYREG_PRT6_DM1\r
- 315                   .set SCSI_Out_DBx__DB2__DM2, CYREG_PRT6_DM2\r
- 316                   .set SCSI_Out_DBx__DB2__DR, CYREG_PRT6_DR\r
- 317                   .set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
- 318                   .set SCSI_Out_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 319                   .set SCSI_Out_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
- 320                   .set SCSI_Out_DBx__DB2__MASK, 0x02\r
- 321                   .set SCSI_Out_DBx__DB2__PC, CYREG_PRT6_PC1\r
- 322                   .set SCSI_Out_DBx__DB2__PORT, 6\r
- 323                   .set SCSI_Out_DBx__DB2__PRT, CYREG_PRT6_PRT\r
- 324                   .set SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 325                   .set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 326                   .set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
- 327                   .set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 328                   .set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 329                   .set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 195\r
-\r
-\r
- 330                   .set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 331                   .set SCSI_Out_DBx__DB2__PS, CYREG_PRT6_PS\r
- 332                   .set SCSI_Out_DBx__DB2__SHIFT, 1\r
- 333                   .set SCSI_Out_DBx__DB2__SLW, CYREG_PRT6_SLW\r
- 334                   .set SCSI_Out_DBx__DB3__AG, CYREG_PRT6_AG\r
- 335                   .set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
- 336                   .set SCSI_Out_DBx__DB3__BIE, CYREG_PRT6_BIE\r
- 337                   .set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
- 338                   .set SCSI_Out_DBx__DB3__BYP, CYREG_PRT6_BYP\r
- 339                   .set SCSI_Out_DBx__DB3__CTL, CYREG_PRT6_CTL\r
- 340                   .set SCSI_Out_DBx__DB3__DM0, CYREG_PRT6_DM0\r
- 341                   .set SCSI_Out_DBx__DB3__DM1, CYREG_PRT6_DM1\r
- 342                   .set SCSI_Out_DBx__DB3__DM2, CYREG_PRT6_DM2\r
- 343                   .set SCSI_Out_DBx__DB3__DR, CYREG_PRT6_DR\r
- 344                   .set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
- 345                   .set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
- 346                   .set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
- 347                   .set SCSI_Out_DBx__DB3__MASK, 0x01\r
- 348                   .set SCSI_Out_DBx__DB3__PC, CYREG_PRT6_PC0\r
- 349                   .set SCSI_Out_DBx__DB3__PORT, 6\r
- 350                   .set SCSI_Out_DBx__DB3__PRT, CYREG_PRT6_PRT\r
- 351                   .set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
- 352                   .set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
- 353                   .set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
- 354                   .set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
- 355                   .set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
- 356                   .set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
- 357                   .set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
- 358                   .set SCSI_Out_DBx__DB3__PS, CYREG_PRT6_PS\r
- 359                   .set SCSI_Out_DBx__DB3__SHIFT, 0\r
- 360                   .set SCSI_Out_DBx__DB3__SLW, CYREG_PRT6_SLW\r
- 361                   .set SCSI_Out_DBx__DB4__AG, CYREG_PRT4_AG\r
- 362                   .set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT4_AMUX\r
- 363                   .set SCSI_Out_DBx__DB4__BIE, CYREG_PRT4_BIE\r
- 364                   .set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 365                   .set SCSI_Out_DBx__DB4__BYP, CYREG_PRT4_BYP\r
- 366                   .set SCSI_Out_DBx__DB4__CTL, CYREG_PRT4_CTL\r
- 367                   .set SCSI_Out_DBx__DB4__DM0, CYREG_PRT4_DM0\r
- 368                   .set SCSI_Out_DBx__DB4__DM1, CYREG_PRT4_DM1\r
- 369                   .set SCSI_Out_DBx__DB4__DM2, CYREG_PRT4_DM2\r
- 370                   .set SCSI_Out_DBx__DB4__DR, CYREG_PRT4_DR\r
- 371                   .set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT4_INP_DIS\r
- 372                   .set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 373                   .set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT4_LCD_EN\r
- 374                   .set SCSI_Out_DBx__DB4__MASK, 0x80\r
- 375                   .set SCSI_Out_DBx__DB4__PC, CYREG_PRT4_PC7\r
- 376                   .set SCSI_Out_DBx__DB4__PORT, 4\r
- 377                   .set SCSI_Out_DBx__DB4__PRT, CYREG_PRT4_PRT\r
- 378                   .set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 379                   .set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 380                   .set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 381                   .set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 382                   .set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 383                   .set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 384                   .set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 385                   .set SCSI_Out_DBx__DB4__PS, CYREG_PRT4_PS\r
- 386                   .set SCSI_Out_DBx__DB4__SHIFT, 7\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 196\r
-\r
-\r
- 387                   .set SCSI_Out_DBx__DB4__SLW, CYREG_PRT4_SLW\r
- 388                   .set SCSI_Out_DBx__DB5__AG, CYREG_PRT4_AG\r
- 389                   .set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT4_AMUX\r
- 390                   .set SCSI_Out_DBx__DB5__BIE, CYREG_PRT4_BIE\r
- 391                   .set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 392                   .set SCSI_Out_DBx__DB5__BYP, CYREG_PRT4_BYP\r
- 393                   .set SCSI_Out_DBx__DB5__CTL, CYREG_PRT4_CTL\r
- 394                   .set SCSI_Out_DBx__DB5__DM0, CYREG_PRT4_DM0\r
- 395                   .set SCSI_Out_DBx__DB5__DM1, CYREG_PRT4_DM1\r
- 396                   .set SCSI_Out_DBx__DB5__DM2, CYREG_PRT4_DM2\r
- 397                   .set SCSI_Out_DBx__DB5__DR, CYREG_PRT4_DR\r
- 398                   .set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT4_INP_DIS\r
- 399                   .set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 400                   .set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT4_LCD_EN\r
- 401                   .set SCSI_Out_DBx__DB5__MASK, 0x40\r
- 402                   .set SCSI_Out_DBx__DB5__PC, CYREG_PRT4_PC6\r
- 403                   .set SCSI_Out_DBx__DB5__PORT, 4\r
- 404                   .set SCSI_Out_DBx__DB5__PRT, CYREG_PRT4_PRT\r
- 405                   .set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 406                   .set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 407                   .set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 408                   .set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 409                   .set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 410                   .set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 411                   .set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 412                   .set SCSI_Out_DBx__DB5__PS, CYREG_PRT4_PS\r
- 413                   .set SCSI_Out_DBx__DB5__SHIFT, 6\r
- 414                   .set SCSI_Out_DBx__DB5__SLW, CYREG_PRT4_SLW\r
- 415                   .set SCSI_Out_DBx__DB6__AG, CYREG_PRT4_AG\r
- 416                   .set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT4_AMUX\r
- 417                   .set SCSI_Out_DBx__DB6__BIE, CYREG_PRT4_BIE\r
- 418                   .set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 419                   .set SCSI_Out_DBx__DB6__BYP, CYREG_PRT4_BYP\r
- 420                   .set SCSI_Out_DBx__DB6__CTL, CYREG_PRT4_CTL\r
- 421                   .set SCSI_Out_DBx__DB6__DM0, CYREG_PRT4_DM0\r
- 422                   .set SCSI_Out_DBx__DB6__DM1, CYREG_PRT4_DM1\r
- 423                   .set SCSI_Out_DBx__DB6__DM2, CYREG_PRT4_DM2\r
- 424                   .set SCSI_Out_DBx__DB6__DR, CYREG_PRT4_DR\r
- 425                   .set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT4_INP_DIS\r
- 426                   .set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 427                   .set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT4_LCD_EN\r
- 428                   .set SCSI_Out_DBx__DB6__MASK, 0x20\r
- 429                   .set SCSI_Out_DBx__DB6__PC, CYREG_PRT4_PC5\r
- 430                   .set SCSI_Out_DBx__DB6__PORT, 4\r
- 431                   .set SCSI_Out_DBx__DB6__PRT, CYREG_PRT4_PRT\r
- 432                   .set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 433                   .set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 434                   .set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 435                   .set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 436                   .set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 437                   .set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 438                   .set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 439                   .set SCSI_Out_DBx__DB6__PS, CYREG_PRT4_PS\r
- 440                   .set SCSI_Out_DBx__DB6__SHIFT, 5\r
- 441                   .set SCSI_Out_DBx__DB6__SLW, CYREG_PRT4_SLW\r
- 442                   .set SCSI_Out_DBx__DB7__AG, CYREG_PRT4_AG\r
- 443                   .set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT4_AMUX\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 197\r
-\r
-\r
- 444                   .set SCSI_Out_DBx__DB7__BIE, CYREG_PRT4_BIE\r
- 445                   .set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 446                   .set SCSI_Out_DBx__DB7__BYP, CYREG_PRT4_BYP\r
- 447                   .set SCSI_Out_DBx__DB7__CTL, CYREG_PRT4_CTL\r
- 448                   .set SCSI_Out_DBx__DB7__DM0, CYREG_PRT4_DM0\r
- 449                   .set SCSI_Out_DBx__DB7__DM1, CYREG_PRT4_DM1\r
- 450                   .set SCSI_Out_DBx__DB7__DM2, CYREG_PRT4_DM2\r
- 451                   .set SCSI_Out_DBx__DB7__DR, CYREG_PRT4_DR\r
- 452                   .set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT4_INP_DIS\r
- 453                   .set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 454                   .set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT4_LCD_EN\r
- 455                   .set SCSI_Out_DBx__DB7__MASK, 0x10\r
- 456                   .set SCSI_Out_DBx__DB7__PC, CYREG_PRT4_PC4\r
- 457                   .set SCSI_Out_DBx__DB7__PORT, 4\r
- 458                   .set SCSI_Out_DBx__DB7__PRT, CYREG_PRT4_PRT\r
- 459                   .set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 460                   .set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 461                   .set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 462                   .set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 463                   .set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 464                   .set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 465                   .set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 466                   .set SCSI_Out_DBx__DB7__PS, CYREG_PRT4_PS\r
- 467                   .set SCSI_Out_DBx__DB7__SHIFT, 4\r
- 468                   .set SCSI_Out_DBx__DB7__SLW, CYREG_PRT4_SLW\r
- 469                   \r
- 470                   /* USBFS_dp_int */\r
- 471                   .set USBFS_dp_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
- 472                   .set USBFS_dp_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
- 473                   .set USBFS_dp_int__INTC_MASK, 0x1000\r
- 474                   .set USBFS_dp_int__INTC_NUMBER, 12\r
- 475                   .set USBFS_dp_int__INTC_PRIOR_NUM, 7\r
- 476                   .set USBFS_dp_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_12\r
- 477                   .set USBFS_dp_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
- 478                   .set USBFS_dp_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
- 479                   \r
- 480                   /* USBFS_ep_0 */\r
- 481                   .set USBFS_ep_0__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
- 482                   .set USBFS_ep_0__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
- 483                   .set USBFS_ep_0__INTC_MASK, 0x1000000\r
- 484                   .set USBFS_ep_0__INTC_NUMBER, 24\r
- 485                   .set USBFS_ep_0__INTC_PRIOR_NUM, 7\r
- 486                   .set USBFS_ep_0__INTC_PRIOR_REG, CYREG_NVIC_PRI_24\r
- 487                   .set USBFS_ep_0__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
- 488                   .set USBFS_ep_0__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
- 489                   \r
- 490                   /* USBFS_ep_1 */\r
- 491                   .set USBFS_ep_1__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
- 492                   .set USBFS_ep_1__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
- 493                   .set USBFS_ep_1__INTC_MASK, 0x01\r
- 494                   .set USBFS_ep_1__INTC_NUMBER, 0\r
- 495                   .set USBFS_ep_1__INTC_PRIOR_NUM, 7\r
- 496                   .set USBFS_ep_1__INTC_PRIOR_REG, CYREG_NVIC_PRI_0\r
- 497                   .set USBFS_ep_1__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
- 498                   .set USBFS_ep_1__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
- 499                   \r
- 500                   /* USBFS_ep_2 */\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 198\r
-\r
-\r
- 501                   .set USBFS_ep_2__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
- 502                   .set USBFS_ep_2__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
- 503                   .set USBFS_ep_2__INTC_MASK, 0x02\r
- 504                   .set USBFS_ep_2__INTC_NUMBER, 1\r
- 505                   .set USBFS_ep_2__INTC_PRIOR_NUM, 7\r
- 506                   .set USBFS_ep_2__INTC_PRIOR_REG, CYREG_NVIC_PRI_1\r
- 507                   .set USBFS_ep_2__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
- 508                   .set USBFS_ep_2__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
- 509                   \r
- 510                   /* SD_PULLUP */\r
- 511                   .set SD_PULLUP__0__MASK, 0x02\r
- 512                   .set SD_PULLUP__0__PC, CYREG_PRT3_PC1\r
- 513                   .set SD_PULLUP__0__PORT, 3\r
- 514                   .set SD_PULLUP__0__SHIFT, 1\r
- 515                   .set SD_PULLUP__1__MASK, 0x04\r
- 516                   .set SD_PULLUP__1__PC, CYREG_PRT3_PC2\r
- 517                   .set SD_PULLUP__1__PORT, 3\r
- 518                   .set SD_PULLUP__1__SHIFT, 2\r
- 519                   .set SD_PULLUP__2__MASK, 0x08\r
- 520                   .set SD_PULLUP__2__PC, CYREG_PRT3_PC3\r
- 521                   .set SD_PULLUP__2__PORT, 3\r
- 522                   .set SD_PULLUP__2__SHIFT, 3\r
- 523                   .set SD_PULLUP__3__MASK, 0x10\r
- 524                   .set SD_PULLUP__3__PC, CYREG_PRT3_PC4\r
- 525                   .set SD_PULLUP__3__PORT, 3\r
- 526                   .set SD_PULLUP__3__SHIFT, 4\r
- 527                   .set SD_PULLUP__4__MASK, 0x20\r
- 528                   .set SD_PULLUP__4__PC, CYREG_PRT3_PC5\r
- 529                   .set SD_PULLUP__4__PORT, 3\r
- 530                   .set SD_PULLUP__4__SHIFT, 5\r
- 531                   .set SD_PULLUP__AG, CYREG_PRT3_AG\r
- 532                   .set SD_PULLUP__AMUX, CYREG_PRT3_AMUX\r
- 533                   .set SD_PULLUP__BIE, CYREG_PRT3_BIE\r
- 534                   .set SD_PULLUP__BIT_MASK, CYREG_PRT3_BIT_MASK\r
- 535                   .set SD_PULLUP__BYP, CYREG_PRT3_BYP\r
- 536                   .set SD_PULLUP__CTL, CYREG_PRT3_CTL\r
- 537                   .set SD_PULLUP__DM0, CYREG_PRT3_DM0\r
- 538                   .set SD_PULLUP__DM1, CYREG_PRT3_DM1\r
- 539                   .set SD_PULLUP__DM2, CYREG_PRT3_DM2\r
- 540                   .set SD_PULLUP__DR, CYREG_PRT3_DR\r
- 541                   .set SD_PULLUP__INP_DIS, CYREG_PRT3_INP_DIS\r
- 542                   .set SD_PULLUP__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
- 543                   .set SD_PULLUP__LCD_EN, CYREG_PRT3_LCD_EN\r
- 544                   .set SD_PULLUP__MASK, 0x3E\r
- 545                   .set SD_PULLUP__PORT, 3\r
- 546                   .set SD_PULLUP__PRT, CYREG_PRT3_PRT\r
- 547                   .set SD_PULLUP__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
- 548                   .set SD_PULLUP__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
- 549                   .set SD_PULLUP__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
- 550                   .set SD_PULLUP__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
- 551                   .set SD_PULLUP__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
- 552                   .set SD_PULLUP__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
- 553                   .set SD_PULLUP__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
- 554                   .set SD_PULLUP__PS, CYREG_PRT3_PS\r
- 555                   .set SD_PULLUP__SHIFT, 1\r
- 556                   .set SD_PULLUP__SLW, CYREG_PRT3_SLW\r
- 557                   \r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 199\r
-\r
-\r
- 558                   /* USBFS_USB */\r
- 559                   .set USBFS_USB__ARB_CFG, CYREG_USB_ARB_CFG\r
- 560                   .set USBFS_USB__ARB_EP1_CFG, CYREG_USB_ARB_EP1_CFG\r
- 561                   .set USBFS_USB__ARB_EP1_INT_EN, CYREG_USB_ARB_EP1_INT_EN\r
- 562                   .set USBFS_USB__ARB_EP1_SR, CYREG_USB_ARB_EP1_SR\r
- 563                   .set USBFS_USB__ARB_EP2_CFG, CYREG_USB_ARB_EP2_CFG\r
- 564                   .set USBFS_USB__ARB_EP2_INT_EN, CYREG_USB_ARB_EP2_INT_EN\r
- 565                   .set USBFS_USB__ARB_EP2_SR, CYREG_USB_ARB_EP2_SR\r
- 566                   .set USBFS_USB__ARB_EP3_CFG, CYREG_USB_ARB_EP3_CFG\r
- 567                   .set USBFS_USB__ARB_EP3_INT_EN, CYREG_USB_ARB_EP3_INT_EN\r
- 568                   .set USBFS_USB__ARB_EP3_SR, CYREG_USB_ARB_EP3_SR\r
- 569                   .set USBFS_USB__ARB_EP4_CFG, CYREG_USB_ARB_EP4_CFG\r
- 570                   .set USBFS_USB__ARB_EP4_INT_EN, CYREG_USB_ARB_EP4_INT_EN\r
- 571                   .set USBFS_USB__ARB_EP4_SR, CYREG_USB_ARB_EP4_SR\r
- 572                   .set USBFS_USB__ARB_EP5_CFG, CYREG_USB_ARB_EP5_CFG\r
- 573                   .set USBFS_USB__ARB_EP5_INT_EN, CYREG_USB_ARB_EP5_INT_EN\r
- 574                   .set USBFS_USB__ARB_EP5_SR, CYREG_USB_ARB_EP5_SR\r
- 575                   .set USBFS_USB__ARB_EP6_CFG, CYREG_USB_ARB_EP6_CFG\r
- 576                   .set USBFS_USB__ARB_EP6_INT_EN, CYREG_USB_ARB_EP6_INT_EN\r
- 577                   .set USBFS_USB__ARB_EP6_SR, CYREG_USB_ARB_EP6_SR\r
- 578                   .set USBFS_USB__ARB_EP7_CFG, CYREG_USB_ARB_EP7_CFG\r
- 579                   .set USBFS_USB__ARB_EP7_INT_EN, CYREG_USB_ARB_EP7_INT_EN\r
- 580                   .set USBFS_USB__ARB_EP7_SR, CYREG_USB_ARB_EP7_SR\r
- 581                   .set USBFS_USB__ARB_EP8_CFG, CYREG_USB_ARB_EP8_CFG\r
- 582                   .set USBFS_USB__ARB_EP8_INT_EN, CYREG_USB_ARB_EP8_INT_EN\r
- 583                   .set USBFS_USB__ARB_EP8_SR, CYREG_USB_ARB_EP8_SR\r
- 584                   .set USBFS_USB__ARB_INT_EN, CYREG_USB_ARB_INT_EN\r
- 585                   .set USBFS_USB__ARB_INT_SR, CYREG_USB_ARB_INT_SR\r
- 586                   .set USBFS_USB__ARB_RW1_DR, CYREG_USB_ARB_RW1_DR\r
- 587                   .set USBFS_USB__ARB_RW1_RA, CYREG_USB_ARB_RW1_RA\r
- 588                   .set USBFS_USB__ARB_RW1_RA_MSB, CYREG_USB_ARB_RW1_RA_MSB\r
- 589                   .set USBFS_USB__ARB_RW1_WA, CYREG_USB_ARB_RW1_WA\r
- 590                   .set USBFS_USB__ARB_RW1_WA_MSB, CYREG_USB_ARB_RW1_WA_MSB\r
- 591                   .set USBFS_USB__ARB_RW2_DR, CYREG_USB_ARB_RW2_DR\r
- 592                   .set USBFS_USB__ARB_RW2_RA, CYREG_USB_ARB_RW2_RA\r
- 593                   .set USBFS_USB__ARB_RW2_RA_MSB, CYREG_USB_ARB_RW2_RA_MSB\r
- 594                   .set USBFS_USB__ARB_RW2_WA, CYREG_USB_ARB_RW2_WA\r
- 595                   .set USBFS_USB__ARB_RW2_WA_MSB, CYREG_USB_ARB_RW2_WA_MSB\r
- 596                   .set USBFS_USB__ARB_RW3_DR, CYREG_USB_ARB_RW3_DR\r
- 597                   .set USBFS_USB__ARB_RW3_RA, CYREG_USB_ARB_RW3_RA\r
- 598                   .set USBFS_USB__ARB_RW3_RA_MSB, CYREG_USB_ARB_RW3_RA_MSB\r
- 599                   .set USBFS_USB__ARB_RW3_WA, CYREG_USB_ARB_RW3_WA\r
- 600                   .set USBFS_USB__ARB_RW3_WA_MSB, CYREG_USB_ARB_RW3_WA_MSB\r
- 601                   .set USBFS_USB__ARB_RW4_DR, CYREG_USB_ARB_RW4_DR\r
- 602                   .set USBFS_USB__ARB_RW4_RA, CYREG_USB_ARB_RW4_RA\r
- 603                   .set USBFS_USB__ARB_RW4_RA_MSB, CYREG_USB_ARB_RW4_RA_MSB\r
- 604                   .set USBFS_USB__ARB_RW4_WA, CYREG_USB_ARB_RW4_WA\r
- 605                   .set USBFS_USB__ARB_RW4_WA_MSB, CYREG_USB_ARB_RW4_WA_MSB\r
- 606                   .set USBFS_USB__ARB_RW5_DR, CYREG_USB_ARB_RW5_DR\r
- 607                   .set USBFS_USB__ARB_RW5_RA, CYREG_USB_ARB_RW5_RA\r
- 608                   .set USBFS_USB__ARB_RW5_RA_MSB, CYREG_USB_ARB_RW5_RA_MSB\r
- 609                   .set USBFS_USB__ARB_RW5_WA, CYREG_USB_ARB_RW5_WA\r
- 610                   .set USBFS_USB__ARB_RW5_WA_MSB, CYREG_USB_ARB_RW5_WA_MSB\r
- 611                   .set USBFS_USB__ARB_RW6_DR, CYREG_USB_ARB_RW6_DR\r
- 612                   .set USBFS_USB__ARB_RW6_RA, CYREG_USB_ARB_RW6_RA\r
- 613                   .set USBFS_USB__ARB_RW6_RA_MSB, CYREG_USB_ARB_RW6_RA_MSB\r
- 614                   .set USBFS_USB__ARB_RW6_WA, CYREG_USB_ARB_RW6_WA\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 200\r
-\r
-\r
- 615                   .set USBFS_USB__ARB_RW6_WA_MSB, CYREG_USB_ARB_RW6_WA_MSB\r
- 616                   .set USBFS_USB__ARB_RW7_DR, CYREG_USB_ARB_RW7_DR\r
- 617                   .set USBFS_USB__ARB_RW7_RA, CYREG_USB_ARB_RW7_RA\r
- 618                   .set USBFS_USB__ARB_RW7_RA_MSB, CYREG_USB_ARB_RW7_RA_MSB\r
- 619                   .set USBFS_USB__ARB_RW7_WA, CYREG_USB_ARB_RW7_WA\r
- 620                   .set USBFS_USB__ARB_RW7_WA_MSB, CYREG_USB_ARB_RW7_WA_MSB\r
- 621                   .set USBFS_USB__ARB_RW8_DR, CYREG_USB_ARB_RW8_DR\r
- 622                   .set USBFS_USB__ARB_RW8_RA, CYREG_USB_ARB_RW8_RA\r
- 623                   .set USBFS_USB__ARB_RW8_RA_MSB, CYREG_USB_ARB_RW8_RA_MSB\r
- 624                   .set USBFS_USB__ARB_RW8_WA, CYREG_USB_ARB_RW8_WA\r
- 625                   .set USBFS_USB__ARB_RW8_WA_MSB, CYREG_USB_ARB_RW8_WA_MSB\r
- 626                   .set USBFS_USB__BUF_SIZE, CYREG_USB_BUF_SIZE\r
- 627                   .set USBFS_USB__BUS_RST_CNT, CYREG_USB_BUS_RST_CNT\r
- 628                   .set USBFS_USB__CR0, CYREG_USB_CR0\r
- 629                   .set USBFS_USB__CR1, CYREG_USB_CR1\r
- 630                   .set USBFS_USB__CWA, CYREG_USB_CWA\r
- 631                   .set USBFS_USB__CWA_MSB, CYREG_USB_CWA_MSB\r
- 632                   .set USBFS_USB__DMA_THRES, CYREG_USB_DMA_THRES\r
- 633                   .set USBFS_USB__DMA_THRES_MSB, CYREG_USB_DMA_THRES_MSB\r
- 634                   .set USBFS_USB__DYN_RECONFIG, CYREG_USB_DYN_RECONFIG\r
- 635                   .set USBFS_USB__EP0_CNT, CYREG_USB_EP0_CNT\r
- 636                   .set USBFS_USB__EP0_CR, CYREG_USB_EP0_CR\r
- 637                   .set USBFS_USB__EP0_DR0, CYREG_USB_EP0_DR0\r
- 638                   .set USBFS_USB__EP0_DR1, CYREG_USB_EP0_DR1\r
- 639                   .set USBFS_USB__EP0_DR2, CYREG_USB_EP0_DR2\r
- 640                   .set USBFS_USB__EP0_DR3, CYREG_USB_EP0_DR3\r
- 641                   .set USBFS_USB__EP0_DR4, CYREG_USB_EP0_DR4\r
- 642                   .set USBFS_USB__EP0_DR5, CYREG_USB_EP0_DR5\r
- 643                   .set USBFS_USB__EP0_DR6, CYREG_USB_EP0_DR6\r
- 644                   .set USBFS_USB__EP0_DR7, CYREG_USB_EP0_DR7\r
- 645                   .set USBFS_USB__EP_ACTIVE, CYREG_USB_EP_ACTIVE\r
- 646                   .set USBFS_USB__EP_TYPE, CYREG_USB_EP_TYPE\r
- 647                   .set USBFS_USB__MEM_DATA, CYREG_USB_MEM_DATA_MBASE\r
- 648                   .set USBFS_USB__PM_ACT_CFG, CYREG_PM_ACT_CFG5\r
- 649                   .set USBFS_USB__PM_ACT_MSK, 0x01\r
- 650                   .set USBFS_USB__PM_STBY_CFG, CYREG_PM_STBY_CFG5\r
- 651                   .set USBFS_USB__PM_STBY_MSK, 0x01\r
- 652                   .set USBFS_USB__SIE_EP1_CNT0, CYREG_USB_SIE_EP1_CNT0\r
- 653                   .set USBFS_USB__SIE_EP1_CNT1, CYREG_USB_SIE_EP1_CNT1\r
- 654                   .set USBFS_USB__SIE_EP1_CR0, CYREG_USB_SIE_EP1_CR0\r
- 655                   .set USBFS_USB__SIE_EP2_CNT0, CYREG_USB_SIE_EP2_CNT0\r
- 656                   .set USBFS_USB__SIE_EP2_CNT1, CYREG_USB_SIE_EP2_CNT1\r
- 657                   .set USBFS_USB__SIE_EP2_CR0, CYREG_USB_SIE_EP2_CR0\r
- 658                   .set USBFS_USB__SIE_EP3_CNT0, CYREG_USB_SIE_EP3_CNT0\r
- 659                   .set USBFS_USB__SIE_EP3_CNT1, CYREG_USB_SIE_EP3_CNT1\r
- 660                   .set USBFS_USB__SIE_EP3_CR0, CYREG_USB_SIE_EP3_CR0\r
- 661                   .set USBFS_USB__SIE_EP4_CNT0, CYREG_USB_SIE_EP4_CNT0\r
- 662                   .set USBFS_USB__SIE_EP4_CNT1, CYREG_USB_SIE_EP4_CNT1\r
- 663                   .set USBFS_USB__SIE_EP4_CR0, CYREG_USB_SIE_EP4_CR0\r
- 664                   .set USBFS_USB__SIE_EP5_CNT0, CYREG_USB_SIE_EP5_CNT0\r
- 665                   .set USBFS_USB__SIE_EP5_CNT1, CYREG_USB_SIE_EP5_CNT1\r
- 666                   .set USBFS_USB__SIE_EP5_CR0, CYREG_USB_SIE_EP5_CR0\r
- 667                   .set USBFS_USB__SIE_EP6_CNT0, CYREG_USB_SIE_EP6_CNT0\r
- 668                   .set USBFS_USB__SIE_EP6_CNT1, CYREG_USB_SIE_EP6_CNT1\r
- 669                   .set USBFS_USB__SIE_EP6_CR0, CYREG_USB_SIE_EP6_CR0\r
- 670                   .set USBFS_USB__SIE_EP7_CNT0, CYREG_USB_SIE_EP7_CNT0\r
- 671                   .set USBFS_USB__SIE_EP7_CNT1, CYREG_USB_SIE_EP7_CNT1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 201\r
-\r
-\r
- 672                   .set USBFS_USB__SIE_EP7_CR0, CYREG_USB_SIE_EP7_CR0\r
- 673                   .set USBFS_USB__SIE_EP8_CNT0, CYREG_USB_SIE_EP8_CNT0\r
- 674                   .set USBFS_USB__SIE_EP8_CNT1, CYREG_USB_SIE_EP8_CNT1\r
- 675                   .set USBFS_USB__SIE_EP8_CR0, CYREG_USB_SIE_EP8_CR0\r
- 676                   .set USBFS_USB__SIE_EP_INT_EN, CYREG_USB_SIE_EP_INT_EN\r
- 677                   .set USBFS_USB__SIE_EP_INT_SR, CYREG_USB_SIE_EP_INT_SR\r
- 678                   .set USBFS_USB__SOF0, CYREG_USB_SOF0\r
- 679                   .set USBFS_USB__SOF1, CYREG_USB_SOF1\r
- 680                   .set USBFS_USB__USBIO_CR0, CYREG_USB_USBIO_CR0\r
- 681                   .set USBFS_USB__USBIO_CR1, CYREG_USB_USBIO_CR1\r
- 682                   .set USBFS_USB__USB_CLK_EN, CYREG_USB_USB_CLK_EN\r
- 683                   \r
- 684                   /* SCSI_Out */\r
- 685                   .set SCSI_Out__0__AG, CYREG_PRT4_AG\r
- 686                   .set SCSI_Out__0__AMUX, CYREG_PRT4_AMUX\r
- 687                   .set SCSI_Out__0__BIE, CYREG_PRT4_BIE\r
- 688                   .set SCSI_Out__0__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 689                   .set SCSI_Out__0__BYP, CYREG_PRT4_BYP\r
- 690                   .set SCSI_Out__0__CTL, CYREG_PRT4_CTL\r
- 691                   .set SCSI_Out__0__DM0, CYREG_PRT4_DM0\r
- 692                   .set SCSI_Out__0__DM1, CYREG_PRT4_DM1\r
- 693                   .set SCSI_Out__0__DM2, CYREG_PRT4_DM2\r
- 694                   .set SCSI_Out__0__DR, CYREG_PRT4_DR\r
- 695                   .set SCSI_Out__0__INP_DIS, CYREG_PRT4_INP_DIS\r
- 696                   .set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 697                   .set SCSI_Out__0__LCD_EN, CYREG_PRT4_LCD_EN\r
- 698                   .set SCSI_Out__0__MASK, 0x08\r
- 699                   .set SCSI_Out__0__PC, CYREG_PRT4_PC3\r
- 700                   .set SCSI_Out__0__PORT, 4\r
- 701                   .set SCSI_Out__0__PRT, CYREG_PRT4_PRT\r
- 702                   .set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 703                   .set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 704                   .set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 705                   .set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 706                   .set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 707                   .set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 708                   .set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 709                   .set SCSI_Out__0__PS, CYREG_PRT4_PS\r
- 710                   .set SCSI_Out__0__SHIFT, 3\r
- 711                   .set SCSI_Out__0__SLW, CYREG_PRT4_SLW\r
- 712                   .set SCSI_Out__1__AG, CYREG_PRT4_AG\r
- 713                   .set SCSI_Out__1__AMUX, CYREG_PRT4_AMUX\r
- 714                   .set SCSI_Out__1__BIE, CYREG_PRT4_BIE\r
- 715                   .set SCSI_Out__1__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 716                   .set SCSI_Out__1__BYP, CYREG_PRT4_BYP\r
- 717                   .set SCSI_Out__1__CTL, CYREG_PRT4_CTL\r
- 718                   .set SCSI_Out__1__DM0, CYREG_PRT4_DM0\r
- 719                   .set SCSI_Out__1__DM1, CYREG_PRT4_DM1\r
- 720                   .set SCSI_Out__1__DM2, CYREG_PRT4_DM2\r
- 721                   .set SCSI_Out__1__DR, CYREG_PRT4_DR\r
- 722                   .set SCSI_Out__1__INP_DIS, CYREG_PRT4_INP_DIS\r
- 723                   .set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 724                   .set SCSI_Out__1__LCD_EN, CYREG_PRT4_LCD_EN\r
- 725                   .set SCSI_Out__1__MASK, 0x04\r
- 726                   .set SCSI_Out__1__PC, CYREG_PRT4_PC2\r
- 727                   .set SCSI_Out__1__PORT, 4\r
- 728                   .set SCSI_Out__1__PRT, CYREG_PRT4_PRT\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 202\r
-\r
-\r
- 729                   .set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 730                   .set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 731                   .set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 732                   .set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 733                   .set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 734                   .set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 735                   .set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 736                   .set SCSI_Out__1__PS, CYREG_PRT4_PS\r
- 737                   .set SCSI_Out__1__SHIFT, 2\r
- 738                   .set SCSI_Out__1__SLW, CYREG_PRT4_SLW\r
- 739                   .set SCSI_Out__2__AG, CYREG_PRT0_AG\r
- 740                   .set SCSI_Out__2__AMUX, CYREG_PRT0_AMUX\r
- 741                   .set SCSI_Out__2__BIE, CYREG_PRT0_BIE\r
- 742                   .set SCSI_Out__2__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 743                   .set SCSI_Out__2__BYP, CYREG_PRT0_BYP\r
- 744                   .set SCSI_Out__2__CTL, CYREG_PRT0_CTL\r
- 745                   .set SCSI_Out__2__DM0, CYREG_PRT0_DM0\r
- 746                   .set SCSI_Out__2__DM1, CYREG_PRT0_DM1\r
- 747                   .set SCSI_Out__2__DM2, CYREG_PRT0_DM2\r
- 748                   .set SCSI_Out__2__DR, CYREG_PRT0_DR\r
- 749                   .set SCSI_Out__2__INP_DIS, CYREG_PRT0_INP_DIS\r
- 750                   .set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 751                   .set SCSI_Out__2__LCD_EN, CYREG_PRT0_LCD_EN\r
- 752                   .set SCSI_Out__2__MASK, 0x80\r
- 753                   .set SCSI_Out__2__PC, CYREG_PRT0_PC7\r
- 754                   .set SCSI_Out__2__PORT, 0\r
- 755                   .set SCSI_Out__2__PRT, CYREG_PRT0_PRT\r
- 756                   .set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 757                   .set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 758                   .set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 759                   .set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 760                   .set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 761                   .set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 762                   .set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 763                   .set SCSI_Out__2__PS, CYREG_PRT0_PS\r
- 764                   .set SCSI_Out__2__SHIFT, 7\r
- 765                   .set SCSI_Out__2__SLW, CYREG_PRT0_SLW\r
- 766                   .set SCSI_Out__3__AG, CYREG_PRT0_AG\r
- 767                   .set SCSI_Out__3__AMUX, CYREG_PRT0_AMUX\r
- 768                   .set SCSI_Out__3__BIE, CYREG_PRT0_BIE\r
- 769                   .set SCSI_Out__3__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 770                   .set SCSI_Out__3__BYP, CYREG_PRT0_BYP\r
- 771                   .set SCSI_Out__3__CTL, CYREG_PRT0_CTL\r
- 772                   .set SCSI_Out__3__DM0, CYREG_PRT0_DM0\r
- 773                   .set SCSI_Out__3__DM1, CYREG_PRT0_DM1\r
- 774                   .set SCSI_Out__3__DM2, CYREG_PRT0_DM2\r
- 775                   .set SCSI_Out__3__DR, CYREG_PRT0_DR\r
- 776                   .set SCSI_Out__3__INP_DIS, CYREG_PRT0_INP_DIS\r
- 777                   .set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 778                   .set SCSI_Out__3__LCD_EN, CYREG_PRT0_LCD_EN\r
- 779                   .set SCSI_Out__3__MASK, 0x40\r
- 780                   .set SCSI_Out__3__PC, CYREG_PRT0_PC6\r
- 781                   .set SCSI_Out__3__PORT, 0\r
- 782                   .set SCSI_Out__3__PRT, CYREG_PRT0_PRT\r
- 783                   .set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 784                   .set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 785                   .set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 203\r
-\r
-\r
- 786                   .set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 787                   .set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 788                   .set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 789                   .set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 790                   .set SCSI_Out__3__PS, CYREG_PRT0_PS\r
- 791                   .set SCSI_Out__3__SHIFT, 6\r
- 792                   .set SCSI_Out__3__SLW, CYREG_PRT0_SLW\r
- 793                   .set SCSI_Out__4__AG, CYREG_PRT0_AG\r
- 794                   .set SCSI_Out__4__AMUX, CYREG_PRT0_AMUX\r
- 795                   .set SCSI_Out__4__BIE, CYREG_PRT0_BIE\r
- 796                   .set SCSI_Out__4__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 797                   .set SCSI_Out__4__BYP, CYREG_PRT0_BYP\r
- 798                   .set SCSI_Out__4__CTL, CYREG_PRT0_CTL\r
- 799                   .set SCSI_Out__4__DM0, CYREG_PRT0_DM0\r
- 800                   .set SCSI_Out__4__DM1, CYREG_PRT0_DM1\r
- 801                   .set SCSI_Out__4__DM2, CYREG_PRT0_DM2\r
- 802                   .set SCSI_Out__4__DR, CYREG_PRT0_DR\r
- 803                   .set SCSI_Out__4__INP_DIS, CYREG_PRT0_INP_DIS\r
- 804                   .set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 805                   .set SCSI_Out__4__LCD_EN, CYREG_PRT0_LCD_EN\r
- 806                   .set SCSI_Out__4__MASK, 0x20\r
- 807                   .set SCSI_Out__4__PC, CYREG_PRT0_PC5\r
- 808                   .set SCSI_Out__4__PORT, 0\r
- 809                   .set SCSI_Out__4__PRT, CYREG_PRT0_PRT\r
- 810                   .set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 811                   .set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 812                   .set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 813                   .set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 814                   .set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 815                   .set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 816                   .set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 817                   .set SCSI_Out__4__PS, CYREG_PRT0_PS\r
- 818                   .set SCSI_Out__4__SHIFT, 5\r
- 819                   .set SCSI_Out__4__SLW, CYREG_PRT0_SLW\r
- 820                   .set SCSI_Out__5__AG, CYREG_PRT0_AG\r
- 821                   .set SCSI_Out__5__AMUX, CYREG_PRT0_AMUX\r
- 822                   .set SCSI_Out__5__BIE, CYREG_PRT0_BIE\r
- 823                   .set SCSI_Out__5__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 824                   .set SCSI_Out__5__BYP, CYREG_PRT0_BYP\r
- 825                   .set SCSI_Out__5__CTL, CYREG_PRT0_CTL\r
- 826                   .set SCSI_Out__5__DM0, CYREG_PRT0_DM0\r
- 827                   .set SCSI_Out__5__DM1, CYREG_PRT0_DM1\r
- 828                   .set SCSI_Out__5__DM2, CYREG_PRT0_DM2\r
- 829                   .set SCSI_Out__5__DR, CYREG_PRT0_DR\r
- 830                   .set SCSI_Out__5__INP_DIS, CYREG_PRT0_INP_DIS\r
- 831                   .set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 832                   .set SCSI_Out__5__LCD_EN, CYREG_PRT0_LCD_EN\r
- 833                   .set SCSI_Out__5__MASK, 0x10\r
- 834                   .set SCSI_Out__5__PC, CYREG_PRT0_PC4\r
- 835                   .set SCSI_Out__5__PORT, 0\r
- 836                   .set SCSI_Out__5__PRT, CYREG_PRT0_PRT\r
- 837                   .set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 838                   .set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 839                   .set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 840                   .set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 841                   .set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 842                   .set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 204\r
-\r
-\r
- 843                   .set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 844                   .set SCSI_Out__5__PS, CYREG_PRT0_PS\r
- 845                   .set SCSI_Out__5__SHIFT, 4\r
- 846                   .set SCSI_Out__5__SLW, CYREG_PRT0_SLW\r
- 847                   .set SCSI_Out__6__AG, CYREG_PRT0_AG\r
- 848                   .set SCSI_Out__6__AMUX, CYREG_PRT0_AMUX\r
- 849                   .set SCSI_Out__6__BIE, CYREG_PRT0_BIE\r
- 850                   .set SCSI_Out__6__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 851                   .set SCSI_Out__6__BYP, CYREG_PRT0_BYP\r
- 852                   .set SCSI_Out__6__CTL, CYREG_PRT0_CTL\r
- 853                   .set SCSI_Out__6__DM0, CYREG_PRT0_DM0\r
- 854                   .set SCSI_Out__6__DM1, CYREG_PRT0_DM1\r
- 855                   .set SCSI_Out__6__DM2, CYREG_PRT0_DM2\r
- 856                   .set SCSI_Out__6__DR, CYREG_PRT0_DR\r
- 857                   .set SCSI_Out__6__INP_DIS, CYREG_PRT0_INP_DIS\r
- 858                   .set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 859                   .set SCSI_Out__6__LCD_EN, CYREG_PRT0_LCD_EN\r
- 860                   .set SCSI_Out__6__MASK, 0x08\r
- 861                   .set SCSI_Out__6__PC, CYREG_PRT0_PC3\r
- 862                   .set SCSI_Out__6__PORT, 0\r
- 863                   .set SCSI_Out__6__PRT, CYREG_PRT0_PRT\r
- 864                   .set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 865                   .set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 866                   .set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 867                   .set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 868                   .set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 869                   .set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 870                   .set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 871                   .set SCSI_Out__6__PS, CYREG_PRT0_PS\r
- 872                   .set SCSI_Out__6__SHIFT, 3\r
- 873                   .set SCSI_Out__6__SLW, CYREG_PRT0_SLW\r
- 874                   .set SCSI_Out__7__AG, CYREG_PRT0_AG\r
- 875                   .set SCSI_Out__7__AMUX, CYREG_PRT0_AMUX\r
- 876                   .set SCSI_Out__7__BIE, CYREG_PRT0_BIE\r
- 877                   .set SCSI_Out__7__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 878                   .set SCSI_Out__7__BYP, CYREG_PRT0_BYP\r
- 879                   .set SCSI_Out__7__CTL, CYREG_PRT0_CTL\r
- 880                   .set SCSI_Out__7__DM0, CYREG_PRT0_DM0\r
- 881                   .set SCSI_Out__7__DM1, CYREG_PRT0_DM1\r
- 882                   .set SCSI_Out__7__DM2, CYREG_PRT0_DM2\r
- 883                   .set SCSI_Out__7__DR, CYREG_PRT0_DR\r
- 884                   .set SCSI_Out__7__INP_DIS, CYREG_PRT0_INP_DIS\r
- 885                   .set SCSI_Out__7__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 886                   .set SCSI_Out__7__LCD_EN, CYREG_PRT0_LCD_EN\r
- 887                   .set SCSI_Out__7__MASK, 0x04\r
- 888                   .set SCSI_Out__7__PC, CYREG_PRT0_PC2\r
- 889                   .set SCSI_Out__7__PORT, 0\r
- 890                   .set SCSI_Out__7__PRT, CYREG_PRT0_PRT\r
- 891                   .set SCSI_Out__7__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 892                   .set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 893                   .set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 894                   .set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 895                   .set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 896                   .set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 897                   .set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 898                   .set SCSI_Out__7__PS, CYREG_PRT0_PS\r
- 899                   .set SCSI_Out__7__SHIFT, 2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 205\r
-\r
-\r
- 900                   .set SCSI_Out__7__SLW, CYREG_PRT0_SLW\r
- 901                   .set SCSI_Out__8__AG, CYREG_PRT0_AG\r
- 902                   .set SCSI_Out__8__AMUX, CYREG_PRT0_AMUX\r
- 903                   .set SCSI_Out__8__BIE, CYREG_PRT0_BIE\r
- 904                   .set SCSI_Out__8__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 905                   .set SCSI_Out__8__BYP, CYREG_PRT0_BYP\r
- 906                   .set SCSI_Out__8__CTL, CYREG_PRT0_CTL\r
- 907                   .set SCSI_Out__8__DM0, CYREG_PRT0_DM0\r
- 908                   .set SCSI_Out__8__DM1, CYREG_PRT0_DM1\r
- 909                   .set SCSI_Out__8__DM2, CYREG_PRT0_DM2\r
- 910                   .set SCSI_Out__8__DR, CYREG_PRT0_DR\r
- 911                   .set SCSI_Out__8__INP_DIS, CYREG_PRT0_INP_DIS\r
- 912                   .set SCSI_Out__8__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 913                   .set SCSI_Out__8__LCD_EN, CYREG_PRT0_LCD_EN\r
- 914                   .set SCSI_Out__8__MASK, 0x02\r
- 915                   .set SCSI_Out__8__PC, CYREG_PRT0_PC1\r
- 916                   .set SCSI_Out__8__PORT, 0\r
- 917                   .set SCSI_Out__8__PRT, CYREG_PRT0_PRT\r
- 918                   .set SCSI_Out__8__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 919                   .set SCSI_Out__8__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 920                   .set SCSI_Out__8__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 921                   .set SCSI_Out__8__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 922                   .set SCSI_Out__8__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 923                   .set SCSI_Out__8__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 924                   .set SCSI_Out__8__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 925                   .set SCSI_Out__8__PS, CYREG_PRT0_PS\r
- 926                   .set SCSI_Out__8__SHIFT, 1\r
- 927                   .set SCSI_Out__8__SLW, CYREG_PRT0_SLW\r
- 928                   .set SCSI_Out__9__AG, CYREG_PRT0_AG\r
- 929                   .set SCSI_Out__9__AMUX, CYREG_PRT0_AMUX\r
- 930                   .set SCSI_Out__9__BIE, CYREG_PRT0_BIE\r
- 931                   .set SCSI_Out__9__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 932                   .set SCSI_Out__9__BYP, CYREG_PRT0_BYP\r
- 933                   .set SCSI_Out__9__CTL, CYREG_PRT0_CTL\r
- 934                   .set SCSI_Out__9__DM0, CYREG_PRT0_DM0\r
- 935                   .set SCSI_Out__9__DM1, CYREG_PRT0_DM1\r
- 936                   .set SCSI_Out__9__DM2, CYREG_PRT0_DM2\r
- 937                   .set SCSI_Out__9__DR, CYREG_PRT0_DR\r
- 938                   .set SCSI_Out__9__INP_DIS, CYREG_PRT0_INP_DIS\r
- 939                   .set SCSI_Out__9__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 940                   .set SCSI_Out__9__LCD_EN, CYREG_PRT0_LCD_EN\r
- 941                   .set SCSI_Out__9__MASK, 0x01\r
- 942                   .set SCSI_Out__9__PC, CYREG_PRT0_PC0\r
- 943                   .set SCSI_Out__9__PORT, 0\r
- 944                   .set SCSI_Out__9__PRT, CYREG_PRT0_PRT\r
- 945                   .set SCSI_Out__9__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 946                   .set SCSI_Out__9__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 947                   .set SCSI_Out__9__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 948                   .set SCSI_Out__9__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 949                   .set SCSI_Out__9__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 950                   .set SCSI_Out__9__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 951                   .set SCSI_Out__9__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 952                   .set SCSI_Out__9__PS, CYREG_PRT0_PS\r
- 953                   .set SCSI_Out__9__SHIFT, 0\r
- 954                   .set SCSI_Out__9__SLW, CYREG_PRT0_SLW\r
- 955                   .set SCSI_Out__ACK__AG, CYREG_PRT0_AG\r
- 956                   .set SCSI_Out__ACK__AMUX, CYREG_PRT0_AMUX\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 206\r
-\r
-\r
- 957                   .set SCSI_Out__ACK__BIE, CYREG_PRT0_BIE\r
- 958                   .set SCSI_Out__ACK__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 959                   .set SCSI_Out__ACK__BYP, CYREG_PRT0_BYP\r
- 960                   .set SCSI_Out__ACK__CTL, CYREG_PRT0_CTL\r
- 961                   .set SCSI_Out__ACK__DM0, CYREG_PRT0_DM0\r
- 962                   .set SCSI_Out__ACK__DM1, CYREG_PRT0_DM1\r
- 963                   .set SCSI_Out__ACK__DM2, CYREG_PRT0_DM2\r
- 964                   .set SCSI_Out__ACK__DR, CYREG_PRT0_DR\r
- 965                   .set SCSI_Out__ACK__INP_DIS, CYREG_PRT0_INP_DIS\r
- 966                   .set SCSI_Out__ACK__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 967                   .set SCSI_Out__ACK__LCD_EN, CYREG_PRT0_LCD_EN\r
- 968                   .set SCSI_Out__ACK__MASK, 0x40\r
- 969                   .set SCSI_Out__ACK__PC, CYREG_PRT0_PC6\r
- 970                   .set SCSI_Out__ACK__PORT, 0\r
- 971                   .set SCSI_Out__ACK__PRT, CYREG_PRT0_PRT\r
- 972                   .set SCSI_Out__ACK__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 973                   .set SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 974                   .set SCSI_Out__ACK__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 975                   .set SCSI_Out__ACK__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 976                   .set SCSI_Out__ACK__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 977                   .set SCSI_Out__ACK__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 978                   .set SCSI_Out__ACK__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 979                   .set SCSI_Out__ACK__PS, CYREG_PRT0_PS\r
- 980                   .set SCSI_Out__ACK__SHIFT, 6\r
- 981                   .set SCSI_Out__ACK__SLW, CYREG_PRT0_SLW\r
- 982                   .set SCSI_Out__ATN__AG, CYREG_PRT4_AG\r
- 983                   .set SCSI_Out__ATN__AMUX, CYREG_PRT4_AMUX\r
- 984                   .set SCSI_Out__ATN__BIE, CYREG_PRT4_BIE\r
- 985                   .set SCSI_Out__ATN__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 986                   .set SCSI_Out__ATN__BYP, CYREG_PRT4_BYP\r
- 987                   .set SCSI_Out__ATN__CTL, CYREG_PRT4_CTL\r
- 988                   .set SCSI_Out__ATN__DM0, CYREG_PRT4_DM0\r
- 989                   .set SCSI_Out__ATN__DM1, CYREG_PRT4_DM1\r
- 990                   .set SCSI_Out__ATN__DM2, CYREG_PRT4_DM2\r
- 991                   .set SCSI_Out__ATN__DR, CYREG_PRT4_DR\r
- 992                   .set SCSI_Out__ATN__INP_DIS, CYREG_PRT4_INP_DIS\r
- 993                   .set SCSI_Out__ATN__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 994                   .set SCSI_Out__ATN__LCD_EN, CYREG_PRT4_LCD_EN\r
- 995                   .set SCSI_Out__ATN__MASK, 0x04\r
- 996                   .set SCSI_Out__ATN__PC, CYREG_PRT4_PC2\r
- 997                   .set SCSI_Out__ATN__PORT, 4\r
- 998                   .set SCSI_Out__ATN__PRT, CYREG_PRT4_PRT\r
- 999                   .set SCSI_Out__ATN__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 1000                  .set SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 1001                  .set SCSI_Out__ATN__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 1002                  .set SCSI_Out__ATN__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 1003                  .set SCSI_Out__ATN__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 1004                  .set SCSI_Out__ATN__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 1005                  .set SCSI_Out__ATN__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 1006                  .set SCSI_Out__ATN__PS, CYREG_PRT4_PS\r
- 1007                  .set SCSI_Out__ATN__SHIFT, 2\r
- 1008                  .set SCSI_Out__ATN__SLW, CYREG_PRT4_SLW\r
- 1009                  .set SCSI_Out__BSY__AG, CYREG_PRT0_AG\r
- 1010                  .set SCSI_Out__BSY__AMUX, CYREG_PRT0_AMUX\r
- 1011                  .set SCSI_Out__BSY__BIE, CYREG_PRT0_BIE\r
- 1012                  .set SCSI_Out__BSY__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1013                  .set SCSI_Out__BSY__BYP, CYREG_PRT0_BYP\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 207\r
-\r
-\r
- 1014                  .set SCSI_Out__BSY__CTL, CYREG_PRT0_CTL\r
- 1015                  .set SCSI_Out__BSY__DM0, CYREG_PRT0_DM0\r
- 1016                  .set SCSI_Out__BSY__DM1, CYREG_PRT0_DM1\r
- 1017                  .set SCSI_Out__BSY__DM2, CYREG_PRT0_DM2\r
- 1018                  .set SCSI_Out__BSY__DR, CYREG_PRT0_DR\r
- 1019                  .set SCSI_Out__BSY__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1020                  .set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1021                  .set SCSI_Out__BSY__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1022                  .set SCSI_Out__BSY__MASK, 0x80\r
- 1023                  .set SCSI_Out__BSY__PC, CYREG_PRT0_PC7\r
- 1024                  .set SCSI_Out__BSY__PORT, 0\r
- 1025                  .set SCSI_Out__BSY__PRT, CYREG_PRT0_PRT\r
- 1026                  .set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1027                  .set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1028                  .set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1029                  .set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1030                  .set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1031                  .set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1032                  .set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1033                  .set SCSI_Out__BSY__PS, CYREG_PRT0_PS\r
- 1034                  .set SCSI_Out__BSY__SHIFT, 7\r
- 1035                  .set SCSI_Out__BSY__SLW, CYREG_PRT0_SLW\r
- 1036                  .set SCSI_Out__CD__AG, CYREG_PRT0_AG\r
- 1037                  .set SCSI_Out__CD__AMUX, CYREG_PRT0_AMUX\r
- 1038                  .set SCSI_Out__CD__BIE, CYREG_PRT0_BIE\r
- 1039                  .set SCSI_Out__CD__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1040                  .set SCSI_Out__CD__BYP, CYREG_PRT0_BYP\r
- 1041                  .set SCSI_Out__CD__CTL, CYREG_PRT0_CTL\r
- 1042                  .set SCSI_Out__CD__DM0, CYREG_PRT0_DM0\r
- 1043                  .set SCSI_Out__CD__DM1, CYREG_PRT0_DM1\r
- 1044                  .set SCSI_Out__CD__DM2, CYREG_PRT0_DM2\r
- 1045                  .set SCSI_Out__CD__DR, CYREG_PRT0_DR\r
- 1046                  .set SCSI_Out__CD__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1047                  .set SCSI_Out__CD__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1048                  .set SCSI_Out__CD__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1049                  .set SCSI_Out__CD__MASK, 0x04\r
- 1050                  .set SCSI_Out__CD__PC, CYREG_PRT0_PC2\r
- 1051                  .set SCSI_Out__CD__PORT, 0\r
- 1052                  .set SCSI_Out__CD__PRT, CYREG_PRT0_PRT\r
- 1053                  .set SCSI_Out__CD__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1054                  .set SCSI_Out__CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1055                  .set SCSI_Out__CD__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1056                  .set SCSI_Out__CD__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1057                  .set SCSI_Out__CD__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1058                  .set SCSI_Out__CD__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1059                  .set SCSI_Out__CD__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1060                  .set SCSI_Out__CD__PS, CYREG_PRT0_PS\r
- 1061                  .set SCSI_Out__CD__SHIFT, 2\r
- 1062                  .set SCSI_Out__CD__SLW, CYREG_PRT0_SLW\r
- 1063                  .set SCSI_Out__DBP_raw__AG, CYREG_PRT4_AG\r
- 1064                  .set SCSI_Out__DBP_raw__AMUX, CYREG_PRT4_AMUX\r
- 1065                  .set SCSI_Out__DBP_raw__BIE, CYREG_PRT4_BIE\r
- 1066                  .set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT4_BIT_MASK\r
- 1067                  .set SCSI_Out__DBP_raw__BYP, CYREG_PRT4_BYP\r
- 1068                  .set SCSI_Out__DBP_raw__CTL, CYREG_PRT4_CTL\r
- 1069                  .set SCSI_Out__DBP_raw__DM0, CYREG_PRT4_DM0\r
- 1070                  .set SCSI_Out__DBP_raw__DM1, CYREG_PRT4_DM1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 208\r
-\r
-\r
- 1071                  .set SCSI_Out__DBP_raw__DM2, CYREG_PRT4_DM2\r
- 1072                  .set SCSI_Out__DBP_raw__DR, CYREG_PRT4_DR\r
- 1073                  .set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT4_INP_DIS\r
- 1074                  .set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
- 1075                  .set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT4_LCD_EN\r
- 1076                  .set SCSI_Out__DBP_raw__MASK, 0x08\r
- 1077                  .set SCSI_Out__DBP_raw__PC, CYREG_PRT4_PC3\r
- 1078                  .set SCSI_Out__DBP_raw__PORT, 4\r
- 1079                  .set SCSI_Out__DBP_raw__PRT, CYREG_PRT4_PRT\r
- 1080                  .set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
- 1081                  .set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
- 1082                  .set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
- 1083                  .set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
- 1084                  .set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
- 1085                  .set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
- 1086                  .set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
- 1087                  .set SCSI_Out__DBP_raw__PS, CYREG_PRT4_PS\r
- 1088                  .set SCSI_Out__DBP_raw__SHIFT, 3\r
- 1089                  .set SCSI_Out__DBP_raw__SLW, CYREG_PRT4_SLW\r
- 1090                  .set SCSI_Out__IO_raw__AG, CYREG_PRT0_AG\r
- 1091                  .set SCSI_Out__IO_raw__AMUX, CYREG_PRT0_AMUX\r
- 1092                  .set SCSI_Out__IO_raw__BIE, CYREG_PRT0_BIE\r
- 1093                  .set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1094                  .set SCSI_Out__IO_raw__BYP, CYREG_PRT0_BYP\r
- 1095                  .set SCSI_Out__IO_raw__CTL, CYREG_PRT0_CTL\r
- 1096                  .set SCSI_Out__IO_raw__DM0, CYREG_PRT0_DM0\r
- 1097                  .set SCSI_Out__IO_raw__DM1, CYREG_PRT0_DM1\r
- 1098                  .set SCSI_Out__IO_raw__DM2, CYREG_PRT0_DM2\r
- 1099                  .set SCSI_Out__IO_raw__DR, CYREG_PRT0_DR\r
- 1100                  .set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1101                  .set SCSI_Out__IO_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1102                  .set SCSI_Out__IO_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1103                  .set SCSI_Out__IO_raw__MASK, 0x01\r
- 1104                  .set SCSI_Out__IO_raw__PC, CYREG_PRT0_PC0\r
- 1105                  .set SCSI_Out__IO_raw__PORT, 0\r
- 1106                  .set SCSI_Out__IO_raw__PRT, CYREG_PRT0_PRT\r
- 1107                  .set SCSI_Out__IO_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1108                  .set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1109                  .set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1110                  .set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1111                  .set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1112                  .set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1113                  .set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1114                  .set SCSI_Out__IO_raw__PS, CYREG_PRT0_PS\r
- 1115                  .set SCSI_Out__IO_raw__SHIFT, 0\r
- 1116                  .set SCSI_Out__IO_raw__SLW, CYREG_PRT0_SLW\r
- 1117                  .set SCSI_Out__MSG__AG, CYREG_PRT0_AG\r
- 1118                  .set SCSI_Out__MSG__AMUX, CYREG_PRT0_AMUX\r
- 1119                  .set SCSI_Out__MSG__BIE, CYREG_PRT0_BIE\r
- 1120                  .set SCSI_Out__MSG__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1121                  .set SCSI_Out__MSG__BYP, CYREG_PRT0_BYP\r
- 1122                  .set SCSI_Out__MSG__CTL, CYREG_PRT0_CTL\r
- 1123                  .set SCSI_Out__MSG__DM0, CYREG_PRT0_DM0\r
- 1124                  .set SCSI_Out__MSG__DM1, CYREG_PRT0_DM1\r
- 1125                  .set SCSI_Out__MSG__DM2, CYREG_PRT0_DM2\r
- 1126                  .set SCSI_Out__MSG__DR, CYREG_PRT0_DR\r
- 1127                  .set SCSI_Out__MSG__INP_DIS, CYREG_PRT0_INP_DIS\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 209\r
-\r
-\r
- 1128                  .set SCSI_Out__MSG__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1129                  .set SCSI_Out__MSG__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1130                  .set SCSI_Out__MSG__MASK, 0x10\r
- 1131                  .set SCSI_Out__MSG__PC, CYREG_PRT0_PC4\r
- 1132                  .set SCSI_Out__MSG__PORT, 0\r
- 1133                  .set SCSI_Out__MSG__PRT, CYREG_PRT0_PRT\r
- 1134                  .set SCSI_Out__MSG__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1135                  .set SCSI_Out__MSG__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1136                  .set SCSI_Out__MSG__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1137                  .set SCSI_Out__MSG__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1138                  .set SCSI_Out__MSG__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1139                  .set SCSI_Out__MSG__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1140                  .set SCSI_Out__MSG__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1141                  .set SCSI_Out__MSG__PS, CYREG_PRT0_PS\r
- 1142                  .set SCSI_Out__MSG__SHIFT, 4\r
- 1143                  .set SCSI_Out__MSG__SLW, CYREG_PRT0_SLW\r
- 1144                  .set SCSI_Out__REQ__AG, CYREG_PRT0_AG\r
- 1145                  .set SCSI_Out__REQ__AMUX, CYREG_PRT0_AMUX\r
- 1146                  .set SCSI_Out__REQ__BIE, CYREG_PRT0_BIE\r
- 1147                  .set SCSI_Out__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1148                  .set SCSI_Out__REQ__BYP, CYREG_PRT0_BYP\r
- 1149                  .set SCSI_Out__REQ__CTL, CYREG_PRT0_CTL\r
- 1150                  .set SCSI_Out__REQ__DM0, CYREG_PRT0_DM0\r
- 1151                  .set SCSI_Out__REQ__DM1, CYREG_PRT0_DM1\r
- 1152                  .set SCSI_Out__REQ__DM2, CYREG_PRT0_DM2\r
- 1153                  .set SCSI_Out__REQ__DR, CYREG_PRT0_DR\r
- 1154                  .set SCSI_Out__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1155                  .set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1156                  .set SCSI_Out__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1157                  .set SCSI_Out__REQ__MASK, 0x02\r
- 1158                  .set SCSI_Out__REQ__PC, CYREG_PRT0_PC1\r
- 1159                  .set SCSI_Out__REQ__PORT, 0\r
- 1160                  .set SCSI_Out__REQ__PRT, CYREG_PRT0_PRT\r
- 1161                  .set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1162                  .set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1163                  .set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1164                  .set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1165                  .set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1166                  .set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1167                  .set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1168                  .set SCSI_Out__REQ__PS, CYREG_PRT0_PS\r
- 1169                  .set SCSI_Out__REQ__SHIFT, 1\r
- 1170                  .set SCSI_Out__REQ__SLW, CYREG_PRT0_SLW\r
- 1171                  .set SCSI_Out__RST__AG, CYREG_PRT0_AG\r
- 1172                  .set SCSI_Out__RST__AMUX, CYREG_PRT0_AMUX\r
- 1173                  .set SCSI_Out__RST__BIE, CYREG_PRT0_BIE\r
- 1174                  .set SCSI_Out__RST__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1175                  .set SCSI_Out__RST__BYP, CYREG_PRT0_BYP\r
- 1176                  .set SCSI_Out__RST__CTL, CYREG_PRT0_CTL\r
- 1177                  .set SCSI_Out__RST__DM0, CYREG_PRT0_DM0\r
- 1178                  .set SCSI_Out__RST__DM1, CYREG_PRT0_DM1\r
- 1179                  .set SCSI_Out__RST__DM2, CYREG_PRT0_DM2\r
- 1180                  .set SCSI_Out__RST__DR, CYREG_PRT0_DR\r
- 1181                  .set SCSI_Out__RST__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1182                  .set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1183                  .set SCSI_Out__RST__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1184                  .set SCSI_Out__RST__MASK, 0x20\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 210\r
-\r
-\r
- 1185                  .set SCSI_Out__RST__PC, CYREG_PRT0_PC5\r
- 1186                  .set SCSI_Out__RST__PORT, 0\r
- 1187                  .set SCSI_Out__RST__PRT, CYREG_PRT0_PRT\r
- 1188                  .set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1189                  .set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1190                  .set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1191                  .set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1192                  .set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1193                  .set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1194                  .set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1195                  .set SCSI_Out__RST__PS, CYREG_PRT0_PS\r
- 1196                  .set SCSI_Out__RST__SHIFT, 5\r
- 1197                  .set SCSI_Out__RST__SLW, CYREG_PRT0_SLW\r
- 1198                  .set SCSI_Out__SEL__AG, CYREG_PRT0_AG\r
- 1199                  .set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX\r
- 1200                  .set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE\r
- 1201                  .set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK\r
- 1202                  .set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP\r
- 1203                  .set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL\r
- 1204                  .set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0\r
- 1205                  .set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1\r
- 1206                  .set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2\r
- 1207                  .set SCSI_Out__SEL__DR, CYREG_PRT0_DR\r
- 1208                  .set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS\r
- 1209                  .set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
- 1210                  .set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN\r
- 1211                  .set SCSI_Out__SEL__MASK, 0x08\r
- 1212                  .set SCSI_Out__SEL__PC, CYREG_PRT0_PC3\r
- 1213                  .set SCSI_Out__SEL__PORT, 0\r
- 1214                  .set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT\r
- 1215                  .set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
- 1216                  .set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
- 1217                  .set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
- 1218                  .set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
- 1219                  .set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
- 1220                  .set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
- 1221                  .set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
- 1222                  .set SCSI_Out__SEL__PS, CYREG_PRT0_PS\r
- 1223                  .set SCSI_Out__SEL__SHIFT, 3\r
- 1224                  .set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW\r
- 1225                  \r
- 1226                  /* USBFS_Dm */\r
- 1227                  .set USBFS_Dm__0__MASK, 0x80\r
- 1228                  .set USBFS_Dm__0__PC, CYREG_IO_PC_PRT15_7_6_PC1\r
- 1229                  .set USBFS_Dm__0__PORT, 15\r
- 1230                  .set USBFS_Dm__0__SHIFT, 7\r
- 1231                  .set USBFS_Dm__AG, CYREG_PRT15_AG\r
- 1232                  .set USBFS_Dm__AMUX, CYREG_PRT15_AMUX\r
- 1233                  .set USBFS_Dm__BIE, CYREG_PRT15_BIE\r
- 1234                  .set USBFS_Dm__BIT_MASK, CYREG_PRT15_BIT_MASK\r
- 1235                  .set USBFS_Dm__BYP, CYREG_PRT15_BYP\r
- 1236                  .set USBFS_Dm__CTL, CYREG_PRT15_CTL\r
- 1237                  .set USBFS_Dm__DM0, CYREG_PRT15_DM0\r
- 1238                  .set USBFS_Dm__DM1, CYREG_PRT15_DM1\r
- 1239                  .set USBFS_Dm__DM2, CYREG_PRT15_DM2\r
- 1240                  .set USBFS_Dm__DR, CYREG_PRT15_DR\r
- 1241                  .set USBFS_Dm__INP_DIS, CYREG_PRT15_INP_DIS\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 211\r
-\r
-\r
- 1242                  .set USBFS_Dm__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
- 1243                  .set USBFS_Dm__LCD_EN, CYREG_PRT15_LCD_EN\r
- 1244                  .set USBFS_Dm__MASK, 0x80\r
- 1245                  .set USBFS_Dm__PORT, 15\r
- 1246                  .set USBFS_Dm__PRT, CYREG_PRT15_PRT\r
- 1247                  .set USBFS_Dm__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
- 1248                  .set USBFS_Dm__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
- 1249                  .set USBFS_Dm__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
- 1250                  .set USBFS_Dm__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
- 1251                  .set USBFS_Dm__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
- 1252                  .set USBFS_Dm__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
- 1253                  .set USBFS_Dm__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
- 1254                  .set USBFS_Dm__PS, CYREG_PRT15_PS\r
- 1255                  .set USBFS_Dm__SHIFT, 7\r
- 1256                  .set USBFS_Dm__SLW, CYREG_PRT15_SLW\r
- 1257                  \r
- 1258                  /* USBFS_Dp */\r
- 1259                  .set USBFS_Dp__0__MASK, 0x40\r
- 1260                  .set USBFS_Dp__0__PC, CYREG_IO_PC_PRT15_7_6_PC0\r
- 1261                  .set USBFS_Dp__0__PORT, 15\r
- 1262                  .set USBFS_Dp__0__SHIFT, 6\r
- 1263                  .set USBFS_Dp__AG, CYREG_PRT15_AG\r
- 1264                  .set USBFS_Dp__AMUX, CYREG_PRT15_AMUX\r
- 1265                  .set USBFS_Dp__BIE, CYREG_PRT15_BIE\r
- 1266                  .set USBFS_Dp__BIT_MASK, CYREG_PRT15_BIT_MASK\r
- 1267                  .set USBFS_Dp__BYP, CYREG_PRT15_BYP\r
- 1268                  .set USBFS_Dp__CTL, CYREG_PRT15_CTL\r
- 1269                  .set USBFS_Dp__DM0, CYREG_PRT15_DM0\r
- 1270                  .set USBFS_Dp__DM1, CYREG_PRT15_DM1\r
- 1271                  .set USBFS_Dp__DM2, CYREG_PRT15_DM2\r
- 1272                  .set USBFS_Dp__DR, CYREG_PRT15_DR\r
- 1273                  .set USBFS_Dp__INP_DIS, CYREG_PRT15_INP_DIS\r
- 1274                  .set USBFS_Dp__INTSTAT, CYREG_PICU15_INTSTAT\r
- 1275                  .set USBFS_Dp__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
- 1276                  .set USBFS_Dp__LCD_EN, CYREG_PRT15_LCD_EN\r
- 1277                  .set USBFS_Dp__MASK, 0x40\r
- 1278                  .set USBFS_Dp__PORT, 15\r
- 1279                  .set USBFS_Dp__PRT, CYREG_PRT15_PRT\r
- 1280                  .set USBFS_Dp__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
- 1281                  .set USBFS_Dp__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
- 1282                  .set USBFS_Dp__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
- 1283                  .set USBFS_Dp__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
- 1284                  .set USBFS_Dp__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
- 1285                  .set USBFS_Dp__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
- 1286                  .set USBFS_Dp__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
- 1287                  .set USBFS_Dp__PS, CYREG_PRT15_PS\r
- 1288                  .set USBFS_Dp__SHIFT, 6\r
- 1289                  .set USBFS_Dp__SLW, CYREG_PRT15_SLW\r
- 1290                  .set USBFS_Dp__SNAP, CYREG_PICU_15_SNAP_15\r
- 1291                  \r
- 1292                  /* Miscellaneous */\r
- 1293                  /* -- WARNING: define names containing LEOPARD or PANTHER are deprecated and will be removed in a f\r
- 1294                  .set CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO, 0\r
- 1295                  .set CYDEV_DEBUGGING_DPS_SWD_SWV, 6\r
- 1296                  .set CYDEV_CONFIG_UNUSED_IO_AllowButWarn, 0\r
- 1297                  .set CYDEV_CONFIGURATION_MODE_COMPRESSED, 0\r
- 1298                  .set CYDEV_CONFIG_FASTBOOT_ENABLED, 1\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 212\r
-\r
-\r
- 1299                  .set CYDEV_CHIP_REV_PSOC5LP_PRODUCTION, 0\r
- 1300                  .set CYDEV_CHIP_REVISION_5B_PRODUCTION, 0\r
- 1301                  .set CYDEV_CHIP_MEMBER_5B, 4\r
- 1302                  .set CYDEV_CHIP_FAMILY_PSOC5, 3\r
- 1303                  .set CYDEV_CHIP_DIE_PSOC5LP, 4\r
- 1304                  .set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_DIE_PSOC5LP\r
- 1305                  .set CYDEV_BOOTLOADER_IO_COMP_USBFS, 1\r
- 1306                  .set BCLK__BUS_CLK__HZ, 64000000\r
- 1307                  .set BCLK__BUS_CLK__KHZ, 64000\r
- 1308                  .set BCLK__BUS_CLK__MHZ, 64\r
- 1309                  .set CYDEV_BOOTLOADER_APPLICATIONS, 1\r
- 1310                  .set CYDEV_BOOTLOADER_CHECKSUM_BASIC, 0\r
- 1311                  .set CYDEV_BOOTLOADER_CHECKSUM_CRC, 1\r
- 1312                  .set CYDEV_BOOTLOADER_IO_COMP, CYDEV_BOOTLOADER_IO_COMP_USBFS\r
- 1313                  .set CYDEV_CHIP_DIE_ACTUAL, CYDEV_CHIP_DIE_EXPECT\r
- 1314                  .set CYDEV_CHIP_DIE_LEOPARD, 1\r
- 1315                  .set CYDEV_CHIP_DIE_PANTHER, 3\r
- 1316                  .set CYDEV_CHIP_DIE_PSOC4A, 2\r
- 1317                  .set CYDEV_CHIP_DIE_UNKNOWN, 0\r
- 1318                  .set CYDEV_CHIP_FAMILY_PSOC3, 1\r
- 1319                  .set CYDEV_CHIP_FAMILY_PSOC4, 2\r
- 1320                  .set CYDEV_CHIP_FAMILY_UNKNOWN, 0\r
- 1321                  .set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5\r
- 1322                  .set CYDEV_CHIP_JTAG_ID, 0x2E133069\r
- 1323                  .set CYDEV_CHIP_MEMBER_3A, 1\r
- 1324                  .set CYDEV_CHIP_MEMBER_4A, 2\r
- 1325                  .set CYDEV_CHIP_MEMBER_5A, 3\r
- 1326                  .set CYDEV_CHIP_MEMBER_UNKNOWN, 0\r
- 1327                  .set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B\r
- 1328                  .set CYDEV_CHIP_REVISION_3A_ES1, 0\r
- 1329                  .set CYDEV_CHIP_REVISION_3A_ES2, 1\r
- 1330                  .set CYDEV_CHIP_REVISION_3A_ES3, 3\r
- 1331                  .set CYDEV_CHIP_REVISION_3A_PRODUCTION, 3\r
- 1332                  .set CYDEV_CHIP_REVISION_4A_ES0, 17\r
- 1333                  .set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17\r
- 1334                  .set CYDEV_CHIP_REVISION_5A_ES0, 0\r
- 1335                  .set CYDEV_CHIP_REVISION_5A_ES1, 1\r
- 1336                  .set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1\r
- 1337                  .set CYDEV_CHIP_REVISION_5B_ES0, 0\r
- 1338                  .set CYDEV_CHIP_REVISION_USED, CYDEV_CHIP_REVISION_5B_PRODUCTION\r
- 1339                  .set CYDEV_CHIP_REV_EXPECT, CYDEV_CHIP_REV_PSOC5LP_PRODUCTION\r
- 1340                  .set CYDEV_CHIP_REV_LEOPARD_ES1, 0\r
- 1341                  .set CYDEV_CHIP_REV_LEOPARD_ES2, 1\r
- 1342                  .set CYDEV_CHIP_REV_LEOPARD_ES3, 3\r
- 1343                  .set CYDEV_CHIP_REV_LEOPARD_PRODUCTION, 3\r
- 1344                  .set CYDEV_CHIP_REV_PANTHER_ES0, 0\r
- 1345                  .set CYDEV_CHIP_REV_PANTHER_ES1, 1\r
- 1346                  .set CYDEV_CHIP_REV_PANTHER_PRODUCTION, 1\r
- 1347                  .set CYDEV_CHIP_REV_PSOC4A_ES0, 17\r
- 1348                  .set CYDEV_CHIP_REV_PSOC4A_PRODUCTION, 17\r
- 1349                  .set CYDEV_CHIP_REV_PSOC5LP_ES0, 0\r
- 1350                  .set CYDEV_CONFIGURATION_COMPRESSED, 1\r
- 1351                  .set CYDEV_CONFIGURATION_DMA, 0\r
- 1352                  .set CYDEV_CONFIGURATION_ECC, 0\r
- 1353                  .set CYDEV_CONFIGURATION_IMOENABLED, CYDEV_CONFIG_FASTBOOT_ENABLED\r
- 1354                  .set CYDEV_CONFIGURATION_MODE, CYDEV_CONFIGURATION_MODE_COMPRESSED\r
- 1355                  .set CYDEV_CONFIGURATION_MODE_DMA, 2\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 213\r
-\r
-\r
- 1356                  .set CYDEV_CONFIGURATION_MODE_UNCOMPRESSED, 1\r
- 1357                  .set CYDEV_CONFIG_UNUSED_IO, CYDEV_CONFIG_UNUSED_IO_AllowButWarn\r
- 1358                  .set CYDEV_CONFIG_UNUSED_IO_AllowWithInfo, 1\r
- 1359                  .set CYDEV_CONFIG_UNUSED_IO_Disallowed, 2\r
- 1360                  .set CYDEV_DEBUGGING_DPS, CYDEV_DEBUGGING_DPS_SWD_SWV\r
- 1361                  .set CYDEV_DEBUGGING_DPS_Disable, 3\r
- 1362                  .set CYDEV_DEBUGGING_DPS_JTAG_4, 1\r
- 1363                  .set CYDEV_DEBUGGING_DPS_JTAG_5, 0\r
- 1364                  .set CYDEV_DEBUGGING_DPS_SWD, 2\r
- 1365                  .set CYDEV_DEBUGGING_ENABLE, 1\r
- 1366                  .set CYDEV_DEBUGGING_XRES, 0\r
- 1367                  .set CYDEV_DEBUG_ENABLE_MASK, 0x20\r
- 1368                  .set CYDEV_DEBUG_ENABLE_REGISTER, CYREG_MLOGIC_DEBUG\r
- 1369                  .set CYDEV_DMA_CHANNELS_AVAILABLE, 24\r
- 1370                  .set CYDEV_ECC_ENABLE, 0\r
- 1371                  .set CYDEV_HEAP_SIZE, 0x0800\r
- 1372                  .set CYDEV_INSTRUCT_CACHE_ENABLED, 1\r
- 1373                  .set CYDEV_INTR_RISING, 0x00000000\r
- 1374                  .set CYDEV_PROJ_TYPE, 1\r
- 1375                  .set CYDEV_PROJ_TYPE_BOOTLOADER, 1\r
- 1376                  .set CYDEV_PROJ_TYPE_LOADABLE, 2\r
- 1377                  .set CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER, 3\r
- 1378                  .set CYDEV_PROJ_TYPE_STANDARD, 0\r
- 1379                  .set CYDEV_PROTECTION_ENABLE, 0\r
- 1380                  .set CYDEV_STACK_SIZE, 0x2000\r
- 1381                  .set CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP, 1\r
- 1382                  .set CYDEV_USE_BUNDLED_CMSIS, 1\r
- 1383                  .set CYDEV_VARIABLE_VDDA, 0\r
- 1384                  .set CYDEV_VDDA_MV, 5000\r
- 1385                  .set CYDEV_VDDD_MV, 5000\r
- 1386                  .set CYDEV_VDDIO0_MV, 5000\r
- 1387                  .set CYDEV_VDDIO1_MV, 5000\r
- 1388                  .set CYDEV_VDDIO2_MV, 5000\r
- 1389                  .set CYDEV_VDDIO3_MV, 5000\r
- 1390                  .set CYDEV_VIO0, 5\r
- 1391                  .set CYDEV_VIO0_MV, 5000\r
- 1392                  .set CYDEV_VIO1, 5\r
- 1393                  .set CYDEV_VIO1_MV, 5000\r
- 1394                  .set CYDEV_VIO2, 5\r
- 1395                  .set CYDEV_VIO2_MV, 5000\r
- 1396                  .set CYDEV_VIO3, 5\r
- 1397                  .set CYDEV_VIO3_MV, 5000\r
- 1398                  .set CyBtldr_Custom_Interface, CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO\r
- 1399                  .set CyBtldr_USBFS, CYDEV_BOOTLOADER_IO_COMP_USBFS\r
- 1400                  .set DMA_CHANNELS_USED__MASK0, 0x00000000\r
- 1401                  .set CYDEV_BOOTLOADER_ENABLE, 1\r
- 1402                  .endif\r
-  16                   \r
-  17                   .syntax unified\r
-  18                   .text\r
-  19                   .thumb\r
-  20                   \r
-  21                   \r
-  22                   /*******************************************************************************\r
-  23                   * Function Name: CyDelayCycles\r
-  24                   ********************************************************************************\r
-  25                   *\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 214\r
-\r
-\r
-  26                   * Summary:\r
-  27                   *  Delays for the specified number of cycles.\r
-  28                   *\r
-  29                   * Parameters:\r
-  30                   *  uint32 cycles: number of cycles to delay.\r
-  31                   *\r
-  32                   * Return:\r
-  33                   *  None\r
-  34                   *\r
-  35                   *******************************************************************************/\r
-  36                   /* void CyDelayCycles(uint32 cycles) */\r
-  37                   .align 3                    /* Align to 8 byte boundary (2^n) */\r
-  38                   .global CyDelayCycles\r
-  39                   .func CyDelayCycles, CyDelayCycles\r
-  40                   .type CyDelayCycles, %function\r
-  41                   .thumb_func\r
-  42                   CyDelayCycles:              /* cycles bytes */\r
-  43                   /* If ICache is enabled */\r
-  44                   .ifeq CYDEV_INSTRUCT_CACHE_ENABLED - 1\r
-  45                   \r
-  46 0000 0230             ADDS r0, r0, #2           /*  1    2   Round to nearest multiple of 4 */\r
-  47 0002 8008             LSRS r0, r0, #2           /*  1    2   Divide by 4 and set flags */\r
-  48 0004 00F00580         BEQ CyDelayCycles_done    /*  2    2   Skip if 0 */\r
-  49 0008 00BF             NOP                       /*  1    2   Loop alignment padding */\r
-  50                   \r
-  51                   CyDelayCycles_loop:\r
-  52 000a 0138             SUBS r0, r0, #1           /*  1    2 */\r
-  53 000c 0046             MOV r0, r0                /*  1    2   Pad loop to power of two cycles */\r
-  54 000e 7FF4FCAF         BNE CyDelayCycles_loop    /*  2    2 */\r
-  55                   \r
-  56                   CyDelayCycles_done:\r
-  57 0012 7047             BX lr                     /*  3    2 */\r
-  58                   \r
-  59                   .else\r
-  60                   \r
-  61                       CMP r0, #20               /*  1    2   If delay is short - jump to cycle */\r
-  62                       BLS CyDelayCycles_short   /*  1    2  */\r
-  63                       PUSH {r1}                 /*  2    2   PUSH r1 to stack */\r
-  64                       MOVS r1, #1               /*  1    2  */\r
-  65                   \r
-  66                       SUBS r0, r0, #20          /*  1    2   Subtract overhead */\r
-  67                       LDR r1,=CYREG_CACHE_CC_CTL/*  2    2   Load flash wait cycles value */\r
-  68                       LDRB r1, [r1, #0]         /*  2    2  */\r
-  69                       ANDS r1, #0xC0            /*  1    2  */\r
-  70                   \r
-  71                       LSRS r1, r1, #6           /*  1    2  */\r
-  72                       PUSH {r2}                 /*  1    2   PUSH r2 to stack */\r
-  73                       LDR r2, =cy_flash_cycles  /*  2    2  */\r
-  74                       LDRB r1, [r2, r1]         /*  2    2  */\r
-  75                   \r
-  76                       POP {r2}                  /*  2    2   POP r2 from stack */\r
-  77                       NOP                       /*  1    2   Alignment padding */\r
-  78                       NOP                       /*  1    2   Alignment padding */\r
-  79                       NOP                       /*  1    2   Alignment padding */\r
-  80                   \r
-  81                   CyDelayCycles_loop:\r
-  82                       SBCS r0, r0, r1           /*  1    2  */\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 215\r
-\r
-\r
-  83                       BPL CyDelayCycles_loop    /*  3    2  */\r
-  84                       NOP                       /*  1    2   Loop alignment padding */\r
-  85                       NOP                       /*  1    2   Loop alignment padding */\r
-  86                   \r
-  87                       POP {r1}                  /*  2    2   POP r1 from stack */\r
-  88                   CyDelayCycles_done:\r
-  89                       BX lr                     /*  3    2  */\r
-  90                       NOP                       /*  1    2   Alignment padding */\r
-  91                       NOP                       /*  1    2   Alignment padding */\r
-  92                   \r
-  93                   CyDelayCycles_short:\r
-  94                       SBCS r0, r0, #4           /*  1    2  */\r
-  95                       BPL CyDelayCycles_short   /*  3    2  */\r
-  96                       BX lr                     /*  3    2  */\r
-  97                   \r
-  98                   cy_flash_cycles:\r
-  99                   .byte 0x0B\r
- 100                   .byte 0x05\r
- 101                   .byte 0x07\r
- 102                   .byte 0x09\r
- 103                   .endif\r
- 104                   \r
- 105                   .endfunc\r
- 106                   \r
- 107                   \r
- 108                   /*******************************************************************************\r
- 109                   * Function Name: CyEnterCriticalSection\r
- 110                   ********************************************************************************\r
- 111                   *\r
- 112                   * Summary:\r
- 113                   *  CyEnterCriticalSection disables interrupts and returns a value indicating\r
- 114                   *  whether interrupts were previously enabled (the actual value depends on\r
- 115                   *  whether the device is PSoC 3 or PSoC 5).\r
- 116                   *\r
- 117                   *  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit\r
- 118                   *  with interrupts still enabled. The test and set of the interrupt bits is not\r
- 119                   *  atomic; this is true for both PSoC 3 and PSoC 5. Therefore, to avoid\r
- 120                   *  corrupting processor state, it must be the policy that all interrupt routines\r
- 121                   *  restore the interrupt enable bits as they were found on entry.\r
- 122                   *\r
- 123                   * Parameters:\r
- 124                   *  None\r
- 125                   *\r
- 126                   * Return:\r
- 127                   *  uint8\r
- 128                   *   Returns 0 if interrupts were previously enabled or 1 if interrupts\r
- 129                   *   were previously disabled.\r
- 130                   *\r
- 131                   *******************************************************************************/\r
- 132                   /* uint8 CyEnterCriticalSection(void) */\r
- 133                   .global CyEnterCriticalSection\r
- 134                   .func CyEnterCriticalSection, CyEnterCriticalSection\r
- 135                   .type CyEnterCriticalSection, %function\r
- 136                   .thumb_func\r
- 137                   CyEnterCriticalSection:\r
- 138 0014 EFF31080         MRS r0, PRIMASK         /* Save and return interrupt state */\r
- 139 0018 72B6             CPSID I                 /* Disable interrupts */\r
-\fARM GAS  .\Generated_Source\PSoC5\CyBootAsmGnu.s                      page 216\r
-\r
-\r
- 140 001a 7047             BX lr\r
- 141                   .endfunc\r
- 142                   \r
- 143                   \r
- 144                   /*******************************************************************************\r
- 145                   * Function Name: CyExitCriticalSection\r
- 146                   ********************************************************************************\r
- 147                   *\r
- 148                   * Summary:\r
- 149                   *  CyExitCriticalSection re-enables interrupts if they were enabled before\r
- 150                   *  CyEnterCriticalSection was called. The argument should be the value returned\r
- 151                   *  from CyEnterCriticalSection.\r
- 152                   *\r
- 153                   * Parameters:\r
- 154                   *  uint8 savedIntrStatus:\r
- 155                   *   Saved interrupt status returned by the CyEnterCriticalSection function.\r
- 156                   *\r
- 157                   * Return:\r
- 158                   *  None\r
- 159                   *\r
- 160                   *******************************************************************************/\r
- 161                   /* void CyExitCriticalSection(uint8 savedIntrStatus) */\r
- 162                   .global CyExitCriticalSection\r
- 163                   .func CyExitCriticalSection, CyExitCriticalSection\r
- 164                   .type CyExitCriticalSection, %function\r
- 165                   .thumb_func\r
- 166                   CyExitCriticalSection:\r
- 167 001c 80F31088         MSR PRIMASK, r0         /* Restore interrupt state */\r
- 168 0020 7047             BX lr\r
- 169                   .endfunc\r
- 170                   \r
- 171 0022 00BFAFF3     .end\r
- 171      0080\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.o
deleted file mode 100755 (executable)
index b15745c..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyBootAsmGnu.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.lst
deleted file mode 100755 (executable)
index adf1408..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.lst
+++ /dev/null
@@ -1,6089 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "CyDmac.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CyDmacConfigure,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global CyDmacConfigure\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   CyDmacConfigure, %function\r
-  24                   CyDmacConfigure:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\CyDmac.c"\r
-   1:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/CyDmac.c **** * File Name: CyDmac.c\r
-   3:.\Generated_Source\PSoC5/CyDmac.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-   5:.\Generated_Source\PSoC5/CyDmac.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/CyDmac.c **** *  Provides an API for the DMAC component. The API includes functions for the\r
-   7:.\Generated_Source\PSoC5/CyDmac.c **** *  DMA controller, DMA channels and Transfer Descriptors.\r
-   8:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-   9:.\Generated_Source\PSoC5/CyDmac.c **** *  This API is the library version not the auto generated code that gets\r
-  10:.\Generated_Source\PSoC5/CyDmac.c **** *  generated when the user places a DMA component on the schematic.\r
-  11:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  12:.\Generated_Source\PSoC5/CyDmac.c **** *  The auto generated code would use the APi's in this module.\r
-  13:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  14:.\Generated_Source\PSoC5/CyDmac.c **** * Note:\r
-  15:.\Generated_Source\PSoC5/CyDmac.c **** *  This code is endian agnostic.\r
-  16:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  17:.\Generated_Source\PSoC5/CyDmac.c **** *  The Transfer Descriptor memory can be used as regular memory if the TD's are\r
-  18:.\Generated_Source\PSoC5/CyDmac.c **** *  not being used.\r
-  19:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  20:.\Generated_Source\PSoC5/CyDmac.c **** *  This code uses the first byte of each TD to manage the free list of TD's.\r
-  21:.\Generated_Source\PSoC5/CyDmac.c **** *  The user can over write this once the TD is allocated.\r
-  22:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  23:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
-  24:.\Generated_Source\PSoC5/CyDmac.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  25:.\Generated_Source\PSoC5/CyDmac.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  26:.\Generated_Source\PSoC5/CyDmac.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  27:.\Generated_Source\PSoC5/CyDmac.c **** * the software package with which this file was provided.\r
-  28:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-  29:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  30:.\Generated_Source\PSoC5/CyDmac.c **** #include "CyDmac.h"\r
-  31:.\Generated_Source\PSoC5/CyDmac.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  33:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-  34:.\Generated_Source\PSoC5/CyDmac.c **** * The following variables are initialized from CyDmacConfigure() function that\r
-  35:.\Generated_Source\PSoC5/CyDmac.c **** * is executed from initialize_psoc() at the early initialization stage.\r
-  36:.\Generated_Source\PSoC5/CyDmac.c **** * In case of IAR EW IDE, initialize_psoc() is executed before the data sections\r
-  37:.\Generated_Source\PSoC5/CyDmac.c **** * are initialized. To avoid zeroing, these variables should be initialized\r
-  38:.\Generated_Source\PSoC5/CyDmac.c **** * properly during segments initialization as well.\r
-  39:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-  40:.\Generated_Source\PSoC5/CyDmac.c **** static uint8  CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;           /* Current Number of free eleme\r
-  41:.\Generated_Source\PSoC5/CyDmac.c **** static uint8  CyDmaTdFreeIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); /* Index of the first available\r
-  42:.\Generated_Source\PSoC5/CyDmac.c **** static uint32 CyDmaChannels = DMA_CHANNELS_USED__MASK0;              /* Bit map of DMA channel owne\r
-  43:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  44:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  45:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-  46:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmacConfigure\r
-  47:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
-  48:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  49:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
-  50:.\Generated_Source\PSoC5/CyDmac.c **** *  Creates a linked list of all the TDs to be allocated. This function is called\r
-  51:.\Generated_Source\PSoC5/CyDmac.c **** *  by the startup code; you do not normally need to call it. You could call this\r
-  52:.\Generated_Source\PSoC5/CyDmac.c **** *  function if all of the DMA channels are inactive.\r
-  53:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  54:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
-  55:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
-  56:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  57:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
-  58:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
-  59:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  60:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-  61:.\Generated_Source\PSoC5/CyDmac.c **** void CyDmacConfigure(void) \r
-  62:.\Generated_Source\PSoC5/CyDmac.c **** {\r
-  27                           .loc 1 62 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  63:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 dmaIndex;\r
-  64:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  65:.\Generated_Source\PSoC5/CyDmac.c ****     /* Set TD list variables. */\r
-  66:.\Generated_Source\PSoC5/CyDmac.c ****     CyDmaTdFreeIndex     = (uint8)(CY_DMA_NUMBEROF_TDS - 1u);\r
-  32                           .loc 1 66 0\r
-  33 0000 084B                 ldr     r3, .L5\r
-  34 0002 7F22                 movs    r2, #127\r
-  67:.\Generated_Source\PSoC5/CyDmac.c ****     CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;\r
-  35                           .loc 1 67 0\r
-  36 0004 8020                 movs    r0, #128\r
-  37 0006 0849                 ldr     r1, .L5+4\r
-  66:.\Generated_Source\PSoC5/CyDmac.c ****     CyDmaTdFreeIndex     = (uint8)(CY_DMA_NUMBEROF_TDS - 1u);\r
-  38                           .loc 1 66 0\r
-  39 0008 1A70                 strb    r2, [r3, #0]\r
-  40                           .loc 1 67 0\r
-  41 000a 5870                 strb    r0, [r3, #1]\r
-  42                   .LVL0:\r
-  43 000c 7E22                 movs    r2, #126\r
-  44                   .LVL1:\r
-  45                   .L2:\r
-  46 000e 531E                 subs    r3, r2, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 3\r
-\r
-\r
-  68:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  69:.\Generated_Source\PSoC5/CyDmac.c ****     /* Make TD free list. */\r
-  70:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); dmaIndex != 0u; dmaIndex--)\r
-  71:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
-  72:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = (uint8)(dmaIndex - 1u);\r
-  47                           .loc 1 72 0 discriminator 2\r
-  48 0010 01F80829             strb    r2, [r1], #-8\r
-  49 0014 DAB2                 uxtb    r2, r3\r
-  70:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); dmaIndex != 0u; dmaIndex--)\r
-  50                           .loc 1 70 0 discriminator 2\r
-  51 0016 FF2A                 cmp     r2, #255\r
-  52 0018 F9D1                 bne     .L2\r
-  73:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
-  74:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  75:.\Generated_Source\PSoC5/CyDmac.c ****     /* Make the last one point to zero. */\r
-  76:.\Generated_Source\PSoC5/CyDmac.c ****     CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = 0u;\r
-  53                           .loc 1 76 0\r
-  54 001a 0449                 ldr     r1, .L5+8\r
-  55 001c 0020                 movs    r0, #0\r
-  56 001e 0870                 strb    r0, [r1, #0]\r
-  57 0020 7047                 bx      lr\r
-  58                   .L6:\r
-  59 0022 00BF                 .align  2\r
-  60                   .L5:\r
-  61 0024 00000000             .word   .LANCHOR0\r
-  62 0028 F87B0040             .word   1073773560\r
-  63 002c 00780040             .word   1073772544\r
-  64                           .cfi_endproc\r
-  65                   .LFE0:\r
-  66                           .size   CyDmacConfigure, .-CyDmacConfigure\r
-  67                           .section        .text.CyDmacError,"ax",%progbits\r
-  68                           .align  1\r
-  69                           .global CyDmacError\r
-  70                           .thumb\r
-  71                           .thumb_func\r
-  72                           .type   CyDmacError, %function\r
-  73                   CyDmacError:\r
-  74                   .LFB1:\r
-  77:.\Generated_Source\PSoC5/CyDmac.c **** }\r
-  78:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  79:.\Generated_Source\PSoC5/CyDmac.c **** \r
-  80:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-  81:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmacError\r
-  82:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
-  83:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  84:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
-  85:.\Generated_Source\PSoC5/CyDmac.c **** *  Returns errors of the last failed DMA transaction.\r
-  86:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  87:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
-  88:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
-  89:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  90:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
-  91:.\Generated_Source\PSoC5/CyDmac.c **** *  Errors of the last failed DMA transaction.\r
-  92:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  93:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_PERIPH_ERR:\r
-  94:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when a peripheral responds to a bus transaction with an error\r
-  95:.\Generated_Source\PSoC5/CyDmac.c **** *   response.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 4\r
-\r
-\r
-  96:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-  97:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_UNPOP_ACC:\r
-  98:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when an access is attempted to an invalid address.\r
-  99:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 100:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_BUS_TIMEOUT:\r
- 101:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when a bus timeout occurs. Cleared by writing a 1. Timeout values\r
- 102:.\Generated_Source\PSoC5/CyDmac.c **** *   are determined by the BUS_TIMEOUT field in the PHUBCFG register.\r
- 103:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 104:.\Generated_Source\PSoC5/CyDmac.c **** * Theory:\r
- 105:.\Generated_Source\PSoC5/CyDmac.c **** *  Once an error occurs the error bits are sticky and are only cleared by a\r
- 106:.\Generated_Source\PSoC5/CyDmac.c **** *  write 1 to the error register.\r
- 107:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 108:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 109:.\Generated_Source\PSoC5/CyDmac.c **** uint8 CyDmacError(void) \r
- 110:.\Generated_Source\PSoC5/CyDmac.c **** {\r
-  75                           .loc 1 110 0\r
-  76                           .cfi_startproc\r
-  77                           @ args = 0, pretend = 0, frame = 0\r
-  78                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  79                           @ link register save eliminated.\r
- 111:.\Generated_Source\PSoC5/CyDmac.c ****     return((uint8)(((uint32) 0x0Fu) & *CY_DMA_ERR_PTR));\r
-  80                           .loc 1 111 0\r
-  81 0000 024B                 ldr     r3, .L8\r
-  82 0002 1868                 ldr     r0, [r3, #0]\r
- 112:.\Generated_Source\PSoC5/CyDmac.c **** }\r
-  83                           .loc 1 112 0\r
-  84 0004 00F00F00             and     r0, r0, #15\r
-  85 0008 7047                 bx      lr\r
-  86                   .L9:\r
-  87 000a 00BF                 .align  2\r
-  88                   .L8:\r
-  89 000c 04700040             .word   1073770500\r
-  90                           .cfi_endproc\r
-  91                   .LFE1:\r
-  92                           .size   CyDmacError, .-CyDmacError\r
-  93                           .section        .text.CyDmacClearError,"ax",%progbits\r
-  94                           .align  1\r
-  95                           .global CyDmacClearError\r
-  96                           .thumb\r
-  97                           .thumb_func\r
-  98                           .type   CyDmacClearError, %function\r
-  99                   CyDmacClearError:\r
- 100                   .LFB2:\r
- 113:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 114:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 115:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 116:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmacClearError\r
- 117:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 118:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 119:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 120:.\Generated_Source\PSoC5/CyDmac.c **** *  Clears the error bits in the error register of the DMAC.\r
- 121:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 122:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 123:.\Generated_Source\PSoC5/CyDmac.c **** * error:\r
- 124:.\Generated_Source\PSoC5/CyDmac.c **** *   Clears the error bits in the DMAC error register.\r
- 125:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 126:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_PERIPH_ERR:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 5\r
-\r
-\r
- 127:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when a peripheral responds to a bus transaction with an error\r
- 128:.\Generated_Source\PSoC5/CyDmac.c **** *   response.\r
- 129:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 130:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_UNPOP_ACC:\r
- 131:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when an access is attempted to an invalid address.\r
- 132:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 133:.\Generated_Source\PSoC5/CyDmac.c **** *  DMAC_BUS_TIMEOUT:\r
- 134:.\Generated_Source\PSoC5/CyDmac.c **** *   Set to 1 when a bus timeout occurs. Cleared by writing a 1. Timeout values\r
- 135:.\Generated_Source\PSoC5/CyDmac.c **** *   are determined by the BUS_TIMEOUT field in the PHUBCFG register.\r
- 136:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 137:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 138:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 139:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 140:.\Generated_Source\PSoC5/CyDmac.c **** * Theory:\r
- 141:.\Generated_Source\PSoC5/CyDmac.c **** *  Once an error occurs the error bits are sticky and are only cleared by a\r
- 142:.\Generated_Source\PSoC5/CyDmac.c **** *  write 1 to the error register.\r
- 143:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 144:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 145:.\Generated_Source\PSoC5/CyDmac.c **** void CyDmacClearError(uint8 error) \r
- 146:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 101                           .loc 1 146 0\r
- 102                           .cfi_startproc\r
- 103                           @ args = 0, pretend = 0, frame = 0\r
- 104                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 105                           @ link register save eliminated.\r
- 106                   .LVL2:\r
- 147:.\Generated_Source\PSoC5/CyDmac.c ****     *CY_DMA_ERR_PTR = (((uint32)0x0Fu) & ((uint32)error));\r
- 107                           .loc 1 147 0\r
- 108 0000 024B                 ldr     r3, .L11\r
- 109 0002 00F00F00             and     r0, r0, #15\r
- 110                   .LVL3:\r
- 111 0006 1860                 str     r0, [r3, #0]\r
- 112 0008 7047                 bx      lr\r
- 113                   .L12:\r
- 114 000a 00BF                 .align  2\r
- 115                   .L11:\r
- 116 000c 04700040             .word   1073770500\r
- 117                           .cfi_endproc\r
- 118                   .LFE2:\r
- 119                           .size   CyDmacClearError, .-CyDmacClearError\r
- 120                           .section        .text.CyDmacErrorAddress,"ax",%progbits\r
- 121                           .align  1\r
- 122                           .global CyDmacErrorAddress\r
- 123                           .thumb\r
- 124                           .thumb_func\r
- 125                           .type   CyDmacErrorAddress, %function\r
- 126                   CyDmacErrorAddress:\r
- 127                   .LFB3:\r
- 148:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 149:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 150:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 151:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 152:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmacErrorAddress\r
- 153:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 154:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 155:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 156:.\Generated_Source\PSoC5/CyDmac.c **** *  When an DMAC_BUS_TIMEOUT, DMAC_UNPOP_ACC and DMAC_PERIPH_ERR occurs the\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 6\r
-\r
-\r
- 157:.\Generated_Source\PSoC5/CyDmac.c **** *  address of the error is written to the error address register and can be read\r
- 158:.\Generated_Source\PSoC5/CyDmac.c **** *  with this function.\r
- 159:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 160:.\Generated_Source\PSoC5/CyDmac.c **** *  If there are multiple errors, only the address of the first is saved.\r
- 161:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 162:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 163:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 164:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 165:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 166:.\Generated_Source\PSoC5/CyDmac.c **** *  The address that caused the error.\r
- 167:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 168:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 169:.\Generated_Source\PSoC5/CyDmac.c **** uint32 CyDmacErrorAddress(void) \r
- 170:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 128                           .loc 1 170 0\r
- 129                           .cfi_startproc\r
- 130                           @ args = 0, pretend = 0, frame = 0\r
- 131                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 132                           @ link register save eliminated.\r
- 171:.\Generated_Source\PSoC5/CyDmac.c ****     return(CY_GET_REG32(CY_DMA_ERR_ADR_PTR));\r
- 133                           .loc 1 171 0\r
- 134 0000 014B                 ldr     r3, .L14\r
- 135 0002 1868                 ldr     r0, [r3, #0]\r
- 172:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 136                           .loc 1 172 0\r
- 137 0004 7047                 bx      lr\r
- 138                   .L15:\r
- 139 0006 00BF                 .align  2\r
- 140                   .L14:\r
- 141 0008 08700040             .word   1073770504\r
- 142                           .cfi_endproc\r
- 143                   .LFE3:\r
- 144                           .size   CyDmacErrorAddress, .-CyDmacErrorAddress\r
- 145                           .section        .text.CyDmaChAlloc,"ax",%progbits\r
- 146                           .align  1\r
- 147                           .global CyDmaChAlloc\r
- 148                           .thumb\r
- 149                           .thumb_func\r
- 150                           .type   CyDmaChAlloc, %function\r
- 151                   CyDmaChAlloc:\r
- 152                   .LFB4:\r
- 173:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 174:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 175:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 176:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChAlloc\r
- 177:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 178:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 179:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 180:.\Generated_Source\PSoC5/CyDmac.c **** *  Allocates a channel from the DMAC to be used in all functions that require a\r
- 181:.\Generated_Source\PSoC5/CyDmac.c **** *  channel handle.\r
- 182:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 183:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 184:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 185:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 186:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 187:.\Generated_Source\PSoC5/CyDmac.c **** *  The allocated channel number. Zero is a valid channel number.\r
- 188:.\Generated_Source\PSoC5/CyDmac.c **** *  DMA_INVALID_CHANNEL is returned if there are no channels available.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 7\r
-\r
-\r
- 189:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 190:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 191:.\Generated_Source\PSoC5/CyDmac.c **** uint8 CyDmaChAlloc(void) \r
- 192:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 153                           .loc 1 192 0\r
- 154                           .cfi_startproc\r
- 155                           @ args = 0, pretend = 0, frame = 0\r
- 156                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 157                   .LVL4:\r
- 158 0000 10B5                 push    {r4, lr}\r
- 159                   .LCFI0:\r
- 160                           .cfi_def_cfa_offset 8\r
- 161                           .cfi_offset 4, -8\r
- 162                           .cfi_offset 14, -4\r
- 193:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 interruptState;\r
- 194:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 dmaIndex;\r
- 195:.\Generated_Source\PSoC5/CyDmac.c ****     uint32 channel = 1u;\r
- 196:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 197:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 198:.\Generated_Source\PSoC5/CyDmac.c ****     /* Enter critical section! */\r
- 199:.\Generated_Source\PSoC5/CyDmac.c ****     interruptState = CyEnterCriticalSection();\r
- 163                           .loc 1 199 0\r
- 164 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
- 165                   .LVL5:\r
- 200:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 201:.\Generated_Source\PSoC5/CyDmac.c ****     /* Look for a free channel. */\r
- 202:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)\r
- 203:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 204:.\Generated_Source\PSoC5/CyDmac.c ****         if(0uL == (CyDmaChannels & channel))\r
- 166                           .loc 1 204 0\r
- 167 0006 0A4B                 ldr     r3, .L21\r
- 195:.\Generated_Source\PSoC5/CyDmac.c ****     uint32 channel = 1u;\r
- 168                           .loc 1 195 0\r
- 169 0008 0121                 movs    r1, #1\r
- 170                           .loc 1 204 0\r
- 171 000a 1A68                 ldr     r2, [r3, #0]\r
- 202:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)\r
- 172                           .loc 1 202 0\r
- 173 000c 0024                 movs    r4, #0\r
- 174                   .LVL6:\r
- 175                   .L19:\r
- 176                           .loc 1 204 0\r
- 177 000e 1142                 tst     r1, r2\r
- 178 0010 04D1                 bne     .L17\r
- 205:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 206:.\Generated_Source\PSoC5/CyDmac.c ****             /* Mark the channel as used. */\r
- 207:.\Generated_Source\PSoC5/CyDmac.c ****             CyDmaChannels |= channel;\r
- 179                           .loc 1 207 0\r
- 180 0012 42EA0103             orr     r3, r2, r1\r
- 181 0016 064A                 ldr     r2, .L21\r
- 182 0018 1360                 str     r3, [r2, #0]\r
- 183 001a 05E0                 b       .L18\r
- 184                   .L17:\r
- 202:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)\r
- 185                           .loc 1 202 0\r
- 186 001c 0134                 adds    r4, r4, #1\r
- 187 001e E4B2                 uxtb    r4, r4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 8\r
-\r
-\r
- 208:.\Generated_Source\PSoC5/CyDmac.c ****             break;\r
- 209:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 210:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 211:.\Generated_Source\PSoC5/CyDmac.c ****         channel <<= 1u;\r
- 188                           .loc 1 211 0\r
- 189 0020 4900                 lsls    r1, r1, #1\r
- 190                   .LVL7:\r
- 202:.\Generated_Source\PSoC5/CyDmac.c ****     for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)\r
- 191                           .loc 1 202 0\r
- 192 0022 182C                 cmp     r4, #24\r
- 193 0024 F3D1                 bne     .L19\r
- 212:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 213:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 214:.\Generated_Source\PSoC5/CyDmac.c ****     if(dmaIndex >= CY_DMA_NUMBEROF_CHANNELS)\r
- 215:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 216:.\Generated_Source\PSoC5/CyDmac.c ****         dmaIndex = CY_DMA_INVALID_CHANNEL;\r
- 194                           .loc 1 216 0\r
- 195 0026 FF24                 movs    r4, #255\r
- 196                   .LVL8:\r
- 197                   .L18:\r
- 217:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 218:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 219:.\Generated_Source\PSoC5/CyDmac.c ****     /* Exit critical section! */\r
- 220:.\Generated_Source\PSoC5/CyDmac.c ****     CyExitCriticalSection(interruptState);\r
- 198                           .loc 1 220 0\r
- 199 0028 FFF7FEFF             bl      CyExitCriticalSection\r
- 200                   .LVL9:\r
- 221:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 222:.\Generated_Source\PSoC5/CyDmac.c ****     return(dmaIndex);\r
- 223:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 201                           .loc 1 223 0\r
- 202 002c 2046                 mov     r0, r4\r
- 203 002e 10BD                 pop     {r4, pc}\r
- 204                   .L22:\r
- 205                           .align  2\r
- 206                   .L21:\r
- 207 0030 00000000             .word   .LANCHOR1\r
- 208                           .cfi_endproc\r
- 209                   .LFE4:\r
- 210                           .size   CyDmaChAlloc, .-CyDmaChAlloc\r
- 211                           .section        .text.CyDmaChFree,"ax",%progbits\r
- 212                           .align  1\r
- 213                           .global CyDmaChFree\r
- 214                           .thumb\r
- 215                           .thumb_func\r
- 216                           .type   CyDmaChFree, %function\r
- 217                   CyDmaChFree:\r
- 218                   .LFB5:\r
- 224:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 225:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 226:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 227:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChFree\r
- 228:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 229:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 230:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 231:.\Generated_Source\PSoC5/CyDmac.c **** *  Frees a channel allocated by DmaChAlloc().\r
- 232:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 9\r
-\r
-\r
- 233:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 234:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 235:.\Generated_Source\PSoC5/CyDmac.c **** *   The handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 236:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 237:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 238:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 239:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 240:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 241:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 242:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChFree(uint8 chHandle) \r
- 243:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 219                           .loc 1 243 0\r
- 220                           .cfi_startproc\r
- 221                           @ args = 0, pretend = 0, frame = 0\r
- 222                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 223                   .LVL10:\r
- 244:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 245:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 interruptState;\r
- 246:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 247:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 224                           .loc 1 247 0\r
- 225 0000 1728                 cmp     r0, #23\r
- 243:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 226                           .loc 1 243 0\r
- 227 0002 38B5                 push    {r3, r4, r5, lr}\r
- 228                   .LCFI1:\r
- 229                           .cfi_def_cfa_offset 16\r
- 230                           .cfi_offset 3, -16\r
- 231                           .cfi_offset 4, -12\r
- 232                           .cfi_offset 5, -8\r
- 233                           .cfi_offset 14, -4\r
- 243:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 234                           .loc 1 243 0\r
- 235 0004 0546                 mov     r5, r0\r
- 236 0006 4FF00104             mov     r4, #1\r
- 237                           .loc 1 247 0\r
- 238 000a 0CD8                 bhi     .L25\r
- 248:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 249:.\Generated_Source\PSoC5/CyDmac.c ****         /* Enter critical section */\r
- 250:.\Generated_Source\PSoC5/CyDmac.c ****         interruptState = CyEnterCriticalSection();\r
- 251:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 252:.\Generated_Source\PSoC5/CyDmac.c ****         /* Clear the bit mask that keeps track of ownership. */\r
- 253:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaChannels &= ~(((uint32) 1u) << chHandle);\r
- 239                           .loc 1 253 0\r
- 240 000c 04FA05F4             lsl     r4, r4, r5\r
- 250:.\Generated_Source\PSoC5/CyDmac.c ****         interruptState = CyEnterCriticalSection();\r
- 241                           .loc 1 250 0\r
- 242 0010 FFF7FEFF             bl      CyEnterCriticalSection\r
- 243                   .LVL11:\r
- 244                           .loc 1 253 0\r
- 245 0014 054B                 ldr     r3, .L26\r
- 246 0016 1A68                 ldr     r2, [r3, #0]\r
- 247 0018 22EA0402             bic     r2, r2, r4\r
- 248 001c 1A60                 str     r2, [r3, #0]\r
- 254:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 255:.\Generated_Source\PSoC5/CyDmac.c ****         /* Exit critical section */\r
- 256:.\Generated_Source\PSoC5/CyDmac.c ****         CyExitCriticalSection(interruptState);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 10\r
-\r
-\r
- 249                           .loc 1 256 0\r
- 250 001e FFF7FEFF             bl      CyExitCriticalSection\r
- 251                   .LVL12:\r
- 257:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 252                           .loc 1 257 0\r
- 253 0022 0020                 movs    r0, #0\r
- 254 0024 38BD                 pop     {r3, r4, r5, pc}\r
- 255                   .LVL13:\r
- 256                   .L25:\r
- 244:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 257                           .loc 1 244 0\r
- 258 0026 2046                 mov     r0, r4\r
- 259                   .LVL14:\r
- 258:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 259:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 260:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 261:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 260                           .loc 1 261 0\r
- 261 0028 38BD                 pop     {r3, r4, r5, pc}\r
- 262                   .L27:\r
- 263 002a 00BF                 .align  2\r
- 264                   .L26:\r
- 265 002c 00000000             .word   .LANCHOR1\r
- 266                           .cfi_endproc\r
- 267                   .LFE5:\r
- 268                           .size   CyDmaChFree, .-CyDmaChFree\r
- 269                           .section        .text.CyDmaChEnable,"ax",%progbits\r
- 270                           .align  1\r
- 271                           .global CyDmaChEnable\r
- 272                           .thumb\r
- 273                           .thumb_func\r
- 274                           .type   CyDmaChEnable, %function\r
- 275                   CyDmaChEnable:\r
- 276                   .LFB6:\r
- 262:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 263:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 264:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 265:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChEnable\r
- 266:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 267:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 268:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 269:.\Generated_Source\PSoC5/CyDmac.c **** *  Enables the DMA channel. A software or hardware request still must happen\r
- 270:.\Generated_Source\PSoC5/CyDmac.c **** *  before the channel is executed.\r
- 271:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 272:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 273:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 274:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 275:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 276:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 preserveTds:\r
- 277:.\Generated_Source\PSoC5/CyDmac.c **** *   Preserves the original TD state when the TD has completed. This parameter\r
- 278:.\Generated_Source\PSoC5/CyDmac.c **** *   applies to all TDs in the channel.\r
- 279:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 280:.\Generated_Source\PSoC5/CyDmac.c **** *   0 - When a TD is completed, the DMAC leaves the TD configuration values in\r
- 281:.\Generated_Source\PSoC5/CyDmac.c **** *   their current state, and does not restore them to their original state.\r
- 282:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 283:.\Generated_Source\PSoC5/CyDmac.c **** *   1 - When a TD is completed, the DMAC restores the original configuration\r
- 284:.\Generated_Source\PSoC5/CyDmac.c **** *   values of the TD.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 11\r
-\r
-\r
- 285:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 286:.\Generated_Source\PSoC5/CyDmac.c **** *  When preserveTds is set, the TD slot that equals the channel number becomes\r
- 287:.\Generated_Source\PSoC5/CyDmac.c **** *  RESERVED and that becomes where the working registers exist. So, for example,\r
- 288:.\Generated_Source\PSoC5/CyDmac.c **** *  if you are using CH06 and preserveTds is set, you are not allowed to use TD\r
- 289:.\Generated_Source\PSoC5/CyDmac.c **** *  slot 6. That is reclaimed by the DMA engine for its private use.\r
- 290:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 291:.\Generated_Source\PSoC5/CyDmac.c **** *  Note Do not chain back to a completed TD if the preserveTds for the channel\r
- 292:.\Generated_Source\PSoC5/CyDmac.c **** *  is set to 0. When a TD has completed preserveTds for the channel set to 0,\r
- 293:.\Generated_Source\PSoC5/CyDmac.c **** *  the transfer count will be at 0. If a TD with a transfer count of 0 is\r
- 294:.\Generated_Source\PSoC5/CyDmac.c **** *  started, the TD will transfer an indefinite amount of data.\r
- 295:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 296:.\Generated_Source\PSoC5/CyDmac.c **** *  Take extra precautions when using the hardware request (DRQ) option when the\r
- 297:.\Generated_Source\PSoC5/CyDmac.c **** *  preserveTds is set to 0, as you might be requesting the wrong data.\r
- 298:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 299:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 300:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 301:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 302:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 303:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 304:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChEnable(uint8 chHandle, uint8 preserveTds) \r
- 305:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 277                           .loc 1 305 0\r
- 278                           .cfi_startproc\r
- 279                           @ args = 0, pretend = 0, frame = 0\r
- 280                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 281                           @ link register save eliminated.\r
- 282                   .LVL15:\r
- 306:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 307:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 308:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 283                           .loc 1 308 0\r
- 284 0000 1728                 cmp     r0, #23\r
- 285 0002 12D8                 bhi     .L32\r
- 286 0004 0201                 lsls    r2, r0, #4\r
- 287 0006 0A4B                 ldr     r3, .L34\r
- 309:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 310:.\Generated_Source\PSoC5/CyDmac.c ****         if (0u != preserveTds)\r
- 288                           .loc 1 310 0\r
- 289 0008 19B1                 cbz     r1, .L30\r
- 311:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 312:.\Generated_Source\PSoC5/CyDmac.c ****             /* Store the intermediate TD states separately in CHn_SEP_TD0/1 to\r
- 313:.\Generated_Source\PSoC5/CyDmac.c ****             *  preserve the original TD chain\r
- 314:.\Generated_Source\PSoC5/CyDmac.c ****             */\r
- 315:.\Generated_Source\PSoC5/CyDmac.c ****             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= CY_DMA_CH_BASIC_CFG_WORK_SEP;\r
- 290                           .loc 1 315 0\r
- 291 000a D15C                 ldrb    r1, [r2, r3]    @ zero_extendqisi2\r
- 292                   .LVL16:\r
- 293 000c 41F02001             orr     r1, r1, #32\r
- 294 0010 02E0                 b       .L33\r
- 295                   .LVL17:\r
- 296                   .L30:\r
- 316:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 317:.\Generated_Source\PSoC5/CyDmac.c ****         else\r
- 318:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 319:.\Generated_Source\PSoC5/CyDmac.c ****             /* Store the intermediate and final TD states on top of the original TD chain */\r
- 320:.\Generated_Source\PSoC5/CyDmac.c ****             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_CH_BASIC_CFG_WORK_SEP);\r
- 297                           .loc 1 320 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 12\r
-\r
-\r
- 298 0012 D15C                 ldrb    r1, [r2, r3]    @ zero_extendqisi2\r
- 299                   .LVL18:\r
- 300 0014 01F0DF01             and     r1, r1, #223\r
- 301                   .L33:\r
- 302 0018 D154                 strb    r1, [r2, r3]\r
- 321:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 322:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 323:.\Generated_Source\PSoC5/CyDmac.c ****         /* Enable channel */\r
- 324:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= CY_DMA_CH_BASIC_CFG_EN;\r
- 303                           .loc 1 324 0\r
- 304 001a 054B                 ldr     r3, .L34\r
- 305 001c 0001                 lsls    r0, r0, #4\r
- 306                   .LVL19:\r
- 307 001e C25C                 ldrb    r2, [r0, r3]    @ zero_extendqisi2\r
- 308 0020 42F00101             orr     r1, r2, #1\r
- 309 0024 C154                 strb    r1, [r0, r3]\r
- 310                   .LVL20:\r
- 325:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 326:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 311                           .loc 1 326 0\r
- 312 0026 0020                 movs    r0, #0\r
- 313 0028 7047                 bx      lr\r
- 314                   .LVL21:\r
- 315                   .L32:\r
- 306:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 316                           .loc 1 306 0\r
- 317 002a 0120                 movs    r0, #1\r
- 318                   .LVL22:\r
- 327:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 328:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 329:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 330:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 319                           .loc 1 330 0\r
- 320 002c 7047                 bx      lr\r
- 321                   .L35:\r
- 322 002e 00BF                 .align  2\r
- 323                   .L34:\r
- 324 0030 10700040             .word   1073770512\r
- 325                           .cfi_endproc\r
- 326                   .LFE6:\r
- 327                           .size   CyDmaChEnable, .-CyDmaChEnable\r
- 328                           .section        .text.CyDmaChDisable,"ax",%progbits\r
- 329                           .align  1\r
- 330                           .global CyDmaChDisable\r
- 331                           .thumb\r
- 332                           .thumb_func\r
- 333                           .type   CyDmaChDisable, %function\r
- 334                   CyDmaChDisable:\r
- 335                   .LFB7:\r
- 331:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 332:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 333:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 334:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChDisable\r
- 335:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 336:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 337:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 338:.\Generated_Source\PSoC5/CyDmac.c **** *  Disables the DMA channel. Once this function is called, CyDmaChStatus() may\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 13\r
-\r
-\r
- 339:.\Generated_Source\PSoC5/CyDmac.c **** *  be called to determine when the channel is disabled and which TDs were being\r
- 340:.\Generated_Source\PSoC5/CyDmac.c **** *  executed.\r
- 341:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 342:.\Generated_Source\PSoC5/CyDmac.c **** *  If it is currently executing it will allow the current burst to finish\r
- 343:.\Generated_Source\PSoC5/CyDmac.c **** *  naturally.\r
- 344:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 345:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 346:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 347:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 348:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 349:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 350:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 351:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 352:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 353:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 354:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChDisable(uint8 chHandle) \r
- 355:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 336                           .loc 1 355 0\r
- 337                           .cfi_startproc\r
- 338                           @ args = 0, pretend = 0, frame = 0\r
- 339                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 340                           @ link register save eliminated.\r
- 341                   .LVL23:\r
- 356:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 357:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 358:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 342                           .loc 1 358 0\r
- 343 0000 1728                 cmp     r0, #23\r
- 344 0002 0BD8                 bhi     .L38\r
- 359:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 360:.\Generated_Source\PSoC5/CyDmac.c ****         /***********************************************************************\r
- 361:.\Generated_Source\PSoC5/CyDmac.c ****         * Should not change configuration information of a DMA channel when it\r
- 362:.\Generated_Source\PSoC5/CyDmac.c ****         * is active (or vulnerable to becoming active).\r
- 363:.\Generated_Source\PSoC5/CyDmac.c ****         ***********************************************************************/\r
- 364:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 365:.\Generated_Source\PSoC5/CyDmac.c ****         /* Disable channel */\r
- 366:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_EN));\r
- 345                           .loc 1 366 0\r
- 346 0004 064B                 ldr     r3, .L39\r
- 347 0006 0001                 lsls    r0, r0, #4\r
- 348                   .LVL24:\r
- 349 0008 C25C                 ldrb    r2, [r0, r3]    @ zero_extendqisi2\r
- 350 000a 02F0FE01             and     r1, r2, #254\r
- 351 000e C154                 strb    r1, [r0, r3]\r
- 367:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 368:.\Generated_Source\PSoC5/CyDmac.c ****         /* Store the intermediate and final TD states on top of the original TD chain */\r
- 369:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_WORK_SEP));\r
- 352                           .loc 1 369 0\r
- 353 0010 C25C                 ldrb    r2, [r0, r3]    @ zero_extendqisi2\r
- 354 0012 02F0DF01             and     r1, r2, #223\r
- 355 0016 C154                 strb    r1, [r0, r3]\r
- 356                   .LVL25:\r
- 370:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 357                           .loc 1 370 0\r
- 358 0018 0020                 movs    r0, #0\r
- 359 001a 7047                 bx      lr\r
- 360                   .LVL26:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 14\r
-\r
-\r
- 361                   .L38:\r
- 356:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 362                           .loc 1 356 0\r
- 363 001c 0120                 movs    r0, #1\r
- 364                   .LVL27:\r
- 371:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 372:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 373:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 374:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 365                           .loc 1 374 0\r
- 366 001e 7047                 bx      lr\r
- 367                   .L40:\r
- 368                           .align  2\r
- 369                   .L39:\r
- 370 0020 10700040             .word   1073770512\r
- 371                           .cfi_endproc\r
- 372                   .LFE7:\r
- 373                           .size   CyDmaChDisable, .-CyDmaChDisable\r
- 374                           .section        .text.CyDmaClearPendingDrq,"ax",%progbits\r
- 375                           .align  1\r
- 376                           .global CyDmaClearPendingDrq\r
- 377                           .thumb\r
- 378                           .thumb_func\r
- 379                           .type   CyDmaClearPendingDrq, %function\r
- 380                   CyDmaClearPendingDrq:\r
- 381                   .LFB8:\r
- 375:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 376:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 377:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 378:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaClearPendingDrq\r
- 379:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 380:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 381:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 382:.\Generated_Source\PSoC5/CyDmac.c **** *  Clears pending DMA data request.\r
- 383:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 384:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 385:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 386:.\Generated_Source\PSoC5/CyDmac.c **** *   Handle to the dma channel.\r
- 387:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 388:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 389:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 390:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 391:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 392:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 393:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaClearPendingDrq(uint8 chHandle) \r
- 394:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 382                           .loc 1 394 0\r
- 383                           .cfi_startproc\r
- 384                           @ args = 0, pretend = 0, frame = 0\r
- 385                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 386                           @ link register save eliminated.\r
- 387                   .LVL28:\r
- 395:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 396:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 397:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 388                           .loc 1 397 0\r
- 389 0000 1728                 cmp     r0, #23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 15\r
-\r
-\r
- 390 0002 0CD8                 bhi     .L43\r
- 398:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 399:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].action[0] |= CY_DMA_CPU_TERM_CHAIN;\r
- 391                           .loc 1 399 0\r
- 392 0004 074A                 ldr     r2, .L44\r
- 393 0006 0001                 lsls    r0, r0, #4\r
- 394                   .LVL29:\r
- 395 0008 8318                 adds    r3, r0, r2\r
- 396 000a 1979                 ldrb    r1, [r3, #4]    @ zero_extendqisi2\r
- 397 000c 41F00401             orr     r1, r1, #4\r
- 398 0010 1971                 strb    r1, [r3, #4]\r
- 400:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] |= 0x01u;\r
- 399                           .loc 1 400 0\r
- 400 0012 835C                 ldrb    r3, [r0, r2]    @ zero_extendqisi2\r
- 401 0014 43F00101             orr     r1, r3, #1\r
- 402 0018 8154                 strb    r1, [r0, r2]\r
- 403                   .LVL30:\r
- 401:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 404                           .loc 1 401 0\r
- 405 001a 0020                 movs    r0, #0\r
- 406 001c 7047                 bx      lr\r
- 407                   .LVL31:\r
- 408                   .L43:\r
- 395:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 409                           .loc 1 395 0\r
- 410 001e 0120                 movs    r0, #1\r
- 411                   .LVL32:\r
- 402:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 403:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 404:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 405:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 412                           .loc 1 405 0\r
- 413 0020 7047                 bx      lr\r
- 414                   .L45:\r
- 415 0022 00BF                 .align  2\r
- 416                   .L44:\r
- 417 0024 10700040             .word   1073770512\r
- 418                           .cfi_endproc\r
- 419                   .LFE8:\r
- 420                           .size   CyDmaClearPendingDrq, .-CyDmaClearPendingDrq\r
- 421                           .section        .text.CyDmaChPriority,"ax",%progbits\r
- 422                           .align  1\r
- 423                           .global CyDmaChPriority\r
- 424                           .thumb\r
- 425                           .thumb_func\r
- 426                           .type   CyDmaChPriority, %function\r
- 427                   CyDmaChPriority:\r
- 428                   .LFB9:\r
- 406:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 407:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 408:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 409:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChPriority\r
- 410:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 411:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 412:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 413:.\Generated_Source\PSoC5/CyDmac.c **** *  Sets the priority of a DMA channel. You can use this function when you want\r
- 414:.\Generated_Source\PSoC5/CyDmac.c **** *  to change the priority at run time. If the priority remains the same for a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 16\r
-\r
-\r
- 415:.\Generated_Source\PSoC5/CyDmac.c **** *  DMA channel, then you can configure the priority in the .cydwr file.\r
- 416:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 417:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 418:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 419:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 420:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 421:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 priority:\r
- 422:.\Generated_Source\PSoC5/CyDmac.c **** *   Priority to set the channel to, 0 - 7.\r
- 423:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 424:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 425:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 426:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 427:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 428:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 429:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChPriority(uint8 chHandle, uint8 priority) \r
- 430:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 429                           .loc 1 430 0\r
- 430                           .cfi_startproc\r
- 431                           @ args = 0, pretend = 0, frame = 0\r
- 432                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 433                           @ link register save eliminated.\r
- 434                   .LVL33:\r
- 431:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 value;\r
- 432:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 433:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 434:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 435                           .loc 1 434 0\r
- 436 0000 1728                 cmp     r0, #23\r
- 437 0002 0BD8                 bhi     .L48\r
- 435:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 436:.\Generated_Source\PSoC5/CyDmac.c ****         value = CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] & ((uint8)(~(0x0Eu)));\r
- 438                           .loc 1 436 0\r
- 439 0004 064B                 ldr     r3, .L49\r
- 440 0006 0001                 lsls    r0, r0, #4\r
- 441                   .LVL34:\r
- 442 0008 C25C                 ldrb    r2, [r0, r3]    @ zero_extendqisi2\r
- 443                   .LVL35:\r
- 437:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 438:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] = value | ((uint8) ((priority & 0x7u) << 0x01u\r
- 444                           .loc 1 438 0\r
- 445 000a 01F00701             and     r1, r1, #7\r
- 446                   .LVL36:\r
- 436:.\Generated_Source\PSoC5/CyDmac.c ****         value = CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] & ((uint8)(~(0x0Eu)));\r
- 447                           .loc 1 436 0\r
- 448 000e 02F0F102             and     r2, r2, #241\r
- 449                   .LVL37:\r
- 450                           .loc 1 438 0\r
- 451 0012 42EA4101             orr     r1, r2, r1, lsl #1\r
- 452 0016 C154                 strb    r1, [r0, r3]\r
- 453                   .LVL38:\r
- 439:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 440:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 454                           .loc 1 440 0\r
- 455 0018 0020                 movs    r0, #0\r
- 456 001a 7047                 bx      lr\r
- 457                   .LVL39:\r
- 458                   .L48:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 17\r
-\r
-\r
- 432:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 459                           .loc 1 432 0\r
- 460 001c 0120                 movs    r0, #1\r
- 461                   .LVL40:\r
- 441:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 442:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 443:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 444:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 462                           .loc 1 444 0\r
- 463 001e 7047                 bx      lr\r
- 464                   .L50:\r
- 465                           .align  2\r
- 466                   .L49:\r
- 467 0020 10700040             .word   1073770512\r
- 468                           .cfi_endproc\r
- 469                   .LFE9:\r
- 470                           .size   CyDmaChPriority, .-CyDmaChPriority\r
- 471                           .section        .text.CyDmaChSetExtendedAddress,"ax",%progbits\r
- 472                           .align  1\r
- 473                           .global CyDmaChSetExtendedAddress\r
- 474                           .thumb\r
- 475                           .thumb_func\r
- 476                           .type   CyDmaChSetExtendedAddress, %function\r
- 477                   CyDmaChSetExtendedAddress:\r
- 478                   .LFB10:\r
- 445:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 446:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 447:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 448:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChSetExtendedAddress\r
- 449:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 450:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 451:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 452:.\Generated_Source\PSoC5/CyDmac.c **** *  Sets the high 16 bits of the source and destination addresses for the DMA\r
- 453:.\Generated_Source\PSoC5/CyDmac.c **** *  channel (valid for all TDs in the chain).\r
- 454:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 455:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 456:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 457:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 458:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 459:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 source:\r
- 460:.\Generated_Source\PSoC5/CyDmac.c **** *   Upper 16 bit address of the DMA transfer source.\r
- 461:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 462:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 destination:\r
- 463:.\Generated_Source\PSoC5/CyDmac.c **** *   Upper 16 bit address of the DMA transfer destination.\r
- 464:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 465:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 466:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 467:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 468:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 469:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 470:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChSetExtendedAddress(uint8 chHandle, uint16 source, uint16 destination) \\r
- 471:.\Generated_Source\PSoC5/CyDmac.c ****     \r
- 472:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 479                           .loc 1 472 0\r
- 480                           .cfi_startproc\r
- 481                           @ args = 0, pretend = 0, frame = 0\r
- 482                           @ frame_needed = 0, uses_anonymous_args = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 18\r
-\r
-\r
- 483                           @ link register save eliminated.\r
- 484                   .LVL41:\r
- 473:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 474:.\Generated_Source\PSoC5/CyDmac.c ****     reg16 *convert;\r
- 475:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 476:.\Generated_Source\PSoC5/CyDmac.c ****     #if(CY_PSOC5)\r
- 477:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 478:.\Generated_Source\PSoC5/CyDmac.c ****         /* 0x1FFF8000-0x1FFFFFFF needs to use alias at 0x20008000-0x2000FFFF */\r
- 479:.\Generated_Source\PSoC5/CyDmac.c ****         if(source == 0x1FFFu)\r
- 485                           .loc 1 479 0\r
- 486 0000 41F6FF73             movw    r3, #8191\r
- 480:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 481:.\Generated_Source\PSoC5/CyDmac.c ****             source = 0x2000u;\r
- 487                           .loc 1 481 0\r
- 488 0004 9942                 cmp     r1, r3\r
- 489 0006 08BF                 it      eq\r
- 490 0008 4FF40051             moveq   r1, #8192\r
- 491                   .LVL42:\r
- 482:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 483:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 484:.\Generated_Source\PSoC5/CyDmac.c ****         if(destination == 0x1FFFu)\r
- 485:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 486:.\Generated_Source\PSoC5/CyDmac.c ****             destination = 0x2000u;\r
- 492                           .loc 1 486 0\r
- 493 000c 9A42                 cmp     r2, r3\r
- 494 000e 08BF                 it      eq\r
- 495 0010 4FF40052             moveq   r2, #8192\r
- 496                   .LVL43:\r
- 487:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 488:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 489:.\Generated_Source\PSoC5/CyDmac.c ****     #endif  /* (CY_PSOC5) */\r
- 490:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 491:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 492:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 497                           .loc 1 492 0\r
- 498 0014 1728                 cmp     r0, #23\r
- 499 0016 08D8                 bhi     .L57\r
- 493:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 494:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set source address */\r
- 495:.\Generated_Source\PSoC5/CyDmac.c ****         convert = (reg16 *) &CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG1[0];\r
- 500                           .loc 1 495 0\r
- 501 0018 C000                 lsls    r0, r0, #3\r
- 502                   .LVL44:\r
- 503 001a 00F18043             add     r3, r0, #1073741824\r
- 504 001e 03F5EC40             add     r0, r3, #30208\r
- 505                   .LVL45:\r
- 496:.\Generated_Source\PSoC5/CyDmac.c ****         CY_SET_REG16(convert, source);\r
- 506                           .loc 1 496 0\r
- 507 0022 8180                 strh    r1, [r0, #4]    @ movhi\r
- 508                   .LVL46:\r
- 497:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 498:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set destination address */\r
- 499:.\Generated_Source\PSoC5/CyDmac.c ****         convert = (reg16 *) &CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG1[2u];\r
- 500:.\Generated_Source\PSoC5/CyDmac.c ****         CY_SET_REG16(convert, destination);\r
- 509                           .loc 1 500 0\r
- 510 0024 C280                 strh    r2, [r0, #6]    @ movhi\r
- 511                   .LVL47:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 19\r
-\r
-\r
- 501:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 512                           .loc 1 501 0\r
- 513 0026 0020                 movs    r0, #0\r
- 514                   .LVL48:\r
- 515 0028 7047                 bx      lr\r
- 516                   .LVL49:\r
- 517                   .L57:\r
- 473:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 518                           .loc 1 473 0\r
- 519 002a 0120                 movs    r0, #1\r
- 520                   .LVL50:\r
- 502:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 503:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 504:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 505:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 521                           .loc 1 505 0\r
- 522 002c 7047                 bx      lr\r
- 523                           .cfi_endproc\r
- 524                   .LFE10:\r
- 525                           .size   CyDmaChSetExtendedAddress, .-CyDmaChSetExtendedAddress\r
- 526                           .section        .text.CyDmaChSetInitialTd,"ax",%progbits\r
- 527                           .align  1\r
- 528                           .global CyDmaChSetInitialTd\r
- 529                           .thumb\r
- 530                           .thumb_func\r
- 531                           .type   CyDmaChSetInitialTd, %function\r
- 532                   CyDmaChSetInitialTd:\r
- 533                   .LFB11:\r
- 506:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 507:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 508:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 509:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChSetInitialTd\r
- 510:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 511:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 512:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 513:.\Generated_Source\PSoC5/CyDmac.c **** *  Sets the initial TD to be executed for the channel when the CyDmaChEnable()\r
- 514:.\Generated_Source\PSoC5/CyDmac.c **** *  function is called.\r
- 515:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 516:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 517:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 518:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitialize().\r
- 519:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 520:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 startTd:\r
- 521:.\Generated_Source\PSoC5/CyDmac.c **** *   The index of TD to set as the first TD associated with the channel. Zero is\r
- 522:.\Generated_Source\PSoC5/CyDmac.c **** *   a valid TD index.\r
- 523:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 524:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 525:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 526:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 527:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 528:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 529:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChSetInitialTd(uint8 chHandle, uint8 startTd) \r
- 530:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 534                           .loc 1 530 0\r
- 535                           .cfi_startproc\r
- 536                           @ args = 0, pretend = 0, frame = 0\r
- 537                           @ frame_needed = 0, uses_anonymous_args = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 20\r
-\r
-\r
- 538                           @ link register save eliminated.\r
- 539                   .LVL51:\r
- 531:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 532:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 533:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 540                           .loc 1 533 0\r
- 541 0000 1728                 cmp     r0, #23\r
- 542 0002 05D8                 bhi     .L60\r
- 534:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 535:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[1u] = startTd;\r
- 543                           .loc 1 535 0\r
- 544 0004 034B                 ldr     r3, .L61\r
- 545 0006 0001                 lsls    r0, r0, #4\r
- 546                   .LVL52:\r
- 547 0008 C218                 adds    r2, r0, r3\r
- 548 000a 5172                 strb    r1, [r2, #9]\r
- 549                   .LVL53:\r
- 536:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 550                           .loc 1 536 0\r
- 551 000c 0020                 movs    r0, #0\r
- 552 000e 7047                 bx      lr\r
- 553                   .LVL54:\r
- 554                   .L60:\r
- 531:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 555                           .loc 1 531 0\r
- 556 0010 0120                 movs    r0, #1\r
- 557                   .LVL55:\r
- 537:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 538:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 539:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 540:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 558                           .loc 1 540 0\r
- 559 0012 7047                 bx      lr\r
- 560                   .L62:\r
- 561                           .align  2\r
- 562                   .L61:\r
- 563 0014 10700040             .word   1073770512\r
- 564                           .cfi_endproc\r
- 565                   .LFE11:\r
- 566                           .size   CyDmaChSetInitialTd, .-CyDmaChSetInitialTd\r
- 567                           .section        .text.CyDmaChSetRequest,"ax",%progbits\r
- 568                           .align  1\r
- 569                           .global CyDmaChSetRequest\r
- 570                           .thumb\r
- 571                           .thumb_func\r
- 572                           .type   CyDmaChSetRequest, %function\r
- 573                   CyDmaChSetRequest:\r
- 574                   .LFB12:\r
- 541:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 542:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 543:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 544:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChSetRequest\r
- 545:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 546:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 547:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 548:.\Generated_Source\PSoC5/CyDmac.c **** *  Allows the caller to terminate a chain of TDs, terminate one TD, or create a\r
- 549:.\Generated_Source\PSoC5/CyDmac.c **** *  direct request to start the DMA channel.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 21\r
-\r
-\r
- 550:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 551:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 552:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 553:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 554:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 555:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 request:\r
- 556:.\Generated_Source\PSoC5/CyDmac.c **** *   One of the following constants. Each of the constants is a three-bit value.\r
- 557:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 558:.\Generated_Source\PSoC5/CyDmac.c **** *   CPU_REQ         - Create a direct request to start the DMA channel\r
- 559:.\Generated_Source\PSoC5/CyDmac.c **** *   CPU_TERM_TD     - Terminate one TD\r
- 560:.\Generated_Source\PSoC5/CyDmac.c **** *   CPU_TERM_CHAIN  - Terminate a chain of TDs\r
- 561:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 562:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 563:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 564:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 565:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 566:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 567:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChSetRequest(uint8 chHandle, uint8 request) \r
- 568:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 575                           .loc 1 568 0\r
- 576                           .cfi_startproc\r
- 577                           @ args = 0, pretend = 0, frame = 0\r
- 578                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 579                           @ link register save eliminated.\r
- 580                   .LVL56:\r
- 569:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 570:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 571:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 581                           .loc 1 571 0\r
- 582 0000 1728                 cmp     r0, #23\r
- 583 0002 0AD8                 bhi     .L65\r
- 572:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 573:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CH_STRUCT_PTR[chHandle].action[0u] |= (request & (CPU_REQ | CPU_TERM_TD | CPU_TERM_C\r
- 584                           .loc 1 573 0\r
- 585 0004 064B                 ldr     r3, .L66\r
- 586 0006 0001                 lsls    r0, r0, #4\r
- 587                   .LVL57:\r
- 588 0008 C018                 adds    r0, r0, r3\r
- 589 000a 0279                 ldrb    r2, [r0, #4]    @ zero_extendqisi2\r
- 590 000c 01F00701             and     r1, r1, #7\r
- 591                   .LVL58:\r
- 592 0010 42EA0103             orr     r3, r2, r1\r
- 593 0014 0371                 strb    r3, [r0, #4]\r
- 594                   .LVL59:\r
- 574:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 595                           .loc 1 574 0\r
- 596 0016 0020                 movs    r0, #0\r
- 597 0018 7047                 bx      lr\r
- 598                   .LVL60:\r
- 599                   .L65:\r
- 569:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 600                           .loc 1 569 0\r
- 601 001a 0120                 movs    r0, #1\r
- 602                   .LVL61:\r
- 575:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 576:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 577:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 22\r
-\r
-\r
- 578:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 603                           .loc 1 578 0\r
- 604 001c 7047                 bx      lr\r
- 605                   .L67:\r
- 606 001e 00BF                 .align  2\r
- 607                   .L66:\r
- 608 0020 10700040             .word   1073770512\r
- 609                           .cfi_endproc\r
- 610                   .LFE12:\r
- 611                           .size   CyDmaChSetRequest, .-CyDmaChSetRequest\r
- 612                           .section        .text.CyDmaChGetRequest,"ax",%progbits\r
- 613                           .align  1\r
- 614                           .global CyDmaChGetRequest\r
- 615                           .thumb\r
- 616                           .thumb_func\r
- 617                           .type   CyDmaChGetRequest, %function\r
- 618                   CyDmaChGetRequest:\r
- 619                   .LFB13:\r
- 579:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 580:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 581:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 582:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChGetRequest\r
- 583:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 584:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 585:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 586:.\Generated_Source\PSoC5/CyDmac.c **** *  This function allows the caller of CyDmaChSetRequest() to determine if the\r
- 587:.\Generated_Source\PSoC5/CyDmac.c **** *  request was completed.\r
- 588:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 589:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 590:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 591:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 592:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 593:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 594:.\Generated_Source\PSoC5/CyDmac.c **** *  Returns a three-bit field, corresponding to the three bits of the request,\r
- 595:.\Generated_Source\PSoC5/CyDmac.c **** *  which describes the state of the previously posted request. If the value is\r
- 596:.\Generated_Source\PSoC5/CyDmac.c **** *  zero, the request was completed. CY_DMA_INVALID_CHANNEL if the handle is\r
- 597:.\Generated_Source\PSoC5/CyDmac.c **** *  invalid.\r
- 598:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 599:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 600:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChGetRequest(uint8 chHandle) \r
- 601:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 620                           .loc 1 601 0\r
- 621                           .cfi_startproc\r
- 622                           @ args = 0, pretend = 0, frame = 0\r
- 623                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 624                           @ link register save eliminated.\r
- 625                   .LVL62:\r
- 602:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CY_DMA_INVALID_CHANNEL;\r
- 603:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 604:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 626                           .loc 1 604 0\r
- 627 0000 1728                 cmp     r0, #23\r
- 628 0002 06D8                 bhi     .L70\r
- 605:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 606:.\Generated_Source\PSoC5/CyDmac.c ****         status = (cystatus) ((uint32)CY_DMA_CH_STRUCT_PTR[chHandle].action[0u] &\r
- 629                           .loc 1 606 0\r
- 630 0004 044B                 ldr     r3, .L71\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 23\r
-\r
-\r
- 631 0006 0001                 lsls    r0, r0, #4\r
- 632                   .LVL63:\r
- 633 0008 C118                 adds    r1, r0, r3\r
- 634 000a 0A79                 ldrb    r2, [r1, #4]    @ zero_extendqisi2\r
- 635 000c 02F00700             and     r0, r2, #7\r
- 636                   .LVL64:\r
- 637 0010 7047                 bx      lr\r
- 638                   .LVL65:\r
- 639                   .L70:\r
- 602:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CY_DMA_INVALID_CHANNEL;\r
- 640                           .loc 1 602 0\r
- 641 0012 FF20                 movs    r0, #255\r
- 642                   .LVL66:\r
- 607:.\Generated_Source\PSoC5/CyDmac.c ****                             (uint32)(CY_DMA_CPU_REQ | CY_DMA_CPU_TERM_TD | CY_DMA_CPU_TERM_CHAIN));\r
- 608:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 609:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 610:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 611:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 643                           .loc 1 611 0\r
- 644 0014 7047                 bx      lr\r
- 645                   .L72:\r
- 646 0016 00BF                 .align  2\r
- 647                   .L71:\r
- 648 0018 10700040             .word   1073770512\r
- 649                           .cfi_endproc\r
- 650                   .LFE13:\r
- 651                           .size   CyDmaChGetRequest, .-CyDmaChGetRequest\r
- 652                           .section        .text.CyDmaChStatus,"ax",%progbits\r
- 653                           .align  1\r
- 654                           .global CyDmaChStatus\r
- 655                           .thumb\r
- 656                           .thumb_func\r
- 657                           .type   CyDmaChStatus, %function\r
- 658                   CyDmaChStatus:\r
- 659                   .LFB14:\r
- 612:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 613:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 614:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 615:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChStatus\r
- 616:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 617:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 618:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 619:.\Generated_Source\PSoC5/CyDmac.c **** *  Determines the status of the DMA channel.\r
- 620:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 621:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 622:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 623:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
- 624:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 625:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 * currentTd:\r
- 626:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the index of the current TD. Can be NULL if the value\r
- 627:.\Generated_Source\PSoC5/CyDmac.c **** *   is not needed.\r
- 628:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 629:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 * state:\r
- 630:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the state of the channel. Can be NULL if the value is\r
- 631:.\Generated_Source\PSoC5/CyDmac.c **** *   not needed.\r
- 632:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 633:.\Generated_Source\PSoC5/CyDmac.c **** *   STATUS_TD_ACTIVE\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 24\r
-\r
-\r
- 634:.\Generated_Source\PSoC5/CyDmac.c **** *    0: Channel is not currently being serviced by DMAC\r
- 635:.\Generated_Source\PSoC5/CyDmac.c **** *    1: Channel is currently being serviced by DMAC\r
- 636:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 637:.\Generated_Source\PSoC5/CyDmac.c **** *   STATUS_CHAIN_ACTIVE\r
- 638:.\Generated_Source\PSoC5/CyDmac.c **** *    0: TD chain is inactive; either no DMA requests have triggered a new chain\r
- 639:.\Generated_Source\PSoC5/CyDmac.c **** *       or the previous chain has completed.\r
- 640:.\Generated_Source\PSoC5/CyDmac.c **** *    1: TD chain has been triggered by a DMA request\r
- 641:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 642:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 643:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 644:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 645:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 646:.\Generated_Source\PSoC5/CyDmac.c **** * Theory:\r
- 647:.\Generated_Source\PSoC5/CyDmac.c **** *   The caller can check on the activity of the Current TD and the Chain.\r
- 648:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 649:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 650:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChStatus(uint8 chHandle, uint8 * currentTd, uint8 * state) \r
- 651:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 660                           .loc 1 651 0\r
- 661                           .cfi_startproc\r
- 662                           @ args = 0, pretend = 0, frame = 0\r
- 663                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 664                   .LVL67:\r
- 652:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 653:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 654:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 665                           .loc 1 654 0\r
- 666 0000 1728                 cmp     r0, #23\r
- 651:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 667                           .loc 1 651 0\r
- 668 0002 10B5                 push    {r4, lr}\r
- 669                   .LCFI2:\r
- 670                           .cfi_def_cfa_offset 8\r
- 671                           .cfi_offset 4, -8\r
- 672                           .cfi_offset 14, -4\r
- 673                           .loc 1 654 0\r
- 674 0004 0FD8                 bhi     .L76\r
- 655:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 656:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != currentTd)\r
- 675                           .loc 1 656 0\r
- 676 0006 31B1                 cbz     r1, .L75\r
- 657:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 658:.\Generated_Source\PSoC5/CyDmac.c ****             *currentTd = CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[1] & 0x7Fu;\r
- 677                           .loc 1 658 0\r
- 678 0008 084B                 ldr     r3, .L82\r
- 679 000a 0401                 lsls    r4, r0, #4\r
- 680 000c E318                 adds    r3, r4, r3\r
- 681 000e 5B7A                 ldrb    r3, [r3, #9]    @ zero_extendqisi2\r
- 682 0010 03F07F03             and     r3, r3, #127\r
- 683 0014 0B70                 strb    r3, [r1, #0]\r
- 684                   .L75:\r
- 659:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 660:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 661:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != state)\r
- 685                           .loc 1 661 0\r
- 686 0016 22B1                 cbz     r2, .L81\r
- 662:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 25\r
-\r
-\r
- 663:.\Generated_Source\PSoC5/CyDmac.c ****             *state= CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[0];\r
- 687                           .loc 1 663 0\r
- 688 0018 0449                 ldr     r1, .L82\r
- 689                   .LVL68:\r
- 690 001a 0001                 lsls    r0, r0, #4\r
- 691                   .LVL69:\r
- 692 001c 4318                 adds    r3, r0, r1\r
- 693 001e 187A                 ldrb    r0, [r3, #8]    @ zero_extendqisi2\r
- 694 0020 1070                 strb    r0, [r2, #0]\r
- 695                   .L81:\r
- 664:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 665:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 666:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 696                           .loc 1 666 0\r
- 697 0022 0020                 movs    r0, #0\r
- 698 0024 10BD                 pop     {r4, pc}\r
- 699                   .LVL70:\r
- 700                   .L76:\r
- 652:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 701                           .loc 1 652 0\r
- 702 0026 0120                 movs    r0, #1\r
- 703                   .LVL71:\r
- 704 0028 10BD                 pop     {r4, pc}\r
- 705                   .L83:\r
- 706 002a 00BF                 .align  2\r
- 707                   .L82:\r
- 708 002c 10700040             .word   1073770512\r
- 709                           .cfi_endproc\r
- 710                   .LFE14:\r
- 711                           .size   CyDmaChStatus, .-CyDmaChStatus\r
- 712                           .section        .text.CyDmaChSetConfiguration,"ax",%progbits\r
- 713                           .align  1\r
- 714                           .global CyDmaChSetConfiguration\r
- 715                           .thumb\r
- 716                           .thumb_func\r
- 717                           .type   CyDmaChSetConfiguration, %function\r
- 718                   CyDmaChSetConfiguration:\r
- 719                   .LFB15:\r
- 667:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 668:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 669:.\Generated_Source\PSoC5/CyDmac.c ****     return (status);\r
- 670:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 671:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 672:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 673:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 674:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChSetConfiguration\r
- 675:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 676:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 677:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 678:.\Generated_Source\PSoC5/CyDmac.c **** * Sets configuration information of the channel.\r
- 679:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 680:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 681:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
- 682:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitialize().\r
- 683:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 684:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 burstCount:\r
- 685:.\Generated_Source\PSoC5/CyDmac.c **** *   Specifies the size of bursts (1 to 127) the data transfer should be divided\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 26\r
-\r
-\r
- 686:.\Generated_Source\PSoC5/CyDmac.c **** *   into. If this value is zero then the whole transfer is done in one burst.\r
- 687:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 688:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 requestPerBurst:\r
- 689:.\Generated_Source\PSoC5/CyDmac.c **** *   The whole of the data can be split into multiple bursts, if this is\r
- 690:.\Generated_Source\PSoC5/CyDmac.c **** *   required to complete the transaction:\r
- 691:.\Generated_Source\PSoC5/CyDmac.c **** *    0: All subsequent bursts after the first burst will be automatically\r
- 692:.\Generated_Source\PSoC5/CyDmac.c **** *       requested and carried out\r
- 693:.\Generated_Source\PSoC5/CyDmac.c **** *    1: All subsequent bursts after the first burst must also be individually\r
- 694:.\Generated_Source\PSoC5/CyDmac.c **** *       requested.\r
- 695:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 696:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdDone0:\r
- 697:.\Generated_Source\PSoC5/CyDmac.c **** *   Selects one of the TERMOUT0 interrupt lines to signal completion. The line\r
- 698:.\Generated_Source\PSoC5/CyDmac.c **** *   connected to the nrq terminal will determine the TERMOUT0_SEL definition and\r
- 699:.\Generated_Source\PSoC5/CyDmac.c **** *   should be used as supplied by cyfitter.h\r
- 700:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 701:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdDone1:\r
- 702:.\Generated_Source\PSoC5/CyDmac.c **** *   Selects one of the TERMOUT1 interrupt lines to signal completion. The line\r
- 703:.\Generated_Source\PSoC5/CyDmac.c **** *   connected to the nrq terminal will determine the TERMOUT1_SEL definition and\r
- 704:.\Generated_Source\PSoC5/CyDmac.c **** *   should be used as supplied by cyfitter.h\r
- 705:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 706:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdStop:\r
- 707:.\Generated_Source\PSoC5/CyDmac.c **** *   Selects one of the TERMIN interrupt lines to signal to the DMAC that the TD\r
- 708:.\Generated_Source\PSoC5/CyDmac.c **** *   should terminate. The signal connected to the trq terminal will determine\r
- 709:.\Generated_Source\PSoC5/CyDmac.c **** *   which TERMIN (termination request) is used.\r
- 710:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 711:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 712:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 713:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
- 714:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 715:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 716:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChSetConfiguration(uint8 chHandle, uint8 burstCount, uint8 requestPerBurst,\r
- 717:.\Generated_Source\PSoC5/CyDmac.c ****                                  uint8 tdDone0, uint8 tdDone1, uint8 tdStop) \r
- 718:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 720                           .loc 1 718 0\r
- 721                           .cfi_startproc\r
- 722                           @ args = 8, pretend = 0, frame = 0\r
- 723                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 724                   .LVL72:\r
- 719:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 720:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 721:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 725                           .loc 1 721 0\r
- 726 0000 1728                 cmp     r0, #23\r
- 718:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 727                           .loc 1 718 0\r
- 728 0002 10B5                 push    {r4, lr}\r
- 729                   .LCFI3:\r
- 730                           .cfi_def_cfa_offset 8\r
- 731                           .cfi_offset 4, -8\r
- 732                           .cfi_offset 14, -4\r
- 733                           .loc 1 721 0\r
- 734 0004 1AD8                 bhi     .L86\r
- 722:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 723:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[0] = (burstCount & 0x7Fu) | ((uint8)((requestPerBur\r
- 735                           .loc 1 723 0\r
- 736 0006 01F07F01             and     r1, r1, #127\r
- 737                   .LVL73:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 27\r
-\r
-\r
- 738 000a C400                 lsls    r4, r0, #3\r
- 739 000c 41EAC212             orr     r2, r1, r2, lsl #7\r
- 740                   .LVL74:\r
- 724:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[1] = ((uint8)((tdDone1 & 0xFu) << 4u)) | (tdDone0 &\r
- 741                           .loc 1 724 0\r
- 742 0010 9DF80810             ldrb    r1, [sp, #8]    @ zero_extendqisi2\r
- 723:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[0] = (burstCount & 0x7Fu) | ((uint8)((requestPerBur\r
- 743                           .loc 1 723 0\r
- 744 0014 04F18040             add     r0, r4, #1073741824\r
- 745                   .LVL75:\r
- 746                           .loc 1 724 0\r
- 747 0018 03F00F03             and     r3, r3, #15\r
- 748                   .LVL76:\r
- 723:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[0] = (burstCount & 0x7Fu) | ((uint8)((requestPerBur\r
- 749                           .loc 1 723 0\r
- 750 001c 00F5EC44             add     r4, r0, #30208\r
- 751 0020 D0B2                 uxtb    r0, r2\r
- 752                           .loc 1 724 0\r
- 753 0022 43EA0112             orr     r2, r3, r1, lsl #4\r
- 725:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[2] = 0x0Fu & tdStop;\r
- 754                           .loc 1 725 0\r
- 755 0026 9DF80C30             ldrb    r3, [sp, #12]   @ zero_extendqisi2\r
- 723:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[0] = (burstCount & 0x7Fu) | ((uint8)((requestPerBur\r
- 756                           .loc 1 723 0\r
- 757 002a 2070                 strb    r0, [r4, #0]\r
- 724:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[1] = ((uint8)((tdDone1 & 0xFu) << 4u)) | (tdDone0 &\r
- 758                           .loc 1 724 0\r
- 759 002c D0B2                 uxtb    r0, r2\r
- 760 002e 6070                 strb    r0, [r4, #1]\r
- 761                           .loc 1 725 0\r
- 762 0030 03F00F01             and     r1, r3, #15\r
- 726:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[3] = 0u; /* burstcount_remain. */\r
- 763                           .loc 1 726 0\r
- 764 0034 0020                 movs    r0, #0\r
- 725:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[2] = 0x0Fu & tdStop;\r
- 765                           .loc 1 725 0\r
- 766 0036 A170                 strb    r1, [r4, #2]\r
- 767                           .loc 1 726 0\r
- 768 0038 E070                 strb    r0, [r4, #3]\r
- 769                   .LVL77:\r
- 770 003a 10BD                 pop     {r4, pc}\r
- 771                   .LVL78:\r
- 772                   .L86:\r
- 719:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 773                           .loc 1 719 0\r
- 774 003c 0120                 movs    r0, #1\r
- 775                   .LVL79:\r
- 727:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 728:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 729:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 730:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 731:.\Generated_Source\PSoC5/CyDmac.c ****     return (status);\r
- 732:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 776                           .loc 1 732 0\r
- 777 003e 10BD                 pop     {r4, pc}\r
- 778                           .cfi_endproc\r
- 779                   .LFE15:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 28\r
-\r
-\r
- 780                           .size   CyDmaChSetConfiguration, .-CyDmaChSetConfiguration\r
- 781                           .section        .text.CyDmaTdAllocate,"ax",%progbits\r
- 782                           .align  1\r
- 783                           .global CyDmaTdAllocate\r
- 784                           .thumb\r
- 785                           .thumb_func\r
- 786                           .type   CyDmaTdAllocate, %function\r
- 787                   CyDmaTdAllocate:\r
- 788                   .LFB16:\r
- 733:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 734:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 735:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 736:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdAllocate\r
- 737:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 738:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 739:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 740:.\Generated_Source\PSoC5/CyDmac.c **** *  Allocates a TD for use with an allocated DMA channel.\r
- 741:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 742:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 743:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 744:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 745:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 746:.\Generated_Source\PSoC5/CyDmac.c **** *  Zero-based index of the TD to be used by the caller. Since there are 128 TDs\r
- 747:.\Generated_Source\PSoC5/CyDmac.c **** *  minus the reserved TDs (0 to 23), the value returned would range from 24 to\r
- 748:.\Generated_Source\PSoC5/CyDmac.c **** *  127 not 24 to 128. DMA_INVALID_TD is returned if there are no free TDs\r
- 749:.\Generated_Source\PSoC5/CyDmac.c **** *  available.\r
- 750:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 751:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 752:.\Generated_Source\PSoC5/CyDmac.c **** uint8 CyDmaTdAllocate(void) \r
- 753:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 789                           .loc 1 753 0\r
- 790                           .cfi_startproc\r
- 791                           @ args = 0, pretend = 0, frame = 0\r
- 792                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 793                   .LVL80:\r
- 794 0000 10B5                 push    {r4, lr}\r
- 795                   .LCFI4:\r
- 796                           .cfi_def_cfa_offset 8\r
- 797                           .cfi_offset 4, -8\r
- 798                           .cfi_offset 14, -4\r
- 754:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 interruptState;\r
- 755:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 element = CY_DMA_INVALID_TD;\r
- 756:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 757:.\Generated_Source\PSoC5/CyDmac.c ****     /* Enter critical section! */\r
- 758:.\Generated_Source\PSoC5/CyDmac.c ****     interruptState = CyEnterCriticalSection();\r
- 799                           .loc 1 758 0\r
- 800 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
- 801                   .LVL81:\r
- 759:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 760:.\Generated_Source\PSoC5/CyDmac.c ****     if(CyDmaTdCurrentNumber > NUMBEROF_CHANNELS)\r
- 802                           .loc 1 760 0\r
- 803 0006 0A4B                 ldr     r3, .L90\r
- 804 0008 5A78                 ldrb    r2, [r3, #1]    @ zero_extendqisi2\r
- 805 000a 182A                 cmp     r2, #24\r
- 806 000c 0AD9                 bls     .L89\r
- 761:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 762:.\Generated_Source\PSoC5/CyDmac.c ****         /* Get pointer to the Next available. */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 29\r
-\r
-\r
- 763:.\Generated_Source\PSoC5/CyDmac.c ****         element = CyDmaTdFreeIndex;\r
- 807                           .loc 1 763 0\r
- 808 000e 1C78                 ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 809                   .LVL82:\r
- 764:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 765:.\Generated_Source\PSoC5/CyDmac.c ****         /* Decrement the count. */\r
- 766:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaTdCurrentNumber--;\r
- 810                           .loc 1 766 0\r
- 811 0010 511E                 subs    r1, r2, #1\r
- 767:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 768:.\Generated_Source\PSoC5/CyDmac.c ****         /* Update the next available pointer. */\r
- 769:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaTdFreeIndex = CY_DMA_TDMEM_STRUCT_PTR[element].TD0[0];\r
- 812                           .loc 1 769 0\r
- 813 0012 E200                 lsls    r2, r4, #3\r
- 766:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaTdCurrentNumber--;\r
- 814                           .loc 1 766 0\r
- 815 0014 5970                 strb    r1, [r3, #1]\r
- 816                           .loc 1 769 0\r
- 817 0016 02F18041             add     r1, r2, #1073741824\r
- 818 001a 01F5F042             add     r2, r1, #30720\r
- 819 001e 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 820 0020 1970                 strb    r1, [r3, #0]\r
- 821 0022 00E0                 b       .L88\r
- 822                   .LVL83:\r
- 823                   .L89:\r
- 755:.\Generated_Source\PSoC5/CyDmac.c ****     uint8 element = CY_DMA_INVALID_TD;\r
- 824                           .loc 1 755 0\r
- 825 0024 FF24                 movs    r4, #255\r
- 826                   .LVL84:\r
- 827                   .L88:\r
- 770:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 771:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 772:.\Generated_Source\PSoC5/CyDmac.c ****     /* Exit critical section! */\r
- 773:.\Generated_Source\PSoC5/CyDmac.c ****     CyExitCriticalSection(interruptState);\r
- 828                           .loc 1 773 0\r
- 829 0026 FFF7FEFF             bl      CyExitCriticalSection\r
- 830                   .LVL85:\r
- 774:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 775:.\Generated_Source\PSoC5/CyDmac.c ****     return(element);\r
- 776:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 831                           .loc 1 776 0\r
- 832 002a 2046                 mov     r0, r4\r
- 833 002c 10BD                 pop     {r4, pc}\r
- 834                   .L91:\r
- 835 002e 00BF                 .align  2\r
- 836                   .L90:\r
- 837 0030 00000000             .word   .LANCHOR0\r
- 838                           .cfi_endproc\r
- 839                   .LFE16:\r
- 840                           .size   CyDmaTdAllocate, .-CyDmaTdAllocate\r
- 841                           .section        .text.CyDmaTdFree,"ax",%progbits\r
- 842                           .align  1\r
- 843                           .global CyDmaTdFree\r
- 844                           .thumb\r
- 845                           .thumb_func\r
- 846                           .type   CyDmaTdFree, %function\r
- 847                   CyDmaTdFree:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 30\r
-\r
-\r
- 848                   .LFB17:\r
- 777:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 778:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 779:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 780:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdFree\r
- 781:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 782:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 783:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 784:.\Generated_Source\PSoC5/CyDmac.c **** *  Returns a TD to the free list.\r
- 785:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 786:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 787:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdHandle:\r
- 788:.\Generated_Source\PSoC5/CyDmac.c **** *   The TD handle returned by the CyDmaTdAllocate().\r
- 789:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 790:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 791:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 792:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 793:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 794:.\Generated_Source\PSoC5/CyDmac.c **** void CyDmaTdFree(uint8 tdHandle) \r
- 795:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 849                           .loc 1 795 0\r
- 850                           .cfi_startproc\r
- 851                           @ args = 0, pretend = 0, frame = 0\r
- 852                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 853                   .LVL86:\r
- 796:.\Generated_Source\PSoC5/CyDmac.c ****     if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
- 854                           .loc 1 796 0\r
- 855 0000 0306                 lsls    r3, r0, #24\r
- 795:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 856                           .loc 1 795 0\r
- 857 0002 10B5                 push    {r4, lr}\r
- 858                   .LCFI5:\r
- 859                           .cfi_def_cfa_offset 8\r
- 860                           .cfi_offset 4, -8\r
- 861                           .cfi_offset 14, -4\r
- 795:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 862                           .loc 1 795 0\r
- 863 0004 0446                 mov     r4, r0\r
- 864                           .loc 1 796 0\r
- 865 0006 11D4                 bmi     .L92\r
- 866                   .LBB2:\r
- 797:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 798:.\Generated_Source\PSoC5/CyDmac.c ****         /* Enter critical section! */\r
- 799:.\Generated_Source\PSoC5/CyDmac.c ****         uint8 interruptState = CyEnterCriticalSection();\r
- 867                           .loc 1 799 0\r
- 868 0008 FFF7FEFF             bl      CyEnterCriticalSection\r
- 869                   .LVL87:\r
- 800:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 801:.\Generated_Source\PSoC5/CyDmac.c ****         /* Get pointer to the Next available. */\r
- 802:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u] = CyDmaTdFreeIndex;\r
- 870                           .loc 1 802 0\r
- 871 000c 084B                 ldr     r3, .L94\r
- 872 000e E200                 lsls    r2, r4, #3\r
- 873 0010 02F18041             add     r1, r2, #1073741824\r
- 874 0014 01F5F042             add     r2, r1, #30720\r
- 875 0018 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 803:.\Generated_Source\PSoC5/CyDmac.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 31\r
-\r
-\r
- 804:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set new Next Available. */\r
- 805:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaTdFreeIndex = tdHandle;\r
- 876                           .loc 1 805 0\r
- 877 001a 1C70                 strb    r4, [r3, #0]\r
- 802:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u] = CyDmaTdFreeIndex;\r
- 878                           .loc 1 802 0\r
- 879 001c 1170                 strb    r1, [r2, #0]\r
- 806:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 807:.\Generated_Source\PSoC5/CyDmac.c ****         /* Keep track of how many left. */\r
- 808:.\Generated_Source\PSoC5/CyDmac.c ****         CyDmaTdCurrentNumber++;\r
- 880                           .loc 1 808 0\r
- 881 001e 5A78                 ldrb    r2, [r3, #1]    @ zero_extendqisi2\r
- 882 0020 511C                 adds    r1, r2, #1\r
- 883 0022 5970                 strb    r1, [r3, #1]\r
- 884                   .LBE2:\r
- 809:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 810:.\Generated_Source\PSoC5/CyDmac.c ****         /* Exit critical section! */\r
- 811:.\Generated_Source\PSoC5/CyDmac.c ****         CyExitCriticalSection(interruptState);\r
- 812:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 813:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 885                           .loc 1 813 0\r
- 886 0024 BDE81040             pop     {r4, lr}\r
- 887                   .LBB3:\r
- 811:.\Generated_Source\PSoC5/CyDmac.c ****         CyExitCriticalSection(interruptState);\r
- 888                           .loc 1 811 0\r
- 889 0028 FFF7FEBF             b       CyExitCriticalSection\r
- 890                   .LVL88:\r
- 891                   .L92:\r
- 892 002c 10BD                 pop     {r4, pc}\r
- 893                   .L95:\r
- 894 002e 00BF                 .align  2\r
- 895                   .L94:\r
- 896 0030 00000000             .word   .LANCHOR0\r
- 897                   .LBE3:\r
- 898                           .cfi_endproc\r
- 899                   .LFE17:\r
- 900                           .size   CyDmaTdFree, .-CyDmaTdFree\r
- 901                           .section        .text.CyDmaTdFreeCount,"ax",%progbits\r
- 902                           .align  1\r
- 903                           .global CyDmaTdFreeCount\r
- 904                           .thumb\r
- 905                           .thumb_func\r
- 906                           .type   CyDmaTdFreeCount, %function\r
- 907                   CyDmaTdFreeCount:\r
- 908                   .LFB18:\r
- 814:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 815:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 816:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 817:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdFreeCount\r
- 818:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 819:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 820:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 821:.\Generated_Source\PSoC5/CyDmac.c **** *  Returns the number of free TDs available to be allocated.\r
- 822:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 823:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 824:.\Generated_Source\PSoC5/CyDmac.c **** *  None\r
- 825:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 32\r
-\r
-\r
- 826:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 827:.\Generated_Source\PSoC5/CyDmac.c **** *  The number of free TDs.\r
- 828:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 829:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 830:.\Generated_Source\PSoC5/CyDmac.c **** uint8 CyDmaTdFreeCount(void) \r
- 831:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 909                           .loc 1 831 0\r
- 910                           .cfi_startproc\r
- 911                           @ args = 0, pretend = 0, frame = 0\r
- 912                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 913                           @ link register save eliminated.\r
- 832:.\Generated_Source\PSoC5/CyDmac.c ****     return(CyDmaTdCurrentNumber - CY_DMA_NUMBEROF_CHANNELS);\r
- 914                           .loc 1 832 0\r
- 915 0000 024B                 ldr     r3, .L97\r
- 916 0002 5878                 ldrb    r0, [r3, #1]    @ zero_extendqisi2\r
- 917 0004 1838                 subs    r0, r0, #24\r
- 833:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 918                           .loc 1 833 0\r
- 919 0006 C0B2                 uxtb    r0, r0\r
- 920 0008 7047                 bx      lr\r
- 921                   .L98:\r
- 922 000a 00BF                 .align  2\r
- 923                   .L97:\r
- 924 000c 00000000             .word   .LANCHOR0\r
- 925                           .cfi_endproc\r
- 926                   .LFE18:\r
- 927                           .size   CyDmaTdFreeCount, .-CyDmaTdFreeCount\r
- 928                           .section        .text.CyDmaTdSetConfiguration,"ax",%progbits\r
- 929                           .align  1\r
- 930                           .global CyDmaTdSetConfiguration\r
- 931                           .thumb\r
- 932                           .thumb_func\r
- 933                           .type   CyDmaTdSetConfiguration, %function\r
- 934                   CyDmaTdSetConfiguration:\r
- 935                   .LFB19:\r
- 834:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 835:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 836:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 837:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdSetConfiguration\r
- 838:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 839:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 840:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 841:.\Generated_Source\PSoC5/CyDmac.c **** *  Configures the TD.\r
- 842:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 843:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 844:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdHandle:\r
- 845:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaTdAlloc().\r
- 846:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 847:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 transferCount:\r
- 848:.\Generated_Source\PSoC5/CyDmac.c **** *   The size of the data transfer (in bytes) for this TD. A size of zero will\r
- 849:.\Generated_Source\PSoC5/CyDmac.c **** *   cause the transfer to continue indefinitely. This parameter is limited to\r
- 850:.\Generated_Source\PSoC5/CyDmac.c **** *   4095 bytes; the TD is not initialized at all when a higher value is passed.\r
- 851:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 852:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 nextTd:\r
- 853:.\Generated_Source\PSoC5/CyDmac.c **** *   Zero based index of the next Transfer Descriptor in the TD chain. Zero is a\r
- 854:.\Generated_Source\PSoC5/CyDmac.c **** *   valid pointer to the next TD; DMA_END_CHAIN_TD is the end of the chain.\r
- 855:.\Generated_Source\PSoC5/CyDmac.c **** *   DMA_DISABLE_TD indicates an end to the chain and the DMA is disabled. No\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 33\r
-\r
-\r
- 856:.\Generated_Source\PSoC5/CyDmac.c **** *   further TDs are fetched. DMA_DISABLE_TD is only supported on PSoC3 and\r
- 857:.\Generated_Source\PSoC5/CyDmac.c **** *   PSoC 5LP silicons.\r
- 858:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 859:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 configuration:\r
- 860:.\Generated_Source\PSoC5/CyDmac.c **** *   Stores the Bit field of configuration bits.\r
- 861:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 862:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_SWAP_EN        - Perform endian swap\r
- 863:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 864:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_SWAP_SIZE4     - Swap size = 4 bytes\r
- 865:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 866:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_AUTO_EXEC_NEXT - The next TD in the chain will trigger\r
- 867:.\Generated_Source\PSoC5/CyDmac.c **** *                              automatically when the current TD completes.\r
- 868:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 869:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_TERMIN_EN      - Terminate this TD if a positive edge on the trq\r
- 870:.\Generated_Source\PSoC5/CyDmac.c **** *                              input line occurs. The positive edge must occur\r
- 871:.\Generated_Source\PSoC5/CyDmac.c **** *                              during a burst. That is the only time the DMAC\r
- 872:.\Generated_Source\PSoC5/CyDmac.c **** *                              will listen for it.\r
- 873:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 874:.\Generated_Source\PSoC5/CyDmac.c **** *   DMA__TD_TERMOUT_EN       - When this TD completes, the TERMOUT signal will\r
- 875:.\Generated_Source\PSoC5/CyDmac.c **** *                              generate a pulse. Note that this option is\r
- 876:.\Generated_Source\PSoC5/CyDmac.c **** *                              instance specific with the instance name followed\r
- 877:.\Generated_Source\PSoC5/CyDmac.c **** *                              by two underscores. In this example, the instance\r
- 878:.\Generated_Source\PSoC5/CyDmac.c **** *                              name is DMA.\r
- 879:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 880:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_INC_DST_ADR    - Increment DST_ADR according to the size of each\r
- 881:.\Generated_Source\PSoC5/CyDmac.c **** *                              data transaction in the burst.\r
- 882:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 883:.\Generated_Source\PSoC5/CyDmac.c **** *   CY_DMA_TD_INC_SRC_ADR    - Increment SRC_ADR according to the size of each\r
- 884:.\Generated_Source\PSoC5/CyDmac.c **** *                              data transaction in the burst.\r
- 885:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 886:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 887:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 888:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if tdHandle or transferCount is invalid.\r
- 889:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 890:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 891:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaTdSetConfiguration(uint8 tdHandle, uint16 transferCount, uint8 nextTd, uint8 configur\r
- 892:.\Generated_Source\PSoC5/CyDmac.c ****     \r
- 893:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 936                           .loc 1 893 0\r
- 937                           .cfi_startproc\r
- 938                           @ args = 0, pretend = 0, frame = 0\r
- 939                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 940                   .LVL89:\r
- 894:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 895:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 896:.\Generated_Source\PSoC5/CyDmac.c ****     if((tdHandle < CY_DMA_NUMBEROF_TDS) && (0u == (0xF000u & transferCount)))\r
- 941                           .loc 1 896 0\r
- 942 0000 10F0800F             tst     r0, #128\r
- 893:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 943                           .loc 1 893 0\r
- 944 0004 30B5                 push    {r4, r5, lr}\r
- 945                   .LCFI6:\r
- 946                           .cfi_def_cfa_offset 12\r
- 947                           .cfi_offset 4, -12\r
- 948                           .cfi_offset 5, -8\r
- 949                           .cfi_offset 14, -4\r
- 950                           .loc 1 896 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 34\r
-\r
-\r
- 951 0006 0CD1                 bne     .L102\r
- 952                           .loc 1 896 0 is_stmt 0 discriminator 1\r
- 953 0008 11F47045             ands    r5, r1, #61440\r
- 954 000c 09D1                 bne     .L102\r
- 955                   .LBB4:\r
- 897:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 898:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set 12 bits transfer count. */\r
- 899:.\Generated_Source\PSoC5/CyDmac.c ****         reg16 *convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u];\r
- 956                           .loc 1 899 0 is_stmt 1\r
- 957 000e C400                 lsls    r4, r0, #3\r
- 958 0010 04F18040             add     r0, r4, #1073741824\r
- 959                   .LVL90:\r
- 960 0014 00F5F044             add     r4, r0, #30720\r
- 961                   .LVL91:\r
- 900:.\Generated_Source\PSoC5/CyDmac.c ****         CY_SET_REG16(convert, transferCount);\r
- 962                           .loc 1 900 0\r
- 963 0018 2180                 strh    r1, [r4, #0]    @ movhi\r
- 901:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 902:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set Next TD pointer. */\r
- 903:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u] = nextTd;\r
- 904:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 905:.\Generated_Source\PSoC5/CyDmac.c ****         /* Configure the TD */\r
- 906:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u] = configuration;\r
- 907:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 908:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 964                           .loc 1 908 0\r
- 965 001a 2846                 mov     r0, r5\r
- 903:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u] = nextTd;\r
- 966                           .loc 1 903 0\r
- 967 001c A270                 strb    r2, [r4, #2]\r
- 906:.\Generated_Source\PSoC5/CyDmac.c ****         CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u] = configuration;\r
- 968                           .loc 1 906 0\r
- 969 001e E370                 strb    r3, [r4, #3]\r
- 970                   .LVL92:\r
- 971 0020 30BD                 pop     {r4, r5, pc}\r
- 972                   .LVL93:\r
- 973                   .L102:\r
- 974                   .LBE4:\r
- 894:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 975                           .loc 1 894 0\r
- 976 0022 0120                 movs    r0, #1\r
- 977                   .LVL94:\r
- 909:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 910:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 911:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 912:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 978                           .loc 1 912 0\r
- 979 0024 30BD                 pop     {r4, r5, pc}\r
- 980                           .cfi_endproc\r
- 981                   .LFE19:\r
- 982                           .size   CyDmaTdSetConfiguration, .-CyDmaTdSetConfiguration\r
- 983                           .section        .text.CyDmaTdGetConfiguration,"ax",%progbits\r
- 984                           .align  1\r
- 985                           .global CyDmaTdGetConfiguration\r
- 986                           .thumb\r
- 987                           .thumb_func\r
- 988                           .type   CyDmaTdGetConfiguration, %function\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 35\r
-\r
-\r
- 989                   CyDmaTdGetConfiguration:\r
- 990                   .LFB20:\r
- 913:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 914:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 915:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 916:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdGetConfiguration\r
- 917:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 918:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 919:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 920:.\Generated_Source\PSoC5/CyDmac.c **** *  Retrieves the configuration of the TD. If a NULL pointer is passed as a\r
- 921:.\Generated_Source\PSoC5/CyDmac.c **** *  parameter, that parameter is skipped. You may request only the values you are\r
- 922:.\Generated_Source\PSoC5/CyDmac.c **** *  interested in.\r
- 923:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 924:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 925:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdHandle:\r
- 926:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaTdAlloc().\r
- 927:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 928:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 * transferCount:\r
- 929:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the size of the data transfer (in bytes) for this TD.\r
- 930:.\Generated_Source\PSoC5/CyDmac.c **** *   A size of zero could indicate that the TD has completed its transfer, or\r
- 931:.\Generated_Source\PSoC5/CyDmac.c **** *   that the TD is doing an indefinite transfer.\r
- 932:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 933:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 * nextTd:\r
- 934:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the index of the next TD in the TD chain.\r
- 935:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 936:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 * configuration:\r
- 937:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the Bit field of configuration bits.\r
- 938:.\Generated_Source\PSoC5/CyDmac.c **** *   See CyDmaTdSetConfiguration() function description.\r
- 939:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 940:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
- 941:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
- 942:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if tdHandle is invalid.\r
- 943:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 944:.\Generated_Source\PSoC5/CyDmac.c **** * Side Effects:\r
- 945:.\Generated_Source\PSoC5/CyDmac.c **** *  If a TD has a transfer count of N and is executed, the transfer count becomes\r
- 946:.\Generated_Source\PSoC5/CyDmac.c **** *  0. If it is reexecuted, the Transfer count of zero will be interpreted as a\r
- 947:.\Generated_Source\PSoC5/CyDmac.c **** *  request for indefinite transfer. Be careful when requesting a TD with a\r
- 948:.\Generated_Source\PSoC5/CyDmac.c **** *  transfer count of zero.\r
- 949:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 950:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
- 951:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaTdGetConfiguration(uint8 tdHandle, uint16 * transferCount, uint8 * nextTd, uint8 * co\r
- 952:.\Generated_Source\PSoC5/CyDmac.c ****     \r
- 953:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 991                           .loc 1 953 0\r
- 992                           .cfi_startproc\r
- 993                           @ args = 0, pretend = 0, frame = 0\r
- 994                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 995                   .LVL95:\r
- 954:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 955:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 956:.\Generated_Source\PSoC5/CyDmac.c ****     if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
- 996                           .loc 1 956 0\r
- 997 0000 10F0800F             tst     r0, #128\r
- 953:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 998                           .loc 1 953 0\r
- 999 0004 10B5                 push    {r4, lr}\r
- 1000                  .LCFI7:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 36\r
-\r
-\r
- 1001                          .cfi_def_cfa_offset 8\r
- 1002                          .cfi_offset 4, -8\r
- 1003                          .cfi_offset 14, -4\r
- 1004                          .loc 1 956 0\r
- 1005 0006 1BD1                bne     .L107\r
- 957:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
- 958:.\Generated_Source\PSoC5/CyDmac.c ****         /* If we have a pointer */\r
- 959:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != transferCount)\r
- 1006                          .loc 1 959 0\r
- 1007 0008 41B1                cbz     r1, .L105\r
- 1008                  .LBB5:\r
- 960:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 961:.\Generated_Source\PSoC5/CyDmac.c ****             /* Get the 12 bits of the transfer count */\r
- 962:.\Generated_Source\PSoC5/CyDmac.c ****             reg16 *convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0];\r
- 1009                          .loc 1 962 0\r
- 1010 000a C400                lsls    r4, r0, #3\r
- 1011 000c 04F18044            add     r4, r4, #1073741824\r
- 1012 0010 04F5F044            add     r4, r4, #30720\r
- 1013                  .LVL96:\r
- 963:.\Generated_Source\PSoC5/CyDmac.c ****             *transferCount = 0x0FFFu & CY_GET_REG16(convert);\r
- 1014                          .loc 1 963 0\r
- 1015 0014 2488                ldrh    r4, [r4, #0]\r
- 1016                  .LVL97:\r
- 1017 0016 24F47044            bic     r4, r4, #61440\r
- 1018 001a 0C80                strh    r4, [r1, #0]    @ movhi\r
- 1019                  .LVL98:\r
- 1020                  .L105:\r
- 1021                  .LBE5:\r
- 964:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 965:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 966:.\Generated_Source\PSoC5/CyDmac.c ****         /* If we have a pointer */\r
- 967:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != nextTd)\r
- 1022                          .loc 1 967 0\r
- 1023 001c 32B1                cbz     r2, .L106\r
- 968:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 969:.\Generated_Source\PSoC5/CyDmac.c ****             /* Get the Next TD pointer */\r
- 970:.\Generated_Source\PSoC5/CyDmac.c ****             *nextTd = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u];\r
- 1024                          .loc 1 970 0\r
- 1025 001e C100                lsls    r1, r0, #3\r
- 1026                  .LVL99:\r
- 1027 0020 01F18041            add     r1, r1, #1073741824\r
- 1028 0024 01F5F041            add     r1, r1, #30720\r
- 1029 0028 8978                ldrb    r1, [r1, #2]    @ zero_extendqisi2\r
- 1030 002a 1170                strb    r1, [r2, #0]\r
- 1031                  .L106:\r
- 971:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 972:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 973:.\Generated_Source\PSoC5/CyDmac.c ****         /* If we have a pointer */\r
- 974:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != configuration)\r
- 1032                          .loc 1 974 0\r
- 1033 002c 33B1                cbz     r3, .L115\r
- 975:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
- 976:.\Generated_Source\PSoC5/CyDmac.c ****             /* Get the configuration the TD */\r
- 977:.\Generated_Source\PSoC5/CyDmac.c ****             *configuration = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u];\r
- 1034                          .loc 1 977 0\r
- 1035 002e C000                lsls    r0, r0, #3\r
- 1036                  .LVL100:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 37\r
-\r
-\r
- 1037 0030 00F18042            add     r2, r0, #1073741824\r
- 1038                  .LVL101:\r
- 1039 0034 02F5F041            add     r1, r2, #30720\r
- 1040 0038 C878                ldrb    r0, [r1, #3]    @ zero_extendqisi2\r
- 1041 003a 1870                strb    r0, [r3, #0]\r
- 1042                  .L115:\r
- 978:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
- 979:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 980:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 1043                          .loc 1 980 0\r
- 1044 003c 0020                movs    r0, #0\r
- 1045 003e 10BD                pop     {r4, pc}\r
- 1046                  .LVL102:\r
- 1047                  .L107:\r
- 954:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 1048                          .loc 1 954 0\r
- 1049 0040 0120                movs    r0, #1\r
- 1050                  .LVL103:\r
- 1051 0042 10BD                pop     {r4, pc}\r
- 1052                          .cfi_endproc\r
- 1053                  .LFE20:\r
- 1054                          .size   CyDmaTdGetConfiguration, .-CyDmaTdGetConfiguration\r
- 1055                          .section        .text.CyDmaTdSetAddress,"ax",%progbits\r
- 1056                          .align  1\r
- 1057                          .global CyDmaTdSetAddress\r
- 1058                          .thumb\r
- 1059                          .thumb_func\r
- 1060                          .type   CyDmaTdSetAddress, %function\r
- 1061                  CyDmaTdSetAddress:\r
- 1062                  .LFB21:\r
- 981:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
- 982:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 983:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
- 984:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 985:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 986:.\Generated_Source\PSoC5/CyDmac.c **** \r
- 987:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
- 988:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdSetAddress\r
- 989:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
- 990:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 991:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
- 992:.\Generated_Source\PSoC5/CyDmac.c **** *  Sets the lower 16 bits of the source and destination addresses for this TD\r
- 993:.\Generated_Source\PSoC5/CyDmac.c **** *  only.\r
- 994:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 995:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
- 996:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdHandle:\r
- 997:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaTdAlloc().\r
- 998:.\Generated_Source\PSoC5/CyDmac.c **** *\r
- 999:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 source:\r
-1000:.\Generated_Source\PSoC5/CyDmac.c **** *   The lower 16 address bits of the source of the data transfer.\r
-1001:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1002:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 destination:\r
-1003:.\Generated_Source\PSoC5/CyDmac.c **** *   The lower 16 address bits of the destination of the data transfer.\r
-1004:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1005:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
-1006:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
-1007:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if tdHandle is invalid.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 38\r
-\r
-\r
-1008:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1009:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-1010:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaTdSetAddress(uint8 tdHandle, uint16 source, uint16 destination) \r
-1011:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 1063                          .loc 1 1011 0\r
- 1064                          .cfi_startproc\r
- 1065                          @ args = 0, pretend = 0, frame = 0\r
- 1066                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1067                          @ link register save eliminated.\r
- 1068                  .LVL104:\r
-1012:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
-1013:.\Generated_Source\PSoC5/CyDmac.c ****     reg16 *convert;\r
-1014:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1015:.\Generated_Source\PSoC5/CyDmac.c ****     if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
- 1069                          .loc 1 1015 0\r
- 1070 0000 0306                lsls    r3, r0, #24\r
- 1071 0002 08D4                bmi     .L118\r
-1016:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
-1017:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set source address */\r
-1018:.\Generated_Source\PSoC5/CyDmac.c ****         convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[0u];\r
- 1072                          .loc 1 1018 0\r
- 1073 0004 C000                lsls    r0, r0, #3\r
- 1074                  .LVL105:\r
- 1075 0006 00F18043            add     r3, r0, #1073741824\r
- 1076 000a 03F5F040            add     r0, r3, #30720\r
- 1077                  .LVL106:\r
-1019:.\Generated_Source\PSoC5/CyDmac.c ****         CY_SET_REG16(convert, source);\r
- 1078                          .loc 1 1019 0\r
- 1079 000e 8180                strh    r1, [r0, #4]    @ movhi\r
- 1080                  .LVL107:\r
-1020:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1021:.\Generated_Source\PSoC5/CyDmac.c ****         /* Set destination address */\r
-1022:.\Generated_Source\PSoC5/CyDmac.c ****         convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[2u];\r
-1023:.\Generated_Source\PSoC5/CyDmac.c ****         CY_SET_REG16(convert, destination);\r
- 1081                          .loc 1 1023 0\r
- 1082 0010 C280                strh    r2, [r0, #6]    @ movhi\r
- 1083                  .LVL108:\r
-1024:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1025:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 1084                          .loc 1 1025 0\r
- 1085 0012 0020                movs    r0, #0\r
- 1086                  .LVL109:\r
- 1087 0014 7047                bx      lr\r
- 1088                  .LVL110:\r
- 1089                  .L118:\r
-1012:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 1090                          .loc 1 1012 0\r
- 1091 0016 0120                movs    r0, #1\r
- 1092                  .LVL111:\r
-1026:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
-1027:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1028:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
-1029:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 1093                          .loc 1 1029 0\r
- 1094 0018 7047                bx      lr\r
- 1095                          .cfi_endproc\r
- 1096                  .LFE21:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 39\r
-\r
-\r
- 1097                          .size   CyDmaTdSetAddress, .-CyDmaTdSetAddress\r
- 1098                          .section        .text.CyDmaTdGetAddress,"ax",%progbits\r
- 1099                          .align  1\r
- 1100                          .global CyDmaTdGetAddress\r
- 1101                          .thumb\r
- 1102                          .thumb_func\r
- 1103                          .type   CyDmaTdGetAddress, %function\r
- 1104                  CyDmaTdGetAddress:\r
- 1105                  .LFB22:\r
-1030:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1031:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1032:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-1033:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaTdGetAddress\r
-1034:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
-1035:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1036:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
-1037:.\Generated_Source\PSoC5/CyDmac.c **** *  Retrieves the lower 16 bits of the source and/or destination addresses for\r
-1038:.\Generated_Source\PSoC5/CyDmac.c **** *  this TD only. If NULL is passed for a pointer parameter, that value is\r
-1039:.\Generated_Source\PSoC5/CyDmac.c **** *  skipped. You may request only the values of interest.\r
-1040:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1041:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
-1042:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 tdHandle:\r
-1043:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaTdAlloc().\r
-1044:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1045:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 * source:\r
-1046:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the lower 16 address bits of the source of the data\r
-1047:.\Generated_Source\PSoC5/CyDmac.c **** *   transfer.\r
-1048:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1049:.\Generated_Source\PSoC5/CyDmac.c **** *  uint16 * destination:\r
-1050:.\Generated_Source\PSoC5/CyDmac.c **** *   The address to store the lower 16 address bits of the destination of the\r
-1051:.\Generated_Source\PSoC5/CyDmac.c **** *   data transfer.\r
-1052:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1053:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
-1054:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
-1055:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if tdHandle is invalid.\r
-1056:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1057:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-1058:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaTdGetAddress(uint8 tdHandle, uint16 * source, uint16 * destination) \r
-1059:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 1106                          .loc 1 1059 0\r
- 1107                          .cfi_startproc\r
- 1108                          @ args = 0, pretend = 0, frame = 0\r
- 1109                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1110                          @ link register save eliminated.\r
- 1111                  .LVL112:\r
-1060:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
-1061:.\Generated_Source\PSoC5/CyDmac.c ****     reg16 *convert;\r
-1062:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1063:.\Generated_Source\PSoC5/CyDmac.c ****     if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
- 1112                          .loc 1 1063 0\r
- 1113 0000 0306                lsls    r3, r0, #24\r
- 1114 0002 11D4                bmi     .L122\r
-1064:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
-1065:.\Generated_Source\PSoC5/CyDmac.c ****         /* If we have a pointer. */\r
-1066:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != source)\r
- 1115                          .loc 1 1066 0\r
- 1116 0004 31B1                cbz     r1, .L121\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 40\r
-\r
-\r
-1067:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
-1068:.\Generated_Source\PSoC5/CyDmac.c ****             /* Get source address */\r
-1069:.\Generated_Source\PSoC5/CyDmac.c ****             convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[0u];\r
- 1117                          .loc 1 1069 0\r
- 1118 0006 C300                lsls    r3, r0, #3\r
- 1119 0008 03F18043            add     r3, r3, #1073741824\r
- 1120 000c 03F5F043            add     r3, r3, #30720\r
- 1121                  .LVL113:\r
-1070:.\Generated_Source\PSoC5/CyDmac.c ****             *source = CY_GET_REG16(convert);\r
- 1122                          .loc 1 1070 0\r
- 1123 0010 9B88                ldrh    r3, [r3, #4]\r
- 1124                  .LVL114:\r
- 1125 0012 0B80                strh    r3, [r1, #0]    @ movhi\r
- 1126                  .LVL115:\r
- 1127                  .L121:\r
-1071:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
-1072:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1073:.\Generated_Source\PSoC5/CyDmac.c ****         /* If we have a pointer. */\r
-1074:.\Generated_Source\PSoC5/CyDmac.c ****         if(NULL != destination)\r
- 1128                          .loc 1 1074 0\r
- 1129 0014 32B1                cbz     r2, .L127\r
-1075:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
-1076:.\Generated_Source\PSoC5/CyDmac.c ****             /* Get Destination address. */\r
-1077:.\Generated_Source\PSoC5/CyDmac.c ****             convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[2u];\r
- 1130                          .loc 1 1077 0\r
- 1131 0016 C000                lsls    r0, r0, #3\r
- 1132                  .LVL116:\r
- 1133 0018 00F18041            add     r1, r0, #1073741824\r
- 1134                  .LVL117:\r
- 1135 001c 01F5F043            add     r3, r1, #30720\r
- 1136                  .LVL118:\r
-1078:.\Generated_Source\PSoC5/CyDmac.c ****             *destination = CY_GET_REG16(convert);\r
- 1137                          .loc 1 1078 0\r
- 1138 0020 D888                ldrh    r0, [r3, #6]\r
- 1139 0022 1080                strh    r0, [r2, #0]    @ movhi\r
- 1140                  .LVL119:\r
- 1141                  .L127:\r
-1079:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
-1080:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1081:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 1142                          .loc 1 1081 0\r
- 1143 0024 0020                movs    r0, #0\r
- 1144 0026 7047                bx      lr\r
- 1145                  .LVL120:\r
- 1146                  .L122:\r
-1060:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 1147                          .loc 1 1060 0\r
- 1148 0028 0120                movs    r0, #1\r
- 1149                  .LVL121:\r
- 1150 002a 7047                bx      lr\r
- 1151                          .cfi_endproc\r
- 1152                  .LFE22:\r
- 1153                          .size   CyDmaTdGetAddress, .-CyDmaTdGetAddress\r
- 1154                          .section        .text.CyDmaChRoundRobin,"ax",%progbits\r
- 1155                          .align  1\r
- 1156                          .global CyDmaChRoundRobin\r
- 1157                          .thumb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 41\r
-\r
-\r
- 1158                          .thumb_func\r
- 1159                          .type   CyDmaChRoundRobin, %function\r
- 1160                  CyDmaChRoundRobin:\r
- 1161                  .LFB23:\r
-1082:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
-1083:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1084:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
-1085:.\Generated_Source\PSoC5/CyDmac.c **** }\r
-1086:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1087:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1088:.\Generated_Source\PSoC5/CyDmac.c **** /*******************************************************************************\r
-1089:.\Generated_Source\PSoC5/CyDmac.c **** * Function Name: CyDmaChRoundRobin\r
-1090:.\Generated_Source\PSoC5/CyDmac.c **** ********************************************************************************\r
-1091:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1092:.\Generated_Source\PSoC5/CyDmac.c **** * Summary:\r
-1093:.\Generated_Source\PSoC5/CyDmac.c **** *  Either enables or disables the Round-Robin scheduling enforcement algorithm.\r
-1094:.\Generated_Source\PSoC5/CyDmac.c **** *  Within a priority level a Round-Robin fairness algorithm is enforced.\r
-1095:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1096:.\Generated_Source\PSoC5/CyDmac.c **** * Parameters:\r
-1097:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 chHandle:\r
-1098:.\Generated_Source\PSoC5/CyDmac.c **** *   A handle previously returned by CyDmaChAlloc() or Dma_DmaInitialize().\r
-1099:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1100:.\Generated_Source\PSoC5/CyDmac.c **** *  uint8 enableRR:\r
-1101:.\Generated_Source\PSoC5/CyDmac.c **** *   0: Disable Round-Robin fairness algorithm\r
-1102:.\Generated_Source\PSoC5/CyDmac.c **** *   1: Enable Round-Robin fairness algorithm\r
-1103:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1104:.\Generated_Source\PSoC5/CyDmac.c **** * Return:\r
-1105:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_SUCCESS if successful.\r
-1106:.\Generated_Source\PSoC5/CyDmac.c **** *  CYRET_BAD_PARAM if chHandle is invalid.\r
-1107:.\Generated_Source\PSoC5/CyDmac.c **** *\r
-1108:.\Generated_Source\PSoC5/CyDmac.c **** *******************************************************************************/\r
-1109:.\Generated_Source\PSoC5/CyDmac.c **** cystatus CyDmaChRoundRobin(uint8 chHandle, uint8 enableRR) \r
-1110:.\Generated_Source\PSoC5/CyDmac.c **** {\r
- 1162                          .loc 1 1110 0\r
- 1163                          .cfi_startproc\r
- 1164                          @ args = 0, pretend = 0, frame = 0\r
- 1165                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1166                          @ link register save eliminated.\r
- 1167                  .LVL122:\r
-1111:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
-1112:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1113:.\Generated_Source\PSoC5/CyDmac.c ****     if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
- 1168                          .loc 1 1113 0\r
- 1169 0000 1728                cmp     r0, #23\r
- 1170 0002 0DD8                bhi     .L131\r
- 1171 0004 0201                lsls    r2, r0, #4\r
- 1172 0006 074B                ldr     r3, .L133\r
-1114:.\Generated_Source\PSoC5/CyDmac.c ****     {\r
-1115:.\Generated_Source\PSoC5/CyDmac.c ****         if (0u != enableRR)\r
- 1173                          .loc 1 1115 0\r
- 1174 0008 29B1                cbz     r1, .L130\r
-1116:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
-1117:.\Generated_Source\PSoC5/CyDmac.c ****             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= (uint8)CY_DMA_ROUND_ROBIN_ENABLE;\r
- 1175                          .loc 1 1117 0\r
- 1176 000a D05C                ldrb    r0, [r2, r3]    @ zero_extendqisi2\r
- 1177                  .LVL123:\r
- 1178 000c 40F01001            orr     r1, r0, #16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 42\r
-\r
-\r
- 1179                  .LVL124:\r
- 1180 0010 D154                strb    r1, [r2, r3]\r
- 1181                  .L132:\r
-1118:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
-1119:.\Generated_Source\PSoC5/CyDmac.c ****         else\r
-1120:.\Generated_Source\PSoC5/CyDmac.c ****         {\r
-1121:.\Generated_Source\PSoC5/CyDmac.c ****             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_ROUND_ROBIN_ENABLE);\r
-1122:.\Generated_Source\PSoC5/CyDmac.c ****         }\r
-1123:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1124:.\Generated_Source\PSoC5/CyDmac.c ****         status = CYRET_SUCCESS;\r
- 1182                          .loc 1 1124 0\r
- 1183 0012 0020                movs    r0, #0\r
- 1184 0014 7047                bx      lr\r
- 1185                  .LVL125:\r
- 1186                  .L130:\r
-1121:.\Generated_Source\PSoC5/CyDmac.c ****             CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_ROUND_ROBIN_ENABLE);\r
- 1187                          .loc 1 1121 0\r
- 1188 0016 D05C                ldrb    r0, [r2, r3]    @ zero_extendqisi2\r
- 1189                  .LVL126:\r
- 1190 0018 00F0EF01            and     r1, r0, #239\r
- 1191                  .LVL127:\r
- 1192 001c D154                strb    r1, [r2, r3]\r
- 1193 001e F8E7                b       .L132\r
- 1194                  .LVL128:\r
- 1195                  .L131:\r
-1111:.\Generated_Source\PSoC5/CyDmac.c ****     cystatus status = CYRET_BAD_PARAM;\r
- 1196                          .loc 1 1111 0\r
- 1197 0020 0120                movs    r0, #1\r
- 1198                  .LVL129:\r
-1125:.\Generated_Source\PSoC5/CyDmac.c ****     }\r
-1126:.\Generated_Source\PSoC5/CyDmac.c **** \r
-1127:.\Generated_Source\PSoC5/CyDmac.c ****     return(status);\r
-1128:.\Generated_Source\PSoC5/CyDmac.c **** }\r
- 1199                          .loc 1 1128 0\r
- 1200 0022 7047                bx      lr\r
- 1201                  .L134:\r
- 1202                          .align  2\r
- 1203                  .L133:\r
- 1204 0024 10700040            .word   1073770512\r
- 1205                          .cfi_endproc\r
- 1206                  .LFE23:\r
- 1207                          .size   CyDmaChRoundRobin, .-CyDmaChRoundRobin\r
- 1208                          .data\r
- 1209                          .set    .LANCHOR0,. + 0\r
- 1210                          .type   CyDmaTdFreeIndex, %object\r
- 1211                          .size   CyDmaTdFreeIndex, 1\r
- 1212                  CyDmaTdFreeIndex:\r
- 1213 0000 7F                  .byte   127\r
- 1214                          .type   CyDmaTdCurrentNumber, %object\r
- 1215                          .size   CyDmaTdCurrentNumber, 1\r
- 1216                  CyDmaTdCurrentNumber:\r
- 1217 0001 80                  .byte   -128\r
- 1218                          .bss\r
- 1219                          .align  2\r
- 1220                          .set    .LANCHOR1,. + 0\r
- 1221                          .type   CyDmaChannels, %object\r
- 1222                          .size   CyDmaChannels, 4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 43\r
-\r
-\r
- 1223                  CyDmaChannels:\r
- 1224 0000 00000000            .space  4\r
- 1225                          .text\r
- 1226                  .Letext0:\r
- 1227                          .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 1228                          .file 3 ".\\Generated_Source\\PSoC5\\CyDmac.h"\r
- 1229                          .file 4 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 1230                          .section        .debug_info,"",%progbits\r
- 1231                  .Ldebug_info0:\r
- 1232 0000 B4090000            .4byte  0x9b4\r
- 1233 0004 0200                .2byte  0x2\r
- 1234 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1235 000a 04                  .byte   0x4\r
- 1236 000b 01                  .uleb128 0x1\r
- 1237 000c 0B030000            .4byte  .LASF85\r
- 1238 0010 01                  .byte   0x1\r
- 1239 0011 AE010000            .4byte  .LASF86\r
- 1240 0015 5E020000            .4byte  .LASF87\r
- 1241 0019 18000000            .4byte  .Ldebug_ranges0+0x18\r
- 1242 001d 00000000            .4byte  0\r
- 1243 0021 00000000            .4byte  0\r
- 1244 0025 00000000            .4byte  .Ldebug_line0\r
- 1245 0029 02                  .uleb128 0x2\r
- 1246 002a 01                  .byte   0x1\r
- 1247 002b 06                  .byte   0x6\r
- 1248 002c CD000000            .4byte  .LASF0\r
- 1249 0030 02                  .uleb128 0x2\r
- 1250 0031 01                  .byte   0x1\r
- 1251 0032 08                  .byte   0x8\r
- 1252 0033 94030000            .4byte  .LASF1\r
- 1253 0037 02                  .uleb128 0x2\r
- 1254 0038 02                  .byte   0x2\r
- 1255 0039 05                  .byte   0x5\r
- 1256 003a A2030000            .4byte  .LASF2\r
- 1257 003e 02                  .uleb128 0x2\r
- 1258 003f 02                  .byte   0x2\r
- 1259 0040 07                  .byte   0x7\r
- 1260 0041 09020000            .4byte  .LASF3\r
- 1261 0045 02                  .uleb128 0x2\r
- 1262 0046 04                  .byte   0x4\r
- 1263 0047 05                  .byte   0x5\r
- 1264 0048 09010000            .4byte  .LASF4\r
- 1265 004c 02                  .uleb128 0x2\r
- 1266 004d 04                  .byte   0x4\r
- 1267 004e 07                  .byte   0x7\r
- 1268 004f 89010000            .4byte  .LASF5\r
- 1269 0053 02                  .uleb128 0x2\r
- 1270 0054 08                  .byte   0x8\r
- 1271 0055 05                  .byte   0x5\r
- 1272 0056 BF000000            .4byte  .LASF6\r
- 1273 005a 02                  .uleb128 0x2\r
- 1274 005b 08                  .byte   0x8\r
- 1275 005c 07                  .byte   0x7\r
- 1276 005d 87000000            .4byte  .LASF7\r
- 1277 0061 03                  .uleb128 0x3\r
- 1278 0062 04                  .byte   0x4\r
- 1279 0063 05                  .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 44\r
-\r
-\r
- 1280 0064 696E7400            .ascii  "int\000"\r
- 1281 0068 02                  .uleb128 0x2\r
- 1282 0069 04                  .byte   0x4\r
- 1283 006a 07                  .byte   0x7\r
- 1284 006b 7C010000            .4byte  .LASF8\r
- 1285 006f 04                  .uleb128 0x4\r
- 1286 0070 28010000            .4byte  .LASF9\r
- 1287 0074 02                  .byte   0x2\r
- 1288 0075 5B                  .byte   0x5b\r
- 1289 0076 30000000            .4byte  0x30\r
- 1290 007a 04                  .uleb128 0x4\r
- 1291 007b 00000000            .4byte  .LASF10\r
- 1292 007f 02                  .byte   0x2\r
- 1293 0080 5C                  .byte   0x5c\r
- 1294 0081 3E000000            .4byte  0x3e\r
- 1295 0085 04                  .uleb128 0x4\r
- 1296 0086 43010000            .4byte  .LASF11\r
- 1297 008a 02                  .byte   0x2\r
- 1298 008b 5D                  .byte   0x5d\r
- 1299 008c 4C000000            .4byte  0x4c\r
- 1300 0090 02                  .uleb128 0x2\r
- 1301 0091 04                  .byte   0x4\r
- 1302 0092 04                  .byte   0x4\r
- 1303 0093 FF020000            .4byte  .LASF12\r
- 1304 0097 02                  .uleb128 0x2\r
- 1305 0098 08                  .byte   0x8\r
- 1306 0099 04                  .byte   0x4\r
- 1307 009a 2E010000            .4byte  .LASF13\r
- 1308 009e 02                  .uleb128 0x2\r
- 1309 009f 01                  .byte   0x1\r
- 1310 00a0 08                  .byte   0x8\r
- 1311 00a1 F8030000            .4byte  .LASF14\r
- 1312 00a5 04                  .uleb128 0x4\r
- 1313 00a6 B5040000            .4byte  .LASF15\r
- 1314 00aa 02                  .byte   0x2\r
- 1315 00ab E8                  .byte   0xe8\r
- 1316 00ac 4C000000            .4byte  0x4c\r
- 1317 00b0 04                  .uleb128 0x4\r
- 1318 00b1 22010000            .4byte  .LASF16\r
- 1319 00b5 02                  .byte   0x2\r
- 1320 00b6 F1                  .byte   0xf1\r
- 1321 00b7 BB000000            .4byte  0xbb\r
- 1322 00bb 05                  .uleb128 0x5\r
- 1323 00bc 7A000000            .4byte  0x7a\r
- 1324 00c0 04                  .uleb128 0x4\r
- 1325 00c1 8F020000            .4byte  .LASF17\r
- 1326 00c5 02                  .byte   0x2\r
- 1327 00c6 F2                  .byte   0xf2\r
- 1328 00c7 CB000000            .4byte  0xcb\r
- 1329 00cb 05                  .uleb128 0x5\r
- 1330 00cc 85000000            .4byte  0x85\r
- 1331 00d0 02                  .uleb128 0x2\r
- 1332 00d1 04                  .byte   0x4\r
- 1333 00d2 07                  .byte   0x7\r
- 1334 00d3 A9020000            .4byte  .LASF18\r
- 1335 00d7 06                  .uleb128 0x6\r
- 1336 00d8 85030000            .4byte  .LASF24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 45\r
-\r
-\r
- 1337 00dc 10                  .byte   0x10\r
- 1338 00dd 03                  .byte   0x3\r
- 1339 00de 48                  .byte   0x48\r
- 1340 00df 1C010000            .4byte  0x11c\r
- 1341 00e3 07                  .uleb128 0x7\r
- 1342 00e4 FF010000            .4byte  .LASF19\r
- 1343 00e8 03                  .byte   0x3\r
- 1344 00e9 4A                  .byte   0x4a\r
- 1345 00ea 2C010000            .4byte  0x12c\r
- 1346 00ee 02                  .byte   0x2\r
- 1347 00ef 23                  .byte   0x23\r
- 1348 00f0 00                  .uleb128 0\r
- 1349 00f1 07                  .uleb128 0x7\r
- 1350 00f2 4A010000            .4byte  .LASF20\r
- 1351 00f6 03                  .byte   0x3\r
- 1352 00f7 4B                  .byte   0x4b\r
- 1353 00f8 31010000            .4byte  0x131\r
- 1354 00fc 02                  .byte   0x2\r
- 1355 00fd 23                  .byte   0x23\r
- 1356 00fe 04                  .uleb128 0x4\r
- 1357 00ff 07                  .uleb128 0x7\r
- 1358 0100 9C020000            .4byte  .LASF21\r
- 1359 0104 03                  .byte   0x3\r
- 1360 0105 4C                  .byte   0x4c\r
- 1361 0106 36010000            .4byte  0x136\r
- 1362 010a 02                  .byte   0x2\r
- 1363 010b 23                  .byte   0x23\r
- 1364 010c 08                  .uleb128 0x8\r
- 1365 010d 07                  .uleb128 0x7\r
- 1366 010e 51010000            .4byte  .LASF22\r
- 1367 0112 03                  .byte   0x3\r
- 1368 0113 4D                  .byte   0x4d\r
- 1369 0114 3B010000            .4byte  0x13b\r
- 1370 0118 02                  .byte   0x2\r
- 1371 0119 23                  .byte   0x23\r
- 1372 011a 0C                  .uleb128 0xc\r
- 1373 011b 00                  .byte   0\r
- 1374 011c 08                  .uleb128 0x8\r
- 1375 011d 6F000000            .4byte  0x6f\r
- 1376 0121 2C010000            .4byte  0x12c\r
- 1377 0125 09                  .uleb128 0x9\r
- 1378 0126 D0000000            .4byte  0xd0\r
- 1379 012a 03                  .byte   0x3\r
- 1380 012b 00                  .byte   0\r
- 1381 012c 05                  .uleb128 0x5\r
- 1382 012d 1C010000            .4byte  0x11c\r
- 1383 0131 05                  .uleb128 0x5\r
- 1384 0132 1C010000            .4byte  0x11c\r
- 1385 0136 05                  .uleb128 0x5\r
- 1386 0137 1C010000            .4byte  0x11c\r
- 1387 013b 05                  .uleb128 0x5\r
- 1388 013c 1C010000            .4byte  0x11c\r
- 1389 0140 04                  .uleb128 0x4\r
- 1390 0141 18040000            .4byte  .LASF23\r
- 1391 0145 03                  .byte   0x3\r
- 1392 0146 4F                  .byte   0x4f\r
- 1393 0147 D7000000            .4byte  0xd7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 46\r
-\r
-\r
- 1394 014b 06                  .uleb128 0x6\r
- 1395 014c 9B010000            .4byte  .LASF25\r
- 1396 0150 08                  .byte   0x8\r
- 1397 0151 03                  .byte   0x3\r
- 1398 0152 52                  .byte   0x52\r
- 1399 0153 74010000            .4byte  0x174\r
- 1400 0157 07                  .uleb128 0x7\r
- 1401 0158 76040000            .4byte  .LASF26\r
- 1402 015c 03                  .byte   0x3\r
- 1403 015d 54                  .byte   0x54\r
- 1404 015e 74010000            .4byte  0x174\r
- 1405 0162 02                  .byte   0x2\r
- 1406 0163 23                  .byte   0x23\r
- 1407 0164 00                  .uleb128 0\r
- 1408 0165 07                  .uleb128 0x7\r
- 1409 0166 7B040000            .4byte  .LASF27\r
- 1410 016a 03                  .byte   0x3\r
- 1411 016b 55                  .byte   0x55\r
- 1412 016c 79010000            .4byte  0x179\r
- 1413 0170 02                  .byte   0x2\r
- 1414 0171 23                  .byte   0x23\r
- 1415 0172 04                  .uleb128 0x4\r
- 1416 0173 00                  .byte   0\r
- 1417 0174 05                  .uleb128 0x5\r
- 1418 0175 1C010000            .4byte  0x11c\r
- 1419 0179 05                  .uleb128 0x5\r
- 1420 017a 1C010000            .4byte  0x11c\r
- 1421 017e 04                  .uleb128 0x4\r
- 1422 017f 1D000000            .4byte  .LASF28\r
- 1423 0183 03                  .byte   0x3\r
- 1424 0184 57                  .byte   0x57\r
- 1425 0185 4B010000            .4byte  0x14b\r
- 1426 0189 06                  .uleb128 0x6\r
- 1427 018a F1000000            .4byte  .LASF29\r
- 1428 018e 08                  .byte   0x8\r
- 1429 018f 03                  .byte   0x3\r
- 1430 0190 5A                  .byte   0x5a\r
- 1431 0191 B2010000            .4byte  0x1b2\r
- 1432 0195 0A                  .uleb128 0xa\r
- 1433 0196 54443000            .ascii  "TD0\000"\r
- 1434 019a 03                  .byte   0x3\r
- 1435 019b 5C                  .byte   0x5c\r
- 1436 019c B2010000            .4byte  0x1b2\r
- 1437 01a0 02                  .byte   0x2\r
- 1438 01a1 23                  .byte   0x23\r
- 1439 01a2 00                  .uleb128 0\r
- 1440 01a3 0A                  .uleb128 0xa\r
- 1441 01a4 54443100            .ascii  "TD1\000"\r
- 1442 01a8 03                  .byte   0x3\r
- 1443 01a9 5D                  .byte   0x5d\r
- 1444 01aa B7010000            .4byte  0x1b7\r
- 1445 01ae 02                  .byte   0x2\r
- 1446 01af 23                  .byte   0x23\r
- 1447 01b0 04                  .uleb128 0x4\r
- 1448 01b1 00                  .byte   0\r
- 1449 01b2 05                  .uleb128 0x5\r
- 1450 01b3 1C010000            .4byte  0x11c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 47\r
-\r
-\r
- 1451 01b7 05                  .uleb128 0x5\r
- 1452 01b8 1C010000            .4byte  0x11c\r
- 1453 01bc 04                  .uleb128 0x4\r
- 1454 01bd 44040000            .4byte  .LASF30\r
- 1455 01c1 03                  .byte   0x3\r
- 1456 01c2 5F                  .byte   0x5f\r
- 1457 01c3 89010000            .4byte  0x189\r
- 1458 01c7 0B                  .uleb128 0xb\r
- 1459 01c8 01                  .byte   0x1\r
- 1460 01c9 77000000            .4byte  .LASF31\r
- 1461 01cd 01                  .byte   0x1\r
- 1462 01ce 3D                  .byte   0x3d\r
- 1463 01cf 01                  .byte   0x1\r
- 1464 01d0 00000000            .4byte  .LFB0\r
- 1465 01d4 30000000            .4byte  .LFE0\r
- 1466 01d8 02                  .byte   0x2\r
- 1467 01d9 7D                  .byte   0x7d\r
- 1468 01da 00                  .sleb128 0\r
- 1469 01db 01                  .byte   0x1\r
- 1470 01dc F0010000            .4byte  0x1f0\r
- 1471 01e0 0C                  .uleb128 0xc\r
- 1472 01e1 D6020000            .4byte  .LASF35\r
- 1473 01e5 01                  .byte   0x1\r
- 1474 01e6 3F                  .byte   0x3f\r
- 1475 01e7 6F000000            .4byte  0x6f\r
- 1476 01eb 00000000            .4byte  .LLST0\r
- 1477 01ef 00                  .byte   0\r
- 1478 01f0 0D                  .uleb128 0xd\r
- 1479 01f1 01                  .byte   0x1\r
- 1480 01f2 2A020000            .4byte  .LASF33\r
- 1481 01f6 01                  .byte   0x1\r
- 1482 01f7 6D                  .byte   0x6d\r
- 1483 01f8 01                  .byte   0x1\r
- 1484 01f9 6F000000            .4byte  0x6f\r
- 1485 01fd 00000000            .4byte  .LFB1\r
- 1486 0201 10000000            .4byte  .LFE1\r
- 1487 0205 02                  .byte   0x2\r
- 1488 0206 7D                  .byte   0x7d\r
- 1489 0207 00                  .sleb128 0\r
- 1490 0208 01                  .byte   0x1\r
- 1491 0209 0B                  .uleb128 0xb\r
- 1492 020a 01                  .byte   0x1\r
- 1493 020b 4D020000            .4byte  .LASF32\r
- 1494 020f 01                  .byte   0x1\r
- 1495 0210 91                  .byte   0x91\r
- 1496 0211 01                  .byte   0x1\r
- 1497 0212 00000000            .4byte  .LFB2\r
- 1498 0216 10000000            .4byte  .LFE2\r
- 1499 021a 02                  .byte   0x2\r
- 1500 021b 7D                  .byte   0x7d\r
- 1501 021c 00                  .sleb128 0\r
- 1502 021d 01                  .byte   0x1\r
- 1503 021e 32020000            .4byte  0x232\r
- 1504 0222 0E                  .uleb128 0xe\r
- 1505 0223 05030000            .4byte  .LASF40\r
- 1506 0227 01                  .byte   0x1\r
- 1507 0228 91                  .byte   0x91\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 48\r
-\r
-\r
- 1508 0229 6F000000            .4byte  0x6f\r
- 1509 022d 15000000            .4byte  .LLST1\r
- 1510 0231 00                  .byte   0\r
- 1511 0232 0D                  .uleb128 0xd\r
- 1512 0233 01                  .byte   0x1\r
- 1513 0234 29000000            .4byte  .LASF34\r
- 1514 0238 01                  .byte   0x1\r
- 1515 0239 A9                  .byte   0xa9\r
- 1516 023a 01                  .byte   0x1\r
- 1517 023b 85000000            .4byte  0x85\r
- 1518 023f 00000000            .4byte  .LFB3\r
- 1519 0243 0C000000            .4byte  .LFE3\r
- 1520 0247 02                  .byte   0x2\r
- 1521 0248 7D                  .byte   0x7d\r
- 1522 0249 00                  .sleb128 0\r
- 1523 024a 01                  .byte   0x1\r
- 1524 024b 0F                  .uleb128 0xf\r
- 1525 024c 01                  .byte   0x1\r
- 1526 024d E1030000            .4byte  .LASF38\r
- 1527 0251 01                  .byte   0x1\r
- 1528 0252 BF                  .byte   0xbf\r
- 1529 0253 01                  .byte   0x1\r
- 1530 0254 6F000000            .4byte  0x6f\r
- 1531 0258 00000000            .4byte  .LFB4\r
- 1532 025c 34000000            .4byte  .LFE4\r
- 1533 0260 36000000            .4byte  .LLST2\r
- 1534 0264 01                  .byte   0x1\r
- 1535 0265 A9020000            .4byte  0x2a9\r
- 1536 0269 0C                  .uleb128 0xc\r
- 1537 026a D9000000            .4byte  .LASF36\r
- 1538 026e 01                  .byte   0x1\r
- 1539 026f C1                  .byte   0xc1\r
- 1540 0270 6F000000            .4byte  0x6f\r
- 1541 0274 56000000            .4byte  .LLST3\r
- 1542 0278 0C                  .uleb128 0xc\r
- 1543 0279 D6020000            .4byte  .LASF35\r
- 1544 027d 01                  .byte   0x1\r
- 1545 027e C2                  .byte   0xc2\r
- 1546 027f 6F000000            .4byte  0x6f\r
- 1547 0283 69000000            .4byte  .LLST4\r
- 1548 0287 0C                  .uleb128 0xc\r
- 1549 0288 BC030000            .4byte  .LASF37\r
- 1550 028c 01                  .byte   0x1\r
- 1551 028d C3                  .byte   0xc3\r
- 1552 028e 85000000            .4byte  0x85\r
- 1553 0292 88000000            .4byte  .LLST5\r
- 1554 0296 10                  .uleb128 0x10\r
- 1555 0297 06000000            .4byte  .LVL5\r
- 1556 029b 99090000            .4byte  0x999\r
- 1557 029f 10                  .uleb128 0x10\r
- 1558 02a0 2C000000            .4byte  .LVL9\r
- 1559 02a4 A7090000            .4byte  0x9a7\r
- 1560 02a8 00                  .byte   0\r
- 1561 02a9 0F                  .uleb128 0xf\r
- 1562 02aa 01                  .byte   0x1\r
- 1563 02ab DE040000            .4byte  .LASF39\r
- 1564 02af 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 49\r
-\r
-\r
- 1565 02b0 F2                  .byte   0xf2\r
- 1566 02b1 01                  .byte   0x1\r
- 1567 02b2 A5000000            .4byte  0xa5\r
- 1568 02b6 00000000            .4byte  .LFB5\r
- 1569 02ba 30000000            .4byte  .LFE5\r
- 1570 02be A7000000            .4byte  .LLST6\r
- 1571 02c2 01                  .byte   0x1\r
- 1572 02c3 07030000            .4byte  0x307\r
- 1573 02c7 0E                  .uleb128 0xe\r
- 1574 02c8 B3030000            .4byte  .LASF41\r
- 1575 02cc 01                  .byte   0x1\r
- 1576 02cd F2                  .byte   0xf2\r
- 1577 02ce 6F000000            .4byte  0x6f\r
- 1578 02d2 C7000000            .4byte  .LLST7\r
- 1579 02d6 0C                  .uleb128 0xc\r
- 1580 02d7 80040000            .4byte  .LASF42\r
- 1581 02db 01                  .byte   0x1\r
- 1582 02dc F4                  .byte   0xf4\r
- 1583 02dd A5000000            .4byte  0xa5\r
- 1584 02e1 01010000            .4byte  .LLST8\r
- 1585 02e5 0C                  .uleb128 0xc\r
- 1586 02e6 D9000000            .4byte  .LASF36\r
- 1587 02ea 01                  .byte   0x1\r
- 1588 02eb F5                  .byte   0xf5\r
- 1589 02ec 6F000000            .4byte  0x6f\r
- 1590 02f0 38010000            .4byte  .LLST9\r
- 1591 02f4 10                  .uleb128 0x10\r
- 1592 02f5 14000000            .4byte  .LVL11\r
- 1593 02f9 99090000            .4byte  0x999\r
- 1594 02fd 10                  .uleb128 0x10\r
- 1595 02fe 22000000            .4byte  .LVL12\r
- 1596 0302 A7090000            .4byte  0x9a7\r
- 1597 0306 00                  .byte   0\r
- 1598 0307 11                  .uleb128 0x11\r
- 1599 0308 01                  .byte   0x1\r
- 1600 0309 58000000            .4byte  .LASF43\r
- 1601 030d 01                  .byte   0x1\r
- 1602 030e 3001                .2byte  0x130\r
- 1603 0310 01                  .byte   0x1\r
- 1604 0311 A5000000            .4byte  0xa5\r
- 1605 0315 00000000            .4byte  .LFB6\r
- 1606 0319 34000000            .4byte  .LFE6\r
- 1607 031d 02                  .byte   0x2\r
- 1608 031e 7D                  .byte   0x7d\r
- 1609 031f 00                  .sleb128 0\r
- 1610 0320 01                  .byte   0x1\r
- 1611 0321 56030000            .4byte  0x356\r
- 1612 0325 12                  .uleb128 0x12\r
- 1613 0326 B3030000            .4byte  .LASF41\r
- 1614 032a 01                  .byte   0x1\r
- 1615 032b 3001                .2byte  0x130\r
- 1616 032d 6F000000            .4byte  0x6f\r
- 1617 0331 4B010000            .4byte  .LLST10\r
- 1618 0335 12                  .uleb128 0x12\r
- 1619 0336 30040000            .4byte  .LASF44\r
- 1620 033a 01                  .byte   0x1\r
- 1621 033b 3001                .2byte  0x130\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 50\r
-\r
-\r
- 1622 033d 6F000000            .4byte  0x6f\r
- 1623 0341 85010000            .4byte  .LLST11\r
- 1624 0345 13                  .uleb128 0x13\r
- 1625 0346 80040000            .4byte  .LASF42\r
- 1626 034a 01                  .byte   0x1\r
- 1627 034b 3201                .2byte  0x132\r
- 1628 034d A5000000            .4byte  0xa5\r
- 1629 0351 CA010000            .4byte  .LLST12\r
- 1630 0355 00                  .byte   0\r
- 1631 0356 11                  .uleb128 0x11\r
- 1632 0357 01                  .byte   0x1\r
- 1633 0358 D2030000            .4byte  .LASF45\r
- 1634 035c 01                  .byte   0x1\r
- 1635 035d 6201                .2byte  0x162\r
- 1636 035f 01                  .byte   0x1\r
- 1637 0360 A5000000            .4byte  0xa5\r
- 1638 0364 00000000            .4byte  .LFB7\r
- 1639 0368 24000000            .4byte  .LFE7\r
- 1640 036c 02                  .byte   0x2\r
- 1641 036d 7D                  .byte   0x7d\r
- 1642 036e 00                  .sleb128 0\r
- 1643 036f 01                  .byte   0x1\r
- 1644 0370 95030000            .4byte  0x395\r
- 1645 0374 12                  .uleb128 0x12\r
- 1646 0375 B3030000            .4byte  .LASF41\r
- 1647 0379 01                  .byte   0x1\r
- 1648 037a 6201                .2byte  0x162\r
- 1649 037c 6F000000            .4byte  0x6f\r
- 1650 0380 01020000            .4byte  .LLST13\r
- 1651 0384 13                  .uleb128 0x13\r
- 1652 0385 80040000            .4byte  .LASF42\r
- 1653 0389 01                  .byte   0x1\r
- 1654 038a 6401                .2byte  0x164\r
- 1655 038c A5000000            .4byte  0xa5\r
- 1656 0390 3B020000            .4byte  .LLST14\r
- 1657 0394 00                  .byte   0\r
- 1658 0395 11                  .uleb128 0x11\r
- 1659 0396 01                  .byte   0x1\r
- 1660 0397 DF020000            .4byte  .LASF46\r
- 1661 039b 01                  .byte   0x1\r
- 1662 039c 8901                .2byte  0x189\r
- 1663 039e 01                  .byte   0x1\r
- 1664 039f A5000000            .4byte  0xa5\r
- 1665 03a3 00000000            .4byte  .LFB8\r
- 1666 03a7 28000000            .4byte  .LFE8\r
- 1667 03ab 02                  .byte   0x2\r
- 1668 03ac 7D                  .byte   0x7d\r
- 1669 03ad 00                  .sleb128 0\r
- 1670 03ae 01                  .byte   0x1\r
- 1671 03af D4030000            .4byte  0x3d4\r
- 1672 03b3 12                  .uleb128 0x12\r
- 1673 03b4 B3030000            .4byte  .LASF41\r
- 1674 03b8 01                  .byte   0x1\r
- 1675 03b9 8901                .2byte  0x189\r
- 1676 03bb 6F000000            .4byte  0x6f\r
- 1677 03bf 72020000            .4byte  .LLST15\r
- 1678 03c3 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 51\r
-\r
-\r
- 1679 03c4 80040000            .4byte  .LASF42\r
- 1680 03c8 01                  .byte   0x1\r
- 1681 03c9 8B01                .2byte  0x18b\r
- 1682 03cb A5000000            .4byte  0xa5\r
- 1683 03cf AC020000            .4byte  .LLST16\r
- 1684 03d3 00                  .byte   0\r
- 1685 03d4 11                  .uleb128 0x11\r
- 1686 03d5 01                  .byte   0x1\r
- 1687 03d6 6C010000            .4byte  .LASF47\r
- 1688 03da 01                  .byte   0x1\r
- 1689 03db AD01                .2byte  0x1ad\r
- 1690 03dd 01                  .byte   0x1\r
- 1691 03de A5000000            .4byte  0xa5\r
- 1692 03e2 00000000            .4byte  .LFB9\r
- 1693 03e6 24000000            .4byte  .LFE9\r
- 1694 03ea 02                  .byte   0x2\r
- 1695 03eb 7D                  .byte   0x7d\r
- 1696 03ec 00                  .sleb128 0\r
- 1697 03ed 01                  .byte   0x1\r
- 1698 03ee 33040000            .4byte  0x433\r
- 1699 03f2 12                  .uleb128 0x12\r
- 1700 03f3 B3030000            .4byte  .LASF41\r
- 1701 03f7 01                  .byte   0x1\r
- 1702 03f8 AD01                .2byte  0x1ad\r
- 1703 03fa 6F000000            .4byte  0x6f\r
- 1704 03fe E3020000            .4byte  .LLST17\r
- 1705 0402 12                  .uleb128 0x12\r
- 1706 0403 FD030000            .4byte  .LASF48\r
- 1707 0407 01                  .byte   0x1\r
- 1708 0408 AD01                .2byte  0x1ad\r
- 1709 040a 6F000000            .4byte  0x6f\r
- 1710 040e 1D030000            .4byte  .LLST18\r
- 1711 0412 13                  .uleb128 0x13\r
- 1712 0413 5A010000            .4byte  .LASF49\r
- 1713 0417 01                  .byte   0x1\r
- 1714 0418 AF01                .2byte  0x1af\r
- 1715 041a 6F000000            .4byte  0x6f\r
- 1716 041e 49030000            .4byte  .LLST19\r
- 1717 0422 13                  .uleb128 0x13\r
- 1718 0423 80040000            .4byte  .LASF42\r
- 1719 0427 01                  .byte   0x1\r
- 1720 0428 B001                .2byte  0x1b0\r
- 1721 042a A5000000            .4byte  0xa5\r
- 1722 042e 61030000            .4byte  .LLST20\r
- 1723 0432 00                  .byte   0\r
- 1724 0433 11                  .uleb128 0x11\r
- 1725 0434 01                  .byte   0x1\r
- 1726 0435 D0010000            .4byte  .LASF50\r
- 1727 0439 01                  .byte   0x1\r
- 1728 043a D601                .2byte  0x1d6\r
- 1729 043c 01                  .byte   0x1\r
- 1730 043d A5000000            .4byte  0xa5\r
- 1731 0441 00000000            .4byte  .LFB10\r
- 1732 0445 2E000000            .4byte  .LFE10\r
- 1733 0449 02                  .byte   0x2\r
- 1734 044a 7D                  .byte   0x7d\r
- 1735 044b 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 52\r
-\r
-\r
- 1736 044c 01                  .byte   0x1\r
- 1737 044d A2040000            .4byte  0x4a2\r
- 1738 0451 12                  .uleb128 0x12\r
- 1739 0452 B3030000            .4byte  .LASF41\r
- 1740 0456 01                  .byte   0x1\r
- 1741 0457 D601                .2byte  0x1d6\r
- 1742 0459 6F000000            .4byte  0x6f\r
- 1743 045d 98030000            .4byte  .LLST21\r
- 1744 0461 12                  .uleb128 0x12\r
- 1745 0462 95020000            .4byte  .LASF51\r
- 1746 0466 01                  .byte   0x1\r
- 1747 0467 D601                .2byte  0x1d6\r
- 1748 0469 7A000000            .4byte  0x7a\r
- 1749 046d D2030000            .4byte  .LLST22\r
- 1750 0471 12                  .uleb128 0x12\r
- 1751 0472 60010000            .4byte  .LASF52\r
- 1752 0476 01                  .byte   0x1\r
- 1753 0477 D601                .2byte  0x1d6\r
- 1754 0479 7A000000            .4byte  0x7a\r
- 1755 047d E5030000            .4byte  .LLST23\r
- 1756 0481 13                  .uleb128 0x13\r
- 1757 0482 80040000            .4byte  .LASF42\r
- 1758 0486 01                  .byte   0x1\r
- 1759 0487 D901                .2byte  0x1d9\r
- 1760 0489 A5000000            .4byte  0xa5\r
- 1761 048d F8030000            .4byte  .LLST24\r
- 1762 0491 13                  .uleb128 0x13\r
- 1763 0492 3C040000            .4byte  .LASF53\r
- 1764 0496 01                  .byte   0x1\r
- 1765 0497 DA01                .2byte  0x1da\r
- 1766 0499 A2040000            .4byte  0x4a2\r
- 1767 049d 2F040000            .4byte  .LLST25\r
- 1768 04a1 00                  .byte   0\r
- 1769 04a2 14                  .uleb128 0x14\r
- 1770 04a3 04                  .byte   0x4\r
- 1771 04a4 B0000000            .4byte  0xb0\r
- 1772 04a8 11                  .uleb128 0x11\r
- 1773 04a9 01                  .byte   0x1\r
- 1774 04aa A1040000            .4byte  .LASF54\r
- 1775 04ae 01                  .byte   0x1\r
- 1776 04af 1102                .2byte  0x211\r
- 1777 04b1 01                  .byte   0x1\r
- 1778 04b2 A5000000            .4byte  0xa5\r
- 1779 04b6 00000000            .4byte  .LFB11\r
- 1780 04ba 18000000            .4byte  .LFE11\r
- 1781 04be 02                  .byte   0x2\r
- 1782 04bf 7D                  .byte   0x7d\r
- 1783 04c0 00                  .sleb128 0\r
- 1784 04c1 01                  .byte   0x1\r
- 1785 04c2 F5040000            .4byte  0x4f5\r
- 1786 04c6 12                  .uleb128 0x12\r
- 1787 04c7 B3030000            .4byte  .LASF41\r
- 1788 04cb 01                  .byte   0x1\r
- 1789 04cc 1102                .2byte  0x211\r
- 1790 04ce 6F000000            .4byte  0x6f\r
- 1791 04d2 60040000            .4byte  .LLST26\r
- 1792 04d6 15                  .uleb128 0x15\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 53\r
-\r
-\r
- 1793 04d7 4F040000            .4byte  .LASF55\r
- 1794 04db 01                  .byte   0x1\r
- 1795 04dc 1102                .2byte  0x211\r
- 1796 04de 6F000000            .4byte  0x6f\r
- 1797 04e2 01                  .byte   0x1\r
- 1798 04e3 51                  .byte   0x51\r
- 1799 04e4 13                  .uleb128 0x13\r
- 1800 04e5 80040000            .4byte  .LASF42\r
- 1801 04e9 01                  .byte   0x1\r
- 1802 04ea 1302                .2byte  0x213\r
- 1803 04ec A5000000            .4byte  0xa5\r
- 1804 04f0 9A040000            .4byte  .LLST27\r
- 1805 04f4 00                  .byte   0\r
- 1806 04f5 11                  .uleb128 0x11\r
- 1807 04f6 01                  .byte   0x1\r
- 1808 04f7 73030000            .4byte  .LASF56\r
- 1809 04fb 01                  .byte   0x1\r
- 1810 04fc 3702                .2byte  0x237\r
- 1811 04fe 01                  .byte   0x1\r
- 1812 04ff A5000000            .4byte  0xa5\r
- 1813 0503 00000000            .4byte  .LFB12\r
- 1814 0507 24000000            .4byte  .LFE12\r
- 1815 050b 02                  .byte   0x2\r
- 1816 050c 7D                  .byte   0x7d\r
- 1817 050d 00                  .sleb128 0\r
- 1818 050e 01                  .byte   0x1\r
- 1819 050f 44050000            .4byte  0x544\r
- 1820 0513 12                  .uleb128 0x12\r
- 1821 0514 B3030000            .4byte  .LASF41\r
- 1822 0518 01                  .byte   0x1\r
- 1823 0519 3702                .2byte  0x237\r
- 1824 051b 6F000000            .4byte  0x6f\r
- 1825 051f D1040000            .4byte  .LLST28\r
- 1826 0523 12                  .uleb128 0x12\r
- 1827 0524 99040000            .4byte  .LASF57\r
- 1828 0528 01                  .byte   0x1\r
- 1829 0529 3702                .2byte  0x237\r
- 1830 052b 6F000000            .4byte  0x6f\r
- 1831 052f 0B050000            .4byte  .LLST29\r
- 1832 0533 13                  .uleb128 0x13\r
- 1833 0534 80040000            .4byte  .LASF42\r
- 1834 0538 01                  .byte   0x1\r
- 1835 0539 3902                .2byte  0x239\r
- 1836 053b A5000000            .4byte  0xa5\r
- 1837 053f 37050000            .4byte  .LLST30\r
- 1838 0543 00                  .byte   0\r
- 1839 0544 11                  .uleb128 0x11\r
- 1840 0545 01                  .byte   0x1\r
- 1841 0546 87040000            .4byte  .LASF58\r
- 1842 054a 01                  .byte   0x1\r
- 1843 054b 5802                .2byte  0x258\r
- 1844 054d 01                  .byte   0x1\r
- 1845 054e A5000000            .4byte  0xa5\r
- 1846 0552 00000000            .4byte  .LFB13\r
- 1847 0556 1C000000            .4byte  .LFE13\r
- 1848 055a 02                  .byte   0x2\r
- 1849 055b 7D                  .byte   0x7d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 54\r
-\r
-\r
- 1850 055c 00                  .sleb128 0\r
- 1851 055d 01                  .byte   0x1\r
- 1852 055e 83050000            .4byte  0x583\r
- 1853 0562 12                  .uleb128 0x12\r
- 1854 0563 B3030000            .4byte  .LASF41\r
- 1855 0567 01                  .byte   0x1\r
- 1856 0568 5802                .2byte  0x258\r
- 1857 056a 6F000000            .4byte  0x6f\r
- 1858 056e 6E050000            .4byte  .LLST31\r
- 1859 0572 13                  .uleb128 0x13\r
- 1860 0573 80040000            .4byte  .LASF42\r
- 1861 0577 01                  .byte   0x1\r
- 1862 0578 5A02                .2byte  0x25a\r
- 1863 057a A5000000            .4byte  0xa5\r
- 1864 057e A8050000            .4byte  .LLST32\r
- 1865 0582 00                  .byte   0\r
- 1866 0583 16                  .uleb128 0x16\r
- 1867 0584 01                  .byte   0x1\r
- 1868 0585 C4030000            .4byte  .LASF59\r
- 1869 0589 01                  .byte   0x1\r
- 1870 058a 8A02                .2byte  0x28a\r
- 1871 058c 01                  .byte   0x1\r
- 1872 058d A5000000            .4byte  0xa5\r
- 1873 0591 00000000            .4byte  .LFB14\r
- 1874 0595 30000000            .4byte  .LFE14\r
- 1875 0599 E0050000            .4byte  .LLST33\r
- 1876 059d 01                  .byte   0x1\r
- 1877 059e DE050000            .4byte  0x5de\r
- 1878 05a2 12                  .uleb128 0x12\r
- 1879 05a3 B3030000            .4byte  .LASF41\r
- 1880 05a7 01                  .byte   0x1\r
- 1881 05a8 8A02                .2byte  0x28a\r
- 1882 05aa 6F000000            .4byte  0x6f\r
- 1883 05ae 00060000            .4byte  .LLST34\r
- 1884 05b2 12                  .uleb128 0x12\r
- 1885 05b3 EE030000            .4byte  .LASF60\r
- 1886 05b7 01                  .byte   0x1\r
- 1887 05b8 8A02                .2byte  0x28a\r
- 1888 05ba DE050000            .4byte  0x5de\r
- 1889 05be 3A060000            .4byte  .LLST35\r
- 1890 05c2 15                  .uleb128 0x15\r
- 1891 05c3 03010000            .4byte  .LASF61\r
- 1892 05c7 01                  .byte   0x1\r
- 1893 05c8 8A02                .2byte  0x28a\r
- 1894 05ca DE050000            .4byte  0x5de\r
- 1895 05ce 01                  .byte   0x1\r
- 1896 05cf 52                  .byte   0x52\r
- 1897 05d0 17                  .uleb128 0x17\r
- 1898 05d1 80040000            .4byte  .LASF42\r
- 1899 05d5 01                  .byte   0x1\r
- 1900 05d6 8C02                .2byte  0x28c\r
- 1901 05d8 A5000000            .4byte  0xa5\r
- 1902 05dc 01                  .byte   0x1\r
- 1903 05dd 00                  .byte   0\r
- 1904 05de 14                  .uleb128 0x14\r
- 1905 05df 04                  .byte   0x4\r
- 1906 05e0 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 55\r
-\r
-\r
- 1907 05e4 16                  .uleb128 0x16\r
- 1908 05e5 01                  .byte   0x1\r
- 1909 05e6 BE040000            .4byte  .LASF62\r
- 1910 05ea 01                  .byte   0x1\r
- 1911 05eb CC02                .2byte  0x2cc\r
- 1912 05ed 01                  .byte   0x1\r
- 1913 05ee A5000000            .4byte  0xa5\r
- 1914 05f2 00000000            .4byte  .LFB15\r
- 1915 05f6 40000000            .4byte  .LFE15\r
- 1916 05fa 66060000            .4byte  .LLST36\r
- 1917 05fe 01                  .byte   0x1\r
- 1918 05ff 72060000            .4byte  0x672\r
- 1919 0603 12                  .uleb128 0x12\r
- 1920 0604 B3030000            .4byte  .LASF41\r
- 1921 0608 01                  .byte   0x1\r
- 1922 0609 CC02                .2byte  0x2cc\r
- 1923 060b 6F000000            .4byte  0x6f\r
- 1924 060f 86060000            .4byte  .LLST37\r
- 1925 0613 12                  .uleb128 0x12\r
- 1926 0614 F4020000            .4byte  .LASF63\r
- 1927 0618 01                  .byte   0x1\r
- 1928 0619 CC02                .2byte  0x2cc\r
- 1929 061b 6F000000            .4byte  0x6f\r
- 1930 061f C0060000            .4byte  .LLST38\r
- 1931 0623 12                  .uleb128 0x12\r
- 1932 0624 20040000            .4byte  .LASF64\r
- 1933 0628 01                  .byte   0x1\r
- 1934 0629 CC02                .2byte  0x2cc\r
- 1935 062b 6F000000            .4byte  0x6f\r
- 1936 062f EC060000            .4byte  .LLST39\r
- 1937 0633 12                  .uleb128 0x12\r
- 1938 0634 12010000            .4byte  .LASF65\r
- 1939 0638 01                  .byte   0x1\r
- 1940 0639 CD02                .2byte  0x2cd\r
- 1941 063b 6F000000            .4byte  0x6f\r
- 1942 063f 18070000            .4byte  .LLST40\r
- 1943 0643 15                  .uleb128 0x15\r
- 1944 0644 1A010000            .4byte  .LASF66\r
- 1945 0648 01                  .byte   0x1\r
- 1946 0649 CD02                .2byte  0x2cd\r
- 1947 064b 6F000000            .4byte  0x6f\r
- 1948 064f 02                  .byte   0x2\r
- 1949 0650 91                  .byte   0x91\r
- 1950 0651 00                  .sleb128 0\r
- 1951 0652 15                  .uleb128 0x15\r
- 1952 0653 AC030000            .4byte  .LASF67\r
- 1953 0657 01                  .byte   0x1\r
- 1954 0658 CD02                .2byte  0x2cd\r
- 1955 065a 6F000000            .4byte  0x6f\r
- 1956 065e 02                  .byte   0x2\r
- 1957 065f 91                  .byte   0x91\r
- 1958 0660 04                  .sleb128 4\r
- 1959 0661 13                  .uleb128 0x13\r
- 1960 0662 80040000            .4byte  .LASF42\r
- 1961 0666 01                  .byte   0x1\r
- 1962 0667 CF02                .2byte  0x2cf\r
- 1963 0669 A5000000            .4byte  0xa5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 56\r
-\r
-\r
- 1964 066d 44070000            .4byte  .LLST41\r
- 1965 0671 00                  .byte   0\r
- 1966 0672 16                  .uleb128 0x16\r
- 1967 0673 01                  .byte   0x1\r
- 1968 0674 3C000000            .4byte  .LASF68\r
- 1969 0678 01                  .byte   0x1\r
- 1970 0679 F002                .2byte  0x2f0\r
- 1971 067b 01                  .byte   0x1\r
- 1972 067c 6F000000            .4byte  0x6f\r
- 1973 0680 00000000            .4byte  .LFB16\r
- 1974 0684 34000000            .4byte  .LFE16\r
- 1975 0688 7B070000            .4byte  .LLST42\r
- 1976 068c 01                  .byte   0x1\r
- 1977 068d C4060000            .4byte  0x6c4\r
- 1978 0691 13                  .uleb128 0x13\r
- 1979 0692 D9000000            .4byte  .LASF36\r
- 1980 0696 01                  .byte   0x1\r
- 1981 0697 F202                .2byte  0x2f2\r
- 1982 0699 6F000000            .4byte  0x6f\r
- 1983 069d 9B070000            .4byte  .LLST43\r
- 1984 06a1 13                  .uleb128 0x13\r
- 1985 06a2 D6040000            .4byte  .LASF69\r
- 1986 06a6 01                  .byte   0x1\r
- 1987 06a7 F302                .2byte  0x2f3\r
- 1988 06a9 6F000000            .4byte  0x6f\r
- 1989 06ad AE070000            .4byte  .LLST44\r
- 1990 06b1 10                  .uleb128 0x10\r
- 1991 06b2 06000000            .4byte  .LVL81\r
- 1992 06b6 99090000            .4byte  0x999\r
- 1993 06ba 10                  .uleb128 0x10\r
- 1994 06bb 2A000000            .4byte  .LVL85\r
- 1995 06bf A7090000            .4byte  0x9a7\r
- 1996 06c3 00                  .byte   0\r
- 1997 06c4 18                  .uleb128 0x18\r
- 1998 06c5 01                  .byte   0x1\r
- 1999 06c6 4C000000            .4byte  .LASF70\r
- 2000 06ca 01                  .byte   0x1\r
- 2001 06cb 1A03                .2byte  0x31a\r
- 2002 06cd 01                  .byte   0x1\r
- 2003 06ce 00000000            .4byte  .LFB17\r
- 2004 06d2 34000000            .4byte  .LFE17\r
- 2005 06d6 EA070000            .4byte  .LLST45\r
- 2006 06da 01                  .byte   0x1\r
- 2007 06db 19070000            .4byte  0x719\r
- 2008 06df 12                  .uleb128 0x12\r
- 2009 06e0 B6000000            .4byte  .LASF71\r
- 2010 06e4 01                  .byte   0x1\r
- 2011 06e5 1A03                .2byte  0x31a\r
- 2012 06e7 6F000000            .4byte  0x6f\r
- 2013 06eb 0A080000            .4byte  .LLST46\r
- 2014 06ef 19                  .uleb128 0x19\r
- 2015 06f0 00000000            .4byte  .Ldebug_ranges0+0\r
- 2016 06f4 13                  .uleb128 0x13\r
- 2017 06f5 D9000000            .4byte  .LASF36\r
- 2018 06f9 01                  .byte   0x1\r
- 2019 06fa 1F03                .2byte  0x31f\r
- 2020 06fc 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 57\r
-\r
-\r
- 2021 0700 36080000            .4byte  .LLST47\r
- 2022 0704 10                  .uleb128 0x10\r
- 2023 0705 0C000000            .4byte  .LVL87\r
- 2024 0709 99090000            .4byte  0x999\r
- 2025 070d 1A                  .uleb128 0x1a\r
- 2026 070e 2C000000            .4byte  .LVL88\r
- 2027 0712 01                  .byte   0x1\r
- 2028 0713 A7090000            .4byte  0x9a7\r
- 2029 0717 00                  .byte   0\r
- 2030 0718 00                  .byte   0\r
- 2031 0719 1B                  .uleb128 0x1b\r
- 2032 071a 01                  .byte   0x1\r
- 2033 071b 66000000            .4byte  .LASF72\r
- 2034 071f 01                  .byte   0x1\r
- 2035 0720 3E03                .2byte  0x33e\r
- 2036 0722 01                  .byte   0x1\r
- 2037 0723 6F000000            .4byte  0x6f\r
- 2038 0727 00000000            .4byte  .LFB18\r
- 2039 072b 10000000            .4byte  .LFE18\r
- 2040 072f 02                  .byte   0x2\r
- 2041 0730 7D                  .byte   0x7d\r
- 2042 0731 00                  .sleb128 0\r
- 2043 0732 01                  .byte   0x1\r
- 2044 0733 16                  .uleb128 0x16\r
- 2045 0734 01                  .byte   0x1\r
- 2046 0735 9E000000            .4byte  .LASF73\r
- 2047 0739 01                  .byte   0x1\r
- 2048 073a 7B03                .2byte  0x37b\r
- 2049 073c 01                  .byte   0x1\r
- 2050 073d A5000000            .4byte  0xa5\r
- 2051 0741 00000000            .4byte  .LFB19\r
- 2052 0745 26000000            .4byte  .LFE19\r
- 2053 0749 49080000            .4byte  .LLST48\r
- 2054 074d 01                  .byte   0x1\r
- 2055 074e B7070000            .4byte  0x7b7\r
- 2056 0752 12                  .uleb128 0x12\r
- 2057 0753 B6000000            .4byte  .LASF71\r
- 2058 0757 01                  .byte   0x1\r
- 2059 0758 7B03                .2byte  0x37b\r
- 2060 075a 6F000000            .4byte  0x6f\r
- 2061 075e 69080000            .4byte  .LLST49\r
- 2062 0762 15                  .uleb128 0x15\r
- 2063 0763 68040000            .4byte  .LASF74\r
- 2064 0767 01                  .byte   0x1\r
- 2065 0768 7B03                .2byte  0x37b\r
- 2066 076a 7A000000            .4byte  0x7a\r
- 2067 076e 01                  .byte   0x1\r
- 2068 076f 51                  .byte   0x51\r
- 2069 0770 15                  .uleb128 0x15\r
- 2070 0771 6C030000            .4byte  .LASF75\r
- 2071 0775 01                  .byte   0x1\r
- 2072 0776 7B03                .2byte  0x37b\r
- 2073 0778 6F000000            .4byte  0x6f\r
- 2074 077c 01                  .byte   0x1\r
- 2075 077d 52                  .byte   0x52\r
- 2076 077e 15                  .uleb128 0x15\r
- 2077 077f 1C020000            .4byte  .LASF76\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 58\r
-\r
-\r
- 2078 0783 01                  .byte   0x1\r
- 2079 0784 7B03                .2byte  0x37b\r
- 2080 0786 6F000000            .4byte  0x6f\r
- 2081 078a 01                  .byte   0x1\r
- 2082 078b 53                  .byte   0x53\r
- 2083 078c 13                  .uleb128 0x13\r
- 2084 078d 80040000            .4byte  .LASF42\r
- 2085 0791 01                  .byte   0x1\r
- 2086 0792 7E03                .2byte  0x37e\r
- 2087 0794 A5000000            .4byte  0xa5\r
- 2088 0798 A3080000            .4byte  .LLST50\r
- 2089 079c 1C                  .uleb128 0x1c\r
- 2090 079d 0E000000            .4byte  .LBB4\r
- 2091 07a1 22000000            .4byte  .LBE4\r
- 2092 07a5 13                  .uleb128 0x13\r
- 2093 07a6 3C040000            .4byte  .LASF53\r
- 2094 07aa 01                  .byte   0x1\r
- 2095 07ab 8303                .2byte  0x383\r
- 2096 07ad A2040000            .4byte  0x4a2\r
- 2097 07b1 DA080000            .4byte  .LLST51\r
- 2098 07b5 00                  .byte   0\r
- 2099 07b6 00                  .byte   0\r
- 2100 07b7 16                  .uleb128 0x16\r
- 2101 07b8 01                  .byte   0x1\r
- 2102 07b9 54030000            .4byte  .LASF77\r
- 2103 07bd 01                  .byte   0x1\r
- 2104 07be B703                .2byte  0x3b7\r
- 2105 07c0 01                  .byte   0x1\r
- 2106 07c1 A5000000            .4byte  0xa5\r
- 2107 07c5 00000000            .4byte  .LFB20\r
- 2108 07c9 44000000            .4byte  .LFE20\r
- 2109 07cd ED080000            .4byte  .LLST52\r
- 2110 07d1 01                  .byte   0x1\r
- 2111 07d2 3C080000            .4byte  0x83c\r
- 2112 07d6 12                  .uleb128 0x12\r
- 2113 07d7 B6000000            .4byte  .LASF71\r
- 2114 07db 01                  .byte   0x1\r
- 2115 07dc B703                .2byte  0x3b7\r
- 2116 07de 6F000000            .4byte  0x6f\r
- 2117 07e2 0D090000            .4byte  .LLST53\r
- 2118 07e6 12                  .uleb128 0x12\r
- 2119 07e7 68040000            .4byte  .LASF74\r
- 2120 07eb 01                  .byte   0x1\r
- 2121 07ec B703                .2byte  0x3b7\r
- 2122 07ee 3C080000            .4byte  0x83c\r
- 2123 07f2 47090000            .4byte  .LLST54\r
- 2124 07f6 12                  .uleb128 0x12\r
- 2125 07f7 6C030000            .4byte  .LASF75\r
- 2126 07fb 01                  .byte   0x1\r
- 2127 07fc B703                .2byte  0x3b7\r
- 2128 07fe DE050000            .4byte  0x5de\r
- 2129 0802 73090000            .4byte  .LLST55\r
- 2130 0806 15                  .uleb128 0x15\r
- 2131 0807 1C020000            .4byte  .LASF76\r
- 2132 080b 01                  .byte   0x1\r
- 2133 080c B703                .2byte  0x3b7\r
- 2134 080e DE050000            .4byte  0x5de\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 59\r
-\r
-\r
- 2135 0812 01                  .byte   0x1\r
- 2136 0813 53                  .byte   0x53\r
- 2137 0814 17                  .uleb128 0x17\r
- 2138 0815 80040000            .4byte  .LASF42\r
- 2139 0819 01                  .byte   0x1\r
- 2140 081a BA03                .2byte  0x3ba\r
- 2141 081c A5000000            .4byte  0xa5\r
- 2142 0820 01                  .byte   0x1\r
- 2143 0821 1C                  .uleb128 0x1c\r
- 2144 0822 0A000000            .4byte  .LBB5\r
- 2145 0826 1C000000            .4byte  .LBE5\r
- 2146 082a 13                  .uleb128 0x13\r
- 2147 082b 3C040000            .4byte  .LASF53\r
- 2148 082f 01                  .byte   0x1\r
- 2149 0830 C203                .2byte  0x3c2\r
- 2150 0832 A2040000            .4byte  0x4a2\r
- 2151 0836 9F090000            .4byte  .LLST56\r
- 2152 083a 00                  .byte   0\r
- 2153 083b 00                  .byte   0\r
- 2154 083c 14                  .uleb128 0x14\r
- 2155 083d 04                  .byte   0x4\r
- 2156 083e 7A000000            .4byte  0x7a\r
- 2157 0842 11                  .uleb128 0x11\r
- 2158 0843 01                  .byte   0x1\r
- 2159 0844 C4020000            .4byte  .LASF78\r
- 2160 0848 01                  .byte   0x1\r
- 2161 0849 F203                .2byte  0x3f2\r
- 2162 084b 01                  .byte   0x1\r
- 2163 084c A5000000            .4byte  0xa5\r
- 2164 0850 00000000            .4byte  .LFB21\r
- 2165 0854 1A000000            .4byte  .LFE21\r
- 2166 0858 02                  .byte   0x2\r
- 2167 0859 7D                  .byte   0x7d\r
- 2168 085a 00                  .sleb128 0\r
- 2169 085b 01                  .byte   0x1\r
- 2170 085c AD080000            .4byte  0x8ad\r
- 2171 0860 12                  .uleb128 0x12\r
- 2172 0861 B6000000            .4byte  .LASF71\r
- 2173 0865 01                  .byte   0x1\r
- 2174 0866 F203                .2byte  0x3f2\r
- 2175 0868 6F000000            .4byte  0x6f\r
- 2176 086c C7090000            .4byte  .LLST57\r
- 2177 0870 15                  .uleb128 0x15\r
- 2178 0871 95020000            .4byte  .LASF51\r
- 2179 0875 01                  .byte   0x1\r
- 2180 0876 F203                .2byte  0x3f2\r
- 2181 0878 7A000000            .4byte  0x7a\r
- 2182 087c 01                  .byte   0x1\r
- 2183 087d 51                  .byte   0x51\r
- 2184 087e 15                  .uleb128 0x15\r
- 2185 087f 60010000            .4byte  .LASF52\r
- 2186 0883 01                  .byte   0x1\r
- 2187 0884 F203                .2byte  0x3f2\r
- 2188 0886 7A000000            .4byte  0x7a\r
- 2189 088a 01                  .byte   0x1\r
- 2190 088b 52                  .byte   0x52\r
- 2191 088c 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 60\r
-\r
-\r
- 2192 088d 80040000            .4byte  .LASF42\r
- 2193 0891 01                  .byte   0x1\r
- 2194 0892 F403                .2byte  0x3f4\r
- 2195 0894 A5000000            .4byte  0xa5\r
- 2196 0898 010A0000            .4byte  .LLST58\r
- 2197 089c 13                  .uleb128 0x13\r
- 2198 089d 3C040000            .4byte  .LASF53\r
- 2199 08a1 01                  .byte   0x1\r
- 2200 08a2 F503                .2byte  0x3f5\r
- 2201 08a4 A2040000            .4byte  0x4a2\r
- 2202 08a8 380A0000            .4byte  .LLST59\r
- 2203 08ac 00                  .byte   0\r
- 2204 08ad 11                  .uleb128 0x11\r
- 2205 08ae 01                  .byte   0x1\r
- 2206 08af 06040000            .4byte  .LASF79\r
- 2207 08b3 01                  .byte   0x1\r
- 2208 08b4 2204                .2byte  0x422\r
- 2209 08b6 01                  .byte   0x1\r
- 2210 08b7 A5000000            .4byte  0xa5\r
- 2211 08bb 00000000            .4byte  .LFB22\r
- 2212 08bf 2C000000            .4byte  .LFE22\r
- 2213 08c3 02                  .byte   0x2\r
- 2214 08c4 7D                  .byte   0x7d\r
- 2215 08c5 00                  .sleb128 0\r
- 2216 08c6 01                  .byte   0x1\r
- 2217 08c7 17090000            .4byte  0x917\r
- 2218 08cb 12                  .uleb128 0x12\r
- 2219 08cc B6000000            .4byte  .LASF71\r
- 2220 08d0 01                  .byte   0x1\r
- 2221 08d1 2204                .2byte  0x422\r
- 2222 08d3 6F000000            .4byte  0x6f\r
- 2223 08d7 690A0000            .4byte  .LLST60\r
- 2224 08db 12                  .uleb128 0x12\r
- 2225 08dc 95020000            .4byte  .LASF51\r
- 2226 08e0 01                  .byte   0x1\r
- 2227 08e1 2204                .2byte  0x422\r
- 2228 08e3 3C080000            .4byte  0x83c\r
- 2229 08e7 A30A0000            .4byte  .LLST61\r
- 2230 08eb 15                  .uleb128 0x15\r
- 2231 08ec 60010000            .4byte  .LASF52\r
- 2232 08f0 01                  .byte   0x1\r
- 2233 08f1 2204                .2byte  0x422\r
- 2234 08f3 3C080000            .4byte  0x83c\r
- 2235 08f7 01                  .byte   0x1\r
- 2236 08f8 52                  .byte   0x52\r
- 2237 08f9 17                  .uleb128 0x17\r
- 2238 08fa 80040000            .4byte  .LASF42\r
- 2239 08fe 01                  .byte   0x1\r
- 2240 08ff 2404                .2byte  0x424\r
- 2241 0901 A5000000            .4byte  0xa5\r
- 2242 0905 01                  .byte   0x1\r
- 2243 0906 13                  .uleb128 0x13\r
- 2244 0907 3C040000            .4byte  .LASF53\r
- 2245 090b 01                  .byte   0x1\r
- 2246 090c 2504                .2byte  0x425\r
- 2247 090e A2040000            .4byte  0x4a2\r
- 2248 0912 CF0A0000            .4byte  .LLST62\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 61\r
-\r
-\r
- 2249 0916 00                  .byte   0\r
- 2250 0917 11                  .uleb128 0x11\r
- 2251 0918 01                  .byte   0x1\r
- 2252 0919 B2020000            .4byte  .LASF80\r
- 2253 091d 01                  .byte   0x1\r
- 2254 091e 5504                .2byte  0x455\r
- 2255 0920 01                  .byte   0x1\r
- 2256 0921 A5000000            .4byte  0xa5\r
- 2257 0925 00000000            .4byte  .LFB23\r
- 2258 0929 28000000            .4byte  .LFE23\r
- 2259 092d 02                  .byte   0x2\r
- 2260 092e 7D                  .byte   0x7d\r
- 2261 092f 00                  .sleb128 0\r
- 2262 0930 01                  .byte   0x1\r
- 2263 0931 66090000            .4byte  0x966\r
- 2264 0935 12                  .uleb128 0x12\r
- 2265 0936 B3030000            .4byte  .LASF41\r
- 2266 093a 01                  .byte   0x1\r
- 2267 093b 5504                .2byte  0x455\r
- 2268 093d 6F000000            .4byte  0x6f\r
- 2269 0941 060B0000            .4byte  .LLST63\r
- 2270 0945 12                  .uleb128 0x12\r
- 2271 0946 E8000000            .4byte  .LASF81\r
- 2272 094a 01                  .byte   0x1\r
- 2273 094b 5504                .2byte  0x455\r
- 2274 094d 6F000000            .4byte  0x6f\r
- 2275 0951 590B0000            .4byte  .LLST64\r
- 2276 0955 13                  .uleb128 0x13\r
- 2277 0956 80040000            .4byte  .LASF42\r
- 2278 095a 01                  .byte   0x1\r
- 2279 095b 5704                .2byte  0x457\r
- 2280 095d A5000000            .4byte  0xa5\r
- 2281 0961 9E0B0000            .4byte  .LLST65\r
- 2282 0965 00                  .byte   0\r
- 2283 0966 1D                  .uleb128 0x1d\r
- 2284 0967 EA010000            .4byte  .LASF82\r
- 2285 096b 01                  .byte   0x1\r
- 2286 096c 28                  .byte   0x28\r
- 2287 096d 6F000000            .4byte  0x6f\r
- 2288 0971 05                  .byte   0x5\r
- 2289 0972 03                  .byte   0x3\r
- 2290 0973 01000000            .4byte  CyDmaTdCurrentNumber\r
- 2291 0977 1D                  .uleb128 0x1d\r
- 2292 0978 57040000            .4byte  .LASF83\r
- 2293 097c 01                  .byte   0x1\r
- 2294 097d 29                  .byte   0x29\r
- 2295 097e 6F000000            .4byte  0x6f\r
- 2296 0982 05                  .byte   0x5\r
- 2297 0983 03                  .byte   0x3\r
- 2298 0984 00000000            .4byte  CyDmaTdFreeIndex\r
- 2299 0988 1D                  .uleb128 0x1d\r
- 2300 0989 35010000            .4byte  .LASF84\r
- 2301 098d 01                  .byte   0x1\r
- 2302 098e 2A                  .byte   0x2a\r
- 2303 098f 85000000            .4byte  0x85\r
- 2304 0993 05                  .byte   0x5\r
- 2305 0994 03                  .byte   0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 62\r
-\r
-\r
- 2306 0995 00000000            .4byte  CyDmaChannels\r
- 2307 0999 1E                  .uleb128 0x1e\r
- 2308 099a 01                  .byte   0x1\r
- 2309 099b 36020000            .4byte  .LASF88\r
- 2310 099f 04                  .byte   0x4\r
- 2311 09a0 7E                  .byte   0x7e\r
- 2312 09a1 01                  .byte   0x1\r
- 2313 09a2 6F000000            .4byte  0x6f\r
- 2314 09a6 01                  .byte   0x1\r
- 2315 09a7 1F                  .uleb128 0x1f\r
- 2316 09a8 01                  .byte   0x1\r
- 2317 09a9 07000000            .4byte  .LASF89\r
- 2318 09ad 04                  .byte   0x4\r
- 2319 09ae 7F                  .byte   0x7f\r
- 2320 09af 01                  .byte   0x1\r
- 2321 09b0 01                  .byte   0x1\r
- 2322 09b1 20                  .uleb128 0x20\r
- 2323 09b2 6F000000            .4byte  0x6f\r
- 2324 09b6 00                  .byte   0\r
- 2325 09b7 00                  .byte   0\r
- 2326                          .section        .debug_abbrev,"",%progbits\r
- 2327                  .Ldebug_abbrev0:\r
- 2328 0000 01                  .uleb128 0x1\r
- 2329 0001 11                  .uleb128 0x11\r
- 2330 0002 01                  .byte   0x1\r
- 2331 0003 25                  .uleb128 0x25\r
- 2332 0004 0E                  .uleb128 0xe\r
- 2333 0005 13                  .uleb128 0x13\r
- 2334 0006 0B                  .uleb128 0xb\r
- 2335 0007 03                  .uleb128 0x3\r
- 2336 0008 0E                  .uleb128 0xe\r
- 2337 0009 1B                  .uleb128 0x1b\r
- 2338 000a 0E                  .uleb128 0xe\r
- 2339 000b 55                  .uleb128 0x55\r
- 2340 000c 06                  .uleb128 0x6\r
- 2341 000d 11                  .uleb128 0x11\r
- 2342 000e 01                  .uleb128 0x1\r
- 2343 000f 52                  .uleb128 0x52\r
- 2344 0010 01                  .uleb128 0x1\r
- 2345 0011 10                  .uleb128 0x10\r
- 2346 0012 06                  .uleb128 0x6\r
- 2347 0013 00                  .byte   0\r
- 2348 0014 00                  .byte   0\r
- 2349 0015 02                  .uleb128 0x2\r
- 2350 0016 24                  .uleb128 0x24\r
- 2351 0017 00                  .byte   0\r
- 2352 0018 0B                  .uleb128 0xb\r
- 2353 0019 0B                  .uleb128 0xb\r
- 2354 001a 3E                  .uleb128 0x3e\r
- 2355 001b 0B                  .uleb128 0xb\r
- 2356 001c 03                  .uleb128 0x3\r
- 2357 001d 0E                  .uleb128 0xe\r
- 2358 001e 00                  .byte   0\r
- 2359 001f 00                  .byte   0\r
- 2360 0020 03                  .uleb128 0x3\r
- 2361 0021 24                  .uleb128 0x24\r
- 2362 0022 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 63\r
-\r
-\r
- 2363 0023 0B                  .uleb128 0xb\r
- 2364 0024 0B                  .uleb128 0xb\r
- 2365 0025 3E                  .uleb128 0x3e\r
- 2366 0026 0B                  .uleb128 0xb\r
- 2367 0027 03                  .uleb128 0x3\r
- 2368 0028 08                  .uleb128 0x8\r
- 2369 0029 00                  .byte   0\r
- 2370 002a 00                  .byte   0\r
- 2371 002b 04                  .uleb128 0x4\r
- 2372 002c 16                  .uleb128 0x16\r
- 2373 002d 00                  .byte   0\r
- 2374 002e 03                  .uleb128 0x3\r
- 2375 002f 0E                  .uleb128 0xe\r
- 2376 0030 3A                  .uleb128 0x3a\r
- 2377 0031 0B                  .uleb128 0xb\r
- 2378 0032 3B                  .uleb128 0x3b\r
- 2379 0033 0B                  .uleb128 0xb\r
- 2380 0034 49                  .uleb128 0x49\r
- 2381 0035 13                  .uleb128 0x13\r
- 2382 0036 00                  .byte   0\r
- 2383 0037 00                  .byte   0\r
- 2384 0038 05                  .uleb128 0x5\r
- 2385 0039 35                  .uleb128 0x35\r
- 2386 003a 00                  .byte   0\r
- 2387 003b 49                  .uleb128 0x49\r
- 2388 003c 13                  .uleb128 0x13\r
- 2389 003d 00                  .byte   0\r
- 2390 003e 00                  .byte   0\r
- 2391 003f 06                  .uleb128 0x6\r
- 2392 0040 13                  .uleb128 0x13\r
- 2393 0041 01                  .byte   0x1\r
- 2394 0042 03                  .uleb128 0x3\r
- 2395 0043 0E                  .uleb128 0xe\r
- 2396 0044 0B                  .uleb128 0xb\r
- 2397 0045 0B                  .uleb128 0xb\r
- 2398 0046 3A                  .uleb128 0x3a\r
- 2399 0047 0B                  .uleb128 0xb\r
- 2400 0048 3B                  .uleb128 0x3b\r
- 2401 0049 0B                  .uleb128 0xb\r
- 2402 004a 01                  .uleb128 0x1\r
- 2403 004b 13                  .uleb128 0x13\r
- 2404 004c 00                  .byte   0\r
- 2405 004d 00                  .byte   0\r
- 2406 004e 07                  .uleb128 0x7\r
- 2407 004f 0D                  .uleb128 0xd\r
- 2408 0050 00                  .byte   0\r
- 2409 0051 03                  .uleb128 0x3\r
- 2410 0052 0E                  .uleb128 0xe\r
- 2411 0053 3A                  .uleb128 0x3a\r
- 2412 0054 0B                  .uleb128 0xb\r
- 2413 0055 3B                  .uleb128 0x3b\r
- 2414 0056 0B                  .uleb128 0xb\r
- 2415 0057 49                  .uleb128 0x49\r
- 2416 0058 13                  .uleb128 0x13\r
- 2417 0059 38                  .uleb128 0x38\r
- 2418 005a 0A                  .uleb128 0xa\r
- 2419 005b 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 64\r
-\r
-\r
- 2420 005c 00                  .byte   0\r
- 2421 005d 08                  .uleb128 0x8\r
- 2422 005e 01                  .uleb128 0x1\r
- 2423 005f 01                  .byte   0x1\r
- 2424 0060 49                  .uleb128 0x49\r
- 2425 0061 13                  .uleb128 0x13\r
- 2426 0062 01                  .uleb128 0x1\r
- 2427 0063 13                  .uleb128 0x13\r
- 2428 0064 00                  .byte   0\r
- 2429 0065 00                  .byte   0\r
- 2430 0066 09                  .uleb128 0x9\r
- 2431 0067 21                  .uleb128 0x21\r
- 2432 0068 00                  .byte   0\r
- 2433 0069 49                  .uleb128 0x49\r
- 2434 006a 13                  .uleb128 0x13\r
- 2435 006b 2F                  .uleb128 0x2f\r
- 2436 006c 0B                  .uleb128 0xb\r
- 2437 006d 00                  .byte   0\r
- 2438 006e 00                  .byte   0\r
- 2439 006f 0A                  .uleb128 0xa\r
- 2440 0070 0D                  .uleb128 0xd\r
- 2441 0071 00                  .byte   0\r
- 2442 0072 03                  .uleb128 0x3\r
- 2443 0073 08                  .uleb128 0x8\r
- 2444 0074 3A                  .uleb128 0x3a\r
- 2445 0075 0B                  .uleb128 0xb\r
- 2446 0076 3B                  .uleb128 0x3b\r
- 2447 0077 0B                  .uleb128 0xb\r
- 2448 0078 49                  .uleb128 0x49\r
- 2449 0079 13                  .uleb128 0x13\r
- 2450 007a 38                  .uleb128 0x38\r
- 2451 007b 0A                  .uleb128 0xa\r
- 2452 007c 00                  .byte   0\r
- 2453 007d 00                  .byte   0\r
- 2454 007e 0B                  .uleb128 0xb\r
- 2455 007f 2E                  .uleb128 0x2e\r
- 2456 0080 01                  .byte   0x1\r
- 2457 0081 3F                  .uleb128 0x3f\r
- 2458 0082 0C                  .uleb128 0xc\r
- 2459 0083 03                  .uleb128 0x3\r
- 2460 0084 0E                  .uleb128 0xe\r
- 2461 0085 3A                  .uleb128 0x3a\r
- 2462 0086 0B                  .uleb128 0xb\r
- 2463 0087 3B                  .uleb128 0x3b\r
- 2464 0088 0B                  .uleb128 0xb\r
- 2465 0089 27                  .uleb128 0x27\r
- 2466 008a 0C                  .uleb128 0xc\r
- 2467 008b 11                  .uleb128 0x11\r
- 2468 008c 01                  .uleb128 0x1\r
- 2469 008d 12                  .uleb128 0x12\r
- 2470 008e 01                  .uleb128 0x1\r
- 2471 008f 40                  .uleb128 0x40\r
- 2472 0090 0A                  .uleb128 0xa\r
- 2473 0091 9742                .uleb128 0x2117\r
- 2474 0093 0C                  .uleb128 0xc\r
- 2475 0094 01                  .uleb128 0x1\r
- 2476 0095 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 65\r
-\r
-\r
- 2477 0096 00                  .byte   0\r
- 2478 0097 00                  .byte   0\r
- 2479 0098 0C                  .uleb128 0xc\r
- 2480 0099 34                  .uleb128 0x34\r
- 2481 009a 00                  .byte   0\r
- 2482 009b 03                  .uleb128 0x3\r
- 2483 009c 0E                  .uleb128 0xe\r
- 2484 009d 3A                  .uleb128 0x3a\r
- 2485 009e 0B                  .uleb128 0xb\r
- 2486 009f 3B                  .uleb128 0x3b\r
- 2487 00a0 0B                  .uleb128 0xb\r
- 2488 00a1 49                  .uleb128 0x49\r
- 2489 00a2 13                  .uleb128 0x13\r
- 2490 00a3 02                  .uleb128 0x2\r
- 2491 00a4 06                  .uleb128 0x6\r
- 2492 00a5 00                  .byte   0\r
- 2493 00a6 00                  .byte   0\r
- 2494 00a7 0D                  .uleb128 0xd\r
- 2495 00a8 2E                  .uleb128 0x2e\r
- 2496 00a9 00                  .byte   0\r
- 2497 00aa 3F                  .uleb128 0x3f\r
- 2498 00ab 0C                  .uleb128 0xc\r
- 2499 00ac 03                  .uleb128 0x3\r
- 2500 00ad 0E                  .uleb128 0xe\r
- 2501 00ae 3A                  .uleb128 0x3a\r
- 2502 00af 0B                  .uleb128 0xb\r
- 2503 00b0 3B                  .uleb128 0x3b\r
- 2504 00b1 0B                  .uleb128 0xb\r
- 2505 00b2 27                  .uleb128 0x27\r
- 2506 00b3 0C                  .uleb128 0xc\r
- 2507 00b4 49                  .uleb128 0x49\r
- 2508 00b5 13                  .uleb128 0x13\r
- 2509 00b6 11                  .uleb128 0x11\r
- 2510 00b7 01                  .uleb128 0x1\r
- 2511 00b8 12                  .uleb128 0x12\r
- 2512 00b9 01                  .uleb128 0x1\r
- 2513 00ba 40                  .uleb128 0x40\r
- 2514 00bb 0A                  .uleb128 0xa\r
- 2515 00bc 9742                .uleb128 0x2117\r
- 2516 00be 0C                  .uleb128 0xc\r
- 2517 00bf 00                  .byte   0\r
- 2518 00c0 00                  .byte   0\r
- 2519 00c1 0E                  .uleb128 0xe\r
- 2520 00c2 05                  .uleb128 0x5\r
- 2521 00c3 00                  .byte   0\r
- 2522 00c4 03                  .uleb128 0x3\r
- 2523 00c5 0E                  .uleb128 0xe\r
- 2524 00c6 3A                  .uleb128 0x3a\r
- 2525 00c7 0B                  .uleb128 0xb\r
- 2526 00c8 3B                  .uleb128 0x3b\r
- 2527 00c9 0B                  .uleb128 0xb\r
- 2528 00ca 49                  .uleb128 0x49\r
- 2529 00cb 13                  .uleb128 0x13\r
- 2530 00cc 02                  .uleb128 0x2\r
- 2531 00cd 06                  .uleb128 0x6\r
- 2532 00ce 00                  .byte   0\r
- 2533 00cf 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 66\r
-\r
-\r
- 2534 00d0 0F                  .uleb128 0xf\r
- 2535 00d1 2E                  .uleb128 0x2e\r
- 2536 00d2 01                  .byte   0x1\r
- 2537 00d3 3F                  .uleb128 0x3f\r
- 2538 00d4 0C                  .uleb128 0xc\r
- 2539 00d5 03                  .uleb128 0x3\r
- 2540 00d6 0E                  .uleb128 0xe\r
- 2541 00d7 3A                  .uleb128 0x3a\r
- 2542 00d8 0B                  .uleb128 0xb\r
- 2543 00d9 3B                  .uleb128 0x3b\r
- 2544 00da 0B                  .uleb128 0xb\r
- 2545 00db 27                  .uleb128 0x27\r
- 2546 00dc 0C                  .uleb128 0xc\r
- 2547 00dd 49                  .uleb128 0x49\r
- 2548 00de 13                  .uleb128 0x13\r
- 2549 00df 11                  .uleb128 0x11\r
- 2550 00e0 01                  .uleb128 0x1\r
- 2551 00e1 12                  .uleb128 0x12\r
- 2552 00e2 01                  .uleb128 0x1\r
- 2553 00e3 40                  .uleb128 0x40\r
- 2554 00e4 06                  .uleb128 0x6\r
- 2555 00e5 9742                .uleb128 0x2117\r
- 2556 00e7 0C                  .uleb128 0xc\r
- 2557 00e8 01                  .uleb128 0x1\r
- 2558 00e9 13                  .uleb128 0x13\r
- 2559 00ea 00                  .byte   0\r
- 2560 00eb 00                  .byte   0\r
- 2561 00ec 10                  .uleb128 0x10\r
- 2562 00ed 898201              .uleb128 0x4109\r
- 2563 00f0 00                  .byte   0\r
- 2564 00f1 11                  .uleb128 0x11\r
- 2565 00f2 01                  .uleb128 0x1\r
- 2566 00f3 31                  .uleb128 0x31\r
- 2567 00f4 13                  .uleb128 0x13\r
- 2568 00f5 00                  .byte   0\r
- 2569 00f6 00                  .byte   0\r
- 2570 00f7 11                  .uleb128 0x11\r
- 2571 00f8 2E                  .uleb128 0x2e\r
- 2572 00f9 01                  .byte   0x1\r
- 2573 00fa 3F                  .uleb128 0x3f\r
- 2574 00fb 0C                  .uleb128 0xc\r
- 2575 00fc 03                  .uleb128 0x3\r
- 2576 00fd 0E                  .uleb128 0xe\r
- 2577 00fe 3A                  .uleb128 0x3a\r
- 2578 00ff 0B                  .uleb128 0xb\r
- 2579 0100 3B                  .uleb128 0x3b\r
- 2580 0101 05                  .uleb128 0x5\r
- 2581 0102 27                  .uleb128 0x27\r
- 2582 0103 0C                  .uleb128 0xc\r
- 2583 0104 49                  .uleb128 0x49\r
- 2584 0105 13                  .uleb128 0x13\r
- 2585 0106 11                  .uleb128 0x11\r
- 2586 0107 01                  .uleb128 0x1\r
- 2587 0108 12                  .uleb128 0x12\r
- 2588 0109 01                  .uleb128 0x1\r
- 2589 010a 40                  .uleb128 0x40\r
- 2590 010b 0A                  .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 67\r
-\r
-\r
- 2591 010c 9742                .uleb128 0x2117\r
- 2592 010e 0C                  .uleb128 0xc\r
- 2593 010f 01                  .uleb128 0x1\r
- 2594 0110 13                  .uleb128 0x13\r
- 2595 0111 00                  .byte   0\r
- 2596 0112 00                  .byte   0\r
- 2597 0113 12                  .uleb128 0x12\r
- 2598 0114 05                  .uleb128 0x5\r
- 2599 0115 00                  .byte   0\r
- 2600 0116 03                  .uleb128 0x3\r
- 2601 0117 0E                  .uleb128 0xe\r
- 2602 0118 3A                  .uleb128 0x3a\r
- 2603 0119 0B                  .uleb128 0xb\r
- 2604 011a 3B                  .uleb128 0x3b\r
- 2605 011b 05                  .uleb128 0x5\r
- 2606 011c 49                  .uleb128 0x49\r
- 2607 011d 13                  .uleb128 0x13\r
- 2608 011e 02                  .uleb128 0x2\r
- 2609 011f 06                  .uleb128 0x6\r
- 2610 0120 00                  .byte   0\r
- 2611 0121 00                  .byte   0\r
- 2612 0122 13                  .uleb128 0x13\r
- 2613 0123 34                  .uleb128 0x34\r
- 2614 0124 00                  .byte   0\r
- 2615 0125 03                  .uleb128 0x3\r
- 2616 0126 0E                  .uleb128 0xe\r
- 2617 0127 3A                  .uleb128 0x3a\r
- 2618 0128 0B                  .uleb128 0xb\r
- 2619 0129 3B                  .uleb128 0x3b\r
- 2620 012a 05                  .uleb128 0x5\r
- 2621 012b 49                  .uleb128 0x49\r
- 2622 012c 13                  .uleb128 0x13\r
- 2623 012d 02                  .uleb128 0x2\r
- 2624 012e 06                  .uleb128 0x6\r
- 2625 012f 00                  .byte   0\r
- 2626 0130 00                  .byte   0\r
- 2627 0131 14                  .uleb128 0x14\r
- 2628 0132 0F                  .uleb128 0xf\r
- 2629 0133 00                  .byte   0\r
- 2630 0134 0B                  .uleb128 0xb\r
- 2631 0135 0B                  .uleb128 0xb\r
- 2632 0136 49                  .uleb128 0x49\r
- 2633 0137 13                  .uleb128 0x13\r
- 2634 0138 00                  .byte   0\r
- 2635 0139 00                  .byte   0\r
- 2636 013a 15                  .uleb128 0x15\r
- 2637 013b 05                  .uleb128 0x5\r
- 2638 013c 00                  .byte   0\r
- 2639 013d 03                  .uleb128 0x3\r
- 2640 013e 0E                  .uleb128 0xe\r
- 2641 013f 3A                  .uleb128 0x3a\r
- 2642 0140 0B                  .uleb128 0xb\r
- 2643 0141 3B                  .uleb128 0x3b\r
- 2644 0142 05                  .uleb128 0x5\r
- 2645 0143 49                  .uleb128 0x49\r
- 2646 0144 13                  .uleb128 0x13\r
- 2647 0145 02                  .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 68\r
-\r
-\r
- 2648 0146 0A                  .uleb128 0xa\r
- 2649 0147 00                  .byte   0\r
- 2650 0148 00                  .byte   0\r
- 2651 0149 16                  .uleb128 0x16\r
- 2652 014a 2E                  .uleb128 0x2e\r
- 2653 014b 01                  .byte   0x1\r
- 2654 014c 3F                  .uleb128 0x3f\r
- 2655 014d 0C                  .uleb128 0xc\r
- 2656 014e 03                  .uleb128 0x3\r
- 2657 014f 0E                  .uleb128 0xe\r
- 2658 0150 3A                  .uleb128 0x3a\r
- 2659 0151 0B                  .uleb128 0xb\r
- 2660 0152 3B                  .uleb128 0x3b\r
- 2661 0153 05                  .uleb128 0x5\r
- 2662 0154 27                  .uleb128 0x27\r
- 2663 0155 0C                  .uleb128 0xc\r
- 2664 0156 49                  .uleb128 0x49\r
- 2665 0157 13                  .uleb128 0x13\r
- 2666 0158 11                  .uleb128 0x11\r
- 2667 0159 01                  .uleb128 0x1\r
- 2668 015a 12                  .uleb128 0x12\r
- 2669 015b 01                  .uleb128 0x1\r
- 2670 015c 40                  .uleb128 0x40\r
- 2671 015d 06                  .uleb128 0x6\r
- 2672 015e 9742                .uleb128 0x2117\r
- 2673 0160 0C                  .uleb128 0xc\r
- 2674 0161 01                  .uleb128 0x1\r
- 2675 0162 13                  .uleb128 0x13\r
- 2676 0163 00                  .byte   0\r
- 2677 0164 00                  .byte   0\r
- 2678 0165 17                  .uleb128 0x17\r
- 2679 0166 34                  .uleb128 0x34\r
- 2680 0167 00                  .byte   0\r
- 2681 0168 03                  .uleb128 0x3\r
- 2682 0169 0E                  .uleb128 0xe\r
- 2683 016a 3A                  .uleb128 0x3a\r
- 2684 016b 0B                  .uleb128 0xb\r
- 2685 016c 3B                  .uleb128 0x3b\r
- 2686 016d 05                  .uleb128 0x5\r
- 2687 016e 49                  .uleb128 0x49\r
- 2688 016f 13                  .uleb128 0x13\r
- 2689 0170 1C                  .uleb128 0x1c\r
- 2690 0171 0B                  .uleb128 0xb\r
- 2691 0172 00                  .byte   0\r
- 2692 0173 00                  .byte   0\r
- 2693 0174 18                  .uleb128 0x18\r
- 2694 0175 2E                  .uleb128 0x2e\r
- 2695 0176 01                  .byte   0x1\r
- 2696 0177 3F                  .uleb128 0x3f\r
- 2697 0178 0C                  .uleb128 0xc\r
- 2698 0179 03                  .uleb128 0x3\r
- 2699 017a 0E                  .uleb128 0xe\r
- 2700 017b 3A                  .uleb128 0x3a\r
- 2701 017c 0B                  .uleb128 0xb\r
- 2702 017d 3B                  .uleb128 0x3b\r
- 2703 017e 05                  .uleb128 0x5\r
- 2704 017f 27                  .uleb128 0x27\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 69\r
-\r
-\r
- 2705 0180 0C                  .uleb128 0xc\r
- 2706 0181 11                  .uleb128 0x11\r
- 2707 0182 01                  .uleb128 0x1\r
- 2708 0183 12                  .uleb128 0x12\r
- 2709 0184 01                  .uleb128 0x1\r
- 2710 0185 40                  .uleb128 0x40\r
- 2711 0186 06                  .uleb128 0x6\r
- 2712 0187 9742                .uleb128 0x2117\r
- 2713 0189 0C                  .uleb128 0xc\r
- 2714 018a 01                  .uleb128 0x1\r
- 2715 018b 13                  .uleb128 0x13\r
- 2716 018c 00                  .byte   0\r
- 2717 018d 00                  .byte   0\r
- 2718 018e 19                  .uleb128 0x19\r
- 2719 018f 0B                  .uleb128 0xb\r
- 2720 0190 01                  .byte   0x1\r
- 2721 0191 55                  .uleb128 0x55\r
- 2722 0192 06                  .uleb128 0x6\r
- 2723 0193 00                  .byte   0\r
- 2724 0194 00                  .byte   0\r
- 2725 0195 1A                  .uleb128 0x1a\r
- 2726 0196 898201              .uleb128 0x4109\r
- 2727 0199 00                  .byte   0\r
- 2728 019a 11                  .uleb128 0x11\r
- 2729 019b 01                  .uleb128 0x1\r
- 2730 019c 9542                .uleb128 0x2115\r
- 2731 019e 0C                  .uleb128 0xc\r
- 2732 019f 31                  .uleb128 0x31\r
- 2733 01a0 13                  .uleb128 0x13\r
- 2734 01a1 00                  .byte   0\r
- 2735 01a2 00                  .byte   0\r
- 2736 01a3 1B                  .uleb128 0x1b\r
- 2737 01a4 2E                  .uleb128 0x2e\r
- 2738 01a5 00                  .byte   0\r
- 2739 01a6 3F                  .uleb128 0x3f\r
- 2740 01a7 0C                  .uleb128 0xc\r
- 2741 01a8 03                  .uleb128 0x3\r
- 2742 01a9 0E                  .uleb128 0xe\r
- 2743 01aa 3A                  .uleb128 0x3a\r
- 2744 01ab 0B                  .uleb128 0xb\r
- 2745 01ac 3B                  .uleb128 0x3b\r
- 2746 01ad 05                  .uleb128 0x5\r
- 2747 01ae 27                  .uleb128 0x27\r
- 2748 01af 0C                  .uleb128 0xc\r
- 2749 01b0 49                  .uleb128 0x49\r
- 2750 01b1 13                  .uleb128 0x13\r
- 2751 01b2 11                  .uleb128 0x11\r
- 2752 01b3 01                  .uleb128 0x1\r
- 2753 01b4 12                  .uleb128 0x12\r
- 2754 01b5 01                  .uleb128 0x1\r
- 2755 01b6 40                  .uleb128 0x40\r
- 2756 01b7 0A                  .uleb128 0xa\r
- 2757 01b8 9742                .uleb128 0x2117\r
- 2758 01ba 0C                  .uleb128 0xc\r
- 2759 01bb 00                  .byte   0\r
- 2760 01bc 00                  .byte   0\r
- 2761 01bd 1C                  .uleb128 0x1c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 70\r
-\r
-\r
- 2762 01be 0B                  .uleb128 0xb\r
- 2763 01bf 01                  .byte   0x1\r
- 2764 01c0 11                  .uleb128 0x11\r
- 2765 01c1 01                  .uleb128 0x1\r
- 2766 01c2 12                  .uleb128 0x12\r
- 2767 01c3 01                  .uleb128 0x1\r
- 2768 01c4 00                  .byte   0\r
- 2769 01c5 00                  .byte   0\r
- 2770 01c6 1D                  .uleb128 0x1d\r
- 2771 01c7 34                  .uleb128 0x34\r
- 2772 01c8 00                  .byte   0\r
- 2773 01c9 03                  .uleb128 0x3\r
- 2774 01ca 0E                  .uleb128 0xe\r
- 2775 01cb 3A                  .uleb128 0x3a\r
- 2776 01cc 0B                  .uleb128 0xb\r
- 2777 01cd 3B                  .uleb128 0x3b\r
- 2778 01ce 0B                  .uleb128 0xb\r
- 2779 01cf 49                  .uleb128 0x49\r
- 2780 01d0 13                  .uleb128 0x13\r
- 2781 01d1 02                  .uleb128 0x2\r
- 2782 01d2 0A                  .uleb128 0xa\r
- 2783 01d3 00                  .byte   0\r
- 2784 01d4 00                  .byte   0\r
- 2785 01d5 1E                  .uleb128 0x1e\r
- 2786 01d6 2E                  .uleb128 0x2e\r
- 2787 01d7 00                  .byte   0\r
- 2788 01d8 3F                  .uleb128 0x3f\r
- 2789 01d9 0C                  .uleb128 0xc\r
- 2790 01da 03                  .uleb128 0x3\r
- 2791 01db 0E                  .uleb128 0xe\r
- 2792 01dc 3A                  .uleb128 0x3a\r
- 2793 01dd 0B                  .uleb128 0xb\r
- 2794 01de 3B                  .uleb128 0x3b\r
- 2795 01df 0B                  .uleb128 0xb\r
- 2796 01e0 27                  .uleb128 0x27\r
- 2797 01e1 0C                  .uleb128 0xc\r
- 2798 01e2 49                  .uleb128 0x49\r
- 2799 01e3 13                  .uleb128 0x13\r
- 2800 01e4 3C                  .uleb128 0x3c\r
- 2801 01e5 0C                  .uleb128 0xc\r
- 2802 01e6 00                  .byte   0\r
- 2803 01e7 00                  .byte   0\r
- 2804 01e8 1F                  .uleb128 0x1f\r
- 2805 01e9 2E                  .uleb128 0x2e\r
- 2806 01ea 01                  .byte   0x1\r
- 2807 01eb 3F                  .uleb128 0x3f\r
- 2808 01ec 0C                  .uleb128 0xc\r
- 2809 01ed 03                  .uleb128 0x3\r
- 2810 01ee 0E                  .uleb128 0xe\r
- 2811 01ef 3A                  .uleb128 0x3a\r
- 2812 01f0 0B                  .uleb128 0xb\r
- 2813 01f1 3B                  .uleb128 0x3b\r
- 2814 01f2 0B                  .uleb128 0xb\r
- 2815 01f3 27                  .uleb128 0x27\r
- 2816 01f4 0C                  .uleb128 0xc\r
- 2817 01f5 3C                  .uleb128 0x3c\r
- 2818 01f6 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 71\r
-\r
-\r
- 2819 01f7 00                  .byte   0\r
- 2820 01f8 00                  .byte   0\r
- 2821 01f9 20                  .uleb128 0x20\r
- 2822 01fa 05                  .uleb128 0x5\r
- 2823 01fb 00                  .byte   0\r
- 2824 01fc 49                  .uleb128 0x49\r
- 2825 01fd 13                  .uleb128 0x13\r
- 2826 01fe 00                  .byte   0\r
- 2827 01ff 00                  .byte   0\r
- 2828 0200 00                  .byte   0\r
- 2829                          .section        .debug_loc,"",%progbits\r
- 2830                  .Ldebug_loc0:\r
- 2831                  .LLST0:\r
- 2832 0000 0C000000            .4byte  .LVL0\r
- 2833 0004 0E000000            .4byte  .LVL1\r
- 2834 0008 0300                .2byte  0x3\r
- 2835 000a 08                  .byte   0x8\r
- 2836 000b 7F                  .byte   0x7f\r
- 2837 000c 9F                  .byte   0x9f\r
- 2838 000d 00000000            .4byte  0\r
- 2839 0011 00000000            .4byte  0\r
- 2840                  .LLST1:\r
- 2841 0015 00000000            .4byte  .LVL2\r
- 2842 0019 06000000            .4byte  .LVL3\r
- 2843 001d 0100                .2byte  0x1\r
- 2844 001f 50                  .byte   0x50\r
- 2845 0020 06000000            .4byte  .LVL3\r
- 2846 0024 10000000            .4byte  .LFE2\r
- 2847 0028 0400                .2byte  0x4\r
- 2848 002a F3                  .byte   0xf3\r
- 2849 002b 01                  .uleb128 0x1\r
- 2850 002c 50                  .byte   0x50\r
- 2851 002d 9F                  .byte   0x9f\r
- 2852 002e 00000000            .4byte  0\r
- 2853 0032 00000000            .4byte  0\r
- 2854                  .LLST2:\r
- 2855 0036 00000000            .4byte  .LFB4\r
- 2856 003a 02000000            .4byte  .LCFI0\r
- 2857 003e 0200                .2byte  0x2\r
- 2858 0040 7D                  .byte   0x7d\r
- 2859 0041 00                  .sleb128 0\r
- 2860 0042 02000000            .4byte  .LCFI0\r
- 2861 0046 34000000            .4byte  .LFE4\r
- 2862 004a 0200                .2byte  0x2\r
- 2863 004c 7D                  .byte   0x7d\r
- 2864 004d 08                  .sleb128 8\r
- 2865 004e 00000000            .4byte  0\r
- 2866 0052 00000000            .4byte  0\r
- 2867                  .LLST3:\r
- 2868 0056 06000000            .4byte  .LVL5\r
- 2869 005a 2B000000            .4byte  .LVL9-1\r
- 2870 005e 0100                .2byte  0x1\r
- 2871 0060 50                  .byte   0x50\r
- 2872 0061 00000000            .4byte  0\r
- 2873 0065 00000000            .4byte  0\r
- 2874                  .LLST4:\r
- 2875 0069 06000000            .4byte  .LVL5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 72\r
-\r
-\r
- 2876 006d 0E000000            .4byte  .LVL6\r
- 2877 0071 0200                .2byte  0x2\r
- 2878 0073 30                  .byte   0x30\r
- 2879 0074 9F                  .byte   0x9f\r
- 2880 0075 22000000            .4byte  .LVL7\r
- 2881 0079 34000000            .4byte  .LFE4\r
- 2882 007d 0100                .2byte  0x1\r
- 2883 007f 54                  .byte   0x54\r
- 2884 0080 00000000            .4byte  0\r
- 2885 0084 00000000            .4byte  0\r
- 2886                  .LLST5:\r
- 2887 0088 00000000            .4byte  .LVL4\r
- 2888 008c 0E000000            .4byte  .LVL6\r
- 2889 0090 0200                .2byte  0x2\r
- 2890 0092 31                  .byte   0x31\r
- 2891 0093 9F                  .byte   0x9f\r
- 2892 0094 22000000            .4byte  .LVL7\r
- 2893 0098 28000000            .4byte  .LVL8\r
- 2894 009c 0100                .2byte  0x1\r
- 2895 009e 51                  .byte   0x51\r
- 2896 009f 00000000            .4byte  0\r
- 2897 00a3 00000000            .4byte  0\r
- 2898                  .LLST6:\r
- 2899 00a7 00000000            .4byte  .LFB5\r
- 2900 00ab 04000000            .4byte  .LCFI1\r
- 2901 00af 0200                .2byte  0x2\r
- 2902 00b1 7D                  .byte   0x7d\r
- 2903 00b2 00                  .sleb128 0\r
- 2904 00b3 04000000            .4byte  .LCFI1\r
- 2905 00b7 30000000            .4byte  .LFE5\r
- 2906 00bb 0200                .2byte  0x2\r
- 2907 00bd 7D                  .byte   0x7d\r
- 2908 00be 10                  .sleb128 16\r
- 2909 00bf 00000000            .4byte  0\r
- 2910 00c3 00000000            .4byte  0\r
- 2911                  .LLST7:\r
- 2912 00c7 00000000            .4byte  .LVL10\r
- 2913 00cb 13000000            .4byte  .LVL11-1\r
- 2914 00cf 0100                .2byte  0x1\r
- 2915 00d1 50                  .byte   0x50\r
- 2916 00d2 13000000            .4byte  .LVL11-1\r
- 2917 00d6 26000000            .4byte  .LVL13\r
- 2918 00da 0400                .2byte  0x4\r
- 2919 00dc F3                  .byte   0xf3\r
- 2920 00dd 01                  .uleb128 0x1\r
- 2921 00de 50                  .byte   0x50\r
- 2922 00df 9F                  .byte   0x9f\r
- 2923 00e0 26000000            .4byte  .LVL13\r
- 2924 00e4 28000000            .4byte  .LVL14\r
- 2925 00e8 0100                .2byte  0x1\r
- 2926 00ea 50                  .byte   0x50\r
- 2927 00eb 28000000            .4byte  .LVL14\r
- 2928 00ef 30000000            .4byte  .LFE5\r
- 2929 00f3 0400                .2byte  0x4\r
- 2930 00f5 F3                  .byte   0xf3\r
- 2931 00f6 01                  .uleb128 0x1\r
- 2932 00f7 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 73\r
-\r
-\r
- 2933 00f8 9F                  .byte   0x9f\r
- 2934 00f9 00000000            .4byte  0\r
- 2935 00fd 00000000            .4byte  0\r
- 2936                  .LLST8:\r
- 2937 0101 00000000            .4byte  .LVL10\r
- 2938 0105 22000000            .4byte  .LVL12\r
- 2939 0109 0200                .2byte  0x2\r
- 2940 010b 31                  .byte   0x31\r
- 2941 010c 9F                  .byte   0x9f\r
- 2942 010d 22000000            .4byte  .LVL12\r
- 2943 0111 26000000            .4byte  .LVL13\r
- 2944 0115 0200                .2byte  0x2\r
- 2945 0117 30                  .byte   0x30\r
- 2946 0118 9F                  .byte   0x9f\r
- 2947 0119 26000000            .4byte  .LVL13\r
- 2948 011d 28000000            .4byte  .LVL14\r
- 2949 0121 0200                .2byte  0x2\r
- 2950 0123 31                  .byte   0x31\r
- 2951 0124 9F                  .byte   0x9f\r
- 2952 0125 28000000            .4byte  .LVL14\r
- 2953 0129 30000000            .4byte  .LFE5\r
- 2954 012d 0100                .2byte  0x1\r
- 2955 012f 50                  .byte   0x50\r
- 2956 0130 00000000            .4byte  0\r
- 2957 0134 00000000            .4byte  0\r
- 2958                  .LLST9:\r
- 2959 0138 14000000            .4byte  .LVL11\r
- 2960 013c 21000000            .4byte  .LVL12-1\r
- 2961 0140 0100                .2byte  0x1\r
- 2962 0142 50                  .byte   0x50\r
- 2963 0143 00000000            .4byte  0\r
- 2964 0147 00000000            .4byte  0\r
- 2965                  .LLST10:\r
- 2966 014b 00000000            .4byte  .LVL15\r
- 2967 014f 1E000000            .4byte  .LVL19\r
- 2968 0153 0100                .2byte  0x1\r
- 2969 0155 50                  .byte   0x50\r
- 2970 0156 1E000000            .4byte  .LVL19\r
- 2971 015a 2A000000            .4byte  .LVL21\r
- 2972 015e 0400                .2byte  0x4\r
- 2973 0160 F3                  .byte   0xf3\r
- 2974 0161 01                  .uleb128 0x1\r
- 2975 0162 50                  .byte   0x50\r
- 2976 0163 9F                  .byte   0x9f\r
- 2977 0164 2A000000            .4byte  .LVL21\r
- 2978 0168 2C000000            .4byte  .LVL22\r
- 2979 016c 0100                .2byte  0x1\r
- 2980 016e 50                  .byte   0x50\r
- 2981 016f 2C000000            .4byte  .LVL22\r
- 2982 0173 34000000            .4byte  .LFE6\r
- 2983 0177 0400                .2byte  0x4\r
- 2984 0179 F3                  .byte   0xf3\r
- 2985 017a 01                  .uleb128 0x1\r
- 2986 017b 50                  .byte   0x50\r
- 2987 017c 9F                  .byte   0x9f\r
- 2988 017d 00000000            .4byte  0\r
- 2989 0181 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 74\r
-\r
-\r
- 2990                  .LLST11:\r
- 2991 0185 00000000            .4byte  .LVL15\r
- 2992 0189 0C000000            .4byte  .LVL16\r
- 2993 018d 0100                .2byte  0x1\r
- 2994 018f 51                  .byte   0x51\r
- 2995 0190 0C000000            .4byte  .LVL16\r
- 2996 0194 12000000            .4byte  .LVL17\r
- 2997 0198 0400                .2byte  0x4\r
- 2998 019a F3                  .byte   0xf3\r
- 2999 019b 01                  .uleb128 0x1\r
- 3000 019c 51                  .byte   0x51\r
- 3001 019d 9F                  .byte   0x9f\r
- 3002 019e 12000000            .4byte  .LVL17\r
- 3003 01a2 14000000            .4byte  .LVL18\r
- 3004 01a6 0100                .2byte  0x1\r
- 3005 01a8 51                  .byte   0x51\r
- 3006 01a9 14000000            .4byte  .LVL18\r
- 3007 01ad 2A000000            .4byte  .LVL21\r
- 3008 01b1 0400                .2byte  0x4\r
- 3009 01b3 F3                  .byte   0xf3\r
- 3010 01b4 01                  .uleb128 0x1\r
- 3011 01b5 51                  .byte   0x51\r
- 3012 01b6 9F                  .byte   0x9f\r
- 3013 01b7 2A000000            .4byte  .LVL21\r
- 3014 01bb 34000000            .4byte  .LFE6\r
- 3015 01bf 0100                .2byte  0x1\r
- 3016 01c1 51                  .byte   0x51\r
- 3017 01c2 00000000            .4byte  0\r
- 3018 01c6 00000000            .4byte  0\r
- 3019                  .LLST12:\r
- 3020 01ca 00000000            .4byte  .LVL15\r
- 3021 01ce 26000000            .4byte  .LVL20\r
- 3022 01d2 0200                .2byte  0x2\r
- 3023 01d4 31                  .byte   0x31\r
- 3024 01d5 9F                  .byte   0x9f\r
- 3025 01d6 26000000            .4byte  .LVL20\r
- 3026 01da 2A000000            .4byte  .LVL21\r
- 3027 01de 0200                .2byte  0x2\r
- 3028 01e0 30                  .byte   0x30\r
- 3029 01e1 9F                  .byte   0x9f\r
- 3030 01e2 2A000000            .4byte  .LVL21\r
- 3031 01e6 2C000000            .4byte  .LVL22\r
- 3032 01ea 0200                .2byte  0x2\r
- 3033 01ec 31                  .byte   0x31\r
- 3034 01ed 9F                  .byte   0x9f\r
- 3035 01ee 2C000000            .4byte  .LVL22\r
- 3036 01f2 34000000            .4byte  .LFE6\r
- 3037 01f6 0100                .2byte  0x1\r
- 3038 01f8 50                  .byte   0x50\r
- 3039 01f9 00000000            .4byte  0\r
- 3040 01fd 00000000            .4byte  0\r
- 3041                  .LLST13:\r
- 3042 0201 00000000            .4byte  .LVL23\r
- 3043 0205 08000000            .4byte  .LVL24\r
- 3044 0209 0100                .2byte  0x1\r
- 3045 020b 50                  .byte   0x50\r
- 3046 020c 08000000            .4byte  .LVL24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 75\r
-\r
-\r
- 3047 0210 1C000000            .4byte  .LVL26\r
- 3048 0214 0400                .2byte  0x4\r
- 3049 0216 F3                  .byte   0xf3\r
- 3050 0217 01                  .uleb128 0x1\r
- 3051 0218 50                  .byte   0x50\r
- 3052 0219 9F                  .byte   0x9f\r
- 3053 021a 1C000000            .4byte  .LVL26\r
- 3054 021e 1E000000            .4byte  .LVL27\r
- 3055 0222 0100                .2byte  0x1\r
- 3056 0224 50                  .byte   0x50\r
- 3057 0225 1E000000            .4byte  .LVL27\r
- 3058 0229 24000000            .4byte  .LFE7\r
- 3059 022d 0400                .2byte  0x4\r
- 3060 022f F3                  .byte   0xf3\r
- 3061 0230 01                  .uleb128 0x1\r
- 3062 0231 50                  .byte   0x50\r
- 3063 0232 9F                  .byte   0x9f\r
- 3064 0233 00000000            .4byte  0\r
- 3065 0237 00000000            .4byte  0\r
- 3066                  .LLST14:\r
- 3067 023b 00000000            .4byte  .LVL23\r
- 3068 023f 18000000            .4byte  .LVL25\r
- 3069 0243 0200                .2byte  0x2\r
- 3070 0245 31                  .byte   0x31\r
- 3071 0246 9F                  .byte   0x9f\r
- 3072 0247 18000000            .4byte  .LVL25\r
- 3073 024b 1C000000            .4byte  .LVL26\r
- 3074 024f 0200                .2byte  0x2\r
- 3075 0251 30                  .byte   0x30\r
- 3076 0252 9F                  .byte   0x9f\r
- 3077 0253 1C000000            .4byte  .LVL26\r
- 3078 0257 1E000000            .4byte  .LVL27\r
- 3079 025b 0200                .2byte  0x2\r
- 3080 025d 31                  .byte   0x31\r
- 3081 025e 9F                  .byte   0x9f\r
- 3082 025f 1E000000            .4byte  .LVL27\r
- 3083 0263 24000000            .4byte  .LFE7\r
- 3084 0267 0100                .2byte  0x1\r
- 3085 0269 50                  .byte   0x50\r
- 3086 026a 00000000            .4byte  0\r
- 3087 026e 00000000            .4byte  0\r
- 3088                  .LLST15:\r
- 3089 0272 00000000            .4byte  .LVL28\r
- 3090 0276 08000000            .4byte  .LVL29\r
- 3091 027a 0100                .2byte  0x1\r
- 3092 027c 50                  .byte   0x50\r
- 3093 027d 08000000            .4byte  .LVL29\r
- 3094 0281 1E000000            .4byte  .LVL31\r
- 3095 0285 0400                .2byte  0x4\r
- 3096 0287 F3                  .byte   0xf3\r
- 3097 0288 01                  .uleb128 0x1\r
- 3098 0289 50                  .byte   0x50\r
- 3099 028a 9F                  .byte   0x9f\r
- 3100 028b 1E000000            .4byte  .LVL31\r
- 3101 028f 20000000            .4byte  .LVL32\r
- 3102 0293 0100                .2byte  0x1\r
- 3103 0295 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 76\r
-\r
-\r
- 3104 0296 20000000            .4byte  .LVL32\r
- 3105 029a 28000000            .4byte  .LFE8\r
- 3106 029e 0400                .2byte  0x4\r
- 3107 02a0 F3                  .byte   0xf3\r
- 3108 02a1 01                  .uleb128 0x1\r
- 3109 02a2 50                  .byte   0x50\r
- 3110 02a3 9F                  .byte   0x9f\r
- 3111 02a4 00000000            .4byte  0\r
- 3112 02a8 00000000            .4byte  0\r
- 3113                  .LLST16:\r
- 3114 02ac 00000000            .4byte  .LVL28\r
- 3115 02b0 1A000000            .4byte  .LVL30\r
- 3116 02b4 0200                .2byte  0x2\r
- 3117 02b6 31                  .byte   0x31\r
- 3118 02b7 9F                  .byte   0x9f\r
- 3119 02b8 1A000000            .4byte  .LVL30\r
- 3120 02bc 1E000000            .4byte  .LVL31\r
- 3121 02c0 0200                .2byte  0x2\r
- 3122 02c2 30                  .byte   0x30\r
- 3123 02c3 9F                  .byte   0x9f\r
- 3124 02c4 1E000000            .4byte  .LVL31\r
- 3125 02c8 20000000            .4byte  .LVL32\r
- 3126 02cc 0200                .2byte  0x2\r
- 3127 02ce 31                  .byte   0x31\r
- 3128 02cf 9F                  .byte   0x9f\r
- 3129 02d0 20000000            .4byte  .LVL32\r
- 3130 02d4 28000000            .4byte  .LFE8\r
- 3131 02d8 0100                .2byte  0x1\r
- 3132 02da 50                  .byte   0x50\r
- 3133 02db 00000000            .4byte  0\r
- 3134 02df 00000000            .4byte  0\r
- 3135                  .LLST17:\r
- 3136 02e3 00000000            .4byte  .LVL33\r
- 3137 02e7 08000000            .4byte  .LVL34\r
- 3138 02eb 0100                .2byte  0x1\r
- 3139 02ed 50                  .byte   0x50\r
- 3140 02ee 08000000            .4byte  .LVL34\r
- 3141 02f2 1C000000            .4byte  .LVL39\r
- 3142 02f6 0400                .2byte  0x4\r
- 3143 02f8 F3                  .byte   0xf3\r
- 3144 02f9 01                  .uleb128 0x1\r
- 3145 02fa 50                  .byte   0x50\r
- 3146 02fb 9F                  .byte   0x9f\r
- 3147 02fc 1C000000            .4byte  .LVL39\r
- 3148 0300 1E000000            .4byte  .LVL40\r
- 3149 0304 0100                .2byte  0x1\r
- 3150 0306 50                  .byte   0x50\r
- 3151 0307 1E000000            .4byte  .LVL40\r
- 3152 030b 24000000            .4byte  .LFE9\r
- 3153 030f 0400                .2byte  0x4\r
- 3154 0311 F3                  .byte   0xf3\r
- 3155 0312 01                  .uleb128 0x1\r
- 3156 0313 50                  .byte   0x50\r
- 3157 0314 9F                  .byte   0x9f\r
- 3158 0315 00000000            .4byte  0\r
- 3159 0319 00000000            .4byte  0\r
- 3160                  .LLST18:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 77\r
-\r
-\r
- 3161 031d 00000000            .4byte  .LVL33\r
- 3162 0321 0E000000            .4byte  .LVL36\r
- 3163 0325 0100                .2byte  0x1\r
- 3164 0327 51                  .byte   0x51\r
- 3165 0328 0E000000            .4byte  .LVL36\r
- 3166 032c 1C000000            .4byte  .LVL39\r
- 3167 0330 0400                .2byte  0x4\r
- 3168 0332 F3                  .byte   0xf3\r
- 3169 0333 01                  .uleb128 0x1\r
- 3170 0334 51                  .byte   0x51\r
- 3171 0335 9F                  .byte   0x9f\r
- 3172 0336 1C000000            .4byte  .LVL39\r
- 3173 033a 24000000            .4byte  .LFE9\r
- 3174 033e 0100                .2byte  0x1\r
- 3175 0340 51                  .byte   0x51\r
- 3176 0341 00000000            .4byte  0\r
- 3177 0345 00000000            .4byte  0\r
- 3178                  .LLST19:\r
- 3179 0349 0A000000            .4byte  .LVL35\r
- 3180 034d 12000000            .4byte  .LVL37\r
- 3181 0351 0600                .2byte  0x6\r
- 3182 0353 72                  .byte   0x72\r
- 3183 0354 00                  .sleb128 0\r
- 3184 0355 09                  .byte   0x9\r
- 3185 0356 F1                  .byte   0xf1\r
- 3186 0357 1A                  .byte   0x1a\r
- 3187 0358 9F                  .byte   0x9f\r
- 3188 0359 00000000            .4byte  0\r
- 3189 035d 00000000            .4byte  0\r
- 3190                  .LLST20:\r
- 3191 0361 00000000            .4byte  .LVL33\r
- 3192 0365 18000000            .4byte  .LVL38\r
- 3193 0369 0200                .2byte  0x2\r
- 3194 036b 31                  .byte   0x31\r
- 3195 036c 9F                  .byte   0x9f\r
- 3196 036d 18000000            .4byte  .LVL38\r
- 3197 0371 1C000000            .4byte  .LVL39\r
- 3198 0375 0200                .2byte  0x2\r
- 3199 0377 30                  .byte   0x30\r
- 3200 0378 9F                  .byte   0x9f\r
- 3201 0379 1C000000            .4byte  .LVL39\r
- 3202 037d 1E000000            .4byte  .LVL40\r
- 3203 0381 0200                .2byte  0x2\r
- 3204 0383 31                  .byte   0x31\r
- 3205 0384 9F                  .byte   0x9f\r
- 3206 0385 1E000000            .4byte  .LVL40\r
- 3207 0389 24000000            .4byte  .LFE9\r
- 3208 038d 0100                .2byte  0x1\r
- 3209 038f 50                  .byte   0x50\r
- 3210 0390 00000000            .4byte  0\r
- 3211 0394 00000000            .4byte  0\r
- 3212                  .LLST21:\r
- 3213 0398 00000000            .4byte  .LVL41\r
- 3214 039c 1A000000            .4byte  .LVL44\r
- 3215 03a0 0100                .2byte  0x1\r
- 3216 03a2 50                  .byte   0x50\r
- 3217 03a3 1A000000            .4byte  .LVL44\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 78\r
-\r
-\r
- 3218 03a7 2A000000            .4byte  .LVL49\r
- 3219 03ab 0400                .2byte  0x4\r
- 3220 03ad F3                  .byte   0xf3\r
- 3221 03ae 01                  .uleb128 0x1\r
- 3222 03af 50                  .byte   0x50\r
- 3223 03b0 9F                  .byte   0x9f\r
- 3224 03b1 2A000000            .4byte  .LVL49\r
- 3225 03b5 2C000000            .4byte  .LVL50\r
- 3226 03b9 0100                .2byte  0x1\r
- 3227 03bb 50                  .byte   0x50\r
- 3228 03bc 2C000000            .4byte  .LVL50\r
- 3229 03c0 2E000000            .4byte  .LFE10\r
- 3230 03c4 0400                .2byte  0x4\r
- 3231 03c6 F3                  .byte   0xf3\r
- 3232 03c7 01                  .uleb128 0x1\r
- 3233 03c8 50                  .byte   0x50\r
- 3234 03c9 9F                  .byte   0x9f\r
- 3235 03ca 00000000            .4byte  0\r
- 3236 03ce 00000000            .4byte  0\r
- 3237                  .LLST22:\r
- 3238 03d2 00000000            .4byte  .LVL41\r
- 3239 03d6 0C000000            .4byte  .LVL42\r
- 3240 03da 0100                .2byte  0x1\r
- 3241 03dc 51                  .byte   0x51\r
- 3242 03dd 00000000            .4byte  0\r
- 3243 03e1 00000000            .4byte  0\r
- 3244                  .LLST23:\r
- 3245 03e5 00000000            .4byte  .LVL41\r
- 3246 03e9 14000000            .4byte  .LVL43\r
- 3247 03ed 0100                .2byte  0x1\r
- 3248 03ef 52                  .byte   0x52\r
- 3249 03f0 00000000            .4byte  0\r
- 3250 03f4 00000000            .4byte  0\r
- 3251                  .LLST24:\r
- 3252 03f8 00000000            .4byte  .LVL41\r
- 3253 03fc 26000000            .4byte  .LVL47\r
- 3254 0400 0200                .2byte  0x2\r
- 3255 0402 31                  .byte   0x31\r
- 3256 0403 9F                  .byte   0x9f\r
- 3257 0404 26000000            .4byte  .LVL47\r
- 3258 0408 2A000000            .4byte  .LVL49\r
- 3259 040c 0200                .2byte  0x2\r
- 3260 040e 30                  .byte   0x30\r
- 3261 040f 9F                  .byte   0x9f\r
- 3262 0410 2A000000            .4byte  .LVL49\r
- 3263 0414 2C000000            .4byte  .LVL50\r
- 3264 0418 0200                .2byte  0x2\r
- 3265 041a 31                  .byte   0x31\r
- 3266 041b 9F                  .byte   0x9f\r
- 3267 041c 2C000000            .4byte  .LVL50\r
- 3268 0420 2E000000            .4byte  .LFE10\r
- 3269 0424 0100                .2byte  0x1\r
- 3270 0426 50                  .byte   0x50\r
- 3271 0427 00000000            .4byte  0\r
- 3272 042b 00000000            .4byte  0\r
- 3273                  .LLST25:\r
- 3274 042f 22000000            .4byte  .LVL45\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 79\r
-\r
-\r
- 3275 0433 24000000            .4byte  .LVL46\r
- 3276 0437 0300                .2byte  0x3\r
- 3277 0439 70                  .byte   0x70\r
- 3278 043a 04                  .sleb128 4\r
- 3279 043b 9F                  .byte   0x9f\r
- 3280 043c 24000000            .4byte  .LVL46\r
- 3281 0440 28000000            .4byte  .LVL48\r
- 3282 0444 0300                .2byte  0x3\r
- 3283 0446 70                  .byte   0x70\r
- 3284 0447 06                  .sleb128 6\r
- 3285 0448 9F                  .byte   0x9f\r
- 3286 0449 28000000            .4byte  .LVL48\r
- 3287 044d 2A000000            .4byte  .LVL49\r
- 3288 0451 0500                .2byte  0x5\r
- 3289 0453 73                  .byte   0x73\r
- 3290 0454 86EC01              .sleb128 30214\r
- 3291 0457 9F                  .byte   0x9f\r
- 3292 0458 00000000            .4byte  0\r
- 3293 045c 00000000            .4byte  0\r
- 3294                  .LLST26:\r
- 3295 0460 00000000            .4byte  .LVL51\r
- 3296 0464 08000000            .4byte  .LVL52\r
- 3297 0468 0100                .2byte  0x1\r
- 3298 046a 50                  .byte   0x50\r
- 3299 046b 08000000            .4byte  .LVL52\r
- 3300 046f 10000000            .4byte  .LVL54\r
- 3301 0473 0400                .2byte  0x4\r
- 3302 0475 F3                  .byte   0xf3\r
- 3303 0476 01                  .uleb128 0x1\r
- 3304 0477 50                  .byte   0x50\r
- 3305 0478 9F                  .byte   0x9f\r
- 3306 0479 10000000            .4byte  .LVL54\r
- 3307 047d 12000000            .4byte  .LVL55\r
- 3308 0481 0100                .2byte  0x1\r
- 3309 0483 50                  .byte   0x50\r
- 3310 0484 12000000            .4byte  .LVL55\r
- 3311 0488 18000000            .4byte  .LFE11\r
- 3312 048c 0400                .2byte  0x4\r
- 3313 048e F3                  .byte   0xf3\r
- 3314 048f 01                  .uleb128 0x1\r
- 3315 0490 50                  .byte   0x50\r
- 3316 0491 9F                  .byte   0x9f\r
- 3317 0492 00000000            .4byte  0\r
- 3318 0496 00000000            .4byte  0\r
- 3319                  .LLST27:\r
- 3320 049a 00000000            .4byte  .LVL51\r
- 3321 049e 0C000000            .4byte  .LVL53\r
- 3322 04a2 0200                .2byte  0x2\r
- 3323 04a4 31                  .byte   0x31\r
- 3324 04a5 9F                  .byte   0x9f\r
- 3325 04a6 0C000000            .4byte  .LVL53\r
- 3326 04aa 10000000            .4byte  .LVL54\r
- 3327 04ae 0200                .2byte  0x2\r
- 3328 04b0 30                  .byte   0x30\r
- 3329 04b1 9F                  .byte   0x9f\r
- 3330 04b2 10000000            .4byte  .LVL54\r
- 3331 04b6 12000000            .4byte  .LVL55\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 80\r
-\r
-\r
- 3332 04ba 0200                .2byte  0x2\r
- 3333 04bc 31                  .byte   0x31\r
- 3334 04bd 9F                  .byte   0x9f\r
- 3335 04be 12000000            .4byte  .LVL55\r
- 3336 04c2 18000000            .4byte  .LFE11\r
- 3337 04c6 0100                .2byte  0x1\r
- 3338 04c8 50                  .byte   0x50\r
- 3339 04c9 00000000            .4byte  0\r
- 3340 04cd 00000000            .4byte  0\r
- 3341                  .LLST28:\r
- 3342 04d1 00000000            .4byte  .LVL56\r
- 3343 04d5 08000000            .4byte  .LVL57\r
- 3344 04d9 0100                .2byte  0x1\r
- 3345 04db 50                  .byte   0x50\r
- 3346 04dc 08000000            .4byte  .LVL57\r
- 3347 04e0 1A000000            .4byte  .LVL60\r
- 3348 04e4 0400                .2byte  0x4\r
- 3349 04e6 F3                  .byte   0xf3\r
- 3350 04e7 01                  .uleb128 0x1\r
- 3351 04e8 50                  .byte   0x50\r
- 3352 04e9 9F                  .byte   0x9f\r
- 3353 04ea 1A000000            .4byte  .LVL60\r
- 3354 04ee 1C000000            .4byte  .LVL61\r
- 3355 04f2 0100                .2byte  0x1\r
- 3356 04f4 50                  .byte   0x50\r
- 3357 04f5 1C000000            .4byte  .LVL61\r
- 3358 04f9 24000000            .4byte  .LFE12\r
- 3359 04fd 0400                .2byte  0x4\r
- 3360 04ff F3                  .byte   0xf3\r
- 3361 0500 01                  .uleb128 0x1\r
- 3362 0501 50                  .byte   0x50\r
- 3363 0502 9F                  .byte   0x9f\r
- 3364 0503 00000000            .4byte  0\r
- 3365 0507 00000000            .4byte  0\r
- 3366                  .LLST29:\r
- 3367 050b 00000000            .4byte  .LVL56\r
- 3368 050f 10000000            .4byte  .LVL58\r
- 3369 0513 0100                .2byte  0x1\r
- 3370 0515 51                  .byte   0x51\r
- 3371 0516 10000000            .4byte  .LVL58\r
- 3372 051a 1A000000            .4byte  .LVL60\r
- 3373 051e 0400                .2byte  0x4\r
- 3374 0520 F3                  .byte   0xf3\r
- 3375 0521 01                  .uleb128 0x1\r
- 3376 0522 51                  .byte   0x51\r
- 3377 0523 9F                  .byte   0x9f\r
- 3378 0524 1A000000            .4byte  .LVL60\r
- 3379 0528 24000000            .4byte  .LFE12\r
- 3380 052c 0100                .2byte  0x1\r
- 3381 052e 51                  .byte   0x51\r
- 3382 052f 00000000            .4byte  0\r
- 3383 0533 00000000            .4byte  0\r
- 3384                  .LLST30:\r
- 3385 0537 00000000            .4byte  .LVL56\r
- 3386 053b 16000000            .4byte  .LVL59\r
- 3387 053f 0200                .2byte  0x2\r
- 3388 0541 31                  .byte   0x31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 81\r
-\r
-\r
- 3389 0542 9F                  .byte   0x9f\r
- 3390 0543 16000000            .4byte  .LVL59\r
- 3391 0547 1A000000            .4byte  .LVL60\r
- 3392 054b 0200                .2byte  0x2\r
- 3393 054d 30                  .byte   0x30\r
- 3394 054e 9F                  .byte   0x9f\r
- 3395 054f 1A000000            .4byte  .LVL60\r
- 3396 0553 1C000000            .4byte  .LVL61\r
- 3397 0557 0200                .2byte  0x2\r
- 3398 0559 31                  .byte   0x31\r
- 3399 055a 9F                  .byte   0x9f\r
- 3400 055b 1C000000            .4byte  .LVL61\r
- 3401 055f 24000000            .4byte  .LFE12\r
- 3402 0563 0100                .2byte  0x1\r
- 3403 0565 50                  .byte   0x50\r
- 3404 0566 00000000            .4byte  0\r
- 3405 056a 00000000            .4byte  0\r
- 3406                  .LLST31:\r
- 3407 056e 00000000            .4byte  .LVL62\r
- 3408 0572 08000000            .4byte  .LVL63\r
- 3409 0576 0100                .2byte  0x1\r
- 3410 0578 50                  .byte   0x50\r
- 3411 0579 08000000            .4byte  .LVL63\r
- 3412 057d 12000000            .4byte  .LVL65\r
- 3413 0581 0400                .2byte  0x4\r
- 3414 0583 F3                  .byte   0xf3\r
- 3415 0584 01                  .uleb128 0x1\r
- 3416 0585 50                  .byte   0x50\r
- 3417 0586 9F                  .byte   0x9f\r
- 3418 0587 12000000            .4byte  .LVL65\r
- 3419 058b 14000000            .4byte  .LVL66\r
- 3420 058f 0100                .2byte  0x1\r
- 3421 0591 50                  .byte   0x50\r
- 3422 0592 14000000            .4byte  .LVL66\r
- 3423 0596 1C000000            .4byte  .LFE13\r
- 3424 059a 0400                .2byte  0x4\r
- 3425 059c F3                  .byte   0xf3\r
- 3426 059d 01                  .uleb128 0x1\r
- 3427 059e 50                  .byte   0x50\r
- 3428 059f 9F                  .byte   0x9f\r
- 3429 05a0 00000000            .4byte  0\r
- 3430 05a4 00000000            .4byte  0\r
- 3431                  .LLST32:\r
- 3432 05a8 00000000            .4byte  .LVL62\r
- 3433 05ac 10000000            .4byte  .LVL64\r
- 3434 05b0 0300                .2byte  0x3\r
- 3435 05b2 08                  .byte   0x8\r
- 3436 05b3 FF                  .byte   0xff\r
- 3437 05b4 9F                  .byte   0x9f\r
- 3438 05b5 10000000            .4byte  .LVL64\r
- 3439 05b9 12000000            .4byte  .LVL65\r
- 3440 05bd 0100                .2byte  0x1\r
- 3441 05bf 50                  .byte   0x50\r
- 3442 05c0 12000000            .4byte  .LVL65\r
- 3443 05c4 14000000            .4byte  .LVL66\r
- 3444 05c8 0300                .2byte  0x3\r
- 3445 05ca 08                  .byte   0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 82\r
-\r
-\r
- 3446 05cb FF                  .byte   0xff\r
- 3447 05cc 9F                  .byte   0x9f\r
- 3448 05cd 14000000            .4byte  .LVL66\r
- 3449 05d1 1C000000            .4byte  .LFE13\r
- 3450 05d5 0100                .2byte  0x1\r
- 3451 05d7 50                  .byte   0x50\r
- 3452 05d8 00000000            .4byte  0\r
- 3453 05dc 00000000            .4byte  0\r
- 3454                  .LLST33:\r
- 3455 05e0 00000000            .4byte  .LFB14\r
- 3456 05e4 04000000            .4byte  .LCFI2\r
- 3457 05e8 0200                .2byte  0x2\r
- 3458 05ea 7D                  .byte   0x7d\r
- 3459 05eb 00                  .sleb128 0\r
- 3460 05ec 04000000            .4byte  .LCFI2\r
- 3461 05f0 30000000            .4byte  .LFE14\r
- 3462 05f4 0200                .2byte  0x2\r
- 3463 05f6 7D                  .byte   0x7d\r
- 3464 05f7 08                  .sleb128 8\r
- 3465 05f8 00000000            .4byte  0\r
- 3466 05fc 00000000            .4byte  0\r
- 3467                  .LLST34:\r
- 3468 0600 00000000            .4byte  .LVL67\r
- 3469 0604 1C000000            .4byte  .LVL69\r
- 3470 0608 0100                .2byte  0x1\r
- 3471 060a 50                  .byte   0x50\r
- 3472 060b 1C000000            .4byte  .LVL69\r
- 3473 060f 26000000            .4byte  .LVL70\r
- 3474 0613 0400                .2byte  0x4\r
- 3475 0615 F3                  .byte   0xf3\r
- 3476 0616 01                  .uleb128 0x1\r
- 3477 0617 50                  .byte   0x50\r
- 3478 0618 9F                  .byte   0x9f\r
- 3479 0619 26000000            .4byte  .LVL70\r
- 3480 061d 28000000            .4byte  .LVL71\r
- 3481 0621 0100                .2byte  0x1\r
- 3482 0623 50                  .byte   0x50\r
- 3483 0624 28000000            .4byte  .LVL71\r
- 3484 0628 30000000            .4byte  .LFE14\r
- 3485 062c 0400                .2byte  0x4\r
- 3486 062e F3                  .byte   0xf3\r
- 3487 062f 01                  .uleb128 0x1\r
- 3488 0630 50                  .byte   0x50\r
- 3489 0631 9F                  .byte   0x9f\r
- 3490 0632 00000000            .4byte  0\r
- 3491 0636 00000000            .4byte  0\r
- 3492                  .LLST35:\r
- 3493 063a 00000000            .4byte  .LVL67\r
- 3494 063e 1A000000            .4byte  .LVL68\r
- 3495 0642 0100                .2byte  0x1\r
- 3496 0644 51                  .byte   0x51\r
- 3497 0645 1A000000            .4byte  .LVL68\r
- 3498 0649 26000000            .4byte  .LVL70\r
- 3499 064d 0400                .2byte  0x4\r
- 3500 064f F3                  .byte   0xf3\r
- 3501 0650 01                  .uleb128 0x1\r
- 3502 0651 51                  .byte   0x51\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 83\r
-\r
-\r
- 3503 0652 9F                  .byte   0x9f\r
- 3504 0653 26000000            .4byte  .LVL70\r
- 3505 0657 30000000            .4byte  .LFE14\r
- 3506 065b 0100                .2byte  0x1\r
- 3507 065d 51                  .byte   0x51\r
- 3508 065e 00000000            .4byte  0\r
- 3509 0662 00000000            .4byte  0\r
- 3510                  .LLST36:\r
- 3511 0666 00000000            .4byte  .LFB15\r
- 3512 066a 04000000            .4byte  .LCFI3\r
- 3513 066e 0200                .2byte  0x2\r
- 3514 0670 7D                  .byte   0x7d\r
- 3515 0671 00                  .sleb128 0\r
- 3516 0672 04000000            .4byte  .LCFI3\r
- 3517 0676 40000000            .4byte  .LFE15\r
- 3518 067a 0200                .2byte  0x2\r
- 3519 067c 7D                  .byte   0x7d\r
- 3520 067d 08                  .sleb128 8\r
- 3521 067e 00000000            .4byte  0\r
- 3522 0682 00000000            .4byte  0\r
- 3523                  .LLST37:\r
- 3524 0686 00000000            .4byte  .LVL72\r
- 3525 068a 18000000            .4byte  .LVL75\r
- 3526 068e 0100                .2byte  0x1\r
- 3527 0690 50                  .byte   0x50\r
- 3528 0691 18000000            .4byte  .LVL75\r
- 3529 0695 3C000000            .4byte  .LVL78\r
- 3530 0699 0400                .2byte  0x4\r
- 3531 069b F3                  .byte   0xf3\r
- 3532 069c 01                  .uleb128 0x1\r
- 3533 069d 50                  .byte   0x50\r
- 3534 069e 9F                  .byte   0x9f\r
- 3535 069f 3C000000            .4byte  .LVL78\r
- 3536 06a3 3E000000            .4byte  .LVL79\r
- 3537 06a7 0100                .2byte  0x1\r
- 3538 06a9 50                  .byte   0x50\r
- 3539 06aa 3E000000            .4byte  .LVL79\r
- 3540 06ae 40000000            .4byte  .LFE15\r
- 3541 06b2 0400                .2byte  0x4\r
- 3542 06b4 F3                  .byte   0xf3\r
- 3543 06b5 01                  .uleb128 0x1\r
- 3544 06b6 50                  .byte   0x50\r
- 3545 06b7 9F                  .byte   0x9f\r
- 3546 06b8 00000000            .4byte  0\r
- 3547 06bc 00000000            .4byte  0\r
- 3548                  .LLST38:\r
- 3549 06c0 00000000            .4byte  .LVL72\r
- 3550 06c4 0A000000            .4byte  .LVL73\r
- 3551 06c8 0100                .2byte  0x1\r
- 3552 06ca 51                  .byte   0x51\r
- 3553 06cb 0A000000            .4byte  .LVL73\r
- 3554 06cf 3C000000            .4byte  .LVL78\r
- 3555 06d3 0400                .2byte  0x4\r
- 3556 06d5 F3                  .byte   0xf3\r
- 3557 06d6 01                  .uleb128 0x1\r
- 3558 06d7 51                  .byte   0x51\r
- 3559 06d8 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 84\r
-\r
-\r
- 3560 06d9 3C000000            .4byte  .LVL78\r
- 3561 06dd 40000000            .4byte  .LFE15\r
- 3562 06e1 0100                .2byte  0x1\r
- 3563 06e3 51                  .byte   0x51\r
- 3564 06e4 00000000            .4byte  0\r
- 3565 06e8 00000000            .4byte  0\r
- 3566                  .LLST39:\r
- 3567 06ec 00000000            .4byte  .LVL72\r
- 3568 06f0 10000000            .4byte  .LVL74\r
- 3569 06f4 0100                .2byte  0x1\r
- 3570 06f6 52                  .byte   0x52\r
- 3571 06f7 10000000            .4byte  .LVL74\r
- 3572 06fb 3C000000            .4byte  .LVL78\r
- 3573 06ff 0400                .2byte  0x4\r
- 3574 0701 F3                  .byte   0xf3\r
- 3575 0702 01                  .uleb128 0x1\r
- 3576 0703 52                  .byte   0x52\r
- 3577 0704 9F                  .byte   0x9f\r
- 3578 0705 3C000000            .4byte  .LVL78\r
- 3579 0709 40000000            .4byte  .LFE15\r
- 3580 070d 0100                .2byte  0x1\r
- 3581 070f 52                  .byte   0x52\r
- 3582 0710 00000000            .4byte  0\r
- 3583 0714 00000000            .4byte  0\r
- 3584                  .LLST40:\r
- 3585 0718 00000000            .4byte  .LVL72\r
- 3586 071c 1C000000            .4byte  .LVL76\r
- 3587 0720 0100                .2byte  0x1\r
- 3588 0722 53                  .byte   0x53\r
- 3589 0723 1C000000            .4byte  .LVL76\r
- 3590 0727 3C000000            .4byte  .LVL78\r
- 3591 072b 0400                .2byte  0x4\r
- 3592 072d F3                  .byte   0xf3\r
- 3593 072e 01                  .uleb128 0x1\r
- 3594 072f 53                  .byte   0x53\r
- 3595 0730 9F                  .byte   0x9f\r
- 3596 0731 3C000000            .4byte  .LVL78\r
- 3597 0735 40000000            .4byte  .LFE15\r
- 3598 0739 0100                .2byte  0x1\r
- 3599 073b 53                  .byte   0x53\r
- 3600 073c 00000000            .4byte  0\r
- 3601 0740 00000000            .4byte  0\r
- 3602                  .LLST41:\r
- 3603 0744 00000000            .4byte  .LVL72\r
- 3604 0748 3A000000            .4byte  .LVL77\r
- 3605 074c 0200                .2byte  0x2\r
- 3606 074e 31                  .byte   0x31\r
- 3607 074f 9F                  .byte   0x9f\r
- 3608 0750 3A000000            .4byte  .LVL77\r
- 3609 0754 3C000000            .4byte  .LVL78\r
- 3610 0758 0200                .2byte  0x2\r
- 3611 075a 30                  .byte   0x30\r
- 3612 075b 9F                  .byte   0x9f\r
- 3613 075c 3C000000            .4byte  .LVL78\r
- 3614 0760 3E000000            .4byte  .LVL79\r
- 3615 0764 0200                .2byte  0x2\r
- 3616 0766 31                  .byte   0x31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 85\r
-\r
-\r
- 3617 0767 9F                  .byte   0x9f\r
- 3618 0768 3E000000            .4byte  .LVL79\r
- 3619 076c 40000000            .4byte  .LFE15\r
- 3620 0770 0100                .2byte  0x1\r
- 3621 0772 50                  .byte   0x50\r
- 3622 0773 00000000            .4byte  0\r
- 3623 0777 00000000            .4byte  0\r
- 3624                  .LLST42:\r
- 3625 077b 00000000            .4byte  .LFB16\r
- 3626 077f 02000000            .4byte  .LCFI4\r
- 3627 0783 0200                .2byte  0x2\r
- 3628 0785 7D                  .byte   0x7d\r
- 3629 0786 00                  .sleb128 0\r
- 3630 0787 02000000            .4byte  .LCFI4\r
- 3631 078b 34000000            .4byte  .LFE16\r
- 3632 078f 0200                .2byte  0x2\r
- 3633 0791 7D                  .byte   0x7d\r
- 3634 0792 08                  .sleb128 8\r
- 3635 0793 00000000            .4byte  0\r
- 3636 0797 00000000            .4byte  0\r
- 3637                  .LLST43:\r
- 3638 079b 06000000            .4byte  .LVL81\r
- 3639 079f 29000000            .4byte  .LVL85-1\r
- 3640 07a3 0100                .2byte  0x1\r
- 3641 07a5 50                  .byte   0x50\r
- 3642 07a6 00000000            .4byte  0\r
- 3643 07aa 00000000            .4byte  0\r
- 3644                  .LLST44:\r
- 3645 07ae 00000000            .4byte  .LVL80\r
- 3646 07b2 10000000            .4byte  .LVL82\r
- 3647 07b6 0300                .2byte  0x3\r
- 3648 07b8 09                  .byte   0x9\r
- 3649 07b9 FF                  .byte   0xff\r
- 3650 07ba 9F                  .byte   0x9f\r
- 3651 07bb 10000000            .4byte  .LVL82\r
- 3652 07bf 24000000            .4byte  .LVL83\r
- 3653 07c3 0500                .2byte  0x5\r
- 3654 07c5 03                  .byte   0x3\r
- 3655 07c6 00000000            .4byte  CyDmaTdFreeIndex\r
- 3656 07ca 24000000            .4byte  .LVL83\r
- 3657 07ce 26000000            .4byte  .LVL84\r
- 3658 07d2 0300                .2byte  0x3\r
- 3659 07d4 09                  .byte   0x9\r
- 3660 07d5 FF                  .byte   0xff\r
- 3661 07d6 9F                  .byte   0x9f\r
- 3662 07d7 26000000            .4byte  .LVL84\r
- 3663 07db 34000000            .4byte  .LFE16\r
- 3664 07df 0100                .2byte  0x1\r
- 3665 07e1 54                  .byte   0x54\r
- 3666 07e2 00000000            .4byte  0\r
- 3667 07e6 00000000            .4byte  0\r
- 3668                  .LLST45:\r
- 3669 07ea 00000000            .4byte  .LFB17\r
- 3670 07ee 04000000            .4byte  .LCFI5\r
- 3671 07f2 0200                .2byte  0x2\r
- 3672 07f4 7D                  .byte   0x7d\r
- 3673 07f5 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 86\r
-\r
-\r
- 3674 07f6 04000000            .4byte  .LCFI5\r
- 3675 07fa 34000000            .4byte  .LFE17\r
- 3676 07fe 0200                .2byte  0x2\r
- 3677 0800 7D                  .byte   0x7d\r
- 3678 0801 08                  .sleb128 8\r
- 3679 0802 00000000            .4byte  0\r
- 3680 0806 00000000            .4byte  0\r
- 3681                  .LLST46:\r
- 3682 080a 00000000            .4byte  .LVL86\r
- 3683 080e 0B000000            .4byte  .LVL87-1\r
- 3684 0812 0100                .2byte  0x1\r
- 3685 0814 50                  .byte   0x50\r
- 3686 0815 0B000000            .4byte  .LVL87-1\r
- 3687 0819 2C000000            .4byte  .LVL88\r
- 3688 081d 0400                .2byte  0x4\r
- 3689 081f F3                  .byte   0xf3\r
- 3690 0820 01                  .uleb128 0x1\r
- 3691 0821 50                  .byte   0x50\r
- 3692 0822 9F                  .byte   0x9f\r
- 3693 0823 2C000000            .4byte  .LVL88\r
- 3694 0827 34000000            .4byte  .LFE17\r
- 3695 082b 0100                .2byte  0x1\r
- 3696 082d 50                  .byte   0x50\r
- 3697 082e 00000000            .4byte  0\r
- 3698 0832 00000000            .4byte  0\r
- 3699                  .LLST47:\r
- 3700 0836 0C000000            .4byte  .LVL87\r
- 3701 083a 2B000000            .4byte  .LVL88-1\r
- 3702 083e 0100                .2byte  0x1\r
- 3703 0840 50                  .byte   0x50\r
- 3704 0841 00000000            .4byte  0\r
- 3705 0845 00000000            .4byte  0\r
- 3706                  .LLST48:\r
- 3707 0849 00000000            .4byte  .LFB19\r
- 3708 084d 06000000            .4byte  .LCFI6\r
- 3709 0851 0200                .2byte  0x2\r
- 3710 0853 7D                  .byte   0x7d\r
- 3711 0854 00                  .sleb128 0\r
- 3712 0855 06000000            .4byte  .LCFI6\r
- 3713 0859 26000000            .4byte  .LFE19\r
- 3714 085d 0200                .2byte  0x2\r
- 3715 085f 7D                  .byte   0x7d\r
- 3716 0860 0C                  .sleb128 12\r
- 3717 0861 00000000            .4byte  0\r
- 3718 0865 00000000            .4byte  0\r
- 3719                  .LLST49:\r
- 3720 0869 00000000            .4byte  .LVL89\r
- 3721 086d 14000000            .4byte  .LVL90\r
- 3722 0871 0100                .2byte  0x1\r
- 3723 0873 50                  .byte   0x50\r
- 3724 0874 14000000            .4byte  .LVL90\r
- 3725 0878 22000000            .4byte  .LVL93\r
- 3726 087c 0400                .2byte  0x4\r
- 3727 087e F3                  .byte   0xf3\r
- 3728 087f 01                  .uleb128 0x1\r
- 3729 0880 50                  .byte   0x50\r
- 3730 0881 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 87\r
-\r
-\r
- 3731 0882 22000000            .4byte  .LVL93\r
- 3732 0886 24000000            .4byte  .LVL94\r
- 3733 088a 0100                .2byte  0x1\r
- 3734 088c 50                  .byte   0x50\r
- 3735 088d 24000000            .4byte  .LVL94\r
- 3736 0891 26000000            .4byte  .LFE19\r
- 3737 0895 0400                .2byte  0x4\r
- 3738 0897 F3                  .byte   0xf3\r
- 3739 0898 01                  .uleb128 0x1\r
- 3740 0899 50                  .byte   0x50\r
- 3741 089a 9F                  .byte   0x9f\r
- 3742 089b 00000000            .4byte  0\r
- 3743 089f 00000000            .4byte  0\r
- 3744                  .LLST50:\r
- 3745 08a3 00000000            .4byte  .LVL89\r
- 3746 08a7 20000000            .4byte  .LVL92\r
- 3747 08ab 0200                .2byte  0x2\r
- 3748 08ad 31                  .byte   0x31\r
- 3749 08ae 9F                  .byte   0x9f\r
- 3750 08af 20000000            .4byte  .LVL92\r
- 3751 08b3 22000000            .4byte  .LVL93\r
- 3752 08b7 0200                .2byte  0x2\r
- 3753 08b9 30                  .byte   0x30\r
- 3754 08ba 9F                  .byte   0x9f\r
- 3755 08bb 22000000            .4byte  .LVL93\r
- 3756 08bf 24000000            .4byte  .LVL94\r
- 3757 08c3 0200                .2byte  0x2\r
- 3758 08c5 31                  .byte   0x31\r
- 3759 08c6 9F                  .byte   0x9f\r
- 3760 08c7 24000000            .4byte  .LVL94\r
- 3761 08cb 26000000            .4byte  .LFE19\r
- 3762 08cf 0100                .2byte  0x1\r
- 3763 08d1 50                  .byte   0x50\r
- 3764 08d2 00000000            .4byte  0\r
- 3765 08d6 00000000            .4byte  0\r
- 3766                  .LLST51:\r
- 3767 08da 18000000            .4byte  .LVL91\r
- 3768 08de 22000000            .4byte  .LVL93\r
- 3769 08e2 0100                .2byte  0x1\r
- 3770 08e4 54                  .byte   0x54\r
- 3771 08e5 00000000            .4byte  0\r
- 3772 08e9 00000000            .4byte  0\r
- 3773                  .LLST52:\r
- 3774 08ed 00000000            .4byte  .LFB20\r
- 3775 08f1 06000000            .4byte  .LCFI7\r
- 3776 08f5 0200                .2byte  0x2\r
- 3777 08f7 7D                  .byte   0x7d\r
- 3778 08f8 00                  .sleb128 0\r
- 3779 08f9 06000000            .4byte  .LCFI7\r
- 3780 08fd 44000000            .4byte  .LFE20\r
- 3781 0901 0200                .2byte  0x2\r
- 3782 0903 7D                  .byte   0x7d\r
- 3783 0904 08                  .sleb128 8\r
- 3784 0905 00000000            .4byte  0\r
- 3785 0909 00000000            .4byte  0\r
- 3786                  .LLST53:\r
- 3787 090d 00000000            .4byte  .LVL95\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 88\r
-\r
-\r
- 3788 0911 30000000            .4byte  .LVL100\r
- 3789 0915 0100                .2byte  0x1\r
- 3790 0917 50                  .byte   0x50\r
- 3791 0918 30000000            .4byte  .LVL100\r
- 3792 091c 40000000            .4byte  .LVL102\r
- 3793 0920 0400                .2byte  0x4\r
- 3794 0922 F3                  .byte   0xf3\r
- 3795 0923 01                  .uleb128 0x1\r
- 3796 0924 50                  .byte   0x50\r
- 3797 0925 9F                  .byte   0x9f\r
- 3798 0926 40000000            .4byte  .LVL102\r
- 3799 092a 42000000            .4byte  .LVL103\r
- 3800 092e 0100                .2byte  0x1\r
- 3801 0930 50                  .byte   0x50\r
- 3802 0931 42000000            .4byte  .LVL103\r
- 3803 0935 44000000            .4byte  .LFE20\r
- 3804 0939 0400                .2byte  0x4\r
- 3805 093b F3                  .byte   0xf3\r
- 3806 093c 01                  .uleb128 0x1\r
- 3807 093d 50                  .byte   0x50\r
- 3808 093e 9F                  .byte   0x9f\r
- 3809 093f 00000000            .4byte  0\r
- 3810 0943 00000000            .4byte  0\r
- 3811                  .LLST54:\r
- 3812 0947 00000000            .4byte  .LVL95\r
- 3813 094b 20000000            .4byte  .LVL99\r
- 3814 094f 0100                .2byte  0x1\r
- 3815 0951 51                  .byte   0x51\r
- 3816 0952 20000000            .4byte  .LVL99\r
- 3817 0956 40000000            .4byte  .LVL102\r
- 3818 095a 0400                .2byte  0x4\r
- 3819 095c F3                  .byte   0xf3\r
- 3820 095d 01                  .uleb128 0x1\r
- 3821 095e 51                  .byte   0x51\r
- 3822 095f 9F                  .byte   0x9f\r
- 3823 0960 40000000            .4byte  .LVL102\r
- 3824 0964 44000000            .4byte  .LFE20\r
- 3825 0968 0100                .2byte  0x1\r
- 3826 096a 51                  .byte   0x51\r
- 3827 096b 00000000            .4byte  0\r
- 3828 096f 00000000            .4byte  0\r
- 3829                  .LLST55:\r
- 3830 0973 00000000            .4byte  .LVL95\r
- 3831 0977 34000000            .4byte  .LVL101\r
- 3832 097b 0100                .2byte  0x1\r
- 3833 097d 52                  .byte   0x52\r
- 3834 097e 34000000            .4byte  .LVL101\r
- 3835 0982 40000000            .4byte  .LVL102\r
- 3836 0986 0400                .2byte  0x4\r
- 3837 0988 F3                  .byte   0xf3\r
- 3838 0989 01                  .uleb128 0x1\r
- 3839 098a 52                  .byte   0x52\r
- 3840 098b 9F                  .byte   0x9f\r
- 3841 098c 40000000            .4byte  .LVL102\r
- 3842 0990 44000000            .4byte  .LFE20\r
- 3843 0994 0100                .2byte  0x1\r
- 3844 0996 52                  .byte   0x52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 89\r
-\r
-\r
- 3845 0997 00000000            .4byte  0\r
- 3846 099b 00000000            .4byte  0\r
- 3847                  .LLST56:\r
- 3848 099f 14000000            .4byte  .LVL96\r
- 3849 09a3 16000000            .4byte  .LVL97\r
- 3850 09a7 0100                .2byte  0x1\r
- 3851 09a9 54                  .byte   0x54\r
- 3852 09aa 16000000            .4byte  .LVL97\r
- 3853 09ae 1C000000            .4byte  .LVL98\r
- 3854 09b2 0B00                .2byte  0xb\r
- 3855 09b4 70                  .byte   0x70\r
- 3856 09b5 00                  .sleb128 0\r
- 3857 09b6 33                  .byte   0x33\r
- 3858 09b7 24                  .byte   0x24\r
- 3859 09b8 23                  .byte   0x23\r
- 3860 09b9 80F08180            .uleb128 0x40007800\r
- 3860      04\r
- 3861 09be 9F                  .byte   0x9f\r
- 3862 09bf 00000000            .4byte  0\r
- 3863 09c3 00000000            .4byte  0\r
- 3864                  .LLST57:\r
- 3865 09c7 00000000            .4byte  .LVL104\r
- 3866 09cb 06000000            .4byte  .LVL105\r
- 3867 09cf 0100                .2byte  0x1\r
- 3868 09d1 50                  .byte   0x50\r
- 3869 09d2 06000000            .4byte  .LVL105\r
- 3870 09d6 16000000            .4byte  .LVL110\r
- 3871 09da 0400                .2byte  0x4\r
- 3872 09dc F3                  .byte   0xf3\r
- 3873 09dd 01                  .uleb128 0x1\r
- 3874 09de 50                  .byte   0x50\r
- 3875 09df 9F                  .byte   0x9f\r
- 3876 09e0 16000000            .4byte  .LVL110\r
- 3877 09e4 18000000            .4byte  .LVL111\r
- 3878 09e8 0100                .2byte  0x1\r
- 3879 09ea 50                  .byte   0x50\r
- 3880 09eb 18000000            .4byte  .LVL111\r
- 3881 09ef 1A000000            .4byte  .LFE21\r
- 3882 09f3 0400                .2byte  0x4\r
- 3883 09f5 F3                  .byte   0xf3\r
- 3884 09f6 01                  .uleb128 0x1\r
- 3885 09f7 50                  .byte   0x50\r
- 3886 09f8 9F                  .byte   0x9f\r
- 3887 09f9 00000000            .4byte  0\r
- 3888 09fd 00000000            .4byte  0\r
- 3889                  .LLST58:\r
- 3890 0a01 00000000            .4byte  .LVL104\r
- 3891 0a05 12000000            .4byte  .LVL108\r
- 3892 0a09 0200                .2byte  0x2\r
- 3893 0a0b 31                  .byte   0x31\r
- 3894 0a0c 9F                  .byte   0x9f\r
- 3895 0a0d 12000000            .4byte  .LVL108\r
- 3896 0a11 16000000            .4byte  .LVL110\r
- 3897 0a15 0200                .2byte  0x2\r
- 3898 0a17 30                  .byte   0x30\r
- 3899 0a18 9F                  .byte   0x9f\r
- 3900 0a19 16000000            .4byte  .LVL110\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 90\r
-\r
-\r
- 3901 0a1d 18000000            .4byte  .LVL111\r
- 3902 0a21 0200                .2byte  0x2\r
- 3903 0a23 31                  .byte   0x31\r
- 3904 0a24 9F                  .byte   0x9f\r
- 3905 0a25 18000000            .4byte  .LVL111\r
- 3906 0a29 1A000000            .4byte  .LFE21\r
- 3907 0a2d 0100                .2byte  0x1\r
- 3908 0a2f 50                  .byte   0x50\r
- 3909 0a30 00000000            .4byte  0\r
- 3910 0a34 00000000            .4byte  0\r
- 3911                  .LLST59:\r
- 3912 0a38 0E000000            .4byte  .LVL106\r
- 3913 0a3c 10000000            .4byte  .LVL107\r
- 3914 0a40 0300                .2byte  0x3\r
- 3915 0a42 70                  .byte   0x70\r
- 3916 0a43 04                  .sleb128 4\r
- 3917 0a44 9F                  .byte   0x9f\r
- 3918 0a45 10000000            .4byte  .LVL107\r
- 3919 0a49 14000000            .4byte  .LVL109\r
- 3920 0a4d 0300                .2byte  0x3\r
- 3921 0a4f 70                  .byte   0x70\r
- 3922 0a50 06                  .sleb128 6\r
- 3923 0a51 9F                  .byte   0x9f\r
- 3924 0a52 14000000            .4byte  .LVL109\r
- 3925 0a56 16000000            .4byte  .LVL110\r
- 3926 0a5a 0500                .2byte  0x5\r
- 3927 0a5c 73                  .byte   0x73\r
- 3928 0a5d 86F001              .sleb128 30726\r
- 3929 0a60 9F                  .byte   0x9f\r
- 3930 0a61 00000000            .4byte  0\r
- 3931 0a65 00000000            .4byte  0\r
- 3932                  .LLST60:\r
- 3933 0a69 00000000            .4byte  .LVL112\r
- 3934 0a6d 18000000            .4byte  .LVL116\r
- 3935 0a71 0100                .2byte  0x1\r
- 3936 0a73 50                  .byte   0x50\r
- 3937 0a74 18000000            .4byte  .LVL116\r
- 3938 0a78 28000000            .4byte  .LVL120\r
- 3939 0a7c 0400                .2byte  0x4\r
- 3940 0a7e F3                  .byte   0xf3\r
- 3941 0a7f 01                  .uleb128 0x1\r
- 3942 0a80 50                  .byte   0x50\r
- 3943 0a81 9F                  .byte   0x9f\r
- 3944 0a82 28000000            .4byte  .LVL120\r
- 3945 0a86 2A000000            .4byte  .LVL121\r
- 3946 0a8a 0100                .2byte  0x1\r
- 3947 0a8c 50                  .byte   0x50\r
- 3948 0a8d 2A000000            .4byte  .LVL121\r
- 3949 0a91 2C000000            .4byte  .LFE22\r
- 3950 0a95 0400                .2byte  0x4\r
- 3951 0a97 F3                  .byte   0xf3\r
- 3952 0a98 01                  .uleb128 0x1\r
- 3953 0a99 50                  .byte   0x50\r
- 3954 0a9a 9F                  .byte   0x9f\r
- 3955 0a9b 00000000            .4byte  0\r
- 3956 0a9f 00000000            .4byte  0\r
- 3957                  .LLST61:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 91\r
-\r
-\r
- 3958 0aa3 00000000            .4byte  .LVL112\r
- 3959 0aa7 1C000000            .4byte  .LVL117\r
- 3960 0aab 0100                .2byte  0x1\r
- 3961 0aad 51                  .byte   0x51\r
- 3962 0aae 1C000000            .4byte  .LVL117\r
- 3963 0ab2 28000000            .4byte  .LVL120\r
- 3964 0ab6 0400                .2byte  0x4\r
- 3965 0ab8 F3                  .byte   0xf3\r
- 3966 0ab9 01                  .uleb128 0x1\r
- 3967 0aba 51                  .byte   0x51\r
- 3968 0abb 9F                  .byte   0x9f\r
- 3969 0abc 28000000            .4byte  .LVL120\r
- 3970 0ac0 2C000000            .4byte  .LFE22\r
- 3971 0ac4 0100                .2byte  0x1\r
- 3972 0ac6 51                  .byte   0x51\r
- 3973 0ac7 00000000            .4byte  0\r
- 3974 0acb 00000000            .4byte  0\r
- 3975                  .LLST62:\r
- 3976 0acf 10000000            .4byte  .LVL113\r
- 3977 0ad3 12000000            .4byte  .LVL114\r
- 3978 0ad7 0300                .2byte  0x3\r
- 3979 0ad9 73                  .byte   0x73\r
- 3980 0ada 04                  .sleb128 4\r
- 3981 0adb 9F                  .byte   0x9f\r
- 3982 0adc 12000000            .4byte  .LVL114\r
- 3983 0ae0 14000000            .4byte  .LVL115\r
- 3984 0ae4 0B00                .2byte  0xb\r
- 3985 0ae6 70                  .byte   0x70\r
- 3986 0ae7 00                  .sleb128 0\r
- 3987 0ae8 33                  .byte   0x33\r
- 3988 0ae9 24                  .byte   0x24\r
- 3989 0aea 23                  .byte   0x23\r
- 3990 0aeb 84F08180            .uleb128 0x40007804\r
- 3990      04\r
- 3991 0af0 9F                  .byte   0x9f\r
- 3992 0af1 20000000            .4byte  .LVL118\r
- 3993 0af5 24000000            .4byte  .LVL119\r
- 3994 0af9 0300                .2byte  0x3\r
- 3995 0afb 73                  .byte   0x73\r
- 3996 0afc 06                  .sleb128 6\r
- 3997 0afd 9F                  .byte   0x9f\r
- 3998 0afe 00000000            .4byte  0\r
- 3999 0b02 00000000            .4byte  0\r
- 4000                  .LLST63:\r
- 4001 0b06 00000000            .4byte  .LVL122\r
- 4002 0b0a 0C000000            .4byte  .LVL123\r
- 4003 0b0e 0100                .2byte  0x1\r
- 4004 0b10 50                  .byte   0x50\r
- 4005 0b11 0C000000            .4byte  .LVL123\r
- 4006 0b15 16000000            .4byte  .LVL125\r
- 4007 0b19 0400                .2byte  0x4\r
- 4008 0b1b F3                  .byte   0xf3\r
- 4009 0b1c 01                  .uleb128 0x1\r
- 4010 0b1d 50                  .byte   0x50\r
- 4011 0b1e 9F                  .byte   0x9f\r
- 4012 0b1f 16000000            .4byte  .LVL125\r
- 4013 0b23 18000000            .4byte  .LVL126\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 92\r
-\r
-\r
- 4014 0b27 0100                .2byte  0x1\r
- 4015 0b29 50                  .byte   0x50\r
- 4016 0b2a 18000000            .4byte  .LVL126\r
- 4017 0b2e 20000000            .4byte  .LVL128\r
- 4018 0b32 0400                .2byte  0x4\r
- 4019 0b34 F3                  .byte   0xf3\r
- 4020 0b35 01                  .uleb128 0x1\r
- 4021 0b36 50                  .byte   0x50\r
- 4022 0b37 9F                  .byte   0x9f\r
- 4023 0b38 20000000            .4byte  .LVL128\r
- 4024 0b3c 22000000            .4byte  .LVL129\r
- 4025 0b40 0100                .2byte  0x1\r
- 4026 0b42 50                  .byte   0x50\r
- 4027 0b43 22000000            .4byte  .LVL129\r
- 4028 0b47 28000000            .4byte  .LFE23\r
- 4029 0b4b 0400                .2byte  0x4\r
- 4030 0b4d F3                  .byte   0xf3\r
- 4031 0b4e 01                  .uleb128 0x1\r
- 4032 0b4f 50                  .byte   0x50\r
- 4033 0b50 9F                  .byte   0x9f\r
- 4034 0b51 00000000            .4byte  0\r
- 4035 0b55 00000000            .4byte  0\r
- 4036                  .LLST64:\r
- 4037 0b59 00000000            .4byte  .LVL122\r
- 4038 0b5d 10000000            .4byte  .LVL124\r
- 4039 0b61 0100                .2byte  0x1\r
- 4040 0b63 51                  .byte   0x51\r
- 4041 0b64 10000000            .4byte  .LVL124\r
- 4042 0b68 16000000            .4byte  .LVL125\r
- 4043 0b6c 0400                .2byte  0x4\r
- 4044 0b6e F3                  .byte   0xf3\r
- 4045 0b6f 01                  .uleb128 0x1\r
- 4046 0b70 51                  .byte   0x51\r
- 4047 0b71 9F                  .byte   0x9f\r
- 4048 0b72 16000000            .4byte  .LVL125\r
- 4049 0b76 1C000000            .4byte  .LVL127\r
- 4050 0b7a 0100                .2byte  0x1\r
- 4051 0b7c 51                  .byte   0x51\r
- 4052 0b7d 1C000000            .4byte  .LVL127\r
- 4053 0b81 20000000            .4byte  .LVL128\r
- 4054 0b85 0400                .2byte  0x4\r
- 4055 0b87 F3                  .byte   0xf3\r
- 4056 0b88 01                  .uleb128 0x1\r
- 4057 0b89 51                  .byte   0x51\r
- 4058 0b8a 9F                  .byte   0x9f\r
- 4059 0b8b 20000000            .4byte  .LVL128\r
- 4060 0b8f 28000000            .4byte  .LFE23\r
- 4061 0b93 0100                .2byte  0x1\r
- 4062 0b95 51                  .byte   0x51\r
- 4063 0b96 00000000            .4byte  0\r
- 4064 0b9a 00000000            .4byte  0\r
- 4065                  .LLST65:\r
- 4066 0b9e 00000000            .4byte  .LVL122\r
- 4067 0ba2 22000000            .4byte  .LVL129\r
- 4068 0ba6 0200                .2byte  0x2\r
- 4069 0ba8 31                  .byte   0x31\r
- 4070 0ba9 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 93\r
-\r
-\r
- 4071 0baa 22000000            .4byte  .LVL129\r
- 4072 0bae 28000000            .4byte  .LFE23\r
- 4073 0bb2 0100                .2byte  0x1\r
- 4074 0bb4 50                  .byte   0x50\r
- 4075 0bb5 00000000            .4byte  0\r
- 4076 0bb9 00000000            .4byte  0\r
- 4077                          .section        .debug_aranges,"",%progbits\r
- 4078 0000 D4000000            .4byte  0xd4\r
- 4079 0004 0200                .2byte  0x2\r
- 4080 0006 00000000            .4byte  .Ldebug_info0\r
- 4081 000a 04                  .byte   0x4\r
- 4082 000b 00                  .byte   0\r
- 4083 000c 0000                .2byte  0\r
- 4084 000e 0000                .2byte  0\r
- 4085 0010 00000000            .4byte  .LFB0\r
- 4086 0014 30000000            .4byte  .LFE0-.LFB0\r
- 4087 0018 00000000            .4byte  .LFB1\r
- 4088 001c 10000000            .4byte  .LFE1-.LFB1\r
- 4089 0020 00000000            .4byte  .LFB2\r
- 4090 0024 10000000            .4byte  .LFE2-.LFB2\r
- 4091 0028 00000000            .4byte  .LFB3\r
- 4092 002c 0C000000            .4byte  .LFE3-.LFB3\r
- 4093 0030 00000000            .4byte  .LFB4\r
- 4094 0034 34000000            .4byte  .LFE4-.LFB4\r
- 4095 0038 00000000            .4byte  .LFB5\r
- 4096 003c 30000000            .4byte  .LFE5-.LFB5\r
- 4097 0040 00000000            .4byte  .LFB6\r
- 4098 0044 34000000            .4byte  .LFE6-.LFB6\r
- 4099 0048 00000000            .4byte  .LFB7\r
- 4100 004c 24000000            .4byte  .LFE7-.LFB7\r
- 4101 0050 00000000            .4byte  .LFB8\r
- 4102 0054 28000000            .4byte  .LFE8-.LFB8\r
- 4103 0058 00000000            .4byte  .LFB9\r
- 4104 005c 24000000            .4byte  .LFE9-.LFB9\r
- 4105 0060 00000000            .4byte  .LFB10\r
- 4106 0064 2E000000            .4byte  .LFE10-.LFB10\r
- 4107 0068 00000000            .4byte  .LFB11\r
- 4108 006c 18000000            .4byte  .LFE11-.LFB11\r
- 4109 0070 00000000            .4byte  .LFB12\r
- 4110 0074 24000000            .4byte  .LFE12-.LFB12\r
- 4111 0078 00000000            .4byte  .LFB13\r
- 4112 007c 1C000000            .4byte  .LFE13-.LFB13\r
- 4113 0080 00000000            .4byte  .LFB14\r
- 4114 0084 30000000            .4byte  .LFE14-.LFB14\r
- 4115 0088 00000000            .4byte  .LFB15\r
- 4116 008c 40000000            .4byte  .LFE15-.LFB15\r
- 4117 0090 00000000            .4byte  .LFB16\r
- 4118 0094 34000000            .4byte  .LFE16-.LFB16\r
- 4119 0098 00000000            .4byte  .LFB17\r
- 4120 009c 34000000            .4byte  .LFE17-.LFB17\r
- 4121 00a0 00000000            .4byte  .LFB18\r
- 4122 00a4 10000000            .4byte  .LFE18-.LFB18\r
- 4123 00a8 00000000            .4byte  .LFB19\r
- 4124 00ac 26000000            .4byte  .LFE19-.LFB19\r
- 4125 00b0 00000000            .4byte  .LFB20\r
- 4126 00b4 44000000            .4byte  .LFE20-.LFB20\r
- 4127 00b8 00000000            .4byte  .LFB21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 94\r
-\r
-\r
- 4128 00bc 1A000000            .4byte  .LFE21-.LFB21\r
- 4129 00c0 00000000            .4byte  .LFB22\r
- 4130 00c4 2C000000            .4byte  .LFE22-.LFB22\r
- 4131 00c8 00000000            .4byte  .LFB23\r
- 4132 00cc 28000000            .4byte  .LFE23-.LFB23\r
- 4133 00d0 00000000            .4byte  0\r
- 4134 00d4 00000000            .4byte  0\r
- 4135                          .section        .debug_ranges,"",%progbits\r
- 4136                  .Ldebug_ranges0:\r
- 4137 0000 08000000            .4byte  .LBB2\r
- 4138 0004 24000000            .4byte  .LBE2\r
- 4139 0008 28000000            .4byte  .LBB3\r
- 4140 000c 34000000            .4byte  .LBE3\r
- 4141 0010 00000000            .4byte  0\r
- 4142 0014 00000000            .4byte  0\r
- 4143 0018 00000000            .4byte  .LFB0\r
- 4144 001c 30000000            .4byte  .LFE0\r
- 4145 0020 00000000            .4byte  .LFB1\r
- 4146 0024 10000000            .4byte  .LFE1\r
- 4147 0028 00000000            .4byte  .LFB2\r
- 4148 002c 10000000            .4byte  .LFE2\r
- 4149 0030 00000000            .4byte  .LFB3\r
- 4150 0034 0C000000            .4byte  .LFE3\r
- 4151 0038 00000000            .4byte  .LFB4\r
- 4152 003c 34000000            .4byte  .LFE4\r
- 4153 0040 00000000            .4byte  .LFB5\r
- 4154 0044 30000000            .4byte  .LFE5\r
- 4155 0048 00000000            .4byte  .LFB6\r
- 4156 004c 34000000            .4byte  .LFE6\r
- 4157 0050 00000000            .4byte  .LFB7\r
- 4158 0054 24000000            .4byte  .LFE7\r
- 4159 0058 00000000            .4byte  .LFB8\r
- 4160 005c 28000000            .4byte  .LFE8\r
- 4161 0060 00000000            .4byte  .LFB9\r
- 4162 0064 24000000            .4byte  .LFE9\r
- 4163 0068 00000000            .4byte  .LFB10\r
- 4164 006c 2E000000            .4byte  .LFE10\r
- 4165 0070 00000000            .4byte  .LFB11\r
- 4166 0074 18000000            .4byte  .LFE11\r
- 4167 0078 00000000            .4byte  .LFB12\r
- 4168 007c 24000000            .4byte  .LFE12\r
- 4169 0080 00000000            .4byte  .LFB13\r
- 4170 0084 1C000000            .4byte  .LFE13\r
- 4171 0088 00000000            .4byte  .LFB14\r
- 4172 008c 30000000            .4byte  .LFE14\r
- 4173 0090 00000000            .4byte  .LFB15\r
- 4174 0094 40000000            .4byte  .LFE15\r
- 4175 0098 00000000            .4byte  .LFB16\r
- 4176 009c 34000000            .4byte  .LFE16\r
- 4177 00a0 00000000            .4byte  .LFB17\r
- 4178 00a4 34000000            .4byte  .LFE17\r
- 4179 00a8 00000000            .4byte  .LFB18\r
- 4180 00ac 10000000            .4byte  .LFE18\r
- 4181 00b0 00000000            .4byte  .LFB19\r
- 4182 00b4 26000000            .4byte  .LFE19\r
- 4183 00b8 00000000            .4byte  .LFB20\r
- 4184 00bc 44000000            .4byte  .LFE20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 95\r
-\r
-\r
- 4185 00c0 00000000            .4byte  .LFB21\r
- 4186 00c4 1A000000            .4byte  .LFE21\r
- 4187 00c8 00000000            .4byte  .LFB22\r
- 4188 00cc 2C000000            .4byte  .LFE22\r
- 4189 00d0 00000000            .4byte  .LFB23\r
- 4190 00d4 28000000            .4byte  .LFE23\r
- 4191 00d8 00000000            .4byte  0\r
- 4192 00dc 00000000            .4byte  0\r
- 4193                          .section        .debug_line,"",%progbits\r
- 4194                  .Ldebug_line0:\r
- 4195 0000 E9020000            .section        .debug_str,"MS",%progbits,1\r
- 4195      02005C00 \r
- 4195      00000201 \r
- 4195      FB0E0D00 \r
- 4195      01010101 \r
- 4196                  .LASF10:\r
- 4197 0000 75696E74            .ascii  "uint16\000"\r
- 4197      313600\r
- 4198                  .LASF89:\r
- 4199 0007 43794578            .ascii  "CyExitCriticalSection\000"\r
- 4199      69744372 \r
- 4199      69746963 \r
- 4199      616C5365 \r
- 4199      6374696F \r
- 4200                  .LASF28:\r
- 4201 001d 646D6163            .ascii  "dmac_cfgmem\000"\r
- 4201      5F636667 \r
- 4201      6D656D00 \r
- 4202                  .LASF34:\r
- 4203 0029 4379446D            .ascii  "CyDmacErrorAddress\000"\r
- 4203      61634572 \r
- 4203      726F7241 \r
- 4203      64647265 \r
- 4203      737300\r
- 4204                  .LASF68:\r
- 4205 003c 4379446D            .ascii  "CyDmaTdAllocate\000"\r
- 4205      61546441 \r
- 4205      6C6C6F63 \r
- 4205      61746500 \r
- 4206                  .LASF70:\r
- 4207 004c 4379446D            .ascii  "CyDmaTdFree\000"\r
- 4207      61546446 \r
- 4207      72656500 \r
- 4208                  .LASF43:\r
- 4209 0058 4379446D            .ascii  "CyDmaChEnable\000"\r
- 4209      61436845 \r
- 4209      6E61626C \r
- 4209      6500\r
- 4210                  .LASF72:\r
- 4211 0066 4379446D            .ascii  "CyDmaTdFreeCount\000"\r
- 4211      61546446 \r
- 4211      72656543 \r
- 4211      6F756E74 \r
- 4211      00\r
- 4212                  .LASF31:\r
- 4213 0077 4379446D            .ascii  "CyDmacConfigure\000"\r
- 4213      6163436F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 96\r
-\r
-\r
- 4213      6E666967 \r
- 4213      75726500 \r
- 4214                  .LASF7:\r
- 4215 0087 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 4215      206C6F6E \r
- 4215      6720756E \r
- 4215      7369676E \r
- 4215      65642069 \r
- 4216                  .LASF73:\r
- 4217 009e 4379446D            .ascii  "CyDmaTdSetConfiguration\000"\r
- 4217      61546453 \r
- 4217      6574436F \r
- 4217      6E666967 \r
- 4217      75726174 \r
- 4218                  .LASF71:\r
- 4219 00b6 74644861            .ascii  "tdHandle\000"\r
- 4219      6E646C65 \r
- 4219      00\r
- 4220                  .LASF6:\r
- 4221 00bf 6C6F6E67            .ascii  "long long int\000"\r
- 4221      206C6F6E \r
- 4221      6720696E \r
- 4221      7400\r
- 4222                  .LASF0:\r
- 4223 00cd 7369676E            .ascii  "signed char\000"\r
- 4223      65642063 \r
- 4223      68617200 \r
- 4224                  .LASF36:\r
- 4225 00d9 696E7465            .ascii  "interruptState\000"\r
- 4225      72727570 \r
- 4225      74537461 \r
- 4225      746500\r
- 4226                  .LASF81:\r
- 4227 00e8 656E6162            .ascii  "enableRR\000"\r
- 4227      6C655252 \r
- 4227      00\r
- 4228                  .LASF29:\r
- 4229 00f1 646D6163            .ascii  "dmac_tdmem_struct\000"\r
- 4229      5F74646D \r
- 4229      656D5F73 \r
- 4229      74727563 \r
- 4229      7400\r
- 4230                  .LASF61:\r
- 4231 0103 73746174            .ascii  "state\000"\r
- 4231      6500\r
- 4232                  .LASF4:\r
- 4233 0109 6C6F6E67            .ascii  "long int\000"\r
- 4233      20696E74 \r
- 4233      00\r
- 4234                  .LASF65:\r
- 4235 0112 7464446F            .ascii  "tdDone0\000"\r
- 4235      6E653000 \r
- 4236                  .LASF66:\r
- 4237 011a 7464446F            .ascii  "tdDone1\000"\r
- 4237      6E653100 \r
- 4238                  .LASF16:\r
- 4239 0122 72656731            .ascii  "reg16\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 97\r
-\r
-\r
- 4239      3600\r
- 4240                  .LASF9:\r
- 4241 0128 75696E74            .ascii  "uint8\000"\r
- 4241      3800\r
- 4242                  .LASF13:\r
- 4243 012e 646F7562            .ascii  "double\000"\r
- 4243      6C6500\r
- 4244                  .LASF84:\r
- 4245 0135 4379446D            .ascii  "CyDmaChannels\000"\r
- 4245      61436861 \r
- 4245      6E6E656C \r
- 4245      7300\r
- 4246                  .LASF11:\r
- 4247 0143 75696E74            .ascii  "uint32\000"\r
- 4247      333200\r
- 4248                  .LASF20:\r
- 4249 014a 61637469            .ascii  "action\000"\r
- 4249      6F6E00\r
- 4250                  .LASF22:\r
- 4251 0151 72657365            .ascii  "reserved\000"\r
- 4251      72766564 \r
- 4251      00\r
- 4252                  .LASF49:\r
- 4253 015a 76616C75            .ascii  "value\000"\r
- 4253      6500\r
- 4254                  .LASF52:\r
- 4255 0160 64657374            .ascii  "destination\000"\r
- 4255      696E6174 \r
- 4255      696F6E00 \r
- 4256                  .LASF47:\r
- 4257 016c 4379446D            .ascii  "CyDmaChPriority\000"\r
- 4257      61436850 \r
- 4257      72696F72 \r
- 4257      69747900 \r
- 4258                  .LASF8:\r
- 4259 017c 756E7369            .ascii  "unsigned int\000"\r
- 4259      676E6564 \r
- 4259      20696E74 \r
- 4259      00\r
- 4260                  .LASF5:\r
- 4261 0189 6C6F6E67            .ascii  "long unsigned int\000"\r
- 4261      20756E73 \r
- 4261      69676E65 \r
- 4261      6420696E \r
- 4261      7400\r
- 4262                  .LASF25:\r
- 4263 019b 646D6163            .ascii  "dmac_cfgmem_struct\000"\r
- 4263      5F636667 \r
- 4263      6D656D5F \r
- 4263      73747275 \r
- 4263      637400\r
- 4264                  .LASF86:\r
- 4265 01ae 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\CyDmac.c\000"\r
- 4265      6E657261 \r
- 4265      7465645F \r
- 4265      536F7572 \r
- 4265      63655C50 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 98\r
-\r
-\r
- 4266                  .LASF50:\r
- 4267 01d0 4379446D            .ascii  "CyDmaChSetExtendedAddress\000"\r
- 4267      61436853 \r
- 4267      65744578 \r
- 4267      74656E64 \r
- 4267      65644164 \r
- 4268                  .LASF82:\r
- 4269 01ea 4379446D            .ascii  "CyDmaTdCurrentNumber\000"\r
- 4269      61546443 \r
- 4269      75727265 \r
- 4269      6E744E75 \r
- 4269      6D626572 \r
- 4270                  .LASF19:\r
- 4271 01ff 62617369            .ascii  "basic_cfg\000"\r
- 4271      635F6366 \r
- 4271      6700\r
- 4272                  .LASF3:\r
- 4273 0209 73686F72            .ascii  "short unsigned int\000"\r
- 4273      7420756E \r
- 4273      7369676E \r
- 4273      65642069 \r
- 4273      6E7400\r
- 4274                  .LASF76:\r
- 4275 021c 636F6E66            .ascii  "configuration\000"\r
- 4275      69677572 \r
- 4275      6174696F \r
- 4275      6E00\r
- 4276                  .LASF33:\r
- 4277 022a 4379446D            .ascii  "CyDmacError\000"\r
- 4277      61634572 \r
- 4277      726F7200 \r
- 4278                  .LASF88:\r
- 4279 0236 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 4279      74657243 \r
- 4279      72697469 \r
- 4279      63616C53 \r
- 4279      65637469 \r
- 4280                  .LASF32:\r
- 4281 024d 4379446D            .ascii  "CyDmacClearError\000"\r
- 4281      6163436C \r
- 4281      65617245 \r
- 4281      72726F72 \r
- 4281      00\r
- 4282                  .LASF87:\r
- 4283 025e 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 4283      43534932 \r
- 4283      53445C73 \r
- 4283      6F667477 \r
- 4283      6172655C \r
- 4284 028d 6E00                .ascii  "n\000"\r
- 4285                  .LASF17:\r
- 4286 028f 72656733            .ascii  "reg32\000"\r
- 4286      3200\r
- 4287                  .LASF51:\r
- 4288 0295 736F7572            .ascii  "source\000"\r
- 4288      636500\r
- 4289                  .LASF21:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 99\r
-\r
-\r
- 4290 029c 62617369            .ascii  "basic_status\000"\r
- 4290      635F7374 \r
- 4290      61747573 \r
- 4290      00\r
- 4291                  .LASF18:\r
- 4292 02a9 73697A65            .ascii  "sizetype\000"\r
- 4292      74797065 \r
- 4292      00\r
- 4293                  .LASF80:\r
- 4294 02b2 4379446D            .ascii  "CyDmaChRoundRobin\000"\r
- 4294      61436852 \r
- 4294      6F756E64 \r
- 4294      526F6269 \r
- 4294      6E00\r
- 4295                  .LASF78:\r
- 4296 02c4 4379446D            .ascii  "CyDmaTdSetAddress\000"\r
- 4296      61546453 \r
- 4296      65744164 \r
- 4296      64726573 \r
- 4296      7300\r
- 4297                  .LASF35:\r
- 4298 02d6 646D6149            .ascii  "dmaIndex\000"\r
- 4298      6E646578 \r
- 4298      00\r
- 4299                  .LASF46:\r
- 4300 02df 4379446D            .ascii  "CyDmaClearPendingDrq\000"\r
- 4300      61436C65 \r
- 4300      61725065 \r
- 4300      6E64696E \r
- 4300      67447271 \r
- 4301                  .LASF63:\r
- 4302 02f4 62757273            .ascii  "burstCount\000"\r
- 4302      74436F75 \r
- 4302      6E7400\r
- 4303                  .LASF12:\r
- 4304 02ff 666C6F61            .ascii  "float\000"\r
- 4304      7400\r
- 4305                  .LASF40:\r
- 4306 0305 6572726F            .ascii  "error\000"\r
- 4306      7200\r
- 4307                  .LASF85:\r
- 4308 030b 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 4308      4320342E \r
- 4308      372E3320 \r
- 4308      32303133 \r
- 4308      30333132 \r
- 4309 033e 616E6368            .ascii  "anch revision 196615]\000"\r
- 4309      20726576 \r
- 4309      6973696F \r
- 4309      6E203139 \r
- 4309      36363135 \r
- 4310                  .LASF77:\r
- 4311 0354 4379446D            .ascii  "CyDmaTdGetConfiguration\000"\r
- 4311      61546447 \r
- 4311      6574436F \r
- 4311      6E666967 \r
- 4311      75726174 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 100\r
-\r
-\r
- 4312                  .LASF75:\r
- 4313 036c 6E657874            .ascii  "nextTd\000"\r
- 4313      546400\r
- 4314                  .LASF56:\r
- 4315 0373 4379446D            .ascii  "CyDmaChSetRequest\000"\r
- 4315      61436853 \r
- 4315      65745265 \r
- 4315      71756573 \r
- 4315      7400\r
- 4316                  .LASF24:\r
- 4317 0385 646D6163            .ascii  "dmac_ch_struct\000"\r
- 4317      5F63685F \r
- 4317      73747275 \r
- 4317      637400\r
- 4318                  .LASF1:\r
- 4319 0394 756E7369            .ascii  "unsigned char\000"\r
- 4319      676E6564 \r
- 4319      20636861 \r
- 4319      7200\r
- 4320                  .LASF2:\r
- 4321 03a2 73686F72            .ascii  "short int\000"\r
- 4321      7420696E \r
- 4321      7400\r
- 4322                  .LASF67:\r
- 4323 03ac 74645374            .ascii  "tdStop\000"\r
- 4323      6F7000\r
- 4324                  .LASF41:\r
- 4325 03b3 63684861            .ascii  "chHandle\000"\r
- 4325      6E646C65 \r
- 4325      00\r
- 4326                  .LASF37:\r
- 4327 03bc 6368616E            .ascii  "channel\000"\r
- 4327      6E656C00 \r
- 4328                  .LASF59:\r
- 4329 03c4 4379446D            .ascii  "CyDmaChStatus\000"\r
- 4329      61436853 \r
- 4329      74617475 \r
- 4329      7300\r
- 4330                  .LASF45:\r
- 4331 03d2 4379446D            .ascii  "CyDmaChDisable\000"\r
- 4331      61436844 \r
- 4331      69736162 \r
- 4331      6C6500\r
- 4332                  .LASF38:\r
- 4333 03e1 4379446D            .ascii  "CyDmaChAlloc\000"\r
- 4333      61436841 \r
- 4333      6C6C6F63 \r
- 4333      00\r
- 4334                  .LASF60:\r
- 4335 03ee 63757272            .ascii  "currentTd\000"\r
- 4335      656E7454 \r
- 4335      6400\r
- 4336                  .LASF14:\r
- 4337 03f8 63686172            .ascii  "char\000"\r
- 4337      00\r
- 4338                  .LASF48:\r
- 4339 03fd 7072696F            .ascii  "priority\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 101\r
-\r
-\r
- 4339      72697479 \r
- 4339      00\r
- 4340                  .LASF79:\r
- 4341 0406 4379446D            .ascii  "CyDmaTdGetAddress\000"\r
- 4341      61546447 \r
- 4341      65744164 \r
- 4341      64726573 \r
- 4341      7300\r
- 4342                  .LASF23:\r
- 4343 0418 646D6163            .ascii  "dmac_ch\000"\r
- 4343      5F636800 \r
- 4344                  .LASF64:\r
- 4345 0420 72657175            .ascii  "requestPerBurst\000"\r
- 4345      65737450 \r
- 4345      65724275 \r
- 4345      72737400 \r
- 4346                  .LASF44:\r
- 4347 0430 70726573            .ascii  "preserveTds\000"\r
- 4347      65727665 \r
- 4347      54647300 \r
- 4348                  .LASF53:\r
- 4349 043c 636F6E76            .ascii  "convert\000"\r
- 4349      65727400 \r
- 4350                  .LASF30:\r
- 4351 0444 646D6163            .ascii  "dmac_tdmem\000"\r
- 4351      5F74646D \r
- 4351      656D00\r
- 4352                  .LASF55:\r
- 4353 044f 73746172            .ascii  "startTd\000"\r
- 4353      74546400 \r
- 4354                  .LASF83:\r
- 4355 0457 4379446D            .ascii  "CyDmaTdFreeIndex\000"\r
- 4355      61546446 \r
- 4355      72656549 \r
- 4355      6E646578 \r
- 4355      00\r
- 4356                  .LASF74:\r
- 4357 0468 7472616E            .ascii  "transferCount\000"\r
- 4357      73666572 \r
- 4357      436F756E \r
- 4357      7400\r
- 4358                  .LASF26:\r
- 4359 0476 43464730            .ascii  "CFG0\000"\r
- 4359      00\r
- 4360                  .LASF27:\r
- 4361 047b 43464731            .ascii  "CFG1\000"\r
- 4361      00\r
- 4362                  .LASF42:\r
- 4363 0480 73746174            .ascii  "status\000"\r
- 4363      757300\r
- 4364                  .LASF58:\r
- 4365 0487 4379446D            .ascii  "CyDmaChGetRequest\000"\r
- 4365      61436847 \r
- 4365      65745265 \r
- 4365      71756573 \r
- 4365      7400\r
- 4366                  .LASF57:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc1lqS7m.s                      page 102\r
-\r
-\r
- 4367 0499 72657175            .ascii  "request\000"\r
- 4367      65737400 \r
- 4368                  .LASF54:\r
- 4369 04a1 4379446D            .ascii  "CyDmaChSetInitialTd\000"\r
- 4369      61436853 \r
- 4369      6574496E \r
- 4369      69746961 \r
- 4369      6C546400 \r
- 4370                  .LASF15:\r
- 4371 04b5 63797374            .ascii  "cystatus\000"\r
- 4371      61747573 \r
- 4371      00\r
- 4372                  .LASF62:\r
- 4373 04be 4379446D            .ascii  "CyDmaChSetConfiguration\000"\r
- 4373      61436853 \r
- 4373      6574436F \r
- 4373      6E666967 \r
- 4373      75726174 \r
- 4374                  .LASF69:\r
- 4375 04d6 656C656D            .ascii  "element\000"\r
- 4375      656E7400 \r
- 4376                  .LASF39:\r
- 4377 04de 4379446D            .ascii  "CyDmaChFree\000"\r
- 4377      61436846 \r
- 4377      72656500 \r
- 4378                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.o
deleted file mode 100755 (executable)
index 16efbe7..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyDmac.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.lst
deleted file mode 100755 (executable)
index 5c47d6a..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.lst
+++ /dev/null
@@ -1,4249 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "CyFlash.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CySetTempInt.part.0,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .thumb\r
-  21                           .thumb_func\r
-  22                           .type   CySetTempInt.part.0, %function\r
-  23                   CySetTempInt.part.0:\r
-  24                   .LFB13:\r
-  25                           .file 1 ".\\Generated_Source\\PSoC5\\CyFlash.c"\r
-   1:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/CyFlash.c **** * File Name: CyFlash.c\r
-   3:.\Generated_Source\PSoC5/CyFlash.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-   5:.\Generated_Source\PSoC5/CyFlash.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/CyFlash.c **** *   Provides an API for the FLASH/EEPROM.\r
-   7:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-   8:.\Generated_Source\PSoC5/CyFlash.c **** *  Note:\r
-   9:.\Generated_Source\PSoC5/CyFlash.c **** *   This code is endian agnostic.\r
-  10:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  11:.\Generated_Source\PSoC5/CyFlash.c **** *  Note:\r
-  12:.\Generated_Source\PSoC5/CyFlash.c **** *   Documentation of the API's in this file is located in the\r
-  13:.\Generated_Source\PSoC5/CyFlash.c **** *   System Reference Guide provided with PSoC Creator.\r
-  14:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  15:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
-  16:.\Generated_Source\PSoC5/CyFlash.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-  17:.\Generated_Source\PSoC5/CyFlash.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  18:.\Generated_Source\PSoC5/CyFlash.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  19:.\Generated_Source\PSoC5/CyFlash.c **** * the software package with which this file was provided.\r
-  20:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
-  21:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  22:.\Generated_Source\PSoC5/CyFlash.c **** #include "CyFlash.h"\r
-  23:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  24:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  25:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
-  26:.\Generated_Source\PSoC5/CyFlash.c **** * Holds die temperature, updated by CySetTemp(). Used for flash writting.\r
-  27:.\Generated_Source\PSoC5/CyFlash.c **** * The first byte is the sign of the temperature (0 = negative, 1 = positive).\r
-  28:.\Generated_Source\PSoC5/CyFlash.c **** * The second byte is the magnitude.\r
-  29:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
-  30:.\Generated_Source\PSoC5/CyFlash.c **** uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];\r
-  31:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  32:.\Generated_Source\PSoC5/CyFlash.c **** #if(CYDEV_ECC_ENABLE == 0)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 2\r
-\r
-\r
-  33:.\Generated_Source\PSoC5/CyFlash.c ****     static uint8 * rowBuffer = 0;\r
-  34:.\Generated_Source\PSoC5/CyFlash.c **** #endif  /* (CYDEV_ECC_ENABLE == 0) */\r
-  35:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  36:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  37:.\Generated_Source\PSoC5/CyFlash.c **** static cystatus CySetTempInt(void);\r
-  38:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  39:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  40:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
-  41:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyFlash_Start\r
-  42:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
-  43:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  44:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
-  45:.\Generated_Source\PSoC5/CyFlash.c **** *  Enable the Flash.\r
-  46:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  47:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
-  48:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
-  49:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  50:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
-  51:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
-  52:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  53:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
-  54:.\Generated_Source\PSoC5/CyFlash.c **** void CyFlash_Start(void) \r
-  55:.\Generated_Source\PSoC5/CyFlash.c **** {\r
-  56:.\Generated_Source\PSoC5/CyFlash.c ****     /* Active Power Mode */\r
-  57:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
-  58:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  59:.\Generated_Source\PSoC5/CyFlash.c ****     /* Standby Power Mode */\r
-  60:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
-  61:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  62:.\Generated_Source\PSoC5/CyFlash.c ****     CyDelayUs(CY_FLASH_EE_STARTUP_DELAY);\r
-  63:.\Generated_Source\PSoC5/CyFlash.c **** }\r
-  64:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  65:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  66:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
-  67:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyFlash_Stop\r
-  68:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
-  69:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  70:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
-  71:.\Generated_Source\PSoC5/CyFlash.c **** *  Disable the Flash.\r
-  72:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  73:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
-  74:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
-  75:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  76:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
-  77:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
-  78:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  79:.\Generated_Source\PSoC5/CyFlash.c **** * Side Effects:\r
-  80:.\Generated_Source\PSoC5/CyFlash.c **** *  This setting is ignored as long as the CPU is currently running.  This will\r
-  81:.\Generated_Source\PSoC5/CyFlash.c **** *  only take effect when the CPU is later disabled.\r
-  82:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  83:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
-  84:.\Generated_Source\PSoC5/CyFlash.c **** void CyFlash_Stop(void) \r
-  85:.\Generated_Source\PSoC5/CyFlash.c **** {\r
-  86:.\Generated_Source\PSoC5/CyFlash.c ****     /* Active Power Mode */\r
-  87:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
-  88:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  89:.\Generated_Source\PSoC5/CyFlash.c ****     /* Standby Power Mode */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 3\r
-\r
-\r
-  90:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
-  91:.\Generated_Source\PSoC5/CyFlash.c **** }\r
-  92:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  93:.\Generated_Source\PSoC5/CyFlash.c **** \r
-  94:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
-  95:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CySetTempInt\r
-  96:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
-  97:.\Generated_Source\PSoC5/CyFlash.c **** *\r
-  98:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
-  99:.\Generated_Source\PSoC5/CyFlash.c **** *  Sends a command to the SPC to read the die temperature. Sets a global value\r
- 100:.\Generated_Source\PSoC5/CyFlash.c **** *  used by the Write functions. This function must be called once before\r
- 101:.\Generated_Source\PSoC5/CyFlash.c **** *  executing a series of Flash writing functions.\r
- 102:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 103:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 104:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 105:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 106:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 107:.\Generated_Source\PSoC5/CyFlash.c **** *  status:\r
- 108:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_SUCCESS - if successful\r
- 109:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_LOCKED  - if Flash writing already in use\r
- 110:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_UNKNOWN - if there was an SPC error\r
- 111:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 112:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 113:.\Generated_Source\PSoC5/CyFlash.c **** static cystatus CySetTempInt(void) \r
-  26                           .loc 1 113 0\r
-  27                           .cfi_startproc\r
-  28                           @ args = 0, pretend = 0, frame = 0\r
-  29                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 114:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 115:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus status;\r
- 116:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 117:.\Generated_Source\PSoC5/CyFlash.c ****     /* Make sure SPC is powered */\r
- 118:.\Generated_Source\PSoC5/CyFlash.c ****     CySpcStart();\r
- 119:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 120:.\Generated_Source\PSoC5/CyFlash.c ****     /* Plan for failure. */\r
- 121:.\Generated_Source\PSoC5/CyFlash.c ****     status = CYRET_UNKNOWN;\r
- 122:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 123:.\Generated_Source\PSoC5/CyFlash.c ****     if(CySpcLock() == CYRET_SUCCESS)\r
- 124:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 125:.\Generated_Source\PSoC5/CyFlash.c ****         /* Write the command. */\r
- 126:.\Generated_Source\PSoC5/CyFlash.c ****         if(CYRET_STARTED == CySpcGetTemp(CY_TEMP_NUMBER_OF_SAMPLES))\r
-  30                           .loc 1 126 0\r
-  31 0000 0120                 movs    r0, #1\r
- 113:.\Generated_Source\PSoC5/CyFlash.c **** static cystatus CySetTempInt(void) \r
-  32                           .loc 1 113 0\r
-  33 0002 10B5                 push    {r4, lr}\r
-  34                   .LCFI0:\r
-  35                           .cfi_def_cfa_offset 8\r
-  36                           .cfi_offset 4, -8\r
-  37                           .cfi_offset 14, -4\r
-  38                           .loc 1 126 0\r
-  39 0004 FFF7FEFF             bl      CySpcGetTemp\r
-  40                   .LVL0:\r
-  41 0008 0728                 cmp     r0, #7\r
-  42 000a 09D0                 beq     .L14\r
-  43                   .L7:\r
- 121:.\Generated_Source\PSoC5/CyFlash.c ****     status = CYRET_UNKNOWN;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 4\r
-\r
-\r
-  44                           .loc 1 121 0\r
-  45 000c 4FF0FF34             mov     r4, #-1\r
-  46 0010 17E0                 b       .L3\r
-  47                   .L20:\r
- 127:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 128:.\Generated_Source\PSoC5/CyFlash.c ****             do\r
- 129:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 130:.\Generated_Source\PSoC5/CyFlash.c ****                 if(CySpcReadData(dieTemperature, CY_FLASH_DIE_TEMP_DATA_SIZE) == CY_FLASH_DIE_TEMP_\r
- 131:.\Generated_Source\PSoC5/CyFlash.c ****                 {\r
- 132:.\Generated_Source\PSoC5/CyFlash.c ****                     status = CYRET_SUCCESS;\r
- 133:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 134:.\Generated_Source\PSoC5/CyFlash.c ****                     while(CY_SPC_BUSY)\r
- 135:.\Generated_Source\PSoC5/CyFlash.c ****                     {\r
- 136:.\Generated_Source\PSoC5/CyFlash.c ****                         /* Spin until idle. */\r
- 137:.\Generated_Source\PSoC5/CyFlash.c ****                         CyDelayUs(1u);\r
- 138:.\Generated_Source\PSoC5/CyFlash.c ****                     }\r
- 139:.\Generated_Source\PSoC5/CyFlash.c ****                     break;\r
- 140:.\Generated_Source\PSoC5/CyFlash.c ****                 }\r
- 141:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 142:.\Generated_Source\PSoC5/CyFlash.c ****             } while(CY_SPC_BUSY);\r
-  48                           .loc 1 142 0\r
-  49 0012 0E4B                 ldr     r3, .L23\r
-  50 0014 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  51 0016 00F00201             and     r1, r0, #2\r
-  52 001a CAB2                 uxtb    r2, r1\r
-  53 001c 002A                 cmp     r2, #0\r
-  54 001e F5D1                 bne     .L7\r
-  55                   .L14:\r
- 130:.\Generated_Source\PSoC5/CyFlash.c ****                 if(CySpcReadData(dieTemperature, CY_FLASH_DIE_TEMP_DATA_SIZE) == CY_FLASH_DIE_TEMP_\r
-  56                           .loc 1 130 0\r
-  57 0020 0221                 movs    r1, #2\r
-  58 0022 0B48                 ldr     r0, .L23+4\r
-  59 0024 FFF7FEFF             bl      CySpcReadData\r
-  60                   .LVL1:\r
-  61 0028 0228                 cmp     r0, #2\r
-  62 002a F2D1                 bne     .L20\r
-  63                   .L16:\r
- 134:.\Generated_Source\PSoC5/CyFlash.c ****                     while(CY_SPC_BUSY)\r
-  64                           .loc 1 134 0\r
-  65 002c 074C                 ldr     r4, .L23\r
-  66 002e 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
-  67 0030 03F00200             and     r0, r3, #2\r
-  68 0034 C1B2                 uxtb    r1, r0\r
-  69 0036 19B9                 cbnz    r1, .L22\r
-  70                   .L6:\r
- 137:.\Generated_Source\PSoC5/CyFlash.c ****                         CyDelayUs(1u);\r
-  71                           .loc 1 137 0\r
-  72 0038 0120                 movs    r0, #1\r
-  73 003a FFF7FEFF             bl      CyDelayUs\r
-  74                   .LVL2:\r
-  75 003e F5E7                 b       .L16\r
-  76                   .L22:\r
- 132:.\Generated_Source\PSoC5/CyFlash.c ****                     status = CYRET_SUCCESS;\r
-  77                           .loc 1 132 0\r
-  78 0040 0024                 movs    r4, #0\r
-  79                   .L3:\r
-  80                   .LVL3:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 5\r
-\r
-\r
- 143:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 144:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 145:.\Generated_Source\PSoC5/CyFlash.c ****         CySpcUnlock();\r
-  81                           .loc 1 145 0\r
-  82 0042 FFF7FEFF             bl      CySpcUnlock\r
-  83                   .LVL4:\r
- 146:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 147:.\Generated_Source\PSoC5/CyFlash.c ****     else\r
- 148:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 149:.\Generated_Source\PSoC5/CyFlash.c ****         status = CYRET_LOCKED;\r
- 150:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 151:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 152:.\Generated_Source\PSoC5/CyFlash.c ****     return (status);\r
- 153:.\Generated_Source\PSoC5/CyFlash.c **** }\r
-  84                           .loc 1 153 0\r
-  85 0046 2046                 mov     r0, r4\r
-  86 0048 10BD                 pop     {r4, pc}\r
-  87                   .L24:\r
-  88 004a 00BF                 .align  2\r
-  89                   .L23:\r
-  90 004c 22470040             .word   1073760034\r
-  91 0050 00000000             .word   dieTemperature\r
-  92                           .cfi_endproc\r
-  93                   .LFE13:\r
-  94                           .size   CySetTempInt.part.0, .-CySetTempInt.part.0\r
-  95                           .section        .text.CyFlash_Start,"ax",%progbits\r
-  96                           .align  1\r
-  97                           .global CyFlash_Start\r
-  98                           .thumb\r
-  99                           .thumb_func\r
- 100                           .type   CyFlash_Start, %function\r
- 101                   CyFlash_Start:\r
- 102                   .LFB0:\r
-  55:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 103                           .loc 1 55 0\r
- 104                           .cfi_startproc\r
- 105                           @ args = 0, pretend = 0, frame = 0\r
- 106                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 107                           @ link register save eliminated.\r
-  57:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
- 108                           .loc 1 57 0\r
- 109 0000 054B                 ldr     r3, .L26\r
- 110 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 111 0004 42F00100             orr     r0, r2, #1\r
- 112 0008 1870                 strb    r0, [r3, #0]\r
-  60:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
- 113                           .loc 1 60 0\r
- 114 000a 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
-  62:.\Generated_Source\PSoC5/CyFlash.c ****     CyDelayUs(CY_FLASH_EE_STARTUP_DELAY);\r
- 115                           .loc 1 62 0\r
- 116 000c 0520                 movs    r0, #5\r
-  60:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
- 117                           .loc 1 60 0\r
- 118 000e 41F00102             orr     r2, r1, #1\r
- 119 0012 1A74                 strb    r2, [r3, #16]\r
-  63:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 120                           .loc 1 63 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 6\r
-\r
-\r
-  62:.\Generated_Source\PSoC5/CyFlash.c ****     CyDelayUs(CY_FLASH_EE_STARTUP_DELAY);\r
- 121                           .loc 1 62 0\r
- 122 0014 FFF7FEBF             b       CyDelayUs\r
- 123                   .LVL5:\r
- 124                   .L27:\r
- 125                           .align  2\r
- 126                   .L26:\r
- 127 0018 AC430040             .word   1073759148\r
- 128                           .cfi_endproc\r
- 129                   .LFE0:\r
- 130                           .size   CyFlash_Start, .-CyFlash_Start\r
- 131                           .section        .text.CyFlash_Stop,"ax",%progbits\r
- 132                           .align  1\r
- 133                           .global CyFlash_Stop\r
- 134                           .thumb\r
- 135                           .thumb_func\r
- 136                           .type   CyFlash_Stop, %function\r
- 137                   CyFlash_Stop:\r
- 138                   .LFB1:\r
-  85:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 139                           .loc 1 85 0\r
- 140                           .cfi_startproc\r
- 141                           @ args = 0, pretend = 0, frame = 0\r
- 142                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 143                           @ link register save eliminated.\r
-  87:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
- 144                           .loc 1 87 0\r
- 145 0000 044B                 ldr     r3, .L29\r
- 146 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 147 0004 02F0FE00             and     r0, r2, #254\r
- 148 0008 1870                 strb    r0, [r3, #0]\r
-  90:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
- 149                           .loc 1 90 0\r
- 150 000a 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
- 151 000c 01F0FE02             and     r2, r1, #254\r
- 152 0010 1A74                 strb    r2, [r3, #16]\r
- 153 0012 7047                 bx      lr\r
- 154                   .L30:\r
- 155                           .align  2\r
- 156                   .L29:\r
- 157 0014 AC430040             .word   1073759148\r
- 158                           .cfi_endproc\r
- 159                   .LFE1:\r
- 160                           .size   CyFlash_Stop, .-CyFlash_Stop\r
- 161                           .section        .text.CySetTemp,"ax",%progbits\r
- 162                           .align  1\r
- 163                           .global CySetTemp\r
- 164                           .thumb\r
- 165                           .thumb_func\r
- 166                           .type   CySetTemp, %function\r
- 167                   CySetTemp:\r
- 168                   .LFB3:\r
- 154:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 155:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 156:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 157:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CySetTemp\r
- 158:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 7\r
-\r
-\r
- 159:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 160:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 161:.\Generated_Source\PSoC5/CyFlash.c **** *  This is a wraparound for CySetTempInt(). It is used to return second\r
- 162:.\Generated_Source\PSoC5/CyFlash.c **** *  successful read of temperature value.\r
- 163:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 164:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 165:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 166:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 167:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 168:.\Generated_Source\PSoC5/CyFlash.c **** *  status:\r
- 169:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_SUCCESS if successful.\r
- 170:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_LOCKED  if Flash writing already in use\r
- 171:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_UNKNOWN if there was an SPC error.\r
- 172:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 173:.\Generated_Source\PSoC5/CyFlash.c **** *  uint8 dieTemperature[2]:\r
- 174:.\Generated_Source\PSoC5/CyFlash.c **** *   Holds die temperature for the flash writting algorithm. The first byte is\r
- 175:.\Generated_Source\PSoC5/CyFlash.c **** *   the sign of the temperature (0 = negative, 1 = positive). The second byte is\r
- 176:.\Generated_Source\PSoC5/CyFlash.c **** *   the magnitude.\r
- 177:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 178:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 179:.\Generated_Source\PSoC5/CyFlash.c **** cystatus CySetTemp(void) \r
- 180:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 169                           .loc 1 180 0\r
- 170                           .cfi_startproc\r
- 171                           @ args = 0, pretend = 0, frame = 0\r
- 172                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 173 0000 08B5                 push    {r3, lr}\r
- 174                   .LCFI1:\r
- 175                           .cfi_def_cfa_offset 8\r
- 176                           .cfi_offset 3, -8\r
- 177                           .cfi_offset 14, -4\r
- 178                   .LBB6:\r
- 179                   .LBB7:\r
- 118:.\Generated_Source\PSoC5/CyFlash.c ****     CySpcStart();\r
- 180                           .loc 1 118 0\r
- 181 0002 FFF7FEFF             bl      CySpcStart\r
- 182                   .LVL6:\r
- 123:.\Generated_Source\PSoC5/CyFlash.c ****     if(CySpcLock() == CYRET_SUCCESS)\r
- 183                           .loc 1 123 0\r
- 184 0006 FFF7FEFF             bl      CySpcLock\r
- 185                   .LVL7:\r
- 186 000a 58B9                 cbnz    r0, .L34\r
- 187 000c FFF7FEFF             bl      CySetTempInt.part.0\r
- 188                   .LVL8:\r
- 189                   .LBE7:\r
- 190                   .LBE6:\r
- 181:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus status = CySetTempInt();\r
- 182:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 183:.\Generated_Source\PSoC5/CyFlash.c ****     if(status == CYRET_SUCCESS)\r
- 191                           .loc 1 183 0\r
- 192 0010 48B9                 cbnz    r0, .L32\r
- 193                   .LBB9:\r
- 194                   .LBB10:\r
- 118:.\Generated_Source\PSoC5/CyFlash.c ****     CySpcStart();\r
- 195                           .loc 1 118 0\r
- 196 0012 FFF7FEFF             bl      CySpcStart\r
- 197                   .LVL9:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 8\r
-\r
-\r
- 123:.\Generated_Source\PSoC5/CyFlash.c ****     if(CySpcLock() == CYRET_SUCCESS)\r
- 198                           .loc 1 123 0\r
- 199 0016 FFF7FEFF             bl      CySpcLock\r
- 200                   .LVL10:\r
- 201 001a 18B9                 cbnz    r0, .L34\r
- 202                   .LBE10:\r
- 203                   .LBE9:\r
- 184:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 185:.\Generated_Source\PSoC5/CyFlash.c ****         status = CySetTempInt();\r
- 186:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 187:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 188:.\Generated_Source\PSoC5/CyFlash.c ****     return (status);\r
- 189:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 204                           .loc 1 189 0\r
- 205 001c BDE80840             pop     {r3, lr}\r
- 206 0020 FFF7FEBF             b       CySetTempInt.part.0\r
- 207                   .LVL11:\r
- 208                   .L34:\r
- 209                   .LBB11:\r
- 210                   .LBB8:\r
- 149:.\Generated_Source\PSoC5/CyFlash.c ****         status = CYRET_LOCKED;\r
- 211                           .loc 1 149 0\r
- 212 0024 0420                 movs    r0, #4\r
- 213                   .L32:\r
- 214                   .LVL12:\r
- 215                   .LBE8:\r
- 216                   .LBE11:\r
- 217                           .loc 1 189 0\r
- 218 0026 08BD                 pop     {r3, pc}\r
- 219                           .cfi_endproc\r
- 220                   .LFE3:\r
- 221                           .size   CySetTemp, .-CySetTemp\r
- 222                           .section        .text.CySetFlashEEBuffer,"ax",%progbits\r
- 223                           .align  1\r
- 224                           .global CySetFlashEEBuffer\r
- 225                           .thumb\r
- 226                           .thumb_func\r
- 227                           .type   CySetFlashEEBuffer, %function\r
- 228                   CySetFlashEEBuffer:\r
- 229                   .LFB4:\r
- 190:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 191:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 192:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 193:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CySetFlashEEBuffer\r
- 194:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 195:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 196:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 197:.\Generated_Source\PSoC5/CyFlash.c **** *  Sets the user supplied temporary buffer to store SPC data while performing\r
- 198:.\Generated_Source\PSoC5/CyFlash.c **** *  flash and EEPROM commands. This buffer is only necessary when Flash ECC is\r
- 199:.\Generated_Source\PSoC5/CyFlash.c **** *  disabled.\r
- 200:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 201:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 202:.\Generated_Source\PSoC5/CyFlash.c **** *  buffer:\r
- 203:.\Generated_Source\PSoC5/CyFlash.c **** *   Address of block of memory to store temporary memory. The size of the block\r
- 204:.\Generated_Source\PSoC5/CyFlash.c **** *   of memory is CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE.\r
- 205:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 206:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 9\r
-\r
-\r
- 207:.\Generated_Source\PSoC5/CyFlash.c **** *  status:\r
- 208:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_SUCCESS if successful.\r
- 209:.\Generated_Source\PSoC5/CyFlash.c **** *   CYRET_BAD_PARAM if the buffer is NULL\r
- 210:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 211:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 212:.\Generated_Source\PSoC5/CyFlash.c **** cystatus CySetFlashEEBuffer(uint8 * buffer) \r
- 213:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 230                           .loc 1 213 0\r
- 231                           .cfi_startproc\r
- 232                           @ args = 0, pretend = 0, frame = 0\r
- 233                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 234                   .LVL13:\r
- 235 0000 38B5                 push    {r3, r4, r5, lr}\r
- 236                   .LCFI2:\r
- 237                           .cfi_def_cfa_offset 16\r
- 238                           .cfi_offset 3, -16\r
- 239                           .cfi_offset 4, -12\r
- 240                           .cfi_offset 5, -8\r
- 241                           .cfi_offset 14, -4\r
- 242                           .loc 1 213 0\r
- 243 0002 0446                 mov     r4, r0\r
- 214:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus status = CYRET_SUCCESS;\r
- 215:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 216:.\Generated_Source\PSoC5/CyFlash.c ****     CySpcStart();\r
- 244                           .loc 1 216 0\r
- 245 0004 FFF7FEFF             bl      CySpcStart\r
- 246                   .LVL14:\r
- 217:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 218:.\Generated_Source\PSoC5/CyFlash.c ****     #if(CYDEV_ECC_ENABLE == 0)\r
- 219:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 220:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL == buffer)\r
- 247                           .loc 1 220 0\r
- 248 0008 4CB1                 cbz     r4, .L37\r
- 221:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 222:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_BAD_PARAM;\r
- 223:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 224:.\Generated_Source\PSoC5/CyFlash.c ****         else if(CySpcLock() != CYRET_SUCCESS)\r
- 249                           .loc 1 224 0\r
- 250 000a FFF7FEFF             bl      CySpcLock\r
- 251                   .LVL15:\r
- 252 000e 0546                 mov     r5, r0\r
- 253 0010 38B9                 cbnz    r0, .L38\r
- 225:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 226:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_LOCKED;\r
- 227:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 228:.\Generated_Source\PSoC5/CyFlash.c ****         else\r
- 229:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 230:.\Generated_Source\PSoC5/CyFlash.c ****             rowBuffer = buffer;\r
- 254                           .loc 1 230 0\r
- 255 0012 054B                 ldr     r3, .L39\r
- 256 0014 1C60                 str     r4, [r3, #0]\r
- 231:.\Generated_Source\PSoC5/CyFlash.c ****             CySpcUnlock();\r
- 257                           .loc 1 231 0\r
- 258 0016 FFF7FEFF             bl      CySpcUnlock\r
- 259                   .LVL16:\r
- 214:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus status = CYRET_SUCCESS;\r
- 260                           .loc 1 214 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 10\r
-\r
-\r
- 261 001a 2846                 mov     r0, r5\r
- 262 001c 38BD                 pop     {r3, r4, r5, pc}\r
- 263                   .L37:\r
- 222:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_BAD_PARAM;\r
- 264                           .loc 1 222 0\r
- 265 001e 0120                 movs    r0, #1\r
- 266 0020 38BD                 pop     {r3, r4, r5, pc}\r
- 267                   .L38:\r
- 226:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_LOCKED;\r
- 268                           .loc 1 226 0\r
- 269 0022 0420                 movs    r0, #4\r
- 270                   .LVL17:\r
- 232:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 233:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 234:.\Generated_Source\PSoC5/CyFlash.c ****     #else\r
- 235:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 236:.\Generated_Source\PSoC5/CyFlash.c ****         /* To supress the warning */\r
- 237:.\Generated_Source\PSoC5/CyFlash.c ****         buffer = buffer;\r
- 238:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 239:.\Generated_Source\PSoC5/CyFlash.c ****     #endif  /* (CYDEV_ECC_ENABLE == 0u) */\r
- 240:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 241:.\Generated_Source\PSoC5/CyFlash.c ****     return(status);\r
- 242:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 271                           .loc 1 242 0\r
- 272 0024 38BD                 pop     {r3, r4, r5, pc}\r
- 273                   .L40:\r
- 274 0026 00BF                 .align  2\r
- 275                   .L39:\r
- 276 0028 00000000             .word   .LANCHOR0\r
- 277                           .cfi_endproc\r
- 278                   .LFE4:\r
- 279                           .size   CySetFlashEEBuffer, .-CySetFlashEEBuffer\r
- 280                           .section        .text.CyWriteRowFull,"ax",%progbits\r
- 281                           .align  1\r
- 282                           .global CyWriteRowFull\r
- 283                           .thumb\r
- 284                           .thumb_func\r
- 285                           .type   CyWriteRowFull, %function\r
- 286                   CyWriteRowFull:\r
- 287                   .LFB7:\r
- 243:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 244:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 245:.\Generated_Source\PSoC5/CyFlash.c **** #if(CYDEV_ECC_ENABLE == 1)\r
- 246:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 247:.\Generated_Source\PSoC5/CyFlash.c ****     /*******************************************************************************\r
- 248:.\Generated_Source\PSoC5/CyFlash.c ****     * Function Name: CyWriteRowData\r
- 249:.\Generated_Source\PSoC5/CyFlash.c ****     ********************************************************************************\r
- 250:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 251:.\Generated_Source\PSoC5/CyFlash.c ****     * Summary:\r
- 252:.\Generated_Source\PSoC5/CyFlash.c ****     *  Sends a command to the SPC to load and program a row of data in\r
- 253:.\Generated_Source\PSoC5/CyFlash.c ****     *  Flash or EEPROM.\r
- 254:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 255:.\Generated_Source\PSoC5/CyFlash.c ****     * Parameters:\r
- 256:.\Generated_Source\PSoC5/CyFlash.c ****     *  arrayID:    ID of the array to write.\r
- 257:.\Generated_Source\PSoC5/CyFlash.c ****     *   The type of write, Flash or EEPROM, is determined from the array ID.\r
- 258:.\Generated_Source\PSoC5/CyFlash.c ****     *   The arrays in the part are sequential starting at the first ID for the\r
- 259:.\Generated_Source\PSoC5/CyFlash.c ****     *   specific memory type. The array ID for the Flash memory lasts from 0x00 to\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 11\r
-\r
-\r
- 260:.\Generated_Source\PSoC5/CyFlash.c ****     *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.\r
- 261:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowAddress: rowAddress of flash row to program.\r
- 262:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowData:    Array of bytes to write.\r
- 263:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 264:.\Generated_Source\PSoC5/CyFlash.c ****     * Return:\r
- 265:.\Generated_Source\PSoC5/CyFlash.c ****     *  status:\r
- 266:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_SUCCESS if successful.\r
- 267:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_LOCKED if the SPC is already in use.\r
- 268:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_CANCELED if command not accepted\r
- 269:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_UNKNOWN if there was an SPC error.\r
- 270:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 271:.\Generated_Source\PSoC5/CyFlash.c ****     *******************************************************************************/\r
- 272:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) \r
- 273:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 274:.\Generated_Source\PSoC5/CyFlash.c ****         uint16 rowSize;\r
- 275:.\Generated_Source\PSoC5/CyFlash.c ****         cystatus status;\r
- 276:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 277:.\Generated_Source\PSoC5/CyFlash.c ****         rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZ\r
- 278:.\Generated_Source\PSoC5/CyFlash.c ****         status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);\r
- 279:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 280:.\Generated_Source\PSoC5/CyFlash.c ****         return(status);\r
- 281:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 282:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 283:.\Generated_Source\PSoC5/CyFlash.c **** #else\r
- 284:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 285:.\Generated_Source\PSoC5/CyFlash.c ****     /*******************************************************************************\r
- 286:.\Generated_Source\PSoC5/CyFlash.c ****     * Function Name: CyWriteRowData\r
- 287:.\Generated_Source\PSoC5/CyFlash.c ****     ********************************************************************************\r
- 288:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 289:.\Generated_Source\PSoC5/CyFlash.c ****     * Summary:\r
- 290:.\Generated_Source\PSoC5/CyFlash.c ****     *   Sends a command to the SPC to load and program a row of data in\r
- 291:.\Generated_Source\PSoC5/CyFlash.c ****     *   Flash or EEPROM.\r
- 292:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 293:.\Generated_Source\PSoC5/CyFlash.c ****     * Parameters:\r
- 294:.\Generated_Source\PSoC5/CyFlash.c ****     *  arrayID      : ID of the array to write.\r
- 295:.\Generated_Source\PSoC5/CyFlash.c ****     *   The type of write, Flash or EEPROM, is determined from the array ID.\r
- 296:.\Generated_Source\PSoC5/CyFlash.c ****     *   The arrays in the part are sequential starting at the first ID for the\r
- 297:.\Generated_Source\PSoC5/CyFlash.c ****     *   specific memory type. The array ID for the Flash memory lasts from 0x00 to\r
- 298:.\Generated_Source\PSoC5/CyFlash.c ****     *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.\r
- 299:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowAddress   : rowAddress of flash row to program.\r
- 300:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowData      : Array of bytes to write.\r
- 301:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 302:.\Generated_Source\PSoC5/CyFlash.c ****     * Return:\r
- 303:.\Generated_Source\PSoC5/CyFlash.c ****     *  status:\r
- 304:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_SUCCESS if successful.\r
- 305:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_LOCKED if the SPC is already in use.\r
- 306:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_CANCELED if command not accepted\r
- 307:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_UNKNOWN if there was an SPC error.\r
- 308:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 309:.\Generated_Source\PSoC5/CyFlash.c ****     *******************************************************************************/\r
- 310:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) \r
- 311:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 312:.\Generated_Source\PSoC5/CyFlash.c ****         uint8 i;\r
- 313:.\Generated_Source\PSoC5/CyFlash.c ****         uint32 offset;\r
- 314:.\Generated_Source\PSoC5/CyFlash.c ****         uint16 rowSize;\r
- 315:.\Generated_Source\PSoC5/CyFlash.c ****         cystatus status;\r
- 316:.\Generated_Source\PSoC5/CyFlash.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 12\r
-\r
-\r
- 317:.\Generated_Source\PSoC5/CyFlash.c ****         /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */\r
- 318:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 319:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 320:.\Generated_Source\PSoC5/CyFlash.c ****             if(arrayId > CY_SPC_LAST_FLASH_ARRAYID)\r
- 321:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 322:.\Generated_Source\PSoC5/CyFlash.c ****                 rowSize = CYDEV_EEPROM_ROW_SIZE;\r
- 323:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 324:.\Generated_Source\PSoC5/CyFlash.c ****             else\r
- 325:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 326:.\Generated_Source\PSoC5/CyFlash.c ****                 rowSize = CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE;\r
- 327:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 328:.\Generated_Source\PSoC5/CyFlash.c ****                 /* Save the ECC area. */\r
- 329:.\Generated_Source\PSoC5/CyFlash.c ****                 offset = CYDEV_ECC_BASE +\r
- 330:.\Generated_Source\PSoC5/CyFlash.c ****                         ((uint32)arrayId * CYDEV_ECC_SECTOR_SIZE) +\r
- 331:.\Generated_Source\PSoC5/CyFlash.c ****                         ((uint32)rowAddress * CYDEV_ECC_ROW_SIZE);\r
- 332:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 333:.\Generated_Source\PSoC5/CyFlash.c ****                 for(i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)\r
- 334:.\Generated_Source\PSoC5/CyFlash.c ****                 {\r
- 335:.\Generated_Source\PSoC5/CyFlash.c ****                     *(rowBuffer + CYDEV_FLS_ROW_SIZE + i) = CY_GET_XTND_REG8((void CYFAR *)(offset \r
- 336:.\Generated_Source\PSoC5/CyFlash.c ****                 }\r
- 337:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 338:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 339:.\Generated_Source\PSoC5/CyFlash.c ****             /* Copy the rowdata to the temporary buffer. */\r
- 340:.\Generated_Source\PSoC5/CyFlash.c ****         #if(CY_PSOC3)\r
- 341:.\Generated_Source\PSoC5/CyFlash.c ****             (void) memcpy((void *) rowBuffer, (void *)((uint32) rowData), (int16) CYDEV_FLS_ROW_SIZ\r
- 342:.\Generated_Source\PSoC5/CyFlash.c ****         #else\r
- 343:.\Generated_Source\PSoC5/CyFlash.c ****             (void) memcpy((void *) rowBuffer, (const void *) rowData, CYDEV_FLS_ROW_SIZE);\r
- 344:.\Generated_Source\PSoC5/CyFlash.c ****         #endif  /* (CY_PSOC3) */\r
- 345:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 346:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, rowSize);\r
- 347:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 348:.\Generated_Source\PSoC5/CyFlash.c ****         else\r
- 349:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 350:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_UNKNOWN;\r
- 351:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 352:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 353:.\Generated_Source\PSoC5/CyFlash.c ****         return(status);\r
- 354:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 355:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 356:.\Generated_Source\PSoC5/CyFlash.c **** #endif /* (CYDEV_ECC_ENABLE == 0u) */\r
- 357:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 358:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 359:.\Generated_Source\PSoC5/CyFlash.c **** #if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))\r
- 360:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 361:.\Generated_Source\PSoC5/CyFlash.c ****     /*******************************************************************************\r
- 362:.\Generated_Source\PSoC5/CyFlash.c ****     * Function Name: CyWriteRowConfig\r
- 363:.\Generated_Source\PSoC5/CyFlash.c ****     ********************************************************************************\r
- 364:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 365:.\Generated_Source\PSoC5/CyFlash.c ****     * Summary:\r
- 366:.\Generated_Source\PSoC5/CyFlash.c ****     *  Sends a command to the SPC to load and program a row of config data in flash.\r
- 367:.\Generated_Source\PSoC5/CyFlash.c ****     *  This function is only valid for Flash array IDs (not for EEPROM).\r
- 368:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 369:.\Generated_Source\PSoC5/CyFlash.c ****     * Parameters:\r
- 370:.\Generated_Source\PSoC5/CyFlash.c ****     *  arrayId:      ID of the array to write\r
- 371:.\Generated_Source\PSoC5/CyFlash.c ****     *   The arrays in the part are sequential starting at the first ID for the\r
- 372:.\Generated_Source\PSoC5/CyFlash.c ****     *   specific memory type. The array ID for the Flash memory lasts\r
- 373:.\Generated_Source\PSoC5/CyFlash.c ****     *   from 0x00 to 0x3F.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 13\r
-\r
-\r
- 374:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowAddress:   Address of the sector to erase.\r
- 375:.\Generated_Source\PSoC5/CyFlash.c ****     *  rowECC:       Array of bytes to write.\r
- 376:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 377:.\Generated_Source\PSoC5/CyFlash.c ****     * Return:\r
- 378:.\Generated_Source\PSoC5/CyFlash.c ****     *  status:\r
- 379:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_SUCCESS if successful.\r
- 380:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_LOCKED if the SPC is already in use.\r
- 381:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_CANCELED if command not accepted\r
- 382:.\Generated_Source\PSoC5/CyFlash.c ****     *   CYRET_UNKNOWN if there was an SPC error.\r
- 383:.\Generated_Source\PSoC5/CyFlash.c ****     *\r
- 384:.\Generated_Source\PSoC5/CyFlash.c ****     *******************************************************************************/\r
- 385:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC)\\r
- 386:.\Generated_Source\PSoC5/CyFlash.c ****     \r
- 387:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 388:.\Generated_Source\PSoC5/CyFlash.c ****         uint32 offset;\r
- 389:.\Generated_Source\PSoC5/CyFlash.c ****         uint16 i;\r
- 390:.\Generated_Source\PSoC5/CyFlash.c ****         cystatus status;\r
- 391:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 392:.\Generated_Source\PSoC5/CyFlash.c ****         /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */\r
- 393:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 394:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 395:.\Generated_Source\PSoC5/CyFlash.c ****             /* Read the existing flash data. */\r
- 396:.\Generated_Source\PSoC5/CyFlash.c ****             offset = ((uint32)arrayId * CYDEV_FLS_SECTOR_SIZE) +\r
- 397:.\Generated_Source\PSoC5/CyFlash.c ****                      ((uint32)rowAddress * CYDEV_FLS_ROW_SIZE);\r
- 398:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 399:.\Generated_Source\PSoC5/CyFlash.c ****             #if (CYDEV_FLS_BASE != 0u)\r
- 400:.\Generated_Source\PSoC5/CyFlash.c ****                 offset += CYDEV_FLS_BASE;\r
- 401:.\Generated_Source\PSoC5/CyFlash.c ****             #endif  /* (CYDEV_FLS_BASE != 0u) */\r
- 402:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 403:.\Generated_Source\PSoC5/CyFlash.c ****             for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)\r
- 404:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 405:.\Generated_Source\PSoC5/CyFlash.c ****                 rowBuffer[i] = CY_GET_XTND_REG8((void CYFAR *)(offset + i));\r
- 406:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 407:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 408:.\Generated_Source\PSoC5/CyFlash.c ****             #if(CY_PSOC3)\r
- 409:.\Generated_Source\PSoC5/CyFlash.c ****                 (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],\r
- 410:.\Generated_Source\PSoC5/CyFlash.c ****                               (void *)(uint32)rowECC,\r
- 411:.\Generated_Source\PSoC5/CyFlash.c ****                               (int16)CYDEV_ECC_ROW_SIZE);\r
- 412:.\Generated_Source\PSoC5/CyFlash.c ****             #else\r
- 413:.\Generated_Source\PSoC5/CyFlash.c ****                 (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],\r
- 414:.\Generated_Source\PSoC5/CyFlash.c ****                               (const void *)rowECC,\r
- 415:.\Generated_Source\PSoC5/CyFlash.c ****                               CYDEV_ECC_ROW_SIZE);\r
- 416:.\Generated_Source\PSoC5/CyFlash.c ****             #endif  /* (CY_PSOC3) */\r
- 417:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 418:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, CYDEV_FLS_ROW_SIZE + CYDEV_ECC_\r
- 419:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 420:.\Generated_Source\PSoC5/CyFlash.c ****         else\r
- 421:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 422:.\Generated_Source\PSoC5/CyFlash.c ****             status = CYRET_UNKNOWN;\r
- 423:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 424:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 425:.\Generated_Source\PSoC5/CyFlash.c ****         return (status);\r
- 426:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 427:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 428:.\Generated_Source\PSoC5/CyFlash.c **** #endif  /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */\r
- 429:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 430:.\Generated_Source\PSoC5/CyFlash.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 14\r
-\r
-\r
- 431:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 432:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 433:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyWriteRowFull\r
- 434:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 435:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 436:.\Generated_Source\PSoC5/CyFlash.c **** *  Sends a command to the SPC to load and program a row of data in flash.\r
- 437:.\Generated_Source\PSoC5/CyFlash.c **** *  rowData array is expected to contain Flash and ECC data if needed.\r
- 438:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 439:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 440:.\Generated_Source\PSoC5/CyFlash.c **** *  arrayId:    FLASH or EEPROM array id.\r
- 441:.\Generated_Source\PSoC5/CyFlash.c **** *  rowData:    Pointer to a row of data to write.\r
- 442:.\Generated_Source\PSoC5/CyFlash.c **** *  rowNumber:  Zero based number of the row.\r
- 443:.\Generated_Source\PSoC5/CyFlash.c **** *  rowSize:    Size of the row.\r
- 444:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 445:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 446:.\Generated_Source\PSoC5/CyFlash.c **** *  CYRET_SUCCESS if successful.\r
- 447:.\Generated_Source\PSoC5/CyFlash.c **** *  CYRET_LOCKED if the SPC is already in use.\r
- 448:.\Generated_Source\PSoC5/CyFlash.c **** *  CYRET_CANCELED if command not accepted\r
- 449:.\Generated_Source\PSoC5/CyFlash.c **** *  CYRET_UNKNOWN if there was an SPC error.\r
- 450:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 451:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 452:.\Generated_Source\PSoC5/CyFlash.c **** cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, uint16 rowSize) \\r
- 453:.\Generated_Source\PSoC5/CyFlash.c ****         \r
- 454:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 288                           .loc 1 454 0\r
- 289                           .cfi_startproc\r
- 290                           @ args = 0, pretend = 0, frame = 0\r
- 291                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 292                   .LVL18:\r
- 293 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 294                   .LCFI3:\r
- 295                           .cfi_def_cfa_offset 24\r
- 296                           .cfi_offset 3, -24\r
- 297                           .cfi_offset 4, -20\r
- 298                           .cfi_offset 5, -16\r
- 299                           .cfi_offset 6, -12\r
- 300                           .cfi_offset 7, -8\r
- 301                           .cfi_offset 14, -4\r
- 302                           .loc 1 454 0\r
- 303 0002 0546                 mov     r5, r0\r
- 304 0004 0E46                 mov     r6, r1\r
- 305 0006 1746                 mov     r7, r2\r
- 306 0008 1C46                 mov     r4, r3\r
- 455:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus status;\r
- 456:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 457:.\Generated_Source\PSoC5/CyFlash.c ****     if(CySpcLock() == CYRET_SUCCESS)\r
- 307                           .loc 1 457 0\r
- 308 000a FFF7FEFF             bl      CySpcLock\r
- 309                   .LVL19:\r
- 310 000e F0B9                 cbnz    r0, .L49\r
- 311                   .LVL20:\r
- 312                   .LBB14:\r
- 313                   .LBB15:\r
- 458:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 459:.\Generated_Source\PSoC5/CyFlash.c ****         /* Load row data into SPC internal latch */\r
- 460:.\Generated_Source\PSoC5/CyFlash.c ****         status = CySpcLoadRow(arrayId, rowData, rowSize);\r
- 314                           .loc 1 460 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 15\r
-\r
-\r
- 315 0010 2246                 mov     r2, r4\r
- 316 0012 2846                 mov     r0, r5\r
- 317 0014 3946                 mov     r1, r7\r
- 318 0016 FFF7FEFF             bl      CySpcLoadRow\r
- 319                   .LVL21:\r
- 461:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 462:.\Generated_Source\PSoC5/CyFlash.c ****         if(CYRET_STARTED == status)\r
- 320                           .loc 1 462 0\r
- 321 001a 0728                 cmp     r0, #7\r
- 460:.\Generated_Source\PSoC5/CyFlash.c ****         status = CySpcLoadRow(arrayId, rowData, rowSize);\r
- 322                           .loc 1 460 0\r
- 323 001c 0446                 mov     r4, r0\r
- 324                   .LVL22:\r
- 325                           .loc 1 462 0\r
- 326 001e 13D1                 bne     .L44\r
- 327                   .LVL23:\r
- 328                   .L57:\r
- 463:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 464:.\Generated_Source\PSoC5/CyFlash.c ****             while(CY_SPC_BUSY)\r
- 329                           .loc 1 464 0\r
- 330 0020 1D4B                 ldr     r3, .L64\r
- 331 0022 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 332 0024 02F00200             and     r0, r2, #2\r
- 333 0028 C1B2                 uxtb    r1, r0\r
- 334 002a 19B9                 cbnz    r1, .L62\r
- 335                   .L45:\r
- 465:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 466:.\Generated_Source\PSoC5/CyFlash.c ****                 /* Wait for SPC to finish and get SPC status */\r
- 467:.\Generated_Source\PSoC5/CyFlash.c ****                 CyDelayUs(1u);\r
- 336                           .loc 1 467 0\r
- 337 002c 0120                 movs    r0, #1\r
- 338 002e FFF7FEFF             bl      CyDelayUs\r
- 339                   .LVL24:\r
- 340 0032 F5E7                 b       .L57\r
- 341                   .L62:\r
- 468:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 469:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 470:.\Generated_Source\PSoC5/CyFlash.c ****             /* Hide SPC status */\r
- 471:.\Generated_Source\PSoC5/CyFlash.c ****             if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)\r
- 342                           .loc 1 471 0\r
- 343 0034 1C78                 ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 344                   .LVL25:\r
- 345 0036 04F00202             and     r2, r4, #2\r
- 346 003a D0B2                 uxtb    r0, r2\r
- 347 003c 10B1                 cbz     r0, .L51\r
- 348 003e 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 349 0040 9B08                 lsrs    r3, r3, #2\r
- 350 0042 06D0                 beq     .L46\r
- 351                   .L51:\r
- 472:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 473:.\Generated_Source\PSoC5/CyFlash.c ****                 status = CYRET_SUCCESS;\r
- 474:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 475:.\Generated_Source\PSoC5/CyFlash.c ****             else\r
- 476:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 477:.\Generated_Source\PSoC5/CyFlash.c ****                 status = CYRET_UNKNOWN;\r
- 478:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 479:.\Generated_Source\PSoC5/CyFlash.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 16\r
-\r
-\r
- 480:.\Generated_Source\PSoC5/CyFlash.c ****             if(CYRET_SUCCESS == status)\r
- 481:.\Generated_Source\PSoC5/CyFlash.c ****             {\r
- 482:.\Generated_Source\PSoC5/CyFlash.c ****                 /* Erase and program flash with the data from SPC interval latch */\r
- 483:.\Generated_Source\PSoC5/CyFlash.c ****                 status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);\r
- 484:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 485:.\Generated_Source\PSoC5/CyFlash.c ****                 if(CYRET_STARTED == status)\r
- 486:.\Generated_Source\PSoC5/CyFlash.c ****                 {\r
- 487:.\Generated_Source\PSoC5/CyFlash.c ****                     while(CY_SPC_BUSY)\r
- 488:.\Generated_Source\PSoC5/CyFlash.c ****                     {\r
- 489:.\Generated_Source\PSoC5/CyFlash.c ****                         /* Wait for SPC to finish and get SPC status */\r
- 490:.\Generated_Source\PSoC5/CyFlash.c ****                         CyDelayUs(1u);\r
- 491:.\Generated_Source\PSoC5/CyFlash.c ****                     }\r
- 492:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 493:.\Generated_Source\PSoC5/CyFlash.c ****                     /* Hide SPC status */\r
- 494:.\Generated_Source\PSoC5/CyFlash.c ****                     if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)\r
- 495:.\Generated_Source\PSoC5/CyFlash.c ****                     {\r
- 496:.\Generated_Source\PSoC5/CyFlash.c ****                         status = CYRET_SUCCESS;\r
- 497:.\Generated_Source\PSoC5/CyFlash.c ****                     }\r
- 498:.\Generated_Source\PSoC5/CyFlash.c ****                     else\r
- 499:.\Generated_Source\PSoC5/CyFlash.c ****                     {\r
- 500:.\Generated_Source\PSoC5/CyFlash.c ****                         status = CYRET_UNKNOWN;\r
- 352                           .loc 1 500 0\r
- 353 0044 4FF0FF34             mov     r4, #-1\r
- 354                   .L44:\r
- 355                   .LVL26:\r
- 501:.\Generated_Source\PSoC5/CyFlash.c ****                     }\r
- 502:.\Generated_Source\PSoC5/CyFlash.c ****                 }\r
- 503:.\Generated_Source\PSoC5/CyFlash.c ****             }\r
- 504:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 505:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 506:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 507:.\Generated_Source\PSoC5/CyFlash.c ****         CySpcUnlock();\r
- 356                           .loc 1 507 0\r
- 357 0048 FFF7FEFF             bl      CySpcUnlock\r
- 358                   .LVL27:\r
- 359 004c 22E0                 b       .L61\r
- 360                   .LVL28:\r
- 361                   .L49:\r
- 362                   .LBE15:\r
- 363                   .LBE14:\r
- 508:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 509:.\Generated_Source\PSoC5/CyFlash.c ****     else\r
- 510:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 511:.\Generated_Source\PSoC5/CyFlash.c ****         status = CYRET_LOCKED;\r
- 364                           .loc 1 511 0\r
- 365 004e 0424                 movs    r4, #4\r
- 366                   .LVL29:\r
- 367 0050 20E0                 b       .L61\r
- 368                   .LVL30:\r
- 369                   .L46:\r
- 370                   .LBB17:\r
- 371                   .LBB16:\r
- 483:.\Generated_Source\PSoC5/CyFlash.c ****                 status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);\r
- 372                           .loc 1 483 0\r
- 373 0052 124C                 ldr     r4, .L64+4\r
- 374 0054 2846                 mov     r0, r5\r
- 375 0056 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 17\r
-\r
-\r
- 376 0058 6378                 ldrb    r3, [r4, #1]    @ zero_extendqisi2\r
- 377 005a 3146                 mov     r1, r6\r
- 378 005c FFF7FEFF             bl      CySpcWriteRow\r
- 379                   .LVL31:\r
- 485:.\Generated_Source\PSoC5/CyFlash.c ****                 if(CYRET_STARTED == status)\r
- 380                           .loc 1 485 0\r
- 381 0060 0728                 cmp     r0, #7\r
- 483:.\Generated_Source\PSoC5/CyFlash.c ****                 status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);\r
- 382                           .loc 1 483 0\r
- 383 0062 0446                 mov     r4, r0\r
- 384                   .LVL32:\r
- 485:.\Generated_Source\PSoC5/CyFlash.c ****                 if(CYRET_STARTED == status)\r
- 385                           .loc 1 485 0\r
- 386 0064 F0D1                 bne     .L44\r
- 387                   .LVL33:\r
- 388                   .L58:\r
- 487:.\Generated_Source\PSoC5/CyFlash.c ****                     while(CY_SPC_BUSY)\r
- 389                           .loc 1 487 0\r
- 390 0066 0C49                 ldr     r1, .L64\r
- 391 0068 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 392 006a 02F00200             and     r0, r2, #2\r
- 393 006e C3B2                 uxtb    r3, r0\r
- 394 0070 1BB9                 cbnz    r3, .L63\r
- 395                   .L47:\r
- 490:.\Generated_Source\PSoC5/CyFlash.c ****                         CyDelayUs(1u);\r
- 396                           .loc 1 490 0\r
- 397 0072 0120                 movs    r0, #1\r
- 398 0074 FFF7FEFF             bl      CyDelayUs\r
- 399                   .LVL34:\r
- 400 0078 F5E7                 b       .L58\r
- 401                   .L63:\r
- 494:.\Generated_Source\PSoC5/CyFlash.c ****                     if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)\r
- 402                           .loc 1 494 0\r
- 403 007a 0C78                 ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
- 404                   .LVL35:\r
- 405 007c 04F00202             and     r2, r4, #2\r
- 406 0080 D0B2                 uxtb    r0, r2\r
- 407 0082 0028                 cmp     r0, #0\r
- 408 0084 DED0                 beq     .L51\r
- 409 0086 0978                 ldrb    r1, [r1, #0]    @ zero_extendqisi2\r
- 496:.\Generated_Source\PSoC5/CyFlash.c ****                         status = CYRET_SUCCESS;\r
- 410                           .loc 1 496 0\r
- 411 0088 8B08                 lsrs    r3, r1, #2\r
- 412 008a 14BF                 ite     ne\r
- 413 008c 4FF0FF34             movne   r4, #-1\r
- 414 0090 0024                 moveq   r4, #0\r
- 415 0092 D9E7                 b       .L44\r
- 416                   .LVL36:\r
- 417                   .L61:\r
- 418                   .LBE16:\r
- 419                   .LBE17:\r
- 512:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 513:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 514:.\Generated_Source\PSoC5/CyFlash.c ****     return(status);\r
- 515:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 420                           .loc 1 515 0\r
- 421 0094 2046                 mov     r0, r4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 18\r
-\r
-\r
- 422 0096 F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 423                   .L65:\r
- 424                           .align  2\r
- 425                   .L64:\r
- 426 0098 22470040             .word   1073760034\r
- 427 009c 00000000             .word   dieTemperature\r
- 428                           .cfi_endproc\r
- 429                   .LFE7:\r
- 430                           .size   CyWriteRowFull, .-CyWriteRowFull\r
- 431                           .section        .text.CyWriteRowConfig,"ax",%progbits\r
- 432                           .align  1\r
- 433                           .global CyWriteRowConfig\r
- 434                           .thumb\r
- 435                           .thumb_func\r
- 436                           .type   CyWriteRowConfig, %function\r
- 437                   CyWriteRowConfig:\r
- 438                   .LFB6:\r
- 387:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 439                           .loc 1 387 0\r
- 440                           .cfi_startproc\r
- 441                           @ args = 0, pretend = 0, frame = 0\r
- 442                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 443                   .LVL37:\r
- 393:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 444                           .loc 1 393 0\r
- 445 0000 104B                 ldr     r3, .L72\r
- 387:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 446                           .loc 1 387 0\r
- 447 0002 70B5                 push    {r4, r5, r6, lr}\r
- 448                   .LCFI4:\r
- 449                           .cfi_def_cfa_offset 16\r
- 450                           .cfi_offset 4, -16\r
- 451                           .cfi_offset 5, -12\r
- 452                           .cfi_offset 6, -8\r
- 453                           .cfi_offset 14, -4\r
- 393:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 454                           .loc 1 393 0\r
- 455 0004 1C68                 ldr     r4, [r3, #0]\r
- 456 0006 D4B1                 cbz     r4, .L67\r
- 396:.\Generated_Source\PSoC5/CyFlash.c ****             offset = ((uint32)arrayId * CYDEV_FLS_SECTOR_SIZE) +\r
- 457                           .loc 1 396 0\r
- 458 0008 01EB0026             add     r6, r1, r0, lsl #8\r
- 459 000c 3602                 lsls    r6, r6, #8\r
- 460                   .LVL38:\r
- 461 000e 0023                 movs    r3, #0\r
- 462                   .LVL39:\r
- 463                   .L68:\r
- 405:.\Generated_Source\PSoC5/CyFlash.c ****                 rowBuffer[i] = CY_GET_XTND_REG8((void CYFAR *)(offset + i));\r
- 464                           .loc 1 405 0 discriminator 2\r
- 465 0010 9D5D                 ldrb    r5, [r3, r6]    @ zero_extendqisi2\r
- 466 0012 E554                 strb    r5, [r4, r3]\r
- 467 0014 0133                 adds    r3, r3, #1\r
- 403:.\Generated_Source\PSoC5/CyFlash.c ****             for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)\r
- 468                           .loc 1 403 0 discriminator 2\r
- 469 0016 B3F5807F             cmp     r3, #256\r
- 470 001a F9D1                 bne     .L68\r
- 413:.\Generated_Source\PSoC5/CyFlash.c ****                 (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 19\r
-\r
-\r
- 471                           .loc 1 413 0\r
- 472 001c 04F58073             add     r3, r4, #256\r
- 473 0020 02F12005             add     r5, r2, #32\r
- 474                   .LVL40:\r
- 475                   .L69:\r
- 476 0024 52F8046B             ldr     r6, [r2], #4    @ unaligned\r
- 477 0028 AA42                 cmp     r2, r5\r
- 478 002a 43F8046B             str     r6, [r3], #4    @ unaligned\r
- 479 002e F9D1                 bne     .L69\r
- 418:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, CYDEV_FLS_ROW_SIZE + CYDEV_ECC_\r
- 480                           .loc 1 418 0\r
- 481 0030 2246                 mov     r2, r4\r
- 482 0032 4FF49073             mov     r3, #288\r
- 426:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 483                           .loc 1 426 0\r
- 484 0036 BDE87040             pop     {r4, r5, r6, lr}\r
- 418:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, CYDEV_FLS_ROW_SIZE + CYDEV_ECC_\r
- 485                           .loc 1 418 0\r
- 486 003a FFF7FEBF             b       CyWriteRowFull\r
- 487                   .LVL41:\r
- 488                   .L67:\r
- 426:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 489                           .loc 1 426 0\r
- 490 003e 4FF0FF30             mov     r0, #-1\r
- 491                   .LVL42:\r
- 492 0042 70BD                 pop     {r4, r5, r6, pc}\r
- 493                   .L73:\r
- 494                           .align  2\r
- 495                   .L72:\r
- 496 0044 00000000             .word   .LANCHOR0\r
- 497                           .cfi_endproc\r
- 498                   .LFE6:\r
- 499                           .size   CyWriteRowConfig, .-CyWriteRowConfig\r
- 500                           .section        .text.CyWriteRowData,"ax",%progbits\r
- 501                           .align  1\r
- 502                           .global CyWriteRowData\r
- 503                           .thumb\r
- 504                           .thumb_func\r
- 505                           .type   CyWriteRowData, %function\r
- 506                   CyWriteRowData:\r
- 507                   .LFB5:\r
- 311:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 508                           .loc 1 311 0\r
- 509                           .cfi_startproc\r
- 510                           @ args = 0, pretend = 0, frame = 0\r
- 511                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 512                   .LVL43:\r
- 318:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 513                           .loc 1 318 0\r
- 514 0000 154B                 ldr     r3, .L80\r
- 311:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 515                           .loc 1 311 0\r
- 516 0002 2DE9F041             push    {r4, r5, r6, r7, r8, lr}\r
- 517                   .LCFI5:\r
- 518                           .cfi_def_cfa_offset 24\r
- 519                           .cfi_offset 4, -24\r
- 520                           .cfi_offset 5, -20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 20\r
-\r
-\r
- 521                           .cfi_offset 6, -16\r
- 522                           .cfi_offset 7, -12\r
- 523                           .cfi_offset 8, -8\r
- 524                           .cfi_offset 14, -4\r
- 318:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 525                           .loc 1 318 0\r
- 526 0006 1C68                 ldr     r4, [r3, #0]\r
- 311:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 527                           .loc 1 311 0\r
- 528 0008 0546                 mov     r5, r0\r
- 529 000a 0F46                 mov     r7, r1\r
- 318:.\Generated_Source\PSoC5/CyFlash.c ****         if(NULL != rowBuffer)\r
- 530                           .loc 1 318 0\r
- 531 000c 04B3                 cbz     r4, .L75\r
- 320:.\Generated_Source\PSoC5/CyFlash.c ****             if(arrayId > CY_SPC_LAST_FLASH_ARRAYID)\r
- 532                           .loc 1 320 0\r
- 533 000e 3F28                 cmp     r0, #63\r
- 534 0010 0FD8                 bhi     .L78\r
- 535                   .LVL44:\r
- 330:.\Generated_Source\PSoC5/CyFlash.c ****                         ((uint32)arrayId * CYDEV_ECC_SECTOR_SIZE) +\r
- 536                           .loc 1 330 0\r
- 537 0012 00F51036             add     r6, r0, #147456\r
- 538 0016 01EB0620             add     r0, r1, r6, lsl #8\r
- 539                   .LVL45:\r
- 329:.\Generated_Source\PSoC5/CyFlash.c ****                 offset = CYDEV_ECC_BASE +\r
- 540                           .loc 1 329 0\r
- 541 001a 4601                 lsls    r6, r0, #5\r
- 542                   .LVL46:\r
- 543 001c 0023                 movs    r3, #0\r
- 544                   .LVL47:\r
- 545                   .L77:\r
- 335:.\Generated_Source\PSoC5/CyFlash.c ****                     *(rowBuffer + CYDEV_FLS_ROW_SIZE + i) = CY_GET_XTND_REG8((void CYFAR *)(offset \r
- 546                           .loc 1 335 0 discriminator 2\r
- 547 001e 985D                 ldrb    r0, [r3, r6]    @ zero_extendqisi2\r
- 310:.\Generated_Source\PSoC5/CyFlash.c ****     cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) \r
- 548                           .loc 1 310 0 discriminator 2\r
- 549 0020 E118                 adds    r1, r4, r3\r
- 550 0022 0133                 adds    r3, r3, #1\r
- 333:.\Generated_Source\PSoC5/CyFlash.c ****                 for(i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)\r
- 551                           .loc 1 333 0 discriminator 2\r
- 552 0024 202B                 cmp     r3, #32\r
- 335:.\Generated_Source\PSoC5/CyFlash.c ****                     *(rowBuffer + CYDEV_FLS_ROW_SIZE + i) = CY_GET_XTND_REG8((void CYFAR *)(offset \r
- 553                           .loc 1 335 0 discriminator 2\r
- 554 0026 81F80001             strb    r0, [r1, #256]\r
- 333:.\Generated_Source\PSoC5/CyFlash.c ****                 for(i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)\r
- 555                           .loc 1 333 0 discriminator 2\r
- 556 002a F8D1                 bne     .L77\r
- 326:.\Generated_Source\PSoC5/CyFlash.c ****                 rowSize = CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE;\r
- 557                           .loc 1 326 0\r
- 558 002c 4FF49076             mov     r6, #288\r
- 559                   .LVL48:\r
- 560 0030 00E0                 b       .L76\r
- 561                   .LVL49:\r
- 562                   .L78:\r
- 322:.\Generated_Source\PSoC5/CyFlash.c ****                 rowSize = CYDEV_EEPROM_ROW_SIZE;\r
- 563                           .loc 1 322 0\r
- 564 0032 1026                 movs    r6, #16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 21\r
-\r
-\r
- 565                   .LVL50:\r
- 566                   .L76:\r
- 343:.\Generated_Source\PSoC5/CyFlash.c ****             (void) memcpy((void *) rowBuffer, (const void *) rowData, CYDEV_FLS_ROW_SIZE);\r
- 567                           .loc 1 343 0\r
- 568 0034 1146                 mov     r1, r2\r
- 569 0036 2046                 mov     r0, r4\r
- 570 0038 4FF48072             mov     r2, #256\r
- 571                   .LVL51:\r
- 572 003c FFF7FEFF             bl      memcpy\r
- 573                   .LVL52:\r
- 346:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, rowSize);\r
- 574                           .loc 1 346 0\r
- 575 0040 2846                 mov     r0, r5\r
- 576 0042 3946                 mov     r1, r7\r
- 577 0044 2246                 mov     r2, r4\r
- 578 0046 3346                 mov     r3, r6\r
- 354:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 579                           .loc 1 354 0\r
- 580 0048 BDE8F041             pop     {r4, r5, r6, r7, r8, lr}\r
- 346:.\Generated_Source\PSoC5/CyFlash.c ****             status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, rowSize);\r
- 581                           .loc 1 346 0\r
- 582 004c FFF7FEBF             b       CyWriteRowFull\r
- 583                   .LVL53:\r
- 584                   .L75:\r
- 354:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 585                           .loc 1 354 0\r
- 586 0050 4FF0FF30             mov     r0, #-1\r
- 587                   .LVL54:\r
- 588 0054 BDE8F081             pop     {r4, r5, r6, r7, r8, pc}\r
- 589                   .L81:\r
- 590                           .align  2\r
- 591                   .L80:\r
- 592 0058 00000000             .word   .LANCHOR0\r
- 593                           .cfi_endproc\r
- 594                   .LFE5:\r
- 595                           .size   CyWriteRowData, .-CyWriteRowData\r
- 596                           .section        .text.CyFlash_SetWaitCycles,"ax",%progbits\r
- 597                           .align  1\r
- 598                           .global CyFlash_SetWaitCycles\r
- 599                           .thumb\r
- 600                           .thumb_func\r
- 601                           .type   CyFlash_SetWaitCycles, %function\r
- 602                   CyFlash_SetWaitCycles:\r
- 603                   .LFB8:\r
- 516:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 517:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 518:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 519:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyFlash_SetWaitCycles\r
- 520:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 521:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 522:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 523:.\Generated_Source\PSoC5/CyFlash.c **** *  Sets the number of clock cycles the cache will wait before it samples data\r
- 524:.\Generated_Source\PSoC5/CyFlash.c **** *  coming back from Flash. This function must be called before increasing CPU\r
- 525:.\Generated_Source\PSoC5/CyFlash.c **** *  clock frequency. It can optionally be called after lowering CPU clock\r
- 526:.\Generated_Source\PSoC5/CyFlash.c **** *  frequency in order to improve CPU performance.\r
- 527:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 528:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 22\r
-\r
-\r
- 529:.\Generated_Source\PSoC5/CyFlash.c **** *  uint8 freq:\r
- 530:.\Generated_Source\PSoC5/CyFlash.c **** *   Frequency of operation in Megahertz.\r
- 531:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 532:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 533:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 534:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 535:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 536:.\Generated_Source\PSoC5/CyFlash.c **** void CyFlash_SetWaitCycles(uint8 freq) \r
- 537:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 604                           .loc 1 537 0\r
- 605                           .cfi_startproc\r
- 606                           @ args = 0, pretend = 0, frame = 0\r
- 607                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 608                   .LVL55:\r
- 609 0000 10B5                 push    {r4, lr}\r
- 610                   .LCFI6:\r
- 611                           .cfi_def_cfa_offset 8\r
- 612                           .cfi_offset 4, -8\r
- 613                           .cfi_offset 14, -4\r
- 614                           .loc 1 537 0\r
- 615 0002 0446                 mov     r4, r0\r
- 538:.\Generated_Source\PSoC5/CyFlash.c ****     uint8 interruptState;\r
- 539:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 540:.\Generated_Source\PSoC5/CyFlash.c ****     /* Save current global interrupt enable and disable it */\r
- 541:.\Generated_Source\PSoC5/CyFlash.c ****     interruptState = CyEnterCriticalSection();\r
- 616                           .loc 1 541 0\r
- 617 0004 FFF7FEFF             bl      CyEnterCriticalSection\r
- 618                   .LVL56:\r
- 619 0008 0D4B                 ldr     r3, .L88\r
- 542:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 543:.\Generated_Source\PSoC5/CyFlash.c ****     /***************************************************************************\r
- 544:.\Generated_Source\PSoC5/CyFlash.c ****     * The number of clock cycles the cache will wait before it samples data\r
- 545:.\Generated_Source\PSoC5/CyFlash.c ****     * coming back from Flash must be equal or greater to to the CPU frequency\r
- 546:.\Generated_Source\PSoC5/CyFlash.c ****     * outlined in clock cycles.\r
- 547:.\Generated_Source\PSoC5/CyFlash.c ****     ***************************************************************************/\r
- 548:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 549:.\Generated_Source\PSoC5/CyFlash.c ****     #if (CY_PSOC3)\r
- 550:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 551:.\Generated_Source\PSoC5/CyFlash.c ****         if (freq <= 22u)\r
- 552:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 553:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 554:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_LESSER_OR_EQUAL_22MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 555:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 556:.\Generated_Source\PSoC5/CyFlash.c ****         else if (freq <= 44u)\r
- 557:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 558:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 559:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_LESSER_OR_EQUAL_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 560:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 561:.\Generated_Source\PSoC5/CyFlash.c ****         else\r
- 562:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 563:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 564:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_GREATER_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 565:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 566:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 567:.\Generated_Source\PSoC5/CyFlash.c ****     #endif  /* (CY_PSOC3) */\r
- 568:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 569:.\Generated_Source\PSoC5/CyFlash.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 23\r
-\r
-\r
- 570:.\Generated_Source\PSoC5/CyFlash.c ****     #if (CY_PSOC5)\r
- 571:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 572:.\Generated_Source\PSoC5/CyFlash.c ****         if (freq <= 16u)\r
- 620                           .loc 1 572 0\r
- 621 000a 102C                 cmp     r4, #16\r
- 573:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 574:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 622                           .loc 1 574 0\r
- 623 000c 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 572:.\Generated_Source\PSoC5/CyFlash.c ****         if (freq <= 16u)\r
- 624                           .loc 1 572 0\r
- 625 000e 04D8                 bhi     .L83\r
- 626                           .loc 1 574 0\r
- 627 0010 02F03F02             and     r2, r2, #63\r
- 628 0014 42F04002             orr     r2, r2, #64\r
- 629 0018 0CE0                 b       .L87\r
- 630                   .L83:\r
- 575:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_LESSER_OR_EQUAL_16MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 576:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 577:.\Generated_Source\PSoC5/CyFlash.c ****         else if (freq <= 33u)\r
- 631                           .loc 1 577 0\r
- 632 001a 212C                 cmp     r4, #33\r
- 633 001c 04D8                 bhi     .L85\r
- 578:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 579:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 634                           .loc 1 579 0\r
- 635 001e 02F03F01             and     r1, r2, #63\r
- 636 0022 41F08002             orr     r2, r1, #128\r
- 637 0026 05E0                 b       .L87\r
- 638                   .L85:\r
- 580:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_LESSER_OR_EQUAL_33MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 581:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 582:.\Generated_Source\PSoC5/CyFlash.c ****         else if (freq <= 50u)\r
- 639                           .loc 1 582 0\r
- 640 0028 322C                 cmp     r4, #50\r
- 583:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 584:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 641                           .loc 1 584 0\r
- 642 002a 94BF                 ite     ls\r
- 643 002c 42F0C002             orrls   r2, r2, #192\r
- 585:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_LESSER_OR_EQUAL_50MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 586:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 587:.\Generated_Source\PSoC5/CyFlash.c ****         else\r
- 588:.\Generated_Source\PSoC5/CyFlash.c ****         {\r
- 589:.\Generated_Source\PSoC5/CyFlash.c ****             *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
- 644                           .loc 1 589 0\r
- 645 0030 02F03F02             andhi   r2, r2, #63\r
- 646                   .L87:\r
- 647 0034 1A70                 strb    r2, [r3, #0]\r
- 590:.\Generated_Source\PSoC5/CyFlash.c ****                 ((uint8)(CY_FLASH_GREATER_51MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
- 591:.\Generated_Source\PSoC5/CyFlash.c ****         }\r
- 592:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 593:.\Generated_Source\PSoC5/CyFlash.c ****     #endif  /* (CY_PSOC5) */\r
- 594:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 595:.\Generated_Source\PSoC5/CyFlash.c ****     /* Restore global interrupt enable state */\r
- 596:.\Generated_Source\PSoC5/CyFlash.c ****     CyExitCriticalSection(interruptState);\r
- 597:.\Generated_Source\PSoC5/CyFlash.c **** }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 24\r
-\r
-\r
- 648                           .loc 1 597 0\r
- 649 0036 BDE81040             pop     {r4, lr}\r
- 596:.\Generated_Source\PSoC5/CyFlash.c ****     CyExitCriticalSection(interruptState);\r
- 650                           .loc 1 596 0\r
- 651 003a FFF7FEBF             b       CyExitCriticalSection\r
- 652                   .LVL57:\r
- 653                   .L89:\r
- 654 003e 00BF                 .align  2\r
- 655                   .L88:\r
- 656 0040 00480040             .word   1073760256\r
- 657                           .cfi_endproc\r
- 658                   .LFE8:\r
- 659                           .size   CyFlash_SetWaitCycles, .-CyFlash_SetWaitCycles\r
- 660                           .section        .text.CyEEPROM_Start,"ax",%progbits\r
- 661                           .align  1\r
- 662                           .global CyEEPROM_Start\r
- 663                           .thumb\r
- 664                           .thumb_func\r
- 665                           .type   CyEEPROM_Start, %function\r
- 666                   CyEEPROM_Start:\r
- 667                   .LFB9:\r
- 598:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 599:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 600:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 601:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyEEPROM_Start\r
- 602:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 603:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 604:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 605:.\Generated_Source\PSoC5/CyFlash.c **** *  Enable the EEPROM.\r
- 606:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 607:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 608:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 609:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 610:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 611:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 612:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 613:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 614:.\Generated_Source\PSoC5/CyFlash.c **** void CyEEPROM_Start(void) \r
- 615:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 668                           .loc 1 615 0\r
- 669                           .cfi_startproc\r
- 670                           @ args = 0, pretend = 0, frame = 0\r
- 671                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 672                           @ link register save eliminated.\r
- 616:.\Generated_Source\PSoC5/CyFlash.c ****     /* Active Power Mode */\r
- 617:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;\r
- 673                           .loc 1 617 0\r
- 674 0000 044B                 ldr     r3, .L91\r
- 675 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 676 0004 42F01000             orr     r0, r2, #16\r
- 677 0008 1870                 strb    r0, [r3, #0]\r
- 618:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 619:.\Generated_Source\PSoC5/CyFlash.c ****     /* Standby Power Mode */\r
- 620:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;\r
- 678                           .loc 1 620 0\r
- 679 000a 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
- 680 000c 41F01002             orr     r2, r1, #16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 25\r
-\r
-\r
- 681 0010 1A74                 strb    r2, [r3, #16]\r
- 682 0012 7047                 bx      lr\r
- 683                   .L92:\r
- 684                           .align  2\r
- 685                   .L91:\r
- 686 0014 AC430040             .word   1073759148\r
- 687                           .cfi_endproc\r
- 688                   .LFE9:\r
- 689                           .size   CyEEPROM_Start, .-CyEEPROM_Start\r
- 690                           .section        .text.CyEEPROM_Stop,"ax",%progbits\r
- 691                           .align  1\r
- 692                           .global CyEEPROM_Stop\r
- 693                           .thumb\r
- 694                           .thumb_func\r
- 695                           .type   CyEEPROM_Stop, %function\r
- 696                   CyEEPROM_Stop:\r
- 697                   .LFB10:\r
- 621:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 622:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 623:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 624:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 625:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyEEPROM_Stop\r
- 626:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 627:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 628:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 629:.\Generated_Source\PSoC5/CyFlash.c **** *  Disable the EEPROM.\r
- 630:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 631:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 632:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 633:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 634:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 635:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 636:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 637:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 638:.\Generated_Source\PSoC5/CyFlash.c **** void CyEEPROM_Stop (void) \r
- 639:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 698                           .loc 1 639 0\r
- 699                           .cfi_startproc\r
- 700                           @ args = 0, pretend = 0, frame = 0\r
- 701                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 702                           @ link register save eliminated.\r
- 640:.\Generated_Source\PSoC5/CyFlash.c ****     /* Active Power Mode */\r
- 641:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));\r
- 703                           .loc 1 641 0\r
- 704 0000 044B                 ldr     r3, .L94\r
- 705 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 706 0004 02F0EF00             and     r0, r2, #239\r
- 707 0008 1870                 strb    r0, [r3, #0]\r
- 642:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 643:.\Generated_Source\PSoC5/CyFlash.c ****     /* Standby Power Mode */\r
- 644:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));\r
- 708                           .loc 1 644 0\r
- 709 000a 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
- 710 000c 01F0EF02             and     r2, r1, #239\r
- 711 0010 1A74                 strb    r2, [r3, #16]\r
- 712 0012 7047                 bx      lr\r
- 713                   .L95:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 26\r
-\r
-\r
- 714                           .align  2\r
- 715                   .L94:\r
- 716 0014 AC430040             .word   1073759148\r
- 717                           .cfi_endproc\r
- 718                   .LFE10:\r
- 719                           .size   CyEEPROM_Stop, .-CyEEPROM_Stop\r
- 720                           .section        .text.CyEEPROM_ReadReserve,"ax",%progbits\r
- 721                           .align  1\r
- 722                           .global CyEEPROM_ReadReserve\r
- 723                           .thumb\r
- 724                           .thumb_func\r
- 725                           .type   CyEEPROM_ReadReserve, %function\r
- 726                   CyEEPROM_ReadReserve:\r
- 727                   .LFB11:\r
- 645:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 646:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 647:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 648:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 649:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyEEPROM_ReadReserve\r
- 650:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 651:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 652:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 653:.\Generated_Source\PSoC5/CyFlash.c **** *  Request access to the EEPROM for reading and wait until access is available.\r
- 654:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 655:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 656:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 657:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 658:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 659:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 660:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 661:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 662:.\Generated_Source\PSoC5/CyFlash.c **** void CyEEPROM_ReadReserve(void) \r
- 663:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 728                           .loc 1 663 0\r
- 729                           .cfi_startproc\r
- 730                           @ args = 0, pretend = 0, frame = 0\r
- 731                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 732                           @ link register save eliminated.\r
- 664:.\Generated_Source\PSoC5/CyFlash.c ****     /* Make a request for PHUB to have access */\r
- 665:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_EE_SCR_PTR |= CY_FLASH_EE_SCR_AHB_EE_REQ;\r
- 733                           .loc 1 665 0\r
- 734 0000 064B                 ldr     r3, .L102\r
- 735 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 736 0004 42F00100             orr     r0, r2, #1\r
- 737 0008 1870                 strb    r0, [r3, #0]\r
- 738                   .L97:\r
- 666:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 667:.\Generated_Source\PSoC5/CyFlash.c ****     while (0u == (*CY_FLASH_EE_SCR_PTR & CY_FLASH_EE_SCR_AHB_EE_ACK))\r
- 739                           .loc 1 667 0 discriminator 1\r
- 740 000a 0449                 ldr     r1, .L102\r
- 741 000c 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 742 000e 03F00202             and     r2, r3, #2\r
- 743 0012 D0B2                 uxtb    r0, r2\r
- 744 0014 0028                 cmp     r0, #0\r
- 745 0016 F8D0                 beq     .L97\r
- 668:.\Generated_Source\PSoC5/CyFlash.c ****     {\r
- 669:.\Generated_Source\PSoC5/CyFlash.c ****         /* Wait for acknowledgement from PHUB */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 27\r
-\r
-\r
- 670:.\Generated_Source\PSoC5/CyFlash.c ****     }\r
- 671:.\Generated_Source\PSoC5/CyFlash.c **** }\r
- 746                           .loc 1 671 0\r
- 747 0018 7047                 bx      lr\r
- 748                   .L103:\r
- 749 001a 00BF                 .align  2\r
- 750                   .L102:\r
- 751 001c 02470040             .word   1073760002\r
- 752                           .cfi_endproc\r
- 753                   .LFE11:\r
- 754                           .size   CyEEPROM_ReadReserve, .-CyEEPROM_ReadReserve\r
- 755                           .section        .text.CyEEPROM_ReadRelease,"ax",%progbits\r
- 756                           .align  1\r
- 757                           .global CyEEPROM_ReadRelease\r
- 758                           .thumb\r
- 759                           .thumb_func\r
- 760                           .type   CyEEPROM_ReadRelease, %function\r
- 761                   CyEEPROM_ReadRelease:\r
- 762                   .LFB12:\r
- 672:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 673:.\Generated_Source\PSoC5/CyFlash.c **** \r
- 674:.\Generated_Source\PSoC5/CyFlash.c **** /*******************************************************************************\r
- 675:.\Generated_Source\PSoC5/CyFlash.c **** * Function Name: CyEEPROM_ReadRelease\r
- 676:.\Generated_Source\PSoC5/CyFlash.c **** ********************************************************************************\r
- 677:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 678:.\Generated_Source\PSoC5/CyFlash.c **** * Summary:\r
- 679:.\Generated_Source\PSoC5/CyFlash.c **** *  Release the read reservation of the EEPROM.\r
- 680:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 681:.\Generated_Source\PSoC5/CyFlash.c **** * Parameters:\r
- 682:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 683:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 684:.\Generated_Source\PSoC5/CyFlash.c **** * Return:\r
- 685:.\Generated_Source\PSoC5/CyFlash.c **** *  None\r
- 686:.\Generated_Source\PSoC5/CyFlash.c **** *\r
- 687:.\Generated_Source\PSoC5/CyFlash.c **** *******************************************************************************/\r
- 688:.\Generated_Source\PSoC5/CyFlash.c **** void CyEEPROM_ReadRelease(void) \r
- 689:.\Generated_Source\PSoC5/CyFlash.c **** {\r
- 763                           .loc 1 689 0\r
- 764                           .cfi_startproc\r
- 765                           @ args = 0, pretend = 0, frame = 0\r
- 766                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 767                           @ link register save eliminated.\r
- 690:.\Generated_Source\PSoC5/CyFlash.c ****     *CY_FLASH_EE_SCR_PTR |= 0x00u;\r
- 768                           .loc 1 690 0\r
- 769 0000 014B                 ldr     r3, .L105\r
- 770 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 771 0004 1A70                 strb    r2, [r3, #0]\r
- 772 0006 7047                 bx      lr\r
- 773                   .L106:\r
- 774                           .align  2\r
- 775                   .L105:\r
- 776 0008 02470040             .word   1073760002\r
- 777                           .cfi_endproc\r
- 778                   .LFE12:\r
- 779                           .size   CyEEPROM_ReadRelease, .-CyEEPROM_ReadRelease\r
- 780                           .comm   dieTemperature,2,1\r
- 781                           .bss\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 28\r
-\r
-\r
- 782                           .align  2\r
- 783                           .set    .LANCHOR0,. + 0\r
- 784                           .type   rowBuffer, %object\r
- 785                           .size   rowBuffer, 4\r
- 786                   rowBuffer:\r
- 787 0000 00000000             .space  4\r
- 788                           .text\r
- 789                   .Letext0:\r
- 790                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 791                           .file 3 ".\\Generated_Source\\PSoC5\\CySpc.h"\r
- 792                           .file 4 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 793                           .section        .debug_info,"",%progbits\r
- 794                   .Ldebug_info0:\r
- 795 0000 22070000             .4byte  0x722\r
- 796 0004 0200                 .2byte  0x2\r
- 797 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 798 000a 04                   .byte   0x4\r
- 799 000b 01                   .uleb128 0x1\r
- 800 000c 81020000             .4byte  .LASF52\r
- 801 0010 01                   .byte   0x1\r
- 802 0011 CA020000             .4byte  .LASF53\r
- 803 0015 F1000000             .4byte  .LASF54\r
- 804 0019 60000000             .4byte  .Ldebug_ranges0+0x60\r
- 805 001d 00000000             .4byte  0\r
- 806 0021 00000000             .4byte  0\r
- 807 0025 00000000             .4byte  .Ldebug_line0\r
- 808 0029 02                   .uleb128 0x2\r
- 809 002a 01                   .byte   0x1\r
- 810 002b 06                   .byte   0x6\r
- 811 002c 05030000             .4byte  .LASF0\r
- 812 0030 02                   .uleb128 0x2\r
- 813 0031 01                   .byte   0x1\r
- 814 0032 08                   .byte   0x8\r
- 815 0033 50010000             .4byte  .LASF1\r
- 816 0037 02                   .uleb128 0x2\r
- 817 0038 02                   .byte   0x2\r
- 818 0039 05                   .byte   0x5\r
- 819 003a 7A010000             .4byte  .LASF2\r
- 820 003e 02                   .uleb128 0x2\r
- 821 003f 02                   .byte   0x2\r
- 822 0040 07                   .byte   0x7\r
- 823 0041 3F000000             .4byte  .LASF3\r
- 824 0045 02                   .uleb128 0x2\r
- 825 0046 04                   .byte   0x4\r
- 826 0047 05                   .byte   0x5\r
- 827 0048 ED020000             .4byte  .LASF4\r
- 828 004c 02                   .uleb128 0x2\r
- 829 004d 04                   .byte   0x4\r
- 830 004e 07                   .byte   0x7\r
- 831 004f DF000000             .4byte  .LASF5\r
- 832 0053 02                   .uleb128 0x2\r
- 833 0054 08                   .byte   0x8\r
- 834 0055 05                   .byte   0x5\r
- 835 0056 42020000             .4byte  .LASF6\r
- 836 005a 02                   .uleb128 0x2\r
- 837 005b 08                   .byte   0x8\r
- 838 005c 07                   .byte   0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 29\r
-\r
-\r
- 839 005d 83000000             .4byte  .LASF7\r
- 840 0061 03                   .uleb128 0x3\r
- 841 0062 04                   .byte   0x4\r
- 842 0063 05                   .byte   0x5\r
- 843 0064 696E7400             .ascii  "int\000"\r
- 844 0068 02                   .uleb128 0x2\r
- 845 0069 04                   .byte   0x4\r
- 846 006a 07                   .byte   0x7\r
- 847 006b D5010000             .4byte  .LASF8\r
- 848 006f 04                   .uleb128 0x4\r
- 849 0070 22010000             .4byte  .LASF9\r
- 850 0074 02                   .byte   0x2\r
- 851 0075 5B                   .byte   0x5b\r
- 852 0076 30000000             .4byte  0x30\r
- 853 007a 04                   .uleb128 0x4\r
- 854 007b A6010000             .4byte  .LASF10\r
- 855 007f 02                   .byte   0x2\r
- 856 0080 5C                   .byte   0x5c\r
- 857 0081 3E000000             .4byte  0x3e\r
- 858 0085 04                   .uleb128 0x4\r
- 859 0086 B7010000             .4byte  .LASF11\r
- 860 008a 02                   .byte   0x2\r
- 861 008b 5D                   .byte   0x5d\r
- 862 008c 4C000000             .4byte  0x4c\r
- 863 0090 02                   .uleb128 0x2\r
- 864 0091 04                   .byte   0x4\r
- 865 0092 04                   .byte   0x4\r
- 866 0093 67000000             .4byte  .LASF12\r
- 867 0097 02                   .uleb128 0x2\r
- 868 0098 08                   .byte   0x8\r
- 869 0099 04                   .byte   0x4\r
- 870 009a 5E010000             .4byte  .LASF13\r
- 871 009e 02                   .uleb128 0x2\r
- 872 009f 01                   .byte   0x1\r
- 873 00a0 08                   .byte   0x8\r
- 874 00a1 F6020000             .4byte  .LASF14\r
- 875 00a5 04                   .uleb128 0x4\r
- 876 00a6 00000000             .4byte  .LASF15\r
- 877 00aa 02                   .byte   0x2\r
- 878 00ab E8                   .byte   0xe8\r
- 879 00ac 4C000000             .4byte  0x4c\r
- 880 00b0 04                   .uleb128 0x4\r
- 881 00b1 09000000             .4byte  .LASF16\r
- 882 00b5 02                   .byte   0x2\r
- 883 00b6 F0                   .byte   0xf0\r
- 884 00b7 BB000000             .4byte  0xbb\r
- 885 00bb 05                   .uleb128 0x5\r
- 886 00bc 6F000000             .4byte  0x6f\r
- 887 00c0 02                   .uleb128 0x2\r
- 888 00c1 04                   .byte   0x4\r
- 889 00c2 07                   .byte   0x7\r
- 890 00c3 2F020000             .4byte  .LASF17\r
- 891 00c7 06                   .uleb128 0x6\r
- 892 00c8 04                   .byte   0x4\r
- 893 00c9 07                   .uleb128 0x7\r
- 894 00ca 61020000             .4byte  .LASF55\r
- 895 00ce 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 30\r
-\r
-\r
- 896 00cf 71                   .byte   0x71\r
- 897 00d0 01                   .byte   0x1\r
- 898 00d1 A5000000             .4byte  0xa5\r
- 899 00d5 01                   .byte   0x1\r
- 900 00d6 E6000000             .4byte  0xe6\r
- 901 00da 08                   .uleb128 0x8\r
- 902 00db 60000000             .4byte  .LASF22\r
- 903 00df 01                   .byte   0x1\r
- 904 00e0 73                   .byte   0x73\r
- 905 00e1 A5000000             .4byte  0xa5\r
- 906 00e5 00                   .byte   0\r
- 907 00e6 09                   .uleb128 0x9\r
- 908 00e7 01                   .byte   0x1\r
- 909 00e8 11030000             .4byte  .LASF41\r
- 910 00ec 01                   .byte   0x1\r
- 911 00ed C401                 .2byte  0x1c4\r
- 912 00ef 01                   .byte   0x1\r
- 913 00f0 A5000000             .4byte  0xa5\r
- 914 00f4 01                   .byte   0x1\r
- 915 00f5 36010000             .4byte  0x136\r
- 916 00f9 0A                   .uleb128 0xa\r
- 917 00fa 28010000             .4byte  .LASF18\r
- 918 00fe 01                   .byte   0x1\r
- 919 00ff C401                 .2byte  0x1c4\r
- 920 0101 6F000000             .4byte  0x6f\r
- 921 0105 0A                   .uleb128 0xa\r
- 922 0106 FB020000             .4byte  .LASF19\r
- 923 010a 01                   .byte   0x1\r
- 924 010b C401                 .2byte  0x1c4\r
- 925 010d 7A000000             .4byte  0x7a\r
- 926 0111 0A                   .uleb128 0xa\r
- 927 0112 B9000000             .4byte  .LASF20\r
- 928 0116 01                   .byte   0x1\r
- 929 0117 C401                 .2byte  0x1c4\r
- 930 0119 36010000             .4byte  0x136\r
- 931 011d 0A                   .uleb128 0xa\r
- 932 011e 72010000             .4byte  .LASF21\r
- 933 0122 01                   .byte   0x1\r
- 934 0123 C401                 .2byte  0x1c4\r
- 935 0125 7A000000             .4byte  0x7a\r
- 936 0129 0B                   .uleb128 0xb\r
- 937 012a 60000000             .4byte  .LASF22\r
- 938 012e 01                   .byte   0x1\r
- 939 012f C701                 .2byte  0x1c7\r
- 940 0131 A5000000             .4byte  0xa5\r
- 941 0135 00                   .byte   0\r
- 942 0136 0C                   .uleb128 0xc\r
- 943 0137 04                   .byte   0x4\r
- 944 0138 3C010000             .4byte  0x13c\r
- 945 013c 0D                   .uleb128 0xd\r
- 946 013d 6F000000             .4byte  0x6f\r
- 947 0141 0E                   .uleb128 0xe\r
- 948 0142 C9000000             .4byte  0xc9\r
- 949 0146 00000000             .4byte  .LFB13\r
- 950 014a 54000000             .4byte  .LFE13\r
- 951 014e 00000000             .4byte  .LLST0\r
- 952 0152 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 31\r
-\r
-\r
- 953 0153 AA010000             .4byte  0x1aa\r
- 954 0157 0F                   .uleb128 0xf\r
- 955 0158 DA000000             .4byte  0xda\r
- 956 015c 01                   .byte   0x1\r
- 957 015d 54                   .byte   0x54\r
- 958 015e 10                   .uleb128 0x10\r
- 959 015f 08000000             .4byte  .LVL0\r
- 960 0163 2B060000             .4byte  0x62b\r
- 961 0167 71010000             .4byte  0x171\r
- 962 016b 11                   .uleb128 0x11\r
- 963 016c 01                   .byte   0x1\r
- 964 016d 50                   .byte   0x50\r
- 965 016e 01                   .byte   0x1\r
- 966 016f 31                   .byte   0x31\r
- 967 0170 00                   .byte   0\r
- 968 0171 10                   .uleb128 0x10\r
- 969 0172 28000000             .4byte  .LVL1\r
- 970 0176 43060000             .4byte  0x643\r
- 971 017a 8D010000             .4byte  0x18d\r
- 972 017e 11                   .uleb128 0x11\r
- 973 017f 01                   .byte   0x1\r
- 974 0180 51                   .byte   0x51\r
- 975 0181 01                   .byte   0x1\r
- 976 0182 32                   .byte   0x32\r
- 977 0183 11                   .uleb128 0x11\r
- 978 0184 01                   .byte   0x1\r
- 979 0185 50                   .byte   0x50\r
- 980 0186 05                   .byte   0x5\r
- 981 0187 03                   .byte   0x3\r
- 982 0188 00000000             .4byte  dieTemperature\r
- 983 018c 00                   .byte   0\r
- 984 018d 10                   .uleb128 0x10\r
- 985 018e 3E000000             .4byte  .LVL2\r
- 986 0192 60060000             .4byte  0x660\r
- 987 0196 A0010000             .4byte  0x1a0\r
- 988 019a 11                   .uleb128 0x11\r
- 989 019b 01                   .byte   0x1\r
- 990 019c 50                   .byte   0x50\r
- 991 019d 01                   .byte   0x1\r
- 992 019e 31                   .byte   0x31\r
- 993 019f 00                   .byte   0\r
- 994 01a0 12                   .uleb128 0x12\r
- 995 01a1 46000000             .4byte  .LVL4\r
- 996 01a5 74060000             .4byte  0x674\r
- 997 01a9 00                   .byte   0\r
- 998 01aa 13                   .uleb128 0x13\r
- 999 01ab 01                   .byte   0x1\r
- 1000 01ac E2010000            .4byte  .LASF31\r
- 1001 01b0 01                  .byte   0x1\r
- 1002 01b1 36                  .byte   0x36\r
- 1003 01b2 01                  .byte   0x1\r
- 1004 01b3 00000000            .4byte  .LFB0\r
- 1005 01b7 1C000000            .4byte  .LFE0\r
- 1006 01bb 02                  .byte   0x2\r
- 1007 01bc 7D                  .byte   0x7d\r
- 1008 01bd 00                  .sleb128 0\r
- 1009 01be 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 32\r
-\r
-\r
- 1010 01bf D4010000            .4byte  0x1d4\r
- 1011 01c3 14                  .uleb128 0x14\r
- 1012 01c4 18000000            .4byte  .LVL5\r
- 1013 01c8 01                  .byte   0x1\r
- 1014 01c9 60060000            .4byte  0x660\r
- 1015 01cd 11                  .uleb128 0x11\r
- 1016 01ce 01                  .byte   0x1\r
- 1017 01cf 50                  .byte   0x50\r
- 1018 01d0 01                  .byte   0x1\r
- 1019 01d1 35                  .byte   0x35\r
- 1020 01d2 00                  .byte   0\r
- 1021 01d3 00                  .byte   0\r
- 1022 01d4 15                  .uleb128 0x15\r
- 1023 01d5 01                  .byte   0x1\r
- 1024 01d6 65010000            .4byte  .LASF35\r
- 1025 01da 01                  .byte   0x1\r
- 1026 01db 54                  .byte   0x54\r
- 1027 01dc 01                  .byte   0x1\r
- 1028 01dd 00000000            .4byte  .LFB1\r
- 1029 01e1 18000000            .4byte  .LFE1\r
- 1030 01e5 02                  .byte   0x2\r
- 1031 01e6 7D                  .byte   0x7d\r
- 1032 01e7 00                  .sleb128 0\r
- 1033 01e8 01                  .byte   0x1\r
- 1034 01e9 16                  .uleb128 0x16\r
- 1035 01ea 01                  .byte   0x1\r
- 1036 01eb 38020000            .4byte  .LASF23\r
- 1037 01ef 01                  .byte   0x1\r
- 1038 01f0 B3                  .byte   0xb3\r
- 1039 01f1 01                  .byte   0x1\r
- 1040 01f2 A5000000            .4byte  0xa5\r
- 1041 01f6 00000000            .4byte  .LFB3\r
- 1042 01fa 28000000            .4byte  .LFE3\r
- 1043 01fe 20000000            .4byte  .LLST1\r
- 1044 0202 01                  .byte   0x1\r
- 1045 0203 96020000            .4byte  0x296\r
- 1046 0207 17                  .uleb128 0x17\r
- 1047 0208 60000000            .4byte  .LASF22\r
- 1048 020c 01                  .byte   0x1\r
- 1049 020d B5                  .byte   0xb5\r
- 1050 020e A5000000            .4byte  0xa5\r
- 1051 0212 01                  .byte   0x1\r
- 1052 0213 50                  .byte   0x50\r
- 1053 0214 18                  .uleb128 0x18\r
- 1054 0215 C9000000            .4byte  0xc9\r
- 1055 0219 02000000            .4byte  .LBB6\r
- 1056 021d 00000000            .4byte  .Ldebug_ranges0+0\r
- 1057 0221 01                  .byte   0x1\r
- 1058 0222 B5                  .byte   0xb5\r
- 1059 0223 49020000            .4byte  0x249\r
- 1060 0227 19                  .uleb128 0x19\r
- 1061 0228 18000000            .4byte  .Ldebug_ranges0+0x18\r
- 1062 022c 1A                  .uleb128 0x1a\r
- 1063 022d DA000000            .4byte  0xda\r
- 1064 0231 40000000            .4byte  .LLST2\r
- 1065 0235 12                  .uleb128 0x12\r
- 1066 0236 06000000            .4byte  .LVL6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 33\r
-\r
-\r
- 1067 023a 7E060000            .4byte  0x67e\r
- 1068 023e 12                  .uleb128 0x12\r
- 1069 023f 0A000000            .4byte  .LVL7\r
- 1070 0243 88060000            .4byte  0x688\r
- 1071 0247 00                  .byte   0\r
- 1072 0248 00                  .byte   0\r
- 1073 0249 1B                  .uleb128 0x1b\r
- 1074 024a C9000000            .4byte  0xc9\r
- 1075 024e 12000000            .4byte  .LBB9\r
- 1076 0252 1C000000            .4byte  .LBE9\r
- 1077 0256 01                  .byte   0x1\r
- 1078 0257 B9                  .byte   0xb9\r
- 1079 0258 82020000            .4byte  0x282\r
- 1080 025c 1C                  .uleb128 0x1c\r
- 1081 025d 12000000            .4byte  .LBB10\r
- 1082 0261 1C000000            .4byte  .LBE10\r
- 1083 0265 1A                  .uleb128 0x1a\r
- 1084 0266 DA000000            .4byte  0xda\r
- 1085 026a 60000000            .4byte  .LLST3\r
- 1086 026e 12                  .uleb128 0x12\r
- 1087 026f 16000000            .4byte  .LVL9\r
- 1088 0273 7E060000            .4byte  0x67e\r
- 1089 0277 12                  .uleb128 0x12\r
- 1090 0278 1A000000            .4byte  .LVL10\r
- 1091 027c 88060000            .4byte  0x688\r
- 1092 0280 00                  .byte   0\r
- 1093 0281 00                  .byte   0\r
- 1094 0282 12                  .uleb128 0x12\r
- 1095 0283 10000000            .4byte  .LVL8\r
- 1096 0287 41010000            .4byte  0x141\r
- 1097 028b 1D                  .uleb128 0x1d\r
- 1098 028c 24000000            .4byte  .LVL11\r
- 1099 0290 01                  .byte   0x1\r
- 1100 0291 41010000            .4byte  0x141\r
- 1101 0295 00                  .byte   0\r
- 1102 0296 16                  .uleb128 0x16\r
- 1103 0297 01                  .byte   0x1\r
- 1104 0298 9A000000            .4byte  .LASF24\r
- 1105 029c 01                  .byte   0x1\r
- 1106 029d D4                  .byte   0xd4\r
- 1107 029e 01                  .byte   0x1\r
- 1108 029f A5000000            .4byte  0xa5\r
- 1109 02a3 00000000            .4byte  .LFB4\r
- 1110 02a7 2C000000            .4byte  .LFE4\r
- 1111 02ab 75000000            .4byte  .LLST4\r
- 1112 02af 01                  .byte   0x1\r
- 1113 02b0 EE020000            .4byte  0x2ee\r
- 1114 02b4 1E                  .uleb128 0x1e\r
- 1115 02b5 7A020000            .4byte  .LASF26\r
- 1116 02b9 01                  .byte   0x1\r
- 1117 02ba D4                  .byte   0xd4\r
- 1118 02bb EE020000            .4byte  0x2ee\r
- 1119 02bf 95000000            .4byte  .LLST5\r
- 1120 02c3 1F                  .uleb128 0x1f\r
- 1121 02c4 60000000            .4byte  .LASF22\r
- 1122 02c8 01                  .byte   0x1\r
- 1123 02c9 D6                  .byte   0xd6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 34\r
-\r
-\r
- 1124 02ca A5000000            .4byte  0xa5\r
- 1125 02ce B3000000            .4byte  .LLST6\r
- 1126 02d2 12                  .uleb128 0x12\r
- 1127 02d3 08000000            .4byte  .LVL14\r
- 1128 02d7 7E060000            .4byte  0x67e\r
- 1129 02db 12                  .uleb128 0x12\r
- 1130 02dc 0E000000            .4byte  .LVL15\r
- 1131 02e0 88060000            .4byte  0x688\r
- 1132 02e4 12                  .uleb128 0x12\r
- 1133 02e5 1A000000            .4byte  .LVL16\r
- 1134 02e9 74060000            .4byte  0x674\r
- 1135 02ed 00                  .byte   0\r
- 1136 02ee 0C                  .uleb128 0xc\r
- 1137 02ef 04                  .byte   0x4\r
- 1138 02f0 6F000000            .4byte  0x6f\r
- 1139 02f4 0E                  .uleb128 0xe\r
- 1140 02f5 E6000000            .4byte  0xe6\r
- 1141 02f9 00000000            .4byte  .LFB7\r
- 1142 02fd A0000000            .4byte  .LFE7\r
- 1143 0301 D2000000            .4byte  .LLST7\r
- 1144 0305 01                  .byte   0x1\r
- 1145 0306 EE030000            .4byte  0x3ee\r
- 1146 030a 20                  .uleb128 0x20\r
- 1147 030b F9000000            .4byte  0xf9\r
- 1148 030f F2000000            .4byte  .LLST8\r
- 1149 0313 20                  .uleb128 0x20\r
- 1150 0314 05010000            .4byte  0x105\r
- 1151 0318 13010000            .4byte  .LLST9\r
- 1152 031c 20                  .uleb128 0x20\r
- 1153 031d 11010000            .4byte  0x111\r
- 1154 0321 34010000            .4byte  .LLST10\r
- 1155 0325 20                  .uleb128 0x20\r
- 1156 0326 1D010000            .4byte  0x11d\r
- 1157 032a 52010000            .4byte  .LLST11\r
- 1158 032e 1A                  .uleb128 0x1a\r
- 1159 032f 29010000            .4byte  0x129\r
- 1160 0333 73010000            .4byte  .LLST12\r
- 1161 0337 21                  .uleb128 0x21\r
- 1162 0338 E6000000            .4byte  0xe6\r
- 1163 033c 10000000            .4byte  .LBB14\r
- 1164 0340 30000000            .4byte  .Ldebug_ranges0+0x30\r
- 1165 0344 01                  .byte   0x1\r
- 1166 0345 C401                .2byte  0x1c4\r
- 1167 0347 E4030000            .4byte  0x3e4\r
- 1168 034b 20                  .uleb128 0x20\r
- 1169 034c 1D010000            .4byte  0x11d\r
- 1170 0350 86010000            .4byte  .LLST13\r
- 1171 0354 20                  .uleb128 0x20\r
- 1172 0355 11010000            .4byte  0x111\r
- 1173 0359 99010000            .4byte  .LLST14\r
- 1174 035d 20                  .uleb128 0x20\r
- 1175 035e 05010000            .4byte  0x105\r
- 1176 0362 B7010000            .4byte  .LLST15\r
- 1177 0366 20                  .uleb128 0x20\r
- 1178 0367 F9000000            .4byte  0xf9\r
- 1179 036b D5010000            .4byte  .LLST16\r
- 1180 036f 19                  .uleb128 0x19\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 35\r
-\r
-\r
- 1181 0370 48000000            .4byte  .Ldebug_ranges0+0x48\r
- 1182 0374 1A                  .uleb128 0x1a\r
- 1183 0375 29010000            .4byte  0x129\r
- 1184 0379 F3010000            .4byte  .LLST17\r
- 1185 037d 10                  .uleb128 0x10\r
- 1186 037e 1A000000            .4byte  .LVL21\r
- 1187 0382 96060000            .4byte  0x696\r
- 1188 0386 9D030000            .4byte  0x39d\r
- 1189 038a 11                  .uleb128 0x11\r
- 1190 038b 01                  .byte   0x1\r
- 1191 038c 52                  .byte   0x52\r
- 1192 038d 02                  .byte   0x2\r
- 1193 038e 74                  .byte   0x74\r
- 1194 038f 00                  .sleb128 0\r
- 1195 0390 11                  .uleb128 0x11\r
- 1196 0391 01                  .byte   0x1\r
- 1197 0392 51                  .byte   0x51\r
- 1198 0393 02                  .byte   0x2\r
- 1199 0394 77                  .byte   0x77\r
- 1200 0395 00                  .sleb128 0\r
- 1201 0396 11                  .uleb128 0x11\r
- 1202 0397 01                  .byte   0x1\r
- 1203 0398 50                  .byte   0x50\r
- 1204 0399 02                  .byte   0x2\r
- 1205 039a 75                  .byte   0x75\r
- 1206 039b 00                  .sleb128 0\r
- 1207 039c 00                  .byte   0\r
- 1208 039d 10                  .uleb128 0x10\r
- 1209 039e 32000000            .4byte  .LVL24\r
- 1210 03a2 60060000            .4byte  0x660\r
- 1211 03a6 B0030000            .4byte  0x3b0\r
- 1212 03aa 11                  .uleb128 0x11\r
- 1213 03ab 01                  .byte   0x1\r
- 1214 03ac 50                  .byte   0x50\r
- 1215 03ad 01                  .byte   0x1\r
- 1216 03ae 31                  .byte   0x31\r
- 1217 03af 00                  .byte   0\r
- 1218 03b0 12                  .uleb128 0x12\r
- 1219 03b1 4C000000            .4byte  .LVL27\r
- 1220 03b5 74060000            .4byte  0x674\r
- 1221 03b9 10                  .uleb128 0x10\r
- 1222 03ba 60000000            .4byte  .LVL31\r
- 1223 03be B8060000            .4byte  0x6b8\r
- 1224 03c2 D3030000            .4byte  0x3d3\r
- 1225 03c6 11                  .uleb128 0x11\r
- 1226 03c7 01                  .byte   0x1\r
- 1227 03c8 51                  .byte   0x51\r
- 1228 03c9 02                  .byte   0x2\r
- 1229 03ca 76                  .byte   0x76\r
- 1230 03cb 00                  .sleb128 0\r
- 1231 03cc 11                  .uleb128 0x11\r
- 1232 03cd 01                  .byte   0x1\r
- 1233 03ce 50                  .byte   0x50\r
- 1234 03cf 02                  .byte   0x2\r
- 1235 03d0 75                  .byte   0x75\r
- 1236 03d1 00                  .sleb128 0\r
- 1237 03d2 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 36\r
-\r
-\r
- 1238 03d3 22                  .uleb128 0x22\r
- 1239 03d4 78000000            .4byte  .LVL34\r
- 1240 03d8 60060000            .4byte  0x660\r
- 1241 03dc 11                  .uleb128 0x11\r
- 1242 03dd 01                  .byte   0x1\r
- 1243 03de 50                  .byte   0x50\r
- 1244 03df 01                  .byte   0x1\r
- 1245 03e0 31                  .byte   0x31\r
- 1246 03e1 00                  .byte   0\r
- 1247 03e2 00                  .byte   0\r
- 1248 03e3 00                  .byte   0\r
- 1249 03e4 12                  .uleb128 0x12\r
- 1250 03e5 0E000000            .4byte  .LVL19\r
- 1251 03e9 88060000            .4byte  0x688\r
- 1252 03ed 00                  .byte   0\r
- 1253 03ee 23                  .uleb128 0x23\r
- 1254 03ef 01                  .byte   0x1\r
- 1255 03f0 3F010000            .4byte  .LASF25\r
- 1256 03f4 01                  .byte   0x1\r
- 1257 03f5 8101                .2byte  0x181\r
- 1258 03f7 01                  .byte   0x1\r
- 1259 03f8 A5000000            .4byte  0xa5\r
- 1260 03fc 00000000            .4byte  .LFB6\r
- 1261 0400 48000000            .4byte  .LFE6\r
- 1262 0404 3E020000            .4byte  .LLST18\r
- 1263 0408 01                  .byte   0x1\r
- 1264 0409 81040000            .4byte  0x481\r
- 1265 040d 24                  .uleb128 0x24\r
- 1266 040e 28010000            .4byte  .LASF18\r
- 1267 0412 01                  .byte   0x1\r
- 1268 0413 8101                .2byte  0x181\r
- 1269 0415 6F000000            .4byte  0x6f\r
- 1270 0419 5E020000            .4byte  .LLST19\r
- 1271 041d 24                  .uleb128 0x24\r
- 1272 041e 20030000            .4byte  .LASF27\r
- 1273 0422 01                  .byte   0x1\r
- 1274 0423 8101                .2byte  0x181\r
- 1275 0425 7A000000            .4byte  0x7a\r
- 1276 0429 98020000            .4byte  .LLST20\r
- 1277 042d 24                  .uleb128 0x24\r
- 1278 042e 06020000            .4byte  .LASF28\r
- 1279 0432 01                  .byte   0x1\r
- 1280 0433 8101                .2byte  0x181\r
- 1281 0435 36010000            .4byte  0x136\r
- 1282 0439 C4020000            .4byte  .LLST21\r
- 1283 043d 25                  .uleb128 0x25\r
- 1284 043e 6E020000            .4byte  .LASF29\r
- 1285 0442 01                  .byte   0x1\r
- 1286 0443 8401                .2byte  0x184\r
- 1287 0445 85000000            .4byte  0x85\r
- 1288 0449 EF020000            .4byte  .LLST22\r
- 1289 044d 26                  .uleb128 0x26\r
- 1290 044e 6900                .ascii  "i\000"\r
- 1291 0450 01                  .byte   0x1\r
- 1292 0451 8501                .2byte  0x185\r
- 1293 0453 7A000000            .4byte  0x7a\r
- 1294 0457 16030000            .4byte  .LLST23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 37\r
-\r
-\r
- 1295 045b 27                  .uleb128 0x27\r
- 1296 045c 60000000            .4byte  .LASF22\r
- 1297 0460 01                  .byte   0x1\r
- 1298 0461 8601                .2byte  0x186\r
- 1299 0463 A5000000            .4byte  0xa5\r
- 1300 0467 7F                  .sleb128 -1\r
- 1301 0468 14                  .uleb128 0x14\r
- 1302 0469 3E000000            .4byte  .LVL41\r
- 1303 046d 01                  .byte   0x1\r
- 1304 046e E6000000            .4byte  0xe6\r
- 1305 0472 11                  .uleb128 0x11\r
- 1306 0473 01                  .byte   0x1\r
- 1307 0474 53                  .byte   0x53\r
- 1308 0475 03                  .byte   0x3\r
- 1309 0476 0A                  .byte   0xa\r
- 1310 0477 2001                .2byte  0x120\r
- 1311 0479 11                  .uleb128 0x11\r
- 1312 047a 01                  .byte   0x1\r
- 1313 047b 52                  .byte   0x52\r
- 1314 047c 02                  .byte   0x2\r
- 1315 047d 74                  .byte   0x74\r
- 1316 047e 00                  .sleb128 0\r
- 1317 047f 00                  .byte   0\r
- 1318 0480 00                  .byte   0\r
- 1319 0481 23                  .uleb128 0x23\r
- 1320 0482 01                  .byte   0x1\r
- 1321 0483 2B030000            .4byte  .LASF30\r
- 1322 0487 01                  .byte   0x1\r
- 1323 0488 3601                .2byte  0x136\r
- 1324 048a 01                  .byte   0x1\r
- 1325 048b A5000000            .4byte  0xa5\r
- 1326 048f 00000000            .4byte  .LFB5\r
- 1327 0493 5C000000            .4byte  .LFE5\r
- 1328 0497 2A030000            .4byte  .LLST24\r
- 1329 049b 01                  .byte   0x1\r
- 1330 049c 51050000            .4byte  0x551\r
- 1331 04a0 24                  .uleb128 0x24\r
- 1332 04a1 28010000            .4byte  .LASF18\r
- 1333 04a5 01                  .byte   0x1\r
- 1334 04a6 3601                .2byte  0x136\r
- 1335 04a8 6F000000            .4byte  0x6f\r
- 1336 04ac 4A030000            .4byte  .LLST25\r
- 1337 04b0 24                  .uleb128 0x24\r
- 1338 04b1 20030000            .4byte  .LASF27\r
- 1339 04b5 01                  .byte   0x1\r
- 1340 04b6 3601                .2byte  0x136\r
- 1341 04b8 7A000000            .4byte  0x7a\r
- 1342 04bc 9D030000            .4byte  .LLST26\r
- 1343 04c0 24                  .uleb128 0x24\r
- 1344 04c1 B9000000            .4byte  .LASF20\r
- 1345 04c5 01                  .byte   0x1\r
- 1346 04c6 3601                .2byte  0x136\r
- 1347 04c8 36010000            .4byte  0x136\r
- 1348 04cc E2030000            .4byte  .LLST27\r
- 1349 04d0 26                  .uleb128 0x26\r
- 1350 04d1 6900                .ascii  "i\000"\r
- 1351 04d3 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 38\r
-\r
-\r
- 1352 04d4 3801                .2byte  0x138\r
- 1353 04d6 6F000000            .4byte  0x6f\r
- 1354 04da 19040000            .4byte  .LLST28\r
- 1355 04de 25                  .uleb128 0x25\r
- 1356 04df 6E020000            .4byte  .LASF29\r
- 1357 04e3 01                  .byte   0x1\r
- 1358 04e4 3901                .2byte  0x139\r
- 1359 04e6 85000000            .4byte  0x85\r
- 1360 04ea 2D040000            .4byte  .LLST29\r
- 1361 04ee 25                  .uleb128 0x25\r
- 1362 04ef 72010000            .4byte  .LASF21\r
- 1363 04f3 01                  .byte   0x1\r
- 1364 04f4 3A01                .2byte  0x13a\r
- 1365 04f6 7A000000            .4byte  0x7a\r
- 1366 04fa 56040000            .4byte  .LLST30\r
- 1367 04fe 27                  .uleb128 0x27\r
- 1368 04ff 60000000            .4byte  .LASF22\r
- 1369 0503 01                  .byte   0x1\r
- 1370 0504 3B01                .2byte  0x13b\r
- 1371 0506 A5000000            .4byte  0xa5\r
- 1372 050a 7F                  .sleb128 -1\r
- 1373 050b 10                  .uleb128 0x10\r
- 1374 050c 40000000            .4byte  .LVL52\r
- 1375 0510 DF060000            .4byte  0x6df\r
- 1376 0514 2D050000            .4byte  0x52d\r
- 1377 0518 11                  .uleb128 0x11\r
- 1378 0519 01                  .byte   0x1\r
- 1379 051a 52                  .byte   0x52\r
- 1380 051b 03                  .byte   0x3\r
- 1381 051c 0A                  .byte   0xa\r
- 1382 051d 0001                .2byte  0x100\r
- 1383 051f 11                  .uleb128 0x11\r
- 1384 0520 01                  .byte   0x1\r
- 1385 0521 51                  .byte   0x51\r
- 1386 0522 03                  .byte   0x3\r
- 1387 0523 F3                  .byte   0xf3\r
- 1388 0524 01                  .uleb128 0x1\r
- 1389 0525 52                  .byte   0x52\r
- 1390 0526 11                  .uleb128 0x11\r
- 1391 0527 01                  .byte   0x1\r
- 1392 0528 50                  .byte   0x50\r
- 1393 0529 02                  .byte   0x2\r
- 1394 052a 74                  .byte   0x74\r
- 1395 052b 00                  .sleb128 0\r
- 1396 052c 00                  .byte   0\r
- 1397 052d 14                  .uleb128 0x14\r
- 1398 052e 50000000            .4byte  .LVL53\r
- 1399 0532 01                  .byte   0x1\r
- 1400 0533 E6000000            .4byte  0xe6\r
- 1401 0537 11                  .uleb128 0x11\r
- 1402 0538 01                  .byte   0x1\r
- 1403 0539 53                  .byte   0x53\r
- 1404 053a 02                  .byte   0x2\r
- 1405 053b 76                  .byte   0x76\r
- 1406 053c 00                  .sleb128 0\r
- 1407 053d 11                  .uleb128 0x11\r
- 1408 053e 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 39\r
-\r
-\r
- 1409 053f 52                  .byte   0x52\r
- 1410 0540 02                  .byte   0x2\r
- 1411 0541 74                  .byte   0x74\r
- 1412 0542 00                  .sleb128 0\r
- 1413 0543 11                  .uleb128 0x11\r
- 1414 0544 01                  .byte   0x1\r
- 1415 0545 51                  .byte   0x51\r
- 1416 0546 02                  .byte   0x2\r
- 1417 0547 77                  .byte   0x77\r
- 1418 0548 00                  .sleb128 0\r
- 1419 0549 11                  .uleb128 0x11\r
- 1420 054a 01                  .byte   0x1\r
- 1421 054b 50                  .byte   0x50\r
- 1422 054c 02                  .byte   0x2\r
- 1423 054d 75                  .byte   0x75\r
- 1424 054e 00                  .sleb128 0\r
- 1425 054f 00                  .byte   0\r
- 1426 0550 00                  .byte   0\r
- 1427 0551 28                  .uleb128 0x28\r
- 1428 0552 01                  .byte   0x1\r
- 1429 0553 6D000000            .4byte  .LASF32\r
- 1430 0557 01                  .byte   0x1\r
- 1431 0558 1802                .2byte  0x218\r
- 1432 055a 01                  .byte   0x1\r
- 1433 055b 00000000            .4byte  .LFB8\r
- 1434 055f 44000000            .4byte  .LFE8\r
- 1435 0563 77040000            .4byte  .LLST31\r
- 1436 0567 01                  .byte   0x1\r
- 1437 0568 A0050000            .4byte  0x5a0\r
- 1438 056c 24                  .uleb128 0x24\r
- 1439 056d 75020000            .4byte  .LASF33\r
- 1440 0571 01                  .byte   0x1\r
- 1441 0572 1802                .2byte  0x218\r
- 1442 0574 6F000000            .4byte  0x6f\r
- 1443 0578 97040000            .4byte  .LLST32\r
- 1444 057c 25                  .uleb128 0x25\r
- 1445 057d D0000000            .4byte  .LASF34\r
- 1446 0581 01                  .byte   0x1\r
- 1447 0582 1A02                .2byte  0x21a\r
- 1448 0584 6F000000            .4byte  0x6f\r
- 1449 0588 B8040000            .4byte  .LLST33\r
- 1450 058c 12                  .uleb128 0x12\r
- 1451 058d 08000000            .4byte  .LVL56\r
- 1452 0591 07070000            .4byte  0x707\r
- 1453 0595 1D                  .uleb128 0x1d\r
- 1454 0596 3E000000            .4byte  .LVL57\r
- 1455 059a 01                  .byte   0x1\r
- 1456 059b 15070000            .4byte  0x715\r
- 1457 059f 00                  .byte   0\r
- 1458 05a0 29                  .uleb128 0x29\r
- 1459 05a1 01                  .byte   0x1\r
- 1460 05a2 C1000000            .4byte  .LASF36\r
- 1461 05a6 01                  .byte   0x1\r
- 1462 05a7 6602                .2byte  0x266\r
- 1463 05a9 01                  .byte   0x1\r
- 1464 05aa 00000000            .4byte  .LFB9\r
- 1465 05ae 18000000            .4byte  .LFE9\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 40\r
-\r
-\r
- 1466 05b2 02                  .byte   0x2\r
- 1467 05b3 7D                  .byte   0x7d\r
- 1468 05b4 00                  .sleb128 0\r
- 1469 05b5 01                  .byte   0x1\r
- 1470 05b6 29                  .uleb128 0x29\r
- 1471 05b7 01                  .byte   0x1\r
- 1472 05b8 18000000            .4byte  .LASF37\r
- 1473 05bc 01                  .byte   0x1\r
- 1474 05bd 7E02                .2byte  0x27e\r
- 1475 05bf 01                  .byte   0x1\r
- 1476 05c0 00000000            .4byte  .LFB10\r
- 1477 05c4 18000000            .4byte  .LFE10\r
- 1478 05c8 02                  .byte   0x2\r
- 1479 05c9 7D                  .byte   0x7d\r
- 1480 05ca 00                  .sleb128 0\r
- 1481 05cb 01                  .byte   0x1\r
- 1482 05cc 29                  .uleb128 0x29\r
- 1483 05cd 01                  .byte   0x1\r
- 1484 05ce 0D020000            .4byte  .LASF38\r
- 1485 05d2 01                  .byte   0x1\r
- 1486 05d3 9602                .2byte  0x296\r
- 1487 05d5 01                  .byte   0x1\r
- 1488 05d6 00000000            .4byte  .LFB11\r
- 1489 05da 20000000            .4byte  .LFE11\r
- 1490 05de 02                  .byte   0x2\r
- 1491 05df 7D                  .byte   0x7d\r
- 1492 05e0 00                  .sleb128 0\r
- 1493 05e1 01                  .byte   0x1\r
- 1494 05e2 29                  .uleb128 0x29\r
- 1495 05e3 01                  .byte   0x1\r
- 1496 05e4 84010000            .4byte  .LASF39\r
- 1497 05e8 01                  .byte   0x1\r
- 1498 05e9 B002                .2byte  0x2b0\r
- 1499 05eb 01                  .byte   0x1\r
- 1500 05ec 00000000            .4byte  .LFB12\r
- 1501 05f0 0C000000            .4byte  .LFE12\r
- 1502 05f4 02                  .byte   0x2\r
- 1503 05f5 7D                  .byte   0x7d\r
- 1504 05f6 00                  .sleb128 0\r
- 1505 05f7 01                  .byte   0x1\r
- 1506 05f8 17                  .uleb128 0x17\r
- 1507 05f9 0E000000            .4byte  .LASF40\r
- 1508 05fd 01                  .byte   0x1\r
- 1509 05fe 21                  .byte   0x21\r
- 1510 05ff EE020000            .4byte  0x2ee\r
- 1511 0603 05                  .byte   0x5\r
- 1512 0604 03                  .byte   0x3\r
- 1513 0605 00000000            .4byte  rowBuffer\r
- 1514 0609 2A                  .uleb128 0x2a\r
- 1515 060a 6F000000            .4byte  0x6f\r
- 1516 060e 19060000            .4byte  0x619\r
- 1517 0612 2B                  .uleb128 0x2b\r
- 1518 0613 C0000000            .4byte  0xc0\r
- 1519 0617 01                  .byte   0x1\r
- 1520 0618 00                  .byte   0\r
- 1521 0619 2C                  .uleb128 0x2c\r
- 1522 061a 30010000            .4byte  .LASF56\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 41\r
-\r
-\r
- 1523 061e 01                  .byte   0x1\r
- 1524 061f 1E                  .byte   0x1e\r
- 1525 0620 09060000            .4byte  0x609\r
- 1526 0624 01                  .byte   0x1\r
- 1527 0625 05                  .byte   0x5\r
- 1528 0626 03                  .byte   0x3\r
- 1529 0627 00000000            .4byte  dieTemperature\r
- 1530 062b 2D                  .uleb128 0x2d\r
- 1531 062c 01                  .byte   0x1\r
- 1532 062d 99010000            .4byte  .LASF42\r
- 1533 0631 03                  .byte   0x3\r
- 1534 0632 2B                  .byte   0x2b\r
- 1535 0633 01                  .byte   0x1\r
- 1536 0634 A5000000            .4byte  0xa5\r
- 1537 0638 01                  .byte   0x1\r
- 1538 0639 43060000            .4byte  0x643\r
- 1539 063d 2E                  .uleb128 0x2e\r
- 1540 063e 6F000000            .4byte  0x6f\r
- 1541 0642 00                  .byte   0\r
- 1542 0643 2D                  .uleb128 0x2d\r
- 1543 0644 01                  .byte   0x1\r
- 1544 0645 52000000            .4byte  .LASF43\r
- 1545 0649 03                  .byte   0x3\r
- 1546 064a 24                  .byte   0x24\r
- 1547 064b 01                  .byte   0x1\r
- 1548 064c 6F000000            .4byte  0x6f\r
- 1549 0650 01                  .byte   0x1\r
- 1550 0651 60060000            .4byte  0x660\r
- 1551 0655 2E                  .uleb128 0x2e\r
- 1552 0656 EE020000            .4byte  0x2ee\r
- 1553 065a 2E                  .uleb128 0x2e\r
- 1554 065b 6F000000            .4byte  0x6f\r
- 1555 065f 00                  .byte   0\r
- 1556 0660 2F                  .uleb128 0x2f\r
- 1557 0661 01                  .byte   0x1\r
- 1558 0662 50020000            .4byte  .LASF48\r
- 1559 0666 04                  .byte   0x4\r
- 1560 0667 78                  .byte   0x78\r
- 1561 0668 01                  .byte   0x1\r
- 1562 0669 01                  .byte   0x1\r
- 1563 066a 74060000            .4byte  0x674\r
- 1564 066e 2E                  .uleb128 0x2e\r
- 1565 066f 7A000000            .4byte  0x7a\r
- 1566 0673 00                  .byte   0\r
- 1567 0674 30                  .uleb128 0x30\r
- 1568 0675 01                  .byte   0x1\r
- 1569 0676 AD000000            .4byte  .LASF44\r
- 1570 067a 03                  .byte   0x3\r
- 1571 067b 2D                  .byte   0x2d\r
- 1572 067c 01                  .byte   0x1\r
- 1573 067d 01                  .byte   0x1\r
- 1574 067e 30                  .uleb128 0x30\r
- 1575 067f 01                  .byte   0x1\r
- 1576 0680 26000000            .4byte  .LASF45\r
- 1577 0684 03                  .byte   0x3\r
- 1578 0685 22                  .byte   0x22\r
- 1579 0686 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 42\r
-\r
-\r
- 1580 0687 01                  .byte   0x1\r
- 1581 0688 31                  .uleb128 0x31\r
- 1582 0689 01                  .byte   0x1\r
- 1583 068a AD010000            .4byte  .LASF50\r
- 1584 068e 03                  .byte   0x3\r
- 1585 068f 2C                  .byte   0x2c\r
- 1586 0690 01                  .byte   0x1\r
- 1587 0691 A5000000            .4byte  0xa5\r
- 1588 0695 01                  .byte   0x1\r
- 1589 0696 2D                  .uleb128 0x2d\r
- 1590 0697 01                  .byte   0x1\r
- 1591 0698 22020000            .4byte  .LASF46\r
- 1592 069c 03                  .byte   0x3\r
- 1593 069d 27                  .byte   0x27\r
- 1594 069e 01                  .byte   0x1\r
- 1595 069f A5000000            .4byte  0xa5\r
- 1596 06a3 01                  .byte   0x1\r
- 1597 06a4 B8060000            .4byte  0x6b8\r
- 1598 06a8 2E                  .uleb128 0x2e\r
- 1599 06a9 6F000000            .4byte  0x6f\r
- 1600 06ad 2E                  .uleb128 0x2e\r
- 1601 06ae 36010000            .4byte  0x136\r
- 1602 06b2 2E                  .uleb128 0x2e\r
- 1603 06b3 7A000000            .4byte  0x7a\r
- 1604 06b7 00                  .byte   0\r
- 1605 06b8 2D                  .uleb128 0x2d\r
- 1606 06b9 01                  .byte   0x1\r
- 1607 06ba 31000000            .4byte  .LASF47\r
- 1608 06be 03                  .byte   0x3\r
- 1609 06bf 28                  .byte   0x28\r
- 1610 06c0 01                  .byte   0x1\r
- 1611 06c1 A5000000            .4byte  0xa5\r
- 1612 06c5 01                  .byte   0x1\r
- 1613 06c6 DF060000            .4byte  0x6df\r
- 1614 06ca 2E                  .uleb128 0x2e\r
- 1615 06cb 6F000000            .4byte  0x6f\r
- 1616 06cf 2E                  .uleb128 0x2e\r
- 1617 06d0 7A000000            .4byte  0x7a\r
- 1618 06d4 2E                  .uleb128 0x2e\r
- 1619 06d5 6F000000            .4byte  0x6f\r
- 1620 06d9 2E                  .uleb128 0x2e\r
- 1621 06da 6F000000            .4byte  0x6f\r
- 1622 06de 00                  .byte   0\r
- 1623 06df 32                  .uleb128 0x32\r
- 1624 06e0 01                  .byte   0x1\r
- 1625 06e1 5A020000            .4byte  .LASF49\r
- 1626 06e5 01                  .byte   0x1\r
- 1627 06e6 C7000000            .4byte  0xc7\r
- 1628 06ea 01                  .byte   0x1\r
- 1629 06eb 01                  .byte   0x1\r
- 1630 06ec 00070000            .4byte  0x700\r
- 1631 06f0 2E                  .uleb128 0x2e\r
- 1632 06f1 C7000000            .4byte  0xc7\r
- 1633 06f5 2E                  .uleb128 0x2e\r
- 1634 06f6 00070000            .4byte  0x700\r
- 1635 06fa 2E                  .uleb128 0x2e\r
- 1636 06fb C0000000            .4byte  0xc0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 43\r
-\r
-\r
- 1637 06ff 00                  .byte   0\r
- 1638 0700 0C                  .uleb128 0xc\r
- 1639 0701 04                  .byte   0x4\r
- 1640 0702 06070000            .4byte  0x706\r
- 1641 0706 33                  .uleb128 0x33\r
- 1642 0707 31                  .uleb128 0x31\r
- 1643 0708 01                  .byte   0x1\r
- 1644 0709 BE010000            .4byte  .LASF51\r
- 1645 070d 04                  .byte   0x4\r
- 1646 070e 7E                  .byte   0x7e\r
- 1647 070f 01                  .byte   0x1\r
- 1648 0710 6F000000            .4byte  0x6f\r
- 1649 0714 01                  .byte   0x1\r
- 1650 0715 34                  .uleb128 0x34\r
- 1651 0716 01                  .byte   0x1\r
- 1652 0717 F0010000            .4byte  .LASF57\r
- 1653 071b 04                  .byte   0x4\r
- 1654 071c 7F                  .byte   0x7f\r
- 1655 071d 01                  .byte   0x1\r
- 1656 071e 01                  .byte   0x1\r
- 1657 071f 2E                  .uleb128 0x2e\r
- 1658 0720 6F000000            .4byte  0x6f\r
- 1659 0724 00                  .byte   0\r
- 1660 0725 00                  .byte   0\r
- 1661                          .section        .debug_abbrev,"",%progbits\r
- 1662                  .Ldebug_abbrev0:\r
- 1663 0000 01                  .uleb128 0x1\r
- 1664 0001 11                  .uleb128 0x11\r
- 1665 0002 01                  .byte   0x1\r
- 1666 0003 25                  .uleb128 0x25\r
- 1667 0004 0E                  .uleb128 0xe\r
- 1668 0005 13                  .uleb128 0x13\r
- 1669 0006 0B                  .uleb128 0xb\r
- 1670 0007 03                  .uleb128 0x3\r
- 1671 0008 0E                  .uleb128 0xe\r
- 1672 0009 1B                  .uleb128 0x1b\r
- 1673 000a 0E                  .uleb128 0xe\r
- 1674 000b 55                  .uleb128 0x55\r
- 1675 000c 06                  .uleb128 0x6\r
- 1676 000d 11                  .uleb128 0x11\r
- 1677 000e 01                  .uleb128 0x1\r
- 1678 000f 52                  .uleb128 0x52\r
- 1679 0010 01                  .uleb128 0x1\r
- 1680 0011 10                  .uleb128 0x10\r
- 1681 0012 06                  .uleb128 0x6\r
- 1682 0013 00                  .byte   0\r
- 1683 0014 00                  .byte   0\r
- 1684 0015 02                  .uleb128 0x2\r
- 1685 0016 24                  .uleb128 0x24\r
- 1686 0017 00                  .byte   0\r
- 1687 0018 0B                  .uleb128 0xb\r
- 1688 0019 0B                  .uleb128 0xb\r
- 1689 001a 3E                  .uleb128 0x3e\r
- 1690 001b 0B                  .uleb128 0xb\r
- 1691 001c 03                  .uleb128 0x3\r
- 1692 001d 0E                  .uleb128 0xe\r
- 1693 001e 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 44\r
-\r
-\r
- 1694 001f 00                  .byte   0\r
- 1695 0020 03                  .uleb128 0x3\r
- 1696 0021 24                  .uleb128 0x24\r
- 1697 0022 00                  .byte   0\r
- 1698 0023 0B                  .uleb128 0xb\r
- 1699 0024 0B                  .uleb128 0xb\r
- 1700 0025 3E                  .uleb128 0x3e\r
- 1701 0026 0B                  .uleb128 0xb\r
- 1702 0027 03                  .uleb128 0x3\r
- 1703 0028 08                  .uleb128 0x8\r
- 1704 0029 00                  .byte   0\r
- 1705 002a 00                  .byte   0\r
- 1706 002b 04                  .uleb128 0x4\r
- 1707 002c 16                  .uleb128 0x16\r
- 1708 002d 00                  .byte   0\r
- 1709 002e 03                  .uleb128 0x3\r
- 1710 002f 0E                  .uleb128 0xe\r
- 1711 0030 3A                  .uleb128 0x3a\r
- 1712 0031 0B                  .uleb128 0xb\r
- 1713 0032 3B                  .uleb128 0x3b\r
- 1714 0033 0B                  .uleb128 0xb\r
- 1715 0034 49                  .uleb128 0x49\r
- 1716 0035 13                  .uleb128 0x13\r
- 1717 0036 00                  .byte   0\r
- 1718 0037 00                  .byte   0\r
- 1719 0038 05                  .uleb128 0x5\r
- 1720 0039 35                  .uleb128 0x35\r
- 1721 003a 00                  .byte   0\r
- 1722 003b 49                  .uleb128 0x49\r
- 1723 003c 13                  .uleb128 0x13\r
- 1724 003d 00                  .byte   0\r
- 1725 003e 00                  .byte   0\r
- 1726 003f 06                  .uleb128 0x6\r
- 1727 0040 0F                  .uleb128 0xf\r
- 1728 0041 00                  .byte   0\r
- 1729 0042 0B                  .uleb128 0xb\r
- 1730 0043 0B                  .uleb128 0xb\r
- 1731 0044 00                  .byte   0\r
- 1732 0045 00                  .byte   0\r
- 1733 0046 07                  .uleb128 0x7\r
- 1734 0047 2E                  .uleb128 0x2e\r
- 1735 0048 01                  .byte   0x1\r
- 1736 0049 03                  .uleb128 0x3\r
- 1737 004a 0E                  .uleb128 0xe\r
- 1738 004b 3A                  .uleb128 0x3a\r
- 1739 004c 0B                  .uleb128 0xb\r
- 1740 004d 3B                  .uleb128 0x3b\r
- 1741 004e 0B                  .uleb128 0xb\r
- 1742 004f 27                  .uleb128 0x27\r
- 1743 0050 0C                  .uleb128 0xc\r
- 1744 0051 49                  .uleb128 0x49\r
- 1745 0052 13                  .uleb128 0x13\r
- 1746 0053 20                  .uleb128 0x20\r
- 1747 0054 0B                  .uleb128 0xb\r
- 1748 0055 01                  .uleb128 0x1\r
- 1749 0056 13                  .uleb128 0x13\r
- 1750 0057 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 45\r
-\r
-\r
- 1751 0058 00                  .byte   0\r
- 1752 0059 08                  .uleb128 0x8\r
- 1753 005a 34                  .uleb128 0x34\r
- 1754 005b 00                  .byte   0\r
- 1755 005c 03                  .uleb128 0x3\r
- 1756 005d 0E                  .uleb128 0xe\r
- 1757 005e 3A                  .uleb128 0x3a\r
- 1758 005f 0B                  .uleb128 0xb\r
- 1759 0060 3B                  .uleb128 0x3b\r
- 1760 0061 0B                  .uleb128 0xb\r
- 1761 0062 49                  .uleb128 0x49\r
- 1762 0063 13                  .uleb128 0x13\r
- 1763 0064 00                  .byte   0\r
- 1764 0065 00                  .byte   0\r
- 1765 0066 09                  .uleb128 0x9\r
- 1766 0067 2E                  .uleb128 0x2e\r
- 1767 0068 01                  .byte   0x1\r
- 1768 0069 3F                  .uleb128 0x3f\r
- 1769 006a 0C                  .uleb128 0xc\r
- 1770 006b 03                  .uleb128 0x3\r
- 1771 006c 0E                  .uleb128 0xe\r
- 1772 006d 3A                  .uleb128 0x3a\r
- 1773 006e 0B                  .uleb128 0xb\r
- 1774 006f 3B                  .uleb128 0x3b\r
- 1775 0070 05                  .uleb128 0x5\r
- 1776 0071 27                  .uleb128 0x27\r
- 1777 0072 0C                  .uleb128 0xc\r
- 1778 0073 49                  .uleb128 0x49\r
- 1779 0074 13                  .uleb128 0x13\r
- 1780 0075 20                  .uleb128 0x20\r
- 1781 0076 0B                  .uleb128 0xb\r
- 1782 0077 01                  .uleb128 0x1\r
- 1783 0078 13                  .uleb128 0x13\r
- 1784 0079 00                  .byte   0\r
- 1785 007a 00                  .byte   0\r
- 1786 007b 0A                  .uleb128 0xa\r
- 1787 007c 05                  .uleb128 0x5\r
- 1788 007d 00                  .byte   0\r
- 1789 007e 03                  .uleb128 0x3\r
- 1790 007f 0E                  .uleb128 0xe\r
- 1791 0080 3A                  .uleb128 0x3a\r
- 1792 0081 0B                  .uleb128 0xb\r
- 1793 0082 3B                  .uleb128 0x3b\r
- 1794 0083 05                  .uleb128 0x5\r
- 1795 0084 49                  .uleb128 0x49\r
- 1796 0085 13                  .uleb128 0x13\r
- 1797 0086 00                  .byte   0\r
- 1798 0087 00                  .byte   0\r
- 1799 0088 0B                  .uleb128 0xb\r
- 1800 0089 34                  .uleb128 0x34\r
- 1801 008a 00                  .byte   0\r
- 1802 008b 03                  .uleb128 0x3\r
- 1803 008c 0E                  .uleb128 0xe\r
- 1804 008d 3A                  .uleb128 0x3a\r
- 1805 008e 0B                  .uleb128 0xb\r
- 1806 008f 3B                  .uleb128 0x3b\r
- 1807 0090 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 46\r
-\r
-\r
- 1808 0091 49                  .uleb128 0x49\r
- 1809 0092 13                  .uleb128 0x13\r
- 1810 0093 00                  .byte   0\r
- 1811 0094 00                  .byte   0\r
- 1812 0095 0C                  .uleb128 0xc\r
- 1813 0096 0F                  .uleb128 0xf\r
- 1814 0097 00                  .byte   0\r
- 1815 0098 0B                  .uleb128 0xb\r
- 1816 0099 0B                  .uleb128 0xb\r
- 1817 009a 49                  .uleb128 0x49\r
- 1818 009b 13                  .uleb128 0x13\r
- 1819 009c 00                  .byte   0\r
- 1820 009d 00                  .byte   0\r
- 1821 009e 0D                  .uleb128 0xd\r
- 1822 009f 26                  .uleb128 0x26\r
- 1823 00a0 00                  .byte   0\r
- 1824 00a1 49                  .uleb128 0x49\r
- 1825 00a2 13                  .uleb128 0x13\r
- 1826 00a3 00                  .byte   0\r
- 1827 00a4 00                  .byte   0\r
- 1828 00a5 0E                  .uleb128 0xe\r
- 1829 00a6 2E                  .uleb128 0x2e\r
- 1830 00a7 01                  .byte   0x1\r
- 1831 00a8 31                  .uleb128 0x31\r
- 1832 00a9 13                  .uleb128 0x13\r
- 1833 00aa 11                  .uleb128 0x11\r
- 1834 00ab 01                  .uleb128 0x1\r
- 1835 00ac 12                  .uleb128 0x12\r
- 1836 00ad 01                  .uleb128 0x1\r
- 1837 00ae 40                  .uleb128 0x40\r
- 1838 00af 06                  .uleb128 0x6\r
- 1839 00b0 9742                .uleb128 0x2117\r
- 1840 00b2 0C                  .uleb128 0xc\r
- 1841 00b3 01                  .uleb128 0x1\r
- 1842 00b4 13                  .uleb128 0x13\r
- 1843 00b5 00                  .byte   0\r
- 1844 00b6 00                  .byte   0\r
- 1845 00b7 0F                  .uleb128 0xf\r
- 1846 00b8 34                  .uleb128 0x34\r
- 1847 00b9 00                  .byte   0\r
- 1848 00ba 31                  .uleb128 0x31\r
- 1849 00bb 13                  .uleb128 0x13\r
- 1850 00bc 02                  .uleb128 0x2\r
- 1851 00bd 0A                  .uleb128 0xa\r
- 1852 00be 00                  .byte   0\r
- 1853 00bf 00                  .byte   0\r
- 1854 00c0 10                  .uleb128 0x10\r
- 1855 00c1 898201              .uleb128 0x4109\r
- 1856 00c4 01                  .byte   0x1\r
- 1857 00c5 11                  .uleb128 0x11\r
- 1858 00c6 01                  .uleb128 0x1\r
- 1859 00c7 31                  .uleb128 0x31\r
- 1860 00c8 13                  .uleb128 0x13\r
- 1861 00c9 01                  .uleb128 0x1\r
- 1862 00ca 13                  .uleb128 0x13\r
- 1863 00cb 00                  .byte   0\r
- 1864 00cc 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 47\r
-\r
-\r
- 1865 00cd 11                  .uleb128 0x11\r
- 1866 00ce 8A8201              .uleb128 0x410a\r
- 1867 00d1 00                  .byte   0\r
- 1868 00d2 02                  .uleb128 0x2\r
- 1869 00d3 0A                  .uleb128 0xa\r
- 1870 00d4 9142                .uleb128 0x2111\r
- 1871 00d6 0A                  .uleb128 0xa\r
- 1872 00d7 00                  .byte   0\r
- 1873 00d8 00                  .byte   0\r
- 1874 00d9 12                  .uleb128 0x12\r
- 1875 00da 898201              .uleb128 0x4109\r
- 1876 00dd 00                  .byte   0\r
- 1877 00de 11                  .uleb128 0x11\r
- 1878 00df 01                  .uleb128 0x1\r
- 1879 00e0 31                  .uleb128 0x31\r
- 1880 00e1 13                  .uleb128 0x13\r
- 1881 00e2 00                  .byte   0\r
- 1882 00e3 00                  .byte   0\r
- 1883 00e4 13                  .uleb128 0x13\r
- 1884 00e5 2E                  .uleb128 0x2e\r
- 1885 00e6 01                  .byte   0x1\r
- 1886 00e7 3F                  .uleb128 0x3f\r
- 1887 00e8 0C                  .uleb128 0xc\r
- 1888 00e9 03                  .uleb128 0x3\r
- 1889 00ea 0E                  .uleb128 0xe\r
- 1890 00eb 3A                  .uleb128 0x3a\r
- 1891 00ec 0B                  .uleb128 0xb\r
- 1892 00ed 3B                  .uleb128 0x3b\r
- 1893 00ee 0B                  .uleb128 0xb\r
- 1894 00ef 27                  .uleb128 0x27\r
- 1895 00f0 0C                  .uleb128 0xc\r
- 1896 00f1 11                  .uleb128 0x11\r
- 1897 00f2 01                  .uleb128 0x1\r
- 1898 00f3 12                  .uleb128 0x12\r
- 1899 00f4 01                  .uleb128 0x1\r
- 1900 00f5 40                  .uleb128 0x40\r
- 1901 00f6 0A                  .uleb128 0xa\r
- 1902 00f7 9742                .uleb128 0x2117\r
- 1903 00f9 0C                  .uleb128 0xc\r
- 1904 00fa 01                  .uleb128 0x1\r
- 1905 00fb 13                  .uleb128 0x13\r
- 1906 00fc 00                  .byte   0\r
- 1907 00fd 00                  .byte   0\r
- 1908 00fe 14                  .uleb128 0x14\r
- 1909 00ff 898201              .uleb128 0x4109\r
- 1910 0102 01                  .byte   0x1\r
- 1911 0103 11                  .uleb128 0x11\r
- 1912 0104 01                  .uleb128 0x1\r
- 1913 0105 9542                .uleb128 0x2115\r
- 1914 0107 0C                  .uleb128 0xc\r
- 1915 0108 31                  .uleb128 0x31\r
- 1916 0109 13                  .uleb128 0x13\r
- 1917 010a 00                  .byte   0\r
- 1918 010b 00                  .byte   0\r
- 1919 010c 15                  .uleb128 0x15\r
- 1920 010d 2E                  .uleb128 0x2e\r
- 1921 010e 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 48\r
-\r
-\r
- 1922 010f 3F                  .uleb128 0x3f\r
- 1923 0110 0C                  .uleb128 0xc\r
- 1924 0111 03                  .uleb128 0x3\r
- 1925 0112 0E                  .uleb128 0xe\r
- 1926 0113 3A                  .uleb128 0x3a\r
- 1927 0114 0B                  .uleb128 0xb\r
- 1928 0115 3B                  .uleb128 0x3b\r
- 1929 0116 0B                  .uleb128 0xb\r
- 1930 0117 27                  .uleb128 0x27\r
- 1931 0118 0C                  .uleb128 0xc\r
- 1932 0119 11                  .uleb128 0x11\r
- 1933 011a 01                  .uleb128 0x1\r
- 1934 011b 12                  .uleb128 0x12\r
- 1935 011c 01                  .uleb128 0x1\r
- 1936 011d 40                  .uleb128 0x40\r
- 1937 011e 0A                  .uleb128 0xa\r
- 1938 011f 9742                .uleb128 0x2117\r
- 1939 0121 0C                  .uleb128 0xc\r
- 1940 0122 00                  .byte   0\r
- 1941 0123 00                  .byte   0\r
- 1942 0124 16                  .uleb128 0x16\r
- 1943 0125 2E                  .uleb128 0x2e\r
- 1944 0126 01                  .byte   0x1\r
- 1945 0127 3F                  .uleb128 0x3f\r
- 1946 0128 0C                  .uleb128 0xc\r
- 1947 0129 03                  .uleb128 0x3\r
- 1948 012a 0E                  .uleb128 0xe\r
- 1949 012b 3A                  .uleb128 0x3a\r
- 1950 012c 0B                  .uleb128 0xb\r
- 1951 012d 3B                  .uleb128 0x3b\r
- 1952 012e 0B                  .uleb128 0xb\r
- 1953 012f 27                  .uleb128 0x27\r
- 1954 0130 0C                  .uleb128 0xc\r
- 1955 0131 49                  .uleb128 0x49\r
- 1956 0132 13                  .uleb128 0x13\r
- 1957 0133 11                  .uleb128 0x11\r
- 1958 0134 01                  .uleb128 0x1\r
- 1959 0135 12                  .uleb128 0x12\r
- 1960 0136 01                  .uleb128 0x1\r
- 1961 0137 40                  .uleb128 0x40\r
- 1962 0138 06                  .uleb128 0x6\r
- 1963 0139 9742                .uleb128 0x2117\r
- 1964 013b 0C                  .uleb128 0xc\r
- 1965 013c 01                  .uleb128 0x1\r
- 1966 013d 13                  .uleb128 0x13\r
- 1967 013e 00                  .byte   0\r
- 1968 013f 00                  .byte   0\r
- 1969 0140 17                  .uleb128 0x17\r
- 1970 0141 34                  .uleb128 0x34\r
- 1971 0142 00                  .byte   0\r
- 1972 0143 03                  .uleb128 0x3\r
- 1973 0144 0E                  .uleb128 0xe\r
- 1974 0145 3A                  .uleb128 0x3a\r
- 1975 0146 0B                  .uleb128 0xb\r
- 1976 0147 3B                  .uleb128 0x3b\r
- 1977 0148 0B                  .uleb128 0xb\r
- 1978 0149 49                  .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 49\r
-\r
-\r
- 1979 014a 13                  .uleb128 0x13\r
- 1980 014b 02                  .uleb128 0x2\r
- 1981 014c 0A                  .uleb128 0xa\r
- 1982 014d 00                  .byte   0\r
- 1983 014e 00                  .byte   0\r
- 1984 014f 18                  .uleb128 0x18\r
- 1985 0150 1D                  .uleb128 0x1d\r
- 1986 0151 01                  .byte   0x1\r
- 1987 0152 31                  .uleb128 0x31\r
- 1988 0153 13                  .uleb128 0x13\r
- 1989 0154 52                  .uleb128 0x52\r
- 1990 0155 01                  .uleb128 0x1\r
- 1991 0156 55                  .uleb128 0x55\r
- 1992 0157 06                  .uleb128 0x6\r
- 1993 0158 58                  .uleb128 0x58\r
- 1994 0159 0B                  .uleb128 0xb\r
- 1995 015a 59                  .uleb128 0x59\r
- 1996 015b 0B                  .uleb128 0xb\r
- 1997 015c 01                  .uleb128 0x1\r
- 1998 015d 13                  .uleb128 0x13\r
- 1999 015e 00                  .byte   0\r
- 2000 015f 00                  .byte   0\r
- 2001 0160 19                  .uleb128 0x19\r
- 2002 0161 0B                  .uleb128 0xb\r
- 2003 0162 01                  .byte   0x1\r
- 2004 0163 55                  .uleb128 0x55\r
- 2005 0164 06                  .uleb128 0x6\r
- 2006 0165 00                  .byte   0\r
- 2007 0166 00                  .byte   0\r
- 2008 0167 1A                  .uleb128 0x1a\r
- 2009 0168 34                  .uleb128 0x34\r
- 2010 0169 00                  .byte   0\r
- 2011 016a 31                  .uleb128 0x31\r
- 2012 016b 13                  .uleb128 0x13\r
- 2013 016c 02                  .uleb128 0x2\r
- 2014 016d 06                  .uleb128 0x6\r
- 2015 016e 00                  .byte   0\r
- 2016 016f 00                  .byte   0\r
- 2017 0170 1B                  .uleb128 0x1b\r
- 2018 0171 1D                  .uleb128 0x1d\r
- 2019 0172 01                  .byte   0x1\r
- 2020 0173 31                  .uleb128 0x31\r
- 2021 0174 13                  .uleb128 0x13\r
- 2022 0175 11                  .uleb128 0x11\r
- 2023 0176 01                  .uleb128 0x1\r
- 2024 0177 12                  .uleb128 0x12\r
- 2025 0178 01                  .uleb128 0x1\r
- 2026 0179 58                  .uleb128 0x58\r
- 2027 017a 0B                  .uleb128 0xb\r
- 2028 017b 59                  .uleb128 0x59\r
- 2029 017c 0B                  .uleb128 0xb\r
- 2030 017d 01                  .uleb128 0x1\r
- 2031 017e 13                  .uleb128 0x13\r
- 2032 017f 00                  .byte   0\r
- 2033 0180 00                  .byte   0\r
- 2034 0181 1C                  .uleb128 0x1c\r
- 2035 0182 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 50\r
-\r
-\r
- 2036 0183 01                  .byte   0x1\r
- 2037 0184 11                  .uleb128 0x11\r
- 2038 0185 01                  .uleb128 0x1\r
- 2039 0186 12                  .uleb128 0x12\r
- 2040 0187 01                  .uleb128 0x1\r
- 2041 0188 00                  .byte   0\r
- 2042 0189 00                  .byte   0\r
- 2043 018a 1D                  .uleb128 0x1d\r
- 2044 018b 898201              .uleb128 0x4109\r
- 2045 018e 00                  .byte   0\r
- 2046 018f 11                  .uleb128 0x11\r
- 2047 0190 01                  .uleb128 0x1\r
- 2048 0191 9542                .uleb128 0x2115\r
- 2049 0193 0C                  .uleb128 0xc\r
- 2050 0194 31                  .uleb128 0x31\r
- 2051 0195 13                  .uleb128 0x13\r
- 2052 0196 00                  .byte   0\r
- 2053 0197 00                  .byte   0\r
- 2054 0198 1E                  .uleb128 0x1e\r
- 2055 0199 05                  .uleb128 0x5\r
- 2056 019a 00                  .byte   0\r
- 2057 019b 03                  .uleb128 0x3\r
- 2058 019c 0E                  .uleb128 0xe\r
- 2059 019d 3A                  .uleb128 0x3a\r
- 2060 019e 0B                  .uleb128 0xb\r
- 2061 019f 3B                  .uleb128 0x3b\r
- 2062 01a0 0B                  .uleb128 0xb\r
- 2063 01a1 49                  .uleb128 0x49\r
- 2064 01a2 13                  .uleb128 0x13\r
- 2065 01a3 02                  .uleb128 0x2\r
- 2066 01a4 06                  .uleb128 0x6\r
- 2067 01a5 00                  .byte   0\r
- 2068 01a6 00                  .byte   0\r
- 2069 01a7 1F                  .uleb128 0x1f\r
- 2070 01a8 34                  .uleb128 0x34\r
- 2071 01a9 00                  .byte   0\r
- 2072 01aa 03                  .uleb128 0x3\r
- 2073 01ab 0E                  .uleb128 0xe\r
- 2074 01ac 3A                  .uleb128 0x3a\r
- 2075 01ad 0B                  .uleb128 0xb\r
- 2076 01ae 3B                  .uleb128 0x3b\r
- 2077 01af 0B                  .uleb128 0xb\r
- 2078 01b0 49                  .uleb128 0x49\r
- 2079 01b1 13                  .uleb128 0x13\r
- 2080 01b2 02                  .uleb128 0x2\r
- 2081 01b3 06                  .uleb128 0x6\r
- 2082 01b4 00                  .byte   0\r
- 2083 01b5 00                  .byte   0\r
- 2084 01b6 20                  .uleb128 0x20\r
- 2085 01b7 05                  .uleb128 0x5\r
- 2086 01b8 00                  .byte   0\r
- 2087 01b9 31                  .uleb128 0x31\r
- 2088 01ba 13                  .uleb128 0x13\r
- 2089 01bb 02                  .uleb128 0x2\r
- 2090 01bc 06                  .uleb128 0x6\r
- 2091 01bd 00                  .byte   0\r
- 2092 01be 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 51\r
-\r
-\r
- 2093 01bf 21                  .uleb128 0x21\r
- 2094 01c0 1D                  .uleb128 0x1d\r
- 2095 01c1 01                  .byte   0x1\r
- 2096 01c2 31                  .uleb128 0x31\r
- 2097 01c3 13                  .uleb128 0x13\r
- 2098 01c4 52                  .uleb128 0x52\r
- 2099 01c5 01                  .uleb128 0x1\r
- 2100 01c6 55                  .uleb128 0x55\r
- 2101 01c7 06                  .uleb128 0x6\r
- 2102 01c8 58                  .uleb128 0x58\r
- 2103 01c9 0B                  .uleb128 0xb\r
- 2104 01ca 59                  .uleb128 0x59\r
- 2105 01cb 05                  .uleb128 0x5\r
- 2106 01cc 01                  .uleb128 0x1\r
- 2107 01cd 13                  .uleb128 0x13\r
- 2108 01ce 00                  .byte   0\r
- 2109 01cf 00                  .byte   0\r
- 2110 01d0 22                  .uleb128 0x22\r
- 2111 01d1 898201              .uleb128 0x4109\r
- 2112 01d4 01                  .byte   0x1\r
- 2113 01d5 11                  .uleb128 0x11\r
- 2114 01d6 01                  .uleb128 0x1\r
- 2115 01d7 31                  .uleb128 0x31\r
- 2116 01d8 13                  .uleb128 0x13\r
- 2117 01d9 00                  .byte   0\r
- 2118 01da 00                  .byte   0\r
- 2119 01db 23                  .uleb128 0x23\r
- 2120 01dc 2E                  .uleb128 0x2e\r
- 2121 01dd 01                  .byte   0x1\r
- 2122 01de 3F                  .uleb128 0x3f\r
- 2123 01df 0C                  .uleb128 0xc\r
- 2124 01e0 03                  .uleb128 0x3\r
- 2125 01e1 0E                  .uleb128 0xe\r
- 2126 01e2 3A                  .uleb128 0x3a\r
- 2127 01e3 0B                  .uleb128 0xb\r
- 2128 01e4 3B                  .uleb128 0x3b\r
- 2129 01e5 05                  .uleb128 0x5\r
- 2130 01e6 27                  .uleb128 0x27\r
- 2131 01e7 0C                  .uleb128 0xc\r
- 2132 01e8 49                  .uleb128 0x49\r
- 2133 01e9 13                  .uleb128 0x13\r
- 2134 01ea 11                  .uleb128 0x11\r
- 2135 01eb 01                  .uleb128 0x1\r
- 2136 01ec 12                  .uleb128 0x12\r
- 2137 01ed 01                  .uleb128 0x1\r
- 2138 01ee 40                  .uleb128 0x40\r
- 2139 01ef 06                  .uleb128 0x6\r
- 2140 01f0 9742                .uleb128 0x2117\r
- 2141 01f2 0C                  .uleb128 0xc\r
- 2142 01f3 01                  .uleb128 0x1\r
- 2143 01f4 13                  .uleb128 0x13\r
- 2144 01f5 00                  .byte   0\r
- 2145 01f6 00                  .byte   0\r
- 2146 01f7 24                  .uleb128 0x24\r
- 2147 01f8 05                  .uleb128 0x5\r
- 2148 01f9 00                  .byte   0\r
- 2149 01fa 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 52\r
-\r
-\r
- 2150 01fb 0E                  .uleb128 0xe\r
- 2151 01fc 3A                  .uleb128 0x3a\r
- 2152 01fd 0B                  .uleb128 0xb\r
- 2153 01fe 3B                  .uleb128 0x3b\r
- 2154 01ff 05                  .uleb128 0x5\r
- 2155 0200 49                  .uleb128 0x49\r
- 2156 0201 13                  .uleb128 0x13\r
- 2157 0202 02                  .uleb128 0x2\r
- 2158 0203 06                  .uleb128 0x6\r
- 2159 0204 00                  .byte   0\r
- 2160 0205 00                  .byte   0\r
- 2161 0206 25                  .uleb128 0x25\r
- 2162 0207 34                  .uleb128 0x34\r
- 2163 0208 00                  .byte   0\r
- 2164 0209 03                  .uleb128 0x3\r
- 2165 020a 0E                  .uleb128 0xe\r
- 2166 020b 3A                  .uleb128 0x3a\r
- 2167 020c 0B                  .uleb128 0xb\r
- 2168 020d 3B                  .uleb128 0x3b\r
- 2169 020e 05                  .uleb128 0x5\r
- 2170 020f 49                  .uleb128 0x49\r
- 2171 0210 13                  .uleb128 0x13\r
- 2172 0211 02                  .uleb128 0x2\r
- 2173 0212 06                  .uleb128 0x6\r
- 2174 0213 00                  .byte   0\r
- 2175 0214 00                  .byte   0\r
- 2176 0215 26                  .uleb128 0x26\r
- 2177 0216 34                  .uleb128 0x34\r
- 2178 0217 00                  .byte   0\r
- 2179 0218 03                  .uleb128 0x3\r
- 2180 0219 08                  .uleb128 0x8\r
- 2181 021a 3A                  .uleb128 0x3a\r
- 2182 021b 0B                  .uleb128 0xb\r
- 2183 021c 3B                  .uleb128 0x3b\r
- 2184 021d 05                  .uleb128 0x5\r
- 2185 021e 49                  .uleb128 0x49\r
- 2186 021f 13                  .uleb128 0x13\r
- 2187 0220 02                  .uleb128 0x2\r
- 2188 0221 06                  .uleb128 0x6\r
- 2189 0222 00                  .byte   0\r
- 2190 0223 00                  .byte   0\r
- 2191 0224 27                  .uleb128 0x27\r
- 2192 0225 34                  .uleb128 0x34\r
- 2193 0226 00                  .byte   0\r
- 2194 0227 03                  .uleb128 0x3\r
- 2195 0228 0E                  .uleb128 0xe\r
- 2196 0229 3A                  .uleb128 0x3a\r
- 2197 022a 0B                  .uleb128 0xb\r
- 2198 022b 3B                  .uleb128 0x3b\r
- 2199 022c 05                  .uleb128 0x5\r
- 2200 022d 49                  .uleb128 0x49\r
- 2201 022e 13                  .uleb128 0x13\r
- 2202 022f 1C                  .uleb128 0x1c\r
- 2203 0230 0D                  .uleb128 0xd\r
- 2204 0231 00                  .byte   0\r
- 2205 0232 00                  .byte   0\r
- 2206 0233 28                  .uleb128 0x28\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 53\r
-\r
-\r
- 2207 0234 2E                  .uleb128 0x2e\r
- 2208 0235 01                  .byte   0x1\r
- 2209 0236 3F                  .uleb128 0x3f\r
- 2210 0237 0C                  .uleb128 0xc\r
- 2211 0238 03                  .uleb128 0x3\r
- 2212 0239 0E                  .uleb128 0xe\r
- 2213 023a 3A                  .uleb128 0x3a\r
- 2214 023b 0B                  .uleb128 0xb\r
- 2215 023c 3B                  .uleb128 0x3b\r
- 2216 023d 05                  .uleb128 0x5\r
- 2217 023e 27                  .uleb128 0x27\r
- 2218 023f 0C                  .uleb128 0xc\r
- 2219 0240 11                  .uleb128 0x11\r
- 2220 0241 01                  .uleb128 0x1\r
- 2221 0242 12                  .uleb128 0x12\r
- 2222 0243 01                  .uleb128 0x1\r
- 2223 0244 40                  .uleb128 0x40\r
- 2224 0245 06                  .uleb128 0x6\r
- 2225 0246 9742                .uleb128 0x2117\r
- 2226 0248 0C                  .uleb128 0xc\r
- 2227 0249 01                  .uleb128 0x1\r
- 2228 024a 13                  .uleb128 0x13\r
- 2229 024b 00                  .byte   0\r
- 2230 024c 00                  .byte   0\r
- 2231 024d 29                  .uleb128 0x29\r
- 2232 024e 2E                  .uleb128 0x2e\r
- 2233 024f 00                  .byte   0\r
- 2234 0250 3F                  .uleb128 0x3f\r
- 2235 0251 0C                  .uleb128 0xc\r
- 2236 0252 03                  .uleb128 0x3\r
- 2237 0253 0E                  .uleb128 0xe\r
- 2238 0254 3A                  .uleb128 0x3a\r
- 2239 0255 0B                  .uleb128 0xb\r
- 2240 0256 3B                  .uleb128 0x3b\r
- 2241 0257 05                  .uleb128 0x5\r
- 2242 0258 27                  .uleb128 0x27\r
- 2243 0259 0C                  .uleb128 0xc\r
- 2244 025a 11                  .uleb128 0x11\r
- 2245 025b 01                  .uleb128 0x1\r
- 2246 025c 12                  .uleb128 0x12\r
- 2247 025d 01                  .uleb128 0x1\r
- 2248 025e 40                  .uleb128 0x40\r
- 2249 025f 0A                  .uleb128 0xa\r
- 2250 0260 9742                .uleb128 0x2117\r
- 2251 0262 0C                  .uleb128 0xc\r
- 2252 0263 00                  .byte   0\r
- 2253 0264 00                  .byte   0\r
- 2254 0265 2A                  .uleb128 0x2a\r
- 2255 0266 01                  .uleb128 0x1\r
- 2256 0267 01                  .byte   0x1\r
- 2257 0268 49                  .uleb128 0x49\r
- 2258 0269 13                  .uleb128 0x13\r
- 2259 026a 01                  .uleb128 0x1\r
- 2260 026b 13                  .uleb128 0x13\r
- 2261 026c 00                  .byte   0\r
- 2262 026d 00                  .byte   0\r
- 2263 026e 2B                  .uleb128 0x2b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 54\r
-\r
-\r
- 2264 026f 21                  .uleb128 0x21\r
- 2265 0270 00                  .byte   0\r
- 2266 0271 49                  .uleb128 0x49\r
- 2267 0272 13                  .uleb128 0x13\r
- 2268 0273 2F                  .uleb128 0x2f\r
- 2269 0274 0B                  .uleb128 0xb\r
- 2270 0275 00                  .byte   0\r
- 2271 0276 00                  .byte   0\r
- 2272 0277 2C                  .uleb128 0x2c\r
- 2273 0278 34                  .uleb128 0x34\r
- 2274 0279 00                  .byte   0\r
- 2275 027a 03                  .uleb128 0x3\r
- 2276 027b 0E                  .uleb128 0xe\r
- 2277 027c 3A                  .uleb128 0x3a\r
- 2278 027d 0B                  .uleb128 0xb\r
- 2279 027e 3B                  .uleb128 0x3b\r
- 2280 027f 0B                  .uleb128 0xb\r
- 2281 0280 49                  .uleb128 0x49\r
- 2282 0281 13                  .uleb128 0x13\r
- 2283 0282 3F                  .uleb128 0x3f\r
- 2284 0283 0C                  .uleb128 0xc\r
- 2285 0284 02                  .uleb128 0x2\r
- 2286 0285 0A                  .uleb128 0xa\r
- 2287 0286 00                  .byte   0\r
- 2288 0287 00                  .byte   0\r
- 2289 0288 2D                  .uleb128 0x2d\r
- 2290 0289 2E                  .uleb128 0x2e\r
- 2291 028a 01                  .byte   0x1\r
- 2292 028b 3F                  .uleb128 0x3f\r
- 2293 028c 0C                  .uleb128 0xc\r
- 2294 028d 03                  .uleb128 0x3\r
- 2295 028e 0E                  .uleb128 0xe\r
- 2296 028f 3A                  .uleb128 0x3a\r
- 2297 0290 0B                  .uleb128 0xb\r
- 2298 0291 3B                  .uleb128 0x3b\r
- 2299 0292 0B                  .uleb128 0xb\r
- 2300 0293 27                  .uleb128 0x27\r
- 2301 0294 0C                  .uleb128 0xc\r
- 2302 0295 49                  .uleb128 0x49\r
- 2303 0296 13                  .uleb128 0x13\r
- 2304 0297 3C                  .uleb128 0x3c\r
- 2305 0298 0C                  .uleb128 0xc\r
- 2306 0299 01                  .uleb128 0x1\r
- 2307 029a 13                  .uleb128 0x13\r
- 2308 029b 00                  .byte   0\r
- 2309 029c 00                  .byte   0\r
- 2310 029d 2E                  .uleb128 0x2e\r
- 2311 029e 05                  .uleb128 0x5\r
- 2312 029f 00                  .byte   0\r
- 2313 02a0 49                  .uleb128 0x49\r
- 2314 02a1 13                  .uleb128 0x13\r
- 2315 02a2 00                  .byte   0\r
- 2316 02a3 00                  .byte   0\r
- 2317 02a4 2F                  .uleb128 0x2f\r
- 2318 02a5 2E                  .uleb128 0x2e\r
- 2319 02a6 01                  .byte   0x1\r
- 2320 02a7 3F                  .uleb128 0x3f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 55\r
-\r
-\r
- 2321 02a8 0C                  .uleb128 0xc\r
- 2322 02a9 03                  .uleb128 0x3\r
- 2323 02aa 0E                  .uleb128 0xe\r
- 2324 02ab 3A                  .uleb128 0x3a\r
- 2325 02ac 0B                  .uleb128 0xb\r
- 2326 02ad 3B                  .uleb128 0x3b\r
- 2327 02ae 0B                  .uleb128 0xb\r
- 2328 02af 27                  .uleb128 0x27\r
- 2329 02b0 0C                  .uleb128 0xc\r
- 2330 02b1 3C                  .uleb128 0x3c\r
- 2331 02b2 0C                  .uleb128 0xc\r
- 2332 02b3 01                  .uleb128 0x1\r
- 2333 02b4 13                  .uleb128 0x13\r
- 2334 02b5 00                  .byte   0\r
- 2335 02b6 00                  .byte   0\r
- 2336 02b7 30                  .uleb128 0x30\r
- 2337 02b8 2E                  .uleb128 0x2e\r
- 2338 02b9 00                  .byte   0\r
- 2339 02ba 3F                  .uleb128 0x3f\r
- 2340 02bb 0C                  .uleb128 0xc\r
- 2341 02bc 03                  .uleb128 0x3\r
- 2342 02bd 0E                  .uleb128 0xe\r
- 2343 02be 3A                  .uleb128 0x3a\r
- 2344 02bf 0B                  .uleb128 0xb\r
- 2345 02c0 3B                  .uleb128 0x3b\r
- 2346 02c1 0B                  .uleb128 0xb\r
- 2347 02c2 27                  .uleb128 0x27\r
- 2348 02c3 0C                  .uleb128 0xc\r
- 2349 02c4 3C                  .uleb128 0x3c\r
- 2350 02c5 0C                  .uleb128 0xc\r
- 2351 02c6 00                  .byte   0\r
- 2352 02c7 00                  .byte   0\r
- 2353 02c8 31                  .uleb128 0x31\r
- 2354 02c9 2E                  .uleb128 0x2e\r
- 2355 02ca 00                  .byte   0\r
- 2356 02cb 3F                  .uleb128 0x3f\r
- 2357 02cc 0C                  .uleb128 0xc\r
- 2358 02cd 03                  .uleb128 0x3\r
- 2359 02ce 0E                  .uleb128 0xe\r
- 2360 02cf 3A                  .uleb128 0x3a\r
- 2361 02d0 0B                  .uleb128 0xb\r
- 2362 02d1 3B                  .uleb128 0x3b\r
- 2363 02d2 0B                  .uleb128 0xb\r
- 2364 02d3 27                  .uleb128 0x27\r
- 2365 02d4 0C                  .uleb128 0xc\r
- 2366 02d5 49                  .uleb128 0x49\r
- 2367 02d6 13                  .uleb128 0x13\r
- 2368 02d7 3C                  .uleb128 0x3c\r
- 2369 02d8 0C                  .uleb128 0xc\r
- 2370 02d9 00                  .byte   0\r
- 2371 02da 00                  .byte   0\r
- 2372 02db 32                  .uleb128 0x32\r
- 2373 02dc 2E                  .uleb128 0x2e\r
- 2374 02dd 01                  .byte   0x1\r
- 2375 02de 3F                  .uleb128 0x3f\r
- 2376 02df 0C                  .uleb128 0xc\r
- 2377 02e0 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 56\r
-\r
-\r
- 2378 02e1 0E                  .uleb128 0xe\r
- 2379 02e2 27                  .uleb128 0x27\r
- 2380 02e3 0C                  .uleb128 0xc\r
- 2381 02e4 49                  .uleb128 0x49\r
- 2382 02e5 13                  .uleb128 0x13\r
- 2383 02e6 34                  .uleb128 0x34\r
- 2384 02e7 0C                  .uleb128 0xc\r
- 2385 02e8 3C                  .uleb128 0x3c\r
- 2386 02e9 0C                  .uleb128 0xc\r
- 2387 02ea 01                  .uleb128 0x1\r
- 2388 02eb 13                  .uleb128 0x13\r
- 2389 02ec 00                  .byte   0\r
- 2390 02ed 00                  .byte   0\r
- 2391 02ee 33                  .uleb128 0x33\r
- 2392 02ef 26                  .uleb128 0x26\r
- 2393 02f0 00                  .byte   0\r
- 2394 02f1 00                  .byte   0\r
- 2395 02f2 00                  .byte   0\r
- 2396 02f3 34                  .uleb128 0x34\r
- 2397 02f4 2E                  .uleb128 0x2e\r
- 2398 02f5 01                  .byte   0x1\r
- 2399 02f6 3F                  .uleb128 0x3f\r
- 2400 02f7 0C                  .uleb128 0xc\r
- 2401 02f8 03                  .uleb128 0x3\r
- 2402 02f9 0E                  .uleb128 0xe\r
- 2403 02fa 3A                  .uleb128 0x3a\r
- 2404 02fb 0B                  .uleb128 0xb\r
- 2405 02fc 3B                  .uleb128 0x3b\r
- 2406 02fd 0B                  .uleb128 0xb\r
- 2407 02fe 27                  .uleb128 0x27\r
- 2408 02ff 0C                  .uleb128 0xc\r
- 2409 0300 3C                  .uleb128 0x3c\r
- 2410 0301 0C                  .uleb128 0xc\r
- 2411 0302 00                  .byte   0\r
- 2412 0303 00                  .byte   0\r
- 2413 0304 00                  .byte   0\r
- 2414                          .section        .debug_loc,"",%progbits\r
- 2415                  .Ldebug_loc0:\r
- 2416                  .LLST0:\r
- 2417 0000 00000000            .4byte  .LFB13\r
- 2418 0004 04000000            .4byte  .LCFI0\r
- 2419 0008 0200                .2byte  0x2\r
- 2420 000a 7D                  .byte   0x7d\r
- 2421 000b 00                  .sleb128 0\r
- 2422 000c 04000000            .4byte  .LCFI0\r
- 2423 0010 54000000            .4byte  .LFE13\r
- 2424 0014 0200                .2byte  0x2\r
- 2425 0016 7D                  .byte   0x7d\r
- 2426 0017 08                  .sleb128 8\r
- 2427 0018 00000000            .4byte  0\r
- 2428 001c 00000000            .4byte  0\r
- 2429                  .LLST1:\r
- 2430 0020 00000000            .4byte  .LFB3\r
- 2431 0024 02000000            .4byte  .LCFI1\r
- 2432 0028 0200                .2byte  0x2\r
- 2433 002a 7D                  .byte   0x7d\r
- 2434 002b 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 57\r
-\r
-\r
- 2435 002c 02000000            .4byte  .LCFI1\r
- 2436 0030 28000000            .4byte  .LFE3\r
- 2437 0034 0200                .2byte  0x2\r
- 2438 0036 7D                  .byte   0x7d\r
- 2439 0037 08                  .sleb128 8\r
- 2440 0038 00000000            .4byte  0\r
- 2441 003c 00000000            .4byte  0\r
- 2442                  .LLST2:\r
- 2443 0040 06000000            .4byte  .LVL6\r
- 2444 0044 10000000            .4byte  .LVL8\r
- 2445 0048 0300                .2byte  0x3\r
- 2446 004a 09                  .byte   0x9\r
- 2447 004b FF                  .byte   0xff\r
- 2448 004c 9F                  .byte   0x9f\r
- 2449 004d 10000000            .4byte  .LVL8\r
- 2450 0051 15000000            .4byte  .LVL9-1\r
- 2451 0055 0100                .2byte  0x1\r
- 2452 0057 50                  .byte   0x50\r
- 2453 0058 00000000            .4byte  0\r
- 2454 005c 00000000            .4byte  0\r
- 2455                  .LLST3:\r
- 2456 0060 16000000            .4byte  .LVL9\r
- 2457 0064 24000000            .4byte  .LVL11\r
- 2458 0068 0300                .2byte  0x3\r
- 2459 006a 09                  .byte   0x9\r
- 2460 006b FF                  .byte   0xff\r
- 2461 006c 9F                  .byte   0x9f\r
- 2462 006d 00000000            .4byte  0\r
- 2463 0071 00000000            .4byte  0\r
- 2464                  .LLST4:\r
- 2465 0075 00000000            .4byte  .LFB4\r
- 2466 0079 02000000            .4byte  .LCFI2\r
- 2467 007d 0200                .2byte  0x2\r
- 2468 007f 7D                  .byte   0x7d\r
- 2469 0080 00                  .sleb128 0\r
- 2470 0081 02000000            .4byte  .LCFI2\r
- 2471 0085 2C000000            .4byte  .LFE4\r
- 2472 0089 0200                .2byte  0x2\r
- 2473 008b 7D                  .byte   0x7d\r
- 2474 008c 10                  .sleb128 16\r
- 2475 008d 00000000            .4byte  0\r
- 2476 0091 00000000            .4byte  0\r
- 2477                  .LLST5:\r
- 2478 0095 00000000            .4byte  .LVL13\r
- 2479 0099 07000000            .4byte  .LVL14-1\r
- 2480 009d 0100                .2byte  0x1\r
- 2481 009f 50                  .byte   0x50\r
- 2482 00a0 07000000            .4byte  .LVL14-1\r
- 2483 00a4 2C000000            .4byte  .LFE4\r
- 2484 00a8 0100                .2byte  0x1\r
- 2485 00aa 54                  .byte   0x54\r
- 2486 00ab 00000000            .4byte  0\r
- 2487 00af 00000000            .4byte  0\r
- 2488                  .LLST6:\r
- 2489 00b3 00000000            .4byte  .LVL13\r
- 2490 00b7 24000000            .4byte  .LVL17\r
- 2491 00bb 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 58\r
-\r
-\r
- 2492 00bd 30                  .byte   0x30\r
- 2493 00be 9F                  .byte   0x9f\r
- 2494 00bf 24000000            .4byte  .LVL17\r
- 2495 00c3 2C000000            .4byte  .LFE4\r
- 2496 00c7 0100                .2byte  0x1\r
- 2497 00c9 50                  .byte   0x50\r
- 2498 00ca 00000000            .4byte  0\r
- 2499 00ce 00000000            .4byte  0\r
- 2500                  .LLST7:\r
- 2501 00d2 00000000            .4byte  .LFB7\r
- 2502 00d6 02000000            .4byte  .LCFI3\r
- 2503 00da 0200                .2byte  0x2\r
- 2504 00dc 7D                  .byte   0x7d\r
- 2505 00dd 00                  .sleb128 0\r
- 2506 00de 02000000            .4byte  .LCFI3\r
- 2507 00e2 A0000000            .4byte  .LFE7\r
- 2508 00e6 0200                .2byte  0x2\r
- 2509 00e8 7D                  .byte   0x7d\r
- 2510 00e9 18                  .sleb128 24\r
- 2511 00ea 00000000            .4byte  0\r
- 2512 00ee 00000000            .4byte  0\r
- 2513                  .LLST8:\r
- 2514 00f2 00000000            .4byte  .LVL18\r
- 2515 00f6 0D000000            .4byte  .LVL19-1\r
- 2516 00fa 0100                .2byte  0x1\r
- 2517 00fc 50                  .byte   0x50\r
- 2518 00fd 0D000000            .4byte  .LVL19-1\r
- 2519 0101 A0000000            .4byte  .LFE7\r
- 2520 0105 0400                .2byte  0x4\r
- 2521 0107 F3                  .byte   0xf3\r
- 2522 0108 01                  .uleb128 0x1\r
- 2523 0109 50                  .byte   0x50\r
- 2524 010a 9F                  .byte   0x9f\r
- 2525 010b 00000000            .4byte  0\r
- 2526 010f 00000000            .4byte  0\r
- 2527                  .LLST9:\r
- 2528 0113 00000000            .4byte  .LVL18\r
- 2529 0117 0D000000            .4byte  .LVL19-1\r
- 2530 011b 0100                .2byte  0x1\r
- 2531 011d 51                  .byte   0x51\r
- 2532 011e 0D000000            .4byte  .LVL19-1\r
- 2533 0122 A0000000            .4byte  .LFE7\r
- 2534 0126 0400                .2byte  0x4\r
- 2535 0128 F3                  .byte   0xf3\r
- 2536 0129 01                  .uleb128 0x1\r
- 2537 012a 51                  .byte   0x51\r
- 2538 012b 9F                  .byte   0x9f\r
- 2539 012c 00000000            .4byte  0\r
- 2540 0130 00000000            .4byte  0\r
- 2541                  .LLST10:\r
- 2542 0134 00000000            .4byte  .LVL18\r
- 2543 0138 0D000000            .4byte  .LVL19-1\r
- 2544 013c 0100                .2byte  0x1\r
- 2545 013e 52                  .byte   0x52\r
- 2546 013f 0D000000            .4byte  .LVL19-1\r
- 2547 0143 A0000000            .4byte  .LFE7\r
- 2548 0147 0100                .2byte  0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 59\r
-\r
-\r
- 2549 0149 57                  .byte   0x57\r
- 2550 014a 00000000            .4byte  0\r
- 2551 014e 00000000            .4byte  0\r
- 2552                  .LLST11:\r
- 2553 0152 00000000            .4byte  .LVL18\r
- 2554 0156 0D000000            .4byte  .LVL19-1\r
- 2555 015a 0100                .2byte  0x1\r
- 2556 015c 53                  .byte   0x53\r
- 2557 015d 0D000000            .4byte  .LVL19-1\r
- 2558 0161 A0000000            .4byte  .LFE7\r
- 2559 0165 0400                .2byte  0x4\r
- 2560 0167 F3                  .byte   0xf3\r
- 2561 0168 01                  .uleb128 0x1\r
- 2562 0169 53                  .byte   0x53\r
- 2563 016a 9F                  .byte   0x9f\r
- 2564 016b 00000000            .4byte  0\r
- 2565 016f 00000000            .4byte  0\r
- 2566                  .LLST12:\r
- 2567 0173 50000000            .4byte  .LVL29\r
- 2568 0177 52000000            .4byte  .LVL30\r
- 2569 017b 0100                .2byte  0x1\r
- 2570 017d 54                  .byte   0x54\r
- 2571 017e 00000000            .4byte  0\r
- 2572 0182 00000000            .4byte  0\r
- 2573                  .LLST13:\r
- 2574 0186 10000000            .4byte  .LVL20\r
- 2575 018a 1E000000            .4byte  .LVL22\r
- 2576 018e 0100                .2byte  0x1\r
- 2577 0190 54                  .byte   0x54\r
- 2578 0191 00000000            .4byte  0\r
- 2579 0195 00000000            .4byte  0\r
- 2580                  .LLST14:\r
- 2581 0199 10000000            .4byte  .LVL20\r
- 2582 019d 4E000000            .4byte  .LVL28\r
- 2583 01a1 0100                .2byte  0x1\r
- 2584 01a3 57                  .byte   0x57\r
- 2585 01a4 52000000            .4byte  .LVL30\r
- 2586 01a8 94000000            .4byte  .LVL36\r
- 2587 01ac 0100                .2byte  0x1\r
- 2588 01ae 57                  .byte   0x57\r
- 2589 01af 00000000            .4byte  0\r
- 2590 01b3 00000000            .4byte  0\r
- 2591                  .LLST15:\r
- 2592 01b7 10000000            .4byte  .LVL20\r
- 2593 01bb 4E000000            .4byte  .LVL28\r
- 2594 01bf 0100                .2byte  0x1\r
- 2595 01c1 56                  .byte   0x56\r
- 2596 01c2 52000000            .4byte  .LVL30\r
- 2597 01c6 94000000            .4byte  .LVL36\r
- 2598 01ca 0100                .2byte  0x1\r
- 2599 01cc 56                  .byte   0x56\r
- 2600 01cd 00000000            .4byte  0\r
- 2601 01d1 00000000            .4byte  0\r
- 2602                  .LLST16:\r
- 2603 01d5 10000000            .4byte  .LVL20\r
- 2604 01d9 4E000000            .4byte  .LVL28\r
- 2605 01dd 0100                .2byte  0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 60\r
-\r
-\r
- 2606 01df 55                  .byte   0x55\r
- 2607 01e0 52000000            .4byte  .LVL30\r
- 2608 01e4 94000000            .4byte  .LVL36\r
- 2609 01e8 0100                .2byte  0x1\r
- 2610 01ea 55                  .byte   0x55\r
- 2611 01eb 00000000            .4byte  0\r
- 2612 01ef 00000000            .4byte  0\r
- 2613                  .LLST17:\r
- 2614 01f3 1E000000            .4byte  .LVL22\r
- 2615 01f7 20000000            .4byte  .LVL23\r
- 2616 01fb 0100                .2byte  0x1\r
- 2617 01fd 50                  .byte   0x50\r
- 2618 01fe 20000000            .4byte  .LVL23\r
- 2619 0202 36000000            .4byte  .LVL25\r
- 2620 0206 0100                .2byte  0x1\r
- 2621 0208 54                  .byte   0x54\r
- 2622 0209 48000000            .4byte  .LVL26\r
- 2623 020d 4E000000            .4byte  .LVL28\r
- 2624 0211 0100                .2byte  0x1\r
- 2625 0213 54                  .byte   0x54\r
- 2626 0214 52000000            .4byte  .LVL30\r
- 2627 0218 64000000            .4byte  .LVL32\r
- 2628 021c 0200                .2byte  0x2\r
- 2629 021e 30                  .byte   0x30\r
- 2630 021f 9F                  .byte   0x9f\r
- 2631 0220 64000000            .4byte  .LVL32\r
- 2632 0224 66000000            .4byte  .LVL33\r
- 2633 0228 0100                .2byte  0x1\r
- 2634 022a 50                  .byte   0x50\r
- 2635 022b 66000000            .4byte  .LVL33\r
- 2636 022f 7C000000            .4byte  .LVL35\r
- 2637 0233 0100                .2byte  0x1\r
- 2638 0235 54                  .byte   0x54\r
- 2639 0236 00000000            .4byte  0\r
- 2640 023a 00000000            .4byte  0\r
- 2641                  .LLST18:\r
- 2642 023e 00000000            .4byte  .LFB6\r
- 2643 0242 04000000            .4byte  .LCFI4\r
- 2644 0246 0200                .2byte  0x2\r
- 2645 0248 7D                  .byte   0x7d\r
- 2646 0249 00                  .sleb128 0\r
- 2647 024a 04000000            .4byte  .LCFI4\r
- 2648 024e 48000000            .4byte  .LFE6\r
- 2649 0252 0200                .2byte  0x2\r
- 2650 0254 7D                  .byte   0x7d\r
- 2651 0255 10                  .sleb128 16\r
- 2652 0256 00000000            .4byte  0\r
- 2653 025a 00000000            .4byte  0\r
- 2654                  .LLST19:\r
- 2655 025e 00000000            .4byte  .LVL37\r
- 2656 0262 3D000000            .4byte  .LVL41-1\r
- 2657 0266 0100                .2byte  0x1\r
- 2658 0268 50                  .byte   0x50\r
- 2659 0269 3D000000            .4byte  .LVL41-1\r
- 2660 026d 3E000000            .4byte  .LVL41\r
- 2661 0271 0400                .2byte  0x4\r
- 2662 0273 F3                  .byte   0xf3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 61\r
-\r
-\r
- 2663 0274 01                  .uleb128 0x1\r
- 2664 0275 50                  .byte   0x50\r
- 2665 0276 9F                  .byte   0x9f\r
- 2666 0277 3E000000            .4byte  .LVL41\r
- 2667 027b 42000000            .4byte  .LVL42\r
- 2668 027f 0100                .2byte  0x1\r
- 2669 0281 50                  .byte   0x50\r
- 2670 0282 42000000            .4byte  .LVL42\r
- 2671 0286 48000000            .4byte  .LFE6\r
- 2672 028a 0400                .2byte  0x4\r
- 2673 028c F3                  .byte   0xf3\r
- 2674 028d 01                  .uleb128 0x1\r
- 2675 028e 50                  .byte   0x50\r
- 2676 028f 9F                  .byte   0x9f\r
- 2677 0290 00000000            .4byte  0\r
- 2678 0294 00000000            .4byte  0\r
- 2679                  .LLST20:\r
- 2680 0298 00000000            .4byte  .LVL37\r
- 2681 029c 3D000000            .4byte  .LVL41-1\r
- 2682 02a0 0100                .2byte  0x1\r
- 2683 02a2 51                  .byte   0x51\r
- 2684 02a3 3D000000            .4byte  .LVL41-1\r
- 2685 02a7 3E000000            .4byte  .LVL41\r
- 2686 02ab 0400                .2byte  0x4\r
- 2687 02ad F3                  .byte   0xf3\r
- 2688 02ae 01                  .uleb128 0x1\r
- 2689 02af 51                  .byte   0x51\r
- 2690 02b0 9F                  .byte   0x9f\r
- 2691 02b1 3E000000            .4byte  .LVL41\r
- 2692 02b5 48000000            .4byte  .LFE6\r
- 2693 02b9 0100                .2byte  0x1\r
- 2694 02bb 51                  .byte   0x51\r
- 2695 02bc 00000000            .4byte  0\r
- 2696 02c0 00000000            .4byte  0\r
- 2697                  .LLST21:\r
- 2698 02c4 00000000            .4byte  .LVL37\r
- 2699 02c8 24000000            .4byte  .LVL40\r
- 2700 02cc 0100                .2byte  0x1\r
- 2701 02ce 52                  .byte   0x52\r
- 2702 02cf 24000000            .4byte  .LVL40\r
- 2703 02d3 3E000000            .4byte  .LVL41\r
- 2704 02d7 0300                .2byte  0x3\r
- 2705 02d9 75                  .byte   0x75\r
- 2706 02da 60                  .sleb128 -32\r
- 2707 02db 9F                  .byte   0x9f\r
- 2708 02dc 3E000000            .4byte  .LVL41\r
- 2709 02e0 48000000            .4byte  .LFE6\r
- 2710 02e4 0100                .2byte  0x1\r
- 2711 02e6 52                  .byte   0x52\r
- 2712 02e7 00000000            .4byte  0\r
- 2713 02eb 00000000            .4byte  0\r
- 2714                  .LLST22:\r
- 2715 02ef 0E000000            .4byte  .LVL38\r
- 2716 02f3 24000000            .4byte  .LVL40\r
- 2717 02f7 0100                .2byte  0x1\r
- 2718 02f9 56                  .byte   0x56\r
- 2719 02fa 24000000            .4byte  .LVL40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 62\r
-\r
-\r
- 2720 02fe 3D000000            .4byte  .LVL41-1\r
- 2721 0302 0A00                .2byte  0xa\r
- 2722 0304 70                  .byte   0x70\r
- 2723 0305 00                  .sleb128 0\r
- 2724 0306 38                  .byte   0x38\r
- 2725 0307 24                  .byte   0x24\r
- 2726 0308 71                  .byte   0x71\r
- 2727 0309 00                  .sleb128 0\r
- 2728 030a 22                  .byte   0x22\r
- 2729 030b 38                  .byte   0x38\r
- 2730 030c 24                  .byte   0x24\r
- 2731 030d 9F                  .byte   0x9f\r
- 2732 030e 00000000            .4byte  0\r
- 2733 0312 00000000            .4byte  0\r
- 2734                  .LLST23:\r
- 2735 0316 0E000000            .4byte  .LVL38\r
- 2736 031a 10000000            .4byte  .LVL39\r
- 2737 031e 0200                .2byte  0x2\r
- 2738 0320 30                  .byte   0x30\r
- 2739 0321 9F                  .byte   0x9f\r
- 2740 0322 00000000            .4byte  0\r
- 2741 0326 00000000            .4byte  0\r
- 2742                  .LLST24:\r
- 2743 032a 00000000            .4byte  .LFB5\r
- 2744 032e 06000000            .4byte  .LCFI5\r
- 2745 0332 0200                .2byte  0x2\r
- 2746 0334 7D                  .byte   0x7d\r
- 2747 0335 00                  .sleb128 0\r
- 2748 0336 06000000            .4byte  .LCFI5\r
- 2749 033a 5C000000            .4byte  .LFE5\r
- 2750 033e 0200                .2byte  0x2\r
- 2751 0340 7D                  .byte   0x7d\r
- 2752 0341 18                  .sleb128 24\r
- 2753 0342 00000000            .4byte  0\r
- 2754 0346 00000000            .4byte  0\r
- 2755                  .LLST25:\r
- 2756 034a 00000000            .4byte  .LVL43\r
- 2757 034e 1A000000            .4byte  .LVL45\r
- 2758 0352 0100                .2byte  0x1\r
- 2759 0354 50                  .byte   0x50\r
- 2760 0355 1A000000            .4byte  .LVL45\r
- 2761 0359 32000000            .4byte  .LVL49\r
- 2762 035d 0400                .2byte  0x4\r
- 2763 035f F3                  .byte   0xf3\r
- 2764 0360 01                  .uleb128 0x1\r
- 2765 0361 50                  .byte   0x50\r
- 2766 0362 9F                  .byte   0x9f\r
- 2767 0363 32000000            .4byte  .LVL49\r
- 2768 0367 34000000            .4byte  .LVL50\r
- 2769 036b 0100                .2byte  0x1\r
- 2770 036d 50                  .byte   0x50\r
- 2771 036e 34000000            .4byte  .LVL50\r
- 2772 0372 50000000            .4byte  .LVL53\r
- 2773 0376 0400                .2byte  0x4\r
- 2774 0378 F3                  .byte   0xf3\r
- 2775 0379 01                  .uleb128 0x1\r
- 2776 037a 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 63\r
-\r
-\r
- 2777 037b 9F                  .byte   0x9f\r
- 2778 037c 50000000            .4byte  .LVL53\r
- 2779 0380 54000000            .4byte  .LVL54\r
- 2780 0384 0100                .2byte  0x1\r
- 2781 0386 50                  .byte   0x50\r
- 2782 0387 54000000            .4byte  .LVL54\r
- 2783 038b 5C000000            .4byte  .LFE5\r
- 2784 038f 0400                .2byte  0x4\r
- 2785 0391 F3                  .byte   0xf3\r
- 2786 0392 01                  .uleb128 0x1\r
- 2787 0393 50                  .byte   0x50\r
- 2788 0394 9F                  .byte   0x9f\r
- 2789 0395 00000000            .4byte  0\r
- 2790 0399 00000000            .4byte  0\r
- 2791                  .LLST26:\r
- 2792 039d 00000000            .4byte  .LVL43\r
- 2793 03a1 1E000000            .4byte  .LVL47\r
- 2794 03a5 0100                .2byte  0x1\r
- 2795 03a7 51                  .byte   0x51\r
- 2796 03a8 1E000000            .4byte  .LVL47\r
- 2797 03ac 32000000            .4byte  .LVL49\r
- 2798 03b0 0400                .2byte  0x4\r
- 2799 03b2 F3                  .byte   0xf3\r
- 2800 03b3 01                  .uleb128 0x1\r
- 2801 03b4 51                  .byte   0x51\r
- 2802 03b5 9F                  .byte   0x9f\r
- 2803 03b6 32000000            .4byte  .LVL49\r
- 2804 03ba 34000000            .4byte  .LVL50\r
- 2805 03be 0100                .2byte  0x1\r
- 2806 03c0 51                  .byte   0x51\r
- 2807 03c1 34000000            .4byte  .LVL50\r
- 2808 03c5 50000000            .4byte  .LVL53\r
- 2809 03c9 0400                .2byte  0x4\r
- 2810 03cb F3                  .byte   0xf3\r
- 2811 03cc 01                  .uleb128 0x1\r
- 2812 03cd 51                  .byte   0x51\r
- 2813 03ce 9F                  .byte   0x9f\r
- 2814 03cf 50000000            .4byte  .LVL53\r
- 2815 03d3 5C000000            .4byte  .LFE5\r
- 2816 03d7 0100                .2byte  0x1\r
- 2817 03d9 51                  .byte   0x51\r
- 2818 03da 00000000            .4byte  0\r
- 2819 03de 00000000            .4byte  0\r
- 2820                  .LLST27:\r
- 2821 03e2 00000000            .4byte  .LVL43\r
- 2822 03e6 3C000000            .4byte  .LVL51\r
- 2823 03ea 0100                .2byte  0x1\r
- 2824 03ec 52                  .byte   0x52\r
- 2825 03ed 3C000000            .4byte  .LVL51\r
- 2826 03f1 3F000000            .4byte  .LVL52-1\r
- 2827 03f5 0100                .2byte  0x1\r
- 2828 03f7 51                  .byte   0x51\r
- 2829 03f8 3F000000            .4byte  .LVL52-1\r
- 2830 03fc 50000000            .4byte  .LVL53\r
- 2831 0400 0400                .2byte  0x4\r
- 2832 0402 F3                  .byte   0xf3\r
- 2833 0403 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 64\r
-\r
-\r
- 2834 0404 52                  .byte   0x52\r
- 2835 0405 9F                  .byte   0x9f\r
- 2836 0406 50000000            .4byte  .LVL53\r
- 2837 040a 5C000000            .4byte  .LFE5\r
- 2838 040e 0100                .2byte  0x1\r
- 2839 0410 52                  .byte   0x52\r
- 2840 0411 00000000            .4byte  0\r
- 2841 0415 00000000            .4byte  0\r
- 2842                  .LLST28:\r
- 2843 0419 1C000000            .4byte  .LVL46\r
- 2844 041d 1E000000            .4byte  .LVL47\r
- 2845 0421 0200                .2byte  0x2\r
- 2846 0423 30                  .byte   0x30\r
- 2847 0424 9F                  .byte   0x9f\r
- 2848 0425 00000000            .4byte  0\r
- 2849 0429 00000000            .4byte  0\r
- 2850                  .LLST29:\r
- 2851 042d 1C000000            .4byte  .LVL46\r
- 2852 0431 30000000            .4byte  .LVL48\r
- 2853 0435 0100                .2byte  0x1\r
- 2854 0437 56                  .byte   0x56\r
- 2855 0438 30000000            .4byte  .LVL48\r
- 2856 043c 32000000            .4byte  .LVL49\r
- 2857 0440 0C00                .2byte  0xc\r
- 2858 0442 75                  .byte   0x75\r
- 2859 0443 808009              .sleb128 147456\r
- 2860 0446 38                  .byte   0x38\r
- 2861 0447 24                  .byte   0x24\r
- 2862 0448 77                  .byte   0x77\r
- 2863 0449 00                  .sleb128 0\r
- 2864 044a 22                  .byte   0x22\r
- 2865 044b 35                  .byte   0x35\r
- 2866 044c 24                  .byte   0x24\r
- 2867 044d 9F                  .byte   0x9f\r
- 2868 044e 00000000            .4byte  0\r
- 2869 0452 00000000            .4byte  0\r
- 2870                  .LLST30:\r
- 2871 0456 12000000            .4byte  .LVL44\r
- 2872 045a 32000000            .4byte  .LVL49\r
- 2873 045e 0400                .2byte  0x4\r
- 2874 0460 0A                  .byte   0xa\r
- 2875 0461 2001                .2byte  0x120\r
- 2876 0463 9F                  .byte   0x9f\r
- 2877 0464 34000000            .4byte  .LVL50\r
- 2878 0468 50000000            .4byte  .LVL53\r
- 2879 046c 0100                .2byte  0x1\r
- 2880 046e 56                  .byte   0x56\r
- 2881 046f 00000000            .4byte  0\r
- 2882 0473 00000000            .4byte  0\r
- 2883                  .LLST31:\r
- 2884 0477 00000000            .4byte  .LFB8\r
- 2885 047b 02000000            .4byte  .LCFI6\r
- 2886 047f 0200                .2byte  0x2\r
- 2887 0481 7D                  .byte   0x7d\r
- 2888 0482 00                  .sleb128 0\r
- 2889 0483 02000000            .4byte  .LCFI6\r
- 2890 0487 44000000            .4byte  .LFE8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 65\r
-\r
-\r
- 2891 048b 0200                .2byte  0x2\r
- 2892 048d 7D                  .byte   0x7d\r
- 2893 048e 08                  .sleb128 8\r
- 2894 048f 00000000            .4byte  0\r
- 2895 0493 00000000            .4byte  0\r
- 2896                  .LLST32:\r
- 2897 0497 00000000            .4byte  .LVL55\r
- 2898 049b 07000000            .4byte  .LVL56-1\r
- 2899 049f 0100                .2byte  0x1\r
- 2900 04a1 50                  .byte   0x50\r
- 2901 04a2 07000000            .4byte  .LVL56-1\r
- 2902 04a6 44000000            .4byte  .LFE8\r
- 2903 04aa 0400                .2byte  0x4\r
- 2904 04ac F3                  .byte   0xf3\r
- 2905 04ad 01                  .uleb128 0x1\r
- 2906 04ae 50                  .byte   0x50\r
- 2907 04af 9F                  .byte   0x9f\r
- 2908 04b0 00000000            .4byte  0\r
- 2909 04b4 00000000            .4byte  0\r
- 2910                  .LLST33:\r
- 2911 04b8 08000000            .4byte  .LVL56\r
- 2912 04bc 3D000000            .4byte  .LVL57-1\r
- 2913 04c0 0100                .2byte  0x1\r
- 2914 04c2 50                  .byte   0x50\r
- 2915 04c3 00000000            .4byte  0\r
- 2916 04c7 00000000            .4byte  0\r
- 2917                          .section        .debug_aranges,"",%progbits\r
- 2918 0000 7C000000            .4byte  0x7c\r
- 2919 0004 0200                .2byte  0x2\r
- 2920 0006 00000000            .4byte  .Ldebug_info0\r
- 2921 000a 04                  .byte   0x4\r
- 2922 000b 00                  .byte   0\r
- 2923 000c 0000                .2byte  0\r
- 2924 000e 0000                .2byte  0\r
- 2925 0010 00000000            .4byte  .LFB13\r
- 2926 0014 54000000            .4byte  .LFE13-.LFB13\r
- 2927 0018 00000000            .4byte  .LFB0\r
- 2928 001c 1C000000            .4byte  .LFE0-.LFB0\r
- 2929 0020 00000000            .4byte  .LFB1\r
- 2930 0024 18000000            .4byte  .LFE1-.LFB1\r
- 2931 0028 00000000            .4byte  .LFB3\r
- 2932 002c 28000000            .4byte  .LFE3-.LFB3\r
- 2933 0030 00000000            .4byte  .LFB4\r
- 2934 0034 2C000000            .4byte  .LFE4-.LFB4\r
- 2935 0038 00000000            .4byte  .LFB7\r
- 2936 003c A0000000            .4byte  .LFE7-.LFB7\r
- 2937 0040 00000000            .4byte  .LFB6\r
- 2938 0044 48000000            .4byte  .LFE6-.LFB6\r
- 2939 0048 00000000            .4byte  .LFB5\r
- 2940 004c 5C000000            .4byte  .LFE5-.LFB5\r
- 2941 0050 00000000            .4byte  .LFB8\r
- 2942 0054 44000000            .4byte  .LFE8-.LFB8\r
- 2943 0058 00000000            .4byte  .LFB9\r
- 2944 005c 18000000            .4byte  .LFE9-.LFB9\r
- 2945 0060 00000000            .4byte  .LFB10\r
- 2946 0064 18000000            .4byte  .LFE10-.LFB10\r
- 2947 0068 00000000            .4byte  .LFB11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 66\r
-\r
-\r
- 2948 006c 20000000            .4byte  .LFE11-.LFB11\r
- 2949 0070 00000000            .4byte  .LFB12\r
- 2950 0074 0C000000            .4byte  .LFE12-.LFB12\r
- 2951 0078 00000000            .4byte  0\r
- 2952 007c 00000000            .4byte  0\r
- 2953                          .section        .debug_ranges,"",%progbits\r
- 2954                  .Ldebug_ranges0:\r
- 2955 0000 02000000            .4byte  .LBB6\r
- 2956 0004 10000000            .4byte  .LBE6\r
- 2957 0008 24000000            .4byte  .LBB11\r
- 2958 000c 26000000            .4byte  .LBE11\r
- 2959 0010 00000000            .4byte  0\r
- 2960 0014 00000000            .4byte  0\r
- 2961 0018 02000000            .4byte  .LBB7\r
- 2962 001c 10000000            .4byte  .LBE7\r
- 2963 0020 24000000            .4byte  .LBB8\r
- 2964 0024 26000000            .4byte  .LBE8\r
- 2965 0028 00000000            .4byte  0\r
- 2966 002c 00000000            .4byte  0\r
- 2967 0030 10000000            .4byte  .LBB14\r
- 2968 0034 4E000000            .4byte  .LBE14\r
- 2969 0038 52000000            .4byte  .LBB17\r
- 2970 003c 94000000            .4byte  .LBE17\r
- 2971 0040 00000000            .4byte  0\r
- 2972 0044 00000000            .4byte  0\r
- 2973 0048 10000000            .4byte  .LBB15\r
- 2974 004c 4E000000            .4byte  .LBE15\r
- 2975 0050 52000000            .4byte  .LBB16\r
- 2976 0054 94000000            .4byte  .LBE16\r
- 2977 0058 00000000            .4byte  0\r
- 2978 005c 00000000            .4byte  0\r
- 2979 0060 00000000            .4byte  .LFB13\r
- 2980 0064 54000000            .4byte  .LFE13\r
- 2981 0068 00000000            .4byte  .LFB0\r
- 2982 006c 1C000000            .4byte  .LFE0\r
- 2983 0070 00000000            .4byte  .LFB1\r
- 2984 0074 18000000            .4byte  .LFE1\r
- 2985 0078 00000000            .4byte  .LFB3\r
- 2986 007c 28000000            .4byte  .LFE3\r
- 2987 0080 00000000            .4byte  .LFB4\r
- 2988 0084 2C000000            .4byte  .LFE4\r
- 2989 0088 00000000            .4byte  .LFB7\r
- 2990 008c A0000000            .4byte  .LFE7\r
- 2991 0090 00000000            .4byte  .LFB6\r
- 2992 0094 48000000            .4byte  .LFE6\r
- 2993 0098 00000000            .4byte  .LFB5\r
- 2994 009c 5C000000            .4byte  .LFE5\r
- 2995 00a0 00000000            .4byte  .LFB8\r
- 2996 00a4 44000000            .4byte  .LFE8\r
- 2997 00a8 00000000            .4byte  .LFB9\r
- 2998 00ac 18000000            .4byte  .LFE9\r
- 2999 00b0 00000000            .4byte  .LFB10\r
- 3000 00b4 18000000            .4byte  .LFE10\r
- 3001 00b8 00000000            .4byte  .LFB11\r
- 3002 00bc 20000000            .4byte  .LFE11\r
- 3003 00c0 00000000            .4byte  .LFB12\r
- 3004 00c4 0C000000            .4byte  .LFE12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 67\r
-\r
-\r
- 3005 00c8 00000000            .4byte  0\r
- 3006 00cc 00000000            .4byte  0\r
- 3007                          .section        .debug_line,"",%progbits\r
- 3008                  .Ldebug_line0:\r
- 3009 0000 FD010000            .section        .debug_str,"MS",%progbits,1\r
- 3009      02005C00 \r
- 3009      00000201 \r
- 3009      FB0E0D00 \r
- 3009      01010101 \r
- 3010                  .LASF15:\r
- 3011 0000 63797374            .ascii  "cystatus\000"\r
- 3011      61747573 \r
- 3011      00\r
- 3012                  .LASF16:\r
- 3013 0009 72656738            .ascii  "reg8\000"\r
- 3013      00\r
- 3014                  .LASF40:\r
- 3015 000e 726F7742            .ascii  "rowBuffer\000"\r
- 3015      75666665 \r
- 3015      7200\r
- 3016                  .LASF37:\r
- 3017 0018 43794545            .ascii  "CyEEPROM_Stop\000"\r
- 3017      50524F4D \r
- 3017      5F53746F \r
- 3017      7000\r
- 3018                  .LASF45:\r
- 3019 0026 43795370            .ascii  "CySpcStart\000"\r
- 3019      63537461 \r
- 3019      727400\r
- 3020                  .LASF47:\r
- 3021 0031 43795370            .ascii  "CySpcWriteRow\000"\r
- 3021      63577269 \r
- 3021      7465526F \r
- 3021      7700\r
- 3022                  .LASF3:\r
- 3023 003f 73686F72            .ascii  "short unsigned int\000"\r
- 3023      7420756E \r
- 3023      7369676E \r
- 3023      65642069 \r
- 3023      6E7400\r
- 3024                  .LASF43:\r
- 3025 0052 43795370            .ascii  "CySpcReadData\000"\r
- 3025      63526561 \r
- 3025      64446174 \r
- 3025      6100\r
- 3026                  .LASF22:\r
- 3027 0060 73746174            .ascii  "status\000"\r
- 3027      757300\r
- 3028                  .LASF12:\r
- 3029 0067 666C6F61            .ascii  "float\000"\r
- 3029      7400\r
- 3030                  .LASF32:\r
- 3031 006d 4379466C            .ascii  "CyFlash_SetWaitCycles\000"\r
- 3031      6173685F \r
- 3031      53657457 \r
- 3031      61697443 \r
- 3031      79636C65 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 68\r
-\r
-\r
- 3032                  .LASF7:\r
- 3033 0083 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 3033      206C6F6E \r
- 3033      6720756E \r
- 3033      7369676E \r
- 3033      65642069 \r
- 3034                  .LASF24:\r
- 3035 009a 43795365            .ascii  "CySetFlashEEBuffer\000"\r
- 3035      74466C61 \r
- 3035      73684545 \r
- 3035      42756666 \r
- 3035      657200\r
- 3036                  .LASF44:\r
- 3037 00ad 43795370            .ascii  "CySpcUnlock\000"\r
- 3037      63556E6C \r
- 3037      6F636B00 \r
- 3038                  .LASF20:\r
- 3039 00b9 726F7744            .ascii  "rowData\000"\r
- 3039      61746100 \r
- 3040                  .LASF36:\r
- 3041 00c1 43794545            .ascii  "CyEEPROM_Start\000"\r
- 3041      50524F4D \r
- 3041      5F537461 \r
- 3041      727400\r
- 3042                  .LASF34:\r
- 3043 00d0 696E7465            .ascii  "interruptState\000"\r
- 3043      72727570 \r
- 3043      74537461 \r
- 3043      746500\r
- 3044                  .LASF5:\r
- 3045 00df 6C6F6E67            .ascii  "long unsigned int\000"\r
- 3045      20756E73 \r
- 3045      69676E65 \r
- 3045      6420696E \r
- 3045      7400\r
- 3046                  .LASF54:\r
- 3047 00f1 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 3047      43534932 \r
- 3047      53445C73 \r
- 3047      6F667477 \r
- 3047      6172655C \r
- 3048 0120 6E00                .ascii  "n\000"\r
- 3049                  .LASF9:\r
- 3050 0122 75696E74            .ascii  "uint8\000"\r
- 3050      3800\r
- 3051                  .LASF18:\r
- 3052 0128 61727261            .ascii  "arrayId\000"\r
- 3052      79496400 \r
- 3053                  .LASF56:\r
- 3054 0130 64696554            .ascii  "dieTemperature\000"\r
- 3054      656D7065 \r
- 3054      72617475 \r
- 3054      726500\r
- 3055                  .LASF25:\r
- 3056 013f 43795772            .ascii  "CyWriteRowConfig\000"\r
- 3056      69746552 \r
- 3056      6F77436F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 69\r
-\r
-\r
- 3056      6E666967 \r
- 3056      00\r
- 3057                  .LASF1:\r
- 3058 0150 756E7369            .ascii  "unsigned char\000"\r
- 3058      676E6564 \r
- 3058      20636861 \r
- 3058      7200\r
- 3059                  .LASF13:\r
- 3060 015e 646F7562            .ascii  "double\000"\r
- 3060      6C6500\r
- 3061                  .LASF35:\r
- 3062 0165 4379466C            .ascii  "CyFlash_Stop\000"\r
- 3062      6173685F \r
- 3062      53746F70 \r
- 3062      00\r
- 3063                  .LASF21:\r
- 3064 0172 726F7753            .ascii  "rowSize\000"\r
- 3064      697A6500 \r
- 3065                  .LASF2:\r
- 3066 017a 73686F72            .ascii  "short int\000"\r
- 3066      7420696E \r
- 3066      7400\r
- 3067                  .LASF39:\r
- 3068 0184 43794545            .ascii  "CyEEPROM_ReadRelease\000"\r
- 3068      50524F4D \r
- 3068      5F526561 \r
- 3068      6452656C \r
- 3068      65617365 \r
- 3069                  .LASF42:\r
- 3070 0199 43795370            .ascii  "CySpcGetTemp\000"\r
- 3070      63476574 \r
- 3070      54656D70 \r
- 3070      00\r
- 3071                  .LASF10:\r
- 3072 01a6 75696E74            .ascii  "uint16\000"\r
- 3072      313600\r
- 3073                  .LASF50:\r
- 3074 01ad 43795370            .ascii  "CySpcLock\000"\r
- 3074      634C6F63 \r
- 3074      6B00\r
- 3075                  .LASF11:\r
- 3076 01b7 75696E74            .ascii  "uint32\000"\r
- 3076      333200\r
- 3077                  .LASF51:\r
- 3078 01be 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 3078      74657243 \r
- 3078      72697469 \r
- 3078      63616C53 \r
- 3078      65637469 \r
- 3079                  .LASF8:\r
- 3080 01d5 756E7369            .ascii  "unsigned int\000"\r
- 3080      676E6564 \r
- 3080      20696E74 \r
- 3080      00\r
- 3081                  .LASF31:\r
- 3082 01e2 4379466C            .ascii  "CyFlash_Start\000"\r
- 3082      6173685F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 70\r
-\r
-\r
- 3082      53746172 \r
- 3082      7400\r
- 3083                  .LASF57:\r
- 3084 01f0 43794578            .ascii  "CyExitCriticalSection\000"\r
- 3084      69744372 \r
- 3084      69746963 \r
- 3084      616C5365 \r
- 3084      6374696F \r
- 3085                  .LASF28:\r
- 3086 0206 726F7745            .ascii  "rowECC\000"\r
- 3086      434300\r
- 3087                  .LASF38:\r
- 3088 020d 43794545            .ascii  "CyEEPROM_ReadReserve\000"\r
- 3088      50524F4D \r
- 3088      5F526561 \r
- 3088      64526573 \r
- 3088      65727665 \r
- 3089                  .LASF46:\r
- 3090 0222 43795370            .ascii  "CySpcLoadRow\000"\r
- 3090      634C6F61 \r
- 3090      64526F77 \r
- 3090      00\r
- 3091                  .LASF17:\r
- 3092 022f 73697A65            .ascii  "sizetype\000"\r
- 3092      74797065 \r
- 3092      00\r
- 3093                  .LASF23:\r
- 3094 0238 43795365            .ascii  "CySetTemp\000"\r
- 3094      7454656D \r
- 3094      7000\r
- 3095                  .LASF6:\r
- 3096 0242 6C6F6E67            .ascii  "long long int\000"\r
- 3096      206C6F6E \r
- 3096      6720696E \r
- 3096      7400\r
- 3097                  .LASF48:\r
- 3098 0250 43794465            .ascii  "CyDelayUs\000"\r
- 3098      6C617955 \r
- 3098      7300\r
- 3099                  .LASF49:\r
- 3100 025a 6D656D63            .ascii  "memcpy\000"\r
- 3100      707900\r
- 3101                  .LASF55:\r
- 3102 0261 43795365            .ascii  "CySetTempInt\000"\r
- 3102      7454656D \r
- 3102      70496E74 \r
- 3102      00\r
- 3103                  .LASF29:\r
- 3104 026e 6F666673            .ascii  "offset\000"\r
- 3104      657400\r
- 3105                  .LASF33:\r
- 3106 0275 66726571            .ascii  "freq\000"\r
- 3106      00\r
- 3107                  .LASF26:\r
- 3108 027a 62756666            .ascii  "buffer\000"\r
- 3108      657200\r
- 3109                  .LASF52:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPOj4Rp.s                      page 71\r
-\r
-\r
- 3110 0281 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 3110      4320342E \r
- 3110      372E3320 \r
- 3110      32303133 \r
- 3110      30333132 \r
- 3111 02b4 616E6368            .ascii  "anch revision 196615]\000"\r
- 3111      20726576 \r
- 3111      6973696F \r
- 3111      6E203139 \r
- 3111      36363135 \r
- 3112                  .LASF53:\r
- 3113 02ca 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\CyFlash.c\000"\r
- 3113      6E657261 \r
- 3113      7465645F \r
- 3113      536F7572 \r
- 3113      63655C50 \r
- 3114                  .LASF4:\r
- 3115 02ed 6C6F6E67            .ascii  "long int\000"\r
- 3115      20696E74 \r
- 3115      00\r
- 3116                  .LASF14:\r
- 3117 02f6 63686172            .ascii  "char\000"\r
- 3117      00\r
- 3118                  .LASF19:\r
- 3119 02fb 726F774E            .ascii  "rowNumber\000"\r
- 3119      756D6265 \r
- 3119      7200\r
- 3120                  .LASF0:\r
- 3121 0305 7369676E            .ascii  "signed char\000"\r
- 3121      65642063 \r
- 3121      68617200 \r
- 3122                  .LASF41:\r
- 3123 0311 43795772            .ascii  "CyWriteRowFull\000"\r
- 3123      69746552 \r
- 3123      6F774675 \r
- 3123      6C6C00\r
- 3124                  .LASF27:\r
- 3125 0320 726F7741            .ascii  "rowAddress\000"\r
- 3125      64647265 \r
- 3125      737300\r
- 3126                  .LASF30:\r
- 3127 032b 43795772            .ascii  "CyWriteRowData\000"\r
- 3127      69746552 \r
- 3127      6F774461 \r
- 3127      746100\r
- 3128                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.o
deleted file mode 100755 (executable)
index 730328e..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyFlash.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.lst
deleted file mode 100755 (executable)
index 840e0b9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.lst
+++ /dev/null
@@ -1,11192 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "CyLib.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CyIMO_SetTrimValue,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .thumb\r
-  21                           .thumb_func\r
-  22                           .type   CyIMO_SetTrimValue, %function\r
-  23                   CyIMO_SetTrimValue:\r
-  24                   .LFB7:\r
-  25                           .file 1 ".\\Generated_Source\\PSoC5\\CyLib.c"\r
-   1:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/CyLib.c **** * File Name: CyLib.c\r
-   3:.\Generated_Source\PSoC5/CyLib.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/CyLib.c **** *\r
-   5:.\Generated_Source\PSoC5/CyLib.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/CyLib.c **** *   Provides system API for the clocking, interrupts and watchdog timer.\r
-   7:.\Generated_Source\PSoC5/CyLib.c **** *\r
-   8:.\Generated_Source\PSoC5/CyLib.c **** *  Note:\r
-   9:.\Generated_Source\PSoC5/CyLib.c **** *   Documentation of the API's in this file is located in the\r
-  10:.\Generated_Source\PSoC5/CyLib.c **** *   System Reference Guide provided with PSoC Creator.\r
-  11:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  12:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-  13:.\Generated_Source\PSoC5/CyLib.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  14:.\Generated_Source\PSoC5/CyLib.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  15:.\Generated_Source\PSoC5/CyLib.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  16:.\Generated_Source\PSoC5/CyLib.c **** * the software package with which this file was provided.\r
-  17:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-  18:.\Generated_Source\PSoC5/CyLib.c **** \r
-  19:.\Generated_Source\PSoC5/CyLib.c **** #include "CyLib.h"\r
-  20:.\Generated_Source\PSoC5/CyLib.c **** \r
-  21:.\Generated_Source\PSoC5/CyLib.c **** \r
-  22:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-  23:.\Generated_Source\PSoC5/CyLib.c **** * The CyResetStatus variable is used to obtain value of RESET_SR0 register after\r
-  24:.\Generated_Source\PSoC5/CyLib.c **** * a device reset. It is set from initialize_psoc() at the early initialization\r
-  25:.\Generated_Source\PSoC5/CyLib.c **** * stage. In case of IAR EW IDE, initialize_psoc() is executed before the data\r
-  26:.\Generated_Source\PSoC5/CyLib.c **** * sections are initialized. To avoid zeroing, CyResetStatus should be placed\r
-  27:.\Generated_Source\PSoC5/CyLib.c **** * to the .noinit section.\r
-  28:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-  29:.\Generated_Source\PSoC5/CyLib.c **** CY_NOINIT uint8 CYXDATA CyResetStatus;\r
-  30:.\Generated_Source\PSoC5/CyLib.c **** \r
-  31:.\Generated_Source\PSoC5/CyLib.c **** \r
-  32:.\Generated_Source\PSoC5/CyLib.c **** /* Variable Vdda */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 2\r
-\r
-\r
-  33:.\Generated_Source\PSoC5/CyLib.c **** #if(CYDEV_VARIABLE_VDDA == 1)\r
-  34:.\Generated_Source\PSoC5/CyLib.c **** \r
-  35:.\Generated_Source\PSoC5/CyLib.c ****     uint8 CyScPumpEnabled = (uint8)(CYDEV_VDDA_MV < 2700);\r
-  36:.\Generated_Source\PSoC5/CyLib.c **** \r
-  37:.\Generated_Source\PSoC5/CyLib.c **** #endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-  38:.\Generated_Source\PSoC5/CyLib.c **** \r
-  39:.\Generated_Source\PSoC5/CyLib.c **** \r
-  40:.\Generated_Source\PSoC5/CyLib.c **** /* Do not use these definitions directly in your application */\r
-  41:.\Generated_Source\PSoC5/CyLib.c **** uint32 cydelay_freq_hz  = BCLK__BUS_CLK__HZ;\r
-  42:.\Generated_Source\PSoC5/CyLib.c **** uint32 cydelay_freq_khz = (BCLK__BUS_CLK__HZ + 999u) / 1000u;\r
-  43:.\Generated_Source\PSoC5/CyLib.c **** uint8  cydelay_freq_mhz = (uint8)((BCLK__BUS_CLK__HZ + 999999u) / 1000000u);\r
-  44:.\Generated_Source\PSoC5/CyLib.c **** uint32 cydelay_32k_ms   = 32768u * ((BCLK__BUS_CLK__HZ + 999u) / 1000u);\r
-  45:.\Generated_Source\PSoC5/CyLib.c **** \r
-  46:.\Generated_Source\PSoC5/CyLib.c **** \r
-  47:.\Generated_Source\PSoC5/CyLib.c **** /* Function Prototypes */\r
-  48:.\Generated_Source\PSoC5/CyLib.c **** static uint8 CyUSB_PowerOnCheck(void)  ;\r
-  49:.\Generated_Source\PSoC5/CyLib.c **** static void CyIMO_SetTrimValue(uint8 freq) ;\r
-  50:.\Generated_Source\PSoC5/CyLib.c **** static void CyBusClk_Internal_SetDivider(uint16 divider);\r
-  51:.\Generated_Source\PSoC5/CyLib.c **** \r
-  52:.\Generated_Source\PSoC5/CyLib.c **** \r
-  53:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-  54:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyPLL_OUT_Start\r
-  55:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-  56:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  57:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-  58:.\Generated_Source\PSoC5/CyLib.c **** *   Enables the PLL.  Optionally waits for it to become stable.\r
-  59:.\Generated_Source\PSoC5/CyLib.c **** *   Waits at least 250 us or until it is detected that the PLL is stable.\r
-  60:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  61:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-  62:.\Generated_Source\PSoC5/CyLib.c **** *   wait:\r
-  63:.\Generated_Source\PSoC5/CyLib.c **** *    0: Return immediately after configuration\r
-  64:.\Generated_Source\PSoC5/CyLib.c **** *    1: Wait for PLL lock or timeout.\r
-  65:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  66:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-  67:.\Generated_Source\PSoC5/CyLib.c **** *   Status\r
-  68:.\Generated_Source\PSoC5/CyLib.c **** *    CYRET_SUCCESS - Completed successfully\r
-  69:.\Generated_Source\PSoC5/CyLib.c **** *    CYRET_TIMEOUT - Timeout occurred without detecting a stable clock.\r
-  70:.\Generated_Source\PSoC5/CyLib.c **** *     If the input source of the clock is jittery, then the lock indication\r
-  71:.\Generated_Source\PSoC5/CyLib.c **** *     may not occur.  However, after the timeout has expired the generated PLL\r
-  72:.\Generated_Source\PSoC5/CyLib.c **** *     clock can still be used.\r
-  73:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  74:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
-  75:.\Generated_Source\PSoC5/CyLib.c **** *  If wait is enabled: This function wses the Fast Time Wheel to time the wait.\r
-  76:.\Generated_Source\PSoC5/CyLib.c **** *  Any other use of the Fast Time Wheel will be stopped during the period of\r
-  77:.\Generated_Source\PSoC5/CyLib.c **** *  this function and then restored. This function also uses the 100 KHz ILO.\r
-  78:.\Generated_Source\PSoC5/CyLib.c **** *  If not enabled, this function will enable the 100 KHz ILO for the period of\r
-  79:.\Generated_Source\PSoC5/CyLib.c **** *  this function.\r
-  80:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  81:.\Generated_Source\PSoC5/CyLib.c **** *  No changes to the setup of the ILO, Fast Time Wheel, Central Time Wheel or\r
-  82:.\Generated_Source\PSoC5/CyLib.c **** *  Once Per Second interrupt may be made by interrupt routines during the period\r
-  83:.\Generated_Source\PSoC5/CyLib.c **** *  of this function execution. The current operation of the ILO, Central Time\r
-  84:.\Generated_Source\PSoC5/CyLib.c **** *  Wheel and Once Per Second interrupt are maintained during the operation of\r
-  85:.\Generated_Source\PSoC5/CyLib.c **** *  this function provided the reading of the Power Manager Interrupt Status\r
-  86:.\Generated_Source\PSoC5/CyLib.c **** *  Register is only done using the CyPmReadStatus() function.\r
-  87:.\Generated_Source\PSoC5/CyLib.c **** *\r
-  88:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-  89:.\Generated_Source\PSoC5/CyLib.c **** cystatus CyPLL_OUT_Start(uint8 wait) \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 3\r
-\r
-\r
-  90:.\Generated_Source\PSoC5/CyLib.c **** {\r
-  91:.\Generated_Source\PSoC5/CyLib.c ****     cystatus status = CYRET_SUCCESS;\r
-  92:.\Generated_Source\PSoC5/CyLib.c **** \r
-  93:.\Generated_Source\PSoC5/CyLib.c ****     uint8 iloEnableState;\r
-  94:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmTwCfg0State;\r
-  95:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmTwCfg2State;\r
-  96:.\Generated_Source\PSoC5/CyLib.c **** \r
-  97:.\Generated_Source\PSoC5/CyLib.c **** \r
-  98:.\Generated_Source\PSoC5/CyLib.c ****     /* Enables the PLL circuit  */\r
-  99:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_PLL_CFG0_REG |= CY_CLK_PLL_ENABLE;\r
- 100:.\Generated_Source\PSoC5/CyLib.c **** \r
- 101:.\Generated_Source\PSoC5/CyLib.c ****     if(wait != 0u)\r
- 102:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 103:.\Generated_Source\PSoC5/CyLib.c ****         /* Save 100 KHz ILO, FTW interval, enable and interrupt enable */\r
- 104:.\Generated_Source\PSoC5/CyLib.c ****         iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 105:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg0State = CY_LIB_PM_TW_CFG0_REG;\r
- 106:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg2State = CY_LIB_PM_TW_CFG2_REG;\r
- 107:.\Generated_Source\PSoC5/CyLib.c **** \r
- 108:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_CLK_PLL_FTW_INTERVAL);\r
- 109:.\Generated_Source\PSoC5/CyLib.c **** \r
- 110:.\Generated_Source\PSoC5/CyLib.c ****         status = CYRET_TIMEOUT;\r
- 111:.\Generated_Source\PSoC5/CyLib.c **** \r
- 112:.\Generated_Source\PSoC5/CyLib.c ****         while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
- 113:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 114:.\Generated_Source\PSoC5/CyLib.c ****             /* Wait for the interrupt status */\r
- 115:.\Generated_Source\PSoC5/CyLib.c ****             if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
- 116:.\Generated_Source\PSoC5/CyLib.c ****             {\r
- 117:.\Generated_Source\PSoC5/CyLib.c ****                 if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
- 118:.\Generated_Source\PSoC5/CyLib.c ****                 {\r
- 119:.\Generated_Source\PSoC5/CyLib.c ****                     status = CYRET_SUCCESS;\r
- 120:.\Generated_Source\PSoC5/CyLib.c ****                     break;\r
- 121:.\Generated_Source\PSoC5/CyLib.c ****                 }\r
- 122:.\Generated_Source\PSoC5/CyLib.c ****             }\r
- 123:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 124:.\Generated_Source\PSoC5/CyLib.c **** \r
- 125:.\Generated_Source\PSoC5/CyLib.c ****         /* Restore 100 KHz ILO, FTW interval, enable and interrupt enable */\r
- 126:.\Generated_Source\PSoC5/CyLib.c ****         if(0u == iloEnableState)\r
- 127:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 128:.\Generated_Source\PSoC5/CyLib.c ****             CyILO_Stop100K();\r
- 129:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 130:.\Generated_Source\PSoC5/CyLib.c **** \r
- 131:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG0_REG = pmTwCfg0State;\r
- 132:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG2_REG = pmTwCfg2State;\r
- 133:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 134:.\Generated_Source\PSoC5/CyLib.c **** \r
- 135:.\Generated_Source\PSoC5/CyLib.c ****     return(status);\r
- 136:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 137:.\Generated_Source\PSoC5/CyLib.c **** \r
- 138:.\Generated_Source\PSoC5/CyLib.c **** \r
- 139:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 140:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyPLL_OUT_Stop\r
- 141:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 142:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 143:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 144:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the PLL.\r
- 145:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 146:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 4\r
-\r
-\r
- 147:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 148:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 149:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 150:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 151:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 152:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 153:.\Generated_Source\PSoC5/CyLib.c **** void CyPLL_OUT_Stop(void) \r
- 154:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 155:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_PLL_CFG0_REG &= ((uint8)(~CY_CLK_PLL_ENABLE));\r
- 156:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 157:.\Generated_Source\PSoC5/CyLib.c **** \r
- 158:.\Generated_Source\PSoC5/CyLib.c **** \r
- 159:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 160:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyPLL_OUT_SetPQ\r
- 161:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 162:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 163:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 164:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the P and Q dividers and the charge pump current.\r
- 165:.\Generated_Source\PSoC5/CyLib.c **** *  The Frequency Out will be P/Q * Frequency In.\r
- 166:.\Generated_Source\PSoC5/CyLib.c **** *  The PLL must be disabled before calling this function.\r
- 167:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 168:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 169:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 pDiv:\r
- 170:.\Generated_Source\PSoC5/CyLib.c **** *   Valid range [8 - 255].\r
- 171:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 172:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 qDiv:\r
- 173:.\Generated_Source\PSoC5/CyLib.c **** *   Valid range [1 - 16]. Input Frequency / Q must be in range of 1 to 3 MHz.\r
- 174:.\Generated_Source\PSoC5/CyLib.c **** \r
- 175:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 current:\r
- 176:.\Generated_Source\PSoC5/CyLib.c **** *   Valid range [1 - 7]. Charge pump current in uA. Refer to the device TRM and\r
- 177:.\Generated_Source\PSoC5/CyLib.c **** *   datasheet for more information.\r
- 178:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 179:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 180:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 181:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 182:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 183:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 184:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 185:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 186:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 187:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 188:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 189:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 190:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 191:.\Generated_Source\PSoC5/CyLib.c **** void CyPLL_OUT_SetPQ(uint8 pDiv, uint8 qDiv, uint8 current) \r
- 192:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 193:.\Generated_Source\PSoC5/CyLib.c ****     /* Halt CPU in debug mode if PLL is enabled */\r
- 194:.\Generated_Source\PSoC5/CyLib.c ****     CYASSERT(0u == (CY_CLK_PLL_CFG0_REG & CY_CLK_PLL_ENABLE));\r
- 195:.\Generated_Source\PSoC5/CyLib.c **** \r
- 196:.\Generated_Source\PSoC5/CyLib.c ****     if((pDiv    >= CY_CLK_PLL_MIN_P_VALUE  ) &&\r
- 197:.\Generated_Source\PSoC5/CyLib.c ****        (qDiv    <= CY_CLK_PLL_MAX_Q_VALUE  ) && (qDiv    >= CY_CLK_PLL_MIN_Q_VALUE  ) &&\r
- 198:.\Generated_Source\PSoC5/CyLib.c ****        (current >= CY_CLK_PLL_MIN_CUR_VALUE) && (current <= CY_CLK_PLL_MAX_CUR_VALUE))\r
- 199:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 200:.\Generated_Source\PSoC5/CyLib.c ****         /* Set new values */\r
- 201:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_P_REG = pDiv;\r
- 202:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_Q_REG = ((uint8)(qDiv - 1u));\r
- 203:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_CFG1_REG = (CY_CLK_PLL_CFG1_REG & CY_CLK_PLL_CURRENT_MASK) |\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 5\r
-\r
-\r
- 204:.\Generated_Source\PSoC5/CyLib.c ****                                 ((uint8)(((uint8)(current - 1u)) << CY_CLK_PLL_CURRENT_POSITION));\r
- 205:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 206:.\Generated_Source\PSoC5/CyLib.c ****     else\r
- 207:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 208:.\Generated_Source\PSoC5/CyLib.c ****         /***********************************************************************\r
- 209:.\Generated_Source\PSoC5/CyLib.c ****         * Halt CPU in debug mode if:\r
- 210:.\Generated_Source\PSoC5/CyLib.c ****         * - P divider is less than required\r
- 211:.\Generated_Source\PSoC5/CyLib.c ****         * - Q divider is out of range\r
- 212:.\Generated_Source\PSoC5/CyLib.c ****         * - pump current is out of range\r
- 213:.\Generated_Source\PSoC5/CyLib.c ****         ***********************************************************************/\r
- 214:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(0u != 0u);\r
- 215:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 216:.\Generated_Source\PSoC5/CyLib.c **** \r
- 217:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 218:.\Generated_Source\PSoC5/CyLib.c **** \r
- 219:.\Generated_Source\PSoC5/CyLib.c **** \r
- 220:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 221:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyPLL_OUT_SetSource\r
- 222:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 223:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 224:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 225:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the input clock source to the PLL. The PLL must be disabled before\r
- 226:.\Generated_Source\PSoC5/CyLib.c **** *  calling this function.\r
- 227:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 228:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 229:.\Generated_Source\PSoC5/CyLib.c **** *   source: One of the three available PLL clock sources\r
- 230:.\Generated_Source\PSoC5/CyLib.c **** *    CY_PLL_SOURCE_IMO  :   IMO\r
- 231:.\Generated_Source\PSoC5/CyLib.c **** *    CY_PLL_SOURCE_XTAL :   MHz Crystal\r
- 232:.\Generated_Source\PSoC5/CyLib.c **** *    CY_PLL_SOURCE_DSI  :   DSI\r
- 233:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 234:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 235:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 236:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 237:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 238:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 239:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 240:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 241:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 242:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 243:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 244:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 245:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 246:.\Generated_Source\PSoC5/CyLib.c **** void CyPLL_OUT_SetSource(uint8 source) \r
- 247:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 248:.\Generated_Source\PSoC5/CyLib.c ****     /* Halt CPU in debug mode if PLL is enabled */\r
- 249:.\Generated_Source\PSoC5/CyLib.c ****     CYASSERT(0u == (CY_CLK_PLL_CFG0_REG & CY_CLK_PLL_ENABLE));\r
- 250:.\Generated_Source\PSoC5/CyLib.c **** \r
- 251:.\Generated_Source\PSoC5/CyLib.c ****     switch(source)\r
- 252:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 253:.\Generated_Source\PSoC5/CyLib.c ****         case CY_PLL_SOURCE_IMO:\r
- 254:.\Generated_Source\PSoC5/CyLib.c ****         case CY_PLL_SOURCE_XTAL:\r
- 255:.\Generated_Source\PSoC5/CyLib.c ****         case CY_PLL_SOURCE_DSI:\r
- 256:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_CR_REG = ((CY_LIB_CLKDIST_CR_REG & CY_LIB_CLKDIST_CR_PLL_SCR_MASK) | sou\r
- 257:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 258:.\Generated_Source\PSoC5/CyLib.c **** \r
- 259:.\Generated_Source\PSoC5/CyLib.c ****         default:\r
- 260:.\Generated_Source\PSoC5/CyLib.c ****             CYASSERT(0u != 0u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 6\r
-\r
-\r
- 261:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 262:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 263:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 264:.\Generated_Source\PSoC5/CyLib.c **** \r
- 265:.\Generated_Source\PSoC5/CyLib.c **** \r
- 266:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 267:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_Start\r
- 268:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 269:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 270:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 271:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the IMO. Optionally waits at least 6 us for it to settle.\r
- 272:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 273:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 274:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 wait:\r
- 275:.\Generated_Source\PSoC5/CyLib.c **** *   0: Return immediately after configuration\r
- 276:.\Generated_Source\PSoC5/CyLib.c **** *   1: Wait for at least 6 us for the IMO to settle.\r
- 277:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 278:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 279:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 280:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 281:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 282:.\Generated_Source\PSoC5/CyLib.c **** *  If wait is enabled: This function wses the Fast Time Wheel to time the wait.\r
- 283:.\Generated_Source\PSoC5/CyLib.c **** *  Any other use of the Fast Time Wheel will be stopped during the period of\r
- 284:.\Generated_Source\PSoC5/CyLib.c **** *  this function and then restored. This function also uses the 100 KHz ILO.\r
- 285:.\Generated_Source\PSoC5/CyLib.c **** *  If not enabled, this function will enable the 100 KHz ILO for the period of\r
- 286:.\Generated_Source\PSoC5/CyLib.c **** *  this function.\r
- 287:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 288:.\Generated_Source\PSoC5/CyLib.c **** *  No changes to the setup of the ILO, Fast Time Wheel, Central Time Wheel or\r
- 289:.\Generated_Source\PSoC5/CyLib.c **** *  Once Per Second interrupt may be made by interrupt routines during the period\r
- 290:.\Generated_Source\PSoC5/CyLib.c **** *  of this function execution. The current operation of the ILO, Central Time\r
- 291:.\Generated_Source\PSoC5/CyLib.c **** *  Wheel and Once Per Second interrupt are maintained during the operation of\r
- 292:.\Generated_Source\PSoC5/CyLib.c **** *  this function provided the reading of the Power Manager Interrupt Status\r
- 293:.\Generated_Source\PSoC5/CyLib.c **** *  Register is only done using the CyPmReadStatus() function.\r
- 294:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 295:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 296:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_Start(uint8 wait) \r
- 297:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 298:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmFtwCfg2Reg;\r
- 299:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmFtwCfg0Reg;\r
- 300:.\Generated_Source\PSoC5/CyLib.c ****     uint8 ilo100KhzEnable;\r
- 301:.\Generated_Source\PSoC5/CyLib.c **** \r
- 302:.\Generated_Source\PSoC5/CyLib.c **** \r
- 303:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_ACT_CFG0_REG  |= CY_LIB_PM_ACT_CFG0_IMO_EN;\r
- 304:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_STBY_CFG0_REG |= CY_LIB_PM_STBY_CFG0_IMO_EN;\r
- 305:.\Generated_Source\PSoC5/CyLib.c **** \r
- 306:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != wait)\r
- 307:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 308:.\Generated_Source\PSoC5/CyLib.c ****         /* Need to turn on the 100KHz ILO if it happens to not already be running.*/\r
- 309:.\Generated_Source\PSoC5/CyLib.c ****         ilo100KhzEnable = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 310:.\Generated_Source\PSoC5/CyLib.c ****         pmFtwCfg0Reg = CY_LIB_PM_TW_CFG0_REG;\r
- 311:.\Generated_Source\PSoC5/CyLib.c ****         pmFtwCfg2Reg = CY_LIB_PM_TW_CFG2_REG;\r
- 312:.\Generated_Source\PSoC5/CyLib.c **** \r
- 313:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_LIB_CLK_IMO_FTW_TIMEOUT);\r
- 314:.\Generated_Source\PSoC5/CyLib.c **** \r
- 315:.\Generated_Source\PSoC5/CyLib.c ****         while (0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
- 316:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 317:.\Generated_Source\PSoC5/CyLib.c ****             /* Wait for the interrupt status */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 7\r
-\r
-\r
- 318:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 319:.\Generated_Source\PSoC5/CyLib.c **** \r
- 320:.\Generated_Source\PSoC5/CyLib.c ****         if(0u == ilo100KhzEnable)\r
- 321:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 322:.\Generated_Source\PSoC5/CyLib.c ****             CyILO_Stop100K();\r
- 323:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 324:.\Generated_Source\PSoC5/CyLib.c **** \r
- 325:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG0_REG = pmFtwCfg0Reg;\r
- 326:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG2_REG = pmFtwCfg2Reg;\r
- 327:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 328:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 329:.\Generated_Source\PSoC5/CyLib.c **** \r
- 330:.\Generated_Source\PSoC5/CyLib.c **** \r
- 331:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 332:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_Stop\r
- 333:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 334:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 335:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 336:.\Generated_Source\PSoC5/CyLib.c **** *   Disables the IMO.\r
- 337:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 338:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 339:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 340:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 341:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 342:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 343:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 344:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 345:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_Stop(void) \r
- 346:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 347:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_ACT_CFG0_REG  &= ((uint8) (~CY_LIB_PM_ACT_CFG0_IMO_EN));\r
- 348:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_STBY_CFG0_REG &= ((uint8) (~CY_LIB_PM_STBY_CFG0_IMO_EN));\r
- 349:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 350:.\Generated_Source\PSoC5/CyLib.c **** \r
- 351:.\Generated_Source\PSoC5/CyLib.c **** \r
- 352:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 353:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyUSB_PowerOnCheck\r
- 354:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 355:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 356:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 357:.\Generated_Source\PSoC5/CyLib.c **** *  Returns the USB power status value. A private function to cy_boot.\r
- 358:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 359:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 360:.\Generated_Source\PSoC5/CyLib.c **** *   None\r
- 361:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 362:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 363:.\Generated_Source\PSoC5/CyLib.c **** *   uint8: one if the USB is enabled, 0 if not enabled.\r
- 364:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 365:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 366:.\Generated_Source\PSoC5/CyLib.c **** static uint8 CyUSB_PowerOnCheck(void)  \r
- 367:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 368:.\Generated_Source\PSoC5/CyLib.c ****     uint8 poweredOn = 0u;\r
- 369:.\Generated_Source\PSoC5/CyLib.c **** \r
- 370:.\Generated_Source\PSoC5/CyLib.c ****     /* Check whether device is in Active or AltActiv and if USB is powered on */\r
- 371:.\Generated_Source\PSoC5/CyLib.c ****     if((((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ACTIVE ) &&\r
- 372:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_ACT_CFG5_REG & CY_ACT_USB_ENABLED     )))  ||\r
- 373:.\Generated_Source\PSoC5/CyLib.c ****        (((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ALT_ACT) &&\r
- 374:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_STBY_CFG5_REG & CY_ALT_ACT_USB_ENABLED))))\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 8\r
-\r
-\r
- 375:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 376:.\Generated_Source\PSoC5/CyLib.c ****         poweredOn = 1u;\r
- 377:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 378:.\Generated_Source\PSoC5/CyLib.c **** \r
- 379:.\Generated_Source\PSoC5/CyLib.c ****     return (poweredOn);\r
- 380:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 381:.\Generated_Source\PSoC5/CyLib.c **** \r
- 382:.\Generated_Source\PSoC5/CyLib.c **** \r
- 383:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 384:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_SetTrimValue\r
- 385:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 386:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 387:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 388:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the IMO factory trim values.\r
- 389:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 390:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 391:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 freq - frequency for which trims must be set\r
- 392:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 393:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 394:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 395:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 396:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 397:.\Generated_Source\PSoC5/CyLib.c **** static void CyIMO_SetTrimValue(uint8 freq) \r
- 398:.\Generated_Source\PSoC5/CyLib.c **** {\r
-  26                           .loc 1 398 0\r
-  27                           .cfi_startproc\r
-  28                           @ args = 0, pretend = 0, frame = 0\r
-  29                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  30                           @ link register save eliminated.\r
-  31                   .LVL0:\r
-  32                   .LBB10:\r
-  33                   .LBB11:\r
- 371:.\Generated_Source\PSoC5/CyLib.c ****     if((((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ACTIVE ) &&\r
-  34                           .loc 1 371 0\r
-  35 0000 204B                 ldr     r3, .L19\r
-  36 0002 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
-  37 0004 4A07                 lsls    r2, r1, #29\r
-  38 0006 03D1                 bne     .L2\r
- 372:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_ACT_CFG5_REG & CY_ACT_USB_ENABLED     )))  ||\r
-  39                           .loc 1 372 0\r
-  40 0008 1F4A                 ldr     r2, .L19+4\r
-  41 000a 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 371:.\Generated_Source\PSoC5/CyLib.c ****     if((((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ACTIVE ) &&\r
-  42                           .loc 1 371 0\r
-  43 000c DB07                 lsls    r3, r3, #31\r
-  44 000e 30D4                 bmi     .L3\r
-  45                   .L2:\r
- 373:.\Generated_Source\PSoC5/CyLib.c ****        (((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ALT_ACT) &&\r
-  46                           .loc 1 373 0\r
-  47 0010 1C49                 ldr     r1, .L19\r
-  48 0012 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 372:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_ACT_CFG5_REG & CY_ACT_USB_ENABLED     )))  ||\r
-  49                           .loc 1 372 0\r
-  50 0014 02F00703             and     r3, r2, #7\r
-  51 0018 012B                 cmp     r3, #1\r
-  52 001a 05D1                 bne     .L15\r
- 374:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_STBY_CFG5_REG & CY_ALT_ACT_USB_ENABLED))))\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 9\r
-\r
-\r
-  53                           .loc 1 374 0\r
-  54 001c 1B49                 ldr     r1, .L19+8\r
-  55 001e 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 373:.\Generated_Source\PSoC5/CyLib.c ****        (((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ALT_ACT) &&\r
-  56                           .loc 1 373 0\r
-  57 0020 12F00103             ands    r3, r2, #1\r
-  58 0024 25D1                 bne     .L3\r
-  59 0026 00E0                 b       .L4\r
-  60                   .L15:\r
- 372:.\Generated_Source\PSoC5/CyLib.c ****        (0u != (CY_LIB_PM_ACT_CFG5_REG & CY_ACT_USB_ENABLED     )))  ||\r
-  61                           .loc 1 372 0\r
-  62 0028 0023                 movs    r3, #0\r
-  63                   .LVL1:\r
-  64                   .L4:\r
-  65                   .LBE11:\r
-  66                   .LBE10:\r
- 399:.\Generated_Source\PSoC5/CyLib.c ****     uint8 usbPowerOn = CyUSB_PowerOnCheck();\r
- 400:.\Generated_Source\PSoC5/CyLib.c **** \r
- 401:.\Generated_Source\PSoC5/CyLib.c ****     /* If USB is powered */\r
- 402:.\Generated_Source\PSoC5/CyLib.c ****     if(usbPowerOn == 1u)\r
- 403:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 404:.\Generated_Source\PSoC5/CyLib.c ****         /* Unlock USB write */\r
- 405:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_USB_CR1_REG &= ((uint8)(~CY_LIB_USB_CLK_EN));\r
- 406:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 407:.\Generated_Source\PSoC5/CyLib.c ****     switch(freq)\r
-  67                           .loc 1 407 0\r
-  68 002a 0828                 cmp     r0, #8\r
-  69 002c 28D8                 bhi     .L1\r
-  70 002e DFE800F0             tbb     [pc, r0]\r
-  71                   .L14:\r
-  72 0032 05                   .byte   (.L6-.L14)/2\r
-  73 0033 07                   .byte   (.L7-.L14)/2\r
-  74 0034 09                   .byte   (.L8-.L14)/2\r
-  75 0035 0B                   .byte   (.L9-.L14)/2\r
-  76 0036 0D                   .byte   (.L10-.L14)/2\r
-  77 0037 0F                   .byte   (.L11-.L14)/2\r
-  78 0038 11                   .byte   (.L12-.L14)/2\r
-  79 0039 27                   .byte   (.L1-.L14)/2\r
-  80 003a 15                   .byte   (.L13-.L14)/2\r
-  81 003b 00                   .align  1\r
-  82                   .L6:\r
- 408:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 409:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_3MHZ:\r
- 410:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_3MHZ_PTR);\r
-  83                           .loc 1 410 0\r
-  84 003c 144A                 ldr     r2, .L19+12\r
-  85 003e 0AE0                 b       .L17\r
-  86                   .L7:\r
- 411:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 412:.\Generated_Source\PSoC5/CyLib.c **** \r
- 413:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_6MHZ:\r
- 414:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_6MHZ_PTR);\r
-  87                           .loc 1 414 0\r
-  88 0040 144A                 ldr     r2, .L19+16\r
-  89 0042 08E0                 b       .L17\r
-  90                   .L8:\r
- 415:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 10\r
-\r
-\r
- 416:.\Generated_Source\PSoC5/CyLib.c **** \r
- 417:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_12MHZ:\r
- 418:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_12MHZ_PTR);\r
-  91                           .loc 1 418 0\r
-  92 0044 144A                 ldr     r2, .L19+20\r
-  93 0046 06E0                 b       .L17\r
-  94                   .L9:\r
- 419:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 420:.\Generated_Source\PSoC5/CyLib.c **** \r
- 421:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_24MHZ:\r
- 422:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_24MHZ_PTR);\r
-  95                           .loc 1 422 0\r
-  96 0048 144A                 ldr     r2, .L19+24\r
-  97 004a 04E0                 b       .L17\r
-  98                   .L10:\r
- 423:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 424:.\Generated_Source\PSoC5/CyLib.c **** \r
- 425:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_48MHZ:\r
- 426:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_TR1_PTR);\r
-  99                           .loc 1 426 0\r
- 100 004c 144A                 ldr     r2, .L19+28\r
- 101 004e 02E0                 b       .L17\r
- 102                   .L11:\r
- 427:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 428:.\Generated_Source\PSoC5/CyLib.c **** \r
- 429:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_62MHZ:\r
- 430:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_67MHZ_PTR);\r
- 103                           .loc 1 430 0\r
- 104 0050 144A                 ldr     r2, .L19+32\r
- 105 0052 00E0                 b       .L17\r
- 106                   .L12:\r
- 431:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 432:.\Generated_Source\PSoC5/CyLib.c **** \r
- 433:.\Generated_Source\PSoC5/CyLib.c **** #if(CY_PSOC5)\r
- 434:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_74MHZ:\r
- 435:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_80MHZ_PTR);\r
- 107                           .loc 1 435 0\r
- 108 0054 144A                 ldr     r2, .L19+36\r
- 109                   .L17:\r
- 110 0056 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 111 0058 144B                 ldr     r3, .L19+40\r
- 112 005a 08E0                 b       .L16\r
- 113                   .L13:\r
- 436:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 437:.\Generated_Source\PSoC5/CyLib.c **** #endif  /* (CY_PSOC5) */\r
- 438:.\Generated_Source\PSoC5/CyLib.c **** \r
- 439:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_USB:\r
- 440:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_USB_PTR);\r
- 114                           .loc 1 440 0\r
- 115 005c 1448                 ldr     r0, .L19+44\r
- 116                   .LVL2:\r
- 117 005e 134A                 ldr     r2, .L19+40\r
- 118 0060 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 119 0062 1170                 strb    r1, [r2, #0]\r
- 441:.\Generated_Source\PSoC5/CyLib.c **** \r
- 442:.\Generated_Source\PSoC5/CyLib.c ****         /* If USB is powered */\r
- 443:.\Generated_Source\PSoC5/CyLib.c ****         if(usbPowerOn == 1u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 11\r
-\r
-\r
- 120                           .loc 1 443 0\r
- 121 0064 63B1                 cbz     r3, .L1\r
- 444:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 445:.\Generated_Source\PSoC5/CyLib.c ****             /* Lock the USB Oscillator */\r
- 446:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_USB_CR1_REG |= CY_LIB_USB_CLK_EN;\r
- 122                           .loc 1 446 0\r
- 123 0066 134B                 ldr     r3, .L19+48\r
- 124 0068 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 125 006a 40F00201             orr     r1, r0, #2\r
- 126                   .L16:\r
- 127 006e 1970                 strb    r1, [r3, #0]\r
- 128 0070 7047                 bx      lr\r
- 129                   .LVL3:\r
- 130                   .L3:\r
- 405:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_USB_CR1_REG &= ((uint8)(~CY_LIB_USB_CLK_EN));\r
- 131                           .loc 1 405 0\r
- 132 0072 104B                 ldr     r3, .L19+48\r
- 133 0074 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 134 0076 01F0FD02             and     r2, r1, #253\r
- 135 007a 1A70                 strb    r2, [r3, #0]\r
- 136 007c 0123                 movs    r3, #1\r
- 137 007e D4E7                 b       .L4\r
- 138                   .LVL4:\r
- 139                   .L1:\r
- 140 0080 7047                 bx      lr\r
- 141                   .L20:\r
- 142 0082 00BF                 .align  2\r
- 143                   .L19:\r
- 144 0084 93430040             .word   1073759123\r
- 145 0088 A5430040             .word   1073759141\r
- 146 008c B5430040             .word   1073759157\r
- 147 0090 08010049             .word   1224737032\r
- 148 0094 09010049             .word   1224737033\r
- 149 0098 0A010049             .word   1224737034\r
- 150 009c 0B010049             .word   1224737035\r
- 151 00a0 89010049             .word   1224737161\r
- 152 00a4 0C010049             .word   1224737036\r
- 153 00a8 0D010049             .word   1224737037\r
- 154 00ac A1460040             .word   1073759905\r
- 155 00b0 0F010049             .word   1224737039\r
- 156 00b4 09600040             .word   1073766409\r
- 157                           .cfi_endproc\r
- 158                   .LFE7:\r
- 159                           .size   CyIMO_SetTrimValue, .-CyIMO_SetTrimValue\r
- 160                           .section        .text.CyBusClk_Internal_SetDivider,"ax",%progbits\r
- 161                           .align  1\r
- 162                           .thumb\r
- 163                           .thumb_func\r
- 164                           .type   CyBusClk_Internal_SetDivider, %function\r
- 165                   CyBusClk_Internal_SetDivider:\r
- 166                   .LFB14:\r
- 447:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 448:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 449:.\Generated_Source\PSoC5/CyLib.c **** \r
- 450:.\Generated_Source\PSoC5/CyLib.c ****     default:\r
- 451:.\Generated_Source\PSoC5/CyLib.c ****             CYASSERT(0u != 0u);\r
- 452:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 12\r
-\r
-\r
- 453:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 454:.\Generated_Source\PSoC5/CyLib.c **** \r
- 455:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 456:.\Generated_Source\PSoC5/CyLib.c **** \r
- 457:.\Generated_Source\PSoC5/CyLib.c **** \r
- 458:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 459:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_SetFreq\r
- 460:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 461:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 462:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 463:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the frequency of the IMO. Changes may be made while the IMO is running.\r
- 464:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 465:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 466:.\Generated_Source\PSoC5/CyLib.c **** *  freq: Frequency of IMO operation\r
- 467:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_3MHZ  to set  3   MHz\r
- 468:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_6MHZ  to set  6   MHz\r
- 469:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_12MHZ to set 12   MHz\r
- 470:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_24MHZ to set 24   MHz\r
- 471:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_48MHZ to set 48   MHz\r
- 472:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_62MHZ to set 62.6 MHz\r
- 473:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_74MHZ to set 74.7 MHz (not applicable for PSoC 3)\r
- 474:.\Generated_Source\PSoC5/CyLib.c **** *       CY_IMO_FREQ_USB   to set 24   MHz (Trimmed for USB operation)\r
- 475:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 476:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 477:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 478:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 479:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 480:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 481:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 482:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 483:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 484:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 485:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 486:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 487:.\Generated_Source\PSoC5/CyLib.c **** *  When the USB setting is chosen, the USB clock locking circuit is enabled.\r
- 488:.\Generated_Source\PSoC5/CyLib.c **** *  Otherwise this circuit is disabled. The USB block must be powered before\r
- 489:.\Generated_Source\PSoC5/CyLib.c **** *  selecting the USB setting.\r
- 490:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 491:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 492:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_SetFreq(uint8 freq) \r
- 493:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 494:.\Generated_Source\PSoC5/CyLib.c ****     uint8 currentFreq;\r
- 495:.\Generated_Source\PSoC5/CyLib.c ****     uint8 nextFreq;\r
- 496:.\Generated_Source\PSoC5/CyLib.c **** \r
- 497:.\Generated_Source\PSoC5/CyLib.c ****     /***************************************************************************\r
- 498:.\Generated_Source\PSoC5/CyLib.c ****     * When changing the IMO frequency the Trim values must also be set\r
- 499:.\Generated_Source\PSoC5/CyLib.c ****     * accordingly.This requires reading the current frequency. If the new\r
- 500:.\Generated_Source\PSoC5/CyLib.c ****     * frequency is faster, then set the new trim and then change the frequency,\r
- 501:.\Generated_Source\PSoC5/CyLib.c ****     * otherwise change the frequency and then set the new trim values.\r
- 502:.\Generated_Source\PSoC5/CyLib.c ****     ***************************************************************************/\r
- 503:.\Generated_Source\PSoC5/CyLib.c **** \r
- 504:.\Generated_Source\PSoC5/CyLib.c ****     currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));\r
- 505:.\Generated_Source\PSoC5/CyLib.c **** \r
- 506:.\Generated_Source\PSoC5/CyLib.c ****     /* Check if the requested frequency is USB. */\r
- 507:.\Generated_Source\PSoC5/CyLib.c ****     nextFreq = (freq == CY_IMO_FREQ_USB) ? CY_IMO_FREQ_24MHZ : freq;\r
- 508:.\Generated_Source\PSoC5/CyLib.c **** \r
- 509:.\Generated_Source\PSoC5/CyLib.c ****     switch (currentFreq)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 13\r
-\r
-\r
- 510:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 511:.\Generated_Source\PSoC5/CyLib.c ****     case 0u:\r
- 512:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_12MHZ;\r
- 513:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 514:.\Generated_Source\PSoC5/CyLib.c **** \r
- 515:.\Generated_Source\PSoC5/CyLib.c ****     case 1u:\r
- 516:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_6MHZ;\r
- 517:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 518:.\Generated_Source\PSoC5/CyLib.c **** \r
- 519:.\Generated_Source\PSoC5/CyLib.c ****     case 2u:\r
- 520:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_24MHZ;\r
- 521:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 522:.\Generated_Source\PSoC5/CyLib.c **** \r
- 523:.\Generated_Source\PSoC5/CyLib.c ****     case 3u:\r
- 524:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_3MHZ;\r
- 525:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 526:.\Generated_Source\PSoC5/CyLib.c **** \r
- 527:.\Generated_Source\PSoC5/CyLib.c ****     case 4u:\r
- 528:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_48MHZ;\r
- 529:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 530:.\Generated_Source\PSoC5/CyLib.c **** \r
- 531:.\Generated_Source\PSoC5/CyLib.c ****     case 5u:\r
- 532:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_62MHZ;\r
- 533:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 534:.\Generated_Source\PSoC5/CyLib.c **** \r
- 535:.\Generated_Source\PSoC5/CyLib.c **** #if(CY_PSOC5)\r
- 536:.\Generated_Source\PSoC5/CyLib.c ****     case 6u:\r
- 537:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_74MHZ;\r
- 538:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 539:.\Generated_Source\PSoC5/CyLib.c **** #endif  /* (CY_PSOC5) */\r
- 540:.\Generated_Source\PSoC5/CyLib.c **** \r
- 541:.\Generated_Source\PSoC5/CyLib.c ****     default:\r
- 542:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(0u != 0u);\r
- 543:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 544:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 545:.\Generated_Source\PSoC5/CyLib.c **** \r
- 546:.\Generated_Source\PSoC5/CyLib.c ****     if (nextFreq >= currentFreq)\r
- 547:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 548:.\Generated_Source\PSoC5/CyLib.c ****         /* Set the new trim first */\r
- 549:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_SetTrimValue(freq);\r
- 550:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 551:.\Generated_Source\PSoC5/CyLib.c **** \r
- 552:.\Generated_Source\PSoC5/CyLib.c ****     /* Set the usbclk_on bit when using CY_IMO_FREQ_USB, if not clear it */\r
- 553:.\Generated_Source\PSoC5/CyLib.c ****     switch(freq)\r
- 554:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 555:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_3MHZ:\r
- 556:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 557:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_3MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 558:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 559:.\Generated_Source\PSoC5/CyLib.c **** \r
- 560:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_6MHZ:\r
- 561:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 562:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_6MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 563:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 564:.\Generated_Source\PSoC5/CyLib.c **** \r
- 565:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_12MHZ:\r
- 566:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 14\r
-\r
-\r
- 567:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_12MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 568:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 569:.\Generated_Source\PSoC5/CyLib.c **** \r
- 570:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_24MHZ:\r
- 571:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 572:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_24MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 573:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 574:.\Generated_Source\PSoC5/CyLib.c **** \r
- 575:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_48MHZ:\r
- 576:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 577:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_48MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 578:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 579:.\Generated_Source\PSoC5/CyLib.c **** \r
- 580:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_62MHZ:\r
- 581:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 582:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_62MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 583:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 584:.\Generated_Source\PSoC5/CyLib.c **** \r
- 585:.\Generated_Source\PSoC5/CyLib.c **** #if(CY_PSOC5)\r
- 586:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_74MHZ:\r
- 587:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 588:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_74MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
- 589:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 590:.\Generated_Source\PSoC5/CyLib.c **** #endif  /* (CY_PSOC5) */\r
- 591:.\Generated_Source\PSoC5/CyLib.c **** \r
- 592:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_FREQ_USB:\r
- 593:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 594:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_IMO_24MHZ_VALUE) | CY_LIB_IMO_USBCLK_ON_SET;\r
- 595:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 596:.\Generated_Source\PSoC5/CyLib.c **** \r
- 597:.\Generated_Source\PSoC5/CyLib.c ****     default:\r
- 598:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(0u != 0u);\r
- 599:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 600:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 601:.\Generated_Source\PSoC5/CyLib.c **** \r
- 602:.\Generated_Source\PSoC5/CyLib.c ****     /* Turn on the IMO Doubler, if switching to CY_IMO_FREQ_USB */\r
- 603:.\Generated_Source\PSoC5/CyLib.c ****     if (freq == CY_IMO_FREQ_USB)\r
- 604:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 605:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_EnableDoubler();\r
- 606:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 607:.\Generated_Source\PSoC5/CyLib.c ****     else\r
- 608:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 609:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_DisableDoubler();\r
- 610:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 611:.\Generated_Source\PSoC5/CyLib.c **** \r
- 612:.\Generated_Source\PSoC5/CyLib.c ****     if (nextFreq < currentFreq)\r
- 613:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 614:.\Generated_Source\PSoC5/CyLib.c ****         /* Set the new trim after setting the frequency */\r
- 615:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_SetTrimValue(freq);\r
- 616:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 617:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 618:.\Generated_Source\PSoC5/CyLib.c **** \r
- 619:.\Generated_Source\PSoC5/CyLib.c **** \r
- 620:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 621:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_SetSource\r
- 622:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 623:.\Generated_Source\PSoC5/CyLib.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 15\r
-\r
-\r
- 624:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 625:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the source of the clock output from the IMO block.\r
- 626:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 627:.\Generated_Source\PSoC5/CyLib.c **** *  The output from the IMO is by default the IMO itself. Optionally the MHz\r
- 628:.\Generated_Source\PSoC5/CyLib.c **** *  Crystal or a DSI input can be the source of the IMO output instead.\r
- 629:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 630:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 631:.\Generated_Source\PSoC5/CyLib.c **** *   source: CY_IMO_SOURCE_DSI to set the DSI as source.\r
- 632:.\Generated_Source\PSoC5/CyLib.c **** *           CY_IMO_SOURCE_XTAL to set the MHz as source.\r
- 633:.\Generated_Source\PSoC5/CyLib.c **** *           CY_IMO_SOURCE_IMO to set the IMO itself.\r
- 634:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 635:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 636:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 637:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 638:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 639:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 640:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 641:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 642:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 643:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 644:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 645:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 646:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 647:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_SetSource(uint8 source) \r
- 648:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 649:.\Generated_Source\PSoC5/CyLib.c ****     switch(source)\r
- 650:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 651:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_SOURCE_DSI:\r
- 652:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_CLKDIST_CR_REG     &= ((uint8)(~CY_LIB_CLKDIST_CR_IMO2X));\r
- 653:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_IMO;\r
- 654:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 655:.\Generated_Source\PSoC5/CyLib.c **** \r
- 656:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_SOURCE_XTAL:\r
- 657:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_CLKDIST_CR_REG     |= CY_LIB_CLKDIST_CR_IMO2X;\r
- 658:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_IMO;\r
- 659:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 660:.\Generated_Source\PSoC5/CyLib.c **** \r
- 661:.\Generated_Source\PSoC5/CyLib.c ****     case CY_IMO_SOURCE_IMO:\r
- 662:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_IMO));\r
- 663:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 664:.\Generated_Source\PSoC5/CyLib.c **** \r
- 665:.\Generated_Source\PSoC5/CyLib.c ****     default:\r
- 666:.\Generated_Source\PSoC5/CyLib.c ****         /* Incorrect source value */\r
- 667:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(0u != 0u);\r
- 668:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 669:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 670:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 671:.\Generated_Source\PSoC5/CyLib.c **** \r
- 672:.\Generated_Source\PSoC5/CyLib.c **** \r
- 673:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 674:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_EnableDoubler\r
- 675:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 676:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 677:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 678:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the IMO doubler.  The 2x frequency clock is used to convert a 24 MHz\r
- 679:.\Generated_Source\PSoC5/CyLib.c **** *  input to a 48 MHz output for use by the USB block.\r
- 680:.\Generated_Source\PSoC5/CyLib.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 16\r
-\r
-\r
- 681:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 682:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 683:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 684:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 685:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 686:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 687:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 688:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_EnableDoubler(void) \r
- 689:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 690:.\Generated_Source\PSoC5/CyLib.c ****     /* Set the FASTCLK_IMO_CR_PTR regigster's 4th bit */\r
- 691:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_DOUBLER;\r
- 692:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 693:.\Generated_Source\PSoC5/CyLib.c **** \r
- 694:.\Generated_Source\PSoC5/CyLib.c **** \r
- 695:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 696:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyIMO_DisableDoubler\r
- 697:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 698:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 699:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 700:.\Generated_Source\PSoC5/CyLib.c **** *   Disables the IMO doubler.\r
- 701:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 702:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 703:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 704:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 705:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 706:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 707:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 708:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 709:.\Generated_Source\PSoC5/CyLib.c **** void CyIMO_DisableDoubler(void) \r
- 710:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 711:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_DOUBLER));\r
- 712:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 713:.\Generated_Source\PSoC5/CyLib.c **** \r
- 714:.\Generated_Source\PSoC5/CyLib.c **** \r
- 715:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 716:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyMasterClk_SetSource\r
- 717:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 718:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 719:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 720:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the source of the master clock.\r
- 721:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 722:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 723:.\Generated_Source\PSoC5/CyLib.c **** *   source: One of the four available Master clock sources.\r
- 724:.\Generated_Source\PSoC5/CyLib.c **** *     CY_MASTER_SOURCE_IMO\r
- 725:.\Generated_Source\PSoC5/CyLib.c **** *     CY_MASTER_SOURCE_PLL\r
- 726:.\Generated_Source\PSoC5/CyLib.c **** *     CY_MASTER_SOURCE_XTAL\r
- 727:.\Generated_Source\PSoC5/CyLib.c **** *     CY_MASTER_SOURCE_DSI\r
- 728:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 729:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 730:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 731:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 732:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 733:.\Generated_Source\PSoC5/CyLib.c **** *  The current source and the new source must both be running and stable before\r
- 734:.\Generated_Source\PSoC5/CyLib.c **** *  calling this function.\r
- 735:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 736:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 737:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 17\r
-\r
-\r
- 738:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 739:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 740:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 741:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 742:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 743:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 744:.\Generated_Source\PSoC5/CyLib.c **** void CyMasterClk_SetSource(uint8 source) \r
- 745:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 746:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR1_REG = (CY_LIB_CLKDIST_MSTR1_REG & MASTER_CLK_SRC_CLEAR) |\r
- 747:.\Generated_Source\PSoC5/CyLib.c ****                                 (source & ((uint8)(~MASTER_CLK_SRC_CLEAR)));\r
- 748:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 749:.\Generated_Source\PSoC5/CyLib.c **** \r
- 750:.\Generated_Source\PSoC5/CyLib.c **** \r
- 751:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 752:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyMasterClk_SetDivider\r
- 753:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 754:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 755:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 756:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the divider value used to generate Master Clock.\r
- 757:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 758:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 759:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 divider:\r
- 760:.\Generated_Source\PSoC5/CyLib.c **** *   Valid range [0-255]. The clock will be divided by this value + 1.\r
- 761:.\Generated_Source\PSoC5/CyLib.c **** *   For example to divide by 2 this parameter should be set to 1.\r
- 762:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 763:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 764:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 765:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 766:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 767:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 768:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 769:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 770:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 771:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 772:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 773:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 774:.\Generated_Source\PSoC5/CyLib.c **** *  When changing the Master or Bus clock divider value from div-by-n to div-by-1\r
- 775:.\Generated_Source\PSoC5/CyLib.c **** *  the first clock cycle output after the div-by-1 can be up to 4 ns shorter\r
- 776:.\Generated_Source\PSoC5/CyLib.c **** *  than the final/expected div-by-1 period.\r
- 777:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 778:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 779:.\Generated_Source\PSoC5/CyLib.c **** void CyMasterClk_SetDivider(uint8 divider) \r
- 780:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 781:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR0_REG = divider;\r
- 782:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 783:.\Generated_Source\PSoC5/CyLib.c **** \r
- 784:.\Generated_Source\PSoC5/CyLib.c **** \r
- 785:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 786:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyBusClk_Internal_SetDivider\r
- 787:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 788:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 789:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 790:.\Generated_Source\PSoC5/CyLib.c **** *  Function used by CyBusClk_SetDivider(). For internal use only.\r
- 791:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 792:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 793:.\Generated_Source\PSoC5/CyLib.c **** *   divider: Valid range [0-65535].\r
- 794:.\Generated_Source\PSoC5/CyLib.c **** *   The clock will be divided by this value + 1.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 18\r
-\r
-\r
- 795:.\Generated_Source\PSoC5/CyLib.c **** *   For example to divide by 2 this parameter should be set to 1.\r
- 796:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 797:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 798:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 799:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 800:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 801:.\Generated_Source\PSoC5/CyLib.c **** static void CyBusClk_Internal_SetDivider(uint16 divider)\r
- 802:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 167                           .loc 1 802 0\r
- 168                           .cfi_startproc\r
- 169                           @ args = 0, pretend = 0, frame = 0\r
- 170                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 171                           @ link register save eliminated.\r
- 172                   .LVL5:\r
- 803:.\Generated_Source\PSoC5/CyLib.c ****     /* Mask bits to enable shadow loads  */\r
- 804:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_AMASK_REG &= CY_LIB_CLKDIST_AMASK_MASK;\r
- 173                           .loc 1 804 0\r
- 174 0000 0D4B                 ldr     r3, .L22\r
- 175 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 176 0004 02F0F001             and     r1, r2, #240\r
- 805:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_DMASK_REG  = CY_LIB_CLKDIST_DMASK_MASK;\r
- 177                           .loc 1 805 0\r
- 178 0008 0022                 movs    r2, #0\r
- 804:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_AMASK_REG &= CY_LIB_CLKDIST_AMASK_MASK;\r
- 179                           .loc 1 804 0\r
- 180 000a 1970                 strb    r1, [r3, #0]\r
- 181                           .loc 1 805 0\r
- 182 000c 03F8042C             strb    r2, [r3, #-4]\r
- 806:.\Generated_Source\PSoC5/CyLib.c **** \r
- 807:.\Generated_Source\PSoC5/CyLib.c ****     /* Enable mask bits to enable shadow loads */\r
- 808:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_MASK;\r
- 183                           .loc 1 808 0\r
- 184 0010 13F80C1C             ldrb    r1, [r3, #-12]  @ zero_extendqisi2\r
- 185 0014 41F08002             orr     r2, r1, #128\r
- 809:.\Generated_Source\PSoC5/CyLib.c **** \r
- 810:.\Generated_Source\PSoC5/CyLib.c ****     /* Update Shadow Divider Value Register with the new divider */\r
- 811:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_WRK_LSB_REG = LO8(divider);\r
- 186                           .loc 1 811 0\r
- 187 0018 C1B2                 uxtb    r1, r0\r
- 812:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_WRK_MSB_REG = HI8(divider);\r
- 188                           .loc 1 812 0\r
- 189 001a 000A                 lsrs    r0, r0, #8\r
- 190                   .LVL6:\r
- 808:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_MASK;\r
- 191                           .loc 1 808 0\r
- 192 001c 03F80C2C             strb    r2, [r3, #-12]\r
- 811:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_WRK_LSB_REG = LO8(divider);\r
- 193                           .loc 1 811 0\r
- 194 0020 03F8121C             strb    r1, [r3, #-18]\r
- 195                           .loc 1 812 0\r
- 196 0024 03F8110C             strb    r0, [r3, #-17]\r
- 813:.\Generated_Source\PSoC5/CyLib.c **** \r
- 814:.\Generated_Source\PSoC5/CyLib.c **** \r
- 815:.\Generated_Source\PSoC5/CyLib.c ****     /***************************************************************************\r
- 816:.\Generated_Source\PSoC5/CyLib.c ****     * Copy shadow value defined in Shadow Divider Value Register\r
- 817:.\Generated_Source\PSoC5/CyLib.c ****     * (CY_LIB_CLKDIST_WRK_LSB_REG and CY_LIB_CLKDIST_WRK_MSB_REG) to all\r
- 818:.\Generated_Source\PSoC5/CyLib.c ****     * dividers selected in Analog and Digital Clock Mask Registers\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 19\r
-\r
-\r
- 819:.\Generated_Source\PSoC5/CyLib.c ****     * (CY_LIB_CLKDIST_AMASK_REG and CY_LIB_CLKDIST_DMASK_REG).\r
- 820:.\Generated_Source\PSoC5/CyLib.c ****     ***************************************************************************/\r
- 821:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_LD_REG |= CY_LIB_CLKDIST_LD_LOAD;\r
- 197                           .loc 1 821 0\r
- 198 0028 13F8132C             ldrb    r2, [r3, #-19]  @ zero_extendqisi2\r
- 199 002c 42F00101             orr     r1, r2, #1\r
- 200 0030 03F8131C             strb    r1, [r3, #-19]\r
- 201 0034 7047                 bx      lr\r
- 202                   .L23:\r
- 203 0036 00BF                 .align  2\r
- 204                   .L22:\r
- 205 0038 14400040             .word   1073758228\r
- 206                           .cfi_endproc\r
- 207                   .LFE14:\r
- 208                           .size   CyBusClk_Internal_SetDivider, .-CyBusClk_Internal_SetDivider\r
- 209                           .section        .text.CyPLL_OUT_Stop,"ax",%progbits\r
- 210                           .align  1\r
- 211                           .global CyPLL_OUT_Stop\r
- 212                           .thumb\r
- 213                           .thumb_func\r
- 214                           .type   CyPLL_OUT_Stop, %function\r
- 215                   CyPLL_OUT_Stop:\r
- 216                   .LFB1:\r
- 154:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 217                           .loc 1 154 0\r
- 218                           .cfi_startproc\r
- 219                           @ args = 0, pretend = 0, frame = 0\r
- 220                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 221                           @ link register save eliminated.\r
- 155:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_PLL_CFG0_REG &= ((uint8)(~CY_CLK_PLL_ENABLE));\r
- 222                           .loc 1 155 0\r
- 223 0000 024B                 ldr     r3, .L25\r
- 224 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 225 0004 02F0FE00             and     r0, r2, #254\r
- 226 0008 1870                 strb    r0, [r3, #0]\r
- 227 000a 7047                 bx      lr\r
- 228                   .L26:\r
- 229                           .align  2\r
- 230                   .L25:\r
- 231 000c 20420040             .word   1073758752\r
- 232                           .cfi_endproc\r
- 233                   .LFE1:\r
- 234                           .size   CyPLL_OUT_Stop, .-CyPLL_OUT_Stop\r
- 235                           .section        .text.CyPLL_OUT_SetPQ,"ax",%progbits\r
- 236                           .align  1\r
- 237                           .global CyPLL_OUT_SetPQ\r
- 238                           .thumb\r
- 239                           .thumb_func\r
- 240                           .type   CyPLL_OUT_SetPQ, %function\r
- 241                   CyPLL_OUT_SetPQ:\r
- 242                   .LFB2:\r
- 192:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 243                           .loc 1 192 0\r
- 244                           .cfi_startproc\r
- 245                           @ args = 0, pretend = 0, frame = 0\r
- 246                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 247                           @ link register save eliminated.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 20\r
-\r
-\r
- 248                   .LVL7:\r
- 196:.\Generated_Source\PSoC5/CyLib.c ****     if((pDiv    >= CY_CLK_PLL_MIN_P_VALUE  ) &&\r
- 249                           .loc 1 196 0\r
- 250 0000 0728                 cmp     r0, #7\r
- 251 0002 14D9                 bls     .L27\r
- 196:.\Generated_Source\PSoC5/CyLib.c ****     if((pDiv    >= CY_CLK_PLL_MIN_P_VALUE  ) &&\r
- 252                           .loc 1 196 0 is_stmt 0 discriminator 1\r
- 253 0004 1029                 cmp     r1, #16\r
- 254 0006 12D8                 bhi     .L27\r
- 197:.\Generated_Source\PSoC5/CyLib.c ****        (qDiv    <= CY_CLK_PLL_MAX_Q_VALUE  ) && (qDiv    >= CY_CLK_PLL_MIN_Q_VALUE  ) &&\r
- 255                           .loc 1 197 0 is_stmt 1\r
- 256 0008 89B1                 cbz     r1, .L27\r
- 197:.\Generated_Source\PSoC5/CyLib.c ****        (qDiv    <= CY_CLK_PLL_MAX_Q_VALUE  ) && (qDiv    >= CY_CLK_PLL_MIN_Q_VALUE  ) &&\r
- 257                           .loc 1 197 0 is_stmt 0 discriminator 1\r
- 258 000a 82B1                 cbz     r2, .L27\r
- 198:.\Generated_Source\PSoC5/CyLib.c ****        (current >= CY_CLK_PLL_MIN_CUR_VALUE) && (current <= CY_CLK_PLL_MAX_CUR_VALUE))\r
- 259                           .loc 1 198 0 is_stmt 1\r
- 260 000c 072A                 cmp     r2, #7\r
- 261 000e 0ED8                 bhi     .L27\r
- 201:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_P_REG = pDiv;\r
- 262                           .loc 1 201 0\r
- 263 0010 074B                 ldr     r3, .L35\r
- 202:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_Q_REG = ((uint8)(qDiv - 1u));\r
- 264                           .loc 1 202 0\r
- 265 0012 0139                 subs    r1, r1, #1\r
- 266                   .LVL8:\r
- 201:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_P_REG = pDiv;\r
- 267                           .loc 1 201 0\r
- 268 0014 1870                 strb    r0, [r3, #0]\r
- 202:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_Q_REG = ((uint8)(qDiv - 1u));\r
- 269                           .loc 1 202 0\r
- 270 0016 C8B2                 uxtb    r0, r1\r
- 271                   .LVL9:\r
- 272 0018 5870                 strb    r0, [r3, #1]\r
- 203:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_CFG1_REG = (CY_CLK_PLL_CFG1_REG & CY_CLK_PLL_CURRENT_MASK) |\r
- 273                           .loc 1 203 0\r
- 274 001a 13F8011C             ldrb    r1, [r3, #-1]   @ zero_extendqisi2\r
- 204:.\Generated_Source\PSoC5/CyLib.c ****                                 ((uint8)(((uint8)(current - 1u)) << CY_CLK_PLL_CURRENT_POSITION));\r
- 275                           .loc 1 204 0\r
- 276 001e 013A                 subs    r2, r2, #1\r
- 277                   .LVL10:\r
- 203:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_PLL_CFG1_REG = (CY_CLK_PLL_CFG1_REG & CY_CLK_PLL_CURRENT_MASK) |\r
- 278                           .loc 1 203 0\r
- 279 0020 01F08F00             and     r0, r1, #143\r
- 280 0024 40EA0211             orr     r1, r0, r2, lsl #4\r
- 281 0028 CAB2                 uxtb    r2, r1\r
- 282 002a 03F8012C             strb    r2, [r3, #-1]\r
- 283                   .LVL11:\r
- 284                   .L27:\r
- 285 002e 7047                 bx      lr\r
- 286                   .L36:\r
- 287                           .align  2\r
- 288                   .L35:\r
- 289 0030 22420040             .word   1073758754\r
- 290                           .cfi_endproc\r
- 291                   .LFE2:\r
- 292                           .size   CyPLL_OUT_SetPQ, .-CyPLL_OUT_SetPQ\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 21\r
-\r
-\r
- 293                           .section        .text.CyPLL_OUT_SetSource,"ax",%progbits\r
- 294                           .align  1\r
- 295                           .global CyPLL_OUT_SetSource\r
- 296                           .thumb\r
- 297                           .thumb_func\r
- 298                           .type   CyPLL_OUT_SetSource, %function\r
- 299                   CyPLL_OUT_SetSource:\r
- 300                   .LFB3:\r
- 247:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 301                           .loc 1 247 0\r
- 302                           .cfi_startproc\r
- 303                           @ args = 0, pretend = 0, frame = 0\r
- 304                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 305                           @ link register save eliminated.\r
- 306                   .LVL12:\r
- 251:.\Generated_Source\PSoC5/CyLib.c ****     switch(source)\r
- 307                           .loc 1 251 0\r
- 308 0000 0228                 cmp     r0, #2\r
- 309 0002 06D8                 bhi     .L37\r
- 256:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_CR_REG = ((CY_LIB_CLKDIST_CR_REG & CY_LIB_CLKDIST_CR_PLL_SCR_MASK) | sou\r
- 310                           .loc 1 256 0\r
- 311 0004 4FF04023             mov     r3, #1073758208\r
- 312 0008 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 313 000a 02F0FC01             and     r1, r2, #252\r
- 314 000e 0843                 orrs    r0, r0, r1\r
- 315                   .LVL13:\r
- 316 0010 1870                 strb    r0, [r3, #0]\r
- 317                   .L37:\r
- 318 0012 7047                 bx      lr\r
- 319                           .cfi_endproc\r
- 320                   .LFE3:\r
- 321                           .size   CyPLL_OUT_SetSource, .-CyPLL_OUT_SetSource\r
- 322                           .section        .text.CyIMO_Stop,"ax",%progbits\r
- 323                           .align  1\r
- 324                           .global CyIMO_Stop\r
- 325                           .thumb\r
- 326                           .thumb_func\r
- 327                           .type   CyIMO_Stop, %function\r
- 328                   CyIMO_Stop:\r
- 329                   .LFB5:\r
- 346:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 330                           .loc 1 346 0\r
- 331                           .cfi_startproc\r
- 332                           @ args = 0, pretend = 0, frame = 0\r
- 333                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 334                           @ link register save eliminated.\r
- 347:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_ACT_CFG0_REG  &= ((uint8) (~CY_LIB_PM_ACT_CFG0_IMO_EN));\r
- 335                           .loc 1 347 0\r
- 336 0000 044B                 ldr     r3, .L41\r
- 337 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 338 0004 02F0EF00             and     r0, r2, #239\r
- 339 0008 1870                 strb    r0, [r3, #0]\r
- 348:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_STBY_CFG0_REG &= ((uint8) (~CY_LIB_PM_STBY_CFG0_IMO_EN));\r
- 340                           .loc 1 348 0\r
- 341 000a 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
- 342 000c 01F0EF02             and     r2, r1, #239\r
- 343 0010 1A74                 strb    r2, [r3, #16]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 22\r
-\r
-\r
- 344 0012 7047                 bx      lr\r
- 345                   .L42:\r
- 346                           .align  2\r
- 347                   .L41:\r
- 348 0014 A0430040             .word   1073759136\r
- 349                           .cfi_endproc\r
- 350                   .LFE5:\r
- 351                           .size   CyIMO_Stop, .-CyIMO_Stop\r
- 352                           .section        .text.CyIMO_SetSource,"ax",%progbits\r
- 353                           .align  1\r
- 354                           .global CyIMO_SetSource\r
- 355                           .thumb\r
- 356                           .thumb_func\r
- 357                           .type   CyIMO_SetSource, %function\r
- 358                   CyIMO_SetSource:\r
- 359                   .LFB9:\r
- 648:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 360                           .loc 1 648 0\r
- 361                           .cfi_startproc\r
- 362                           @ args = 0, pretend = 0, frame = 0\r
- 363                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 364                           @ link register save eliminated.\r
- 365                   .LVL14:\r
- 649:.\Generated_Source\PSoC5/CyLib.c ****     switch(source)\r
- 366                           .loc 1 649 0\r
- 367 0000 0128                 cmp     r0, #1\r
- 368 0002 08D0                 beq     .L46\r
- 369 0004 14D3                 bcc     .L45\r
- 370 0006 0228                 cmp     r0, #2\r
- 371 0008 17D1                 bne     .L43\r
- 652:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_CLKDIST_CR_REG     &= ((uint8)(~CY_LIB_CLKDIST_CR_IMO2X));\r
- 372                           .loc 1 652 0\r
- 373 000a 4FF04023             mov     r3, #1073758208\r
- 374 000e 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 375 0010 02F0BF00             and     r0, r2, #191\r
- 376                   .LVL15:\r
- 377 0014 04E0                 b       .L48\r
- 378                   .LVL16:\r
- 379                   .L46:\r
- 657:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_CLKDIST_CR_REG     |= CY_LIB_CLKDIST_CR_IMO2X;\r
- 380                           .loc 1 657 0\r
- 381 0016 4FF04023             mov     r3, #1073758208\r
- 382 001a 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 383 001c 42F04000             orr     r0, r2, #64\r
- 384                   .LVL17:\r
- 385                   .L48:\r
- 386 0020 1870                 strb    r0, [r3, #0]\r
- 658:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_IMO;\r
- 387                           .loc 1 658 0\r
- 388 0022 93F80012             ldrb    r1, [r3, #512]  @ zero_extendqisi2\r
- 389 0026 41F02002             orr     r2, r1, #32\r
- 390 002a 83F80022             strb    r2, [r3, #512]\r
- 659:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 391                           .loc 1 659 0\r
- 392 002e 7047                 bx      lr\r
- 393                   .LVL18:\r
- 394                   .L45:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 23\r
-\r
-\r
- 662:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_IMO));\r
- 395                           .loc 1 662 0\r
- 396 0030 024B                 ldr     r3, .L49\r
- 397 0032 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 398                   .LVL19:\r
- 399 0034 00F0DF01             and     r1, r0, #223\r
- 400 0038 1970                 strb    r1, [r3, #0]\r
- 401                   .L43:\r
- 402 003a 7047                 bx      lr\r
- 403                   .L50:\r
- 404                           .align  2\r
- 405                   .L49:\r
- 406 003c 00420040             .word   1073758720\r
- 407                           .cfi_endproc\r
- 408                   .LFE9:\r
- 409                           .size   CyIMO_SetSource, .-CyIMO_SetSource\r
- 410                           .section        .text.CyIMO_EnableDoubler,"ax",%progbits\r
- 411                           .align  1\r
- 412                           .global CyIMO_EnableDoubler\r
- 413                           .thumb\r
- 414                           .thumb_func\r
- 415                           .type   CyIMO_EnableDoubler, %function\r
- 416                   CyIMO_EnableDoubler:\r
- 417                   .LFB10:\r
- 689:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 418                           .loc 1 689 0\r
- 419                           .cfi_startproc\r
- 420                           @ args = 0, pretend = 0, frame = 0\r
- 421                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 422                           @ link register save eliminated.\r
- 691:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_DOUBLER;\r
- 423                           .loc 1 691 0\r
- 424 0000 024B                 ldr     r3, .L52\r
- 425 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 426 0004 42F01000             orr     r0, r2, #16\r
- 427 0008 1870                 strb    r0, [r3, #0]\r
- 428 000a 7047                 bx      lr\r
- 429                   .L53:\r
- 430                           .align  2\r
- 431                   .L52:\r
- 432 000c 00420040             .word   1073758720\r
- 433                           .cfi_endproc\r
- 434                   .LFE10:\r
- 435                           .size   CyIMO_EnableDoubler, .-CyIMO_EnableDoubler\r
- 436                           .section        .text.CyIMO_DisableDoubler,"ax",%progbits\r
- 437                           .align  1\r
- 438                           .global CyIMO_DisableDoubler\r
- 439                           .thumb\r
- 440                           .thumb_func\r
- 441                           .type   CyIMO_DisableDoubler, %function\r
- 442                   CyIMO_DisableDoubler:\r
- 443                   .LFB11:\r
- 710:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 444                           .loc 1 710 0\r
- 445                           .cfi_startproc\r
- 446                           @ args = 0, pretend = 0, frame = 0\r
- 447                           @ frame_needed = 0, uses_anonymous_args = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 24\r
-\r
-\r
- 448                           @ link register save eliminated.\r
- 711:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_DOUBLER));\r
- 449                           .loc 1 711 0\r
- 450 0000 024B                 ldr     r3, .L55\r
- 451 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 452 0004 02F0EF00             and     r0, r2, #239\r
- 453 0008 1870                 strb    r0, [r3, #0]\r
- 454 000a 7047                 bx      lr\r
- 455                   .L56:\r
- 456                           .align  2\r
- 457                   .L55:\r
- 458 000c 00420040             .word   1073758720\r
- 459                           .cfi_endproc\r
- 460                   .LFE11:\r
- 461                           .size   CyIMO_DisableDoubler, .-CyIMO_DisableDoubler\r
- 462                           .section        .text.CyIMO_SetFreq,"ax",%progbits\r
- 463                           .align  1\r
- 464                           .global CyIMO_SetFreq\r
- 465                           .thumb\r
- 466                           .thumb_func\r
- 467                           .type   CyIMO_SetFreq, %function\r
- 468                   CyIMO_SetFreq:\r
- 469                   .LFB8:\r
- 493:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 470                           .loc 1 493 0\r
- 471                           .cfi_startproc\r
- 472                           @ args = 0, pretend = 0, frame = 0\r
- 473                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 474                   .LVL20:\r
- 475 0000 70B5                 push    {r4, r5, r6, lr}\r
- 476                   .LCFI0:\r
- 477                           .cfi_def_cfa_offset 16\r
- 478                           .cfi_offset 4, -16\r
- 479                           .cfi_offset 5, -12\r
- 480                           .cfi_offset 6, -8\r
- 481                           .cfi_offset 14, -4\r
- 504:.\Generated_Source\PSoC5/CyLib.c ****     currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));\r
- 482                           .loc 1 504 0\r
- 483 0002 344B                 ldr     r3, .L82\r
- 507:.\Generated_Source\PSoC5/CyLib.c ****     nextFreq = (freq == CY_IMO_FREQ_USB) ? CY_IMO_FREQ_24MHZ : freq;\r
- 484                           .loc 1 507 0\r
- 485 0004 0828                 cmp     r0, #8\r
- 486 0006 14BF                 ite     ne\r
- 487 0008 0646                 movne   r6, r0\r
- 488 000a 0326                 moveq   r6, #3\r
- 504:.\Generated_Source\PSoC5/CyLib.c ****     currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));\r
- 489                           .loc 1 504 0\r
- 490 000c 1D78                 ldrb    r5, [r3, #0]    @ zero_extendqisi2\r
- 493:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 491                           .loc 1 493 0\r
- 492 000e 0446                 mov     r4, r0\r
- 504:.\Generated_Source\PSoC5/CyLib.c ****     currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));\r
- 493                           .loc 1 504 0\r
- 494 0010 05F00705             and     r5, r5, #7\r
- 495                   .LVL21:\r
- 509:.\Generated_Source\PSoC5/CyLib.c ****     switch (currentFreq)\r
- 496                           .loc 1 509 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 25\r
-\r
-\r
- 497 0014 022D                 cmp     r5, #2\r
- 498 0016 05D0                 beq     .L61\r
- 509:.\Generated_Source\PSoC5/CyLib.c ****     switch (currentFreq)\r
- 499                           .loc 1 509 0 is_stmt 0 discriminator 3\r
- 500 0018 032D                 cmp     r5, #3\r
- 501 001a 07D0                 beq     .L80\r
- 512:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_12MHZ;\r
- 502                           .loc 1 512 0 is_stmt 1 discriminator 3\r
- 503 001c 002D                 cmp     r5, #0\r
- 504 001e 08BF                 it      eq\r
- 505 0020 0225                 moveq   r5, #2\r
- 506                   .LVL22:\r
- 507 0022 00E0                 b       .L59\r
- 508                   .LVL23:\r
- 509                   .L61:\r
- 520:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_24MHZ;\r
- 510                           .loc 1 520 0\r
- 511 0024 0325                 movs    r5, #3\r
- 512                   .LVL24:\r
- 513                   .L59:\r
- 546:.\Generated_Source\PSoC5/CyLib.c ****     if (nextFreq >= currentFreq)\r
- 514                           .loc 1 546 0\r
- 515 0026 AE42                 cmp     r6, r5\r
- 516 0028 04D3                 bcc     .L63\r
- 517 002a 00E0                 b       .L62\r
- 518                   .LVL25:\r
- 519                   .L80:\r
- 524:.\Generated_Source\PSoC5/CyLib.c ****         currentFreq = CY_IMO_FREQ_3MHZ;\r
- 520                           .loc 1 524 0\r
- 521 002c 0025                 movs    r5, #0\r
- 522                   .LVL26:\r
- 523                   .L62:\r
- 549:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_SetTrimValue(freq);\r
- 524                           .loc 1 549 0\r
- 525 002e 2046                 mov     r0, r4\r
- 526                   .LVL27:\r
- 527 0030 FFF7FEFF             bl      CyIMO_SetTrimValue\r
- 528                   .LVL28:\r
- 529                   .L63:\r
- 553:.\Generated_Source\PSoC5/CyLib.c ****     switch(freq)\r
- 530                           .loc 1 553 0\r
- 531 0034 082C                 cmp     r4, #8\r
- 532 0036 3ED8                 bhi     .L64\r
- 533 0038 DFE804F0             tbb     [pc, r4]\r
- 534                   .L73:\r
- 535 003c 05                   .byte   (.L65-.L73)/2\r
- 536 003d 0C                   .byte   (.L66-.L73)/2\r
- 537 003e 13                   .byte   (.L67-.L73)/2\r
- 538 003f 18                   .byte   (.L68-.L73)/2\r
- 539 0040 1F                   .byte   (.L69-.L73)/2\r
- 540 0041 26                   .byte   (.L70-.L73)/2\r
- 541 0042 2D                   .byte   (.L71-.L73)/2\r
- 542 0043 3D                   .byte   (.L64-.L73)/2\r
- 543 0044 35                   .byte   (.L72-.L73)/2\r
- 544 0045 00                   .align  1\r
- 545                   .L65:\r
- 556:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 26\r
-\r
-\r
- 546                           .loc 1 556 0\r
- 547 0046 2348                 ldr     r0, .L82\r
- 548 0048 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 549 004a 02F0B801             and     r1, r2, #184\r
- 550 004e 41F00303             orr     r3, r1, #3\r
- 551 0052 26E0                 b       .L81\r
- 552                   .L66:\r
- 561:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 553                           .loc 1 561 0\r
- 554 0054 1F48                 ldr     r0, .L82\r
- 555 0056 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 556 0058 01F0B803             and     r3, r1, #184\r
- 557 005c 43F00103             orr     r3, r3, #1\r
- 558 0060 1FE0                 b       .L81\r
- 559                   .L67:\r
- 566:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 560                           .loc 1 566 0\r
- 561 0062 1C48                 ldr     r0, .L82\r
- 562 0064 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 563 0066 02F0B803             and     r3, r2, #184\r
- 564 006a 1AE0                 b       .L81\r
- 565                   .L68:\r
- 571:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 566                           .loc 1 571 0\r
- 567 006c 1948                 ldr     r0, .L82\r
- 568 006e 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 569 0070 01F0B803             and     r3, r1, #184\r
- 570 0074 43F00203             orr     r3, r3, #2\r
- 571 0078 13E0                 b       .L81\r
- 572                   .L69:\r
- 576:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 573                           .loc 1 576 0\r
- 574 007a 1648                 ldr     r0, .L82\r
- 575 007c 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 576 007e 03F0B802             and     r2, r3, #184\r
- 577 0082 42F00403             orr     r3, r2, #4\r
- 578 0086 0CE0                 b       .L81\r
- 579                   .L70:\r
- 581:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 580                           .loc 1 581 0\r
- 581 0088 1248                 ldr     r0, .L82\r
- 582 008a 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 583 008c 02F0B801             and     r1, r2, #184\r
- 584 0090 41F00503             orr     r3, r1, #5\r
- 585 0094 05E0                 b       .L81\r
- 586                   .L71:\r
- 587:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 587                           .loc 1 587 0\r
- 588 0096 0F48                 ldr     r0, .L82\r
- 589 0098 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 590 009a 02F0B801             and     r1, r2, #184\r
- 591 009e 41F00603             orr     r3, r1, #6\r
- 592                   .L81:\r
- 593 00a2 0370                 strb    r3, [r0, #0]\r
- 589:.\Generated_Source\PSoC5/CyLib.c ****         break;\r
- 594                           .loc 1 589 0\r
- 595 00a4 0CE0                 b       .L76\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 27\r
-\r
-\r
- 596                   .L72:\r
- 593:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK)\r
- 597                           .loc 1 593 0\r
- 598 00a6 0B48                 ldr     r0, .L82\r
- 599 00a8 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 600 00aa 02F0B801             and     r1, r2, #184\r
- 601 00ae 41F04203             orr     r3, r1, #66\r
- 602 00b2 0370                 strb    r3, [r0, #0]\r
- 603 00b4 01E0                 b       .L75\r
- 604                   .L64:\r
- 603:.\Generated_Source\PSoC5/CyLib.c ****     if (freq == CY_IMO_FREQ_USB)\r
- 605                           .loc 1 603 0\r
- 606 00b6 082C                 cmp     r4, #8\r
- 607 00b8 02D1                 bne     .L76\r
- 608                   .L75:\r
- 605:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_EnableDoubler();\r
- 609                           .loc 1 605 0\r
- 610 00ba FFF7FEFF             bl      CyIMO_EnableDoubler\r
- 611                   .LVL29:\r
- 612 00be 01E0                 b       .L77\r
- 613                   .L76:\r
- 609:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_DisableDoubler();\r
- 614                           .loc 1 609 0\r
- 615 00c0 FFF7FEFF             bl      CyIMO_DisableDoubler\r
- 616                   .LVL30:\r
- 617                   .L77:\r
- 612:.\Generated_Source\PSoC5/CyLib.c ****     if (nextFreq < currentFreq)\r
- 618                           .loc 1 612 0\r
- 619 00c4 AE42                 cmp     r6, r5\r
- 620 00c6 04D2                 bcs     .L57\r
- 615:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_SetTrimValue(freq);\r
- 621                           .loc 1 615 0\r
- 622 00c8 2046                 mov     r0, r4\r
- 617:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 623                           .loc 1 617 0\r
- 624 00ca BDE87040             pop     {r4, r5, r6, lr}\r
- 615:.\Generated_Source\PSoC5/CyLib.c ****         CyIMO_SetTrimValue(freq);\r
- 625                           .loc 1 615 0\r
- 626 00ce FFF7FEBF             b       CyIMO_SetTrimValue\r
- 627                   .LVL31:\r
- 628                   .L57:\r
- 629 00d2 70BD                 pop     {r4, r5, r6, pc}\r
- 630                   .L83:\r
- 631                           .align  2\r
- 632                   .L82:\r
- 633 00d4 00420040             .word   1073758720\r
- 634                           .cfi_endproc\r
- 635                   .LFE8:\r
- 636                           .size   CyIMO_SetFreq, .-CyIMO_SetFreq\r
- 637                           .section        .text.CyMasterClk_SetSource,"ax",%progbits\r
- 638                           .align  1\r
- 639                           .global CyMasterClk_SetSource\r
- 640                           .thumb\r
- 641                           .thumb_func\r
- 642                           .type   CyMasterClk_SetSource, %function\r
- 643                   CyMasterClk_SetSource:\r
- 644                   .LFB12:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 28\r
-\r
-\r
- 745:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 645                           .loc 1 745 0\r
- 646                           .cfi_startproc\r
- 647                           @ args = 0, pretend = 0, frame = 0\r
- 648                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 649                           @ link register save eliminated.\r
- 650                   .LVL32:\r
- 746:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR1_REG = (CY_LIB_CLKDIST_MSTR1_REG & MASTER_CLK_SRC_CLEAR) |\r
- 651                           .loc 1 746 0\r
- 652 0000 044B                 ldr     r3, .L85\r
- 653 0002 00F00300             and     r0, r0, #3\r
- 654                   .LVL33:\r
- 655 0006 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 656 0008 02F0FC01             and     r1, r2, #252\r
- 657 000c 40EA0102             orr     r2, r0, r1\r
- 658 0010 1A70                 strb    r2, [r3, #0]\r
- 659 0012 7047                 bx      lr\r
- 660                   .L86:\r
- 661                           .align  2\r
- 662                   .L85:\r
- 663 0014 05400040             .word   1073758213\r
- 664                           .cfi_endproc\r
- 665                   .LFE12:\r
- 666                           .size   CyMasterClk_SetSource, .-CyMasterClk_SetSource\r
- 667                           .section        .text.CyMasterClk_SetDivider,"ax",%progbits\r
- 668                           .align  1\r
- 669                           .global CyMasterClk_SetDivider\r
- 670                           .thumb\r
- 671                           .thumb_func\r
- 672                           .type   CyMasterClk_SetDivider, %function\r
- 673                   CyMasterClk_SetDivider:\r
- 674                   .LFB13:\r
- 780:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 675                           .loc 1 780 0\r
- 676                           .cfi_startproc\r
- 677                           @ args = 0, pretend = 0, frame = 0\r
- 678                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 679                           @ link register save eliminated.\r
- 680                   .LVL34:\r
- 781:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR0_REG = divider;\r
- 681                           .loc 1 781 0\r
- 682 0000 014B                 ldr     r3, .L88\r
- 683 0002 1870                 strb    r0, [r3, #0]\r
- 684 0004 7047                 bx      lr\r
- 685                   .L89:\r
- 686 0006 00BF                 .align  2\r
- 687                   .L88:\r
- 688 0008 04400040             .word   1073758212\r
- 689                           .cfi_endproc\r
- 690                   .LFE13:\r
- 691                           .size   CyMasterClk_SetDivider, .-CyMasterClk_SetDivider\r
- 692                           .section        .text.CyBusClk_SetDivider,"ax",%progbits\r
- 693                           .align  1\r
- 694                           .global CyBusClk_SetDivider\r
- 695                           .thumb\r
- 696                           .thumb_func\r
- 697                           .type   CyBusClk_SetDivider, %function\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 29\r
-\r
-\r
- 698                   CyBusClk_SetDivider:\r
- 699                   .LFB15:\r
- 822:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 823:.\Generated_Source\PSoC5/CyLib.c **** \r
- 824:.\Generated_Source\PSoC5/CyLib.c **** \r
- 825:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 826:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyBusClk_SetDivider\r
- 827:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 828:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 829:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 830:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the divider value used to generate Bus Clock.\r
- 831:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 832:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 833:.\Generated_Source\PSoC5/CyLib.c **** *  divider: Valid range [0-65535]. The clock will be divided by this value + 1.\r
- 834:.\Generated_Source\PSoC5/CyLib.c **** *  For example to divide by 2 this parameter should be set to 1.\r
- 835:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 836:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 837:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 838:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 839:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 840:.\Generated_Source\PSoC5/CyLib.c **** *  If as result of this function execution the CPU clock frequency is increased\r
- 841:.\Generated_Source\PSoC5/CyLib.c **** *  then the number of clock cycles the cache will wait before it samples data\r
- 842:.\Generated_Source\PSoC5/CyLib.c **** *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 843:.\Generated_Source\PSoC5/CyLib.c **** *  with appropriate parameter. It can be optionally called if CPU clock\r
- 844:.\Generated_Source\PSoC5/CyLib.c **** *  frequency is lowered in order to improve CPU performance.\r
- 845:.\Generated_Source\PSoC5/CyLib.c **** *  See CyFlash_SetWaitCycles() description for more information.\r
- 846:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 847:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 848:.\Generated_Source\PSoC5/CyLib.c **** void CyBusClk_SetDivider(uint16 divider) \r
- 849:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 700                           .loc 1 849 0\r
- 701                           .cfi_startproc\r
- 702                           @ args = 0, pretend = 0, frame = 0\r
- 703                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 704                   .LVL35:\r
- 705 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 706                   .LCFI1:\r
- 707                           .cfi_def_cfa_offset 24\r
- 708                           .cfi_offset 3, -24\r
- 709                           .cfi_offset 4, -20\r
- 710                           .cfi_offset 5, -16\r
- 711                           .cfi_offset 6, -12\r
- 712                           .cfi_offset 7, -8\r
- 713                           .cfi_offset 14, -4\r
- 714                           .loc 1 849 0\r
- 715 0002 0446                 mov     r4, r0\r
- 850:.\Generated_Source\PSoC5/CyLib.c ****     uint8  masterClkDiv;\r
- 851:.\Generated_Source\PSoC5/CyLib.c ****     uint16 busClkDiv;\r
- 852:.\Generated_Source\PSoC5/CyLib.c ****     uint8 interruptState;\r
- 853:.\Generated_Source\PSoC5/CyLib.c **** \r
- 854:.\Generated_Source\PSoC5/CyLib.c ****     interruptState = CyEnterCriticalSection();\r
- 716                           .loc 1 854 0\r
- 717 0004 FFF7FEFF             bl      CyEnterCriticalSection\r
- 718                   .LVL36:\r
- 855:.\Generated_Source\PSoC5/CyLib.c **** \r
- 856:.\Generated_Source\PSoC5/CyLib.c ****     /* Work around to set the bus clock divider value */\r
- 857:.\Generated_Source\PSoC5/CyLib.c ****     busClkDiv = (uint16)((uint16)CY_LIB_CLKDIST_BCFG_MSB_REG << 8u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 30\r
-\r
-\r
- 719                           .loc 1 857 0\r
- 720 0008 154B                 ldr     r3, .L100\r
- 854:.\Generated_Source\PSoC5/CyLib.c ****     interruptState = CyEnterCriticalSection();\r
- 721                           .loc 1 854 0\r
- 722 000a 0646                 mov     r6, r0\r
- 723                   .LVL37:\r
- 858:.\Generated_Source\PSoC5/CyLib.c ****     busClkDiv |= CY_LIB_CLKDIST_BCFG_LSB_REG;\r
- 724                           .loc 1 858 0\r
- 725 000c 581E                 subs    r0, r3, #1\r
- 726                   .LVL38:\r
- 857:.\Generated_Source\PSoC5/CyLib.c ****     busClkDiv = (uint16)((uint16)CY_LIB_CLKDIST_BCFG_MSB_REG << 8u);\r
- 727                           .loc 1 857 0\r
- 728 000e 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 729                   .LVL39:\r
- 730                           .loc 1 858 0\r
- 731 0010 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 732                   .LVL40:\r
- 859:.\Generated_Source\PSoC5/CyLib.c **** \r
- 860:.\Generated_Source\PSoC5/CyLib.c ****     if ((divider == 0u) || (busClkDiv == 0u))\r
- 733                           .loc 1 860 0\r
- 734 0012 14B1                 cbz     r4, .L91\r
- 735                           .loc 1 860 0 is_stmt 0 discriminator 1\r
- 736 0014 51EA0223             orrs    r3, r1, r2, lsl #8\r
- 737 0018 1AD1                 bne     .L92\r
- 738                   .L91:\r
- 861:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 862:.\Generated_Source\PSoC5/CyLib.c ****         /* Save away the master clock divider value */\r
- 863:.\Generated_Source\PSoC5/CyLib.c ****         masterClkDiv = CY_LIB_CLKDIST_MSTR0_REG;\r
- 739                           .loc 1 863 0 is_stmt 1\r
- 740 001a 124D                 ldr     r5, .L100+4\r
- 741 001c 2B78                 ldrb    r3, [r5, #0]    @ zero_extendqisi2\r
- 864:.\Generated_Source\PSoC5/CyLib.c **** \r
- 865:.\Generated_Source\PSoC5/CyLib.c ****         if (masterClkDiv < CY_LIB_CLKDIST_MASTERCLK_DIV)\r
- 742                           .loc 1 865 0\r
- 743 001e 062B                 cmp     r3, #6\r
- 863:.\Generated_Source\PSoC5/CyLib.c ****         masterClkDiv = CY_LIB_CLKDIST_MSTR0_REG;\r
- 744                           .loc 1 863 0\r
- 745 0020 1F46                 mov     r7, r3\r
- 746                   .LVL41:\r
- 747                           .loc 1 865 0\r
- 748 0022 01D8                 bhi     .L93\r
- 749                   .LVL42:\r
- 750                   .LBB12:\r
- 751                   .LBB13:\r
- 781:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR0_REG = divider;\r
- 752                           .loc 1 781 0\r
- 753 0024 0722                 movs    r2, #7\r
- 754                   .LVL43:\r
- 755 0026 2A70                 strb    r2, [r5, #0]\r
- 756                   .LVL44:\r
- 757                   .L93:\r
- 758 0028 0F4D                 ldr     r5, .L100+8\r
- 759                   .LBE13:\r
- 760                   .LBE12:\r
- 866:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 867:.\Generated_Source\PSoC5/CyLib.c ****             /* Set master clock divider to 7 */\r
- 868:.\Generated_Source\PSoC5/CyLib.c ****             CyMasterClk_SetDivider(CY_LIB_CLKDIST_MASTERCLK_DIV);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 31\r
-\r
-\r
- 869:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 870:.\Generated_Source\PSoC5/CyLib.c **** \r
- 871:.\Generated_Source\PSoC5/CyLib.c ****         if (divider == 0u)\r
- 761                           .loc 1 871 0\r
- 762 002a 3CB9                 cbnz    r4, .L94\r
- 872:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 873:.\Generated_Source\PSoC5/CyLib.c ****             /* Set the SSS bit and the divider register desired value */\r
- 874:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_SSS;\r
- 763                           .loc 1 874 0\r
- 764 002c 2B78                 ldrb    r3, [r5, #0]    @ zero_extendqisi2\r
- 765                   .LVL45:\r
- 875:.\Generated_Source\PSoC5/CyLib.c ****             CyBusClk_Internal_SetDivider(divider);\r
- 766                           .loc 1 875 0\r
- 767 002e 2046                 mov     r0, r4\r
- 874:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_SSS;\r
- 768                           .loc 1 874 0\r
- 769 0030 43F04002             orr     r2, r3, #64\r
- 770 0034 2A70                 strb    r2, [r5, #0]\r
- 771                           .loc 1 875 0\r
- 772 0036 FFF7FEFF             bl      CyBusClk_Internal_SetDivider\r
- 773                   .LVL46:\r
- 774 003a 06E0                 b       .L95\r
- 775                   .LVL47:\r
- 776                   .L94:\r
- 876:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 877:.\Generated_Source\PSoC5/CyLib.c ****         else\r
- 878:.\Generated_Source\PSoC5/CyLib.c ****         {\r
- 879:.\Generated_Source\PSoC5/CyLib.c ****             CyBusClk_Internal_SetDivider(divider);\r
- 777                           .loc 1 879 0\r
- 778 003c 2046                 mov     r0, r4\r
- 779 003e FFF7FEFF             bl      CyBusClk_Internal_SetDivider\r
- 780                   .LVL48:\r
- 880:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_BCFG2_REG &= ((uint8)(~CY_LIB_CLKDIST_BCFG2_SSS));\r
- 781                           .loc 1 880 0\r
- 782 0042 2878                 ldrb    r0, [r5, #0]    @ zero_extendqisi2\r
- 783 0044 00F0BF01             and     r1, r0, #191\r
- 784 0048 2970                 strb    r1, [r5, #0]\r
- 785                   .L95:\r
- 786                   .LVL49:\r
- 787                   .LBB14:\r
- 788                   .LBB15:\r
- 781:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_MSTR0_REG = divider;\r
- 789                           .loc 1 781 0\r
- 790 004a 0648                 ldr     r0, .L100+4\r
- 791 004c 0770                 strb    r7, [r0, #0]\r
- 792 004e 02E0                 b       .L96\r
- 793                   .LVL50:\r
- 794                   .L92:\r
- 795                   .LBE15:\r
- 796                   .LBE14:\r
- 881:.\Generated_Source\PSoC5/CyLib.c ****         }\r
- 882:.\Generated_Source\PSoC5/CyLib.c **** \r
- 883:.\Generated_Source\PSoC5/CyLib.c ****         /* Restore the master clock */\r
- 884:.\Generated_Source\PSoC5/CyLib.c ****         CyMasterClk_SetDivider(masterClkDiv);\r
- 885:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 886:.\Generated_Source\PSoC5/CyLib.c ****     else\r
- 887:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 32\r
-\r
-\r
- 888:.\Generated_Source\PSoC5/CyLib.c ****         CyBusClk_Internal_SetDivider(divider);\r
- 797                           .loc 1 888 0\r
- 798 0050 2046                 mov     r0, r4\r
- 799 0052 FFF7FEFF             bl      CyBusClk_Internal_SetDivider\r
- 800                   .LVL51:\r
- 801                   .L96:\r
- 889:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 890:.\Generated_Source\PSoC5/CyLib.c **** \r
- 891:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
- 802                           .loc 1 891 0\r
- 803 0056 3046                 mov     r0, r6\r
- 892:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 804                           .loc 1 892 0\r
- 805 0058 BDE8F840             pop     {r3, r4, r5, r6, r7, lr}\r
- 891:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
- 806                           .loc 1 891 0\r
- 807 005c FFF7FEBF             b       CyExitCriticalSection\r
- 808                   .LVL52:\r
- 809                   .L101:\r
- 810                           .align  2\r
- 811                   .L100:\r
- 812 0060 07400040             .word   1073758215\r
- 813 0064 04400040             .word   1073758212\r
- 814 0068 08400040             .word   1073758216\r
- 815                           .cfi_endproc\r
- 816                   .LFE15:\r
- 817                           .size   CyBusClk_SetDivider, .-CyBusClk_SetDivider\r
- 818                           .section        .text.CyUsbClk_SetSource,"ax",%progbits\r
- 819                           .align  1\r
- 820                           .global CyUsbClk_SetSource\r
- 821                           .thumb\r
- 822                           .thumb_func\r
- 823                           .type   CyUsbClk_SetSource, %function\r
- 824                   CyUsbClk_SetSource:\r
- 825                   .LFB16:\r
- 893:.\Generated_Source\PSoC5/CyLib.c **** \r
- 894:.\Generated_Source\PSoC5/CyLib.c **** \r
- 895:.\Generated_Source\PSoC5/CyLib.c **** #if(CY_PSOC3)\r
- 896:.\Generated_Source\PSoC5/CyLib.c **** \r
- 897:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
- 898:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyCpuClk_SetDivider\r
- 899:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
- 900:.\Generated_Source\PSoC5/CyLib.c ****     *\r
- 901:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
- 902:.\Generated_Source\PSoC5/CyLib.c ****     *  Sets the divider value used to generate the CPU Clock. Only applicable for\r
- 903:.\Generated_Source\PSoC5/CyLib.c ****     *  PSoC 3 parts.\r
- 904:.\Generated_Source\PSoC5/CyLib.c ****     *\r
- 905:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
- 906:.\Generated_Source\PSoC5/CyLib.c ****     *  divider: Valid range [0-15]. The clock will be divided by this value + 1.\r
- 907:.\Generated_Source\PSoC5/CyLib.c ****     *  For example to divide by 2 this parameter should be set to 1.\r
- 908:.\Generated_Source\PSoC5/CyLib.c ****     *\r
- 909:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
- 910:.\Generated_Source\PSoC5/CyLib.c ****     *  None\r
- 911:.\Generated_Source\PSoC5/CyLib.c ****     *\r
- 912:.\Generated_Source\PSoC5/CyLib.c ****     * Side Effects:\r
- 913:.\Generated_Source\PSoC5/CyLib.c ****     *  If as result of this function execution the CPU clock frequency is increased\r
- 914:.\Generated_Source\PSoC5/CyLib.c ****     *  then the number of clock cycles the cache will wait before it samples data\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 33\r
-\r
-\r
- 915:.\Generated_Source\PSoC5/CyLib.c ****     *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
- 916:.\Generated_Source\PSoC5/CyLib.c ****     *  with appropriate parameter. It can be optionally called if CPU clock\r
- 917:.\Generated_Source\PSoC5/CyLib.c ****     *  frequency is lowered in order to improve CPU performance.\r
- 918:.\Generated_Source\PSoC5/CyLib.c ****     *  See CyFlash_SetWaitCycles() description for more information.\r
- 919:.\Generated_Source\PSoC5/CyLib.c ****     *\r
- 920:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
- 921:.\Generated_Source\PSoC5/CyLib.c ****     void CyCpuClk_SetDivider(uint8 divider) \r
- 922:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 923:.\Generated_Source\PSoC5/CyLib.c ****             CY_LIB_CLKDIST_MSTR1_REG = (CY_LIB_CLKDIST_MSTR1_REG & CY_LIB_CLKDIST_MSTR1_DIV_MASK) |\r
- 924:.\Generated_Source\PSoC5/CyLib.c ****                                 ((uint8)(divider << CY_LIB_CLKDIST_DIV_POSITION));\r
- 925:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 926:.\Generated_Source\PSoC5/CyLib.c **** \r
- 927:.\Generated_Source\PSoC5/CyLib.c **** #endif /* (CY_PSOC3) */\r
- 928:.\Generated_Source\PSoC5/CyLib.c **** \r
- 929:.\Generated_Source\PSoC5/CyLib.c **** \r
- 930:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 931:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyUsbClk_SetSource\r
- 932:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 933:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 934:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 935:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the source of the USB clock.\r
- 936:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 937:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 938:.\Generated_Source\PSoC5/CyLib.c **** *  source: One of the four available USB clock sources\r
- 939:.\Generated_Source\PSoC5/CyLib.c **** *    CY_LIB_USB_CLK_IMO2X     - IMO 2x\r
- 940:.\Generated_Source\PSoC5/CyLib.c **** *    CY_LIB_USB_CLK_IMO       - IMO\r
- 941:.\Generated_Source\PSoC5/CyLib.c **** *    CY_LIB_USB_CLK_PLL       - PLL\r
- 942:.\Generated_Source\PSoC5/CyLib.c **** *    CY_LIB_USB_CLK_DSI       - DSI\r
- 943:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 944:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 945:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 946:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 947:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 948:.\Generated_Source\PSoC5/CyLib.c **** void CyUsbClk_SetSource(uint8 source) \r
- 949:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 826                           .loc 1 949 0\r
- 827                           .cfi_startproc\r
- 828                           @ args = 0, pretend = 0, frame = 0\r
- 829                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 830                           @ link register save eliminated.\r
- 831                   .LVL53:\r
- 950:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_UCFG_REG = (CY_LIB_CLKDIST_UCFG_REG & ((uint8)(~CY_LIB_CLKDIST_UCFG_SRC_SEL_MASK\r
- 832                           .loc 1 950 0\r
- 833 0000 044B                 ldr     r3, .L103\r
- 834 0002 00F00300             and     r0, r0, #3\r
- 835                   .LVL54:\r
- 836 0006 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 837 0008 02F0FC01             and     r1, r2, #252\r
- 838 000c 40EA0102             orr     r2, r0, r1\r
- 839 0010 1A70                 strb    r2, [r3, #0]\r
- 840 0012 7047                 bx      lr\r
- 841                   .L104:\r
- 842                           .align  2\r
- 843                   .L103:\r
- 844 0014 09400040             .word   1073758217\r
- 845                           .cfi_endproc\r
- 846                   .LFE16:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 34\r
-\r
-\r
- 847                           .size   CyUsbClk_SetSource, .-CyUsbClk_SetSource\r
- 848                           .section        .text.CyILO_Start1K,"ax",%progbits\r
- 849                           .align  1\r
- 850                           .global CyILO_Start1K\r
- 851                           .thumb\r
- 852                           .thumb_func\r
- 853                           .type   CyILO_Start1K, %function\r
- 854                   CyILO_Start1K:\r
- 855                   .LFB17:\r
- 951:.\Generated_Source\PSoC5/CyLib.c ****                         (CY_LIB_CLKDIST_UCFG_SRC_SEL_MASK & source);\r
- 952:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 953:.\Generated_Source\PSoC5/CyLib.c **** \r
- 954:.\Generated_Source\PSoC5/CyLib.c **** \r
- 955:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 956:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Start1K\r
- 957:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 958:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 959:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 960:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the ILO 1 KHz oscillator.\r
- 961:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 962:.\Generated_Source\PSoC5/CyLib.c **** *  Note The ILO 1 KHz oscillator is always enabled by default, regardless of the\r
- 963:.\Generated_Source\PSoC5/CyLib.c **** *  selection in the Clock Editor. Therefore, this API is only needed if the\r
- 964:.\Generated_Source\PSoC5/CyLib.c **** *  oscillator was turned off manually.\r
- 965:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 966:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 967:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 968:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 969:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 970:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 971:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 972:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
- 973:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Start1K(void) \r
- 974:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 856                           .loc 1 974 0\r
- 857                           .cfi_startproc\r
- 858                           @ args = 0, pretend = 0, frame = 0\r
- 859                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 860                           @ link register save eliminated.\r
- 975:.\Generated_Source\PSoC5/CyLib.c ****     /* Set the bit 1 of ILO RS */\r
- 976:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ;\r
- 861                           .loc 1 976 0\r
- 862 0000 024B                 ldr     r3, .L106\r
- 863 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 864 0004 42F00200             orr     r0, r2, #2\r
- 865 0008 1870                 strb    r0, [r3, #0]\r
- 866 000a 7047                 bx      lr\r
- 867                   .L107:\r
- 868                           .align  2\r
- 869                   .L106:\r
- 870 000c 00430040             .word   1073758976\r
- 871                           .cfi_endproc\r
- 872                   .LFE17:\r
- 873                           .size   CyILO_Start1K, .-CyILO_Start1K\r
- 874                           .section        .text.CyILO_Stop1K,"ax",%progbits\r
- 875                           .align  1\r
- 876                           .global CyILO_Stop1K\r
- 877                           .thumb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 35\r
-\r
-\r
- 878                           .thumb_func\r
- 879                           .type   CyILO_Stop1K, %function\r
- 880                   CyILO_Stop1K:\r
- 881                   .LFB18:\r
- 977:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 978:.\Generated_Source\PSoC5/CyLib.c **** \r
- 979:.\Generated_Source\PSoC5/CyLib.c **** \r
- 980:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
- 981:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Stop1K\r
- 982:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
- 983:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 984:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
- 985:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the ILO 1 KHz oscillator.\r
- 986:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 987:.\Generated_Source\PSoC5/CyLib.c **** *  Note The ILO 1 KHz oscillator must be enabled if Sleep or Hibernate low power\r
- 988:.\Generated_Source\PSoC5/CyLib.c **** *  mode APIs are expected to be used. For more information, refer to the Power\r
- 989:.\Generated_Source\PSoC5/CyLib.c **** *  Management section of this document.\r
- 990:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 991:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
- 992:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 993:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 994:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
- 995:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
- 996:.\Generated_Source\PSoC5/CyLib.c **** *\r
- 997:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
- 998:.\Generated_Source\PSoC5/CyLib.c **** *  PSoC5: Stopping the ILO 1 kHz could break the active WDT functionality.\r
- 999:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1000:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1001:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Stop1K(void) \r
-1002:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 882                           .loc 1 1002 0\r
- 883                           .cfi_startproc\r
- 884                           @ args = 0, pretend = 0, frame = 0\r
- 885                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 886                           @ link register save eliminated.\r
-1003:.\Generated_Source\PSoC5/CyLib.c ****     /* Clear the bit 1 of ILO RS */\r
-1004:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ));\r
- 887                           .loc 1 1004 0\r
- 888 0000 024B                 ldr     r3, .L109\r
- 889 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 890 0004 02F0FD00             and     r0, r2, #253\r
- 891 0008 1870                 strb    r0, [r3, #0]\r
- 892 000a 7047                 bx      lr\r
- 893                   .L110:\r
- 894                           .align  2\r
- 895                   .L109:\r
- 896 000c 00430040             .word   1073758976\r
- 897                           .cfi_endproc\r
- 898                   .LFE18:\r
- 899                           .size   CyILO_Stop1K, .-CyILO_Stop1K\r
- 900                           .section        .text.CyILO_Start100K,"ax",%progbits\r
- 901                           .align  1\r
- 902                           .global CyILO_Start100K\r
- 903                           .thumb\r
- 904                           .thumb_func\r
- 905                           .type   CyILO_Start100K, %function\r
- 906                   CyILO_Start100K:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 36\r
-\r
-\r
- 907                   .LFB19:\r
-1005:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1006:.\Generated_Source\PSoC5/CyLib.c **** \r
-1007:.\Generated_Source\PSoC5/CyLib.c **** \r
-1008:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1009:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Start100K\r
-1010:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1011:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1012:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1013:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the ILO 100 KHz oscillator.\r
-1014:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1015:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1016:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1017:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1018:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1019:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1020:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1021:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1022:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Start100K(void) \r
-1023:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 908                           .loc 1 1023 0\r
- 909                           .cfi_startproc\r
- 910                           @ args = 0, pretend = 0, frame = 0\r
- 911                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 912                           @ link register save eliminated.\r
-1024:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 913                           .loc 1 1024 0\r
- 914 0000 024B                 ldr     r3, .L112\r
- 915 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 916 0004 42F00400             orr     r0, r2, #4\r
- 917 0008 1870                 strb    r0, [r3, #0]\r
- 918 000a 7047                 bx      lr\r
- 919                   .L113:\r
- 920                           .align  2\r
- 921                   .L112:\r
- 922 000c 00430040             .word   1073758976\r
- 923                           .cfi_endproc\r
- 924                   .LFE19:\r
- 925                           .size   CyILO_Start100K, .-CyILO_Start100K\r
- 926                           .section        .text.CyILO_Stop100K,"ax",%progbits\r
- 927                           .align  1\r
- 928                           .global CyILO_Stop100K\r
- 929                           .thumb\r
- 930                           .thumb_func\r
- 931                           .type   CyILO_Stop100K, %function\r
- 932                   CyILO_Stop100K:\r
- 933                   .LFB20:\r
-1025:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1026:.\Generated_Source\PSoC5/CyLib.c **** \r
-1027:.\Generated_Source\PSoC5/CyLib.c **** \r
-1028:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1029:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Stop100K\r
-1030:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1031:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1032:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1033:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the ILO 100 KHz oscillator.\r
-1034:.\Generated_Source\PSoC5/CyLib.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 37\r
-\r
-\r
-1035:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1036:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1037:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1038:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1039:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1040:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1041:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1042:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Stop100K(void) \r
-1043:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 934                           .loc 1 1043 0\r
- 935                           .cfi_startproc\r
- 936                           @ args = 0, pretend = 0, frame = 0\r
- 937                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 938                           @ link register save eliminated.\r
-1044:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ));\r
- 939                           .loc 1 1044 0\r
- 940 0000 024B                 ldr     r3, .L115\r
- 941 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 942 0004 02F0FB00             and     r0, r2, #251\r
- 943 0008 1870                 strb    r0, [r3, #0]\r
- 944 000a 7047                 bx      lr\r
- 945                   .L116:\r
- 946                           .align  2\r
- 947                   .L115:\r
- 948 000c 00430040             .word   1073758976\r
- 949                           .cfi_endproc\r
- 950                   .LFE20:\r
- 951                           .size   CyILO_Stop100K, .-CyILO_Stop100K\r
- 952                           .section        .text.CyIMO_Start,"ax",%progbits\r
- 953                           .align  1\r
- 954                           .global CyIMO_Start\r
- 955                           .thumb\r
- 956                           .thumb_func\r
- 957                           .type   CyIMO_Start, %function\r
- 958                   CyIMO_Start:\r
- 959                   .LFB4:\r
- 297:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 960                           .loc 1 297 0\r
- 961                           .cfi_startproc\r
- 962                           @ args = 0, pretend = 0, frame = 0\r
- 963                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 964                   .LVL55:\r
- 965 0000 70B5                 push    {r4, r5, r6, lr}\r
- 966                   .LCFI2:\r
- 967                           .cfi_def_cfa_offset 16\r
- 968                           .cfi_offset 4, -16\r
- 969                           .cfi_offset 5, -12\r
- 970                           .cfi_offset 6, -8\r
- 971                           .cfi_offset 14, -4\r
- 303:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_ACT_CFG0_REG  |= CY_LIB_PM_ACT_CFG0_IMO_EN;\r
- 972                           .loc 1 303 0\r
- 973 0002 114B                 ldr     r3, .L128\r
- 974 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 975 0006 42F01001             orr     r1, r2, #16\r
- 976 000a 1970                 strb    r1, [r3, #0]\r
- 304:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_PM_STBY_CFG0_REG |= CY_LIB_PM_STBY_CFG0_IMO_EN;\r
- 977                           .loc 1 304 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 38\r
-\r
-\r
- 978 000c 1A7C                 ldrb    r2, [r3, #16]   @ zero_extendqisi2\r
- 979 000e 42F01001             orr     r1, r2, #16\r
- 980 0012 1974                 strb    r1, [r3, #16]\r
- 981 0014 1033                 adds    r3, r3, #16\r
- 306:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != wait)\r
- 982                           .loc 1 306 0\r
- 983 0016 B0B1                 cbz     r0, .L117\r
- 309:.\Generated_Source\PSoC5/CyLib.c ****         ilo100KhzEnable = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 984                           .loc 1 309 0\r
- 985 0018 13F8B06C             ldrb    r6, [r3, #-176] @ zero_extendqisi2\r
- 310:.\Generated_Source\PSoC5/CyLib.c ****         pmFtwCfg0Reg = CY_LIB_PM_TW_CFG0_REG;\r
- 986                           .loc 1 310 0\r
- 987 001c 13F8305C             ldrb    r5, [r3, #-48]  @ zero_extendqisi2\r
- 309:.\Generated_Source\PSoC5/CyLib.c ****         ilo100KhzEnable = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 988                           .loc 1 309 0\r
- 989 0020 06F00400             and     r0, r6, #4\r
- 990                   .LVL56:\r
- 991 0024 C6B2                 uxtb    r6, r0\r
- 992                   .LVL57:\r
- 313:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_LIB_CLK_IMO_FTW_TIMEOUT);\r
- 993                           .loc 1 313 0\r
- 994 0026 0020                 movs    r0, #0\r
- 995                   .LVL58:\r
- 311:.\Generated_Source\PSoC5/CyLib.c ****         pmFtwCfg2Reg = CY_LIB_PM_TW_CFG2_REG;\r
- 996                           .loc 1 311 0\r
- 997 0028 13F82E4C             ldrb    r4, [r3, #-46]  @ zero_extendqisi2\r
- 998                   .LVL59:\r
- 313:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_LIB_CLK_IMO_FTW_TIMEOUT);\r
- 999                           .loc 1 313 0\r
- 1000 002c FFF7FEFF            bl      CyPmFtwSetInterval\r
- 1001                  .LVL60:\r
- 1002                  .L119:\r
- 315:.\Generated_Source\PSoC5/CyLib.c ****         while (0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
- 1003                          .loc 1 315 0 discriminator 1\r
- 1004 0030 0120                movs    r0, #1\r
- 1005 0032 FFF7FEFF            bl      CyPmReadStatus\r
- 1006                  .LVL61:\r
- 1007 0036 C107                lsls    r1, r0, #31\r
- 1008 0038 FAD5                bpl     .L119\r
- 320:.\Generated_Source\PSoC5/CyLib.c ****         if(0u == ilo100KhzEnable)\r
- 1009                          .loc 1 320 0\r
- 1010 003a 0EB9                cbnz    r6, .L120\r
- 322:.\Generated_Source\PSoC5/CyLib.c ****             CyILO_Stop100K();\r
- 1011                          .loc 1 322 0\r
- 1012 003c FFF7FEFF            bl      CyILO_Stop100K\r
- 1013                  .LVL62:\r
- 1014                  .L120:\r
- 325:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG0_REG = pmFtwCfg0Reg;\r
- 1015                          .loc 1 325 0\r
- 1016 0040 024B                ldr     r3, .L128+4\r
- 1017 0042 1D70                strb    r5, [r3, #0]\r
- 326:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG2_REG = pmFtwCfg2Reg;\r
- 1018                          .loc 1 326 0\r
- 1019 0044 9C70                strb    r4, [r3, #2]\r
- 1020                  .LVL63:\r
- 1021                  .L117:\r
- 1022 0046 70BD                pop     {r4, r5, r6, pc}\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 39\r
-\r
-\r
- 1023                  .L129:\r
- 1024                          .align  2\r
- 1025                  .L128:\r
- 1026 0048 A0430040            .word   1073759136\r
- 1027 004c 80430040            .word   1073759104\r
- 1028                          .cfi_endproc\r
- 1029                  .LFE4:\r
- 1030                          .size   CyIMO_Start, .-CyIMO_Start\r
- 1031                          .section        .text.CyPLL_OUT_Start,"ax",%progbits\r
- 1032                          .align  1\r
- 1033                          .global CyPLL_OUT_Start\r
- 1034                          .thumb\r
- 1035                          .thumb_func\r
- 1036                          .type   CyPLL_OUT_Start, %function\r
- 1037                  CyPLL_OUT_Start:\r
- 1038                  .LFB0:\r
-  90:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1039                          .loc 1 90 0\r
- 1040                          .cfi_startproc\r
- 1041                          @ args = 0, pretend = 0, frame = 0\r
- 1042                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1043                  .LVL64:\r
- 1044 0000 F8B5                push    {r3, r4, r5, r6, r7, lr}\r
- 1045                  .LCFI3:\r
- 1046                          .cfi_def_cfa_offset 24\r
- 1047                          .cfi_offset 3, -24\r
- 1048                          .cfi_offset 4, -20\r
- 1049                          .cfi_offset 5, -16\r
- 1050                          .cfi_offset 6, -12\r
- 1051                          .cfi_offset 7, -8\r
- 1052                          .cfi_offset 14, -4\r
-  99:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_PLL_CFG0_REG |= CY_CLK_PLL_ENABLE;\r
- 1053                          .loc 1 99 0\r
- 1054 0002 164B                ldr     r3, .L145\r
- 1055 0004 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1056 0006 42F00101            orr     r1, r2, #1\r
- 1057 000a 1970                strb    r1, [r3, #0]\r
- 101:.\Generated_Source\PSoC5/CyLib.c ****     if(wait != 0u)\r
- 1058                          .loc 1 101 0\r
- 1059 000c 10B3                cbz     r0, .L136\r
- 104:.\Generated_Source\PSoC5/CyLib.c ****         iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 1060                          .loc 1 104 0\r
- 1061 000e 93F8E070            ldrb    r7, [r3, #224]  @ zero_extendqisi2\r
- 105:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg0State = CY_LIB_PM_TW_CFG0_REG;\r
- 1062                          .loc 1 105 0\r
- 1063 0012 93F86061            ldrb    r6, [r3, #352]  @ zero_extendqisi2\r
- 104:.\Generated_Source\PSoC5/CyLib.c ****         iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
- 1064                          .loc 1 104 0\r
- 1065 0016 07F00400            and     r0, r7, #4\r
- 1066                  .LVL65:\r
- 1067 001a C7B2                uxtb    r7, r0\r
- 1068                  .LVL66:\r
- 108:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_CLK_PLL_FTW_INTERVAL);\r
- 1069                          .loc 1 108 0\r
- 1070 001c 1820                movs    r0, #24\r
- 1071                  .LVL67:\r
- 106:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg2State = CY_LIB_PM_TW_CFG2_REG;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 40\r
-\r
-\r
- 1072                          .loc 1 106 0\r
- 1073 001e 93F86251            ldrb    r5, [r3, #354]  @ zero_extendqisi2\r
- 1074                  .LVL68:\r
- 108:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_CLK_PLL_FTW_INTERVAL);\r
- 1075                          .loc 1 108 0\r
- 1076 0022 FFF7FEFF            bl      CyPmFtwSetInterval\r
- 1077                  .LVL69:\r
- 1078                  .L143:\r
- 112:.\Generated_Source\PSoC5/CyLib.c ****         while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
- 1079                          .loc 1 112 0 discriminator 1\r
- 1080 0026 0120                movs    r0, #1\r
- 1081 0028 FFF7FEFF            bl      CyPmReadStatus\r
- 1082                  .LVL70:\r
- 1083 002c 10F00101            ands    r1, r0, #1\r
- 1084 0030 08D1                bne     .L144\r
- 1085                  .L134:\r
- 115:.\Generated_Source\PSoC5/CyLib.c ****             if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
- 1086                          .loc 1 115 0\r
- 1087 0032 0B4C                ldr     r4, .L145+4\r
- 1088 0034 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1089 0036 DA07                lsls    r2, r3, #31\r
- 1090 0038 F5D5                bpl     .L143\r
- 117:.\Generated_Source\PSoC5/CyLib.c ****                 if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
- 1091                          .loc 1 117 0\r
- 1092 003a 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 1093 003c D407                lsls    r4, r2, #31\r
- 1094 003e F2D5                bpl     .L143\r
- 1095                  .L137:\r
- 119:.\Generated_Source\PSoC5/CyLib.c ****                     status = CYRET_SUCCESS;\r
- 1096                          .loc 1 119 0\r
- 1097 0040 0C46                mov     r4, r1\r
- 1098 0042 00E0                b       .L133\r
- 1099                  .L144:\r
- 110:.\Generated_Source\PSoC5/CyLib.c ****         status = CYRET_TIMEOUT;\r
- 1100                          .loc 1 110 0\r
- 1101 0044 1024                movs    r4, #16\r
- 1102                  .L133:\r
- 1103                  .LVL71:\r
- 126:.\Generated_Source\PSoC5/CyLib.c ****         if(0u == iloEnableState)\r
- 1104                          .loc 1 126 0\r
- 1105 0046 0FB9                cbnz    r7, .L135\r
- 128:.\Generated_Source\PSoC5/CyLib.c ****             CyILO_Stop100K();\r
- 1106                          .loc 1 128 0\r
- 1107 0048 FFF7FEFF            bl      CyILO_Stop100K\r
- 1108                  .LVL72:\r
- 1109                  .L135:\r
- 131:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG0_REG = pmTwCfg0State;\r
- 1110                          .loc 1 131 0\r
- 1111 004c 0548                ldr     r0, .L145+8\r
- 1112 004e 0670                strb    r6, [r0, #0]\r
- 132:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG2_REG = pmTwCfg2State;\r
- 1113                          .loc 1 132 0\r
- 1114 0050 8570                strb    r5, [r0, #2]\r
- 1115 0052 00E0                b       .L131\r
- 1116                  .LVL73:\r
- 1117                  .L136:\r
-  91:.\Generated_Source\PSoC5/CyLib.c ****     cystatus status = CYRET_SUCCESS;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 41\r
-\r
-\r
- 1118                          .loc 1 91 0\r
- 1119 0054 0446                mov     r4, r0\r
- 1120                  .LVL74:\r
- 1121                  .L131:\r
- 136:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1122                          .loc 1 136 0\r
- 1123 0056 2046                mov     r0, r4\r
- 1124 0058 F8BD                pop     {r3, r4, r5, r6, r7, pc}\r
- 1125                  .L146:\r
- 1126 005a 00BF                .align  2\r
- 1127                  .L145:\r
- 1128 005c 20420040            .word   1073758752\r
- 1129 0060 25420040            .word   1073758757\r
- 1130 0064 80430040            .word   1073759104\r
- 1131                          .cfi_endproc\r
- 1132                  .LFE0:\r
- 1133                          .size   CyPLL_OUT_Start, .-CyPLL_OUT_Start\r
- 1134                          .section        .text.CyILO_Enable33K,"ax",%progbits\r
- 1135                          .align  1\r
- 1136                          .global CyILO_Enable33K\r
- 1137                          .thumb\r
- 1138                          .thumb_func\r
- 1139                          .type   CyILO_Enable33K, %function\r
- 1140                  CyILO_Enable33K:\r
- 1141                  .LFB21:\r
-1045:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1046:.\Generated_Source\PSoC5/CyLib.c **** \r
-1047:.\Generated_Source\PSoC5/CyLib.c **** \r
-1048:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1049:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Enable33K\r
-1050:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1051:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1052:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1053:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the ILO 33 KHz divider.\r
-1054:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1055:.\Generated_Source\PSoC5/CyLib.c **** *  Note that the 33 KHz clock is generated from the 100 KHz oscillator,\r
-1056:.\Generated_Source\PSoC5/CyLib.c **** *  so it must also be running in order to generate the 33 KHz output.\r
-1057:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1058:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1059:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1060:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1061:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1062:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1063:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1064:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1065:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Enable33K(void) \r
-1066:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1142                          .loc 1 1066 0\r
- 1143                          .cfi_startproc\r
- 1144                          @ args = 0, pretend = 0, frame = 0\r
- 1145                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1146                          @ link register save eliminated.\r
-1067:.\Generated_Source\PSoC5/CyLib.c ****     /* Set the bit 5 of ILO RS */\r
-1068:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ;\r
- 1147                          .loc 1 1068 0\r
- 1148 0000 024B                ldr     r3, .L148\r
- 1149 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 42\r
-\r
-\r
- 1150 0004 42F02000            orr     r0, r2, #32\r
- 1151 0008 1870                strb    r0, [r3, #0]\r
- 1152 000a 7047                bx      lr\r
- 1153                  .L149:\r
- 1154                          .align  2\r
- 1155                  .L148:\r
- 1156 000c 00430040            .word   1073758976\r
- 1157                          .cfi_endproc\r
- 1158                  .LFE21:\r
- 1159                          .size   CyILO_Enable33K, .-CyILO_Enable33K\r
- 1160                          .section        .text.CyILO_Disable33K,"ax",%progbits\r
- 1161                          .align  1\r
- 1162                          .global CyILO_Disable33K\r
- 1163                          .thumb\r
- 1164                          .thumb_func\r
- 1165                          .type   CyILO_Disable33K, %function\r
- 1166                  CyILO_Disable33K:\r
- 1167                  .LFB22:\r
-1069:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1070:.\Generated_Source\PSoC5/CyLib.c **** \r
-1071:.\Generated_Source\PSoC5/CyLib.c **** \r
-1072:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1073:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_Disable33K\r
-1074:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1075:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1076:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1077:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the ILO 33 KHz divider.\r
-1078:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1079:.\Generated_Source\PSoC5/CyLib.c **** *  Note that the 33 KHz clock is generated from the 100 KHz oscillator, but this\r
-1080:.\Generated_Source\PSoC5/CyLib.c **** *  API does not disable the 100 KHz clock.\r
-1081:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1082:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1083:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1084:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1085:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1086:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1087:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1088:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1089:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_Disable33K(void) \r
-1090:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1168                          .loc 1 1090 0\r
- 1169                          .cfi_startproc\r
- 1170                          @ args = 0, pretend = 0, frame = 0\r
- 1171                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1172                          @ link register save eliminated.\r
-1091:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ));\r
- 1173                          .loc 1 1091 0\r
- 1174 0000 024B                ldr     r3, .L151\r
- 1175 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1176 0004 02F0DF00            and     r0, r2, #223\r
- 1177 0008 1870                strb    r0, [r3, #0]\r
- 1178 000a 7047                bx      lr\r
- 1179                  .L152:\r
- 1180                          .align  2\r
- 1181                  .L151:\r
- 1182 000c 00430040            .word   1073758976\r
- 1183                          .cfi_endproc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 43\r
-\r
-\r
- 1184                  .LFE22:\r
- 1185                          .size   CyILO_Disable33K, .-CyILO_Disable33K\r
- 1186                          .section        .text.CyILO_SetSource,"ax",%progbits\r
- 1187                          .align  1\r
- 1188                          .global CyILO_SetSource\r
- 1189                          .thumb\r
- 1190                          .thumb_func\r
- 1191                          .type   CyILO_SetSource, %function\r
- 1192                  CyILO_SetSource:\r
- 1193                  .LFB23:\r
-1092:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1093:.\Generated_Source\PSoC5/CyLib.c **** \r
-1094:.\Generated_Source\PSoC5/CyLib.c **** \r
-1095:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1096:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_SetSource\r
-1097:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1098:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1099:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1100:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the source of the clock output from the ILO block.\r
-1101:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1102:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1103:.\Generated_Source\PSoC5/CyLib.c **** *  source: One of the three available ILO output sources\r
-1104:.\Generated_Source\PSoC5/CyLib.c **** *       Value        Define                Source\r
-1105:.\Generated_Source\PSoC5/CyLib.c **** *       0            CY_ILO_SOURCE_100K    ILO 100 KHz\r
-1106:.\Generated_Source\PSoC5/CyLib.c **** *       1            CY_ILO_SOURCE_33K     ILO 33 KHz\r
-1107:.\Generated_Source\PSoC5/CyLib.c **** *       2            CY_ILO_SOURCE_1K      ILO 1 KHz\r
-1108:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1109:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1110:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1111:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1112:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1113:.\Generated_Source\PSoC5/CyLib.c **** void CyILO_SetSource(uint8 source) \r
-1114:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1194                          .loc 1 1114 0\r
- 1195                          .cfi_startproc\r
- 1196                          @ args = 0, pretend = 0, frame = 0\r
- 1197                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1198                          @ link register save eliminated.\r
- 1199                  .LVL75:\r
-1115:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_CR_REG = (CY_LIB_CLKDIST_CR_REG & CY_ILO_SOURCE_BITS_CLEAR) |\r
- 1200                          .loc 1 1115 0\r
- 1201 0000 4FF04023            mov     r3, #1073758208\r
- 1202 0004 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-1116:.\Generated_Source\PSoC5/CyLib.c ****                     (((uint8) (source << 2u)) & ((uint8)(~CY_ILO_SOURCE_BITS_CLEAR)));\r
- 1203                          .loc 1 1116 0\r
- 1204 0006 8000                lsls    r0, r0, #2\r
- 1205                  .LVL76:\r
-1115:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_CLKDIST_CR_REG = (CY_LIB_CLKDIST_CR_REG & CY_ILO_SOURCE_BITS_CLEAR) |\r
- 1206                          .loc 1 1115 0\r
- 1207 0008 00F00C01            and     r1, r0, #12\r
- 1208 000c 02F0F302            and     r2, r2, #243\r
- 1209 0010 41EA0200            orr     r0, r1, r2\r
- 1210 0014 1870                strb    r0, [r3, #0]\r
- 1211 0016 7047                bx      lr\r
- 1212                          .cfi_endproc\r
- 1213                  .LFE23:\r
- 1214                          .size   CyILO_SetSource, .-CyILO_SetSource\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 44\r
-\r
-\r
- 1215                          .section        .text.CyILO_SetPowerMode,"ax",%progbits\r
- 1216                          .align  1\r
- 1217                          .global CyILO_SetPowerMode\r
- 1218                          .thumb\r
- 1219                          .thumb_func\r
- 1220                          .type   CyILO_SetPowerMode, %function\r
- 1221                  CyILO_SetPowerMode:\r
- 1222                  .LFB24:\r
-1117:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1118:.\Generated_Source\PSoC5/CyLib.c **** \r
-1119:.\Generated_Source\PSoC5/CyLib.c **** \r
-1120:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1121:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyILO_SetPowerMode\r
-1122:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1123:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1124:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1125:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the power mode used by the ILO during power down. Allows for lower power\r
-1126:.\Generated_Source\PSoC5/CyLib.c **** *  down power usage resulting in a slower startup time.\r
-1127:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1128:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1129:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 mode\r
-1130:.\Generated_Source\PSoC5/CyLib.c **** *   CY_ILO_FAST_START - Faster start-up, internal bias left on when powered down\r
-1131:.\Generated_Source\PSoC5/CyLib.c **** *   CY_ILO_SLOW_START - Slower start-up, internal bias off when powered down\r
-1132:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1133:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1134:.\Generated_Source\PSoC5/CyLib.c **** *   Prevous power mode state.\r
-1135:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1136:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1137:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyILO_SetPowerMode(uint8 mode) \r
-1138:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1223                          .loc 1 1138 0\r
- 1224                          .cfi_startproc\r
- 1225                          @ args = 0, pretend = 0, frame = 0\r
- 1226                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1227                          @ link register save eliminated.\r
- 1228                  .LVL77:\r
-1139:.\Generated_Source\PSoC5/CyLib.c ****     uint8 state;\r
-1140:.\Generated_Source\PSoC5/CyLib.c **** \r
-1141:.\Generated_Source\PSoC5/CyLib.c ****     /* Get current state. */\r
-1142:.\Generated_Source\PSoC5/CyLib.c ****     state = CY_LIB_SLOWCLK_ILO_CR0_REG;\r
- 1229                          .loc 1 1142 0\r
- 1230 0000 054A                ldr     r2, .L158\r
- 1231 0002 1378                ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 1232                  .LVL78:\r
-1143:.\Generated_Source\PSoC5/CyLib.c **** \r
-1144:.\Generated_Source\PSoC5/CyLib.c ****     /* Set the the oscillator power mode. */\r
-1145:.\Generated_Source\PSoC5/CyLib.c ****     if(mode != CY_ILO_FAST_START)\r
- 1233                          .loc 1 1145 0\r
- 1234 0004 10B1                cbz     r0, .L155\r
-1146:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1147:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_SLOWCLK_ILO_CR0_REG = (state | CY_ILO_CONTROL_PD_MODE);\r
- 1235                          .loc 1 1147 0\r
- 1236 0006 43F01001            orr     r1, r3, #16\r
- 1237 000a 01E0                b       .L157\r
- 1238                  .L155:\r
-1148:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1149:.\Generated_Source\PSoC5/CyLib.c ****     else\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 45\r
-\r
-\r
-1150:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1151:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_SLOWCLK_ILO_CR0_REG = (state & ((uint8)(~CY_ILO_CONTROL_PD_MODE)));\r
- 1239                          .loc 1 1151 0\r
- 1240 000c 03F0EF01            and     r1, r3, #239\r
- 1241                  .L157:\r
- 1242 0010 1170                strb    r1, [r2, #0]\r
-1152:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1153:.\Generated_Source\PSoC5/CyLib.c **** \r
-1154:.\Generated_Source\PSoC5/CyLib.c ****     /* Return the old mode. */\r
-1155:.\Generated_Source\PSoC5/CyLib.c ****     return ((state & CY_ILO_CONTROL_PD_MODE) >> CY_ILO_CONTROL_PD_POSITION);\r
-1156:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1243                          .loc 1 1156 0\r
- 1244 0012 C3F30010            ubfx    r0, r3, #4, #1\r
- 1245                  .LVL79:\r
- 1246 0016 7047                bx      lr\r
- 1247                  .L159:\r
- 1248                          .align  2\r
- 1249                  .L158:\r
- 1250 0018 00430040            .word   1073758976\r
- 1251                          .cfi_endproc\r
- 1252                  .LFE24:\r
- 1253                          .size   CyILO_SetPowerMode, .-CyILO_SetPowerMode\r
- 1254                          .section        .text.CyXTAL_32KHZ_Stop,"ax",%progbits\r
- 1255                          .align  1\r
- 1256                          .global CyXTAL_32KHZ_Stop\r
- 1257                          .thumb\r
- 1258                          .thumb_func\r
- 1259                          .type   CyXTAL_32KHZ_Stop, %function\r
- 1260                  CyXTAL_32KHZ_Stop:\r
- 1261                  .LFB26:\r
-1157:.\Generated_Source\PSoC5/CyLib.c **** \r
-1158:.\Generated_Source\PSoC5/CyLib.c **** \r
-1159:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1160:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_32KHZ_Start\r
-1161:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1162:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1163:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1164:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the 32 KHz Crystal Oscillator.\r
-1165:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1166:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1167:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1168:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1169:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1170:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1171:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1172:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1173:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_32KHZ_Start(void) \r
-1174:.\Generated_Source\PSoC5/CyLib.c **** {\r
-1175:.\Generated_Source\PSoC5/CyLib.c ****     volatile uint16 i;\r
-1176:.\Generated_Source\PSoC5/CyLib.c **** \r
-1177:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
-1178:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_STARTUP;\r
-1179:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-1180:.\Generated_Source\PSoC5/CyLib.c ****                                 CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-1181:.\Generated_Source\PSoC5/CyLib.c **** \r
-1182:.\Generated_Source\PSoC5/CyLib.c ****     #if(CY_PSOC3)\r
-1183:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_PDBEN;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 46\r
-\r
-\r
-1184:.\Generated_Source\PSoC5/CyLib.c ****     #endif  /* (CY_PSOC3) */\r
-1185:.\Generated_Source\PSoC5/CyLib.c **** \r
-1186:.\Generated_Source\PSoC5/CyLib.c ****     /* Enable operation of the 32K Crystal Oscillator */\r
-1187:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_EN;\r
-1188:.\Generated_Source\PSoC5/CyLib.c **** \r
-1189:.\Generated_Source\PSoC5/CyLib.c ****     for (i = 1000u; i > 0u; i--)\r
-1190:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1191:.\Generated_Source\PSoC5/CyLib.c ****         if(0u != (CyXTAL_32KHZ_ReadStatus() & CY_XTAL32K_ANA_STAT))\r
-1192:.\Generated_Source\PSoC5/CyLib.c ****         {\r
-1193:.\Generated_Source\PSoC5/CyLib.c ****             /* Ready - switch to the hign power mode */\r
-1194:.\Generated_Source\PSoC5/CyLib.c ****             (void) CyXTAL_32KHZ_SetPowerMode(0u);\r
-1195:.\Generated_Source\PSoC5/CyLib.c **** \r
-1196:.\Generated_Source\PSoC5/CyLib.c ****             break;\r
-1197:.\Generated_Source\PSoC5/CyLib.c ****         }\r
-1198:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(1u);\r
-1199:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1200:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1201:.\Generated_Source\PSoC5/CyLib.c **** \r
-1202:.\Generated_Source\PSoC5/CyLib.c **** \r
-1203:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1204:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_32KHZ_Stop\r
-1205:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1206:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1207:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1208:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the 32KHz Crystal Oscillator.\r
-1209:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1210:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1211:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1212:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1213:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1214:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1215:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1216:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1217:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_32KHZ_Stop(void) \r
-1218:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1262                          .loc 1 1218 0\r
- 1263                          .cfi_startproc\r
- 1264                          @ args = 0, pretend = 0, frame = 0\r
- 1265                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1266                          @ link register save eliminated.\r
-1219:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG  = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1267                          .loc 1 1219 0\r
- 1268 0000 094B                ldr     r3, .L161\r
- 1269 0002 F322                movs    r2, #243\r
-1220:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG   = CY_CLK_XTAL32_TR_POWERDOWN;\r
- 1270                          .loc 1 1220 0\r
- 1271 0004 0949                ldr     r1, .L161+4\r
-1219:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG  = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1272                          .loc 1 1219 0\r
- 1273 0006 1A70                strb    r2, [r3, #0]\r
- 1274                          .loc 1 1220 0\r
- 1275 0008 0020                movs    r0, #0\r
-1221:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1276                          .loc 1 1221 0\r
- 1277 000a 094B                ldr     r3, .L161+8\r
-1220:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG   = CY_CLK_XTAL32_TR_POWERDOWN;\r
- 1278                          .loc 1 1220 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 47\r
-\r
-\r
- 1279 000c 0870                strb    r0, [r1, #0]\r
- 1280                          .loc 1 1221 0\r
- 1281 000e 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1282 0010 02F0F300            and     r0, r2, #243\r
- 1283 0014 40F00401            orr     r1, r0, #4\r
- 1284 0018 1970                strb    r1, [r3, #0]\r
-1222:.\Generated_Source\PSoC5/CyLib.c ****                              CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-1223:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CR_REG &= ((uint8)(~(CY_CLK_XTAL32_CR_EN | CY_CLK_XTAL32_CR_LPM)));\r
- 1285                          .loc 1 1223 0\r
- 1286 001a 13F8012C            ldrb    r2, [r3, #-1]   @ zero_extendqisi2\r
- 1287 001e 02F0FC00            and     r0, r2, #252\r
- 1288 0022 03F8010C            strb    r0, [r3, #-1]\r
- 1289 0026 7047                bx      lr\r
- 1290                  .L162:\r
- 1291                          .align  2\r
- 1292                  .L161:\r
- 1293 0028 0A430040            .word   1073758986\r
- 1294 002c 98460040            .word   1073759896\r
- 1295 0030 09430040            .word   1073758985\r
- 1296                          .cfi_endproc\r
- 1297                  .LFE26:\r
- 1298                          .size   CyXTAL_32KHZ_Stop, .-CyXTAL_32KHZ_Stop\r
- 1299                          .section        .text.CyXTAL_32KHZ_ReadStatus,"ax",%progbits\r
- 1300                          .align  1\r
- 1301                          .global CyXTAL_32KHZ_ReadStatus\r
- 1302                          .thumb\r
- 1303                          .thumb_func\r
- 1304                          .type   CyXTAL_32KHZ_ReadStatus, %function\r
- 1305                  CyXTAL_32KHZ_ReadStatus:\r
- 1306                  .LFB27:\r
-1224:.\Generated_Source\PSoC5/CyLib.c **** \r
-1225:.\Generated_Source\PSoC5/CyLib.c ****     #if(CY_PSOC3)\r
-1226:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG &= ((uint8)(~CY_CLK_XTAL32_CR_PDBEN));\r
-1227:.\Generated_Source\PSoC5/CyLib.c ****     #endif  /* (CY_PSOC3) */\r
-1228:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1229:.\Generated_Source\PSoC5/CyLib.c **** \r
-1230:.\Generated_Source\PSoC5/CyLib.c **** \r
-1231:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1232:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_32KHZ_ReadStatus\r
-1233:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1234:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1235:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1236:.\Generated_Source\PSoC5/CyLib.c **** *  Returns status of the 32 KHz oscillator.\r
-1237:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1238:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1239:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1240:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1241:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1242:.\Generated_Source\PSoC5/CyLib.c **** *  Value     Define                    Source\r
-1243:.\Generated_Source\PSoC5/CyLib.c **** *  20        CY_XTAL32K_ANA_STAT       Analog measurement\r
-1244:.\Generated_Source\PSoC5/CyLib.c **** *                                       1: Stable\r
-1245:.\Generated_Source\PSoC5/CyLib.c **** *                                       0: Not stable\r
-1246:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1247:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1248:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyXTAL_32KHZ_ReadStatus(void) \r
-1249:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1307                          .loc 1 1249 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 48\r
-\r
-\r
- 1308                          .cfi_startproc\r
- 1309                          @ args = 0, pretend = 0, frame = 0\r
- 1310                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1311                          @ link register save eliminated.\r
-1250:.\Generated_Source\PSoC5/CyLib.c ****     return(CY_CLK_XTAL32_CR_REG & CY_XTAL32K_ANA_STAT);\r
- 1312                          .loc 1 1250 0\r
- 1313 0000 024B                ldr     r3, .L164\r
- 1314 0002 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-1251:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1315                          .loc 1 1251 0\r
- 1316 0004 00F02000            and     r0, r0, #32\r
- 1317 0008 7047                bx      lr\r
- 1318                  .L165:\r
- 1319 000a 00BF                .align  2\r
- 1320                  .L164:\r
- 1321 000c 08430040            .word   1073758984\r
- 1322                          .cfi_endproc\r
- 1323                  .LFE27:\r
- 1324                          .size   CyXTAL_32KHZ_ReadStatus, .-CyXTAL_32KHZ_ReadStatus\r
- 1325                          .section        .text.CyXTAL_Start,"ax",%progbits\r
- 1326                          .align  1\r
- 1327                          .global CyXTAL_Start\r
- 1328                          .thumb\r
- 1329                          .thumb_func\r
- 1330                          .type   CyXTAL_Start, %function\r
- 1331                  CyXTAL_Start:\r
- 1332                  .LFB29:\r
-1252:.\Generated_Source\PSoC5/CyLib.c **** \r
-1253:.\Generated_Source\PSoC5/CyLib.c **** \r
-1254:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1255:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_32KHZ_SetPowerMode\r
-1256:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1257:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1258:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1259:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the power mode for the 32 KHz oscillator used during sleep mode.\r
-1260:.\Generated_Source\PSoC5/CyLib.c **** *  Allows for lower power during sleep when there are fewer sources of noise.\r
-1261:.\Generated_Source\PSoC5/CyLib.c **** *  During active mode the oscillator is always run in high power mode.\r
-1262:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1263:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1264:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 mode\r
-1265:.\Generated_Source\PSoC5/CyLib.c **** *       0: High power mode\r
-1266:.\Generated_Source\PSoC5/CyLib.c **** *       1: Low power mode during sleep\r
-1267:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1268:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1269:.\Generated_Source\PSoC5/CyLib.c **** *  Previous power mode.\r
-1270:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1271:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1272:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyXTAL_32KHZ_SetPowerMode(uint8 mode) \r
-1273:.\Generated_Source\PSoC5/CyLib.c **** {\r
-1274:.\Generated_Source\PSoC5/CyLib.c ****     uint8 state = (0u != (CY_CLK_XTAL32_CR_REG & CY_CLK_XTAL32_CR_LPM)) ? 1u : 0u;\r
-1275:.\Generated_Source\PSoC5/CyLib.c **** \r
-1276:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
-1277:.\Generated_Source\PSoC5/CyLib.c **** \r
-1278:.\Generated_Source\PSoC5/CyLib.c ****     if(1u == mode)\r
-1279:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1280:.\Generated_Source\PSoC5/CyLib.c ****         /* Low power mode during Sleep */\r
-1281:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_LOW_POWER;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 49\r
-\r
-\r
-1282:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(10u);\r
-1283:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-1284:.\Generated_Source\PSoC5/CyLib.c ****                                 CY_CLK_XTAL32_CFG_LP_LOWPOWER;\r
-1285:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(20u);\r
-1286:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_LPM;\r
-1287:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1288:.\Generated_Source\PSoC5/CyLib.c ****     else\r
-1289:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1290:.\Generated_Source\PSoC5/CyLib.c ****         /* High power mode */\r
-1291:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_HIGH_POWER;\r
-1292:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(10u);\r
-1293:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-1294:.\Generated_Source\PSoC5/CyLib.c ****                                 CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-1295:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG &= ((uint8)(~CY_CLK_XTAL32_CR_LPM));\r
-1296:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1297:.\Generated_Source\PSoC5/CyLib.c **** \r
-1298:.\Generated_Source\PSoC5/CyLib.c ****     return(state);\r
-1299:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1300:.\Generated_Source\PSoC5/CyLib.c **** \r
-1301:.\Generated_Source\PSoC5/CyLib.c **** \r
-1302:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1303:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_Start\r
-1304:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1305:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1306:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1307:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the megahertz crystal.\r
-1308:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1309:.\Generated_Source\PSoC5/CyLib.c **** *  PSoC 3:\r
-1310:.\Generated_Source\PSoC5/CyLib.c **** *  Waits until the XERR bit is low (no error) for a millisecond or until the\r
-1311:.\Generated_Source\PSoC5/CyLib.c **** *  number of milliseconds specified by the wait parameter has expired.\r
-1312:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1313:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1314:.\Generated_Source\PSoC5/CyLib.c **** *   wait: Valid range [0-255].\r
-1315:.\Generated_Source\PSoC5/CyLib.c **** *   This is the timeout value in milliseconds.\r
-1316:.\Generated_Source\PSoC5/CyLib.c **** *   The appropriate value is crystal specific.\r
-1317:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1318:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1319:.\Generated_Source\PSoC5/CyLib.c **** *   CYRET_SUCCESS - Completed successfully\r
-1320:.\Generated_Source\PSoC5/CyLib.c **** *   CYRET_TIMEOUT - Timeout occurred without detecting a low value on XERR.\r
-1321:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1322:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects and Restrictions:\r
-1323:.\Generated_Source\PSoC5/CyLib.c **** *  If wait is enabled (non-zero wait). Uses the Fast Timewheel to time the wait.\r
-1324:.\Generated_Source\PSoC5/CyLib.c **** *  Any other use of the Fast Timewheel (FTW) will be stopped during the period\r
-1325:.\Generated_Source\PSoC5/CyLib.c **** *  of this function and then restored.\r
-1326:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1327:.\Generated_Source\PSoC5/CyLib.c **** *  Uses the 100KHz ILO.  If not enabled, this function will enable the 100KHz\r
-1328:.\Generated_Source\PSoC5/CyLib.c **** *  ILO for the period of this function. No changes to the setup of the ILO,\r
-1329:.\Generated_Source\PSoC5/CyLib.c **** *  Fast Timewheel, Central Timewheel or Once Per Second interrupt may be made\r
-1330:.\Generated_Source\PSoC5/CyLib.c **** *  by interrupt routines during the period of this function.\r
-1331:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1332:.\Generated_Source\PSoC5/CyLib.c **** *  The current operation of the ILO, Central Timewheel and Once Per Second\r
-1333:.\Generated_Source\PSoC5/CyLib.c **** *  interrupt are maintained during the operation of this function provided the\r
-1334:.\Generated_Source\PSoC5/CyLib.c **** *  reading of the Power Manager Interrupt Status Register is only done using the\r
-1335:.\Generated_Source\PSoC5/CyLib.c **** *  CyPmReadStatus() function.\r
-1336:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1337:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1338:.\Generated_Source\PSoC5/CyLib.c **** cystatus CyXTAL_Start(uint8 wait) \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 50\r
-\r
-\r
-1339:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1333                          .loc 1 1339 0\r
- 1334                          .cfi_startproc\r
- 1335                          @ args = 0, pretend = 0, frame = 8\r
- 1336                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1337                  .LVL80:\r
- 1338 0000 F7B5                push    {r0, r1, r2, r4, r5, r6, r7, lr}\r
- 1339                  .LCFI4:\r
- 1340                          .cfi_def_cfa_offset 32\r
- 1341                          .cfi_offset 0, -32\r
- 1342                          .cfi_offset 1, -28\r
- 1343                          .cfi_offset 2, -24\r
- 1344                          .cfi_offset 4, -20\r
- 1345                          .cfi_offset 5, -16\r
- 1346                          .cfi_offset 6, -12\r
- 1347                          .cfi_offset 7, -8\r
- 1348                          .cfi_offset 14, -4\r
-1340:.\Generated_Source\PSoC5/CyLib.c ****     cystatus status = CYRET_SUCCESS;\r
-1341:.\Generated_Source\PSoC5/CyLib.c ****     volatile uint8  timeout = wait;\r
-1342:.\Generated_Source\PSoC5/CyLib.c ****     volatile uint8 count;\r
-1343:.\Generated_Source\PSoC5/CyLib.c ****     uint8 iloEnableState;\r
-1344:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmTwCfg0Tmp;\r
-1345:.\Generated_Source\PSoC5/CyLib.c ****     uint8 pmTwCfg2Tmp;\r
-1346:.\Generated_Source\PSoC5/CyLib.c **** \r
-1347:.\Generated_Source\PSoC5/CyLib.c **** \r
-1348:.\Generated_Source\PSoC5/CyLib.c ****     /* Enables the MHz crystal oscillator circuit  */\r
-1349:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_ENABLE;\r
- 1349                          .loc 1 1349 0\r
- 1350 0002 1F4B                ldr     r3, .L184\r
-1341:.\Generated_Source\PSoC5/CyLib.c ****     volatile uint8  timeout = wait;\r
- 1351                          .loc 1 1341 0\r
- 1352 0004 8DF80600            strb    r0, [sp, #6]\r
- 1353                  .LVL81:\r
- 1354                          .loc 1 1349 0\r
- 1355 0008 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1356 000a 42F00101            orr     r1, r2, #1\r
- 1357 000e 1970                strb    r1, [r3, #0]\r
-1350:.\Generated_Source\PSoC5/CyLib.c **** \r
-1351:.\Generated_Source\PSoC5/CyLib.c **** \r
-1352:.\Generated_Source\PSoC5/CyLib.c ****     if(wait > 0u)\r
- 1358                          .loc 1 1352 0\r
- 1359 0010 98B3                cbz     r0, .L174\r
-1353:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1354:.\Generated_Source\PSoC5/CyLib.c ****         /* Save 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-1355:.\Generated_Source\PSoC5/CyLib.c ****         iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG;\r
-1356:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg0Tmp = CY_LIB_PM_TW_CFG0_REG;\r
-1357:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg2Tmp = CY_LIB_PM_TW_CFG2_REG;\r
-1358:.\Generated_Source\PSoC5/CyLib.c **** \r
-1359:.\Generated_Source\PSoC5/CyLib.c ****         /* Set 250 us interval */\r
-1360:.\Generated_Source\PSoC5/CyLib.c ****         CyPmFtwSetInterval(CY_CLK_XMHZ_FTW_INTERVAL);\r
- 1360                          .loc 1 1360 0\r
- 1361 0012 1820                movs    r0, #24\r
- 1362                  .LVL82:\r
-1355:.\Generated_Source\PSoC5/CyLib.c ****         iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG;\r
- 1363                          .loc 1 1355 0\r
- 1364 0014 93F8F070            ldrb    r7, [r3, #240]  @ zero_extendqisi2\r
- 1365                  .LVL83:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 51\r
-\r
-\r
-1356:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg0Tmp = CY_LIB_PM_TW_CFG0_REG;\r
- 1366                          .loc 1 1356 0\r
- 1367 0018 93F87061            ldrb    r6, [r3, #368]  @ zero_extendqisi2\r
- 1368                  .LVL84:\r
-1357:.\Generated_Source\PSoC5/CyLib.c ****         pmTwCfg2Tmp = CY_LIB_PM_TW_CFG2_REG;\r
- 1369                          .loc 1 1357 0\r
- 1370 001c 93F87251            ldrb    r5, [r3, #370]  @ zero_extendqisi2\r
- 1371                  .LVL85:\r
- 1372                          .loc 1 1360 0\r
- 1373 0020 FFF7FEFF            bl      CyPmFtwSetInterval\r
- 1374                  .LVL86:\r
- 1375                  .L168:\r
-1361:.\Generated_Source\PSoC5/CyLib.c ****         status = CYRET_TIMEOUT;\r
-1362:.\Generated_Source\PSoC5/CyLib.c **** \r
-1363:.\Generated_Source\PSoC5/CyLib.c **** \r
-1364:.\Generated_Source\PSoC5/CyLib.c ****         for( ; timeout > 0u; timeout--)\r
- 1376                          .loc 1 1364 0 discriminator 1\r
- 1377 0024 9DF80600            ldrb    r0, [sp, #6]    @ zero_extendqisi2\r
- 1378                  .LVL87:\r
- 1379 0028 E0B1                cbz     r0, .L182\r
- 1380                  .L172:\r
-1365:.\Generated_Source\PSoC5/CyLib.c ****         {\r
-1366:.\Generated_Source\PSoC5/CyLib.c ****             /* Read XERR bit to clear it */\r
-1367:.\Generated_Source\PSoC5/CyLib.c ****             (void) CY_CLK_XMHZ_CSR_REG;\r
- 1381                          .loc 1 1367 0\r
- 1382 002a 154C                ldr     r4, .L184\r
-1368:.\Generated_Source\PSoC5/CyLib.c **** \r
-1369:.\Generated_Source\PSoC5/CyLib.c ****             /* Wait for a millisecond - 4 x 250 us */\r
-1370:.\Generated_Source\PSoC5/CyLib.c ****             for(count = 4u; count > 0u; count--)\r
- 1383                          .loc 1 1370 0\r
- 1384 002c 0420                movs    r0, #4\r
- 1385                  .LVL88:\r
-1367:.\Generated_Source\PSoC5/CyLib.c ****             (void) CY_CLK_XMHZ_CSR_REG;\r
- 1386                          .loc 1 1367 0\r
- 1387 002e 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1388                  .L181:\r
- 1389                  .LVL89:\r
- 1390                          .loc 1 1370 0\r
- 1391 0030 8DF80700            strb    r0, [sp, #7]\r
- 1392 0034 9DF80740            ldrb    r4, [sp, #7]    @ zero_extendqisi2\r
- 1393                  .LVL90:\r
- 1394 0038 4CB1                cbz     r4, .L183\r
- 1395                  .LVL91:\r
- 1396                  .L178:\r
-1371:.\Generated_Source\PSoC5/CyLib.c ****             {\r
-1372:.\Generated_Source\PSoC5/CyLib.c ****                 while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
- 1397                          .loc 1 1372 0\r
- 1398 003a 0120                movs    r0, #1\r
- 1399 003c FFF7FEFF            bl      CyPmReadStatus\r
- 1400                  .LVL92:\r
- 1401 0040 C007                lsls    r0, r0, #31\r
- 1402 0042 FAD5                bpl     .L178\r
-1370:.\Generated_Source\PSoC5/CyLib.c ****             for(count = 4u; count > 0u; count--)\r
- 1403                          .loc 1 1370 0\r
- 1404 0044 9DF80720            ldrb    r2, [sp, #7]    @ zero_extendqisi2\r
- 1405                  .LVL93:\r
- 1406 0048 511E                subs    r1, r2, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 52\r
-\r
-\r
- 1407 004a C8B2                uxtb    r0, r1\r
- 1408                  .LVL94:\r
- 1409 004c F0E7                b       .L181\r
- 1410                  .L183:\r
-1373:.\Generated_Source\PSoC5/CyLib.c ****                 {\r
-1374:.\Generated_Source\PSoC5/CyLib.c ****                     /* Wait for the FTW interrupt event */\r
-1375:.\Generated_Source\PSoC5/CyLib.c ****                 }\r
-1376:.\Generated_Source\PSoC5/CyLib.c ****             }\r
-1377:.\Generated_Source\PSoC5/CyLib.c **** \r
-1378:.\Generated_Source\PSoC5/CyLib.c **** \r
-1379:.\Generated_Source\PSoC5/CyLib.c ****             /*******************************************************************\r
-1380:.\Generated_Source\PSoC5/CyLib.c ****             * High output indicates oscillator failure.\r
-1381:.\Generated_Source\PSoC5/CyLib.c ****             * Only can be used after start-up interval (1 ms) is completed.\r
-1382:.\Generated_Source\PSoC5/CyLib.c ****             *******************************************************************/\r
-1383:.\Generated_Source\PSoC5/CyLib.c ****             if(0u == (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR))\r
- 1411                          .loc 1 1383 0\r
- 1412 004e 0C4B                ldr     r3, .L184\r
- 1413 0050 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1414 0052 1106                lsls    r1, r2, #24\r
- 1415 0054 07D5                bpl     .L171\r
-1364:.\Generated_Source\PSoC5/CyLib.c ****         for( ; timeout > 0u; timeout--)\r
- 1416                          .loc 1 1364 0\r
- 1417 0056 9DF80610            ldrb    r1, [sp, #6]    @ zero_extendqisi2\r
- 1418                  .LVL95:\r
- 1419 005a 481E                subs    r0, r1, #1\r
- 1420 005c C4B2                uxtb    r4, r0\r
- 1421                  .LVL96:\r
- 1422 005e 8DF80640            strb    r4, [sp, #6]\r
- 1423 0062 DFE7                b       .L168\r
- 1424                  .LVL97:\r
- 1425                  .L182:\r
-1361:.\Generated_Source\PSoC5/CyLib.c ****         status = CYRET_TIMEOUT;\r
- 1426                          .loc 1 1361 0\r
- 1427 0064 1024                movs    r4, #16\r
- 1428                  .L171:\r
- 1429                  .LVL98:\r
-1384:.\Generated_Source\PSoC5/CyLib.c ****             {\r
-1385:.\Generated_Source\PSoC5/CyLib.c ****                 status = CYRET_SUCCESS;\r
-1386:.\Generated_Source\PSoC5/CyLib.c ****                 break;\r
-1387:.\Generated_Source\PSoC5/CyLib.c ****             }\r
-1388:.\Generated_Source\PSoC5/CyLib.c ****         }\r
-1389:.\Generated_Source\PSoC5/CyLib.c **** \r
-1390:.\Generated_Source\PSoC5/CyLib.c **** \r
-1391:.\Generated_Source\PSoC5/CyLib.c ****         /* Restore 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-1392:.\Generated_Source\PSoC5/CyLib.c ****         if(0u == (iloEnableState & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ))\r
- 1430                          .loc 1 1392 0\r
- 1431 0066 07F00407            and     r7, r7, #4\r
- 1432                  .LVL99:\r
- 1433 006a FFB2                uxtb    r7, r7\r
- 1434 006c 0FB9                cbnz    r7, .L173\r
-1393:.\Generated_Source\PSoC5/CyLib.c ****         {\r
-1394:.\Generated_Source\PSoC5/CyLib.c ****             CyILO_Stop100K();\r
- 1435                          .loc 1 1394 0\r
- 1436 006e FFF7FEFF            bl      CyILO_Stop100K\r
- 1437                  .LVL100:\r
- 1438                  .L173:\r
-1395:.\Generated_Source\PSoC5/CyLib.c ****         }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 53\r
-\r
-\r
-1396:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG0_REG = pmTwCfg0Tmp;\r
- 1439                          .loc 1 1396 0\r
- 1440 0072 044B                ldr     r3, .L184+4\r
- 1441 0074 1E70                strb    r6, [r3, #0]\r
-1397:.\Generated_Source\PSoC5/CyLib.c ****         CY_LIB_PM_TW_CFG2_REG = pmTwCfg2Tmp;\r
- 1442                          .loc 1 1397 0\r
- 1443 0076 9D70                strb    r5, [r3, #2]\r
- 1444 0078 00E0                b       .L167\r
- 1445                  .LVL101:\r
- 1446                  .L174:\r
-1340:.\Generated_Source\PSoC5/CyLib.c ****     cystatus status = CYRET_SUCCESS;\r
- 1447                          .loc 1 1340 0\r
- 1448 007a 0446                mov     r4, r0\r
- 1449                  .LVL102:\r
- 1450                  .L167:\r
-1398:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1399:.\Generated_Source\PSoC5/CyLib.c **** \r
-1400:.\Generated_Source\PSoC5/CyLib.c ****     return(status);\r
-1401:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1451                          .loc 1 1401 0\r
- 1452 007c 2046                mov     r0, r4\r
- 1453                  .LVL103:\r
- 1454 007e FEBD                pop     {r1, r2, r3, r4, r5, r6, r7, pc}\r
- 1455                  .L185:\r
- 1456                          .align  2\r
- 1457                  .L184:\r
- 1458 0080 10420040            .word   1073758736\r
- 1459 0084 80430040            .word   1073759104\r
- 1460                          .cfi_endproc\r
- 1461                  .LFE29:\r
- 1462                          .size   CyXTAL_Start, .-CyXTAL_Start\r
- 1463                          .section        .text.CyXTAL_Stop,"ax",%progbits\r
- 1464                          .align  1\r
- 1465                          .global CyXTAL_Stop\r
- 1466                          .thumb\r
- 1467                          .thumb_func\r
- 1468                          .type   CyXTAL_Stop, %function\r
- 1469                  CyXTAL_Stop:\r
- 1470                  .LFB30:\r
-1402:.\Generated_Source\PSoC5/CyLib.c **** \r
-1403:.\Generated_Source\PSoC5/CyLib.c **** \r
-1404:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1405:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_Stop\r
-1406:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1407:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1408:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1409:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the megahertz crystal oscillator.\r
-1410:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1411:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1412:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1413:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1414:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1415:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1416:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1417:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1418:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_Stop(void) \r
-1419:.\Generated_Source\PSoC5/CyLib.c **** {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 54\r
-\r
-\r
- 1471                          .loc 1 1419 0\r
- 1472                          .cfi_startproc\r
- 1473                          @ args = 0, pretend = 0, frame = 0\r
- 1474                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1475                          @ link register save eliminated.\r
-1420:.\Generated_Source\PSoC5/CyLib.c ****     /* Disable the the oscillator. */\r
-1421:.\Generated_Source\PSoC5/CyLib.c ****     FASTCLK_XMHZ_CSR &= ((uint8)(~XMHZ_CONTROL_ENABLE));\r
- 1476                          .loc 1 1421 0\r
- 1477 0000 024B                ldr     r3, .L187\r
- 1478 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1479 0004 02F0FE00            and     r0, r2, #254\r
- 1480 0008 1870                strb    r0, [r3, #0]\r
- 1481 000a 7047                bx      lr\r
- 1482                  .L188:\r
- 1483                          .align  2\r
- 1484                  .L187:\r
- 1485 000c 10420040            .word   1073758736\r
- 1486                          .cfi_endproc\r
- 1487                  .LFE30:\r
- 1488                          .size   CyXTAL_Stop, .-CyXTAL_Stop\r
- 1489                          .section        .text.CyXTAL_EnableErrStatus,"ax",%progbits\r
- 1490                          .align  1\r
- 1491                          .global CyXTAL_EnableErrStatus\r
- 1492                          .thumb\r
- 1493                          .thumb_func\r
- 1494                          .type   CyXTAL_EnableErrStatus, %function\r
- 1495                  CyXTAL_EnableErrStatus:\r
- 1496                  .LFB31:\r
-1422:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1423:.\Generated_Source\PSoC5/CyLib.c **** \r
-1424:.\Generated_Source\PSoC5/CyLib.c **** \r
-1425:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1426:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_EnableErrStatus\r
-1427:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1428:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1429:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1430:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the generation of the XERR status bit for the megahertz crystal.\r
-1431:.\Generated_Source\PSoC5/CyLib.c **** *  This function is not available for PSoC5.\r
-1432:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1433:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1434:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1435:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1436:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1437:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1438:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1439:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1440:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_EnableErrStatus(void) \r
-1441:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1497                          .loc 1 1441 0\r
- 1498                          .cfi_startproc\r
- 1499                          @ args = 0, pretend = 0, frame = 0\r
- 1500                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1501                          @ link register save eliminated.\r
-1442:.\Generated_Source\PSoC5/CyLib.c ****     /* If oscillator has insufficient amplitude, XERR bit will be high. */\r
-1443:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CSR_REG &= ((uint8)(~CY_CLK_XMHZ_CSR_XFB));\r
- 1502                          .loc 1 1443 0\r
- 1503 0000 024B                ldr     r3, .L190\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 55\r
-\r
-\r
- 1504 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1505 0004 02F0FB00            and     r0, r2, #251\r
- 1506 0008 1870                strb    r0, [r3, #0]\r
- 1507 000a 7047                bx      lr\r
- 1508                  .L191:\r
- 1509                          .align  2\r
- 1510                  .L190:\r
- 1511 000c 10420040            .word   1073758736\r
- 1512                          .cfi_endproc\r
- 1513                  .LFE31:\r
- 1514                          .size   CyXTAL_EnableErrStatus, .-CyXTAL_EnableErrStatus\r
- 1515                          .section        .text.CyXTAL_DisableErrStatus,"ax",%progbits\r
- 1516                          .align  1\r
- 1517                          .global CyXTAL_DisableErrStatus\r
- 1518                          .thumb\r
- 1519                          .thumb_func\r
- 1520                          .type   CyXTAL_DisableErrStatus, %function\r
- 1521                  CyXTAL_DisableErrStatus:\r
- 1522                  .LFB32:\r
-1444:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1445:.\Generated_Source\PSoC5/CyLib.c **** \r
-1446:.\Generated_Source\PSoC5/CyLib.c **** \r
-1447:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1448:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_DisableErrStatus\r
-1449:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1450:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1451:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1452:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the generation of the XERR status bit for the megahertz crystal.\r
-1453:.\Generated_Source\PSoC5/CyLib.c **** *  This function is not available for PSoC5.\r
-1454:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1455:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1456:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1457:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1458:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1459:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1460:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1461:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1462:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_DisableErrStatus(void) \r
-1463:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1523                          .loc 1 1463 0\r
- 1524                          .cfi_startproc\r
- 1525                          @ args = 0, pretend = 0, frame = 0\r
- 1526                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1527                          @ link register save eliminated.\r
-1464:.\Generated_Source\PSoC5/CyLib.c ****     /* If oscillator has insufficient amplitude, XERR bit will be high. */\r
-1465:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_XFB;\r
- 1528                          .loc 1 1465 0\r
- 1529 0000 024B                ldr     r3, .L193\r
- 1530 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1531 0004 42F00400            orr     r0, r2, #4\r
- 1532 0008 1870                strb    r0, [r3, #0]\r
- 1533 000a 7047                bx      lr\r
- 1534                  .L194:\r
- 1535                          .align  2\r
- 1536                  .L193:\r
- 1537 000c 10420040            .word   1073758736\r
- 1538                          .cfi_endproc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 56\r
-\r
-\r
- 1539                  .LFE32:\r
- 1540                          .size   CyXTAL_DisableErrStatus, .-CyXTAL_DisableErrStatus\r
- 1541                          .section        .text.CyXTAL_ReadStatus,"ax",%progbits\r
- 1542                          .align  1\r
- 1543                          .global CyXTAL_ReadStatus\r
- 1544                          .thumb\r
- 1545                          .thumb_func\r
- 1546                          .type   CyXTAL_ReadStatus, %function\r
- 1547                  CyXTAL_ReadStatus:\r
- 1548                  .LFB33:\r
-1466:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1467:.\Generated_Source\PSoC5/CyLib.c **** \r
-1468:.\Generated_Source\PSoC5/CyLib.c **** \r
-1469:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1470:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_ReadStatus\r
-1471:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1472:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1473:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1474:.\Generated_Source\PSoC5/CyLib.c **** *  Reads the XERR status bit for the megahertz crystal. This status bit is a\r
-1475:.\Generated_Source\PSoC5/CyLib.c **** *  sticky clear on read value. This function is not available for PSoC5.\r
-1476:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1477:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1478:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1479:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1480:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1481:.\Generated_Source\PSoC5/CyLib.c **** *   Status\r
-1482:.\Generated_Source\PSoC5/CyLib.c **** *    0: No error\r
-1483:.\Generated_Source\PSoC5/CyLib.c **** *    1: Error\r
-1484:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1485:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1486:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyXTAL_ReadStatus(void) \r
-1487:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1549                          .loc 1 1487 0\r
- 1550                          .cfi_startproc\r
- 1551                          @ args = 0, pretend = 0, frame = 0\r
- 1552                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1553                          @ link register save eliminated.\r
-1488:.\Generated_Source\PSoC5/CyLib.c ****     /***************************************************************************\r
-1489:.\Generated_Source\PSoC5/CyLib.c ****     * High output indicates oscillator failure. Only use this after start-up\r
-1490:.\Generated_Source\PSoC5/CyLib.c ****     * interval is completed. This can be used for status and failure recovery.\r
-1491:.\Generated_Source\PSoC5/CyLib.c ****     ***************************************************************************/\r
-1492:.\Generated_Source\PSoC5/CyLib.c ****     return((0u != (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR)) ? 1u : 0u);\r
- 1554                          .loc 1 1492 0\r
- 1555 0000 014B                ldr     r3, .L196\r
- 1556 0002 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-1493:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1557                          .loc 1 1493 0\r
- 1558 0004 C009                lsrs    r0, r0, #7\r
- 1559 0006 7047                bx      lr\r
- 1560                  .L197:\r
- 1561                          .align  2\r
- 1562                  .L196:\r
- 1563 0008 10420040            .word   1073758736\r
- 1564                          .cfi_endproc\r
- 1565                  .LFE33:\r
- 1566                          .size   CyXTAL_ReadStatus, .-CyXTAL_ReadStatus\r
- 1567                          .section        .text.CyXTAL_EnableFaultRecovery,"ax",%progbits\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 57\r
-\r
-\r
- 1568                          .align  1\r
- 1569                          .global CyXTAL_EnableFaultRecovery\r
- 1570                          .thumb\r
- 1571                          .thumb_func\r
- 1572                          .type   CyXTAL_EnableFaultRecovery, %function\r
- 1573                  CyXTAL_EnableFaultRecovery:\r
- 1574                  .LFB34:\r
-1494:.\Generated_Source\PSoC5/CyLib.c **** \r
-1495:.\Generated_Source\PSoC5/CyLib.c **** \r
-1496:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1497:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_EnableFaultRecovery\r
-1498:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1499:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1500:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1501:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the fault recovery circuit which will switch to the IMO in the case\r
-1502:.\Generated_Source\PSoC5/CyLib.c **** *  of a fault in the megahertz crystal circuit. The crystal must be up and\r
-1503:.\Generated_Source\PSoC5/CyLib.c **** *  running with the XERR bit at 0, before calling this function to prevent\r
-1504:.\Generated_Source\PSoC5/CyLib.c **** *  immediate fault switchover. This function is not available for PSoC5.\r
-1505:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1506:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1507:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1508:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1509:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1510:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1511:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1512:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1513:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_EnableFaultRecovery(void) \r
-1514:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1575                          .loc 1 1514 0\r
- 1576                          .cfi_startproc\r
- 1577                          @ args = 0, pretend = 0, frame = 0\r
- 1578                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1579                          @ link register save eliminated.\r
-1515:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_XPROT;\r
- 1580                          .loc 1 1515 0\r
- 1581 0000 024B                ldr     r3, .L199\r
- 1582 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1583 0004 42F04000            orr     r0, r2, #64\r
- 1584 0008 1870                strb    r0, [r3, #0]\r
- 1585 000a 7047                bx      lr\r
- 1586                  .L200:\r
- 1587                          .align  2\r
- 1588                  .L199:\r
- 1589 000c 10420040            .word   1073758736\r
- 1590                          .cfi_endproc\r
- 1591                  .LFE34:\r
- 1592                          .size   CyXTAL_EnableFaultRecovery, .-CyXTAL_EnableFaultRecovery\r
- 1593                          .section        .text.CyXTAL_DisableFaultRecovery,"ax",%progbits\r
- 1594                          .align  1\r
- 1595                          .global CyXTAL_DisableFaultRecovery\r
- 1596                          .thumb\r
- 1597                          .thumb_func\r
- 1598                          .type   CyXTAL_DisableFaultRecovery, %function\r
- 1599                  CyXTAL_DisableFaultRecovery:\r
- 1600                  .LFB35:\r
-1516:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1517:.\Generated_Source\PSoC5/CyLib.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 58\r
-\r
-\r
-1518:.\Generated_Source\PSoC5/CyLib.c **** \r
-1519:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1520:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_DisableFaultRecovery\r
-1521:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1522:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1523:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1524:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the fault recovery circuit which will switch to the IMO in the case\r
-1525:.\Generated_Source\PSoC5/CyLib.c **** *  of a fault in the megahertz crystal circuit. This function is not available\r
-1526:.\Generated_Source\PSoC5/CyLib.c **** *  for PSoC5.\r
-1527:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1528:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1529:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1530:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1531:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1532:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1533:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1534:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1535:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_DisableFaultRecovery(void) \r
-1536:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1601                          .loc 1 1536 0\r
- 1602                          .cfi_startproc\r
- 1603                          @ args = 0, pretend = 0, frame = 0\r
- 1604                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1605                          @ link register save eliminated.\r
-1537:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CSR_REG &= ((uint8)(~CY_CLK_XMHZ_CSR_XPROT));\r
- 1606                          .loc 1 1537 0\r
- 1607 0000 024B                ldr     r3, .L202\r
- 1608 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1609 0004 02F0BF00            and     r0, r2, #191\r
- 1610 0008 1870                strb    r0, [r3, #0]\r
- 1611 000a 7047                bx      lr\r
- 1612                  .L203:\r
- 1613                          .align  2\r
- 1614                  .L202:\r
- 1615 000c 10420040            .word   1073758736\r
- 1616                          .cfi_endproc\r
- 1617                  .LFE35:\r
- 1618                          .size   CyXTAL_DisableFaultRecovery, .-CyXTAL_DisableFaultRecovery\r
- 1619                          .section        .text.CyXTAL_SetStartup,"ax",%progbits\r
- 1620                          .align  1\r
- 1621                          .global CyXTAL_SetStartup\r
- 1622                          .thumb\r
- 1623                          .thumb_func\r
- 1624                          .type   CyXTAL_SetStartup, %function\r
- 1625                  CyXTAL_SetStartup:\r
- 1626                  .LFB36:\r
-1538:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1539:.\Generated_Source\PSoC5/CyLib.c **** \r
-1540:.\Generated_Source\PSoC5/CyLib.c **** \r
-1541:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1542:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_SetStartup\r
-1543:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1544:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1545:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1546:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the startup settings for the crystal. Logic model outputs a frequency\r
-1547:.\Generated_Source\PSoC5/CyLib.c **** *  (setting + 4) MHz when enabled.\r
-1548:.\Generated_Source\PSoC5/CyLib.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 59\r
-\r
-\r
-1549:.\Generated_Source\PSoC5/CyLib.c **** *  This is artificial as the actual frequency is determined by an attached\r
-1550:.\Generated_Source\PSoC5/CyLib.c **** *  external crystal.\r
-1551:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1552:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1553:.\Generated_Source\PSoC5/CyLib.c **** *  setting: Valid range [0-31].\r
-1554:.\Generated_Source\PSoC5/CyLib.c **** *   Value is dependent on the frequency and quality of the crystal being used.\r
-1555:.\Generated_Source\PSoC5/CyLib.c **** *   Refer to the device TRM and datasheet for more information.\r
-1556:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1557:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1558:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1559:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1560:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1561:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_SetStartup(uint8 setting) \r
-1562:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1627                          .loc 1 1562 0\r
- 1628                          .cfi_startproc\r
- 1629                          @ args = 0, pretend = 0, frame = 0\r
- 1630                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1631                          @ link register save eliminated.\r
- 1632                  .LVL104:\r
-1563:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CFG0_REG = (CY_CLK_XMHZ_CFG0_REG & ((uint8)(~CY_CLK_XMHZ_CFG0_XCFG_MASK))) |\r
- 1633                          .loc 1 1563 0\r
- 1634 0000 044B                ldr     r3, .L205\r
- 1635 0002 00F01F00            and     r0, r0, #31\r
- 1636                  .LVL105:\r
- 1637 0006 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1638 0008 02F0E001            and     r1, r2, #224\r
- 1639 000c 40EA0102            orr     r2, r0, r1\r
- 1640 0010 1A70                strb    r2, [r3, #0]\r
- 1641 0012 7047                bx      lr\r
- 1642                  .L206:\r
- 1643                          .align  2\r
- 1644                  .L205:\r
- 1645 0014 12420040            .word   1073758738\r
- 1646                          .cfi_endproc\r
- 1647                  .LFE36:\r
- 1648                          .size   CyXTAL_SetStartup, .-CyXTAL_SetStartup\r
- 1649                          .section        .text.CyXTAL_SetFbVoltage,"ax",%progbits\r
- 1650                          .align  1\r
- 1651                          .global CyXTAL_SetFbVoltage\r
- 1652                          .thumb\r
- 1653                          .thumb_func\r
- 1654                          .type   CyXTAL_SetFbVoltage, %function\r
- 1655                  CyXTAL_SetFbVoltage:\r
- 1656                  .LFB37:\r
-1564:.\Generated_Source\PSoC5/CyLib.c ****                            (setting & CY_CLK_XMHZ_CFG0_XCFG_MASK);\r
-1565:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1566:.\Generated_Source\PSoC5/CyLib.c **** \r
-1567:.\Generated_Source\PSoC5/CyLib.c **** \r
-1568:.\Generated_Source\PSoC5/CyLib.c **** \r
-1569:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1570:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_SetFbVoltage\r
-1571:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1572:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1573:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1574:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the feedback reference voltage to use for the crystal circuit.\r
-1575:.\Generated_Source\PSoC5/CyLib.c **** *  This function is only available for PSoC3 and PSoC 5LP.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 60\r
-\r
-\r
-1576:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1577:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1578:.\Generated_Source\PSoC5/CyLib.c **** *  setting: Valid range [0-15].\r
-1579:.\Generated_Source\PSoC5/CyLib.c **** *  Refer to the device TRM and datasheet for more information.\r
-1580:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1581:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1582:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1583:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1584:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1585:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_SetFbVoltage(uint8 setting) \r
-1586:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1657                          .loc 1 1586 0\r
- 1658                          .cfi_startproc\r
- 1659                          @ args = 0, pretend = 0, frame = 0\r
- 1660                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1661                          @ link register save eliminated.\r
- 1662                  .LVL106:\r
-1587:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CFG1_REG = ((CY_CLK_XMHZ_CFG1_REG & ((uint8)(~CY_CLK_XMHZ_CFG1_VREF_FB_MASK))) |\r
- 1663                          .loc 1 1587 0\r
- 1664 0000 044B                ldr     r3, .L208\r
- 1665 0002 00F00F00            and     r0, r0, #15\r
- 1666                  .LVL107:\r
- 1667 0006 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1668 0008 02F0F001            and     r1, r2, #240\r
- 1669 000c 40EA0102            orr     r2, r0, r1\r
- 1670 0010 1A70                strb    r2, [r3, #0]\r
- 1671 0012 7047                bx      lr\r
- 1672                  .L209:\r
- 1673                          .align  2\r
- 1674                  .L208:\r
- 1675 0014 13420040            .word   1073758739\r
- 1676                          .cfi_endproc\r
- 1677                  .LFE37:\r
- 1678                          .size   CyXTAL_SetFbVoltage, .-CyXTAL_SetFbVoltage\r
- 1679                          .section        .text.CyXTAL_SetWdVoltage,"ax",%progbits\r
- 1680                          .align  1\r
- 1681                          .global CyXTAL_SetWdVoltage\r
- 1682                          .thumb\r
- 1683                          .thumb_func\r
- 1684                          .type   CyXTAL_SetWdVoltage, %function\r
- 1685                  CyXTAL_SetWdVoltage:\r
- 1686                  .LFB38:\r
-1588:.\Generated_Source\PSoC5/CyLib.c ****                             (setting & CY_CLK_XMHZ_CFG1_VREF_FB_MASK));\r
-1589:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1590:.\Generated_Source\PSoC5/CyLib.c **** \r
-1591:.\Generated_Source\PSoC5/CyLib.c **** \r
-1592:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1593:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyXTAL_SetWdVoltage\r
-1594:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1595:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1596:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1597:.\Generated_Source\PSoC5/CyLib.c **** *  Sets the reference voltage used by the watchdog to detect a failure in the\r
-1598:.\Generated_Source\PSoC5/CyLib.c **** *  crystal circuit. This function is only available for PSoC3 and PSoC 5LP.\r
-1599:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1600:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1601:.\Generated_Source\PSoC5/CyLib.c **** *  setting: Valid range [0-7].\r
-1602:.\Generated_Source\PSoC5/CyLib.c **** *  Refer to the device TRM and datasheet for more information.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 61\r
-\r
-\r
-1603:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1604:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1605:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1606:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1607:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1608:.\Generated_Source\PSoC5/CyLib.c **** void CyXTAL_SetWdVoltage(uint8 setting) \r
-1609:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1687                          .loc 1 1609 0\r
- 1688                          .cfi_startproc\r
- 1689                          @ args = 0, pretend = 0, frame = 0\r
- 1690                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1691                          @ link register save eliminated.\r
- 1692                  .LVL108:\r
-1610:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CFG1_REG = ((CY_CLK_XMHZ_CFG1_REG & ((uint8)(~CY_CLK_XMHZ_CFG1_VREF_WD_MASK))) |\r
- 1693                          .loc 1 1610 0\r
- 1694 0000 054B                ldr     r3, .L211\r
-1611:.\Generated_Source\PSoC5/CyLib.c ****                             (((uint8)(setting << 4u)) & CY_CLK_XMHZ_CFG1_VREF_WD_MASK));\r
- 1695                          .loc 1 1611 0\r
- 1696 0002 0001                lsls    r0, r0, #4\r
- 1697                  .LVL109:\r
-1610:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XMHZ_CFG1_REG = ((CY_CLK_XMHZ_CFG1_REG & ((uint8)(~CY_CLK_XMHZ_CFG1_VREF_WD_MASK))) |\r
- 1698                          .loc 1 1610 0\r
- 1699 0004 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1700 0006 00F07001            and     r1, r0, #112\r
- 1701 000a 02F08F02            and     r2, r2, #143\r
- 1702 000e 41EA0200            orr     r0, r1, r2\r
- 1703 0012 1870                strb    r0, [r3, #0]\r
- 1704 0014 7047                bx      lr\r
- 1705                  .L212:\r
- 1706 0016 00BF                .align  2\r
- 1707                  .L211:\r
- 1708 0018 13420040            .word   1073758739\r
- 1709                          .cfi_endproc\r
- 1710                  .LFE38:\r
- 1711                          .size   CyXTAL_SetWdVoltage, .-CyXTAL_SetWdVoltage\r
- 1712                          .section        .text.CyHalt,"ax",%progbits\r
- 1713                          .align  1\r
- 1714                          .global CyHalt\r
- 1715                          .thumb\r
- 1716                          .thumb_func\r
- 1717                          .type   CyHalt, %function\r
- 1718                  CyHalt:\r
- 1719                  .LFB39:\r
-1612:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1613:.\Generated_Source\PSoC5/CyLib.c **** \r
-1614:.\Generated_Source\PSoC5/CyLib.c **** \r
-1615:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1616:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyHalt\r
-1617:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1618:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1619:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1620:.\Generated_Source\PSoC5/CyLib.c **** *  Halts the CPU.\r
-1621:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1622:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1623:.\Generated_Source\PSoC5/CyLib.c **** *  uint8 reason: Value to be used during debugging.\r
-1624:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1625:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 62\r
-\r
-\r
-1626:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1627:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1628:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1629:.\Generated_Source\PSoC5/CyLib.c **** void CyHalt(uint8 reason) CYREENTRANT\r
-1630:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1720                          .loc 1 1630 0\r
- 1721                          .cfi_startproc\r
- 1722                          @ args = 0, pretend = 0, frame = 0\r
- 1723                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1724                          @ link register save eliminated.\r
- 1725                  .LVL110:\r
-1631:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != reason)\r
-1632:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1633:.\Generated_Source\PSoC5/CyLib.c ****         /* To remove unreferenced local variable warning */\r
-1634:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1635:.\Generated_Source\PSoC5/CyLib.c **** \r
-1636:.\Generated_Source\PSoC5/CyLib.c ****     #if defined (__ARMCC_VERSION)\r
-1637:.\Generated_Source\PSoC5/CyLib.c ****         __breakpoint(0x0);\r
-1638:.\Generated_Source\PSoC5/CyLib.c ****     #elif defined(__GNUC__) || defined (__ICCARM__)\r
-1639:.\Generated_Source\PSoC5/CyLib.c ****         __asm("    bkpt    1");\r
- 1726                          .loc 1 1639 0\r
- 1727                  @ 1639 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 1728 0000 01BE                    bkpt    1\r
- 1729                  @ 0 "" 2\r
- 1730                          .thumb\r
- 1731 0002 7047                bx      lr\r
- 1732                          .cfi_endproc\r
- 1733                  .LFE39:\r
- 1734                          .size   CyHalt, .-CyHalt\r
- 1735                          .section        .text.CySoftwareReset,"ax",%progbits\r
- 1736                          .align  1\r
- 1737                          .global CySoftwareReset\r
- 1738                          .thumb\r
- 1739                          .thumb_func\r
- 1740                          .type   CySoftwareReset, %function\r
- 1741                  CySoftwareReset:\r
- 1742                  .LFB40:\r
-1640:.\Generated_Source\PSoC5/CyLib.c ****     #elif defined(__C51__)\r
-1641:.\Generated_Source\PSoC5/CyLib.c ****         CYDEV_HALT_CPU;\r
-1642:.\Generated_Source\PSoC5/CyLib.c ****     #endif  /* (__ARMCC_VERSION) */\r
-1643:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1644:.\Generated_Source\PSoC5/CyLib.c **** \r
-1645:.\Generated_Source\PSoC5/CyLib.c **** \r
-1646:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1647:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CySoftwareReset\r
-1648:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1649:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1650:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1651:.\Generated_Source\PSoC5/CyLib.c **** *  Forces a software reset of the device.\r
-1652:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1653:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1654:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1655:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1656:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1657:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1658:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1659:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 63\r
-\r
-\r
-1660:.\Generated_Source\PSoC5/CyLib.c **** void CySoftwareReset(void) \r
-1661:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1743                          .loc 1 1661 0\r
- 1744                          .cfi_startproc\r
- 1745                          @ args = 0, pretend = 0, frame = 0\r
- 1746                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1747                          @ link register save eliminated.\r
-1662:.\Generated_Source\PSoC5/CyLib.c ****     CY_LIB_RESET_CR2_REG |= CY_LIB_RESET_CR2_RESET;\r
- 1748                          .loc 1 1662 0\r
- 1749 0000 024B                ldr     r3, .L215\r
- 1750 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1751 0004 42F00100            orr     r0, r2, #1\r
- 1752 0008 1870                strb    r0, [r3, #0]\r
- 1753 000a 7047                bx      lr\r
- 1754                  .L216:\r
- 1755                          .align  2\r
- 1756                  .L215:\r
- 1757 000c F6460040            .word   1073759990\r
- 1758                          .cfi_endproc\r
- 1759                  .LFE40:\r
- 1760                          .size   CySoftwareReset, .-CySoftwareReset\r
- 1761                          .section        .text.CyDelay,"ax",%progbits\r
- 1762                          .align  1\r
- 1763                          .global CyDelay\r
- 1764                          .thumb\r
- 1765                          .thumb_func\r
- 1766                          .type   CyDelay, %function\r
- 1767                  CyDelay:\r
- 1768                  .LFB41:\r
-1663:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1664:.\Generated_Source\PSoC5/CyLib.c **** \r
-1665:.\Generated_Source\PSoC5/CyLib.c **** \r
-1666:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1667:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyDelay\r
-1668:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1669:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1670:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1671:.\Generated_Source\PSoC5/CyLib.c **** *  Blocks for milliseconds.\r
-1672:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1673:.\Generated_Source\PSoC5/CyLib.c **** *  Note:\r
-1674:.\Generated_Source\PSoC5/CyLib.c **** *  CyDelay has been implemented with the instruction cache assumed enabled. When\r
-1675:.\Generated_Source\PSoC5/CyLib.c **** *  instruction cache is disabled on PSoC5, CyDelay will be two times larger. For\r
-1676:.\Generated_Source\PSoC5/CyLib.c **** *  example, with instruction cache disabled CyDelay(100) would result in about\r
-1677:.\Generated_Source\PSoC5/CyLib.c **** *  200 ms delay instead of 100 ms.\r
-1678:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1679:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1680:.\Generated_Source\PSoC5/CyLib.c **** *  milliseconds: number of milliseconds to delay.\r
-1681:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1682:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1683:.\Generated_Source\PSoC5/CyLib.c **** *   None\r
-1684:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1685:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1686:.\Generated_Source\PSoC5/CyLib.c **** void CyDelay(uint32 milliseconds) CYREENTRANT\r
-1687:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1769                          .loc 1 1687 0\r
- 1770                          .cfi_startproc\r
- 1771                          @ args = 0, pretend = 0, frame = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 64\r
-\r
-\r
- 1772                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1773                  .LVL111:\r
- 1774 0000 10B5                push    {r4, lr}\r
- 1775                  .LCFI5:\r
- 1776                          .cfi_def_cfa_offset 8\r
- 1777                          .cfi_offset 4, -8\r
- 1778                          .cfi_offset 14, -4\r
- 1779 0002 0446                mov     r4, r0\r
- 1780                  .LVL112:\r
- 1781                  .L218:\r
-1688:.\Generated_Source\PSoC5/CyLib.c ****     while (milliseconds > 32768u)\r
- 1782                          .loc 1 1688 0 discriminator 1\r
- 1783 0004 B4F5004F            cmp     r4, #32768\r
- 1784 0008 064B                ldr     r3, .L221\r
- 1785 000a 05D9                bls     .L220\r
- 1786                  .L219:\r
-1689:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1690:.\Generated_Source\PSoC5/CyLib.c ****         /***********************************************************************\r
-1691:.\Generated_Source\PSoC5/CyLib.c ****         * This loop prevents overflow.At 100MHz, milliseconds * delay_freq_khz\r
-1692:.\Generated_Source\PSoC5/CyLib.c ****         * overflows at about 42 seconds.\r
-1693:.\Generated_Source\PSoC5/CyLib.c ****         ***********************************************************************/\r
-1694:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayCycles(cydelay_32k_ms);\r
- 1787                          .loc 1 1694 0\r
- 1788 000c 1868                ldr     r0, [r3, #0]\r
- 1789 000e FFF7FEFF            bl      CyDelayCycles\r
- 1790                  .LVL113:\r
-1695:.\Generated_Source\PSoC5/CyLib.c ****         milliseconds = ((uint32)(milliseconds - 32768u));\r
- 1791                          .loc 1 1695 0\r
- 1792 0012 A4F50044            sub     r4, r4, #32768\r
- 1793                  .LVL114:\r
- 1794 0016 F5E7                b       .L218\r
- 1795                  .L220:\r
-1696:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1697:.\Generated_Source\PSoC5/CyLib.c **** \r
-1698:.\Generated_Source\PSoC5/CyLib.c ****     CyDelayCycles(milliseconds * cydelay_freq_khz);\r
- 1796                          .loc 1 1698 0\r
- 1797 0018 5868                ldr     r0, [r3, #4]\r
- 1798 001a 6043                muls    r0, r4, r0\r
-1699:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1799                          .loc 1 1699 0\r
- 1800 001c BDE81040            pop     {r4, lr}\r
-1698:.\Generated_Source\PSoC5/CyLib.c ****     CyDelayCycles(milliseconds * cydelay_freq_khz);\r
- 1801                          .loc 1 1698 0\r
- 1802 0020 FFF7FEBF            b       CyDelayCycles\r
- 1803                  .LVL115:\r
- 1804                  .L222:\r
- 1805                          .align  2\r
- 1806                  .L221:\r
- 1807 0024 00000000            .word   .LANCHOR0\r
- 1808                          .cfi_endproc\r
- 1809                  .LFE41:\r
- 1810                          .size   CyDelay, .-CyDelay\r
- 1811                          .section        .text.CyDelayUs,"ax",%progbits\r
- 1812                          .align  1\r
- 1813                          .global CyDelayUs\r
- 1814                          .thumb\r
- 1815                          .thumb_func\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 65\r
-\r
-\r
- 1816                          .type   CyDelayUs, %function\r
- 1817                  CyDelayUs:\r
- 1818                  .LFB42:\r
-1700:.\Generated_Source\PSoC5/CyLib.c **** \r
-1701:.\Generated_Source\PSoC5/CyLib.c **** \r
-1702:.\Generated_Source\PSoC5/CyLib.c **** #if(!CY_PSOC3)\r
-1703:.\Generated_Source\PSoC5/CyLib.c **** \r
-1704:.\Generated_Source\PSoC5/CyLib.c ****     /* For PSoC3 devices function is defined in CyBootAsmKeil.a51 file */\r
-1705:.\Generated_Source\PSoC5/CyLib.c **** \r
-1706:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-1707:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyDelayUs\r
-1708:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-1709:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1710:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-1711:.\Generated_Source\PSoC5/CyLib.c ****     *  Blocks for microseconds.\r
-1712:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1713:.\Generated_Source\PSoC5/CyLib.c ****     *  Note:\r
-1714:.\Generated_Source\PSoC5/CyLib.c ****     *   CyDelay has been implemented with the instruction cache assumed enabled.\r
-1715:.\Generated_Source\PSoC5/CyLib.c ****     *   When instruction cache is disabled on PSoC5, CyDelayUs will be two times\r
-1716:.\Generated_Source\PSoC5/CyLib.c ****     *   larger. Ex: With instruction cache disabled CyDelayUs(100) would result\r
-1717:.\Generated_Source\PSoC5/CyLib.c ****     *   in about 200us delay instead of 100us.\r
-1718:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1719:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-1720:.\Generated_Source\PSoC5/CyLib.c ****     *  uint16 microseconds: number of microseconds to delay.\r
-1721:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1722:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-1723:.\Generated_Source\PSoC5/CyLib.c ****     *  None\r
-1724:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1725:.\Generated_Source\PSoC5/CyLib.c ****     * Side Effects:\r
-1726:.\Generated_Source\PSoC5/CyLib.c ****     *  CyDelayUS has been implemented with the instruction cache assumed enabled.\r
-1727:.\Generated_Source\PSoC5/CyLib.c ****     *  When instruction cache is disabled on PSoC 5, CyDelayUs will be two times\r
-1728:.\Generated_Source\PSoC5/CyLib.c ****     *  larger. For example, with instruction cache disabled CyDelayUs(100) would\r
-1729:.\Generated_Source\PSoC5/CyLib.c ****     *  result in about 200 us delay instead of 100 us.\r
-1730:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-1731:.\Generated_Source\PSoC5/CyLib.c ****     *  If the bus clock frequency is a small non-integer number, the actual delay\r
-1732:.\Generated_Source\PSoC5/CyLib.c ****     *  can be up to twice as long as the nominal value. The actual delay cannot be\r
-1733:.\Generated_Source\PSoC5/CyLib.c ****     *  shorter than the nominal one.\r
-1734:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-1735:.\Generated_Source\PSoC5/CyLib.c ****     void CyDelayUs(uint16 microseconds) CYREENTRANT\r
-1736:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 1819                          .loc 1 1736 0\r
- 1820                          .cfi_startproc\r
- 1821                          @ args = 0, pretend = 0, frame = 0\r
- 1822                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1823                          @ link register save eliminated.\r
- 1824                  .LVL116:\r
-1737:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayCycles((uint32)microseconds * cydelay_freq_mhz);\r
- 1825                          .loc 1 1737 0\r
- 1826 0000 024B                ldr     r3, .L224\r
- 1827 0002 197A                ldrb    r1, [r3, #8]    @ zero_extendqisi2\r
- 1828 0004 4843                muls    r0, r1, r0\r
- 1829                  .LVL117:\r
-1738:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 1830                          .loc 1 1738 0\r
-1737:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayCycles((uint32)microseconds * cydelay_freq_mhz);\r
- 1831                          .loc 1 1737 0\r
- 1832 0006 FFF7FEBF            b       CyDelayCycles\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 66\r
-\r
-\r
- 1833                  .LVL118:\r
- 1834                  .L225:\r
- 1835 000a 00BF                .align  2\r
- 1836                  .L224:\r
- 1837 000c 00000000            .word   .LANCHOR0\r
- 1838                          .cfi_endproc\r
- 1839                  .LFE42:\r
- 1840                          .size   CyDelayUs, .-CyDelayUs\r
- 1841                          .section        .text.CyXTAL_32KHZ_SetPowerMode,"ax",%progbits\r
- 1842                          .align  1\r
- 1843                          .global CyXTAL_32KHZ_SetPowerMode\r
- 1844                          .thumb\r
- 1845                          .thumb_func\r
- 1846                          .type   CyXTAL_32KHZ_SetPowerMode, %function\r
- 1847                  CyXTAL_32KHZ_SetPowerMode:\r
- 1848                  .LFB28:\r
-1273:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1849                          .loc 1 1273 0\r
- 1850                          .cfi_startproc\r
- 1851                          @ args = 0, pretend = 0, frame = 0\r
- 1852                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1853                  .LVL119:\r
- 1854 0000 70B5                push    {r4, r5, r6, lr}\r
- 1855                  .LCFI6:\r
- 1856                          .cfi_def_cfa_offset 16\r
- 1857                          .cfi_offset 4, -16\r
- 1858                          .cfi_offset 5, -12\r
- 1859                          .cfi_offset 6, -8\r
- 1860                          .cfi_offset 14, -4\r
-1274:.\Generated_Source\PSoC5/CyLib.c ****     uint8 state = (0u != (CY_CLK_XTAL32_CR_REG & CY_CLK_XTAL32_CR_LPM)) ? 1u : 0u;\r
- 1861                          .loc 1 1274 0\r
- 1862 0002 164C                ldr     r4, .L230\r
-1276:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1863                          .loc 1 1276 0\r
- 1864 0004 164B                ldr     r3, .L230+4\r
-1274:.\Generated_Source\PSoC5/CyLib.c ****     uint8 state = (0u != (CY_CLK_XTAL32_CR_REG & CY_CLK_XTAL32_CR_LPM)) ? 1u : 0u;\r
- 1865                          .loc 1 1274 0\r
- 1866 0006 2678                ldrb    r6, [r4, #0]    @ zero_extendqisi2\r
-1276:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1867                          .loc 1 1276 0\r
- 1868 0008 F321                movs    r1, #243\r
-1278:.\Generated_Source\PSoC5/CyLib.c ****     if(1u == mode)\r
- 1869                          .loc 1 1278 0\r
- 1870 000a 0128                cmp     r0, #1\r
-1276:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1871                          .loc 1 1276 0\r
- 1872 000c 1970                strb    r1, [r3, #0]\r
-1274:.\Generated_Source\PSoC5/CyLib.c ****     uint8 state = (0u != (CY_CLK_XTAL32_CR_REG & CY_CLK_XTAL32_CR_LPM)) ? 1u : 0u;\r
- 1873                          .loc 1 1274 0\r
- 1874 000e C6F34006            ubfx    r6, r6, #1, #1\r
- 1875                  .LVL120:\r
- 1876 0012 1449                ldr     r1, .L230+8\r
- 1877 0014 144D                ldr     r5, .L230+12\r
-1278:.\Generated_Source\PSoC5/CyLib.c ****     if(1u == mode)\r
- 1878                          .loc 1 1278 0\r
- 1879 0016 10D1                bne     .L227\r
-1281:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_LOW_POWER;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 67\r
-\r
-\r
- 1880                          .loc 1 1281 0\r
- 1881 0018 0870                strb    r0, [r1, #0]\r
-1282:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(10u);\r
- 1882                          .loc 1 1282 0\r
- 1883 001a 0A20                movs    r0, #10\r
- 1884                  .LVL121:\r
- 1885 001c FFF7FEFF            bl      CyDelayUs\r
- 1886                  .LVL122:\r
-1283:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1887                          .loc 1 1283 0\r
- 1888 0020 2B78                ldrb    r3, [r5, #0]    @ zero_extendqisi2\r
-1285:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(20u);\r
- 1889                          .loc 1 1285 0\r
- 1890 0022 1420                movs    r0, #20\r
-1283:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1891                          .loc 1 1283 0\r
- 1892 0024 03F0F301            and     r1, r3, #243\r
- 1893 0028 41F00802            orr     r2, r1, #8\r
- 1894 002c 2A70                strb    r2, [r5, #0]\r
-1285:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(20u);\r
- 1895                          .loc 1 1285 0\r
- 1896 002e FFF7FEFF            bl      CyDelayUs\r
- 1897                  .LVL123:\r
-1286:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_LPM;\r
- 1898                          .loc 1 1286 0\r
- 1899 0032 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 1900 0034 40F00200            orr     r0, r0, #2\r
- 1901 0038 0DE0                b       .L229\r
- 1902                  .LVL124:\r
- 1903                  .L227:\r
-1291:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_HIGH_POWER;\r
- 1904                          .loc 1 1291 0\r
- 1905 003a 0622                movs    r2, #6\r
- 1906 003c 0A70                strb    r2, [r1, #0]\r
-1292:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(10u);\r
- 1907                          .loc 1 1292 0\r
- 1908 003e 0A20                movs    r0, #10\r
- 1909                  .LVL125:\r
- 1910 0040 FFF7FEFF            bl      CyDelayUs\r
- 1911                  .LVL126:\r
-1293:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1912                          .loc 1 1293 0\r
- 1913 0044 2878                ldrb    r0, [r5, #0]    @ zero_extendqisi2\r
- 1914 0046 00F0F303            and     r3, r0, #243\r
- 1915 004a 43F00401            orr     r1, r3, #4\r
- 1916 004e 2970                strb    r1, [r5, #0]\r
-1295:.\Generated_Source\PSoC5/CyLib.c ****         CY_CLK_XTAL32_CR_REG &= ((uint8)(~CY_CLK_XTAL32_CR_LPM));\r
- 1917                          .loc 1 1295 0\r
- 1918 0050 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 1919 0052 02F0FD00            and     r0, r2, #253\r
- 1920                  .L229:\r
- 1921 0056 2070                strb    r0, [r4, #0]\r
-1299:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 1922                          .loc 1 1299 0\r
- 1923 0058 3046                mov     r0, r6\r
- 1924 005a 70BD                pop     {r4, r5, r6, pc}\r
- 1925                  .L231:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 68\r
-\r
-\r
- 1926                          .align  2\r
- 1927                  .L230:\r
- 1928 005c 08430040            .word   1073758984\r
- 1929 0060 0A430040            .word   1073758986\r
- 1930 0064 98460040            .word   1073759896\r
- 1931 0068 09430040            .word   1073758985\r
- 1932                          .cfi_endproc\r
- 1933                  .LFE28:\r
- 1934                          .size   CyXTAL_32KHZ_SetPowerMode, .-CyXTAL_32KHZ_SetPowerMode\r
- 1935                          .section        .text.CyXTAL_32KHZ_Start,"ax",%progbits\r
- 1936                          .align  1\r
- 1937                          .global CyXTAL_32KHZ_Start\r
- 1938                          .thumb\r
- 1939                          .thumb_func\r
- 1940                          .type   CyXTAL_32KHZ_Start, %function\r
- 1941                  CyXTAL_32KHZ_Start:\r
- 1942                  .LFB25:\r
-1174:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 1943                          .loc 1 1174 0\r
- 1944                          .cfi_startproc\r
- 1945                          @ args = 0, pretend = 0, frame = 8\r
- 1946                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1947 0000 07B5                push    {r0, r1, r2, lr}\r
- 1948                  .LCFI7:\r
- 1949                          .cfi_def_cfa_offset 16\r
- 1950                          .cfi_offset 0, -16\r
- 1951                          .cfi_offset 1, -12\r
- 1952                          .cfi_offset 2, -8\r
- 1953                          .cfi_offset 14, -4\r
-1177:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1954                          .loc 1 1177 0\r
- 1955 0002 174B                ldr     r3, .L238\r
- 1956 0004 F322                movs    r2, #243\r
-1178:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_STARTUP;\r
- 1957                          .loc 1 1178 0\r
- 1958 0006 1749                ldr     r1, .L238+4\r
-1177:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
- 1959                          .loc 1 1177 0\r
- 1960 0008 1A70                strb    r2, [r3, #0]\r
-1178:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_STARTUP;\r
- 1961                          .loc 1 1178 0\r
- 1962 000a 0320                movs    r0, #3\r
-1179:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1963                          .loc 1 1179 0\r
- 1964 000c 164B                ldr     r3, .L238+8\r
-1178:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_STARTUP;\r
- 1965                          .loc 1 1178 0\r
- 1966 000e 0870                strb    r0, [r1, #0]\r
-1179:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
- 1967                          .loc 1 1179 0\r
- 1968 0010 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1969 0012 02F0F300            and     r0, r2, #243\r
- 1970 0016 40F00401            orr     r1, r0, #4\r
- 1971 001a 1970                strb    r1, [r3, #0]\r
-1187:.\Generated_Source\PSoC5/CyLib.c ****     CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_EN;\r
- 1972                          .loc 1 1187 0\r
- 1973 001c 13F8012C            ldrb    r2, [r3, #-1]   @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 69\r
-\r
-\r
- 1974 0020 42F00100            orr     r0, r2, #1\r
- 1975 0024 03F8010C            strb    r0, [r3, #-1]\r
-1189:.\Generated_Source\PSoC5/CyLib.c ****     for (i = 1000u; i > 0u; i--)\r
- 1976                          .loc 1 1189 0\r
- 1977 0028 4FF47A73            mov     r3, #1000\r
- 1978                  .L237:\r
- 1979                  .LVL127:\r
- 1980 002c ADF80630            strh    r3, [sp, #6]    @ movhi\r
- 1981 0030 BDF80630            ldrh    r3, [sp, #6]\r
- 1982                  .LVL128:\r
- 1983 0034 99B2                uxth    r1, r3\r
- 1984 0036 89B1                cbz     r1, .L232\r
- 1985                  .L236:\r
- 1986                  .LBB16:\r
- 1987                  .LBB17:\r
-1250:.\Generated_Source\PSoC5/CyLib.c ****     return(CY_CLK_XTAL32_CR_REG & CY_XTAL32K_ANA_STAT);\r
- 1988                          .loc 1 1250 0\r
- 1989 0038 0C4A                ldr     r2, .L238+12\r
- 1990 003a 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1991                  .LBE17:\r
- 1992                  .LBE16:\r
-1191:.\Generated_Source\PSoC5/CyLib.c ****         if(0u != (CyXTAL_32KHZ_ReadStatus() & CY_XTAL32K_ANA_STAT))\r
- 1993                          .loc 1 1191 0\r
- 1994 003c 00F02003            and     r3, r0, #32\r
- 1995 0040 D9B2                uxtb    r1, r3\r
- 1996 0042 19B1                cbz     r1, .L234\r
-1194:.\Generated_Source\PSoC5/CyLib.c ****             (void) CyXTAL_32KHZ_SetPowerMode(0u);\r
- 1997                          .loc 1 1194 0\r
- 1998 0044 0020                movs    r0, #0\r
- 1999 0046 FFF7FEFF            bl      CyXTAL_32KHZ_SetPowerMode\r
- 2000                  .LVL129:\r
-1196:.\Generated_Source\PSoC5/CyLib.c ****             break;\r
- 2001                          .loc 1 1196 0\r
- 2002 004a 07E0                b       .L232\r
- 2003                  .L234:\r
-1198:.\Generated_Source\PSoC5/CyLib.c ****         CyDelayUs(1u);\r
- 2004                          .loc 1 1198 0\r
- 2005 004c 0120                movs    r0, #1\r
- 2006 004e FFF7FEFF            bl      CyDelayUs\r
- 2007                  .LVL130:\r
-1189:.\Generated_Source\PSoC5/CyLib.c ****     for (i = 1000u; i > 0u; i--)\r
- 2008                          .loc 1 1189 0\r
- 2009 0052 BDF80620            ldrh    r2, [sp, #6]\r
- 2010                  .LVL131:\r
- 2011 0056 501E                subs    r0, r2, #1\r
- 2012 0058 83B2                uxth    r3, r0\r
- 2013                  .LVL132:\r
- 2014 005a E7E7                b       .L237\r
- 2015                  .LVL133:\r
- 2016                  .L232:\r
-1200:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2017                          .loc 1 1200 0\r
- 2018 005c 0EBD                pop     {r1, r2, r3, pc}\r
- 2019                  .L239:\r
- 2020 005e 00BF                .align  2\r
- 2021                  .L238:\r
- 2022 0060 0A430040            .word   1073758986\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 70\r
-\r
-\r
- 2023 0064 98460040            .word   1073759896\r
- 2024 0068 09430040            .word   1073758985\r
- 2025 006c 08430040            .word   1073758984\r
- 2026                          .cfi_endproc\r
- 2027                  .LFE25:\r
- 2028                          .size   CyXTAL_32KHZ_Start, .-CyXTAL_32KHZ_Start\r
- 2029                          .section        .text.CyDelayFreq,"ax",%progbits\r
- 2030                          .align  1\r
- 2031                          .global CyDelayFreq\r
- 2032                          .thumb\r
- 2033                          .thumb_func\r
- 2034                          .type   CyDelayFreq, %function\r
- 2035                  CyDelayFreq:\r
- 2036                  .LFB43:\r
-1739:.\Generated_Source\PSoC5/CyLib.c **** \r
-1740:.\Generated_Source\PSoC5/CyLib.c **** #endif  /* (!CY_PSOC3) */\r
-1741:.\Generated_Source\PSoC5/CyLib.c **** \r
-1742:.\Generated_Source\PSoC5/CyLib.c **** \r
-1743:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1744:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyDelayFreq\r
-1745:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1746:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1747:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1748:.\Generated_Source\PSoC5/CyLib.c **** *  Sets clock frequency for CyDelay.\r
-1749:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1750:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1751:.\Generated_Source\PSoC5/CyLib.c **** *  freq: Frequency of bus clock in Hertz.\r
-1752:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1753:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1754:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1755:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1756:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1757:.\Generated_Source\PSoC5/CyLib.c **** void CyDelayFreq(uint32 freq) CYREENTRANT\r
-1758:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2037                          .loc 1 1758 0\r
- 2038                          .cfi_startproc\r
- 2039                          @ args = 0, pretend = 0, frame = 0\r
- 2040                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2041                          @ link register save eliminated.\r
- 2042                  .LVL134:\r
- 2043 0000 0C4B                ldr     r3, .L243\r
-1759:.\Generated_Source\PSoC5/CyLib.c ****     if (freq != 0u)\r
- 2044                          .loc 1 1759 0\r
- 2045 0002 08B1                cbz     r0, .L241\r
-1760:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1761:.\Generated_Source\PSoC5/CyLib.c ****         cydelay_freq_hz = freq;\r
- 2046                          .loc 1 1761 0\r
- 2047 0004 D860                str     r0, [r3, #12]\r
- 2048 0006 01E0                b       .L242\r
- 2049                  .L241:\r
-1762:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1763:.\Generated_Source\PSoC5/CyLib.c ****     else\r
-1764:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1765:.\Generated_Source\PSoC5/CyLib.c ****         cydelay_freq_hz = BCLK__BUS_CLK__HZ;\r
- 2050                          .loc 1 1765 0\r
- 2051 0008 0B4A                ldr     r2, .L243+4\r
- 2052 000a DA60                str     r2, [r3, #12]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 71\r
-\r
-\r
- 2053                  .L242:\r
-1766:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1767:.\Generated_Source\PSoC5/CyLib.c **** \r
-1768:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_freq_mhz = (uint8)((cydelay_freq_hz + 999999u) / 1000000u);\r
- 2054                          .loc 1 1768 0\r
- 2055 000c D968                ldr     r1, [r3, #12]\r
- 2056 000e 01F57420            add     r0, r1, #999424\r
- 2057                  .LVL135:\r
- 2058 0012 00F23F22            addw    r2, r0, #575\r
- 2059 0016 0948                ldr     r0, .L243+8\r
-1769:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_freq_khz = (cydelay_freq_hz + 999u) / 1000u;\r
- 2060                          .loc 1 1769 0\r
- 2061 0018 01F2E731            addw    r1, r1, #999\r
-1768:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_freq_mhz = (uint8)((cydelay_freq_hz + 999999u) / 1000000u);\r
- 2062                          .loc 1 1768 0\r
- 2063 001c B2FBF0F2            udiv    r2, r2, r0\r
- 2064                          .loc 1 1769 0\r
- 2065 0020 4FF47A70            mov     r0, #1000\r
-1768:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_freq_mhz = (uint8)((cydelay_freq_hz + 999999u) / 1000000u);\r
- 2066                          .loc 1 1768 0\r
- 2067 0024 1A72                strb    r2, [r3, #8]\r
- 2068                          .loc 1 1769 0\r
- 2069 0026 B1FBF0F2            udiv    r2, r1, r0\r
-1770:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_32k_ms   = 32768u * cydelay_freq_khz;\r
- 2070                          .loc 1 1770 0\r
- 2071 002a D103                lsls    r1, r2, #15\r
-1769:.\Generated_Source\PSoC5/CyLib.c ****     cydelay_freq_khz = (cydelay_freq_hz + 999u) / 1000u;\r
- 2072                          .loc 1 1769 0\r
- 2073 002c 5A60                str     r2, [r3, #4]\r
- 2074                          .loc 1 1770 0\r
- 2075 002e 1960                str     r1, [r3, #0]\r
- 2076 0030 7047                bx      lr\r
- 2077                  .L244:\r
- 2078 0032 00BF                .align  2\r
- 2079                  .L243:\r
- 2080 0034 00000000            .word   .LANCHOR0\r
- 2081 0038 0090D003            .word   64000000\r
- 2082 003c 40420F00            .word   1000000\r
- 2083                          .cfi_endproc\r
- 2084                  .LFE43:\r
- 2085                          .size   CyDelayFreq, .-CyDelayFreq\r
- 2086                          .section        .text.CyWdtStart,"ax",%progbits\r
- 2087                          .align  1\r
- 2088                          .global CyWdtStart\r
- 2089                          .thumb\r
- 2090                          .thumb_func\r
- 2091                          .type   CyWdtStart, %function\r
- 2092                  CyWdtStart:\r
- 2093                  .LFB44:\r
-1771:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1772:.\Generated_Source\PSoC5/CyLib.c **** \r
-1773:.\Generated_Source\PSoC5/CyLib.c **** \r
-1774:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1775:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyWdtStart\r
-1776:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1777:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1778:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 72\r
-\r
-\r
-1779:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the watchdog timer.\r
-1780:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1781:.\Generated_Source\PSoC5/CyLib.c **** *  The timer is configured for the specified count interval, the central\r
-1782:.\Generated_Source\PSoC5/CyLib.c **** *  timewheel is cleared, the setting for low power mode is configured and the\r
-1783:.\Generated_Source\PSoC5/CyLib.c **** *  watchdog timer is enabled.\r
-1784:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1785:.\Generated_Source\PSoC5/CyLib.c **** *  Once enabled the watchdog cannot be disabled. The watchdog counts each time\r
-1786:.\Generated_Source\PSoC5/CyLib.c **** *  the Central Time Wheel (CTW) reaches the period specified. The watchdog must\r
-1787:.\Generated_Source\PSoC5/CyLib.c **** *  be cleared using the CyWdtClear() function before three ticks of the watchdog\r
-1788:.\Generated_Source\PSoC5/CyLib.c **** *  timer occur. The CTW is free running, so this will occur after between 2 and\r
-1789:.\Generated_Source\PSoC5/CyLib.c **** *  3 timer periods elapse.\r
-1790:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1791:.\Generated_Source\PSoC5/CyLib.c **** *  PSoC5: The watchdog timer should not be used during sleep modes. Since the\r
-1792:.\Generated_Source\PSoC5/CyLib.c **** *  WDT cannot be disabled after it is enabled, the WDT timeout period can be\r
-1793:.\Generated_Source\PSoC5/CyLib.c **** *  set to be greater than the sleep wakeup period, then feed the dog on each\r
-1794:.\Generated_Source\PSoC5/CyLib.c **** *  wakeup from Sleep.\r
-1795:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1796:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1797:.\Generated_Source\PSoC5/CyLib.c **** *  ticks: One of the four available timer periods. Once WDT enabled, the\r
-1798:.\Generated_Source\PSoC5/CyLib.c ****    interval cannot be changed.\r
-1799:.\Generated_Source\PSoC5/CyLib.c **** *         CYWDT_2_TICKS     -     4 - 6     ms\r
-1800:.\Generated_Source\PSoC5/CyLib.c **** *         CYWDT_16_TICKS    -    32 - 48    ms\r
-1801:.\Generated_Source\PSoC5/CyLib.c **** *         CYWDT_128_TICKS   -   256 - 384   ms\r
-1802:.\Generated_Source\PSoC5/CyLib.c **** *         CYWDT_1024_TICKS  - 2.048 - 3.072 s\r
-1803:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1804:.\Generated_Source\PSoC5/CyLib.c **** *  lpMode: Low power mode configuration. This parameter is ignored for PSoC 5.\r
-1805:.\Generated_Source\PSoC5/CyLib.c **** *          The WDT always acts as if CYWDT_LPMODE_NOCHANGE is passed.\r
-1806:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1807:.\Generated_Source\PSoC5/CyLib.c **** *          CYWDT_LPMODE_NOCHANGE - No Change\r
-1808:.\Generated_Source\PSoC5/CyLib.c **** *          CYWDT_LPMODE_MAXINTER - Switch to longest timer mode during low power\r
-1809:.\Generated_Source\PSoC5/CyLib.c **** *                                 mode\r
-1810:.\Generated_Source\PSoC5/CyLib.c **** *          CYWDT_LPMODE_DISABLED - Disable WDT during low power mode\r
-1811:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1812:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1813:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1814:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1815:.\Generated_Source\PSoC5/CyLib.c **** * Side Effects:\r
-1816:.\Generated_Source\PSoC5/CyLib.c **** *  PSoC5: The ILO 1 KHz must be enabled for proper WDT operation. Stopping the\r
-1817:.\Generated_Source\PSoC5/CyLib.c **** *  ILO 1 kHz could break the active WDT functionality.\r
-1818:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1819:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1820:.\Generated_Source\PSoC5/CyLib.c **** void CyWdtStart(uint8 ticks, uint8 lpMode) \r
-1821:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2094                          .loc 1 1821 0\r
- 2095                          .cfi_startproc\r
- 2096                          @ args = 0, pretend = 0, frame = 0\r
- 2097                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2098                          @ link register save eliminated.\r
- 2099                  .LVL136:\r
-1822:.\Generated_Source\PSoC5/CyLib.c ****     /* Set WDT interval */\r
-1823:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG = (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_INTERVAL_MASK))) | (ticks & CY_WDT_CFG_\r
- 2100                          .loc 1 1823 0\r
- 2101 0000 0E4B                ldr     r3, .L246\r
- 2102 0002 00F00300            and     r0, r0, #3\r
- 2103                  .LVL137:\r
- 2104 0006 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-1824:.\Generated_Source\PSoC5/CyLib.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 73\r
-\r
-\r
-1825:.\Generated_Source\PSoC5/CyLib.c ****     /* Reset CTW to ensure that first watchdog period is full */\r
-1826:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG |= CY_WDT_CFG_CTW_RESET;\r
-1827:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG &= ((uint8)(~CY_WDT_CFG_CTW_RESET));\r
-1828:.\Generated_Source\PSoC5/CyLib.c **** \r
-1829:.\Generated_Source\PSoC5/CyLib.c ****     /* Setting the low power mode */\r
-1830:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG = (((uint8)(lpMode << CY_WDT_CFG_LPMODE_SHIFT)) & CY_WDT_CFG_LPMODE_MASK) |\r
- 2105                          .loc 1 1830 0\r
- 2106 0008 4901                lsls    r1, r1, #5\r
- 2107                  .LVL138:\r
-1823:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG = (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_INTERVAL_MASK))) | (ticks & CY_WDT_CFG_\r
- 2108                          .loc 1 1823 0\r
- 2109 000a 02F0FC02            and     r2, r2, #252\r
- 2110 000e 1043                orrs    r0, r0, r2\r
- 2111 0010 1870                strb    r0, [r3, #0]\r
-1826:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG |= CY_WDT_CFG_CTW_RESET;\r
- 2112                          .loc 1 1826 0\r
- 2113 0012 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2114 0014 42F08000            orr     r0, r2, #128\r
- 2115 0018 1870                strb    r0, [r3, #0]\r
-1827:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG &= ((uint8)(~CY_WDT_CFG_CTW_RESET));\r
- 2116                          .loc 1 1827 0\r
- 2117 001a 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2118 001c 02F07F00            and     r0, r2, #127\r
- 2119 0020 1870                strb    r0, [r3, #0]\r
-1831:.\Generated_Source\PSoC5/CyLib.c ****                        (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_LPMODE_MASK)));\r
- 2120                          .loc 1 1831 0\r
- 2121 0022 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-1830:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG = (((uint8)(lpMode << CY_WDT_CFG_LPMODE_SHIFT)) & CY_WDT_CFG_LPMODE_MASK) |\r
- 2122                          .loc 1 1830 0\r
- 2123 0024 01F06000            and     r0, r1, #96\r
- 2124 0028 02F09F02            and     r2, r2, #159\r
- 2125 002c 40EA0201            orr     r1, r0, r2\r
- 2126 0030 1970                strb    r1, [r3, #0]\r
-1832:.\Generated_Source\PSoC5/CyLib.c **** \r
-1833:.\Generated_Source\PSoC5/CyLib.c ****     /* Enables the watchdog reset */\r
-1834:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CFG_REG |= CY_WDT_CFG_WDR_EN;\r
- 2127                          .loc 1 1834 0\r
- 2128 0032 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 2129 0034 40F01002            orr     r2, r0, #16\r
- 2130 0038 1A70                strb    r2, [r3, #0]\r
- 2131 003a 7047                bx      lr\r
- 2132                  .L247:\r
- 2133                          .align  2\r
- 2134                  .L246:\r
- 2135 003c 83430040            .word   1073759107\r
- 2136                          .cfi_endproc\r
- 2137                  .LFE44:\r
- 2138                          .size   CyWdtStart, .-CyWdtStart\r
- 2139                          .section        .text.CyWdtClear,"ax",%progbits\r
- 2140                          .align  1\r
- 2141                          .global CyWdtClear\r
- 2142                          .thumb\r
- 2143                          .thumb_func\r
- 2144                          .type   CyWdtClear, %function\r
- 2145                  CyWdtClear:\r
- 2146                  .LFB45:\r
-1835:.\Generated_Source\PSoC5/CyLib.c **** }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 74\r
-\r
-\r
-1836:.\Generated_Source\PSoC5/CyLib.c **** \r
-1837:.\Generated_Source\PSoC5/CyLib.c **** \r
-1838:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1839:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyWdtClear\r
-1840:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1841:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1842:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1843:.\Generated_Source\PSoC5/CyLib.c **** *  Clears (feeds) the watchdog timer.\r
-1844:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1845:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1846:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1847:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1848:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1849:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1850:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1851:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1852:.\Generated_Source\PSoC5/CyLib.c **** void CyWdtClear(void) \r
-1853:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2147                          .loc 1 1853 0\r
- 2148                          .cfi_startproc\r
- 2149                          @ args = 0, pretend = 0, frame = 0\r
- 2150                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2151                          @ link register save eliminated.\r
-1854:.\Generated_Source\PSoC5/CyLib.c ****     CY_WDT_CR_REG = CY_WDT_CR_FEED;\r
- 2152                          .loc 1 1854 0\r
- 2153 0000 014B                ldr     r3, .L249\r
- 2154 0002 0122                movs    r2, #1\r
- 2155 0004 1A70                strb    r2, [r3, #0]\r
- 2156 0006 7047                bx      lr\r
- 2157                  .L250:\r
- 2158                          .align  2\r
- 2159                  .L249:\r
- 2160 0008 84430040            .word   1073759108\r
- 2161                          .cfi_endproc\r
- 2162                  .LFE45:\r
- 2163                          .size   CyWdtClear, .-CyWdtClear\r
- 2164                          .section        .text.CyVdLvDigitEnable,"ax",%progbits\r
- 2165                          .align  1\r
- 2166                          .global CyVdLvDigitEnable\r
- 2167                          .thumb\r
- 2168                          .thumb_func\r
- 2169                          .type   CyVdLvDigitEnable, %function\r
- 2170                  CyVdLvDigitEnable:\r
- 2171                  .LFB46:\r
-1855:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1856:.\Generated_Source\PSoC5/CyLib.c **** \r
-1857:.\Generated_Source\PSoC5/CyLib.c **** \r
-1858:.\Generated_Source\PSoC5/CyLib.c **** \r
-1859:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1860:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdLvDigitEnable\r
-1861:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1862:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1863:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1864:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the digital low voltage monitors to generate interrupt on Vddd\r
-1865:.\Generated_Source\PSoC5/CyLib.c **** *   archives specified threshold and optionally resets device.\r
-1866:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1867:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 75\r
-\r
-\r
-1868:.\Generated_Source\PSoC5/CyLib.c **** *  reset: Option to reset device at a specified Vddd threshold:\r
-1869:.\Generated_Source\PSoC5/CyLib.c **** *           0 - Device is not reset.\r
-1870:.\Generated_Source\PSoC5/CyLib.c **** *           1 - Device is reset.\r
-1871:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1872:.\Generated_Source\PSoC5/CyLib.c **** *  threshold: Sets the trip level for the voltage monitor.\r
-1873:.\Generated_Source\PSoC5/CyLib.c **** *  Values from 1.70 V to 5.45 V are accepted with the approximately 250 mV\r
-1874:.\Generated_Source\PSoC5/CyLib.c **** *  interval.\r
-1875:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1876:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1877:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1878:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1879:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1880:.\Generated_Source\PSoC5/CyLib.c **** void CyVdLvDigitEnable(uint8 reset, uint8 threshold) \r
-1881:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2172                          .loc 1 1881 0\r
- 2173                          .cfi_startproc\r
- 2174                          @ args = 0, pretend = 0, frame = 0\r
- 2175                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2176                  .LVL139:\r
- 2177 0000 38B5                push    {r3, r4, r5, lr}\r
- 2178                  .LCFI8:\r
- 2179                          .cfi_def_cfa_offset 16\r
- 2180                          .cfi_offset 3, -16\r
- 2181                          .cfi_offset 4, -12\r
- 2182                          .cfi_offset 5, -8\r
- 2183                          .cfi_offset 14, -4\r
-1882:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2184                          .loc 1 1882 0\r
- 2185 0002 144A                ldr     r2, .L255\r
- 2186 0004 0123                movs    r3, #1\r
-1883:.\Generated_Source\PSoC5/CyLib.c **** \r
-1884:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
- 2187                          .loc 1 1884 0\r
- 2188 0006 144C                ldr     r4, .L255+4\r
-1882:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2189                          .loc 1 1882 0\r
- 2190 0008 1360                str     r3, [r2, #0]\r
-1881:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2191                          .loc 1 1881 0\r
- 2192 000a 0546                mov     r5, r0\r
- 2193                          .loc 1 1884 0\r
- 2194 000c 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 2195                  .LVL140:\r
-1885:.\Generated_Source\PSoC5/CyLib.c **** \r
-1886:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_TRIP_REG = (threshold & CY_VD_LVI_TRIP_LVID_MASK) |\r
- 2196                          .loc 1 1886 0\r
- 2197 000e 01F00F01            and     r1, r1, #15\r
- 2198                  .LVL141:\r
-1884:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
- 2199                          .loc 1 1884 0\r
- 2200 0012 00F0BF02            and     r2, r0, #191\r
- 2201 0016 2270                strb    r2, [r4, #0]\r
-1887:.\Generated_Source\PSoC5/CyLib.c ****                             (CY_VD_LVI_TRIP_REG & ((uint8)(~CY_VD_LVI_TRIP_LVID_MASK)));\r
- 2202                          .loc 1 1887 0\r
- 2203 0018 104A                ldr     r2, .L255+8\r
- 2204 001a 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
-1886:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_TRIP_REG = (threshold & CY_VD_LVI_TRIP_LVID_MASK) |\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 76\r
-\r
-\r
- 2205                          .loc 1 1886 0\r
- 2206 001c 00F0F000            and     r0, r0, #240\r
- 2207 0020 0143                orrs    r1, r1, r0\r
- 2208 0022 1170                strb    r1, [r2, #0]\r
-1888:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVID_EN;\r
- 2209                          .loc 1 1888 0\r
- 2210 0024 5078                ldrb    r0, [r2, #1]    @ zero_extendqisi2\r
- 2211 0026 1843                orrs    r0, r0, r3\r
- 2212 0028 5070                strb    r0, [r2, #1]\r
-1889:.\Generated_Source\PSoC5/CyLib.c **** \r
-1890:.\Generated_Source\PSoC5/CyLib.c ****     /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-1891:.\Generated_Source\PSoC5/CyLib.c ****     CyDelayUs(1u);\r
- 2213                          .loc 1 1891 0\r
- 2214 002a 1846                mov     r0, r3\r
- 2215 002c FFF7FEFF            bl      CyDelayUs\r
- 2216                  .LVL142:\r
-1892:.\Generated_Source\PSoC5/CyLib.c **** \r
-1893:.\Generated_Source\PSoC5/CyLib.c ****     (void)CY_VD_PERSISTENT_STATUS_REG;\r
- 2217                          .loc 1 1893 0\r
- 2218 0030 0B4B                ldr     r3, .L255+12\r
- 2219 0032 1B78                ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-1894:.\Generated_Source\PSoC5/CyLib.c **** \r
-1895:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != reset)\r
-1896:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1897:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG |= CY_VD_PRESD_EN;\r
- 2220                          .loc 1 1897 0\r
- 2221 0034 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
-1895:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != reset)\r
- 2222                          .loc 1 1895 0\r
- 2223 0036 15B1                cbz     r5, .L252\r
- 2224                          .loc 1 1897 0\r
- 2225 0038 42F04001            orr     r1, r2, #64\r
- 2226 003c 01E0                b       .L254\r
- 2227                  .L252:\r
-1898:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1899:.\Generated_Source\PSoC5/CyLib.c ****     else\r
-1900:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1901:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
- 2228                          .loc 1 1901 0\r
- 2229 003e 02F0BF01            and     r1, r2, #191\r
- 2230                  .L254:\r
-1902:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1903:.\Generated_Source\PSoC5/CyLib.c **** \r
-1904:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2231                          .loc 1 1904 0\r
- 2232 0042 084B                ldr     r3, .L255+16\r
- 2233 0044 0120                movs    r0, #1\r
-1905:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_ENABLE_PTR   = 0x01u;\r
- 2234                          .loc 1 1905 0\r
- 2235 0046 A3F5C072            sub     r2, r3, #384\r
-1901:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
- 2236                          .loc 1 1901 0\r
- 2237 004a 2170                strb    r1, [r4, #0]\r
-1904:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2238                          .loc 1 1904 0\r
- 2239 004c 1860                str     r0, [r3, #0]\r
- 2240                          .loc 1 1905 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 77\r
-\r
-\r
- 2241 004e 1060                str     r0, [r2, #0]\r
- 2242 0050 38BD                pop     {r3, r4, r5, pc}\r
- 2243                  .L256:\r
- 2244 0052 00BF                .align  2\r
- 2245                  .L255:\r
- 2246 0054 80E100E0            .word   -536813184\r
- 2247 0058 F7460040            .word   1073759991\r
- 2248 005c F4460040            .word   1073759988\r
- 2249 0060 FA460040            .word   1073759994\r
- 2250 0064 80E200E0            .word   -536812928\r
- 2251                          .cfi_endproc\r
- 2252                  .LFE46:\r
- 2253                          .size   CyVdLvDigitEnable, .-CyVdLvDigitEnable\r
- 2254                          .section        .text.CyVdLvAnalogEnable,"ax",%progbits\r
- 2255                          .align  1\r
- 2256                          .global CyVdLvAnalogEnable\r
- 2257                          .thumb\r
- 2258                          .thumb_func\r
- 2259                          .type   CyVdLvAnalogEnable, %function\r
- 2260                  CyVdLvAnalogEnable:\r
- 2261                  .LFB47:\r
-1906:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1907:.\Generated_Source\PSoC5/CyLib.c **** \r
-1908:.\Generated_Source\PSoC5/CyLib.c **** \r
-1909:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1910:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdLvAnalogEnable\r
-1911:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1912:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1913:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1914:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the analog low voltage monitors to generate interrupt on Vdda\r
-1915:.\Generated_Source\PSoC5/CyLib.c **** *   archives specified threshold and optionally resets device.\r
-1916:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1917:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1918:.\Generated_Source\PSoC5/CyLib.c **** *  reset: Option to reset device at a specified Vdda threshold:\r
-1919:.\Generated_Source\PSoC5/CyLib.c **** *           0 - Device is not reset.\r
-1920:.\Generated_Source\PSoC5/CyLib.c **** *           1 - Device is reset.\r
-1921:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1922:.\Generated_Source\PSoC5/CyLib.c **** *  threshold: Sets the trip level for the voltage monitor.\r
-1923:.\Generated_Source\PSoC5/CyLib.c **** *  Values from 1.70 V to 5.45 V are accepted with the approximately 250 mV\r
-1924:.\Generated_Source\PSoC5/CyLib.c **** *  interval.\r
-1925:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1926:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1927:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1928:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1929:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1930:.\Generated_Source\PSoC5/CyLib.c **** void CyVdLvAnalogEnable(uint8 reset, uint8 threshold) \r
-1931:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2262                          .loc 1 1931 0\r
- 2263                          .cfi_startproc\r
- 2264                          @ args = 0, pretend = 0, frame = 0\r
- 2265                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2266                  .LVL143:\r
- 2267 0000 38B5                push    {r3, r4, r5, lr}\r
- 2268                  .LCFI9:\r
- 2269                          .cfi_def_cfa_offset 16\r
- 2270                          .cfi_offset 3, -16\r
- 2271                          .cfi_offset 4, -12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 78\r
-\r
-\r
- 2272                          .cfi_offset 5, -8\r
- 2273                          .cfi_offset 14, -4\r
-1932:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2274                          .loc 1 1932 0\r
- 2275 0002 144A                ldr     r2, .L261\r
- 2276 0004 0123                movs    r3, #1\r
-1933:.\Generated_Source\PSoC5/CyLib.c **** \r
-1934:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
- 2277                          .loc 1 1934 0\r
- 2278 0006 144C                ldr     r4, .L261+4\r
-1932:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2279                          .loc 1 1932 0\r
- 2280 0008 1360                str     r3, [r2, #0]\r
-1931:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2281                          .loc 1 1931 0\r
- 2282 000a 0546                mov     r5, r0\r
- 2283                          .loc 1 1934 0\r
- 2284 000c 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 2285                  .LVL144:\r
- 2286 000e 00F07F02            and     r2, r0, #127\r
- 2287 0012 2270                strb    r2, [r4, #0]\r
-1935:.\Generated_Source\PSoC5/CyLib.c **** \r
-1936:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_TRIP_REG = ((uint8)(threshold << 4u)) | (CY_VD_LVI_TRIP_REG & 0x0Fu);\r
- 2288                          .loc 1 1936 0\r
- 2289 0014 114A                ldr     r2, .L261+8\r
- 2290 0016 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 2291 0018 00F00F00            and     r0, r0, #15\r
- 2292 001c 40EA0111            orr     r1, r0, r1, lsl #4\r
- 2293                  .LVL145:\r
- 2294 0020 C8B2                uxtb    r0, r1\r
- 2295 0022 1070                strb    r0, [r2, #0]\r
-1937:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVIA_EN;\r
- 2296                          .loc 1 1937 0\r
- 2297 0024 5178                ldrb    r1, [r2, #1]    @ zero_extendqisi2\r
- 2298 0026 41F00200            orr     r0, r1, #2\r
- 2299 002a 5070                strb    r0, [r2, #1]\r
-1938:.\Generated_Source\PSoC5/CyLib.c **** \r
-1939:.\Generated_Source\PSoC5/CyLib.c ****     /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-1940:.\Generated_Source\PSoC5/CyLib.c ****     CyDelayUs(1u);\r
- 2300                          .loc 1 1940 0\r
- 2301 002c 1846                mov     r0, r3\r
- 2302 002e FFF7FEFF            bl      CyDelayUs\r
- 2303                  .LVL146:\r
-1941:.\Generated_Source\PSoC5/CyLib.c **** \r
-1942:.\Generated_Source\PSoC5/CyLib.c ****     (void)CY_VD_PERSISTENT_STATUS_REG;\r
- 2304                          .loc 1 1942 0\r
- 2305 0032 0B4B                ldr     r3, .L261+12\r
- 2306 0034 1B78                ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-1943:.\Generated_Source\PSoC5/CyLib.c **** \r
-1944:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != reset)\r
-1945:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1946:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG |= CY_VD_PRESA_EN;\r
- 2307                          .loc 1 1946 0\r
- 2308 0036 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
-1944:.\Generated_Source\PSoC5/CyLib.c ****     if(0u != reset)\r
- 2309                          .loc 1 1944 0\r
- 2310 0038 15B1                cbz     r5, .L258\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 79\r
-\r
-\r
- 2311                          .loc 1 1946 0\r
- 2312 003a 42F08001            orr     r1, r2, #128\r
- 2313 003e 01E0                b       .L260\r
- 2314                  .L258:\r
-1947:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1948:.\Generated_Source\PSoC5/CyLib.c ****     else\r
-1949:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1950:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
- 2315                          .loc 1 1950 0\r
- 2316 0040 02F07F01            and     r1, r2, #127\r
- 2317                  .L260:\r
-1951:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1952:.\Generated_Source\PSoC5/CyLib.c **** \r
-1953:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2318                          .loc 1 1953 0\r
- 2319 0044 074B                ldr     r3, .L261+16\r
- 2320 0046 0120                movs    r0, #1\r
-1954:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_ENABLE_PTR   = 0x01u;\r
- 2321                          .loc 1 1954 0\r
- 2322 0048 A3F5C072            sub     r2, r3, #384\r
-1950:.\Generated_Source\PSoC5/CyLib.c ****         CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
- 2323                          .loc 1 1950 0\r
- 2324 004c 2170                strb    r1, [r4, #0]\r
-1953:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2325                          .loc 1 1953 0\r
- 2326 004e 1860                str     r0, [r3, #0]\r
- 2327                          .loc 1 1954 0\r
- 2328 0050 1060                str     r0, [r2, #0]\r
- 2329 0052 38BD                pop     {r3, r4, r5, pc}\r
- 2330                  .L262:\r
- 2331                          .align  2\r
- 2332                  .L261:\r
- 2333 0054 80E100E0            .word   -536813184\r
- 2334 0058 F7460040            .word   1073759991\r
- 2335 005c F4460040            .word   1073759988\r
- 2336 0060 FA460040            .word   1073759994\r
- 2337 0064 80E200E0            .word   -536812928\r
- 2338                          .cfi_endproc\r
- 2339                  .LFE47:\r
- 2340                          .size   CyVdLvAnalogEnable, .-CyVdLvAnalogEnable\r
- 2341                          .section        .text.CyVdLvDigitDisable,"ax",%progbits\r
- 2342                          .align  1\r
- 2343                          .global CyVdLvDigitDisable\r
- 2344                          .thumb\r
- 2345                          .thumb_func\r
- 2346                          .type   CyVdLvDigitDisable, %function\r
- 2347                  CyVdLvDigitDisable:\r
- 2348                  .LFB48:\r
-1955:.\Generated_Source\PSoC5/CyLib.c **** }\r
-1956:.\Generated_Source\PSoC5/CyLib.c **** \r
-1957:.\Generated_Source\PSoC5/CyLib.c **** \r
-1958:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1959:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdLvDigitDisable\r
-1960:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1961:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1962:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1963:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the digital low voltage monitor (interrupt and device reset are\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 80\r
-\r
-\r
-1964:.\Generated_Source\PSoC5/CyLib.c **** *  disabled).\r
-1965:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1966:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1967:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1968:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1969:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1970:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1971:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1972:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-1973:.\Generated_Source\PSoC5/CyLib.c **** void CyVdLvDigitDisable(void) \r
-1974:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2349                          .loc 1 1974 0\r
- 2350                          .cfi_startproc\r
- 2351                          @ args = 0, pretend = 0, frame = 0\r
- 2352                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2353                          @ link register save eliminated.\r
-1975:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_LVID_EN));\r
- 2354                          .loc 1 1975 0\r
- 2355 0000 064B                ldr     r3, .L266\r
- 2356 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2357 0004 02F0FE00            and     r0, r2, #254\r
- 2358 0008 1870                strb    r0, [r3, #0]\r
-1976:.\Generated_Source\PSoC5/CyLib.c **** \r
-1977:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
- 2359                          .loc 1 1977 0\r
- 2360 000a 9978                ldrb    r1, [r3, #2]    @ zero_extendqisi2\r
- 2361 000c 01F0BF02            and     r2, r1, #191\r
- 2362 0010 9A70                strb    r2, [r3, #2]\r
- 2363                  .L264:\r
-1978:.\Generated_Source\PSoC5/CyLib.c **** \r
-1979:.\Generated_Source\PSoC5/CyLib.c ****     while(0u != (CY_VD_PERSISTENT_STATUS_REG & 0x07u))\r
- 2364                          .loc 1 1979 0 discriminator 1\r
- 2365 0012 034B                ldr     r3, .L266+4\r
- 2366 0014 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 2367 0016 4307                lsls    r3, r0, #29\r
- 2368 0018 FBD1                bne     .L264\r
-1980:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-1981:.\Generated_Source\PSoC5/CyLib.c **** \r
-1982:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-1983:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2369                          .loc 1 1983 0\r
- 2370 001a 7047                bx      lr\r
- 2371                  .L267:\r
- 2372                          .align  2\r
- 2373                  .L266:\r
- 2374 001c F5460040            .word   1073759989\r
- 2375 0020 FA460040            .word   1073759994\r
- 2376                          .cfi_endproc\r
- 2377                  .LFE48:\r
- 2378                          .size   CyVdLvDigitDisable, .-CyVdLvDigitDisable\r
- 2379                          .section        .text.CyVdLvAnalogDisable,"ax",%progbits\r
- 2380                          .align  1\r
- 2381                          .global CyVdLvAnalogDisable\r
- 2382                          .thumb\r
- 2383                          .thumb_func\r
- 2384                          .type   CyVdLvAnalogDisable, %function\r
- 2385                  CyVdLvAnalogDisable:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 81\r
-\r
-\r
- 2386                  .LFB49:\r
-1984:.\Generated_Source\PSoC5/CyLib.c **** \r
-1985:.\Generated_Source\PSoC5/CyLib.c **** \r
-1986:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-1987:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdLvAnalogDisable\r
-1988:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-1989:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1990:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-1991:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the analog low voltage monitor (interrupt and device reset are\r
-1992:.\Generated_Source\PSoC5/CyLib.c **** *  disabled).\r
-1993:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1994:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-1995:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1996:.\Generated_Source\PSoC5/CyLib.c **** *\r
-1997:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-1998:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-1999:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2000:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2001:.\Generated_Source\PSoC5/CyLib.c **** void CyVdLvAnalogDisable(void) \r
-2002:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2387                          .loc 1 2002 0\r
- 2388                          .cfi_startproc\r
- 2389                          @ args = 0, pretend = 0, frame = 0\r
- 2390                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2391                          @ link register save eliminated.\r
-2003:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_LVIA_EN));\r
- 2392                          .loc 1 2003 0\r
- 2393 0000 064B                ldr     r3, .L271\r
- 2394 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2395 0004 02F0FD00            and     r0, r2, #253\r
- 2396 0008 1870                strb    r0, [r3, #0]\r
-2004:.\Generated_Source\PSoC5/CyLib.c **** \r
-2005:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
- 2397                          .loc 1 2005 0\r
- 2398 000a 9978                ldrb    r1, [r3, #2]    @ zero_extendqisi2\r
- 2399 000c 01F07F02            and     r2, r1, #127\r
- 2400 0010 9A70                strb    r2, [r3, #2]\r
- 2401                  .L269:\r
-2006:.\Generated_Source\PSoC5/CyLib.c **** \r
-2007:.\Generated_Source\PSoC5/CyLib.c ****     while(0u != (CY_VD_PERSISTENT_STATUS_REG & 0x07u))\r
- 2402                          .loc 1 2007 0 discriminator 1\r
- 2403 0012 034B                ldr     r3, .L271+4\r
- 2404 0014 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 2405 0016 4207                lsls    r2, r0, #29\r
- 2406 0018 FBD1                bne     .L269\r
-2008:.\Generated_Source\PSoC5/CyLib.c ****     {\r
-2009:.\Generated_Source\PSoC5/CyLib.c **** \r
-2010:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-2011:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2407                          .loc 1 2011 0\r
- 2408 001a 7047                bx      lr\r
- 2409                  .L272:\r
- 2410                          .align  2\r
- 2411                  .L271:\r
- 2412 001c F5460040            .word   1073759989\r
- 2413 0020 FA460040            .word   1073759994\r
- 2414                          .cfi_endproc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 82\r
-\r
-\r
- 2415                  .LFE49:\r
- 2416                          .size   CyVdLvAnalogDisable, .-CyVdLvAnalogDisable\r
- 2417                          .section        .text.CyVdHvAnalogEnable,"ax",%progbits\r
- 2418                          .align  1\r
- 2419                          .global CyVdHvAnalogEnable\r
- 2420                          .thumb\r
- 2421                          .thumb_func\r
- 2422                          .type   CyVdHvAnalogEnable, %function\r
- 2423                  CyVdHvAnalogEnable:\r
- 2424                  .LFB50:\r
-2012:.\Generated_Source\PSoC5/CyLib.c **** \r
-2013:.\Generated_Source\PSoC5/CyLib.c **** \r
-2014:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2015:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdHvAnalogEnable\r
-2016:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2017:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2018:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2019:.\Generated_Source\PSoC5/CyLib.c **** *  Enables the analog high voltage monitors to generate interrupt on\r
-2020:.\Generated_Source\PSoC5/CyLib.c **** *  Vdda archives 5.75 V threshold and optionally resets device.\r
-2021:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2022:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2023:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2024:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2025:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-2026:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2027:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2028:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2029:.\Generated_Source\PSoC5/CyLib.c **** void CyVdHvAnalogEnable(void) \r
-2030:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2425                          .loc 1 2030 0\r
- 2426                          .cfi_startproc\r
- 2427                          @ args = 0, pretend = 0, frame = 0\r
- 2428                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2429 0000 10B5                push    {r4, lr}\r
- 2430                  .LCFI10:\r
- 2431                          .cfi_def_cfa_offset 8\r
- 2432                          .cfi_offset 4, -8\r
- 2433                          .cfi_offset 14, -4\r
-2031:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2434                          .loc 1 2031 0\r
- 2435 0002 0C4B                ldr     r3, .L274\r
-2032:.\Generated_Source\PSoC5/CyLib.c **** \r
-2033:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
- 2436                          .loc 1 2033 0\r
- 2437 0004 0C48                ldr     r0, .L274+4\r
-2031:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLEAR_PTR = 0x01u;\r
- 2438                          .loc 1 2031 0\r
- 2439 0006 0124                movs    r4, #1\r
- 2440 0008 1C60                str     r4, [r3, #0]\r
- 2441                          .loc 1 2033 0\r
- 2442 000a 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 2443 000c 02F07F01            and     r1, r2, #127\r
- 2444 0010 0170                strb    r1, [r0, #0]\r
-2034:.\Generated_Source\PSoC5/CyLib.c **** \r
-2035:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_HVIA_EN;\r
- 2445                          .loc 1 2035 0\r
- 2446 0012 10F8023C            ldrb    r3, [r0, #-2]   @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 83\r
-\r
-\r
- 2447 0016 43F00402            orr     r2, r3, #4\r
- 2448 001a 00F8022C            strb    r2, [r0, #-2]\r
-2036:.\Generated_Source\PSoC5/CyLib.c **** \r
-2037:.\Generated_Source\PSoC5/CyLib.c ****     /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-2038:.\Generated_Source\PSoC5/CyLib.c ****     CyDelayUs(1u);\r
- 2449                          .loc 1 2038 0\r
- 2450 001e 2046                mov     r0, r4\r
- 2451 0020 FFF7FEFF            bl      CyDelayUs\r
- 2452                  .LVL147:\r
-2039:.\Generated_Source\PSoC5/CyLib.c **** \r
-2040:.\Generated_Source\PSoC5/CyLib.c ****     (void) CY_VD_PERSISTENT_STATUS_REG;\r
-2041:.\Generated_Source\PSoC5/CyLib.c **** \r
-2042:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2453                          .loc 1 2042 0\r
- 2454 0024 0549                ldr     r1, .L274+8\r
-2040:.\Generated_Source\PSoC5/CyLib.c ****     (void) CY_VD_PERSISTENT_STATUS_REG;\r
- 2455                          .loc 1 2040 0\r
- 2456 0026 0648                ldr     r0, .L274+12\r
- 2457 0028 0378                ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
-2043:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_ENABLE_PTR   = 0x01u;\r
- 2458                          .loc 1 2043 0\r
- 2459 002a A1F5C073            sub     r3, r1, #384\r
-2042:.\Generated_Source\PSoC5/CyLib.c ****     *CY_INT_CLR_PEND_PTR = 0x01u;\r
- 2460                          .loc 1 2042 0\r
- 2461 002e 0C60                str     r4, [r1, #0]\r
- 2462                          .loc 1 2043 0\r
- 2463 0030 1C60                str     r4, [r3, #0]\r
- 2464 0032 10BD                pop     {r4, pc}\r
- 2465                  .L275:\r
- 2466                          .align  2\r
- 2467                  .L274:\r
- 2468 0034 80E100E0            .word   -536813184\r
- 2469 0038 F7460040            .word   1073759991\r
- 2470 003c 80E200E0            .word   -536812928\r
- 2471 0040 FA460040            .word   1073759994\r
- 2472                          .cfi_endproc\r
- 2473                  .LFE50:\r
- 2474                          .size   CyVdHvAnalogEnable, .-CyVdHvAnalogEnable\r
- 2475                          .section        .text.CyVdHvAnalogDisable,"ax",%progbits\r
- 2476                          .align  1\r
- 2477                          .global CyVdHvAnalogDisable\r
- 2478                          .thumb\r
- 2479                          .thumb_func\r
- 2480                          .type   CyVdHvAnalogDisable, %function\r
- 2481                  CyVdHvAnalogDisable:\r
- 2482                  .LFB51:\r
-2044:.\Generated_Source\PSoC5/CyLib.c **** }\r
-2045:.\Generated_Source\PSoC5/CyLib.c **** \r
-2046:.\Generated_Source\PSoC5/CyLib.c **** \r
-2047:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2048:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdHvAnalogDisable\r
-2049:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2050:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2051:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2052:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the analog low voltage monitor\r
-2053:.\Generated_Source\PSoC5/CyLib.c **** *  (interrupt and device reset are disabled).\r
-2054:.\Generated_Source\PSoC5/CyLib.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 84\r
-\r
-\r
-2055:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2056:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2057:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2058:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-2059:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2060:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2061:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2062:.\Generated_Source\PSoC5/CyLib.c **** void CyVdHvAnalogDisable(void) \r
-2063:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2483                          .loc 1 2063 0\r
- 2484                          .cfi_startproc\r
- 2485                          @ args = 0, pretend = 0, frame = 0\r
- 2486                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2487                          @ link register save eliminated.\r
-2064:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_HVIA_EN));\r
- 2488                          .loc 1 2064 0\r
- 2489 0000 024B                ldr     r3, .L277\r
- 2490 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2491 0004 02F0FB00            and     r0, r2, #251\r
- 2492 0008 1870                strb    r0, [r3, #0]\r
- 2493 000a 7047                bx      lr\r
- 2494                  .L278:\r
- 2495                          .align  2\r
- 2496                  .L277:\r
- 2497 000c F5460040            .word   1073759989\r
- 2498                          .cfi_endproc\r
- 2499                  .LFE51:\r
- 2500                          .size   CyVdHvAnalogDisable, .-CyVdHvAnalogDisable\r
- 2501                          .section        .text.CyVdStickyStatus,"ax",%progbits\r
- 2502                          .align  1\r
- 2503                          .global CyVdStickyStatus\r
- 2504                          .thumb\r
- 2505                          .thumb_func\r
- 2506                          .type   CyVdStickyStatus, %function\r
- 2507                  CyVdStickyStatus:\r
- 2508                  .LFB52:\r
-2065:.\Generated_Source\PSoC5/CyLib.c **** }\r
-2066:.\Generated_Source\PSoC5/CyLib.c **** \r
-2067:.\Generated_Source\PSoC5/CyLib.c **** \r
-2068:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2069:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdStickyStatus\r
-2070:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2071:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2072:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2073:.\Generated_Source\PSoC5/CyLib.c **** *  Manages the Reset and Voltage Detection Status Register 0.\r
-2074:.\Generated_Source\PSoC5/CyLib.c **** *  This register has the interrupt status for the HVIA, LVID and LVIA.\r
-2075:.\Generated_Source\PSoC5/CyLib.c **** *  This hardware register clears on read.\r
-2076:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2077:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2078:.\Generated_Source\PSoC5/CyLib.c **** *  mask: Bits in the shadow register to clear.\r
-2079:.\Generated_Source\PSoC5/CyLib.c **** *   Define                  Definition\r
-2080:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_LVID            Persistent status of digital LVI.\r
-2081:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_LVIA            Persistent status of analog LVI.\r
-2082:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_HVIA            Persistent status of analog HVI.\r
-2083:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2084:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-2085:.\Generated_Source\PSoC5/CyLib.c **** *  Status.  Same enumerated bit values as used for the mask parameter.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 85\r
-\r
-\r
-2086:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2087:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2088:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyVdStickyStatus(uint8 mask) \r
-2089:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2509                          .loc 1 2089 0\r
- 2510                          .cfi_startproc\r
- 2511                          @ args = 0, pretend = 0, frame = 0\r
- 2512                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2513                          @ link register save eliminated.\r
- 2514                  .LVL148:\r
-2090:.\Generated_Source\PSoC5/CyLib.c ****     uint8 status;\r
-2091:.\Generated_Source\PSoC5/CyLib.c **** \r
-2092:.\Generated_Source\PSoC5/CyLib.c ****     status = CY_VD_PERSISTENT_STATUS_REG;\r
- 2515                          .loc 1 2092 0\r
- 2516 0000 034B                ldr     r3, .L280\r
- 2517 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 2518                  .LVL149:\r
-2093:.\Generated_Source\PSoC5/CyLib.c ****     CY_VD_PERSISTENT_STATUS_REG &= ((uint8)(~mask));\r
- 2519                          .loc 1 2093 0\r
- 2520 0004 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 2521 0006 21EA0000            bic     r0, r1, r0\r
- 2522                  .LVL150:\r
- 2523 000a 1870                strb    r0, [r3, #0]\r
-2094:.\Generated_Source\PSoC5/CyLib.c **** \r
-2095:.\Generated_Source\PSoC5/CyLib.c ****     return(status);\r
-2096:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2524                          .loc 1 2096 0\r
- 2525 000c 1046                mov     r0, r2\r
- 2526 000e 7047                bx      lr\r
- 2527                  .L281:\r
- 2528                          .align  2\r
- 2529                  .L280:\r
- 2530 0010 FA460040            .word   1073759994\r
- 2531                          .cfi_endproc\r
- 2532                  .LFE52:\r
- 2533                          .size   CyVdStickyStatus, .-CyVdStickyStatus\r
- 2534                          .section        .text.CyVdRealTimeStatus,"ax",%progbits\r
- 2535                          .align  1\r
- 2536                          .global CyVdRealTimeStatus\r
- 2537                          .thumb\r
- 2538                          .thumb_func\r
- 2539                          .type   CyVdRealTimeStatus, %function\r
- 2540                  CyVdRealTimeStatus:\r
- 2541                  .LFB53:\r
-2097:.\Generated_Source\PSoC5/CyLib.c **** \r
-2098:.\Generated_Source\PSoC5/CyLib.c **** \r
-2099:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2100:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyVdRealTimeStatus\r
-2101:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2102:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2103:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2104:.\Generated_Source\PSoC5/CyLib.c **** *  Returns the real time voltage detection status.\r
-2105:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2106:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2107:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2108:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2109:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 86\r
-\r
-\r
-2110:.\Generated_Source\PSoC5/CyLib.c **** *  Status:\r
-2111:.\Generated_Source\PSoC5/CyLib.c **** *   Define                  Definition\r
-2112:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_LVID            Persistent status of digital LVI.\r
-2113:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_LVIA            Persistent status of analog LVI.\r
-2114:.\Generated_Source\PSoC5/CyLib.c **** *   CY_VD_HVIA            Persistent status of analog HVI.\r
-2115:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2116:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2117:.\Generated_Source\PSoC5/CyLib.c **** uint8 CyVdRealTimeStatus(void) \r
-2118:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2542                          .loc 1 2118 0\r
- 2543                          .cfi_startproc\r
- 2544                          @ args = 0, pretend = 0, frame = 0\r
- 2545                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2546 0000 10B5                push    {r4, lr}\r
- 2547                  .LCFI11:\r
- 2548                          .cfi_def_cfa_offset 8\r
- 2549                          .cfi_offset 4, -8\r
- 2550                          .cfi_offset 14, -4\r
-2119:.\Generated_Source\PSoC5/CyLib.c ****     uint8 interruptState;\r
-2120:.\Generated_Source\PSoC5/CyLib.c ****     uint8 vdFlagsState;\r
-2121:.\Generated_Source\PSoC5/CyLib.c **** \r
-2122:.\Generated_Source\PSoC5/CyLib.c ****     interruptState = CyEnterCriticalSection();\r
- 2551                          .loc 1 2122 0\r
- 2552 0002 FFF7FEFF            bl      CyEnterCriticalSection\r
- 2553                  .LVL151:\r
-2123:.\Generated_Source\PSoC5/CyLib.c ****     vdFlagsState = CY_VD_RT_STATUS_REG;\r
- 2554                          .loc 1 2123 0\r
- 2555 0006 034B                ldr     r3, .L283\r
- 2556 0008 1C78                ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 2557                  .LVL152:\r
-2124:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
- 2558                          .loc 1 2124 0\r
- 2559 000a FFF7FEFF            bl      CyExitCriticalSection\r
- 2560                  .LVL153:\r
-2125:.\Generated_Source\PSoC5/CyLib.c **** \r
-2126:.\Generated_Source\PSoC5/CyLib.c ****     return(vdFlagsState);\r
-2127:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2561                          .loc 1 2127 0\r
- 2562 000e 2046                mov     r0, r4\r
- 2563 0010 10BD                pop     {r4, pc}\r
- 2564                  .L284:\r
- 2565 0012 00BF                .align  2\r
- 2566                  .L283:\r
- 2567 0014 FC460040            .word   1073759996\r
- 2568                          .cfi_endproc\r
- 2569                  .LFE53:\r
- 2570                          .size   CyVdRealTimeStatus, .-CyVdRealTimeStatus\r
- 2571                          .section        .text.CyDisableInts,"ax",%progbits\r
- 2572                          .align  1\r
- 2573                          .global CyDisableInts\r
- 2574                          .thumb\r
- 2575                          .thumb_func\r
- 2576                          .type   CyDisableInts, %function\r
- 2577                  CyDisableInts:\r
- 2578                  .LFB54:\r
-2128:.\Generated_Source\PSoC5/CyLib.c **** \r
-2129:.\Generated_Source\PSoC5/CyLib.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 87\r
-\r
-\r
-2130:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2131:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyDisableInts\r
-2132:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2133:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2134:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2135:.\Generated_Source\PSoC5/CyLib.c **** *  Disables the interrupt enable for each interrupt.\r
-2136:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2137:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2138:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2139:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2140:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-2141:.\Generated_Source\PSoC5/CyLib.c **** *  32 bit mask of previously enabled interrupts.\r
-2142:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2143:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2144:.\Generated_Source\PSoC5/CyLib.c **** uint32 CyDisableInts(void) \r
-2145:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2579                          .loc 1 2145 0\r
- 2580                          .cfi_startproc\r
- 2581                          @ args = 0, pretend = 0, frame = 0\r
- 2582                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2583 0000 10B5                push    {r4, lr}\r
- 2584                  .LCFI12:\r
- 2585                          .cfi_def_cfa_offset 8\r
- 2586                          .cfi_offset 4, -8\r
- 2587                          .cfi_offset 14, -4\r
-2146:.\Generated_Source\PSoC5/CyLib.c ****     uint32 intState;\r
-2147:.\Generated_Source\PSoC5/CyLib.c ****     uint8 interruptState;\r
-2148:.\Generated_Source\PSoC5/CyLib.c **** \r
-2149:.\Generated_Source\PSoC5/CyLib.c ****     interruptState = CyEnterCriticalSection();\r
- 2588                          .loc 1 2149 0\r
- 2589 0002 FFF7FEFF            bl      CyEnterCriticalSection\r
- 2590                  .LVL154:\r
-2150:.\Generated_Source\PSoC5/CyLib.c **** \r
-2151:.\Generated_Source\PSoC5/CyLib.c ****     #if(CY_PSOC3)\r
-2152:.\Generated_Source\PSoC5/CyLib.c **** \r
-2153:.\Generated_Source\PSoC5/CyLib.c ****         /* Get the current interrupt state. */\r
-2154:.\Generated_Source\PSoC5/CyLib.c ****         intState  = ((uint32) CY_GET_REG8(CY_INT_CLR_EN0_PTR));\r
-2155:.\Generated_Source\PSoC5/CyLib.c ****         intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN1_PTR)) << 8u));\r
-2156:.\Generated_Source\PSoC5/CyLib.c ****         intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN2_PTR)) << 16u));\r
-2157:.\Generated_Source\PSoC5/CyLib.c ****         intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN3_PTR)) << 24u));\r
-2158:.\Generated_Source\PSoC5/CyLib.c **** \r
-2159:.\Generated_Source\PSoC5/CyLib.c **** \r
-2160:.\Generated_Source\PSoC5/CyLib.c ****         /* Disable all of the interrupts. */\r
-2161:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_CLR_EN0_PTR, 0xFFu);\r
-2162:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_CLR_EN1_PTR, 0xFFu);\r
-2163:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_CLR_EN2_PTR, 0xFFu);\r
-2164:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_CLR_EN3_PTR, 0xFFu);\r
-2165:.\Generated_Source\PSoC5/CyLib.c **** \r
-2166:.\Generated_Source\PSoC5/CyLib.c ****     #else\r
-2167:.\Generated_Source\PSoC5/CyLib.c **** \r
-2168:.\Generated_Source\PSoC5/CyLib.c ****         /* Get the current interrupt state. */\r
-2169:.\Generated_Source\PSoC5/CyLib.c ****         intState = CY_GET_REG32(CY_INT_CLEAR_PTR);\r
- 2591                          .loc 1 2169 0\r
- 2592 0006 044B                ldr     r3, .L286\r
-2170:.\Generated_Source\PSoC5/CyLib.c **** \r
-2171:.\Generated_Source\PSoC5/CyLib.c ****         /* Disable all of the interrupts. */\r
-2172:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG32(CY_INT_CLEAR_PTR, 0xFFFFFFFFu);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 88\r
-\r
-\r
- 2593                          .loc 1 2172 0\r
- 2594 0008 4FF0FF32            mov     r2, #-1\r
-2169:.\Generated_Source\PSoC5/CyLib.c ****         intState = CY_GET_REG32(CY_INT_CLEAR_PTR);\r
- 2595                          .loc 1 2169 0\r
- 2596 000c 1C68                ldr     r4, [r3, #0]\r
- 2597                  .LVL155:\r
- 2598                          .loc 1 2172 0\r
- 2599 000e 1A60                str     r2, [r3, #0]\r
-2173:.\Generated_Source\PSoC5/CyLib.c **** \r
-2174:.\Generated_Source\PSoC5/CyLib.c ****     #endif /* (CY_PSOC3) */\r
-2175:.\Generated_Source\PSoC5/CyLib.c **** \r
-2176:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
- 2600                          .loc 1 2176 0\r
- 2601 0010 FFF7FEFF            bl      CyExitCriticalSection\r
- 2602                  .LVL156:\r
-2177:.\Generated_Source\PSoC5/CyLib.c **** \r
-2178:.\Generated_Source\PSoC5/CyLib.c ****     return (intState);\r
-2179:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2603                          .loc 1 2179 0\r
- 2604 0014 2046                mov     r0, r4\r
- 2605 0016 10BD                pop     {r4, pc}\r
- 2606                  .L287:\r
- 2607                          .align  2\r
- 2608                  .L286:\r
- 2609 0018 80E100E0            .word   -536813184\r
- 2610                          .cfi_endproc\r
- 2611                  .LFE54:\r
- 2612                          .size   CyDisableInts, .-CyDisableInts\r
- 2613                          .section        .text.CyEnableInts,"ax",%progbits\r
- 2614                          .align  1\r
- 2615                          .global CyEnableInts\r
- 2616                          .thumb\r
- 2617                          .thumb_func\r
- 2618                          .type   CyEnableInts, %function\r
- 2619                  CyEnableInts:\r
- 2620                  .LFB55:\r
-2180:.\Generated_Source\PSoC5/CyLib.c **** \r
-2181:.\Generated_Source\PSoC5/CyLib.c **** \r
-2182:.\Generated_Source\PSoC5/CyLib.c **** /*******************************************************************************\r
-2183:.\Generated_Source\PSoC5/CyLib.c **** * Function Name: CyEnableInts\r
-2184:.\Generated_Source\PSoC5/CyLib.c **** ********************************************************************************\r
-2185:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2186:.\Generated_Source\PSoC5/CyLib.c **** * Summary:\r
-2187:.\Generated_Source\PSoC5/CyLib.c **** *  Enables interrupts to a given state.\r
-2188:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2189:.\Generated_Source\PSoC5/CyLib.c **** * Parameters:\r
-2190:.\Generated_Source\PSoC5/CyLib.c **** *  uint32 mask: 32 bit mask of interrupts to enable.\r
-2191:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2192:.\Generated_Source\PSoC5/CyLib.c **** * Return:\r
-2193:.\Generated_Source\PSoC5/CyLib.c **** *  None\r
-2194:.\Generated_Source\PSoC5/CyLib.c **** *\r
-2195:.\Generated_Source\PSoC5/CyLib.c **** *******************************************************************************/\r
-2196:.\Generated_Source\PSoC5/CyLib.c **** void CyEnableInts(uint32 mask) \r
-2197:.\Generated_Source\PSoC5/CyLib.c **** {\r
- 2621                          .loc 1 2197 0\r
- 2622                          .cfi_startproc\r
- 2623                          @ args = 0, pretend = 0, frame = 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 89\r
-\r
-\r
- 2624                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2625                  .LVL157:\r
- 2626 0000 10B5                push    {r4, lr}\r
- 2627                  .LCFI13:\r
- 2628                          .cfi_def_cfa_offset 8\r
- 2629                          .cfi_offset 4, -8\r
- 2630                          .cfi_offset 14, -4\r
- 2631                          .loc 1 2197 0\r
- 2632 0002 0446                mov     r4, r0\r
-2198:.\Generated_Source\PSoC5/CyLib.c **** \r
-2199:.\Generated_Source\PSoC5/CyLib.c ****     uint8 interruptState;\r
-2200:.\Generated_Source\PSoC5/CyLib.c **** \r
-2201:.\Generated_Source\PSoC5/CyLib.c ****     interruptState = CyEnterCriticalSection();\r
- 2633                          .loc 1 2201 0\r
- 2634 0004 FFF7FEFF            bl      CyEnterCriticalSection\r
- 2635                  .LVL158:\r
-2202:.\Generated_Source\PSoC5/CyLib.c **** \r
-2203:.\Generated_Source\PSoC5/CyLib.c ****     #if(CY_PSOC3)\r
-2204:.\Generated_Source\PSoC5/CyLib.c **** \r
-2205:.\Generated_Source\PSoC5/CyLib.c ****         /* Set interrupts as enabled. */\r
-2206:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_SET_EN3_PTR, ((uint8) (mask >> 24u)));\r
-2207:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_SET_EN2_PTR, ((uint8) (mask >> 16u)));\r
-2208:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_SET_EN1_PTR, ((uint8) (mask >> 8u )));\r
-2209:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG8(CY_INT_SET_EN0_PTR, ((uint8) (mask )));\r
-2210:.\Generated_Source\PSoC5/CyLib.c **** \r
-2211:.\Generated_Source\PSoC5/CyLib.c ****     #else\r
-2212:.\Generated_Source\PSoC5/CyLib.c **** \r
-2213:.\Generated_Source\PSoC5/CyLib.c ****         CY_SET_REG32(CY_INT_ENABLE_PTR, mask);\r
- 2636                          .loc 1 2213 0\r
- 2637 0008 024B                ldr     r3, .L289\r
- 2638 000a 1C60                str     r4, [r3, #0]\r
-2214:.\Generated_Source\PSoC5/CyLib.c **** \r
-2215:.\Generated_Source\PSoC5/CyLib.c ****     #endif /* (CY_PSOC3) */\r
-2216:.\Generated_Source\PSoC5/CyLib.c **** \r
-2217:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
-2218:.\Generated_Source\PSoC5/CyLib.c **** \r
-2219:.\Generated_Source\PSoC5/CyLib.c **** }\r
- 2639                          .loc 1 2219 0\r
- 2640 000c BDE81040            pop     {r4, lr}\r
-2217:.\Generated_Source\PSoC5/CyLib.c ****     CyExitCriticalSection(interruptState);\r
- 2641                          .loc 1 2217 0\r
- 2642 0010 FFF7FEBF            b       CyExitCriticalSection\r
- 2643                  .LVL159:\r
- 2644                  .L290:\r
- 2645                          .align  2\r
- 2646                  .L289:\r
- 2647 0014 00E100E0            .word   -536813312\r
- 2648                          .cfi_endproc\r
- 2649                  .LFE55:\r
- 2650                          .size   CyEnableInts, .-CyEnableInts\r
- 2651                          .section        .text.CyFlushCache,"ax",%progbits\r
- 2652                          .align  1\r
- 2653                          .global CyFlushCache\r
- 2654                          .thumb\r
- 2655                          .thumb_func\r
- 2656                          .type   CyFlushCache, %function\r
- 2657                  CyFlushCache:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 90\r
-\r
-\r
- 2658                  .LFB56:\r
-2220:.\Generated_Source\PSoC5/CyLib.c **** \r
-2221:.\Generated_Source\PSoC5/CyLib.c **** #if(CY_PSOC5)\r
-2222:.\Generated_Source\PSoC5/CyLib.c **** \r
-2223:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2224:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyFlushCache\r
-2225:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2226:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2227:.\Generated_Source\PSoC5/CyLib.c ****     *  Flushes the PSoC 5/5LP cache by invalidating all entries.\r
-2228:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2229:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2230:.\Generated_Source\PSoC5/CyLib.c ****     *  None\r
-2231:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2232:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2233:.\Generated_Source\PSoC5/CyLib.c ****     *  None\r
-2234:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2235:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2236:.\Generated_Source\PSoC5/CyLib.c ****     void CyFlushCache(void)\r
-2237:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2659                          .loc 1 2237 0\r
- 2660                          .cfi_startproc\r
- 2661                          @ args = 0, pretend = 0, frame = 0\r
- 2662                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2663 0000 08B5                push    {r3, lr}\r
- 2664                  .LCFI14:\r
- 2665                          .cfi_def_cfa_offset 8\r
- 2666                          .cfi_offset 3, -8\r
- 2667                          .cfi_offset 14, -4\r
-2238:.\Generated_Source\PSoC5/CyLib.c ****         uint8 interruptState;\r
-2239:.\Generated_Source\PSoC5/CyLib.c **** \r
-2240:.\Generated_Source\PSoC5/CyLib.c ****         /* Save current global interrupt enable and disable it */\r
-2241:.\Generated_Source\PSoC5/CyLib.c ****         interruptState = CyEnterCriticalSection();\r
- 2668                          .loc 1 2241 0\r
- 2669 0002 FFF7FEFF            bl      CyEnterCriticalSection\r
- 2670                  .LVL160:\r
-2242:.\Generated_Source\PSoC5/CyLib.c **** \r
-2243:.\Generated_Source\PSoC5/CyLib.c ****         /* Fill instruction prefectch unit to insure data integrity */\r
-2244:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2671                          .loc 1 2244 0\r
- 2672                  @ 2244 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2673 0006 00BF                NOP\r
- 2674                  \r
- 2675                  @ 0 "" 2\r
-2245:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2676                          .loc 1 2245 0\r
- 2677                  @ 2245 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2678 0008 00BF                NOP\r
- 2679                  \r
- 2680                  @ 0 "" 2\r
-2246:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2681                          .loc 1 2246 0\r
- 2682                  @ 2246 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2683 000a 00BF                NOP\r
- 2684                  \r
- 2685                  @ 0 "" 2\r
-2247:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2686                          .loc 1 2247 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 91\r
-\r
-\r
- 2687                  @ 2247 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2688 000c 00BF                NOP\r
- 2689                  \r
- 2690                  @ 0 "" 2\r
-2248:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2691                          .loc 1 2248 0\r
- 2692                  @ 2248 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2693 000e 00BF                NOP\r
- 2694                  \r
- 2695                  @ 0 "" 2\r
-2249:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2696                          .loc 1 2249 0\r
- 2697                  @ 2249 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2698 0010 00BF                NOP\r
- 2699                  \r
- 2700                  @ 0 "" 2\r
-2250:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2701                          .loc 1 2250 0\r
- 2702                  @ 2250 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2703 0012 00BF                NOP\r
- 2704                  \r
- 2705                  @ 0 "" 2\r
-2251:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2706                          .loc 1 2251 0\r
- 2707                  @ 2251 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2708 0014 00BF                NOP\r
- 2709                  \r
- 2710                  @ 0 "" 2\r
-2252:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2711                          .loc 1 2252 0\r
- 2712                  @ 2252 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2713 0016 00BF                NOP\r
- 2714                  \r
- 2715                  @ 0 "" 2\r
-2253:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2716                          .loc 1 2253 0\r
- 2717                  @ 2253 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2718 0018 00BF                NOP\r
- 2719                  \r
- 2720                  @ 0 "" 2\r
-2254:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2721                          .loc 1 2254 0\r
- 2722                  @ 2254 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2723 001a 00BF                NOP\r
- 2724                  \r
- 2725                  @ 0 "" 2\r
-2255:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2726                          .loc 1 2255 0\r
- 2727                  @ 2255 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2728 001c 00BF                NOP\r
- 2729                  \r
- 2730                  @ 0 "" 2\r
-2256:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2731                          .loc 1 2256 0\r
- 2732                  @ 2256 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2733 001e 00BF                NOP\r
- 2734                  \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 92\r
-\r
-\r
- 2735                  @ 0 "" 2\r
-2257:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2736                          .loc 1 2257 0\r
- 2737                  @ 2257 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2738 0020 00BF                NOP\r
- 2739                  \r
- 2740                  @ 0 "" 2\r
-2258:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2741                          .loc 1 2258 0\r
- 2742                  @ 2258 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2743 0022 00BF                NOP\r
- 2744                  \r
- 2745                  @ 0 "" 2\r
-2259:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2746                          .loc 1 2259 0\r
- 2747                  @ 2259 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2748 0024 00BF                NOP\r
- 2749                  \r
- 2750                  @ 0 "" 2\r
-2260:.\Generated_Source\PSoC5/CyLib.c **** \r
-2261:.\Generated_Source\PSoC5/CyLib.c ****         /* All entries in the cache are invalidated on the next clock cycle. */\r
-2262:.\Generated_Source\PSoC5/CyLib.c ****         CY_CACHE_CONTROL_REG |= CY_CACHE_CONTROL_FLUSH;\r
- 2751                          .loc 1 2262 0\r
- 2752                          .thumb\r
- 2753 0026 0D4B                ldr     r3, .L292\r
- 2754 0028 1A88                ldrh    r2, [r3, #0]\r
- 2755 002a 91B2                uxth    r1, r2\r
- 2756 002c 41F00402            orr     r2, r1, #4\r
- 2757 0030 1A80                strh    r2, [r3, #0]    @ movhi\r
-2263:.\Generated_Source\PSoC5/CyLib.c **** \r
-2264:.\Generated_Source\PSoC5/CyLib.c **** \r
-2265:.\Generated_Source\PSoC5/CyLib.c ****         /***********************************************************************\r
-2266:.\Generated_Source\PSoC5/CyLib.c ****         * The prefetch unit could/would be filled with the instructions that\r
-2267:.\Generated_Source\PSoC5/CyLib.c ****         * succeed the flush. Since a flush is desired then theoretically those\r
-2268:.\Generated_Source\PSoC5/CyLib.c ****         * instructions might be considered stale/invalid.\r
-2269:.\Generated_Source\PSoC5/CyLib.c ****         ***********************************************************************/\r
-2270:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2758                          .loc 1 2270 0\r
- 2759                  @ 2270 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2760 0032 00BF                NOP\r
- 2761                  \r
- 2762                  @ 0 "" 2\r
-2271:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2763                          .loc 1 2271 0\r
- 2764                  @ 2271 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2765 0034 00BF                NOP\r
- 2766                  \r
- 2767                  @ 0 "" 2\r
-2272:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2768                          .loc 1 2272 0\r
- 2769                  @ 2272 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2770 0036 00BF                NOP\r
- 2771                  \r
- 2772                  @ 0 "" 2\r
-2273:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2773                          .loc 1 2273 0\r
- 2774                  @ 2273 ".\Generated_Source\PSoC5\CyLib.c" 1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 93\r
-\r
-\r
- 2775 0038 00BF                NOP\r
- 2776                  \r
- 2777                  @ 0 "" 2\r
-2274:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2778                          .loc 1 2274 0\r
- 2779                  @ 2274 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2780 003a 00BF                NOP\r
- 2781                  \r
- 2782                  @ 0 "" 2\r
-2275:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2783                          .loc 1 2275 0\r
- 2784                  @ 2275 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2785 003c 00BF                NOP\r
- 2786                  \r
- 2787                  @ 0 "" 2\r
-2276:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2788                          .loc 1 2276 0\r
- 2789                  @ 2276 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2790 003e 00BF                NOP\r
- 2791                  \r
- 2792                  @ 0 "" 2\r
-2277:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2793                          .loc 1 2277 0\r
- 2794                  @ 2277 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2795 0040 00BF                NOP\r
- 2796                  \r
- 2797                  @ 0 "" 2\r
-2278:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2798                          .loc 1 2278 0\r
- 2799                  @ 2278 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2800 0042 00BF                NOP\r
- 2801                  \r
- 2802                  @ 0 "" 2\r
-2279:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2803                          .loc 1 2279 0\r
- 2804                  @ 2279 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2805 0044 00BF                NOP\r
- 2806                  \r
- 2807                  @ 0 "" 2\r
-2280:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2808                          .loc 1 2280 0\r
- 2809                  @ 2280 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2810 0046 00BF                NOP\r
- 2811                  \r
- 2812                  @ 0 "" 2\r
-2281:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2813                          .loc 1 2281 0\r
- 2814                  @ 2281 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2815 0048 00BF                NOP\r
- 2816                  \r
- 2817                  @ 0 "" 2\r
-2282:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2818                          .loc 1 2282 0\r
- 2819                  @ 2282 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2820 004a 00BF                NOP\r
- 2821                  \r
- 2822                  @ 0 "" 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 94\r
-\r
-\r
-2283:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2823                          .loc 1 2283 0\r
- 2824                  @ 2283 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2825 004c 00BF                NOP\r
- 2826                  \r
- 2827                  @ 0 "" 2\r
-2284:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2828                          .loc 1 2284 0\r
- 2829                  @ 2284 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2830 004e 00BF                NOP\r
- 2831                  \r
- 2832                  @ 0 "" 2\r
-2285:.\Generated_Source\PSoC5/CyLib.c ****         CY_NOP;\r
- 2833                          .loc 1 2285 0\r
- 2834                  @ 2285 ".\Generated_Source\PSoC5\CyLib.c" 1\r
- 2835 0050 00BF                NOP\r
- 2836                  \r
- 2837                  @ 0 "" 2\r
-2286:.\Generated_Source\PSoC5/CyLib.c **** \r
-2287:.\Generated_Source\PSoC5/CyLib.c ****         /* Restore global interrupt enable state */\r
-2288:.\Generated_Source\PSoC5/CyLib.c ****         CyExitCriticalSection(interruptState);\r
-2289:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 2838                          .loc 1 2289 0\r
- 2839                          .thumb\r
- 2840 0052 BDE80840            pop     {r3, lr}\r
-2288:.\Generated_Source\PSoC5/CyLib.c ****         CyExitCriticalSection(interruptState);\r
- 2841                          .loc 1 2288 0\r
- 2842 0056 FFF7FEBF            b       CyExitCriticalSection\r
- 2843                  .LVL161:\r
- 2844                  .L293:\r
- 2845 005a 00BF                .align  2\r
- 2846                  .L292:\r
- 2847 005c 00480040            .word   1073760256\r
- 2848                          .cfi_endproc\r
- 2849                  .LFE56:\r
- 2850                          .size   CyFlushCache, .-CyFlushCache\r
- 2851                          .section        .text.CyIntSetSysVector,"ax",%progbits\r
- 2852                          .align  1\r
- 2853                          .global CyIntSetSysVector\r
- 2854                          .thumb\r
- 2855                          .thumb_func\r
- 2856                          .type   CyIntSetSysVector, %function\r
- 2857                  CyIntSetSysVector:\r
- 2858                  .LFB57:\r
-2290:.\Generated_Source\PSoC5/CyLib.c **** \r
-2291:.\Generated_Source\PSoC5/CyLib.c **** \r
-2292:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2293:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntSetSysVector\r
-2294:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2295:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2296:.\Generated_Source\PSoC5/CyLib.c ****     *  Sets the interrupt vector of the specified system interrupt number. System\r
-2297:.\Generated_Source\PSoC5/CyLib.c ****     *  interrupts are present only for the ARM platform. These interrupts are for\r
-2298:.\Generated_Source\PSoC5/CyLib.c ****     *  SysTick, PendSV and others.\r
-2299:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2300:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2301:.\Generated_Source\PSoC5/CyLib.c ****     *  number: Interrupt number, valid range [0-15].\r
-2302:.\Generated_Source\PSoC5/CyLib.c ****        address: Pointer to an interrupt service routine.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 95\r
-\r
-\r
-2303:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2304:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2305:.\Generated_Source\PSoC5/CyLib.c ****     *   The old ISR vector at this location.\r
-2306:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2307:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2308:.\Generated_Source\PSoC5/CyLib.c ****     cyisraddress CyIntSetSysVector(uint8 number, cyisraddress address)\r
-2309:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2859                          .loc 1 2309 0\r
- 2860                          .cfi_startproc\r
- 2861                          @ args = 0, pretend = 0, frame = 0\r
- 2862                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2863                          @ link register save eliminated.\r
- 2864                  .LVL162:\r
-2310:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress oldIsr;\r
-2311:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-2312:.\Generated_Source\PSoC5/CyLib.c **** \r
-2313:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_SYS_NUMBER_MAX);\r
-2314:.\Generated_Source\PSoC5/CyLib.c **** \r
-2315:.\Generated_Source\PSoC5/CyLib.c ****         /* Save old Interrupt service routine. */\r
-2316:.\Generated_Source\PSoC5/CyLib.c ****         oldIsr = ramVectorTable[number & CY_INT_SYS_NUMBER_MASK];\r
- 2865                          .loc 1 2316 0\r
- 2866 0000 044B                ldr     r3, .L295\r
- 2867                  .LVL163:\r
- 2868 0002 00F00F02            and     r2, r0, #15\r
- 2869 0006 1B68                ldr     r3, [r3, #0]\r
- 2870                  .LVL164:\r
- 2871 0008 53F82200            ldr     r0, [r3, r2, lsl #2]\r
- 2872                  .LVL165:\r
-2317:.\Generated_Source\PSoC5/CyLib.c **** \r
-2318:.\Generated_Source\PSoC5/CyLib.c ****         /* Set new Interrupt service routine. */\r
-2319:.\Generated_Source\PSoC5/CyLib.c ****         ramVectorTable[number & CY_INT_SYS_NUMBER_MASK] = address;\r
- 2873                          .loc 1 2319 0\r
- 2874 000c 43F82210            str     r1, [r3, r2, lsl #2]\r
-2320:.\Generated_Source\PSoC5/CyLib.c **** \r
-2321:.\Generated_Source\PSoC5/CyLib.c ****         return (oldIsr);\r
-2322:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 2875                          .loc 1 2322 0\r
- 2876 0010 7047                bx      lr\r
- 2877                  .L296:\r
- 2878 0012 00BF                .align  2\r
- 2879                  .L295:\r
- 2880 0014 08ED00E0            .word   -536810232\r
- 2881                          .cfi_endproc\r
- 2882                  .LFE57:\r
- 2883                          .size   CyIntSetSysVector, .-CyIntSetSysVector\r
- 2884                          .section        .text.CyIntGetSysVector,"ax",%progbits\r
- 2885                          .align  1\r
- 2886                          .global CyIntGetSysVector\r
- 2887                          .thumb\r
- 2888                          .thumb_func\r
- 2889                          .type   CyIntGetSysVector, %function\r
- 2890                  CyIntGetSysVector:\r
- 2891                  .LFB58:\r
-2323:.\Generated_Source\PSoC5/CyLib.c **** \r
-2324:.\Generated_Source\PSoC5/CyLib.c **** \r
-2325:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2326:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntGetSysVector\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 96\r
-\r
-\r
-2327:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2328:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2329:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2330:.\Generated_Source\PSoC5/CyLib.c ****     *  Gets the interrupt vector of the specified system interrupt number. System\r
-2331:.\Generated_Source\PSoC5/CyLib.c ****     *  interrupts are present only for the ARM platform. These interrupts are for\r
-2332:.\Generated_Source\PSoC5/CyLib.c ****     *  SysTick, PendSV and others.\r
-2333:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2334:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2335:.\Generated_Source\PSoC5/CyLib.c ****     *   number: The interrupt number, valid range [0-15].\r
-2336:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2337:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2338:.\Generated_Source\PSoC5/CyLib.c ****     *   Address of the ISR in the interrupt vector table.\r
-2339:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2340:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2341:.\Generated_Source\PSoC5/CyLib.c ****     cyisraddress CyIntGetSysVector(uint8 number)\r
-2342:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2892                          .loc 1 2342 0\r
- 2893                          .cfi_startproc\r
- 2894                          @ args = 0, pretend = 0, frame = 0\r
- 2895                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2896                          @ link register save eliminated.\r
- 2897                  .LVL166:\r
-2343:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-2344:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_SYS_NUMBER_MAX);\r
-2345:.\Generated_Source\PSoC5/CyLib.c **** \r
-2346:.\Generated_Source\PSoC5/CyLib.c ****         return ramVectorTable[number & CY_INT_SYS_NUMBER_MASK];\r
- 2898                          .loc 1 2346 0\r
- 2899 0000 034B                ldr     r3, .L298\r
- 2900                  .LVL167:\r
- 2901 0002 00F00F00            and     r0, r0, #15\r
- 2902                  .LVL168:\r
- 2903 0006 1968                ldr     r1, [r3, #0]\r
-2347:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 2904                          .loc 1 2347 0\r
- 2905 0008 51F82000            ldr     r0, [r1, r0, lsl #2]\r
- 2906 000c 7047                bx      lr\r
- 2907                  .L299:\r
- 2908 000e 00BF                .align  2\r
- 2909                  .L298:\r
- 2910 0010 08ED00E0            .word   -536810232\r
- 2911                          .cfi_endproc\r
- 2912                  .LFE58:\r
- 2913                          .size   CyIntGetSysVector, .-CyIntGetSysVector\r
- 2914                          .section        .text.CyIntSetVector,"ax",%progbits\r
- 2915                          .align  1\r
- 2916                          .global CyIntSetVector\r
- 2917                          .thumb\r
- 2918                          .thumb_func\r
- 2919                          .type   CyIntSetVector, %function\r
- 2920                  CyIntSetVector:\r
- 2921                  .LFB59:\r
-2348:.\Generated_Source\PSoC5/CyLib.c **** \r
-2349:.\Generated_Source\PSoC5/CyLib.c **** \r
-2350:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2351:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntSetVector\r
-2352:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2353:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 97\r
-\r
-\r
-2354:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2355:.\Generated_Source\PSoC5/CyLib.c ****     *  Sets the interrupt vector of the specified interrupt number.\r
-2356:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2357:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2358:.\Generated_Source\PSoC5/CyLib.c ****     *  number: Valid range [0-31].  Interrupt number\r
-2359:.\Generated_Source\PSoC5/CyLib.c ****     *  address: Pointer to an interrupt service routine\r
-2360:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2361:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2362:.\Generated_Source\PSoC5/CyLib.c ****     *   Previous interrupt vector value.\r
-2363:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2364:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2365:.\Generated_Source\PSoC5/CyLib.c ****     cyisraddress CyIntSetVector(uint8 number, cyisraddress address)\r
-2366:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2922                          .loc 1 2366 0\r
- 2923                          .cfi_startproc\r
- 2924                          @ args = 0, pretend = 0, frame = 0\r
- 2925                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2926                          @ link register save eliminated.\r
- 2927                  .LVL169:\r
-2367:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress oldIsr;\r
-2368:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-2369:.\Generated_Source\PSoC5/CyLib.c **** \r
-2370:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-2371:.\Generated_Source\PSoC5/CyLib.c **** \r
-2372:.\Generated_Source\PSoC5/CyLib.c ****         /* Save old Interrupt service routine. */\r
-2373:.\Generated_Source\PSoC5/CyLib.c ****         oldIsr = ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)];\r
- 2928                          .loc 1 2373 0\r
- 2929 0000 054B                ldr     r3, .L301\r
- 2930                  .LVL170:\r
- 2931 0002 00F01F00            and     r0, r0, #31\r
- 2932                  .LVL171:\r
- 2933 0006 1B68                ldr     r3, [r3, #0]\r
- 2934                  .LVL172:\r
- 2935 0008 00F11002            add     r2, r0, #16\r
- 2936 000c 53F82200            ldr     r0, [r3, r2, lsl #2]\r
- 2937                  .LVL173:\r
-2374:.\Generated_Source\PSoC5/CyLib.c **** \r
-2375:.\Generated_Source\PSoC5/CyLib.c ****         /* Set new Interrupt service routine. */\r
-2376:.\Generated_Source\PSoC5/CyLib.c ****         ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)] = address;\r
- 2938                          .loc 1 2376 0\r
- 2939 0010 43F82210            str     r1, [r3, r2, lsl #2]\r
-2377:.\Generated_Source\PSoC5/CyLib.c **** \r
-2378:.\Generated_Source\PSoC5/CyLib.c ****         return (oldIsr);\r
-2379:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 2940                          .loc 1 2379 0\r
- 2941 0014 7047                bx      lr\r
- 2942                  .L302:\r
- 2943 0016 00BF                .align  2\r
- 2944                  .L301:\r
- 2945 0018 08ED00E0            .word   -536810232\r
- 2946                          .cfi_endproc\r
- 2947                  .LFE59:\r
- 2948                          .size   CyIntSetVector, .-CyIntSetVector\r
- 2949                          .section        .text.CyIntGetVector,"ax",%progbits\r
- 2950                          .align  1\r
- 2951                          .global CyIntGetVector\r
- 2952                          .thumb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 98\r
-\r
-\r
- 2953                          .thumb_func\r
- 2954                          .type   CyIntGetVector, %function\r
- 2955                  CyIntGetVector:\r
- 2956                  .LFB60:\r
-2380:.\Generated_Source\PSoC5/CyLib.c **** \r
-2381:.\Generated_Source\PSoC5/CyLib.c **** \r
-2382:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2383:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntGetVector\r
-2384:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2385:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2386:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2387:.\Generated_Source\PSoC5/CyLib.c ****     *  Gets the interrupt vector of the specified interrupt number.\r
-2388:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2389:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2390:.\Generated_Source\PSoC5/CyLib.c ****     *  number: Valid range [0-31].  Interrupt number\r
-2391:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2392:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2393:.\Generated_Source\PSoC5/CyLib.c ****     *  Address of the ISR in the interrupt vector table.\r
-2394:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2395:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2396:.\Generated_Source\PSoC5/CyLib.c ****     cyisraddress CyIntGetVector(uint8 number)\r
-2397:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2957                          .loc 1 2397 0\r
- 2958                          .cfi_startproc\r
- 2959                          @ args = 0, pretend = 0, frame = 0\r
- 2960                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2961                          @ link register save eliminated.\r
- 2962                  .LVL174:\r
-2398:.\Generated_Source\PSoC5/CyLib.c ****         cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-2399:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-2400:.\Generated_Source\PSoC5/CyLib.c **** \r
-2401:.\Generated_Source\PSoC5/CyLib.c ****         return (ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)]);\r
- 2963                          .loc 1 2401 0\r
- 2964 0000 034B                ldr     r3, .L304\r
- 2965                  .LVL175:\r
- 2966 0002 00F01F00            and     r0, r0, #31\r
- 2967                  .LVL176:\r
- 2968 0006 1968                ldr     r1, [r3, #0]\r
- 2969 0008 1030                adds    r0, r0, #16\r
-2402:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 2970                          .loc 1 2402 0\r
- 2971 000a 51F82000            ldr     r0, [r1, r0, lsl #2]\r
- 2972 000e 7047                bx      lr\r
- 2973                  .L305:\r
- 2974                          .align  2\r
- 2975                  .L304:\r
- 2976 0010 08ED00E0            .word   -536810232\r
- 2977                          .cfi_endproc\r
- 2978                  .LFE60:\r
- 2979                          .size   CyIntGetVector, .-CyIntGetVector\r
- 2980                          .section        .text.CyIntSetPriority,"ax",%progbits\r
- 2981                          .align  1\r
- 2982                          .global CyIntSetPriority\r
- 2983                          .thumb\r
- 2984                          .thumb_func\r
- 2985                          .type   CyIntSetPriority, %function\r
- 2986                  CyIntSetPriority:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 99\r
-\r
-\r
- 2987                  .LFB61:\r
-2403:.\Generated_Source\PSoC5/CyLib.c **** \r
-2404:.\Generated_Source\PSoC5/CyLib.c **** \r
-2405:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2406:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntSetPriority\r
-2407:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2408:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2409:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2410:.\Generated_Source\PSoC5/CyLib.c ****     *  Sets the Priority of the Interrupt.\r
-2411:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2412:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2413:.\Generated_Source\PSoC5/CyLib.c ****     *  priority: Priority of the interrupt. 0 - 7, 0 being the highest.\r
-2414:.\Generated_Source\PSoC5/CyLib.c ****     *  number: The number of the interrupt, 0 - 31.\r
-2415:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2416:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2417:.\Generated_Source\PSoC5/CyLib.c ****     *  None\r
-2418:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2419:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2420:.\Generated_Source\PSoC5/CyLib.c ****     void CyIntSetPriority(uint8 number, uint8 priority)\r
-2421:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 2988                          .loc 1 2421 0\r
- 2989                          .cfi_startproc\r
- 2990                          @ args = 0, pretend = 0, frame = 0\r
- 2991                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 2992                          @ link register save eliminated.\r
- 2993                  .LVL177:\r
-2422:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(priority <= CY_INT_PRIORITY_MAX);\r
-2423:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-2424:.\Generated_Source\PSoC5/CyLib.c ****         CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] = (priority & CY_INT_PRIORITY_MASK)<< 5;\r
- 2994                          .loc 1 2424 0\r
- 2995 0000 00F01F00            and     r0, r0, #31\r
- 2996                  .LVL178:\r
- 2997 0004 00F16043            add     r3, r0, #-536870912\r
- 2998 0008 4901                lsls    r1, r1, #5\r
- 2999                  .LVL179:\r
- 3000 000a 03F56442            add     r2, r3, #58368\r
- 3001 000e C8B2                uxtb    r0, r1\r
- 3002 0010 1070                strb    r0, [r2, #0]\r
- 3003 0012 7047                bx      lr\r
- 3004                          .cfi_endproc\r
- 3005                  .LFE61:\r
- 3006                          .size   CyIntSetPriority, .-CyIntSetPriority\r
- 3007                          .section        .text.CyIntGetPriority,"ax",%progbits\r
- 3008                          .align  1\r
- 3009                          .global CyIntGetPriority\r
- 3010                          .thumb\r
- 3011                          .thumb_func\r
- 3012                          .type   CyIntGetPriority, %function\r
- 3013                  CyIntGetPriority:\r
- 3014                  .LFB62:\r
-2425:.\Generated_Source\PSoC5/CyLib.c ****     }\r
-2426:.\Generated_Source\PSoC5/CyLib.c **** \r
-2427:.\Generated_Source\PSoC5/CyLib.c **** \r
-2428:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2429:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntGetPriority\r
-2430:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2431:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 100\r
-\r
-\r
-2432:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2433:.\Generated_Source\PSoC5/CyLib.c ****     *  Gets the Priority of the Interrupt.\r
-2434:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2435:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-2436:.\Generated_Source\PSoC5/CyLib.c ****     *  number: The number of the interrupt, 0 - 31.\r
-2437:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2438:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2439:.\Generated_Source\PSoC5/CyLib.c ****     *  Priority of the interrupt. 0 - 7, 0 being the highest.\r
-2440:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2441:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2442:.\Generated_Source\PSoC5/CyLib.c ****     uint8 CyIntGetPriority(uint8 number)\r
-2443:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 3015                          .loc 1 2443 0\r
- 3016                          .cfi_startproc\r
- 3017                          @ args = 0, pretend = 0, frame = 0\r
- 3018                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 3019                          @ link register save eliminated.\r
- 3020                  .LVL180:\r
-2444:.\Generated_Source\PSoC5/CyLib.c ****         uint8 priority;\r
-2445:.\Generated_Source\PSoC5/CyLib.c **** \r
-2446:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-2447:.\Generated_Source\PSoC5/CyLib.c **** \r
-2448:.\Generated_Source\PSoC5/CyLib.c ****         priority = CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] >> 5;\r
- 3021                          .loc 1 2448 0\r
- 3022 0000 00F01F00            and     r0, r0, #31\r
- 3023                  .LVL181:\r
- 3024 0004 00F16043            add     r3, r0, #-536870912\r
- 3025 0008 03F56441            add     r1, r3, #58368\r
- 3026 000c 0A78                ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 3027                  .LVL182:\r
-2449:.\Generated_Source\PSoC5/CyLib.c **** \r
-2450:.\Generated_Source\PSoC5/CyLib.c ****         return (priority);\r
-2451:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 3028                          .loc 1 2451 0\r
- 3029 000e 5009                lsrs    r0, r2, #5\r
- 3030 0010 7047                bx      lr\r
- 3031                          .cfi_endproc\r
- 3032                  .LFE62:\r
- 3033                          .size   CyIntGetPriority, .-CyIntGetPriority\r
- 3034                          .section        .text.CyIntGetState,"ax",%progbits\r
- 3035                          .align  1\r
- 3036                          .global CyIntGetState\r
- 3037                          .thumb\r
- 3038                          .thumb_func\r
- 3039                          .type   CyIntGetState, %function\r
- 3040                  CyIntGetState:\r
- 3041                  .LFB63:\r
-2452:.\Generated_Source\PSoC5/CyLib.c **** \r
-2453:.\Generated_Source\PSoC5/CyLib.c **** \r
-2454:.\Generated_Source\PSoC5/CyLib.c ****     /*******************************************************************************\r
-2455:.\Generated_Source\PSoC5/CyLib.c ****     * Function Name: CyIntGetState\r
-2456:.\Generated_Source\PSoC5/CyLib.c ****     ********************************************************************************\r
-2457:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2458:.\Generated_Source\PSoC5/CyLib.c ****     * Summary:\r
-2459:.\Generated_Source\PSoC5/CyLib.c ****     *   Gets the enable state of the specified interrupt number.\r
-2460:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2461:.\Generated_Source\PSoC5/CyLib.c ****     * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 101\r
-\r
-\r
-2462:.\Generated_Source\PSoC5/CyLib.c ****     *   number: Valid range [0-31].  Interrupt number.\r
-2463:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2464:.\Generated_Source\PSoC5/CyLib.c ****     * Return:\r
-2465:.\Generated_Source\PSoC5/CyLib.c ****     *   Enable status: 1 if enabled, 0 if disabled\r
-2466:.\Generated_Source\PSoC5/CyLib.c ****     *\r
-2467:.\Generated_Source\PSoC5/CyLib.c ****     *******************************************************************************/\r
-2468:.\Generated_Source\PSoC5/CyLib.c ****     uint8 CyIntGetState(uint8 number)\r
-2469:.\Generated_Source\PSoC5/CyLib.c ****     {\r
- 3042                          .loc 1 2469 0\r
- 3043                          .cfi_startproc\r
- 3044                          @ args = 0, pretend = 0, frame = 0\r
- 3045                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 3046                          @ link register save eliminated.\r
- 3047                  .LVL183:\r
-2470:.\Generated_Source\PSoC5/CyLib.c ****         reg32 * stateReg;\r
-2471:.\Generated_Source\PSoC5/CyLib.c **** \r
-2472:.\Generated_Source\PSoC5/CyLib.c ****         CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-2473:.\Generated_Source\PSoC5/CyLib.c **** \r
-2474:.\Generated_Source\PSoC5/CyLib.c ****         /* Get a pointer to the Interrupt enable register. */\r
-2475:.\Generated_Source\PSoC5/CyLib.c ****         stateReg = CY_INT_ENABLE_PTR;\r
-2476:.\Generated_Source\PSoC5/CyLib.c **** \r
-2477:.\Generated_Source\PSoC5/CyLib.c ****         /* Get the state of the interrupt. */\r
-2478:.\Generated_Source\PSoC5/CyLib.c ****         return (0u != (*stateReg & (((uint32) 1u) << (0x1Fu & number)))) ? ((uint8)(1u)) : ((uint8)\r
- 3048                          .loc 1 2478 0\r
- 3049 0000 044B                ldr     r3, .L309\r
- 3050 0002 00F01F00            and     r0, r0, #31\r
- 3051                  .LVL184:\r
- 3052 0006 1968                ldr     r1, [r3, #0]\r
- 3053 0008 21FA00F2            lsr     r2, r1, r0\r
-2479:.\Generated_Source\PSoC5/CyLib.c ****     }\r
- 3054                          .loc 1 2479 0\r
- 3055 000c 02F00100            and     r0, r2, #1\r
- 3056 0010 7047                bx      lr\r
- 3057                  .L310:\r
- 3058 0012 00BF                .align  2\r
- 3059                  .L309:\r
- 3060 0014 00E100E0            .word   -536813312\r
- 3061                          .cfi_endproc\r
- 3062                  .LFE63:\r
- 3063                          .size   CyIntGetState, .-CyIntGetState\r
- 3064                          .global cydelay_32k_ms\r
- 3065                          .global cydelay_freq_mhz\r
- 3066                          .global cydelay_freq_khz\r
- 3067                          .global cydelay_freq_hz\r
- 3068                          .global CyResetStatus\r
- 3069                          .data\r
- 3070                          .align  2\r
- 3071                          .set    .LANCHOR0,. + 0\r
- 3072                          .type   cydelay_32k_ms, %object\r
- 3073                          .size   cydelay_32k_ms, 4\r
- 3074                  cydelay_32k_ms:\r
- 3075 0000 0000007D            .word   2097152000\r
- 3076                          .type   cydelay_freq_khz, %object\r
- 3077                          .size   cydelay_freq_khz, 4\r
- 3078                  cydelay_freq_khz:\r
- 3079 0004 00FA0000            .word   64000\r
- 3080                          .type   cydelay_freq_mhz, %object\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 102\r
-\r
-\r
- 3081                          .size   cydelay_freq_mhz, 1\r
- 3082                  cydelay_freq_mhz:\r
- 3083 0008 40                  .byte   64\r
- 3084 0009 000000              .space  3\r
- 3085                          .type   cydelay_freq_hz, %object\r
- 3086                          .size   cydelay_freq_hz, 4\r
- 3087                  cydelay_freq_hz:\r
- 3088 000c 0090D003            .word   64000000\r
- 3089                          .section        .noinit,"aw",%progbits\r
- 3090                          .type   CyResetStatus, %object\r
- 3091                          .size   CyResetStatus, 1\r
- 3092                  CyResetStatus:\r
- 3093 0000 00                  .space  1\r
- 3094                          .text\r
- 3095                  .Letext0:\r
- 3096                          .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 3097                          .file 3 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 3098                          .file 4 ".\\Generated_Source\\PSoC5\\cyPm.h"\r
- 3099                          .section        .debug_info,"",%progbits\r
- 3100                  .Ldebug_info0:\r
- 3101 0000 BC0F0000            .4byte  0xfbc\r
- 3102 0004 0200                .2byte  0x2\r
- 3103 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 3104 000a 04                  .byte   0x4\r
- 3105 000b 01                  .uleb128 0x1\r
- 3106 000c 52050000            .4byte  .LASF134\r
- 3107 0010 01                  .byte   0x1\r
- 3108 0011 82040000            .4byte  .LASF135\r
- 3109 0015 A0030000            .4byte  .LASF136\r
- 3110 0019 00000000            .4byte  .Ldebug_ranges0+0\r
- 3111 001d 00000000            .4byte  0\r
- 3112 0021 00000000            .4byte  0\r
- 3113 0025 00000000            .4byte  .Ldebug_line0\r
- 3114 0029 02                  .uleb128 0x2\r
- 3115 002a 01                  .byte   0x1\r
- 3116 002b 06                  .byte   0x6\r
- 3117 002c 25010000            .4byte  .LASF0\r
- 3118 0030 02                  .uleb128 0x2\r
- 3119 0031 01                  .byte   0x1\r
- 3120 0032 08                  .byte   0x8\r
- 3121 0033 C5050000            .4byte  .LASF1\r
- 3122 0037 02                  .uleb128 0x2\r
- 3123 0038 02                  .byte   0x2\r
- 3124 0039 05                  .byte   0x5\r
- 3125 003a E1050000            .4byte  .LASF2\r
- 3126 003e 02                  .uleb128 0x2\r
- 3127 003f 02                  .byte   0x2\r
- 3128 0040 07                  .byte   0x7\r
- 3129 0041 C7020000            .4byte  .LASF3\r
- 3130 0045 03                  .uleb128 0x3\r
- 3131 0046 04                  .byte   0x4\r
- 3132 0047 05                  .byte   0x5\r
- 3133 0048 696E7400            .ascii  "int\000"\r
- 3134 004c 02                  .uleb128 0x2\r
- 3135 004d 04                  .byte   0x4\r
- 3136 004e 07                  .byte   0x7\r
- 3137 004f 1F020000            .4byte  .LASF4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 103\r
-\r
-\r
- 3138 0053 02                  .uleb128 0x2\r
- 3139 0054 08                  .byte   0x8\r
- 3140 0055 05                  .byte   0x5\r
- 3141 0056 17010000            .4byte  .LASF5\r
- 3142 005a 02                  .uleb128 0x2\r
- 3143 005b 08                  .byte   0x8\r
- 3144 005c 07                  .byte   0x7\r
- 3145 005d A4000000            .4byte  .LASF6\r
- 3146 0061 02                  .uleb128 0x2\r
- 3147 0062 04                  .byte   0x4\r
- 3148 0063 05                  .byte   0x5\r
- 3149 0064 6A010000            .4byte  .LASF7\r
- 3150 0068 02                  .uleb128 0x2\r
- 3151 0069 04                  .byte   0x4\r
- 3152 006a 07                  .byte   0x7\r
- 3153 006b 0E040000            .4byte  .LASF8\r
- 3154 006f 02                  .uleb128 0x2\r
- 3155 0070 04                  .byte   0x4\r
- 3156 0071 07                  .byte   0x7\r
- 3157 0072 59020000            .4byte  .LASF9\r
- 3158 0076 04                  .uleb128 0x4\r
- 3159 0077 01                  .byte   0x1\r
- 3160 0078 05                  .uleb128 0x5\r
- 3161 0079 04                  .byte   0x4\r
- 3162 007a 76000000            .4byte  0x76\r
- 3163 007e 02                  .uleb128 0x2\r
- 3164 007f 01                  .byte   0x1\r
- 3165 0080 08                  .byte   0x8\r
- 3166 0081 85060000            .4byte  .LASF10\r
- 3167 0085 06                  .uleb128 0x6\r
- 3168 0086 8D010000            .4byte  .LASF11\r
- 3169 008a 02                  .byte   0x2\r
- 3170 008b 5B                  .byte   0x5b\r
- 3171 008c 30000000            .4byte  0x30\r
- 3172 0090 06                  .uleb128 0x6\r
- 3173 0091 15000000            .4byte  .LASF12\r
- 3174 0095 02                  .byte   0x2\r
- 3175 0096 5C                  .byte   0x5c\r
- 3176 0097 3E000000            .4byte  0x3e\r
- 3177 009b 06                  .uleb128 0x6\r
- 3178 009c DC010000            .4byte  .LASF13\r
- 3179 00a0 02                  .byte   0x2\r
- 3180 00a1 5D                  .byte   0x5d\r
- 3181 00a2 6F000000            .4byte  0x6f\r
- 3182 00a6 02                  .uleb128 0x2\r
- 3183 00a7 04                  .byte   0x4\r
- 3184 00a8 04                  .byte   0x4\r
- 3185 00a9 C2040000            .4byte  .LASF14\r
- 3186 00ad 02                  .uleb128 0x2\r
- 3187 00ae 08                  .byte   0x8\r
- 3188 00af 04                  .byte   0x4\r
- 3189 00b0 AD010000            .4byte  .LASF15\r
- 3190 00b4 06                  .uleb128 0x6\r
- 3191 00b5 A6070000            .4byte  .LASF16\r
- 3192 00b9 02                  .byte   0x2\r
- 3193 00ba E8                  .byte   0xe8\r
- 3194 00bb 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 104\r
-\r
-\r
- 3195 00bf 06                  .uleb128 0x6\r
- 3196 00c0 9B050000            .4byte  .LASF17\r
- 3197 00c4 02                  .byte   0x2\r
- 3198 00c5 F0                  .byte   0xf0\r
- 3199 00c6 CA000000            .4byte  0xca\r
- 3200 00ca 07                  .uleb128 0x7\r
- 3201 00cb 85000000            .4byte  0x85\r
- 3202 00cf 06                  .uleb128 0x6\r
- 3203 00d0 87010000            .4byte  .LASF18\r
- 3204 00d4 02                  .byte   0x2\r
- 3205 00d5 F1                  .byte   0xf1\r
- 3206 00d6 DA000000            .4byte  0xda\r
- 3207 00da 07                  .uleb128 0x7\r
- 3208 00db 90000000            .4byte  0x90\r
- 3209 00df 06                  .uleb128 0x6\r
- 3210 00e0 DE030000            .4byte  .LASF19\r
- 3211 00e4 02                  .byte   0x2\r
- 3212 00e5 F2                  .byte   0xf2\r
- 3213 00e6 EA000000            .4byte  0xea\r
- 3214 00ea 07                  .uleb128 0x7\r
- 3215 00eb 9B000000            .4byte  0x9b\r
- 3216 00ef 08                  .uleb128 0x8\r
- 3217 00f0 8F060000            .4byte  .LASF20\r
- 3218 00f4 02                  .byte   0x2\r
- 3219 00f5 0201                .2byte  0x102\r
- 3220 00f7 78000000            .4byte  0x78\r
- 3221 00fb 09                  .uleb128 0x9\r
- 3222 00fc 01                  .byte   0x1\r
- 3223 00fd A3040000            .4byte  .LASF131\r
- 3224 0101 01                  .byte   0x1\r
- 3225 0102 0B03                .2byte  0x30b\r
- 3226 0104 01                  .byte   0x1\r
- 3227 0105 01                  .byte   0x1\r
- 3228 0106 17010000            .4byte  0x117\r
- 3229 010a 0A                  .uleb128 0xa\r
- 3230 010b 9E070000            .4byte  .LASF24\r
- 3231 010f 01                  .byte   0x1\r
- 3232 0110 0B03                .2byte  0x30b\r
- 3233 0112 85000000            .4byte  0x85\r
- 3234 0116 00                  .byte   0\r
- 3235 0117 0B                  .uleb128 0xb\r
- 3236 0118 01                  .byte   0x1\r
- 3237 0119 7A070000            .4byte  .LASF129\r
- 3238 011d 01                  .byte   0x1\r
- 3239 011e E004                .2byte  0x4e0\r
- 3240 0120 01                  .byte   0x1\r
- 3241 0121 85000000            .4byte  0x85\r
- 3242 0125 01                  .byte   0x1\r
- 3243 0126 0C                  .uleb128 0xc\r
- 3244 0127 46020000            .4byte  .LASF137\r
- 3245 012b 01                  .byte   0x1\r
- 3246 012c 6E01                .2byte  0x16e\r
- 3247 012e 01                  .byte   0x1\r
- 3248 012f 85000000            .4byte  0x85\r
- 3249 0133 01                  .byte   0x1\r
- 3250 0134 45010000            .4byte  0x145\r
- 3251 0138 0D                  .uleb128 0xd\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 105\r
-\r
-\r
- 3252 0139 27060000            .4byte  .LASF138\r
- 3253 013d 01                  .byte   0x1\r
- 3254 013e 7001                .2byte  0x170\r
- 3255 0140 85000000            .4byte  0x85\r
- 3256 0144 00                  .byte   0\r
- 3257 0145 0E                  .uleb128 0xe\r
- 3258 0146 D9000000            .4byte  .LASF21\r
- 3259 014a 01                  .byte   0x1\r
- 3260 014b 8D01                .2byte  0x18d\r
- 3261 014d 01                  .byte   0x1\r
- 3262 014e 00000000            .4byte  .LFB7\r
- 3263 0152 B8000000            .4byte  .LFE7\r
- 3264 0156 02                  .byte   0x2\r
- 3265 0157 7D                  .byte   0x7d\r
- 3266 0158 00                  .sleb128 0\r
- 3267 0159 01                  .byte   0x1\r
- 3268 015a A1010000            .4byte  0x1a1\r
- 3269 015e 0F                  .uleb128 0xf\r
- 3270 015f 31010000            .4byte  .LASF23\r
- 3271 0163 01                  .byte   0x1\r
- 3272 0164 8D01                .2byte  0x18d\r
- 3273 0166 85000000            .4byte  0x85\r
- 3274 016a 00000000            .4byte  .LLST0\r
- 3275 016e 10                  .uleb128 0x10\r
- 3276 016f 69040000            .4byte  .LASF37\r
- 3277 0173 01                  .byte   0x1\r
- 3278 0174 8F01                .2byte  0x18f\r
- 3279 0176 85000000            .4byte  0x85\r
- 3280 017a 01                  .byte   0x1\r
- 3281 017b 53                  .byte   0x53\r
- 3282 017c 11                  .uleb128 0x11\r
- 3283 017d 26010000            .4byte  0x126\r
- 3284 0181 00000000            .4byte  .LBB10\r
- 3285 0185 2A000000            .4byte  .LBE10\r
- 3286 0189 01                  .byte   0x1\r
- 3287 018a 8F01                .2byte  0x18f\r
- 3288 018c 12                  .uleb128 0x12\r
- 3289 018d 00000000            .4byte  .LBB11\r
- 3290 0191 2A000000            .4byte  .LBE11\r
- 3291 0195 13                  .uleb128 0x13\r
- 3292 0196 38010000            .4byte  0x138\r
- 3293 019a 3A000000            .4byte  .LLST1\r
- 3294 019e 00                  .byte   0\r
- 3295 019f 00                  .byte   0\r
- 3296 01a0 00                  .byte   0\r
- 3297 01a1 0E                  .uleb128 0xe\r
- 3298 01a2 71030000            .4byte  .LASF22\r
- 3299 01a6 01                  .byte   0x1\r
- 3300 01a7 2103                .2byte  0x321\r
- 3301 01a9 01                  .byte   0x1\r
- 3302 01aa 00000000            .4byte  .LFB14\r
- 3303 01ae 3C000000            .4byte  .LFE14\r
- 3304 01b2 02                  .byte   0x2\r
- 3305 01b3 7D                  .byte   0x7d\r
- 3306 01b4 00                  .sleb128 0\r
- 3307 01b5 01                  .byte   0x1\r
- 3308 01b6 CB010000            .4byte  0x1cb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 106\r
-\r
-\r
- 3309 01ba 0F                  .uleb128 0xf\r
- 3310 01bb 9E070000            .4byte  .LASF24\r
- 3311 01bf 01                  .byte   0x1\r
- 3312 01c0 2103                .2byte  0x321\r
- 3313 01c2 90000000            .4byte  0x90\r
- 3314 01c6 5A000000            .4byte  .LLST2\r
- 3315 01ca 00                  .byte   0\r
- 3316 01cb 14                  .uleb128 0x14\r
- 3317 01cc 01                  .byte   0x1\r
- 3318 01cd 37040000            .4byte  .LASF31\r
- 3319 01d1 01                  .byte   0x1\r
- 3320 01d2 99                  .byte   0x99\r
- 3321 01d3 01                  .byte   0x1\r
- 3322 01d4 00000000            .4byte  .LFB1\r
- 3323 01d8 10000000            .4byte  .LFE1\r
- 3324 01dc 02                  .byte   0x2\r
- 3325 01dd 7D                  .byte   0x7d\r
- 3326 01de 00                  .sleb128 0\r
- 3327 01df 01                  .byte   0x1\r
- 3328 01e0 15                  .uleb128 0x15\r
- 3329 01e1 01                  .byte   0x1\r
- 3330 01e2 B4010000            .4byte  .LASF28\r
- 3331 01e6 01                  .byte   0x1\r
- 3332 01e7 BF                  .byte   0xbf\r
- 3333 01e8 01                  .byte   0x1\r
- 3334 01e9 00000000            .4byte  .LFB2\r
- 3335 01ed 34000000            .4byte  .LFE2\r
- 3336 01f1 02                  .byte   0x2\r
- 3337 01f2 7D                  .byte   0x7d\r
- 3338 01f3 00                  .sleb128 0\r
- 3339 01f4 01                  .byte   0x1\r
- 3340 01f5 27020000            .4byte  0x227\r
- 3341 01f9 16                  .uleb128 0x16\r
- 3342 01fa 67070000            .4byte  .LASF25\r
- 3343 01fe 01                  .byte   0x1\r
- 3344 01ff BF                  .byte   0xbf\r
- 3345 0200 85000000            .4byte  0x85\r
- 3346 0204 7B000000            .4byte  .LLST3\r
- 3347 0208 16                  .uleb128 0x16\r
- 3348 0209 D8060000            .4byte  .LASF26\r
- 3349 020d 01                  .byte   0x1\r
- 3350 020e BF                  .byte   0xbf\r
- 3351 020f 85000000            .4byte  0x85\r
- 3352 0213 A8000000            .4byte  .LLST4\r
- 3353 0217 16                  .uleb128 0x16\r
- 3354 0218 BA040000            .4byte  .LASF27\r
- 3355 021c 01                  .byte   0x1\r
- 3356 021d BF                  .byte   0xbf\r
- 3357 021e 85000000            .4byte  0x85\r
- 3358 0222 C9000000            .4byte  .LLST5\r
- 3359 0226 00                  .byte   0\r
- 3360 0227 15                  .uleb128 0x15\r
- 3361 0228 01                  .byte   0x1\r
- 3362 0229 73010000            .4byte  .LASF29\r
- 3363 022d 01                  .byte   0x1\r
- 3364 022e F6                  .byte   0xf6\r
- 3365 022f 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 107\r
-\r
-\r
- 3366 0230 00000000            .4byte  .LFB3\r
- 3367 0234 14000000            .4byte  .LFE3\r
- 3368 0238 02                  .byte   0x2\r
- 3369 0239 7D                  .byte   0x7d\r
- 3370 023a 00                  .sleb128 0\r
- 3371 023b 01                  .byte   0x1\r
- 3372 023c 50020000            .4byte  0x250\r
- 3373 0240 16                  .uleb128 0x16\r
- 3374 0241 07040000            .4byte  .LASF30\r
- 3375 0245 01                  .byte   0x1\r
- 3376 0246 F6                  .byte   0xf6\r
- 3377 0247 85000000            .4byte  0x85\r
- 3378 024b EA000000            .4byte  .LLST6\r
- 3379 024f 00                  .byte   0\r
- 3380 0250 17                  .uleb128 0x17\r
- 3381 0251 01                  .byte   0x1\r
- 3382 0252 BC020000            .4byte  .LASF32\r
- 3383 0256 01                  .byte   0x1\r
- 3384 0257 5901                .2byte  0x159\r
- 3385 0259 01                  .byte   0x1\r
- 3386 025a 00000000            .4byte  .LFB5\r
- 3387 025e 18000000            .4byte  .LFE5\r
- 3388 0262 02                  .byte   0x2\r
- 3389 0263 7D                  .byte   0x7d\r
- 3390 0264 00                  .sleb128 0\r
- 3391 0265 01                  .byte   0x1\r
- 3392 0266 18                  .uleb128 0x18\r
- 3393 0267 01                  .byte   0x1\r
- 3394 0268 2C020000            .4byte  .LASF33\r
- 3395 026c 01                  .byte   0x1\r
- 3396 026d 8702                .2byte  0x287\r
- 3397 026f 01                  .byte   0x1\r
- 3398 0270 00000000            .4byte  .LFB9\r
- 3399 0274 40000000            .4byte  .LFE9\r
- 3400 0278 02                  .byte   0x2\r
- 3401 0279 7D                  .byte   0x7d\r
- 3402 027a 00                  .sleb128 0\r
- 3403 027b 01                  .byte   0x1\r
- 3404 027c 91020000            .4byte  0x291\r
- 3405 0280 0F                  .uleb128 0xf\r
- 3406 0281 07040000            .4byte  .LASF30\r
- 3407 0285 01                  .byte   0x1\r
- 3408 0286 8702                .2byte  0x287\r
- 3409 0288 85000000            .4byte  0x85\r
- 3410 028c 0B010000            .4byte  .LLST7\r
- 3411 0290 00                  .byte   0\r
- 3412 0291 17                  .uleb128 0x17\r
- 3413 0292 01                  .byte   0x1\r
- 3414 0293 6F000000            .4byte  .LASF34\r
- 3415 0297 01                  .byte   0x1\r
- 3416 0298 B002                .2byte  0x2b0\r
- 3417 029a 01                  .byte   0x1\r
- 3418 029b 00000000            .4byte  .LFB10\r
- 3419 029f 10000000            .4byte  .LFE10\r
- 3420 02a3 02                  .byte   0x2\r
- 3421 02a4 7D                  .byte   0x7d\r
- 3422 02a5 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 108\r
-\r
-\r
- 3423 02a6 01                  .byte   0x1\r
- 3424 02a7 17                  .uleb128 0x17\r
- 3425 02a8 01                  .byte   0x1\r
- 3426 02a9 9C060000            .4byte  .LASF35\r
- 3427 02ad 01                  .byte   0x1\r
- 3428 02ae C502                .2byte  0x2c5\r
- 3429 02b0 01                  .byte   0x1\r
- 3430 02b1 00000000            .4byte  .LFB11\r
- 3431 02b5 10000000            .4byte  .LFE11\r
- 3432 02b9 02                  .byte   0x2\r
- 3433 02ba 7D                  .byte   0x7d\r
- 3434 02bb 00                  .sleb128 0\r
- 3435 02bc 01                  .byte   0x1\r
- 3436 02bd 19                  .uleb128 0x19\r
- 3437 02be 01                  .byte   0x1\r
- 3438 02bf 6C070000            .4byte  .LASF36\r
- 3439 02c3 01                  .byte   0x1\r
- 3440 02c4 EC01                .2byte  0x1ec\r
- 3441 02c6 01                  .byte   0x1\r
- 3442 02c7 00000000            .4byte  .LFB8\r
- 3443 02cb D8000000            .4byte  .LFE8\r
- 3444 02cf 5E010000            .4byte  .LLST8\r
- 3445 02d3 01                  .byte   0x1\r
- 3446 02d4 3E030000            .4byte  0x33e\r
- 3447 02d8 0F                  .uleb128 0xf\r
- 3448 02d9 31010000            .4byte  .LASF23\r
- 3449 02dd 01                  .byte   0x1\r
- 3450 02de EC01                .2byte  0x1ec\r
- 3451 02e0 85000000            .4byte  0x85\r
- 3452 02e4 7E010000            .4byte  .LLST9\r
- 3453 02e8 1A                  .uleb128 0x1a\r
- 3454 02e9 0C070000            .4byte  .LASF38\r
- 3455 02ed 01                  .byte   0x1\r
- 3456 02ee EE01                .2byte  0x1ee\r
- 3457 02f0 85000000            .4byte  0x85\r
- 3458 02f4 9F010000            .4byte  .LLST10\r
- 3459 02f8 10                  .uleb128 0x10\r
- 3460 02f9 75060000            .4byte  .LASF39\r
- 3461 02fd 01                  .byte   0x1\r
- 3462 02fe EF01                .2byte  0x1ef\r
- 3463 0300 85000000            .4byte  0x85\r
- 3464 0304 01                  .byte   0x1\r
- 3465 0305 56                  .byte   0x56\r
- 3466 0306 1B                  .uleb128 0x1b\r
- 3467 0307 34000000            .4byte  .LVL28\r
- 3468 030b 45010000            .4byte  0x145\r
- 3469 030f 1A030000            .4byte  0x31a\r
- 3470 0313 1C                  .uleb128 0x1c\r
- 3471 0314 01                  .byte   0x1\r
- 3472 0315 50                  .byte   0x50\r
- 3473 0316 02                  .byte   0x2\r
- 3474 0317 74                  .byte   0x74\r
- 3475 0318 00                  .sleb128 0\r
- 3476 0319 00                  .byte   0\r
- 3477 031a 1D                  .uleb128 0x1d\r
- 3478 031b BE000000            .4byte  .LVL29\r
- 3479 031f 91020000            .4byte  0x291\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 109\r
-\r
-\r
- 3480 0323 1D                  .uleb128 0x1d\r
- 3481 0324 C4000000            .4byte  .LVL30\r
- 3482 0328 A7020000            .4byte  0x2a7\r
- 3483 032c 1E                  .uleb128 0x1e\r
- 3484 032d D2000000            .4byte  .LVL31\r
- 3485 0331 01                  .byte   0x1\r
- 3486 0332 45010000            .4byte  0x145\r
- 3487 0336 1C                  .uleb128 0x1c\r
- 3488 0337 01                  .byte   0x1\r
- 3489 0338 50                  .byte   0x50\r
- 3490 0339 02                  .byte   0x2\r
- 3491 033a 74                  .byte   0x74\r
- 3492 033b 00                  .sleb128 0\r
- 3493 033c 00                  .byte   0\r
- 3494 033d 00                  .byte   0\r
- 3495 033e 18                  .uleb128 0x18\r
- 3496 033f 01                  .byte   0x1\r
- 3497 0340 08030000            .4byte  .LASF40\r
- 3498 0344 01                  .byte   0x1\r
- 3499 0345 E802                .2byte  0x2e8\r
- 3500 0347 01                  .byte   0x1\r
- 3501 0348 00000000            .4byte  .LFB12\r
- 3502 034c 18000000            .4byte  .LFE12\r
- 3503 0350 02                  .byte   0x2\r
- 3504 0351 7D                  .byte   0x7d\r
- 3505 0352 00                  .sleb128 0\r
- 3506 0353 01                  .byte   0x1\r
- 3507 0354 69030000            .4byte  0x369\r
- 3508 0358 0F                  .uleb128 0xf\r
- 3509 0359 07040000            .4byte  .LASF30\r
- 3510 035d 01                  .byte   0x1\r
- 3511 035e E802                .2byte  0x2e8\r
- 3512 0360 85000000            .4byte  0x85\r
- 3513 0364 C9010000            .4byte  .LLST11\r
- 3514 0368 00                  .byte   0\r
- 3515 0369 1F                  .uleb128 0x1f\r
- 3516 036a FB000000            .4byte  0xfb\r
- 3517 036e 00000000            .4byte  .LFB13\r
- 3518 0372 0C000000            .4byte  .LFE13\r
- 3519 0376 02                  .byte   0x2\r
- 3520 0377 7D                  .byte   0x7d\r
- 3521 0378 00                  .sleb128 0\r
- 3522 0379 01                  .byte   0x1\r
- 3523 037a 86030000            .4byte  0x386\r
- 3524 037e 20                  .uleb128 0x20\r
- 3525 037f 0A010000            .4byte  0x10a\r
- 3526 0383 01                  .byte   0x1\r
- 3527 0384 50                  .byte   0x50\r
- 3528 0385 00                  .byte   0\r
- 3529 0386 19                  .uleb128 0x19\r
- 3530 0387 01                  .byte   0x1\r
- 3531 0388 20070000            .4byte  .LASF41\r
- 3532 038c 01                  .byte   0x1\r
- 3533 038d 5003                .2byte  0x350\r
- 3534 038f 01                  .byte   0x1\r
- 3535 0390 00000000            .4byte  .LFB15\r
- 3536 0394 6C000000            .4byte  .LFE15\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 110\r
-\r
-\r
- 3537 0398 EA010000            .4byte  .LLST12\r
- 3538 039c 01                  .byte   0x1\r
- 3539 039d 74040000            .4byte  0x474\r
- 3540 03a1 0F                  .uleb128 0xf\r
- 3541 03a2 9E070000            .4byte  .LASF24\r
- 3542 03a6 01                  .byte   0x1\r
- 3543 03a7 5003                .2byte  0x350\r
- 3544 03a9 90000000            .4byte  0x90\r
- 3545 03ad 0A020000            .4byte  .LLST13\r
- 3546 03b1 1A                  .uleb128 0x1a\r
- 3547 03b2 45050000            .4byte  .LASF42\r
- 3548 03b6 01                  .byte   0x1\r
- 3549 03b7 5203                .2byte  0x352\r
- 3550 03b9 85000000            .4byte  0x85\r
- 3551 03bd 2B020000            .4byte  .LLST14\r
- 3552 03c1 1A                  .uleb128 0x1a\r
- 3553 03c2 3C020000            .4byte  .LASF43\r
- 3554 03c6 01                  .byte   0x1\r
- 3555 03c7 5303                .2byte  0x353\r
- 3556 03c9 90000000            .4byte  0x90\r
- 3557 03cd 49020000            .4byte  .LLST15\r
- 3558 03d1 1A                  .uleb128 0x1a\r
- 3559 03d2 42010000            .4byte  .LASF44\r
- 3560 03d6 01                  .byte   0x1\r
- 3561 03d7 5403                .2byte  0x354\r
- 3562 03d9 85000000            .4byte  0x85\r
- 3563 03dd 93020000            .4byte  .LLST16\r
- 3564 03e1 21                  .uleb128 0x21\r
- 3565 03e2 FB000000            .4byte  0xfb\r
- 3566 03e6 24000000            .4byte  .LBB12\r
- 3567 03ea 2A000000            .4byte  .LBE12\r
- 3568 03ee 01                  .byte   0x1\r
- 3569 03ef 6403                .2byte  0x364\r
- 3570 03f1 FF030000            .4byte  0x3ff\r
- 3571 03f5 22                  .uleb128 0x22\r
- 3572 03f6 0A010000            .4byte  0x10a\r
- 3573 03fa B1020000            .4byte  .LLST17\r
- 3574 03fe 00                  .byte   0\r
- 3575 03ff 21                  .uleb128 0x21\r
- 3576 0400 FB000000            .4byte  0xfb\r
- 3577 0404 4A000000            .4byte  .LBB14\r
- 3578 0408 50000000            .4byte  .LBE14\r
- 3579 040c 01                  .byte   0x1\r
- 3580 040d 7403                .2byte  0x374\r
- 3581 040f 1D040000            .4byte  0x41d\r
- 3582 0413 22                  .uleb128 0x22\r
- 3583 0414 0A010000            .4byte  0x10a\r
- 3584 0418 C5020000            .4byte  .LLST18\r
- 3585 041c 00                  .byte   0\r
- 3586 041d 1D                  .uleb128 0x1d\r
- 3587 041e 08000000            .4byte  .LVL36\r
- 3588 0422 610F0000            .4byte  0xf61\r
- 3589 0426 1B                  .uleb128 0x1b\r
- 3590 0427 3A000000            .4byte  .LVL46\r
- 3591 042b A1010000            .4byte  0x1a1\r
- 3592 042f 3A040000            .4byte  0x43a\r
- 3593 0433 1C                  .uleb128 0x1c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 111\r
-\r
-\r
- 3594 0434 01                  .byte   0x1\r
- 3595 0435 50                  .byte   0x50\r
- 3596 0436 02                  .byte   0x2\r
- 3597 0437 74                  .byte   0x74\r
- 3598 0438 00                  .sleb128 0\r
- 3599 0439 00                  .byte   0\r
- 3600 043a 1B                  .uleb128 0x1b\r
- 3601 043b 42000000            .4byte  .LVL48\r
- 3602 043f A1010000            .4byte  0x1a1\r
- 3603 0443 4E040000            .4byte  0x44e\r
- 3604 0447 1C                  .uleb128 0x1c\r
- 3605 0448 01                  .byte   0x1\r
- 3606 0449 50                  .byte   0x50\r
- 3607 044a 02                  .byte   0x2\r
- 3608 044b 74                  .byte   0x74\r
- 3609 044c 00                  .sleb128 0\r
- 3610 044d 00                  .byte   0\r
- 3611 044e 1B                  .uleb128 0x1b\r
- 3612 044f 56000000            .4byte  .LVL51\r
- 3613 0453 A1010000            .4byte  0x1a1\r
- 3614 0457 62040000            .4byte  0x462\r
- 3615 045b 1C                  .uleb128 0x1c\r
- 3616 045c 01                  .byte   0x1\r
- 3617 045d 50                  .byte   0x50\r
- 3618 045e 02                  .byte   0x2\r
- 3619 045f 74                  .byte   0x74\r
- 3620 0460 00                  .sleb128 0\r
- 3621 0461 00                  .byte   0\r
- 3622 0462 1E                  .uleb128 0x1e\r
- 3623 0463 60000000            .4byte  .LVL52\r
- 3624 0467 01                  .byte   0x1\r
- 3625 0468 6F0F0000            .4byte  0xf6f\r
- 3626 046c 1C                  .uleb128 0x1c\r
- 3627 046d 01                  .byte   0x1\r
- 3628 046e 50                  .byte   0x50\r
- 3629 046f 02                  .byte   0x2\r
- 3630 0470 76                  .byte   0x76\r
- 3631 0471 00                  .sleb128 0\r
- 3632 0472 00                  .byte   0\r
- 3633 0473 00                  .byte   0\r
- 3634 0474 18                  .uleb128 0x18\r
- 3635 0475 01                  .byte   0x1\r
- 3636 0476 EA060000            .4byte  .LASF45\r
- 3637 047a 01                  .byte   0x1\r
- 3638 047b B403                .2byte  0x3b4\r
- 3639 047d 01                  .byte   0x1\r
- 3640 047e 00000000            .4byte  .LFB16\r
- 3641 0482 18000000            .4byte  .LFE16\r
- 3642 0486 02                  .byte   0x2\r
- 3643 0487 7D                  .byte   0x7d\r
- 3644 0488 00                  .sleb128 0\r
- 3645 0489 01                  .byte   0x1\r
- 3646 048a 9F040000            .4byte  0x49f\r
- 3647 048e 0F                  .uleb128 0xf\r
- 3648 048f 07040000            .4byte  .LASF30\r
- 3649 0493 01                  .byte   0x1\r
- 3650 0494 B403                .2byte  0x3b4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 112\r
-\r
-\r
- 3651 0496 85000000            .4byte  0x85\r
- 3652 049a D8020000            .4byte  .LLST19\r
- 3653 049e 00                  .byte   0\r
- 3654 049f 17                  .uleb128 0x17\r
- 3655 04a0 01                  .byte   0x1\r
- 3656 04a1 51010000            .4byte  .LASF46\r
- 3657 04a5 01                  .byte   0x1\r
- 3658 04a6 CD03                .2byte  0x3cd\r
- 3659 04a8 01                  .byte   0x1\r
- 3660 04a9 00000000            .4byte  .LFB17\r
- 3661 04ad 10000000            .4byte  .LFE17\r
- 3662 04b1 02                  .byte   0x2\r
- 3663 04b2 7D                  .byte   0x7d\r
- 3664 04b3 00                  .sleb128 0\r
- 3665 04b4 01                  .byte   0x1\r
- 3666 04b5 17                  .uleb128 0x17\r
- 3667 04b6 01                  .byte   0x1\r
- 3668 04b7 C4010000            .4byte  .LASF47\r
- 3669 04bb 01                  .byte   0x1\r
- 3670 04bc E903                .2byte  0x3e9\r
- 3671 04be 01                  .byte   0x1\r
- 3672 04bf 00000000            .4byte  .LFB18\r
- 3673 04c3 10000000            .4byte  .LFE18\r
- 3674 04c7 02                  .byte   0x2\r
- 3675 04c8 7D                  .byte   0x7d\r
- 3676 04c9 00                  .sleb128 0\r
- 3677 04ca 01                  .byte   0x1\r
- 3678 04cb 17                  .uleb128 0x17\r
- 3679 04cc 01                  .byte   0x1\r
- 3680 04cd 59040000            .4byte  .LASF48\r
- 3681 04d1 01                  .byte   0x1\r
- 3682 04d2 FE03                .2byte  0x3fe\r
- 3683 04d4 01                  .byte   0x1\r
- 3684 04d5 00000000            .4byte  .LFB19\r
- 3685 04d9 10000000            .4byte  .LFE19\r
- 3686 04dd 02                  .byte   0x2\r
- 3687 04de 7D                  .byte   0x7d\r
- 3688 04df 00                  .sleb128 0\r
- 3689 04e0 01                  .byte   0x1\r
- 3690 04e1 17                  .uleb128 0x17\r
- 3691 04e2 01                  .byte   0x1\r
- 3692 04e3 59000000            .4byte  .LASF49\r
- 3693 04e7 01                  .byte   0x1\r
- 3694 04e8 1204                .2byte  0x412\r
- 3695 04ea 01                  .byte   0x1\r
- 3696 04eb 00000000            .4byte  .LFB20\r
- 3697 04ef 10000000            .4byte  .LFE20\r
- 3698 04f3 02                  .byte   0x2\r
- 3699 04f4 7D                  .byte   0x7d\r
- 3700 04f5 00                  .sleb128 0\r
- 3701 04f6 01                  .byte   0x1\r
- 3702 04f7 19                  .uleb128 0x19\r
- 3703 04f8 01                  .byte   0x1\r
- 3704 04f9 4D000000            .4byte  .LASF50\r
- 3705 04fd 01                  .byte   0x1\r
- 3706 04fe 2801                .2byte  0x128\r
- 3707 0500 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 113\r
-\r
-\r
- 3708 0501 00000000            .4byte  .LFB4\r
- 3709 0505 50000000            .4byte  .LFE4\r
- 3710 0509 F9020000            .4byte  .LLST20\r
- 3711 050d 01                  .byte   0x1\r
- 3712 050e 82050000            .4byte  0x582\r
- 3713 0512 0F                  .uleb128 0xf\r
- 3714 0513 5F010000            .4byte  .LASF51\r
- 3715 0517 01                  .byte   0x1\r
- 3716 0518 2801                .2byte  0x128\r
- 3717 051a 85000000            .4byte  0x85\r
- 3718 051e 19030000            .4byte  .LLST21\r
- 3719 0522 1A                  .uleb128 0x1a\r
- 3720 0523 68060000            .4byte  .LASF52\r
- 3721 0527 01                  .byte   0x1\r
- 3722 0528 2A01                .2byte  0x12a\r
- 3723 052a 85000000            .4byte  0x85\r
- 3724 052e 3A030000            .4byte  .LLST22\r
- 3725 0532 1A                  .uleb128 0x1a\r
- 3726 0533 B7070000            .4byte  .LASF53\r
- 3727 0537 01                  .byte   0x1\r
- 3728 0538 2B01                .2byte  0x12b\r
- 3729 053a 85000000            .4byte  0x85\r
- 3730 053e 4D030000            .4byte  .LLST23\r
- 3731 0542 1A                  .uleb128 0x1a\r
- 3732 0543 25000000            .4byte  .LASF54\r
- 3733 0547 01                  .byte   0x1\r
- 3734 0548 2C01                .2byte  0x12c\r
- 3735 054a 85000000            .4byte  0x85\r
- 3736 054e 60030000            .4byte  .LLST24\r
- 3737 0552 1B                  .uleb128 0x1b\r
- 3738 0553 30000000            .4byte  .LVL60\r
- 3739 0557 830F0000            .4byte  0xf83\r
- 3740 055b 65050000            .4byte  0x565\r
- 3741 055f 1C                  .uleb128 0x1c\r
- 3742 0560 01                  .byte   0x1\r
- 3743 0561 50                  .byte   0x50\r
- 3744 0562 01                  .byte   0x1\r
- 3745 0563 30                  .byte   0x30\r
- 3746 0564 00                  .byte   0\r
- 3747 0565 1B                  .uleb128 0x1b\r
- 3748 0566 36000000            .4byte  .LVL61\r
- 3749 056a 970F0000            .4byte  0xf97\r
- 3750 056e 78050000            .4byte  0x578\r
- 3751 0572 1C                  .uleb128 0x1c\r
- 3752 0573 01                  .byte   0x1\r
- 3753 0574 50                  .byte   0x50\r
- 3754 0575 01                  .byte   0x1\r
- 3755 0576 31                  .byte   0x31\r
- 3756 0577 00                  .byte   0\r
- 3757 0578 1D                  .uleb128 0x1d\r
- 3758 0579 40000000            .4byte  .LVL62\r
- 3759 057d E1040000            .4byte  0x4e1\r
- 3760 0581 00                  .byte   0\r
- 3761 0582 23                  .uleb128 0x23\r
- 3762 0583 01                  .byte   0x1\r
- 3763 0584 93010000            .4byte  .LASF62\r
- 3764 0588 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 114\r
-\r
-\r
- 3765 0589 59                  .byte   0x59\r
- 3766 058a 01                  .byte   0x1\r
- 3767 058b B4000000            .4byte  0xb4\r
- 3768 058f 00000000            .4byte  .LFB0\r
- 3769 0593 68000000            .4byte  .LFE0\r
- 3770 0597 7E030000            .4byte  .LLST25\r
- 3771 059b 01                  .byte   0x1\r
- 3772 059c 1B060000            .4byte  0x61b\r
- 3773 05a0 16                  .uleb128 0x16\r
- 3774 05a1 5F010000            .4byte  .LASF51\r
- 3775 05a5 01                  .byte   0x1\r
- 3776 05a6 59                  .byte   0x59\r
- 3777 05a7 85000000            .4byte  0x85\r
- 3778 05ab 9E030000            .4byte  .LLST26\r
- 3779 05af 24                  .uleb128 0x24\r
- 3780 05b0 50070000            .4byte  .LASF55\r
- 3781 05b4 01                  .byte   0x1\r
- 3782 05b5 5B                  .byte   0x5b\r
- 3783 05b6 B4000000            .4byte  0xb4\r
- 3784 05ba D8030000            .4byte  .LLST27\r
- 3785 05be 24                  .uleb128 0x24\r
- 3786 05bf EB050000            .4byte  .LASF56\r
- 3787 05c3 01                  .byte   0x1\r
- 3788 05c4 5D                  .byte   0x5d\r
- 3789 05c5 85000000            .4byte  0x85\r
- 3790 05c9 1A040000            .4byte  .LLST28\r
- 3791 05cd 24                  .uleb128 0x24\r
- 3792 05ce BB000000            .4byte  .LASF57\r
- 3793 05d2 01                  .byte   0x1\r
- 3794 05d3 5E                  .byte   0x5e\r
- 3795 05d4 85000000            .4byte  0x85\r
- 3796 05d8 38040000            .4byte  .LLST29\r
- 3797 05dc 24                  .uleb128 0x24\r
- 3798 05dd D3050000            .4byte  .LASF58\r
- 3799 05e1 01                  .byte   0x1\r
- 3800 05e2 5F                  .byte   0x5f\r
- 3801 05e3 85000000            .4byte  0x85\r
- 3802 05e7 4B040000            .4byte  .LLST30\r
- 3803 05eb 1B                  .uleb128 0x1b\r
- 3804 05ec 26000000            .4byte  .LVL69\r
- 3805 05f0 830F0000            .4byte  0xf83\r
- 3806 05f4 FE050000            .4byte  0x5fe\r
- 3807 05f8 1C                  .uleb128 0x1c\r
- 3808 05f9 01                  .byte   0x1\r
- 3809 05fa 50                  .byte   0x50\r
- 3810 05fb 01                  .byte   0x1\r
- 3811 05fc 48                  .byte   0x48\r
- 3812 05fd 00                  .byte   0\r
- 3813 05fe 1B                  .uleb128 0x1b\r
- 3814 05ff 2C000000            .4byte  .LVL70\r
- 3815 0603 970F0000            .4byte  0xf97\r
- 3816 0607 11060000            .4byte  0x611\r
- 3817 060b 1C                  .uleb128 0x1c\r
- 3818 060c 01                  .byte   0x1\r
- 3819 060d 50                  .byte   0x50\r
- 3820 060e 01                  .byte   0x1\r
- 3821 060f 31                  .byte   0x31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 115\r
-\r
-\r
- 3822 0610 00                  .byte   0\r
- 3823 0611 1D                  .uleb128 0x1d\r
- 3824 0612 4C000000            .4byte  .LVL72\r
- 3825 0616 E1040000            .4byte  0x4e1\r
- 3826 061a 00                  .byte   0\r
- 3827 061b 17                  .uleb128 0x17\r
- 3828 061c 01                  .byte   0x1\r
- 3829 061d F8040000            .4byte  .LASF59\r
- 3830 0621 01                  .byte   0x1\r
- 3831 0622 2904                .2byte  0x429\r
- 3832 0624 01                  .byte   0x1\r
- 3833 0625 00000000            .4byte  .LFB21\r
- 3834 0629 10000000            .4byte  .LFE21\r
- 3835 062d 02                  .byte   0x2\r
- 3836 062e 7D                  .byte   0x7d\r
- 3837 062f 00                  .sleb128 0\r
- 3838 0630 01                  .byte   0x1\r
- 3839 0631 17                  .uleb128 0x17\r
- 3840 0632 01                  .byte   0x1\r
- 3841 0633 24050000            .4byte  .LASF60\r
- 3842 0637 01                  .byte   0x1\r
- 3843 0638 4104                .2byte  0x441\r
- 3844 063a 01                  .byte   0x1\r
- 3845 063b 00000000            .4byte  .LFB22\r
- 3846 063f 10000000            .4byte  .LFE22\r
- 3847 0643 02                  .byte   0x2\r
- 3848 0644 7D                  .byte   0x7d\r
- 3849 0645 00                  .sleb128 0\r
- 3850 0646 01                  .byte   0x1\r
- 3851 0647 18                  .uleb128 0x18\r
- 3852 0648 01                  .byte   0x1\r
- 3853 0649 57070000            .4byte  .LASF61\r
- 3854 064d 01                  .byte   0x1\r
- 3855 064e 5904                .2byte  0x459\r
- 3856 0650 01                  .byte   0x1\r
- 3857 0651 00000000            .4byte  .LFB23\r
- 3858 0655 18000000            .4byte  .LFE23\r
- 3859 0659 02                  .byte   0x2\r
- 3860 065a 7D                  .byte   0x7d\r
- 3861 065b 00                  .sleb128 0\r
- 3862 065c 01                  .byte   0x1\r
- 3863 065d 72060000            .4byte  0x672\r
- 3864 0661 0F                  .uleb128 0xf\r
- 3865 0662 07040000            .4byte  .LASF30\r
- 3866 0666 01                  .byte   0x1\r
- 3867 0667 5904                .2byte  0x459\r
- 3868 0669 85000000            .4byte  0x85\r
- 3869 066d 5E040000            .4byte  .LLST31\r
- 3870 0671 00                  .byte   0\r
- 3871 0672 25                  .uleb128 0x25\r
- 3872 0673 01                  .byte   0x1\r
- 3873 0674 A9020000            .4byte  .LASF63\r
- 3874 0678 01                  .byte   0x1\r
- 3875 0679 7104                .2byte  0x471\r
- 3876 067b 01                  .byte   0x1\r
- 3877 067c 85000000            .4byte  0x85\r
- 3878 0680 00000000            .4byte  .LFB24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 116\r
-\r
-\r
- 3879 0684 1C000000            .4byte  .LFE24\r
- 3880 0688 02                  .byte   0x2\r
- 3881 0689 7D                  .byte   0x7d\r
- 3882 068a 00                  .sleb128 0\r
- 3883 068b 01                  .byte   0x1\r
- 3884 068c AF060000            .4byte  0x6af\r
- 3885 0690 0F                  .uleb128 0xf\r
- 3886 0691 8A060000            .4byte  .LASF64\r
- 3887 0695 01                  .byte   0x1\r
- 3888 0696 7104                .2byte  0x471\r
- 3889 0698 85000000            .4byte  0x85\r
- 3890 069c 7F040000            .4byte  .LLST32\r
- 3891 06a0 10                  .uleb128 0x10\r
- 3892 06a1 64010000            .4byte  .LASF65\r
- 3893 06a5 01                  .byte   0x1\r
- 3894 06a6 7304                .2byte  0x473\r
- 3895 06a8 85000000            .4byte  0x85\r
- 3896 06ac 01                  .byte   0x1\r
- 3897 06ad 53                  .byte   0x53\r
- 3898 06ae 00                  .byte   0\r
- 3899 06af 17                  .uleb128 0x17\r
- 3900 06b0 01                  .byte   0x1\r
- 3901 06b1 97020000            .4byte  .LASF66\r
- 3902 06b5 01                  .byte   0x1\r
- 3903 06b6 C104                .2byte  0x4c1\r
- 3904 06b8 01                  .byte   0x1\r
- 3905 06b9 00000000            .4byte  .LFB26\r
- 3906 06bd 34000000            .4byte  .LFE26\r
- 3907 06c1 02                  .byte   0x2\r
- 3908 06c2 7D                  .byte   0x7d\r
- 3909 06c3 00                  .sleb128 0\r
- 3910 06c4 01                  .byte   0x1\r
- 3911 06c5 26                  .uleb128 0x26\r
- 3912 06c6 17010000            .4byte  0x117\r
- 3913 06ca 00000000            .4byte  .LFB27\r
- 3914 06ce 10000000            .4byte  .LFE27\r
- 3915 06d2 02                  .byte   0x2\r
- 3916 06d3 7D                  .byte   0x7d\r
- 3917 06d4 00                  .sleb128 0\r
- 3918 06d5 01                  .byte   0x1\r
- 3919 06d6 27                  .uleb128 0x27\r
- 3920 06d7 01                  .byte   0x1\r
- 3921 06d8 D1030000            .4byte  .LASF67\r
- 3922 06dc 01                  .byte   0x1\r
- 3923 06dd 3A05                .2byte  0x53a\r
- 3924 06df 01                  .byte   0x1\r
- 3925 06e0 B4000000            .4byte  0xb4\r
- 3926 06e4 00000000            .4byte  .LFB29\r
- 3927 06e8 88000000            .4byte  .LFE29\r
- 3928 06ec A0040000            .4byte  .LLST33\r
- 3929 06f0 01                  .byte   0x1\r
- 3930 06f1 95070000            .4byte  0x795\r
- 3931 06f5 0F                  .uleb128 0xf\r
- 3932 06f6 5F010000            .4byte  .LASF51\r
- 3933 06fa 01                  .byte   0x1\r
- 3934 06fb 3A05                .2byte  0x53a\r
- 3935 06fd 85000000            .4byte  0x85\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 117\r
-\r
-\r
- 3936 0701 C0040000            .4byte  .LLST34\r
- 3937 0705 1A                  .uleb128 0x1a\r
- 3938 0706 50070000            .4byte  .LASF55\r
- 3939 070a 01                  .byte   0x1\r
- 3940 070b 3C05                .2byte  0x53c\r
- 3941 070d B4000000            .4byte  0xb4\r
- 3942 0711 F6040000            .4byte  .LLST35\r
- 3943 0715 1A                  .uleb128 0x1a\r
- 3944 0716 6B020000            .4byte  .LASF68\r
- 3945 071a 01                  .byte   0x1\r
- 3946 071b 3D05                .2byte  0x53d\r
- 3947 071d CA000000            .4byte  0xca\r
- 3948 0721 38050000            .4byte  .LLST36\r
- 3949 0725 1A                  .uleb128 0x1a\r
- 3950 0726 0F000000            .4byte  .LASF69\r
- 3951 072a 01                  .byte   0x1\r
- 3952 072b 3E05                .2byte  0x53e\r
- 3953 072d CA000000            .4byte  0xca\r
- 3954 0731 A6050000            .4byte  .LLST37\r
- 3955 0735 1A                  .uleb128 0x1a\r
- 3956 0736 EB050000            .4byte  .LASF56\r
- 3957 073a 01                  .byte   0x1\r
- 3958 073b 3F05                .2byte  0x53f\r
- 3959 073d 85000000            .4byte  0x85\r
- 3960 0741 CF050000            .4byte  .LLST38\r
- 3961 0745 1A                  .uleb128 0x1a\r
- 3962 0746 0B010000            .4byte  .LASF70\r
- 3963 074a 01                  .byte   0x1\r
- 3964 074b 4005                .2byte  0x540\r
- 3965 074d 85000000            .4byte  0x85\r
- 3966 0751 E2050000            .4byte  .LLST39\r
- 3967 0755 1A                  .uleb128 0x1a\r
- 3968 0756 92070000            .4byte  .LASF71\r
- 3969 075a 01                  .byte   0x1\r
- 3970 075b 4105                .2byte  0x541\r
- 3971 075d 85000000            .4byte  0x85\r
- 3972 0761 F5050000            .4byte  .LLST40\r
- 3973 0765 1B                  .uleb128 0x1b\r
- 3974 0766 24000000            .4byte  .LVL86\r
- 3975 076a 830F0000            .4byte  0xf83\r
- 3976 076e 78070000            .4byte  0x778\r
- 3977 0772 1C                  .uleb128 0x1c\r
- 3978 0773 01                  .byte   0x1\r
- 3979 0774 50                  .byte   0x50\r
- 3980 0775 01                  .byte   0x1\r
- 3981 0776 48                  .byte   0x48\r
- 3982 0777 00                  .byte   0\r
- 3983 0778 1B                  .uleb128 0x1b\r
- 3984 0779 40000000            .4byte  .LVL92\r
- 3985 077d 970F0000            .4byte  0xf97\r
- 3986 0781 8B070000            .4byte  0x78b\r
- 3987 0785 1C                  .uleb128 0x1c\r
- 3988 0786 01                  .byte   0x1\r
- 3989 0787 50                  .byte   0x50\r
- 3990 0788 01                  .byte   0x1\r
- 3991 0789 31                  .byte   0x31\r
- 3992 078a 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 118\r
-\r
-\r
- 3993 078b 1D                  .uleb128 0x1d\r
- 3994 078c 72000000            .4byte  .LVL100\r
- 3995 0790 E1040000            .4byte  0x4e1\r
- 3996 0794 00                  .byte   0\r
- 3997 0795 17                  .uleb128 0x17\r
- 3998 0796 01                  .byte   0x1\r
- 3999 0797 F6070000            .4byte  .LASF72\r
- 4000 079b 01                  .byte   0x1\r
- 4001 079c 8A05                .2byte  0x58a\r
- 4002 079e 01                  .byte   0x1\r
- 4003 079f 00000000            .4byte  .LFB30\r
- 4004 07a3 10000000            .4byte  .LFE30\r
- 4005 07a7 02                  .byte   0x2\r
- 4006 07a8 7D                  .byte   0x7d\r
- 4007 07a9 00                  .sleb128 0\r
- 4008 07aa 01                  .byte   0x1\r
- 4009 07ab 17                  .uleb128 0x17\r
- 4010 07ac 01                  .byte   0x1\r
- 4011 07ad FA050000            .4byte  .LASF73\r
- 4012 07b1 01                  .byte   0x1\r
- 4013 07b2 A005                .2byte  0x5a0\r
- 4014 07b4 01                  .byte   0x1\r
- 4015 07b5 00000000            .4byte  .LFB31\r
- 4016 07b9 10000000            .4byte  .LFE31\r
- 4017 07bd 02                  .byte   0x2\r
- 4018 07be 7D                  .byte   0x7d\r
- 4019 07bf 00                  .sleb128 0\r
- 4020 07c0 01                  .byte   0x1\r
- 4021 07c1 17                  .uleb128 0x17\r
- 4022 07c2 01                  .byte   0x1\r
- 4023 07c3 35000000            .4byte  .LASF74\r
- 4024 07c7 01                  .byte   0x1\r
- 4025 07c8 B605                .2byte  0x5b6\r
- 4026 07ca 01                  .byte   0x1\r
- 4027 07cb 00000000            .4byte  .LFB32\r
- 4028 07cf 10000000            .4byte  .LFE32\r
- 4029 07d3 02                  .byte   0x2\r
- 4030 07d4 7D                  .byte   0x7d\r
- 4031 07d5 00                  .sleb128 0\r
- 4032 07d6 01                  .byte   0x1\r
- 4033 07d7 28                  .uleb128 0x28\r
- 4034 07d8 01                  .byte   0x1\r
- 4035 07d9 E4030000            .4byte  .LASF139\r
- 4036 07dd 01                  .byte   0x1\r
- 4037 07de CE05                .2byte  0x5ce\r
- 4038 07e0 01                  .byte   0x1\r
- 4039 07e1 85000000            .4byte  0x85\r
- 4040 07e5 00000000            .4byte  .LFB33\r
- 4041 07e9 0C000000            .4byte  .LFE33\r
- 4042 07ed 02                  .byte   0x2\r
- 4043 07ee 7D                  .byte   0x7d\r
- 4044 07ef 00                  .sleb128 0\r
- 4045 07f0 01                  .byte   0x1\r
- 4046 07f1 17                  .uleb128 0x17\r
- 4047 07f2 01                  .byte   0x1\r
- 4048 07f3 45030000            .4byte  .LASF75\r
- 4049 07f7 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 119\r
-\r
-\r
- 4050 07f8 E905                .2byte  0x5e9\r
- 4051 07fa 01                  .byte   0x1\r
- 4052 07fb 00000000            .4byte  .LFB34\r
- 4053 07ff 10000000            .4byte  .LFE34\r
- 4054 0803 02                  .byte   0x2\r
- 4055 0804 7D                  .byte   0x7d\r
- 4056 0805 00                  .sleb128 0\r
- 4057 0806 01                  .byte   0x1\r
- 4058 0807 17                  .uleb128 0x17\r
- 4059 0808 01                  .byte   0x1\r
- 4060 0809 31060000            .4byte  .LASF76\r
- 4061 080d 01                  .byte   0x1\r
- 4062 080e FF05                .2byte  0x5ff\r
- 4063 0810 01                  .byte   0x1\r
- 4064 0811 00000000            .4byte  .LFB35\r
- 4065 0815 10000000            .4byte  .LFE35\r
- 4066 0819 02                  .byte   0x2\r
- 4067 081a 7D                  .byte   0x7d\r
- 4068 081b 00                  .sleb128 0\r
- 4069 081c 01                  .byte   0x1\r
- 4070 081d 18                  .uleb128 0x18\r
- 4071 081e 01                  .byte   0x1\r
- 4072 081f 17040000            .4byte  .LASF77\r
- 4073 0823 01                  .byte   0x1\r
- 4074 0824 1906                .2byte  0x619\r
- 4075 0826 01                  .byte   0x1\r
- 4076 0827 00000000            .4byte  .LFB36\r
- 4077 082b 18000000            .4byte  .LFE36\r
- 4078 082f 02                  .byte   0x2\r
- 4079 0830 7D                  .byte   0x7d\r
- 4080 0831 00                  .sleb128 0\r
- 4081 0832 01                  .byte   0x1\r
- 4082 0833 48080000            .4byte  0x848\r
- 4083 0837 0F                  .uleb128 0xf\r
- 4084 0838 AF070000            .4byte  .LASF78\r
- 4085 083c 01                  .byte   0x1\r
- 4086 083d 1906                .2byte  0x619\r
- 4087 083f 85000000            .4byte  0x85\r
- 4088 0843 08060000            .4byte  .LLST41\r
- 4089 0847 00                  .byte   0\r
- 4090 0848 18                  .uleb128 0x18\r
- 4091 0849 01                  .byte   0x1\r
- 4092 084a 54060000            .4byte  .LASF79\r
- 4093 084e 01                  .byte   0x1\r
- 4094 084f 3106                .2byte  0x631\r
- 4095 0851 01                  .byte   0x1\r
- 4096 0852 00000000            .4byte  .LFB37\r
- 4097 0856 18000000            .4byte  .LFE37\r
- 4098 085a 02                  .byte   0x2\r
- 4099 085b 7D                  .byte   0x7d\r
- 4100 085c 00                  .sleb128 0\r
- 4101 085d 01                  .byte   0x1\r
- 4102 085e 73080000            .4byte  0x873\r
- 4103 0862 0F                  .uleb128 0xf\r
- 4104 0863 AF070000            .4byte  .LASF78\r
- 4105 0867 01                  .byte   0x1\r
- 4106 0868 3106                .2byte  0x631\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 120\r
-\r
-\r
- 4107 086a 85000000            .4byte  0x85\r
- 4108 086e 29060000            .4byte  .LLST42\r
- 4109 0872 00                  .byte   0\r
- 4110 0873 18                  .uleb128 0x18\r
- 4111 0874 01                  .byte   0x1\r
- 4112 0875 B1050000            .4byte  .LASF80\r
- 4113 0879 01                  .byte   0x1\r
- 4114 087a 4806                .2byte  0x648\r
- 4115 087c 01                  .byte   0x1\r
- 4116 087d 00000000            .4byte  .LFB38\r
- 4117 0881 1C000000            .4byte  .LFE38\r
- 4118 0885 02                  .byte   0x2\r
- 4119 0886 7D                  .byte   0x7d\r
- 4120 0887 00                  .sleb128 0\r
- 4121 0888 01                  .byte   0x1\r
- 4122 0889 9E080000            .4byte  0x89e\r
- 4123 088d 0F                  .uleb128 0xf\r
- 4124 088e AF070000            .4byte  .LASF78\r
- 4125 0892 01                  .byte   0x1\r
- 4126 0893 4806                .2byte  0x648\r
- 4127 0895 85000000            .4byte  0x85\r
- 4128 0899 4A060000            .4byte  .LLST43\r
- 4129 089d 00                  .byte   0\r
- 4130 089e 18                  .uleb128 0x18\r
- 4131 089f 01                  .byte   0x1\r
- 4132 08a0 AA050000            .4byte  .LASF81\r
- 4133 08a4 01                  .byte   0x1\r
- 4134 08a5 5D06                .2byte  0x65d\r
- 4135 08a7 01                  .byte   0x1\r
- 4136 08a8 00000000            .4byte  .LFB39\r
- 4137 08ac 04000000            .4byte  .LFE39\r
- 4138 08b0 02                  .byte   0x2\r
- 4139 08b1 7D                  .byte   0x7d\r
- 4140 08b2 00                  .sleb128 0\r
- 4141 08b3 01                  .byte   0x1\r
- 4142 08b4 C7080000            .4byte  0x8c7\r
- 4143 08b8 29                  .uleb128 0x29\r
- 4144 08b9 4D060000            .4byte  .LASF82\r
- 4145 08bd 01                  .byte   0x1\r
- 4146 08be 5D06                .2byte  0x65d\r
- 4147 08c0 85000000            .4byte  0x85\r
- 4148 08c4 01                  .byte   0x1\r
- 4149 08c5 50                  .byte   0x50\r
- 4150 08c6 00                  .byte   0\r
- 4151 08c7 17                  .uleb128 0x17\r
- 4152 08c8 01                  .byte   0x1\r
- 4153 08c9 C9000000            .4byte  .LASF83\r
- 4154 08cd 01                  .byte   0x1\r
- 4155 08ce 7C06                .2byte  0x67c\r
- 4156 08d0 01                  .byte   0x1\r
- 4157 08d1 00000000            .4byte  .LFB40\r
- 4158 08d5 10000000            .4byte  .LFE40\r
- 4159 08d9 02                  .byte   0x2\r
- 4160 08da 7D                  .byte   0x7d\r
- 4161 08db 00                  .sleb128 0\r
- 4162 08dc 01                  .byte   0x1\r
- 4163 08dd 19                  .uleb128 0x19\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 121\r
-\r
-\r
- 4164 08de 01                  .byte   0x1\r
- 4165 08df 18070000            .4byte  .LASF84\r
- 4166 08e3 01                  .byte   0x1\r
- 4167 08e4 9606                .2byte  0x696\r
- 4168 08e6 01                  .byte   0x1\r
- 4169 08e7 00000000            .4byte  .LFB41\r
- 4170 08eb 28000000            .4byte  .LFE41\r
- 4171 08ef 6B060000            .4byte  .LLST44\r
- 4172 08f3 01                  .byte   0x1\r
- 4173 08f4 1C090000            .4byte  0x91c\r
- 4174 08f8 0F                  .uleb128 0xf\r
- 4175 08f9 17050000            .4byte  .LASF85\r
- 4176 08fd 01                  .byte   0x1\r
- 4177 08fe 9606                .2byte  0x696\r
- 4178 0900 9B000000            .4byte  0x9b\r
- 4179 0904 8B060000            .4byte  .LLST45\r
- 4180 0908 1D                  .uleb128 0x1d\r
- 4181 0909 12000000            .4byte  .LVL113\r
- 4182 090d AF0F0000            .4byte  0xfaf\r
- 4183 0911 2A                  .uleb128 0x2a\r
- 4184 0912 24000000            .4byte  .LVL115\r
- 4185 0916 01                  .byte   0x1\r
- 4186 0917 AF0F0000            .4byte  0xfaf\r
- 4187 091b 00                  .byte   0\r
- 4188 091c 18                  .uleb128 0x18\r
- 4189 091d 01                  .byte   0x1\r
- 4190 091e A3010000            .4byte  .LASF86\r
- 4191 0922 01                  .byte   0x1\r
- 4192 0923 C706                .2byte  0x6c7\r
- 4193 0925 01                  .byte   0x1\r
- 4194 0926 00000000            .4byte  .LFB42\r
- 4195 092a 10000000            .4byte  .LFE42\r
- 4196 092e 02                  .byte   0x2\r
- 4197 092f 7D                  .byte   0x7d\r
- 4198 0930 00                  .sleb128 0\r
- 4199 0931 01                  .byte   0x1\r
- 4200 0932 51090000            .4byte  0x951\r
- 4201 0936 0F                  .uleb128 0xf\r
- 4202 0937 C4070000            .4byte  .LASF87\r
- 4203 093b 01                  .byte   0x1\r
- 4204 093c C706                .2byte  0x6c7\r
- 4205 093e 90000000            .4byte  0x90\r
- 4206 0942 A9060000            .4byte  .LLST46\r
- 4207 0946 2A                  .uleb128 0x2a\r
- 4208 0947 0A000000            .4byte  .LVL118\r
- 4209 094b 01                  .byte   0x1\r
- 4210 094c AF0F0000            .4byte  0xfaf\r
- 4211 0950 00                  .byte   0\r
- 4212 0951 27                  .uleb128 0x27\r
- 4213 0952 01                  .byte   0x1\r
- 4214 0953 C8040000            .4byte  .LASF88\r
- 4215 0957 01                  .byte   0x1\r
- 4216 0958 F804                .2byte  0x4f8\r
- 4217 095a 01                  .byte   0x1\r
- 4218 095b 85000000            .4byte  0x85\r
- 4219 095f 00000000            .4byte  .LFB28\r
- 4220 0963 6C000000            .4byte  .LFE28\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 122\r
-\r
-\r
- 4221 0967 CA060000            .4byte  .LLST47\r
- 4222 096b 01                  .byte   0x1\r
- 4223 096c C4090000            .4byte  0x9c4\r
- 4224 0970 0F                  .uleb128 0xf\r
- 4225 0971 8A060000            .4byte  .LASF64\r
- 4226 0975 01                  .byte   0x1\r
- 4227 0976 F804                .2byte  0x4f8\r
- 4228 0978 85000000            .4byte  0x85\r
- 4229 097c EA060000            .4byte  .LLST48\r
- 4230 0980 10                  .uleb128 0x10\r
- 4231 0981 64010000            .4byte  .LASF65\r
- 4232 0985 01                  .byte   0x1\r
- 4233 0986 FA04                .2byte  0x4fa\r
- 4234 0988 85000000            .4byte  0x85\r
- 4235 098c 01                  .byte   0x1\r
- 4236 098d 56                  .byte   0x56\r
- 4237 098e 1B                  .uleb128 0x1b\r
- 4238 098f 20000000            .4byte  .LVL122\r
- 4239 0993 1C090000            .4byte  0x91c\r
- 4240 0997 A1090000            .4byte  0x9a1\r
- 4241 099b 1C                  .uleb128 0x1c\r
- 4242 099c 01                  .byte   0x1\r
- 4243 099d 50                  .byte   0x50\r
- 4244 099e 01                  .byte   0x1\r
- 4245 099f 3A                  .byte   0x3a\r
- 4246 09a0 00                  .byte   0\r
- 4247 09a1 1B                  .uleb128 0x1b\r
- 4248 09a2 32000000            .4byte  .LVL123\r
- 4249 09a6 1C090000            .4byte  0x91c\r
- 4250 09aa B4090000            .4byte  0x9b4\r
- 4251 09ae 1C                  .uleb128 0x1c\r
- 4252 09af 01                  .byte   0x1\r
- 4253 09b0 50                  .byte   0x50\r
- 4254 09b1 01                  .byte   0x1\r
- 4255 09b2 44                  .byte   0x44\r
- 4256 09b3 00                  .byte   0\r
- 4257 09b4 2B                  .uleb128 0x2b\r
- 4258 09b5 44000000            .4byte  .LVL126\r
- 4259 09b9 1C090000            .4byte  0x91c\r
- 4260 09bd 1C                  .uleb128 0x1c\r
- 4261 09be 01                  .byte   0x1\r
- 4262 09bf 50                  .byte   0x50\r
- 4263 09c0 01                  .byte   0x1\r
- 4264 09c1 3A                  .byte   0x3a\r
- 4265 09c2 00                  .byte   0\r
- 4266 09c3 00                  .byte   0\r
- 4267 09c4 19                  .uleb128 0x19\r
- 4268 09c5 01                  .byte   0x1\r
- 4269 09c6 91000000            .4byte  .LASF89\r
- 4270 09ca 01                  .byte   0x1\r
- 4271 09cb 9504                .2byte  0x495\r
- 4272 09cd 01                  .byte   0x1\r
- 4273 09ce 00000000            .4byte  .LFB25\r
- 4274 09d2 70000000            .4byte  .LFE25\r
- 4275 09d6 30070000            .4byte  .LLST49\r
- 4276 09da 01                  .byte   0x1\r
- 4277 09db 200A0000            .4byte  0xa20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 123\r
-\r
-\r
- 4278 09df 2C                  .uleb128 0x2c\r
- 4279 09e0 6900                .ascii  "i\000"\r
- 4280 09e2 01                  .byte   0x1\r
- 4281 09e3 9704                .2byte  0x497\r
- 4282 09e5 DA000000            .4byte  0xda\r
- 4283 09e9 50070000            .4byte  .LLST50\r
- 4284 09ed 2D                  .uleb128 0x2d\r
- 4285 09ee 17010000            .4byte  0x117\r
- 4286 09f2 38000000            .4byte  .LBB16\r
- 4287 09f6 3C000000            .4byte  .LBE16\r
- 4288 09fa 01                  .byte   0x1\r
- 4289 09fb A704                .2byte  0x4a7\r
- 4290 09fd 1B                  .uleb128 0x1b\r
- 4291 09fe 4A000000            .4byte  .LVL129\r
- 4292 0a02 51090000            .4byte  0x951\r
- 4293 0a06 100A0000            .4byte  0xa10\r
- 4294 0a0a 1C                  .uleb128 0x1c\r
- 4295 0a0b 01                  .byte   0x1\r
- 4296 0a0c 50                  .byte   0x50\r
- 4297 0a0d 01                  .byte   0x1\r
- 4298 0a0e 30                  .byte   0x30\r
- 4299 0a0f 00                  .byte   0\r
- 4300 0a10 2B                  .uleb128 0x2b\r
- 4301 0a11 52000000            .4byte  .LVL130\r
- 4302 0a15 1C090000            .4byte  0x91c\r
- 4303 0a19 1C                  .uleb128 0x1c\r
- 4304 0a1a 01                  .byte   0x1\r
- 4305 0a1b 50                  .byte   0x50\r
- 4306 0a1c 01                  .byte   0x1\r
- 4307 0a1d 31                  .byte   0x31\r
- 4308 0a1e 00                  .byte   0\r
- 4309 0a1f 00                  .byte   0\r
- 4310 0a20 18                  .uleb128 0x18\r
- 4311 0a21 01                  .byte   0x1\r
- 4312 0a22 36010000            .4byte  .LASF90\r
- 4313 0a26 01                  .byte   0x1\r
- 4314 0a27 DD06                .2byte  0x6dd\r
- 4315 0a29 01                  .byte   0x1\r
- 4316 0a2a 00000000            .4byte  .LFB43\r
- 4317 0a2e 40000000            .4byte  .LFE43\r
- 4318 0a32 02                  .byte   0x2\r
- 4319 0a33 7D                  .byte   0x7d\r
- 4320 0a34 00                  .sleb128 0\r
- 4321 0a35 01                  .byte   0x1\r
- 4322 0a36 4B0A0000            .4byte  0xa4b\r
- 4323 0a3a 0F                  .uleb128 0xf\r
- 4324 0a3b 31010000            .4byte  .LASF23\r
- 4325 0a3f 01                  .byte   0x1\r
- 4326 0a40 DD06                .2byte  0x6dd\r
- 4327 0a42 9B000000            .4byte  0x9b\r
- 4328 0a46 86070000            .4byte  .LLST51\r
- 4329 0a4a 00                  .byte   0\r
- 4330 0a4b 18                  .uleb128 0x18\r
- 4331 0a4c 01                  .byte   0x1\r
- 4332 0a4d DA020000            .4byte  .LASF91\r
- 4333 0a51 01                  .byte   0x1\r
- 4334 0a52 1C07                .2byte  0x71c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 124\r
-\r
-\r
- 4335 0a54 01                  .byte   0x1\r
- 4336 0a55 00000000            .4byte  .LFB44\r
- 4337 0a59 40000000            .4byte  .LFE44\r
- 4338 0a5d 02                  .byte   0x2\r
- 4339 0a5e 7D                  .byte   0x7d\r
- 4340 0a5f 00                  .sleb128 0\r
- 4341 0a60 01                  .byte   0x1\r
- 4342 0a61 860A0000            .4byte  0xa86\r
- 4343 0a65 0F                  .uleb128 0xf\r
- 4344 0a66 29040000            .4byte  .LASF92\r
- 4345 0a6a 01                  .byte   0x1\r
- 4346 0a6b 1C07                .2byte  0x71c\r
- 4347 0a6d 85000000            .4byte  0x85\r
- 4348 0a71 A7070000            .4byte  .LLST52\r
- 4349 0a75 0F                  .uleb128 0xf\r
- 4350 0a76 7E060000            .4byte  .LASF93\r
- 4351 0a7a 01                  .byte   0x1\r
- 4352 0a7b 1C07                .2byte  0x71c\r
- 4353 0a7d 85000000            .4byte  0x85\r
- 4354 0a81 C8070000            .4byte  .LLST53\r
- 4355 0a85 00                  .byte   0\r
- 4356 0a86 17                  .uleb128 0x17\r
- 4357 0a87 01                  .byte   0x1\r
- 4358 0a88 D1010000            .4byte  .LASF94\r
- 4359 0a8c 01                  .byte   0x1\r
- 4360 0a8d 3C07                .2byte  0x73c\r
- 4361 0a8f 01                  .byte   0x1\r
- 4362 0a90 00000000            .4byte  .LFB45\r
- 4363 0a94 0C000000            .4byte  .LFE45\r
- 4364 0a98 02                  .byte   0x2\r
- 4365 0a99 7D                  .byte   0x7d\r
- 4366 0a9a 00                  .sleb128 0\r
- 4367 0a9b 01                  .byte   0x1\r
- 4368 0a9c 19                  .uleb128 0x19\r
- 4369 0a9d 01                  .byte   0x1\r
- 4370 0a9e E4070000            .4byte  .LASF95\r
- 4371 0aa2 01                  .byte   0x1\r
- 4372 0aa3 5807                .2byte  0x758\r
- 4373 0aa5 01                  .byte   0x1\r
- 4374 0aa6 00000000            .4byte  .LFB46\r
- 4375 0aaa 68000000            .4byte  .LFE46\r
- 4376 0aae E9070000            .4byte  .LLST54\r
- 4377 0ab2 01                  .byte   0x1\r
- 4378 0ab3 E70A0000            .4byte  0xae7\r
- 4379 0ab7 0F                  .uleb128 0xf\r
- 4380 0ab8 F6010000            .4byte  .LASF96\r
- 4381 0abc 01                  .byte   0x1\r
- 4382 0abd 5807                .2byte  0x758\r
- 4383 0abf 85000000            .4byte  0x85\r
- 4384 0ac3 09080000            .4byte  .LLST55\r
- 4385 0ac7 0F                  .uleb128 0xf\r
- 4386 0ac8 A0050000            .4byte  .LASF97\r
- 4387 0acc 01                  .byte   0x1\r
- 4388 0acd 5807                .2byte  0x758\r
- 4389 0acf 85000000            .4byte  0x85\r
- 4390 0ad3 2A080000            .4byte  .LLST56\r
- 4391 0ad7 2B                  .uleb128 0x2b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 125\r
-\r
-\r
- 4392 0ad8 30000000            .4byte  .LVL142\r
- 4393 0adc 1C090000            .4byte  0x91c\r
- 4394 0ae0 1C                  .uleb128 0x1c\r
- 4395 0ae1 01                  .byte   0x1\r
- 4396 0ae2 50                  .byte   0x50\r
- 4397 0ae3 01                  .byte   0x1\r
- 4398 0ae4 31                  .byte   0x31\r
- 4399 0ae5 00                  .byte   0\r
- 4400 0ae6 00                  .byte   0\r
- 4401 0ae7 19                  .uleb128 0x19\r
- 4402 0ae8 01                  .byte   0x1\r
- 4403 0ae9 73020000            .4byte  .LASF98\r
- 4404 0aed 01                  .byte   0x1\r
- 4405 0aee 8A07                .2byte  0x78a\r
- 4406 0af0 01                  .byte   0x1\r
- 4407 0af1 00000000            .4byte  .LFB47\r
- 4408 0af5 68000000            .4byte  .LFE47\r
- 4409 0af9 4B080000            .4byte  .LLST57\r
- 4410 0afd 01                  .byte   0x1\r
- 4411 0afe 320B0000            .4byte  0xb32\r
- 4412 0b02 0F                  .uleb128 0xf\r
- 4413 0b03 F6010000            .4byte  .LASF96\r
- 4414 0b07 01                  .byte   0x1\r
- 4415 0b08 8A07                .2byte  0x78a\r
- 4416 0b0a 85000000            .4byte  0x85\r
- 4417 0b0e 6B080000            .4byte  .LLST58\r
- 4418 0b12 0F                  .uleb128 0xf\r
- 4419 0b13 A0050000            .4byte  .LASF97\r
- 4420 0b17 01                  .byte   0x1\r
- 4421 0b18 8A07                .2byte  0x78a\r
- 4422 0b1a 85000000            .4byte  0x85\r
- 4423 0b1e 8C080000            .4byte  .LLST59\r
- 4424 0b22 2B                  .uleb128 0x2b\r
- 4425 0b23 32000000            .4byte  .LVL146\r
- 4426 0b27 1C090000            .4byte  0x91c\r
- 4427 0b2b 1C                  .uleb128 0x1c\r
- 4428 0b2c 01                  .byte   0x1\r
- 4429 0b2d 50                  .byte   0x50\r
- 4430 0b2e 01                  .byte   0x1\r
- 4431 0b2f 31                  .byte   0x31\r
- 4432 0b30 00                  .byte   0\r
- 4433 0b31 00                  .byte   0\r
- 4434 0b32 17                  .uleb128 0x17\r
- 4435 0b33 01                  .byte   0x1\r
- 4436 0b34 B1060000            .4byte  .LASF99\r
- 4437 0b38 01                  .byte   0x1\r
- 4438 0b39 B507                .2byte  0x7b5\r
- 4439 0b3b 01                  .byte   0x1\r
- 4440 0b3c 00000000            .4byte  .LFB48\r
- 4441 0b40 24000000            .4byte  .LFE48\r
- 4442 0b44 02                  .byte   0x2\r
- 4443 0b45 7D                  .byte   0x7d\r
- 4444 0b46 00                  .sleb128 0\r
- 4445 0b47 01                  .byte   0x1\r
- 4446 0b48 17                  .uleb128 0x17\r
- 4447 0b49 01                  .byte   0x1\r
- 4448 0b4a C4060000            .4byte  .LASF100\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 126\r
-\r
-\r
- 4449 0b4e 01                  .byte   0x1\r
- 4450 0b4f D107                .2byte  0x7d1\r
- 4451 0b51 01                  .byte   0x1\r
- 4452 0b52 00000000            .4byte  .LFB49\r
- 4453 0b56 24000000            .4byte  .LFE49\r
- 4454 0b5a 02                  .byte   0x2\r
- 4455 0b5b 7D                  .byte   0x7d\r
- 4456 0b5c 00                  .sleb128 0\r
- 4457 0b5d 01                  .byte   0x1\r
- 4458 0b5e 19                  .uleb128 0x19\r
- 4459 0b5f 01                  .byte   0x1\r
- 4460 0b60 D1070000            .4byte  .LASF101\r
- 4461 0b64 01                  .byte   0x1\r
- 4462 0b65 ED07                .2byte  0x7ed\r
- 4463 0b67 01                  .byte   0x1\r
- 4464 0b68 00000000            .4byte  .LFB50\r
- 4465 0b6c 44000000            .4byte  .LFE50\r
- 4466 0b70 AD080000            .4byte  .LLST60\r
- 4467 0b74 01                  .byte   0x1\r
- 4468 0b75 8A0B0000            .4byte  0xb8a\r
- 4469 0b79 2B                  .uleb128 0x2b\r
- 4470 0b7a 24000000            .4byte  .LVL147\r
- 4471 0b7e 1C090000            .4byte  0x91c\r
- 4472 0b82 1C                  .uleb128 0x1c\r
- 4473 0b83 01                  .byte   0x1\r
- 4474 0b84 50                  .byte   0x50\r
- 4475 0b85 02                  .byte   0x2\r
- 4476 0b86 74                  .byte   0x74\r
- 4477 0b87 00                  .sleb128 0\r
- 4478 0b88 00                  .byte   0\r
- 4479 0b89 00                  .byte   0\r
- 4480 0b8a 17                  .uleb128 0x17\r
- 4481 0b8b 01                  .byte   0x1\r
- 4482 0b8c F4020000            .4byte  .LASF102\r
- 4483 0b90 01                  .byte   0x1\r
- 4484 0b91 0E08                .2byte  0x80e\r
- 4485 0b93 01                  .byte   0x1\r
- 4486 0b94 00000000            .4byte  .LFB51\r
- 4487 0b98 10000000            .4byte  .LFE51\r
- 4488 0b9c 02                  .byte   0x2\r
- 4489 0b9d 7D                  .byte   0x7d\r
- 4490 0b9e 00                  .sleb128 0\r
- 4491 0b9f 01                  .byte   0x1\r
- 4492 0ba0 25                  .uleb128 0x25\r
- 4493 0ba1 01                  .byte   0x1\r
- 4494 0ba2 86020000            .4byte  .LASF103\r
- 4495 0ba6 01                  .byte   0x1\r
- 4496 0ba7 2808                .2byte  0x828\r
- 4497 0ba9 01                  .byte   0x1\r
- 4498 0baa 85000000            .4byte  0x85\r
- 4499 0bae 00000000            .4byte  .LFB52\r
- 4500 0bb2 14000000            .4byte  .LFE52\r
- 4501 0bb6 02                  .byte   0x2\r
- 4502 0bb7 7D                  .byte   0x7d\r
- 4503 0bb8 00                  .sleb128 0\r
- 4504 0bb9 01                  .byte   0x1\r
- 4505 0bba DD0B0000            .4byte  0xbdd\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 127\r
-\r
-\r
- 4506 0bbe 0F                  .uleb128 0xf\r
- 4507 0bbf F1010000            .4byte  .LASF104\r
- 4508 0bc3 01                  .byte   0x1\r
- 4509 0bc4 2808                .2byte  0x828\r
- 4510 0bc6 85000000            .4byte  0x85\r
- 4511 0bca CD080000            .4byte  .LLST61\r
- 4512 0bce 10                  .uleb128 0x10\r
- 4513 0bcf 50070000            .4byte  .LASF55\r
- 4514 0bd3 01                  .byte   0x1\r
- 4515 0bd4 2A08                .2byte  0x82a\r
- 4516 0bd6 85000000            .4byte  0x85\r
- 4517 0bda 01                  .byte   0x1\r
- 4518 0bdb 52                  .byte   0x52\r
- 4519 0bdc 00                  .byte   0\r
- 4520 0bdd 27                  .uleb128 0x27\r
- 4521 0bde 01                  .byte   0x1\r
- 4522 0bdf 46040000            .4byte  .LASF105\r
- 4523 0be3 01                  .byte   0x1\r
- 4524 0be4 4508                .2byte  0x845\r
- 4525 0be6 01                  .byte   0x1\r
- 4526 0be7 85000000            .4byte  0x85\r
- 4527 0beb 00000000            .4byte  .LFB53\r
- 4528 0bef 18000000            .4byte  .LFE53\r
- 4529 0bf3 EE080000            .4byte  .LLST62\r
- 4530 0bf7 01                  .byte   0x1\r
- 4531 0bf8 2D0C0000            .4byte  0xc2d\r
- 4532 0bfc 1A                  .uleb128 0x1a\r
- 4533 0bfd 42010000            .4byte  .LASF44\r
- 4534 0c01 01                  .byte   0x1\r
- 4535 0c02 4708                .2byte  0x847\r
- 4536 0c04 85000000            .4byte  0x85\r
- 4537 0c08 0E090000            .4byte  .LLST63\r
- 4538 0c0c 10                  .uleb128 0x10\r
- 4539 0c0d 43070000            .4byte  .LASF106\r
- 4540 0c11 01                  .byte   0x1\r
- 4541 0c12 4808                .2byte  0x848\r
- 4542 0c14 85000000            .4byte  0x85\r
- 4543 0c18 01                  .byte   0x1\r
- 4544 0c19 54                  .byte   0x54\r
- 4545 0c1a 1D                  .uleb128 0x1d\r
- 4546 0c1b 06000000            .4byte  .LVL151\r
- 4547 0c1f 610F0000            .4byte  0xf61\r
- 4548 0c23 1D                  .uleb128 0x1d\r
- 4549 0c24 0E000000            .4byte  .LVL153\r
- 4550 0c28 6F0F0000            .4byte  0xf6f\r
- 4551 0c2c 00                  .byte   0\r
- 4552 0c2d 27                  .uleb128 0x27\r
- 4553 0c2e 01                  .byte   0x1\r
- 4554 0c2f 83000000            .4byte  .LASF107\r
- 4555 0c33 01                  .byte   0x1\r
- 4556 0c34 6008                .2byte  0x860\r
- 4557 0c36 01                  .byte   0x1\r
- 4558 0c37 9B000000            .4byte  0x9b\r
- 4559 0c3b 00000000            .4byte  .LFB54\r
- 4560 0c3f 1C000000            .4byte  .LFE54\r
- 4561 0c43 21090000            .4byte  .LLST64\r
- 4562 0c47 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 128\r
-\r
-\r
- 4563 0c48 7D0C0000            .4byte  0xc7d\r
- 4564 0c4c 10                  .uleb128 0x10\r
- 4565 0c4d 1C000000            .4byte  .LASF108\r
- 4566 0c51 01                  .byte   0x1\r
- 4567 0c52 6208                .2byte  0x862\r
- 4568 0c54 9B000000            .4byte  0x9b\r
- 4569 0c58 01                  .byte   0x1\r
- 4570 0c59 54                  .byte   0x54\r
- 4571 0c5a 1A                  .uleb128 0x1a\r
- 4572 0c5b 42010000            .4byte  .LASF44\r
- 4573 0c5f 01                  .byte   0x1\r
- 4574 0c60 6308                .2byte  0x863\r
- 4575 0c62 85000000            .4byte  0x85\r
- 4576 0c66 41090000            .4byte  .LLST65\r
- 4577 0c6a 1D                  .uleb128 0x1d\r
- 4578 0c6b 06000000            .4byte  .LVL154\r
- 4579 0c6f 610F0000            .4byte  0xf61\r
- 4580 0c73 1D                  .uleb128 0x1d\r
- 4581 0c74 14000000            .4byte  .LVL156\r
- 4582 0c78 6F0F0000            .4byte  0xf6f\r
- 4583 0c7c 00                  .byte   0\r
- 4584 0c7d 19                  .uleb128 0x19\r
- 4585 0c7e 01                  .byte   0x1\r
- 4586 0c7f DD060000            .4byte  .LASF109\r
- 4587 0c83 01                  .byte   0x1\r
- 4588 0c84 9408                .2byte  0x894\r
- 4589 0c86 01                  .byte   0x1\r
- 4590 0c87 00000000            .4byte  .LFB55\r
- 4591 0c8b 18000000            .4byte  .LFE55\r
- 4592 0c8f 54090000            .4byte  .LLST66\r
- 4593 0c93 01                  .byte   0x1\r
- 4594 0c94 CC0C0000            .4byte  0xccc\r
- 4595 0c98 0F                  .uleb128 0xf\r
- 4596 0c99 F1010000            .4byte  .LASF104\r
- 4597 0c9d 01                  .byte   0x1\r
- 4598 0c9e 9408                .2byte  0x894\r
- 4599 0ca0 9B000000            .4byte  0x9b\r
- 4600 0ca4 74090000            .4byte  .LLST67\r
- 4601 0ca8 1A                  .uleb128 0x1a\r
- 4602 0ca9 42010000            .4byte  .LASF44\r
- 4603 0cad 01                  .byte   0x1\r
- 4604 0cae 9708                .2byte  0x897\r
- 4605 0cb0 85000000            .4byte  0x85\r
- 4606 0cb4 92090000            .4byte  .LLST68\r
- 4607 0cb8 1D                  .uleb128 0x1d\r
- 4608 0cb9 08000000            .4byte  .LVL158\r
- 4609 0cbd 610F0000            .4byte  0xf61\r
- 4610 0cc1 2A                  .uleb128 0x2a\r
- 4611 0cc2 14000000            .4byte  .LVL159\r
- 4612 0cc6 01                  .byte   0x1\r
- 4613 0cc7 6F0F0000            .4byte  0xf6f\r
- 4614 0ccb 00                  .byte   0\r
- 4615 0ccc 19                  .uleb128 0x19\r
- 4616 0ccd 01                  .byte   0x1\r
- 4617 0cce 11060000            .4byte  .LASF110\r
- 4618 0cd2 01                  .byte   0x1\r
- 4619 0cd3 BC08                .2byte  0x8bc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 129\r
-\r
-\r
- 4620 0cd5 01                  .byte   0x1\r
- 4621 0cd6 00000000            .4byte  .LFB56\r
- 4622 0cda 60000000            .4byte  .LFE56\r
- 4623 0cde A5090000            .4byte  .LLST69\r
- 4624 0ce2 01                  .byte   0x1\r
- 4625 0ce3 0B0D0000            .4byte  0xd0b\r
- 4626 0ce7 1A                  .uleb128 0x1a\r
- 4627 0ce8 42010000            .4byte  .LASF44\r
- 4628 0cec 01                  .byte   0x1\r
- 4629 0ced BE08                .2byte  0x8be\r
- 4630 0cef 85000000            .4byte  0x85\r
- 4631 0cf3 C5090000            .4byte  .LLST70\r
- 4632 0cf7 1D                  .uleb128 0x1d\r
- 4633 0cf8 06000000            .4byte  .LVL160\r
- 4634 0cfc 610F0000            .4byte  0xf61\r
- 4635 0d00 2A                  .uleb128 0x2a\r
- 4636 0d01 5A000000            .4byte  .LVL161\r
- 4637 0d05 01                  .byte   0x1\r
- 4638 0d06 6F0F0000            .4byte  0xf6f\r
- 4639 0d0a 00                  .byte   0\r
- 4640 0d0b 25                  .uleb128 0x25\r
- 4641 0d0c 01                  .byte   0x1\r
- 4642 0d0d 8E030000            .4byte  .LASF111\r
- 4643 0d11 01                  .byte   0x1\r
- 4644 0d12 0409                .2byte  0x904\r
- 4645 0d14 01                  .byte   0x1\r
- 4646 0d15 EF000000            .4byte  0xef\r
- 4647 0d19 00000000            .4byte  .LFB57\r
- 4648 0d1d 18000000            .4byte  .LFE57\r
- 4649 0d21 02                  .byte   0x2\r
- 4650 0d22 7D                  .byte   0x7d\r
- 4651 0d23 00                  .sleb128 0\r
- 4652 0d24 01                  .byte   0x1\r
- 4653 0d25 660D0000            .4byte  0xd66\r
- 4654 0d29 0F                  .uleb128 0xf\r
- 4655 0d2a 1E030000            .4byte  .LASF112\r
- 4656 0d2e 01                  .byte   0x1\r
- 4657 0d2f 0409                .2byte  0x904\r
- 4658 0d31 85000000            .4byte  0x85\r
- 4659 0d35 D8090000            .4byte  .LLST71\r
- 4660 0d39 29                  .uleb128 0x29\r
- 4661 0d3a 2F040000            .4byte  .LASF113\r
- 4662 0d3e 01                  .byte   0x1\r
- 4663 0d3f 0409                .2byte  0x904\r
- 4664 0d41 EF000000            .4byte  0xef\r
- 4665 0d45 01                  .byte   0x1\r
- 4666 0d46 51                  .byte   0x51\r
- 4667 0d47 10                  .uleb128 0x10\r
- 4668 0d48 68000000            .4byte  .LASF114\r
- 4669 0d4c 01                  .byte   0x1\r
- 4670 0d4d 0609                .2byte  0x906\r
- 4671 0d4f EF000000            .4byte  0xef\r
- 4672 0d53 01                  .byte   0x1\r
- 4673 0d54 50                  .byte   0x50\r
- 4674 0d55 1A                  .uleb128 0x1a\r
- 4675 0d56 00000000            .4byte  .LASF115\r
- 4676 0d5a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 130\r
-\r
-\r
- 4677 0d5b 0709                .2byte  0x907\r
- 4678 0d5d 660D0000            .4byte  0xd66\r
- 4679 0d61 F9090000            .4byte  .LLST72\r
- 4680 0d65 00                  .byte   0\r
- 4681 0d66 05                  .uleb128 0x5\r
- 4682 0d67 04                  .byte   0x4\r
- 4683 0d68 EF000000            .4byte  0xef\r
- 4684 0d6c 25                  .uleb128 0x25\r
- 4685 0d6d 01                  .byte   0x1\r
- 4686 0d6e 0D020000            .4byte  .LASF116\r
- 4687 0d72 01                  .byte   0x1\r
- 4688 0d73 2509                .2byte  0x925\r
- 4689 0d75 01                  .byte   0x1\r
- 4690 0d76 EF000000            .4byte  0xef\r
- 4691 0d7a 00000000            .4byte  .LFB58\r
- 4692 0d7e 14000000            .4byte  .LFE58\r
- 4693 0d82 02                  .byte   0x2\r
- 4694 0d83 7D                  .byte   0x7d\r
- 4695 0d84 00                  .sleb128 0\r
- 4696 0d85 01                  .byte   0x1\r
- 4697 0d86 AB0D0000            .4byte  0xdab\r
- 4698 0d8a 0F                  .uleb128 0xf\r
- 4699 0d8b 1E030000            .4byte  .LASF112\r
- 4700 0d8f 01                  .byte   0x1\r
- 4701 0d90 2509                .2byte  0x925\r
- 4702 0d92 85000000            .4byte  0x85\r
- 4703 0d96 280A0000            .4byte  .LLST73\r
- 4704 0d9a 1A                  .uleb128 0x1a\r
- 4705 0d9b 00000000            .4byte  .LASF115\r
- 4706 0d9f 01                  .byte   0x1\r
- 4707 0da0 2709                .2byte  0x927\r
- 4708 0da2 660D0000            .4byte  0xd66\r
- 4709 0da6 490A0000            .4byte  .LLST74\r
- 4710 0daa 00                  .byte   0\r
- 4711 0dab 25                  .uleb128 0x25\r
- 4712 0dac 01                  .byte   0x1\r
- 4713 0dad E5020000            .4byte  .LASF117\r
- 4714 0db1 01                  .byte   0x1\r
- 4715 0db2 3D09                .2byte  0x93d\r
- 4716 0db4 01                  .byte   0x1\r
- 4717 0db5 EF000000            .4byte  0xef\r
- 4718 0db9 00000000            .4byte  .LFB59\r
- 4719 0dbd 1C000000            .4byte  .LFE59\r
- 4720 0dc1 02                  .byte   0x2\r
- 4721 0dc2 7D                  .byte   0x7d\r
- 4722 0dc3 00                  .sleb128 0\r
- 4723 0dc4 01                  .byte   0x1\r
- 4724 0dc5 060E0000            .4byte  0xe06\r
- 4725 0dc9 0F                  .uleb128 0xf\r
- 4726 0dca 1E030000            .4byte  .LASF112\r
- 4727 0dce 01                  .byte   0x1\r
- 4728 0dcf 3D09                .2byte  0x93d\r
- 4729 0dd1 85000000            .4byte  0x85\r
- 4730 0dd5 6D0A0000            .4byte  .LLST75\r
- 4731 0dd9 29                  .uleb128 0x29\r
- 4732 0dda 2F040000            .4byte  .LASF113\r
- 4733 0dde 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 131\r
-\r
-\r
- 4734 0ddf 3D09                .2byte  0x93d\r
- 4735 0de1 EF000000            .4byte  0xef\r
- 4736 0de5 01                  .byte   0x1\r
- 4737 0de6 51                  .byte   0x51\r
- 4738 0de7 10                  .uleb128 0x10\r
- 4739 0de8 68000000            .4byte  .LASF114\r
- 4740 0dec 01                  .byte   0x1\r
- 4741 0ded 3F09                .2byte  0x93f\r
- 4742 0def EF000000            .4byte  0xef\r
- 4743 0df3 01                  .byte   0x1\r
- 4744 0df4 50                  .byte   0x50\r
- 4745 0df5 1A                  .uleb128 0x1a\r
- 4746 0df6 00000000            .4byte  .LASF115\r
- 4747 0dfa 01                  .byte   0x1\r
- 4748 0dfb 4009                .2byte  0x940\r
- 4749 0dfd 660D0000            .4byte  0xd66\r
- 4750 0e01 8E0A0000            .4byte  .LLST76\r
- 4751 0e05 00                  .byte   0\r
- 4752 0e06 25                  .uleb128 0x25\r
- 4753 0e07 01                  .byte   0x1\r
- 4754 0e08 08050000            .4byte  .LASF118\r
- 4755 0e0c 01                  .byte   0x1\r
- 4756 0e0d 5C09                .2byte  0x95c\r
- 4757 0e0f 01                  .byte   0x1\r
- 4758 0e10 EF000000            .4byte  0xef\r
- 4759 0e14 00000000            .4byte  .LFB60\r
- 4760 0e18 14000000            .4byte  .LFE60\r
- 4761 0e1c 02                  .byte   0x2\r
- 4762 0e1d 7D                  .byte   0x7d\r
- 4763 0e1e 00                  .sleb128 0\r
- 4764 0e1f 01                  .byte   0x1\r
- 4765 0e20 450E0000            .4byte  0xe45\r
- 4766 0e24 0F                  .uleb128 0xf\r
- 4767 0e25 1E030000            .4byte  .LASF112\r
- 4768 0e29 01                  .byte   0x1\r
- 4769 0e2a 5C09                .2byte  0x95c\r
- 4770 0e2c 85000000            .4byte  0x85\r
- 4771 0e30 BD0A0000            .4byte  .LLST77\r
- 4772 0e34 1A                  .uleb128 0x1a\r
- 4773 0e35 00000000            .4byte  .LASF115\r
- 4774 0e39 01                  .byte   0x1\r
- 4775 0e3a 5E09                .2byte  0x95e\r
- 4776 0e3c 660D0000            .4byte  0xd66\r
- 4777 0e40 DE0A0000            .4byte  .LLST78\r
- 4778 0e44 00                  .byte   0\r
- 4779 0e45 18                  .uleb128 0x18\r
- 4780 0e46 01                  .byte   0x1\r
- 4781 0e47 60030000            .4byte  .LASF119\r
- 4782 0e4b 01                  .byte   0x1\r
- 4783 0e4c 7409                .2byte  0x974\r
- 4784 0e4e 01                  .byte   0x1\r
- 4785 0e4f 00000000            .4byte  .LFB61\r
- 4786 0e53 14000000            .4byte  .LFE61\r
- 4787 0e57 02                  .byte   0x2\r
- 4788 0e58 7D                  .byte   0x7d\r
- 4789 0e59 00                  .sleb128 0\r
- 4790 0e5a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 132\r
-\r
-\r
- 4791 0e5b 800E0000            .4byte  0xe80\r
- 4792 0e5f 0F                  .uleb128 0xf\r
- 4793 0e60 1E030000            .4byte  .LASF112\r
- 4794 0e64 01                  .byte   0x1\r
- 4795 0e65 7409                .2byte  0x974\r
- 4796 0e67 85000000            .4byte  0x85\r
- 4797 0e6b 020B0000            .4byte  .LLST79\r
- 4798 0e6f 0F                  .uleb128 0xf\r
- 4799 0e70 3C030000            .4byte  .LASF120\r
- 4800 0e74 01                  .byte   0x1\r
- 4801 0e75 7409                .2byte  0x974\r
- 4802 0e77 85000000            .4byte  0x85\r
- 4803 0e7b 230B0000            .4byte  .LLST80\r
- 4804 0e7f 00                  .byte   0\r
- 4805 0e80 25                  .uleb128 0x25\r
- 4806 0e81 01                  .byte   0x1\r
- 4807 0e82 FC010000            .4byte  .LASF121\r
- 4808 0e86 01                  .byte   0x1\r
- 4809 0e87 8A09                .2byte  0x98a\r
- 4810 0e89 01                  .byte   0x1\r
- 4811 0e8a 85000000            .4byte  0x85\r
- 4812 0e8e 00000000            .4byte  .LFB62\r
- 4813 0e92 12000000            .4byte  .LFE62\r
- 4814 0e96 02                  .byte   0x2\r
- 4815 0e97 7D                  .byte   0x7d\r
- 4816 0e98 00                  .sleb128 0\r
- 4817 0e99 01                  .byte   0x1\r
- 4818 0e9a C10E0000            .4byte  0xec1\r
- 4819 0e9e 0F                  .uleb128 0xf\r
- 4820 0e9f 1E030000            .4byte  .LASF112\r
- 4821 0ea3 01                  .byte   0x1\r
- 4822 0ea4 8A09                .2byte  0x98a\r
- 4823 0ea6 85000000            .4byte  0x85\r
- 4824 0eaa 440B0000            .4byte  .LLST81\r
- 4825 0eae 10                  .uleb128 0x10\r
- 4826 0eaf 3C030000            .4byte  .LASF120\r
- 4827 0eb3 01                  .byte   0x1\r
- 4828 0eb4 8C09                .2byte  0x98c\r
- 4829 0eb6 85000000            .4byte  0x85\r
- 4830 0eba 05                  .byte   0x5\r
- 4831 0ebb 72                  .byte   0x72\r
- 4832 0ebc 00                  .sleb128 0\r
- 4833 0ebd 35                  .byte   0x35\r
- 4834 0ebe 25                  .byte   0x25\r
- 4835 0ebf 9F                  .byte   0x9f\r
- 4836 0ec0 00                  .byte   0\r
- 4837 0ec1 25                  .uleb128 0x25\r
- 4838 0ec2 01                  .byte   0x1\r
- 4839 0ec3 FD000000            .4byte  .LASF122\r
- 4840 0ec7 01                  .byte   0x1\r
- 4841 0ec8 A409                .2byte  0x9a4\r
- 4842 0eca 01                  .byte   0x1\r
- 4843 0ecb 85000000            .4byte  0x85\r
- 4844 0ecf 00000000            .4byte  .LFB63\r
- 4845 0ed3 18000000            .4byte  .LFE63\r
- 4846 0ed7 02                  .byte   0x2\r
- 4847 0ed8 7D                  .byte   0x7d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 133\r
-\r
-\r
- 4848 0ed9 00                  .sleb128 0\r
- 4849 0eda 01                  .byte   0x1\r
- 4850 0edb 010F0000            .4byte  0xf01\r
- 4851 0edf 0F                  .uleb128 0xf\r
- 4852 0ee0 1E030000            .4byte  .LASF112\r
- 4853 0ee4 01                  .byte   0x1\r
- 4854 0ee5 A409                .2byte  0x9a4\r
- 4855 0ee7 85000000            .4byte  0x85\r
- 4856 0eeb 650B0000            .4byte  .LLST82\r
- 4857 0eef 2E                  .uleb128 0x2e\r
- 4858 0ef0 1E060000            .4byte  .LASF123\r
- 4859 0ef4 01                  .byte   0x1\r
- 4860 0ef5 A609                .2byte  0x9a6\r
- 4861 0ef7 010F0000            .4byte  0xf01\r
- 4862 0efb 80C28380            .sleb128 -536813312\r
- 4862      7E\r
- 4863 0f00 00                  .byte   0\r
- 4864 0f01 05                  .uleb128 0x5\r
- 4865 0f02 04                  .byte   0x4\r
- 4866 0f03 DF000000            .4byte  0xdf\r
- 4867 0f07 2F                  .uleb128 0x2f\r
- 4868 0f08 74040000            .4byte  .LASF124\r
- 4869 0f0c 01                  .byte   0x1\r
- 4870 0f0d 1D                  .byte   0x1d\r
- 4871 0f0e 85000000            .4byte  0x85\r
- 4872 0f12 01                  .byte   0x1\r
- 4873 0f13 05                  .byte   0x5\r
- 4874 0f14 03                  .byte   0x3\r
- 4875 0f15 00000000            .4byte  CyResetStatus\r
- 4876 0f19 2F                  .uleb128 0x2f\r
- 4877 0f1a 35050000            .4byte  .LASF125\r
- 4878 0f1e 01                  .byte   0x1\r
- 4879 0f1f 29                  .byte   0x29\r
- 4880 0f20 9B000000            .4byte  0x9b\r
- 4881 0f24 01                  .byte   0x1\r
- 4882 0f25 05                  .byte   0x5\r
- 4883 0f26 03                  .byte   0x3\r
- 4884 0f27 00000000            .4byte  cydelay_freq_hz\r
- 4885 0f2b 2F                  .uleb128 0x2f\r
- 4886 0f2c F6030000            .4byte  .LASF126\r
- 4887 0f30 01                  .byte   0x1\r
- 4888 0f31 2A                  .byte   0x2a\r
- 4889 0f32 9B000000            .4byte  0x9b\r
- 4890 0f36 01                  .byte   0x1\r
- 4891 0f37 05                  .byte   0x5\r
- 4892 0f38 03                  .byte   0x3\r
- 4893 0f39 00000000            .4byte  cydelay_freq_khz\r
- 4894 0f3d 2F                  .uleb128 0x2f\r
- 4895 0f3e EC000000            .4byte  .LASF127\r
- 4896 0f42 01                  .byte   0x1\r
- 4897 0f43 2B                  .byte   0x2b\r
- 4898 0f44 85000000            .4byte  0x85\r
- 4899 0f48 01                  .byte   0x1\r
- 4900 0f49 05                  .byte   0x5\r
- 4901 0f4a 03                  .byte   0x3\r
- 4902 0f4b 00000000            .4byte  cydelay_freq_mhz\r
- 4903 0f4f 2F                  .uleb128 0x2f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 134\r
-\r
-\r
- 4904 0f50 34070000            .4byte  .LASF128\r
- 4905 0f54 01                  .byte   0x1\r
- 4906 0f55 2C                  .byte   0x2c\r
- 4907 0f56 9B000000            .4byte  0x9b\r
- 4908 0f5a 01                  .byte   0x1\r
- 4909 0f5b 05                  .byte   0x5\r
- 4910 0f5c 03                  .byte   0x3\r
- 4911 0f5d 00000000            .4byte  cydelay_32k_ms\r
- 4912 0f61 30                  .uleb128 0x30\r
- 4913 0f62 01                  .byte   0x1\r
- 4914 0f63 25030000            .4byte  .LASF130\r
- 4915 0f67 03                  .byte   0x3\r
- 4916 0f68 7E                  .byte   0x7e\r
- 4917 0f69 01                  .byte   0x1\r
- 4918 0f6a 85000000            .4byte  0x85\r
- 4919 0f6e 01                  .byte   0x1\r
- 4920 0f6f 31                  .uleb128 0x31\r
- 4921 0f70 01                  .byte   0x1\r
- 4922 0f71 E2040000            .4byte  .LASF132\r
- 4923 0f75 03                  .byte   0x3\r
- 4924 0f76 7F                  .byte   0x7f\r
- 4925 0f77 01                  .byte   0x1\r
- 4926 0f78 01                  .byte   0x1\r
- 4927 0f79 830F0000            .4byte  0xf83\r
- 4928 0f7d 32                  .uleb128 0x32\r
- 4929 0f7e 85000000            .4byte  0x85\r
- 4930 0f82 00                  .byte   0\r
- 4931 0f83 31                  .uleb128 0x31\r
- 4932 0f84 01                  .byte   0x1\r
- 4933 0f85 02080000            .4byte  .LASF133\r
- 4934 0f89 04                  .byte   0x4\r
- 4935 0f8a 2A                  .byte   0x2a\r
- 4936 0f8b 01                  .byte   0x1\r
- 4937 0f8c 01                  .byte   0x1\r
- 4938 0f8d 970F0000            .4byte  0xf97\r
- 4939 0f91 32                  .uleb128 0x32\r
- 4940 0f92 85000000            .4byte  0x85\r
- 4941 0f96 00                  .byte   0\r
- 4942 0f97 33                  .uleb128 0x33\r
- 4943 0f98 01                  .byte   0x1\r
- 4944 0f99 FD060000            .4byte  .LASF140\r
- 4945 0f9d 04                  .byte   0x4\r
- 4946 0f9e 26                  .byte   0x26\r
- 4947 0f9f 01                  .byte   0x1\r
- 4948 0fa0 85000000            .4byte  0x85\r
- 4949 0fa4 01                  .byte   0x1\r
- 4950 0fa5 AF0F0000            .4byte  0xfaf\r
- 4951 0fa9 32                  .uleb128 0x32\r
- 4952 0faa 85000000            .4byte  0x85\r
- 4953 0fae 00                  .byte   0\r
- 4954 0faf 34                  .uleb128 0x34\r
- 4955 0fb0 01                  .byte   0x1\r
- 4956 0fb1 E3010000            .4byte  .LASF141\r
- 4957 0fb5 03                  .byte   0x3\r
- 4958 0fb6 7A                  .byte   0x7a\r
- 4959 0fb7 01                  .byte   0x1\r
- 4960 0fb8 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 135\r
-\r
-\r
- 4961 0fb9 32                  .uleb128 0x32\r
- 4962 0fba 9B000000            .4byte  0x9b\r
- 4963 0fbe 00                  .byte   0\r
- 4964 0fbf 00                  .byte   0\r
- 4965                          .section        .debug_abbrev,"",%progbits\r
- 4966                  .Ldebug_abbrev0:\r
- 4967 0000 01                  .uleb128 0x1\r
- 4968 0001 11                  .uleb128 0x11\r
- 4969 0002 01                  .byte   0x1\r
- 4970 0003 25                  .uleb128 0x25\r
- 4971 0004 0E                  .uleb128 0xe\r
- 4972 0005 13                  .uleb128 0x13\r
- 4973 0006 0B                  .uleb128 0xb\r
- 4974 0007 03                  .uleb128 0x3\r
- 4975 0008 0E                  .uleb128 0xe\r
- 4976 0009 1B                  .uleb128 0x1b\r
- 4977 000a 0E                  .uleb128 0xe\r
- 4978 000b 55                  .uleb128 0x55\r
- 4979 000c 06                  .uleb128 0x6\r
- 4980 000d 11                  .uleb128 0x11\r
- 4981 000e 01                  .uleb128 0x1\r
- 4982 000f 52                  .uleb128 0x52\r
- 4983 0010 01                  .uleb128 0x1\r
- 4984 0011 10                  .uleb128 0x10\r
- 4985 0012 06                  .uleb128 0x6\r
- 4986 0013 00                  .byte   0\r
- 4987 0014 00                  .byte   0\r
- 4988 0015 02                  .uleb128 0x2\r
- 4989 0016 24                  .uleb128 0x24\r
- 4990 0017 00                  .byte   0\r
- 4991 0018 0B                  .uleb128 0xb\r
- 4992 0019 0B                  .uleb128 0xb\r
- 4993 001a 3E                  .uleb128 0x3e\r
- 4994 001b 0B                  .uleb128 0xb\r
- 4995 001c 03                  .uleb128 0x3\r
- 4996 001d 0E                  .uleb128 0xe\r
- 4997 001e 00                  .byte   0\r
- 4998 001f 00                  .byte   0\r
- 4999 0020 03                  .uleb128 0x3\r
- 5000 0021 24                  .uleb128 0x24\r
- 5001 0022 00                  .byte   0\r
- 5002 0023 0B                  .uleb128 0xb\r
- 5003 0024 0B                  .uleb128 0xb\r
- 5004 0025 3E                  .uleb128 0x3e\r
- 5005 0026 0B                  .uleb128 0xb\r
- 5006 0027 03                  .uleb128 0x3\r
- 5007 0028 08                  .uleb128 0x8\r
- 5008 0029 00                  .byte   0\r
- 5009 002a 00                  .byte   0\r
- 5010 002b 04                  .uleb128 0x4\r
- 5011 002c 15                  .uleb128 0x15\r
- 5012 002d 00                  .byte   0\r
- 5013 002e 27                  .uleb128 0x27\r
- 5014 002f 0C                  .uleb128 0xc\r
- 5015 0030 00                  .byte   0\r
- 5016 0031 00                  .byte   0\r
- 5017 0032 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 136\r
-\r
-\r
- 5018 0033 0F                  .uleb128 0xf\r
- 5019 0034 00                  .byte   0\r
- 5020 0035 0B                  .uleb128 0xb\r
- 5021 0036 0B                  .uleb128 0xb\r
- 5022 0037 49                  .uleb128 0x49\r
- 5023 0038 13                  .uleb128 0x13\r
- 5024 0039 00                  .byte   0\r
- 5025 003a 00                  .byte   0\r
- 5026 003b 06                  .uleb128 0x6\r
- 5027 003c 16                  .uleb128 0x16\r
- 5028 003d 00                  .byte   0\r
- 5029 003e 03                  .uleb128 0x3\r
- 5030 003f 0E                  .uleb128 0xe\r
- 5031 0040 3A                  .uleb128 0x3a\r
- 5032 0041 0B                  .uleb128 0xb\r
- 5033 0042 3B                  .uleb128 0x3b\r
- 5034 0043 0B                  .uleb128 0xb\r
- 5035 0044 49                  .uleb128 0x49\r
- 5036 0045 13                  .uleb128 0x13\r
- 5037 0046 00                  .byte   0\r
- 5038 0047 00                  .byte   0\r
- 5039 0048 07                  .uleb128 0x7\r
- 5040 0049 35                  .uleb128 0x35\r
- 5041 004a 00                  .byte   0\r
- 5042 004b 49                  .uleb128 0x49\r
- 5043 004c 13                  .uleb128 0x13\r
- 5044 004d 00                  .byte   0\r
- 5045 004e 00                  .byte   0\r
- 5046 004f 08                  .uleb128 0x8\r
- 5047 0050 16                  .uleb128 0x16\r
- 5048 0051 00                  .byte   0\r
- 5049 0052 03                  .uleb128 0x3\r
- 5050 0053 0E                  .uleb128 0xe\r
- 5051 0054 3A                  .uleb128 0x3a\r
- 5052 0055 0B                  .uleb128 0xb\r
- 5053 0056 3B                  .uleb128 0x3b\r
- 5054 0057 05                  .uleb128 0x5\r
- 5055 0058 49                  .uleb128 0x49\r
- 5056 0059 13                  .uleb128 0x13\r
- 5057 005a 00                  .byte   0\r
- 5058 005b 00                  .byte   0\r
- 5059 005c 09                  .uleb128 0x9\r
- 5060 005d 2E                  .uleb128 0x2e\r
- 5061 005e 01                  .byte   0x1\r
- 5062 005f 3F                  .uleb128 0x3f\r
- 5063 0060 0C                  .uleb128 0xc\r
- 5064 0061 03                  .uleb128 0x3\r
- 5065 0062 0E                  .uleb128 0xe\r
- 5066 0063 3A                  .uleb128 0x3a\r
- 5067 0064 0B                  .uleb128 0xb\r
- 5068 0065 3B                  .uleb128 0x3b\r
- 5069 0066 05                  .uleb128 0x5\r
- 5070 0067 27                  .uleb128 0x27\r
- 5071 0068 0C                  .uleb128 0xc\r
- 5072 0069 20                  .uleb128 0x20\r
- 5073 006a 0B                  .uleb128 0xb\r
- 5074 006b 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 137\r
-\r
-\r
- 5075 006c 13                  .uleb128 0x13\r
- 5076 006d 00                  .byte   0\r
- 5077 006e 00                  .byte   0\r
- 5078 006f 0A                  .uleb128 0xa\r
- 5079 0070 05                  .uleb128 0x5\r
- 5080 0071 00                  .byte   0\r
- 5081 0072 03                  .uleb128 0x3\r
- 5082 0073 0E                  .uleb128 0xe\r
- 5083 0074 3A                  .uleb128 0x3a\r
- 5084 0075 0B                  .uleb128 0xb\r
- 5085 0076 3B                  .uleb128 0x3b\r
- 5086 0077 05                  .uleb128 0x5\r
- 5087 0078 49                  .uleb128 0x49\r
- 5088 0079 13                  .uleb128 0x13\r
- 5089 007a 00                  .byte   0\r
- 5090 007b 00                  .byte   0\r
- 5091 007c 0B                  .uleb128 0xb\r
- 5092 007d 2E                  .uleb128 0x2e\r
- 5093 007e 00                  .byte   0\r
- 5094 007f 3F                  .uleb128 0x3f\r
- 5095 0080 0C                  .uleb128 0xc\r
- 5096 0081 03                  .uleb128 0x3\r
- 5097 0082 0E                  .uleb128 0xe\r
- 5098 0083 3A                  .uleb128 0x3a\r
- 5099 0084 0B                  .uleb128 0xb\r
- 5100 0085 3B                  .uleb128 0x3b\r
- 5101 0086 05                  .uleb128 0x5\r
- 5102 0087 27                  .uleb128 0x27\r
- 5103 0088 0C                  .uleb128 0xc\r
- 5104 0089 49                  .uleb128 0x49\r
- 5105 008a 13                  .uleb128 0x13\r
- 5106 008b 20                  .uleb128 0x20\r
- 5107 008c 0B                  .uleb128 0xb\r
- 5108 008d 00                  .byte   0\r
- 5109 008e 00                  .byte   0\r
- 5110 008f 0C                  .uleb128 0xc\r
- 5111 0090 2E                  .uleb128 0x2e\r
- 5112 0091 01                  .byte   0x1\r
- 5113 0092 03                  .uleb128 0x3\r
- 5114 0093 0E                  .uleb128 0xe\r
- 5115 0094 3A                  .uleb128 0x3a\r
- 5116 0095 0B                  .uleb128 0xb\r
- 5117 0096 3B                  .uleb128 0x3b\r
- 5118 0097 05                  .uleb128 0x5\r
- 5119 0098 27                  .uleb128 0x27\r
- 5120 0099 0C                  .uleb128 0xc\r
- 5121 009a 49                  .uleb128 0x49\r
- 5122 009b 13                  .uleb128 0x13\r
- 5123 009c 20                  .uleb128 0x20\r
- 5124 009d 0B                  .uleb128 0xb\r
- 5125 009e 01                  .uleb128 0x1\r
- 5126 009f 13                  .uleb128 0x13\r
- 5127 00a0 00                  .byte   0\r
- 5128 00a1 00                  .byte   0\r
- 5129 00a2 0D                  .uleb128 0xd\r
- 5130 00a3 34                  .uleb128 0x34\r
- 5131 00a4 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 138\r
-\r
-\r
- 5132 00a5 03                  .uleb128 0x3\r
- 5133 00a6 0E                  .uleb128 0xe\r
- 5134 00a7 3A                  .uleb128 0x3a\r
- 5135 00a8 0B                  .uleb128 0xb\r
- 5136 00a9 3B                  .uleb128 0x3b\r
- 5137 00aa 05                  .uleb128 0x5\r
- 5138 00ab 49                  .uleb128 0x49\r
- 5139 00ac 13                  .uleb128 0x13\r
- 5140 00ad 00                  .byte   0\r
- 5141 00ae 00                  .byte   0\r
- 5142 00af 0E                  .uleb128 0xe\r
- 5143 00b0 2E                  .uleb128 0x2e\r
- 5144 00b1 01                  .byte   0x1\r
- 5145 00b2 03                  .uleb128 0x3\r
- 5146 00b3 0E                  .uleb128 0xe\r
- 5147 00b4 3A                  .uleb128 0x3a\r
- 5148 00b5 0B                  .uleb128 0xb\r
- 5149 00b6 3B                  .uleb128 0x3b\r
- 5150 00b7 05                  .uleb128 0x5\r
- 5151 00b8 27                  .uleb128 0x27\r
- 5152 00b9 0C                  .uleb128 0xc\r
- 5153 00ba 11                  .uleb128 0x11\r
- 5154 00bb 01                  .uleb128 0x1\r
- 5155 00bc 12                  .uleb128 0x12\r
- 5156 00bd 01                  .uleb128 0x1\r
- 5157 00be 40                  .uleb128 0x40\r
- 5158 00bf 0A                  .uleb128 0xa\r
- 5159 00c0 9742                .uleb128 0x2117\r
- 5160 00c2 0C                  .uleb128 0xc\r
- 5161 00c3 01                  .uleb128 0x1\r
- 5162 00c4 13                  .uleb128 0x13\r
- 5163 00c5 00                  .byte   0\r
- 5164 00c6 00                  .byte   0\r
- 5165 00c7 0F                  .uleb128 0xf\r
- 5166 00c8 05                  .uleb128 0x5\r
- 5167 00c9 00                  .byte   0\r
- 5168 00ca 03                  .uleb128 0x3\r
- 5169 00cb 0E                  .uleb128 0xe\r
- 5170 00cc 3A                  .uleb128 0x3a\r
- 5171 00cd 0B                  .uleb128 0xb\r
- 5172 00ce 3B                  .uleb128 0x3b\r
- 5173 00cf 05                  .uleb128 0x5\r
- 5174 00d0 49                  .uleb128 0x49\r
- 5175 00d1 13                  .uleb128 0x13\r
- 5176 00d2 02                  .uleb128 0x2\r
- 5177 00d3 06                  .uleb128 0x6\r
- 5178 00d4 00                  .byte   0\r
- 5179 00d5 00                  .byte   0\r
- 5180 00d6 10                  .uleb128 0x10\r
- 5181 00d7 34                  .uleb128 0x34\r
- 5182 00d8 00                  .byte   0\r
- 5183 00d9 03                  .uleb128 0x3\r
- 5184 00da 0E                  .uleb128 0xe\r
- 5185 00db 3A                  .uleb128 0x3a\r
- 5186 00dc 0B                  .uleb128 0xb\r
- 5187 00dd 3B                  .uleb128 0x3b\r
- 5188 00de 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 139\r
-\r
-\r
- 5189 00df 49                  .uleb128 0x49\r
- 5190 00e0 13                  .uleb128 0x13\r
- 5191 00e1 02                  .uleb128 0x2\r
- 5192 00e2 0A                  .uleb128 0xa\r
- 5193 00e3 00                  .byte   0\r
- 5194 00e4 00                  .byte   0\r
- 5195 00e5 11                  .uleb128 0x11\r
- 5196 00e6 1D                  .uleb128 0x1d\r
- 5197 00e7 01                  .byte   0x1\r
- 5198 00e8 31                  .uleb128 0x31\r
- 5199 00e9 13                  .uleb128 0x13\r
- 5200 00ea 11                  .uleb128 0x11\r
- 5201 00eb 01                  .uleb128 0x1\r
- 5202 00ec 12                  .uleb128 0x12\r
- 5203 00ed 01                  .uleb128 0x1\r
- 5204 00ee 58                  .uleb128 0x58\r
- 5205 00ef 0B                  .uleb128 0xb\r
- 5206 00f0 59                  .uleb128 0x59\r
- 5207 00f1 05                  .uleb128 0x5\r
- 5208 00f2 00                  .byte   0\r
- 5209 00f3 00                  .byte   0\r
- 5210 00f4 12                  .uleb128 0x12\r
- 5211 00f5 0B                  .uleb128 0xb\r
- 5212 00f6 01                  .byte   0x1\r
- 5213 00f7 11                  .uleb128 0x11\r
- 5214 00f8 01                  .uleb128 0x1\r
- 5215 00f9 12                  .uleb128 0x12\r
- 5216 00fa 01                  .uleb128 0x1\r
- 5217 00fb 00                  .byte   0\r
- 5218 00fc 00                  .byte   0\r
- 5219 00fd 13                  .uleb128 0x13\r
- 5220 00fe 34                  .uleb128 0x34\r
- 5221 00ff 00                  .byte   0\r
- 5222 0100 31                  .uleb128 0x31\r
- 5223 0101 13                  .uleb128 0x13\r
- 5224 0102 02                  .uleb128 0x2\r
- 5225 0103 06                  .uleb128 0x6\r
- 5226 0104 00                  .byte   0\r
- 5227 0105 00                  .byte   0\r
- 5228 0106 14                  .uleb128 0x14\r
- 5229 0107 2E                  .uleb128 0x2e\r
- 5230 0108 00                  .byte   0\r
- 5231 0109 3F                  .uleb128 0x3f\r
- 5232 010a 0C                  .uleb128 0xc\r
- 5233 010b 03                  .uleb128 0x3\r
- 5234 010c 0E                  .uleb128 0xe\r
- 5235 010d 3A                  .uleb128 0x3a\r
- 5236 010e 0B                  .uleb128 0xb\r
- 5237 010f 3B                  .uleb128 0x3b\r
- 5238 0110 0B                  .uleb128 0xb\r
- 5239 0111 27                  .uleb128 0x27\r
- 5240 0112 0C                  .uleb128 0xc\r
- 5241 0113 11                  .uleb128 0x11\r
- 5242 0114 01                  .uleb128 0x1\r
- 5243 0115 12                  .uleb128 0x12\r
- 5244 0116 01                  .uleb128 0x1\r
- 5245 0117 40                  .uleb128 0x40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 140\r
-\r
-\r
- 5246 0118 0A                  .uleb128 0xa\r
- 5247 0119 9742                .uleb128 0x2117\r
- 5248 011b 0C                  .uleb128 0xc\r
- 5249 011c 00                  .byte   0\r
- 5250 011d 00                  .byte   0\r
- 5251 011e 15                  .uleb128 0x15\r
- 5252 011f 2E                  .uleb128 0x2e\r
- 5253 0120 01                  .byte   0x1\r
- 5254 0121 3F                  .uleb128 0x3f\r
- 5255 0122 0C                  .uleb128 0xc\r
- 5256 0123 03                  .uleb128 0x3\r
- 5257 0124 0E                  .uleb128 0xe\r
- 5258 0125 3A                  .uleb128 0x3a\r
- 5259 0126 0B                  .uleb128 0xb\r
- 5260 0127 3B                  .uleb128 0x3b\r
- 5261 0128 0B                  .uleb128 0xb\r
- 5262 0129 27                  .uleb128 0x27\r
- 5263 012a 0C                  .uleb128 0xc\r
- 5264 012b 11                  .uleb128 0x11\r
- 5265 012c 01                  .uleb128 0x1\r
- 5266 012d 12                  .uleb128 0x12\r
- 5267 012e 01                  .uleb128 0x1\r
- 5268 012f 40                  .uleb128 0x40\r
- 5269 0130 0A                  .uleb128 0xa\r
- 5270 0131 9742                .uleb128 0x2117\r
- 5271 0133 0C                  .uleb128 0xc\r
- 5272 0134 01                  .uleb128 0x1\r
- 5273 0135 13                  .uleb128 0x13\r
- 5274 0136 00                  .byte   0\r
- 5275 0137 00                  .byte   0\r
- 5276 0138 16                  .uleb128 0x16\r
- 5277 0139 05                  .uleb128 0x5\r
- 5278 013a 00                  .byte   0\r
- 5279 013b 03                  .uleb128 0x3\r
- 5280 013c 0E                  .uleb128 0xe\r
- 5281 013d 3A                  .uleb128 0x3a\r
- 5282 013e 0B                  .uleb128 0xb\r
- 5283 013f 3B                  .uleb128 0x3b\r
- 5284 0140 0B                  .uleb128 0xb\r
- 5285 0141 49                  .uleb128 0x49\r
- 5286 0142 13                  .uleb128 0x13\r
- 5287 0143 02                  .uleb128 0x2\r
- 5288 0144 06                  .uleb128 0x6\r
- 5289 0145 00                  .byte   0\r
- 5290 0146 00                  .byte   0\r
- 5291 0147 17                  .uleb128 0x17\r
- 5292 0148 2E                  .uleb128 0x2e\r
- 5293 0149 00                  .byte   0\r
- 5294 014a 3F                  .uleb128 0x3f\r
- 5295 014b 0C                  .uleb128 0xc\r
- 5296 014c 03                  .uleb128 0x3\r
- 5297 014d 0E                  .uleb128 0xe\r
- 5298 014e 3A                  .uleb128 0x3a\r
- 5299 014f 0B                  .uleb128 0xb\r
- 5300 0150 3B                  .uleb128 0x3b\r
- 5301 0151 05                  .uleb128 0x5\r
- 5302 0152 27                  .uleb128 0x27\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 141\r
-\r
-\r
- 5303 0153 0C                  .uleb128 0xc\r
- 5304 0154 11                  .uleb128 0x11\r
- 5305 0155 01                  .uleb128 0x1\r
- 5306 0156 12                  .uleb128 0x12\r
- 5307 0157 01                  .uleb128 0x1\r
- 5308 0158 40                  .uleb128 0x40\r
- 5309 0159 0A                  .uleb128 0xa\r
- 5310 015a 9742                .uleb128 0x2117\r
- 5311 015c 0C                  .uleb128 0xc\r
- 5312 015d 00                  .byte   0\r
- 5313 015e 00                  .byte   0\r
- 5314 015f 18                  .uleb128 0x18\r
- 5315 0160 2E                  .uleb128 0x2e\r
- 5316 0161 01                  .byte   0x1\r
- 5317 0162 3F                  .uleb128 0x3f\r
- 5318 0163 0C                  .uleb128 0xc\r
- 5319 0164 03                  .uleb128 0x3\r
- 5320 0165 0E                  .uleb128 0xe\r
- 5321 0166 3A                  .uleb128 0x3a\r
- 5322 0167 0B                  .uleb128 0xb\r
- 5323 0168 3B                  .uleb128 0x3b\r
- 5324 0169 05                  .uleb128 0x5\r
- 5325 016a 27                  .uleb128 0x27\r
- 5326 016b 0C                  .uleb128 0xc\r
- 5327 016c 11                  .uleb128 0x11\r
- 5328 016d 01                  .uleb128 0x1\r
- 5329 016e 12                  .uleb128 0x12\r
- 5330 016f 01                  .uleb128 0x1\r
- 5331 0170 40                  .uleb128 0x40\r
- 5332 0171 0A                  .uleb128 0xa\r
- 5333 0172 9742                .uleb128 0x2117\r
- 5334 0174 0C                  .uleb128 0xc\r
- 5335 0175 01                  .uleb128 0x1\r
- 5336 0176 13                  .uleb128 0x13\r
- 5337 0177 00                  .byte   0\r
- 5338 0178 00                  .byte   0\r
- 5339 0179 19                  .uleb128 0x19\r
- 5340 017a 2E                  .uleb128 0x2e\r
- 5341 017b 01                  .byte   0x1\r
- 5342 017c 3F                  .uleb128 0x3f\r
- 5343 017d 0C                  .uleb128 0xc\r
- 5344 017e 03                  .uleb128 0x3\r
- 5345 017f 0E                  .uleb128 0xe\r
- 5346 0180 3A                  .uleb128 0x3a\r
- 5347 0181 0B                  .uleb128 0xb\r
- 5348 0182 3B                  .uleb128 0x3b\r
- 5349 0183 05                  .uleb128 0x5\r
- 5350 0184 27                  .uleb128 0x27\r
- 5351 0185 0C                  .uleb128 0xc\r
- 5352 0186 11                  .uleb128 0x11\r
- 5353 0187 01                  .uleb128 0x1\r
- 5354 0188 12                  .uleb128 0x12\r
- 5355 0189 01                  .uleb128 0x1\r
- 5356 018a 40                  .uleb128 0x40\r
- 5357 018b 06                  .uleb128 0x6\r
- 5358 018c 9742                .uleb128 0x2117\r
- 5359 018e 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 142\r
-\r
-\r
- 5360 018f 01                  .uleb128 0x1\r
- 5361 0190 13                  .uleb128 0x13\r
- 5362 0191 00                  .byte   0\r
- 5363 0192 00                  .byte   0\r
- 5364 0193 1A                  .uleb128 0x1a\r
- 5365 0194 34                  .uleb128 0x34\r
- 5366 0195 00                  .byte   0\r
- 5367 0196 03                  .uleb128 0x3\r
- 5368 0197 0E                  .uleb128 0xe\r
- 5369 0198 3A                  .uleb128 0x3a\r
- 5370 0199 0B                  .uleb128 0xb\r
- 5371 019a 3B                  .uleb128 0x3b\r
- 5372 019b 05                  .uleb128 0x5\r
- 5373 019c 49                  .uleb128 0x49\r
- 5374 019d 13                  .uleb128 0x13\r
- 5375 019e 02                  .uleb128 0x2\r
- 5376 019f 06                  .uleb128 0x6\r
- 5377 01a0 00                  .byte   0\r
- 5378 01a1 00                  .byte   0\r
- 5379 01a2 1B                  .uleb128 0x1b\r
- 5380 01a3 898201              .uleb128 0x4109\r
- 5381 01a6 01                  .byte   0x1\r
- 5382 01a7 11                  .uleb128 0x11\r
- 5383 01a8 01                  .uleb128 0x1\r
- 5384 01a9 31                  .uleb128 0x31\r
- 5385 01aa 13                  .uleb128 0x13\r
- 5386 01ab 01                  .uleb128 0x1\r
- 5387 01ac 13                  .uleb128 0x13\r
- 5388 01ad 00                  .byte   0\r
- 5389 01ae 00                  .byte   0\r
- 5390 01af 1C                  .uleb128 0x1c\r
- 5391 01b0 8A8201              .uleb128 0x410a\r
- 5392 01b3 00                  .byte   0\r
- 5393 01b4 02                  .uleb128 0x2\r
- 5394 01b5 0A                  .uleb128 0xa\r
- 5395 01b6 9142                .uleb128 0x2111\r
- 5396 01b8 0A                  .uleb128 0xa\r
- 5397 01b9 00                  .byte   0\r
- 5398 01ba 00                  .byte   0\r
- 5399 01bb 1D                  .uleb128 0x1d\r
- 5400 01bc 898201              .uleb128 0x4109\r
- 5401 01bf 00                  .byte   0\r
- 5402 01c0 11                  .uleb128 0x11\r
- 5403 01c1 01                  .uleb128 0x1\r
- 5404 01c2 31                  .uleb128 0x31\r
- 5405 01c3 13                  .uleb128 0x13\r
- 5406 01c4 00                  .byte   0\r
- 5407 01c5 00                  .byte   0\r
- 5408 01c6 1E                  .uleb128 0x1e\r
- 5409 01c7 898201              .uleb128 0x4109\r
- 5410 01ca 01                  .byte   0x1\r
- 5411 01cb 11                  .uleb128 0x11\r
- 5412 01cc 01                  .uleb128 0x1\r
- 5413 01cd 9542                .uleb128 0x2115\r
- 5414 01cf 0C                  .uleb128 0xc\r
- 5415 01d0 31                  .uleb128 0x31\r
- 5416 01d1 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 143\r
-\r
-\r
- 5417 01d2 00                  .byte   0\r
- 5418 01d3 00                  .byte   0\r
- 5419 01d4 1F                  .uleb128 0x1f\r
- 5420 01d5 2E                  .uleb128 0x2e\r
- 5421 01d6 01                  .byte   0x1\r
- 5422 01d7 31                  .uleb128 0x31\r
- 5423 01d8 13                  .uleb128 0x13\r
- 5424 01d9 11                  .uleb128 0x11\r
- 5425 01da 01                  .uleb128 0x1\r
- 5426 01db 12                  .uleb128 0x12\r
- 5427 01dc 01                  .uleb128 0x1\r
- 5428 01dd 40                  .uleb128 0x40\r
- 5429 01de 0A                  .uleb128 0xa\r
- 5430 01df 9742                .uleb128 0x2117\r
- 5431 01e1 0C                  .uleb128 0xc\r
- 5432 01e2 01                  .uleb128 0x1\r
- 5433 01e3 13                  .uleb128 0x13\r
- 5434 01e4 00                  .byte   0\r
- 5435 01e5 00                  .byte   0\r
- 5436 01e6 20                  .uleb128 0x20\r
- 5437 01e7 05                  .uleb128 0x5\r
- 5438 01e8 00                  .byte   0\r
- 5439 01e9 31                  .uleb128 0x31\r
- 5440 01ea 13                  .uleb128 0x13\r
- 5441 01eb 02                  .uleb128 0x2\r
- 5442 01ec 0A                  .uleb128 0xa\r
- 5443 01ed 00                  .byte   0\r
- 5444 01ee 00                  .byte   0\r
- 5445 01ef 21                  .uleb128 0x21\r
- 5446 01f0 1D                  .uleb128 0x1d\r
- 5447 01f1 01                  .byte   0x1\r
- 5448 01f2 31                  .uleb128 0x31\r
- 5449 01f3 13                  .uleb128 0x13\r
- 5450 01f4 11                  .uleb128 0x11\r
- 5451 01f5 01                  .uleb128 0x1\r
- 5452 01f6 12                  .uleb128 0x12\r
- 5453 01f7 01                  .uleb128 0x1\r
- 5454 01f8 58                  .uleb128 0x58\r
- 5455 01f9 0B                  .uleb128 0xb\r
- 5456 01fa 59                  .uleb128 0x59\r
- 5457 01fb 05                  .uleb128 0x5\r
- 5458 01fc 01                  .uleb128 0x1\r
- 5459 01fd 13                  .uleb128 0x13\r
- 5460 01fe 00                  .byte   0\r
- 5461 01ff 00                  .byte   0\r
- 5462 0200 22                  .uleb128 0x22\r
- 5463 0201 05                  .uleb128 0x5\r
- 5464 0202 00                  .byte   0\r
- 5465 0203 31                  .uleb128 0x31\r
- 5466 0204 13                  .uleb128 0x13\r
- 5467 0205 02                  .uleb128 0x2\r
- 5468 0206 06                  .uleb128 0x6\r
- 5469 0207 00                  .byte   0\r
- 5470 0208 00                  .byte   0\r
- 5471 0209 23                  .uleb128 0x23\r
- 5472 020a 2E                  .uleb128 0x2e\r
- 5473 020b 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 144\r
-\r
-\r
- 5474 020c 3F                  .uleb128 0x3f\r
- 5475 020d 0C                  .uleb128 0xc\r
- 5476 020e 03                  .uleb128 0x3\r
- 5477 020f 0E                  .uleb128 0xe\r
- 5478 0210 3A                  .uleb128 0x3a\r
- 5479 0211 0B                  .uleb128 0xb\r
- 5480 0212 3B                  .uleb128 0x3b\r
- 5481 0213 0B                  .uleb128 0xb\r
- 5482 0214 27                  .uleb128 0x27\r
- 5483 0215 0C                  .uleb128 0xc\r
- 5484 0216 49                  .uleb128 0x49\r
- 5485 0217 13                  .uleb128 0x13\r
- 5486 0218 11                  .uleb128 0x11\r
- 5487 0219 01                  .uleb128 0x1\r
- 5488 021a 12                  .uleb128 0x12\r
- 5489 021b 01                  .uleb128 0x1\r
- 5490 021c 40                  .uleb128 0x40\r
- 5491 021d 06                  .uleb128 0x6\r
- 5492 021e 9742                .uleb128 0x2117\r
- 5493 0220 0C                  .uleb128 0xc\r
- 5494 0221 01                  .uleb128 0x1\r
- 5495 0222 13                  .uleb128 0x13\r
- 5496 0223 00                  .byte   0\r
- 5497 0224 00                  .byte   0\r
- 5498 0225 24                  .uleb128 0x24\r
- 5499 0226 34                  .uleb128 0x34\r
- 5500 0227 00                  .byte   0\r
- 5501 0228 03                  .uleb128 0x3\r
- 5502 0229 0E                  .uleb128 0xe\r
- 5503 022a 3A                  .uleb128 0x3a\r
- 5504 022b 0B                  .uleb128 0xb\r
- 5505 022c 3B                  .uleb128 0x3b\r
- 5506 022d 0B                  .uleb128 0xb\r
- 5507 022e 49                  .uleb128 0x49\r
- 5508 022f 13                  .uleb128 0x13\r
- 5509 0230 02                  .uleb128 0x2\r
- 5510 0231 06                  .uleb128 0x6\r
- 5511 0232 00                  .byte   0\r
- 5512 0233 00                  .byte   0\r
- 5513 0234 25                  .uleb128 0x25\r
- 5514 0235 2E                  .uleb128 0x2e\r
- 5515 0236 01                  .byte   0x1\r
- 5516 0237 3F                  .uleb128 0x3f\r
- 5517 0238 0C                  .uleb128 0xc\r
- 5518 0239 03                  .uleb128 0x3\r
- 5519 023a 0E                  .uleb128 0xe\r
- 5520 023b 3A                  .uleb128 0x3a\r
- 5521 023c 0B                  .uleb128 0xb\r
- 5522 023d 3B                  .uleb128 0x3b\r
- 5523 023e 05                  .uleb128 0x5\r
- 5524 023f 27                  .uleb128 0x27\r
- 5525 0240 0C                  .uleb128 0xc\r
- 5526 0241 49                  .uleb128 0x49\r
- 5527 0242 13                  .uleb128 0x13\r
- 5528 0243 11                  .uleb128 0x11\r
- 5529 0244 01                  .uleb128 0x1\r
- 5530 0245 12                  .uleb128 0x12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 145\r
-\r
-\r
- 5531 0246 01                  .uleb128 0x1\r
- 5532 0247 40                  .uleb128 0x40\r
- 5533 0248 0A                  .uleb128 0xa\r
- 5534 0249 9742                .uleb128 0x2117\r
- 5535 024b 0C                  .uleb128 0xc\r
- 5536 024c 01                  .uleb128 0x1\r
- 5537 024d 13                  .uleb128 0x13\r
- 5538 024e 00                  .byte   0\r
- 5539 024f 00                  .byte   0\r
- 5540 0250 26                  .uleb128 0x26\r
- 5541 0251 2E                  .uleb128 0x2e\r
- 5542 0252 00                  .byte   0\r
- 5543 0253 31                  .uleb128 0x31\r
- 5544 0254 13                  .uleb128 0x13\r
- 5545 0255 11                  .uleb128 0x11\r
- 5546 0256 01                  .uleb128 0x1\r
- 5547 0257 12                  .uleb128 0x12\r
- 5548 0258 01                  .uleb128 0x1\r
- 5549 0259 40                  .uleb128 0x40\r
- 5550 025a 0A                  .uleb128 0xa\r
- 5551 025b 9742                .uleb128 0x2117\r
- 5552 025d 0C                  .uleb128 0xc\r
- 5553 025e 00                  .byte   0\r
- 5554 025f 00                  .byte   0\r
- 5555 0260 27                  .uleb128 0x27\r
- 5556 0261 2E                  .uleb128 0x2e\r
- 5557 0262 01                  .byte   0x1\r
- 5558 0263 3F                  .uleb128 0x3f\r
- 5559 0264 0C                  .uleb128 0xc\r
- 5560 0265 03                  .uleb128 0x3\r
- 5561 0266 0E                  .uleb128 0xe\r
- 5562 0267 3A                  .uleb128 0x3a\r
- 5563 0268 0B                  .uleb128 0xb\r
- 5564 0269 3B                  .uleb128 0x3b\r
- 5565 026a 05                  .uleb128 0x5\r
- 5566 026b 27                  .uleb128 0x27\r
- 5567 026c 0C                  .uleb128 0xc\r
- 5568 026d 49                  .uleb128 0x49\r
- 5569 026e 13                  .uleb128 0x13\r
- 5570 026f 11                  .uleb128 0x11\r
- 5571 0270 01                  .uleb128 0x1\r
- 5572 0271 12                  .uleb128 0x12\r
- 5573 0272 01                  .uleb128 0x1\r
- 5574 0273 40                  .uleb128 0x40\r
- 5575 0274 06                  .uleb128 0x6\r
- 5576 0275 9742                .uleb128 0x2117\r
- 5577 0277 0C                  .uleb128 0xc\r
- 5578 0278 01                  .uleb128 0x1\r
- 5579 0279 13                  .uleb128 0x13\r
- 5580 027a 00                  .byte   0\r
- 5581 027b 00                  .byte   0\r
- 5582 027c 28                  .uleb128 0x28\r
- 5583 027d 2E                  .uleb128 0x2e\r
- 5584 027e 00                  .byte   0\r
- 5585 027f 3F                  .uleb128 0x3f\r
- 5586 0280 0C                  .uleb128 0xc\r
- 5587 0281 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 146\r
-\r
-\r
- 5588 0282 0E                  .uleb128 0xe\r
- 5589 0283 3A                  .uleb128 0x3a\r
- 5590 0284 0B                  .uleb128 0xb\r
- 5591 0285 3B                  .uleb128 0x3b\r
- 5592 0286 05                  .uleb128 0x5\r
- 5593 0287 27                  .uleb128 0x27\r
- 5594 0288 0C                  .uleb128 0xc\r
- 5595 0289 49                  .uleb128 0x49\r
- 5596 028a 13                  .uleb128 0x13\r
- 5597 028b 11                  .uleb128 0x11\r
- 5598 028c 01                  .uleb128 0x1\r
- 5599 028d 12                  .uleb128 0x12\r
- 5600 028e 01                  .uleb128 0x1\r
- 5601 028f 40                  .uleb128 0x40\r
- 5602 0290 0A                  .uleb128 0xa\r
- 5603 0291 9742                .uleb128 0x2117\r
- 5604 0293 0C                  .uleb128 0xc\r
- 5605 0294 00                  .byte   0\r
- 5606 0295 00                  .byte   0\r
- 5607 0296 29                  .uleb128 0x29\r
- 5608 0297 05                  .uleb128 0x5\r
- 5609 0298 00                  .byte   0\r
- 5610 0299 03                  .uleb128 0x3\r
- 5611 029a 0E                  .uleb128 0xe\r
- 5612 029b 3A                  .uleb128 0x3a\r
- 5613 029c 0B                  .uleb128 0xb\r
- 5614 029d 3B                  .uleb128 0x3b\r
- 5615 029e 05                  .uleb128 0x5\r
- 5616 029f 49                  .uleb128 0x49\r
- 5617 02a0 13                  .uleb128 0x13\r
- 5618 02a1 02                  .uleb128 0x2\r
- 5619 02a2 0A                  .uleb128 0xa\r
- 5620 02a3 00                  .byte   0\r
- 5621 02a4 00                  .byte   0\r
- 5622 02a5 2A                  .uleb128 0x2a\r
- 5623 02a6 898201              .uleb128 0x4109\r
- 5624 02a9 00                  .byte   0\r
- 5625 02aa 11                  .uleb128 0x11\r
- 5626 02ab 01                  .uleb128 0x1\r
- 5627 02ac 9542                .uleb128 0x2115\r
- 5628 02ae 0C                  .uleb128 0xc\r
- 5629 02af 31                  .uleb128 0x31\r
- 5630 02b0 13                  .uleb128 0x13\r
- 5631 02b1 00                  .byte   0\r
- 5632 02b2 00                  .byte   0\r
- 5633 02b3 2B                  .uleb128 0x2b\r
- 5634 02b4 898201              .uleb128 0x4109\r
- 5635 02b7 01                  .byte   0x1\r
- 5636 02b8 11                  .uleb128 0x11\r
- 5637 02b9 01                  .uleb128 0x1\r
- 5638 02ba 31                  .uleb128 0x31\r
- 5639 02bb 13                  .uleb128 0x13\r
- 5640 02bc 00                  .byte   0\r
- 5641 02bd 00                  .byte   0\r
- 5642 02be 2C                  .uleb128 0x2c\r
- 5643 02bf 34                  .uleb128 0x34\r
- 5644 02c0 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 147\r
-\r
-\r
- 5645 02c1 03                  .uleb128 0x3\r
- 5646 02c2 08                  .uleb128 0x8\r
- 5647 02c3 3A                  .uleb128 0x3a\r
- 5648 02c4 0B                  .uleb128 0xb\r
- 5649 02c5 3B                  .uleb128 0x3b\r
- 5650 02c6 05                  .uleb128 0x5\r
- 5651 02c7 49                  .uleb128 0x49\r
- 5652 02c8 13                  .uleb128 0x13\r
- 5653 02c9 02                  .uleb128 0x2\r
- 5654 02ca 06                  .uleb128 0x6\r
- 5655 02cb 00                  .byte   0\r
- 5656 02cc 00                  .byte   0\r
- 5657 02cd 2D                  .uleb128 0x2d\r
- 5658 02ce 1D                  .uleb128 0x1d\r
- 5659 02cf 00                  .byte   0\r
- 5660 02d0 31                  .uleb128 0x31\r
- 5661 02d1 13                  .uleb128 0x13\r
- 5662 02d2 11                  .uleb128 0x11\r
- 5663 02d3 01                  .uleb128 0x1\r
- 5664 02d4 12                  .uleb128 0x12\r
- 5665 02d5 01                  .uleb128 0x1\r
- 5666 02d6 58                  .uleb128 0x58\r
- 5667 02d7 0B                  .uleb128 0xb\r
- 5668 02d8 59                  .uleb128 0x59\r
- 5669 02d9 05                  .uleb128 0x5\r
- 5670 02da 00                  .byte   0\r
- 5671 02db 00                  .byte   0\r
- 5672 02dc 2E                  .uleb128 0x2e\r
- 5673 02dd 34                  .uleb128 0x34\r
- 5674 02de 00                  .byte   0\r
- 5675 02df 03                  .uleb128 0x3\r
- 5676 02e0 0E                  .uleb128 0xe\r
- 5677 02e1 3A                  .uleb128 0x3a\r
- 5678 02e2 0B                  .uleb128 0xb\r
- 5679 02e3 3B                  .uleb128 0x3b\r
- 5680 02e4 05                  .uleb128 0x5\r
- 5681 02e5 49                  .uleb128 0x49\r
- 5682 02e6 13                  .uleb128 0x13\r
- 5683 02e7 1C                  .uleb128 0x1c\r
- 5684 02e8 0D                  .uleb128 0xd\r
- 5685 02e9 00                  .byte   0\r
- 5686 02ea 00                  .byte   0\r
- 5687 02eb 2F                  .uleb128 0x2f\r
- 5688 02ec 34                  .uleb128 0x34\r
- 5689 02ed 00                  .byte   0\r
- 5690 02ee 03                  .uleb128 0x3\r
- 5691 02ef 0E                  .uleb128 0xe\r
- 5692 02f0 3A                  .uleb128 0x3a\r
- 5693 02f1 0B                  .uleb128 0xb\r
- 5694 02f2 3B                  .uleb128 0x3b\r
- 5695 02f3 0B                  .uleb128 0xb\r
- 5696 02f4 49                  .uleb128 0x49\r
- 5697 02f5 13                  .uleb128 0x13\r
- 5698 02f6 3F                  .uleb128 0x3f\r
- 5699 02f7 0C                  .uleb128 0xc\r
- 5700 02f8 02                  .uleb128 0x2\r
- 5701 02f9 0A                  .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 148\r
-\r
-\r
- 5702 02fa 00                  .byte   0\r
- 5703 02fb 00                  .byte   0\r
- 5704 02fc 30                  .uleb128 0x30\r
- 5705 02fd 2E                  .uleb128 0x2e\r
- 5706 02fe 00                  .byte   0\r
- 5707 02ff 3F                  .uleb128 0x3f\r
- 5708 0300 0C                  .uleb128 0xc\r
- 5709 0301 03                  .uleb128 0x3\r
- 5710 0302 0E                  .uleb128 0xe\r
- 5711 0303 3A                  .uleb128 0x3a\r
- 5712 0304 0B                  .uleb128 0xb\r
- 5713 0305 3B                  .uleb128 0x3b\r
- 5714 0306 0B                  .uleb128 0xb\r
- 5715 0307 27                  .uleb128 0x27\r
- 5716 0308 0C                  .uleb128 0xc\r
- 5717 0309 49                  .uleb128 0x49\r
- 5718 030a 13                  .uleb128 0x13\r
- 5719 030b 3C                  .uleb128 0x3c\r
- 5720 030c 0C                  .uleb128 0xc\r
- 5721 030d 00                  .byte   0\r
- 5722 030e 00                  .byte   0\r
- 5723 030f 31                  .uleb128 0x31\r
- 5724 0310 2E                  .uleb128 0x2e\r
- 5725 0311 01                  .byte   0x1\r
- 5726 0312 3F                  .uleb128 0x3f\r
- 5727 0313 0C                  .uleb128 0xc\r
- 5728 0314 03                  .uleb128 0x3\r
- 5729 0315 0E                  .uleb128 0xe\r
- 5730 0316 3A                  .uleb128 0x3a\r
- 5731 0317 0B                  .uleb128 0xb\r
- 5732 0318 3B                  .uleb128 0x3b\r
- 5733 0319 0B                  .uleb128 0xb\r
- 5734 031a 27                  .uleb128 0x27\r
- 5735 031b 0C                  .uleb128 0xc\r
- 5736 031c 3C                  .uleb128 0x3c\r
- 5737 031d 0C                  .uleb128 0xc\r
- 5738 031e 01                  .uleb128 0x1\r
- 5739 031f 13                  .uleb128 0x13\r
- 5740 0320 00                  .byte   0\r
- 5741 0321 00                  .byte   0\r
- 5742 0322 32                  .uleb128 0x32\r
- 5743 0323 05                  .uleb128 0x5\r
- 5744 0324 00                  .byte   0\r
- 5745 0325 49                  .uleb128 0x49\r
- 5746 0326 13                  .uleb128 0x13\r
- 5747 0327 00                  .byte   0\r
- 5748 0328 00                  .byte   0\r
- 5749 0329 33                  .uleb128 0x33\r
- 5750 032a 2E                  .uleb128 0x2e\r
- 5751 032b 01                  .byte   0x1\r
- 5752 032c 3F                  .uleb128 0x3f\r
- 5753 032d 0C                  .uleb128 0xc\r
- 5754 032e 03                  .uleb128 0x3\r
- 5755 032f 0E                  .uleb128 0xe\r
- 5756 0330 3A                  .uleb128 0x3a\r
- 5757 0331 0B                  .uleb128 0xb\r
- 5758 0332 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 149\r
-\r
-\r
- 5759 0333 0B                  .uleb128 0xb\r
- 5760 0334 27                  .uleb128 0x27\r
- 5761 0335 0C                  .uleb128 0xc\r
- 5762 0336 49                  .uleb128 0x49\r
- 5763 0337 13                  .uleb128 0x13\r
- 5764 0338 3C                  .uleb128 0x3c\r
- 5765 0339 0C                  .uleb128 0xc\r
- 5766 033a 01                  .uleb128 0x1\r
- 5767 033b 13                  .uleb128 0x13\r
- 5768 033c 00                  .byte   0\r
- 5769 033d 00                  .byte   0\r
- 5770 033e 34                  .uleb128 0x34\r
- 5771 033f 2E                  .uleb128 0x2e\r
- 5772 0340 01                  .byte   0x1\r
- 5773 0341 3F                  .uleb128 0x3f\r
- 5774 0342 0C                  .uleb128 0xc\r
- 5775 0343 03                  .uleb128 0x3\r
- 5776 0344 0E                  .uleb128 0xe\r
- 5777 0345 3A                  .uleb128 0x3a\r
- 5778 0346 0B                  .uleb128 0xb\r
- 5779 0347 3B                  .uleb128 0x3b\r
- 5780 0348 0B                  .uleb128 0xb\r
- 5781 0349 27                  .uleb128 0x27\r
- 5782 034a 0C                  .uleb128 0xc\r
- 5783 034b 3C                  .uleb128 0x3c\r
- 5784 034c 0C                  .uleb128 0xc\r
- 5785 034d 00                  .byte   0\r
- 5786 034e 00                  .byte   0\r
- 5787 034f 00                  .byte   0\r
- 5788                          .section        .debug_loc,"",%progbits\r
- 5789                  .Ldebug_loc0:\r
- 5790                  .LLST0:\r
- 5791 0000 00000000            .4byte  .LVL0\r
- 5792 0004 5E000000            .4byte  .LVL2\r
- 5793 0008 0100                .2byte  0x1\r
- 5794 000a 50                  .byte   0x50\r
- 5795 000b 5E000000            .4byte  .LVL2\r
- 5796 000f 72000000            .4byte  .LVL3\r
- 5797 0013 0400                .2byte  0x4\r
- 5798 0015 F3                  .byte   0xf3\r
- 5799 0016 01                  .uleb128 0x1\r
- 5800 0017 50                  .byte   0x50\r
- 5801 0018 9F                  .byte   0x9f\r
- 5802 0019 72000000            .4byte  .LVL3\r
- 5803 001d 80000000            .4byte  .LVL4\r
- 5804 0021 0100                .2byte  0x1\r
- 5805 0023 50                  .byte   0x50\r
- 5806 0024 80000000            .4byte  .LVL4\r
- 5807 0028 B8000000            .4byte  .LFE7\r
- 5808 002c 0400                .2byte  0x4\r
- 5809 002e F3                  .byte   0xf3\r
- 5810 002f 01                  .uleb128 0x1\r
- 5811 0030 50                  .byte   0x50\r
- 5812 0031 9F                  .byte   0x9f\r
- 5813 0032 00000000            .4byte  0\r
- 5814 0036 00000000            .4byte  0\r
- 5815                  .LLST1:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 150\r
-\r
-\r
- 5816 003a 00000000            .4byte  .LVL0\r
- 5817 003e 2A000000            .4byte  .LVL1\r
- 5818 0042 0200                .2byte  0x2\r
- 5819 0044 30                  .byte   0x30\r
- 5820 0045 9F                  .byte   0x9f\r
- 5821 0046 72000000            .4byte  .LVL3\r
- 5822 004a 80000000            .4byte  .LVL4\r
- 5823 004e 0200                .2byte  0x2\r
- 5824 0050 31                  .byte   0x31\r
- 5825 0051 9F                  .byte   0x9f\r
- 5826 0052 00000000            .4byte  0\r
- 5827 0056 00000000            .4byte  0\r
- 5828                  .LLST2:\r
- 5829 005a 00000000            .4byte  .LVL5\r
- 5830 005e 1C000000            .4byte  .LVL6\r
- 5831 0062 0100                .2byte  0x1\r
- 5832 0064 50                  .byte   0x50\r
- 5833 0065 1C000000            .4byte  .LVL6\r
- 5834 0069 3C000000            .4byte  .LFE14\r
- 5835 006d 0400                .2byte  0x4\r
- 5836 006f F3                  .byte   0xf3\r
- 5837 0070 01                  .uleb128 0x1\r
- 5838 0071 50                  .byte   0x50\r
- 5839 0072 9F                  .byte   0x9f\r
- 5840 0073 00000000            .4byte  0\r
- 5841 0077 00000000            .4byte  0\r
- 5842                  .LLST3:\r
- 5843 007b 00000000            .4byte  .LVL7\r
- 5844 007f 18000000            .4byte  .LVL9\r
- 5845 0083 0100                .2byte  0x1\r
- 5846 0085 50                  .byte   0x50\r
- 5847 0086 18000000            .4byte  .LVL9\r
- 5848 008a 2E000000            .4byte  .LVL11\r
- 5849 008e 0200                .2byte  0x2\r
- 5850 0090 73                  .byte   0x73\r
- 5851 0091 00                  .sleb128 0\r
- 5852 0092 2E000000            .4byte  .LVL11\r
- 5853 0096 34000000            .4byte  .LFE2\r
- 5854 009a 0400                .2byte  0x4\r
- 5855 009c F3                  .byte   0xf3\r
- 5856 009d 01                  .uleb128 0x1\r
- 5857 009e 50                  .byte   0x50\r
- 5858 009f 9F                  .byte   0x9f\r
- 5859 00a0 00000000            .4byte  0\r
- 5860 00a4 00000000            .4byte  0\r
- 5861                  .LLST4:\r
- 5862 00a8 00000000            .4byte  .LVL7\r
- 5863 00ac 14000000            .4byte  .LVL8\r
- 5864 00b0 0100                .2byte  0x1\r
- 5865 00b2 51                  .byte   0x51\r
- 5866 00b3 14000000            .4byte  .LVL8\r
- 5867 00b7 34000000            .4byte  .LFE2\r
- 5868 00bb 0400                .2byte  0x4\r
- 5869 00bd F3                  .byte   0xf3\r
- 5870 00be 01                  .uleb128 0x1\r
- 5871 00bf 51                  .byte   0x51\r
- 5872 00c0 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 151\r
-\r
-\r
- 5873 00c1 00000000            .4byte  0\r
- 5874 00c5 00000000            .4byte  0\r
- 5875                  .LLST5:\r
- 5876 00c9 00000000            .4byte  .LVL7\r
- 5877 00cd 20000000            .4byte  .LVL10\r
- 5878 00d1 0100                .2byte  0x1\r
- 5879 00d3 52                  .byte   0x52\r
- 5880 00d4 20000000            .4byte  .LVL10\r
- 5881 00d8 34000000            .4byte  .LFE2\r
- 5882 00dc 0400                .2byte  0x4\r
- 5883 00de F3                  .byte   0xf3\r
- 5884 00df 01                  .uleb128 0x1\r
- 5885 00e0 52                  .byte   0x52\r
- 5886 00e1 9F                  .byte   0x9f\r
- 5887 00e2 00000000            .4byte  0\r
- 5888 00e6 00000000            .4byte  0\r
- 5889                  .LLST6:\r
- 5890 00ea 00000000            .4byte  .LVL12\r
- 5891 00ee 10000000            .4byte  .LVL13\r
- 5892 00f2 0100                .2byte  0x1\r
- 5893 00f4 50                  .byte   0x50\r
- 5894 00f5 10000000            .4byte  .LVL13\r
- 5895 00f9 14000000            .4byte  .LFE3\r
- 5896 00fd 0400                .2byte  0x4\r
- 5897 00ff F3                  .byte   0xf3\r
- 5898 0100 01                  .uleb128 0x1\r
- 5899 0101 50                  .byte   0x50\r
- 5900 0102 9F                  .byte   0x9f\r
- 5901 0103 00000000            .4byte  0\r
- 5902 0107 00000000            .4byte  0\r
- 5903                  .LLST7:\r
- 5904 010b 00000000            .4byte  .LVL14\r
- 5905 010f 14000000            .4byte  .LVL15\r
- 5906 0113 0100                .2byte  0x1\r
- 5907 0115 50                  .byte   0x50\r
- 5908 0116 14000000            .4byte  .LVL15\r
- 5909 011a 16000000            .4byte  .LVL16\r
- 5910 011e 0400                .2byte  0x4\r
- 5911 0120 F3                  .byte   0xf3\r
- 5912 0121 01                  .uleb128 0x1\r
- 5913 0122 50                  .byte   0x50\r
- 5914 0123 9F                  .byte   0x9f\r
- 5915 0124 16000000            .4byte  .LVL16\r
- 5916 0128 20000000            .4byte  .LVL17\r
- 5917 012c 0100                .2byte  0x1\r
- 5918 012e 50                  .byte   0x50\r
- 5919 012f 20000000            .4byte  .LVL17\r
- 5920 0133 30000000            .4byte  .LVL18\r
- 5921 0137 0400                .2byte  0x4\r
- 5922 0139 F3                  .byte   0xf3\r
- 5923 013a 01                  .uleb128 0x1\r
- 5924 013b 50                  .byte   0x50\r
- 5925 013c 9F                  .byte   0x9f\r
- 5926 013d 30000000            .4byte  .LVL18\r
- 5927 0141 34000000            .4byte  .LVL19\r
- 5928 0145 0100                .2byte  0x1\r
- 5929 0147 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 152\r
-\r
-\r
- 5930 0148 34000000            .4byte  .LVL19\r
- 5931 014c 40000000            .4byte  .LFE9\r
- 5932 0150 0400                .2byte  0x4\r
- 5933 0152 F3                  .byte   0xf3\r
- 5934 0153 01                  .uleb128 0x1\r
- 5935 0154 50                  .byte   0x50\r
- 5936 0155 9F                  .byte   0x9f\r
- 5937 0156 00000000            .4byte  0\r
- 5938 015a 00000000            .4byte  0\r
- 5939                  .LLST8:\r
- 5940 015e 00000000            .4byte  .LFB8\r
- 5941 0162 02000000            .4byte  .LCFI0\r
- 5942 0166 0200                .2byte  0x2\r
- 5943 0168 7D                  .byte   0x7d\r
- 5944 0169 00                  .sleb128 0\r
- 5945 016a 02000000            .4byte  .LCFI0\r
- 5946 016e D8000000            .4byte  .LFE8\r
- 5947 0172 0200                .2byte  0x2\r
- 5948 0174 7D                  .byte   0x7d\r
- 5949 0175 10                  .sleb128 16\r
- 5950 0176 00000000            .4byte  0\r
- 5951 017a 00000000            .4byte  0\r
- 5952                  .LLST9:\r
- 5953 017e 00000000            .4byte  .LVL20\r
- 5954 0182 30000000            .4byte  .LVL27\r
- 5955 0186 0100                .2byte  0x1\r
- 5956 0188 50                  .byte   0x50\r
- 5957 0189 30000000            .4byte  .LVL27\r
- 5958 018d D8000000            .4byte  .LFE8\r
- 5959 0191 0400                .2byte  0x4\r
- 5960 0193 F3                  .byte   0xf3\r
- 5961 0194 01                  .uleb128 0x1\r
- 5962 0195 50                  .byte   0x50\r
- 5963 0196 9F                  .byte   0x9f\r
- 5964 0197 00000000            .4byte  0\r
- 5965 019b 00000000            .4byte  0\r
- 5966                  .LLST10:\r
- 5967 019f 14000000            .4byte  .LVL21\r
- 5968 01a3 22000000            .4byte  .LVL22\r
- 5969 01a7 0100                .2byte  0x1\r
- 5970 01a9 55                  .byte   0x55\r
- 5971 01aa 24000000            .4byte  .LVL23\r
- 5972 01ae 26000000            .4byte  .LVL24\r
- 5973 01b2 0200                .2byte  0x2\r
- 5974 01b4 33                  .byte   0x33\r
- 5975 01b5 9F                  .byte   0x9f\r
- 5976 01b6 2C000000            .4byte  .LVL25\r
- 5977 01ba 2E000000            .4byte  .LVL26\r
- 5978 01be 0100                .2byte  0x1\r
- 5979 01c0 55                  .byte   0x55\r
- 5980 01c1 00000000            .4byte  0\r
- 5981 01c5 00000000            .4byte  0\r
- 5982                  .LLST11:\r
- 5983 01c9 00000000            .4byte  .LVL32\r
- 5984 01cd 06000000            .4byte  .LVL33\r
- 5985 01d1 0100                .2byte  0x1\r
- 5986 01d3 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 153\r
-\r
-\r
- 5987 01d4 06000000            .4byte  .LVL33\r
- 5988 01d8 18000000            .4byte  .LFE12\r
- 5989 01dc 0400                .2byte  0x4\r
- 5990 01de F3                  .byte   0xf3\r
- 5991 01df 01                  .uleb128 0x1\r
- 5992 01e0 50                  .byte   0x50\r
- 5993 01e1 9F                  .byte   0x9f\r
- 5994 01e2 00000000            .4byte  0\r
- 5995 01e6 00000000            .4byte  0\r
- 5996                  .LLST12:\r
- 5997 01ea 00000000            .4byte  .LFB15\r
- 5998 01ee 02000000            .4byte  .LCFI1\r
- 5999 01f2 0200                .2byte  0x2\r
- 6000 01f4 7D                  .byte   0x7d\r
- 6001 01f5 00                  .sleb128 0\r
- 6002 01f6 02000000            .4byte  .LCFI1\r
- 6003 01fa 6C000000            .4byte  .LFE15\r
- 6004 01fe 0200                .2byte  0x2\r
- 6005 0200 7D                  .byte   0x7d\r
- 6006 0201 18                  .sleb128 24\r
- 6007 0202 00000000            .4byte  0\r
- 6008 0206 00000000            .4byte  0\r
- 6009                  .LLST13:\r
- 6010 020a 00000000            .4byte  .LVL35\r
- 6011 020e 07000000            .4byte  .LVL36-1\r
- 6012 0212 0100                .2byte  0x1\r
- 6013 0214 50                  .byte   0x50\r
- 6014 0215 07000000            .4byte  .LVL36-1\r
- 6015 0219 6C000000            .4byte  .LFE15\r
- 6016 021d 0400                .2byte  0x4\r
- 6017 021f F3                  .byte   0xf3\r
- 6018 0220 01                  .uleb128 0x1\r
- 6019 0221 50                  .byte   0x50\r
- 6020 0222 9F                  .byte   0x9f\r
- 6021 0223 00000000            .4byte  0\r
- 6022 0227 00000000            .4byte  0\r
- 6023                  .LLST14:\r
- 6024 022b 22000000            .4byte  .LVL41\r
- 6025 022f 2E000000            .4byte  .LVL45\r
- 6026 0233 0100                .2byte  0x1\r
- 6027 0235 53                  .byte   0x53\r
- 6028 0236 3C000000            .4byte  .LVL47\r
- 6029 023a 41000000            .4byte  .LVL48-1\r
- 6030 023e 0100                .2byte  0x1\r
- 6031 0240 53                  .byte   0x53\r
- 6032 0241 00000000            .4byte  0\r
- 6033 0245 00000000            .4byte  0\r
- 6034                  .LLST15:\r
- 6035 0249 10000000            .4byte  .LVL39\r
- 6036 024d 12000000            .4byte  .LVL40\r
- 6037 0251 0800                .2byte  0x8\r
- 6038 0253 72                  .byte   0x72\r
- 6039 0254 00                  .sleb128 0\r
- 6040 0255 08                  .byte   0x8\r
- 6041 0256 FF                  .byte   0xff\r
- 6042 0257 1A                  .byte   0x1a\r
- 6043 0258 38                  .byte   0x38\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 154\r
-\r
-\r
- 6044 0259 24                  .byte   0x24\r
- 6045 025a 9F                  .byte   0x9f\r
- 6046 025b 12000000            .4byte  .LVL40\r
- 6047 025f 26000000            .4byte  .LVL43\r
- 6048 0263 0E00                .2byte  0xe\r
- 6049 0265 72                  .byte   0x72\r
- 6050 0266 00                  .sleb128 0\r
- 6051 0267 08                  .byte   0x8\r
- 6052 0268 FF                  .byte   0xff\r
- 6053 0269 1A                  .byte   0x1a\r
- 6054 026a 38                  .byte   0x38\r
- 6055 026b 24                  .byte   0x24\r
- 6056 026c 71                  .byte   0x71\r
- 6057 026d 00                  .sleb128 0\r
- 6058 026e 08                  .byte   0x8\r
- 6059 026f FF                  .byte   0xff\r
- 6060 0270 1A                  .byte   0x1a\r
- 6061 0271 21                  .byte   0x21\r
- 6062 0272 9F                  .byte   0x9f\r
- 6063 0273 50000000            .4byte  .LVL50\r
- 6064 0277 55000000            .4byte  .LVL51-1\r
- 6065 027b 0E00                .2byte  0xe\r
- 6066 027d 72                  .byte   0x72\r
- 6067 027e 00                  .sleb128 0\r
- 6068 027f 08                  .byte   0x8\r
- 6069 0280 FF                  .byte   0xff\r
- 6070 0281 1A                  .byte   0x1a\r
- 6071 0282 38                  .byte   0x38\r
- 6072 0283 24                  .byte   0x24\r
- 6073 0284 71                  .byte   0x71\r
- 6074 0285 00                  .sleb128 0\r
- 6075 0286 08                  .byte   0x8\r
- 6076 0287 FF                  .byte   0xff\r
- 6077 0288 1A                  .byte   0x1a\r
- 6078 0289 21                  .byte   0x21\r
- 6079 028a 9F                  .byte   0x9f\r
- 6080 028b 00000000            .4byte  0\r
- 6081 028f 00000000            .4byte  0\r
- 6082                  .LLST16:\r
- 6083 0293 0C000000            .4byte  .LVL37\r
- 6084 0297 0E000000            .4byte  .LVL38\r
- 6085 029b 0100                .2byte  0x1\r
- 6086 029d 50                  .byte   0x50\r
- 6087 029e 0E000000            .4byte  .LVL38\r
- 6088 02a2 6C000000            .4byte  .LFE15\r
- 6089 02a6 0100                .2byte  0x1\r
- 6090 02a8 56                  .byte   0x56\r
- 6091 02a9 00000000            .4byte  0\r
- 6092 02ad 00000000            .4byte  0\r
- 6093                  .LLST17:\r
- 6094 02b1 24000000            .4byte  .LVL42\r
- 6095 02b5 28000000            .4byte  .LVL44\r
- 6096 02b9 0200                .2byte  0x2\r
- 6097 02bb 37                  .byte   0x37\r
- 6098 02bc 9F                  .byte   0x9f\r
- 6099 02bd 00000000            .4byte  0\r
- 6100 02c1 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 155\r
-\r
-\r
- 6101                  .LLST18:\r
- 6102 02c5 4A000000            .4byte  .LVL49\r
- 6103 02c9 50000000            .4byte  .LVL50\r
- 6104 02cd 0100                .2byte  0x1\r
- 6105 02cf 57                  .byte   0x57\r
- 6106 02d0 00000000            .4byte  0\r
- 6107 02d4 00000000            .4byte  0\r
- 6108                  .LLST19:\r
- 6109 02d8 00000000            .4byte  .LVL53\r
- 6110 02dc 06000000            .4byte  .LVL54\r
- 6111 02e0 0100                .2byte  0x1\r
- 6112 02e2 50                  .byte   0x50\r
- 6113 02e3 06000000            .4byte  .LVL54\r
- 6114 02e7 18000000            .4byte  .LFE16\r
- 6115 02eb 0400                .2byte  0x4\r
- 6116 02ed F3                  .byte   0xf3\r
- 6117 02ee 01                  .uleb128 0x1\r
- 6118 02ef 50                  .byte   0x50\r
- 6119 02f0 9F                  .byte   0x9f\r
- 6120 02f1 00000000            .4byte  0\r
- 6121 02f5 00000000            .4byte  0\r
- 6122                  .LLST20:\r
- 6123 02f9 00000000            .4byte  .LFB4\r
- 6124 02fd 02000000            .4byte  .LCFI2\r
- 6125 0301 0200                .2byte  0x2\r
- 6126 0303 7D                  .byte   0x7d\r
- 6127 0304 00                  .sleb128 0\r
- 6128 0305 02000000            .4byte  .LCFI2\r
- 6129 0309 50000000            .4byte  .LFE4\r
- 6130 030d 0200                .2byte  0x2\r
- 6131 030f 7D                  .byte   0x7d\r
- 6132 0310 10                  .sleb128 16\r
- 6133 0311 00000000            .4byte  0\r
- 6134 0315 00000000            .4byte  0\r
- 6135                  .LLST21:\r
- 6136 0319 00000000            .4byte  .LVL55\r
- 6137 031d 24000000            .4byte  .LVL56\r
- 6138 0321 0100                .2byte  0x1\r
- 6139 0323 50                  .byte   0x50\r
- 6140 0324 24000000            .4byte  .LVL56\r
- 6141 0328 50000000            .4byte  .LFE4\r
- 6142 032c 0400                .2byte  0x4\r
- 6143 032e F3                  .byte   0xf3\r
- 6144 032f 01                  .uleb128 0x1\r
- 6145 0330 50                  .byte   0x50\r
- 6146 0331 9F                  .byte   0x9f\r
- 6147 0332 00000000            .4byte  0\r
- 6148 0336 00000000            .4byte  0\r
- 6149                  .LLST22:\r
- 6150 033a 2C000000            .4byte  .LVL59\r
- 6151 033e 46000000            .4byte  .LVL63\r
- 6152 0342 0100                .2byte  0x1\r
- 6153 0344 54                  .byte   0x54\r
- 6154 0345 00000000            .4byte  0\r
- 6155 0349 00000000            .4byte  0\r
- 6156                  .LLST23:\r
- 6157 034d 26000000            .4byte  .LVL57\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 156\r
-\r
-\r
- 6158 0351 46000000            .4byte  .LVL63\r
- 6159 0355 0100                .2byte  0x1\r
- 6160 0357 55                  .byte   0x55\r
- 6161 0358 00000000            .4byte  0\r
- 6162 035c 00000000            .4byte  0\r
- 6163                  .LLST24:\r
- 6164 0360 26000000            .4byte  .LVL57\r
- 6165 0364 28000000            .4byte  .LVL58\r
- 6166 0368 0100                .2byte  0x1\r
- 6167 036a 50                  .byte   0x50\r
- 6168 036b 28000000            .4byte  .LVL58\r
- 6169 036f 46000000            .4byte  .LVL63\r
- 6170 0373 0100                .2byte  0x1\r
- 6171 0375 56                  .byte   0x56\r
- 6172 0376 00000000            .4byte  0\r
- 6173 037a 00000000            .4byte  0\r
- 6174                  .LLST25:\r
- 6175 037e 00000000            .4byte  .LFB0\r
- 6176 0382 02000000            .4byte  .LCFI3\r
- 6177 0386 0200                .2byte  0x2\r
- 6178 0388 7D                  .byte   0x7d\r
- 6179 0389 00                  .sleb128 0\r
- 6180 038a 02000000            .4byte  .LCFI3\r
- 6181 038e 68000000            .4byte  .LFE0\r
- 6182 0392 0200                .2byte  0x2\r
- 6183 0394 7D                  .byte   0x7d\r
- 6184 0395 18                  .sleb128 24\r
- 6185 0396 00000000            .4byte  0\r
- 6186 039a 00000000            .4byte  0\r
- 6187                  .LLST26:\r
- 6188 039e 00000000            .4byte  .LVL64\r
- 6189 03a2 1A000000            .4byte  .LVL65\r
- 6190 03a6 0100                .2byte  0x1\r
- 6191 03a8 50                  .byte   0x50\r
- 6192 03a9 1A000000            .4byte  .LVL65\r
- 6193 03ad 54000000            .4byte  .LVL73\r
- 6194 03b1 0400                .2byte  0x4\r
- 6195 03b3 F3                  .byte   0xf3\r
- 6196 03b4 01                  .uleb128 0x1\r
- 6197 03b5 50                  .byte   0x50\r
- 6198 03b6 9F                  .byte   0x9f\r
- 6199 03b7 54000000            .4byte  .LVL73\r
- 6200 03bb 56000000            .4byte  .LVL74\r
- 6201 03bf 0100                .2byte  0x1\r
- 6202 03c1 50                  .byte   0x50\r
- 6203 03c2 56000000            .4byte  .LVL74\r
- 6204 03c6 68000000            .4byte  .LFE0\r
- 6205 03ca 0400                .2byte  0x4\r
- 6206 03cc F3                  .byte   0xf3\r
- 6207 03cd 01                  .uleb128 0x1\r
- 6208 03ce 50                  .byte   0x50\r
- 6209 03cf 9F                  .byte   0x9f\r
- 6210 03d0 00000000            .4byte  0\r
- 6211 03d4 00000000            .4byte  0\r
- 6212                  .LLST27:\r
- 6213 03d8 00000000            .4byte  .LVL64\r
- 6214 03dc 26000000            .4byte  .LVL69\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 157\r
-\r
-\r
- 6215 03e0 0200                .2byte  0x2\r
- 6216 03e2 30                  .byte   0x30\r
- 6217 03e3 9F                  .byte   0x9f\r
- 6218 03e4 26000000            .4byte  .LVL69\r
- 6219 03e8 46000000            .4byte  .LVL71\r
- 6220 03ec 0200                .2byte  0x2\r
- 6221 03ee 40                  .byte   0x40\r
- 6222 03ef 9F                  .byte   0x9f\r
- 6223 03f0 46000000            .4byte  .LVL71\r
- 6224 03f4 54000000            .4byte  .LVL73\r
- 6225 03f8 0100                .2byte  0x1\r
- 6226 03fa 54                  .byte   0x54\r
- 6227 03fb 54000000            .4byte  .LVL73\r
- 6228 03ff 56000000            .4byte  .LVL74\r
- 6229 0403 0200                .2byte  0x2\r
- 6230 0405 30                  .byte   0x30\r
- 6231 0406 9F                  .byte   0x9f\r
- 6232 0407 56000000            .4byte  .LVL74\r
- 6233 040b 68000000            .4byte  .LFE0\r
- 6234 040f 0100                .2byte  0x1\r
- 6235 0411 54                  .byte   0x54\r
- 6236 0412 00000000            .4byte  0\r
- 6237 0416 00000000            .4byte  0\r
- 6238                  .LLST28:\r
- 6239 041a 1C000000            .4byte  .LVL66\r
- 6240 041e 1E000000            .4byte  .LVL67\r
- 6241 0422 0100                .2byte  0x1\r
- 6242 0424 50                  .byte   0x50\r
- 6243 0425 1E000000            .4byte  .LVL67\r
- 6244 0429 54000000            .4byte  .LVL73\r
- 6245 042d 0100                .2byte  0x1\r
- 6246 042f 57                  .byte   0x57\r
- 6247 0430 00000000            .4byte  0\r
- 6248 0434 00000000            .4byte  0\r
- 6249                  .LLST29:\r
- 6250 0438 1C000000            .4byte  .LVL66\r
- 6251 043c 54000000            .4byte  .LVL73\r
- 6252 0440 0100                .2byte  0x1\r
- 6253 0442 56                  .byte   0x56\r
- 6254 0443 00000000            .4byte  0\r
- 6255 0447 00000000            .4byte  0\r
- 6256                  .LLST30:\r
- 6257 044b 22000000            .4byte  .LVL68\r
- 6258 044f 54000000            .4byte  .LVL73\r
- 6259 0453 0100                .2byte  0x1\r
- 6260 0455 55                  .byte   0x55\r
- 6261 0456 00000000            .4byte  0\r
- 6262 045a 00000000            .4byte  0\r
- 6263                  .LLST31:\r
- 6264 045e 00000000            .4byte  .LVL75\r
- 6265 0462 08000000            .4byte  .LVL76\r
- 6266 0466 0100                .2byte  0x1\r
- 6267 0468 50                  .byte   0x50\r
- 6268 0469 08000000            .4byte  .LVL76\r
- 6269 046d 18000000            .4byte  .LFE23\r
- 6270 0471 0400                .2byte  0x4\r
- 6271 0473 F3                  .byte   0xf3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 158\r
-\r
-\r
- 6272 0474 01                  .uleb128 0x1\r
- 6273 0475 50                  .byte   0x50\r
- 6274 0476 9F                  .byte   0x9f\r
- 6275 0477 00000000            .4byte  0\r
- 6276 047b 00000000            .4byte  0\r
- 6277                  .LLST32:\r
- 6278 047f 00000000            .4byte  .LVL77\r
- 6279 0483 16000000            .4byte  .LVL79\r
- 6280 0487 0100                .2byte  0x1\r
- 6281 0489 50                  .byte   0x50\r
- 6282 048a 16000000            .4byte  .LVL79\r
- 6283 048e 1C000000            .4byte  .LFE24\r
- 6284 0492 0400                .2byte  0x4\r
- 6285 0494 F3                  .byte   0xf3\r
- 6286 0495 01                  .uleb128 0x1\r
- 6287 0496 50                  .byte   0x50\r
- 6288 0497 9F                  .byte   0x9f\r
- 6289 0498 00000000            .4byte  0\r
- 6290 049c 00000000            .4byte  0\r
- 6291                  .LLST33:\r
- 6292 04a0 00000000            .4byte  .LFB29\r
- 6293 04a4 02000000            .4byte  .LCFI4\r
- 6294 04a8 0200                .2byte  0x2\r
- 6295 04aa 7D                  .byte   0x7d\r
- 6296 04ab 00                  .sleb128 0\r
- 6297 04ac 02000000            .4byte  .LCFI4\r
- 6298 04b0 88000000            .4byte  .LFE29\r
- 6299 04b4 0200                .2byte  0x2\r
- 6300 04b6 7D                  .byte   0x7d\r
- 6301 04b7 20                  .sleb128 32\r
- 6302 04b8 00000000            .4byte  0\r
- 6303 04bc 00000000            .4byte  0\r
- 6304                  .LLST34:\r
- 6305 04c0 00000000            .4byte  .LVL80\r
- 6306 04c4 14000000            .4byte  .LVL82\r
- 6307 04c8 0100                .2byte  0x1\r
- 6308 04ca 50                  .byte   0x50\r
- 6309 04cb 14000000            .4byte  .LVL82\r
- 6310 04cf 7A000000            .4byte  .LVL101\r
- 6311 04d3 0200                .2byte  0x2\r
- 6312 04d5 91                  .byte   0x91\r
- 6313 04d6 66                  .sleb128 -26\r
- 6314 04d7 7A000000            .4byte  .LVL101\r
- 6315 04db 7C000000            .4byte  .LVL102\r
- 6316 04df 0100                .2byte  0x1\r
- 6317 04e1 50                  .byte   0x50\r
- 6318 04e2 7C000000            .4byte  .LVL102\r
- 6319 04e6 88000000            .4byte  .LFE29\r
- 6320 04ea 0200                .2byte  0x2\r
- 6321 04ec 91                  .byte   0x91\r
- 6322 04ed 66                  .sleb128 -26\r
- 6323 04ee 00000000            .4byte  0\r
- 6324 04f2 00000000            .4byte  0\r
- 6325                  .LLST35:\r
- 6326 04f6 00000000            .4byte  .LVL80\r
- 6327 04fa 24000000            .4byte  .LVL86\r
- 6328 04fe 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 159\r
-\r
-\r
- 6329 0500 30                  .byte   0x30\r
- 6330 0501 9F                  .byte   0x9f\r
- 6331 0502 24000000            .4byte  .LVL86\r
- 6332 0506 66000000            .4byte  .LVL98\r
- 6333 050a 0200                .2byte  0x2\r
- 6334 050c 40                  .byte   0x40\r
- 6335 050d 9F                  .byte   0x9f\r
- 6336 050e 66000000            .4byte  .LVL98\r
- 6337 0512 7A000000            .4byte  .LVL101\r
- 6338 0516 0100                .2byte  0x1\r
- 6339 0518 54                  .byte   0x54\r
- 6340 0519 7A000000            .4byte  .LVL101\r
- 6341 051d 7C000000            .4byte  .LVL102\r
- 6342 0521 0200                .2byte  0x2\r
- 6343 0523 30                  .byte   0x30\r
- 6344 0524 9F                  .byte   0x9f\r
- 6345 0525 7C000000            .4byte  .LVL102\r
- 6346 0529 88000000            .4byte  .LFE29\r
- 6347 052d 0100                .2byte  0x1\r
- 6348 052f 54                  .byte   0x54\r
- 6349 0530 00000000            .4byte  0\r
- 6350 0534 00000000            .4byte  0\r
- 6351                  .LLST36:\r
- 6352 0538 08000000            .4byte  .LVL81\r
- 6353 053c 28000000            .4byte  .LVL87\r
- 6354 0540 0200                .2byte  0x2\r
- 6355 0542 91                  .byte   0x91\r
- 6356 0543 66                  .sleb128 -26\r
- 6357 0544 28000000            .4byte  .LVL87\r
- 6358 0548 2E000000            .4byte  .LVL88\r
- 6359 054c 0100                .2byte  0x1\r
- 6360 054e 50                  .byte   0x50\r
- 6361 054f 5A000000            .4byte  .LVL95\r
- 6362 0553 5E000000            .4byte  .LVL96\r
- 6363 0557 0100                .2byte  0x1\r
- 6364 0559 51                  .byte   0x51\r
- 6365 055a 5E000000            .4byte  .LVL96\r
- 6366 055e 64000000            .4byte  .LVL97\r
- 6367 0562 0100                .2byte  0x1\r
- 6368 0564 54                  .byte   0x54\r
- 6369 0565 64000000            .4byte  .LVL97\r
- 6370 0569 71000000            .4byte  .LVL100-1\r
- 6371 056d 0100                .2byte  0x1\r
- 6372 056f 50                  .byte   0x50\r
- 6373 0570 72000000            .4byte  .LVL100\r
- 6374 0574 7A000000            .4byte  .LVL101\r
- 6375 0578 0100                .2byte  0x1\r
- 6376 057a 50                  .byte   0x50\r
- 6377 057b 7A000000            .4byte  .LVL101\r
- 6378 057f 7C000000            .4byte  .LVL102\r
- 6379 0583 0200                .2byte  0x2\r
- 6380 0585 91                  .byte   0x91\r
- 6381 0586 66                  .sleb128 -26\r
- 6382 0587 7C000000            .4byte  .LVL102\r
- 6383 058b 7E000000            .4byte  .LVL103\r
- 6384 058f 0100                .2byte  0x1\r
- 6385 0591 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 160\r
-\r
-\r
- 6386 0592 7E000000            .4byte  .LVL103\r
- 6387 0596 88000000            .4byte  .LFE29\r
- 6388 059a 0200                .2byte  0x2\r
- 6389 059c 91                  .byte   0x91\r
- 6390 059d 66                  .sleb128 -26\r
- 6391 059e 00000000            .4byte  0\r
- 6392 05a2 00000000            .4byte  0\r
- 6393                  .LLST37:\r
- 6394 05a6 30000000            .4byte  .LVL89\r
- 6395 05aa 38000000            .4byte  .LVL90\r
- 6396 05ae 0100                .2byte  0x1\r
- 6397 05b0 50                  .byte   0x50\r
- 6398 05b1 38000000            .4byte  .LVL90\r
- 6399 05b5 3A000000            .4byte  .LVL91\r
- 6400 05b9 0100                .2byte  0x1\r
- 6401 05bb 54                  .byte   0x54\r
- 6402 05bc 48000000            .4byte  .LVL93\r
- 6403 05c0 4C000000            .4byte  .LVL94\r
- 6404 05c4 0100                .2byte  0x1\r
- 6405 05c6 52                  .byte   0x52\r
- 6406 05c7 00000000            .4byte  0\r
- 6407 05cb 00000000            .4byte  0\r
- 6408                  .LLST38:\r
- 6409 05cf 18000000            .4byte  .LVL83\r
- 6410 05d3 6A000000            .4byte  .LVL99\r
- 6411 05d7 0100                .2byte  0x1\r
- 6412 05d9 57                  .byte   0x57\r
- 6413 05da 00000000            .4byte  0\r
- 6414 05de 00000000            .4byte  0\r
- 6415                  .LLST39:\r
- 6416 05e2 1C000000            .4byte  .LVL84\r
- 6417 05e6 7A000000            .4byte  .LVL101\r
- 6418 05ea 0100                .2byte  0x1\r
- 6419 05ec 56                  .byte   0x56\r
- 6420 05ed 00000000            .4byte  0\r
- 6421 05f1 00000000            .4byte  0\r
- 6422                  .LLST40:\r
- 6423 05f5 20000000            .4byte  .LVL85\r
- 6424 05f9 7A000000            .4byte  .LVL101\r
- 6425 05fd 0100                .2byte  0x1\r
- 6426 05ff 55                  .byte   0x55\r
- 6427 0600 00000000            .4byte  0\r
- 6428 0604 00000000            .4byte  0\r
- 6429                  .LLST41:\r
- 6430 0608 00000000            .4byte  .LVL104\r
- 6431 060c 06000000            .4byte  .LVL105\r
- 6432 0610 0100                .2byte  0x1\r
- 6433 0612 50                  .byte   0x50\r
- 6434 0613 06000000            .4byte  .LVL105\r
- 6435 0617 18000000            .4byte  .LFE36\r
- 6436 061b 0400                .2byte  0x4\r
- 6437 061d F3                  .byte   0xf3\r
- 6438 061e 01                  .uleb128 0x1\r
- 6439 061f 50                  .byte   0x50\r
- 6440 0620 9F                  .byte   0x9f\r
- 6441 0621 00000000            .4byte  0\r
- 6442 0625 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 161\r
-\r
-\r
- 6443                  .LLST42:\r
- 6444 0629 00000000            .4byte  .LVL106\r
- 6445 062d 06000000            .4byte  .LVL107\r
- 6446 0631 0100                .2byte  0x1\r
- 6447 0633 50                  .byte   0x50\r
- 6448 0634 06000000            .4byte  .LVL107\r
- 6449 0638 18000000            .4byte  .LFE37\r
- 6450 063c 0400                .2byte  0x4\r
- 6451 063e F3                  .byte   0xf3\r
- 6452 063f 01                  .uleb128 0x1\r
- 6453 0640 50                  .byte   0x50\r
- 6454 0641 9F                  .byte   0x9f\r
- 6455 0642 00000000            .4byte  0\r
- 6456 0646 00000000            .4byte  0\r
- 6457                  .LLST43:\r
- 6458 064a 00000000            .4byte  .LVL108\r
- 6459 064e 04000000            .4byte  .LVL109\r
- 6460 0652 0100                .2byte  0x1\r
- 6461 0654 50                  .byte   0x50\r
- 6462 0655 04000000            .4byte  .LVL109\r
- 6463 0659 1C000000            .4byte  .LFE38\r
- 6464 065d 0400                .2byte  0x4\r
- 6465 065f F3                  .byte   0xf3\r
- 6466 0660 01                  .uleb128 0x1\r
- 6467 0661 50                  .byte   0x50\r
- 6468 0662 9F                  .byte   0x9f\r
- 6469 0663 00000000            .4byte  0\r
- 6470 0667 00000000            .4byte  0\r
- 6471                  .LLST44:\r
- 6472 066b 00000000            .4byte  .LFB41\r
- 6473 066f 02000000            .4byte  .LCFI5\r
- 6474 0673 0200                .2byte  0x2\r
- 6475 0675 7D                  .byte   0x7d\r
- 6476 0676 00                  .sleb128 0\r
- 6477 0677 02000000            .4byte  .LCFI5\r
- 6478 067b 28000000            .4byte  .LFE41\r
- 6479 067f 0200                .2byte  0x2\r
- 6480 0681 7D                  .byte   0x7d\r
- 6481 0682 08                  .sleb128 8\r
- 6482 0683 00000000            .4byte  0\r
- 6483 0687 00000000            .4byte  0\r
- 6484                  .LLST45:\r
- 6485 068b 00000000            .4byte  .LVL111\r
- 6486 068f 04000000            .4byte  .LVL112\r
- 6487 0693 0100                .2byte  0x1\r
- 6488 0695 50                  .byte   0x50\r
- 6489 0696 04000000            .4byte  .LVL112\r
- 6490 069a 28000000            .4byte  .LFE41\r
- 6491 069e 0100                .2byte  0x1\r
- 6492 06a0 54                  .byte   0x54\r
- 6493 06a1 00000000            .4byte  0\r
- 6494 06a5 00000000            .4byte  0\r
- 6495                  .LLST46:\r
- 6496 06a9 00000000            .4byte  .LVL116\r
- 6497 06ad 06000000            .4byte  .LVL117\r
- 6498 06b1 0100                .2byte  0x1\r
- 6499 06b3 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 162\r
-\r
-\r
- 6500 06b4 06000000            .4byte  .LVL117\r
- 6501 06b8 10000000            .4byte  .LFE42\r
- 6502 06bc 0400                .2byte  0x4\r
- 6503 06be F3                  .byte   0xf3\r
- 6504 06bf 01                  .uleb128 0x1\r
- 6505 06c0 50                  .byte   0x50\r
- 6506 06c1 9F                  .byte   0x9f\r
- 6507 06c2 00000000            .4byte  0\r
- 6508 06c6 00000000            .4byte  0\r
- 6509                  .LLST47:\r
- 6510 06ca 00000000            .4byte  .LFB28\r
- 6511 06ce 02000000            .4byte  .LCFI6\r
- 6512 06d2 0200                .2byte  0x2\r
- 6513 06d4 7D                  .byte   0x7d\r
- 6514 06d5 00                  .sleb128 0\r
- 6515 06d6 02000000            .4byte  .LCFI6\r
- 6516 06da 6C000000            .4byte  .LFE28\r
- 6517 06de 0200                .2byte  0x2\r
- 6518 06e0 7D                  .byte   0x7d\r
- 6519 06e1 10                  .sleb128 16\r
- 6520 06e2 00000000            .4byte  0\r
- 6521 06e6 00000000            .4byte  0\r
- 6522                  .LLST48:\r
- 6523 06ea 00000000            .4byte  .LVL119\r
- 6524 06ee 1C000000            .4byte  .LVL121\r
- 6525 06f2 0100                .2byte  0x1\r
- 6526 06f4 50                  .byte   0x50\r
- 6527 06f5 1C000000            .4byte  .LVL121\r
- 6528 06f9 1F000000            .4byte  .LVL122-1\r
- 6529 06fd 0200                .2byte  0x2\r
- 6530 06ff 71                  .byte   0x71\r
- 6531 0700 00                  .sleb128 0\r
- 6532 0701 1F000000            .4byte  .LVL122-1\r
- 6533 0705 3A000000            .4byte  .LVL124\r
- 6534 0709 0400                .2byte  0x4\r
- 6535 070b F3                  .byte   0xf3\r
- 6536 070c 01                  .uleb128 0x1\r
- 6537 070d 50                  .byte   0x50\r
- 6538 070e 9F                  .byte   0x9f\r
- 6539 070f 3A000000            .4byte  .LVL124\r
- 6540 0713 40000000            .4byte  .LVL125\r
- 6541 0717 0100                .2byte  0x1\r
- 6542 0719 50                  .byte   0x50\r
- 6543 071a 40000000            .4byte  .LVL125\r
- 6544 071e 6C000000            .4byte  .LFE28\r
- 6545 0722 0400                .2byte  0x4\r
- 6546 0724 F3                  .byte   0xf3\r
- 6547 0725 01                  .uleb128 0x1\r
- 6548 0726 50                  .byte   0x50\r
- 6549 0727 9F                  .byte   0x9f\r
- 6550 0728 00000000            .4byte  0\r
- 6551 072c 00000000            .4byte  0\r
- 6552                  .LLST49:\r
- 6553 0730 00000000            .4byte  .LFB25\r
- 6554 0734 02000000            .4byte  .LCFI7\r
- 6555 0738 0200                .2byte  0x2\r
- 6556 073a 7D                  .byte   0x7d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 163\r
-\r
-\r
- 6557 073b 00                  .sleb128 0\r
- 6558 073c 02000000            .4byte  .LCFI7\r
- 6559 0740 70000000            .4byte  .LFE25\r
- 6560 0744 0200                .2byte  0x2\r
- 6561 0746 7D                  .byte   0x7d\r
- 6562 0747 10                  .sleb128 16\r
- 6563 0748 00000000            .4byte  0\r
- 6564 074c 00000000            .4byte  0\r
- 6565                  .LLST50:\r
- 6566 0750 2C000000            .4byte  .LVL127\r
- 6567 0754 34000000            .4byte  .LVL128\r
- 6568 0758 0100                .2byte  0x1\r
- 6569 075a 53                  .byte   0x53\r
- 6570 075b 34000000            .4byte  .LVL128\r
- 6571 075f 56000000            .4byte  .LVL131\r
- 6572 0763 0200                .2byte  0x2\r
- 6573 0765 91                  .byte   0x91\r
- 6574 0766 76                  .sleb128 -10\r
- 6575 0767 56000000            .4byte  .LVL131\r
- 6576 076b 5A000000            .4byte  .LVL132\r
- 6577 076f 0100                .2byte  0x1\r
- 6578 0771 52                  .byte   0x52\r
- 6579 0772 5C000000            .4byte  .LVL133\r
- 6580 0776 70000000            .4byte  .LFE25\r
- 6581 077a 0200                .2byte  0x2\r
- 6582 077c 91                  .byte   0x91\r
- 6583 077d 76                  .sleb128 -10\r
- 6584 077e 00000000            .4byte  0\r
- 6585 0782 00000000            .4byte  0\r
- 6586                  .LLST51:\r
- 6587 0786 00000000            .4byte  .LVL134\r
- 6588 078a 12000000            .4byte  .LVL135\r
- 6589 078e 0100                .2byte  0x1\r
- 6590 0790 50                  .byte   0x50\r
- 6591 0791 12000000            .4byte  .LVL135\r
- 6592 0795 40000000            .4byte  .LFE43\r
- 6593 0799 0400                .2byte  0x4\r
- 6594 079b F3                  .byte   0xf3\r
- 6595 079c 01                  .uleb128 0x1\r
- 6596 079d 50                  .byte   0x50\r
- 6597 079e 9F                  .byte   0x9f\r
- 6598 079f 00000000            .4byte  0\r
- 6599 07a3 00000000            .4byte  0\r
- 6600                  .LLST52:\r
- 6601 07a7 00000000            .4byte  .LVL136\r
- 6602 07ab 06000000            .4byte  .LVL137\r
- 6603 07af 0100                .2byte  0x1\r
- 6604 07b1 50                  .byte   0x50\r
- 6605 07b2 06000000            .4byte  .LVL137\r
- 6606 07b6 40000000            .4byte  .LFE44\r
- 6607 07ba 0400                .2byte  0x4\r
- 6608 07bc F3                  .byte   0xf3\r
- 6609 07bd 01                  .uleb128 0x1\r
- 6610 07be 50                  .byte   0x50\r
- 6611 07bf 9F                  .byte   0x9f\r
- 6612 07c0 00000000            .4byte  0\r
- 6613 07c4 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 164\r
-\r
-\r
- 6614                  .LLST53:\r
- 6615 07c8 00000000            .4byte  .LVL136\r
- 6616 07cc 0A000000            .4byte  .LVL138\r
- 6617 07d0 0100                .2byte  0x1\r
- 6618 07d2 51                  .byte   0x51\r
- 6619 07d3 0A000000            .4byte  .LVL138\r
- 6620 07d7 40000000            .4byte  .LFE44\r
- 6621 07db 0400                .2byte  0x4\r
- 6622 07dd F3                  .byte   0xf3\r
- 6623 07de 01                  .uleb128 0x1\r
- 6624 07df 51                  .byte   0x51\r
- 6625 07e0 9F                  .byte   0x9f\r
- 6626 07e1 00000000            .4byte  0\r
- 6627 07e5 00000000            .4byte  0\r
- 6628                  .LLST54:\r
- 6629 07e9 00000000            .4byte  .LFB46\r
- 6630 07ed 02000000            .4byte  .LCFI8\r
- 6631 07f1 0200                .2byte  0x2\r
- 6632 07f3 7D                  .byte   0x7d\r
- 6633 07f4 00                  .sleb128 0\r
- 6634 07f5 02000000            .4byte  .LCFI8\r
- 6635 07f9 68000000            .4byte  .LFE46\r
- 6636 07fd 0200                .2byte  0x2\r
- 6637 07ff 7D                  .byte   0x7d\r
- 6638 0800 10                  .sleb128 16\r
- 6639 0801 00000000            .4byte  0\r
- 6640 0805 00000000            .4byte  0\r
- 6641                  .LLST55:\r
- 6642 0809 00000000            .4byte  .LVL139\r
- 6643 080d 0E000000            .4byte  .LVL140\r
- 6644 0811 0100                .2byte  0x1\r
- 6645 0813 50                  .byte   0x50\r
- 6646 0814 0E000000            .4byte  .LVL140\r
- 6647 0818 68000000            .4byte  .LFE46\r
- 6648 081c 0400                .2byte  0x4\r
- 6649 081e F3                  .byte   0xf3\r
- 6650 081f 01                  .uleb128 0x1\r
- 6651 0820 50                  .byte   0x50\r
- 6652 0821 9F                  .byte   0x9f\r
- 6653 0822 00000000            .4byte  0\r
- 6654 0826 00000000            .4byte  0\r
- 6655                  .LLST56:\r
- 6656 082a 00000000            .4byte  .LVL139\r
- 6657 082e 12000000            .4byte  .LVL141\r
- 6658 0832 0100                .2byte  0x1\r
- 6659 0834 51                  .byte   0x51\r
- 6660 0835 12000000            .4byte  .LVL141\r
- 6661 0839 68000000            .4byte  .LFE46\r
- 6662 083d 0400                .2byte  0x4\r
- 6663 083f F3                  .byte   0xf3\r
- 6664 0840 01                  .uleb128 0x1\r
- 6665 0841 51                  .byte   0x51\r
- 6666 0842 9F                  .byte   0x9f\r
- 6667 0843 00000000            .4byte  0\r
- 6668 0847 00000000            .4byte  0\r
- 6669                  .LLST57:\r
- 6670 084b 00000000            .4byte  .LFB47\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 165\r
-\r
-\r
- 6671 084f 02000000            .4byte  .LCFI9\r
- 6672 0853 0200                .2byte  0x2\r
- 6673 0855 7D                  .byte   0x7d\r
- 6674 0856 00                  .sleb128 0\r
- 6675 0857 02000000            .4byte  .LCFI9\r
- 6676 085b 68000000            .4byte  .LFE47\r
- 6677 085f 0200                .2byte  0x2\r
- 6678 0861 7D                  .byte   0x7d\r
- 6679 0862 10                  .sleb128 16\r
- 6680 0863 00000000            .4byte  0\r
- 6681 0867 00000000            .4byte  0\r
- 6682                  .LLST58:\r
- 6683 086b 00000000            .4byte  .LVL143\r
- 6684 086f 0E000000            .4byte  .LVL144\r
- 6685 0873 0100                .2byte  0x1\r
- 6686 0875 50                  .byte   0x50\r
- 6687 0876 0E000000            .4byte  .LVL144\r
- 6688 087a 68000000            .4byte  .LFE47\r
- 6689 087e 0400                .2byte  0x4\r
- 6690 0880 F3                  .byte   0xf3\r
- 6691 0881 01                  .uleb128 0x1\r
- 6692 0882 50                  .byte   0x50\r
- 6693 0883 9F                  .byte   0x9f\r
- 6694 0884 00000000            .4byte  0\r
- 6695 0888 00000000            .4byte  0\r
- 6696                  .LLST59:\r
- 6697 088c 00000000            .4byte  .LVL143\r
- 6698 0890 20000000            .4byte  .LVL145\r
- 6699 0894 0100                .2byte  0x1\r
- 6700 0896 51                  .byte   0x51\r
- 6701 0897 20000000            .4byte  .LVL145\r
- 6702 089b 68000000            .4byte  .LFE47\r
- 6703 089f 0400                .2byte  0x4\r
- 6704 08a1 F3                  .byte   0xf3\r
- 6705 08a2 01                  .uleb128 0x1\r
- 6706 08a3 51                  .byte   0x51\r
- 6707 08a4 9F                  .byte   0x9f\r
- 6708 08a5 00000000            .4byte  0\r
- 6709 08a9 00000000            .4byte  0\r
- 6710                  .LLST60:\r
- 6711 08ad 00000000            .4byte  .LFB50\r
- 6712 08b1 02000000            .4byte  .LCFI10\r
- 6713 08b5 0200                .2byte  0x2\r
- 6714 08b7 7D                  .byte   0x7d\r
- 6715 08b8 00                  .sleb128 0\r
- 6716 08b9 02000000            .4byte  .LCFI10\r
- 6717 08bd 44000000            .4byte  .LFE50\r
- 6718 08c1 0200                .2byte  0x2\r
- 6719 08c3 7D                  .byte   0x7d\r
- 6720 08c4 08                  .sleb128 8\r
- 6721 08c5 00000000            .4byte  0\r
- 6722 08c9 00000000            .4byte  0\r
- 6723                  .LLST61:\r
- 6724 08cd 00000000            .4byte  .LVL148\r
- 6725 08d1 0A000000            .4byte  .LVL150\r
- 6726 08d5 0100                .2byte  0x1\r
- 6727 08d7 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 166\r
-\r
-\r
- 6728 08d8 0A000000            .4byte  .LVL150\r
- 6729 08dc 14000000            .4byte  .LFE52\r
- 6730 08e0 0400                .2byte  0x4\r
- 6731 08e2 F3                  .byte   0xf3\r
- 6732 08e3 01                  .uleb128 0x1\r
- 6733 08e4 50                  .byte   0x50\r
- 6734 08e5 9F                  .byte   0x9f\r
- 6735 08e6 00000000            .4byte  0\r
- 6736 08ea 00000000            .4byte  0\r
- 6737                  .LLST62:\r
- 6738 08ee 00000000            .4byte  .LFB53\r
- 6739 08f2 02000000            .4byte  .LCFI11\r
- 6740 08f6 0200                .2byte  0x2\r
- 6741 08f8 7D                  .byte   0x7d\r
- 6742 08f9 00                  .sleb128 0\r
- 6743 08fa 02000000            .4byte  .LCFI11\r
- 6744 08fe 18000000            .4byte  .LFE53\r
- 6745 0902 0200                .2byte  0x2\r
- 6746 0904 7D                  .byte   0x7d\r
- 6747 0905 08                  .sleb128 8\r
- 6748 0906 00000000            .4byte  0\r
- 6749 090a 00000000            .4byte  0\r
- 6750                  .LLST63:\r
- 6751 090e 06000000            .4byte  .LVL151\r
- 6752 0912 0D000000            .4byte  .LVL153-1\r
- 6753 0916 0100                .2byte  0x1\r
- 6754 0918 50                  .byte   0x50\r
- 6755 0919 00000000            .4byte  0\r
- 6756 091d 00000000            .4byte  0\r
- 6757                  .LLST64:\r
- 6758 0921 00000000            .4byte  .LFB54\r
- 6759 0925 02000000            .4byte  .LCFI12\r
- 6760 0929 0200                .2byte  0x2\r
- 6761 092b 7D                  .byte   0x7d\r
- 6762 092c 00                  .sleb128 0\r
- 6763 092d 02000000            .4byte  .LCFI12\r
- 6764 0931 1C000000            .4byte  .LFE54\r
- 6765 0935 0200                .2byte  0x2\r
- 6766 0937 7D                  .byte   0x7d\r
- 6767 0938 08                  .sleb128 8\r
- 6768 0939 00000000            .4byte  0\r
- 6769 093d 00000000            .4byte  0\r
- 6770                  .LLST65:\r
- 6771 0941 06000000            .4byte  .LVL154\r
- 6772 0945 13000000            .4byte  .LVL156-1\r
- 6773 0949 0100                .2byte  0x1\r
- 6774 094b 50                  .byte   0x50\r
- 6775 094c 00000000            .4byte  0\r
- 6776 0950 00000000            .4byte  0\r
- 6777                  .LLST66:\r
- 6778 0954 00000000            .4byte  .LFB55\r
- 6779 0958 02000000            .4byte  .LCFI13\r
- 6780 095c 0200                .2byte  0x2\r
- 6781 095e 7D                  .byte   0x7d\r
- 6782 095f 00                  .sleb128 0\r
- 6783 0960 02000000            .4byte  .LCFI13\r
- 6784 0964 18000000            .4byte  .LFE55\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 167\r
-\r
-\r
- 6785 0968 0200                .2byte  0x2\r
- 6786 096a 7D                  .byte   0x7d\r
- 6787 096b 08                  .sleb128 8\r
- 6788 096c 00000000            .4byte  0\r
- 6789 0970 00000000            .4byte  0\r
- 6790                  .LLST67:\r
- 6791 0974 00000000            .4byte  .LVL157\r
- 6792 0978 07000000            .4byte  .LVL158-1\r
- 6793 097c 0100                .2byte  0x1\r
- 6794 097e 50                  .byte   0x50\r
- 6795 097f 07000000            .4byte  .LVL158-1\r
- 6796 0983 18000000            .4byte  .LFE55\r
- 6797 0987 0100                .2byte  0x1\r
- 6798 0989 54                  .byte   0x54\r
- 6799 098a 00000000            .4byte  0\r
- 6800 098e 00000000            .4byte  0\r
- 6801                  .LLST68:\r
- 6802 0992 08000000            .4byte  .LVL158\r
- 6803 0996 13000000            .4byte  .LVL159-1\r
- 6804 099a 0100                .2byte  0x1\r
- 6805 099c 50                  .byte   0x50\r
- 6806 099d 00000000            .4byte  0\r
- 6807 09a1 00000000            .4byte  0\r
- 6808                  .LLST69:\r
- 6809 09a5 00000000            .4byte  .LFB56\r
- 6810 09a9 02000000            .4byte  .LCFI14\r
- 6811 09ad 0200                .2byte  0x2\r
- 6812 09af 7D                  .byte   0x7d\r
- 6813 09b0 00                  .sleb128 0\r
- 6814 09b1 02000000            .4byte  .LCFI14\r
- 6815 09b5 60000000            .4byte  .LFE56\r
- 6816 09b9 0200                .2byte  0x2\r
- 6817 09bb 7D                  .byte   0x7d\r
- 6818 09bc 08                  .sleb128 8\r
- 6819 09bd 00000000            .4byte  0\r
- 6820 09c1 00000000            .4byte  0\r
- 6821                  .LLST70:\r
- 6822 09c5 06000000            .4byte  .LVL160\r
- 6823 09c9 59000000            .4byte  .LVL161-1\r
- 6824 09cd 0100                .2byte  0x1\r
- 6825 09cf 50                  .byte   0x50\r
- 6826 09d0 00000000            .4byte  0\r
- 6827 09d4 00000000            .4byte  0\r
- 6828                  .LLST71:\r
- 6829 09d8 00000000            .4byte  .LVL162\r
- 6830 09dc 0C000000            .4byte  .LVL165\r
- 6831 09e0 0100                .2byte  0x1\r
- 6832 09e2 50                  .byte   0x50\r
- 6833 09e3 0C000000            .4byte  .LVL165\r
- 6834 09e7 18000000            .4byte  .LFE57\r
- 6835 09eb 0400                .2byte  0x4\r
- 6836 09ed F3                  .byte   0xf3\r
- 6837 09ee 01                  .uleb128 0x1\r
- 6838 09ef 50                  .byte   0x50\r
- 6839 09f0 9F                  .byte   0x9f\r
- 6840 09f1 00000000            .4byte  0\r
- 6841 09f5 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 168\r
-\r
-\r
- 6842                  .LLST72:\r
- 6843 09f9 00000000            .4byte  .LVL162\r
- 6844 09fd 02000000            .4byte  .LVL163\r
- 6845 0a01 0600                .2byte  0x6\r
- 6846 0a03 11                  .byte   0x11\r
- 6847 0a04 88DA8380            .sleb128 -536810232\r
- 6847      7E\r
- 6848 0a09 02000000            .4byte  .LVL163\r
- 6849 0a0d 08000000            .4byte  .LVL164\r
- 6850 0a11 0200                .2byte  0x2\r
- 6851 0a13 73                  .byte   0x73\r
- 6852 0a14 00                  .sleb128 0\r
- 6853 0a15 08000000            .4byte  .LVL164\r
- 6854 0a19 18000000            .4byte  .LFE57\r
- 6855 0a1d 0100                .2byte  0x1\r
- 6856 0a1f 53                  .byte   0x53\r
- 6857 0a20 00000000            .4byte  0\r
- 6858 0a24 00000000            .4byte  0\r
- 6859                  .LLST73:\r
- 6860 0a28 00000000            .4byte  .LVL166\r
- 6861 0a2c 06000000            .4byte  .LVL168\r
- 6862 0a30 0100                .2byte  0x1\r
- 6863 0a32 50                  .byte   0x50\r
- 6864 0a33 06000000            .4byte  .LVL168\r
- 6865 0a37 14000000            .4byte  .LFE58\r
- 6866 0a3b 0400                .2byte  0x4\r
- 6867 0a3d F3                  .byte   0xf3\r
- 6868 0a3e 01                  .uleb128 0x1\r
- 6869 0a3f 50                  .byte   0x50\r
- 6870 0a40 9F                  .byte   0x9f\r
- 6871 0a41 00000000            .4byte  0\r
- 6872 0a45 00000000            .4byte  0\r
- 6873                  .LLST74:\r
- 6874 0a49 00000000            .4byte  .LVL166\r
- 6875 0a4d 02000000            .4byte  .LVL167\r
- 6876 0a51 0600                .2byte  0x6\r
- 6877 0a53 11                  .byte   0x11\r
- 6878 0a54 88DA8380            .sleb128 -536810232\r
- 6878      7E\r
- 6879 0a59 02000000            .4byte  .LVL167\r
- 6880 0a5d 14000000            .4byte  .LFE58\r
- 6881 0a61 0200                .2byte  0x2\r
- 6882 0a63 73                  .byte   0x73\r
- 6883 0a64 00                  .sleb128 0\r
- 6884 0a65 00000000            .4byte  0\r
- 6885 0a69 00000000            .4byte  0\r
- 6886                  .LLST75:\r
- 6887 0a6d 00000000            .4byte  .LVL169\r
- 6888 0a71 06000000            .4byte  .LVL171\r
- 6889 0a75 0100                .2byte  0x1\r
- 6890 0a77 50                  .byte   0x50\r
- 6891 0a78 06000000            .4byte  .LVL171\r
- 6892 0a7c 1C000000            .4byte  .LFE59\r
- 6893 0a80 0400                .2byte  0x4\r
- 6894 0a82 F3                  .byte   0xf3\r
- 6895 0a83 01                  .uleb128 0x1\r
- 6896 0a84 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 169\r
-\r
-\r
- 6897 0a85 9F                  .byte   0x9f\r
- 6898 0a86 00000000            .4byte  0\r
- 6899 0a8a 00000000            .4byte  0\r
- 6900                  .LLST76:\r
- 6901 0a8e 00000000            .4byte  .LVL169\r
- 6902 0a92 02000000            .4byte  .LVL170\r
- 6903 0a96 0600                .2byte  0x6\r
- 6904 0a98 11                  .byte   0x11\r
- 6905 0a99 88DA8380            .sleb128 -536810232\r
- 6905      7E\r
- 6906 0a9e 02000000            .4byte  .LVL170\r
- 6907 0aa2 08000000            .4byte  .LVL172\r
- 6908 0aa6 0200                .2byte  0x2\r
- 6909 0aa8 73                  .byte   0x73\r
- 6910 0aa9 00                  .sleb128 0\r
- 6911 0aaa 08000000            .4byte  .LVL172\r
- 6912 0aae 1C000000            .4byte  .LFE59\r
- 6913 0ab2 0100                .2byte  0x1\r
- 6914 0ab4 53                  .byte   0x53\r
- 6915 0ab5 00000000            .4byte  0\r
- 6916 0ab9 00000000            .4byte  0\r
- 6917                  .LLST77:\r
- 6918 0abd 00000000            .4byte  .LVL174\r
- 6919 0ac1 06000000            .4byte  .LVL176\r
- 6920 0ac5 0100                .2byte  0x1\r
- 6921 0ac7 50                  .byte   0x50\r
- 6922 0ac8 06000000            .4byte  .LVL176\r
- 6923 0acc 14000000            .4byte  .LFE60\r
- 6924 0ad0 0400                .2byte  0x4\r
- 6925 0ad2 F3                  .byte   0xf3\r
- 6926 0ad3 01                  .uleb128 0x1\r
- 6927 0ad4 50                  .byte   0x50\r
- 6928 0ad5 9F                  .byte   0x9f\r
- 6929 0ad6 00000000            .4byte  0\r
- 6930 0ada 00000000            .4byte  0\r
- 6931                  .LLST78:\r
- 6932 0ade 00000000            .4byte  .LVL174\r
- 6933 0ae2 02000000            .4byte  .LVL175\r
- 6934 0ae6 0600                .2byte  0x6\r
- 6935 0ae8 11                  .byte   0x11\r
- 6936 0ae9 88DA8380            .sleb128 -536810232\r
- 6936      7E\r
- 6937 0aee 02000000            .4byte  .LVL175\r
- 6938 0af2 14000000            .4byte  .LFE60\r
- 6939 0af6 0200                .2byte  0x2\r
- 6940 0af8 73                  .byte   0x73\r
- 6941 0af9 00                  .sleb128 0\r
- 6942 0afa 00000000            .4byte  0\r
- 6943 0afe 00000000            .4byte  0\r
- 6944                  .LLST79:\r
- 6945 0b02 00000000            .4byte  .LVL177\r
- 6946 0b06 04000000            .4byte  .LVL178\r
- 6947 0b0a 0100                .2byte  0x1\r
- 6948 0b0c 50                  .byte   0x50\r
- 6949 0b0d 04000000            .4byte  .LVL178\r
- 6950 0b11 14000000            .4byte  .LFE61\r
- 6951 0b15 0400                .2byte  0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 170\r
-\r
-\r
- 6952 0b17 F3                  .byte   0xf3\r
- 6953 0b18 01                  .uleb128 0x1\r
- 6954 0b19 50                  .byte   0x50\r
- 6955 0b1a 9F                  .byte   0x9f\r
- 6956 0b1b 00000000            .4byte  0\r
- 6957 0b1f 00000000            .4byte  0\r
- 6958                  .LLST80:\r
- 6959 0b23 00000000            .4byte  .LVL177\r
- 6960 0b27 0A000000            .4byte  .LVL179\r
- 6961 0b2b 0100                .2byte  0x1\r
- 6962 0b2d 51                  .byte   0x51\r
- 6963 0b2e 0A000000            .4byte  .LVL179\r
- 6964 0b32 14000000            .4byte  .LFE61\r
- 6965 0b36 0400                .2byte  0x4\r
- 6966 0b38 F3                  .byte   0xf3\r
- 6967 0b39 01                  .uleb128 0x1\r
- 6968 0b3a 51                  .byte   0x51\r
- 6969 0b3b 9F                  .byte   0x9f\r
- 6970 0b3c 00000000            .4byte  0\r
- 6971 0b40 00000000            .4byte  0\r
- 6972                  .LLST81:\r
- 6973 0b44 00000000            .4byte  .LVL180\r
- 6974 0b48 04000000            .4byte  .LVL181\r
- 6975 0b4c 0100                .2byte  0x1\r
- 6976 0b4e 50                  .byte   0x50\r
- 6977 0b4f 04000000            .4byte  .LVL181\r
- 6978 0b53 12000000            .4byte  .LFE62\r
- 6979 0b57 0400                .2byte  0x4\r
- 6980 0b59 F3                  .byte   0xf3\r
- 6981 0b5a 01                  .uleb128 0x1\r
- 6982 0b5b 50                  .byte   0x50\r
- 6983 0b5c 9F                  .byte   0x9f\r
- 6984 0b5d 00000000            .4byte  0\r
- 6985 0b61 00000000            .4byte  0\r
- 6986                  .LLST82:\r
- 6987 0b65 00000000            .4byte  .LVL183\r
- 6988 0b69 06000000            .4byte  .LVL184\r
- 6989 0b6d 0100                .2byte  0x1\r
- 6990 0b6f 50                  .byte   0x50\r
- 6991 0b70 06000000            .4byte  .LVL184\r
- 6992 0b74 18000000            .4byte  .LFE63\r
- 6993 0b78 0400                .2byte  0x4\r
- 6994 0b7a F3                  .byte   0xf3\r
- 6995 0b7b 01                  .uleb128 0x1\r
- 6996 0b7c 50                  .byte   0x50\r
- 6997 0b7d 9F                  .byte   0x9f\r
- 6998 0b7e 00000000            .4byte  0\r
- 6999 0b82 00000000            .4byte  0\r
- 7000                          .section        .debug_aranges,"",%progbits\r
- 7001 0000 0C020000            .4byte  0x20c\r
- 7002 0004 0200                .2byte  0x2\r
- 7003 0006 00000000            .4byte  .Ldebug_info0\r
- 7004 000a 04                  .byte   0x4\r
- 7005 000b 00                  .byte   0\r
- 7006 000c 0000                .2byte  0\r
- 7007 000e 0000                .2byte  0\r
- 7008 0010 00000000            .4byte  .LFB7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 171\r
-\r
-\r
- 7009 0014 B8000000            .4byte  .LFE7-.LFB7\r
- 7010 0018 00000000            .4byte  .LFB14\r
- 7011 001c 3C000000            .4byte  .LFE14-.LFB14\r
- 7012 0020 00000000            .4byte  .LFB1\r
- 7013 0024 10000000            .4byte  .LFE1-.LFB1\r
- 7014 0028 00000000            .4byte  .LFB2\r
- 7015 002c 34000000            .4byte  .LFE2-.LFB2\r
- 7016 0030 00000000            .4byte  .LFB3\r
- 7017 0034 14000000            .4byte  .LFE3-.LFB3\r
- 7018 0038 00000000            .4byte  .LFB5\r
- 7019 003c 18000000            .4byte  .LFE5-.LFB5\r
- 7020 0040 00000000            .4byte  .LFB9\r
- 7021 0044 40000000            .4byte  .LFE9-.LFB9\r
- 7022 0048 00000000            .4byte  .LFB10\r
- 7023 004c 10000000            .4byte  .LFE10-.LFB10\r
- 7024 0050 00000000            .4byte  .LFB11\r
- 7025 0054 10000000            .4byte  .LFE11-.LFB11\r
- 7026 0058 00000000            .4byte  .LFB8\r
- 7027 005c D8000000            .4byte  .LFE8-.LFB8\r
- 7028 0060 00000000            .4byte  .LFB12\r
- 7029 0064 18000000            .4byte  .LFE12-.LFB12\r
- 7030 0068 00000000            .4byte  .LFB13\r
- 7031 006c 0C000000            .4byte  .LFE13-.LFB13\r
- 7032 0070 00000000            .4byte  .LFB15\r
- 7033 0074 6C000000            .4byte  .LFE15-.LFB15\r
- 7034 0078 00000000            .4byte  .LFB16\r
- 7035 007c 18000000            .4byte  .LFE16-.LFB16\r
- 7036 0080 00000000            .4byte  .LFB17\r
- 7037 0084 10000000            .4byte  .LFE17-.LFB17\r
- 7038 0088 00000000            .4byte  .LFB18\r
- 7039 008c 10000000            .4byte  .LFE18-.LFB18\r
- 7040 0090 00000000            .4byte  .LFB19\r
- 7041 0094 10000000            .4byte  .LFE19-.LFB19\r
- 7042 0098 00000000            .4byte  .LFB20\r
- 7043 009c 10000000            .4byte  .LFE20-.LFB20\r
- 7044 00a0 00000000            .4byte  .LFB4\r
- 7045 00a4 50000000            .4byte  .LFE4-.LFB4\r
- 7046 00a8 00000000            .4byte  .LFB0\r
- 7047 00ac 68000000            .4byte  .LFE0-.LFB0\r
- 7048 00b0 00000000            .4byte  .LFB21\r
- 7049 00b4 10000000            .4byte  .LFE21-.LFB21\r
- 7050 00b8 00000000            .4byte  .LFB22\r
- 7051 00bc 10000000            .4byte  .LFE22-.LFB22\r
- 7052 00c0 00000000            .4byte  .LFB23\r
- 7053 00c4 18000000            .4byte  .LFE23-.LFB23\r
- 7054 00c8 00000000            .4byte  .LFB24\r
- 7055 00cc 1C000000            .4byte  .LFE24-.LFB24\r
- 7056 00d0 00000000            .4byte  .LFB26\r
- 7057 00d4 34000000            .4byte  .LFE26-.LFB26\r
- 7058 00d8 00000000            .4byte  .LFB27\r
- 7059 00dc 10000000            .4byte  .LFE27-.LFB27\r
- 7060 00e0 00000000            .4byte  .LFB29\r
- 7061 00e4 88000000            .4byte  .LFE29-.LFB29\r
- 7062 00e8 00000000            .4byte  .LFB30\r
- 7063 00ec 10000000            .4byte  .LFE30-.LFB30\r
- 7064 00f0 00000000            .4byte  .LFB31\r
- 7065 00f4 10000000            .4byte  .LFE31-.LFB31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 172\r
-\r
-\r
- 7066 00f8 00000000            .4byte  .LFB32\r
- 7067 00fc 10000000            .4byte  .LFE32-.LFB32\r
- 7068 0100 00000000            .4byte  .LFB33\r
- 7069 0104 0C000000            .4byte  .LFE33-.LFB33\r
- 7070 0108 00000000            .4byte  .LFB34\r
- 7071 010c 10000000            .4byte  .LFE34-.LFB34\r
- 7072 0110 00000000            .4byte  .LFB35\r
- 7073 0114 10000000            .4byte  .LFE35-.LFB35\r
- 7074 0118 00000000            .4byte  .LFB36\r
- 7075 011c 18000000            .4byte  .LFE36-.LFB36\r
- 7076 0120 00000000            .4byte  .LFB37\r
- 7077 0124 18000000            .4byte  .LFE37-.LFB37\r
- 7078 0128 00000000            .4byte  .LFB38\r
- 7079 012c 1C000000            .4byte  .LFE38-.LFB38\r
- 7080 0130 00000000            .4byte  .LFB39\r
- 7081 0134 04000000            .4byte  .LFE39-.LFB39\r
- 7082 0138 00000000            .4byte  .LFB40\r
- 7083 013c 10000000            .4byte  .LFE40-.LFB40\r
- 7084 0140 00000000            .4byte  .LFB41\r
- 7085 0144 28000000            .4byte  .LFE41-.LFB41\r
- 7086 0148 00000000            .4byte  .LFB42\r
- 7087 014c 10000000            .4byte  .LFE42-.LFB42\r
- 7088 0150 00000000            .4byte  .LFB28\r
- 7089 0154 6C000000            .4byte  .LFE28-.LFB28\r
- 7090 0158 00000000            .4byte  .LFB25\r
- 7091 015c 70000000            .4byte  .LFE25-.LFB25\r
- 7092 0160 00000000            .4byte  .LFB43\r
- 7093 0164 40000000            .4byte  .LFE43-.LFB43\r
- 7094 0168 00000000            .4byte  .LFB44\r
- 7095 016c 40000000            .4byte  .LFE44-.LFB44\r
- 7096 0170 00000000            .4byte  .LFB45\r
- 7097 0174 0C000000            .4byte  .LFE45-.LFB45\r
- 7098 0178 00000000            .4byte  .LFB46\r
- 7099 017c 68000000            .4byte  .LFE46-.LFB46\r
- 7100 0180 00000000            .4byte  .LFB47\r
- 7101 0184 68000000            .4byte  .LFE47-.LFB47\r
- 7102 0188 00000000            .4byte  .LFB48\r
- 7103 018c 24000000            .4byte  .LFE48-.LFB48\r
- 7104 0190 00000000            .4byte  .LFB49\r
- 7105 0194 24000000            .4byte  .LFE49-.LFB49\r
- 7106 0198 00000000            .4byte  .LFB50\r
- 7107 019c 44000000            .4byte  .LFE50-.LFB50\r
- 7108 01a0 00000000            .4byte  .LFB51\r
- 7109 01a4 10000000            .4byte  .LFE51-.LFB51\r
- 7110 01a8 00000000            .4byte  .LFB52\r
- 7111 01ac 14000000            .4byte  .LFE52-.LFB52\r
- 7112 01b0 00000000            .4byte  .LFB53\r
- 7113 01b4 18000000            .4byte  .LFE53-.LFB53\r
- 7114 01b8 00000000            .4byte  .LFB54\r
- 7115 01bc 1C000000            .4byte  .LFE54-.LFB54\r
- 7116 01c0 00000000            .4byte  .LFB55\r
- 7117 01c4 18000000            .4byte  .LFE55-.LFB55\r
- 7118 01c8 00000000            .4byte  .LFB56\r
- 7119 01cc 60000000            .4byte  .LFE56-.LFB56\r
- 7120 01d0 00000000            .4byte  .LFB57\r
- 7121 01d4 18000000            .4byte  .LFE57-.LFB57\r
- 7122 01d8 00000000            .4byte  .LFB58\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 173\r
-\r
-\r
- 7123 01dc 14000000            .4byte  .LFE58-.LFB58\r
- 7124 01e0 00000000            .4byte  .LFB59\r
- 7125 01e4 1C000000            .4byte  .LFE59-.LFB59\r
- 7126 01e8 00000000            .4byte  .LFB60\r
- 7127 01ec 14000000            .4byte  .LFE60-.LFB60\r
- 7128 01f0 00000000            .4byte  .LFB61\r
- 7129 01f4 14000000            .4byte  .LFE61-.LFB61\r
- 7130 01f8 00000000            .4byte  .LFB62\r
- 7131 01fc 12000000            .4byte  .LFE62-.LFB62\r
- 7132 0200 00000000            .4byte  .LFB63\r
- 7133 0204 18000000            .4byte  .LFE63-.LFB63\r
- 7134 0208 00000000            .4byte  0\r
- 7135 020c 00000000            .4byte  0\r
- 7136                          .section        .debug_ranges,"",%progbits\r
- 7137                  .Ldebug_ranges0:\r
- 7138 0000 00000000            .4byte  .LFB7\r
- 7139 0004 B8000000            .4byte  .LFE7\r
- 7140 0008 00000000            .4byte  .LFB14\r
- 7141 000c 3C000000            .4byte  .LFE14\r
- 7142 0010 00000000            .4byte  .LFB1\r
- 7143 0014 10000000            .4byte  .LFE1\r
- 7144 0018 00000000            .4byte  .LFB2\r
- 7145 001c 34000000            .4byte  .LFE2\r
- 7146 0020 00000000            .4byte  .LFB3\r
- 7147 0024 14000000            .4byte  .LFE3\r
- 7148 0028 00000000            .4byte  .LFB5\r
- 7149 002c 18000000            .4byte  .LFE5\r
- 7150 0030 00000000            .4byte  .LFB9\r
- 7151 0034 40000000            .4byte  .LFE9\r
- 7152 0038 00000000            .4byte  .LFB10\r
- 7153 003c 10000000            .4byte  .LFE10\r
- 7154 0040 00000000            .4byte  .LFB11\r
- 7155 0044 10000000            .4byte  .LFE11\r
- 7156 0048 00000000            .4byte  .LFB8\r
- 7157 004c D8000000            .4byte  .LFE8\r
- 7158 0050 00000000            .4byte  .LFB12\r
- 7159 0054 18000000            .4byte  .LFE12\r
- 7160 0058 00000000            .4byte  .LFB13\r
- 7161 005c 0C000000            .4byte  .LFE13\r
- 7162 0060 00000000            .4byte  .LFB15\r
- 7163 0064 6C000000            .4byte  .LFE15\r
- 7164 0068 00000000            .4byte  .LFB16\r
- 7165 006c 18000000            .4byte  .LFE16\r
- 7166 0070 00000000            .4byte  .LFB17\r
- 7167 0074 10000000            .4byte  .LFE17\r
- 7168 0078 00000000            .4byte  .LFB18\r
- 7169 007c 10000000            .4byte  .LFE18\r
- 7170 0080 00000000            .4byte  .LFB19\r
- 7171 0084 10000000            .4byte  .LFE19\r
- 7172 0088 00000000            .4byte  .LFB20\r
- 7173 008c 10000000            .4byte  .LFE20\r
- 7174 0090 00000000            .4byte  .LFB4\r
- 7175 0094 50000000            .4byte  .LFE4\r
- 7176 0098 00000000            .4byte  .LFB0\r
- 7177 009c 68000000            .4byte  .LFE0\r
- 7178 00a0 00000000            .4byte  .LFB21\r
- 7179 00a4 10000000            .4byte  .LFE21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 174\r
-\r
-\r
- 7180 00a8 00000000            .4byte  .LFB22\r
- 7181 00ac 10000000            .4byte  .LFE22\r
- 7182 00b0 00000000            .4byte  .LFB23\r
- 7183 00b4 18000000            .4byte  .LFE23\r
- 7184 00b8 00000000            .4byte  .LFB24\r
- 7185 00bc 1C000000            .4byte  .LFE24\r
- 7186 00c0 00000000            .4byte  .LFB26\r
- 7187 00c4 34000000            .4byte  .LFE26\r
- 7188 00c8 00000000            .4byte  .LFB27\r
- 7189 00cc 10000000            .4byte  .LFE27\r
- 7190 00d0 00000000            .4byte  .LFB29\r
- 7191 00d4 88000000            .4byte  .LFE29\r
- 7192 00d8 00000000            .4byte  .LFB30\r
- 7193 00dc 10000000            .4byte  .LFE30\r
- 7194 00e0 00000000            .4byte  .LFB31\r
- 7195 00e4 10000000            .4byte  .LFE31\r
- 7196 00e8 00000000            .4byte  .LFB32\r
- 7197 00ec 10000000            .4byte  .LFE32\r
- 7198 00f0 00000000            .4byte  .LFB33\r
- 7199 00f4 0C000000            .4byte  .LFE33\r
- 7200 00f8 00000000            .4byte  .LFB34\r
- 7201 00fc 10000000            .4byte  .LFE34\r
- 7202 0100 00000000            .4byte  .LFB35\r
- 7203 0104 10000000            .4byte  .LFE35\r
- 7204 0108 00000000            .4byte  .LFB36\r
- 7205 010c 18000000            .4byte  .LFE36\r
- 7206 0110 00000000            .4byte  .LFB37\r
- 7207 0114 18000000            .4byte  .LFE37\r
- 7208 0118 00000000            .4byte  .LFB38\r
- 7209 011c 1C000000            .4byte  .LFE38\r
- 7210 0120 00000000            .4byte  .LFB39\r
- 7211 0124 04000000            .4byte  .LFE39\r
- 7212 0128 00000000            .4byte  .LFB40\r
- 7213 012c 10000000            .4byte  .LFE40\r
- 7214 0130 00000000            .4byte  .LFB41\r
- 7215 0134 28000000            .4byte  .LFE41\r
- 7216 0138 00000000            .4byte  .LFB42\r
- 7217 013c 10000000            .4byte  .LFE42\r
- 7218 0140 00000000            .4byte  .LFB28\r
- 7219 0144 6C000000            .4byte  .LFE28\r
- 7220 0148 00000000            .4byte  .LFB25\r
- 7221 014c 70000000            .4byte  .LFE25\r
- 7222 0150 00000000            .4byte  .LFB43\r
- 7223 0154 40000000            .4byte  .LFE43\r
- 7224 0158 00000000            .4byte  .LFB44\r
- 7225 015c 40000000            .4byte  .LFE44\r
- 7226 0160 00000000            .4byte  .LFB45\r
- 7227 0164 0C000000            .4byte  .LFE45\r
- 7228 0168 00000000            .4byte  .LFB46\r
- 7229 016c 68000000            .4byte  .LFE46\r
- 7230 0170 00000000            .4byte  .LFB47\r
- 7231 0174 68000000            .4byte  .LFE47\r
- 7232 0178 00000000            .4byte  .LFB48\r
- 7233 017c 24000000            .4byte  .LFE48\r
- 7234 0180 00000000            .4byte  .LFB49\r
- 7235 0184 24000000            .4byte  .LFE49\r
- 7236 0188 00000000            .4byte  .LFB50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 175\r
-\r
-\r
- 7237 018c 44000000            .4byte  .LFE50\r
- 7238 0190 00000000            .4byte  .LFB51\r
- 7239 0194 10000000            .4byte  .LFE51\r
- 7240 0198 00000000            .4byte  .LFB52\r
- 7241 019c 14000000            .4byte  .LFE52\r
- 7242 01a0 00000000            .4byte  .LFB53\r
- 7243 01a4 18000000            .4byte  .LFE53\r
- 7244 01a8 00000000            .4byte  .LFB54\r
- 7245 01ac 1C000000            .4byte  .LFE54\r
- 7246 01b0 00000000            .4byte  .LFB55\r
- 7247 01b4 18000000            .4byte  .LFE55\r
- 7248 01b8 00000000            .4byte  .LFB56\r
- 7249 01bc 60000000            .4byte  .LFE56\r
- 7250 01c0 00000000            .4byte  .LFB57\r
- 7251 01c4 18000000            .4byte  .LFE57\r
- 7252 01c8 00000000            .4byte  .LFB58\r
- 7253 01cc 14000000            .4byte  .LFE58\r
- 7254 01d0 00000000            .4byte  .LFB59\r
- 7255 01d4 1C000000            .4byte  .LFE59\r
- 7256 01d8 00000000            .4byte  .LFB60\r
- 7257 01dc 14000000            .4byte  .LFE60\r
- 7258 01e0 00000000            .4byte  .LFB61\r
- 7259 01e4 14000000            .4byte  .LFE61\r
- 7260 01e8 00000000            .4byte  .LFB62\r
- 7261 01ec 12000000            .4byte  .LFE62\r
- 7262 01f0 00000000            .4byte  .LFB63\r
- 7263 01f4 18000000            .4byte  .LFE63\r
- 7264 01f8 00000000            .4byte  0\r
- 7265 01fc 00000000            .4byte  0\r
- 7266                          .section        .debug_line,"",%progbits\r
- 7267                  .Ldebug_line0:\r
- 7268 0000 64060000            .section        .debug_str,"MS",%progbits,1\r
- 7268      02005900 \r
- 7268      00000201 \r
- 7268      FB0E0D00 \r
- 7268      01010101 \r
- 7269                  .LASF115:\r
- 7270 0000 72616D56            .ascii  "ramVectorTable\000"\r
- 7270      6563746F \r
- 7270      72546162 \r
- 7270      6C6500\r
- 7271                  .LASF69:\r
- 7272 000f 636F756E            .ascii  "count\000"\r
- 7272      7400\r
- 7273                  .LASF12:\r
- 7274 0015 75696E74            .ascii  "uint16\000"\r
- 7274      313600\r
- 7275                  .LASF108:\r
- 7276 001c 696E7453            .ascii  "intState\000"\r
- 7276      74617465 \r
- 7276      00\r
- 7277                  .LASF54:\r
- 7278 0025 696C6F31            .ascii  "ilo100KhzEnable\000"\r
- 7278      30304B68 \r
- 7278      7A456E61 \r
- 7278      626C6500 \r
- 7279                  .LASF74:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 176\r
-\r
-\r
- 7280 0035 43795854            .ascii  "CyXTAL_DisableErrStatus\000"\r
- 7280      414C5F44 \r
- 7280      69736162 \r
- 7280      6C654572 \r
- 7280      72537461 \r
- 7281                  .LASF50:\r
- 7282 004d 4379494D            .ascii  "CyIMO_Start\000"\r
- 7282      4F5F5374 \r
- 7282      61727400 \r
- 7283                  .LASF49:\r
- 7284 0059 4379494C            .ascii  "CyILO_Stop100K\000"\r
- 7284      4F5F5374 \r
- 7284      6F703130 \r
- 7284      304B00\r
- 7285                  .LASF114:\r
- 7286 0068 6F6C6449            .ascii  "oldIsr\000"\r
- 7286      737200\r
- 7287                  .LASF34:\r
- 7288 006f 4379494D            .ascii  "CyIMO_EnableDoubler\000"\r
- 7288      4F5F456E \r
- 7288      61626C65 \r
- 7288      446F7562 \r
- 7288      6C657200 \r
- 7289                  .LASF107:\r
- 7290 0083 43794469            .ascii  "CyDisableInts\000"\r
- 7290      7361626C \r
- 7290      65496E74 \r
- 7290      7300\r
- 7291                  .LASF89:\r
- 7292 0091 43795854            .ascii  "CyXTAL_32KHZ_Start\000"\r
- 7292      414C5F33 \r
- 7292      324B485A \r
- 7292      5F537461 \r
- 7292      727400\r
- 7293                  .LASF6:\r
- 7294 00a4 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 7294      206C6F6E \r
- 7294      6720756E \r
- 7294      7369676E \r
- 7294      65642069 \r
- 7295                  .LASF57:\r
- 7296 00bb 706D5477            .ascii  "pmTwCfg0State\000"\r
- 7296      43666730 \r
- 7296      53746174 \r
- 7296      6500\r
- 7297                  .LASF83:\r
- 7298 00c9 4379536F            .ascii  "CySoftwareReset\000"\r
- 7298      66747761 \r
- 7298      72655265 \r
- 7298      73657400 \r
- 7299                  .LASF21:\r
- 7300 00d9 4379494D            .ascii  "CyIMO_SetTrimValue\000"\r
- 7300      4F5F5365 \r
- 7300      74547269 \r
- 7300      6D56616C \r
- 7300      756500\r
- 7301                  .LASF127:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 177\r
-\r
-\r
- 7302 00ec 63796465            .ascii  "cydelay_freq_mhz\000"\r
- 7302      6C61795F \r
- 7302      66726571 \r
- 7302      5F6D687A \r
- 7302      00\r
- 7303                  .LASF122:\r
- 7304 00fd 4379496E            .ascii  "CyIntGetState\000"\r
- 7304      74476574 \r
- 7304      53746174 \r
- 7304      6500\r
- 7305                  .LASF70:\r
- 7306 010b 706D5477            .ascii  "pmTwCfg0Tmp\000"\r
- 7306      43666730 \r
- 7306      546D7000 \r
- 7307                  .LASF5:\r
- 7308 0117 6C6F6E67            .ascii  "long long int\000"\r
- 7308      206C6F6E \r
- 7308      6720696E \r
- 7308      7400\r
- 7309                  .LASF0:\r
- 7310 0125 7369676E            .ascii  "signed char\000"\r
- 7310      65642063 \r
- 7310      68617200 \r
- 7311                  .LASF23:\r
- 7312 0131 66726571            .ascii  "freq\000"\r
- 7312      00\r
- 7313                  .LASF90:\r
- 7314 0136 43794465            .ascii  "CyDelayFreq\000"\r
- 7314      6C617946 \r
- 7314      72657100 \r
- 7315                  .LASF44:\r
- 7316 0142 696E7465            .ascii  "interruptState\000"\r
- 7316      72727570 \r
- 7316      74537461 \r
- 7316      746500\r
- 7317                  .LASF46:\r
- 7318 0151 4379494C            .ascii  "CyILO_Start1K\000"\r
- 7318      4F5F5374 \r
- 7318      61727431 \r
- 7318      4B00\r
- 7319                  .LASF51:\r
- 7320 015f 77616974            .ascii  "wait\000"\r
- 7320      00\r
- 7321                  .LASF65:\r
- 7322 0164 73746174            .ascii  "state\000"\r
- 7322      6500\r
- 7323                  .LASF7:\r
- 7324 016a 6C6F6E67            .ascii  "long int\000"\r
- 7324      20696E74 \r
- 7324      00\r
- 7325                  .LASF29:\r
- 7326 0173 4379504C            .ascii  "CyPLL_OUT_SetSource\000"\r
- 7326      4C5F4F55 \r
- 7326      545F5365 \r
- 7326      74536F75 \r
- 7326      72636500 \r
- 7327                  .LASF18:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 178\r
-\r
-\r
- 7328 0187 72656731            .ascii  "reg16\000"\r
- 7328      3600\r
- 7329                  .LASF11:\r
- 7330 018d 75696E74            .ascii  "uint8\000"\r
- 7330      3800\r
- 7331                  .LASF62:\r
- 7332 0193 4379504C            .ascii  "CyPLL_OUT_Start\000"\r
- 7332      4C5F4F55 \r
- 7332      545F5374 \r
- 7332      61727400 \r
- 7333                  .LASF86:\r
- 7334 01a3 43794465            .ascii  "CyDelayUs\000"\r
- 7334      6C617955 \r
- 7334      7300\r
- 7335                  .LASF15:\r
- 7336 01ad 646F7562            .ascii  "double\000"\r
- 7336      6C6500\r
- 7337                  .LASF28:\r
- 7338 01b4 4379504C            .ascii  "CyPLL_OUT_SetPQ\000"\r
- 7338      4C5F4F55 \r
- 7338      545F5365 \r
- 7338      74505100 \r
- 7339                  .LASF47:\r
- 7340 01c4 4379494C            .ascii  "CyILO_Stop1K\000"\r
- 7340      4F5F5374 \r
- 7340      6F70314B \r
- 7340      00\r
- 7341                  .LASF94:\r
- 7342 01d1 43795764            .ascii  "CyWdtClear\000"\r
- 7342      74436C65 \r
- 7342      617200\r
- 7343                  .LASF13:\r
- 7344 01dc 75696E74            .ascii  "uint32\000"\r
- 7344      333200\r
- 7345                  .LASF141:\r
- 7346 01e3 43794465            .ascii  "CyDelayCycles\000"\r
- 7346      6C617943 \r
- 7346      79636C65 \r
- 7346      7300\r
- 7347                  .LASF104:\r
- 7348 01f1 6D61736B            .ascii  "mask\000"\r
- 7348      00\r
- 7349                  .LASF96:\r
- 7350 01f6 72657365            .ascii  "reset\000"\r
- 7350      7400\r
- 7351                  .LASF121:\r
- 7352 01fc 4379496E            .ascii  "CyIntGetPriority\000"\r
- 7352      74476574 \r
- 7352      5072696F \r
- 7352      72697479 \r
- 7352      00\r
- 7353                  .LASF116:\r
- 7354 020d 4379496E            .ascii  "CyIntGetSysVector\000"\r
- 7354      74476574 \r
- 7354      53797356 \r
- 7354      6563746F \r
- 7354      7200\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 179\r
-\r
-\r
- 7355                  .LASF4:\r
- 7356 021f 756E7369            .ascii  "unsigned int\000"\r
- 7356      676E6564 \r
- 7356      20696E74 \r
- 7356      00\r
- 7357                  .LASF33:\r
- 7358 022c 4379494D            .ascii  "CyIMO_SetSource\000"\r
- 7358      4F5F5365 \r
- 7358      74536F75 \r
- 7358      72636500 \r
- 7359                  .LASF43:\r
- 7360 023c 62757343            .ascii  "busClkDiv\000"\r
- 7360      6C6B4469 \r
- 7360      7600\r
- 7361                  .LASF137:\r
- 7362 0246 43795553            .ascii  "CyUSB_PowerOnCheck\000"\r
- 7362      425F506F \r
- 7362      7765724F \r
- 7362      6E436865 \r
- 7362      636B00\r
- 7363                  .LASF9:\r
- 7364 0259 6C6F6E67            .ascii  "long unsigned int\000"\r
- 7364      20756E73 \r
- 7364      69676E65 \r
- 7364      6420696E \r
- 7364      7400\r
- 7365                  .LASF68:\r
- 7366 026b 74696D65            .ascii  "timeout\000"\r
- 7366      6F757400 \r
- 7367                  .LASF98:\r
- 7368 0273 43795664            .ascii  "CyVdLvAnalogEnable\000"\r
- 7368      4C76416E \r
- 7368      616C6F67 \r
- 7368      456E6162 \r
- 7368      6C6500\r
- 7369                  .LASF103:\r
- 7370 0286 43795664            .ascii  "CyVdStickyStatus\000"\r
- 7370      53746963 \r
- 7370      6B795374 \r
- 7370      61747573 \r
- 7370      00\r
- 7371                  .LASF66:\r
- 7372 0297 43795854            .ascii  "CyXTAL_32KHZ_Stop\000"\r
- 7372      414C5F33 \r
- 7372      324B485A \r
- 7372      5F53746F \r
- 7372      7000\r
- 7373                  .LASF63:\r
- 7374 02a9 4379494C            .ascii  "CyILO_SetPowerMode\000"\r
- 7374      4F5F5365 \r
- 7374      74506F77 \r
- 7374      65724D6F \r
- 7374      646500\r
- 7375                  .LASF32:\r
- 7376 02bc 4379494D            .ascii  "CyIMO_Stop\000"\r
- 7376      4F5F5374 \r
- 7376      6F7000\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 180\r
-\r
-\r
- 7377                  .LASF3:\r
- 7378 02c7 73686F72            .ascii  "short unsigned int\000"\r
- 7378      7420756E \r
- 7378      7369676E \r
- 7378      65642069 \r
- 7378      6E7400\r
- 7379                  .LASF91:\r
- 7380 02da 43795764            .ascii  "CyWdtStart\000"\r
- 7380      74537461 \r
- 7380      727400\r
- 7381                  .LASF117:\r
- 7382 02e5 4379496E            .ascii  "CyIntSetVector\000"\r
- 7382      74536574 \r
- 7382      56656374 \r
- 7382      6F7200\r
- 7383                  .LASF102:\r
- 7384 02f4 43795664            .ascii  "CyVdHvAnalogDisable\000"\r
- 7384      4876416E \r
- 7384      616C6F67 \r
- 7384      44697361 \r
- 7384      626C6500 \r
- 7385                  .LASF40:\r
- 7386 0308 43794D61            .ascii  "CyMasterClk_SetSource\000"\r
- 7386      73746572 \r
- 7386      436C6B5F \r
- 7386      53657453 \r
- 7386      6F757263 \r
- 7387                  .LASF112:\r
- 7388 031e 6E756D62            .ascii  "number\000"\r
- 7388      657200\r
- 7389                  .LASF130:\r
- 7390 0325 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 7390      74657243 \r
- 7390      72697469 \r
- 7390      63616C53 \r
- 7390      65637469 \r
- 7391                  .LASF120:\r
- 7392 033c 7072696F            .ascii  "priority\000"\r
- 7392      72697479 \r
- 7392      00\r
- 7393                  .LASF75:\r
- 7394 0345 43795854            .ascii  "CyXTAL_EnableFaultRecovery\000"\r
- 7394      414C5F45 \r
- 7394      6E61626C \r
- 7394      65466175 \r
- 7394      6C745265 \r
- 7395                  .LASF119:\r
- 7396 0360 4379496E            .ascii  "CyIntSetPriority\000"\r
- 7396      74536574 \r
- 7396      5072696F \r
- 7396      72697479 \r
- 7396      00\r
- 7397                  .LASF22:\r
- 7398 0371 43794275            .ascii  "CyBusClk_Internal_SetDivider\000"\r
- 7398      73436C6B \r
- 7398      5F496E74 \r
- 7398      65726E61 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 181\r
-\r
-\r
- 7398      6C5F5365 \r
- 7399                  .LASF111:\r
- 7400 038e 4379496E            .ascii  "CyIntSetSysVector\000"\r
- 7400      74536574 \r
- 7400      53797356 \r
- 7400      6563746F \r
- 7400      7200\r
- 7401                  .LASF136:\r
- 7402 03a0 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 7402      43534932 \r
- 7402      53445C73 \r
- 7402      6F667477 \r
- 7402      6172655C \r
- 7403 03cf 6E00                .ascii  "n\000"\r
- 7404                  .LASF67:\r
- 7405 03d1 43795854            .ascii  "CyXTAL_Start\000"\r
- 7405      414C5F53 \r
- 7405      74617274 \r
- 7405      00\r
- 7406                  .LASF19:\r
- 7407 03de 72656733            .ascii  "reg32\000"\r
- 7407      3200\r
- 7408                  .LASF139:\r
- 7409 03e4 43795854            .ascii  "CyXTAL_ReadStatus\000"\r
- 7409      414C5F52 \r
- 7409      65616453 \r
- 7409      74617475 \r
- 7409      7300\r
- 7410                  .LASF126:\r
- 7411 03f6 63796465            .ascii  "cydelay_freq_khz\000"\r
- 7411      6C61795F \r
- 7411      66726571 \r
- 7411      5F6B687A \r
- 7411      00\r
- 7412                  .LASF30:\r
- 7413 0407 736F7572            .ascii  "source\000"\r
- 7413      636500\r
- 7414                  .LASF8:\r
- 7415 040e 73697A65            .ascii  "sizetype\000"\r
- 7415      74797065 \r
- 7415      00\r
- 7416                  .LASF77:\r
- 7417 0417 43795854            .ascii  "CyXTAL_SetStartup\000"\r
- 7417      414C5F53 \r
- 7417      65745374 \r
- 7417      61727475 \r
- 7417      7000\r
- 7418                  .LASF92:\r
- 7419 0429 7469636B            .ascii  "ticks\000"\r
- 7419      7300\r
- 7420                  .LASF113:\r
- 7421 042f 61646472            .ascii  "address\000"\r
- 7421      65737300 \r
- 7422                  .LASF31:\r
- 7423 0437 4379504C            .ascii  "CyPLL_OUT_Stop\000"\r
- 7423      4C5F4F55 \r
- 7423      545F5374 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 182\r
-\r
-\r
- 7423      6F7000\r
- 7424                  .LASF105:\r
- 7425 0446 43795664            .ascii  "CyVdRealTimeStatus\000"\r
- 7425      5265616C \r
- 7425      54696D65 \r
- 7425      53746174 \r
- 7425      757300\r
- 7426                  .LASF48:\r
- 7427 0459 4379494C            .ascii  "CyILO_Start100K\000"\r
- 7427      4F5F5374 \r
- 7427      61727431 \r
- 7427      30304B00 \r
- 7428                  .LASF37:\r
- 7429 0469 75736250            .ascii  "usbPowerOn\000"\r
- 7429      6F776572 \r
- 7429      4F6E00\r
- 7430                  .LASF124:\r
- 7431 0474 43795265            .ascii  "CyResetStatus\000"\r
- 7431      73657453 \r
- 7431      74617475 \r
- 7431      7300\r
- 7432                  .LASF135:\r
- 7433 0482 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\CyLib.c\000"\r
- 7433      6E657261 \r
- 7433      7465645F \r
- 7433      536F7572 \r
- 7433      63655C50 \r
- 7434                  .LASF131:\r
- 7435 04a3 43794D61            .ascii  "CyMasterClk_SetDivider\000"\r
- 7435      73746572 \r
- 7435      436C6B5F \r
- 7435      53657444 \r
- 7435      69766964 \r
- 7436                  .LASF27:\r
- 7437 04ba 63757272            .ascii  "current\000"\r
- 7437      656E7400 \r
- 7438                  .LASF14:\r
- 7439 04c2 666C6F61            .ascii  "float\000"\r
- 7439      7400\r
- 7440                  .LASF88:\r
- 7441 04c8 43795854            .ascii  "CyXTAL_32KHZ_SetPowerMode\000"\r
- 7441      414C5F33 \r
- 7441      324B485A \r
- 7441      5F536574 \r
- 7441      506F7765 \r
- 7442                  .LASF132:\r
- 7443 04e2 43794578            .ascii  "CyExitCriticalSection\000"\r
- 7443      69744372 \r
- 7443      69746963 \r
- 7443      616C5365 \r
- 7443      6374696F \r
- 7444                  .LASF59:\r
- 7445 04f8 4379494C            .ascii  "CyILO_Enable33K\000"\r
- 7445      4F5F456E \r
- 7445      61626C65 \r
- 7445      33334B00 \r
- 7446                  .LASF118:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 183\r
-\r
-\r
- 7447 0508 4379496E            .ascii  "CyIntGetVector\000"\r
- 7447      74476574 \r
- 7447      56656374 \r
- 7447      6F7200\r
- 7448                  .LASF85:\r
- 7449 0517 6D696C6C            .ascii  "milliseconds\000"\r
- 7449      69736563 \r
- 7449      6F6E6473 \r
- 7449      00\r
- 7450                  .LASF60:\r
- 7451 0524 4379494C            .ascii  "CyILO_Disable33K\000"\r
- 7451      4F5F4469 \r
- 7451      7361626C \r
- 7451      6533334B \r
- 7451      00\r
- 7452                  .LASF125:\r
- 7453 0535 63796465            .ascii  "cydelay_freq_hz\000"\r
- 7453      6C61795F \r
- 7453      66726571 \r
- 7453      5F687A00 \r
- 7454                  .LASF42:\r
- 7455 0545 6D617374            .ascii  "masterClkDiv\000"\r
- 7455      6572436C \r
- 7455      6B446976 \r
- 7455      00\r
- 7456                  .LASF134:\r
- 7457 0552 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 7457      4320342E \r
- 7457      372E3320 \r
- 7457      32303133 \r
- 7457      30333132 \r
- 7458 0585 616E6368            .ascii  "anch revision 196615]\000"\r
- 7458      20726576 \r
- 7458      6973696F \r
- 7458      6E203139 \r
- 7458      36363135 \r
- 7459                  .LASF17:\r
- 7460 059b 72656738            .ascii  "reg8\000"\r
- 7460      00\r
- 7461                  .LASF97:\r
- 7462 05a0 74687265            .ascii  "threshold\000"\r
- 7462      73686F6C \r
- 7462      6400\r
- 7463                  .LASF81:\r
- 7464 05aa 43794861            .ascii  "CyHalt\000"\r
- 7464      6C7400\r
- 7465                  .LASF80:\r
- 7466 05b1 43795854            .ascii  "CyXTAL_SetWdVoltage\000"\r
- 7466      414C5F53 \r
- 7466      65745764 \r
- 7466      566F6C74 \r
- 7466      61676500 \r
- 7467                  .LASF1:\r
- 7468 05c5 756E7369            .ascii  "unsigned char\000"\r
- 7468      676E6564 \r
- 7468      20636861 \r
- 7468      7200\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 184\r
-\r
-\r
- 7469                  .LASF58:\r
- 7470 05d3 706D5477            .ascii  "pmTwCfg2State\000"\r
- 7470      43666732 \r
- 7470      53746174 \r
- 7470      6500\r
- 7471                  .LASF2:\r
- 7472 05e1 73686F72            .ascii  "short int\000"\r
- 7472      7420696E \r
- 7472      7400\r
- 7473                  .LASF56:\r
- 7474 05eb 696C6F45            .ascii  "iloEnableState\000"\r
- 7474      6E61626C \r
- 7474      65537461 \r
- 7474      746500\r
- 7475                  .LASF73:\r
- 7476 05fa 43795854            .ascii  "CyXTAL_EnableErrStatus\000"\r
- 7476      414C5F45 \r
- 7476      6E61626C \r
- 7476      65457272 \r
- 7476      53746174 \r
- 7477                  .LASF110:\r
- 7478 0611 4379466C            .ascii  "CyFlushCache\000"\r
- 7478      75736843 \r
- 7478      61636865 \r
- 7478      00\r
- 7479                  .LASF123:\r
- 7480 061e 73746174            .ascii  "stateReg\000"\r
- 7480      65526567 \r
- 7480      00\r
- 7481                  .LASF138:\r
- 7482 0627 706F7765            .ascii  "poweredOn\000"\r
- 7482      7265644F \r
- 7482      6E00\r
- 7483                  .LASF76:\r
- 7484 0631 43795854            .ascii  "CyXTAL_DisableFaultRecovery\000"\r
- 7484      414C5F44 \r
- 7484      69736162 \r
- 7484      6C654661 \r
- 7484      756C7452 \r
- 7485                  .LASF82:\r
- 7486 064d 72656173            .ascii  "reason\000"\r
- 7486      6F6E00\r
- 7487                  .LASF79:\r
- 7488 0654 43795854            .ascii  "CyXTAL_SetFbVoltage\000"\r
- 7488      414C5F53 \r
- 7488      65744662 \r
- 7488      566F6C74 \r
- 7488      61676500 \r
- 7489                  .LASF52:\r
- 7490 0668 706D4674            .ascii  "pmFtwCfg2Reg\000"\r
- 7490      77436667 \r
- 7490      32526567 \r
- 7490      00\r
- 7491                  .LASF39:\r
- 7492 0675 6E657874            .ascii  "nextFreq\000"\r
- 7492      46726571 \r
- 7492      00\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 185\r
-\r
-\r
- 7493                  .LASF93:\r
- 7494 067e 6C704D6F            .ascii  "lpMode\000"\r
- 7494      646500\r
- 7495                  .LASF10:\r
- 7496 0685 63686172            .ascii  "char\000"\r
- 7496      00\r
- 7497                  .LASF64:\r
- 7498 068a 6D6F6465            .ascii  "mode\000"\r
- 7498      00\r
- 7499                  .LASF20:\r
- 7500 068f 63796973            .ascii  "cyisraddress\000"\r
- 7500      72616464 \r
- 7500      72657373 \r
- 7500      00\r
- 7501                  .LASF35:\r
- 7502 069c 4379494D            .ascii  "CyIMO_DisableDoubler\000"\r
- 7502      4F5F4469 \r
- 7502      7361626C \r
- 7502      65446F75 \r
- 7502      626C6572 \r
- 7503                  .LASF99:\r
- 7504 06b1 43795664            .ascii  "CyVdLvDigitDisable\000"\r
- 7504      4C764469 \r
- 7504      67697444 \r
- 7504      69736162 \r
- 7504      6C6500\r
- 7505                  .LASF100:\r
- 7506 06c4 43795664            .ascii  "CyVdLvAnalogDisable\000"\r
- 7506      4C76416E \r
- 7506      616C6F67 \r
- 7506      44697361 \r
- 7506      626C6500 \r
- 7507                  .LASF26:\r
- 7508 06d8 71446976            .ascii  "qDiv\000"\r
- 7508      00\r
- 7509                  .LASF109:\r
- 7510 06dd 4379456E            .ascii  "CyEnableInts\000"\r
- 7510      61626C65 \r
- 7510      496E7473 \r
- 7510      00\r
- 7511                  .LASF45:\r
- 7512 06ea 43795573            .ascii  "CyUsbClk_SetSource\000"\r
- 7512      62436C6B \r
- 7512      5F536574 \r
- 7512      536F7572 \r
- 7512      636500\r
- 7513                  .LASF140:\r
- 7514 06fd 4379506D            .ascii  "CyPmReadStatus\000"\r
- 7514      52656164 \r
- 7514      53746174 \r
- 7514      757300\r
- 7515                  .LASF38:\r
- 7516 070c 63757272            .ascii  "currentFreq\000"\r
- 7516      656E7446 \r
- 7516      72657100 \r
- 7517                  .LASF84:\r
- 7518 0718 43794465            .ascii  "CyDelay\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 186\r
-\r
-\r
- 7518      6C617900 \r
- 7519                  .LASF41:\r
- 7520 0720 43794275            .ascii  "CyBusClk_SetDivider\000"\r
- 7520      73436C6B \r
- 7520      5F536574 \r
- 7520      44697669 \r
- 7520      64657200 \r
- 7521                  .LASF128:\r
- 7522 0734 63796465            .ascii  "cydelay_32k_ms\000"\r
- 7522      6C61795F \r
- 7522      33326B5F \r
- 7522      6D7300\r
- 7523                  .LASF106:\r
- 7524 0743 7664466C            .ascii  "vdFlagsState\000"\r
- 7524      61677353 \r
- 7524      74617465 \r
- 7524      00\r
- 7525                  .LASF55:\r
- 7526 0750 73746174            .ascii  "status\000"\r
- 7526      757300\r
- 7527                  .LASF61:\r
- 7528 0757 4379494C            .ascii  "CyILO_SetSource\000"\r
- 7528      4F5F5365 \r
- 7528      74536F75 \r
- 7528      72636500 \r
- 7529                  .LASF25:\r
- 7530 0767 70446976            .ascii  "pDiv\000"\r
- 7530      00\r
- 7531                  .LASF36:\r
- 7532 076c 4379494D            .ascii  "CyIMO_SetFreq\000"\r
- 7532      4F5F5365 \r
- 7532      74467265 \r
- 7532      7100\r
- 7533                  .LASF129:\r
- 7534 077a 43795854            .ascii  "CyXTAL_32KHZ_ReadStatus\000"\r
- 7534      414C5F33 \r
- 7534      324B485A \r
- 7534      5F526561 \r
- 7534      64537461 \r
- 7535                  .LASF71:\r
- 7536 0792 706D5477            .ascii  "pmTwCfg2Tmp\000"\r
- 7536      43666732 \r
- 7536      546D7000 \r
- 7537                  .LASF24:\r
- 7538 079e 64697669            .ascii  "divider\000"\r
- 7538      64657200 \r
- 7539                  .LASF16:\r
- 7540 07a6 63797374            .ascii  "cystatus\000"\r
- 7540      61747573 \r
- 7540      00\r
- 7541                  .LASF78:\r
- 7542 07af 73657474            .ascii  "setting\000"\r
- 7542      696E6700 \r
- 7543                  .LASF53:\r
- 7544 07b7 706D4674            .ascii  "pmFtwCfg0Reg\000"\r
- 7544      77436667 \r
- 7544      30526567 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccqtVW5G.s                      page 187\r
-\r
-\r
- 7544      00\r
- 7545                  .LASF87:\r
- 7546 07c4 6D696372            .ascii  "microseconds\000"\r
- 7546      6F736563 \r
- 7546      6F6E6473 \r
- 7546      00\r
- 7547                  .LASF101:\r
- 7548 07d1 43795664            .ascii  "CyVdHvAnalogEnable\000"\r
- 7548      4876416E \r
- 7548      616C6F67 \r
- 7548      456E6162 \r
- 7548      6C6500\r
- 7549                  .LASF95:\r
- 7550 07e4 43795664            .ascii  "CyVdLvDigitEnable\000"\r
- 7550      4C764469 \r
- 7550      67697445 \r
- 7550      6E61626C \r
- 7550      6500\r
- 7551                  .LASF72:\r
- 7552 07f6 43795854            .ascii  "CyXTAL_Stop\000"\r
- 7552      414C5F53 \r
- 7552      746F7000 \r
- 7553                  .LASF133:\r
- 7554 0802 4379506D            .ascii  "CyPmFtwSetInterval\000"\r
- 7554      46747753 \r
- 7554      6574496E \r
- 7554      74657276 \r
- 7554      616C00\r
- 7555                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.o
deleted file mode 100755 (executable)
index 61d6a5b..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CyLib.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.lst
deleted file mode 100755 (executable)
index 0e416d9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.lst
+++ /dev/null
@@ -1,3235 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "CySpc.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CySpcStart,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global CySpcStart\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   CySpcStart, %function\r
-  24                   CySpcStart:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\CySpc.c"\r
-   1:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/CySpc.c **** * File Name: CySpc.c\r
-   3:.\Generated_Source\PSoC5/CySpc.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/CySpc.c **** *\r
-   5:.\Generated_Source\PSoC5/CySpc.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/CySpc.c **** *   Provides an API for the System Performance Component.\r
-   7:.\Generated_Source\PSoC5/CySpc.c **** *   The SPC functions are not meant to be called directly by the user\r
-   8:.\Generated_Source\PSoC5/CySpc.c **** *   application.\r
-   9:.\Generated_Source\PSoC5/CySpc.c **** *\r
-  10:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/CySpc.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/CySpc.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/CySpc.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/CySpc.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/CySpc.c **** \r
-  17:.\Generated_Source\PSoC5/CySpc.c **** #include "CySpc.h"\r
-  18:.\Generated_Source\PSoC5/CySpc.c **** \r
-  19:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_KEY_ONE                      (0xB6u)\r
-  20:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_KEY_TWO(x)                   ((uint8) (((uint16) 0xD3u) + ((uint16) (x))))\r
-  21:.\Generated_Source\PSoC5/CySpc.c **** \r
-  22:.\Generated_Source\PSoC5/CySpc.c **** /* Command Codes */\r
-  23:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_LD_BYTE                  (0x00u)\r
-  24:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_LD_MULTI_BYTE            (0x01u)\r
-  25:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_LD_ROW                   (0x02u)\r
-  26:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_RD_BYTE                  (0x03u)\r
-  27:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_RD_MULTI_BYTE            (0x04u)\r
-  28:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_WR_ROW                   (0x05u)\r
-  29:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_WR_USER_NVL              (0x06u)\r
-  30:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_PRG_ROW                  (0x07u)\r
-  31:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_ER_SECTOR                (0x08u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_ER_ALL                   (0x09u)\r
-  33:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_RD_HIDDEN                (0x0Au)\r
-  34:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_PRG_PROTECT              (0x0Bu)\r
-  35:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_CHECKSUM                 (0x0Cu)\r
-  36:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_DWNLD_ALGORITHM          (0x0Du)\r
-  37:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_GET_TEMP                 (0x0Eu)\r
-  38:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_GET_ADC                  (0x0Fu)\r
-  39:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_RD_NVL_VOLATILE          (0x10u)\r
-  40:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_SETUP_TS                 (0x11u)\r
-  41:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_DISABLE_TS               (0x12u)\r
-  42:.\Generated_Source\PSoC5/CySpc.c **** #define CY_SPC_CMD_ER_ROW                   (0x13u)\r
-  43:.\Generated_Source\PSoC5/CySpc.c **** \r
-  44:.\Generated_Source\PSoC5/CySpc.c **** /* Enable bit in Active and Alternate Active mode templates */\r
-  45:.\Generated_Source\PSoC5/CySpc.c **** #define PM_SPC_PM_EN                        (0x08u)\r
-  46:.\Generated_Source\PSoC5/CySpc.c **** \r
-  47:.\Generated_Source\PSoC5/CySpc.c **** /* Gate calls to the SPC. */\r
-  48:.\Generated_Source\PSoC5/CySpc.c **** uint8 SpcLockState = CY_SPC_UNLOCKED;\r
-  49:.\Generated_Source\PSoC5/CySpc.c **** \r
-  50:.\Generated_Source\PSoC5/CySpc.c **** \r
-  51:.\Generated_Source\PSoC5/CySpc.c **** #if(CY_PSOC5)\r
-  52:.\Generated_Source\PSoC5/CySpc.c **** \r
-  53:.\Generated_Source\PSoC5/CySpc.c ****     /***************************************************************************\r
-  54:.\Generated_Source\PSoC5/CySpc.c ****     * The wait-state pipeline must be enabled prior to accessing the SPC\r
-  55:.\Generated_Source\PSoC5/CySpc.c ****     * register interface regardless of CPU frequency. The CySpcLock() saves\r
-  56:.\Generated_Source\PSoC5/CySpc.c ****     * current wait-state pipeline state and enables it. The CySpcUnlock()\r
-  57:.\Generated_Source\PSoC5/CySpc.c ****     * function, which must be called after SPC transaction, restores original\r
-  58:.\Generated_Source\PSoC5/CySpc.c ****     * state.\r
-  59:.\Generated_Source\PSoC5/CySpc.c ****     ***************************************************************************/\r
-  60:.\Generated_Source\PSoC5/CySpc.c ****     static uint32 spcWaitPipeBypass = 0u;\r
-  61:.\Generated_Source\PSoC5/CySpc.c **** \r
-  62:.\Generated_Source\PSoC5/CySpc.c **** #endif  /* (CY_PSOC5) */\r
-  63:.\Generated_Source\PSoC5/CySpc.c **** \r
-  64:.\Generated_Source\PSoC5/CySpc.c **** \r
-  65:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
-  66:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcStart\r
-  67:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
-  68:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
-  69:.\Generated_Source\PSoC5/CySpc.c **** *  Starts the SPC.\r
-  70:.\Generated_Source\PSoC5/CySpc.c **** *\r
-  71:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
-  72:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
-  73:.\Generated_Source\PSoC5/CySpc.c **** *\r
-  74:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
-  75:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
-  76:.\Generated_Source\PSoC5/CySpc.c **** *\r
-  77:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
-  78:.\Generated_Source\PSoC5/CySpc.c **** void CySpcStart(void) \r
-  79:.\Generated_Source\PSoC5/CySpc.c **** {\r
-  27                           .loc 1 79 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31 0000 08B5                 push    {r3, lr}\r
-  32                   .LCFI0:\r
-  33                           .cfi_def_cfa_offset 8\r
-  34                           .cfi_offset 3, -8\r
-  35                           .cfi_offset 14, -4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 3\r
-\r
-\r
-  80:.\Generated_Source\PSoC5/CySpc.c ****     /* Save current global interrupt enable and disable it */\r
-  81:.\Generated_Source\PSoC5/CySpc.c ****     uint8 interruptState = CyEnterCriticalSection();\r
-  36                           .loc 1 81 0\r
-  37 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
-  38                   .LVL0:\r
-  82:.\Generated_Source\PSoC5/CySpc.c **** \r
-  83:.\Generated_Source\PSoC5/CySpc.c ****     CY_SPC_PM_ACT_REG  |= PM_SPC_PM_EN;\r
-  39                           .loc 1 83 0\r
-  40 0006 064B                 ldr     r3, .L2\r
-  41 0008 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  42 000a 42F00801             orr     r1, r2, #8\r
-  43 000e 1970                 strb    r1, [r3, #0]\r
-  84:.\Generated_Source\PSoC5/CySpc.c ****     CY_SPC_PM_STBY_REG |= PM_SPC_PM_EN;\r
-  44                           .loc 1 84 0\r
-  45 0010 1A7C                 ldrb    r2, [r3, #16]   @ zero_extendqisi2\r
-  46 0012 42F00801             orr     r1, r2, #8\r
-  47 0016 1974                 strb    r1, [r3, #16]\r
-  85:.\Generated_Source\PSoC5/CySpc.c **** \r
-  86:.\Generated_Source\PSoC5/CySpc.c ****     /* Restore global interrupt enable state */\r
-  87:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
-  88:.\Generated_Source\PSoC5/CySpc.c **** }\r
-  48                           .loc 1 88 0\r
-  49 0018 BDE80840             pop     {r3, lr}\r
-  87:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
-  50                           .loc 1 87 0\r
-  51 001c FFF7FEBF             b       CyExitCriticalSection\r
-  52                   .LVL1:\r
-  53                   .L3:\r
-  54                           .align  2\r
-  55                   .L2:\r
-  56 0020 A0430040             .word   1073759136\r
-  57                           .cfi_endproc\r
-  58                   .LFE0:\r
-  59                           .size   CySpcStart, .-CySpcStart\r
-  60                           .section        .text.CySpcStop,"ax",%progbits\r
-  61                           .align  1\r
-  62                           .global CySpcStop\r
-  63                           .thumb\r
-  64                           .thumb_func\r
-  65                           .type   CySpcStop, %function\r
-  66                   CySpcStop:\r
-  67                   .LFB1:\r
-  89:.\Generated_Source\PSoC5/CySpc.c **** \r
-  90:.\Generated_Source\PSoC5/CySpc.c **** \r
-  91:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
-  92:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcStop\r
-  93:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
-  94:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
-  95:.\Generated_Source\PSoC5/CySpc.c **** *  Stops the SPC.\r
-  96:.\Generated_Source\PSoC5/CySpc.c **** *\r
-  97:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
-  98:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
-  99:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 100:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 101:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
- 102:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 103:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 4\r
-\r
-\r
- 104:.\Generated_Source\PSoC5/CySpc.c **** void CySpcStop(void) \r
- 105:.\Generated_Source\PSoC5/CySpc.c **** {\r
-  68                           .loc 1 105 0\r
-  69                           .cfi_startproc\r
-  70                           @ args = 0, pretend = 0, frame = 0\r
-  71                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  72 0000 08B5                 push    {r3, lr}\r
-  73                   .LCFI1:\r
-  74                           .cfi_def_cfa_offset 8\r
-  75                           .cfi_offset 3, -8\r
-  76                           .cfi_offset 14, -4\r
- 106:.\Generated_Source\PSoC5/CySpc.c ****     /* Save current global interrupt enable and disable it */\r
- 107:.\Generated_Source\PSoC5/CySpc.c ****     uint8 interruptState = CyEnterCriticalSection();\r
-  77                           .loc 1 107 0\r
-  78 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
-  79                   .LVL2:\r
- 108:.\Generated_Source\PSoC5/CySpc.c **** \r
- 109:.\Generated_Source\PSoC5/CySpc.c ****     CY_SPC_PM_ACT_REG  &= ((uint8)(~PM_SPC_PM_EN));\r
-  80                           .loc 1 109 0\r
-  81 0006 064B                 ldr     r3, .L5\r
-  82 0008 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  83 000a 02F0F701             and     r1, r2, #247\r
-  84 000e 1970                 strb    r1, [r3, #0]\r
- 110:.\Generated_Source\PSoC5/CySpc.c ****     CY_SPC_PM_STBY_REG &= ((uint8)(~PM_SPC_PM_EN));\r
-  85                           .loc 1 110 0\r
-  86 0010 1A7C                 ldrb    r2, [r3, #16]   @ zero_extendqisi2\r
-  87 0012 02F0F701             and     r1, r2, #247\r
-  88 0016 1974                 strb    r1, [r3, #16]\r
- 111:.\Generated_Source\PSoC5/CySpc.c **** \r
- 112:.\Generated_Source\PSoC5/CySpc.c ****     /* Restore global interrupt enable state */\r
- 113:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
- 114:.\Generated_Source\PSoC5/CySpc.c **** }\r
-  89                           .loc 1 114 0\r
-  90 0018 BDE80840             pop     {r3, lr}\r
- 113:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
-  91                           .loc 1 113 0\r
-  92 001c FFF7FEBF             b       CyExitCriticalSection\r
-  93                   .LVL3:\r
-  94                   .L6:\r
-  95                           .align  2\r
-  96                   .L5:\r
-  97 0020 A0430040             .word   1073759136\r
-  98                           .cfi_endproc\r
-  99                   .LFE1:\r
- 100                           .size   CySpcStop, .-CySpcStop\r
- 101                           .section        .text.CySpcReadData,"ax",%progbits\r
- 102                           .align  1\r
- 103                           .global CySpcReadData\r
- 104                           .thumb\r
- 105                           .thumb_func\r
- 106                           .type   CySpcReadData, %function\r
- 107                   CySpcReadData:\r
- 108                   .LFB2:\r
- 115:.\Generated_Source\PSoC5/CySpc.c **** \r
- 116:.\Generated_Source\PSoC5/CySpc.c **** \r
- 117:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 118:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcReadData\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 5\r
-\r
-\r
- 119:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 120:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 121:.\Generated_Source\PSoC5/CySpc.c **** *  Reads data from the SPC.\r
- 122:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 123:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 124:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 buffer:\r
- 125:.\Generated_Source\PSoC5/CySpc.c **** *   Address to store data read.\r
- 126:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 127:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 size:\r
- 128:.\Generated_Source\PSoC5/CySpc.c **** *   Number of bytes to read from the SPC.\r
- 129:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 130:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 131:.\Generated_Source\PSoC5/CySpc.c **** *  uint8:\r
- 132:.\Generated_Source\PSoC5/CySpc.c **** *   The number of bytes read from the SPC.\r
- 133:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 134:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 135:.\Generated_Source\PSoC5/CySpc.c **** uint8 CySpcReadData(uint8 buffer[], uint8 size) \r
- 136:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 109                           .loc 1 136 0\r
- 110                           .cfi_startproc\r
- 111                           @ args = 0, pretend = 0, frame = 0\r
- 112                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 113                   .LVL4:\r
- 114 0000 70B5                 push    {r4, r5, r6, lr}\r
- 115                   .LCFI2:\r
- 116                           .cfi_def_cfa_offset 16\r
- 117                           .cfi_offset 4, -16\r
- 118                           .cfi_offset 5, -12\r
- 119                           .cfi_offset 6, -8\r
- 120                           .cfi_offset 14, -4\r
- 121                           .loc 1 136 0\r
- 122 0002 0646                 mov     r6, r0\r
- 123 0004 0D46                 mov     r5, r1\r
- 137:.\Generated_Source\PSoC5/CySpc.c ****     uint8 i;\r
- 138:.\Generated_Source\PSoC5/CySpc.c **** \r
- 139:.\Generated_Source\PSoC5/CySpc.c ****     for(i = 0u; i < size; i++)\r
- 124                           .loc 1 139 0\r
- 125 0006 0024                 movs    r4, #0\r
- 126                   .LVL5:\r
- 127                   .L8:\r
- 128                           .loc 1 139 0 is_stmt 0 discriminator 1\r
- 129 0008 E3B2                 uxtb    r3, r4\r
- 130 000a AB42                 cmp     r3, r5\r
- 131 000c 0CD2                 bcs     .L13\r
- 132                   .L11:\r
- 140:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 141:.\Generated_Source\PSoC5/CySpc.c ****         while(!CY_SPC_DATA_READY)\r
- 133                           .loc 1 141 0 is_stmt 1 discriminator 1\r
- 134 000e 0748                 ldr     r0, .L15\r
- 135 0010 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 136 0012 CB07                 lsls    r3, r1, #31\r
- 137 0014 03D4                 bmi     .L14\r
- 138                   .L9:\r
- 142:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 143:.\Generated_Source\PSoC5/CySpc.c ****             CyDelayUs(1u);\r
- 139                           .loc 1 143 0\r
- 140 0016 0120                 movs    r0, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 6\r
-\r
-\r
- 141 0018 FFF7FEFF             bl      CyDelayUs\r
- 142                   .LVL6:\r
- 143 001c F7E7                 b       .L11\r
- 144                   .L14:\r
- 144:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 145:.\Generated_Source\PSoC5/CySpc.c ****         buffer[i] = CY_SPC_CPU_DATA_REG;\r
- 145                           .loc 1 145 0\r
- 146 001e 044A                 ldr     r2, .L15+4\r
- 147 0020 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 148 0022 3355                 strb    r3, [r6, r4]\r
- 149 0024 0134                 adds    r4, r4, #1\r
- 150 0026 EFE7                 b       .L8\r
- 151                   .L13:\r
- 146:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 147:.\Generated_Source\PSoC5/CySpc.c **** \r
- 148:.\Generated_Source\PSoC5/CySpc.c ****     return(i);\r
- 149:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 152                           .loc 1 149 0\r
- 153 0028 2846                 mov     r0, r5\r
- 154 002a 70BD                 pop     {r4, r5, r6, pc}\r
- 155                   .L16:\r
- 156                           .align  2\r
- 157                   .L15:\r
- 158 002c 22470040             .word   1073760034\r
- 159 0030 20470040             .word   1073760032\r
- 160                           .cfi_endproc\r
- 161                   .LFE2:\r
- 162                           .size   CySpcReadData, .-CySpcReadData\r
- 163                           .section        .text.CySpcLoadMultiByte,"ax",%progbits\r
- 164                           .align  1\r
- 165                           .global CySpcLoadMultiByte\r
- 166                           .thumb\r
- 167                           .thumb_func\r
- 168                           .type   CySpcLoadMultiByte, %function\r
- 169                   CySpcLoadMultiByte:\r
- 170                   .LFB3:\r
- 150:.\Generated_Source\PSoC5/CySpc.c **** \r
- 151:.\Generated_Source\PSoC5/CySpc.c **** \r
- 152:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 153:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcLoadMultiByte\r
- 154:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 155:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 156:.\Generated_Source\PSoC5/CySpc.c **** *  Loads 1 to 32 bytes of data into the row latch of a Flash/EEPROM array.\r
- 157:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 158:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 159:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 array:\r
- 160:.\Generated_Source\PSoC5/CySpc.c **** *   Id of the array.\r
- 161:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 162:.\Generated_Source\PSoC5/CySpc.c **** *  uint16 address:\r
- 163:.\Generated_Source\PSoC5/CySpc.c **** *   Flash/eeprom addrress\r
- 164:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 165:.\Generated_Source\PSoC5/CySpc.c **** *  uint8* buffer:\r
- 166:.\Generated_Source\PSoC5/CySpc.c **** *   Data to load to the row latch\r
- 167:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 168:.\Generated_Source\PSoC5/CySpc.c **** *  uint16 number:\r
- 169:.\Generated_Source\PSoC5/CySpc.c **** *   Number bytes to load.\r
- 170:.\Generated_Source\PSoC5/CySpc.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 7\r
-\r
-\r
- 171:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 172:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_STARTED\r
- 173:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_CANCELED\r
- 174:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED\r
- 175:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_BAD_PARAM\r
- 176:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 177:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 178:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], uint8 size)\\r
- 179:.\Generated_Source\PSoC5/CySpc.c **** \r
- 180:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 171                           .loc 1 180 0\r
- 172                           .cfi_startproc\r
- 173                           @ args = 0, pretend = 0, frame = 0\r
- 174                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 175                   .LVL7:\r
- 181:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 182:.\Generated_Source\PSoC5/CySpc.c ****     uint8 i;\r
- 183:.\Generated_Source\PSoC5/CySpc.c **** \r
- 184:.\Generated_Source\PSoC5/CySpc.c ****     /***************************************************************************\r
- 185:.\Generated_Source\PSoC5/CySpc.c ****     * Check if number is correct for array. Number must be less than\r
- 186:.\Generated_Source\PSoC5/CySpc.c ****     * 32 for Flash or less than 16 for EEPROM.\r
- 187:.\Generated_Source\PSoC5/CySpc.c ****     ***************************************************************************/\r
- 188:.\Generated_Source\PSoC5/CySpc.c ****     if(((array < CY_SPC_LAST_FLASH_ARRAYID) && (size < 32u)) ||\r
- 176                           .loc 1 188 0\r
- 177 0000 3E28                 cmp     r0, #62\r
- 180:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 178                           .loc 1 180 0\r
- 179 0002 70B5                 push    {r4, r5, r6, lr}\r
- 180                   .LCFI3:\r
- 181                           .cfi_def_cfa_offset 16\r
- 182                           .cfi_offset 4, -16\r
- 183                           .cfi_offset 5, -12\r
- 184                           .cfi_offset 6, -8\r
- 185                           .cfi_offset 14, -4\r
- 186                           .loc 1 188 0\r
- 187 0004 01D8                 bhi     .L18\r
- 188                           .loc 1 188 0 is_stmt 0 discriminator 1\r
- 189 0006 1F2B                 cmp     r3, #31\r
- 190 0008 02E0                 b       .L28\r
- 191                   .L18:\r
- 192                           .loc 1 188 0 discriminator 2\r
- 193 000a 3F28                 cmp     r0, #63\r
- 194 000c 27D0                 beq     .L24\r
- 189:.\Generated_Source\PSoC5/CySpc.c ****        ((array > CY_SPC_LAST_FLASH_ARRAYID) && (size < 16u)))\r
- 195                           .loc 1 189 0 is_stmt 1\r
- 196 000e 0F2B                 cmp     r3, #15\r
- 197                   .L28:\r
- 198 0010 25D8                 bhi     .L24\r
- 190:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 191:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_IDLE)\r
- 199                           .loc 1 191 0\r
- 200 0012 164D                 ldr     r5, .L30\r
- 201 0014 2C78                 ldrb    r4, [r5, #0]    @ zero_extendqisi2\r
- 202 0016 04F00204             and     r4, r4, #2\r
- 203 001a E4B2                 uxtb    r4, r4\r
- 204 001c 0CB3                 cbz     r4, .L25\r
- 192:.\Generated_Source\PSoC5/CySpc.c ****         {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 8\r
-\r
-\r
- 193:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
- 205                           .loc 1 193 0\r
- 206 001e 144C                 ldr     r4, .L30+4\r
- 207 0020 B626                 movs    r6, #182\r
- 208 0022 2670                 strb    r6, [r4, #0]\r
- 194:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_MULTI_BYTE);\r
- 209                           .loc 1 194 0\r
- 210 0024 D426                 movs    r6, #212\r
- 211 0026 2670                 strb    r6, [r4, #0]\r
- 195:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_MULTI_BYTE;\r
- 212                           .loc 1 195 0\r
- 213 0028 0126                 movs    r6, #1\r
- 214 002a 2670                 strb    r6, [r4, #0]\r
- 196:.\Generated_Source\PSoC5/CySpc.c **** \r
- 197:.\Generated_Source\PSoC5/CySpc.c ****             if(CY_SPC_BUSY)\r
- 215                           .loc 1 197 0\r
- 216 002c 2D78                 ldrb    r5, [r5, #0]    @ zero_extendqisi2\r
- 217 002e 05F00205             and     r5, r5, #2\r
- 218 0032 EDB2                 uxtb    r5, r5\r
- 219 0034 BDB9                 cbnz    r5, .L26\r
- 198:.\Generated_Source\PSoC5/CySpc.c ****             {\r
- 199:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = array;\r
- 220                           .loc 1 199 0\r
- 221 0036 2070                 strb    r0, [r4, #0]\r
- 200:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = 1u & HI8(address);\r
- 222                           .loc 1 200 0\r
- 223 0038 C1F30020             ubfx    r0, r1, #8, #1\r
- 224                   .LVL8:\r
- 225 003c 2070                 strb    r0, [r4, #0]\r
- 201:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = LO8(address);\r
- 226                           .loc 1 201 0\r
- 227 003e C9B2                 uxtb    r1, r1\r
- 228                   .LVL9:\r
- 202:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = ((uint8)(size - 1u));\r
- 229                           .loc 1 202 0\r
- 230 0040 581E                 subs    r0, r3, #1\r
- 201:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = LO8(address);\r
- 231                           .loc 1 201 0\r
- 232 0042 2170                 strb    r1, [r4, #0]\r
- 233                           .loc 1 202 0\r
- 234 0044 C1B2                 uxtb    r1, r0\r
- 235 0046 2170                 strb    r1, [r4, #0]\r
- 236                   .LVL10:\r
- 203:.\Generated_Source\PSoC5/CySpc.c **** \r
- 204:.\Generated_Source\PSoC5/CySpc.c ****                 for(i = 0u; i < size; i++)\r
- 237                           .loc 1 204 0\r
- 238 0048 2946                 mov     r1, r5\r
- 239                   .LVL11:\r
- 240                   .L21:\r
- 241                           .loc 1 204 0 is_stmt 0 discriminator 1\r
- 242 004a C8B2                 uxtb    r0, r1\r
- 243 004c 9842                 cmp     r0, r3\r
- 244 004e 04D2                 bcs     .L29\r
- 245                   .L22:\r
- 205:.\Generated_Source\PSoC5/CySpc.c ****                 {\r
- 206:.\Generated_Source\PSoC5/CySpc.c ****                     CY_SPC_CPU_DATA_REG = buffer[i];\r
- 246                           .loc 1 206 0 is_stmt 1 discriminator 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 9\r
-\r
-\r
- 247 0050 545C                 ldrb    r4, [r2, r1]    @ zero_extendqisi2\r
- 248 0052 0748                 ldr     r0, .L30+4\r
- 249                   .LVL12:\r
- 250 0054 0131                 adds    r1, r1, #1\r
- 251 0056 0470                 strb    r4, [r0, #0]\r
- 252 0058 F7E7                 b       .L21\r
- 253                   .LVL13:\r
- 254                   .L29:\r
- 181:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 255                           .loc 1 181 0\r
- 256 005a 0720                 movs    r0, #7\r
- 257 005c 70BD                 pop     {r4, r5, r6, pc}\r
- 258                   .LVL14:\r
- 259                   .L24:\r
- 207:.\Generated_Source\PSoC5/CySpc.c ****                 }\r
- 208:.\Generated_Source\PSoC5/CySpc.c ****             }\r
- 209:.\Generated_Source\PSoC5/CySpc.c ****             else\r
- 210:.\Generated_Source\PSoC5/CySpc.c ****             {\r
- 211:.\Generated_Source\PSoC5/CySpc.c ****                 status = CYRET_CANCELED;\r
- 212:.\Generated_Source\PSoC5/CySpc.c ****             }\r
- 213:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 214:.\Generated_Source\PSoC5/CySpc.c ****         else\r
- 215:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 216:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_LOCKED;\r
- 217:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 218:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 219:.\Generated_Source\PSoC5/CySpc.c ****     else\r
- 220:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 221:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_BAD_PARAM;\r
- 260                           .loc 1 221 0\r
- 261 005e 0120                 movs    r0, #1\r
- 262                   .LVL15:\r
- 263 0060 70BD                 pop     {r4, r5, r6, pc}\r
- 264                   .LVL16:\r
- 265                   .L25:\r
- 216:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_LOCKED;\r
- 266                           .loc 1 216 0\r
- 267 0062 0420                 movs    r0, #4\r
- 268                   .LVL17:\r
- 269 0064 70BD                 pop     {r4, r5, r6, pc}\r
- 270                   .LVL18:\r
- 271                   .L26:\r
- 211:.\Generated_Source\PSoC5/CySpc.c ****                 status = CYRET_CANCELED;\r
- 272                           .loc 1 211 0\r
- 273 0066 0920                 movs    r0, #9\r
- 274                   .LVL19:\r
- 222:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 223:.\Generated_Source\PSoC5/CySpc.c **** \r
- 224:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 225:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 275                           .loc 1 225 0\r
- 276 0068 70BD                 pop     {r4, r5, r6, pc}\r
- 277                   .L31:\r
- 278 006a 00BF                 .align  2\r
- 279                   .L30:\r
- 280 006c 22470040             .word   1073760034\r
- 281 0070 20470040             .word   1073760032\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 10\r
-\r
-\r
- 282                           .cfi_endproc\r
- 283                   .LFE3:\r
- 284                           .size   CySpcLoadMultiByte, .-CySpcLoadMultiByte\r
- 285                           .section        .text.CySpcLoadRow,"ax",%progbits\r
- 286                           .align  1\r
- 287                           .global CySpcLoadRow\r
- 288                           .thumb\r
- 289                           .thumb_func\r
- 290                           .type   CySpcLoadRow, %function\r
- 291                   CySpcLoadRow:\r
- 292                   .LFB4:\r
- 226:.\Generated_Source\PSoC5/CySpc.c **** \r
- 227:.\Generated_Source\PSoC5/CySpc.c **** \r
- 228:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 229:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcLoadRow\r
- 230:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 231:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 232:.\Generated_Source\PSoC5/CySpc.c **** *  Loads a row of data into the row latch of a Flash/EEPROM array.\r
- 233:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 234:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 235:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 array:\r
- 236:.\Generated_Source\PSoC5/CySpc.c **** *   Id of the array.\r
- 237:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 238:.\Generated_Source\PSoC5/CySpc.c **** *  uint8* buffer:\r
- 239:.\Generated_Source\PSoC5/CySpc.c **** *   Data to be loaded to the row latch\r
- 240:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 241:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 size:\r
- 242:.\Generated_Source\PSoC5/CySpc.c **** *   The number of data bytes that the SPC expects to be written. Depends on the\r
- 243:.\Generated_Source\PSoC5/CySpc.c **** *   type of the array and, if the array is Flash, whether ECC is being enabled\r
- 244:.\Generated_Source\PSoC5/CySpc.c **** *   or not. There are following values: flash row latch size with ECC enabled,\r
- 245:.\Generated_Source\PSoC5/CySpc.c **** *   flash row latch size with ECC disabled and EEPROM row latch size.\r
- 246:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 247:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 248:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_STARTED\r
- 249:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_CANCELED\r
- 250:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED\r
- 251:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 252:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 253:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size)\r
- 254:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 293                           .loc 1 254 0\r
- 294                           .cfi_startproc\r
- 295                           @ args = 0, pretend = 0, frame = 0\r
- 296                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 297                   .LVL20:\r
- 298 0000 30B5                 push    {r4, r5, lr}\r
- 299                   .LCFI4:\r
- 300                           .cfi_def_cfa_offset 12\r
- 301                           .cfi_offset 4, -12\r
- 302                           .cfi_offset 5, -8\r
- 303                           .cfi_offset 14, -4\r
- 255:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 256:.\Generated_Source\PSoC5/CySpc.c ****     uint16 i;\r
- 257:.\Generated_Source\PSoC5/CySpc.c **** \r
- 258:.\Generated_Source\PSoC5/CySpc.c ****     /* Make sure the SPC is ready to accept command */\r
- 259:.\Generated_Source\PSoC5/CySpc.c ****     if(CY_SPC_IDLE)\r
- 304                           .loc 1 259 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 11\r
-\r
-\r
- 305 0002 104B                 ldr     r3, .L39\r
- 306 0004 1C78                 ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 307 0006 04F00204             and     r4, r4, #2\r
- 308 000a E4B2                 uxtb    r4, r4\r
- 309 000c ACB1                 cbz     r4, .L36\r
- 260:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 261:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
- 310                           .loc 1 261 0\r
- 311 000e 0E4C                 ldr     r4, .L39+4\r
- 312 0010 B625                 movs    r5, #182\r
- 313 0012 2570                 strb    r5, [r4, #0]\r
- 262:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_ROW);\r
- 314                           .loc 1 262 0\r
- 315 0014 D525                 movs    r5, #213\r
- 316 0016 2570                 strb    r5, [r4, #0]\r
- 263:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_ROW;\r
- 317                           .loc 1 263 0\r
- 318 0018 0225                 movs    r5, #2\r
- 319 001a 2570                 strb    r5, [r4, #0]\r
- 264:.\Generated_Source\PSoC5/CySpc.c **** \r
- 265:.\Generated_Source\PSoC5/CySpc.c ****         /* Make sure the command was accepted */\r
- 266:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_BUSY)\r
- 320                           .loc 1 266 0\r
- 321 001c 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 322 001e 2B40                 ands    r3, r3, r5\r
- 323 0020 DBB2                 uxtb    r3, r3\r
- 324 0022 63B9                 cbnz    r3, .L37\r
- 267:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 268:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = array;\r
- 325                           .loc 1 268 0\r
- 326 0024 2070                 strb    r0, [r4, #0]\r
- 327                   .LVL21:\r
- 328                   .L34:\r
- 269:.\Generated_Source\PSoC5/CySpc.c **** \r
- 270:.\Generated_Source\PSoC5/CySpc.c ****             for(i = 0u; i < size; i++)\r
- 329                           .loc 1 270 0 discriminator 1\r
- 330 0026 98B2                 uxth    r0, r3\r
- 331 0028 9042                 cmp     r0, r2\r
- 332 002a 04D2                 bcs     .L38\r
- 333                   .L35:\r
- 271:.\Generated_Source\PSoC5/CySpc.c ****             {\r
- 272:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_DATA_REG = buffer[i];\r
- 334                           .loc 1 272 0 discriminator 2\r
- 335 002c CC5C                 ldrb    r4, [r1, r3]    @ zero_extendqisi2\r
- 336 002e 0648                 ldr     r0, .L39+4\r
- 337                   .LVL22:\r
- 338 0030 0133                 adds    r3, r3, #1\r
- 339 0032 0470                 strb    r4, [r0, #0]\r
- 340 0034 F7E7                 b       .L34\r
- 341                   .LVL23:\r
- 342                   .L38:\r
- 255:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 343                           .loc 1 255 0\r
- 344 0036 0720                 movs    r0, #7\r
- 345 0038 30BD                 pop     {r4, r5, pc}\r
- 346                   .LVL24:\r
- 347                   .L36:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 12\r
-\r
-\r
- 273:.\Generated_Source\PSoC5/CySpc.c ****             }\r
- 274:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 275:.\Generated_Source\PSoC5/CySpc.c ****         else\r
- 276:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 277:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 278:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 279:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 280:.\Generated_Source\PSoC5/CySpc.c ****     else\r
- 281:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 282:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_LOCKED;\r
- 348                           .loc 1 282 0\r
- 349 003a 0420                 movs    r0, #4\r
- 350                   .LVL25:\r
- 351 003c 30BD                 pop     {r4, r5, pc}\r
- 352                   .LVL26:\r
- 353                   .L37:\r
- 277:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 354                           .loc 1 277 0\r
- 355 003e 0920                 movs    r0, #9\r
- 356                   .LVL27:\r
- 283:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 284:.\Generated_Source\PSoC5/CySpc.c **** \r
- 285:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 286:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 357                           .loc 1 286 0\r
- 358 0040 30BD                 pop     {r4, r5, pc}\r
- 359                   .L40:\r
- 360 0042 00BF                 .align  2\r
- 361                   .L39:\r
- 362 0044 22470040             .word   1073760034\r
- 363 0048 20470040             .word   1073760032\r
- 364                           .cfi_endproc\r
- 365                   .LFE4:\r
- 366                           .size   CySpcLoadRow, .-CySpcLoadRow\r
- 367                           .section        .text.CySpcWriteRow,"ax",%progbits\r
- 368                           .align  1\r
- 369                           .global CySpcWriteRow\r
- 370                           .thumb\r
- 371                           .thumb_func\r
- 372                           .type   CySpcWriteRow, %function\r
- 373                   CySpcWriteRow:\r
- 374                   .LFB5:\r
- 287:.\Generated_Source\PSoC5/CySpc.c **** \r
- 288:.\Generated_Source\PSoC5/CySpc.c **** \r
- 289:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 290:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcWriteRow\r
- 291:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 292:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 293:.\Generated_Source\PSoC5/CySpc.c **** *  Erases then programs a row in Flash/EEPROM with data in row latch.\r
- 294:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 295:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 296:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 array:\r
- 297:.\Generated_Source\PSoC5/CySpc.c **** *   Id of the array.\r
- 298:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 299:.\Generated_Source\PSoC5/CySpc.c **** *  uint16 address:\r
- 300:.\Generated_Source\PSoC5/CySpc.c **** *   flash/eeprom addrress\r
- 301:.\Generated_Source\PSoC5/CySpc.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 13\r
-\r
-\r
- 302:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 tempPolarity:\r
- 303:.\Generated_Source\PSoC5/CySpc.c **** *   temperature polarity.\r
- 304:.\Generated_Source\PSoC5/CySpc.c **** *   1: the Temp Magnitude is interpreted as a positive value\r
- 305:.\Generated_Source\PSoC5/CySpc.c **** *   0: the Temp Magnitude is interpreted as a negative value\r
- 306:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 307:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 tempMagnitude:\r
- 308:.\Generated_Source\PSoC5/CySpc.c **** *   temperature magnitude.\r
- 309:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 310:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 311:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_STARTED\r
- 312:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_CANCELED\r
- 313:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED\r
- 314:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 315:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 316:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcWriteRow(uint8 array, uint16 address, uint8 tempPolarity, uint8 tempMagnitude)\\r
- 317:.\Generated_Source\PSoC5/CySpc.c **** \r
- 318:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 375                           .loc 1 318 0\r
- 376                           .cfi_startproc\r
- 377                           @ args = 0, pretend = 0, frame = 0\r
- 378                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 379                   .LVL28:\r
- 380 0000 70B5                 push    {r4, r5, r6, lr}\r
- 381                   .LCFI5:\r
- 382                           .cfi_def_cfa_offset 16\r
- 383                           .cfi_offset 4, -16\r
- 384                           .cfi_offset 5, -12\r
- 385                           .cfi_offset 6, -8\r
- 386                           .cfi_offset 14, -4\r
- 319:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 320:.\Generated_Source\PSoC5/CySpc.c **** \r
- 321:.\Generated_Source\PSoC5/CySpc.c ****     /* Make sure the SPC is ready to accept command */\r
- 322:.\Generated_Source\PSoC5/CySpc.c ****     if(CY_SPC_IDLE)\r
- 387                           .loc 1 322 0\r
- 388 0002 0F4D                 ldr     r5, .L45\r
- 389 0004 2C78                 ldrb    r4, [r5, #0]    @ zero_extendqisi2\r
- 390 0006 04F00204             and     r4, r4, #2\r
- 391 000a E4B2                 uxtb    r4, r4\r
- 392 000c A4B1                 cbz     r4, .L43\r
- 323:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 324:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
- 393                           .loc 1 324 0\r
- 394 000e 0D4C                 ldr     r4, .L45+4\r
- 395 0010 B626                 movs    r6, #182\r
- 396 0012 2670                 strb    r6, [r4, #0]\r
- 325:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_WR_ROW);\r
- 397                           .loc 1 325 0\r
- 398 0014 D826                 movs    r6, #216\r
- 399 0016 2670                 strb    r6, [r4, #0]\r
- 326:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_CMD_WR_ROW;\r
- 400                           .loc 1 326 0\r
- 401 0018 0526                 movs    r6, #5\r
- 402 001a 2670                 strb    r6, [r4, #0]\r
- 327:.\Generated_Source\PSoC5/CySpc.c **** \r
- 328:.\Generated_Source\PSoC5/CySpc.c ****         /* Make sure the command was accepted */\r
- 329:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_BUSY)\r
- 403                           .loc 1 329 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 14\r
-\r
-\r
- 404 001c 2D78                 ldrb    r5, [r5, #0]    @ zero_extendqisi2\r
- 405 001e 05F00205             and     r5, r5, #2\r
- 406 0022 EDB2                 uxtb    r5, r5\r
- 407 0024 55B9                 cbnz    r5, .L44\r
- 330:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 331:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = array;\r
- 408                           .loc 1 331 0\r
- 409 0026 2070                 strb    r0, [r4, #0]\r
- 332:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = HI8(address);\r
- 410                           .loc 1 332 0\r
- 411 0028 080A                 lsrs    r0, r1, #8\r
- 412                   .LVL29:\r
- 333:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = LO8(address);\r
- 413                           .loc 1 333 0\r
- 414 002a C9B2                 uxtb    r1, r1\r
- 415                   .LVL30:\r
- 332:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = HI8(address);\r
- 416                           .loc 1 332 0\r
- 417 002c 2070                 strb    r0, [r4, #0]\r
- 418                           .loc 1 333 0\r
- 419 002e 2170                 strb    r1, [r4, #0]\r
- 319:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 420                           .loc 1 319 0\r
- 421 0030 0720                 movs    r0, #7\r
- 334:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = tempPolarity;\r
- 422                           .loc 1 334 0\r
- 423 0032 2270                 strb    r2, [r4, #0]\r
- 335:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = tempMagnitude;\r
- 424                           .loc 1 335 0\r
- 425 0034 2370                 strb    r3, [r4, #0]\r
- 426 0036 70BD                 pop     {r4, r5, r6, pc}\r
- 427                   .LVL31:\r
- 428                   .L43:\r
- 336:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 337:.\Generated_Source\PSoC5/CySpc.c ****         else\r
- 338:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 339:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 340:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 341:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 342:.\Generated_Source\PSoC5/CySpc.c ****     else\r
- 343:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 344:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_LOCKED;\r
- 429                           .loc 1 344 0\r
- 430 0038 0420                 movs    r0, #4\r
- 431                   .LVL32:\r
- 432 003a 70BD                 pop     {r4, r5, r6, pc}\r
- 433                   .LVL33:\r
- 434                   .L44:\r
- 339:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 435                           .loc 1 339 0\r
- 436 003c 0920                 movs    r0, #9\r
- 437                   .LVL34:\r
- 345:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 346:.\Generated_Source\PSoC5/CySpc.c **** \r
- 347:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 348:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 438                           .loc 1 348 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 15\r
-\r
-\r
- 439 003e 70BD                 pop     {r4, r5, r6, pc}\r
- 440                   .L46:\r
- 441                           .align  2\r
- 442                   .L45:\r
- 443 0040 22470040             .word   1073760034\r
- 444 0044 20470040             .word   1073760032\r
- 445                           .cfi_endproc\r
- 446                   .LFE5:\r
- 447                           .size   CySpcWriteRow, .-CySpcWriteRow\r
- 448                           .section        .text.CySpcEraseSector,"ax",%progbits\r
- 449                           .align  1\r
- 450                           .global CySpcEraseSector\r
- 451                           .thumb\r
- 452                           .thumb_func\r
- 453                           .type   CySpcEraseSector, %function\r
- 454                   CySpcEraseSector:\r
- 455                   .LFB6:\r
- 349:.\Generated_Source\PSoC5/CySpc.c **** \r
- 350:.\Generated_Source\PSoC5/CySpc.c **** \r
- 351:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 352:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcEraseSector\r
- 353:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 354:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 355:.\Generated_Source\PSoC5/CySpc.c **** *  Erases all data in the addressed sector (block of 64 rows).\r
- 356:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 357:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 358:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 array:\r
- 359:.\Generated_Source\PSoC5/CySpc.c **** *   Id of the array.\r
- 360:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 361:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 sectorNumber:\r
- 362:.\Generated_Source\PSoC5/CySpc.c **** *   Zero based sector number within Flash/EEPROM array\r
- 363:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 364:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 365:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_STARTED\r
- 366:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_CANCELED\r
- 367:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED\r
- 368:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 369:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 370:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcEraseSector(uint8 array, uint8 sectorNumber)\r
- 371:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 456                           .loc 1 371 0\r
- 457                           .cfi_startproc\r
- 458                           @ args = 0, pretend = 0, frame = 0\r
- 459                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 460                   .LVL35:\r
- 461 0000 10B5                 push    {r4, lr}\r
- 462                   .LCFI6:\r
- 463                           .cfi_def_cfa_offset 8\r
- 464                           .cfi_offset 4, -8\r
- 465                           .cfi_offset 14, -4\r
- 372:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 373:.\Generated_Source\PSoC5/CySpc.c **** \r
- 374:.\Generated_Source\PSoC5/CySpc.c ****     /* Make sure the SPC is ready to accept command */\r
- 375:.\Generated_Source\PSoC5/CySpc.c ****     if(CY_SPC_IDLE)\r
- 466                           .loc 1 375 0\r
- 467 0002 0D4A                 ldr     r2, .L51\r
- 468 0004 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 16\r
-\r
-\r
- 469 0006 03F00203             and     r3, r3, #2\r
- 470 000a DBB2                 uxtb    r3, r3\r
- 471 000c 7BB1                 cbz     r3, .L49\r
- 376:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 377:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
- 472                           .loc 1 377 0\r
- 473 000e 0B4B                 ldr     r3, .L51+4\r
- 474 0010 B624                 movs    r4, #182\r
- 475 0012 1C70                 strb    r4, [r3, #0]\r
- 378:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_ER_SECTOR);\r
- 476                           .loc 1 378 0\r
- 477 0014 DB24                 movs    r4, #219\r
- 478 0016 1C70                 strb    r4, [r3, #0]\r
- 379:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_CMD_ER_SECTOR;\r
- 479                           .loc 1 379 0\r
- 480 0018 0824                 movs    r4, #8\r
- 481 001a 1C70                 strb    r4, [r3, #0]\r
- 380:.\Generated_Source\PSoC5/CySpc.c **** \r
- 381:.\Generated_Source\PSoC5/CySpc.c ****         /* Make sure the command was accepted */\r
- 382:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_BUSY)\r
- 482                           .loc 1 382 0\r
- 483 001c 1278                 ldrb    r2, [r2, #0]    @ zero_extendqisi2\r
- 484 001e 02F00202             and     r2, r2, #2\r
- 485 0022 D2B2                 uxtb    r2, r2\r
- 486 0024 2AB9                 cbnz    r2, .L50\r
- 383:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 384:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = array;\r
- 487                           .loc 1 384 0\r
- 488 0026 1870                 strb    r0, [r3, #0]\r
- 385:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = sectorNumber;\r
- 489                           .loc 1 385 0\r
- 490 0028 1970                 strb    r1, [r3, #0]\r
- 372:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 491                           .loc 1 372 0\r
- 492 002a 0720                 movs    r0, #7\r
- 493                   .LVL36:\r
- 494 002c 10BD                 pop     {r4, pc}\r
- 495                   .LVL37:\r
- 496                   .L49:\r
- 386:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 387:.\Generated_Source\PSoC5/CySpc.c ****         else\r
- 388:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 389:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 390:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 391:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 392:.\Generated_Source\PSoC5/CySpc.c ****     else\r
- 393:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 394:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_LOCKED;\r
- 497                           .loc 1 394 0\r
- 498 002e 0420                 movs    r0, #4\r
- 499                   .LVL38:\r
- 500 0030 10BD                 pop     {r4, pc}\r
- 501                   .LVL39:\r
- 502                   .L50:\r
- 389:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 503                           .loc 1 389 0\r
- 504 0032 0920                 movs    r0, #9\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 17\r
-\r
-\r
- 505                   .LVL40:\r
- 395:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 396:.\Generated_Source\PSoC5/CySpc.c **** \r
- 397:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 398:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 506                           .loc 1 398 0\r
- 507 0034 10BD                 pop     {r4, pc}\r
- 508                   .L52:\r
- 509 0036 00BF                 .align  2\r
- 510                   .L51:\r
- 511 0038 22470040             .word   1073760034\r
- 512 003c 20470040             .word   1073760032\r
- 513                           .cfi_endproc\r
- 514                   .LFE6:\r
- 515                           .size   CySpcEraseSector, .-CySpcEraseSector\r
- 516                           .section        .text.CySpcGetTemp,"ax",%progbits\r
- 517                           .align  1\r
- 518                           .global CySpcGetTemp\r
- 519                           .thumb\r
- 520                           .thumb_func\r
- 521                           .type   CySpcGetTemp, %function\r
- 522                   CySpcGetTemp:\r
- 523                   .LFB7:\r
- 399:.\Generated_Source\PSoC5/CySpc.c **** \r
- 400:.\Generated_Source\PSoC5/CySpc.c **** \r
- 401:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 402:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcGetTemp\r
- 403:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 404:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 405:.\Generated_Source\PSoC5/CySpc.c **** *  Returns the internal die temperature\r
- 406:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 407:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 408:.\Generated_Source\PSoC5/CySpc.c **** *  uint8 numSamples:\r
- 409:.\Generated_Source\PSoC5/CySpc.c **** *   Number of samples. Valid values are 1-5, resulting in 2 - 32 samples\r
- 410:.\Generated_Source\PSoC5/CySpc.c **** *   respectively.\r
- 411:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 412:.\Generated_Source\PSoC5/CySpc.c **** * uint16 timerPeriod:\r
- 413:.\Generated_Source\PSoC5/CySpc.c **** *   Number of ADC ACLK cycles. A valid 14 bit value is accepted, higher 2 bits\r
- 414:.\Generated_Source\PSoC5/CySpc.c **** *   of 16 bit values are ignored.\r
- 415:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 416:.\Generated_Source\PSoC5/CySpc.c **** * uint8 clkDivSelect:\r
- 417:.\Generated_Source\PSoC5/CySpc.c **** *   ADC ACLK clock divide value. Valid values are 2 - 225.\r
- 418:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 419:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 420:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_STARTED\r
- 421:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_CANCELED\r
- 422:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED\r
- 423:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 424:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 425:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcGetTemp(uint8 numSamples)\r
- 426:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 524                           .loc 1 426 0\r
- 525                           .cfi_startproc\r
- 526                           @ args = 0, pretend = 0, frame = 0\r
- 527                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 528                           @ link register save eliminated.\r
- 529                   .LVL41:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 18\r
-\r
-\r
- 427:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 428:.\Generated_Source\PSoC5/CySpc.c **** \r
- 429:.\Generated_Source\PSoC5/CySpc.c ****     /* Make sure the SPC is ready to accept command */\r
- 430:.\Generated_Source\PSoC5/CySpc.c ****     if(CY_SPC_IDLE)\r
- 530                           .loc 1 430 0\r
- 531 0000 0C4A                 ldr     r2, .L57\r
- 532 0002 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 533 0004 03F00201             and     r1, r3, #2\r
- 534 0008 CBB2                 uxtb    r3, r1\r
- 535 000a 73B1                 cbz     r3, .L55\r
- 431:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 432:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
- 536                           .loc 1 432 0\r
- 537 000c 0A4B                 ldr     r3, .L57+4\r
- 538 000e B621                 movs    r1, #182\r
- 539 0010 1970                 strb    r1, [r3, #0]\r
- 433:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_GET_TEMP);\r
- 540                           .loc 1 433 0\r
- 541 0012 E121                 movs    r1, #225\r
- 542 0014 1970                 strb    r1, [r3, #0]\r
- 434:.\Generated_Source\PSoC5/CySpc.c ****         CY_SPC_CPU_DATA_REG = CY_SPC_CMD_GET_TEMP;\r
- 543                           .loc 1 434 0\r
- 544 0016 0E21                 movs    r1, #14\r
- 545 0018 1970                 strb    r1, [r3, #0]\r
- 435:.\Generated_Source\PSoC5/CySpc.c **** \r
- 436:.\Generated_Source\PSoC5/CySpc.c ****         /* Make sure the command was accepted */\r
- 437:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_BUSY)\r
- 546                           .loc 1 437 0\r
- 547 001a 1278                 ldrb    r2, [r2, #0]    @ zero_extendqisi2\r
- 548 001c 02F00201             and     r1, r2, #2\r
- 549 0020 CAB2                 uxtb    r2, r1\r
- 550 0022 22B9                 cbnz    r2, .L56\r
- 438:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 439:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_DATA_REG = numSamples;\r
- 551                           .loc 1 439 0\r
- 552 0024 1870                 strb    r0, [r3, #0]\r
- 427:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_STARTED;\r
- 553                           .loc 1 427 0\r
- 554 0026 0720                 movs    r0, #7\r
- 555                   .LVL42:\r
- 556 0028 7047                 bx      lr\r
- 557                   .LVL43:\r
- 558                   .L55:\r
- 440:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 441:.\Generated_Source\PSoC5/CySpc.c ****         else\r
- 442:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 443:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 444:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 445:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 446:.\Generated_Source\PSoC5/CySpc.c ****     else\r
- 447:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 448:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_LOCKED;\r
- 559                           .loc 1 448 0\r
- 560 002a 0420                 movs    r0, #4\r
- 561                   .LVL44:\r
- 562 002c 7047                 bx      lr\r
- 563                   .LVL45:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 19\r
-\r
-\r
- 564                   .L56:\r
- 443:.\Generated_Source\PSoC5/CySpc.c ****             status = CYRET_CANCELED;\r
- 565                           .loc 1 443 0\r
- 566 002e 0920                 movs    r0, #9\r
- 567                   .LVL46:\r
- 449:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 450:.\Generated_Source\PSoC5/CySpc.c **** \r
- 451:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 452:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 568                           .loc 1 452 0\r
- 569 0030 7047                 bx      lr\r
- 570                   .L58:\r
- 571 0032 00BF                 .align  2\r
- 572                   .L57:\r
- 573 0034 22470040             .word   1073760034\r
- 574 0038 20470040             .word   1073760032\r
- 575                           .cfi_endproc\r
- 576                   .LFE7:\r
- 577                           .size   CySpcGetTemp, .-CySpcGetTemp\r
- 578                           .section        .text.CySpcLock,"ax",%progbits\r
- 579                           .align  1\r
- 580                           .global CySpcLock\r
- 581                           .thumb\r
- 582                           .thumb_func\r
- 583                           .type   CySpcLock, %function\r
- 584                   CySpcLock:\r
- 585                   .LFB8:\r
- 453:.\Generated_Source\PSoC5/CySpc.c **** \r
- 454:.\Generated_Source\PSoC5/CySpc.c **** \r
- 455:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 456:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcLock\r
- 457:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
- 458:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 459:.\Generated_Source\PSoC5/CySpc.c **** *  Locks the SPC so it can not be used by someone else:\r
- 460:.\Generated_Source\PSoC5/CySpc.c **** *   - Saves wait-pipeline enable state and enable pipeline (PSoC5)\r
- 461:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 462:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 463:.\Generated_Source\PSoC5/CySpc.c **** *  Note\r
- 464:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 465:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 466:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_SUCCESS - if the resource was free.\r
- 467:.\Generated_Source\PSoC5/CySpc.c **** *  CYRET_LOCKED  - if the SPC is in use.\r
- 468:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 469:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 470:.\Generated_Source\PSoC5/CySpc.c **** cystatus CySpcLock(void)\r
- 471:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 586                           .loc 1 471 0\r
- 587                           .cfi_startproc\r
- 588                           @ args = 0, pretend = 0, frame = 0\r
- 589                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 590                   .LVL47:\r
- 591 0000 38B5                 push    {r3, r4, r5, lr}\r
- 592                   .LCFI7:\r
- 593                           .cfi_def_cfa_offset 16\r
- 594                           .cfi_offset 3, -16\r
- 595                           .cfi_offset 4, -12\r
- 596                           .cfi_offset 5, -8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 20\r
-\r
-\r
- 597                           .cfi_offset 14, -4\r
- 472:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_LOCKED;\r
- 473:.\Generated_Source\PSoC5/CySpc.c ****     uint8 interruptState;\r
- 474:.\Generated_Source\PSoC5/CySpc.c **** \r
- 475:.\Generated_Source\PSoC5/CySpc.c ****     /* Enter critical section */\r
- 476:.\Generated_Source\PSoC5/CySpc.c ****     interruptState = CyEnterCriticalSection();\r
- 598                           .loc 1 476 0\r
- 599 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
- 600                   .LVL48:\r
- 477:.\Generated_Source\PSoC5/CySpc.c **** \r
- 478:.\Generated_Source\PSoC5/CySpc.c ****     if(CY_SPC_UNLOCKED == SpcLockState)\r
- 601                           .loc 1 478 0\r
- 602 0006 0C4B                 ldr     r3, .L63\r
- 603 0008 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 604 000a 79B9                 cbnz    r1, .L61\r
- 479:.\Generated_Source\PSoC5/CySpc.c ****     {\r
- 480:.\Generated_Source\PSoC5/CySpc.c ****         SpcLockState = CY_SPC_LOCKED;\r
- 605                           .loc 1 480 0\r
- 606 000c 0125                 movs    r5, #1\r
- 481:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_SUCCESS;\r
- 482:.\Generated_Source\PSoC5/CySpc.c **** \r
- 483:.\Generated_Source\PSoC5/CySpc.c ****         #if(CY_PSOC5)\r
- 484:.\Generated_Source\PSoC5/CySpc.c **** \r
- 485:.\Generated_Source\PSoC5/CySpc.c ****             if(0u != (CY_SPC_CPU_WAITPIPE_REG & CY_SPC_CPU_WAITPIPE_BYPASS))\r
- 607                           .loc 1 485 0\r
- 608 000e 0B4A                 ldr     r2, .L63+4\r
- 480:.\Generated_Source\PSoC5/CySpc.c ****         SpcLockState = CY_SPC_LOCKED;\r
- 609                           .loc 1 480 0\r
- 610 0010 1D70                 strb    r5, [r3, #0]\r
- 611                   .LVL49:\r
- 612                           .loc 1 485 0\r
- 613 0012 1468                 ldr     r4, [r2, #0]\r
- 614 0014 2C40                 ands    r4, r4, r5\r
- 615 0016 0AD0                 beq     .L60\r
- 486:.\Generated_Source\PSoC5/CySpc.c ****             {\r
- 487:.\Generated_Source\PSoC5/CySpc.c ****                 /* Enable pipeline registers */\r
- 488:.\Generated_Source\PSoC5/CySpc.c ****                 CY_SPC_CPU_WAITPIPE_REG &= ((uint32)(~CY_SPC_CPU_WAITPIPE_BYPASS));\r
- 616                           .loc 1 488 0\r
- 617 0018 1468                 ldr     r4, [r2, #0]\r
- 618 001a 24F00104             bic     r4, r4, #1\r
- 619 001e 1460                 str     r4, [r2, #0]\r
- 489:.\Generated_Source\PSoC5/CySpc.c **** \r
- 490:.\Generated_Source\PSoC5/CySpc.c ****                 /* At least 2 NOP instructions are recommended */\r
- 491:.\Generated_Source\PSoC5/CySpc.c ****                 CY_NOP;\r
- 620                           .loc 1 491 0\r
- 621                   @ 491 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 622 0020 00BF                 NOP\r
- 623                   \r
- 624                   @ 0 "" 2\r
- 492:.\Generated_Source\PSoC5/CySpc.c ****                 CY_NOP;\r
- 625                           .loc 1 492 0\r
- 626                   @ 492 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 627 0022 00BF                 NOP\r
- 628                   \r
- 629                   @ 0 "" 2\r
- 493:.\Generated_Source\PSoC5/CySpc.c ****                 CY_NOP;\r
- 630                           .loc 1 493 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 21\r
-\r
-\r
- 631                   @ 493 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 632 0024 00BF                 NOP\r
- 633                   \r
- 634                   @ 0 "" 2\r
- 494:.\Generated_Source\PSoC5/CySpc.c **** \r
- 495:.\Generated_Source\PSoC5/CySpc.c ****                 spcWaitPipeBypass = CY_SPC_CPU_WAITPIPE_BYPASS;\r
- 635                           .loc 1 495 0\r
- 636                           .thumb\r
- 637 0026 5D60                 str     r5, [r3, #4]\r
- 481:.\Generated_Source\PSoC5/CySpc.c ****         status = CYRET_SUCCESS;\r
- 638                           .loc 1 481 0\r
- 639 0028 0C46                 mov     r4, r1\r
- 640 002a 00E0                 b       .L60\r
- 641                   .LVL50:\r
- 642                   .L61:\r
- 472:.\Generated_Source\PSoC5/CySpc.c ****     cystatus status = CYRET_LOCKED;\r
- 643                           .loc 1 472 0\r
- 644 002c 0424                 movs    r4, #4\r
- 645                   .LVL51:\r
- 646                   .L60:\r
- 496:.\Generated_Source\PSoC5/CySpc.c ****             }\r
- 497:.\Generated_Source\PSoC5/CySpc.c **** \r
- 498:.\Generated_Source\PSoC5/CySpc.c ****         #endif  /* (CY_PSOC5) */\r
- 499:.\Generated_Source\PSoC5/CySpc.c ****     }\r
- 500:.\Generated_Source\PSoC5/CySpc.c **** \r
- 501:.\Generated_Source\PSoC5/CySpc.c ****     /* Exit critical section */\r
- 502:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
- 647                           .loc 1 502 0\r
- 648 002e FFF7FEFF             bl      CyExitCriticalSection\r
- 649                   .LVL52:\r
- 503:.\Generated_Source\PSoC5/CySpc.c **** \r
- 504:.\Generated_Source\PSoC5/CySpc.c ****     return(status);\r
- 505:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 650                           .loc 1 505 0\r
- 651 0032 2046                 mov     r0, r4\r
- 652 0034 38BD                 pop     {r3, r4, r5, pc}\r
- 653                   .L64:\r
- 654 0036 00BF                 .align  2\r
- 655                   .L63:\r
- 656 0038 00000000             .word   .LANCHOR0\r
- 657 003c 04000840             .word   1074266116\r
- 658                           .cfi_endproc\r
- 659                   .LFE8:\r
- 660                           .size   CySpcLock, .-CySpcLock\r
- 661                           .section        .text.CySpcUnlock,"ax",%progbits\r
- 662                           .align  1\r
- 663                           .global CySpcUnlock\r
- 664                           .thumb\r
- 665                           .thumb_func\r
- 666                           .type   CySpcUnlock, %function\r
- 667                   CySpcUnlock:\r
- 668                   .LFB9:\r
- 506:.\Generated_Source\PSoC5/CySpc.c **** \r
- 507:.\Generated_Source\PSoC5/CySpc.c **** \r
- 508:.\Generated_Source\PSoC5/CySpc.c **** /*******************************************************************************\r
- 509:.\Generated_Source\PSoC5/CySpc.c **** * Function Name: CySpcUnlock\r
- 510:.\Generated_Source\PSoC5/CySpc.c **** ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 22\r
-\r
-\r
- 511:.\Generated_Source\PSoC5/CySpc.c **** * Summary:\r
- 512:.\Generated_Source\PSoC5/CySpc.c **** *  Unlocks the SPC so it can be used by someone else:\r
- 513:.\Generated_Source\PSoC5/CySpc.c **** *   - Restores wait-pipeline enable state (PSoC5)\r
- 514:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 515:.\Generated_Source\PSoC5/CySpc.c **** * Parameters:\r
- 516:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
- 517:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 518:.\Generated_Source\PSoC5/CySpc.c **** * Return:\r
- 519:.\Generated_Source\PSoC5/CySpc.c **** *  None\r
- 520:.\Generated_Source\PSoC5/CySpc.c **** *\r
- 521:.\Generated_Source\PSoC5/CySpc.c **** *******************************************************************************/\r
- 522:.\Generated_Source\PSoC5/CySpc.c **** void CySpcUnlock(void)\r
- 523:.\Generated_Source\PSoC5/CySpc.c **** {\r
- 669                           .loc 1 523 0\r
- 670                           .cfi_startproc\r
- 671                           @ args = 0, pretend = 0, frame = 0\r
- 672                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 673 0000 10B5                 push    {r4, lr}\r
- 674                   .LCFI8:\r
- 675                           .cfi_def_cfa_offset 8\r
- 676                           .cfi_offset 4, -8\r
- 677                           .cfi_offset 14, -4\r
- 524:.\Generated_Source\PSoC5/CySpc.c ****     uint8 interruptState;\r
- 525:.\Generated_Source\PSoC5/CySpc.c **** \r
- 526:.\Generated_Source\PSoC5/CySpc.c ****     /* Enter critical section */\r
- 527:.\Generated_Source\PSoC5/CySpc.c ****     interruptState = CyEnterCriticalSection();\r
- 678                           .loc 1 527 0\r
- 679 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
- 680                   .LVL53:\r
- 528:.\Generated_Source\PSoC5/CySpc.c **** \r
- 529:.\Generated_Source\PSoC5/CySpc.c ****     /* Release the SPC object */\r
- 530:.\Generated_Source\PSoC5/CySpc.c ****     SpcLockState = CY_SPC_UNLOCKED;\r
- 681                           .loc 1 530 0\r
- 682 0006 094B                 ldr     r3, .L67\r
- 683 0008 0022                 movs    r2, #0\r
- 531:.\Generated_Source\PSoC5/CySpc.c **** \r
- 532:.\Generated_Source\PSoC5/CySpc.c ****     #if(CY_PSOC5)\r
- 533:.\Generated_Source\PSoC5/CySpc.c **** \r
- 534:.\Generated_Source\PSoC5/CySpc.c ****         if(CY_SPC_CPU_WAITPIPE_BYPASS == spcWaitPipeBypass)\r
- 684                           .loc 1 534 0\r
- 685 000a 5968                 ldr     r1, [r3, #4]\r
- 530:.\Generated_Source\PSoC5/CySpc.c ****     SpcLockState = CY_SPC_UNLOCKED;\r
- 686                           .loc 1 530 0\r
- 687 000c 1A70                 strb    r2, [r3, #0]\r
- 688                           .loc 1 534 0\r
- 689 000e 0129                 cmp     r1, #1\r
- 690 0010 08D1                 bne     .L66\r
- 535:.\Generated_Source\PSoC5/CySpc.c ****         {\r
- 536:.\Generated_Source\PSoC5/CySpc.c ****             /* Force to bypass pipeline registers */\r
- 537:.\Generated_Source\PSoC5/CySpc.c ****             CY_SPC_CPU_WAITPIPE_REG |= CY_SPC_CPU_WAITPIPE_BYPASS;\r
- 691                           .loc 1 537 0\r
- 692 0012 0749                 ldr     r1, .L67+4\r
- 693 0014 0C68                 ldr     r4, [r1, #0]\r
- 694 0016 44F00104             orr     r4, r4, #1\r
- 695 001a 0C60                 str     r4, [r1, #0]\r
- 538:.\Generated_Source\PSoC5/CySpc.c **** \r
- 539:.\Generated_Source\PSoC5/CySpc.c ****             /* At least 2 NOP instructions are recommended */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 23\r
-\r
-\r
- 540:.\Generated_Source\PSoC5/CySpc.c ****             CY_NOP;\r
- 696                           .loc 1 540 0\r
- 697                   @ 540 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 698 001c 00BF                 NOP\r
- 699                   \r
- 700                   @ 0 "" 2\r
- 541:.\Generated_Source\PSoC5/CySpc.c ****             CY_NOP;\r
- 701                           .loc 1 541 0\r
- 702                   @ 541 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 703 001e 00BF                 NOP\r
- 704                   \r
- 705                   @ 0 "" 2\r
- 542:.\Generated_Source\PSoC5/CySpc.c ****             CY_NOP;\r
- 706                           .loc 1 542 0\r
- 707                   @ 542 ".\Generated_Source\PSoC5\CySpc.c" 1\r
- 708 0020 00BF                 NOP\r
- 709                   \r
- 710                   @ 0 "" 2\r
- 543:.\Generated_Source\PSoC5/CySpc.c **** \r
- 544:.\Generated_Source\PSoC5/CySpc.c ****             spcWaitPipeBypass = 0u;\r
- 711                           .loc 1 544 0\r
- 712                           .thumb\r
- 713 0022 5A60                 str     r2, [r3, #4]\r
- 714                   .L66:\r
- 545:.\Generated_Source\PSoC5/CySpc.c ****         }\r
- 546:.\Generated_Source\PSoC5/CySpc.c **** \r
- 547:.\Generated_Source\PSoC5/CySpc.c ****     #endif  /* (CY_PSOC5) */\r
- 548:.\Generated_Source\PSoC5/CySpc.c **** \r
- 549:.\Generated_Source\PSoC5/CySpc.c ****     /* Exit critical section */\r
- 550:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
- 551:.\Generated_Source\PSoC5/CySpc.c **** }\r
- 715                           .loc 1 551 0\r
- 716 0024 BDE81040             pop     {r4, lr}\r
- 550:.\Generated_Source\PSoC5/CySpc.c ****     CyExitCriticalSection(interruptState);\r
- 717                           .loc 1 550 0\r
- 718 0028 FFF7FEBF             b       CyExitCriticalSection\r
- 719                   .LVL54:\r
- 720                   .L68:\r
- 721                           .align  2\r
- 722                   .L67:\r
- 723 002c 00000000             .word   .LANCHOR0\r
- 724 0030 04000840             .word   1074266116\r
- 725                           .cfi_endproc\r
- 726                   .LFE9:\r
- 727                           .size   CySpcUnlock, .-CySpcUnlock\r
- 728                           .global SpcLockState\r
- 729                           .bss\r
- 730                           .align  2\r
- 731                           .set    .LANCHOR0,. + 0\r
- 732                           .type   SpcLockState, %object\r
- 733                           .size   SpcLockState, 1\r
- 734                   SpcLockState:\r
- 735 0000 00                   .space  1\r
- 736 0001 000000               .space  3\r
- 737                           .type   spcWaitPipeBypass, %object\r
- 738                           .size   spcWaitPipeBypass, 4\r
- 739                   spcWaitPipeBypass:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 24\r
-\r
-\r
- 740 0004 00000000             .space  4\r
- 741                           .text\r
- 742                   .Letext0:\r
- 743                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 744                           .file 3 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 745                           .section        .debug_info,"",%progbits\r
- 746                   .Ldebug_info0:\r
- 747 0000 6B040000             .4byte  0x46b\r
- 748 0004 0200                 .2byte  0x2\r
- 749 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 750 000a 04                   .byte   0x4\r
- 751 000b 01                   .uleb128 0x1\r
- 752 000c 57020000             .4byte  .LASF40\r
- 753 0010 01                   .byte   0x1\r
- 754 0011 45000000             .4byte  .LASF41\r
- 755 0015 CA000000             .4byte  .LASF42\r
- 756 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 757 001d 00000000             .4byte  0\r
- 758 0021 00000000             .4byte  0\r
- 759 0025 00000000             .4byte  .Ldebug_line0\r
- 760 0029 02                   .uleb128 0x2\r
- 761 002a 01                   .byte   0x1\r
- 762 002b 06                   .byte   0x6\r
- 763 002c 4B020000             .4byte  .LASF0\r
- 764 0030 02                   .uleb128 0x2\r
- 765 0031 01                   .byte   0x1\r
- 766 0032 08                   .byte   0x8\r
- 767 0033 21010000             .4byte  .LASF1\r
- 768 0037 02                   .uleb128 0x2\r
- 769 0038 02                   .byte   0x2\r
- 770 0039 05                   .byte   0x5\r
- 771 003a FC010000             .4byte  .LASF2\r
- 772 003e 02                   .uleb128 0x2\r
- 773 003f 02                   .byte   0x2\r
- 774 0040 07                   .byte   0x7\r
- 775 0041 66000000             .4byte  .LASF3\r
- 776 0045 02                   .uleb128 0x2\r
- 777 0046 04                   .byte   0x4\r
- 778 0047 05                   .byte   0x5\r
- 779 0048 30020000             .4byte  .LASF4\r
- 780 004c 02                   .uleb128 0x2\r
- 781 004d 04                   .byte   0x4\r
- 782 004e 07                   .byte   0x7\r
- 783 004f B8000000             .4byte  .LASF5\r
- 784 0053 02                   .uleb128 0x2\r
- 785 0054 08                   .byte   0x8\r
- 786 0055 05                   .byte   0x5\r
- 787 0056 DF010000             .4byte  .LASF6\r
- 788 005a 02                   .uleb128 0x2\r
- 789 005b 08                   .byte   0x8\r
- 790 005c 07                   .byte   0x7\r
- 791 005d 87010000             .4byte  .LASF7\r
- 792 0061 03                   .uleb128 0x3\r
- 793 0062 04                   .byte   0x4\r
- 794 0063 05                   .byte   0x5\r
- 795 0064 696E7400             .ascii  "int\000"\r
- 796 0068 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 25\r
-\r
-\r
- 797 0069 04                   .byte   0x4\r
- 798 006a 07                   .byte   0x7\r
- 799 006b 72010000             .4byte  .LASF8\r
- 800 006f 04                   .uleb128 0x4\r
- 801 0070 FB000000             .4byte  .LASF9\r
- 802 0074 02                   .byte   0x2\r
- 803 0075 5B                   .byte   0x5b\r
- 804 0076 30000000             .4byte  0x30\r
- 805 007a 04                   .uleb128 0x4\r
- 806 007b 43010000             .4byte  .LASF10\r
- 807 007f 02                   .byte   0x2\r
- 808 0080 5C                   .byte   0x5c\r
- 809 0081 3E000000             .4byte  0x3e\r
- 810 0085 04                   .uleb128 0x4\r
- 811 0086 54010000             .4byte  .LASF11\r
- 812 008a 02                   .byte   0x2\r
- 813 008b 5D                   .byte   0x5d\r
- 814 008c 4C000000             .4byte  0x4c\r
- 815 0090 02                   .uleb128 0x2\r
- 816 0091 04                   .byte   0x4\r
- 817 0092 04                   .byte   0x4\r
- 818 0093 8E000000             .4byte  .LASF12\r
- 819 0097 02                   .uleb128 0x2\r
- 820 0098 08                   .byte   0x8\r
- 821 0099 04                   .byte   0x4\r
- 822 009a 2F010000             .4byte  .LASF13\r
- 823 009e 02                   .uleb128 0x2\r
- 824 009f 01                   .byte   0x1\r
- 825 00a0 08                   .byte   0x8\r
- 826 00a1 F7010000             .4byte  .LASF14\r
- 827 00a5 04                   .uleb128 0x4\r
- 828 00a6 13000000             .4byte  .LASF15\r
- 829 00aa 02                   .byte   0x2\r
- 830 00ab E8                   .byte   0xe8\r
- 831 00ac 4C000000             .4byte  0x4c\r
- 832 00b0 04                   .uleb128 0x4\r
- 833 00b1 A4000000             .4byte  .LASF16\r
- 834 00b5 02                   .byte   0x2\r
- 835 00b6 F0                   .byte   0xf0\r
- 836 00b7 BB000000             .4byte  0xbb\r
- 837 00bb 05                   .uleb128 0x5\r
- 838 00bc 6F000000             .4byte  0x6f\r
- 839 00c0 04                   .uleb128 0x4\r
- 840 00c1 1C000000             .4byte  .LASF17\r
- 841 00c5 02                   .byte   0x2\r
- 842 00c6 F2                   .byte   0xf2\r
- 843 00c7 CB000000             .4byte  0xcb\r
- 844 00cb 05                   .uleb128 0x5\r
- 845 00cc 85000000             .4byte  0x85\r
- 846 00d0 02                   .uleb128 0x2\r
- 847 00d1 04                   .byte   0x4\r
- 848 00d2 07                   .byte   0x7\r
- 849 00d3 B9010000             .4byte  .LASF18\r
- 850 00d7 06                   .uleb128 0x6\r
- 851 00d8 01                   .byte   0x1\r
- 852 00d9 22000000             .4byte  .LASF19\r
- 853 00dd 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 26\r
-\r
-\r
- 854 00de 4E                   .byte   0x4e\r
- 855 00df 01                   .byte   0x1\r
- 856 00e0 00000000             .4byte  .LFB0\r
- 857 00e4 24000000             .4byte  .LFE0\r
- 858 00e8 00000000             .4byte  .LLST0\r
- 859 00ec 01                   .byte   0x1\r
- 860 00ed 14010000             .4byte  0x114\r
- 861 00f1 07                   .uleb128 0x7\r
- 862 00f2 A9000000             .4byte  .LASF21\r
- 863 00f6 01                   .byte   0x1\r
- 864 00f7 51                   .byte   0x51\r
- 865 00f8 6F000000             .4byte  0x6f\r
- 866 00fc 20000000             .4byte  .LLST1\r
- 867 0100 08                   .uleb128 0x8\r
- 868 0101 06000000             .4byte  .LVL0\r
- 869 0105 3C040000             .4byte  0x43c\r
- 870 0109 09                   .uleb128 0x9\r
- 871 010a 20000000             .4byte  .LVL1\r
- 872 010e 01                   .byte   0x1\r
- 873 010f 4A040000             .4byte  0x44a\r
- 874 0113 00                   .byte   0\r
- 875 0114 06                   .uleb128 0x6\r
- 876 0115 01                   .byte   0x1\r
- 877 0116 3B000000             .4byte  .LASF20\r
- 878 011a 01                   .byte   0x1\r
- 879 011b 68                   .byte   0x68\r
- 880 011c 01                   .byte   0x1\r
- 881 011d 00000000             .4byte  .LFB1\r
- 882 0121 24000000             .4byte  .LFE1\r
- 883 0125 33000000             .4byte  .LLST2\r
- 884 0129 01                   .byte   0x1\r
- 885 012a 51010000             .4byte  0x151\r
- 886 012e 07                   .uleb128 0x7\r
- 887 012f A9000000             .4byte  .LASF21\r
- 888 0133 01                   .byte   0x1\r
- 889 0134 6B                   .byte   0x6b\r
- 890 0135 6F000000             .4byte  0x6f\r
- 891 0139 53000000             .4byte  .LLST3\r
- 892 013d 08                   .uleb128 0x8\r
- 893 013e 06000000             .4byte  .LVL2\r
- 894 0142 3C040000             .4byte  0x43c\r
- 895 0146 09                   .uleb128 0x9\r
- 896 0147 20000000             .4byte  .LVL3\r
- 897 014b 01                   .byte   0x1\r
- 898 014c 4A040000             .4byte  0x44a\r
- 899 0150 00                   .byte   0\r
- 900 0151 0A                   .uleb128 0xa\r
- 901 0152 01                   .byte   0x1\r
- 902 0153 79000000             .4byte  .LASF24\r
- 903 0157 01                   .byte   0x1\r
- 904 0158 87                   .byte   0x87\r
- 905 0159 01                   .byte   0x1\r
- 906 015a 6F000000             .4byte  0x6f\r
- 907 015e 00000000             .4byte  .LFB2\r
- 908 0162 34000000             .4byte  .LFE2\r
- 909 0166 66000000             .4byte  .LLST4\r
- 910 016a 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 27\r
-\r
-\r
- 911 016b AA010000             .4byte  0x1aa\r
- 912 016f 0B                   .uleb128 0xb\r
- 913 0170 06020000             .4byte  .LASF22\r
- 914 0174 01                   .byte   0x1\r
- 915 0175 87                   .byte   0x87\r
- 916 0176 AA010000             .4byte  0x1aa\r
- 917 017a 86000000             .4byte  .LLST5\r
- 918 017e 0B                   .uleb128 0xb\r
- 919 017f 9F000000             .4byte  .LASF23\r
- 920 0183 01                   .byte   0x1\r
- 921 0184 87                   .byte   0x87\r
- 922 0185 6F000000             .4byte  0x6f\r
- 923 0189 A4000000             .4byte  .LLST6\r
- 924 018d 0C                   .uleb128 0xc\r
- 925 018e 6900                 .ascii  "i\000"\r
- 926 0190 01                   .byte   0x1\r
- 927 0191 89                   .byte   0x89\r
- 928 0192 6F000000             .4byte  0x6f\r
- 929 0196 C5000000             .4byte  .LLST7\r
- 930 019a 0D                   .uleb128 0xd\r
- 931 019b 1C000000             .4byte  .LVL6\r
- 932 019f 5E040000             .4byte  0x45e\r
- 933 01a3 0E                   .uleb128 0xe\r
- 934 01a4 01                   .byte   0x1\r
- 935 01a5 50                   .byte   0x50\r
- 936 01a6 01                   .byte   0x1\r
- 937 01a7 31                   .byte   0x31\r
- 938 01a8 00                   .byte   0\r
- 939 01a9 00                   .byte   0\r
- 940 01aa 0F                   .uleb128 0xf\r
- 941 01ab 04                   .byte   0x4\r
- 942 01ac 6F000000             .4byte  0x6f\r
- 943 01b0 0A                   .uleb128 0xa\r
- 944 01b1 01                   .byte   0x1\r
- 945 01b2 00000000             .4byte  .LASF25\r
- 946 01b6 01                   .byte   0x1\r
- 947 01b7 B2                   .byte   0xb2\r
- 948 01b8 01                   .byte   0x1\r
- 949 01b9 A5000000             .4byte  0xa5\r
- 950 01bd 00000000             .4byte  .LFB3\r
- 951 01c1 74000000             .4byte  .LFE3\r
- 952 01c5 D9000000             .4byte  .LLST8\r
- 953 01c9 01                   .byte   0x1\r
- 954 01ca 23020000             .4byte  0x223\r
- 955 01ce 0B                   .uleb128 0xb\r
- 956 01cf 1B010000             .4byte  .LASF26\r
- 957 01d3 01                   .byte   0x1\r
- 958 01d4 B2                   .byte   0xb2\r
- 959 01d5 6F000000             .4byte  0x6f\r
- 960 01d9 F9000000             .4byte  .LLST9\r
- 961 01dd 0B                   .uleb128 0xb\r
- 962 01de 7F010000             .4byte  .LASF27\r
- 963 01e2 01                   .byte   0x1\r
- 964 01e3 B2                   .byte   0xb2\r
- 965 01e4 7A000000             .4byte  0x7a\r
- 966 01e8 8D010000             .4byte  .LLST10\r
- 967 01ec 10                   .uleb128 0x10\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 28\r
-\r
-\r
- 968 01ed 06020000             .4byte  .LASF22\r
- 969 01f1 01                   .byte   0x1\r
- 970 01f2 B2                   .byte   0xb2\r
- 971 01f3 23020000             .4byte  0x223\r
- 972 01f7 01                   .byte   0x1\r
- 973 01f8 52                   .byte   0x52\r
- 974 01f9 10                   .uleb128 0x10\r
- 975 01fa 9F000000             .4byte  .LASF23\r
- 976 01fe 01                   .byte   0x1\r
- 977 01ff B2                   .byte   0xb2\r
- 978 0200 6F000000             .4byte  0x6f\r
- 979 0204 01                   .byte   0x1\r
- 980 0205 53                   .byte   0x53\r
- 981 0206 07                   .uleb128 0x7\r
- 982 0207 87000000             .4byte  .LASF28\r
- 983 020b 01                   .byte   0x1\r
- 984 020c B5                   .byte   0xb5\r
- 985 020d A5000000             .4byte  0xa5\r
- 986 0211 B9010000             .4byte  .LLST11\r
- 987 0215 0C                   .uleb128 0xc\r
- 988 0216 6900                 .ascii  "i\000"\r
- 989 0218 01                   .byte   0x1\r
- 990 0219 B6                   .byte   0xb6\r
- 991 021a 6F000000             .4byte  0x6f\r
- 992 021e D8010000             .4byte  .LLST12\r
- 993 0222 00                   .byte   0\r
- 994 0223 0F                   .uleb128 0xf\r
- 995 0224 04                   .byte   0x4\r
- 996 0225 29020000             .4byte  0x229\r
- 997 0229 11                   .uleb128 0x11\r
- 998 022a 6F000000             .4byte  0x6f\r
- 999 022e 0A                   .uleb128 0xa\r
- 1000 022f 01                  .byte   0x1\r
- 1001 0230 AC010000            .4byte  .LASF29\r
- 1002 0234 01                  .byte   0x1\r
- 1003 0235 FD                  .byte   0xfd\r
- 1004 0236 01                  .byte   0x1\r
- 1005 0237 A5000000            .4byte  0xa5\r
- 1006 023b 00000000            .4byte  .LFB4\r
- 1007 023f 4C000000            .4byte  .LFE4\r
- 1008 0243 EC010000            .4byte  .LLST13\r
- 1009 0247 01                  .byte   0x1\r
- 1010 0248 8F020000            .4byte  0x28f\r
- 1011 024c 0B                  .uleb128 0xb\r
- 1012 024d 1B010000            .4byte  .LASF26\r
- 1013 0251 01                  .byte   0x1\r
- 1014 0252 FD                  .byte   0xfd\r
- 1015 0253 6F000000            .4byte  0x6f\r
- 1016 0257 0C020000            .4byte  .LLST14\r
- 1017 025b 10                  .uleb128 0x10\r
- 1018 025c 06020000            .4byte  .LASF22\r
- 1019 0260 01                  .byte   0x1\r
- 1020 0261 FD                  .byte   0xfd\r
- 1021 0262 23020000            .4byte  0x223\r
- 1022 0266 01                  .byte   0x1\r
- 1023 0267 51                  .byte   0x51\r
- 1024 0268 10                  .uleb128 0x10\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 29\r
-\r
-\r
- 1025 0269 9F000000            .4byte  .LASF23\r
- 1026 026d 01                  .byte   0x1\r
- 1027 026e FD                  .byte   0xfd\r
- 1028 026f 7A000000            .4byte  0x7a\r
- 1029 0273 01                  .byte   0x1\r
- 1030 0274 52                  .byte   0x52\r
- 1031 0275 07                  .uleb128 0x7\r
- 1032 0276 87000000            .4byte  .LASF28\r
- 1033 027a 01                  .byte   0x1\r
- 1034 027b FF                  .byte   0xff\r
- 1035 027c A5000000            .4byte  0xa5\r
- 1036 0280 7B020000            .4byte  .LLST15\r
- 1037 0284 12                  .uleb128 0x12\r
- 1038 0285 6900                .ascii  "i\000"\r
- 1039 0287 01                  .byte   0x1\r
- 1040 0288 0001                .2byte  0x100\r
- 1041 028a 7A000000            .4byte  0x7a\r
- 1042 028e 00                  .byte   0\r
- 1043 028f 13                  .uleb128 0x13\r
- 1044 0290 01                  .byte   0x1\r
- 1045 0291 2D000000            .4byte  .LASF30\r
- 1046 0295 01                  .byte   0x1\r
- 1047 0296 3C01                .2byte  0x13c\r
- 1048 0298 01                  .byte   0x1\r
- 1049 0299 A5000000            .4byte  0xa5\r
- 1050 029d 00000000            .4byte  .LFB5\r
- 1051 02a1 48000000            .4byte  .LFE5\r
- 1052 02a5 9A020000            .4byte  .LLST16\r
- 1053 02a9 01                  .byte   0x1\r
- 1054 02aa FB020000            .4byte  0x2fb\r
- 1055 02ae 14                  .uleb128 0x14\r
- 1056 02af 1B010000            .4byte  .LASF26\r
- 1057 02b3 01                  .byte   0x1\r
- 1058 02b4 3C01                .2byte  0x13c\r
- 1059 02b6 6F000000            .4byte  0x6f\r
- 1060 02ba BA020000            .4byte  .LLST17\r
- 1061 02be 14                  .uleb128 0x14\r
- 1062 02bf 7F010000            .4byte  .LASF27\r
- 1063 02c3 01                  .byte   0x1\r
- 1064 02c4 3C01                .2byte  0x13c\r
- 1065 02c6 7A000000            .4byte  0x7a\r
- 1066 02ca 0B030000            .4byte  .LLST18\r
- 1067 02ce 15                  .uleb128 0x15\r
- 1068 02cf 0E010000            .4byte  .LASF31\r
- 1069 02d3 01                  .byte   0x1\r
- 1070 02d4 3C01                .2byte  0x13c\r
- 1071 02d6 6F000000            .4byte  0x6f\r
- 1072 02da 01                  .byte   0x1\r
- 1073 02db 52                  .byte   0x52\r
- 1074 02dc 15                  .uleb128 0x15\r
- 1075 02dd 9E010000            .4byte  .LASF32\r
- 1076 02e1 01                  .byte   0x1\r
- 1077 02e2 3C01                .2byte  0x13c\r
- 1078 02e4 6F000000            .4byte  0x6f\r
- 1079 02e8 01                  .byte   0x1\r
- 1080 02e9 53                  .byte   0x53\r
- 1081 02ea 16                  .uleb128 0x16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 30\r
-\r
-\r
- 1082 02eb 87000000            .4byte  .LASF28\r
- 1083 02ef 01                  .byte   0x1\r
- 1084 02f0 3F01                .2byte  0x13f\r
- 1085 02f2 A5000000            .4byte  0xa5\r
- 1086 02f6 37030000            .4byte  .LLST19\r
- 1087 02fa 00                  .byte   0\r
- 1088 02fb 13                  .uleb128 0x13\r
- 1089 02fc 01                  .byte   0x1\r
- 1090 02fd CE010000            .4byte  .LASF33\r
- 1091 0301 01                  .byte   0x1\r
- 1092 0302 7201                .2byte  0x172\r
- 1093 0304 01                  .byte   0x1\r
- 1094 0305 A5000000            .4byte  0xa5\r
- 1095 0309 00000000            .4byte  .LFB6\r
- 1096 030d 40000000            .4byte  .LFE6\r
- 1097 0311 56030000            .4byte  .LLST20\r
- 1098 0315 01                  .byte   0x1\r
- 1099 0316 49030000            .4byte  0x349\r
- 1100 031a 14                  .uleb128 0x14\r
- 1101 031b 1B010000            .4byte  .LASF26\r
- 1102 031f 01                  .byte   0x1\r
- 1103 0320 7201                .2byte  0x172\r
- 1104 0322 6F000000            .4byte  0x6f\r
- 1105 0326 76030000            .4byte  .LLST21\r
- 1106 032a 15                  .uleb128 0x15\r
- 1107 032b 0D020000            .4byte  .LASF34\r
- 1108 032f 01                  .byte   0x1\r
- 1109 0330 7201                .2byte  0x172\r
- 1110 0332 6F000000            .4byte  0x6f\r
- 1111 0336 01                  .byte   0x1\r
- 1112 0337 51                  .byte   0x51\r
- 1113 0338 16                  .uleb128 0x16\r
- 1114 0339 87000000            .4byte  .LASF28\r
- 1115 033d 01                  .byte   0x1\r
- 1116 033e 7401                .2byte  0x174\r
- 1117 0340 A5000000            .4byte  0xa5\r
- 1118 0344 C7030000            .4byte  .LLST22\r
- 1119 0348 00                  .byte   0\r
- 1120 0349 17                  .uleb128 0x17\r
- 1121 034a 01                  .byte   0x1\r
- 1122 034b 36010000            .4byte  .LASF35\r
- 1123 034f 01                  .byte   0x1\r
- 1124 0350 A901                .2byte  0x1a9\r
- 1125 0352 01                  .byte   0x1\r
- 1126 0353 A5000000            .4byte  0xa5\r
- 1127 0357 00000000            .4byte  .LFB7\r
- 1128 035b 3C000000            .4byte  .LFE7\r
- 1129 035f 02                  .byte   0x2\r
- 1130 0360 7D                  .byte   0x7d\r
- 1131 0361 00                  .sleb128 0\r
- 1132 0362 01                  .byte   0x1\r
- 1133 0363 88030000            .4byte  0x388\r
- 1134 0367 14                  .uleb128 0x14\r
- 1135 0368 94000000            .4byte  .LASF36\r
- 1136 036c 01                  .byte   0x1\r
- 1137 036d A901                .2byte  0x1a9\r
- 1138 036f 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 31\r
-\r
-\r
- 1139 0373 E6030000            .4byte  .LLST23\r
- 1140 0377 16                  .uleb128 0x16\r
- 1141 0378 87000000            .4byte  .LASF28\r
- 1142 037c 01                  .byte   0x1\r
- 1143 037d AB01                .2byte  0x1ab\r
- 1144 037f A5000000            .4byte  0xa5\r
- 1145 0383 37040000            .4byte  .LLST24\r
- 1146 0387 00                  .byte   0\r
- 1147 0388 13                  .uleb128 0x13\r
- 1148 0389 01                  .byte   0x1\r
- 1149 038a 4A010000            .4byte  .LASF37\r
- 1150 038e 01                  .byte   0x1\r
- 1151 038f D601                .2byte  0x1d6\r
- 1152 0391 01                  .byte   0x1\r
- 1153 0392 A5000000            .4byte  0xa5\r
- 1154 0396 00000000            .4byte  .LFB8\r
- 1155 039a 40000000            .4byte  .LFE8\r
- 1156 039e 56040000            .4byte  .LLST25\r
- 1157 03a2 01                  .byte   0x1\r
- 1158 03a3 DA030000            .4byte  0x3da\r
- 1159 03a7 16                  .uleb128 0x16\r
- 1160 03a8 87000000            .4byte  .LASF28\r
- 1161 03ac 01                  .byte   0x1\r
- 1162 03ad D801                .2byte  0x1d8\r
- 1163 03af A5000000            .4byte  0xa5\r
- 1164 03b3 76040000            .4byte  .LLST26\r
- 1165 03b7 16                  .uleb128 0x16\r
- 1166 03b8 A9000000            .4byte  .LASF21\r
- 1167 03bc 01                  .byte   0x1\r
- 1168 03bd D901                .2byte  0x1d9\r
- 1169 03bf 6F000000            .4byte  0x6f\r
- 1170 03c3 AD040000            .4byte  .LLST27\r
- 1171 03c7 08                  .uleb128 0x8\r
- 1172 03c8 06000000            .4byte  .LVL48\r
- 1173 03cc 3C040000            .4byte  0x43c\r
- 1174 03d0 08                  .uleb128 0x8\r
- 1175 03d1 32000000            .4byte  .LVL52\r
- 1176 03d5 4A040000            .4byte  0x44a\r
- 1177 03d9 00                  .byte   0\r
- 1178 03da 18                  .uleb128 0x18\r
- 1179 03db 01                  .byte   0x1\r
- 1180 03dc C2010000            .4byte  .LASF38\r
- 1181 03e0 01                  .byte   0x1\r
- 1182 03e1 0A02                .2byte  0x20a\r
- 1183 03e3 01                  .byte   0x1\r
- 1184 03e4 00000000            .4byte  .LFB9\r
- 1185 03e8 34000000            .4byte  .LFE9\r
- 1186 03ec C0040000            .4byte  .LLST28\r
- 1187 03f0 01                  .byte   0x1\r
- 1188 03f1 19040000            .4byte  0x419\r
- 1189 03f5 16                  .uleb128 0x16\r
- 1190 03f6 A9000000            .4byte  .LASF21\r
- 1191 03fa 01                  .byte   0x1\r
- 1192 03fb 0C02                .2byte  0x20c\r
- 1193 03fd 6F000000            .4byte  0x6f\r
- 1194 0401 E0040000            .4byte  .LLST29\r
- 1195 0405 08                  .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 32\r
-\r
-\r
- 1196 0406 06000000            .4byte  .LVL53\r
- 1197 040a 3C040000            .4byte  0x43c\r
- 1198 040e 09                  .uleb128 0x9\r
- 1199 040f 2C000000            .4byte  .LVL54\r
- 1200 0413 01                  .byte   0x1\r
- 1201 0414 4A040000            .4byte  0x44a\r
- 1202 0418 00                  .byte   0\r
- 1203 0419 19                  .uleb128 0x19\r
- 1204 041a 39020000            .4byte  .LASF39\r
- 1205 041e 01                  .byte   0x1\r
- 1206 041f 3C                  .byte   0x3c\r
- 1207 0420 85000000            .4byte  0x85\r
- 1208 0424 05                  .byte   0x5\r
- 1209 0425 03                  .byte   0x3\r
- 1210 0426 04000000            .4byte  spcWaitPipeBypass\r
- 1211 042a 1A                  .uleb128 0x1a\r
- 1212 042b 01010000            .4byte  .LASF43\r
- 1213 042f 01                  .byte   0x1\r
- 1214 0430 30                  .byte   0x30\r
- 1215 0431 6F000000            .4byte  0x6f\r
- 1216 0435 01                  .byte   0x1\r
- 1217 0436 05                  .byte   0x5\r
- 1218 0437 03                  .byte   0x3\r
- 1219 0438 00000000            .4byte  SpcLockState\r
- 1220 043c 1B                  .uleb128 0x1b\r
- 1221 043d 01                  .byte   0x1\r
- 1222 043e 5B010000            .4byte  .LASF44\r
- 1223 0442 03                  .byte   0x3\r
- 1224 0443 7E                  .byte   0x7e\r
- 1225 0444 01                  .byte   0x1\r
- 1226 0445 6F000000            .4byte  0x6f\r
- 1227 0449 01                  .byte   0x1\r
- 1228 044a 1C                  .uleb128 0x1c\r
- 1229 044b 01                  .byte   0x1\r
- 1230 044c 1A020000            .4byte  .LASF45\r
- 1231 0450 03                  .byte   0x3\r
- 1232 0451 7F                  .byte   0x7f\r
- 1233 0452 01                  .byte   0x1\r
- 1234 0453 01                  .byte   0x1\r
- 1235 0454 5E040000            .4byte  0x45e\r
- 1236 0458 1D                  .uleb128 0x1d\r
- 1237 0459 6F000000            .4byte  0x6f\r
- 1238 045d 00                  .byte   0\r
- 1239 045e 1E                  .uleb128 0x1e\r
- 1240 045f 01                  .byte   0x1\r
- 1241 0460 ED010000            .4byte  .LASF46\r
- 1242 0464 03                  .byte   0x3\r
- 1243 0465 78                  .byte   0x78\r
- 1244 0466 01                  .byte   0x1\r
- 1245 0467 01                  .byte   0x1\r
- 1246 0468 1D                  .uleb128 0x1d\r
- 1247 0469 7A000000            .4byte  0x7a\r
- 1248 046d 00                  .byte   0\r
- 1249 046e 00                  .byte   0\r
- 1250                          .section        .debug_abbrev,"",%progbits\r
- 1251                  .Ldebug_abbrev0:\r
- 1252 0000 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 33\r
-\r
-\r
- 1253 0001 11                  .uleb128 0x11\r
- 1254 0002 01                  .byte   0x1\r
- 1255 0003 25                  .uleb128 0x25\r
- 1256 0004 0E                  .uleb128 0xe\r
- 1257 0005 13                  .uleb128 0x13\r
- 1258 0006 0B                  .uleb128 0xb\r
- 1259 0007 03                  .uleb128 0x3\r
- 1260 0008 0E                  .uleb128 0xe\r
- 1261 0009 1B                  .uleb128 0x1b\r
- 1262 000a 0E                  .uleb128 0xe\r
- 1263 000b 55                  .uleb128 0x55\r
- 1264 000c 06                  .uleb128 0x6\r
- 1265 000d 11                  .uleb128 0x11\r
- 1266 000e 01                  .uleb128 0x1\r
- 1267 000f 52                  .uleb128 0x52\r
- 1268 0010 01                  .uleb128 0x1\r
- 1269 0011 10                  .uleb128 0x10\r
- 1270 0012 06                  .uleb128 0x6\r
- 1271 0013 00                  .byte   0\r
- 1272 0014 00                  .byte   0\r
- 1273 0015 02                  .uleb128 0x2\r
- 1274 0016 24                  .uleb128 0x24\r
- 1275 0017 00                  .byte   0\r
- 1276 0018 0B                  .uleb128 0xb\r
- 1277 0019 0B                  .uleb128 0xb\r
- 1278 001a 3E                  .uleb128 0x3e\r
- 1279 001b 0B                  .uleb128 0xb\r
- 1280 001c 03                  .uleb128 0x3\r
- 1281 001d 0E                  .uleb128 0xe\r
- 1282 001e 00                  .byte   0\r
- 1283 001f 00                  .byte   0\r
- 1284 0020 03                  .uleb128 0x3\r
- 1285 0021 24                  .uleb128 0x24\r
- 1286 0022 00                  .byte   0\r
- 1287 0023 0B                  .uleb128 0xb\r
- 1288 0024 0B                  .uleb128 0xb\r
- 1289 0025 3E                  .uleb128 0x3e\r
- 1290 0026 0B                  .uleb128 0xb\r
- 1291 0027 03                  .uleb128 0x3\r
- 1292 0028 08                  .uleb128 0x8\r
- 1293 0029 00                  .byte   0\r
- 1294 002a 00                  .byte   0\r
- 1295 002b 04                  .uleb128 0x4\r
- 1296 002c 16                  .uleb128 0x16\r
- 1297 002d 00                  .byte   0\r
- 1298 002e 03                  .uleb128 0x3\r
- 1299 002f 0E                  .uleb128 0xe\r
- 1300 0030 3A                  .uleb128 0x3a\r
- 1301 0031 0B                  .uleb128 0xb\r
- 1302 0032 3B                  .uleb128 0x3b\r
- 1303 0033 0B                  .uleb128 0xb\r
- 1304 0034 49                  .uleb128 0x49\r
- 1305 0035 13                  .uleb128 0x13\r
- 1306 0036 00                  .byte   0\r
- 1307 0037 00                  .byte   0\r
- 1308 0038 05                  .uleb128 0x5\r
- 1309 0039 35                  .uleb128 0x35\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 34\r
-\r
-\r
- 1310 003a 00                  .byte   0\r
- 1311 003b 49                  .uleb128 0x49\r
- 1312 003c 13                  .uleb128 0x13\r
- 1313 003d 00                  .byte   0\r
- 1314 003e 00                  .byte   0\r
- 1315 003f 06                  .uleb128 0x6\r
- 1316 0040 2E                  .uleb128 0x2e\r
- 1317 0041 01                  .byte   0x1\r
- 1318 0042 3F                  .uleb128 0x3f\r
- 1319 0043 0C                  .uleb128 0xc\r
- 1320 0044 03                  .uleb128 0x3\r
- 1321 0045 0E                  .uleb128 0xe\r
- 1322 0046 3A                  .uleb128 0x3a\r
- 1323 0047 0B                  .uleb128 0xb\r
- 1324 0048 3B                  .uleb128 0x3b\r
- 1325 0049 0B                  .uleb128 0xb\r
- 1326 004a 27                  .uleb128 0x27\r
- 1327 004b 0C                  .uleb128 0xc\r
- 1328 004c 11                  .uleb128 0x11\r
- 1329 004d 01                  .uleb128 0x1\r
- 1330 004e 12                  .uleb128 0x12\r
- 1331 004f 01                  .uleb128 0x1\r
- 1332 0050 40                  .uleb128 0x40\r
- 1333 0051 06                  .uleb128 0x6\r
- 1334 0052 9742                .uleb128 0x2117\r
- 1335 0054 0C                  .uleb128 0xc\r
- 1336 0055 01                  .uleb128 0x1\r
- 1337 0056 13                  .uleb128 0x13\r
- 1338 0057 00                  .byte   0\r
- 1339 0058 00                  .byte   0\r
- 1340 0059 07                  .uleb128 0x7\r
- 1341 005a 34                  .uleb128 0x34\r
- 1342 005b 00                  .byte   0\r
- 1343 005c 03                  .uleb128 0x3\r
- 1344 005d 0E                  .uleb128 0xe\r
- 1345 005e 3A                  .uleb128 0x3a\r
- 1346 005f 0B                  .uleb128 0xb\r
- 1347 0060 3B                  .uleb128 0x3b\r
- 1348 0061 0B                  .uleb128 0xb\r
- 1349 0062 49                  .uleb128 0x49\r
- 1350 0063 13                  .uleb128 0x13\r
- 1351 0064 02                  .uleb128 0x2\r
- 1352 0065 06                  .uleb128 0x6\r
- 1353 0066 00                  .byte   0\r
- 1354 0067 00                  .byte   0\r
- 1355 0068 08                  .uleb128 0x8\r
- 1356 0069 898201              .uleb128 0x4109\r
- 1357 006c 00                  .byte   0\r
- 1358 006d 11                  .uleb128 0x11\r
- 1359 006e 01                  .uleb128 0x1\r
- 1360 006f 31                  .uleb128 0x31\r
- 1361 0070 13                  .uleb128 0x13\r
- 1362 0071 00                  .byte   0\r
- 1363 0072 00                  .byte   0\r
- 1364 0073 09                  .uleb128 0x9\r
- 1365 0074 898201              .uleb128 0x4109\r
- 1366 0077 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 35\r
-\r
-\r
- 1367 0078 11                  .uleb128 0x11\r
- 1368 0079 01                  .uleb128 0x1\r
- 1369 007a 9542                .uleb128 0x2115\r
- 1370 007c 0C                  .uleb128 0xc\r
- 1371 007d 31                  .uleb128 0x31\r
- 1372 007e 13                  .uleb128 0x13\r
- 1373 007f 00                  .byte   0\r
- 1374 0080 00                  .byte   0\r
- 1375 0081 0A                  .uleb128 0xa\r
- 1376 0082 2E                  .uleb128 0x2e\r
- 1377 0083 01                  .byte   0x1\r
- 1378 0084 3F                  .uleb128 0x3f\r
- 1379 0085 0C                  .uleb128 0xc\r
- 1380 0086 03                  .uleb128 0x3\r
- 1381 0087 0E                  .uleb128 0xe\r
- 1382 0088 3A                  .uleb128 0x3a\r
- 1383 0089 0B                  .uleb128 0xb\r
- 1384 008a 3B                  .uleb128 0x3b\r
- 1385 008b 0B                  .uleb128 0xb\r
- 1386 008c 27                  .uleb128 0x27\r
- 1387 008d 0C                  .uleb128 0xc\r
- 1388 008e 49                  .uleb128 0x49\r
- 1389 008f 13                  .uleb128 0x13\r
- 1390 0090 11                  .uleb128 0x11\r
- 1391 0091 01                  .uleb128 0x1\r
- 1392 0092 12                  .uleb128 0x12\r
- 1393 0093 01                  .uleb128 0x1\r
- 1394 0094 40                  .uleb128 0x40\r
- 1395 0095 06                  .uleb128 0x6\r
- 1396 0096 9742                .uleb128 0x2117\r
- 1397 0098 0C                  .uleb128 0xc\r
- 1398 0099 01                  .uleb128 0x1\r
- 1399 009a 13                  .uleb128 0x13\r
- 1400 009b 00                  .byte   0\r
- 1401 009c 00                  .byte   0\r
- 1402 009d 0B                  .uleb128 0xb\r
- 1403 009e 05                  .uleb128 0x5\r
- 1404 009f 00                  .byte   0\r
- 1405 00a0 03                  .uleb128 0x3\r
- 1406 00a1 0E                  .uleb128 0xe\r
- 1407 00a2 3A                  .uleb128 0x3a\r
- 1408 00a3 0B                  .uleb128 0xb\r
- 1409 00a4 3B                  .uleb128 0x3b\r
- 1410 00a5 0B                  .uleb128 0xb\r
- 1411 00a6 49                  .uleb128 0x49\r
- 1412 00a7 13                  .uleb128 0x13\r
- 1413 00a8 02                  .uleb128 0x2\r
- 1414 00a9 06                  .uleb128 0x6\r
- 1415 00aa 00                  .byte   0\r
- 1416 00ab 00                  .byte   0\r
- 1417 00ac 0C                  .uleb128 0xc\r
- 1418 00ad 34                  .uleb128 0x34\r
- 1419 00ae 00                  .byte   0\r
- 1420 00af 03                  .uleb128 0x3\r
- 1421 00b0 08                  .uleb128 0x8\r
- 1422 00b1 3A                  .uleb128 0x3a\r
- 1423 00b2 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 36\r
-\r
-\r
- 1424 00b3 3B                  .uleb128 0x3b\r
- 1425 00b4 0B                  .uleb128 0xb\r
- 1426 00b5 49                  .uleb128 0x49\r
- 1427 00b6 13                  .uleb128 0x13\r
- 1428 00b7 02                  .uleb128 0x2\r
- 1429 00b8 06                  .uleb128 0x6\r
- 1430 00b9 00                  .byte   0\r
- 1431 00ba 00                  .byte   0\r
- 1432 00bb 0D                  .uleb128 0xd\r
- 1433 00bc 898201              .uleb128 0x4109\r
- 1434 00bf 01                  .byte   0x1\r
- 1435 00c0 11                  .uleb128 0x11\r
- 1436 00c1 01                  .uleb128 0x1\r
- 1437 00c2 31                  .uleb128 0x31\r
- 1438 00c3 13                  .uleb128 0x13\r
- 1439 00c4 00                  .byte   0\r
- 1440 00c5 00                  .byte   0\r
- 1441 00c6 0E                  .uleb128 0xe\r
- 1442 00c7 8A8201              .uleb128 0x410a\r
- 1443 00ca 00                  .byte   0\r
- 1444 00cb 02                  .uleb128 0x2\r
- 1445 00cc 0A                  .uleb128 0xa\r
- 1446 00cd 9142                .uleb128 0x2111\r
- 1447 00cf 0A                  .uleb128 0xa\r
- 1448 00d0 00                  .byte   0\r
- 1449 00d1 00                  .byte   0\r
- 1450 00d2 0F                  .uleb128 0xf\r
- 1451 00d3 0F                  .uleb128 0xf\r
- 1452 00d4 00                  .byte   0\r
- 1453 00d5 0B                  .uleb128 0xb\r
- 1454 00d6 0B                  .uleb128 0xb\r
- 1455 00d7 49                  .uleb128 0x49\r
- 1456 00d8 13                  .uleb128 0x13\r
- 1457 00d9 00                  .byte   0\r
- 1458 00da 00                  .byte   0\r
- 1459 00db 10                  .uleb128 0x10\r
- 1460 00dc 05                  .uleb128 0x5\r
- 1461 00dd 00                  .byte   0\r
- 1462 00de 03                  .uleb128 0x3\r
- 1463 00df 0E                  .uleb128 0xe\r
- 1464 00e0 3A                  .uleb128 0x3a\r
- 1465 00e1 0B                  .uleb128 0xb\r
- 1466 00e2 3B                  .uleb128 0x3b\r
- 1467 00e3 0B                  .uleb128 0xb\r
- 1468 00e4 49                  .uleb128 0x49\r
- 1469 00e5 13                  .uleb128 0x13\r
- 1470 00e6 02                  .uleb128 0x2\r
- 1471 00e7 0A                  .uleb128 0xa\r
- 1472 00e8 00                  .byte   0\r
- 1473 00e9 00                  .byte   0\r
- 1474 00ea 11                  .uleb128 0x11\r
- 1475 00eb 26                  .uleb128 0x26\r
- 1476 00ec 00                  .byte   0\r
- 1477 00ed 49                  .uleb128 0x49\r
- 1478 00ee 13                  .uleb128 0x13\r
- 1479 00ef 00                  .byte   0\r
- 1480 00f0 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 37\r
-\r
-\r
- 1481 00f1 12                  .uleb128 0x12\r
- 1482 00f2 34                  .uleb128 0x34\r
- 1483 00f3 00                  .byte   0\r
- 1484 00f4 03                  .uleb128 0x3\r
- 1485 00f5 08                  .uleb128 0x8\r
- 1486 00f6 3A                  .uleb128 0x3a\r
- 1487 00f7 0B                  .uleb128 0xb\r
- 1488 00f8 3B                  .uleb128 0x3b\r
- 1489 00f9 05                  .uleb128 0x5\r
- 1490 00fa 49                  .uleb128 0x49\r
- 1491 00fb 13                  .uleb128 0x13\r
- 1492 00fc 00                  .byte   0\r
- 1493 00fd 00                  .byte   0\r
- 1494 00fe 13                  .uleb128 0x13\r
- 1495 00ff 2E                  .uleb128 0x2e\r
- 1496 0100 01                  .byte   0x1\r
- 1497 0101 3F                  .uleb128 0x3f\r
- 1498 0102 0C                  .uleb128 0xc\r
- 1499 0103 03                  .uleb128 0x3\r
- 1500 0104 0E                  .uleb128 0xe\r
- 1501 0105 3A                  .uleb128 0x3a\r
- 1502 0106 0B                  .uleb128 0xb\r
- 1503 0107 3B                  .uleb128 0x3b\r
- 1504 0108 05                  .uleb128 0x5\r
- 1505 0109 27                  .uleb128 0x27\r
- 1506 010a 0C                  .uleb128 0xc\r
- 1507 010b 49                  .uleb128 0x49\r
- 1508 010c 13                  .uleb128 0x13\r
- 1509 010d 11                  .uleb128 0x11\r
- 1510 010e 01                  .uleb128 0x1\r
- 1511 010f 12                  .uleb128 0x12\r
- 1512 0110 01                  .uleb128 0x1\r
- 1513 0111 40                  .uleb128 0x40\r
- 1514 0112 06                  .uleb128 0x6\r
- 1515 0113 9742                .uleb128 0x2117\r
- 1516 0115 0C                  .uleb128 0xc\r
- 1517 0116 01                  .uleb128 0x1\r
- 1518 0117 13                  .uleb128 0x13\r
- 1519 0118 00                  .byte   0\r
- 1520 0119 00                  .byte   0\r
- 1521 011a 14                  .uleb128 0x14\r
- 1522 011b 05                  .uleb128 0x5\r
- 1523 011c 00                  .byte   0\r
- 1524 011d 03                  .uleb128 0x3\r
- 1525 011e 0E                  .uleb128 0xe\r
- 1526 011f 3A                  .uleb128 0x3a\r
- 1527 0120 0B                  .uleb128 0xb\r
- 1528 0121 3B                  .uleb128 0x3b\r
- 1529 0122 05                  .uleb128 0x5\r
- 1530 0123 49                  .uleb128 0x49\r
- 1531 0124 13                  .uleb128 0x13\r
- 1532 0125 02                  .uleb128 0x2\r
- 1533 0126 06                  .uleb128 0x6\r
- 1534 0127 00                  .byte   0\r
- 1535 0128 00                  .byte   0\r
- 1536 0129 15                  .uleb128 0x15\r
- 1537 012a 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 38\r
-\r
-\r
- 1538 012b 00                  .byte   0\r
- 1539 012c 03                  .uleb128 0x3\r
- 1540 012d 0E                  .uleb128 0xe\r
- 1541 012e 3A                  .uleb128 0x3a\r
- 1542 012f 0B                  .uleb128 0xb\r
- 1543 0130 3B                  .uleb128 0x3b\r
- 1544 0131 05                  .uleb128 0x5\r
- 1545 0132 49                  .uleb128 0x49\r
- 1546 0133 13                  .uleb128 0x13\r
- 1547 0134 02                  .uleb128 0x2\r
- 1548 0135 0A                  .uleb128 0xa\r
- 1549 0136 00                  .byte   0\r
- 1550 0137 00                  .byte   0\r
- 1551 0138 16                  .uleb128 0x16\r
- 1552 0139 34                  .uleb128 0x34\r
- 1553 013a 00                  .byte   0\r
- 1554 013b 03                  .uleb128 0x3\r
- 1555 013c 0E                  .uleb128 0xe\r
- 1556 013d 3A                  .uleb128 0x3a\r
- 1557 013e 0B                  .uleb128 0xb\r
- 1558 013f 3B                  .uleb128 0x3b\r
- 1559 0140 05                  .uleb128 0x5\r
- 1560 0141 49                  .uleb128 0x49\r
- 1561 0142 13                  .uleb128 0x13\r
- 1562 0143 02                  .uleb128 0x2\r
- 1563 0144 06                  .uleb128 0x6\r
- 1564 0145 00                  .byte   0\r
- 1565 0146 00                  .byte   0\r
- 1566 0147 17                  .uleb128 0x17\r
- 1567 0148 2E                  .uleb128 0x2e\r
- 1568 0149 01                  .byte   0x1\r
- 1569 014a 3F                  .uleb128 0x3f\r
- 1570 014b 0C                  .uleb128 0xc\r
- 1571 014c 03                  .uleb128 0x3\r
- 1572 014d 0E                  .uleb128 0xe\r
- 1573 014e 3A                  .uleb128 0x3a\r
- 1574 014f 0B                  .uleb128 0xb\r
- 1575 0150 3B                  .uleb128 0x3b\r
- 1576 0151 05                  .uleb128 0x5\r
- 1577 0152 27                  .uleb128 0x27\r
- 1578 0153 0C                  .uleb128 0xc\r
- 1579 0154 49                  .uleb128 0x49\r
- 1580 0155 13                  .uleb128 0x13\r
- 1581 0156 11                  .uleb128 0x11\r
- 1582 0157 01                  .uleb128 0x1\r
- 1583 0158 12                  .uleb128 0x12\r
- 1584 0159 01                  .uleb128 0x1\r
- 1585 015a 40                  .uleb128 0x40\r
- 1586 015b 0A                  .uleb128 0xa\r
- 1587 015c 9742                .uleb128 0x2117\r
- 1588 015e 0C                  .uleb128 0xc\r
- 1589 015f 01                  .uleb128 0x1\r
- 1590 0160 13                  .uleb128 0x13\r
- 1591 0161 00                  .byte   0\r
- 1592 0162 00                  .byte   0\r
- 1593 0163 18                  .uleb128 0x18\r
- 1594 0164 2E                  .uleb128 0x2e\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 39\r
-\r
-\r
- 1595 0165 01                  .byte   0x1\r
- 1596 0166 3F                  .uleb128 0x3f\r
- 1597 0167 0C                  .uleb128 0xc\r
- 1598 0168 03                  .uleb128 0x3\r
- 1599 0169 0E                  .uleb128 0xe\r
- 1600 016a 3A                  .uleb128 0x3a\r
- 1601 016b 0B                  .uleb128 0xb\r
- 1602 016c 3B                  .uleb128 0x3b\r
- 1603 016d 05                  .uleb128 0x5\r
- 1604 016e 27                  .uleb128 0x27\r
- 1605 016f 0C                  .uleb128 0xc\r
- 1606 0170 11                  .uleb128 0x11\r
- 1607 0171 01                  .uleb128 0x1\r
- 1608 0172 12                  .uleb128 0x12\r
- 1609 0173 01                  .uleb128 0x1\r
- 1610 0174 40                  .uleb128 0x40\r
- 1611 0175 06                  .uleb128 0x6\r
- 1612 0176 9742                .uleb128 0x2117\r
- 1613 0178 0C                  .uleb128 0xc\r
- 1614 0179 01                  .uleb128 0x1\r
- 1615 017a 13                  .uleb128 0x13\r
- 1616 017b 00                  .byte   0\r
- 1617 017c 00                  .byte   0\r
- 1618 017d 19                  .uleb128 0x19\r
- 1619 017e 34                  .uleb128 0x34\r
- 1620 017f 00                  .byte   0\r
- 1621 0180 03                  .uleb128 0x3\r
- 1622 0181 0E                  .uleb128 0xe\r
- 1623 0182 3A                  .uleb128 0x3a\r
- 1624 0183 0B                  .uleb128 0xb\r
- 1625 0184 3B                  .uleb128 0x3b\r
- 1626 0185 0B                  .uleb128 0xb\r
- 1627 0186 49                  .uleb128 0x49\r
- 1628 0187 13                  .uleb128 0x13\r
- 1629 0188 02                  .uleb128 0x2\r
- 1630 0189 0A                  .uleb128 0xa\r
- 1631 018a 00                  .byte   0\r
- 1632 018b 00                  .byte   0\r
- 1633 018c 1A                  .uleb128 0x1a\r
- 1634 018d 34                  .uleb128 0x34\r
- 1635 018e 00                  .byte   0\r
- 1636 018f 03                  .uleb128 0x3\r
- 1637 0190 0E                  .uleb128 0xe\r
- 1638 0191 3A                  .uleb128 0x3a\r
- 1639 0192 0B                  .uleb128 0xb\r
- 1640 0193 3B                  .uleb128 0x3b\r
- 1641 0194 0B                  .uleb128 0xb\r
- 1642 0195 49                  .uleb128 0x49\r
- 1643 0196 13                  .uleb128 0x13\r
- 1644 0197 3F                  .uleb128 0x3f\r
- 1645 0198 0C                  .uleb128 0xc\r
- 1646 0199 02                  .uleb128 0x2\r
- 1647 019a 0A                  .uleb128 0xa\r
- 1648 019b 00                  .byte   0\r
- 1649 019c 00                  .byte   0\r
- 1650 019d 1B                  .uleb128 0x1b\r
- 1651 019e 2E                  .uleb128 0x2e\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 40\r
-\r
-\r
- 1652 019f 00                  .byte   0\r
- 1653 01a0 3F                  .uleb128 0x3f\r
- 1654 01a1 0C                  .uleb128 0xc\r
- 1655 01a2 03                  .uleb128 0x3\r
- 1656 01a3 0E                  .uleb128 0xe\r
- 1657 01a4 3A                  .uleb128 0x3a\r
- 1658 01a5 0B                  .uleb128 0xb\r
- 1659 01a6 3B                  .uleb128 0x3b\r
- 1660 01a7 0B                  .uleb128 0xb\r
- 1661 01a8 27                  .uleb128 0x27\r
- 1662 01a9 0C                  .uleb128 0xc\r
- 1663 01aa 49                  .uleb128 0x49\r
- 1664 01ab 13                  .uleb128 0x13\r
- 1665 01ac 3C                  .uleb128 0x3c\r
- 1666 01ad 0C                  .uleb128 0xc\r
- 1667 01ae 00                  .byte   0\r
- 1668 01af 00                  .byte   0\r
- 1669 01b0 1C                  .uleb128 0x1c\r
- 1670 01b1 2E                  .uleb128 0x2e\r
- 1671 01b2 01                  .byte   0x1\r
- 1672 01b3 3F                  .uleb128 0x3f\r
- 1673 01b4 0C                  .uleb128 0xc\r
- 1674 01b5 03                  .uleb128 0x3\r
- 1675 01b6 0E                  .uleb128 0xe\r
- 1676 01b7 3A                  .uleb128 0x3a\r
- 1677 01b8 0B                  .uleb128 0xb\r
- 1678 01b9 3B                  .uleb128 0x3b\r
- 1679 01ba 0B                  .uleb128 0xb\r
- 1680 01bb 27                  .uleb128 0x27\r
- 1681 01bc 0C                  .uleb128 0xc\r
- 1682 01bd 3C                  .uleb128 0x3c\r
- 1683 01be 0C                  .uleb128 0xc\r
- 1684 01bf 01                  .uleb128 0x1\r
- 1685 01c0 13                  .uleb128 0x13\r
- 1686 01c1 00                  .byte   0\r
- 1687 01c2 00                  .byte   0\r
- 1688 01c3 1D                  .uleb128 0x1d\r
- 1689 01c4 05                  .uleb128 0x5\r
- 1690 01c5 00                  .byte   0\r
- 1691 01c6 49                  .uleb128 0x49\r
- 1692 01c7 13                  .uleb128 0x13\r
- 1693 01c8 00                  .byte   0\r
- 1694 01c9 00                  .byte   0\r
- 1695 01ca 1E                  .uleb128 0x1e\r
- 1696 01cb 2E                  .uleb128 0x2e\r
- 1697 01cc 01                  .byte   0x1\r
- 1698 01cd 3F                  .uleb128 0x3f\r
- 1699 01ce 0C                  .uleb128 0xc\r
- 1700 01cf 03                  .uleb128 0x3\r
- 1701 01d0 0E                  .uleb128 0xe\r
- 1702 01d1 3A                  .uleb128 0x3a\r
- 1703 01d2 0B                  .uleb128 0xb\r
- 1704 01d3 3B                  .uleb128 0x3b\r
- 1705 01d4 0B                  .uleb128 0xb\r
- 1706 01d5 27                  .uleb128 0x27\r
- 1707 01d6 0C                  .uleb128 0xc\r
- 1708 01d7 3C                  .uleb128 0x3c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 41\r
-\r
-\r
- 1709 01d8 0C                  .uleb128 0xc\r
- 1710 01d9 00                  .byte   0\r
- 1711 01da 00                  .byte   0\r
- 1712 01db 00                  .byte   0\r
- 1713                          .section        .debug_loc,"",%progbits\r
- 1714                  .Ldebug_loc0:\r
- 1715                  .LLST0:\r
- 1716 0000 00000000            .4byte  .LFB0\r
- 1717 0004 02000000            .4byte  .LCFI0\r
- 1718 0008 0200                .2byte  0x2\r
- 1719 000a 7D                  .byte   0x7d\r
- 1720 000b 00                  .sleb128 0\r
- 1721 000c 02000000            .4byte  .LCFI0\r
- 1722 0010 24000000            .4byte  .LFE0\r
- 1723 0014 0200                .2byte  0x2\r
- 1724 0016 7D                  .byte   0x7d\r
- 1725 0017 08                  .sleb128 8\r
- 1726 0018 00000000            .4byte  0\r
- 1727 001c 00000000            .4byte  0\r
- 1728                  .LLST1:\r
- 1729 0020 06000000            .4byte  .LVL0\r
- 1730 0024 1F000000            .4byte  .LVL1-1\r
- 1731 0028 0100                .2byte  0x1\r
- 1732 002a 50                  .byte   0x50\r
- 1733 002b 00000000            .4byte  0\r
- 1734 002f 00000000            .4byte  0\r
- 1735                  .LLST2:\r
- 1736 0033 00000000            .4byte  .LFB1\r
- 1737 0037 02000000            .4byte  .LCFI1\r
- 1738 003b 0200                .2byte  0x2\r
- 1739 003d 7D                  .byte   0x7d\r
- 1740 003e 00                  .sleb128 0\r
- 1741 003f 02000000            .4byte  .LCFI1\r
- 1742 0043 24000000            .4byte  .LFE1\r
- 1743 0047 0200                .2byte  0x2\r
- 1744 0049 7D                  .byte   0x7d\r
- 1745 004a 08                  .sleb128 8\r
- 1746 004b 00000000            .4byte  0\r
- 1747 004f 00000000            .4byte  0\r
- 1748                  .LLST3:\r
- 1749 0053 06000000            .4byte  .LVL2\r
- 1750 0057 1F000000            .4byte  .LVL3-1\r
- 1751 005b 0100                .2byte  0x1\r
- 1752 005d 50                  .byte   0x50\r
- 1753 005e 00000000            .4byte  0\r
- 1754 0062 00000000            .4byte  0\r
- 1755                  .LLST4:\r
- 1756 0066 00000000            .4byte  .LFB2\r
- 1757 006a 02000000            .4byte  .LCFI2\r
- 1758 006e 0200                .2byte  0x2\r
- 1759 0070 7D                  .byte   0x7d\r
- 1760 0071 00                  .sleb128 0\r
- 1761 0072 02000000            .4byte  .LCFI2\r
- 1762 0076 34000000            .4byte  .LFE2\r
- 1763 007a 0200                .2byte  0x2\r
- 1764 007c 7D                  .byte   0x7d\r
- 1765 007d 10                  .sleb128 16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 42\r
-\r
-\r
- 1766 007e 00000000            .4byte  0\r
- 1767 0082 00000000            .4byte  0\r
- 1768                  .LLST5:\r
- 1769 0086 00000000            .4byte  .LVL4\r
- 1770 008a 08000000            .4byte  .LVL5\r
- 1771 008e 0100                .2byte  0x1\r
- 1772 0090 50                  .byte   0x50\r
- 1773 0091 08000000            .4byte  .LVL5\r
- 1774 0095 34000000            .4byte  .LFE2\r
- 1775 0099 0100                .2byte  0x1\r
- 1776 009b 56                  .byte   0x56\r
- 1777 009c 00000000            .4byte  0\r
- 1778 00a0 00000000            .4byte  0\r
- 1779                  .LLST6:\r
- 1780 00a4 00000000            .4byte  .LVL4\r
- 1781 00a8 08000000            .4byte  .LVL5\r
- 1782 00ac 0100                .2byte  0x1\r
- 1783 00ae 51                  .byte   0x51\r
- 1784 00af 08000000            .4byte  .LVL5\r
- 1785 00b3 34000000            .4byte  .LFE2\r
- 1786 00b7 0400                .2byte  0x4\r
- 1787 00b9 F3                  .byte   0xf3\r
- 1788 00ba 01                  .uleb128 0x1\r
- 1789 00bb 51                  .byte   0x51\r
- 1790 00bc 9F                  .byte   0x9f\r
- 1791 00bd 00000000            .4byte  0\r
- 1792 00c1 00000000            .4byte  0\r
- 1793                  .LLST7:\r
- 1794 00c5 00000000            .4byte  .LVL4\r
- 1795 00c9 08000000            .4byte  .LVL5\r
- 1796 00cd 0200                .2byte  0x2\r
- 1797 00cf 30                  .byte   0x30\r
- 1798 00d0 9F                  .byte   0x9f\r
- 1799 00d1 00000000            .4byte  0\r
- 1800 00d5 00000000            .4byte  0\r
- 1801                  .LLST8:\r
- 1802 00d9 00000000            .4byte  .LFB3\r
- 1803 00dd 04000000            .4byte  .LCFI3\r
- 1804 00e1 0200                .2byte  0x2\r
- 1805 00e3 7D                  .byte   0x7d\r
- 1806 00e4 00                  .sleb128 0\r
- 1807 00e5 04000000            .4byte  .LCFI3\r
- 1808 00e9 74000000            .4byte  .LFE3\r
- 1809 00ed 0200                .2byte  0x2\r
- 1810 00ef 7D                  .byte   0x7d\r
- 1811 00f0 10                  .sleb128 16\r
- 1812 00f1 00000000            .4byte  0\r
- 1813 00f5 00000000            .4byte  0\r
- 1814                  .LLST9:\r
- 1815 00f9 00000000            .4byte  .LVL7\r
- 1816 00fd 3C000000            .4byte  .LVL8\r
- 1817 0101 0100                .2byte  0x1\r
- 1818 0103 50                  .byte   0x50\r
- 1819 0104 3C000000            .4byte  .LVL8\r
- 1820 0108 4A000000            .4byte  .LVL11\r
- 1821 010c 0200                .2byte  0x2\r
- 1822 010e 74                  .byte   0x74\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 43\r
-\r
-\r
- 1823 010f 00                  .sleb128 0\r
- 1824 0110 4A000000            .4byte  .LVL11\r
- 1825 0114 54000000            .4byte  .LVL12\r
- 1826 0118 0500                .2byte  0x5\r
- 1827 011a 0C                  .byte   0xc\r
- 1828 011b 20470040            .4byte  0x40004720\r
- 1829 011f 54000000            .4byte  .LVL12\r
- 1830 0123 5A000000            .4byte  .LVL13\r
- 1831 0127 0200                .2byte  0x2\r
- 1832 0129 70                  .byte   0x70\r
- 1833 012a 00                  .sleb128 0\r
- 1834 012b 5A000000            .4byte  .LVL13\r
- 1835 012f 5E000000            .4byte  .LVL14\r
- 1836 0133 0500                .2byte  0x5\r
- 1837 0135 0C                  .byte   0xc\r
- 1838 0136 20470040            .4byte  0x40004720\r
- 1839 013a 5E000000            .4byte  .LVL14\r
- 1840 013e 60000000            .4byte  .LVL15\r
- 1841 0142 0100                .2byte  0x1\r
- 1842 0144 50                  .byte   0x50\r
- 1843 0145 60000000            .4byte  .LVL15\r
- 1844 0149 62000000            .4byte  .LVL16\r
- 1845 014d 0400                .2byte  0x4\r
- 1846 014f F3                  .byte   0xf3\r
- 1847 0150 01                  .uleb128 0x1\r
- 1848 0151 50                  .byte   0x50\r
- 1849 0152 9F                  .byte   0x9f\r
- 1850 0153 62000000            .4byte  .LVL16\r
- 1851 0157 64000000            .4byte  .LVL17\r
- 1852 015b 0100                .2byte  0x1\r
- 1853 015d 50                  .byte   0x50\r
- 1854 015e 64000000            .4byte  .LVL17\r
- 1855 0162 66000000            .4byte  .LVL18\r
- 1856 0166 0400                .2byte  0x4\r
- 1857 0168 F3                  .byte   0xf3\r
- 1858 0169 01                  .uleb128 0x1\r
- 1859 016a 50                  .byte   0x50\r
- 1860 016b 9F                  .byte   0x9f\r
- 1861 016c 66000000            .4byte  .LVL18\r
- 1862 0170 68000000            .4byte  .LVL19\r
- 1863 0174 0100                .2byte  0x1\r
- 1864 0176 50                  .byte   0x50\r
- 1865 0177 68000000            .4byte  .LVL19\r
- 1866 017b 74000000            .4byte  .LFE3\r
- 1867 017f 0400                .2byte  0x4\r
- 1868 0181 F3                  .byte   0xf3\r
- 1869 0182 01                  .uleb128 0x1\r
- 1870 0183 50                  .byte   0x50\r
- 1871 0184 9F                  .byte   0x9f\r
- 1872 0185 00000000            .4byte  0\r
- 1873 0189 00000000            .4byte  0\r
- 1874                  .LLST10:\r
- 1875 018d 00000000            .4byte  .LVL7\r
- 1876 0191 40000000            .4byte  .LVL9\r
- 1877 0195 0100                .2byte  0x1\r
- 1878 0197 51                  .byte   0x51\r
- 1879 0198 40000000            .4byte  .LVL9\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 44\r
-\r
-\r
- 1880 019c 5E000000            .4byte  .LVL14\r
- 1881 01a0 0400                .2byte  0x4\r
- 1882 01a2 F3                  .byte   0xf3\r
- 1883 01a3 01                  .uleb128 0x1\r
- 1884 01a4 51                  .byte   0x51\r
- 1885 01a5 9F                  .byte   0x9f\r
- 1886 01a6 5E000000            .4byte  .LVL14\r
- 1887 01aa 74000000            .4byte  .LFE3\r
- 1888 01ae 0100                .2byte  0x1\r
- 1889 01b0 51                  .byte   0x51\r
- 1890 01b1 00000000            .4byte  0\r
- 1891 01b5 00000000            .4byte  0\r
- 1892                  .LLST11:\r
- 1893 01b9 00000000            .4byte  .LVL7\r
- 1894 01bd 68000000            .4byte  .LVL19\r
- 1895 01c1 0200                .2byte  0x2\r
- 1896 01c3 37                  .byte   0x37\r
- 1897 01c4 9F                  .byte   0x9f\r
- 1898 01c5 68000000            .4byte  .LVL19\r
- 1899 01c9 74000000            .4byte  .LFE3\r
- 1900 01cd 0100                .2byte  0x1\r
- 1901 01cf 50                  .byte   0x50\r
- 1902 01d0 00000000            .4byte  0\r
- 1903 01d4 00000000            .4byte  0\r
- 1904                  .LLST12:\r
- 1905 01d8 48000000            .4byte  .LVL10\r
- 1906 01dc 4A000000            .4byte  .LVL11\r
- 1907 01e0 0200                .2byte  0x2\r
- 1908 01e2 30                  .byte   0x30\r
- 1909 01e3 9F                  .byte   0x9f\r
- 1910 01e4 00000000            .4byte  0\r
- 1911 01e8 00000000            .4byte  0\r
- 1912                  .LLST13:\r
- 1913 01ec 00000000            .4byte  .LFB4\r
- 1914 01f0 02000000            .4byte  .LCFI4\r
- 1915 01f4 0200                .2byte  0x2\r
- 1916 01f6 7D                  .byte   0x7d\r
- 1917 01f7 00                  .sleb128 0\r
- 1918 01f8 02000000            .4byte  .LCFI4\r
- 1919 01fc 4C000000            .4byte  .LFE4\r
- 1920 0200 0200                .2byte  0x2\r
- 1921 0202 7D                  .byte   0x7d\r
- 1922 0203 0C                  .sleb128 12\r
- 1923 0204 00000000            .4byte  0\r
- 1924 0208 00000000            .4byte  0\r
- 1925                  .LLST14:\r
- 1926 020c 00000000            .4byte  .LVL20\r
- 1927 0210 26000000            .4byte  .LVL21\r
- 1928 0214 0100                .2byte  0x1\r
- 1929 0216 50                  .byte   0x50\r
- 1930 0217 26000000            .4byte  .LVL21\r
- 1931 021b 30000000            .4byte  .LVL22\r
- 1932 021f 0500                .2byte  0x5\r
- 1933 0221 0C                  .byte   0xc\r
- 1934 0222 20470040            .4byte  0x40004720\r
- 1935 0226 30000000            .4byte  .LVL22\r
- 1936 022a 36000000            .4byte  .LVL23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 45\r
-\r
-\r
- 1937 022e 0200                .2byte  0x2\r
- 1938 0230 70                  .byte   0x70\r
- 1939 0231 00                  .sleb128 0\r
- 1940 0232 36000000            .4byte  .LVL23\r
- 1941 0236 3A000000            .4byte  .LVL24\r
- 1942 023a 0500                .2byte  0x5\r
- 1943 023c 0C                  .byte   0xc\r
- 1944 023d 20470040            .4byte  0x40004720\r
- 1945 0241 3A000000            .4byte  .LVL24\r
- 1946 0245 3C000000            .4byte  .LVL25\r
- 1947 0249 0100                .2byte  0x1\r
- 1948 024b 50                  .byte   0x50\r
- 1949 024c 3C000000            .4byte  .LVL25\r
- 1950 0250 3E000000            .4byte  .LVL26\r
- 1951 0254 0400                .2byte  0x4\r
- 1952 0256 F3                  .byte   0xf3\r
- 1953 0257 01                  .uleb128 0x1\r
- 1954 0258 50                  .byte   0x50\r
- 1955 0259 9F                  .byte   0x9f\r
- 1956 025a 3E000000            .4byte  .LVL26\r
- 1957 025e 40000000            .4byte  .LVL27\r
- 1958 0262 0100                .2byte  0x1\r
- 1959 0264 50                  .byte   0x50\r
- 1960 0265 40000000            .4byte  .LVL27\r
- 1961 0269 4C000000            .4byte  .LFE4\r
- 1962 026d 0400                .2byte  0x4\r
- 1963 026f F3                  .byte   0xf3\r
- 1964 0270 01                  .uleb128 0x1\r
- 1965 0271 50                  .byte   0x50\r
- 1966 0272 9F                  .byte   0x9f\r
- 1967 0273 00000000            .4byte  0\r
- 1968 0277 00000000            .4byte  0\r
- 1969                  .LLST15:\r
- 1970 027b 00000000            .4byte  .LVL20\r
- 1971 027f 40000000            .4byte  .LVL27\r
- 1972 0283 0200                .2byte  0x2\r
- 1973 0285 37                  .byte   0x37\r
- 1974 0286 9F                  .byte   0x9f\r
- 1975 0287 40000000            .4byte  .LVL27\r
- 1976 028b 4C000000            .4byte  .LFE4\r
- 1977 028f 0100                .2byte  0x1\r
- 1978 0291 50                  .byte   0x50\r
- 1979 0292 00000000            .4byte  0\r
- 1980 0296 00000000            .4byte  0\r
- 1981                  .LLST16:\r
- 1982 029a 00000000            .4byte  .LFB5\r
- 1983 029e 02000000            .4byte  .LCFI5\r
- 1984 02a2 0200                .2byte  0x2\r
- 1985 02a4 7D                  .byte   0x7d\r
- 1986 02a5 00                  .sleb128 0\r
- 1987 02a6 02000000            .4byte  .LCFI5\r
- 1988 02aa 48000000            .4byte  .LFE5\r
- 1989 02ae 0200                .2byte  0x2\r
- 1990 02b0 7D                  .byte   0x7d\r
- 1991 02b1 10                  .sleb128 16\r
- 1992 02b2 00000000            .4byte  0\r
- 1993 02b6 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 46\r
-\r
-\r
- 1994                  .LLST17:\r
- 1995 02ba 00000000            .4byte  .LVL28\r
- 1996 02be 2A000000            .4byte  .LVL29\r
- 1997 02c2 0100                .2byte  0x1\r
- 1998 02c4 50                  .byte   0x50\r
- 1999 02c5 2A000000            .4byte  .LVL29\r
- 2000 02c9 38000000            .4byte  .LVL31\r
- 2001 02cd 0200                .2byte  0x2\r
- 2002 02cf 74                  .byte   0x74\r
- 2003 02d0 00                  .sleb128 0\r
- 2004 02d1 38000000            .4byte  .LVL31\r
- 2005 02d5 3A000000            .4byte  .LVL32\r
- 2006 02d9 0100                .2byte  0x1\r
- 2007 02db 50                  .byte   0x50\r
- 2008 02dc 3A000000            .4byte  .LVL32\r
- 2009 02e0 3C000000            .4byte  .LVL33\r
- 2010 02e4 0400                .2byte  0x4\r
- 2011 02e6 F3                  .byte   0xf3\r
- 2012 02e7 01                  .uleb128 0x1\r
- 2013 02e8 50                  .byte   0x50\r
- 2014 02e9 9F                  .byte   0x9f\r
- 2015 02ea 3C000000            .4byte  .LVL33\r
- 2016 02ee 3E000000            .4byte  .LVL34\r
- 2017 02f2 0100                .2byte  0x1\r
- 2018 02f4 50                  .byte   0x50\r
- 2019 02f5 3E000000            .4byte  .LVL34\r
- 2020 02f9 48000000            .4byte  .LFE5\r
- 2021 02fd 0400                .2byte  0x4\r
- 2022 02ff F3                  .byte   0xf3\r
- 2023 0300 01                  .uleb128 0x1\r
- 2024 0301 50                  .byte   0x50\r
- 2025 0302 9F                  .byte   0x9f\r
- 2026 0303 00000000            .4byte  0\r
- 2027 0307 00000000            .4byte  0\r
- 2028                  .LLST18:\r
- 2029 030b 00000000            .4byte  .LVL28\r
- 2030 030f 2C000000            .4byte  .LVL30\r
- 2031 0313 0100                .2byte  0x1\r
- 2032 0315 51                  .byte   0x51\r
- 2033 0316 2C000000            .4byte  .LVL30\r
- 2034 031a 38000000            .4byte  .LVL31\r
- 2035 031e 0400                .2byte  0x4\r
- 2036 0320 F3                  .byte   0xf3\r
- 2037 0321 01                  .uleb128 0x1\r
- 2038 0322 51                  .byte   0x51\r
- 2039 0323 9F                  .byte   0x9f\r
- 2040 0324 38000000            .4byte  .LVL31\r
- 2041 0328 48000000            .4byte  .LFE5\r
- 2042 032c 0100                .2byte  0x1\r
- 2043 032e 51                  .byte   0x51\r
- 2044 032f 00000000            .4byte  0\r
- 2045 0333 00000000            .4byte  0\r
- 2046                  .LLST19:\r
- 2047 0337 00000000            .4byte  .LVL28\r
- 2048 033b 3E000000            .4byte  .LVL34\r
- 2049 033f 0200                .2byte  0x2\r
- 2050 0341 37                  .byte   0x37\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 47\r
-\r
-\r
- 2051 0342 9F                  .byte   0x9f\r
- 2052 0343 3E000000            .4byte  .LVL34\r
- 2053 0347 48000000            .4byte  .LFE5\r
- 2054 034b 0100                .2byte  0x1\r
- 2055 034d 50                  .byte   0x50\r
- 2056 034e 00000000            .4byte  0\r
- 2057 0352 00000000            .4byte  0\r
- 2058                  .LLST20:\r
- 2059 0356 00000000            .4byte  .LFB6\r
- 2060 035a 02000000            .4byte  .LCFI6\r
- 2061 035e 0200                .2byte  0x2\r
- 2062 0360 7D                  .byte   0x7d\r
- 2063 0361 00                  .sleb128 0\r
- 2064 0362 02000000            .4byte  .LCFI6\r
- 2065 0366 40000000            .4byte  .LFE6\r
- 2066 036a 0200                .2byte  0x2\r
- 2067 036c 7D                  .byte   0x7d\r
- 2068 036d 08                  .sleb128 8\r
- 2069 036e 00000000            .4byte  0\r
- 2070 0372 00000000            .4byte  0\r
- 2071                  .LLST21:\r
- 2072 0376 00000000            .4byte  .LVL35\r
- 2073 037a 2C000000            .4byte  .LVL36\r
- 2074 037e 0100                .2byte  0x1\r
- 2075 0380 50                  .byte   0x50\r
- 2076 0381 2C000000            .4byte  .LVL36\r
- 2077 0385 2E000000            .4byte  .LVL37\r
- 2078 0389 0200                .2byte  0x2\r
- 2079 038b 73                  .byte   0x73\r
- 2080 038c 00                  .sleb128 0\r
- 2081 038d 2E000000            .4byte  .LVL37\r
- 2082 0391 30000000            .4byte  .LVL38\r
- 2083 0395 0100                .2byte  0x1\r
- 2084 0397 50                  .byte   0x50\r
- 2085 0398 30000000            .4byte  .LVL38\r
- 2086 039c 32000000            .4byte  .LVL39\r
- 2087 03a0 0400                .2byte  0x4\r
- 2088 03a2 F3                  .byte   0xf3\r
- 2089 03a3 01                  .uleb128 0x1\r
- 2090 03a4 50                  .byte   0x50\r
- 2091 03a5 9F                  .byte   0x9f\r
- 2092 03a6 32000000            .4byte  .LVL39\r
- 2093 03aa 34000000            .4byte  .LVL40\r
- 2094 03ae 0100                .2byte  0x1\r
- 2095 03b0 50                  .byte   0x50\r
- 2096 03b1 34000000            .4byte  .LVL40\r
- 2097 03b5 40000000            .4byte  .LFE6\r
- 2098 03b9 0400                .2byte  0x4\r
- 2099 03bb F3                  .byte   0xf3\r
- 2100 03bc 01                  .uleb128 0x1\r
- 2101 03bd 50                  .byte   0x50\r
- 2102 03be 9F                  .byte   0x9f\r
- 2103 03bf 00000000            .4byte  0\r
- 2104 03c3 00000000            .4byte  0\r
- 2105                  .LLST22:\r
- 2106 03c7 00000000            .4byte  .LVL35\r
- 2107 03cb 34000000            .4byte  .LVL40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 48\r
-\r
-\r
- 2108 03cf 0200                .2byte  0x2\r
- 2109 03d1 37                  .byte   0x37\r
- 2110 03d2 9F                  .byte   0x9f\r
- 2111 03d3 34000000            .4byte  .LVL40\r
- 2112 03d7 40000000            .4byte  .LFE6\r
- 2113 03db 0100                .2byte  0x1\r
- 2114 03dd 50                  .byte   0x50\r
- 2115 03de 00000000            .4byte  0\r
- 2116 03e2 00000000            .4byte  0\r
- 2117                  .LLST23:\r
- 2118 03e6 00000000            .4byte  .LVL41\r
- 2119 03ea 28000000            .4byte  .LVL42\r
- 2120 03ee 0100                .2byte  0x1\r
- 2121 03f0 50                  .byte   0x50\r
- 2122 03f1 28000000            .4byte  .LVL42\r
- 2123 03f5 2A000000            .4byte  .LVL43\r
- 2124 03f9 0200                .2byte  0x2\r
- 2125 03fb 73                  .byte   0x73\r
- 2126 03fc 00                  .sleb128 0\r
- 2127 03fd 2A000000            .4byte  .LVL43\r
- 2128 0401 2C000000            .4byte  .LVL44\r
- 2129 0405 0100                .2byte  0x1\r
- 2130 0407 50                  .byte   0x50\r
- 2131 0408 2C000000            .4byte  .LVL44\r
- 2132 040c 2E000000            .4byte  .LVL45\r
- 2133 0410 0400                .2byte  0x4\r
- 2134 0412 F3                  .byte   0xf3\r
- 2135 0413 01                  .uleb128 0x1\r
- 2136 0414 50                  .byte   0x50\r
- 2137 0415 9F                  .byte   0x9f\r
- 2138 0416 2E000000            .4byte  .LVL45\r
- 2139 041a 30000000            .4byte  .LVL46\r
- 2140 041e 0100                .2byte  0x1\r
- 2141 0420 50                  .byte   0x50\r
- 2142 0421 30000000            .4byte  .LVL46\r
- 2143 0425 3C000000            .4byte  .LFE7\r
- 2144 0429 0400                .2byte  0x4\r
- 2145 042b F3                  .byte   0xf3\r
- 2146 042c 01                  .uleb128 0x1\r
- 2147 042d 50                  .byte   0x50\r
- 2148 042e 9F                  .byte   0x9f\r
- 2149 042f 00000000            .4byte  0\r
- 2150 0433 00000000            .4byte  0\r
- 2151                  .LLST24:\r
- 2152 0437 00000000            .4byte  .LVL41\r
- 2153 043b 30000000            .4byte  .LVL46\r
- 2154 043f 0200                .2byte  0x2\r
- 2155 0441 37                  .byte   0x37\r
- 2156 0442 9F                  .byte   0x9f\r
- 2157 0443 30000000            .4byte  .LVL46\r
- 2158 0447 3C000000            .4byte  .LFE7\r
- 2159 044b 0100                .2byte  0x1\r
- 2160 044d 50                  .byte   0x50\r
- 2161 044e 00000000            .4byte  0\r
- 2162 0452 00000000            .4byte  0\r
- 2163                  .LLST25:\r
- 2164 0456 00000000            .4byte  .LFB8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 49\r
-\r
-\r
- 2165 045a 02000000            .4byte  .LCFI7\r
- 2166 045e 0200                .2byte  0x2\r
- 2167 0460 7D                  .byte   0x7d\r
- 2168 0461 00                  .sleb128 0\r
- 2169 0462 02000000            .4byte  .LCFI7\r
- 2170 0466 40000000            .4byte  .LFE8\r
- 2171 046a 0200                .2byte  0x2\r
- 2172 046c 7D                  .byte   0x7d\r
- 2173 046d 10                  .sleb128 16\r
- 2174 046e 00000000            .4byte  0\r
- 2175 0472 00000000            .4byte  0\r
- 2176                  .LLST26:\r
- 2177 0476 00000000            .4byte  .LVL47\r
- 2178 047a 12000000            .4byte  .LVL49\r
- 2179 047e 0200                .2byte  0x2\r
- 2180 0480 34                  .byte   0x34\r
- 2181 0481 9F                  .byte   0x9f\r
- 2182 0482 12000000            .4byte  .LVL49\r
- 2183 0486 2C000000            .4byte  .LVL50\r
- 2184 048a 0200                .2byte  0x2\r
- 2185 048c 30                  .byte   0x30\r
- 2186 048d 9F                  .byte   0x9f\r
- 2187 048e 2C000000            .4byte  .LVL50\r
- 2188 0492 2E000000            .4byte  .LVL51\r
- 2189 0496 0200                .2byte  0x2\r
- 2190 0498 34                  .byte   0x34\r
- 2191 0499 9F                  .byte   0x9f\r
- 2192 049a 2E000000            .4byte  .LVL51\r
- 2193 049e 40000000            .4byte  .LFE8\r
- 2194 04a2 0100                .2byte  0x1\r
- 2195 04a4 54                  .byte   0x54\r
- 2196 04a5 00000000            .4byte  0\r
- 2197 04a9 00000000            .4byte  0\r
- 2198                  .LLST27:\r
- 2199 04ad 06000000            .4byte  .LVL48\r
- 2200 04b1 31000000            .4byte  .LVL52-1\r
- 2201 04b5 0100                .2byte  0x1\r
- 2202 04b7 50                  .byte   0x50\r
- 2203 04b8 00000000            .4byte  0\r
- 2204 04bc 00000000            .4byte  0\r
- 2205                  .LLST28:\r
- 2206 04c0 00000000            .4byte  .LFB9\r
- 2207 04c4 02000000            .4byte  .LCFI8\r
- 2208 04c8 0200                .2byte  0x2\r
- 2209 04ca 7D                  .byte   0x7d\r
- 2210 04cb 00                  .sleb128 0\r
- 2211 04cc 02000000            .4byte  .LCFI8\r
- 2212 04d0 34000000            .4byte  .LFE9\r
- 2213 04d4 0200                .2byte  0x2\r
- 2214 04d6 7D                  .byte   0x7d\r
- 2215 04d7 08                  .sleb128 8\r
- 2216 04d8 00000000            .4byte  0\r
- 2217 04dc 00000000            .4byte  0\r
- 2218                  .LLST29:\r
- 2219 04e0 06000000            .4byte  .LVL53\r
- 2220 04e4 2B000000            .4byte  .LVL54-1\r
- 2221 04e8 0100                .2byte  0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 50\r
-\r
-\r
- 2222 04ea 50                  .byte   0x50\r
- 2223 04eb 00000000            .4byte  0\r
- 2224 04ef 00000000            .4byte  0\r
- 2225                          .section        .debug_aranges,"",%progbits\r
- 2226 0000 64000000            .4byte  0x64\r
- 2227 0004 0200                .2byte  0x2\r
- 2228 0006 00000000            .4byte  .Ldebug_info0\r
- 2229 000a 04                  .byte   0x4\r
- 2230 000b 00                  .byte   0\r
- 2231 000c 0000                .2byte  0\r
- 2232 000e 0000                .2byte  0\r
- 2233 0010 00000000            .4byte  .LFB0\r
- 2234 0014 24000000            .4byte  .LFE0-.LFB0\r
- 2235 0018 00000000            .4byte  .LFB1\r
- 2236 001c 24000000            .4byte  .LFE1-.LFB1\r
- 2237 0020 00000000            .4byte  .LFB2\r
- 2238 0024 34000000            .4byte  .LFE2-.LFB2\r
- 2239 0028 00000000            .4byte  .LFB3\r
- 2240 002c 74000000            .4byte  .LFE3-.LFB3\r
- 2241 0030 00000000            .4byte  .LFB4\r
- 2242 0034 4C000000            .4byte  .LFE4-.LFB4\r
- 2243 0038 00000000            .4byte  .LFB5\r
- 2244 003c 48000000            .4byte  .LFE5-.LFB5\r
- 2245 0040 00000000            .4byte  .LFB6\r
- 2246 0044 40000000            .4byte  .LFE6-.LFB6\r
- 2247 0048 00000000            .4byte  .LFB7\r
- 2248 004c 3C000000            .4byte  .LFE7-.LFB7\r
- 2249 0050 00000000            .4byte  .LFB8\r
- 2250 0054 40000000            .4byte  .LFE8-.LFB8\r
- 2251 0058 00000000            .4byte  .LFB9\r
- 2252 005c 34000000            .4byte  .LFE9-.LFB9\r
- 2253 0060 00000000            .4byte  0\r
- 2254 0064 00000000            .4byte  0\r
- 2255                          .section        .debug_ranges,"",%progbits\r
- 2256                  .Ldebug_ranges0:\r
- 2257 0000 00000000            .4byte  .LFB0\r
- 2258 0004 24000000            .4byte  .LFE0\r
- 2259 0008 00000000            .4byte  .LFB1\r
- 2260 000c 24000000            .4byte  .LFE1\r
- 2261 0010 00000000            .4byte  .LFB2\r
- 2262 0014 34000000            .4byte  .LFE2\r
- 2263 0018 00000000            .4byte  .LFB3\r
- 2264 001c 74000000            .4byte  .LFE3\r
- 2265 0020 00000000            .4byte  .LFB4\r
- 2266 0024 4C000000            .4byte  .LFE4\r
- 2267 0028 00000000            .4byte  .LFB5\r
- 2268 002c 48000000            .4byte  .LFE5\r
- 2269 0030 00000000            .4byte  .LFB6\r
- 2270 0034 40000000            .4byte  .LFE6\r
- 2271 0038 00000000            .4byte  .LFB7\r
- 2272 003c 3C000000            .4byte  .LFE7\r
- 2273 0040 00000000            .4byte  .LFB8\r
- 2274 0044 40000000            .4byte  .LFE8\r
- 2275 0048 00000000            .4byte  .LFB9\r
- 2276 004c 34000000            .4byte  .LFE9\r
- 2277 0050 00000000            .4byte  0\r
- 2278 0054 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 51\r
-\r
-\r
- 2279                          .section        .debug_line,"",%progbits\r
- 2280                  .Ldebug_line0:\r
- 2281 0000 B9010000            .section        .debug_str,"MS",%progbits,1\r
- 2281      02004F00 \r
- 2281      00000201 \r
- 2281      FB0E0D00 \r
- 2281      01010101 \r
- 2282                  .LASF25:\r
- 2283 0000 43795370            .ascii  "CySpcLoadMultiByte\000"\r
- 2283      634C6F61 \r
- 2283      644D756C \r
- 2283      74694279 \r
- 2283      746500\r
- 2284                  .LASF15:\r
- 2285 0013 63797374            .ascii  "cystatus\000"\r
- 2285      61747573 \r
- 2285      00\r
- 2286                  .LASF17:\r
- 2287 001c 72656733            .ascii  "reg32\000"\r
- 2287      3200\r
- 2288                  .LASF19:\r
- 2289 0022 43795370            .ascii  "CySpcStart\000"\r
- 2289      63537461 \r
- 2289      727400\r
- 2290                  .LASF30:\r
- 2291 002d 43795370            .ascii  "CySpcWriteRow\000"\r
- 2291      63577269 \r
- 2291      7465526F \r
- 2291      7700\r
- 2292                  .LASF20:\r
- 2293 003b 43795370            .ascii  "CySpcStop\000"\r
- 2293      6353746F \r
- 2293      7000\r
- 2294                  .LASF41:\r
- 2295 0045 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\CySpc.c\000"\r
- 2295      6E657261 \r
- 2295      7465645F \r
- 2295      536F7572 \r
- 2295      63655C50 \r
- 2296                  .LASF3:\r
- 2297 0066 73686F72            .ascii  "short unsigned int\000"\r
- 2297      7420756E \r
- 2297      7369676E \r
- 2297      65642069 \r
- 2297      6E7400\r
- 2298                  .LASF24:\r
- 2299 0079 43795370            .ascii  "CySpcReadData\000"\r
- 2299      63526561 \r
- 2299      64446174 \r
- 2299      6100\r
- 2300                  .LASF28:\r
- 2301 0087 73746174            .ascii  "status\000"\r
- 2301      757300\r
- 2302                  .LASF12:\r
- 2303 008e 666C6F61            .ascii  "float\000"\r
- 2303      7400\r
- 2304                  .LASF36:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 52\r
-\r
-\r
- 2305 0094 6E756D53            .ascii  "numSamples\000"\r
- 2305      616D706C \r
- 2305      657300\r
- 2306                  .LASF23:\r
- 2307 009f 73697A65            .ascii  "size\000"\r
- 2307      00\r
- 2308                  .LASF16:\r
- 2309 00a4 72656738            .ascii  "reg8\000"\r
- 2309      00\r
- 2310                  .LASF21:\r
- 2311 00a9 696E7465            .ascii  "interruptState\000"\r
- 2311      72727570 \r
- 2311      74537461 \r
- 2311      746500\r
- 2312                  .LASF5:\r
- 2313 00b8 6C6F6E67            .ascii  "long unsigned int\000"\r
- 2313      20756E73 \r
- 2313      69676E65 \r
- 2313      6420696E \r
- 2313      7400\r
- 2314                  .LASF42:\r
- 2315 00ca 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 2315      43534932 \r
- 2315      53445C73 \r
- 2315      6F667477 \r
- 2315      6172655C \r
- 2316 00f9 6E00                .ascii  "n\000"\r
- 2317                  .LASF9:\r
- 2318 00fb 75696E74            .ascii  "uint8\000"\r
- 2318      3800\r
- 2319                  .LASF43:\r
- 2320 0101 5370634C            .ascii  "SpcLockState\000"\r
- 2320      6F636B53 \r
- 2320      74617465 \r
- 2320      00\r
- 2321                  .LASF31:\r
- 2322 010e 74656D70            .ascii  "tempPolarity\000"\r
- 2322      506F6C61 \r
- 2322      72697479 \r
- 2322      00\r
- 2323                  .LASF26:\r
- 2324 011b 61727261            .ascii  "array\000"\r
- 2324      7900\r
- 2325                  .LASF1:\r
- 2326 0121 756E7369            .ascii  "unsigned char\000"\r
- 2326      676E6564 \r
- 2326      20636861 \r
- 2326      7200\r
- 2327                  .LASF13:\r
- 2328 012f 646F7562            .ascii  "double\000"\r
- 2328      6C6500\r
- 2329                  .LASF35:\r
- 2330 0136 43795370            .ascii  "CySpcGetTemp\000"\r
- 2330      63476574 \r
- 2330      54656D70 \r
- 2330      00\r
- 2331                  .LASF10:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 53\r
-\r
-\r
- 2332 0143 75696E74            .ascii  "uint16\000"\r
- 2332      313600\r
- 2333                  .LASF37:\r
- 2334 014a 43795370            .ascii  "CySpcLock\000"\r
- 2334      634C6F63 \r
- 2334      6B00\r
- 2335                  .LASF11:\r
- 2336 0154 75696E74            .ascii  "uint32\000"\r
- 2336      333200\r
- 2337                  .LASF44:\r
- 2338 015b 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 2338      74657243 \r
- 2338      72697469 \r
- 2338      63616C53 \r
- 2338      65637469 \r
- 2339                  .LASF8:\r
- 2340 0172 756E7369            .ascii  "unsigned int\000"\r
- 2340      676E6564 \r
- 2340      20696E74 \r
- 2340      00\r
- 2341                  .LASF27:\r
- 2342 017f 61646472            .ascii  "address\000"\r
- 2342      65737300 \r
- 2343                  .LASF7:\r
- 2344 0187 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 2344      206C6F6E \r
- 2344      6720756E \r
- 2344      7369676E \r
- 2344      65642069 \r
- 2345                  .LASF32:\r
- 2346 019e 74656D70            .ascii  "tempMagnitude\000"\r
- 2346      4D61676E \r
- 2346      69747564 \r
- 2346      6500\r
- 2347                  .LASF29:\r
- 2348 01ac 43795370            .ascii  "CySpcLoadRow\000"\r
- 2348      634C6F61 \r
- 2348      64526F77 \r
- 2348      00\r
- 2349                  .LASF18:\r
- 2350 01b9 73697A65            .ascii  "sizetype\000"\r
- 2350      74797065 \r
- 2350      00\r
- 2351                  .LASF38:\r
- 2352 01c2 43795370            .ascii  "CySpcUnlock\000"\r
- 2352      63556E6C \r
- 2352      6F636B00 \r
- 2353                  .LASF33:\r
- 2354 01ce 43795370            .ascii  "CySpcEraseSector\000"\r
- 2354      63457261 \r
- 2354      73655365 \r
- 2354      63746F72 \r
- 2354      00\r
- 2355                  .LASF6:\r
- 2356 01df 6C6F6E67            .ascii  "long long int\000"\r
- 2356      206C6F6E \r
- 2356      6720696E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNS4VrE.s                      page 54\r
-\r
-\r
- 2356      7400\r
- 2357                  .LASF46:\r
- 2358 01ed 43794465            .ascii  "CyDelayUs\000"\r
- 2358      6C617955 \r
- 2358      7300\r
- 2359                  .LASF14:\r
- 2360 01f7 63686172            .ascii  "char\000"\r
- 2360      00\r
- 2361                  .LASF2:\r
- 2362 01fc 73686F72            .ascii  "short int\000"\r
- 2362      7420696E \r
- 2362      7400\r
- 2363                  .LASF22:\r
- 2364 0206 62756666            .ascii  "buffer\000"\r
- 2364      657200\r
- 2365                  .LASF34:\r
- 2366 020d 73656374            .ascii  "sectorNumber\000"\r
- 2366      6F724E75 \r
- 2366      6D626572 \r
- 2366      00\r
- 2367                  .LASF45:\r
- 2368 021a 43794578            .ascii  "CyExitCriticalSection\000"\r
- 2368      69744372 \r
- 2368      69746963 \r
- 2368      616C5365 \r
- 2368      6374696F \r
- 2369                  .LASF4:\r
- 2370 0230 6C6F6E67            .ascii  "long int\000"\r
- 2370      20696E74 \r
- 2370      00\r
- 2371                  .LASF39:\r
- 2372 0239 73706357            .ascii  "spcWaitPipeBypass\000"\r
- 2372      61697450 \r
- 2372      69706542 \r
- 2372      79706173 \r
- 2372      7300\r
- 2373                  .LASF0:\r
- 2374 024b 7369676E            .ascii  "signed char\000"\r
- 2374      65642063 \r
- 2374      68617200 \r
- 2375                  .LASF40:\r
- 2376 0257 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 2376      4320342E \r
- 2376      372E3320 \r
- 2376      32303133 \r
- 2376      30333132 \r
- 2377 028a 616E6368            .ascii  "anch revision 196615]\000"\r
- 2377      20726576 \r
- 2377      6973696F \r
- 2377      6E203139 \r
- 2377      36363135 \r
- 2378                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.o
deleted file mode 100755 (executable)
index cf97e1c..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/CySpc.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.lst
deleted file mode 100755 (executable)
index a309a10..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.lst
+++ /dev/null
@@ -1,5708 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_Init,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_Init\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_Init, %function\r
-  24                   USBFS_Init:\r
-  25                   .LFB1:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS.c"\r
-   1:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS.c **** * File Name: USBFS.c\r
-   3:.\Generated_Source\PSoC5/USBFS.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS.c **** *  API for USBFS Component.\r
-   7:.\Generated_Source\PSoC5/USBFS.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS.c **** *  Many of the functions use endpoint number.  RAM arrays are sized with 9\r
-  10:.\Generated_Source\PSoC5/USBFS.c **** *  elements so they are indexed directly by epNumber.  The SIE and ARB\r
-  11:.\Generated_Source\PSoC5/USBFS.c **** *  registers are indexed by variations of epNumber - 1.\r
-  12:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  13:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-  14:.\Generated_Source\PSoC5/USBFS.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  15:.\Generated_Source\PSoC5/USBFS.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  16:.\Generated_Source\PSoC5/USBFS.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  17:.\Generated_Source\PSoC5/USBFS.c **** * the software package with which this file was provided.\r
-  18:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-  19:.\Generated_Source\PSoC5/USBFS.c **** \r
-  20:.\Generated_Source\PSoC5/USBFS.c **** #include <CyDmac.h>\r
-  21:.\Generated_Source\PSoC5/USBFS.c **** #include "USBFS.h"\r
-  22:.\Generated_Source\PSoC5/USBFS.c **** #include "USBFS_pvt.h"\r
-  23:.\Generated_Source\PSoC5/USBFS.c **** #include "USBFS_hid.h"\r
-  24:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA1_REMOVE == 0u)\r
-  25:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep1_dma.h"\r
-  26:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA1_REMOVE */\r
-  27:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA2_REMOVE == 0u)\r
-  28:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep2_dma.h"\r
-  29:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA2_REMOVE */\r
-  30:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA3_REMOVE == 0u)\r
-  31:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep3_dma.h"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA3_REMOVE */\r
-  33:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA4_REMOVE == 0u)\r
-  34:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep4_dma.h"\r
-  35:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA4_REMOVE */\r
-  36:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA5_REMOVE == 0u)\r
-  37:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep5_dma.h"\r
-  38:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA5_REMOVE */\r
-  39:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA6_REMOVE == 0u)\r
-  40:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep6_dma.h"\r
-  41:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA6_REMOVE */\r
-  42:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA7_REMOVE == 0u)\r
-  43:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep7_dma.h"\r
-  44:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA7_REMOVE */\r
-  45:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_DMA8_REMOVE == 0u)\r
-  46:.\Generated_Source\PSoC5/USBFS.c ****     #include "USBFS_ep8_dma.h"\r
-  47:.\Generated_Source\PSoC5/USBFS.c **** #endif   /* End USBFS_DMA8_REMOVE */\r
-  48:.\Generated_Source\PSoC5/USBFS.c **** \r
-  49:.\Generated_Source\PSoC5/USBFS.c **** \r
-  50:.\Generated_Source\PSoC5/USBFS.c **** /***************************************\r
-  51:.\Generated_Source\PSoC5/USBFS.c **** * Global data allocation\r
-  52:.\Generated_Source\PSoC5/USBFS.c **** ***************************************/\r
-  53:.\Generated_Source\PSoC5/USBFS.c **** \r
-  54:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_initVar = 0u;\r
-  55:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-  56:.\Generated_Source\PSoC5/USBFS.c ****     uint8 USBFS_DmaChan[USBFS_MAX_EP];\r
-  57:.\Generated_Source\PSoC5/USBFS.c ****     uint8 USBFS_DmaTd[USBFS_MAX_EP];\r
-  58:.\Generated_Source\PSoC5/USBFS.c **** #endif /* End USBFS_EP_MM */\r
-  59:.\Generated_Source\PSoC5/USBFS.c **** \r
-  60:.\Generated_Source\PSoC5/USBFS.c **** \r
-  61:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-  62:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_Start\r
-  63:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-  64:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  65:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-  66:.\Generated_Source\PSoC5/USBFS.c **** *  This function initialize the USB SIE, arbiter and the\r
-  67:.\Generated_Source\PSoC5/USBFS.c **** *  endpoint APIs, including setting the D+ Pullup\r
-  68:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  69:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-  70:.\Generated_Source\PSoC5/USBFS.c **** *  device: Contains the device number of the desired device descriptor.\r
-  71:.\Generated_Source\PSoC5/USBFS.c **** *          The device number can be found in the Device Descriptor Tab of\r
-  72:.\Generated_Source\PSoC5/USBFS.c **** *          "Configure" dialog, under the settings of desired Device Descriptor,\r
-  73:.\Generated_Source\PSoC5/USBFS.c **** *          in the "Device Number" field.\r
-  74:.\Generated_Source\PSoC5/USBFS.c **** *  mode: The operating voltage. This determines whether the voltage regulator\r
-  75:.\Generated_Source\PSoC5/USBFS.c **** *        is enabled for 5V operation or if pass through mode is used for 3.3V\r
-  76:.\Generated_Source\PSoC5/USBFS.c **** *        operation. Symbolic names and their associated values are given in the\r
-  77:.\Generated_Source\PSoC5/USBFS.c **** *        following table.\r
-  78:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_3V_OPERATION - Disable voltage regulator and pass-thru\r
-  79:.\Generated_Source\PSoC5/USBFS.c **** *                                       Vcc for pull-up\r
-  80:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_5V_OPERATION - Enable voltage regulator and use\r
-  81:.\Generated_Source\PSoC5/USBFS.c **** *                                       regulator for pull-up\r
-  82:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_DWR_VDDD_OPERATION - Enable or Disable voltage\r
-  83:.\Generated_Source\PSoC5/USBFS.c **** *                         regulator depend on Vddd Voltage configuration in DWR.\r
-  84:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  85:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-  86:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
-  87:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  88:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 3\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/USBFS.c **** *  The USBFS_intiVar variable is used to indicate initial\r
-  90:.\Generated_Source\PSoC5/USBFS.c **** *  configuration of this component. The variable is initialized to zero (0u)\r
-  91:.\Generated_Source\PSoC5/USBFS.c **** *  and set to one (1u) the first time USBFS_Start() is called.\r
-  92:.\Generated_Source\PSoC5/USBFS.c **** *  This allows for component Re-Start without unnecessary re-initialization\r
-  93:.\Generated_Source\PSoC5/USBFS.c **** *  in all subsequent calls to the USBFS_Start() routine.\r
-  94:.\Generated_Source\PSoC5/USBFS.c **** *  If re-initialization of the component is required the variable should be set\r
-  95:.\Generated_Source\PSoC5/USBFS.c **** *  to zero before call of UART_Start() routine, or the user may call\r
-  96:.\Generated_Source\PSoC5/USBFS.c **** *  USBFS_Init() and USBFS_InitComponent() as done\r
-  97:.\Generated_Source\PSoC5/USBFS.c **** *  in the USBFS_Start() routine.\r
-  98:.\Generated_Source\PSoC5/USBFS.c **** *\r
-  99:.\Generated_Source\PSoC5/USBFS.c **** * Side Effects:\r
- 100:.\Generated_Source\PSoC5/USBFS.c **** *   This function will reset all communication states to default.\r
- 101:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 102:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
- 103:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
- 104:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 105:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 106:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_Start(uint8 device, uint8 mode) \r
- 107:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 108:.\Generated_Source\PSoC5/USBFS.c ****     /* If not Initialized then initialize all required hardware and software */\r
- 109:.\Generated_Source\PSoC5/USBFS.c ****     if(USBFS_initVar == 0u)\r
- 110:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 111:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_Init();\r
- 112:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_initVar = 1u;\r
- 113:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 114:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_InitComponent(device, mode);\r
- 115:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 116:.\Generated_Source\PSoC5/USBFS.c **** \r
- 117:.\Generated_Source\PSoC5/USBFS.c **** \r
- 118:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 119:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_Init\r
- 120:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 121:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 122:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 123:.\Generated_Source\PSoC5/USBFS.c **** *  Initialize component's hardware. Usually called in USBFS_Start().\r
- 124:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 125:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 126:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 127:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 128:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 129:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 130:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 131:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
- 132:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
- 133:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 134:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 135:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_Init(void) \r
- 136:.\Generated_Source\PSoC5/USBFS.c **** {\r
-  27                           .loc 1 136 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
-  32                   .LCFI0:\r
-  33                           .cfi_def_cfa_offset 24\r
-  34                           .cfi_offset 3, -24\r
-  35                           .cfi_offset 4, -20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 4\r
-\r
-\r
-  36                           .cfi_offset 5, -16\r
-  37                           .cfi_offset 6, -12\r
-  38                           .cfi_offset 7, -8\r
-  39                           .cfi_offset 14, -4\r
- 137:.\Generated_Source\PSoC5/USBFS.c ****     uint8 enableInterrupts;\r
- 138:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 139:.\Generated_Source\PSoC5/USBFS.c ****         uint16 i;\r
- 140:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 141:.\Generated_Source\PSoC5/USBFS.c **** \r
- 142:.\Generated_Source\PSoC5/USBFS.c ****     enableInterrupts = CyEnterCriticalSection();\r
-  40                           .loc 1 142 0\r
-  41 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
-  42                   .LVL0:\r
- 143:.\Generated_Source\PSoC5/USBFS.c **** \r
- 144:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable USB block  */\r
- 145:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;\r
-  43                           .loc 1 145 0\r
-  44 0006 384B                 ldr     r3, .L2\r
- 142:.\Generated_Source\PSoC5/USBFS.c ****     enableInterrupts = CyEnterCriticalSection();\r
-  45                           .loc 1 142 0\r
-  46 0008 0746                 mov     r7, r0\r
-  47                   .LVL1:\r
-  48                           .loc 1 145 0\r
-  49 000a 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 146:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable USB block for Standby Power Mode */\r
- 147:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
- 148:.\Generated_Source\PSoC5/USBFS.c **** \r
- 149:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable core clock */\r
- 150:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USB_CLK_EN_REG = USBFS_USB_CLK_ENABLE;\r
-  50                           .loc 1 150 0\r
-  51 000c 0125                 movs    r5, #1\r
- 145:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;\r
-  52                           .loc 1 145 0\r
-  53 000e 42F00100             orr     r0, r2, #1\r
-  54                   .LVL2:\r
-  55 0012 1870                 strb    r0, [r3, #0]\r
- 147:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
-  56                           .loc 1 147 0\r
-  57 0014 197C                 ldrb    r1, [r3, #16]   @ zero_extendqisi2\r
- 151:.\Generated_Source\PSoC5/USBFS.c **** \r
- 152:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
-  58                           .loc 1 152 0\r
-  59 0016 0226                 movs    r6, #2\r
- 147:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
-  60                           .loc 1 147 0\r
-  61 0018 41F00104             orr     r4, r1, #1\r
-  62 001c 1C74                 strb    r4, [r3, #16]\r
- 150:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USB_CLK_EN_REG = USBFS_USB_CLK_ENABLE;\r
-  63                           .loc 1 150 0\r
-  64 001e 334B                 ldr     r3, .L2+4\r
- 153:.\Generated_Source\PSoC5/USBFS.c **** \r
- 154:.\Generated_Source\PSoC5/USBFS.c ****     /* ENABLING USBIO PADS IN USB MODE FROM I/O MODE */\r
- 155:.\Generated_Source\PSoC5/USBFS.c ****     /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */\r
- 156:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USBIO_CR0_REG &= ((uint8)(~USBFS_USBIO_CR0_TEN));\r
- 157:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayUs(0u);  /*~50ns delay */\r
- 158:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted)\r
- 159:.\Generated_Source\PSoC5/USBFS.c ****     *  high. This will have been set low by the power manger out of reset.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 5\r
-\r
-\r
- 160:.\Generated_Source\PSoC5/USBFS.c ****     *  Also confirm USBIO pull-up disabled\r
- 161:.\Generated_Source\PSoC5/USBFS.c ****     */\r
- 162:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG &= ((uint8)(~(USBFS_PM_USB_CR0_PD_N |\r
-  65                           .loc 1 162 0\r
-  66 0020 334C                 ldr     r4, .L2+8\r
- 150:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USB_CLK_EN_REG = USBFS_USB_CLK_ENABLE;\r
-  67                           .loc 1 150 0\r
-  68 0022 1D70                 strb    r5, [r3, #0]\r
- 152:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
-  69                           .loc 1 152 0\r
-  70 0024 03F8946C             strb    r6, [r3, #-148]\r
- 156:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USBIO_CR0_REG &= ((uint8)(~USBFS_USBIO_CR0_TEN));\r
-  71                           .loc 1 156 0\r
-  72 0028 13F88D2C             ldrb    r2, [r3, #-141] @ zero_extendqisi2\r
-  73 002c 02F07F00             and     r0, r2, #127\r
-  74 0030 03F88D0C             strb    r0, [r3, #-141]\r
- 157:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayUs(0u);  /*~50ns delay */\r
-  75                           .loc 1 157 0\r
-  76 0034 0020                 movs    r0, #0\r
-  77 0036 FFF7FEFF             bl      CyDelayUs\r
-  78                   .LVL3:\r
-  79                           .loc 1 162 0\r
-  80 003a 2178                 ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 163:.\Generated_Source\PSoC5/USBFS.c ****                                                   USBFS_PM_USB_CR0_PD_PULLUP_N)));\r
- 164:.\Generated_Source\PSoC5/USBFS.c **** \r
- 165:.\Generated_Source\PSoC5/USBFS.c ****     /* Select iomode to USB mode*/\r
- 166:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USBIO_CR1_REG &= ((uint8)(~USBFS_USBIO_CR1_IOMODE));\r
-  81                           .loc 1 166 0\r
-  82 003c 2D48                 ldr     r0, .L2+12\r
- 162:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG &= ((uint8)(~(USBFS_PM_USB_CR0_PD_N |\r
-  83                           .loc 1 162 0\r
-  84 003e 01F0F903             and     r3, r1, #249\r
-  85 0042 2370                 strb    r3, [r4, #0]\r
-  86                           .loc 1 166 0\r
-  87 0044 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
-  88 0046 02F0DF01             and     r1, r2, #223\r
-  89 004a 0170                 strb    r1, [r0, #0]\r
- 167:.\Generated_Source\PSoC5/USBFS.c **** \r
- 168:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
- 169:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_REF_EN;\r
-  90                           .loc 1 169 0\r
-  91 004c 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 170:.\Generated_Source\PSoC5/USBFS.c ****     /* The reference will be available 1 us after the regulator is enabled */\r
- 171:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayUs(1u);\r
-  92                           .loc 1 171 0\r
-  93 004e 2846                 mov     r0, r5\r
- 169:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_REF_EN;\r
-  94                           .loc 1 169 0\r
-  95 0050 2B43                 orrs    r3, r3, r5\r
-  96 0052 2370                 strb    r3, [r4, #0]\r
-  97                           .loc 1 171 0\r
-  98 0054 FFF7FEFF             bl      CyDelayUs\r
-  99                   .LVL4:\r
- 172:.\Generated_Source\PSoC5/USBFS.c ****     /* OR 40us after power restored */\r
- 173:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayUs(40u);\r
- 100                           .loc 1 173 0\r
- 101 0058 2820                 movs    r0, #40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 6\r
-\r
-\r
- 102 005a FFF7FEFF             bl      CyDelayUs\r
- 103                   .LVL5:\r
- 174:.\Generated_Source\PSoC5/USBFS.c ****     /* Ensure the single ended disable bits are low (PRT15.INP_DIS[7:6])(input receiver enabled). *\r
- 175:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_DM_INP_DIS_REG &= ((uint8)(~USBFS_DM_MASK));\r
- 104                           .loc 1 175 0\r
- 105 005e 2648                 ldr     r0, .L2+16\r
- 106 0060 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 107 0062 02F07F01             and     r1, r2, #127\r
- 108 0066 0170                 strb    r1, [r0, #0]\r
- 176:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_DP_INP_DIS_REG &= ((uint8)(~USBFS_DP_MASK));\r
- 109                           .loc 1 176 0\r
- 110 0068 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 111 006a 03F0BF02             and     r2, r3, #191\r
- 112 006e 0270                 strb    r2, [r0, #0]\r
- 177:.\Generated_Source\PSoC5/USBFS.c **** \r
- 178:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable USBIO */\r
- 179:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_N;\r
- 113                           .loc 1 179 0\r
- 114 0070 2078                 ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 115 0072 3043                 orrs    r0, r0, r6\r
- 116 0074 2070                 strb    r0, [r4, #0]\r
- 180:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayUs(2u);\r
- 117                           .loc 1 180 0\r
- 118 0076 3046                 mov     r0, r6\r
- 119 0078 FFF7FEFF             bl      CyDelayUs\r
- 120                   .LVL6:\r
- 181:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the USBIO pull-up enable */\r
- 182:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
- 121                           .loc 1 182 0\r
- 122 007c 2178                 ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 183:.\Generated_Source\PSoC5/USBFS.c **** \r
- 184:.\Generated_Source\PSoC5/USBFS.c ****     /* Write WAx */\r
- 185:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_ARB_RW1_WA_PTR,     0u);\r
- 123                           .loc 1 185 0\r
- 124 007e 1F4A                 ldr     r2, .L2+20\r
- 182:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
- 125                           .loc 1 182 0\r
- 126 0080 41F00403             orr     r3, r1, #4\r
- 127 0084 2370                 strb    r3, [r4, #0]\r
- 128                           .loc 1 185 0\r
- 129 0086 0024                 movs    r4, #0\r
- 130 0088 1470                 strb    r4, [r2, #0]\r
- 186:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_ARB_RW1_WA_MSB_PTR, 0u);\r
- 187:.\Generated_Source\PSoC5/USBFS.c **** \r
- 188:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 189:.\Generated_Source\PSoC5/USBFS.c ****         /* Init transfer descriptor. This will be used to detect the DMA state - initialized or not\r
- 190:.\Generated_Source\PSoC5/USBFS.c ****         for (i = 0u; i < USBFS_MAX_EP; i++)\r
- 191:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 192:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_DmaTd[i] = DMA_INVALID_TD;\r
- 193:.\Generated_Source\PSoC5/USBFS.c ****         }\r
- 194:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 195:.\Generated_Source\PSoC5/USBFS.c **** \r
- 196:.\Generated_Source\PSoC5/USBFS.c ****     CyExitCriticalSection(enableInterrupts);\r
- 131                           .loc 1 196 0\r
- 132 008a 3846                 mov     r0, r7\r
- 186:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_ARB_RW1_WA_MSB_PTR, 0u);\r
- 133                           .loc 1 186 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 7\r
-\r
-\r
- 134 008c 5470                 strb    r4, [r2, #1]\r
- 135                           .loc 1 196 0\r
- 136 008e FFF7FEFF             bl      CyExitCriticalSection\r
- 137                   .LVL7:\r
- 197:.\Generated_Source\PSoC5/USBFS.c **** \r
- 198:.\Generated_Source\PSoC5/USBFS.c **** \r
- 199:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the bus reset Interrupt. */\r
- 200:.\Generated_Source\PSoC5/USBFS.c ****     (void) CyIntSetVector(USBFS_BUS_RESET_VECT_NUM,   &USBFS_BUS_RESET_ISR);\r
- 138                           .loc 1 200 0\r
- 139 0092 1720                 movs    r0, #23\r
- 140 0094 1A49                 ldr     r1, .L2+24\r
- 141 0096 FFF7FEFF             bl      CyIntSetVector\r
- 142                   .LVL8:\r
- 201:.\Generated_Source\PSoC5/USBFS.c ****     CyIntSetPriority(USBFS_BUS_RESET_VECT_NUM, USBFS_BUS_RESET_PRIOR);\r
- 143                           .loc 1 201 0\r
- 144 009a 1720                 movs    r0, #23\r
- 145 009c 0721                 movs    r1, #7\r
- 146 009e FFF7FEFF             bl      CyIntSetPriority\r
- 147                   .LVL9:\r
- 202:.\Generated_Source\PSoC5/USBFS.c **** \r
- 203:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the SOF Interrupt. */\r
- 204:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_SOF_ISR_REMOVE == 0u)\r
- 205:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_SOF_VECT_NUM,   &USBFS_SOF_ISR);\r
- 148                           .loc 1 205 0\r
- 149 00a2 1520                 movs    r0, #21\r
- 150 00a4 1749                 ldr     r1, .L2+28\r
- 151 00a6 FFF7FEFF             bl      CyIntSetVector\r
- 152                   .LVL10:\r
- 206:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_SOF_VECT_NUM, USBFS_SOF_PRIOR);\r
- 153                           .loc 1 206 0\r
- 154 00aa 1520                 movs    r0, #21\r
- 155 00ac 0721                 movs    r1, #7\r
- 156 00ae FFF7FEFF             bl      CyIntSetPriority\r
- 157                   .LVL11:\r
- 207:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_SOF_ISR_REMOVE */\r
- 208:.\Generated_Source\PSoC5/USBFS.c **** \r
- 209:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Control Endpoint Interrupt. */\r
- 210:.\Generated_Source\PSoC5/USBFS.c ****     (void) CyIntSetVector(USBFS_EP_0_VECT_NUM,   &USBFS_EP_0_ISR);\r
- 158                           .loc 1 210 0\r
- 159 00b2 1820                 movs    r0, #24\r
- 160 00b4 1449                 ldr     r1, .L2+32\r
- 161 00b6 FFF7FEFF             bl      CyIntSetVector\r
- 162                   .LVL12:\r
- 211:.\Generated_Source\PSoC5/USBFS.c ****     CyIntSetPriority(USBFS_EP_0_VECT_NUM, USBFS_EP_0_PRIOR);\r
- 163                           .loc 1 211 0\r
- 164 00ba 1820                 movs    r0, #24\r
- 165 00bc 0721                 movs    r1, #7\r
- 166 00be FFF7FEFF             bl      CyIntSetPriority\r
- 167                   .LVL13:\r
- 212:.\Generated_Source\PSoC5/USBFS.c **** \r
- 213:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 1 Interrupt. */\r
- 214:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP1_ISR_REMOVE == 0u)\r
- 215:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_1_VECT_NUM,   &USBFS_EP_1_ISR);\r
- 168                           .loc 1 215 0\r
- 169 00c2 2046                 mov     r0, r4\r
- 170 00c4 1149                 ldr     r1, .L2+36\r
- 171 00c6 FFF7FEFF             bl      CyIntSetVector\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 8\r
-\r
-\r
- 172                   .LVL14:\r
- 216:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_1_VECT_NUM, USBFS_EP_1_PRIOR);\r
- 173                           .loc 1 216 0\r
- 174 00ca 2046                 mov     r0, r4\r
- 175 00cc 0721                 movs    r1, #7\r
- 176 00ce FFF7FEFF             bl      CyIntSetPriority\r
- 177                   .LVL15:\r
- 217:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP1_ISR_REMOVE */\r
- 218:.\Generated_Source\PSoC5/USBFS.c **** \r
- 219:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 2 Interrupt. */\r
- 220:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP2_ISR_REMOVE == 0u)\r
- 221:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_2_VECT_NUM,   &USBFS_EP_2_ISR);\r
- 178                           .loc 1 221 0\r
- 179 00d2 2846                 mov     r0, r5\r
- 180 00d4 0E49                 ldr     r1, .L2+40\r
- 181 00d6 FFF7FEFF             bl      CyIntSetVector\r
- 182                   .LVL16:\r
- 222:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_2_VECT_NUM, USBFS_EP_2_PRIOR);\r
- 183                           .loc 1 222 0\r
- 184 00da 2846                 mov     r0, r5\r
- 185 00dc 0721                 movs    r1, #7\r
- 223:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP2_ISR_REMOVE */\r
- 224:.\Generated_Source\PSoC5/USBFS.c **** \r
- 225:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 3 Interrupt. */\r
- 226:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP3_ISR_REMOVE == 0u)\r
- 227:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_3_VECT_NUM,   &USBFS_EP_3_ISR);\r
- 228:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_3_VECT_NUM, USBFS_EP_3_PRIOR);\r
- 229:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP3_ISR_REMOVE */\r
- 230:.\Generated_Source\PSoC5/USBFS.c **** \r
- 231:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 4 Interrupt. */\r
- 232:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP4_ISR_REMOVE == 0u)\r
- 233:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_4_VECT_NUM,   &USBFS_EP_4_ISR);\r
- 234:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_4_VECT_NUM, USBFS_EP_4_PRIOR);\r
- 235:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP4_ISR_REMOVE */\r
- 236:.\Generated_Source\PSoC5/USBFS.c **** \r
- 237:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 5 Interrupt. */\r
- 238:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP5_ISR_REMOVE == 0u)\r
- 239:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_5_VECT_NUM,   &USBFS_EP_5_ISR);\r
- 240:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_5_VECT_NUM, USBFS_EP_5_PRIOR);\r
- 241:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP5_ISR_REMOVE */\r
- 242:.\Generated_Source\PSoC5/USBFS.c **** \r
- 243:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 6 Interrupt. */\r
- 244:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP6_ISR_REMOVE == 0u)\r
- 245:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_6_VECT_NUM,   &USBFS_EP_6_ISR);\r
- 246:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_6_VECT_NUM, USBFS_EP_6_PRIOR);\r
- 247:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP6_ISR_REMOVE */\r
- 248:.\Generated_Source\PSoC5/USBFS.c **** \r
- 249:.\Generated_Source\PSoC5/USBFS.c ****      /* Set the Data Endpoint 7 Interrupt. */\r
- 250:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP7_ISR_REMOVE == 0u)\r
- 251:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_7_VECT_NUM,   &USBFS_EP_7_ISR);\r
- 252:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_7_VECT_NUM, USBFS_EP_7_PRIOR);\r
- 253:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP7_ISR_REMOVE */\r
- 254:.\Generated_Source\PSoC5/USBFS.c **** \r
- 255:.\Generated_Source\PSoC5/USBFS.c ****     /* Set the Data Endpoint 8 Interrupt. */\r
- 256:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP8_ISR_REMOVE == 0u)\r
- 257:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_EP_8_VECT_NUM,   &USBFS_EP_8_ISR);\r
- 258:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_8_VECT_NUM, USBFS_EP_8_PRIOR);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 9\r
-\r
-\r
- 259:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP8_ISR_REMOVE */\r
- 260:.\Generated_Source\PSoC5/USBFS.c **** \r
- 261:.\Generated_Source\PSoC5/USBFS.c ****     #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))\r
- 262:.\Generated_Source\PSoC5/USBFS.c ****         /* Set the ARB Interrupt. */\r
- 263:.\Generated_Source\PSoC5/USBFS.c ****         (void) CyIntSetVector(USBFS_ARB_VECT_NUM,   &USBFS_ARB_ISR);\r
- 264:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_ARB_VECT_NUM, USBFS_ARB_PRIOR);\r
- 265:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 266:.\Generated_Source\PSoC5/USBFS.c **** \r
- 267:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 186                           .loc 1 267 0\r
- 187 00de BDE8F840             pop     {r3, r4, r5, r6, r7, lr}\r
- 222:.\Generated_Source\PSoC5/USBFS.c ****         CyIntSetPriority(USBFS_EP_2_VECT_NUM, USBFS_EP_2_PRIOR);\r
- 188                           .loc 1 222 0\r
- 189 00e2 FFF7FEBF             b       CyIntSetPriority\r
- 190                   .LVL17:\r
- 191                   .L3:\r
- 192 00e6 00BF                 .align  2\r
- 193                   .L2:\r
- 194 00e8 A5430040             .word   1073759141\r
- 195 00ec 9D600040             .word   1073766557\r
- 196 00f0 94430040             .word   1073759124\r
- 197 00f4 12600040             .word   1073766418\r
- 198 00f8 F8510040             .word   1073762808\r
- 199 00fc 84600040             .word   1073766532\r
- 200 0100 00000000             .word   USBFS_BUS_RESET_ISR\r
- 201 0104 00000000             .word   USBFS_SOF_ISR\r
- 202 0108 00000000             .word   USBFS_EP_0_ISR\r
- 203 010c 00000000             .word   USBFS_EP_1_ISR\r
- 204 0110 00000000             .word   USBFS_EP_2_ISR\r
- 205                           .cfi_endproc\r
- 206                   .LFE1:\r
- 207                           .size   USBFS_Init, .-USBFS_Init\r
- 208                           .section        .text.USBFS_InitComponent,"ax",%progbits\r
- 209                           .align  1\r
- 210                           .global USBFS_InitComponent\r
- 211                           .thumb\r
- 212                           .thumb_func\r
- 213                           .type   USBFS_InitComponent, %function\r
- 214                   USBFS_InitComponent:\r
- 215                   .LFB2:\r
- 268:.\Generated_Source\PSoC5/USBFS.c **** \r
- 269:.\Generated_Source\PSoC5/USBFS.c **** \r
- 270:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 271:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_InitComponent\r
- 272:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 273:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 274:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 275:.\Generated_Source\PSoC5/USBFS.c **** *  Initialize the component, except for the HW which is done one time in\r
- 276:.\Generated_Source\PSoC5/USBFS.c **** *  the Start function.  This function pulls up D+.\r
- 277:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 278:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 279:.\Generated_Source\PSoC5/USBFS.c **** *  device: Contains the device number of the desired device descriptor.\r
- 280:.\Generated_Source\PSoC5/USBFS.c **** *          The device number can be found in the Device Descriptor Tab of\r
- 281:.\Generated_Source\PSoC5/USBFS.c **** *          "Configure" dialog, under the settings of desired Device Descriptor,\r
- 282:.\Generated_Source\PSoC5/USBFS.c **** *          in the "Device Number" field.\r
- 283:.\Generated_Source\PSoC5/USBFS.c **** *  mode: The operating voltage. This determines whether the voltage regulator\r
- 284:.\Generated_Source\PSoC5/USBFS.c **** *        is enabled for 5V operation or if pass through mode is used for 3.3V\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 10\r
-\r
-\r
- 285:.\Generated_Source\PSoC5/USBFS.c **** *        operation. Symbolic names and their associated values are given in the\r
- 286:.\Generated_Source\PSoC5/USBFS.c **** *        following table.\r
- 287:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_3V_OPERATION - Disable voltage regulator and pass-thru\r
- 288:.\Generated_Source\PSoC5/USBFS.c **** *                                       Vcc for pull-up\r
- 289:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_5V_OPERATION - Enable voltage regulator and use\r
- 290:.\Generated_Source\PSoC5/USBFS.c **** *                                       regulator for pull-up\r
- 291:.\Generated_Source\PSoC5/USBFS.c **** *       USBFS_DWR_VDDD_OPERATION - Enable or Disable voltage\r
- 292:.\Generated_Source\PSoC5/USBFS.c **** *                         regulator depend on Vddd Voltage configuration in DWR.\r
- 293:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 294:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 295:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
- 296:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 297:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
- 298:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_device: Contains the device number of the desired device\r
- 299:.\Generated_Source\PSoC5/USBFS.c **** *       descriptor. The device number can be found in the Device Descriptor Tab\r
- 300:.\Generated_Source\PSoC5/USBFS.c **** *       of "Configure" dialog, under the settings of desired Device Descriptor,\r
- 301:.\Generated_Source\PSoC5/USBFS.c **** *       in the "Device Number" field.\r
- 302:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_transferState: This variable used by the communication\r
- 303:.\Generated_Source\PSoC5/USBFS.c **** *       functions to handle current transfer state. Initialized to\r
- 304:.\Generated_Source\PSoC5/USBFS.c **** *       TRANS_STATE_IDLE in this API.\r
- 305:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_configuration: Contains current configuration number\r
- 306:.\Generated_Source\PSoC5/USBFS.c **** *       which is set by the Host using SET_CONFIGURATION request.\r
- 307:.\Generated_Source\PSoC5/USBFS.c **** *       Initialized to zero in this API.\r
- 308:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceAddress: Contains current device address. This\r
- 309:.\Generated_Source\PSoC5/USBFS.c **** *       variable is initialized to zero in this API. Host starts to communicate\r
- 310:.\Generated_Source\PSoC5/USBFS.c **** *      to device with address 0 and then set it to whatever value using\r
- 311:.\Generated_Source\PSoC5/USBFS.c **** *      SET_ADDRESS request.\r
- 312:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceStatus: initialized to 0.\r
- 313:.\Generated_Source\PSoC5/USBFS.c **** *       This is two bit variable which contain power status in first bit\r
- 314:.\Generated_Source\PSoC5/USBFS.c **** *       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
- 315:.\Generated_Source\PSoC5/USBFS.c **** *       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
- 316:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_lastPacketSize initialized to 0;\r
- 317:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 318:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
- 319:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
- 320:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 321:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 322:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_InitComponent(uint8 device, uint8 mode) \r
- 323:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 216                           .loc 1 323 0\r
- 217                           .cfi_startproc\r
- 218                           @ args = 0, pretend = 0, frame = 0\r
- 219                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 220                   .LVL18:\r
- 324:.\Generated_Source\PSoC5/USBFS.c ****     /* Initialize _hidProtocol variable to comply with\r
- 325:.\Generated_Source\PSoC5/USBFS.c ****     *  HID 7.2.6 Set_Protocol Request:\r
- 326:.\Generated_Source\PSoC5/USBFS.c ****     *  "When initialized, all devices default to report protocol."\r
- 327:.\Generated_Source\PSoC5/USBFS.c ****     */\r
- 328:.\Generated_Source\PSoC5/USBFS.c ****     #if defined(USBFS_ENABLE_HID_CLASS)\r
- 329:.\Generated_Source\PSoC5/USBFS.c ****         uint8 i;\r
- 330:.\Generated_Source\PSoC5/USBFS.c **** \r
- 331:.\Generated_Source\PSoC5/USBFS.c ****         for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
- 332:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 333:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_hidProtocol[i] = USBFS_PROTOCOL_REPORT;\r
- 221                           .loc 1 333 0\r
- 222 0000 184B                 ldr     r3, .L11\r
- 223 0002 0122                 movs    r2, #1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 11\r
-\r
-\r
- 323:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 224                           .loc 1 323 0\r
- 225 0004 10B5                 push    {r4, lr}\r
- 226                   .LCFI1:\r
- 227                           .cfi_def_cfa_offset 8\r
- 228                           .cfi_offset 4, -8\r
- 229                           .cfi_offset 14, -4\r
- 230                           .loc 1 333 0\r
- 231 0006 1A70                 strb    r2, [r3, #0]\r
- 232                   .LVL19:\r
- 334:.\Generated_Source\PSoC5/USBFS.c ****         }\r
- 335:.\Generated_Source\PSoC5/USBFS.c ****     #endif /* USBFS_ENABLE_HID_CLASS */\r
- 336:.\Generated_Source\PSoC5/USBFS.c **** \r
- 337:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable Interrupts. */\r
- 338:.\Generated_Source\PSoC5/USBFS.c ****     CyIntEnable(USBFS_BUS_RESET_VECT_NUM);\r
- 233                           .loc 1 338 0\r
- 234 0008 174B                 ldr     r3, .L11+4\r
- 235 000a 4FF40004             mov     r4, #8388608\r
- 236 000e 1C60                 str     r4, [r3, #0]\r
- 339:.\Generated_Source\PSoC5/USBFS.c ****     CyIntEnable(USBFS_EP_0_VECT_NUM);\r
- 237                           .loc 1 339 0\r
- 238 0010 4FF08074             mov     r4, #16777216\r
- 239 0014 1C60                 str     r4, [r3, #0]\r
- 340:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP1_ISR_REMOVE == 0u)\r
- 341:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_1_VECT_NUM);\r
- 240                           .loc 1 341 0\r
- 241 0016 1A60                 str     r2, [r3, #0]\r
- 342:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP1_ISR_REMOVE */\r
- 343:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP2_ISR_REMOVE == 0u)\r
- 344:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_2_VECT_NUM);\r
- 242                           .loc 1 344 0\r
- 243 0018 0222                 movs    r2, #2\r
- 244 001a 1A60                 str     r2, [r3, #0]\r
- 345:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP2_ISR_REMOVE */\r
- 346:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP3_ISR_REMOVE == 0u)\r
- 347:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_3_VECT_NUM);\r
- 348:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP3_ISR_REMOVE */\r
- 349:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP4_ISR_REMOVE == 0u)\r
- 350:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_4_VECT_NUM);\r
- 351:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP4_ISR_REMOVE */\r
- 352:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP5_ISR_REMOVE == 0u)\r
- 353:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_5_VECT_NUM);\r
- 354:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP5_ISR_REMOVE */\r
- 355:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP6_ISR_REMOVE == 0u)\r
- 356:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_6_VECT_NUM);\r
- 357:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP6_ISR_REMOVE */\r
- 358:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP7_ISR_REMOVE == 0u)\r
- 359:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_7_VECT_NUM);\r
- 360:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP7_ISR_REMOVE */\r
- 361:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP8_ISR_REMOVE == 0u)\r
- 362:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_EP_8_VECT_NUM);\r
- 363:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP8_ISR_REMOVE */\r
- 364:.\Generated_Source\PSoC5/USBFS.c ****     #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))\r
- 365:.\Generated_Source\PSoC5/USBFS.c ****         /* usb arb interrupt enable */\r
- 366:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;\r
- 367:.\Generated_Source\PSoC5/USBFS.c ****         CyIntEnable(USBFS_ARB_VECT_NUM);\r
- 368:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 12\r
-\r
-\r
- 369:.\Generated_Source\PSoC5/USBFS.c **** \r
- 370:.\Generated_Source\PSoC5/USBFS.c ****     /* Arbiter configuration for DMA transfers */\r
- 371:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 372:.\Generated_Source\PSoC5/USBFS.c **** \r
- 373:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
- 374:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;\r
- 375:.\Generated_Source\PSoC5/USBFS.c ****         #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
- 376:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 377:.\Generated_Source\PSoC5/USBFS.c ****             /*Set cfg cmplt this rises DMA request when the full configuration is done */\r
- 378:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
- 379:.\Generated_Source\PSoC5/USBFS.c ****         #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 380:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 381:.\Generated_Source\PSoC5/USBFS.c **** \r
- 382:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 245                           .loc 1 382 0\r
- 246 001c 134B                 ldr     r3, .L11+8\r
- 247 001e 0024                 movs    r4, #0\r
- 248 0020 1C70                 strb    r4, [r3, #0]\r
- 249 0022 134B                 ldr     r3, .L11+12\r
- 383:.\Generated_Source\PSoC5/USBFS.c **** \r
- 384:.\Generated_Source\PSoC5/USBFS.c ****     /* USB Locking: Enabled, VRegulator: depend on mode or DWR Voltage configuration*/\r
- 385:.\Generated_Source\PSoC5/USBFS.c ****     switch(mode)\r
- 250                           .loc 1 385 0\r
- 251 0024 01B1                 cbz     r1, .L9\r
- 252 0026 0322                 movs    r2, #3\r
- 253                   .L9:\r
- 386:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 387:.\Generated_Source\PSoC5/USBFS.c ****         case USBFS_3V_OPERATION:\r
- 388:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
- 389:.\Generated_Source\PSoC5/USBFS.c ****             break;\r
- 390:.\Generated_Source\PSoC5/USBFS.c ****         case USBFS_5V_OPERATION:\r
- 391:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;\r
- 392:.\Generated_Source\PSoC5/USBFS.c ****             break;\r
- 393:.\Generated_Source\PSoC5/USBFS.c ****         default:   /*USBFS_DWR_VDDD_OPERATION */\r
- 394:.\Generated_Source\PSoC5/USBFS.c ****             #if(USBFS_VDDD_MV < USBFS_3500MV)\r
- 395:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
- 396:.\Generated_Source\PSoC5/USBFS.c ****             #else\r
- 397:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;\r
- 398:.\Generated_Source\PSoC5/USBFS.c ****             #endif /* End USBFS_VDDD_MV < USBFS_3500MV */\r
- 399:.\Generated_Source\PSoC5/USBFS.c ****             break;\r
- 400:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 401:.\Generated_Source\PSoC5/USBFS.c **** \r
- 402:.\Generated_Source\PSoC5/USBFS.c ****     /* Record the descriptor selection */\r
- 403:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_device = device;\r
- 254                           .loc 1 403 0\r
- 255 0028 1249                 ldr     r1, .L11+16\r
- 256                   .LVL20:\r
- 397:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;\r
- 257                           .loc 1 397 0\r
- 258 002a 1A70                 strb    r2, [r3, #0]\r
- 404:.\Generated_Source\PSoC5/USBFS.c **** \r
- 405:.\Generated_Source\PSoC5/USBFS.c ****     /* Clear all of the component data */\r
- 406:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 259                           .loc 1 406 0\r
- 260 002c 124B                 ldr     r3, .L11+20\r
- 403:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_device = device;\r
- 261                           .loc 1 403 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 13\r
-\r
-\r
- 262 002e 0870                 strb    r0, [r1, #0]\r
- 407:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 263                           .loc 1 407 0\r
- 264 0030 124A                 ldr     r2, .L11+24\r
- 406:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 265                           .loc 1 406 0\r
- 266 0032 0020                 movs    r0, #0\r
- 267                   .LVL21:\r
- 408:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 268                           .loc 1 408 0\r
- 269 0034 1249                 ldr     r1, .L11+28\r
- 270                   .LVL22:\r
- 406:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 271                           .loc 1 406 0\r
- 272 0036 1870                 strb    r0, [r3, #0]\r
- 409:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 273                           .loc 1 409 0\r
- 274 0038 124B                 ldr     r3, .L11+32\r
- 407:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 275                           .loc 1 407 0\r
- 276 003a 1070                 strb    r0, [r2, #0]\r
- 408:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 277                           .loc 1 408 0\r
- 278 003c 0870                 strb    r0, [r1, #0]\r
- 410:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 279                           .loc 1 410 0\r
- 280 003e 124A                 ldr     r2, .L11+36\r
- 411:.\Generated_Source\PSoC5/USBFS.c **** \r
- 412:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_lastPacketSize = 0u;\r
- 281                           .loc 1 412 0\r
- 282 0040 1249                 ldr     r1, .L11+40\r
- 409:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 283                           .loc 1 409 0\r
- 284 0042 1870                 strb    r0, [r3, #0]\r
- 413:.\Generated_Source\PSoC5/USBFS.c **** \r
- 414:.\Generated_Source\PSoC5/USBFS.c ****     /*  ACK Setup, Stall IN/OUT */\r
- 415:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
- 285                           .loc 1 415 0\r
- 286 0044 124B                 ldr     r3, .L11+44\r
- 410:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 287                           .loc 1 410 0\r
- 288 0046 1070                 strb    r0, [r2, #0]\r
- 412:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_lastPacketSize = 0u;\r
- 289                           .loc 1 412 0\r
- 290 0048 0870                 strb    r0, [r1, #0]\r
- 416:.\Generated_Source\PSoC5/USBFS.c **** \r
- 417:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable the SIE with an address 0 */\r
- 418:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_CR0_PTR, USBFS_CR0_ENABLE);\r
- 291                           .loc 1 418 0\r
- 292 004a 8022                 movs    r2, #128\r
- 415:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
- 293                           .loc 1 415 0\r
- 294 004c 0320                 movs    r0, #3\r
- 295 004e 1870                 strb    r0, [r3, #0]\r
- 419:.\Generated_Source\PSoC5/USBFS.c **** \r
- 420:.\Generated_Source\PSoC5/USBFS.c ****     /* Workaround for PSOC5LP */\r
- 421:.\Generated_Source\PSoC5/USBFS.c ****     CyDelayCycles(1u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 14\r
-\r
-\r
- 296                           .loc 1 421 0\r
- 297 0050 0120                 movs    r0, #1\r
- 418:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_CR0_PTR, USBFS_CR0_ENABLE);\r
- 298                           .loc 1 418 0\r
- 299 0052 03F8202C             strb    r2, [r3, #-32]\r
- 300                           .loc 1 421 0\r
- 301 0056 FFF7FEFF             bl      CyDelayCycles\r
- 302                   .LVL23:\r
- 422:.\Generated_Source\PSoC5/USBFS.c **** \r
- 423:.\Generated_Source\PSoC5/USBFS.c ****     /* Finally, Enable d+ pullup and select iomode to USB mode*/\r
- 424:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_USBIO_CR1_PTR, USBFS_USBIO_CR1_USBPUEN);\r
- 303                           .loc 1 424 0\r
- 304 005a 0E48                 ldr     r0, .L11+48\r
- 305 005c 0421                 movs    r1, #4\r
- 306 005e 0170                 strb    r1, [r0, #0]\r
- 307 0060 10BD                 pop     {r4, pc}\r
- 308                   .L12:\r
- 309 0062 00BF                 .align  2\r
- 310                   .L11:\r
- 311 0064 00000000             .word   USBFS_hidProtocol\r
- 312 0068 00E100E0             .word   -536813312\r
- 313 006c 00000000             .word   USBFS_transferState\r
- 314 0070 09600040             .word   1073766409\r
- 315 0074 00000000             .word   USBFS_device\r
- 316 0078 00000000             .word   USBFS_configuration\r
- 317 007c 00000000             .word   USBFS_interfaceNumber\r
- 318 0080 00000000             .word   USBFS_configurationChanged\r
- 319 0084 00000000             .word   USBFS_deviceAddress\r
- 320 0088 00000000             .word   USBFS_deviceStatus\r
- 321 008c 00000000             .word   USBFS_lastPacketSize\r
- 322 0090 28600040             .word   1073766440\r
- 323 0094 12600040             .word   1073766418\r
- 324                           .cfi_endproc\r
- 325                   .LFE2:\r
- 326                           .size   USBFS_InitComponent, .-USBFS_InitComponent\r
- 327                           .section        .text.USBFS_Start,"ax",%progbits\r
- 328                           .align  1\r
- 329                           .global USBFS_Start\r
- 330                           .thumb\r
- 331                           .thumb_func\r
- 332                           .type   USBFS_Start, %function\r
- 333                   USBFS_Start:\r
- 334                   .LFB0:\r
- 107:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 335                           .loc 1 107 0\r
- 336                           .cfi_startproc\r
- 337                           @ args = 0, pretend = 0, frame = 0\r
- 338                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 339                   .LVL24:\r
- 340 0000 70B5                 push    {r4, r5, r6, lr}\r
- 341                   .LCFI2:\r
- 342                           .cfi_def_cfa_offset 16\r
- 343                           .cfi_offset 4, -16\r
- 344                           .cfi_offset 5, -12\r
- 345                           .cfi_offset 6, -8\r
- 346                           .cfi_offset 14, -4\r
- 109:.\Generated_Source\PSoC5/USBFS.c ****     if(USBFS_initVar == 0u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 15\r
-\r
-\r
- 347                           .loc 1 109 0\r
- 348 0002 074C                 ldr     r4, .L15\r
- 107:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 349                           .loc 1 107 0\r
- 350 0004 0646                 mov     r6, r0\r
- 109:.\Generated_Source\PSoC5/USBFS.c ****     if(USBFS_initVar == 0u)\r
- 351                           .loc 1 109 0\r
- 352 0006 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 107:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 353                           .loc 1 107 0\r
- 354 0008 0D46                 mov     r5, r1\r
- 109:.\Generated_Source\PSoC5/USBFS.c ****     if(USBFS_initVar == 0u)\r
- 355                           .loc 1 109 0\r
- 356 000a 1BB9                 cbnz    r3, .L14\r
- 111:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_Init();\r
- 357                           .loc 1 111 0\r
- 358 000c FFF7FEFF             bl      USBFS_Init\r
- 359                   .LVL25:\r
- 112:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_initVar = 1u;\r
- 360                           .loc 1 112 0\r
- 361 0010 0120                 movs    r0, #1\r
- 362 0012 2070                 strb    r0, [r4, #0]\r
- 363                   .L14:\r
- 114:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_InitComponent(device, mode);\r
- 364                           .loc 1 114 0\r
- 365 0014 3046                 mov     r0, r6\r
- 366 0016 2946                 mov     r1, r5\r
- 115:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 367                           .loc 1 115 0\r
- 368 0018 BDE87040             pop     {r4, r5, r6, lr}\r
- 114:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_InitComponent(device, mode);\r
- 369                           .loc 1 114 0\r
- 370 001c FFF7FEBF             b       USBFS_InitComponent\r
- 371                   .LVL26:\r
- 372                   .L16:\r
- 373                           .align  2\r
- 374                   .L15:\r
- 375 0020 00000000             .word   .LANCHOR0\r
- 376                           .cfi_endproc\r
- 377                   .LFE0:\r
- 378                           .size   USBFS_Start, .-USBFS_Start\r
- 379                           .section        .text.USBFS_ReInitComponent,"ax",%progbits\r
- 380                           .align  1\r
- 381                           .global USBFS_ReInitComponent\r
- 382                           .thumb\r
- 383                           .thumb_func\r
- 384                           .type   USBFS_ReInitComponent, %function\r
- 385                   USBFS_ReInitComponent:\r
- 386                   .LFB3:\r
- 425:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 426:.\Generated_Source\PSoC5/USBFS.c **** \r
- 427:.\Generated_Source\PSoC5/USBFS.c **** \r
- 428:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 429:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_ReInitComponent\r
- 430:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 431:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 432:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 16\r
-\r
-\r
- 433:.\Generated_Source\PSoC5/USBFS.c **** *  This function reinitialize the component configuration and is\r
- 434:.\Generated_Source\PSoC5/USBFS.c **** *  intend to be called from the Reset interrupt.\r
- 435:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 436:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 437:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 438:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 439:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 440:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
- 441:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 442:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
- 443:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_device: Contains the device number of the desired device\r
- 444:.\Generated_Source\PSoC5/USBFS.c **** *        descriptor. The device number can be found in the Device Descriptor Tab\r
- 445:.\Generated_Source\PSoC5/USBFS.c **** *       of "Configure" dialog, under the settings of desired Device Descriptor,\r
- 446:.\Generated_Source\PSoC5/USBFS.c **** *       in the "Device Number" field.\r
- 447:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_transferState: This variable used by the communication\r
- 448:.\Generated_Source\PSoC5/USBFS.c **** *       functions to handle current transfer state. Initialized to\r
- 449:.\Generated_Source\PSoC5/USBFS.c **** *       TRANS_STATE_IDLE in this API.\r
- 450:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_configuration: Contains current configuration number\r
- 451:.\Generated_Source\PSoC5/USBFS.c **** *       which is set by the Host using SET_CONFIGURATION request.\r
- 452:.\Generated_Source\PSoC5/USBFS.c **** *       Initialized to zero in this API.\r
- 453:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceAddress: Contains current device address. This\r
- 454:.\Generated_Source\PSoC5/USBFS.c **** *       variable is initialized to zero in this API. Host starts to communicate\r
- 455:.\Generated_Source\PSoC5/USBFS.c **** *      to device with address 0 and then set it to whatever value using\r
- 456:.\Generated_Source\PSoC5/USBFS.c **** *      SET_ADDRESS request.\r
- 457:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceStatus: initialized to 0.\r
- 458:.\Generated_Source\PSoC5/USBFS.c **** *       This is two bit variable which contain power status in first bit\r
- 459:.\Generated_Source\PSoC5/USBFS.c **** *       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
- 460:.\Generated_Source\PSoC5/USBFS.c **** *       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
- 461:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_lastPacketSize initialized to 0;\r
- 462:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 463:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
- 464:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
- 465:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 466:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 467:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_ReInitComponent(void) \r
- 468:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 387                           .loc 1 468 0\r
- 388                           .cfi_startproc\r
- 389                           @ args = 0, pretend = 0, frame = 0\r
- 390                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 391                           @ link register save eliminated.\r
- 392                   .LVL27:\r
- 469:.\Generated_Source\PSoC5/USBFS.c ****     /* Initialize _hidProtocol variable to comply with HID 7.2.6 Set_Protocol\r
- 470:.\Generated_Source\PSoC5/USBFS.c ****     *  Request: "When initialized, all devices default to report protocol."\r
- 471:.\Generated_Source\PSoC5/USBFS.c ****     */\r
- 472:.\Generated_Source\PSoC5/USBFS.c ****     #if defined(USBFS_ENABLE_HID_CLASS)\r
- 473:.\Generated_Source\PSoC5/USBFS.c ****         uint8 i;\r
- 474:.\Generated_Source\PSoC5/USBFS.c **** \r
- 475:.\Generated_Source\PSoC5/USBFS.c ****         for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
- 476:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 477:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_hidProtocol[i] = USBFS_PROTOCOL_REPORT;\r
- 393                           .loc 1 477 0\r
- 394 0000 0C4B                 ldr     r3, .L18\r
- 395 0002 0122                 movs    r2, #1\r
- 478:.\Generated_Source\PSoC5/USBFS.c ****         }\r
- 479:.\Generated_Source\PSoC5/USBFS.c ****     #endif /* USBFS_ENABLE_HID_CLASS */\r
- 480:.\Generated_Source\PSoC5/USBFS.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 17\r
-\r
-\r
- 481:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 396                           .loc 1 481 0\r
- 397 0004 0C49                 ldr     r1, .L18+4\r
- 477:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_hidProtocol[i] = USBFS_PROTOCOL_REPORT;\r
- 398                           .loc 1 477 0\r
- 399 0006 1A70                 strb    r2, [r3, #0]\r
- 400                   .LVL28:\r
- 401                           .loc 1 481 0\r
- 402 0008 0020                 movs    r0, #0\r
- 482:.\Generated_Source\PSoC5/USBFS.c **** \r
- 483:.\Generated_Source\PSoC5/USBFS.c ****     /* Clear all of the component data */\r
- 484:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 403                           .loc 1 484 0\r
- 404 000a 0C4A                 ldr     r2, .L18+8\r
- 485:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 405                           .loc 1 485 0\r
- 406 000c 0C4B                 ldr     r3, .L18+12\r
- 481:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 407                           .loc 1 481 0\r
- 408 000e 0870                 strb    r0, [r1, #0]\r
- 486:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 409                           .loc 1 486 0\r
- 410 0010 0C49                 ldr     r1, .L18+16\r
- 484:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 411                           .loc 1 484 0\r
- 412 0012 1070                 strb    r0, [r2, #0]\r
- 485:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 413                           .loc 1 485 0\r
- 414 0014 1870                 strb    r0, [r3, #0]\r
- 487:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 415                           .loc 1 487 0\r
- 416 0016 0C4A                 ldr     r2, .L18+20\r
- 488:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 417                           .loc 1 488 0\r
- 418 0018 0C4B                 ldr     r3, .L18+24\r
- 486:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 419                           .loc 1 486 0\r
- 420 001a 0870                 strb    r0, [r1, #0]\r
- 489:.\Generated_Source\PSoC5/USBFS.c **** \r
- 490:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_lastPacketSize = 0u;\r
- 421                           .loc 1 490 0\r
- 422 001c 0C49                 ldr     r1, .L18+28\r
- 487:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 423                           .loc 1 487 0\r
- 424 001e 1070                 strb    r0, [r2, #0]\r
- 488:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 425                           .loc 1 488 0\r
- 426 0020 1870                 strb    r0, [r3, #0]\r
- 491:.\Generated_Source\PSoC5/USBFS.c **** \r
- 492:.\Generated_Source\PSoC5/USBFS.c **** \r
- 493:.\Generated_Source\PSoC5/USBFS.c ****     /*  ACK Setup, Stall IN/OUT */\r
- 494:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
- 427                           .loc 1 494 0\r
- 428 0022 0C4B                 ldr     r3, .L18+32\r
- 490:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_lastPacketSize = 0u;\r
- 429                           .loc 1 490 0\r
- 430 0024 0870                 strb    r0, [r1, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 18\r
-\r
-\r
- 495:.\Generated_Source\PSoC5/USBFS.c **** \r
- 496:.\Generated_Source\PSoC5/USBFS.c ****     /* Enable the SIE with an address 0 */\r
- 497:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_CR0_PTR, USBFS_CR0_ENABLE);\r
- 431                           .loc 1 497 0\r
- 432 0026 8022                 movs    r2, #128\r
- 494:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
- 433                           .loc 1 494 0\r
- 434 0028 0320                 movs    r0, #3\r
- 435 002a 1870                 strb    r0, [r3, #0]\r
- 436                           .loc 1 497 0\r
- 437 002c 03F8202C             strb    r2, [r3, #-32]\r
- 438 0030 7047                 bx      lr\r
- 439                   .L19:\r
- 440 0032 00BF                 .align  2\r
- 441                   .L18:\r
- 442 0034 00000000             .word   USBFS_hidProtocol\r
- 443 0038 00000000             .word   USBFS_transferState\r
- 444 003c 00000000             .word   USBFS_configuration\r
- 445 0040 00000000             .word   USBFS_interfaceNumber\r
- 446 0044 00000000             .word   USBFS_configurationChanged\r
- 447 0048 00000000             .word   USBFS_deviceAddress\r
- 448 004c 00000000             .word   USBFS_deviceStatus\r
- 449 0050 00000000             .word   USBFS_lastPacketSize\r
- 450 0054 28600040             .word   1073766440\r
- 451                           .cfi_endproc\r
- 452                   .LFE3:\r
- 453                           .size   USBFS_ReInitComponent, .-USBFS_ReInitComponent\r
- 454                           .section        .text.USBFS_Stop,"ax",%progbits\r
- 455                           .align  1\r
- 456                           .global USBFS_Stop\r
- 457                           .thumb\r
- 458                           .thumb_func\r
- 459                           .type   USBFS_Stop, %function\r
- 460                   USBFS_Stop:\r
- 461                   .LFB4:\r
- 498:.\Generated_Source\PSoC5/USBFS.c **** \r
- 499:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 500:.\Generated_Source\PSoC5/USBFS.c **** \r
- 501:.\Generated_Source\PSoC5/USBFS.c **** \r
- 502:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 503:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_Stop\r
- 504:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 505:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 506:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 507:.\Generated_Source\PSoC5/USBFS.c **** *  This function shuts down the USB function including to release\r
- 508:.\Generated_Source\PSoC5/USBFS.c **** *  the D+ Pullup and disabling the SIE.\r
- 509:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 510:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 511:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 512:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 513:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 514:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 515:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 516:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
- 517:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_configuration: Contains current configuration number\r
- 518:.\Generated_Source\PSoC5/USBFS.c **** *       which is set by the Host using SET_CONFIGURATION request.\r
- 519:.\Generated_Source\PSoC5/USBFS.c **** *       Initialized to zero in this API.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 19\r
-\r
-\r
- 520:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceAddress: Contains current device address. This\r
- 521:.\Generated_Source\PSoC5/USBFS.c **** *       variable is initialized to zero in this API. Host starts to communicate\r
- 522:.\Generated_Source\PSoC5/USBFS.c **** *      to device with address 0 and then set it to whatever value using\r
- 523:.\Generated_Source\PSoC5/USBFS.c **** *      SET_ADDRESS request.\r
- 524:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_deviceStatus: initialized to 0.\r
- 525:.\Generated_Source\PSoC5/USBFS.c **** *       This is two bit variable which contain power status in first bit\r
- 526:.\Generated_Source\PSoC5/USBFS.c **** *       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
- 527:.\Generated_Source\PSoC5/USBFS.c **** *       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
- 528:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_configurationChanged: This variable is set to one after\r
- 529:.\Generated_Source\PSoC5/USBFS.c **** *       SET_CONFIGURATION request and cleared in this function.\r
- 530:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_intiVar variable is set to zero\r
- 531:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 532:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 533:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_Stop(void) \r
- 534:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 462                           .loc 1 534 0\r
- 463                           .cfi_startproc\r
- 464                           @ args = 0, pretend = 0, frame = 0\r
- 465                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 466                           @ link register save eliminated.\r
- 535:.\Generated_Source\PSoC5/USBFS.c **** \r
- 536:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 537:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */\r
- 538:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 539:.\Generated_Source\PSoC5/USBFS.c **** \r
- 540:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable the SIE */\r
- 541:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_CR0_REG &= (uint8)(~USBFS_CR0_ENABLE);\r
- 467                           .loc 1 541 0\r
- 468 0000 154B                 ldr     r3, .L21\r
- 469 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 470 0004 02F07F00             and     r0, r2, #127\r
- 471 0008 1870                 strb    r0, [r3, #0]\r
- 542:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable the d+ pullup */\r
- 543:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_USBIO_CR1_REG &= (uint8)(~USBFS_USBIO_CR1_USBPUEN);\r
- 472                           .loc 1 543 0\r
- 473 000a 997A                 ldrb    r1, [r3, #10]   @ zero_extendqisi2\r
- 474 000c 01F0FB02             and     r2, r1, #251\r
- 475 0010 9A72                 strb    r2, [r3, #10]\r
- 544:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable USB in ACT PM */\r
- 545:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_ACT_CFG_REG &= (uint8)(~USBFS_PM_ACT_EN_FSUSB);\r
- 476                           .loc 1 545 0\r
- 477 0012 124B                 ldr     r3, .L21+4\r
- 478 0014 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 479 0016 00F0FE01             and     r1, r0, #254\r
- 480 001a 1970                 strb    r1, [r3, #0]\r
- 546:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable USB block for Standby Power Mode */\r
- 547:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_STBY_CFG_REG &= (uint8)(~USBFS_PM_STBY_EN_FSUSB);\r
- 481                           .loc 1 547 0\r
- 482 001c 1A7C                 ldrb    r2, [r3, #16]   @ zero_extendqisi2\r
- 548:.\Generated_Source\PSoC5/USBFS.c **** \r
- 549:.\Generated_Source\PSoC5/USBFS.c ****     /* Disable the reset and EP interrupts */\r
- 550:.\Generated_Source\PSoC5/USBFS.c ****     CyIntDisable(USBFS_BUS_RESET_VECT_NUM);\r
- 483                           .loc 1 550 0\r
- 484 001e 4FF40001             mov     r1, #8388608\r
- 547:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_PM_STBY_CFG_REG &= (uint8)(~USBFS_PM_STBY_EN_FSUSB);\r
- 485                           .loc 1 547 0\r
- 486 0022 02F0FE00             and     r0, r2, #254\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 20\r
-\r
-\r
- 487 0026 1874                 strb    r0, [r3, #16]\r
- 488                           .loc 1 550 0\r
- 489 0028 0D4B                 ldr     r3, .L21+8\r
- 551:.\Generated_Source\PSoC5/USBFS.c ****     CyIntDisable(USBFS_EP_0_VECT_NUM);\r
- 490                           .loc 1 551 0\r
- 491 002a 4FF08072             mov     r2, #16777216\r
- 550:.\Generated_Source\PSoC5/USBFS.c ****     CyIntDisable(USBFS_BUS_RESET_VECT_NUM);\r
- 492                           .loc 1 550 0\r
- 493 002e 1960                 str     r1, [r3, #0]\r
- 552:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP1_ISR_REMOVE == 0u)\r
- 553:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_1_VECT_NUM);\r
- 494                           .loc 1 553 0\r
- 495 0030 0120                 movs    r0, #1\r
- 554:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP1_ISR_REMOVE */\r
- 555:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP2_ISR_REMOVE == 0u)\r
- 556:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_2_VECT_NUM);\r
- 496                           .loc 1 556 0\r
- 497 0032 0221                 movs    r1, #2\r
- 551:.\Generated_Source\PSoC5/USBFS.c ****     CyIntDisable(USBFS_EP_0_VECT_NUM);\r
- 498                           .loc 1 551 0\r
- 499 0034 1A60                 str     r2, [r3, #0]\r
- 553:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_1_VECT_NUM);\r
- 500                           .loc 1 553 0\r
- 501 0036 1860                 str     r0, [r3, #0]\r
- 557:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP2_ISR_REMOVE */\r
- 558:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP3_ISR_REMOVE == 0u)\r
- 559:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_3_VECT_NUM);\r
- 560:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP3_ISR_REMOVE */\r
- 561:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP4_ISR_REMOVE == 0u)\r
- 562:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_4_VECT_NUM);\r
- 563:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP4_ISR_REMOVE */\r
- 564:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP5_ISR_REMOVE == 0u)\r
- 565:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_5_VECT_NUM);\r
- 566:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP5_ISR_REMOVE */\r
- 567:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP6_ISR_REMOVE == 0u)\r
- 568:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_6_VECT_NUM);\r
- 569:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP6_ISR_REMOVE */\r
- 570:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP7_ISR_REMOVE == 0u)\r
- 571:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_7_VECT_NUM);\r
- 572:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP7_ISR_REMOVE */\r
- 573:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP8_ISR_REMOVE == 0u)\r
- 574:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_8_VECT_NUM);\r
- 575:.\Generated_Source\PSoC5/USBFS.c ****     #endif   /* End USBFS_EP8_ISR_REMOVE */\r
- 576:.\Generated_Source\PSoC5/USBFS.c **** \r
- 577:.\Generated_Source\PSoC5/USBFS.c ****     /* Clear all of the component data */\r
- 578:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 502                           .loc 1 578 0\r
- 503 0038 0A4A                 ldr     r2, .L21+12\r
- 556:.\Generated_Source\PSoC5/USBFS.c ****         CyIntDisable(USBFS_EP_2_VECT_NUM);\r
- 504                           .loc 1 556 0\r
- 505 003a 1960                 str     r1, [r3, #0]\r
- 579:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 506                           .loc 1 579 0\r
- 507 003c 0A48                 ldr     r0, .L21+16\r
- 580:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 508                           .loc 1 580 0\r
- 509 003e 0B49                 ldr     r1, .L21+20\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 21\r
-\r
-\r
- 578:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configuration = 0u;\r
- 510                           .loc 1 578 0\r
- 511 0040 0023                 movs    r3, #0\r
- 512 0042 1370                 strb    r3, [r2, #0]\r
- 579:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_interfaceNumber = 0u;\r
- 513                           .loc 1 579 0\r
- 514 0044 0370                 strb    r3, [r0, #0]\r
- 581:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 515                           .loc 1 581 0\r
- 516 0046 0A4A                 ldr     r2, .L21+24\r
- 580:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_configurationChanged = 0u;\r
- 517                           .loc 1 580 0\r
- 518 0048 0B70                 strb    r3, [r1, #0]\r
- 582:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 519                           .loc 1 582 0\r
- 520 004a 0A48                 ldr     r0, .L21+28\r
- 583:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_initVar = 0u;\r
- 521                           .loc 1 583 0\r
- 522 004c 0A49                 ldr     r1, .L21+32\r
- 581:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceAddress  = 0u;\r
- 523                           .loc 1 581 0\r
- 524 004e 1370                 strb    r3, [r2, #0]\r
- 525                           .loc 1 583 0\r
- 526 0050 0B70                 strb    r3, [r1, #0]\r
- 582:.\Generated_Source\PSoC5/USBFS.c ****     USBFS_deviceStatus = 0u;\r
- 527                           .loc 1 582 0\r
- 528 0052 0370                 strb    r3, [r0, #0]\r
- 529                           .loc 1 583 0\r
- 530 0054 7047                 bx      lr\r
- 531                   .L22:\r
- 532 0056 00BF                 .align  2\r
- 533                   .L21:\r
- 534 0058 08600040             .word   1073766408\r
- 535 005c A5430040             .word   1073759141\r
- 536 0060 80E100E0             .word   -536813184\r
- 537 0064 00000000             .word   USBFS_configuration\r
- 538 0068 00000000             .word   USBFS_interfaceNumber\r
- 539 006c 00000000             .word   USBFS_configurationChanged\r
- 540 0070 00000000             .word   USBFS_deviceAddress\r
- 541 0074 00000000             .word   USBFS_deviceStatus\r
- 542 0078 00000000             .word   .LANCHOR0\r
- 543                           .cfi_endproc\r
- 544                   .LFE4:\r
- 545                           .size   USBFS_Stop, .-USBFS_Stop\r
- 546                           .section        .text.USBFS_CheckActivity,"ax",%progbits\r
- 547                           .align  1\r
- 548                           .global USBFS_CheckActivity\r
- 549                           .thumb\r
- 550                           .thumb_func\r
- 551                           .type   USBFS_CheckActivity, %function\r
- 552                   USBFS_CheckActivity:\r
- 553                   .LFB5:\r
- 584:.\Generated_Source\PSoC5/USBFS.c **** \r
- 585:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 586:.\Generated_Source\PSoC5/USBFS.c **** \r
- 587:.\Generated_Source\PSoC5/USBFS.c **** \r
- 588:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 22\r
-\r
-\r
- 589:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_CheckActivity\r
- 590:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 591:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 592:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 593:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the activity status of the bus.  Clears the status hardware to\r
- 594:.\Generated_Source\PSoC5/USBFS.c **** *  provide fresh activity status on the next call of this routine.\r
- 595:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 596:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 597:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 598:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 599:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 600:.\Generated_Source\PSoC5/USBFS.c **** *  1 - If bus activity was detected since the last call to this function\r
- 601:.\Generated_Source\PSoC5/USBFS.c **** *  0 - If bus activity not was detected since the last call to this function\r
- 602:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 603:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 604:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_CheckActivity(void) \r
- 605:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 554                           .loc 1 605 0\r
- 555                           .cfi_startproc\r
- 556                           @ args = 0, pretend = 0, frame = 0\r
- 557                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 558                           @ link register save eliminated.\r
- 606:.\Generated_Source\PSoC5/USBFS.c ****     uint8 r;\r
- 607:.\Generated_Source\PSoC5/USBFS.c **** \r
- 608:.\Generated_Source\PSoC5/USBFS.c ****     r = CY_GET_REG8(USBFS_CR1_PTR);\r
- 559                           .loc 1 608 0\r
- 560 0000 034B                 ldr     r3, .L24\r
- 561 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 562                   .LVL29:\r
- 609:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_CR1_PTR, (r & ((uint8)(~USBFS_CR1_BUS_ACTIVITY))));\r
- 563                           .loc 1 609 0\r
- 564 0004 00F0FB02             and     r2, r0, #251\r
- 565 0008 1A70                 strb    r2, [r3, #0]\r
- 610:.\Generated_Source\PSoC5/USBFS.c **** \r
- 611:.\Generated_Source\PSoC5/USBFS.c ****     return((r & USBFS_CR1_BUS_ACTIVITY) >> USBFS_CR1_BUS_ACTIVITY_SHIFT);\r
- 612:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 566                           .loc 1 612 0\r
- 567 000a C0F38000             ubfx    r0, r0, #2, #1\r
- 568                   .LVL30:\r
- 569 000e 7047                 bx      lr\r
- 570                   .L25:\r
- 571                           .align  2\r
- 572                   .L24:\r
- 573 0010 09600040             .word   1073766409\r
- 574                           .cfi_endproc\r
- 575                   .LFE5:\r
- 576                           .size   USBFS_CheckActivity, .-USBFS_CheckActivity\r
- 577                           .section        .text.USBFS_GetConfiguration,"ax",%progbits\r
- 578                           .align  1\r
- 579                           .global USBFS_GetConfiguration\r
- 580                           .thumb\r
- 581                           .thumb_func\r
- 582                           .type   USBFS_GetConfiguration, %function\r
- 583                   USBFS_GetConfiguration:\r
- 584                   .LFB6:\r
- 613:.\Generated_Source\PSoC5/USBFS.c **** \r
- 614:.\Generated_Source\PSoC5/USBFS.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 23\r
-\r
-\r
- 615:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 616:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_GetConfiguration\r
- 617:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 618:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 619:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 620:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the current configuration setting\r
- 621:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 622:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 623:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 624:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 625:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 626:.\Generated_Source\PSoC5/USBFS.c **** *  configuration.\r
- 627:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 628:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 629:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_GetConfiguration(void) \r
- 630:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 585                           .loc 1 630 0\r
- 586                           .cfi_startproc\r
- 587                           @ args = 0, pretend = 0, frame = 0\r
- 588                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 589                           @ link register save eliminated.\r
- 631:.\Generated_Source\PSoC5/USBFS.c ****     return(USBFS_configuration);\r
- 590                           .loc 1 631 0\r
- 591 0000 014B                 ldr     r3, .L27\r
- 592 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 632:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 593                           .loc 1 632 0\r
- 594 0004 7047                 bx      lr\r
- 595                   .L28:\r
- 596 0006 00BF                 .align  2\r
- 597                   .L27:\r
- 598 0008 00000000             .word   USBFS_configuration\r
- 599                           .cfi_endproc\r
- 600                   .LFE6:\r
- 601                           .size   USBFS_GetConfiguration, .-USBFS_GetConfiguration\r
- 602                           .section        .text.USBFS_IsConfigurationChanged,"ax",%progbits\r
- 603                           .align  1\r
- 604                           .global USBFS_IsConfigurationChanged\r
- 605                           .thumb\r
- 606                           .thumb_func\r
- 607                           .type   USBFS_IsConfigurationChanged, %function\r
- 608                   USBFS_IsConfigurationChanged:\r
- 609                   .LFB7:\r
- 633:.\Generated_Source\PSoC5/USBFS.c **** \r
- 634:.\Generated_Source\PSoC5/USBFS.c **** \r
- 635:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 636:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_IsConfigurationChanged\r
- 637:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 638:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 639:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 640:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the clear on read configuration state. It is usefull when PC send\r
- 641:.\Generated_Source\PSoC5/USBFS.c **** *  double SET_CONFIGURATION request with same configuration number.\r
- 642:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 643:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 644:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 645:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 646:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 24\r
-\r
-\r
- 647:.\Generated_Source\PSoC5/USBFS.c **** *  Not zero value when new configuration has been changed, otherwise zero is\r
- 648:.\Generated_Source\PSoC5/USBFS.c **** *  returned.\r
- 649:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 650:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
- 651:.\Generated_Source\PSoC5/USBFS.c **** *   USBFS_configurationChanged: This variable is set to one after\r
- 652:.\Generated_Source\PSoC5/USBFS.c **** *       SET_CONFIGURATION request and cleared in this function.\r
- 653:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 654:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 655:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_IsConfigurationChanged(void) \r
- 656:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 610                           .loc 1 656 0\r
- 611                           .cfi_startproc\r
- 612                           @ args = 0, pretend = 0, frame = 0\r
- 613                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 614                           @ link register save eliminated.\r
- 615                   .LVL31:\r
- 657:.\Generated_Source\PSoC5/USBFS.c ****     uint8 res = 0u;\r
- 658:.\Generated_Source\PSoC5/USBFS.c **** \r
- 659:.\Generated_Source\PSoC5/USBFS.c ****     if(USBFS_configurationChanged != 0u)\r
- 616                           .loc 1 659 0\r
- 617 0000 034B                 ldr     r3, .L32\r
- 618 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 619 0004 10B1                 cbz     r0, .L30\r
- 660:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 661:.\Generated_Source\PSoC5/USBFS.c ****         res = USBFS_configurationChanged;\r
- 662:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_configurationChanged = 0u;\r
- 620                           .loc 1 662 0\r
- 621 0006 0022                 movs    r2, #0\r
- 661:.\Generated_Source\PSoC5/USBFS.c ****         res = USBFS_configurationChanged;\r
- 622                           .loc 1 661 0\r
- 623 0008 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 624                   .LVL32:\r
- 625                           .loc 1 662 0\r
- 626 000a 1A70                 strb    r2, [r3, #0]\r
- 627                   .LVL33:\r
- 628                   .L30:\r
- 663:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 664:.\Generated_Source\PSoC5/USBFS.c **** \r
- 665:.\Generated_Source\PSoC5/USBFS.c ****     return(res);\r
- 666:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 629                           .loc 1 666 0\r
- 630 000c 7047                 bx      lr\r
- 631                   .L33:\r
- 632 000e 00BF                 .align  2\r
- 633                   .L32:\r
- 634 0010 00000000             .word   USBFS_configurationChanged\r
- 635                           .cfi_endproc\r
- 636                   .LFE7:\r
- 637                           .size   USBFS_IsConfigurationChanged, .-USBFS_IsConfigurationChanged\r
- 638                           .section        .text.USBFS_GetInterfaceSetting,"ax",%progbits\r
- 639                           .align  1\r
- 640                           .global USBFS_GetInterfaceSetting\r
- 641                           .thumb\r
- 642                           .thumb_func\r
- 643                           .type   USBFS_GetInterfaceSetting, %function\r
- 644                   USBFS_GetInterfaceSetting:\r
- 645                   .LFB8:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 25\r
-\r
-\r
- 667:.\Generated_Source\PSoC5/USBFS.c **** \r
- 668:.\Generated_Source\PSoC5/USBFS.c **** \r
- 669:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 670:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_GetInterfaceSetting\r
- 671:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 672:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 673:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 674:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the alternate setting from current interface\r
- 675:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 676:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 677:.\Generated_Source\PSoC5/USBFS.c **** *  uint8 interfaceNumber, interface number\r
- 678:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 679:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 680:.\Generated_Source\PSoC5/USBFS.c **** *  Alternate setting.\r
- 681:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 682:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 683:.\Generated_Source\PSoC5/USBFS.c **** uint8  USBFS_GetInterfaceSetting(uint8 interfaceNumber)\r
- 684:.\Generated_Source\PSoC5/USBFS.c ****                                                     \r
- 685:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 646                           .loc 1 685 0\r
- 647                           .cfi_startproc\r
- 648                           @ args = 0, pretend = 0, frame = 0\r
- 649                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 650                           @ link register save eliminated.\r
- 651                   .LVL34:\r
- 686:.\Generated_Source\PSoC5/USBFS.c ****     return(USBFS_interfaceSetting[interfaceNumber]);\r
- 652                           .loc 1 686 0\r
- 653 0000 014B                 ldr     r3, .L35\r
- 654 0002 185C                 ldrb    r0, [r3, r0]    @ zero_extendqisi2\r
- 655                   .LVL35:\r
- 687:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 656                           .loc 1 687 0\r
- 657 0004 7047                 bx      lr\r
- 658                   .L36:\r
- 659 0006 00BF                 .align  2\r
- 660                   .L35:\r
- 661 0008 00000000             .word   USBFS_interfaceSetting\r
- 662                           .cfi_endproc\r
- 663                   .LFE8:\r
- 664                           .size   USBFS_GetInterfaceSetting, .-USBFS_GetInterfaceSetting\r
- 665                           .section        .text.USBFS_GetEPState,"ax",%progbits\r
- 666                           .align  1\r
- 667                           .global USBFS_GetEPState\r
- 668                           .thumb\r
- 669                           .thumb_func\r
- 670                           .type   USBFS_GetEPState, %function\r
- 671                   USBFS_GetEPState:\r
- 672                   .LFB9:\r
- 688:.\Generated_Source\PSoC5/USBFS.c **** \r
- 689:.\Generated_Source\PSoC5/USBFS.c **** \r
- 690:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 691:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_GetEPState\r
- 692:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 693:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 694:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 695:.\Generated_Source\PSoC5/USBFS.c **** *  Returned the state of the requested endpoint.\r
- 696:.\Generated_Source\PSoC5/USBFS.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 26\r
-\r
-\r
- 697:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 698:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Endpoint Number\r
- 699:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 700:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 701:.\Generated_Source\PSoC5/USBFS.c **** *  State of the requested endpoint.\r
- 702:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 703:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 704:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_GetEPState(uint8 epNumber) \r
- 705:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 673                           .loc 1 705 0\r
- 674                           .cfi_startproc\r
- 675                           @ args = 0, pretend = 0, frame = 0\r
- 676                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 677                           @ link register save eliminated.\r
- 678                   .LVL36:\r
- 706:.\Generated_Source\PSoC5/USBFS.c ****     return(USBFS_EP[epNumber].apiEpState);\r
- 679                           .loc 1 706 0\r
- 680 0000 024B                 ldr     r3, .L38\r
- 681 0002 0C22                 movs    r2, #12\r
- 682 0004 02FB0030             mla     r0, r2, r0, r3\r
- 683                   .LVL37:\r
- 684 0008 4078                 ldrb    r0, [r0, #1]    @ zero_extendqisi2\r
- 707:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 685                           .loc 1 707 0\r
- 686 000a 7047                 bx      lr\r
- 687                   .L39:\r
- 688                           .align  2\r
- 689                   .L38:\r
- 690 000c 00000000             .word   USBFS_EP\r
- 691                           .cfi_endproc\r
- 692                   .LFE9:\r
- 693                           .size   USBFS_GetEPState, .-USBFS_GetEPState\r
- 694                           .section        .text.USBFS_GetEPCount,"ax",%progbits\r
- 695                           .align  1\r
- 696                           .global USBFS_GetEPCount\r
- 697                           .thumb\r
- 698                           .thumb_func\r
- 699                           .type   USBFS_GetEPCount, %function\r
- 700                   USBFS_GetEPCount:\r
- 701                   .LFB10:\r
- 708:.\Generated_Source\PSoC5/USBFS.c **** \r
- 709:.\Generated_Source\PSoC5/USBFS.c **** \r
- 710:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 711:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_GetEPCount\r
- 712:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 713:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 714:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 715:.\Generated_Source\PSoC5/USBFS.c **** *  This function supports Data Endpoints only(EP1-EP8).\r
- 716:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the transfer count for the requested endpoint.  The value from\r
- 717:.\Generated_Source\PSoC5/USBFS.c **** *  the count registers includes 2 counts for the two byte checksum of the\r
- 718:.\Generated_Source\PSoC5/USBFS.c **** *  packet.  This function subtracts the two counts.\r
- 719:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 720:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
- 721:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Data Endpoint Number.\r
- 722:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
- 723:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 724:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 27\r
-\r
-\r
- 725:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the current byte count from the specified endpoint or 0 for an\r
- 726:.\Generated_Source\PSoC5/USBFS.c **** *  invalid endpoint.\r
- 727:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 728:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 729:.\Generated_Source\PSoC5/USBFS.c **** uint16 USBFS_GetEPCount(uint8 epNumber) \r
- 730:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 702                           .loc 1 730 0\r
- 703                           .cfi_startproc\r
- 704                           @ args = 0, pretend = 0, frame = 0\r
- 705                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 706                           @ link register save eliminated.\r
- 707                   .LVL38:\r
- 731:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri;\r
- 732:.\Generated_Source\PSoC5/USBFS.c ****     uint16 result = 0u;\r
- 733:.\Generated_Source\PSoC5/USBFS.c **** \r
- 734:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 708                           .loc 1 734 0\r
- 709 0000 0138                 subs    r0, r0, #1\r
- 710                   .LVL39:\r
- 711 0002 C3B2                 uxtb    r3, r0\r
- 712 0004 072B                 cmp     r3, #7\r
- 713 0006 0CD8                 bhi     .L42\r
- 714                   .LVL40:\r
- 735:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 736:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 715                           .loc 1 736 0\r
- 716 0008 1901                 lsls    r1, r3, #4\r
- 737:.\Generated_Source\PSoC5/USBFS.c **** \r
- 738:.\Generated_Source\PSoC5/USBFS.c ****         result = (uint8)(CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri)) &\r
- 717                           .loc 1 738 0\r
- 718 000a 074A                 ldr     r2, .L43\r
- 719 000c CBB2                 uxtb    r3, r1\r
- 720                   .LVL41:\r
- 721 000e 985C                 ldrb    r0, [r3, r2]    @ zero_extendqisi2\r
- 722                   .LVL42:\r
- 739:.\Generated_Source\PSoC5/USBFS.c ****                           USBFS_EPX_CNT0_MASK);\r
- 740:.\Generated_Source\PSoC5/USBFS.c ****         result = (result << 8u) | CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri));\r
- 723                           .loc 1 740 0\r
- 724 0010 511C                 adds    r1, r2, #1\r
- 725 0012 5B5C                 ldrb    r3, [r3, r1]    @ zero_extendqisi2\r
- 726 0014 00F00F02             and     r2, r0, #15\r
- 727 0018 43EA0220             orr     r0, r3, r2, lsl #8\r
- 728                   .LVL43:\r
- 741:.\Generated_Source\PSoC5/USBFS.c ****         result -= USBFS_EPX_CNTX_CRC_COUNT;\r
- 729                           .loc 1 741 0\r
- 730 001c 811E                 subs    r1, r0, #2\r
- 731 001e 88B2                 uxth    r0, r1\r
- 732                   .LVL44:\r
- 733 0020 7047                 bx      lr\r
- 734                   .LVL45:\r
- 735                   .L42:\r
- 732:.\Generated_Source\PSoC5/USBFS.c ****     uint16 result = 0u;\r
- 736                           .loc 1 732 0\r
- 737 0022 0020                 movs    r0, #0\r
- 738                   .LVL46:\r
- 742:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 743:.\Generated_Source\PSoC5/USBFS.c ****     return(result);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 28\r
-\r
-\r
- 744:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 739                           .loc 1 744 0\r
- 740 0024 7047                 bx      lr\r
- 741                   .L44:\r
- 742 0026 00BF                 .align  2\r
- 743                   .L43:\r
- 744 0028 0C600040             .word   1073766412\r
- 745                           .cfi_endproc\r
- 746                   .LFE10:\r
- 747                           .size   USBFS_GetEPCount, .-USBFS_GetEPCount\r
- 748                           .section        .text.USBFS_LoadInEP,"ax",%progbits\r
- 749                           .align  1\r
- 750                           .global USBFS_LoadInEP\r
- 751                           .thumb\r
- 752                           .thumb_func\r
- 753                           .type   USBFS_LoadInEP, %function\r
- 754                   USBFS_LoadInEP:\r
- 755                   .LFB11:\r
- 745:.\Generated_Source\PSoC5/USBFS.c **** \r
- 746:.\Generated_Source\PSoC5/USBFS.c **** \r
- 747:.\Generated_Source\PSoC5/USBFS.c **** #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 748:.\Generated_Source\PSoC5/USBFS.c **** \r
- 749:.\Generated_Source\PSoC5/USBFS.c **** \r
- 750:.\Generated_Source\PSoC5/USBFS.c ****     /*******************************************************************************\r
- 751:.\Generated_Source\PSoC5/USBFS.c ****     * Function Name: USBFS_InitEP_DMA\r
- 752:.\Generated_Source\PSoC5/USBFS.c ****     ********************************************************************************\r
- 753:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 754:.\Generated_Source\PSoC5/USBFS.c ****     * Summary:\r
- 755:.\Generated_Source\PSoC5/USBFS.c ****     *  This function allocates and initializes a DMA channel to be used by the\r
- 756:.\Generated_Source\PSoC5/USBFS.c ****     *  USBFS_LoadInEP() or USBFS_ReadOutEP() APIs for data\r
- 757:.\Generated_Source\PSoC5/USBFS.c ****     *  transfer.\r
- 758:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 759:.\Generated_Source\PSoC5/USBFS.c ****     * Parameters:\r
- 760:.\Generated_Source\PSoC5/USBFS.c ****     *  epNumber: Contains the data endpoint number.\r
- 761:.\Generated_Source\PSoC5/USBFS.c ****     *            Valid values are between 1 and 8.\r
- 762:.\Generated_Source\PSoC5/USBFS.c ****     *  *pData: Pointer to a data array that is related to the EP transfers.\r
- 763:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 764:.\Generated_Source\PSoC5/USBFS.c ****     * Return:\r
- 765:.\Generated_Source\PSoC5/USBFS.c ****     *  None.\r
- 766:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 767:.\Generated_Source\PSoC5/USBFS.c ****     * Reentrant:\r
- 768:.\Generated_Source\PSoC5/USBFS.c ****     *  No.\r
- 769:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 770:.\Generated_Source\PSoC5/USBFS.c ****     *******************************************************************************/\r
- 771:.\Generated_Source\PSoC5/USBFS.c ****     void USBFS_InitEP_DMA(uint8 epNumber, const uint8 *pData)\r
- 772:.\Generated_Source\PSoC5/USBFS.c ****                                                                     \r
- 773:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 774:.\Generated_Source\PSoC5/USBFS.c ****         uint16 src;\r
- 775:.\Generated_Source\PSoC5/USBFS.c ****         uint16 dst;\r
- 776:.\Generated_Source\PSoC5/USBFS.c ****         #if (CY_PSOC3)                  /* PSoC 3 */\r
- 777:.\Generated_Source\PSoC5/USBFS.c ****             src = HI16(CYDEV_SRAM_BASE);\r
- 778:.\Generated_Source\PSoC5/USBFS.c ****             dst = HI16(CYDEV_PERIPH_BASE);\r
- 779:.\Generated_Source\PSoC5/USBFS.c ****             pData = pData;\r
- 780:.\Generated_Source\PSoC5/USBFS.c ****         #else                           /* PSoC 5 */\r
- 781:.\Generated_Source\PSoC5/USBFS.c ****             if((USBFS_EP[epNumber].addr & USBFS_DIR_IN) != 0u )\r
- 782:.\Generated_Source\PSoC5/USBFS.c ****             {   /* for the IN EP source is the SRAM memory buffer */\r
- 783:.\Generated_Source\PSoC5/USBFS.c ****                 src = HI16(pData);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 29\r
-\r
-\r
- 784:.\Generated_Source\PSoC5/USBFS.c ****                 dst = HI16(CYDEV_PERIPH_BASE);\r
- 785:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 786:.\Generated_Source\PSoC5/USBFS.c ****             else\r
- 787:.\Generated_Source\PSoC5/USBFS.c ****             {   /* for the OUT EP source is the SIE register */\r
- 788:.\Generated_Source\PSoC5/USBFS.c ****                 src = HI16(CYDEV_PERIPH_BASE);\r
- 789:.\Generated_Source\PSoC5/USBFS.c ****                 dst = HI16(pData);\r
- 790:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 791:.\Generated_Source\PSoC5/USBFS.c ****         #endif  /* End C51 */\r
- 792:.\Generated_Source\PSoC5/USBFS.c ****         switch(epNumber)\r
- 793:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 794:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP1:\r
- 795:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA1_REMOVE == 0u)\r
- 796:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep1_DmaInitialize(\r
- 797:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 798:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA1_REMOVE */\r
- 799:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 800:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP2:\r
- 801:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA2_REMOVE == 0u)\r
- 802:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep2_DmaInitialize(\r
- 803:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 804:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA2_REMOVE */\r
- 805:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 806:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP3:\r
- 807:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA3_REMOVE == 0u)\r
- 808:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep3_DmaInitialize(\r
- 809:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 810:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA3_REMOVE */\r
- 811:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 812:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP4:\r
- 813:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA4_REMOVE == 0u)\r
- 814:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep4_DmaInitialize(\r
- 815:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 816:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA4_REMOVE */\r
- 817:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 818:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP5:\r
- 819:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA5_REMOVE == 0u)\r
- 820:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep5_DmaInitialize(\r
- 821:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 822:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA5_REMOVE */\r
- 823:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 824:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP6:\r
- 825:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA6_REMOVE == 0u)\r
- 826:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep6_DmaInitialize(\r
- 827:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 828:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA6_REMOVE */\r
- 829:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 830:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP7:\r
- 831:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA7_REMOVE == 0u)\r
- 832:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep7_DmaInitialize(\r
- 833:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 834:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA7_REMOVE */\r
- 835:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 836:.\Generated_Source\PSoC5/USBFS.c ****             case USBFS_EP8:\r
- 837:.\Generated_Source\PSoC5/USBFS.c ****                 #if(USBFS_DMA8_REMOVE == 0u)\r
- 838:.\Generated_Source\PSoC5/USBFS.c ****                     USBFS_DmaChan[epNumber] = USBFS_ep8_DmaInitialize(\r
- 839:.\Generated_Source\PSoC5/USBFS.c ****                         USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
- 840:.\Generated_Source\PSoC5/USBFS.c ****                 #endif   /* End USBFS_DMA8_REMOVE */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 30\r
-\r
-\r
- 841:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 842:.\Generated_Source\PSoC5/USBFS.c ****             default:\r
- 843:.\Generated_Source\PSoC5/USBFS.c ****                 /* Do not support EP0 DMA transfers */\r
- 844:.\Generated_Source\PSoC5/USBFS.c ****                 break;\r
- 845:.\Generated_Source\PSoC5/USBFS.c ****         }\r
- 846:.\Generated_Source\PSoC5/USBFS.c ****         if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 847:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 848:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_DmaTd[epNumber] = CyDmaTdAllocate();\r
- 849:.\Generated_Source\PSoC5/USBFS.c ****         }\r
- 850:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 851:.\Generated_Source\PSoC5/USBFS.c **** \r
- 852:.\Generated_Source\PSoC5/USBFS.c **** \r
- 853:.\Generated_Source\PSoC5/USBFS.c ****     /*******************************************************************************\r
- 854:.\Generated_Source\PSoC5/USBFS.c ****     * Function Name: USBFS_Stop_DMA\r
- 855:.\Generated_Source\PSoC5/USBFS.c ****     ********************************************************************************\r
- 856:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 857:.\Generated_Source\PSoC5/USBFS.c ****     * Summary: Stops and free DMA\r
- 858:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 859:.\Generated_Source\PSoC5/USBFS.c ****     * Parameters:\r
- 860:.\Generated_Source\PSoC5/USBFS.c ****     *  epNumber: Contains the data endpoint number or\r
- 861:.\Generated_Source\PSoC5/USBFS.c ****     *           USBFS_MAX_EP to stop all DMAs\r
- 862:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 863:.\Generated_Source\PSoC5/USBFS.c ****     * Return:\r
- 864:.\Generated_Source\PSoC5/USBFS.c ****     *  None.\r
- 865:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 866:.\Generated_Source\PSoC5/USBFS.c ****     * Reentrant:\r
- 867:.\Generated_Source\PSoC5/USBFS.c ****     *  No.\r
- 868:.\Generated_Source\PSoC5/USBFS.c ****     *\r
- 869:.\Generated_Source\PSoC5/USBFS.c ****     *******************************************************************************/\r
- 870:.\Generated_Source\PSoC5/USBFS.c ****     void USBFS_Stop_DMA(uint8 epNumber) \r
- 871:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 872:.\Generated_Source\PSoC5/USBFS.c ****         uint8 i;\r
- 873:.\Generated_Source\PSoC5/USBFS.c ****         i = (epNumber < USBFS_MAX_EP) ? epNumber : USBFS_EP1;\r
- 874:.\Generated_Source\PSoC5/USBFS.c ****         do\r
- 875:.\Generated_Source\PSoC5/USBFS.c ****         {\r
- 876:.\Generated_Source\PSoC5/USBFS.c ****             if(USBFS_DmaTd[i] != DMA_INVALID_TD)\r
- 877:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 878:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChDisable(USBFS_DmaChan[i]);\r
- 879:.\Generated_Source\PSoC5/USBFS.c ****                 CyDmaTdFree(USBFS_DmaTd[i]);\r
- 880:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_DmaTd[i] = DMA_INVALID_TD;\r
- 881:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 882:.\Generated_Source\PSoC5/USBFS.c ****             i++;\r
- 883:.\Generated_Source\PSoC5/USBFS.c ****         }while((i < USBFS_MAX_EP) && (epNumber == USBFS_MAX_EP));\r
- 884:.\Generated_Source\PSoC5/USBFS.c ****     }\r
- 885:.\Generated_Source\PSoC5/USBFS.c **** \r
- 886:.\Generated_Source\PSoC5/USBFS.c **** #endif /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 887:.\Generated_Source\PSoC5/USBFS.c **** \r
- 888:.\Generated_Source\PSoC5/USBFS.c **** \r
- 889:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
- 890:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_LoadInEP\r
- 891:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
- 892:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 893:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
- 894:.\Generated_Source\PSoC5/USBFS.c **** *  Loads and enables the specified USB data endpoint for an IN interrupt or bulk\r
- 895:.\Generated_Source\PSoC5/USBFS.c **** *  transfer.\r
- 896:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 897:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 31\r
-\r
-\r
- 898:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Contains the data endpoint number.\r
- 899:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
- 900:.\Generated_Source\PSoC5/USBFS.c **** *  *pData: A pointer to a data array from which the data for the endpoint space\r
- 901:.\Generated_Source\PSoC5/USBFS.c **** *          is loaded.\r
- 902:.\Generated_Source\PSoC5/USBFS.c **** *  length: The number of bytes to transfer from the array and then send as a\r
- 903:.\Generated_Source\PSoC5/USBFS.c **** *          result of an IN request. Valid values are between 0 and 512.\r
- 904:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 905:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
- 906:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
- 907:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 908:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
- 909:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
- 910:.\Generated_Source\PSoC5/USBFS.c **** *\r
- 911:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
- 912:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)\r
- 913:.\Generated_Source\PSoC5/USBFS.c ****                                                                         \r
- 914:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 756                           .loc 1 914 0\r
- 757                           .cfi_startproc\r
- 758                           @ args = 0, pretend = 0, frame = 0\r
- 759                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 760                   .LVL47:\r
- 915:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri;\r
- 916:.\Generated_Source\PSoC5/USBFS.c ****     reg8 *p;\r
- 917:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
- 918:.\Generated_Source\PSoC5/USBFS.c ****         uint16 i;\r
- 919:.\Generated_Source\PSoC5/USBFS.c ****     #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
- 920:.\Generated_Source\PSoC5/USBFS.c **** \r
- 921:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 761                           .loc 1 921 0\r
- 762 0000 431E                 subs    r3, r0, #1\r
- 763 0002 DBB2                 uxtb    r3, r3\r
- 764 0004 072B                 cmp     r3, #7\r
- 914:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 765                           .loc 1 914 0\r
- 766 0006 F0B5                 push    {r4, r5, r6, r7, lr}\r
- 767                   .LCFI3:\r
- 768                           .cfi_def_cfa_offset 20\r
- 769                           .cfi_offset 4, -20\r
- 770                           .cfi_offset 5, -16\r
- 771                           .cfi_offset 6, -12\r
- 772                           .cfi_offset 7, -8\r
- 773                           .cfi_offset 14, -4\r
- 774                           .loc 1 921 0\r
- 775 0008 2FD8                 bhi     .L45\r
- 776                   .LVL48:\r
- 922:.\Generated_Source\PSoC5/USBFS.c ****     {\r
- 923:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 924:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
- 925:.\Generated_Source\PSoC5/USBFS.c **** \r
- 926:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
- 927:.\Generated_Source\PSoC5/USBFS.c ****             /* Limits length to available buffer space, auto MM could send packets up to 1024 bytes\r
- 928:.\Generated_Source\PSoC5/USBFS.c ****             if(length > (USBFS_EPX_DATA_BUF_MAX - USBFS_EP[epNumber].buffOffset))\r
- 777                           .loc 1 928 0\r
- 778 000a 184E                 ldr     r6, .L52\r
- 923:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 779                           .loc 1 923 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 32\r
-\r
-\r
- 780 000c 1C01                 lsls    r4, r3, #4\r
- 781                           .loc 1 928 0\r
- 782 000e 0C27                 movs    r7, #12\r
- 924:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
- 783                           .loc 1 924 0\r
- 784 0010 E3B2                 uxtb    r3, r4\r
- 785                   .LVL49:\r
- 786                           .loc 1 928 0\r
- 787 0012 07FB0064             mla     r4, r7, r0, r6\r
- 788 0016 E788                 ldrh    r7, [r4, #6]\r
- 924:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
- 789                           .loc 1 924 0\r
- 790 0018 154D                 ldr     r5, .L52+4\r
- 791                           .loc 1 928 0\r
- 792 001a BFB2                 uxth    r7, r7\r
- 793 001c C7F50077             rsb     r7, r7, #512\r
- 794 0020 BA42                 cmp     r2, r7\r
- 924:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
- 795                           .loc 1 924 0\r
- 796 0022 1D44                 add     r5, r3, r5\r
- 797                   .LVL50:\r
- 798                           .loc 1 928 0\r
- 799 0024 03D9                 bls     .L47\r
- 929:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 930:.\Generated_Source\PSoC5/USBFS.c ****                 length = USBFS_EPX_DATA_BUF_MAX - USBFS_EP[epNumber].buffOffset;\r
- 800                           .loc 1 930 0\r
- 801 0026 E288                 ldrh    r2, [r4, #6]\r
- 802                   .LVL51:\r
- 803 0028 C2F50074             rsb     r4, r2, #512\r
- 804 002c A2B2                 uxth    r2, r4\r
- 805                   .LVL52:\r
- 806                   .L47:\r
- 931:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 932:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
- 933:.\Generated_Source\PSoC5/USBFS.c **** \r
- 934:.\Generated_Source\PSoC5/USBFS.c ****         /* Set the count and data toggle */\r
- 935:.\Generated_Source\PSoC5/USBFS.c ****         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),\r
- 807                           .loc 1 935 0\r
- 808 002e 0C24                 movs    r4, #12\r
- 809 0030 04FB0066             mla     r6, r4, r0, r6\r
- 810 0034 F478                 ldrb    r4, [r6, #3]    @ zero_extendqisi2\r
- 811 0036 44EA1226             orr     r6, r4, r2, lsr #8\r
- 812 003a 0E4C                 ldr     r4, .L52+8\r
- 813 003c 1E55                 strb    r6, [r3, r4]\r
- 936:.\Generated_Source\PSoC5/USBFS.c ****                             (length >> 8u) | (USBFS_EP[epNumber].epToggle));\r
- 937:.\Generated_Source\PSoC5/USBFS.c ****         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri),  length & 0xFFu);\r
- 814                           .loc 1 937 0\r
- 815 003e D6B2                 uxtb    r6, r2\r
- 816 0040 0134                 adds    r4, r4, #1\r
- 817 0042 1E55                 strb    r6, [r3, r4]\r
- 938:.\Generated_Source\PSoC5/USBFS.c **** \r
- 939:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
- 940:.\Generated_Source\PSoC5/USBFS.c ****             if(pData != NULL)\r
- 818                           .loc 1 940 0\r
- 819 0044 49B9                 cbnz    r1, .L51\r
- 820                   .L50:\r
- 941:.\Generated_Source\PSoC5/USBFS.c ****             {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 33\r
-\r
-\r
- 942:.\Generated_Source\PSoC5/USBFS.c ****                 /* Copy the data using the arbiter data register */\r
- 943:.\Generated_Source\PSoC5/USBFS.c ****                 for (i = 0u; i < length; i++)\r
- 944:.\Generated_Source\PSoC5/USBFS.c ****                 {\r
- 945:.\Generated_Source\PSoC5/USBFS.c ****                     CY_SET_REG8(p, pData[i]);\r
- 946:.\Generated_Source\PSoC5/USBFS.c ****                 }\r
- 947:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 948:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 821                           .loc 1 948 0\r
- 822 0046 094A                 ldr     r2, .L52\r
- 823                   .LVL53:\r
- 824 0048 0C21                 movs    r1, #12\r
- 825                   .LVL54:\r
- 826 004a 01FB0020             mla     r0, r1, r0, r2\r
- 827                   .LVL55:\r
- 828 004e 0021                 movs    r1, #0\r
- 829 0050 4170                 strb    r1, [r0, #1]\r
- 949:.\Generated_Source\PSoC5/USBFS.c ****             /* Write the Mode register */\r
- 950:.\Generated_Source\PSoC5/USBFS.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
- 830                           .loc 1 950 0\r
- 831 0052 4079                 ldrb    r0, [r0, #5]    @ zero_extendqisi2\r
- 832 0054 084A                 ldr     r2, .L52+12\r
- 833 0056 9854                 strb    r0, [r3, r2]\r
- 834 0058 F0BD                 pop     {r4, r5, r6, r7, pc}\r
- 835                   .LVL56:\r
- 836                   .L51:\r
- 940:.\Generated_Source\PSoC5/USBFS.c ****             if(pData != NULL)\r
- 837                           .loc 1 940 0\r
- 838 005a 0024                 movs    r4, #0\r
- 839                   .L48:\r
- 943:.\Generated_Source\PSoC5/USBFS.c ****                 for (i = 0u; i < length; i++)\r
- 840                           .loc 1 943 0 discriminator 1\r
- 841 005c A6B2                 uxth    r6, r4\r
- 842 005e 9642                 cmp     r6, r2\r
- 843 0060 F1D2                 bcs     .L50\r
- 844                   .L49:\r
- 945:.\Generated_Source\PSoC5/USBFS.c ****                     CY_SET_REG8(p, pData[i]);\r
- 845                           .loc 1 945 0 discriminator 2\r
- 846 0062 0E5D                 ldrb    r6, [r1, r4]    @ zero_extendqisi2\r
- 847 0064 0134                 adds    r4, r4, #1\r
- 848 0066 2E70                 strb    r6, [r5, #0]\r
- 849 0068 F8E7                 b       .L48\r
- 850                   .LVL57:\r
- 851                   .L45:\r
- 852 006a F0BD                 pop     {r4, r5, r6, r7, pc}\r
- 853                   .L53:\r
- 854                           .align  2\r
- 855                   .L52:\r
- 856 006c 00000000             .word   USBFS_EP\r
- 857 0070 88600040             .word   1073766536\r
- 858 0074 0C600040             .word   1073766412\r
- 859 0078 0E600040             .word   1073766414\r
- 860                           .cfi_endproc\r
- 861                   .LFE11:\r
- 862                           .size   USBFS_LoadInEP, .-USBFS_LoadInEP\r
- 863                           .section        .text.USBFS_EnableOutEP,"ax",%progbits\r
- 864                           .align  1\r
- 865                           .global USBFS_EnableOutEP\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 34\r
-\r
-\r
- 866                           .thumb\r
- 867                           .thumb_func\r
- 868                           .type   USBFS_EnableOutEP, %function\r
- 869                   USBFS_EnableOutEP:\r
- 870                   .LFB13:\r
- 951:.\Generated_Source\PSoC5/USBFS.c ****         #else\r
- 952:.\Generated_Source\PSoC5/USBFS.c ****             /* Init DMA if it was not initialized */\r
- 953:.\Generated_Source\PSoC5/USBFS.c ****             if(USBFS_DmaTd[epNumber] == DMA_INVALID_TD)\r
- 954:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 955:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_InitEP_DMA(epNumber, pData);\r
- 956:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 957:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
- 958:.\Generated_Source\PSoC5/USBFS.c **** \r
- 959:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
- 960:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 961:.\Generated_Source\PSoC5/USBFS.c ****             if((pData != NULL) && (length > 0u))\r
- 962:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 963:.\Generated_Source\PSoC5/USBFS.c ****                 /* Enable DMA in mode2 for transferring data */\r
- 964:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
- 965:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
- 966:.\Generated_Source\PSoC5/USBFS.c ****                                                                                  TD_TERMIN_EN | TD_\r
- 967:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)\r
- 968:.\Generated_Source\PSoC5/USBFS.c ****                 /* Enable the DMA */\r
- 969:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
- 970:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
- 971:.\Generated_Source\PSoC5/USBFS.c ****                 /* Generate DMA request */\r
- 972:.\Generated_Source\PSoC5/USBFS.c ****                 * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_DMA_REQ;\r
- 973:.\Generated_Source\PSoC5/USBFS.c ****                 * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_ARB_EPX_CFG_DMA_REQ));\r
- 974:.\Generated_Source\PSoC5/USBFS.c ****                 /* Mode register will be written in arb ISR after DMA transfer complete */\r
- 975:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 976:.\Generated_Source\PSoC5/USBFS.c ****             else\r
- 977:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 978:.\Generated_Source\PSoC5/USBFS.c ****                 /* When zero-length packet - write the Mode register directly */\r
- 979:.\Generated_Source\PSoC5/USBFS.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
- 980:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 981:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
- 982:.\Generated_Source\PSoC5/USBFS.c **** \r
- 983:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 984:.\Generated_Source\PSoC5/USBFS.c ****             if(pData != NULL)\r
- 985:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 986:.\Generated_Source\PSoC5/USBFS.c ****                 /* Enable DMA in mode3 for transferring data */\r
- 987:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
- 988:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length,\r
- 989:.\Generated_Source\PSoC5/USBFS.c ****                                                USBFS_DmaTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR\r
- 990:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)\r
- 991:.\Generated_Source\PSoC5/USBFS.c ****                 /* Clear Any potential pending DMA requests before starting the DMA channel to tran\r
- 992:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);\r
- 993:.\Generated_Source\PSoC5/USBFS.c ****                 /* Enable the DMA */\r
- 994:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
- 995:.\Generated_Source\PSoC5/USBFS.c ****                 (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
- 996:.\Generated_Source\PSoC5/USBFS.c ****             }\r
- 997:.\Generated_Source\PSoC5/USBFS.c ****             else\r
- 998:.\Generated_Source\PSoC5/USBFS.c ****             {\r
- 999:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
-1000:.\Generated_Source\PSoC5/USBFS.c ****                 if(length > 0u)\r
-1001:.\Generated_Source\PSoC5/USBFS.c ****                 {\r
-1002:.\Generated_Source\PSoC5/USBFS.c ****                     /* Set Data ready status, This will generate DMA request */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 35\r
-\r
-\r
-1003:.\Generated_Source\PSoC5/USBFS.c ****                     * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_IN_DATA_RDY;\r
-1004:.\Generated_Source\PSoC5/USBFS.c ****                     /* Mode register will be written in arb ISR(In Buffer Full) after first DMA tra\r
-1005:.\Generated_Source\PSoC5/USBFS.c ****                 }\r
-1006:.\Generated_Source\PSoC5/USBFS.c ****                 else\r
-1007:.\Generated_Source\PSoC5/USBFS.c ****                 {\r
-1008:.\Generated_Source\PSoC5/USBFS.c ****                     /* When zero-length packet - write the Mode register directly */\r
-1009:.\Generated_Source\PSoC5/USBFS.c ****                     CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
-1010:.\Generated_Source\PSoC5/USBFS.c ****                 }\r
-1011:.\Generated_Source\PSoC5/USBFS.c ****             }\r
-1012:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-1013:.\Generated_Source\PSoC5/USBFS.c **** \r
-1014:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1015:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1016:.\Generated_Source\PSoC5/USBFS.c **** \r
-1017:.\Generated_Source\PSoC5/USBFS.c **** \r
-1018:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1019:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_ReadOutEP\r
-1020:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1021:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1022:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1023:.\Generated_Source\PSoC5/USBFS.c **** *  Read data from an endpoint.  The application must call\r
-1024:.\Generated_Source\PSoC5/USBFS.c **** *  USBFS_GetEPState to see if an event is pending.\r
-1025:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1026:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1027:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Contains the data endpoint number.\r
-1028:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
-1029:.\Generated_Source\PSoC5/USBFS.c **** *  pData: A pointer to a data array from which the data for the endpoint space\r
-1030:.\Generated_Source\PSoC5/USBFS.c **** *         is loaded.\r
-1031:.\Generated_Source\PSoC5/USBFS.c **** *  length: The number of bytes to transfer from the USB Out endpoint and loads\r
-1032:.\Generated_Source\PSoC5/USBFS.c **** *          it into data array. Valid values are between 0 and 1023. The function\r
-1033:.\Generated_Source\PSoC5/USBFS.c **** *          moves fewer than the requested number of bytes if the host sends\r
-1034:.\Generated_Source\PSoC5/USBFS.c **** *          fewer bytes than requested.\r
-1035:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1036:.\Generated_Source\PSoC5/USBFS.c **** * Returns:\r
-1037:.\Generated_Source\PSoC5/USBFS.c **** *  Number of bytes received, 0 for an invalid endpoint.\r
-1038:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1039:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
-1040:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
-1041:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1042:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1043:.\Generated_Source\PSoC5/USBFS.c **** uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)\r
-1044:.\Generated_Source\PSoC5/USBFS.c ****                                                                         \r
-1045:.\Generated_Source\PSoC5/USBFS.c **** {\r
-1046:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri;\r
-1047:.\Generated_Source\PSoC5/USBFS.c ****     reg8 *p;\r
-1048:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-1049:.\Generated_Source\PSoC5/USBFS.c ****         uint16 i;\r
-1050:.\Generated_Source\PSoC5/USBFS.c ****     #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-1051:.\Generated_Source\PSoC5/USBFS.c ****     #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-1052:.\Generated_Source\PSoC5/USBFS.c ****         uint16 xferCount;\r
-1053:.\Generated_Source\PSoC5/USBFS.c ****     #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-1054:.\Generated_Source\PSoC5/USBFS.c **** \r
-1055:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
-1056:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1057:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-1058:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
-1059:.\Generated_Source\PSoC5/USBFS.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 36\r
-\r
-\r
-1060:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-1061:.\Generated_Source\PSoC5/USBFS.c ****             /* Determine which is smaller the requested data or the available data */\r
-1062:.\Generated_Source\PSoC5/USBFS.c ****             xferCount = USBFS_GetEPCount(epNumber);\r
-1063:.\Generated_Source\PSoC5/USBFS.c ****             if (length > xferCount)\r
-1064:.\Generated_Source\PSoC5/USBFS.c ****             {\r
-1065:.\Generated_Source\PSoC5/USBFS.c ****                 length = xferCount;\r
-1066:.\Generated_Source\PSoC5/USBFS.c ****             }\r
-1067:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-1068:.\Generated_Source\PSoC5/USBFS.c **** \r
-1069:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-1070:.\Generated_Source\PSoC5/USBFS.c ****             /* Copy the data using the arbiter data register */\r
-1071:.\Generated_Source\PSoC5/USBFS.c ****             for (i = 0u; i < length; i++)\r
-1072:.\Generated_Source\PSoC5/USBFS.c ****             {\r
-1073:.\Generated_Source\PSoC5/USBFS.c ****                 pData[i] = CY_GET_REG8(p);\r
-1074:.\Generated_Source\PSoC5/USBFS.c ****             }\r
-1075:.\Generated_Source\PSoC5/USBFS.c **** \r
-1076:.\Generated_Source\PSoC5/USBFS.c ****             /* (re)arming of OUT endpoint */\r
-1077:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_EnableOutEP(epNumber);\r
-1078:.\Generated_Source\PSoC5/USBFS.c ****         #else\r
-1079:.\Generated_Source\PSoC5/USBFS.c ****             /*Init DMA if it was not initialized */\r
-1080:.\Generated_Source\PSoC5/USBFS.c ****             if(USBFS_DmaTd[epNumber] == DMA_INVALID_TD)\r
-1081:.\Generated_Source\PSoC5/USBFS.c ****             {\r
-1082:.\Generated_Source\PSoC5/USBFS.c ****                 USBFS_InitEP_DMA(epNumber, pData);\r
-1083:.\Generated_Source\PSoC5/USBFS.c ****             }\r
-1084:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-1085:.\Generated_Source\PSoC5/USBFS.c **** \r
-1086:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-1087:.\Generated_Source\PSoC5/USBFS.c ****             /* Enable DMA in mode2 for transferring data */\r
-1088:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-1089:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
-1090:.\Generated_Source\PSoC5/USBFS.c ****                                                                                 TD_TERMIN_EN | TD_I\r
-1091:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)p), LO16((uint32)pData));\r
-1092:.\Generated_Source\PSoC5/USBFS.c ****             /* Enable the DMA */\r
-1093:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-1094:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-1095:.\Generated_Source\PSoC5/USBFS.c **** \r
-1096:.\Generated_Source\PSoC5/USBFS.c ****             /* Generate DMA request */\r
-1097:.\Generated_Source\PSoC5/USBFS.c ****             * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_DMA_REQ;\r
-1098:.\Generated_Source\PSoC5/USBFS.c ****             * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_ARB_EPX_CFG_DMA_REQ));\r
-1099:.\Generated_Source\PSoC5/USBFS.c ****             /* Out EP will be (re)armed in arb ISR after transfer complete */\r
-1100:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-1101:.\Generated_Source\PSoC5/USBFS.c **** \r
-1102:.\Generated_Source\PSoC5/USBFS.c ****         #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-1103:.\Generated_Source\PSoC5/USBFS.c ****             /* Enable DMA in mode3 for transferring data */\r
-1104:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-1105:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, USBFS_DmaTd[epNumber],\r
-1106:.\Generated_Source\PSoC5/USBFS.c ****                                                                                 TD_TERMIN_EN | TD_I\r
-1107:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)p), LO16((uint32)pData));\r
-1108:.\Generated_Source\PSoC5/USBFS.c **** \r
-1109:.\Generated_Source\PSoC5/USBFS.c ****             /* Clear Any potential pending DMA requests before starting the DMA channel to transfer\r
-1110:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);\r
-1111:.\Generated_Source\PSoC5/USBFS.c ****             /* Enable the DMA */\r
-1112:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-1113:.\Generated_Source\PSoC5/USBFS.c ****             (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-1114:.\Generated_Source\PSoC5/USBFS.c ****             /* Out EP will be (re)armed in arb ISR after transfer complete */\r
-1115:.\Generated_Source\PSoC5/USBFS.c ****         #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-1116:.\Generated_Source\PSoC5/USBFS.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 37\r
-\r
-\r
-1117:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1118:.\Generated_Source\PSoC5/USBFS.c ****     else\r
-1119:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1120:.\Generated_Source\PSoC5/USBFS.c ****         length = 0u;\r
-1121:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1122:.\Generated_Source\PSoC5/USBFS.c **** \r
-1123:.\Generated_Source\PSoC5/USBFS.c ****     return(length);\r
-1124:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1125:.\Generated_Source\PSoC5/USBFS.c **** \r
-1126:.\Generated_Source\PSoC5/USBFS.c **** \r
-1127:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1128:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_EnableOutEP\r
-1129:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1130:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1131:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1132:.\Generated_Source\PSoC5/USBFS.c **** *  This function enables an OUT endpoint.  It should not be\r
-1133:.\Generated_Source\PSoC5/USBFS.c **** *  called for an IN endpoint.\r
-1134:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1135:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1136:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Endpoint Number\r
-1137:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
-1138:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1139:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-1140:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
-1141:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1142:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
-1143:.\Generated_Source\PSoC5/USBFS.c **** *  USBFS_EP[epNumber].apiEpState - set to NO_EVENT_PENDING\r
-1144:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1145:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
-1146:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
-1147:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1148:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1149:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_EnableOutEP(uint8 epNumber) \r
-1150:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 871                           .loc 1 1150 0\r
- 872                           .cfi_startproc\r
- 873                           @ args = 0, pretend = 0, frame = 0\r
- 874                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 875                           @ link register save eliminated.\r
- 876                   .LVL58:\r
-1151:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri;\r
-1152:.\Generated_Source\PSoC5/USBFS.c **** \r
-1153:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 877                           .loc 1 1153 0\r
- 878 0000 431E                 subs    r3, r0, #1\r
- 879 0002 DBB2                 uxtb    r3, r3\r
- 880 0004 072B                 cmp     r3, #7\r
- 881 0006 0AD8                 bhi     .L54\r
- 882                   .LVL59:\r
-1154:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1155:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-1156:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 883                           .loc 1 1156 0\r
- 884 0008 054A                 ldr     r2, .L56\r
- 885 000a 0C21                 movs    r1, #12\r
- 886 000c 01FB0020             mla     r0, r1, r0, r2\r
- 887                   .LVL60:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 38\r
-\r
-\r
- 888 0010 0021                 movs    r1, #0\r
- 889 0012 4170                 strb    r1, [r0, #1]\r
-1155:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 890                           .loc 1 1155 0\r
- 891 0014 1B01                 lsls    r3, r3, #4\r
- 892                   .LVL61:\r
-1157:.\Generated_Source\PSoC5/USBFS.c ****         /* Write the Mode register */\r
-1158:.\Generated_Source\PSoC5/USBFS.c ****         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
- 893                           .loc 1 1158 0\r
- 894 0016 4079                 ldrb    r0, [r0, #5]    @ zero_extendqisi2\r
- 895 0018 024A                 ldr     r2, .L56+4\r
- 896 001a DBB2                 uxtb    r3, r3\r
- 897 001c 9854                 strb    r0, [r3, r2]\r
- 898                   .L54:\r
- 899 001e 7047                 bx      lr\r
- 900                   .L57:\r
- 901                           .align  2\r
- 902                   .L56:\r
- 903 0020 00000000             .word   USBFS_EP\r
- 904 0024 0E600040             .word   1073766414\r
- 905                           .cfi_endproc\r
- 906                   .LFE13:\r
- 907                           .size   USBFS_EnableOutEP, .-USBFS_EnableOutEP\r
- 908                           .section        .text.USBFS_ReadOutEP,"ax",%progbits\r
- 909                           .align  1\r
- 910                           .global USBFS_ReadOutEP\r
- 911                           .thumb\r
- 912                           .thumb_func\r
- 913                           .type   USBFS_ReadOutEP, %function\r
- 914                   USBFS_ReadOutEP:\r
- 915                   .LFB12:\r
-1045:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 916                           .loc 1 1045 0\r
- 917                           .cfi_startproc\r
- 918                           @ args = 0, pretend = 0, frame = 0\r
- 919                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 920                   .LVL62:\r
- 921 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 922                   .LCFI4:\r
- 923                           .cfi_def_cfa_offset 24\r
- 924                           .cfi_offset 3, -24\r
- 925                           .cfi_offset 4, -20\r
- 926                           .cfi_offset 5, -16\r
- 927                           .cfi_offset 6, -12\r
- 928                           .cfi_offset 7, -8\r
- 929                           .cfi_offset 14, -4\r
-1055:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
- 930                           .loc 1 1055 0\r
- 931 0002 431E                 subs    r3, r0, #1\r
-1045:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 932                           .loc 1 1045 0\r
- 933 0004 0D46                 mov     r5, r1\r
-1055:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
- 934                           .loc 1 1055 0\r
- 935 0006 D9B2                 uxtb    r1, r3\r
- 936                   .LVL63:\r
- 937 0008 0729                 cmp     r1, #7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 39\r
-\r
-\r
-1045:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 938                           .loc 1 1045 0\r
- 939 000a 0746                 mov     r7, r0\r
- 940 000c 1446                 mov     r4, r2\r
-1055:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
- 941                           .loc 1 1055 0\r
- 942 000e 16D8                 bhi     .L62\r
-1055:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
- 943                           .loc 1 1055 0 is_stmt 0 discriminator 1\r
- 944 0010 BDB1                 cbz     r5, .L63\r
- 945                   .LVL64:\r
-1057:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 946                           .loc 1 1057 0 is_stmt 1\r
- 947 0012 0A01                 lsls    r2, r1, #4\r
- 948                   .LVL65:\r
-1058:.\Generated_Source\PSoC5/USBFS.c ****         p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
- 949                           .loc 1 1058 0\r
- 950 0014 0C4E                 ldr     r6, .L65\r
- 951 0016 D3B2                 uxtb    r3, r2\r
- 952 0018 9E19                 adds    r6, r3, r6\r
- 953                   .LVL66:\r
-1062:.\Generated_Source\PSoC5/USBFS.c ****             xferCount = USBFS_GetEPCount(epNumber);\r
- 954                           .loc 1 1062 0\r
- 955 001a FFF7FEFF             bl      USBFS_GetEPCount\r
- 956                   .LVL67:\r
- 957 001e A042                 cmp     r0, r4\r
- 958 0020 28BF                 it      cs\r
- 959 0022 2046                 movcs   r0, r4\r
- 960                   .LVL68:\r
- 961 0024 84B2                 uxth    r4, r0\r
- 962                   .LVL69:\r
-1071:.\Generated_Source\PSoC5/USBFS.c ****             for (i = 0u; i < length; i++)\r
- 963                           .loc 1 1071 0\r
- 964 0026 0022                 movs    r2, #0\r
- 965                   .LVL70:\r
- 966                   .L60:\r
-1071:.\Generated_Source\PSoC5/USBFS.c ****             for (i = 0u; i < length; i++)\r
- 967                           .loc 1 1071 0 is_stmt 0 discriminator 1\r
- 968 0028 90B2                 uxth    r0, r2\r
- 969 002a A042                 cmp     r0, r4\r
- 970 002c 03D2                 bcs     .L64\r
- 971                   .L61:\r
-1073:.\Generated_Source\PSoC5/USBFS.c ****                 pData[i] = CY_GET_REG8(p);\r
- 972                           .loc 1 1073 0 is_stmt 1 discriminator 2\r
- 973 002e 3178                 ldrb    r1, [r6, #0]    @ zero_extendqisi2\r
- 974 0030 A954                 strb    r1, [r5, r2]\r
- 975 0032 0132                 adds    r2, r2, #1\r
- 976 0034 F8E7                 b       .L60\r
- 977                   .L64:\r
-1077:.\Generated_Source\PSoC5/USBFS.c ****             USBFS_EnableOutEP(epNumber);\r
- 978                           .loc 1 1077 0\r
- 979 0036 3846                 mov     r0, r7\r
- 980 0038 FFF7FEFF             bl      USBFS_EnableOutEP\r
- 981                   .LVL71:\r
- 982 003c 02E0                 b       .L59\r
- 983                   .LVL72:\r
- 984                   .L62:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 40\r
-\r
-\r
-1120:.\Generated_Source\PSoC5/USBFS.c ****         length = 0u;\r
- 985                           .loc 1 1120 0\r
- 986 003e 0024                 movs    r4, #0\r
- 987 0040 00E0                 b       .L59\r
- 988                   .L63:\r
- 989 0042 2C46                 mov     r4, r5\r
- 990                   .LVL73:\r
- 991                   .L59:\r
-1124:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 992                           .loc 1 1124 0\r
- 993 0044 2046                 mov     r0, r4\r
- 994 0046 F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 995                   .L66:\r
- 996                           .align  2\r
- 997                   .L65:\r
- 998 0048 88600040             .word   1073766536\r
- 999                           .cfi_endproc\r
- 1000                  .LFE12:\r
- 1001                          .size   USBFS_ReadOutEP, .-USBFS_ReadOutEP\r
- 1002                          .section        .text.USBFS_DisableOutEP,"ax",%progbits\r
- 1003                          .align  1\r
- 1004                          .global USBFS_DisableOutEP\r
- 1005                          .thumb\r
- 1006                          .thumb_func\r
- 1007                          .type   USBFS_DisableOutEP, %function\r
- 1008                  USBFS_DisableOutEP:\r
- 1009                  .LFB14:\r
-1159:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1160:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1161:.\Generated_Source\PSoC5/USBFS.c **** \r
-1162:.\Generated_Source\PSoC5/USBFS.c **** \r
-1163:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1164:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_DisableOutEP\r
-1165:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1166:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1167:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1168:.\Generated_Source\PSoC5/USBFS.c **** *  This function disables an OUT endpoint.  It should not be\r
-1169:.\Generated_Source\PSoC5/USBFS.c **** *  called for an IN endpoint.\r
-1170:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1171:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1172:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Endpoint Number\r
-1173:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
-1174:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1175:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-1176:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
-1177:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1178:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1179:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_DisableOutEP(uint8 epNumber) \r
-1180:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 1010                          .loc 1 1180 0\r
- 1011                          .cfi_startproc\r
- 1012                          @ args = 0, pretend = 0, frame = 0\r
- 1013                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1014                          @ link register save eliminated.\r
- 1015                  .LVL74:\r
-1181:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri ;\r
-1182:.\Generated_Source\PSoC5/USBFS.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 41\r
-\r
-\r
-1183:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 1016                          .loc 1 1183 0\r
- 1017 0000 0138                subs    r0, r0, #1\r
- 1018                  .LVL75:\r
- 1019 0002 C1B2                uxtb    r1, r0\r
- 1020 0004 0729                cmp     r1, #7\r
- 1021 0006 04D8                bhi     .L67\r
- 1022                  .LVL76:\r
-1184:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1185:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 1023                          .loc 1 1185 0\r
- 1024 0008 0A01                lsls    r2, r1, #4\r
-1186:.\Generated_Source\PSoC5/USBFS.c ****         /* Write the Mode register */\r
-1187:.\Generated_Source\PSoC5/USBFS.c ****         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
- 1025                          .loc 1 1187 0\r
- 1026 000a 024B                ldr     r3, .L69\r
- 1027 000c D0B2                uxtb    r0, r2\r
- 1028 000e 0821                movs    r1, #8\r
- 1029                  .LVL77:\r
- 1030 0010 C154                strb    r1, [r0, r3]\r
- 1031                  .L67:\r
- 1032 0012 7047                bx      lr\r
- 1033                  .L70:\r
- 1034                          .align  2\r
- 1035                  .L69:\r
- 1036 0014 0E600040            .word   1073766414\r
- 1037                          .cfi_endproc\r
- 1038                  .LFE14:\r
- 1039                          .size   USBFS_DisableOutEP, .-USBFS_DisableOutEP\r
- 1040                          .section        .text.USBFS_Force,"ax",%progbits\r
- 1041                          .align  1\r
- 1042                          .global USBFS_Force\r
- 1043                          .thumb\r
- 1044                          .thumb_func\r
- 1045                          .type   USBFS_Force, %function\r
- 1046                  USBFS_Force:\r
- 1047                  .LFB15:\r
-1188:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1189:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1190:.\Generated_Source\PSoC5/USBFS.c **** \r
-1191:.\Generated_Source\PSoC5/USBFS.c **** \r
-1192:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1193:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_Force\r
-1194:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1195:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1196:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1197:.\Generated_Source\PSoC5/USBFS.c **** *  Forces the bus state\r
-1198:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1199:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1200:.\Generated_Source\PSoC5/USBFS.c **** *  bState\r
-1201:.\Generated_Source\PSoC5/USBFS.c **** *    USBFS_FORCE_J\r
-1202:.\Generated_Source\PSoC5/USBFS.c **** *    USBFS_FORCE_K\r
-1203:.\Generated_Source\PSoC5/USBFS.c **** *    USBFS_FORCE_SE0\r
-1204:.\Generated_Source\PSoC5/USBFS.c **** *    USBFS_FORCE_NONE\r
-1205:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1206:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-1207:.\Generated_Source\PSoC5/USBFS.c **** *  None.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 42\r
-\r
-\r
-1208:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1209:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1210:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_Force(uint8 bState) \r
-1211:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 1048                          .loc 1 1211 0\r
- 1049                          .cfi_startproc\r
- 1050                          @ args = 0, pretend = 0, frame = 0\r
- 1051                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1052                          @ link register save eliminated.\r
- 1053                  .LVL78:\r
-1212:.\Generated_Source\PSoC5/USBFS.c ****     CY_SET_REG8(USBFS_USBIO_CR0_PTR, bState);\r
- 1054                          .loc 1 1212 0\r
- 1055 0000 014B                ldr     r3, .L72\r
- 1056 0002 1870                strb    r0, [r3, #0]\r
- 1057 0004 7047                bx      lr\r
- 1058                  .L73:\r
- 1059 0006 00BF                .align  2\r
- 1060                  .L72:\r
- 1061 0008 10600040            .word   1073766416\r
- 1062                          .cfi_endproc\r
- 1063                  .LFE15:\r
- 1064                          .size   USBFS_Force, .-USBFS_Force\r
- 1065                          .section        .text.USBFS_GetEPAckState,"ax",%progbits\r
- 1066                          .align  1\r
- 1067                          .global USBFS_GetEPAckState\r
- 1068                          .thumb\r
- 1069                          .thumb_func\r
- 1070                          .type   USBFS_GetEPAckState, %function\r
- 1071                  USBFS_GetEPAckState:\r
- 1072                  .LFB16:\r
-1213:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1214:.\Generated_Source\PSoC5/USBFS.c **** \r
-1215:.\Generated_Source\PSoC5/USBFS.c **** \r
-1216:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1217:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_GetEPAckState\r
-1218:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1219:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1220:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1221:.\Generated_Source\PSoC5/USBFS.c **** *  Returns the ACK of the CR0 Register (ACKD)\r
-1222:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1223:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1224:.\Generated_Source\PSoC5/USBFS.c **** *  epNumber: Endpoint Number\r
-1225:.\Generated_Source\PSoC5/USBFS.c **** *            Valid values are between 1 and 8.\r
-1226:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1227:.\Generated_Source\PSoC5/USBFS.c **** * Returns\r
-1228:.\Generated_Source\PSoC5/USBFS.c **** *  0 if nothing has been ACKD, non-=zero something has been ACKD\r
-1229:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1230:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1231:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_GetEPAckState(uint8 epNumber) \r
-1232:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 1073                          .loc 1 1232 0\r
- 1074                          .cfi_startproc\r
- 1075                          @ args = 0, pretend = 0, frame = 0\r
- 1076                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1077                          @ link register save eliminated.\r
- 1078                  .LVL79:\r
-1233:.\Generated_Source\PSoC5/USBFS.c ****     uint8 ri;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 43\r
-\r
-\r
-1234:.\Generated_Source\PSoC5/USBFS.c ****     uint8 cr = 0u;\r
-1235:.\Generated_Source\PSoC5/USBFS.c **** \r
-1236:.\Generated_Source\PSoC5/USBFS.c ****     if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
- 1079                          .loc 1 1236 0\r
- 1080 0000 0138                subs    r0, r0, #1\r
- 1081                  .LVL80:\r
- 1082 0002 C1B2                uxtb    r1, r0\r
- 1083 0004 0729                cmp     r1, #7\r
- 1084 0006 07D8                bhi     .L76\r
- 1085                  .LVL81:\r
-1237:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1238:.\Generated_Source\PSoC5/USBFS.c ****         ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 1086                          .loc 1 1238 0\r
- 1087 0008 0A01                lsls    r2, r1, #4\r
-1239:.\Generated_Source\PSoC5/USBFS.c ****         cr = CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri)) & USBFS_MODE_ACKD;\r
- 1088                          .loc 1 1239 0\r
- 1089 000a 044B                ldr     r3, .L77\r
- 1090 000c D0B2                uxtb    r0, r2\r
- 1091 000e C15C                ldrb    r1, [r0, r3]    @ zero_extendqisi2\r
- 1092                  .LVL82:\r
- 1093 0010 01F01002            and     r2, r1, #16\r
- 1094 0014 D0B2                uxtb    r0, r2\r
- 1095                  .LVL83:\r
- 1096 0016 7047                bx      lr\r
- 1097                  .LVL84:\r
- 1098                  .L76:\r
-1234:.\Generated_Source\PSoC5/USBFS.c ****     uint8 cr = 0u;\r
- 1099                          .loc 1 1234 0\r
- 1100 0018 0020                movs    r0, #0\r
- 1101                  .LVL85:\r
-1240:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1241:.\Generated_Source\PSoC5/USBFS.c **** \r
-1242:.\Generated_Source\PSoC5/USBFS.c ****     return(cr);\r
-1243:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 1102                          .loc 1 1243 0\r
- 1103 001a 7047                bx      lr\r
- 1104                  .L78:\r
- 1105                          .align  2\r
- 1106                  .L77:\r
- 1107 001c 0E600040            .word   1073766414\r
- 1108                          .cfi_endproc\r
- 1109                  .LFE16:\r
- 1110                          .size   USBFS_GetEPAckState, .-USBFS_GetEPAckState\r
- 1111                          .section        .text.USBFS_SetPowerStatus,"ax",%progbits\r
- 1112                          .align  1\r
- 1113                          .global USBFS_SetPowerStatus\r
- 1114                          .thumb\r
- 1115                          .thumb_func\r
- 1116                          .type   USBFS_SetPowerStatus, %function\r
- 1117                  USBFS_SetPowerStatus:\r
- 1118                  .LFB17:\r
-1244:.\Generated_Source\PSoC5/USBFS.c **** \r
-1245:.\Generated_Source\PSoC5/USBFS.c **** \r
-1246:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1247:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_SetPowerStatus\r
-1248:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1249:.\Generated_Source\PSoC5/USBFS.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 44\r
-\r
-\r
-1250:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1251:.\Generated_Source\PSoC5/USBFS.c **** *  Sets the device power status for reporting in the Get Device Status\r
-1252:.\Generated_Source\PSoC5/USBFS.c **** *  request\r
-1253:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1254:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1255:.\Generated_Source\PSoC5/USBFS.c **** *  powerStatus: USBFS_DEVICE_STATUS_BUS_POWERED(0) - Bus Powered,\r
-1256:.\Generated_Source\PSoC5/USBFS.c **** *               USBFS_DEVICE_STATUS_SELF_POWERED(1) - Self Powered\r
-1257:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1258:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-1259:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
-1260:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1261:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
-1262:.\Generated_Source\PSoC5/USBFS.c **** *  USBFS_deviceStatus - set power status\r
-1263:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1264:.\Generated_Source\PSoC5/USBFS.c **** * Reentrant:\r
-1265:.\Generated_Source\PSoC5/USBFS.c **** *  No.\r
-1266:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1267:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1268:.\Generated_Source\PSoC5/USBFS.c **** void USBFS_SetPowerStatus(uint8 powerStatus) \r
-1269:.\Generated_Source\PSoC5/USBFS.c **** {\r
- 1119                          .loc 1 1269 0\r
- 1120                          .cfi_startproc\r
- 1121                          @ args = 0, pretend = 0, frame = 0\r
- 1122                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1123                          @ link register save eliminated.\r
- 1124                  .LVL86:\r
- 1125 0000 044B                ldr     r3, .L83\r
-1270:.\Generated_Source\PSoC5/USBFS.c ****     if (powerStatus != USBFS_DEVICE_STATUS_BUS_POWERED)\r
-1271:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1272:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_deviceStatus |=  USBFS_DEVICE_STATUS_SELF_POWERED;\r
- 1126                          .loc 1 1272 0\r
- 1127 0002 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-1270:.\Generated_Source\PSoC5/USBFS.c ****     if (powerStatus != USBFS_DEVICE_STATUS_BUS_POWERED)\r
- 1128                          .loc 1 1270 0\r
- 1129 0004 10B1                cbz     r0, .L80\r
- 1130                          .loc 1 1272 0\r
- 1131 0006 42F00100            orr     r0, r2, #1\r
- 1132                  .LVL87:\r
- 1133 000a 01E0                b       .L82\r
- 1134                  .LVL88:\r
- 1135                  .L80:\r
-1273:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1274:.\Generated_Source\PSoC5/USBFS.c ****     else\r
-1275:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1276:.\Generated_Source\PSoC5/USBFS.c ****         USBFS_deviceStatus &=  ((uint8)(~USBFS_DEVICE_STATUS_SELF_POWERED));\r
- 1136                          .loc 1 1276 0\r
- 1137 000c 02F0FE00            and     r0, r2, #254\r
- 1138                  .LVL89:\r
- 1139                  .L82:\r
- 1140 0010 1870                strb    r0, [r3, #0]\r
- 1141 0012 7047                bx      lr\r
- 1142                  .L84:\r
- 1143                          .align  2\r
- 1144                  .L83:\r
- 1145 0014 00000000            .word   USBFS_deviceStatus\r
- 1146                          .cfi_endproc\r
- 1147                  .LFE17:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 45\r
-\r
-\r
- 1148                          .size   USBFS_SetPowerStatus, .-USBFS_SetPowerStatus\r
- 1149                          .section        .text.USBFS_RWUEnabled,"ax",%progbits\r
- 1150                          .align  1\r
- 1151                          .global USBFS_RWUEnabled\r
- 1152                          .thumb\r
- 1153                          .thumb_func\r
- 1154                          .type   USBFS_RWUEnabled, %function\r
- 1155                  USBFS_RWUEnabled:\r
- 1156                  .LFB18:\r
-1277:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1278:.\Generated_Source\PSoC5/USBFS.c **** }\r
-1279:.\Generated_Source\PSoC5/USBFS.c **** \r
-1280:.\Generated_Source\PSoC5/USBFS.c **** \r
-1281:.\Generated_Source\PSoC5/USBFS.c **** #if (USBFS_MON_VBUS == 1u)\r
-1282:.\Generated_Source\PSoC5/USBFS.c **** \r
-1283:.\Generated_Source\PSoC5/USBFS.c ****     /*******************************************************************************\r
-1284:.\Generated_Source\PSoC5/USBFS.c ****     * Function Name: USBFS_VBusPresent\r
-1285:.\Generated_Source\PSoC5/USBFS.c ****     ********************************************************************************\r
-1286:.\Generated_Source\PSoC5/USBFS.c ****     *\r
-1287:.\Generated_Source\PSoC5/USBFS.c ****     * Summary:\r
-1288:.\Generated_Source\PSoC5/USBFS.c ****     *  Determines VBUS presence for Self Powered Devices.\r
-1289:.\Generated_Source\PSoC5/USBFS.c ****     *\r
-1290:.\Generated_Source\PSoC5/USBFS.c ****     * Parameters:\r
-1291:.\Generated_Source\PSoC5/USBFS.c ****     *  None.\r
-1292:.\Generated_Source\PSoC5/USBFS.c ****     *\r
-1293:.\Generated_Source\PSoC5/USBFS.c ****     * Return:\r
-1294:.\Generated_Source\PSoC5/USBFS.c ****     *  1 if VBUS is present, otherwise 0.\r
-1295:.\Generated_Source\PSoC5/USBFS.c ****     *\r
-1296:.\Generated_Source\PSoC5/USBFS.c ****     *******************************************************************************/\r
-1297:.\Generated_Source\PSoC5/USBFS.c ****     uint8 USBFS_VBusPresent(void) \r
-1298:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1299:.\Generated_Source\PSoC5/USBFS.c ****         return((0u != (CY_GET_REG8(USBFS_VBUS_PS_PTR) & USBFS_VBUS_MASK)) ? 1u : 0u);\r
-1300:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1301:.\Generated_Source\PSoC5/USBFS.c **** \r
-1302:.\Generated_Source\PSoC5/USBFS.c **** #endif /* USBFS_MON_VBUS */\r
-1303:.\Generated_Source\PSoC5/USBFS.c **** \r
-1304:.\Generated_Source\PSoC5/USBFS.c **** \r
-1305:.\Generated_Source\PSoC5/USBFS.c **** /*******************************************************************************\r
-1306:.\Generated_Source\PSoC5/USBFS.c **** * Function Name: USBFS_RWUEnabled\r
-1307:.\Generated_Source\PSoC5/USBFS.c **** ********************************************************************************\r
-1308:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1309:.\Generated_Source\PSoC5/USBFS.c **** * Summary:\r
-1310:.\Generated_Source\PSoC5/USBFS.c **** *  Returns TRUE if Remote Wake Up is enabled, otherwise FALSE\r
-1311:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1312:.\Generated_Source\PSoC5/USBFS.c **** * Parameters:\r
-1313:.\Generated_Source\PSoC5/USBFS.c **** *   None.\r
-1314:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1315:.\Generated_Source\PSoC5/USBFS.c **** * Return:\r
-1316:.\Generated_Source\PSoC5/USBFS.c **** *  TRUE -  Remote Wake Up Enabled\r
-1317:.\Generated_Source\PSoC5/USBFS.c **** *  FALSE - Remote Wake Up Disabled\r
-1318:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1319:.\Generated_Source\PSoC5/USBFS.c **** * Global variables:\r
-1320:.\Generated_Source\PSoC5/USBFS.c **** *  USBFS_deviceStatus - checked to determine remote status\r
-1321:.\Generated_Source\PSoC5/USBFS.c **** *\r
-1322:.\Generated_Source\PSoC5/USBFS.c **** *******************************************************************************/\r
-1323:.\Generated_Source\PSoC5/USBFS.c **** uint8 USBFS_RWUEnabled(void) \r
-1324:.\Generated_Source\PSoC5/USBFS.c **** {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 46\r
-\r
-\r
- 1157                          .loc 1 1324 0\r
- 1158                          .cfi_startproc\r
- 1159                          @ args = 0, pretend = 0, frame = 0\r
- 1160                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1161                          @ link register save eliminated.\r
- 1162                  .LVL90:\r
-1325:.\Generated_Source\PSoC5/USBFS.c ****     uint8 result = USBFS_FALSE;\r
-1326:.\Generated_Source\PSoC5/USBFS.c ****     if((USBFS_deviceStatus & USBFS_DEVICE_STATUS_REMOTE_WAKEUP) != 0u)\r
- 1163                          .loc 1 1326 0\r
- 1164 0000 024B                ldr     r3, .L86\r
- 1165 0002 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1166                  .LVL91:\r
-1327:.\Generated_Source\PSoC5/USBFS.c ****     {\r
-1328:.\Generated_Source\PSoC5/USBFS.c ****         result = USBFS_TRUE;\r
-1329:.\Generated_Source\PSoC5/USBFS.c ****     }\r
-1330:.\Generated_Source\PSoC5/USBFS.c **** \r
-1331:.\Generated_Source\PSoC5/USBFS.c ****     return(result);\r
-1332:.\Generated_Source\PSoC5/USBFS.c **** }\r
- 1167                          .loc 1 1332 0\r
- 1168 0004 C0F34000            ubfx    r0, r0, #1, #1\r
- 1169                  .LVL92:\r
- 1170 0008 7047                bx      lr\r
- 1171                  .L87:\r
- 1172 000a 00BF                .align  2\r
- 1173                  .L86:\r
- 1174 000c 00000000            .word   USBFS_deviceStatus\r
- 1175                          .cfi_endproc\r
- 1176                  .LFE18:\r
- 1177                          .size   USBFS_RWUEnabled, .-USBFS_RWUEnabled\r
- 1178                          .global USBFS_initVar\r
- 1179                          .bss\r
- 1180                          .set    .LANCHOR0,. + 0\r
- 1181                          .type   USBFS_initVar, %object\r
- 1182                          .size   USBFS_initVar, 1\r
- 1183                  USBFS_initVar:\r
- 1184 0000 00                  .space  1\r
- 1185                          .text\r
- 1186                  .Letext0:\r
- 1187                          .file 2 "./Generated_Source/PSoC5/cytypes.h"\r
- 1188                          .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 1189                          .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 1190                          .file 5 "./Generated_Source/PSoC5/CyLib.h"\r
- 1191                          .section        .debug_info,"",%progbits\r
- 1192                  .Ldebug_info0:\r
- 1193 0000 BF080000            .4byte  0x8bf\r
- 1194 0004 0200                .2byte  0x2\r
- 1195 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1196 000a 04                  .byte   0x4\r
- 1197 000b 01                  .uleb128 0x1\r
- 1198 000c F6020000            .4byte  .LASF72\r
- 1199 0010 01                  .byte   0x1\r
- 1200 0011 B3000000            .4byte  .LASF73\r
- 1201 0015 61020000            .4byte  .LASF74\r
- 1202 0019 00000000            .4byte  .Ldebug_ranges0+0\r
- 1203 001d 00000000            .4byte  0\r
- 1204 0021 00000000            .4byte  0\r
- 1205 0025 00000000            .4byte  .Ldebug_line0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 47\r
-\r
-\r
- 1206 0029 02                  .uleb128 0x2\r
- 1207 002a 01                  .byte   0x1\r
- 1208 002b 06                  .byte   0x6\r
- 1209 002c A7000000            .4byte  .LASF0\r
- 1210 0030 02                  .uleb128 0x2\r
- 1211 0031 01                  .byte   0x1\r
- 1212 0032 08                  .byte   0x8\r
- 1213 0033 58030000            .4byte  .LASF1\r
- 1214 0037 02                  .uleb128 0x2\r
- 1215 0038 02                  .byte   0x2\r
- 1216 0039 05                  .byte   0x5\r
- 1217 003a 66030000            .4byte  .LASF2\r
- 1218 003e 02                  .uleb128 0x2\r
- 1219 003f 02                  .byte   0x2\r
- 1220 0040 07                  .byte   0x7\r
- 1221 0041 1A020000            .4byte  .LASF3\r
- 1222 0045 02                  .uleb128 0x2\r
- 1223 0046 04                  .byte   0x4\r
- 1224 0047 05                  .byte   0x5\r
- 1225 0048 4C010000            .4byte  .LASF4\r
- 1226 004c 02                  .uleb128 0x2\r
- 1227 004d 04                  .byte   0x4\r
- 1228 004e 07                  .byte   0x7\r
- 1229 004f F1010000            .4byte  .LASF5\r
- 1230 0053 02                  .uleb128 0x2\r
- 1231 0054 08                  .byte   0x8\r
- 1232 0055 05                  .byte   0x5\r
- 1233 0056 99000000            .4byte  .LASF6\r
- 1234 005a 02                  .uleb128 0x2\r
- 1235 005b 08                  .byte   0x8\r
- 1236 005c 07                  .byte   0x7\r
- 1237 005d 49000000            .4byte  .LASF7\r
- 1238 0061 03                  .uleb128 0x3\r
- 1239 0062 04                  .byte   0x4\r
- 1240 0063 05                  .byte   0x5\r
- 1241 0064 696E7400            .ascii  "int\000"\r
- 1242 0068 02                  .uleb128 0x2\r
- 1243 0069 04                  .byte   0x4\r
- 1244 006a 07                  .byte   0x7\r
- 1245 006b E4010000            .4byte  .LASF8\r
- 1246 006f 04                  .uleb128 0x4\r
- 1247 0070 6C010000            .4byte  .LASF9\r
- 1248 0074 02                  .byte   0x2\r
- 1249 0075 5B                  .byte   0x5b\r
- 1250 0076 30000000            .4byte  0x30\r
- 1251 007a 04                  .uleb128 0x4\r
- 1252 007b 00000000            .4byte  .LASF10\r
- 1253 007f 02                  .byte   0x2\r
- 1254 0080 5C                  .byte   0x5c\r
- 1255 0081 3E000000            .4byte  0x3e\r
- 1256 0085 04                  .uleb128 0x4\r
- 1257 0086 98010000            .4byte  .LASF11\r
- 1258 008a 02                  .byte   0x2\r
- 1259 008b 5D                  .byte   0x5d\r
- 1260 008c 4C000000            .4byte  0x4c\r
- 1261 0090 02                  .uleb128 0x2\r
- 1262 0091 04                  .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 48\r
-\r
-\r
- 1263 0092 04                  .byte   0x4\r
- 1264 0093 CE020000            .4byte  .LASF12\r
- 1265 0097 02                  .uleb128 0x2\r
- 1266 0098 08                  .byte   0x8\r
- 1267 0099 04                  .byte   0x4\r
- 1268 009a 85010000            .4byte  .LASF13\r
- 1269 009e 02                  .uleb128 0x2\r
- 1270 009f 01                  .byte   0x1\r
- 1271 00a0 08                  .byte   0x8\r
- 1272 00a1 DE030000            .4byte  .LASF14\r
- 1273 00a5 04                  .uleb128 0x4\r
- 1274 00a6 3F030000            .4byte  .LASF15\r
- 1275 00aa 02                  .byte   0x2\r
- 1276 00ab F0                  .byte   0xf0\r
- 1277 00ac B0000000            .4byte  0xb0\r
- 1278 00b0 05                  .uleb128 0x5\r
- 1279 00b1 6F000000            .4byte  0x6f\r
- 1280 00b5 04                  .uleb128 0x4\r
- 1281 00b6 92020000            .4byte  .LASF16\r
- 1282 00ba 02                  .byte   0x2\r
- 1283 00bb F2                  .byte   0xf2\r
- 1284 00bc C0000000            .4byte  0xc0\r
- 1285 00c0 05                  .uleb128 0x5\r
- 1286 00c1 85000000            .4byte  0x85\r
- 1287 00c5 06                  .uleb128 0x6\r
- 1288 00c6 E8030000            .4byte  .LASF17\r
- 1289 00ca 02                  .byte   0x2\r
- 1290 00cb 0201                .2byte  0x102\r
- 1291 00cd D1000000            .4byte  0xd1\r
- 1292 00d1 07                  .uleb128 0x7\r
- 1293 00d2 04                  .byte   0x4\r
- 1294 00d3 D7000000            .4byte  0xd7\r
- 1295 00d7 08                  .uleb128 0x8\r
- 1296 00d8 01                  .byte   0x1\r
- 1297 00d9 02                  .uleb128 0x2\r
- 1298 00da 04                  .byte   0x4\r
- 1299 00db 07                  .byte   0x7\r
- 1300 00dc A2020000            .4byte  .LASF18\r
- 1301 00e0 09                  .uleb128 0x9\r
- 1302 00e1 0C                  .byte   0xc\r
- 1303 00e2 03                  .byte   0x3\r
- 1304 00e3 79                  .byte   0x79\r
- 1305 00e4 67010000            .4byte  0x167\r
- 1306 00e8 0A                  .uleb128 0xa\r
- 1307 00e9 AB020000            .4byte  .LASF19\r
- 1308 00ed 03                  .byte   0x3\r
- 1309 00ee 7B                  .byte   0x7b\r
- 1310 00ef 6F000000            .4byte  0x6f\r
- 1311 00f3 02                  .byte   0x2\r
- 1312 00f4 23                  .byte   0x23\r
- 1313 00f5 00                  .uleb128 0\r
- 1314 00f6 0A                  .uleb128 0xa\r
- 1315 00f7 D4020000            .4byte  .LASF20\r
- 1316 00fb 03                  .byte   0x3\r
- 1317 00fc 7C                  .byte   0x7c\r
- 1318 00fd 6F000000            .4byte  0x6f\r
- 1319 0101 02                  .byte   0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 49\r
-\r
-\r
- 1320 0102 23                  .byte   0x23\r
- 1321 0103 01                  .uleb128 0x1\r
- 1322 0104 0A                  .uleb128 0xa\r
- 1323 0105 98020000            .4byte  .LASF21\r
- 1324 0109 03                  .byte   0x3\r
- 1325 010a 7D                  .byte   0x7d\r
- 1326 010b 6F000000            .4byte  0x6f\r
- 1327 010f 02                  .byte   0x2\r
- 1328 0110 23                  .byte   0x23\r
- 1329 0111 02                  .uleb128 0x2\r
- 1330 0112 0A                  .uleb128 0xa\r
- 1331 0113 72010000            .4byte  .LASF22\r
- 1332 0117 03                  .byte   0x3\r
- 1333 0118 7E                  .byte   0x7e\r
- 1334 0119 6F000000            .4byte  0x6f\r
- 1335 011d 02                  .byte   0x2\r
- 1336 011e 23                  .byte   0x23\r
- 1337 011f 03                  .uleb128 0x3\r
- 1338 0120 0A                  .uleb128 0xa\r
- 1339 0121 74000000            .4byte  .LASF23\r
- 1340 0125 03                  .byte   0x3\r
- 1341 0126 7F                  .byte   0x7f\r
- 1342 0127 6F000000            .4byte  0x6f\r
- 1343 012b 02                  .byte   0x2\r
- 1344 012c 23                  .byte   0x23\r
- 1345 012d 04                  .uleb128 0x4\r
- 1346 012e 0A                  .uleb128 0xa\r
- 1347 012f CD010000            .4byte  .LASF24\r
- 1348 0133 03                  .byte   0x3\r
- 1349 0134 80                  .byte   0x80\r
- 1350 0135 6F000000            .4byte  0x6f\r
- 1351 0139 02                  .byte   0x2\r
- 1352 013a 23                  .byte   0x23\r
- 1353 013b 05                  .uleb128 0x5\r
- 1354 013c 0A                  .uleb128 0xa\r
- 1355 013d 0C040000            .4byte  .LASF25\r
- 1356 0141 03                  .byte   0x3\r
- 1357 0142 81                  .byte   0x81\r
- 1358 0143 7A000000            .4byte  0x7a\r
- 1359 0147 02                  .byte   0x2\r
- 1360 0148 23                  .byte   0x23\r
- 1361 0149 06                  .uleb128 0x6\r
- 1362 014a 0A                  .uleb128 0xa\r
- 1363 014b F5030000            .4byte  .LASF26\r
- 1364 014f 03                  .byte   0x3\r
- 1365 0150 82                  .byte   0x82\r
- 1366 0151 7A000000            .4byte  0x7a\r
- 1367 0155 02                  .byte   0x2\r
- 1368 0156 23                  .byte   0x23\r
- 1369 0157 08                  .uleb128 0x8\r
- 1370 0158 0A                  .uleb128 0xa\r
- 1371 0159 3C020000            .4byte  .LASF27\r
- 1372 015d 03                  .byte   0x3\r
- 1373 015e 83                  .byte   0x83\r
- 1374 015f 6F000000            .4byte  0x6f\r
- 1375 0163 02                  .byte   0x2\r
- 1376 0164 23                  .byte   0x23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 50\r
-\r
-\r
- 1377 0165 0A                  .uleb128 0xa\r
- 1378 0166 00                  .byte   0\r
- 1379 0167 04                  .uleb128 0x4\r
- 1380 0168 AE030000            .4byte  .LASF28\r
- 1381 016c 03                  .byte   0x3\r
- 1382 016d 84                  .byte   0x84\r
- 1383 016e E0000000            .4byte  0xe0\r
- 1384 0172 0B                  .uleb128 0xb\r
- 1385 0173 01                  .byte   0x1\r
- 1386 0174 C3020000            .4byte  .LASF29\r
- 1387 0178 01                  .byte   0x1\r
- 1388 0179 87                  .byte   0x87\r
- 1389 017a 01                  .byte   0x1\r
- 1390 017b 00000000            .4byte  .LFB1\r
- 1391 017f 14010000            .4byte  .LFE1\r
- 1392 0183 00000000            .4byte  .LLST0\r
- 1393 0187 01                  .byte   0x1\r
- 1394 0188 E0020000            .4byte  0x2e0\r
- 1395 018c 0C                  .uleb128 0xc\r
- 1396 018d 51040000            .4byte  .LASF33\r
- 1397 0191 01                  .byte   0x1\r
- 1398 0192 89                  .byte   0x89\r
- 1399 0193 6F000000            .4byte  0x6f\r
- 1400 0197 20000000            .4byte  .LLST1\r
- 1401 019b 0D                  .uleb128 0xd\r
- 1402 019c 06000000            .4byte  .LVL0\r
- 1403 01a0 46080000            .4byte  0x846\r
- 1404 01a4 0E                  .uleb128 0xe\r
- 1405 01a5 3A000000            .4byte  .LVL3\r
- 1406 01a9 54080000            .4byte  0x854\r
- 1407 01ad B7010000            .4byte  0x1b7\r
- 1408 01b1 0F                  .uleb128 0xf\r
- 1409 01b2 01                  .byte   0x1\r
- 1410 01b3 50                  .byte   0x50\r
- 1411 01b4 01                  .byte   0x1\r
- 1412 01b5 30                  .byte   0x30\r
- 1413 01b6 00                  .byte   0\r
- 1414 01b7 0E                  .uleb128 0xe\r
- 1415 01b8 58000000            .4byte  .LVL4\r
- 1416 01bc 54080000            .4byte  0x854\r
- 1417 01c0 CB010000            .4byte  0x1cb\r
- 1418 01c4 0F                  .uleb128 0xf\r
- 1419 01c5 01                  .byte   0x1\r
- 1420 01c6 50                  .byte   0x50\r
- 1421 01c7 02                  .byte   0x2\r
- 1422 01c8 75                  .byte   0x75\r
- 1423 01c9 00                  .sleb128 0\r
- 1424 01ca 00                  .byte   0\r
- 1425 01cb 0E                  .uleb128 0xe\r
- 1426 01cc 5E000000            .4byte  .LVL5\r
- 1427 01d0 54080000            .4byte  0x854\r
- 1428 01d4 DF010000            .4byte  0x1df\r
- 1429 01d8 0F                  .uleb128 0xf\r
- 1430 01d9 01                  .byte   0x1\r
- 1431 01da 50                  .byte   0x50\r
- 1432 01db 02                  .byte   0x2\r
- 1433 01dc 08                  .byte   0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 51\r
-\r
-\r
- 1434 01dd 28                  .byte   0x28\r
- 1435 01de 00                  .byte   0\r
- 1436 01df 0E                  .uleb128 0xe\r
- 1437 01e0 7C000000            .4byte  .LVL6\r
- 1438 01e4 54080000            .4byte  0x854\r
- 1439 01e8 F3010000            .4byte  0x1f3\r
- 1440 01ec 0F                  .uleb128 0xf\r
- 1441 01ed 01                  .byte   0x1\r
- 1442 01ee 50                  .byte   0x50\r
- 1443 01ef 02                  .byte   0x2\r
- 1444 01f0 76                  .byte   0x76\r
- 1445 01f1 00                  .sleb128 0\r
- 1446 01f2 00                  .byte   0\r
- 1447 01f3 0E                  .uleb128 0xe\r
- 1448 01f4 92000000            .4byte  .LVL7\r
- 1449 01f8 68080000            .4byte  0x868\r
- 1450 01fc 07020000            .4byte  0x207\r
- 1451 0200 0F                  .uleb128 0xf\r
- 1452 0201 01                  .byte   0x1\r
- 1453 0202 50                  .byte   0x50\r
- 1454 0203 02                  .byte   0x2\r
- 1455 0204 77                  .byte   0x77\r
- 1456 0205 00                  .sleb128 0\r
- 1457 0206 00                  .byte   0\r
- 1458 0207 0E                  .uleb128 0xe\r
- 1459 0208 9A000000            .4byte  .LVL8\r
- 1460 020c 7C080000            .4byte  0x87c\r
- 1461 0210 1A020000            .4byte  0x21a\r
- 1462 0214 0F                  .uleb128 0xf\r
- 1463 0215 01                  .byte   0x1\r
- 1464 0216 50                  .byte   0x50\r
- 1465 0217 01                  .byte   0x1\r
- 1466 0218 47                  .byte   0x47\r
- 1467 0219 00                  .byte   0\r
- 1468 021a 0E                  .uleb128 0xe\r
- 1469 021b A2000000            .4byte  .LVL9\r
- 1470 021f 99080000            .4byte  0x899\r
- 1471 0223 32020000            .4byte  0x232\r
- 1472 0227 0F                  .uleb128 0xf\r
- 1473 0228 01                  .byte   0x1\r
- 1474 0229 51                  .byte   0x51\r
- 1475 022a 01                  .byte   0x1\r
- 1476 022b 37                  .byte   0x37\r
- 1477 022c 0F                  .uleb128 0xf\r
- 1478 022d 01                  .byte   0x1\r
- 1479 022e 50                  .byte   0x50\r
- 1480 022f 01                  .byte   0x1\r
- 1481 0230 47                  .byte   0x47\r
- 1482 0231 00                  .byte   0\r
- 1483 0232 0E                  .uleb128 0xe\r
- 1484 0233 AA000000            .4byte  .LVL10\r
- 1485 0237 7C080000            .4byte  0x87c\r
- 1486 023b 45020000            .4byte  0x245\r
- 1487 023f 0F                  .uleb128 0xf\r
- 1488 0240 01                  .byte   0x1\r
- 1489 0241 50                  .byte   0x50\r
- 1490 0242 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 52\r
-\r
-\r
- 1491 0243 45                  .byte   0x45\r
- 1492 0244 00                  .byte   0\r
- 1493 0245 0E                  .uleb128 0xe\r
- 1494 0246 B2000000            .4byte  .LVL11\r
- 1495 024a 99080000            .4byte  0x899\r
- 1496 024e 5D020000            .4byte  0x25d\r
- 1497 0252 0F                  .uleb128 0xf\r
- 1498 0253 01                  .byte   0x1\r
- 1499 0254 51                  .byte   0x51\r
- 1500 0255 01                  .byte   0x1\r
- 1501 0256 37                  .byte   0x37\r
- 1502 0257 0F                  .uleb128 0xf\r
- 1503 0258 01                  .byte   0x1\r
- 1504 0259 50                  .byte   0x50\r
- 1505 025a 01                  .byte   0x1\r
- 1506 025b 45                  .byte   0x45\r
- 1507 025c 00                  .byte   0\r
- 1508 025d 0E                  .uleb128 0xe\r
- 1509 025e BA000000            .4byte  .LVL12\r
- 1510 0262 7C080000            .4byte  0x87c\r
- 1511 0266 70020000            .4byte  0x270\r
- 1512 026a 0F                  .uleb128 0xf\r
- 1513 026b 01                  .byte   0x1\r
- 1514 026c 50                  .byte   0x50\r
- 1515 026d 01                  .byte   0x1\r
- 1516 026e 48                  .byte   0x48\r
- 1517 026f 00                  .byte   0\r
- 1518 0270 0E                  .uleb128 0xe\r
- 1519 0271 C2000000            .4byte  .LVL13\r
- 1520 0275 99080000            .4byte  0x899\r
- 1521 0279 88020000            .4byte  0x288\r
- 1522 027d 0F                  .uleb128 0xf\r
- 1523 027e 01                  .byte   0x1\r
- 1524 027f 51                  .byte   0x51\r
- 1525 0280 01                  .byte   0x1\r
- 1526 0281 37                  .byte   0x37\r
- 1527 0282 0F                  .uleb128 0xf\r
- 1528 0283 01                  .byte   0x1\r
- 1529 0284 50                  .byte   0x50\r
- 1530 0285 01                  .byte   0x1\r
- 1531 0286 48                  .byte   0x48\r
- 1532 0287 00                  .byte   0\r
- 1533 0288 0E                  .uleb128 0xe\r
- 1534 0289 CA000000            .4byte  .LVL14\r
- 1535 028d 7C080000            .4byte  0x87c\r
- 1536 0291 9C020000            .4byte  0x29c\r
- 1537 0295 0F                  .uleb128 0xf\r
- 1538 0296 01                  .byte   0x1\r
- 1539 0297 50                  .byte   0x50\r
- 1540 0298 02                  .byte   0x2\r
- 1541 0299 74                  .byte   0x74\r
- 1542 029a 00                  .sleb128 0\r
- 1543 029b 00                  .byte   0\r
- 1544 029c 0E                  .uleb128 0xe\r
- 1545 029d D2000000            .4byte  .LVL15\r
- 1546 02a1 99080000            .4byte  0x899\r
- 1547 02a5 B5020000            .4byte  0x2b5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 53\r
-\r
-\r
- 1548 02a9 0F                  .uleb128 0xf\r
- 1549 02aa 01                  .byte   0x1\r
- 1550 02ab 51                  .byte   0x51\r
- 1551 02ac 01                  .byte   0x1\r
- 1552 02ad 37                  .byte   0x37\r
- 1553 02ae 0F                  .uleb128 0xf\r
- 1554 02af 01                  .byte   0x1\r
- 1555 02b0 50                  .byte   0x50\r
- 1556 02b1 02                  .byte   0x2\r
- 1557 02b2 74                  .byte   0x74\r
- 1558 02b3 00                  .sleb128 0\r
- 1559 02b4 00                  .byte   0\r
- 1560 02b5 0E                  .uleb128 0xe\r
- 1561 02b6 DA000000            .4byte  .LVL16\r
- 1562 02ba 7C080000            .4byte  0x87c\r
- 1563 02be C9020000            .4byte  0x2c9\r
- 1564 02c2 0F                  .uleb128 0xf\r
- 1565 02c3 01                  .byte   0x1\r
- 1566 02c4 50                  .byte   0x50\r
- 1567 02c5 02                  .byte   0x2\r
- 1568 02c6 75                  .byte   0x75\r
- 1569 02c7 00                  .sleb128 0\r
- 1570 02c8 00                  .byte   0\r
- 1571 02c9 10                  .uleb128 0x10\r
- 1572 02ca E6000000            .4byte  .LVL17\r
- 1573 02ce 01                  .byte   0x1\r
- 1574 02cf 99080000            .4byte  0x899\r
- 1575 02d3 0F                  .uleb128 0xf\r
- 1576 02d4 01                  .byte   0x1\r
- 1577 02d5 51                  .byte   0x51\r
- 1578 02d6 01                  .byte   0x1\r
- 1579 02d7 37                  .byte   0x37\r
- 1580 02d8 0F                  .uleb128 0xf\r
- 1581 02d9 01                  .byte   0x1\r
- 1582 02da 50                  .byte   0x50\r
- 1583 02db 02                  .byte   0x2\r
- 1584 02dc 75                  .byte   0x75\r
- 1585 02dd 00                  .sleb128 0\r
- 1586 02de 00                  .byte   0\r
- 1587 02df 00                  .byte   0\r
- 1588 02e0 11                  .uleb128 0x11\r
- 1589 02e1 01                  .byte   0x1\r
- 1590 02e2 9F010000            .4byte  .LASF30\r
- 1591 02e6 01                  .byte   0x1\r
- 1592 02e7 4201                .2byte  0x142\r
- 1593 02e9 01                  .byte   0x1\r
- 1594 02ea 00000000            .4byte  .LFB2\r
- 1595 02ee 98000000            .4byte  .LFE2\r
- 1596 02f2 3E000000            .4byte  .LLST2\r
- 1597 02f6 01                  .byte   0x1\r
- 1598 02f7 39030000            .4byte  0x339\r
- 1599 02fb 12                  .uleb128 0x12\r
- 1600 02fc 92000000            .4byte  .LASF31\r
- 1601 0300 01                  .byte   0x1\r
- 1602 0301 4201                .2byte  0x142\r
- 1603 0303 6F000000            .4byte  0x6f\r
- 1604 0307 5E000000            .4byte  .LLST3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 54\r
-\r
-\r
- 1605 030b 12                  .uleb128 0x12\r
- 1606 030c E3030000            .4byte  .LASF32\r
- 1607 0310 01                  .byte   0x1\r
- 1608 0311 4201                .2byte  0x142\r
- 1609 0313 6F000000            .4byte  0x6f\r
- 1610 0317 8B000000            .4byte  .LLST4\r
- 1611 031b 13                  .uleb128 0x13\r
- 1612 031c 6900                .ascii  "i\000"\r
- 1613 031e 01                  .byte   0x1\r
- 1614 031f 4901                .2byte  0x149\r
- 1615 0321 6F000000            .4byte  0x6f\r
- 1616 0325 AC000000            .4byte  .LLST5\r
- 1617 0329 14                  .uleb128 0x14\r
- 1618 032a 5A000000            .4byte  .LVL23\r
- 1619 032e B2080000            .4byte  0x8b2\r
- 1620 0332 0F                  .uleb128 0xf\r
- 1621 0333 01                  .byte   0x1\r
- 1622 0334 50                  .byte   0x50\r
- 1623 0335 01                  .byte   0x1\r
- 1624 0336 31                  .byte   0x31\r
- 1625 0337 00                  .byte   0\r
- 1626 0338 00                  .byte   0\r
- 1627 0339 0B                  .uleb128 0xb\r
- 1628 033a 01                  .byte   0x1\r
- 1629 033b 00040000            .4byte  .LASF34\r
- 1630 033f 01                  .byte   0x1\r
- 1631 0340 6A                  .byte   0x6a\r
- 1632 0341 01                  .byte   0x1\r
- 1633 0342 00000000            .4byte  .LFB0\r
- 1634 0346 24000000            .4byte  .LFE0\r
- 1635 034a CC000000            .4byte  .LLST6\r
- 1636 034e 01                  .byte   0x1\r
- 1637 034f 92030000            .4byte  0x392\r
- 1638 0353 15                  .uleb128 0x15\r
- 1639 0354 92000000            .4byte  .LASF31\r
- 1640 0358 01                  .byte   0x1\r
- 1641 0359 6A                  .byte   0x6a\r
- 1642 035a 6F000000            .4byte  0x6f\r
- 1643 035e EC000000            .4byte  .LLST7\r
- 1644 0362 15                  .uleb128 0x15\r
- 1645 0363 E3030000            .4byte  .LASF32\r
- 1646 0367 01                  .byte   0x1\r
- 1647 0368 6A                  .byte   0x6a\r
- 1648 0369 6F000000            .4byte  0x6f\r
- 1649 036d 0D010000            .4byte  .LLST8\r
- 1650 0371 0D                  .uleb128 0xd\r
- 1651 0372 10000000            .4byte  .LVL25\r
- 1652 0376 72010000            .4byte  0x172\r
- 1653 037a 10                  .uleb128 0x10\r
- 1654 037b 20000000            .4byte  .LVL26\r
- 1655 037f 01                  .byte   0x1\r
- 1656 0380 E0020000            .4byte  0x2e0\r
- 1657 0384 0F                  .uleb128 0xf\r
- 1658 0385 01                  .byte   0x1\r
- 1659 0386 51                  .byte   0x51\r
- 1660 0387 02                  .byte   0x2\r
- 1661 0388 75                  .byte   0x75\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 55\r
-\r
-\r
- 1662 0389 00                  .sleb128 0\r
- 1663 038a 0F                  .uleb128 0xf\r
- 1664 038b 01                  .byte   0x1\r
- 1665 038c 50                  .byte   0x50\r
- 1666 038d 02                  .byte   0x2\r
- 1667 038e 76                  .byte   0x76\r
- 1668 038f 00                  .sleb128 0\r
- 1669 0390 00                  .byte   0\r
- 1670 0391 00                  .byte   0\r
- 1671 0392 16                  .uleb128 0x16\r
- 1672 0393 01                  .byte   0x1\r
- 1673 0394 3B040000            .4byte  .LASF35\r
- 1674 0398 01                  .byte   0x1\r
- 1675 0399 D301                .2byte  0x1d3\r
- 1676 039b 01                  .byte   0x1\r
- 1677 039c 00000000            .4byte  .LFB3\r
- 1678 03a0 58000000            .4byte  .LFE3\r
- 1679 03a4 02                  .byte   0x2\r
- 1680 03a5 7D                  .byte   0x7d\r
- 1681 03a6 00                  .sleb128 0\r
- 1682 03a7 01                  .byte   0x1\r
- 1683 03a8 BB030000            .4byte  0x3bb\r
- 1684 03ac 13                  .uleb128 0x13\r
- 1685 03ad 6900                .ascii  "i\000"\r
- 1686 03af 01                  .byte   0x1\r
- 1687 03b0 D901                .2byte  0x1d9\r
- 1688 03b2 6F000000            .4byte  0x6f\r
- 1689 03b6 2E010000            .4byte  .LLST9\r
- 1690 03ba 00                  .byte   0\r
- 1691 03bb 17                  .uleb128 0x17\r
- 1692 03bc 01                  .byte   0x1\r
- 1693 03bd 41010000            .4byte  .LASF75\r
- 1694 03c1 01                  .byte   0x1\r
- 1695 03c2 1502                .2byte  0x215\r
- 1696 03c4 01                  .byte   0x1\r
- 1697 03c5 00000000            .4byte  .LFB4\r
- 1698 03c9 7C000000            .4byte  .LFE4\r
- 1699 03cd 02                  .byte   0x2\r
- 1700 03ce 7D                  .byte   0x7d\r
- 1701 03cf 00                  .sleb128 0\r
- 1702 03d0 01                  .byte   0x1\r
- 1703 03d1 18                  .uleb128 0x18\r
- 1704 03d2 01                  .byte   0x1\r
- 1705 03d3 62040000            .4byte  .LASF36\r
- 1706 03d7 01                  .byte   0x1\r
- 1707 03d8 5C02                .2byte  0x25c\r
- 1708 03da 01                  .byte   0x1\r
- 1709 03db 6F000000            .4byte  0x6f\r
- 1710 03df 00000000            .4byte  .LFB5\r
- 1711 03e3 14000000            .4byte  .LFE5\r
- 1712 03e7 02                  .byte   0x2\r
- 1713 03e8 7D                  .byte   0x7d\r
- 1714 03e9 00                  .sleb128 0\r
- 1715 03ea 01                  .byte   0x1\r
- 1716 03eb FE030000            .4byte  0x3fe\r
- 1717 03ef 13                  .uleb128 0x13\r
- 1718 03f0 7200                .ascii  "r\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 56\r
-\r
-\r
- 1719 03f2 01                  .byte   0x1\r
- 1720 03f3 5E02                .2byte  0x25e\r
- 1721 03f5 6F000000            .4byte  0x6f\r
- 1722 03f9 4E010000            .4byte  .LLST10\r
- 1723 03fd 00                  .byte   0\r
- 1724 03fe 19                  .uleb128 0x19\r
- 1725 03ff 01                  .byte   0x1\r
- 1726 0400 55010000            .4byte  .LASF76\r
- 1727 0404 01                  .byte   0x1\r
- 1728 0405 7502                .2byte  0x275\r
- 1729 0407 01                  .byte   0x1\r
- 1730 0408 6F000000            .4byte  0x6f\r
- 1731 040c 00000000            .4byte  .LFB6\r
- 1732 0410 0C000000            .4byte  .LFE6\r
- 1733 0414 02                  .byte   0x2\r
- 1734 0415 7D                  .byte   0x7d\r
- 1735 0416 00                  .sleb128 0\r
- 1736 0417 01                  .byte   0x1\r
- 1737 0418 18                  .uleb128 0x18\r
- 1738 0419 01                  .byte   0x1\r
- 1739 041a D4000000            .4byte  .LASF37\r
- 1740 041e 01                  .byte   0x1\r
- 1741 041f 8F02                .2byte  0x28f\r
- 1742 0421 01                  .byte   0x1\r
- 1743 0422 6F000000            .4byte  0x6f\r
- 1744 0426 00000000            .4byte  .LFB7\r
- 1745 042a 14000000            .4byte  .LFE7\r
- 1746 042e 02                  .byte   0x2\r
- 1747 042f 7D                  .byte   0x7d\r
- 1748 0430 00                  .sleb128 0\r
- 1749 0431 01                  .byte   0x1\r
- 1750 0432 47040000            .4byte  0x447\r
- 1751 0436 13                  .uleb128 0x13\r
- 1752 0437 72657300            .ascii  "res\000"\r
- 1753 043b 01                  .byte   0x1\r
- 1754 043c 9102                .2byte  0x291\r
- 1755 043e 6F000000            .4byte  0x6f\r
- 1756 0442 61010000            .4byte  .LLST11\r
- 1757 0446 00                  .byte   0\r
- 1758 0447 18                  .uleb128 0x18\r
- 1759 0448 01                  .byte   0x1\r
- 1760 0449 A2040000            .4byte  .LASF38\r
- 1761 044d 01                  .byte   0x1\r
- 1762 044e AB02                .2byte  0x2ab\r
- 1763 0450 01                  .byte   0x1\r
- 1764 0451 6F000000            .4byte  0x6f\r
- 1765 0455 00000000            .4byte  .LFB8\r
- 1766 0459 0C000000            .4byte  .LFE8\r
- 1767 045d 02                  .byte   0x2\r
- 1768 045e 7D                  .byte   0x7d\r
- 1769 045f 00                  .sleb128 0\r
- 1770 0460 01                  .byte   0x1\r
- 1771 0461 76040000            .4byte  0x476\r
- 1772 0465 12                  .uleb128 0x12\r
- 1773 0466 79000000            .4byte  .LASF39\r
- 1774 046a 01                  .byte   0x1\r
- 1775 046b AB02                .2byte  0x2ab\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 57\r
-\r
-\r
- 1776 046d 6F000000            .4byte  0x6f\r
- 1777 0471 80010000            .4byte  .LLST12\r
- 1778 0475 00                  .byte   0\r
- 1779 0476 18                  .uleb128 0x18\r
- 1780 0477 01                  .byte   0x1\r
- 1781 0478 2A040000            .4byte  .LASF40\r
- 1782 047c 01                  .byte   0x1\r
- 1783 047d C002                .2byte  0x2c0\r
- 1784 047f 01                  .byte   0x1\r
- 1785 0480 6F000000            .4byte  0x6f\r
- 1786 0484 00000000            .4byte  .LFB9\r
- 1787 0488 10000000            .4byte  .LFE9\r
- 1788 048c 02                  .byte   0x2\r
- 1789 048d 7D                  .byte   0x7d\r
- 1790 048e 00                  .sleb128 0\r
- 1791 048f 01                  .byte   0x1\r
- 1792 0490 A5040000            .4byte  0x4a5\r
- 1793 0494 12                  .uleb128 0x12\r
- 1794 0495 89000000            .4byte  .LASF41\r
- 1795 0499 01                  .byte   0x1\r
- 1796 049a C002                .2byte  0x2c0\r
- 1797 049c 6F000000            .4byte  0x6f\r
- 1798 04a0 A1010000            .4byte  .LLST13\r
- 1799 04a4 00                  .byte   0\r
- 1800 04a5 18                  .uleb128 0x18\r
- 1801 04a6 01                  .byte   0x1\r
- 1802 04a7 BC040000            .4byte  .LASF42\r
- 1803 04ab 01                  .byte   0x1\r
- 1804 04ac D902                .2byte  0x2d9\r
- 1805 04ae 01                  .byte   0x1\r
- 1806 04af 7A000000            .4byte  0x7a\r
- 1807 04b3 00000000            .4byte  .LFB10\r
- 1808 04b7 2C000000            .4byte  .LFE10\r
- 1809 04bb 02                  .byte   0x2\r
- 1810 04bc 7D                  .byte   0x7d\r
- 1811 04bd 00                  .sleb128 0\r
- 1812 04be 01                  .byte   0x1\r
- 1813 04bf F3040000            .4byte  0x4f3\r
- 1814 04c3 12                  .uleb128 0x12\r
- 1815 04c4 89000000            .4byte  .LASF41\r
- 1816 04c8 01                  .byte   0x1\r
- 1817 04c9 D902                .2byte  0x2d9\r
- 1818 04cb 6F000000            .4byte  0x6f\r
- 1819 04cf C2010000            .4byte  .LLST14\r
- 1820 04d3 13                  .uleb128 0x13\r
- 1821 04d4 726900              .ascii  "ri\000"\r
- 1822 04d7 01                  .byte   0x1\r
- 1823 04d8 DB02                .2byte  0x2db\r
- 1824 04da 6F000000            .4byte  0x6f\r
- 1825 04de E3010000            .4byte  .LLST15\r
- 1826 04e2 1A                  .uleb128 0x1a\r
- 1827 04e3 CD040000            .4byte  .LASF43\r
- 1828 04e7 01                  .byte   0x1\r
- 1829 04e8 DC02                .2byte  0x2dc\r
- 1830 04ea 7A000000            .4byte  0x7a\r
- 1831 04ee 09020000            .4byte  .LLST16\r
- 1832 04f2 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 58\r
-\r
-\r
- 1833 04f3 11                  .uleb128 0x11\r
- 1834 04f4 01                  .byte   0x1\r
- 1835 04f5 93040000            .4byte  .LASF44\r
- 1836 04f9 01                  .byte   0x1\r
- 1837 04fa 9003                .2byte  0x390\r
- 1838 04fc 01                  .byte   0x1\r
- 1839 04fd 00000000            .4byte  .LFB11\r
- 1840 0501 7C000000            .4byte  .LFE11\r
- 1841 0505 5C020000            .4byte  .LLST17\r
- 1842 0509 01                  .byte   0x1\r
- 1843 050a 66050000            .4byte  0x566\r
- 1844 050e 12                  .uleb128 0x12\r
- 1845 050f 89000000            .4byte  .LASF41\r
- 1846 0513 01                  .byte   0x1\r
- 1847 0514 9003                .2byte  0x390\r
- 1848 0516 6F000000            .4byte  0x6f\r
- 1849 051a 7C020000            .4byte  .LLST18\r
- 1850 051e 12                  .uleb128 0x12\r
- 1851 051f B3010000            .4byte  .LASF45\r
- 1852 0523 01                  .byte   0x1\r
- 1853 0524 9003                .2byte  0x390\r
- 1854 0526 66050000            .4byte  0x566\r
- 1855 052a A8020000            .4byte  .LLST19\r
- 1856 052e 12                  .uleb128 0x12\r
- 1857 052f D7030000            .4byte  .LASF46\r
- 1858 0533 01                  .byte   0x1\r
- 1859 0534 9003                .2byte  0x390\r
- 1860 0536 7A000000            .4byte  0x7a\r
- 1861 053a D4020000            .4byte  .LLST20\r
- 1862 053e 13                  .uleb128 0x13\r
- 1863 053f 726900              .ascii  "ri\000"\r
- 1864 0542 01                  .byte   0x1\r
- 1865 0543 9303                .2byte  0x393\r
- 1866 0545 6F000000            .4byte  0x6f\r
- 1867 0549 0B030000            .4byte  .LLST21\r
- 1868 054d 13                  .uleb128 0x13\r
- 1869 054e 7000                .ascii  "p\000"\r
- 1870 0550 01                  .byte   0x1\r
- 1871 0551 9403                .2byte  0x394\r
- 1872 0553 71050000            .4byte  0x571\r
- 1873 0557 40030000            .4byte  .LLST22\r
- 1874 055b 1B                  .uleb128 0x1b\r
- 1875 055c 6900                .ascii  "i\000"\r
- 1876 055e 01                  .byte   0x1\r
- 1877 055f 9603                .2byte  0x396\r
- 1878 0561 7A000000            .4byte  0x7a\r
- 1879 0565 00                  .byte   0\r
- 1880 0566 07                  .uleb128 0x7\r
- 1881 0567 04                  .byte   0x4\r
- 1882 0568 6C050000            .4byte  0x56c\r
- 1883 056c 1C                  .uleb128 0x1c\r
- 1884 056d 6F000000            .4byte  0x6f\r
- 1885 0571 07                  .uleb128 0x7\r
- 1886 0572 04                  .byte   0x4\r
- 1887 0573 A5000000            .4byte  0xa5\r
- 1888 0577 16                  .uleb128 0x16\r
- 1889 0578 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 59\r
-\r
-\r
- 1890 0579 70030000            .4byte  .LASF47\r
- 1891 057d 01                  .byte   0x1\r
- 1892 057e 7D04                .2byte  0x47d\r
- 1893 0580 01                  .byte   0x1\r
- 1894 0581 00000000            .4byte  .LFB13\r
- 1895 0585 28000000            .4byte  .LFE13\r
- 1896 0589 02                  .byte   0x2\r
- 1897 058a 7D                  .byte   0x7d\r
- 1898 058b 00                  .sleb128 0\r
- 1899 058c 01                  .byte   0x1\r
- 1900 058d B1050000            .4byte  0x5b1\r
- 1901 0591 12                  .uleb128 0x12\r
- 1902 0592 89000000            .4byte  .LASF41\r
- 1903 0596 01                  .byte   0x1\r
- 1904 0597 7D04                .2byte  0x47d\r
- 1905 0599 6F000000            .4byte  0x6f\r
- 1906 059d 53030000            .4byte  .LLST23\r
- 1907 05a1 13                  .uleb128 0x13\r
- 1908 05a2 726900              .ascii  "ri\000"\r
- 1909 05a5 01                  .byte   0x1\r
- 1910 05a6 7F04                .2byte  0x47f\r
- 1911 05a8 6F000000            .4byte  0x6f\r
- 1912 05ac 74030000            .4byte  .LLST24\r
- 1913 05b0 00                  .byte   0\r
- 1914 05b1 1D                  .uleb128 0x1d\r
- 1915 05b2 01                  .byte   0x1\r
- 1916 05b3 D4010000            .4byte  .LASF48\r
- 1917 05b7 01                  .byte   0x1\r
- 1918 05b8 1304                .2byte  0x413\r
- 1919 05ba 01                  .byte   0x1\r
- 1920 05bb 7A000000            .4byte  0x7a\r
- 1921 05bf 00000000            .4byte  .LFB12\r
- 1922 05c3 4C000000            .4byte  .LFE12\r
- 1923 05c7 8B030000            .4byte  .LLST25\r
- 1924 05cb 01                  .byte   0x1\r
- 1925 05cc 60060000            .4byte  0x660\r
- 1926 05d0 12                  .uleb128 0x12\r
- 1927 05d1 89000000            .4byte  .LASF41\r
- 1928 05d5 01                  .byte   0x1\r
- 1929 05d6 1304                .2byte  0x413\r
- 1930 05d8 6F000000            .4byte  0x6f\r
- 1931 05dc AB030000            .4byte  .LLST26\r
- 1932 05e0 12                  .uleb128 0x12\r
- 1933 05e1 B3010000            .4byte  .LASF45\r
- 1934 05e5 01                  .byte   0x1\r
- 1935 05e6 1304                .2byte  0x413\r
- 1936 05e8 60060000            .4byte  0x660\r
- 1937 05ec E5030000            .4byte  .LLST27\r
- 1938 05f0 12                  .uleb128 0x12\r
- 1939 05f1 D7030000            .4byte  .LASF46\r
- 1940 05f5 01                  .byte   0x1\r
- 1941 05f6 1304                .2byte  0x413\r
- 1942 05f8 7A000000            .4byte  0x7a\r
- 1943 05fc 03040000            .4byte  .LLST28\r
- 1944 0600 13                  .uleb128 0x13\r
- 1945 0601 726900              .ascii  "ri\000"\r
- 1946 0604 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 60\r
-\r
-\r
- 1947 0605 1604                .2byte  0x416\r
- 1948 0607 6F000000            .4byte  0x6f\r
- 1949 060b 50040000            .4byte  .LLST29\r
- 1950 060f 13                  .uleb128 0x13\r
- 1951 0610 7000                .ascii  "p\000"\r
- 1952 0612 01                  .byte   0x1\r
- 1953 0613 1704                .2byte  0x417\r
- 1954 0615 71050000            .4byte  0x571\r
- 1955 0619 76040000            .4byte  .LLST30\r
- 1956 061d 13                  .uleb128 0x13\r
- 1957 061e 6900                .ascii  "i\000"\r
- 1958 0620 01                  .byte   0x1\r
- 1959 0621 1904                .2byte  0x419\r
- 1960 0623 7A000000            .4byte  0x7a\r
- 1961 0627 89040000            .4byte  .LLST31\r
- 1962 062b 1A                  .uleb128 0x1a\r
- 1963 062c 76040000            .4byte  .LASF49\r
- 1964 0630 01                  .byte   0x1\r
- 1965 0631 1C04                .2byte  0x41c\r
- 1966 0633 7A000000            .4byte  0x7a\r
- 1967 0637 9D040000            .4byte  .LLST32\r
- 1968 063b 0E                  .uleb128 0xe\r
- 1969 063c 1E000000            .4byte  .LVL67\r
- 1970 0640 A5040000            .4byte  0x4a5\r
- 1971 0644 4F060000            .4byte  0x64f\r
- 1972 0648 0F                  .uleb128 0xf\r
- 1973 0649 01                  .byte   0x1\r
- 1974 064a 50                  .byte   0x50\r
- 1975 064b 02                  .byte   0x2\r
- 1976 064c 77                  .byte   0x77\r
- 1977 064d 00                  .sleb128 0\r
- 1978 064e 00                  .byte   0\r
- 1979 064f 14                  .uleb128 0x14\r
- 1980 0650 3C000000            .4byte  .LVL71\r
- 1981 0654 77050000            .4byte  0x577\r
- 1982 0658 0F                  .uleb128 0xf\r
- 1983 0659 01                  .byte   0x1\r
- 1984 065a 50                  .byte   0x50\r
- 1985 065b 02                  .byte   0x2\r
- 1986 065c 77                  .byte   0x77\r
- 1987 065d 00                  .sleb128 0\r
- 1988 065e 00                  .byte   0\r
- 1989 065f 00                  .byte   0\r
- 1990 0660 07                  .uleb128 0x7\r
- 1991 0661 04                  .byte   0x4\r
- 1992 0662 6F000000            .4byte  0x6f\r
- 1993 0666 16                  .uleb128 0x16\r
- 1994 0667 01                  .byte   0x1\r
- 1995 0668 80040000            .4byte  .LASF50\r
- 1996 066c 01                  .byte   0x1\r
- 1997 066d 9B04                .2byte  0x49b\r
- 1998 066f 01                  .byte   0x1\r
- 1999 0670 00000000            .4byte  .LFB14\r
- 2000 0674 18000000            .4byte  .LFE14\r
- 2001 0678 02                  .byte   0x2\r
- 2002 0679 7D                  .byte   0x7d\r
- 2003 067a 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 61\r
-\r
-\r
- 2004 067b 01                  .byte   0x1\r
- 2005 067c A0060000            .4byte  0x6a0\r
- 2006 0680 12                  .uleb128 0x12\r
- 2007 0681 89000000            .4byte  .LASF41\r
- 2008 0685 01                  .byte   0x1\r
- 2009 0686 9B04                .2byte  0x49b\r
- 2010 0688 6F000000            .4byte  0x6f\r
- 2011 068c B0040000            .4byte  .LLST33\r
- 2012 0690 13                  .uleb128 0x13\r
- 2013 0691 726900              .ascii  "ri\000"\r
- 2014 0694 01                  .byte   0x1\r
- 2015 0695 9D04                .2byte  0x49d\r
- 2016 0697 6F000000            .4byte  0x6f\r
- 2017 069b D1040000            .4byte  .LLST34\r
- 2018 069f 00                  .byte   0\r
- 2019 06a0 16                  .uleb128 0x16\r
- 2020 06a1 01                  .byte   0x1\r
- 2021 06a2 3D000000            .4byte  .LASF51\r
- 2022 06a6 01                  .byte   0x1\r
- 2023 06a7 BA04                .2byte  0x4ba\r
- 2024 06a9 01                  .byte   0x1\r
- 2025 06aa 00000000            .4byte  .LFB15\r
- 2026 06ae 0C000000            .4byte  .LFE15\r
- 2027 06b2 02                  .byte   0x2\r
- 2028 06b3 7D                  .byte   0x7d\r
- 2029 06b4 00                  .sleb128 0\r
- 2030 06b5 01                  .byte   0x1\r
- 2031 06b6 C9060000            .4byte  0x6c9\r
- 2032 06ba 1E                  .uleb128 0x1e\r
- 2033 06bb D0030000            .4byte  .LASF52\r
- 2034 06bf 01                  .byte   0x1\r
- 2035 06c0 BA04                .2byte  0x4ba\r
- 2036 06c2 6F000000            .4byte  0x6f\r
- 2037 06c6 01                  .byte   0x1\r
- 2038 06c7 50                  .byte   0x50\r
- 2039 06c8 00                  .byte   0\r
- 2040 06c9 18                  .uleb128 0x18\r
- 2041 06ca 01                  .byte   0x1\r
- 2042 06cb 60000000            .4byte  .LASF53\r
- 2043 06cf 01                  .byte   0x1\r
- 2044 06d0 CF04                .2byte  0x4cf\r
- 2045 06d2 01                  .byte   0x1\r
- 2046 06d3 6F000000            .4byte  0x6f\r
- 2047 06d7 00000000            .4byte  .LFB16\r
- 2048 06db 20000000            .4byte  .LFE16\r
- 2049 06df 02                  .byte   0x2\r
- 2050 06e0 7D                  .byte   0x7d\r
- 2051 06e1 00                  .sleb128 0\r
- 2052 06e2 01                  .byte   0x1\r
- 2053 06e3 16070000            .4byte  0x716\r
- 2054 06e7 12                  .uleb128 0x12\r
- 2055 06e8 89000000            .4byte  .LASF41\r
- 2056 06ec 01                  .byte   0x1\r
- 2057 06ed CF04                .2byte  0x4cf\r
- 2058 06ef 6F000000            .4byte  0x6f\r
- 2059 06f3 E8040000            .4byte  .LLST35\r
- 2060 06f7 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 62\r
-\r
-\r
- 2061 06f8 726900              .ascii  "ri\000"\r
- 2062 06fb 01                  .byte   0x1\r
- 2063 06fc D104                .2byte  0x4d1\r
- 2064 06fe 6F000000            .4byte  0x6f\r
- 2065 0702 09050000            .4byte  .LLST36\r
- 2066 0706 13                  .uleb128 0x13\r
- 2067 0707 637200              .ascii  "cr\000"\r
- 2068 070a 01                  .byte   0x1\r
- 2069 070b D204                .2byte  0x4d2\r
- 2070 070d 6F000000            .4byte  0x6f\r
- 2071 0711 20050000            .4byte  .LLST37\r
- 2072 0715 00                  .byte   0\r
- 2073 0716 16                  .uleb128 0x16\r
- 2074 0717 01                  .byte   0x1\r
- 2075 0718 2C010000            .4byte  .LASF54\r
- 2076 071c 01                  .byte   0x1\r
- 2077 071d F404                .2byte  0x4f4\r
- 2078 071f 01                  .byte   0x1\r
- 2079 0720 00000000            .4byte  .LFB17\r
- 2080 0724 18000000            .4byte  .LFE17\r
- 2081 0728 02                  .byte   0x2\r
- 2082 0729 7D                  .byte   0x7d\r
- 2083 072a 00                  .sleb128 0\r
- 2084 072b 01                  .byte   0x1\r
- 2085 072c 41070000            .4byte  0x741\r
- 2086 0730 12                  .uleb128 0x12\r
- 2087 0731 8C010000            .4byte  .LASF55\r
- 2088 0735 01                  .byte   0x1\r
- 2089 0736 F404                .2byte  0x4f4\r
- 2090 0738 6F000000            .4byte  0x6f\r
- 2091 073c 56050000            .4byte  .LLST38\r
- 2092 0740 00                  .byte   0\r
- 2093 0741 18                  .uleb128 0x18\r
- 2094 0742 01                  .byte   0x1\r
- 2095 0743 1B010000            .4byte  .LASF56\r
- 2096 0747 01                  .byte   0x1\r
- 2097 0748 2B05                .2byte  0x52b\r
- 2098 074a 01                  .byte   0x1\r
- 2099 074b 6F000000            .4byte  0x6f\r
- 2100 074f 00000000            .4byte  .LFB18\r
- 2101 0753 10000000            .4byte  .LFE18\r
- 2102 0757 02                  .byte   0x2\r
- 2103 0758 7D                  .byte   0x7d\r
- 2104 0759 00                  .sleb128 0\r
- 2105 075a 01                  .byte   0x1\r
- 2106 075b 70070000            .4byte  0x770\r
- 2107 075f 1A                  .uleb128 0x1a\r
- 2108 0760 CD040000            .4byte  .LASF43\r
- 2109 0764 01                  .byte   0x1\r
- 2110 0765 2D05                .2byte  0x52d\r
- 2111 0767 6F000000            .4byte  0x6f\r
- 2112 076b 90050000            .4byte  .LLST39\r
- 2113 076f 00                  .byte   0\r
- 2114 0770 1F                  .uleb128 0x1f\r
- 2115 0771 1D000000            .4byte  .LASF57\r
- 2116 0775 01                  .byte   0x1\r
- 2117 0776 36                  .byte   0x36\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 63\r
-\r
-\r
- 2118 0777 6F000000            .4byte  0x6f\r
- 2119 077b 01                  .byte   0x1\r
- 2120 077c 05                  .byte   0x5\r
- 2121 077d 03                  .byte   0x3\r
- 2122 077e 00000000            .4byte  USBFS_initVar\r
- 2123 0782 20                  .uleb128 0x20\r
- 2124 0783 C3030000            .4byte  .LASF58\r
- 2125 0787 03                  .byte   0x3\r
- 2126 0788 1802                .2byte  0x218\r
- 2127 078a B0000000            .4byte  0xb0\r
- 2128 078e 01                  .byte   0x1\r
- 2129 078f 01                  .byte   0x1\r
- 2130 0790 20                  .uleb128 0x20\r
- 2131 0791 44030000            .4byte  .LASF59\r
- 2132 0795 03                  .byte   0x3\r
- 2133 0796 1902                .2byte  0x219\r
- 2134 0798 B0000000            .4byte  0xb0\r
- 2135 079c 01                  .byte   0x1\r
- 2136 079d 01                  .byte   0x1\r
- 2137 079e 20                  .uleb128 0x20\r
- 2138 079f B9010000            .4byte  .LASF60\r
- 2139 07a3 03                  .byte   0x3\r
- 2140 07a4 1A02                .2byte  0x21a\r
- 2141 07a6 B0000000            .4byte  0xb0\r
- 2142 07aa 01                  .byte   0x1\r
- 2143 07ab 01                  .byte   0x1\r
- 2144 07ac 20                  .uleb128 0x20\r
- 2145 07ad 46020000            .4byte  .LASF61\r
- 2146 07b1 03                  .byte   0x3\r
- 2147 07b2 1B02                .2byte  0x21b\r
- 2148 07b4 B0000000            .4byte  0xb0\r
- 2149 07b8 01                  .byte   0x1\r
- 2150 07b9 01                  .byte   0x1\r
- 2151 07ba 20                  .uleb128 0x20\r
- 2152 07bb 17040000            .4byte  .LASF62\r
- 2153 07bf 03                  .byte   0x3\r
- 2154 07c0 1C02                .2byte  0x21c\r
- 2155 07c2 B0000000            .4byte  0xb0\r
- 2156 07c6 01                  .byte   0x1\r
- 2157 07c7 01                  .byte   0x1\r
- 2158 07c8 21                  .uleb128 0x21\r
- 2159 07c9 6F000000            .4byte  0x6f\r
- 2160 07cd D8070000            .4byte  0x7d8\r
- 2161 07d1 22                  .uleb128 0x22\r
- 2162 07d2 D9000000            .4byte  0xd9\r
- 2163 07d6 00                  .byte   0\r
- 2164 07d7 00                  .byte   0\r
- 2165 07d8 20                  .uleb128 0x20\r
- 2166 07d9 2B000000            .4byte  .LASF63\r
- 2167 07dd 03                  .byte   0x3\r
- 2168 07de 2002                .2byte  0x220\r
- 2169 07e0 E6070000            .4byte  0x7e6\r
- 2170 07e4 01                  .byte   0x1\r
- 2171 07e5 01                  .byte   0x1\r
- 2172 07e6 05                  .uleb128 0x5\r
- 2173 07e7 C8070000            .4byte  0x7c8\r
- 2174 07eb 23                  .uleb128 0x23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 64\r
-\r
-\r
- 2175 07ec 05010000            .4byte  .LASF64\r
- 2176 07f0 04                  .byte   0x4\r
- 2177 07f1 38                  .byte   0x38\r
- 2178 07f2 B0000000            .4byte  0xb0\r
- 2179 07f6 01                  .byte   0x1\r
- 2180 07f7 01                  .byte   0x1\r
- 2181 07f8 23                  .uleb128 0x23\r
- 2182 07f9 97030000            .4byte  .LASF65\r
- 2183 07fd 04                  .byte   0x4\r
- 2184 07fe 39                  .byte   0x39\r
- 2185 07ff 05080000            .4byte  0x805\r
- 2186 0803 01                  .byte   0x1\r
- 2187 0804 01                  .byte   0x1\r
- 2188 0805 05                  .uleb128 0x5\r
- 2189 0806 C8070000            .4byte  0x7c8\r
- 2190 080a 23                  .uleb128 0x23\r
- 2191 080b F1000000            .4byte  .LASF66\r
- 2192 080f 04                  .byte   0x4\r
- 2193 0810 3B                  .byte   0x3b\r
- 2194 0811 B0000000            .4byte  0xb0\r
- 2195 0815 01                  .byte   0x1\r
- 2196 0816 01                  .byte   0x1\r
- 2197 0817 21                  .uleb128 0x21\r
- 2198 0818 67010000            .4byte  0x167\r
- 2199 081c 27080000            .4byte  0x827\r
- 2200 0820 22                  .uleb128 0x22\r
- 2201 0821 D9000000            .4byte  0xd9\r
- 2202 0825 08                  .byte   0x8\r
- 2203 0826 00                  .byte   0\r
- 2204 0827 23                  .uleb128 0x23\r
- 2205 0828 DF020000            .4byte  .LASF67\r
- 2206 082c 04                  .byte   0x4\r
- 2207 082d 3F                  .byte   0x3f\r
- 2208 082e 34080000            .4byte  0x834\r
- 2209 0832 01                  .byte   0x1\r
- 2210 0833 01                  .byte   0x1\r
- 2211 0834 05                  .uleb128 0x5\r
- 2212 0835 17080000            .4byte  0x817\r
- 2213 0839 23                  .uleb128 0x23\r
- 2214 083a 82030000            .4byte  .LASF68\r
- 2215 083e 04                  .byte   0x4\r
- 2216 083f 48                  .byte   0x48\r
- 2217 0840 B0000000            .4byte  0xb0\r
- 2218 0844 01                  .byte   0x1\r
- 2219 0845 01                  .byte   0x1\r
- 2220 0846 24                  .uleb128 0x24\r
- 2221 0847 01                  .byte   0x1\r
- 2222 0848 03020000            .4byte  .LASF77\r
- 2223 084c 05                  .byte   0x5\r
- 2224 084d 7E                  .byte   0x7e\r
- 2225 084e 01                  .byte   0x1\r
- 2226 084f 6F000000            .4byte  0x6f\r
- 2227 0853 01                  .byte   0x1\r
- 2228 0854 25                  .uleb128 0x25\r
- 2229 0855 01                  .byte   0x1\r
- 2230 0856 7B010000            .4byte  .LASF69\r
- 2231 085a 05                  .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 65\r
-\r
-\r
- 2232 085b 78                  .byte   0x78\r
- 2233 085c 01                  .byte   0x1\r
- 2234 085d 01                  .byte   0x1\r
- 2235 085e 68080000            .4byte  0x868\r
- 2236 0862 26                  .uleb128 0x26\r
- 2237 0863 7A000000            .4byte  0x7a\r
- 2238 0867 00                  .byte   0\r
- 2239 0868 25                  .uleb128 0x25\r
- 2240 0869 01                  .byte   0x1\r
- 2241 086a 07000000            .4byte  .LASF70\r
- 2242 086e 05                  .byte   0x5\r
- 2243 086f 7F                  .byte   0x7f\r
- 2244 0870 01                  .byte   0x1\r
- 2245 0871 01                  .byte   0x1\r
- 2246 0872 7C080000            .4byte  0x87c\r
- 2247 0876 26                  .uleb128 0x26\r
- 2248 0877 6F000000            .4byte  0x6f\r
- 2249 087b 00                  .byte   0\r
- 2250 087c 27                  .uleb128 0x27\r
- 2251 087d 01                  .byte   0x1\r
- 2252 087e 2D020000            .4byte  .LASF78\r
- 2253 0882 05                  .byte   0x5\r
- 2254 0883 89                  .byte   0x89\r
- 2255 0884 01                  .byte   0x1\r
- 2256 0885 C5000000            .4byte  0xc5\r
- 2257 0889 01                  .byte   0x1\r
- 2258 088a 99080000            .4byte  0x899\r
- 2259 088e 26                  .uleb128 0x26\r
- 2260 088f 6F000000            .4byte  0x6f\r
- 2261 0893 26                  .uleb128 0x26\r
- 2262 0894 C5000000            .4byte  0xc5\r
- 2263 0898 00                  .byte   0\r
- 2264 0899 25                  .uleb128 0x25\r
- 2265 089a 01                  .byte   0x1\r
- 2266 089b B2020000            .4byte  .LASF71\r
- 2267 089f 05                  .byte   0x5\r
- 2268 08a0 8C                  .byte   0x8c\r
- 2269 08a1 01                  .byte   0x1\r
- 2270 08a2 01                  .byte   0x1\r
- 2271 08a3 B2080000            .4byte  0x8b2\r
- 2272 08a7 26                  .uleb128 0x26\r
- 2273 08a8 6F000000            .4byte  0x6f\r
- 2274 08ac 26                  .uleb128 0x26\r
- 2275 08ad 6F000000            .4byte  0x6f\r
- 2276 08b1 00                  .byte   0\r
- 2277 08b2 28                  .uleb128 0x28\r
- 2278 08b3 01                  .byte   0x1\r
- 2279 08b4 E8020000            .4byte  .LASF79\r
- 2280 08b8 05                  .byte   0x5\r
- 2281 08b9 7A                  .byte   0x7a\r
- 2282 08ba 01                  .byte   0x1\r
- 2283 08bb 01                  .byte   0x1\r
- 2284 08bc 26                  .uleb128 0x26\r
- 2285 08bd 85000000            .4byte  0x85\r
- 2286 08c1 00                  .byte   0\r
- 2287 08c2 00                  .byte   0\r
- 2288                          .section        .debug_abbrev,"",%progbits\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 66\r
-\r
-\r
- 2289                  .Ldebug_abbrev0:\r
- 2290 0000 01                  .uleb128 0x1\r
- 2291 0001 11                  .uleb128 0x11\r
- 2292 0002 01                  .byte   0x1\r
- 2293 0003 25                  .uleb128 0x25\r
- 2294 0004 0E                  .uleb128 0xe\r
- 2295 0005 13                  .uleb128 0x13\r
- 2296 0006 0B                  .uleb128 0xb\r
- 2297 0007 03                  .uleb128 0x3\r
- 2298 0008 0E                  .uleb128 0xe\r
- 2299 0009 1B                  .uleb128 0x1b\r
- 2300 000a 0E                  .uleb128 0xe\r
- 2301 000b 55                  .uleb128 0x55\r
- 2302 000c 06                  .uleb128 0x6\r
- 2303 000d 11                  .uleb128 0x11\r
- 2304 000e 01                  .uleb128 0x1\r
- 2305 000f 52                  .uleb128 0x52\r
- 2306 0010 01                  .uleb128 0x1\r
- 2307 0011 10                  .uleb128 0x10\r
- 2308 0012 06                  .uleb128 0x6\r
- 2309 0013 00                  .byte   0\r
- 2310 0014 00                  .byte   0\r
- 2311 0015 02                  .uleb128 0x2\r
- 2312 0016 24                  .uleb128 0x24\r
- 2313 0017 00                  .byte   0\r
- 2314 0018 0B                  .uleb128 0xb\r
- 2315 0019 0B                  .uleb128 0xb\r
- 2316 001a 3E                  .uleb128 0x3e\r
- 2317 001b 0B                  .uleb128 0xb\r
- 2318 001c 03                  .uleb128 0x3\r
- 2319 001d 0E                  .uleb128 0xe\r
- 2320 001e 00                  .byte   0\r
- 2321 001f 00                  .byte   0\r
- 2322 0020 03                  .uleb128 0x3\r
- 2323 0021 24                  .uleb128 0x24\r
- 2324 0022 00                  .byte   0\r
- 2325 0023 0B                  .uleb128 0xb\r
- 2326 0024 0B                  .uleb128 0xb\r
- 2327 0025 3E                  .uleb128 0x3e\r
- 2328 0026 0B                  .uleb128 0xb\r
- 2329 0027 03                  .uleb128 0x3\r
- 2330 0028 08                  .uleb128 0x8\r
- 2331 0029 00                  .byte   0\r
- 2332 002a 00                  .byte   0\r
- 2333 002b 04                  .uleb128 0x4\r
- 2334 002c 16                  .uleb128 0x16\r
- 2335 002d 00                  .byte   0\r
- 2336 002e 03                  .uleb128 0x3\r
- 2337 002f 0E                  .uleb128 0xe\r
- 2338 0030 3A                  .uleb128 0x3a\r
- 2339 0031 0B                  .uleb128 0xb\r
- 2340 0032 3B                  .uleb128 0x3b\r
- 2341 0033 0B                  .uleb128 0xb\r
- 2342 0034 49                  .uleb128 0x49\r
- 2343 0035 13                  .uleb128 0x13\r
- 2344 0036 00                  .byte   0\r
- 2345 0037 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 67\r
-\r
-\r
- 2346 0038 05                  .uleb128 0x5\r
- 2347 0039 35                  .uleb128 0x35\r
- 2348 003a 00                  .byte   0\r
- 2349 003b 49                  .uleb128 0x49\r
- 2350 003c 13                  .uleb128 0x13\r
- 2351 003d 00                  .byte   0\r
- 2352 003e 00                  .byte   0\r
- 2353 003f 06                  .uleb128 0x6\r
- 2354 0040 16                  .uleb128 0x16\r
- 2355 0041 00                  .byte   0\r
- 2356 0042 03                  .uleb128 0x3\r
- 2357 0043 0E                  .uleb128 0xe\r
- 2358 0044 3A                  .uleb128 0x3a\r
- 2359 0045 0B                  .uleb128 0xb\r
- 2360 0046 3B                  .uleb128 0x3b\r
- 2361 0047 05                  .uleb128 0x5\r
- 2362 0048 49                  .uleb128 0x49\r
- 2363 0049 13                  .uleb128 0x13\r
- 2364 004a 00                  .byte   0\r
- 2365 004b 00                  .byte   0\r
- 2366 004c 07                  .uleb128 0x7\r
- 2367 004d 0F                  .uleb128 0xf\r
- 2368 004e 00                  .byte   0\r
- 2369 004f 0B                  .uleb128 0xb\r
- 2370 0050 0B                  .uleb128 0xb\r
- 2371 0051 49                  .uleb128 0x49\r
- 2372 0052 13                  .uleb128 0x13\r
- 2373 0053 00                  .byte   0\r
- 2374 0054 00                  .byte   0\r
- 2375 0055 08                  .uleb128 0x8\r
- 2376 0056 15                  .uleb128 0x15\r
- 2377 0057 00                  .byte   0\r
- 2378 0058 27                  .uleb128 0x27\r
- 2379 0059 0C                  .uleb128 0xc\r
- 2380 005a 00                  .byte   0\r
- 2381 005b 00                  .byte   0\r
- 2382 005c 09                  .uleb128 0x9\r
- 2383 005d 13                  .uleb128 0x13\r
- 2384 005e 01                  .byte   0x1\r
- 2385 005f 0B                  .uleb128 0xb\r
- 2386 0060 0B                  .uleb128 0xb\r
- 2387 0061 3A                  .uleb128 0x3a\r
- 2388 0062 0B                  .uleb128 0xb\r
- 2389 0063 3B                  .uleb128 0x3b\r
- 2390 0064 0B                  .uleb128 0xb\r
- 2391 0065 01                  .uleb128 0x1\r
- 2392 0066 13                  .uleb128 0x13\r
- 2393 0067 00                  .byte   0\r
- 2394 0068 00                  .byte   0\r
- 2395 0069 0A                  .uleb128 0xa\r
- 2396 006a 0D                  .uleb128 0xd\r
- 2397 006b 00                  .byte   0\r
- 2398 006c 03                  .uleb128 0x3\r
- 2399 006d 0E                  .uleb128 0xe\r
- 2400 006e 3A                  .uleb128 0x3a\r
- 2401 006f 0B                  .uleb128 0xb\r
- 2402 0070 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 68\r
-\r
-\r
- 2403 0071 0B                  .uleb128 0xb\r
- 2404 0072 49                  .uleb128 0x49\r
- 2405 0073 13                  .uleb128 0x13\r
- 2406 0074 38                  .uleb128 0x38\r
- 2407 0075 0A                  .uleb128 0xa\r
- 2408 0076 00                  .byte   0\r
- 2409 0077 00                  .byte   0\r
- 2410 0078 0B                  .uleb128 0xb\r
- 2411 0079 2E                  .uleb128 0x2e\r
- 2412 007a 01                  .byte   0x1\r
- 2413 007b 3F                  .uleb128 0x3f\r
- 2414 007c 0C                  .uleb128 0xc\r
- 2415 007d 03                  .uleb128 0x3\r
- 2416 007e 0E                  .uleb128 0xe\r
- 2417 007f 3A                  .uleb128 0x3a\r
- 2418 0080 0B                  .uleb128 0xb\r
- 2419 0081 3B                  .uleb128 0x3b\r
- 2420 0082 0B                  .uleb128 0xb\r
- 2421 0083 27                  .uleb128 0x27\r
- 2422 0084 0C                  .uleb128 0xc\r
- 2423 0085 11                  .uleb128 0x11\r
- 2424 0086 01                  .uleb128 0x1\r
- 2425 0087 12                  .uleb128 0x12\r
- 2426 0088 01                  .uleb128 0x1\r
- 2427 0089 40                  .uleb128 0x40\r
- 2428 008a 06                  .uleb128 0x6\r
- 2429 008b 9742                .uleb128 0x2117\r
- 2430 008d 0C                  .uleb128 0xc\r
- 2431 008e 01                  .uleb128 0x1\r
- 2432 008f 13                  .uleb128 0x13\r
- 2433 0090 00                  .byte   0\r
- 2434 0091 00                  .byte   0\r
- 2435 0092 0C                  .uleb128 0xc\r
- 2436 0093 34                  .uleb128 0x34\r
- 2437 0094 00                  .byte   0\r
- 2438 0095 03                  .uleb128 0x3\r
- 2439 0096 0E                  .uleb128 0xe\r
- 2440 0097 3A                  .uleb128 0x3a\r
- 2441 0098 0B                  .uleb128 0xb\r
- 2442 0099 3B                  .uleb128 0x3b\r
- 2443 009a 0B                  .uleb128 0xb\r
- 2444 009b 49                  .uleb128 0x49\r
- 2445 009c 13                  .uleb128 0x13\r
- 2446 009d 02                  .uleb128 0x2\r
- 2447 009e 06                  .uleb128 0x6\r
- 2448 009f 00                  .byte   0\r
- 2449 00a0 00                  .byte   0\r
- 2450 00a1 0D                  .uleb128 0xd\r
- 2451 00a2 898201              .uleb128 0x4109\r
- 2452 00a5 00                  .byte   0\r
- 2453 00a6 11                  .uleb128 0x11\r
- 2454 00a7 01                  .uleb128 0x1\r
- 2455 00a8 31                  .uleb128 0x31\r
- 2456 00a9 13                  .uleb128 0x13\r
- 2457 00aa 00                  .byte   0\r
- 2458 00ab 00                  .byte   0\r
- 2459 00ac 0E                  .uleb128 0xe\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 69\r
-\r
-\r
- 2460 00ad 898201              .uleb128 0x4109\r
- 2461 00b0 01                  .byte   0x1\r
- 2462 00b1 11                  .uleb128 0x11\r
- 2463 00b2 01                  .uleb128 0x1\r
- 2464 00b3 31                  .uleb128 0x31\r
- 2465 00b4 13                  .uleb128 0x13\r
- 2466 00b5 01                  .uleb128 0x1\r
- 2467 00b6 13                  .uleb128 0x13\r
- 2468 00b7 00                  .byte   0\r
- 2469 00b8 00                  .byte   0\r
- 2470 00b9 0F                  .uleb128 0xf\r
- 2471 00ba 8A8201              .uleb128 0x410a\r
- 2472 00bd 00                  .byte   0\r
- 2473 00be 02                  .uleb128 0x2\r
- 2474 00bf 0A                  .uleb128 0xa\r
- 2475 00c0 9142                .uleb128 0x2111\r
- 2476 00c2 0A                  .uleb128 0xa\r
- 2477 00c3 00                  .byte   0\r
- 2478 00c4 00                  .byte   0\r
- 2479 00c5 10                  .uleb128 0x10\r
- 2480 00c6 898201              .uleb128 0x4109\r
- 2481 00c9 01                  .byte   0x1\r
- 2482 00ca 11                  .uleb128 0x11\r
- 2483 00cb 01                  .uleb128 0x1\r
- 2484 00cc 9542                .uleb128 0x2115\r
- 2485 00ce 0C                  .uleb128 0xc\r
- 2486 00cf 31                  .uleb128 0x31\r
- 2487 00d0 13                  .uleb128 0x13\r
- 2488 00d1 00                  .byte   0\r
- 2489 00d2 00                  .byte   0\r
- 2490 00d3 11                  .uleb128 0x11\r
- 2491 00d4 2E                  .uleb128 0x2e\r
- 2492 00d5 01                  .byte   0x1\r
- 2493 00d6 3F                  .uleb128 0x3f\r
- 2494 00d7 0C                  .uleb128 0xc\r
- 2495 00d8 03                  .uleb128 0x3\r
- 2496 00d9 0E                  .uleb128 0xe\r
- 2497 00da 3A                  .uleb128 0x3a\r
- 2498 00db 0B                  .uleb128 0xb\r
- 2499 00dc 3B                  .uleb128 0x3b\r
- 2500 00dd 05                  .uleb128 0x5\r
- 2501 00de 27                  .uleb128 0x27\r
- 2502 00df 0C                  .uleb128 0xc\r
- 2503 00e0 11                  .uleb128 0x11\r
- 2504 00e1 01                  .uleb128 0x1\r
- 2505 00e2 12                  .uleb128 0x12\r
- 2506 00e3 01                  .uleb128 0x1\r
- 2507 00e4 40                  .uleb128 0x40\r
- 2508 00e5 06                  .uleb128 0x6\r
- 2509 00e6 9742                .uleb128 0x2117\r
- 2510 00e8 0C                  .uleb128 0xc\r
- 2511 00e9 01                  .uleb128 0x1\r
- 2512 00ea 13                  .uleb128 0x13\r
- 2513 00eb 00                  .byte   0\r
- 2514 00ec 00                  .byte   0\r
- 2515 00ed 12                  .uleb128 0x12\r
- 2516 00ee 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 70\r
-\r
-\r
- 2517 00ef 00                  .byte   0\r
- 2518 00f0 03                  .uleb128 0x3\r
- 2519 00f1 0E                  .uleb128 0xe\r
- 2520 00f2 3A                  .uleb128 0x3a\r
- 2521 00f3 0B                  .uleb128 0xb\r
- 2522 00f4 3B                  .uleb128 0x3b\r
- 2523 00f5 05                  .uleb128 0x5\r
- 2524 00f6 49                  .uleb128 0x49\r
- 2525 00f7 13                  .uleb128 0x13\r
- 2526 00f8 02                  .uleb128 0x2\r
- 2527 00f9 06                  .uleb128 0x6\r
- 2528 00fa 00                  .byte   0\r
- 2529 00fb 00                  .byte   0\r
- 2530 00fc 13                  .uleb128 0x13\r
- 2531 00fd 34                  .uleb128 0x34\r
- 2532 00fe 00                  .byte   0\r
- 2533 00ff 03                  .uleb128 0x3\r
- 2534 0100 08                  .uleb128 0x8\r
- 2535 0101 3A                  .uleb128 0x3a\r
- 2536 0102 0B                  .uleb128 0xb\r
- 2537 0103 3B                  .uleb128 0x3b\r
- 2538 0104 05                  .uleb128 0x5\r
- 2539 0105 49                  .uleb128 0x49\r
- 2540 0106 13                  .uleb128 0x13\r
- 2541 0107 02                  .uleb128 0x2\r
- 2542 0108 06                  .uleb128 0x6\r
- 2543 0109 00                  .byte   0\r
- 2544 010a 00                  .byte   0\r
- 2545 010b 14                  .uleb128 0x14\r
- 2546 010c 898201              .uleb128 0x4109\r
- 2547 010f 01                  .byte   0x1\r
- 2548 0110 11                  .uleb128 0x11\r
- 2549 0111 01                  .uleb128 0x1\r
- 2550 0112 31                  .uleb128 0x31\r
- 2551 0113 13                  .uleb128 0x13\r
- 2552 0114 00                  .byte   0\r
- 2553 0115 00                  .byte   0\r
- 2554 0116 15                  .uleb128 0x15\r
- 2555 0117 05                  .uleb128 0x5\r
- 2556 0118 00                  .byte   0\r
- 2557 0119 03                  .uleb128 0x3\r
- 2558 011a 0E                  .uleb128 0xe\r
- 2559 011b 3A                  .uleb128 0x3a\r
- 2560 011c 0B                  .uleb128 0xb\r
- 2561 011d 3B                  .uleb128 0x3b\r
- 2562 011e 0B                  .uleb128 0xb\r
- 2563 011f 49                  .uleb128 0x49\r
- 2564 0120 13                  .uleb128 0x13\r
- 2565 0121 02                  .uleb128 0x2\r
- 2566 0122 06                  .uleb128 0x6\r
- 2567 0123 00                  .byte   0\r
- 2568 0124 00                  .byte   0\r
- 2569 0125 16                  .uleb128 0x16\r
- 2570 0126 2E                  .uleb128 0x2e\r
- 2571 0127 01                  .byte   0x1\r
- 2572 0128 3F                  .uleb128 0x3f\r
- 2573 0129 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 71\r
-\r
-\r
- 2574 012a 03                  .uleb128 0x3\r
- 2575 012b 0E                  .uleb128 0xe\r
- 2576 012c 3A                  .uleb128 0x3a\r
- 2577 012d 0B                  .uleb128 0xb\r
- 2578 012e 3B                  .uleb128 0x3b\r
- 2579 012f 05                  .uleb128 0x5\r
- 2580 0130 27                  .uleb128 0x27\r
- 2581 0131 0C                  .uleb128 0xc\r
- 2582 0132 11                  .uleb128 0x11\r
- 2583 0133 01                  .uleb128 0x1\r
- 2584 0134 12                  .uleb128 0x12\r
- 2585 0135 01                  .uleb128 0x1\r
- 2586 0136 40                  .uleb128 0x40\r
- 2587 0137 0A                  .uleb128 0xa\r
- 2588 0138 9742                .uleb128 0x2117\r
- 2589 013a 0C                  .uleb128 0xc\r
- 2590 013b 01                  .uleb128 0x1\r
- 2591 013c 13                  .uleb128 0x13\r
- 2592 013d 00                  .byte   0\r
- 2593 013e 00                  .byte   0\r
- 2594 013f 17                  .uleb128 0x17\r
- 2595 0140 2E                  .uleb128 0x2e\r
- 2596 0141 00                  .byte   0\r
- 2597 0142 3F                  .uleb128 0x3f\r
- 2598 0143 0C                  .uleb128 0xc\r
- 2599 0144 03                  .uleb128 0x3\r
- 2600 0145 0E                  .uleb128 0xe\r
- 2601 0146 3A                  .uleb128 0x3a\r
- 2602 0147 0B                  .uleb128 0xb\r
- 2603 0148 3B                  .uleb128 0x3b\r
- 2604 0149 05                  .uleb128 0x5\r
- 2605 014a 27                  .uleb128 0x27\r
- 2606 014b 0C                  .uleb128 0xc\r
- 2607 014c 11                  .uleb128 0x11\r
- 2608 014d 01                  .uleb128 0x1\r
- 2609 014e 12                  .uleb128 0x12\r
- 2610 014f 01                  .uleb128 0x1\r
- 2611 0150 40                  .uleb128 0x40\r
- 2612 0151 0A                  .uleb128 0xa\r
- 2613 0152 9742                .uleb128 0x2117\r
- 2614 0154 0C                  .uleb128 0xc\r
- 2615 0155 00                  .byte   0\r
- 2616 0156 00                  .byte   0\r
- 2617 0157 18                  .uleb128 0x18\r
- 2618 0158 2E                  .uleb128 0x2e\r
- 2619 0159 01                  .byte   0x1\r
- 2620 015a 3F                  .uleb128 0x3f\r
- 2621 015b 0C                  .uleb128 0xc\r
- 2622 015c 03                  .uleb128 0x3\r
- 2623 015d 0E                  .uleb128 0xe\r
- 2624 015e 3A                  .uleb128 0x3a\r
- 2625 015f 0B                  .uleb128 0xb\r
- 2626 0160 3B                  .uleb128 0x3b\r
- 2627 0161 05                  .uleb128 0x5\r
- 2628 0162 27                  .uleb128 0x27\r
- 2629 0163 0C                  .uleb128 0xc\r
- 2630 0164 49                  .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 72\r
-\r
-\r
- 2631 0165 13                  .uleb128 0x13\r
- 2632 0166 11                  .uleb128 0x11\r
- 2633 0167 01                  .uleb128 0x1\r
- 2634 0168 12                  .uleb128 0x12\r
- 2635 0169 01                  .uleb128 0x1\r
- 2636 016a 40                  .uleb128 0x40\r
- 2637 016b 0A                  .uleb128 0xa\r
- 2638 016c 9742                .uleb128 0x2117\r
- 2639 016e 0C                  .uleb128 0xc\r
- 2640 016f 01                  .uleb128 0x1\r
- 2641 0170 13                  .uleb128 0x13\r
- 2642 0171 00                  .byte   0\r
- 2643 0172 00                  .byte   0\r
- 2644 0173 19                  .uleb128 0x19\r
- 2645 0174 2E                  .uleb128 0x2e\r
- 2646 0175 00                  .byte   0\r
- 2647 0176 3F                  .uleb128 0x3f\r
- 2648 0177 0C                  .uleb128 0xc\r
- 2649 0178 03                  .uleb128 0x3\r
- 2650 0179 0E                  .uleb128 0xe\r
- 2651 017a 3A                  .uleb128 0x3a\r
- 2652 017b 0B                  .uleb128 0xb\r
- 2653 017c 3B                  .uleb128 0x3b\r
- 2654 017d 05                  .uleb128 0x5\r
- 2655 017e 27                  .uleb128 0x27\r
- 2656 017f 0C                  .uleb128 0xc\r
- 2657 0180 49                  .uleb128 0x49\r
- 2658 0181 13                  .uleb128 0x13\r
- 2659 0182 11                  .uleb128 0x11\r
- 2660 0183 01                  .uleb128 0x1\r
- 2661 0184 12                  .uleb128 0x12\r
- 2662 0185 01                  .uleb128 0x1\r
- 2663 0186 40                  .uleb128 0x40\r
- 2664 0187 0A                  .uleb128 0xa\r
- 2665 0188 9742                .uleb128 0x2117\r
- 2666 018a 0C                  .uleb128 0xc\r
- 2667 018b 00                  .byte   0\r
- 2668 018c 00                  .byte   0\r
- 2669 018d 1A                  .uleb128 0x1a\r
- 2670 018e 34                  .uleb128 0x34\r
- 2671 018f 00                  .byte   0\r
- 2672 0190 03                  .uleb128 0x3\r
- 2673 0191 0E                  .uleb128 0xe\r
- 2674 0192 3A                  .uleb128 0x3a\r
- 2675 0193 0B                  .uleb128 0xb\r
- 2676 0194 3B                  .uleb128 0x3b\r
- 2677 0195 05                  .uleb128 0x5\r
- 2678 0196 49                  .uleb128 0x49\r
- 2679 0197 13                  .uleb128 0x13\r
- 2680 0198 02                  .uleb128 0x2\r
- 2681 0199 06                  .uleb128 0x6\r
- 2682 019a 00                  .byte   0\r
- 2683 019b 00                  .byte   0\r
- 2684 019c 1B                  .uleb128 0x1b\r
- 2685 019d 34                  .uleb128 0x34\r
- 2686 019e 00                  .byte   0\r
- 2687 019f 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 73\r
-\r
-\r
- 2688 01a0 08                  .uleb128 0x8\r
- 2689 01a1 3A                  .uleb128 0x3a\r
- 2690 01a2 0B                  .uleb128 0xb\r
- 2691 01a3 3B                  .uleb128 0x3b\r
- 2692 01a4 05                  .uleb128 0x5\r
- 2693 01a5 49                  .uleb128 0x49\r
- 2694 01a6 13                  .uleb128 0x13\r
- 2695 01a7 00                  .byte   0\r
- 2696 01a8 00                  .byte   0\r
- 2697 01a9 1C                  .uleb128 0x1c\r
- 2698 01aa 26                  .uleb128 0x26\r
- 2699 01ab 00                  .byte   0\r
- 2700 01ac 49                  .uleb128 0x49\r
- 2701 01ad 13                  .uleb128 0x13\r
- 2702 01ae 00                  .byte   0\r
- 2703 01af 00                  .byte   0\r
- 2704 01b0 1D                  .uleb128 0x1d\r
- 2705 01b1 2E                  .uleb128 0x2e\r
- 2706 01b2 01                  .byte   0x1\r
- 2707 01b3 3F                  .uleb128 0x3f\r
- 2708 01b4 0C                  .uleb128 0xc\r
- 2709 01b5 03                  .uleb128 0x3\r
- 2710 01b6 0E                  .uleb128 0xe\r
- 2711 01b7 3A                  .uleb128 0x3a\r
- 2712 01b8 0B                  .uleb128 0xb\r
- 2713 01b9 3B                  .uleb128 0x3b\r
- 2714 01ba 05                  .uleb128 0x5\r
- 2715 01bb 27                  .uleb128 0x27\r
- 2716 01bc 0C                  .uleb128 0xc\r
- 2717 01bd 49                  .uleb128 0x49\r
- 2718 01be 13                  .uleb128 0x13\r
- 2719 01bf 11                  .uleb128 0x11\r
- 2720 01c0 01                  .uleb128 0x1\r
- 2721 01c1 12                  .uleb128 0x12\r
- 2722 01c2 01                  .uleb128 0x1\r
- 2723 01c3 40                  .uleb128 0x40\r
- 2724 01c4 06                  .uleb128 0x6\r
- 2725 01c5 9742                .uleb128 0x2117\r
- 2726 01c7 0C                  .uleb128 0xc\r
- 2727 01c8 01                  .uleb128 0x1\r
- 2728 01c9 13                  .uleb128 0x13\r
- 2729 01ca 00                  .byte   0\r
- 2730 01cb 00                  .byte   0\r
- 2731 01cc 1E                  .uleb128 0x1e\r
- 2732 01cd 05                  .uleb128 0x5\r
- 2733 01ce 00                  .byte   0\r
- 2734 01cf 03                  .uleb128 0x3\r
- 2735 01d0 0E                  .uleb128 0xe\r
- 2736 01d1 3A                  .uleb128 0x3a\r
- 2737 01d2 0B                  .uleb128 0xb\r
- 2738 01d3 3B                  .uleb128 0x3b\r
- 2739 01d4 05                  .uleb128 0x5\r
- 2740 01d5 49                  .uleb128 0x49\r
- 2741 01d6 13                  .uleb128 0x13\r
- 2742 01d7 02                  .uleb128 0x2\r
- 2743 01d8 0A                  .uleb128 0xa\r
- 2744 01d9 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 74\r
-\r
-\r
- 2745 01da 00                  .byte   0\r
- 2746 01db 1F                  .uleb128 0x1f\r
- 2747 01dc 34                  .uleb128 0x34\r
- 2748 01dd 00                  .byte   0\r
- 2749 01de 03                  .uleb128 0x3\r
- 2750 01df 0E                  .uleb128 0xe\r
- 2751 01e0 3A                  .uleb128 0x3a\r
- 2752 01e1 0B                  .uleb128 0xb\r
- 2753 01e2 3B                  .uleb128 0x3b\r
- 2754 01e3 0B                  .uleb128 0xb\r
- 2755 01e4 49                  .uleb128 0x49\r
- 2756 01e5 13                  .uleb128 0x13\r
- 2757 01e6 3F                  .uleb128 0x3f\r
- 2758 01e7 0C                  .uleb128 0xc\r
- 2759 01e8 02                  .uleb128 0x2\r
- 2760 01e9 0A                  .uleb128 0xa\r
- 2761 01ea 00                  .byte   0\r
- 2762 01eb 00                  .byte   0\r
- 2763 01ec 20                  .uleb128 0x20\r
- 2764 01ed 34                  .uleb128 0x34\r
- 2765 01ee 00                  .byte   0\r
- 2766 01ef 03                  .uleb128 0x3\r
- 2767 01f0 0E                  .uleb128 0xe\r
- 2768 01f1 3A                  .uleb128 0x3a\r
- 2769 01f2 0B                  .uleb128 0xb\r
- 2770 01f3 3B                  .uleb128 0x3b\r
- 2771 01f4 05                  .uleb128 0x5\r
- 2772 01f5 49                  .uleb128 0x49\r
- 2773 01f6 13                  .uleb128 0x13\r
- 2774 01f7 3F                  .uleb128 0x3f\r
- 2775 01f8 0C                  .uleb128 0xc\r
- 2776 01f9 3C                  .uleb128 0x3c\r
- 2777 01fa 0C                  .uleb128 0xc\r
- 2778 01fb 00                  .byte   0\r
- 2779 01fc 00                  .byte   0\r
- 2780 01fd 21                  .uleb128 0x21\r
- 2781 01fe 01                  .uleb128 0x1\r
- 2782 01ff 01                  .byte   0x1\r
- 2783 0200 49                  .uleb128 0x49\r
- 2784 0201 13                  .uleb128 0x13\r
- 2785 0202 01                  .uleb128 0x1\r
- 2786 0203 13                  .uleb128 0x13\r
- 2787 0204 00                  .byte   0\r
- 2788 0205 00                  .byte   0\r
- 2789 0206 22                  .uleb128 0x22\r
- 2790 0207 21                  .uleb128 0x21\r
- 2791 0208 00                  .byte   0\r
- 2792 0209 49                  .uleb128 0x49\r
- 2793 020a 13                  .uleb128 0x13\r
- 2794 020b 2F                  .uleb128 0x2f\r
- 2795 020c 0B                  .uleb128 0xb\r
- 2796 020d 00                  .byte   0\r
- 2797 020e 00                  .byte   0\r
- 2798 020f 23                  .uleb128 0x23\r
- 2799 0210 34                  .uleb128 0x34\r
- 2800 0211 00                  .byte   0\r
- 2801 0212 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 75\r
-\r
-\r
- 2802 0213 0E                  .uleb128 0xe\r
- 2803 0214 3A                  .uleb128 0x3a\r
- 2804 0215 0B                  .uleb128 0xb\r
- 2805 0216 3B                  .uleb128 0x3b\r
- 2806 0217 0B                  .uleb128 0xb\r
- 2807 0218 49                  .uleb128 0x49\r
- 2808 0219 13                  .uleb128 0x13\r
- 2809 021a 3F                  .uleb128 0x3f\r
- 2810 021b 0C                  .uleb128 0xc\r
- 2811 021c 3C                  .uleb128 0x3c\r
- 2812 021d 0C                  .uleb128 0xc\r
- 2813 021e 00                  .byte   0\r
- 2814 021f 00                  .byte   0\r
- 2815 0220 24                  .uleb128 0x24\r
- 2816 0221 2E                  .uleb128 0x2e\r
- 2817 0222 00                  .byte   0\r
- 2818 0223 3F                  .uleb128 0x3f\r
- 2819 0224 0C                  .uleb128 0xc\r
- 2820 0225 03                  .uleb128 0x3\r
- 2821 0226 0E                  .uleb128 0xe\r
- 2822 0227 3A                  .uleb128 0x3a\r
- 2823 0228 0B                  .uleb128 0xb\r
- 2824 0229 3B                  .uleb128 0x3b\r
- 2825 022a 0B                  .uleb128 0xb\r
- 2826 022b 27                  .uleb128 0x27\r
- 2827 022c 0C                  .uleb128 0xc\r
- 2828 022d 49                  .uleb128 0x49\r
- 2829 022e 13                  .uleb128 0x13\r
- 2830 022f 3C                  .uleb128 0x3c\r
- 2831 0230 0C                  .uleb128 0xc\r
- 2832 0231 00                  .byte   0\r
- 2833 0232 00                  .byte   0\r
- 2834 0233 25                  .uleb128 0x25\r
- 2835 0234 2E                  .uleb128 0x2e\r
- 2836 0235 01                  .byte   0x1\r
- 2837 0236 3F                  .uleb128 0x3f\r
- 2838 0237 0C                  .uleb128 0xc\r
- 2839 0238 03                  .uleb128 0x3\r
- 2840 0239 0E                  .uleb128 0xe\r
- 2841 023a 3A                  .uleb128 0x3a\r
- 2842 023b 0B                  .uleb128 0xb\r
- 2843 023c 3B                  .uleb128 0x3b\r
- 2844 023d 0B                  .uleb128 0xb\r
- 2845 023e 27                  .uleb128 0x27\r
- 2846 023f 0C                  .uleb128 0xc\r
- 2847 0240 3C                  .uleb128 0x3c\r
- 2848 0241 0C                  .uleb128 0xc\r
- 2849 0242 01                  .uleb128 0x1\r
- 2850 0243 13                  .uleb128 0x13\r
- 2851 0244 00                  .byte   0\r
- 2852 0245 00                  .byte   0\r
- 2853 0246 26                  .uleb128 0x26\r
- 2854 0247 05                  .uleb128 0x5\r
- 2855 0248 00                  .byte   0\r
- 2856 0249 49                  .uleb128 0x49\r
- 2857 024a 13                  .uleb128 0x13\r
- 2858 024b 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 76\r
-\r
-\r
- 2859 024c 00                  .byte   0\r
- 2860 024d 27                  .uleb128 0x27\r
- 2861 024e 2E                  .uleb128 0x2e\r
- 2862 024f 01                  .byte   0x1\r
- 2863 0250 3F                  .uleb128 0x3f\r
- 2864 0251 0C                  .uleb128 0xc\r
- 2865 0252 03                  .uleb128 0x3\r
- 2866 0253 0E                  .uleb128 0xe\r
- 2867 0254 3A                  .uleb128 0x3a\r
- 2868 0255 0B                  .uleb128 0xb\r
- 2869 0256 3B                  .uleb128 0x3b\r
- 2870 0257 0B                  .uleb128 0xb\r
- 2871 0258 27                  .uleb128 0x27\r
- 2872 0259 0C                  .uleb128 0xc\r
- 2873 025a 49                  .uleb128 0x49\r
- 2874 025b 13                  .uleb128 0x13\r
- 2875 025c 3C                  .uleb128 0x3c\r
- 2876 025d 0C                  .uleb128 0xc\r
- 2877 025e 01                  .uleb128 0x1\r
- 2878 025f 13                  .uleb128 0x13\r
- 2879 0260 00                  .byte   0\r
- 2880 0261 00                  .byte   0\r
- 2881 0262 28                  .uleb128 0x28\r
- 2882 0263 2E                  .uleb128 0x2e\r
- 2883 0264 01                  .byte   0x1\r
- 2884 0265 3F                  .uleb128 0x3f\r
- 2885 0266 0C                  .uleb128 0xc\r
- 2886 0267 03                  .uleb128 0x3\r
- 2887 0268 0E                  .uleb128 0xe\r
- 2888 0269 3A                  .uleb128 0x3a\r
- 2889 026a 0B                  .uleb128 0xb\r
- 2890 026b 3B                  .uleb128 0x3b\r
- 2891 026c 0B                  .uleb128 0xb\r
- 2892 026d 27                  .uleb128 0x27\r
- 2893 026e 0C                  .uleb128 0xc\r
- 2894 026f 3C                  .uleb128 0x3c\r
- 2895 0270 0C                  .uleb128 0xc\r
- 2896 0271 00                  .byte   0\r
- 2897 0272 00                  .byte   0\r
- 2898 0273 00                  .byte   0\r
- 2899                          .section        .debug_loc,"",%progbits\r
- 2900                  .Ldebug_loc0:\r
- 2901                  .LLST0:\r
- 2902 0000 00000000            .4byte  .LFB1\r
- 2903 0004 02000000            .4byte  .LCFI0\r
- 2904 0008 0200                .2byte  0x2\r
- 2905 000a 7D                  .byte   0x7d\r
- 2906 000b 00                  .sleb128 0\r
- 2907 000c 02000000            .4byte  .LCFI0\r
- 2908 0010 14010000            .4byte  .LFE1\r
- 2909 0014 0200                .2byte  0x2\r
- 2910 0016 7D                  .byte   0x7d\r
- 2911 0017 18                  .sleb128 24\r
- 2912 0018 00000000            .4byte  0\r
- 2913 001c 00000000            .4byte  0\r
- 2914                  .LLST1:\r
- 2915 0020 0A000000            .4byte  .LVL1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 77\r
-\r
-\r
- 2916 0024 12000000            .4byte  .LVL2\r
- 2917 0028 0100                .2byte  0x1\r
- 2918 002a 50                  .byte   0x50\r
- 2919 002b 12000000            .4byte  .LVL2\r
- 2920 002f 14010000            .4byte  .LFE1\r
- 2921 0033 0100                .2byte  0x1\r
- 2922 0035 57                  .byte   0x57\r
- 2923 0036 00000000            .4byte  0\r
- 2924 003a 00000000            .4byte  0\r
- 2925                  .LLST2:\r
- 2926 003e 00000000            .4byte  .LFB2\r
- 2927 0042 06000000            .4byte  .LCFI1\r
- 2928 0046 0200                .2byte  0x2\r
- 2929 0048 7D                  .byte   0x7d\r
- 2930 0049 00                  .sleb128 0\r
- 2931 004a 06000000            .4byte  .LCFI1\r
- 2932 004e 98000000            .4byte  .LFE2\r
- 2933 0052 0200                .2byte  0x2\r
- 2934 0054 7D                  .byte   0x7d\r
- 2935 0055 08                  .sleb128 8\r
- 2936 0056 00000000            .4byte  0\r
- 2937 005a 00000000            .4byte  0\r
- 2938                  .LLST3:\r
- 2939 005e 00000000            .4byte  .LVL18\r
- 2940 0062 34000000            .4byte  .LVL21\r
- 2941 0066 0100                .2byte  0x1\r
- 2942 0068 50                  .byte   0x50\r
- 2943 0069 34000000            .4byte  .LVL21\r
- 2944 006d 36000000            .4byte  .LVL22\r
- 2945 0071 0200                .2byte  0x2\r
- 2946 0073 71                  .byte   0x71\r
- 2947 0074 00                  .sleb128 0\r
- 2948 0075 59000000            .4byte  .LVL23-1\r
- 2949 0079 98000000            .4byte  .LFE2\r
- 2950 007d 0400                .2byte  0x4\r
- 2951 007f F3                  .byte   0xf3\r
- 2952 0080 01                  .uleb128 0x1\r
- 2953 0081 50                  .byte   0x50\r
- 2954 0082 9F                  .byte   0x9f\r
- 2955 0083 00000000            .4byte  0\r
- 2956 0087 00000000            .4byte  0\r
- 2957                  .LLST4:\r
- 2958 008b 00000000            .4byte  .LVL18\r
- 2959 008f 2A000000            .4byte  .LVL20\r
- 2960 0093 0100                .2byte  0x1\r
- 2961 0095 51                  .byte   0x51\r
- 2962 0096 2A000000            .4byte  .LVL20\r
- 2963 009a 98000000            .4byte  .LFE2\r
- 2964 009e 0400                .2byte  0x4\r
- 2965 00a0 F3                  .byte   0xf3\r
- 2966 00a1 01                  .uleb128 0x1\r
- 2967 00a2 51                  .byte   0x51\r
- 2968 00a3 9F                  .byte   0x9f\r
- 2969 00a4 00000000            .4byte  0\r
- 2970 00a8 00000000            .4byte  0\r
- 2971                  .LLST5:\r
- 2972 00ac 00000000            .4byte  .LVL18\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 78\r
-\r
-\r
- 2973 00b0 08000000            .4byte  .LVL19\r
- 2974 00b4 0200                .2byte  0x2\r
- 2975 00b6 30                  .byte   0x30\r
- 2976 00b7 9F                  .byte   0x9f\r
- 2977 00b8 08000000            .4byte  .LVL19\r
- 2978 00bc 98000000            .4byte  .LFE2\r
- 2979 00c0 0200                .2byte  0x2\r
- 2980 00c2 31                  .byte   0x31\r
- 2981 00c3 9F                  .byte   0x9f\r
- 2982 00c4 00000000            .4byte  0\r
- 2983 00c8 00000000            .4byte  0\r
- 2984                  .LLST6:\r
- 2985 00cc 00000000            .4byte  .LFB0\r
- 2986 00d0 02000000            .4byte  .LCFI2\r
- 2987 00d4 0200                .2byte  0x2\r
- 2988 00d6 7D                  .byte   0x7d\r
- 2989 00d7 00                  .sleb128 0\r
- 2990 00d8 02000000            .4byte  .LCFI2\r
- 2991 00dc 24000000            .4byte  .LFE0\r
- 2992 00e0 0200                .2byte  0x2\r
- 2993 00e2 7D                  .byte   0x7d\r
- 2994 00e3 10                  .sleb128 16\r
- 2995 00e4 00000000            .4byte  0\r
- 2996 00e8 00000000            .4byte  0\r
- 2997                  .LLST7:\r
- 2998 00ec 00000000            .4byte  .LVL24\r
- 2999 00f0 0F000000            .4byte  .LVL25-1\r
- 3000 00f4 0100                .2byte  0x1\r
- 3001 00f6 50                  .byte   0x50\r
- 3002 00f7 0F000000            .4byte  .LVL25-1\r
- 3003 00fb 24000000            .4byte  .LFE0\r
- 3004 00ff 0400                .2byte  0x4\r
- 3005 0101 F3                  .byte   0xf3\r
- 3006 0102 01                  .uleb128 0x1\r
- 3007 0103 50                  .byte   0x50\r
- 3008 0104 9F                  .byte   0x9f\r
- 3009 0105 00000000            .4byte  0\r
- 3010 0109 00000000            .4byte  0\r
- 3011                  .LLST8:\r
- 3012 010d 00000000            .4byte  .LVL24\r
- 3013 0111 0F000000            .4byte  .LVL25-1\r
- 3014 0115 0100                .2byte  0x1\r
- 3015 0117 51                  .byte   0x51\r
- 3016 0118 0F000000            .4byte  .LVL25-1\r
- 3017 011c 24000000            .4byte  .LFE0\r
- 3018 0120 0400                .2byte  0x4\r
- 3019 0122 F3                  .byte   0xf3\r
- 3020 0123 01                  .uleb128 0x1\r
- 3021 0124 51                  .byte   0x51\r
- 3022 0125 9F                  .byte   0x9f\r
- 3023 0126 00000000            .4byte  0\r
- 3024 012a 00000000            .4byte  0\r
- 3025                  .LLST9:\r
- 3026 012e 00000000            .4byte  .LVL27\r
- 3027 0132 08000000            .4byte  .LVL28\r
- 3028 0136 0200                .2byte  0x2\r
- 3029 0138 30                  .byte   0x30\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 79\r
-\r
-\r
- 3030 0139 9F                  .byte   0x9f\r
- 3031 013a 08000000            .4byte  .LVL28\r
- 3032 013e 58000000            .4byte  .LFE3\r
- 3033 0142 0200                .2byte  0x2\r
- 3034 0144 31                  .byte   0x31\r
- 3035 0145 9F                  .byte   0x9f\r
- 3036 0146 00000000            .4byte  0\r
- 3037 014a 00000000            .4byte  0\r
- 3038                  .LLST10:\r
- 3039 014e 04000000            .4byte  .LVL29\r
- 3040 0152 0E000000            .4byte  .LVL30\r
- 3041 0156 0100                .2byte  0x1\r
- 3042 0158 50                  .byte   0x50\r
- 3043 0159 00000000            .4byte  0\r
- 3044 015d 00000000            .4byte  0\r
- 3045                  .LLST11:\r
- 3046 0161 00000000            .4byte  .LVL31\r
- 3047 0165 0A000000            .4byte  .LVL32\r
- 3048 0169 0200                .2byte  0x2\r
- 3049 016b 30                  .byte   0x30\r
- 3050 016c 9F                  .byte   0x9f\r
- 3051 016d 0A000000            .4byte  .LVL32\r
- 3052 0171 14000000            .4byte  .LFE7\r
- 3053 0175 0100                .2byte  0x1\r
- 3054 0177 50                  .byte   0x50\r
- 3055 0178 00000000            .4byte  0\r
- 3056 017c 00000000            .4byte  0\r
- 3057                  .LLST12:\r
- 3058 0180 00000000            .4byte  .LVL34\r
- 3059 0184 04000000            .4byte  .LVL35\r
- 3060 0188 0100                .2byte  0x1\r
- 3061 018a 50                  .byte   0x50\r
- 3062 018b 04000000            .4byte  .LVL35\r
- 3063 018f 0C000000            .4byte  .LFE8\r
- 3064 0193 0400                .2byte  0x4\r
- 3065 0195 F3                  .byte   0xf3\r
- 3066 0196 01                  .uleb128 0x1\r
- 3067 0197 50                  .byte   0x50\r
- 3068 0198 9F                  .byte   0x9f\r
- 3069 0199 00000000            .4byte  0\r
- 3070 019d 00000000            .4byte  0\r
- 3071                  .LLST13:\r
- 3072 01a1 00000000            .4byte  .LVL36\r
- 3073 01a5 08000000            .4byte  .LVL37\r
- 3074 01a9 0100                .2byte  0x1\r
- 3075 01ab 50                  .byte   0x50\r
- 3076 01ac 08000000            .4byte  .LVL37\r
- 3077 01b0 10000000            .4byte  .LFE9\r
- 3078 01b4 0400                .2byte  0x4\r
- 3079 01b6 F3                  .byte   0xf3\r
- 3080 01b7 01                  .uleb128 0x1\r
- 3081 01b8 50                  .byte   0x50\r
- 3082 01b9 9F                  .byte   0x9f\r
- 3083 01ba 00000000            .4byte  0\r
- 3084 01be 00000000            .4byte  0\r
- 3085                  .LLST14:\r
- 3086 01c2 00000000            .4byte  .LVL38\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 80\r
-\r
-\r
- 3087 01c6 02000000            .4byte  .LVL39\r
- 3088 01ca 0100                .2byte  0x1\r
- 3089 01cc 50                  .byte   0x50\r
- 3090 01cd 02000000            .4byte  .LVL39\r
- 3091 01d1 2C000000            .4byte  .LFE10\r
- 3092 01d5 0400                .2byte  0x4\r
- 3093 01d7 F3                  .byte   0xf3\r
- 3094 01d8 01                  .uleb128 0x1\r
- 3095 01d9 50                  .byte   0x50\r
- 3096 01da 9F                  .byte   0x9f\r
- 3097 01db 00000000            .4byte  0\r
- 3098 01df 00000000            .4byte  0\r
- 3099                  .LLST15:\r
- 3100 01e3 08000000            .4byte  .LVL40\r
- 3101 01e7 0E000000            .4byte  .LVL41\r
- 3102 01eb 0500                .2byte  0x5\r
- 3103 01ed 73                  .byte   0x73\r
- 3104 01ee 00                  .sleb128 0\r
- 3105 01ef 34                  .byte   0x34\r
- 3106 01f0 24                  .byte   0x24\r
- 3107 01f1 9F                  .byte   0x9f\r
- 3108 01f2 0E000000            .4byte  .LVL41\r
- 3109 01f6 10000000            .4byte  .LVL42\r
- 3110 01fa 0500                .2byte  0x5\r
- 3111 01fc 70                  .byte   0x70\r
- 3112 01fd 00                  .sleb128 0\r
- 3113 01fe 34                  .byte   0x34\r
- 3114 01ff 24                  .byte   0x24\r
- 3115 0200 9F                  .byte   0x9f\r
- 3116 0201 00000000            .4byte  0\r
- 3117 0205 00000000            .4byte  0\r
- 3118                  .LLST16:\r
- 3119 0209 00000000            .4byte  .LVL38\r
- 3120 020d 10000000            .4byte  .LVL42\r
- 3121 0211 0200                .2byte  0x2\r
- 3122 0213 30                  .byte   0x30\r
- 3123 0214 9F                  .byte   0x9f\r
- 3124 0215 10000000            .4byte  .LVL42\r
- 3125 0219 1C000000            .4byte  .LVL43\r
- 3126 021d 0800                .2byte  0x8\r
- 3127 021f 70                  .byte   0x70\r
- 3128 0220 00                  .sleb128 0\r
- 3129 0221 3F                  .byte   0x3f\r
- 3130 0222 1A                  .byte   0x1a\r
- 3131 0223 08                  .byte   0x8\r
- 3132 0224 FF                  .byte   0xff\r
- 3133 0225 1A                  .byte   0x1a\r
- 3134 0226 9F                  .byte   0x9f\r
- 3135 0227 1C000000            .4byte  .LVL43\r
- 3136 022b 20000000            .4byte  .LVL44\r
- 3137 022f 0100                .2byte  0x1\r
- 3138 0231 50                  .byte   0x50\r
- 3139 0232 20000000            .4byte  .LVL44\r
- 3140 0236 22000000            .4byte  .LVL45\r
- 3141 023a 0100                .2byte  0x1\r
- 3142 023c 51                  .byte   0x51\r
- 3143 023d 22000000            .4byte  .LVL45\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 81\r
-\r
-\r
- 3144 0241 24000000            .4byte  .LVL46\r
- 3145 0245 0200                .2byte  0x2\r
- 3146 0247 30                  .byte   0x30\r
- 3147 0248 9F                  .byte   0x9f\r
- 3148 0249 24000000            .4byte  .LVL46\r
- 3149 024d 2C000000            .4byte  .LFE10\r
- 3150 0251 0100                .2byte  0x1\r
- 3151 0253 50                  .byte   0x50\r
- 3152 0254 00000000            .4byte  0\r
- 3153 0258 00000000            .4byte  0\r
- 3154                  .LLST17:\r
- 3155 025c 00000000            .4byte  .LFB11\r
- 3156 0260 08000000            .4byte  .LCFI3\r
- 3157 0264 0200                .2byte  0x2\r
- 3158 0266 7D                  .byte   0x7d\r
- 3159 0267 00                  .sleb128 0\r
- 3160 0268 08000000            .4byte  .LCFI3\r
- 3161 026c 7C000000            .4byte  .LFE11\r
- 3162 0270 0200                .2byte  0x2\r
- 3163 0272 7D                  .byte   0x7d\r
- 3164 0273 14                  .sleb128 20\r
- 3165 0274 00000000            .4byte  0\r
- 3166 0278 00000000            .4byte  0\r
- 3167                  .LLST18:\r
- 3168 027c 00000000            .4byte  .LVL47\r
- 3169 0280 4E000000            .4byte  .LVL55\r
- 3170 0284 0100                .2byte  0x1\r
- 3171 0286 50                  .byte   0x50\r
- 3172 0287 4E000000            .4byte  .LVL55\r
- 3173 028b 5A000000            .4byte  .LVL56\r
- 3174 028f 0400                .2byte  0x4\r
- 3175 0291 F3                  .byte   0xf3\r
- 3176 0292 01                  .uleb128 0x1\r
- 3177 0293 50                  .byte   0x50\r
- 3178 0294 9F                  .byte   0x9f\r
- 3179 0295 5A000000            .4byte  .LVL56\r
- 3180 0299 7C000000            .4byte  .LFE11\r
- 3181 029d 0100                .2byte  0x1\r
- 3182 029f 50                  .byte   0x50\r
- 3183 02a0 00000000            .4byte  0\r
- 3184 02a4 00000000            .4byte  0\r
- 3185                  .LLST19:\r
- 3186 02a8 00000000            .4byte  .LVL47\r
- 3187 02ac 4A000000            .4byte  .LVL54\r
- 3188 02b0 0100                .2byte  0x1\r
- 3189 02b2 51                  .byte   0x51\r
- 3190 02b3 4A000000            .4byte  .LVL54\r
- 3191 02b7 5A000000            .4byte  .LVL56\r
- 3192 02bb 0400                .2byte  0x4\r
- 3193 02bd F3                  .byte   0xf3\r
- 3194 02be 01                  .uleb128 0x1\r
- 3195 02bf 51                  .byte   0x51\r
- 3196 02c0 9F                  .byte   0x9f\r
- 3197 02c1 5A000000            .4byte  .LVL56\r
- 3198 02c5 7C000000            .4byte  .LFE11\r
- 3199 02c9 0100                .2byte  0x1\r
- 3200 02cb 51                  .byte   0x51\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 82\r
-\r
-\r
- 3201 02cc 00000000            .4byte  0\r
- 3202 02d0 00000000            .4byte  0\r
- 3203                  .LLST20:\r
- 3204 02d4 00000000            .4byte  .LVL47\r
- 3205 02d8 28000000            .4byte  .LVL51\r
- 3206 02dc 0100                .2byte  0x1\r
- 3207 02de 52                  .byte   0x52\r
- 3208 02df 28000000            .4byte  .LVL51\r
- 3209 02e3 2E000000            .4byte  .LVL52\r
- 3210 02e7 0400                .2byte  0x4\r
- 3211 02e9 F3                  .byte   0xf3\r
- 3212 02ea 01                  .uleb128 0x1\r
- 3213 02eb 52                  .byte   0x52\r
- 3214 02ec 9F                  .byte   0x9f\r
- 3215 02ed 2E000000            .4byte  .LVL52\r
- 3216 02f1 48000000            .4byte  .LVL53\r
- 3217 02f5 0100                .2byte  0x1\r
- 3218 02f7 52                  .byte   0x52\r
- 3219 02f8 5A000000            .4byte  .LVL56\r
- 3220 02fc 7C000000            .4byte  .LFE11\r
- 3221 0300 0100                .2byte  0x1\r
- 3222 0302 52                  .byte   0x52\r
- 3223 0303 00000000            .4byte  0\r
- 3224 0307 00000000            .4byte  0\r
- 3225                  .LLST21:\r
- 3226 030b 0A000000            .4byte  .LVL48\r
- 3227 030f 12000000            .4byte  .LVL49\r
- 3228 0313 0500                .2byte  0x5\r
- 3229 0315 73                  .byte   0x73\r
- 3230 0316 00                  .sleb128 0\r
- 3231 0317 34                  .byte   0x34\r
- 3232 0318 24                  .byte   0x24\r
- 3233 0319 9F                  .byte   0x9f\r
- 3234 031a 12000000            .4byte  .LVL49\r
- 3235 031e 4E000000            .4byte  .LVL55\r
- 3236 0322 0500                .2byte  0x5\r
- 3237 0324 70                  .byte   0x70\r
- 3238 0325 7F                  .sleb128 -1\r
- 3239 0326 34                  .byte   0x34\r
- 3240 0327 24                  .byte   0x24\r
- 3241 0328 9F                  .byte   0x9f\r
- 3242 0329 5A000000            .4byte  .LVL56\r
- 3243 032d 6A000000            .4byte  .LVL57\r
- 3244 0331 0500                .2byte  0x5\r
- 3245 0333 70                  .byte   0x70\r
- 3246 0334 7F                  .sleb128 -1\r
- 3247 0335 34                  .byte   0x34\r
- 3248 0336 24                  .byte   0x24\r
- 3249 0337 9F                  .byte   0x9f\r
- 3250 0338 00000000            .4byte  0\r
- 3251 033c 00000000            .4byte  0\r
- 3252                  .LLST22:\r
- 3253 0340 24000000            .4byte  .LVL50\r
- 3254 0344 6A000000            .4byte  .LVL57\r
- 3255 0348 0100                .2byte  0x1\r
- 3256 034a 55                  .byte   0x55\r
- 3257 034b 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 83\r
-\r
-\r
- 3258 034f 00000000            .4byte  0\r
- 3259                  .LLST23:\r
- 3260 0353 00000000            .4byte  .LVL58\r
- 3261 0357 10000000            .4byte  .LVL60\r
- 3262 035b 0100                .2byte  0x1\r
- 3263 035d 50                  .byte   0x50\r
- 3264 035e 10000000            .4byte  .LVL60\r
- 3265 0362 28000000            .4byte  .LFE13\r
- 3266 0366 0400                .2byte  0x4\r
- 3267 0368 F3                  .byte   0xf3\r
- 3268 0369 01                  .uleb128 0x1\r
- 3269 036a 50                  .byte   0x50\r
- 3270 036b 9F                  .byte   0x9f\r
- 3271 036c 00000000            .4byte  0\r
- 3272 0370 00000000            .4byte  0\r
- 3273                  .LLST24:\r
- 3274 0374 08000000            .4byte  .LVL59\r
- 3275 0378 16000000            .4byte  .LVL61\r
- 3276 037c 0500                .2byte  0x5\r
- 3277 037e 73                  .byte   0x73\r
- 3278 037f 00                  .sleb128 0\r
- 3279 0380 34                  .byte   0x34\r
- 3280 0381 24                  .byte   0x24\r
- 3281 0382 9F                  .byte   0x9f\r
- 3282 0383 00000000            .4byte  0\r
- 3283 0387 00000000            .4byte  0\r
- 3284                  .LLST25:\r
- 3285 038b 00000000            .4byte  .LFB12\r
- 3286 038f 02000000            .4byte  .LCFI4\r
- 3287 0393 0200                .2byte  0x2\r
- 3288 0395 7D                  .byte   0x7d\r
- 3289 0396 00                  .sleb128 0\r
- 3290 0397 02000000            .4byte  .LCFI4\r
- 3291 039b 4C000000            .4byte  .LFE12\r
- 3292 039f 0200                .2byte  0x2\r
- 3293 03a1 7D                  .byte   0x7d\r
- 3294 03a2 18                  .sleb128 24\r
- 3295 03a3 00000000            .4byte  0\r
- 3296 03a7 00000000            .4byte  0\r
- 3297                  .LLST26:\r
- 3298 03ab 00000000            .4byte  .LVL62\r
- 3299 03af 1D000000            .4byte  .LVL67-1\r
- 3300 03b3 0100                .2byte  0x1\r
- 3301 03b5 50                  .byte   0x50\r
- 3302 03b6 1D000000            .4byte  .LVL67-1\r
- 3303 03ba 3E000000            .4byte  .LVL72\r
- 3304 03be 0400                .2byte  0x4\r
- 3305 03c0 F3                  .byte   0xf3\r
- 3306 03c1 01                  .uleb128 0x1\r
- 3307 03c2 50                  .byte   0x50\r
- 3308 03c3 9F                  .byte   0x9f\r
- 3309 03c4 3E000000            .4byte  .LVL72\r
- 3310 03c8 44000000            .4byte  .LVL73\r
- 3311 03cc 0100                .2byte  0x1\r
- 3312 03ce 50                  .byte   0x50\r
- 3313 03cf 44000000            .4byte  .LVL73\r
- 3314 03d3 4C000000            .4byte  .LFE12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 84\r
-\r
-\r
- 3315 03d7 0400                .2byte  0x4\r
- 3316 03d9 F3                  .byte   0xf3\r
- 3317 03da 01                  .uleb128 0x1\r
- 3318 03db 50                  .byte   0x50\r
- 3319 03dc 9F                  .byte   0x9f\r
- 3320 03dd 00000000            .4byte  0\r
- 3321 03e1 00000000            .4byte  0\r
- 3322                  .LLST27:\r
- 3323 03e5 00000000            .4byte  .LVL62\r
- 3324 03e9 08000000            .4byte  .LVL63\r
- 3325 03ed 0100                .2byte  0x1\r
- 3326 03ef 51                  .byte   0x51\r
- 3327 03f0 08000000            .4byte  .LVL63\r
- 3328 03f4 4C000000            .4byte  .LFE12\r
- 3329 03f8 0100                .2byte  0x1\r
- 3330 03fa 55                  .byte   0x55\r
- 3331 03fb 00000000            .4byte  0\r
- 3332 03ff 00000000            .4byte  0\r
- 3333                  .LLST28:\r
- 3334 0403 00000000            .4byte  .LVL62\r
- 3335 0407 14000000            .4byte  .LVL65\r
- 3336 040b 0100                .2byte  0x1\r
- 3337 040d 52                  .byte   0x52\r
- 3338 040e 14000000            .4byte  .LVL65\r
- 3339 0412 26000000            .4byte  .LVL69\r
- 3340 0416 0400                .2byte  0x4\r
- 3341 0418 F3                  .byte   0xf3\r
- 3342 0419 01                  .uleb128 0x1\r
- 3343 041a 52                  .byte   0x52\r
- 3344 041b 9F                  .byte   0x9f\r
- 3345 041c 26000000            .4byte  .LVL69\r
- 3346 0420 28000000            .4byte  .LVL70\r
- 3347 0424 0100                .2byte  0x1\r
- 3348 0426 50                  .byte   0x50\r
- 3349 0427 28000000            .4byte  .LVL70\r
- 3350 042b 3E000000            .4byte  .LVL72\r
- 3351 042f 0100                .2byte  0x1\r
- 3352 0431 54                  .byte   0x54\r
- 3353 0432 3E000000            .4byte  .LVL72\r
- 3354 0436 44000000            .4byte  .LVL73\r
- 3355 043a 0100                .2byte  0x1\r
- 3356 043c 52                  .byte   0x52\r
- 3357 043d 44000000            .4byte  .LVL73\r
- 3358 0441 4C000000            .4byte  .LFE12\r
- 3359 0445 0100                .2byte  0x1\r
- 3360 0447 54                  .byte   0x54\r
- 3361 0448 00000000            .4byte  0\r
- 3362 044c 00000000            .4byte  0\r
- 3363                  .LLST29:\r
- 3364 0450 12000000            .4byte  .LVL64\r
- 3365 0454 1D000000            .4byte  .LVL67-1\r
- 3366 0458 0500                .2byte  0x5\r
- 3367 045a 71                  .byte   0x71\r
- 3368 045b 00                  .sleb128 0\r
- 3369 045c 34                  .byte   0x34\r
- 3370 045d 24                  .byte   0x24\r
- 3371 045e 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 85\r
-\r
-\r
- 3372 045f 1D000000            .4byte  .LVL67-1\r
- 3373 0463 3E000000            .4byte  .LVL72\r
- 3374 0467 0500                .2byte  0x5\r
- 3375 0469 77                  .byte   0x77\r
- 3376 046a 7F                  .sleb128 -1\r
- 3377 046b 34                  .byte   0x34\r
- 3378 046c 24                  .byte   0x24\r
- 3379 046d 9F                  .byte   0x9f\r
- 3380 046e 00000000            .4byte  0\r
- 3381 0472 00000000            .4byte  0\r
- 3382                  .LLST30:\r
- 3383 0476 1A000000            .4byte  .LVL66\r
- 3384 047a 3E000000            .4byte  .LVL72\r
- 3385 047e 0100                .2byte  0x1\r
- 3386 0480 56                  .byte   0x56\r
- 3387 0481 00000000            .4byte  0\r
- 3388 0485 00000000            .4byte  0\r
- 3389                  .LLST31:\r
- 3390 0489 26000000            .4byte  .LVL69\r
- 3391 048d 28000000            .4byte  .LVL70\r
- 3392 0491 0200                .2byte  0x2\r
- 3393 0493 30                  .byte   0x30\r
- 3394 0494 9F                  .byte   0x9f\r
- 3395 0495 00000000            .4byte  0\r
- 3396 0499 00000000            .4byte  0\r
- 3397                  .LLST32:\r
- 3398 049d 1E000000            .4byte  .LVL67\r
- 3399 04a1 24000000            .4byte  .LVL68\r
- 3400 04a5 0100                .2byte  0x1\r
- 3401 04a7 50                  .byte   0x50\r
- 3402 04a8 00000000            .4byte  0\r
- 3403 04ac 00000000            .4byte  0\r
- 3404                  .LLST33:\r
- 3405 04b0 00000000            .4byte  .LVL74\r
- 3406 04b4 02000000            .4byte  .LVL75\r
- 3407 04b8 0100                .2byte  0x1\r
- 3408 04ba 50                  .byte   0x50\r
- 3409 04bb 02000000            .4byte  .LVL75\r
- 3410 04bf 18000000            .4byte  .LFE14\r
- 3411 04c3 0400                .2byte  0x4\r
- 3412 04c5 F3                  .byte   0xf3\r
- 3413 04c6 01                  .uleb128 0x1\r
- 3414 04c7 50                  .byte   0x50\r
- 3415 04c8 9F                  .byte   0x9f\r
- 3416 04c9 00000000            .4byte  0\r
- 3417 04cd 00000000            .4byte  0\r
- 3418                  .LLST34:\r
- 3419 04d1 08000000            .4byte  .LVL76\r
- 3420 04d5 10000000            .4byte  .LVL77\r
- 3421 04d9 0500                .2byte  0x5\r
- 3422 04db 71                  .byte   0x71\r
- 3423 04dc 00                  .sleb128 0\r
- 3424 04dd 34                  .byte   0x34\r
- 3425 04de 24                  .byte   0x24\r
- 3426 04df 9F                  .byte   0x9f\r
- 3427 04e0 00000000            .4byte  0\r
- 3428 04e4 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 86\r
-\r
-\r
- 3429                  .LLST35:\r
- 3430 04e8 00000000            .4byte  .LVL79\r
- 3431 04ec 02000000            .4byte  .LVL80\r
- 3432 04f0 0100                .2byte  0x1\r
- 3433 04f2 50                  .byte   0x50\r
- 3434 04f3 02000000            .4byte  .LVL80\r
- 3435 04f7 20000000            .4byte  .LFE16\r
- 3436 04fb 0400                .2byte  0x4\r
- 3437 04fd F3                  .byte   0xf3\r
- 3438 04fe 01                  .uleb128 0x1\r
- 3439 04ff 50                  .byte   0x50\r
- 3440 0500 9F                  .byte   0x9f\r
- 3441 0501 00000000            .4byte  0\r
- 3442 0505 00000000            .4byte  0\r
- 3443                  .LLST36:\r
- 3444 0509 08000000            .4byte  .LVL81\r
- 3445 050d 10000000            .4byte  .LVL82\r
- 3446 0511 0500                .2byte  0x5\r
- 3447 0513 71                  .byte   0x71\r
- 3448 0514 00                  .sleb128 0\r
- 3449 0515 34                  .byte   0x34\r
- 3450 0516 24                  .byte   0x24\r
- 3451 0517 9F                  .byte   0x9f\r
- 3452 0518 00000000            .4byte  0\r
- 3453 051c 00000000            .4byte  0\r
- 3454                  .LLST37:\r
- 3455 0520 00000000            .4byte  .LVL79\r
- 3456 0524 16000000            .4byte  .LVL83\r
- 3457 0528 0200                .2byte  0x2\r
- 3458 052a 30                  .byte   0x30\r
- 3459 052b 9F                  .byte   0x9f\r
- 3460 052c 16000000            .4byte  .LVL83\r
- 3461 0530 18000000            .4byte  .LVL84\r
- 3462 0534 0100                .2byte  0x1\r
- 3463 0536 52                  .byte   0x52\r
- 3464 0537 18000000            .4byte  .LVL84\r
- 3465 053b 1A000000            .4byte  .LVL85\r
- 3466 053f 0200                .2byte  0x2\r
- 3467 0541 30                  .byte   0x30\r
- 3468 0542 9F                  .byte   0x9f\r
- 3469 0543 1A000000            .4byte  .LVL85\r
- 3470 0547 20000000            .4byte  .LFE16\r
- 3471 054b 0100                .2byte  0x1\r
- 3472 054d 50                  .byte   0x50\r
- 3473 054e 00000000            .4byte  0\r
- 3474 0552 00000000            .4byte  0\r
- 3475                  .LLST38:\r
- 3476 0556 00000000            .4byte  .LVL86\r
- 3477 055a 0A000000            .4byte  .LVL87\r
- 3478 055e 0100                .2byte  0x1\r
- 3479 0560 50                  .byte   0x50\r
- 3480 0561 0A000000            .4byte  .LVL87\r
- 3481 0565 0C000000            .4byte  .LVL88\r
- 3482 0569 0400                .2byte  0x4\r
- 3483 056b F3                  .byte   0xf3\r
- 3484 056c 01                  .uleb128 0x1\r
- 3485 056d 50                  .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 87\r
-\r
-\r
- 3486 056e 9F                  .byte   0x9f\r
- 3487 056f 0C000000            .4byte  .LVL88\r
- 3488 0573 10000000            .4byte  .LVL89\r
- 3489 0577 0100                .2byte  0x1\r
- 3490 0579 50                  .byte   0x50\r
- 3491 057a 10000000            .4byte  .LVL89\r
- 3492 057e 18000000            .4byte  .LFE17\r
- 3493 0582 0400                .2byte  0x4\r
- 3494 0584 F3                  .byte   0xf3\r
- 3495 0585 01                  .uleb128 0x1\r
- 3496 0586 50                  .byte   0x50\r
- 3497 0587 9F                  .byte   0x9f\r
- 3498 0588 00000000            .4byte  0\r
- 3499 058c 00000000            .4byte  0\r
- 3500                  .LLST39:\r
- 3501 0590 00000000            .4byte  .LVL90\r
- 3502 0594 04000000            .4byte  .LVL91\r
- 3503 0598 0200                .2byte  0x2\r
- 3504 059a 30                  .byte   0x30\r
- 3505 059b 9F                  .byte   0x9f\r
- 3506 059c 04000000            .4byte  .LVL91\r
- 3507 05a0 08000000            .4byte  .LVL92\r
- 3508 05a4 0900                .2byte  0x9\r
- 3509 05a6 70                  .byte   0x70\r
- 3510 05a7 00                  .sleb128 0\r
- 3511 05a8 32                  .byte   0x32\r
- 3512 05a9 1A                  .byte   0x1a\r
- 3513 05aa 48                  .byte   0x48\r
- 3514 05ab 24                  .byte   0x24\r
- 3515 05ac 30                  .byte   0x30\r
- 3516 05ad 2E                  .byte   0x2e\r
- 3517 05ae 9F                  .byte   0x9f\r
- 3518 05af 00000000            .4byte  0\r
- 3519 05b3 00000000            .4byte  0\r
- 3520                          .section        .debug_aranges,"",%progbits\r
- 3521 0000 AC000000            .4byte  0xac\r
- 3522 0004 0200                .2byte  0x2\r
- 3523 0006 00000000            .4byte  .Ldebug_info0\r
- 3524 000a 04                  .byte   0x4\r
- 3525 000b 00                  .byte   0\r
- 3526 000c 0000                .2byte  0\r
- 3527 000e 0000                .2byte  0\r
- 3528 0010 00000000            .4byte  .LFB1\r
- 3529 0014 14010000            .4byte  .LFE1-.LFB1\r
- 3530 0018 00000000            .4byte  .LFB2\r
- 3531 001c 98000000            .4byte  .LFE2-.LFB2\r
- 3532 0020 00000000            .4byte  .LFB0\r
- 3533 0024 24000000            .4byte  .LFE0-.LFB0\r
- 3534 0028 00000000            .4byte  .LFB3\r
- 3535 002c 58000000            .4byte  .LFE3-.LFB3\r
- 3536 0030 00000000            .4byte  .LFB4\r
- 3537 0034 7C000000            .4byte  .LFE4-.LFB4\r
- 3538 0038 00000000            .4byte  .LFB5\r
- 3539 003c 14000000            .4byte  .LFE5-.LFB5\r
- 3540 0040 00000000            .4byte  .LFB6\r
- 3541 0044 0C000000            .4byte  .LFE6-.LFB6\r
- 3542 0048 00000000            .4byte  .LFB7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 88\r
-\r
-\r
- 3543 004c 14000000            .4byte  .LFE7-.LFB7\r
- 3544 0050 00000000            .4byte  .LFB8\r
- 3545 0054 0C000000            .4byte  .LFE8-.LFB8\r
- 3546 0058 00000000            .4byte  .LFB9\r
- 3547 005c 10000000            .4byte  .LFE9-.LFB9\r
- 3548 0060 00000000            .4byte  .LFB10\r
- 3549 0064 2C000000            .4byte  .LFE10-.LFB10\r
- 3550 0068 00000000            .4byte  .LFB11\r
- 3551 006c 7C000000            .4byte  .LFE11-.LFB11\r
- 3552 0070 00000000            .4byte  .LFB13\r
- 3553 0074 28000000            .4byte  .LFE13-.LFB13\r
- 3554 0078 00000000            .4byte  .LFB12\r
- 3555 007c 4C000000            .4byte  .LFE12-.LFB12\r
- 3556 0080 00000000            .4byte  .LFB14\r
- 3557 0084 18000000            .4byte  .LFE14-.LFB14\r
- 3558 0088 00000000            .4byte  .LFB15\r
- 3559 008c 0C000000            .4byte  .LFE15-.LFB15\r
- 3560 0090 00000000            .4byte  .LFB16\r
- 3561 0094 20000000            .4byte  .LFE16-.LFB16\r
- 3562 0098 00000000            .4byte  .LFB17\r
- 3563 009c 18000000            .4byte  .LFE17-.LFB17\r
- 3564 00a0 00000000            .4byte  .LFB18\r
- 3565 00a4 10000000            .4byte  .LFE18-.LFB18\r
- 3566 00a8 00000000            .4byte  0\r
- 3567 00ac 00000000            .4byte  0\r
- 3568                          .section        .debug_ranges,"",%progbits\r
- 3569                  .Ldebug_ranges0:\r
- 3570 0000 00000000            .4byte  .LFB1\r
- 3571 0004 14010000            .4byte  .LFE1\r
- 3572 0008 00000000            .4byte  .LFB2\r
- 3573 000c 98000000            .4byte  .LFE2\r
- 3574 0010 00000000            .4byte  .LFB0\r
- 3575 0014 24000000            .4byte  .LFE0\r
- 3576 0018 00000000            .4byte  .LFB3\r
- 3577 001c 58000000            .4byte  .LFE3\r
- 3578 0020 00000000            .4byte  .LFB4\r
- 3579 0024 7C000000            .4byte  .LFE4\r
- 3580 0028 00000000            .4byte  .LFB5\r
- 3581 002c 14000000            .4byte  .LFE5\r
- 3582 0030 00000000            .4byte  .LFB6\r
- 3583 0034 0C000000            .4byte  .LFE6\r
- 3584 0038 00000000            .4byte  .LFB7\r
- 3585 003c 14000000            .4byte  .LFE7\r
- 3586 0040 00000000            .4byte  .LFB8\r
- 3587 0044 0C000000            .4byte  .LFE8\r
- 3588 0048 00000000            .4byte  .LFB9\r
- 3589 004c 10000000            .4byte  .LFE9\r
- 3590 0050 00000000            .4byte  .LFB10\r
- 3591 0054 2C000000            .4byte  .LFE10\r
- 3592 0058 00000000            .4byte  .LFB11\r
- 3593 005c 7C000000            .4byte  .LFE11\r
- 3594 0060 00000000            .4byte  .LFB13\r
- 3595 0064 28000000            .4byte  .LFE13\r
- 3596 0068 00000000            .4byte  .LFB12\r
- 3597 006c 4C000000            .4byte  .LFE12\r
- 3598 0070 00000000            .4byte  .LFB14\r
- 3599 0074 18000000            .4byte  .LFE14\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 89\r
-\r
-\r
- 3600 0078 00000000            .4byte  .LFB15\r
- 3601 007c 0C000000            .4byte  .LFE15\r
- 3602 0080 00000000            .4byte  .LFB16\r
- 3603 0084 20000000            .4byte  .LFE16\r
- 3604 0088 00000000            .4byte  .LFB17\r
- 3605 008c 18000000            .4byte  .LFE17\r
- 3606 0090 00000000            .4byte  .LFB18\r
- 3607 0094 10000000            .4byte  .LFE18\r
- 3608 0098 00000000            .4byte  0\r
- 3609 009c 00000000            .4byte  0\r
- 3610                          .section        .debug_line,"",%progbits\r
- 3611                  .Ldebug_line0:\r
- 3612 0000 C8020000            .section        .debug_str,"MS",%progbits,1\r
- 3612      02006900 \r
- 3612      00000201 \r
- 3612      FB0E0D00 \r
- 3612      01010101 \r
- 3613                  .LASF10:\r
- 3614 0000 75696E74            .ascii  "uint16\000"\r
- 3614      313600\r
- 3615                  .LASF70:\r
- 3616 0007 43794578            .ascii  "CyExitCriticalSection\000"\r
- 3616      69744372 \r
- 3616      69746963 \r
- 3616      616C5365 \r
- 3616      6374696F \r
- 3617                  .LASF57:\r
- 3618 001d 55534246            .ascii  "USBFS_initVar\000"\r
- 3618      535F696E \r
- 3618      69745661 \r
- 3618      7200\r
- 3619                  .LASF63:\r
- 3620 002b 55534246            .ascii  "USBFS_hidProtocol\000"\r
- 3620      535F6869 \r
- 3620      6450726F \r
- 3620      746F636F \r
- 3620      6C00\r
- 3621                  .LASF51:\r
- 3622 003d 55534246            .ascii  "USBFS_Force\000"\r
- 3622      535F466F \r
- 3622      72636500 \r
- 3623                  .LASF7:\r
- 3624 0049 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 3624      206C6F6E \r
- 3624      6720756E \r
- 3624      7369676E \r
- 3624      65642069 \r
- 3625                  .LASF53:\r
- 3626 0060 55534246            .ascii  "USBFS_GetEPAckState\000"\r
- 3626      535F4765 \r
- 3626      74455041 \r
- 3626      636B5374 \r
- 3626      61746500 \r
- 3627                  .LASF23:\r
- 3628 0074 61646472            .ascii  "addr\000"\r
- 3628      00\r
- 3629                  .LASF39:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 90\r
-\r
-\r
- 3630 0079 696E7465            .ascii  "interfaceNumber\000"\r
- 3630      72666163 \r
- 3630      654E756D \r
- 3630      62657200 \r
- 3631                  .LASF41:\r
- 3632 0089 65704E75            .ascii  "epNumber\000"\r
- 3632      6D626572 \r
- 3632      00\r
- 3633                  .LASF31:\r
- 3634 0092 64657669            .ascii  "device\000"\r
- 3634      636500\r
- 3635                  .LASF6:\r
- 3636 0099 6C6F6E67            .ascii  "long long int\000"\r
- 3636      206C6F6E \r
- 3636      6720696E \r
- 3636      7400\r
- 3637                  .LASF0:\r
- 3638 00a7 7369676E            .ascii  "signed char\000"\r
- 3638      65642063 \r
- 3638      68617200 \r
- 3639                  .LASF73:\r
- 3640 00b3 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS.c\000"\r
- 3640      6E657261 \r
- 3640      7465645F \r
- 3640      536F7572 \r
- 3640      63655C50 \r
- 3641                  .LASF37:\r
- 3642 00d4 55534246            .ascii  "USBFS_IsConfigurationChanged\000"\r
- 3642      535F4973 \r
- 3642      436F6E66 \r
- 3642      69677572 \r
- 3642      6174696F \r
- 3643                  .LASF66:\r
- 3644 00f1 55534246            .ascii  "USBFS_deviceAddress\000"\r
- 3644      535F6465 \r
- 3644      76696365 \r
- 3644      41646472 \r
- 3644      65737300 \r
- 3645                  .LASF64:\r
- 3646 0105 55534246            .ascii  "USBFS_interfaceNumber\000"\r
- 3646      535F696E \r
- 3646      74657266 \r
- 3646      6163654E \r
- 3646      756D6265 \r
- 3647                  .LASF56:\r
- 3648 011b 55534246            .ascii  "USBFS_RWUEnabled\000"\r
- 3648      535F5257 \r
- 3648      55456E61 \r
- 3648      626C6564 \r
- 3648      00\r
- 3649                  .LASF54:\r
- 3650 012c 55534246            .ascii  "USBFS_SetPowerStatus\000"\r
- 3650      535F5365 \r
- 3650      74506F77 \r
- 3650      65725374 \r
- 3650      61747573 \r
- 3651                  .LASF75:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 91\r
-\r
-\r
- 3652 0141 55534246            .ascii  "USBFS_Stop\000"\r
- 3652      535F5374 \r
- 3652      6F7000\r
- 3653                  .LASF4:\r
- 3654 014c 6C6F6E67            .ascii  "long int\000"\r
- 3654      20696E74 \r
- 3654      00\r
- 3655                  .LASF76:\r
- 3656 0155 55534246            .ascii  "USBFS_GetConfiguration\000"\r
- 3656      535F4765 \r
- 3656      74436F6E \r
- 3656      66696775 \r
- 3656      72617469 \r
- 3657                  .LASF9:\r
- 3658 016c 75696E74            .ascii  "uint8\000"\r
- 3658      3800\r
- 3659                  .LASF22:\r
- 3660 0172 6570546F            .ascii  "epToggle\000"\r
- 3660      67676C65 \r
- 3660      00\r
- 3661                  .LASF69:\r
- 3662 017b 43794465            .ascii  "CyDelayUs\000"\r
- 3662      6C617955 \r
- 3662      7300\r
- 3663                  .LASF13:\r
- 3664 0185 646F7562            .ascii  "double\000"\r
- 3664      6C6500\r
- 3665                  .LASF55:\r
- 3666 018c 706F7765            .ascii  "powerStatus\000"\r
- 3666      72537461 \r
- 3666      74757300 \r
- 3667                  .LASF11:\r
- 3668 0198 75696E74            .ascii  "uint32\000"\r
- 3668      333200\r
- 3669                  .LASF30:\r
- 3670 019f 55534246            .ascii  "USBFS_InitComponent\000"\r
- 3670      535F496E \r
- 3670      6974436F \r
- 3670      6D706F6E \r
- 3670      656E7400 \r
- 3671                  .LASF45:\r
- 3672 01b3 70446174            .ascii  "pData\000"\r
- 3672      6100\r
- 3673                  .LASF60:\r
- 3674 01b9 55534246            .ascii  "USBFS_configuration\000"\r
- 3674      535F636F \r
- 3674      6E666967 \r
- 3674      75726174 \r
- 3674      696F6E00 \r
- 3675                  .LASF24:\r
- 3676 01cd 65704D6F            .ascii  "epMode\000"\r
- 3676      646500\r
- 3677                  .LASF48:\r
- 3678 01d4 55534246            .ascii  "USBFS_ReadOutEP\000"\r
- 3678      535F5265 \r
- 3678      61644F75 \r
- 3678      74455000 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 92\r
-\r
-\r
- 3679                  .LASF8:\r
- 3680 01e4 756E7369            .ascii  "unsigned int\000"\r
- 3680      676E6564 \r
- 3680      20696E74 \r
- 3680      00\r
- 3681                  .LASF5:\r
- 3682 01f1 6C6F6E67            .ascii  "long unsigned int\000"\r
- 3682      20756E73 \r
- 3682      69676E65 \r
- 3682      6420696E \r
- 3682      7400\r
- 3683                  .LASF77:\r
- 3684 0203 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 3684      74657243 \r
- 3684      72697469 \r
- 3684      63616C53 \r
- 3684      65637469 \r
- 3685                  .LASF3:\r
- 3686 021a 73686F72            .ascii  "short unsigned int\000"\r
- 3686      7420756E \r
- 3686      7369676E \r
- 3686      65642069 \r
- 3686      6E7400\r
- 3687                  .LASF78:\r
- 3688 022d 4379496E            .ascii  "CyIntSetVector\000"\r
- 3688      74536574 \r
- 3688      56656374 \r
- 3688      6F7200\r
- 3689                  .LASF27:\r
- 3690 023c 696E7465            .ascii  "interface\000"\r
- 3690      72666163 \r
- 3690      6500\r
- 3691                  .LASF61:\r
- 3692 0246 55534246            .ascii  "USBFS_configurationChanged\000"\r
- 3692      535F636F \r
- 3692      6E666967 \r
- 3692      75726174 \r
- 3692      696F6E43 \r
- 3693                  .LASF74:\r
- 3694 0261 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 3694      43534932 \r
- 3694      53445C73 \r
- 3694      6F667477 \r
- 3694      6172655C \r
- 3695 0290 6E00                .ascii  "n\000"\r
- 3696                  .LASF16:\r
- 3697 0292 72656733            .ascii  "reg32\000"\r
- 3697      3200\r
- 3698                  .LASF21:\r
- 3699 0298 68774570            .ascii  "hwEpState\000"\r
- 3699      53746174 \r
- 3699      6500\r
- 3700                  .LASF18:\r
- 3701 02a2 73697A65            .ascii  "sizetype\000"\r
- 3701      74797065 \r
- 3701      00\r
- 3702                  .LASF19:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 93\r
-\r
-\r
- 3703 02ab 61747472            .ascii  "attrib\000"\r
- 3703      696200\r
- 3704                  .LASF71:\r
- 3705 02b2 4379496E            .ascii  "CyIntSetPriority\000"\r
- 3705      74536574 \r
- 3705      5072696F \r
- 3705      72697479 \r
- 3705      00\r
- 3706                  .LASF29:\r
- 3707 02c3 55534246            .ascii  "USBFS_Init\000"\r
- 3707      535F496E \r
- 3707      697400\r
- 3708                  .LASF12:\r
- 3709 02ce 666C6F61            .ascii  "float\000"\r
- 3709      7400\r
- 3710                  .LASF20:\r
- 3711 02d4 61706945            .ascii  "apiEpState\000"\r
- 3711      70537461 \r
- 3711      746500\r
- 3712                  .LASF67:\r
- 3713 02df 55534246            .ascii  "USBFS_EP\000"\r
- 3713      535F4550 \r
- 3713      00\r
- 3714                  .LASF79:\r
- 3715 02e8 43794465            .ascii  "CyDelayCycles\000"\r
- 3715      6C617943 \r
- 3715      79636C65 \r
- 3715      7300\r
- 3716                  .LASF72:\r
- 3717 02f6 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 3717      4320342E \r
- 3717      372E3320 \r
- 3717      32303133 \r
- 3717      30333132 \r
- 3718 0329 616E6368            .ascii  "anch revision 196615]\000"\r
- 3718      20726576 \r
- 3718      6973696F \r
- 3718      6E203139 \r
- 3718      36363135 \r
- 3719                  .LASF15:\r
- 3720 033f 72656738            .ascii  "reg8\000"\r
- 3720      00\r
- 3721                  .LASF59:\r
- 3722 0344 55534246            .ascii  "USBFS_transferState\000"\r
- 3722      535F7472 \r
- 3722      616E7366 \r
- 3722      65725374 \r
- 3722      61746500 \r
- 3723                  .LASF1:\r
- 3724 0358 756E7369            .ascii  "unsigned char\000"\r
- 3724      676E6564 \r
- 3724      20636861 \r
- 3724      7200\r
- 3725                  .LASF2:\r
- 3726 0366 73686F72            .ascii  "short int\000"\r
- 3726      7420696E \r
- 3726      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 94\r
-\r
-\r
- 3727                  .LASF47:\r
- 3728 0370 55534246            .ascii  "USBFS_EnableOutEP\000"\r
- 3728      535F456E \r
- 3728      61626C65 \r
- 3728      4F757445 \r
- 3728      5000\r
- 3729                  .LASF68:\r
- 3730 0382 55534246            .ascii  "USBFS_lastPacketSize\000"\r
- 3730      535F6C61 \r
- 3730      73745061 \r
- 3730      636B6574 \r
- 3730      53697A65 \r
- 3731                  .LASF65:\r
- 3732 0397 55534246            .ascii  "USBFS_interfaceSetting\000"\r
- 3732      535F696E \r
- 3732      74657266 \r
- 3732      61636553 \r
- 3732      65747469 \r
- 3733                  .LASF28:\r
- 3734 03ae 545F5553            .ascii  "T_USBFS_EP_CTL_BLOCK\000"\r
- 3734      4246535F \r
- 3734      45505F43 \r
- 3734      544C5F42 \r
- 3734      4C4F434B \r
- 3735                  .LASF58:\r
- 3736 03c3 55534246            .ascii  "USBFS_device\000"\r
- 3736      535F6465 \r
- 3736      76696365 \r
- 3736      00\r
- 3737                  .LASF52:\r
- 3738 03d0 62537461            .ascii  "bState\000"\r
- 3738      746500\r
- 3739                  .LASF46:\r
- 3740 03d7 6C656E67            .ascii  "length\000"\r
- 3740      746800\r
- 3741                  .LASF14:\r
- 3742 03de 63686172            .ascii  "char\000"\r
- 3742      00\r
- 3743                  .LASF32:\r
- 3744 03e3 6D6F6465            .ascii  "mode\000"\r
- 3744      00\r
- 3745                  .LASF17:\r
- 3746 03e8 63796973            .ascii  "cyisraddress\000"\r
- 3746      72616464 \r
- 3746      72657373 \r
- 3746      00\r
- 3747                  .LASF26:\r
- 3748 03f5 62756666            .ascii  "bufferSize\000"\r
- 3748      65725369 \r
- 3748      7A6500\r
- 3749                  .LASF34:\r
- 3750 0400 55534246            .ascii  "USBFS_Start\000"\r
- 3750      535F5374 \r
- 3750      61727400 \r
- 3751                  .LASF25:\r
- 3752 040c 62756666            .ascii  "buffOffset\000"\r
- 3752      4F666673 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 95\r
-\r
-\r
- 3752      657400\r
- 3753                  .LASF62:\r
- 3754 0417 55534246            .ascii  "USBFS_deviceStatus\000"\r
- 3754      535F6465 \r
- 3754      76696365 \r
- 3754      53746174 \r
- 3754      757300\r
- 3755                  .LASF40:\r
- 3756 042a 55534246            .ascii  "USBFS_GetEPState\000"\r
- 3756      535F4765 \r
- 3756      74455053 \r
- 3756      74617465 \r
- 3756      00\r
- 3757                  .LASF35:\r
- 3758 043b 55534246            .ascii  "USBFS_ReInitComponent\000"\r
- 3758      535F5265 \r
- 3758      496E6974 \r
- 3758      436F6D70 \r
- 3758      6F6E656E \r
- 3759                  .LASF33:\r
- 3760 0451 656E6162            .ascii  "enableInterrupts\000"\r
- 3760      6C65496E \r
- 3760      74657272 \r
- 3760      75707473 \r
- 3760      00\r
- 3761                  .LASF36:\r
- 3762 0462 55534246            .ascii  "USBFS_CheckActivity\000"\r
- 3762      535F4368 \r
- 3762      65636B41 \r
- 3762      63746976 \r
- 3762      69747900 \r
- 3763                  .LASF49:\r
- 3764 0476 78666572            .ascii  "xferCount\000"\r
- 3764      436F756E \r
- 3764      7400\r
- 3765                  .LASF50:\r
- 3766 0480 55534246            .ascii  "USBFS_DisableOutEP\000"\r
- 3766      535F4469 \r
- 3766      7361626C \r
- 3766      654F7574 \r
- 3766      455000\r
- 3767                  .LASF44:\r
- 3768 0493 55534246            .ascii  "USBFS_LoadInEP\000"\r
- 3768      535F4C6F \r
- 3768      6164496E \r
- 3768      455000\r
- 3769                  .LASF38:\r
- 3770 04a2 55534246            .ascii  "USBFS_GetInterfaceSetting\000"\r
- 3770      535F4765 \r
- 3770      74496E74 \r
- 3770      65726661 \r
- 3770      63655365 \r
- 3771                  .LASF42:\r
- 3772 04bc 55534246            .ascii  "USBFS_GetEPCount\000"\r
- 3772      535F4765 \r
- 3772      74455043 \r
- 3772      6F756E74 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccd5i1O6.s                      page 96\r
-\r
-\r
- 3772      00\r
- 3773                  .LASF43:\r
- 3774 04cd 72657375            .ascii  "result\000"\r
- 3774      6C7400\r
- 3775                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.o
deleted file mode 100755 (executable)
index 753aea9..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.lst
deleted file mode 100755 (executable)
index df9af69..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.lst
+++ /dev/null
@@ -1,776 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_Dm.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_Dm_Write,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_Dm_Write\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_Dm_Write, %function\r
-  24                   USBFS_Dm_Write:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_Dm.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_Dm.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_Dm.c **** * File Name: USBFS_Dm.c  \r
-   3:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Version 1.90\r
-   4:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  This file contains API to enable firmware control of a Pins component.\r
-   7:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_Dm.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_Dm.c **** * You may use this file only in accordance with the license, terms, conditions, \r
-  13:.\Generated_Source\PSoC5/USBFS_Dm.c **** * disclaimers, and limitations in the end user license agreement accompanying \r
-  14:.\Generated_Source\PSoC5/USBFS_Dm.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_Dm.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_Dm.c **** #include "cytypes.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_Dm.c **** #include "USBFS_Dm.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  20:.\Generated_Source\PSoC5/USBFS_Dm.c **** /* APIs are not generated for P15[7:6] on PSoC 5 */\r
-  21:.\Generated_Source\PSoC5/USBFS_Dm.c **** #if !(CY_PSOC5A &&\\r
-  22:.\Generated_Source\PSoC5/USBFS_Dm.c ****   USBFS_Dm__PORT == 15 && ((USBFS_Dm__MASK & 0xC0) != 0))\r
-  23:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  25:.\Generated_Source\PSoC5/USBFS_Dm.c **** /*******************************************************************************\r
-  26:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Function Name: USBFS_Dm_Write\r
-  27:.\Generated_Source\PSoC5/USBFS_Dm.c **** ********************************************************************************\r
-  28:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  29:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Summary:\r
-  30:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Assign a new value to the digital port's data output register.  \r
-  31:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Parameters:  \r
-  33:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  prtValue:  The value to be assigned to the Digital Port. \r
-  34:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  35:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Return: \r
-  36:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  None\r
-  37:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  \r
-  38:.\Generated_Source\PSoC5/USBFS_Dm.c **** *******************************************************************************/\r
-  39:.\Generated_Source\PSoC5/USBFS_Dm.c **** void USBFS_Dm_Write(uint8 value) \r
-  40:.\Generated_Source\PSoC5/USBFS_Dm.c **** {\r
-  27                           .loc 1 40 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  41:.\Generated_Source\PSoC5/USBFS_Dm.c ****     uint8 staticBits = (USBFS_Dm_DR & (uint8)(~USBFS_Dm_MASK));\r
-  33                           .loc 1 41 0\r
-  34 0000 044B                 ldr     r3, .L2\r
-  35 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  36                   .LVL1:\r
-  37 0004 02F07F01             and     r1, r2, #127\r
-  42:.\Generated_Source\PSoC5/USBFS_Dm.c ****     USBFS_Dm_DR = staticBits | ((uint8)(value << USBFS_Dm_SHIFT) & USBFS_Dm_MASK);\r
-  38                           .loc 1 42 0\r
-  39 0008 41EAC010             orr     r0, r1, r0, lsl #7\r
-  40                   .LVL2:\r
-  41 000c C2B2                 uxtb    r2, r0\r
-  42                   .LVL3:\r
-  43 000e 1A70                 strb    r2, [r3, #0]\r
-  44 0010 7047                 bx      lr\r
-  45                   .L3:\r
-  46 0012 00BF                 .align  2\r
-  47                   .L2:\r
-  48 0014 F0510040             .word   1073762800\r
-  49                           .cfi_endproc\r
-  50                   .LFE0:\r
-  51                           .size   USBFS_Dm_Write, .-USBFS_Dm_Write\r
-  52                           .section        .text.USBFS_Dm_SetDriveMode,"ax",%progbits\r
-  53                           .align  1\r
-  54                           .global USBFS_Dm_SetDriveMode\r
-  55                           .thumb\r
-  56                           .thumb_func\r
-  57                           .type   USBFS_Dm_SetDriveMode, %function\r
-  58                   USBFS_Dm_SetDriveMode:\r
-  59                   .LFB1:\r
-  43:.\Generated_Source\PSoC5/USBFS_Dm.c **** }\r
-  44:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  45:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  46:.\Generated_Source\PSoC5/USBFS_Dm.c **** /*******************************************************************************\r
-  47:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Function Name: USBFS_Dm_SetDriveMode\r
-  48:.\Generated_Source\PSoC5/USBFS_Dm.c **** ********************************************************************************\r
-  49:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  50:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Summary:\r
-  51:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Change the drive mode on the pins of the port.\r
-  52:.\Generated_Source\PSoC5/USBFS_Dm.c **** * \r
-  53:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Parameters:  \r
-  54:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  mode:  Change the pins to this drive mode.\r
-  55:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 3\r
-\r
-\r
-  56:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Return: \r
-  57:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  None\r
-  58:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  59:.\Generated_Source\PSoC5/USBFS_Dm.c **** *******************************************************************************/\r
-  60:.\Generated_Source\PSoC5/USBFS_Dm.c **** void USBFS_Dm_SetDriveMode(uint8 mode) \r
-  61:.\Generated_Source\PSoC5/USBFS_Dm.c **** {\r
-  60                           .loc 1 61 0\r
-  61                           .cfi_startproc\r
-  62                           @ args = 0, pretend = 0, frame = 0\r
-  63                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  64                           @ link register save eliminated.\r
-  65                   .LVL4:\r
-  62:.\Generated_Source\PSoC5/USBFS_Dm.c ****  CyPins_SetPinDriveMode(USBFS_Dm_0, mode);\r
-  66                           .loc 1 62 0\r
-  67 0000 044B                 ldr     r3, .L5\r
-  68 0002 00F00E00             and     r0, r0, #14\r
-  69                   .LVL5:\r
-  70 0006 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  71 0008 22F00E01             bic     r1, r2, #14\r
-  72 000c 40EA0102             orr     r2, r0, r1\r
-  73 0010 1A70                 strb    r2, [r3, #0]\r
-  74 0012 7047                 bx      lr\r
-  75                   .L6:\r
-  76                           .align  2\r
-  77                   .L5:\r
-  78 0014 7F500040             .word   1073762431\r
-  79                           .cfi_endproc\r
-  80                   .LFE1:\r
-  81                           .size   USBFS_Dm_SetDriveMode, .-USBFS_Dm_SetDriveMode\r
-  82                           .section        .text.USBFS_Dm_Read,"ax",%progbits\r
-  83                           .align  1\r
-  84                           .global USBFS_Dm_Read\r
-  85                           .thumb\r
-  86                           .thumb_func\r
-  87                           .type   USBFS_Dm_Read, %function\r
-  88                   USBFS_Dm_Read:\r
-  89                   .LFB2:\r
-  63:.\Generated_Source\PSoC5/USBFS_Dm.c **** }\r
-  64:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  65:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  66:.\Generated_Source\PSoC5/USBFS_Dm.c **** /*******************************************************************************\r
-  67:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Function Name: USBFS_Dm_Read\r
-  68:.\Generated_Source\PSoC5/USBFS_Dm.c **** ********************************************************************************\r
-  69:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  70:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Summary:\r
-  71:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Read the current value on the pins of the Digital Port in right justified \r
-  72:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  form.\r
-  73:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  74:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Parameters:  \r
-  75:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  None\r
-  76:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  77:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Return: \r
-  78:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Returns the current value of the Digital Port as a right justified number\r
-  79:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  \r
-  80:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Note:\r
-  81:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Macro USBFS_Dm_ReadPS calls this function. \r
-  82:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 4\r
-\r
-\r
-  83:.\Generated_Source\PSoC5/USBFS_Dm.c **** *******************************************************************************/\r
-  84:.\Generated_Source\PSoC5/USBFS_Dm.c **** uint8 USBFS_Dm_Read(void) \r
-  85:.\Generated_Source\PSoC5/USBFS_Dm.c **** {\r
-  90                           .loc 1 85 0\r
-  91                           .cfi_startproc\r
-  92                           @ args = 0, pretend = 0, frame = 0\r
-  93                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  94                           @ link register save eliminated.\r
-  86:.\Generated_Source\PSoC5/USBFS_Dm.c ****     return (USBFS_Dm_PS & USBFS_Dm_MASK) >> USBFS_Dm_SHIFT;\r
-  95                           .loc 1 86 0\r
-  96 0000 014B                 ldr     r3, .L8\r
-  97 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  87:.\Generated_Source\PSoC5/USBFS_Dm.c **** }\r
-  98                           .loc 1 87 0\r
-  99 0004 C009                 lsrs    r0, r0, #7\r
- 100 0006 7047                 bx      lr\r
- 101                   .L9:\r
- 102                           .align  2\r
- 103                   .L8:\r
- 104 0008 F1510040             .word   1073762801\r
- 105                           .cfi_endproc\r
- 106                   .LFE2:\r
- 107                           .size   USBFS_Dm_Read, .-USBFS_Dm_Read\r
- 108                           .section        .text.USBFS_Dm_ReadDataReg,"ax",%progbits\r
- 109                           .align  1\r
- 110                           .global USBFS_Dm_ReadDataReg\r
- 111                           .thumb\r
- 112                           .thumb_func\r
- 113                           .type   USBFS_Dm_ReadDataReg, %function\r
- 114                   USBFS_Dm_ReadDataReg:\r
- 115                   .LFB3:\r
-  88:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  89:.\Generated_Source\PSoC5/USBFS_Dm.c **** \r
-  90:.\Generated_Source\PSoC5/USBFS_Dm.c **** /*******************************************************************************\r
-  91:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Function Name: USBFS_Dm_ReadDataReg\r
-  92:.\Generated_Source\PSoC5/USBFS_Dm.c **** ********************************************************************************\r
-  93:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  94:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Summary:\r
-  95:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Read the current value assigned to a Digital Port's data output register\r
-  96:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
-  97:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Parameters:  \r
-  98:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  None \r
-  99:.\Generated_Source\PSoC5/USBFS_Dm.c **** *\r
- 100:.\Generated_Source\PSoC5/USBFS_Dm.c **** * Return: \r
- 101:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  Returns the current value assigned to the Digital Port's data output register\r
- 102:.\Generated_Source\PSoC5/USBFS_Dm.c **** *  \r
- 103:.\Generated_Source\PSoC5/USBFS_Dm.c **** *******************************************************************************/\r
- 104:.\Generated_Source\PSoC5/USBFS_Dm.c **** uint8 USBFS_Dm_ReadDataReg(void) \r
- 105:.\Generated_Source\PSoC5/USBFS_Dm.c **** {\r
- 116                           .loc 1 105 0\r
- 117                           .cfi_startproc\r
- 118                           @ args = 0, pretend = 0, frame = 0\r
- 119                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 120                           @ link register save eliminated.\r
- 106:.\Generated_Source\PSoC5/USBFS_Dm.c ****     return (USBFS_Dm_DR & USBFS_Dm_MASK) >> USBFS_Dm_SHIFT;\r
- 121                           .loc 1 106 0\r
- 122 0000 014B                 ldr     r3, .L11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 5\r
-\r
-\r
- 123 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 107:.\Generated_Source\PSoC5/USBFS_Dm.c **** }\r
- 124                           .loc 1 107 0\r
- 125 0004 C009                 lsrs    r0, r0, #7\r
- 126 0006 7047                 bx      lr\r
- 127                   .L12:\r
- 128                           .align  2\r
- 129                   .L11:\r
- 130 0008 F0510040             .word   1073762800\r
- 131                           .cfi_endproc\r
- 132                   .LFE3:\r
- 133                           .size   USBFS_Dm_ReadDataReg, .-USBFS_Dm_ReadDataReg\r
- 134                           .text\r
- 135                   .Letext0:\r
- 136                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 137                           .section        .debug_info,"",%progbits\r
- 138                   .Ldebug_info0:\r
- 139 0000 2F010000             .4byte  0x12f\r
- 140 0004 0200                 .2byte  0x2\r
- 141 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 142 000a 04                   .byte   0x4\r
- 143 000b 01                   .uleb128 0x1\r
- 144 000c 3F010000             .4byte  .LASF20\r
- 145 0010 01                   .byte   0x1\r
- 146 0011 BA000000             .4byte  .LASF21\r
- 147 0015 76000000             .4byte  .LASF22\r
- 148 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 149 001d 00000000             .4byte  0\r
- 150 0021 00000000             .4byte  0\r
- 151 0025 00000000             .4byte  .Ldebug_line0\r
- 152 0029 02                   .uleb128 0x2\r
- 153 002a 01                   .byte   0x1\r
- 154 002b 06                   .byte   0x6\r
- 155 002c 91010000             .4byte  .LASF0\r
- 156 0030 02                   .uleb128 0x2\r
- 157 0031 01                   .byte   0x1\r
- 158 0032 08                   .byte   0x8\r
- 159 0033 51000000             .4byte  .LASF1\r
- 160 0037 02                   .uleb128 0x2\r
- 161 0038 02                   .byte   0x2\r
- 162 0039 05                   .byte   0x5\r
- 163 003a 2F010000             .4byte  .LASF2\r
- 164 003e 02                   .uleb128 0x2\r
- 165 003f 02                   .byte   0x2\r
- 166 0040 07                   .byte   0x7\r
- 167 0041 A7000000             .4byte  .LASF3\r
- 168 0045 02                   .uleb128 0x2\r
- 169 0046 04                   .byte   0x4\r
- 170 0047 05                   .byte   0x5\r
- 171 0048 88010000             .4byte  .LASF4\r
- 172 004c 02                   .uleb128 0x2\r
- 173 004d 04                   .byte   0x4\r
- 174 004e 07                   .byte   0x7\r
- 175 004f 64000000             .4byte  .LASF5\r
- 176 0053 02                   .uleb128 0x2\r
- 177 0054 08                   .byte   0x8\r
- 178 0055 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 6\r
-\r
-\r
- 179 0056 1C010000             .4byte  .LASF6\r
- 180 005a 02                   .uleb128 0x2\r
- 181 005b 08                   .byte   0x8\r
- 182 005c 07                   .byte   0x7\r
- 183 005d 00010000             .4byte  .LASF7\r
- 184 0061 03                   .uleb128 0x3\r
- 185 0062 04                   .byte   0x4\r
- 186 0063 05                   .byte   0x5\r
- 187 0064 696E7400             .ascii  "int\000"\r
- 188 0068 02                   .uleb128 0x2\r
- 189 0069 04                   .byte   0x4\r
- 190 006a 07                   .byte   0x7\r
- 191 006b F3000000             .4byte  .LASF8\r
- 192 006f 04                   .uleb128 0x4\r
- 193 0070 39010000             .4byte  .LASF12\r
- 194 0074 02                   .byte   0x2\r
- 195 0075 5B                   .byte   0x5b\r
- 196 0076 30000000             .4byte  0x30\r
- 197 007a 02                   .uleb128 0x2\r
- 198 007b 04                   .byte   0x4\r
- 199 007c 04                   .byte   0x4\r
- 200 007d 4B000000             .4byte  .LASF9\r
- 201 0081 02                   .uleb128 0x2\r
- 202 0082 08                   .byte   0x8\r
- 203 0083 04                   .byte   0x4\r
- 204 0084 2E000000             .4byte  .LASF10\r
- 205 0088 02                   .uleb128 0x2\r
- 206 0089 01                   .byte   0x1\r
- 207 008a 08                   .byte   0x8\r
- 208 008b 2A010000             .4byte  .LASF11\r
- 209 008f 04                   .uleb128 0x4\r
- 210 0090 5F000000             .4byte  .LASF13\r
- 211 0094 02                   .byte   0x2\r
- 212 0095 F0                   .byte   0xf0\r
- 213 0096 9A000000             .4byte  0x9a\r
- 214 009a 05                   .uleb128 0x5\r
- 215 009b 6F000000             .4byte  0x6f\r
- 216 009f 06                   .uleb128 0x6\r
- 217 00a0 01                   .byte   0x1\r
- 218 00a1 00000000             .4byte  .LASF14\r
- 219 00a5 01                   .byte   0x1\r
- 220 00a6 27                   .byte   0x27\r
- 221 00a7 01                   .byte   0x1\r
- 222 00a8 00000000             .4byte  .LFB0\r
- 223 00ac 18000000             .4byte  .LFE0\r
- 224 00b0 02                   .byte   0x2\r
- 225 00b1 7D                   .byte   0x7d\r
- 226 00b2 00                   .sleb128 0\r
- 227 00b3 01                   .byte   0x1\r
- 228 00b4 D7000000             .4byte  0xd7\r
- 229 00b8 07                   .uleb128 0x7\r
- 230 00b9 1D000000             .4byte  .LASF16\r
- 231 00bd 01                   .byte   0x1\r
- 232 00be 27                   .byte   0x27\r
- 233 00bf 6F000000             .4byte  0x6f\r
- 234 00c3 00000000             .4byte  .LLST0\r
- 235 00c7 08                   .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 7\r
-\r
-\r
- 236 00c8 23000000             .4byte  .LASF23\r
- 237 00cc 01                   .byte   0x1\r
- 238 00cd 29                   .byte   0x29\r
- 239 00ce 6F000000             .4byte  0x6f\r
- 240 00d2 21000000             .4byte  .LLST1\r
- 241 00d6 00                   .byte   0\r
- 242 00d7 06                   .uleb128 0x6\r
- 243 00d8 01                   .byte   0x1\r
- 244 00d9 35000000             .4byte  .LASF15\r
- 245 00dd 01                   .byte   0x1\r
- 246 00de 3C                   .byte   0x3c\r
- 247 00df 01                   .byte   0x1\r
- 248 00e0 00000000             .4byte  .LFB1\r
- 249 00e4 18000000             .4byte  .LFE1\r
- 250 00e8 02                   .byte   0x2\r
- 251 00e9 7D                   .byte   0x7d\r
- 252 00ea 00                   .sleb128 0\r
- 253 00eb 01                   .byte   0x1\r
- 254 00ec 00010000             .4byte  0x100\r
- 255 00f0 07                   .uleb128 0x7\r
- 256 00f1 17010000             .4byte  .LASF17\r
- 257 00f5 01                   .byte   0x1\r
- 258 00f6 3C                   .byte   0x3c\r
- 259 00f7 6F000000             .4byte  0x6f\r
- 260 00fb 39000000             .4byte  .LLST2\r
- 261 00ff 00                   .byte   0\r
- 262 0100 09                   .uleb128 0x9\r
- 263 0101 01                   .byte   0x1\r
- 264 0102 0F000000             .4byte  .LASF18\r
- 265 0106 01                   .byte   0x1\r
- 266 0107 54                   .byte   0x54\r
- 267 0108 01                   .byte   0x1\r
- 268 0109 6F000000             .4byte  0x6f\r
- 269 010d 00000000             .4byte  .LFB2\r
- 270 0111 0C000000             .4byte  .LFE2\r
- 271 0115 02                   .byte   0x2\r
- 272 0116 7D                   .byte   0x7d\r
- 273 0117 00                   .sleb128 0\r
- 274 0118 01                   .byte   0x1\r
- 275 0119 09                   .uleb128 0x9\r
- 276 011a 01                   .byte   0x1\r
- 277 011b DE000000             .4byte  .LASF19\r
- 278 011f 01                   .byte   0x1\r
- 279 0120 68                   .byte   0x68\r
- 280 0121 01                   .byte   0x1\r
- 281 0122 6F000000             .4byte  0x6f\r
- 282 0126 00000000             .4byte  .LFB3\r
- 283 012a 0C000000             .4byte  .LFE3\r
- 284 012e 02                   .byte   0x2\r
- 285 012f 7D                   .byte   0x7d\r
- 286 0130 00                   .sleb128 0\r
- 287 0131 01                   .byte   0x1\r
- 288 0132 00                   .byte   0\r
- 289                           .section        .debug_abbrev,"",%progbits\r
- 290                   .Ldebug_abbrev0:\r
- 291 0000 01                   .uleb128 0x1\r
- 292 0001 11                   .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 8\r
-\r
-\r
- 293 0002 01                   .byte   0x1\r
- 294 0003 25                   .uleb128 0x25\r
- 295 0004 0E                   .uleb128 0xe\r
- 296 0005 13                   .uleb128 0x13\r
- 297 0006 0B                   .uleb128 0xb\r
- 298 0007 03                   .uleb128 0x3\r
- 299 0008 0E                   .uleb128 0xe\r
- 300 0009 1B                   .uleb128 0x1b\r
- 301 000a 0E                   .uleb128 0xe\r
- 302 000b 55                   .uleb128 0x55\r
- 303 000c 06                   .uleb128 0x6\r
- 304 000d 11                   .uleb128 0x11\r
- 305 000e 01                   .uleb128 0x1\r
- 306 000f 52                   .uleb128 0x52\r
- 307 0010 01                   .uleb128 0x1\r
- 308 0011 10                   .uleb128 0x10\r
- 309 0012 06                   .uleb128 0x6\r
- 310 0013 00                   .byte   0\r
- 311 0014 00                   .byte   0\r
- 312 0015 02                   .uleb128 0x2\r
- 313 0016 24                   .uleb128 0x24\r
- 314 0017 00                   .byte   0\r
- 315 0018 0B                   .uleb128 0xb\r
- 316 0019 0B                   .uleb128 0xb\r
- 317 001a 3E                   .uleb128 0x3e\r
- 318 001b 0B                   .uleb128 0xb\r
- 319 001c 03                   .uleb128 0x3\r
- 320 001d 0E                   .uleb128 0xe\r
- 321 001e 00                   .byte   0\r
- 322 001f 00                   .byte   0\r
- 323 0020 03                   .uleb128 0x3\r
- 324 0021 24                   .uleb128 0x24\r
- 325 0022 00                   .byte   0\r
- 326 0023 0B                   .uleb128 0xb\r
- 327 0024 0B                   .uleb128 0xb\r
- 328 0025 3E                   .uleb128 0x3e\r
- 329 0026 0B                   .uleb128 0xb\r
- 330 0027 03                   .uleb128 0x3\r
- 331 0028 08                   .uleb128 0x8\r
- 332 0029 00                   .byte   0\r
- 333 002a 00                   .byte   0\r
- 334 002b 04                   .uleb128 0x4\r
- 335 002c 16                   .uleb128 0x16\r
- 336 002d 00                   .byte   0\r
- 337 002e 03                   .uleb128 0x3\r
- 338 002f 0E                   .uleb128 0xe\r
- 339 0030 3A                   .uleb128 0x3a\r
- 340 0031 0B                   .uleb128 0xb\r
- 341 0032 3B                   .uleb128 0x3b\r
- 342 0033 0B                   .uleb128 0xb\r
- 343 0034 49                   .uleb128 0x49\r
- 344 0035 13                   .uleb128 0x13\r
- 345 0036 00                   .byte   0\r
- 346 0037 00                   .byte   0\r
- 347 0038 05                   .uleb128 0x5\r
- 348 0039 35                   .uleb128 0x35\r
- 349 003a 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 9\r
-\r
-\r
- 350 003b 49                   .uleb128 0x49\r
- 351 003c 13                   .uleb128 0x13\r
- 352 003d 00                   .byte   0\r
- 353 003e 00                   .byte   0\r
- 354 003f 06                   .uleb128 0x6\r
- 355 0040 2E                   .uleb128 0x2e\r
- 356 0041 01                   .byte   0x1\r
- 357 0042 3F                   .uleb128 0x3f\r
- 358 0043 0C                   .uleb128 0xc\r
- 359 0044 03                   .uleb128 0x3\r
- 360 0045 0E                   .uleb128 0xe\r
- 361 0046 3A                   .uleb128 0x3a\r
- 362 0047 0B                   .uleb128 0xb\r
- 363 0048 3B                   .uleb128 0x3b\r
- 364 0049 0B                   .uleb128 0xb\r
- 365 004a 27                   .uleb128 0x27\r
- 366 004b 0C                   .uleb128 0xc\r
- 367 004c 11                   .uleb128 0x11\r
- 368 004d 01                   .uleb128 0x1\r
- 369 004e 12                   .uleb128 0x12\r
- 370 004f 01                   .uleb128 0x1\r
- 371 0050 40                   .uleb128 0x40\r
- 372 0051 0A                   .uleb128 0xa\r
- 373 0052 9742                 .uleb128 0x2117\r
- 374 0054 0C                   .uleb128 0xc\r
- 375 0055 01                   .uleb128 0x1\r
- 376 0056 13                   .uleb128 0x13\r
- 377 0057 00                   .byte   0\r
- 378 0058 00                   .byte   0\r
- 379 0059 07                   .uleb128 0x7\r
- 380 005a 05                   .uleb128 0x5\r
- 381 005b 00                   .byte   0\r
- 382 005c 03                   .uleb128 0x3\r
- 383 005d 0E                   .uleb128 0xe\r
- 384 005e 3A                   .uleb128 0x3a\r
- 385 005f 0B                   .uleb128 0xb\r
- 386 0060 3B                   .uleb128 0x3b\r
- 387 0061 0B                   .uleb128 0xb\r
- 388 0062 49                   .uleb128 0x49\r
- 389 0063 13                   .uleb128 0x13\r
- 390 0064 02                   .uleb128 0x2\r
- 391 0065 06                   .uleb128 0x6\r
- 392 0066 00                   .byte   0\r
- 393 0067 00                   .byte   0\r
- 394 0068 08                   .uleb128 0x8\r
- 395 0069 34                   .uleb128 0x34\r
- 396 006a 00                   .byte   0\r
- 397 006b 03                   .uleb128 0x3\r
- 398 006c 0E                   .uleb128 0xe\r
- 399 006d 3A                   .uleb128 0x3a\r
- 400 006e 0B                   .uleb128 0xb\r
- 401 006f 3B                   .uleb128 0x3b\r
- 402 0070 0B                   .uleb128 0xb\r
- 403 0071 49                   .uleb128 0x49\r
- 404 0072 13                   .uleb128 0x13\r
- 405 0073 02                   .uleb128 0x2\r
- 406 0074 06                   .uleb128 0x6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 10\r
-\r
-\r
- 407 0075 00                   .byte   0\r
- 408 0076 00                   .byte   0\r
- 409 0077 09                   .uleb128 0x9\r
- 410 0078 2E                   .uleb128 0x2e\r
- 411 0079 00                   .byte   0\r
- 412 007a 3F                   .uleb128 0x3f\r
- 413 007b 0C                   .uleb128 0xc\r
- 414 007c 03                   .uleb128 0x3\r
- 415 007d 0E                   .uleb128 0xe\r
- 416 007e 3A                   .uleb128 0x3a\r
- 417 007f 0B                   .uleb128 0xb\r
- 418 0080 3B                   .uleb128 0x3b\r
- 419 0081 0B                   .uleb128 0xb\r
- 420 0082 27                   .uleb128 0x27\r
- 421 0083 0C                   .uleb128 0xc\r
- 422 0084 49                   .uleb128 0x49\r
- 423 0085 13                   .uleb128 0x13\r
- 424 0086 11                   .uleb128 0x11\r
- 425 0087 01                   .uleb128 0x1\r
- 426 0088 12                   .uleb128 0x12\r
- 427 0089 01                   .uleb128 0x1\r
- 428 008a 40                   .uleb128 0x40\r
- 429 008b 0A                   .uleb128 0xa\r
- 430 008c 9742                 .uleb128 0x2117\r
- 431 008e 0C                   .uleb128 0xc\r
- 432 008f 00                   .byte   0\r
- 433 0090 00                   .byte   0\r
- 434 0091 00                   .byte   0\r
- 435                           .section        .debug_loc,"",%progbits\r
- 436                   .Ldebug_loc0:\r
- 437                   .LLST0:\r
- 438 0000 00000000             .4byte  .LVL0\r
- 439 0004 0C000000             .4byte  .LVL2\r
- 440 0008 0100                 .2byte  0x1\r
- 441 000a 50                   .byte   0x50\r
- 442 000b 0C000000             .4byte  .LVL2\r
- 443 000f 18000000             .4byte  .LFE0\r
- 444 0013 0400                 .2byte  0x4\r
- 445 0015 F3                   .byte   0xf3\r
- 446 0016 01                   .uleb128 0x1\r
- 447 0017 50                   .byte   0x50\r
- 448 0018 9F                   .byte   0x9f\r
- 449 0019 00000000             .4byte  0\r
- 450 001d 00000000             .4byte  0\r
- 451                   .LLST1:\r
- 452 0021 04000000             .4byte  .LVL1\r
- 453 0025 0E000000             .4byte  .LVL3\r
- 454 0029 0600                 .2byte  0x6\r
- 455 002b 72                   .byte   0x72\r
- 456 002c 00                   .sleb128 0\r
- 457 002d 08                   .byte   0x8\r
- 458 002e 7F                   .byte   0x7f\r
- 459 002f 1A                   .byte   0x1a\r
- 460 0030 9F                   .byte   0x9f\r
- 461 0031 00000000             .4byte  0\r
- 462 0035 00000000             .4byte  0\r
- 463                   .LLST2:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 11\r
-\r
-\r
- 464 0039 00000000             .4byte  .LVL4\r
- 465 003d 06000000             .4byte  .LVL5\r
- 466 0041 0100                 .2byte  0x1\r
- 467 0043 50                   .byte   0x50\r
- 468 0044 06000000             .4byte  .LVL5\r
- 469 0048 18000000             .4byte  .LFE1\r
- 470 004c 0400                 .2byte  0x4\r
- 471 004e F3                   .byte   0xf3\r
- 472 004f 01                   .uleb128 0x1\r
- 473 0050 50                   .byte   0x50\r
- 474 0051 9F                   .byte   0x9f\r
- 475 0052 00000000             .4byte  0\r
- 476 0056 00000000             .4byte  0\r
- 477                           .section        .debug_aranges,"",%progbits\r
- 478 0000 34000000             .4byte  0x34\r
- 479 0004 0200                 .2byte  0x2\r
- 480 0006 00000000             .4byte  .Ldebug_info0\r
- 481 000a 04                   .byte   0x4\r
- 482 000b 00                   .byte   0\r
- 483 000c 0000                 .2byte  0\r
- 484 000e 0000                 .2byte  0\r
- 485 0010 00000000             .4byte  .LFB0\r
- 486 0014 18000000             .4byte  .LFE0-.LFB0\r
- 487 0018 00000000             .4byte  .LFB1\r
- 488 001c 18000000             .4byte  .LFE1-.LFB1\r
- 489 0020 00000000             .4byte  .LFB2\r
- 490 0024 0C000000             .4byte  .LFE2-.LFB2\r
- 491 0028 00000000             .4byte  .LFB3\r
- 492 002c 0C000000             .4byte  .LFE3-.LFB3\r
- 493 0030 00000000             .4byte  0\r
- 494 0034 00000000             .4byte  0\r
- 495                           .section        .debug_ranges,"",%progbits\r
- 496                   .Ldebug_ranges0:\r
- 497 0000 00000000             .4byte  .LFB0\r
- 498 0004 18000000             .4byte  .LFE0\r
- 499 0008 00000000             .4byte  .LFB1\r
- 500 000c 18000000             .4byte  .LFE1\r
- 501 0010 00000000             .4byte  .LFB2\r
- 502 0014 0C000000             .4byte  .LFE2\r
- 503 0018 00000000             .4byte  .LFB3\r
- 504 001c 0C000000             .4byte  .LFE3\r
- 505 0020 00000000             .4byte  0\r
- 506 0024 00000000             .4byte  0\r
- 507                           .section        .debug_line,"",%progbits\r
- 508                   .Ldebug_line0:\r
- 509 0000 92000000             .section        .debug_str,"MS",%progbits,1\r
- 509      02004700 \r
- 509      00000201 \r
- 509      FB0E0D00 \r
- 509      01010101 \r
- 510                   .LASF14:\r
- 511 0000 55534246             .ascii  "USBFS_Dm_Write\000"\r
- 511      535F446D \r
- 511      5F577269 \r
- 511      746500\r
- 512                   .LASF18:\r
- 513 000f 55534246             .ascii  "USBFS_Dm_Read\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 12\r
-\r
-\r
- 513      535F446D \r
- 513      5F526561 \r
- 513      6400\r
- 514                   .LASF16:\r
- 515 001d 76616C75             .ascii  "value\000"\r
- 515      6500\r
- 516                   .LASF23:\r
- 517 0023 73746174             .ascii  "staticBits\000"\r
- 517      69634269 \r
- 517      747300\r
- 518                   .LASF10:\r
- 519 002e 646F7562             .ascii  "double\000"\r
- 519      6C6500\r
- 520                   .LASF15:\r
- 521 0035 55534246             .ascii  "USBFS_Dm_SetDriveMode\000"\r
- 521      535F446D \r
- 521      5F536574 \r
- 521      44726976 \r
- 521      654D6F64 \r
- 522                   .LASF9:\r
- 523 004b 666C6F61             .ascii  "float\000"\r
- 523      7400\r
- 524                   .LASF1:\r
- 525 0051 756E7369             .ascii  "unsigned char\000"\r
- 525      676E6564 \r
- 525      20636861 \r
- 525      7200\r
- 526                   .LASF13:\r
- 527 005f 72656738             .ascii  "reg8\000"\r
- 527      00\r
- 528                   .LASF5:\r
- 529 0064 6C6F6E67             .ascii  "long unsigned int\000"\r
- 529      20756E73 \r
- 529      69676E65 \r
- 529      6420696E \r
- 529      7400\r
- 530                   .LASF22:\r
- 531 0076 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 531      43534932 \r
- 531      53445C73 \r
- 531      6F667477 \r
- 531      6172655C \r
- 532 00a5 6E00                 .ascii  "n\000"\r
- 533                   .LASF3:\r
- 534 00a7 73686F72             .ascii  "short unsigned int\000"\r
- 534      7420756E \r
- 534      7369676E \r
- 534      65642069 \r
- 534      6E7400\r
- 535                   .LASF21:\r
- 536 00ba 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_Dm.c\000"\r
- 536      6E657261 \r
- 536      7465645F \r
- 536      536F7572 \r
- 536      63655C50 \r
- 537                   .LASF19:\r
- 538 00de 55534246             .ascii  "USBFS_Dm_ReadDataReg\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccmaaXQv.s                      page 13\r
-\r
-\r
- 538      535F446D \r
- 538      5F526561 \r
- 538      64446174 \r
- 538      61526567 \r
- 539                   .LASF8:\r
- 540 00f3 756E7369             .ascii  "unsigned int\000"\r
- 540      676E6564 \r
- 540      20696E74 \r
- 540      00\r
- 541                   .LASF7:\r
- 542 0100 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 542      206C6F6E \r
- 542      6720756E \r
- 542      7369676E \r
- 542      65642069 \r
- 543                   .LASF17:\r
- 544 0117 6D6F6465             .ascii  "mode\000"\r
- 544      00\r
- 545                   .LASF6:\r
- 546 011c 6C6F6E67             .ascii  "long long int\000"\r
- 546      206C6F6E \r
- 546      6720696E \r
- 546      7400\r
- 547                   .LASF11:\r
- 548 012a 63686172             .ascii  "char\000"\r
- 548      00\r
- 549                   .LASF2:\r
- 550 012f 73686F72             .ascii  "short int\000"\r
- 550      7420696E \r
- 550      7400\r
- 551                   .LASF12:\r
- 552 0139 75696E74             .ascii  "uint8\000"\r
- 552      3800\r
- 553                   .LASF20:\r
- 554 013f 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 554      4320342E \r
- 554      372E3320 \r
- 554      32303133 \r
- 554      30333132 \r
- 555 0172 616E6368             .ascii  "anch revision 196615]\000"\r
- 555      20726576 \r
- 555      6973696F \r
- 555      6E203139 \r
- 555      36363135 \r
- 556                   .LASF4:\r
- 557 0188 6C6F6E67             .ascii  "long int\000"\r
- 557      20696E74 \r
- 557      00\r
- 558                   .LASF0:\r
- 559 0191 7369676E             .ascii  "signed char\000"\r
- 559      65642063 \r
- 559      68617200 \r
- 560                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.o
deleted file mode 100755 (executable)
index 0faf214..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dm.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.lst
deleted file mode 100755 (executable)
index ac6a436..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.lst
+++ /dev/null
@@ -1,861 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_Dp.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_Dp_Write,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_Dp_Write\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_Dp_Write, %function\r
-  24                   USBFS_Dp_Write:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_Dp.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_Dp.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_Dp.c **** * File Name: USBFS_Dp.c  \r
-   3:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Version 1.90\r
-   4:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  This file contains API to enable firmware control of a Pins component.\r
-   7:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_Dp.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_Dp.c **** * You may use this file only in accordance with the license, terms, conditions, \r
-  13:.\Generated_Source\PSoC5/USBFS_Dp.c **** * disclaimers, and limitations in the end user license agreement accompanying \r
-  14:.\Generated_Source\PSoC5/USBFS_Dp.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_Dp.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_Dp.c **** #include "cytypes.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_Dp.c **** #include "USBFS_Dp.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  20:.\Generated_Source\PSoC5/USBFS_Dp.c **** /* APIs are not generated for P15[7:6] on PSoC 5 */\r
-  21:.\Generated_Source\PSoC5/USBFS_Dp.c **** #if !(CY_PSOC5A &&\\r
-  22:.\Generated_Source\PSoC5/USBFS_Dp.c ****   USBFS_Dp__PORT == 15 && ((USBFS_Dp__MASK & 0xC0) != 0))\r
-  23:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  25:.\Generated_Source\PSoC5/USBFS_Dp.c **** /*******************************************************************************\r
-  26:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Function Name: USBFS_Dp_Write\r
-  27:.\Generated_Source\PSoC5/USBFS_Dp.c **** ********************************************************************************\r
-  28:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  29:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Summary:\r
-  30:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Assign a new value to the digital port's data output register.  \r
-  31:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Parameters:  \r
-  33:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  prtValue:  The value to be assigned to the Digital Port. \r
-  34:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  35:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Return: \r
-  36:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  None\r
-  37:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  \r
-  38:.\Generated_Source\PSoC5/USBFS_Dp.c **** *******************************************************************************/\r
-  39:.\Generated_Source\PSoC5/USBFS_Dp.c **** void USBFS_Dp_Write(uint8 value) \r
-  40:.\Generated_Source\PSoC5/USBFS_Dp.c **** {\r
-  27                           .loc 1 40 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  41:.\Generated_Source\PSoC5/USBFS_Dp.c ****     uint8 staticBits = (USBFS_Dp_DR & (uint8)(~USBFS_Dp_MASK));\r
-  33                           .loc 1 41 0\r
-  34 0000 054B                 ldr     r3, .L2\r
-  42:.\Generated_Source\PSoC5/USBFS_Dp.c ****     USBFS_Dp_DR = staticBits | ((uint8)(value << USBFS_Dp_SHIFT) & USBFS_Dp_MASK);\r
-  35                           .loc 1 42 0\r
-  36 0002 8001                 lsls    r0, r0, #6\r
-  37                   .LVL1:\r
-  41:.\Generated_Source\PSoC5/USBFS_Dp.c ****     uint8 staticBits = (USBFS_Dp_DR & (uint8)(~USBFS_Dp_MASK));\r
-  38                           .loc 1 41 0\r
-  39 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  40                   .LVL2:\r
-  41                           .loc 1 42 0\r
-  42 0006 00F04001             and     r1, r0, #64\r
-  41:.\Generated_Source\PSoC5/USBFS_Dp.c ****     uint8 staticBits = (USBFS_Dp_DR & (uint8)(~USBFS_Dp_MASK));\r
-  43                           .loc 1 41 0\r
-  44 000a 02F0BF02             and     r2, r2, #191\r
-  45                   .LVL3:\r
-  46                           .loc 1 42 0\r
-  47 000e 41EA0200             orr     r0, r1, r2\r
-  48 0012 1870                 strb    r0, [r3, #0]\r
-  49 0014 7047                 bx      lr\r
-  50                   .L3:\r
-  51 0016 00BF                 .align  2\r
-  52                   .L2:\r
-  53 0018 F0510040             .word   1073762800\r
-  54                           .cfi_endproc\r
-  55                   .LFE0:\r
-  56                           .size   USBFS_Dp_Write, .-USBFS_Dp_Write\r
-  57                           .section        .text.USBFS_Dp_SetDriveMode,"ax",%progbits\r
-  58                           .align  1\r
-  59                           .global USBFS_Dp_SetDriveMode\r
-  60                           .thumb\r
-  61                           .thumb_func\r
-  62                           .type   USBFS_Dp_SetDriveMode, %function\r
-  63                   USBFS_Dp_SetDriveMode:\r
-  64                   .LFB1:\r
-  43:.\Generated_Source\PSoC5/USBFS_Dp.c **** }\r
-  44:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  45:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  46:.\Generated_Source\PSoC5/USBFS_Dp.c **** /*******************************************************************************\r
-  47:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Function Name: USBFS_Dp_SetDriveMode\r
-  48:.\Generated_Source\PSoC5/USBFS_Dp.c **** ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 3\r
-\r
-\r
-  49:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  50:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Summary:\r
-  51:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Change the drive mode on the pins of the port.\r
-  52:.\Generated_Source\PSoC5/USBFS_Dp.c **** * \r
-  53:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Parameters:  \r
-  54:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  mode:  Change the pins to this drive mode.\r
-  55:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  56:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Return: \r
-  57:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  None\r
-  58:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  59:.\Generated_Source\PSoC5/USBFS_Dp.c **** *******************************************************************************/\r
-  60:.\Generated_Source\PSoC5/USBFS_Dp.c **** void USBFS_Dp_SetDriveMode(uint8 mode) \r
-  61:.\Generated_Source\PSoC5/USBFS_Dp.c **** {\r
-  65                           .loc 1 61 0\r
-  66                           .cfi_startproc\r
-  67                           @ args = 0, pretend = 0, frame = 0\r
-  68                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  69                           @ link register save eliminated.\r
-  70                   .LVL4:\r
-  62:.\Generated_Source\PSoC5/USBFS_Dp.c ****  CyPins_SetPinDriveMode(USBFS_Dp_0, mode);\r
-  71                           .loc 1 62 0\r
-  72 0000 044B                 ldr     r3, .L5\r
-  73 0002 00F00E00             and     r0, r0, #14\r
-  74                   .LVL5:\r
-  75 0006 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  76 0008 22F00E01             bic     r1, r2, #14\r
-  77 000c 40EA0102             orr     r2, r0, r1\r
-  78 0010 1A70                 strb    r2, [r3, #0]\r
-  79 0012 7047                 bx      lr\r
-  80                   .L6:\r
-  81                           .align  2\r
-  82                   .L5:\r
-  83 0014 7E500040             .word   1073762430\r
-  84                           .cfi_endproc\r
-  85                   .LFE1:\r
-  86                           .size   USBFS_Dp_SetDriveMode, .-USBFS_Dp_SetDriveMode\r
-  87                           .section        .text.USBFS_Dp_Read,"ax",%progbits\r
-  88                           .align  1\r
-  89                           .global USBFS_Dp_Read\r
-  90                           .thumb\r
-  91                           .thumb_func\r
-  92                           .type   USBFS_Dp_Read, %function\r
-  93                   USBFS_Dp_Read:\r
-  94                   .LFB2:\r
-  63:.\Generated_Source\PSoC5/USBFS_Dp.c **** }\r
-  64:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  65:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  66:.\Generated_Source\PSoC5/USBFS_Dp.c **** /*******************************************************************************\r
-  67:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Function Name: USBFS_Dp_Read\r
-  68:.\Generated_Source\PSoC5/USBFS_Dp.c **** ********************************************************************************\r
-  69:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  70:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Summary:\r
-  71:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Read the current value on the pins of the Digital Port in right justified \r
-  72:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  form.\r
-  73:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  74:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Parameters:  \r
-  75:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  None\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 4\r
-\r
-\r
-  76:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  77:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Return: \r
-  78:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Returns the current value of the Digital Port as a right justified number\r
-  79:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  \r
-  80:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Note:\r
-  81:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Macro USBFS_Dp_ReadPS calls this function. \r
-  82:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  \r
-  83:.\Generated_Source\PSoC5/USBFS_Dp.c **** *******************************************************************************/\r
-  84:.\Generated_Source\PSoC5/USBFS_Dp.c **** uint8 USBFS_Dp_Read(void) \r
-  85:.\Generated_Source\PSoC5/USBFS_Dp.c **** {\r
-  95                           .loc 1 85 0\r
-  96                           .cfi_startproc\r
-  97                           @ args = 0, pretend = 0, frame = 0\r
-  98                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  99                           @ link register save eliminated.\r
-  86:.\Generated_Source\PSoC5/USBFS_Dp.c ****     return (USBFS_Dp_PS & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
- 100                           .loc 1 86 0\r
- 101 0000 024B                 ldr     r3, .L8\r
- 102 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  87:.\Generated_Source\PSoC5/USBFS_Dp.c **** }\r
- 103                           .loc 1 87 0\r
- 104 0004 C0F38010             ubfx    r0, r0, #6, #1\r
- 105 0008 7047                 bx      lr\r
- 106                   .L9:\r
- 107 000a 00BF                 .align  2\r
- 108                   .L8:\r
- 109 000c F1510040             .word   1073762801\r
- 110                           .cfi_endproc\r
- 111                   .LFE2:\r
- 112                           .size   USBFS_Dp_Read, .-USBFS_Dp_Read\r
- 113                           .section        .text.USBFS_Dp_ReadDataReg,"ax",%progbits\r
- 114                           .align  1\r
- 115                           .global USBFS_Dp_ReadDataReg\r
- 116                           .thumb\r
- 117                           .thumb_func\r
- 118                           .type   USBFS_Dp_ReadDataReg, %function\r
- 119                   USBFS_Dp_ReadDataReg:\r
- 120                   .LFB3:\r
-  88:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  89:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
-  90:.\Generated_Source\PSoC5/USBFS_Dp.c **** /*******************************************************************************\r
-  91:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Function Name: USBFS_Dp_ReadDataReg\r
-  92:.\Generated_Source\PSoC5/USBFS_Dp.c **** ********************************************************************************\r
-  93:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  94:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Summary:\r
-  95:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Read the current value assigned to a Digital Port's data output register\r
-  96:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
-  97:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Parameters:  \r
-  98:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  None \r
-  99:.\Generated_Source\PSoC5/USBFS_Dp.c **** *\r
- 100:.\Generated_Source\PSoC5/USBFS_Dp.c **** * Return: \r
- 101:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  Returns the current value assigned to the Digital Port's data output register\r
- 102:.\Generated_Source\PSoC5/USBFS_Dp.c **** *  \r
- 103:.\Generated_Source\PSoC5/USBFS_Dp.c **** *******************************************************************************/\r
- 104:.\Generated_Source\PSoC5/USBFS_Dp.c **** uint8 USBFS_Dp_ReadDataReg(void) \r
- 105:.\Generated_Source\PSoC5/USBFS_Dp.c **** {\r
- 121                           .loc 1 105 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 5\r
-\r
-\r
- 122                           .cfi_startproc\r
- 123                           @ args = 0, pretend = 0, frame = 0\r
- 124                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 125                           @ link register save eliminated.\r
- 106:.\Generated_Source\PSoC5/USBFS_Dp.c ****     return (USBFS_Dp_DR & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
- 126                           .loc 1 106 0\r
- 127 0000 024B                 ldr     r3, .L11\r
- 128 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 107:.\Generated_Source\PSoC5/USBFS_Dp.c **** }\r
- 129                           .loc 1 107 0\r
- 130 0004 C0F38010             ubfx    r0, r0, #6, #1\r
- 131 0008 7047                 bx      lr\r
- 132                   .L12:\r
- 133 000a 00BF                 .align  2\r
- 134                   .L11:\r
- 135 000c F0510040             .word   1073762800\r
- 136                           .cfi_endproc\r
- 137                   .LFE3:\r
- 138                           .size   USBFS_Dp_ReadDataReg, .-USBFS_Dp_ReadDataReg\r
- 139                           .section        .text.USBFS_Dp_ClearInterrupt,"ax",%progbits\r
- 140                           .align  1\r
- 141                           .global USBFS_Dp_ClearInterrupt\r
- 142                           .thumb\r
- 143                           .thumb_func\r
- 144                           .type   USBFS_Dp_ClearInterrupt, %function\r
- 145                   USBFS_Dp_ClearInterrupt:\r
- 146                   .LFB4:\r
- 108:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
- 109:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
- 110:.\Generated_Source\PSoC5/USBFS_Dp.c **** /* If Interrupts Are Enabled for this Pins component */ \r
- 111:.\Generated_Source\PSoC5/USBFS_Dp.c **** #if defined(USBFS_Dp_INTSTAT) \r
- 112:.\Generated_Source\PSoC5/USBFS_Dp.c **** \r
- 113:.\Generated_Source\PSoC5/USBFS_Dp.c ****     /*******************************************************************************\r
- 114:.\Generated_Source\PSoC5/USBFS_Dp.c ****     * Function Name: USBFS_Dp_ClearInterrupt\r
- 115:.\Generated_Source\PSoC5/USBFS_Dp.c ****     ********************************************************************************\r
- 116:.\Generated_Source\PSoC5/USBFS_Dp.c ****     * Summary:\r
- 117:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *  Clears any active interrupts attached to port and returns the value of the \r
- 118:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *  interrupt status register.\r
- 119:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *\r
- 120:.\Generated_Source\PSoC5/USBFS_Dp.c ****     * Parameters:  \r
- 121:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *  None \r
- 122:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *\r
- 123:.\Generated_Source\PSoC5/USBFS_Dp.c ****     * Return: \r
- 124:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *  Returns the value of the interrupt status register\r
- 125:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *  \r
- 126:.\Generated_Source\PSoC5/USBFS_Dp.c ****     *******************************************************************************/\r
- 127:.\Generated_Source\PSoC5/USBFS_Dp.c ****     uint8 USBFS_Dp_ClearInterrupt(void) \r
- 128:.\Generated_Source\PSoC5/USBFS_Dp.c ****     {\r
- 147                           .loc 1 128 0\r
- 148                           .cfi_startproc\r
- 149                           @ args = 0, pretend = 0, frame = 0\r
- 150                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 151                           @ link register save eliminated.\r
- 129:.\Generated_Source\PSoC5/USBFS_Dp.c ****         return (USBFS_Dp_INTSTAT & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
- 152                           .loc 1 129 0\r
- 153 0000 024B                 ldr     r3, .L14\r
- 154 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 6\r
-\r
-\r
- 130:.\Generated_Source\PSoC5/USBFS_Dp.c ****     }\r
- 155                           .loc 1 130 0\r
- 156 0004 C0F38010             ubfx    r0, r0, #6, #1\r
- 157 0008 7047                 bx      lr\r
- 158                   .L15:\r
- 159 000a 00BF                 .align  2\r
- 160                   .L14:\r
- 161 000c 8F450040             .word   1073759631\r
- 162                           .cfi_endproc\r
- 163                   .LFE4:\r
- 164                           .size   USBFS_Dp_ClearInterrupt, .-USBFS_Dp_ClearInterrupt\r
- 165                           .text\r
- 166                   .Letext0:\r
- 167                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 168                           .section        .debug_info,"",%progbits\r
- 169                   .Ldebug_info0:\r
- 170 0000 48010000             .4byte  0x148\r
- 171 0004 0200                 .2byte  0x2\r
- 172 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 173 000a 04                   .byte   0x4\r
- 174 000b 01                   .uleb128 0x1\r
- 175 000c 41010000             .4byte  .LASF21\r
- 176 0010 01                   .byte   0x1\r
- 177 0011 AD000000             .4byte  .LASF22\r
- 178 0015 62000000             .4byte  .LASF23\r
- 179 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 180 001d 00000000             .4byte  0\r
- 181 0021 00000000             .4byte  0\r
- 182 0025 00000000             .4byte  .Ldebug_line0\r
- 183 0029 02                   .uleb128 0x2\r
- 184 002a 01                   .byte   0x1\r
- 185 002b 06                   .byte   0x6\r
- 186 002c A9010000             .4byte  .LASF0\r
- 187 0030 02                   .uleb128 0x2\r
- 188 0031 01                   .byte   0x1\r
- 189 0032 08                   .byte   0x8\r
- 190 0033 3D000000             .4byte  .LASF1\r
- 191 0037 02                   .uleb128 0x2\r
- 192 0038 02                   .byte   0x2\r
- 193 0039 05                   .byte   0x5\r
- 194 003a 31010000             .4byte  .LASF2\r
- 195 003e 02                   .uleb128 0x2\r
- 196 003f 02                   .byte   0x2\r
- 197 0040 07                   .byte   0x7\r
- 198 0041 93000000             .4byte  .LASF3\r
- 199 0045 02                   .uleb128 0x2\r
- 200 0046 04                   .byte   0x4\r
- 201 0047 05                   .byte   0x5\r
- 202 0048 8A010000             .4byte  .LASF4\r
- 203 004c 02                   .uleb128 0x2\r
- 204 004d 04                   .byte   0x4\r
- 205 004e 07                   .byte   0x7\r
- 206 004f 50000000             .4byte  .LASF5\r
- 207 0053 02                   .uleb128 0x2\r
- 208 0054 08                   .byte   0x8\r
- 209 0055 05                   .byte   0x5\r
- 210 0056 1E010000             .4byte  .LASF6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 7\r
-\r
-\r
- 211 005a 02                   .uleb128 0x2\r
- 212 005b 08                   .byte   0x8\r
- 213 005c 07                   .byte   0x7\r
- 214 005d ED000000             .4byte  .LASF7\r
- 215 0061 03                   .uleb128 0x3\r
- 216 0062 04                   .byte   0x4\r
- 217 0063 05                   .byte   0x5\r
- 218 0064 696E7400             .ascii  "int\000"\r
- 219 0068 02                   .uleb128 0x2\r
- 220 0069 04                   .byte   0x4\r
- 221 006a 07                   .byte   0x7\r
- 222 006b E0000000             .4byte  .LASF8\r
- 223 006f 04                   .uleb128 0x4\r
- 224 0070 3B010000             .4byte  .LASF12\r
- 225 0074 02                   .byte   0x2\r
- 226 0075 5B                   .byte   0x5b\r
- 227 0076 30000000             .4byte  0x30\r
- 228 007a 02                   .uleb128 0x2\r
- 229 007b 04                   .byte   0x4\r
- 230 007c 04                   .byte   0x4\r
- 231 007d 1F000000             .4byte  .LASF9\r
- 232 0081 02                   .uleb128 0x2\r
- 233 0082 08                   .byte   0x8\r
- 234 0083 04                   .byte   0x4\r
- 235 0084 A6000000             .4byte  .LASF10\r
- 236 0088 02                   .uleb128 0x2\r
- 237 0089 01                   .byte   0x1\r
- 238 008a 08                   .byte   0x8\r
- 239 008b 2C010000             .4byte  .LASF11\r
- 240 008f 04                   .uleb128 0x4\r
- 241 0090 4B000000             .4byte  .LASF13\r
- 242 0094 02                   .byte   0x2\r
- 243 0095 F0                   .byte   0xf0\r
- 244 0096 9A000000             .4byte  0x9a\r
- 245 009a 05                   .uleb128 0x5\r
- 246 009b 6F000000             .4byte  0x6f\r
- 247 009f 06                   .uleb128 0x6\r
- 248 00a0 01                   .byte   0x1\r
- 249 00a1 D1000000             .4byte  .LASF14\r
- 250 00a5 01                   .byte   0x1\r
- 251 00a6 27                   .byte   0x27\r
- 252 00a7 01                   .byte   0x1\r
- 253 00a8 00000000             .4byte  .LFB0\r
- 254 00ac 1C000000             .4byte  .LFE0\r
- 255 00b0 02                   .byte   0x2\r
- 256 00b1 7D                   .byte   0x7d\r
- 257 00b2 00                   .sleb128 0\r
- 258 00b3 01                   .byte   0x1\r
- 259 00b4 D7000000             .4byte  0xd7\r
- 260 00b8 07                   .uleb128 0x7\r
- 261 00b9 00000000             .4byte  .LASF16\r
- 262 00bd 01                   .byte   0x1\r
- 263 00be 27                   .byte   0x27\r
- 264 00bf 6F000000             .4byte  0x6f\r
- 265 00c3 00000000             .4byte  .LLST0\r
- 266 00c7 08                   .uleb128 0x8\r
- 267 00c8 14000000             .4byte  .LASF24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 8\r
-\r
-\r
- 268 00cc 01                   .byte   0x1\r
- 269 00cd 29                   .byte   0x29\r
- 270 00ce 6F000000             .4byte  0x6f\r
- 271 00d2 21000000             .4byte  .LLST1\r
- 272 00d6 00                   .byte   0\r
- 273 00d7 06                   .uleb128 0x6\r
- 274 00d8 01                   .byte   0x1\r
- 275 00d9 93010000             .4byte  .LASF15\r
- 276 00dd 01                   .byte   0x1\r
- 277 00de 3C                   .byte   0x3c\r
- 278 00df 01                   .byte   0x1\r
- 279 00e0 00000000             .4byte  .LFB1\r
- 280 00e4 18000000             .4byte  .LFE1\r
- 281 00e8 02                   .byte   0x2\r
- 282 00e9 7D                   .byte   0x7d\r
- 283 00ea 00                   .sleb128 0\r
- 284 00eb 01                   .byte   0x1\r
- 285 00ec 00010000             .4byte  0x100\r
- 286 00f0 07                   .uleb128 0x7\r
- 287 00f1 19010000             .4byte  .LASF17\r
- 288 00f5 01                   .byte   0x1\r
- 289 00f6 3C                   .byte   0x3c\r
- 290 00f7 6F000000             .4byte  0x6f\r
- 291 00fb 39000000             .4byte  .LLST2\r
- 292 00ff 00                   .byte   0\r
- 293 0100 09                   .uleb128 0x9\r
- 294 0101 01                   .byte   0x1\r
- 295 0102 06000000             .4byte  .LASF18\r
- 296 0106 01                   .byte   0x1\r
- 297 0107 54                   .byte   0x54\r
- 298 0108 01                   .byte   0x1\r
- 299 0109 6F000000             .4byte  0x6f\r
- 300 010d 00000000             .4byte  .LFB2\r
- 301 0111 10000000             .4byte  .LFE2\r
- 302 0115 02                   .byte   0x2\r
- 303 0116 7D                   .byte   0x7d\r
- 304 0117 00                   .sleb128 0\r
- 305 0118 01                   .byte   0x1\r
- 306 0119 09                   .uleb128 0x9\r
- 307 011a 01                   .byte   0x1\r
- 308 011b 04010000             .4byte  .LASF19\r
- 309 011f 01                   .byte   0x1\r
- 310 0120 68                   .byte   0x68\r
- 311 0121 01                   .byte   0x1\r
- 312 0122 6F000000             .4byte  0x6f\r
- 313 0126 00000000             .4byte  .LFB3\r
- 314 012a 10000000             .4byte  .LFE3\r
- 315 012e 02                   .byte   0x2\r
- 316 012f 7D                   .byte   0x7d\r
- 317 0130 00                   .sleb128 0\r
- 318 0131 01                   .byte   0x1\r
- 319 0132 09                   .uleb128 0x9\r
- 320 0133 01                   .byte   0x1\r
- 321 0134 25000000             .4byte  .LASF20\r
- 322 0138 01                   .byte   0x1\r
- 323 0139 7F                   .byte   0x7f\r
- 324 013a 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 9\r
-\r
-\r
- 325 013b 6F000000             .4byte  0x6f\r
- 326 013f 00000000             .4byte  .LFB4\r
- 327 0143 10000000             .4byte  .LFE4\r
- 328 0147 02                   .byte   0x2\r
- 329 0148 7D                   .byte   0x7d\r
- 330 0149 00                   .sleb128 0\r
- 331 014a 01                   .byte   0x1\r
- 332 014b 00                   .byte   0\r
- 333                           .section        .debug_abbrev,"",%progbits\r
- 334                   .Ldebug_abbrev0:\r
- 335 0000 01                   .uleb128 0x1\r
- 336 0001 11                   .uleb128 0x11\r
- 337 0002 01                   .byte   0x1\r
- 338 0003 25                   .uleb128 0x25\r
- 339 0004 0E                   .uleb128 0xe\r
- 340 0005 13                   .uleb128 0x13\r
- 341 0006 0B                   .uleb128 0xb\r
- 342 0007 03                   .uleb128 0x3\r
- 343 0008 0E                   .uleb128 0xe\r
- 344 0009 1B                   .uleb128 0x1b\r
- 345 000a 0E                   .uleb128 0xe\r
- 346 000b 55                   .uleb128 0x55\r
- 347 000c 06                   .uleb128 0x6\r
- 348 000d 11                   .uleb128 0x11\r
- 349 000e 01                   .uleb128 0x1\r
- 350 000f 52                   .uleb128 0x52\r
- 351 0010 01                   .uleb128 0x1\r
- 352 0011 10                   .uleb128 0x10\r
- 353 0012 06                   .uleb128 0x6\r
- 354 0013 00                   .byte   0\r
- 355 0014 00                   .byte   0\r
- 356 0015 02                   .uleb128 0x2\r
- 357 0016 24                   .uleb128 0x24\r
- 358 0017 00                   .byte   0\r
- 359 0018 0B                   .uleb128 0xb\r
- 360 0019 0B                   .uleb128 0xb\r
- 361 001a 3E                   .uleb128 0x3e\r
- 362 001b 0B                   .uleb128 0xb\r
- 363 001c 03                   .uleb128 0x3\r
- 364 001d 0E                   .uleb128 0xe\r
- 365 001e 00                   .byte   0\r
- 366 001f 00                   .byte   0\r
- 367 0020 03                   .uleb128 0x3\r
- 368 0021 24                   .uleb128 0x24\r
- 369 0022 00                   .byte   0\r
- 370 0023 0B                   .uleb128 0xb\r
- 371 0024 0B                   .uleb128 0xb\r
- 372 0025 3E                   .uleb128 0x3e\r
- 373 0026 0B                   .uleb128 0xb\r
- 374 0027 03                   .uleb128 0x3\r
- 375 0028 08                   .uleb128 0x8\r
- 376 0029 00                   .byte   0\r
- 377 002a 00                   .byte   0\r
- 378 002b 04                   .uleb128 0x4\r
- 379 002c 16                   .uleb128 0x16\r
- 380 002d 00                   .byte   0\r
- 381 002e 03                   .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 10\r
-\r
-\r
- 382 002f 0E                   .uleb128 0xe\r
- 383 0030 3A                   .uleb128 0x3a\r
- 384 0031 0B                   .uleb128 0xb\r
- 385 0032 3B                   .uleb128 0x3b\r
- 386 0033 0B                   .uleb128 0xb\r
- 387 0034 49                   .uleb128 0x49\r
- 388 0035 13                   .uleb128 0x13\r
- 389 0036 00                   .byte   0\r
- 390 0037 00                   .byte   0\r
- 391 0038 05                   .uleb128 0x5\r
- 392 0039 35                   .uleb128 0x35\r
- 393 003a 00                   .byte   0\r
- 394 003b 49                   .uleb128 0x49\r
- 395 003c 13                   .uleb128 0x13\r
- 396 003d 00                   .byte   0\r
- 397 003e 00                   .byte   0\r
- 398 003f 06                   .uleb128 0x6\r
- 399 0040 2E                   .uleb128 0x2e\r
- 400 0041 01                   .byte   0x1\r
- 401 0042 3F                   .uleb128 0x3f\r
- 402 0043 0C                   .uleb128 0xc\r
- 403 0044 03                   .uleb128 0x3\r
- 404 0045 0E                   .uleb128 0xe\r
- 405 0046 3A                   .uleb128 0x3a\r
- 406 0047 0B                   .uleb128 0xb\r
- 407 0048 3B                   .uleb128 0x3b\r
- 408 0049 0B                   .uleb128 0xb\r
- 409 004a 27                   .uleb128 0x27\r
- 410 004b 0C                   .uleb128 0xc\r
- 411 004c 11                   .uleb128 0x11\r
- 412 004d 01                   .uleb128 0x1\r
- 413 004e 12                   .uleb128 0x12\r
- 414 004f 01                   .uleb128 0x1\r
- 415 0050 40                   .uleb128 0x40\r
- 416 0051 0A                   .uleb128 0xa\r
- 417 0052 9742                 .uleb128 0x2117\r
- 418 0054 0C                   .uleb128 0xc\r
- 419 0055 01                   .uleb128 0x1\r
- 420 0056 13                   .uleb128 0x13\r
- 421 0057 00                   .byte   0\r
- 422 0058 00                   .byte   0\r
- 423 0059 07                   .uleb128 0x7\r
- 424 005a 05                   .uleb128 0x5\r
- 425 005b 00                   .byte   0\r
- 426 005c 03                   .uleb128 0x3\r
- 427 005d 0E                   .uleb128 0xe\r
- 428 005e 3A                   .uleb128 0x3a\r
- 429 005f 0B                   .uleb128 0xb\r
- 430 0060 3B                   .uleb128 0x3b\r
- 431 0061 0B                   .uleb128 0xb\r
- 432 0062 49                   .uleb128 0x49\r
- 433 0063 13                   .uleb128 0x13\r
- 434 0064 02                   .uleb128 0x2\r
- 435 0065 06                   .uleb128 0x6\r
- 436 0066 00                   .byte   0\r
- 437 0067 00                   .byte   0\r
- 438 0068 08                   .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 11\r
-\r
-\r
- 439 0069 34                   .uleb128 0x34\r
- 440 006a 00                   .byte   0\r
- 441 006b 03                   .uleb128 0x3\r
- 442 006c 0E                   .uleb128 0xe\r
- 443 006d 3A                   .uleb128 0x3a\r
- 444 006e 0B                   .uleb128 0xb\r
- 445 006f 3B                   .uleb128 0x3b\r
- 446 0070 0B                   .uleb128 0xb\r
- 447 0071 49                   .uleb128 0x49\r
- 448 0072 13                   .uleb128 0x13\r
- 449 0073 02                   .uleb128 0x2\r
- 450 0074 06                   .uleb128 0x6\r
- 451 0075 00                   .byte   0\r
- 452 0076 00                   .byte   0\r
- 453 0077 09                   .uleb128 0x9\r
- 454 0078 2E                   .uleb128 0x2e\r
- 455 0079 00                   .byte   0\r
- 456 007a 3F                   .uleb128 0x3f\r
- 457 007b 0C                   .uleb128 0xc\r
- 458 007c 03                   .uleb128 0x3\r
- 459 007d 0E                   .uleb128 0xe\r
- 460 007e 3A                   .uleb128 0x3a\r
- 461 007f 0B                   .uleb128 0xb\r
- 462 0080 3B                   .uleb128 0x3b\r
- 463 0081 0B                   .uleb128 0xb\r
- 464 0082 27                   .uleb128 0x27\r
- 465 0083 0C                   .uleb128 0xc\r
- 466 0084 49                   .uleb128 0x49\r
- 467 0085 13                   .uleb128 0x13\r
- 468 0086 11                   .uleb128 0x11\r
- 469 0087 01                   .uleb128 0x1\r
- 470 0088 12                   .uleb128 0x12\r
- 471 0089 01                   .uleb128 0x1\r
- 472 008a 40                   .uleb128 0x40\r
- 473 008b 0A                   .uleb128 0xa\r
- 474 008c 9742                 .uleb128 0x2117\r
- 475 008e 0C                   .uleb128 0xc\r
- 476 008f 00                   .byte   0\r
- 477 0090 00                   .byte   0\r
- 478 0091 00                   .byte   0\r
- 479                           .section        .debug_loc,"",%progbits\r
- 480                   .Ldebug_loc0:\r
- 481                   .LLST0:\r
- 482 0000 00000000             .4byte  .LVL0\r
- 483 0004 04000000             .4byte  .LVL1\r
- 484 0008 0100                 .2byte  0x1\r
- 485 000a 50                   .byte   0x50\r
- 486 000b 04000000             .4byte  .LVL1\r
- 487 000f 1C000000             .4byte  .LFE0\r
- 488 0013 0400                 .2byte  0x4\r
- 489 0015 F3                   .byte   0xf3\r
- 490 0016 01                   .uleb128 0x1\r
- 491 0017 50                   .byte   0x50\r
- 492 0018 9F                   .byte   0x9f\r
- 493 0019 00000000             .4byte  0\r
- 494 001d 00000000             .4byte  0\r
- 495                   .LLST1:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 12\r
-\r
-\r
- 496 0021 06000000             .4byte  .LVL2\r
- 497 0025 0E000000             .4byte  .LVL3\r
- 498 0029 0600                 .2byte  0x6\r
- 499 002b 72                   .byte   0x72\r
- 500 002c 00                   .sleb128 0\r
- 501 002d 09                   .byte   0x9\r
- 502 002e BF                   .byte   0xbf\r
- 503 002f 1A                   .byte   0x1a\r
- 504 0030 9F                   .byte   0x9f\r
- 505 0031 00000000             .4byte  0\r
- 506 0035 00000000             .4byte  0\r
- 507                   .LLST2:\r
- 508 0039 00000000             .4byte  .LVL4\r
- 509 003d 06000000             .4byte  .LVL5\r
- 510 0041 0100                 .2byte  0x1\r
- 511 0043 50                   .byte   0x50\r
- 512 0044 06000000             .4byte  .LVL5\r
- 513 0048 18000000             .4byte  .LFE1\r
- 514 004c 0400                 .2byte  0x4\r
- 515 004e F3                   .byte   0xf3\r
- 516 004f 01                   .uleb128 0x1\r
- 517 0050 50                   .byte   0x50\r
- 518 0051 9F                   .byte   0x9f\r
- 519 0052 00000000             .4byte  0\r
- 520 0056 00000000             .4byte  0\r
- 521                           .section        .debug_aranges,"",%progbits\r
- 522 0000 3C000000             .4byte  0x3c\r
- 523 0004 0200                 .2byte  0x2\r
- 524 0006 00000000             .4byte  .Ldebug_info0\r
- 525 000a 04                   .byte   0x4\r
- 526 000b 00                   .byte   0\r
- 527 000c 0000                 .2byte  0\r
- 528 000e 0000                 .2byte  0\r
- 529 0010 00000000             .4byte  .LFB0\r
- 530 0014 1C000000             .4byte  .LFE0-.LFB0\r
- 531 0018 00000000             .4byte  .LFB1\r
- 532 001c 18000000             .4byte  .LFE1-.LFB1\r
- 533 0020 00000000             .4byte  .LFB2\r
- 534 0024 10000000             .4byte  .LFE2-.LFB2\r
- 535 0028 00000000             .4byte  .LFB3\r
- 536 002c 10000000             .4byte  .LFE3-.LFB3\r
- 537 0030 00000000             .4byte  .LFB4\r
- 538 0034 10000000             .4byte  .LFE4-.LFB4\r
- 539 0038 00000000             .4byte  0\r
- 540 003c 00000000             .4byte  0\r
- 541                           .section        .debug_ranges,"",%progbits\r
- 542                   .Ldebug_ranges0:\r
- 543 0000 00000000             .4byte  .LFB0\r
- 544 0004 1C000000             .4byte  .LFE0\r
- 545 0008 00000000             .4byte  .LFB1\r
- 546 000c 18000000             .4byte  .LFE1\r
- 547 0010 00000000             .4byte  .LFB2\r
- 548 0014 10000000             .4byte  .LFE2\r
- 549 0018 00000000             .4byte  .LFB3\r
- 550 001c 10000000             .4byte  .LFE3\r
- 551 0020 00000000             .4byte  .LFB4\r
- 552 0024 10000000             .4byte  .LFE4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 13\r
-\r
-\r
- 553 0028 00000000             .4byte  0\r
- 554 002c 00000000             .4byte  0\r
- 555                           .section        .debug_line,"",%progbits\r
- 556                   .Ldebug_line0:\r
- 557 0000 A8000000             .section        .debug_str,"MS",%progbits,1\r
- 557      02004700 \r
- 557      00000201 \r
- 557      FB0E0D00 \r
- 557      01010101 \r
- 558                   .LASF16:\r
- 559 0000 76616C75             .ascii  "value\000"\r
- 559      6500\r
- 560                   .LASF18:\r
- 561 0006 55534246             .ascii  "USBFS_Dp_Read\000"\r
- 561      535F4470 \r
- 561      5F526561 \r
- 561      6400\r
- 562                   .LASF24:\r
- 563 0014 73746174             .ascii  "staticBits\000"\r
- 563      69634269 \r
- 563      747300\r
- 564                   .LASF9:\r
- 565 001f 666C6F61             .ascii  "float\000"\r
- 565      7400\r
- 566                   .LASF20:\r
- 567 0025 55534246             .ascii  "USBFS_Dp_ClearInterrupt\000"\r
- 567      535F4470 \r
- 567      5F436C65 \r
- 567      6172496E \r
- 567      74657272 \r
- 568                   .LASF1:\r
- 569 003d 756E7369             .ascii  "unsigned char\000"\r
- 569      676E6564 \r
- 569      20636861 \r
- 569      7200\r
- 570                   .LASF13:\r
- 571 004b 72656738             .ascii  "reg8\000"\r
- 571      00\r
- 572                   .LASF5:\r
- 573 0050 6C6F6E67             .ascii  "long unsigned int\000"\r
- 573      20756E73 \r
- 573      69676E65 \r
- 573      6420696E \r
- 573      7400\r
- 574                   .LASF23:\r
- 575 0062 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 575      43534932 \r
- 575      53445C73 \r
- 575      6F667477 \r
- 575      6172655C \r
- 576 0091 6E00                 .ascii  "n\000"\r
- 577                   .LASF3:\r
- 578 0093 73686F72             .ascii  "short unsigned int\000"\r
- 578      7420756E \r
- 578      7369676E \r
- 578      65642069 \r
- 578      6E7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 14\r
-\r
-\r
- 579                   .LASF10:\r
- 580 00a6 646F7562             .ascii  "double\000"\r
- 580      6C6500\r
- 581                   .LASF22:\r
- 582 00ad 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_Dp.c\000"\r
- 582      6E657261 \r
- 582      7465645F \r
- 582      536F7572 \r
- 582      63655C50 \r
- 583                   .LASF14:\r
- 584 00d1 55534246             .ascii  "USBFS_Dp_Write\000"\r
- 584      535F4470 \r
- 584      5F577269 \r
- 584      746500\r
- 585                   .LASF8:\r
- 586 00e0 756E7369             .ascii  "unsigned int\000"\r
- 586      676E6564 \r
- 586      20696E74 \r
- 586      00\r
- 587                   .LASF7:\r
- 588 00ed 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 588      206C6F6E \r
- 588      6720756E \r
- 588      7369676E \r
- 588      65642069 \r
- 589                   .LASF19:\r
- 590 0104 55534246             .ascii  "USBFS_Dp_ReadDataReg\000"\r
- 590      535F4470 \r
- 590      5F526561 \r
- 590      64446174 \r
- 590      61526567 \r
- 591                   .LASF17:\r
- 592 0119 6D6F6465             .ascii  "mode\000"\r
- 592      00\r
- 593                   .LASF6:\r
- 594 011e 6C6F6E67             .ascii  "long long int\000"\r
- 594      206C6F6E \r
- 594      6720696E \r
- 594      7400\r
- 595                   .LASF11:\r
- 596 012c 63686172             .ascii  "char\000"\r
- 596      00\r
- 597                   .LASF2:\r
- 598 0131 73686F72             .ascii  "short int\000"\r
- 598      7420696E \r
- 598      7400\r
- 599                   .LASF12:\r
- 600 013b 75696E74             .ascii  "uint8\000"\r
- 600      3800\r
- 601                   .LASF21:\r
- 602 0141 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 602      4320342E \r
- 602      372E3320 \r
- 602      32303133 \r
- 602      30333132 \r
- 603 0174 616E6368             .ascii  "anch revision 196615]\000"\r
- 603      20726576 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccENAnU1.s                      page 15\r
-\r
-\r
- 603      6973696F \r
- 603      6E203139 \r
- 603      36363135 \r
- 604                   .LASF4:\r
- 605 018a 6C6F6E67             .ascii  "long int\000"\r
- 605      20696E74 \r
- 605      00\r
- 606                   .LASF15:\r
- 607 0193 55534246             .ascii  "USBFS_Dp_SetDriveMode\000"\r
- 607      535F4470 \r
- 607      5F536574 \r
- 607      44726976 \r
- 607      654D6F64 \r
- 608                   .LASF0:\r
- 609 01a9 7369676E             .ascii  "signed char\000"\r
- 609      65642063 \r
- 609      68617200 \r
- 610                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.o
deleted file mode 100755 (executable)
index 00aec85..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_Dp.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.lst
deleted file mode 100755 (executable)
index 8c0639f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.lst
+++ /dev/null
@@ -1,239 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNAvcMf.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_audio.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                   .Letext0:\r
-  19                           .section        .debug_info,"",%progbits\r
-  20                   .Ldebug_info0:\r
-  21 0000 7C000000             .4byte  0x7c\r
-  22 0004 0200                 .2byte  0x2\r
-  23 0006 00000000             .4byte  .Ldebug_abbrev0\r
-  24 000a 04                   .byte   0x4\r
-  25 000b 01                   .uleb128 0x1\r
-  26 000c 1B000000             .4byte  .LASF13\r
-  27 0010 01                   .byte   0x1\r
-  28 0011 8D000000             .4byte  .LASF14\r
-  29 0015 06010000             .4byte  .LASF15\r
-  30 0019 00000000             .4byte  .Ldebug_line0\r
-  31 001d 02                   .uleb128 0x2\r
-  32 001e 01                   .byte   0x1\r
-  33 001f 06                   .byte   0x6\r
-  34 0020 EA000000             .4byte  .LASF0\r
-  35 0024 02                   .uleb128 0x2\r
-  36 0025 01                   .byte   0x1\r
-  37 0026 08                   .byte   0x8\r
-  38 0027 B4000000             .4byte  .LASF1\r
-  39 002b 02                   .uleb128 0x2\r
-  40 002c 02                   .byte   0x2\r
-  41 002d 05                   .byte   0x5\r
-  42 002e FC000000             .4byte  .LASF2\r
-  43 0032 02                   .uleb128 0x2\r
-  44 0033 02                   .byte   0x2\r
-  45 0034 07                   .byte   0x7\r
-  46 0035 D7000000             .4byte  .LASF3\r
-  47 0039 02                   .uleb128 0x2\r
-  48 003a 04                   .byte   0x4\r
-  49 003b 05                   .byte   0x5\r
-  50 003c C7000000             .4byte  .LASF4\r
-  51 0040 02                   .uleb128 0x2\r
-  52 0041 04                   .byte   0x4\r
-  53 0042 07                   .byte   0x7\r
-  54 0043 64000000             .4byte  .LASF5\r
-  55 0047 02                   .uleb128 0x2\r
-  56 0048 08                   .byte   0x8\r
-  57 0049 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNAvcMf.s                      page 2\r
-\r
-\r
-  58 004a 00000000             .4byte  .LASF6\r
-  59 004e 02                   .uleb128 0x2\r
-  60 004f 08                   .byte   0x8\r
-  61 0050 07                   .byte   0x7\r
-  62 0051 76000000             .4byte  .LASF7\r
-  63 0055 03                   .uleb128 0x3\r
-  64 0056 04                   .byte   0x4\r
-  65 0057 05                   .byte   0x5\r
-  66 0058 696E7400             .ascii  "int\000"\r
-  67 005c 02                   .uleb128 0x2\r
-  68 005d 04                   .byte   0x4\r
-  69 005e 07                   .byte   0x7\r
-  70 005f 0E000000             .4byte  .LASF8\r
-  71 0063 02                   .uleb128 0x2\r
-  72 0064 04                   .byte   0x4\r
-  73 0065 04                   .byte   0x4\r
-  74 0066 F6000000             .4byte  .LASF9\r
-  75 006a 02                   .uleb128 0x2\r
-  76 006b 08                   .byte   0x8\r
-  77 006c 04                   .byte   0x4\r
-  78 006d D0000000             .4byte  .LASF10\r
-  79 0071 02                   .uleb128 0x2\r
-  80 0072 01                   .byte   0x1\r
-  81 0073 08                   .byte   0x8\r
-  82 0074 C2000000             .4byte  .LASF11\r
-  83 0078 02                   .uleb128 0x2\r
-  84 0079 04                   .byte   0x4\r
-  85 007a 07                   .byte   0x7\r
-  86 007b 37010000             .4byte  .LASF12\r
-  87 007f 00                   .byte   0\r
-  88                           .section        .debug_abbrev,"",%progbits\r
-  89                   .Ldebug_abbrev0:\r
-  90 0000 01                   .uleb128 0x1\r
-  91 0001 11                   .uleb128 0x11\r
-  92 0002 01                   .byte   0x1\r
-  93 0003 25                   .uleb128 0x25\r
-  94 0004 0E                   .uleb128 0xe\r
-  95 0005 13                   .uleb128 0x13\r
-  96 0006 0B                   .uleb128 0xb\r
-  97 0007 03                   .uleb128 0x3\r
-  98 0008 0E                   .uleb128 0xe\r
-  99 0009 1B                   .uleb128 0x1b\r
- 100 000a 0E                   .uleb128 0xe\r
- 101 000b 10                   .uleb128 0x10\r
- 102 000c 06                   .uleb128 0x6\r
- 103 000d 00                   .byte   0\r
- 104 000e 00                   .byte   0\r
- 105 000f 02                   .uleb128 0x2\r
- 106 0010 24                   .uleb128 0x24\r
- 107 0011 00                   .byte   0\r
- 108 0012 0B                   .uleb128 0xb\r
- 109 0013 0B                   .uleb128 0xb\r
- 110 0014 3E                   .uleb128 0x3e\r
- 111 0015 0B                   .uleb128 0xb\r
- 112 0016 03                   .uleb128 0x3\r
- 113 0017 0E                   .uleb128 0xe\r
- 114 0018 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNAvcMf.s                      page 3\r
-\r
-\r
- 115 0019 00                   .byte   0\r
- 116 001a 03                   .uleb128 0x3\r
- 117 001b 24                   .uleb128 0x24\r
- 118 001c 00                   .byte   0\r
- 119 001d 0B                   .uleb128 0xb\r
- 120 001e 0B                   .uleb128 0xb\r
- 121 001f 3E                   .uleb128 0x3e\r
- 122 0020 0B                   .uleb128 0xb\r
- 123 0021 03                   .uleb128 0x3\r
- 124 0022 08                   .uleb128 0x8\r
- 125 0023 00                   .byte   0\r
- 126 0024 00                   .byte   0\r
- 127 0025 00                   .byte   0\r
- 128                           .section        .debug_aranges,"",%progbits\r
- 129 0000 14000000             .4byte  0x14\r
- 130 0004 0200                 .2byte  0x2\r
- 131 0006 00000000             .4byte  .Ldebug_info0\r
- 132 000a 04                   .byte   0x4\r
- 133 000b 00                   .byte   0\r
- 134 000c 0000                 .2byte  0\r
- 135 000e 0000                 .2byte  0\r
- 136 0010 00000000             .4byte  0\r
- 137 0014 00000000             .4byte  0\r
- 138                           .section        .debug_line,"",%progbits\r
- 139                   .Ldebug_line0:\r
- 140 0000 19000000             .section        .debug_str,"MS",%progbits,1\r
- 140      02001300 \r
- 140      00000201 \r
- 140      FB0E0D00 \r
- 140      01010101 \r
- 141                   .LASF6:\r
- 142 0000 6C6F6E67             .ascii  "long long int\000"\r
- 142      206C6F6E \r
- 142      6720696E \r
- 142      7400\r
- 143                   .LASF8:\r
- 144 000e 756E7369             .ascii  "unsigned int\000"\r
- 144      676E6564 \r
- 144      20696E74 \r
- 144      00\r
- 145                   .LASF13:\r
- 146 001b 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 146      4320342E \r
- 146      372E3320 \r
- 146      32303133 \r
- 146      30333132 \r
- 147 004e 616E6368             .ascii  "anch revision 196615]\000"\r
- 147      20726576 \r
- 147      6973696F \r
- 147      6E203139 \r
- 147      36363135 \r
- 148                   .LASF5:\r
- 149 0064 6C6F6E67             .ascii  "long unsigned int\000"\r
- 149      20756E73 \r
- 149      69676E65 \r
- 149      6420696E \r
- 149      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccNAvcMf.s                      page 4\r
-\r
-\r
- 150                   .LASF7:\r
- 151 0076 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 151      206C6F6E \r
- 151      6720756E \r
- 151      7369676E \r
- 151      65642069 \r
- 152                   .LASF14:\r
- 153 008d 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_audio.c\000"\r
- 153      6E657261 \r
- 153      7465645F \r
- 153      536F7572 \r
- 153      63655C50 \r
- 154                   .LASF1:\r
- 155 00b4 756E7369             .ascii  "unsigned char\000"\r
- 155      676E6564 \r
- 155      20636861 \r
- 155      7200\r
- 156                   .LASF11:\r
- 157 00c2 63686172             .ascii  "char\000"\r
- 157      00\r
- 158                   .LASF4:\r
- 159 00c7 6C6F6E67             .ascii  "long int\000"\r
- 159      20696E74 \r
- 159      00\r
- 160                   .LASF10:\r
- 161 00d0 646F7562             .ascii  "double\000"\r
- 161      6C6500\r
- 162                   .LASF3:\r
- 163 00d7 73686F72             .ascii  "short unsigned int\000"\r
- 163      7420756E \r
- 163      7369676E \r
- 163      65642069 \r
- 163      6E7400\r
- 164                   .LASF0:\r
- 165 00ea 7369676E             .ascii  "signed char\000"\r
- 165      65642063 \r
- 165      68617200 \r
- 166                   .LASF9:\r
- 167 00f6 666C6F61             .ascii  "float\000"\r
- 167      7400\r
- 168                   .LASF2:\r
- 169 00fc 73686F72             .ascii  "short int\000"\r
- 169      7420696E \r
- 169      7400\r
- 170                   .LASF15:\r
- 171 0106 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 171      43534932 \r
- 171      53445C73 \r
- 171      6F667477 \r
- 171      6172655C \r
- 172 0135 6E00                 .ascii  "n\000"\r
- 173                   .LASF12:\r
- 174 0137 73697A65             .ascii  "sizetype\000"\r
- 174      74797065 \r
- 174      00\r
- 175                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.o
deleted file mode 100755 (executable)
index a597323..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_audio.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.lst
deleted file mode 100755 (executable)
index ea4473f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.lst
+++ /dev/null
@@ -1,2211 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_boot.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_CyBtldrCommStart,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_CyBtldrCommStart\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_CyBtldrCommStart, %function\r
-  24                   USBFS_CyBtldrCommStart:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_boot.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_boot.c **** * File Name: USBFS_boot.c\r
-   3:.\Generated_Source\PSoC5/USBFS_boot.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_boot.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Boot loader API for USBFS Component.\r
-   7:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_boot.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_boot.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_boot.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_boot.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_boot.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  19:.\Generated_Source\PSoC5/USBFS_boot.c **** #if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS) || \\r
-  20:.\Generated_Source\PSoC5/USBFS_boot.c ****                                           (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))\r
-  21:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  22:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  23:.\Generated_Source\PSoC5/USBFS_boot.c **** /***************************************\r
-  24:.\Generated_Source\PSoC5/USBFS_boot.c **** *    Bootloader defines\r
-  25:.\Generated_Source\PSoC5/USBFS_boot.c **** ***************************************/\r
-  26:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  27:.\Generated_Source\PSoC5/USBFS_boot.c **** #define USBFS_CyBtLdrStarttimer(X, T)         {USBFS_universalTime = T * 10; X = 0u;}\r
-  28:.\Generated_Source\PSoC5/USBFS_boot.c **** #define USBFS_CyBtLdrChecktimer(X)            ((X++ < USBFS_universalTime) ? 1u : 0u)\r
-  29:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  30:.\Generated_Source\PSoC5/USBFS_boot.c **** #define USBFS_BTLDR_OUT_EP      (0x01u)\r
-  31:.\Generated_Source\PSoC5/USBFS_boot.c **** #define USBFS_BTLDR_IN_EP       (0x02u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  33:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  34:.\Generated_Source\PSoC5/USBFS_boot.c **** /***************************************\r
-  35:.\Generated_Source\PSoC5/USBFS_boot.c **** *    Bootloader Variables\r
-  36:.\Generated_Source\PSoC5/USBFS_boot.c **** ***************************************/\r
-  37:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  38:.\Generated_Source\PSoC5/USBFS_boot.c **** static uint16 USBFS_universalTime;\r
-  39:.\Generated_Source\PSoC5/USBFS_boot.c **** static uint8 USBFS_started = 0u;\r
-  40:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  41:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  42:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
-  43:.\Generated_Source\PSoC5/USBFS_boot.c **** * Function Name: USBFS_CyBtldrCommStart\r
-  44:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
-  45:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  46:.\Generated_Source\PSoC5/USBFS_boot.c **** * Summary:\r
-  47:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Starts the component and enables the interrupt.\r
-  48:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  49:.\Generated_Source\PSoC5/USBFS_boot.c **** * Parameters:\r
-  50:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
-  51:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  52:.\Generated_Source\PSoC5/USBFS_boot.c **** * Return:\r
-  53:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
-  54:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  55:.\Generated_Source\PSoC5/USBFS_boot.c **** * Side Effects:\r
-  56:.\Generated_Source\PSoC5/USBFS_boot.c **** *  This function starts the USB with 3V or 5V operation.\r
-  57:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  58:.\Generated_Source\PSoC5/USBFS_boot.c **** * Reentrant:\r
-  59:.\Generated_Source\PSoC5/USBFS_boot.c **** *  No.\r
-  60:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  61:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
-  62:.\Generated_Source\PSoC5/USBFS_boot.c **** void USBFS_CyBtldrCommStart(void) \r
-  63:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
-  27                           .loc 1 63 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31 0000 08B5                 push    {r3, lr}\r
-  32                   .LCFI0:\r
-  33                           .cfi_def_cfa_offset 8\r
-  34                           .cfi_offset 3, -8\r
-  35                           .cfi_offset 14, -4\r
-  64:.\Generated_Source\PSoC5/USBFS_boot.c ****     CyGlobalIntEnable;      /* Enable Global Interrupts */\r
-  36                           .loc 1 64 0\r
-  37                   @ 64 ".\Generated_Source\PSoC5\USBFS_boot.c" 1\r
-  38 0002 62B6                 CPSIE   i\r
-  39                   @ 0 "" 2\r
-  65:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  66:.\Generated_Source\PSoC5/USBFS_boot.c ****     /*Start USBFS Operation/device 0 and with 5V or 3V operation depend on Voltage Configuration in\r
-  67:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_Start(0u, USBFS_DWR_VDDD_OPERATION);\r
-  40                           .loc 1 67 0\r
-  41                           .thumb\r
-  42 0004 0020                 movs    r0, #0\r
-  43 0006 0221                 movs    r1, #2\r
-  44 0008 FFF7FEFF             bl      USBFS_Start\r
-  45                   .LVL0:\r
-  68:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  69:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* USB component started, the correct enumeration will be checked in first Read operation */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 3\r
-\r
-\r
-  70:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_started = 1u;\r
-  46                           .loc 1 70 0\r
-  47 000c 014B                 ldr     r3, .L2\r
-  48 000e 0122                 movs    r2, #1\r
-  49 0010 1A70                 strb    r2, [r3, #0]\r
-  50 0012 08BD                 pop     {r3, pc}\r
-  51                   .L3:\r
-  52                           .align  2\r
-  53                   .L2:\r
-  54 0014 00000000             .word   .LANCHOR0\r
-  55                           .cfi_endproc\r
-  56                   .LFE0:\r
-  57                           .size   USBFS_CyBtldrCommStart, .-USBFS_CyBtldrCommStart\r
-  58                           .section        .text.USBFS_CyBtldrCommStop,"ax",%progbits\r
-  59                           .align  1\r
-  60                           .global USBFS_CyBtldrCommStop\r
-  61                           .thumb\r
-  62                           .thumb_func\r
-  63                           .type   USBFS_CyBtldrCommStop, %function\r
-  64                   USBFS_CyBtldrCommStop:\r
-  65                   .LFB1:\r
-  71:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  72:.\Generated_Source\PSoC5/USBFS_boot.c **** }\r
-  73:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  74:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  75:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
-  76:.\Generated_Source\PSoC5/USBFS_boot.c **** * Function Name: USBFS_CyBtldrCommStop.\r
-  77:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
-  78:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  79:.\Generated_Source\PSoC5/USBFS_boot.c **** * Summary:\r
-  80:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Disable the component and disable the interrupt.\r
-  81:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  82:.\Generated_Source\PSoC5/USBFS_boot.c **** * Parameters:\r
-  83:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
-  84:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  85:.\Generated_Source\PSoC5/USBFS_boot.c **** * Return:\r
-  86:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
-  87:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  88:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
-  89:.\Generated_Source\PSoC5/USBFS_boot.c **** void USBFS_CyBtldrCommStop(void) \r
-  90:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
-  66                           .loc 1 90 0\r
-  67                           .cfi_startproc\r
-  68                           @ args = 0, pretend = 0, frame = 0\r
-  69                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  70                           @ link register save eliminated.\r
-  91:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_Stop();\r
-  92:.\Generated_Source\PSoC5/USBFS_boot.c **** }\r
-  71                           .loc 1 92 0\r
-  91:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_Stop();\r
-  72                           .loc 1 91 0\r
-  73 0000 FFF7FEBF             b       USBFS_Stop\r
-  74                   .LVL1:\r
-  75                           .cfi_endproc\r
-  76                   .LFE1:\r
-  77                           .size   USBFS_CyBtldrCommStop, .-USBFS_CyBtldrCommStop\r
-  78                           .section        .text.USBFS_CyBtldrCommReset,"ax",%progbits\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 4\r
-\r
-\r
-  79                           .align  1\r
-  80                           .global USBFS_CyBtldrCommReset\r
-  81                           .thumb\r
-  82                           .thumb_func\r
-  83                           .type   USBFS_CyBtldrCommReset, %function\r
-  84                   USBFS_CyBtldrCommReset:\r
-  85                   .LFB2:\r
-  93:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  94:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
-  95:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
-  96:.\Generated_Source\PSoC5/USBFS_boot.c **** * Function Name: USBFS_CyBtldrCommReset.\r
-  97:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
-  98:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
-  99:.\Generated_Source\PSoC5/USBFS_boot.c **** * Summary:\r
- 100:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Resets the receive and transmit communication Buffers.\r
- 101:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 102:.\Generated_Source\PSoC5/USBFS_boot.c **** * Parameters:\r
- 103:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
- 104:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 105:.\Generated_Source\PSoC5/USBFS_boot.c **** * Return:\r
- 106:.\Generated_Source\PSoC5/USBFS_boot.c **** *  None.\r
- 107:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 108:.\Generated_Source\PSoC5/USBFS_boot.c **** * Reentrant:\r
- 109:.\Generated_Source\PSoC5/USBFS_boot.c **** *  No.\r
- 110:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 111:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
- 112:.\Generated_Source\PSoC5/USBFS_boot.c **** void USBFS_CyBtldrCommReset(void) \r
- 113:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
-  86                           .loc 1 113 0\r
-  87                           .cfi_startproc\r
-  88                           @ args = 0, pretend = 0, frame = 0\r
-  89                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  90                           @ link register save eliminated.\r
- 114:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_EnableOutEP(USBFS_BTLDR_OUT_EP);  /* Enable the OUT endpoint */\r
-  91                           .loc 1 114 0\r
-  92 0000 0120                 movs    r0, #1\r
- 115:.\Generated_Source\PSoC5/USBFS_boot.c **** }\r
-  93                           .loc 1 115 0\r
- 114:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_EnableOutEP(USBFS_BTLDR_OUT_EP);  /* Enable the OUT endpoint */\r
-  94                           .loc 1 114 0\r
-  95 0002 FFF7FEBF             b       USBFS_EnableOutEP\r
-  96                   .LVL2:\r
-  97                           .cfi_endproc\r
-  98                   .LFE2:\r
-  99                           .size   USBFS_CyBtldrCommReset, .-USBFS_CyBtldrCommReset\r
- 100                           .section        .text.USBFS_CyBtldrCommWrite,"ax",%progbits\r
- 101                           .align  1\r
- 102                           .global USBFS_CyBtldrCommWrite\r
- 103                           .thumb\r
- 104                           .thumb_func\r
- 105                           .type   USBFS_CyBtldrCommWrite, %function\r
- 106                   USBFS_CyBtldrCommWrite:\r
- 107                   .LFB3:\r
- 116:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 117:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 118:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
- 119:.\Generated_Source\PSoC5/USBFS_boot.c **** * Function Name: USBFS_CyBtldrCommWrite.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 5\r
-\r
-\r
- 120:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
- 121:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 122:.\Generated_Source\PSoC5/USBFS_boot.c **** * Summary:\r
- 123:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Allows the caller to write data to the boot loader host. The function will\r
- 124:.\Generated_Source\PSoC5/USBFS_boot.c **** *  handle polling to allow a block of data to be completely sent to the host\r
- 125:.\Generated_Source\PSoC5/USBFS_boot.c **** *  device.\r
- 126:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 127:.\Generated_Source\PSoC5/USBFS_boot.c **** * Parameters:\r
- 128:.\Generated_Source\PSoC5/USBFS_boot.c **** *  pData:    A pointer to the block of data to send to the device\r
- 129:.\Generated_Source\PSoC5/USBFS_boot.c **** *  size:     The number of bytes to write.\r
- 130:.\Generated_Source\PSoC5/USBFS_boot.c **** *  count:    Pointer to an unsigned short variable to write the number of\r
- 131:.\Generated_Source\PSoC5/USBFS_boot.c **** *             bytes actually written.\r
- 132:.\Generated_Source\PSoC5/USBFS_boot.c **** *  timeOut:  Number of units to wait before returning because of a timeout.\r
- 133:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 134:.\Generated_Source\PSoC5/USBFS_boot.c **** * Return:\r
- 135:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Returns the value that best describes the problem.\r
- 136:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 137:.\Generated_Source\PSoC5/USBFS_boot.c **** * Reentrant:\r
- 138:.\Generated_Source\PSoC5/USBFS_boot.c **** *  No.\r
- 139:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 140:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
- 141:.\Generated_Source\PSoC5/USBFS_boot.c **** cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
- 142:.\Generated_Source\PSoC5/USBFS_boot.c ****                                                             \r
- 143:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 108                           .loc 1 143 0\r
- 109                           .cfi_startproc\r
- 110                           @ args = 0, pretend = 0, frame = 0\r
- 111                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 112                   .LVL3:\r
- 113 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 114                   .LCFI1:\r
- 115                           .cfi_def_cfa_offset 24\r
- 116                           .cfi_offset 3, -24\r
- 117                           .cfi_offset 4, -20\r
- 118                           .cfi_offset 5, -16\r
- 119                           .cfi_offset 6, -12\r
- 120                           .cfi_offset 7, -8\r
- 121                           .cfi_offset 14, -4\r
- 122                           .loc 1 143 0\r
- 123 0002 0746                 mov     r7, r0\r
- 124 0004 0E46                 mov     r6, r1\r
- 144:.\Generated_Source\PSoC5/USBFS_boot.c ****     uint16 time;\r
- 145:.\Generated_Source\PSoC5/USBFS_boot.c ****     cystatus status;\r
- 146:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 147:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Enable IN transfer */\r
- 148:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_LoadInEP(USBFS_BTLDR_IN_EP, pData, USBFS_BTLDR_SIZEOF_READ_BUFFER);\r
- 125                           .loc 1 148 0\r
- 126 0006 0220                 movs    r0, #2\r
- 127                   .LVL4:\r
- 143:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 128                           .loc 1 143 0\r
- 129 0008 1546                 mov     r5, r2\r
- 130                           .loc 1 148 0\r
- 131 000a 3946                 mov     r1, r7\r
- 132                   .LVL5:\r
- 133 000c 4022                 movs    r2, #64\r
- 134                   .LVL6:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 6\r
-\r
-\r
- 143:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 135                           .loc 1 143 0\r
- 136 000e 1C46                 mov     r4, r3\r
- 137                           .loc 1 148 0\r
- 138 0010 FFF7FEFF             bl      USBFS_LoadInEP\r
- 139                   .LVL7:\r
- 149:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 150:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Start a timer to wait on. */\r
- 151:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_CyBtLdrStarttimer(time, timeOut);\r
- 140                           .loc 1 151 0\r
- 141 0014 0A23                 movs    r3, #10\r
- 142 0016 5C43                 muls    r4, r3, r4\r
- 143 0018 0D48                 ldr     r0, .L13\r
- 144 001a 4480                 strh    r4, [r0, #2]    @ movhi\r
- 145                   .LVL8:\r
- 146 001c 0024                 movs    r4, #0\r
- 147                   .LVL9:\r
- 148                   .L7:\r
- 152:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 153:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Wait for the master to read it. */\r
- 154:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) && \\r
- 149                           .loc 1 154 0 discriminator 1\r
- 150 001e 0220                 movs    r0, #2\r
- 151 0020 FFF7FEFF             bl      USBFS_GetEPState\r
- 152                   .LVL10:\r
- 153 0024 50B9                 cbnz    r0, .L8\r
- 154                           .loc 1 154 0 is_stmt 0 discriminator 2\r
- 155 0026 0A49                 ldr     r1, .L13\r
- 155:.\Generated_Source\PSoC5/USBFS_boot.c ****            USBFS_CyBtLdrChecktimer(time))\r
- 156                           .loc 1 155 0 is_stmt 1 discriminator 2\r
- 157 0028 671C                 adds    r7, r4, #1\r
- 154:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) && \\r
- 158                           .loc 1 154 0 discriminator 2\r
- 159 002a 4A88                 ldrh    r2, [r1, #2]\r
- 160                           .loc 1 155 0 discriminator 2\r
- 161 002c BFB2                 uxth    r7, r7\r
- 162                   .LVL11:\r
- 154:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) && \\r
- 163                           .loc 1 154 0 discriminator 2\r
- 164 002e A242                 cmp     r2, r4\r
- 165 0030 04D9                 bls     .L8\r
- 166                   .L9:\r
- 156:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 157:.\Generated_Source\PSoC5/USBFS_boot.c ****         CyDelay(1u); /* 1ms delay */\r
- 167                           .loc 1 157 0\r
- 168 0032 0120                 movs    r0, #1\r
- 169 0034 FFF7FEFF             bl      CyDelay\r
- 170                   .LVL12:\r
- 155:.\Generated_Source\PSoC5/USBFS_boot.c ****            USBFS_CyBtLdrChecktimer(time))\r
- 171                           .loc 1 155 0\r
- 172 0038 3C46                 mov     r4, r7\r
- 173 003a F0E7                 b       .L7\r
- 174                   .LVL13:\r
- 175                   .L8:\r
- 158:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 159:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 160:.\Generated_Source\PSoC5/USBFS_boot.c ****     if (USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 7\r
-\r
-\r
- 176                           .loc 1 160 0\r
- 177 003c 0220                 movs    r0, #2\r
- 178 003e FFF7FEFF             bl      USBFS_GetEPState\r
- 179                   .LVL14:\r
- 180 0042 10B1                 cbz     r0, .L11\r
- 161:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 162:.\Generated_Source\PSoC5/USBFS_boot.c ****         status = CYRET_TIMEOUT;\r
- 163:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 164:.\Generated_Source\PSoC5/USBFS_boot.c ****     else\r
- 165:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 166:.\Generated_Source\PSoC5/USBFS_boot.c ****         *count = size;\r
- 181                           .loc 1 166 0\r
- 182 0044 2E80                 strh    r6, [r5, #0]    @ movhi\r
- 183                   .LVL15:\r
- 167:.\Generated_Source\PSoC5/USBFS_boot.c ****         status = CYRET_SUCCESS;\r
- 184                           .loc 1 167 0\r
- 185 0046 0020                 movs    r0, #0\r
- 186 0048 F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 187                   .LVL16:\r
- 188                   .L11:\r
- 162:.\Generated_Source\PSoC5/USBFS_boot.c ****         status = CYRET_TIMEOUT;\r
- 189                           .loc 1 162 0\r
- 190 004a 1020                 movs    r0, #16\r
- 191                   .LVL17:\r
- 168:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 169:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 170:.\Generated_Source\PSoC5/USBFS_boot.c ****     return(status);\r
- 171:.\Generated_Source\PSoC5/USBFS_boot.c **** }\r
- 192                           .loc 1 171 0\r
- 193 004c F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 194                   .L14:\r
- 195 004e 00BF                 .align  2\r
- 196                   .L13:\r
- 197 0050 00000000             .word   .LANCHOR0\r
- 198                           .cfi_endproc\r
- 199                   .LFE3:\r
- 200                           .size   USBFS_CyBtldrCommWrite, .-USBFS_CyBtldrCommWrite\r
- 201                           .section        .text.USBFS_CyBtldrCommRead,"ax",%progbits\r
- 202                           .align  1\r
- 203                           .global USBFS_CyBtldrCommRead\r
- 204                           .thumb\r
- 205                           .thumb_func\r
- 206                           .type   USBFS_CyBtldrCommRead, %function\r
- 207                   USBFS_CyBtldrCommRead:\r
- 208                   .LFB4:\r
- 172:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 173:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 174:.\Generated_Source\PSoC5/USBFS_boot.c **** /*******************************************************************************\r
- 175:.\Generated_Source\PSoC5/USBFS_boot.c **** * Function Name: USBFS_CyBtldrCommRead.\r
- 176:.\Generated_Source\PSoC5/USBFS_boot.c **** ********************************************************************************\r
- 177:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 178:.\Generated_Source\PSoC5/USBFS_boot.c **** * Summary:\r
- 179:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Allows the caller to read data from the boot loader host. The function will\r
- 180:.\Generated_Source\PSoC5/USBFS_boot.c **** *  handle polling to allow a block of data to be completely received from the\r
- 181:.\Generated_Source\PSoC5/USBFS_boot.c **** *  host device.\r
- 182:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 183:.\Generated_Source\PSoC5/USBFS_boot.c **** * Parameters:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 8\r
-\r
-\r
- 184:.\Generated_Source\PSoC5/USBFS_boot.c **** *  pData:    A pointer to the area to store the block of data received\r
- 185:.\Generated_Source\PSoC5/USBFS_boot.c **** *             from the device.\r
- 186:.\Generated_Source\PSoC5/USBFS_boot.c **** *  size:     The number of bytes to read.\r
- 187:.\Generated_Source\PSoC5/USBFS_boot.c **** *  count:    Pointer to an unsigned short variable to write the number\r
- 188:.\Generated_Source\PSoC5/USBFS_boot.c **** *             of bytes actually read.\r
- 189:.\Generated_Source\PSoC5/USBFS_boot.c **** *  timeOut:  Number of units to wait before returning because of a timeOut.\r
- 190:.\Generated_Source\PSoC5/USBFS_boot.c **** *            Timeout is measured in 10s of ms.\r
- 191:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 192:.\Generated_Source\PSoC5/USBFS_boot.c **** * Return:\r
- 193:.\Generated_Source\PSoC5/USBFS_boot.c **** *  Returns the value that best describes the problem.\r
- 194:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 195:.\Generated_Source\PSoC5/USBFS_boot.c **** * Reentrant:\r
- 196:.\Generated_Source\PSoC5/USBFS_boot.c **** *  No.\r
- 197:.\Generated_Source\PSoC5/USBFS_boot.c **** *\r
- 198:.\Generated_Source\PSoC5/USBFS_boot.c **** *******************************************************************************/\r
- 199:.\Generated_Source\PSoC5/USBFS_boot.c **** cystatus USBFS_CyBtldrCommRead(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
- 200:.\Generated_Source\PSoC5/USBFS_boot.c ****                                                             \r
- 201:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 209                           .loc 1 201 0\r
- 210                           .cfi_startproc\r
- 211                           @ args = 0, pretend = 0, frame = 0\r
- 212                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 213                   .LVL18:\r
- 214 0000 2DE9F041             push    {r4, r5, r6, r7, r8, lr}\r
- 215                   .LCFI2:\r
- 216                           .cfi_def_cfa_offset 24\r
- 217                           .cfi_offset 4, -24\r
- 218                           .cfi_offset 5, -20\r
- 219                           .cfi_offset 6, -16\r
- 220                           .cfi_offset 7, -12\r
- 221                           .cfi_offset 8, -8\r
- 222                           .cfi_offset 14, -4\r
- 223                           .loc 1 201 0\r
- 224 0004 1546                 mov     r5, r2\r
- 202:.\Generated_Source\PSoC5/USBFS_boot.c ****     cystatus status;\r
- 203:.\Generated_Source\PSoC5/USBFS_boot.c ****     uint16 time;\r
- 204:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 205:.\Generated_Source\PSoC5/USBFS_boot.c ****     if(size > USBFS_BTLDR_SIZEOF_WRITE_BUFFER)\r
- 206:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 207:.\Generated_Source\PSoC5/USBFS_boot.c ****         size = USBFS_BTLDR_SIZEOF_WRITE_BUFFER;\r
- 208:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 209:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Start a timer to wait on. */\r
- 210:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_CyBtLdrStarttimer(time, timeOut);\r
- 225                           .loc 1 210 0\r
- 226 0006 0A22                 movs    r2, #10\r
- 227                   .LVL19:\r
- 228 0008 5343                 muls    r3, r2, r3\r
- 229                   .LVL20:\r
- 230 000a 284C                 ldr     r4, .L43\r
- 201:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 231                           .loc 1 201 0\r
- 232 000c 8046                 mov     r8, r0\r
- 233                           .loc 1 210 0\r
- 234 000e 6380                 strh    r3, [r4, #2]    @ movhi\r
- 211:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 212:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Wait on enumeration in first time */\r
- 213:.\Generated_Source\PSoC5/USBFS_boot.c ****     if(USBFS_started)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 9\r
-\r
-\r
- 235                           .loc 1 213 0\r
- 236 0010 2478                 ldrb    r4, [r4, #0]    @ zero_extendqisi2\r
- 201:.\Generated_Source\PSoC5/USBFS_boot.c **** {\r
- 237                           .loc 1 201 0\r
- 238 0012 0F46                 mov     r7, r1\r
- 239                   .LVL21:\r
- 240                           .loc 1 213 0\r
- 241 0014 D4B1                 cbz     r4, .L40\r
- 242                   .L28:\r
- 243 0016 0024                 movs    r4, #0\r
- 244                   .LVL22:\r
- 245                   .L16:\r
- 214:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 215:.\Generated_Source\PSoC5/USBFS_boot.c ****         /* Wait for Device to enumerate */\r
- 216:.\Generated_Source\PSoC5/USBFS_boot.c ****         while(!USBFS_GetConfiguration() && USBFS_CyBtLdrChecktimer(time))\r
- 246                           .loc 1 216 0 discriminator 1\r
- 247 0018 FFF7FEFF             bl      USBFS_GetConfiguration\r
- 248                   .LVL23:\r
- 249 001c 58B9                 cbnz    r0, .L18\r
- 250                           .loc 1 216 0 is_stmt 0 discriminator 2\r
- 251 001e 234B                 ldr     r3, .L43\r
- 252 0020 661C                 adds    r6, r4, #1\r
- 253 0022 5888                 ldrh    r0, [r3, #2]\r
- 254 0024 B6B2                 uxth    r6, r6\r
- 255                   .LVL24:\r
- 256 0026 A042                 cmp     r0, r4\r
- 257 0028 04D9                 bls     .L41\r
- 258                   .L19:\r
- 217:.\Generated_Source\PSoC5/USBFS_boot.c ****         {\r
- 218:.\Generated_Source\PSoC5/USBFS_boot.c ****             CyDelay(1u); /* 1ms delay */\r
- 259                           .loc 1 218 0 is_stmt 1\r
- 260 002a 0120                 movs    r0, #1\r
- 261 002c FFF7FEFF             bl      CyDelay\r
- 262                   .LVL25:\r
- 216:.\Generated_Source\PSoC5/USBFS_boot.c ****         while(!USBFS_GetConfiguration() && USBFS_CyBtLdrChecktimer(time))\r
- 263                           .loc 1 216 0\r
- 264 0030 3446                 mov     r4, r6\r
- 265 0032 F1E7                 b       .L16\r
- 266                   .L41:\r
- 267 0034 3446                 mov     r4, r6\r
- 268                   .LVL26:\r
- 269                   .L18:\r
- 219:.\Generated_Source\PSoC5/USBFS_boot.c ****         }\r
- 220:.\Generated_Source\PSoC5/USBFS_boot.c ****         /* Enable first OUT, if enumeration complete */\r
- 221:.\Generated_Source\PSoC5/USBFS_boot.c ****         if(USBFS_GetConfiguration())\r
- 270                           .loc 1 221 0\r
- 271 0036 FFF7FEFF             bl      USBFS_GetConfiguration\r
- 272                   .LVL27:\r
- 273 003a E0B1                 cbz     r0, .L35\r
- 222:.\Generated_Source\PSoC5/USBFS_boot.c ****         {\r
- 223:.\Generated_Source\PSoC5/USBFS_boot.c ****             USBFS_IsConfigurationChanged();  /* Clear configuration changes state status */\r
- 274                           .loc 1 223 0\r
- 275 003c FFF7FEFF             bl      USBFS_IsConfigurationChanged\r
- 276                   .LVL28:\r
- 224:.\Generated_Source\PSoC5/USBFS_boot.c ****             USBFS_CyBtldrCommReset();\r
- 277                           .loc 1 224 0\r
- 278 0040 FFF7FEFF             bl      USBFS_CyBtldrCommReset\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 10\r
-\r
-\r
- 279                   .LVL29:\r
- 225:.\Generated_Source\PSoC5/USBFS_boot.c ****             USBFS_started = 0u;\r
- 280                           .loc 1 225 0\r
- 281 0044 194A                 ldr     r2, .L43\r
- 282 0046 0021                 movs    r1, #0\r
- 283 0048 1170                 strb    r1, [r2, #0]\r
- 284 004a 14E0                 b       .L35\r
- 285                   .LVL30:\r
- 286                   .L40:\r
- 226:.\Generated_Source\PSoC5/USBFS_boot.c ****         }\r
- 227:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 228:.\Generated_Source\PSoC5/USBFS_boot.c ****     else /* Check for configuration changes, has been done by Host */\r
- 229:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 230:.\Generated_Source\PSoC5/USBFS_boot.c ****         if(USBFS_IsConfigurationChanged() != 0u) /* Host could send double SET_INTERFACE request or\r
- 287                           .loc 1 230 0\r
- 288 004c FFF7FEFF             bl      USBFS_IsConfigurationChanged\r
- 289                   .LVL31:\r
- 290 0050 08B9                 cbnz    r0, .L22\r
- 291                   .L23:\r
- 210:.\Generated_Source\PSoC5/USBFS_boot.c ****     USBFS_CyBtLdrStarttimer(time, timeOut);\r
- 292                           .loc 1 210 0\r
- 293 0052 0024                 movs    r4, #0\r
- 294 0054 0FE0                 b       .L35\r
- 295                   .L22:\r
- 231:.\Generated_Source\PSoC5/USBFS_boot.c ****         {\r
- 232:.\Generated_Source\PSoC5/USBFS_boot.c ****             if(USBFS_GetConfiguration() != 0u)   /* Init OUT endpoints when device reconfigured */\r
- 296                           .loc 1 232 0\r
- 297 0056 FFF7FEFF             bl      USBFS_GetConfiguration\r
- 298                   .LVL32:\r
- 299 005a 0028                 cmp     r0, #0\r
- 300 005c F9D0                 beq     .L23\r
- 233:.\Generated_Source\PSoC5/USBFS_boot.c ****             {\r
- 234:.\Generated_Source\PSoC5/USBFS_boot.c ****                 USBFS_CyBtldrCommReset();\r
- 301                           .loc 1 234 0\r
- 302 005e FFF7FEFF             bl      USBFS_CyBtldrCommReset\r
- 303                   .LVL33:\r
- 304 0062 08E0                 b       .L35\r
- 305                   .LVL34:\r
- 306                   .L42:\r
- 235:.\Generated_Source\PSoC5/USBFS_boot.c ****             }\r
- 236:.\Generated_Source\PSoC5/USBFS_boot.c ****         }\r
- 237:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 238:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* Wait on next packet */\r
- 239:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
- 307                           .loc 1 239 0 discriminator 2\r
- 308 0064 114B                 ldr     r3, .L43\r
- 240:.\Generated_Source\PSoC5/USBFS_boot.c ****            USBFS_CyBtLdrChecktimer(time))\r
- 309                           .loc 1 240 0 discriminator 2\r
- 310 0066 661C                 adds    r6, r4, #1\r
- 239:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
- 311                           .loc 1 239 0 discriminator 2\r
- 312 0068 5988                 ldrh    r1, [r3, #2]\r
- 313                           .loc 1 240 0 discriminator 2\r
- 314 006a B6B2                 uxth    r6, r6\r
- 315                   .LVL35:\r
- 239:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
- 316                           .loc 1 239 0 discriminator 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 11\r
-\r
-\r
- 317 006c A142                 cmp     r1, r4\r
- 318 006e 09D9                 bls     .L24\r
- 319                   .L25:\r
- 241:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 242:.\Generated_Source\PSoC5/USBFS_boot.c ****         CyDelay(1u); /* 1ms delay */\r
- 320                           .loc 1 242 0\r
- 321 0070 FFF7FEFF             bl      CyDelay\r
- 322                   .LVL36:\r
- 240:.\Generated_Source\PSoC5/USBFS_boot.c ****            USBFS_CyBtLdrChecktimer(time))\r
- 323                           .loc 1 240 0\r
- 324 0074 3446                 mov     r4, r6\r
- 325                   .LVL37:\r
- 326                   .L35:\r
- 239:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
- 327                           .loc 1 239 0 discriminator 1\r
- 328 0076 0120                 movs    r0, #1\r
- 329 0078 FFF7FEFF             bl      USBFS_GetEPState\r
- 330                   .LVL38:\r
- 331 007c 0128                 cmp     r0, #1\r
- 332                           .loc 1 242 0 discriminator 1\r
- 333 007e 4FF00100             mov     r0, #1\r
- 239:.\Generated_Source\PSoC5/USBFS_boot.c ****     while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
- 334                           .loc 1 239 0 discriminator 1\r
- 335 0082 EFD1                 bne     .L42\r
- 336                   .LVL39:\r
- 337                   .L24:\r
- 243:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 244:.\Generated_Source\PSoC5/USBFS_boot.c **** \r
- 245:.\Generated_Source\PSoC5/USBFS_boot.c ****     /* OUT EP has completed */\r
- 246:.\Generated_Source\PSoC5/USBFS_boot.c ****     if (USBFS_GetEPState(USBFS_BTLDR_OUT_EP) == USBFS_OUT_BUFFER_FULL)\r
- 338                           .loc 1 246 0\r
- 339 0084 FFF7FEFF             bl      USBFS_GetEPState\r
- 340                   .LVL40:\r
- 341 0088 0128                 cmp     r0, #1\r
- 342 008a 0AD1                 bne     .L26\r
- 247:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 248:.\Generated_Source\PSoC5/USBFS_boot.c ****         *count = USBFS_ReadOutEP(USBFS_BTLDR_OUT_EP, pData, size);\r
- 343                           .loc 1 248 0\r
- 344 008c 4146                 mov     r1, r8\r
- 345 008e 402F                 cmp     r7, #64\r
- 346 0090 34BF                 ite     cc\r
- 347 0092 3A46                 movcc   r2, r7\r
- 348 0094 4022                 movcs   r2, #64\r
- 349 0096 FFF7FEFF             bl      USBFS_ReadOutEP\r
- 350                   .LVL41:\r
- 351 009a 2880                 strh    r0, [r5, #0]    @ movhi\r
- 352                   .LVL42:\r
- 249:.\Generated_Source\PSoC5/USBFS_boot.c ****         status = CYRET_SUCCESS;\r
- 353                           .loc 1 249 0\r
- 354 009c 0020                 movs    r0, #0\r
- 355 009e BDE8F081             pop     {r4, r5, r6, r7, r8, pc}\r
- 356                   .LVL43:\r
- 357                   .L26:\r
- 250:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 251:.\Generated_Source\PSoC5/USBFS_boot.c ****     else\r
- 252:.\Generated_Source\PSoC5/USBFS_boot.c ****     {\r
- 253:.\Generated_Source\PSoC5/USBFS_boot.c ****         *count = 0u;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 12\r
-\r
-\r
- 358                           .loc 1 253 0\r
- 359 00a2 0020                 movs    r0, #0\r
- 360 00a4 2880                 strh    r0, [r5, #0]    @ movhi\r
- 361                   .LVL44:\r
- 254:.\Generated_Source\PSoC5/USBFS_boot.c ****         status = CYRET_TIMEOUT;\r
- 362                           .loc 1 254 0\r
- 363 00a6 1020                 movs    r0, #16\r
- 364                   .LVL45:\r
- 255:.\Generated_Source\PSoC5/USBFS_boot.c ****     }\r
- 256:.\Generated_Source\PSoC5/USBFS_boot.c ****     return(status);\r
- 257:.\Generated_Source\PSoC5/USBFS_boot.c **** }\r
- 365                           .loc 1 257 0\r
- 366 00a8 BDE8F081             pop     {r4, r5, r6, r7, r8, pc}\r
- 367                   .L44:\r
- 368                           .align  2\r
- 369                   .L43:\r
- 370 00ac 00000000             .word   .LANCHOR0\r
- 371                           .cfi_endproc\r
- 372                   .LFE4:\r
- 373                           .size   USBFS_CyBtldrCommRead, .-USBFS_CyBtldrCommRead\r
- 374                           .bss\r
- 375                           .align  1\r
- 376                           .set    .LANCHOR0,. + 0\r
- 377                           .type   USBFS_started, %object\r
- 378                           .size   USBFS_started, 1\r
- 379                   USBFS_started:\r
- 380 0000 00                   .space  1\r
- 381 0001 00                   .space  1\r
- 382                           .type   USBFS_universalTime, %object\r
- 383                           .size   USBFS_universalTime, 2\r
- 384                   USBFS_universalTime:\r
- 385 0002 0000                 .space  2\r
- 386                           .text\r
- 387                   .Letext0:\r
- 388                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 389                           .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 390                           .file 4 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 391                           .section        .debug_info,"",%progbits\r
- 392                   .Ldebug_info0:\r
- 393 0000 0B040000             .4byte  0x40b\r
- 394 0004 0200                 .2byte  0x2\r
- 395 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 396 000a 04                   .byte   0x4\r
- 397 000b 01                   .uleb128 0x1\r
- 398 000c B7010000             .4byte  .LASF37\r
- 399 0010 01                   .byte   0x1\r
- 400 0011 66020000             .4byte  .LASF38\r
- 401 0015 91000000             .4byte  .LASF39\r
- 402 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 403 001d 00000000             .4byte  0\r
- 404 0021 00000000             .4byte  0\r
- 405 0025 00000000             .4byte  .Ldebug_line0\r
- 406 0029 02                   .uleb128 0x2\r
- 407 002a 01                   .byte   0x1\r
- 408 002b 06                   .byte   0x6\r
- 409 002c 30020000             .4byte  .LASF0\r
- 410 0030 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 13\r
-\r
-\r
- 411 0031 01                   .byte   0x1\r
- 412 0032 08                   .byte   0x8\r
- 413 0033 C8000000             .4byte  .LASF1\r
- 414 0037 02                   .uleb128 0x2\r
- 415 0038 02                   .byte   0x2\r
- 416 0039 05                   .byte   0x5\r
- 417 003a AD010000             .4byte  .LASF2\r
- 418 003e 02                   .uleb128 0x2\r
- 419 003f 02                   .byte   0x2\r
- 420 0040 07                   .byte   0x7\r
- 421 0041 16000000             .4byte  .LASF3\r
- 422 0045 02                   .uleb128 0x2\r
- 423 0046 04                   .byte   0x4\r
- 424 0047 05                   .byte   0x5\r
- 425 0048 11020000             .4byte  .LASF4\r
- 426 004c 02                   .uleb128 0x2\r
- 427 004d 04                   .byte   0x4\r
- 428 004e 07                   .byte   0x7\r
- 429 004f 7F000000             .4byte  .LASF5\r
- 430 0053 02                   .uleb128 0x2\r
- 431 0054 08                   .byte   0x8\r
- 432 0055 05                   .byte   0x5\r
- 433 0056 8B010000             .4byte  .LASF6\r
- 434 005a 02                   .uleb128 0x2\r
- 435 005b 08                   .byte   0x8\r
- 436 005c 07                   .byte   0x7\r
- 437 005d 36010000             .4byte  .LASF7\r
- 438 0061 03                   .uleb128 0x3\r
- 439 0062 04                   .byte   0x4\r
- 440 0063 05                   .byte   0x5\r
- 441 0064 696E7400             .ascii  "int\000"\r
- 442 0068 02                   .uleb128 0x2\r
- 443 0069 04                   .byte   0x4\r
- 444 006a 07                   .byte   0x7\r
- 445 006b 29010000             .4byte  .LASF8\r
- 446 006f 04                   .uleb128 0x4\r
- 447 0070 C2000000             .4byte  .LASF9\r
- 448 0074 02                   .byte   0x2\r
- 449 0075 5B                   .byte   0x5b\r
- 450 0076 30000000             .4byte  0x30\r
- 451 007a 04                   .uleb128 0x4\r
- 452 007b 04010000             .4byte  .LASF10\r
- 453 007f 02                   .byte   0x2\r
- 454 0080 5C                   .byte   0x5c\r
- 455 0081 3E000000             .4byte  0x3e\r
- 456 0085 04                   .uleb128 0x4\r
- 457 0086 0B010000             .4byte  .LASF11\r
- 458 008a 02                   .byte   0x2\r
- 459 008b 5D                   .byte   0x5d\r
- 460 008c 4C000000             .4byte  0x4c\r
- 461 0090 02                   .uleb128 0x2\r
- 462 0091 04                   .byte   0x4\r
- 463 0092 04                   .byte   0x4\r
- 464 0093 69000000             .4byte  .LASF12\r
- 465 0097 02                   .uleb128 0x2\r
- 466 0098 08                   .byte   0x8\r
- 467 0099 04                   .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 14\r
-\r
-\r
- 468 009a D6000000             .4byte  .LASF13\r
- 469 009e 02                   .uleb128 0x2\r
- 470 009f 01                   .byte   0x1\r
- 471 00a0 08                   .byte   0x8\r
- 472 00a1 99010000             .4byte  .LASF14\r
- 473 00a5 04                   .uleb128 0x4\r
- 474 00a6 00000000             .4byte  .LASF15\r
- 475 00aa 02                   .byte   0x2\r
- 476 00ab E8                   .byte   0xe8\r
- 477 00ac 4C000000             .4byte  0x4c\r
- 478 00b0 02                   .uleb128 0x2\r
- 479 00b1 04                   .byte   0x4\r
- 480 00b2 07                   .byte   0x7\r
- 481 00b3 82010000             .4byte  .LASF16\r
- 482 00b7 05                   .uleb128 0x5\r
- 483 00b8 01                   .byte   0x1\r
- 484 00b9 52000000             .4byte  .LASF17\r
- 485 00bd 01                   .byte   0x1\r
- 486 00be 3E                   .byte   0x3e\r
- 487 00bf 01                   .byte   0x1\r
- 488 00c0 00000000             .4byte  .LFB0\r
- 489 00c4 18000000             .4byte  .LFE0\r
- 490 00c8 00000000             .4byte  .LLST0\r
- 491 00cc 01                   .byte   0x1\r
- 492 00cd E6000000             .4byte  0xe6\r
- 493 00d1 06                   .uleb128 0x6\r
- 494 00d2 0C000000             .4byte  .LVL0\r
- 495 00d6 48030000             .4byte  0x348\r
- 496 00da 07                   .uleb128 0x7\r
- 497 00db 01                   .byte   0x1\r
- 498 00dc 51                   .byte   0x51\r
- 499 00dd 01                   .byte   0x1\r
- 500 00de 32                   .byte   0x32\r
- 501 00df 07                   .uleb128 0x7\r
- 502 00e0 01                   .byte   0x1\r
- 503 00e1 50                   .byte   0x50\r
- 504 00e2 01                   .byte   0x1\r
- 505 00e3 30                   .byte   0x30\r
- 506 00e4 00                   .byte   0\r
- 507 00e5 00                   .byte   0\r
- 508 00e6 08                   .uleb128 0x8\r
- 509 00e7 01                   .byte   0x1\r
- 510 00e8 1A020000             .4byte  .LASF18\r
- 511 00ec 01                   .byte   0x1\r
- 512 00ed 59                   .byte   0x59\r
- 513 00ee 01                   .byte   0x1\r
- 514 00ef 00000000             .4byte  .LFB1\r
- 515 00f3 04000000             .4byte  .LFE1\r
- 516 00f7 02                   .byte   0x2\r
- 517 00f8 7D                   .byte   0x7d\r
- 518 00f9 00                   .sleb128 0\r
- 519 00fa 01                   .byte   0x1\r
- 520 00fb 0A010000             .4byte  0x10a\r
- 521 00ff 09                   .uleb128 0x9\r
- 522 0100 04000000             .4byte  .LVL1\r
- 523 0104 01                   .byte   0x1\r
- 524 0105 61030000             .4byte  0x361\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 15\r
-\r
-\r
- 525 0109 00                   .byte   0\r
- 526 010a 08                   .uleb128 0x8\r
- 527 010b 01                   .byte   0x1\r
- 528 010c 29000000             .4byte  .LASF19\r
- 529 0110 01                   .byte   0x1\r
- 530 0111 70                   .byte   0x70\r
- 531 0112 01                   .byte   0x1\r
- 532 0113 00000000             .4byte  .LFB2\r
- 533 0117 06000000             .4byte  .LFE2\r
- 534 011b 02                   .byte   0x2\r
- 535 011c 7D                   .byte   0x7d\r
- 536 011d 00                   .sleb128 0\r
- 537 011e 01                   .byte   0x1\r
- 538 011f 34010000             .4byte  0x134\r
- 539 0123 0A                   .uleb128 0xa\r
- 540 0124 06000000             .4byte  .LVL2\r
- 541 0128 01                   .byte   0x1\r
- 542 0129 6B030000             .4byte  0x36b\r
- 543 012d 07                   .uleb128 0x7\r
- 544 012e 01                   .byte   0x1\r
- 545 012f 50                   .byte   0x50\r
- 546 0130 01                   .byte   0x1\r
- 547 0131 31                   .byte   0x31\r
- 548 0132 00                   .byte   0\r
- 549 0133 00                   .byte   0\r
- 550 0134 0B                   .uleb128 0xb\r
- 551 0135 01                   .byte   0x1\r
- 552 0136 ED000000             .4byte  .LASF26\r
- 553 013a 01                   .byte   0x1\r
- 554 013b 8D                   .byte   0x8d\r
- 555 013c 01                   .byte   0x1\r
- 556 013d A5000000             .4byte  0xa5\r
- 557 0141 00000000             .4byte  .LFB3\r
- 558 0145 54000000             .4byte  .LFE3\r
- 559 0149 20000000             .4byte  .LLST1\r
- 560 014d 01                   .byte   0x1\r
- 561 014e 01020000             .4byte  0x201\r
- 562 0152 0C                   .uleb128 0xc\r
- 563 0153 4C000000             .4byte  .LASF20\r
- 564 0157 01                   .byte   0x1\r
- 565 0158 8D                   .byte   0x8d\r
- 566 0159 01020000             .4byte  0x201\r
- 567 015d 40000000             .4byte  .LLST2\r
- 568 0161 0C                   .uleb128 0xc\r
- 569 0162 7A000000             .4byte  .LASF21\r
- 570 0166 01                   .byte   0x1\r
- 571 0167 8D                   .byte   0x8d\r
- 572 0168 7A000000             .4byte  0x7a\r
- 573 016c 6C000000             .4byte  .LLST3\r
- 574 0170 0C                   .uleb128 0xc\r
- 575 0171 10000000             .4byte  .LASF22\r
- 576 0175 01                   .byte   0x1\r
- 577 0176 8D                   .byte   0x8d\r
- 578 0177 07020000             .4byte  0x207\r
- 579 017b 8D000000             .4byte  .LLST4\r
- 580 017f 0C                   .uleb128 0xc\r
- 581 0180 75010000             .4byte  .LASF23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 16\r
-\r
-\r
- 582 0184 01                   .byte   0x1\r
- 583 0185 8D                   .byte   0x8d\r
- 584 0186 6F000000             .4byte  0x6f\r
- 585 018a AB000000             .4byte  .LLST5\r
- 586 018e 0D                   .uleb128 0xd\r
- 587 018f 7D010000             .4byte  .LASF24\r
- 588 0193 01                   .byte   0x1\r
- 589 0194 90                   .byte   0x90\r
- 590 0195 7A000000             .4byte  0x7a\r
- 591 0199 CC000000             .4byte  .LLST6\r
- 592 019d 0D                   .uleb128 0xd\r
- 593 019e 09000000             .4byte  .LASF25\r
- 594 01a2 01                   .byte   0x1\r
- 595 01a3 91                   .byte   0x91\r
- 596 01a4 A5000000             .4byte  0xa5\r
- 597 01a8 F6000000             .4byte  .LLST7\r
- 598 01ac 0E                   .uleb128 0xe\r
- 599 01ad 14000000             .4byte  .LVL7\r
- 600 01b1 7F030000             .4byte  0x37f\r
- 601 01b5 CB010000             .4byte  0x1cb\r
- 602 01b9 07                   .uleb128 0x7\r
- 603 01ba 01                   .byte   0x1\r
- 604 01bb 52                   .byte   0x52\r
- 605 01bc 02                   .byte   0x2\r
- 606 01bd 08                   .byte   0x8\r
- 607 01be 40                   .byte   0x40\r
- 608 01bf 07                   .uleb128 0x7\r
- 609 01c0 01                   .byte   0x1\r
- 610 01c1 51                   .byte   0x51\r
- 611 01c2 02                   .byte   0x2\r
- 612 01c3 77                   .byte   0x77\r
- 613 01c4 00                   .sleb128 0\r
- 614 01c5 07                   .uleb128 0x7\r
- 615 01c6 01                   .byte   0x1\r
- 616 01c7 50                   .byte   0x50\r
- 617 01c8 01                   .byte   0x1\r
- 618 01c9 32                   .byte   0x32\r
- 619 01ca 00                   .byte   0\r
- 620 01cb 0E                   .uleb128 0xe\r
- 621 01cc 24000000             .4byte  .LVL10\r
- 622 01d0 A8030000             .4byte  0x3a8\r
- 623 01d4 DE010000             .4byte  0x1de\r
- 624 01d8 07                   .uleb128 0x7\r
- 625 01d9 01                   .byte   0x1\r
- 626 01da 50                   .byte   0x50\r
- 627 01db 01                   .byte   0x1\r
- 628 01dc 32                   .byte   0x32\r
- 629 01dd 00                   .byte   0\r
- 630 01de 0E                   .uleb128 0xe\r
- 631 01df 38000000             .4byte  .LVL12\r
- 632 01e3 C0030000             .4byte  0x3c0\r
- 633 01e7 F1010000             .4byte  0x1f1\r
- 634 01eb 07                   .uleb128 0x7\r
- 635 01ec 01                   .byte   0x1\r
- 636 01ed 50                   .byte   0x50\r
- 637 01ee 01                   .byte   0x1\r
- 638 01ef 31                   .byte   0x31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 17\r
-\r
-\r
- 639 01f0 00                   .byte   0\r
- 640 01f1 06                   .uleb128 0x6\r
- 641 01f2 42000000             .4byte  .LVL14\r
- 642 01f6 A8030000             .4byte  0x3a8\r
- 643 01fa 07                   .uleb128 0x7\r
- 644 01fb 01                   .byte   0x1\r
- 645 01fc 50                   .byte   0x50\r
- 646 01fd 01                   .byte   0x1\r
- 647 01fe 32                   .byte   0x32\r
- 648 01ff 00                   .byte   0\r
- 649 0200 00                   .byte   0\r
- 650 0201 0F                   .uleb128 0xf\r
- 651 0202 04                   .byte   0x4\r
- 652 0203 6F000000             .4byte  0x6f\r
- 653 0207 0F                   .uleb128 0xf\r
- 654 0208 04                   .byte   0x4\r
- 655 0209 7A000000             .4byte  0x7a\r
- 656 020d 0B                   .uleb128 0xb\r
- 657 020e 01                   .byte   0x1\r
- 658 020f 5F010000             .4byte  .LASF27\r
- 659 0213 01                   .byte   0x1\r
- 660 0214 C7                   .byte   0xc7\r
- 661 0215 01                   .byte   0x1\r
- 662 0216 A5000000             .4byte  0xa5\r
- 663 021a 00000000             .4byte  .LFB4\r
- 664 021e B0000000             .4byte  .LFE4\r
- 665 0222 15010000             .4byte  .LLST8\r
- 666 0226 01                   .byte   0x1\r
- 667 0227 26030000             .4byte  0x326\r
- 668 022b 0C                   .uleb128 0xc\r
- 669 022c 4C000000             .4byte  .LASF20\r
- 670 0230 01                   .byte   0x1\r
- 671 0231 C7                   .byte   0xc7\r
- 672 0232 01020000             .4byte  0x201\r
- 673 0236 35010000             .4byte  .LLST9\r
- 674 023a 0C                   .uleb128 0xc\r
- 675 023b 7A000000             .4byte  .LASF21\r
- 676 023f 01                   .byte   0x1\r
- 677 0240 C7                   .byte   0xc7\r
- 678 0241 7A000000             .4byte  0x7a\r
- 679 0245 69010000             .4byte  .LLST10\r
- 680 0249 0C                   .uleb128 0xc\r
- 681 024a 10000000             .4byte  .LASF22\r
- 682 024e 01                   .byte   0x1\r
- 683 024f C7                   .byte   0xc7\r
- 684 0250 07020000             .4byte  0x207\r
- 685 0254 FC010000             .4byte  .LLST11\r
- 686 0258 0C                   .uleb128 0xc\r
- 687 0259 75010000             .4byte  .LASF23\r
- 688 025d 01                   .byte   0x1\r
- 689 025e C7                   .byte   0xc7\r
- 690 025f 6F000000             .4byte  0x6f\r
- 691 0263 1A020000             .4byte  .LLST12\r
- 692 0267 0D                   .uleb128 0xd\r
- 693 0268 09000000             .4byte  .LASF25\r
- 694 026c 01                   .byte   0x1\r
- 695 026d CA                   .byte   0xca\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 18\r
-\r
-\r
- 696 026e A5000000             .4byte  0xa5\r
- 697 0272 3B020000             .4byte  .LLST13\r
- 698 0276 0D                   .uleb128 0xd\r
- 699 0277 7D010000             .4byte  .LASF24\r
- 700 027b 01                   .byte   0x1\r
- 701 027c CB                   .byte   0xcb\r
- 702 027d 7A000000             .4byte  0x7a\r
- 703 0281 66020000             .4byte  .LLST14\r
- 704 0285 10                   .uleb128 0x10\r
- 705 0286 1C000000             .4byte  .LVL23\r
- 706 028a D4030000             .4byte  0x3d4\r
- 707 028e 0E                   .uleb128 0xe\r
- 708 028f 30000000             .4byte  .LVL25\r
- 709 0293 C0030000             .4byte  0x3c0\r
- 710 0297 A1020000             .4byte  0x2a1\r
- 711 029b 07                   .uleb128 0x7\r
- 712 029c 01                   .byte   0x1\r
- 713 029d 50                   .byte   0x50\r
- 714 029e 01                   .byte   0x1\r
- 715 029f 31                   .byte   0x31\r
- 716 02a0 00                   .byte   0\r
- 717 02a1 10                   .uleb128 0x10\r
- 718 02a2 3A000000             .4byte  .LVL27\r
- 719 02a6 D4030000             .4byte  0x3d4\r
- 720 02aa 10                   .uleb128 0x10\r
- 721 02ab 40000000             .4byte  .LVL28\r
- 722 02af E2030000             .4byte  0x3e2\r
- 723 02b3 10                   .uleb128 0x10\r
- 724 02b4 44000000             .4byte  .LVL29\r
- 725 02b8 0A010000             .4byte  0x10a\r
- 726 02bc 10                   .uleb128 0x10\r
- 727 02bd 50000000             .4byte  .LVL31\r
- 728 02c1 E2030000             .4byte  0x3e2\r
- 729 02c5 10                   .uleb128 0x10\r
- 730 02c6 5A000000             .4byte  .LVL32\r
- 731 02ca D4030000             .4byte  0x3d4\r
- 732 02ce 10                   .uleb128 0x10\r
- 733 02cf 62000000             .4byte  .LVL33\r
- 734 02d3 0A010000             .4byte  0x10a\r
- 735 02d7 10                   .uleb128 0x10\r
- 736 02d8 74000000             .4byte  .LVL36\r
- 737 02dc C0030000             .4byte  0x3c0\r
- 738 02e0 0E                   .uleb128 0xe\r
- 739 02e1 7C000000             .4byte  .LVL38\r
- 740 02e5 A8030000             .4byte  0x3a8\r
- 741 02e9 F3020000             .4byte  0x2f3\r
- 742 02ed 07                   .uleb128 0x7\r
- 743 02ee 01                   .byte   0x1\r
- 744 02ef 50                   .byte   0x50\r
- 745 02f0 01                   .byte   0x1\r
- 746 02f1 31                   .byte   0x31\r
- 747 02f2 00                   .byte   0\r
- 748 02f3 10                   .uleb128 0x10\r
- 749 02f4 88000000             .4byte  .LVL40\r
- 750 02f8 A8030000             .4byte  0x3a8\r
- 751 02fc 06                   .uleb128 0x6\r
- 752 02fd 9A000000             .4byte  .LVL41\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 19\r
-\r
-\r
- 753 0301 F0030000             .4byte  0x3f0\r
- 754 0305 07                   .uleb128 0x7\r
- 755 0306 01                   .byte   0x1\r
- 756 0307 52                   .byte   0x52\r
- 757 0308 15                   .byte   0x15\r
- 758 0309 77                   .byte   0x77\r
- 759 030a 00                   .sleb128 0\r
- 760 030b 12                   .byte   0x12\r
- 761 030c 40                   .byte   0x40\r
- 762 030d 4B                   .byte   0x4b\r
- 763 030e 24                   .byte   0x24\r
- 764 030f 22                   .byte   0x22\r
- 765 0310 08                   .byte   0x8\r
- 766 0311 40                   .byte   0x40\r
- 767 0312 16                   .byte   0x16\r
- 768 0313 14                   .byte   0x14\r
- 769 0314 40                   .byte   0x40\r
- 770 0315 4B                   .byte   0x4b\r
- 771 0316 24                   .byte   0x24\r
- 772 0317 22                   .byte   0x22\r
- 773 0318 2D                   .byte   0x2d\r
- 774 0319 28                   .byte   0x28\r
- 775 031a 0100                 .2byte  0x1\r
- 776 031c 16                   .byte   0x16\r
- 777 031d 13                   .byte   0x13\r
- 778 031e 07                   .uleb128 0x7\r
- 779 031f 01                   .byte   0x1\r
- 780 0320 51                   .byte   0x51\r
- 781 0321 02                   .byte   0x2\r
- 782 0322 78                   .byte   0x78\r
- 783 0323 00                   .sleb128 0\r
- 784 0324 00                   .byte   0\r
- 785 0325 00                   .byte   0\r
- 786 0326 11                   .uleb128 0x11\r
- 787 0327 4A020000             .4byte  .LASF28\r
- 788 032b 01                   .byte   0x1\r
- 789 032c 26                   .byte   0x26\r
- 790 032d 7A000000             .4byte  0x7a\r
- 791 0331 05                   .byte   0x5\r
- 792 0332 03                   .byte   0x3\r
- 793 0333 02000000             .4byte  USBFS_universalTime\r
- 794 0337 11                   .uleb128 0x11\r
- 795 0338 3C020000             .4byte  .LASF29\r
- 796 033c 01                   .byte   0x1\r
- 797 033d 27                   .byte   0x27\r
- 798 033e 6F000000             .4byte  0x6f\r
- 799 0342 05                   .byte   0x5\r
- 800 0343 03                   .byte   0x3\r
- 801 0344 00000000             .4byte  USBFS_started\r
- 802 0348 12                   .uleb128 0x12\r
- 803 0349 01                   .byte   0x1\r
- 804 034a 40000000             .4byte  .LASF30\r
- 805 034e 03                   .byte   0x3\r
- 806 034f BF                   .byte   0xbf\r
- 807 0350 01                   .byte   0x1\r
- 808 0351 01                   .byte   0x1\r
- 809 0352 61030000             .4byte  0x361\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 20\r
-\r
-\r
- 810 0356 13                   .uleb128 0x13\r
- 811 0357 6F000000             .4byte  0x6f\r
- 812 035b 13                   .uleb128 0x13\r
- 813 035c 6F000000             .4byte  0x6f\r
- 814 0360 00                   .byte   0\r
- 815 0361 14                   .uleb128 0x14\r
- 816 0362 01                   .byte   0x1\r
- 817 0363 6F000000             .4byte  .LASF40\r
- 818 0367 03                   .byte   0x3\r
- 819 0368 C2                   .byte   0xc2\r
- 820 0369 01                   .byte   0x1\r
- 821 036a 01                   .byte   0x1\r
- 822 036b 12                   .uleb128 0x12\r
- 823 036c 01                   .byte   0x1\r
- 824 036d 4D010000             .4byte  .LASF31\r
- 825 0371 03                   .byte   0x3\r
- 826 0372 CE                   .byte   0xce\r
- 827 0373 01                   .byte   0x1\r
- 828 0374 01                   .byte   0x1\r
- 829 0375 7F030000             .4byte  0x37f\r
- 830 0379 13                   .uleb128 0x13\r
- 831 037a 6F000000             .4byte  0x6f\r
- 832 037e 00                   .byte   0\r
- 833 037f 12                   .uleb128 0x12\r
- 834 0380 01                   .byte   0x1\r
- 835 0381 9E010000             .4byte  .LASF32\r
- 836 0385 03                   .byte   0x3\r
- 837 0386 CA                   .byte   0xca\r
- 838 0387 01                   .byte   0x1\r
- 839 0388 01                   .byte   0x1\r
- 840 0389 9D030000             .4byte  0x39d\r
- 841 038d 13                   .uleb128 0x13\r
- 842 038e 6F000000             .4byte  0x6f\r
- 843 0392 13                   .uleb128 0x13\r
- 844 0393 9D030000             .4byte  0x39d\r
- 845 0397 13                   .uleb128 0x13\r
- 846 0398 7A000000             .4byte  0x7a\r
- 847 039c 00                   .byte   0\r
- 848 039d 0F                   .uleb128 0xf\r
- 849 039e 04                   .byte   0x4\r
- 850 039f A3030000             .4byte  0x3a3\r
- 851 03a3 15                   .uleb128 0x15\r
- 852 03a4 6F000000             .4byte  0x6f\r
- 853 03a8 16                   .uleb128 0x16\r
- 854 03a9 01                   .byte   0x1\r
- 855 03aa 00020000             .4byte  .LASF41\r
- 856 03ae 03                   .byte   0x3\r
- 857 03af C8                   .byte   0xc8\r
- 858 03b0 01                   .byte   0x1\r
- 859 03b1 6F000000             .4byte  0x6f\r
- 860 03b5 01                   .byte   0x1\r
- 861 03b6 C0030000             .4byte  0x3c0\r
- 862 03ba 13                   .uleb128 0x13\r
- 863 03bb 6F000000             .4byte  0x6f\r
- 864 03bf 00                   .byte   0\r
- 865 03c0 12                   .uleb128 0x12\r
- 866 03c1 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 21\r
-\r
-\r
- 867 03c2 5E020000             .4byte  .LASF33\r
- 868 03c6 04                   .byte   0x4\r
- 869 03c7 77                   .byte   0x77\r
- 870 03c8 01                   .byte   0x1\r
- 871 03c9 01                   .byte   0x1\r
- 872 03ca D4030000             .4byte  0x3d4\r
- 873 03ce 13                   .uleb128 0x13\r
- 874 03cf 85000000             .4byte  0x85\r
- 875 03d3 00                   .byte   0\r
- 876 03d4 17                   .uleb128 0x17\r
- 877 03d5 01                   .byte   0x1\r
- 878 03d6 12010000             .4byte  .LASF34\r
- 879 03da 03                   .byte   0x3\r
- 880 03db C4                   .byte   0xc4\r
- 881 03dc 01                   .byte   0x1\r
- 882 03dd 6F000000             .4byte  0x6f\r
- 883 03e1 01                   .byte   0x1\r
- 884 03e2 17                   .uleb128 0x17\r
- 885 03e3 01                   .byte   0x1\r
- 886 03e4 8C020000             .4byte  .LASF35\r
- 887 03e8 03                   .byte   0x3\r
- 888 03e9 C5                   .byte   0xc5\r
- 889 03ea 01                   .byte   0x1\r
- 890 03eb 6F000000             .4byte  0x6f\r
- 891 03ef 01                   .byte   0x1\r
- 892 03f0 18                   .uleb128 0x18\r
- 893 03f1 01                   .byte   0x1\r
- 894 03f2 DD000000             .4byte  .LASF36\r
- 895 03f6 03                   .byte   0x3\r
- 896 03f7 CC                   .byte   0xcc\r
- 897 03f8 01                   .byte   0x1\r
- 898 03f9 7A000000             .4byte  0x7a\r
- 899 03fd 01                   .byte   0x1\r
- 900 03fe 13                   .uleb128 0x13\r
- 901 03ff 6F000000             .4byte  0x6f\r
- 902 0403 13                   .uleb128 0x13\r
- 903 0404 01020000             .4byte  0x201\r
- 904 0408 13                   .uleb128 0x13\r
- 905 0409 7A000000             .4byte  0x7a\r
- 906 040d 00                   .byte   0\r
- 907 040e 00                   .byte   0\r
- 908                           .section        .debug_abbrev,"",%progbits\r
- 909                   .Ldebug_abbrev0:\r
- 910 0000 01                   .uleb128 0x1\r
- 911 0001 11                   .uleb128 0x11\r
- 912 0002 01                   .byte   0x1\r
- 913 0003 25                   .uleb128 0x25\r
- 914 0004 0E                   .uleb128 0xe\r
- 915 0005 13                   .uleb128 0x13\r
- 916 0006 0B                   .uleb128 0xb\r
- 917 0007 03                   .uleb128 0x3\r
- 918 0008 0E                   .uleb128 0xe\r
- 919 0009 1B                   .uleb128 0x1b\r
- 920 000a 0E                   .uleb128 0xe\r
- 921 000b 55                   .uleb128 0x55\r
- 922 000c 06                   .uleb128 0x6\r
- 923 000d 11                   .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 22\r
-\r
-\r
- 924 000e 01                   .uleb128 0x1\r
- 925 000f 52                   .uleb128 0x52\r
- 926 0010 01                   .uleb128 0x1\r
- 927 0011 10                   .uleb128 0x10\r
- 928 0012 06                   .uleb128 0x6\r
- 929 0013 00                   .byte   0\r
- 930 0014 00                   .byte   0\r
- 931 0015 02                   .uleb128 0x2\r
- 932 0016 24                   .uleb128 0x24\r
- 933 0017 00                   .byte   0\r
- 934 0018 0B                   .uleb128 0xb\r
- 935 0019 0B                   .uleb128 0xb\r
- 936 001a 3E                   .uleb128 0x3e\r
- 937 001b 0B                   .uleb128 0xb\r
- 938 001c 03                   .uleb128 0x3\r
- 939 001d 0E                   .uleb128 0xe\r
- 940 001e 00                   .byte   0\r
- 941 001f 00                   .byte   0\r
- 942 0020 03                   .uleb128 0x3\r
- 943 0021 24                   .uleb128 0x24\r
- 944 0022 00                   .byte   0\r
- 945 0023 0B                   .uleb128 0xb\r
- 946 0024 0B                   .uleb128 0xb\r
- 947 0025 3E                   .uleb128 0x3e\r
- 948 0026 0B                   .uleb128 0xb\r
- 949 0027 03                   .uleb128 0x3\r
- 950 0028 08                   .uleb128 0x8\r
- 951 0029 00                   .byte   0\r
- 952 002a 00                   .byte   0\r
- 953 002b 04                   .uleb128 0x4\r
- 954 002c 16                   .uleb128 0x16\r
- 955 002d 00                   .byte   0\r
- 956 002e 03                   .uleb128 0x3\r
- 957 002f 0E                   .uleb128 0xe\r
- 958 0030 3A                   .uleb128 0x3a\r
- 959 0031 0B                   .uleb128 0xb\r
- 960 0032 3B                   .uleb128 0x3b\r
- 961 0033 0B                   .uleb128 0xb\r
- 962 0034 49                   .uleb128 0x49\r
- 963 0035 13                   .uleb128 0x13\r
- 964 0036 00                   .byte   0\r
- 965 0037 00                   .byte   0\r
- 966 0038 05                   .uleb128 0x5\r
- 967 0039 2E                   .uleb128 0x2e\r
- 968 003a 01                   .byte   0x1\r
- 969 003b 3F                   .uleb128 0x3f\r
- 970 003c 0C                   .uleb128 0xc\r
- 971 003d 03                   .uleb128 0x3\r
- 972 003e 0E                   .uleb128 0xe\r
- 973 003f 3A                   .uleb128 0x3a\r
- 974 0040 0B                   .uleb128 0xb\r
- 975 0041 3B                   .uleb128 0x3b\r
- 976 0042 0B                   .uleb128 0xb\r
- 977 0043 27                   .uleb128 0x27\r
- 978 0044 0C                   .uleb128 0xc\r
- 979 0045 11                   .uleb128 0x11\r
- 980 0046 01                   .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 23\r
-\r
-\r
- 981 0047 12                   .uleb128 0x12\r
- 982 0048 01                   .uleb128 0x1\r
- 983 0049 40                   .uleb128 0x40\r
- 984 004a 06                   .uleb128 0x6\r
- 985 004b 9742                 .uleb128 0x2117\r
- 986 004d 0C                   .uleb128 0xc\r
- 987 004e 01                   .uleb128 0x1\r
- 988 004f 13                   .uleb128 0x13\r
- 989 0050 00                   .byte   0\r
- 990 0051 00                   .byte   0\r
- 991 0052 06                   .uleb128 0x6\r
- 992 0053 898201               .uleb128 0x4109\r
- 993 0056 01                   .byte   0x1\r
- 994 0057 11                   .uleb128 0x11\r
- 995 0058 01                   .uleb128 0x1\r
- 996 0059 31                   .uleb128 0x31\r
- 997 005a 13                   .uleb128 0x13\r
- 998 005b 00                   .byte   0\r
- 999 005c 00                   .byte   0\r
- 1000 005d 07                  .uleb128 0x7\r
- 1001 005e 8A8201              .uleb128 0x410a\r
- 1002 0061 00                  .byte   0\r
- 1003 0062 02                  .uleb128 0x2\r
- 1004 0063 0A                  .uleb128 0xa\r
- 1005 0064 9142                .uleb128 0x2111\r
- 1006 0066 0A                  .uleb128 0xa\r
- 1007 0067 00                  .byte   0\r
- 1008 0068 00                  .byte   0\r
- 1009 0069 08                  .uleb128 0x8\r
- 1010 006a 2E                  .uleb128 0x2e\r
- 1011 006b 01                  .byte   0x1\r
- 1012 006c 3F                  .uleb128 0x3f\r
- 1013 006d 0C                  .uleb128 0xc\r
- 1014 006e 03                  .uleb128 0x3\r
- 1015 006f 0E                  .uleb128 0xe\r
- 1016 0070 3A                  .uleb128 0x3a\r
- 1017 0071 0B                  .uleb128 0xb\r
- 1018 0072 3B                  .uleb128 0x3b\r
- 1019 0073 0B                  .uleb128 0xb\r
- 1020 0074 27                  .uleb128 0x27\r
- 1021 0075 0C                  .uleb128 0xc\r
- 1022 0076 11                  .uleb128 0x11\r
- 1023 0077 01                  .uleb128 0x1\r
- 1024 0078 12                  .uleb128 0x12\r
- 1025 0079 01                  .uleb128 0x1\r
- 1026 007a 40                  .uleb128 0x40\r
- 1027 007b 0A                  .uleb128 0xa\r
- 1028 007c 9742                .uleb128 0x2117\r
- 1029 007e 0C                  .uleb128 0xc\r
- 1030 007f 01                  .uleb128 0x1\r
- 1031 0080 13                  .uleb128 0x13\r
- 1032 0081 00                  .byte   0\r
- 1033 0082 00                  .byte   0\r
- 1034 0083 09                  .uleb128 0x9\r
- 1035 0084 898201              .uleb128 0x4109\r
- 1036 0087 00                  .byte   0\r
- 1037 0088 11                  .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 24\r
-\r
-\r
- 1038 0089 01                  .uleb128 0x1\r
- 1039 008a 9542                .uleb128 0x2115\r
- 1040 008c 0C                  .uleb128 0xc\r
- 1041 008d 31                  .uleb128 0x31\r
- 1042 008e 13                  .uleb128 0x13\r
- 1043 008f 00                  .byte   0\r
- 1044 0090 00                  .byte   0\r
- 1045 0091 0A                  .uleb128 0xa\r
- 1046 0092 898201              .uleb128 0x4109\r
- 1047 0095 01                  .byte   0x1\r
- 1048 0096 11                  .uleb128 0x11\r
- 1049 0097 01                  .uleb128 0x1\r
- 1050 0098 9542                .uleb128 0x2115\r
- 1051 009a 0C                  .uleb128 0xc\r
- 1052 009b 31                  .uleb128 0x31\r
- 1053 009c 13                  .uleb128 0x13\r
- 1054 009d 00                  .byte   0\r
- 1055 009e 00                  .byte   0\r
- 1056 009f 0B                  .uleb128 0xb\r
- 1057 00a0 2E                  .uleb128 0x2e\r
- 1058 00a1 01                  .byte   0x1\r
- 1059 00a2 3F                  .uleb128 0x3f\r
- 1060 00a3 0C                  .uleb128 0xc\r
- 1061 00a4 03                  .uleb128 0x3\r
- 1062 00a5 0E                  .uleb128 0xe\r
- 1063 00a6 3A                  .uleb128 0x3a\r
- 1064 00a7 0B                  .uleb128 0xb\r
- 1065 00a8 3B                  .uleb128 0x3b\r
- 1066 00a9 0B                  .uleb128 0xb\r
- 1067 00aa 27                  .uleb128 0x27\r
- 1068 00ab 0C                  .uleb128 0xc\r
- 1069 00ac 49                  .uleb128 0x49\r
- 1070 00ad 13                  .uleb128 0x13\r
- 1071 00ae 11                  .uleb128 0x11\r
- 1072 00af 01                  .uleb128 0x1\r
- 1073 00b0 12                  .uleb128 0x12\r
- 1074 00b1 01                  .uleb128 0x1\r
- 1075 00b2 40                  .uleb128 0x40\r
- 1076 00b3 06                  .uleb128 0x6\r
- 1077 00b4 9742                .uleb128 0x2117\r
- 1078 00b6 0C                  .uleb128 0xc\r
- 1079 00b7 01                  .uleb128 0x1\r
- 1080 00b8 13                  .uleb128 0x13\r
- 1081 00b9 00                  .byte   0\r
- 1082 00ba 00                  .byte   0\r
- 1083 00bb 0C                  .uleb128 0xc\r
- 1084 00bc 05                  .uleb128 0x5\r
- 1085 00bd 00                  .byte   0\r
- 1086 00be 03                  .uleb128 0x3\r
- 1087 00bf 0E                  .uleb128 0xe\r
- 1088 00c0 3A                  .uleb128 0x3a\r
- 1089 00c1 0B                  .uleb128 0xb\r
- 1090 00c2 3B                  .uleb128 0x3b\r
- 1091 00c3 0B                  .uleb128 0xb\r
- 1092 00c4 49                  .uleb128 0x49\r
- 1093 00c5 13                  .uleb128 0x13\r
- 1094 00c6 02                  .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 25\r
-\r
-\r
- 1095 00c7 06                  .uleb128 0x6\r
- 1096 00c8 00                  .byte   0\r
- 1097 00c9 00                  .byte   0\r
- 1098 00ca 0D                  .uleb128 0xd\r
- 1099 00cb 34                  .uleb128 0x34\r
- 1100 00cc 00                  .byte   0\r
- 1101 00cd 03                  .uleb128 0x3\r
- 1102 00ce 0E                  .uleb128 0xe\r
- 1103 00cf 3A                  .uleb128 0x3a\r
- 1104 00d0 0B                  .uleb128 0xb\r
- 1105 00d1 3B                  .uleb128 0x3b\r
- 1106 00d2 0B                  .uleb128 0xb\r
- 1107 00d3 49                  .uleb128 0x49\r
- 1108 00d4 13                  .uleb128 0x13\r
- 1109 00d5 02                  .uleb128 0x2\r
- 1110 00d6 06                  .uleb128 0x6\r
- 1111 00d7 00                  .byte   0\r
- 1112 00d8 00                  .byte   0\r
- 1113 00d9 0E                  .uleb128 0xe\r
- 1114 00da 898201              .uleb128 0x4109\r
- 1115 00dd 01                  .byte   0x1\r
- 1116 00de 11                  .uleb128 0x11\r
- 1117 00df 01                  .uleb128 0x1\r
- 1118 00e0 31                  .uleb128 0x31\r
- 1119 00e1 13                  .uleb128 0x13\r
- 1120 00e2 01                  .uleb128 0x1\r
- 1121 00e3 13                  .uleb128 0x13\r
- 1122 00e4 00                  .byte   0\r
- 1123 00e5 00                  .byte   0\r
- 1124 00e6 0F                  .uleb128 0xf\r
- 1125 00e7 0F                  .uleb128 0xf\r
- 1126 00e8 00                  .byte   0\r
- 1127 00e9 0B                  .uleb128 0xb\r
- 1128 00ea 0B                  .uleb128 0xb\r
- 1129 00eb 49                  .uleb128 0x49\r
- 1130 00ec 13                  .uleb128 0x13\r
- 1131 00ed 00                  .byte   0\r
- 1132 00ee 00                  .byte   0\r
- 1133 00ef 10                  .uleb128 0x10\r
- 1134 00f0 898201              .uleb128 0x4109\r
- 1135 00f3 00                  .byte   0\r
- 1136 00f4 11                  .uleb128 0x11\r
- 1137 00f5 01                  .uleb128 0x1\r
- 1138 00f6 31                  .uleb128 0x31\r
- 1139 00f7 13                  .uleb128 0x13\r
- 1140 00f8 00                  .byte   0\r
- 1141 00f9 00                  .byte   0\r
- 1142 00fa 11                  .uleb128 0x11\r
- 1143 00fb 34                  .uleb128 0x34\r
- 1144 00fc 00                  .byte   0\r
- 1145 00fd 03                  .uleb128 0x3\r
- 1146 00fe 0E                  .uleb128 0xe\r
- 1147 00ff 3A                  .uleb128 0x3a\r
- 1148 0100 0B                  .uleb128 0xb\r
- 1149 0101 3B                  .uleb128 0x3b\r
- 1150 0102 0B                  .uleb128 0xb\r
- 1151 0103 49                  .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 26\r
-\r
-\r
- 1152 0104 13                  .uleb128 0x13\r
- 1153 0105 02                  .uleb128 0x2\r
- 1154 0106 0A                  .uleb128 0xa\r
- 1155 0107 00                  .byte   0\r
- 1156 0108 00                  .byte   0\r
- 1157 0109 12                  .uleb128 0x12\r
- 1158 010a 2E                  .uleb128 0x2e\r
- 1159 010b 01                  .byte   0x1\r
- 1160 010c 3F                  .uleb128 0x3f\r
- 1161 010d 0C                  .uleb128 0xc\r
- 1162 010e 03                  .uleb128 0x3\r
- 1163 010f 0E                  .uleb128 0xe\r
- 1164 0110 3A                  .uleb128 0x3a\r
- 1165 0111 0B                  .uleb128 0xb\r
- 1166 0112 3B                  .uleb128 0x3b\r
- 1167 0113 0B                  .uleb128 0xb\r
- 1168 0114 27                  .uleb128 0x27\r
- 1169 0115 0C                  .uleb128 0xc\r
- 1170 0116 3C                  .uleb128 0x3c\r
- 1171 0117 0C                  .uleb128 0xc\r
- 1172 0118 01                  .uleb128 0x1\r
- 1173 0119 13                  .uleb128 0x13\r
- 1174 011a 00                  .byte   0\r
- 1175 011b 00                  .byte   0\r
- 1176 011c 13                  .uleb128 0x13\r
- 1177 011d 05                  .uleb128 0x5\r
- 1178 011e 00                  .byte   0\r
- 1179 011f 49                  .uleb128 0x49\r
- 1180 0120 13                  .uleb128 0x13\r
- 1181 0121 00                  .byte   0\r
- 1182 0122 00                  .byte   0\r
- 1183 0123 14                  .uleb128 0x14\r
- 1184 0124 2E                  .uleb128 0x2e\r
- 1185 0125 00                  .byte   0\r
- 1186 0126 3F                  .uleb128 0x3f\r
- 1187 0127 0C                  .uleb128 0xc\r
- 1188 0128 03                  .uleb128 0x3\r
- 1189 0129 0E                  .uleb128 0xe\r
- 1190 012a 3A                  .uleb128 0x3a\r
- 1191 012b 0B                  .uleb128 0xb\r
- 1192 012c 3B                  .uleb128 0x3b\r
- 1193 012d 0B                  .uleb128 0xb\r
- 1194 012e 27                  .uleb128 0x27\r
- 1195 012f 0C                  .uleb128 0xc\r
- 1196 0130 3C                  .uleb128 0x3c\r
- 1197 0131 0C                  .uleb128 0xc\r
- 1198 0132 00                  .byte   0\r
- 1199 0133 00                  .byte   0\r
- 1200 0134 15                  .uleb128 0x15\r
- 1201 0135 26                  .uleb128 0x26\r
- 1202 0136 00                  .byte   0\r
- 1203 0137 49                  .uleb128 0x49\r
- 1204 0138 13                  .uleb128 0x13\r
- 1205 0139 00                  .byte   0\r
- 1206 013a 00                  .byte   0\r
- 1207 013b 16                  .uleb128 0x16\r
- 1208 013c 2E                  .uleb128 0x2e\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 27\r
-\r
-\r
- 1209 013d 01                  .byte   0x1\r
- 1210 013e 3F                  .uleb128 0x3f\r
- 1211 013f 0C                  .uleb128 0xc\r
- 1212 0140 03                  .uleb128 0x3\r
- 1213 0141 0E                  .uleb128 0xe\r
- 1214 0142 3A                  .uleb128 0x3a\r
- 1215 0143 0B                  .uleb128 0xb\r
- 1216 0144 3B                  .uleb128 0x3b\r
- 1217 0145 0B                  .uleb128 0xb\r
- 1218 0146 27                  .uleb128 0x27\r
- 1219 0147 0C                  .uleb128 0xc\r
- 1220 0148 49                  .uleb128 0x49\r
- 1221 0149 13                  .uleb128 0x13\r
- 1222 014a 3C                  .uleb128 0x3c\r
- 1223 014b 0C                  .uleb128 0xc\r
- 1224 014c 01                  .uleb128 0x1\r
- 1225 014d 13                  .uleb128 0x13\r
- 1226 014e 00                  .byte   0\r
- 1227 014f 00                  .byte   0\r
- 1228 0150 17                  .uleb128 0x17\r
- 1229 0151 2E                  .uleb128 0x2e\r
- 1230 0152 00                  .byte   0\r
- 1231 0153 3F                  .uleb128 0x3f\r
- 1232 0154 0C                  .uleb128 0xc\r
- 1233 0155 03                  .uleb128 0x3\r
- 1234 0156 0E                  .uleb128 0xe\r
- 1235 0157 3A                  .uleb128 0x3a\r
- 1236 0158 0B                  .uleb128 0xb\r
- 1237 0159 3B                  .uleb128 0x3b\r
- 1238 015a 0B                  .uleb128 0xb\r
- 1239 015b 27                  .uleb128 0x27\r
- 1240 015c 0C                  .uleb128 0xc\r
- 1241 015d 49                  .uleb128 0x49\r
- 1242 015e 13                  .uleb128 0x13\r
- 1243 015f 3C                  .uleb128 0x3c\r
- 1244 0160 0C                  .uleb128 0xc\r
- 1245 0161 00                  .byte   0\r
- 1246 0162 00                  .byte   0\r
- 1247 0163 18                  .uleb128 0x18\r
- 1248 0164 2E                  .uleb128 0x2e\r
- 1249 0165 01                  .byte   0x1\r
- 1250 0166 3F                  .uleb128 0x3f\r
- 1251 0167 0C                  .uleb128 0xc\r
- 1252 0168 03                  .uleb128 0x3\r
- 1253 0169 0E                  .uleb128 0xe\r
- 1254 016a 3A                  .uleb128 0x3a\r
- 1255 016b 0B                  .uleb128 0xb\r
- 1256 016c 3B                  .uleb128 0x3b\r
- 1257 016d 0B                  .uleb128 0xb\r
- 1258 016e 27                  .uleb128 0x27\r
- 1259 016f 0C                  .uleb128 0xc\r
- 1260 0170 49                  .uleb128 0x49\r
- 1261 0171 13                  .uleb128 0x13\r
- 1262 0172 3C                  .uleb128 0x3c\r
- 1263 0173 0C                  .uleb128 0xc\r
- 1264 0174 00                  .byte   0\r
- 1265 0175 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 28\r
-\r
-\r
- 1266 0176 00                  .byte   0\r
- 1267                          .section        .debug_loc,"",%progbits\r
- 1268                  .Ldebug_loc0:\r
- 1269                  .LLST0:\r
- 1270 0000 00000000            .4byte  .LFB0\r
- 1271 0004 02000000            .4byte  .LCFI0\r
- 1272 0008 0200                .2byte  0x2\r
- 1273 000a 7D                  .byte   0x7d\r
- 1274 000b 00                  .sleb128 0\r
- 1275 000c 02000000            .4byte  .LCFI0\r
- 1276 0010 18000000            .4byte  .LFE0\r
- 1277 0014 0200                .2byte  0x2\r
- 1278 0016 7D                  .byte   0x7d\r
- 1279 0017 08                  .sleb128 8\r
- 1280 0018 00000000            .4byte  0\r
- 1281 001c 00000000            .4byte  0\r
- 1282                  .LLST1:\r
- 1283 0020 00000000            .4byte  .LFB3\r
- 1284 0024 02000000            .4byte  .LCFI1\r
- 1285 0028 0200                .2byte  0x2\r
- 1286 002a 7D                  .byte   0x7d\r
- 1287 002b 00                  .sleb128 0\r
- 1288 002c 02000000            .4byte  .LCFI1\r
- 1289 0030 54000000            .4byte  .LFE3\r
- 1290 0034 0200                .2byte  0x2\r
- 1291 0036 7D                  .byte   0x7d\r
- 1292 0037 18                  .sleb128 24\r
- 1293 0038 00000000            .4byte  0\r
- 1294 003c 00000000            .4byte  0\r
- 1295                  .LLST2:\r
- 1296 0040 00000000            .4byte  .LVL3\r
- 1297 0044 08000000            .4byte  .LVL4\r
- 1298 0048 0100                .2byte  0x1\r
- 1299 004a 50                  .byte   0x50\r
- 1300 004b 08000000            .4byte  .LVL4\r
- 1301 004f 1E000000            .4byte  .LVL9\r
- 1302 0053 0100                .2byte  0x1\r
- 1303 0055 57                  .byte   0x57\r
- 1304 0056 1E000000            .4byte  .LVL9\r
- 1305 005a 54000000            .4byte  .LFE3\r
- 1306 005e 0400                .2byte  0x4\r
- 1307 0060 F3                  .byte   0xf3\r
- 1308 0061 01                  .uleb128 0x1\r
- 1309 0062 50                  .byte   0x50\r
- 1310 0063 9F                  .byte   0x9f\r
- 1311 0064 00000000            .4byte  0\r
- 1312 0068 00000000            .4byte  0\r
- 1313                  .LLST3:\r
- 1314 006c 00000000            .4byte  .LVL3\r
- 1315 0070 0C000000            .4byte  .LVL5\r
- 1316 0074 0100                .2byte  0x1\r
- 1317 0076 51                  .byte   0x51\r
- 1318 0077 0C000000            .4byte  .LVL5\r
- 1319 007b 54000000            .4byte  .LFE3\r
- 1320 007f 0400                .2byte  0x4\r
- 1321 0081 F3                  .byte   0xf3\r
- 1322 0082 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 29\r
-\r
-\r
- 1323 0083 51                  .byte   0x51\r
- 1324 0084 9F                  .byte   0x9f\r
- 1325 0085 00000000            .4byte  0\r
- 1326 0089 00000000            .4byte  0\r
- 1327                  .LLST4:\r
- 1328 008d 00000000            .4byte  .LVL3\r
- 1329 0091 0E000000            .4byte  .LVL6\r
- 1330 0095 0100                .2byte  0x1\r
- 1331 0097 52                  .byte   0x52\r
- 1332 0098 0E000000            .4byte  .LVL6\r
- 1333 009c 54000000            .4byte  .LFE3\r
- 1334 00a0 0100                .2byte  0x1\r
- 1335 00a2 55                  .byte   0x55\r
- 1336 00a3 00000000            .4byte  0\r
- 1337 00a7 00000000            .4byte  0\r
- 1338                  .LLST5:\r
- 1339 00ab 00000000            .4byte  .LVL3\r
- 1340 00af 13000000            .4byte  .LVL7-1\r
- 1341 00b3 0100                .2byte  0x1\r
- 1342 00b5 53                  .byte   0x53\r
- 1343 00b6 13000000            .4byte  .LVL7-1\r
- 1344 00ba 54000000            .4byte  .LFE3\r
- 1345 00be 0400                .2byte  0x4\r
- 1346 00c0 F3                  .byte   0xf3\r
- 1347 00c1 01                  .uleb128 0x1\r
- 1348 00c2 53                  .byte   0x53\r
- 1349 00c3 9F                  .byte   0x9f\r
- 1350 00c4 00000000            .4byte  0\r
- 1351 00c8 00000000            .4byte  0\r
- 1352                  .LLST6:\r
- 1353 00cc 1C000000            .4byte  .LVL8\r
- 1354 00d0 1E000000            .4byte  .LVL9\r
- 1355 00d4 0200                .2byte  0x2\r
- 1356 00d6 30                  .byte   0x30\r
- 1357 00d7 9F                  .byte   0x9f\r
- 1358 00d8 1E000000            .4byte  .LVL9\r
- 1359 00dc 2E000000            .4byte  .LVL11\r
- 1360 00e0 0100                .2byte  0x1\r
- 1361 00e2 54                  .byte   0x54\r
- 1362 00e3 2E000000            .4byte  .LVL11\r
- 1363 00e7 3C000000            .4byte  .LVL13\r
- 1364 00eb 0100                .2byte  0x1\r
- 1365 00ed 57                  .byte   0x57\r
- 1366 00ee 00000000            .4byte  0\r
- 1367 00f2 00000000            .4byte  0\r
- 1368                  .LLST7:\r
- 1369 00f6 46000000            .4byte  .LVL15\r
- 1370 00fa 4A000000            .4byte  .LVL16\r
- 1371 00fe 0200                .2byte  0x2\r
- 1372 0100 30                  .byte   0x30\r
- 1373 0101 9F                  .byte   0x9f\r
- 1374 0102 4C000000            .4byte  .LVL17\r
- 1375 0106 54000000            .4byte  .LFE3\r
- 1376 010a 0100                .2byte  0x1\r
- 1377 010c 50                  .byte   0x50\r
- 1378 010d 00000000            .4byte  0\r
- 1379 0111 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 30\r
-\r
-\r
- 1380                  .LLST8:\r
- 1381 0115 00000000            .4byte  .LFB4\r
- 1382 0119 04000000            .4byte  .LCFI2\r
- 1383 011d 0200                .2byte  0x2\r
- 1384 011f 7D                  .byte   0x7d\r
- 1385 0120 00                  .sleb128 0\r
- 1386 0121 04000000            .4byte  .LCFI2\r
- 1387 0125 B0000000            .4byte  .LFE4\r
- 1388 0129 0200                .2byte  0x2\r
- 1389 012b 7D                  .byte   0x7d\r
- 1390 012c 18                  .sleb128 24\r
- 1391 012d 00000000            .4byte  0\r
- 1392 0131 00000000            .4byte  0\r
- 1393                  .LLST9:\r
- 1394 0135 00000000            .4byte  .LVL18\r
- 1395 0139 18000000            .4byte  .LVL22\r
- 1396 013d 0100                .2byte  0x1\r
- 1397 013f 50                  .byte   0x50\r
- 1398 0140 18000000            .4byte  .LVL22\r
- 1399 0144 4C000000            .4byte  .LVL30\r
- 1400 0148 0100                .2byte  0x1\r
- 1401 014a 58                  .byte   0x58\r
- 1402 014b 4C000000            .4byte  .LVL30\r
- 1403 014f 4F000000            .4byte  .LVL31-1\r
- 1404 0153 0100                .2byte  0x1\r
- 1405 0155 50                  .byte   0x50\r
- 1406 0156 4F000000            .4byte  .LVL31-1\r
- 1407 015a B0000000            .4byte  .LFE4\r
- 1408 015e 0100                .2byte  0x1\r
- 1409 0160 58                  .byte   0x58\r
- 1410 0161 00000000            .4byte  0\r
- 1411 0165 00000000            .4byte  0\r
- 1412                  .LLST10:\r
- 1413 0169 00000000            .4byte  .LVL18\r
- 1414 016d 14000000            .4byte  .LVL21\r
- 1415 0171 0100                .2byte  0x1\r
- 1416 0173 51                  .byte   0x51\r
- 1417 0174 14000000            .4byte  .LVL21\r
- 1418 0178 18000000            .4byte  .LVL22\r
- 1419 017c 1600                .2byte  0x16\r
- 1420 017e 71                  .byte   0x71\r
- 1421 017f 00                  .sleb128 0\r
- 1422 0180 12                  .byte   0x12\r
- 1423 0181 0A                  .byte   0xa\r
- 1424 0182 FFFF                .2byte  0xffff\r
- 1425 0184 1A                  .byte   0x1a\r
- 1426 0185 08                  .byte   0x8\r
- 1427 0186 40                  .byte   0x40\r
- 1428 0187 16                  .byte   0x16\r
- 1429 0188 14                  .byte   0x14\r
- 1430 0189 0A                  .byte   0xa\r
- 1431 018a FFFF                .2byte  0xffff\r
- 1432 018c 1A                  .byte   0x1a\r
- 1433 018d 2D                  .byte   0x2d\r
- 1434 018e 28                  .byte   0x28\r
- 1435 018f 0100                .2byte  0x1\r
- 1436 0191 16                  .byte   0x16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 31\r
-\r
-\r
- 1437 0192 13                  .byte   0x13\r
- 1438 0193 9F                  .byte   0x9f\r
- 1439 0194 18000000            .4byte  .LVL22\r
- 1440 0198 4C000000            .4byte  .LVL30\r
- 1441 019c 1600                .2byte  0x16\r
- 1442 019e 77                  .byte   0x77\r
- 1443 019f 00                  .sleb128 0\r
- 1444 01a0 12                  .byte   0x12\r
- 1445 01a1 0A                  .byte   0xa\r
- 1446 01a2 FFFF                .2byte  0xffff\r
- 1447 01a4 1A                  .byte   0x1a\r
- 1448 01a5 08                  .byte   0x8\r
- 1449 01a6 40                  .byte   0x40\r
- 1450 01a7 16                  .byte   0x16\r
- 1451 01a8 14                  .byte   0x14\r
- 1452 01a9 0A                  .byte   0xa\r
- 1453 01aa FFFF                .2byte  0xffff\r
- 1454 01ac 1A                  .byte   0x1a\r
- 1455 01ad 2D                  .byte   0x2d\r
- 1456 01ae 28                  .byte   0x28\r
- 1457 01af 0100                .2byte  0x1\r
- 1458 01b1 16                  .byte   0x16\r
- 1459 01b2 13                  .byte   0x13\r
- 1460 01b3 9F                  .byte   0x9f\r
- 1461 01b4 4C000000            .4byte  .LVL30\r
- 1462 01b8 4F000000            .4byte  .LVL31-1\r
- 1463 01bc 1600                .2byte  0x16\r
- 1464 01be 71                  .byte   0x71\r
- 1465 01bf 00                  .sleb128 0\r
- 1466 01c0 12                  .byte   0x12\r
- 1467 01c1 0A                  .byte   0xa\r
- 1468 01c2 FFFF                .2byte  0xffff\r
- 1469 01c4 1A                  .byte   0x1a\r
- 1470 01c5 08                  .byte   0x8\r
- 1471 01c6 40                  .byte   0x40\r
- 1472 01c7 16                  .byte   0x16\r
- 1473 01c8 14                  .byte   0x14\r
- 1474 01c9 0A                  .byte   0xa\r
- 1475 01ca FFFF                .2byte  0xffff\r
- 1476 01cc 1A                  .byte   0x1a\r
- 1477 01cd 2D                  .byte   0x2d\r
- 1478 01ce 28                  .byte   0x28\r
- 1479 01cf 0100                .2byte  0x1\r
- 1480 01d1 16                  .byte   0x16\r
- 1481 01d2 13                  .byte   0x13\r
- 1482 01d3 9F                  .byte   0x9f\r
- 1483 01d4 4F000000            .4byte  .LVL31-1\r
- 1484 01d8 B0000000            .4byte  .LFE4\r
- 1485 01dc 1600                .2byte  0x16\r
- 1486 01de 77                  .byte   0x77\r
- 1487 01df 00                  .sleb128 0\r
- 1488 01e0 12                  .byte   0x12\r
- 1489 01e1 0A                  .byte   0xa\r
- 1490 01e2 FFFF                .2byte  0xffff\r
- 1491 01e4 1A                  .byte   0x1a\r
- 1492 01e5 08                  .byte   0x8\r
- 1493 01e6 40                  .byte   0x40\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 32\r
-\r
-\r
- 1494 01e7 16                  .byte   0x16\r
- 1495 01e8 14                  .byte   0x14\r
- 1496 01e9 0A                  .byte   0xa\r
- 1497 01ea FFFF                .2byte  0xffff\r
- 1498 01ec 1A                  .byte   0x1a\r
- 1499 01ed 2D                  .byte   0x2d\r
- 1500 01ee 28                  .byte   0x28\r
- 1501 01ef 0100                .2byte  0x1\r
- 1502 01f1 16                  .byte   0x16\r
- 1503 01f2 13                  .byte   0x13\r
- 1504 01f3 9F                  .byte   0x9f\r
- 1505 01f4 00000000            .4byte  0\r
- 1506 01f8 00000000            .4byte  0\r
- 1507                  .LLST11:\r
- 1508 01fc 00000000            .4byte  .LVL18\r
- 1509 0200 08000000            .4byte  .LVL19\r
- 1510 0204 0100                .2byte  0x1\r
- 1511 0206 52                  .byte   0x52\r
- 1512 0207 08000000            .4byte  .LVL19\r
- 1513 020b B0000000            .4byte  .LFE4\r
- 1514 020f 0100                .2byte  0x1\r
- 1515 0211 55                  .byte   0x55\r
- 1516 0212 00000000            .4byte  0\r
- 1517 0216 00000000            .4byte  0\r
- 1518                  .LLST12:\r
- 1519 021a 00000000            .4byte  .LVL18\r
- 1520 021e 0A000000            .4byte  .LVL20\r
- 1521 0222 0100                .2byte  0x1\r
- 1522 0224 53                  .byte   0x53\r
- 1523 0225 0A000000            .4byte  .LVL20\r
- 1524 0229 B0000000            .4byte  .LFE4\r
- 1525 022d 0400                .2byte  0x4\r
- 1526 022f F3                  .byte   0xf3\r
- 1527 0230 01                  .uleb128 0x1\r
- 1528 0231 53                  .byte   0x53\r
- 1529 0232 9F                  .byte   0x9f\r
- 1530 0233 00000000            .4byte  0\r
- 1531 0237 00000000            .4byte  0\r
- 1532                  .LLST13:\r
- 1533 023b 9C000000            .4byte  .LVL42\r
- 1534 023f A2000000            .4byte  .LVL43\r
- 1535 0243 0200                .2byte  0x2\r
- 1536 0245 30                  .byte   0x30\r
- 1537 0246 9F                  .byte   0x9f\r
- 1538 0247 A6000000            .4byte  .LVL44\r
- 1539 024b A8000000            .4byte  .LVL45\r
- 1540 024f 0200                .2byte  0x2\r
- 1541 0251 40                  .byte   0x40\r
- 1542 0252 9F                  .byte   0x9f\r
- 1543 0253 A8000000            .4byte  .LVL45\r
- 1544 0257 B0000000            .4byte  .LFE4\r
- 1545 025b 0100                .2byte  0x1\r
- 1546 025d 50                  .byte   0x50\r
- 1547 025e 00000000            .4byte  0\r
- 1548 0262 00000000            .4byte  0\r
- 1549                  .LLST14:\r
- 1550 0266 14000000            .4byte  .LVL21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 33\r
-\r
-\r
- 1551 026a 18000000            .4byte  .LVL22\r
- 1552 026e 0200                .2byte  0x2\r
- 1553 0270 30                  .byte   0x30\r
- 1554 0271 9F                  .byte   0x9f\r
- 1555 0272 18000000            .4byte  .LVL22\r
- 1556 0276 26000000            .4byte  .LVL24\r
- 1557 027a 0100                .2byte  0x1\r
- 1558 027c 54                  .byte   0x54\r
- 1559 027d 26000000            .4byte  .LVL24\r
- 1560 0281 36000000            .4byte  .LVL26\r
- 1561 0285 0100                .2byte  0x1\r
- 1562 0287 56                  .byte   0x56\r
- 1563 0288 36000000            .4byte  .LVL26\r
- 1564 028c 4C000000            .4byte  .LVL30\r
- 1565 0290 0100                .2byte  0x1\r
- 1566 0292 54                  .byte   0x54\r
- 1567 0293 4C000000            .4byte  .LVL30\r
- 1568 0297 64000000            .4byte  .LVL34\r
- 1569 029b 0200                .2byte  0x2\r
- 1570 029d 30                  .byte   0x30\r
- 1571 029e 9F                  .byte   0x9f\r
- 1572 029f 64000000            .4byte  .LVL34\r
- 1573 02a3 6C000000            .4byte  .LVL35\r
- 1574 02a7 0100                .2byte  0x1\r
- 1575 02a9 54                  .byte   0x54\r
- 1576 02aa 6C000000            .4byte  .LVL35\r
- 1577 02ae 76000000            .4byte  .LVL37\r
- 1578 02b2 0100                .2byte  0x1\r
- 1579 02b4 56                  .byte   0x56\r
- 1580 02b5 76000000            .4byte  .LVL37\r
- 1581 02b9 84000000            .4byte  .LVL39\r
- 1582 02bd 0100                .2byte  0x1\r
- 1583 02bf 54                  .byte   0x54\r
- 1584 02c0 00000000            .4byte  0\r
- 1585 02c4 00000000            .4byte  0\r
- 1586                          .section        .debug_aranges,"",%progbits\r
- 1587 0000 3C000000            .4byte  0x3c\r
- 1588 0004 0200                .2byte  0x2\r
- 1589 0006 00000000            .4byte  .Ldebug_info0\r
- 1590 000a 04                  .byte   0x4\r
- 1591 000b 00                  .byte   0\r
- 1592 000c 0000                .2byte  0\r
- 1593 000e 0000                .2byte  0\r
- 1594 0010 00000000            .4byte  .LFB0\r
- 1595 0014 18000000            .4byte  .LFE0-.LFB0\r
- 1596 0018 00000000            .4byte  .LFB1\r
- 1597 001c 04000000            .4byte  .LFE1-.LFB1\r
- 1598 0020 00000000            .4byte  .LFB2\r
- 1599 0024 06000000            .4byte  .LFE2-.LFB2\r
- 1600 0028 00000000            .4byte  .LFB3\r
- 1601 002c 54000000            .4byte  .LFE3-.LFB3\r
- 1602 0030 00000000            .4byte  .LFB4\r
- 1603 0034 B0000000            .4byte  .LFE4-.LFB4\r
- 1604 0038 00000000            .4byte  0\r
- 1605 003c 00000000            .4byte  0\r
- 1606                          .section        .debug_ranges,"",%progbits\r
- 1607                  .Ldebug_ranges0:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 34\r
-\r
-\r
- 1608 0000 00000000            .4byte  .LFB0\r
- 1609 0004 18000000            .4byte  .LFE0\r
- 1610 0008 00000000            .4byte  .LFB1\r
- 1611 000c 04000000            .4byte  .LFE1\r
- 1612 0010 00000000            .4byte  .LFB2\r
- 1613 0014 06000000            .4byte  .LFE2\r
- 1614 0018 00000000            .4byte  .LFB3\r
- 1615 001c 54000000            .4byte  .LFE3\r
- 1616 0020 00000000            .4byte  .LFB4\r
- 1617 0024 B0000000            .4byte  .LFE4\r
- 1618 0028 00000000            .4byte  0\r
- 1619 002c 00000000            .4byte  0\r
- 1620                          .section        .debug_line,"",%progbits\r
- 1621                  .Ldebug_line0:\r
- 1622 0000 47010000            .section        .debug_str,"MS",%progbits,1\r
- 1622      02005F00 \r
- 1622      00000201 \r
- 1622      FB0E0D00 \r
- 1622      01010101 \r
- 1623                  .LASF15:\r
- 1624 0000 63797374            .ascii  "cystatus\000"\r
- 1624      61747573 \r
- 1624      00\r
- 1625                  .LASF25:\r
- 1626 0009 73746174            .ascii  "status\000"\r
- 1626      757300\r
- 1627                  .LASF22:\r
- 1628 0010 636F756E            .ascii  "count\000"\r
- 1628      7400\r
- 1629                  .LASF3:\r
- 1630 0016 73686F72            .ascii  "short unsigned int\000"\r
- 1630      7420756E \r
- 1630      7369676E \r
- 1630      65642069 \r
- 1630      6E7400\r
- 1631                  .LASF19:\r
- 1632 0029 55534246            .ascii  "USBFS_CyBtldrCommReset\000"\r
- 1632      535F4379 \r
- 1632      42746C64 \r
- 1632      72436F6D \r
- 1632      6D526573 \r
- 1633                  .LASF30:\r
- 1634 0040 55534246            .ascii  "USBFS_Start\000"\r
- 1634      535F5374 \r
- 1634      61727400 \r
- 1635                  .LASF20:\r
- 1636 004c 70446174            .ascii  "pData\000"\r
- 1636      6100\r
- 1637                  .LASF17:\r
- 1638 0052 55534246            .ascii  "USBFS_CyBtldrCommStart\000"\r
- 1638      535F4379 \r
- 1638      42746C64 \r
- 1638      72436F6D \r
- 1638      6D537461 \r
- 1639                  .LASF12:\r
- 1640 0069 666C6F61            .ascii  "float\000"\r
- 1640      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 35\r
-\r
-\r
- 1641                  .LASF40:\r
- 1642 006f 55534246            .ascii  "USBFS_Stop\000"\r
- 1642      535F5374 \r
- 1642      6F7000\r
- 1643                  .LASF21:\r
- 1644 007a 73697A65            .ascii  "size\000"\r
- 1644      00\r
- 1645                  .LASF5:\r
- 1646 007f 6C6F6E67            .ascii  "long unsigned int\000"\r
- 1646      20756E73 \r
- 1646      69676E65 \r
- 1646      6420696E \r
- 1646      7400\r
- 1647                  .LASF39:\r
- 1648 0091 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 1648      43534932 \r
- 1648      53445C73 \r
- 1648      6F667477 \r
- 1648      6172655C \r
- 1649 00c0 6E00                .ascii  "n\000"\r
- 1650                  .LASF9:\r
- 1651 00c2 75696E74            .ascii  "uint8\000"\r
- 1651      3800\r
- 1652                  .LASF1:\r
- 1653 00c8 756E7369            .ascii  "unsigned char\000"\r
- 1653      676E6564 \r
- 1653      20636861 \r
- 1653      7200\r
- 1654                  .LASF13:\r
- 1655 00d6 646F7562            .ascii  "double\000"\r
- 1655      6C6500\r
- 1656                  .LASF36:\r
- 1657 00dd 55534246            .ascii  "USBFS_ReadOutEP\000"\r
- 1657      535F5265 \r
- 1657      61644F75 \r
- 1657      74455000 \r
- 1658                  .LASF26:\r
- 1659 00ed 55534246            .ascii  "USBFS_CyBtldrCommWrite\000"\r
- 1659      535F4379 \r
- 1659      42746C64 \r
- 1659      72436F6D \r
- 1659      6D577269 \r
- 1660                  .LASF10:\r
- 1661 0104 75696E74            .ascii  "uint16\000"\r
- 1661      313600\r
- 1662                  .LASF11:\r
- 1663 010b 75696E74            .ascii  "uint32\000"\r
- 1663      333200\r
- 1664                  .LASF34:\r
- 1665 0112 55534246            .ascii  "USBFS_GetConfiguration\000"\r
- 1665      535F4765 \r
- 1665      74436F6E \r
- 1665      66696775 \r
- 1665      72617469 \r
- 1666                  .LASF8:\r
- 1667 0129 756E7369            .ascii  "unsigned int\000"\r
- 1667      676E6564 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 36\r
-\r
-\r
- 1667      20696E74 \r
- 1667      00\r
- 1668                  .LASF7:\r
- 1669 0136 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1669      206C6F6E \r
- 1669      6720756E \r
- 1669      7369676E \r
- 1669      65642069 \r
- 1670                  .LASF31:\r
- 1671 014d 55534246            .ascii  "USBFS_EnableOutEP\000"\r
- 1671      535F456E \r
- 1671      61626C65 \r
- 1671      4F757445 \r
- 1671      5000\r
- 1672                  .LASF27:\r
- 1673 015f 55534246            .ascii  "USBFS_CyBtldrCommRead\000"\r
- 1673      535F4379 \r
- 1673      42746C64 \r
- 1673      72436F6D \r
- 1673      6D526561 \r
- 1674                  .LASF23:\r
- 1675 0175 74696D65            .ascii  "timeOut\000"\r
- 1675      4F757400 \r
- 1676                  .LASF24:\r
- 1677 017d 74696D65            .ascii  "time\000"\r
- 1677      00\r
- 1678                  .LASF16:\r
- 1679 0182 73697A65            .ascii  "sizetype\000"\r
- 1679      74797065 \r
- 1679      00\r
- 1680                  .LASF6:\r
- 1681 018b 6C6F6E67            .ascii  "long long int\000"\r
- 1681      206C6F6E \r
- 1681      6720696E \r
- 1681      7400\r
- 1682                  .LASF14:\r
- 1683 0199 63686172            .ascii  "char\000"\r
- 1683      00\r
- 1684                  .LASF32:\r
- 1685 019e 55534246            .ascii  "USBFS_LoadInEP\000"\r
- 1685      535F4C6F \r
- 1685      6164496E \r
- 1685      455000\r
- 1686                  .LASF2:\r
- 1687 01ad 73686F72            .ascii  "short int\000"\r
- 1687      7420696E \r
- 1687      7400\r
- 1688                  .LASF37:\r
- 1689 01b7 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 1689      4320342E \r
- 1689      372E3320 \r
- 1689      32303133 \r
- 1689      30333132 \r
- 1690 01ea 616E6368            .ascii  "anch revision 196615]\000"\r
- 1690      20726576 \r
- 1690      6973696F \r
- 1690      6E203139 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc8co29w.s                      page 37\r
-\r
-\r
- 1690      36363135 \r
- 1691                  .LASF41:\r
- 1692 0200 55534246            .ascii  "USBFS_GetEPState\000"\r
- 1692      535F4765 \r
- 1692      74455053 \r
- 1692      74617465 \r
- 1692      00\r
- 1693                  .LASF4:\r
- 1694 0211 6C6F6E67            .ascii  "long int\000"\r
- 1694      20696E74 \r
- 1694      00\r
- 1695                  .LASF18:\r
- 1696 021a 55534246            .ascii  "USBFS_CyBtldrCommStop\000"\r
- 1696      535F4379 \r
- 1696      42746C64 \r
- 1696      72436F6D \r
- 1696      6D53746F \r
- 1697                  .LASF0:\r
- 1698 0230 7369676E            .ascii  "signed char\000"\r
- 1698      65642063 \r
- 1698      68617200 \r
- 1699                  .LASF29:\r
- 1700 023c 55534246            .ascii  "USBFS_started\000"\r
- 1700      535F7374 \r
- 1700      61727465 \r
- 1700      6400\r
- 1701                  .LASF28:\r
- 1702 024a 55534246            .ascii  "USBFS_universalTime\000"\r
- 1702      535F756E \r
- 1702      69766572 \r
- 1702      73616C54 \r
- 1702      696D6500 \r
- 1703                  .LASF33:\r
- 1704 025e 43794465            .ascii  "CyDelay\000"\r
- 1704      6C617900 \r
- 1705                  .LASF38:\r
- 1706 0266 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_boot.c\000"\r
- 1706      6E657261 \r
- 1706      7465645F \r
- 1706      536F7572 \r
- 1706      63655C50 \r
- 1707                  .LASF35:\r
- 1708 028c 55534246            .ascii  "USBFS_IsConfigurationChanged\000"\r
- 1708      535F4973 \r
- 1708      436F6E66 \r
- 1708      69677572 \r
- 1708      6174696F \r
- 1709                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.o
deleted file mode 100755 (executable)
index f6a2441..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_boot.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.lst
deleted file mode 100755 (executable)
index c693675..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.lst
+++ /dev/null
@@ -1,239 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc3vPMDe.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_cdc.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                   .Letext0:\r
-  19                           .section        .debug_info,"",%progbits\r
-  20                   .Ldebug_info0:\r
-  21 0000 7C000000             .4byte  0x7c\r
-  22 0004 0200                 .2byte  0x2\r
-  23 0006 00000000             .4byte  .Ldebug_abbrev0\r
-  24 000a 04                   .byte   0x4\r
-  25 000b 01                   .uleb128 0x1\r
-  26 000c 1B000000             .4byte  .LASF13\r
-  27 0010 01                   .byte   0x1\r
-  28 0011 8D000000             .4byte  .LASF14\r
-  29 0015 04010000             .4byte  .LASF15\r
-  30 0019 00000000             .4byte  .Ldebug_line0\r
-  31 001d 02                   .uleb128 0x2\r
-  32 001e 01                   .byte   0x1\r
-  33 001f 06                   .byte   0x6\r
-  34 0020 E8000000             .4byte  .LASF0\r
-  35 0024 02                   .uleb128 0x2\r
-  36 0025 01                   .byte   0x1\r
-  37 0026 08                   .byte   0x8\r
-  38 0027 B2000000             .4byte  .LASF1\r
-  39 002b 02                   .uleb128 0x2\r
-  40 002c 02                   .byte   0x2\r
-  41 002d 05                   .byte   0x5\r
-  42 002e FA000000             .4byte  .LASF2\r
-  43 0032 02                   .uleb128 0x2\r
-  44 0033 02                   .byte   0x2\r
-  45 0034 07                   .byte   0x7\r
-  46 0035 D5000000             .4byte  .LASF3\r
-  47 0039 02                   .uleb128 0x2\r
-  48 003a 04                   .byte   0x4\r
-  49 003b 05                   .byte   0x5\r
-  50 003c C5000000             .4byte  .LASF4\r
-  51 0040 02                   .uleb128 0x2\r
-  52 0041 04                   .byte   0x4\r
-  53 0042 07                   .byte   0x7\r
-  54 0043 64000000             .4byte  .LASF5\r
-  55 0047 02                   .uleb128 0x2\r
-  56 0048 08                   .byte   0x8\r
-  57 0049 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc3vPMDe.s                      page 2\r
-\r
-\r
-  58 004a 00000000             .4byte  .LASF6\r
-  59 004e 02                   .uleb128 0x2\r
-  60 004f 08                   .byte   0x8\r
-  61 0050 07                   .byte   0x7\r
-  62 0051 76000000             .4byte  .LASF7\r
-  63 0055 03                   .uleb128 0x3\r
-  64 0056 04                   .byte   0x4\r
-  65 0057 05                   .byte   0x5\r
-  66 0058 696E7400             .ascii  "int\000"\r
-  67 005c 02                   .uleb128 0x2\r
-  68 005d 04                   .byte   0x4\r
-  69 005e 07                   .byte   0x7\r
-  70 005f 0E000000             .4byte  .LASF8\r
-  71 0063 02                   .uleb128 0x2\r
-  72 0064 04                   .byte   0x4\r
-  73 0065 04                   .byte   0x4\r
-  74 0066 F4000000             .4byte  .LASF9\r
-  75 006a 02                   .uleb128 0x2\r
-  76 006b 08                   .byte   0x8\r
-  77 006c 04                   .byte   0x4\r
-  78 006d CE000000             .4byte  .LASF10\r
-  79 0071 02                   .uleb128 0x2\r
-  80 0072 01                   .byte   0x1\r
-  81 0073 08                   .byte   0x8\r
-  82 0074 C0000000             .4byte  .LASF11\r
-  83 0078 02                   .uleb128 0x2\r
-  84 0079 04                   .byte   0x4\r
-  85 007a 07                   .byte   0x7\r
-  86 007b 35010000             .4byte  .LASF12\r
-  87 007f 00                   .byte   0\r
-  88                           .section        .debug_abbrev,"",%progbits\r
-  89                   .Ldebug_abbrev0:\r
-  90 0000 01                   .uleb128 0x1\r
-  91 0001 11                   .uleb128 0x11\r
-  92 0002 01                   .byte   0x1\r
-  93 0003 25                   .uleb128 0x25\r
-  94 0004 0E                   .uleb128 0xe\r
-  95 0005 13                   .uleb128 0x13\r
-  96 0006 0B                   .uleb128 0xb\r
-  97 0007 03                   .uleb128 0x3\r
-  98 0008 0E                   .uleb128 0xe\r
-  99 0009 1B                   .uleb128 0x1b\r
- 100 000a 0E                   .uleb128 0xe\r
- 101 000b 10                   .uleb128 0x10\r
- 102 000c 06                   .uleb128 0x6\r
- 103 000d 00                   .byte   0\r
- 104 000e 00                   .byte   0\r
- 105 000f 02                   .uleb128 0x2\r
- 106 0010 24                   .uleb128 0x24\r
- 107 0011 00                   .byte   0\r
- 108 0012 0B                   .uleb128 0xb\r
- 109 0013 0B                   .uleb128 0xb\r
- 110 0014 3E                   .uleb128 0x3e\r
- 111 0015 0B                   .uleb128 0xb\r
- 112 0016 03                   .uleb128 0x3\r
- 113 0017 0E                   .uleb128 0xe\r
- 114 0018 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc3vPMDe.s                      page 3\r
-\r
-\r
- 115 0019 00                   .byte   0\r
- 116 001a 03                   .uleb128 0x3\r
- 117 001b 24                   .uleb128 0x24\r
- 118 001c 00                   .byte   0\r
- 119 001d 0B                   .uleb128 0xb\r
- 120 001e 0B                   .uleb128 0xb\r
- 121 001f 3E                   .uleb128 0x3e\r
- 122 0020 0B                   .uleb128 0xb\r
- 123 0021 03                   .uleb128 0x3\r
- 124 0022 08                   .uleb128 0x8\r
- 125 0023 00                   .byte   0\r
- 126 0024 00                   .byte   0\r
- 127 0025 00                   .byte   0\r
- 128                           .section        .debug_aranges,"",%progbits\r
- 129 0000 14000000             .4byte  0x14\r
- 130 0004 0200                 .2byte  0x2\r
- 131 0006 00000000             .4byte  .Ldebug_info0\r
- 132 000a 04                   .byte   0x4\r
- 133 000b 00                   .byte   0\r
- 134 000c 0000                 .2byte  0\r
- 135 000e 0000                 .2byte  0\r
- 136 0010 00000000             .4byte  0\r
- 137 0014 00000000             .4byte  0\r
- 138                           .section        .debug_line,"",%progbits\r
- 139                   .Ldebug_line0:\r
- 140 0000 19000000             .section        .debug_str,"MS",%progbits,1\r
- 140      02001300 \r
- 140      00000201 \r
- 140      FB0E0D00 \r
- 140      01010101 \r
- 141                   .LASF6:\r
- 142 0000 6C6F6E67             .ascii  "long long int\000"\r
- 142      206C6F6E \r
- 142      6720696E \r
- 142      7400\r
- 143                   .LASF8:\r
- 144 000e 756E7369             .ascii  "unsigned int\000"\r
- 144      676E6564 \r
- 144      20696E74 \r
- 144      00\r
- 145                   .LASF13:\r
- 146 001b 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 146      4320342E \r
- 146      372E3320 \r
- 146      32303133 \r
- 146      30333132 \r
- 147 004e 616E6368             .ascii  "anch revision 196615]\000"\r
- 147      20726576 \r
- 147      6973696F \r
- 147      6E203139 \r
- 147      36363135 \r
- 148                   .LASF5:\r
- 149 0064 6C6F6E67             .ascii  "long unsigned int\000"\r
- 149      20756E73 \r
- 149      69676E65 \r
- 149      6420696E \r
- 149      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc3vPMDe.s                      page 4\r
-\r
-\r
- 150                   .LASF7:\r
- 151 0076 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 151      206C6F6E \r
- 151      6720756E \r
- 151      7369676E \r
- 151      65642069 \r
- 152                   .LASF14:\r
- 153 008d 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_cdc.c\000"\r
- 153      6E657261 \r
- 153      7465645F \r
- 153      536F7572 \r
- 153      63655C50 \r
- 154                   .LASF1:\r
- 155 00b2 756E7369             .ascii  "unsigned char\000"\r
- 155      676E6564 \r
- 155      20636861 \r
- 155      7200\r
- 156                   .LASF11:\r
- 157 00c0 63686172             .ascii  "char\000"\r
- 157      00\r
- 158                   .LASF4:\r
- 159 00c5 6C6F6E67             .ascii  "long int\000"\r
- 159      20696E74 \r
- 159      00\r
- 160                   .LASF10:\r
- 161 00ce 646F7562             .ascii  "double\000"\r
- 161      6C6500\r
- 162                   .LASF3:\r
- 163 00d5 73686F72             .ascii  "short unsigned int\000"\r
- 163      7420756E \r
- 163      7369676E \r
- 163      65642069 \r
- 163      6E7400\r
- 164                   .LASF0:\r
- 165 00e8 7369676E             .ascii  "signed char\000"\r
- 165      65642063 \r
- 165      68617200 \r
- 166                   .LASF9:\r
- 167 00f4 666C6F61             .ascii  "float\000"\r
- 167      7400\r
- 168                   .LASF2:\r
- 169 00fa 73686F72             .ascii  "short int\000"\r
- 169      7420696E \r
- 169      7400\r
- 170                   .LASF15:\r
- 171 0104 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 171      43534932 \r
- 171      53445C73 \r
- 171      6F667477 \r
- 171      6172655C \r
- 172 0133 6E00                 .ascii  "n\000"\r
- 173                   .LASF12:\r
- 174 0135 73697A65             .ascii  "sizetype\000"\r
- 174      74797065 \r
- 174      00\r
- 175                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.o
deleted file mode 100755 (executable)
index 5ce9e72..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cdc.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.lst
deleted file mode 100755 (executable)
index 338358c..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.lst
+++ /dev/null
@@ -1,943 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_cls.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_DispatchClassRqst,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_DispatchClassRqst\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_DispatchClassRqst, %function\r
-  24                   USBFS_DispatchClassRqst:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_cls.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_cls.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_cls.c **** * File Name: USBFS_cls.c\r
-   3:.\Generated_Source\PSoC5/USBFS_cls.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_cls.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_cls.c **** *  USB Class request handler.\r
-   7:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_cls.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_cls.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_cls.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_cls.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_cls.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_cls.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_cls.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_cls.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  19:.\Generated_Source\PSoC5/USBFS_cls.c **** #if(USBFS_EXTERN_CLS == USBFS_FALSE)\r
-  20:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  21:.\Generated_Source\PSoC5/USBFS_cls.c **** #include "USBFS_pvt.h"\r
-  22:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  23:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_cls.c **** /***************************************\r
-  25:.\Generated_Source\PSoC5/USBFS_cls.c **** * User Implemented Class Driver Declarations.\r
-  26:.\Generated_Source\PSoC5/USBFS_cls.c **** ***************************************/\r
-  27:.\Generated_Source\PSoC5/USBFS_cls.c **** /* `#START USER_DEFINED_CLASS_DECLARATIONS` Place your declaration here */\r
-  28:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_cls.c **** /* `#END` */\r
-  30:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  31:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_cls.c **** /*******************************************************************************\r
-  33:.\Generated_Source\PSoC5/USBFS_cls.c **** * Function Name: USBFS_DispatchClassRqst\r
-  34:.\Generated_Source\PSoC5/USBFS_cls.c **** ********************************************************************************\r
-  35:.\Generated_Source\PSoC5/USBFS_cls.c **** * Summary:\r
-  36:.\Generated_Source\PSoC5/USBFS_cls.c **** *  This routine dispatches class specific requests depend on interface class.\r
-  37:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-  38:.\Generated_Source\PSoC5/USBFS_cls.c **** * Parameters:\r
-  39:.\Generated_Source\PSoC5/USBFS_cls.c **** *  None.\r
-  40:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-  41:.\Generated_Source\PSoC5/USBFS_cls.c **** * Return:\r
-  42:.\Generated_Source\PSoC5/USBFS_cls.c **** *  requestHandled.\r
-  43:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-  44:.\Generated_Source\PSoC5/USBFS_cls.c **** * Reentrant:\r
-  45:.\Generated_Source\PSoC5/USBFS_cls.c **** *  No.\r
-  46:.\Generated_Source\PSoC5/USBFS_cls.c **** *\r
-  47:.\Generated_Source\PSoC5/USBFS_cls.c **** *******************************************************************************/\r
-  48:.\Generated_Source\PSoC5/USBFS_cls.c **** uint8 USBFS_DispatchClassRqst(void) \r
-  49:.\Generated_Source\PSoC5/USBFS_cls.c **** {\r
-  27                           .loc 1 49 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  50:.\Generated_Source\PSoC5/USBFS_cls.c ****     uint8 requestHandled = USBFS_FALSE;\r
-  51:.\Generated_Source\PSoC5/USBFS_cls.c ****     uint8 interfaceNumber = 0u;\r
-  52:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  53:.\Generated_Source\PSoC5/USBFS_cls.c ****     switch(CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
-  33                           .loc 1 53 0\r
-  34 0000 0F4B                 ldr     r3, .L11\r
-  35 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  36 0004 00F00301             and     r1, r0, #3\r
-  37 0008 0129                 cmp     r1, #1\r
-  38 000a 0CD0                 beq     .L3\r
-  39 000c 0229                 cmp     r1, #2\r
-  40 000e 0DD1                 bne     .L8\r
-  54:.\Generated_Source\PSoC5/USBFS_cls.c ****     {\r
-  55:.\Generated_Source\PSoC5/USBFS_cls.c ****         case USBFS_RQST_RCPT_IFC:        /* Class-specific request directed to an interface */\r
-  56:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber = CY_GET_REG8(USBFS_wIndexLo); /* wIndexLo contain Interface number */\r
-  57:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  58:.\Generated_Source\PSoC5/USBFS_cls.c ****         case USBFS_RQST_RCPT_EP:         /* Class-specific request directed to the endpoint */\r
-  59:.\Generated_Source\PSoC5/USBFS_cls.c ****             /* Find related interface to the endpoint, wIndexLo contain EP number */\r
-  60:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber =\r
-  61:.\Generated_Source\PSoC5/USBFS_cls.c ****                 USBFS_EP[CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].interface;\r
-  41                           .loc 1 61 0\r
-  42 0010 0C4A                 ldr     r2, .L11+4\r
-  60:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber =\r
-  43                           .loc 1 60 0\r
-  44 0012 0C21                 movs    r1, #12\r
-  45                           .loc 1 61 0\r
-  46 0014 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
-  60:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber =\r
-  47                           .loc 1 60 0\r
-  48 0016 0C4A                 ldr     r2, .L11+8\r
-  49                           .loc 1 61 0\r
-  50 0018 00F07F03             and     r3, r0, #127\r
-  60:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber =\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 3\r
-\r
-\r
-  51                           .loc 1 60 0\r
-  52 001c 01FB0320             mla     r0, r1, r3, r2\r
-  53 0020 0830                 adds    r0, r0, #8\r
-  54 0022 8378                 ldrb    r3, [r0, #2]    @ zero_extendqisi2\r
-  55                   .LVL1:\r
-  62:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  56                           .loc 1 62 0\r
-  57 0024 03E0                 b       .L2\r
-  58                   .LVL2:\r
-  59                   .L3:\r
-  56:.\Generated_Source\PSoC5/USBFS_cls.c ****             interfaceNumber = CY_GET_REG8(USBFS_wIndexLo); /* wIndexLo contain Interface number */\r
-  60                           .loc 1 56 0\r
-  61 0026 074B                 ldr     r3, .L11+4\r
-  62 0028 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-  63                   .LVL3:\r
-  57:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  64                           .loc 1 57 0\r
-  65 002a 00E0                 b       .L2\r
-  66                   .LVL4:\r
-  67                   .L8:\r
-  51:.\Generated_Source\PSoC5/USBFS_cls.c ****     uint8 interfaceNumber = 0u;\r
-  68                           .loc 1 51 0\r
-  69 002c 0023                 movs    r3, #0\r
-  70                   .LVL5:\r
-  71                   .L2:\r
-  63:.\Generated_Source\PSoC5/USBFS_cls.c ****         default:    /* RequestHandled is initialized as FALSE by default */\r
-  64:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  65:.\Generated_Source\PSoC5/USBFS_cls.c ****     }\r
-  66:.\Generated_Source\PSoC5/USBFS_cls.c ****     /* Handle Class request depend on interface type */\r
-  67:.\Generated_Source\PSoC5/USBFS_cls.c ****     switch(USBFS_interfaceClass[interfaceNumber])\r
-  72                           .loc 1 67 0\r
-  73 002e 0749                 ldr     r1, .L11+12\r
-  74 0030 0A68                 ldr     r2, [r1, #0]\r
-  75 0032 D05C                 ldrb    r0, [r2, r3]    @ zero_extendqisi2\r
-  76 0034 0328                 cmp     r0, #3\r
-  77 0036 01D1                 bne     .L9\r
-  68:.\Generated_Source\PSoC5/USBFS_cls.c ****     {\r
-  69:.\Generated_Source\PSoC5/USBFS_cls.c ****         case USBFS_CLASS_HID:\r
-  70:.\Generated_Source\PSoC5/USBFS_cls.c ****             #if defined(USBFS_ENABLE_HID_CLASS)\r
-  71:.\Generated_Source\PSoC5/USBFS_cls.c ****                 requestHandled = USBFS_DispatchHIDClassRqst();\r
-  72:.\Generated_Source\PSoC5/USBFS_cls.c ****             #endif /* USBFS_ENABLE_HID_CLASS */\r
-  73:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  74:.\Generated_Source\PSoC5/USBFS_cls.c ****         case USBFS_CLASS_AUDIO:\r
-  75:.\Generated_Source\PSoC5/USBFS_cls.c ****             #if defined(USBFS_ENABLE_AUDIO_CLASS)\r
-  76:.\Generated_Source\PSoC5/USBFS_cls.c ****                 requestHandled = USBFS_DispatchAUDIOClassRqst();\r
-  77:.\Generated_Source\PSoC5/USBFS_cls.c ****             #endif /* USBFS_ENABLE_HID_CLASS */\r
-  78:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  79:.\Generated_Source\PSoC5/USBFS_cls.c ****         case USBFS_CLASS_CDC:\r
-  80:.\Generated_Source\PSoC5/USBFS_cls.c ****             #if defined(USBFS_ENABLE_CDC_CLASS)\r
-  81:.\Generated_Source\PSoC5/USBFS_cls.c ****                 requestHandled = USBFS_DispatchCDCClassRqst();\r
-  82:.\Generated_Source\PSoC5/USBFS_cls.c ****             #endif /* USBFS_ENABLE_CDC_CLASS */\r
-  83:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  84:.\Generated_Source\PSoC5/USBFS_cls.c ****         default:    /* requestHandled is initialized as FALSE by default */\r
-  85:.\Generated_Source\PSoC5/USBFS_cls.c ****             break;\r
-  86:.\Generated_Source\PSoC5/USBFS_cls.c ****     }\r
-  87:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  88:.\Generated_Source\PSoC5/USBFS_cls.c ****     /* `#START USER_DEFINED_CLASS_CODE` Place your Class request here */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 4\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  90:.\Generated_Source\PSoC5/USBFS_cls.c ****     /* `#END` */\r
-  91:.\Generated_Source\PSoC5/USBFS_cls.c **** \r
-  92:.\Generated_Source\PSoC5/USBFS_cls.c ****     return(requestHandled);\r
-  93:.\Generated_Source\PSoC5/USBFS_cls.c **** }\r
-  78                           .loc 1 93 0\r
-  71:.\Generated_Source\PSoC5/USBFS_cls.c ****                 requestHandled = USBFS_DispatchHIDClassRqst();\r
-  79                           .loc 1 71 0\r
-  80 0038 FFF7FEBF             b       USBFS_DispatchHIDClassRqst\r
-  81                   .LVL6:\r
-  82                   .L9:\r
-  83                           .loc 1 93 0\r
-  84 003c 0020                 movs    r0, #0\r
-  85 003e 7047                 bx      lr\r
-  86                   .L12:\r
-  87                           .align  2\r
-  88                   .L11:\r
-  89 0040 00600040             .word   1073766400\r
-  90 0044 04600040             .word   1073766404\r
-  91 0048 00000000             .word   USBFS_EP\r
-  92 004c 00000000             .word   USBFS_interfaceClass\r
-  93                           .cfi_endproc\r
-  94                   .LFE0:\r
-  95                           .size   USBFS_DispatchClassRqst, .-USBFS_DispatchClassRqst\r
-  96                           .text\r
-  97                   .Letext0:\r
-  98                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
-  99                           .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 100                           .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 101                           .section        .debug_info,"",%progbits\r
- 102                   .Ldebug_info0:\r
- 103 0000 CB010000             .4byte  0x1cb\r
- 104 0004 0200                 .2byte  0x2\r
- 105 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 106 000a 04                   .byte   0x4\r
- 107 000b 01                   .uleb128 0x1\r
- 108 000c 99010000             .4byte  .LASF30\r
- 109 0010 01                   .byte   0x1\r
- 110 0011 01020000             .4byte  .LASF31\r
- 111 0015 A5000000             .4byte  .LASF32\r
- 112 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 113 001d 00000000             .4byte  0\r
- 114 0021 00000000             .4byte  0\r
- 115 0025 00000000             .4byte  .Ldebug_line0\r
- 116 0029 02                   .uleb128 0x2\r
- 117 002a 01                   .byte   0x1\r
- 118 002b 06                   .byte   0x6\r
- 119 002c F5010000             .4byte  .LASF0\r
- 120 0030 02                   .uleb128 0x2\r
- 121 0031 01                   .byte   0x1\r
- 122 0032 08                   .byte   0x8\r
- 123 0033 F4000000             .4byte  .LASF1\r
- 124 0037 02                   .uleb128 0x2\r
- 125 0038 02                   .byte   0x2\r
- 126 0039 05                   .byte   0x5\r
- 127 003a 89010000             .4byte  .LASF2\r
- 128 003e 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 5\r
-\r
-\r
- 129 003f 02                   .byte   0x2\r
- 130 0040 07                   .byte   0x7\r
- 131 0041 00000000             .4byte  .LASF3\r
- 132 0045 02                   .uleb128 0x2\r
- 133 0046 04                   .byte   0x4\r
- 134 0047 05                   .byte   0x5\r
- 135 0048 EC010000             .4byte  .LASF4\r
- 136 004c 02                   .uleb128 0x2\r
- 137 004d 04                   .byte   0x4\r
- 138 004e 07                   .byte   0x7\r
- 139 004f 93000000             .4byte  .LASF5\r
- 140 0053 02                   .uleb128 0x2\r
- 141 0054 08                   .byte   0x8\r
- 142 0055 05                   .byte   0x5\r
- 143 0056 6B010000             .4byte  .LASF6\r
- 144 005a 02                   .uleb128 0x2\r
- 145 005b 08                   .byte   0x8\r
- 146 005c 07                   .byte   0x7\r
- 147 005d 3A010000             .4byte  .LASF7\r
- 148 0061 03                   .uleb128 0x3\r
- 149 0062 04                   .byte   0x4\r
- 150 0063 05                   .byte   0x5\r
- 151 0064 696E7400             .ascii  "int\000"\r
- 152 0068 02                   .uleb128 0x2\r
- 153 0069 04                   .byte   0x4\r
- 154 006a 07                   .byte   0x7\r
- 155 006b 2D010000             .4byte  .LASF8\r
- 156 006f 04                   .uleb128 0x4\r
- 157 0070 93010000             .4byte  .LASF9\r
- 158 0074 02                   .byte   0x2\r
- 159 0075 5B                   .byte   0x5b\r
- 160 0076 30000000             .4byte  0x30\r
- 161 007a 04                   .uleb128 0x4\r
- 162 007b 1B010000             .4byte  .LASF10\r
- 163 007f 02                   .byte   0x2\r
- 164 0080 5C                   .byte   0x5c\r
- 165 0081 3E000000             .4byte  0x3e\r
- 166 0085 02                   .uleb128 0x2\r
- 167 0086 04                   .byte   0x4\r
- 168 0087 04                   .byte   0x4\r
- 169 0088 52000000             .4byte  .LASF11\r
- 170 008c 02                   .uleb128 0x2\r
- 171 008d 08                   .byte   0x8\r
- 172 008e 04                   .byte   0x4\r
- 173 008f 02010000             .4byte  .LASF12\r
- 174 0093 02                   .uleb128 0x2\r
- 175 0094 01                   .byte   0x1\r
- 176 0095 08                   .byte   0x8\r
- 177 0096 79010000             .4byte  .LASF13\r
- 178 009a 04                   .uleb128 0x4\r
- 179 009b 76000000             .4byte  .LASF14\r
- 180 009f 02                   .byte   0x2\r
- 181 00a0 F0                   .byte   0xf0\r
- 182 00a1 A5000000             .4byte  0xa5\r
- 183 00a5 05                   .uleb128 0x5\r
- 184 00a6 6F000000             .4byte  0x6f\r
- 185 00aa 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 6\r
-\r
-\r
- 186 00ab 04                   .byte   0x4\r
- 187 00ac 07                   .byte   0x7\r
- 188 00ad 5B010000             .4byte  .LASF15\r
- 189 00b1 06                   .uleb128 0x6\r
- 190 00b2 0C                   .byte   0xc\r
- 191 00b3 03                   .byte   0x3\r
- 192 00b4 79                   .byte   0x79\r
- 193 00b5 38010000             .4byte  0x138\r
- 194 00b9 07                   .uleb128 0x7\r
- 195 00ba 09010000             .4byte  .LASF16\r
- 196 00be 03                   .byte   0x3\r
- 197 00bf 7B                   .byte   0x7b\r
- 198 00c0 6F000000             .4byte  0x6f\r
- 199 00c4 02                   .byte   0x2\r
- 200 00c5 23                   .byte   0x23\r
- 201 00c6 00                   .uleb128 0\r
- 202 00c7 07                   .uleb128 0x7\r
- 203 00c8 22010000             .4byte  .LASF17\r
- 204 00cc 03                   .byte   0x3\r
- 205 00cd 7C                   .byte   0x7c\r
- 206 00ce 6F000000             .4byte  0x6f\r
- 207 00d2 02                   .byte   0x2\r
- 208 00d3 23                   .byte   0x23\r
- 209 00d4 01                   .uleb128 0x1\r
- 210 00d5 07                   .uleb128 0x7\r
- 211 00d6 51010000             .4byte  .LASF18\r
- 212 00da 03                   .byte   0x3\r
- 213 00db 7D                   .byte   0x7d\r
- 214 00dc 6F000000             .4byte  0x6f\r
- 215 00e0 02                   .byte   0x2\r
- 216 00e1 23                   .byte   0x23\r
- 217 00e2 02                   .uleb128 0x2\r
- 218 00e3 07                   .uleb128 0x7\r
- 219 00e4 58000000             .4byte  .LASF19\r
- 220 00e8 03                   .byte   0x3\r
- 221 00e9 7E                   .byte   0x7e\r
- 222 00ea 6F000000             .4byte  0x6f\r
- 223 00ee 02                   .byte   0x2\r
- 224 00ef 23                   .byte   0x23\r
- 225 00f0 03                   .uleb128 0x3\r
- 226 00f1 07                   .uleb128 0x7\r
- 227 00f2 D6000000             .4byte  .LASF20\r
- 228 00f6 03                   .byte   0x3\r
- 229 00f7 7F                   .byte   0x7f\r
- 230 00f8 6F000000             .4byte  0x6f\r
- 231 00fc 02                   .byte   0x2\r
- 232 00fd 23                   .byte   0x23\r
- 233 00fe 04                   .uleb128 0x4\r
- 234 00ff 07                   .uleb128 0x7\r
- 235 0100 64010000             .4byte  .LASF21\r
- 236 0104 03                   .byte   0x3\r
- 237 0105 80                   .byte   0x80\r
- 238 0106 6F000000             .4byte  0x6f\r
- 239 010a 02                   .byte   0x2\r
- 240 010b 23                   .byte   0x23\r
- 241 010c 05                   .uleb128 0x5\r
- 242 010d 07                   .uleb128 0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 7\r
-\r
-\r
- 243 010e 10010000             .4byte  .LASF22\r
- 244 0112 03                   .byte   0x3\r
- 245 0113 81                   .byte   0x81\r
- 246 0114 7A000000             .4byte  0x7a\r
- 247 0118 02                   .byte   0x2\r
- 248 0119 23                   .byte   0x23\r
- 249 011a 06                   .uleb128 0x6\r
- 250 011b 07                   .uleb128 0x7\r
- 251 011c 7E010000             .4byte  .LASF23\r
- 252 0120 03                   .byte   0x3\r
- 253 0121 82                   .byte   0x82\r
- 254 0122 7A000000             .4byte  0x7a\r
- 255 0126 02                   .byte   0x2\r
- 256 0127 23                   .byte   0x23\r
- 257 0128 08                   .uleb128 0x8\r
- 258 0129 07                   .uleb128 0x7\r
- 259 012a E2010000             .4byte  .LASF24\r
- 260 012e 03                   .byte   0x3\r
- 261 012f 83                   .byte   0x83\r
- 262 0130 6F000000             .4byte  0x6f\r
- 263 0134 02                   .byte   0x2\r
- 264 0135 23                   .byte   0x23\r
- 265 0136 0A                   .uleb128 0xa\r
- 266 0137 00                   .byte   0\r
- 267 0138 04                   .uleb128 0x4\r
- 268 0139 13000000             .4byte  .LASF25\r
- 269 013d 03                   .byte   0x3\r
- 270 013e 84                   .byte   0x84\r
- 271 013f B1000000             .4byte  0xb1\r
- 272 0143 08                   .uleb128 0x8\r
- 273 0144 01                   .byte   0x1\r
- 274 0145 7B000000             .4byte  .LASF33\r
- 275 0149 01                   .byte   0x1\r
- 276 014a 30                   .byte   0x30\r
- 277 014b 01                   .byte   0x1\r
- 278 014c 6F000000             .4byte  0x6f\r
- 279 0150 00000000             .4byte  .LFB0\r
- 280 0154 50000000             .4byte  .LFE0\r
- 281 0158 02                   .byte   0x2\r
- 282 0159 7D                   .byte   0x7d\r
- 283 015a 00                   .sleb128 0\r
- 284 015b 01                   .byte   0x1\r
- 285 015c 86010000             .4byte  0x186\r
- 286 0160 09                   .uleb128 0x9\r
- 287 0161 43000000             .4byte  .LASF26\r
- 288 0165 01                   .byte   0x1\r
- 289 0166 32                   .byte   0x32\r
- 290 0167 6F000000             .4byte  0x6f\r
- 291 016b 00                   .byte   0\r
- 292 016c 0A                   .uleb128 0xa\r
- 293 016d DB000000             .4byte  .LASF27\r
- 294 0171 01                   .byte   0x1\r
- 295 0172 33                   .byte   0x33\r
- 296 0173 6F000000             .4byte  0x6f\r
- 297 0177 00000000             .4byte  .LLST0\r
- 298 017b 0B                   .uleb128 0xb\r
- 299 017c 3C000000             .4byte  .LVL6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 8\r
-\r
-\r
- 300 0180 01                   .byte   0x1\r
- 301 0181 C0010000             .4byte  0x1c0\r
- 302 0185 00                   .byte   0\r
- 303 0186 0C                   .uleb128 0xc\r
- 304 0187 61000000             .4byte  .LASF28\r
- 305 018b 04                   .byte   0x4\r
- 306 018c 3D                   .byte   0x3d\r
- 307 018d 93010000             .4byte  0x193\r
- 308 0191 01                   .byte   0x1\r
- 309 0192 01                   .byte   0x1\r
- 310 0193 0D                   .uleb128 0xd\r
- 311 0194 04                   .byte   0x4\r
- 312 0195 99010000             .4byte  0x199\r
- 313 0199 0E                   .uleb128 0xe\r
- 314 019a 6F000000             .4byte  0x6f\r
- 315 019e 0F                   .uleb128 0xf\r
- 316 019f 38010000             .4byte  0x138\r
- 317 01a3 AE010000             .4byte  0x1ae\r
- 318 01a7 10                   .uleb128 0x10\r
- 319 01a8 AA000000             .4byte  0xaa\r
- 320 01ac 08                   .byte   0x8\r
- 321 01ad 00                   .byte   0\r
- 322 01ae 0C                   .uleb128 0xc\r
- 323 01af EB000000             .4byte  .LASF29\r
- 324 01b3 04                   .byte   0x4\r
- 325 01b4 3F                   .byte   0x3f\r
- 326 01b5 BB010000             .4byte  0x1bb\r
- 327 01b9 01                   .byte   0x1\r
- 328 01ba 01                   .byte   0x1\r
- 329 01bb 05                   .uleb128 0x5\r
- 330 01bc 9E010000             .4byte  0x19e\r
- 331 01c0 11                   .uleb128 0x11\r
- 332 01c1 01                   .byte   0x1\r
- 333 01c2 28000000             .4byte  .LASF34\r
- 334 01c6 04                   .byte   0x4\r
- 335 01c7 7F                   .byte   0x7f\r
- 336 01c8 01                   .byte   0x1\r
- 337 01c9 6F000000             .4byte  0x6f\r
- 338 01cd 01                   .byte   0x1\r
- 339 01ce 00                   .byte   0\r
- 340                           .section        .debug_abbrev,"",%progbits\r
- 341                   .Ldebug_abbrev0:\r
- 342 0000 01                   .uleb128 0x1\r
- 343 0001 11                   .uleb128 0x11\r
- 344 0002 01                   .byte   0x1\r
- 345 0003 25                   .uleb128 0x25\r
- 346 0004 0E                   .uleb128 0xe\r
- 347 0005 13                   .uleb128 0x13\r
- 348 0006 0B                   .uleb128 0xb\r
- 349 0007 03                   .uleb128 0x3\r
- 350 0008 0E                   .uleb128 0xe\r
- 351 0009 1B                   .uleb128 0x1b\r
- 352 000a 0E                   .uleb128 0xe\r
- 353 000b 55                   .uleb128 0x55\r
- 354 000c 06                   .uleb128 0x6\r
- 355 000d 11                   .uleb128 0x11\r
- 356 000e 01                   .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 9\r
-\r
-\r
- 357 000f 52                   .uleb128 0x52\r
- 358 0010 01                   .uleb128 0x1\r
- 359 0011 10                   .uleb128 0x10\r
- 360 0012 06                   .uleb128 0x6\r
- 361 0013 00                   .byte   0\r
- 362 0014 00                   .byte   0\r
- 363 0015 02                   .uleb128 0x2\r
- 364 0016 24                   .uleb128 0x24\r
- 365 0017 00                   .byte   0\r
- 366 0018 0B                   .uleb128 0xb\r
- 367 0019 0B                   .uleb128 0xb\r
- 368 001a 3E                   .uleb128 0x3e\r
- 369 001b 0B                   .uleb128 0xb\r
- 370 001c 03                   .uleb128 0x3\r
- 371 001d 0E                   .uleb128 0xe\r
- 372 001e 00                   .byte   0\r
- 373 001f 00                   .byte   0\r
- 374 0020 03                   .uleb128 0x3\r
- 375 0021 24                   .uleb128 0x24\r
- 376 0022 00                   .byte   0\r
- 377 0023 0B                   .uleb128 0xb\r
- 378 0024 0B                   .uleb128 0xb\r
- 379 0025 3E                   .uleb128 0x3e\r
- 380 0026 0B                   .uleb128 0xb\r
- 381 0027 03                   .uleb128 0x3\r
- 382 0028 08                   .uleb128 0x8\r
- 383 0029 00                   .byte   0\r
- 384 002a 00                   .byte   0\r
- 385 002b 04                   .uleb128 0x4\r
- 386 002c 16                   .uleb128 0x16\r
- 387 002d 00                   .byte   0\r
- 388 002e 03                   .uleb128 0x3\r
- 389 002f 0E                   .uleb128 0xe\r
- 390 0030 3A                   .uleb128 0x3a\r
- 391 0031 0B                   .uleb128 0xb\r
- 392 0032 3B                   .uleb128 0x3b\r
- 393 0033 0B                   .uleb128 0xb\r
- 394 0034 49                   .uleb128 0x49\r
- 395 0035 13                   .uleb128 0x13\r
- 396 0036 00                   .byte   0\r
- 397 0037 00                   .byte   0\r
- 398 0038 05                   .uleb128 0x5\r
- 399 0039 35                   .uleb128 0x35\r
- 400 003a 00                   .byte   0\r
- 401 003b 49                   .uleb128 0x49\r
- 402 003c 13                   .uleb128 0x13\r
- 403 003d 00                   .byte   0\r
- 404 003e 00                   .byte   0\r
- 405 003f 06                   .uleb128 0x6\r
- 406 0040 13                   .uleb128 0x13\r
- 407 0041 01                   .byte   0x1\r
- 408 0042 0B                   .uleb128 0xb\r
- 409 0043 0B                   .uleb128 0xb\r
- 410 0044 3A                   .uleb128 0x3a\r
- 411 0045 0B                   .uleb128 0xb\r
- 412 0046 3B                   .uleb128 0x3b\r
- 413 0047 0B                   .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 10\r
-\r
-\r
- 414 0048 01                   .uleb128 0x1\r
- 415 0049 13                   .uleb128 0x13\r
- 416 004a 00                   .byte   0\r
- 417 004b 00                   .byte   0\r
- 418 004c 07                   .uleb128 0x7\r
- 419 004d 0D                   .uleb128 0xd\r
- 420 004e 00                   .byte   0\r
- 421 004f 03                   .uleb128 0x3\r
- 422 0050 0E                   .uleb128 0xe\r
- 423 0051 3A                   .uleb128 0x3a\r
- 424 0052 0B                   .uleb128 0xb\r
- 425 0053 3B                   .uleb128 0x3b\r
- 426 0054 0B                   .uleb128 0xb\r
- 427 0055 49                   .uleb128 0x49\r
- 428 0056 13                   .uleb128 0x13\r
- 429 0057 38                   .uleb128 0x38\r
- 430 0058 0A                   .uleb128 0xa\r
- 431 0059 00                   .byte   0\r
- 432 005a 00                   .byte   0\r
- 433 005b 08                   .uleb128 0x8\r
- 434 005c 2E                   .uleb128 0x2e\r
- 435 005d 01                   .byte   0x1\r
- 436 005e 3F                   .uleb128 0x3f\r
- 437 005f 0C                   .uleb128 0xc\r
- 438 0060 03                   .uleb128 0x3\r
- 439 0061 0E                   .uleb128 0xe\r
- 440 0062 3A                   .uleb128 0x3a\r
- 441 0063 0B                   .uleb128 0xb\r
- 442 0064 3B                   .uleb128 0x3b\r
- 443 0065 0B                   .uleb128 0xb\r
- 444 0066 27                   .uleb128 0x27\r
- 445 0067 0C                   .uleb128 0xc\r
- 446 0068 49                   .uleb128 0x49\r
- 447 0069 13                   .uleb128 0x13\r
- 448 006a 11                   .uleb128 0x11\r
- 449 006b 01                   .uleb128 0x1\r
- 450 006c 12                   .uleb128 0x12\r
- 451 006d 01                   .uleb128 0x1\r
- 452 006e 40                   .uleb128 0x40\r
- 453 006f 0A                   .uleb128 0xa\r
- 454 0070 9742                 .uleb128 0x2117\r
- 455 0072 0C                   .uleb128 0xc\r
- 456 0073 01                   .uleb128 0x1\r
- 457 0074 13                   .uleb128 0x13\r
- 458 0075 00                   .byte   0\r
- 459 0076 00                   .byte   0\r
- 460 0077 09                   .uleb128 0x9\r
- 461 0078 34                   .uleb128 0x34\r
- 462 0079 00                   .byte   0\r
- 463 007a 03                   .uleb128 0x3\r
- 464 007b 0E                   .uleb128 0xe\r
- 465 007c 3A                   .uleb128 0x3a\r
- 466 007d 0B                   .uleb128 0xb\r
- 467 007e 3B                   .uleb128 0x3b\r
- 468 007f 0B                   .uleb128 0xb\r
- 469 0080 49                   .uleb128 0x49\r
- 470 0081 13                   .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 11\r
-\r
-\r
- 471 0082 1C                   .uleb128 0x1c\r
- 472 0083 0B                   .uleb128 0xb\r
- 473 0084 00                   .byte   0\r
- 474 0085 00                   .byte   0\r
- 475 0086 0A                   .uleb128 0xa\r
- 476 0087 34                   .uleb128 0x34\r
- 477 0088 00                   .byte   0\r
- 478 0089 03                   .uleb128 0x3\r
- 479 008a 0E                   .uleb128 0xe\r
- 480 008b 3A                   .uleb128 0x3a\r
- 481 008c 0B                   .uleb128 0xb\r
- 482 008d 3B                   .uleb128 0x3b\r
- 483 008e 0B                   .uleb128 0xb\r
- 484 008f 49                   .uleb128 0x49\r
- 485 0090 13                   .uleb128 0x13\r
- 486 0091 02                   .uleb128 0x2\r
- 487 0092 06                   .uleb128 0x6\r
- 488 0093 00                   .byte   0\r
- 489 0094 00                   .byte   0\r
- 490 0095 0B                   .uleb128 0xb\r
- 491 0096 898201               .uleb128 0x4109\r
- 492 0099 00                   .byte   0\r
- 493 009a 11                   .uleb128 0x11\r
- 494 009b 01                   .uleb128 0x1\r
- 495 009c 9542                 .uleb128 0x2115\r
- 496 009e 0C                   .uleb128 0xc\r
- 497 009f 31                   .uleb128 0x31\r
- 498 00a0 13                   .uleb128 0x13\r
- 499 00a1 00                   .byte   0\r
- 500 00a2 00                   .byte   0\r
- 501 00a3 0C                   .uleb128 0xc\r
- 502 00a4 34                   .uleb128 0x34\r
- 503 00a5 00                   .byte   0\r
- 504 00a6 03                   .uleb128 0x3\r
- 505 00a7 0E                   .uleb128 0xe\r
- 506 00a8 3A                   .uleb128 0x3a\r
- 507 00a9 0B                   .uleb128 0xb\r
- 508 00aa 3B                   .uleb128 0x3b\r
- 509 00ab 0B                   .uleb128 0xb\r
- 510 00ac 49                   .uleb128 0x49\r
- 511 00ad 13                   .uleb128 0x13\r
- 512 00ae 3F                   .uleb128 0x3f\r
- 513 00af 0C                   .uleb128 0xc\r
- 514 00b0 3C                   .uleb128 0x3c\r
- 515 00b1 0C                   .uleb128 0xc\r
- 516 00b2 00                   .byte   0\r
- 517 00b3 00                   .byte   0\r
- 518 00b4 0D                   .uleb128 0xd\r
- 519 00b5 0F                   .uleb128 0xf\r
- 520 00b6 00                   .byte   0\r
- 521 00b7 0B                   .uleb128 0xb\r
- 522 00b8 0B                   .uleb128 0xb\r
- 523 00b9 49                   .uleb128 0x49\r
- 524 00ba 13                   .uleb128 0x13\r
- 525 00bb 00                   .byte   0\r
- 526 00bc 00                   .byte   0\r
- 527 00bd 0E                   .uleb128 0xe\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 12\r
-\r
-\r
- 528 00be 26                   .uleb128 0x26\r
- 529 00bf 00                   .byte   0\r
- 530 00c0 49                   .uleb128 0x49\r
- 531 00c1 13                   .uleb128 0x13\r
- 532 00c2 00                   .byte   0\r
- 533 00c3 00                   .byte   0\r
- 534 00c4 0F                   .uleb128 0xf\r
- 535 00c5 01                   .uleb128 0x1\r
- 536 00c6 01                   .byte   0x1\r
- 537 00c7 49                   .uleb128 0x49\r
- 538 00c8 13                   .uleb128 0x13\r
- 539 00c9 01                   .uleb128 0x1\r
- 540 00ca 13                   .uleb128 0x13\r
- 541 00cb 00                   .byte   0\r
- 542 00cc 00                   .byte   0\r
- 543 00cd 10                   .uleb128 0x10\r
- 544 00ce 21                   .uleb128 0x21\r
- 545 00cf 00                   .byte   0\r
- 546 00d0 49                   .uleb128 0x49\r
- 547 00d1 13                   .uleb128 0x13\r
- 548 00d2 2F                   .uleb128 0x2f\r
- 549 00d3 0B                   .uleb128 0xb\r
- 550 00d4 00                   .byte   0\r
- 551 00d5 00                   .byte   0\r
- 552 00d6 11                   .uleb128 0x11\r
- 553 00d7 2E                   .uleb128 0x2e\r
- 554 00d8 00                   .byte   0\r
- 555 00d9 3F                   .uleb128 0x3f\r
- 556 00da 0C                   .uleb128 0xc\r
- 557 00db 03                   .uleb128 0x3\r
- 558 00dc 0E                   .uleb128 0xe\r
- 559 00dd 3A                   .uleb128 0x3a\r
- 560 00de 0B                   .uleb128 0xb\r
- 561 00df 3B                   .uleb128 0x3b\r
- 562 00e0 0B                   .uleb128 0xb\r
- 563 00e1 27                   .uleb128 0x27\r
- 564 00e2 0C                   .uleb128 0xc\r
- 565 00e3 49                   .uleb128 0x49\r
- 566 00e4 13                   .uleb128 0x13\r
- 567 00e5 3C                   .uleb128 0x3c\r
- 568 00e6 0C                   .uleb128 0xc\r
- 569 00e7 00                   .byte   0\r
- 570 00e8 00                   .byte   0\r
- 571 00e9 00                   .byte   0\r
- 572                           .section        .debug_loc,"",%progbits\r
- 573                   .Ldebug_loc0:\r
- 574                   .LLST0:\r
- 575 0000 00000000             .4byte  .LVL0\r
- 576 0004 24000000             .4byte  .LVL1\r
- 577 0008 0200                 .2byte  0x2\r
- 578 000a 30                   .byte   0x30\r
- 579 000b 9F                   .byte   0x9f\r
- 580 000c 24000000             .4byte  .LVL1\r
- 581 0010 26000000             .4byte  .LVL2\r
- 582 0014 0100                 .2byte  0x1\r
- 583 0016 53                   .byte   0x53\r
- 584 0017 26000000             .4byte  .LVL2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 13\r
-\r
-\r
- 585 001b 2A000000             .4byte  .LVL3\r
- 586 001f 0200                 .2byte  0x2\r
- 587 0021 30                   .byte   0x30\r
- 588 0022 9F                   .byte   0x9f\r
- 589 0023 2A000000             .4byte  .LVL3\r
- 590 0027 2C000000             .4byte  .LVL4\r
- 591 002b 0100                 .2byte  0x1\r
- 592 002d 53                   .byte   0x53\r
- 593 002e 2C000000             .4byte  .LVL4\r
- 594 0032 2E000000             .4byte  .LVL5\r
- 595 0036 0200                 .2byte  0x2\r
- 596 0038 30                   .byte   0x30\r
- 597 0039 9F                   .byte   0x9f\r
- 598 003a 2E000000             .4byte  .LVL5\r
- 599 003e 3B000000             .4byte  .LVL6-1\r
- 600 0042 0100                 .2byte  0x1\r
- 601 0044 53                   .byte   0x53\r
- 602 0045 3C000000             .4byte  .LVL6\r
- 603 0049 50000000             .4byte  .LFE0\r
- 604 004d 0100                 .2byte  0x1\r
- 605 004f 53                   .byte   0x53\r
- 606 0050 00000000             .4byte  0\r
- 607 0054 00000000             .4byte  0\r
- 608                           .section        .debug_aranges,"",%progbits\r
- 609 0000 1C000000             .4byte  0x1c\r
- 610 0004 0200                 .2byte  0x2\r
- 611 0006 00000000             .4byte  .Ldebug_info0\r
- 612 000a 04                   .byte   0x4\r
- 613 000b 00                   .byte   0\r
- 614 000c 0000                 .2byte  0\r
- 615 000e 0000                 .2byte  0\r
- 616 0010 00000000             .4byte  .LFB0\r
- 617 0014 50000000             .4byte  .LFE0-.LFB0\r
- 618 0018 00000000             .4byte  0\r
- 619 001c 00000000             .4byte  0\r
- 620                           .section        .debug_ranges,"",%progbits\r
- 621                   .Ldebug_ranges0:\r
- 622 0000 00000000             .4byte  .LFB0\r
- 623 0004 50000000             .4byte  .LFE0\r
- 624 0008 00000000             .4byte  0\r
- 625 000c 00000000             .4byte  0\r
- 626                           .section        .debug_line,"",%progbits\r
- 627                   .Ldebug_line0:\r
- 628 0000 92000000             .section        .debug_str,"MS",%progbits,1\r
- 628      02006200 \r
- 628      00000201 \r
- 628      FB0E0D00 \r
- 628      01010101 \r
- 629                   .LASF3:\r
- 630 0000 73686F72             .ascii  "short unsigned int\000"\r
- 630      7420756E \r
- 630      7369676E \r
- 630      65642069 \r
- 630      6E7400\r
- 631                   .LASF25:\r
- 632 0013 545F5553             .ascii  "T_USBFS_EP_CTL_BLOCK\000"\r
- 632      4246535F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 14\r
-\r
-\r
- 632      45505F43 \r
- 632      544C5F42 \r
- 632      4C4F434B \r
- 633                   .LASF34:\r
- 634 0028 55534246             .ascii  "USBFS_DispatchHIDClassRqst\000"\r
- 634      535F4469 \r
- 634      73706174 \r
- 634      63684849 \r
- 634      44436C61 \r
- 635                   .LASF26:\r
- 636 0043 72657175             .ascii  "requestHandled\000"\r
- 636      65737448 \r
- 636      616E646C \r
- 636      656400\r
- 637                   .LASF11:\r
- 638 0052 666C6F61             .ascii  "float\000"\r
- 638      7400\r
- 639                   .LASF19:\r
- 640 0058 6570546F             .ascii  "epToggle\000"\r
- 640      67676C65 \r
- 640      00\r
- 641                   .LASF28:\r
- 642 0061 55534246             .ascii  "USBFS_interfaceClass\000"\r
- 642      535F696E \r
- 642      74657266 \r
- 642      61636543 \r
- 642      6C617373 \r
- 643                   .LASF14:\r
- 644 0076 72656738             .ascii  "reg8\000"\r
- 644      00\r
- 645                   .LASF33:\r
- 646 007b 55534246             .ascii  "USBFS_DispatchClassRqst\000"\r
- 646      535F4469 \r
- 646      73706174 \r
- 646      6368436C \r
- 646      61737352 \r
- 647                   .LASF5:\r
- 648 0093 6C6F6E67             .ascii  "long unsigned int\000"\r
- 648      20756E73 \r
- 648      69676E65 \r
- 648      6420696E \r
- 648      7400\r
- 649                   .LASF32:\r
- 650 00a5 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 650      43534932 \r
- 650      53445C73 \r
- 650      6F667477 \r
- 650      6172655C \r
- 651 00d4 6E00                 .ascii  "n\000"\r
- 652                   .LASF20:\r
- 653 00d6 61646472             .ascii  "addr\000"\r
- 653      00\r
- 654                   .LASF27:\r
- 655 00db 696E7465             .ascii  "interfaceNumber\000"\r
- 655      72666163 \r
- 655      654E756D \r
- 655      62657200 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 15\r
-\r
-\r
- 656                   .LASF29:\r
- 657 00eb 55534246             .ascii  "USBFS_EP\000"\r
- 657      535F4550 \r
- 657      00\r
- 658                   .LASF1:\r
- 659 00f4 756E7369             .ascii  "unsigned char\000"\r
- 659      676E6564 \r
- 659      20636861 \r
- 659      7200\r
- 660                   .LASF12:\r
- 661 0102 646F7562             .ascii  "double\000"\r
- 661      6C6500\r
- 662                   .LASF16:\r
- 663 0109 61747472             .ascii  "attrib\000"\r
- 663      696200\r
- 664                   .LASF22:\r
- 665 0110 62756666             .ascii  "buffOffset\000"\r
- 665      4F666673 \r
- 665      657400\r
- 666                   .LASF10:\r
- 667 011b 75696E74             .ascii  "uint16\000"\r
- 667      313600\r
- 668                   .LASF17:\r
- 669 0122 61706945             .ascii  "apiEpState\000"\r
- 669      70537461 \r
- 669      746500\r
- 670                   .LASF8:\r
- 671 012d 756E7369             .ascii  "unsigned int\000"\r
- 671      676E6564 \r
- 671      20696E74 \r
- 671      00\r
- 672                   .LASF7:\r
- 673 013a 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 673      206C6F6E \r
- 673      6720756E \r
- 673      7369676E \r
- 673      65642069 \r
- 674                   .LASF18:\r
- 675 0151 68774570             .ascii  "hwEpState\000"\r
- 675      53746174 \r
- 675      6500\r
- 676                   .LASF15:\r
- 677 015b 73697A65             .ascii  "sizetype\000"\r
- 677      74797065 \r
- 677      00\r
- 678                   .LASF21:\r
- 679 0164 65704D6F             .ascii  "epMode\000"\r
- 679      646500\r
- 680                   .LASF6:\r
- 681 016b 6C6F6E67             .ascii  "long long int\000"\r
- 681      206C6F6E \r
- 681      6720696E \r
- 681      7400\r
- 682                   .LASF13:\r
- 683 0179 63686172             .ascii  "char\000"\r
- 683      00\r
- 684                   .LASF23:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccfm3BeD.s                      page 16\r
-\r
-\r
- 685 017e 62756666             .ascii  "bufferSize\000"\r
- 685      65725369 \r
- 685      7A6500\r
- 686                   .LASF2:\r
- 687 0189 73686F72             .ascii  "short int\000"\r
- 687      7420696E \r
- 687      7400\r
- 688                   .LASF9:\r
- 689 0193 75696E74             .ascii  "uint8\000"\r
- 689      3800\r
- 690                   .LASF30:\r
- 691 0199 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 691      4320342E \r
- 691      372E3320 \r
- 691      32303133 \r
- 691      30333132 \r
- 692 01cc 616E6368             .ascii  "anch revision 196615]\000"\r
- 692      20726576 \r
- 692      6973696F \r
- 692      6E203139 \r
- 692      36363135 \r
- 693                   .LASF24:\r
- 694 01e2 696E7465             .ascii  "interface\000"\r
- 694      72666163 \r
- 694      6500\r
- 695                   .LASF4:\r
- 696 01ec 6C6F6E67             .ascii  "long int\000"\r
- 696      20696E74 \r
- 696      00\r
- 697                   .LASF0:\r
- 698 01f5 7369676E             .ascii  "signed char\000"\r
- 698      65642063 \r
- 698      68617200 \r
- 699                   .LASF31:\r
- 700 0201 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_cls.c\000"\r
- 700      6E657261 \r
- 700      7465645F \r
- 700      536F7572 \r
- 700      63655C50 \r
- 701                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.o
deleted file mode 100755 (executable)
index 6a62d97..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_cls.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.lst
deleted file mode 100755 (executable)
index 23f9472..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.lst
+++ /dev/null
@@ -1,1409 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_descr.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .global USBFS_TABLE\r
-  19                           .global USBFS_DEVICE0_TABLE\r
-  20                           .global USBFS_DEVICE0_CONFIGURATION0_TABLE\r
-  21                           .global USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS\r
-  22                           .global USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE\r
-  23                           .global USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE\r
-  24                           .global USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE\r
-  25                           .global USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE\r
-  26                           .comm   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF,65,1\r
-  27                           .comm   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB,4,2\r
-  28                           .global USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE\r
-  29                           .comm   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF,65,1\r
-  30                           .comm   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB,4,2\r
-  31                           .global USBFS_HIDREPORT_DESCRIPTOR1\r
-  32                           .global USBFS_SN_STRING_DESCRIPTOR\r
-  33                           .global USBFS_STRING_DESCRIPTORS\r
-  34                           .global USBFS_DEVICE0_CONFIGURATION0_DESCR\r
-  35                           .global USBFS_DEVICE0_DESCR\r
-  36                           .section        .rodata\r
-  37                           .align  2\r
-  38                           .type   USBFS_TABLE, %object\r
-  39                           .size   USBFS_TABLE, 8\r
-  40                   USBFS_TABLE:\r
-  41 0000 01                   .byte   1\r
-  42 0001 000000               .space  3\r
-  43 0004 00000000             .word   USBFS_DEVICE0_TABLE\r
-  44                           .type   USBFS_DEVICE0_TABLE, %object\r
-  45                           .size   USBFS_DEVICE0_TABLE, 16\r
-  46                   USBFS_DEVICE0_TABLE:\r
-  47 0008 01                   .byte   1\r
-  48 0009 000000               .space  3\r
-  49 000c 00000000             .word   USBFS_DEVICE0_DESCR\r
-  50 0010 01                   .byte   1\r
-  51 0011 000000               .space  3\r
-  52 0014 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_TABLE\r
-  53                           .type   USBFS_DEVICE0_CONFIGURATION0_TABLE, %object\r
-  54                           .size   USBFS_DEVICE0_CONFIGURATION0_TABLE, 32\r
-  55                   USBFS_DEVICE0_CONFIGURATION0_TABLE:\r
-  56 0018 01                   .byte   1\r
-  57 0019 000000               .space  3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 2\r
-\r
-\r
-  58 001c 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_DESCR\r
-  59 0020 02                   .byte   2\r
-  60 0021 000000               .space  3\r
-  61 0024 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE\r
-  62 0028 01                   .byte   1\r
-  63 0029 000000               .space  3\r
-  64 002c 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE\r
-  65 0030 00                   .byte   0\r
-  66 0031 000000               .space  3\r
-  67 0034 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS\r
-  68                           .type   USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS, %object\r
-  69                           .size   USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS, 1\r
-  70                   USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS:\r
-  71 0038 03                   .byte   3\r
-  72 0039 00                   .space  1\r
-  73                           .type   USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE, %object\r
-  74                           .size   USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE, 16\r
-  75                   USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE:\r
-  76 003a 00                   .byte   0\r
-  77 003b 00                   .byte   0\r
-  78 003c 01                   .byte   1\r
-  79 003d 03                   .byte   3\r
-  80 003e 4000                 .short  64\r
-  81 0040 03                   .byte   3\r
-  82 0041 00                   .space  1\r
-  83 0042 00                   .byte   0\r
-  84 0043 00                   .byte   0\r
-  85 0044 82                   .byte   -126\r
-  86 0045 03                   .byte   3\r
-  87 0046 4000                 .short  64\r
-  88 0048 03                   .byte   3\r
-  89 0049 00                   .space  1\r
-  90 004a 0000                 .space  2\r
-  91                           .type   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE, %object\r
-  92                           .size   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE, 8\r
-  93                   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE:\r
-  94 004c 01                   .byte   1\r
-  95 004d 000000               .space  3\r
-  96 0050 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE\r
-  97                           .type   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE, %object\r
-  98                           .size   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE, 40\r
-  99                   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE:\r
- 100 0054 00                   .byte   0\r
- 101 0055 000000               .space  3\r
- 102 0058 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE\r
- 103 005c 00                   .byte   0\r
- 104 005d 000000               .space  3\r
- 105 0060 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE\r
- 106 0064 00                   .byte   0\r
- 107 0065 000000               .space  3\r
- 108 0068 00000000             .word   0\r
- 109 006c 01                   .byte   1\r
- 110 006d 000000               .space  3\r
- 111 0070 00000000             .word   USBFS_HIDREPORT_DESCRIPTOR1\r
- 112 0074 01                   .byte   1\r
- 113 0075 000000               .space  3\r
- 114 0078 12000000             .word   USBFS_DEVICE0_CONFIGURATION0_DESCR+18\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 3\r
-\r
-\r
- 115                           .type   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE, %object\r
- 116                           .size   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE, 12\r
- 117                   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE:\r
- 118 007c 4100                 .short  65\r
- 119 007e 0000                 .space  2\r
- 120 0080 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF\r
- 121 0084 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB\r
- 122                           .type   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE, %object\r
- 123                           .size   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE, 12\r
- 124                   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE:\r
- 125 0088 4100                 .short  65\r
- 126 008a 0000                 .space  2\r
- 127 008c 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF\r
- 128 0090 00000000             .word   USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB\r
- 129                           .type   USBFS_HIDREPORT_DESCRIPTOR1, %object\r
- 130                           .size   USBFS_HIDREPORT_DESCRIPTOR1, 40\r
- 131                   USBFS_HIDREPORT_DESCRIPTOR1:\r
- 132 0094 24                   .byte   36\r
- 133 0095 00                   .byte   0\r
- 134 0096 05                   .byte   5\r
- 135 0097 01                   .byte   1\r
- 136 0098 09                   .byte   9\r
- 137 0099 00                   .byte   0\r
- 138 009a A1                   .byte   -95\r
- 139 009b 00                   .byte   0\r
- 140 009c 09                   .byte   9\r
- 141 009d 00                   .byte   0\r
- 142 009e A1                   .byte   -95\r
- 143 009f 00                   .byte   0\r
- 144 00a0 09                   .byte   9\r
- 145 00a1 00                   .byte   0\r
- 146 00a2 15                   .byte   21\r
- 147 00a3 00                   .byte   0\r
- 148 00a4 25                   .byte   37\r
- 149 00a5 FF                   .byte   -1\r
- 150 00a6 75                   .byte   117\r
- 151 00a7 08                   .byte   8\r
- 152 00a8 95                   .byte   -107\r
- 153 00a9 40                   .byte   64\r
- 154 00aa 91                   .byte   -111\r
- 155 00ab 02                   .byte   2\r
- 156 00ac 09                   .byte   9\r
- 157 00ad 00                   .byte   0\r
- 158 00ae 15                   .byte   21\r
- 159 00af 00                   .byte   0\r
- 160 00b0 25                   .byte   37\r
- 161 00b1 FF                   .byte   -1\r
- 162 00b2 75                   .byte   117\r
- 163 00b3 08                   .byte   8\r
- 164 00b4 95                   .byte   -107\r
- 165 00b5 40                   .byte   64\r
- 166 00b6 81                   .byte   -127\r
- 167 00b7 02                   .byte   2\r
- 168 00b8 C0                   .byte   -64\r
- 169 00b9 C0                   .byte   -64\r
- 170 00ba 00                   .byte   0\r
- 171 00bb 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 4\r
-\r
-\r
- 172                           .type   USBFS_SN_STRING_DESCRIPTOR, %object\r
- 173                           .size   USBFS_SN_STRING_DESCRIPTOR, 10\r
- 174                   USBFS_SN_STRING_DESCRIPTOR:\r
- 175 00bc 0A                   .byte   10\r
- 176 00bd 03                   .byte   3\r
- 177 00be 30                   .byte   48\r
- 178 00bf 00                   .byte   0\r
- 179 00c0 30                   .byte   48\r
- 180 00c1 00                   .byte   0\r
- 181 00c2 30                   .byte   48\r
- 182 00c3 00                   .byte   0\r
- 183 00c4 31                   .byte   49\r
- 184 00c5 00                   .byte   0\r
- 185                           .type   USBFS_STRING_DESCRIPTORS, %object\r
- 186                           .size   USBFS_STRING_DESCRIPTORS, 83\r
- 187                   USBFS_STRING_DESCRIPTORS:\r
- 188 00c6 04                   .byte   4\r
- 189 00c7 03                   .byte   3\r
- 190 00c8 09                   .byte   9\r
- 191 00c9 04                   .byte   4\r
- 192 00ca 2C                   .byte   44\r
- 193 00cb 03                   .byte   3\r
- 194 00cc 43                   .byte   67\r
- 195 00cd 00                   .byte   0\r
- 196 00ce 79                   .byte   121\r
- 197 00cf 00                   .byte   0\r
- 198 00d0 70                   .byte   112\r
- 199 00d1 00                   .byte   0\r
- 200 00d2 72                   .byte   114\r
- 201 00d3 00                   .byte   0\r
- 202 00d4 65                   .byte   101\r
- 203 00d5 00                   .byte   0\r
- 204 00d6 73                   .byte   115\r
- 205 00d7 00                   .byte   0\r
- 206 00d8 73                   .byte   115\r
- 207 00d9 00                   .byte   0\r
- 208 00da 20                   .byte   32\r
- 209 00db 00                   .byte   0\r
- 210 00dc 53                   .byte   83\r
- 211 00dd 00                   .byte   0\r
- 212 00de 65                   .byte   101\r
- 213 00df 00                   .byte   0\r
- 214 00e0 6D                   .byte   109\r
- 215 00e1 00                   .byte   0\r
- 216 00e2 69                   .byte   105\r
- 217 00e3 00                   .byte   0\r
- 218 00e4 63                   .byte   99\r
- 219 00e5 00                   .byte   0\r
- 220 00e6 6F                   .byte   111\r
- 221 00e7 00                   .byte   0\r
- 222 00e8 6E                   .byte   110\r
- 223 00e9 00                   .byte   0\r
- 224 00ea 64                   .byte   100\r
- 225 00eb 00                   .byte   0\r
- 226 00ec 75                   .byte   117\r
- 227 00ed 00                   .byte   0\r
- 228 00ee 63                   .byte   99\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 5\r
-\r
-\r
- 229 00ef 00                   .byte   0\r
- 230 00f0 74                   .byte   116\r
- 231 00f1 00                   .byte   0\r
- 232 00f2 6F                   .byte   111\r
- 233 00f3 00                   .byte   0\r
- 234 00f4 72                   .byte   114\r
- 235 00f5 00                   .byte   0\r
- 236 00f6 22                   .byte   34\r
- 237 00f7 03                   .byte   3\r
- 238 00f8 50                   .byte   80\r
- 239 00f9 00                   .byte   0\r
- 240 00fa 53                   .byte   83\r
- 241 00fb 00                   .byte   0\r
- 242 00fc 6F                   .byte   111\r
- 243 00fd 00                   .byte   0\r
- 244 00fe 43                   .byte   67\r
- 245 00ff 00                   .byte   0\r
- 246 0100 33                   .byte   51\r
- 247 0101 00                   .byte   0\r
- 248 0102 20                   .byte   32\r
- 249 0103 00                   .byte   0\r
- 250 0104 42                   .byte   66\r
- 251 0105 00                   .byte   0\r
- 252 0106 6F                   .byte   111\r
- 253 0107 00                   .byte   0\r
- 254 0108 6F                   .byte   111\r
- 255 0109 00                   .byte   0\r
- 256 010a 74                   .byte   116\r
- 257 010b 00                   .byte   0\r
- 258 010c 6C                   .byte   108\r
- 259 010d 00                   .byte   0\r
- 260 010e 6F                   .byte   111\r
- 261 010f 00                   .byte   0\r
- 262 0110 61                   .byte   97\r
- 263 0111 00                   .byte   0\r
- 264 0112 64                   .byte   100\r
- 265 0113 00                   .byte   0\r
- 266 0114 65                   .byte   101\r
- 267 0115 00                   .byte   0\r
- 268 0116 72                   .byte   114\r
- 269 0117 00                   .byte   0\r
- 270 0118 00                   .byte   0\r
- 271                           .type   USBFS_DEVICE0_CONFIGURATION0_DESCR, %object\r
- 272                           .size   USBFS_DEVICE0_CONFIGURATION0_DESCR, 41\r
- 273                   USBFS_DEVICE0_CONFIGURATION0_DESCR:\r
- 274 0119 09                   .byte   9\r
- 275 011a 02                   .byte   2\r
- 276 011b 29                   .byte   41\r
- 277 011c 00                   .byte   0\r
- 278 011d 01                   .byte   1\r
- 279 011e 01                   .byte   1\r
- 280 011f 00                   .byte   0\r
- 281 0120 80                   .byte   -128\r
- 282 0121 00                   .byte   0\r
- 283 0122 09                   .byte   9\r
- 284 0123 04                   .byte   4\r
- 285 0124 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 6\r
-\r
-\r
- 286 0125 00                   .byte   0\r
- 287 0126 02                   .byte   2\r
- 288 0127 03                   .byte   3\r
- 289 0128 00                   .byte   0\r
- 290 0129 00                   .byte   0\r
- 291 012a 02                   .byte   2\r
- 292 012b 09                   .byte   9\r
- 293 012c 21                   .byte   33\r
- 294 012d 11                   .byte   17\r
- 295 012e 01                   .byte   1\r
- 296 012f 00                   .byte   0\r
- 297 0130 01                   .byte   1\r
- 298 0131 22                   .byte   34\r
- 299 0132 24                   .byte   36\r
- 300 0133 00                   .byte   0\r
- 301 0134 07                   .byte   7\r
- 302 0135 05                   .byte   5\r
- 303 0136 01                   .byte   1\r
- 304 0137 03                   .byte   3\r
- 305 0138 40                   .byte   64\r
- 306 0139 00                   .byte   0\r
- 307 013a 01                   .byte   1\r
- 308 013b 07                   .byte   7\r
- 309 013c 05                   .byte   5\r
- 310 013d 82                   .byte   -126\r
- 311 013e 03                   .byte   3\r
- 312 013f 40                   .byte   64\r
- 313 0140 00                   .byte   0\r
- 314 0141 01                   .byte   1\r
- 315                           .type   USBFS_DEVICE0_DESCR, %object\r
- 316                           .size   USBFS_DEVICE0_DESCR, 18\r
- 317                   USBFS_DEVICE0_DESCR:\r
- 318 0142 12                   .byte   18\r
- 319 0143 01                   .byte   1\r
- 320 0144 00                   .byte   0\r
- 321 0145 02                   .byte   2\r
- 322 0146 00                   .byte   0\r
- 323 0147 00                   .byte   0\r
- 324 0148 00                   .byte   0\r
- 325 0149 08                   .byte   8\r
- 326 014a B4                   .byte   -76\r
- 327 014b 04                   .byte   4\r
- 328 014c 1D                   .byte   29\r
- 329 014d B7                   .byte   -73\r
- 330 014e 01                   .byte   1\r
- 331 014f 30                   .byte   48\r
- 332 0150 01                   .byte   1\r
- 333 0151 02                   .byte   2\r
- 334 0152 80                   .byte   -128\r
- 335 0153 01                   .byte   1\r
- 336                           .text\r
- 337                   .Letext0:\r
- 338                           .file 1 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 339                           .file 2 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 340                           .file 3 ".\\Generated_Source\\PSoC5\\USBFS_descr.c"\r
- 341                           .section        .debug_info,"",%progbits\r
- 342                   .Ldebug_info0:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 7\r
-\r
-\r
- 343 0000 0B040000             .4byte  0x40b\r
- 344 0004 0200                 .2byte  0x2\r
- 345 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 346 000a 04                   .byte   0x4\r
- 347 000b 01                   .uleb128 0x1\r
- 348 000c 9C040000             .4byte  .LASF49\r
- 349 0010 01                   .byte   0x1\r
- 350 0011 FC030000             .4byte  .LASF50\r
- 351 0015 45020000             .4byte  .LASF51\r
- 352 0019 00000000             .4byte  .Ldebug_line0\r
- 353 001d 02                   .uleb128 0x2\r
- 354 001e 01                   .byte   0x1\r
- 355 001f 06                   .byte   0x6\r
- 356 0020 FF040000             .4byte  .LASF0\r
- 357 0024 02                   .uleb128 0x2\r
- 358 0025 01                   .byte   0x1\r
- 359 0026 08                   .byte   0x8\r
- 360 0027 C6030000             .4byte  .LASF1\r
- 361 002b 02                   .uleb128 0x2\r
- 362 002c 02                   .byte   0x2\r
- 363 002d 05                   .byte   0x5\r
- 364 002e 2E040000             .4byte  .LASF2\r
- 365 0032 02                   .uleb128 0x2\r
- 366 0033 02                   .byte   0x2\r
- 367 0034 07                   .byte   0x7\r
- 368 0035 17010000             .4byte  .LASF3\r
- 369 0039 02                   .uleb128 0x2\r
- 370 003a 04                   .byte   0x4\r
- 371 003b 05                   .byte   0x5\r
- 372 003c EF040000             .4byte  .LASF4\r
- 373 0040 02                   .uleb128 0x2\r
- 374 0041 04                   .byte   0x4\r
- 375 0042 07                   .byte   0x7\r
- 376 0043 6F030000             .4byte  .LASF5\r
- 377 0047 02                   .uleb128 0x2\r
- 378 0048 08                   .byte   0x8\r
- 379 0049 05                   .byte   0x5\r
- 380 004a DD030000             .4byte  .LASF6\r
- 381 004e 02                   .uleb128 0x2\r
- 382 004f 08                   .byte   0x8\r
- 383 0050 07                   .byte   0x7\r
- 384 0051 8E030000             .4byte  .LASF7\r
- 385 0055 03                   .uleb128 0x3\r
- 386 0056 04                   .byte   0x4\r
- 387 0057 05                   .byte   0x5\r
- 388 0058 696E7400             .ascii  "int\000"\r
- 389 005c 02                   .uleb128 0x2\r
- 390 005d 04                   .byte   0x4\r
- 391 005e 07                   .byte   0x7\r
- 392 005f 81030000             .4byte  .LASF8\r
- 393 0063 04                   .uleb128 0x4\r
- 394 0064 96040000             .4byte  .LASF9\r
- 395 0068 01                   .byte   0x1\r
- 396 0069 5B                   .byte   0x5b\r
- 397 006a 24000000             .4byte  0x24\r
- 398 006e 04                   .uleb128 0x4\r
- 399 006f 16030000             .4byte  .LASF10\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 8\r
-\r
-\r
- 400 0073 01                   .byte   0x1\r
- 401 0074 5C                   .byte   0x5c\r
- 402 0075 32000000             .4byte  0x32\r
- 403 0079 02                   .uleb128 0x2\r
- 404 007a 04                   .byte   0x4\r
- 405 007b 04                   .byte   0x4\r
- 406 007c 9F010000             .4byte  .LASF11\r
- 407 0080 02                   .uleb128 0x2\r
- 408 0081 08                   .byte   0x8\r
- 409 0082 04                   .byte   0x4\r
- 410 0083 0F030000             .4byte  .LASF12\r
- 411 0087 02                   .uleb128 0x2\r
- 412 0088 01                   .byte   0x1\r
- 413 0089 08                   .byte   0x8\r
- 414 008a F7030000             .4byte  .LASF13\r
- 415 008e 05                   .uleb128 0x5\r
- 416 008f 63000000             .4byte  0x63\r
- 417 0093 02                   .uleb128 0x2\r
- 418 0094 04                   .byte   0x4\r
- 419 0095 07                   .byte   0x7\r
- 420 0096 D4030000             .4byte  .LASF14\r
- 421 009a 06                   .uleb128 0x6\r
- 422 009b 08                   .byte   0x8\r
- 423 009c 02                   .byte   0x2\r
- 424 009d 86                   .byte   0x86\r
- 425 009e F7000000             .4byte  0xf7\r
- 426 00a2 07                   .uleb128 0x7\r
- 427 00a3 E5040000             .4byte  .LASF15\r
- 428 00a7 02                   .byte   0x2\r
- 429 00a8 88                   .byte   0x88\r
- 430 00a9 63000000             .4byte  0x63\r
- 431 00ad 02                   .byte   0x2\r
- 432 00ae 23                   .byte   0x23\r
- 433 00af 00                   .uleb128 0\r
- 434 00b0 07                   .uleb128 0x7\r
- 435 00b1 89010000             .4byte  .LASF16\r
- 436 00b5 02                   .byte   0x2\r
- 437 00b6 89                   .byte   0x89\r
- 438 00b7 63000000             .4byte  0x63\r
- 439 00bb 02                   .byte   0x2\r
- 440 00bc 23                   .byte   0x23\r
- 441 00bd 01                   .uleb128 0x1\r
- 442 00be 07                   .uleb128 0x7\r
- 443 00bf 76020000             .4byte  .LASF17\r
- 444 00c3 02                   .byte   0x2\r
- 445 00c4 8A                   .byte   0x8a\r
- 446 00c5 63000000             .4byte  0x63\r
- 447 00c9 02                   .byte   0x2\r
- 448 00ca 23                   .byte   0x23\r
- 449 00cb 02                   .uleb128 0x2\r
- 450 00cc 07                   .uleb128 0x7\r
- 451 00cd FD010000             .4byte  .LASF18\r
- 452 00d1 02                   .byte   0x2\r
- 453 00d2 8B                   .byte   0x8b\r
- 454 00d3 63000000             .4byte  0x63\r
- 455 00d7 02                   .byte   0x2\r
- 456 00d8 23                   .byte   0x23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 9\r
-\r
-\r
- 457 00d9 03                   .uleb128 0x3\r
- 458 00da 07                   .uleb128 0x7\r
- 459 00db 23040000             .4byte  .LASF19\r
- 460 00df 02                   .byte   0x2\r
- 461 00e0 8C                   .byte   0x8c\r
- 462 00e1 6E000000             .4byte  0x6e\r
- 463 00e5 02                   .byte   0x2\r
- 464 00e6 23                   .byte   0x23\r
- 465 00e7 04                   .uleb128 0x4\r
- 466 00e8 07                   .uleb128 0x7\r
- 467 00e9 12050000             .4byte  .LASF20\r
- 468 00ed 02                   .byte   0x2\r
- 469 00ee 8D                   .byte   0x8d\r
- 470 00ef 63000000             .4byte  0x63\r
- 471 00f3 02                   .byte   0x2\r
- 472 00f4 23                   .byte   0x23\r
- 473 00f5 06                   .uleb128 0x6\r
- 474 00f6 00                   .byte   0\r
- 475 00f7 04                   .uleb128 0x4\r
- 476 00f8 AC030000             .4byte  .LASF21\r
- 477 00fc 02                   .byte   0x2\r
- 478 00fd 8E                   .byte   0x8e\r
- 479 00fe 9A000000             .4byte  0x9a\r
- 480 0102 06                   .uleb128 0x6\r
- 481 0103 04                   .byte   0x4\r
- 482 0104 02                   .byte   0x2\r
- 483 0105 90                   .byte   0x90\r
- 484 0106 27010000             .4byte  0x127\r
- 485 010a 07                   .uleb128 0x7\r
- 486 010b F8040000             .4byte  .LASF22\r
- 487 010f 02                   .byte   0x2\r
- 488 0110 92                   .byte   0x92\r
- 489 0111 63000000             .4byte  0x63\r
- 490 0115 02                   .byte   0x2\r
- 491 0116 23                   .byte   0x23\r
- 492 0117 00                   .uleb128 0\r
- 493 0118 07                   .uleb128 0x7\r
- 494 0119 0B050000             .4byte  .LASF23\r
- 495 011d 02                   .byte   0x2\r
- 496 011e 93                   .byte   0x93\r
- 497 011f 6E000000             .4byte  0x6e\r
- 498 0123 02                   .byte   0x2\r
- 499 0124 23                   .byte   0x23\r
- 500 0125 02                   .uleb128 0x2\r
- 501 0126 00                   .byte   0\r
- 502 0127 04                   .uleb128 0x4\r
- 503 0128 08020000             .4byte  .LASF24\r
- 504 012c 02                   .byte   0x2\r
- 505 012d 94                   .byte   0x94\r
- 506 012e 02010000             .4byte  0x102\r
- 507 0132 06                   .uleb128 0x6\r
- 508 0133 0C                   .byte   0xc\r
- 509 0134 02                   .byte   0x2\r
- 510 0135 96                   .byte   0x96\r
- 511 0136 65010000             .4byte  0x165\r
- 512 013a 07                   .uleb128 0x7\r
- 513 013b E3000000             .4byte  .LASF25\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 10\r
-\r
-\r
- 514 013f 02                   .byte   0x2\r
- 515 0140 98                   .byte   0x98\r
- 516 0141 6E000000             .4byte  0x6e\r
- 517 0145 02                   .byte   0x2\r
- 518 0146 23                   .byte   0x23\r
- 519 0147 00                   .uleb128 0\r
- 520 0148 07                   .uleb128 0x7\r
- 521 0149 83010000             .4byte  .LASF26\r
- 522 014d 02                   .byte   0x2\r
- 523 014e 99                   .byte   0x99\r
- 524 014f 65010000             .4byte  0x165\r
- 525 0153 02                   .byte   0x2\r
- 526 0154 23                   .byte   0x23\r
- 527 0155 04                   .uleb128 0x4\r
- 528 0156 07                   .uleb128 0x7\r
- 529 0157 14000000             .4byte  .LASF27\r
- 530 015b 02                   .byte   0x2\r
- 531 015c 9A                   .byte   0x9a\r
- 532 015d 6B010000             .4byte  0x16b\r
- 533 0161 02                   .byte   0x2\r
- 534 0162 23                   .byte   0x23\r
- 535 0163 08                   .uleb128 0x8\r
- 536 0164 00                   .byte   0\r
- 537 0165 08                   .uleb128 0x8\r
- 538 0166 04                   .byte   0x4\r
- 539 0167 8E000000             .4byte  0x8e\r
- 540 016b 08                   .uleb128 0x8\r
- 541 016c 04                   .byte   0x4\r
- 542 016d 27010000             .4byte  0x127\r
- 543 0171 04                   .uleb128 0x4\r
- 544 0172 94010000             .4byte  .LASF28\r
- 545 0176 02                   .byte   0x2\r
- 546 0177 9B                   .byte   0x9b\r
- 547 0178 32010000             .4byte  0x132\r
- 548 017c 06                   .uleb128 0x6\r
- 549 017d 08                   .byte   0x8\r
- 550 017e 02                   .byte   0x2\r
- 551 017f 9E                   .byte   0x9e\r
- 552 0180 9F010000             .4byte  0x19f\r
- 553 0184 09                   .uleb128 0x9\r
- 554 0185 6300                 .ascii  "c\000"\r
- 555 0187 02                   .byte   0x2\r
- 556 0188 A0                   .byte   0xa0\r
- 557 0189 63000000             .4byte  0x63\r
- 558 018d 02                   .byte   0x2\r
- 559 018e 23                   .byte   0x23\r
- 560 018f 00                   .uleb128 0\r
- 561 0190 07                   .uleb128 0x7\r
- 562 0191 A5030000             .4byte  .LASF29\r
- 563 0195 02                   .byte   0x2\r
- 564 0196 A1                   .byte   0xa1\r
- 565 0197 9F010000             .4byte  0x19f\r
- 566 019b 02                   .byte   0x2\r
- 567 019c 23                   .byte   0x23\r
- 568 019d 04                   .uleb128 0x4\r
- 569 019e 00                   .byte   0\r
- 570 019f 08                   .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 11\r
-\r
-\r
- 571 01a0 04                   .byte   0x4\r
- 572 01a1 A5010000             .4byte  0x1a5\r
- 573 01a5 0A                   .uleb128 0xa\r
- 574 01a6 04                   .uleb128 0x4\r
- 575 01a7 EB030000             .4byte  .LASF30\r
- 576 01ab 02                   .byte   0x2\r
- 577 01ac A2                   .byte   0xa2\r
- 578 01ad 7C010000             .4byte  0x17c\r
- 579 01b1 0B                   .uleb128 0xb\r
- 580 01b2 63000000             .4byte  0x63\r
- 581 01b6 C1010000             .4byte  0x1c1\r
- 582 01ba 0C                   .uleb128 0xc\r
- 583 01bb 93000000             .4byte  0x93\r
- 584 01bf 11                   .byte   0x11\r
- 585 01c0 00                   .byte   0\r
- 586 01c1 0D                   .uleb128 0xd\r
- 587 01c2 00000000             .4byte  .LASF31\r
- 588 01c6 03                   .byte   0x3\r
- 589 01c7 27                   .byte   0x27\r
- 590 01c8 D3010000             .4byte  0x1d3\r
- 591 01cc 01                   .byte   0x1\r
- 592 01cd 05                   .byte   0x5\r
- 593 01ce 03                   .byte   0x3\r
- 594 01cf 00000000             .4byte  USBFS_DEVICE0_DESCR\r
- 595 01d3 0E                   .uleb128 0xe\r
- 596 01d4 B1010000             .4byte  0x1b1\r
- 597 01d8 0B                   .uleb128 0xb\r
- 598 01d9 63000000             .4byte  0x63\r
- 599 01dd E8010000             .4byte  0x1e8\r
- 600 01e1 0C                   .uleb128 0xc\r
- 601 01e2 93000000             .4byte  0x93\r
- 602 01e6 28                   .byte   0x28\r
- 603 01e7 00                   .byte   0\r
- 604 01e8 0D                   .uleb128 0xd\r
- 605 01e9 4C030000             .4byte  .LASF32\r
- 606 01ed 03                   .byte   0x3\r
- 607 01ee 3A                   .byte   0x3a\r
- 608 01ef FA010000             .4byte  0x1fa\r
- 609 01f3 01                   .byte   0x1\r
- 610 01f4 05                   .byte   0x5\r
- 611 01f5 03                   .byte   0x3\r
- 612 01f6 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_DESCR\r
- 613 01fa 0E                   .uleb128 0xe\r
- 614 01fb D8010000             .4byte  0x1d8\r
- 615 01ff 0B                   .uleb128 0xb\r
- 616 0200 A6010000             .4byte  0x1a6\r
- 617 0204 0F020000             .4byte  0x20f\r
- 618 0208 0C                   .uleb128 0xc\r
- 619 0209 93000000             .4byte  0x93\r
- 620 020d 00                   .byte   0\r
- 621 020e 00                   .byte   0\r
- 622 020f 0D                   .uleb128 0xd\r
- 623 0210 E9000000             .4byte  .LASF33\r
- 624 0214 03                   .byte   0x3\r
- 625 0215 E8                   .byte   0xe8\r
- 626 0216 21020000             .4byte  0x221\r
- 627 021a 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 12\r
-\r
-\r
- 628 021b 05                   .byte   0x5\r
- 629 021c 03                   .byte   0x3\r
- 630 021d 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE\r
- 631 0221 0E                   .uleb128 0xe\r
- 632 0222 FF010000             .4byte  0x1ff\r
- 633 0226 0B                   .uleb128 0xb\r
- 634 0227 F7000000             .4byte  0xf7\r
- 635 022b 36020000             .4byte  0x236\r
- 636 022f 0C                   .uleb128 0xc\r
- 637 0230 93000000             .4byte  0x93\r
- 638 0234 01                   .byte   0x1\r
- 639 0235 00                   .byte   0\r
- 640 0236 0D                   .uleb128 0xd\r
- 641 0237 1D030000             .4byte  .LASF34\r
- 642 023b 03                   .byte   0x3\r
- 643 023c F3                   .byte   0xf3\r
- 644 023d 48020000             .4byte  0x248\r
- 645 0241 01                   .byte   0x1\r
- 646 0242 05                   .byte   0x5\r
- 647 0243 03                   .byte   0x3\r
- 648 0244 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE\r
- 649 0248 0E                   .uleb128 0xe\r
- 650 0249 26020000             .4byte  0x226\r
- 651 024d 0B                   .uleb128 0xb\r
- 652 024e 63000000             .4byte  0x63\r
- 653 0252 5D020000             .4byte  0x25d\r
- 654 0256 0C                   .uleb128 0xc\r
- 655 0257 93000000             .4byte  0x93\r
- 656 025b 00                   .byte   0\r
- 657 025c 00                   .byte   0\r
- 658 025d 0D                   .uleb128 0xd\r
- 659 025e 21000000             .4byte  .LASF35\r
- 660 0262 03                   .byte   0x3\r
- 661 0263 F8                   .byte   0xf8\r
- 662 0264 6F020000             .4byte  0x26f\r
- 663 0268 01                   .byte   0x1\r
- 664 0269 05                   .byte   0x5\r
- 665 026a 03                   .byte   0x3\r
- 666 026b 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS\r
- 667 026f 0E                   .uleb128 0xe\r
- 668 0270 4D020000             .4byte  0x24d\r
- 669 0274 0B                   .uleb128 0xb\r
- 670 0275 A6010000             .4byte  0x1a6\r
- 671 0279 84020000             .4byte  0x284\r
- 672 027d 0C                   .uleb128 0xc\r
- 673 027e 93000000             .4byte  0x93\r
- 674 0282 03                   .byte   0x3\r
- 675 0283 00                   .byte   0\r
- 676 0284 0F                   .uleb128 0xf\r
- 677 0285 22020000             .4byte  .LASF36\r
- 678 0289 03                   .byte   0x3\r
- 679 028a 0001                 .2byte  0x100\r
- 680 028c 97020000             .4byte  0x297\r
- 681 0290 01                   .byte   0x1\r
- 682 0291 05                   .byte   0x5\r
- 683 0292 03                   .byte   0x3\r
- 684 0293 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_TABLE\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 13\r
-\r
-\r
- 685 0297 0E                   .uleb128 0xe\r
- 686 0298 74020000             .4byte  0x274\r
- 687 029c 0B                   .uleb128 0xb\r
- 688 029d A6010000             .4byte  0x1a6\r
- 689 02a1 AC020000             .4byte  0x2ac\r
- 690 02a5 0C                   .uleb128 0xc\r
- 691 02a6 93000000             .4byte  0x93\r
- 692 02aa 01                   .byte   0x1\r
- 693 02ab 00                   .byte   0\r
- 694 02ac 0F                   .uleb128 0xf\r
- 695 02ad 7B020000             .4byte  .LASF37\r
- 696 02b1 03                   .byte   0x3\r
- 697 02b2 0A01                 .2byte  0x10a\r
- 698 02b4 BF020000             .4byte  0x2bf\r
- 699 02b8 01                   .byte   0x1\r
- 700 02b9 05                   .byte   0x5\r
- 701 02ba 03                   .byte   0x3\r
- 702 02bb 00000000             .4byte  USBFS_DEVICE0_TABLE\r
- 703 02bf 0E                   .uleb128 0xe\r
- 704 02c0 9C020000             .4byte  0x29c\r
- 705 02c4 0F                   .uleb128 0xf\r
- 706 02c5 D7000000             .4byte  .LASF38\r
- 707 02c9 03                   .byte   0x3\r
- 708 02ca 1101                 .2byte  0x111\r
- 709 02cc D7020000             .4byte  0x2d7\r
- 710 02d0 01                   .byte   0x1\r
- 711 02d1 05                   .byte   0x5\r
- 712 02d2 03                   .byte   0x3\r
- 713 02d3 00000000             .4byte  USBFS_TABLE\r
- 714 02d7 0E                   .uleb128 0xe\r
- 715 02d8 FF010000             .4byte  0x1ff\r
- 716 02dc 0B                   .uleb128 0xb\r
- 717 02dd 63000000             .4byte  0x63\r
- 718 02e1 EC020000             .4byte  0x2ec\r
- 719 02e5 0C                   .uleb128 0xc\r
- 720 02e6 93000000             .4byte  0x93\r
- 721 02ea 09                   .byte   0x9\r
- 722 02eb 00                   .byte   0\r
- 723 02ec 0D                   .uleb128 0xd\r
- 724 02ed 2A010000             .4byte  .LASF39\r
- 725 02f1 03                   .byte   0x3\r
- 726 02f2 92                   .byte   0x92\r
- 727 02f3 FE020000             .4byte  0x2fe\r
- 728 02f7 01                   .byte   0x1\r
- 729 02f8 05                   .byte   0x5\r
- 730 02f9 03                   .byte   0x3\r
- 731 02fa 00000000             .4byte  USBFS_SN_STRING_DESCRIPTOR\r
- 732 02fe 0E                   .uleb128 0xe\r
- 733 02ff DC020000             .4byte  0x2dc\r
- 734 0303 0B                   .uleb128 0xb\r
- 735 0304 63000000             .4byte  0x63\r
- 736 0308 13030000             .4byte  0x313\r
- 737 030c 0C                   .uleb128 0xc\r
- 738 030d 93000000             .4byte  0x93\r
- 739 0311 52                   .byte   0x52\r
- 740 0312 00                   .byte   0\r
- 741 0313 0D                   .uleb128 0xd\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 14\r
-\r
-\r
- 742 0314 E4010000             .4byte  .LASF40\r
- 743 0318 03                   .byte   0x3\r
- 744 0319 71                   .byte   0x71\r
- 745 031a 25030000             .4byte  0x325\r
- 746 031e 01                   .byte   0x1\r
- 747 031f 05                   .byte   0x5\r
- 748 0320 03                   .byte   0x3\r
- 749 0321 00000000             .4byte  USBFS_STRING_DESCRIPTORS\r
- 750 0325 0E                   .uleb128 0xe\r
- 751 0326 03030000             .4byte  0x303\r
- 752 032a 0D                   .uleb128 0xd\r
- 753 032b 54040000             .4byte  .LASF41\r
- 754 032f 03                   .byte   0x3\r
- 755 0330 B9                   .byte   0xb9\r
- 756 0331 27010000             .4byte  0x127\r
- 757 0335 01                   .byte   0x1\r
- 758 0336 05                   .byte   0x5\r
- 759 0337 03                   .byte   0x3\r
- 760 0338 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB\r
- 761 033c 0B                   .uleb128 0xb\r
- 762 033d 63000000             .4byte  0x63\r
- 763 0341 4C030000             .4byte  0x34c\r
- 764 0345 0C                   .uleb128 0xc\r
- 765 0346 93000000             .4byte  0x93\r
- 766 034a 40                   .byte   0x40\r
- 767 034b 00                   .byte   0\r
- 768 034c 0D                   .uleb128 0xd\r
- 769 034d 45010000             .4byte  .LASF42\r
- 770 0351 03                   .byte   0x3\r
- 771 0352 BA                   .byte   0xba\r
- 772 0353 3C030000             .4byte  0x33c\r
- 773 0357 01                   .byte   0x1\r
- 774 0358 05                   .byte   0x5\r
- 775 0359 03                   .byte   0x3\r
- 776 035a 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF\r
- 777 035e 0D                   .uleb128 0xd\r
- 778 035f 8F020000             .4byte  .LASF43\r
- 779 0363 03                   .byte   0x3\r
- 780 0364 C8                   .byte   0xc8\r
- 781 0365 27010000             .4byte  0x127\r
- 782 0369 01                   .byte   0x1\r
- 783 036a 05                   .byte   0x5\r
- 784 036b 03                   .byte   0x3\r
- 785 036c 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB\r
- 786 0370 0D                   .uleb128 0xd\r
- 787 0371 A5010000             .4byte  .LASF44\r
- 788 0375 03                   .byte   0x3\r
- 789 0376 C9                   .byte   0xc9\r
- 790 0377 3C030000             .4byte  0x33c\r
- 791 037b 01                   .byte   0x1\r
- 792 037c 05                   .byte   0x5\r
- 793 037d 03                   .byte   0x3\r
- 794 037e 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF\r
- 795 0382 0B                   .uleb128 0xb\r
- 796 0383 63000000             .4byte  0x63\r
- 797 0387 92030000             .4byte  0x392\r
- 798 038b 0C                   .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 15\r
-\r
-\r
- 799 038c 93000000             .4byte  0x93\r
- 800 0390 27                   .byte   0x27\r
- 801 0391 00                   .byte   0\r
- 802 0392 0D                   .uleb128 0xd\r
- 803 0393 38040000             .4byte  .LASF45\r
- 804 0397 03                   .byte   0x3\r
- 805 0398 9B                   .byte   0x9b\r
- 806 0399 A4030000             .4byte  0x3a4\r
- 807 039d 01                   .byte   0x1\r
- 808 039e 05                   .byte   0x5\r
- 809 039f 03                   .byte   0x3\r
- 810 03a0 00000000             .4byte  USBFS_HIDREPORT_DESCRIPTOR1\r
- 811 03a4 0E                   .uleb128 0xe\r
- 812 03a5 82030000             .4byte  0x382\r
- 813 03a9 0B                   .uleb128 0xb\r
- 814 03aa 71010000             .4byte  0x171\r
- 815 03ae B9030000             .4byte  0x3b9\r
- 816 03b2 0C                   .uleb128 0xc\r
- 817 03b3 93000000             .4byte  0x93\r
- 818 03b7 00                   .byte   0\r
- 819 03b8 00                   .byte   0\r
- 820 03b9 0D                   .uleb128 0xd\r
- 821 03ba 93000000             .4byte  .LASF46\r
- 822 03be 03                   .byte   0x3\r
- 823 03bf C0                   .byte   0xc0\r
- 824 03c0 CB030000             .4byte  0x3cb\r
- 825 03c4 01                   .byte   0x1\r
- 826 03c5 05                   .byte   0x5\r
- 827 03c6 03                   .byte   0x3\r
- 828 03c7 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE\r
- 829 03cb 0E                   .uleb128 0xe\r
- 830 03cc A9030000             .4byte  0x3a9\r
- 831 03d0 0D                   .uleb128 0xd\r
- 832 03d1 4E000000             .4byte  .LASF47\r
- 833 03d5 03                   .byte   0x3\r
- 834 03d6 CF                   .byte   0xcf\r
- 835 03d7 E2030000             .4byte  0x3e2\r
- 836 03db 01                   .byte   0x1\r
- 837 03dc 05                   .byte   0x5\r
- 838 03dd 03                   .byte   0x3\r
- 839 03de 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE\r
- 840 03e2 0E                   .uleb128 0xe\r
- 841 03e3 A9030000             .4byte  0x3a9\r
- 842 03e7 0B                   .uleb128 0xb\r
- 843 03e8 A6010000             .4byte  0x1a6\r
- 844 03ec F7030000             .4byte  0x3f7\r
- 845 03f0 0C                   .uleb128 0xc\r
- 846 03f1 93000000             .4byte  0x93\r
- 847 03f5 04                   .byte   0x4\r
- 848 03f6 00                   .byte   0\r
- 849 03f7 0D                   .uleb128 0xd\r
- 850 03f8 D2020000             .4byte  .LASF48\r
- 851 03fc 03                   .byte   0x3\r
- 852 03fd DC                   .byte   0xdc\r
- 853 03fe 09040000             .4byte  0x409\r
- 854 0402 01                   .byte   0x1\r
- 855 0403 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 16\r
-\r
-\r
- 856 0404 03                   .byte   0x3\r
- 857 0405 00000000             .4byte  USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE\r
- 858 0409 0E                   .uleb128 0xe\r
- 859 040a E7030000             .4byte  0x3e7\r
- 860 040e 00                   .byte   0\r
- 861                           .section        .debug_abbrev,"",%progbits\r
- 862                   .Ldebug_abbrev0:\r
- 863 0000 01                   .uleb128 0x1\r
- 864 0001 11                   .uleb128 0x11\r
- 865 0002 01                   .byte   0x1\r
- 866 0003 25                   .uleb128 0x25\r
- 867 0004 0E                   .uleb128 0xe\r
- 868 0005 13                   .uleb128 0x13\r
- 869 0006 0B                   .uleb128 0xb\r
- 870 0007 03                   .uleb128 0x3\r
- 871 0008 0E                   .uleb128 0xe\r
- 872 0009 1B                   .uleb128 0x1b\r
- 873 000a 0E                   .uleb128 0xe\r
- 874 000b 10                   .uleb128 0x10\r
- 875 000c 06                   .uleb128 0x6\r
- 876 000d 00                   .byte   0\r
- 877 000e 00                   .byte   0\r
- 878 000f 02                   .uleb128 0x2\r
- 879 0010 24                   .uleb128 0x24\r
- 880 0011 00                   .byte   0\r
- 881 0012 0B                   .uleb128 0xb\r
- 882 0013 0B                   .uleb128 0xb\r
- 883 0014 3E                   .uleb128 0x3e\r
- 884 0015 0B                   .uleb128 0xb\r
- 885 0016 03                   .uleb128 0x3\r
- 886 0017 0E                   .uleb128 0xe\r
- 887 0018 00                   .byte   0\r
- 888 0019 00                   .byte   0\r
- 889 001a 03                   .uleb128 0x3\r
- 890 001b 24                   .uleb128 0x24\r
- 891 001c 00                   .byte   0\r
- 892 001d 0B                   .uleb128 0xb\r
- 893 001e 0B                   .uleb128 0xb\r
- 894 001f 3E                   .uleb128 0x3e\r
- 895 0020 0B                   .uleb128 0xb\r
- 896 0021 03                   .uleb128 0x3\r
- 897 0022 08                   .uleb128 0x8\r
- 898 0023 00                   .byte   0\r
- 899 0024 00                   .byte   0\r
- 900 0025 04                   .uleb128 0x4\r
- 901 0026 16                   .uleb128 0x16\r
- 902 0027 00                   .byte   0\r
- 903 0028 03                   .uleb128 0x3\r
- 904 0029 0E                   .uleb128 0xe\r
- 905 002a 3A                   .uleb128 0x3a\r
- 906 002b 0B                   .uleb128 0xb\r
- 907 002c 3B                   .uleb128 0x3b\r
- 908 002d 0B                   .uleb128 0xb\r
- 909 002e 49                   .uleb128 0x49\r
- 910 002f 13                   .uleb128 0x13\r
- 911 0030 00                   .byte   0\r
- 912 0031 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 17\r
-\r
-\r
- 913 0032 05                   .uleb128 0x5\r
- 914 0033 35                   .uleb128 0x35\r
- 915 0034 00                   .byte   0\r
- 916 0035 49                   .uleb128 0x49\r
- 917 0036 13                   .uleb128 0x13\r
- 918 0037 00                   .byte   0\r
- 919 0038 00                   .byte   0\r
- 920 0039 06                   .uleb128 0x6\r
- 921 003a 13                   .uleb128 0x13\r
- 922 003b 01                   .byte   0x1\r
- 923 003c 0B                   .uleb128 0xb\r
- 924 003d 0B                   .uleb128 0xb\r
- 925 003e 3A                   .uleb128 0x3a\r
- 926 003f 0B                   .uleb128 0xb\r
- 927 0040 3B                   .uleb128 0x3b\r
- 928 0041 0B                   .uleb128 0xb\r
- 929 0042 01                   .uleb128 0x1\r
- 930 0043 13                   .uleb128 0x13\r
- 931 0044 00                   .byte   0\r
- 932 0045 00                   .byte   0\r
- 933 0046 07                   .uleb128 0x7\r
- 934 0047 0D                   .uleb128 0xd\r
- 935 0048 00                   .byte   0\r
- 936 0049 03                   .uleb128 0x3\r
- 937 004a 0E                   .uleb128 0xe\r
- 938 004b 3A                   .uleb128 0x3a\r
- 939 004c 0B                   .uleb128 0xb\r
- 940 004d 3B                   .uleb128 0x3b\r
- 941 004e 0B                   .uleb128 0xb\r
- 942 004f 49                   .uleb128 0x49\r
- 943 0050 13                   .uleb128 0x13\r
- 944 0051 38                   .uleb128 0x38\r
- 945 0052 0A                   .uleb128 0xa\r
- 946 0053 00                   .byte   0\r
- 947 0054 00                   .byte   0\r
- 948 0055 08                   .uleb128 0x8\r
- 949 0056 0F                   .uleb128 0xf\r
- 950 0057 00                   .byte   0\r
- 951 0058 0B                   .uleb128 0xb\r
- 952 0059 0B                   .uleb128 0xb\r
- 953 005a 49                   .uleb128 0x49\r
- 954 005b 13                   .uleb128 0x13\r
- 955 005c 00                   .byte   0\r
- 956 005d 00                   .byte   0\r
- 957 005e 09                   .uleb128 0x9\r
- 958 005f 0D                   .uleb128 0xd\r
- 959 0060 00                   .byte   0\r
- 960 0061 03                   .uleb128 0x3\r
- 961 0062 08                   .uleb128 0x8\r
- 962 0063 3A                   .uleb128 0x3a\r
- 963 0064 0B                   .uleb128 0xb\r
- 964 0065 3B                   .uleb128 0x3b\r
- 965 0066 0B                   .uleb128 0xb\r
- 966 0067 49                   .uleb128 0x49\r
- 967 0068 13                   .uleb128 0x13\r
- 968 0069 38                   .uleb128 0x38\r
- 969 006a 0A                   .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 18\r
-\r
-\r
- 970 006b 00                   .byte   0\r
- 971 006c 00                   .byte   0\r
- 972 006d 0A                   .uleb128 0xa\r
- 973 006e 26                   .uleb128 0x26\r
- 974 006f 00                   .byte   0\r
- 975 0070 00                   .byte   0\r
- 976 0071 00                   .byte   0\r
- 977 0072 0B                   .uleb128 0xb\r
- 978 0073 01                   .uleb128 0x1\r
- 979 0074 01                   .byte   0x1\r
- 980 0075 49                   .uleb128 0x49\r
- 981 0076 13                   .uleb128 0x13\r
- 982 0077 01                   .uleb128 0x1\r
- 983 0078 13                   .uleb128 0x13\r
- 984 0079 00                   .byte   0\r
- 985 007a 00                   .byte   0\r
- 986 007b 0C                   .uleb128 0xc\r
- 987 007c 21                   .uleb128 0x21\r
- 988 007d 00                   .byte   0\r
- 989 007e 49                   .uleb128 0x49\r
- 990 007f 13                   .uleb128 0x13\r
- 991 0080 2F                   .uleb128 0x2f\r
- 992 0081 0B                   .uleb128 0xb\r
- 993 0082 00                   .byte   0\r
- 994 0083 00                   .byte   0\r
- 995 0084 0D                   .uleb128 0xd\r
- 996 0085 34                   .uleb128 0x34\r
- 997 0086 00                   .byte   0\r
- 998 0087 03                   .uleb128 0x3\r
- 999 0088 0E                   .uleb128 0xe\r
- 1000 0089 3A                  .uleb128 0x3a\r
- 1001 008a 0B                  .uleb128 0xb\r
- 1002 008b 3B                  .uleb128 0x3b\r
- 1003 008c 0B                  .uleb128 0xb\r
- 1004 008d 49                  .uleb128 0x49\r
- 1005 008e 13                  .uleb128 0x13\r
- 1006 008f 3F                  .uleb128 0x3f\r
- 1007 0090 0C                  .uleb128 0xc\r
- 1008 0091 02                  .uleb128 0x2\r
- 1009 0092 0A                  .uleb128 0xa\r
- 1010 0093 00                  .byte   0\r
- 1011 0094 00                  .byte   0\r
- 1012 0095 0E                  .uleb128 0xe\r
- 1013 0096 26                  .uleb128 0x26\r
- 1014 0097 00                  .byte   0\r
- 1015 0098 49                  .uleb128 0x49\r
- 1016 0099 13                  .uleb128 0x13\r
- 1017 009a 00                  .byte   0\r
- 1018 009b 00                  .byte   0\r
- 1019 009c 0F                  .uleb128 0xf\r
- 1020 009d 34                  .uleb128 0x34\r
- 1021 009e 00                  .byte   0\r
- 1022 009f 03                  .uleb128 0x3\r
- 1023 00a0 0E                  .uleb128 0xe\r
- 1024 00a1 3A                  .uleb128 0x3a\r
- 1025 00a2 0B                  .uleb128 0xb\r
- 1026 00a3 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 19\r
-\r
-\r
- 1027 00a4 05                  .uleb128 0x5\r
- 1028 00a5 49                  .uleb128 0x49\r
- 1029 00a6 13                  .uleb128 0x13\r
- 1030 00a7 3F                  .uleb128 0x3f\r
- 1031 00a8 0C                  .uleb128 0xc\r
- 1032 00a9 02                  .uleb128 0x2\r
- 1033 00aa 0A                  .uleb128 0xa\r
- 1034 00ab 00                  .byte   0\r
- 1035 00ac 00                  .byte   0\r
- 1036 00ad 00                  .byte   0\r
- 1037                          .section        .debug_aranges,"",%progbits\r
- 1038 0000 14000000            .4byte  0x14\r
- 1039 0004 0200                .2byte  0x2\r
- 1040 0006 00000000            .4byte  .Ldebug_info0\r
- 1041 000a 04                  .byte   0x4\r
- 1042 000b 00                  .byte   0\r
- 1043 000c 0000                .2byte  0\r
- 1044 000e 0000                .2byte  0\r
- 1045 0010 00000000            .4byte  0\r
- 1046 0014 00000000            .4byte  0\r
- 1047                          .section        .debug_line,"",%progbits\r
- 1048                  .Ldebug_line0:\r
- 1049 0000 5B000000            .section        .debug_str,"MS",%progbits,1\r
- 1049      02005500 \r
- 1049      00000201 \r
- 1049      FB0E0D00 \r
- 1049      01010101 \r
- 1050                  .LASF31:\r
- 1051 0000 55534246            .ascii  "USBFS_DEVICE0_DESCR\000"\r
- 1051      535F4445 \r
- 1051      56494345 \r
- 1051      305F4445 \r
- 1051      53435200 \r
- 1052                  .LASF27:\r
- 1053 0014 70537461            .ascii  "pStatusBlock\000"\r
- 1053      74757342 \r
- 1053      6C6F636B \r
- 1053      00\r
- 1054                  .LASF35:\r
- 1055 0021 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS\000"\r
- 1055      535F4445 \r
- 1055      56494345 \r
- 1055      305F434F \r
- 1055      4E464947 \r
- 1056                  .LASF47:\r
- 1057 004e 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1057      535F4445 \r
- 1057      56494345 \r
- 1057      305F434F \r
- 1057      4E464947 \r
- 1058 0081 4849445F            .ascii  "HID_OUT_RPT_TABLE\000"\r
- 1058      4F55545F \r
- 1058      5250545F \r
- 1058      5441424C \r
- 1058      4500\r
- 1059                  .LASF46:\r
- 1060 0093 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 20\r
-\r
-\r
- 1060      535F4445 \r
- 1060      56494345 \r
- 1060      305F434F \r
- 1060      4E464947 \r
- 1061 00c6 4849445F            .ascii  "HID_IN_RPT_TABLE\000"\r
- 1061      494E5F52 \r
- 1061      50545F54 \r
- 1061      41424C45 \r
- 1061      00\r
- 1062                  .LASF38:\r
- 1063 00d7 55534246            .ascii  "USBFS_TABLE\000"\r
- 1063      535F5441 \r
- 1063      424C4500 \r
- 1064                  .LASF25:\r
- 1065 00e3 636F756E            .ascii  "count\000"\r
- 1065      7400\r
- 1066                  .LASF33:\r
- 1067 00e9 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE\000"\r
- 1067      535F4445 \r
- 1067      56494345 \r
- 1067      305F434F \r
- 1067      4E464947 \r
- 1068                  .LASF3:\r
- 1069 0117 73686F72            .ascii  "short unsigned int\000"\r
- 1069      7420756E \r
- 1069      7369676E \r
- 1069      65642069 \r
- 1069      6E7400\r
- 1070                  .LASF39:\r
- 1071 012a 55534246            .ascii  "USBFS_SN_STRING_DESCRIPTOR\000"\r
- 1071      535F534E \r
- 1071      5F535452 \r
- 1071      494E475F \r
- 1071      44455343 \r
- 1072                  .LASF42:\r
- 1073 0145 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1073      535F4445 \r
- 1073      56494345 \r
- 1073      305F434F \r
- 1073      4E464947 \r
- 1074 0178 4849445F            .ascii  "HID_IN_BUF\000"\r
- 1074      494E5F42 \r
- 1074      554600\r
- 1075                  .LASF26:\r
- 1076 0183 70446174            .ascii  "pData\000"\r
- 1076      6100\r
- 1077                  .LASF16:\r
- 1078 0189 616C7453            .ascii  "altSetting\000"\r
- 1078      65747469 \r
- 1078      6E6700\r
- 1079                  .LASF28:\r
- 1080 0194 545F5553            .ascii  "T_USBFS_TD\000"\r
- 1080      4246535F \r
- 1080      544400\r
- 1081                  .LASF11:\r
- 1082 019f 666C6F61            .ascii  "float\000"\r
- 1082      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 21\r
-\r
-\r
- 1083                  .LASF44:\r
- 1084 01a5 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1084      535F4445 \r
- 1084      56494345 \r
- 1084      305F434F \r
- 1084      4E464947 \r
- 1085 01d8 4849445F            .ascii  "HID_OUT_BUF\000"\r
- 1085      4F55545F \r
- 1085      42554600 \r
- 1086                  .LASF40:\r
- 1087 01e4 55534246            .ascii  "USBFS_STRING_DESCRIPTORS\000"\r
- 1087      535F5354 \r
- 1087      52494E47 \r
- 1087      5F444553 \r
- 1087      43524950 \r
- 1088                  .LASF18:\r
- 1089 01fd 61747472            .ascii  "attributes\000"\r
- 1089      69627574 \r
- 1089      657300\r
- 1090                  .LASF24:\r
- 1091 0208 545F5553            .ascii  "T_USBFS_XFER_STATUS_BLOCK\000"\r
- 1091      4246535F \r
- 1091      58464552 \r
- 1091      5F535441 \r
- 1091      5455535F \r
- 1092                  .LASF36:\r
- 1093 0222 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_TABLE\000"\r
- 1093      535F4445 \r
- 1093      56494345 \r
- 1093      305F434F \r
- 1093      4E464947 \r
- 1094                  .LASF51:\r
- 1095 0245 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 1095      43534932 \r
- 1095      53445C73 \r
- 1095      6F667477 \r
- 1095      6172655C \r
- 1096 0274 6E00                .ascii  "n\000"\r
- 1097                  .LASF17:\r
- 1098 0276 61646472            .ascii  "addr\000"\r
- 1098      00\r
- 1099                  .LASF37:\r
- 1100 027b 55534246            .ascii  "USBFS_DEVICE0_TABLE\000"\r
- 1100      535F4445 \r
- 1100      56494345 \r
- 1100      305F5441 \r
- 1100      424C4500 \r
- 1101                  .LASF43:\r
- 1102 028f 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1102      535F4445 \r
- 1102      56494345 \r
- 1102      305F434F \r
- 1102      4E464947 \r
- 1103 02c2 4849445F            .ascii  "HID_OUT_RPT_SCB\000"\r
- 1103      4F55545F \r
- 1103      5250545F \r
- 1103      53434200 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 22\r
-\r
-\r
- 1104                  .LASF48:\r
- 1105 02d2 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1105      535F4445 \r
- 1105      56494345 \r
- 1105      305F434F \r
- 1105      4E464947 \r
- 1106 0305 4849445F            .ascii  "HID_TABLE\000"\r
- 1106      5441424C \r
- 1106      4500\r
- 1107                  .LASF12:\r
- 1108 030f 646F7562            .ascii  "double\000"\r
- 1108      6C6500\r
- 1109                  .LASF10:\r
- 1110 0316 75696E74            .ascii  "uint16\000"\r
- 1110      313600\r
- 1111                  .LASF34:\r
- 1112 031d 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE\000"\r
- 1112      535F4445 \r
- 1112      56494345 \r
- 1112      305F434F \r
- 1112      4E464947 \r
- 1113                  .LASF32:\r
- 1114 034c 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_DESCR\000"\r
- 1114      535F4445 \r
- 1114      56494345 \r
- 1114      305F434F \r
- 1114      4E464947 \r
- 1115                  .LASF5:\r
- 1116 036f 6C6F6E67            .ascii  "long unsigned int\000"\r
- 1116      20756E73 \r
- 1116      69676E65 \r
- 1116      6420696E \r
- 1116      7400\r
- 1117                  .LASF8:\r
- 1118 0381 756E7369            .ascii  "unsigned int\000"\r
- 1118      676E6564 \r
- 1118      20696E74 \r
- 1118      00\r
- 1119                  .LASF7:\r
- 1120 038e 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1120      206C6F6E \r
- 1120      6720756E \r
- 1120      7369676E \r
- 1120      65642069 \r
- 1121                  .LASF29:\r
- 1122 03a5 705F6C69            .ascii  "p_list\000"\r
- 1122      737400\r
- 1123                  .LASF21:\r
- 1124 03ac 545F5553            .ascii  "T_USBFS_EP_SETTINGS_BLOCK\000"\r
- 1124      4246535F \r
- 1124      45505F53 \r
- 1124      45545449 \r
- 1124      4E47535F \r
- 1125                  .LASF1:\r
- 1126 03c6 756E7369            .ascii  "unsigned char\000"\r
- 1126      676E6564 \r
- 1126      20636861 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 23\r
-\r
-\r
- 1126      7200\r
- 1127                  .LASF14:\r
- 1128 03d4 73697A65            .ascii  "sizetype\000"\r
- 1128      74797065 \r
- 1128      00\r
- 1129                  .LASF6:\r
- 1130 03dd 6C6F6E67            .ascii  "long long int\000"\r
- 1130      206C6F6E \r
- 1130      6720696E \r
- 1130      7400\r
- 1131                  .LASF30:\r
- 1132 03eb 545F5553            .ascii  "T_USBFS_LUT\000"\r
- 1132      4246535F \r
- 1132      4C555400 \r
- 1133                  .LASF13:\r
- 1134 03f7 63686172            .ascii  "char\000"\r
- 1134      00\r
- 1135                  .LASF50:\r
- 1136 03fc 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_descr.c\000"\r
- 1136      6E657261 \r
- 1136      7465645F \r
- 1136      536F7572 \r
- 1136      63655C50 \r
- 1137                  .LASF19:\r
- 1138 0423 62756666            .ascii  "bufferSize\000"\r
- 1138      65725369 \r
- 1138      7A6500\r
- 1139                  .LASF2:\r
- 1140 042e 73686F72            .ascii  "short int\000"\r
- 1140      7420696E \r
- 1140      7400\r
- 1141                  .LASF45:\r
- 1142 0438 55534246            .ascii  "USBFS_HIDREPORT_DESCRIPTOR1\000"\r
- 1142      535F4849 \r
- 1142      44524550 \r
- 1142      4F52545F \r
- 1142      44455343 \r
- 1143                  .LASF41:\r
- 1144 0454 55534246            .ascii  "USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_"\r
- 1144      535F4445 \r
- 1144      56494345 \r
- 1144      305F434F \r
- 1144      4E464947 \r
- 1145 0487 4849445F            .ascii  "HID_IN_RPT_SCB\000"\r
- 1145      494E5F52 \r
- 1145      50545F53 \r
- 1145      434200\r
- 1146                  .LASF9:\r
- 1147 0496 75696E74            .ascii  "uint8\000"\r
- 1147      3800\r
- 1148                  .LASF49:\r
- 1149 049c 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 1149      4320342E \r
- 1149      372E3320 \r
- 1149      32303133 \r
- 1149      30333132 \r
- 1150 04cf 616E6368            .ascii  "anch revision 196615]\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccHIenTb.s                      page 24\r
-\r
-\r
- 1150      20726576 \r
- 1150      6973696F \r
- 1150      6E203139 \r
- 1150      36363135 \r
- 1151                  .LASF15:\r
- 1152 04e5 696E7465            .ascii  "interface\000"\r
- 1152      72666163 \r
- 1152      6500\r
- 1153                  .LASF4:\r
- 1154 04ef 6C6F6E67            .ascii  "long int\000"\r
- 1154      20696E74 \r
- 1154      00\r
- 1155                  .LASF22:\r
- 1156 04f8 73746174            .ascii  "status\000"\r
- 1156      757300\r
- 1157                  .LASF0:\r
- 1158 04ff 7369676E            .ascii  "signed char\000"\r
- 1158      65642063 \r
- 1158      68617200 \r
- 1159                  .LASF23:\r
- 1160 050b 6C656E67            .ascii  "length\000"\r
- 1160      746800\r
- 1161                  .LASF20:\r
- 1162 0512 624D6973            .ascii  "bMisc\000"\r
- 1162      6300\r
- 1163                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.o
deleted file mode 100755 (executable)
index 92cef23..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_descr.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.lst
deleted file mode 100755 (executable)
index f6fc75b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.lst
+++ /dev/null
@@ -1,4240 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_drv.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_LoadEP0,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_LoadEP0\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_LoadEP0, %function\r
-  24                   USBFS_LoadEP0:\r
-  25                   .LFB4:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_drv.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_drv.c **** * File Name: USBFS_drv.c\r
-   3:.\Generated_Source\PSoC5/USBFS_drv.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_drv.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Endpoint 0 Driver for the USBFS Component.\r
-   7:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_drv.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_drv.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_drv.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_drv.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_drv.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_drv.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_drv.c **** #include "USBFS_pvt.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  20:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  21:.\Generated_Source\PSoC5/USBFS_drv.c **** /***************************************\r
-  22:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global data allocation\r
-  23:.\Generated_Source\PSoC5/USBFS_drv.c **** ***************************************/\r
-  24:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  25:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile T_USBFS_EP_CTL_BLOCK USBFS_EP[USBFS_MAX_EP];\r
-  26:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_configuration;\r
-  27:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_interfaceNumber;\r
-  28:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_configurationChanged;\r
-  29:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_deviceAddress;\r
-  30:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_deviceStatus;\r
-  31:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_interfaceSetting[USBFS_MAX_INTERFACES_NUMBER];\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_interfaceSetting_last[USBFS_MAX_INTERFACES_NUMBER];\r
-  33:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_interfaceStatus[USBFS_MAX_INTERFACES_NUMBER];\r
-  34:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_device;\r
-  35:.\Generated_Source\PSoC5/USBFS_drv.c **** const uint8 CYCODE *USBFS_interfaceClass;\r
-  36:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  37:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  38:.\Generated_Source\PSoC5/USBFS_drv.c **** /***************************************\r
-  39:.\Generated_Source\PSoC5/USBFS_drv.c **** * Local data allocation\r
-  40:.\Generated_Source\PSoC5/USBFS_drv.c **** ***************************************/\r
-  41:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  42:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_ep0Toggle;\r
-  43:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_lastPacketSize;\r
-  44:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_transferState;\r
-  45:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile T_USBFS_TD USBFS_currentTD;\r
-  46:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_ep0Mode;\r
-  47:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint8 USBFS_ep0Count;\r
-  48:.\Generated_Source\PSoC5/USBFS_drv.c **** volatile uint16 USBFS_transferByteCount;\r
-  49:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  50:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  51:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
-  52:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_ep_0_Interrupt\r
-  53:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
-  54:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-  55:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
-  56:.\Generated_Source\PSoC5/USBFS_drv.c **** *  This Interrupt Service Routine handles Endpoint 0 (Control Pipe) traffic.\r
-  57:.\Generated_Source\PSoC5/USBFS_drv.c **** *  It dispatches setup requests and handles the data and status stages.\r
-  58:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-  59:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
-  60:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
-  61:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-  62:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
-  63:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
-  64:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-  65:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
-  66:.\Generated_Source\PSoC5/USBFS_drv.c **** CY_ISR(USBFS_EP_0_ISR)\r
-  67:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
-  68:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 bRegTemp;\r
-  69:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 modifyReg;\r
-  70:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  71:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  72:.\Generated_Source\PSoC5/USBFS_drv.c ****     bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);\r
-  73:.\Generated_Source\PSoC5/USBFS_drv.c ****     if ((bRegTemp & USBFS_MODE_ACKD) != 0u)\r
-  74:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
-  75:.\Generated_Source\PSoC5/USBFS_drv.c ****         modifyReg = 1u;\r
-  76:.\Generated_Source\PSoC5/USBFS_drv.c ****         if ((bRegTemp & USBFS_MODE_SETUP_RCVD) != 0u)\r
-  77:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
-  78:.\Generated_Source\PSoC5/USBFS_drv.c ****             if((bRegTemp & USBFS_MODE_MASK) != USBFS_MODE_NAK_IN_OUT)\r
-  79:.\Generated_Source\PSoC5/USBFS_drv.c ****             {\r
-  80:.\Generated_Source\PSoC5/USBFS_drv.c ****                 modifyReg = 0u;                                     /* When mode not NAK_IN_OUT => \r
-  81:.\Generated_Source\PSoC5/USBFS_drv.c ****             }\r
-  82:.\Generated_Source\PSoC5/USBFS_drv.c ****             else\r
-  83:.\Generated_Source\PSoC5/USBFS_drv.c ****             {\r
-  84:.\Generated_Source\PSoC5/USBFS_drv.c ****                 USBFS_HandleSetup();\r
-  85:.\Generated_Source\PSoC5/USBFS_drv.c ****                 if((USBFS_ep0Mode & USBFS_MODE_SETUP_RCVD) != 0u)\r
-  86:.\Generated_Source\PSoC5/USBFS_drv.c ****                 {\r
-  87:.\Generated_Source\PSoC5/USBFS_drv.c ****                     modifyReg = 0u;                         /* if SETUP bit set -> exit without mod\r
-  88:.\Generated_Source\PSoC5/USBFS_drv.c ****                 }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 3\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-  90:.\Generated_Source\PSoC5/USBFS_drv.c ****             }\r
-  91:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
-  92:.\Generated_Source\PSoC5/USBFS_drv.c ****         else if ((bRegTemp & USBFS_MODE_IN_RCVD) != 0u)\r
-  93:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
-  94:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_HandleIN();\r
-  95:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
-  96:.\Generated_Source\PSoC5/USBFS_drv.c ****         else if ((bRegTemp & USBFS_MODE_OUT_RCVD) != 0u)\r
-  97:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
-  98:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_HandleOUT();\r
-  99:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 100:.\Generated_Source\PSoC5/USBFS_drv.c ****         else\r
- 101:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
- 102:.\Generated_Source\PSoC5/USBFS_drv.c ****             modifyReg = 0u;\r
- 103:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 104:.\Generated_Source\PSoC5/USBFS_drv.c ****         if(modifyReg != 0u)\r
- 105:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
- 106:.\Generated_Source\PSoC5/USBFS_drv.c ****             bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);    /* unlock registers */\r
- 107:.\Generated_Source\PSoC5/USBFS_drv.c ****             if((bRegTemp & USBFS_MODE_SETUP_RCVD) == 0u)  /* Check if SETUP bit is not set, otherwi\r
- 108:.\Generated_Source\PSoC5/USBFS_drv.c ****             {\r
- 109:.\Generated_Source\PSoC5/USBFS_drv.c ****                 /* Update the count register */\r
- 110:.\Generated_Source\PSoC5/USBFS_drv.c ****                 bRegTemp = USBFS_ep0Toggle | USBFS_ep0Count;\r
- 111:.\Generated_Source\PSoC5/USBFS_drv.c ****                 CY_SET_REG8(USBFS_EP0_CNT_PTR, bRegTemp);\r
- 112:.\Generated_Source\PSoC5/USBFS_drv.c ****                 if(bRegTemp == CY_GET_REG8(USBFS_EP0_CNT_PTR))   /* continue if writing was success\r
- 113:.\Generated_Source\PSoC5/USBFS_drv.c ****                 {\r
- 114:.\Generated_Source\PSoC5/USBFS_drv.c ****                     do\r
- 115:.\Generated_Source\PSoC5/USBFS_drv.c ****                     {\r
- 116:.\Generated_Source\PSoC5/USBFS_drv.c ****                         modifyReg = USBFS_ep0Mode;       /* Init temporary variable */\r
- 117:.\Generated_Source\PSoC5/USBFS_drv.c ****                         /* Unlock registers */\r
- 118:.\Generated_Source\PSoC5/USBFS_drv.c ****                         bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_SETUP_RCVD;\r
- 119:.\Generated_Source\PSoC5/USBFS_drv.c ****                         if(bRegTemp == 0u)                          /* Check if SETUP bit is not se\r
- 120:.\Generated_Source\PSoC5/USBFS_drv.c ****                         {\r
- 121:.\Generated_Source\PSoC5/USBFS_drv.c ****                             /* Set the Mode Register  */\r
- 122:.\Generated_Source\PSoC5/USBFS_drv.c ****                             CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_ep0Mode);\r
- 123:.\Generated_Source\PSoC5/USBFS_drv.c ****                             /* Writing check */\r
- 124:.\Generated_Source\PSoC5/USBFS_drv.c ****                             modifyReg = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_MASK;\r
- 125:.\Generated_Source\PSoC5/USBFS_drv.c ****                         }\r
- 126:.\Generated_Source\PSoC5/USBFS_drv.c ****                     }while(modifyReg != USBFS_ep0Mode);  /* Repeat if writing was not successful */\r
- 127:.\Generated_Source\PSoC5/USBFS_drv.c ****                 }\r
- 128:.\Generated_Source\PSoC5/USBFS_drv.c ****             }\r
- 129:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 130:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 131:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 132:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 133:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 134:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 135:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_HandleSetup\r
- 136:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 137:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 138:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 139:.\Generated_Source\PSoC5/USBFS_drv.c **** *  This Routine dispatches requests for the four USB request types\r
- 140:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 141:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 142:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 143:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 144:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 145:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 4\r
-\r
-\r
- 146:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 147:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 148:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 149:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 150:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 151:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_HandleSetup(void) \r
- 152:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 153:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 requestHandled;\r
- 154:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 155:.\Generated_Source\PSoC5/USBFS_drv.c ****     requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* unlock registers */\r
- 156:.\Generated_Source\PSoC5/USBFS_drv.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, requestHandled);       /* clear setup bit */\r
- 157:.\Generated_Source\PSoC5/USBFS_drv.c ****     requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* reread register */\r
- 158:.\Generated_Source\PSoC5/USBFS_drv.c ****     if((requestHandled & USBFS_MODE_SETUP_RCVD) != 0u)\r
- 159:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 160:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = requestHandled;        /* if SETUP bit set -> exit without modifying the mo\r
- 161:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 162:.\Generated_Source\PSoC5/USBFS_drv.c ****     else\r
- 163:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 164:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* In case the previous transfer did not complete, close it out */\r
- 165:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_UpdateStatusBlock(USBFS_XFER_PREMATURE);\r
- 166:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 167:.\Generated_Source\PSoC5/USBFS_drv.c ****         switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_TYPE_MASK)\r
- 168:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
- 169:.\Generated_Source\PSoC5/USBFS_drv.c ****             case USBFS_RQST_TYPE_STD:\r
- 170:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_HandleStandardRqst();\r
- 171:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 172:.\Generated_Source\PSoC5/USBFS_drv.c ****             case USBFS_RQST_TYPE_CLS:\r
- 173:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_DispatchClassRqst();\r
- 174:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 175:.\Generated_Source\PSoC5/USBFS_drv.c ****             case USBFS_RQST_TYPE_VND:\r
- 176:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_HandleVendorRqst();\r
- 177:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 178:.\Generated_Source\PSoC5/USBFS_drv.c ****             default:\r
- 179:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_FALSE;\r
- 180:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 181:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 182:.\Generated_Source\PSoC5/USBFS_drv.c ****         if (requestHandled == USBFS_FALSE)\r
- 183:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
- 184:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 185:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 186:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 187:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 188:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 189:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 190:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 191:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_HandleIN\r
- 192:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 193:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 194:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 195:.\Generated_Source\PSoC5/USBFS_drv.c **** *  This routine handles EP0 IN transfers.\r
- 196:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 197:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 198:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 199:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 200:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 201:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 202:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 5\r
-\r
-\r
- 203:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 204:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 205:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 206:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 207:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_HandleIN(void) \r
- 208:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 209:.\Generated_Source\PSoC5/USBFS_drv.c ****     switch (USBFS_transferState)\r
- 210:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 211:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_IDLE:\r
- 212:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 213:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_CONTROL_READ:\r
- 214:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlReadDataStage();\r
- 215:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 216:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_CONTROL_WRITE:\r
- 217:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlWriteStatusStage();\r
- 218:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 219:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_NO_DATA_CONTROL:\r
- 220:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_NoDataControlStatusStage();\r
- 221:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 222:.\Generated_Source\PSoC5/USBFS_drv.c ****         default:    /* there are no more states */\r
- 223:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 224:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 225:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 226:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 227:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 228:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 229:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_HandleOUT\r
- 230:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 231:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 232:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 233:.\Generated_Source\PSoC5/USBFS_drv.c **** *  This routine handles EP0 OUT transfers.\r
- 234:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 235:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 236:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 237:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 238:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 239:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 240:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 241:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 242:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 243:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 244:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 245:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_HandleOUT(void) \r
- 246:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 247:.\Generated_Source\PSoC5/USBFS_drv.c ****     switch (USBFS_transferState)\r
- 248:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 249:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_IDLE:\r
- 250:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 251:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_CONTROL_READ:\r
- 252:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlReadStatusStage();\r
- 253:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 254:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_CONTROL_WRITE:\r
- 255:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlWriteDataStage();\r
- 256:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 257:.\Generated_Source\PSoC5/USBFS_drv.c ****         case USBFS_TRANS_STATE_NO_DATA_CONTROL:\r
- 258:.\Generated_Source\PSoC5/USBFS_drv.c ****             /* Update the completion block */\r
- 259:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_UpdateStatusBlock(USBFS_XFER_ERROR);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 6\r
-\r
-\r
- 260:.\Generated_Source\PSoC5/USBFS_drv.c ****             /* We expect no more data, so stall INs and OUTs */\r
- 261:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 262:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 263:.\Generated_Source\PSoC5/USBFS_drv.c ****         default:    /* There are no more states */\r
- 264:.\Generated_Source\PSoC5/USBFS_drv.c ****             break;\r
- 265:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 266:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 267:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 268:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 269:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 270:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_LoadEP0\r
- 271:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 272:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 273:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 274:.\Generated_Source\PSoC5/USBFS_drv.c **** *  This routine loads the EP0 data registers for OUT transfers.  It uses the\r
- 275:.\Generated_Source\PSoC5/USBFS_drv.c **** *  currentTD (previously initialized by the _InitControlWrite function and\r
- 276:.\Generated_Source\PSoC5/USBFS_drv.c **** *  updated for each OUT transfer, and the bLastPacketSize) to determine how\r
- 277:.\Generated_Source\PSoC5/USBFS_drv.c **** *  many uint8s to transfer on the current OUT.\r
- 278:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 279:.\Generated_Source\PSoC5/USBFS_drv.c **** *  If the number of uint8s remaining is zero and the last transfer was full,\r
- 280:.\Generated_Source\PSoC5/USBFS_drv.c **** *  we need to send a zero length packet.  Otherwise we send the minimum\r
- 281:.\Generated_Source\PSoC5/USBFS_drv.c **** *  of the control endpoint size (8) or remaining number of uint8s for the\r
- 282:.\Generated_Source\PSoC5/USBFS_drv.c **** *  transaction.\r
- 283:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 284:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 285:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 286:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 287:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 288:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 289:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 290:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 291:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferByteCount - Update the transfer byte count from the\r
- 292:.\Generated_Source\PSoC5/USBFS_drv.c **** *     last transaction.\r
- 293:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Count - counts the data loaded to the SIE memory in\r
- 294:.\Generated_Source\PSoC5/USBFS_drv.c **** *     current packet.\r
- 295:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_lastPacketSize - remembers the USBFS_ep0Count value for the\r
- 296:.\Generated_Source\PSoC5/USBFS_drv.c **** *     next packet.\r
- 297:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferByteCount - sum of the previous bytes transferred\r
- 298:.\Generated_Source\PSoC5/USBFS_drv.c **** *     on previous packets(sum of USBFS_lastPacketSize)\r
- 299:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - inverted\r
- 300:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - prepare for mode register content.\r
- 301:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_CONTROL_READ\r
- 302:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 303:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 304:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 305:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 306:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 307:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_LoadEP0(void) \r
- 308:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
-  27                           .loc 1 308 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
- 309:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 ep0Count = 0u;\r
- 310:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 7\r
-\r
-\r
- 311:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the transfer byte count from the last transaction */\r
- 312:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount += USBFS_lastPacketSize;\r
-  33                           .loc 1 312 0\r
-  34 0000 1B4B                 ldr     r3, .L16\r
-  35 0002 1C49                 ldr     r1, .L16+4\r
-  36 0004 1A88                 ldrh    r2, [r3, #0]\r
-  37 0006 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
-  38 0008 8218                 adds    r2, r0, r2\r
-  39 000a 91B2                 uxth    r1, r2\r
-  40 000c 1980                 strh    r1, [r3, #0]    @ movhi\r
- 313:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Now load the next transaction */\r
- 314:.\Generated_Source\PSoC5/USBFS_drv.c ****     while ((USBFS_currentTD.count > 0u) && (ep0Count < 8u))\r
-  41                           .loc 1 314 0\r
-  42 000e 1A49                 ldr     r1, .L16+8\r
-  43                   .LVL1:\r
-  44                   .L2:\r
-  45                           .loc 1 314 0 is_stmt 0 discriminator 1\r
-  46 0010 1A4B                 ldr     r3, .L16+12\r
-  47 0012 CAB2                 uxtb    r2, r1\r
-  48 0014 1888                 ldrh    r0, [r3, #0]\r
-  49 0016 80B2                 uxth    r0, r0\r
-  50 0018 78B1                 cbz     r0, .L3\r
-  51                           .loc 1 314 0 discriminator 2\r
-  52 001a 194A                 ldr     r2, .L16+16\r
-  53 001c 9142                 cmp     r1, r2\r
-  54 001e 0BD0                 beq     .L15\r
-  55                   .L4:\r
- 315:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 316:.\Generated_Source\PSoC5/USBFS_drv.c ****         CY_SET_REG8((reg8 *)(USBFS_EP0_DR0_IND + ep0Count), *USBFS_currentTD.pData);\r
-  56                           .loc 1 316 0 is_stmt 1\r
-  57 0020 5A68                 ldr     r2, [r3, #4]\r
-  58 0022 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
-  59 0024 01F8010B             strb    r0, [r1], #1\r
- 317:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
-  60                           .loc 1 317 0\r
-  61 0028 5A68                 ldr     r2, [r3, #4]\r
-  62 002a 501C                 adds    r0, r2, #1\r
-  63 002c 5860                 str     r0, [r3, #4]\r
- 318:.\Generated_Source\PSoC5/USBFS_drv.c ****         ep0Count++;\r
- 319:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.count--;\r
-  64                           .loc 1 319 0\r
-  65 002e 1A88                 ldrh    r2, [r3, #0]\r
-  66 0030 501E                 subs    r0, r2, #1\r
-  67 0032 82B2                 uxth    r2, r0\r
-  68 0034 1A80                 strh    r2, [r3, #0]    @ movhi\r
-  69 0036 EBE7                 b       .L2\r
-  70                   .L15:\r
- 314:.\Generated_Source\PSoC5/USBFS_drv.c ****     while ((USBFS_currentTD.count > 0u) && (ep0Count < 8u))\r
-  71                           .loc 1 314 0\r
-  72 0038 0822                 movs    r2, #8\r
-  73                   .L3:\r
- 320:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 321:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Support zero-length packet*/\r
- 322:.\Generated_Source\PSoC5/USBFS_drv.c ****     if( (USBFS_lastPacketSize == 8u) || (ep0Count > 0u) )\r
-  74                           .loc 1 322 0\r
-  75 003a 0E49                 ldr     r1, .L16+4\r
-  76 003c 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 8\r
-\r
-\r
-  77 003e 082B                 cmp     r3, #8\r
-  78 0040 00D0                 beq     .L5\r
-  79                           .loc 1 322 0 is_stmt 0 discriminator 1\r
-  80 0042 5AB1                 cbz     r2, .L6\r
-  81                   .L5:\r
- 323:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 324:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Update the data toggle */\r
- 325:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
-  82                           .loc 1 325 0 is_stmt 1\r
-  83 0044 0F48                 ldr     r0, .L16+20\r
-  84 0046 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
-  85 0048 81F08003             eor     r3, r1, #128\r
- 326:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Set the Mode Register  */\r
- 327:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = USBFS_MODE_ACK_IN_STATUS_OUT;\r
-  86                           .loc 1 327 0\r
-  87 004c 0E49                 ldr     r1, .L16+24\r
- 325:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
-  88                           .loc 1 325 0\r
-  89 004e 0370                 strb    r3, [r0, #0]\r
-  90                           .loc 1 327 0\r
-  91 0050 0F20                 movs    r0, #15\r
- 328:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Update the state (or stay the same) */\r
- 329:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
-  92                           .loc 1 329 0\r
-  93 0052 0E4B                 ldr     r3, .L16+28\r
- 327:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = USBFS_MODE_ACK_IN_STATUS_OUT;\r
-  94                           .loc 1 327 0\r
-  95 0054 0870                 strb    r0, [r1, #0]\r
-  96                           .loc 1 329 0\r
-  97 0056 0220                 movs    r0, #2\r
-  98 0058 1870                 strb    r0, [r3, #0]\r
-  99 005a 04E0                 b       .L7\r
- 100                   .L6:\r
- 330:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 331:.\Generated_Source\PSoC5/USBFS_drv.c ****     else\r
- 332:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 333:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Expect Status Stage Out */\r
- 334:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = USBFS_MODE_STATUS_OUT_ONLY;\r
- 101                           .loc 1 334 0\r
- 102 005c 0A49                 ldr     r1, .L16+24\r
- 335:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Update the state (or stay the same) */\r
- 336:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 103                           .loc 1 336 0\r
- 104 005e 0B4B                 ldr     r3, .L16+28\r
- 334:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = USBFS_MODE_STATUS_OUT_ONLY;\r
- 105                           .loc 1 334 0\r
- 106 0060 0220                 movs    r0, #2\r
- 107 0062 0870                 strb    r0, [r1, #0]\r
- 108                           .loc 1 336 0\r
- 109 0064 1870                 strb    r0, [r3, #0]\r
- 110                   .L7:\r
- 337:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 338:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 339:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Save the packet size for next time */\r
- 340:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_lastPacketSize = ep0Count;\r
- 111                           .loc 1 340 0\r
- 112 0066 0349                 ldr     r1, .L16+4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 9\r
-\r
-\r
- 341:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Count = ep0Count;\r
- 113                           .loc 1 341 0\r
- 114 0068 0948                 ldr     r0, .L16+32\r
- 340:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_lastPacketSize = ep0Count;\r
- 115                           .loc 1 340 0\r
- 116 006a 0A70                 strb    r2, [r1, #0]\r
- 117                           .loc 1 341 0\r
- 118 006c 0270                 strb    r2, [r0, #0]\r
- 119 006e 7047                 bx      lr\r
- 120                   .L17:\r
- 121                           .align  2\r
- 122                   .L16:\r
- 123 0070 00000000             .word   USBFS_transferByteCount\r
- 124 0074 00000000             .word   USBFS_lastPacketSize\r
- 125 0078 00600040             .word   1073766400\r
- 126 007c 00000000             .word   USBFS_currentTD\r
- 127 0080 08600040             .word   1073766408\r
- 128 0084 00000000             .word   USBFS_ep0Toggle\r
- 129 0088 00000000             .word   USBFS_ep0Mode\r
- 130 008c 00000000             .word   USBFS_transferState\r
- 131 0090 00000000             .word   USBFS_ep0Count\r
- 132                           .cfi_endproc\r
- 133                   .LFE4:\r
- 134                           .size   USBFS_LoadEP0, .-USBFS_LoadEP0\r
- 135                           .section        .text.USBFS_InitZeroLengthControlTransfer,"ax",%progbits\r
- 136                           .align  1\r
- 137                           .global USBFS_InitZeroLengthControlTransfer\r
- 138                           .thumb\r
- 139                           .thumb_func\r
- 140                           .type   USBFS_InitZeroLengthControlTransfer, %function\r
- 141                   USBFS_InitZeroLengthControlTransfer:\r
- 142                   .LFB6:\r
- 342:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 343:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 344:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 345:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 346:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_InitControlRead\r
- 347:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 348:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 349:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 350:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Initialize a control read transaction, usable to send data to the host.\r
- 351:.\Generated_Source\PSoC5/USBFS_drv.c **** *  The following global variables should be initialized before this function\r
- 352:.\Generated_Source\PSoC5/USBFS_drv.c **** *  called. To send zero length packet use InitZeroLengthControlTransfer\r
- 353:.\Generated_Source\PSoC5/USBFS_drv.c **** *  function.\r
- 354:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 355:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 356:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 357:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 358:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 359:.\Generated_Source\PSoC5/USBFS_drv.c **** *  requestHandled state.\r
- 360:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 361:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 362:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.count - counts of data to be sent.\r
- 363:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pData - data pointer.\r
- 364:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 365:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 366:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 10\r
-\r
-\r
- 367:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 368:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 369:.\Generated_Source\PSoC5/USBFS_drv.c **** uint8 USBFS_InitControlRead(void) \r
- 370:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 371:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint16 xferCount;\r
- 372:.\Generated_Source\PSoC5/USBFS_drv.c ****     if(USBFS_currentTD.count == 0u)\r
- 373:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 374:.\Generated_Source\PSoC5/USBFS_drv.c ****         (void) USBFS_InitZeroLengthControlTransfer();\r
- 375:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 376:.\Generated_Source\PSoC5/USBFS_drv.c ****     else\r
- 377:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 378:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Set up the state machine */\r
- 379:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 380:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Set the toggle, it gets updated in LoadEP */\r
- 381:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle = 0u;\r
- 382:.\Generated_Source\PSoC5/USBFS_drv.c ****         /* Initialize the Status Block */\r
- 383:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_InitializeStatusBlock();\r
- 384:.\Generated_Source\PSoC5/USBFS_drv.c ****         xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
- 385:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 386:.\Generated_Source\PSoC5/USBFS_drv.c ****         if (USBFS_currentTD.count > xferCount)\r
- 387:.\Generated_Source\PSoC5/USBFS_drv.c ****         {\r
- 388:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_currentTD.count = xferCount;\r
- 389:.\Generated_Source\PSoC5/USBFS_drv.c ****         }\r
- 390:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_LoadEP0();\r
- 391:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 392:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 393:.\Generated_Source\PSoC5/USBFS_drv.c ****     return(USBFS_TRUE);\r
- 394:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 395:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 396:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 397:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 398:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_InitZeroLengthControlTransfer\r
- 399:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 400:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 401:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 402:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Initialize a zero length data IN transfer.\r
- 403:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 404:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 405:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 406:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 407:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 408:.\Generated_Source\PSoC5/USBFS_drv.c **** *  requestHandled state.\r
- 409:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 410:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 411:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
- 412:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - prepare for mode register content.\r
- 413:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_CONTROL_READ\r
- 414:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Count - cleared, means the zero-length packet.\r
- 415:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_lastPacketSize - cleared.\r
- 416:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 417:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 418:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 419:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 420:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 421:.\Generated_Source\PSoC5/USBFS_drv.c **** uint8 USBFS_InitZeroLengthControlTransfer(void)\r
- 422:.\Generated_Source\PSoC5/USBFS_drv.c ****                                                 \r
- 423:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 11\r
-\r
-\r
- 143                           .loc 1 423 0\r
- 144                           .cfi_startproc\r
- 145                           @ args = 0, pretend = 0, frame = 0\r
- 146                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 147                           @ link register save eliminated.\r
- 424:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the state */\r
- 425:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 148                           .loc 1 425 0\r
- 149 0000 074B                 ldr     r3, .L19\r
- 150 0002 0222                 movs    r2, #2\r
- 151 0004 1A70                 strb    r2, [r3, #0]\r
- 426:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Set the data toggle */\r
- 427:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 152                           .loc 1 427 0\r
- 153 0006 0749                 ldr     r1, .L19+4\r
- 428:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Set the Mode Register  */\r
- 429:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_ACK_IN_STATUS_OUT;\r
- 154                           .loc 1 429 0\r
- 155 0008 074B                 ldr     r3, .L19+8\r
- 427:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 156                           .loc 1 427 0\r
- 157 000a 8020                 movs    r0, #128\r
- 158                           .loc 1 429 0\r
- 159 000c 0F22                 movs    r2, #15\r
- 427:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 160                           .loc 1 427 0\r
- 161 000e 0870                 strb    r0, [r1, #0]\r
- 162                           .loc 1 429 0\r
- 163 0010 1A70                 strb    r2, [r3, #0]\r
- 430:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Save the packet size for next time */\r
- 431:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_lastPacketSize = 0u;\r
- 164                           .loc 1 431 0\r
- 165 0012 0649                 ldr     r1, .L19+12\r
- 432:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Count = 0u;\r
- 166                           .loc 1 432 0\r
- 167 0014 064A                 ldr     r2, .L19+16\r
- 431:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_lastPacketSize = 0u;\r
- 168                           .loc 1 431 0\r
- 169 0016 0020                 movs    r0, #0\r
- 170 0018 0870                 strb    r0, [r1, #0]\r
- 171                           .loc 1 432 0\r
- 172 001a 1070                 strb    r0, [r2, #0]\r
- 433:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 434:.\Generated_Source\PSoC5/USBFS_drv.c ****     return(USBFS_TRUE);\r
- 435:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 173                           .loc 1 435 0\r
- 174 001c 0120                 movs    r0, #1\r
- 175 001e 7047                 bx      lr\r
- 176                   .L20:\r
- 177                           .align  2\r
- 178                   .L19:\r
- 179 0020 00000000             .word   USBFS_transferState\r
- 180 0024 00000000             .word   USBFS_ep0Toggle\r
- 181 0028 00000000             .word   USBFS_ep0Mode\r
- 182 002c 00000000             .word   USBFS_lastPacketSize\r
- 183 0030 00000000             .word   USBFS_ep0Count\r
- 184                           .cfi_endproc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 12\r
-\r
-\r
- 185                   .LFE6:\r
- 186                           .size   USBFS_InitZeroLengthControlTransfer, .-USBFS_InitZeroLengthControlTransfer\r
- 187                           .section        .text.USBFS_ControlReadDataStage,"ax",%progbits\r
- 188                           .align  1\r
- 189                           .global USBFS_ControlReadDataStage\r
- 190                           .thumb\r
- 191                           .thumb_func\r
- 192                           .type   USBFS_ControlReadDataStage, %function\r
- 193                   USBFS_ControlReadDataStage:\r
- 194                   .LFB7:\r
- 436:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 437:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 438:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 439:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_ControlReadDataStage\r
- 440:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 441:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 442:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 443:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Handle the Data Stage of a control read transfer.\r
- 444:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 445:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 446:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 447:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 448:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 449:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 450:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 451:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 452:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 453:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 454:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 455:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_ControlReadDataStage(void) \r
- 456:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 457:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 195                           .loc 1 457 0\r
- 196                           .cfi_startproc\r
- 197                           @ args = 0, pretend = 0, frame = 0\r
- 198                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 199                           @ link register save eliminated.\r
- 458:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_LoadEP0();\r
- 459:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 200                           .loc 1 459 0\r
- 458:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_LoadEP0();\r
- 201                           .loc 1 458 0\r
- 202 0000 FFF7FEBF             b       USBFS_LoadEP0\r
- 203                   .LVL2:\r
- 204                           .cfi_endproc\r
- 205                   .LFE7:\r
- 206                           .size   USBFS_ControlReadDataStage, .-USBFS_ControlReadDataStage\r
- 207                           .section        .text.USBFS_ControlWriteDataStage,"ax",%progbits\r
- 208                           .align  1\r
- 209                           .global USBFS_ControlWriteDataStage\r
- 210                           .thumb\r
- 211                           .thumb_func\r
- 212                           .type   USBFS_ControlWriteDataStage, %function\r
- 213                   USBFS_ControlWriteDataStage:\r
- 214                   .LFB10:\r
- 460:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 461:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 13\r
-\r
-\r
- 462:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 463:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_ControlReadStatusStage\r
- 464:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 465:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 466:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 467:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Handle the Status Stage of a control read transfer.\r
- 468:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 469:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 470:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 471:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 472:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 473:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 474:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 475:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 476:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_USBFS_transferByteCount - updated with last packet size.\r
- 477:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_IDLE.\r
- 478:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
- 479:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 480:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 481:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 482:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 483:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 484:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_ControlReadStatusStage(void) \r
- 485:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 486:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the transfer byte count */\r
- 487:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount += USBFS_lastPacketSize;\r
- 488:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Go Idle */\r
- 489:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 490:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the completion block */\r
- 491:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 492:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* We expect no more data, so stall INs and OUTs */\r
- 493:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode =  USBFS_MODE_STALL_IN_OUT;\r
- 494:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 495:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 496:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 497:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 498:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_InitControlWrite\r
- 499:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 500:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 501:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 502:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Initialize a control write transaction\r
- 503:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 504:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 505:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 506:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 507:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 508:.\Generated_Source\PSoC5/USBFS_drv.c **** *  requestHandled state.\r
- 509:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 510:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 511:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_USBFS_transferState - set to TRANS_STATE_CONTROL_WRITE\r
- 512:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
- 513:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - set to MODE_ACK_OUT_STATUS_IN\r
- 514:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 515:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 516:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 517:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 518:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 14\r
-\r
-\r
- 519:.\Generated_Source\PSoC5/USBFS_drv.c **** uint8 USBFS_InitControlWrite(void) \r
- 520:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 521:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint16 xferCount;\r
- 522:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 523:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Set up the state machine */\r
- 524:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_CONTROL_WRITE;\r
- 525:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* This might not be necessary */\r
- 526:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 527:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Initialize the Status Block */\r
- 528:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_InitializeStatusBlock();\r
- 529:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 530:.\Generated_Source\PSoC5/USBFS_drv.c ****     xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
- 531:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 532:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_currentTD.count > xferCount)\r
- 533:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 534:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.count = xferCount;\r
- 535:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 536:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 537:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Expect Data or Status Stage */\r
- 538:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_ACK_OUT_STATUS_IN;\r
- 539:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 540:.\Generated_Source\PSoC5/USBFS_drv.c ****     return(USBFS_TRUE);\r
- 541:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 542:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 543:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 544:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 545:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_ControlWriteDataStage\r
- 546:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 547:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 548:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 549:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Handle the Data Stage of a control write transfer\r
- 550:.\Generated_Source\PSoC5/USBFS_drv.c **** *       1. Get the data (We assume the destination was validated previously)\r
- 551:.\Generated_Source\PSoC5/USBFS_drv.c **** *       2. Update the count and data toggle\r
- 552:.\Generated_Source\PSoC5/USBFS_drv.c **** *       3. Update the mode register for the next transaction\r
- 553:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 554:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 555:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 556:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 557:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 558:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 559:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 560:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 561:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferByteCount - Update the transfer byte count from the\r
- 562:.\Generated_Source\PSoC5/USBFS_drv.c **** *    last transaction.\r
- 563:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Count - counts the data loaded from the SIE memory\r
- 564:.\Generated_Source\PSoC5/USBFS_drv.c **** *    in current packet.\r
- 565:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferByteCount - sum of the previous bytes transferred\r
- 566:.\Generated_Source\PSoC5/USBFS_drv.c **** *    on previous packets(sum of USBFS_lastPacketSize)\r
- 567:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - inverted\r
- 568:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - set to MODE_ACK_OUT_STATUS_IN.\r
- 569:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 570:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 571:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 572:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 573:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 574:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_ControlWriteDataStage(void) \r
- 575:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 15\r
-\r
-\r
- 215                           .loc 1 575 0\r
- 216                           .cfi_startproc\r
- 217                           @ args = 0, pretend = 0, frame = 0\r
- 218                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 219                   .LVL3:\r
- 220 0000 10B5                 push    {r4, lr}\r
- 221                   .LCFI0:\r
- 222                           .cfi_def_cfa_offset 8\r
- 223                           .cfi_offset 4, -8\r
- 224                           .cfi_offset 14, -4\r
- 576:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 ep0Count;\r
- 577:.\Generated_Source\PSoC5/USBFS_drv.c ****     uint8 regIndex = 0u;\r
- 578:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 579:.\Generated_Source\PSoC5/USBFS_drv.c ****     ep0Count = (CY_GET_REG8(USBFS_EP0_CNT_PTR) & USBFS_EPX_CNT0_MASK) -\r
- 225                           .loc 1 579 0\r
- 226 0002 154B                 ldr     r3, .L29\r
- 227 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 580:.\Generated_Source\PSoC5/USBFS_drv.c ****                USBFS_EPX_CNTX_CRC_COUNT;\r
- 581:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 582:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount += ep0Count;\r
- 228                           .loc 1 582 0\r
- 229 0006 154B                 ldr     r3, .L29+4\r
- 579:.\Generated_Source\PSoC5/USBFS_drv.c ****     ep0Count = (CY_GET_REG8(USBFS_EP0_CNT_PTR) & USBFS_EPX_CNT0_MASK) -\r
- 230                           .loc 1 579 0\r
- 231 0008 02F00F00             and     r0, r2, #15\r
- 232 000c 811E                 subs    r1, r0, #2\r
- 233                           .loc 1 582 0\r
- 234 000e 1888                 ldrh    r0, [r3, #0]\r
- 579:.\Generated_Source\PSoC5/USBFS_drv.c ****     ep0Count = (CY_GET_REG8(USBFS_EP0_CNT_PTR) & USBFS_EPX_CNT0_MASK) -\r
- 235                           .loc 1 579 0\r
- 236 0010 CAB2                 uxtb    r2, r1\r
- 237                   .LVL4:\r
- 238                           .loc 1 582 0\r
- 239 0012 1118                 adds    r1, r2, r0\r
- 240                   .LVL5:\r
- 241 0014 88B2                 uxth    r0, r1\r
- 583:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 584:.\Generated_Source\PSoC5/USBFS_drv.c ****     while ((USBFS_currentTD.count > 0u) && (ep0Count > 0u))\r
- 242                           .loc 1 584 0\r
- 243 0016 1249                 ldr     r1, .L29+8\r
- 582:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount += ep0Count;\r
- 244                           .loc 1 582 0\r
- 245 0018 1880                 strh    r0, [r3, #0]    @ movhi\r
- 246                   .LVL6:\r
- 247                   .L23:\r
- 248                           .loc 1 584 0 discriminator 1\r
- 249 001a 124B                 ldr     r3, .L29+12\r
- 250 001c 1888                 ldrh    r0, [r3, #0]\r
- 251 001e 80B2                 uxth    r0, r0\r
- 252 0020 70B1                 cbz     r0, .L24\r
- 253                           .loc 1 584 0 is_stmt 0 discriminator 2\r
- 254 0022 6AB1                 cbz     r2, .L24\r
- 255                   .L25:\r
- 585:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 586:.\Generated_Source\PSoC5/USBFS_drv.c ****         *USBFS_currentTD.pData = CY_GET_REG8((reg8 *)(USBFS_EP0_DR0_IND + regIndex));\r
- 256                           .loc 1 586 0 is_stmt 1\r
- 257 0024 5868                 ldr     r0, [r3, #4]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 16\r
-\r
-\r
- 258 0026 11F8014B             ldrb    r4, [r1], #1    @ zero_extendqisi2\r
- 587:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
- 588:.\Generated_Source\PSoC5/USBFS_drv.c ****         regIndex++;\r
- 589:.\Generated_Source\PSoC5/USBFS_drv.c ****         ep0Count--;\r
- 259                           .loc 1 589 0\r
- 260 002a 013A                 subs    r2, r2, #1\r
- 261                   .LVL7:\r
- 586:.\Generated_Source\PSoC5/USBFS_drv.c ****         *USBFS_currentTD.pData = CY_GET_REG8((reg8 *)(USBFS_EP0_DR0_IND + regIndex));\r
- 262                           .loc 1 586 0\r
- 263 002c 0470                 strb    r4, [r0, #0]\r
- 587:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
- 264                           .loc 1 587 0\r
- 265 002e 5868                 ldr     r0, [r3, #4]\r
- 266                           .loc 1 589 0\r
- 267 0030 D2B2                 uxtb    r2, r2\r
- 268                   .LVL8:\r
- 587:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
- 269                           .loc 1 587 0\r
- 270 0032 0130                 adds    r0, r0, #1\r
- 271 0034 5860                 str     r0, [r3, #4]\r
- 272                   .LVL9:\r
- 590:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.count--;\r
- 273                           .loc 1 590 0\r
- 274 0036 1888                 ldrh    r0, [r3, #0]\r
- 275 0038 0138                 subs    r0, r0, #1\r
- 276 003a 80B2                 uxth    r0, r0\r
- 277 003c 1880                 strh    r0, [r3, #0]    @ movhi\r
- 278 003e ECE7                 b       .L23\r
- 279                   .L24:\r
- 591:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 592:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Count = ep0Count;\r
- 280                           .loc 1 592 0\r
- 281 0040 0949                 ldr     r1, .L29+16\r
- 593:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the data toggle */\r
- 594:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
- 282                           .loc 1 594 0\r
- 283 0042 0A4B                 ldr     r3, .L29+20\r
- 592:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Count = ep0Count;\r
- 284                           .loc 1 592 0\r
- 285 0044 0A70                 strb    r2, [r1, #0]\r
- 286                           .loc 1 594 0\r
- 287 0046 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 288                   .LVL10:\r
- 595:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Expect Data or Status Stage */\r
- 596:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_ACK_OUT_STATUS_IN;\r
- 289                           .loc 1 596 0\r
- 290 0048 0B21                 movs    r1, #11\r
- 594:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
- 291                           .loc 1 594 0\r
- 292 004a 82F08000             eor     r0, r2, #128\r
- 293 004e 1870                 strb    r0, [r3, #0]\r
- 294                           .loc 1 596 0\r
- 295 0050 074B                 ldr     r3, .L29+24\r
- 296 0052 1970                 strb    r1, [r3, #0]\r
- 297 0054 10BD                 pop     {r4, pc}\r
- 298                   .L30:\r
- 299 0056 00BF                 .align  2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 17\r
-\r
-\r
- 300                   .L29:\r
- 301 0058 29600040             .word   1073766441\r
- 302 005c 00000000             .word   USBFS_transferByteCount\r
- 303 0060 00600040             .word   1073766400\r
- 304 0064 00000000             .word   USBFS_currentTD\r
- 305 0068 00000000             .word   USBFS_ep0Count\r
- 306 006c 00000000             .word   USBFS_ep0Toggle\r
- 307 0070 00000000             .word   USBFS_ep0Mode\r
- 308                           .cfi_endproc\r
- 309                   .LFE10:\r
- 310                           .size   USBFS_ControlWriteDataStage, .-USBFS_ControlWriteDataStage\r
- 311                           .section        .text.USBFS_InitNoDataControlTransfer,"ax",%progbits\r
- 312                           .align  1\r
- 313                           .global USBFS_InitNoDataControlTransfer\r
- 314                           .thumb\r
- 315                           .thumb_func\r
- 316                           .type   USBFS_InitNoDataControlTransfer, %function\r
- 317                   USBFS_InitNoDataControlTransfer:\r
- 318                   .LFB12:\r
- 597:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 598:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 599:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 600:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 601:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_ControlWriteStatusStage\r
- 602:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 603:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 604:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 605:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Handle the Status Stage of a control write transfer\r
- 606:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 607:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 608:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 609:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 610:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 611:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 612:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 613:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 614:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_IDLE.\r
- 615:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
- 616:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 617:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 618:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 619:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 620:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 621:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_ControlWriteStatusStage(void) \r
- 622:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 623:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Go Idle */\r
- 624:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 625:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the completion block */\r
- 626:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 627:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* We expect no more data, so stall INs and OUTs */\r
- 628:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 629:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 630:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 631:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 632:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 633:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_InitNoDataControlTransfer\r
- 634:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 18\r
-\r
-\r
- 635:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 636:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 637:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Initialize a no data control transfer\r
- 638:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 639:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 640:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 641:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 642:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 643:.\Generated_Source\PSoC5/USBFS_drv.c **** *  requestHandled state.\r
- 644:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 645:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 646:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_NO_DATA_CONTROL.\r
- 647:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - set to MODE_STATUS_IN_ONLY.\r
- 648:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Count - cleared.\r
- 649:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
- 650:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 651:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 652:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 653:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 654:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 655:.\Generated_Source\PSoC5/USBFS_drv.c **** uint8 USBFS_InitNoDataControlTransfer(void) \r
- 656:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 319                           .loc 1 656 0\r
- 320                           .cfi_startproc\r
- 321                           @ args = 0, pretend = 0, frame = 0\r
- 322                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 323                           @ link register save eliminated.\r
- 657:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_NO_DATA_CONTROL;\r
- 324                           .loc 1 657 0\r
- 325 0000 064A                 ldr     r2, .L32\r
- 658:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_STATUS_IN_ONLY;\r
- 326                           .loc 1 658 0\r
- 327 0002 0748                 ldr     r0, .L32+4\r
- 657:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_NO_DATA_CONTROL;\r
- 328                           .loc 1 657 0\r
- 329 0004 0623                 movs    r3, #6\r
- 330 0006 1370                 strb    r3, [r2, #0]\r
- 331                           .loc 1 658 0\r
- 332 0008 0370                 strb    r3, [r0, #0]\r
- 659:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 333                           .loc 1 659 0\r
- 334 000a 064B                 ldr     r3, .L32+8\r
- 660:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Count = 0u;\r
- 335                           .loc 1 660 0\r
- 336 000c 0648                 ldr     r0, .L32+12\r
- 659:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 337                           .loc 1 659 0\r
- 338 000e 8021                 movs    r1, #128\r
- 339                           .loc 1 660 0\r
- 340 0010 0022                 movs    r2, #0\r
- 659:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 341                           .loc 1 659 0\r
- 342 0012 1970                 strb    r1, [r3, #0]\r
- 343                           .loc 1 660 0\r
- 344 0014 0270                 strb    r2, [r0, #0]\r
- 661:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 662:.\Generated_Source\PSoC5/USBFS_drv.c ****     return(USBFS_TRUE);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 19\r
-\r
-\r
- 663:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 345                           .loc 1 663 0\r
- 346 0016 0120                 movs    r0, #1\r
- 347 0018 7047                 bx      lr\r
- 348                   .L33:\r
- 349 001a 00BF                 .align  2\r
- 350                   .L32:\r
- 351 001c 00000000             .word   USBFS_transferState\r
- 352 0020 00000000             .word   USBFS_ep0Mode\r
- 353 0024 00000000             .word   USBFS_ep0Toggle\r
- 354 0028 00000000             .word   USBFS_ep0Count\r
- 355                           .cfi_endproc\r
- 356                   .LFE12:\r
- 357                           .size   USBFS_InitNoDataControlTransfer, .-USBFS_InitNoDataControlTransfer\r
- 358                           .section        .text.USBFS_UpdateStatusBlock,"ax",%progbits\r
- 359                           .align  1\r
- 360                           .global USBFS_UpdateStatusBlock\r
- 361                           .thumb\r
- 362                           .thumb_func\r
- 363                           .type   USBFS_UpdateStatusBlock, %function\r
- 364                   USBFS_UpdateStatusBlock:\r
- 365                   .LFB14:\r
- 664:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 665:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 666:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 667:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_NoDataControlStatusStage\r
- 668:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 669:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 670:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Handle the Status Stage of a no data control transfer.\r
- 671:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 672:.\Generated_Source\PSoC5/USBFS_drv.c **** *  SET_ADDRESS is special, since we need to receive the status stage with\r
- 673:.\Generated_Source\PSoC5/USBFS_drv.c **** *  the old address.\r
- 674:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 675:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 676:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 677:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 678:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 679:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 680:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 681:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 682:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferState - set to TRANS_STATE_IDLE.\r
- 683:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
- 684:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
- 685:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_deviceAddress - used to set new address and cleared\r
- 686:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 687:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 688:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 689:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 690:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 691:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_NoDataControlStatusStage(void) \r
- 692:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 693:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Change the USB address register if we got a SET_ADDRESS. */\r
- 694:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_deviceAddress != 0u)\r
- 695:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 696:.\Generated_Source\PSoC5/USBFS_drv.c ****         CY_SET_REG8(USBFS_CR0_PTR, USBFS_deviceAddress | USBFS_CR0_ENABLE);\r
- 697:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_deviceAddress = 0u;\r
- 698:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 20\r
-\r
-\r
- 699:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Go Idle */\r
- 700:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 701:.\Generated_Source\PSoC5/USBFS_drv.c ****     /* Update the completion block */\r
- 702:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 703:.\Generated_Source\PSoC5/USBFS_drv.c ****      /* We expect no more data, so stall INs and OUTs */\r
- 704:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 705:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 706:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 707:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 708:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 709:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_UpdateStatusBlock\r
- 710:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 711:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 712:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 713:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Update the Completion Status Block for a Request.  The block is updated\r
- 714:.\Generated_Source\PSoC5/USBFS_drv.c **** *  with the completion code the USBFS_transferByteCount.  The\r
- 715:.\Generated_Source\PSoC5/USBFS_drv.c **** *  StatusBlock Pointer is set to NULL.\r
- 716:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 717:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 718:.\Generated_Source\PSoC5/USBFS_drv.c **** *  completionCode - status.\r
- 719:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 720:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 721:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 722:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 723:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 724:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pStatusBlock->status - updated by the\r
- 725:.\Generated_Source\PSoC5/USBFS_drv.c **** *    completionCode parameter.\r
- 726:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pStatusBlock->length - updated.\r
- 727:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pStatusBlock - cleared.\r
- 728:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 729:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 730:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 731:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 732:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 733:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_UpdateStatusBlock(uint8 completionCode) \r
- 734:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 366                           .loc 1 734 0\r
- 367                           .cfi_startproc\r
- 368                           @ args = 0, pretend = 0, frame = 0\r
- 369                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 370                           @ link register save eliminated.\r
- 371                   .LVL11:\r
- 735:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_currentTD.pStatusBlock != NULL)\r
- 372                           .loc 1 735 0\r
- 373 0000 054B                 ldr     r3, .L39\r
- 374 0002 9A68                 ldr     r2, [r3, #8]\r
- 375 0004 3AB1                 cbz     r2, .L34\r
- 736:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 737:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock->status = completionCode;\r
- 376                           .loc 1 737 0\r
- 377 0006 9968                 ldr     r1, [r3, #8]\r
- 738:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock->length = USBFS_transferByteCount;\r
- 378                           .loc 1 738 0\r
- 379 0008 044A                 ldr     r2, .L39+4\r
- 737:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock->status = completionCode;\r
- 380                           .loc 1 737 0\r
- 381 000a 0870                 strb    r0, [r1, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 21\r
-\r
-\r
- 382                           .loc 1 738 0\r
- 383 000c 9868                 ldr     r0, [r3, #8]\r
- 384                   .LVL12:\r
- 385 000e 1188                 ldrh    r1, [r2, #0]\r
- 386                   .LVL13:\r
- 387 0010 4180                 strh    r1, [r0, #2]    @ movhi\r
- 739:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock = NULL;\r
- 388                           .loc 1 739 0\r
- 389 0012 0020                 movs    r0, #0\r
- 390 0014 9860                 str     r0, [r3, #8]\r
- 391                   .L34:\r
- 392 0016 7047                 bx      lr\r
- 393                   .L40:\r
- 394                           .align  2\r
- 395                   .L39:\r
- 396 0018 00000000             .word   USBFS_currentTD\r
- 397 001c 00000000             .word   USBFS_transferByteCount\r
- 398                           .cfi_endproc\r
- 399                   .LFE14:\r
- 400                           .size   USBFS_UpdateStatusBlock, .-USBFS_UpdateStatusBlock\r
- 401                           .section        .text.USBFS_NoDataControlStatusStage,"ax",%progbits\r
- 402                           .align  1\r
- 403                           .global USBFS_NoDataControlStatusStage\r
- 404                           .thumb\r
- 405                           .thumb_func\r
- 406                           .type   USBFS_NoDataControlStatusStage, %function\r
- 407                   USBFS_NoDataControlStatusStage:\r
- 408                   .LFB13:\r
- 692:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 409                           .loc 1 692 0\r
- 410                           .cfi_startproc\r
- 411                           @ args = 0, pretend = 0, frame = 0\r
- 412                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 413 0000 08B5                 push    {r3, lr}\r
- 414                   .LCFI1:\r
- 415                           .cfi_def_cfa_offset 8\r
- 416                           .cfi_offset 3, -8\r
- 417                           .cfi_offset 14, -4\r
- 694:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_deviceAddress != 0u)\r
- 418                           .loc 1 694 0\r
- 419 0002 0A4B                 ldr     r3, .L46\r
- 420 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 421 0006 32B1                 cbz     r2, .L42\r
- 696:.\Generated_Source\PSoC5/USBFS_drv.c ****         CY_SET_REG8(USBFS_CR0_PTR, USBFS_deviceAddress | USBFS_CR0_ENABLE);\r
- 422                           .loc 1 696 0\r
- 423 0008 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 424 000a 094A                 ldr     r2, .L46+4\r
- 425 000c 41F08000             orr     r0, r1, #128\r
- 697:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_deviceAddress = 0u;\r
- 426                           .loc 1 697 0\r
- 427 0010 0021                 movs    r1, #0\r
- 696:.\Generated_Source\PSoC5/USBFS_drv.c ****         CY_SET_REG8(USBFS_CR0_PTR, USBFS_deviceAddress | USBFS_CR0_ENABLE);\r
- 428                           .loc 1 696 0\r
- 429 0012 1070                 strb    r0, [r2, #0]\r
- 697:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_deviceAddress = 0u;\r
- 430                           .loc 1 697 0\r
- 431 0014 1970                 strb    r1, [r3, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 22\r
-\r
-\r
- 432                   .L42:\r
- 700:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 433                           .loc 1 700 0\r
- 434 0016 074B                 ldr     r3, .L46+8\r
- 435 0018 0020                 movs    r0, #0\r
- 436 001a 1870                 strb    r0, [r3, #0]\r
- 702:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 437                           .loc 1 702 0\r
- 438 001c 0120                 movs    r0, #1\r
- 439 001e FFF7FEFF             bl      USBFS_UpdateStatusBlock\r
- 440                   .LVL14:\r
- 704:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 441                           .loc 1 704 0\r
- 442 0022 0549                 ldr     r1, .L46+12\r
- 443 0024 0322                 movs    r2, #3\r
- 444 0026 0A70                 strb    r2, [r1, #0]\r
- 445 0028 08BD                 pop     {r3, pc}\r
- 446                   .L47:\r
- 447 002a 00BF                 .align  2\r
- 448                   .L46:\r
- 449 002c 00000000             .word   USBFS_deviceAddress\r
- 450 0030 08600040             .word   1073766408\r
- 451 0034 00000000             .word   USBFS_transferState\r
- 452 0038 00000000             .word   USBFS_ep0Mode\r
- 453                           .cfi_endproc\r
- 454                   .LFE13:\r
- 455                           .size   USBFS_NoDataControlStatusStage, .-USBFS_NoDataControlStatusStage\r
- 456                           .section        .text.USBFS_ControlWriteStatusStage,"ax",%progbits\r
- 457                           .align  1\r
- 458                           .global USBFS_ControlWriteStatusStage\r
- 459                           .thumb\r
- 460                           .thumb_func\r
- 461                           .type   USBFS_ControlWriteStatusStage, %function\r
- 462                   USBFS_ControlWriteStatusStage:\r
- 463                   .LFB11:\r
- 622:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 464                           .loc 1 622 0\r
- 465                           .cfi_startproc\r
- 466                           @ args = 0, pretend = 0, frame = 0\r
- 467                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 468 0000 08B5                 push    {r3, lr}\r
- 469                   .LCFI2:\r
- 470                           .cfi_def_cfa_offset 8\r
- 471                           .cfi_offset 3, -8\r
- 472                           .cfi_offset 14, -4\r
- 624:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 473                           .loc 1 624 0\r
- 474 0002 054B                 ldr     r3, .L49\r
- 475 0004 0022                 movs    r2, #0\r
- 626:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 476                           .loc 1 626 0\r
- 477 0006 0120                 movs    r0, #1\r
- 624:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 478                           .loc 1 624 0\r
- 479 0008 1A70                 strb    r2, [r3, #0]\r
- 626:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 480                           .loc 1 626 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 23\r
-\r
-\r
- 481 000a FFF7FEFF             bl      USBFS_UpdateStatusBlock\r
- 482                   .LVL15:\r
- 628:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 483                           .loc 1 628 0\r
- 484 000e 0349                 ldr     r1, .L49+4\r
- 485 0010 0320                 movs    r0, #3\r
- 486 0012 0870                 strb    r0, [r1, #0]\r
- 487 0014 08BD                 pop     {r3, pc}\r
- 488                   .L50:\r
- 489 0016 00BF                 .align  2\r
- 490                   .L49:\r
- 491 0018 00000000             .word   USBFS_transferState\r
- 492 001c 00000000             .word   USBFS_ep0Mode\r
- 493                           .cfi_endproc\r
- 494                   .LFE11:\r
- 495                           .size   USBFS_ControlWriteStatusStage, .-USBFS_ControlWriteStatusStage\r
- 496                           .section        .text.USBFS_HandleIN,"ax",%progbits\r
- 497                           .align  1\r
- 498                           .global USBFS_HandleIN\r
- 499                           .thumb\r
- 500                           .thumb_func\r
- 501                           .type   USBFS_HandleIN, %function\r
- 502                   USBFS_HandleIN:\r
- 503                   .LFB2:\r
- 208:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 504                           .loc 1 208 0\r
- 505                           .cfi_startproc\r
- 506                           @ args = 0, pretend = 0, frame = 0\r
- 507                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 508                           @ link register save eliminated.\r
- 209:.\Generated_Source\PSoC5/USBFS_drv.c ****     switch (USBFS_transferState)\r
- 509                           .loc 1 209 0\r
- 510 0000 074B                 ldr     r3, .L57\r
- 511 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 512 0004 0428                 cmp     r0, #4\r
- 513 0006 05D0                 beq     .L54\r
- 514 0008 0628                 cmp     r0, #6\r
- 515 000a 05D0                 beq     .L55\r
- 516 000c 0228                 cmp     r0, #2\r
- 517 000e 05D1                 bne     .L56\r
- 225:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 518                           .loc 1 225 0\r
- 519                   .LBB4:\r
- 520                   .LBB5:\r
- 458:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_LoadEP0();\r
- 521                           .loc 1 458 0\r
- 522 0010 FFF7FEBF             b       USBFS_LoadEP0\r
- 523                   .LVL16:\r
- 524                   .L54:\r
- 525                   .LBE5:\r
- 526                   .LBE4:\r
- 225:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 527                           .loc 1 225 0\r
- 217:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlWriteStatusStage();\r
- 528                           .loc 1 217 0\r
- 529 0014 FFF7FEBF             b       USBFS_ControlWriteStatusStage\r
- 530                   .LVL17:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 24\r
-\r
-\r
- 531                   .L55:\r
- 225:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 532                           .loc 1 225 0\r
- 220:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_NoDataControlStatusStage();\r
- 533                           .loc 1 220 0\r
- 534 0018 FFF7FEBF             b       USBFS_NoDataControlStatusStage\r
- 535                   .LVL18:\r
- 536                   .L56:\r
- 537 001c 7047                 bx      lr\r
- 538                   .L58:\r
- 539 001e 00BF                 .align  2\r
- 540                   .L57:\r
- 541 0020 00000000             .word   USBFS_transferState\r
- 542                           .cfi_endproc\r
- 543                   .LFE2:\r
- 544                           .size   USBFS_HandleIN, .-USBFS_HandleIN\r
- 545                           .section        .text.USBFS_ControlReadStatusStage,"ax",%progbits\r
- 546                           .align  1\r
- 547                           .global USBFS_ControlReadStatusStage\r
- 548                           .thumb\r
- 549                           .thumb_func\r
- 550                           .type   USBFS_ControlReadStatusStage, %function\r
- 551                   USBFS_ControlReadStatusStage:\r
- 552                   .LFB8:\r
- 485:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 553                           .loc 1 485 0\r
- 554                           .cfi_startproc\r
- 555                           @ args = 0, pretend = 0, frame = 0\r
- 556                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 557 0000 08B5                 push    {r3, lr}\r
- 558                   .LCFI3:\r
- 559                           .cfi_def_cfa_offset 8\r
- 560                           .cfi_offset 3, -8\r
- 561                           .cfi_offset 14, -4\r
- 487:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount += USBFS_lastPacketSize;\r
- 562                           .loc 1 487 0\r
- 563 0002 0849                 ldr     r1, .L60\r
- 564 0004 084B                 ldr     r3, .L60+4\r
- 565 0006 1A88                 ldrh    r2, [r3, #0]\r
- 566 0008 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 567 000a 8218                 adds    r2, r0, r2\r
- 568 000c 91B2                 uxth    r1, r2\r
- 569 000e 1980                 strh    r1, [r3, #0]    @ movhi\r
- 489:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
- 570                           .loc 1 489 0\r
- 571 0010 064B                 ldr     r3, .L60+8\r
- 572 0012 0020                 movs    r0, #0\r
- 573 0014 1870                 strb    r0, [r3, #0]\r
- 491:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
- 574                           .loc 1 491 0\r
- 575 0016 0120                 movs    r0, #1\r
- 576 0018 FFF7FEFF             bl      USBFS_UpdateStatusBlock\r
- 577                   .LVL19:\r
- 493:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode =  USBFS_MODE_STALL_IN_OUT;\r
- 578                           .loc 1 493 0\r
- 579 001c 0449                 ldr     r1, .L60+12\r
- 580 001e 0322                 movs    r2, #3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 25\r
-\r
-\r
- 581 0020 0A70                 strb    r2, [r1, #0]\r
- 582 0022 08BD                 pop     {r3, pc}\r
- 583                   .L61:\r
- 584                           .align  2\r
- 585                   .L60:\r
- 586 0024 00000000             .word   USBFS_lastPacketSize\r
- 587 0028 00000000             .word   USBFS_transferByteCount\r
- 588 002c 00000000             .word   USBFS_transferState\r
- 589 0030 00000000             .word   USBFS_ep0Mode\r
- 590                           .cfi_endproc\r
- 591                   .LFE8:\r
- 592                           .size   USBFS_ControlReadStatusStage, .-USBFS_ControlReadStatusStage\r
- 593                           .section        .text.USBFS_HandleOUT,"ax",%progbits\r
- 594                           .align  1\r
- 595                           .global USBFS_HandleOUT\r
- 596                           .thumb\r
- 597                           .thumb_func\r
- 598                           .type   USBFS_HandleOUT, %function\r
- 599                   USBFS_HandleOUT:\r
- 600                   .LFB3:\r
- 246:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 601                           .loc 1 246 0\r
- 602                           .cfi_startproc\r
- 603                           @ args = 0, pretend = 0, frame = 0\r
- 604                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 605 0000 08B5                 push    {r3, lr}\r
- 606                   .LCFI4:\r
- 607                           .cfi_def_cfa_offset 8\r
- 608                           .cfi_offset 3, -8\r
- 609                           .cfi_offset 14, -4\r
- 247:.\Generated_Source\PSoC5/USBFS_drv.c ****     switch (USBFS_transferState)\r
- 610                           .loc 1 247 0\r
- 611 0002 0B4B                 ldr     r3, .L67\r
- 612 0004 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 613 0006 0428                 cmp     r0, #4\r
- 614 0008 07D0                 beq     .L65\r
- 615 000a 0628                 cmp     r0, #6\r
- 616 000c 09D0                 beq     .L66\r
- 617 000e 0228                 cmp     r0, #2\r
- 618 0010 0DD1                 bne     .L62\r
- 266:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 619                           .loc 1 266 0\r
- 620 0012 BDE80840             pop     {r3, lr}\r
- 252:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlReadStatusStage();\r
- 621                           .loc 1 252 0\r
- 622 0016 FFF7FEBF             b       USBFS_ControlReadStatusStage\r
- 623                   .LVL20:\r
- 624                   .L65:\r
- 266:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 625                           .loc 1 266 0\r
- 626 001a BDE80840             pop     {r3, lr}\r
- 255:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ControlWriteDataStage();\r
- 627                           .loc 1 255 0\r
- 628 001e FFF7FEBF             b       USBFS_ControlWriteDataStage\r
- 629                   .LVL21:\r
- 630                   .L66:\r
- 259:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_UpdateStatusBlock(USBFS_XFER_ERROR);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 26\r
-\r
-\r
- 631                           .loc 1 259 0\r
- 632 0022 0320                 movs    r0, #3\r
- 633 0024 FFF7FEFF             bl      USBFS_UpdateStatusBlock\r
- 634                   .LVL22:\r
- 261:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 635                           .loc 1 261 0\r
- 636 0028 0249                 ldr     r1, .L67+4\r
- 637 002a 0322                 movs    r2, #3\r
- 638 002c 0A70                 strb    r2, [r1, #0]\r
- 639                   .L62:\r
- 640 002e 08BD                 pop     {r3, pc}\r
- 641                   .L68:\r
- 642                           .align  2\r
- 643                   .L67:\r
- 644 0030 00000000             .word   USBFS_transferState\r
- 645 0034 00000000             .word   USBFS_ep0Mode\r
- 646                           .cfi_endproc\r
- 647                   .LFE3:\r
- 648                           .size   USBFS_HandleOUT, .-USBFS_HandleOUT\r
- 649                           .section        .text.USBFS_HandleSetup,"ax",%progbits\r
- 650                           .align  1\r
- 651                           .global USBFS_HandleSetup\r
- 652                           .thumb\r
- 653                           .thumb_func\r
- 654                           .type   USBFS_HandleSetup, %function\r
- 655                   USBFS_HandleSetup:\r
- 656                   .LFB1:\r
- 152:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 657                           .loc 1 152 0\r
- 658                           .cfi_startproc\r
- 659                           @ args = 0, pretend = 0, frame = 0\r
- 660                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 661 0000 08B5                 push    {r3, lr}\r
- 662                   .LCFI5:\r
- 663                           .cfi_def_cfa_offset 8\r
- 664                           .cfi_offset 3, -8\r
- 665                           .cfi_offset 14, -4\r
- 155:.\Generated_Source\PSoC5/USBFS_drv.c ****     requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* unlock registers */\r
- 666                           .loc 1 155 0\r
- 667 0002 114B                 ldr     r3, .L77\r
- 668 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 669                   .LVL23:\r
- 156:.\Generated_Source\PSoC5/USBFS_drv.c ****     CY_SET_REG8(USBFS_EP0_CR_PTR, requestHandled);       /* clear setup bit */\r
- 670                           .loc 1 156 0\r
- 671 0006 1A70                 strb    r2, [r3, #0]\r
- 157:.\Generated_Source\PSoC5/USBFS_drv.c ****     requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* reread register */\r
- 672                           .loc 1 157 0\r
- 673 0008 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 674                   .LVL24:\r
- 158:.\Generated_Source\PSoC5/USBFS_drv.c ****     if((requestHandled & USBFS_MODE_SETUP_RCVD) != 0u)\r
- 675                           .loc 1 158 0\r
- 676 000a 0206                 lsls    r2, r0, #24\r
- 677 000c 02D5                 bpl     .L70\r
- 160:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Mode = requestHandled;        /* if SETUP bit set -> exit without modifying the mo\r
- 678                           .loc 1 160 0\r
- 679 000e 0F4B                 ldr     r3, .L77+4\r
- 680 0010 1870                 strb    r0, [r3, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 27\r
-\r
-\r
- 681 0012 08BD                 pop     {r3, pc}\r
- 682                   .L70:\r
- 165:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_UpdateStatusBlock(USBFS_XFER_PREMATURE);\r
- 683                           .loc 1 165 0\r
- 684 0014 0220                 movs    r0, #2\r
- 685                   .LVL25:\r
- 686 0016 FFF7FEFF             bl      USBFS_UpdateStatusBlock\r
- 687                   .LVL26:\r
- 167:.\Generated_Source\PSoC5/USBFS_drv.c ****         switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_TYPE_MASK)\r
- 688                           .loc 1 167 0\r
- 689 001a 0D49                 ldr     r1, .L77+8\r
- 690 001c 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 691 001e 03F06002             and     r2, r3, #96\r
- 692 0022 202A                 cmp     r2, #32\r
- 693 0024 05D0                 beq     .L74\r
- 694 0026 402A                 cmp     r2, #64\r
- 695 0028 06D0                 beq     .L75\r
- 696 002a 42B9                 cbnz    r2, .L72\r
- 170:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_HandleStandardRqst();\r
- 697                           .loc 1 170 0\r
- 698 002c FFF7FEFF             bl      USBFS_HandleStandardRqst\r
- 699                   .LVL27:\r
- 171:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 700                           .loc 1 171 0\r
- 701 0030 04E0                 b       .L76\r
- 702                   .LVL28:\r
- 703                   .L74:\r
- 173:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_DispatchClassRqst();\r
- 704                           .loc 1 173 0\r
- 705 0032 FFF7FEFF             bl      USBFS_DispatchClassRqst\r
- 706                   .LVL29:\r
- 174:.\Generated_Source\PSoC5/USBFS_drv.c ****                 break;\r
- 707                           .loc 1 174 0\r
- 708 0036 01E0                 b       .L76\r
- 709                   .LVL30:\r
- 710                   .L75:\r
- 176:.\Generated_Source\PSoC5/USBFS_drv.c ****                 requestHandled = USBFS_HandleVendorRqst();\r
- 711                           .loc 1 176 0\r
- 712 0038 FFF7FEFF             bl      USBFS_HandleVendorRqst\r
- 713                   .LVL31:\r
- 714                   .L76:\r
- 182:.\Generated_Source\PSoC5/USBFS_drv.c ****         if (requestHandled == USBFS_FALSE)\r
- 715                           .loc 1 182 0\r
- 716 003c 10B9                 cbnz    r0, .L69\r
- 717                   .LVL32:\r
- 718                   .L72:\r
- 184:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
- 719                           .loc 1 184 0\r
- 720 003e 0349                 ldr     r1, .L77+4\r
- 721 0040 0320                 movs    r0, #3\r
- 722 0042 0870                 strb    r0, [r1, #0]\r
- 723                   .L69:\r
- 724 0044 08BD                 pop     {r3, pc}\r
- 725                   .L78:\r
- 726 0046 00BF                 .align  2\r
- 727                   .L77:\r
- 728 0048 28600040             .word   1073766440\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 28\r
-\r
-\r
- 729 004c 00000000             .word   USBFS_ep0Mode\r
- 730 0050 00600040             .word   1073766400\r
- 731                           .cfi_endproc\r
- 732                   .LFE1:\r
- 733                           .size   USBFS_HandleSetup, .-USBFS_HandleSetup\r
- 734                           .section        .text.USBFS_EP_0_ISR,"ax",%progbits\r
- 735                           .align  1\r
- 736                           .global USBFS_EP_0_ISR\r
- 737                           .thumb\r
- 738                           .thumb_func\r
- 739                           .type   USBFS_EP_0_ISR, %function\r
- 740                   USBFS_EP_0_ISR:\r
- 741                   .LFB0:\r
-  67:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 742                           .loc 1 67 0\r
- 743                           .cfi_startproc\r
- 744                           @ args = 0, pretend = 0, frame = 0\r
- 745                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 746 0000 08B5                 push    {r3, lr}\r
- 747                   .LCFI6:\r
- 748                           .cfi_def_cfa_offset 8\r
- 749                           .cfi_offset 3, -8\r
- 750                           .cfi_offset 14, -4\r
-  72:.\Generated_Source\PSoC5/USBFS_drv.c ****     bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);\r
- 751                           .loc 1 72 0\r
- 752 0002 224B                 ldr     r3, .L95\r
- 753 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 754 0006 D0B2                 uxtb    r0, r2\r
- 755                   .LVL33:\r
-  73:.\Generated_Source\PSoC5/USBFS_drv.c ****     if ((bRegTemp & USBFS_MODE_ACKD) != 0u)\r
- 756                           .loc 1 73 0\r
- 757 0008 00F01001             and     r1, r0, #16\r
- 758 000c CBB2                 uxtb    r3, r1\r
- 759 000e 002B                 cmp     r3, #0\r
- 760 0010 3BD0                 beq     .L79\r
- 761                   .LVL34:\r
-  76:.\Generated_Source\PSoC5/USBFS_drv.c ****         if ((bRegTemp & USBFS_MODE_SETUP_RCVD) != 0u)\r
- 762                           .loc 1 76 0\r
- 763 0012 52B2                 sxtb    r2, r2\r
- 764 0014 002A                 cmp     r2, #0\r
- 765 0016 0ADA                 bge     .L82\r
-  78:.\Generated_Source\PSoC5/USBFS_drv.c ****             if((bRegTemp & USBFS_MODE_MASK) != USBFS_MODE_NAK_IN_OUT)\r
- 766                           .loc 1 78 0\r
- 767 0018 00F00F01             and     r1, r0, #15\r
- 768 001c 0129                 cmp     r1, #1\r
- 769 001e 34D1                 bne     .L79\r
-  84:.\Generated_Source\PSoC5/USBFS_drv.c ****                 USBFS_HandleSetup();\r
- 770                           .loc 1 84 0\r
- 771 0020 FFF7FEFF             bl      USBFS_HandleSetup\r
- 772                   .LVL35:\r
-  85:.\Generated_Source\PSoC5/USBFS_drv.c ****                 if((USBFS_ep0Mode & USBFS_MODE_SETUP_RCVD) != 0u)\r
- 773                           .loc 1 85 0\r
- 774 0024 1A4B                 ldr     r3, .L95+4\r
- 775 0026 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 776 0028 0006                 lsls    r0, r0, #24\r
- 777 002a 0DD5                 bpl     .L84\r
- 778 002c 08BD                 pop     {r3, pc}\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 29\r
-\r
-\r
- 779                   .LVL36:\r
- 780                   .L82:\r
-  92:.\Generated_Source\PSoC5/USBFS_drv.c ****         else if ((bRegTemp & USBFS_MODE_IN_RCVD) != 0u)\r
- 781                           .loc 1 92 0\r
- 782 002e 00F04001             and     r1, r0, #64\r
- 783 0032 CBB2                 uxtb    r3, r1\r
- 784 0034 13B1                 cbz     r3, .L85\r
-  94:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_HandleIN();\r
- 785                           .loc 1 94 0\r
- 786 0036 FFF7FEFF             bl      USBFS_HandleIN\r
- 787                   .LVL37:\r
- 788 003a 05E0                 b       .L84\r
- 789                   .LVL38:\r
- 790                   .L85:\r
-  96:.\Generated_Source\PSoC5/USBFS_drv.c ****         else if ((bRegTemp & USBFS_MODE_OUT_RCVD) != 0u)\r
- 791                           .loc 1 96 0\r
- 792 003c 00F02000             and     r0, r0, #32\r
- 793 0040 C2B2                 uxtb    r2, r0\r
- 794                   .LVL39:\r
- 795 0042 12B3                 cbz     r2, .L79\r
-  98:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_HandleOUT();\r
- 796                           .loc 1 98 0\r
- 797 0044 FFF7FEFF             bl      USBFS_HandleOUT\r
- 798                   .LVL40:\r
- 799                   .L84:\r
- 106:.\Generated_Source\PSoC5/USBFS_drv.c ****             bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);    /* unlock registers */\r
- 800                           .loc 1 106 0\r
- 801 0048 104A                 ldr     r2, .L95\r
- 802 004a 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 803                   .LVL41:\r
- 107:.\Generated_Source\PSoC5/USBFS_drv.c ****             if((bRegTemp & USBFS_MODE_SETUP_RCVD) == 0u)  /* Check if SETUP bit is not set, otherwi\r
- 804                           .loc 1 107 0\r
- 805 004c 0906                 lsls    r1, r1, #24\r
- 806                   .LVL42:\r
- 807 004e 1CD4                 bmi     .L79\r
- 808                   .L89:\r
- 110:.\Generated_Source\PSoC5/USBFS_drv.c ****                 bRegTemp = USBFS_ep0Toggle | USBFS_ep0Count;\r
- 809                           .loc 1 110 0\r
- 810 0050 104B                 ldr     r3, .L95+8\r
- 811 0052 114A                 ldr     r2, .L95+12\r
- 812 0054 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 813 0056 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 814 0058 41EA0003             orr     r3, r1, r0\r
- 815                   .LVL43:\r
- 111:.\Generated_Source\PSoC5/USBFS_drv.c ****                 CY_SET_REG8(USBFS_EP0_CNT_PTR, bRegTemp);\r
- 816                           .loc 1 111 0\r
- 817 005c 0F48                 ldr     r0, .L95+16\r
- 818 005e 0370                 strb    r3, [r0, #0]\r
- 112:.\Generated_Source\PSoC5/USBFS_drv.c ****                 if(bRegTemp == CY_GET_REG8(USBFS_EP0_CNT_PTR))   /* continue if writing was success\r
- 819                           .loc 1 112 0\r
- 820 0060 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 821 0062 9342                 cmp     r3, r2\r
- 822 0064 11D1                 bne     .L79\r
- 823                   .LVL44:\r
- 824                   .L92:\r
- 116:.\Generated_Source\PSoC5/USBFS_drv.c ****                         modifyReg = USBFS_ep0Mode;       /* Init temporary variable */\r
- 825                           .loc 1 116 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 30\r
-\r
-\r
- 826 0066 0A49                 ldr     r1, .L95+4\r
- 118:.\Generated_Source\PSoC5/USBFS_drv.c ****                         bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_SETUP_RCVD;\r
- 827                           .loc 1 118 0\r
- 828 0068 084B                 ldr     r3, .L95\r
- 116:.\Generated_Source\PSoC5/USBFS_drv.c ****                         modifyReg = USBFS_ep0Mode;       /* Init temporary variable */\r
- 829                           .loc 1 116 0\r
- 830 006a 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 831                   .LVL45:\r
- 118:.\Generated_Source\PSoC5/USBFS_drv.c ****                         bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_SETUP_RCVD;\r
- 832                           .loc 1 118 0\r
- 833 006c 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 834                   .LVL46:\r
- 119:.\Generated_Source\PSoC5/USBFS_drv.c ****                         if(bRegTemp == 0u)                          /* Check if SETUP bit is not se\r
- 835                           .loc 1 119 0\r
- 836 006e 00F08000             and     r0, r0, #128\r
- 837                   .LVL47:\r
- 838 0072 C0B2                 uxtb    r0, r0\r
- 839 0074 20B9                 cbnz    r0, .L87\r
- 122:.\Generated_Source\PSoC5/USBFS_drv.c ****                             CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_ep0Mode);\r
- 840                           .loc 1 122 0\r
- 841 0076 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 842                   .LVL48:\r
- 843 0078 1A70                 strb    r2, [r3, #0]\r
- 124:.\Generated_Source\PSoC5/USBFS_drv.c ****                             modifyReg = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_MASK;\r
- 844                           .loc 1 124 0\r
- 845 007a 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 846 007c 01F00F02             and     r2, r1, #15\r
- 847                   .LVL49:\r
- 848                   .L87:\r
- 126:.\Generated_Source\PSoC5/USBFS_drv.c ****                     }while(modifyReg != USBFS_ep0Mode);  /* Repeat if writing was not successful */\r
- 849                           .loc 1 126 0\r
- 850 0080 034B                 ldr     r3, .L95+4\r
- 851 0082 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 852 0084 8242                 cmp     r2, r0\r
- 853 0086 EED1                 bne     .L92\r
- 854 0088 08BD                 pop     {r3, pc}\r
- 855                   .LVL50:\r
- 856                   .L79:\r
- 857 008a 08BD                 pop     {r3, pc}\r
- 858                   .L96:\r
- 859                           .align  2\r
- 860                   .L95:\r
- 861 008c 28600040             .word   1073766440\r
- 862 0090 00000000             .word   USBFS_ep0Mode\r
- 863 0094 00000000             .word   USBFS_ep0Toggle\r
- 864 0098 00000000             .word   USBFS_ep0Count\r
- 865 009c 29600040             .word   1073766441\r
- 866                           .cfi_endproc\r
- 867                   .LFE0:\r
- 868                           .size   USBFS_EP_0_ISR, .-USBFS_EP_0_ISR\r
- 869                           .section        .text.USBFS_InitializeStatusBlock,"ax",%progbits\r
- 870                           .align  1\r
- 871                           .global USBFS_InitializeStatusBlock\r
- 872                           .thumb\r
- 873                           .thumb_func\r
- 874                           .type   USBFS_InitializeStatusBlock, %function\r
- 875                   USBFS_InitializeStatusBlock:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 31\r
-\r
-\r
- 876                   .LFB15:\r
- 740:.\Generated_Source\PSoC5/USBFS_drv.c ****     }\r
- 741:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 742:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 743:.\Generated_Source\PSoC5/USBFS_drv.c **** \r
- 744:.\Generated_Source\PSoC5/USBFS_drv.c **** /*******************************************************************************\r
- 745:.\Generated_Source\PSoC5/USBFS_drv.c **** * Function Name: USBFS_InitializeStatusBlock\r
- 746:.\Generated_Source\PSoC5/USBFS_drv.c **** ********************************************************************************\r
- 747:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 748:.\Generated_Source\PSoC5/USBFS_drv.c **** * Summary:\r
- 749:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Initialize the Completion Status Block for a Request.  The completion\r
- 750:.\Generated_Source\PSoC5/USBFS_drv.c **** *  code is set to USB_XFER_IDLE.\r
- 751:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 752:.\Generated_Source\PSoC5/USBFS_drv.c **** *  Also, initializes USBFS_transferByteCount.  Save some space,\r
- 753:.\Generated_Source\PSoC5/USBFS_drv.c **** *  this is the only consumer.\r
- 754:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 755:.\Generated_Source\PSoC5/USBFS_drv.c **** * Parameters:\r
- 756:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 757:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 758:.\Generated_Source\PSoC5/USBFS_drv.c **** * Return:\r
- 759:.\Generated_Source\PSoC5/USBFS_drv.c **** *  None.\r
- 760:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 761:.\Generated_Source\PSoC5/USBFS_drv.c **** * Global variables:\r
- 762:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pStatusBlock->status - set to XFER_IDLE.\r
- 763:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_currentTD.pStatusBlock->length - cleared.\r
- 764:.\Generated_Source\PSoC5/USBFS_drv.c **** *  USBFS_transferByteCount - cleared.\r
- 765:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 766:.\Generated_Source\PSoC5/USBFS_drv.c **** * Reentrant:\r
- 767:.\Generated_Source\PSoC5/USBFS_drv.c **** *  No.\r
- 768:.\Generated_Source\PSoC5/USBFS_drv.c **** *\r
- 769:.\Generated_Source\PSoC5/USBFS_drv.c **** *******************************************************************************/\r
- 770:.\Generated_Source\PSoC5/USBFS_drv.c **** void USBFS_InitializeStatusBlock(void) \r
- 771:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 877                           .loc 1 771 0\r
- 878                           .cfi_startproc\r
- 879                           @ args = 0, pretend = 0, frame = 0\r
- 880                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 881                           @ link register save eliminated.\r
- 772:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferByteCount = 0u;\r
- 882                           .loc 1 772 0\r
- 883 0000 054A                 ldr     r2, .L102\r
- 884 0002 0023                 movs    r3, #0\r
- 885 0004 1380                 strh    r3, [r2, #0]    @ movhi\r
- 773:.\Generated_Source\PSoC5/USBFS_drv.c ****     if(USBFS_currentTD.pStatusBlock != NULL)\r
- 886                           .loc 1 773 0\r
- 887 0006 054A                 ldr     r2, .L102+4\r
- 888 0008 9168                 ldr     r1, [r2, #8]\r
- 889 000a 19B1                 cbz     r1, .L97\r
- 774:.\Generated_Source\PSoC5/USBFS_drv.c ****     {\r
- 775:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock->status = USBFS_XFER_IDLE;\r
- 890                           .loc 1 775 0\r
- 891 000c 9168                 ldr     r1, [r2, #8]\r
- 892 000e 0B70                 strb    r3, [r1, #0]\r
- 776:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.pStatusBlock->length = 0u;\r
- 893                           .loc 1 776 0\r
- 894 0010 9068                 ldr     r0, [r2, #8]\r
- 895 0012 4380                 strh    r3, [r0, #2]    @ movhi\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 32\r
-\r
-\r
- 896                   .L97:\r
- 897 0014 7047                 bx      lr\r
- 898                   .L103:\r
- 899 0016 00BF                 .align  2\r
- 900                   .L102:\r
- 901 0018 00000000             .word   USBFS_transferByteCount\r
- 902 001c 00000000             .word   USBFS_currentTD\r
- 903                           .cfi_endproc\r
- 904                   .LFE15:\r
- 905                           .size   USBFS_InitializeStatusBlock, .-USBFS_InitializeStatusBlock\r
- 906                           .section        .text.USBFS_InitControlWrite,"ax",%progbits\r
- 907                           .align  1\r
- 908                           .global USBFS_InitControlWrite\r
- 909                           .thumb\r
- 910                           .thumb_func\r
- 911                           .type   USBFS_InitControlWrite, %function\r
- 912                   USBFS_InitControlWrite:\r
- 913                   .LFB9:\r
- 520:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 914                           .loc 1 520 0\r
- 915                           .cfi_startproc\r
- 916                           @ args = 0, pretend = 0, frame = 0\r
- 917                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 918 0000 08B5                 push    {r3, lr}\r
- 919                   .LCFI7:\r
- 920                           .cfi_def_cfa_offset 8\r
- 921                           .cfi_offset 3, -8\r
- 922                           .cfi_offset 14, -4\r
- 526:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 923                           .loc 1 526 0\r
- 924 0002 0C49                 ldr     r1, .L106\r
- 524:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_CONTROL_WRITE;\r
- 925                           .loc 1 524 0\r
- 926 0004 0C4B                 ldr     r3, .L106+4\r
- 927 0006 0422                 movs    r2, #4\r
- 526:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 928                           .loc 1 526 0\r
- 929 0008 8020                 movs    r0, #128\r
- 524:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_transferState = USBFS_TRANS_STATE_CONTROL_WRITE;\r
- 930                           .loc 1 524 0\r
- 931 000a 1A70                 strb    r2, [r3, #0]\r
- 526:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
- 932                           .loc 1 526 0\r
- 933 000c 0870                 strb    r0, [r1, #0]\r
- 528:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_InitializeStatusBlock();\r
- 934                           .loc 1 528 0\r
- 935 000e FFF7FEFF             bl      USBFS_InitializeStatusBlock\r
- 936                   .LVL51:\r
- 530:.\Generated_Source\PSoC5/USBFS_drv.c ****     xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
- 937                           .loc 1 530 0\r
- 938 0012 0A4B                 ldr     r3, .L106+8\r
- 939 0014 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 940 0016 581E                 subs    r0, r3, #1\r
- 532:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_currentTD.count > xferCount)\r
- 941                           .loc 1 532 0\r
- 942 0018 094B                 ldr     r3, .L106+12\r
- 530:.\Generated_Source\PSoC5/USBFS_drv.c ****     xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 33\r
-\r
-\r
- 943                           .loc 1 530 0\r
- 944 001a 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 532:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_currentTD.count > xferCount)\r
- 945                           .loc 1 532 0\r
- 946 001c 1888                 ldrh    r0, [r3, #0]\r
- 530:.\Generated_Source\PSoC5/USBFS_drv.c ****     xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
- 947                           .loc 1 530 0\r
- 948 001e 41EA0222             orr     r2, r1, r2, lsl #8\r
- 949                   .LVL52:\r
- 532:.\Generated_Source\PSoC5/USBFS_drv.c ****     if (USBFS_currentTD.count > xferCount)\r
- 950                           .loc 1 532 0\r
- 951 0022 81B2                 uxth    r1, r0\r
- 952 0024 9142                 cmp     r1, r2\r
- 534:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_currentTD.count = xferCount;\r
- 953                           .loc 1 534 0\r
- 954 0026 88BF                 it      hi\r
- 955 0028 1A80                 strhhi  r2, [r3, #0]    @ movhi\r
- 538:.\Generated_Source\PSoC5/USBFS_drv.c ****     USBFS_ep0Mode = USBFS_MODE_ACK_OUT_STATUS_IN;\r
- 956                           .loc 1 538 0\r
- 957 002a 064B                 ldr     r3, .L106+16\r
- 958 002c 0B22                 movs    r2, #11\r
- 959                   .LVL53:\r
- 960 002e 1A70                 strb    r2, [r3, #0]\r
- 541:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 961                           .loc 1 541 0\r
- 962 0030 0120                 movs    r0, #1\r
- 963 0032 08BD                 pop     {r3, pc}\r
- 964                   .L107:\r
- 965                           .align  2\r
- 966                   .L106:\r
- 967 0034 00000000             .word   USBFS_ep0Toggle\r
- 968 0038 00000000             .word   USBFS_transferState\r
- 969 003c 07600040             .word   1073766407\r
- 970 0040 00000000             .word   USBFS_currentTD\r
- 971 0044 00000000             .word   USBFS_ep0Mode\r
- 972                           .cfi_endproc\r
- 973                   .LFE9:\r
- 974                           .size   USBFS_InitControlWrite, .-USBFS_InitControlWrite\r
- 975                           .section        .text.USBFS_InitControlRead,"ax",%progbits\r
- 976                           .align  1\r
- 977                           .global USBFS_InitControlRead\r
- 978                           .thumb\r
- 979                           .thumb_func\r
- 980                           .type   USBFS_InitControlRead, %function\r
- 981                   USBFS_InitControlRead:\r
- 982                   .LFB5:\r
- 370:.\Generated_Source\PSoC5/USBFS_drv.c **** {\r
- 983                           .loc 1 370 0\r
- 984                           .cfi_startproc\r
- 985                           @ args = 0, pretend = 0, frame = 0\r
- 986                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 987 0000 10B5                 push    {r4, lr}\r
- 988                   .LCFI8:\r
- 989                           .cfi_def_cfa_offset 8\r
- 990                           .cfi_offset 4, -8\r
- 991                           .cfi_offset 14, -4\r
- 372:.\Generated_Source\PSoC5/USBFS_drv.c ****     if(USBFS_currentTD.count == 0u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 34\r
-\r
-\r
- 992                           .loc 1 372 0\r
- 993 0002 0F4C                 ldr     r4, .L112\r
- 994 0004 2388                 ldrh    r3, [r4, #0]\r
- 995 0006 98B2                 uxth    r0, r3\r
- 996 0008 10B9                 cbnz    r0, .L109\r
- 374:.\Generated_Source\PSoC5/USBFS_drv.c ****         (void) USBFS_InitZeroLengthControlTransfer();\r
- 997                           .loc 1 374 0\r
- 998 000a FFF7FEFF             bl      USBFS_InitZeroLengthControlTransfer\r
- 999                   .LVL54:\r
- 1000 000e 14E0                b       .L110\r
- 1001                  .L109:\r
- 379:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 1002                          .loc 1 379 0\r
- 1003 0010 0C49                ldr     r1, .L112+4\r
- 381:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle = 0u;\r
- 1004                          .loc 1 381 0\r
- 1005 0012 0D4B                ldr     r3, .L112+8\r
- 379:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 1006                          .loc 1 379 0\r
- 1007 0014 0222                movs    r2, #2\r
- 381:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle = 0u;\r
- 1008                          .loc 1 381 0\r
- 1009 0016 0020                movs    r0, #0\r
- 379:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
- 1010                          .loc 1 379 0\r
- 1011 0018 0A70                strb    r2, [r1, #0]\r
- 381:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_ep0Toggle = 0u;\r
- 1012                          .loc 1 381 0\r
- 1013 001a 1870                strb    r0, [r3, #0]\r
- 383:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_InitializeStatusBlock();\r
- 1014                          .loc 1 383 0\r
- 1015 001c FFF7FEFF            bl      USBFS_InitializeStatusBlock\r
- 1016                  .LVL55:\r
- 384:.\Generated_Source\PSoC5/USBFS_drv.c ****         xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
- 1017                          .loc 1 384 0\r
- 1018 0020 0A49                ldr     r1, .L112+12\r
- 1019 0022 481E                subs    r0, r1, #1\r
- 1020 0024 0A78                ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 1021 0026 0378                ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 1022 0028 43EA0221            orr     r1, r3, r2, lsl #8\r
- 1023                  .LVL56:\r
- 386:.\Generated_Source\PSoC5/USBFS_drv.c ****         if (USBFS_currentTD.count > xferCount)\r
- 1024                          .loc 1 386 0\r
- 1025 002c 2288                ldrh    r2, [r4, #0]\r
- 1026 002e 90B2                uxth    r0, r2\r
- 1027 0030 8842                cmp     r0, r1\r
- 388:.\Generated_Source\PSoC5/USBFS_drv.c ****             USBFS_currentTD.count = xferCount;\r
- 1028                          .loc 1 388 0\r
- 1029 0032 88BF                it      hi\r
- 1030 0034 2180                strhhi  r1, [r4, #0]    @ movhi\r
- 390:.\Generated_Source\PSoC5/USBFS_drv.c ****         USBFS_LoadEP0();\r
- 1031                          .loc 1 390 0\r
- 1032 0036 FFF7FEFF            bl      USBFS_LoadEP0\r
- 1033                  .LVL57:\r
- 1034                  .L110:\r
- 394:.\Generated_Source\PSoC5/USBFS_drv.c **** }\r
- 1035                          .loc 1 394 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 35\r
-\r
-\r
- 1036 003a 0120                movs    r0, #1\r
- 1037 003c 10BD                pop     {r4, pc}\r
- 1038                  .L113:\r
- 1039 003e 00BF                .align  2\r
- 1040                  .L112:\r
- 1041 0040 00000000            .word   USBFS_currentTD\r
- 1042 0044 00000000            .word   USBFS_transferState\r
- 1043 0048 00000000            .word   USBFS_ep0Toggle\r
- 1044 004c 07600040            .word   1073766407\r
- 1045                          .cfi_endproc\r
- 1046                  .LFE5:\r
- 1047                          .size   USBFS_InitControlRead, .-USBFS_InitControlRead\r
- 1048                          .comm   USBFS_transferByteCount,2,2\r
- 1049                          .comm   USBFS_ep0Count,1,1\r
- 1050                          .comm   USBFS_ep0Mode,1,1\r
- 1051                          .comm   USBFS_currentTD,12,4\r
- 1052                          .comm   USBFS_transferState,1,1\r
- 1053                          .comm   USBFS_lastPacketSize,1,1\r
- 1054                          .comm   USBFS_ep0Toggle,1,1\r
- 1055                          .comm   USBFS_interfaceClass,4,4\r
- 1056                          .comm   USBFS_device,1,1\r
- 1057                          .comm   USBFS_interfaceStatus,1,1\r
- 1058                          .comm   USBFS_interfaceSetting_last,1,1\r
- 1059                          .comm   USBFS_interfaceSetting,1,1\r
- 1060                          .comm   USBFS_deviceStatus,1,1\r
- 1061                          .comm   USBFS_deviceAddress,1,1\r
- 1062                          .comm   USBFS_configurationChanged,1,1\r
- 1063                          .comm   USBFS_interfaceNumber,1,1\r
- 1064                          .comm   USBFS_configuration,1,1\r
- 1065                          .comm   USBFS_EP,108,2\r
- 1066                          .text\r
- 1067                  .Letext0:\r
- 1068                          .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 1069                          .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 1070                          .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 1071                          .section        .debug_info,"",%progbits\r
- 1072                  .Ldebug_info0:\r
- 1073 0000 B3060000            .4byte  0x6b3\r
- 1074 0004 0200                .2byte  0x2\r
- 1075 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1076 000a 04                  .byte   0x4\r
- 1077 000b 01                  .uleb128 0x1\r
- 1078 000c 09030000            .4byte  .LASF74\r
- 1079 0010 01                  .byte   0x1\r
- 1080 0011 FA000000            .4byte  .LASF75\r
- 1081 0015 31020000            .4byte  .LASF76\r
- 1082 0019 00000000            .4byte  .Ldebug_ranges0+0\r
- 1083 001d 00000000            .4byte  0\r
- 1084 0021 00000000            .4byte  0\r
- 1085 0025 00000000            .4byte  .Ldebug_line0\r
- 1086 0029 02                  .uleb128 0x2\r
- 1087 002a 01                  .byte   0x1\r
- 1088 002b 06                  .byte   0x6\r
- 1089 002c AC000000            .4byte  .LASF0\r
- 1090 0030 02                  .uleb128 0x2\r
- 1091 0031 01                  .byte   0x1\r
- 1092 0032 08                  .byte   0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 36\r
-\r
-\r
- 1093 0033 6B030000            .4byte  .LASF1\r
- 1094 0037 02                  .uleb128 0x2\r
- 1095 0038 02                  .byte   0x2\r
- 1096 0039 05                  .byte   0x5\r
- 1097 003a 95030000            .4byte  .LASF2\r
- 1098 003e 02                  .uleb128 0x2\r
- 1099 003f 02                  .byte   0x2\r
- 1100 0040 07                  .byte   0x7\r
- 1101 0041 C9010000            .4byte  .LASF3\r
- 1102 0045 02                  .uleb128 0x2\r
- 1103 0046 04                  .byte   0x4\r
- 1104 0047 05                  .byte   0x5\r
- 1105 0048 E2000000            .4byte  .LASF4\r
- 1106 004c 02                  .uleb128 0x2\r
- 1107 004d 04                  .byte   0x4\r
- 1108 004e 07                  .byte   0x7\r
- 1109 004f A9010000            .4byte  .LASF5\r
- 1110 0053 02                  .uleb128 0x2\r
- 1111 0054 08                  .byte   0x8\r
- 1112 0055 05                  .byte   0x5\r
- 1113 0056 9E000000            .4byte  .LASF6\r
- 1114 005a 02                  .uleb128 0x2\r
- 1115 005b 08                  .byte   0x8\r
- 1116 005c 07                  .byte   0x7\r
- 1117 005d 67000000            .4byte  .LASF7\r
- 1118 0061 03                  .uleb128 0x3\r
- 1119 0062 04                  .byte   0x4\r
- 1120 0063 05                  .byte   0x5\r
- 1121 0064 696E7400            .ascii  "int\000"\r
- 1122 0068 02                  .uleb128 0x2\r
- 1123 0069 04                  .byte   0x4\r
- 1124 006a 07                  .byte   0x7\r
- 1125 006b 84010000            .4byte  .LASF8\r
- 1126 006f 04                  .uleb128 0x4\r
- 1127 0070 EB000000            .4byte  .LASF9\r
- 1128 0074 02                  .byte   0x2\r
- 1129 0075 5B                  .byte   0x5b\r
- 1130 0076 30000000            .4byte  0x30\r
- 1131 007a 04                  .uleb128 0x4\r
- 1132 007b 13000000            .4byte  .LASF10\r
- 1133 007f 02                  .byte   0x2\r
- 1134 0080 5C                  .byte   0x5c\r
- 1135 0081 3E000000            .4byte  0x3e\r
- 1136 0085 02                  .uleb128 0x2\r
- 1137 0086 04                  .byte   0x4\r
- 1138 0087 04                  .byte   0x4\r
- 1139 0088 EF020000            .4byte  .LASF11\r
- 1140 008c 02                  .uleb128 0x2\r
- 1141 008d 08                  .byte   0x8\r
- 1142 008e 04                  .byte   0x4\r
- 1143 008f 1F010000            .4byte  .LASF12\r
- 1144 0093 02                  .uleb128 0x2\r
- 1145 0094 01                  .byte   0x1\r
- 1146 0095 08                  .byte   0x8\r
- 1147 0096 6A040000            .4byte  .LASF13\r
- 1148 009a 04                  .uleb128 0x4\r
- 1149 009b 52030000            .4byte  .LASF14\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 37\r
-\r
-\r
- 1150 009f 02                  .byte   0x2\r
- 1151 00a0 F0                  .byte   0xf0\r
- 1152 00a1 A5000000            .4byte  0xa5\r
- 1153 00a5 05                  .uleb128 0x5\r
- 1154 00a6 6F000000            .4byte  0x6f\r
- 1155 00aa 05                  .uleb128 0x5\r
- 1156 00ab 7A000000            .4byte  0x7a\r
- 1157 00af 02                  .uleb128 0x2\r
- 1158 00b0 04                  .byte   0x4\r
- 1159 00b1 07                  .byte   0x7\r
- 1160 00b2 81020000            .4byte  .LASF15\r
- 1161 00b6 06                  .uleb128 0x6\r
- 1162 00b7 0C                  .byte   0xc\r
- 1163 00b8 03                  .byte   0x3\r
- 1164 00b9 79                  .byte   0x79\r
- 1165 00ba 3D010000            .4byte  0x13d\r
- 1166 00be 07                  .uleb128 0x7\r
- 1167 00bf A8020000            .4byte  .LASF16\r
- 1168 00c3 03                  .byte   0x3\r
- 1169 00c4 7B                  .byte   0x7b\r
- 1170 00c5 6F000000            .4byte  0x6f\r
- 1171 00c9 02                  .byte   0x2\r
- 1172 00ca 23                  .byte   0x23\r
- 1173 00cb 00                  .uleb128 0\r
- 1174 00cc 07                  .uleb128 0x7\r
- 1175 00cd F5020000            .4byte  .LASF17\r
- 1176 00d1 03                  .byte   0x3\r
- 1177 00d2 7C                  .byte   0x7c\r
- 1178 00d3 6F000000            .4byte  0x6f\r
- 1179 00d7 02                  .byte   0x2\r
- 1180 00d8 23                  .byte   0x23\r
- 1181 00d9 01                  .uleb128 0x1\r
- 1182 00da 07                  .uleb128 0x7\r
- 1183 00db 77020000            .4byte  .LASF18\r
- 1184 00df 03                  .byte   0x3\r
- 1185 00e0 7D                  .byte   0x7d\r
- 1186 00e1 6F000000            .4byte  0x6f\r
- 1187 00e5 02                  .byte   0x2\r
- 1188 00e6 23                  .byte   0x23\r
- 1189 00e7 02                  .uleb128 0x2\r
- 1190 00e8 07                  .uleb128 0x7\r
- 1191 00e9 F1000000            .4byte  .LASF19\r
- 1192 00ed 03                  .byte   0x3\r
- 1193 00ee 7E                  .byte   0x7e\r
- 1194 00ef 6F000000            .4byte  0x6f\r
- 1195 00f3 02                  .byte   0x2\r
- 1196 00f4 23                  .byte   0x23\r
- 1197 00f5 03                  .uleb128 0x3\r
- 1198 00f6 07                  .uleb128 0x7\r
- 1199 00f7 7E000000            .4byte  .LASF20\r
- 1200 00fb 03                  .byte   0x3\r
- 1201 00fc 7F                  .byte   0x7f\r
- 1202 00fd 6F000000            .4byte  0x6f\r
- 1203 0101 02                  .byte   0x2\r
- 1204 0102 23                  .byte   0x23\r
- 1205 0103 04                  .uleb128 0x4\r
- 1206 0104 07                  .uleb128 0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 38\r
-\r
-\r
- 1207 0105 49010000            .4byte  .LASF21\r
- 1208 0109 03                  .byte   0x3\r
- 1209 010a 80                  .byte   0x80\r
- 1210 010b 6F000000            .4byte  0x6f\r
- 1211 010f 02                  .byte   0x2\r
- 1212 0110 23                  .byte   0x23\r
- 1213 0111 05                  .uleb128 0x5\r
- 1214 0112 07                  .uleb128 0x7\r
- 1215 0113 89040000            .4byte  .LASF22\r
- 1216 0117 03                  .byte   0x3\r
- 1217 0118 81                  .byte   0x81\r
- 1218 0119 7A000000            .4byte  0x7a\r
- 1219 011d 02                  .byte   0x2\r
- 1220 011e 23                  .byte   0x23\r
- 1221 011f 06                  .uleb128 0x6\r
- 1222 0120 07                  .uleb128 0x7\r
- 1223 0121 6F040000            .4byte  .LASF23\r
- 1224 0125 03                  .byte   0x3\r
- 1225 0126 82                  .byte   0x82\r
- 1226 0127 7A000000            .4byte  0x7a\r
- 1227 012b 02                  .byte   0x2\r
- 1228 012c 23                  .byte   0x23\r
- 1229 012d 08                  .uleb128 0x8\r
- 1230 012e 07                  .uleb128 0x7\r
- 1231 012f 0C020000            .4byte  .LASF24\r
- 1232 0133 03                  .byte   0x3\r
- 1233 0134 83                  .byte   0x83\r
- 1234 0135 6F000000            .4byte  0x6f\r
- 1235 0139 02                  .byte   0x2\r
- 1236 013a 23                  .byte   0x23\r
- 1237 013b 0A                  .uleb128 0xa\r
- 1238 013c 00                  .byte   0\r
- 1239 013d 04                  .uleb128 0x4\r
- 1240 013e D6030000            .4byte  .LASF25\r
- 1241 0142 03                  .byte   0x3\r
- 1242 0143 84                  .byte   0x84\r
- 1243 0144 B6000000            .4byte  0xb6\r
- 1244 0148 06                  .uleb128 0x6\r
- 1245 0149 04                  .byte   0x4\r
- 1246 014a 03                  .byte   0x3\r
- 1247 014b 90                  .byte   0x90\r
- 1248 014c 6D010000            .4byte  0x16d\r
- 1249 0150 07                  .uleb128 0x7\r
- 1250 0151 DF040000            .4byte  .LASF26\r
- 1251 0155 03                  .byte   0x3\r
- 1252 0156 92                  .byte   0x92\r
- 1253 0157 6F000000            .4byte  0x6f\r
- 1254 015b 02                  .byte   0x2\r
- 1255 015c 23                  .byte   0x23\r
- 1256 015d 00                  .uleb128 0\r
- 1257 015e 07                  .uleb128 0x7\r
- 1258 015f 63040000            .4byte  .LASF27\r
- 1259 0163 03                  .byte   0x3\r
- 1260 0164 93                  .byte   0x93\r
- 1261 0165 7A000000            .4byte  0x7a\r
- 1262 0169 02                  .byte   0x2\r
- 1263 016a 23                  .byte   0x23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 39\r
-\r
-\r
- 1264 016b 02                  .uleb128 0x2\r
- 1265 016c 00                  .byte   0\r
- 1266 016d 04                  .uleb128 0x4\r
- 1267 016e BE020000            .4byte  .LASF28\r
- 1268 0172 03                  .byte   0x3\r
- 1269 0173 94                  .byte   0x94\r
- 1270 0174 48010000            .4byte  0x148\r
- 1271 0178 06                  .uleb128 0x6\r
- 1272 0179 0C                  .byte   0xc\r
- 1273 017a 03                  .byte   0x3\r
- 1274 017b 96                  .byte   0x96\r
- 1275 017c AB010000            .4byte  0x1ab\r
- 1276 0180 07                  .uleb128 0x7\r
- 1277 0181 0D000000            .4byte  .LASF29\r
- 1278 0185 03                  .byte   0x3\r
- 1279 0186 98                  .byte   0x98\r
- 1280 0187 7A000000            .4byte  0x7a\r
- 1281 018b 02                  .byte   0x2\r
- 1282 018c 23                  .byte   0x23\r
- 1283 018d 00                  .uleb128 0\r
- 1284 018e 07                  .uleb128 0x7\r
- 1285 018f 2F010000            .4byte  .LASF30\r
- 1286 0193 03                  .byte   0x3\r
- 1287 0194 99                  .byte   0x99\r
- 1288 0195 AB010000            .4byte  0x1ab\r
- 1289 0199 02                  .byte   0x2\r
- 1290 019a 23                  .byte   0x23\r
- 1291 019b 04                  .uleb128 0x4\r
- 1292 019c 07                  .uleb128 0x7\r
- 1293 019d 00000000            .4byte  .LASF31\r
- 1294 01a1 03                  .byte   0x3\r
- 1295 01a2 9A                  .byte   0x9a\r
- 1296 01a3 B1010000            .4byte  0x1b1\r
- 1297 01a7 02                  .byte   0x2\r
- 1298 01a8 23                  .byte   0x23\r
- 1299 01a9 08                  .uleb128 0x8\r
- 1300 01aa 00                  .byte   0\r
- 1301 01ab 08                  .uleb128 0x8\r
- 1302 01ac 04                  .byte   0x4\r
- 1303 01ad A5000000            .4byte  0xa5\r
- 1304 01b1 08                  .uleb128 0x8\r
- 1305 01b2 04                  .byte   0x4\r
- 1306 01b3 6D010000            .4byte  0x16d\r
- 1307 01b7 04                  .uleb128 0x4\r
- 1308 01b8 9F030000            .4byte  .LASF32\r
- 1309 01bc 03                  .byte   0x3\r
- 1310 01bd 9B                  .byte   0x9b\r
- 1311 01be 78010000            .4byte  0x178\r
- 1312 01c2 09                  .uleb128 0x9\r
- 1313 01c3 01                  .byte   0x1\r
- 1314 01c4 83000000            .4byte  .LASF77\r
- 1315 01c8 01                  .byte   0x1\r
- 1316 01c9 C701                .2byte  0x1c7\r
- 1317 01cb 01                  .byte   0x1\r
- 1318 01cc 01                  .byte   0x1\r
- 1319 01cd 0A                  .uleb128 0xa\r
- 1320 01ce 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 40\r
-\r
-\r
- 1321 01cf BB010000            .4byte  .LASF33\r
- 1322 01d3 01                  .byte   0x1\r
- 1323 01d4 3301                .2byte  0x133\r
- 1324 01d6 01                  .byte   0x1\r
- 1325 01d7 00000000            .4byte  .LFB4\r
- 1326 01db 94000000            .4byte  .LFE4\r
- 1327 01df 02                  .byte   0x2\r
- 1328 01e0 7D                  .byte   0x7d\r
- 1329 01e1 00                  .sleb128 0\r
- 1330 01e2 01                  .byte   0x1\r
- 1331 01e3 F8010000            .4byte  0x1f8\r
- 1332 01e7 0B                  .uleb128 0xb\r
- 1333 01e8 EB010000            .4byte  .LASF35\r
- 1334 01ec 01                  .byte   0x1\r
- 1335 01ed 3501                .2byte  0x135\r
- 1336 01ef 6F000000            .4byte  0x6f\r
- 1337 01f3 00000000            .4byte  .LLST0\r
- 1338 01f7 00                  .byte   0\r
- 1339 01f8 0C                  .uleb128 0xc\r
- 1340 01f9 01                  .byte   0x1\r
- 1341 01fa 37050000            .4byte  .LASF37\r
- 1342 01fe 01                  .byte   0x1\r
- 1343 01ff A501                .2byte  0x1a5\r
- 1344 0201 01                  .byte   0x1\r
- 1345 0202 6F000000            .4byte  0x6f\r
- 1346 0206 00000000            .4byte  .LFB6\r
- 1347 020a 34000000            .4byte  .LFE6\r
- 1348 020e 02                  .byte   0x2\r
- 1349 020f 7D                  .byte   0x7d\r
- 1350 0210 00                  .sleb128 0\r
- 1351 0211 01                  .byte   0x1\r
- 1352 0212 0D                  .uleb128 0xd\r
- 1353 0213 C2010000            .4byte  0x1c2\r
- 1354 0217 00000000            .4byte  .LFB7\r
- 1355 021b 04000000            .4byte  .LFE7\r
- 1356 021f 02                  .byte   0x2\r
- 1357 0220 7D                  .byte   0x7d\r
- 1358 0221 00                  .sleb128 0\r
- 1359 0222 01                  .byte   0x1\r
- 1360 0223 32020000            .4byte  0x232\r
- 1361 0227 0E                  .uleb128 0xe\r
- 1362 0228 04000000            .4byte  .LVL2\r
- 1363 022c 01                  .byte   0x1\r
- 1364 022d CD010000            .4byte  0x1cd\r
- 1365 0231 00                  .byte   0\r
- 1366 0232 0F                  .uleb128 0xf\r
- 1367 0233 01                  .byte   0x1\r
- 1368 0234 47040000            .4byte  .LASF34\r
- 1369 0238 01                  .byte   0x1\r
- 1370 0239 3E02                .2byte  0x23e\r
- 1371 023b 01                  .byte   0x1\r
- 1372 023c 00000000            .4byte  .LFB10\r
- 1373 0240 74000000            .4byte  .LFE10\r
- 1374 0244 14000000            .4byte  .LLST1\r
- 1375 0248 01                  .byte   0x1\r
- 1376 0249 6E020000            .4byte  0x26e\r
- 1377 024d 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 41\r
-\r
-\r
- 1378 024e EB010000            .4byte  .LASF35\r
- 1379 0252 01                  .byte   0x1\r
- 1380 0253 4002                .2byte  0x240\r
- 1381 0255 6F000000            .4byte  0x6f\r
- 1382 0259 34000000            .4byte  .LLST2\r
- 1383 025d 0B                  .uleb128 0xb\r
- 1384 025e 39000000            .4byte  .LASF36\r
- 1385 0262 01                  .byte   0x1\r
- 1386 0263 4102                .2byte  0x241\r
- 1387 0265 6F000000            .4byte  0x6f\r
- 1388 0269 6A000000            .4byte  .LLST3\r
- 1389 026d 00                  .byte   0\r
- 1390 026e 0C                  .uleb128 0xc\r
- 1391 026f 01                  .byte   0x1\r
- 1392 0270 0A040000            .4byte  .LASF38\r
- 1393 0274 01                  .byte   0x1\r
- 1394 0275 8F02                .2byte  0x28f\r
- 1395 0277 01                  .byte   0x1\r
- 1396 0278 6F000000            .4byte  0x6f\r
- 1397 027c 00000000            .4byte  .LFB12\r
- 1398 0280 2C000000            .4byte  .LFE12\r
- 1399 0284 02                  .byte   0x2\r
- 1400 0285 7D                  .byte   0x7d\r
- 1401 0286 00                  .sleb128 0\r
- 1402 0287 01                  .byte   0x1\r
- 1403 0288 0A                  .uleb128 0xa\r
- 1404 0289 01                  .byte   0x1\r
- 1405 028a 91010000            .4byte  .LASF39\r
- 1406 028e 01                  .byte   0x1\r
- 1407 028f DD02                .2byte  0x2dd\r
- 1408 0291 01                  .byte   0x1\r
- 1409 0292 00000000            .4byte  .LFB14\r
- 1410 0296 20000000            .4byte  .LFE14\r
- 1411 029a 02                  .byte   0x2\r
- 1412 029b 7D                  .byte   0x7d\r
- 1413 029c 00                  .sleb128 0\r
- 1414 029d 01                  .byte   0x1\r
- 1415 029e B3020000            .4byte  0x2b3\r
- 1416 02a2 10                  .uleb128 0x10\r
- 1417 02a3 42000000            .4byte  .LASF78\r
- 1418 02a7 01                  .byte   0x1\r
- 1419 02a8 DD02                .2byte  0x2dd\r
- 1420 02aa 6F000000            .4byte  0x6f\r
- 1421 02ae 7E000000            .4byte  .LLST4\r
- 1422 02b2 00                  .byte   0\r
- 1423 02b3 0F                  .uleb128 0xf\r
- 1424 02b4 01                  .byte   0x1\r
- 1425 02b5 EB030000            .4byte  .LASF40\r
- 1426 02b9 01                  .byte   0x1\r
- 1427 02ba B302                .2byte  0x2b3\r
- 1428 02bc 01                  .byte   0x1\r
- 1429 02bd 00000000            .4byte  .LFB13\r
- 1430 02c1 3C000000            .4byte  .LFE13\r
- 1431 02c5 AB000000            .4byte  .LLST5\r
- 1432 02c9 01                  .byte   0x1\r
- 1433 02ca DE020000            .4byte  0x2de\r
- 1434 02ce 11                  .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 42\r
-\r
-\r
- 1435 02cf 22000000            .4byte  .LVL14\r
- 1436 02d3 88020000            .4byte  0x288\r
- 1437 02d7 12                  .uleb128 0x12\r
- 1438 02d8 01                  .byte   0x1\r
- 1439 02d9 50                  .byte   0x50\r
- 1440 02da 01                  .byte   0x1\r
- 1441 02db 31                  .byte   0x31\r
- 1442 02dc 00                  .byte   0\r
- 1443 02dd 00                  .byte   0\r
- 1444 02de 0F                  .uleb128 0xf\r
- 1445 02df 01                  .byte   0x1\r
- 1446 02e0 5B050000            .4byte  .LASF41\r
- 1447 02e4 01                  .byte   0x1\r
- 1448 02e5 6D02                .2byte  0x26d\r
- 1449 02e7 01                  .byte   0x1\r
- 1450 02e8 00000000            .4byte  .LFB11\r
- 1451 02ec 20000000            .4byte  .LFE11\r
- 1452 02f0 CB000000            .4byte  .LLST6\r
- 1453 02f4 01                  .byte   0x1\r
- 1454 02f5 09030000            .4byte  0x309\r
- 1455 02f9 11                  .uleb128 0x11\r
- 1456 02fa 0E000000            .4byte  .LVL15\r
- 1457 02fe 88020000            .4byte  0x288\r
- 1458 0302 12                  .uleb128 0x12\r
- 1459 0303 01                  .byte   0x1\r
- 1460 0304 50                  .byte   0x50\r
- 1461 0305 01                  .byte   0x1\r
- 1462 0306 31                  .byte   0x31\r
- 1463 0307 00                  .byte   0\r
- 1464 0308 00                  .byte   0\r
- 1465 0309 13                  .uleb128 0x13\r
- 1466 030a 01                  .byte   0x1\r
- 1467 030b DC010000            .4byte  .LASF42\r
- 1468 030f 01                  .byte   0x1\r
- 1469 0310 CF                  .byte   0xcf\r
- 1470 0311 01                  .byte   0x1\r
- 1471 0312 00000000            .4byte  .LFB2\r
- 1472 0316 24000000            .4byte  .LFE2\r
- 1473 031a 02                  .byte   0x2\r
- 1474 031b 7D                  .byte   0x7d\r
- 1475 031c 00                  .sleb128 0\r
- 1476 031d 01                  .byte   0x1\r
- 1477 031e 55030000            .4byte  0x355\r
- 1478 0322 14                  .uleb128 0x14\r
- 1479 0323 C2010000            .4byte  0x1c2\r
- 1480 0327 10000000            .4byte  .LBB4\r
- 1481 032b 14000000            .4byte  .LBE4\r
- 1482 032f 01                  .byte   0x1\r
- 1483 0330 D6                  .byte   0xd6\r
- 1484 0331 40030000            .4byte  0x340\r
- 1485 0335 0E                  .uleb128 0xe\r
- 1486 0336 14000000            .4byte  .LVL16\r
- 1487 033a 01                  .byte   0x1\r
- 1488 033b CD010000            .4byte  0x1cd\r
- 1489 033f 00                  .byte   0\r
- 1490 0340 0E                  .uleb128 0xe\r
- 1491 0341 18000000            .4byte  .LVL17\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 43\r
-\r
-\r
- 1492 0345 01                  .byte   0x1\r
- 1493 0346 DE020000            .4byte  0x2de\r
- 1494 034a 0E                  .uleb128 0xe\r
- 1495 034b 1C000000            .4byte  .LVL18\r
- 1496 034f 01                  .byte   0x1\r
- 1497 0350 B3020000            .4byte  0x2b3\r
- 1498 0354 00                  .byte   0\r
- 1499 0355 0F                  .uleb128 0xf\r
- 1500 0356 01                  .byte   0x1\r
- 1501 0357 67010000            .4byte  .LASF43\r
- 1502 035b 01                  .byte   0x1\r
- 1503 035c E401                .2byte  0x1e4\r
- 1504 035e 01                  .byte   0x1\r
- 1505 035f 00000000            .4byte  .LFB8\r
- 1506 0363 34000000            .4byte  .LFE8\r
- 1507 0367 EB000000            .4byte  .LLST7\r
- 1508 036b 01                  .byte   0x1\r
- 1509 036c 80030000            .4byte  0x380\r
- 1510 0370 11                  .uleb128 0x11\r
- 1511 0371 1C000000            .4byte  .LVL19\r
- 1512 0375 88020000            .4byte  0x288\r
- 1513 0379 12                  .uleb128 0x12\r
- 1514 037a 01                  .byte   0x1\r
- 1515 037b 50                  .byte   0x50\r
- 1516 037c 01                  .byte   0x1\r
- 1517 037d 31                  .byte   0x31\r
- 1518 037e 00                  .byte   0\r
- 1519 037f 00                  .byte   0\r
- 1520 0380 15                  .uleb128 0x15\r
- 1521 0381 01                  .byte   0x1\r
- 1522 0382 8A020000            .4byte  .LASF44\r
- 1523 0386 01                  .byte   0x1\r
- 1524 0387 F5                  .byte   0xf5\r
- 1525 0388 01                  .byte   0x1\r
- 1526 0389 00000000            .4byte  .LFB3\r
- 1527 038d 38000000            .4byte  .LFE3\r
- 1528 0391 0B010000            .4byte  .LLST8\r
- 1529 0395 01                  .byte   0x1\r
- 1530 0396 BE030000            .4byte  0x3be\r
- 1531 039a 0E                  .uleb128 0xe\r
- 1532 039b 1A000000            .4byte  .LVL20\r
- 1533 039f 01                  .byte   0x1\r
- 1534 03a0 55030000            .4byte  0x355\r
- 1535 03a4 0E                  .uleb128 0xe\r
- 1536 03a5 22000000            .4byte  .LVL21\r
- 1537 03a9 01                  .byte   0x1\r
- 1538 03aa 32020000            .4byte  0x232\r
- 1539 03ae 11                  .uleb128 0x11\r
- 1540 03af 28000000            .4byte  .LVL22\r
- 1541 03b3 88020000            .4byte  0x288\r
- 1542 03b7 12                  .uleb128 0x12\r
- 1543 03b8 01                  .byte   0x1\r
- 1544 03b9 50                  .byte   0x50\r
- 1545 03ba 01                  .byte   0x1\r
- 1546 03bb 33                  .byte   0x33\r
- 1547 03bc 00                  .byte   0\r
- 1548 03bd 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 44\r
-\r
-\r
- 1549 03be 15                  .uleb128 0x15\r
- 1550 03bf 01                  .byte   0x1\r
- 1551 03c0 CD040000            .4byte  .LASF45\r
- 1552 03c4 01                  .byte   0x1\r
- 1553 03c5 97                  .byte   0x97\r
- 1554 03c6 01                  .byte   0x1\r
- 1555 03c7 00000000            .4byte  .LFB1\r
- 1556 03cb 54000000            .4byte  .LFE1\r
- 1557 03cf 2B010000            .4byte  .LLST9\r
- 1558 03d3 01                  .byte   0x1\r
- 1559 03d4 16040000            .4byte  0x416\r
- 1560 03d8 16                  .uleb128 0x16\r
- 1561 03d9 7A040000            .4byte  .LASF46\r
- 1562 03dd 01                  .byte   0x1\r
- 1563 03de 99                  .byte   0x99\r
- 1564 03df 6F000000            .4byte  0x6f\r
- 1565 03e3 4B010000            .4byte  .LLST10\r
- 1566 03e7 17                  .uleb128 0x17\r
- 1567 03e8 1A000000            .4byte  .LVL26\r
- 1568 03ec 88020000            .4byte  0x288\r
- 1569 03f0 FA030000            .4byte  0x3fa\r
- 1570 03f4 12                  .uleb128 0x12\r
- 1571 03f5 01                  .byte   0x1\r
- 1572 03f6 50                  .byte   0x50\r
- 1573 03f7 01                  .byte   0x1\r
- 1574 03f8 32                  .byte   0x32\r
- 1575 03f9 00                  .byte   0\r
- 1576 03fa 18                  .uleb128 0x18\r
- 1577 03fb 30000000            .4byte  .LVL27\r
- 1578 03ff 8C060000            .4byte  0x68c\r
- 1579 0403 18                  .uleb128 0x18\r
- 1580 0404 36000000            .4byte  .LVL29\r
- 1581 0408 9A060000            .4byte  0x69a\r
- 1582 040c 18                  .uleb128 0x18\r
- 1583 040d 3C000000            .4byte  .LVL31\r
- 1584 0411 A8060000            .4byte  0x6a8\r
- 1585 0415 00                  .byte   0\r
- 1586 0416 15                  .uleb128 0x15\r
- 1587 0417 01                  .byte   0x1\r
- 1588 0418 1A000000            .4byte  .LASF47\r
- 1589 041c 01                  .byte   0x1\r
- 1590 041d 42                  .byte   0x42\r
- 1591 041e 01                  .byte   0x1\r
- 1592 041f 00000000            .4byte  .LFB0\r
- 1593 0423 A0000000            .4byte  .LFE0\r
- 1594 0427 8A010000            .4byte  .LLST11\r
- 1595 042b 01                  .byte   0x1\r
- 1596 042c 6A040000            .4byte  0x46a\r
- 1597 0430 16                  .uleb128 0x16\r
- 1598 0431 26010000            .4byte  .LASF48\r
- 1599 0435 01                  .byte   0x1\r
- 1600 0436 44                  .byte   0x44\r
- 1601 0437 6F000000            .4byte  0x6f\r
- 1602 043b AA010000            .4byte  .LLST12\r
- 1603 043f 16                  .uleb128 0x16\r
- 1604 0440 C3040000            .4byte  .LASF49\r
- 1605 0444 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 45\r
-\r
-\r
- 1606 0445 45                  .byte   0x45\r
- 1607 0446 6F000000            .4byte  0x6f\r
- 1608 044a F9010000            .4byte  .LLST13\r
- 1609 044e 18                  .uleb128 0x18\r
- 1610 044f 24000000            .4byte  .LVL35\r
- 1611 0453 BE030000            .4byte  0x3be\r
- 1612 0457 18                  .uleb128 0x18\r
- 1613 0458 3A000000            .4byte  .LVL37\r
- 1614 045c 09030000            .4byte  0x309\r
- 1615 0460 18                  .uleb128 0x18\r
- 1616 0461 48000000            .4byte  .LVL40\r
- 1617 0465 80030000            .4byte  0x380\r
- 1618 0469 00                  .byte   0\r
- 1619 046a 19                  .uleb128 0x19\r
- 1620 046b 01                  .byte   0x1\r
- 1621 046c 79030000            .4byte  .LASF79\r
- 1622 0470 01                  .byte   0x1\r
- 1623 0471 0203                .2byte  0x302\r
- 1624 0473 01                  .byte   0x1\r
- 1625 0474 00000000            .4byte  .LFB15\r
- 1626 0478 20000000            .4byte  .LFE15\r
- 1627 047c 02                  .byte   0x2\r
- 1628 047d 7D                  .byte   0x7d\r
- 1629 047e 00                  .sleb128 0\r
- 1630 047f 01                  .byte   0x1\r
- 1631 0480 1A                  .uleb128 0x1a\r
- 1632 0481 01                  .byte   0x1\r
- 1633 0482 D8020000            .4byte  .LASF51\r
- 1634 0486 01                  .byte   0x1\r
- 1635 0487 0702                .2byte  0x207\r
- 1636 0489 01                  .byte   0x1\r
- 1637 048a 6F000000            .4byte  0x6f\r
- 1638 048e 00000000            .4byte  .LFB9\r
- 1639 0492 48000000            .4byte  .LFE9\r
- 1640 0496 23020000            .4byte  .LLST14\r
- 1641 049a 01                  .byte   0x1\r
- 1642 049b B9040000            .4byte  0x4b9\r
- 1643 049f 0B                  .uleb128 0xb\r
- 1644 04a0 FE040000            .4byte  .LASF50\r
- 1645 04a4 01                  .byte   0x1\r
- 1646 04a5 0902                .2byte  0x209\r
- 1647 04a7 7A000000            .4byte  0x7a\r
- 1648 04ab 43020000            .4byte  .LLST15\r
- 1649 04af 18                  .uleb128 0x18\r
- 1650 04b0 12000000            .4byte  .LVL51\r
- 1651 04b4 6A040000            .4byte  0x46a\r
- 1652 04b8 00                  .byte   0\r
- 1653 04b9 1A                  .uleb128 0x1a\r
- 1654 04ba 01                  .byte   0x1\r
- 1655 04bb 51000000            .4byte  .LASF52\r
- 1656 04bf 01                  .byte   0x1\r
- 1657 04c0 7101                .2byte  0x171\r
- 1658 04c2 01                  .byte   0x1\r
- 1659 04c3 6F000000            .4byte  0x6f\r
- 1660 04c7 00000000            .4byte  .LFB5\r
- 1661 04cb 50000000            .4byte  .LFE5\r
- 1662 04cf 56020000            .4byte  .LLST16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 46\r
-\r
-\r
- 1663 04d3 01                  .byte   0x1\r
- 1664 04d4 04050000            .4byte  0x504\r
- 1665 04d8 0B                  .uleb128 0xb\r
- 1666 04d9 FE040000            .4byte  .LASF50\r
- 1667 04dd 01                  .byte   0x1\r
- 1668 04de 7301                .2byte  0x173\r
- 1669 04e0 7A000000            .4byte  0x7a\r
- 1670 04e4 76020000            .4byte  .LLST17\r
- 1671 04e8 18                  .uleb128 0x18\r
- 1672 04e9 0E000000            .4byte  .LVL54\r
- 1673 04ed F8010000            .4byte  0x1f8\r
- 1674 04f1 18                  .uleb128 0x18\r
- 1675 04f2 20000000            .4byte  .LVL55\r
- 1676 04f6 6A040000            .4byte  0x46a\r
- 1677 04fa 18                  .uleb128 0x18\r
- 1678 04fb 3A000000            .4byte  .LVL57\r
- 1679 04ff CD010000            .4byte  0x1cd\r
- 1680 0503 00                  .byte   0\r
- 1681 0504 1B                  .uleb128 0x1b\r
- 1682 0505 2A040000            .4byte  .LASF53\r
- 1683 0509 01                  .byte   0x1\r
- 1684 050a 22                  .byte   0x22\r
- 1685 050b A5000000            .4byte  0xa5\r
- 1686 050f 01                  .byte   0x1\r
- 1687 0510 05                  .byte   0x5\r
- 1688 0511 03                  .byte   0x3\r
- 1689 0512 00000000            .4byte  USBFS_device\r
- 1690 0516 1B                  .uleb128 0x1b\r
- 1691 0517 57030000            .4byte  .LASF54\r
- 1692 051b 01                  .byte   0x1\r
- 1693 051c 2C                  .byte   0x2c\r
- 1694 051d A5000000            .4byte  0xa5\r
- 1695 0521 01                  .byte   0x1\r
- 1696 0522 05                  .byte   0x5\r
- 1697 0523 03                  .byte   0x3\r
- 1698 0524 00000000            .4byte  USBFS_transferState\r
- 1699 0528 1B                  .uleb128 0x1b\r
- 1700 0529 35010000            .4byte  .LASF55\r
- 1701 052d 01                  .byte   0x1\r
- 1702 052e 1A                  .byte   0x1a\r
- 1703 052f A5000000            .4byte  0xa5\r
- 1704 0533 01                  .byte   0x1\r
- 1705 0534 05                  .byte   0x5\r
- 1706 0535 03                  .byte   0x3\r
- 1707 0536 00000000            .4byte  USBFS_configuration\r
- 1708 053a 1B                  .uleb128 0x1b\r
- 1709 053b 16020000            .4byte  .LASF56\r
- 1710 053f 01                  .byte   0x1\r
- 1711 0540 1C                  .byte   0x1c\r
- 1712 0541 A5000000            .4byte  0xa5\r
- 1713 0545 01                  .byte   0x1\r
- 1714 0546 05                  .byte   0x5\r
- 1715 0547 03                  .byte   0x3\r
- 1716 0548 00000000            .4byte  USBFS_configurationChanged\r
- 1717 054c 1B                  .uleb128 0x1b\r
- 1718 054d 94040000            .4byte  .LASF57\r
- 1719 0551 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 47\r
-\r
-\r
- 1720 0552 1E                  .byte   0x1e\r
- 1721 0553 A5000000            .4byte  0xa5\r
- 1722 0557 01                  .byte   0x1\r
- 1723 0558 05                  .byte   0x5\r
- 1724 0559 03                  .byte   0x3\r
- 1725 055a 00000000            .4byte  USBFS_deviceStatus\r
- 1726 055e 1B                  .uleb128 0x1b\r
- 1727 055f CC000000            .4byte  .LASF58\r
- 1728 0563 01                  .byte   0x1\r
- 1729 0564 1B                  .byte   0x1b\r
- 1730 0565 A5000000            .4byte  0xa5\r
- 1731 0569 01                  .byte   0x1\r
- 1732 056a 05                  .byte   0x5\r
- 1733 056b 03                  .byte   0x3\r
- 1734 056c 00000000            .4byte  USBFS_interfaceNumber\r
- 1735 0570 1C                  .uleb128 0x1c\r
- 1736 0571 6F000000            .4byte  0x6f\r
- 1737 0575 80050000            .4byte  0x580\r
- 1738 0579 1D                  .uleb128 0x1d\r
- 1739 057a AF000000            .4byte  0xaf\r
- 1740 057e 00                  .byte   0\r
- 1741 057f 00                  .byte   0\r
- 1742 0580 1B                  .uleb128 0x1b\r
- 1743 0581 BF030000            .4byte  .LASF59\r
- 1744 0585 01                  .byte   0x1\r
- 1745 0586 1F                  .byte   0x1f\r
- 1746 0587 92050000            .4byte  0x592\r
- 1747 058b 01                  .byte   0x1\r
- 1748 058c 05                  .byte   0x5\r
- 1749 058d 03                  .byte   0x3\r
- 1750 058e 00000000            .4byte  USBFS_interfaceSetting\r
- 1751 0592 05                  .uleb128 0x5\r
- 1752 0593 70050000            .4byte  0x570\r
- 1753 0597 1B                  .uleb128 0x1b\r
- 1754 0598 A7040000            .4byte  .LASF60\r
- 1755 059c 01                  .byte   0x1\r
- 1756 059d 20                  .byte   0x20\r
- 1757 059e A9050000            .4byte  0x5a9\r
- 1758 05a2 01                  .byte   0x1\r
- 1759 05a3 05                  .byte   0x5\r
- 1760 05a4 03                  .byte   0x3\r
- 1761 05a5 00000000            .4byte  USBFS_interfaceSetting_last\r
- 1762 05a9 05                  .uleb128 0x5\r
- 1763 05aa 70050000            .4byte  0x570\r
- 1764 05ae 1B                  .uleb128 0x1b\r
- 1765 05af B8000000            .4byte  .LASF61\r
- 1766 05b3 01                  .byte   0x1\r
- 1767 05b4 1D                  .byte   0x1d\r
- 1768 05b5 A5000000            .4byte  0xa5\r
- 1769 05b9 01                  .byte   0x1\r
- 1770 05ba 05                  .byte   0x5\r
- 1771 05bb 03                  .byte   0x3\r
- 1772 05bc 00000000            .4byte  USBFS_deviceAddress\r
- 1773 05c0 1B                  .uleb128 0x1b\r
- 1774 05c1 08050000            .4byte  .LASF62\r
- 1775 05c5 01                  .byte   0x1\r
- 1776 05c6 21                  .byte   0x21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 48\r
-\r
-\r
- 1777 05c7 D2050000            .4byte  0x5d2\r
- 1778 05cb 01                  .byte   0x1\r
- 1779 05cc 05                  .byte   0x5\r
- 1780 05cd 03                  .byte   0x3\r
- 1781 05ce 00000000            .4byte  USBFS_interfaceStatus\r
- 1782 05d2 05                  .uleb128 0x5\r
- 1783 05d3 70050000            .4byte  0x570\r
- 1784 05d7 1B                  .uleb128 0x1b\r
- 1785 05d8 62020000            .4byte  .LASF63\r
- 1786 05dc 01                  .byte   0x1\r
- 1787 05dd 23                  .byte   0x23\r
- 1788 05de E9050000            .4byte  0x5e9\r
- 1789 05e2 01                  .byte   0x1\r
- 1790 05e3 05                  .byte   0x5\r
- 1791 05e4 03                  .byte   0x3\r
- 1792 05e5 00000000            .4byte  USBFS_interfaceClass\r
- 1793 05e9 08                  .uleb128 0x8\r
- 1794 05ea 04                  .byte   0x4\r
- 1795 05eb EF050000            .4byte  0x5ef\r
- 1796 05ef 1E                  .uleb128 0x1e\r
- 1797 05f0 6F000000            .4byte  0x6f\r
- 1798 05f4 1C                  .uleb128 0x1c\r
- 1799 05f5 3D010000            .4byte  0x13d\r
- 1800 05f9 04060000            .4byte  0x604\r
- 1801 05fd 1D                  .uleb128 0x1d\r
- 1802 05fe AF000000            .4byte  0xaf\r
- 1803 0602 08                  .byte   0x8\r
- 1804 0603 00                  .byte   0\r
- 1805 0604 1B                  .uleb128 0x1b\r
- 1806 0605 00030000            .4byte  .LASF64\r
- 1807 0609 01                  .byte   0x1\r
- 1808 060a 19                  .byte   0x19\r
- 1809 060b 16060000            .4byte  0x616\r
- 1810 060f 01                  .byte   0x1\r
- 1811 0610 05                  .byte   0x5\r
- 1812 0611 03                  .byte   0x3\r
- 1813 0612 00000000            .4byte  USBFS_EP\r
- 1814 0616 05                  .uleb128 0x5\r
- 1815 0617 F4050000            .4byte  0x5f4\r
- 1816 061b 1B                  .uleb128 0x1b\r
- 1817 061c 29000000            .4byte  .LASF65\r
- 1818 0620 01                  .byte   0x1\r
- 1819 0621 2D                  .byte   0x2d\r
- 1820 0622 2D060000            .4byte  0x62d\r
- 1821 0626 01                  .byte   0x1\r
- 1822 0627 05                  .byte   0x5\r
- 1823 0628 03                  .byte   0x3\r
- 1824 0629 00000000            .4byte  USBFS_currentTD\r
- 1825 062d 05                  .uleb128 0x5\r
- 1826 062e B7010000            .4byte  0x1b7\r
- 1827 0632 1B                  .uleb128 0x1b\r
- 1828 0633 37040000            .4byte  .LASF66\r
- 1829 0637 01                  .byte   0x1\r
- 1830 0638 2A                  .byte   0x2a\r
- 1831 0639 A5000000            .4byte  0xa5\r
- 1832 063d 01                  .byte   0x1\r
- 1833 063e 05                  .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 49\r
-\r
-\r
- 1834 063f 03                  .byte   0x3\r
- 1835 0640 00000000            .4byte  USBFS_ep0Toggle\r
- 1836 0644 1B                  .uleb128 0x1b\r
- 1837 0645 AA030000            .4byte  .LASF67\r
- 1838 0649 01                  .byte   0x1\r
- 1839 064a 2B                  .byte   0x2b\r
- 1840 064b A5000000            .4byte  0xa5\r
- 1841 064f 01                  .byte   0x1\r
- 1842 0650 05                  .byte   0x5\r
- 1843 0651 03                  .byte   0x3\r
- 1844 0652 00000000            .4byte  USBFS_lastPacketSize\r
- 1845 0656 1B                  .uleb128 0x1b\r
- 1846 0657 9A020000            .4byte  .LASF68\r
- 1847 065b 01                  .byte   0x1\r
- 1848 065c 2E                  .byte   0x2e\r
- 1849 065d A5000000            .4byte  0xa5\r
- 1850 0661 01                  .byte   0x1\r
- 1851 0662 05                  .byte   0x5\r
- 1852 0663 03                  .byte   0x3\r
- 1853 0664 00000000            .4byte  USBFS_ep0Mode\r
- 1854 0668 1B                  .uleb128 0x1b\r
- 1855 0669 AF020000            .4byte  .LASF69\r
- 1856 066d 01                  .byte   0x1\r
- 1857 066e 2F                  .byte   0x2f\r
- 1858 066f A5000000            .4byte  0xa5\r
- 1859 0673 01                  .byte   0x1\r
- 1860 0674 05                  .byte   0x5\r
- 1861 0675 03                  .byte   0x3\r
- 1862 0676 00000000            .4byte  USBFS_ep0Count\r
- 1863 067a 1B                  .uleb128 0x1b\r
- 1864 067b F4010000            .4byte  .LASF70\r
- 1865 067f 01                  .byte   0x1\r
- 1866 0680 30                  .byte   0x30\r
- 1867 0681 AA000000            .4byte  0xaa\r
- 1868 0685 01                  .byte   0x1\r
- 1869 0686 05                  .byte   0x5\r
- 1870 0687 03                  .byte   0x3\r
- 1871 0688 00000000            .4byte  USBFS_transferByteCount\r
- 1872 068c 1F                  .uleb128 0x1f\r
- 1873 068d 01                  .byte   0x1\r
- 1874 068e 1E050000            .4byte  .LASF71\r
- 1875 0692 04                  .byte   0x4\r
- 1876 0693 B1                  .byte   0xb1\r
- 1877 0694 01                  .byte   0x1\r
- 1878 0695 6F000000            .4byte  0x6f\r
- 1879 0699 01                  .byte   0x1\r
- 1880 069a 1F                  .uleb128 0x1f\r
- 1881 069b 01                  .byte   0x1\r
- 1882 069c E6040000            .4byte  .LASF72\r
- 1883 06a0 04                  .byte   0x4\r
- 1884 06a1 B2                  .byte   0xb2\r
- 1885 06a2 01                  .byte   0x1\r
- 1886 06a3 6F000000            .4byte  0x6f\r
- 1887 06a7 01                  .byte   0x1\r
- 1888 06a8 1F                  .uleb128 0x1f\r
- 1889 06a9 01                  .byte   0x1\r
- 1890 06aa 50010000            .4byte  .LASF73\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 50\r
-\r
-\r
- 1891 06ae 04                  .byte   0x4\r
- 1892 06af B3                  .byte   0xb3\r
- 1893 06b0 01                  .byte   0x1\r
- 1894 06b1 6F000000            .4byte  0x6f\r
- 1895 06b5 01                  .byte   0x1\r
- 1896 06b6 00                  .byte   0\r
- 1897                          .section        .debug_abbrev,"",%progbits\r
- 1898                  .Ldebug_abbrev0:\r
- 1899 0000 01                  .uleb128 0x1\r
- 1900 0001 11                  .uleb128 0x11\r
- 1901 0002 01                  .byte   0x1\r
- 1902 0003 25                  .uleb128 0x25\r
- 1903 0004 0E                  .uleb128 0xe\r
- 1904 0005 13                  .uleb128 0x13\r
- 1905 0006 0B                  .uleb128 0xb\r
- 1906 0007 03                  .uleb128 0x3\r
- 1907 0008 0E                  .uleb128 0xe\r
- 1908 0009 1B                  .uleb128 0x1b\r
- 1909 000a 0E                  .uleb128 0xe\r
- 1910 000b 55                  .uleb128 0x55\r
- 1911 000c 06                  .uleb128 0x6\r
- 1912 000d 11                  .uleb128 0x11\r
- 1913 000e 01                  .uleb128 0x1\r
- 1914 000f 52                  .uleb128 0x52\r
- 1915 0010 01                  .uleb128 0x1\r
- 1916 0011 10                  .uleb128 0x10\r
- 1917 0012 06                  .uleb128 0x6\r
- 1918 0013 00                  .byte   0\r
- 1919 0014 00                  .byte   0\r
- 1920 0015 02                  .uleb128 0x2\r
- 1921 0016 24                  .uleb128 0x24\r
- 1922 0017 00                  .byte   0\r
- 1923 0018 0B                  .uleb128 0xb\r
- 1924 0019 0B                  .uleb128 0xb\r
- 1925 001a 3E                  .uleb128 0x3e\r
- 1926 001b 0B                  .uleb128 0xb\r
- 1927 001c 03                  .uleb128 0x3\r
- 1928 001d 0E                  .uleb128 0xe\r
- 1929 001e 00                  .byte   0\r
- 1930 001f 00                  .byte   0\r
- 1931 0020 03                  .uleb128 0x3\r
- 1932 0021 24                  .uleb128 0x24\r
- 1933 0022 00                  .byte   0\r
- 1934 0023 0B                  .uleb128 0xb\r
- 1935 0024 0B                  .uleb128 0xb\r
- 1936 0025 3E                  .uleb128 0x3e\r
- 1937 0026 0B                  .uleb128 0xb\r
- 1938 0027 03                  .uleb128 0x3\r
- 1939 0028 08                  .uleb128 0x8\r
- 1940 0029 00                  .byte   0\r
- 1941 002a 00                  .byte   0\r
- 1942 002b 04                  .uleb128 0x4\r
- 1943 002c 16                  .uleb128 0x16\r
- 1944 002d 00                  .byte   0\r
- 1945 002e 03                  .uleb128 0x3\r
- 1946 002f 0E                  .uleb128 0xe\r
- 1947 0030 3A                  .uleb128 0x3a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 51\r
-\r
-\r
- 1948 0031 0B                  .uleb128 0xb\r
- 1949 0032 3B                  .uleb128 0x3b\r
- 1950 0033 0B                  .uleb128 0xb\r
- 1951 0034 49                  .uleb128 0x49\r
- 1952 0035 13                  .uleb128 0x13\r
- 1953 0036 00                  .byte   0\r
- 1954 0037 00                  .byte   0\r
- 1955 0038 05                  .uleb128 0x5\r
- 1956 0039 35                  .uleb128 0x35\r
- 1957 003a 00                  .byte   0\r
- 1958 003b 49                  .uleb128 0x49\r
- 1959 003c 13                  .uleb128 0x13\r
- 1960 003d 00                  .byte   0\r
- 1961 003e 00                  .byte   0\r
- 1962 003f 06                  .uleb128 0x6\r
- 1963 0040 13                  .uleb128 0x13\r
- 1964 0041 01                  .byte   0x1\r
- 1965 0042 0B                  .uleb128 0xb\r
- 1966 0043 0B                  .uleb128 0xb\r
- 1967 0044 3A                  .uleb128 0x3a\r
- 1968 0045 0B                  .uleb128 0xb\r
- 1969 0046 3B                  .uleb128 0x3b\r
- 1970 0047 0B                  .uleb128 0xb\r
- 1971 0048 01                  .uleb128 0x1\r
- 1972 0049 13                  .uleb128 0x13\r
- 1973 004a 00                  .byte   0\r
- 1974 004b 00                  .byte   0\r
- 1975 004c 07                  .uleb128 0x7\r
- 1976 004d 0D                  .uleb128 0xd\r
- 1977 004e 00                  .byte   0\r
- 1978 004f 03                  .uleb128 0x3\r
- 1979 0050 0E                  .uleb128 0xe\r
- 1980 0051 3A                  .uleb128 0x3a\r
- 1981 0052 0B                  .uleb128 0xb\r
- 1982 0053 3B                  .uleb128 0x3b\r
- 1983 0054 0B                  .uleb128 0xb\r
- 1984 0055 49                  .uleb128 0x49\r
- 1985 0056 13                  .uleb128 0x13\r
- 1986 0057 38                  .uleb128 0x38\r
- 1987 0058 0A                  .uleb128 0xa\r
- 1988 0059 00                  .byte   0\r
- 1989 005a 00                  .byte   0\r
- 1990 005b 08                  .uleb128 0x8\r
- 1991 005c 0F                  .uleb128 0xf\r
- 1992 005d 00                  .byte   0\r
- 1993 005e 0B                  .uleb128 0xb\r
- 1994 005f 0B                  .uleb128 0xb\r
- 1995 0060 49                  .uleb128 0x49\r
- 1996 0061 13                  .uleb128 0x13\r
- 1997 0062 00                  .byte   0\r
- 1998 0063 00                  .byte   0\r
- 1999 0064 09                  .uleb128 0x9\r
- 2000 0065 2E                  .uleb128 0x2e\r
- 2001 0066 00                  .byte   0\r
- 2002 0067 3F                  .uleb128 0x3f\r
- 2003 0068 0C                  .uleb128 0xc\r
- 2004 0069 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 52\r
-\r
-\r
- 2005 006a 0E                  .uleb128 0xe\r
- 2006 006b 3A                  .uleb128 0x3a\r
- 2007 006c 0B                  .uleb128 0xb\r
- 2008 006d 3B                  .uleb128 0x3b\r
- 2009 006e 05                  .uleb128 0x5\r
- 2010 006f 27                  .uleb128 0x27\r
- 2011 0070 0C                  .uleb128 0xc\r
- 2012 0071 20                  .uleb128 0x20\r
- 2013 0072 0B                  .uleb128 0xb\r
- 2014 0073 00                  .byte   0\r
- 2015 0074 00                  .byte   0\r
- 2016 0075 0A                  .uleb128 0xa\r
- 2017 0076 2E                  .uleb128 0x2e\r
- 2018 0077 01                  .byte   0x1\r
- 2019 0078 3F                  .uleb128 0x3f\r
- 2020 0079 0C                  .uleb128 0xc\r
- 2021 007a 03                  .uleb128 0x3\r
- 2022 007b 0E                  .uleb128 0xe\r
- 2023 007c 3A                  .uleb128 0x3a\r
- 2024 007d 0B                  .uleb128 0xb\r
- 2025 007e 3B                  .uleb128 0x3b\r
- 2026 007f 05                  .uleb128 0x5\r
- 2027 0080 27                  .uleb128 0x27\r
- 2028 0081 0C                  .uleb128 0xc\r
- 2029 0082 11                  .uleb128 0x11\r
- 2030 0083 01                  .uleb128 0x1\r
- 2031 0084 12                  .uleb128 0x12\r
- 2032 0085 01                  .uleb128 0x1\r
- 2033 0086 40                  .uleb128 0x40\r
- 2034 0087 0A                  .uleb128 0xa\r
- 2035 0088 9742                .uleb128 0x2117\r
- 2036 008a 0C                  .uleb128 0xc\r
- 2037 008b 01                  .uleb128 0x1\r
- 2038 008c 13                  .uleb128 0x13\r
- 2039 008d 00                  .byte   0\r
- 2040 008e 00                  .byte   0\r
- 2041 008f 0B                  .uleb128 0xb\r
- 2042 0090 34                  .uleb128 0x34\r
- 2043 0091 00                  .byte   0\r
- 2044 0092 03                  .uleb128 0x3\r
- 2045 0093 0E                  .uleb128 0xe\r
- 2046 0094 3A                  .uleb128 0x3a\r
- 2047 0095 0B                  .uleb128 0xb\r
- 2048 0096 3B                  .uleb128 0x3b\r
- 2049 0097 05                  .uleb128 0x5\r
- 2050 0098 49                  .uleb128 0x49\r
- 2051 0099 13                  .uleb128 0x13\r
- 2052 009a 02                  .uleb128 0x2\r
- 2053 009b 06                  .uleb128 0x6\r
- 2054 009c 00                  .byte   0\r
- 2055 009d 00                  .byte   0\r
- 2056 009e 0C                  .uleb128 0xc\r
- 2057 009f 2E                  .uleb128 0x2e\r
- 2058 00a0 00                  .byte   0\r
- 2059 00a1 3F                  .uleb128 0x3f\r
- 2060 00a2 0C                  .uleb128 0xc\r
- 2061 00a3 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 53\r
-\r
-\r
- 2062 00a4 0E                  .uleb128 0xe\r
- 2063 00a5 3A                  .uleb128 0x3a\r
- 2064 00a6 0B                  .uleb128 0xb\r
- 2065 00a7 3B                  .uleb128 0x3b\r
- 2066 00a8 05                  .uleb128 0x5\r
- 2067 00a9 27                  .uleb128 0x27\r
- 2068 00aa 0C                  .uleb128 0xc\r
- 2069 00ab 49                  .uleb128 0x49\r
- 2070 00ac 13                  .uleb128 0x13\r
- 2071 00ad 11                  .uleb128 0x11\r
- 2072 00ae 01                  .uleb128 0x1\r
- 2073 00af 12                  .uleb128 0x12\r
- 2074 00b0 01                  .uleb128 0x1\r
- 2075 00b1 40                  .uleb128 0x40\r
- 2076 00b2 0A                  .uleb128 0xa\r
- 2077 00b3 9742                .uleb128 0x2117\r
- 2078 00b5 0C                  .uleb128 0xc\r
- 2079 00b6 00                  .byte   0\r
- 2080 00b7 00                  .byte   0\r
- 2081 00b8 0D                  .uleb128 0xd\r
- 2082 00b9 2E                  .uleb128 0x2e\r
- 2083 00ba 01                  .byte   0x1\r
- 2084 00bb 31                  .uleb128 0x31\r
- 2085 00bc 13                  .uleb128 0x13\r
- 2086 00bd 11                  .uleb128 0x11\r
- 2087 00be 01                  .uleb128 0x1\r
- 2088 00bf 12                  .uleb128 0x12\r
- 2089 00c0 01                  .uleb128 0x1\r
- 2090 00c1 40                  .uleb128 0x40\r
- 2091 00c2 0A                  .uleb128 0xa\r
- 2092 00c3 9742                .uleb128 0x2117\r
- 2093 00c5 0C                  .uleb128 0xc\r
- 2094 00c6 01                  .uleb128 0x1\r
- 2095 00c7 13                  .uleb128 0x13\r
- 2096 00c8 00                  .byte   0\r
- 2097 00c9 00                  .byte   0\r
- 2098 00ca 0E                  .uleb128 0xe\r
- 2099 00cb 898201              .uleb128 0x4109\r
- 2100 00ce 00                  .byte   0\r
- 2101 00cf 11                  .uleb128 0x11\r
- 2102 00d0 01                  .uleb128 0x1\r
- 2103 00d1 9542                .uleb128 0x2115\r
- 2104 00d3 0C                  .uleb128 0xc\r
- 2105 00d4 31                  .uleb128 0x31\r
- 2106 00d5 13                  .uleb128 0x13\r
- 2107 00d6 00                  .byte   0\r
- 2108 00d7 00                  .byte   0\r
- 2109 00d8 0F                  .uleb128 0xf\r
- 2110 00d9 2E                  .uleb128 0x2e\r
- 2111 00da 01                  .byte   0x1\r
- 2112 00db 3F                  .uleb128 0x3f\r
- 2113 00dc 0C                  .uleb128 0xc\r
- 2114 00dd 03                  .uleb128 0x3\r
- 2115 00de 0E                  .uleb128 0xe\r
- 2116 00df 3A                  .uleb128 0x3a\r
- 2117 00e0 0B                  .uleb128 0xb\r
- 2118 00e1 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 54\r
-\r
-\r
- 2119 00e2 05                  .uleb128 0x5\r
- 2120 00e3 27                  .uleb128 0x27\r
- 2121 00e4 0C                  .uleb128 0xc\r
- 2122 00e5 11                  .uleb128 0x11\r
- 2123 00e6 01                  .uleb128 0x1\r
- 2124 00e7 12                  .uleb128 0x12\r
- 2125 00e8 01                  .uleb128 0x1\r
- 2126 00e9 40                  .uleb128 0x40\r
- 2127 00ea 06                  .uleb128 0x6\r
- 2128 00eb 9742                .uleb128 0x2117\r
- 2129 00ed 0C                  .uleb128 0xc\r
- 2130 00ee 01                  .uleb128 0x1\r
- 2131 00ef 13                  .uleb128 0x13\r
- 2132 00f0 00                  .byte   0\r
- 2133 00f1 00                  .byte   0\r
- 2134 00f2 10                  .uleb128 0x10\r
- 2135 00f3 05                  .uleb128 0x5\r
- 2136 00f4 00                  .byte   0\r
- 2137 00f5 03                  .uleb128 0x3\r
- 2138 00f6 0E                  .uleb128 0xe\r
- 2139 00f7 3A                  .uleb128 0x3a\r
- 2140 00f8 0B                  .uleb128 0xb\r
- 2141 00f9 3B                  .uleb128 0x3b\r
- 2142 00fa 05                  .uleb128 0x5\r
- 2143 00fb 49                  .uleb128 0x49\r
- 2144 00fc 13                  .uleb128 0x13\r
- 2145 00fd 02                  .uleb128 0x2\r
- 2146 00fe 06                  .uleb128 0x6\r
- 2147 00ff 00                  .byte   0\r
- 2148 0100 00                  .byte   0\r
- 2149 0101 11                  .uleb128 0x11\r
- 2150 0102 898201              .uleb128 0x4109\r
- 2151 0105 01                  .byte   0x1\r
- 2152 0106 11                  .uleb128 0x11\r
- 2153 0107 01                  .uleb128 0x1\r
- 2154 0108 31                  .uleb128 0x31\r
- 2155 0109 13                  .uleb128 0x13\r
- 2156 010a 00                  .byte   0\r
- 2157 010b 00                  .byte   0\r
- 2158 010c 12                  .uleb128 0x12\r
- 2159 010d 8A8201              .uleb128 0x410a\r
- 2160 0110 00                  .byte   0\r
- 2161 0111 02                  .uleb128 0x2\r
- 2162 0112 0A                  .uleb128 0xa\r
- 2163 0113 9142                .uleb128 0x2111\r
- 2164 0115 0A                  .uleb128 0xa\r
- 2165 0116 00                  .byte   0\r
- 2166 0117 00                  .byte   0\r
- 2167 0118 13                  .uleb128 0x13\r
- 2168 0119 2E                  .uleb128 0x2e\r
- 2169 011a 01                  .byte   0x1\r
- 2170 011b 3F                  .uleb128 0x3f\r
- 2171 011c 0C                  .uleb128 0xc\r
- 2172 011d 03                  .uleb128 0x3\r
- 2173 011e 0E                  .uleb128 0xe\r
- 2174 011f 3A                  .uleb128 0x3a\r
- 2175 0120 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 55\r
-\r
-\r
- 2176 0121 3B                  .uleb128 0x3b\r
- 2177 0122 0B                  .uleb128 0xb\r
- 2178 0123 27                  .uleb128 0x27\r
- 2179 0124 0C                  .uleb128 0xc\r
- 2180 0125 11                  .uleb128 0x11\r
- 2181 0126 01                  .uleb128 0x1\r
- 2182 0127 12                  .uleb128 0x12\r
- 2183 0128 01                  .uleb128 0x1\r
- 2184 0129 40                  .uleb128 0x40\r
- 2185 012a 0A                  .uleb128 0xa\r
- 2186 012b 9742                .uleb128 0x2117\r
- 2187 012d 0C                  .uleb128 0xc\r
- 2188 012e 01                  .uleb128 0x1\r
- 2189 012f 13                  .uleb128 0x13\r
- 2190 0130 00                  .byte   0\r
- 2191 0131 00                  .byte   0\r
- 2192 0132 14                  .uleb128 0x14\r
- 2193 0133 1D                  .uleb128 0x1d\r
- 2194 0134 01                  .byte   0x1\r
- 2195 0135 31                  .uleb128 0x31\r
- 2196 0136 13                  .uleb128 0x13\r
- 2197 0137 11                  .uleb128 0x11\r
- 2198 0138 01                  .uleb128 0x1\r
- 2199 0139 12                  .uleb128 0x12\r
- 2200 013a 01                  .uleb128 0x1\r
- 2201 013b 58                  .uleb128 0x58\r
- 2202 013c 0B                  .uleb128 0xb\r
- 2203 013d 59                  .uleb128 0x59\r
- 2204 013e 0B                  .uleb128 0xb\r
- 2205 013f 01                  .uleb128 0x1\r
- 2206 0140 13                  .uleb128 0x13\r
- 2207 0141 00                  .byte   0\r
- 2208 0142 00                  .byte   0\r
- 2209 0143 15                  .uleb128 0x15\r
- 2210 0144 2E                  .uleb128 0x2e\r
- 2211 0145 01                  .byte   0x1\r
- 2212 0146 3F                  .uleb128 0x3f\r
- 2213 0147 0C                  .uleb128 0xc\r
- 2214 0148 03                  .uleb128 0x3\r
- 2215 0149 0E                  .uleb128 0xe\r
- 2216 014a 3A                  .uleb128 0x3a\r
- 2217 014b 0B                  .uleb128 0xb\r
- 2218 014c 3B                  .uleb128 0x3b\r
- 2219 014d 0B                  .uleb128 0xb\r
- 2220 014e 27                  .uleb128 0x27\r
- 2221 014f 0C                  .uleb128 0xc\r
- 2222 0150 11                  .uleb128 0x11\r
- 2223 0151 01                  .uleb128 0x1\r
- 2224 0152 12                  .uleb128 0x12\r
- 2225 0153 01                  .uleb128 0x1\r
- 2226 0154 40                  .uleb128 0x40\r
- 2227 0155 06                  .uleb128 0x6\r
- 2228 0156 9742                .uleb128 0x2117\r
- 2229 0158 0C                  .uleb128 0xc\r
- 2230 0159 01                  .uleb128 0x1\r
- 2231 015a 13                  .uleb128 0x13\r
- 2232 015b 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 56\r
-\r
-\r
- 2233 015c 00                  .byte   0\r
- 2234 015d 16                  .uleb128 0x16\r
- 2235 015e 34                  .uleb128 0x34\r
- 2236 015f 00                  .byte   0\r
- 2237 0160 03                  .uleb128 0x3\r
- 2238 0161 0E                  .uleb128 0xe\r
- 2239 0162 3A                  .uleb128 0x3a\r
- 2240 0163 0B                  .uleb128 0xb\r
- 2241 0164 3B                  .uleb128 0x3b\r
- 2242 0165 0B                  .uleb128 0xb\r
- 2243 0166 49                  .uleb128 0x49\r
- 2244 0167 13                  .uleb128 0x13\r
- 2245 0168 02                  .uleb128 0x2\r
- 2246 0169 06                  .uleb128 0x6\r
- 2247 016a 00                  .byte   0\r
- 2248 016b 00                  .byte   0\r
- 2249 016c 17                  .uleb128 0x17\r
- 2250 016d 898201              .uleb128 0x4109\r
- 2251 0170 01                  .byte   0x1\r
- 2252 0171 11                  .uleb128 0x11\r
- 2253 0172 01                  .uleb128 0x1\r
- 2254 0173 31                  .uleb128 0x31\r
- 2255 0174 13                  .uleb128 0x13\r
- 2256 0175 01                  .uleb128 0x1\r
- 2257 0176 13                  .uleb128 0x13\r
- 2258 0177 00                  .byte   0\r
- 2259 0178 00                  .byte   0\r
- 2260 0179 18                  .uleb128 0x18\r
- 2261 017a 898201              .uleb128 0x4109\r
- 2262 017d 00                  .byte   0\r
- 2263 017e 11                  .uleb128 0x11\r
- 2264 017f 01                  .uleb128 0x1\r
- 2265 0180 31                  .uleb128 0x31\r
- 2266 0181 13                  .uleb128 0x13\r
- 2267 0182 00                  .byte   0\r
- 2268 0183 00                  .byte   0\r
- 2269 0184 19                  .uleb128 0x19\r
- 2270 0185 2E                  .uleb128 0x2e\r
- 2271 0186 00                  .byte   0\r
- 2272 0187 3F                  .uleb128 0x3f\r
- 2273 0188 0C                  .uleb128 0xc\r
- 2274 0189 03                  .uleb128 0x3\r
- 2275 018a 0E                  .uleb128 0xe\r
- 2276 018b 3A                  .uleb128 0x3a\r
- 2277 018c 0B                  .uleb128 0xb\r
- 2278 018d 3B                  .uleb128 0x3b\r
- 2279 018e 05                  .uleb128 0x5\r
- 2280 018f 27                  .uleb128 0x27\r
- 2281 0190 0C                  .uleb128 0xc\r
- 2282 0191 11                  .uleb128 0x11\r
- 2283 0192 01                  .uleb128 0x1\r
- 2284 0193 12                  .uleb128 0x12\r
- 2285 0194 01                  .uleb128 0x1\r
- 2286 0195 40                  .uleb128 0x40\r
- 2287 0196 0A                  .uleb128 0xa\r
- 2288 0197 9742                .uleb128 0x2117\r
- 2289 0199 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 57\r
-\r
-\r
- 2290 019a 00                  .byte   0\r
- 2291 019b 00                  .byte   0\r
- 2292 019c 1A                  .uleb128 0x1a\r
- 2293 019d 2E                  .uleb128 0x2e\r
- 2294 019e 01                  .byte   0x1\r
- 2295 019f 3F                  .uleb128 0x3f\r
- 2296 01a0 0C                  .uleb128 0xc\r
- 2297 01a1 03                  .uleb128 0x3\r
- 2298 01a2 0E                  .uleb128 0xe\r
- 2299 01a3 3A                  .uleb128 0x3a\r
- 2300 01a4 0B                  .uleb128 0xb\r
- 2301 01a5 3B                  .uleb128 0x3b\r
- 2302 01a6 05                  .uleb128 0x5\r
- 2303 01a7 27                  .uleb128 0x27\r
- 2304 01a8 0C                  .uleb128 0xc\r
- 2305 01a9 49                  .uleb128 0x49\r
- 2306 01aa 13                  .uleb128 0x13\r
- 2307 01ab 11                  .uleb128 0x11\r
- 2308 01ac 01                  .uleb128 0x1\r
- 2309 01ad 12                  .uleb128 0x12\r
- 2310 01ae 01                  .uleb128 0x1\r
- 2311 01af 40                  .uleb128 0x40\r
- 2312 01b0 06                  .uleb128 0x6\r
- 2313 01b1 9742                .uleb128 0x2117\r
- 2314 01b3 0C                  .uleb128 0xc\r
- 2315 01b4 01                  .uleb128 0x1\r
- 2316 01b5 13                  .uleb128 0x13\r
- 2317 01b6 00                  .byte   0\r
- 2318 01b7 00                  .byte   0\r
- 2319 01b8 1B                  .uleb128 0x1b\r
- 2320 01b9 34                  .uleb128 0x34\r
- 2321 01ba 00                  .byte   0\r
- 2322 01bb 03                  .uleb128 0x3\r
- 2323 01bc 0E                  .uleb128 0xe\r
- 2324 01bd 3A                  .uleb128 0x3a\r
- 2325 01be 0B                  .uleb128 0xb\r
- 2326 01bf 3B                  .uleb128 0x3b\r
- 2327 01c0 0B                  .uleb128 0xb\r
- 2328 01c1 49                  .uleb128 0x49\r
- 2329 01c2 13                  .uleb128 0x13\r
- 2330 01c3 3F                  .uleb128 0x3f\r
- 2331 01c4 0C                  .uleb128 0xc\r
- 2332 01c5 02                  .uleb128 0x2\r
- 2333 01c6 0A                  .uleb128 0xa\r
- 2334 01c7 00                  .byte   0\r
- 2335 01c8 00                  .byte   0\r
- 2336 01c9 1C                  .uleb128 0x1c\r
- 2337 01ca 01                  .uleb128 0x1\r
- 2338 01cb 01                  .byte   0x1\r
- 2339 01cc 49                  .uleb128 0x49\r
- 2340 01cd 13                  .uleb128 0x13\r
- 2341 01ce 01                  .uleb128 0x1\r
- 2342 01cf 13                  .uleb128 0x13\r
- 2343 01d0 00                  .byte   0\r
- 2344 01d1 00                  .byte   0\r
- 2345 01d2 1D                  .uleb128 0x1d\r
- 2346 01d3 21                  .uleb128 0x21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 58\r
-\r
-\r
- 2347 01d4 00                  .byte   0\r
- 2348 01d5 49                  .uleb128 0x49\r
- 2349 01d6 13                  .uleb128 0x13\r
- 2350 01d7 2F                  .uleb128 0x2f\r
- 2351 01d8 0B                  .uleb128 0xb\r
- 2352 01d9 00                  .byte   0\r
- 2353 01da 00                  .byte   0\r
- 2354 01db 1E                  .uleb128 0x1e\r
- 2355 01dc 26                  .uleb128 0x26\r
- 2356 01dd 00                  .byte   0\r
- 2357 01de 49                  .uleb128 0x49\r
- 2358 01df 13                  .uleb128 0x13\r
- 2359 01e0 00                  .byte   0\r
- 2360 01e1 00                  .byte   0\r
- 2361 01e2 1F                  .uleb128 0x1f\r
- 2362 01e3 2E                  .uleb128 0x2e\r
- 2363 01e4 00                  .byte   0\r
- 2364 01e5 3F                  .uleb128 0x3f\r
- 2365 01e6 0C                  .uleb128 0xc\r
- 2366 01e7 03                  .uleb128 0x3\r
- 2367 01e8 0E                  .uleb128 0xe\r
- 2368 01e9 3A                  .uleb128 0x3a\r
- 2369 01ea 0B                  .uleb128 0xb\r
- 2370 01eb 3B                  .uleb128 0x3b\r
- 2371 01ec 0B                  .uleb128 0xb\r
- 2372 01ed 27                  .uleb128 0x27\r
- 2373 01ee 0C                  .uleb128 0xc\r
- 2374 01ef 49                  .uleb128 0x49\r
- 2375 01f0 13                  .uleb128 0x13\r
- 2376 01f1 3C                  .uleb128 0x3c\r
- 2377 01f2 0C                  .uleb128 0xc\r
- 2378 01f3 00                  .byte   0\r
- 2379 01f4 00                  .byte   0\r
- 2380 01f5 00                  .byte   0\r
- 2381                          .section        .debug_loc,"",%progbits\r
- 2382                  .Ldebug_loc0:\r
- 2383                  .LLST0:\r
- 2384 0000 00000000            .4byte  .LVL0\r
- 2385 0004 10000000            .4byte  .LVL1\r
- 2386 0008 0200                .2byte  0x2\r
- 2387 000a 30                  .byte   0x30\r
- 2388 000b 9F                  .byte   0x9f\r
- 2389 000c 00000000            .4byte  0\r
- 2390 0010 00000000            .4byte  0\r
- 2391                  .LLST1:\r
- 2392 0014 00000000            .4byte  .LFB10\r
- 2393 0018 02000000            .4byte  .LCFI0\r
- 2394 001c 0200                .2byte  0x2\r
- 2395 001e 7D                  .byte   0x7d\r
- 2396 001f 00                  .sleb128 0\r
- 2397 0020 02000000            .4byte  .LCFI0\r
- 2398 0024 74000000            .4byte  .LFE10\r
- 2399 0028 0200                .2byte  0x2\r
- 2400 002a 7D                  .byte   0x7d\r
- 2401 002b 08                  .sleb128 8\r
- 2402 002c 00000000            .4byte  0\r
- 2403 0030 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 59\r
-\r
-\r
- 2404                  .LLST2:\r
- 2405 0034 12000000            .4byte  .LVL4\r
- 2406 0038 14000000            .4byte  .LVL5\r
- 2407 003c 0100                .2byte  0x1\r
- 2408 003e 51                  .byte   0x51\r
- 2409 003f 14000000            .4byte  .LVL5\r
- 2410 0043 2C000000            .4byte  .LVL7\r
- 2411 0047 0100                .2byte  0x1\r
- 2412 0049 52                  .byte   0x52\r
- 2413 004a 2C000000            .4byte  .LVL7\r
- 2414 004e 32000000            .4byte  .LVL8\r
- 2415 0052 0300                .2byte  0x3\r
- 2416 0054 72                  .byte   0x72\r
- 2417 0055 01                  .sleb128 1\r
- 2418 0056 9F                  .byte   0x9f\r
- 2419 0057 36000000            .4byte  .LVL9\r
- 2420 005b 48000000            .4byte  .LVL10\r
- 2421 005f 0100                .2byte  0x1\r
- 2422 0061 52                  .byte   0x52\r
- 2423 0062 00000000            .4byte  0\r
- 2424 0066 00000000            .4byte  0\r
- 2425                  .LLST3:\r
- 2426 006a 00000000            .4byte  .LVL3\r
- 2427 006e 1A000000            .4byte  .LVL6\r
- 2428 0072 0200                .2byte  0x2\r
- 2429 0074 30                  .byte   0x30\r
- 2430 0075 9F                  .byte   0x9f\r
- 2431 0076 00000000            .4byte  0\r
- 2432 007a 00000000            .4byte  0\r
- 2433                  .LLST4:\r
- 2434 007e 00000000            .4byte  .LVL11\r
- 2435 0082 0E000000            .4byte  .LVL12\r
- 2436 0086 0100                .2byte  0x1\r
- 2437 0088 50                  .byte   0x50\r
- 2438 0089 0E000000            .4byte  .LVL12\r
- 2439 008d 10000000            .4byte  .LVL13\r
- 2440 0091 0200                .2byte  0x2\r
- 2441 0093 71                  .byte   0x71\r
- 2442 0094 00                  .sleb128 0\r
- 2443 0095 10000000            .4byte  .LVL13\r
- 2444 0099 20000000            .4byte  .LFE14\r
- 2445 009d 0400                .2byte  0x4\r
- 2446 009f F3                  .byte   0xf3\r
- 2447 00a0 01                  .uleb128 0x1\r
- 2448 00a1 50                  .byte   0x50\r
- 2449 00a2 9F                  .byte   0x9f\r
- 2450 00a3 00000000            .4byte  0\r
- 2451 00a7 00000000            .4byte  0\r
- 2452                  .LLST5:\r
- 2453 00ab 00000000            .4byte  .LFB13\r
- 2454 00af 02000000            .4byte  .LCFI1\r
- 2455 00b3 0200                .2byte  0x2\r
- 2456 00b5 7D                  .byte   0x7d\r
- 2457 00b6 00                  .sleb128 0\r
- 2458 00b7 02000000            .4byte  .LCFI1\r
- 2459 00bb 3C000000            .4byte  .LFE13\r
- 2460 00bf 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 60\r
-\r
-\r
- 2461 00c1 7D                  .byte   0x7d\r
- 2462 00c2 08                  .sleb128 8\r
- 2463 00c3 00000000            .4byte  0\r
- 2464 00c7 00000000            .4byte  0\r
- 2465                  .LLST6:\r
- 2466 00cb 00000000            .4byte  .LFB11\r
- 2467 00cf 02000000            .4byte  .LCFI2\r
- 2468 00d3 0200                .2byte  0x2\r
- 2469 00d5 7D                  .byte   0x7d\r
- 2470 00d6 00                  .sleb128 0\r
- 2471 00d7 02000000            .4byte  .LCFI2\r
- 2472 00db 20000000            .4byte  .LFE11\r
- 2473 00df 0200                .2byte  0x2\r
- 2474 00e1 7D                  .byte   0x7d\r
- 2475 00e2 08                  .sleb128 8\r
- 2476 00e3 00000000            .4byte  0\r
- 2477 00e7 00000000            .4byte  0\r
- 2478                  .LLST7:\r
- 2479 00eb 00000000            .4byte  .LFB8\r
- 2480 00ef 02000000            .4byte  .LCFI3\r
- 2481 00f3 0200                .2byte  0x2\r
- 2482 00f5 7D                  .byte   0x7d\r
- 2483 00f6 00                  .sleb128 0\r
- 2484 00f7 02000000            .4byte  .LCFI3\r
- 2485 00fb 34000000            .4byte  .LFE8\r
- 2486 00ff 0200                .2byte  0x2\r
- 2487 0101 7D                  .byte   0x7d\r
- 2488 0102 08                  .sleb128 8\r
- 2489 0103 00000000            .4byte  0\r
- 2490 0107 00000000            .4byte  0\r
- 2491                  .LLST8:\r
- 2492 010b 00000000            .4byte  .LFB3\r
- 2493 010f 02000000            .4byte  .LCFI4\r
- 2494 0113 0200                .2byte  0x2\r
- 2495 0115 7D                  .byte   0x7d\r
- 2496 0116 00                  .sleb128 0\r
- 2497 0117 02000000            .4byte  .LCFI4\r
- 2498 011b 38000000            .4byte  .LFE3\r
- 2499 011f 0200                .2byte  0x2\r
- 2500 0121 7D                  .byte   0x7d\r
- 2501 0122 08                  .sleb128 8\r
- 2502 0123 00000000            .4byte  0\r
- 2503 0127 00000000            .4byte  0\r
- 2504                  .LLST9:\r
- 2505 012b 00000000            .4byte  .LFB1\r
- 2506 012f 02000000            .4byte  .LCFI5\r
- 2507 0133 0200                .2byte  0x2\r
- 2508 0135 7D                  .byte   0x7d\r
- 2509 0136 00                  .sleb128 0\r
- 2510 0137 02000000            .4byte  .LCFI5\r
- 2511 013b 54000000            .4byte  .LFE1\r
- 2512 013f 0200                .2byte  0x2\r
- 2513 0141 7D                  .byte   0x7d\r
- 2514 0142 08                  .sleb128 8\r
- 2515 0143 00000000            .4byte  0\r
- 2516 0147 00000000            .4byte  0\r
- 2517                  .LLST10:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 61\r
-\r
-\r
- 2518 014b 06000000            .4byte  .LVL23\r
- 2519 014f 0A000000            .4byte  .LVL24\r
- 2520 0153 0100                .2byte  0x1\r
- 2521 0155 52                  .byte   0x52\r
- 2522 0156 0A000000            .4byte  .LVL24\r
- 2523 015a 16000000            .4byte  .LVL25\r
- 2524 015e 0100                .2byte  0x1\r
- 2525 0160 50                  .byte   0x50\r
- 2526 0161 30000000            .4byte  .LVL27\r
- 2527 0165 32000000            .4byte  .LVL28\r
- 2528 0169 0100                .2byte  0x1\r
- 2529 016b 50                  .byte   0x50\r
- 2530 016c 36000000            .4byte  .LVL29\r
- 2531 0170 38000000            .4byte  .LVL30\r
- 2532 0174 0100                .2byte  0x1\r
- 2533 0176 50                  .byte   0x50\r
- 2534 0177 3C000000            .4byte  .LVL31\r
- 2535 017b 3E000000            .4byte  .LVL32\r
- 2536 017f 0100                .2byte  0x1\r
- 2537 0181 50                  .byte   0x50\r
- 2538 0182 00000000            .4byte  0\r
- 2539 0186 00000000            .4byte  0\r
- 2540                  .LLST11:\r
- 2541 018a 00000000            .4byte  .LFB0\r
- 2542 018e 02000000            .4byte  .LCFI6\r
- 2543 0192 0200                .2byte  0x2\r
- 2544 0194 7D                  .byte   0x7d\r
- 2545 0195 00                  .sleb128 0\r
- 2546 0196 02000000            .4byte  .LCFI6\r
- 2547 019a A0000000            .4byte  .LFE0\r
- 2548 019e 0200                .2byte  0x2\r
- 2549 01a0 7D                  .byte   0x7d\r
- 2550 01a1 08                  .sleb128 8\r
- 2551 01a2 00000000            .4byte  0\r
- 2552 01a6 00000000            .4byte  0\r
- 2553                  .LLST12:\r
- 2554 01aa 08000000            .4byte  .LVL33\r
- 2555 01ae 23000000            .4byte  .LVL35-1\r
- 2556 01b2 0100                .2byte  0x1\r
- 2557 01b4 52                  .byte   0x52\r
- 2558 01b5 2E000000            .4byte  .LVL36\r
- 2559 01b9 39000000            .4byte  .LVL37-1\r
- 2560 01bd 0100                .2byte  0x1\r
- 2561 01bf 52                  .byte   0x52\r
- 2562 01c0 3C000000            .4byte  .LVL38\r
- 2563 01c4 42000000            .4byte  .LVL39\r
- 2564 01c8 0100                .2byte  0x1\r
- 2565 01ca 52                  .byte   0x52\r
- 2566 01cb 4C000000            .4byte  .LVL41\r
- 2567 01cf 4E000000            .4byte  .LVL42\r
- 2568 01d3 0100                .2byte  0x1\r
- 2569 01d5 51                  .byte   0x51\r
- 2570 01d6 5C000000            .4byte  .LVL43\r
- 2571 01da 66000000            .4byte  .LVL44\r
- 2572 01de 0100                .2byte  0x1\r
- 2573 01e0 53                  .byte   0x53\r
- 2574 01e1 6E000000            .4byte  .LVL46\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 62\r
-\r
-\r
- 2575 01e5 72000000            .4byte  .LVL47\r
- 2576 01e9 0600                .2byte  0x6\r
- 2577 01eb 70                  .byte   0x70\r
- 2578 01ec 00                  .sleb128 0\r
- 2579 01ed 09                  .byte   0x9\r
- 2580 01ee 80                  .byte   0x80\r
- 2581 01ef 1A                  .byte   0x1a\r
- 2582 01f0 9F                  .byte   0x9f\r
- 2583 01f1 00000000            .4byte  0\r
- 2584 01f5 00000000            .4byte  0\r
- 2585                  .LLST13:\r
- 2586 01f9 12000000            .4byte  .LVL34\r
- 2587 01fd 66000000            .4byte  .LVL44\r
- 2588 0201 0200                .2byte  0x2\r
- 2589 0203 31                  .byte   0x31\r
- 2590 0204 9F                  .byte   0x9f\r
- 2591 0205 6C000000            .4byte  .LVL45\r
- 2592 0209 78000000            .4byte  .LVL48\r
- 2593 020d 0100                .2byte  0x1\r
- 2594 020f 52                  .byte   0x52\r
- 2595 0210 80000000            .4byte  .LVL49\r
- 2596 0214 8A000000            .4byte  .LVL50\r
- 2597 0218 0100                .2byte  0x1\r
- 2598 021a 52                  .byte   0x52\r
- 2599 021b 00000000            .4byte  0\r
- 2600 021f 00000000            .4byte  0\r
- 2601                  .LLST14:\r
- 2602 0223 00000000            .4byte  .LFB9\r
- 2603 0227 02000000            .4byte  .LCFI7\r
- 2604 022b 0200                .2byte  0x2\r
- 2605 022d 7D                  .byte   0x7d\r
- 2606 022e 00                  .sleb128 0\r
- 2607 022f 02000000            .4byte  .LCFI7\r
- 2608 0233 48000000            .4byte  .LFE9\r
- 2609 0237 0200                .2byte  0x2\r
- 2610 0239 7D                  .byte   0x7d\r
- 2611 023a 08                  .sleb128 8\r
- 2612 023b 00000000            .4byte  0\r
- 2613 023f 00000000            .4byte  0\r
- 2614                  .LLST15:\r
- 2615 0243 22000000            .4byte  .LVL52\r
- 2616 0247 2E000000            .4byte  .LVL53\r
- 2617 024b 0100                .2byte  0x1\r
- 2618 024d 52                  .byte   0x52\r
- 2619 024e 00000000            .4byte  0\r
- 2620 0252 00000000            .4byte  0\r
- 2621                  .LLST16:\r
- 2622 0256 00000000            .4byte  .LFB5\r
- 2623 025a 02000000            .4byte  .LCFI8\r
- 2624 025e 0200                .2byte  0x2\r
- 2625 0260 7D                  .byte   0x7d\r
- 2626 0261 00                  .sleb128 0\r
- 2627 0262 02000000            .4byte  .LCFI8\r
- 2628 0266 50000000            .4byte  .LFE5\r
- 2629 026a 0200                .2byte  0x2\r
- 2630 026c 7D                  .byte   0x7d\r
- 2631 026d 08                  .sleb128 8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 63\r
-\r
-\r
- 2632 026e 00000000            .4byte  0\r
- 2633 0272 00000000            .4byte  0\r
- 2634                  .LLST17:\r
- 2635 0276 2C000000            .4byte  .LVL56\r
- 2636 027a 39000000            .4byte  .LVL57-1\r
- 2637 027e 0100                .2byte  0x1\r
- 2638 0280 51                  .byte   0x51\r
- 2639 0281 00000000            .4byte  0\r
- 2640 0285 00000000            .4byte  0\r
- 2641                          .section        .debug_aranges,"",%progbits\r
- 2642 0000 94000000            .4byte  0x94\r
- 2643 0004 0200                .2byte  0x2\r
- 2644 0006 00000000            .4byte  .Ldebug_info0\r
- 2645 000a 04                  .byte   0x4\r
- 2646 000b 00                  .byte   0\r
- 2647 000c 0000                .2byte  0\r
- 2648 000e 0000                .2byte  0\r
- 2649 0010 00000000            .4byte  .LFB4\r
- 2650 0014 94000000            .4byte  .LFE4-.LFB4\r
- 2651 0018 00000000            .4byte  .LFB6\r
- 2652 001c 34000000            .4byte  .LFE6-.LFB6\r
- 2653 0020 00000000            .4byte  .LFB7\r
- 2654 0024 04000000            .4byte  .LFE7-.LFB7\r
- 2655 0028 00000000            .4byte  .LFB10\r
- 2656 002c 74000000            .4byte  .LFE10-.LFB10\r
- 2657 0030 00000000            .4byte  .LFB12\r
- 2658 0034 2C000000            .4byte  .LFE12-.LFB12\r
- 2659 0038 00000000            .4byte  .LFB14\r
- 2660 003c 20000000            .4byte  .LFE14-.LFB14\r
- 2661 0040 00000000            .4byte  .LFB13\r
- 2662 0044 3C000000            .4byte  .LFE13-.LFB13\r
- 2663 0048 00000000            .4byte  .LFB11\r
- 2664 004c 20000000            .4byte  .LFE11-.LFB11\r
- 2665 0050 00000000            .4byte  .LFB2\r
- 2666 0054 24000000            .4byte  .LFE2-.LFB2\r
- 2667 0058 00000000            .4byte  .LFB8\r
- 2668 005c 34000000            .4byte  .LFE8-.LFB8\r
- 2669 0060 00000000            .4byte  .LFB3\r
- 2670 0064 38000000            .4byte  .LFE3-.LFB3\r
- 2671 0068 00000000            .4byte  .LFB1\r
- 2672 006c 54000000            .4byte  .LFE1-.LFB1\r
- 2673 0070 00000000            .4byte  .LFB0\r
- 2674 0074 A0000000            .4byte  .LFE0-.LFB0\r
- 2675 0078 00000000            .4byte  .LFB15\r
- 2676 007c 20000000            .4byte  .LFE15-.LFB15\r
- 2677 0080 00000000            .4byte  .LFB9\r
- 2678 0084 48000000            .4byte  .LFE9-.LFB9\r
- 2679 0088 00000000            .4byte  .LFB5\r
- 2680 008c 50000000            .4byte  .LFE5-.LFB5\r
- 2681 0090 00000000            .4byte  0\r
- 2682 0094 00000000            .4byte  0\r
- 2683                          .section        .debug_ranges,"",%progbits\r
- 2684                  .Ldebug_ranges0:\r
- 2685 0000 00000000            .4byte  .LFB4\r
- 2686 0004 94000000            .4byte  .LFE4\r
- 2687 0008 00000000            .4byte  .LFB6\r
- 2688 000c 34000000            .4byte  .LFE6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 64\r
-\r
-\r
- 2689 0010 00000000            .4byte  .LFB7\r
- 2690 0014 04000000            .4byte  .LFE7\r
- 2691 0018 00000000            .4byte  .LFB10\r
- 2692 001c 74000000            .4byte  .LFE10\r
- 2693 0020 00000000            .4byte  .LFB12\r
- 2694 0024 2C000000            .4byte  .LFE12\r
- 2695 0028 00000000            .4byte  .LFB14\r
- 2696 002c 20000000            .4byte  .LFE14\r
- 2697 0030 00000000            .4byte  .LFB13\r
- 2698 0034 3C000000            .4byte  .LFE13\r
- 2699 0038 00000000            .4byte  .LFB11\r
- 2700 003c 20000000            .4byte  .LFE11\r
- 2701 0040 00000000            .4byte  .LFB2\r
- 2702 0044 24000000            .4byte  .LFE2\r
- 2703 0048 00000000            .4byte  .LFB8\r
- 2704 004c 34000000            .4byte  .LFE8\r
- 2705 0050 00000000            .4byte  .LFB3\r
- 2706 0054 38000000            .4byte  .LFE3\r
- 2707 0058 00000000            .4byte  .LFB1\r
- 2708 005c 54000000            .4byte  .LFE1\r
- 2709 0060 00000000            .4byte  .LFB0\r
- 2710 0064 A0000000            .4byte  .LFE0\r
- 2711 0068 00000000            .4byte  .LFB15\r
- 2712 006c 20000000            .4byte  .LFE15\r
- 2713 0070 00000000            .4byte  .LFB9\r
- 2714 0074 48000000            .4byte  .LFE9\r
- 2715 0078 00000000            .4byte  .LFB5\r
- 2716 007c 50000000            .4byte  .LFE5\r
- 2717 0080 00000000            .4byte  0\r
- 2718 0084 00000000            .4byte  0\r
- 2719                          .section        .debug_line,"",%progbits\r
- 2720                  .Ldebug_line0:\r
- 2721 0000 49020000            .section        .debug_str,"MS",%progbits,1\r
- 2721      02006200 \r
- 2721      00000201 \r
- 2721      FB0E0D00 \r
- 2721      01010101 \r
- 2722                  .LASF31:\r
- 2723 0000 70537461            .ascii  "pStatusBlock\000"\r
- 2723      74757342 \r
- 2723      6C6F636B \r
- 2723      00\r
- 2724                  .LASF29:\r
- 2725 000d 636F756E            .ascii  "count\000"\r
- 2725      7400\r
- 2726                  .LASF10:\r
- 2727 0013 75696E74            .ascii  "uint16\000"\r
- 2727      313600\r
- 2728                  .LASF47:\r
- 2729 001a 55534246            .ascii  "USBFS_EP_0_ISR\000"\r
- 2729      535F4550 \r
- 2729      5F305F49 \r
- 2729      535200\r
- 2730                  .LASF65:\r
- 2731 0029 55534246            .ascii  "USBFS_currentTD\000"\r
- 2731      535F6375 \r
- 2731      7272656E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 65\r
-\r
-\r
- 2731      74544400 \r
- 2732                  .LASF36:\r
- 2733 0039 72656749            .ascii  "regIndex\000"\r
- 2733      6E646578 \r
- 2733      00\r
- 2734                  .LASF78:\r
- 2735 0042 636F6D70            .ascii  "completionCode\000"\r
- 2735      6C657469 \r
- 2735      6F6E436F \r
- 2735      646500\r
- 2736                  .LASF52:\r
- 2737 0051 55534246            .ascii  "USBFS_InitControlRead\000"\r
- 2737      535F496E \r
- 2737      6974436F \r
- 2737      6E74726F \r
- 2737      6C526561 \r
- 2738                  .LASF7:\r
- 2739 0067 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 2739      206C6F6E \r
- 2739      6720756E \r
- 2739      7369676E \r
- 2739      65642069 \r
- 2740                  .LASF20:\r
- 2741 007e 61646472            .ascii  "addr\000"\r
- 2741      00\r
- 2742                  .LASF77:\r
- 2743 0083 55534246            .ascii  "USBFS_ControlReadDataStage\000"\r
- 2743      535F436F \r
- 2743      6E74726F \r
- 2743      6C526561 \r
- 2743      64446174 \r
- 2744                  .LASF6:\r
- 2745 009e 6C6F6E67            .ascii  "long long int\000"\r
- 2745      206C6F6E \r
- 2745      6720696E \r
- 2745      7400\r
- 2746                  .LASF0:\r
- 2747 00ac 7369676E            .ascii  "signed char\000"\r
- 2747      65642063 \r
- 2747      68617200 \r
- 2748                  .LASF61:\r
- 2749 00b8 55534246            .ascii  "USBFS_deviceAddress\000"\r
- 2749      535F6465 \r
- 2749      76696365 \r
- 2749      41646472 \r
- 2749      65737300 \r
- 2750                  .LASF58:\r
- 2751 00cc 55534246            .ascii  "USBFS_interfaceNumber\000"\r
- 2751      535F696E \r
- 2751      74657266 \r
- 2751      6163654E \r
- 2751      756D6265 \r
- 2752                  .LASF4:\r
- 2753 00e2 6C6F6E67            .ascii  "long int\000"\r
- 2753      20696E74 \r
- 2753      00\r
- 2754                  .LASF9:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 66\r
-\r
-\r
- 2755 00eb 75696E74            .ascii  "uint8\000"\r
- 2755      3800\r
- 2756                  .LASF19:\r
- 2757 00f1 6570546F            .ascii  "epToggle\000"\r
- 2757      67676C65 \r
- 2757      00\r
- 2758                  .LASF75:\r
- 2759 00fa 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_drv.c\000"\r
- 2759      6E657261 \r
- 2759      7465645F \r
- 2759      536F7572 \r
- 2759      63655C50 \r
- 2760                  .LASF12:\r
- 2761 011f 646F7562            .ascii  "double\000"\r
- 2761      6C6500\r
- 2762                  .LASF48:\r
- 2763 0126 62526567            .ascii  "bRegTemp\000"\r
- 2763      54656D70 \r
- 2763      00\r
- 2764                  .LASF30:\r
- 2765 012f 70446174            .ascii  "pData\000"\r
- 2765      6100\r
- 2766                  .LASF55:\r
- 2767 0135 55534246            .ascii  "USBFS_configuration\000"\r
- 2767      535F636F \r
- 2767      6E666967 \r
- 2767      75726174 \r
- 2767      696F6E00 \r
- 2768                  .LASF21:\r
- 2769 0149 65704D6F            .ascii  "epMode\000"\r
- 2769      646500\r
- 2770                  .LASF73:\r
- 2771 0150 55534246            .ascii  "USBFS_HandleVendorRqst\000"\r
- 2771      535F4861 \r
- 2771      6E646C65 \r
- 2771      56656E64 \r
- 2771      6F725271 \r
- 2772                  .LASF43:\r
- 2773 0167 55534246            .ascii  "USBFS_ControlReadStatusStage\000"\r
- 2773      535F436F \r
- 2773      6E74726F \r
- 2773      6C526561 \r
- 2773      64537461 \r
- 2774                  .LASF8:\r
- 2775 0184 756E7369            .ascii  "unsigned int\000"\r
- 2775      676E6564 \r
- 2775      20696E74 \r
- 2775      00\r
- 2776                  .LASF39:\r
- 2777 0191 55534246            .ascii  "USBFS_UpdateStatusBlock\000"\r
- 2777      535F5570 \r
- 2777      64617465 \r
- 2777      53746174 \r
- 2777      7573426C \r
- 2778                  .LASF5:\r
- 2779 01a9 6C6F6E67            .ascii  "long unsigned int\000"\r
- 2779      20756E73 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 67\r
-\r
-\r
- 2779      69676E65 \r
- 2779      6420696E \r
- 2779      7400\r
- 2780                  .LASF33:\r
- 2781 01bb 55534246            .ascii  "USBFS_LoadEP0\000"\r
- 2781      535F4C6F \r
- 2781      61644550 \r
- 2781      3000\r
- 2782                  .LASF3:\r
- 2783 01c9 73686F72            .ascii  "short unsigned int\000"\r
- 2783      7420756E \r
- 2783      7369676E \r
- 2783      65642069 \r
- 2783      6E7400\r
- 2784                  .LASF42:\r
- 2785 01dc 55534246            .ascii  "USBFS_HandleIN\000"\r
- 2785      535F4861 \r
- 2785      6E646C65 \r
- 2785      494E00\r
- 2786                  .LASF35:\r
- 2787 01eb 65703043            .ascii  "ep0Count\000"\r
- 2787      6F756E74 \r
- 2787      00\r
- 2788                  .LASF70:\r
- 2789 01f4 55534246            .ascii  "USBFS_transferByteCount\000"\r
- 2789      535F7472 \r
- 2789      616E7366 \r
- 2789      65724279 \r
- 2789      7465436F \r
- 2790                  .LASF24:\r
- 2791 020c 696E7465            .ascii  "interface\000"\r
- 2791      72666163 \r
- 2791      6500\r
- 2792                  .LASF56:\r
- 2793 0216 55534246            .ascii  "USBFS_configurationChanged\000"\r
- 2793      535F636F \r
- 2793      6E666967 \r
- 2793      75726174 \r
- 2793      696F6E43 \r
- 2794                  .LASF76:\r
- 2795 0231 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 2795      43534932 \r
- 2795      53445C73 \r
- 2795      6F667477 \r
- 2795      6172655C \r
- 2796 0260 6E00                .ascii  "n\000"\r
- 2797                  .LASF63:\r
- 2798 0262 55534246            .ascii  "USBFS_interfaceClass\000"\r
- 2798      535F696E \r
- 2798      74657266 \r
- 2798      61636543 \r
- 2798      6C617373 \r
- 2799                  .LASF18:\r
- 2800 0277 68774570            .ascii  "hwEpState\000"\r
- 2800      53746174 \r
- 2800      6500\r
- 2801                  .LASF15:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 68\r
-\r
-\r
- 2802 0281 73697A65            .ascii  "sizetype\000"\r
- 2802      74797065 \r
- 2802      00\r
- 2803                  .LASF44:\r
- 2804 028a 55534246            .ascii  "USBFS_HandleOUT\000"\r
- 2804      535F4861 \r
- 2804      6E646C65 \r
- 2804      4F555400 \r
- 2805                  .LASF68:\r
- 2806 029a 55534246            .ascii  "USBFS_ep0Mode\000"\r
- 2806      535F6570 \r
- 2806      304D6F64 \r
- 2806      6500\r
- 2807                  .LASF16:\r
- 2808 02a8 61747472            .ascii  "attrib\000"\r
- 2808      696200\r
- 2809                  .LASF69:\r
- 2810 02af 55534246            .ascii  "USBFS_ep0Count\000"\r
- 2810      535F6570 \r
- 2810      30436F75 \r
- 2810      6E7400\r
- 2811                  .LASF28:\r
- 2812 02be 545F5553            .ascii  "T_USBFS_XFER_STATUS_BLOCK\000"\r
- 2812      4246535F \r
- 2812      58464552 \r
- 2812      5F535441 \r
- 2812      5455535F \r
- 2813                  .LASF51:\r
- 2814 02d8 55534246            .ascii  "USBFS_InitControlWrite\000"\r
- 2814      535F496E \r
- 2814      6974436F \r
- 2814      6E74726F \r
- 2814      6C577269 \r
- 2815                  .LASF11:\r
- 2816 02ef 666C6F61            .ascii  "float\000"\r
- 2816      7400\r
- 2817                  .LASF17:\r
- 2818 02f5 61706945            .ascii  "apiEpState\000"\r
- 2818      70537461 \r
- 2818      746500\r
- 2819                  .LASF64:\r
- 2820 0300 55534246            .ascii  "USBFS_EP\000"\r
- 2820      535F4550 \r
- 2820      00\r
- 2821                  .LASF74:\r
- 2822 0309 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 2822      4320342E \r
- 2822      372E3320 \r
- 2822      32303133 \r
- 2822      30333132 \r
- 2823 033c 616E6368            .ascii  "anch revision 196615]\000"\r
- 2823      20726576 \r
- 2823      6973696F \r
- 2823      6E203139 \r
- 2823      36363135 \r
- 2824                  .LASF14:\r
- 2825 0352 72656738            .ascii  "reg8\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 69\r
-\r
-\r
- 2825      00\r
- 2826                  .LASF54:\r
- 2827 0357 55534246            .ascii  "USBFS_transferState\000"\r
- 2827      535F7472 \r
- 2827      616E7366 \r
- 2827      65725374 \r
- 2827      61746500 \r
- 2828                  .LASF1:\r
- 2829 036b 756E7369            .ascii  "unsigned char\000"\r
- 2829      676E6564 \r
- 2829      20636861 \r
- 2829      7200\r
- 2830                  .LASF79:\r
- 2831 0379 55534246            .ascii  "USBFS_InitializeStatusBlock\000"\r
- 2831      535F496E \r
- 2831      69746961 \r
- 2831      6C697A65 \r
- 2831      53746174 \r
- 2832                  .LASF2:\r
- 2833 0395 73686F72            .ascii  "short int\000"\r
- 2833      7420696E \r
- 2833      7400\r
- 2834                  .LASF32:\r
- 2835 039f 545F5553            .ascii  "T_USBFS_TD\000"\r
- 2835      4246535F \r
- 2835      544400\r
- 2836                  .LASF67:\r
- 2837 03aa 55534246            .ascii  "USBFS_lastPacketSize\000"\r
- 2837      535F6C61 \r
- 2837      73745061 \r
- 2837      636B6574 \r
- 2837      53697A65 \r
- 2838                  .LASF59:\r
- 2839 03bf 55534246            .ascii  "USBFS_interfaceSetting\000"\r
- 2839      535F696E \r
- 2839      74657266 \r
- 2839      61636553 \r
- 2839      65747469 \r
- 2840                  .LASF25:\r
- 2841 03d6 545F5553            .ascii  "T_USBFS_EP_CTL_BLOCK\000"\r
- 2841      4246535F \r
- 2841      45505F43 \r
- 2841      544C5F42 \r
- 2841      4C4F434B \r
- 2842                  .LASF40:\r
- 2843 03eb 55534246            .ascii  "USBFS_NoDataControlStatusStage\000"\r
- 2843      535F4E6F \r
- 2843      44617461 \r
- 2843      436F6E74 \r
- 2843      726F6C53 \r
- 2844                  .LASF38:\r
- 2845 040a 55534246            .ascii  "USBFS_InitNoDataControlTransfer\000"\r
- 2845      535F496E \r
- 2845      69744E6F \r
- 2845      44617461 \r
- 2845      436F6E74 \r
- 2846                  .LASF53:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 70\r
-\r
-\r
- 2847 042a 55534246            .ascii  "USBFS_device\000"\r
- 2847      535F6465 \r
- 2847      76696365 \r
- 2847      00\r
- 2848                  .LASF66:\r
- 2849 0437 55534246            .ascii  "USBFS_ep0Toggle\000"\r
- 2849      535F6570 \r
- 2849      30546F67 \r
- 2849      676C6500 \r
- 2850                  .LASF34:\r
- 2851 0447 55534246            .ascii  "USBFS_ControlWriteDataStage\000"\r
- 2851      535F436F \r
- 2851      6E74726F \r
- 2851      6C577269 \r
- 2851      74654461 \r
- 2852                  .LASF27:\r
- 2853 0463 6C656E67            .ascii  "length\000"\r
- 2853      746800\r
- 2854                  .LASF13:\r
- 2855 046a 63686172            .ascii  "char\000"\r
- 2855      00\r
- 2856                  .LASF23:\r
- 2857 046f 62756666            .ascii  "bufferSize\000"\r
- 2857      65725369 \r
- 2857      7A6500\r
- 2858                  .LASF46:\r
- 2859 047a 72657175            .ascii  "requestHandled\000"\r
- 2859      65737448 \r
- 2859      616E646C \r
- 2859      656400\r
- 2860                  .LASF22:\r
- 2861 0489 62756666            .ascii  "buffOffset\000"\r
- 2861      4F666673 \r
- 2861      657400\r
- 2862                  .LASF57:\r
- 2863 0494 55534246            .ascii  "USBFS_deviceStatus\000"\r
- 2863      535F6465 \r
- 2863      76696365 \r
- 2863      53746174 \r
- 2863      757300\r
- 2864                  .LASF60:\r
- 2865 04a7 55534246            .ascii  "USBFS_interfaceSetting_last\000"\r
- 2865      535F696E \r
- 2865      74657266 \r
- 2865      61636553 \r
- 2865      65747469 \r
- 2866                  .LASF49:\r
- 2867 04c3 6D6F6469            .ascii  "modifyReg\000"\r
- 2867      66795265 \r
- 2867      6700\r
- 2868                  .LASF45:\r
- 2869 04cd 55534246            .ascii  "USBFS_HandleSetup\000"\r
- 2869      535F4861 \r
- 2869      6E646C65 \r
- 2869      53657475 \r
- 2869      7000\r
- 2870                  .LASF26:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccyD9XKy.s                      page 71\r
-\r
-\r
- 2871 04df 73746174            .ascii  "status\000"\r
- 2871      757300\r
- 2872                  .LASF72:\r
- 2873 04e6 55534246            .ascii  "USBFS_DispatchClassRqst\000"\r
- 2873      535F4469 \r
- 2873      73706174 \r
- 2873      6368436C \r
- 2873      61737352 \r
- 2874                  .LASF50:\r
- 2875 04fe 78666572            .ascii  "xferCount\000"\r
- 2875      436F756E \r
- 2875      7400\r
- 2876                  .LASF62:\r
- 2877 0508 55534246            .ascii  "USBFS_interfaceStatus\000"\r
- 2877      535F696E \r
- 2877      74657266 \r
- 2877      61636553 \r
- 2877      74617475 \r
- 2878                  .LASF71:\r
- 2879 051e 55534246            .ascii  "USBFS_HandleStandardRqst\000"\r
- 2879      535F4861 \r
- 2879      6E646C65 \r
- 2879      5374616E \r
- 2879      64617264 \r
- 2880                  .LASF37:\r
- 2881 0537 55534246            .ascii  "USBFS_InitZeroLengthControlTransfer\000"\r
- 2881      535F496E \r
- 2881      69745A65 \r
- 2881      726F4C65 \r
- 2881      6E677468 \r
- 2882                  .LASF41:\r
- 2883 055b 55534246            .ascii  "USBFS_ControlWriteStatusStage\000"\r
- 2883      535F436F \r
- 2883      6E74726F \r
- 2883      6C577269 \r
- 2883      74655374 \r
- 2884                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.o
deleted file mode 100755 (executable)
index 789579a..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_drv.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.lst
deleted file mode 100755 (executable)
index bca12e6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.lst
+++ /dev/null
@@ -1,1472 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_episr.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_EP_1_ISR,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_EP_1_ISR\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_EP_1_ISR, %function\r
-  24                   USBFS_EP_1_ISR:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_episr.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_episr.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_episr.c **** * File Name: USBFS_episr.c\r
-   3:.\Generated_Source\PSoC5/USBFS_episr.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_episr.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_episr.c **** *  Data endpoint Interrupt Service Routines\r
-   7:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_episr.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_episr.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_episr.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_episr.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_episr.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_episr.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_episr.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_episr.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_episr.c **** #include "USBFS_pvt.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_episr.c **** #if defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)\r
-  20:.\Generated_Source\PSoC5/USBFS_episr.c ****     #include "USBFS_midi.h"\r
-  21:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-  22:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  23:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_episr.c **** /***************************************\r
-  25:.\Generated_Source\PSoC5/USBFS_episr.c **** * Custom Declarations\r
-  26:.\Generated_Source\PSoC5/USBFS_episr.c **** ***************************************/\r
-  27:.\Generated_Source\PSoC5/USBFS_episr.c **** /* `#START CUSTOM_DECLARATIONS` Place your declaration here */\r
-  28:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_episr.c **** /* `#END` */\r
-  30:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  31:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP1_ISR_REMOVE == 0u)\r
-  33:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  34:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  35:.\Generated_Source\PSoC5/USBFS_episr.c ****     /******************************************************************************\r
-  36:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_1_ISR\r
-  37:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************\r
-  38:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
-  39:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
-  40:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 1 Interrupt Service Routine\r
-  41:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
-  42:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
-  43:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
-  44:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
-  45:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
-  46:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
-  47:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
-  48:.\Generated_Source\PSoC5/USBFS_episr.c ****     ******************************************************************************/\r
-  49:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_1_ISR)\r
-  50:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
-  27                           .loc 1 50 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  51:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-  52:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
-  53:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-  54:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  55:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP1_USER_CODE` Place your code here */\r
-  56:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  57:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
-  58:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  59:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-  60:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
-  61:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-  62:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-  63:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  64:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP1_CR0_PTR); /* Must read the mode reg */\r
-  32                           .loc 1 64 0\r
-  33 0000 094B                 ldr     r3, .L7\r
-  65:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
-  66:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP1].attrib & USBFS_EP_TYPE_MASK) !=\r
-  34                           .loc 1 66 0\r
-  35 0002 0A48                 ldr     r0, .L7+4\r
-  64:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP1_CR0_PTR); /* Must read the mode reg */\r
-  36                           .loc 1 64 0\r
-  37 0004 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-  38                           .loc 1 66 0\r
-  39 0006 027B                 ldrb    r2, [r0, #12]   @ zero_extendqisi2\r
-  40 0008 02F00301             and     r1, r2, #3\r
-  41 000c 0129                 cmp     r1, #1\r
-  42 000e 03D0                 beq     .L2\r
-  67:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
-  68:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
-  69:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP1].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-  43                           .loc 1 69 0\r
-  44 0010 C37B                 ldrb    r3, [r0, #15]   @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 3\r
-\r
-\r
-  45 0012 83F08002             eor     r2, r3, #128\r
-  46 0016 C273                 strb    r2, [r0, #15]\r
-  47                   .L2:\r
-  70:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
-  71:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP1].apiEpState = USBFS_EVENT_PENDING;\r
-  48                           .loc 1 71 0\r
-  49 0018 0121                 movs    r1, #1\r
-  50 001a 4173                 strb    r1, [r0, #13]\r
-  72:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR) &\r
-  51                           .loc 1 72 0\r
-  52 001c 0448                 ldr     r0, .L7+8\r
-  53 001e 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
-  54 0020 03F0FE02             and     r2, r3, #254\r
-  55 0024 0270                 strb    r2, [r0, #0]\r
-  56 0026 7047                 bx      lr\r
-  57                   .L8:\r
-  58                           .align  2\r
-  59                   .L7:\r
-  60 0028 0E600040             .word   1073766414\r
-  61 002c 00000000             .word   USBFS_EP\r
-  62 0030 0B600040             .word   1073766411\r
-  63                           .cfi_endproc\r
-  64                   .LFE0:\r
-  65                           .size   USBFS_EP_1_ISR, .-USBFS_EP_1_ISR\r
-  66                           .section        .text.USBFS_EP_2_ISR,"ax",%progbits\r
-  67                           .align  1\r
-  68                           .global USBFS_EP_2_ISR\r
-  69                           .thumb\r
-  70                           .thumb_func\r
-  71                           .type   USBFS_EP_2_ISR, %function\r
-  72                   USBFS_EP_2_ISR:\r
-  73                   .LFB1:\r
-  73:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                     (uint8)~USBFS_SIE_EP_INT_EP1_MA\r
-  74:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  75:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )\r
-  76:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP1)\r
-  77:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
-  78:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
-  79:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
-  80:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-  81:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  82:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP1_END_USER_CODE` Place your code here */\r
-  83:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  84:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
-  85:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  86:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )\r
-  87:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
-  88:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-  89:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
-  90:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  91:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP1_ISR_REMOVE */\r
-  92:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  93:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  94:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP2_ISR_REMOVE == 0u)\r
-  95:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-  96:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
-  97:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_2_ISR\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 4\r
-\r
-\r
-  98:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
-  99:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 100:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 101:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 2 Interrupt Service Routine\r
- 102:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 103:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 104:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 105:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 106:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 107:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 108:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 109:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 110:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_2_ISR)\r
- 111:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
-  74                           .loc 1 111 0\r
-  75                           .cfi_startproc\r
-  76                           @ args = 0, pretend = 0, frame = 0\r
-  77                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  78                           @ link register save eliminated.\r
- 112:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 113:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 114:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
- 115:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 116:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP2_USER_CODE` Place your code here */\r
- 117:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 118:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 119:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 120:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )\r
- 121:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 122:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 123:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
- 124:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 125:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP2_CR0_PTR); /* Must read the mode reg */\r
-  79                           .loc 1 125 0\r
-  80 0000 094B                 ldr     r3, .L14\r
- 126:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 127:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP2].attrib & USBFS_EP_TYPE_MASK) !=\r
-  81                           .loc 1 127 0\r
-  82 0002 0A48                 ldr     r0, .L14+4\r
- 125:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP2_CR0_PTR); /* Must read the mode reg */\r
-  83                           .loc 1 125 0\r
-  84 0004 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-  85                           .loc 1 127 0\r
-  86 0006 027E                 ldrb    r2, [r0, #24]   @ zero_extendqisi2\r
-  87 0008 02F00301             and     r1, r2, #3\r
-  88 000c 0129                 cmp     r1, #1\r
-  89 000e 03D0                 beq     .L10\r
- 128:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 129:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 130:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP2].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-  90                           .loc 1 130 0\r
-  91 0010 C37E                 ldrb    r3, [r0, #27]   @ zero_extendqisi2\r
-  92 0012 83F08002             eor     r2, r3, #128\r
-  93 0016 C276                 strb    r2, [r0, #27]\r
-  94                   .L10:\r
- 131:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 132:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP2].apiEpState = USBFS_EVENT_PENDING;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 5\r
-\r
-\r
-  95                           .loc 1 132 0\r
-  96 0018 0121                 movs    r1, #1\r
-  97 001a 4176                 strb    r1, [r0, #25]\r
- 133:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-  98                           .loc 1 133 0\r
-  99 001c 0448                 ldr     r0, .L14+8\r
- 100 001e 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 101 0020 03F0FD02             and     r2, r3, #253\r
- 102 0024 0270                 strb    r2, [r0, #0]\r
- 103 0026 7047                 bx      lr\r
- 104                   .L15:\r
- 105                           .align  2\r
- 106                   .L14:\r
- 107 0028 1E600040             .word   1073766430\r
- 108 002c 00000000             .word   USBFS_EP\r
- 109 0030 0B600040             .word   1073766411\r
- 110                           .cfi_endproc\r
- 111                   .LFE1:\r
- 112                           .size   USBFS_EP_2_ISR, .-USBFS_EP_2_ISR\r
- 113                           .section        .text.USBFS_SOF_ISR,"ax",%progbits\r
- 114                           .align  1\r
- 115                           .global USBFS_SOF_ISR\r
- 116                           .thumb\r
- 117                           .thumb_func\r
- 118                           .type   USBFS_SOF_ISR, %function\r
- 119                   USBFS_SOF_ISR:\r
- 120                   .LFB2:\r
- 134:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 135:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 136:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )\r
- 137:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP2)\r
- 138:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 139:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 140:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 141:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
- 142:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 143:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP2_END_USER_CODE` Place your code here */\r
- 144:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 145:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 146:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 147:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 148:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 149:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
- 150:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 151:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 152:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP2_ISR_REMOVE */\r
- 153:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 154:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 155:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP3_ISR_REMOVE == 0u)\r
- 156:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 157:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 158:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_3_ISR\r
- 159:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
- 160:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 161:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 162:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 3 Interrupt Service Routine\r
- 163:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 6\r
-\r
-\r
- 164:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 165:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 166:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 167:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 168:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 169:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 170:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 171:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_3_ISR)\r
- 172:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 173:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 174:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 175:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
- 176:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 177:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP3_USER_CODE` Place your code here */\r
- 178:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 179:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 180:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 181:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 182:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 183:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 184:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 185:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 186:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP3_CR0_PTR); /* Must read the mode reg */\r
- 187:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 188:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP3].attrib & USBFS_EP_TYPE_MASK) !=\r
- 189:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 190:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 191:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP3].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 192:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 193:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP3].apiEpState = USBFS_EVENT_PENDING;\r
- 194:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 195:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 196:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 197:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 198:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP3)\r
- 199:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 200:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 201:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 202:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
- 203:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 204:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP3_END_USER_CODE` Place your code here */\r
- 205:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 206:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 207:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 208:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 209:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 210:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 211:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 212:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 213:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP3_ISR_REMOVE */\r
- 214:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 215:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 216:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP4_ISR_REMOVE == 0u)\r
- 217:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 218:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 219:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_4_ISR\r
- 220:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 7\r
-\r
-\r
- 221:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 222:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 223:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 4 Interrupt Service Routine\r
- 224:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 225:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 226:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 227:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 228:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 229:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 230:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 231:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 232:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_4_ISR)\r
- 233:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 234:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 235:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 236:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 237:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 238:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP4_USER_CODE` Place your code here */\r
- 239:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 240:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 241:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 242:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 243:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 244:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 245:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 246:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 247:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP4_CR0_PTR); /* Must read the mode reg */\r
- 248:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 249:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP4].attrib & USBFS_EP_TYPE_MASK) !=\r
- 250:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 251:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 252:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP4].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 253:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 254:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP4].apiEpState = USBFS_EVENT_PENDING;\r
- 255:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 256:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 257:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 258:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 259:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP4)\r
- 260:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 261:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 262:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 263:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
- 264:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 265:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP4_END_USER_CODE` Place your code here */\r
- 266:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 267:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 268:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 269:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 270:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 271:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 272:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 273:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 274:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP4_ISR_REMOVE */\r
- 275:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 276:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 277:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP5_ISR_REMOVE == 0u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 8\r
-\r
-\r
- 278:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 279:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 280:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_5_ISR\r
- 281:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
- 282:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 283:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 284:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 5 Interrupt Service Routine\r
- 285:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 286:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 287:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 288:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 289:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 290:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 291:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 292:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 293:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_5_ISR)\r
- 294:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 295:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 296:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 297:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 298:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 299:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP5_USER_CODE` Place your code here */\r
- 300:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 301:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 302:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 303:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 304:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 305:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 306:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 307:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 308:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP5_CR0_PTR); /* Must read the mode reg */\r
- 309:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 310:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP5].attrib & USBFS_EP_TYPE_MASK) !=\r
- 311:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 312:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 313:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP5].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 314:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 315:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP5].apiEpState = USBFS_EVENT_PENDING;\r
- 316:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 317:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 318:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 319:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 320:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP5)\r
- 321:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 322:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 323:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 324:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
- 325:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 326:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP5_END_USER_CODE` Place your code here */\r
- 327:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 328:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 329:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 330:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 331:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 332:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 333:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 334:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP5_ISR_REMOVE */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 9\r
-\r
-\r
- 335:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 336:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 337:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP6_ISR_REMOVE == 0u)\r
- 338:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 339:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 340:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_6_ISR\r
- 341:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
- 342:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 343:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 344:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 6 Interrupt Service Routine\r
- 345:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 346:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 347:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 348:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 349:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 350:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 351:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 352:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 353:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_6_ISR)\r
- 354:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 355:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 356:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 357:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 358:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 359:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP6_USER_CODE` Place your code here */\r
- 360:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 361:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 362:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 363:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 364:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 365:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 366:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 367:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 368:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP6_CR0_PTR); /* Must read the mode reg */\r
- 369:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 370:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP6].attrib & USBFS_EP_TYPE_MASK) !=\r
- 371:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 372:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 373:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP6].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 374:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 375:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP6].apiEpState = USBFS_EVENT_PENDING;\r
- 376:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 377:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 378:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 379:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 380:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP6)\r
- 381:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 382:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 383:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 384:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 385:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 386:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP6_END_USER_CODE` Place your code here */\r
- 387:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 388:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 389:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 390:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 391:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 10\r
-\r
-\r
- 392:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 393:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 394:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 395:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP6_ISR_REMOVE */\r
- 396:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 397:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 398:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP7_ISR_REMOVE == 0u)\r
- 399:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 400:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 401:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_7_ISR\r
- 402:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
- 403:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 404:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 405:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 7 Interrupt Service Routine\r
- 406:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 407:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 408:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 409:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 410:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 411:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 412:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 413:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 414:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_7_ISR)\r
- 415:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 416:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 417:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 418:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 419:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 420:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP7_USER_CODE` Place your code here */\r
- 421:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 422:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 423:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 424:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 425:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 426:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 427:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 428:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 429:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP7_CR0_PTR); /* Must read the mode reg */\r
- 430:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 431:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP7].attrib & USBFS_EP_TYPE_MASK) !=\r
- 432:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 433:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 434:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP7].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 435:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 436:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP7].apiEpState = USBFS_EVENT_PENDING;\r
- 437:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 438:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 439:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 440:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 441:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP7)\r
- 442:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 443:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 444:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
- 445:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 446:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 447:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP7_END_USER_CODE` Place your code here */\r
- 448:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 11\r
-\r
-\r
- 449:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 450:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 451:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 452:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 453:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 454:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 455:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 456:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP7_ISR_REMOVE */\r
- 457:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 458:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 459:.\Generated_Source\PSoC5/USBFS_episr.c **** #if(USBFS_EP8_ISR_REMOVE == 0u)\r
- 460:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 461:.\Generated_Source\PSoC5/USBFS_episr.c ****     /*******************************************************************************\r
- 462:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Function Name: USBFS_EP_8_ISR\r
- 463:.\Generated_Source\PSoC5/USBFS_episr.c ****     ********************************************************************************\r
- 464:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 465:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Summary:\r
- 466:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  Endpoint 8 Interrupt Service Routine\r
- 467:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 468:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Parameters:\r
- 469:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 470:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 471:.\Generated_Source\PSoC5/USBFS_episr.c ****     * Return:\r
- 472:.\Generated_Source\PSoC5/USBFS_episr.c ****     *  None.\r
- 473:.\Generated_Source\PSoC5/USBFS_episr.c ****     *\r
- 474:.\Generated_Source\PSoC5/USBFS_episr.c ****     *******************************************************************************/\r
- 475:.\Generated_Source\PSoC5/USBFS_episr.c ****     CY_ISR(USBFS_EP_8_ISR)\r
- 476:.\Generated_Source\PSoC5/USBFS_episr.c ****     {\r
- 477:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 478:.\Generated_Source\PSoC5/USBFS_episr.c ****             uint8 int_en;\r
- 479:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 480:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 481:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP8_USER_CODE` Place your code here */\r
- 482:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 483:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 484:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 485:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 486:.\Generated_Source\PSoC5/USBFS_episr.c ****             int_en = EA;\r
- 487:.\Generated_Source\PSoC5/USBFS_episr.c ****             CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
- 488:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 489:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 490:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_GET_REG8(USBFS_SIE_EP8_CR0_PTR); /* Must read the mode reg */\r
- 491:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* Do not toggle ISOC endpoint */\r
- 492:.\Generated_Source\PSoC5/USBFS_episr.c ****         if((USBFS_EP[USBFS_EP8].attrib & USBFS_EP_TYPE_MASK) !=\r
- 493:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                                     USBFS_EP_TYPE_I\r
- 494:.\Generated_Source\PSoC5/USBFS_episr.c ****         {\r
- 495:.\Generated_Source\PSoC5/USBFS_episr.c ****             USBFS_EP[USBFS_EP8].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
- 496:.\Generated_Source\PSoC5/USBFS_episr.c ****         }\r
- 497:.\Generated_Source\PSoC5/USBFS_episr.c ****         USBFS_EP[USBFS_EP8].apiEpState = USBFS_EVENT_PENDING;\r
- 498:.\Generated_Source\PSoC5/USBFS_episr.c ****         CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
- 499:.\Generated_Source\PSoC5/USBFS_episr.c ****                                                                         & (uint8)~USBFS_SIE_EP_INT_\r
- 500:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 501:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
- 502:.\Generated_Source\PSoC5/USBFS_episr.c ****             if(USBFS_midi_out_ep == USBFS_EP8)\r
- 503:.\Generated_Source\PSoC5/USBFS_episr.c ****             {\r
- 504:.\Generated_Source\PSoC5/USBFS_episr.c ****                 USBFS_MIDI_OUT_EP_Service();\r
- 505:.\Generated_Source\PSoC5/USBFS_episr.c ****             }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 12\r
-\r
-\r
- 506:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
- 507:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 508:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#START EP8_END_USER_CODE` Place your code here */\r
- 509:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 510:.\Generated_Source\PSoC5/USBFS_episr.c ****         /* `#END` */\r
- 511:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 512:.\Generated_Source\PSoC5/USBFS_episr.c ****         #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
- 513:.\Generated_Source\PSoC5/USBFS_episr.c ****             EA = int_en;\r
- 514:.\Generated_Source\PSoC5/USBFS_episr.c ****         #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
- 515:.\Generated_Source\PSoC5/USBFS_episr.c ****     }\r
- 516:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 517:.\Generated_Source\PSoC5/USBFS_episr.c **** #endif   /* End USBFS_EP8_ISR_REMOVE */\r
- 518:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 519:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 520:.\Generated_Source\PSoC5/USBFS_episr.c **** /*******************************************************************************\r
- 521:.\Generated_Source\PSoC5/USBFS_episr.c **** * Function Name: USBFS_SOF_ISR\r
- 522:.\Generated_Source\PSoC5/USBFS_episr.c **** ********************************************************************************\r
- 523:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 524:.\Generated_Source\PSoC5/USBFS_episr.c **** * Summary:\r
- 525:.\Generated_Source\PSoC5/USBFS_episr.c **** *  Start of Frame Interrupt Service Routine\r
- 526:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 527:.\Generated_Source\PSoC5/USBFS_episr.c **** * Parameters:\r
- 528:.\Generated_Source\PSoC5/USBFS_episr.c **** *  None.\r
- 529:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 530:.\Generated_Source\PSoC5/USBFS_episr.c **** * Return:\r
- 531:.\Generated_Source\PSoC5/USBFS_episr.c **** *  None.\r
- 532:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 533:.\Generated_Source\PSoC5/USBFS_episr.c **** *******************************************************************************/\r
- 534:.\Generated_Source\PSoC5/USBFS_episr.c **** CY_ISR(USBFS_SOF_ISR)\r
- 535:.\Generated_Source\PSoC5/USBFS_episr.c **** {\r
- 121                           .loc 1 535 0\r
- 122                           .cfi_startproc\r
- 123                           @ args = 0, pretend = 0, frame = 0\r
- 124                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 125                           @ link register save eliminated.\r
- 126 0000 7047                 bx      lr\r
- 127                           .cfi_endproc\r
- 128                   .LFE2:\r
- 129                           .size   USBFS_SOF_ISR, .-USBFS_SOF_ISR\r
- 130                           .section        .text.USBFS_BUS_RESET_ISR,"ax",%progbits\r
- 131                           .align  1\r
- 132                           .global USBFS_BUS_RESET_ISR\r
- 133                           .thumb\r
- 134                           .thumb_func\r
- 135                           .type   USBFS_BUS_RESET_ISR, %function\r
- 136                   USBFS_BUS_RESET_ISR:\r
- 137                   .LFB3:\r
- 536:.\Generated_Source\PSoC5/USBFS_episr.c ****     /* `#START SOF_USER_CODE` Place your code here */\r
- 537:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 538:.\Generated_Source\PSoC5/USBFS_episr.c ****     /* `#END` */\r
- 539:.\Generated_Source\PSoC5/USBFS_episr.c **** }\r
- 540:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 541:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 542:.\Generated_Source\PSoC5/USBFS_episr.c **** /*******************************************************************************\r
- 543:.\Generated_Source\PSoC5/USBFS_episr.c **** * Function Name: USBFS_BUS_RESET_ISR\r
- 544:.\Generated_Source\PSoC5/USBFS_episr.c **** ********************************************************************************\r
- 545:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 13\r
-\r
-\r
- 546:.\Generated_Source\PSoC5/USBFS_episr.c **** * Summary:\r
- 547:.\Generated_Source\PSoC5/USBFS_episr.c **** *  USB Bus Reset Interrupt Service Routine.  Calls _Start with the same\r
- 548:.\Generated_Source\PSoC5/USBFS_episr.c **** *  parameters as the last USER call to _Start\r
- 549:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 550:.\Generated_Source\PSoC5/USBFS_episr.c **** * Parameters:\r
- 551:.\Generated_Source\PSoC5/USBFS_episr.c **** *  None.\r
- 552:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 553:.\Generated_Source\PSoC5/USBFS_episr.c **** * Return:\r
- 554:.\Generated_Source\PSoC5/USBFS_episr.c **** *  None.\r
- 555:.\Generated_Source\PSoC5/USBFS_episr.c **** *\r
- 556:.\Generated_Source\PSoC5/USBFS_episr.c **** *******************************************************************************/\r
- 557:.\Generated_Source\PSoC5/USBFS_episr.c **** CY_ISR(USBFS_BUS_RESET_ISR)\r
- 558:.\Generated_Source\PSoC5/USBFS_episr.c **** {\r
- 138                           .loc 1 558 0\r
- 139                           .cfi_startproc\r
- 140                           @ args = 0, pretend = 0, frame = 0\r
- 141                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 142                           @ link register save eliminated.\r
- 559:.\Generated_Source\PSoC5/USBFS_episr.c ****     /* `#START BUS_RESET_USER_CODE` Place your code here */\r
- 560:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 561:.\Generated_Source\PSoC5/USBFS_episr.c ****     /* `#END` */\r
- 562:.\Generated_Source\PSoC5/USBFS_episr.c **** \r
- 563:.\Generated_Source\PSoC5/USBFS_episr.c ****     USBFS_ReInitComponent();\r
- 564:.\Generated_Source\PSoC5/USBFS_episr.c **** }\r
- 143                           .loc 1 564 0\r
- 563:.\Generated_Source\PSoC5/USBFS_episr.c ****     USBFS_ReInitComponent();\r
- 144                           .loc 1 563 0\r
- 145 0000 FFF7FEBF             b       USBFS_ReInitComponent\r
- 146                   .LVL0:\r
- 147                           .cfi_endproc\r
- 148                   .LFE3:\r
- 149                           .size   USBFS_BUS_RESET_ISR, .-USBFS_BUS_RESET_ISR\r
- 150                           .text\r
- 151                   .Letext0:\r
- 152                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 153                           .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 154                           .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 155                           .section        .debug_info,"",%progbits\r
- 156                   .Ldebug_info0:\r
- 157 0000 D1010000             .4byte  0x1d1\r
- 158 0004 0200                 .2byte  0x2\r
- 159 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 160 000a 04                   .byte   0x4\r
- 161 000b 01                   .uleb128 0x1\r
- 162 000c A0010000             .4byte  .LASF29\r
- 163 0010 01                   .byte   0x1\r
- 164 0011 6F000000             .4byte  .LASF30\r
- 165 0015 AD000000             .4byte  .LASF31\r
- 166 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 167 001d 00000000             .4byte  0\r
- 168 0021 00000000             .4byte  0\r
- 169 0025 00000000             .4byte  .Ldebug_line0\r
- 170 0029 02                   .uleb128 0x2\r
- 171 002a 01                   .byte   0x1\r
- 172 002b 06                   .byte   0x6\r
- 173 002c 0B020000             .4byte  .LASF0\r
- 174 0030 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 14\r
-\r
-\r
- 175 0031 01                   .byte   0x1\r
- 176 0032 08                   .byte   0x8\r
- 177 0033 61000000             .4byte  .LASF1\r
- 178 0037 02                   .uleb128 0x2\r
- 179 0038 02                   .byte   0x2\r
- 180 0039 05                   .byte   0x5\r
- 181 003a 90010000             .4byte  .LASF2\r
- 182 003e 02                   .uleb128 0x2\r
- 183 003f 02                   .byte   0x2\r
- 184 0040 07                   .byte   0x7\r
- 185 0041 16000000             .4byte  .LASF3\r
- 186 0045 02                   .uleb128 0x2\r
- 187 0046 04                   .byte   0x4\r
- 188 0047 05                   .byte   0x5\r
- 189 0048 F3010000             .4byte  .LASF4\r
- 190 004c 02                   .uleb128 0x2\r
- 191 004d 04                   .byte   0x4\r
- 192 004e 07                   .byte   0x7\r
- 193 004f 9B000000             .4byte  .LASF5\r
- 194 0053 02                   .uleb128 0x2\r
- 195 0054 08                   .byte   0x8\r
- 196 0055 05                   .byte   0x5\r
- 197 0056 72010000             .4byte  .LASF6\r
- 198 005a 02                   .uleb128 0x2\r
- 199 005b 08                   .byte   0x8\r
- 200 005c 07                   .byte   0x7\r
- 201 005d 32010000             .4byte  .LASF7\r
- 202 0061 03                   .uleb128 0x3\r
- 203 0062 04                   .byte   0x4\r
- 204 0063 05                   .byte   0x5\r
- 205 0064 696E7400             .ascii  "int\000"\r
- 206 0068 02                   .uleb128 0x2\r
- 207 0069 04                   .byte   0x4\r
- 208 006a 07                   .byte   0x7\r
- 209 006b 25010000             .4byte  .LASF8\r
- 210 006f 04                   .uleb128 0x4\r
- 211 0070 9A010000             .4byte  .LASF9\r
- 212 0074 02                   .byte   0x2\r
- 213 0075 5B                   .byte   0x5b\r
- 214 0076 30000000             .4byte  0x30\r
- 215 007a 04                   .uleb128 0x4\r
- 216 007b 13010000             .4byte  .LASF10\r
- 217 007f 02                   .byte   0x2\r
- 218 0080 5C                   .byte   0x5c\r
- 219 0081 3E000000             .4byte  0x3e\r
- 220 0085 02                   .uleb128 0x2\r
- 221 0086 04                   .byte   0x4\r
- 222 0087 04                   .byte   0x4\r
- 223 0088 52000000             .4byte  .LASF11\r
- 224 008c 02                   .uleb128 0x2\r
- 225 008d 08                   .byte   0x8\r
- 226 008e 04                   .byte   0x4\r
- 227 008f FA000000             .4byte  .LASF12\r
- 228 0093 02                   .uleb128 0x2\r
- 229 0094 01                   .byte   0x1\r
- 230 0095 08                   .byte   0x8\r
- 231 0096 80010000             .4byte  .LASF13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 15\r
-\r
-\r
- 232 009a 04                   .uleb128 0x4\r
- 233 009b 96000000             .4byte  .LASF14\r
- 234 009f 02                   .byte   0x2\r
- 235 00a0 F0                   .byte   0xf0\r
- 236 00a1 A5000000             .4byte  0xa5\r
- 237 00a5 05                   .uleb128 0x5\r
- 238 00a6 6F000000             .4byte  0x6f\r
- 239 00aa 02                   .uleb128 0x2\r
- 240 00ab 04                   .byte   0x4\r
- 241 00ac 07                   .byte   0x7\r
- 242 00ad 62010000             .4byte  .LASF15\r
- 243 00b1 06                   .uleb128 0x6\r
- 244 00b2 0C                   .byte   0xc\r
- 245 00b3 03                   .byte   0x3\r
- 246 00b4 79                   .byte   0x79\r
- 247 00b5 38010000             .4byte  0x138\r
- 248 00b9 07                   .uleb128 0x7\r
- 249 00ba 01010000             .4byte  .LASF16\r
- 250 00be 03                   .byte   0x3\r
- 251 00bf 7B                   .byte   0x7b\r
- 252 00c0 6F000000             .4byte  0x6f\r
- 253 00c4 02                   .byte   0x2\r
- 254 00c5 23                   .byte   0x23\r
- 255 00c6 00                   .uleb128 0\r
- 256 00c7 07                   .uleb128 0x7\r
- 257 00c8 1A010000             .4byte  .LASF17\r
- 258 00cc 03                   .byte   0x3\r
- 259 00cd 7C                   .byte   0x7c\r
- 260 00ce 6F000000             .4byte  0x6f\r
- 261 00d2 02                   .byte   0x2\r
- 262 00d3 23                   .byte   0x23\r
- 263 00d4 01                   .uleb128 0x1\r
- 264 00d5 07                   .uleb128 0x7\r
- 265 00d6 49010000             .4byte  .LASF18\r
- 266 00da 03                   .byte   0x3\r
- 267 00db 7D                   .byte   0x7d\r
- 268 00dc 6F000000             .4byte  0x6f\r
- 269 00e0 02                   .byte   0x2\r
- 270 00e1 23                   .byte   0x23\r
- 271 00e2 02                   .uleb128 0x2\r
- 272 00e3 07                   .uleb128 0x7\r
- 273 00e4 58000000             .4byte  .LASF19\r
- 274 00e8 03                   .byte   0x3\r
- 275 00e9 7E                   .byte   0x7e\r
- 276 00ea 6F000000             .4byte  0x6f\r
- 277 00ee 02                   .byte   0x2\r
- 278 00ef 23                   .byte   0x23\r
- 279 00f0 03                   .uleb128 0x3\r
- 280 00f1 07                   .uleb128 0x7\r
- 281 00f2 DE000000             .4byte  .LASF20\r
- 282 00f6 03                   .byte   0x3\r
- 283 00f7 7F                   .byte   0x7f\r
- 284 00f8 6F000000             .4byte  0x6f\r
- 285 00fc 02                   .byte   0x2\r
- 286 00fd 23                   .byte   0x23\r
- 287 00fe 04                   .uleb128 0x4\r
- 288 00ff 07                   .uleb128 0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 16\r
-\r
-\r
- 289 0100 6B010000             .4byte  .LASF21\r
- 290 0104 03                   .byte   0x3\r
- 291 0105 80                   .byte   0x80\r
- 292 0106 6F000000             .4byte  0x6f\r
- 293 010a 02                   .byte   0x2\r
- 294 010b 23                   .byte   0x23\r
- 295 010c 05                   .uleb128 0x5\r
- 296 010d 07                   .uleb128 0x7\r
- 297 010e 08010000             .4byte  .LASF22\r
- 298 0112 03                   .byte   0x3\r
- 299 0113 81                   .byte   0x81\r
- 300 0114 7A000000             .4byte  0x7a\r
- 301 0118 02                   .byte   0x2\r
- 302 0119 23                   .byte   0x23\r
- 303 011a 06                   .uleb128 0x6\r
- 304 011b 07                   .uleb128 0x7\r
- 305 011c 85010000             .4byte  .LASF23\r
- 306 0120 03                   .byte   0x3\r
- 307 0121 82                   .byte   0x82\r
- 308 0122 7A000000             .4byte  0x7a\r
- 309 0126 02                   .byte   0x2\r
- 310 0127 23                   .byte   0x23\r
- 311 0128 08                   .uleb128 0x8\r
- 312 0129 07                   .uleb128 0x7\r
- 313 012a E9010000             .4byte  .LASF24\r
- 314 012e 03                   .byte   0x3\r
- 315 012f 83                   .byte   0x83\r
- 316 0130 6F000000             .4byte  0x6f\r
- 317 0134 02                   .byte   0x2\r
- 318 0135 23                   .byte   0x23\r
- 319 0136 0A                   .uleb128 0xa\r
- 320 0137 00                   .byte   0\r
- 321 0138 04                   .uleb128 0x4\r
- 322 0139 29000000             .4byte  .LASF25\r
- 323 013d 03                   .byte   0x3\r
- 324 013e 84                   .byte   0x84\r
- 325 013f B1000000             .4byte  0xb1\r
- 326 0143 08                   .uleb128 0x8\r
- 327 0144 01                   .byte   0x1\r
- 328 0145 53010000             .4byte  .LASF26\r
- 329 0149 01                   .byte   0x1\r
- 330 014a 31                   .byte   0x31\r
- 331 014b 01                   .byte   0x1\r
- 332 014c 00000000             .4byte  .LFB0\r
- 333 0150 34000000             .4byte  .LFE0\r
- 334 0154 02                   .byte   0x2\r
- 335 0155 7D                   .byte   0x7d\r
- 336 0156 00                   .sleb128 0\r
- 337 0157 01                   .byte   0x1\r
- 338 0158 08                   .uleb128 0x8\r
- 339 0159 01                   .byte   0x1\r
- 340 015a FC010000             .4byte  .LASF27\r
- 341 015e 01                   .byte   0x1\r
- 342 015f 6E                   .byte   0x6e\r
- 343 0160 01                   .byte   0x1\r
- 344 0161 00000000             .4byte  .LFB1\r
- 345 0165 34000000             .4byte  .LFE1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 17\r
-\r
-\r
- 346 0169 02                   .byte   0x2\r
- 347 016a 7D                   .byte   0x7d\r
- 348 016b 00                   .sleb128 0\r
- 349 016c 01                   .byte   0x1\r
- 350 016d 09                   .uleb128 0x9\r
- 351 016e 01                   .byte   0x1\r
- 352 016f E3000000             .4byte  .LASF28\r
- 353 0173 01                   .byte   0x1\r
- 354 0174 1602                 .2byte  0x216\r
- 355 0176 01                   .byte   0x1\r
- 356 0177 00000000             .4byte  .LFB2\r
- 357 017b 02000000             .4byte  .LFE2\r
- 358 017f 02                   .byte   0x2\r
- 359 0180 7D                   .byte   0x7d\r
- 360 0181 00                   .sleb128 0\r
- 361 0182 01                   .byte   0x1\r
- 362 0183 0A                   .uleb128 0xa\r
- 363 0184 01                   .byte   0x1\r
- 364 0185 3E000000             .4byte  .LASF32\r
- 365 0189 01                   .byte   0x1\r
- 366 018a 2D02                 .2byte  0x22d\r
- 367 018c 01                   .byte   0x1\r
- 368 018d 00000000             .4byte  .LFB3\r
- 369 0191 04000000             .4byte  .LFE3\r
- 370 0195 02                   .byte   0x2\r
- 371 0196 7D                   .byte   0x7d\r
- 372 0197 00                   .sleb128 0\r
- 373 0198 01                   .byte   0x1\r
- 374 0199 A8010000             .4byte  0x1a8\r
- 375 019d 0B                   .uleb128 0xb\r
- 376 019e 04000000             .4byte  .LVL0\r
- 377 01a2 01                   .byte   0x1\r
- 378 01a3 CA010000             .4byte  0x1ca\r
- 379 01a7 00                   .byte   0\r
- 380 01a8 0C                   .uleb128 0xc\r
- 381 01a9 38010000             .4byte  0x138\r
- 382 01ad B8010000             .4byte  0x1b8\r
- 383 01b1 0D                   .uleb128 0xd\r
- 384 01b2 AA000000             .4byte  0xaa\r
- 385 01b6 08                   .byte   0x8\r
- 386 01b7 00                   .byte   0\r
- 387 01b8 0E                   .uleb128 0xe\r
- 388 01b9 F1000000             .4byte  .LASF33\r
- 389 01bd 04                   .byte   0x4\r
- 390 01be 3F                   .byte   0x3f\r
- 391 01bf C5010000             .4byte  0x1c5\r
- 392 01c3 01                   .byte   0x1\r
- 393 01c4 01                   .byte   0x1\r
- 394 01c5 05                   .uleb128 0x5\r
- 395 01c6 A8010000             .4byte  0x1a8\r
- 396 01ca 0F                   .uleb128 0xf\r
- 397 01cb 01                   .byte   0x1\r
- 398 01cc 00000000             .4byte  .LASF34\r
- 399 01d0 04                   .byte   0x4\r
- 400 01d1 51                   .byte   0x51\r
- 401 01d2 01                   .byte   0x1\r
- 402 01d3 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 18\r
-\r
-\r
- 403 01d4 00                   .byte   0\r
- 404                           .section        .debug_abbrev,"",%progbits\r
- 405                   .Ldebug_abbrev0:\r
- 406 0000 01                   .uleb128 0x1\r
- 407 0001 11                   .uleb128 0x11\r
- 408 0002 01                   .byte   0x1\r
- 409 0003 25                   .uleb128 0x25\r
- 410 0004 0E                   .uleb128 0xe\r
- 411 0005 13                   .uleb128 0x13\r
- 412 0006 0B                   .uleb128 0xb\r
- 413 0007 03                   .uleb128 0x3\r
- 414 0008 0E                   .uleb128 0xe\r
- 415 0009 1B                   .uleb128 0x1b\r
- 416 000a 0E                   .uleb128 0xe\r
- 417 000b 55                   .uleb128 0x55\r
- 418 000c 06                   .uleb128 0x6\r
- 419 000d 11                   .uleb128 0x11\r
- 420 000e 01                   .uleb128 0x1\r
- 421 000f 52                   .uleb128 0x52\r
- 422 0010 01                   .uleb128 0x1\r
- 423 0011 10                   .uleb128 0x10\r
- 424 0012 06                   .uleb128 0x6\r
- 425 0013 00                   .byte   0\r
- 426 0014 00                   .byte   0\r
- 427 0015 02                   .uleb128 0x2\r
- 428 0016 24                   .uleb128 0x24\r
- 429 0017 00                   .byte   0\r
- 430 0018 0B                   .uleb128 0xb\r
- 431 0019 0B                   .uleb128 0xb\r
- 432 001a 3E                   .uleb128 0x3e\r
- 433 001b 0B                   .uleb128 0xb\r
- 434 001c 03                   .uleb128 0x3\r
- 435 001d 0E                   .uleb128 0xe\r
- 436 001e 00                   .byte   0\r
- 437 001f 00                   .byte   0\r
- 438 0020 03                   .uleb128 0x3\r
- 439 0021 24                   .uleb128 0x24\r
- 440 0022 00                   .byte   0\r
- 441 0023 0B                   .uleb128 0xb\r
- 442 0024 0B                   .uleb128 0xb\r
- 443 0025 3E                   .uleb128 0x3e\r
- 444 0026 0B                   .uleb128 0xb\r
- 445 0027 03                   .uleb128 0x3\r
- 446 0028 08                   .uleb128 0x8\r
- 447 0029 00                   .byte   0\r
- 448 002a 00                   .byte   0\r
- 449 002b 04                   .uleb128 0x4\r
- 450 002c 16                   .uleb128 0x16\r
- 451 002d 00                   .byte   0\r
- 452 002e 03                   .uleb128 0x3\r
- 453 002f 0E                   .uleb128 0xe\r
- 454 0030 3A                   .uleb128 0x3a\r
- 455 0031 0B                   .uleb128 0xb\r
- 456 0032 3B                   .uleb128 0x3b\r
- 457 0033 0B                   .uleb128 0xb\r
- 458 0034 49                   .uleb128 0x49\r
- 459 0035 13                   .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 19\r
-\r
-\r
- 460 0036 00                   .byte   0\r
- 461 0037 00                   .byte   0\r
- 462 0038 05                   .uleb128 0x5\r
- 463 0039 35                   .uleb128 0x35\r
- 464 003a 00                   .byte   0\r
- 465 003b 49                   .uleb128 0x49\r
- 466 003c 13                   .uleb128 0x13\r
- 467 003d 00                   .byte   0\r
- 468 003e 00                   .byte   0\r
- 469 003f 06                   .uleb128 0x6\r
- 470 0040 13                   .uleb128 0x13\r
- 471 0041 01                   .byte   0x1\r
- 472 0042 0B                   .uleb128 0xb\r
- 473 0043 0B                   .uleb128 0xb\r
- 474 0044 3A                   .uleb128 0x3a\r
- 475 0045 0B                   .uleb128 0xb\r
- 476 0046 3B                   .uleb128 0x3b\r
- 477 0047 0B                   .uleb128 0xb\r
- 478 0048 01                   .uleb128 0x1\r
- 479 0049 13                   .uleb128 0x13\r
- 480 004a 00                   .byte   0\r
- 481 004b 00                   .byte   0\r
- 482 004c 07                   .uleb128 0x7\r
- 483 004d 0D                   .uleb128 0xd\r
- 484 004e 00                   .byte   0\r
- 485 004f 03                   .uleb128 0x3\r
- 486 0050 0E                   .uleb128 0xe\r
- 487 0051 3A                   .uleb128 0x3a\r
- 488 0052 0B                   .uleb128 0xb\r
- 489 0053 3B                   .uleb128 0x3b\r
- 490 0054 0B                   .uleb128 0xb\r
- 491 0055 49                   .uleb128 0x49\r
- 492 0056 13                   .uleb128 0x13\r
- 493 0057 38                   .uleb128 0x38\r
- 494 0058 0A                   .uleb128 0xa\r
- 495 0059 00                   .byte   0\r
- 496 005a 00                   .byte   0\r
- 497 005b 08                   .uleb128 0x8\r
- 498 005c 2E                   .uleb128 0x2e\r
- 499 005d 00                   .byte   0\r
- 500 005e 3F                   .uleb128 0x3f\r
- 501 005f 0C                   .uleb128 0xc\r
- 502 0060 03                   .uleb128 0x3\r
- 503 0061 0E                   .uleb128 0xe\r
- 504 0062 3A                   .uleb128 0x3a\r
- 505 0063 0B                   .uleb128 0xb\r
- 506 0064 3B                   .uleb128 0x3b\r
- 507 0065 0B                   .uleb128 0xb\r
- 508 0066 27                   .uleb128 0x27\r
- 509 0067 0C                   .uleb128 0xc\r
- 510 0068 11                   .uleb128 0x11\r
- 511 0069 01                   .uleb128 0x1\r
- 512 006a 12                   .uleb128 0x12\r
- 513 006b 01                   .uleb128 0x1\r
- 514 006c 40                   .uleb128 0x40\r
- 515 006d 0A                   .uleb128 0xa\r
- 516 006e 9742                 .uleb128 0x2117\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 20\r
-\r
-\r
- 517 0070 0C                   .uleb128 0xc\r
- 518 0071 00                   .byte   0\r
- 519 0072 00                   .byte   0\r
- 520 0073 09                   .uleb128 0x9\r
- 521 0074 2E                   .uleb128 0x2e\r
- 522 0075 00                   .byte   0\r
- 523 0076 3F                   .uleb128 0x3f\r
- 524 0077 0C                   .uleb128 0xc\r
- 525 0078 03                   .uleb128 0x3\r
- 526 0079 0E                   .uleb128 0xe\r
- 527 007a 3A                   .uleb128 0x3a\r
- 528 007b 0B                   .uleb128 0xb\r
- 529 007c 3B                   .uleb128 0x3b\r
- 530 007d 05                   .uleb128 0x5\r
- 531 007e 27                   .uleb128 0x27\r
- 532 007f 0C                   .uleb128 0xc\r
- 533 0080 11                   .uleb128 0x11\r
- 534 0081 01                   .uleb128 0x1\r
- 535 0082 12                   .uleb128 0x12\r
- 536 0083 01                   .uleb128 0x1\r
- 537 0084 40                   .uleb128 0x40\r
- 538 0085 0A                   .uleb128 0xa\r
- 539 0086 9742                 .uleb128 0x2117\r
- 540 0088 0C                   .uleb128 0xc\r
- 541 0089 00                   .byte   0\r
- 542 008a 00                   .byte   0\r
- 543 008b 0A                   .uleb128 0xa\r
- 544 008c 2E                   .uleb128 0x2e\r
- 545 008d 01                   .byte   0x1\r
- 546 008e 3F                   .uleb128 0x3f\r
- 547 008f 0C                   .uleb128 0xc\r
- 548 0090 03                   .uleb128 0x3\r
- 549 0091 0E                   .uleb128 0xe\r
- 550 0092 3A                   .uleb128 0x3a\r
- 551 0093 0B                   .uleb128 0xb\r
- 552 0094 3B                   .uleb128 0x3b\r
- 553 0095 05                   .uleb128 0x5\r
- 554 0096 27                   .uleb128 0x27\r
- 555 0097 0C                   .uleb128 0xc\r
- 556 0098 11                   .uleb128 0x11\r
- 557 0099 01                   .uleb128 0x1\r
- 558 009a 12                   .uleb128 0x12\r
- 559 009b 01                   .uleb128 0x1\r
- 560 009c 40                   .uleb128 0x40\r
- 561 009d 0A                   .uleb128 0xa\r
- 562 009e 9742                 .uleb128 0x2117\r
- 563 00a0 0C                   .uleb128 0xc\r
- 564 00a1 01                   .uleb128 0x1\r
- 565 00a2 13                   .uleb128 0x13\r
- 566 00a3 00                   .byte   0\r
- 567 00a4 00                   .byte   0\r
- 568 00a5 0B                   .uleb128 0xb\r
- 569 00a6 898201               .uleb128 0x4109\r
- 570 00a9 00                   .byte   0\r
- 571 00aa 11                   .uleb128 0x11\r
- 572 00ab 01                   .uleb128 0x1\r
- 573 00ac 9542                 .uleb128 0x2115\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 21\r
-\r
-\r
- 574 00ae 0C                   .uleb128 0xc\r
- 575 00af 31                   .uleb128 0x31\r
- 576 00b0 13                   .uleb128 0x13\r
- 577 00b1 00                   .byte   0\r
- 578 00b2 00                   .byte   0\r
- 579 00b3 0C                   .uleb128 0xc\r
- 580 00b4 01                   .uleb128 0x1\r
- 581 00b5 01                   .byte   0x1\r
- 582 00b6 49                   .uleb128 0x49\r
- 583 00b7 13                   .uleb128 0x13\r
- 584 00b8 01                   .uleb128 0x1\r
- 585 00b9 13                   .uleb128 0x13\r
- 586 00ba 00                   .byte   0\r
- 587 00bb 00                   .byte   0\r
- 588 00bc 0D                   .uleb128 0xd\r
- 589 00bd 21                   .uleb128 0x21\r
- 590 00be 00                   .byte   0\r
- 591 00bf 49                   .uleb128 0x49\r
- 592 00c0 13                   .uleb128 0x13\r
- 593 00c1 2F                   .uleb128 0x2f\r
- 594 00c2 0B                   .uleb128 0xb\r
- 595 00c3 00                   .byte   0\r
- 596 00c4 00                   .byte   0\r
- 597 00c5 0E                   .uleb128 0xe\r
- 598 00c6 34                   .uleb128 0x34\r
- 599 00c7 00                   .byte   0\r
- 600 00c8 03                   .uleb128 0x3\r
- 601 00c9 0E                   .uleb128 0xe\r
- 602 00ca 3A                   .uleb128 0x3a\r
- 603 00cb 0B                   .uleb128 0xb\r
- 604 00cc 3B                   .uleb128 0x3b\r
- 605 00cd 0B                   .uleb128 0xb\r
- 606 00ce 49                   .uleb128 0x49\r
- 607 00cf 13                   .uleb128 0x13\r
- 608 00d0 3F                   .uleb128 0x3f\r
- 609 00d1 0C                   .uleb128 0xc\r
- 610 00d2 3C                   .uleb128 0x3c\r
- 611 00d3 0C                   .uleb128 0xc\r
- 612 00d4 00                   .byte   0\r
- 613 00d5 00                   .byte   0\r
- 614 00d6 0F                   .uleb128 0xf\r
- 615 00d7 2E                   .uleb128 0x2e\r
- 616 00d8 00                   .byte   0\r
- 617 00d9 3F                   .uleb128 0x3f\r
- 618 00da 0C                   .uleb128 0xc\r
- 619 00db 03                   .uleb128 0x3\r
- 620 00dc 0E                   .uleb128 0xe\r
- 621 00dd 3A                   .uleb128 0x3a\r
- 622 00de 0B                   .uleb128 0xb\r
- 623 00df 3B                   .uleb128 0x3b\r
- 624 00e0 0B                   .uleb128 0xb\r
- 625 00e1 27                   .uleb128 0x27\r
- 626 00e2 0C                   .uleb128 0xc\r
- 627 00e3 3C                   .uleb128 0x3c\r
- 628 00e4 0C                   .uleb128 0xc\r
- 629 00e5 00                   .byte   0\r
- 630 00e6 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 22\r
-\r
-\r
- 631 00e7 00                   .byte   0\r
- 632                           .section        .debug_aranges,"",%progbits\r
- 633 0000 34000000             .4byte  0x34\r
- 634 0004 0200                 .2byte  0x2\r
- 635 0006 00000000             .4byte  .Ldebug_info0\r
- 636 000a 04                   .byte   0x4\r
- 637 000b 00                   .byte   0\r
- 638 000c 0000                 .2byte  0\r
- 639 000e 0000                 .2byte  0\r
- 640 0010 00000000             .4byte  .LFB0\r
- 641 0014 34000000             .4byte  .LFE0-.LFB0\r
- 642 0018 00000000             .4byte  .LFB1\r
- 643 001c 34000000             .4byte  .LFE1-.LFB1\r
- 644 0020 00000000             .4byte  .LFB2\r
- 645 0024 02000000             .4byte  .LFE2-.LFB2\r
- 646 0028 00000000             .4byte  .LFB3\r
- 647 002c 04000000             .4byte  .LFE3-.LFB3\r
- 648 0030 00000000             .4byte  0\r
- 649 0034 00000000             .4byte  0\r
- 650                           .section        .debug_ranges,"",%progbits\r
- 651                   .Ldebug_ranges0:\r
- 652 0000 00000000             .4byte  .LFB0\r
- 653 0004 34000000             .4byte  .LFE0\r
- 654 0008 00000000             .4byte  .LFB1\r
- 655 000c 34000000             .4byte  .LFE1\r
- 656 0010 00000000             .4byte  .LFB2\r
- 657 0014 02000000             .4byte  .LFE2\r
- 658 0018 00000000             .4byte  .LFB3\r
- 659 001c 04000000             .4byte  .LFE3\r
- 660 0020 00000000             .4byte  0\r
- 661 0024 00000000             .4byte  0\r
- 662                           .section        .debug_line,"",%progbits\r
- 663                   .Ldebug_line0:\r
- 664 0000 BD000000             .section        .debug_str,"MS",%progbits,1\r
- 664      02006400 \r
- 664      00000201 \r
- 664      FB0E0D00 \r
- 664      01010101 \r
- 665                   .LASF34:\r
- 666 0000 55534246             .ascii  "USBFS_ReInitComponent\000"\r
- 666      535F5265 \r
- 666      496E6974 \r
- 666      436F6D70 \r
- 666      6F6E656E \r
- 667                   .LASF3:\r
- 668 0016 73686F72             .ascii  "short unsigned int\000"\r
- 668      7420756E \r
- 668      7369676E \r
- 668      65642069 \r
- 668      6E7400\r
- 669                   .LASF25:\r
- 670 0029 545F5553             .ascii  "T_USBFS_EP_CTL_BLOCK\000"\r
- 670      4246535F \r
- 670      45505F43 \r
- 670      544C5F42 \r
- 670      4C4F434B \r
- 671                   .LASF32:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 23\r
-\r
-\r
- 672 003e 55534246             .ascii  "USBFS_BUS_RESET_ISR\000"\r
- 672      535F4255 \r
- 672      535F5245 \r
- 672      5345545F \r
- 672      49535200 \r
- 673                   .LASF11:\r
- 674 0052 666C6F61             .ascii  "float\000"\r
- 674      7400\r
- 675                   .LASF19:\r
- 676 0058 6570546F             .ascii  "epToggle\000"\r
- 676      67676C65 \r
- 676      00\r
- 677                   .LASF1:\r
- 678 0061 756E7369             .ascii  "unsigned char\000"\r
- 678      676E6564 \r
- 678      20636861 \r
- 678      7200\r
- 679                   .LASF30:\r
- 680 006f 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_episr.c\000"\r
- 680      6E657261 \r
- 680      7465645F \r
- 680      536F7572 \r
- 680      63655C50 \r
- 681                   .LASF14:\r
- 682 0096 72656738             .ascii  "reg8\000"\r
- 682      00\r
- 683                   .LASF5:\r
- 684 009b 6C6F6E67             .ascii  "long unsigned int\000"\r
- 684      20756E73 \r
- 684      69676E65 \r
- 684      6420696E \r
- 684      7400\r
- 685                   .LASF31:\r
- 686 00ad 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 686      43534932 \r
- 686      53445C73 \r
- 686      6F667477 \r
- 686      6172655C \r
- 687 00dc 6E00                 .ascii  "n\000"\r
- 688                   .LASF20:\r
- 689 00de 61646472             .ascii  "addr\000"\r
- 689      00\r
- 690                   .LASF28:\r
- 691 00e3 55534246             .ascii  "USBFS_SOF_ISR\000"\r
- 691      535F534F \r
- 691      465F4953 \r
- 691      5200\r
- 692                   .LASF33:\r
- 693 00f1 55534246             .ascii  "USBFS_EP\000"\r
- 693      535F4550 \r
- 693      00\r
- 694                   .LASF12:\r
- 695 00fa 646F7562             .ascii  "double\000"\r
- 695      6C6500\r
- 696                   .LASF16:\r
- 697 0101 61747472             .ascii  "attrib\000"\r
- 697      696200\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 24\r
-\r
-\r
- 698                   .LASF22:\r
- 699 0108 62756666             .ascii  "buffOffset\000"\r
- 699      4F666673 \r
- 699      657400\r
- 700                   .LASF10:\r
- 701 0113 75696E74             .ascii  "uint16\000"\r
- 701      313600\r
- 702                   .LASF17:\r
- 703 011a 61706945             .ascii  "apiEpState\000"\r
- 703      70537461 \r
- 703      746500\r
- 704                   .LASF8:\r
- 705 0125 756E7369             .ascii  "unsigned int\000"\r
- 705      676E6564 \r
- 705      20696E74 \r
- 705      00\r
- 706                   .LASF7:\r
- 707 0132 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 707      206C6F6E \r
- 707      6720756E \r
- 707      7369676E \r
- 707      65642069 \r
- 708                   .LASF18:\r
- 709 0149 68774570             .ascii  "hwEpState\000"\r
- 709      53746174 \r
- 709      6500\r
- 710                   .LASF26:\r
- 711 0153 55534246             .ascii  "USBFS_EP_1_ISR\000"\r
- 711      535F4550 \r
- 711      5F315F49 \r
- 711      535200\r
- 712                   .LASF15:\r
- 713 0162 73697A65             .ascii  "sizetype\000"\r
- 713      74797065 \r
- 713      00\r
- 714                   .LASF21:\r
- 715 016b 65704D6F             .ascii  "epMode\000"\r
- 715      646500\r
- 716                   .LASF6:\r
- 717 0172 6C6F6E67             .ascii  "long long int\000"\r
- 717      206C6F6E \r
- 717      6720696E \r
- 717      7400\r
- 718                   .LASF13:\r
- 719 0180 63686172             .ascii  "char\000"\r
- 719      00\r
- 720                   .LASF23:\r
- 721 0185 62756666             .ascii  "bufferSize\000"\r
- 721      65725369 \r
- 721      7A6500\r
- 722                   .LASF2:\r
- 723 0190 73686F72             .ascii  "short int\000"\r
- 723      7420696E \r
- 723      7400\r
- 724                   .LASF9:\r
- 725 019a 75696E74             .ascii  "uint8\000"\r
- 725      3800\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccPPhPqT.s                      page 25\r
-\r
-\r
- 726                   .LASF29:\r
- 727 01a0 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 727      4320342E \r
- 727      372E3320 \r
- 727      32303133 \r
- 727      30333132 \r
- 728 01d3 616E6368             .ascii  "anch revision 196615]\000"\r
- 728      20726576 \r
- 728      6973696F \r
- 728      6E203139 \r
- 728      36363135 \r
- 729                   .LASF24:\r
- 730 01e9 696E7465             .ascii  "interface\000"\r
- 730      72666163 \r
- 730      6500\r
- 731                   .LASF4:\r
- 732 01f3 6C6F6E67             .ascii  "long int\000"\r
- 732      20696E74 \r
- 732      00\r
- 733                   .LASF27:\r
- 734 01fc 55534246             .ascii  "USBFS_EP_2_ISR\000"\r
- 734      535F4550 \r
- 734      5F325F49 \r
- 734      535200\r
- 735                   .LASF0:\r
- 736 020b 7369676E             .ascii  "signed char\000"\r
- 736      65642063 \r
- 736      68617200 \r
- 737                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.o
deleted file mode 100755 (executable)
index 9995c86..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_episr.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.lst
deleted file mode 100755 (executable)
index ce3b120..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.lst
+++ /dev/null
@@ -1,2706 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_hid.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_UpdateHIDTimer,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_UpdateHIDTimer\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_UpdateHIDTimer, %function\r
-  24                   USBFS_UpdateHIDTimer:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_hid.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_hid.c **** * File Name: USBFS_hid.c\r
-   3:.\Generated_Source\PSoC5/USBFS_hid.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_hid.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_hid.c **** *  USB HID Class request handler.\r
-   7:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_hid.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_hid.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_hid.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_hid.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_hid.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_hid.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  19:.\Generated_Source\PSoC5/USBFS_hid.c **** #if defined(USBFS_ENABLE_HID_CLASS)\r
-  20:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  21:.\Generated_Source\PSoC5/USBFS_hid.c **** #include "USBFS_pvt.h"\r
-  22:.\Generated_Source\PSoC5/USBFS_hid.c **** #include "USBFS_hid.h"\r
-  23:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  25:.\Generated_Source\PSoC5/USBFS_hid.c **** /***************************************\r
-  26:.\Generated_Source\PSoC5/USBFS_hid.c **** *    HID Variables\r
-  27:.\Generated_Source\PSoC5/USBFS_hid.c **** ***************************************/\r
-  28:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_hid.c **** volatile uint8 USBFS_hidProtocol[USBFS_MAX_INTERFACES_NUMBER];  /* HID device protocol status */\r
-  30:.\Generated_Source\PSoC5/USBFS_hid.c **** volatile uint8 USBFS_hidIdleRate[USBFS_MAX_INTERFACES_NUMBER];  /* HID device idle reload value */\r
-  31:.\Generated_Source\PSoC5/USBFS_hid.c **** volatile uint8 USBFS_hidIdleTimer[USBFS_MAX_INTERFACES_NUMBER]; /* HID device idle rate value */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  33:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  34:.\Generated_Source\PSoC5/USBFS_hid.c **** /***************************************\r
-  35:.\Generated_Source\PSoC5/USBFS_hid.c **** * Custom Declarations\r
-  36:.\Generated_Source\PSoC5/USBFS_hid.c **** ***************************************/\r
-  37:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  38:.\Generated_Source\PSoC5/USBFS_hid.c **** /* `#START HID_CUSTOM_DECLARATIONS` Place your declaration here */\r
-  39:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  40:.\Generated_Source\PSoC5/USBFS_hid.c **** /* `#END` */\r
-  41:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  42:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  43:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
-  44:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USBFS_UpdateHIDTimer\r
-  45:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
-  46:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  47:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
-  48:.\Generated_Source\PSoC5/USBFS_hid.c **** *  Updates the HID report timer and reloads it if expired\r
-  49:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  50:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
-  51:.\Generated_Source\PSoC5/USBFS_hid.c **** *  interface:  Interface Number.\r
-  52:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  53:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
-  54:.\Generated_Source\PSoC5/USBFS_hid.c **** *  status.\r
-  55:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  56:.\Generated_Source\PSoC5/USBFS_hid.c **** * Reentrant:\r
-  57:.\Generated_Source\PSoC5/USBFS_hid.c **** *  No.\r
-  58:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  59:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
-  60:.\Generated_Source\PSoC5/USBFS_hid.c **** uint8 USBFS_UpdateHIDTimer(uint8 interface) \r
-  61:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
-  27                           .loc 1 61 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  62:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 stat = USBFS_IDLE_TIMER_INDEFINITE;\r
-  63:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  64:.\Generated_Source\PSoC5/USBFS_hid.c ****     if(USBFS_hidIdleRate[interface] != 0u)\r
-  33                           .loc 1 64 0\r
-  34 0000 084A                 ldr     r2, .L6\r
-  35 0002 135C                 ldrb    r3, [r2, r0]    @ zero_extendqisi2\r
-  36 0004 63B1                 cbz     r3, .L4\r
-  65:.\Generated_Source\PSoC5/USBFS_hid.c ****     {\r
-  66:.\Generated_Source\PSoC5/USBFS_hid.c ****         if(USBFS_hidIdleTimer[interface] > 0u)\r
-  37                           .loc 1 66 0\r
-  38 0006 084B                 ldr     r3, .L6+4\r
-  39 0008 195C                 ldrb    r1, [r3, r0]    @ zero_extendqisi2\r
-  40 000a 29B1                 cbz     r1, .L3\r
-  67:.\Generated_Source\PSoC5/USBFS_hid.c ****         {\r
-  68:.\Generated_Source\PSoC5/USBFS_hid.c ****             USBFS_hidIdleTimer[interface]--;\r
-  41                           .loc 1 68 0\r
-  42 000c 195C                 ldrb    r1, [r3, r0]    @ zero_extendqisi2\r
-  43 000e 4A1E                 subs    r2, r1, #1\r
-  44 0010 D1B2                 uxtb    r1, r2\r
-  45 0012 1954                 strb    r1, [r3, r0]\r
-  46                   .LVL1:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 3\r
-\r
-\r
-  69:.\Generated_Source\PSoC5/USBFS_hid.c ****             stat = USBFS_IDLE_TIMER_RUNNING;\r
-  47                           .loc 1 69 0\r
-  48 0014 0220                 movs    r0, #2\r
-  49                   .LVL2:\r
-  50 0016 7047                 bx      lr\r
-  51                   .LVL3:\r
-  52                   .L3:\r
-  70:.\Generated_Source\PSoC5/USBFS_hid.c ****         }\r
-  71:.\Generated_Source\PSoC5/USBFS_hid.c ****         else\r
-  72:.\Generated_Source\PSoC5/USBFS_hid.c ****         {\r
-  73:.\Generated_Source\PSoC5/USBFS_hid.c ****             USBFS_hidIdleTimer[interface] = USBFS_hidIdleRate[interface];\r
-  53                           .loc 1 73 0\r
-  54 0018 125C                 ldrb    r2, [r2, r0]    @ zero_extendqisi2\r
-  55 001a 1A54                 strb    r2, [r3, r0]\r
-  56                   .LVL4:\r
-  74:.\Generated_Source\PSoC5/USBFS_hid.c ****             stat = USBFS_IDLE_TIMER_EXPIRED;\r
-  57                           .loc 1 74 0\r
-  58 001c 0120                 movs    r0, #1\r
-  59                   .LVL5:\r
-  60 001e 7047                 bx      lr\r
-  61                   .LVL6:\r
-  62                   .L4:\r
-  62:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 stat = USBFS_IDLE_TIMER_INDEFINITE;\r
-  63                           .loc 1 62 0\r
-  64 0020 1846                 mov     r0, r3\r
-  65                   .LVL7:\r
-  75:.\Generated_Source\PSoC5/USBFS_hid.c ****         }\r
-  76:.\Generated_Source\PSoC5/USBFS_hid.c ****     }\r
-  77:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  78:.\Generated_Source\PSoC5/USBFS_hid.c ****     return(stat);\r
-  79:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
-  66                           .loc 1 79 0\r
-  67 0022 7047                 bx      lr\r
-  68                   .L7:\r
-  69                           .align  2\r
-  70                   .L6:\r
-  71 0024 00000000             .word   USBFS_hidIdleRate\r
-  72 0028 00000000             .word   USBFS_hidIdleTimer\r
-  73                           .cfi_endproc\r
-  74                   .LFE0:\r
-  75                           .size   USBFS_UpdateHIDTimer, .-USBFS_UpdateHIDTimer\r
-  76                           .section        .text.USBFS_GetProtocol,"ax",%progbits\r
-  77                           .align  1\r
-  78                           .global USBFS_GetProtocol\r
-  79                           .thumb\r
-  80                           .thumb_func\r
-  81                           .type   USBFS_GetProtocol, %function\r
-  82                   USBFS_GetProtocol:\r
-  83                   .LFB1:\r
-  80:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  81:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-  82:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
-  83:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USBFS_GetProtocol\r
-  84:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
-  85:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  86:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
-  87:.\Generated_Source\PSoC5/USBFS_hid.c **** *  Returns the selected protocol value to the application\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 4\r
-\r
-\r
-  88:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  89:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
-  90:.\Generated_Source\PSoC5/USBFS_hid.c **** *  interface:  Interface Number.\r
-  91:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  92:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
-  93:.\Generated_Source\PSoC5/USBFS_hid.c **** *  Interface protocol.\r
-  94:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-  95:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
-  96:.\Generated_Source\PSoC5/USBFS_hid.c **** uint8 USBFS_GetProtocol(uint8 interface) \r
-  97:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
-  84                           .loc 1 97 0\r
-  85                           .cfi_startproc\r
-  86                           @ args = 0, pretend = 0, frame = 0\r
-  87                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  88                           @ link register save eliminated.\r
-  89                   .LVL8:\r
-  98:.\Generated_Source\PSoC5/USBFS_hid.c ****     return(USBFS_hidProtocol[interface]);\r
-  90                           .loc 1 98 0\r
-  91 0000 014B                 ldr     r3, .L9\r
-  92 0002 185C                 ldrb    r0, [r3, r0]    @ zero_extendqisi2\r
-  93                   .LVL9:\r
-  99:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
-  94                           .loc 1 99 0\r
-  95 0004 7047                 bx      lr\r
-  96                   .L10:\r
-  97 0006 00BF                 .align  2\r
-  98                   .L9:\r
-  99 0008 00000000             .word   USBFS_hidProtocol\r
- 100                           .cfi_endproc\r
- 101                   .LFE1:\r
- 102                           .size   USBFS_GetProtocol, .-USBFS_GetProtocol\r
- 103                           .section        .text.USBFS_FindHidClassDecriptor,"ax",%progbits\r
- 104                           .align  1\r
- 105                           .global USBFS_FindHidClassDecriptor\r
- 106                           .thumb\r
- 107                           .thumb_func\r
- 108                           .type   USBFS_FindHidClassDecriptor, %function\r
- 109                   USBFS_FindHidClassDecriptor:\r
- 110                   .LFB3:\r
- 100:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 101:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 102:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
- 103:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USBFS_DispatchHIDClassRqst\r
- 104:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
- 105:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 106:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
- 107:.\Generated_Source\PSoC5/USBFS_hid.c **** *  This routine dispatches class requests\r
- 108:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 109:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
- 110:.\Generated_Source\PSoC5/USBFS_hid.c **** *  None.\r
- 111:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 112:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
- 113:.\Generated_Source\PSoC5/USBFS_hid.c **** *  requestHandled\r
- 114:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 115:.\Generated_Source\PSoC5/USBFS_hid.c **** * Reentrant:\r
- 116:.\Generated_Source\PSoC5/USBFS_hid.c **** *  No.\r
- 117:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 5\r
-\r
-\r
- 118:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
- 119:.\Generated_Source\PSoC5/USBFS_hid.c **** uint8 USBFS_DispatchHIDClassRqst(void) \r
- 120:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
- 121:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 requestHandled = USBFS_FALSE;\r
- 122:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 interfaceNumber;\r
- 123:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 124:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 125:.\Generated_Source\PSoC5/USBFS_hid.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
- 126:.\Generated_Source\PSoC5/USBFS_hid.c ****     {   /* Control Read */\r
- 127:.\Generated_Source\PSoC5/USBFS_hid.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 128:.\Generated_Source\PSoC5/USBFS_hid.c ****         {\r
- 129:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_GET_DESCRIPTOR:\r
- 130:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_CLASS)\r
- 131:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 132:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_FindHidClassDecriptor();\r
- 133:.\Generated_Source\PSoC5/USBFS_hid.c ****                     if (USBFS_currentTD.count != 0u)\r
- 134:.\Generated_Source\PSoC5/USBFS_hid.c ****                     {\r
- 135:.\Generated_Source\PSoC5/USBFS_hid.c ****                         requestHandled = USBFS_InitControlRead();\r
- 136:.\Generated_Source\PSoC5/USBFS_hid.c ****                     }\r
- 137:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 138:.\Generated_Source\PSoC5/USBFS_hid.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_REPORT)\r
- 139:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 140:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_FindReportDescriptor();\r
- 141:.\Generated_Source\PSoC5/USBFS_hid.c ****                     if (USBFS_currentTD.count != 0u)\r
- 142:.\Generated_Source\PSoC5/USBFS_hid.c ****                     {\r
- 143:.\Generated_Source\PSoC5/USBFS_hid.c ****                         requestHandled = USBFS_InitControlRead();\r
- 144:.\Generated_Source\PSoC5/USBFS_hid.c ****                     }\r
- 145:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 146:.\Generated_Source\PSoC5/USBFS_hid.c ****                 else\r
- 147:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {   /* requestHandled is initialezed as FALSE by default */\r
- 148:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 149:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 150:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_GET_REPORT:\r
- 151:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_FindReport();\r
- 152:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (USBFS_currentTD.count != 0u)\r
- 153:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 154:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitControlRead();\r
- 155:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 156:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 157:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 158:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_GET_IDLE:\r
- 159:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* This function does not support multiple reports per interface*/\r
- 160:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* Validate interfaceNumber and Report ID (should be 0) */\r
- 161:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 162:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
- 163:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 164:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.count = 1u;\r
- 165:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.pData = &USBFS_hidIdleRate[interfaceNumber];\r
- 166:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 167:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 168:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 169:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_GET_PROTOCOL:\r
- 170:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* Validate interfaceNumber */\r
- 171:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( interfaceNumber < USBFS_MAX_INTERFACES_NUMBER)\r
- 172:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 173:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.count = 1u;\r
- 174:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.pData = &USBFS_hidProtocol[interfaceNumber];\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 6\r
-\r
-\r
- 175:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 176:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 177:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 178:.\Generated_Source\PSoC5/USBFS_hid.c ****             default:    /* requestHandled is initialized as FALSE by default */\r
- 179:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 180:.\Generated_Source\PSoC5/USBFS_hid.c ****         }\r
- 181:.\Generated_Source\PSoC5/USBFS_hid.c ****     }\r
- 182:.\Generated_Source\PSoC5/USBFS_hid.c ****     else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) ==\r
- 183:.\Generated_Source\PSoC5/USBFS_hid.c ****                                                                             USBFS_RQST_DIR_H2D)\r
- 184:.\Generated_Source\PSoC5/USBFS_hid.c ****     {   /* Control Write */\r
- 185:.\Generated_Source\PSoC5/USBFS_hid.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 186:.\Generated_Source\PSoC5/USBFS_hid.c ****         {\r
- 187:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_SET_REPORT:\r
- 188:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_FindReport();\r
- 189:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (USBFS_currentTD.count != 0u)\r
- 190:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 191:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitControlWrite();\r
- 192:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 193:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 194:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_SET_IDLE:\r
- 195:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* This function does not support multiple reports per interface */\r
- 196:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* Validate interfaceNumber and Report ID (should be 0) */\r
- 197:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 198:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
- 199:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 200:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_hidIdleRate[interfaceNumber] = CY_GET_REG8(USBFS_wValueHi);\r
- 201:.\Generated_Source\PSoC5/USBFS_hid.c ****                     /* With regards to HID spec: "7.2.4 Set_Idle Request"\r
- 202:.\Generated_Source\PSoC5/USBFS_hid.c ****                     *  Latency. If the current period has gone past the\r
- 203:.\Generated_Source\PSoC5/USBFS_hid.c ****                     *  newly proscribed time duration, then a report\r
- 204:.\Generated_Source\PSoC5/USBFS_hid.c ****                     *  will be generated immediately.\r
- 205:.\Generated_Source\PSoC5/USBFS_hid.c ****                     */\r
- 206:.\Generated_Source\PSoC5/USBFS_hid.c ****                     if(USBFS_hidIdleRate[interfaceNumber] <\r
- 207:.\Generated_Source\PSoC5/USBFS_hid.c ****                        USBFS_hidIdleTimer[interfaceNumber])\r
- 208:.\Generated_Source\PSoC5/USBFS_hid.c ****                     {\r
- 209:.\Generated_Source\PSoC5/USBFS_hid.c ****                         /* Set the timer to zero and let the UpdateHIDTimer() API return IDLE_TIMER\r
- 210:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleTimer[interfaceNumber] = 0u;\r
- 211:.\Generated_Source\PSoC5/USBFS_hid.c ****                     }\r
- 212:.\Generated_Source\PSoC5/USBFS_hid.c ****                     /* If the new request is received within 4 milliseconds\r
- 213:.\Generated_Source\PSoC5/USBFS_hid.c ****                     *  (1 count) of the end of the current period, then the\r
- 214:.\Generated_Source\PSoC5/USBFS_hid.c ****                     *  new request will have no effect until after the report.\r
- 215:.\Generated_Source\PSoC5/USBFS_hid.c ****                     */\r
- 216:.\Generated_Source\PSoC5/USBFS_hid.c ****                     else if(USBFS_hidIdleTimer[interfaceNumber] <= 1u)\r
- 217:.\Generated_Source\PSoC5/USBFS_hid.c ****                     {\r
- 218:.\Generated_Source\PSoC5/USBFS_hid.c ****                         /* Do nothing.\r
- 219:.\Generated_Source\PSoC5/USBFS_hid.c ****                         *  Let the UpdateHIDTimer() API continue to work and\r
- 220:.\Generated_Source\PSoC5/USBFS_hid.c ****                         *  return IDLE_TIMER_EXPIRED status\r
- 221:.\Generated_Source\PSoC5/USBFS_hid.c ****                         */\r
- 222:.\Generated_Source\PSoC5/USBFS_hid.c ****                     }\r
- 223:.\Generated_Source\PSoC5/USBFS_hid.c ****                     else\r
- 224:.\Generated_Source\PSoC5/USBFS_hid.c ****                     {   /* Reload the timer*/\r
- 225:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleTimer[interfaceNumber] =\r
- 226:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleRate[interfaceNumber];\r
- 227:.\Generated_Source\PSoC5/USBFS_hid.c ****                     }\r
- 228:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitNoDataControlTransfer();\r
- 229:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 230:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 231:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 7\r
-\r
-\r
- 232:.\Generated_Source\PSoC5/USBFS_hid.c ****             case USBFS_HID_SET_PROTOCOL:\r
- 233:.\Generated_Source\PSoC5/USBFS_hid.c ****                 /* Validate interfaceNumber and protocol (must be 0 or 1) */\r
- 234:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 235:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) <= 1u) )\r
- 236:.\Generated_Source\PSoC5/USBFS_hid.c ****                 {\r
- 237:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_hidProtocol[interfaceNumber] = CY_GET_REG8(USBFS_wValueLo);\r
- 238:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitNoDataControlTransfer();\r
- 239:.\Generated_Source\PSoC5/USBFS_hid.c ****                 }\r
- 240:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 241:.\Generated_Source\PSoC5/USBFS_hid.c ****             default:    /* requestHandled is initialized as FALSE by default */\r
- 242:.\Generated_Source\PSoC5/USBFS_hid.c ****                 break;\r
- 243:.\Generated_Source\PSoC5/USBFS_hid.c ****         }\r
- 244:.\Generated_Source\PSoC5/USBFS_hid.c ****     }\r
- 245:.\Generated_Source\PSoC5/USBFS_hid.c ****     else\r
- 246:.\Generated_Source\PSoC5/USBFS_hid.c ****     {   /* requestHandled is initialized as FALSE by default */\r
- 247:.\Generated_Source\PSoC5/USBFS_hid.c ****     }\r
- 248:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 249:.\Generated_Source\PSoC5/USBFS_hid.c ****     return(requestHandled);\r
- 250:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 251:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 252:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 253:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
- 254:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USB_FindHidClassDescriptor\r
- 255:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
- 256:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 257:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
- 258:.\Generated_Source\PSoC5/USBFS_hid.c **** *  This routine find Hid Class Descriptor pointer based on the Interface number\r
- 259:.\Generated_Source\PSoC5/USBFS_hid.c **** *  and Alternate setting then loads the currentTD structure with the address of\r
- 260:.\Generated_Source\PSoC5/USBFS_hid.c **** *  the buffer and the size.\r
- 261:.\Generated_Source\PSoC5/USBFS_hid.c **** *  The HID Class Descriptor resides inside the config descriptor.\r
- 262:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 263:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
- 264:.\Generated_Source\PSoC5/USBFS_hid.c **** *  None.\r
- 265:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 266:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
- 267:.\Generated_Source\PSoC5/USBFS_hid.c **** *  currentTD\r
- 268:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 269:.\Generated_Source\PSoC5/USBFS_hid.c **** * Reentrant:\r
- 270:.\Generated_Source\PSoC5/USBFS_hid.c **** *  No.\r
- 271:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 272:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
- 273:.\Generated_Source\PSoC5/USBFS_hid.c **** void USBFS_FindHidClassDecriptor(void) \r
- 274:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
- 111                           .loc 1 274 0\r
- 112                           .cfi_startproc\r
- 113                           @ args = 0, pretend = 0, frame = 0\r
- 114                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 115 0000 08B5                 push    {r3, lr}\r
- 116                   .LCFI0:\r
- 117                           .cfi_def_cfa_offset 8\r
- 118                           .cfi_offset 3, -8\r
- 119                           .cfi_offset 14, -4\r
- 275:.\Generated_Source\PSoC5/USBFS_hid.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 276:.\Generated_Source\PSoC5/USBFS_hid.c ****     volatile uint8 *pDescr;\r
- 277:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 interfaceN;\r
- 278:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 279:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 8\r
-\r
-\r
- 120                           .loc 1 279 0\r
- 121 0002 0B4B                 ldr     r3, .L12\r
- 122 0004 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 123 0006 411E                 subs    r1, r0, #1\r
- 124 0008 C8B2                 uxtb    r0, r1\r
- 125 000a FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 126                   .LVL10:\r
- 280:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
- 127                           .loc 1 280 0\r
- 128 000e 094A                 ldr     r2, .L12+4\r
- 281:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Third entry in the LUT starts the Interface Table pointers */\r
- 282:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Now use the request interface number*/\r
- 283:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[interfaceN + 2u];\r
- 284:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */\r
- 285:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 286:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Now use Alternate setting number */\r
- 287:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
- 129                           .loc 1 287 0\r
- 130 0010 0949                 ldr     r1, .L12+8\r
- 280:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
- 131                           .loc 1 280 0\r
- 132 0012 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 133                   .LVL11:\r
- 283:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[interfaceN + 2u];\r
- 134                           .loc 1 283 0\r
- 135 0014 00EBC300             add     r0, r0, r3, lsl #3\r
- 136                   .LVL12:\r
- 285:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 137                           .loc 1 285 0\r
- 138 0018 4269                 ldr     r2, [r0, #20]\r
- 139                   .LVL13:\r
- 140                           .loc 1 287 0\r
- 141 001a CB5C                 ldrb    r3, [r1, r3]    @ zero_extendqisi2\r
- 142                   .LVL14:\r
- 143 001c 02EBC300             add     r0, r2, r3, lsl #3\r
- 144                   .LVL15:\r
- 288:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
- 289:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 290:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Fifth entry in the LUT points to Hid Class Descriptor in Configuration Descriptor */\r
- 291:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[4u];\r
- 292:.\Generated_Source\PSoC5/USBFS_hid.c ****     pDescr = (volatile uint8 *)pTmp->p_list;\r
- 145                           .loc 1 292 0\r
- 146 0020 4268                 ldr     r2, [r0, #4]\r
- 293:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* The first byte contains the descriptor length */\r
- 294:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.count = *pDescr;\r
- 147                           .loc 1 294 0\r
- 148 0022 064B                 ldr     r3, .L12+12\r
- 292:.\Generated_Source\PSoC5/USBFS_hid.c ****     pDescr = (volatile uint8 *)pTmp->p_list;\r
- 149                           .loc 1 292 0\r
- 150 0024 506A                 ldr     r0, [r2, #36]\r
- 151                   .LVL16:\r
- 152                           .loc 1 294 0\r
- 153 0026 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 154 0028 1980                 strh    r1, [r3, #0]    @ movhi\r
- 295:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.pData = pDescr;\r
- 155                           .loc 1 295 0\r
- 156 002a 5860                 str     r0, [r3, #4]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 9\r
-\r
-\r
- 157 002c 08BD                 pop     {r3, pc}\r
- 158                   .L13:\r
- 159 002e 00BF                 .align  2\r
- 160                   .L12:\r
- 161 0030 00000000             .word   USBFS_configuration\r
- 162 0034 04600040             .word   1073766404\r
- 163 0038 00000000             .word   USBFS_interfaceSetting\r
- 164 003c 00000000             .word   USBFS_currentTD\r
- 165                           .cfi_endproc\r
- 166                   .LFE3:\r
- 167                           .size   USBFS_FindHidClassDecriptor, .-USBFS_FindHidClassDecriptor\r
- 168                           .section        .text.USBFS_FindReportDescriptor,"ax",%progbits\r
- 169                           .align  1\r
- 170                           .global USBFS_FindReportDescriptor\r
- 171                           .thumb\r
- 172                           .thumb_func\r
- 173                           .type   USBFS_FindReportDescriptor, %function\r
- 174                   USBFS_FindReportDescriptor:\r
- 175                   .LFB4:\r
- 296:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 297:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 298:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 299:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
- 300:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USB_FindReportDescriptor\r
- 301:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
- 302:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 303:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
- 304:.\Generated_Source\PSoC5/USBFS_hid.c **** *  This routine find Hid Report Descriptor pointer based on the Interface\r
- 305:.\Generated_Source\PSoC5/USBFS_hid.c **** *  number, then loads the currentTD structure with the address of the buffer\r
- 306:.\Generated_Source\PSoC5/USBFS_hid.c **** *  and the size.\r
- 307:.\Generated_Source\PSoC5/USBFS_hid.c **** *  Hid Report Descriptor is located after IN/OUT/FEATURE reports.\r
- 308:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 309:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
- 310:.\Generated_Source\PSoC5/USBFS_hid.c **** *   void\r
- 311:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 312:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
- 313:.\Generated_Source\PSoC5/USBFS_hid.c **** *  currentTD\r
- 314:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 315:.\Generated_Source\PSoC5/USBFS_hid.c **** * Reentrant:\r
- 316:.\Generated_Source\PSoC5/USBFS_hid.c **** *  No.\r
- 317:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 318:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
- 319:.\Generated_Source\PSoC5/USBFS_hid.c **** void USBFS_FindReportDescriptor(void) \r
- 320:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
- 176                           .loc 1 320 0\r
- 177                           .cfi_startproc\r
- 178                           @ args = 0, pretend = 0, frame = 0\r
- 179                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 180 0000 08B5                 push    {r3, lr}\r
- 181                   .LCFI1:\r
- 182                           .cfi_def_cfa_offset 8\r
- 183                           .cfi_offset 3, -8\r
- 184                           .cfi_offset 14, -4\r
- 321:.\Generated_Source\PSoC5/USBFS_hid.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 322:.\Generated_Source\PSoC5/USBFS_hid.c ****     volatile uint8 *pDescr;\r
- 323:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 interfaceN;\r
- 324:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 10\r
-\r
-\r
- 325:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 185                           .loc 1 325 0\r
- 186 0002 0D4B                 ldr     r3, .L15\r
- 187 0004 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 188 0006 411E                 subs    r1, r0, #1\r
- 189 0008 C8B2                 uxtb    r0, r1\r
- 190 000a FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 191                   .LVL17:\r
- 326:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
- 192                           .loc 1 326 0\r
- 193 000e 0B4A                 ldr     r2, .L15+4\r
- 327:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Third entry in the LUT starts the Interface Table pointers */\r
- 328:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Now use the request interface number */\r
- 329:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[interfaceN + 2u];\r
- 330:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */\r
- 331:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 332:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Now use Alternate setting number */\r
- 333:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
- 194                           .loc 1 333 0\r
- 195 0010 0B49                 ldr     r1, .L15+8\r
- 326:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
- 196                           .loc 1 326 0\r
- 197 0012 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 198                   .LVL18:\r
- 329:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[interfaceN + 2u];\r
- 199                           .loc 1 329 0\r
- 200 0014 00EBC300             add     r0, r0, r3, lsl #3\r
- 201                   .LVL19:\r
- 331:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 202                           .loc 1 331 0\r
- 203 0018 4269                 ldr     r2, [r0, #20]\r
- 204                   .LVL20:\r
- 205                           .loc 1 333 0\r
- 206 001a CB5C                 ldrb    r3, [r1, r3]    @ zero_extendqisi2\r
- 207                   .LVL21:\r
- 208 001c 02EBC300             add     r0, r2, r3, lsl #3\r
- 209                   .LVL22:\r
- 334:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
- 335:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 336:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Fourth entry in the LUT starts the Hid Report Descriptor */\r
- 337:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[3u];\r
- 338:.\Generated_Source\PSoC5/USBFS_hid.c ****     pDescr = (volatile uint8 *)pTmp->p_list;\r
- 210                           .loc 1 338 0\r
- 211 0020 4268                 ldr     r2, [r0, #4]\r
- 212 0022 D369                 ldr     r3, [r2, #28]\r
- 213                   .LVL23:\r
- 339:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* The 1st and 2nd bytes of descriptor contain its length. LSB is 1st. */\r
- 340:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.count =  (((uint16)pDescr[1u] << 8u) | pDescr[0u]);\r
- 214                           .loc 1 340 0\r
- 215 0024 074A                 ldr     r2, .L15+12\r
- 216 0026 5978                 ldrb    r1, [r3, #1]    @ zero_extendqisi2\r
- 217 0028 13F8020B             ldrb    r0, [r3], #2    @ zero_extendqisi2\r
- 218                   .LVL24:\r
- 219 002c 40EA0121             orr     r1, r0, r1, lsl #8\r
- 220 0030 1180                 strh    r1, [r2, #0]    @ movhi\r
- 341:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.pData = &pDescr[2u];\r
- 221                           .loc 1 341 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 11\r
-\r
-\r
- 222 0032 5360                 str     r3, [r2, #4]\r
- 223 0034 08BD                 pop     {r3, pc}\r
- 224                   .L16:\r
- 225 0036 00BF                 .align  2\r
- 226                   .L15:\r
- 227 0038 00000000             .word   USBFS_configuration\r
- 228 003c 04600040             .word   1073766404\r
- 229 0040 00000000             .word   USBFS_interfaceSetting\r
- 230 0044 00000000             .word   USBFS_currentTD\r
- 231                           .cfi_endproc\r
- 232                   .LFE4:\r
- 233                           .size   USBFS_FindReportDescriptor, .-USBFS_FindReportDescriptor\r
- 234                           .section        .text.USBFS_FindReport,"ax",%progbits\r
- 235                           .align  1\r
- 236                           .global USBFS_FindReport\r
- 237                           .thumb\r
- 238                           .thumb_func\r
- 239                           .type   USBFS_FindReport, %function\r
- 240                   USBFS_FindReport:\r
- 241                   .LFB5:\r
- 342:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 343:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 344:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 345:.\Generated_Source\PSoC5/USBFS_hid.c **** /*******************************************************************************\r
- 346:.\Generated_Source\PSoC5/USBFS_hid.c **** * Function Name: USBFS_FindReport\r
- 347:.\Generated_Source\PSoC5/USBFS_hid.c **** ********************************************************************************\r
- 348:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 349:.\Generated_Source\PSoC5/USBFS_hid.c **** * Summary:\r
- 350:.\Generated_Source\PSoC5/USBFS_hid.c **** *  This routine sets up a transfer based on the Interface number, Report Type\r
- 351:.\Generated_Source\PSoC5/USBFS_hid.c **** *  and Report ID, then loads the currentTD structure with the address of the\r
- 352:.\Generated_Source\PSoC5/USBFS_hid.c **** *  buffer and the size.  The caller has to decide if it is a control read or\r
- 353:.\Generated_Source\PSoC5/USBFS_hid.c **** *  control write.\r
- 354:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 355:.\Generated_Source\PSoC5/USBFS_hid.c **** * Parameters:\r
- 356:.\Generated_Source\PSoC5/USBFS_hid.c **** *  None.\r
- 357:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 358:.\Generated_Source\PSoC5/USBFS_hid.c **** * Return:\r
- 359:.\Generated_Source\PSoC5/USBFS_hid.c **** *  currentTD\r
- 360:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 361:.\Generated_Source\PSoC5/USBFS_hid.c **** * Reentrant:\r
- 362:.\Generated_Source\PSoC5/USBFS_hid.c **** *  No.\r
- 363:.\Generated_Source\PSoC5/USBFS_hid.c **** *\r
- 364:.\Generated_Source\PSoC5/USBFS_hid.c **** *******************************************************************************/\r
- 365:.\Generated_Source\PSoC5/USBFS_hid.c **** void USBFS_FindReport(void) \r
- 366:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
- 242                           .loc 1 366 0\r
- 243                           .cfi_startproc\r
- 244                           @ args = 0, pretend = 0, frame = 0\r
- 245                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 246 0000 10B5                 push    {r4, lr}\r
- 247                   .LCFI2:\r
- 248                           .cfi_def_cfa_offset 8\r
- 249                           .cfi_offset 4, -8\r
- 250                           .cfi_offset 14, -4\r
- 367:.\Generated_Source\PSoC5/USBFS_hid.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 368:.\Generated_Source\PSoC5/USBFS_hid.c ****     T_USBFS_TD *pTD;\r
- 369:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 interfaceN;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 12\r
-\r
-\r
- 370:.\Generated_Source\PSoC5/USBFS_hid.c ****     uint8 reportType;\r
- 371:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 372:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* `#START HID_FINDREPORT` Place custom handling here */\r
- 373:.\Generated_Source\PSoC5/USBFS_hid.c **** \r
- 374:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* `#END` */\r
- 375:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.count = 0u;   /* Init not supported condition */\r
- 251                           .loc 1 375 0\r
- 252 0002 164C                 ldr     r4, .L19\r
- 253 0004 0023                 movs    r3, #0\r
- 376:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 254                           .loc 1 376 0\r
- 255 0006 1648                 ldr     r0, .L19+4\r
- 375:.\Generated_Source\PSoC5/USBFS_hid.c ****     USBFS_currentTD.count = 0u;   /* Init not supported condition */\r
- 256                           .loc 1 375 0\r
- 257 0008 2380                 strh    r3, [r4, #0]    @ movhi\r
- 258                           .loc 1 376 0\r
- 259 000a 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 260 000c 4A1E                 subs    r2, r1, #1\r
- 261 000e D0B2                 uxtb    r0, r2\r
- 262 0010 FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 263                   .LVL25:\r
- 377:.\Generated_Source\PSoC5/USBFS_hid.c ****     reportType = CY_GET_REG8(USBFS_wValueHi);\r
- 378:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
- 264                           .loc 1 378 0\r
- 265 0014 1349                 ldr     r1, .L19+8\r
- 377:.\Generated_Source\PSoC5/USBFS_hid.c ****     reportType = CY_GET_REG8(USBFS_wValueHi);\r
- 266                           .loc 1 377 0\r
- 267 0016 144B                 ldr     r3, .L19+12\r
- 268 0018 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 269                   .LVL26:\r
- 270                           .loc 1 378 0\r
- 271 001a 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 272                   .LVL27:\r
- 379:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Third entry in the LUT COnfiguration Table starts the Interface Table pointers */\r
- 380:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* Now use the request interface number */\r
- 381:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = &pTmp[interfaceN + 2u];\r
- 273                           .loc 1 381 0\r
- 274 001c 00EBC200             add     r0, r0, r2, lsl #3\r
- 275                   .LVL28:\r
- 382:.\Generated_Source\PSoC5/USBFS_hid.c ****     /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE*/\r
- 383:.\Generated_Source\PSoC5/USBFS_hid.c ****     pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 276                           .loc 1 383 0\r
- 277 0020 4169                 ldr     r1, [r0, #20]\r
- 278                   .LVL29:\r
- 384:.\Generated_Source\PSoC5/USBFS_hid.c ****     if(interfaceN < USBFS_MAX_INTERFACES_NUMBER)\r
- 279                           .loc 1 384 0\r
- 280 0022 D2B9                 cbnz    r2, .L17\r
- 385:.\Generated_Source\PSoC5/USBFS_hid.c ****     {\r
- 386:.\Generated_Source\PSoC5/USBFS_hid.c ****         /* Now use Alternate setting number */\r
- 387:.\Generated_Source\PSoC5/USBFS_hid.c ****         pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
- 281                           .loc 1 387 0\r
- 282 0024 114A                 ldr     r2, .L19+16\r
- 283                   .LVL30:\r
- 388:.\Generated_Source\PSoC5/USBFS_hid.c ****         /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
- 389:.\Generated_Source\PSoC5/USBFS_hid.c ****         pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 390:.\Generated_Source\PSoC5/USBFS_hid.c ****         /* Validate reportType to comply with "7.2.1 Get_Report Request" */\r
- 391:.\Generated_Source\PSoC5/USBFS_hid.c ****         if((reportType >= USBFS_HID_GET_REPORT_INPUT) &&\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 13\r
-\r
-\r
- 284                           .loc 1 391 0\r
- 285 0026 013B                 subs    r3, r3, #1\r
- 286                   .LVL31:\r
- 387:.\Generated_Source\PSoC5/USBFS_hid.c ****         pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
- 287                           .loc 1 387 0\r
- 288 0028 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 289                           .loc 1 391 0\r
- 290 002a DAB2                 uxtb    r2, r3\r
- 387:.\Generated_Source\PSoC5/USBFS_hid.c ****         pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
- 291                           .loc 1 387 0\r
- 292 002c 01EBC001             add     r1, r1, r0, lsl #3\r
- 293                   .LVL32:\r
- 294                           .loc 1 391 0\r
- 295 0030 022A                 cmp     r2, #2\r
- 389:.\Generated_Source\PSoC5/USBFS_hid.c ****         pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
- 296                           .loc 1 389 0\r
- 297 0032 4968                 ldr     r1, [r1, #4]\r
- 298                   .LVL33:\r
- 299                           .loc 1 391 0\r
- 300 0034 11D8                 bhi     .L17\r
- 392:.\Generated_Source\PSoC5/USBFS_hid.c ****            (reportType <= USBFS_HID_GET_REPORT_FEATURE))\r
- 393:.\Generated_Source\PSoC5/USBFS_hid.c ****         {\r
- 394:.\Generated_Source\PSoC5/USBFS_hid.c ****             /* Get the entry proper TD (IN, OUT or Feature Report Table)*/\r
- 395:.\Generated_Source\PSoC5/USBFS_hid.c ****             pTmp = &pTmp[reportType - 1u];\r
- 396:.\Generated_Source\PSoC5/USBFS_hid.c ****             reportType = CY_GET_REG8(USBFS_wValueLo);    /* Get reportID */\r
- 301                           .loc 1 396 0\r
- 302 0036 0E4A                 ldr     r2, .L19+20\r
- 395:.\Generated_Source\PSoC5/USBFS_hid.c ****             pTmp = &pTmp[reportType - 1u];\r
- 303                           .loc 1 395 0\r
- 304 0038 01EBC300             add     r0, r1, r3, lsl #3\r
- 305                   .LVL34:\r
- 306                           .loc 1 396 0\r
- 307 003c 1278                 ldrb    r2, [r2, #0]    @ zero_extendqisi2\r
- 308                   .LVL35:\r
- 397:.\Generated_Source\PSoC5/USBFS_hid.c ****             /* Validate table support by the HID descriptor, compare table count with reportID */\r
- 398:.\Generated_Source\PSoC5/USBFS_hid.c ****             if(pTmp->c >= reportType)\r
- 309                           .loc 1 398 0\r
- 310 003e 11F83310             ldrb    r1, [r1, r3, lsl #3]    @ zero_extendqisi2\r
- 311 0042 9142                 cmp     r1, r2\r
- 312 0044 09D3                 bcc     .L17\r
- 399:.\Generated_Source\PSoC5/USBFS_hid.c ****             {\r
- 400:.\Generated_Source\PSoC5/USBFS_hid.c ****                 pTD = (T_USBFS_TD *) pTmp->p_list;\r
- 401:.\Generated_Source\PSoC5/USBFS_hid.c ****                 pTD = &pTD[reportType];                          /* select entry depend on report I\r
- 313                           .loc 1 401 0\r
- 314 0046 0C23                 movs    r3, #12\r
- 315 0048 5A43                 muls    r2, r3, r2\r
- 316                   .LVL36:\r
- 400:.\Generated_Source\PSoC5/USBFS_hid.c ****                 pTD = (T_USBFS_TD *) pTmp->p_list;\r
- 317                           .loc 1 400 0\r
- 318 004a 4168                 ldr     r1, [r0, #4]\r
- 319                   .LVL37:\r
- 320                           .loc 1 401 0\r
- 321 004c 8B18                 adds    r3, r1, r2\r
- 322                   .LVL38:\r
- 402:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_currentTD.pData = pTD->pData;   /* Buffer pointer */\r
- 323                           .loc 1 402 0\r
- 324 004e 5868                 ldr     r0, [r3, #4]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 14\r
-\r
-\r
- 325                   .LVL39:\r
- 403:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_currentTD.count = pTD->count;   /* Buffer Size */\r
- 326                           .loc 1 403 0\r
- 327 0050 8A5A                 ldrh    r2, [r1, r2]\r
- 404:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_currentTD.pStatusBlock = pTD->pStatusBlock;\r
- 328                           .loc 1 404 0\r
- 329 0052 9968                 ldr     r1, [r3, #8]\r
- 402:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_currentTD.pData = pTD->pData;   /* Buffer pointer */\r
- 330                           .loc 1 402 0\r
- 331 0054 6060                 str     r0, [r4, #4]\r
- 403:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_currentTD.count = pTD->count;   /* Buffer Size */\r
- 332                           .loc 1 403 0\r
- 333 0056 2280                 strh    r2, [r4, #0]    @ movhi\r
- 334                           .loc 1 404 0\r
- 335 0058 A160                 str     r1, [r4, #8]\r
- 336                   .LVL40:\r
- 337                   .L17:\r
- 338 005a 10BD                 pop     {r4, pc}\r
- 339                   .L20:\r
- 340                           .align  2\r
- 341                   .L19:\r
- 342 005c 00000000             .word   USBFS_currentTD\r
- 343 0060 00000000             .word   USBFS_configuration\r
- 344 0064 04600040             .word   1073766404\r
- 345 0068 03600040             .word   1073766403\r
- 346 006c 00000000             .word   USBFS_interfaceSetting\r
- 347 0070 02600040             .word   1073766402\r
- 348                           .cfi_endproc\r
- 349                   .LFE5:\r
- 350                           .size   USBFS_FindReport, .-USBFS_FindReport\r
- 351                           .section        .text.USBFS_DispatchHIDClassRqst,"ax",%progbits\r
- 352                           .align  1\r
- 353                           .global USBFS_DispatchHIDClassRqst\r
- 354                           .thumb\r
- 355                           .thumb_func\r
- 356                           .type   USBFS_DispatchHIDClassRqst, %function\r
- 357                   USBFS_DispatchHIDClassRqst:\r
- 358                   .LFB2:\r
- 120:.\Generated_Source\PSoC5/USBFS_hid.c **** {\r
- 359                           .loc 1 120 0\r
- 360                           .cfi_startproc\r
- 361                           @ args = 0, pretend = 0, frame = 0\r
- 362                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 363                   .LVL41:\r
- 364 0000 10B5                 push    {r4, lr}\r
- 365                   .LCFI3:\r
- 366                           .cfi_def_cfa_offset 8\r
- 367                           .cfi_offset 4, -8\r
- 368                           .cfi_offset 14, -4\r
- 124:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 369                           .loc 1 124 0\r
- 370 0002 3A4B                 ldr     r3, .L57\r
- 125:.\Generated_Source\PSoC5/USBFS_hid.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
- 371                           .loc 1 125 0\r
- 372 0004 3A4A                 ldr     r2, .L57+4\r
- 124:.\Generated_Source\PSoC5/USBFS_hid.c ****     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 373                           .loc 1 124 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 15\r
-\r
-\r
- 374 0006 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 375                   .LVL42:\r
- 125:.\Generated_Source\PSoC5/USBFS_hid.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
- 376                           .loc 1 125 0\r
- 377 0008 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 378 000a 0906                 lsls    r1, r1, #24\r
- 379 000c 34D5                 bpl     .L22\r
- 127:.\Generated_Source\PSoC5/USBFS_hid.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 380                           .loc 1 127 0\r
- 381 000e 511C                 adds    r1, r2, #1\r
- 382 0010 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 383 0012 5A1E                 subs    r2, r3, #1\r
- 384 0014 052A                 cmp     r2, #5\r
- 385 0016 67D8                 bhi     .L23\r
- 386 0018 DFE802F0             tbb     [pc, r2]\r
- 387                   .L28:\r
- 388 001c 10                   .byte   (.L24-.L28)/2\r
- 389 001d 18                   .byte   (.L25-.L28)/2\r
- 390 001e 27                   .byte   (.L26-.L28)/2\r
- 391 001f 66                   .byte   (.L23-.L28)/2\r
- 392 0020 66                   .byte   (.L23-.L28)/2\r
- 393 0021 03                   .byte   (.L27-.L28)/2\r
- 394                           .align  1\r
- 395                   .L27:\r
- 130:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_CLASS)\r
- 396                           .loc 1 130 0\r
- 397 0022 3448                 ldr     r0, .L57+8\r
- 398                   .LVL43:\r
- 399 0024 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 400 0026 2129                 cmp     r1, #33\r
- 401 0028 02D1                 bne     .L29\r
- 132:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_FindHidClassDecriptor();\r
- 402                           .loc 1 132 0\r
- 403 002a FFF7FEFF             bl      USBFS_FindHidClassDecriptor\r
- 404                   .LVL44:\r
- 405 002e 07E0                 b       .L54\r
- 406                   .L29:\r
- 138:.\Generated_Source\PSoC5/USBFS_hid.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_REPORT)\r
- 407                           .loc 1 138 0\r
- 408 0030 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 409 0032 222B                 cmp     r3, #34\r
- 410 0034 58D1                 bne     .L23\r
- 140:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_FindReportDescriptor();\r
- 411                           .loc 1 140 0\r
- 412 0036 FFF7FEFF             bl      USBFS_FindReportDescriptor\r
- 413                   .LVL45:\r
- 414 003a 01E0                 b       .L54\r
- 415                   .LVL46:\r
- 416                   .L24:\r
- 151:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_FindReport();\r
- 417                           .loc 1 151 0\r
- 418 003c FFF7FEFF             bl      USBFS_FindReport\r
- 419                   .LVL47:\r
- 420                   .L54:\r
- 152:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (USBFS_currentTD.count != 0u)\r
- 421                           .loc 1 152 0\r
- 422 0040 2D49                 ldr     r1, .L57+12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 16\r
-\r
-\r
- 423 0042 0B88                 ldrh    r3, [r1, #0]\r
- 424 0044 98B2                 uxth    r0, r3\r
- 425 0046 0028                 cmp     r0, #0\r
- 426 0048 4ED0                 beq     .L23\r
- 427 004a 0AE0                 b       .L51\r
- 428                   .LVL48:\r
- 429                   .L25:\r
- 161:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 430                           .loc 1 161 0\r
- 431 004c 0028                 cmp     r0, #0\r
- 432 004e 4BD1                 bne     .L23\r
- 162:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
- 433                           .loc 1 162 0 discriminator 1\r
- 434 0050 2A4B                 ldr     r3, .L57+16\r
- 435 0052 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 436                   .LVL49:\r
- 161:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 437                           .loc 1 161 0 discriminator 1\r
- 438 0054 0028                 cmp     r0, #0\r
- 439 0056 47D1                 bne     .L23\r
- 164:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.count = 1u;\r
- 440                           .loc 1 164 0\r
- 441 0058 2748                 ldr     r0, .L57+12\r
- 442 005a 0122                 movs    r2, #1\r
- 165:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.pData = &USBFS_hidIdleRate[interfaceNumber];\r
- 443                           .loc 1 165 0\r
- 444 005c 2849                 ldr     r1, .L57+20\r
- 164:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.count = 1u;\r
- 445                           .loc 1 164 0\r
- 446 005e 0280                 strh    r2, [r0, #0]    @ movhi\r
- 447                   .L52:\r
- 165:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.pData = &USBFS_hidIdleRate[interfaceNumber];\r
- 448                           .loc 1 165 0\r
- 449 0060 4160                 str     r1, [r0, #4]\r
- 450                   .L51:\r
- 250:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 451                           .loc 1 250 0\r
- 452 0062 BDE81040             pop     {r4, lr}\r
- 166:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 453                           .loc 1 166 0\r
- 454 0066 FFF7FEBF             b       USBFS_InitControlRead\r
- 455                   .LVL50:\r
- 456                   .L26:\r
- 171:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( interfaceNumber < USBFS_MAX_INTERFACES_NUMBER)\r
- 457                           .loc 1 171 0\r
- 458 006a 0028                 cmp     r0, #0\r
- 459 006c 3CD1                 bne     .L23\r
- 173:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.count = 1u;\r
- 460                           .loc 1 173 0\r
- 461 006e 2248                 ldr     r0, .L57+12\r
- 462                   .LVL51:\r
- 463 0070 0122                 movs    r2, #1\r
- 464 0072 0280                 strh    r2, [r0, #0]    @ movhi\r
- 174:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_currentTD.pData = &USBFS_hidProtocol[interfaceNumber];\r
- 465                           .loc 1 174 0\r
- 466 0074 2349                 ldr     r1, .L57+24\r
- 467 0076 F3E7                 b       .L52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 17\r
-\r
-\r
- 468                   .LVL52:\r
- 469                   .L22:\r
- 182:.\Generated_Source\PSoC5/USBFS_hid.c ****     else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) ==\r
- 470                           .loc 1 182 0\r
- 471 0078 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 472 007a 1A06                 lsls    r2, r3, #24\r
- 473 007c 34D4                 bmi     .L23\r
- 185:.\Generated_Source\PSoC5/USBFS_hid.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 474                           .loc 1 185 0\r
- 475 007e 224A                 ldr     r2, .L57+28\r
- 476 0080 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 477 0082 0929                 cmp     r1, #9\r
- 478 0084 05D0                 beq     .L32\r
- 479 0086 2FD3                 bcc     .L23\r
- 480 0088 0A29                 cmp     r1, #10\r
- 481 008a 0DD0                 beq     .L33\r
- 482 008c 0B29                 cmp     r1, #11\r
- 483 008e 2BD1                 bne     .L23\r
- 484 0090 22E0                 b       .L56\r
- 485                   .L32:\r
- 188:.\Generated_Source\PSoC5/USBFS_hid.c ****                 USBFS_FindReport();\r
- 486                           .loc 1 188 0\r
- 487 0092 FFF7FEFF             bl      USBFS_FindReport\r
- 488                   .LVL53:\r
- 189:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if (USBFS_currentTD.count != 0u)\r
- 489                           .loc 1 189 0\r
- 490 0096 184B                 ldr     r3, .L57+12\r
- 491 0098 1A88                 ldrh    r2, [r3, #0]\r
- 492 009a 90B2                 uxth    r0, r2\r
- 493 009c 0028                 cmp     r0, #0\r
- 494 009e 23D0                 beq     .L23\r
- 250:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 495                           .loc 1 250 0\r
- 496 00a0 BDE81040             pop     {r4, lr}\r
- 191:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitControlWrite();\r
- 497                           .loc 1 191 0\r
- 498 00a4 FFF7FEBF             b       USBFS_InitControlWrite\r
- 499                   .LVL54:\r
- 500                   .L33:\r
- 197:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 501                           .loc 1 197 0\r
- 502 00a8 F0B9                 cbnz    r0, .L23\r
- 198:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
- 503                           .loc 1 198 0 discriminator 1\r
- 504 00aa 1448                 ldr     r0, .L57+16\r
- 505                   .LVL55:\r
- 506 00ac 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 197:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 507                           .loc 1 197 0 discriminator 1\r
- 508 00ae D9B9                 cbnz    r1, .L23\r
- 200:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_hidIdleRate[interfaceNumber] = CY_GET_REG8(USBFS_wValueHi);\r
- 509                           .loc 1 200 0\r
- 510 00b0 441C                 adds    r4, r0, #1\r
- 511 00b2 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 512 00b4 124A                 ldr     r2, .L57+20\r
- 513 00b6 1370                 strb    r3, [r2, #0]\r
- 207:.\Generated_Source\PSoC5/USBFS_hid.c ****                        USBFS_hidIdleTimer[interfaceNumber])\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 18\r
-\r
-\r
- 514                           .loc 1 207 0\r
- 515 00b8 144B                 ldr     r3, .L57+32\r
- 206:.\Generated_Source\PSoC5/USBFS_hid.c ****                     if(USBFS_hidIdleRate[interfaceNumber] <\r
- 516                           .loc 1 206 0\r
- 517 00ba 1478                 ldrb    r4, [r2, #0]    @ zero_extendqisi2\r
- 207:.\Generated_Source\PSoC5/USBFS_hid.c ****                        USBFS_hidIdleTimer[interfaceNumber])\r
- 518                           .loc 1 207 0\r
- 519 00bc 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 206:.\Generated_Source\PSoC5/USBFS_hid.c ****                     if(USBFS_hidIdleRate[interfaceNumber] <\r
- 520                           .loc 1 206 0\r
- 521 00be 8442                 cmp     r4, r0\r
- 522 00c0 01D2                 bcs     .L35\r
- 210:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleTimer[interfaceNumber] = 0u;\r
- 523                           .loc 1 210 0\r
- 524 00c2 1970                 strb    r1, [r3, #0]\r
- 525 00c4 04E0                 b       .L36\r
- 526                   .L35:\r
- 216:.\Generated_Source\PSoC5/USBFS_hid.c ****                     else if(USBFS_hidIdleTimer[interfaceNumber] <= 1u)\r
- 527                           .loc 1 216 0\r
- 528 00c6 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 529 00c8 0129                 cmp     r1, #1\r
- 530 00ca 01D9                 bls     .L36\r
- 226:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleRate[interfaceNumber];\r
- 531                           .loc 1 226 0\r
- 532 00cc 1278                 ldrb    r2, [r2, #0]    @ zero_extendqisi2\r
- 533                   .L50:\r
- 225:.\Generated_Source\PSoC5/USBFS_hid.c ****                         USBFS_hidIdleTimer[interfaceNumber] =\r
- 534                           .loc 1 225 0\r
- 535 00ce 1A70                 strb    r2, [r3, #0]\r
- 536                   .L36:\r
- 250:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 537                           .loc 1 250 0\r
- 538 00d0 BDE81040             pop     {r4, lr}\r
- 228:.\Generated_Source\PSoC5/USBFS_hid.c ****                     requestHandled = USBFS_InitNoDataControlTransfer();\r
- 539                           .loc 1 228 0\r
- 540 00d4 FFF7FEBF             b       USBFS_InitNoDataControlTransfer\r
- 541                   .LVL56:\r
- 542                   .L56:\r
- 234:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 543                           .loc 1 234 0\r
- 544 00d8 30B9                 cbnz    r0, .L23\r
- 235:.\Generated_Source\PSoC5/USBFS_hid.c ****                     (CY_GET_REG8(USBFS_wValueLo) <= 1u) )\r
- 545                           .loc 1 235 0 discriminator 1\r
- 546 00da 0848                 ldr     r0, .L57+16\r
- 547                   .LVL57:\r
- 548 00dc 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 234:.\Generated_Source\PSoC5/USBFS_hid.c ****                 if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
- 549                           .loc 1 234 0 discriminator 1\r
- 550 00de 012B                 cmp     r3, #1\r
- 551 00e0 02D8                 bhi     .L23\r
- 237:.\Generated_Source\PSoC5/USBFS_hid.c ****                     USBFS_hidProtocol[interfaceNumber] = CY_GET_REG8(USBFS_wValueLo);\r
- 552                           .loc 1 237 0\r
- 553 00e2 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 554 00e4 074B                 ldr     r3, .L57+24\r
- 555 00e6 F2E7                 b       .L50\r
- 556                   .L23:\r
- 557                   .LVL58:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 19\r
-\r
-\r
- 250:.\Generated_Source\PSoC5/USBFS_hid.c **** }\r
- 558                           .loc 1 250 0\r
- 559 00e8 0020                 movs    r0, #0\r
- 560 00ea 10BD                 pop     {r4, pc}\r
- 561                   .L58:\r
- 562                           .align  2\r
- 563                   .L57:\r
- 564 00ec 04600040             .word   1073766404\r
- 565 00f0 00600040             .word   1073766400\r
- 566 00f4 03600040             .word   1073766403\r
- 567 00f8 00000000             .word   USBFS_currentTD\r
- 568 00fc 02600040             .word   1073766402\r
- 569 0100 00000000             .word   USBFS_hidIdleRate\r
- 570 0104 00000000             .word   USBFS_hidProtocol\r
- 571 0108 01600040             .word   1073766401\r
- 572 010c 00000000             .word   USBFS_hidIdleTimer\r
- 573                           .cfi_endproc\r
- 574                   .LFE2:\r
- 575                           .size   USBFS_DispatchHIDClassRqst, .-USBFS_DispatchHIDClassRqst\r
- 576                           .comm   USBFS_hidIdleTimer,1,1\r
- 577                           .comm   USBFS_hidIdleRate,1,1\r
- 578                           .comm   USBFS_hidProtocol,1,1\r
- 579                           .text\r
- 580                   .Letext0:\r
- 581                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 582                           .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 583                           .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 584                           .section        .debug_info,"",%progbits\r
- 585                   .Ldebug_info0:\r
- 586 0000 2C040000             .4byte  0x42c\r
- 587 0004 0200                 .2byte  0x2\r
- 588 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 589 000a 04                   .byte   0x4\r
- 590 000b 01                   .uleb128 0x1\r
- 591 000c B5020000             .4byte  .LASF48\r
- 592 0010 01                   .byte   0x1\r
- 593 0011 0D000000             .4byte  .LASF49\r
- 594 0015 1D010000             .4byte  .LASF50\r
- 595 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 596 001d 00000000             .4byte  0\r
- 597 0021 00000000             .4byte  0\r
- 598 0025 00000000             .4byte  .Ldebug_line0\r
- 599 0029 02                   .uleb128 0x2\r
- 600 002a 01                   .byte   0x1\r
- 601 002b 06                   .byte   0x6\r
- 602 002c 11030000             .4byte  .LASF0\r
- 603 0030 02                   .uleb128 0x2\r
- 604 0031 01                   .byte   0x1\r
- 605 0032 08                   .byte   0x8\r
- 606 0033 DE000000             .4byte  .LASF1\r
- 607 0037 02                   .uleb128 0x2\r
- 608 0038 02                   .byte   0x2\r
- 609 0039 05                   .byte   0x5\r
- 610 003a B2010000             .4byte  .LASF2\r
- 611 003e 02                   .uleb128 0x2\r
- 612 003f 02                   .byte   0x2\r
- 613 0040 07                   .byte   0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 20\r
-\r
-\r
- 614 0041 67000000             .4byte  .LASF3\r
- 615 0045 02                   .uleb128 0x2\r
- 616 0046 04                   .byte   0x4\r
- 617 0047 05                   .byte   0x5\r
- 618 0048 08030000             .4byte  .LASF4\r
- 619 004c 02                   .uleb128 0x2\r
- 620 004d 04                   .byte   0x4\r
- 621 004e 07                   .byte   0x7\r
- 622 004f 0B010000             .4byte  .LASF5\r
- 623 0053 02                   .uleb128 0x2\r
- 624 0054 08                   .byte   0x8\r
- 625 0055 05                   .byte   0x5\r
- 626 0056 53020000             .4byte  .LASF6\r
- 627 005a 02                   .uleb128 0x2\r
- 628 005b 08                   .byte   0x8\r
- 629 005c 07                   .byte   0x7\r
- 630 005d 0A020000             .4byte  .LASF7\r
- 631 0061 03                   .uleb128 0x3\r
- 632 0062 04                   .byte   0x4\r
- 633 0063 05                   .byte   0x5\r
- 634 0064 696E7400             .ascii  "int\000"\r
- 635 0068 02                   .uleb128 0x2\r
- 636 0069 04                   .byte   0x4\r
- 637 006a 07                   .byte   0x7\r
- 638 006b E2010000             .4byte  .LASF8\r
- 639 006f 04                   .uleb128 0x4\r
- 640 0070 4E010000             .4byte  .LASF9\r
- 641 0074 02                   .byte   0x2\r
- 642 0075 5B                   .byte   0x5b\r
- 643 0076 30000000             .4byte  0x30\r
- 644 007a 04                   .uleb128 0x4\r
- 645 007b BC010000             .4byte  .LASF10\r
- 646 007f 02                   .byte   0x2\r
- 647 0080 5C                   .byte   0x5c\r
- 648 0081 3E000000             .4byte  0x3e\r
- 649 0085 02                   .uleb128 0x2\r
- 650 0086 04                   .byte   0x4\r
- 651 0087 04                   .byte   0x4\r
- 652 0088 B9000000             .4byte  .LASF11\r
- 653 008c 02                   .uleb128 0x2\r
- 654 008d 08                   .byte   0x8\r
- 655 008e 04                   .byte   0x4\r
- 656 008f 95010000             .4byte  .LASF12\r
- 657 0093 02                   .uleb128 0x2\r
- 658 0094 01                   .byte   0x1\r
- 659 0095 08                   .byte   0x8\r
- 660 0096 6D020000             .4byte  .LASF13\r
- 661 009a 04                   .uleb128 0x4\r
- 662 009b EC000000             .4byte  .LASF14\r
- 663 009f 02                   .byte   0x2\r
- 664 00a0 F0                   .byte   0xf0\r
- 665 00a1 A5000000             .4byte  0xa5\r
- 666 00a5 05                   .uleb128 0x5\r
- 667 00a6 6F000000             .4byte  0x6f\r
- 668 00aa 02                   .uleb128 0x2\r
- 669 00ab 04                   .byte   0x4\r
- 670 00ac 07                   .byte   0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 21\r
-\r
-\r
- 671 00ad 4A020000             .4byte  .LASF15\r
- 672 00b1 06                   .uleb128 0x6\r
- 673 00b2 04                   .byte   0x4\r
- 674 00b3 03                   .byte   0x3\r
- 675 00b4 90                   .byte   0x90\r
- 676 00b5 D6000000             .4byte  0xd6\r
- 677 00b9 07                   .uleb128 0x7\r
- 678 00ba 85000000             .4byte  .LASF16\r
- 679 00be 03                   .byte   0x3\r
- 680 00bf 92                   .byte   0x92\r
- 681 00c0 6F000000             .4byte  0x6f\r
- 682 00c4 02                   .byte   0x2\r
- 683 00c5 23                   .byte   0x23\r
- 684 00c6 00                   .uleb128 0\r
- 685 00c7 07                   .uleb128 0x7\r
- 686 00c8 42030000             .4byte  .LASF17\r
- 687 00cc 03                   .byte   0x3\r
- 688 00cd 93                   .byte   0x93\r
- 689 00ce 7A000000             .4byte  0x7a\r
- 690 00d2 02                   .byte   0x2\r
- 691 00d3 23                   .byte   0x23\r
- 692 00d4 02                   .uleb128 0x2\r
- 693 00d5 00                   .byte   0\r
- 694 00d6 04                   .uleb128 0x4\r
- 695 00d7 F1000000             .4byte  .LASF18\r
- 696 00db 03                   .byte   0x3\r
- 697 00dc 94                   .byte   0x94\r
- 698 00dd B1000000             .4byte  0xb1\r
- 699 00e1 06                   .uleb128 0x6\r
- 700 00e2 0C                   .byte   0xc\r
- 701 00e3 03                   .byte   0x3\r
- 702 00e4 96                   .byte   0x96\r
- 703 00e5 14010000             .4byte  0x114\r
- 704 00e9 07                   .uleb128 0x7\r
- 705 00ea 46000000             .4byte  .LASF19\r
- 706 00ee 03                   .byte   0x3\r
- 707 00ef 98                   .byte   0x98\r
- 708 00f0 7A000000             .4byte  0x7a\r
- 709 00f4 02                   .byte   0x2\r
- 710 00f5 23                   .byte   0x23\r
- 711 00f6 00                   .uleb128 0\r
- 712 00f7 07                   .uleb128 0x7\r
- 713 00f8 8C000000             .4byte  .LASF20\r
- 714 00fc 03                   .byte   0x3\r
- 715 00fd 99                   .byte   0x99\r
- 716 00fe 14010000             .4byte  0x114\r
- 717 0102 02                   .byte   0x2\r
- 718 0103 23                   .byte   0x23\r
- 719 0104 04                   .uleb128 0x4\r
- 720 0105 07                   .uleb128 0x7\r
- 721 0106 00000000             .4byte  .LASF21\r
- 722 010a 03                   .byte   0x3\r
- 723 010b 9A                   .byte   0x9a\r
- 724 010c 1A010000             .4byte  0x11a\r
- 725 0110 02                   .byte   0x2\r
- 726 0111 23                   .byte   0x23\r
- 727 0112 08                   .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 22\r
-\r
-\r
- 728 0113 00                   .byte   0\r
- 729 0114 08                   .uleb128 0x8\r
- 730 0115 04                   .byte   0x4\r
- 731 0116 A5000000             .4byte  0xa5\r
- 732 011a 08                   .uleb128 0x8\r
- 733 011b 04                   .byte   0x4\r
- 734 011c D6000000             .4byte  0xd6\r
- 735 0120 04                   .uleb128 0x4\r
- 736 0121 AE000000             .4byte  .LASF22\r
- 737 0125 03                   .byte   0x3\r
- 738 0126 9B                   .byte   0x9b\r
- 739 0127 E1000000             .4byte  0xe1\r
- 740 012b 06                   .uleb128 0x6\r
- 741 012c 08                   .byte   0x8\r
- 742 012d 03                   .byte   0x3\r
- 743 012e 9E                   .byte   0x9e\r
- 744 012f 4E010000             .4byte  0x14e\r
- 745 0133 09                   .uleb128 0x9\r
- 746 0134 6300                 .ascii  "c\000"\r
- 747 0136 03                   .byte   0x3\r
- 748 0137 A0                   .byte   0xa0\r
- 749 0138 6F000000             .4byte  0x6f\r
- 750 013c 02                   .byte   0x2\r
- 751 013d 23                   .byte   0x23\r
- 752 013e 00                   .uleb128 0\r
- 753 013f 07                   .uleb128 0x7\r
- 754 0140 21020000             .4byte  .LASF23\r
- 755 0144 03                   .byte   0x3\r
- 756 0145 A1                   .byte   0xa1\r
- 757 0146 4E010000             .4byte  0x14e\r
- 758 014a 02                   .byte   0x2\r
- 759 014b 23                   .byte   0x23\r
- 760 014c 04                   .uleb128 0x4\r
- 761 014d 00                   .byte   0\r
- 762 014e 08                   .uleb128 0x8\r
- 763 014f 04                   .byte   0x4\r
- 764 0150 54010000             .4byte  0x154\r
- 765 0154 0A                   .uleb128 0xa\r
- 766 0155 04                   .uleb128 0x4\r
- 767 0156 61020000             .4byte  .LASF24\r
- 768 015a 03                   .byte   0x3\r
- 769 015b A2                   .byte   0xa2\r
- 770 015c 2B010000             .4byte  0x12b\r
- 771 0160 0B                   .uleb128 0xb\r
- 772 0161 01                   .byte   0x1\r
- 773 0162 A0020000             .4byte  .LASF25\r
- 774 0166 01                   .byte   0x1\r
- 775 0167 3C                   .byte   0x3c\r
- 776 0168 01                   .byte   0x1\r
- 777 0169 6F000000             .4byte  0x6f\r
- 778 016d 00000000             .4byte  .LFB0\r
- 779 0171 2C000000             .4byte  .LFE0\r
- 780 0175 02                   .byte   0x2\r
- 781 0176 7D                   .byte   0x7d\r
- 782 0177 00                   .sleb128 0\r
- 783 0178 01                   .byte   0x1\r
- 784 0179 9C010000             .4byte  0x19c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 23\r
-\r
-\r
- 785 017d 0C                   .uleb128 0xc\r
- 786 017e FE020000             .4byte  .LASF27\r
- 787 0182 01                   .byte   0x1\r
- 788 0183 3C                   .byte   0x3c\r
- 789 0184 6F000000             .4byte  0x6f\r
- 790 0188 00000000             .4byte  .LLST0\r
- 791 018c 0D                   .uleb128 0xd\r
- 792 018d 32000000             .4byte  .LASF28\r
- 793 0191 01                   .byte   0x1\r
- 794 0192 3E                   .byte   0x3e\r
- 795 0193 6F000000             .4byte  0x6f\r
- 796 0197 53000000             .4byte  .LLST1\r
- 797 019b 00                   .byte   0\r
- 798 019c 0B                   .uleb128 0xb\r
- 799 019d 01                   .byte   0x1\r
- 800 019e 38020000             .4byte  .LASF26\r
- 801 01a2 01                   .byte   0x1\r
- 802 01a3 60                   .byte   0x60\r
- 803 01a4 01                   .byte   0x1\r
- 804 01a5 6F000000             .4byte  0x6f\r
- 805 01a9 00000000             .4byte  .LFB1\r
- 806 01ad 0C000000             .4byte  .LFE1\r
- 807 01b1 02                   .byte   0x2\r
- 808 01b2 7D                   .byte   0x7d\r
- 809 01b3 00                   .sleb128 0\r
- 810 01b4 01                   .byte   0x1\r
- 811 01b5 C9010000             .4byte  0x1c9\r
- 812 01b9 0C                   .uleb128 0xc\r
- 813 01ba FE020000             .4byte  .LASF27\r
- 814 01be 01                   .byte   0x1\r
- 815 01bf 60                   .byte   0x60\r
- 816 01c0 6F000000             .4byte  0x6f\r
- 817 01c4 A2000000             .4byte  .LLST2\r
- 818 01c8 00                   .byte   0\r
- 819 01c9 0E                   .uleb128 0xe\r
- 820 01ca 01                   .byte   0x1\r
- 821 01cb 92000000             .4byte  .LASF32\r
- 822 01cf 01                   .byte   0x1\r
- 823 01d0 1101                 .2byte  0x111\r
- 824 01d2 01                   .byte   0x1\r
- 825 01d3 00000000             .4byte  .LFB3\r
- 826 01d7 40000000             .4byte  .LFE3\r
- 827 01db C3000000             .4byte  .LLST3\r
- 828 01df 01                   .byte   0x1\r
- 829 01e0 1C020000             .4byte  0x21c\r
- 830 01e4 0F                   .uleb128 0xf\r
- 831 01e5 72020000             .4byte  .LASF29\r
- 832 01e9 01                   .byte   0x1\r
- 833 01ea 1301                 .2byte  0x113\r
- 834 01ec 1C020000             .4byte  0x21c\r
- 835 01f0 E3000000             .4byte  .LLST4\r
- 836 01f4 10                   .uleb128 0x10\r
- 837 01f5 DB010000             .4byte  .LASF30\r
- 838 01f9 01                   .byte   0x1\r
- 839 01fa 1401                 .2byte  0x114\r
- 840 01fc 14010000             .4byte  0x114\r
- 841 0200 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 24\r
-\r
-\r
- 842 0201 50                   .byte   0x50\r
- 843 0202 0F                   .uleb128 0xf\r
- 844 0203 7A000000             .4byte  .LASF31\r
- 845 0207 01                   .byte   0x1\r
- 846 0208 1501                 .2byte  0x115\r
- 847 020a 6F000000             .4byte  0x6f\r
- 848 020e 1E010000             .4byte  .LLST5\r
- 849 0212 11                   .uleb128 0x11\r
- 850 0213 0E000000             .4byte  .LVL10\r
- 851 0217 ED030000             .4byte  0x3ed\r
- 852 021b 00                   .byte   0\r
- 853 021c 08                   .uleb128 0x8\r
- 854 021d 04                   .byte   0x4\r
- 855 021e 22020000             .4byte  0x222\r
- 856 0222 12                   .uleb128 0x12\r
- 857 0223 55010000             .4byte  0x155\r
- 858 0227 0E                   .uleb128 0xe\r
- 859 0228 01                   .byte   0x1\r
- 860 0229 4C000000             .4byte  .LASF33\r
- 861 022d 01                   .byte   0x1\r
- 862 022e 3F01                 .2byte  0x13f\r
- 863 0230 01                   .byte   0x1\r
- 864 0231 00000000             .4byte  .LFB4\r
- 865 0235 48000000             .4byte  .LFE4\r
- 866 0239 31010000             .4byte  .LLST6\r
- 867 023d 01                   .byte   0x1\r
- 868 023e 7C020000             .4byte  0x27c\r
- 869 0242 0F                   .uleb128 0xf\r
- 870 0243 72020000             .4byte  .LASF29\r
- 871 0247 01                   .byte   0x1\r
- 872 0248 4101                 .2byte  0x141\r
- 873 024a 1C020000             .4byte  0x21c\r
- 874 024e 51010000             .4byte  .LLST7\r
- 875 0252 0F                   .uleb128 0xf\r
- 876 0253 DB010000             .4byte  .LASF30\r
- 877 0257 01                   .byte   0x1\r
- 878 0258 4201                 .2byte  0x142\r
- 879 025a 14010000             .4byte  0x114\r
- 880 025e 7F010000             .4byte  .LLST8\r
- 881 0262 0F                   .uleb128 0xf\r
- 882 0263 7A000000             .4byte  .LASF31\r
- 883 0267 01                   .byte   0x1\r
- 884 0268 4301                 .2byte  0x143\r
- 885 026a 6F000000             .4byte  0x6f\r
- 886 026e 9F010000             .4byte  .LLST9\r
- 887 0272 11                   .uleb128 0x11\r
- 888 0273 0E000000             .4byte  .LVL17\r
- 889 0277 ED030000             .4byte  0x3ed\r
- 890 027b 00                   .byte   0\r
- 891 027c 0E                   .uleb128 0xe\r
- 892 027d 01                   .byte   0x1\r
- 893 027e 84010000             .4byte  .LASF34\r
- 894 0282 01                   .byte   0x1\r
- 895 0283 6D01                 .2byte  0x16d\r
- 896 0285 01                   .byte   0x1\r
- 897 0286 00000000             .4byte  .LFB5\r
- 898 028a 74000000             .4byte  .LFE5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 25\r
-\r
-\r
- 899 028e B2010000             .4byte  .LLST10\r
- 900 0292 01                   .byte   0x1\r
- 901 0293 E1020000             .4byte  0x2e1\r
- 902 0297 0F                   .uleb128 0xf\r
- 903 0298 72020000             .4byte  .LASF29\r
- 904 029c 01                   .byte   0x1\r
- 905 029d 6F01                 .2byte  0x16f\r
- 906 029f 1C020000             .4byte  0x21c\r
- 907 02a3 D2010000             .4byte  .LLST11\r
- 908 02a7 13                   .uleb128 0x13\r
- 909 02a8 70544400             .ascii  "pTD\000"\r
- 910 02ac 01                   .byte   0x1\r
- 911 02ad 7001                 .2byte  0x170\r
- 912 02af E1020000             .4byte  0x2e1\r
- 913 02b3 FB010000             .4byte  .LLST12\r
- 914 02b7 0F                   .uleb128 0xf\r
- 915 02b8 7A000000             .4byte  .LASF31\r
- 916 02bc 01                   .byte   0x1\r
- 917 02bd 7101                 .2byte  0x171\r
- 918 02bf 6F000000             .4byte  0x6f\r
- 919 02c3 19020000             .4byte  .LLST13\r
- 920 02c7 0F                   .uleb128 0xf\r
- 921 02c8 BF000000             .4byte  .LASF35\r
- 922 02cc 01                   .byte   0x1\r
- 923 02cd 7201                 .2byte  0x172\r
- 924 02cf 6F000000             .4byte  0x6f\r
- 925 02d3 2C020000             .4byte  .LLST14\r
- 926 02d7 11                   .uleb128 0x11\r
- 927 02d8 14000000             .4byte  .LVL25\r
- 928 02dc ED030000             .4byte  0x3ed\r
- 929 02e0 00                   .byte   0\r
- 930 02e1 08                   .uleb128 0x8\r
- 931 02e2 04                   .byte   0x4\r
- 932 02e3 20010000             .4byte  0x120\r
- 933 02e7 14                   .uleb128 0x14\r
- 934 02e8 01                   .byte   0x1\r
- 935 02e9 EF010000             .4byte  .LASF36\r
- 936 02ed 01                   .byte   0x1\r
- 937 02ee 77                   .byte   0x77\r
- 938 02ef 01                   .byte   0x1\r
- 939 02f0 6F000000             .4byte  0x6f\r
- 940 02f4 00000000             .4byte  .LFB2\r
- 941 02f8 10010000             .4byte  .LFE2\r
- 942 02fc 57020000             .4byte  .LLST15\r
- 943 0300 01                   .byte   0x1\r
- 944 0301 66030000             .4byte  0x366\r
- 945 0305 0D                   .uleb128 0xd\r
- 946 0306 37000000             .4byte  .LASF37\r
- 947 030a 01                   .byte   0x1\r
- 948 030b 79                   .byte   0x79\r
- 949 030c 6F000000             .4byte  0x6f\r
- 950 0310 77020000             .4byte  .LLST16\r
- 951 0314 0D                   .uleb128 0xd\r
- 952 0315 54010000             .4byte  .LASF38\r
- 953 0319 01                   .byte   0x1\r
- 954 031a 7A                   .byte   0x7a\r
- 955 031b 6F000000             .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 26\r
-\r
-\r
- 956 031f 8B020000             .4byte  .LLST17\r
- 957 0323 11                   .uleb128 0x11\r
- 958 0324 2E000000             .4byte  .LVL44\r
- 959 0328 C9010000             .4byte  0x1c9\r
- 960 032c 11                   .uleb128 0x11\r
- 961 032d 3A000000             .4byte  .LVL45\r
- 962 0331 27020000             .4byte  0x227\r
- 963 0335 11                   .uleb128 0x11\r
- 964 0336 40000000             .4byte  .LVL47\r
- 965 033a 7C020000             .4byte  0x27c\r
- 966 033e 15                   .uleb128 0x15\r
- 967 033f 6A000000             .4byte  .LVL50\r
- 968 0343 01                   .byte   0x1\r
- 969 0344 05040000             .4byte  0x405\r
- 970 0348 11                   .uleb128 0x11\r
- 971 0349 96000000             .4byte  .LVL53\r
- 972 034d 7C020000             .4byte  0x27c\r
- 973 0351 15                   .uleb128 0x15\r
- 974 0352 A8000000             .4byte  .LVL54\r
- 975 0356 01                   .byte   0x1\r
- 976 0357 13040000             .4byte  0x413\r
- 977 035b 15                   .uleb128 0x15\r
- 978 035c D8000000             .4byte  .LVL56\r
- 979 0360 01                   .byte   0x1\r
- 980 0361 21040000             .4byte  0x421\r
- 981 0365 00                   .byte   0\r
- 982 0366 16                   .uleb128 0x16\r
- 983 0367 CA000000             .4byte  .LASF39\r
- 984 036b 03                   .byte   0x3\r
- 985 036c 1A02                 .2byte  0x21a\r
- 986 036e A5000000             .4byte  0xa5\r
- 987 0372 01                   .byte   0x1\r
- 988 0373 01                   .byte   0x1\r
- 989 0374 17                   .uleb128 0x17\r
- 990 0375 6F000000             .4byte  0x6f\r
- 991 0379 84030000             .4byte  0x384\r
- 992 037d 18                   .uleb128 0x18\r
- 993 037e AA000000             .4byte  0xaa\r
- 994 0382 00                   .byte   0\r
- 995 0383 00                   .byte   0\r
- 996 0384 19                   .uleb128 0x19\r
- 997 0385 8E020000             .4byte  .LASF40\r
- 998 0389 01                   .byte   0x1\r
- 999 038a 1D                   .byte   0x1d\r
- 1000 038b 96030000            .4byte  0x396\r
- 1001 038f 01                  .byte   0x1\r
- 1002 0390 05                  .byte   0x5\r
- 1003 0391 03                  .byte   0x3\r
- 1004 0392 00000000            .4byte  USBFS_hidProtocol\r
- 1005 0396 05                  .uleb128 0x5\r
- 1006 0397 74030000            .4byte  0x374\r
- 1007 039b 19                  .uleb128 0x19\r
- 1008 039c 1D030000            .4byte  .LASF41\r
- 1009 03a0 01                  .byte   0x1\r
- 1010 03a1 1E                  .byte   0x1e\r
- 1011 03a2 AD030000            .4byte  0x3ad\r
- 1012 03a6 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 27\r
-\r
-\r
- 1013 03a7 05                  .byte   0x5\r
- 1014 03a8 03                  .byte   0x3\r
- 1015 03a9 00000000            .4byte  USBFS_hidIdleRate\r
- 1016 03ad 05                  .uleb128 0x5\r
- 1017 03ae 74030000            .4byte  0x374\r
- 1018 03b2 19                  .uleb128 0x19\r
- 1019 03b3 2F030000            .4byte  .LASF42\r
- 1020 03b7 01                  .byte   0x1\r
- 1021 03b8 1F                  .byte   0x1f\r
- 1022 03b9 C4030000            .4byte  0x3c4\r
- 1023 03bd 01                  .byte   0x1\r
- 1024 03be 05                  .byte   0x5\r
- 1025 03bf 03                  .byte   0x3\r
- 1026 03c0 00000000            .4byte  USBFS_hidIdleTimer\r
- 1027 03c4 05                  .uleb128 0x5\r
- 1028 03c5 74030000            .4byte  0x374\r
- 1029 03c9 1A                  .uleb128 0x1a\r
- 1030 03ca 77020000            .4byte  .LASF43\r
- 1031 03ce 04                  .byte   0x4\r
- 1032 03cf 39                  .byte   0x39\r
- 1033 03d0 D6030000            .4byte  0x3d6\r
- 1034 03d4 01                  .byte   0x1\r
- 1035 03d5 01                  .byte   0x1\r
- 1036 03d6 05                  .uleb128 0x5\r
- 1037 03d7 74030000            .4byte  0x374\r
- 1038 03db 1A                  .uleb128 0x1a\r
- 1039 03dc 28020000            .4byte  .LASF44\r
- 1040 03e0 04                  .byte   0x4\r
- 1041 03e1 40                  .byte   0x40\r
- 1042 03e2 E8030000            .4byte  0x3e8\r
- 1043 03e6 01                  .byte   0x1\r
- 1044 03e7 01                  .byte   0x1\r
- 1045 03e8 05                  .uleb128 0x5\r
- 1046 03e9 20010000            .4byte  0x120\r
- 1047 03ed 1B                  .uleb128 0x1b\r
- 1048 03ee 01                  .byte   0x1\r
- 1049 03ef C3010000            .4byte  .LASF51\r
- 1050 03f3 04                  .byte   0x4\r
- 1051 03f4 6D                  .byte   0x6d\r
- 1052 03f5 01                  .byte   0x1\r
- 1053 03f6 1C020000            .4byte  0x21c\r
- 1054 03fa 01                  .byte   0x1\r
- 1055 03fb 05040000            .4byte  0x405\r
- 1056 03ff 1C                  .uleb128 0x1c\r
- 1057 0400 6F000000            .4byte  0x6f\r
- 1058 0404 00                  .byte   0\r
- 1059 0405 1D                  .uleb128 0x1d\r
- 1060 0406 01                  .byte   0x1\r
- 1061 0407 9C010000            .4byte  .LASF45\r
- 1062 040b 04                  .byte   0x4\r
- 1063 040c 56                  .byte   0x56\r
- 1064 040d 01                  .byte   0x1\r
- 1065 040e 6F000000            .4byte  0x6f\r
- 1066 0412 01                  .byte   0x1\r
- 1067 0413 1D                  .uleb128 0x1d\r
- 1068 0414 01                  .byte   0x1\r
- 1069 0415 49030000            .4byte  .LASF46\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 28\r
-\r
-\r
- 1070 0419 04                  .byte   0x4\r
- 1071 041a 5C                  .byte   0x5c\r
- 1072 041b 01                  .byte   0x1\r
- 1073 041c 6F000000            .4byte  0x6f\r
- 1074 0420 01                  .byte   0x1\r
- 1075 0421 1D                  .uleb128 0x1d\r
- 1076 0422 01                  .byte   0x1\r
- 1077 0423 64010000            .4byte  .LASF47\r
- 1078 0427 04                  .byte   0x4\r
- 1079 0428 63                  .byte   0x63\r
- 1080 0429 01                  .byte   0x1\r
- 1081 042a 6F000000            .4byte  0x6f\r
- 1082 042e 01                  .byte   0x1\r
- 1083 042f 00                  .byte   0\r
- 1084                          .section        .debug_abbrev,"",%progbits\r
- 1085                  .Ldebug_abbrev0:\r
- 1086 0000 01                  .uleb128 0x1\r
- 1087 0001 11                  .uleb128 0x11\r
- 1088 0002 01                  .byte   0x1\r
- 1089 0003 25                  .uleb128 0x25\r
- 1090 0004 0E                  .uleb128 0xe\r
- 1091 0005 13                  .uleb128 0x13\r
- 1092 0006 0B                  .uleb128 0xb\r
- 1093 0007 03                  .uleb128 0x3\r
- 1094 0008 0E                  .uleb128 0xe\r
- 1095 0009 1B                  .uleb128 0x1b\r
- 1096 000a 0E                  .uleb128 0xe\r
- 1097 000b 55                  .uleb128 0x55\r
- 1098 000c 06                  .uleb128 0x6\r
- 1099 000d 11                  .uleb128 0x11\r
- 1100 000e 01                  .uleb128 0x1\r
- 1101 000f 52                  .uleb128 0x52\r
- 1102 0010 01                  .uleb128 0x1\r
- 1103 0011 10                  .uleb128 0x10\r
- 1104 0012 06                  .uleb128 0x6\r
- 1105 0013 00                  .byte   0\r
- 1106 0014 00                  .byte   0\r
- 1107 0015 02                  .uleb128 0x2\r
- 1108 0016 24                  .uleb128 0x24\r
- 1109 0017 00                  .byte   0\r
- 1110 0018 0B                  .uleb128 0xb\r
- 1111 0019 0B                  .uleb128 0xb\r
- 1112 001a 3E                  .uleb128 0x3e\r
- 1113 001b 0B                  .uleb128 0xb\r
- 1114 001c 03                  .uleb128 0x3\r
- 1115 001d 0E                  .uleb128 0xe\r
- 1116 001e 00                  .byte   0\r
- 1117 001f 00                  .byte   0\r
- 1118 0020 03                  .uleb128 0x3\r
- 1119 0021 24                  .uleb128 0x24\r
- 1120 0022 00                  .byte   0\r
- 1121 0023 0B                  .uleb128 0xb\r
- 1122 0024 0B                  .uleb128 0xb\r
- 1123 0025 3E                  .uleb128 0x3e\r
- 1124 0026 0B                  .uleb128 0xb\r
- 1125 0027 03                  .uleb128 0x3\r
- 1126 0028 08                  .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 29\r
-\r
-\r
- 1127 0029 00                  .byte   0\r
- 1128 002a 00                  .byte   0\r
- 1129 002b 04                  .uleb128 0x4\r
- 1130 002c 16                  .uleb128 0x16\r
- 1131 002d 00                  .byte   0\r
- 1132 002e 03                  .uleb128 0x3\r
- 1133 002f 0E                  .uleb128 0xe\r
- 1134 0030 3A                  .uleb128 0x3a\r
- 1135 0031 0B                  .uleb128 0xb\r
- 1136 0032 3B                  .uleb128 0x3b\r
- 1137 0033 0B                  .uleb128 0xb\r
- 1138 0034 49                  .uleb128 0x49\r
- 1139 0035 13                  .uleb128 0x13\r
- 1140 0036 00                  .byte   0\r
- 1141 0037 00                  .byte   0\r
- 1142 0038 05                  .uleb128 0x5\r
- 1143 0039 35                  .uleb128 0x35\r
- 1144 003a 00                  .byte   0\r
- 1145 003b 49                  .uleb128 0x49\r
- 1146 003c 13                  .uleb128 0x13\r
- 1147 003d 00                  .byte   0\r
- 1148 003e 00                  .byte   0\r
- 1149 003f 06                  .uleb128 0x6\r
- 1150 0040 13                  .uleb128 0x13\r
- 1151 0041 01                  .byte   0x1\r
- 1152 0042 0B                  .uleb128 0xb\r
- 1153 0043 0B                  .uleb128 0xb\r
- 1154 0044 3A                  .uleb128 0x3a\r
- 1155 0045 0B                  .uleb128 0xb\r
- 1156 0046 3B                  .uleb128 0x3b\r
- 1157 0047 0B                  .uleb128 0xb\r
- 1158 0048 01                  .uleb128 0x1\r
- 1159 0049 13                  .uleb128 0x13\r
- 1160 004a 00                  .byte   0\r
- 1161 004b 00                  .byte   0\r
- 1162 004c 07                  .uleb128 0x7\r
- 1163 004d 0D                  .uleb128 0xd\r
- 1164 004e 00                  .byte   0\r
- 1165 004f 03                  .uleb128 0x3\r
- 1166 0050 0E                  .uleb128 0xe\r
- 1167 0051 3A                  .uleb128 0x3a\r
- 1168 0052 0B                  .uleb128 0xb\r
- 1169 0053 3B                  .uleb128 0x3b\r
- 1170 0054 0B                  .uleb128 0xb\r
- 1171 0055 49                  .uleb128 0x49\r
- 1172 0056 13                  .uleb128 0x13\r
- 1173 0057 38                  .uleb128 0x38\r
- 1174 0058 0A                  .uleb128 0xa\r
- 1175 0059 00                  .byte   0\r
- 1176 005a 00                  .byte   0\r
- 1177 005b 08                  .uleb128 0x8\r
- 1178 005c 0F                  .uleb128 0xf\r
- 1179 005d 00                  .byte   0\r
- 1180 005e 0B                  .uleb128 0xb\r
- 1181 005f 0B                  .uleb128 0xb\r
- 1182 0060 49                  .uleb128 0x49\r
- 1183 0061 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 30\r
-\r
-\r
- 1184 0062 00                  .byte   0\r
- 1185 0063 00                  .byte   0\r
- 1186 0064 09                  .uleb128 0x9\r
- 1187 0065 0D                  .uleb128 0xd\r
- 1188 0066 00                  .byte   0\r
- 1189 0067 03                  .uleb128 0x3\r
- 1190 0068 08                  .uleb128 0x8\r
- 1191 0069 3A                  .uleb128 0x3a\r
- 1192 006a 0B                  .uleb128 0xb\r
- 1193 006b 3B                  .uleb128 0x3b\r
- 1194 006c 0B                  .uleb128 0xb\r
- 1195 006d 49                  .uleb128 0x49\r
- 1196 006e 13                  .uleb128 0x13\r
- 1197 006f 38                  .uleb128 0x38\r
- 1198 0070 0A                  .uleb128 0xa\r
- 1199 0071 00                  .byte   0\r
- 1200 0072 00                  .byte   0\r
- 1201 0073 0A                  .uleb128 0xa\r
- 1202 0074 26                  .uleb128 0x26\r
- 1203 0075 00                  .byte   0\r
- 1204 0076 00                  .byte   0\r
- 1205 0077 00                  .byte   0\r
- 1206 0078 0B                  .uleb128 0xb\r
- 1207 0079 2E                  .uleb128 0x2e\r
- 1208 007a 01                  .byte   0x1\r
- 1209 007b 3F                  .uleb128 0x3f\r
- 1210 007c 0C                  .uleb128 0xc\r
- 1211 007d 03                  .uleb128 0x3\r
- 1212 007e 0E                  .uleb128 0xe\r
- 1213 007f 3A                  .uleb128 0x3a\r
- 1214 0080 0B                  .uleb128 0xb\r
- 1215 0081 3B                  .uleb128 0x3b\r
- 1216 0082 0B                  .uleb128 0xb\r
- 1217 0083 27                  .uleb128 0x27\r
- 1218 0084 0C                  .uleb128 0xc\r
- 1219 0085 49                  .uleb128 0x49\r
- 1220 0086 13                  .uleb128 0x13\r
- 1221 0087 11                  .uleb128 0x11\r
- 1222 0088 01                  .uleb128 0x1\r
- 1223 0089 12                  .uleb128 0x12\r
- 1224 008a 01                  .uleb128 0x1\r
- 1225 008b 40                  .uleb128 0x40\r
- 1226 008c 0A                  .uleb128 0xa\r
- 1227 008d 9742                .uleb128 0x2117\r
- 1228 008f 0C                  .uleb128 0xc\r
- 1229 0090 01                  .uleb128 0x1\r
- 1230 0091 13                  .uleb128 0x13\r
- 1231 0092 00                  .byte   0\r
- 1232 0093 00                  .byte   0\r
- 1233 0094 0C                  .uleb128 0xc\r
- 1234 0095 05                  .uleb128 0x5\r
- 1235 0096 00                  .byte   0\r
- 1236 0097 03                  .uleb128 0x3\r
- 1237 0098 0E                  .uleb128 0xe\r
- 1238 0099 3A                  .uleb128 0x3a\r
- 1239 009a 0B                  .uleb128 0xb\r
- 1240 009b 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 31\r
-\r
-\r
- 1241 009c 0B                  .uleb128 0xb\r
- 1242 009d 49                  .uleb128 0x49\r
- 1243 009e 13                  .uleb128 0x13\r
- 1244 009f 02                  .uleb128 0x2\r
- 1245 00a0 06                  .uleb128 0x6\r
- 1246 00a1 00                  .byte   0\r
- 1247 00a2 00                  .byte   0\r
- 1248 00a3 0D                  .uleb128 0xd\r
- 1249 00a4 34                  .uleb128 0x34\r
- 1250 00a5 00                  .byte   0\r
- 1251 00a6 03                  .uleb128 0x3\r
- 1252 00a7 0E                  .uleb128 0xe\r
- 1253 00a8 3A                  .uleb128 0x3a\r
- 1254 00a9 0B                  .uleb128 0xb\r
- 1255 00aa 3B                  .uleb128 0x3b\r
- 1256 00ab 0B                  .uleb128 0xb\r
- 1257 00ac 49                  .uleb128 0x49\r
- 1258 00ad 13                  .uleb128 0x13\r
- 1259 00ae 02                  .uleb128 0x2\r
- 1260 00af 06                  .uleb128 0x6\r
- 1261 00b0 00                  .byte   0\r
- 1262 00b1 00                  .byte   0\r
- 1263 00b2 0E                  .uleb128 0xe\r
- 1264 00b3 2E                  .uleb128 0x2e\r
- 1265 00b4 01                  .byte   0x1\r
- 1266 00b5 3F                  .uleb128 0x3f\r
- 1267 00b6 0C                  .uleb128 0xc\r
- 1268 00b7 03                  .uleb128 0x3\r
- 1269 00b8 0E                  .uleb128 0xe\r
- 1270 00b9 3A                  .uleb128 0x3a\r
- 1271 00ba 0B                  .uleb128 0xb\r
- 1272 00bb 3B                  .uleb128 0x3b\r
- 1273 00bc 05                  .uleb128 0x5\r
- 1274 00bd 27                  .uleb128 0x27\r
- 1275 00be 0C                  .uleb128 0xc\r
- 1276 00bf 11                  .uleb128 0x11\r
- 1277 00c0 01                  .uleb128 0x1\r
- 1278 00c1 12                  .uleb128 0x12\r
- 1279 00c2 01                  .uleb128 0x1\r
- 1280 00c3 40                  .uleb128 0x40\r
- 1281 00c4 06                  .uleb128 0x6\r
- 1282 00c5 9742                .uleb128 0x2117\r
- 1283 00c7 0C                  .uleb128 0xc\r
- 1284 00c8 01                  .uleb128 0x1\r
- 1285 00c9 13                  .uleb128 0x13\r
- 1286 00ca 00                  .byte   0\r
- 1287 00cb 00                  .byte   0\r
- 1288 00cc 0F                  .uleb128 0xf\r
- 1289 00cd 34                  .uleb128 0x34\r
- 1290 00ce 00                  .byte   0\r
- 1291 00cf 03                  .uleb128 0x3\r
- 1292 00d0 0E                  .uleb128 0xe\r
- 1293 00d1 3A                  .uleb128 0x3a\r
- 1294 00d2 0B                  .uleb128 0xb\r
- 1295 00d3 3B                  .uleb128 0x3b\r
- 1296 00d4 05                  .uleb128 0x5\r
- 1297 00d5 49                  .uleb128 0x49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 32\r
-\r
-\r
- 1298 00d6 13                  .uleb128 0x13\r
- 1299 00d7 02                  .uleb128 0x2\r
- 1300 00d8 06                  .uleb128 0x6\r
- 1301 00d9 00                  .byte   0\r
- 1302 00da 00                  .byte   0\r
- 1303 00db 10                  .uleb128 0x10\r
- 1304 00dc 34                  .uleb128 0x34\r
- 1305 00dd 00                  .byte   0\r
- 1306 00de 03                  .uleb128 0x3\r
- 1307 00df 0E                  .uleb128 0xe\r
- 1308 00e0 3A                  .uleb128 0x3a\r
- 1309 00e1 0B                  .uleb128 0xb\r
- 1310 00e2 3B                  .uleb128 0x3b\r
- 1311 00e3 05                  .uleb128 0x5\r
- 1312 00e4 49                  .uleb128 0x49\r
- 1313 00e5 13                  .uleb128 0x13\r
- 1314 00e6 02                  .uleb128 0x2\r
- 1315 00e7 0A                  .uleb128 0xa\r
- 1316 00e8 00                  .byte   0\r
- 1317 00e9 00                  .byte   0\r
- 1318 00ea 11                  .uleb128 0x11\r
- 1319 00eb 898201              .uleb128 0x4109\r
- 1320 00ee 00                  .byte   0\r
- 1321 00ef 11                  .uleb128 0x11\r
- 1322 00f0 01                  .uleb128 0x1\r
- 1323 00f1 31                  .uleb128 0x31\r
- 1324 00f2 13                  .uleb128 0x13\r
- 1325 00f3 00                  .byte   0\r
- 1326 00f4 00                  .byte   0\r
- 1327 00f5 12                  .uleb128 0x12\r
- 1328 00f6 26                  .uleb128 0x26\r
- 1329 00f7 00                  .byte   0\r
- 1330 00f8 49                  .uleb128 0x49\r
- 1331 00f9 13                  .uleb128 0x13\r
- 1332 00fa 00                  .byte   0\r
- 1333 00fb 00                  .byte   0\r
- 1334 00fc 13                  .uleb128 0x13\r
- 1335 00fd 34                  .uleb128 0x34\r
- 1336 00fe 00                  .byte   0\r
- 1337 00ff 03                  .uleb128 0x3\r
- 1338 0100 08                  .uleb128 0x8\r
- 1339 0101 3A                  .uleb128 0x3a\r
- 1340 0102 0B                  .uleb128 0xb\r
- 1341 0103 3B                  .uleb128 0x3b\r
- 1342 0104 05                  .uleb128 0x5\r
- 1343 0105 49                  .uleb128 0x49\r
- 1344 0106 13                  .uleb128 0x13\r
- 1345 0107 02                  .uleb128 0x2\r
- 1346 0108 06                  .uleb128 0x6\r
- 1347 0109 00                  .byte   0\r
- 1348 010a 00                  .byte   0\r
- 1349 010b 14                  .uleb128 0x14\r
- 1350 010c 2E                  .uleb128 0x2e\r
- 1351 010d 01                  .byte   0x1\r
- 1352 010e 3F                  .uleb128 0x3f\r
- 1353 010f 0C                  .uleb128 0xc\r
- 1354 0110 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 33\r
-\r
-\r
- 1355 0111 0E                  .uleb128 0xe\r
- 1356 0112 3A                  .uleb128 0x3a\r
- 1357 0113 0B                  .uleb128 0xb\r
- 1358 0114 3B                  .uleb128 0x3b\r
- 1359 0115 0B                  .uleb128 0xb\r
- 1360 0116 27                  .uleb128 0x27\r
- 1361 0117 0C                  .uleb128 0xc\r
- 1362 0118 49                  .uleb128 0x49\r
- 1363 0119 13                  .uleb128 0x13\r
- 1364 011a 11                  .uleb128 0x11\r
- 1365 011b 01                  .uleb128 0x1\r
- 1366 011c 12                  .uleb128 0x12\r
- 1367 011d 01                  .uleb128 0x1\r
- 1368 011e 40                  .uleb128 0x40\r
- 1369 011f 06                  .uleb128 0x6\r
- 1370 0120 9742                .uleb128 0x2117\r
- 1371 0122 0C                  .uleb128 0xc\r
- 1372 0123 01                  .uleb128 0x1\r
- 1373 0124 13                  .uleb128 0x13\r
- 1374 0125 00                  .byte   0\r
- 1375 0126 00                  .byte   0\r
- 1376 0127 15                  .uleb128 0x15\r
- 1377 0128 898201              .uleb128 0x4109\r
- 1378 012b 00                  .byte   0\r
- 1379 012c 11                  .uleb128 0x11\r
- 1380 012d 01                  .uleb128 0x1\r
- 1381 012e 9542                .uleb128 0x2115\r
- 1382 0130 0C                  .uleb128 0xc\r
- 1383 0131 31                  .uleb128 0x31\r
- 1384 0132 13                  .uleb128 0x13\r
- 1385 0133 00                  .byte   0\r
- 1386 0134 00                  .byte   0\r
- 1387 0135 16                  .uleb128 0x16\r
- 1388 0136 34                  .uleb128 0x34\r
- 1389 0137 00                  .byte   0\r
- 1390 0138 03                  .uleb128 0x3\r
- 1391 0139 0E                  .uleb128 0xe\r
- 1392 013a 3A                  .uleb128 0x3a\r
- 1393 013b 0B                  .uleb128 0xb\r
- 1394 013c 3B                  .uleb128 0x3b\r
- 1395 013d 05                  .uleb128 0x5\r
- 1396 013e 49                  .uleb128 0x49\r
- 1397 013f 13                  .uleb128 0x13\r
- 1398 0140 3F                  .uleb128 0x3f\r
- 1399 0141 0C                  .uleb128 0xc\r
- 1400 0142 3C                  .uleb128 0x3c\r
- 1401 0143 0C                  .uleb128 0xc\r
- 1402 0144 00                  .byte   0\r
- 1403 0145 00                  .byte   0\r
- 1404 0146 17                  .uleb128 0x17\r
- 1405 0147 01                  .uleb128 0x1\r
- 1406 0148 01                  .byte   0x1\r
- 1407 0149 49                  .uleb128 0x49\r
- 1408 014a 13                  .uleb128 0x13\r
- 1409 014b 01                  .uleb128 0x1\r
- 1410 014c 13                  .uleb128 0x13\r
- 1411 014d 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 34\r
-\r
-\r
- 1412 014e 00                  .byte   0\r
- 1413 014f 18                  .uleb128 0x18\r
- 1414 0150 21                  .uleb128 0x21\r
- 1415 0151 00                  .byte   0\r
- 1416 0152 49                  .uleb128 0x49\r
- 1417 0153 13                  .uleb128 0x13\r
- 1418 0154 2F                  .uleb128 0x2f\r
- 1419 0155 0B                  .uleb128 0xb\r
- 1420 0156 00                  .byte   0\r
- 1421 0157 00                  .byte   0\r
- 1422 0158 19                  .uleb128 0x19\r
- 1423 0159 34                  .uleb128 0x34\r
- 1424 015a 00                  .byte   0\r
- 1425 015b 03                  .uleb128 0x3\r
- 1426 015c 0E                  .uleb128 0xe\r
- 1427 015d 3A                  .uleb128 0x3a\r
- 1428 015e 0B                  .uleb128 0xb\r
- 1429 015f 3B                  .uleb128 0x3b\r
- 1430 0160 0B                  .uleb128 0xb\r
- 1431 0161 49                  .uleb128 0x49\r
- 1432 0162 13                  .uleb128 0x13\r
- 1433 0163 3F                  .uleb128 0x3f\r
- 1434 0164 0C                  .uleb128 0xc\r
- 1435 0165 02                  .uleb128 0x2\r
- 1436 0166 0A                  .uleb128 0xa\r
- 1437 0167 00                  .byte   0\r
- 1438 0168 00                  .byte   0\r
- 1439 0169 1A                  .uleb128 0x1a\r
- 1440 016a 34                  .uleb128 0x34\r
- 1441 016b 00                  .byte   0\r
- 1442 016c 03                  .uleb128 0x3\r
- 1443 016d 0E                  .uleb128 0xe\r
- 1444 016e 3A                  .uleb128 0x3a\r
- 1445 016f 0B                  .uleb128 0xb\r
- 1446 0170 3B                  .uleb128 0x3b\r
- 1447 0171 0B                  .uleb128 0xb\r
- 1448 0172 49                  .uleb128 0x49\r
- 1449 0173 13                  .uleb128 0x13\r
- 1450 0174 3F                  .uleb128 0x3f\r
- 1451 0175 0C                  .uleb128 0xc\r
- 1452 0176 3C                  .uleb128 0x3c\r
- 1453 0177 0C                  .uleb128 0xc\r
- 1454 0178 00                  .byte   0\r
- 1455 0179 00                  .byte   0\r
- 1456 017a 1B                  .uleb128 0x1b\r
- 1457 017b 2E                  .uleb128 0x2e\r
- 1458 017c 01                  .byte   0x1\r
- 1459 017d 3F                  .uleb128 0x3f\r
- 1460 017e 0C                  .uleb128 0xc\r
- 1461 017f 03                  .uleb128 0x3\r
- 1462 0180 0E                  .uleb128 0xe\r
- 1463 0181 3A                  .uleb128 0x3a\r
- 1464 0182 0B                  .uleb128 0xb\r
- 1465 0183 3B                  .uleb128 0x3b\r
- 1466 0184 0B                  .uleb128 0xb\r
- 1467 0185 27                  .uleb128 0x27\r
- 1468 0186 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 35\r
-\r
-\r
- 1469 0187 49                  .uleb128 0x49\r
- 1470 0188 13                  .uleb128 0x13\r
- 1471 0189 3C                  .uleb128 0x3c\r
- 1472 018a 0C                  .uleb128 0xc\r
- 1473 018b 01                  .uleb128 0x1\r
- 1474 018c 13                  .uleb128 0x13\r
- 1475 018d 00                  .byte   0\r
- 1476 018e 00                  .byte   0\r
- 1477 018f 1C                  .uleb128 0x1c\r
- 1478 0190 05                  .uleb128 0x5\r
- 1479 0191 00                  .byte   0\r
- 1480 0192 49                  .uleb128 0x49\r
- 1481 0193 13                  .uleb128 0x13\r
- 1482 0194 00                  .byte   0\r
- 1483 0195 00                  .byte   0\r
- 1484 0196 1D                  .uleb128 0x1d\r
- 1485 0197 2E                  .uleb128 0x2e\r
- 1486 0198 00                  .byte   0\r
- 1487 0199 3F                  .uleb128 0x3f\r
- 1488 019a 0C                  .uleb128 0xc\r
- 1489 019b 03                  .uleb128 0x3\r
- 1490 019c 0E                  .uleb128 0xe\r
- 1491 019d 3A                  .uleb128 0x3a\r
- 1492 019e 0B                  .uleb128 0xb\r
- 1493 019f 3B                  .uleb128 0x3b\r
- 1494 01a0 0B                  .uleb128 0xb\r
- 1495 01a1 27                  .uleb128 0x27\r
- 1496 01a2 0C                  .uleb128 0xc\r
- 1497 01a3 49                  .uleb128 0x49\r
- 1498 01a4 13                  .uleb128 0x13\r
- 1499 01a5 3C                  .uleb128 0x3c\r
- 1500 01a6 0C                  .uleb128 0xc\r
- 1501 01a7 00                  .byte   0\r
- 1502 01a8 00                  .byte   0\r
- 1503 01a9 00                  .byte   0\r
- 1504                          .section        .debug_loc,"",%progbits\r
- 1505                  .Ldebug_loc0:\r
- 1506                  .LLST0:\r
- 1507 0000 00000000            .4byte  .LVL0\r
- 1508 0004 16000000            .4byte  .LVL2\r
- 1509 0008 0100                .2byte  0x1\r
- 1510 000a 50                  .byte   0x50\r
- 1511 000b 16000000            .4byte  .LVL2\r
- 1512 000f 18000000            .4byte  .LVL3\r
- 1513 0013 0400                .2byte  0x4\r
- 1514 0015 F3                  .byte   0xf3\r
- 1515 0016 01                  .uleb128 0x1\r
- 1516 0017 50                  .byte   0x50\r
- 1517 0018 9F                  .byte   0x9f\r
- 1518 0019 18000000            .4byte  .LVL3\r
- 1519 001d 1E000000            .4byte  .LVL5\r
- 1520 0021 0100                .2byte  0x1\r
- 1521 0023 50                  .byte   0x50\r
- 1522 0024 1E000000            .4byte  .LVL5\r
- 1523 0028 20000000            .4byte  .LVL6\r
- 1524 002c 0400                .2byte  0x4\r
- 1525 002e F3                  .byte   0xf3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 36\r
-\r
-\r
- 1526 002f 01                  .uleb128 0x1\r
- 1527 0030 50                  .byte   0x50\r
- 1528 0031 9F                  .byte   0x9f\r
- 1529 0032 20000000            .4byte  .LVL6\r
- 1530 0036 22000000            .4byte  .LVL7\r
- 1531 003a 0100                .2byte  0x1\r
- 1532 003c 50                  .byte   0x50\r
- 1533 003d 22000000            .4byte  .LVL7\r
- 1534 0041 2C000000            .4byte  .LFE0\r
- 1535 0045 0400                .2byte  0x4\r
- 1536 0047 F3                  .byte   0xf3\r
- 1537 0048 01                  .uleb128 0x1\r
- 1538 0049 50                  .byte   0x50\r
- 1539 004a 9F                  .byte   0x9f\r
- 1540 004b 00000000            .4byte  0\r
- 1541 004f 00000000            .4byte  0\r
- 1542                  .LLST1:\r
- 1543 0053 00000000            .4byte  .LVL0\r
- 1544 0057 14000000            .4byte  .LVL1\r
- 1545 005b 0200                .2byte  0x2\r
- 1546 005d 30                  .byte   0x30\r
- 1547 005e 9F                  .byte   0x9f\r
- 1548 005f 14000000            .4byte  .LVL1\r
- 1549 0063 18000000            .4byte  .LVL3\r
- 1550 0067 0200                .2byte  0x2\r
- 1551 0069 32                  .byte   0x32\r
- 1552 006a 9F                  .byte   0x9f\r
- 1553 006b 18000000            .4byte  .LVL3\r
- 1554 006f 1C000000            .4byte  .LVL4\r
- 1555 0073 0200                .2byte  0x2\r
- 1556 0075 30                  .byte   0x30\r
- 1557 0076 9F                  .byte   0x9f\r
- 1558 0077 1C000000            .4byte  .LVL4\r
- 1559 007b 20000000            .4byte  .LVL6\r
- 1560 007f 0200                .2byte  0x2\r
- 1561 0081 31                  .byte   0x31\r
- 1562 0082 9F                  .byte   0x9f\r
- 1563 0083 20000000            .4byte  .LVL6\r
- 1564 0087 22000000            .4byte  .LVL7\r
- 1565 008b 0200                .2byte  0x2\r
- 1566 008d 30                  .byte   0x30\r
- 1567 008e 9F                  .byte   0x9f\r
- 1568 008f 22000000            .4byte  .LVL7\r
- 1569 0093 2C000000            .4byte  .LFE0\r
- 1570 0097 0100                .2byte  0x1\r
- 1571 0099 50                  .byte   0x50\r
- 1572 009a 00000000            .4byte  0\r
- 1573 009e 00000000            .4byte  0\r
- 1574                  .LLST2:\r
- 1575 00a2 00000000            .4byte  .LVL8\r
- 1576 00a6 04000000            .4byte  .LVL9\r
- 1577 00aa 0100                .2byte  0x1\r
- 1578 00ac 50                  .byte   0x50\r
- 1579 00ad 04000000            .4byte  .LVL9\r
- 1580 00b1 0C000000            .4byte  .LFE1\r
- 1581 00b5 0400                .2byte  0x4\r
- 1582 00b7 F3                  .byte   0xf3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 37\r
-\r
-\r
- 1583 00b8 01                  .uleb128 0x1\r
- 1584 00b9 50                  .byte   0x50\r
- 1585 00ba 9F                  .byte   0x9f\r
- 1586 00bb 00000000            .4byte  0\r
- 1587 00bf 00000000            .4byte  0\r
- 1588                  .LLST3:\r
- 1589 00c3 00000000            .4byte  .LFB3\r
- 1590 00c7 02000000            .4byte  .LCFI0\r
- 1591 00cb 0200                .2byte  0x2\r
- 1592 00cd 7D                  .byte   0x7d\r
- 1593 00ce 00                  .sleb128 0\r
- 1594 00cf 02000000            .4byte  .LCFI0\r
- 1595 00d3 40000000            .4byte  .LFE3\r
- 1596 00d7 0200                .2byte  0x2\r
- 1597 00d9 7D                  .byte   0x7d\r
- 1598 00da 08                  .sleb128 8\r
- 1599 00db 00000000            .4byte  0\r
- 1600 00df 00000000            .4byte  0\r
- 1601                  .LLST4:\r
- 1602 00e3 0E000000            .4byte  .LVL10\r
- 1603 00e7 18000000            .4byte  .LVL12\r
- 1604 00eb 0100                .2byte  0x1\r
- 1605 00ed 50                  .byte   0x50\r
- 1606 00ee 1A000000            .4byte  .LVL13\r
- 1607 00f2 20000000            .4byte  .LVL15\r
- 1608 00f6 0100                .2byte  0x1\r
- 1609 00f8 52                  .byte   0x52\r
- 1610 00f9 20000000            .4byte  .LVL15\r
- 1611 00fd 26000000            .4byte  .LVL16\r
- 1612 0101 0600                .2byte  0x6\r
- 1613 0103 70                  .byte   0x70\r
- 1614 0104 04                  .sleb128 4\r
- 1615 0105 06                  .byte   0x6\r
- 1616 0106 23                  .byte   0x23\r
- 1617 0107 20                  .uleb128 0x20\r
- 1618 0108 9F                  .byte   0x9f\r
- 1619 0109 26000000            .4byte  .LVL16\r
- 1620 010d 40000000            .4byte  .LFE3\r
- 1621 0111 0300                .2byte  0x3\r
- 1622 0113 72                  .byte   0x72\r
- 1623 0114 20                  .sleb128 32\r
- 1624 0115 9F                  .byte   0x9f\r
- 1625 0116 00000000            .4byte  0\r
- 1626 011a 00000000            .4byte  0\r
- 1627                  .LLST5:\r
- 1628 011e 14000000            .4byte  .LVL11\r
- 1629 0122 1C000000            .4byte  .LVL14\r
- 1630 0126 0100                .2byte  0x1\r
- 1631 0128 53                  .byte   0x53\r
- 1632 0129 00000000            .4byte  0\r
- 1633 012d 00000000            .4byte  0\r
- 1634                  .LLST6:\r
- 1635 0131 00000000            .4byte  .LFB4\r
- 1636 0135 02000000            .4byte  .LCFI1\r
- 1637 0139 0200                .2byte  0x2\r
- 1638 013b 7D                  .byte   0x7d\r
- 1639 013c 00                  .sleb128 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 38\r
-\r
-\r
- 1640 013d 02000000            .4byte  .LCFI1\r
- 1641 0141 48000000            .4byte  .LFE4\r
- 1642 0145 0200                .2byte  0x2\r
- 1643 0147 7D                  .byte   0x7d\r
- 1644 0148 08                  .sleb128 8\r
- 1645 0149 00000000            .4byte  0\r
- 1646 014d 00000000            .4byte  0\r
- 1647                  .LLST7:\r
- 1648 0151 0E000000            .4byte  .LVL17\r
- 1649 0155 18000000            .4byte  .LVL19\r
- 1650 0159 0100                .2byte  0x1\r
- 1651 015b 50                  .byte   0x50\r
- 1652 015c 1A000000            .4byte  .LVL20\r
- 1653 0160 20000000            .4byte  .LVL22\r
- 1654 0164 0100                .2byte  0x1\r
- 1655 0166 52                  .byte   0x52\r
- 1656 0167 20000000            .4byte  .LVL22\r
- 1657 016b 2C000000            .4byte  .LVL24\r
- 1658 016f 0600                .2byte  0x6\r
- 1659 0171 70                  .byte   0x70\r
- 1660 0172 04                  .sleb128 4\r
- 1661 0173 06                  .byte   0x6\r
- 1662 0174 23                  .byte   0x23\r
- 1663 0175 18                  .uleb128 0x18\r
- 1664 0176 9F                  .byte   0x9f\r
- 1665 0177 00000000            .4byte  0\r
- 1666 017b 00000000            .4byte  0\r
- 1667                  .LLST8:\r
- 1668 017f 24000000            .4byte  .LVL23\r
- 1669 0183 2C000000            .4byte  .LVL24\r
- 1670 0187 0100                .2byte  0x1\r
- 1671 0189 53                  .byte   0x53\r
- 1672 018a 2C000000            .4byte  .LVL24\r
- 1673 018e 48000000            .4byte  .LFE4\r
- 1674 0192 0300                .2byte  0x3\r
- 1675 0194 73                  .byte   0x73\r
- 1676 0195 7E                  .sleb128 -2\r
- 1677 0196 9F                  .byte   0x9f\r
- 1678 0197 00000000            .4byte  0\r
- 1679 019b 00000000            .4byte  0\r
- 1680                  .LLST9:\r
- 1681 019f 14000000            .4byte  .LVL18\r
- 1682 01a3 1C000000            .4byte  .LVL21\r
- 1683 01a7 0100                .2byte  0x1\r
- 1684 01a9 53                  .byte   0x53\r
- 1685 01aa 00000000            .4byte  0\r
- 1686 01ae 00000000            .4byte  0\r
- 1687                  .LLST10:\r
- 1688 01b2 00000000            .4byte  .LFB5\r
- 1689 01b6 02000000            .4byte  .LCFI2\r
- 1690 01ba 0200                .2byte  0x2\r
- 1691 01bc 7D                  .byte   0x7d\r
- 1692 01bd 00                  .sleb128 0\r
- 1693 01be 02000000            .4byte  .LCFI2\r
- 1694 01c2 74000000            .4byte  .LFE5\r
- 1695 01c6 0200                .2byte  0x2\r
- 1696 01c8 7D                  .byte   0x7d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 39\r
-\r
-\r
- 1697 01c9 08                  .sleb128 8\r
- 1698 01ca 00000000            .4byte  0\r
- 1699 01ce 00000000            .4byte  0\r
- 1700                  .LLST11:\r
- 1701 01d2 14000000            .4byte  .LVL25\r
- 1702 01d6 20000000            .4byte  .LVL28\r
- 1703 01da 0100                .2byte  0x1\r
- 1704 01dc 50                  .byte   0x50\r
- 1705 01dd 22000000            .4byte  .LVL29\r
- 1706 01e1 3C000000            .4byte  .LVL34\r
- 1707 01e5 0100                .2byte  0x1\r
- 1708 01e7 51                  .byte   0x51\r
- 1709 01e8 3C000000            .4byte  .LVL34\r
- 1710 01ec 50000000            .4byte  .LVL39\r
- 1711 01f0 0100                .2byte  0x1\r
- 1712 01f2 50                  .byte   0x50\r
- 1713 01f3 00000000            .4byte  0\r
- 1714 01f7 00000000            .4byte  0\r
- 1715                  .LLST12:\r
- 1716 01fb 4C000000            .4byte  .LVL37\r
- 1717 01ff 4E000000            .4byte  .LVL38\r
- 1718 0203 0100                .2byte  0x1\r
- 1719 0205 51                  .byte   0x51\r
- 1720 0206 4E000000            .4byte  .LVL38\r
- 1721 020a 5A000000            .4byte  .LVL40\r
- 1722 020e 0100                .2byte  0x1\r
- 1723 0210 53                  .byte   0x53\r
- 1724 0211 00000000            .4byte  0\r
- 1725 0215 00000000            .4byte  0\r
- 1726                  .LLST13:\r
- 1727 0219 1C000000            .4byte  .LVL27\r
- 1728 021d 26000000            .4byte  .LVL30\r
- 1729 0221 0100                .2byte  0x1\r
- 1730 0223 52                  .byte   0x52\r
- 1731 0224 00000000            .4byte  0\r
- 1732 0228 00000000            .4byte  0\r
- 1733                  .LLST14:\r
- 1734 022c 1A000000            .4byte  .LVL26\r
- 1735 0230 28000000            .4byte  .LVL31\r
- 1736 0234 0100                .2byte  0x1\r
- 1737 0236 53                  .byte   0x53\r
- 1738 0237 28000000            .4byte  .LVL31\r
- 1739 023b 3E000000            .4byte  .LVL35\r
- 1740 023f 0300                .2byte  0x3\r
- 1741 0241 73                  .byte   0x73\r
- 1742 0242 01                  .sleb128 1\r
- 1743 0243 9F                  .byte   0x9f\r
- 1744 0244 3E000000            .4byte  .LVL35\r
- 1745 0248 4A000000            .4byte  .LVL36\r
- 1746 024c 0100                .2byte  0x1\r
- 1747 024e 52                  .byte   0x52\r
- 1748 024f 00000000            .4byte  0\r
- 1749 0253 00000000            .4byte  0\r
- 1750                  .LLST15:\r
- 1751 0257 00000000            .4byte  .LFB2\r
- 1752 025b 02000000            .4byte  .LCFI3\r
- 1753 025f 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 40\r
-\r
-\r
- 1754 0261 7D                  .byte   0x7d\r
- 1755 0262 00                  .sleb128 0\r
- 1756 0263 02000000            .4byte  .LCFI3\r
- 1757 0267 10010000            .4byte  .LFE2\r
- 1758 026b 0200                .2byte  0x2\r
- 1759 026d 7D                  .byte   0x7d\r
- 1760 026e 08                  .sleb128 8\r
- 1761 026f 00000000            .4byte  0\r
- 1762 0273 00000000            .4byte  0\r
- 1763                  .LLST16:\r
- 1764 0277 00000000            .4byte  .LVL41\r
- 1765 027b E8000000            .4byte  .LVL58\r
- 1766 027f 0200                .2byte  0x2\r
- 1767 0281 30                  .byte   0x30\r
- 1768 0282 9F                  .byte   0x9f\r
- 1769 0283 00000000            .4byte  0\r
- 1770 0287 00000000            .4byte  0\r
- 1771                  .LLST17:\r
- 1772 028b 08000000            .4byte  .LVL42\r
- 1773 028f 24000000            .4byte  .LVL43\r
- 1774 0293 0100                .2byte  0x1\r
- 1775 0295 50                  .byte   0x50\r
- 1776 0296 3C000000            .4byte  .LVL46\r
- 1777 029a 3F000000            .4byte  .LVL47-1\r
- 1778 029e 0100                .2byte  0x1\r
- 1779 02a0 50                  .byte   0x50\r
- 1780 02a1 4C000000            .4byte  .LVL48\r
- 1781 02a5 54000000            .4byte  .LVL49\r
- 1782 02a9 0100                .2byte  0x1\r
- 1783 02ab 50                  .byte   0x50\r
- 1784 02ac 6A000000            .4byte  .LVL50\r
- 1785 02b0 70000000            .4byte  .LVL51\r
- 1786 02b4 0100                .2byte  0x1\r
- 1787 02b6 50                  .byte   0x50\r
- 1788 02b7 78000000            .4byte  .LVL52\r
- 1789 02bb 95000000            .4byte  .LVL53-1\r
- 1790 02bf 0100                .2byte  0x1\r
- 1791 02c1 50                  .byte   0x50\r
- 1792 02c2 A8000000            .4byte  .LVL54\r
- 1793 02c6 AC000000            .4byte  .LVL55\r
- 1794 02ca 0100                .2byte  0x1\r
- 1795 02cc 50                  .byte   0x50\r
- 1796 02cd D8000000            .4byte  .LVL56\r
- 1797 02d1 DC000000            .4byte  .LVL57\r
- 1798 02d5 0100                .2byte  0x1\r
- 1799 02d7 50                  .byte   0x50\r
- 1800 02d8 00000000            .4byte  0\r
- 1801 02dc 00000000            .4byte  0\r
- 1802                          .section        .debug_aranges,"",%progbits\r
- 1803 0000 44000000            .4byte  0x44\r
- 1804 0004 0200                .2byte  0x2\r
- 1805 0006 00000000            .4byte  .Ldebug_info0\r
- 1806 000a 04                  .byte   0x4\r
- 1807 000b 00                  .byte   0\r
- 1808 000c 0000                .2byte  0\r
- 1809 000e 0000                .2byte  0\r
- 1810 0010 00000000            .4byte  .LFB0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 41\r
-\r
-\r
- 1811 0014 2C000000            .4byte  .LFE0-.LFB0\r
- 1812 0018 00000000            .4byte  .LFB1\r
- 1813 001c 0C000000            .4byte  .LFE1-.LFB1\r
- 1814 0020 00000000            .4byte  .LFB3\r
- 1815 0024 40000000            .4byte  .LFE3-.LFB3\r
- 1816 0028 00000000            .4byte  .LFB4\r
- 1817 002c 48000000            .4byte  .LFE4-.LFB4\r
- 1818 0030 00000000            .4byte  .LFB5\r
- 1819 0034 74000000            .4byte  .LFE5-.LFB5\r
- 1820 0038 00000000            .4byte  .LFB2\r
- 1821 003c 10010000            .4byte  .LFE2-.LFB2\r
- 1822 0040 00000000            .4byte  0\r
- 1823 0044 00000000            .4byte  0\r
- 1824                          .section        .debug_ranges,"",%progbits\r
- 1825                  .Ldebug_ranges0:\r
- 1826 0000 00000000            .4byte  .LFB0\r
- 1827 0004 2C000000            .4byte  .LFE0\r
- 1828 0008 00000000            .4byte  .LFB1\r
- 1829 000c 0C000000            .4byte  .LFE1\r
- 1830 0010 00000000            .4byte  .LFB3\r
- 1831 0014 40000000            .4byte  .LFE3\r
- 1832 0018 00000000            .4byte  .LFB4\r
- 1833 001c 48000000            .4byte  .LFE4\r
- 1834 0020 00000000            .4byte  .LFB5\r
- 1835 0024 74000000            .4byte  .LFE5\r
- 1836 0028 00000000            .4byte  .LFB2\r
- 1837 002c 10010000            .4byte  .LFE2\r
- 1838 0030 00000000            .4byte  0\r
- 1839 0034 00000000            .4byte  0\r
- 1840                          .section        .debug_line,"",%progbits\r
- 1841                  .Ldebug_line0:\r
- 1842 0000 6E010000            .section        .debug_str,"MS",%progbits,1\r
- 1842      02006200 \r
- 1842      00000201 \r
- 1842      FB0E0D00 \r
- 1842      01010101 \r
- 1843                  .LASF21:\r
- 1844 0000 70537461            .ascii  "pStatusBlock\000"\r
- 1844      74757342 \r
- 1844      6C6F636B \r
- 1844      00\r
- 1845                  .LASF49:\r
- 1846 000d 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_hid.c\000"\r
- 1846      6E657261 \r
- 1846      7465645F \r
- 1846      536F7572 \r
- 1846      63655C50 \r
- 1847                  .LASF28:\r
- 1848 0032 73746174            .ascii  "stat\000"\r
- 1848      00\r
- 1849                  .LASF37:\r
- 1850 0037 72657175            .ascii  "requestHandled\000"\r
- 1850      65737448 \r
- 1850      616E646C \r
- 1850      656400\r
- 1851                  .LASF19:\r
- 1852 0046 636F756E            .ascii  "count\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 42\r
-\r
-\r
- 1852      7400\r
- 1853                  .LASF33:\r
- 1854 004c 55534246            .ascii  "USBFS_FindReportDescriptor\000"\r
- 1854      535F4669 \r
- 1854      6E645265 \r
- 1854      706F7274 \r
- 1854      44657363 \r
- 1855                  .LASF3:\r
- 1856 0067 73686F72            .ascii  "short unsigned int\000"\r
- 1856      7420756E \r
- 1856      7369676E \r
- 1856      65642069 \r
- 1856      6E7400\r
- 1857                  .LASF31:\r
- 1858 007a 696E7465            .ascii  "interfaceN\000"\r
- 1858      72666163 \r
- 1858      654E00\r
- 1859                  .LASF16:\r
- 1860 0085 73746174            .ascii  "status\000"\r
- 1860      757300\r
- 1861                  .LASF20:\r
- 1862 008c 70446174            .ascii  "pData\000"\r
- 1862      6100\r
- 1863                  .LASF32:\r
- 1864 0092 55534246            .ascii  "USBFS_FindHidClassDecriptor\000"\r
- 1864      535F4669 \r
- 1864      6E644869 \r
- 1864      64436C61 \r
- 1864      73734465 \r
- 1865                  .LASF22:\r
- 1866 00ae 545F5553            .ascii  "T_USBFS_TD\000"\r
- 1866      4246535F \r
- 1866      544400\r
- 1867                  .LASF11:\r
- 1868 00b9 666C6F61            .ascii  "float\000"\r
- 1868      7400\r
- 1869                  .LASF35:\r
- 1870 00bf 7265706F            .ascii  "reportType\000"\r
- 1870      72745479 \r
- 1870      706500\r
- 1871                  .LASF39:\r
- 1872 00ca 55534246            .ascii  "USBFS_configuration\000"\r
- 1872      535F636F \r
- 1872      6E666967 \r
- 1872      75726174 \r
- 1872      696F6E00 \r
- 1873                  .LASF1:\r
- 1874 00de 756E7369            .ascii  "unsigned char\000"\r
- 1874      676E6564 \r
- 1874      20636861 \r
- 1874      7200\r
- 1875                  .LASF14:\r
- 1876 00ec 72656738            .ascii  "reg8\000"\r
- 1876      00\r
- 1877                  .LASF18:\r
- 1878 00f1 545F5553            .ascii  "T_USBFS_XFER_STATUS_BLOCK\000"\r
- 1878      4246535F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 43\r
-\r
-\r
- 1878      58464552 \r
- 1878      5F535441 \r
- 1878      5455535F \r
- 1879                  .LASF5:\r
- 1880 010b 6C6F6E67            .ascii  "long unsigned int\000"\r
- 1880      20756E73 \r
- 1880      69676E65 \r
- 1880      6420696E \r
- 1880      7400\r
- 1881                  .LASF50:\r
- 1882 011d 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 1882      43534932 \r
- 1882      53445C73 \r
- 1882      6F667477 \r
- 1882      6172655C \r
- 1883 014c 6E00                .ascii  "n\000"\r
- 1884                  .LASF9:\r
- 1885 014e 75696E74            .ascii  "uint8\000"\r
- 1885      3800\r
- 1886                  .LASF38:\r
- 1887 0154 696E7465            .ascii  "interfaceNumber\000"\r
- 1887      72666163 \r
- 1887      654E756D \r
- 1887      62657200 \r
- 1888                  .LASF47:\r
- 1889 0164 55534246            .ascii  "USBFS_InitNoDataControlTransfer\000"\r
- 1889      535F496E \r
- 1889      69744E6F \r
- 1889      44617461 \r
- 1889      436F6E74 \r
- 1890                  .LASF34:\r
- 1891 0184 55534246            .ascii  "USBFS_FindReport\000"\r
- 1891      535F4669 \r
- 1891      6E645265 \r
- 1891      706F7274 \r
- 1891      00\r
- 1892                  .LASF12:\r
- 1893 0195 646F7562            .ascii  "double\000"\r
- 1893      6C6500\r
- 1894                  .LASF45:\r
- 1895 019c 55534246            .ascii  "USBFS_InitControlRead\000"\r
- 1895      535F496E \r
- 1895      6974436F \r
- 1895      6E74726F \r
- 1895      6C526561 \r
- 1896                  .LASF2:\r
- 1897 01b2 73686F72            .ascii  "short int\000"\r
- 1897      7420696E \r
- 1897      7400\r
- 1898                  .LASF10:\r
- 1899 01bc 75696E74            .ascii  "uint16\000"\r
- 1899      313600\r
- 1900                  .LASF51:\r
- 1901 01c3 55534246            .ascii  "USBFS_GetConfigTablePtr\000"\r
- 1901      535F4765 \r
- 1901      74436F6E \r
- 1901      66696754 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 44\r
-\r
-\r
- 1901      61626C65 \r
- 1902                  .LASF30:\r
- 1903 01db 70446573            .ascii  "pDescr\000"\r
- 1903      637200\r
- 1904                  .LASF8:\r
- 1905 01e2 756E7369            .ascii  "unsigned int\000"\r
- 1905      676E6564 \r
- 1905      20696E74 \r
- 1905      00\r
- 1906                  .LASF36:\r
- 1907 01ef 55534246            .ascii  "USBFS_DispatchHIDClassRqst\000"\r
- 1907      535F4469 \r
- 1907      73706174 \r
- 1907      63684849 \r
- 1907      44436C61 \r
- 1908                  .LASF7:\r
- 1909 020a 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1909      206C6F6E \r
- 1909      6720756E \r
- 1909      7369676E \r
- 1909      65642069 \r
- 1910                  .LASF23:\r
- 1911 0221 705F6C69            .ascii  "p_list\000"\r
- 1911      737400\r
- 1912                  .LASF44:\r
- 1913 0228 55534246            .ascii  "USBFS_currentTD\000"\r
- 1913      535F6375 \r
- 1913      7272656E \r
- 1913      74544400 \r
- 1914                  .LASF26:\r
- 1915 0238 55534246            .ascii  "USBFS_GetProtocol\000"\r
- 1915      535F4765 \r
- 1915      7450726F \r
- 1915      746F636F \r
- 1915      6C00\r
- 1916                  .LASF15:\r
- 1917 024a 73697A65            .ascii  "sizetype\000"\r
- 1917      74797065 \r
- 1917      00\r
- 1918                  .LASF6:\r
- 1919 0253 6C6F6E67            .ascii  "long long int\000"\r
- 1919      206C6F6E \r
- 1919      6720696E \r
- 1919      7400\r
- 1920                  .LASF24:\r
- 1921 0261 545F5553            .ascii  "T_USBFS_LUT\000"\r
- 1921      4246535F \r
- 1921      4C555400 \r
- 1922                  .LASF13:\r
- 1923 026d 63686172            .ascii  "char\000"\r
- 1923      00\r
- 1924                  .LASF29:\r
- 1925 0272 70546D70            .ascii  "pTmp\000"\r
- 1925      00\r
- 1926                  .LASF43:\r
- 1927 0277 55534246            .ascii  "USBFS_interfaceSetting\000"\r
- 1927      535F696E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 45\r
-\r
-\r
- 1927      74657266 \r
- 1927      61636553 \r
- 1927      65747469 \r
- 1928                  .LASF40:\r
- 1929 028e 55534246            .ascii  "USBFS_hidProtocol\000"\r
- 1929      535F6869 \r
- 1929      6450726F \r
- 1929      746F636F \r
- 1929      6C00\r
- 1930                  .LASF25:\r
- 1931 02a0 55534246            .ascii  "USBFS_UpdateHIDTimer\000"\r
- 1931      535F5570 \r
- 1931      64617465 \r
- 1931      48494454 \r
- 1931      696D6572 \r
- 1932                  .LASF48:\r
- 1933 02b5 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 1933      4320342E \r
- 1933      372E3320 \r
- 1933      32303133 \r
- 1933      30333132 \r
- 1934 02e8 616E6368            .ascii  "anch revision 196615]\000"\r
- 1934      20726576 \r
- 1934      6973696F \r
- 1934      6E203139 \r
- 1934      36363135 \r
- 1935                  .LASF27:\r
- 1936 02fe 696E7465            .ascii  "interface\000"\r
- 1936      72666163 \r
- 1936      6500\r
- 1937                  .LASF4:\r
- 1938 0308 6C6F6E67            .ascii  "long int\000"\r
- 1938      20696E74 \r
- 1938      00\r
- 1939                  .LASF0:\r
- 1940 0311 7369676E            .ascii  "signed char\000"\r
- 1940      65642063 \r
- 1940      68617200 \r
- 1941                  .LASF41:\r
- 1942 031d 55534246            .ascii  "USBFS_hidIdleRate\000"\r
- 1942      535F6869 \r
- 1942      6449646C \r
- 1942      65526174 \r
- 1942      6500\r
- 1943                  .LASF42:\r
- 1944 032f 55534246            .ascii  "USBFS_hidIdleTimer\000"\r
- 1944      535F6869 \r
- 1944      6449646C \r
- 1944      6554696D \r
- 1944      657200\r
- 1945                  .LASF17:\r
- 1946 0342 6C656E67            .ascii  "length\000"\r
- 1946      746800\r
- 1947                  .LASF46:\r
- 1948 0349 55534246            .ascii  "USBFS_InitControlWrite\000"\r
- 1948      535F496E \r
- 1948      6974436F \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccAt1N4e.s                      page 46\r
-\r
-\r
- 1948      6E74726F \r
- 1948      6C577269 \r
- 1949                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.o
deleted file mode 100755 (executable)
index 1744134..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_hid.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.lst
deleted file mode 100755 (executable)
index 99e28d7..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.lst
+++ /dev/null
@@ -1,239 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwPvd37.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_midi.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                   .Letext0:\r
-  19                           .section        .debug_info,"",%progbits\r
-  20                   .Ldebug_info0:\r
-  21 0000 7C000000             .4byte  0x7c\r
-  22 0004 0200                 .2byte  0x2\r
-  23 0006 00000000             .4byte  .Ldebug_abbrev0\r
-  24 000a 04                   .byte   0x4\r
-  25 000b 01                   .uleb128 0x1\r
-  26 000c 1B000000             .4byte  .LASF13\r
-  27 0010 01                   .byte   0x1\r
-  28 0011 CF000000             .4byte  .LASF14\r
-  29 0015 05010000             .4byte  .LASF15\r
-  30 0019 00000000             .4byte  .Ldebug_line0\r
-  31 001d 02                   .uleb128 0x2\r
-  32 001e 01                   .byte   0x1\r
-  33 001f 06                   .byte   0x6\r
-  34 0020 C3000000             .4byte  .LASF0\r
-  35 0024 02                   .uleb128 0x2\r
-  36 0025 01                   .byte   0x1\r
-  37 0026 08                   .byte   0x8\r
-  38 0027 8D000000             .4byte  .LASF1\r
-  39 002b 02                   .uleb128 0x2\r
-  40 002c 02                   .byte   0x2\r
-  41 002d 05                   .byte   0x5\r
-  42 002e FB000000             .4byte  .LASF2\r
-  43 0032 02                   .uleb128 0x2\r
-  44 0033 02                   .byte   0x2\r
-  45 0034 07                   .byte   0x7\r
-  46 0035 B0000000             .4byte  .LASF3\r
-  47 0039 02                   .uleb128 0x2\r
-  48 003a 04                   .byte   0x4\r
-  49 003b 05                   .byte   0x5\r
-  50 003c A0000000             .4byte  .LASF4\r
-  51 0040 02                   .uleb128 0x2\r
-  52 0041 04                   .byte   0x4\r
-  53 0042 07                   .byte   0x7\r
-  54 0043 64000000             .4byte  .LASF5\r
-  55 0047 02                   .uleb128 0x2\r
-  56 0048 08                   .byte   0x8\r
-  57 0049 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwPvd37.s                      page 2\r
-\r
-\r
-  58 004a 00000000             .4byte  .LASF6\r
-  59 004e 02                   .uleb128 0x2\r
-  60 004f 08                   .byte   0x8\r
-  61 0050 07                   .byte   0x7\r
-  62 0051 76000000             .4byte  .LASF7\r
-  63 0055 03                   .uleb128 0x3\r
-  64 0056 04                   .byte   0x4\r
-  65 0057 05                   .byte   0x5\r
-  66 0058 696E7400             .ascii  "int\000"\r
-  67 005c 02                   .uleb128 0x2\r
-  68 005d 04                   .byte   0x4\r
-  69 005e 07                   .byte   0x7\r
-  70 005f 0E000000             .4byte  .LASF8\r
-  71 0063 02                   .uleb128 0x2\r
-  72 0064 04                   .byte   0x4\r
-  73 0065 04                   .byte   0x4\r
-  74 0066 F5000000             .4byte  .LASF9\r
-  75 006a 02                   .uleb128 0x2\r
-  76 006b 08                   .byte   0x8\r
-  77 006c 04                   .byte   0x4\r
-  78 006d A9000000             .4byte  .LASF10\r
-  79 0071 02                   .uleb128 0x2\r
-  80 0072 01                   .byte   0x1\r
-  81 0073 08                   .byte   0x8\r
-  82 0074 9B000000             .4byte  .LASF11\r
-  83 0078 02                   .uleb128 0x2\r
-  84 0079 04                   .byte   0x4\r
-  85 007a 07                   .byte   0x7\r
-  86 007b 36010000             .4byte  .LASF12\r
-  87 007f 00                   .byte   0\r
-  88                           .section        .debug_abbrev,"",%progbits\r
-  89                   .Ldebug_abbrev0:\r
-  90 0000 01                   .uleb128 0x1\r
-  91 0001 11                   .uleb128 0x11\r
-  92 0002 01                   .byte   0x1\r
-  93 0003 25                   .uleb128 0x25\r
-  94 0004 0E                   .uleb128 0xe\r
-  95 0005 13                   .uleb128 0x13\r
-  96 0006 0B                   .uleb128 0xb\r
-  97 0007 03                   .uleb128 0x3\r
-  98 0008 0E                   .uleb128 0xe\r
-  99 0009 1B                   .uleb128 0x1b\r
- 100 000a 0E                   .uleb128 0xe\r
- 101 000b 10                   .uleb128 0x10\r
- 102 000c 06                   .uleb128 0x6\r
- 103 000d 00                   .byte   0\r
- 104 000e 00                   .byte   0\r
- 105 000f 02                   .uleb128 0x2\r
- 106 0010 24                   .uleb128 0x24\r
- 107 0011 00                   .byte   0\r
- 108 0012 0B                   .uleb128 0xb\r
- 109 0013 0B                   .uleb128 0xb\r
- 110 0014 3E                   .uleb128 0x3e\r
- 111 0015 0B                   .uleb128 0xb\r
- 112 0016 03                   .uleb128 0x3\r
- 113 0017 0E                   .uleb128 0xe\r
- 114 0018 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwPvd37.s                      page 3\r
-\r
-\r
- 115 0019 00                   .byte   0\r
- 116 001a 03                   .uleb128 0x3\r
- 117 001b 24                   .uleb128 0x24\r
- 118 001c 00                   .byte   0\r
- 119 001d 0B                   .uleb128 0xb\r
- 120 001e 0B                   .uleb128 0xb\r
- 121 001f 3E                   .uleb128 0x3e\r
- 122 0020 0B                   .uleb128 0xb\r
- 123 0021 03                   .uleb128 0x3\r
- 124 0022 08                   .uleb128 0x8\r
- 125 0023 00                   .byte   0\r
- 126 0024 00                   .byte   0\r
- 127 0025 00                   .byte   0\r
- 128                           .section        .debug_aranges,"",%progbits\r
- 129 0000 14000000             .4byte  0x14\r
- 130 0004 0200                 .2byte  0x2\r
- 131 0006 00000000             .4byte  .Ldebug_info0\r
- 132 000a 04                   .byte   0x4\r
- 133 000b 00                   .byte   0\r
- 134 000c 0000                 .2byte  0\r
- 135 000e 0000                 .2byte  0\r
- 136 0010 00000000             .4byte  0\r
- 137 0014 00000000             .4byte  0\r
- 138                           .section        .debug_line,"",%progbits\r
- 139                   .Ldebug_line0:\r
- 140 0000 19000000             .section        .debug_str,"MS",%progbits,1\r
- 140      02001300 \r
- 140      00000201 \r
- 140      FB0E0D00 \r
- 140      01010101 \r
- 141                   .LASF6:\r
- 142 0000 6C6F6E67             .ascii  "long long int\000"\r
- 142      206C6F6E \r
- 142      6720696E \r
- 142      7400\r
- 143                   .LASF8:\r
- 144 000e 756E7369             .ascii  "unsigned int\000"\r
- 144      676E6564 \r
- 144      20696E74 \r
- 144      00\r
- 145                   .LASF13:\r
- 146 001b 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 146      4320342E \r
- 146      372E3320 \r
- 146      32303133 \r
- 146      30333132 \r
- 147 004e 616E6368             .ascii  "anch revision 196615]\000"\r
- 147      20726576 \r
- 147      6973696F \r
- 147      6E203139 \r
- 147      36363135 \r
- 148                   .LASF5:\r
- 149 0064 6C6F6E67             .ascii  "long unsigned int\000"\r
- 149      20756E73 \r
- 149      69676E65 \r
- 149      6420696E \r
- 149      7400\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwPvd37.s                      page 4\r
-\r
-\r
- 150                   .LASF7:\r
- 151 0076 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 151      206C6F6E \r
- 151      6720756E \r
- 151      7369676E \r
- 151      65642069 \r
- 152                   .LASF1:\r
- 153 008d 756E7369             .ascii  "unsigned char\000"\r
- 153      676E6564 \r
- 153      20636861 \r
- 153      7200\r
- 154                   .LASF11:\r
- 155 009b 63686172             .ascii  "char\000"\r
- 155      00\r
- 156                   .LASF4:\r
- 157 00a0 6C6F6E67             .ascii  "long int\000"\r
- 157      20696E74 \r
- 157      00\r
- 158                   .LASF10:\r
- 159 00a9 646F7562             .ascii  "double\000"\r
- 159      6C6500\r
- 160                   .LASF3:\r
- 161 00b0 73686F72             .ascii  "short unsigned int\000"\r
- 161      7420756E \r
- 161      7369676E \r
- 161      65642069 \r
- 161      6E7400\r
- 162                   .LASF0:\r
- 163 00c3 7369676E             .ascii  "signed char\000"\r
- 163      65642063 \r
- 163      68617200 \r
- 164                   .LASF14:\r
- 165 00cf 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_midi.c\000"\r
- 165      6E657261 \r
- 165      7465645F \r
- 165      536F7572 \r
- 165      63655C50 \r
- 166                   .LASF9:\r
- 167 00f5 666C6F61             .ascii  "float\000"\r
- 167      7400\r
- 168                   .LASF2:\r
- 169 00fb 73686F72             .ascii  "short int\000"\r
- 169      7420696E \r
- 169      7400\r
- 170                   .LASF15:\r
- 171 0105 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 171      43534932 \r
- 171      53445C73 \r
- 171      6F667477 \r
- 171      6172655C \r
- 172 0134 6E00                 .ascii  "n\000"\r
- 173                   .LASF12:\r
- 174 0136 73697A65             .ascii  "sizetype\000"\r
- 174      74797065 \r
- 174      00\r
- 175                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.o
deleted file mode 100755 (executable)
index dede591..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_midi.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.lst
deleted file mode 100755 (executable)
index aed170f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.lst
+++ /dev/null
@@ -1,1950 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_pm.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_DP_ISR,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_DP_ISR\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_DP_ISR, %function\r
-  24                   USBFS_DP_ISR:\r
-  25                   .LFB56:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_pm.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_pm.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_pm.c **** * File Name: USBFS_pm.c\r
-   3:.\Generated_Source\PSoC5/USBFS_pm.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_pm.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_pm.c **** *  This file provides Suspend/Resume APIs functionality.\r
-   7:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_pm.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_pm.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_pm.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_pm.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_pm.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_pm.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_pm.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_pm.c **** #include "project.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_pm.c **** #include "USBFS.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_pm.c **** #include "USBFS_pvt.h"\r
-  20:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  21:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  22:.\Generated_Source\PSoC5/USBFS_pm.c **** /***************************************\r
-  23:.\Generated_Source\PSoC5/USBFS_pm.c **** * Custom Declarations\r
-  24:.\Generated_Source\PSoC5/USBFS_pm.c **** ***************************************/\r
-  25:.\Generated_Source\PSoC5/USBFS_pm.c **** /* `#START PM_CUSTOM_DECLARATIONS` Place your declaration here */\r
-  26:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  27:.\Generated_Source\PSoC5/USBFS_pm.c **** /* `#END` */\r
-  28:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  30:.\Generated_Source\PSoC5/USBFS_pm.c **** /***************************************\r
-  31:.\Generated_Source\PSoC5/USBFS_pm.c **** * Local data allocation\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_pm.c **** ***************************************/\r
-  33:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  34:.\Generated_Source\PSoC5/USBFS_pm.c **** static USBFS_BACKUP_STRUCT  USBFS_backup;\r
-  35:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  36:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  37:.\Generated_Source\PSoC5/USBFS_pm.c **** #if(USBFS_DP_ISR_REMOVE == 0u)\r
-  38:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  39:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  40:.\Generated_Source\PSoC5/USBFS_pm.c ****     /*******************************************************************************\r
-  41:.\Generated_Source\PSoC5/USBFS_pm.c ****     * Function Name: USBFS_DP_Interrupt\r
-  42:.\Generated_Source\PSoC5/USBFS_pm.c ****     ********************************************************************************\r
-  43:.\Generated_Source\PSoC5/USBFS_pm.c ****     *\r
-  44:.\Generated_Source\PSoC5/USBFS_pm.c ****     * Summary:\r
-  45:.\Generated_Source\PSoC5/USBFS_pm.c ****     *  This Interrupt Service Routine handles DP pin changes for wake-up from\r
-  46:.\Generated_Source\PSoC5/USBFS_pm.c ****     *  the sleep mode.\r
-  47:.\Generated_Source\PSoC5/USBFS_pm.c ****     *\r
-  48:.\Generated_Source\PSoC5/USBFS_pm.c ****     * Parameters:\r
-  49:.\Generated_Source\PSoC5/USBFS_pm.c ****     *  None.\r
-  50:.\Generated_Source\PSoC5/USBFS_pm.c ****     *\r
-  51:.\Generated_Source\PSoC5/USBFS_pm.c ****     * Return:\r
-  52:.\Generated_Source\PSoC5/USBFS_pm.c ****     *  None.\r
-  53:.\Generated_Source\PSoC5/USBFS_pm.c ****     *\r
-  54:.\Generated_Source\PSoC5/USBFS_pm.c ****     *******************************************************************************/\r
-  55:.\Generated_Source\PSoC5/USBFS_pm.c ****     CY_ISR(USBFS_DP_ISR)\r
-  56:.\Generated_Source\PSoC5/USBFS_pm.c ****     {\r
-  27                           .loc 1 56 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  57:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* `#START DP_USER_CODE` Place your code here */\r
-  58:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  59:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* `#END` */\r
-  60:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  61:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Clears active interrupt */\r
-  62:.\Generated_Source\PSoC5/USBFS_pm.c ****         CY_GET_REG8(USBFS_DP_INTSTAT_PTR);\r
-  32                           .loc 1 62 0\r
-  33 0000 014B                 ldr     r3, .L2\r
-  34 0002 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
-  35 0004 7047                 bx      lr\r
-  36                   .L3:\r
-  37 0006 00BF                 .align  2\r
-  38                   .L2:\r
-  39 0008 8F450040             .word   1073759631\r
-  40                           .cfi_endproc\r
-  41                   .LFE56:\r
-  42                           .size   USBFS_DP_ISR, .-USBFS_DP_ISR\r
-  43                           .section        .text.USBFS_SaveConfig,"ax",%progbits\r
-  44                           .align  1\r
-  45                           .global USBFS_SaveConfig\r
-  46                           .thumb\r
-  47                           .thumb_func\r
-  48                           .type   USBFS_SaveConfig, %function\r
-  49                   USBFS_SaveConfig:\r
-  50                   .LFB57:\r
-  63:.\Generated_Source\PSoC5/USBFS_pm.c ****     }\r
-  64:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 3\r
-\r
-\r
-  65:.\Generated_Source\PSoC5/USBFS_pm.c **** #endif /* (USBFS_DP_ISR_REMOVE == 0u) */\r
-  66:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  67:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  68:.\Generated_Source\PSoC5/USBFS_pm.c **** /*******************************************************************************\r
-  69:.\Generated_Source\PSoC5/USBFS_pm.c **** * Function Name: USBFS_SaveConfig\r
-  70:.\Generated_Source\PSoC5/USBFS_pm.c **** ********************************************************************************\r
-  71:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  72:.\Generated_Source\PSoC5/USBFS_pm.c **** * Summary:\r
-  73:.\Generated_Source\PSoC5/USBFS_pm.c **** *  Saves the current user configuration.\r
-  74:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  75:.\Generated_Source\PSoC5/USBFS_pm.c **** * Parameters:\r
-  76:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
-  77:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  78:.\Generated_Source\PSoC5/USBFS_pm.c **** * Return:\r
-  79:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
-  80:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  81:.\Generated_Source\PSoC5/USBFS_pm.c **** * Reentrant:\r
-  82:.\Generated_Source\PSoC5/USBFS_pm.c **** *  No.\r
-  83:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  84:.\Generated_Source\PSoC5/USBFS_pm.c **** *******************************************************************************/\r
-  85:.\Generated_Source\PSoC5/USBFS_pm.c **** void USBFS_SaveConfig(void) \r
-  86:.\Generated_Source\PSoC5/USBFS_pm.c **** {\r
-  51                           .loc 1 86 0\r
-  52                           .cfi_startproc\r
-  53                           @ args = 0, pretend = 0, frame = 0\r
-  54                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  55                           @ link register save eliminated.\r
-  56 0000 7047                 bx      lr\r
-  57                           .cfi_endproc\r
-  58                   .LFE57:\r
-  59                           .size   USBFS_SaveConfig, .-USBFS_SaveConfig\r
-  60                           .section        .text.USBFS_RestoreConfig,"ax",%progbits\r
-  61                           .align  1\r
-  62                           .global USBFS_RestoreConfig\r
-  63                           .thumb\r
-  64                           .thumb_func\r
-  65                           .type   USBFS_RestoreConfig, %function\r
-  66                   USBFS_RestoreConfig:\r
-  67                   .LFB58:\r
-  87:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  88:.\Generated_Source\PSoC5/USBFS_pm.c **** }\r
-  89:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  90:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
-  91:.\Generated_Source\PSoC5/USBFS_pm.c **** /*******************************************************************************\r
-  92:.\Generated_Source\PSoC5/USBFS_pm.c **** * Function Name: USBFS_RestoreConfig\r
-  93:.\Generated_Source\PSoC5/USBFS_pm.c **** ********************************************************************************\r
-  94:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  95:.\Generated_Source\PSoC5/USBFS_pm.c **** * Summary:\r
-  96:.\Generated_Source\PSoC5/USBFS_pm.c **** *  Restores the current user configuration.\r
-  97:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
-  98:.\Generated_Source\PSoC5/USBFS_pm.c **** * Parameters:\r
-  99:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
- 100:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 101:.\Generated_Source\PSoC5/USBFS_pm.c **** * Return:\r
- 102:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
- 103:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 104:.\Generated_Source\PSoC5/USBFS_pm.c **** * Reentrant:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 4\r
-\r
-\r
- 105:.\Generated_Source\PSoC5/USBFS_pm.c **** *  No.\r
- 106:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 107:.\Generated_Source\PSoC5/USBFS_pm.c **** *******************************************************************************/\r
- 108:.\Generated_Source\PSoC5/USBFS_pm.c **** void USBFS_RestoreConfig(void) \r
- 109:.\Generated_Source\PSoC5/USBFS_pm.c **** {\r
-  68                           .loc 1 109 0\r
-  69                           .cfi_startproc\r
-  70                           @ args = 0, pretend = 0, frame = 0\r
-  71                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  72                           @ link register save eliminated.\r
- 110:.\Generated_Source\PSoC5/USBFS_pm.c ****     if(USBFS_configuration != 0u)\r
-  73                           .loc 1 110 0\r
-  74 0000 024B                 ldr     r3, .L8\r
-  75 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  76 0004 08B1                 cbz     r0, .L5\r
- 111:.\Generated_Source\PSoC5/USBFS_pm.c ****     {\r
- 112:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_ConfigReg();\r
- 113:.\Generated_Source\PSoC5/USBFS_pm.c ****     }\r
- 114:.\Generated_Source\PSoC5/USBFS_pm.c **** }\r
-  77                           .loc 1 114 0\r
- 112:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_ConfigReg();\r
-  78                           .loc 1 112 0\r
-  79 0006 FFF7FEBF             b       USBFS_ConfigReg\r
-  80                   .LVL0:\r
-  81                   .L5:\r
-  82 000a 7047                 bx      lr\r
-  83                   .L9:\r
-  84                           .align  2\r
-  85                   .L8:\r
-  86 000c 00000000             .word   USBFS_configuration\r
-  87                           .cfi_endproc\r
-  88                   .LFE58:\r
-  89                           .size   USBFS_RestoreConfig, .-USBFS_RestoreConfig\r
-  90                           .section        .text.USBFS_Suspend,"ax",%progbits\r
-  91                           .align  1\r
-  92                           .global USBFS_Suspend\r
-  93                           .thumb\r
-  94                           .thumb_func\r
-  95                           .type   USBFS_Suspend, %function\r
-  96                   USBFS_Suspend:\r
-  97                   .LFB59:\r
- 115:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 116:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 117:.\Generated_Source\PSoC5/USBFS_pm.c **** /*******************************************************************************\r
- 118:.\Generated_Source\PSoC5/USBFS_pm.c **** * Function Name: USBFS_Suspend\r
- 119:.\Generated_Source\PSoC5/USBFS_pm.c **** ********************************************************************************\r
- 120:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 121:.\Generated_Source\PSoC5/USBFS_pm.c **** * Summary:\r
- 122:.\Generated_Source\PSoC5/USBFS_pm.c **** *  This function disables the USBFS block and prepares for power donwn mode.\r
- 123:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 124:.\Generated_Source\PSoC5/USBFS_pm.c **** * Parameters:\r
- 125:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
- 126:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 127:.\Generated_Source\PSoC5/USBFS_pm.c **** * Return:\r
- 128:.\Generated_Source\PSoC5/USBFS_pm.c **** *   None.\r
- 129:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 130:.\Generated_Source\PSoC5/USBFS_pm.c **** * Global variables:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 5\r
-\r
-\r
- 131:.\Generated_Source\PSoC5/USBFS_pm.c **** *  USBFS_backup.enable:  modified.\r
- 132:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 133:.\Generated_Source\PSoC5/USBFS_pm.c **** * Reentrant:\r
- 134:.\Generated_Source\PSoC5/USBFS_pm.c **** *  No.\r
- 135:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 136:.\Generated_Source\PSoC5/USBFS_pm.c **** *******************************************************************************/\r
- 137:.\Generated_Source\PSoC5/USBFS_pm.c **** void USBFS_Suspend(void) \r
- 138:.\Generated_Source\PSoC5/USBFS_pm.c **** {\r
-  98                           .loc 1 138 0\r
-  99                           .cfi_startproc\r
- 100                           @ args = 0, pretend = 0, frame = 0\r
- 101                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 102 0000 2DE9F041             push    {r4, r5, r6, r7, r8, lr}\r
- 103                   .LCFI0:\r
- 104                           .cfi_def_cfa_offset 24\r
- 105                           .cfi_offset 4, -24\r
- 106                           .cfi_offset 5, -20\r
- 107                           .cfi_offset 6, -16\r
- 108                           .cfi_offset 7, -12\r
- 109                           .cfi_offset 8, -8\r
- 110                           .cfi_offset 14, -4\r
- 139:.\Generated_Source\PSoC5/USBFS_pm.c ****     uint8 enableInterrupts;\r
- 140:.\Generated_Source\PSoC5/USBFS_pm.c ****     enableInterrupts = CyEnterCriticalSection();\r
- 111                           .loc 1 140 0\r
- 112 0004 FFF7FEFF             bl      CyEnterCriticalSection\r
- 113                   .LVL1:\r
- 141:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 142:.\Generated_Source\PSoC5/USBFS_pm.c ****     if((CY_GET_REG8(USBFS_CR0_PTR) & USBFS_CR0_ENABLE) != 0u)\r
- 114                           .loc 1 142 0\r
- 115 0008 294F                 ldr     r7, .L13\r
- 140:.\Generated_Source\PSoC5/USBFS_pm.c ****     enableInterrupts = CyEnterCriticalSection();\r
- 116                           .loc 1 140 0\r
- 117 000a 8046                 mov     r8, r0\r
- 118                   .LVL2:\r
- 119                           .loc 1 142 0\r
- 120 000c 3B78                 ldrb    r3, [r7, #0]    @ zero_extendqisi2\r
- 121 000e 294D                 ldr     r5, .L13+4\r
- 122 0010 13F0800F             tst     r3, #128\r
- 123 0014 36D0                 beq     .L11\r
- 143:.\Generated_Source\PSoC5/USBFS_pm.c ****     {   /* USB block is enabled */\r
- 144:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_backup.enableState = 1u;\r
- 124                           .loc 1 144 0\r
- 125 0016 0126                 movs    r6, #1\r
- 145:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 146:.\Generated_Source\PSoC5/USBFS_pm.c ****         #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 147:.\Generated_Source\PSoC5/USBFS_pm.c ****             USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */\r
- 148:.\Generated_Source\PSoC5/USBFS_pm.c ****         #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 149:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 150:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled \r
- 151:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USBIO_CR0_REG &= (uint8)~USBFS_USBIO_CR0_TEN;\r
- 126                           .loc 1 151 0\r
- 127 0018 2749                 ldr     r1, .L13+8\r
- 144:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_backup.enableState = 1u;\r
- 128                           .loc 1 144 0\r
- 129 001a 2E70                 strb    r6, [r5, #0]\r
- 130                           .loc 1 151 0\r
- 131 001c 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 6\r
-\r
-\r
- 152:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(0u);  /*~50ns delay */\r
- 132                           .loc 1 152 0\r
- 133 001e 0020                 movs    r0, #0\r
- 134                   .LVL3:\r
- 151:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USBIO_CR0_REG &= (uint8)~USBFS_USBIO_CR0_TEN;\r
- 135                           .loc 1 151 0\r
- 136 0020 02F07F04             and     r4, r2, #127\r
- 137 0024 0C70                 strb    r4, [r1, #0]\r
- 153:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 154:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted) and pd_pullup_hv(Invert\r
- 155:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG &=\r
- 138                           .loc 1 155 0\r
- 139 0026 254C                 ldr     r4, .L13+12\r
- 152:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(0u);  /*~50ns delay */\r
- 140                           .loc 1 152 0\r
- 141 0028 FFF7FEFF             bl      CyDelayUs\r
- 142                   .LVL4:\r
- 143                           .loc 1 155 0\r
- 144 002c 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 145 002e 03F0F900             and     r0, r3, #249\r
- 146 0032 2070                 strb    r0, [r4, #0]\r
- 156:.\Generated_Source\PSoC5/USBFS_pm.c ****                                 (uint8)~(USBFS_PM_USB_CR0_PD_N | USBFS_PM_USB_CR0_PD_PULLUP_N);\r
- 157:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 158:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Disable the SIE */\r
- 159:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR0_REG &= (uint8)~USBFS_CR0_ENABLE;\r
- 147                           .loc 1 159 0\r
- 148 0034 3978                 ldrb    r1, [r7, #0]    @ zero_extendqisi2\r
- 160:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 161:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(0u);  /*~50ns delay */\r
- 149                           .loc 1 161 0\r
- 150 0036 0020                 movs    r0, #0\r
- 159:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR0_REG &= (uint8)~USBFS_CR0_ENABLE;\r
- 151                           .loc 1 159 0\r
- 152 0038 01F07F02             and     r2, r1, #127\r
- 153 003c 3A70                 strb    r2, [r7, #0]\r
- 154                           .loc 1 161 0\r
- 155 003e FFF7FEFF             bl      CyDelayUs\r
- 156                   .LVL5:\r
- 162:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Store mode and Disable VRegulator*/\r
- 163:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_backup.mode = USBFS_CR1_REG & USBFS_CR1_REG_ENABLE;\r
- 157                           .loc 1 163 0\r
- 158 0042 1F4B                 ldr     r3, .L13+16\r
- 159 0044 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 160 0046 3040                 ands    r0, r0, r6\r
- 161 0048 6870                 strb    r0, [r5, #1]\r
- 164:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR1_REG &= (uint8)~USBFS_CR1_REG_ENABLE;\r
- 162                           .loc 1 164 0\r
- 163 004a 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 165:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 166:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(1u);  /* 0.5 us min delay */\r
- 164                           .loc 1 166 0\r
- 165 004c 3046                 mov     r0, r6\r
- 164:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR1_REG &= (uint8)~USBFS_CR1_REG_ENABLE;\r
- 166                           .loc 1 164 0\r
- 167 004e 01F0FE02             and     r2, r1, #254\r
- 168 0052 1A70                 strb    r2, [r3, #0]\r
- 169                           .loc 1 166 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 7\r
-\r
-\r
- 170 0054 FFF7FEFF             bl      CyDelayUs\r
- 171                   .LVL6:\r
- 167:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Disable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
- 168:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG &= (uint8)~USBFS_PM_USB_CR0_REF_EN;\r
- 172                           .loc 1 168 0\r
- 173 0058 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 169:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 170:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Switch DP and DM terminals to GPIO mode and disconnect 1.5k pullup*/\r
- 171:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USBIO_CR1_REG |= USBFS_USBIO_CR1_IOMODE;\r
- 174                           .loc 1 171 0\r
- 175 005a 1A49                 ldr     r1, .L13+20\r
- 168:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG &= (uint8)~USBFS_PM_USB_CR0_REF_EN;\r
- 176                           .loc 1 168 0\r
- 177 005c 03F0FE00             and     r0, r3, #254\r
- 178 0060 2070                 strb    r0, [r4, #0]\r
- 179                           .loc 1 171 0\r
- 180 0062 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 172:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 173:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Disable USB in ACT PM */\r
- 174:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_ACT_CFG_REG &= (uint8)~USBFS_PM_ACT_EN_FSUSB;\r
- 181                           .loc 1 174 0\r
- 182 0064 1848                 ldr     r0, .L13+24\r
- 171:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USBIO_CR1_REG |= USBFS_USBIO_CR1_IOMODE;\r
- 183                           .loc 1 171 0\r
- 184 0066 42F02003             orr     r3, r2, #32\r
- 185 006a 0B70                 strb    r3, [r1, #0]\r
- 186                           .loc 1 174 0\r
- 187 006c 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 188 006e 01F0FE02             and     r2, r1, #254\r
- 189 0072 0270                 strb    r2, [r0, #0]\r
- 175:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Disable USB block for Standby Power Mode */\r
- 176:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_STBY_CFG_REG &= (uint8)~USBFS_PM_STBY_EN_FSUSB;\r
- 190                           .loc 1 176 0\r
- 191 0074 037C                 ldrb    r3, [r0, #16]   @ zero_extendqisi2\r
- 192 0076 03F0FE01             and     r1, r3, #254\r
- 193 007a 0174                 strb    r1, [r0, #16]\r
- 177:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(1u); /* min  0.5us delay required */\r
- 194                           .loc 1 177 0\r
- 195 007c 3046                 mov     r0, r6\r
- 196 007e FFF7FEFF             bl      CyDelayUs\r
- 197                   .LVL7:\r
- 198 0082 01E0                 b       .L12\r
- 199                   .LVL8:\r
- 200                   .L11:\r
- 178:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 179:.\Generated_Source\PSoC5/USBFS_pm.c ****     }\r
- 180:.\Generated_Source\PSoC5/USBFS_pm.c ****     else\r
- 181:.\Generated_Source\PSoC5/USBFS_pm.c ****     {\r
- 182:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_backup.enableState = 0u;\r
- 201                           .loc 1 182 0\r
- 202 0084 0020                 movs    r0, #0\r
- 203                   .LVL9:\r
- 204 0086 2870                 strb    r0, [r5, #0]\r
- 205                   .L12:\r
- 183:.\Generated_Source\PSoC5/USBFS_pm.c ****     }\r
- 184:.\Generated_Source\PSoC5/USBFS_pm.c ****     CyExitCriticalSection(enableInterrupts);\r
- 206                           .loc 1 184 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 8\r
-\r
-\r
- 207 0088 4046                 mov     r0, r8\r
- 208 008a FFF7FEFF             bl      CyExitCriticalSection\r
- 209                   .LVL10:\r
- 185:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 186:.\Generated_Source\PSoC5/USBFS_pm.c ****     /* Set the DP Interrupt for wake-up from sleep mode. */\r
- 187:.\Generated_Source\PSoC5/USBFS_pm.c ****     #if(USBFS_DP_ISR_REMOVE == 0u)\r
- 188:.\Generated_Source\PSoC5/USBFS_pm.c ****         (void) CyIntSetVector(USBFS_DP_INTC_VECT_NUM,   &USBFS_DP_ISR);\r
- 210                           .loc 1 188 0\r
- 211 008e 0F49                 ldr     r1, .L13+28\r
- 212 0090 0C20                 movs    r0, #12\r
- 213 0092 FFF7FEFF             bl      CyIntSetVector\r
- 214                   .LVL11:\r
- 189:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyIntSetPriority(USBFS_DP_INTC_VECT_NUM, USBFS_DP_INTC_PRIOR);\r
- 215                           .loc 1 189 0\r
- 216 0096 0C20                 movs    r0, #12\r
- 217 0098 0721                 movs    r1, #7\r
- 218 009a FFF7FEFF             bl      CyIntSetPriority\r
- 219                   .LVL12:\r
- 190:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyIntClearPending(USBFS_DP_INTC_VECT_NUM);\r
- 220                           .loc 1 190 0\r
- 221 009e 0C4A                 ldr     r2, .L13+32\r
- 222 00a0 4FF48050             mov     r0, #4096\r
- 191:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyIntEnable(USBFS_DP_INTC_VECT_NUM);\r
- 223                           .loc 1 191 0\r
- 224 00a4 A2F5C073             sub     r3, r2, #384\r
- 190:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyIntClearPending(USBFS_DP_INTC_VECT_NUM);\r
- 225                           .loc 1 190 0\r
- 226 00a8 1060                 str     r0, [r2, #0]\r
- 227                           .loc 1 191 0\r
- 228 00aa 1860                 str     r0, [r3, #0]\r
- 229 00ac BDE8F081             pop     {r4, r5, r6, r7, r8, pc}\r
- 230                   .L14:\r
- 231                           .align  2\r
- 232                   .L13:\r
- 233 00b0 08600040             .word   1073766408\r
- 234 00b4 00000000             .word   .LANCHOR0\r
- 235 00b8 10600040             .word   1073766416\r
- 236 00bc 94430040             .word   1073759124\r
- 237 00c0 09600040             .word   1073766409\r
- 238 00c4 12600040             .word   1073766418\r
- 239 00c8 A5430040             .word   1073759141\r
- 240 00cc 00000000             .word   USBFS_DP_ISR\r
- 241 00d0 80E200E0             .word   -536812928\r
- 242                           .cfi_endproc\r
- 243                   .LFE59:\r
- 244                           .size   USBFS_Suspend, .-USBFS_Suspend\r
- 245                           .section        .text.USBFS_Resume,"ax",%progbits\r
- 246                           .align  1\r
- 247                           .global USBFS_Resume\r
- 248                           .thumb\r
- 249                           .thumb_func\r
- 250                           .type   USBFS_Resume, %function\r
- 251                   USBFS_Resume:\r
- 252                   .LFB60:\r
- 192:.\Generated_Source\PSoC5/USBFS_pm.c ****     #endif /* (USBFS_DP_ISR_REMOVE == 0u) */\r
- 193:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 194:.\Generated_Source\PSoC5/USBFS_pm.c **** }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 9\r
-\r
-\r
- 195:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 196:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 197:.\Generated_Source\PSoC5/USBFS_pm.c **** /*******************************************************************************\r
- 198:.\Generated_Source\PSoC5/USBFS_pm.c **** * Function Name: USBFS_Resume\r
- 199:.\Generated_Source\PSoC5/USBFS_pm.c **** ********************************************************************************\r
- 200:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 201:.\Generated_Source\PSoC5/USBFS_pm.c **** * Summary:\r
- 202:.\Generated_Source\PSoC5/USBFS_pm.c **** *  This function enables the USBFS block after power down mode.\r
- 203:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 204:.\Generated_Source\PSoC5/USBFS_pm.c **** * Parameters:\r
- 205:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
- 206:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 207:.\Generated_Source\PSoC5/USBFS_pm.c **** * Return:\r
- 208:.\Generated_Source\PSoC5/USBFS_pm.c **** *  None.\r
- 209:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 210:.\Generated_Source\PSoC5/USBFS_pm.c **** * Global variables:\r
- 211:.\Generated_Source\PSoC5/USBFS_pm.c **** *  USBFS_backup - checked.\r
- 212:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 213:.\Generated_Source\PSoC5/USBFS_pm.c **** * Reentrant:\r
- 214:.\Generated_Source\PSoC5/USBFS_pm.c **** *  No.\r
- 215:.\Generated_Source\PSoC5/USBFS_pm.c **** *\r
- 216:.\Generated_Source\PSoC5/USBFS_pm.c **** *******************************************************************************/\r
- 217:.\Generated_Source\PSoC5/USBFS_pm.c **** void USBFS_Resume(void) \r
- 218:.\Generated_Source\PSoC5/USBFS_pm.c **** {\r
- 253                           .loc 1 218 0\r
- 254                           .cfi_startproc\r
- 255                           @ args = 0, pretend = 0, frame = 0\r
- 256                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 257 0000 70B5                 push    {r4, r5, r6, lr}\r
- 258                   .LCFI1:\r
- 259                           .cfi_def_cfa_offset 16\r
- 260                           .cfi_offset 4, -16\r
- 261                           .cfi_offset 5, -12\r
- 262                           .cfi_offset 6, -8\r
- 263                           .cfi_offset 14, -4\r
- 219:.\Generated_Source\PSoC5/USBFS_pm.c ****     uint8 enableInterrupts;\r
- 220:.\Generated_Source\PSoC5/USBFS_pm.c ****     enableInterrupts = CyEnterCriticalSection();\r
- 264                           .loc 1 220 0\r
- 265 0002 FFF7FEFF             bl      CyEnterCriticalSection\r
- 266                   .LVL13:\r
- 221:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 222:.\Generated_Source\PSoC5/USBFS_pm.c ****     if(USBFS_backup.enableState != 0u)\r
- 267                           .loc 1 222 0\r
- 268 0006 244D                 ldr     r5, .L20\r
- 220:.\Generated_Source\PSoC5/USBFS_pm.c ****     enableInterrupts = CyEnterCriticalSection();\r
- 269                           .loc 1 220 0\r
- 270 0008 0646                 mov     r6, r0\r
- 271                   .LVL14:\r
- 272                           .loc 1 222 0\r
- 273 000a 2B78                 ldrb    r3, [r5, #0]    @ zero_extendqisi2\r
- 274 000c 002B                 cmp     r3, #0\r
- 275 000e 3ED0                 beq     .L16\r
- 223:.\Generated_Source\PSoC5/USBFS_pm.c ****     {\r
- 224:.\Generated_Source\PSoC5/USBFS_pm.c ****         #if(USBFS_DP_ISR_REMOVE == 0u)\r
- 225:.\Generated_Source\PSoC5/USBFS_pm.c ****             CyIntDisable(USBFS_DP_INTC_VECT_NUM);\r
- 276                           .loc 1 225 0\r
- 277 0010 2248                 ldr     r0, .L20+4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 10\r
-\r
-\r
- 278                   .LVL15:\r
- 226:.\Generated_Source\PSoC5/USBFS_pm.c ****         #endif /* End USBFS_DP_ISR_REMOVE */\r
- 227:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 228:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable USB block */\r
- 229:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;\r
- 279                           .loc 1 229 0\r
- 280 0012 2349                 ldr     r1, .L20+8\r
- 225:.\Generated_Source\PSoC5/USBFS_pm.c ****             CyIntDisable(USBFS_DP_INTC_VECT_NUM);\r
- 281                           .loc 1 225 0\r
- 282 0014 4FF48052             mov     r2, #4096\r
- 283 0018 0260                 str     r2, [r0, #0]\r
- 284                           .loc 1 229 0\r
- 285 001a 0C78                 ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
- 286 001c 44F00103             orr     r3, r4, #1\r
- 287 0020 0B70                 strb    r3, [r1, #0]\r
- 230:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable USB block for Standby Power Mode */\r
- 231:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
- 288                           .loc 1 231 0\r
- 289 0022 0A7C                 ldrb    r2, [r1, #16]   @ zero_extendqisi2\r
- 290 0024 42F00100             orr     r0, r2, #1\r
- 291 0028 0874                 strb    r0, [r1, #16]\r
- 232:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable core clock */\r
- 233:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USB_CLK_EN_REG |= USBFS_USB_CLK_ENABLE;\r
- 292                           .loc 1 233 0\r
- 293 002a 1E49                 ldr     r1, .L20+12\r
- 294 002c 0C78                 ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
- 295 002e 44F00103             orr     r3, r4, #1\r
- 234:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 235:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
- 236:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_REF_EN;\r
- 296                           .loc 1 236 0\r
- 297 0032 1D4C                 ldr     r4, .L20+16\r
- 233:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_USB_CLK_EN_REG |= USBFS_USB_CLK_ENABLE;\r
- 298                           .loc 1 233 0\r
- 299 0034 0B70                 strb    r3, [r1, #0]\r
- 300                           .loc 1 236 0\r
- 301 0036 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 302 0038 42F00100             orr     r0, r2, #1\r
- 303 003c 2070                 strb    r0, [r4, #0]\r
- 237:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* The reference will be available ~40us after power restored */\r
- 238:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(40u);\r
- 304                           .loc 1 238 0\r
- 305 003e 2820                 movs    r0, #40\r
- 306 0040 FFF7FEFF             bl      CyDelayUs\r
- 307                   .LVL16:\r
- 239:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Return VRegulator*/\r
- 240:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR1_REG |= USBFS_backup.mode;\r
- 308                           .loc 1 240 0\r
- 309 0044 194B                 ldr     r3, .L20+20\r
- 310 0046 6A78                 ldrb    r2, [r5, #1]    @ zero_extendqisi2\r
- 311 0048 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 312 004a 41EA0200             orr     r0, r1, r2\r
- 313 004e 1870                 strb    r0, [r3, #0]\r
- 241:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(0u);  /*~50ns delay */\r
- 314                           .loc 1 241 0\r
- 315 0050 0020                 movs    r0, #0\r
- 316 0052 FFF7FEFF             bl      CyDelayUs\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 11\r
-\r
-\r
- 317                   .LVL17:\r
- 242:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable USBIO */\r
- 243:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_N;\r
- 318                           .loc 1 243 0\r
- 319 0056 2378                 ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 244:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayUs(2u);\r
- 320                           .loc 1 244 0\r
- 321 0058 0220                 movs    r0, #2\r
- 243:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_N;\r
- 322                           .loc 1 243 0\r
- 323 005a 43F00201             orr     r1, r3, #2\r
- 324 005e 2170                 strb    r1, [r4, #0]\r
- 325                           .loc 1 244 0\r
- 326 0060 FFF7FEFF             bl      CyDelayUs\r
- 327                   .LVL18:\r
- 245:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Set the USBIO pull-up enable */\r
- 246:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
- 328                           .loc 1 246 0\r
- 329 0064 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 247:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 248:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Reinit Arbiter configuration for DMA transfers */\r
- 249:.\Generated_Source\PSoC5/USBFS_pm.c ****         #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 250:.\Generated_Source\PSoC5/USBFS_pm.c ****             /* usb arb interrupt enable */\r
- 251:.\Generated_Source\PSoC5/USBFS_pm.c ****             USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;\r
- 252:.\Generated_Source\PSoC5/USBFS_pm.c ****             #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
- 253:.\Generated_Source\PSoC5/USBFS_pm.c ****                 USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;\r
- 254:.\Generated_Source\PSoC5/USBFS_pm.c ****             #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
- 255:.\Generated_Source\PSoC5/USBFS_pm.c ****             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 256:.\Generated_Source\PSoC5/USBFS_pm.c ****                 /*Set cfg cmplt this rises DMA request when the full configuration is done */\r
- 257:.\Generated_Source\PSoC5/USBFS_pm.c ****                 USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
- 258:.\Generated_Source\PSoC5/USBFS_pm.c ****             #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 259:.\Generated_Source\PSoC5/USBFS_pm.c ****         #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 260:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 261:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* STALL_IN_OUT */\r
- 262:.\Generated_Source\PSoC5/USBFS_pm.c ****         CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
- 330                           .loc 1 262 0\r
- 331 0066 124B                 ldr     r3, .L20+24\r
- 246:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
- 332                           .loc 1 246 0\r
- 333 0068 42F00400             orr     r0, r2, #4\r
- 334                           .loc 1 262 0\r
- 335 006c 0321                 movs    r1, #3\r
- 246:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
- 336                           .loc 1 246 0\r
- 337 006e 2070                 strb    r0, [r4, #0]\r
- 338                           .loc 1 262 0\r
- 339 0070 1970                 strb    r1, [r3, #0]\r
- 263:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Enable the SIE with a last address */\r
- 264:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_CR0_REG |= USBFS_CR0_ENABLE;\r
- 340                           .loc 1 264 0\r
- 341 0072 13F8202C             ldrb    r2, [r3, #-32]  @ zero_extendqisi2\r
- 342 0076 42F08000             orr     r0, r2, #128\r
- 343 007a 03F8200C             strb    r0, [r3, #-32]\r
- 265:.\Generated_Source\PSoC5/USBFS_pm.c ****         CyDelayCycles(1u);\r
- 344                           .loc 1 265 0\r
- 345 007e 0120                 movs    r0, #1\r
- 346 0080 FFF7FEFF             bl      CyDelayCycles\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 12\r
-\r
-\r
- 347                   .LVL19:\r
- 266:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Finally, Enable d+ pullup and select iomode to USB mode*/\r
- 267:.\Generated_Source\PSoC5/USBFS_pm.c ****         CY_SET_REG8(USBFS_USBIO_CR1_PTR, USBFS_USBIO_CR1_USBPUEN);\r
- 348                           .loc 1 267 0\r
- 349 0084 0B4B                 ldr     r3, .L20+28\r
- 350 0086 0421                 movs    r1, #4\r
- 351 0088 1970                 strb    r1, [r3, #0]\r
- 268:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 269:.\Generated_Source\PSoC5/USBFS_pm.c ****         /* Restore USB register settings */\r
- 270:.\Generated_Source\PSoC5/USBFS_pm.c ****         USBFS_RestoreConfig();\r
- 352                           .loc 1 270 0\r
- 353 008a FFF7FEFF             bl      USBFS_RestoreConfig\r
- 354                   .LVL20:\r
- 355                   .L16:\r
- 271:.\Generated_Source\PSoC5/USBFS_pm.c **** \r
- 272:.\Generated_Source\PSoC5/USBFS_pm.c ****     }\r
- 273:.\Generated_Source\PSoC5/USBFS_pm.c ****     CyExitCriticalSection(enableInterrupts);\r
- 356                           .loc 1 273 0\r
- 357 008e 3046                 mov     r0, r6\r
- 274:.\Generated_Source\PSoC5/USBFS_pm.c **** }\r
- 358                           .loc 1 274 0\r
- 359 0090 BDE87040             pop     {r4, r5, r6, lr}\r
- 273:.\Generated_Source\PSoC5/USBFS_pm.c ****     CyExitCriticalSection(enableInterrupts);\r
- 360                           .loc 1 273 0\r
- 361 0094 FFF7FEBF             b       CyExitCriticalSection\r
- 362                   .LVL21:\r
- 363                   .L21:\r
- 364                           .align  2\r
- 365                   .L20:\r
- 366 0098 00000000             .word   .LANCHOR0\r
- 367 009c 80E100E0             .word   -536813184\r
- 368 00a0 A5430040             .word   1073759141\r
- 369 00a4 9D600040             .word   1073766557\r
- 370 00a8 94430040             .word   1073759124\r
- 371 00ac 09600040             .word   1073766409\r
- 372 00b0 28600040             .word   1073766440\r
- 373 00b4 12600040             .word   1073766418\r
- 374                           .cfi_endproc\r
- 375                   .LFE60:\r
- 376                           .size   USBFS_Resume, .-USBFS_Resume\r
- 377                           .bss\r
- 378                           .set    .LANCHOR0,. + 0\r
- 379                           .type   USBFS_backup, %object\r
- 380                           .size   USBFS_backup, 2\r
- 381                   USBFS_backup:\r
- 382 0000 0000                 .space  2\r
- 383                           .text\r
- 384                   .Letext0:\r
- 385                           .file 2 "c:\\program files (x86)\\cypress\\psoc creator\\3.0\\psoc creator\\import\\gnu_cs\\arm\\4\r
- 386                           .file 3 "./Generated_Source/PSoC5/cytypes.h"\r
- 387                           .file 4 "./Generated_Source/PSoC5/USBFS.h"\r
- 388                           .file 5 "./Generated_Source/PSoC5/core_cm3.h"\r
- 389                           .file 6 "./Generated_Source/PSoC5/CyLib.h"\r
- 390                           .file 7 "./Generated_Source/PSoC5/USBFS_pvt.h"\r
- 391                           .section        .debug_info,"",%progbits\r
- 392                   .Ldebug_info0:\r
- 393 0000 7D030000             .4byte  0x37d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 13\r
-\r
-\r
- 394 0004 0200                 .2byte  0x2\r
- 395 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 396 000a 04                   .byte   0x4\r
- 397 000b 01                   .uleb128 0x1\r
- 398 000c FD010000             .4byte  .LASF35\r
- 399 0010 01                   .byte   0x1\r
- 400 0011 D3010000             .4byte  .LASF36\r
- 401 0015 93000000             .4byte  .LASF37\r
- 402 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 403 001d 00000000             .4byte  0\r
- 404 0021 00000000             .4byte  0\r
- 405 0025 00000000             .4byte  .Ldebug_line0\r
- 406 0029 02                   .uleb128 0x2\r
- 407 002a 01                   .byte   0x1\r
- 408 002b 06                   .byte   0x6\r
- 409 002c 7E020000             .4byte  .LASF0\r
- 410 0030 02                   .uleb128 0x2\r
- 411 0031 01                   .byte   0x1\r
- 412 0032 08                   .byte   0x8\r
- 413 0033 6E000000             .4byte  .LASF1\r
- 414 0037 02                   .uleb128 0x2\r
- 415 0038 02                   .byte   0x2\r
- 416 0039 05                   .byte   0x5\r
- 417 003a C9010000             .4byte  .LASF2\r
- 418 003e 02                   .uleb128 0x2\r
- 419 003f 02                   .byte   0x2\r
- 420 0040 07                   .byte   0x7\r
- 421 0041 31000000             .4byte  .LASF3\r
- 422 0045 03                   .uleb128 0x3\r
- 423 0046 91010000             .4byte  .LASF9\r
- 424 004a 02                   .byte   0x2\r
- 425 004b 4F                   .byte   0x4f\r
- 426 004c 50000000             .4byte  0x50\r
- 427 0050 02                   .uleb128 0x2\r
- 428 0051 04                   .byte   0x4\r
- 429 0052 05                   .byte   0x5\r
- 430 0053 69020000             .4byte  .LASF4\r
- 431 0057 02                   .uleb128 0x2\r
- 432 0058 04                   .byte   0x4\r
- 433 0059 07                   .byte   0x7\r
- 434 005a 81000000             .4byte  .LASF5\r
- 435 005e 02                   .uleb128 0x2\r
- 436 005f 08                   .byte   0x8\r
- 437 0060 05                   .byte   0x5\r
- 438 0061 A2010000             .4byte  .LASF6\r
- 439 0065 02                   .uleb128 0x2\r
- 440 0066 08                   .byte   0x8\r
- 441 0067 07                   .byte   0x7\r
- 442 0068 43010000             .4byte  .LASF7\r
- 443 006c 04                   .uleb128 0x4\r
- 444 006d 04                   .byte   0x4\r
- 445 006e 05                   .byte   0x5\r
- 446 006f 696E7400             .ascii  "int\000"\r
- 447 0073 02                   .uleb128 0x2\r
- 448 0074 04                   .byte   0x4\r
- 449 0075 07                   .byte   0x7\r
- 450 0076 36010000             .4byte  .LASF8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 14\r
-\r
-\r
- 451 007a 03                   .uleb128 0x3\r
- 452 007b F7010000             .4byte  .LASF10\r
- 453 007f 03                   .byte   0x3\r
- 454 0080 5B                   .byte   0x5b\r
- 455 0081 30000000             .4byte  0x30\r
- 456 0085 03                   .uleb128 0x3\r
- 457 0086 F6000000             .4byte  .LASF11\r
- 458 008a 03                   .byte   0x3\r
- 459 008b 5C                   .byte   0x5c\r
- 460 008c 3E000000             .4byte  0x3e\r
- 461 0090 03                   .uleb128 0x3\r
- 462 0091 18010000             .4byte  .LASF12\r
- 463 0095 03                   .byte   0x3\r
- 464 0096 5D                   .byte   0x5d\r
- 465 0097 57000000             .4byte  0x57\r
- 466 009b 02                   .uleb128 0x2\r
- 467 009c 04                   .byte   0x4\r
- 468 009d 04                   .byte   0x4\r
- 469 009e 54000000             .4byte  .LASF13\r
- 470 00a2 02                   .uleb128 0x2\r
- 471 00a3 08                   .byte   0x8\r
- 472 00a4 04                   .byte   0x4\r
- 473 00a5 EF000000             .4byte  .LASF14\r
- 474 00a9 02                   .uleb128 0x2\r
- 475 00aa 01                   .byte   0x1\r
- 476 00ab 08                   .byte   0x8\r
- 477 00ac B0010000             .4byte  .LASF15\r
- 478 00b0 03                   .uleb128 0x3\r
- 479 00b1 7C000000             .4byte  .LASF16\r
- 480 00b5 03                   .byte   0x3\r
- 481 00b6 F0                   .byte   0xf0\r
- 482 00b7 BB000000             .4byte  0xbb\r
- 483 00bb 05                   .uleb128 0x5\r
- 484 00bc 7A000000             .4byte  0x7a\r
- 485 00c0 03                   .uleb128 0x3\r
- 486 00c1 0E000000             .4byte  .LASF17\r
- 487 00c5 03                   .byte   0x3\r
- 488 00c6 F2                   .byte   0xf2\r
- 489 00c7 CB000000             .4byte  0xcb\r
- 490 00cb 05                   .uleb128 0x5\r
- 491 00cc 90000000             .4byte  0x90\r
- 492 00d0 06                   .uleb128 0x6\r
- 493 00d1 84010000             .4byte  .LASF18\r
- 494 00d5 03                   .byte   0x3\r
- 495 00d6 0201                 .2byte  0x102\r
- 496 00d8 DC000000             .4byte  0xdc\r
- 497 00dc 07                   .uleb128 0x7\r
- 498 00dd 04                   .byte   0x4\r
- 499 00de E2000000             .4byte  0xe2\r
- 500 00e2 08                   .uleb128 0x8\r
- 501 00e3 01                   .byte   0x1\r
- 502 00e4 02                   .uleb128 0x2\r
- 503 00e5 04                   .byte   0x4\r
- 504 00e6 07                   .byte   0x7\r
- 505 00e7 99010000             .4byte  .LASF19\r
- 506 00eb 09                   .uleb128 0x9\r
- 507 00ec 02                   .byte   0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 15\r
-\r
-\r
- 508 00ed 04                   .byte   0x4\r
- 509 00ee A5                   .byte   0xa5\r
- 510 00ef 10010000             .4byte  0x110\r
- 511 00f3 0A                   .uleb128 0xa\r
- 512 00f4 72020000             .4byte  .LASF20\r
- 513 00f8 04                   .byte   0x4\r
- 514 00f9 A7                   .byte   0xa7\r
- 515 00fa 7A000000             .4byte  0x7a\r
- 516 00fe 02                   .byte   0x2\r
- 517 00ff 23                   .byte   0x23\r
- 518 0100 00                   .uleb128 0\r
- 519 0101 0A                   .uleb128 0xa\r
- 520 0102 6B010000             .4byte  .LASF21\r
- 521 0106 04                   .byte   0x4\r
- 522 0107 A8                   .byte   0xa8\r
- 523 0108 7A000000             .4byte  0x7a\r
- 524 010c 02                   .byte   0x2\r
- 525 010d 23                   .byte   0x23\r
- 526 010e 01                   .uleb128 0x1\r
- 527 010f 00                   .byte   0\r
- 528 0110 03                   .uleb128 0x3\r
- 529 0111 70010000             .4byte  .LASF22\r
- 530 0115 04                   .byte   0x4\r
- 531 0116 A9                   .byte   0xa9\r
- 532 0117 EB000000             .4byte  0xeb\r
- 533 011b 0B                   .uleb128 0xb\r
- 534 011c 01                   .byte   0x1\r
- 535 011d 8A020000             .4byte  .LASF23\r
- 536 0121 01                   .byte   0x1\r
- 537 0122 37                   .byte   0x37\r
- 538 0123 01                   .byte   0x1\r
- 539 0124 00000000             .4byte  .LFB56\r
- 540 0128 0C000000             .4byte  .LFE56\r
- 541 012c 02                   .byte   0x2\r
- 542 012d 7D                   .byte   0x7d\r
- 543 012e 00                   .sleb128 0\r
- 544 012f 01                   .byte   0x1\r
- 545 0130 0B                   .uleb128 0xb\r
- 546 0131 01                   .byte   0x1\r
- 547 0132 FD000000             .4byte  .LASF24\r
- 548 0136 01                   .byte   0x1\r
- 549 0137 55                   .byte   0x55\r
- 550 0138 01                   .byte   0x1\r
- 551 0139 00000000             .4byte  .LFB57\r
- 552 013d 02000000             .4byte  .LFE57\r
- 553 0141 02                   .byte   0x2\r
- 554 0142 7D                   .byte   0x7d\r
- 555 0143 00                   .sleb128 0\r
- 556 0144 01                   .byte   0x1\r
- 557 0145 0C                   .uleb128 0xc\r
- 558 0146 01                   .byte   0x1\r
- 559 0147 B5010000             .4byte  .LASF25\r
- 560 014b 01                   .byte   0x1\r
- 561 014c 6C                   .byte   0x6c\r
- 562 014d 01                   .byte   0x1\r
- 563 014e 00000000             .4byte  .LFB58\r
- 564 0152 10000000             .4byte  .LFE58\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 16\r
-\r
-\r
- 565 0156 02                   .byte   0x2\r
- 566 0157 7D                   .byte   0x7d\r
- 567 0158 00                   .sleb128 0\r
- 568 0159 01                   .byte   0x1\r
- 569 015a 69010000             .4byte  0x169\r
- 570 015e 0D                   .uleb128 0xd\r
- 571 015f 0A000000             .4byte  .LVL0\r
- 572 0163 01                   .byte   0x1\r
- 573 0164 FA020000             .4byte  0x2fa\r
- 574 0168 00                   .byte   0\r
- 575 0169 0E                   .uleb128 0xe\r
- 576 016a 01                   .byte   0x1\r
- 577 016b 14000000             .4byte  .LASF26\r
- 578 016f 01                   .byte   0x1\r
- 579 0170 89                   .byte   0x89\r
- 580 0171 01                   .byte   0x1\r
- 581 0172 00000000             .4byte  .LFB59\r
- 582 0176 D4000000             .4byte  .LFE59\r
- 583 017a 00000000             .4byte  .LLST0\r
- 584 017e 01                   .byte   0x1\r
- 585 017f 2E020000             .4byte  0x22e\r
- 586 0183 0F                   .uleb128 0xf\r
- 587 0184 DE000000             .4byte  .LASF28\r
- 588 0188 01                   .byte   0x1\r
- 589 0189 8B                   .byte   0x8b\r
- 590 018a 7A000000             .4byte  0x7a\r
- 591 018e 20000000             .4byte  .LLST1\r
- 592 0192 10                   .uleb128 0x10\r
- 593 0193 08000000             .4byte  .LVL1\r
- 594 0197 04030000             .4byte  0x304\r
- 595 019b 11                   .uleb128 0x11\r
- 596 019c 2C000000             .4byte  .LVL4\r
- 597 01a0 12030000             .4byte  0x312\r
- 598 01a4 AE010000             .4byte  0x1ae\r
- 599 01a8 12                   .uleb128 0x12\r
- 600 01a9 01                   .byte   0x1\r
- 601 01aa 50                   .byte   0x50\r
- 602 01ab 01                   .byte   0x1\r
- 603 01ac 30                   .byte   0x30\r
- 604 01ad 00                   .byte   0\r
- 605 01ae 11                   .uleb128 0x11\r
- 606 01af 42000000             .4byte  .LVL5\r
- 607 01b3 12030000             .4byte  0x312\r
- 608 01b7 C1010000             .4byte  0x1c1\r
- 609 01bb 12                   .uleb128 0x12\r
- 610 01bc 01                   .byte   0x1\r
- 611 01bd 50                   .byte   0x50\r
- 612 01be 01                   .byte   0x1\r
- 613 01bf 30                   .byte   0x30\r
- 614 01c0 00                   .byte   0\r
- 615 01c1 11                   .uleb128 0x11\r
- 616 01c2 58000000             .4byte  .LVL6\r
- 617 01c6 12030000             .4byte  0x312\r
- 618 01ca D5010000             .4byte  0x1d5\r
- 619 01ce 12                   .uleb128 0x12\r
- 620 01cf 01                   .byte   0x1\r
- 621 01d0 50                   .byte   0x50\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 17\r
-\r
-\r
- 622 01d1 02                   .byte   0x2\r
- 623 01d2 76                   .byte   0x76\r
- 624 01d3 00                   .sleb128 0\r
- 625 01d4 00                   .byte   0\r
- 626 01d5 11                   .uleb128 0x11\r
- 627 01d6 82000000             .4byte  .LVL7\r
- 628 01da 12030000             .4byte  0x312\r
- 629 01de E9010000             .4byte  0x1e9\r
- 630 01e2 12                   .uleb128 0x12\r
- 631 01e3 01                   .byte   0x1\r
- 632 01e4 50                   .byte   0x50\r
- 633 01e5 02                   .byte   0x2\r
- 634 01e6 76                   .byte   0x76\r
- 635 01e7 00                   .sleb128 0\r
- 636 01e8 00                   .byte   0\r
- 637 01e9 11                   .uleb128 0x11\r
- 638 01ea 8E000000             .4byte  .LVL10\r
- 639 01ee 26030000             .4byte  0x326\r
- 640 01f2 FD010000             .4byte  0x1fd\r
- 641 01f6 12                   .uleb128 0x12\r
- 642 01f7 01                   .byte   0x1\r
- 643 01f8 50                   .byte   0x50\r
- 644 01f9 02                   .byte   0x2\r
- 645 01fa 78                   .byte   0x78\r
- 646 01fb 00                   .sleb128 0\r
- 647 01fc 00                   .byte   0\r
- 648 01fd 11                   .uleb128 0x11\r
- 649 01fe 96000000             .4byte  .LVL11\r
- 650 0202 3A030000             .4byte  0x33a\r
- 651 0206 19020000             .4byte  0x219\r
- 652 020a 12                   .uleb128 0x12\r
- 653 020b 01                   .byte   0x1\r
- 654 020c 51                   .byte   0x51\r
- 655 020d 05                   .byte   0x5\r
- 656 020e 03                   .byte   0x3\r
- 657 020f 00000000             .4byte  USBFS_DP_ISR\r
- 658 0213 12                   .uleb128 0x12\r
- 659 0214 01                   .byte   0x1\r
- 660 0215 50                   .byte   0x50\r
- 661 0216 01                   .byte   0x1\r
- 662 0217 3C                   .byte   0x3c\r
- 663 0218 00                   .byte   0\r
- 664 0219 13                   .uleb128 0x13\r
- 665 021a 9E000000             .4byte  .LVL12\r
- 666 021e 57030000             .4byte  0x357\r
- 667 0222 12                   .uleb128 0x12\r
- 668 0223 01                   .byte   0x1\r
- 669 0224 51                   .byte   0x51\r
- 670 0225 01                   .byte   0x1\r
- 671 0226 37                   .byte   0x37\r
- 672 0227 12                   .uleb128 0x12\r
- 673 0228 01                   .byte   0x1\r
- 674 0229 50                   .byte   0x50\r
- 675 022a 01                   .byte   0x1\r
- 676 022b 3C                   .byte   0x3c\r
- 677 022c 00                   .byte   0\r
- 678 022d 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 18\r
-\r
-\r
- 679 022e 0E                   .uleb128 0xe\r
- 680 022f 01                   .byte   0x1\r
- 681 0230 5C020000             .4byte  .LASF27\r
- 682 0234 01                   .byte   0x1\r
- 683 0235 D9                   .byte   0xd9\r
- 684 0236 01                   .byte   0x1\r
- 685 0237 00000000             .4byte  .LFB60\r
- 686 023b B8000000             .4byte  .LFE60\r
- 687 023f 54000000             .4byte  .LLST2\r
- 688 0243 01                   .byte   0x1\r
- 689 0244 C8020000             .4byte  0x2c8\r
- 690 0248 0F                   .uleb128 0xf\r
- 691 0249 DE000000             .4byte  .LASF28\r
- 692 024d 01                   .byte   0x1\r
- 693 024e DB                   .byte   0xdb\r
- 694 024f 7A000000             .4byte  0x7a\r
- 695 0253 74000000             .4byte  .LLST3\r
- 696 0257 10                   .uleb128 0x10\r
- 697 0258 06000000             .4byte  .LVL13\r
- 698 025c 04030000             .4byte  0x304\r
- 699 0260 11                   .uleb128 0x11\r
- 700 0261 44000000             .4byte  .LVL16\r
- 701 0265 12030000             .4byte  0x312\r
- 702 0269 74020000             .4byte  0x274\r
- 703 026d 12                   .uleb128 0x12\r
- 704 026e 01                   .byte   0x1\r
- 705 026f 50                   .byte   0x50\r
- 706 0270 02                   .byte   0x2\r
- 707 0271 08                   .byte   0x8\r
- 708 0272 28                   .byte   0x28\r
- 709 0273 00                   .byte   0\r
- 710 0274 11                   .uleb128 0x11\r
- 711 0275 56000000             .4byte  .LVL17\r
- 712 0279 12030000             .4byte  0x312\r
- 713 027d 87020000             .4byte  0x287\r
- 714 0281 12                   .uleb128 0x12\r
- 715 0282 01                   .byte   0x1\r
- 716 0283 50                   .byte   0x50\r
- 717 0284 01                   .byte   0x1\r
- 718 0285 30                   .byte   0x30\r
- 719 0286 00                   .byte   0\r
- 720 0287 11                   .uleb128 0x11\r
- 721 0288 64000000             .4byte  .LVL18\r
- 722 028c 12030000             .4byte  0x312\r
- 723 0290 9A020000             .4byte  0x29a\r
- 724 0294 12                   .uleb128 0x12\r
- 725 0295 01                   .byte   0x1\r
- 726 0296 50                   .byte   0x50\r
- 727 0297 01                   .byte   0x1\r
- 728 0298 32                   .byte   0x32\r
- 729 0299 00                   .byte   0\r
- 730 029a 11                   .uleb128 0x11\r
- 731 029b 84000000             .4byte  .LVL19\r
- 732 029f 70030000             .4byte  0x370\r
- 733 02a3 AD020000             .4byte  0x2ad\r
- 734 02a7 12                   .uleb128 0x12\r
- 735 02a8 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 19\r
-\r
-\r
- 736 02a9 50                   .byte   0x50\r
- 737 02aa 01                   .byte   0x1\r
- 738 02ab 31                   .byte   0x31\r
- 739 02ac 00                   .byte   0\r
- 740 02ad 10                   .uleb128 0x10\r
- 741 02ae 8E000000             .4byte  .LVL20\r
- 742 02b2 45010000             .4byte  0x145\r
- 743 02b6 14                   .uleb128 0x14\r
- 744 02b7 98000000             .4byte  .LVL21\r
- 745 02bb 01                   .byte   0x1\r
- 746 02bc 26030000             .4byte  0x326\r
- 747 02c0 12                   .uleb128 0x12\r
- 748 02c1 01                   .byte   0x1\r
- 749 02c2 50                   .byte   0x50\r
- 750 02c3 02                   .byte   0x2\r
- 751 02c4 76                   .byte   0x76\r
- 752 02c5 00                   .sleb128 0\r
- 753 02c6 00                   .byte   0\r
- 754 02c7 00                   .byte   0\r
- 755 02c8 15                   .uleb128 0x15\r
- 756 02c9 C4000000             .4byte  .LASF29\r
- 757 02cd 01                   .byte   0x1\r
- 758 02ce 22                   .byte   0x22\r
- 759 02cf 10010000             .4byte  0x110\r
- 760 02d3 05                   .byte   0x5\r
- 761 02d4 03                   .byte   0x3\r
- 762 02d5 00000000             .4byte  USBFS_backup\r
- 763 02d9 16                   .uleb128 0x16\r
- 764 02da 5A000000             .4byte  .LASF30\r
- 765 02de 04                   .byte   0x4\r
- 766 02df 1A02                 .2byte  0x21a\r
- 767 02e1 BB000000             .4byte  0xbb\r
- 768 02e5 01                   .byte   0x1\r
- 769 02e6 01                   .byte   0x1\r
- 770 02e7 16                   .uleb128 0x16\r
- 771 02e8 D1000000             .4byte  .LASF31\r
- 772 02ec 05                   .byte   0x5\r
- 773 02ed 1606                 .2byte  0x616\r
- 774 02ef F5020000             .4byte  0x2f5\r
- 775 02f3 01                   .byte   0x1\r
- 776 02f4 01                   .byte   0x1\r
- 777 02f5 05                   .uleb128 0x5\r
- 778 02f6 45000000             .4byte  0x45\r
- 779 02fa 17                   .uleb128 0x17\r
- 780 02fb 01                   .byte   0x1\r
- 781 02fc 44000000             .4byte  .LASF38\r
- 782 0300 07                   .byte   0x7\r
- 783 0301 6B                   .byte   0x6b\r
- 784 0302 01                   .byte   0x1\r
- 785 0303 01                   .byte   0x1\r
- 786 0304 18                   .uleb128 0x18\r
- 787 0305 01                   .byte   0x1\r
- 788 0306 1F010000             .4byte  .LASF39\r
- 789 030a 06                   .byte   0x6\r
- 790 030b 7E                   .byte   0x7e\r
- 791 030c 01                   .byte   0x1\r
- 792 030d 7A000000             .4byte  0x7a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 20\r
-\r
-\r
- 793 0311 01                   .byte   0x1\r
- 794 0312 19                   .uleb128 0x19\r
- 795 0313 01                   .byte   0x1\r
- 796 0314 0E010000             .4byte  .LASF32\r
- 797 0318 06                   .byte   0x6\r
- 798 0319 78                   .byte   0x78\r
- 799 031a 01                   .byte   0x1\r
- 800 031b 01                   .byte   0x1\r
- 801 031c 26030000             .4byte  0x326\r
- 802 0320 1A                   .uleb128 0x1a\r
- 803 0321 85000000             .4byte  0x85\r
- 804 0325 00                   .byte   0\r
- 805 0326 19                   .uleb128 0x19\r
- 806 0327 01                   .byte   0x1\r
- 807 0328 46020000             .4byte  .LASF33\r
- 808 032c 06                   .byte   0x6\r
- 809 032d 7F                   .byte   0x7f\r
- 810 032e 01                   .byte   0x1\r
- 811 032f 01                   .byte   0x1\r
- 812 0330 3A030000             .4byte  0x33a\r
- 813 0334 1A                   .uleb128 0x1a\r
- 814 0335 7A000000             .4byte  0x7a\r
- 815 0339 00                   .byte   0\r
- 816 033a 1B                   .uleb128 0x1b\r
- 817 033b 01                   .byte   0x1\r
- 818 033c 22000000             .4byte  .LASF40\r
- 819 0340 06                   .byte   0x6\r
- 820 0341 89                   .byte   0x89\r
- 821 0342 01                   .byte   0x1\r
- 822 0343 D0000000             .4byte  0xd0\r
- 823 0347 01                   .byte   0x1\r
- 824 0348 57030000             .4byte  0x357\r
- 825 034c 1A                   .uleb128 0x1a\r
- 826 034d 7A000000             .4byte  0x7a\r
- 827 0351 1A                   .uleb128 0x1a\r
- 828 0352 D0000000             .4byte  0xd0\r
- 829 0356 00                   .byte   0\r
- 830 0357 19                   .uleb128 0x19\r
- 831 0358 01                   .byte   0x1\r
- 832 0359 5A010000             .4byte  .LASF34\r
- 833 035d 06                   .byte   0x6\r
- 834 035e 8C                   .byte   0x8c\r
- 835 035f 01                   .byte   0x1\r
- 836 0360 01                   .byte   0x1\r
- 837 0361 70030000             .4byte  0x370\r
- 838 0365 1A                   .uleb128 0x1a\r
- 839 0366 7A000000             .4byte  0x7a\r
- 840 036a 1A                   .uleb128 0x1a\r
- 841 036b 7A000000             .4byte  0x7a\r
- 842 036f 00                   .byte   0\r
- 843 0370 1C                   .uleb128 0x1c\r
- 844 0371 01                   .byte   0x1\r
- 845 0372 00000000             .4byte  .LASF41\r
- 846 0376 06                   .byte   0x6\r
- 847 0377 7A                   .byte   0x7a\r
- 848 0378 01                   .byte   0x1\r
- 849 0379 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 21\r
-\r
-\r
- 850 037a 1A                   .uleb128 0x1a\r
- 851 037b 90000000             .4byte  0x90\r
- 852 037f 00                   .byte   0\r
- 853 0380 00                   .byte   0\r
- 854                           .section        .debug_abbrev,"",%progbits\r
- 855                   .Ldebug_abbrev0:\r
- 856 0000 01                   .uleb128 0x1\r
- 857 0001 11                   .uleb128 0x11\r
- 858 0002 01                   .byte   0x1\r
- 859 0003 25                   .uleb128 0x25\r
- 860 0004 0E                   .uleb128 0xe\r
- 861 0005 13                   .uleb128 0x13\r
- 862 0006 0B                   .uleb128 0xb\r
- 863 0007 03                   .uleb128 0x3\r
- 864 0008 0E                   .uleb128 0xe\r
- 865 0009 1B                   .uleb128 0x1b\r
- 866 000a 0E                   .uleb128 0xe\r
- 867 000b 55                   .uleb128 0x55\r
- 868 000c 06                   .uleb128 0x6\r
- 869 000d 11                   .uleb128 0x11\r
- 870 000e 01                   .uleb128 0x1\r
- 871 000f 52                   .uleb128 0x52\r
- 872 0010 01                   .uleb128 0x1\r
- 873 0011 10                   .uleb128 0x10\r
- 874 0012 06                   .uleb128 0x6\r
- 875 0013 00                   .byte   0\r
- 876 0014 00                   .byte   0\r
- 877 0015 02                   .uleb128 0x2\r
- 878 0016 24                   .uleb128 0x24\r
- 879 0017 00                   .byte   0\r
- 880 0018 0B                   .uleb128 0xb\r
- 881 0019 0B                   .uleb128 0xb\r
- 882 001a 3E                   .uleb128 0x3e\r
- 883 001b 0B                   .uleb128 0xb\r
- 884 001c 03                   .uleb128 0x3\r
- 885 001d 0E                   .uleb128 0xe\r
- 886 001e 00                   .byte   0\r
- 887 001f 00                   .byte   0\r
- 888 0020 03                   .uleb128 0x3\r
- 889 0021 16                   .uleb128 0x16\r
- 890 0022 00                   .byte   0\r
- 891 0023 03                   .uleb128 0x3\r
- 892 0024 0E                   .uleb128 0xe\r
- 893 0025 3A                   .uleb128 0x3a\r
- 894 0026 0B                   .uleb128 0xb\r
- 895 0027 3B                   .uleb128 0x3b\r
- 896 0028 0B                   .uleb128 0xb\r
- 897 0029 49                   .uleb128 0x49\r
- 898 002a 13                   .uleb128 0x13\r
- 899 002b 00                   .byte   0\r
- 900 002c 00                   .byte   0\r
- 901 002d 04                   .uleb128 0x4\r
- 902 002e 24                   .uleb128 0x24\r
- 903 002f 00                   .byte   0\r
- 904 0030 0B                   .uleb128 0xb\r
- 905 0031 0B                   .uleb128 0xb\r
- 906 0032 3E                   .uleb128 0x3e\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 22\r
-\r
-\r
- 907 0033 0B                   .uleb128 0xb\r
- 908 0034 03                   .uleb128 0x3\r
- 909 0035 08                   .uleb128 0x8\r
- 910 0036 00                   .byte   0\r
- 911 0037 00                   .byte   0\r
- 912 0038 05                   .uleb128 0x5\r
- 913 0039 35                   .uleb128 0x35\r
- 914 003a 00                   .byte   0\r
- 915 003b 49                   .uleb128 0x49\r
- 916 003c 13                   .uleb128 0x13\r
- 917 003d 00                   .byte   0\r
- 918 003e 00                   .byte   0\r
- 919 003f 06                   .uleb128 0x6\r
- 920 0040 16                   .uleb128 0x16\r
- 921 0041 00                   .byte   0\r
- 922 0042 03                   .uleb128 0x3\r
- 923 0043 0E                   .uleb128 0xe\r
- 924 0044 3A                   .uleb128 0x3a\r
- 925 0045 0B                   .uleb128 0xb\r
- 926 0046 3B                   .uleb128 0x3b\r
- 927 0047 05                   .uleb128 0x5\r
- 928 0048 49                   .uleb128 0x49\r
- 929 0049 13                   .uleb128 0x13\r
- 930 004a 00                   .byte   0\r
- 931 004b 00                   .byte   0\r
- 932 004c 07                   .uleb128 0x7\r
- 933 004d 0F                   .uleb128 0xf\r
- 934 004e 00                   .byte   0\r
- 935 004f 0B                   .uleb128 0xb\r
- 936 0050 0B                   .uleb128 0xb\r
- 937 0051 49                   .uleb128 0x49\r
- 938 0052 13                   .uleb128 0x13\r
- 939 0053 00                   .byte   0\r
- 940 0054 00                   .byte   0\r
- 941 0055 08                   .uleb128 0x8\r
- 942 0056 15                   .uleb128 0x15\r
- 943 0057 00                   .byte   0\r
- 944 0058 27                   .uleb128 0x27\r
- 945 0059 0C                   .uleb128 0xc\r
- 946 005a 00                   .byte   0\r
- 947 005b 00                   .byte   0\r
- 948 005c 09                   .uleb128 0x9\r
- 949 005d 13                   .uleb128 0x13\r
- 950 005e 01                   .byte   0x1\r
- 951 005f 0B                   .uleb128 0xb\r
- 952 0060 0B                   .uleb128 0xb\r
- 953 0061 3A                   .uleb128 0x3a\r
- 954 0062 0B                   .uleb128 0xb\r
- 955 0063 3B                   .uleb128 0x3b\r
- 956 0064 0B                   .uleb128 0xb\r
- 957 0065 01                   .uleb128 0x1\r
- 958 0066 13                   .uleb128 0x13\r
- 959 0067 00                   .byte   0\r
- 960 0068 00                   .byte   0\r
- 961 0069 0A                   .uleb128 0xa\r
- 962 006a 0D                   .uleb128 0xd\r
- 963 006b 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 23\r
-\r
-\r
- 964 006c 03                   .uleb128 0x3\r
- 965 006d 0E                   .uleb128 0xe\r
- 966 006e 3A                   .uleb128 0x3a\r
- 967 006f 0B                   .uleb128 0xb\r
- 968 0070 3B                   .uleb128 0x3b\r
- 969 0071 0B                   .uleb128 0xb\r
- 970 0072 49                   .uleb128 0x49\r
- 971 0073 13                   .uleb128 0x13\r
- 972 0074 38                   .uleb128 0x38\r
- 973 0075 0A                   .uleb128 0xa\r
- 974 0076 00                   .byte   0\r
- 975 0077 00                   .byte   0\r
- 976 0078 0B                   .uleb128 0xb\r
- 977 0079 2E                   .uleb128 0x2e\r
- 978 007a 00                   .byte   0\r
- 979 007b 3F                   .uleb128 0x3f\r
- 980 007c 0C                   .uleb128 0xc\r
- 981 007d 03                   .uleb128 0x3\r
- 982 007e 0E                   .uleb128 0xe\r
- 983 007f 3A                   .uleb128 0x3a\r
- 984 0080 0B                   .uleb128 0xb\r
- 985 0081 3B                   .uleb128 0x3b\r
- 986 0082 0B                   .uleb128 0xb\r
- 987 0083 27                   .uleb128 0x27\r
- 988 0084 0C                   .uleb128 0xc\r
- 989 0085 11                   .uleb128 0x11\r
- 990 0086 01                   .uleb128 0x1\r
- 991 0087 12                   .uleb128 0x12\r
- 992 0088 01                   .uleb128 0x1\r
- 993 0089 40                   .uleb128 0x40\r
- 994 008a 0A                   .uleb128 0xa\r
- 995 008b 9742                 .uleb128 0x2117\r
- 996 008d 0C                   .uleb128 0xc\r
- 997 008e 00                   .byte   0\r
- 998 008f 00                   .byte   0\r
- 999 0090 0C                   .uleb128 0xc\r
- 1000 0091 2E                  .uleb128 0x2e\r
- 1001 0092 01                  .byte   0x1\r
- 1002 0093 3F                  .uleb128 0x3f\r
- 1003 0094 0C                  .uleb128 0xc\r
- 1004 0095 03                  .uleb128 0x3\r
- 1005 0096 0E                  .uleb128 0xe\r
- 1006 0097 3A                  .uleb128 0x3a\r
- 1007 0098 0B                  .uleb128 0xb\r
- 1008 0099 3B                  .uleb128 0x3b\r
- 1009 009a 0B                  .uleb128 0xb\r
- 1010 009b 27                  .uleb128 0x27\r
- 1011 009c 0C                  .uleb128 0xc\r
- 1012 009d 11                  .uleb128 0x11\r
- 1013 009e 01                  .uleb128 0x1\r
- 1014 009f 12                  .uleb128 0x12\r
- 1015 00a0 01                  .uleb128 0x1\r
- 1016 00a1 40                  .uleb128 0x40\r
- 1017 00a2 0A                  .uleb128 0xa\r
- 1018 00a3 9742                .uleb128 0x2117\r
- 1019 00a5 0C                  .uleb128 0xc\r
- 1020 00a6 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 24\r
-\r
-\r
- 1021 00a7 13                  .uleb128 0x13\r
- 1022 00a8 00                  .byte   0\r
- 1023 00a9 00                  .byte   0\r
- 1024 00aa 0D                  .uleb128 0xd\r
- 1025 00ab 898201              .uleb128 0x4109\r
- 1026 00ae 00                  .byte   0\r
- 1027 00af 11                  .uleb128 0x11\r
- 1028 00b0 01                  .uleb128 0x1\r
- 1029 00b1 9542                .uleb128 0x2115\r
- 1030 00b3 0C                  .uleb128 0xc\r
- 1031 00b4 31                  .uleb128 0x31\r
- 1032 00b5 13                  .uleb128 0x13\r
- 1033 00b6 00                  .byte   0\r
- 1034 00b7 00                  .byte   0\r
- 1035 00b8 0E                  .uleb128 0xe\r
- 1036 00b9 2E                  .uleb128 0x2e\r
- 1037 00ba 01                  .byte   0x1\r
- 1038 00bb 3F                  .uleb128 0x3f\r
- 1039 00bc 0C                  .uleb128 0xc\r
- 1040 00bd 03                  .uleb128 0x3\r
- 1041 00be 0E                  .uleb128 0xe\r
- 1042 00bf 3A                  .uleb128 0x3a\r
- 1043 00c0 0B                  .uleb128 0xb\r
- 1044 00c1 3B                  .uleb128 0x3b\r
- 1045 00c2 0B                  .uleb128 0xb\r
- 1046 00c3 27                  .uleb128 0x27\r
- 1047 00c4 0C                  .uleb128 0xc\r
- 1048 00c5 11                  .uleb128 0x11\r
- 1049 00c6 01                  .uleb128 0x1\r
- 1050 00c7 12                  .uleb128 0x12\r
- 1051 00c8 01                  .uleb128 0x1\r
- 1052 00c9 40                  .uleb128 0x40\r
- 1053 00ca 06                  .uleb128 0x6\r
- 1054 00cb 9742                .uleb128 0x2117\r
- 1055 00cd 0C                  .uleb128 0xc\r
- 1056 00ce 01                  .uleb128 0x1\r
- 1057 00cf 13                  .uleb128 0x13\r
- 1058 00d0 00                  .byte   0\r
- 1059 00d1 00                  .byte   0\r
- 1060 00d2 0F                  .uleb128 0xf\r
- 1061 00d3 34                  .uleb128 0x34\r
- 1062 00d4 00                  .byte   0\r
- 1063 00d5 03                  .uleb128 0x3\r
- 1064 00d6 0E                  .uleb128 0xe\r
- 1065 00d7 3A                  .uleb128 0x3a\r
- 1066 00d8 0B                  .uleb128 0xb\r
- 1067 00d9 3B                  .uleb128 0x3b\r
- 1068 00da 0B                  .uleb128 0xb\r
- 1069 00db 49                  .uleb128 0x49\r
- 1070 00dc 13                  .uleb128 0x13\r
- 1071 00dd 02                  .uleb128 0x2\r
- 1072 00de 06                  .uleb128 0x6\r
- 1073 00df 00                  .byte   0\r
- 1074 00e0 00                  .byte   0\r
- 1075 00e1 10                  .uleb128 0x10\r
- 1076 00e2 898201              .uleb128 0x4109\r
- 1077 00e5 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 25\r
-\r
-\r
- 1078 00e6 11                  .uleb128 0x11\r
- 1079 00e7 01                  .uleb128 0x1\r
- 1080 00e8 31                  .uleb128 0x31\r
- 1081 00e9 13                  .uleb128 0x13\r
- 1082 00ea 00                  .byte   0\r
- 1083 00eb 00                  .byte   0\r
- 1084 00ec 11                  .uleb128 0x11\r
- 1085 00ed 898201              .uleb128 0x4109\r
- 1086 00f0 01                  .byte   0x1\r
- 1087 00f1 11                  .uleb128 0x11\r
- 1088 00f2 01                  .uleb128 0x1\r
- 1089 00f3 31                  .uleb128 0x31\r
- 1090 00f4 13                  .uleb128 0x13\r
- 1091 00f5 01                  .uleb128 0x1\r
- 1092 00f6 13                  .uleb128 0x13\r
- 1093 00f7 00                  .byte   0\r
- 1094 00f8 00                  .byte   0\r
- 1095 00f9 12                  .uleb128 0x12\r
- 1096 00fa 8A8201              .uleb128 0x410a\r
- 1097 00fd 00                  .byte   0\r
- 1098 00fe 02                  .uleb128 0x2\r
- 1099 00ff 0A                  .uleb128 0xa\r
- 1100 0100 9142                .uleb128 0x2111\r
- 1101 0102 0A                  .uleb128 0xa\r
- 1102 0103 00                  .byte   0\r
- 1103 0104 00                  .byte   0\r
- 1104 0105 13                  .uleb128 0x13\r
- 1105 0106 898201              .uleb128 0x4109\r
- 1106 0109 01                  .byte   0x1\r
- 1107 010a 11                  .uleb128 0x11\r
- 1108 010b 01                  .uleb128 0x1\r
- 1109 010c 31                  .uleb128 0x31\r
- 1110 010d 13                  .uleb128 0x13\r
- 1111 010e 00                  .byte   0\r
- 1112 010f 00                  .byte   0\r
- 1113 0110 14                  .uleb128 0x14\r
- 1114 0111 898201              .uleb128 0x4109\r
- 1115 0114 01                  .byte   0x1\r
- 1116 0115 11                  .uleb128 0x11\r
- 1117 0116 01                  .uleb128 0x1\r
- 1118 0117 9542                .uleb128 0x2115\r
- 1119 0119 0C                  .uleb128 0xc\r
- 1120 011a 31                  .uleb128 0x31\r
- 1121 011b 13                  .uleb128 0x13\r
- 1122 011c 00                  .byte   0\r
- 1123 011d 00                  .byte   0\r
- 1124 011e 15                  .uleb128 0x15\r
- 1125 011f 34                  .uleb128 0x34\r
- 1126 0120 00                  .byte   0\r
- 1127 0121 03                  .uleb128 0x3\r
- 1128 0122 0E                  .uleb128 0xe\r
- 1129 0123 3A                  .uleb128 0x3a\r
- 1130 0124 0B                  .uleb128 0xb\r
- 1131 0125 3B                  .uleb128 0x3b\r
- 1132 0126 0B                  .uleb128 0xb\r
- 1133 0127 49                  .uleb128 0x49\r
- 1134 0128 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 26\r
-\r
-\r
- 1135 0129 02                  .uleb128 0x2\r
- 1136 012a 0A                  .uleb128 0xa\r
- 1137 012b 00                  .byte   0\r
- 1138 012c 00                  .byte   0\r
- 1139 012d 16                  .uleb128 0x16\r
- 1140 012e 34                  .uleb128 0x34\r
- 1141 012f 00                  .byte   0\r
- 1142 0130 03                  .uleb128 0x3\r
- 1143 0131 0E                  .uleb128 0xe\r
- 1144 0132 3A                  .uleb128 0x3a\r
- 1145 0133 0B                  .uleb128 0xb\r
- 1146 0134 3B                  .uleb128 0x3b\r
- 1147 0135 05                  .uleb128 0x5\r
- 1148 0136 49                  .uleb128 0x49\r
- 1149 0137 13                  .uleb128 0x13\r
- 1150 0138 3F                  .uleb128 0x3f\r
- 1151 0139 0C                  .uleb128 0xc\r
- 1152 013a 3C                  .uleb128 0x3c\r
- 1153 013b 0C                  .uleb128 0xc\r
- 1154 013c 00                  .byte   0\r
- 1155 013d 00                  .byte   0\r
- 1156 013e 17                  .uleb128 0x17\r
- 1157 013f 2E                  .uleb128 0x2e\r
- 1158 0140 00                  .byte   0\r
- 1159 0141 3F                  .uleb128 0x3f\r
- 1160 0142 0C                  .uleb128 0xc\r
- 1161 0143 03                  .uleb128 0x3\r
- 1162 0144 0E                  .uleb128 0xe\r
- 1163 0145 3A                  .uleb128 0x3a\r
- 1164 0146 0B                  .uleb128 0xb\r
- 1165 0147 3B                  .uleb128 0x3b\r
- 1166 0148 0B                  .uleb128 0xb\r
- 1167 0149 27                  .uleb128 0x27\r
- 1168 014a 0C                  .uleb128 0xc\r
- 1169 014b 3C                  .uleb128 0x3c\r
- 1170 014c 0C                  .uleb128 0xc\r
- 1171 014d 00                  .byte   0\r
- 1172 014e 00                  .byte   0\r
- 1173 014f 18                  .uleb128 0x18\r
- 1174 0150 2E                  .uleb128 0x2e\r
- 1175 0151 00                  .byte   0\r
- 1176 0152 3F                  .uleb128 0x3f\r
- 1177 0153 0C                  .uleb128 0xc\r
- 1178 0154 03                  .uleb128 0x3\r
- 1179 0155 0E                  .uleb128 0xe\r
- 1180 0156 3A                  .uleb128 0x3a\r
- 1181 0157 0B                  .uleb128 0xb\r
- 1182 0158 3B                  .uleb128 0x3b\r
- 1183 0159 0B                  .uleb128 0xb\r
- 1184 015a 27                  .uleb128 0x27\r
- 1185 015b 0C                  .uleb128 0xc\r
- 1186 015c 49                  .uleb128 0x49\r
- 1187 015d 13                  .uleb128 0x13\r
- 1188 015e 3C                  .uleb128 0x3c\r
- 1189 015f 0C                  .uleb128 0xc\r
- 1190 0160 00                  .byte   0\r
- 1191 0161 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 27\r
-\r
-\r
- 1192 0162 19                  .uleb128 0x19\r
- 1193 0163 2E                  .uleb128 0x2e\r
- 1194 0164 01                  .byte   0x1\r
- 1195 0165 3F                  .uleb128 0x3f\r
- 1196 0166 0C                  .uleb128 0xc\r
- 1197 0167 03                  .uleb128 0x3\r
- 1198 0168 0E                  .uleb128 0xe\r
- 1199 0169 3A                  .uleb128 0x3a\r
- 1200 016a 0B                  .uleb128 0xb\r
- 1201 016b 3B                  .uleb128 0x3b\r
- 1202 016c 0B                  .uleb128 0xb\r
- 1203 016d 27                  .uleb128 0x27\r
- 1204 016e 0C                  .uleb128 0xc\r
- 1205 016f 3C                  .uleb128 0x3c\r
- 1206 0170 0C                  .uleb128 0xc\r
- 1207 0171 01                  .uleb128 0x1\r
- 1208 0172 13                  .uleb128 0x13\r
- 1209 0173 00                  .byte   0\r
- 1210 0174 00                  .byte   0\r
- 1211 0175 1A                  .uleb128 0x1a\r
- 1212 0176 05                  .uleb128 0x5\r
- 1213 0177 00                  .byte   0\r
- 1214 0178 49                  .uleb128 0x49\r
- 1215 0179 13                  .uleb128 0x13\r
- 1216 017a 00                  .byte   0\r
- 1217 017b 00                  .byte   0\r
- 1218 017c 1B                  .uleb128 0x1b\r
- 1219 017d 2E                  .uleb128 0x2e\r
- 1220 017e 01                  .byte   0x1\r
- 1221 017f 3F                  .uleb128 0x3f\r
- 1222 0180 0C                  .uleb128 0xc\r
- 1223 0181 03                  .uleb128 0x3\r
- 1224 0182 0E                  .uleb128 0xe\r
- 1225 0183 3A                  .uleb128 0x3a\r
- 1226 0184 0B                  .uleb128 0xb\r
- 1227 0185 3B                  .uleb128 0x3b\r
- 1228 0186 0B                  .uleb128 0xb\r
- 1229 0187 27                  .uleb128 0x27\r
- 1230 0188 0C                  .uleb128 0xc\r
- 1231 0189 49                  .uleb128 0x49\r
- 1232 018a 13                  .uleb128 0x13\r
- 1233 018b 3C                  .uleb128 0x3c\r
- 1234 018c 0C                  .uleb128 0xc\r
- 1235 018d 01                  .uleb128 0x1\r
- 1236 018e 13                  .uleb128 0x13\r
- 1237 018f 00                  .byte   0\r
- 1238 0190 00                  .byte   0\r
- 1239 0191 1C                  .uleb128 0x1c\r
- 1240 0192 2E                  .uleb128 0x2e\r
- 1241 0193 01                  .byte   0x1\r
- 1242 0194 3F                  .uleb128 0x3f\r
- 1243 0195 0C                  .uleb128 0xc\r
- 1244 0196 03                  .uleb128 0x3\r
- 1245 0197 0E                  .uleb128 0xe\r
- 1246 0198 3A                  .uleb128 0x3a\r
- 1247 0199 0B                  .uleb128 0xb\r
- 1248 019a 3B                  .uleb128 0x3b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 28\r
-\r
-\r
- 1249 019b 0B                  .uleb128 0xb\r
- 1250 019c 27                  .uleb128 0x27\r
- 1251 019d 0C                  .uleb128 0xc\r
- 1252 019e 3C                  .uleb128 0x3c\r
- 1253 019f 0C                  .uleb128 0xc\r
- 1254 01a0 00                  .byte   0\r
- 1255 01a1 00                  .byte   0\r
- 1256 01a2 00                  .byte   0\r
- 1257                          .section        .debug_loc,"",%progbits\r
- 1258                  .Ldebug_loc0:\r
- 1259                  .LLST0:\r
- 1260 0000 00000000            .4byte  .LFB59\r
- 1261 0004 04000000            .4byte  .LCFI0\r
- 1262 0008 0200                .2byte  0x2\r
- 1263 000a 7D                  .byte   0x7d\r
- 1264 000b 00                  .sleb128 0\r
- 1265 000c 04000000            .4byte  .LCFI0\r
- 1266 0010 D4000000            .4byte  .LFE59\r
- 1267 0014 0200                .2byte  0x2\r
- 1268 0016 7D                  .byte   0x7d\r
- 1269 0017 18                  .sleb128 24\r
- 1270 0018 00000000            .4byte  0\r
- 1271 001c 00000000            .4byte  0\r
- 1272                  .LLST1:\r
- 1273 0020 0C000000            .4byte  .LVL2\r
- 1274 0024 20000000            .4byte  .LVL3\r
- 1275 0028 0100                .2byte  0x1\r
- 1276 002a 50                  .byte   0x50\r
- 1277 002b 20000000            .4byte  .LVL3\r
- 1278 002f 84000000            .4byte  .LVL8\r
- 1279 0033 0100                .2byte  0x1\r
- 1280 0035 58                  .byte   0x58\r
- 1281 0036 84000000            .4byte  .LVL8\r
- 1282 003a 86000000            .4byte  .LVL9\r
- 1283 003e 0100                .2byte  0x1\r
- 1284 0040 50                  .byte   0x50\r
- 1285 0041 86000000            .4byte  .LVL9\r
- 1286 0045 D4000000            .4byte  .LFE59\r
- 1287 0049 0100                .2byte  0x1\r
- 1288 004b 58                  .byte   0x58\r
- 1289 004c 00000000            .4byte  0\r
- 1290 0050 00000000            .4byte  0\r
- 1291                  .LLST2:\r
- 1292 0054 00000000            .4byte  .LFB60\r
- 1293 0058 02000000            .4byte  .LCFI1\r
- 1294 005c 0200                .2byte  0x2\r
- 1295 005e 7D                  .byte   0x7d\r
- 1296 005f 00                  .sleb128 0\r
- 1297 0060 02000000            .4byte  .LCFI1\r
- 1298 0064 B8000000            .4byte  .LFE60\r
- 1299 0068 0200                .2byte  0x2\r
- 1300 006a 7D                  .byte   0x7d\r
- 1301 006b 10                  .sleb128 16\r
- 1302 006c 00000000            .4byte  0\r
- 1303 0070 00000000            .4byte  0\r
- 1304                  .LLST3:\r
- 1305 0074 0A000000            .4byte  .LVL14\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 29\r
-\r
-\r
- 1306 0078 12000000            .4byte  .LVL15\r
- 1307 007c 0100                .2byte  0x1\r
- 1308 007e 50                  .byte   0x50\r
- 1309 007f 12000000            .4byte  .LVL15\r
- 1310 0083 B8000000            .4byte  .LFE60\r
- 1311 0087 0100                .2byte  0x1\r
- 1312 0089 56                  .byte   0x56\r
- 1313 008a 00000000            .4byte  0\r
- 1314 008e 00000000            .4byte  0\r
- 1315                          .section        .debug_aranges,"",%progbits\r
- 1316 0000 3C000000            .4byte  0x3c\r
- 1317 0004 0200                .2byte  0x2\r
- 1318 0006 00000000            .4byte  .Ldebug_info0\r
- 1319 000a 04                  .byte   0x4\r
- 1320 000b 00                  .byte   0\r
- 1321 000c 0000                .2byte  0\r
- 1322 000e 0000                .2byte  0\r
- 1323 0010 00000000            .4byte  .LFB56\r
- 1324 0014 0C000000            .4byte  .LFE56-.LFB56\r
- 1325 0018 00000000            .4byte  .LFB57\r
- 1326 001c 02000000            .4byte  .LFE57-.LFB57\r
- 1327 0020 00000000            .4byte  .LFB58\r
- 1328 0024 10000000            .4byte  .LFE58-.LFB58\r
- 1329 0028 00000000            .4byte  .LFB59\r
- 1330 002c D4000000            .4byte  .LFE59-.LFB59\r
- 1331 0030 00000000            .4byte  .LFB60\r
- 1332 0034 B8000000            .4byte  .LFE60-.LFB60\r
- 1333 0038 00000000            .4byte  0\r
- 1334 003c 00000000            .4byte  0\r
- 1335                          .section        .debug_ranges,"",%progbits\r
- 1336                  .Ldebug_ranges0:\r
- 1337 0000 00000000            .4byte  .LFB56\r
- 1338 0004 0C000000            .4byte  .LFE56\r
- 1339 0008 00000000            .4byte  .LFB57\r
- 1340 000c 02000000            .4byte  .LFE57\r
- 1341 0010 00000000            .4byte  .LFB58\r
- 1342 0014 10000000            .4byte  .LFE58\r
- 1343 0018 00000000            .4byte  .LFB59\r
- 1344 001c D4000000            .4byte  .LFE59\r
- 1345 0020 00000000            .4byte  .LFB60\r
- 1346 0024 B8000000            .4byte  .LFE60\r
- 1347 0028 00000000            .4byte  0\r
- 1348 002c 00000000            .4byte  0\r
- 1349                          .section        .debug_line,"",%progbits\r
- 1350                  .Ldebug_line0:\r
- 1351 0000 CD010000            .section        .debug_str,"MS",%progbits,1\r
- 1351      02002001 \r
- 1351      00000201 \r
- 1351      FB0E0D00 \r
- 1351      01010101 \r
- 1352                  .LASF41:\r
- 1353 0000 43794465            .ascii  "CyDelayCycles\000"\r
- 1353      6C617943 \r
- 1353      79636C65 \r
- 1353      7300\r
- 1354                  .LASF17:\r
- 1355 000e 72656733            .ascii  "reg32\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 30\r
-\r
-\r
- 1355      3200\r
- 1356                  .LASF26:\r
- 1357 0014 55534246            .ascii  "USBFS_Suspend\000"\r
- 1357      535F5375 \r
- 1357      7370656E \r
- 1357      6400\r
- 1358                  .LASF40:\r
- 1359 0022 4379496E            .ascii  "CyIntSetVector\000"\r
- 1359      74536574 \r
- 1359      56656374 \r
- 1359      6F7200\r
- 1360                  .LASF3:\r
- 1361 0031 73686F72            .ascii  "short unsigned int\000"\r
- 1361      7420756E \r
- 1361      7369676E \r
- 1361      65642069 \r
- 1361      6E7400\r
- 1362                  .LASF38:\r
- 1363 0044 55534246            .ascii  "USBFS_ConfigReg\000"\r
- 1363      535F436F \r
- 1363      6E666967 \r
- 1363      52656700 \r
- 1364                  .LASF13:\r
- 1365 0054 666C6F61            .ascii  "float\000"\r
- 1365      7400\r
- 1366                  .LASF30:\r
- 1367 005a 55534246            .ascii  "USBFS_configuration\000"\r
- 1367      535F636F \r
- 1367      6E666967 \r
- 1367      75726174 \r
- 1367      696F6E00 \r
- 1368                  .LASF1:\r
- 1369 006e 756E7369            .ascii  "unsigned char\000"\r
- 1369      676E6564 \r
- 1369      20636861 \r
- 1369      7200\r
- 1370                  .LASF16:\r
- 1371 007c 72656738            .ascii  "reg8\000"\r
- 1371      00\r
- 1372                  .LASF5:\r
- 1373 0081 6C6F6E67            .ascii  "long unsigned int\000"\r
- 1373      20756E73 \r
- 1373      69676E65 \r
- 1373      6420696E \r
- 1373      7400\r
- 1374                  .LASF37:\r
- 1375 0093 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 1375      43534932 \r
- 1375      53445C73 \r
- 1375      6F667477 \r
- 1375      6172655C \r
- 1376 00c2 6E00                .ascii  "n\000"\r
- 1377                  .LASF29:\r
- 1378 00c4 55534246            .ascii  "USBFS_backup\000"\r
- 1378      535F6261 \r
- 1378      636B7570 \r
- 1378      00\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 31\r
-\r
-\r
- 1379                  .LASF31:\r
- 1380 00d1 49544D5F            .ascii  "ITM_RxBuffer\000"\r
- 1380      52784275 \r
- 1380      66666572 \r
- 1380      00\r
- 1381                  .LASF28:\r
- 1382 00de 656E6162            .ascii  "enableInterrupts\000"\r
- 1382      6C65496E \r
- 1382      74657272 \r
- 1382      75707473 \r
- 1382      00\r
- 1383                  .LASF14:\r
- 1384 00ef 646F7562            .ascii  "double\000"\r
- 1384      6C6500\r
- 1385                  .LASF11:\r
- 1386 00f6 75696E74            .ascii  "uint16\000"\r
- 1386      313600\r
- 1387                  .LASF24:\r
- 1388 00fd 55534246            .ascii  "USBFS_SaveConfig\000"\r
- 1388      535F5361 \r
- 1388      7665436F \r
- 1388      6E666967 \r
- 1388      00\r
- 1389                  .LASF32:\r
- 1390 010e 43794465            .ascii  "CyDelayUs\000"\r
- 1390      6C617955 \r
- 1390      7300\r
- 1391                  .LASF12:\r
- 1392 0118 75696E74            .ascii  "uint32\000"\r
- 1392      333200\r
- 1393                  .LASF39:\r
- 1394 011f 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 1394      74657243 \r
- 1394      72697469 \r
- 1394      63616C53 \r
- 1394      65637469 \r
- 1395                  .LASF8:\r
- 1396 0136 756E7369            .ascii  "unsigned int\000"\r
- 1396      676E6564 \r
- 1396      20696E74 \r
- 1396      00\r
- 1397                  .LASF7:\r
- 1398 0143 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1398      206C6F6E \r
- 1398      6720756E \r
- 1398      7369676E \r
- 1398      65642069 \r
- 1399                  .LASF34:\r
- 1400 015a 4379496E            .ascii  "CyIntSetPriority\000"\r
- 1400      74536574 \r
- 1400      5072696F \r
- 1400      72697479 \r
- 1400      00\r
- 1401                  .LASF21:\r
- 1402 016b 6D6F6465            .ascii  "mode\000"\r
- 1402      00\r
- 1403                  .LASF22:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 32\r
-\r
-\r
- 1404 0170 55534246            .ascii  "USBFS_BACKUP_STRUCT\000"\r
- 1404      535F4241 \r
- 1404      434B5550 \r
- 1404      5F535452 \r
- 1404      55435400 \r
- 1405                  .LASF18:\r
- 1406 0184 63796973            .ascii  "cyisraddress\000"\r
- 1406      72616464 \r
- 1406      72657373 \r
- 1406      00\r
- 1407                  .LASF9:\r
- 1408 0191 696E7433            .ascii  "int32_t\000"\r
- 1408      325F7400 \r
- 1409                  .LASF19:\r
- 1410 0199 73697A65            .ascii  "sizetype\000"\r
- 1410      74797065 \r
- 1410      00\r
- 1411                  .LASF6:\r
- 1412 01a2 6C6F6E67            .ascii  "long long int\000"\r
- 1412      206C6F6E \r
- 1412      6720696E \r
- 1412      7400\r
- 1413                  .LASF15:\r
- 1414 01b0 63686172            .ascii  "char\000"\r
- 1414      00\r
- 1415                  .LASF25:\r
- 1416 01b5 55534246            .ascii  "USBFS_RestoreConfig\000"\r
- 1416      535F5265 \r
- 1416      73746F72 \r
- 1416      65436F6E \r
- 1416      66696700 \r
- 1417                  .LASF2:\r
- 1418 01c9 73686F72            .ascii  "short int\000"\r
- 1418      7420696E \r
- 1418      7400\r
- 1419                  .LASF36:\r
- 1420 01d3 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_pm.c\000"\r
- 1420      6E657261 \r
- 1420      7465645F \r
- 1420      536F7572 \r
- 1420      63655C50 \r
- 1421                  .LASF10:\r
- 1422 01f7 75696E74            .ascii  "uint8\000"\r
- 1422      3800\r
- 1423                  .LASF35:\r
- 1424 01fd 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 1424      4320342E \r
- 1424      372E3320 \r
- 1424      32303133 \r
- 1424      30333132 \r
- 1425 0230 616E6368            .ascii  "anch revision 196615]\000"\r
- 1425      20726576 \r
- 1425      6973696F \r
- 1425      6E203139 \r
- 1425      36363135 \r
- 1426                  .LASF33:\r
- 1427 0246 43794578            .ascii  "CyExitCriticalSection\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccuoEjMf.s                      page 33\r
-\r
-\r
- 1427      69744372 \r
- 1427      69746963 \r
- 1427      616C5365 \r
- 1427      6374696F \r
- 1428                  .LASF27:\r
- 1429 025c 55534246            .ascii  "USBFS_Resume\000"\r
- 1429      535F5265 \r
- 1429      73756D65 \r
- 1429      00\r
- 1430                  .LASF4:\r
- 1431 0269 6C6F6E67            .ascii  "long int\000"\r
- 1431      20696E74 \r
- 1431      00\r
- 1432                  .LASF20:\r
- 1433 0272 656E6162            .ascii  "enableState\000"\r
- 1433      6C655374 \r
- 1433      61746500 \r
- 1434                  .LASF0:\r
- 1435 027e 7369676E            .ascii  "signed char\000"\r
- 1435      65642063 \r
- 1435      68617200 \r
- 1436                  .LASF23:\r
- 1437 028a 55534246            .ascii  "USBFS_DP_ISR\000"\r
- 1437      535F4450 \r
- 1437      5F495352 \r
- 1437      00\r
- 1438                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.o
deleted file mode 100755 (executable)
index 4f089bf..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_pm.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.lst
deleted file mode 100755 (executable)
index 091ea62..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.lst
+++ /dev/null
@@ -1,5914 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_std.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_ConfigReg,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_ConfigReg\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_ConfigReg, %function\r
-  24                   USBFS_ConfigReg:\r
-  25                   .LFB1:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_std.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_std.c **** * File Name: USBFS_std.c\r
-   3:.\Generated_Source\PSoC5/USBFS_std.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_std.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_std.c **** *  USB Standard request handler.\r
-   7:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_std.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_std.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_std.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_std.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_std.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_std.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_std.c **** #include "USBFS_cdc.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_std.c **** #include "USBFS_pvt.h"\r
-  20:.\Generated_Source\PSoC5/USBFS_std.c **** #if defined(USBFS_ENABLE_MIDI_STREAMING) \r
-  21:.\Generated_Source\PSoC5/USBFS_std.c ****     #include "USBFS_midi.h"\r
-  22:.\Generated_Source\PSoC5/USBFS_std.c **** #endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-  23:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  24:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  25:.\Generated_Source\PSoC5/USBFS_std.c **** /***************************************\r
-  26:.\Generated_Source\PSoC5/USBFS_std.c **** *   Static data allocation\r
-  27:.\Generated_Source\PSoC5/USBFS_std.c **** ***************************************/\r
-  28:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_std.c **** #if defined(USBFS_ENABLE_FWSN_STRING)\r
-  30:.\Generated_Source\PSoC5/USBFS_std.c ****     static volatile uint8 *USBFS_fwSerialNumberStringDescriptor;\r
-  31:.\Generated_Source\PSoC5/USBFS_std.c ****     static volatile uint8 USBFS_snStringConfirm = USBFS_FALSE;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_std.c **** #endif  /* USBFS_ENABLE_FWSN_STRING */\r
-  33:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  34:.\Generated_Source\PSoC5/USBFS_std.c **** #if defined(USBFS_ENABLE_FWSN_STRING)\r
-  35:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  36:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  37:.\Generated_Source\PSoC5/USBFS_std.c ****     /*******************************************************************************\r
-  38:.\Generated_Source\PSoC5/USBFS_std.c ****     * Function Name: USBFS_SerialNumString\r
-  39:.\Generated_Source\PSoC5/USBFS_std.c ****     ********************************************************************************\r
-  40:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
-  41:.\Generated_Source\PSoC5/USBFS_std.c ****     * Summary:\r
-  42:.\Generated_Source\PSoC5/USBFS_std.c ****     *  Application firmware may supply the source of the USB device descriptors\r
-  43:.\Generated_Source\PSoC5/USBFS_std.c ****     *  serial number string during runtime.\r
-  44:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
-  45:.\Generated_Source\PSoC5/USBFS_std.c ****     * Parameters:\r
-  46:.\Generated_Source\PSoC5/USBFS_std.c ****     *  snString:  pointer to string.\r
-  47:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
-  48:.\Generated_Source\PSoC5/USBFS_std.c ****     * Return:\r
-  49:.\Generated_Source\PSoC5/USBFS_std.c ****     *  None.\r
-  50:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
-  51:.\Generated_Source\PSoC5/USBFS_std.c ****     * Reentrant:\r
-  52:.\Generated_Source\PSoC5/USBFS_std.c ****     *  No.\r
-  53:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
-  54:.\Generated_Source\PSoC5/USBFS_std.c ****     *******************************************************************************/\r
-  55:.\Generated_Source\PSoC5/USBFS_std.c ****     void  USBFS_SerialNumString(uint8 snString[]) \r
-  56:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
-  57:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_snStringConfirm = USBFS_FALSE;\r
-  58:.\Generated_Source\PSoC5/USBFS_std.c ****         if(snString != NULL)\r
-  59:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
-  60:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_fwSerialNumberStringDescriptor = snString;\r
-  61:.\Generated_Source\PSoC5/USBFS_std.c ****             /* Check descriptor validation */\r
-  62:.\Generated_Source\PSoC5/USBFS_std.c ****             if( (snString[0u] > 1u ) && (snString[1u] == USBFS_DESCR_STRING) )\r
-  63:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
-  64:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_snStringConfirm = USBFS_TRUE;\r
-  65:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
-  66:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
-  67:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
-  68:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  69:.\Generated_Source\PSoC5/USBFS_std.c **** #endif  /* USBFS_ENABLE_FWSN_STRING */\r
-  70:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  71:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-  72:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
-  73:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_HandleStandardRqst\r
-  74:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
-  75:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  76:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
-  77:.\Generated_Source\PSoC5/USBFS_std.c **** *  This Routine dispatches standard requests\r
-  78:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  79:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
-  80:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
-  81:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  82:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
-  83:.\Generated_Source\PSoC5/USBFS_std.c **** *  TRUE if request handled.\r
-  84:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  85:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
-  86:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
-  87:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-  88:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 3\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/USBFS_std.c **** uint8 USBFS_HandleStandardRqst(void) \r
-  90:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
-  91:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 requestHandled = USBFS_FALSE;\r
-  92:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 interfaceNumber;\r
-  93:.\Generated_Source\PSoC5/USBFS_std.c ****     #if defined(USBFS_ENABLE_STRINGS)\r
-  94:.\Generated_Source\PSoC5/USBFS_std.c ****         volatile uint8 *pStr = 0u;\r
-  95:.\Generated_Source\PSoC5/USBFS_std.c ****         #if defined(USBFS_ENABLE_DESCRIPTOR_STRINGS)\r
-  96:.\Generated_Source\PSoC5/USBFS_std.c ****             uint8 nStr;\r
-  97:.\Generated_Source\PSoC5/USBFS_std.c ****             uint8 descrLength;\r
-  98:.\Generated_Source\PSoC5/USBFS_std.c ****         #endif /* USBFS_ENABLE_DESCRIPTOR_STRINGS */\r
-  99:.\Generated_Source\PSoC5/USBFS_std.c ****     #endif /* USBFS_ENABLE_STRINGS */\r
- 100:.\Generated_Source\PSoC5/USBFS_std.c ****     static volatile uint8 USBFS_tBuffer[USBFS_STATUS_LENGTH_MAX];\r
- 101:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 102:.\Generated_Source\PSoC5/USBFS_std.c ****     USBFS_currentTD.count = 0u;\r
- 103:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 104:.\Generated_Source\PSoC5/USBFS_std.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
- 105:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 106:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Control Read */\r
- 107:.\Generated_Source\PSoC5/USBFS_std.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 108:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 109:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_GET_DESCRIPTOR:\r
- 110:.\Generated_Source\PSoC5/USBFS_std.c ****                 if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_DEVICE)\r
- 111:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 112:.\Generated_Source\PSoC5/USBFS_std.c ****                     pTmp = USBFS_GetDeviceTablePtr();\r
- 113:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
- 114:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.count = USBFS_DEVICE_DESCR_LENGTH;\r
- 115:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 116:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 117:.\Generated_Source\PSoC5/USBFS_std.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_CONFIG)\r
- 118:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 119:.\Generated_Source\PSoC5/USBFS_std.c ****                     pTmp = USBFS_GetConfigTablePtr(CY_GET_REG8(USBFS_wValueLo));\r
- 120:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
- 121:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \\r
- 122:.\Generated_Source\PSoC5/USBFS_std.c ****                                       USBFS_CONFIG_DESCR_TOTAL_LENGTH_HI] << 8u) | \\r
- 123:.\Generated_Source\PSoC5/USBFS_std.c ****                                      (USBFS_currentTD.pData)[USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW];\r
- 124:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 125:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 126:.\Generated_Source\PSoC5/USBFS_std.c ****                 #if defined(USBFS_ENABLE_STRINGS)\r
- 127:.\Generated_Source\PSoC5/USBFS_std.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_STRING)\r
- 128:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 129:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* Descriptor Strings*/\r
- 130:.\Generated_Source\PSoC5/USBFS_std.c ****                     #if defined(USBFS_ENABLE_DESCRIPTOR_STRINGS)\r
- 131:.\Generated_Source\PSoC5/USBFS_std.c ****                         nStr = 0u;\r
- 132:.\Generated_Source\PSoC5/USBFS_std.c ****                         pStr = (volatile uint8 *)&USBFS_STRING_DESCRIPTORS[0u];\r
- 133:.\Generated_Source\PSoC5/USBFS_std.c ****                         while ( (CY_GET_REG8(USBFS_wValueLo) > nStr) && (*pStr != 0u) )\r
- 134:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 135:.\Generated_Source\PSoC5/USBFS_std.c ****                             /* Read descriptor length from 1st byte */\r
- 136:.\Generated_Source\PSoC5/USBFS_std.c ****                             descrLength = *pStr;\r
- 137:.\Generated_Source\PSoC5/USBFS_std.c ****                             /* Move to next string descriptor */\r
- 138:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = &pStr[descrLength];\r
- 139:.\Generated_Source\PSoC5/USBFS_std.c ****                             nStr++;\r
- 140:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 141:.\Generated_Source\PSoC5/USBFS_std.c ****                     #endif /* End USBFS_ENABLE_DESCRIPTOR_STRINGS */\r
- 142:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* Microsoft OS String*/\r
- 143:.\Generated_Source\PSoC5/USBFS_std.c ****                     #if defined(USBFS_ENABLE_MSOS_STRING)\r
- 144:.\Generated_Source\PSoC5/USBFS_std.c ****                         if( CY_GET_REG8(USBFS_wValueLo) == USBFS_STRING_MSOS )\r
- 145:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 4\r
-\r
-\r
- 146:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = (volatile uint8 *)&USBFS_MSOS_DESCRIPTOR[0u];\r
- 147:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 148:.\Generated_Source\PSoC5/USBFS_std.c ****                     #endif /* End USBFS_ENABLE_MSOS_STRING*/\r
- 149:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* SN string */\r
- 150:.\Generated_Source\PSoC5/USBFS_std.c ****                     #if defined(USBFS_ENABLE_SN_STRING)\r
- 151:.\Generated_Source\PSoC5/USBFS_std.c ****                         if( (CY_GET_REG8(USBFS_wValueLo) != 0u) &&\r
- 152:.\Generated_Source\PSoC5/USBFS_std.c ****                             (CY_GET_REG8(USBFS_wValueLo) ==\r
- 153:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_DEVICE0_DESCR[USBFS_DEVICE_DESCR_SN_SHIFT]) )\r
- 154:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 155:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];\r
- 156:.\Generated_Source\PSoC5/USBFS_std.c ****                             #if defined(USBFS_ENABLE_FWSN_STRING)\r
- 157:.\Generated_Source\PSoC5/USBFS_std.c ****                                 if(USBFS_snStringConfirm != USBFS_FALSE)\r
- 158:.\Generated_Source\PSoC5/USBFS_std.c ****                                 {\r
- 159:.\Generated_Source\PSoC5/USBFS_std.c ****                                     pStr = USBFS_fwSerialNumberStringDescriptor;\r
- 160:.\Generated_Source\PSoC5/USBFS_std.c ****                                 }\r
- 161:.\Generated_Source\PSoC5/USBFS_std.c ****                             #endif  /* USBFS_ENABLE_FWSN_STRING */\r
- 162:.\Generated_Source\PSoC5/USBFS_std.c ****                             #if defined(USBFS_ENABLE_IDSN_STRING)\r
- 163:.\Generated_Source\PSoC5/USBFS_std.c ****                                 /* Read DIE ID and generate string descriptor in RAM */\r
- 164:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_ReadDieID(USBFS_idSerialNumberStringDescriptor);\r
- 165:.\Generated_Source\PSoC5/USBFS_std.c ****                                 pStr = USBFS_idSerialNumberStringDescriptor;\r
- 166:.\Generated_Source\PSoC5/USBFS_std.c ****                             #endif    /* End USBFS_ENABLE_IDSN_STRING */\r
- 167:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 168:.\Generated_Source\PSoC5/USBFS_std.c ****                     #endif    /* End USBFS_ENABLE_SN_STRING */\r
- 169:.\Generated_Source\PSoC5/USBFS_std.c ****                     if (*pStr != 0u)\r
- 170:.\Generated_Source\PSoC5/USBFS_std.c ****                     {\r
- 171:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = *pStr;\r
- 172:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.pData = pStr;\r
- 173:.\Generated_Source\PSoC5/USBFS_std.c ****                         requestHandled  = USBFS_InitControlRead();\r
- 174:.\Generated_Source\PSoC5/USBFS_std.c ****                     }\r
- 175:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 176:.\Generated_Source\PSoC5/USBFS_std.c ****                 #endif /* End USBFS_ENABLE_STRINGS */\r
- 177:.\Generated_Source\PSoC5/USBFS_std.c ****                 else\r
- 178:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 179:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled = USBFS_DispatchClassRqst();\r
- 180:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 181:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 182:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_GET_STATUS:\r
- 183:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK))\r
- 184:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 185:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_EP:\r
- 186:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_EP_STATUS_LENGTH;\r
- 187:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_EP[ \\r
- 188:.\Generated_Source\PSoC5/USBFS_std.c ****                                         CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].hwEpState;\r
- 189:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[1u] = 0u;\r
- 190:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.pData = &USBFS_tBuffer[0u];\r
- 191:.\Generated_Source\PSoC5/USBFS_std.c ****                         requestHandled  = USBFS_InitControlRead();\r
- 192:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 193:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_DEV:\r
- 194:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_DEVICE_STATUS_LENGTH;\r
- 195:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_deviceStatus;\r
- 196:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[1u] = 0u;\r
- 197:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.pData = &USBFS_tBuffer[0u];\r
- 198:.\Generated_Source\PSoC5/USBFS_std.c ****                         requestHandled  = USBFS_InitControlRead();\r
- 199:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 200:.\Generated_Source\PSoC5/USBFS_std.c ****                     default:    /* requestHandled is initialized as FALSE by default */\r
- 201:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 202:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 5\r
-\r
-\r
- 203:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 204:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_GET_CONFIGURATION:\r
- 205:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.count = 1u;\r
- 206:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.pData = (volatile uint8 *)&USBFS_configuration;\r
- 207:.\Generated_Source\PSoC5/USBFS_std.c ****                 requestHandled  = USBFS_InitControlRead();\r
- 208:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 209:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_GET_INTERFACE:\r
- 210:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.count = 1u;\r
- 211:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.pData = (volatile uint8 *)&USBFS_interfaceSetting[ \\r
- 212:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                             CY_GET_REG8(USBFS_wInde\r
- 213:.\Generated_Source\PSoC5/USBFS_std.c ****                 requestHandled  = USBFS_InitControlRead();\r
- 214:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 215:.\Generated_Source\PSoC5/USBFS_std.c ****             default: /* requestHandled is initialized as FALSE by default */\r
- 216:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 217:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 218:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 219:.\Generated_Source\PSoC5/USBFS_std.c ****     else {\r
- 220:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Control Write */\r
- 221:.\Generated_Source\PSoC5/USBFS_std.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 222:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 223:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_SET_ADDRESS:\r
- 224:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_deviceAddress = CY_GET_REG8(USBFS_wValueLo);\r
- 225:.\Generated_Source\PSoC5/USBFS_std.c ****                 requestHandled = USBFS_InitNoDataControlTransfer();\r
- 226:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 227:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_SET_CONFIGURATION:\r
- 228:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configuration = CY_GET_REG8(USBFS_wValueLo);\r
- 229:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configurationChanged = USBFS_TRUE;\r
- 230:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_Config(USBFS_TRUE);\r
- 231:.\Generated_Source\PSoC5/USBFS_std.c ****                 requestHandled = USBFS_InitNoDataControlTransfer();\r
- 232:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 233:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_SET_INTERFACE:\r
- 234:.\Generated_Source\PSoC5/USBFS_std.c ****                 if (USBFS_ValidateAlternateSetting() != 0u)\r
- 235:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 236:.\Generated_Source\PSoC5/USBFS_std.c ****                     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 237:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceNumber = interfaceNumber;\r
- 238:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_configurationChanged = USBFS_TRUE;\r
- 239:.\Generated_Source\PSoC5/USBFS_std.c ****                     #if ((USBFS_EP_MA == USBFS__MA_DYNAMIC) && \\r
- 240:.\Generated_Source\PSoC5/USBFS_std.c ****                          (USBFS_EP_MM == USBFS__EP_MANUAL) )\r
- 241:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_Config(USBFS_FALSE);\r
- 242:.\Generated_Source\PSoC5/USBFS_std.c ****                     #else\r
- 243:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_ConfigAltChanged();\r
- 244:.\Generated_Source\PSoC5/USBFS_std.c ****                     #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */\r
- 245:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* Update handled Alt setting changes status */\r
- 246:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceSetting_last[interfaceNumber] =\r
- 247:.\Generated_Source\PSoC5/USBFS_std.c ****                          USBFS_interfaceSetting[interfaceNumber];\r
- 248:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled = USBFS_InitNoDataControlTransfer();\r
- 249:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 250:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 251:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_CLEAR_FEATURE:\r
- 252:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
- 253:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 254:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_EP:\r
- 255:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
- 256:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 257:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_ClearEndpointHalt();\r
- 258:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 259:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 6\r
-\r
-\r
- 260:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_DEV:\r
- 261:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* Clear device REMOTE_WAKEUP */\r
- 262:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
- 263:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 264:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_deviceStatus &= (uint8)~USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
- 265:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_InitNoDataControlTransfer();\r
- 266:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 267:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 268:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_IFC:\r
- 269:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* Validate interfaceNumber */\r
- 270:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wIndexLo) < USBFS_MAX_INTERFACES_NUMBER)\r
- 271:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 272:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
- 273:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 (uint8)~(CY_GET_REG8(USBFS_wValueLo\r
- 274:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_InitNoDataControlTransfer();\r
- 275:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 276:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 277:.\Generated_Source\PSoC5/USBFS_std.c ****                     default:    /* requestHandled is initialized as FALSE by default */\r
- 278:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 279:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 280:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 281:.\Generated_Source\PSoC5/USBFS_std.c ****             case USBFS_SET_FEATURE:\r
- 282:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
- 283:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 284:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_EP:\r
- 285:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
- 286:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 287:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_SetEndpointHalt();\r
- 288:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 289:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 290:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_DEV:\r
- 291:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* Set device REMOTE_WAKEUP */\r
- 292:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
- 293:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 294:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_deviceStatus |= USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
- 295:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_InitNoDataControlTransfer();\r
- 296:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 297:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 298:.\Generated_Source\PSoC5/USBFS_std.c ****                     case USBFS_RQST_RCPT_IFC:\r
- 299:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* Validate interfaceNumber */\r
- 300:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wIndexLo) < USBFS_MAX_INTERFACES_NUMBER)\r
- 301:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 302:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
- 303:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 (uint8)~(CY_GET_REG8(USBFS_wValueLo\r
- 304:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_InitNoDataControlTransfer();\r
- 305:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 306:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 307:.\Generated_Source\PSoC5/USBFS_std.c ****                     default:    /* requestHandled is initialized as FALSE by default */\r
- 308:.\Generated_Source\PSoC5/USBFS_std.c ****                         break;\r
- 309:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 310:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 311:.\Generated_Source\PSoC5/USBFS_std.c ****             default:    /* requestHandled is initialized as FALSE by default */\r
- 312:.\Generated_Source\PSoC5/USBFS_std.c ****                 break;\r
- 313:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 314:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 315:.\Generated_Source\PSoC5/USBFS_std.c ****     return(requestHandled);\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 7\r
-\r
-\r
- 317:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 318:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 319:.\Generated_Source\PSoC5/USBFS_std.c **** #if defined(USBFS_ENABLE_IDSN_STRING)\r
- 320:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 321:.\Generated_Source\PSoC5/USBFS_std.c ****     /***************************************************************************\r
- 322:.\Generated_Source\PSoC5/USBFS_std.c ****     * Function Name: USBFS_ReadDieID\r
- 323:.\Generated_Source\PSoC5/USBFS_std.c ****     ****************************************************************************\r
- 324:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
- 325:.\Generated_Source\PSoC5/USBFS_std.c ****     * Summary:\r
- 326:.\Generated_Source\PSoC5/USBFS_std.c ****     *  This routine read Die ID and generate Serial Number string descriptor.\r
- 327:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
- 328:.\Generated_Source\PSoC5/USBFS_std.c ****     * Parameters:\r
- 329:.\Generated_Source\PSoC5/USBFS_std.c ****     *  descr:  pointer on string descriptor.\r
- 330:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
- 331:.\Generated_Source\PSoC5/USBFS_std.c ****     * Return:\r
- 332:.\Generated_Source\PSoC5/USBFS_std.c ****     *  None.\r
- 333:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
- 334:.\Generated_Source\PSoC5/USBFS_std.c ****     * Reentrant:\r
- 335:.\Generated_Source\PSoC5/USBFS_std.c ****     *  No.\r
- 336:.\Generated_Source\PSoC5/USBFS_std.c ****     *\r
- 337:.\Generated_Source\PSoC5/USBFS_std.c ****     ***************************************************************************/\r
- 338:.\Generated_Source\PSoC5/USBFS_std.c ****     void USBFS_ReadDieID(uint8 descr[]) \r
- 339:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 340:.\Generated_Source\PSoC5/USBFS_std.c ****         uint8 i;\r
- 341:.\Generated_Source\PSoC5/USBFS_std.c ****         uint8 j = 0u;\r
- 342:.\Generated_Source\PSoC5/USBFS_std.c ****         uint8 value;\r
- 343:.\Generated_Source\PSoC5/USBFS_std.c ****         const char8 CYCODE hex[16u] = "0123456789ABCDEF";\r
- 344:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 345:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 346:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Check descriptor validation */\r
- 347:.\Generated_Source\PSoC5/USBFS_std.c ****         if( descr != NULL)\r
- 348:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 349:.\Generated_Source\PSoC5/USBFS_std.c ****             descr[0u] = USBFS_IDSN_DESCR_LENGTH;\r
- 350:.\Generated_Source\PSoC5/USBFS_std.c ****             descr[1u] = USBFS_DESCR_STRING;\r
- 351:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 352:.\Generated_Source\PSoC5/USBFS_std.c ****             /* fill descriptor */\r
- 353:.\Generated_Source\PSoC5/USBFS_std.c ****             for(i = 2u; i < USBFS_IDSN_DESCR_LENGTH; i += 4u)\r
- 354:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 355:.\Generated_Source\PSoC5/USBFS_std.c ****                 value = CY_GET_XTND_REG8((void CYFAR *)(USBFS_DIE_ID + j));\r
- 356:.\Generated_Source\PSoC5/USBFS_std.c ****                 j++;\r
- 357:.\Generated_Source\PSoC5/USBFS_std.c ****                 descr[i] = (uint8)hex[value >> 4u];\r
- 358:.\Generated_Source\PSoC5/USBFS_std.c ****                 descr[i + 2u] = (uint8)hex[value & 0x0Fu];\r
- 359:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 360:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 361:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 362:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 363:.\Generated_Source\PSoC5/USBFS_std.c **** #endif /* End USBFS_ENABLE_IDSN_STRING */\r
- 364:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 365:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 366:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 367:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_ConfigReg\r
- 368:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 369:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 370:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 371:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine configures hardware registers from the variables.\r
- 372:.\Generated_Source\PSoC5/USBFS_std.c **** *  It is called from USBFS_Config() function and from RestoreConfig\r
- 373:.\Generated_Source\PSoC5/USBFS_std.c **** *  after Wakeup.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 8\r
-\r
-\r
- 374:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 375:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 376:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 377:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 378:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 379:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 380:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 381:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 382:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigReg(void) \r
- 383:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
-  27                           .loc 1 383 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                   .LVL0:\r
-  32 0000 30B5                 push    {r4, r5, lr}\r
-  33                   .LCFI0:\r
-  34                           .cfi_def_cfa_offset 12\r
-  35                           .cfi_offset 4, -12\r
-  36                           .cfi_offset 5, -8\r
-  37                           .cfi_offset 14, -4\r
- 384:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep;\r
- 385:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 i;\r
- 386:.\Generated_Source\PSoC5/USBFS_std.c ****     #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 387:.\Generated_Source\PSoC5/USBFS_std.c ****         uint8 ep_type = 0u;\r
- 388:.\Generated_Source\PSoC5/USBFS_std.c ****     #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 389:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 390:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Set the endpoint buffer addresses */\r
- 391:.\Generated_Source\PSoC5/USBFS_std.c ****     ep = USBFS_EP1;\r
-  38                           .loc 1 391 0\r
-  39 0002 0122                 movs    r2, #1\r
-  40                   .LVL1:\r
-  41                   .L2:\r
- 382:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigReg(void) \r
-  42                           .loc 1 382 0 discriminator 1\r
-  43 0004 02F10F03             add     r3, r2, #15\r
-  44 0008 1801                 lsls    r0, r3, #4\r
- 392:.\Generated_Source\PSoC5/USBFS_std.c ****     for (i = 0u; i < 0x80u; i+= 0x10u)\r
-  45                           .loc 1 392 0 discriminator 1\r
-  46 000a 092A                 cmp     r2, #9\r
- 382:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigReg(void) \r
-  47                           .loc 1 382 0 discriminator 1\r
-  48 000c C3B2                 uxtb    r3, r0\r
-  49                   .LVL2:\r
-  50                           .loc 1 392 0 discriminator 1\r
-  51 000e 3BD0                 beq     .L9\r
-  52                   .L6:\r
- 393:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 394:.\Generated_Source\PSoC5/USBFS_std.c ****         CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_CRC_BYPASS |\r
- 395:.\Generated_Source\PSoC5/USBFS_std.c ****                                                           USBFS_ARB_EPX_CFG_RESET);\r
- 396:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 397:.\Generated_Source\PSoC5/USBFS_std.c ****         #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
- 398:.\Generated_Source\PSoC5/USBFS_std.c ****             /* Enable all Arbiter EP Interrupts : err, buf under, buf over, dma gnt(mode2 only), in\r
- 399:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_INT_EN_IND + i), USBFS_ARB_EPX_INT_MASK);\r
- 400:.\Generated_Source\PSoC5/USBFS_std.c ****         #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
- 401:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 402:.\Generated_Source\PSoC5/USBFS_std.c ****         if(USBFS_EP[ep].epMode != USBFS_MODE_DISABLE)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 9\r
-\r
-\r
-  53                           .loc 1 402 0\r
-  54 0010 1F49                 ldr     r1, .L10\r
- 394:.\Generated_Source\PSoC5/USBFS_std.c ****         CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_CRC_BYPASS |\r
-  55                           .loc 1 394 0\r
-  56 0012 03F18044             add     r4, r3, #1073741824\r
-  57 0016 0C20                 movs    r0, #12\r
-  58                   .LVL3:\r
-  59 0018 04F5C145             add     r5, r4, #24704\r
-  60                           .loc 1 402 0\r
-  61 001c 00FB0214             mla     r4, r0, r2, r1\r
- 394:.\Generated_Source\PSoC5/USBFS_std.c ****         CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_CRC_BYPASS |\r
-  62                           .loc 1 394 0\r
-  63 0020 2870                 strb    r0, [r5, #0]\r
-  64 0022 1C49                 ldr     r1, .L10+4\r
-  65                           .loc 1 402 0\r
-  66 0024 6579                 ldrb    r5, [r4, #5]    @ zero_extendqisi2\r
-  67 0026 5918                 adds    r1, r3, r1\r
-  68 0028 25B1                 cbz     r5, .L3\r
- 403:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 404:.\Generated_Source\PSoC5/USBFS_std.c ****             if((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u )\r
-  69                           .loc 1 404 0\r
-  70 002a 2479                 ldrb    r4, [r4, #4]    @ zero_extendqisi2\r
-  71 002c 2406                 lsls    r4, r4, #24\r
- 405:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 406:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_NAK_IN);\r
- 407:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 408:.\Generated_Source\PSoC5/USBFS_std.c ****             else\r
- 409:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 410:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_NAK_OUT);\r
-  72                           .loc 1 410 0\r
-  73 002e 58BF                 it      pl\r
-  74 0030 0820                 movpl   r0, #8\r
-  75 0032 00E0                 b       .L7\r
-  76                   .L3:\r
- 411:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Prepare EP type mask for automatic memory allocation */\r
- 412:.\Generated_Source\PSoC5/USBFS_std.c ****                 #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 413:.\Generated_Source\PSoC5/USBFS_std.c ****                     ep_type |= (uint8)(0x01u << (ep - USBFS_EP1));\r
- 414:.\Generated_Source\PSoC5/USBFS_std.c ****                 #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 415:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 416:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 417:.\Generated_Source\PSoC5/USBFS_std.c ****         else\r
- 418:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 419:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_STALL_DATA_EP);\r
-  77                           .loc 1 419 0\r
-  78 0034 8020                 movs    r0, #128\r
-  79                   .L7:\r
-  80 0036 0870                 strb    r0, [r1, #0]\r
- 420:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 421:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 422:.\Generated_Source\PSoC5/USBFS_std.c ****         #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
- 423:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + i),   USBFS_EP[ep].bufferSize >> 8u);\r
-  81                           .loc 1 423 0\r
-  82 0038 1749                 ldr     r1, .L10+8\r
-  83 003a 0C24                 movs    r4, #12\r
-  84 003c 5818                 adds    r0, r3, r1\r
-  85 003e 1449                 ldr     r1, .L10\r
-  86 0040 04FB0211             mla     r1, r4, r2, r1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 10\r
-\r
-\r
-  87 0044 0C89                 ldrh    r4, [r1, #8]\r
- 424:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + i),   USBFS_EP[ep].bufferSize & 0xFFu);\r
- 425:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 426:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
- 427:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
- 428:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
- 429:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
- 430:.\Generated_Source\PSoC5/USBFS_std.c ****         #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
- 431:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 432:.\Generated_Source\PSoC5/USBFS_std.c ****         ep++;\r
-  88                           .loc 1 432 0\r
-  89 0046 0132                 adds    r2, r2, #1\r
-  90                   .LVL4:\r
- 423:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + i),   USBFS_EP[ep].bufferSize >> 8u);\r
-  91                           .loc 1 423 0\r
-  92 0048 C4F30724             ubfx    r4, r4, #8, #8\r
-  93 004c 0470                 strb    r4, [r0, #0]\r
- 424:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + i),   USBFS_EP[ep].bufferSize & 0xFFu);\r
-  94                           .loc 1 424 0\r
-  95 004e 0C89                 ldrh    r4, [r1, #8]\r
-  96 0050 1248                 ldr     r0, .L10+12\r
-  97 0052 E4B2                 uxtb    r4, r4\r
-  98 0054 1818                 adds    r0, r3, r0\r
-  99 0056 0470                 strb    r4, [r0, #0]\r
- 426:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
- 100                           .loc 1 426 0\r
- 101 0058 CC88                 ldrh    r4, [r1, #6]\r
- 102 005a 1148                 ldr     r0, .L10+16\r
- 103 005c E4B2                 uxtb    r4, r4\r
- 104 005e 1818                 adds    r0, r3, r0\r
- 105 0060 0470                 strb    r4, [r0, #0]\r
- 427:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
- 106                           .loc 1 427 0\r
- 107 0062 CC88                 ldrh    r4, [r1, #6]\r
- 108 0064 0F48                 ldr     r0, .L10+20\r
- 109 0066 C4F30724             ubfx    r4, r4, #8, #8\r
- 110 006a 1818                 adds    r0, r3, r0\r
- 111 006c 0470                 strb    r4, [r0, #0]\r
- 428:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
- 112                           .loc 1 428 0\r
- 113 006e CC88                 ldrh    r4, [r1, #6]\r
- 114 0070 0D48                 ldr     r0, .L10+24\r
- 115 0072 E4B2                 uxtb    r4, r4\r
- 116 0074 1818                 adds    r0, r3, r0\r
- 117 0076 0470                 strb    r4, [r0, #0]\r
- 429:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
- 118                           .loc 1 429 0\r
- 119 0078 0C48                 ldr     r0, .L10+28\r
- 120                           .loc 1 432 0\r
- 121 007a D2B2                 uxtb    r2, r2\r
- 122                   .LVL5:\r
- 429:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
- 123                           .loc 1 429 0\r
- 124 007c 1818                 adds    r0, r3, r0\r
- 125 007e CB88                 ldrh    r3, [r1, #6]\r
- 126 0080 C3F30721             ubfx    r1, r3, #8, #8\r
- 127 0084 0170                 strb    r1, [r0, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 11\r
-\r
-\r
- 128 0086 BDE7                 b       .L2\r
- 129                   .LVL6:\r
- 130                   .L9:\r
- 433:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 434:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 435:.\Generated_Source\PSoC5/USBFS_std.c ****     #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 436:.\Generated_Source\PSoC5/USBFS_std.c ****          /* BUF_SIZE depend on DMA_THRESS value: 55-32 bytes  44-16 bytes 33-8 bytes 22-4 bytes 11-\r
- 437:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_BUF_SIZE_REG = USBFS_DMA_BUF_SIZE;\r
- 438:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_DMA_THRES_REG = USBFS_DMA_BYTES_PER_BURST;   /* DMA burst threshold */\r
- 439:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_DMA_THRES_MSB_REG = 0u;\r
- 440:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP_ACTIVE_REG = USBFS_ARB_INT_MASK;\r
- 441:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP_TYPE_REG = ep_type;\r
- 442:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Cfg_cmp bit set to 1 once configuration is complete. */\r
- 443:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM |\r
- 444:.\Generated_Source\PSoC5/USBFS_std.c ****                                        USBFS_ARB_CFG_CFG_CPM;\r
- 445:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Cfg_cmp bit set to 0 during configuration of PFSUSB Registers. */\r
- 446:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
- 447:.\Generated_Source\PSoC5/USBFS_std.c ****     #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 448:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 449:.\Generated_Source\PSoC5/USBFS_std.c ****     CY_SET_REG8(USBFS_SIE_EP_INT_EN_PTR, 0xFFu);\r
- 131                           .loc 1 449 0\r
- 132 0088 0949                 ldr     r1, .L10+32\r
- 133 008a FF22                 movs    r2, #255\r
- 134                   .LVL7:\r
- 135 008c 0A70                 strb    r2, [r1, #0]\r
- 136 008e 30BD                 pop     {r4, r5, pc}\r
- 137                   .L11:\r
- 138                           .align  2\r
- 139                   .L10:\r
- 140 0090 00000000             .word   USBFS_EP\r
- 141 0094 0E600040             .word   1073766414\r
- 142 0098 0C600040             .word   1073766412\r
- 143 009c 0D600040             .word   1073766413\r
- 144 00a0 86600040             .word   1073766534\r
- 145 00a4 87600040             .word   1073766535\r
- 146 00a8 84600040             .word   1073766532\r
- 147 00ac 85600040             .word   1073766533\r
- 148 00b0 0A600040             .word   1073766410\r
- 149                           .cfi_endproc\r
- 150                   .LFE1:\r
- 151                           .size   USBFS_ConfigReg, .-USBFS_ConfigReg\r
- 152                           .section        .text.USBFS_GetConfigTablePtr,"ax",%progbits\r
- 153                           .align  1\r
- 154                           .global USBFS_GetConfigTablePtr\r
- 155                           .thumb\r
- 156                           .thumb_func\r
- 157                           .type   USBFS_GetConfigTablePtr, %function\r
- 158                   USBFS_GetConfigTablePtr:\r
- 159                   .LFB4:\r
- 450:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 451:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 452:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 453:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 454:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_Config\r
- 455:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 456:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 457:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 12\r
-\r
-\r
- 458:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine configures endpoints for the entire configuration by scanning\r
- 459:.\Generated_Source\PSoC5/USBFS_std.c **** *  the configuration descriptor.\r
- 460:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 461:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 462:.\Generated_Source\PSoC5/USBFS_std.c **** *  clearAltSetting: It configures the bAlternateSetting 0 for each interface.\r
- 463:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 464:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 465:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 466:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 467:.\Generated_Source\PSoC5/USBFS_std.c **** * USBFS_interfaceClass - Initialized class array for each interface.\r
- 468:.\Generated_Source\PSoC5/USBFS_std.c **** *   It is used for handling Class specific requests depend on interface class.\r
- 469:.\Generated_Source\PSoC5/USBFS_std.c **** *   Different classes in multiple Alternate settings does not supported.\r
- 470:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 471:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
- 472:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
- 473:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 474:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 475:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_Config(uint8 clearAltSetting) \r
- 476:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 477:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep;\r
- 478:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 cur_ep;\r
- 479:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 i;\r
- 480:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep_type;\r
- 481:.\Generated_Source\PSoC5/USBFS_std.c ****     const uint8 *pDescr;\r
- 482:.\Generated_Source\PSoC5/USBFS_std.c ****     #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
- 483:.\Generated_Source\PSoC5/USBFS_std.c ****         uint16 buffCount = 0u;\r
- 484:.\Generated_Source\PSoC5/USBFS_std.c ****     #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
- 485:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 486:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 487:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_EP_SETTINGS_BLOCK CYCODE *pEP;\r
- 488:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 489:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Clear all of the endpoints */\r
- 490:.\Generated_Source\PSoC5/USBFS_std.c ****     for (ep = 0u; ep < USBFS_MAX_EP; ep++)\r
- 491:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 492:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].attrib = 0u;\r
- 493:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState = 0u;\r
- 494:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 495:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 496:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epMode = USBFS_MODE_DISABLE;\r
- 497:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].bufferSize = 0u;\r
- 498:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].interface = 0u;\r
- 499:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 500:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 501:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 502:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Clear Alternate settings for all interfaces */\r
- 503:.\Generated_Source\PSoC5/USBFS_std.c ****     if(clearAltSetting != 0u)\r
- 504:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 505:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
- 506:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 507:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting[i] = 0x00u;\r
- 508:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting_last[i] = 0x00u;\r
- 509:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 510:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 511:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 512:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Init Endpoints and Device Status if configured */\r
- 513:.\Generated_Source\PSoC5/USBFS_std.c ****     if(USBFS_configuration > 0u)\r
- 514:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 13\r
-\r
-\r
- 515:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 516:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Set Power status for current configuration */\r
- 517:.\Generated_Source\PSoC5/USBFS_std.c ****         pDescr = (const uint8 *)pTmp->p_list;\r
- 518:.\Generated_Source\PSoC5/USBFS_std.c ****         if((pDescr[USBFS_CONFIG_DESCR_ATTRIB] & USBFS_CONFIG_DESCR_ATTRIB_SELF_POWERED) != 0u)\r
- 519:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 520:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_deviceStatus |=  USBFS_DEVICE_STATUS_SELF_POWERED;\r
- 521:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 522:.\Generated_Source\PSoC5/USBFS_std.c ****         else\r
- 523:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 524:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_deviceStatus &=  (uint8)~USBFS_DEVICE_STATUS_SELF_POWERED;\r
- 525:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 526:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Move to next element */\r
- 527:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = &pTmp[1u];\r
- 528:.\Generated_Source\PSoC5/USBFS_std.c ****         ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
- 529:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 530:.\Generated_Source\PSoC5/USBFS_std.c ****         #if ((USBFS_EP_MA == USBFS__MA_DYNAMIC) && \\r
- 531:.\Generated_Source\PSoC5/USBFS_std.c ****              (USBFS_EP_MM == USBFS__EP_MANUAL) )\r
- 532:.\Generated_Source\PSoC5/USBFS_std.c ****             /* Configure for dynamic EP memory allocation */\r
- 533:.\Generated_Source\PSoC5/USBFS_std.c ****             /* p_list points the endpoint setting table. */\r
- 534:.\Generated_Source\PSoC5/USBFS_std.c ****             pEP = (T_USBFS_EP_SETTINGS_BLOCK *) pTmp->p_list;\r
- 535:.\Generated_Source\PSoC5/USBFS_std.c ****             for (i = 0u; i < ep; i++)\r
- 536:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 537:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Compare current Alternate setting with EP Alt*/\r
- 538:.\Generated_Source\PSoC5/USBFS_std.c ****                 if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)\r
- 539:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 540:.\Generated_Source\PSoC5/USBFS_std.c ****                     cur_ep = pEP->addr & USBFS_DIR_UNUSED;\r
- 541:.\Generated_Source\PSoC5/USBFS_std.c ****                     ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 542:.\Generated_Source\PSoC5/USBFS_std.c ****                     if (pEP->addr & USBFS_DIR_IN)\r
- 543:.\Generated_Source\PSoC5/USBFS_std.c ****                     {\r
- 544:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* IN Endpoint */\r
- 545:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
- 546:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 547:.\Generated_Source\PSoC5/USBFS_std.c ****                                                         USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
- 548:.\Generated_Source\PSoC5/USBFS_std.c ****                         #if defined(USBFS_ENABLE_CDC_CLASS)\r
- 549:.\Generated_Source\PSoC5/USBFS_std.c ****                             if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
- 550:.\Generated_Source\PSoC5/USBFS_std.c ****                                 (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
- 551:.\Generated_Source\PSoC5/USBFS_std.c ****                                 (ep_type != USBFS_EP_TYPE_INT))\r
- 552:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 553:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_cdc_data_in_ep = cur_ep;\r
- 554:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 555:.\Generated_Source\PSoC5/USBFS_std.c ****                         #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
- 556:.\Generated_Source\PSoC5/USBFS_std.c ****                         #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
- 557:.\Generated_Source\PSoC5/USBFS_std.c ****                                              (USBFS_MIDI_IN_BUFF_SIZE > 0) )\r
- 558:.\Generated_Source\PSoC5/USBFS_std.c ****                             if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
- 559:.\Generated_Source\PSoC5/USBFS_std.c ****                                (ep_type == USBFS_EP_TYPE_BULK))\r
- 560:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 561:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_midi_in_ep = cur_ep;\r
- 562:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 563:.\Generated_Source\PSoC5/USBFS_std.c ****                         #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
- 564:.\Generated_Source\PSoC5/USBFS_std.c ****                     }\r
- 565:.\Generated_Source\PSoC5/USBFS_std.c ****                     else\r
- 566:.\Generated_Source\PSoC5/USBFS_std.c ****                     {\r
- 567:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* OUT Endpoint */\r
- 568:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 569:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 570:.\Generated_Source\PSoC5/USBFS_std.c ****                                                     USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
- 571:.\Generated_Source\PSoC5/USBFS_std.c ****                         #if defined(USBFS_ENABLE_CDC_CLASS)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 14\r
-\r
-\r
- 572:.\Generated_Source\PSoC5/USBFS_std.c ****                             if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
- 573:.\Generated_Source\PSoC5/USBFS_std.c ****                                 (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
- 574:.\Generated_Source\PSoC5/USBFS_std.c ****                                 (ep_type != USBFS_EP_TYPE_INT))\r
- 575:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 576:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_cdc_data_out_ep = cur_ep;\r
- 577:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 578:.\Generated_Source\PSoC5/USBFS_std.c ****                         #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
- 579:.\Generated_Source\PSoC5/USBFS_std.c ****                         #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
- 580:.\Generated_Source\PSoC5/USBFS_std.c ****                                      (USBFS_MIDI_OUT_BUFF_SIZE > 0) )\r
- 581:.\Generated_Source\PSoC5/USBFS_std.c ****                             if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
- 582:.\Generated_Source\PSoC5/USBFS_std.c ****                                (ep_type == USBFS_EP_TYPE_BULK))\r
- 583:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 584:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_midi_out_ep = cur_ep;\r
- 585:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 586:.\Generated_Source\PSoC5/USBFS_std.c ****                         #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
- 587:.\Generated_Source\PSoC5/USBFS_std.c ****                     }\r
- 588:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
- 589:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].addr = pEP->addr;\r
- 590:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].attrib = pEP->attributes;\r
- 591:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 592:.\Generated_Source\PSoC5/USBFS_std.c ****                 pEP = &pEP[1u];\r
- 593:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 594:.\Generated_Source\PSoC5/USBFS_std.c ****         #else /* Config for static EP memory allocation  */\r
- 595:.\Generated_Source\PSoC5/USBFS_std.c ****             for (i = USBFS_EP1; i < USBFS_MAX_EP; i++)\r
- 596:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 597:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* p_list points the endpoint setting table. */\r
- 598:.\Generated_Source\PSoC5/USBFS_std.c ****                 pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
- 599:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Find max length for each EP and select it (length could be different in differen\r
- 600:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* but other settings should be correct with regards to Interface alt Setting */\r
- 601:.\Generated_Source\PSoC5/USBFS_std.c ****                 for (cur_ep = 0u; cur_ep < ep; cur_ep++)\r
- 602:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 603:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* EP count is equal to EP # in table and we found larger EP length than have b\r
- 604:.\Generated_Source\PSoC5/USBFS_std.c ****                     if(i == (pEP->addr & USBFS_DIR_UNUSED))\r
- 605:.\Generated_Source\PSoC5/USBFS_std.c ****                     {\r
- 606:.\Generated_Source\PSoC5/USBFS_std.c ****                         if(USBFS_EP[i].bufferSize < pEP->bufferSize)\r
- 607:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 608:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].bufferSize = pEP->bufferSize;\r
- 609:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 610:.\Generated_Source\PSoC5/USBFS_std.c ****                         /* Compare current Alternate setting with EP Alt*/\r
- 611:.\Generated_Source\PSoC5/USBFS_std.c ****                         if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)\r
- 612:.\Generated_Source\PSoC5/USBFS_std.c ****                         {\r
- 613:.\Generated_Source\PSoC5/USBFS_std.c ****                             ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 614:.\Generated_Source\PSoC5/USBFS_std.c ****                             if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 615:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 616:.\Generated_Source\PSoC5/USBFS_std.c ****                                 /* IN Endpoint */\r
- 617:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].apiEpState = USBFS_EVENT_PENDING;\r
- 618:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 619:.\Generated_Source\PSoC5/USBFS_std.c ****                                                         USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
- 620:.\Generated_Source\PSoC5/USBFS_std.c ****                                 /* Find and init CDC IN endpoint number */\r
- 621:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #if defined(USBFS_ENABLE_CDC_CLASS)\r
- 622:.\Generated_Source\PSoC5/USBFS_std.c ****                                     if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
- 623:.\Generated_Source\PSoC5/USBFS_std.c ****                                         (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
- 624:.\Generated_Source\PSoC5/USBFS_std.c ****                                         (ep_type != USBFS_EP_TYPE_INT))\r
- 625:.\Generated_Source\PSoC5/USBFS_std.c ****                                     {\r
- 626:.\Generated_Source\PSoC5/USBFS_std.c ****                                         USBFS_cdc_data_in_ep = i;\r
- 627:.\Generated_Source\PSoC5/USBFS_std.c ****                                     }\r
- 628:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 15\r
-\r
-\r
- 629:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
- 630:.\Generated_Source\PSoC5/USBFS_std.c ****                                              (USBFS_MIDI_IN_BUFF_SIZE > 0) )\r
- 631:.\Generated_Source\PSoC5/USBFS_std.c ****                                     if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
- 632:.\Generated_Source\PSoC5/USBFS_std.c ****                                        (ep_type == USBFS_EP_TYPE_BULK))\r
- 633:.\Generated_Source\PSoC5/USBFS_std.c ****                                     {\r
- 634:.\Generated_Source\PSoC5/USBFS_std.c ****                                         USBFS_midi_in_ep = i;\r
- 635:.\Generated_Source\PSoC5/USBFS_std.c ****                                     }\r
- 636:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
- 637:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 638:.\Generated_Source\PSoC5/USBFS_std.c ****                             else\r
- 639:.\Generated_Source\PSoC5/USBFS_std.c ****                             {\r
- 640:.\Generated_Source\PSoC5/USBFS_std.c ****                                 /* OUT Endpoint */\r
- 641:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 642:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 643:.\Generated_Source\PSoC5/USBFS_std.c ****                                                     USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
- 644:.\Generated_Source\PSoC5/USBFS_std.c ****                                 /* Find and init CDC IN endpoint number */\r
- 645:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #if defined(USBFS_ENABLE_CDC_CLASS)\r
- 646:.\Generated_Source\PSoC5/USBFS_std.c ****                                     if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
- 647:.\Generated_Source\PSoC5/USBFS_std.c ****                                         (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
- 648:.\Generated_Source\PSoC5/USBFS_std.c ****                                         (ep_type != USBFS_EP_TYPE_INT))\r
- 649:.\Generated_Source\PSoC5/USBFS_std.c ****                                     {\r
- 650:.\Generated_Source\PSoC5/USBFS_std.c ****                                         USBFS_cdc_data_out_ep = i;\r
- 651:.\Generated_Source\PSoC5/USBFS_std.c ****                                     }\r
- 652:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
- 653:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
- 654:.\Generated_Source\PSoC5/USBFS_std.c ****                                              (USBFS_MIDI_OUT_BUFF_SIZE > 0) )\r
- 655:.\Generated_Source\PSoC5/USBFS_std.c ****                                     if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
- 656:.\Generated_Source\PSoC5/USBFS_std.c ****                                        (ep_type == USBFS_EP_TYPE_BULK))\r
- 657:.\Generated_Source\PSoC5/USBFS_std.c ****                                     {\r
- 658:.\Generated_Source\PSoC5/USBFS_std.c ****                                         USBFS_midi_out_ep = i;\r
- 659:.\Generated_Source\PSoC5/USBFS_std.c ****                                     }\r
- 660:.\Generated_Source\PSoC5/USBFS_std.c ****                                 #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
- 661:.\Generated_Source\PSoC5/USBFS_std.c ****                             }\r
- 662:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].addr = pEP->addr;\r
- 663:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].attrib = pEP->attributes;\r
- 664:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 665:.\Generated_Source\PSoC5/USBFS_std.c ****                             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 666:.\Generated_Source\PSoC5/USBFS_std.c ****                                 break;      /* use first EP setting in Auto memory managment */\r
- 667:.\Generated_Source\PSoC5/USBFS_std.c ****                             #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 668:.\Generated_Source\PSoC5/USBFS_std.c ****                         }\r
- 669:.\Generated_Source\PSoC5/USBFS_std.c ****                     }\r
- 670:.\Generated_Source\PSoC5/USBFS_std.c ****                     pEP = &pEP[1u];\r
- 671:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 672:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 673:.\Generated_Source\PSoC5/USBFS_std.c ****         #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */\r
- 674:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 675:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Init class array for each interface and interface number for each EP.\r
- 676:.\Generated_Source\PSoC5/USBFS_std.c ****         *  It is used for handling Class specific requests directed to either an\r
- 677:.\Generated_Source\PSoC5/USBFS_std.c ****         *  interface or the endpoint.\r
- 678:.\Generated_Source\PSoC5/USBFS_std.c ****         */\r
- 679:.\Generated_Source\PSoC5/USBFS_std.c ****         /* p_list points the endpoint setting table. */\r
- 680:.\Generated_Source\PSoC5/USBFS_std.c ****         pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
- 681:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 682:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 683:.\Generated_Source\PSoC5/USBFS_std.c ****             /* Configure interface number for each EP*/\r
- 684:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_EP[pEP->addr & USBFS_DIR_UNUSED].interface = pEP->interface;\r
- 685:.\Generated_Source\PSoC5/USBFS_std.c ****             pEP = &pEP[1u];\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 16\r
-\r
-\r
- 686:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 687:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Init pointer on interface class table*/\r
- 688:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceClass = USBFS_GetInterfaceClassTablePtr();\r
- 689:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Set the endpoint buffer addresses */\r
- 690:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 691:.\Generated_Source\PSoC5/USBFS_std.c ****         #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
- 692:.\Generated_Source\PSoC5/USBFS_std.c ****             for (ep = USBFS_EP1; ep < USBFS_MAX_EP; ep++)\r
- 693:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 694:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[ep].buffOffset = buffCount;\r
- 695:.\Generated_Source\PSoC5/USBFS_std.c ****                  buffCount += USBFS_EP[ep].bufferSize;\r
- 696:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 697:.\Generated_Source\PSoC5/USBFS_std.c ****         #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
- 698:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 699:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Configure hardware registers */\r
- 700:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_ConfigReg();\r
- 701:.\Generated_Source\PSoC5/USBFS_std.c ****     } /* USBFS_configuration > 0 */\r
- 702:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 703:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 704:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 705:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 706:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_ConfigAltChanged\r
- 707:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 708:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 709:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 710:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine update configuration for the required endpoints only.\r
- 711:.\Generated_Source\PSoC5/USBFS_std.c **** *  It is called after SET_INTERFACE request when Static memory allocation used.\r
- 712:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 713:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 714:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 715:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 716:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 717:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 718:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 719:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
- 720:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
- 721:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 722:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 723:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigAltChanged(void) \r
- 724:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 725:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep;\r
- 726:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 cur_ep;\r
- 727:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 i;\r
- 728:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep_type;\r
- 729:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ri;\r
- 730:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 731:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 732:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_EP_SETTINGS_BLOCK CYCODE *pEP;\r
- 733:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 734:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 735:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Init Endpoints and Device Status if configured */\r
- 736:.\Generated_Source\PSoC5/USBFS_std.c ****     if(USBFS_configuration > 0u)\r
- 737:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 738:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 739:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = &pTmp[1u];\r
- 740:.\Generated_Source\PSoC5/USBFS_std.c ****         ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
- 741:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 742:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Do not touch EP which doesn't need reconfiguration */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 17\r
-\r
-\r
- 743:.\Generated_Source\PSoC5/USBFS_std.c ****         /* When Alt setting changed, the only required endpoints need to be reconfigured */\r
- 744:.\Generated_Source\PSoC5/USBFS_std.c ****         /* p_list points the endpoint setting table. */\r
- 745:.\Generated_Source\PSoC5/USBFS_std.c ****         pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
- 746:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 747:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 748:.\Generated_Source\PSoC5/USBFS_std.c ****             /*If Alt setting changed and new is same with EP Alt */\r
- 749:.\Generated_Source\PSoC5/USBFS_std.c ****             if((USBFS_interfaceSetting[pEP->interface] !=\r
- 750:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_interfaceSetting_last[pEP->interface] ) &&\r
- 751:.\Generated_Source\PSoC5/USBFS_std.c ****                (USBFS_interfaceSetting[pEP->interface] == pEP->altSetting) &&\r
- 752:.\Generated_Source\PSoC5/USBFS_std.c ****                (pEP->interface == CY_GET_REG8(USBFS_wIndexLo)))\r
- 753:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
- 754:.\Generated_Source\PSoC5/USBFS_std.c ****                 cur_ep = pEP->addr & USBFS_DIR_UNUSED;\r
- 755:.\Generated_Source\PSoC5/USBFS_std.c ****                 ri = ((cur_ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 756:.\Generated_Source\PSoC5/USBFS_std.c ****                 ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 757:.\Generated_Source\PSoC5/USBFS_std.c ****                 if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 758:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 759:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* IN Endpoint */\r
- 760:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
- 761:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 762:.\Generated_Source\PSoC5/USBFS_std.c ****                                                 USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
- 763:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 764:.\Generated_Source\PSoC5/USBFS_std.c ****                 else\r
- 765:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 766:.\Generated_Source\PSoC5/USBFS_std.c ****                     /* OUT Endpoint */\r
- 767:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 768:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 769:.\Generated_Source\PSoC5/USBFS_std.c ****                                                 USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
- 770:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 771:.\Generated_Source\PSoC5/USBFS_std.c ****                  /* Change the SIE mode for the selected EP to NAK ALL */\r
- 772:.\Generated_Source\PSoC5/USBFS_std.c ****                  CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN_OUT);\r
- 773:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
- 774:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].addr = pEP->addr;\r
- 775:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].attrib = pEP->attributes;\r
- 776:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 777:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Clear the data toggle */\r
- 778:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].epToggle = 0u;\r
- 779:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 780:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Dynamic reconfiguration for mode 3 transfer */\r
- 781:.\Generated_Source\PSoC5/USBFS_std.c ****             #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
- 782:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* In_data_rdy for selected EP should be set to 0 */\r
- 783:.\Generated_Source\PSoC5/USBFS_std.c ****                 * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= (uint8)~USBFS_ARB_EPX_CFG_IN_DATA_RDY;\r
- 784:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 785:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* write the EP number for which reconfiguration is required */\r
- 786:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_DYN_RECONFIG_REG = (cur_ep - USBFS_EP1) <<\r
- 787:.\Generated_Source\PSoC5/USBFS_std.c ****                                                     USBFS_DYN_RECONFIG_EP_SHIFT;\r
- 788:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Set the dyn_config_en bit in dynamic reconfiguration register */\r
- 789:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_DYN_RECONFIG_REG |= USBFS_DYN_RECONFIG_ENABLE;\r
- 790:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* wait for the dyn_config_rdy bit to set by the block,\r
- 791:.\Generated_Source\PSoC5/USBFS_std.c ****                 *  this bit will be set to 1 when block is ready for reconfiguration.\r
- 792:.\Generated_Source\PSoC5/USBFS_std.c ****                 */\r
- 793:.\Generated_Source\PSoC5/USBFS_std.c ****                 while((USBFS_DYN_RECONFIG_REG & USBFS_DYN_RECONFIG_RDY_STS) == 0u)\r
- 794:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 795:.\Generated_Source\PSoC5/USBFS_std.c ****                     ;\r
- 796:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 797:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Once dyn_config_rdy bit is set, FW can change the EP configuration. */\r
- 798:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* Change EP Type with new direction */\r
- 799:.\Generated_Source\PSoC5/USBFS_std.c ****                 if((pEP->addr & USBFS_DIR_IN) == 0u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 18\r
-\r
-\r
- 800:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 801:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP_TYPE_REG |= (uint8)(0x01u << (cur_ep - USBFS_EP1));\r
- 802:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 803:.\Generated_Source\PSoC5/USBFS_std.c ****                 else\r
- 804:.\Generated_Source\PSoC5/USBFS_std.c ****                 {\r
- 805:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP_TYPE_REG &= (uint8)~(uint8)(0x01u << (cur_ep - USBFS_EP1));\r
- 806:.\Generated_Source\PSoC5/USBFS_std.c ****                 }\r
- 807:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* dynamic reconfiguration enable bit cleared, pointers and control/status\r
- 808:.\Generated_Source\PSoC5/USBFS_std.c ****                 *  signals for the selected EP is cleared/re-initialized on negative edge\r
- 809:.\Generated_Source\PSoC5/USBFS_std.c ****                 *  of dynamic reconfiguration enable bit).\r
- 810:.\Generated_Source\PSoC5/USBFS_std.c ****                 */\r
- 811:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_DYN_RECONFIG_REG &= (uint8)~USBFS_DYN_RECONFIG_ENABLE;\r
- 812:.\Generated_Source\PSoC5/USBFS_std.c ****                 /* The main loop has to re-enable DMA and OUT endpoint*/\r
- 813:.\Generated_Source\PSoC5/USBFS_std.c ****             #else\r
- 814:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),\r
- 815:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].bufferSize >> 8u);\r
- 816:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri),\r
- 817:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].bufferSize & 0xFFu\r
- 818:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + ri),\r
- 819:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].buffOffset & 0xFFu\r
- 820:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + ri),\r
- 821:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].buffOffset >> 8u);\r
- 822:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + ri),\r
- 823:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].buffOffset & 0xFFu\r
- 824:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ri),\r
- 825:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 USBFS_EP[cur_ep].buffOffset >> 8u);\r
- 826:.\Generated_Source\PSoC5/USBFS_std.c ****             #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
- 827:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
- 828:.\Generated_Source\PSoC5/USBFS_std.c ****             /* Get next EP element */\r
- 829:.\Generated_Source\PSoC5/USBFS_std.c ****             pEP = &pEP[1u];\r
- 830:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 831:.\Generated_Source\PSoC5/USBFS_std.c ****     }   /* USBFS_configuration > 0 */\r
- 832:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 833:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 834:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 835:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 836:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_GetConfigTablePtr\r
- 837:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 838:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 839:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 840:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine returns a pointer a configuration table entry\r
- 841:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 842:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 843:.\Generated_Source\PSoC5/USBFS_std.c **** *  c:  Configuration Index\r
- 844:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 845:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 846:.\Generated_Source\PSoC5/USBFS_std.c **** *  Device Descriptor pointer.\r
- 847:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 848:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 849:.\Generated_Source\PSoC5/USBFS_std.c **** const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)\r
- 850:.\Generated_Source\PSoC5/USBFS_std.c ****                                                         \r
- 851:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 160                           .loc 1 851 0\r
- 161                           .cfi_startproc\r
- 162                           @ args = 0, pretend = 0, frame = 0\r
- 163                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 164                           @ link register save eliminated.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 19\r
-\r
-\r
- 165                   .LVL8:\r
- 852:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Device Table */\r
- 853:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 854:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 855:.\Generated_Source\PSoC5/USBFS_std.c ****     pTmp = (const T_USBFS_LUT CYCODE *) USBFS_TABLE[USBFS_device].p_list;\r
- 166                           .loc 1 855 0\r
- 167 0000 044B                 ldr     r3, .L13\r
- 168 0002 0549                 ldr     r1, .L13+4\r
- 169 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 170                   .LVL9:\r
- 171 0006 01EBC203             add     r3, r1, r2, lsl #3\r
- 856:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 857:.\Generated_Source\PSoC5/USBFS_std.c ****     /* The first entry points to the Device Descriptor,\r
- 858:.\Generated_Source\PSoC5/USBFS_std.c ****     *  the rest configuration entries.\r
- 859:.\Generated_Source\PSoC5/USBFS_std.c ****         */\r
- 860:.\Generated_Source\PSoC5/USBFS_std.c ****     return( (const T_USBFS_LUT CYCODE *) pTmp[c + 1u].p_list );\r
- 172                           .loc 1 860 0\r
- 173 000a 5A68                 ldr     r2, [r3, #4]\r
- 174                   .LVL10:\r
- 175 000c 02EBC000             add     r0, r2, r0, lsl #3\r
- 176                   .LVL11:\r
- 861:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 177                           .loc 1 861 0\r
- 178 0010 C068                 ldr     r0, [r0, #12]\r
- 179 0012 7047                 bx      lr\r
- 180                   .L14:\r
- 181                           .align  2\r
- 182                   .L13:\r
- 183 0014 00000000             .word   USBFS_device\r
- 184 0018 00000000             .word   USBFS_TABLE\r
- 185                           .cfi_endproc\r
- 186                   .LFE4:\r
- 187                           .size   USBFS_GetConfigTablePtr, .-USBFS_GetConfigTablePtr\r
- 188                           .section        .text.USBFS_ConfigAltChanged,"ax",%progbits\r
- 189                           .align  1\r
- 190                           .global USBFS_ConfigAltChanged\r
- 191                           .thumb\r
- 192                           .thumb_func\r
- 193                           .type   USBFS_ConfigAltChanged, %function\r
- 194                   USBFS_ConfigAltChanged:\r
- 195                   .LFB3:\r
- 724:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 196                           .loc 1 724 0\r
- 197                           .cfi_startproc\r
- 198                           @ args = 0, pretend = 0, frame = 0\r
- 199                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 200 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 201                   .LCFI1:\r
- 202                           .cfi_def_cfa_offset 24\r
- 203                           .cfi_offset 3, -24\r
- 204                           .cfi_offset 4, -20\r
- 205                           .cfi_offset 5, -16\r
- 206                           .cfi_offset 6, -12\r
- 207                           .cfi_offset 7, -8\r
- 208                           .cfi_offset 14, -4\r
- 736:.\Generated_Source\PSoC5/USBFS_std.c ****     if(USBFS_configuration > 0u)\r
- 209                           .loc 1 736 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 20\r
-\r
-\r
- 210 0002 3D4B                 ldr     r3, .L28\r
- 211 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 212 0006 002A                 cmp     r2, #0\r
- 213 0008 74D0                 beq     .L15\r
- 738:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 214                           .loc 1 738 0\r
- 215 000a 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 216 000c 411E                 subs    r1, r0, #1\r
- 217 000e C8B2                 uxtb    r0, r1\r
- 218 0010 FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 219                   .LVL12:\r
- 723:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigAltChanged(void) \r
- 220                           .loc 1 723 0\r
- 221 0014 C368                 ldr     r3, [r0, #12]\r
- 740:.\Generated_Source\PSoC5/USBFS_std.c ****         ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
- 222                           .loc 1 740 0\r
- 223 0016 057A                 ldrb    r5, [r0, #8]    @ zero_extendqisi2\r
- 224                   .LVL13:\r
- 723:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_ConfigAltChanged(void) \r
- 225                           .loc 1 723 0\r
- 226 0018 0833                 adds    r3, r3, #8\r
- 227                   .LVL14:\r
- 746:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 228                           .loc 1 746 0\r
- 229 001a 0020                 movs    r0, #0\r
- 230                   .LVL15:\r
- 231                   .L17:\r
- 746:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 232                           .loc 1 746 0 is_stmt 0 discriminator 1\r
- 233 001c A842                 cmp     r0, r5\r
- 234 001e 69D0                 beq     .L15\r
- 235                   .L23:\r
- 749:.\Generated_Source\PSoC5/USBFS_std.c ****             if((USBFS_interfaceSetting[pEP->interface] !=\r
- 236                           .loc 1 749 0 is_stmt 1\r
- 237 0020 13F8082C             ldrb    r2, [r3, #-8]   @ zero_extendqisi2\r
- 238 0024 3549                 ldr     r1, .L28+4\r
- 750:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_interfaceSetting_last[pEP->interface] ) &&\r
- 239                           .loc 1 750 0\r
- 240 0026 364C                 ldr     r4, .L28+8\r
- 749:.\Generated_Source\PSoC5/USBFS_std.c ****             if((USBFS_interfaceSetting[pEP->interface] !=\r
- 241                           .loc 1 749 0\r
- 242 0028 8E5C                 ldrb    r6, [r1, r2]    @ zero_extendqisi2\r
- 750:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_interfaceSetting_last[pEP->interface] ) &&\r
- 243                           .loc 1 750 0\r
- 244 002a A45C                 ldrb    r4, [r4, r2]    @ zero_extendqisi2\r
- 749:.\Generated_Source\PSoC5/USBFS_std.c ****             if((USBFS_interfaceSetting[pEP->interface] !=\r
- 245                           .loc 1 749 0\r
- 246 002c A642                 cmp     r6, r4\r
- 247 002e 5DD0                 beq     .L18\r
- 751:.\Generated_Source\PSoC5/USBFS_std.c ****                (USBFS_interfaceSetting[pEP->interface] == pEP->altSetting) &&\r
- 248                           .loc 1 751 0\r
- 249 0030 895C                 ldrb    r1, [r1, r2]    @ zero_extendqisi2\r
- 750:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_interfaceSetting_last[pEP->interface] ) &&\r
- 250                           .loc 1 750 0\r
- 251 0032 13F8074C             ldrb    r4, [r3, #-7]   @ zero_extendqisi2\r
- 252 0036 8C42                 cmp     r4, r1\r
- 253 0038 58D1                 bne     .L18\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 21\r
-\r
-\r
- 752:.\Generated_Source\PSoC5/USBFS_std.c ****                (pEP->interface == CY_GET_REG8(USBFS_wIndexLo)))\r
- 254                           .loc 1 752 0\r
- 255 003a 3249                 ldr     r1, .L28+12\r
- 256 003c 0978                 ldrb    r1, [r1, #0]    @ zero_extendqisi2\r
- 751:.\Generated_Source\PSoC5/USBFS_std.c ****                (USBFS_interfaceSetting[pEP->interface] == pEP->altSetting) &&\r
- 257                           .loc 1 751 0\r
- 258 003e 8A42                 cmp     r2, r1\r
- 259 0040 54D1                 bne     .L18\r
- 754:.\Generated_Source\PSoC5/USBFS_std.c ****                 cur_ep = pEP->addr & USBFS_DIR_UNUSED;\r
- 260                           .loc 1 754 0\r
- 261 0042 13F8067C             ldrb    r7, [r3, #-6]   @ zero_extendqisi2\r
- 262 0046 07F07F02             and     r2, r7, #127\r
- 263                   .LVL16:\r
- 755:.\Generated_Source\PSoC5/USBFS_std.c ****                 ri = ((cur_ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 264                           .loc 1 755 0\r
- 265 004a 561E                 subs    r6, r2, #1\r
- 266 004c 3401                 lsls    r4, r6, #4\r
- 267 004e E1B2                 uxtb    r1, r4\r
- 268                   .LVL17:\r
- 756:.\Generated_Source\PSoC5/USBFS_std.c ****                 ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 269                           .loc 1 756 0\r
- 270 0050 13F8056C             ldrb    r6, [r3, #-5]   @ zero_extendqisi2\r
- 271 0054 2C4C                 ldr     r4, .L28+16\r
- 272                   .LVL18:\r
- 757:.\Generated_Source\PSoC5/USBFS_std.c ****                 if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 273                           .loc 1 757 0\r
- 274 0056 17F0800F             tst     r7, #128\r
- 275 005a 4FF00C07             mov     r7, #12\r
- 756:.\Generated_Source\PSoC5/USBFS_std.c ****                 ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 276                           .loc 1 756 0\r
- 277 005e 06F00306             and     r6, r6, #3\r
- 278                   .LVL19:\r
- 760:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
- 279                           .loc 1 760 0\r
- 280 0062 07FB0244             mla     r4, r7, r2, r4\r
- 757:.\Generated_Source\PSoC5/USBFS_std.c ****                 if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 281                           .loc 1 757 0\r
- 282 0066 06D0                 beq     .L19\r
- 760:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
- 283                           .loc 1 760 0\r
- 284 0068 0127                 movs    r7, #1\r
- 285 006a 6770                 strb    r7, [r4, #1]\r
- 761:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 286                           .loc 1 761 0\r
- 287 006c BE42                 cmp     r6, r7\r
- 288 006e 14BF                 ite     ne\r
- 289 0070 0D26                 movne   r6, #13\r
- 290 0072 0726                 moveq   r6, #7\r
- 291                   .LVL20:\r
- 292 0074 05E0                 b       .L27\r
- 293                   .LVL21:\r
- 294                   .L19:\r
- 767:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 295                           .loc 1 767 0\r
- 296 0076 0027                 movs    r7, #0\r
- 297 0078 6770                 strb    r7, [r4, #1]\r
- 768:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 22\r
-\r
-\r
- 298                           .loc 1 768 0\r
- 299 007a 012E                 cmp     r6, #1\r
- 300 007c 14BF                 ite     ne\r
- 301 007e 0926                 movne   r6, #9\r
- 302 0080 0526                 moveq   r6, #5\r
- 303                   .LVL22:\r
- 304                   .L27:\r
- 305 0082 6671                 strb    r6, [r4, #5]\r
- 772:.\Generated_Source\PSoC5/USBFS_std.c ****                  CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN_OUT);\r
- 306                           .loc 1 772 0\r
- 307 0084 214C                 ldr     r4, .L28+20\r
- 308 0086 0126                 movs    r6, #1\r
- 309 0088 0F19                 adds    r7, r1, r4\r
- 773:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
- 310                           .loc 1 773 0\r
- 311 008a 0C24                 movs    r4, #12\r
- 312 008c 5443                 muls    r4, r2, r4\r
- 772:.\Generated_Source\PSoC5/USBFS_std.c ****                  CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN_OUT);\r
- 313                           .loc 1 772 0\r
- 314 008e 3E70                 strb    r6, [r7, #0]\r
- 773:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
- 315                           .loc 1 773 0\r
- 316 0090 1D4E                 ldr     r6, .L28+16\r
- 317 0092 33F8047C             ldrh    r7, [r3, #-4]\r
- 318 0096 3219                 adds    r2, r6, r4\r
- 319                   .LVL23:\r
- 320 0098 1781                 strh    r7, [r2, #8]    @ movhi\r
- 774:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].addr = pEP->addr;\r
- 321                           .loc 1 774 0\r
- 322 009a 13F8067C             ldrb    r7, [r3, #-6]   @ zero_extendqisi2\r
- 323 009e 1771                 strb    r7, [r2, #4]\r
- 775:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].attrib = pEP->attributes;\r
- 324                           .loc 1 775 0\r
- 325 00a0 13F8057C             ldrb    r7, [r3, #-5]   @ zero_extendqisi2\r
- 326 00a4 3755                 strb    r7, [r6, r4]\r
- 778:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[cur_ep].epToggle = 0u;\r
- 327                           .loc 1 778 0\r
- 328 00a6 0026                 movs    r6, #0\r
- 329 00a8 D670                 strb    r6, [r2, #3]\r
- 814:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),\r
- 330                           .loc 1 814 0\r
- 331 00aa 1689                 ldrh    r6, [r2, #8]\r
- 332 00ac 184C                 ldr     r4, .L28+24\r
- 333 00ae C6F30726             ubfx    r6, r6, #8, #8\r
- 334 00b2 0C19                 adds    r4, r1, r4\r
- 335 00b4 2670                 strb    r6, [r4, #0]\r
- 816:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri),\r
- 336                           .loc 1 816 0\r
- 337 00b6 1689                 ldrh    r6, [r2, #8]\r
- 338 00b8 164C                 ldr     r4, .L28+28\r
- 339 00ba F6B2                 uxtb    r6, r6\r
- 340 00bc 0C19                 adds    r4, r1, r4\r
- 341 00be 2670                 strb    r6, [r4, #0]\r
- 818:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + ri),\r
- 342                           .loc 1 818 0\r
- 343 00c0 D688                 ldrh    r6, [r2, #6]\r
- 344 00c2 154C                 ldr     r4, .L28+32\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 23\r
-\r
-\r
- 345 00c4 F6B2                 uxtb    r6, r6\r
- 346 00c6 0C19                 adds    r4, r1, r4\r
- 347 00c8 2670                 strb    r6, [r4, #0]\r
- 820:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + ri),\r
- 348                           .loc 1 820 0\r
- 349 00ca D688                 ldrh    r6, [r2, #6]\r
- 350 00cc 134C                 ldr     r4, .L28+36\r
- 351 00ce C6F30726             ubfx    r6, r6, #8, #8\r
- 352 00d2 0C19                 adds    r4, r1, r4\r
- 353 00d4 2670                 strb    r6, [r4, #0]\r
- 822:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + ri),\r
- 354                           .loc 1 822 0\r
- 355 00d6 D688                 ldrh    r6, [r2, #6]\r
- 356 00d8 114C                 ldr     r4, .L28+40\r
- 357 00da F6B2                 uxtb    r6, r6\r
- 358 00dc 0C19                 adds    r4, r1, r4\r
- 359 00de 2670                 strb    r6, [r4, #0]\r
- 824:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ri),\r
- 360                           .loc 1 824 0\r
- 361 00e0 104C                 ldr     r4, .L28+44\r
- 362 00e2 0C19                 adds    r4, r1, r4\r
- 363 00e4 D188                 ldrh    r1, [r2, #6]\r
- 364                   .LVL24:\r
- 365 00e6 C1F30722             ubfx    r2, r1, #8, #8\r
- 366 00ea 2270                 strb    r2, [r4, #0]\r
- 367                   .LVL25:\r
- 368                   .L18:\r
- 746:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 369                           .loc 1 746 0\r
- 370 00ec 0130                 adds    r0, r0, #1\r
- 371                   .LVL26:\r
- 372 00ee C0B2                 uxtb    r0, r0\r
- 373                   .LVL27:\r
- 374 00f0 0833                 adds    r3, r3, #8\r
- 375 00f2 93E7                 b       .L17\r
- 376                   .LVL28:\r
- 377                   .L15:\r
- 378 00f4 F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 379                   .L29:\r
- 380 00f6 00BF                 .align  2\r
- 381                   .L28:\r
- 382 00f8 00000000             .word   USBFS_configuration\r
- 383 00fc 00000000             .word   USBFS_interfaceSetting\r
- 384 0100 00000000             .word   USBFS_interfaceSetting_last\r
- 385 0104 04600040             .word   1073766404\r
- 386 0108 00000000             .word   USBFS_EP\r
- 387 010c 0E600040             .word   1073766414\r
- 388 0110 0C600040             .word   1073766412\r
- 389 0114 0D600040             .word   1073766413\r
- 390 0118 86600040             .word   1073766534\r
- 391 011c 87600040             .word   1073766535\r
- 392 0120 84600040             .word   1073766532\r
- 393 0124 85600040             .word   1073766533\r
- 394                           .cfi_endproc\r
- 395                   .LFE3:\r
- 396                           .size   USBFS_ConfigAltChanged, .-USBFS_ConfigAltChanged\r
- 397                           .section        .text.USBFS_GetDeviceTablePtr,"ax",%progbits\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 24\r
-\r
-\r
- 398                           .align  1\r
- 399                           .global USBFS_GetDeviceTablePtr\r
- 400                           .thumb\r
- 401                           .thumb_func\r
- 402                           .type   USBFS_GetDeviceTablePtr, %function\r
- 403                   USBFS_GetDeviceTablePtr:\r
- 404                   .LFB5:\r
- 862:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 863:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 864:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 865:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_GetDeviceTablePtr\r
- 866:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 867:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 868:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 869:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine returns a pointer to the Device table\r
- 870:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 871:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 872:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 873:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 874:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 875:.\Generated_Source\PSoC5/USBFS_std.c **** *  Device Table pointer\r
- 876:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 877:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 878:.\Generated_Source\PSoC5/USBFS_std.c **** const T_USBFS_LUT CYCODE *USBFS_GetDeviceTablePtr(void)\r
- 879:.\Generated_Source\PSoC5/USBFS_std.c ****                                                             \r
- 880:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 405                           .loc 1 880 0\r
- 406                           .cfi_startproc\r
- 407                           @ args = 0, pretend = 0, frame = 0\r
- 408                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 409                           @ link register save eliminated.\r
- 881:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Device Table */\r
- 882:.\Generated_Source\PSoC5/USBFS_std.c ****     return( (const T_USBFS_LUT CYCODE *) USBFS_TABLE[USBFS_device].p_list );\r
- 410                           .loc 1 882 0\r
- 411 0000 034B                 ldr     r3, .L31\r
- 412 0002 0448                 ldr     r0, .L31+4\r
- 413 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 414 0006 00EBC201             add     r1, r0, r2, lsl #3\r
- 883:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 415                           .loc 1 883 0\r
- 416 000a 4868                 ldr     r0, [r1, #4]\r
- 417 000c 7047                 bx      lr\r
- 418                   .L32:\r
- 419 000e 00BF                 .align  2\r
- 420                   .L31:\r
- 421 0010 00000000             .word   USBFS_device\r
- 422 0014 00000000             .word   USBFS_TABLE\r
- 423                           .cfi_endproc\r
- 424                   .LFE5:\r
- 425                           .size   USBFS_GetDeviceTablePtr, .-USBFS_GetDeviceTablePtr\r
- 426                           .section        .text.USBFS_GetInterfaceClassTablePtr,"ax",%progbits\r
- 427                           .align  1\r
- 428                           .global USBFS_GetInterfaceClassTablePtr\r
- 429                           .thumb\r
- 430                           .thumb_func\r
- 431                           .type   USBFS_GetInterfaceClassTablePtr, %function\r
- 432                   USBFS_GetInterfaceClassTablePtr:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 25\r
-\r
-\r
- 433                   .LFB6:\r
- 884:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 885:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 886:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 887:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USB_GetInterfaceClassTablePtr\r
- 888:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 889:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 890:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 891:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine returns Interface Class table pointer, which contains\r
- 892:.\Generated_Source\PSoC5/USBFS_std.c **** *  the relation between interface number and interface class.\r
- 893:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 894:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 895:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 896:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 897:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 898:.\Generated_Source\PSoC5/USBFS_std.c **** *  Interface Class table pointer.\r
- 899:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 900:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 901:.\Generated_Source\PSoC5/USBFS_std.c **** const uint8 CYCODE *USBFS_GetInterfaceClassTablePtr(void)\r
- 902:.\Generated_Source\PSoC5/USBFS_std.c ****                                                         \r
- 903:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 434                           .loc 1 903 0\r
- 435                           .cfi_startproc\r
- 436                           @ args = 0, pretend = 0, frame = 0\r
- 437                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 438 0000 08B5                 push    {r3, lr}\r
- 439                   .LCFI2:\r
- 440                           .cfi_def_cfa_offset 8\r
- 441                           .cfi_offset 3, -8\r
- 442                           .cfi_offset 14, -4\r
- 904:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
- 905:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 currentInterfacesNum;\r
- 906:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 907:.\Generated_Source\PSoC5/USBFS_std.c ****     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 443                           .loc 1 907 0\r
- 444 0002 064B                 ldr     r3, .L34\r
- 445 0004 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 446 0006 411E                 subs    r1, r0, #1\r
- 447 0008 C8B2                 uxtb    r0, r1\r
- 448 000a FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 449                   .LVL29:\r
- 908:.\Generated_Source\PSoC5/USBFS_std.c ****     currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];\r
- 450                           .loc 1 908 0\r
- 451 000e 4268                 ldr     r2, [r0, #4]\r
- 909:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Third entry in the LUT starts the Interface Table pointers */\r
- 910:.\Generated_Source\PSoC5/USBFS_std.c ****     /* The INTERFACE_CLASS table is located after all interfaces */\r
- 911:.\Generated_Source\PSoC5/USBFS_std.c ****     pTmp = &pTmp[currentInterfacesNum + 2u];\r
- 452                           .loc 1 911 0\r
- 453 0010 1379                 ldrb    r3, [r2, #4]    @ zero_extendqisi2\r
- 454                   .LVL30:\r
- 912:.\Generated_Source\PSoC5/USBFS_std.c ****     return( (const uint8 CYCODE *) pTmp->p_list );\r
- 455                           .loc 1 912 0\r
- 456 0012 00EBC300             add     r0, r0, r3, lsl #3\r
- 457                   .LVL31:\r
- 913:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 458                           .loc 1 913 0\r
- 459 0016 4069                 ldr     r0, [r0, #20]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 26\r
-\r
-\r
- 460 0018 08BD                 pop     {r3, pc}\r
- 461                   .L35:\r
- 462 001a 00BF                 .align  2\r
- 463                   .L34:\r
- 464 001c 00000000             .word   USBFS_configuration\r
- 465                           .cfi_endproc\r
- 466                   .LFE6:\r
- 467                           .size   USBFS_GetInterfaceClassTablePtr, .-USBFS_GetInterfaceClassTablePtr\r
- 468                           .section        .text.USBFS_Config,"ax",%progbits\r
- 469                           .align  1\r
- 470                           .global USBFS_Config\r
- 471                           .thumb\r
- 472                           .thumb_func\r
- 473                           .type   USBFS_Config, %function\r
- 474                   USBFS_Config:\r
- 475                   .LFB2:\r
- 476:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 476                           .loc 1 476 0\r
- 477                           .cfi_startproc\r
- 478                           @ args = 0, pretend = 0, frame = 0\r
- 479                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 480                   .LVL32:\r
- 481 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
- 482                   .LCFI3:\r
- 483                           .cfi_def_cfa_offset 24\r
- 484                           .cfi_offset 3, -24\r
- 485                           .cfi_offset 4, -20\r
- 486                           .cfi_offset 5, -16\r
- 487                           .cfi_offset 6, -12\r
- 488                           .cfi_offset 7, -8\r
- 489                           .cfi_offset 14, -4\r
- 476:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 490                           .loc 1 476 0\r
- 491 0002 0021                 movs    r1, #0\r
- 492                   .LVL33:\r
- 493                   .L37:\r
- 492:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].attrib = 0u;\r
- 494                           .loc 1 492 0 discriminator 2\r
- 495 0004 0C24                 movs    r4, #12\r
- 496 0006 4C43                 muls    r4, r1, r4\r
- 497 0008 514D                 ldr     r5, .L68\r
- 498 000a 0131                 adds    r1, r1, #1\r
- 499 000c 0023                 movs    r3, #0\r
- 500 000e 2A19                 adds    r2, r5, r4\r
- 490:.\Generated_Source\PSoC5/USBFS_std.c ****     for (ep = 0u; ep < USBFS_MAX_EP; ep++)\r
- 501                           .loc 1 490 0 discriminator 2\r
- 502 0010 0929                 cmp     r1, #9\r
- 492:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].attrib = 0u;\r
- 503                           .loc 1 492 0 discriminator 2\r
- 504 0012 2B55                 strb    r3, [r5, r4]\r
- 493:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState = 0u;\r
- 505                           .loc 1 493 0 discriminator 2\r
- 506 0014 9370                 strb    r3, [r2, #2]\r
- 497:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].bufferSize = 0u;\r
- 507                           .loc 1 497 0 discriminator 2\r
- 508 0016 02F10804             add     r4, r2, #8\r
- 494:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 27\r
-\r
-\r
- 509                           .loc 1 494 0 discriminator 2\r
- 510 001a 5370                 strb    r3, [r2, #1]\r
- 495:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 511                           .loc 1 495 0 discriminator 2\r
- 512 001c D370                 strb    r3, [r2, #3]\r
- 496:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epMode = USBFS_MODE_DISABLE;\r
- 513                           .loc 1 496 0 discriminator 2\r
- 514 001e 5371                 strb    r3, [r2, #5]\r
- 497:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].bufferSize = 0u;\r
- 515                           .loc 1 497 0 discriminator 2\r
- 516 0020 1381                 strh    r3, [r2, #8]    @ movhi\r
- 498:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].interface = 0u;\r
- 517                           .loc 1 498 0 discriminator 2\r
- 518 0022 9372                 strb    r3, [r2, #10]\r
- 490:.\Generated_Source\PSoC5/USBFS_std.c ****     for (ep = 0u; ep < USBFS_MAX_EP; ep++)\r
- 519                           .loc 1 490 0 discriminator 2\r
- 520 0024 EED1                 bne     .L37\r
- 503:.\Generated_Source\PSoC5/USBFS_std.c ****     if(clearAltSetting != 0u)\r
- 521                           .loc 1 503 0\r
- 522 0026 18B1                 cbz     r0, .L38\r
- 507:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting[i] = 0x00u;\r
- 523                           .loc 1 507 0 discriminator 2\r
- 524 0028 4A48                 ldr     r0, .L68+4\r
- 525                   .LVL34:\r
- 508:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting_last[i] = 0x00u;\r
- 526                           .loc 1 508 0 discriminator 2\r
- 527 002a 4B4A                 ldr     r2, .L68+8\r
- 507:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting[i] = 0x00u;\r
- 528                           .loc 1 507 0 discriminator 2\r
- 529 002c 0370                 strb    r3, [r0, #0]\r
- 508:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_interfaceSetting_last[i] = 0x00u;\r
- 530                           .loc 1 508 0 discriminator 2\r
- 531 002e 1370                 strb    r3, [r2, #0]\r
- 532                   .LVL35:\r
- 533                   .L38:\r
- 513:.\Generated_Source\PSoC5/USBFS_std.c ****     if(USBFS_configuration > 0u)\r
- 534                           .loc 1 513 0\r
- 535 0030 4A4B                 ldr     r3, .L68+12\r
- 536 0032 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 537 0034 0029                 cmp     r1, #0\r
- 538 0036 00F08A80             beq     .L36\r
- 515:.\Generated_Source\PSoC5/USBFS_std.c ****         pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 539                           .loc 1 515 0\r
- 540 003a 1C78                 ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 541 003c 601E                 subs    r0, r4, #1\r
- 542 003e C0B2                 uxtb    r0, r0\r
- 543 0040 FFF7FEFF             bl      USBFS_GetConfigTablePtr\r
- 544                   .LVL36:\r
- 518:.\Generated_Source\PSoC5/USBFS_std.c ****         if((pDescr[USBFS_CONFIG_DESCR_ATTRIB] & USBFS_CONFIG_DESCR_ATTRIB_SELF_POWERED) != 0u)\r
- 545                           .loc 1 518 0\r
- 546 0044 4268                 ldr     r2, [r0, #4]\r
- 547 0046 D379                 ldrb    r3, [r2, #7]    @ zero_extendqisi2\r
- 548 0048 03F04001             and     r1, r3, #64\r
- 549 004c CCB2                 uxtb    r4, r1\r
- 550 004e 444B                 ldr     r3, .L68+16\r
- 551 0050 1CB1                 cbz     r4, .L40\r
- 520:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_deviceStatus |=  USBFS_DEVICE_STATUS_SELF_POWERED;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 28\r
-\r
-\r
- 552                           .loc 1 520 0\r
- 553 0052 1C78                 ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 554 0054 44F00101             orr     r1, r4, #1\r
- 555                   .LVL37:\r
- 556 0058 02E0                 b       .L64\r
- 557                   .L40:\r
- 524:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_deviceStatus &=  (uint8)~USBFS_DEVICE_STATUS_SELF_POWERED;\r
- 558                           .loc 1 524 0\r
- 559 005a 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 560 005c 02F0FE01             and     r1, r2, #254\r
- 561                   .L64:\r
- 528:.\Generated_Source\PSoC5/USBFS_std.c ****         ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
- 562                           .loc 1 528 0\r
- 563 0060 047A                 ldrb    r4, [r0, #8]    @ zero_extendqisi2\r
- 564                   .LVL38:\r
- 524:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_deviceStatus &=  (uint8)~USBFS_DEVICE_STATUS_SELF_POWERED;\r
- 565                           .loc 1 524 0\r
- 566 0062 1970                 strb    r1, [r3, #0]\r
- 567                   .LVL39:\r
- 528:.\Generated_Source\PSoC5/USBFS_std.c ****         ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
- 568                           .loc 1 528 0\r
- 569 0064 0122                 movs    r2, #1\r
- 570                   .LVL40:\r
- 571                   .L52:\r
- 475:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_Config(uint8 clearAltSetting) \r
- 572                           .loc 1 475 0\r
- 573 0066 C368                 ldr     r3, [r0, #12]\r
- 601:.\Generated_Source\PSoC5/USBFS_std.c ****                 for (cur_ep = 0u; cur_ep < ep; cur_ep++)\r
- 574                           .loc 1 601 0\r
- 575 0068 0021                 movs    r1, #0\r
- 576                   .LVL41:\r
- 475:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_Config(uint8 clearAltSetting) \r
- 577                           .loc 1 475 0\r
- 578 006a 0833                 adds    r3, r3, #8\r
- 579                   .LVL42:\r
- 580                   .L42:\r
- 601:.\Generated_Source\PSoC5/USBFS_std.c ****                 for (cur_ep = 0u; cur_ep < ep; cur_ep++)\r
- 581                           .loc 1 601 0 discriminator 1\r
- 582 006c A142                 cmp     r1, r4\r
- 583 006e 43D0                 beq     .L66\r
- 584                   .L51:\r
- 604:.\Generated_Source\PSoC5/USBFS_std.c ****                     if(i == (pEP->addr & USBFS_DIR_UNUSED))\r
- 585                           .loc 1 604 0\r
- 586 0070 13F8065C             ldrb    r5, [r3, #-6]   @ zero_extendqisi2\r
- 587 0074 05F07F06             and     r6, r5, #127\r
- 588 0078 B242                 cmp     r2, r6\r
- 589 007a 39D1                 bne     .L44\r
- 606:.\Generated_Source\PSoC5/USBFS_std.c ****                         if(USBFS_EP[i].bufferSize < pEP->bufferSize)\r
- 590                           .loc 1 606 0\r
- 591 007c 344E                 ldr     r6, .L68\r
- 592 007e 0C27                 movs    r7, #12\r
- 593 0080 07FB0266             mla     r6, r7, r2, r6\r
- 594 0084 B6F808E0             ldrh    lr, [r6, #8]\r
- 595 0088 33F8047C             ldrh    r7, [r3, #-4]\r
- 596 008c 1FFA8EFC             uxth    ip, lr\r
- 597 0090 BC45                 cmp     ip, r7\r
- 608:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].bufferSize = pEP->bufferSize;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 29\r
-\r
-\r
- 598                           .loc 1 608 0\r
- 599 0092 38BF                 it      cc\r
- 600 0094 3781                 strhcc  r7, [r6, #8]    @ movhi\r
- 611:.\Generated_Source\PSoC5/USBFS_std.c ****                         if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)\r
- 601                           .loc 1 611 0\r
- 602 0096 13F8086C             ldrb    r6, [r3, #-8]   @ zero_extendqisi2\r
- 603 009a 2E4F                 ldr     r7, .L68+4\r
- 604 009c BE5D                 ldrb    r6, [r7, r6]    @ zero_extendqisi2\r
- 605 009e 13F8077C             ldrb    r7, [r3, #-7]   @ zero_extendqisi2\r
- 606 00a2 B742                 cmp     r7, r6\r
- 607 00a4 24D1                 bne     .L44\r
- 613:.\Generated_Source\PSoC5/USBFS_std.c ****                             ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 608                           .loc 1 613 0\r
- 609 00a6 13F8056C             ldrb    r6, [r3, #-5]   @ zero_extendqisi2\r
- 614:.\Generated_Source\PSoC5/USBFS_std.c ****                             if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 610                           .loc 1 614 0\r
- 611 00aa 15F0800F             tst     r5, #128\r
- 612 00ae 284D                 ldr     r5, .L68\r
- 613 00b0 4FF00C07             mov     r7, #12\r
- 613:.\Generated_Source\PSoC5/USBFS_std.c ****                             ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
- 614                           .loc 1 613 0\r
- 615 00b4 06F00306             and     r6, r6, #3\r
- 616                   .LVL43:\r
- 617:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].apiEpState = USBFS_EVENT_PENDING;\r
- 617                           .loc 1 617 0\r
- 618 00b8 07FB0255             mla     r5, r7, r2, r5\r
- 614:.\Generated_Source\PSoC5/USBFS_std.c ****                             if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
- 619                           .loc 1 614 0\r
- 620 00bc 06D0                 beq     .L47\r
- 617:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].apiEpState = USBFS_EVENT_PENDING;\r
- 621                           .loc 1 617 0\r
- 622 00be 0127                 movs    r7, #1\r
- 623 00c0 6F70                 strb    r7, [r5, #1]\r
- 618:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 624                           .loc 1 618 0\r
- 625 00c2 BE42                 cmp     r6, r7\r
- 626 00c4 14BF                 ite     ne\r
- 627 00c6 0D26                 movne   r6, #13\r
- 628 00c8 0726                 moveq   r6, #7\r
- 629                   .LVL44:\r
- 630 00ca 05E0                 b       .L65\r
- 631                   .LVL45:\r
- 632                   .L47:\r
- 641:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].apiEpState = USBFS_NO_EVENT_PENDING;\r
- 633                           .loc 1 641 0\r
- 634 00cc 0027                 movs    r7, #0\r
- 635 00ce 6F70                 strb    r7, [r5, #1]\r
- 642:.\Generated_Source\PSoC5/USBFS_std.c ****                                 USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
- 636                           .loc 1 642 0\r
- 637 00d0 012E                 cmp     r6, #1\r
- 638 00d2 14BF                 ite     ne\r
- 639 00d4 0926                 movne   r6, #9\r
- 640 00d6 0526                 moveq   r6, #5\r
- 641                   .LVL46:\r
- 642                   .L65:\r
- 643 00d8 6E71                 strb    r6, [r5, #5]\r
- 662:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].addr = pEP->addr;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 30\r
-\r
-\r
- 644                           .loc 1 662 0\r
- 645 00da 0C25                 movs    r5, #12\r
- 646 00dc 5543                 muls    r5, r2, r5\r
- 647 00de 1C4E                 ldr     r6, .L68\r
- 648 00e0 13F806EC             ldrb    lr, [r3, #-6]   @ zero_extendqisi2\r
- 649 00e4 7719                 adds    r7, r6, r5\r
- 650 00e6 87F804E0             strb    lr, [r7, #4]\r
- 663:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_EP[i].attrib = pEP->attributes;\r
- 651                           .loc 1 663 0\r
- 652 00ea 13F8057C             ldrb    r7, [r3, #-5]   @ zero_extendqisi2\r
- 653 00ee 7755                 strb    r7, [r6, r5]\r
- 654                   .LVL47:\r
- 655                   .L44:\r
- 601:.\Generated_Source\PSoC5/USBFS_std.c ****                 for (cur_ep = 0u; cur_ep < ep; cur_ep++)\r
- 656                           .loc 1 601 0\r
- 657 00f0 0131                 adds    r1, r1, #1\r
- 658                   .LVL48:\r
- 659 00f2 C9B2                 uxtb    r1, r1\r
- 660                   .LVL49:\r
- 661 00f4 0833                 adds    r3, r3, #8\r
- 662 00f6 B9E7                 b       .L42\r
- 663                   .L66:\r
- 664 00f8 0132                 adds    r2, r2, #1\r
- 595:.\Generated_Source\PSoC5/USBFS_std.c ****             for (i = USBFS_EP1; i < USBFS_MAX_EP; i++)\r
- 665                           .loc 1 595 0\r
- 666 00fa 092A                 cmp     r2, #9\r
- 667 00fc B3D1                 bne     .L52\r
- 668                   .LVL50:\r
- 669 00fe C368                 ldr     r3, [r0, #12]\r
- 681:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 670                           .loc 1 681 0\r
- 671 0100 0022                 movs    r2, #0\r
- 672                   .LVL51:\r
- 673                   .L53:\r
- 674 0102 0833                 adds    r3, r3, #8\r
- 681:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 675                           .loc 1 681 0 is_stmt 0 discriminator 1\r
- 676 0104 A242                 cmp     r2, r4\r
- 677 0106 0DD0                 beq     .L67\r
- 678                   .L54:\r
- 684:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_EP[pEP->addr & USBFS_DIR_UNUSED].interface = pEP->interface;\r
- 679                           .loc 1 684 0 is_stmt 1 discriminator 2\r
- 680 0108 13F8065C             ldrb    r5, [r3, #-6]   @ zero_extendqisi2\r
- 681 010c 0C26                 movs    r6, #12\r
- 682 010e 05F07F01             and     r1, r5, #127\r
- 683 0112 0F4D                 ldr     r5, .L68\r
- 684 0114 13F8080C             ldrb    r0, [r3, #-8]   @ zero_extendqisi2\r
- 685 0118 06FB0151             mla     r1, r6, r1, r5\r
- 681:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 686                           .loc 1 681 0 discriminator 2\r
- 687 011c 0132                 adds    r2, r2, #1\r
- 688                   .LVL52:\r
- 684:.\Generated_Source\PSoC5/USBFS_std.c ****             USBFS_EP[pEP->addr & USBFS_DIR_UNUSED].interface = pEP->interface;\r
- 689                           .loc 1 684 0 discriminator 2\r
- 690 011e 8872                 strb    r0, [r1, #10]\r
- 681:.\Generated_Source\PSoC5/USBFS_std.c ****         for (i = 0u; i < ep; i++)\r
- 691                           .loc 1 681 0 discriminator 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 31\r
-\r
-\r
- 692 0120 D2B2                 uxtb    r2, r2\r
- 693                   .LVL53:\r
- 694 0122 EEE7                 b       .L53\r
- 695                   .L67:\r
- 688:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceClass = USBFS_GetInterfaceClassTablePtr();\r
- 696                           .loc 1 688 0\r
- 697 0124 FFF7FEFF             bl      USBFS_GetInterfaceClassTablePtr\r
- 698                   .LVL54:\r
- 699 0128 0E4B                 ldr     r3, .L68+20\r
- 483:.\Generated_Source\PSoC5/USBFS_std.c ****         uint16 buffCount = 0u;\r
- 700                           .loc 1 483 0\r
- 701 012a 0022                 movs    r2, #0\r
- 688:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceClass = USBFS_GetInterfaceClassTablePtr();\r
- 702                           .loc 1 688 0\r
- 703 012c 1860                 str     r0, [r3, #0]\r
- 704                   .LVL55:\r
- 705 012e 0123                 movs    r3, #1\r
- 706                   .LVL56:\r
- 707                   .L55:\r
- 694:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_EP[ep].buffOffset = buffCount;\r
- 708                           .loc 1 694 0 discriminator 2\r
- 709 0130 0749                 ldr     r1, .L68\r
- 710 0132 0C20                 movs    r0, #12\r
- 711 0134 00FB0310             mla     r0, r0, r3, r1\r
- 712 0138 C280                 strh    r2, [r0, #6]    @ movhi\r
- 695:.\Generated_Source\PSoC5/USBFS_std.c ****                  buffCount += USBFS_EP[ep].bufferSize;\r
- 713                           .loc 1 695 0 discriminator 2\r
- 714 013a 0189                 ldrh    r1, [r0, #8]\r
- 715 013c 0133                 adds    r3, r3, #1\r
- 716 013e 5218                 adds    r2, r2, r1\r
- 692:.\Generated_Source\PSoC5/USBFS_std.c ****             for (ep = USBFS_EP1; ep < USBFS_MAX_EP; ep++)\r
- 717                           .loc 1 692 0 discriminator 2\r
- 718 0140 092B                 cmp     r3, #9\r
- 695:.\Generated_Source\PSoC5/USBFS_std.c ****                  buffCount += USBFS_EP[ep].bufferSize;\r
- 719                           .loc 1 695 0 discriminator 2\r
- 720 0142 92B2                 uxth    r2, r2\r
- 721                   .LVL57:\r
- 692:.\Generated_Source\PSoC5/USBFS_std.c ****             for (ep = USBFS_EP1; ep < USBFS_MAX_EP; ep++)\r
- 722                           .loc 1 692 0 discriminator 2\r
- 723 0144 F4D1                 bne     .L55\r
- 702:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 724                           .loc 1 702 0\r
- 725 0146 BDE8F840             pop     {r3, r4, r5, r6, r7, lr}\r
- 700:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_ConfigReg();\r
- 726                           .loc 1 700 0\r
- 727 014a FFF7FEBF             b       USBFS_ConfigReg\r
- 728                   .LVL58:\r
- 729                   .L36:\r
- 730 014e F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 731                   .L69:\r
- 732                           .align  2\r
- 733                   .L68:\r
- 734 0150 00000000             .word   USBFS_EP\r
- 735 0154 00000000             .word   USBFS_interfaceSetting\r
- 736 0158 00000000             .word   USBFS_interfaceSetting_last\r
- 737 015c 00000000             .word   USBFS_configuration\r
- 738 0160 00000000             .word   USBFS_deviceStatus\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 32\r
-\r
-\r
- 739 0164 00000000             .word   USBFS_interfaceClass\r
- 740                           .cfi_endproc\r
- 741                   .LFE2:\r
- 742                           .size   USBFS_Config, .-USBFS_Config\r
- 743                           .section        .text.USBFS_TerminateEP,"ax",%progbits\r
- 744                           .align  1\r
- 745                           .global USBFS_TerminateEP\r
- 746                           .thumb\r
- 747                           .thumb_func\r
- 748                           .type   USBFS_TerminateEP, %function\r
- 749                   USBFS_TerminateEP:\r
- 750                   .LFB7:\r
- 914:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 915:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 916:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 917:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_TerminateEP\r
- 918:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 919:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 920:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 921:.\Generated_Source\PSoC5/USBFS_std.c **** *  This function terminates the specified USBFS endpoint.\r
- 922:.\Generated_Source\PSoC5/USBFS_std.c **** *  This function should be used before endpoint reconfiguration.\r
- 923:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 924:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 925:.\Generated_Source\PSoC5/USBFS_std.c **** *  Endpoint number.\r
- 926:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 927:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 928:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 929:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 930:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
- 931:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
- 932:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 933:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 934:.\Generated_Source\PSoC5/USBFS_std.c **** void USBFS_TerminateEP(uint8 ep) \r
- 935:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 751                           .loc 1 935 0\r
- 752                           .cfi_startproc\r
- 753                           @ args = 0, pretend = 0, frame = 0\r
- 754                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 755                           @ link register save eliminated.\r
- 756                   .LVL59:\r
- 936:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ri;\r
- 937:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 938:.\Generated_Source\PSoC5/USBFS_std.c ****     ep &= USBFS_DIR_UNUSED;\r
- 757                           .loc 1 938 0\r
- 758 0000 00F07F00             and     r0, r0, #127\r
- 759                   .LVL60:\r
- 939:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 760                           .loc 1 939 0\r
- 761 0004 421E                 subs    r2, r0, #1\r
- 762 0006 D1B2                 uxtb    r1, r2\r
- 763                   .LVL61:\r
- 940:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 941:.\Generated_Source\PSoC5/USBFS_std.c ****     if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
- 764                           .loc 1 941 0\r
- 765 0008 0729                 cmp     r1, #7\r
- 766 000a 14D8                 bhi     .L70\r
- 939:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 33\r
-\r
-\r
- 767                           .loc 1 939 0\r
- 768 000c 0B01                 lsls    r3, r1, #4\r
- 769 000e DAB2                 uxtb    r2, r3\r
- 942:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 943:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Set the endpoint Halt */\r
- 944:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState |= (USBFS_ENDPOINT_STATUS_HALT);\r
- 770                           .loc 1 944 0\r
- 771 0010 094B                 ldr     r3, .L74\r
- 772 0012 0C21                 movs    r1, #12\r
- 773                   .LVL62:\r
- 774 0014 01FB0030             mla     r0, r1, r0, r3\r
- 775                   .LVL63:\r
- 776 0018 8378                 ldrb    r3, [r0, #2]    @ zero_extendqisi2\r
- 777 001a 43F00103             orr     r3, r3, #1\r
- 778 001e 8370                 strb    r3, [r0, #2]\r
- 945:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 946:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Clear the data toggle */\r
- 947:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 779                           .loc 1 947 0\r
- 780 0020 0023                 movs    r3, #0\r
- 781 0022 C370                 strb    r3, [r0, #3]\r
- 948:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_ALLOWED;\r
- 782                           .loc 1 948 0\r
- 783 0024 0223                 movs    r3, #2\r
- 784 0026 4370                 strb    r3, [r0, #1]\r
- 949:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 950:.\Generated_Source\PSoC5/USBFS_std.c ****         if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
- 785                           .loc 1 950 0\r
- 786 0028 0079                 ldrb    r0, [r0, #4]    @ zero_extendqisi2\r
- 787 002a 044B                 ldr     r3, .L74+4\r
- 788 002c 10F0800F             tst     r0, #128\r
- 951:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 952:.\Generated_Source\PSoC5/USBFS_std.c ****             /* IN Endpoint */\r
- 953:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN);\r
- 954:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 955:.\Generated_Source\PSoC5/USBFS_std.c ****         else\r
- 956:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
- 957:.\Generated_Source\PSoC5/USBFS_std.c ****             /* OUT Endpoint */\r
- 958:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
- 789                           .loc 1 958 0\r
- 790 0030 08BF                 it      eq\r
- 791 0032 0821                 moveq   r1, #8\r
- 792 0034 D154                 strb    r1, [r2, r3]\r
- 793                   .L70:\r
- 794 0036 7047                 bx      lr\r
- 795                   .L75:\r
- 796                           .align  2\r
- 797                   .L74:\r
- 798 0038 00000000             .word   USBFS_EP\r
- 799 003c 0E600040             .word   1073766414\r
- 800                           .cfi_endproc\r
- 801                   .LFE7:\r
- 802                           .size   USBFS_TerminateEP, .-USBFS_TerminateEP\r
- 803                           .section        .text.USBFS_SetEndpointHalt,"ax",%progbits\r
- 804                           .align  1\r
- 805                           .global USBFS_SetEndpointHalt\r
- 806                           .thumb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 34\r
-\r
-\r
- 807                           .thumb_func\r
- 808                           .type   USBFS_SetEndpointHalt, %function\r
- 809                   USBFS_SetEndpointHalt:\r
- 810                   .LFB8:\r
- 959:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
- 960:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
- 961:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 962:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 963:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 964:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
- 965:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_SetEndpointHalt\r
- 966:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
- 967:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 968:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
- 969:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine handles set endpoint halt.\r
- 970:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 971:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
- 972:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
- 973:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 974:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
- 975:.\Generated_Source\PSoC5/USBFS_std.c **** *  requestHandled.\r
- 976:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 977:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
- 978:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
- 979:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
- 980:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
- 981:.\Generated_Source\PSoC5/USBFS_std.c **** uint8 USBFS_SetEndpointHalt(void) \r
- 982:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 811                           .loc 1 982 0\r
- 812                           .cfi_startproc\r
- 813                           @ args = 0, pretend = 0, frame = 0\r
- 814                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 815                           @ link register save eliminated.\r
- 816                   .LVL64:\r
- 983:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep;\r
- 984:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ri;\r
- 985:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 requestHandled = USBFS_FALSE;\r
- 986:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 987:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Set endpoint halt */\r
- 988:.\Generated_Source\PSoC5/USBFS_std.c ****     ep = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;\r
- 817                           .loc 1 988 0\r
- 818 0000 124B                 ldr     r3, .L81\r
- 819 0002 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 820 0004 01F07F01             and     r1, r1, #127\r
- 821                   .LVL65:\r
- 989:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 822                           .loc 1 989 0\r
- 823 0008 4A1E                 subs    r2, r1, #1\r
- 824 000a D0B2                 uxtb    r0, r2\r
- 825                   .LVL66:\r
- 990:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 991:.\Generated_Source\PSoC5/USBFS_std.c ****     if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
- 826                           .loc 1 991 0\r
- 827 000c 0728                 cmp     r0, #7\r
- 828 000e 1AD8                 bhi     .L77\r
- 989:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 829                           .loc 1 989 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 35\r
-\r
-\r
- 830 0010 0301                 lsls    r3, r0, #4\r
- 831 0012 DAB2                 uxtb    r2, r3\r
- 992:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
- 993:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Set the endpoint Halt */\r
- 994:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState |= (USBFS_ENDPOINT_STATUS_HALT);\r
- 832                           .loc 1 994 0\r
- 833 0014 0E4B                 ldr     r3, .L81+4\r
- 834 0016 0C20                 movs    r0, #12\r
- 835                   .LVL67:\r
- 836 0018 00FB0130             mla     r0, r0, r1, r3\r
- 837 001c 8178                 ldrb    r1, [r0, #2]    @ zero_extendqisi2\r
- 838                   .LVL68:\r
- 839 001e 41F00103             orr     r3, r1, #1\r
- 995:.\Generated_Source\PSoC5/USBFS_std.c **** \r
- 996:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Clear the data toggle */\r
- 997:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 840                           .loc 1 997 0\r
- 841 0022 0021                 movs    r1, #0\r
- 994:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState |= (USBFS_ENDPOINT_STATUS_HALT);\r
- 842                           .loc 1 994 0\r
- 843 0024 8370                 strb    r3, [r0, #2]\r
- 844                           .loc 1 997 0\r
- 845 0026 C170                 strb    r1, [r0, #3]\r
- 998:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].apiEpState |= USBFS_NO_EVENT_ALLOWED;\r
- 846                           .loc 1 998 0\r
- 847 0028 4378                 ldrb    r3, [r0, #1]    @ zero_extendqisi2\r
- 848 002a 43F00201             orr     r1, r3, #2\r
- 849 002e 4170                 strb    r1, [r0, #1]\r
- 999:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1000:.\Generated_Source\PSoC5/USBFS_std.c ****         if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
- 850                           .loc 1 1000 0\r
- 851 0030 0079                 ldrb    r0, [r0, #4]    @ zero_extendqisi2\r
- 852 0032 084B                 ldr     r3, .L81+8\r
- 853 0034 10F0800F             tst     r0, #128\r
- 854 0038 01D0                 beq     .L78\r
-1001:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
-1002:.\Generated_Source\PSoC5/USBFS_std.c ****             /* IN Endpoint */\r
-1003:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_STALL_DATA_EP |\r
- 855                           .loc 1 1003 0\r
- 856 003a 8D21                 movs    r1, #141\r
- 857 003c 00E0                 b       .L80\r
- 858                   .L78:\r
-1004:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                USBFS_MODE_ACK_IN);\r
-1005:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
-1006:.\Generated_Source\PSoC5/USBFS_std.c ****         else\r
-1007:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
-1008:.\Generated_Source\PSoC5/USBFS_std.c ****             /* OUT Endpoint */\r
-1009:.\Generated_Source\PSoC5/USBFS_std.c ****             CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_STALL_DATA_EP |\r
- 859                           .loc 1 1009 0\r
- 860 003e 8921                 movs    r1, #137\r
- 861                   .L80:\r
- 862 0040 D154                 strb    r1, [r2, r3]\r
-1010:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                USBFS_MODE_ACK_OUT);\r
-1011:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
-1012:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_InitNoDataControlTransfer();\r
-1013:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
-1014:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 36\r
-\r
-\r
-1015:.\Generated_Source\PSoC5/USBFS_std.c ****     return(requestHandled);\r
-1016:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 863                           .loc 1 1016 0\r
-1012:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_InitNoDataControlTransfer();\r
- 864                           .loc 1 1012 0\r
- 865 0042 FFF7FEBF             b       USBFS_InitNoDataControlTransfer\r
- 866                   .LVL69:\r
- 867                   .L77:\r
- 868                           .loc 1 1016 0\r
- 869 0046 0020                 movs    r0, #0\r
- 870                   .LVL70:\r
- 871 0048 7047                 bx      lr\r
- 872                   .L82:\r
- 873 004a 00BF                 .align  2\r
- 874                   .L81:\r
- 875 004c 04600040             .word   1073766404\r
- 876 0050 00000000             .word   USBFS_EP\r
- 877 0054 0E600040             .word   1073766414\r
- 878                           .cfi_endproc\r
- 879                   .LFE8:\r
- 880                           .size   USBFS_SetEndpointHalt, .-USBFS_SetEndpointHalt\r
- 881                           .section        .text.USBFS_ClearEndpointHalt,"ax",%progbits\r
- 882                           .align  1\r
- 883                           .global USBFS_ClearEndpointHalt\r
- 884                           .thumb\r
- 885                           .thumb_func\r
- 886                           .type   USBFS_ClearEndpointHalt, %function\r
- 887                   USBFS_ClearEndpointHalt:\r
- 888                   .LFB9:\r
-1017:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1018:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1019:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
-1020:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_ClearEndpointHalt\r
-1021:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
-1022:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1023:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
-1024:.\Generated_Source\PSoC5/USBFS_std.c **** *  This routine handles clear endpoint halt.\r
-1025:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1026:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
-1027:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
-1028:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1029:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
-1030:.\Generated_Source\PSoC5/USBFS_std.c **** *  requestHandled.\r
-1031:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1032:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
-1033:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
-1034:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1035:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
-1036:.\Generated_Source\PSoC5/USBFS_std.c **** uint8 USBFS_ClearEndpointHalt(void) \r
-1037:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 889                           .loc 1 1037 0\r
- 890                           .cfi_startproc\r
- 891                           @ args = 0, pretend = 0, frame = 0\r
- 892                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 893                   .LVL71:\r
- 894 0000 10B5                 push    {r4, lr}\r
- 895                   .LCFI4:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 37\r
-\r
-\r
- 896                           .cfi_def_cfa_offset 8\r
- 897                           .cfi_offset 4, -8\r
- 898                           .cfi_offset 14, -4\r
-1038:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ep;\r
-1039:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 ri;\r
-1040:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 requestHandled = USBFS_FALSE;\r
-1041:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1042:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Clear endpoint halt */\r
-1043:.\Generated_Source\PSoC5/USBFS_std.c ****     ep = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;\r
- 899                           .loc 1 1043 0\r
- 900 0002 1A4B                 ldr     r3, .L90\r
- 901 0004 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 902 0006 00F07F03             and     r3, r0, #127\r
- 903                   .LVL72:\r
-1044:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 904                           .loc 1 1044 0\r
- 905 000a 5A1E                 subs    r2, r3, #1\r
- 906 000c D2B2                 uxtb    r2, r2\r
- 907                   .LVL73:\r
-1045:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1046:.\Generated_Source\PSoC5/USBFS_std.c ****     if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
- 908                           .loc 1 1046 0\r
- 909 000e 072A                 cmp     r2, #7\r
- 910 0010 2AD8                 bhi     .L84\r
-1047:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
-1048:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Clear the endpoint Halt */\r
-1049:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].hwEpState &= (uint8)~(USBFS_ENDPOINT_STATUS_HALT);\r
- 911                           .loc 1 1049 0\r
- 912 0012 1749                 ldr     r1, .L90+4\r
- 913 0014 0C20                 movs    r0, #12\r
- 914 0016 00FB0313             mla     r3, r0, r3, r1\r
- 915                   .LVL74:\r
- 916 001a 9C78                 ldrb    r4, [r3, #2]    @ zero_extendqisi2\r
-1044:.\Generated_Source\PSoC5/USBFS_std.c ****     ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
- 917                           .loc 1 1044 0\r
- 918 001c 1201                 lsls    r2, r2, #4\r
- 919                   .LVL75:\r
- 920                           .loc 1 1049 0\r
- 921 001e 04F0FE01             and     r1, r4, #254\r
- 922 0022 9970                 strb    r1, [r3, #2]\r
-1050:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1051:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Clear the data toggle */\r
-1052:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 923                           .loc 1 1052 0\r
- 924 0024 0024                 movs    r4, #0\r
-1053:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Clear toggle bit for already armed packet */\r
-1054:.\Generated_Source\PSoC5/USBFS_std.c ****         CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri), CY_GET_REG8(\r
- 925                           .loc 1 1054 0\r
- 926 0026 1349                 ldr     r1, .L90+8\r
-1052:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].epToggle = 0u;\r
- 927                           .loc 1 1052 0\r
- 928 0028 DC70                 strb    r4, [r3, #3]\r
- 929                           .loc 1 1054 0\r
- 930 002a D2B2                 uxtb    r2, r2\r
- 931 002c 545C                 ldrb    r4, [r2, r1]    @ zero_extendqisi2\r
- 932 002e 04F07F04             and     r4, r4, #127\r
- 933 0032 5454                 strb    r4, [r2, r1]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 38\r
-\r
-\r
-1055:.\Generated_Source\PSoC5/USBFS_std.c ****                     (reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri)) & (uint8)~USBFS_EPX_CNT_DATA_TOGGLE);\r
-1056:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Return API State as it was defined before */\r
-1057:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_EP[ep].apiEpState &= (uint8)~USBFS_NO_EVENT_ALLOWED;\r
- 934                           .loc 1 1057 0\r
- 935 0034 5978                 ldrb    r1, [r3, #1]    @ zero_extendqisi2\r
- 936 0036 01F0FD01             and     r1, r1, #253\r
- 937 003a 5970                 strb    r1, [r3, #1]\r
-1058:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1059:.\Generated_Source\PSoC5/USBFS_std.c ****         if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
- 938                           .loc 1 1059 0\r
- 939 003c 1979                 ldrb    r1, [r3, #4]    @ zero_extendqisi2\r
-1060:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
-1061:.\Generated_Source\PSoC5/USBFS_std.c ****             /* IN Endpoint */\r
-1062:.\Generated_Source\PSoC5/USBFS_std.c ****             if(USBFS_EP[ep].apiEpState == USBFS_IN_BUFFER_EMPTY)\r
- 940                           .loc 1 1062 0\r
- 941 003e 5B78                 ldrb    r3, [r3, #1]    @ zero_extendqisi2\r
-1059:.\Generated_Source\PSoC5/USBFS_std.c ****         if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
- 942                           .loc 1 1059 0\r
- 943 0040 11F0800F             tst     r1, #128\r
- 944 0044 0C49                 ldr     r1, .L90+12\r
- 945 0046 05D0                 beq     .L85\r
- 946                           .loc 1 1062 0\r
- 947 0048 012B                 cmp     r3, #1\r
- 948 004a 01D1                 bne     .L86\r
-1063:.\Generated_Source\PSoC5/USBFS_std.c ****             {       /* Wait for next packet from application */\r
-1064:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN);\r
- 949                           .loc 1 1064 0\r
- 950 004c 5054                 strb    r0, [r2, r1]\r
- 951 004e 07E0                 b       .L87\r
- 952                   .L86:\r
-1065:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
-1066:.\Generated_Source\PSoC5/USBFS_std.c ****             else    /* Continue armed transfer */\r
-1067:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
-1068:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_ACK_IN);\r
- 953                           .loc 1 1068 0\r
- 954 0050 0D20                 movs    r0, #13\r
- 955 0052 04E0                 b       .L89\r
- 956                   .L85:\r
-1069:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
-1070:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
-1071:.\Generated_Source\PSoC5/USBFS_std.c ****         else\r
-1072:.\Generated_Source\PSoC5/USBFS_std.c ****         {\r
-1073:.\Generated_Source\PSoC5/USBFS_std.c ****             /* OUT Endpoint */\r
-1074:.\Generated_Source\PSoC5/USBFS_std.c ****             if(USBFS_EP[ep].apiEpState == USBFS_OUT_BUFFER_FULL)\r
- 957                           .loc 1 1074 0\r
- 958 0054 012B                 cmp     r3, #1\r
- 959 0056 01D1                 bne     .L88\r
-1075:.\Generated_Source\PSoC5/USBFS_std.c ****             {       /* Allow application to read full buffer */\r
-1076:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
- 960                           .loc 1 1076 0\r
- 961 0058 0820                 movs    r0, #8\r
- 962 005a 00E0                 b       .L89\r
- 963                   .L88:\r
-1077:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
-1078:.\Generated_Source\PSoC5/USBFS_std.c ****             else    /* Mark endpoint as empty, so it will be reloaded */\r
-1079:.\Generated_Source\PSoC5/USBFS_std.c ****             {\r
-1080:.\Generated_Source\PSoC5/USBFS_std.c ****                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_ACK_OUT);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 39\r
-\r
-\r
- 964                           .loc 1 1080 0\r
- 965 005c 0920                 movs    r0, #9\r
- 966                   .L89:\r
- 967 005e 5054                 strb    r0, [r2, r1]\r
- 968                   .L87:\r
-1081:.\Generated_Source\PSoC5/USBFS_std.c ****             }\r
-1082:.\Generated_Source\PSoC5/USBFS_std.c ****         }\r
-1083:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_InitNoDataControlTransfer();\r
-1084:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
-1085:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1086:.\Generated_Source\PSoC5/USBFS_std.c ****     return(requestHandled);\r
-1087:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 969                           .loc 1 1087 0\r
- 970 0060 BDE81040             pop     {r4, lr}\r
-1083:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_InitNoDataControlTransfer();\r
- 971                           .loc 1 1083 0\r
- 972 0064 FFF7FEBF             b       USBFS_InitNoDataControlTransfer\r
- 973                   .LVL76:\r
- 974                   .L84:\r
- 975                           .loc 1 1087 0\r
- 976 0068 0020                 movs    r0, #0\r
- 977 006a 10BD                 pop     {r4, pc}\r
- 978                   .L91:\r
- 979                           .align  2\r
- 980                   .L90:\r
- 981 006c 04600040             .word   1073766404\r
- 982 0070 00000000             .word   USBFS_EP\r
- 983 0074 0C600040             .word   1073766412\r
- 984 0078 0E600040             .word   1073766414\r
- 985                           .cfi_endproc\r
- 986                   .LFE9:\r
- 987                           .size   USBFS_ClearEndpointHalt, .-USBFS_ClearEndpointHalt\r
- 988                           .section        .text.USBFS_ValidateAlternateSetting,"ax",%progbits\r
- 989                           .align  1\r
- 990                           .global USBFS_ValidateAlternateSetting\r
- 991                           .thumb\r
- 992                           .thumb_func\r
- 993                           .type   USBFS_ValidateAlternateSetting, %function\r
- 994                   USBFS_ValidateAlternateSetting:\r
- 995                   .LFB10:\r
-1088:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1089:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1090:.\Generated_Source\PSoC5/USBFS_std.c **** /*******************************************************************************\r
-1091:.\Generated_Source\PSoC5/USBFS_std.c **** * Function Name: USBFS_ValidateAlternateSetting\r
-1092:.\Generated_Source\PSoC5/USBFS_std.c **** ********************************************************************************\r
-1093:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1094:.\Generated_Source\PSoC5/USBFS_std.c **** * Summary:\r
-1095:.\Generated_Source\PSoC5/USBFS_std.c **** *  Validates (and records) a SET INTERFACE request.\r
-1096:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1097:.\Generated_Source\PSoC5/USBFS_std.c **** * Parameters:\r
-1098:.\Generated_Source\PSoC5/USBFS_std.c **** *  None.\r
-1099:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1100:.\Generated_Source\PSoC5/USBFS_std.c **** * Return:\r
-1101:.\Generated_Source\PSoC5/USBFS_std.c **** *  requestHandled.\r
-1102:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1103:.\Generated_Source\PSoC5/USBFS_std.c **** * Reentrant:\r
-1104:.\Generated_Source\PSoC5/USBFS_std.c **** *  No.\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 40\r
-\r
-\r
-1105:.\Generated_Source\PSoC5/USBFS_std.c **** *\r
-1106:.\Generated_Source\PSoC5/USBFS_std.c **** *******************************************************************************/\r
-1107:.\Generated_Source\PSoC5/USBFS_std.c **** uint8 USBFS_ValidateAlternateSetting(void) \r
-1108:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 996                           .loc 1 1108 0\r
- 997                           .cfi_startproc\r
- 998                           @ args = 0, pretend = 0, frame = 0\r
- 999                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 1000                  .LVL77:\r
- 1001 0000 10B5                push    {r4, lr}\r
- 1002                  .LCFI5:\r
- 1003                          .cfi_def_cfa_offset 8\r
- 1004                          .cfi_offset 4, -8\r
- 1005                          .cfi_offset 14, -4\r
-1109:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 requestHandled = USBFS_TRUE;\r
-1110:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 interfaceNum;\r
-1111:.\Generated_Source\PSoC5/USBFS_std.c ****     const T_USBFS_LUT CYCODE *pTmp;\r
-1112:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 currentInterfacesNum;\r
-1113:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1114:.\Generated_Source\PSoC5/USBFS_std.c ****     interfaceNum = CY_GET_REG8(USBFS_wIndexLo);\r
- 1006                          .loc 1 1114 0\r
- 1007 0002 0C4B                ldr     r3, .L96\r
-1115:.\Generated_Source\PSoC5/USBFS_std.c ****     /* Validate interface setting, stall if invalid. */\r
-1116:.\Generated_Source\PSoC5/USBFS_std.c ****     pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
- 1008                          .loc 1 1116 0\r
- 1009 0004 0C48                ldr     r0, .L96+4\r
-1114:.\Generated_Source\PSoC5/USBFS_std.c ****     interfaceNum = CY_GET_REG8(USBFS_wIndexLo);\r
- 1010                          .loc 1 1114 0\r
- 1011 0006 1C78                ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 1012                  .LVL78:\r
- 1013                          .loc 1 1116 0\r
- 1014 0008 0178                ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 1015 000a 4A1E                subs    r2, r1, #1\r
- 1016 000c D0B2                uxtb    r0, r2\r
- 1017 000e FFF7FEFF            bl      USBFS_GetConfigTablePtr\r
- 1018                  .LVL79:\r
-1117:.\Generated_Source\PSoC5/USBFS_std.c ****     currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];\r
- 1019                          .loc 1 1117 0\r
- 1020 0012 4368                ldr     r3, [r0, #4]\r
-1118:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1119:.\Generated_Source\PSoC5/USBFS_std.c ****     if((interfaceNum >= currentInterfacesNum) || (interfaceNum >= USBFS_MAX_INTERFACES_NUMBER))\r
- 1021                          .loc 1 1119 0\r
- 1022 0014 1879                ldrb    r0, [r3, #4]    @ zero_extendqisi2\r
- 1023                  .LVL80:\r
- 1024 0016 A042                cmp     r0, r4\r
- 1025 0018 09D9                bls     .L95\r
- 1026                          .loc 1 1119 0 is_stmt 0 discriminator 1\r
- 1027 001a 44B9                cbnz    r4, .L95\r
-1120:.\Generated_Source\PSoC5/USBFS_std.c ****     {   /* Wrong interface number */\r
-1121:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_FALSE;\r
-1122:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
-1123:.\Generated_Source\PSoC5/USBFS_std.c ****     else\r
-1124:.\Generated_Source\PSoC5/USBFS_std.c ****     {\r
-1125:.\Generated_Source\PSoC5/USBFS_std.c ****         /* Save current Alt setting to find out the difference in Config() function */\r
-1126:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceSetting_last[interfaceNum] = USBFS_interfaceSetting[interfaceNum];\r
- 1028                          .loc 1 1126 0 is_stmt 1\r
- 1029 001c 074B                ldr     r3, .L96+8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 41\r
-\r
-\r
- 1030                  .LVL81:\r
- 1031 001e 084A                ldr     r2, .L96+12\r
- 1032 0020 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
-1127:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceSetting[interfaceNum] = CY_GET_REG8(USBFS_wValueLo);\r
- 1033                          .loc 1 1127 0\r
- 1034 0022 0848                ldr     r0, .L96+16\r
- 1035                  .LVL82:\r
-1126:.\Generated_Source\PSoC5/USBFS_std.c ****         USBFS_interfaceSetting_last[interfaceNum] = USBFS_interfaceSetting[interfaceNum];\r
- 1036                          .loc 1 1126 0\r
- 1037 0024 1170                strb    r1, [r2, #0]\r
- 1038                          .loc 1 1127 0\r
- 1039 0026 0178                ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
-1109:.\Generated_Source\PSoC5/USBFS_std.c ****     uint8 requestHandled = USBFS_TRUE;\r
- 1040                          .loc 1 1109 0\r
- 1041 0028 0120                movs    r0, #1\r
- 1042                          .loc 1 1127 0\r
- 1043 002a 1970                strb    r1, [r3, #0]\r
- 1044 002c 10BD                pop     {r4, pc}\r
- 1045                  .LVL83:\r
- 1046                  .L95:\r
-1121:.\Generated_Source\PSoC5/USBFS_std.c ****         requestHandled = USBFS_FALSE;\r
- 1047                          .loc 1 1121 0\r
- 1048 002e 0020                movs    r0, #0\r
- 1049                  .LVL84:\r
-1128:.\Generated_Source\PSoC5/USBFS_std.c ****     }\r
-1129:.\Generated_Source\PSoC5/USBFS_std.c **** \r
-1130:.\Generated_Source\PSoC5/USBFS_std.c ****     return (requestHandled);\r
-1131:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1050                          .loc 1 1131 0\r
- 1051 0030 10BD                pop     {r4, pc}\r
- 1052                  .L97:\r
- 1053 0032 00BF                .align  2\r
- 1054                  .L96:\r
- 1055 0034 04600040            .word   1073766404\r
- 1056 0038 00000000            .word   USBFS_configuration\r
- 1057 003c 00000000            .word   USBFS_interfaceSetting\r
- 1058 0040 00000000            .word   USBFS_interfaceSetting_last\r
- 1059 0044 02600040            .word   1073766402\r
- 1060                          .cfi_endproc\r
- 1061                  .LFE10:\r
- 1062                          .size   USBFS_ValidateAlternateSetting, .-USBFS_ValidateAlternateSetting\r
- 1063                          .section        .text.USBFS_HandleStandardRqst,"ax",%progbits\r
- 1064                          .align  1\r
- 1065                          .global USBFS_HandleStandardRqst\r
- 1066                          .thumb\r
- 1067                          .thumb_func\r
- 1068                          .type   USBFS_HandleStandardRqst, %function\r
- 1069                  USBFS_HandleStandardRqst:\r
- 1070                  .LFB0:\r
-  90:.\Generated_Source\PSoC5/USBFS_std.c **** {\r
- 1071                          .loc 1 90 0\r
- 1072                          .cfi_startproc\r
- 1073                          @ args = 0, pretend = 0, frame = 0\r
- 1074                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1075                  .LVL85:\r
- 1076 0000 10B5                push    {r4, lr}\r
- 1077                  .LCFI6:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 42\r
-\r
-\r
- 1078                          .cfi_def_cfa_offset 8\r
- 1079                          .cfi_offset 4, -8\r
- 1080                          .cfi_offset 14, -4\r
- 102:.\Generated_Source\PSoC5/USBFS_std.c ****     USBFS_currentTD.count = 0u;\r
- 1081                          .loc 1 102 0\r
- 1082 0002 7C4B                ldr     r3, .L151\r
- 1083 0004 0022                movs    r2, #0\r
- 1084 0006 1A80                strh    r2, [r3, #0]    @ movhi\r
- 104:.\Generated_Source\PSoC5/USBFS_std.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
- 1085                          .loc 1 104 0\r
- 1086 0008 7B4A                ldr     r2, .L151+4\r
- 1087 000a 7C48                ldr     r0, .L151+8\r
- 1088 000c 1178                ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 1089 000e 11F0800F            tst     r1, #128\r
- 1090 0012 00F08A80            beq     .L99\r
- 107:.\Generated_Source\PSoC5/USBFS_std.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 1091                          .loc 1 107 0\r
- 1092 0016 0178                ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 1093 0018 0A29                cmp     r1, #10\r
- 1094 001a 00F22281            bhi     .L100\r
- 1095 001e DFE811F0            tbh     [pc, r1, lsl #1]\r
- 1096                  .L105:\r
- 1097 0022 5800                .2byte  (.L101-.L105)/2\r
- 1098 0024 2001                .2byte  (.L100-.L105)/2\r
- 1099 0026 2001                .2byte  (.L100-.L105)/2\r
- 1100 0028 2001                .2byte  (.L100-.L105)/2\r
- 1101 002a 2001                .2byte  (.L100-.L105)/2\r
- 1102 002c 2001                .2byte  (.L100-.L105)/2\r
- 1103 002e 0B00                .2byte  (.L102-.L105)/2\r
- 1104 0030 2001                .2byte  (.L100-.L105)/2\r
- 1105 0032 7800                .2byte  (.L103-.L105)/2\r
- 1106 0034 2001                .2byte  (.L100-.L105)/2\r
- 1107 0036 7C00                .2byte  (.L104-.L105)/2\r
- 1108                  .L102:\r
- 110:.\Generated_Source\PSoC5/USBFS_std.c ****                 if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_DEVICE)\r
- 1109                          .loc 1 110 0\r
- 1110 0038 714B                ldr     r3, .L151+12\r
- 1111 003a 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1112 003c 0129                cmp     r1, #1\r
- 1113 003e 0AD1                bne     .L106\r
- 1114                  .LBB4:\r
- 1115                  .LBB5:\r
- 882:.\Generated_Source\PSoC5/USBFS_std.c ****     return( (const T_USBFS_LUT CYCODE *) USBFS_TABLE[USBFS_device].p_list );\r
- 1116                          .loc 1 882 0\r
- 1117 0040 7048                ldr     r0, .L151+16\r
- 1118 0042 7149                ldr     r1, .L151+20\r
- 1119 0044 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 1120 0046 01EBC203            add     r3, r1, r2, lsl #3\r
- 1121                  .LBE5:\r
- 1122                  .LBE4:\r
- 113:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
- 1123                          .loc 1 113 0\r
- 1124 004a 5868                ldr     r0, [r3, #4]\r
- 114:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.count = USBFS_DEVICE_DESCR_LENGTH;\r
- 1125                          .loc 1 114 0\r
- 1126 004c 1223                movs    r3, #18\r
- 113:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 43\r
-\r
-\r
- 1127                          .loc 1 113 0\r
- 1128 004e 4268                ldr     r2, [r0, #4]\r
- 1129 0050 6848                ldr     r0, .L151\r
- 1130 0052 4260                str     r2, [r0, #4]\r
- 1131 0054 0FE0                b       .L142\r
- 1132                  .L106:\r
- 117:.\Generated_Source\PSoC5/USBFS_std.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_CONFIG)\r
- 1133                          .loc 1 117 0\r
- 1134 0056 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1135 0058 0228                cmp     r0, #2\r
- 1136 005a 11D1                bne     .L107\r
- 119:.\Generated_Source\PSoC5/USBFS_std.c ****                     pTmp = USBFS_GetConfigTablePtr(CY_GET_REG8(USBFS_wValueLo));\r
- 1137                          .loc 1 119 0\r
- 1138 005c 6B4B                ldr     r3, .L151+24\r
- 1139 005e 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1140 0060 FFF7FEFF            bl      USBFS_GetConfigTablePtr\r
- 1141                  .LVL86:\r
- 120:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
- 1142                          .loc 1 120 0\r
- 1143 0064 4268                ldr     r2, [r0, #4]\r
- 1144 0066 6348                ldr     r0, .L151\r
- 1145                  .LVL87:\r
- 1146 0068 4260                str     r2, [r0, #4]\r
- 121:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \\r
- 1147                          .loc 1 121 0\r
- 1148 006a 4168                ldr     r1, [r0, #4]\r
- 1149 006c CB78                ldrb    r3, [r1, #3]    @ zero_extendqisi2\r
- 123:.\Generated_Source\PSoC5/USBFS_std.c ****                                      (USBFS_currentTD.pData)[USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW];\r
- 1150                          .loc 1 123 0\r
- 1151 006e 4268                ldr     r2, [r0, #4]\r
- 1152 0070 9178                ldrb    r1, [r2, #2]    @ zero_extendqisi2\r
- 121:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \\r
- 1153                          .loc 1 121 0\r
- 1154 0072 41EA0323            orr     r3, r1, r3, lsl #8\r
- 1155                  .L142:\r
- 1156 0076 0380                strh    r3, [r0, #0]    @ movhi\r
- 1157                  .LVL88:\r
- 1158                  .L143:\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1159                          .loc 1 316 0\r
- 1160 0078 BDE81040            pop     {r4, lr}\r
- 124:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled  = USBFS_InitControlRead();\r
- 1161                          .loc 1 124 0\r
- 1162 007c FFF7FEBF            b       USBFS_InitControlRead\r
- 1163                  .LVL89:\r
- 1164                  .L107:\r
- 127:.\Generated_Source\PSoC5/USBFS_std.c ****                 else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_STRING)\r
- 1165                          .loc 1 127 0\r
- 1166 0080 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1167 0082 032A                cmp     r2, #3\r
- 1168 0084 21D1                bne     .L150\r
- 1169                  .L132:\r
- 1170 0086 624B                ldr     r3, .L151+28\r
- 1171 0088 0022                movs    r2, #0\r
- 1172                  .LVL90:\r
- 1173                  .L108:\r
- 133:.\Generated_Source\PSoC5/USBFS_std.c ****                         while ( (CY_GET_REG8(USBFS_wValueLo) > nStr) && (*pStr != 0u) )\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 44\r
-\r
-\r
- 1174                          .loc 1 133 0 discriminator 1\r
- 1175 008a 6049                ldr     r1, .L151+24\r
- 1176 008c 0878                ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 1177 008e 9042                cmp     r0, r2\r
- 1178 0090 0AD8                bhi     .L110\r
- 1179                  .L114:\r
- 151:.\Generated_Source\PSoC5/USBFS_std.c ****                         if( (CY_GET_REG8(USBFS_wValueLo) != 0u) &&\r
- 1180                          .loc 1 151 0\r
- 1181 0092 0A78                ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 1182                  .LVL91:\r
- 1183 0094 82B1                cbz     r2, .L112\r
- 1184                  .L111:\r
- 152:.\Generated_Source\PSoC5/USBFS_std.c ****                             (CY_GET_REG8(USBFS_wValueLo) ==\r
- 1185                          .loc 1 152 0 discriminator 1\r
- 1186 0096 5D49                ldr     r1, .L151+24\r
- 155:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];\r
- 1187                          .loc 1 155 0 discriminator 1\r
- 1188 0098 5E48                ldr     r0, .L151+32\r
- 152:.\Generated_Source\PSoC5/USBFS_std.c ****                             (CY_GET_REG8(USBFS_wValueLo) ==\r
- 1189                          .loc 1 152 0 discriminator 1\r
- 1190 009a 0978                ldrb    r1, [r1, #0]    @ zero_extendqisi2\r
- 155:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];\r
- 1191                          .loc 1 155 0 discriminator 1\r
- 1192 009c 5E4A                ldr     r2, .L151+36\r
- 1193 009e 007C                ldrb    r0, [r0, #16]   @ zero_extendqisi2\r
- 1194 00a0 8842                cmp     r0, r1\r
- 1195 00a2 08BF                it      eq\r
- 1196 00a4 1346                moveq   r3, r2\r
- 1197                  .LVL92:\r
- 1198 00a6 07E0                b       .L112\r
- 1199                  .LVL93:\r
- 1200                  .L110:\r
- 133:.\Generated_Source\PSoC5/USBFS_std.c ****                         while ( (CY_GET_REG8(USBFS_wValueLo) > nStr) && (*pStr != 0u) )\r
- 1201                          .loc 1 133 0 discriminator 2\r
- 1202 00a8 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1203 00aa 0028                cmp     r0, #0\r
- 1204 00ac F1D0                beq     .L114\r
- 1205                  .L113:\r
- 136:.\Generated_Source\PSoC5/USBFS_std.c ****                             descrLength = *pStr;\r
- 1206                          .loc 1 136 0\r
- 1207 00ae 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1208                  .LVL94:\r
- 139:.\Generated_Source\PSoC5/USBFS_std.c ****                             nStr++;\r
- 1209                          .loc 1 139 0\r
- 1210 00b0 501C                adds    r0, r2, #1\r
- 138:.\Generated_Source\PSoC5/USBFS_std.c ****                             pStr = &pStr[descrLength];\r
- 1211                          .loc 1 138 0\r
- 1212 00b2 5B18                adds    r3, r3, r1\r
- 1213                  .LVL95:\r
- 139:.\Generated_Source\PSoC5/USBFS_std.c ****                             nStr++;\r
- 1214                          .loc 1 139 0\r
- 1215 00b4 C2B2                uxtb    r2, r0\r
- 1216                  .LVL96:\r
- 1217 00b6 E8E7                b       .L108\r
- 1218                  .LVL97:\r
- 1219                  .L112:\r
- 169:.\Generated_Source\PSoC5/USBFS_std.c ****                     if (*pStr != 0u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 45\r
-\r
-\r
- 1220                          .loc 1 169 0\r
- 1221 00b8 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1222 00ba 0029                cmp     r1, #0\r
- 1223 00bc 00F0D180            beq     .L100\r
- 171:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = *pStr;\r
- 1224                          .loc 1 171 0\r
- 1225 00c0 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1226 00c2 4C4A                ldr     r2, .L151\r
- 1227 00c4 1080                strh    r0, [r2, #0]    @ movhi\r
- 172:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.pData = pStr;\r
- 1228                          .loc 1 172 0\r
- 1229 00c6 5360                str     r3, [r2, #4]\r
- 1230 00c8 D6E7                b       .L143\r
- 1231                  .LVL98:\r
- 1232                  .L150:\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1233                          .loc 1 316 0\r
- 1234 00ca BDE81040            pop     {r4, lr}\r
- 179:.\Generated_Source\PSoC5/USBFS_std.c ****                     requestHandled = USBFS_DispatchClassRqst();\r
- 1235                          .loc 1 179 0\r
- 1236 00ce FFF7FEBF            b       USBFS_DispatchClassRqst\r
- 1237                  .LVL99:\r
- 1238                  .L101:\r
- 183:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK))\r
- 1239                          .loc 1 183 0\r
- 1240 00d2 1178                ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 1241 00d4 11F00302            ands    r2, r1, #3\r
- 1242 00d8 11D0                beq     .L116\r
- 1243 00da 022A                cmp     r2, #2\r
- 1244 00dc 40F0C180            bne     .L100\r
- 186:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_EP_STATUS_LENGTH;\r
- 1245                          .loc 1 186 0\r
- 1246 00e0 4449                ldr     r1, .L151\r
- 188:.\Generated_Source\PSoC5/USBFS_std.c ****                                         CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].hwEpState;\r
- 1247                          .loc 1 188 0\r
- 1248 00e2 4E4B                ldr     r3, .L151+40\r
- 186:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_EP_STATUS_LENGTH;\r
- 1249                          .loc 1 186 0\r
- 1250 00e4 0A80                strh    r2, [r1, #0]    @ movhi\r
- 188:.\Generated_Source\PSoC5/USBFS_std.c ****                                         CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].hwEpState;\r
- 1251                          .loc 1 188 0\r
- 1252 00e6 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1253 00e8 4D4A                ldr     r2, .L151+44\r
- 1254 00ea 00F07F03            and     r3, r0, #127\r
- 1255 00ee 0C20                movs    r0, #12\r
- 1256 00f0 00FB0323            mla     r3, r0, r3, r2\r
- 1257 00f4 9878                ldrb    r0, [r3, #2]    @ zero_extendqisi2\r
- 187:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_EP[ \\r
- 1258                          .loc 1 187 0\r
- 1259 00f6 4B4B                ldr     r3, .L151+48\r
- 189:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[1u] = 0u;\r
- 1260                          .loc 1 189 0\r
- 1261 00f8 0022                movs    r2, #0\r
- 187:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_EP[ \\r
- 1262                          .loc 1 187 0\r
- 1263 00fa 1870                strb    r0, [r3, #0]\r
- 1264 00fc 06E0                b       .L146\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 46\r
-\r
-\r
- 1265                  .L116:\r
- 194:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_DEVICE_STATUS_LENGTH;\r
- 1266                          .loc 1 194 0\r
- 1267 00fe 3D49                ldr     r1, .L151\r
- 1268 0100 0223                movs    r3, #2\r
- 195:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_deviceStatus;\r
- 1269                          .loc 1 195 0\r
- 1270 0102 4948                ldr     r0, .L151+52\r
- 194:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.count = USBFS_DEVICE_STATUS_LENGTH;\r
- 1271                          .loc 1 194 0\r
- 1272 0104 0B80                strh    r3, [r1, #0]    @ movhi\r
- 195:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[0u] = USBFS_deviceStatus;\r
- 1273                          .loc 1 195 0\r
- 1274 0106 0078                ldrb    r0, [r0, #0]    @ zero_extendqisi2\r
- 1275 0108 464B                ldr     r3, .L151+48\r
- 1276 010a 1870                strb    r0, [r3, #0]\r
- 1277                  .L146:\r
- 196:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_tBuffer[1u] = 0u;\r
- 1278                          .loc 1 196 0\r
- 1279 010c 5A70                strb    r2, [r3, #1]\r
- 197:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_currentTD.pData = &USBFS_tBuffer[0u];\r
- 1280                          .loc 1 197 0\r
- 1281 010e 4B60                str     r3, [r1, #4]\r
- 1282 0110 B2E7                b       .L143\r
- 1283                  .L103:\r
- 205:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.count = 1u;\r
- 1284                          .loc 1 205 0\r
- 1285 0112 0122                movs    r2, #1\r
- 1286 0114 1A80                strh    r2, [r3, #0]    @ movhi\r
- 206:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.pData = (volatile uint8 *)&USBFS_configuration;\r
- 1287                          .loc 1 206 0\r
- 1288 0116 4548                ldr     r0, .L151+56\r
- 1289 0118 05E0                b       .L147\r
- 1290                  .L104:\r
- 210:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.count = 1u;\r
- 1291                          .loc 1 210 0\r
- 1292 011a 0122                movs    r2, #1\r
- 212:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                             CY_GET_REG8(USBFS_wInde\r
- 1293                          .loc 1 212 0\r
- 1294 011c 3F48                ldr     r0, .L151+40\r
- 210:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.count = 1u;\r
- 1295                          .loc 1 210 0\r
- 1296 011e 1A80                strh    r2, [r3, #0]    @ movhi\r
- 212:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                             CY_GET_REG8(USBFS_wInde\r
- 1297                          .loc 1 212 0\r
- 1298 0120 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 211:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_currentTD.pData = (volatile uint8 *)&USBFS_interfaceSetting[ \\r
- 1299                          .loc 1 211 0\r
- 1300 0122 4349                ldr     r1, .L151+60\r
- 1301 0124 8818                adds    r0, r1, r2\r
- 1302                  .L147:\r
- 1303 0126 5860                str     r0, [r3, #4]\r
- 1304 0128 A6E7                b       .L143\r
- 1305                  .L99:\r
- 221:.\Generated_Source\PSoC5/USBFS_std.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
- 1306                          .loc 1 221 0\r
- 1307 012a 0378                ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 47\r
-\r
-\r
- 1308 012c 581E                subs    r0, r3, #1\r
- 1309 012e 0A28                cmp     r0, #10\r
- 1310 0130 00F29780            bhi     .L100\r
- 1311 0134 DFE810F0            tbh     [pc, r0, lsl #1]\r
- 1312                  .L123:\r
- 1313 0138 2B00                .2byte  (.L118-.L123)/2\r
- 1314 013a 9500                .2byte  (.L100-.L123)/2\r
- 1315 013c 4400                .2byte  (.L119-.L123)/2\r
- 1316 013e 9500                .2byte  (.L100-.L123)/2\r
- 1317 0140 0B00                .2byte  (.L120-.L123)/2\r
- 1318 0142 9500                .2byte  (.L100-.L123)/2\r
- 1319 0144 9500                .2byte  (.L100-.L123)/2\r
- 1320 0146 9500                .2byte  (.L100-.L123)/2\r
- 1321 0148 0F00                .2byte  (.L121-.L123)/2\r
- 1322 014a 9500                .2byte  (.L100-.L123)/2\r
- 1323 014c 1900                .2byte  (.L122-.L123)/2\r
- 1324                  .L120:\r
- 224:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_deviceAddress = CY_GET_REG8(USBFS_wValueLo);\r
- 1325                          .loc 1 224 0\r
- 1326 014e 2F4B                ldr     r3, .L151+24\r
- 1327 0150 3849                ldr     r1, .L151+64\r
- 1328 0152 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1329 0154 4CE0                b       .L149\r
- 1330                  .L121:\r
- 228:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configuration = CY_GET_REG8(USBFS_wValueLo);\r
- 1331                          .loc 1 228 0\r
- 1332 0156 2D4B                ldr     r3, .L151+24\r
- 1333 0158 344A                ldr     r2, .L151+56\r
- 1334 015a 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 229:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configurationChanged = USBFS_TRUE;\r
- 1335                          .loc 1 229 0\r
- 1336 015c 3649                ldr     r1, .L151+68\r
- 228:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configuration = CY_GET_REG8(USBFS_wValueLo);\r
- 1337                          .loc 1 228 0\r
- 1338 015e 1070                strb    r0, [r2, #0]\r
- 229:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_configurationChanged = USBFS_TRUE;\r
- 1339                          .loc 1 229 0\r
- 1340 0160 0120                movs    r0, #1\r
- 1341 0162 0870                strb    r0, [r1, #0]\r
- 230:.\Generated_Source\PSoC5/USBFS_std.c ****                 USBFS_Config(USBFS_TRUE);\r
- 1342                          .loc 1 230 0\r
- 1343 0164 FFF7FEFF            bl      USBFS_Config\r
- 1344                  .LVL100:\r
- 1345 0168 77E0                b       .L144\r
- 1346                  .L122:\r
- 234:.\Generated_Source\PSoC5/USBFS_std.c ****                 if (USBFS_ValidateAlternateSetting() != 0u)\r
- 1347                          .loc 1 234 0\r
- 1348 016a FFF7FEFF            bl      USBFS_ValidateAlternateSetting\r
- 1349                  .LVL101:\r
- 1350 016e 0028                cmp     r0, #0\r
- 1351 0170 77D0                beq     .L100\r
- 236:.\Generated_Source\PSoC5/USBFS_std.c ****                     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 1352                          .loc 1 236 0\r
- 1353 0172 2A4C                ldr     r4, .L151+40\r
- 237:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceNumber = interfaceNumber;\r
- 1354                          .loc 1 237 0\r
- 1355 0174 314A                ldr     r2, .L151+72\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 48\r
-\r
-\r
- 236:.\Generated_Source\PSoC5/USBFS_std.c ****                     interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
- 1356                          .loc 1 236 0\r
- 1357 0176 2478                ldrb    r4, [r4, #0]    @ zero_extendqisi2\r
- 1358                  .LVL102:\r
- 238:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_configurationChanged = USBFS_TRUE;\r
- 1359                          .loc 1 238 0\r
- 1360 0178 2F4B                ldr     r3, .L151+68\r
- 1361 017a 0121                movs    r1, #1\r
- 237:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceNumber = interfaceNumber;\r
- 1362                          .loc 1 237 0\r
- 1363 017c 1470                strb    r4, [r2, #0]\r
- 238:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_configurationChanged = USBFS_TRUE;\r
- 1364                          .loc 1 238 0\r
- 1365 017e 1970                strb    r1, [r3, #0]\r
- 243:.\Generated_Source\PSoC5/USBFS_std.c ****                         USBFS_ConfigAltChanged();\r
- 1366                          .loc 1 243 0\r
- 1367 0180 FFF7FEFF            bl      USBFS_ConfigAltChanged\r
- 1368                  .LVL103:\r
- 247:.\Generated_Source\PSoC5/USBFS_std.c ****                          USBFS_interfaceSetting[interfaceNumber];\r
- 1369                          .loc 1 247 0\r
- 1370 0184 2A48                ldr     r0, .L151+60\r
- 246:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceSetting_last[interfaceNumber] =\r
- 1371                          .loc 1 246 0\r
- 1372 0186 2E49                ldr     r1, .L151+76\r
- 247:.\Generated_Source\PSoC5/USBFS_std.c ****                          USBFS_interfaceSetting[interfaceNumber];\r
- 1373                          .loc 1 247 0\r
- 1374 0188 025D                ldrb    r2, [r0, r4]    @ zero_extendqisi2\r
- 246:.\Generated_Source\PSoC5/USBFS_std.c ****                     USBFS_interfaceSetting_last[interfaceNumber] =\r
- 1375                          .loc 1 246 0\r
- 1376 018a 0A55                strb    r2, [r1, r4]\r
- 1377 018c 65E0                b       .L144\r
- 1378                  .LVL104:\r
- 1379                  .L118:\r
- 252:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
- 1380                          .loc 1 252 0\r
- 1381 018e 1278                ldrb    r2, [r2, #0]    @ zero_extendqisi2\r
- 1382 0190 02F00301            and     r1, r2, #3\r
- 1383 0194 0129                cmp     r1, #1\r
- 1384 0196 55D0                beq     .L129\r
- 1385 0198 09D3                bcc     .L125\r
- 1386 019a 0229                cmp     r1, #2\r
- 1387 019c 61D1                bne     .L100\r
- 255:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
- 1388                          .loc 1 255 0\r
- 1389 019e 1B4B                ldr     r3, .L151+24\r
- 1390 01a0 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1391 01a2 0028                cmp     r0, #0\r
- 1392 01a4 5DD1                bne     .L100\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1393                          .loc 1 316 0\r
- 1394 01a6 BDE81040            pop     {r4, lr}\r
- 257:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_ClearEndpointHalt();\r
- 1395                          .loc 1 257 0\r
- 1396 01aa FFF7FEBF            b       USBFS_ClearEndpointHalt\r
- 1397                  .LVL105:\r
- 1398                  .L125:\r
- 262:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 49\r
-\r
-\r
- 1399                          .loc 1 262 0\r
- 1400 01ae 174A                ldr     r2, .L151+24\r
- 1401 01b0 1178                ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 1402 01b2 0129                cmp     r1, #1\r
- 1403 01b4 55D1                bne     .L100\r
- 264:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_deviceStatus &= (uint8)~USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
- 1404                          .loc 1 264 0\r
- 1405 01b6 1C49                ldr     r1, .L151+52\r
- 1406 01b8 0B78                ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 1407 01ba 03F0FD00            and     r0, r3, #253\r
- 1408                  .LVL106:\r
- 1409 01be 17E0                b       .L149\r
- 1410                  .L119:\r
- 282:.\Generated_Source\PSoC5/USBFS_std.c ****                 switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
- 1411                          .loc 1 282 0\r
- 1412 01c0 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1413 01c2 00F00302            and     r2, r0, #3\r
- 1414 01c6 012A                cmp     r2, #1\r
- 1415 01c8 3CD0                beq     .L129\r
- 1416 01ca 09D3                bcc     .L128\r
- 1417 01cc 022A                cmp     r2, #2\r
- 1418 01ce 48D1                bne     .L100\r
- 285:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
- 1419                          .loc 1 285 0\r
- 1420 01d0 0E49                ldr     r1, .L151+24\r
- 1421 01d2 0B78                ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 1422 01d4 002B                cmp     r3, #0\r
- 1423 01d6 44D1                bne     .L100\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1424                          .loc 1 316 0\r
- 1425 01d8 BDE81040            pop     {r4, lr}\r
- 287:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_SetEndpointHalt();\r
- 1426                          .loc 1 287 0\r
- 1427 01dc FFF7FEBF            b       USBFS_SetEndpointHalt\r
- 1428                  .LVL107:\r
- 1429                  .L128:\r
- 292:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
- 1430                          .loc 1 292 0\r
- 1431 01e0 0A48                ldr     r0, .L151+24\r
- 1432 01e2 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 1433 01e4 012A                cmp     r2, #1\r
- 1434 01e6 3CD1                bne     .L100\r
- 294:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_deviceStatus |= USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
- 1435                          .loc 1 294 0\r
- 1436 01e8 0F49                ldr     r1, .L151+52\r
- 1437 01ea 0B78                ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 1438 01ec 43F00200            orr     r0, r3, #2\r
- 1439                  .L149:\r
- 1440                  .LVL108:\r
- 1441 01f0 0870                strb    r0, [r1, #0]\r
- 1442 01f2 32E0                b       .L144\r
- 1443                  .L152:\r
- 1444                          .align  2\r
- 1445                  .L151:\r
- 1446 01f4 00000000            .word   USBFS_currentTD\r
- 1447 01f8 00600040            .word   1073766400\r
- 1448 01fc 01600040            .word   1073766401\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 50\r
-\r
-\r
- 1449 0200 03600040            .word   1073766403\r
- 1450 0204 00000000            .word   USBFS_device\r
- 1451 0208 00000000            .word   USBFS_TABLE\r
- 1452 020c 02600040            .word   1073766402\r
- 1453 0210 00000000            .word   USBFS_STRING_DESCRIPTORS\r
- 1454 0214 00000000            .word   USBFS_DEVICE0_DESCR\r
- 1455 0218 00000000            .word   USBFS_SN_STRING_DESCRIPTOR\r
- 1456 021c 04600040            .word   1073766404\r
- 1457 0220 00000000            .word   USBFS_EP\r
- 1458 0224 00000000            .word   .LANCHOR0\r
- 1459 0228 00000000            .word   USBFS_deviceStatus\r
- 1460 022c 00000000            .word   USBFS_configuration\r
- 1461 0230 00000000            .word   USBFS_interfaceSetting\r
- 1462 0234 00000000            .word   USBFS_deviceAddress\r
- 1463 0238 00000000            .word   USBFS_configurationChanged\r
- 1464 023c 00000000            .word   USBFS_interfaceNumber\r
- 1465 0240 00000000            .word   USBFS_interfaceSetting_last\r
- 1466                  .LVL109:\r
- 1467                  .L129:\r
- 300:.\Generated_Source\PSoC5/USBFS_std.c ****                         if (CY_GET_REG8(USBFS_wIndexLo) < USBFS_MAX_INTERFACES_NUMBER)\r
- 1468                          .loc 1 300 0\r
- 1469 0244 0848                ldr     r0, .L153\r
- 1470 0246 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 1471 0248 5AB9                cbnz    r2, .L100\r
- 302:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
- 1472                          .loc 1 302 0\r
- 1473 024a 0378                ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 1474 024c 074A                ldr     r2, .L153+4\r
- 303:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 (uint8)~(CY_GET_REG8(USBFS_wValueLo\r
- 1475                          .loc 1 303 0\r
- 1476 024e 0848                ldr     r0, .L153+8\r
- 302:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
- 1477                          .loc 1 302 0\r
- 1478 0250 D15C                ldrb    r1, [r2, r3]    @ zero_extendqisi2\r
- 303:.\Generated_Source\PSoC5/USBFS_std.c ****                                                                 (uint8)~(CY_GET_REG8(USBFS_wValueLo\r
- 1479                          .loc 1 303 0\r
- 1480 0252 0078                ldrb    r0, [r0, #0]    @ zero_extendqisi2\r
- 302:.\Generated_Source\PSoC5/USBFS_std.c ****                             USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
- 1481                          .loc 1 302 0\r
- 1482 0254 21EA0001            bic     r1, r1, r0\r
- 1483 0258 D154                strb    r1, [r2, r3]\r
- 1484                  .LVL110:\r
- 1485                  .L144:\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1486                          .loc 1 316 0\r
- 1487 025a BDE81040            pop     {r4, lr}\r
- 304:.\Generated_Source\PSoC5/USBFS_std.c ****                             requestHandled = USBFS_InitNoDataControlTransfer();\r
- 1488                          .loc 1 304 0\r
- 1489 025e FFF7FEBF            b       USBFS_InitNoDataControlTransfer\r
- 1490                  .LVL111:\r
- 1491                  .L100:\r
- 316:.\Generated_Source\PSoC5/USBFS_std.c **** }\r
- 1492                          .loc 1 316 0\r
- 1493 0262 0020                movs    r0, #0\r
- 1494 0264 10BD                pop     {r4, pc}\r
- 1495                  .L154:\r
- 1496 0266 00BF                .align  2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 51\r
-\r
-\r
- 1497                  .L153:\r
- 1498 0268 04600040            .word   1073766404\r
- 1499 026c 00000000            .word   USBFS_interfaceStatus\r
- 1500 0270 02600040            .word   1073766402\r
- 1501                          .cfi_endproc\r
- 1502                  .LFE0:\r
- 1503                          .size   USBFS_HandleStandardRqst, .-USBFS_HandleStandardRqst\r
- 1504                          .bss\r
- 1505                          .set    .LANCHOR0,. + 0\r
- 1506                          .type   USBFS_tBuffer.5008, %object\r
- 1507                          .size   USBFS_tBuffer.5008, 2\r
- 1508                  USBFS_tBuffer.5008:\r
- 1509 0000 0000                .space  2\r
- 1510                          .text\r
- 1511                  .Letext0:\r
- 1512                          .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 1513                          .file 3 ".\\Generated_Source\\PSoC5\\USBFS.h"\r
- 1514                          .file 4 ".\\Generated_Source\\PSoC5\\USBFS_pvt.h"\r
- 1515                          .section        .debug_info,"",%progbits\r
- 1516                  .Ldebug_info0:\r
- 1517 0000 9A080000            .4byte  0x89a\r
- 1518 0004 0200                .2byte  0x2\r
- 1519 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1520 000a 04                  .byte   0x4\r
- 1521 000b 01                  .uleb128 0x1\r
- 1522 000c 6A030000            .4byte  .LASF83\r
- 1523 0010 01                  .byte   0x1\r
- 1524 0011 F3030000            .4byte  .LASF84\r
- 1525 0015 22020000            .4byte  .LASF85\r
- 1526 0019 00000000            .4byte  .Ldebug_ranges0+0\r
- 1527 001d 00000000            .4byte  0\r
- 1528 0021 00000000            .4byte  0\r
- 1529 0025 00000000            .4byte  .Ldebug_line0\r
- 1530 0029 02                  .uleb128 0x2\r
- 1531 002a 01                  .byte   0x1\r
- 1532 002b 06                  .byte   0x6\r
- 1533 002c 9A000000            .4byte  .LASF0\r
- 1534 0030 02                  .uleb128 0x2\r
- 1535 0031 01                  .byte   0x1\r
- 1536 0032 08                  .byte   0x8\r
- 1537 0033 B8030000            .4byte  .LASF1\r
- 1538 0037 02                  .uleb128 0x2\r
- 1539 0038 02                  .byte   0x2\r
- 1540 0039 05                  .byte   0x5\r
- 1541 003a C6030000            .4byte  .LASF2\r
- 1542 003e 02                  .uleb128 0x2\r
- 1543 003f 02                  .byte   0x2\r
- 1544 0040 07                  .byte   0x7\r
- 1545 0041 C4010000            .4byte  .LASF3\r
- 1546 0045 02                  .uleb128 0x2\r
- 1547 0046 04                  .byte   0x4\r
- 1548 0047 05                  .byte   0x5\r
- 1549 0048 15010000            .4byte  .LASF4\r
- 1550 004c 02                  .uleb128 0x2\r
- 1551 004d 04                  .byte   0x4\r
- 1552 004e 07                  .byte   0x7\r
- 1553 004f 92010000            .4byte  .LASF5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 52\r
-\r
-\r
- 1554 0053 02                  .uleb128 0x2\r
- 1555 0054 08                  .byte   0x8\r
- 1556 0055 05                  .byte   0x5\r
- 1557 0056 8C000000            .4byte  .LASF6\r
- 1558 005a 02                  .uleb128 0x2\r
- 1559 005b 08                  .byte   0x8\r
- 1560 005c 07                  .byte   0x7\r
- 1561 005d 52000000            .4byte  .LASF7\r
- 1562 0061 03                  .uleb128 0x3\r
- 1563 0062 04                  .byte   0x4\r
- 1564 0063 05                  .byte   0x5\r
- 1565 0064 696E7400            .ascii  "int\000"\r
- 1566 0068 02                  .uleb128 0x2\r
- 1567 0069 04                  .byte   0x4\r
- 1568 006a 07                  .byte   0x7\r
- 1569 006b 85010000            .4byte  .LASF8\r
- 1570 006f 04                  .uleb128 0x4\r
- 1571 0070 1E010000            .4byte  .LASF9\r
- 1572 0074 02                  .byte   0x2\r
- 1573 0075 5B                  .byte   0x5b\r
- 1574 0076 30000000            .4byte  0x30\r
- 1575 007a 04                  .uleb128 0x4\r
- 1576 007b 13000000            .4byte  .LASF10\r
- 1577 007f 02                  .byte   0x2\r
- 1578 0080 5C                  .byte   0x5c\r
- 1579 0081 3E000000            .4byte  0x3e\r
- 1580 0085 02                  .uleb128 0x2\r
- 1581 0086 04                  .byte   0x4\r
- 1582 0087 04                  .byte   0x4\r
- 1583 0088 4B030000            .4byte  .LASF11\r
- 1584 008c 02                  .uleb128 0x2\r
- 1585 008d 08                  .byte   0x8\r
- 1586 008e 04                  .byte   0x4\r
- 1587 008f 2D010000            .4byte  .LASF12\r
- 1588 0093 02                  .uleb128 0x2\r
- 1589 0094 01                  .byte   0x1\r
- 1590 0095 08                  .byte   0x8\r
- 1591 0096 87040000            .4byte  .LASF13\r
- 1592 009a 04                  .uleb128 0x4\r
- 1593 009b B3030000            .4byte  .LASF14\r
- 1594 009f 02                  .byte   0x2\r
- 1595 00a0 F0                  .byte   0xf0\r
- 1596 00a1 A5000000            .4byte  0xa5\r
- 1597 00a5 05                  .uleb128 0x5\r
- 1598 00a6 6F000000            .4byte  0x6f\r
- 1599 00aa 02                  .uleb128 0x2\r
- 1600 00ab 04                  .byte   0x4\r
- 1601 00ac 07                  .byte   0x7\r
- 1602 00ad 97020000            .4byte  .LASF15\r
- 1603 00b1 06                  .uleb128 0x6\r
- 1604 00b2 0C                  .byte   0xc\r
- 1605 00b3 03                  .byte   0x3\r
- 1606 00b4 79                  .byte   0x79\r
- 1607 00b5 38010000            .4byte  0x138\r
- 1608 00b9 07                  .uleb128 0x7\r
- 1609 00ba B6020000            .4byte  .LASF16\r
- 1610 00be 03                  .byte   0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 53\r
-\r
-\r
- 1611 00bf 7B                  .byte   0x7b\r
- 1612 00c0 6F000000            .4byte  0x6f\r
- 1613 00c4 02                  .byte   0x2\r
- 1614 00c5 23                  .byte   0x23\r
- 1615 00c6 00                  .uleb128 0\r
- 1616 00c7 07                  .uleb128 0x7\r
- 1617 00c8 51030000            .4byte  .LASF17\r
- 1618 00cc 03                  .byte   0x3\r
- 1619 00cd 7C                  .byte   0x7c\r
- 1620 00ce 6F000000            .4byte  0x6f\r
- 1621 00d2 02                  .byte   0x2\r
- 1622 00d3 23                  .byte   0x23\r
- 1623 00d4 01                  .uleb128 0x1\r
- 1624 00d5 07                  .uleb128 0x7\r
- 1625 00d6 81020000            .4byte  .LASF18\r
- 1626 00da 03                  .byte   0x3\r
- 1627 00db 7D                  .byte   0x7d\r
- 1628 00dc 6F000000            .4byte  0x6f\r
- 1629 00e0 02                  .byte   0x2\r
- 1630 00e1 23                  .byte   0x23\r
- 1631 00e2 02                  .uleb128 0x2\r
- 1632 00e3 07                  .uleb128 0x7\r
- 1633 00e4 24010000            .4byte  .LASF19\r
- 1634 00e8 03                  .byte   0x3\r
- 1635 00e9 7E                  .byte   0x7e\r
- 1636 00ea 6F000000            .4byte  0x6f\r
- 1637 00ee 02                  .byte   0x2\r
- 1638 00ef 23                  .byte   0x23\r
- 1639 00f0 03                  .uleb128 0x3\r
- 1640 00f1 07                  .uleb128 0x7\r
- 1641 00f2 69000000            .4byte  .LASF20\r
- 1642 00f6 03                  .byte   0x3\r
- 1643 00f7 7F                  .byte   0x7f\r
- 1644 00f8 6F000000            .4byte  0x6f\r
- 1645 00fc 02                  .byte   0x2\r
- 1646 00fd 23                  .byte   0x23\r
- 1647 00fe 04                  .uleb128 0x4\r
- 1648 00ff 07                  .uleb128 0x7\r
- 1649 0100 7E010000            .4byte  .LASF21\r
- 1650 0104 03                  .byte   0x3\r
- 1651 0105 80                  .byte   0x80\r
- 1652 0106 6F000000            .4byte  0x6f\r
- 1653 010a 02                  .byte   0x2\r
- 1654 010b 23                  .byte   0x23\r
- 1655 010c 05                  .uleb128 0x5\r
- 1656 010d 07                  .uleb128 0x7\r
- 1657 010e A6040000            .4byte  .LASF22\r
- 1658 0112 03                  .byte   0x3\r
- 1659 0113 81                  .byte   0x81\r
- 1660 0114 7A000000            .4byte  0x7a\r
- 1661 0118 02                  .byte   0x2\r
- 1662 0119 23                  .byte   0x23\r
- 1663 011a 06                  .uleb128 0x6\r
- 1664 011b 07                  .uleb128 0x7\r
- 1665 011c 8C040000            .4byte  .LASF23\r
- 1666 0120 03                  .byte   0x3\r
- 1667 0121 82                  .byte   0x82\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 54\r
-\r
-\r
- 1668 0122 7A000000            .4byte  0x7a\r
- 1669 0126 02                  .byte   0x2\r
- 1670 0127 23                  .byte   0x23\r
- 1671 0128 08                  .uleb128 0x8\r
- 1672 0129 07                  .uleb128 0x7\r
- 1673 012a DE010000            .4byte  .LASF24\r
- 1674 012e 03                  .byte   0x3\r
- 1675 012f 83                  .byte   0x83\r
- 1676 0130 6F000000            .4byte  0x6f\r
- 1677 0134 02                  .byte   0x2\r
- 1678 0135 23                  .byte   0x23\r
- 1679 0136 0A                  .uleb128 0xa\r
- 1680 0137 00                  .byte   0\r
- 1681 0138 04                  .uleb128 0x4\r
- 1682 0139 2F040000            .4byte  .LASF25\r
- 1683 013d 03                  .byte   0x3\r
- 1684 013e 84                  .byte   0x84\r
- 1685 013f B1000000            .4byte  0xb1\r
- 1686 0143 06                  .uleb128 0x6\r
- 1687 0144 08                  .byte   0x8\r
- 1688 0145 03                  .byte   0x3\r
- 1689 0146 86                  .byte   0x86\r
- 1690 0147 A0010000            .4byte  0x1a0\r
- 1691 014b 07                  .uleb128 0x7\r
- 1692 014c DE010000            .4byte  .LASF24\r
- 1693 0150 03                  .byte   0x3\r
- 1694 0151 88                  .byte   0x88\r
- 1695 0152 6F000000            .4byte  0x6f\r
- 1696 0156 02                  .byte   0x2\r
- 1697 0157 23                  .byte   0x23\r
- 1698 0158 00                  .uleb128 0\r
- 1699 0159 07                  .uleb128 0x7\r
- 1700 015a 7C040000            .4byte  .LASF26\r
- 1701 015e 03                  .byte   0x3\r
- 1702 015f 89                  .byte   0x89\r
- 1703 0160 6F000000            .4byte  0x6f\r
- 1704 0164 02                  .byte   0x2\r
- 1705 0165 23                  .byte   0x23\r
- 1706 0166 01                  .uleb128 0x1\r
- 1707 0167 07                  .uleb128 0x7\r
- 1708 0168 69000000            .4byte  .LASF20\r
- 1709 016c 03                  .byte   0x3\r
- 1710 016d 8A                  .byte   0x8a\r
- 1711 016e 6F000000            .4byte  0x6f\r
- 1712 0172 02                  .byte   0x2\r
- 1713 0173 23                  .byte   0x23\r
- 1714 0174 02                  .uleb128 0x2\r
- 1715 0175 07                  .uleb128 0x7\r
- 1716 0176 71040000            .4byte  .LASF27\r
- 1717 017a 03                  .byte   0x3\r
- 1718 017b 8B                  .byte   0x8b\r
- 1719 017c 6F000000            .4byte  0x6f\r
- 1720 0180 02                  .byte   0x2\r
- 1721 0181 23                  .byte   0x23\r
- 1722 0182 03                  .uleb128 0x3\r
- 1723 0183 07                  .uleb128 0x7\r
- 1724 0184 8C040000            .4byte  .LASF23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 55\r
-\r
-\r
- 1725 0188 03                  .byte   0x3\r
- 1726 0189 8C                  .byte   0x8c\r
- 1727 018a 7A000000            .4byte  0x7a\r
- 1728 018e 02                  .byte   0x2\r
- 1729 018f 23                  .byte   0x23\r
- 1730 0190 04                  .uleb128 0x4\r
- 1731 0191 07                  .uleb128 0x7\r
- 1732 0192 32050000            .4byte  .LASF28\r
- 1733 0196 03                  .byte   0x3\r
- 1734 0197 8D                  .byte   0x8d\r
- 1735 0198 6F000000            .4byte  0x6f\r
- 1736 019c 02                  .byte   0x2\r
- 1737 019d 23                  .byte   0x23\r
- 1738 019e 06                  .uleb128 0x6\r
- 1739 019f 00                  .byte   0\r
- 1740 01a0 04                  .uleb128 0x4\r
- 1741 01a1 34010000            .4byte  .LASF29\r
- 1742 01a5 03                  .byte   0x3\r
- 1743 01a6 8E                  .byte   0x8e\r
- 1744 01a7 43010000            .4byte  0x143\r
- 1745 01ab 06                  .uleb128 0x6\r
- 1746 01ac 04                  .byte   0x4\r
- 1747 01ad 03                  .byte   0x3\r
- 1748 01ae 90                  .byte   0x90\r
- 1749 01af D0010000            .4byte  0x1d0\r
- 1750 01b3 07                  .uleb128 0x7\r
- 1751 01b4 13050000            .4byte  .LASF30\r
- 1752 01b8 03                  .byte   0x3\r
- 1753 01b9 92                  .byte   0x92\r
- 1754 01ba 6F000000            .4byte  0x6f\r
- 1755 01be 02                  .byte   0x2\r
- 1756 01bf 23                  .byte   0x23\r
- 1757 01c0 00                  .uleb128 0\r
- 1758 01c1 07                  .uleb128 0x7\r
- 1759 01c2 F8040000            .4byte  .LASF31\r
- 1760 01c6 03                  .byte   0x3\r
- 1761 01c7 93                  .byte   0x93\r
- 1762 01c8 7A000000            .4byte  0x7a\r
- 1763 01cc 02                  .byte   0x2\r
- 1764 01cd 23                  .byte   0x23\r
- 1765 01ce 02                  .uleb128 0x2\r
- 1766 01cf 00                  .byte   0\r
- 1767 01d0 04                  .uleb128 0x4\r
- 1768 01d1 10030000            .4byte  .LASF32\r
- 1769 01d5 03                  .byte   0x3\r
- 1770 01d6 94                  .byte   0x94\r
- 1771 01d7 AB010000            .4byte  0x1ab\r
- 1772 01db 06                  .uleb128 0x6\r
- 1773 01dc 0C                  .byte   0xc\r
- 1774 01dd 03                  .byte   0x3\r
- 1775 01de 96                  .byte   0x96\r
- 1776 01df 0E020000            .4byte  0x20e\r
- 1777 01e3 07                  .uleb128 0x7\r
- 1778 01e4 0D000000            .4byte  .LASF33\r
- 1779 01e8 03                  .byte   0x3\r
- 1780 01e9 98                  .byte   0x98\r
- 1781 01ea 7A000000            .4byte  0x7a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 56\r
-\r
-\r
- 1782 01ee 02                  .byte   0x2\r
- 1783 01ef 23                  .byte   0x23\r
- 1784 01f0 00                  .uleb128 0\r
- 1785 01f1 07                  .uleb128 0x7\r
- 1786 01f2 64010000            .4byte  .LASF34\r
- 1787 01f6 03                  .byte   0x3\r
- 1788 01f7 99                  .byte   0x99\r
- 1789 01f8 0E020000            .4byte  0x20e\r
- 1790 01fc 02                  .byte   0x2\r
- 1791 01fd 23                  .byte   0x23\r
- 1792 01fe 04                  .uleb128 0x4\r
- 1793 01ff 07                  .uleb128 0x7\r
- 1794 0200 00000000            .4byte  .LASF35\r
- 1795 0204 03                  .byte   0x3\r
- 1796 0205 9A                  .byte   0x9a\r
- 1797 0206 14020000            .4byte  0x214\r
- 1798 020a 02                  .byte   0x2\r
- 1799 020b 23                  .byte   0x23\r
- 1800 020c 08                  .uleb128 0x8\r
- 1801 020d 00                  .byte   0\r
- 1802 020e 08                  .uleb128 0x8\r
- 1803 020f 04                  .byte   0x4\r
- 1804 0210 A5000000            .4byte  0xa5\r
- 1805 0214 08                  .uleb128 0x8\r
- 1806 0215 04                  .byte   0x4\r
- 1807 0216 D0010000            .4byte  0x1d0\r
- 1808 021a 04                  .uleb128 0x4\r
- 1809 021b D0030000            .4byte  .LASF36\r
- 1810 021f 03                  .byte   0x3\r
- 1811 0220 9B                  .byte   0x9b\r
- 1812 0221 DB010000            .4byte  0x1db\r
- 1813 0225 06                  .uleb128 0x6\r
- 1814 0226 08                  .byte   0x8\r
- 1815 0227 03                  .byte   0x3\r
- 1816 0228 9E                  .byte   0x9e\r
- 1817 0229 48020000            .4byte  0x248\r
- 1818 022d 09                  .uleb128 0x9\r
- 1819 022e 6300                .ascii  "c\000"\r
- 1820 0230 03                  .byte   0x3\r
- 1821 0231 A0                  .byte   0xa0\r
- 1822 0232 6F000000            .4byte  0x6f\r
- 1823 0236 02                  .byte   0x2\r
- 1824 0237 23                  .byte   0x23\r
- 1825 0238 00                  .uleb128 0\r
- 1826 0239 07                  .uleb128 0x7\r
- 1827 023a A5020000            .4byte  .LASF37\r
- 1828 023e 03                  .byte   0x3\r
- 1829 023f A1                  .byte   0xa1\r
- 1830 0240 48020000            .4byte  0x248\r
- 1831 0244 02                  .byte   0x2\r
- 1832 0245 23                  .byte   0x23\r
- 1833 0246 04                  .uleb128 0x4\r
- 1834 0247 00                  .byte   0\r
- 1835 0248 08                  .uleb128 0x8\r
- 1836 0249 04                  .byte   0x4\r
- 1837 024a 4E020000            .4byte  0x24e\r
- 1838 024e 0A                  .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 57\r
-\r
-\r
- 1839 024f 04                  .uleb128 0x4\r
- 1840 0250 67050000            .4byte  .LASF38\r
- 1841 0254 03                  .byte   0x3\r
- 1842 0255 A2                  .byte   0xa2\r
- 1843 0256 25020000            .4byte  0x225\r
- 1844 025a 0B                  .uleb128 0xb\r
- 1845 025b 01                  .byte   0x1\r
- 1846 025c B1040000            .4byte  .LASF79\r
- 1847 0260 01                  .byte   0x1\r
- 1848 0261 6E03                .2byte  0x36e\r
- 1849 0263 01                  .byte   0x1\r
- 1850 0264 69020000            .4byte  0x269\r
- 1851 0268 01                  .byte   0x1\r
- 1852 0269 08                  .uleb128 0x8\r
- 1853 026a 04                  .byte   0x4\r
- 1854 026b 6F020000            .4byte  0x26f\r
- 1855 026f 0C                  .uleb128 0xc\r
- 1856 0270 4F020000            .4byte  0x24f\r
- 1857 0274 0D                  .uleb128 0xd\r
- 1858 0275 01                  .byte   0x1\r
- 1859 0276 05010000            .4byte  .LASF40\r
- 1860 027a 01                  .byte   0x1\r
- 1861 027b 7E01                .2byte  0x17e\r
- 1862 027d 01                  .byte   0x1\r
- 1863 027e 00000000            .4byte  .LFB1\r
- 1864 0282 B4000000            .4byte  .LFE1\r
- 1865 0286 00000000            .4byte  .LLST0\r
- 1866 028a 01                  .byte   0x1\r
- 1867 028b AD020000            .4byte  0x2ad\r
- 1868 028f 0E                  .uleb128 0xe\r
- 1869 0290 657000              .ascii  "ep\000"\r
- 1870 0293 01                  .byte   0x1\r
- 1871 0294 8001                .2byte  0x180\r
- 1872 0296 6F000000            .4byte  0x6f\r
- 1873 029a 20000000            .4byte  .LLST1\r
- 1874 029e 0E                  .uleb128 0xe\r
- 1875 029f 6900                .ascii  "i\000"\r
- 1876 02a1 01                  .byte   0x1\r
- 1877 02a2 8101                .2byte  0x181\r
- 1878 02a4 6F000000            .4byte  0x6f\r
- 1879 02a8 57000000            .4byte  .LLST2\r
- 1880 02ac 00                  .byte   0\r
- 1881 02ad 0F                  .uleb128 0xf\r
- 1882 02ae 01                  .byte   0x1\r
- 1883 02af DB030000            .4byte  .LASF44\r
- 1884 02b3 01                  .byte   0x1\r
- 1885 02b4 5103                .2byte  0x351\r
- 1886 02b6 01                  .byte   0x1\r
- 1887 02b7 69020000            .4byte  0x269\r
- 1888 02bb 00000000            .4byte  .LFB4\r
- 1889 02bf 1C000000            .4byte  .LFE4\r
- 1890 02c3 02                  .byte   0x2\r
- 1891 02c4 7D                  .byte   0x7d\r
- 1892 02c5 00                  .sleb128 0\r
- 1893 02c6 01                  .byte   0x1\r
- 1894 02c7 EA020000            .4byte  0x2ea\r
- 1895 02cb 10                  .uleb128 0x10\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 58\r
-\r
-\r
- 1896 02cc 6300                .ascii  "c\000"\r
- 1897 02ce 01                  .byte   0x1\r
- 1898 02cf 5103                .2byte  0x351\r
- 1899 02d1 6F000000            .4byte  0x6f\r
- 1900 02d5 8C000000            .4byte  .LLST3\r
- 1901 02d9 11                  .uleb128 0x11\r
- 1902 02da A0020000            .4byte  .LASF39\r
- 1903 02de 01                  .byte   0x1\r
- 1904 02df 5503                .2byte  0x355\r
- 1905 02e1 69020000            .4byte  0x269\r
- 1906 02e5 AD000000            .4byte  .LLST4\r
- 1907 02e9 00                  .byte   0\r
- 1908 02ea 0D                  .uleb128 0xd\r
- 1909 02eb 01                  .byte   0x1\r
- 1910 02ec F9020000            .4byte  .LASF41\r
- 1911 02f0 01                  .byte   0x1\r
- 1912 02f1 D302                .2byte  0x2d3\r
- 1913 02f3 01                  .byte   0x1\r
- 1914 02f4 00000000            .4byte  .LFB3\r
- 1915 02f8 28010000            .4byte  .LFE3\r
- 1916 02fc C6000000            .4byte  .LLST5\r
- 1917 0300 01                  .byte   0x1\r
- 1918 0301 7B030000            .4byte  0x37b\r
- 1919 0305 0E                  .uleb128 0xe\r
- 1920 0306 657000              .ascii  "ep\000"\r
- 1921 0309 01                  .byte   0x1\r
- 1922 030a D502                .2byte  0x2d5\r
- 1923 030c 6F000000            .4byte  0x6f\r
- 1924 0310 E6000000            .4byte  .LLST6\r
- 1925 0314 11                  .uleb128 0x11\r
- 1926 0315 0C050000            .4byte  .LASF42\r
- 1927 0319 01                  .byte   0x1\r
- 1928 031a D602                .2byte  0x2d6\r
- 1929 031c 6F000000            .4byte  0x6f\r
- 1930 0320 05010000            .4byte  .LLST7\r
- 1931 0324 0E                  .uleb128 0xe\r
- 1932 0325 6900                .ascii  "i\000"\r
- 1933 0327 01                  .byte   0x1\r
- 1934 0328 D702                .2byte  0x2d7\r
- 1935 032a 6F000000            .4byte  0x6f\r
- 1936 032e 2A010000            .4byte  .LLST8\r
- 1937 0332 11                  .uleb128 0x11\r
- 1938 0333 04050000            .4byte  .LASF43\r
- 1939 0337 01                  .byte   0x1\r
- 1940 0338 D802                .2byte  0x2d8\r
- 1941 033a 6F000000            .4byte  0x6f\r
- 1942 033e 61010000            .4byte  .LLST9\r
- 1943 0342 0E                  .uleb128 0xe\r
- 1944 0343 726900              .ascii  "ri\000"\r
- 1945 0346 01                  .byte   0x1\r
- 1946 0347 D902                .2byte  0x2d9\r
- 1947 0349 6F000000            .4byte  0x6f\r
- 1948 034d A1010000            .4byte  .LLST10\r
- 1949 0351 11                  .uleb128 0x11\r
- 1950 0352 A0020000            .4byte  .LASF39\r
- 1951 0356 01                  .byte   0x1\r
- 1952 0357 DB02                .2byte  0x2db\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 59\r
-\r
-\r
- 1953 0359 69020000            .4byte  0x269\r
- 1954 035d D0010000            .4byte  .LLST11\r
- 1955 0361 0E                  .uleb128 0xe\r
- 1956 0362 70455000            .ascii  "pEP\000"\r
- 1957 0366 01                  .byte   0x1\r
- 1958 0367 DC02                .2byte  0x2dc\r
- 1959 0369 7B030000            .4byte  0x37b\r
- 1960 036d E5010000            .4byte  .LLST12\r
- 1961 0371 12                  .uleb128 0x12\r
- 1962 0372 14000000            .4byte  .LVL12\r
- 1963 0376 AD020000            .4byte  0x2ad\r
- 1964 037a 00                  .byte   0\r
- 1965 037b 08                  .uleb128 0x8\r
- 1966 037c 04                  .byte   0x4\r
- 1967 037d 81030000            .4byte  0x381\r
- 1968 0381 0C                  .uleb128 0xc\r
- 1969 0382 A0010000            .4byte  0x1a0\r
- 1970 0386 13                  .uleb128 0x13\r
- 1971 0387 5A020000            .4byte  0x25a\r
- 1972 038b 00000000            .4byte  .LFB5\r
- 1973 038f 18000000            .4byte  .LFE5\r
- 1974 0393 02                  .byte   0x2\r
- 1975 0394 7D                  .byte   0x7d\r
- 1976 0395 00                  .sleb128 0\r
- 1977 0396 01                  .byte   0x1\r
- 1978 0397 14                  .uleb128 0x14\r
- 1979 0398 01                  .byte   0x1\r
- 1980 0399 A4010000            .4byte  .LASF45\r
- 1981 039d 01                  .byte   0x1\r
- 1982 039e 8503                .2byte  0x385\r
- 1983 03a0 01                  .byte   0x1\r
- 1984 03a1 E0030000            .4byte  0x3e0\r
- 1985 03a5 00000000            .4byte  .LFB6\r
- 1986 03a9 20000000            .4byte  .LFE6\r
- 1987 03ad 04020000            .4byte  .LLST13\r
- 1988 03b1 01                  .byte   0x1\r
- 1989 03b2 E0030000            .4byte  0x3e0\r
- 1990 03b6 11                  .uleb128 0x11\r
- 1991 03b7 A0020000            .4byte  .LASF39\r
- 1992 03bb 01                  .byte   0x1\r
- 1993 03bc 8803                .2byte  0x388\r
- 1994 03be 69020000            .4byte  0x269\r
- 1995 03c2 24020000            .4byte  .LLST14\r
- 1996 03c6 11                  .uleb128 0x11\r
- 1997 03c7 E4020000            .4byte  .LASF46\r
- 1998 03cb 01                  .byte   0x1\r
- 1999 03cc 8903                .2byte  0x389\r
- 2000 03ce 6F000000            .4byte  0x6f\r
- 2001 03d2 49020000            .4byte  .LLST15\r
- 2002 03d6 12                  .uleb128 0x12\r
- 2003 03d7 0E000000            .4byte  .LVL29\r
- 2004 03db AD020000            .4byte  0x2ad\r
- 2005 03df 00                  .byte   0\r
- 2006 03e0 08                  .uleb128 0x8\r
- 2007 03e1 04                  .byte   0x4\r
- 2008 03e2 E6030000            .4byte  0x3e6\r
- 2009 03e6 0C                  .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 60\r
-\r
-\r
- 2010 03e7 6F000000            .4byte  0x6f\r
- 2011 03eb 0D                  .uleb128 0xd\r
- 2012 03ec 01                  .byte   0x1\r
- 2013 03ed F8000000            .4byte  .LASF47\r
- 2014 03f1 01                  .byte   0x1\r
- 2015 03f2 DB01                .2byte  0x1db\r
- 2016 03f4 01                  .byte   0x1\r
- 2017 03f5 00000000            .4byte  .LFB2\r
- 2018 03f9 68010000            .4byte  .LFE2\r
- 2019 03fd 6C020000            .4byte  .LLST16\r
- 2020 0401 01                  .byte   0x1\r
- 2021 0402 BB040000            .4byte  0x4bb\r
- 2022 0406 15                  .uleb128 0x15\r
- 2023 0407 A6000000            .4byte  .LASF48\r
- 2024 040b 01                  .byte   0x1\r
- 2025 040c DB01                .2byte  0x1db\r
- 2026 040e 6F000000            .4byte  0x6f\r
- 2027 0412 8C020000            .4byte  .LLST17\r
- 2028 0416 0E                  .uleb128 0xe\r
- 2029 0417 657000              .ascii  "ep\000"\r
- 2030 041a 01                  .byte   0x1\r
- 2031 041b DD01                .2byte  0x1dd\r
- 2032 041d 6F000000            .4byte  0x6f\r
- 2033 0421 AD020000            .4byte  .LLST18\r
- 2034 0425 11                  .uleb128 0x11\r
- 2035 0426 0C050000            .4byte  .LASF42\r
- 2036 042a 01                  .byte   0x1\r
- 2037 042b DE01                .2byte  0x1de\r
- 2038 042d 6F000000            .4byte  0x6f\r
- 2039 0431 E4020000            .4byte  .LLST19\r
- 2040 0435 0E                  .uleb128 0xe\r
- 2041 0436 6900                .ascii  "i\000"\r
- 2042 0438 01                  .byte   0x1\r
- 2043 0439 DF01                .2byte  0x1df\r
- 2044 043b 6F000000            .4byte  0x6f\r
- 2045 043f 1B030000            .4byte  .LLST20\r
- 2046 0443 11                  .uleb128 0x11\r
- 2047 0444 04050000            .4byte  .LASF43\r
- 2048 0448 01                  .byte   0x1\r
- 2049 0449 E001                .2byte  0x1e0\r
- 2050 044b 6F000000            .4byte  0x6f\r
- 2051 044f 5E030000            .4byte  .LLST21\r
- 2052 0453 11                  .uleb128 0x11\r
- 2053 0454 D7010000            .4byte  .LASF49\r
- 2054 0458 01                  .byte   0x1\r
- 2055 0459 E101                .2byte  0x1e1\r
- 2056 045b E0030000            .4byte  0x3e0\r
- 2057 045f 9E030000            .4byte  .LLST22\r
- 2058 0463 11                  .uleb128 0x11\r
- 2059 0464 AC020000            .4byte  .LASF50\r
- 2060 0468 01                  .byte   0x1\r
- 2061 0469 E301                .2byte  0x1e3\r
- 2062 046b 7A000000            .4byte  0x7a\r
- 2063 046f B2030000            .4byte  .LLST23\r
- 2064 0473 11                  .uleb128 0x11\r
- 2065 0474 A0020000            .4byte  .LASF39\r
- 2066 0478 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 61\r
-\r
-\r
- 2067 0479 E601                .2byte  0x1e6\r
- 2068 047b 69020000            .4byte  0x269\r
- 2069 047f DD030000            .4byte  .LLST24\r
- 2070 0483 0E                  .uleb128 0xe\r
- 2071 0484 70455000            .ascii  "pEP\000"\r
- 2072 0488 01                  .byte   0x1\r
- 2073 0489 E701                .2byte  0x1e7\r
- 2074 048b 7B030000            .4byte  0x37b\r
- 2075 048f FD030000            .4byte  .LLST25\r
- 2076 0493 16                  .uleb128 0x16\r
- 2077 0494 44000000            .4byte  .LVL36\r
- 2078 0498 AD020000            .4byte  0x2ad\r
- 2079 049c A7040000            .4byte  0x4a7\r
- 2080 04a0 17                  .uleb128 0x17\r
- 2081 04a1 01                  .byte   0x1\r
- 2082 04a2 50                  .byte   0x50\r
- 2083 04a3 02                  .byte   0x2\r
- 2084 04a4 74                  .byte   0x74\r
- 2085 04a5 7F                  .sleb128 -1\r
- 2086 04a6 00                  .byte   0\r
- 2087 04a7 12                  .uleb128 0x12\r
- 2088 04a8 28010000            .4byte  .LVL54\r
- 2089 04ac 97030000            .4byte  0x397\r
- 2090 04b0 18                  .uleb128 0x18\r
- 2091 04b1 4E010000            .4byte  .LVL58\r
- 2092 04b5 01                  .byte   0x1\r
- 2093 04b6 74020000            .4byte  0x274\r
- 2094 04ba 00                  .byte   0\r
- 2095 04bb 19                  .uleb128 0x19\r
- 2096 04bc 01                  .byte   0x1\r
- 2097 04bd 1A000000            .4byte  .LASF51\r
- 2098 04c1 01                  .byte   0x1\r
- 2099 04c2 A603                .2byte  0x3a6\r
- 2100 04c4 01                  .byte   0x1\r
- 2101 04c5 00000000            .4byte  .LFB7\r
- 2102 04c9 40000000            .4byte  .LFE7\r
- 2103 04cd 02                  .byte   0x2\r
- 2104 04ce 7D                  .byte   0x7d\r
- 2105 04cf 00                  .sleb128 0\r
- 2106 04d0 01                  .byte   0x1\r
- 2107 04d1 F4040000            .4byte  0x4f4\r
- 2108 04d5 10                  .uleb128 0x10\r
- 2109 04d6 657000              .ascii  "ep\000"\r
- 2110 04d9 01                  .byte   0x1\r
- 2111 04da A603                .2byte  0x3a6\r
- 2112 04dc 6F000000            .4byte  0x6f\r
- 2113 04e0 1D040000            .4byte  .LLST26\r
- 2114 04e4 0E                  .uleb128 0xe\r
- 2115 04e5 726900              .ascii  "ri\000"\r
- 2116 04e8 01                  .byte   0x1\r
- 2117 04e9 A803                .2byte  0x3a8\r
- 2118 04eb 6F000000            .4byte  0x6f\r
- 2119 04ef 3B040000            .4byte  .LLST27\r
- 2120 04f3 00                  .byte   0\r
- 2121 04f4 0F                  .uleb128 0xf\r
- 2122 04f5 01                  .byte   0x1\r
- 2123 04f6 4E010000            .4byte  .LASF52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 62\r
-\r
-\r
- 2124 04fa 01                  .byte   0x1\r
- 2125 04fb D503                .2byte  0x3d5\r
- 2126 04fd 01                  .byte   0x1\r
- 2127 04fe 6F000000            .4byte  0x6f\r
- 2128 0502 00000000            .4byte  .LFB8\r
- 2129 0506 58000000            .4byte  .LFE8\r
- 2130 050a 02                  .byte   0x2\r
- 2131 050b 7D                  .byte   0x7d\r
- 2132 050c 00                  .sleb128 0\r
- 2133 050d 01                  .byte   0x1\r
- 2134 050e 48050000            .4byte  0x548\r
- 2135 0512 0E                  .uleb128 0xe\r
- 2136 0513 657000              .ascii  "ep\000"\r
- 2137 0516 01                  .byte   0x1\r
- 2138 0517 D703                .2byte  0x3d7\r
- 2139 0519 6F000000            .4byte  0x6f\r
- 2140 051d 61040000            .4byte  .LLST28\r
- 2141 0521 0E                  .uleb128 0xe\r
- 2142 0522 726900              .ascii  "ri\000"\r
- 2143 0525 01                  .byte   0x1\r
- 2144 0526 D803                .2byte  0x3d8\r
- 2145 0528 6F000000            .4byte  0x6f\r
- 2146 052c 7F040000            .4byte  .LLST29\r
- 2147 0530 1A                  .uleb128 0x1a\r
- 2148 0531 97040000            .4byte  .LASF53\r
- 2149 0535 01                  .byte   0x1\r
- 2150 0536 D903                .2byte  0x3d9\r
- 2151 0538 6F000000            .4byte  0x6f\r
- 2152 053c 00                  .byte   0\r
- 2153 053d 18                  .uleb128 0x18\r
- 2154 053e 46000000            .4byte  .LVL69\r
- 2155 0542 01                  .byte   0x1\r
- 2156 0543 73080000            .4byte  0x873\r
- 2157 0547 00                  .byte   0\r
- 2158 0548 14                  .uleb128 0x14\r
- 2159 0549 01                  .byte   0x1\r
- 2160 054a CA000000            .4byte  .LASF54\r
- 2161 054e 01                  .byte   0x1\r
- 2162 054f 0C04                .2byte  0x40c\r
- 2163 0551 01                  .byte   0x1\r
- 2164 0552 6F000000            .4byte  0x6f\r
- 2165 0556 00000000            .4byte  .LFB9\r
- 2166 055a 7C000000            .4byte  .LFE9\r
- 2167 055e C3040000            .4byte  .LLST30\r
- 2168 0562 01                  .byte   0x1\r
- 2169 0563 9D050000            .4byte  0x59d\r
- 2170 0567 0E                  .uleb128 0xe\r
- 2171 0568 657000              .ascii  "ep\000"\r
- 2172 056b 01                  .byte   0x1\r
- 2173 056c 0E04                .2byte  0x40e\r
- 2174 056e 6F000000            .4byte  0x6f\r
- 2175 0572 E3040000            .4byte  .LLST31\r
- 2176 0576 0E                  .uleb128 0xe\r
- 2177 0577 726900              .ascii  "ri\000"\r
- 2178 057a 01                  .byte   0x1\r
- 2179 057b 0F04                .2byte  0x40f\r
- 2180 057d 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 63\r
-\r
-\r
- 2181 0581 01050000            .4byte  .LLST32\r
- 2182 0585 1A                  .uleb128 0x1a\r
- 2183 0586 97040000            .4byte  .LASF53\r
- 2184 058a 01                  .byte   0x1\r
- 2185 058b 1004                .2byte  0x410\r
- 2186 058d 6F000000            .4byte  0x6f\r
- 2187 0591 00                  .byte   0\r
- 2188 0592 18                  .uleb128 0x18\r
- 2189 0593 68000000            .4byte  .LVL76\r
- 2190 0597 01                  .byte   0x1\r
- 2191 0598 73080000            .4byte  0x873\r
- 2192 059c 00                  .byte   0\r
- 2193 059d 14                  .uleb128 0x14\r
- 2194 059e 01                  .byte   0x1\r
- 2195 059f E8010000            .4byte  .LASF55\r
- 2196 05a3 01                  .byte   0x1\r
- 2197 05a4 5304                .2byte  0x453\r
- 2198 05a6 01                  .byte   0x1\r
- 2199 05a7 6F000000            .4byte  0x6f\r
- 2200 05ab 00000000            .4byte  .LFB10\r
- 2201 05af 48000000            .4byte  .LFE10\r
- 2202 05b3 27050000            .4byte  .LLST33\r
- 2203 05b7 01                  .byte   0x1\r
- 2204 05b8 04060000            .4byte  0x604\r
- 2205 05bc 11                  .uleb128 0x11\r
- 2206 05bd 97040000            .4byte  .LASF53\r
- 2207 05c1 01                  .byte   0x1\r
- 2208 05c2 5504                .2byte  0x455\r
- 2209 05c4 6F000000            .4byte  0x6f\r
- 2210 05c8 47050000            .4byte  .LLST34\r
- 2211 05cc 1B                  .uleb128 0x1b\r
- 2212 05cd 2A030000            .4byte  .LASF56\r
- 2213 05d1 01                  .byte   0x1\r
- 2214 05d2 5604                .2byte  0x456\r
- 2215 05d4 6F000000            .4byte  0x6f\r
- 2216 05d8 01                  .byte   0x1\r
- 2217 05d9 54                  .byte   0x54\r
- 2218 05da 11                  .uleb128 0x11\r
- 2219 05db A0020000            .4byte  .LASF39\r
- 2220 05df 01                  .byte   0x1\r
- 2221 05e0 5704                .2byte  0x457\r
- 2222 05e2 69020000            .4byte  0x269\r
- 2223 05e6 66050000            .4byte  .LLST35\r
- 2224 05ea 11                  .uleb128 0x11\r
- 2225 05eb E4020000            .4byte  .LASF46\r
- 2226 05ef 01                  .byte   0x1\r
- 2227 05f0 5804                .2byte  0x458\r
- 2228 05f2 6F000000            .4byte  0x6f\r
- 2229 05f6 79050000            .4byte  .LLST36\r
- 2230 05fa 12                  .uleb128 0x12\r
- 2231 05fb 12000000            .4byte  .LVL79\r
- 2232 05ff AD020000            .4byte  0x2ad\r
- 2233 0603 00                  .byte   0\r
- 2234 0604 1C                  .uleb128 0x1c\r
- 2235 0605 01                  .byte   0x1\r
- 2236 0606 4E050000            .4byte  .LASF57\r
- 2237 060a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 64\r
-\r
-\r
- 2238 060b 59                  .byte   0x59\r
- 2239 060c 01                  .byte   0x1\r
- 2240 060d 6F000000            .4byte  0x6f\r
- 2241 0611 00000000            .4byte  .LFB0\r
- 2242 0615 74020000            .4byte  .LFE0\r
- 2243 0619 B3050000            .4byte  .LLST37\r
- 2244 061d 01                  .byte   0x1\r
- 2245 061e FD060000            .4byte  0x6fd\r
- 2246 0622 1D                  .uleb128 0x1d\r
- 2247 0623 97040000            .4byte  .LASF53\r
- 2248 0627 01                  .byte   0x1\r
- 2249 0628 5B                  .byte   0x5b\r
- 2250 0629 6F000000            .4byte  0x6f\r
- 2251 062d D3050000            .4byte  .LLST38\r
- 2252 0631 1D                  .uleb128 0x1d\r
- 2253 0632 6E000000            .4byte  .LASF58\r
- 2254 0636 01                  .byte   0x1\r
- 2255 0637 5C                  .byte   0x5c\r
- 2256 0638 6F000000            .4byte  0x6f\r
- 2257 063c E7050000            .4byte  .LLST39\r
- 2258 0640 1D                  .uleb128 0x1d\r
- 2259 0641 65030000            .4byte  .LASF59\r
- 2260 0645 01                  .byte   0x1\r
- 2261 0646 5E                  .byte   0x5e\r
- 2262 0647 0E020000            .4byte  0x20e\r
- 2263 064b FA050000            .4byte  .LLST40\r
- 2264 064f 1D                  .uleb128 0x1d\r
- 2265 0650 FF040000            .4byte  .LASF60\r
- 2266 0654 01                  .byte   0x1\r
- 2267 0655 60                  .byte   0x60\r
- 2268 0656 6F000000            .4byte  0x6f\r
- 2269 065a 3C060000            .4byte  .LLST41\r
- 2270 065e 1D                  .uleb128 0x1d\r
- 2271 065f 8B020000            .4byte  .LASF61\r
- 2272 0663 01                  .byte   0x1\r
- 2273 0664 61                  .byte   0x61\r
- 2274 0665 6F000000            .4byte  0x6f\r
- 2275 0669 65060000            .4byte  .LLST42\r
- 2276 066d 1E                  .uleb128 0x1e\r
- 2277 066e 7E000000            .4byte  .LASF62\r
- 2278 0672 01                  .byte   0x1\r
- 2279 0673 64                  .byte   0x64\r
- 2280 0674 0D070000            .4byte  0x70d\r
- 2281 0678 05                  .byte   0x5\r
- 2282 0679 03                  .byte   0x3\r
- 2283 067a 00000000            .4byte  USBFS_tBuffer.5008\r
- 2284 067e 1D                  .uleb128 0x1d\r
- 2285 067f A0020000            .4byte  .LASF39\r
- 2286 0683 01                  .byte   0x1\r
- 2287 0684 65                  .byte   0x65\r
- 2288 0685 69020000            .4byte  0x269\r
- 2289 0689 78060000            .4byte  .LLST43\r
- 2290 068d 1F                  .uleb128 0x1f\r
- 2291 068e 5A020000            .4byte  0x25a\r
- 2292 0692 40000000            .4byte  .LBB4\r
- 2293 0696 4A000000            .4byte  .LBE4\r
- 2294 069a 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 65\r
-\r
-\r
- 2295 069b 70                  .byte   0x70\r
- 2296 069c 12                  .uleb128 0x12\r
- 2297 069d 64000000            .4byte  .LVL86\r
- 2298 06a1 AD020000            .4byte  0x2ad\r
- 2299 06a5 18                  .uleb128 0x18\r
- 2300 06a6 80000000            .4byte  .LVL89\r
- 2301 06aa 01                  .byte   0x1\r
- 2302 06ab 81080000            .4byte  0x881\r
- 2303 06af 18                  .uleb128 0x18\r
- 2304 06b0 D2000000            .4byte  .LVL99\r
- 2305 06b4 01                  .byte   0x1\r
- 2306 06b5 8F080000            .4byte  0x88f\r
- 2307 06b9 16                  .uleb128 0x16\r
- 2308 06ba 68010000            .4byte  .LVL100\r
- 2309 06be EB030000            .4byte  0x3eb\r
- 2310 06c2 CC060000            .4byte  0x6cc\r
- 2311 06c6 17                  .uleb128 0x17\r
- 2312 06c7 01                  .byte   0x1\r
- 2313 06c8 50                  .byte   0x50\r
- 2314 06c9 01                  .byte   0x1\r
- 2315 06ca 31                  .byte   0x31\r
- 2316 06cb 00                  .byte   0\r
- 2317 06cc 12                  .uleb128 0x12\r
- 2318 06cd 6E010000            .4byte  .LVL101\r
- 2319 06d1 9D050000            .4byte  0x59d\r
- 2320 06d5 12                  .uleb128 0x12\r
- 2321 06d6 84010000            .4byte  .LVL103\r
- 2322 06da EA020000            .4byte  0x2ea\r
- 2323 06de 18                  .uleb128 0x18\r
- 2324 06df AE010000            .4byte  .LVL105\r
- 2325 06e3 01                  .byte   0x1\r
- 2326 06e4 48050000            .4byte  0x548\r
- 2327 06e8 18                  .uleb128 0x18\r
- 2328 06e9 E0010000            .4byte  .LVL107\r
- 2329 06ed 01                  .byte   0x1\r
- 2330 06ee F4040000            .4byte  0x4f4\r
- 2331 06f2 18                  .uleb128 0x18\r
- 2332 06f3 62020000            .4byte  .LVL111\r
- 2333 06f7 01                  .byte   0x1\r
- 2334 06f8 73080000            .4byte  0x873\r
- 2335 06fc 00                  .byte   0\r
- 2336 06fd 20                  .uleb128 0x20\r
- 2337 06fe 6F000000            .4byte  0x6f\r
- 2338 0702 0D070000            .4byte  0x70d\r
- 2339 0706 21                  .uleb128 0x21\r
- 2340 0707 AA000000            .4byte  0xaa\r
- 2341 070b 01                  .byte   0x1\r
- 2342 070c 00                  .byte   0\r
- 2343 070d 05                  .uleb128 0x5\r
- 2344 070e FD060000            .4byte  0x6fd\r
- 2345 0712 22                  .uleb128 0x22\r
- 2346 0713 64040000            .4byte  .LASF63\r
- 2347 0717 03                  .byte   0x3\r
- 2348 0718 1802                .2byte  0x218\r
- 2349 071a A5000000            .4byte  0xa5\r
- 2350 071e 01                  .byte   0x1\r
- 2351 071f 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 66\r
-\r
-\r
- 2352 0720 22                  .uleb128 0x22\r
- 2353 0721 6A010000            .4byte  .LASF64\r
- 2354 0725 03                  .byte   0x3\r
- 2355 0726 1A02                .2byte  0x21a\r
- 2356 0728 A5000000            .4byte  0xa5\r
- 2357 072c 01                  .byte   0x1\r
- 2358 072d 01                  .byte   0x1\r
- 2359 072e 22                  .uleb128 0x22\r
- 2360 072f 07020000            .4byte  .LASF65\r
- 2361 0733 03                  .byte   0x3\r
- 2362 0734 1B02                .2byte  0x21b\r
- 2363 0736 A5000000            .4byte  0xa5\r
- 2364 073a 01                  .byte   0x1\r
- 2365 073b 01                  .byte   0x1\r
- 2366 073c 22                  .uleb128 0x22\r
- 2367 073d C9040000            .4byte  .LASF66\r
- 2368 0741 03                  .byte   0x3\r
- 2369 0742 1C02                .2byte  0x21c\r
- 2370 0744 A5000000            .4byte  0xa5\r
- 2371 0748 01                  .byte   0x1\r
- 2372 0749 01                  .byte   0x1\r
- 2373 074a 20                  .uleb128 0x20\r
- 2374 074b 6F000000            .4byte  0x6f\r
- 2375 074f 5A070000            .4byte  0x75a\r
- 2376 0753 21                  .uleb128 0x21\r
- 2377 0754 AA000000            .4byte  0xaa\r
- 2378 0758 11                  .byte   0x11\r
- 2379 0759 00                  .byte   0\r
- 2380 075a 23                  .uleb128 0x23\r
- 2381 075b 37030000            .4byte  .LASF67\r
- 2382 075f 04                  .byte   0x4\r
- 2383 0760 1C                  .byte   0x1c\r
- 2384 0761 67070000            .4byte  0x767\r
- 2385 0765 01                  .byte   0x1\r
- 2386 0766 01                  .byte   0x1\r
- 2387 0767 0C                  .uleb128 0xc\r
- 2388 0768 4A070000            .4byte  0x74a\r
- 2389 076c 20                  .uleb128 0x20\r
- 2390 076d 4F020000            .4byte  0x24f\r
- 2391 0771 7C070000            .4byte  0x77c\r
- 2392 0775 21                  .uleb128 0x21\r
- 2393 0776 AA000000            .4byte  0xaa\r
- 2394 077a 00                  .byte   0\r
- 2395 077b 00                  .byte   0\r
- 2396 077c 23                  .uleb128 0x23\r
- 2397 077d BD020000            .4byte  .LASF68\r
- 2398 0781 04                  .byte   0x4\r
- 2399 0782 23                  .byte   0x23\r
- 2400 0783 89070000            .4byte  0x789\r
- 2401 0787 01                  .byte   0x1\r
- 2402 0788 01                  .byte   0x1\r
- 2403 0789 0C                  .uleb128 0xc\r
- 2404 078a 6C070000            .4byte  0x76c\r
- 2405 078e 20                  .uleb128 0x20\r
- 2406 078f 6F000000            .4byte  0x6f\r
- 2407 0793 9E070000            .4byte  0x79e\r
- 2408 0797 21                  .uleb128 0x21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 67\r
-\r
-\r
- 2409 0798 AA000000            .4byte  0xaa\r
- 2410 079c 09                  .byte   0x9\r
- 2411 079d 00                  .byte   0\r
- 2412 079e 23                  .uleb128 0x23\r
- 2413 079f C9020000            .4byte  .LASF69\r
- 2414 07a3 04                  .byte   0x4\r
- 2415 07a4 24                  .byte   0x24\r
- 2416 07a5 AB070000            .4byte  0x7ab\r
- 2417 07a9 01                  .byte   0x1\r
- 2418 07aa 01                  .byte   0x1\r
- 2419 07ab 0C                  .uleb128 0xc\r
- 2420 07ac 8E070000            .4byte  0x78e\r
- 2421 07b0 20                  .uleb128 0x20\r
- 2422 07b1 6F000000            .4byte  0x6f\r
- 2423 07b5 C0070000            .4byte  0x7c0\r
- 2424 07b9 21                  .uleb128 0x21\r
- 2425 07ba AA000000            .4byte  0xaa\r
- 2426 07be 52                  .byte   0x52\r
- 2427 07bf 00                  .byte   0\r
- 2428 07c0 23                  .uleb128 0x23\r
- 2429 07c1 68020000            .4byte  .LASF70\r
- 2430 07c5 04                  .byte   0x4\r
- 2431 07c6 25                  .byte   0x25\r
- 2432 07c7 CD070000            .4byte  0x7cd\r
- 2433 07cb 01                  .byte   0x1\r
- 2434 07cc 01                  .byte   0x1\r
- 2435 07cd 0C                  .uleb128 0xc\r
- 2436 07ce B0070000            .4byte  0x7b0\r
- 2437 07d2 23                  .uleb128 0x23\r
- 2438 07d3 E2000000            .4byte  .LASF71\r
- 2439 07d7 04                  .byte   0x4\r
- 2440 07d8 38                  .byte   0x38\r
- 2441 07d9 A5000000            .4byte  0xa5\r
- 2442 07dd 01                  .byte   0x1\r
- 2443 07de 01                  .byte   0x1\r
- 2444 07df 20                  .uleb128 0x20\r
- 2445 07e0 6F000000            .4byte  0x6f\r
- 2446 07e4 EF070000            .4byte  0x7ef\r
- 2447 07e8 21                  .uleb128 0x21\r
- 2448 07e9 AA000000            .4byte  0xaa\r
- 2449 07ed 00                  .byte   0\r
- 2450 07ee 00                  .byte   0\r
- 2451 07ef 23                  .uleb128 0x23\r
- 2452 07f0 18040000            .4byte  .LASF72\r
- 2453 07f4 04                  .byte   0x4\r
- 2454 07f5 39                  .byte   0x39\r
- 2455 07f6 FC070000            .4byte  0x7fc\r
- 2456 07fa 01                  .byte   0x1\r
- 2457 07fb 01                  .byte   0x1\r
- 2458 07fc 05                  .uleb128 0x5\r
- 2459 07fd DF070000            .4byte  0x7df\r
- 2460 0801 23                  .uleb128 0x23\r
- 2461 0802 DC040000            .4byte  .LASF73\r
- 2462 0806 04                  .byte   0x4\r
- 2463 0807 3A                  .byte   0x3a\r
- 2464 0808 0E080000            .4byte  0x80e\r
- 2465 080c 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 68\r
-\r
-\r
- 2466 080d 01                  .byte   0x1\r
- 2467 080e 05                  .uleb128 0x5\r
- 2468 080f DF070000            .4byte  0x7df\r
- 2469 0813 23                  .uleb128 0x23\r
- 2470 0814 B6000000            .4byte  .LASF74\r
- 2471 0818 04                  .byte   0x4\r
- 2472 0819 3B                  .byte   0x3b\r
- 2473 081a A5000000            .4byte  0xa5\r
- 2474 081e 01                  .byte   0x1\r
- 2475 081f 01                  .byte   0x1\r
- 2476 0820 23                  .uleb128 0x23\r
- 2477 0821 38050000            .4byte  .LASF75\r
- 2478 0825 04                  .byte   0x4\r
- 2479 0826 3C                  .byte   0x3c\r
- 2480 0827 2D080000            .4byte  0x82d\r
- 2481 082b 01                  .byte   0x1\r
- 2482 082c 01                  .byte   0x1\r
- 2483 082d 05                  .uleb128 0x5\r
- 2484 082e DF070000            .4byte  0x7df\r
- 2485 0832 23                  .uleb128 0x23\r
- 2486 0833 53020000            .4byte  .LASF76\r
- 2487 0837 04                  .byte   0x4\r
- 2488 0838 3D                  .byte   0x3d\r
- 2489 0839 E0030000            .4byte  0x3e0\r
- 2490 083d 01                  .byte   0x1\r
- 2491 083e 01                  .byte   0x1\r
- 2492 083f 20                  .uleb128 0x20\r
- 2493 0840 38010000            .4byte  0x138\r
- 2494 0844 4F080000            .4byte  0x84f\r
- 2495 0848 21                  .uleb128 0x21\r
- 2496 0849 AA000000            .4byte  0xaa\r
- 2497 084d 08                  .byte   0x8\r
- 2498 084e 00                  .byte   0\r
- 2499 084f 23                  .uleb128 0x23\r
- 2500 0850 5C030000            .4byte  .LASF77\r
- 2501 0854 04                  .byte   0x4\r
- 2502 0855 3F                  .byte   0x3f\r
- 2503 0856 5C080000            .4byte  0x85c\r
- 2504 085a 01                  .byte   0x1\r
- 2505 085b 01                  .byte   0x1\r
- 2506 085c 05                  .uleb128 0x5\r
- 2507 085d 3F080000            .4byte  0x83f\r
- 2508 0861 23                  .uleb128 0x23\r
- 2509 0862 2C000000            .4byte  .LASF78\r
- 2510 0866 04                  .byte   0x4\r
- 2511 0867 40                  .byte   0x40\r
- 2512 0868 6E080000            .4byte  0x86e\r
- 2513 086c 01                  .byte   0x1\r
- 2514 086d 01                  .byte   0x1\r
- 2515 086e 05                  .uleb128 0x5\r
- 2516 086f 1A020000            .4byte  0x21a\r
- 2517 0873 24                  .uleb128 0x24\r
- 2518 0874 01                  .byte   0x1\r
- 2519 0875 44040000            .4byte  .LASF80\r
- 2520 0879 04                  .byte   0x4\r
- 2521 087a 63                  .byte   0x63\r
- 2522 087b 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 69\r
-\r
-\r
- 2523 087c 6F000000            .4byte  0x6f\r
- 2524 0880 01                  .byte   0x1\r
- 2525 0881 24                  .uleb128 0x24\r
- 2526 0882 01                  .byte   0x1\r
- 2527 0883 3C000000            .4byte  .LASF81\r
- 2528 0887 04                  .byte   0x4\r
- 2529 0888 56                  .byte   0x56\r
- 2530 0889 01                  .byte   0x1\r
- 2531 088a 6F000000            .4byte  0x6f\r
- 2532 088e 01                  .byte   0x1\r
- 2533 088f 24                  .uleb128 0x24\r
- 2534 0890 01                  .byte   0x1\r
- 2535 0891 1A050000            .4byte  .LASF82\r
- 2536 0895 04                  .byte   0x4\r
- 2537 0896 B2                  .byte   0xb2\r
- 2538 0897 01                  .byte   0x1\r
- 2539 0898 6F000000            .4byte  0x6f\r
- 2540 089c 01                  .byte   0x1\r
- 2541 089d 00                  .byte   0\r
- 2542                          .section        .debug_abbrev,"",%progbits\r
- 2543                  .Ldebug_abbrev0:\r
- 2544 0000 01                  .uleb128 0x1\r
- 2545 0001 11                  .uleb128 0x11\r
- 2546 0002 01                  .byte   0x1\r
- 2547 0003 25                  .uleb128 0x25\r
- 2548 0004 0E                  .uleb128 0xe\r
- 2549 0005 13                  .uleb128 0x13\r
- 2550 0006 0B                  .uleb128 0xb\r
- 2551 0007 03                  .uleb128 0x3\r
- 2552 0008 0E                  .uleb128 0xe\r
- 2553 0009 1B                  .uleb128 0x1b\r
- 2554 000a 0E                  .uleb128 0xe\r
- 2555 000b 55                  .uleb128 0x55\r
- 2556 000c 06                  .uleb128 0x6\r
- 2557 000d 11                  .uleb128 0x11\r
- 2558 000e 01                  .uleb128 0x1\r
- 2559 000f 52                  .uleb128 0x52\r
- 2560 0010 01                  .uleb128 0x1\r
- 2561 0011 10                  .uleb128 0x10\r
- 2562 0012 06                  .uleb128 0x6\r
- 2563 0013 00                  .byte   0\r
- 2564 0014 00                  .byte   0\r
- 2565 0015 02                  .uleb128 0x2\r
- 2566 0016 24                  .uleb128 0x24\r
- 2567 0017 00                  .byte   0\r
- 2568 0018 0B                  .uleb128 0xb\r
- 2569 0019 0B                  .uleb128 0xb\r
- 2570 001a 3E                  .uleb128 0x3e\r
- 2571 001b 0B                  .uleb128 0xb\r
- 2572 001c 03                  .uleb128 0x3\r
- 2573 001d 0E                  .uleb128 0xe\r
- 2574 001e 00                  .byte   0\r
- 2575 001f 00                  .byte   0\r
- 2576 0020 03                  .uleb128 0x3\r
- 2577 0021 24                  .uleb128 0x24\r
- 2578 0022 00                  .byte   0\r
- 2579 0023 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 70\r
-\r
-\r
- 2580 0024 0B                  .uleb128 0xb\r
- 2581 0025 3E                  .uleb128 0x3e\r
- 2582 0026 0B                  .uleb128 0xb\r
- 2583 0027 03                  .uleb128 0x3\r
- 2584 0028 08                  .uleb128 0x8\r
- 2585 0029 00                  .byte   0\r
- 2586 002a 00                  .byte   0\r
- 2587 002b 04                  .uleb128 0x4\r
- 2588 002c 16                  .uleb128 0x16\r
- 2589 002d 00                  .byte   0\r
- 2590 002e 03                  .uleb128 0x3\r
- 2591 002f 0E                  .uleb128 0xe\r
- 2592 0030 3A                  .uleb128 0x3a\r
- 2593 0031 0B                  .uleb128 0xb\r
- 2594 0032 3B                  .uleb128 0x3b\r
- 2595 0033 0B                  .uleb128 0xb\r
- 2596 0034 49                  .uleb128 0x49\r
- 2597 0035 13                  .uleb128 0x13\r
- 2598 0036 00                  .byte   0\r
- 2599 0037 00                  .byte   0\r
- 2600 0038 05                  .uleb128 0x5\r
- 2601 0039 35                  .uleb128 0x35\r
- 2602 003a 00                  .byte   0\r
- 2603 003b 49                  .uleb128 0x49\r
- 2604 003c 13                  .uleb128 0x13\r
- 2605 003d 00                  .byte   0\r
- 2606 003e 00                  .byte   0\r
- 2607 003f 06                  .uleb128 0x6\r
- 2608 0040 13                  .uleb128 0x13\r
- 2609 0041 01                  .byte   0x1\r
- 2610 0042 0B                  .uleb128 0xb\r
- 2611 0043 0B                  .uleb128 0xb\r
- 2612 0044 3A                  .uleb128 0x3a\r
- 2613 0045 0B                  .uleb128 0xb\r
- 2614 0046 3B                  .uleb128 0x3b\r
- 2615 0047 0B                  .uleb128 0xb\r
- 2616 0048 01                  .uleb128 0x1\r
- 2617 0049 13                  .uleb128 0x13\r
- 2618 004a 00                  .byte   0\r
- 2619 004b 00                  .byte   0\r
- 2620 004c 07                  .uleb128 0x7\r
- 2621 004d 0D                  .uleb128 0xd\r
- 2622 004e 00                  .byte   0\r
- 2623 004f 03                  .uleb128 0x3\r
- 2624 0050 0E                  .uleb128 0xe\r
- 2625 0051 3A                  .uleb128 0x3a\r
- 2626 0052 0B                  .uleb128 0xb\r
- 2627 0053 3B                  .uleb128 0x3b\r
- 2628 0054 0B                  .uleb128 0xb\r
- 2629 0055 49                  .uleb128 0x49\r
- 2630 0056 13                  .uleb128 0x13\r
- 2631 0057 38                  .uleb128 0x38\r
- 2632 0058 0A                  .uleb128 0xa\r
- 2633 0059 00                  .byte   0\r
- 2634 005a 00                  .byte   0\r
- 2635 005b 08                  .uleb128 0x8\r
- 2636 005c 0F                  .uleb128 0xf\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 71\r
-\r
-\r
- 2637 005d 00                  .byte   0\r
- 2638 005e 0B                  .uleb128 0xb\r
- 2639 005f 0B                  .uleb128 0xb\r
- 2640 0060 49                  .uleb128 0x49\r
- 2641 0061 13                  .uleb128 0x13\r
- 2642 0062 00                  .byte   0\r
- 2643 0063 00                  .byte   0\r
- 2644 0064 09                  .uleb128 0x9\r
- 2645 0065 0D                  .uleb128 0xd\r
- 2646 0066 00                  .byte   0\r
- 2647 0067 03                  .uleb128 0x3\r
- 2648 0068 08                  .uleb128 0x8\r
- 2649 0069 3A                  .uleb128 0x3a\r
- 2650 006a 0B                  .uleb128 0xb\r
- 2651 006b 3B                  .uleb128 0x3b\r
- 2652 006c 0B                  .uleb128 0xb\r
- 2653 006d 49                  .uleb128 0x49\r
- 2654 006e 13                  .uleb128 0x13\r
- 2655 006f 38                  .uleb128 0x38\r
- 2656 0070 0A                  .uleb128 0xa\r
- 2657 0071 00                  .byte   0\r
- 2658 0072 00                  .byte   0\r
- 2659 0073 0A                  .uleb128 0xa\r
- 2660 0074 26                  .uleb128 0x26\r
- 2661 0075 00                  .byte   0\r
- 2662 0076 00                  .byte   0\r
- 2663 0077 00                  .byte   0\r
- 2664 0078 0B                  .uleb128 0xb\r
- 2665 0079 2E                  .uleb128 0x2e\r
- 2666 007a 00                  .byte   0\r
- 2667 007b 3F                  .uleb128 0x3f\r
- 2668 007c 0C                  .uleb128 0xc\r
- 2669 007d 03                  .uleb128 0x3\r
- 2670 007e 0E                  .uleb128 0xe\r
- 2671 007f 3A                  .uleb128 0x3a\r
- 2672 0080 0B                  .uleb128 0xb\r
- 2673 0081 3B                  .uleb128 0x3b\r
- 2674 0082 05                  .uleb128 0x5\r
- 2675 0083 27                  .uleb128 0x27\r
- 2676 0084 0C                  .uleb128 0xc\r
- 2677 0085 49                  .uleb128 0x49\r
- 2678 0086 13                  .uleb128 0x13\r
- 2679 0087 20                  .uleb128 0x20\r
- 2680 0088 0B                  .uleb128 0xb\r
- 2681 0089 00                  .byte   0\r
- 2682 008a 00                  .byte   0\r
- 2683 008b 0C                  .uleb128 0xc\r
- 2684 008c 26                  .uleb128 0x26\r
- 2685 008d 00                  .byte   0\r
- 2686 008e 49                  .uleb128 0x49\r
- 2687 008f 13                  .uleb128 0x13\r
- 2688 0090 00                  .byte   0\r
- 2689 0091 00                  .byte   0\r
- 2690 0092 0D                  .uleb128 0xd\r
- 2691 0093 2E                  .uleb128 0x2e\r
- 2692 0094 01                  .byte   0x1\r
- 2693 0095 3F                  .uleb128 0x3f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 72\r
-\r
-\r
- 2694 0096 0C                  .uleb128 0xc\r
- 2695 0097 03                  .uleb128 0x3\r
- 2696 0098 0E                  .uleb128 0xe\r
- 2697 0099 3A                  .uleb128 0x3a\r
- 2698 009a 0B                  .uleb128 0xb\r
- 2699 009b 3B                  .uleb128 0x3b\r
- 2700 009c 05                  .uleb128 0x5\r
- 2701 009d 27                  .uleb128 0x27\r
- 2702 009e 0C                  .uleb128 0xc\r
- 2703 009f 11                  .uleb128 0x11\r
- 2704 00a0 01                  .uleb128 0x1\r
- 2705 00a1 12                  .uleb128 0x12\r
- 2706 00a2 01                  .uleb128 0x1\r
- 2707 00a3 40                  .uleb128 0x40\r
- 2708 00a4 06                  .uleb128 0x6\r
- 2709 00a5 9742                .uleb128 0x2117\r
- 2710 00a7 0C                  .uleb128 0xc\r
- 2711 00a8 01                  .uleb128 0x1\r
- 2712 00a9 13                  .uleb128 0x13\r
- 2713 00aa 00                  .byte   0\r
- 2714 00ab 00                  .byte   0\r
- 2715 00ac 0E                  .uleb128 0xe\r
- 2716 00ad 34                  .uleb128 0x34\r
- 2717 00ae 00                  .byte   0\r
- 2718 00af 03                  .uleb128 0x3\r
- 2719 00b0 08                  .uleb128 0x8\r
- 2720 00b1 3A                  .uleb128 0x3a\r
- 2721 00b2 0B                  .uleb128 0xb\r
- 2722 00b3 3B                  .uleb128 0x3b\r
- 2723 00b4 05                  .uleb128 0x5\r
- 2724 00b5 49                  .uleb128 0x49\r
- 2725 00b6 13                  .uleb128 0x13\r
- 2726 00b7 02                  .uleb128 0x2\r
- 2727 00b8 06                  .uleb128 0x6\r
- 2728 00b9 00                  .byte   0\r
- 2729 00ba 00                  .byte   0\r
- 2730 00bb 0F                  .uleb128 0xf\r
- 2731 00bc 2E                  .uleb128 0x2e\r
- 2732 00bd 01                  .byte   0x1\r
- 2733 00be 3F                  .uleb128 0x3f\r
- 2734 00bf 0C                  .uleb128 0xc\r
- 2735 00c0 03                  .uleb128 0x3\r
- 2736 00c1 0E                  .uleb128 0xe\r
- 2737 00c2 3A                  .uleb128 0x3a\r
- 2738 00c3 0B                  .uleb128 0xb\r
- 2739 00c4 3B                  .uleb128 0x3b\r
- 2740 00c5 05                  .uleb128 0x5\r
- 2741 00c6 27                  .uleb128 0x27\r
- 2742 00c7 0C                  .uleb128 0xc\r
- 2743 00c8 49                  .uleb128 0x49\r
- 2744 00c9 13                  .uleb128 0x13\r
- 2745 00ca 11                  .uleb128 0x11\r
- 2746 00cb 01                  .uleb128 0x1\r
- 2747 00cc 12                  .uleb128 0x12\r
- 2748 00cd 01                  .uleb128 0x1\r
- 2749 00ce 40                  .uleb128 0x40\r
- 2750 00cf 0A                  .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 73\r
-\r
-\r
- 2751 00d0 9742                .uleb128 0x2117\r
- 2752 00d2 0C                  .uleb128 0xc\r
- 2753 00d3 01                  .uleb128 0x1\r
- 2754 00d4 13                  .uleb128 0x13\r
- 2755 00d5 00                  .byte   0\r
- 2756 00d6 00                  .byte   0\r
- 2757 00d7 10                  .uleb128 0x10\r
- 2758 00d8 05                  .uleb128 0x5\r
- 2759 00d9 00                  .byte   0\r
- 2760 00da 03                  .uleb128 0x3\r
- 2761 00db 08                  .uleb128 0x8\r
- 2762 00dc 3A                  .uleb128 0x3a\r
- 2763 00dd 0B                  .uleb128 0xb\r
- 2764 00de 3B                  .uleb128 0x3b\r
- 2765 00df 05                  .uleb128 0x5\r
- 2766 00e0 49                  .uleb128 0x49\r
- 2767 00e1 13                  .uleb128 0x13\r
- 2768 00e2 02                  .uleb128 0x2\r
- 2769 00e3 06                  .uleb128 0x6\r
- 2770 00e4 00                  .byte   0\r
- 2771 00e5 00                  .byte   0\r
- 2772 00e6 11                  .uleb128 0x11\r
- 2773 00e7 34                  .uleb128 0x34\r
- 2774 00e8 00                  .byte   0\r
- 2775 00e9 03                  .uleb128 0x3\r
- 2776 00ea 0E                  .uleb128 0xe\r
- 2777 00eb 3A                  .uleb128 0x3a\r
- 2778 00ec 0B                  .uleb128 0xb\r
- 2779 00ed 3B                  .uleb128 0x3b\r
- 2780 00ee 05                  .uleb128 0x5\r
- 2781 00ef 49                  .uleb128 0x49\r
- 2782 00f0 13                  .uleb128 0x13\r
- 2783 00f1 02                  .uleb128 0x2\r
- 2784 00f2 06                  .uleb128 0x6\r
- 2785 00f3 00                  .byte   0\r
- 2786 00f4 00                  .byte   0\r
- 2787 00f5 12                  .uleb128 0x12\r
- 2788 00f6 898201              .uleb128 0x4109\r
- 2789 00f9 00                  .byte   0\r
- 2790 00fa 11                  .uleb128 0x11\r
- 2791 00fb 01                  .uleb128 0x1\r
- 2792 00fc 31                  .uleb128 0x31\r
- 2793 00fd 13                  .uleb128 0x13\r
- 2794 00fe 00                  .byte   0\r
- 2795 00ff 00                  .byte   0\r
- 2796 0100 13                  .uleb128 0x13\r
- 2797 0101 2E                  .uleb128 0x2e\r
- 2798 0102 00                  .byte   0\r
- 2799 0103 31                  .uleb128 0x31\r
- 2800 0104 13                  .uleb128 0x13\r
- 2801 0105 11                  .uleb128 0x11\r
- 2802 0106 01                  .uleb128 0x1\r
- 2803 0107 12                  .uleb128 0x12\r
- 2804 0108 01                  .uleb128 0x1\r
- 2805 0109 40                  .uleb128 0x40\r
- 2806 010a 0A                  .uleb128 0xa\r
- 2807 010b 9742                .uleb128 0x2117\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 74\r
-\r
-\r
- 2808 010d 0C                  .uleb128 0xc\r
- 2809 010e 00                  .byte   0\r
- 2810 010f 00                  .byte   0\r
- 2811 0110 14                  .uleb128 0x14\r
- 2812 0111 2E                  .uleb128 0x2e\r
- 2813 0112 01                  .byte   0x1\r
- 2814 0113 3F                  .uleb128 0x3f\r
- 2815 0114 0C                  .uleb128 0xc\r
- 2816 0115 03                  .uleb128 0x3\r
- 2817 0116 0E                  .uleb128 0xe\r
- 2818 0117 3A                  .uleb128 0x3a\r
- 2819 0118 0B                  .uleb128 0xb\r
- 2820 0119 3B                  .uleb128 0x3b\r
- 2821 011a 05                  .uleb128 0x5\r
- 2822 011b 27                  .uleb128 0x27\r
- 2823 011c 0C                  .uleb128 0xc\r
- 2824 011d 49                  .uleb128 0x49\r
- 2825 011e 13                  .uleb128 0x13\r
- 2826 011f 11                  .uleb128 0x11\r
- 2827 0120 01                  .uleb128 0x1\r
- 2828 0121 12                  .uleb128 0x12\r
- 2829 0122 01                  .uleb128 0x1\r
- 2830 0123 40                  .uleb128 0x40\r
- 2831 0124 06                  .uleb128 0x6\r
- 2832 0125 9742                .uleb128 0x2117\r
- 2833 0127 0C                  .uleb128 0xc\r
- 2834 0128 01                  .uleb128 0x1\r
- 2835 0129 13                  .uleb128 0x13\r
- 2836 012a 00                  .byte   0\r
- 2837 012b 00                  .byte   0\r
- 2838 012c 15                  .uleb128 0x15\r
- 2839 012d 05                  .uleb128 0x5\r
- 2840 012e 00                  .byte   0\r
- 2841 012f 03                  .uleb128 0x3\r
- 2842 0130 0E                  .uleb128 0xe\r
- 2843 0131 3A                  .uleb128 0x3a\r
- 2844 0132 0B                  .uleb128 0xb\r
- 2845 0133 3B                  .uleb128 0x3b\r
- 2846 0134 05                  .uleb128 0x5\r
- 2847 0135 49                  .uleb128 0x49\r
- 2848 0136 13                  .uleb128 0x13\r
- 2849 0137 02                  .uleb128 0x2\r
- 2850 0138 06                  .uleb128 0x6\r
- 2851 0139 00                  .byte   0\r
- 2852 013a 00                  .byte   0\r
- 2853 013b 16                  .uleb128 0x16\r
- 2854 013c 898201              .uleb128 0x4109\r
- 2855 013f 01                  .byte   0x1\r
- 2856 0140 11                  .uleb128 0x11\r
- 2857 0141 01                  .uleb128 0x1\r
- 2858 0142 31                  .uleb128 0x31\r
- 2859 0143 13                  .uleb128 0x13\r
- 2860 0144 01                  .uleb128 0x1\r
- 2861 0145 13                  .uleb128 0x13\r
- 2862 0146 00                  .byte   0\r
- 2863 0147 00                  .byte   0\r
- 2864 0148 17                  .uleb128 0x17\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 75\r
-\r
-\r
- 2865 0149 8A8201              .uleb128 0x410a\r
- 2866 014c 00                  .byte   0\r
- 2867 014d 02                  .uleb128 0x2\r
- 2868 014e 0A                  .uleb128 0xa\r
- 2869 014f 9142                .uleb128 0x2111\r
- 2870 0151 0A                  .uleb128 0xa\r
- 2871 0152 00                  .byte   0\r
- 2872 0153 00                  .byte   0\r
- 2873 0154 18                  .uleb128 0x18\r
- 2874 0155 898201              .uleb128 0x4109\r
- 2875 0158 00                  .byte   0\r
- 2876 0159 11                  .uleb128 0x11\r
- 2877 015a 01                  .uleb128 0x1\r
- 2878 015b 9542                .uleb128 0x2115\r
- 2879 015d 0C                  .uleb128 0xc\r
- 2880 015e 31                  .uleb128 0x31\r
- 2881 015f 13                  .uleb128 0x13\r
- 2882 0160 00                  .byte   0\r
- 2883 0161 00                  .byte   0\r
- 2884 0162 19                  .uleb128 0x19\r
- 2885 0163 2E                  .uleb128 0x2e\r
- 2886 0164 01                  .byte   0x1\r
- 2887 0165 3F                  .uleb128 0x3f\r
- 2888 0166 0C                  .uleb128 0xc\r
- 2889 0167 03                  .uleb128 0x3\r
- 2890 0168 0E                  .uleb128 0xe\r
- 2891 0169 3A                  .uleb128 0x3a\r
- 2892 016a 0B                  .uleb128 0xb\r
- 2893 016b 3B                  .uleb128 0x3b\r
- 2894 016c 05                  .uleb128 0x5\r
- 2895 016d 27                  .uleb128 0x27\r
- 2896 016e 0C                  .uleb128 0xc\r
- 2897 016f 11                  .uleb128 0x11\r
- 2898 0170 01                  .uleb128 0x1\r
- 2899 0171 12                  .uleb128 0x12\r
- 2900 0172 01                  .uleb128 0x1\r
- 2901 0173 40                  .uleb128 0x40\r
- 2902 0174 0A                  .uleb128 0xa\r
- 2903 0175 9742                .uleb128 0x2117\r
- 2904 0177 0C                  .uleb128 0xc\r
- 2905 0178 01                  .uleb128 0x1\r
- 2906 0179 13                  .uleb128 0x13\r
- 2907 017a 00                  .byte   0\r
- 2908 017b 00                  .byte   0\r
- 2909 017c 1A                  .uleb128 0x1a\r
- 2910 017d 34                  .uleb128 0x34\r
- 2911 017e 00                  .byte   0\r
- 2912 017f 03                  .uleb128 0x3\r
- 2913 0180 0E                  .uleb128 0xe\r
- 2914 0181 3A                  .uleb128 0x3a\r
- 2915 0182 0B                  .uleb128 0xb\r
- 2916 0183 3B                  .uleb128 0x3b\r
- 2917 0184 05                  .uleb128 0x5\r
- 2918 0185 49                  .uleb128 0x49\r
- 2919 0186 13                  .uleb128 0x13\r
- 2920 0187 1C                  .uleb128 0x1c\r
- 2921 0188 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 76\r
-\r
-\r
- 2922 0189 00                  .byte   0\r
- 2923 018a 00                  .byte   0\r
- 2924 018b 1B                  .uleb128 0x1b\r
- 2925 018c 34                  .uleb128 0x34\r
- 2926 018d 00                  .byte   0\r
- 2927 018e 03                  .uleb128 0x3\r
- 2928 018f 0E                  .uleb128 0xe\r
- 2929 0190 3A                  .uleb128 0x3a\r
- 2930 0191 0B                  .uleb128 0xb\r
- 2931 0192 3B                  .uleb128 0x3b\r
- 2932 0193 05                  .uleb128 0x5\r
- 2933 0194 49                  .uleb128 0x49\r
- 2934 0195 13                  .uleb128 0x13\r
- 2935 0196 02                  .uleb128 0x2\r
- 2936 0197 0A                  .uleb128 0xa\r
- 2937 0198 00                  .byte   0\r
- 2938 0199 00                  .byte   0\r
- 2939 019a 1C                  .uleb128 0x1c\r
- 2940 019b 2E                  .uleb128 0x2e\r
- 2941 019c 01                  .byte   0x1\r
- 2942 019d 3F                  .uleb128 0x3f\r
- 2943 019e 0C                  .uleb128 0xc\r
- 2944 019f 03                  .uleb128 0x3\r
- 2945 01a0 0E                  .uleb128 0xe\r
- 2946 01a1 3A                  .uleb128 0x3a\r
- 2947 01a2 0B                  .uleb128 0xb\r
- 2948 01a3 3B                  .uleb128 0x3b\r
- 2949 01a4 0B                  .uleb128 0xb\r
- 2950 01a5 27                  .uleb128 0x27\r
- 2951 01a6 0C                  .uleb128 0xc\r
- 2952 01a7 49                  .uleb128 0x49\r
- 2953 01a8 13                  .uleb128 0x13\r
- 2954 01a9 11                  .uleb128 0x11\r
- 2955 01aa 01                  .uleb128 0x1\r
- 2956 01ab 12                  .uleb128 0x12\r
- 2957 01ac 01                  .uleb128 0x1\r
- 2958 01ad 40                  .uleb128 0x40\r
- 2959 01ae 06                  .uleb128 0x6\r
- 2960 01af 9742                .uleb128 0x2117\r
- 2961 01b1 0C                  .uleb128 0xc\r
- 2962 01b2 01                  .uleb128 0x1\r
- 2963 01b3 13                  .uleb128 0x13\r
- 2964 01b4 00                  .byte   0\r
- 2965 01b5 00                  .byte   0\r
- 2966 01b6 1D                  .uleb128 0x1d\r
- 2967 01b7 34                  .uleb128 0x34\r
- 2968 01b8 00                  .byte   0\r
- 2969 01b9 03                  .uleb128 0x3\r
- 2970 01ba 0E                  .uleb128 0xe\r
- 2971 01bb 3A                  .uleb128 0x3a\r
- 2972 01bc 0B                  .uleb128 0xb\r
- 2973 01bd 3B                  .uleb128 0x3b\r
- 2974 01be 0B                  .uleb128 0xb\r
- 2975 01bf 49                  .uleb128 0x49\r
- 2976 01c0 13                  .uleb128 0x13\r
- 2977 01c1 02                  .uleb128 0x2\r
- 2978 01c2 06                  .uleb128 0x6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 77\r
-\r
-\r
- 2979 01c3 00                  .byte   0\r
- 2980 01c4 00                  .byte   0\r
- 2981 01c5 1E                  .uleb128 0x1e\r
- 2982 01c6 34                  .uleb128 0x34\r
- 2983 01c7 00                  .byte   0\r
- 2984 01c8 03                  .uleb128 0x3\r
- 2985 01c9 0E                  .uleb128 0xe\r
- 2986 01ca 3A                  .uleb128 0x3a\r
- 2987 01cb 0B                  .uleb128 0xb\r
- 2988 01cc 3B                  .uleb128 0x3b\r
- 2989 01cd 0B                  .uleb128 0xb\r
- 2990 01ce 49                  .uleb128 0x49\r
- 2991 01cf 13                  .uleb128 0x13\r
- 2992 01d0 02                  .uleb128 0x2\r
- 2993 01d1 0A                  .uleb128 0xa\r
- 2994 01d2 00                  .byte   0\r
- 2995 01d3 00                  .byte   0\r
- 2996 01d4 1F                  .uleb128 0x1f\r
- 2997 01d5 1D                  .uleb128 0x1d\r
- 2998 01d6 00                  .byte   0\r
- 2999 01d7 31                  .uleb128 0x31\r
- 3000 01d8 13                  .uleb128 0x13\r
- 3001 01d9 11                  .uleb128 0x11\r
- 3002 01da 01                  .uleb128 0x1\r
- 3003 01db 12                  .uleb128 0x12\r
- 3004 01dc 01                  .uleb128 0x1\r
- 3005 01dd 58                  .uleb128 0x58\r
- 3006 01de 0B                  .uleb128 0xb\r
- 3007 01df 59                  .uleb128 0x59\r
- 3008 01e0 0B                  .uleb128 0xb\r
- 3009 01e1 00                  .byte   0\r
- 3010 01e2 00                  .byte   0\r
- 3011 01e3 20                  .uleb128 0x20\r
- 3012 01e4 01                  .uleb128 0x1\r
- 3013 01e5 01                  .byte   0x1\r
- 3014 01e6 49                  .uleb128 0x49\r
- 3015 01e7 13                  .uleb128 0x13\r
- 3016 01e8 01                  .uleb128 0x1\r
- 3017 01e9 13                  .uleb128 0x13\r
- 3018 01ea 00                  .byte   0\r
- 3019 01eb 00                  .byte   0\r
- 3020 01ec 21                  .uleb128 0x21\r
- 3021 01ed 21                  .uleb128 0x21\r
- 3022 01ee 00                  .byte   0\r
- 3023 01ef 49                  .uleb128 0x49\r
- 3024 01f0 13                  .uleb128 0x13\r
- 3025 01f1 2F                  .uleb128 0x2f\r
- 3026 01f2 0B                  .uleb128 0xb\r
- 3027 01f3 00                  .byte   0\r
- 3028 01f4 00                  .byte   0\r
- 3029 01f5 22                  .uleb128 0x22\r
- 3030 01f6 34                  .uleb128 0x34\r
- 3031 01f7 00                  .byte   0\r
- 3032 01f8 03                  .uleb128 0x3\r
- 3033 01f9 0E                  .uleb128 0xe\r
- 3034 01fa 3A                  .uleb128 0x3a\r
- 3035 01fb 0B                  .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 78\r
-\r
-\r
- 3036 01fc 3B                  .uleb128 0x3b\r
- 3037 01fd 05                  .uleb128 0x5\r
- 3038 01fe 49                  .uleb128 0x49\r
- 3039 01ff 13                  .uleb128 0x13\r
- 3040 0200 3F                  .uleb128 0x3f\r
- 3041 0201 0C                  .uleb128 0xc\r
- 3042 0202 3C                  .uleb128 0x3c\r
- 3043 0203 0C                  .uleb128 0xc\r
- 3044 0204 00                  .byte   0\r
- 3045 0205 00                  .byte   0\r
- 3046 0206 23                  .uleb128 0x23\r
- 3047 0207 34                  .uleb128 0x34\r
- 3048 0208 00                  .byte   0\r
- 3049 0209 03                  .uleb128 0x3\r
- 3050 020a 0E                  .uleb128 0xe\r
- 3051 020b 3A                  .uleb128 0x3a\r
- 3052 020c 0B                  .uleb128 0xb\r
- 3053 020d 3B                  .uleb128 0x3b\r
- 3054 020e 0B                  .uleb128 0xb\r
- 3055 020f 49                  .uleb128 0x49\r
- 3056 0210 13                  .uleb128 0x13\r
- 3057 0211 3F                  .uleb128 0x3f\r
- 3058 0212 0C                  .uleb128 0xc\r
- 3059 0213 3C                  .uleb128 0x3c\r
- 3060 0214 0C                  .uleb128 0xc\r
- 3061 0215 00                  .byte   0\r
- 3062 0216 00                  .byte   0\r
- 3063 0217 24                  .uleb128 0x24\r
- 3064 0218 2E                  .uleb128 0x2e\r
- 3065 0219 00                  .byte   0\r
- 3066 021a 3F                  .uleb128 0x3f\r
- 3067 021b 0C                  .uleb128 0xc\r
- 3068 021c 03                  .uleb128 0x3\r
- 3069 021d 0E                  .uleb128 0xe\r
- 3070 021e 3A                  .uleb128 0x3a\r
- 3071 021f 0B                  .uleb128 0xb\r
- 3072 0220 3B                  .uleb128 0x3b\r
- 3073 0221 0B                  .uleb128 0xb\r
- 3074 0222 27                  .uleb128 0x27\r
- 3075 0223 0C                  .uleb128 0xc\r
- 3076 0224 49                  .uleb128 0x49\r
- 3077 0225 13                  .uleb128 0x13\r
- 3078 0226 3C                  .uleb128 0x3c\r
- 3079 0227 0C                  .uleb128 0xc\r
- 3080 0228 00                  .byte   0\r
- 3081 0229 00                  .byte   0\r
- 3082 022a 00                  .byte   0\r
- 3083                          .section        .debug_loc,"",%progbits\r
- 3084                  .Ldebug_loc0:\r
- 3085                  .LLST0:\r
- 3086 0000 00000000            .4byte  .LFB1\r
- 3087 0004 02000000            .4byte  .LCFI0\r
- 3088 0008 0200                .2byte  0x2\r
- 3089 000a 7D                  .byte   0x7d\r
- 3090 000b 00                  .sleb128 0\r
- 3091 000c 02000000            .4byte  .LCFI0\r
- 3092 0010 B4000000            .4byte  .LFE1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 79\r
-\r
-\r
- 3093 0014 0200                .2byte  0x2\r
- 3094 0016 7D                  .byte   0x7d\r
- 3095 0017 0C                  .sleb128 12\r
- 3096 0018 00000000            .4byte  0\r
- 3097 001c 00000000            .4byte  0\r
- 3098                  .LLST1:\r
- 3099 0020 00000000            .4byte  .LVL0\r
- 3100 0024 04000000            .4byte  .LVL1\r
- 3101 0028 0200                .2byte  0x2\r
- 3102 002a 31                  .byte   0x31\r
- 3103 002b 9F                  .byte   0x9f\r
- 3104 002c 0E000000            .4byte  .LVL2\r
- 3105 0030 48000000            .4byte  .LVL4\r
- 3106 0034 0100                .2byte  0x1\r
- 3107 0036 52                  .byte   0x52\r
- 3108 0037 48000000            .4byte  .LVL4\r
- 3109 003b 7C000000            .4byte  .LVL5\r
- 3110 003f 0300                .2byte  0x3\r
- 3111 0041 72                  .byte   0x72\r
- 3112 0042 7F                  .sleb128 -1\r
- 3113 0043 9F                  .byte   0x9f\r
- 3114 0044 7C000000            .4byte  .LVL5\r
- 3115 0048 8C000000            .4byte  .LVL7\r
- 3116 004c 0100                .2byte  0x1\r
- 3117 004e 52                  .byte   0x52\r
- 3118 004f 00000000            .4byte  0\r
- 3119 0053 00000000            .4byte  0\r
- 3120                  .LLST2:\r
- 3121 0057 00000000            .4byte  .LVL0\r
- 3122 005b 04000000            .4byte  .LVL1\r
- 3123 005f 0200                .2byte  0x2\r
- 3124 0061 30                  .byte   0x30\r
- 3125 0062 9F                  .byte   0x9f\r
- 3126 0063 0E000000            .4byte  .LVL2\r
- 3127 0067 18000000            .4byte  .LVL3\r
- 3128 006b 0100                .2byte  0x1\r
- 3129 006d 50                  .byte   0x50\r
- 3130 006e 18000000            .4byte  .LVL3\r
- 3131 0072 7C000000            .4byte  .LVL5\r
- 3132 0076 0100                .2byte  0x1\r
- 3133 0078 53                  .byte   0x53\r
- 3134 0079 88000000            .4byte  .LVL6\r
- 3135 007d B4000000            .4byte  .LFE1\r
- 3136 0081 0100                .2byte  0x1\r
- 3137 0083 50                  .byte   0x50\r
- 3138 0084 00000000            .4byte  0\r
- 3139 0088 00000000            .4byte  0\r
- 3140                  .LLST3:\r
- 3141 008c 00000000            .4byte  .LVL8\r
- 3142 0090 10000000            .4byte  .LVL11\r
- 3143 0094 0100                .2byte  0x1\r
- 3144 0096 50                  .byte   0x50\r
- 3145 0097 10000000            .4byte  .LVL11\r
- 3146 009b 1C000000            .4byte  .LFE4\r
- 3147 009f 0400                .2byte  0x4\r
- 3148 00a1 F3                  .byte   0xf3\r
- 3149 00a2 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 80\r
-\r
-\r
- 3150 00a3 50                  .byte   0x50\r
- 3151 00a4 9F                  .byte   0x9f\r
- 3152 00a5 00000000            .4byte  0\r
- 3153 00a9 00000000            .4byte  0\r
- 3154                  .LLST4:\r
- 3155 00ad 06000000            .4byte  .LVL9\r
- 3156 00b1 0C000000            .4byte  .LVL10\r
- 3157 00b5 0700                .2byte  0x7\r
- 3158 00b7 72                  .byte   0x72\r
- 3159 00b8 00                  .sleb128 0\r
- 3160 00b9 08                  .byte   0x8\r
- 3161 00ba FF                  .byte   0xff\r
- 3162 00bb 1A                  .byte   0x1a\r
- 3163 00bc 33                  .byte   0x33\r
- 3164 00bd 24                  .byte   0x24\r
- 3165 00be 00000000            .4byte  0\r
- 3166 00c2 00000000            .4byte  0\r
- 3167                  .LLST5:\r
- 3168 00c6 00000000            .4byte  .LFB3\r
- 3169 00ca 02000000            .4byte  .LCFI1\r
- 3170 00ce 0200                .2byte  0x2\r
- 3171 00d0 7D                  .byte   0x7d\r
- 3172 00d1 00                  .sleb128 0\r
- 3173 00d2 02000000            .4byte  .LCFI1\r
- 3174 00d6 28010000            .4byte  .LFE3\r
- 3175 00da 0200                .2byte  0x2\r
- 3176 00dc 7D                  .byte   0x7d\r
- 3177 00dd 18                  .sleb128 24\r
- 3178 00de 00000000            .4byte  0\r
- 3179 00e2 00000000            .4byte  0\r
- 3180                  .LLST6:\r
- 3181 00e6 18000000            .4byte  .LVL13\r
- 3182 00ea 1C000000            .4byte  .LVL15\r
- 3183 00ee 0200                .2byte  0x2\r
- 3184 00f0 70                  .byte   0x70\r
- 3185 00f1 08                  .sleb128 8\r
- 3186 00f2 1C000000            .4byte  .LVL15\r
- 3187 00f6 F4000000            .4byte  .LVL28\r
- 3188 00fa 0100                .2byte  0x1\r
- 3189 00fc 55                  .byte   0x55\r
- 3190 00fd 00000000            .4byte  0\r
- 3191 0101 00000000            .4byte  0\r
- 3192                  .LLST7:\r
- 3193 0105 4A000000            .4byte  .LVL16\r
- 3194 0109 98000000            .4byte  .LVL23\r
- 3195 010d 0100                .2byte  0x1\r
- 3196 010f 52                  .byte   0x52\r
- 3197 0110 98000000            .4byte  .LVL23\r
- 3198 0114 EC000000            .4byte  .LVL25\r
- 3199 0118 0800                .2byte  0x8\r
- 3200 011a 73                  .byte   0x73\r
- 3201 011b 7A                  .sleb128 -6\r
- 3202 011c 94                  .byte   0x94\r
- 3203 011d 01                  .byte   0x1\r
- 3204 011e 08                  .byte   0x8\r
- 3205 011f 7F                  .byte   0x7f\r
- 3206 0120 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 81\r
-\r
-\r
- 3207 0121 9F                  .byte   0x9f\r
- 3208 0122 00000000            .4byte  0\r
- 3209 0126 00000000            .4byte  0\r
- 3210                  .LLST8:\r
- 3211 012a 18000000            .4byte  .LVL13\r
- 3212 012e 1C000000            .4byte  .LVL15\r
- 3213 0132 0200                .2byte  0x2\r
- 3214 0134 30                  .byte   0x30\r
- 3215 0135 9F                  .byte   0x9f\r
- 3216 0136 1C000000            .4byte  .LVL15\r
- 3217 013a EE000000            .4byte  .LVL26\r
- 3218 013e 0100                .2byte  0x1\r
- 3219 0140 50                  .byte   0x50\r
- 3220 0141 EE000000            .4byte  .LVL26\r
- 3221 0145 F0000000            .4byte  .LVL27\r
- 3222 0149 0300                .2byte  0x3\r
- 3223 014b 70                  .byte   0x70\r
- 3224 014c 7F                  .sleb128 -1\r
- 3225 014d 9F                  .byte   0x9f\r
- 3226 014e F0000000            .4byte  .LVL27\r
- 3227 0152 F4000000            .4byte  .LVL28\r
- 3228 0156 0100                .2byte  0x1\r
- 3229 0158 50                  .byte   0x50\r
- 3230 0159 00000000            .4byte  0\r
- 3231 015d 00000000            .4byte  0\r
- 3232                  .LLST9:\r
- 3233 0161 62000000            .4byte  .LVL19\r
- 3234 0165 74000000            .4byte  .LVL20\r
- 3235 0169 0100                .2byte  0x1\r
- 3236 016b 56                  .byte   0x56\r
- 3237 016c 74000000            .4byte  .LVL20\r
- 3238 0170 76000000            .4byte  .LVL21\r
- 3239 0174 0700                .2byte  0x7\r
- 3240 0176 73                  .byte   0x73\r
- 3241 0177 7B                  .sleb128 -5\r
- 3242 0178 94                  .byte   0x94\r
- 3243 0179 01                  .byte   0x1\r
- 3244 017a 33                  .byte   0x33\r
- 3245 017b 1A                  .byte   0x1a\r
- 3246 017c 9F                  .byte   0x9f\r
- 3247 017d 76000000            .4byte  .LVL21\r
- 3248 0181 82000000            .4byte  .LVL22\r
- 3249 0185 0100                .2byte  0x1\r
- 3250 0187 56                  .byte   0x56\r
- 3251 0188 82000000            .4byte  .LVL22\r
- 3252 018c EC000000            .4byte  .LVL25\r
- 3253 0190 0700                .2byte  0x7\r
- 3254 0192 73                  .byte   0x73\r
- 3255 0193 7B                  .sleb128 -5\r
- 3256 0194 94                  .byte   0x94\r
- 3257 0195 01                  .byte   0x1\r
- 3258 0196 33                  .byte   0x33\r
- 3259 0197 1A                  .byte   0x1a\r
- 3260 0198 9F                  .byte   0x9f\r
- 3261 0199 00000000            .4byte  0\r
- 3262 019d 00000000            .4byte  0\r
- 3263                  .LLST10:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 82\r
-\r
-\r
- 3264 01a1 50000000            .4byte  .LVL17\r
- 3265 01a5 56000000            .4byte  .LVL18\r
- 3266 01a9 0100                .2byte  0x1\r
- 3267 01ab 54                  .byte   0x54\r
- 3268 01ac 56000000            .4byte  .LVL18\r
- 3269 01b0 E6000000            .4byte  .LVL24\r
- 3270 01b4 0100                .2byte  0x1\r
- 3271 01b6 51                  .byte   0x51\r
- 3272 01b7 E6000000            .4byte  .LVL24\r
- 3273 01bb EC000000            .4byte  .LVL25\r
- 3274 01bf 0700                .2byte  0x7\r
- 3275 01c1 74                  .byte   0x74\r
- 3276 01c2 FBBEFEFF            .sleb128 -1073766533\r
- 3276      7B\r
- 3277 01c7 9F                  .byte   0x9f\r
- 3278 01c8 00000000            .4byte  0\r
- 3279 01cc 00000000            .4byte  0\r
- 3280                  .LLST11:\r
- 3281 01d0 14000000            .4byte  .LVL12\r
- 3282 01d4 1C000000            .4byte  .LVL15\r
- 3283 01d8 0300                .2byte  0x3\r
- 3284 01da 70                  .byte   0x70\r
- 3285 01db 08                  .sleb128 8\r
- 3286 01dc 9F                  .byte   0x9f\r
- 3287 01dd 00000000            .4byte  0\r
- 3288 01e1 00000000            .4byte  0\r
- 3289                  .LLST12:\r
- 3290 01e5 18000000            .4byte  .LVL13\r
- 3291 01e9 1A000000            .4byte  .LVL14\r
- 3292 01ed 0100                .2byte  0x1\r
- 3293 01ef 53                  .byte   0x53\r
- 3294 01f0 1A000000            .4byte  .LVL14\r
- 3295 01f4 1C000000            .4byte  .LVL15\r
- 3296 01f8 0200                .2byte  0x2\r
- 3297 01fa 70                  .byte   0x70\r
- 3298 01fb 0C                  .sleb128 12\r
- 3299 01fc 00000000            .4byte  0\r
- 3300 0200 00000000            .4byte  0\r
- 3301                  .LLST13:\r
- 3302 0204 00000000            .4byte  .LFB6\r
- 3303 0208 02000000            .4byte  .LCFI2\r
- 3304 020c 0200                .2byte  0x2\r
- 3305 020e 7D                  .byte   0x7d\r
- 3306 020f 00                  .sleb128 0\r
- 3307 0210 02000000            .4byte  .LCFI2\r
- 3308 0214 20000000            .4byte  .LFE6\r
- 3309 0218 0200                .2byte  0x2\r
- 3310 021a 7D                  .byte   0x7d\r
- 3311 021b 08                  .sleb128 8\r
- 3312 021c 00000000            .4byte  0\r
- 3313 0220 00000000            .4byte  0\r
- 3314                  .LLST14:\r
- 3315 0224 0E000000            .4byte  .LVL29\r
- 3316 0228 12000000            .4byte  .LVL30\r
- 3317 022c 0100                .2byte  0x1\r
- 3318 022e 50                  .byte   0x50\r
- 3319 022f 12000000            .4byte  .LVL30\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 83\r
-\r
-\r
- 3320 0233 16000000            .4byte  .LVL31\r
- 3321 0237 0800                .2byte  0x8\r
- 3322 0239 73                  .byte   0x73\r
- 3323 023a 02                  .sleb128 2\r
- 3324 023b 33                  .byte   0x33\r
- 3325 023c 24                  .byte   0x24\r
- 3326 023d 70                  .byte   0x70\r
- 3327 023e 00                  .sleb128 0\r
- 3328 023f 22                  .byte   0x22\r
- 3329 0240 9F                  .byte   0x9f\r
- 3330 0241 00000000            .4byte  0\r
- 3331 0245 00000000            .4byte  0\r
- 3332                  .LLST15:\r
- 3333 0249 0E000000            .4byte  .LVL29\r
- 3334 024d 16000000            .4byte  .LVL31\r
- 3335 0251 0500                .2byte  0x5\r
- 3336 0253 70                  .byte   0x70\r
- 3337 0254 04                  .sleb128 4\r
- 3338 0255 06                  .byte   0x6\r
- 3339 0256 23                  .byte   0x23\r
- 3340 0257 04                  .uleb128 0x4\r
- 3341 0258 16000000            .4byte  .LVL31\r
- 3342 025c 20000000            .4byte  .LFE6\r
- 3343 0260 0200                .2byte  0x2\r
- 3344 0262 72                  .byte   0x72\r
- 3345 0263 04                  .sleb128 4\r
- 3346 0264 00000000            .4byte  0\r
- 3347 0268 00000000            .4byte  0\r
- 3348                  .LLST16:\r
- 3349 026c 00000000            .4byte  .LFB2\r
- 3350 0270 02000000            .4byte  .LCFI3\r
- 3351 0274 0200                .2byte  0x2\r
- 3352 0276 7D                  .byte   0x7d\r
- 3353 0277 00                  .sleb128 0\r
- 3354 0278 02000000            .4byte  .LCFI3\r
- 3355 027c 68010000            .4byte  .LFE2\r
- 3356 0280 0200                .2byte  0x2\r
- 3357 0282 7D                  .byte   0x7d\r
- 3358 0283 18                  .sleb128 24\r
- 3359 0284 00000000            .4byte  0\r
- 3360 0288 00000000            .4byte  0\r
- 3361                  .LLST17:\r
- 3362 028c 00000000            .4byte  .LVL32\r
- 3363 0290 2A000000            .4byte  .LVL34\r
- 3364 0294 0100                .2byte  0x1\r
- 3365 0296 50                  .byte   0x50\r
- 3366 0297 2A000000            .4byte  .LVL34\r
- 3367 029b 68010000            .4byte  .LFE2\r
- 3368 029f 0400                .2byte  0x4\r
- 3369 02a1 F3                  .byte   0xf3\r
- 3370 02a2 01                  .uleb128 0x1\r
- 3371 02a3 50                  .byte   0x50\r
- 3372 02a4 9F                  .byte   0x9f\r
- 3373 02a5 00000000            .4byte  0\r
- 3374 02a9 00000000            .4byte  0\r
- 3375                  .LLST18:\r
- 3376 02ad 00000000            .4byte  .LVL32\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 84\r
-\r
-\r
- 3377 02b1 04000000            .4byte  .LVL33\r
- 3378 02b5 0200                .2byte  0x2\r
- 3379 02b7 30                  .byte   0x30\r
- 3380 02b8 9F                  .byte   0x9f\r
- 3381 02b9 64000000            .4byte  .LVL39\r
- 3382 02bd 02010000            .4byte  .LVL51\r
- 3383 02c1 0200                .2byte  0x2\r
- 3384 02c3 70                  .byte   0x70\r
- 3385 02c4 08                  .sleb128 8\r
- 3386 02c5 02010000            .4byte  .LVL51\r
- 3387 02c9 2E010000            .4byte  .LVL55\r
- 3388 02cd 0100                .2byte  0x1\r
- 3389 02cf 54                  .byte   0x54\r
- 3390 02d0 2E010000            .4byte  .LVL55\r
- 3391 02d4 30010000            .4byte  .LVL56\r
- 3392 02d8 0200                .2byte  0x2\r
- 3393 02da 31                  .byte   0x31\r
- 3394 02db 9F                  .byte   0x9f\r
- 3395 02dc 00000000            .4byte  0\r
- 3396 02e0 00000000            .4byte  0\r
- 3397                  .LLST19:\r
- 3398 02e4 66000000            .4byte  .LVL40\r
- 3399 02e8 6C000000            .4byte  .LVL42\r
- 3400 02ec 0200                .2byte  0x2\r
- 3401 02ee 30                  .byte   0x30\r
- 3402 02ef 9F                  .byte   0x9f\r
- 3403 02f0 6C000000            .4byte  .LVL42\r
- 3404 02f4 F2000000            .4byte  .LVL48\r
- 3405 02f8 0100                .2byte  0x1\r
- 3406 02fa 51                  .byte   0x51\r
- 3407 02fb F2000000            .4byte  .LVL48\r
- 3408 02ff F4000000            .4byte  .LVL49\r
- 3409 0303 0300                .2byte  0x3\r
- 3410 0305 71                  .byte   0x71\r
- 3411 0306 7F                  .sleb128 -1\r
- 3412 0307 9F                  .byte   0x9f\r
- 3413 0308 F4000000            .4byte  .LVL49\r
- 3414 030c 02010000            .4byte  .LVL51\r
- 3415 0310 0100                .2byte  0x1\r
- 3416 0312 51                  .byte   0x51\r
- 3417 0313 00000000            .4byte  0\r
- 3418 0317 00000000            .4byte  0\r
- 3419                  .LLST20:\r
- 3420 031b 64000000            .4byte  .LVL39\r
- 3421 031f 66000000            .4byte  .LVL40\r
- 3422 0323 0200                .2byte  0x2\r
- 3423 0325 31                  .byte   0x31\r
- 3424 0326 9F                  .byte   0x9f\r
- 3425 0327 FE000000            .4byte  .LVL50\r
- 3426 032b 02010000            .4byte  .LVL51\r
- 3427 032f 0200                .2byte  0x2\r
- 3428 0331 30                  .byte   0x30\r
- 3429 0332 9F                  .byte   0x9f\r
- 3430 0333 02010000            .4byte  .LVL51\r
- 3431 0337 1E010000            .4byte  .LVL52\r
- 3432 033b 0100                .2byte  0x1\r
- 3433 033d 52                  .byte   0x52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 85\r
-\r
-\r
- 3434 033e 1E010000            .4byte  .LVL52\r
- 3435 0342 22010000            .4byte  .LVL53\r
- 3436 0346 0300                .2byte  0x3\r
- 3437 0348 72                  .byte   0x72\r
- 3438 0349 7F                  .sleb128 -1\r
- 3439 034a 9F                  .byte   0x9f\r
- 3440 034b 22010000            .4byte  .LVL53\r
- 3441 034f 27010000            .4byte  .LVL54-1\r
- 3442 0353 0100                .2byte  0x1\r
- 3443 0355 52                  .byte   0x52\r
- 3444 0356 00000000            .4byte  0\r
- 3445 035a 00000000            .4byte  0\r
- 3446                  .LLST21:\r
- 3447 035e B8000000            .4byte  .LVL43\r
- 3448 0362 CA000000            .4byte  .LVL44\r
- 3449 0366 0100                .2byte  0x1\r
- 3450 0368 56                  .byte   0x56\r
- 3451 0369 CA000000            .4byte  .LVL44\r
- 3452 036d CC000000            .4byte  .LVL45\r
- 3453 0371 0700                .2byte  0x7\r
- 3454 0373 73                  .byte   0x73\r
- 3455 0374 7B                  .sleb128 -5\r
- 3456 0375 94                  .byte   0x94\r
- 3457 0376 01                  .byte   0x1\r
- 3458 0377 33                  .byte   0x33\r
- 3459 0378 1A                  .byte   0x1a\r
- 3460 0379 9F                  .byte   0x9f\r
- 3461 037a CC000000            .4byte  .LVL45\r
- 3462 037e D8000000            .4byte  .LVL46\r
- 3463 0382 0100                .2byte  0x1\r
- 3464 0384 56                  .byte   0x56\r
- 3465 0385 D8000000            .4byte  .LVL46\r
- 3466 0389 F0000000            .4byte  .LVL47\r
- 3467 038d 0700                .2byte  0x7\r
- 3468 038f 73                  .byte   0x73\r
- 3469 0390 7B                  .sleb128 -5\r
- 3470 0391 94                  .byte   0x94\r
- 3471 0392 01                  .byte   0x1\r
- 3472 0393 33                  .byte   0x33\r
- 3473 0394 1A                  .byte   0x1a\r
- 3474 0395 9F                  .byte   0x9f\r
- 3475 0396 00000000            .4byte  0\r
- 3476 039a 00000000            .4byte  0\r
- 3477                  .LLST22:\r
- 3478 039e 44000000            .4byte  .LVL36\r
- 3479 03a2 02010000            .4byte  .LVL51\r
- 3480 03a6 0200                .2byte  0x2\r
- 3481 03a8 70                  .byte   0x70\r
- 3482 03a9 04                  .sleb128 4\r
- 3483 03aa 00000000            .4byte  0\r
- 3484 03ae 00000000            .4byte  0\r
- 3485                  .LLST23:\r
- 3486 03b2 00000000            .4byte  .LVL32\r
- 3487 03b6 30010000            .4byte  .LVL56\r
- 3488 03ba 0200                .2byte  0x2\r
- 3489 03bc 30                  .byte   0x30\r
- 3490 03bd 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 86\r
-\r
-\r
- 3491 03be 44010000            .4byte  .LVL57\r
- 3492 03c2 4D010000            .4byte  .LVL58-1\r
- 3493 03c6 0100                .2byte  0x1\r
- 3494 03c8 52                  .byte   0x52\r
- 3495 03c9 4E010000            .4byte  .LVL58\r
- 3496 03cd 68010000            .4byte  .LFE2\r
- 3497 03d1 0200                .2byte  0x2\r
- 3498 03d3 30                  .byte   0x30\r
- 3499 03d4 9F                  .byte   0x9f\r
- 3500 03d5 00000000            .4byte  0\r
- 3501 03d9 00000000            .4byte  0\r
- 3502                  .LLST24:\r
- 3503 03dd 44000000            .4byte  .LVL36\r
- 3504 03e1 64000000            .4byte  .LVL39\r
- 3505 03e5 0100                .2byte  0x1\r
- 3506 03e7 50                  .byte   0x50\r
- 3507 03e8 64000000            .4byte  .LVL39\r
- 3508 03ec 02010000            .4byte  .LVL51\r
- 3509 03f0 0300                .2byte  0x3\r
- 3510 03f2 70                  .byte   0x70\r
- 3511 03f3 08                  .sleb128 8\r
- 3512 03f4 9F                  .byte   0x9f\r
- 3513 03f5 00000000            .4byte  0\r
- 3514 03f9 00000000            .4byte  0\r
- 3515                  .LLST25:\r
- 3516 03fd 66000000            .4byte  .LVL40\r
- 3517 0401 6C000000            .4byte  .LVL42\r
- 3518 0405 0200                .2byte  0x2\r
- 3519 0407 70                  .byte   0x70\r
- 3520 0408 0C                  .sleb128 12\r
- 3521 0409 FE000000            .4byte  .LVL50\r
- 3522 040d 02010000            .4byte  .LVL51\r
- 3523 0411 0200                .2byte  0x2\r
- 3524 0413 70                  .byte   0x70\r
- 3525 0414 0C                  .sleb128 12\r
- 3526 0415 00000000            .4byte  0\r
- 3527 0419 00000000            .4byte  0\r
- 3528                  .LLST26:\r
- 3529 041d 00000000            .4byte  .LVL59\r
- 3530 0421 04000000            .4byte  .LVL60\r
- 3531 0425 0100                .2byte  0x1\r
- 3532 0427 50                  .byte   0x50\r
- 3533 0428 04000000            .4byte  .LVL60\r
- 3534 042c 18000000            .4byte  .LVL63\r
- 3535 0430 0100                .2byte  0x1\r
- 3536 0432 50                  .byte   0x50\r
- 3537 0433 00000000            .4byte  0\r
- 3538 0437 00000000            .4byte  0\r
- 3539                  .LLST27:\r
- 3540 043b 08000000            .4byte  .LVL61\r
- 3541 043f 14000000            .4byte  .LVL62\r
- 3542 0443 0500                .2byte  0x5\r
- 3543 0445 71                  .byte   0x71\r
- 3544 0446 00                  .sleb128 0\r
- 3545 0447 34                  .byte   0x34\r
- 3546 0448 24                  .byte   0x24\r
- 3547 0449 9F                  .byte   0x9f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 87\r
-\r
-\r
- 3548 044a 14000000            .4byte  .LVL62\r
- 3549 044e 18000000            .4byte  .LVL63\r
- 3550 0452 0500                .2byte  0x5\r
- 3551 0454 70                  .byte   0x70\r
- 3552 0455 7F                  .sleb128 -1\r
- 3553 0456 34                  .byte   0x34\r
- 3554 0457 24                  .byte   0x24\r
- 3555 0458 9F                  .byte   0x9f\r
- 3556 0459 00000000            .4byte  0\r
- 3557 045d 00000000            .4byte  0\r
- 3558                  .LLST28:\r
- 3559 0461 08000000            .4byte  .LVL65\r
- 3560 0465 1E000000            .4byte  .LVL68\r
- 3561 0469 0100                .2byte  0x1\r
- 3562 046b 51                  .byte   0x51\r
- 3563 046c 46000000            .4byte  .LVL69\r
- 3564 0470 58000000            .4byte  .LFE8\r
- 3565 0474 0100                .2byte  0x1\r
- 3566 0476 51                  .byte   0x51\r
- 3567 0477 00000000            .4byte  0\r
- 3568 047b 00000000            .4byte  0\r
- 3569                  .LLST29:\r
- 3570 047f 0C000000            .4byte  .LVL66\r
- 3571 0483 18000000            .4byte  .LVL67\r
- 3572 0487 0500                .2byte  0x5\r
- 3573 0489 70                  .byte   0x70\r
- 3574 048a 00                  .sleb128 0\r
- 3575 048b 34                  .byte   0x34\r
- 3576 048c 24                  .byte   0x24\r
- 3577 048d 9F                  .byte   0x9f\r
- 3578 048e 18000000            .4byte  .LVL67\r
- 3579 0492 1E000000            .4byte  .LVL68\r
- 3580 0496 0500                .2byte  0x5\r
- 3581 0498 71                  .byte   0x71\r
- 3582 0499 7F                  .sleb128 -1\r
- 3583 049a 34                  .byte   0x34\r
- 3584 049b 24                  .byte   0x24\r
- 3585 049c 9F                  .byte   0x9f\r
- 3586 049d 46000000            .4byte  .LVL69\r
- 3587 04a1 48000000            .4byte  .LVL70\r
- 3588 04a5 0500                .2byte  0x5\r
- 3589 04a7 70                  .byte   0x70\r
- 3590 04a8 00                  .sleb128 0\r
- 3591 04a9 34                  .byte   0x34\r
- 3592 04aa 24                  .byte   0x24\r
- 3593 04ab 9F                  .byte   0x9f\r
- 3594 04ac 48000000            .4byte  .LVL70\r
- 3595 04b0 58000000            .4byte  .LFE8\r
- 3596 04b4 0500                .2byte  0x5\r
- 3597 04b6 72                  .byte   0x72\r
- 3598 04b7 00                  .sleb128 0\r
- 3599 04b8 34                  .byte   0x34\r
- 3600 04b9 24                  .byte   0x24\r
- 3601 04ba 9F                  .byte   0x9f\r
- 3602 04bb 00000000            .4byte  0\r
- 3603 04bf 00000000            .4byte  0\r
- 3604                  .LLST30:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 88\r
-\r
-\r
- 3605 04c3 00000000            .4byte  .LFB9\r
- 3606 04c7 02000000            .4byte  .LCFI4\r
- 3607 04cb 0200                .2byte  0x2\r
- 3608 04cd 7D                  .byte   0x7d\r
- 3609 04ce 00                  .sleb128 0\r
- 3610 04cf 02000000            .4byte  .LCFI4\r
- 3611 04d3 7C000000            .4byte  .LFE9\r
- 3612 04d7 0200                .2byte  0x2\r
- 3613 04d9 7D                  .byte   0x7d\r
- 3614 04da 08                  .sleb128 8\r
- 3615 04db 00000000            .4byte  0\r
- 3616 04df 00000000            .4byte  0\r
- 3617                  .LLST31:\r
- 3618 04e3 0A000000            .4byte  .LVL72\r
- 3619 04e7 1A000000            .4byte  .LVL74\r
- 3620 04eb 0100                .2byte  0x1\r
- 3621 04ed 53                  .byte   0x53\r
- 3622 04ee 68000000            .4byte  .LVL76\r
- 3623 04f2 7C000000            .4byte  .LFE9\r
- 3624 04f6 0100                .2byte  0x1\r
- 3625 04f8 53                  .byte   0x53\r
- 3626 04f9 00000000            .4byte  0\r
- 3627 04fd 00000000            .4byte  0\r
- 3628                  .LLST32:\r
- 3629 0501 0E000000            .4byte  .LVL73\r
- 3630 0505 1E000000            .4byte  .LVL75\r
- 3631 0509 0500                .2byte  0x5\r
- 3632 050b 72                  .byte   0x72\r
- 3633 050c 00                  .sleb128 0\r
- 3634 050d 34                  .byte   0x34\r
- 3635 050e 24                  .byte   0x24\r
- 3636 050f 9F                  .byte   0x9f\r
- 3637 0510 68000000            .4byte  .LVL76\r
- 3638 0514 7C000000            .4byte  .LFE9\r
- 3639 0518 0500                .2byte  0x5\r
- 3640 051a 72                  .byte   0x72\r
- 3641 051b 00                  .sleb128 0\r
- 3642 051c 34                  .byte   0x34\r
- 3643 051d 24                  .byte   0x24\r
- 3644 051e 9F                  .byte   0x9f\r
- 3645 051f 00000000            .4byte  0\r
- 3646 0523 00000000            .4byte  0\r
- 3647                  .LLST33:\r
- 3648 0527 00000000            .4byte  .LFB10\r
- 3649 052b 02000000            .4byte  .LCFI5\r
- 3650 052f 0200                .2byte  0x2\r
- 3651 0531 7D                  .byte   0x7d\r
- 3652 0532 00                  .sleb128 0\r
- 3653 0533 02000000            .4byte  .LCFI5\r
- 3654 0537 48000000            .4byte  .LFE10\r
- 3655 053b 0200                .2byte  0x2\r
- 3656 053d 7D                  .byte   0x7d\r
- 3657 053e 08                  .sleb128 8\r
- 3658 053f 00000000            .4byte  0\r
- 3659 0543 00000000            .4byte  0\r
- 3660                  .LLST34:\r
- 3661 0547 00000000            .4byte  .LVL77\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 89\r
-\r
-\r
- 3662 054b 30000000            .4byte  .LVL84\r
- 3663 054f 0200                .2byte  0x2\r
- 3664 0551 31                  .byte   0x31\r
- 3665 0552 9F                  .byte   0x9f\r
- 3666 0553 30000000            .4byte  .LVL84\r
- 3667 0557 48000000            .4byte  .LFE10\r
- 3668 055b 0100                .2byte  0x1\r
- 3669 055d 50                  .byte   0x50\r
- 3670 055e 00000000            .4byte  0\r
- 3671 0562 00000000            .4byte  0\r
- 3672                  .LLST35:\r
- 3673 0566 12000000            .4byte  .LVL79\r
- 3674 056a 16000000            .4byte  .LVL80\r
- 3675 056e 0100                .2byte  0x1\r
- 3676 0570 50                  .byte   0x50\r
- 3677 0571 00000000            .4byte  0\r
- 3678 0575 00000000            .4byte  0\r
- 3679                  .LLST36:\r
- 3680 0579 12000000            .4byte  .LVL79\r
- 3681 057d 16000000            .4byte  .LVL80\r
- 3682 0581 0500                .2byte  0x5\r
- 3683 0583 70                  .byte   0x70\r
- 3684 0584 04                  .sleb128 4\r
- 3685 0585 06                  .byte   0x6\r
- 3686 0586 23                  .byte   0x23\r
- 3687 0587 04                  .uleb128 0x4\r
- 3688 0588 16000000            .4byte  .LVL80\r
- 3689 058c 1E000000            .4byte  .LVL81\r
- 3690 0590 0200                .2byte  0x2\r
- 3691 0592 73                  .byte   0x73\r
- 3692 0593 04                  .sleb128 4\r
- 3693 0594 1E000000            .4byte  .LVL81\r
- 3694 0598 24000000            .4byte  .LVL82\r
- 3695 059c 0100                .2byte  0x1\r
- 3696 059e 50                  .byte   0x50\r
- 3697 059f 2E000000            .4byte  .LVL83\r
- 3698 05a3 48000000            .4byte  .LFE10\r
- 3699 05a7 0200                .2byte  0x2\r
- 3700 05a9 73                  .byte   0x73\r
- 3701 05aa 04                  .sleb128 4\r
- 3702 05ab 00000000            .4byte  0\r
- 3703 05af 00000000            .4byte  0\r
- 3704                  .LLST37:\r
- 3705 05b3 00000000            .4byte  .LFB0\r
- 3706 05b7 02000000            .4byte  .LCFI6\r
- 3707 05bb 0200                .2byte  0x2\r
- 3708 05bd 7D                  .byte   0x7d\r
- 3709 05be 00                  .sleb128 0\r
- 3710 05bf 02000000            .4byte  .LCFI6\r
- 3711 05c3 74020000            .4byte  .LFE0\r
- 3712 05c7 0200                .2byte  0x2\r
- 3713 05c9 7D                  .byte   0x7d\r
- 3714 05ca 08                  .sleb128 8\r
- 3715 05cb 00000000            .4byte  0\r
- 3716 05cf 00000000            .4byte  0\r
- 3717                  .LLST38:\r
- 3718 05d3 00000000            .4byte  .LVL85\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 90\r
-\r
-\r
- 3719 05d7 62020000            .4byte  .LVL111\r
- 3720 05db 0200                .2byte  0x2\r
- 3721 05dd 30                  .byte   0x30\r
- 3722 05de 9F                  .byte   0x9f\r
- 3723 05df 00000000            .4byte  0\r
- 3724 05e3 00000000            .4byte  0\r
- 3725                  .LLST39:\r
- 3726 05e7 78010000            .4byte  .LVL102\r
- 3727 05eb 8E010000            .4byte  .LVL104\r
- 3728 05ef 0100                .2byte  0x1\r
- 3729 05f1 54                  .byte   0x54\r
- 3730 05f2 00000000            .4byte  0\r
- 3731 05f6 00000000            .4byte  0\r
- 3732                  .LLST40:\r
- 3733 05fa 00000000            .4byte  .LVL85\r
- 3734 05fe 78000000            .4byte  .LVL88\r
- 3735 0602 0200                .2byte  0x2\r
- 3736 0604 30                  .byte   0x30\r
- 3737 0605 9F                  .byte   0x9f\r
- 3738 0606 80000000            .4byte  .LVL89\r
- 3739 060a 8A000000            .4byte  .LVL90\r
- 3740 060e 0200                .2byte  0x2\r
- 3741 0610 30                  .byte   0x30\r
- 3742 0611 9F                  .byte   0x9f\r
- 3743 0612 8A000000            .4byte  .LVL90\r
- 3744 0616 A6000000            .4byte  .LVL92\r
- 3745 061a 0100                .2byte  0x1\r
- 3746 061c 53                  .byte   0x53\r
- 3747 061d A8000000            .4byte  .LVL93\r
- 3748 0621 CA000000            .4byte  .LVL98\r
- 3749 0625 0100                .2byte  0x1\r
- 3750 0627 53                  .byte   0x53\r
- 3751 0628 CA000000            .4byte  .LVL98\r
- 3752 062c 62020000            .4byte  .LVL111\r
- 3753 0630 0200                .2byte  0x2\r
- 3754 0632 30                  .byte   0x30\r
- 3755 0633 9F                  .byte   0x9f\r
- 3756 0634 00000000            .4byte  0\r
- 3757 0638 00000000            .4byte  0\r
- 3758                  .LLST41:\r
- 3759 063c 8A000000            .4byte  .LVL90\r
- 3760 0640 94000000            .4byte  .LVL91\r
- 3761 0644 0100                .2byte  0x1\r
- 3762 0646 52                  .byte   0x52\r
- 3763 0647 A8000000            .4byte  .LVL93\r
- 3764 064b B6000000            .4byte  .LVL96\r
- 3765 064f 0100                .2byte  0x1\r
- 3766 0651 52                  .byte   0x52\r
- 3767 0652 B6000000            .4byte  .LVL96\r
- 3768 0656 B8000000            .4byte  .LVL97\r
- 3769 065a 0100                .2byte  0x1\r
- 3770 065c 50                  .byte   0x50\r
- 3771 065d 00000000            .4byte  0\r
- 3772 0661 00000000            .4byte  0\r
- 3773                  .LLST42:\r
- 3774 0665 B0000000            .4byte  .LVL94\r
- 3775 0669 B8000000            .4byte  .LVL97\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 91\r
-\r
-\r
- 3776 066d 0100                .2byte  0x1\r
- 3777 066f 51                  .byte   0x51\r
- 3778 0670 00000000            .4byte  0\r
- 3779 0674 00000000            .4byte  0\r
- 3780                  .LLST43:\r
- 3781 0678 64000000            .4byte  .LVL86\r
- 3782 067c 68000000            .4byte  .LVL87\r
- 3783 0680 0100                .2byte  0x1\r
- 3784 0682 50                  .byte   0x50\r
- 3785 0683 00000000            .4byte  0\r
- 3786 0687 00000000            .4byte  0\r
- 3787                          .section        .debug_aranges,"",%progbits\r
- 3788 0000 6C000000            .4byte  0x6c\r
- 3789 0004 0200                .2byte  0x2\r
- 3790 0006 00000000            .4byte  .Ldebug_info0\r
- 3791 000a 04                  .byte   0x4\r
- 3792 000b 00                  .byte   0\r
- 3793 000c 0000                .2byte  0\r
- 3794 000e 0000                .2byte  0\r
- 3795 0010 00000000            .4byte  .LFB1\r
- 3796 0014 B4000000            .4byte  .LFE1-.LFB1\r
- 3797 0018 00000000            .4byte  .LFB4\r
- 3798 001c 1C000000            .4byte  .LFE4-.LFB4\r
- 3799 0020 00000000            .4byte  .LFB3\r
- 3800 0024 28010000            .4byte  .LFE3-.LFB3\r
- 3801 0028 00000000            .4byte  .LFB5\r
- 3802 002c 18000000            .4byte  .LFE5-.LFB5\r
- 3803 0030 00000000            .4byte  .LFB6\r
- 3804 0034 20000000            .4byte  .LFE6-.LFB6\r
- 3805 0038 00000000            .4byte  .LFB2\r
- 3806 003c 68010000            .4byte  .LFE2-.LFB2\r
- 3807 0040 00000000            .4byte  .LFB7\r
- 3808 0044 40000000            .4byte  .LFE7-.LFB7\r
- 3809 0048 00000000            .4byte  .LFB8\r
- 3810 004c 58000000            .4byte  .LFE8-.LFB8\r
- 3811 0050 00000000            .4byte  .LFB9\r
- 3812 0054 7C000000            .4byte  .LFE9-.LFB9\r
- 3813 0058 00000000            .4byte  .LFB10\r
- 3814 005c 48000000            .4byte  .LFE10-.LFB10\r
- 3815 0060 00000000            .4byte  .LFB0\r
- 3816 0064 74020000            .4byte  .LFE0-.LFB0\r
- 3817 0068 00000000            .4byte  0\r
- 3818 006c 00000000            .4byte  0\r
- 3819                          .section        .debug_ranges,"",%progbits\r
- 3820                  .Ldebug_ranges0:\r
- 3821 0000 00000000            .4byte  .LFB1\r
- 3822 0004 B4000000            .4byte  .LFE1\r
- 3823 0008 00000000            .4byte  .LFB4\r
- 3824 000c 1C000000            .4byte  .LFE4\r
- 3825 0010 00000000            .4byte  .LFB3\r
- 3826 0014 28010000            .4byte  .LFE3\r
- 3827 0018 00000000            .4byte  .LFB5\r
- 3828 001c 18000000            .4byte  .LFE5\r
- 3829 0020 00000000            .4byte  .LFB6\r
- 3830 0024 20000000            .4byte  .LFE6\r
- 3831 0028 00000000            .4byte  .LFB2\r
- 3832 002c 68010000            .4byte  .LFE2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 92\r
-\r
-\r
- 3833 0030 00000000            .4byte  .LFB7\r
- 3834 0034 40000000            .4byte  .LFE7\r
- 3835 0038 00000000            .4byte  .LFB8\r
- 3836 003c 58000000            .4byte  .LFE8\r
- 3837 0040 00000000            .4byte  .LFB9\r
- 3838 0044 7C000000            .4byte  .LFE9\r
- 3839 0048 00000000            .4byte  .LFB10\r
- 3840 004c 48000000            .4byte  .LFE10\r
- 3841 0050 00000000            .4byte  .LFB0\r
- 3842 0054 74020000            .4byte  .LFE0\r
- 3843 0058 00000000            .4byte  0\r
- 3844 005c 00000000            .4byte  0\r
- 3845                          .section        .debug_line,"",%progbits\r
- 3846                  .Ldebug_line0:\r
- 3847 0000 5C030000            .section        .debug_str,"MS",%progbits,1\r
- 3847      02006200 \r
- 3847      00000201 \r
- 3847      FB0E0D00 \r
- 3847      01010101 \r
- 3848                  .LASF35:\r
- 3849 0000 70537461            .ascii  "pStatusBlock\000"\r
- 3849      74757342 \r
- 3849      6C6F636B \r
- 3849      00\r
- 3850                  .LASF33:\r
- 3851 000d 636F756E            .ascii  "count\000"\r
- 3851      7400\r
- 3852                  .LASF10:\r
- 3853 0013 75696E74            .ascii  "uint16\000"\r
- 3853      313600\r
- 3854                  .LASF51:\r
- 3855 001a 55534246            .ascii  "USBFS_TerminateEP\000"\r
- 3855      535F5465 \r
- 3855      726D696E \r
- 3855      61746545 \r
- 3855      5000\r
- 3856                  .LASF78:\r
- 3857 002c 55534246            .ascii  "USBFS_currentTD\000"\r
- 3857      535F6375 \r
- 3857      7272656E \r
- 3857      74544400 \r
- 3858                  .LASF81:\r
- 3859 003c 55534246            .ascii  "USBFS_InitControlRead\000"\r
- 3859      535F496E \r
- 3859      6974436F \r
- 3859      6E74726F \r
- 3859      6C526561 \r
- 3860                  .LASF7:\r
- 3861 0052 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 3861      206C6F6E \r
- 3861      6720756E \r
- 3861      7369676E \r
- 3861      65642069 \r
- 3862                  .LASF20:\r
- 3863 0069 61646472            .ascii  "addr\000"\r
- 3863      00\r
- 3864                  .LASF58:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 93\r
-\r
-\r
- 3865 006e 696E7465            .ascii  "interfaceNumber\000"\r
- 3865      72666163 \r
- 3865      654E756D \r
- 3865      62657200 \r
- 3866                  .LASF62:\r
- 3867 007e 55534246            .ascii  "USBFS_tBuffer\000"\r
- 3867      535F7442 \r
- 3867      75666665 \r
- 3867      7200\r
- 3868                  .LASF6:\r
- 3869 008c 6C6F6E67            .ascii  "long long int\000"\r
- 3869      206C6F6E \r
- 3869      6720696E \r
- 3869      7400\r
- 3870                  .LASF0:\r
- 3871 009a 7369676E            .ascii  "signed char\000"\r
- 3871      65642063 \r
- 3871      68617200 \r
- 3872                  .LASF48:\r
- 3873 00a6 636C6561            .ascii  "clearAltSetting\000"\r
- 3873      72416C74 \r
- 3873      53657474 \r
- 3873      696E6700 \r
- 3874                  .LASF74:\r
- 3875 00b6 55534246            .ascii  "USBFS_deviceAddress\000"\r
- 3875      535F6465 \r
- 3875      76696365 \r
- 3875      41646472 \r
- 3875      65737300 \r
- 3876                  .LASF54:\r
- 3877 00ca 55534246            .ascii  "USBFS_ClearEndpointHalt\000"\r
- 3877      535F436C \r
- 3877      65617245 \r
- 3877      6E64706F \r
- 3877      696E7448 \r
- 3878                  .LASF71:\r
- 3879 00e2 55534246            .ascii  "USBFS_interfaceNumber\000"\r
- 3879      535F696E \r
- 3879      74657266 \r
- 3879      6163654E \r
- 3879      756D6265 \r
- 3880                  .LASF47:\r
- 3881 00f8 55534246            .ascii  "USBFS_Config\000"\r
- 3881      535F436F \r
- 3881      6E666967 \r
- 3881      00\r
- 3882                  .LASF40:\r
- 3883 0105 55534246            .ascii  "USBFS_ConfigReg\000"\r
- 3883      535F436F \r
- 3883      6E666967 \r
- 3883      52656700 \r
- 3884                  .LASF4:\r
- 3885 0115 6C6F6E67            .ascii  "long int\000"\r
- 3885      20696E74 \r
- 3885      00\r
- 3886                  .LASF9:\r
- 3887 011e 75696E74            .ascii  "uint8\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 94\r
-\r
-\r
- 3887      3800\r
- 3888                  .LASF19:\r
- 3889 0124 6570546F            .ascii  "epToggle\000"\r
- 3889      67676C65 \r
- 3889      00\r
- 3890                  .LASF12:\r
- 3891 012d 646F7562            .ascii  "double\000"\r
- 3891      6C6500\r
- 3892                  .LASF29:\r
- 3893 0134 545F5553            .ascii  "T_USBFS_EP_SETTINGS_BLOCK\000"\r
- 3893      4246535F \r
- 3893      45505F53 \r
- 3893      45545449 \r
- 3893      4E47535F \r
- 3894                  .LASF52:\r
- 3895 014e 55534246            .ascii  "USBFS_SetEndpointHalt\000"\r
- 3895      535F5365 \r
- 3895      74456E64 \r
- 3895      706F696E \r
- 3895      7448616C \r
- 3896                  .LASF34:\r
- 3897 0164 70446174            .ascii  "pData\000"\r
- 3897      6100\r
- 3898                  .LASF64:\r
- 3899 016a 55534246            .ascii  "USBFS_configuration\000"\r
- 3899      535F636F \r
- 3899      6E666967 \r
- 3899      75726174 \r
- 3899      696F6E00 \r
- 3900                  .LASF21:\r
- 3901 017e 65704D6F            .ascii  "epMode\000"\r
- 3901      646500\r
- 3902                  .LASF8:\r
- 3903 0185 756E7369            .ascii  "unsigned int\000"\r
- 3903      676E6564 \r
- 3903      20696E74 \r
- 3903      00\r
- 3904                  .LASF5:\r
- 3905 0192 6C6F6E67            .ascii  "long unsigned int\000"\r
- 3905      20756E73 \r
- 3905      69676E65 \r
- 3905      6420696E \r
- 3905      7400\r
- 3906                  .LASF45:\r
- 3907 01a4 55534246            .ascii  "USBFS_GetInterfaceClassTablePtr\000"\r
- 3907      535F4765 \r
- 3907      74496E74 \r
- 3907      65726661 \r
- 3907      6365436C \r
- 3908                  .LASF3:\r
- 3909 01c4 73686F72            .ascii  "short unsigned int\000"\r
- 3909      7420756E \r
- 3909      7369676E \r
- 3909      65642069 \r
- 3909      6E7400\r
- 3910                  .LASF49:\r
- 3911 01d7 70446573            .ascii  "pDescr\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 95\r
-\r
-\r
- 3911      637200\r
- 3912                  .LASF24:\r
- 3913 01de 696E7465            .ascii  "interface\000"\r
- 3913      72666163 \r
- 3913      6500\r
- 3914                  .LASF55:\r
- 3915 01e8 55534246            .ascii  "USBFS_ValidateAlternateSetting\000"\r
- 3915      535F5661 \r
- 3915      6C696461 \r
- 3915      7465416C \r
- 3915      7465726E \r
- 3916                  .LASF65:\r
- 3917 0207 55534246            .ascii  "USBFS_configurationChanged\000"\r
- 3917      535F636F \r
- 3917      6E666967 \r
- 3917      75726174 \r
- 3917      696F6E43 \r
- 3918                  .LASF85:\r
- 3919 0222 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 3919      43534932 \r
- 3919      53445C73 \r
- 3919      6F667477 \r
- 3919      6172655C \r
- 3920 0251 6E00                .ascii  "n\000"\r
- 3921                  .LASF76:\r
- 3922 0253 55534246            .ascii  "USBFS_interfaceClass\000"\r
- 3922      535F696E \r
- 3922      74657266 \r
- 3922      61636543 \r
- 3922      6C617373 \r
- 3923                  .LASF70:\r
- 3924 0268 55534246            .ascii  "USBFS_STRING_DESCRIPTORS\000"\r
- 3924      535F5354 \r
- 3924      52494E47 \r
- 3924      5F444553 \r
- 3924      43524950 \r
- 3925                  .LASF18:\r
- 3926 0281 68774570            .ascii  "hwEpState\000"\r
- 3926      53746174 \r
- 3926      6500\r
- 3927                  .LASF61:\r
- 3928 028b 64657363            .ascii  "descrLength\000"\r
- 3928      724C656E \r
- 3928      67746800 \r
- 3929                  .LASF15:\r
- 3930 0297 73697A65            .ascii  "sizetype\000"\r
- 3930      74797065 \r
- 3930      00\r
- 3931                  .LASF39:\r
- 3932 02a0 70546D70            .ascii  "pTmp\000"\r
- 3932      00\r
- 3933                  .LASF37:\r
- 3934 02a5 705F6C69            .ascii  "p_list\000"\r
- 3934      737400\r
- 3935                  .LASF50:\r
- 3936 02ac 62756666            .ascii  "buffCount\000"\r
- 3936      436F756E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 96\r
-\r
-\r
- 3936      7400\r
- 3937                  .LASF16:\r
- 3938 02b6 61747472            .ascii  "attrib\000"\r
- 3938      696200\r
- 3939                  .LASF68:\r
- 3940 02bd 55534246            .ascii  "USBFS_TABLE\000"\r
- 3940      535F5441 \r
- 3940      424C4500 \r
- 3941                  .LASF69:\r
- 3942 02c9 55534246            .ascii  "USBFS_SN_STRING_DESCRIPTOR\000"\r
- 3942      535F534E \r
- 3942      5F535452 \r
- 3942      494E475F \r
- 3942      44455343 \r
- 3943                  .LASF46:\r
- 3944 02e4 63757272            .ascii  "currentInterfacesNum\000"\r
- 3944      656E7449 \r
- 3944      6E746572 \r
- 3944      66616365 \r
- 3944      734E756D \r
- 3945                  .LASF41:\r
- 3946 02f9 55534246            .ascii  "USBFS_ConfigAltChanged\000"\r
- 3946      535F436F \r
- 3946      6E666967 \r
- 3946      416C7443 \r
- 3946      68616E67 \r
- 3947                  .LASF32:\r
- 3948 0310 545F5553            .ascii  "T_USBFS_XFER_STATUS_BLOCK\000"\r
- 3948      4246535F \r
- 3948      58464552 \r
- 3948      5F535441 \r
- 3948      5455535F \r
- 3949                  .LASF56:\r
- 3950 032a 696E7465            .ascii  "interfaceNum\000"\r
- 3950      72666163 \r
- 3950      654E756D \r
- 3950      00\r
- 3951                  .LASF67:\r
- 3952 0337 55534246            .ascii  "USBFS_DEVICE0_DESCR\000"\r
- 3952      535F4445 \r
- 3952      56494345 \r
- 3952      305F4445 \r
- 3952      53435200 \r
- 3953                  .LASF11:\r
- 3954 034b 666C6F61            .ascii  "float\000"\r
- 3954      7400\r
- 3955                  .LASF17:\r
- 3956 0351 61706945            .ascii  "apiEpState\000"\r
- 3956      70537461 \r
- 3956      746500\r
- 3957                  .LASF77:\r
- 3958 035c 55534246            .ascii  "USBFS_EP\000"\r
- 3958      535F4550 \r
- 3958      00\r
- 3959                  .LASF59:\r
- 3960 0365 70537472            .ascii  "pStr\000"\r
- 3960      00\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 97\r
-\r
-\r
- 3961                  .LASF83:\r
- 3962 036a 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 3962      4320342E \r
- 3962      372E3320 \r
- 3962      32303133 \r
- 3962      30333132 \r
- 3963 039d 616E6368            .ascii  "anch revision 196615]\000"\r
- 3963      20726576 \r
- 3963      6973696F \r
- 3963      6E203139 \r
- 3963      36363135 \r
- 3964                  .LASF14:\r
- 3965 03b3 72656738            .ascii  "reg8\000"\r
- 3965      00\r
- 3966                  .LASF1:\r
- 3967 03b8 756E7369            .ascii  "unsigned char\000"\r
- 3967      676E6564 \r
- 3967      20636861 \r
- 3967      7200\r
- 3968                  .LASF2:\r
- 3969 03c6 73686F72            .ascii  "short int\000"\r
- 3969      7420696E \r
- 3969      7400\r
- 3970                  .LASF36:\r
- 3971 03d0 545F5553            .ascii  "T_USBFS_TD\000"\r
- 3971      4246535F \r
- 3971      544400\r
- 3972                  .LASF44:\r
- 3973 03db 55534246            .ascii  "USBFS_GetConfigTablePtr\000"\r
- 3973      535F4765 \r
- 3973      74436F6E \r
- 3973      66696754 \r
- 3973      61626C65 \r
- 3974                  .LASF84:\r
- 3975 03f3 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\USBFS_std.c\000"\r
- 3975      6E657261 \r
- 3975      7465645F \r
- 3975      536F7572 \r
- 3975      63655C50 \r
- 3976                  .LASF72:\r
- 3977 0418 55534246            .ascii  "USBFS_interfaceSetting\000"\r
- 3977      535F696E \r
- 3977      74657266 \r
- 3977      61636553 \r
- 3977      65747469 \r
- 3978                  .LASF25:\r
- 3979 042f 545F5553            .ascii  "T_USBFS_EP_CTL_BLOCK\000"\r
- 3979      4246535F \r
- 3979      45505F43 \r
- 3979      544C5F42 \r
- 3979      4C4F434B \r
- 3980                  .LASF80:\r
- 3981 0444 55534246            .ascii  "USBFS_InitNoDataControlTransfer\000"\r
- 3981      535F496E \r
- 3981      69744E6F \r
- 3981      44617461 \r
- 3981      436F6E74 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 98\r
-\r
-\r
- 3982                  .LASF63:\r
- 3983 0464 55534246            .ascii  "USBFS_device\000"\r
- 3983      535F6465 \r
- 3983      76696365 \r
- 3983      00\r
- 3984                  .LASF27:\r
- 3985 0471 61747472            .ascii  "attributes\000"\r
- 3985      69627574 \r
- 3985      657300\r
- 3986                  .LASF26:\r
- 3987 047c 616C7453            .ascii  "altSetting\000"\r
- 3987      65747469 \r
- 3987      6E6700\r
- 3988                  .LASF13:\r
- 3989 0487 63686172            .ascii  "char\000"\r
- 3989      00\r
- 3990                  .LASF23:\r
- 3991 048c 62756666            .ascii  "bufferSize\000"\r
- 3991      65725369 \r
- 3991      7A6500\r
- 3992                  .LASF53:\r
- 3993 0497 72657175            .ascii  "requestHandled\000"\r
- 3993      65737448 \r
- 3993      616E646C \r
- 3993      656400\r
- 3994                  .LASF22:\r
- 3995 04a6 62756666            .ascii  "buffOffset\000"\r
- 3995      4F666673 \r
- 3995      657400\r
- 3996                  .LASF79:\r
- 3997 04b1 55534246            .ascii  "USBFS_GetDeviceTablePtr\000"\r
- 3997      535F4765 \r
- 3997      74446576 \r
- 3997      69636554 \r
- 3997      61626C65 \r
- 3998                  .LASF66:\r
- 3999 04c9 55534246            .ascii  "USBFS_deviceStatus\000"\r
- 3999      535F6465 \r
- 3999      76696365 \r
- 3999      53746174 \r
- 3999      757300\r
- 4000                  .LASF73:\r
- 4001 04dc 55534246            .ascii  "USBFS_interfaceSetting_last\000"\r
- 4001      535F696E \r
- 4001      74657266 \r
- 4001      61636553 \r
- 4001      65747469 \r
- 4002                  .LASF31:\r
- 4003 04f8 6C656E67            .ascii  "length\000"\r
- 4003      746800\r
- 4004                  .LASF60:\r
- 4005 04ff 6E537472            .ascii  "nStr\000"\r
- 4005      00\r
- 4006                  .LASF43:\r
- 4007 0504 65705F74            .ascii  "ep_type\000"\r
- 4007      79706500 \r
- 4008                  .LASF42:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccZzgZB0.s                      page 99\r
-\r
-\r
- 4009 050c 6375725F            .ascii  "cur_ep\000"\r
- 4009      657000\r
- 4010                  .LASF30:\r
- 4011 0513 73746174            .ascii  "status\000"\r
- 4011      757300\r
- 4012                  .LASF82:\r
- 4013 051a 55534246            .ascii  "USBFS_DispatchClassRqst\000"\r
- 4013      535F4469 \r
- 4013      73706174 \r
- 4013      6368436C \r
- 4013      61737352 \r
- 4014                  .LASF28:\r
- 4015 0532 624D6973            .ascii  "bMisc\000"\r
- 4015      6300\r
- 4016                  .LASF75:\r
- 4017 0538 55534246            .ascii  "USBFS_interfaceStatus\000"\r
- 4017      535F696E \r
- 4017      74657266 \r
- 4017      61636553 \r
- 4017      74617475 \r
- 4018                  .LASF57:\r
- 4019 054e 55534246            .ascii  "USBFS_HandleStandardRqst\000"\r
- 4019      535F4861 \r
- 4019      6E646C65 \r
- 4019      5374616E \r
- 4019      64617264 \r
- 4020                  .LASF38:\r
- 4021 0567 545F5553            .ascii  "T_USBFS_LUT\000"\r
- 4021      4246535F \r
- 4021      4C555400 \r
- 4022                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.o
deleted file mode 100755 (executable)
index 2717fa7..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_std.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.lst
deleted file mode 100755 (executable)
index e2a17a0..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.lst
+++ /dev/null
@@ -1,497 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "USBFS_vnd.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.USBFS_HandleVendorRqst,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global USBFS_HandleVendorRqst\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   USBFS_HandleVendorRqst, %function\r
-  24                   USBFS_HandleVendorRqst:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\USBFS_vnd.c"\r
-   1:.\Generated_Source\PSoC5/USBFS_vnd.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/USBFS_vnd.c **** * File Name: USBFS_vnd.c\r
-   3:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Version 2.60\r
-   4:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-   5:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  USB vendor request handler.\r
-   7:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-   8:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  10:.\Generated_Source\PSoC5/USBFS_vnd.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/USBFS_vnd.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  13:.\Generated_Source\PSoC5/USBFS_vnd.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  14:.\Generated_Source\PSoC5/USBFS_vnd.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/USBFS_vnd.c **** *******************************************************************************/\r
-  16:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  17:.\Generated_Source\PSoC5/USBFS_vnd.c **** #include "USBFS.h"\r
-  18:.\Generated_Source\PSoC5/USBFS_vnd.c **** #include "USBFS_pvt.h"\r
-  19:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  20:.\Generated_Source\PSoC5/USBFS_vnd.c **** #if(USBFS_EXTERN_VND == USBFS_FALSE)\r
-  21:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  22:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  23:.\Generated_Source\PSoC5/USBFS_vnd.c **** /***************************************\r
-  24:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Vendor Specific Declarations\r
-  25:.\Generated_Source\PSoC5/USBFS_vnd.c **** ***************************************/\r
-  26:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  27:.\Generated_Source\PSoC5/USBFS_vnd.c **** /* `#START VENDOR_SPECIFIC_DECLARATIONS` Place your declaration here */\r
-  28:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  29:.\Generated_Source\PSoC5/USBFS_vnd.c **** /* `#END` */\r
-  30:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  31:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/USBFS_vnd.c **** /*******************************************************************************\r
-  33:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Function Name: USBFS_HandleVendorRqst\r
-  34:.\Generated_Source\PSoC5/USBFS_vnd.c **** ********************************************************************************\r
-  35:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  36:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Summary:\r
-  37:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  This routine provide users with a method to implement vendor specifc\r
-  38:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  requests.\r
-  39:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  40:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  To implement vendor specific requests, add your code in this function to\r
-  41:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  decode and disposition the request.  If the request is handled, your code\r
-  42:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  must set the variable "requestHandled" to TRUE, indicating that the\r
-  43:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  request has been handled.\r
-  44:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  45:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Parameters:\r
-  46:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  None.\r
-  47:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  48:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Return:\r
-  49:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  requestHandled.\r
-  50:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  51:.\Generated_Source\PSoC5/USBFS_vnd.c **** * Reentrant:\r
-  52:.\Generated_Source\PSoC5/USBFS_vnd.c **** *  No.\r
-  53:.\Generated_Source\PSoC5/USBFS_vnd.c **** *\r
-  54:.\Generated_Source\PSoC5/USBFS_vnd.c **** *******************************************************************************/\r
-  55:.\Generated_Source\PSoC5/USBFS_vnd.c **** uint8 USBFS_HandleVendorRqst(void) \r
-  56:.\Generated_Source\PSoC5/USBFS_vnd.c **** {\r
-  27                           .loc 1 56 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  57:.\Generated_Source\PSoC5/USBFS_vnd.c ****     uint8 requestHandled = USBFS_FALSE;\r
-  58:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  59:.\Generated_Source\PSoC5/USBFS_vnd.c ****     if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-  33                           .loc 1 59 0\r
-  34 0000 034B                 ldr     r3, .L3\r
-  35 0002 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  36 0004 0106                 lsls    r1, r0, #24\r
-  60:.\Generated_Source\PSoC5/USBFS_vnd.c ****     {\r
-  61:.\Generated_Source\PSoC5/USBFS_vnd.c ****         /* Control Read */\r
-  62:.\Generated_Source\PSoC5/USBFS_vnd.c ****         switch (CY_GET_REG8(USBFS_bRequest))\r
-  37                           .loc 1 62 0\r
-  38 0006 44BF                 itt     mi\r
-  39 0008 0249                 ldrmi   r1, .L3+4\r
-  40 000a 0978                 ldrbmi  r1, [r1, #0]    @ zero_extendqisi2\r
-  63:.\Generated_Source\PSoC5/USBFS_vnd.c ****         {\r
-  64:.\Generated_Source\PSoC5/USBFS_vnd.c ****             case USBFS_GET_EXTENDED_CONFIG_DESCRIPTOR:\r
-  65:.\Generated_Source\PSoC5/USBFS_vnd.c ****                 #if defined(USBFS_ENABLE_MSOS_STRING)\r
-  66:.\Generated_Source\PSoC5/USBFS_vnd.c ****                     USBFS_currentTD.pData = (volatile uint8 *)&USBFS_MSOS_CONFIGURATION_DESCR[0u];\r
-  67:.\Generated_Source\PSoC5/USBFS_vnd.c ****                     USBFS_currentTD.count = USBFS_MSOS_CONFIGURATION_DESCR[0u];\r
-  68:.\Generated_Source\PSoC5/USBFS_vnd.c ****                     requestHandled  = USBFS_InitControlRead();\r
-  69:.\Generated_Source\PSoC5/USBFS_vnd.c ****                 #endif /* End USBFS_ENABLE_MSOS_STRING */\r
-  70:.\Generated_Source\PSoC5/USBFS_vnd.c ****                 break;\r
-  71:.\Generated_Source\PSoC5/USBFS_vnd.c ****             default:\r
-  72:.\Generated_Source\PSoC5/USBFS_vnd.c ****                 break;\r
-  73:.\Generated_Source\PSoC5/USBFS_vnd.c ****         }\r
-  74:.\Generated_Source\PSoC5/USBFS_vnd.c ****     }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 3\r
-\r
-\r
-  75:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  76:.\Generated_Source\PSoC5/USBFS_vnd.c ****     /* `#START VENDOR_SPECIFIC_CODE` Place your vendor specific request here */\r
-  77:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  78:.\Generated_Source\PSoC5/USBFS_vnd.c ****     /* `#END` */\r
-  79:.\Generated_Source\PSoC5/USBFS_vnd.c **** \r
-  80:.\Generated_Source\PSoC5/USBFS_vnd.c ****     return(requestHandled);\r
-  81:.\Generated_Source\PSoC5/USBFS_vnd.c **** }\r
-  41                           .loc 1 81 0\r
-  42 000c 0020                 movs    r0, #0\r
-  43 000e 7047                 bx      lr\r
-  44                   .L4:\r
-  45                           .align  2\r
-  46                   .L3:\r
-  47 0010 00600040             .word   1073766400\r
-  48 0014 01600040             .word   1073766401\r
-  49                           .cfi_endproc\r
-  50                   .LFE0:\r
-  51                           .size   USBFS_HandleVendorRqst, .-USBFS_HandleVendorRqst\r
-  52                           .text\r
-  53                   .Letext0:\r
-  54                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
-  55                           .section        .debug_info,"",%progbits\r
-  56                   .Ldebug_info0:\r
-  57 0000 C9000000             .4byte  0xc9\r
-  58 0004 0200                 .2byte  0x2\r
-  59 0006 00000000             .4byte  .Ldebug_abbrev0\r
-  60 000a 04                   .byte   0x4\r
-  61 000b 01                   .uleb128 0x1\r
-  62 000c 57000000             .4byte  .LASF15\r
-  63 0010 01                   .byte   0x1\r
-  64 0011 1B000000             .4byte  .LASF16\r
-  65 0015 35010000             .4byte  .LASF17\r
-  66 0019 00000000             .4byte  .Ldebug_ranges0+0\r
-  67 001d 00000000             .4byte  0\r
-  68 0021 00000000             .4byte  0\r
-  69 0025 00000000             .4byte  .Ldebug_line0\r
-  70 0029 02                   .uleb128 0x2\r
-  71 002a 01                   .byte   0x1\r
-  72 002b 06                   .byte   0x6\r
-  73 002c 19010000             .4byte  .LASF0\r
-  74 0030 02                   .uleb128 0x2\r
-  75 0031 01                   .byte   0x1\r
-  76 0032 08                   .byte   0x8\r
-  77 0033 DE000000             .4byte  .LASF1\r
-  78 0037 02                   .uleb128 0x2\r
-  79 0038 02                   .byte   0x2\r
-  80 0039 05                   .byte   0x5\r
-  81 003a 2B010000             .4byte  .LASF2\r
-  82 003e 02                   .uleb128 0x2\r
-  83 003f 02                   .byte   0x2\r
-  84 0040 07                   .byte   0x7\r
-  85 0041 06010000             .4byte  .LASF3\r
-  86 0045 02                   .uleb128 0x2\r
-  87 0046 04                   .byte   0x4\r
-  88 0047 05                   .byte   0x5\r
-  89 0048 F1000000             .4byte  .LASF4\r
-  90 004c 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 4\r
-\r
-\r
-  91 004d 04                   .byte   0x4\r
-  92 004e 07                   .byte   0x7\r
-  93 004f A6000000             .4byte  .LASF5\r
-  94 0053 02                   .uleb128 0x2\r
-  95 0054 08                   .byte   0x8\r
-  96 0055 05                   .byte   0x5\r
-  97 0056 00000000             .4byte  .LASF6\r
-  98 005a 02                   .uleb128 0x2\r
-  99 005b 08                   .byte   0x8\r
- 100 005c 07                   .byte   0x7\r
- 101 005d C7000000             .4byte  .LASF7\r
- 102 0061 03                   .uleb128 0x3\r
- 103 0062 04                   .byte   0x4\r
- 104 0063 05                   .byte   0x5\r
- 105 0064 696E7400             .ascii  "int\000"\r
- 106 0068 02                   .uleb128 0x2\r
- 107 0069 04                   .byte   0x4\r
- 108 006a 07                   .byte   0x7\r
- 109 006b 0E000000             .4byte  .LASF8\r
- 110 006f 04                   .uleb128 0x4\r
- 111 0070 A0000000             .4byte  .LASF12\r
- 112 0074 02                   .byte   0x2\r
- 113 0075 5B                   .byte   0x5b\r
- 114 0076 30000000             .4byte  0x30\r
- 115 007a 02                   .uleb128 0x2\r
- 116 007b 04                   .byte   0x4\r
- 117 007c 04                   .byte   0x4\r
- 118 007d 25010000             .4byte  .LASF9\r
- 119 0081 02                   .uleb128 0x2\r
- 120 0082 08                   .byte   0x8\r
- 121 0083 04                   .byte   0x4\r
- 122 0084 FF000000             .4byte  .LASF10\r
- 123 0088 02                   .uleb128 0x2\r
- 124 0089 01                   .byte   0x1\r
- 125 008a 08                   .byte   0x8\r
- 126 008b EC000000             .4byte  .LASF11\r
- 127 008f 04                   .uleb128 0x4\r
- 128 0090 FA000000             .4byte  .LASF13\r
- 129 0094 02                   .byte   0x2\r
- 130 0095 F0                   .byte   0xf0\r
- 131 0096 9A000000             .4byte  0x9a\r
- 132 009a 05                   .uleb128 0x5\r
- 133 009b 6F000000             .4byte  0x6f\r
- 134 009f 02                   .uleb128 0x2\r
- 135 00a0 04                   .byte   0x4\r
- 136 00a1 07                   .byte   0x7\r
- 137 00a2 66010000             .4byte  .LASF14\r
- 138 00a6 06                   .uleb128 0x6\r
- 139 00a7 01                   .byte   0x1\r
- 140 00a8 40000000             .4byte  .LASF18\r
- 141 00ac 01                   .byte   0x1\r
- 142 00ad 37                   .byte   0x37\r
- 143 00ae 01                   .byte   0x1\r
- 144 00af 6F000000             .4byte  0x6f\r
- 145 00b3 00000000             .4byte  .LFB0\r
- 146 00b7 18000000             .4byte  .LFE0\r
- 147 00bb 02                   .byte   0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 5\r
-\r
-\r
- 148 00bc 7D                   .byte   0x7d\r
- 149 00bd 00                   .sleb128 0\r
- 150 00be 01                   .byte   0x1\r
- 151 00bf 07                   .uleb128 0x7\r
- 152 00c0 B8000000             .4byte  .LASF19\r
- 153 00c4 01                   .byte   0x1\r
- 154 00c5 39                   .byte   0x39\r
- 155 00c6 6F000000             .4byte  0x6f\r
- 156 00ca 00                   .byte   0\r
- 157 00cb 00                   .byte   0\r
- 158 00cc 00                   .byte   0\r
- 159                           .section        .debug_abbrev,"",%progbits\r
- 160                   .Ldebug_abbrev0:\r
- 161 0000 01                   .uleb128 0x1\r
- 162 0001 11                   .uleb128 0x11\r
- 163 0002 01                   .byte   0x1\r
- 164 0003 25                   .uleb128 0x25\r
- 165 0004 0E                   .uleb128 0xe\r
- 166 0005 13                   .uleb128 0x13\r
- 167 0006 0B                   .uleb128 0xb\r
- 168 0007 03                   .uleb128 0x3\r
- 169 0008 0E                   .uleb128 0xe\r
- 170 0009 1B                   .uleb128 0x1b\r
- 171 000a 0E                   .uleb128 0xe\r
- 172 000b 55                   .uleb128 0x55\r
- 173 000c 06                   .uleb128 0x6\r
- 174 000d 11                   .uleb128 0x11\r
- 175 000e 01                   .uleb128 0x1\r
- 176 000f 52                   .uleb128 0x52\r
- 177 0010 01                   .uleb128 0x1\r
- 178 0011 10                   .uleb128 0x10\r
- 179 0012 06                   .uleb128 0x6\r
- 180 0013 00                   .byte   0\r
- 181 0014 00                   .byte   0\r
- 182 0015 02                   .uleb128 0x2\r
- 183 0016 24                   .uleb128 0x24\r
- 184 0017 00                   .byte   0\r
- 185 0018 0B                   .uleb128 0xb\r
- 186 0019 0B                   .uleb128 0xb\r
- 187 001a 3E                   .uleb128 0x3e\r
- 188 001b 0B                   .uleb128 0xb\r
- 189 001c 03                   .uleb128 0x3\r
- 190 001d 0E                   .uleb128 0xe\r
- 191 001e 00                   .byte   0\r
- 192 001f 00                   .byte   0\r
- 193 0020 03                   .uleb128 0x3\r
- 194 0021 24                   .uleb128 0x24\r
- 195 0022 00                   .byte   0\r
- 196 0023 0B                   .uleb128 0xb\r
- 197 0024 0B                   .uleb128 0xb\r
- 198 0025 3E                   .uleb128 0x3e\r
- 199 0026 0B                   .uleb128 0xb\r
- 200 0027 03                   .uleb128 0x3\r
- 201 0028 08                   .uleb128 0x8\r
- 202 0029 00                   .byte   0\r
- 203 002a 00                   .byte   0\r
- 204 002b 04                   .uleb128 0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 6\r
-\r
-\r
- 205 002c 16                   .uleb128 0x16\r
- 206 002d 00                   .byte   0\r
- 207 002e 03                   .uleb128 0x3\r
- 208 002f 0E                   .uleb128 0xe\r
- 209 0030 3A                   .uleb128 0x3a\r
- 210 0031 0B                   .uleb128 0xb\r
- 211 0032 3B                   .uleb128 0x3b\r
- 212 0033 0B                   .uleb128 0xb\r
- 213 0034 49                   .uleb128 0x49\r
- 214 0035 13                   .uleb128 0x13\r
- 215 0036 00                   .byte   0\r
- 216 0037 00                   .byte   0\r
- 217 0038 05                   .uleb128 0x5\r
- 218 0039 35                   .uleb128 0x35\r
- 219 003a 00                   .byte   0\r
- 220 003b 49                   .uleb128 0x49\r
- 221 003c 13                   .uleb128 0x13\r
- 222 003d 00                   .byte   0\r
- 223 003e 00                   .byte   0\r
- 224 003f 06                   .uleb128 0x6\r
- 225 0040 2E                   .uleb128 0x2e\r
- 226 0041 01                   .byte   0x1\r
- 227 0042 3F                   .uleb128 0x3f\r
- 228 0043 0C                   .uleb128 0xc\r
- 229 0044 03                   .uleb128 0x3\r
- 230 0045 0E                   .uleb128 0xe\r
- 231 0046 3A                   .uleb128 0x3a\r
- 232 0047 0B                   .uleb128 0xb\r
- 233 0048 3B                   .uleb128 0x3b\r
- 234 0049 0B                   .uleb128 0xb\r
- 235 004a 27                   .uleb128 0x27\r
- 236 004b 0C                   .uleb128 0xc\r
- 237 004c 49                   .uleb128 0x49\r
- 238 004d 13                   .uleb128 0x13\r
- 239 004e 11                   .uleb128 0x11\r
- 240 004f 01                   .uleb128 0x1\r
- 241 0050 12                   .uleb128 0x12\r
- 242 0051 01                   .uleb128 0x1\r
- 243 0052 40                   .uleb128 0x40\r
- 244 0053 0A                   .uleb128 0xa\r
- 245 0054 9742                 .uleb128 0x2117\r
- 246 0056 0C                   .uleb128 0xc\r
- 247 0057 00                   .byte   0\r
- 248 0058 00                   .byte   0\r
- 249 0059 07                   .uleb128 0x7\r
- 250 005a 34                   .uleb128 0x34\r
- 251 005b 00                   .byte   0\r
- 252 005c 03                   .uleb128 0x3\r
- 253 005d 0E                   .uleb128 0xe\r
- 254 005e 3A                   .uleb128 0x3a\r
- 255 005f 0B                   .uleb128 0xb\r
- 256 0060 3B                   .uleb128 0x3b\r
- 257 0061 0B                   .uleb128 0xb\r
- 258 0062 49                   .uleb128 0x49\r
- 259 0063 13                   .uleb128 0x13\r
- 260 0064 1C                   .uleb128 0x1c\r
- 261 0065 0B                   .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 7\r
-\r
-\r
- 262 0066 00                   .byte   0\r
- 263 0067 00                   .byte   0\r
- 264 0068 00                   .byte   0\r
- 265                           .section        .debug_aranges,"",%progbits\r
- 266 0000 1C000000             .4byte  0x1c\r
- 267 0004 0200                 .2byte  0x2\r
- 268 0006 00000000             .4byte  .Ldebug_info0\r
- 269 000a 04                   .byte   0x4\r
- 270 000b 00                   .byte   0\r
- 271 000c 0000                 .2byte  0\r
- 272 000e 0000                 .2byte  0\r
- 273 0010 00000000             .4byte  .LFB0\r
- 274 0014 18000000             .4byte  .LFE0-.LFB0\r
- 275 0018 00000000             .4byte  0\r
- 276 001c 00000000             .4byte  0\r
- 277                           .section        .debug_ranges,"",%progbits\r
- 278                   .Ldebug_ranges0:\r
- 279 0000 00000000             .4byte  .LFB0\r
- 280 0004 18000000             .4byte  .LFE0\r
- 281 0008 00000000             .4byte  0\r
- 282 000c 00000000             .4byte  0\r
- 283                           .section        .debug_line,"",%progbits\r
- 284                   .Ldebug_line0:\r
- 285 0000 62000000             .section        .debug_str,"MS",%progbits,1\r
- 285      02004800 \r
- 285      00000201 \r
- 285      FB0E0D00 \r
- 285      01010101 \r
- 286                   .LASF6:\r
- 287 0000 6C6F6E67             .ascii  "long long int\000"\r
- 287      206C6F6E \r
- 287      6720696E \r
- 287      7400\r
- 288                   .LASF8:\r
- 289 000e 756E7369             .ascii  "unsigned int\000"\r
- 289      676E6564 \r
- 289      20696E74 \r
- 289      00\r
- 290                   .LASF16:\r
- 291 001b 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\USBFS_vnd.c\000"\r
- 291      6E657261 \r
- 291      7465645F \r
- 291      536F7572 \r
- 291      63655C50 \r
- 292                   .LASF18:\r
- 293 0040 55534246             .ascii  "USBFS_HandleVendorRqst\000"\r
- 293      535F4861 \r
- 293      6E646C65 \r
- 293      56656E64 \r
- 293      6F725271 \r
- 294                   .LASF15:\r
- 295 0057 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 295      4320342E \r
- 295      372E3320 \r
- 295      32303133 \r
- 295      30333132 \r
- 296 008a 616E6368             .ascii  "anch revision 196615]\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 8\r
-\r
-\r
- 296      20726576 \r
- 296      6973696F \r
- 296      6E203139 \r
- 296      36363135 \r
- 297                   .LASF12:\r
- 298 00a0 75696E74             .ascii  "uint8\000"\r
- 298      3800\r
- 299                   .LASF5:\r
- 300 00a6 6C6F6E67             .ascii  "long unsigned int\000"\r
- 300      20756E73 \r
- 300      69676E65 \r
- 300      6420696E \r
- 300      7400\r
- 301                   .LASF19:\r
- 302 00b8 72657175             .ascii  "requestHandled\000"\r
- 302      65737448 \r
- 302      616E646C \r
- 302      656400\r
- 303                   .LASF7:\r
- 304 00c7 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 304      206C6F6E \r
- 304      6720756E \r
- 304      7369676E \r
- 304      65642069 \r
- 305                   .LASF1:\r
- 306 00de 756E7369             .ascii  "unsigned char\000"\r
- 306      676E6564 \r
- 306      20636861 \r
- 306      7200\r
- 307                   .LASF11:\r
- 308 00ec 63686172             .ascii  "char\000"\r
- 308      00\r
- 309                   .LASF4:\r
- 310 00f1 6C6F6E67             .ascii  "long int\000"\r
- 310      20696E74 \r
- 310      00\r
- 311                   .LASF13:\r
- 312 00fa 72656738             .ascii  "reg8\000"\r
- 312      00\r
- 313                   .LASF10:\r
- 314 00ff 646F7562             .ascii  "double\000"\r
- 314      6C6500\r
- 315                   .LASF3:\r
- 316 0106 73686F72             .ascii  "short unsigned int\000"\r
- 316      7420756E \r
- 316      7369676E \r
- 316      65642069 \r
- 316      6E7400\r
- 317                   .LASF0:\r
- 318 0119 7369676E             .ascii  "signed char\000"\r
- 318      65642063 \r
- 318      68617200 \r
- 319                   .LASF9:\r
- 320 0125 666C6F61             .ascii  "float\000"\r
- 320      7400\r
- 321                   .LASF2:\r
- 322 012b 73686F72             .ascii  "short int\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccwHw8QE.s                      page 9\r
-\r
-\r
- 322      7420696E \r
- 322      7400\r
- 323                   .LASF17:\r
- 324 0135 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 324      43534932 \r
- 324      53445C73 \r
- 324      6F667477 \r
- 324      6172655C \r
- 325 0164 6E00                 .ascii  "n\000"\r
- 326                   .LASF14:\r
- 327 0166 73697A65             .ascii  "sizetype\000"\r
- 327      74797065 \r
- 327      00\r
- 328                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.o
deleted file mode 100755 (executable)
index 74531cc..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USBFS_vnd.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-BUILD.log b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-BUILD.log
deleted file mode 100755 (executable)
index 26a6e4d..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-BUILD.log
+++ /dev/null
@@ -1,53 +0,0 @@
---------------- Build Started: 03/22/2014 22:32:33 Project: USB_Bootloader, Configuration: ARM GCC 4.7.3 Release ---------------\r
-cydsfit.exe "-.appdatapath" "C:\Users\Micha_000\AppData\Local\Cypress Semiconductor\PSoC Creator\3.0" "-.fdsnotice" "-.fdswarpdepfile=warp_dependencies.txt" "-.fdselabdepfile=elab_dependencies.txt" "-.fdsbldfile=generated_files.txt" "-p" "W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj" "-d" "CY8C5267AXI-LP051" "-s" "W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\Generated_Source\PSoC5" "--" "-yv2" "-v3" "-ygs" "-q10" "-o2" "-.fftcfgtype=LE"\r
-Elaborating Design...\r
-HDL Generation ...\r
-Synthesis ...\r
-Place and Route ...\r
-Tech mapping ...\r
-Analog Placement ...\r
-Analog Routing ...\r
-Analog Code Generation ...\r
-Digital Placement ...\r
-Digital Routing ...\r
-Bitstream Generation ...\r
-Static timing analysis ...\r
-API Generation ...\r
-Dependency Generation ...\r
-Clean Temporary Files ...\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\main.lst -Os -ffunction-sections -c .\main.c -o .\CortexM3\ARM_GCC_473\Release\main.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyfitter_cfg.c -o .\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cymetadata.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cymetadata.c -o .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS.c -o .\CortexM3\ARM_GCC_473\Release\USBFS.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_audio.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_audio.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_audio.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_boot.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_boot.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_boot.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_cdc.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_cdc.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_cls.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_cls.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_cls.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_descr.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_descr.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_descr.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_drv.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_drv.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_drv.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_episr.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_episr.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_episr.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_hid.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_hid.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_hid.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_pm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_pm.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_pm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_std.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_std.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_std.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_vnd.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_vnd.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_midi.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_midi.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_midi.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\BL.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\BL.c -o .\CortexM3\ARM_GCC_473\Release\BL.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_Dm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_Dm.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_Dp.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_Dp.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\Cm3Start.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\Cm3Start.c -o .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-arm-none-eabi-as.exe -I. -I./Generated_Source/PSoC5 -mcpu=cortex-m3 -mthumb -g -alh=.\CortexM3\ARM_GCC_473\Release/CyBootAsmGnu.lst -o .\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o .\Generated_Source\PSoC5\CyBootAsmGnu.s\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyDmac.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyDmac.c -o .\CortexM3\ARM_GCC_473\Release\CyDmac.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyFlash.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyFlash.c -o .\CortexM3\ARM_GCC_473\Release\CyFlash.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyLib.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyLib.c -o .\CortexM3\ARM_GCC_473\Release\CyLib.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyPm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyPm.c -o .\CortexM3\ARM_GCC_473\Release\cyPm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CySpc.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CySpc.c -o .\CortexM3\ARM_GCC_473\Release\CySpc.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyutils.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyutils.c -o .\CortexM3\ARM_GCC_473\Release\cyutils.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\SD_PULLUP.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\SD_PULLUP.c -o .\CortexM3\ARM_GCC_473\Release\SD_PULLUP.o\r
-arm-none-eabi-ar.exe -rs .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a .\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o .\CortexM3\ARM_GCC_473\Release\USBFS.o .\CortexM3\ARM_GCC_473\Release\USBFS_audio.o .\CortexM3\ARM_GCC_473\Release\USBFS_boot.o .\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o .\CortexM3\ARM_GCC_473\Release\USBFS_cls.o .\CortexM3\ARM_GCC_473\Release\USBFS_descr.o .\CortexM3\ARM_GCC_473\Release\USBFS_drv.o .\CortexM3\ARM_GCC_473\Release\USBFS_episr.o .\CortexM3\ARM_GCC_473\Release\USBFS_hid.o .\CortexM3\ARM_GCC_473\Release\USBFS_pm.o .\CortexM3\ARM_GCC_473\Release\USBFS_std.o .\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o .\CortexM3\ARM_GCC_473\Release\USBFS_midi.o .\CortexM3\ARM_GCC_473\Release\BL.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o .\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o .\CortexM3\ARM_GCC_473\Release\CyDmac.o .\CortexM3\ARM_GCC_473\Release\CyFlash.o .\CortexM3\ARM_GCC_473\Release\CyLib.o .\CortexM3\ARM_GCC_473\Release\cyPm.o .\CortexM3\ARM_GCC_473\Release\CySpc.o .\CortexM3\ARM_GCC_473\Release\cyutils.o .\CortexM3\ARM_GCC_473\Release\SD_PULLUP.o\r
-arm-none-eabi-ar.exe: creating .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a\r
-arm-none-eabi-gcc.exe -mthumb -march=armv7-m -mfix-cortex-m3-ldrd -T .\Generated_Source\PSoC5\cm3gcc.ld -g -Wl,-Map,.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.map -specs=nano.specs -Wl,--gc-sections -Wl,--start-group -o .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf .\CortexM3\ARM_GCC_473\Release\main.o .\CortexM3\ARM_GCC_473\Release\cymetadata.o .\CortexM3\ARM_GCC_473\Release\Cm3Start.o .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a "C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\CortexM3\ARM_GCC_473\Release\CyComponentLibrary.a" -Wl,--end-group\r
-cyelftool.exe -P W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf --flash_row_size 256 --flash_size 131072 --size_var_name BL_SizeBytes --checksum_var_name BL_Checksum\r
-cyelftool.exe -S W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf\r
-Flash used: 8880 of 131072 bytes (6.8 %).\r
-SRAM used: 10869 of 32768 bytes (33.2 %).\r
---------------- Build Succeeded: 03/22/2014 22:33:44 ---------------\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-REBUILD.log b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-REBUILD.log
deleted file mode 100755 (executable)
index 793f16f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader-ARM_GCC_473-Release-REBUILD.log
+++ /dev/null
@@ -1,89 +0,0 @@
---------------- Rebuild Started: 10/26/2013 18:55:02 Project: USB_Bootloader, Configuration: ARM GCC 4.7.3 Release ---------------\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\main.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\cymetadata.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_audio.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_boot.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_cls.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_descr.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_drv.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_episr.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_hid.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_pm.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_std.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_midi.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\BL.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\Cm3Start.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\CyDmac.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\CyFlash.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\CyLib.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\cyPm.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\CySpc.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\cyutils.o"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USB_Bootloader.hex"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\USB_Bootloader.map"\r
-Deleting file ".\USB_Bootloader.cycdx"\r
-Deleting file ".\USB_Bootloader.svd"\r
-Deleting file ".\USB_Bootloader.rpt"\r
-Deleting file ".\USB_Bootloader_timing.html"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\.deps\C_FILE.P"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\.deps\ARM_C_FILE.P"\r
-Deleting file ".\CortexM3\ARM_GCC_473\Release\.deps\GNU_ARM_ASM_FILE.P"\r
-cydsfit.exe "-.appdatapath" "C:\Users\Micha_000\AppData\Local\Cypress Semiconductor\PSoC Creator\3.0" "-.fdsnotice" "-.fdswarpdepfile=warp_dependencies.txt" "-.fdselabdepfile=elab_dependencies.txt" "-.fdsbldfile=generated_files.txt" "-p" "W:\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj" "-d" "CY8C5267AXI-LP051" "-s" "W:\SCSI2SD\USB_Bootloader.cydsn\Generated_Source\PSoC5" "--" "-yv2" "-v3" "-ygs" "-q10" "-o2" "-.fftcfgtype=LE"\r
-Elaborating Design...\r
-HDL Generation ...\r
-Synthesis ...\r
-Place and Route ...\r
-Tech mapping ...\r
-Analog Placement ...\r
-Analog Routing ...\r
-Analog Code Generation ...\r
-Digital Placement ...\r
-Digital Routing ...\r
-Bitstream Generation ...\r
-Static timing analysis ...\r
-API Generation ...\r
-Dependency Generation ...\r
-Clean Temporary Files ...\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\main.lst -Os -ffunction-sections -c .\main.c -o .\CortexM3\ARM_GCC_473\Release\main.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyfitter_cfg.c -o .\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cymetadata.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cymetadata.c -o .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS.c -o .\CortexM3\ARM_GCC_473\Release\USBFS.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_audio.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_audio.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_audio.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_boot.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_boot.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_boot.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_cdc.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_cdc.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_cls.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_cls.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_cls.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_descr.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_descr.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_descr.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_drv.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_drv.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_drv.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_episr.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_episr.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_episr.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_hid.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_hid.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_hid.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_pm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_pm.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_pm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_std.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_std.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_std.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_vnd.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_vnd.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_midi.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_midi.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_midi.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\BL.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\BL.c -o .\CortexM3\ARM_GCC_473\Release\BL.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_Dm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_Dm.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\USBFS_Dp.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\USBFS_Dp.c -o .\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\Cm3Start.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\Cm3Start.c -o .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-arm-none-eabi-as.exe -I. -I./Generated_Source/PSoC5 -mcpu=cortex-m3 -mthumb -g -alh=.\CortexM3\ARM_GCC_473\Release/CyBootAsmGnu.lst -o .\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o .\Generated_Source\PSoC5\CyBootAsmGnu.s\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyDmac.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyDmac.c -o .\CortexM3\ARM_GCC_473\Release\CyDmac.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyFlash.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyFlash.c -o .\CortexM3\ARM_GCC_473\Release\CyFlash.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CyLib.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CyLib.c -o .\CortexM3\ARM_GCC_473\Release\CyLib.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyPm.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyPm.c -o .\CortexM3\ARM_GCC_473\Release\cyPm.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\CySpc.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\CySpc.c -o .\CortexM3\ARM_GCC_473\Release\CySpc.o\r
-arm-none-eabi-gcc.exe -I. -I./Generated_Source/PSoC5 -Wno-main -mcpu=cortex-m3 -mthumb -Wall -g -D NDEBUG -Wa,-alh=.\CortexM3\ARM_GCC_473\Release\cyutils.lst -Os -ffunction-sections -c .\Generated_Source\PSoC5\cyutils.c -o .\CortexM3\ARM_GCC_473\Release\cyutils.o\r
-arm-none-eabi-ar.exe -rs .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a .\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o .\CortexM3\ARM_GCC_473\Release\USBFS.o .\CortexM3\ARM_GCC_473\Release\USBFS_audio.o .\CortexM3\ARM_GCC_473\Release\USBFS_boot.o .\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o .\CortexM3\ARM_GCC_473\Release\USBFS_cls.o .\CortexM3\ARM_GCC_473\Release\USBFS_descr.o .\CortexM3\ARM_GCC_473\Release\USBFS_drv.o .\CortexM3\ARM_GCC_473\Release\USBFS_episr.o .\CortexM3\ARM_GCC_473\Release\USBFS_hid.o .\CortexM3\ARM_GCC_473\Release\USBFS_pm.o .\CortexM3\ARM_GCC_473\Release\USBFS_std.o .\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o .\CortexM3\ARM_GCC_473\Release\USBFS_midi.o .\CortexM3\ARM_GCC_473\Release\BL.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o .\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o .\CortexM3\ARM_GCC_473\Release\CyDmac.o .\CortexM3\ARM_GCC_473\Release\CyFlash.o .\CortexM3\ARM_GCC_473\Release\CyLib.o .\CortexM3\ARM_GCC_473\Release\cyPm.o .\CortexM3\ARM_GCC_473\Release\CySpc.o .\CortexM3\ARM_GCC_473\Release\cyutils.o\r
-arm-none-eabi-ar.exe: creating .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a\r
-arm-none-eabi-gcc.exe -mthumb -march=armv7-m -mfix-cortex-m3-ldrd -T .\Generated_Source\PSoC5\cm3gcc.ld -g -Wl,-Map,.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.map -specs=nano.specs -Wl,--gc-sections -Wl,--start-group -o .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf .\CortexM3\ARM_GCC_473\Release\main.o .\CortexM3\ARM_GCC_473\Release\cymetadata.o .\CortexM3\ARM_GCC_473\Release\Cm3Start.o .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a "C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\CortexM3\ARM_GCC_473\Release\CyComponentLibrary.a" -Wl,--end-group\r
-cyelftool.exe -P W:\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf --flash_row_size 256 --flash_size 131072 --size_var_name BL_SizeBytes --checksum_var_name BL_Checksum\r
-cyelftool.exe -S W:\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf\r
-Flash used: 8856 of 131072 bytes (6.8 %).\r
-SRAM used: 10869 of 32768 bytes (33.2 %).\r
---------------- Rebuild Succeeded: 10/26/2013 18:56:17 ---------------\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.a b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.a
deleted file mode 100755 (executable)
index 2081270..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.a and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.elf b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.elf
deleted file mode 100755 (executable)
index 58f35a0..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.elf and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.hex b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.hex
deleted file mode 100755 (executable)
index d0b7cd1..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.hex
+++ /dev/null
@@ -1,2318 +0,0 @@
-:400000000040002011000000610100006101000008B5044B04481A68026000F079FC00F0A1F800BFFA460040BC76004010B5054C237833B9044810B10448AFF30080012176\r
-:40004000217010BD28C1FF1F000000000420000008B5064B1BB106480649AFF300800648016811B1054A02B1904708BD00000000042000002CC1FF1F08C1FF1F0000000031\r
-:4000800008B5364B1A7802F0FE00187093F8221001F0FE0283F822200733187800F0FE01197013F8012C02F0FE0003F8010C13F8021C01F0FE0203F8022C13F8040C00F0CD\r
-:4000C000FE0103F8041C13F8062C02F0FE0003F8060C13F8031C01F0FE0203F8032C13F8050C00F0FE0103F8051C93F82C2002F0FE0083F82C002B33197801F0FE021A7068\r
-:4001000013F8010C00F0FE0103F8011C13F8022C02F0FE0003F8020C13F80B1C01F0FE0203F80B2C13F80C0C00F0FE0103F80C1C13F80D2C02F0FE0003F80D0C13F80E1C67\r
-:4001400001F0FE0203F80E2C13F80F0C00F0FE0103F80F1C00F09CFBFEE700BF00500040FEE7000008B51249124B4A1C1AD053F8106C53F80C0C53F8085C0022AA4200EBE7\r
-:40018000020403D0B45884500432F7E753F8040C0022824203D00025A5500432F9E701391033E2E701F0F2FEFFF76AFFFEE700BF000000005022000008B5104A104B1A60A6\r
-:4001C000986840F400729A600023032B96BF0D4A0D4952F823100D4A42F823100133302BF3D10B490B4B08780B4918700A6000F017F80A480022026008BD00BF0004FA05AC\r
-:400200000CED00E0000000006101000000C0FF1FBC76004004C1FF1F08ED00E000C1FF1FF8B572B65E4B0122A3F5A061A1F58075062052245B4E1A7008702C7037785A4BA0\r
-:400240005A4A40F6180041F25121177019251880002423F8021C564E4FF4F070377807F0010242EA440400F06BFB013D04F0030417D0032CEFD14F484F4F00264FF48073D3\r
-:400280004E4D072148220224038001703E70BA700670467100F8034C287840F004032B7000E0FEE7464F062101FB0672002110680136928801F099FE082EF3D10023194656\r
-:4002C000404C002218593034C6B220F0FF0704EB4104D5B2AE4209D004EB420C14F812509CF801E0013205F807E0F2E70433C0B2302B0144E4D1344C227842F0020020707D\r
-:40030000217C324841F00203314923740C7844F040020A7003782F4A43F010042E4B047018685C68106054601A462C4852F8084F046054681289446002811A4652F8124FF9\r
-:40034000526840F8BE4C40F8BA2C1A4652F81A4F526840F8AE4C40F8AA2C53F8220F204A5B6810601F485360027842F0080303701D481E4A037803F007001B091070537050\r
-:400380001B4A442010701B4A0B460C3153F8040B8B4242F8040BF9D119881180F8BD00BF004800400F01004922420040A1460040254200400440004006400040E846004056\r
-:4003C000082000003820000003500140C2430040A04300400251004096200000F05100406251004022430040CF0100496E58004076580040B043004000470000431E10B552\r
-:400400000246062B0DD8DFE803F0060E2304080A2100164808E0164B1BE0164804E0164802E0002000E015484178007841EA0020022A04D0032A07D0012A15D104E002023C\r
-:4004400042EA102398B210BD00BA10BD0C4B00E00C4BD8789C7859781B7840EA036040EA042343EA0140E3E710BD00BFD2FF0100C1FF0100D6FF0100D4FF0100C5FF010085\r
-:40048000D8FF0100C9FF010070B50220FFF7B6FF06460320FFF7B2FF711C00EB01260220FFF7ACFF0024013001022546B14209D211F8010B421ED3B20419FD2B98BF0125E4\r
-:4004C000E4B2F3E70220FFF799FF0F49421C1302DB088E4201D0F60801E04FF48046B34206D203F19041087801330219D4B2F6E7054864420278E4B2944201D0062070BDE4\r
-:40050000002DFBD0002070BDC0FF01002DE9F04FADF5617D804600F0E3FB62B60026B2464FF00A093746B8F1000F01D1FF2300E043464AA84FF4967101AA00F00BFCB8F1AC\r
-:40054000000F03D009F1FF395FFA89F9B9F1000F02D00028E7D101E0002871D1BDF80420062A40F27B819DF82831012B40F076819DF82A019DF82B514AA940EA0525EC1D3D\r
-:400580004B1994425879197900F266819A79172A40F064812B1D9BB200223BB10DF22714E45C013B121992B29BB2F6E7524241EA002091B2884240F053814AE0002E00F032\r
-:4005C0004D81012D4FF0000440F03C81BBF1010F00F23881FF238DF82C418DF82D4125468DF82E318DF82F61042401200022211DADF806408DF828018DF829518DF82A41CC\r
-:400600008DF82B218BB20DF22710C15C013B52189BB292B2002BF6D1504281B2080A4BAA0DF22D131155185517210DF59772E31D11554AA899B20DF10602962300F060FB62\r
-:40064000B8F1000F3FF472AF002E00F01281012669E79DF829219DF82CB1A2F131030A2B00F2F78001A151F823F000BF99060000BD05000053080000B706000069070000EA\r
-:40068000530800006F0700008D070000B7060000A707000033080000002E00F0DF80002D40F0DC80FFF7F0FED0F1010238BF00228DF82C21BBE0342A12D1002E00F0CE801E\r
-:4006C000032D40F0CB80ABF140073F2F8CBF4FF49077102795A800213A4601F086FC05E0002E00F0BB80022D40F2B880033D95AB2A46D8190DF22F1101F06EFCABF14000B3\r
-:400700007A193F2896B203D800F0D2F9102401E04FF49074A64240F097809DF82E119DF82D71BBF13F0F47EA012511D8BAF1000F0ED151464FF4907202A801F056FC012092\r
-:40074000FF2102AA4FF4907300F062F94FF0010A33465846294695AA00F05AF90126002875D000270A2575E0002E77D07AE0002E74D07C19B4F5967F6ED895A9C8192A4622\r
-:400780004BA901F029FCA7B2002563E0002D65D13A4802AE4BAC03C886E8030084E803000126082421E7002E58D0032D56D19DF82E019DF82D11ABF140023F2A41EA002501\r
-:4007C0000AD82D01002310222D4811184C5D013A2344DBB2F8D126E005EB0B231C024FF480720023013A105D1918CBB2002AF9D1BBF13F0F17D80BF5103405EB04204101EE\r
-:40080000545C01321B19202ADBB2F9D1BBF1010F09D1FF2D07D11B4D1B4C2878191A2378CA1A02F0FF035D428DF82C5100250124DBE6FFF729FE10B9144D80242C7000F02E\r
-:4008400045F90BE00425D0E60126002704E007469AE705250024C8E60325FBE70425F9E70825F7E7B8F1000F01D147465EE60027EDE60DF5617DBDE8F08F00BFC02000005E\r
-:40088000FF7F0040D0FF0100D1FF0100FA46004010B5C8B000F092F810B1002000F014F9684600F09FF810B1002000F00DF916480368196800230A4622B112F8014DE318D5\r
-:4008C000DBB2F9E742681078C41A04F0FF03834200D111B9002000F0F7F80C4CFFF7D4FD217801F0C002402A00D018B100202070FFF70CFE1420FFF709FE8020207000F0B7\r
-:40090000E5F848B010BD00BF0CC1FF1FFA46004008B50A4B1A7802F0C00080280CD1002119700120FFF76AFD30B10120FFF766FDBDE80840FFF760BD08BD00BFFA46004089\r
-:400940000230800800F0058000BF013800467FF4FCAF7047EFF3108072B6704780F31088704700BFAFF30080012010B500F060F9072809D04FF0FF3417E00E4B187800F0C8\r
-:400980000201CAB2002AF5D102210B4800F0ECF80228F2D1074C237803F00200C1B219B9012000F0AFF8F5E7002400F07FF9204610BD00BF2247004057C1FF1F08B500F0CB\r
-:4009C000C1F800F053F958B9FFF7CEFF48B900F0B9F800F04BF918B9BDE80840FFF7C4BF042008BD38B5044600F0ACF84CB100F03DF9054638B9054B1C6000F057F9284694\r
-:400A000038BD012038BD042038BD00BF44C1FF1FF8B505460E4617461C4600F027F9F0B922462846394600F0B9F80728044613D11D4B1A7802F00200C1B219B9012000F055\r
-:400A400061F8F5E71C7804F00202D0B210B11B789B0806D04FF0FF3400F028F922E0042420E0124C284622786378314600F0BCF807280446F0D10C490A7802F00200C3B2E3\r
-:400A80001BB9012000F03EF8F5E70C7804F00202D0B20028DED009788B0814BF4FF0FF340024D9E72046F8BD2247004057C1FF1F044B1A7842F010001870197C41F01002B1\r
-:400AC0001A747047AC43004001BE7047024B1A7842F0010018707047F646004010B50446B4F5004F064B05D91868FFF729FFA4F50044F5E758686043BDE81040FFF720BF85\r
-:400B000014C1FF1F024B197A4843FFF719BF00BF14C1FF1F054B00F01F001B6800F1100253F8220043F82210704700BF08ED00E000F01F0000F16043490103F56442C8B2C8\r
-:400B40001070704708B5FFF705FF064B1A7842F0080119701A7C42F008011974BDE80840FFF7FCBEA043004070B506460D460024E3B2AB420CD207480178CB0703D40120E8\r
-:400B8000FFF7C0FFF7E7044A137833550134EFE7284670BD224700402047004030B5104B1C7804F00204E4B2ACB10E4CB6252570D5252570022525701B782B40DBB263B9CE\r
-:400BC000207098B2904204D2CC5C064801330470F7E7072030BD042030BD092030BD00BF224700402047004070B50F4D2C7804F00204E4B2A4B10D4CB6262670D8262670C4\r
-:400C0000052626702D7805F00205EDB255B92070080AC9B22070217007202270237070BD042070BD092070BD22470040204700400C4A137803F00201CBB273B10A4BB62153\r
-:400C40001970E12119700E211970127802F00201CAB222B9187007207047042070470920704700BF224700402047004038B5FFF771FE0C4B197879B901250B4A1D701468B2\r
-:400C80002C400AD0146824F00104146000BF00BF00BF5D600C4600E00424FFF75FFE204638BD00BF48C1FF1F0400084010B5FFF751FE094B002259681A70012908D1074993\r
-:400CC0000C6844F001040C6000BF00BF00BF5A60BDE81040FFF742BE48C1FF1F0400084008B562B60020022100F062F9014B01221A7008BD50C1FF1F012000F003BA000068\r
-:400D0000F8B507460E4602201546394640221C4600F0BAF90A235C430D4844800024022000F094F950B90A49671C4A88BFB2A24204D90120FFF7D2FE3C46F0E7022000F025\r
-:400D400085F910B12E800020F8BD1020F8BD00BF50C1FF1F2DE9F04115460A225343284C8046638024780F46D4B1002400F05EF958B9234B661C5888B6B2A04204D9012053\r
-:400D8000FFF7ACFE3446F1E7344600F04FF9E0B100F052F9FFF7B0FF194A0021117014E000F04AF908B900240FE000F03FF90028F9D0FFF7A1FF08E0114B661C5988B6B260\r
-:400DC000A14209D9FFF78AFE3446012000F03EF901284FF00100EFD100F038F901280AD14146402F34BF3A46402200F09FF928800020BDE8F081002028801020BDE8F08161\r
-:400E000050C1FF1FF8B5FFF7A5FD384B07461A78012542F001001870197C022641F001041C74334B334C1D7003F8946C13F88D2C02F07F0003F88D0C0020FFF763FE21781A\r
-:400E40002D4801F0F9032370027802F0DF010170237828462B432370FFF754FE2820FFF751FE2648027802F07F010170037803F0BF0202702078304320703046FFF742FE2E\r
-:400E800021781F4A41F0040323700024147038465470FFF763FD17201A49FFF73BFE17200721FFF745FE15201749FFF733FE15200721FFF73DFE18201449FFF72BFE18208E\r
-:400EC0000721FFF735FE20461149FFF723FE20460721FFF72DFE28460E49FFF71BFE28460721BDE8F840FFF723BE00BFA54300409D6000409443004012600040F851004087\r
-:400F00008460004003160000011600004114000099150000CD150000184B012210B51A70174B4FF400041C604FF080741C601A6002221A60134B00241C70134B01B1032274\r
-:400F400012491A70124B0870124A002012491870124B10700870124A12491870124B10700870802203201870012003F8202CFFF7E7FC0E480421017010BD00BFECC1FF1F9E\r
-:400F800000E100E072C1FF1F096000406CC1FF1F71C1FF1F6DC1FF1F70C1FF1F5CC1FF1F6FC1FF1FE5C1FF1F286000401260004070B5074C064623780D461BB9FFF722FFDC\r
-:400FC0000120207030462946BDE87040FFF7A4BF54C1FF1F0C4B01220C491A7000200C4A0C4B08700C49107018700C4A0C4B08700C49107018700C4B0870802203201870E1\r
-:4010000003F8202C704700BFECC1FF1F72C1FF1F71C1FF1F6DC1FF1F70C1FF1F5CC1FF1F6FC1FF1FE5C1FF1F28600040014B1878704700BF71C1FF1F034B187810B1002274\r
-:4010400018781A70704700BF70C1FF1F024B0C2202FB00304078704778C1FF1F0138C3B2072B0CD81901074ACBB2985C511C5B5C00F00F0243EA0220811E88B2704700205F\r
-:40108000704700BF0C600040431EDBB2072BF0B52FD8184E1C010C27E3B207FB0064E788154DBFB2C7F50077BA421D4403D9E288C2F50074A2B20C2404FB0066F47844EACB\r
-:4010C00012260E4C1E55D6B201341E5549B9094A0C2101FB0020002141704079084A9854F0BD0024A6B29642F1D20E5D01342E70F8E7F0BD78C1FF1F886000400C6000409B\r
-:401100000E600040431EDBB2072B0AD8054A0C2101FB0020002141701B014079024ADBB29854704778C1FF1F0E600040F8B5431E0D46D9B207290746144616D8BDB10A0115\r
-:401140000C4ED3B29E19FFF789FFA04228BF204684B2002290B2A04203D23178A9540132F8E73846FFF7CEFF02E0002400E02C462046F8BD886000401B4B1C491A8808785A\r
-:40118000821891B219801A491A4BCAB2188880B278B1194A91420BD05A68107801F8010B5A68501C58601A88501E82B21A80EBE708220E490B78082B00D05AB10F480178A2\r
-:4011C00081F080030E4903700F200E4B08700220187004E00A490B4B022008701870034909480A7002707047E8C1FF1FE5C1FF1F0060004060C1FF1F086000406EC1FF1F39\r
-:401200005DC1FF1F72C1FF1FE6C1FF1F074B02221A700749074B80200F2208701A700649064A0020087010700120704772C1FF1F6EC1FF1F5DC1FF1FE5C1FF1FE6C1FF1FF5\r
-:4012400010B5154B1A78154B02F00F00811E1888CAB2111888B212491880124B188880B270B16AB1586811F8014B013A04705868D2B2013058601888013880B21880ECE773\r
-:4012800009490A4B0A701A780B2182F080001870074B197010BD00BF29600040E8C1FF1F0060004060C1FF1FE6C1FF1F6EC1FF1F5DC1FF1F064A0748062313700370064BA2\r
-:4012C000064880210022197002700120704700BF72C1FF1F5DC1FF1F6EC1FF1FE6C1FF1F054B9A683AB19968044A087098681188418000209860704760C1FF1FE8C1FF1F79\r
-:4013000008B50A4B1A7832B11978094A41F08000002110701970074B002018700120FFF7DFFF054903220A7008BD00BF5CC1FF1F0860004072C1FF1F5DC1FF1F08B5054B8A\r
-:40134000002201201A70FFF7CBFF03490320087008BD00BF72C1FF1F5DC1FF1F074B1878042805D0062805D0022805D1FFF704BFFFF7E4BFFFF7C4BF704700BF72C1FF1F70\r
-:4013800008B50849084B1A880878821891B21980064B002018700120FFF7A2FF044903220A7008BDE5C1FF1FE8C1FF1F72C1FF1F5DC1FF1F08B50B4B1878042807D00628E6\r
-:4013C00009D002280DD1BDE80840FFF7D9BFBDE80840FFF735BF0320FFF782FF024903220A7008BD72C1FF1F5DC1FF1F08B5114B1A781A701878020602D50F4B187008BD99\r
-:401400000220FFF76DFF0D490B7803F06002202A05D0402A06D042B900F04AFC04E000F08DFD01E000F07EFD10B903490320087008BD00BF286000405DC1FF1F00600040E8\r
-:4014400008B5224B1A78D0B200F01001CBB2002B3BD052B2002A0ADA00F00F01012934D1FFF7C4FF1A4B187800060DD508BD00F04001CBB213B1FFF771FF05E000F0200011\r
-:40148000C2B212B3FFF796FF104A117809061CD4104B114A1878117841EA00030F4803700278934211D10A49084B0A78187800F08000C0B220B90A781A70197801F00F027C\r
-:4014C000034B18788242EED108BD08BD286000405DC1FF1F6EC1FF1FE6C1FF1F29600040054A00231380054A916819B191680B7090684380704700BFE8C1FF1F60C1FF1F60\r
-:4015000008B50C490C4B042280201A700870FFF7E7FF0A4B1A78581E094B0178188841EA022281B2914288BF1A80064B0B221A70012008BD6EC1FF1F72C1FF1F076000406B\r
-:4015400060C1FF1F5DC1FF1F10B50F4C238898B210B9FFF75BFE14E00C490D4B022200200A701870FFF7BCFF0A49481E0A78037843EA0221228890B2884288BF2180FFF791\r
-:40158000FBFD012010BD00BF60C1FF1F72C1FF1F6EC1FF1F07600040094B0A481B78027B02F00301012903D0C37B83F08002C273012141730448037803F0FE020270704738\r
-:4015C0000E60004078C1FF1F0B600040094B0A481B78027E02F00301012903D0C37E83F08002C276012141760448037803F0FD02027070471E60004078C1FF1F0B600040A6\r
-:401600007047FFF7E7BC000008B50B4B1878411EC8B200F059F9094A0949137800EBC3004269CB5C02EBC3004268064B506A01781980586008BD00BF71C1FF1F0460004045\r
-:401640005EC1FF1F60C1FF1F08B50D4B1878411EC8B200F039F90B4A0B49137800EBC3004269CB5C02EBC3004268D369074A597813F8020B40EA01211180536008BD00BFB6\r
-:4016800071C1FF1F046000405EC1FF1F60C1FF1F10B5164C00231648238001784A1ED0B200F012F91349144B1B780A7800EBC2004169D2B9114A013B1078DAB201EBC00107\r
-:4016C000022A496811D80E4A01EBC300127811F83310914209D30C235A4341688B1858688A5A996860602280A16010BD60C1FF1F71C1FF1F04600040036000405EC1FF1F98\r
-:401700000260004010B53A4B3A4A18781178090634D5511C0B785A1E052A67D8DFE802F010182766660334480178212902D1FFF76BFF07E00378222B58D1FFF785FF01E0B6\r
-:40174000FFF7A6FF2D490B8898B200284ED00AE000284BD12A4B1878002847D127480122284902804160BDE81040FFF7EDBE00283CD12248012202802349F3E713781A06D1\r
-:4017800034D4224A1178092905D02FD30A290DD00B292BD122E0FFF77BFF184B1A8890B2002823D0BDE81040FFF7AABEF0B914480178D9B9441C2378124A1370144B1478E7\r
-:4017C0001878844201D2197004E01978012901D912781A70BDE81040FFF76CBD30B908480378012B02D80278074BF2E7002010BD04600040006000400360004060C1FF1F24\r
-:4018000002600040EAC1FF1FECC1FF1F01600040EBC1FF1F30B5012202F10F031801092AC3B23BD01F4903F180440C2004F5C14500FB021428701C496579591825B1247913\r
-:40184000240658BF082000E08020087017490C245818144904FB02110C890132C4F3072404700C891248E4B218180470CC881148E4B218180470CC880F48C4F307241818AD\r
-:401880000470CC880D48E4B2181804700C48D2B21818CB88C3F307210170BDE70949FF220A7030BD78C1FF1F0E6000400C6000400D600040866000408760004084600040DA\r
-:4018C000856000400A600040044B05491A7801EBC2035A6802EBC000C06870476CC1FF1FC8200000F8B53D4B1A78002A74D01878411EC8B2FFF7E8FFC368057A0833002038\r
-:40190000A84269D013F8082C3549364C8E5CA45CA6425DD0895C13F8074C8C4258D1324909788A4254D113F8067C07F07F02561E3401E1B213F8056C2C4C17F0800F4FF015\r
-:401940000C0706F0030607FB024406D001276770BE4214BF0D26072605E000276770012E14BF092605266671214C01260F190C2454433E701D4E33F8047C3219178113F8BA\r
-:40198000067C177113F8057C37550026D6701689184CC6F307260C1926701689164CF6B20C192670D688154CF6B20C192670D688134CC6F307260C192670D688114CF6B2AE\r
-:4019C0000C192670104C0C19D188C1F3072222700130C0B2083393E7F8BD00BF71C1FF1F5EC1FF1FE4C1FF1F0460004078C1FF1F0E6000400C6000400D600040866000409F\r
-:401A000087600040846000408560004008B5064B1878411EC8B2FFF757FF4268137900EBC300406908BD00BF71C1FF1FF8B500210C244C43514D013100232A1909292B559D\r
-:401A4000937002F108045370D370537113819372EED118B14A484B4A037013704A4B1978002900F08A801C78601EC0B2FFF72CFF4268D37903F04001CCB2444B1CB11C78D6\r
-:401A800044F0010102E01A7802F0FE01047A19700122C36800210833A14243D013F8065C05F07F06B24239D1344E0C2707FB0266B6F808E033F8047C1FFA8EFCBC4538BF04\r
-:401AC000378113F8086C2E4FBE5D13F8077CB74224D113F8056C15F0800F284D4FF00C0706F0030607FB025506D001276F70BE4214BF0D26072605E000276F70012E14BF6F\r
-:401B0000092605266E710C2555431C4E13F806EC771987F804E013F8057C77550131C9B20833B9E70132092AB3D1C36800220833A2420DD013F8065C0C2605F07F010F4DC6\r
-:401B400013F8080C06FB015101328872D2B2EEE7FFF75CFF0E4B00221860012307490C2000FB0310C280018901335218092B92B2F4D1BDE8F840FFF74DBEF8BD78C1FF1FEA\r
-:401B80005EC1FF1FE4C1FF1F71C1FF1F6FC1FF1F74C1FF1F124B197801F07F014A1ED0B207281AD80301DAB20E4B0C2000FB0130817841F0010300218370C170437843F028\r
-:401BC000020141700079084B10F0800F01D08D2100E08921D154FFF76DBB0020704700BF0460004078C1FF1F0E60004010B51A4B187800F07F035A1ED2B2072A2AD8174990\r
-:401C00000C2000FB03139C78120104F0FE01997000241349DC70D2B2545C04F07F045454597801F0FD01597019795B7811F0800F0C4905D0012B01D1505407E00D2004E0E3\r
-:401C4000012B01D1082000E009205054BDE81040FFF730BB002010BD0460004078C1FF1F0C6000400E60004010B50C4B0C481C7801784A1ED0B2FFF727FE43681879A042D9\r
-:401C800009D944B9074B084A19780848117001780120197010BD002010BD00BF0460004071C1FF1F5EC1FF1FE4C1FF1F0260004010B57C4B00221A807B4A7C48117811F0B2\r
-:401CC000800F00F08A8001780A2900F22281DFE811F05800200120012001200120010B002001780020017C00714B197801290AD170487149027801EBC20358681223426886\r
-:401D0000684842600FE01878022811D16B4B1878FFF7DAFD4268634842604168CB784268917841EA03230380BDE81040FFF70CBC1A78032A21D1624B00226049087890421B\r
-:401D40000AD80A7882B15D495E4809785E4A007C884208BF134607E018780028F1D01978501C5B18C2B2E8E71978002900F0D18018784C4A10805360D6E7BDE8104000F0D8\r
-:401D8000DDB8117811F0030211D0022A40F0C18044494E4B0A8018784D4A00F07F030C2000FB032398784B4B0022187006E03D49022349480B800078464B18705A704B60E8\r
-:401DC000B2E701221A80454805E001223F481A800278434988185860A6E70378581E0A2800F29780DFE810F02B009500440095000B009500950095000F00950019002F4B5F\r
-:401E0000384918784CE02D4B344A18783649107001200870FFF70AFE77E0FFF725FF002877D02A4C314A24782F4B012114701970FFF758FD2A482E49025D0A5565E0127872\r
-:401E400002F00301012955D009D3022961D11B4B187800285DD1BDE81040FFF7C7BE174A1178012955D11C490B7803F0FD0017E0107800F00302012A3CD009D3022A48D14A\r
-:401E80000E490B78002B44D1BDE81040FFF782BE0A480278012A3CD10F490B7843F00200087032E060C1FF1F0060004001600040036000406CC1FF1FC82000000260004047\r
-:401EC0008E2100000A220000842100000460004078C1FF1F55C1FF1F6FC1FF1F71C1FF1F5EC1FF1F5CC1FF1F70C1FF1F6DC1FF1FE4C1FF1F084802785AB90378074A0848C6\r
-:401F0000D15C007821EA0001D154BDE81040FFF7D1B9002010BD00BF0460004073C1FF1F02600040034B1878010644BF024909780020704700600040016000400F4B18785C\r
-:401F400000F0030101290CD002290DD10C4A0C2110780C4A00F07F0301FB03200830837803E0074B1B7800E0002307490A68D05C032801D1FFF7C6BB002070470060004095\r
-:401F80000460004078C1FF1F74C1FF1F38B50E4D0E4B0024E81A8510AC4205D00B4951F8242090470134F7E700F038F90849094A541AA5100024AC4205D0054B53F824005B\r
-:401FC00080470134F7E738BD2822000028220000282200003022000010B50023934203D0CC5CC4540133F9E710BD82180346934202D003F8011BFAE7704700007022000066\r
-:402000008200000000000000105100402000505100401000C0510040100000000140001000140140000800400140000A004C01400002005001402000014500400252004078\r
-:402040000117014001190140034001400241014002420140024301400347014003480140024C0140015101407E021C3E7C40EE0AEE0A33803640CC30A640A780A640A7809B\r
-:40208000A640A78008080F40C20CAE40AF80EE50AC08AF40000A00FFFF00000000000000000000000000C000003E00000000000000FCFC0000000000000F0F0000000000CC\r
-:4020C0006930132E0014010101000000D0200000010000000A22000001000000E020000001000000E121000002000000022100000100000014210000000000000021000052\r
-:402100000300000001034000030000008203400003000000010000001C210000000000005021000000000000442100000000000000000000010000005C21000001000000FA\r
-:40214000F32100004100000033C2FF1F74C2FF1F41000000F2C1FF1FEEC1FF1F240005010900A1000900A1000900150025FF7508954091020900150025FF75089540810208\r
-:40218000C0C000000A033000300030003100040309042C0343007900700072006500730073002000530065006D00690063006F006E0064007500630074006F007200220301\r
-:4021C000500053006F0043003300200042006F006F0074006C006F0061006400650072000009022900010100800009040000020300000209211101000122240007050103CF\r
-:40220000400001070582034000011201000200000008B4041DB7013001028001F8B500BFF8BC08BC9E46704751000000B9010000F8B500BFF8BC08BC9E4670472D000000F7\r
-:402240005022000008C1FF1F200000005001000000000000FC1F0000002000000000007D00FA0000400000000090D00300000000000000000000000000000000000000003F\r
-:40228000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:4022C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40230000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40234000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40238000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:4023C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40240000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40244000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40248000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:4024C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40250000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40254000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40258000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:4025C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40260000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40264000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40268000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:4026C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:402700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:402740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:402780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:4027C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:402800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:402840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:402880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:4028C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:402900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:402940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:402980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:4029C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:402A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:402A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:402A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:402AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:402B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:402B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:402B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:402BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:402C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:402C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:402C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:402CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:402D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:402D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:402D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:402DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:402E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:402E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:402E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:402EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:402F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:402F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:402F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:402FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:403000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:403040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:403080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:4030C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40314000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40318000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:4031C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40320000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40324000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40328000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:4032C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40330000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40334000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40338000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:4033C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40340000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40344000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40348000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:4034C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40350000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40354000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40358000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:4035C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40360000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40364000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40368000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:4036C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:403700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:403740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:403780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:4037C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:403800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:403840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:403880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:4038C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:403900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:403940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:403980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:4039C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:403A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:403A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:403A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:403AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:403B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:403B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:403B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:403BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:403C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:403C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:403C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:403CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:403D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:403D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:403D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:403DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:403E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:403E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:403E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:403EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:403F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:403F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:403F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:403FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:404000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:404040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:404080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4040C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:40410000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40414000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4041800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4041C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40420000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40424000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4042800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4042C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40430000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40434000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4043800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4043C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40440000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40444000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4044800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4044C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40450000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40454000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4045800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4045C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40460000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40464000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4046800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4046C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:404700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:404740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4047800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4047C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:404800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:404840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4048800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4048C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:404900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:404940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4049800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:4049C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:404A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:404A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:404A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:404AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:404B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:404B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:404B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:404BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:404C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:404C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:404C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:404CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:404D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:404D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:404D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:404DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:404E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:404E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:404E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:404EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:404F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:404F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:404F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:404FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:405000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:405040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4050800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4050C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:40510000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40514000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4051800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4051C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40520000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40524000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4052800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4052C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40530000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40534000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4053800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4053C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40540000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40544000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4054800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4054C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40550000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40554000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4055800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4055C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40560000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40564000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4056800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4056C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:405700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:405740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4057800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4057C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:405800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:405840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4058800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4058C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:405900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:405940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4059800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:4059C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:405A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:405A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:405A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:405AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:405B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:405B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:405B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:405BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:405C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:405C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:405C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:405CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:405D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:405D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:405D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:405DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:405E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:405E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:405E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:405EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:405F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:405F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:405F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:405FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:406000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:406040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:4060800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:4060C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40610000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40614000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:4061800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:4061C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40620000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40624000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:4062800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:4062C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40630000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40634000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:4063800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:4063C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40640000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40644000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:4064800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:4064C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40650000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40654000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:4065800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:4065C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40660000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40664000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:4066800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:4066C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:406700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:406740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:4067800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:4067C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:406800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:406840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:4068800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:4068C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:406900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:406940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:4069800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:4069C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:406A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:406A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:406A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:406AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:406B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:406B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:406B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:406BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:406C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:406C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:406C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:406CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:406D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:406D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:406D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:406DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:406E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:406E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:406E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:406EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:406F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:406F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:406F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:406FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:407000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:407040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:4070800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:4070C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40710000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40714000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:4071800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:4071C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40720000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40724000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:4072800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:4072C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40734000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:4073800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:4073C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40744000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:4074800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:4074C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40750000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40754000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:4075800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:4075C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40760000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40764000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:4076800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:4076C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:407700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:407740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:4077800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:4077C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:407800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:407840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:4078800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:4078C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:407900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:407940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:4079800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:4079C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:407A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:407A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:407A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:407AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:407B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:407B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:407B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:407BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:407C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:407C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:407C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:407CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:407D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:407D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:407D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:407DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:407E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:407E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:407E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:407EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:407F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:407F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:407F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:407FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:408000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:408040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4080800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:4080C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:40810000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4081400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4081800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:4081C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40820000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4082400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4082800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:4082C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40830000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4083400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4083800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:4083C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4084400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4084800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:4084C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40850000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4085400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4085800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:4085C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40860000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4086400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4086800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:4086C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:408700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4087400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4087800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:4087C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:408800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4088400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4088800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:4088C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:408900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4089400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:4089800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:4089C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:408A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:408A400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:408A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:408AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:408B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:408B400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:408B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:408BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:408C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:408C400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:408C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:408CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:408D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:408D400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:408D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:408DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:408E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:408E400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:408E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:408EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:408F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:408F400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:408F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:408FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:409000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4090400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4090800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:4090C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:40910000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4091400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4091800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:4091C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40920000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4092400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4092800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:4092C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40930000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4093400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4093800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:4093C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4094400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4094800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:4094C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40950000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4095400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4095800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:4095C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40960000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4096400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4096800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:4096C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:409700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4097400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4097800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:4097C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:409800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4098400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4098800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:4098C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:409900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4099400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:4099800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:4099C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:409A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:409A400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:409A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:409AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:409B400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:409B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:409BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:409C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:409C400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:409C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:409CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:409D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:409D400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:409D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:409DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:409E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:409E400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:409E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:409EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:409F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:409F400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:409F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:409FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:40A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:40A0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40A0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40A0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:40A10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:40A1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40A18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40A1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40A20000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:40A2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40A28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40A2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40A30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:40A3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40A38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40A3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:40A4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40A48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40A4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40A50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:40A5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40A58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40A5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40A60000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:40A6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:40A68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40A6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40A700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:40A7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:40A780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:40A7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:40A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:40A8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:40A880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:40A8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:40A900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:40A9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:40A980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:40A9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:40AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:40AA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:40AA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:40AAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:40AB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:40AB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:40AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:40ABC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:40AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:40AC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:40AC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:40ACC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:40AD00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:40AD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:40AD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:40ADC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:40AE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:40AE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:40AE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:40AEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:40AF00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:40AF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:40AF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:40AFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:40B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:40B0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40B080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40B0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:40B10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:40B1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40B18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40B1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40B20000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:40B2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40B28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40B2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40B30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:40B3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40B38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40B3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:40B4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40B48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40B4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40B50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:40B5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40B58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40B5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40B60000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:40B6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:40B68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40B6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40B700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:40B7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:40B780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:40B7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:40B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:40B8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:40B880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:40B8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:40B900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:40B9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:40B980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:40B9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:40BA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:40BA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:40BA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:40BAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:40BB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:40BB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:40BB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:40BBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:40BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:40BC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:40BC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:40BCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:40BD00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:40BD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:40BD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:40BDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:40BE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:40BE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:40BE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:40BEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:40BF00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:40BF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:40BF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:40BFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:40C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:40C0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:40C080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:40C0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:40C1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:40C1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40C18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40C1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:40C2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:40C2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40C28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40C2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:40C3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:40C3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40C38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40C3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:40C4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:40C4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40C48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40C4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:40C5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:40C5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40C58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40C5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:40C6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:40C6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:40C68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40C6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:40C7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:40C7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:40C780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:40C7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:40C8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:40C8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:40C880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:40C8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:40C9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:40C9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:40C980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:40C9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:40CA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:40CA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:40CA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:40CAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:40CB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:40CB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:40CB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:40CBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:40CC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:40CC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:40CC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:40CCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:40CD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:40CD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:40CD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:40CDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:40CE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:40CE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:40CE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:40CEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:40CF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:40CF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:40CF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:40CFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:40D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:40D0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:40D080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:40D0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:40D1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:40D1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40D18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40D1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:40D2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:40D2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40D28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40D2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:40D3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:40D3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40D38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40D3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:40D4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:40D4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40D48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40D4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:40D5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:40D5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40D58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40D5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:40D6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:40D6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:40D68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40D6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:40D7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:40D7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:40D780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:40D7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:40D8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:40D8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:40D880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:40D8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:40D9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:40D9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:40D980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:40D9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:40DA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:40DA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:40DA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:40DAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:40DB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:40DB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:40DB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:40DBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:40DC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:40DC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:40DC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:40DCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:40DD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:40DD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:40DD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:40DDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:40DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:40DE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:40DE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:40DEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:40DF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:40DF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:40DF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:40DFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:40E0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40E0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40E080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:40E0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:40E1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40E14000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40E18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40E1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:40E2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40E24000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40E28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40E2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:40E3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40E34000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40E38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40E3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:40E4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40E44000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40E48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40E4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:40E5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40E54000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40E58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40E5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:40E6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:40E64000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40E68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40E6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:40E7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:40E740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:40E780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:40E7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:40E8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:40E840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:40E880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:40E8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:40E9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:40E940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:40E980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:40E9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:40EA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:40EA40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:40EA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:40EAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:40EB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:40EB40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:40EB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:40EBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:40EC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:40EC40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:40EC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:40ECC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:40ED000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:40ED40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:40ED80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:40EDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:40EE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:40EE40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:40EE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:40EEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:40EF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:40EF40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:40EF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:40EFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:40F0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40F040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40F080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:40F0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:40F1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40F14000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40F18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40F1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:40F2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40F24000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40F28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40F2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:40F3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40F34000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40F38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40F3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:40F4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40F44000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40F48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40F4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:40F5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40F54000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40F58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40F5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:40F6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:40F64000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40F68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40F6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:40F7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:40F740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:40F780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:40F7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:40F8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:40F840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:40F880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:40F8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:40F9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:40F940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:40F980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:40F9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:40FA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:40FA40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:40FA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:40FAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:40FB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:40FB40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:40FB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:40FBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:40FC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:40FC40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:40FC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:40FCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:40FD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:40FD40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:40FD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:40FDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:40FE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:40FE40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:40FE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:40FEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:40FF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:40FF40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:40FF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:40FFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:020000040001F9\r
-:4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:400040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:400080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:4000C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40014000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4001C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40024000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40028000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4002C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4003000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40034000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4003C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40044000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40048000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4004C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4005000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40054000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40058000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4005C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4006000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:40064000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40068000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4006C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4007000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:400740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:400780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4007C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:400840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:400880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4008C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4009000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:400940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:400980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4009C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:400A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:400A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:400A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:400AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:400B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:400B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:400B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:400BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:400C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:400C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:400C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:400CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:400D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:400D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:400D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:400DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:400E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:400E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:400E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:400EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:400F000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:400F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:400F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:400FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:4010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:401040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:401080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4010C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40114000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40118000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4011C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4012000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40124000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40128000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4012C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4013000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40134000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40138000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4013C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4014000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40144000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40148000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4014C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4015000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40154000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40158000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4015C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4016000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:40164000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40168000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4016C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4017000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:401740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:401780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4017C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:401840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:401880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4018C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4019000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:401940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:401980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4019C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:401A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:401A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:401A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:401AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:401B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:401B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:401B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:401BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:401C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:401C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:401C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:401CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:401D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:401D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:401D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:401DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:401E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:401E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:401E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:401EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:401F000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:401F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:401F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:401FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:4020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:402040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:402080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:4020C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40214000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:4021C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40220000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40224000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40228000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:4022C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40230000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40234000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40238000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:4023C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40240000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40244000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40248000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:4024C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40250000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40254000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40258000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:4025C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40260000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40264000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40268000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:4026C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:402700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:402740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:402780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:4027C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:402800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:402840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:402880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:4028C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:402900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:402940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:402980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:4029C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:402A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:402A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:402A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:402AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:402B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:402B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:402B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:402BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:402C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:402C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:402C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:402CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:402D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:402D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:402D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:402DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:402E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:402E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:402E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:402EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:402F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:402F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:402F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:402FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:403000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:403040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:403080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:4030C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40314000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40318000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:4031C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40320000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40324000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40328000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:4032C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40330000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40334000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40338000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:4033C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40340000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40344000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40348000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:4034C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40350000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40354000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40358000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:4035C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40360000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40364000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40368000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:4036C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:403700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:403740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:403780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:4037C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:403800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:403840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:403880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:4038C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:403900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:403940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:403980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:4039C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:403A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:403A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:403A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:403AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:403B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:403B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:403B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:403BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:403C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:403C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:403C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:403CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:403D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:403D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:403D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:403DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:403E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:403E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:403E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:403EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:403F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:403F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:403F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:403FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:404000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:404040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:404080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4040C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:40410000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40414000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4041800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4041C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40420000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40424000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4042800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4042C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40430000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40434000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4043800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4043C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40440000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40444000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4044800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4044C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40450000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40454000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4045800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4045C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40460000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40464000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4046800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4046C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:404700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:404740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4047800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4047C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:404800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:404840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4048800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4048C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:404900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:404940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4049800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:4049C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:404A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:404A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:404A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:404AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:404B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:404B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:404B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:404BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:404C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:404C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:404C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:404CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:404D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:404D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:404D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:404DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:404E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:404E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:404E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:404EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:404F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:404F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:404F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:404FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:405000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:405040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4050800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4050C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:40510000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40514000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4051800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4051C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40520000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40524000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4052800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4052C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40530000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40534000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4053800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4053C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40540000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40544000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4054800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4054C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40550000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40554000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4055800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4055C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40560000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40564000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4056800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4056C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:405700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:405740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4057800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4057C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:405800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:405840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4058800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4058C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:405900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:405940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4059800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:4059C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:405A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:405A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:405A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:405AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:405B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:405B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:405B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:405BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:405C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:405C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:405C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:405CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:405D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:405D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:405D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:405DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:405E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:405E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:405E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:405EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:405F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:405F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:405F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:405FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:406000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:406040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:4060800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:4060C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40610000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40614000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:4061800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:4061C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40620000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40624000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:4062800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:4062C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40630000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40634000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:4063800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:4063C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40640000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40644000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:4064800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:4064C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40650000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40654000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:4065800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:4065C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40660000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40664000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:4066800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:4066C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:406700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:406740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:4067800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:4067C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:406800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:406840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:4068800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:4068C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:406900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:406940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:4069800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:4069C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:406A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:406A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:406A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:406AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:406B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:406B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:406B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:406BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:406C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:406C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:406C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:406CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:406D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:406D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:406D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:406DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:406E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:406E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:406E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:406EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:406F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:406F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:406F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:406FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:407000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:407040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:4070800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:4070C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40710000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40714000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:4071800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:4071C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40720000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40724000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:4072800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:4072C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40734000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:4073800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:4073C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40744000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:4074800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:4074C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40750000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40754000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:4075800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:4075C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40760000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40764000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:4076800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:4076C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:407700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:407740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:4077800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:4077C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:407800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:407840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:4078800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:4078C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:407900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:407940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:4079800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:4079C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:407A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:407A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:407A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:407AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:407B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:407B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:407B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:407BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:407C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:407C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:407C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:407CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:407D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:407D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:407D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:407DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:407E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:407E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:407E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:407EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:407F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:407F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:407F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:407FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:408000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:408040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4080800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:4080C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:40810000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4081400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4081800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:4081C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40820000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4082400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4082800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:4082C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40830000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4083400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4083800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:4083C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4084400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4084800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:4084C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40850000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4085400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4085800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:4085C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40860000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4086400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4086800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:4086C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:408700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4087400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4087800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:4087C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:408800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4088400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4088800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:4088C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:408900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4089400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:4089800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:4089C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:408A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:408A400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:408A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:408AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:408B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:408B400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:408B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:408BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:408C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:408C400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:408C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:408CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:408D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:408D400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:408D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:408DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:408E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:408E400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:408E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:408EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:408F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:408F400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:408F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:408FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:409000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4090400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4090800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:4090C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:40910000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4091400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4091800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:4091C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40920000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4092400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4092800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:4092C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40930000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4093400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4093800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:4093C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4094400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4094800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:4094C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40950000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4095400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4095800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:4095C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40960000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4096400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4096800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:4096C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:409700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4097400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4097800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:4097C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:409800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4098400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4098800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:4098C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:409900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4099400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:4099800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:4099C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:409A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:409A400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:409A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:409AC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:409B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:409B400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:409B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:409BC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:409C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:409C400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:409C800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:409CC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:409D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:409D400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:409D800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:409DC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:409E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:409E400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:409E800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:409EC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:409F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:409F400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:409F800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:409FC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:40A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:40A0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40A0800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40A0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:40A10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:40A1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40A18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40A1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40A20000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:40A2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40A28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40A2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40A30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:40A3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40A38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40A3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:40A4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40A48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40A4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40A50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:40A5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40A58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40A5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40A60000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:40A6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:40A68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40A6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40A700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:40A7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:40A780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:40A7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:40A800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:40A8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:40A880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:40A8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:40A900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:40A9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:40A980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:40A9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:40AA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:40AA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:40AA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:40AAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:40AB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:40AB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:40AB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:40ABC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:40AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:40AC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:40AC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:40ACC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:40AD00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:40AD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:40AD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:40ADC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:40AE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:40AE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:40AE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:40AEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:40AF00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:40AF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:40AF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:40AFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:40B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:40B0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40B080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40B0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:40B10000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:40B1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40B18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40B1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40B20000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:40B2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40B28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40B2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40B30000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:40B3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40B38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40B3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:40B4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40B48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40B4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40B50000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:40B5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40B58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40B5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40B60000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:40B6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:40B68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40B6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40B700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:40B7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:40B780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:40B7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:40B800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:40B8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:40B880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:40B8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:40B900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:40B9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:40B980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:40B9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:40BA00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:40BA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:40BA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:40BAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:40BB00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:40BB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:40BB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:40BBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:40BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:40BC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:40BC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:40BCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:40BD00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:40BD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:40BD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:40BDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:40BE00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:40BE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:40BE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:40BEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:40BF00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:40BF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:40BF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:40BFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:40C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:40C0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:40C080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:40C0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:40C1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:40C1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40C18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40C1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:40C2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:40C2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40C28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40C2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:40C3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:40C3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40C38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40C3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:40C4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:40C4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40C48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40C4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:40C5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:40C5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40C58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40C5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:40C6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:40C6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:40C68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40C6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:40C7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:40C7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:40C780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:40C7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:40C8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:40C8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:40C880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:40C8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:40C9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:40C9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:40C980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:40C9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:40CA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:40CA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:40CA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:40CAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:40CB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:40CB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:40CB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:40CBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:40CC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:40CC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:40CC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:40CCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:40CD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:40CD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:40CD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:40CDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:40CE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:40CE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:40CE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:40CEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:40CF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:40CF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:40CF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:40CFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:40D0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:40D0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:40D080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:40D0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:40D1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:40D1400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40D18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40D1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:40D2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:40D2400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40D28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40D2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:40D3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:40D3400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40D38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40D3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:40D4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:40D4400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40D48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40D4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:40D5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:40D5400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40D58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40D5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:40D6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:40D6400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:40D68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40D6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:40D7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:40D7400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:40D780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:40D7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:40D8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:40D8400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:40D880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:40D8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:40D9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:40D9400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:40D980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:40D9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:40DA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:40DA400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:40DA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:40DAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:40DB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:40DB400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:40DB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:40DBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:40DC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:40DC400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:40DC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:40DCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:40DD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:40DD400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:40DD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:40DDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:40DE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:40DE400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:40DE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:40DEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:40DF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:40DF400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:40DF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:40DFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:40E0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40E0400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:40E080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:40E0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:40E1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40E14000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40E18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40E1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:40E2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40E24000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40E28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40E2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:40E3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40E34000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40E38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40E3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:40E4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40E44000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40E48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40E4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:40E5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40E54000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40E58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40E5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:40E6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:40E64000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40E68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40E6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:40E7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:40E740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:40E780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:40E7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:40E8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:40E840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:40E880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:40E8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:40E9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:40E940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:40E980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:40E9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:40EA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:40EA40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:40EA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:40EAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:40EB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:40EB40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:40EB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:40EBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:40EC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:40EC40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:40EC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:40ECC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:40ED000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:40ED40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:40ED80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:40EDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:40EE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:40EE40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:40EE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:40EEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:40EF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:40EF40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:40EF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:40EFC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:40F0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40F040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:40F080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:40F0C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:40F1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40F14000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40F18000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40F1C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:40F2000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40F24000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40F28000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40F2C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:40F3000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40F34000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40F38000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40F3C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:40F4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40F44000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40F48000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40F4C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:40F5000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40F54000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40F58000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40F5C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:40F6000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:40F64000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40F68000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40F6C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:40F7000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:40F740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:40F780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:40F7C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:40F8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:40F840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:40F880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:40F8C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:40F9000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:40F940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:40F980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:40F9C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:40FA000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:40FA40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:40FA80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:40FAC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:40FB000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:40FB40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:40FB80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:40FBC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:40FC000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:40FC40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:40FC80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:40FCC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:40FD000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:40FD40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:40FD80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:40FDC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:40FE000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:40FE40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:40FE80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:40FEC0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:40FF000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:40FF40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:40FF80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:40FFC00000000000000000000000000000000000000000000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:0200000480007A\r
-:4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:400040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:400080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000040\r
-:4000C0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-:4001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BF\r
-:40014000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007F\r
-:40018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003F\r
-:4001C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FF\r
-:4002000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BE\r
-:40024000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007E\r
-:40028000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003E\r
-:4002C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FE\r
-:4003000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BD\r
-:40034000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007D\r
-:40038000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003D\r
-:4003C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FD\r
-:4004000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BC\r
-:40044000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C\r
-:40048000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C\r
-:4004C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FC\r
-:4005000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BB\r
-:40054000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007B\r
-:40058000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003B\r
-:4005C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FB\r
-:4006000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BA\r
-:40064000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007A\r
-:40068000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003A\r
-:4006C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000FA\r
-:4007000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B9\r
-:400740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000079\r
-:400780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000039\r
-:4007C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F9\r
-:4008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B8\r
-:400840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000078\r
-:400880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000038\r
-:4008C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F8\r
-:4009000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B7\r
-:400940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000077\r
-:400980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000037\r
-:4009C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F7\r
-:400A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B6\r
-:400A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000076\r
-:400A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000036\r
-:400AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F6\r
-:400B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B5\r
-:400B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000075\r
-:400B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000035\r
-:400BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F5\r
-:400C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B4\r
-:400C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000074\r
-:400C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000034\r
-:400CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F4\r
-:400D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B3\r
-:400D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000073\r
-:400D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000033\r
-:400DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F3\r
-:400E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B2\r
-:400E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000072\r
-:400E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000032\r
-:400EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F2\r
-:400F000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B1\r
-:400F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000071\r
-:400F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000031\r
-:400FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F1\r
-:4010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B0\r
-:401040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000070\r
-:401080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000030\r
-:4010C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0\r
-:4011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AF\r
-:40114000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006F\r
-:40118000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002F\r
-:4011C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EF\r
-:4012000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AE\r
-:40124000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006E\r
-:40128000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002E\r
-:4012C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EE\r
-:4013000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AD\r
-:40134000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006D\r
-:40138000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002D\r
-:4013C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ED\r
-:4014000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AC\r
-:40144000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006C\r
-:40148000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C\r
-:4014C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EC\r
-:4015000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AB\r
-:40154000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006B\r
-:40158000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B\r
-:4015C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EB\r
-:4016000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000AA\r
-:40164000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006A\r
-:40168000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002A\r
-:4016C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000EA\r
-:4017000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A9\r
-:401740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000069\r
-:401780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000029\r
-:4017C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E9\r
-:4018000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A8\r
-:401840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000068\r
-:401880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000028\r
-:4018C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E8\r
-:4019000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A7\r
-:401940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067\r
-:401980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000027\r
-:4019C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E7\r
-:401A000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A6\r
-:401A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066\r
-:401A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000026\r
-:401AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E6\r
-:401B000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A5\r
-:401B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000065\r
-:401B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000025\r
-:401BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E5\r
-:401C000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A4\r
-:401C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000064\r
-:401C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000024\r
-:401CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E4\r
-:401D000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3\r
-:401D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000063\r
-:401D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023\r
-:401DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E3\r
-:401E000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A2\r
-:401E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000062\r
-:401E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022\r
-:401EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E2\r
-:401F000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A1\r
-:401F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000061\r
-:401F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021\r
-:401FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E1\r
-:4020000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A0\r
-:402040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000060\r
-:402080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020\r
-:4020C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E0\r
-:40210000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009F\r
-:40214000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005F\r
-:40218000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001F\r
-:4021C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DF\r
-:40220000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009E\r
-:40224000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005E\r
-:40228000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001E\r
-:4022C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DE\r
-:40230000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009D\r
-:40234000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005D\r
-:40238000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D\r
-:4023C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DD\r
-:40240000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009C\r
-:40244000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005C\r
-:40248000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C\r
-:4024C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DC\r
-:40250000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B\r
-:40254000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B\r
-:40258000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B\r
-:4025C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DB\r
-:40260000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009A\r
-:40264000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005A\r
-:40268000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001A\r
-:4026C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000DA\r
-:402700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000099\r
-:402740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000059\r
-:402780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019\r
-:4027C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D9\r
-:402800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000098\r
-:402840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000058\r
-:402880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018\r
-:4028C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D8\r
-:402900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000097\r
-:402940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000057\r
-:402980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000017\r
-:4029C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D7\r
-:402A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000096\r
-:402A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000056\r
-:402A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000016\r
-:402AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D6\r
-:402B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000095\r
-:402B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000055\r
-:402B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000015\r
-:402BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D5\r
-:402C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000094\r
-:402C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000054\r
-:402C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000014\r
-:402CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D4\r
-:402D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000093\r
-:402D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000053\r
-:402D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000013\r
-:402DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D3\r
-:402E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000092\r
-:402E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000052\r
-:402E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000012\r
-:402EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D2\r
-:402F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091\r
-:402F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000051\r
-:402F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011\r
-:402FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D1\r
-:403000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090\r
-:403040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050\r
-:403080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010\r
-:4030C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D0\r
-:40310000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F\r
-:40314000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004F\r
-:40318000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F\r
-:4031C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CF\r
-:40320000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008E\r
-:40324000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004E\r
-:40328000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000E\r
-:4032C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CE\r
-:40330000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008D\r
-:40334000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004D\r
-:40338000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000D\r
-:4033C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CD\r
-:40340000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008C\r
-:40344000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004C\r
-:40348000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C\r
-:4034C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CC\r
-:40350000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008B\r
-:40354000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004B\r
-:40358000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000B\r
-:4035C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CB\r
-:40360000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008A\r
-:40364000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004A\r
-:40368000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A\r
-:4036C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000CA\r
-:403700000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000089\r
-:403740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000049\r
-:403780000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009\r
-:4037C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C9\r
-:403800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000088\r
-:403840000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048\r
-:403880000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008\r
-:4038C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C8\r
-:403900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000087\r
-:403940000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000047\r
-:403980000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007\r
-:4039C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C7\r
-:403A00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000086\r
-:403A40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000046\r
-:403A80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000006\r
-:403AC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C6\r
-:403B00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000085\r
-:403B40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000045\r
-:403B80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005\r
-:403BC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C5\r
-:403C00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000084\r
-:403C40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000044\r
-:403C80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004\r
-:403CC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C4\r
-:403D00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000083\r
-:403D40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000043\r
-:403D80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003\r
-:403DC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C3\r
-:403E00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000082\r
-:403E40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000042\r
-:403E80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002\r
-:403EC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C2\r
-:403F00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000081\r
-:403F40000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041\r
-:403F80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001\r
-:403FC00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C1\r
-:0200000490006A\r
-:040000008000400537\r
-:0200000490105A\r
-:04000000BC90ACAF55\r
-:0200000490303A\r
-:020000005902A3\r
-:0200000490402A\r
-:4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:400040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:0200000490501A\r
-:0C00000000012E13306900012E1F896BD7\r
-:00000001FF
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.map b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.map
deleted file mode 100755 (executable)
index 82052a0..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/USB_Bootloader.map
+++ /dev/null
@@ -1,1282 +0,0 @@
-Archive member included because of file (symbol)\r
-\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\Cm3Start.o (cyfitter_cfg)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\main.o (BL_Start)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o) (CyDelayCycles)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o) (CySetTemp)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o) (CyHalt)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o) (CyPmReadStatus)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o) (CySpcStart)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o) (USBFS_CyBtldrCommStart)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o) (USBFS_Start)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o) (USBFS_lastPacketSize)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o) (USBFS_EP_1_ISR)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o) (USBFS_hidProtocol)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o) (USBFS_GetConfigTablePtr)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o) (USBFS_HandleVendorRqst)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o) (USBFS_DispatchClassRqst)\r
-.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o) (USBFS_TABLE)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o (__register_exitproc)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o (exit)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o (__libc_fini_array)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o) (_global_impure_ptr)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o (__libc_init_array)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
-                              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o) (memcpy)\r
-c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
-                              c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o (memset)\r
-\r
-Allocating common symbols\r
-Common symbol       size              file\r
-\r
-USBFS_deviceAddress\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_ep0Mode       0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_interfaceSetting\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB\r
-                    0x4               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-USBFS_hidIdleRate   0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-USBFS_currentTD     0xc               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_device        0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_interfaceNumber\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_ep0Toggle     0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_deviceStatus  0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF\r
-                    0x41              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-USBFS_configurationChanged\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_configuration\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_transferState\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_interfaceStatus\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_interfaceClass\r
-                    0x4               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_EP            0x6c              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF\r
-                    0x41              .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-USBFS_interfaceSetting_last\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_hidIdleTimer  0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-USBFS_lastPacketSize\r
-                    0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_hidProtocol   0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB\r
-                    0x4               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-dieTemperature      0x2               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-USBFS_ep0Count      0x1               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-USBFS_transferByteCount\r
-                    0x2               .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-\r
-Discarded input sections\r
-\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
- .data          0x00000000        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .text          0x00000000       0x70 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .ARM.extab     0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .ARM.exidx     0x00000000        0x8 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .text._exit    0x00000000        0x2 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .text.SetAnalogRoutingPumps\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .text.BL_SetFlashByte\r
-                0x00000000       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyFlash_Start\r
-                0x00000000       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyFlash_Stop\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyWriteRowConfig\r
-                0x00000000       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyWriteRowData\r
-                0x00000000       0x5c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyFlash_SetWaitCycles\r
-                0x00000000       0x44 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyEEPROM_Stop\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyEEPROM_ReadReserve\r
-                0x00000000       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CyEEPROM_ReadRelease\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_SetTrimValue\r
-                0x00000000       0xb8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyBusClk_Internal_SetDivider\r
-                0x00000000       0x3c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyPLL_OUT_Stop\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyPLL_OUT_SetPQ\r
-                0x00000000       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyPLL_OUT_SetSource\r
-                0x00000000       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_Stop\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_SetSource\r
-                0x00000000       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_EnableDoubler\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_DisableDoubler\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_SetFreq\r
-                0x00000000       0xd8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyMasterClk_SetSource\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyMasterClk_SetDivider\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyBusClk_SetDivider\r
-                0x00000000       0x6c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyUsbClk_SetSource\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Start1K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Stop1K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Start100K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Stop100K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIMO_Start\r
-                0x00000000       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyPLL_OUT_Start\r
-                0x00000000       0x68 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Enable33K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_Disable33K\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_SetSource\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyILO_SetPowerMode\r
-                0x00000000       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_32KHZ_Stop\r
-                0x00000000       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_32KHZ_ReadStatus\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_Start\r
-                0x00000000       0x88 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_Stop\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_EnableErrStatus\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_DisableErrStatus\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_ReadStatus\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_EnableFaultRecovery\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_DisableFaultRecovery\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_SetStartup\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_SetFbVoltage\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_SetWdVoltage\r
-                0x00000000       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_32KHZ_SetPowerMode\r
-                0x00000000       0x6c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyXTAL_32KHZ_Start\r
-                0x00000000       0x70 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyDelayFreq\r
-                0x00000000       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyWdtStart\r
-                0x00000000       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyWdtClear\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdLvDigitEnable\r
-                0x00000000       0x68 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdLvAnalogEnable\r
-                0x00000000       0x68 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdLvDigitDisable\r
-                0x00000000       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdLvAnalogDisable\r
-                0x00000000       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdHvAnalogEnable\r
-                0x00000000       0x44 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdHvAnalogDisable\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdStickyStatus\r
-                0x00000000       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyVdRealTimeStatus\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyDisableInts\r
-                0x00000000       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyEnableInts\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyFlushCache\r
-                0x00000000       0x60 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIntSetSysVector\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIntGetSysVector\r
-                0x00000000       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIntGetVector\r
-                0x00000000       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIntGetPriority\r
-                0x00000000       0x12 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text.CyIntGetState\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .bss           0x00000000       0x44 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmHibSlpSaveSet\r
-                0x00000000      0x164 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmHibSlpRestore\r
-                0x00000000       0xa4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmSaveClocks\r
-                0x00000000      0x1b4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmRestoreClocks\r
-                0x00000000      0x208 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmAltAct\r
-                0x00000000       0x60 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmSleep\r
-                0x00000000       0xd8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmHibernate\r
-                0x00000000      0x238 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmReadStatus\r
-                0x00000000       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmCtwSetInterval\r
-                0x00000000       0x54 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmOppsSet\r
-                0x00000000       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text.CyPmFtwSetInterval\r
-                0x00000000       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .rodata        0x00000000        0xe .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .text.CySpcStop\r
-                0x00000000       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .text.CySpcLoadMultiByte\r
-                0x00000000       0x74 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .text.CySpcEraseSector\r
-                0x00000000       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .text.USBFS_CyBtldrCommStop\r
-                0x00000000        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_Stop\r
-                0x00000000       0x7c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_CheckActivity\r
-                0x00000000       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_GetInterfaceSetting\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_DisableOutEP\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_Force\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_GetEPAckState\r
-                0x00000000       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_SetPowerStatus\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text.USBFS_RWUEnabled\r
-                0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .text.USBFS_ControlReadDataStage\r
-                0x00000000        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .text.USBFS_UpdateHIDTimer\r
-                0x00000000       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .text.USBFS_GetProtocol\r
-                0x00000000        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .text.USBFS_GetDeviceTablePtr\r
-                0x00000000       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .text.USBFS_TerminateEP\r
-                0x00000000       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .text          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
- .data          0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
- .bss           0x00000000        0x0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .text.__register_exitproc\r
-                0x00000000       0x14 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .text.exit     0x00000000       0x2c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .text.__libc_fini_array\r
-                0x00000000       0x2c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .data.impure_data\r
-                0x00000000       0x64 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .data._impure_ptr\r
-                0x00000000        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .rodata.str1.1\r
-                0x00000000        0x2 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .rodata._global_impure_ptr\r
-                0x00000000        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
- .text          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
- .data          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
- .bss           0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
-\r
-Memory Configuration\r
-\r
-Name             Origin             Length             Attributes\r
-rom              0x00000000         0x00020000         xr\r
-ram              0x1fffc000         0x00008000         xrw\r
-*default*        0x00000000         0xffffffff\r
-\r
-Linker script and memory map\r
-\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
-START GROUP\r
-LOAD .\CortexM3\ARM_GCC_473\Release\main.o\r
-LOAD .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-LOAD .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-LOAD .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a\r
-LOAD C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\CortexM3\ARM_GCC_473\Release\CyComponentLibrary.a\r
-END GROUP\r
-START GROUP\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m\libgcc.a\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a\r
-END GROUP\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
-START GROUP\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m\libgcc.a\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc.a\r
-LOAD c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libnosys.a\r
-END GROUP\r
-                0x00000000                CY_APPL_ORIGIN = 0x0\r
-                0x00000100                CY_FLASH_ROW_SIZE = 0x100\r
-                0x00000020                CY_ECC_ROW_SIZE = 0x20\r
-                0x00000000                CY_EE_IN_BTLDR = 0x0\r
-                0x00000000                CY_APPL_LOADABLE = 0x0\r
-                0x00000800                CY_EE_SIZE = 0x800\r
-                0x00000001                CY_APPL_NUM = 0x1\r
-                0x00000001                CY_APPL_MAX = 0x1\r
-                0x00000040                CY_METADATA_SIZE = 0x40\r
-                0x1fffc278                PROVIDE (__cy_heap_start, _end)\r
-                0x00000001                PROVIDE (__cy_region_num, ((__cy_regions_end - __cy_regions) / 0x10))\r
-                0x20004000                PROVIDE (__cy_stack, (ORIGIN (ram) + 0x8000))\r
-                0x20002000                PROVIDE (__cy_heap_end, (__cy_stack - 0x2000))\r
-\r
-.cybootloader   0x00000000        0x0\r
- *(.cybootloader)\r
-                0x00000000                appl1_start = CY_APPL_ORIGIN?CY_APPL_ORIGIN:ALIGN (CY_FLASH_ROW_SIZE)\r
-                0x0000ff00                appl2_start = (appl1_start + ALIGN ((((0x20000 - appl1_start) - (0x2 * CY_FLASH_ROW_SIZE)) / 0x2), CY_FLASH_ROW_SIZE))\r
-                0x00000000                appl_start = (CY_APPL_NUM == 0x1)?appl1_start:appl2_start\r
-                0x00000000                ecc_offset = ((appl_start / CY_FLASH_ROW_SIZE) * CY_ECC_ROW_SIZE)\r
-                0x00000000                ee_offset = (CY_APPL_LOADABLE && ! (CY_EE_IN_BTLDR))?((CY_EE_SIZE / CY_APPL_MAX) * (CY_APPL_NUM - 0x1)):0x0\r
-                0x00000800                ee_size = (CY_APPL_LOADABLE && ! (CY_EE_IN_BTLDR))?(CY_EE_SIZE / CY_APPL_MAX):CY_EE_SIZE\r
-                0x00000000                PROVIDE (CY_ECC_OFFSET, ecc_offset)\r
-\r
-.text           0x00000000     0x2004\r
- CREATE_OBJECT_SYMBOLS\r
-                0x00000000                PROVIDE (__cy_interrupt_vector, RomVectors)\r
- *(.romvectors)\r
- .romvectors    0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x00000000                RomVectors\r
-                0x00000001                ASSERT ((. != __cy_interrupt_vector), No interrupt vector)\r
-                0x00000001                ASSERT (CY_APPL_ORIGIN?(SIZEOF (.cybootloader) <= CY_APPL_ORIGIN):0x1, Wrong image location)\r
-                0x00000010                PROVIDE (__cy_reset, Reset)\r
- *(.text.Reset)\r
- .text.Reset    0x00000010       0x1c .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x00000010                Reset\r
-                0x00000001                ASSERT ((. != __cy_reset), No reset code)\r
- *(.dma_init)\r
-                0x00000001                ASSERT ((((appl_start + .) <= 0x10000) || 0x1), DMA Init must be within the first 64k of flash)\r
- *(.text .text.* .gnu.linkonce.t.*)\r
- .text          0x0000002c       0x54 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .text.startup.main\r
-                0x00000080       0xe0 .\CortexM3\ARM_GCC_473\Release\main.o\r
-                0x00000080                main\r
- .text.IntDefaultHandler\r
-                0x00000160        0x2 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x00000160                IntDefaultHandler\r
- *fill*         0x00000162        0x2 00\r
- .text.Start_c  0x00000164       0x54 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x00000164                Start_c\r
- .text.startup.initialize_psoc\r
-                0x000001b8       0x68 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x000001b8                initialize_psoc\r
- .text.cyfitter_cfg\r
-                0x00000220      0x1d8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
-                0x00000220                cyfitter_cfg\r
- .text.BL_LaunchBootloadable\r
-                0x000003f8        0x2 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- *fill*         0x000003fa        0x2 00\r
- .text.BL_GetMetadata.constprop.1\r
-                0x000003fc       0x8c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .text.BL_ValidateBootloadable.constprop.0\r
-                0x00000488       0x84 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .text.BL_HostLink\r
-                0x0000050c      0x384 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .text.BL_Start\r
-                0x00000890       0x80 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                0x00000890                BL_Start\r
- .text.CyBtldr_CheckLaunch\r
-                0x00000910       0x30 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                0x00000910                CyBtldr_CheckLaunch\r
- .text          0x00000940       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
-                0x00000940                CyDelayCycles\r
-                0x00000954                CyEnterCriticalSection\r
-                0x0000095c                CyExitCriticalSection\r
- .text.CySetTempInt.part.0\r
-                0x00000968       0x54 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .text.CySetTemp\r
-                0x000009bc       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                0x000009bc                CySetTemp\r
- .text.CySetFlashEEBuffer\r
-                0x000009e4       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                0x000009e4                CySetFlashEEBuffer\r
- .text.CyWriteRowFull\r
-                0x00000a10       0xa0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                0x00000a10                CyWriteRowFull\r
- .text.CyEEPROM_Start\r
-                0x00000ab0       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                0x00000ab0                CyEEPROM_Start\r
- .text.CyHalt   0x00000ac8        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000ac8                CyHalt\r
- .text.CySoftwareReset\r
-                0x00000acc       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000acc                CySoftwareReset\r
- .text.CyDelay  0x00000adc       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000adc                CyDelay\r
- .text.CyDelayUs\r
-                0x00000b04       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000b04                CyDelayUs\r
- .text.CyIntSetVector\r
-                0x00000b14       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000b14                CyIntSetVector\r
- .text.CyIntSetPriority\r
-                0x00000b30       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x00000b30                CyIntSetPriority\r
- .text.CySpcStart\r
-                0x00000b44       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000b44                CySpcStart\r
- .text.CySpcReadData\r
-                0x00000b68       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000b68                CySpcReadData\r
- .text.CySpcLoadRow\r
-                0x00000b9c       0x4c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000b9c                CySpcLoadRow\r
- .text.CySpcWriteRow\r
-                0x00000be8       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000be8                CySpcWriteRow\r
- .text.CySpcGetTemp\r
-                0x00000c30       0x3c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000c30                CySpcGetTemp\r
- .text.CySpcLock\r
-                0x00000c6c       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000c6c                CySpcLock\r
- .text.CySpcUnlock\r
-                0x00000cac       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x00000cac                CySpcUnlock\r
- .text.USBFS_CyBtldrCommStart\r
-                0x00000ce0       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                0x00000ce0                USBFS_CyBtldrCommStart\r
- .text.USBFS_CyBtldrCommReset\r
-                0x00000cf8        0x6 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                0x00000cf8                USBFS_CyBtldrCommReset\r
- *fill*         0x00000cfe        0x2 00\r
- .text.USBFS_CyBtldrCommWrite\r
-                0x00000d00       0x54 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                0x00000d00                USBFS_CyBtldrCommWrite\r
- .text.USBFS_CyBtldrCommRead\r
-                0x00000d54       0xb0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                0x00000d54                USBFS_CyBtldrCommRead\r
- .text.USBFS_Init\r
-                0x00000e04      0x114 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00000e04                USBFS_Init\r
- .text.USBFS_InitComponent\r
-                0x00000f18       0x98 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00000f18                USBFS_InitComponent\r
- .text.USBFS_Start\r
-                0x00000fb0       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00000fb0                USBFS_Start\r
- .text.USBFS_ReInitComponent\r
-                0x00000fd4       0x58 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00000fd4                USBFS_ReInitComponent\r
- .text.USBFS_GetConfiguration\r
-                0x0000102c        0xc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x0000102c                USBFS_GetConfiguration\r
- .text.USBFS_IsConfigurationChanged\r
-                0x00001038       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00001038                USBFS_IsConfigurationChanged\r
- .text.USBFS_GetEPState\r
-                0x0000104c       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x0000104c                USBFS_GetEPState\r
- .text.USBFS_GetEPCount\r
-                0x0000105c       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x0000105c                USBFS_GetEPCount\r
- .text.USBFS_LoadInEP\r
-                0x00001088       0x7c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00001088                USBFS_LoadInEP\r
- .text.USBFS_EnableOutEP\r
-                0x00001104       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x00001104                USBFS_EnableOutEP\r
- .text.USBFS_ReadOutEP\r
-                0x0000112c       0x4c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x0000112c                USBFS_ReadOutEP\r
- .text.USBFS_LoadEP0\r
-                0x00001178       0x94 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001178                USBFS_LoadEP0\r
- .text.USBFS_InitZeroLengthControlTransfer\r
-                0x0000120c       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x0000120c                USBFS_InitZeroLengthControlTransfer\r
- .text.USBFS_ControlWriteDataStage\r
-                0x00001240       0x74 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001240                USBFS_ControlWriteDataStage\r
- .text.USBFS_InitNoDataControlTransfer\r
-                0x000012b4       0x2c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x000012b4                USBFS_InitNoDataControlTransfer\r
- .text.USBFS_UpdateStatusBlock\r
-                0x000012e0       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x000012e0                USBFS_UpdateStatusBlock\r
- .text.USBFS_NoDataControlStatusStage\r
-                0x00001300       0x3c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001300                USBFS_NoDataControlStatusStage\r
- .text.USBFS_ControlWriteStatusStage\r
-                0x0000133c       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x0000133c                USBFS_ControlWriteStatusStage\r
- .text.USBFS_HandleIN\r
-                0x0000135c       0x24 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x0000135c                USBFS_HandleIN\r
- .text.USBFS_ControlReadStatusStage\r
-                0x00001380       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001380                USBFS_ControlReadStatusStage\r
- .text.USBFS_HandleOUT\r
-                0x000013b4       0x38 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x000013b4                USBFS_HandleOUT\r
- .text.USBFS_HandleSetup\r
-                0x000013ec       0x54 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x000013ec                USBFS_HandleSetup\r
- .text.USBFS_EP_0_ISR\r
-                0x00001440       0xa0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001440                USBFS_EP_0_ISR\r
- .text.USBFS_InitializeStatusBlock\r
-                0x000014e0       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x000014e0                USBFS_InitializeStatusBlock\r
- .text.USBFS_InitControlWrite\r
-                0x00001500       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001500                USBFS_InitControlWrite\r
- .text.USBFS_InitControlRead\r
-                0x00001548       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x00001548                USBFS_InitControlRead\r
- .text.USBFS_EP_1_ISR\r
-                0x00001598       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                0x00001598                USBFS_EP_1_ISR\r
- .text.USBFS_EP_2_ISR\r
-                0x000015cc       0x34 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                0x000015cc                USBFS_EP_2_ISR\r
- .text.USBFS_SOF_ISR\r
-                0x00001600        0x2 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                0x00001600                USBFS_SOF_ISR\r
- .text.USBFS_BUS_RESET_ISR\r
-                0x00001602        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                0x00001602                USBFS_BUS_RESET_ISR\r
- *fill*         0x00001606        0x2 00\r
- .text.USBFS_FindHidClassDecriptor\r
-                0x00001608       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                0x00001608                USBFS_FindHidClassDecriptor\r
- .text.USBFS_FindReportDescriptor\r
-                0x00001648       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                0x00001648                USBFS_FindReportDescriptor\r
- .text.USBFS_FindReport\r
-                0x00001690       0x74 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                0x00001690                USBFS_FindReport\r
- .text.USBFS_DispatchHIDClassRqst\r
-                0x00001704      0x110 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                0x00001704                USBFS_DispatchHIDClassRqst\r
- .text.USBFS_ConfigReg\r
-                0x00001814       0xb4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001814                USBFS_ConfigReg\r
- .text.USBFS_GetConfigTablePtr\r
-                0x000018c8       0x1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x000018c8                USBFS_GetConfigTablePtr\r
- .text.USBFS_ConfigAltChanged\r
-                0x000018e4      0x128 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x000018e4                USBFS_ConfigAltChanged\r
- .text.USBFS_GetInterfaceClassTablePtr\r
-                0x00001a0c       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001a0c                USBFS_GetInterfaceClassTablePtr\r
- .text.USBFS_Config\r
-                0x00001a2c      0x168 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001a2c                USBFS_Config\r
- .text.USBFS_SetEndpointHalt\r
-                0x00001b94       0x58 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001b94                USBFS_SetEndpointHalt\r
- .text.USBFS_ClearEndpointHalt\r
-                0x00001bec       0x7c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001bec                USBFS_ClearEndpointHalt\r
- .text.USBFS_ValidateAlternateSetting\r
-                0x00001c68       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001c68                USBFS_ValidateAlternateSetting\r
- .text.USBFS_HandleStandardRqst\r
-                0x00001cb0      0x274 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                0x00001cb0                USBFS_HandleStandardRqst\r
- .text.USBFS_HandleVendorRqst\r
-                0x00001f24       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
-                0x00001f24                USBFS_HandleVendorRqst\r
- .text.USBFS_DispatchClassRqst\r
-                0x00001f3c       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
-                0x00001f3c                USBFS_DispatchClassRqst\r
- .text.__libc_init_array\r
-                0x00001f8c       0x4c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
-                0x00001f8c                __libc_init_array\r
- .text.memcpy   0x00001fd8       0x12 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
-                0x00001fd8                memcpy\r
- .text.memset   0x00001fea       0x10 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
-                0x00001fea                memset\r
- *(.plt)\r
- *(.gnu.warning)\r
- *(.glue_7t)\r
- .glue_7t       0x00000000        0x0 linker stubs\r
- *(.glue_7)\r
- .glue_7        0x00000000        0x0 linker stubs\r
- *(.vfp11_veneer)\r
- .vfp11_veneer  0x00000000        0x0 linker stubs\r
- *(.bootloader)\r
- *fill*         0x00001ffa        0x2 00\r
- .bootloader    0x00001ffc        0x8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                0x00001ffc                BL_SizeBytes\r
-                0x00002000                BL_Checksum\r
- *(.ARM.extab* .gnu.linkonce.armextab.*)\r
- *(.gcc_except_table)\r
-\r
-.v4_bx          0x00002004        0x0\r
- .v4_bx         0x00000000        0x0 linker stubs\r
-\r
-.iplt           0x00002004        0x0\r
- .iplt          0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
-\r
-.eh_frame_hdr\r
- *(.eh_frame_hdr)\r
-\r
-.eh_frame       0x00002004        0x4\r
- *(.eh_frame)\r
- .eh_frame      0x00002004        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .eh_frame      0x00002004        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
-                0x00002008                PROVIDE (__exidx_start, .)\r
-\r
-.ARM.exidx\r
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
-                0x00002008                __exidx_end = .\r
-\r
-.rodata         0x00002008      0x248\r
- *(.rodata .rodata.* .gnu.linkonce.r.*)\r
- .rodata        0x00002008       0xb8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .rodata        0x000020c0        0x8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .rodata        0x000020c8      0x154 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-                0x000020c8                USBFS_TABLE\r
-                0x000020d0                USBFS_DEVICE0_TABLE\r
-                0x000020e0                USBFS_DEVICE0_CONFIGURATION0_TABLE\r
-                0x00002100                USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS\r
-                0x00002102                USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE\r
-                0x00002114                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE\r
-                0x0000211c                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE\r
-                0x00002144                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE\r
-                0x00002150                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE\r
-                0x0000215c                USBFS_HIDREPORT_DESCRIPTOR1\r
-                0x00002184                USBFS_SN_STRING_DESCRIPTOR\r
-                0x0000218e                USBFS_STRING_DESCRIPTORS\r
-                0x000021e1                USBFS_DEVICE0_CONFIGURATION0_DESCR\r
-                0x0000220a                USBFS_DEVICE0_DESCR\r
-                0x0000221c                . = ALIGN (0x4)\r
- *(.init)\r
- .init          0x0000221c        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
-                0x0000221c                _init\r
- .init          0x00002220        0x8 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
-                0x00002228                . = ALIGN (0x4)\r
-                0x00002228                __preinit_array_start = .\r
- *(.preinit_array)\r
-                0x00002228                __preinit_array_end = .\r
-                0x00002228                . = ALIGN (0x4)\r
-                0x00002228                __init_array_start = .\r
- *(SORT(.init_array.*))\r
- *(.init_array)\r
- .init_array    0x00002228        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .init_array    0x0000222c        0x4 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x00002230                __init_array_end = .\r
-                0x00002230                . = ALIGN (0x4)\r
- *(.fini)\r
- .fini          0x00002230        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
-                0x00002230                _fini\r
- .fini          0x00002234        0x8 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
-                0x0000223c                . = ALIGN (0x4)\r
-                0x0000223c                __fini_array_start = .\r
- *(.fini_array)\r
- .fini_array    0x0000223c        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- *(SORT(.fini_array.*))\r
-                0x00002240                __fini_array_end = .\r
-                0x00002240                . = ALIGN (0x4)\r
- *crtbegin.o(.ctors)\r
- *(EXCLUDE_FILE(*crtend.o) .ctors)\r
- *(SORT(.ctors.*))\r
- *crtend.o(.ctors)\r
-                0x00002240                . = ALIGN (0x4)\r
- *crtbegin.o(.dtors)\r
- *(EXCLUDE_FILE(*crtend.o) .dtors)\r
- *(SORT(.dtors.*))\r
- *crtend.o(.dtors)\r
-                0x00002240                . = ALIGN (0x4)\r
-                0x00002240                __cy_regions = .\r
-                0x00002240        0x4 LONG 0x2250 __cy_region_init_ram\r
-                0x00002244        0x4 LONG 0x1fffc108 __cy_region_start_data\r
-                0x00002248        0x4 LONG 0x20 __cy_region_init_size_ram\r
-                0x0000224c        0x4 LONG 0x150 __cy_region_zero_size_ram\r
-                0x00002250                __cy_regions_end = .\r
-                0x00002250                . = ALIGN (0x8)\r
-                0x00002250                _etext = .\r
-\r
-.ramvectors     0x1fffc000      0x100\r
-                0x1fffc000                __cy_region_start_ram = .\r
- *(.ramvectors)\r
- .ramvectors    0x1fffc000      0x100 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                0x1fffc000                CyRamVectors\r
-\r
-.noinit         0x1fffc100        0x5\r
- *(.noinit)\r
- .noinit        0x1fffc100        0x4 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .noinit        0x1fffc104        0x1 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x1fffc104                CyResetStatus\r
-\r
-.data           0x1fffc108       0x20 load address 0x00002250\r
-                0x1fffc108                __cy_region_start_data = .\r
- *(.jcr)\r
- .jcr           0x1fffc108        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .jcr           0x1fffc108        0x4 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
- *(.got.plt)\r
- *(.got)\r
- *(.shdata)\r
- *(.data .data.* .gnu.linkonce.d.*)\r
- .data          0x1fffc10c        0x8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                0x1fffc10c                BL_SizeBytesAccess\r
-                0x1fffc110                BL_ChecksumAccess\r
- .data          0x1fffc114       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                0x1fffc114                cydelay_32k_ms\r
-                0x1fffc118                cydelay_freq_khz\r
-                0x1fffc11c                cydelay_freq_mhz\r
-                0x1fffc120                cydelay_freq_hz\r
-                0x1fffc128                . = ALIGN (0x8)\r
- *fill*         0x1fffc124        0x4 00\r
- *(.ram)\r
-                0x1fffc128                _edata = .\r
-\r
-.igot.plt       0x1fffc128        0x0 load address 0x00002270\r
- .igot.plt      0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
-\r
-.bss            0x1fffc128      0x150 load address 0x00002270\r
-                0x1fffc128                PROVIDE (__bss_start__, .)\r
- *(.shbss)\r
- *(.bss .bss.* .gnu.linkonce.b.*)\r
- .bss           0x1fffc128       0x1c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .bss           0x1fffc144        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .bss           0x1fffc148        0x8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                0x1fffc148                SpcLockState\r
- .bss           0x1fffc150        0x4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .bss           0x1fffc154        0x1 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                0x1fffc154                USBFS_initVar\r
- .bss           0x1fffc155        0x2 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- *(COMMON)\r
- COMMON         0x1fffc157        0x2 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                0x1fffc157                dieTemperature\r
- *fill*         0x1fffc159        0x3 00\r
- COMMON         0x1fffc15c       0x8e .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                0x1fffc15c                USBFS_deviceAddress\r
-                0x1fffc15d                USBFS_ep0Mode\r
-                0x1fffc15e                USBFS_interfaceSetting\r
-                0x1fffc160                USBFS_currentTD\r
-                0x1fffc16c                USBFS_device\r
-                0x1fffc16d                USBFS_interfaceNumber\r
-                0x1fffc16e                USBFS_ep0Toggle\r
-                0x1fffc16f                USBFS_deviceStatus\r
-                0x1fffc170                USBFS_configurationChanged\r
-                0x1fffc171                USBFS_configuration\r
-                0x1fffc172                USBFS_transferState\r
-                0x1fffc173                USBFS_interfaceStatus\r
-                0x1fffc174                USBFS_interfaceClass\r
-                0x1fffc178                USBFS_EP\r
-                0x1fffc1e4                USBFS_interfaceSetting_last\r
-                0x1fffc1e5                USBFS_lastPacketSize\r
-                0x1fffc1e6                USBFS_ep0Count\r
-                0x1fffc1e8                USBFS_transferByteCount\r
- COMMON         0x1fffc1ea        0x3 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                0x1fffc1ea                USBFS_hidIdleRate\r
-                0x1fffc1eb                USBFS_hidIdleTimer\r
-                0x1fffc1ec                USBFS_hidProtocol\r
- *fill*         0x1fffc1ed        0x1 00\r
- COMMON         0x1fffc1ee       0x8a .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-                0x1fffc1ee                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB\r
-                0x1fffc1f2                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF\r
-                0x1fffc233                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF\r
-                0x1fffc274                USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB\r
-                0x1fffc278                . = ALIGN (0x8)\r
- *(.ram.b)\r
-                0x1fffc278                _end = .\r
-                0x1fffc278                __end = .\r
-                0x1fffc278                PROVIDE (end, .)\r
-                0x1fffc278                PROVIDE (__bss_end__, .)\r
-                0x00002250                __cy_region_init_ram = LOADADDR (.data)\r
-                0x00000020                __cy_region_init_size_ram = (_edata - ADDR (.data))\r
-                0x00000150                __cy_region_zero_size_ram = (_end - _edata)\r
-\r
-.heap           0x1fffc278      0x800 load address 0x00002270\r
-                0x1fffc278                . = _end\r
-                0x1fffca78                . = (. + 0x800)\r
- *fill*         0x1fffc278      0x800 00\r
-                0x1fffca78                __cy_heap_limit = .\r
-\r
-.stack          0x20002000     0x2000\r
-                0x20002000                __cy_stack_limit = .\r
-                0x20004000                . = (. + 0x2000)\r
- *fill*         0x20002000     0x2000 00\r
-                0x00000001                ASSERT ((__cy_stack_limit >= __cy_heap_limit), region RAM overflowed with stack)\r
-\r
-.cyloadermeta   0x0001ffc0       0x40\r
- *(.cyloadermeta)\r
- .cyloadermeta  0x0001ffc0       0x40 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x0001ffc0                cy_meta_loader\r
-\r
-.cyloadablemeta\r
- *(.cyloadablemeta)\r
-\r
-.cyconfigecc    0x80000000        0x1\r
- *(.cyconfigecc)\r
- .cyconfigecc   0x80000000        0x1 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x80000000                cy_meta_configecc\r
-\r
-.cycustnvl      0x90000000        0x4\r
- *(.cycustnvl)\r
- .cycustnvl     0x90000000        0x4 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x90000000                cy_meta_custnvl\r
-\r
-.cywolatch      0x90100000        0x4\r
- *(.cywolatch)\r
- .cywolatch     0x90100000        0x4 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x90100000                cy_meta_wonvl\r
-\r
-.cyeeprom       0x90200000        0x0\r
- *(.cyeeprom)\r
-                0x00000001                ASSERT ((. <= ((0x90200000 + ee_offset) + ee_size)), .cyeeprom data will not fit in EEPROM)\r
-\r
-.cyflashprotect\r
-                0x90400000       0x80\r
- *(.cyflashprotect)\r
- .cyflashprotect\r
-                0x90400000       0x80 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x90400000                cy_meta_flashprotect\r
-\r
-.cymeta         0x90500000        0xc\r
- *(.cymeta)\r
- .cymeta        0x90500000        0xc .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                0x90500000                cy_metadata\r
-\r
-.rel.dyn        0x00002270        0x0 load address 0x9050000c\r
- .rel.iplt      0x00000000        0x0 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
-\r
-.stab\r
- *(.stab)\r
-\r
-.stabstr\r
- *(.stabstr)\r
-\r
-.debug\r
- *(.debug)\r
-\r
-.line\r
- *(.line)\r
-\r
-.debug_srcinfo\r
- *(.debug_srcinfo)\r
-\r
-.debug_sfnames\r
- *(.debug_sfnames)\r
-\r
-.debug_aranges  0x00000000      0x748\r
- *(.debug_aranges)\r
- .debug_aranges\r
-                0x00000000       0x20 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_aranges\r
-                0x00000020       0x18 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .debug_aranges\r
-                0x00000038       0x40 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_aranges\r
-                0x00000078       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_aranges\r
-                0x000000a0       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_aranges\r
-                0x000000f0       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .debug_aranges\r
-                0x00000110       0x80 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_aranges\r
-                0x00000190      0x210 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_aranges\r
-                0x000003a0       0x70 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_aranges\r
-                0x00000410       0x68 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_aranges\r
-                0x00000478       0x40 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_aranges\r
-                0x000004b8       0xb0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_aranges\r
-                0x00000568       0x98 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_aranges\r
-                0x00000600       0x38 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_aranges\r
-                0x00000638       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_aranges\r
-                0x00000680       0x70 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_aranges\r
-                0x000006f0       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_aranges\r
-                0x00000710       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .debug_aranges\r
-                0x00000730       0x18 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-\r
-.debug_pubnames\r
- *(.debug_pubnames)\r
-\r
-.debug_info     0x00000000     0x65b7\r
- *(.debug_info .gnu.linkonce.wi.*)\r
- .debug_info    0x00000000      0x109 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_info    0x00000109      0x165 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .debug_info    0x0000026e      0x345 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_info    0x000005b3      0x549 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_info    0x00000afc      0xbf2 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_info    0x000016ee       0x81 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .debug_info    0x0000176f      0x726 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_info    0x00001e95      0xfc0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_info    0x00002e55      0xa1c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_info    0x00003871      0x46f .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_info    0x00003ce0      0x40f .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_info    0x000040ef      0x8c3 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_info    0x000049b2      0x6b7 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_info    0x00005069      0x1d5 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_info    0x0000523e      0x430 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_info    0x0000566e      0x89e .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_info    0x00005f0c       0xcd .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_info    0x00005fd9      0x1cf .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .debug_info    0x000061a8      0x40f .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-\r
-.debug_abbrev   0x00000000     0x1eee\r
- *(.debug_abbrev)\r
- .debug_abbrev  0x00000000       0xa1 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_abbrev  0x000000a1       0x5d .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .debug_abbrev  0x000000fe      0x1c2 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_abbrev  0x000002c0      0x236 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_abbrev  0x000004f6      0x2e8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_abbrev  0x000007de       0x14 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .debug_abbrev  0x000007f2      0x305 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_abbrev  0x00000af7      0x350 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_abbrev  0x00000e47      0x22c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_abbrev  0x00001073      0x1dc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_abbrev  0x0000124f      0x177 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_abbrev  0x000013c6      0x274 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_abbrev  0x0000163a      0x1f6 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_abbrev  0x00001830       0xe8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_abbrev  0x00001918      0x1aa .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_abbrev  0x00001ac2      0x22b .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_abbrev  0x00001ced       0x69 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_abbrev  0x00001d56       0xea .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .debug_abbrev  0x00001e40       0xae .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-\r
-.debug_line     0x00000000     0x23f4\r
- *(.debug_line)\r
- .debug_line    0x00000000      0x12f .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_line    0x0000012f       0x53 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .debug_line    0x00000182      0x19c .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_line    0x0000031e      0x1d6 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_line    0x000004f4      0x3d6 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_line    0x000008ca       0x68 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .debug_line    0x00000932      0x201 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_line    0x00000b33      0x668 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_line    0x0000119b      0x34a .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_line    0x000014e5      0x1bd .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_line    0x000016a2      0x14b .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_line    0x000017ed      0x2cc .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_line    0x00001ab9      0x24d .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_line    0x00001d06       0xc1 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_line    0x00001dc7      0x172 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_line    0x00001f39      0x360 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_line    0x00002299       0x66 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_line    0x000022ff       0x96 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .debug_line    0x00002395       0x5f .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-\r
-.debug_frame    0x00000000     0x11c4\r
- *(.debug_frame)\r
- .debug_frame   0x00000000       0x2c .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_frame   0x0000002c       0x84 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_frame   0x000000b0       0x48 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_frame   0x000000f8       0xf0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_frame   0x000001e8      0x154 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_frame   0x0000033c      0x4f4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_frame   0x00000830      0x164 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_frame   0x00000994      0x12c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_frame   0x00000ac0       0x9c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_frame   0x00000b5c      0x1a0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_frame   0x00000cfc      0x17c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_frame   0x00000e78       0x50 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_frame   0x00000ec8       0xa0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_frame   0x00000f68      0x12c .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_frame   0x00001094       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_frame   0x000010b4       0x20 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .debug_frame   0x000010d4       0x28 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .debug_frame   0x000010fc       0x28 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .debug_frame   0x00001124       0x2c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .debug_frame   0x00001150       0x2c c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
- .debug_frame   0x0000117c       0x28 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
- .debug_frame   0x000011a4       0x20 c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
-\r
-.debug_str      0x00000000     0x20dd\r
- *(.debug_str)\r
- .debug_str     0x00000000      0x121 .\CortexM3\ARM_GCC_473\Release\main.o\r
-                                0x15a (size before relaxing)\r
- .debug_str     0x00000121       0x86 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
-                                0x1a5 (size before relaxing)\r
- .debug_str     0x000001a7      0x147 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
-                                0x28a (size before relaxing)\r
- .debug_str     0x000002ee      0x1c9 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
-                                0x331 (size before relaxing)\r
- .debug_str     0x000004b7      0x368 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
-                                0x4f0 (size before relaxing)\r
- .debug_str     0x0000081f      0x189 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
-                                0x33a (size before relaxing)\r
- .debug_str     0x000009a8      0x626 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
-                                0x815 (size before relaxing)\r
- .debug_str     0x00000fce      0x345 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
-                                0x6a6 (size before relaxing)\r
- .debug_str     0x00001313       0xa1 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
-                                0x2a0 (size before relaxing)\r
- .debug_str     0x000013b4      0x10d .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
-                                0x2a9 (size before relaxing)\r
- .debug_str     0x000014c1      0x274 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
-                                0x4d4 (size before relaxing)\r
- .debug_str     0x00001735      0x2f9 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
-                                0x579 (size before relaxing)\r
- .debug_str     0x00001a2e       0x67 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
-                                0x217 (size before relaxing)\r
- .debug_str     0x00001a95      0x126 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
-                                0x360 (size before relaxing)\r
- .debug_str     0x00001bbb      0x1e9 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
-                                0x573 (size before relaxing)\r
- .debug_str     0x00001da4       0x25 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
-                                0x16f (size before relaxing)\r
- .debug_str     0x00001dc9       0x25 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
-                                0x226 (size before relaxing)\r
- .debug_str     0x00001dee      0x2ef .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-                                0x518 (size before relaxing)\r
-\r
-.debug_loc      0x00000000     0x3edd\r
- *(.debug_loc)\r
- .debug_loc     0x00000000       0x20 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_loc     0x00000020       0xf9 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_loc     0x00000119      0x133 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_loc     0x0000024c      0xfb4 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_loc     0x00001200      0x4cb .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_loc     0x000016cb      0xb86 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_loc     0x00002251      0x2ce .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_loc     0x0000251f      0x4f3 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_loc     0x00002a12      0x2c8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_loc     0x00002cda      0x5b7 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_loc     0x00003291      0x289 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_loc     0x0000351a      0x2e0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_loc     0x000037fa      0x68b .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_loc     0x00003e85       0x58 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
-\r
-.debug_macinfo\r
- *(.debug_macinfo)\r
-\r
-.debug_ranges   0x00000000      0x728\r
- *(.debug_ranges)\r
- .debug_ranges  0x00000000       0x10 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .debug_ranges  0x00000010       0x30 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .debug_ranges  0x00000040       0xb8 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .debug_ranges  0x000000f8       0x58 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .debug_ranges  0x00000150       0xd0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .debug_ranges  0x00000220      0x200 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .debug_ranges  0x00000420       0x78 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .debug_ranges  0x00000498       0x58 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .debug_ranges  0x000004f0       0x30 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .debug_ranges  0x00000520       0xa0 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .debug_ranges  0x000005c0       0x88 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .debug_ranges  0x00000648       0x28 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .debug_ranges  0x00000670       0x38 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .debug_ranges  0x000006a8       0x60 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .debug_ranges  0x00000708       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .debug_ranges  0x00000718       0x10 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
-\r
-.comment        0x00000000       0x70\r
- .comment       0x00000000       0x70 .\CortexM3\ARM_GCC_473\Release\main.o\r
-                                 0x71 (size before relaxing)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .comment       0x00000000       0x71 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
-\r
-.debug_weaknames\r
- *(.debug_weaknames)\r
-\r
-.debug_funcnames\r
- *(.debug_funcnames)\r
-\r
-.debug_typenames\r
- *(.debug_typenames)\r
-\r
-.debug_varnames\r
- *(.debug_varnames)\r
-\r
-.note.gnu.arm.ident\r
- *(.note.gnu.arm.ident)\r
-\r
-.ARM.attributes\r
-                0x00000000       0x29\r
- *(.ARM.attributes)\r
- .ARM.attributes\r
-                0x00000000       0x1d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crti.o\r
- .ARM.attributes\r
-                0x0000001d       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtbegin.o\r
- .ARM.attributes\r
-                0x0000004a       0x1b c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m/crt0.o\r
- .ARM.attributes\r
-                0x00000065       0x33 .\CortexM3\ARM_GCC_473\Release\main.o\r
- .ARM.attributes\r
-                0x00000098       0x33 .\CortexM3\ARM_GCC_473\Release\cymetadata.o\r
- .ARM.attributes\r
-                0x000000cb       0x33 .\CortexM3\ARM_GCC_473\Release\Cm3Start.o\r
- .ARM.attributes\r
-                0x000000fe       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyfitter_cfg.o)\r
- .ARM.attributes\r
-                0x00000131       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(BL.o)\r
- .ARM.attributes\r
-                0x00000164       0x21 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyBootAsmGnu.o)\r
- .ARM.attributes\r
-                0x00000185       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyFlash.o)\r
- .ARM.attributes\r
-                0x000001b8       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CyLib.o)\r
- .ARM.attributes\r
-                0x000001eb       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(cyPm.o)\r
- .ARM.attributes\r
-                0x0000021e       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(CySpc.o)\r
- .ARM.attributes\r
-                0x00000251       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_boot.o)\r
- .ARM.attributes\r
-                0x00000284       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS.o)\r
- .ARM.attributes\r
-                0x000002b7       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_drv.o)\r
- .ARM.attributes\r
-                0x000002ea       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_episr.o)\r
- .ARM.attributes\r
-                0x0000031d       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_hid.o)\r
- .ARM.attributes\r
-                0x00000350       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_std.o)\r
- .ARM.attributes\r
-                0x00000383       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_vnd.o)\r
- .ARM.attributes\r
-                0x000003b6       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_cls.o)\r
- .ARM.attributes\r
-                0x000003e9       0x33 .\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a(USBFS_descr.o)\r
- .ARM.attributes\r
-                0x0000041c       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-__atexit2.o)\r
- .ARM.attributes\r
-                0x00000449       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-exit.o)\r
- .ARM.attributes\r
-                0x00000476       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-fini.o)\r
- .ARM.attributes\r
-                0x000004a3       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-impure.o)\r
- .ARM.attributes\r
-                0x000004d0       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-init.o)\r
- .ARM.attributes\r
-                0x000004fd       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memcpy.o)\r
- .ARM.attributes\r
-                0x0000052a       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/../../../../arm-none-eabi/lib/armv7-m\libc_s.a(lib_a-memset.o)\r
- .ARM.attributes\r
-                0x00000557       0x2d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtend.o\r
- .ARM.attributes\r
-                0x00000584       0x1d c:/program files (x86)/cypress/psoc creator/3.0/psoc creator/import/gnu_cs/arm/4.7.3/bin/../lib/gcc/arm-none-eabi/4.7.3/armv7-m/crtn.o\r
-\r
-/DISCARD/\r
- *(.note.GNU-stack)\r
-OUTPUT(.\CortexM3\ARM_GCC_473\Release\USB_Bootloader.elf elf32-littlearm)\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.lst
deleted file mode 100755 (executable)
index 8abfeba..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.lst
+++ /dev/null
@@ -1,7149 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "cyPm.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CyPmHibSlpSaveSet,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .thumb\r
-  21                           .thumb_func\r
-  22                           .type   CyPmHibSlpSaveSet, %function\r
-  23                   CyPmHibSlpSaveSet:\r
-  24                   .LFB11:\r
-  25                           .file 1 ".\\Generated_Source\\PSoC5\\cyPm.c"\r
-   1:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/cyPm.c **** * File Name: cyPm.c\r
-   3:.\Generated_Source\PSoC5/cyPm.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/cyPm.c **** *\r
-   5:.\Generated_Source\PSoC5/cyPm.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/cyPm.c **** *  Provides an API for the power management.\r
-   7:.\Generated_Source\PSoC5/cyPm.c **** *\r
-   8:.\Generated_Source\PSoC5/cyPm.c **** * Note:\r
-   9:.\Generated_Source\PSoC5/cyPm.c **** *  Documentation of the API's in this file is located in the\r
-  10:.\Generated_Source\PSoC5/cyPm.c **** *  System Reference Guide provided with PSoC Creator.\r
-  11:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  12:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-  13:.\Generated_Source\PSoC5/cyPm.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  14:.\Generated_Source\PSoC5/cyPm.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  15:.\Generated_Source\PSoC5/cyPm.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  16:.\Generated_Source\PSoC5/cyPm.c **** * the software package with which this file was provided.\r
-  17:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-  18:.\Generated_Source\PSoC5/cyPm.c **** \r
-  19:.\Generated_Source\PSoC5/cyPm.c **** #include "cyPm.h"\r
-  20:.\Generated_Source\PSoC5/cyPm.c **** \r
-  21:.\Generated_Source\PSoC5/cyPm.c **** \r
-  22:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************\r
-  23:.\Generated_Source\PSoC5/cyPm.c **** * Place your includes, defines and code here. Do not use merge\r
-  24:.\Generated_Source\PSoC5/cyPm.c **** * region below unless any component datasheet suggest to do so.\r
-  25:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************/\r
-  26:.\Generated_Source\PSoC5/cyPm.c **** /* `#START CY_PM_HEADER_INCLUDE` */\r
-  27:.\Generated_Source\PSoC5/cyPm.c **** \r
-  28:.\Generated_Source\PSoC5/cyPm.c **** /* `#END` */\r
-  29:.\Generated_Source\PSoC5/cyPm.c **** \r
-  30:.\Generated_Source\PSoC5/cyPm.c **** \r
-  31:.\Generated_Source\PSoC5/cyPm.c **** static CY_PM_BACKUP_STRUCT          cyPmBackup;\r
-  32:.\Generated_Source\PSoC5/cyPm.c **** static CY_PM_CLOCK_BACKUP_STRUCT    cyPmClockBackup;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 2\r
-\r
-\r
-  33:.\Generated_Source\PSoC5/cyPm.c **** \r
-  34:.\Generated_Source\PSoC5/cyPm.c **** /* Convertion table between register's values and frequency in MHz  */\r
-  35:.\Generated_Source\PSoC5/cyPm.c **** static const uint8 CYCODE cyPmImoFreqReg2Mhz[7u] = {12u, 6u, 24u, 3u, 48u, 62u, 74u};\r
-  36:.\Generated_Source\PSoC5/cyPm.c **** \r
-  37:.\Generated_Source\PSoC5/cyPm.c **** /* Function Prototypes */\r
-  38:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSaveSet(void);\r
-  39:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibRestore(void) ;\r
-  40:.\Generated_Source\PSoC5/cyPm.c **** \r
-  41:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpSaveSet(void) ;\r
-  42:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpRestore(void) ;\r
-  43:.\Generated_Source\PSoC5/cyPm.c **** \r
-  44:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviSaveDisable(void) ;\r
-  45:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviRestore(void) ;\r
-  46:.\Generated_Source\PSoC5/cyPm.c **** \r
-  47:.\Generated_Source\PSoC5/cyPm.c **** \r
-  48:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-  49:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmSaveClocks\r
-  50:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-  51:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  52:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-  53:.\Generated_Source\PSoC5/cyPm.c **** *  This function is called in preparation for entering sleep or hibernate low\r
-  54:.\Generated_Source\PSoC5/cyPm.c **** *  power modes. Saves all state of the clocking system that does not persist\r
-  55:.\Generated_Source\PSoC5/cyPm.c **** *  during sleep/hibernate or that needs to be altered in preparation for\r
-  56:.\Generated_Source\PSoC5/cyPm.c **** *  sleep/hibernate. Shutdowns all the digital and analog clock dividers for the\r
-  57:.\Generated_Source\PSoC5/cyPm.c **** *  active power mode configuration.\r
-  58:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  59:.\Generated_Source\PSoC5/cyPm.c **** *  Switches the master clock over to the IMO and shuts down the PLL and MHz\r
-  60:.\Generated_Source\PSoC5/cyPm.c **** *  Crystal. The IMO frequency is set to either 12 MHz or 48 MHz to match the\r
-  61:.\Generated_Source\PSoC5/cyPm.c **** *  Design-Wide Resources System Editor "Enable Fast IMO During Startup" setting.\r
-  62:.\Generated_Source\PSoC5/cyPm.c **** *  The ILO and 32 KHz oscillators are not impacted. The current Flash wait state\r
-  63:.\Generated_Source\PSoC5/cyPm.c **** *  setting is saved and the Flash wait state setting is set for the current IMO\r
-  64:.\Generated_Source\PSoC5/cyPm.c **** *  speed.\r
-  65:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  66:.\Generated_Source\PSoC5/cyPm.c **** *  Note If the Master Clock source is routed through the DSI inputs, then it\r
-  67:.\Generated_Source\PSoC5/cyPm.c **** *  must be set manually to another source before using the\r
-  68:.\Generated_Source\PSoC5/cyPm.c **** *  CyPmSaveClocks()/CyPmRestoreClocks() functions.\r
-  69:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  70:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-  71:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-  72:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  73:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-  74:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-  75:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  76:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:\r
-  77:.\Generated_Source\PSoC5/cyPm.c **** *  All peripheral clocks are going to be off after this API method call.\r
-  78:.\Generated_Source\PSoC5/cyPm.c **** *\r
-  79:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-  80:.\Generated_Source\PSoC5/cyPm.c **** void CyPmSaveClocks(void) \r
-  81:.\Generated_Source\PSoC5/cyPm.c **** {\r
-  82:.\Generated_Source\PSoC5/cyPm.c ****     /* Digital and analog clocks - save enable state and disable them all */\r
-  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;\r
-  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;\r
-  85:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_A_MASK));\r
-  86:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_D_MASK));\r
-  87:.\Generated_Source\PSoC5/cyPm.c **** \r
-  88:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current flash wait cycles and set the maximum value */\r
-  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 3\r
-\r
-\r
-  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
-  91:.\Generated_Source\PSoC5/cyPm.c **** \r
-  92:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save current IMO MHz OSC frequency and USB mode is on bit */\r
-  93:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
-  94:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoUsbClk = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_USB;\r
-  95:.\Generated_Source\PSoC5/cyPm.c **** \r
-  96:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO doubler - save enable state */\r
-  97:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
-  98:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-  99:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO doubler enabled - save and disable */\r
- 100:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_ENABLED;\r
- 101:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 102:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 103:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 104:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO doubler disabled */\r
- 105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_DISABLED;\r
- 106:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 107:.\Generated_Source\PSoC5/cyPm.c **** \r
- 108:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - set appropriate frequency for LPM */\r
- 109:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);\r
- 110:.\Generated_Source\PSoC5/cyPm.c **** \r
- 111:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save enable state and enable without wait to settle */\r
- 112:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG))\r
- 113:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 114:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - save enabled state */\r
- 115:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_ENABLED;\r
- 116:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 117:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 118:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 119:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - save disabled state */\r
- 120:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_DISABLED;\r
- 121:.\Generated_Source\PSoC5/cyPm.c **** \r
- 122:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - enable */\r
- 123:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
- 124:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 125:.\Generated_Source\PSoC5/cyPm.c **** \r
- 126:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - save the current IMOCLK source and set to IMO if not yet */\r
- 127:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_XCLKEN))\r
- 128:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 129:.\Generated_Source\PSoC5/cyPm.c ****         /* DSI or XTAL CLK */\r
- 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =\r
- 131:.\Generated_Source\PSoC5/cyPm.c ****             (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_S\r
- 132:.\Generated_Source\PSoC5/cyPm.c **** \r
- 133:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO -  set IMOCLK source to MHz OSC */\r
- 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);\r
- 135:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 136:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 137:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 138:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO */\r
- 139:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc = CY_IMO_SOURCE_IMO;\r
- 140:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 141:.\Generated_Source\PSoC5/cyPm.c **** \r
- 142:.\Generated_Source\PSoC5/cyPm.c ****     /* Save clk_imo source */\r
- 143:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkImoSrc = CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK;\r
- 144:.\Generated_Source\PSoC5/cyPm.c **** \r
- 145:.\Generated_Source\PSoC5/cyPm.c ****     /* If IMOCLK2X or SPC OSC is source for clk_imo, set it to IMOCLK */\r
- 146:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_CLKDIST_IMO_OUT_IMO != cyPmClockBackup.clkImoSrc)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 4\r
-\r
-\r
- 147:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 148:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMOCLK to source for clk_imo */\r
- 149:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
- 150:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_CLKDIST_IMO_OUT_IMO;\r
- 151:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if IMOCLK is source clk_imo */\r
- 152:.\Generated_Source\PSoC5/cyPm.c **** \r
- 153:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO doubler - disable it (saved above) */\r
- 154:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
- 155:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 156:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_DisableDoubler();\r
- 157:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 158:.\Generated_Source\PSoC5/cyPm.c **** \r
- 159:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock - save divider and set it to divide-by-one (if no yet) */\r
- 160:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkSyncDiv = CY_PM_CLKDIST_MSTR0_REG;\r
- 161:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)\r
- 162:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 163:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);\r
- 164:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if master clock divider is 1 */\r
- 165:.\Generated_Source\PSoC5/cyPm.c **** \r
- 166:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock - save current source */\r
- 167:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;\r
- 168:.\Generated_Source\PSoC5/cyPm.c **** \r
- 169:.\Generated_Source\PSoC5/cyPm.c ****     /* Master clock source - set it to IMO if not yet. */\r
- 170:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)\r
- 171:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 172:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);\r
- 173:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Need to change nothing if master clock source is IMO */\r
- 174:.\Generated_Source\PSoC5/cyPm.c **** \r
- 175:.\Generated_Source\PSoC5/cyPm.c ****     /* Bus clock - save divider and set it, if needed, to divide-by-one */\r
- 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
- 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
- 178:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_BUS_CLK_DIV_BY_ONE != cyPmClockBackup.clkBusDiv)\r
- 179:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 180:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);\r
- 181:.\Generated_Source\PSoC5/cyPm.c ****     }    /* Do nothing if saved and actual values are equal */\r
- 182:.\Generated_Source\PSoC5/cyPm.c **** \r
- 183:.\Generated_Source\PSoC5/cyPm.c ****     /* Set number of wait cycles for the flash according CPU frequency in MHz */\r
- 184:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);\r
- 185:.\Generated_Source\PSoC5/cyPm.c **** \r
- 186:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL - check enable state, disable if needed */\r
- 187:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))\r
- 188:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 189:.\Generated_Source\PSoC5/cyPm.c ****         /* PLL is enabled - save state and disable */\r
- 190:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_ENABLED;\r
- 191:.\Generated_Source\PSoC5/cyPm.c ****         CyPLL_OUT_Stop();\r
- 192:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 193:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 194:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 195:.\Generated_Source\PSoC5/cyPm.c ****         /* PLL is disabled - save state */\r
- 196:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_DISABLED;\r
- 197:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 198:.\Generated_Source\PSoC5/cyPm.c **** \r
- 199:.\Generated_Source\PSoC5/cyPm.c ****     /* MHz ECO - check enable state and disable if needed */\r
- 200:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))\r
- 201:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 202:.\Generated_Source\PSoC5/cyPm.c ****         /* MHz ECO is enabled - save state and disable */\r
- 203:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_ENABLED;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 5\r
-\r
-\r
- 204:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_Stop();\r
- 205:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 206:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 207:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 208:.\Generated_Source\PSoC5/cyPm.c ****         /* MHz ECO is disabled - save state */\r
- 209:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_DISABLED;\r
- 210:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 211:.\Generated_Source\PSoC5/cyPm.c **** \r
- 212:.\Generated_Source\PSoC5/cyPm.c **** \r
- 213:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************\r
- 214:.\Generated_Source\PSoC5/cyPm.c ****     * Save enable state of delay between the system bus clock and each of the\r
- 215:.\Generated_Source\PSoC5/cyPm.c ****     * 4 individual analog clocks. This bit non-retention and it's value should\r
- 216:.\Generated_Source\PSoC5/cyPm.c ****     * be restored on wakeup.\r
- 217:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/\r
- 218:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))\r
- 219:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 220:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_ENABLED;\r
- 221:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 222:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 223:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 224:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_DISABLED;\r
- 225:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 226:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 227:.\Generated_Source\PSoC5/cyPm.c **** \r
- 228:.\Generated_Source\PSoC5/cyPm.c **** \r
- 229:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
- 230:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmRestoreClocks\r
- 231:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
- 232:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 233:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
- 234:.\Generated_Source\PSoC5/cyPm.c **** *  Restores any state that was preserved by the last call to CyPmSaveClocks().\r
- 235:.\Generated_Source\PSoC5/cyPm.c **** *  The Flash wait state setting is also restored.\r
- 236:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 237:.\Generated_Source\PSoC5/cyPm.c **** *  Note If the Master Clock source is routed through the DSI inputs, then it\r
- 238:.\Generated_Source\PSoC5/cyPm.c **** *  must be set manually to another source before using the\r
- 239:.\Generated_Source\PSoC5/cyPm.c **** *  CyPmSaveClocks()/CyPmRestoreClocks() functions.\r
- 240:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 241:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3 and PSoC 5LP:\r
- 242:.\Generated_Source\PSoC5/cyPm.c **** *  The merge region could be used to process state when the megahertz crystal is\r
- 243:.\Generated_Source\PSoC5/cyPm.c **** *  not ready after the hold-off timeout.\r
- 244:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 245:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5:\r
- 246:.\Generated_Source\PSoC5/cyPm.c **** *  The 130 ms is given for the megahertz crystal to stabilize. It's readiness is\r
- 247:.\Generated_Source\PSoC5/cyPm.c **** *  not verified after the hold-off timeout.\r
- 248:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 249:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
- 250:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
- 251:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 252:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
- 253:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
- 254:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 255:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
- 256:.\Generated_Source\PSoC5/cyPm.c **** void CyPmRestoreClocks(void) \r
- 257:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 258:.\Generated_Source\PSoC5/cyPm.c ****     cystatus status = CYRET_TIMEOUT;\r
- 259:.\Generated_Source\PSoC5/cyPm.c ****     uint16 i;\r
- 260:.\Generated_Source\PSoC5/cyPm.c ****     uint16 clkBusDivTmp;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 6\r
-\r
-\r
- 261:.\Generated_Source\PSoC5/cyPm.c **** \r
- 262:.\Generated_Source\PSoC5/cyPm.c **** \r
- 263:.\Generated_Source\PSoC5/cyPm.c ****     /* Convertion table between CyIMO_SetFreq() parameters and register's value */\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 265:.\Generated_Source\PSoC5/cyPm.c ****         CY_IMO_FREQ_12MHZ, CY_IMO_FREQ_6MHZ,  CY_IMO_FREQ_24MHZ, CY_IMO_FREQ_3MHZ,\r
- 266:.\Generated_Source\PSoC5/cyPm.c ****         CY_IMO_FREQ_48MHZ, 5u, 6u};\r
- 267:.\Generated_Source\PSoC5/cyPm.c **** \r
- 268:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore enable state of delay between the system bus clock and ACLKs. */\r
- 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
- 270:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 271:.\Generated_Source\PSoC5/cyPm.c ****         /* Delay for both the bandgap and the delay line to settle out */\r
- 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) \r
- 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);\r
- 274:.\Generated_Source\PSoC5/cyPm.c **** \r
- 275:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_DELAY_REG |= CY_PM_CLKDIST_DELAY_EN;\r
- 276:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 277:.\Generated_Source\PSoC5/cyPm.c **** \r
- 278:.\Generated_Source\PSoC5/cyPm.c ****     /* MHz ECO restore state */\r
- 279:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)\r
- 280:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 281:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************\r
- 282:.\Generated_Source\PSoC5/cyPm.c ****         * Enabling XMHZ XTAL. The actual CyXTAL_Start() with non zero wait\r
- 283:.\Generated_Source\PSoC5/cyPm.c ****         * period uses FTW for period measurement. This could cause a problem\r
- 284:.\Generated_Source\PSoC5/cyPm.c ****         * if CTW/FTW is used as a wake up time in the low power modes APIs.\r
- 285:.\Generated_Source\PSoC5/cyPm.c ****         * So, the XTAL wait procedure is implemented with a software delay.\r
- 286:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/\r
- 287:.\Generated_Source\PSoC5/cyPm.c **** \r
- 288:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable XMHZ XTAL with no wait */\r
- 289:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyXTAL_Start(CY_PM_XTAL_MHZ_NO_WAIT);\r
- 290:.\Generated_Source\PSoC5/cyPm.c **** \r
- 291:.\Generated_Source\PSoC5/cyPm.c ****         /* Read XERR bit to clear it */\r
- 292:.\Generated_Source\PSoC5/cyPm.c ****         (void) CY_PM_FASTCLK_XMHZ_CSR_REG;\r
- 293:.\Generated_Source\PSoC5/cyPm.c **** \r
- 294:.\Generated_Source\PSoC5/cyPm.c ****         /* Wait */\r
- 295:.\Generated_Source\PSoC5/cyPm.c ****         for(i = CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US; i > 0u; i--)\r
- 296:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 297:.\Generated_Source\PSoC5/cyPm.c ****             /* Make a 200 microseconds delay */\r
- 298:.\Generated_Source\PSoC5/cyPm.c ****             CyDelayCycles((uint32)CY_PM_WAIT_200_US * CY_PM_GET_CPU_FREQ_MHZ);\r
- 299:.\Generated_Source\PSoC5/cyPm.c **** \r
- 300:.\Generated_Source\PSoC5/cyPm.c ****             /* High output indicates oscillator failure */\r
- 301:.\Generated_Source\PSoC5/cyPm.c ****             if(0u == (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_XERR))\r
- 302:.\Generated_Source\PSoC5/cyPm.c ****             {\r
- 303:.\Generated_Source\PSoC5/cyPm.c ****                 status = CYRET_SUCCESS;\r
- 304:.\Generated_Source\PSoC5/cyPm.c ****                 break;\r
- 305:.\Generated_Source\PSoC5/cyPm.c ****             }\r
- 306:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 307:.\Generated_Source\PSoC5/cyPm.c **** \r
- 308:.\Generated_Source\PSoC5/cyPm.c ****         if(CYRET_TIMEOUT == status)\r
- 309:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 310:.\Generated_Source\PSoC5/cyPm.c ****             /*******************************************************************\r
- 311:.\Generated_Source\PSoC5/cyPm.c ****             * Process the situation when megahertz crystal is not ready.\r
- 312:.\Generated_Source\PSoC5/cyPm.c ****             * Time to stabialize value is crystal specific.\r
- 313:.\Generated_Source\PSoC5/cyPm.c ****             *******************************************************************/\r
- 314:.\Generated_Source\PSoC5/cyPm.c ****            /* `#START_MHZ_ECO_TIMEOUT` */\r
- 315:.\Generated_Source\PSoC5/cyPm.c **** \r
- 316:.\Generated_Source\PSoC5/cyPm.c ****            /* `#END` */\r
- 317:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 7\r
-\r
-\r
- 318:.\Generated_Source\PSoC5/cyPm.c ****     }   /* (CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState) */\r
- 319:.\Generated_Source\PSoC5/cyPm.c **** \r
- 320:.\Generated_Source\PSoC5/cyPm.c **** \r
- 321:.\Generated_Source\PSoC5/cyPm.c ****     /* Temprorary set the maximum flash wait cycles */\r
- 322:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
- 323:.\Generated_Source\PSoC5/cyPm.c **** \r
- 324:.\Generated_Source\PSoC5/cyPm.c ****     /* The XTAL and DSI clocks are ready to be source for Master clock. */\r
- 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||\r
- 326:.\Generated_Source\PSoC5/cyPm.c ****        (CY_PM_MASTER_CLK_SRC_DSI  == cyPmClockBackup.masterClkSrc))\r
- 327:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 328:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock's divider */\r
- 329:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
- 330:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 331:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore Master clock divider */\r
- 332:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
- 333:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 334:.\Generated_Source\PSoC5/cyPm.c **** \r
- 335:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock source */\r
- 336:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
- 337:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 338:.\Generated_Source\PSoC5/cyPm.c **** \r
- 339:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore IMO frequency */\r
- 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&\r
- 341:.\Generated_Source\PSoC5/cyPm.c ****         (CY_IMO_FREQ_24MHZ == cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]))\r
- 342:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 343:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore IMO frequency (24 MHz) and trim it for USB */\r
- 344:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(CY_IMO_FREQ_USB);\r
- 345:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 346:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 347:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 348:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore IMO frequency */\r
- 349:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]);\r
- 350:.\Generated_Source\PSoC5/cyPm.c **** \r
- 351:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB))\r
- 352:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 353:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG |= CY_PM_FASTCLK_IMO_CR_USB;\r
- 354:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 355:.\Generated_Source\PSoC5/cyPm.c ****         else\r
- 356:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 357:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_PM_FASTCLK_IMO_CR_USB));\r
- 358:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 359:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 360:.\Generated_Source\PSoC5/cyPm.c **** \r
- 361:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore enable state if needed */\r
- 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&\r
- 363:.\Generated_Source\PSoC5/cyPm.c ****        (0u == (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
- 364:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 365:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO - restore enabled state */\r
- 366:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
- 367:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 368:.\Generated_Source\PSoC5/cyPm.c **** \r
- 369:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore disable state if needed */\r
- 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&\r
- 371:.\Generated_Source\PSoC5/cyPm.c ****        (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
- 372:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 373:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Stop();\r
- 374:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 8\r
-\r
-\r
- 375:.\Generated_Source\PSoC5/cyPm.c **** \r
- 376:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore IMOCLK source */\r
- 377:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetSource(cyPmClockBackup.imoClkSrc);\r
- 378:.\Generated_Source\PSoC5/cyPm.c **** \r
- 379:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore IMO doubler enable state (turned off by CyPmSaveClocks()) */\r
- 380:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.imo2x)\r
- 381:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 382:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_EnableDoubler();\r
- 383:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 384:.\Generated_Source\PSoC5/cyPm.c **** \r
- 385:.\Generated_Source\PSoC5/cyPm.c ****     /* IMO - restore clk_imo source, if needed */\r
- 386:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkImoSrc != (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK))\r
- 387:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 388:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
- 389:.\Generated_Source\PSoC5/cyPm.c ****                                 cyPmClockBackup.clkImoSrc;\r
- 390:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 391:.\Generated_Source\PSoC5/cyPm.c **** \r
- 392:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL restore state */\r
- 393:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)\r
- 394:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 395:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************\r
- 396:.\Generated_Source\PSoC5/cyPm.c ****         * Enable PLL. The actual CyPLL_OUT_Start() without wait period uses FTW\r
- 397:.\Generated_Source\PSoC5/cyPm.c ****         * for period measurement. This could cause a problem if CTW/FTW is used\r
- 398:.\Generated_Source\PSoC5/cyPm.c ****         * as a wakeup time in the low power modes APIs. To omit this issue PLL\r
- 399:.\Generated_Source\PSoC5/cyPm.c ****         * wait procedure is implemented with a software delay.\r
- 400:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/\r
- 401:.\Generated_Source\PSoC5/cyPm.c **** \r
- 402:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable PLL */\r
- 403:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);\r
- 404:.\Generated_Source\PSoC5/cyPm.c **** \r
- 405:.\Generated_Source\PSoC5/cyPm.c ****         /* Make a 250 us delay */\r
- 406:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);\r
- 407:.\Generated_Source\PSoC5/cyPm.c ****     }   /* (CY_PM_ENABLED == cyPmClockBackup.pllEnableState) */\r
- 408:.\Generated_Source\PSoC5/cyPm.c **** \r
- 409:.\Generated_Source\PSoC5/cyPm.c **** \r
- 410:.\Generated_Source\PSoC5/cyPm.c ****     /* PLL and IMO is ready to be source for Master clock */\r
- 411:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_IMO == cyPmClockBackup.masterClkSrc) ||\r
- 412:.\Generated_Source\PSoC5/cyPm.c ****        (CY_PM_MASTER_CLK_SRC_PLL == cyPmClockBackup.masterClkSrc))\r
- 413:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 414:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock divider */\r
- 415:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
- 416:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 417:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
- 418:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 419:.\Generated_Source\PSoC5/cyPm.c **** \r
- 420:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore Master clock source */\r
- 421:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
- 422:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 423:.\Generated_Source\PSoC5/cyPm.c **** \r
- 424:.\Generated_Source\PSoC5/cyPm.c ****     /* Bus clock - restore divider, if needed */\r
- 425:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
- 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
- 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)\r
- 428:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 429:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(cyPmClockBackup.clkBusDiv);\r
- 430:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 431:.\Generated_Source\PSoC5/cyPm.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 9\r
-\r
-\r
- 432:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore flash wait cycles */\r
- 433:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_CACHE_CR_REG = ((CY_PM_CACHE_CR_REG & ((uint8)(~CY_PM_CACHE_CR_CYCLES_MASK))) |\r
- 434:.\Generated_Source\PSoC5/cyPm.c ****                            cyPmClockBackup.flashWaitCycles);\r
- 435:.\Generated_Source\PSoC5/cyPm.c **** \r
- 436:.\Generated_Source\PSoC5/cyPm.c ****     /* Digital and analog clocks - restore state */\r
- 437:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG = cyPmClockBackup.enClkA;\r
- 438:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG = cyPmClockBackup.enClkD;\r
- 439:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 440:.\Generated_Source\PSoC5/cyPm.c **** \r
- 441:.\Generated_Source\PSoC5/cyPm.c **** \r
- 442:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
- 443:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmAltAct\r
- 444:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
- 445:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 446:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
- 447:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Alternate Active (Standby) state. The Alternate Active\r
- 448:.\Generated_Source\PSoC5/cyPm.c **** *  state can allow for any of the capabilities of the device to be active, but\r
- 449:.\Generated_Source\PSoC5/cyPm.c **** *  the operation of this function is dependent on the CPU being disabled during\r
- 450:.\Generated_Source\PSoC5/cyPm.c **** *  the Alternate Active state. The configuration code and the component APIs\r
- 451:.\Generated_Source\PSoC5/cyPm.c **** *  will configure the template for the Alternate Active state to be the same as\r
- 452:.\Generated_Source\PSoC5/cyPm.c **** *  the Active state with the exception that the CPU will be disabled during\r
- 453:.\Generated_Source\PSoC5/cyPm.c **** *  Alternate Active.\r
- 454:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 455:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must manually configure the power mode\r
- 456:.\Generated_Source\PSoC5/cyPm.c **** *  of the source clocks for the timer that is used as the wakeup timer.\r
- 457:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 458:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3:\r
- 459:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Alternate Active, if a wakeupTime other than NONE is\r
- 460:.\Generated_Source\PSoC5/cyPm.c **** *  specified, then the appropriate timer state is configured as specified with\r
- 461:.\Generated_Source\PSoC5/cyPm.c **** *  the interrupt for that timer disabled.  The wakeup source will be the\r
- 462:.\Generated_Source\PSoC5/cyPm.c **** *  combination of the values specified in the wakeupSource and any timer\r
- 463:.\Generated_Source\PSoC5/cyPm.c **** *  specified in the wakeupTime argument.  Once the wakeup condition is\r
- 464:.\Generated_Source\PSoC5/cyPm.c **** *  satisfied, then all saved state is restored and the function returns in the\r
- 465:.\Generated_Source\PSoC5/cyPm.c **** *  Active state.\r
- 466:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 467:.\Generated_Source\PSoC5/cyPm.c **** *  Note that if the wakeupTime is made with a different value, the period before\r
- 468:.\Generated_Source\PSoC5/cyPm.c **** *  the wakeup occurs can be significantly shorter than the specified time.  If\r
- 469:.\Generated_Source\PSoC5/cyPm.c **** *  the next call is made with the same wakeupTime value, then the wakeup will\r
- 470:.\Generated_Source\PSoC5/cyPm.c **** *  occur the specified period after the previous wakeup occurred.\r
- 471:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 472:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
- 473:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer\r
- 474:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  If the CTW, FTW or One PPS is already\r
- 475:.\Generated_Source\PSoC5/cyPm.c **** *  configured for wakeup, for example with the SleepTimer or RTC components,\r
- 476:.\Generated_Source\PSoC5/cyPm.c **** *  then specify NONE for the wakeupTime and include the appropriate source for\r
- 477:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupSource.\r
- 478:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 479:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5LP:\r
- 480:.\Generated_Source\PSoC5/cyPm.c **** *  This function is used to both enter the Alternate Active mode and halt the\r
- 481:.\Generated_Source\PSoC5/cyPm.c **** *  processor.  For PSoC 3 these two actions must be paired together.  With PSoC\r
- 482:.\Generated_Source\PSoC5/cyPm.c **** *  5LP the processor can be halted independently with the __WFI() function from\r
- 483:.\Generated_Source\PSoC5/cyPm.c **** *  the CMSIS library that is included in Creator.  This function should be used\r
- 484:.\Generated_Source\PSoC5/cyPm.c **** *  instead when the action required is just to halt the processor until an\r
- 485:.\Generated_Source\PSoC5/cyPm.c **** *  enabled interrupt occurs.\r
- 486:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 487:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeupTime parameter is not used for this device. It must be set to zero\r
- 488:.\Generated_Source\PSoC5/cyPm.c **** *  (PM_ALT_ACT_TIME_NONE). The wake up time configuration can be done by a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 10\r
-\r
-\r
- 489:.\Generated_Source\PSoC5/cyPm.c **** *  separate component: the CTW wakeup interval should be configured with the\r
- 490:.\Generated_Source\PSoC5/cyPm.c **** *  Sleep Timer component and one second interval should be configured with the\r
- 491:.\Generated_Source\PSoC5/cyPm.c **** *  RTC component.\r
- 492:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 493:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeup behavior depends on wakeupSource parameter in the following\r
- 494:.\Generated_Source\PSoC5/cyPm.c **** *  manner: upon function execution the device will be switched from Active to\r
- 495:.\Generated_Source\PSoC5/cyPm.c **** *  Alternate Active mode and then the CPU will be halted. When an enabled wakeup\r
- 496:.\Generated_Source\PSoC5/cyPm.c **** *  event occurs the device will return to Active mode.  Similarly when an\r
- 497:.\Generated_Source\PSoC5/cyPm.c **** *  enabled interrupt occurs the CPU will be started. These two actions will\r
- 498:.\Generated_Source\PSoC5/cyPm.c **** *  occur together provided that the event that occurs is an enabled wakeup\r
- 499:.\Generated_Source\PSoC5/cyPm.c **** *  source and also generates an interrupt. If just the wakeup event occurs then\r
- 500:.\Generated_Source\PSoC5/cyPm.c **** *  the device will be in Active mode, but the CPU will remain halted waiting for\r
- 501:.\Generated_Source\PSoC5/cyPm.c **** *  an interrupt. If an interrupt occurs from something other than a wakeup\r
- 502:.\Generated_Source\PSoC5/cyPm.c **** *  source, then the CPU will restart with the device in Alternate Active mode\r
- 503:.\Generated_Source\PSoC5/cyPm.c **** *  until a wakeup event occurs.\r
- 504:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 505:.\Generated_Source\PSoC5/cyPm.c **** *  For example, if CyPmAltAct(PM_ALT_ACT_TIME_NONE, PM_ALT_ACT_SRC_PICU) is\r
- 506:.\Generated_Source\PSoC5/cyPm.c **** *  called and PICU interrupt occurs, the CPU will be started and device will be\r
- 507:.\Generated_Source\PSoC5/cyPm.c **** *  switched into Active mode. And if CyPmAltAct(PM_ALT_ACT_TIME_NONE,\r
- 508:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_NONE) is called and PICU interrupt occurs, the CPU will be\r
- 509:.\Generated_Source\PSoC5/cyPm.c **** *  started while device remains in Alternate Active mode.\r
- 510:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 511:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
- 512:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime: Specifies a timer wakeup source and the frequency of that\r
- 513:.\Generated_Source\PSoC5/cyPm.c **** *              source. For PSoC 5LP this parameter is ignored.\r
- 514:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 515:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Time\r
- 516:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_NONE             None\r
- 517:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_ONE_PPS          One PPS: 1 second\r
- 518:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_2MS          CTW: 2 ms\r
- 519:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_4MS          CTW: 4 ms\r
- 520:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_8MS          CTW: 8 ms\r
- 521:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_16MS         CTW: 16 ms\r
- 522:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_32MS         CTW: 32 ms\r
- 523:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_64MS         CTW: 64 ms\r
- 524:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_128MS        CTW: 128 ms\r
- 525:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_256MS        CTW: 256 ms\r
- 526:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_512MS        CTW: 512 ms\r
- 527:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_1024MS       CTW: 1024 ms\r
- 528:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_2048MS       CTW: 2048 ms\r
- 529:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_CTW_4096MS       CTW: 4096 ms\r
- 530:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_TIME_FTW(1-256)*       FTW: 10us to 2.56 ms\r
- 531:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 532:.\Generated_Source\PSoC5/cyPm.c **** *  *Note:   PM_ALT_ACT_TIME_FTW() is a macro that takes an argument that\r
- 533:.\Generated_Source\PSoC5/cyPm.c **** *           specifies how many increments of 10 us to delay.\r
- 534:.\Generated_Source\PSoC5/cyPm.c ****             For PSoC 3 silicon the valid range of  values is 1 to 256.\r
- 535:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 536:.\Generated_Source\PSoC5/cyPm.c **** *  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if\r
- 537:.\Generated_Source\PSoC5/cyPm.c **** *                   a wakeupTime has been specified the associated timer will be\r
- 538:.\Generated_Source\PSoC5/cyPm.c **** *                   included as a wakeup source.\r
- 539:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 540:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Source\r
- 541:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_NONE              None\r
- 542:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR0       Comparator 0\r
- 543:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR1       Comparator 1\r
- 544:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR2       Comparator 2\r
- 545:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_COMPARATOR3       Comparator 3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 11\r
-\r
-\r
- 546:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_INTERRUPT         Interrupt\r
- 547:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_PICU              PICU\r
- 548:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_I2C               I2C\r
- 549:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_BOOSTCONVERTER    Boost Converter\r
- 550:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_FTW               Fast Timewheel*\r
- 551:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_VD                High and Low Voltage Detection (HVI, LVI)*\r
- 552:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_CTW               Central Timewheel**\r
- 553:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_ONE_PPS           One PPS**\r
- 554:.\Generated_Source\PSoC5/cyPm.c **** *  PM_ALT_ACT_SRC_LCD               LCD\r
- 555:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 556:.\Generated_Source\PSoC5/cyPm.c **** *  *Note : FTW and HVI/LVI wakeup signals are in the same mask bit.\r
- 557:.\Generated_Source\PSoC5/cyPm.c **** *  **Note: CTW and One PPS wakeup signals are in the same mask bit.\r
- 558:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 559:.\Generated_Source\PSoC5/cyPm.c **** *  When specifying a Comparator as the wakeupSource an instance specific define\r
- 560:.\Generated_Source\PSoC5/cyPm.c **** *  should be used that will track with the specific comparator that the instance\r
- 561:.\Generated_Source\PSoC5/cyPm.c **** *  is placed into. As an example, for a Comparator instance named MyComp the\r
- 562:.\Generated_Source\PSoC5/cyPm.c **** *  value to OR into the mask is: MyComp_ctComp__CMP_MASK.\r
- 563:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 564:.\Generated_Source\PSoC5/cyPm.c **** *  When CTW, FTW or One PPS is used as a wakeup source, the CyPmReadStatus()\r
- 565:.\Generated_Source\PSoC5/cyPm.c **** *  function must be called upon wakeup with corresponding parameter. Please\r
- 566:.\Generated_Source\PSoC5/cyPm.c **** *  refer to the CyPmReadStatus() API in the System Reference Guide for more\r
- 567:.\Generated_Source\PSoC5/cyPm.c **** *  information.\r
- 568:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 569:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
- 570:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
- 571:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 572:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
- 573:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
- 574:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 575:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:\r
- 576:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
- 577:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer\r
- 578:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  Also, the ILO 1 KHz (if CTW timer is\r
- 579:.\Generated_Source\PSoC5/cyPm.c **** *  used as wakeup time) or ILO 100 KHz (if FTW timer is used as wakeup time)\r
- 580:.\Generated_Source\PSoC5/cyPm.c **** *  will be left started.\r
- 581:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 582:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
- 583:.\Generated_Source\PSoC5/cyPm.c **** void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource) \r
- 584:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 585:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC5)\r
- 586:.\Generated_Source\PSoC5/cyPm.c **** \r
- 587:.\Generated_Source\PSoC5/cyPm.c ****         /* Arguments expected to be 0 */\r
- 588:.\Generated_Source\PSoC5/cyPm.c ****         CYASSERT(PM_ALT_ACT_TIME_NONE == wakeupTime);\r
- 589:.\Generated_Source\PSoC5/cyPm.c **** \r
- 590:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != wakeupTime)\r
- 591:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 592:.\Generated_Source\PSoC5/cyPm.c ****             /* To remove unreferenced local variable warning */\r
- 593:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 594:.\Generated_Source\PSoC5/cyPm.c **** \r
- 595:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC5) */\r
- 596:.\Generated_Source\PSoC5/cyPm.c **** \r
- 597:.\Generated_Source\PSoC5/cyPm.c **** \r
- 598:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
- 599:.\Generated_Source\PSoC5/cyPm.c **** \r
- 600:.\Generated_Source\PSoC5/cyPm.c ****         /* FTW - save current and set new configuration */\r
- 601:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_ALT_ACT_TIME_FTW(1u)) && (wakeupTime <= PM_ALT_ACT_TIME_FTW(256u)))\r
- 602:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 12\r
-\r
-\r
- 603:.\Generated_Source\PSoC5/cyPm.c ****             CyPmFtwSetInterval(PM_ALT_ACT_FTW_INTERVAL(wakeupTime));\r
- 604:.\Generated_Source\PSoC5/cyPm.c **** \r
- 605:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */\r
- 606:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_FTW;\r
- 607:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 608:.\Generated_Source\PSoC5/cyPm.c **** \r
- 609:.\Generated_Source\PSoC5/cyPm.c ****         /* CTW - save current and set new configuration */\r
- 610:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_ALT_ACT_TIME_CTW_2MS) && (wakeupTime <= PM_ALT_ACT_TIME_CTW_4096MS))\r
- 611:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 612:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current CTW configuration and set new one */\r
- 613:.\Generated_Source\PSoC5/cyPm.c ****             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));\r
- 614:.\Generated_Source\PSoC5/cyPm.c **** \r
- 615:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */\r
- 616:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_CTW;\r
- 617:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 618:.\Generated_Source\PSoC5/cyPm.c **** \r
- 619:.\Generated_Source\PSoC5/cyPm.c ****         /* 1PPS - save current and set new configuration */\r
- 620:.\Generated_Source\PSoC5/cyPm.c ****         if(PM_ALT_ACT_TIME_ONE_PPS == wakeupTime)\r
- 621:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 622:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current 1PPS configuration and set new one */\r
- 623:.\Generated_Source\PSoC5/cyPm.c ****             CyPmOppsSet();\r
- 624:.\Generated_Source\PSoC5/cyPm.c **** \r
- 625:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */\r
- 626:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_ALT_ACT_SRC_ONE_PPS;\r
- 627:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 628:.\Generated_Source\PSoC5/cyPm.c **** \r
- 629:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */\r
- 630:.\Generated_Source\PSoC5/cyPm.c **** \r
- 631:.\Generated_Source\PSoC5/cyPm.c **** \r
- 632:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and set new wake up configuration */\r
- 633:.\Generated_Source\PSoC5/cyPm.c **** \r
- 634:.\Generated_Source\PSoC5/cyPm.c ****     /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */\r
- 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 637:.\Generated_Source\PSoC5/cyPm.c **** \r
- 638:.\Generated_Source\PSoC5/cyPm.c ****     /* Comparators */\r
- 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 641:.\Generated_Source\PSoC5/cyPm.c **** \r
- 642:.\Generated_Source\PSoC5/cyPm.c ****     /* LCD */\r
- 643:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 645:.\Generated_Source\PSoC5/cyPm.c **** \r
- 646:.\Generated_Source\PSoC5/cyPm.c **** \r
- 647:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to the Alternate Active mode */\r
- 648:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_A\r
- 649:.\Generated_Source\PSoC5/cyPm.c **** \r
- 650:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */\r
- 651:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
- 652:.\Generated_Source\PSoC5/cyPm.c **** \r
- 653:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */\r
- 654:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 655:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 656:.\Generated_Source\PSoC5/cyPm.c **** \r
- 657:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */\r
- 658:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
- 659:.\Generated_Source\PSoC5/cyPm.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 13\r
-\r
-\r
- 660:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Alternate Active Mode */\r
- 661:.\Generated_Source\PSoC5/cyPm.c **** \r
- 662:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore wake up configuration */\r
- 663:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
- 664:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
- 665:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 666:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 667:.\Generated_Source\PSoC5/cyPm.c **** \r
- 668:.\Generated_Source\PSoC5/cyPm.c **** \r
- 669:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
- 670:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmSleep\r
- 671:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
- 672:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 673:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
- 674:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Sleep state.\r
- 675:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 676:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must manually configure the power\r
- 677:.\Generated_Source\PSoC5/cyPm.c **** *  mode of the source clocks for the timer that is used as wakeup timer.\r
- 678:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 679:.\Generated_Source\PSoC5/cyPm.c **** *  Note Before calling this function, you must prepare clock tree configuration\r
- 680:.\Generated_Source\PSoC5/cyPm.c **** *  for the low power mode by calling CyPmSaveClocks(). And restore clock\r
- 681:.\Generated_Source\PSoC5/cyPm.c **** *  configuration after CyPmSleep() execution by calling CyPmRestoreClocks(). See\r
- 682:.\Generated_Source\PSoC5/cyPm.c **** *  Power Management section, Clock Configuration subsection of the System\r
- 683:.\Generated_Source\PSoC5/cyPm.c **** *  Reference Guide for more information.\r
- 684:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 685:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3:\r
- 686:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Sleep, if a wakeupTime other than NONE is specified,\r
- 687:.\Generated_Source\PSoC5/cyPm.c **** *  then the appropriate timer state is configured as specified with the\r
- 688:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt for that timer disabled.  The wakeup source will be the combination\r
- 689:.\Generated_Source\PSoC5/cyPm.c **** *  of the values specified in the wakeupSource and any timer specified in the\r
- 690:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime argument.  Once the wakeup condition is satisfied, then all saved\r
- 691:.\Generated_Source\PSoC5/cyPm.c **** *  state is restored and the function returns in the Active state.\r
- 692:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 693:.\Generated_Source\PSoC5/cyPm.c **** *  Note that if the wakeupTime is made with a different value, the period before\r
- 694:.\Generated_Source\PSoC5/cyPm.c **** *  the wakeup occurs can be significantly shorter than the specified time.  If\r
- 695:.\Generated_Source\PSoC5/cyPm.c **** *  the next call is made with the same wakeupTime value, then the wakeup will\r
- 696:.\Generated_Source\PSoC5/cyPm.c **** *  occur the specified period after the previous wakeup occurred.\r
- 697:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 698:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
- 699:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer\r
- 700:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled.  If the CTW or One PPS is already\r
- 701:.\Generated_Source\PSoC5/cyPm.c **** *  configured for wakeup, for example with the SleepTimer or RTC components,\r
- 702:.\Generated_Source\PSoC5/cyPm.c **** *  then specify NONE for the wakeupTime and include the appropriate source for\r
- 703:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupSource.\r
- 704:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 705:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 5LP:\r
- 706:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeupTime parameter is not used and the only NONE can be specified.\r
- 707:.\Generated_Source\PSoC5/cyPm.c **** *  The wakeup time must be configured with the component, SleepTimer for CTW\r
- 708:.\Generated_Source\PSoC5/cyPm.c **** *  intervals and RTC for 1PPS interval. The component must be configured to\r
- 709:.\Generated_Source\PSoC5/cyPm.c **** *  generate an interrrupt.\r
- 710:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 711:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
- 712:.\Generated_Source\PSoC5/cyPm.c **** *  wakeupTime:      Specifies a timer wakeup source and the frequency of that\r
- 713:.\Generated_Source\PSoC5/cyPm.c **** *                   source. For PSoC 5LP, this parameter is ignored.\r
- 714:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 715:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Time\r
- 716:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_NONE               None\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 14\r
-\r
-\r
- 717:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_ONE_PPS            One PPS: 1 second\r
- 718:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_2MS            CTW: 2 ms\r
- 719:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_4MS            CTW: 4 ms\r
- 720:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_8MS            CTW: 8 ms\r
- 721:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_16MS           CTW: 16 ms\r
- 722:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_32MS           CTW: 32 ms\r
- 723:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_64MS           CTW: 64 ms\r
- 724:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_128MS          CTW: 128 ms\r
- 725:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_256MS          CTW: 256 ms\r
- 726:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_512MS          CTW: 512 ms\r
- 727:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_1024MS         CTW: 1024 ms\r
- 728:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_2048MS         CTW: 2048 ms\r
- 729:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_TIME_CTW_4096MS         CTW: 4096 ms\r
- 730:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 731:.\Generated_Source\PSoC5/cyPm.c **** *  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if\r
- 732:.\Generated_Source\PSoC5/cyPm.c **** *                   a wakeupTime has been specified the associated timer will be\r
- 733:.\Generated_Source\PSoC5/cyPm.c **** *                   included as a wakeup source.\r
- 734:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 735:.\Generated_Source\PSoC5/cyPm.c **** *           Define                      Source\r
- 736:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_NONE                None\r
- 737:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR0         Comparator 0\r
- 738:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR1         Comparator 1\r
- 739:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR2         Comparator 2\r
- 740:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_COMPARATOR3         Comparator 3\r
- 741:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_PICU                PICU\r
- 742:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_I2C                 I2C\r
- 743:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_BOOSTCONVERTER      Boost Converter\r
- 744:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_VD                  High and Low Voltage Detection (HVI, LVI)\r
- 745:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_CTW                 Central Timewheel*\r
- 746:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_ONE_PPS             One PPS*\r
- 747:.\Generated_Source\PSoC5/cyPm.c **** *  PM_SLEEP_SRC_LCD                 LCD\r
- 748:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 749:.\Generated_Source\PSoC5/cyPm.c **** *  *Note:   CTW and One PPS wakeup signals are in the same mask bit.\r
- 750:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 751:.\Generated_Source\PSoC5/cyPm.c **** *  When specifying a Comparator as the wakeupSource an instance specific define\r
- 752:.\Generated_Source\PSoC5/cyPm.c **** *  should be used that will track with the specific comparator that the instance\r
- 753:.\Generated_Source\PSoC5/cyPm.c **** *  is placed into. As an example for a Comparator instance named MyComp the\r
- 754:.\Generated_Source\PSoC5/cyPm.c **** *  value to OR into the mask is: MyComp_ctComp__CMP_MASK.\r
- 755:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 756:.\Generated_Source\PSoC5/cyPm.c **** *  When CTW or One PPS is used as a wakeup source, the CyPmReadStatus()\r
- 757:.\Generated_Source\PSoC5/cyPm.c **** *  function must be called upon wakeup with corresponding parameter. Please\r
- 758:.\Generated_Source\PSoC5/cyPm.c **** *  refer to the CyPmReadStatus() API in the System Reference Guide for more\r
- 759:.\Generated_Source\PSoC5/cyPm.c **** *  information.\r
- 760:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 761:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
- 762:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
- 763:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 764:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
- 765:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
- 766:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 767:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects and Restrictions:\r
- 768:.\Generated_Source\PSoC5/cyPm.c **** *  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
- 769:.\Generated_Source\PSoC5/cyPm.c **** *  specified timer will be left as specified by wakeupTime with the timer\r
- 770:.\Generated_Source\PSoC5/cyPm.c **** *  enabled and the interrupt disabled. Also, the ILO 1 KHz (if CTW timer is\r
- 771:.\Generated_Source\PSoC5/cyPm.c **** *  used as wake up time) will be left started.\r
- 772:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 773:.\Generated_Source\PSoC5/cyPm.c **** *  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 15\r
-\r
-\r
- 774:.\Generated_Source\PSoC5/cyPm.c **** *  measure Hibernate/Sleep regulator settling time after a reset. The holdoff\r
- 775:.\Generated_Source\PSoC5/cyPm.c **** *  delay is measured using rising edges of the 1 kHz ILO.\r
- 776:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 777:.\Generated_Source\PSoC5/cyPm.c **** *  For PSoC 3 silicon hardware buzz should be disabled before entering a sleep\r
- 778:.\Generated_Source\PSoC5/cyPm.c **** *  power mode. It is disabled by PSoC Creator during startup.\r
- 779:.\Generated_Source\PSoC5/cyPm.c **** *  If a Low Voltage Interrupt (LVI), High Voltage Interrupt (HVI) or Brown Out\r
- 780:.\Generated_Source\PSoC5/cyPm.c **** *  detect (power supply supervising capabilities) are required in a design\r
- 781:.\Generated_Source\PSoC5/cyPm.c **** *  during sleep, use the Central Time Wheel (CTW) to periodically wake the\r
- 782:.\Generated_Source\PSoC5/cyPm.c **** *  device, perform software buzz, and refresh the supervisory services. If LVI,\r
- 783:.\Generated_Source\PSoC5/cyPm.c **** *  HVI, or Brown Out is not required, then use of the CTW is not required.\r
- 784:.\Generated_Source\PSoC5/cyPm.c **** *  Refer to the device errata for more information.\r
- 785:.\Generated_Source\PSoC5/cyPm.c **** *\r
- 786:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
- 787:.\Generated_Source\PSoC5/cyPm.c **** void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource) \r
- 788:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 789:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;\r
- 790:.\Generated_Source\PSoC5/cyPm.c **** \r
- 791:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current global interrupt enable and disable it */\r
- 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 793:.\Generated_Source\PSoC5/cyPm.c **** \r
- 794:.\Generated_Source\PSoC5/cyPm.c **** \r
- 795:.\Generated_Source\PSoC5/cyPm.c ****     /***********************************************************************\r
- 796:.\Generated_Source\PSoC5/cyPm.c ****     * The Hibernate/Sleep regulator has a settling time after a reset.\r
- 797:.\Generated_Source\PSoC5/cyPm.c ****     * During this time, the system ignores requests to enter Sleep and\r
- 798:.\Generated_Source\PSoC5/cyPm.c ****     * Hibernate modes. The holdoff delay is measured using rising edges of\r
- 799:.\Generated_Source\PSoC5/cyPm.c ****     * the 1 kHz ILO.\r
- 800:.\Generated_Source\PSoC5/cyPm.c ****     ***********************************************************************/\r
- 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
- 802:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 803:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable hold off - no action on restore */\r
- 804:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
- 805:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 806:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 807:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 808:.\Generated_Source\PSoC5/cyPm.c ****         /* Abort, device is not ready for low power mode entry */\r
- 809:.\Generated_Source\PSoC5/cyPm.c **** \r
- 810:.\Generated_Source\PSoC5/cyPm.c ****         /* Restore global interrupt enable state */\r
- 811:.\Generated_Source\PSoC5/cyPm.c ****         CyExitCriticalSection(interruptState);\r
- 812:.\Generated_Source\PSoC5/cyPm.c **** \r
- 813:.\Generated_Source\PSoC5/cyPm.c ****         return;\r
- 814:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 815:.\Generated_Source\PSoC5/cyPm.c **** \r
- 816:.\Generated_Source\PSoC5/cyPm.c **** \r
- 817:.\Generated_Source\PSoC5/cyPm.c ****     /***********************************************************************\r
- 818:.\Generated_Source\PSoC5/cyPm.c ****     * PSoC3 < TO6:\r
- 819:.\Generated_Source\PSoC5/cyPm.c ****     * - Hardware buzz must be disabled before sleep mode entry.\r
- 820:.\Generated_Source\PSoC5/cyPm.c ****     * - Voltage supervision (HVI/LVI) requires hardware buzz, so they must\r
- 821:.\Generated_Source\PSoC5/cyPm.c ****     *   be aslo disabled.\r
- 822:.\Generated_Source\PSoC5/cyPm.c ****     *\r
- 823:.\Generated_Source\PSoC5/cyPm.c ****     * PSoC3 >= TO6:\r
- 824:.\Generated_Source\PSoC5/cyPm.c ****     * - Voltage supervision (HVI/LVI) requires hardware buzz, so hardware buzz must be\r
- 825:.\Generated_Source\PSoC5/cyPm.c ****     *   enabled before sleep mode entry and restored on wakeup.\r
- 826:.\Generated_Source\PSoC5/cyPm.c ****     ***********************************************************************/\r
- 827:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
- 828:.\Generated_Source\PSoC5/cyPm.c **** \r
- 829:.\Generated_Source\PSoC5/cyPm.c ****         /* Silicon Revision ID is below TO6 */\r
- 830:.\Generated_Source\PSoC5/cyPm.c ****         if(CYDEV_CHIP_REV_ACTUAL < 5u)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 16\r
-\r
-\r
- 831:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 832:.\Generated_Source\PSoC5/cyPm.c ****             /* Hardware buzz expected to be disabled in Sleep mode */\r
- 833:.\Generated_Source\PSoC5/cyPm.c ****             CYASSERT(0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ));\r
- 834:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 835:.\Generated_Source\PSoC5/cyPm.c **** \r
- 836:.\Generated_Source\PSoC5/cyPm.c **** \r
- 837:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |\r
- 838:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))\r
- 839:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 840:.\Generated_Source\PSoC5/cyPm.c ****             if(CYDEV_CHIP_REV_ACTUAL < 5u)\r
- 841:.\Generated_Source\PSoC5/cyPm.c ****             {\r
- 842:.\Generated_Source\PSoC5/cyPm.c ****                 /* LVI/HVI requires hardware buzz to be enabled */\r
- 843:.\Generated_Source\PSoC5/cyPm.c ****                 CYASSERT(0u != 0u);\r
- 844:.\Generated_Source\PSoC5/cyPm.c ****             }\r
- 845:.\Generated_Source\PSoC5/cyPm.c ****             else\r
- 846:.\Generated_Source\PSoC5/cyPm.c ****             {\r
- 847:.\Generated_Source\PSoC5/cyPm.c ****                 if (0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ))\r
- 848:.\Generated_Source\PSoC5/cyPm.c ****                 {\r
- 849:.\Generated_Source\PSoC5/cyPm.c ****                     cyPmBackup.hardwareBuzz = CY_PM_DISABLED;\r
- 850:.\Generated_Source\PSoC5/cyPm.c ****                     CY_PM_PWRSYS_WAKE_TR2_REG |= CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ;\r
- 851:.\Generated_Source\PSoC5/cyPm.c ****                 }\r
- 852:.\Generated_Source\PSoC5/cyPm.c ****                 else\r
- 853:.\Generated_Source\PSoC5/cyPm.c ****                 {\r
- 854:.\Generated_Source\PSoC5/cyPm.c ****                     cyPmBackup.hardwareBuzz = CY_PM_ENABLED;\r
- 855:.\Generated_Source\PSoC5/cyPm.c ****                 }\r
- 856:.\Generated_Source\PSoC5/cyPm.c ****             }\r
- 857:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 858:.\Generated_Source\PSoC5/cyPm.c **** \r
- 859:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */\r
- 860:.\Generated_Source\PSoC5/cyPm.c **** \r
- 861:.\Generated_Source\PSoC5/cyPm.c **** \r
- 862:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************************\r
- 863:.\Generated_Source\PSoC5/cyPm.c ****     * For ARM-based devices, an interrupt is required for the CPU to wake up. The\r
- 864:.\Generated_Source\PSoC5/cyPm.c ****     * Power Management implementation assumes that wakeup time is configured with a\r
- 865:.\Generated_Source\PSoC5/cyPm.c ****     * separate component (component-based wakeup time configuration) for an\r
- 866:.\Generated_Source\PSoC5/cyPm.c ****     * interrupt to be issued on terminal count. For more information, refer to the\r
- 867:.\Generated_Source\PSoC5/cyPm.c ****     * Wakeup Time Configuration section of System Reference Guide.\r
- 868:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************************/\r
- 869:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC5)\r
- 870:.\Generated_Source\PSoC5/cyPm.c **** \r
- 871:.\Generated_Source\PSoC5/cyPm.c ****         /* Arguments expected to be 0 */\r
- 872:.\Generated_Source\PSoC5/cyPm.c ****         CYASSERT(PM_SLEEP_TIME_NONE == wakeupTime);\r
- 873:.\Generated_Source\PSoC5/cyPm.c **** \r
- 874:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != wakeupTime)\r
- 875:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 876:.\Generated_Source\PSoC5/cyPm.c ****             /* To remove unreferenced local variable warning */\r
- 877:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 878:.\Generated_Source\PSoC5/cyPm.c **** \r
- 879:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC5) */\r
- 880:.\Generated_Source\PSoC5/cyPm.c **** \r
- 881:.\Generated_Source\PSoC5/cyPm.c **** \r
- 882:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();\r
- 883:.\Generated_Source\PSoC5/cyPm.c **** \r
- 884:.\Generated_Source\PSoC5/cyPm.c **** \r
- 885:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
- 886:.\Generated_Source\PSoC5/cyPm.c **** \r
- 887:.\Generated_Source\PSoC5/cyPm.c ****         /* CTW - save current and set new configuration */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 17\r
-\r
-\r
- 888:.\Generated_Source\PSoC5/cyPm.c ****         if((wakeupTime >= PM_SLEEP_TIME_CTW_2MS) && (wakeupTime <= PM_SLEEP_TIME_CTW_4096MS))\r
- 889:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 890:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current and set new configuration of the CTW */\r
- 891:.\Generated_Source\PSoC5/cyPm.c ****             CyPmCtwSetInterval((uint8)(wakeupTime - 1u));\r
- 892:.\Generated_Source\PSoC5/cyPm.c **** \r
- 893:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */\r
- 894:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_SLEEP_SRC_CTW;\r
- 895:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 896:.\Generated_Source\PSoC5/cyPm.c **** \r
- 897:.\Generated_Source\PSoC5/cyPm.c ****         /* 1PPS - save current and set new configuration */\r
- 898:.\Generated_Source\PSoC5/cyPm.c ****         if(PM_SLEEP_TIME_ONE_PPS == wakeupTime)\r
- 899:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 900:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current and set new configuration of the 1PPS */\r
- 901:.\Generated_Source\PSoC5/cyPm.c ****             CyPmOppsSet();\r
- 902:.\Generated_Source\PSoC5/cyPm.c **** \r
- 903:.\Generated_Source\PSoC5/cyPm.c ****             /* Include associated timer to the wakeupSource */\r
- 904:.\Generated_Source\PSoC5/cyPm.c ****             wakeupSource |= PM_SLEEP_SRC_ONE_PPS;\r
- 905:.\Generated_Source\PSoC5/cyPm.c ****         }\r
- 906:.\Generated_Source\PSoC5/cyPm.c **** \r
- 907:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */\r
- 908:.\Generated_Source\PSoC5/cyPm.c **** \r
- 909:.\Generated_Source\PSoC5/cyPm.c **** \r
- 910:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and set new wake up configuration */\r
- 911:.\Generated_Source\PSoC5/cyPm.c **** \r
- 912:.\Generated_Source\PSoC5/cyPm.c ****     /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */\r
- 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 915:.\Generated_Source\PSoC5/cyPm.c **** \r
- 916:.\Generated_Source\PSoC5/cyPm.c ****     /* Comparators */\r
- 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 919:.\Generated_Source\PSoC5/cyPm.c **** \r
- 920:.\Generated_Source\PSoC5/cyPm.c ****     /* LCD */\r
- 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 923:.\Generated_Source\PSoC5/cyPm.c **** \r
- 924:.\Generated_Source\PSoC5/cyPm.c **** \r
- 925:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************\r
- 926:.\Generated_Source\PSoC5/cyPm.c ****     * Do not use merge region below unless any component datasheet\r
- 927:.\Generated_Source\PSoC5/cyPm.c ****     * suggest to do so.\r
- 928:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************/\r
- 929:.\Generated_Source\PSoC5/cyPm.c ****     /* `#START CY_PM_JUST_BEFORE_SLEEP` */\r
- 930:.\Generated_Source\PSoC5/cyPm.c **** \r
- 931:.\Generated_Source\PSoC5/cyPm.c ****     /* `#END` */\r
- 932:.\Generated_Source\PSoC5/cyPm.c **** \r
- 933:.\Generated_Source\PSoC5/cyPm.c **** \r
- 934:.\Generated_Source\PSoC5/cyPm.c ****     /* Last moment IMO frequency change */\r
- 935:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
- 936:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 937:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is 12 MHz */\r
- 938:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
- 939:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 940:.\Generated_Source\PSoC5/cyPm.c ****     else\r
- 941:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 942:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is not 12 MHz */\r
- 943:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
- 944:.\Generated_Source\PSoC5/cyPm.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 18\r
-\r
-\r
- 945:.\Generated_Source\PSoC5/cyPm.c ****         /* Save IMO frequency */\r
- 946:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
- 947:.\Generated_Source\PSoC5/cyPm.c **** \r
- 948:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMO frequency to 12 MHz */\r
- 949:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
- 950:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 951:.\Generated_Source\PSoC5/cyPm.c **** \r
- 952:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to the Sleep mode */\r
- 953:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_S\r
- 954:.\Generated_Source\PSoC5/cyPm.c **** \r
- 955:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */\r
- 956:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
- 957:.\Generated_Source\PSoC5/cyPm.c **** \r
- 958:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */\r
- 959:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 960:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 961:.\Generated_Source\PSoC5/cyPm.c **** \r
- 962:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */\r
- 963:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
- 964:.\Generated_Source\PSoC5/cyPm.c **** \r
- 965:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Sleep Mode */\r
- 966:.\Generated_Source\PSoC5/cyPm.c **** \r
- 967:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore last moment IMO frequency change */\r
- 968:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
- 969:.\Generated_Source\PSoC5/cyPm.c ****     {\r
- 970:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ\r
- 971:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.imoActFreq;\r
- 972:.\Generated_Source\PSoC5/cyPm.c ****     }\r
- 973:.\Generated_Source\PSoC5/cyPm.c **** \r
- 974:.\Generated_Source\PSoC5/cyPm.c **** \r
- 975:.\Generated_Source\PSoC5/cyPm.c ****     /*******************************************************************\r
- 976:.\Generated_Source\PSoC5/cyPm.c ****     * Do not use merge region below unless any component datasheet\r
- 977:.\Generated_Source\PSoC5/cyPm.c ****     * suggest to do so.\r
- 978:.\Generated_Source\PSoC5/cyPm.c ****     *******************************************************************/\r
- 979:.\Generated_Source\PSoC5/cyPm.c ****     /* `#START CY_PM_JUST_AFTER_WAKEUP_FROM_SLEEP` */\r
- 980:.\Generated_Source\PSoC5/cyPm.c **** \r
- 981:.\Generated_Source\PSoC5/cyPm.c ****     /* `#END` */\r
- 982:.\Generated_Source\PSoC5/cyPm.c **** \r
- 983:.\Generated_Source\PSoC5/cyPm.c **** \r
- 984:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore hardware configuration */\r
- 985:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();\r
- 986:.\Generated_Source\PSoC5/cyPm.c **** \r
- 987:.\Generated_Source\PSoC5/cyPm.c **** \r
- 988:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable hardware buzz, if it was previously enabled */\r
- 989:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
- 990:.\Generated_Source\PSoC5/cyPm.c **** \r
- 991:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |\r
- 992:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))\r
- 993:.\Generated_Source\PSoC5/cyPm.c ****         {\r
- 994:.\Generated_Source\PSoC5/cyPm.c ****             if(CYDEV_CHIP_REV_ACTUAL >= 5u)\r
- 995:.\Generated_Source\PSoC5/cyPm.c ****             {\r
- 996:.\Generated_Source\PSoC5/cyPm.c ****                 if (CY_PM_DISABLED == cyPmBackup.hardwareBuzz)\r
- 997:.\Generated_Source\PSoC5/cyPm.c ****                 {\r
- 998:.\Generated_Source\PSoC5/cyPm.c ****                     CY_PM_PWRSYS_WAKE_TR2_REG &= (uint8)(~CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ);\r
- 999:.\Generated_Source\PSoC5/cyPm.c ****                 }\r
-1000:.\Generated_Source\PSoC5/cyPm.c ****             }\r
-1001:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 19\r
-\r
-\r
-1002:.\Generated_Source\PSoC5/cyPm.c **** \r
-1003:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */\r
-1004:.\Generated_Source\PSoC5/cyPm.c **** \r
-1005:.\Generated_Source\PSoC5/cyPm.c **** \r
-1006:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore current wake up configuration */\r
-1007:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
-1008:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
-1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
-1010:.\Generated_Source\PSoC5/cyPm.c **** \r
-1011:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore global interrupt enable state */\r
-1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
-1013:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1014:.\Generated_Source\PSoC5/cyPm.c **** \r
-1015:.\Generated_Source\PSoC5/cyPm.c **** \r
-1016:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1017:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibernate\r
-1018:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1019:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1020:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1021:.\Generated_Source\PSoC5/cyPm.c **** *  Puts the part into the Hibernate state.\r
-1022:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1023:.\Generated_Source\PSoC5/cyPm.c **** *  PSoC 3 and PSoC 5LP:\r
-1024:.\Generated_Source\PSoC5/cyPm.c **** *  Before switching to Hibernate, the current status of the PICU wakeup source\r
-1025:.\Generated_Source\PSoC5/cyPm.c **** *  bit is saved and then set. This configures the device to wake up from the\r
-1026:.\Generated_Source\PSoC5/cyPm.c **** *  PICU. Make sure you have at least one pin configured to generate a PICU\r
-1027:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt. For pin Px.y, the register "PICU_INTTYPE_PICUx_INTTYPEy" controls\r
-1028:.\Generated_Source\PSoC5/cyPm.c **** *  the PICU behavior. In the TRM, this register is "PICU[0..15]_INTTYPE[0..7]."\r
-1029:.\Generated_Source\PSoC5/cyPm.c **** *  In the Pins component datasheet, this register is referred to as the IRQ\r
-1030:.\Generated_Source\PSoC5/cyPm.c **** *  option. Once the wakeup occurs, the PICU wakeup source bit is restored and\r
-1031:.\Generated_Source\PSoC5/cyPm.c **** *  the PSoC returns to the Active state.\r
-1032:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1033:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1034:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1035:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1036:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1037:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1038:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1039:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
-1040:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
-1041:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1042:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:\r
-1043:.\Generated_Source\PSoC5/cyPm.c **** *  Applications must wait 20 us before re-entering hibernate or sleep after\r
-1044:.\Generated_Source\PSoC5/cyPm.c **** *  waking up from hibernate. The 20 us allows the sleep regulator time to\r
-1045:.\Generated_Source\PSoC5/cyPm.c **** *  stabilize before the next hibernate / sleep event occurs. The 20 us\r
-1046:.\Generated_Source\PSoC5/cyPm.c **** *  requirement begins when the device wakes up. There is no hardware check that\r
-1047:.\Generated_Source\PSoC5/cyPm.c **** *  this requirement is met. The specified delay should be done on ISR entry.\r
-1048:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1049:.\Generated_Source\PSoC5/cyPm.c **** *  After wakeup PICU interrupt occurs, the Pin_ClearInterrupt() (where Pin is\r
-1050:.\Generated_Source\PSoC5/cyPm.c **** *  instance name of the Pins component) function must be called to clear the\r
-1051:.\Generated_Source\PSoC5/cyPm.c **** *  latched pin events to allow proper Hibernate mode entry andd to enable\r
-1052:.\Generated_Source\PSoC5/cyPm.c **** *  detection of future events.\r
-1053:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1054:.\Generated_Source\PSoC5/cyPm.c **** *  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to\r
-1055:.\Generated_Source\PSoC5/cyPm.c **** *  measure Hibernate/Sleep regulator settling time after a reset. The holdoff\r
-1056:.\Generated_Source\PSoC5/cyPm.c **** *  delay is measured using rising edges of the 1 kHz ILO.\r
-1057:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1058:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 20\r
-\r
-\r
-1059:.\Generated_Source\PSoC5/cyPm.c **** void CyPmHibernate(void) \r
-1060:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1061:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;\r
-1062:.\Generated_Source\PSoC5/cyPm.c **** \r
-1063:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current global interrupt enable and disable it */\r
-1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
-1065:.\Generated_Source\PSoC5/cyPm.c **** \r
-1066:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************\r
-1067:.\Generated_Source\PSoC5/cyPm.c ****         * The Hibernate/Sleep regulator has a settling time after a reset.\r
-1068:.\Generated_Source\PSoC5/cyPm.c ****         * During this time, the system ignores requests to enter Sleep and\r
-1069:.\Generated_Source\PSoC5/cyPm.c ****         * Hibernate modes. The holdoff delay is measured using rising edges of\r
-1070:.\Generated_Source\PSoC5/cyPm.c ****         * the 1 kHz ILO.\r
-1071:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/\r
-1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
-1073:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1074:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable hold off - no action on restore */\r
-1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
-1076:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-1077:.\Generated_Source\PSoC5/cyPm.c ****         else\r
-1078:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1079:.\Generated_Source\PSoC5/cyPm.c ****             /* Abort, device is not ready for low power mode entry */\r
-1080:.\Generated_Source\PSoC5/cyPm.c **** \r
-1081:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore global interrupt enable state */\r
-1082:.\Generated_Source\PSoC5/cyPm.c ****             CyExitCriticalSection(interruptState);\r
-1083:.\Generated_Source\PSoC5/cyPm.c **** \r
-1084:.\Generated_Source\PSoC5/cyPm.c ****             return;\r
-1085:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-1086:.\Generated_Source\PSoC5/cyPm.c **** \r
-1087:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSaveSet();\r
-1088:.\Generated_Source\PSoC5/cyPm.c **** \r
-1089:.\Generated_Source\PSoC5/cyPm.c **** \r
-1090:.\Generated_Source\PSoC5/cyPm.c ****     /* Save and enable only wakeup on PICU */\r
-1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
-1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;\r
-1093:.\Generated_Source\PSoC5/cyPm.c **** \r
-1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
-1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;\r
-1096:.\Generated_Source\PSoC5/cyPm.c **** \r
-1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
-1098:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = 0x00u;\r
-1099:.\Generated_Source\PSoC5/cyPm.c **** \r
-1100:.\Generated_Source\PSoC5/cyPm.c **** \r
-1101:.\Generated_Source\PSoC5/cyPm.c ****     /* Last moment IMO frequency change */\r
-1102:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
-1103:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1104:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is 12 MHz */\r
-1105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
-1106:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1107:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1108:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1109:.\Generated_Source\PSoC5/cyPm.c ****         /* IMO frequency is not 12 MHz */\r
-1110:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
-1111:.\Generated_Source\PSoC5/cyPm.c **** \r
-1112:.\Generated_Source\PSoC5/cyPm.c ****         /* Save IMO frequency */\r
-1113:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
-1114:.\Generated_Source\PSoC5/cyPm.c **** \r
-1115:.\Generated_Source\PSoC5/cyPm.c ****         /* Set IMO frequency to 12 MHz */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 21\r
-\r
-\r
-1116:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
-1117:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1118:.\Generated_Source\PSoC5/cyPm.c **** \r
-1119:.\Generated_Source\PSoC5/cyPm.c **** \r
-1120:.\Generated_Source\PSoC5/cyPm.c ****     /* Switch to Hibernate Mode */\r
-1121:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = (CY_PM_MODE_CSR_REG & ((uint8) (~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_H\r
-1122:.\Generated_Source\PSoC5/cyPm.c **** \r
-1123:.\Generated_Source\PSoC5/cyPm.c ****     /* Recommended readback. */\r
-1124:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
-1125:.\Generated_Source\PSoC5/cyPm.c **** \r
-1126:.\Generated_Source\PSoC5/cyPm.c ****     /* Two recommended NOPs to get into the mode. */\r
-1127:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
-1128:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
-1129:.\Generated_Source\PSoC5/cyPm.c **** \r
-1130:.\Generated_Source\PSoC5/cyPm.c ****     /* Execute WFI instruction (for ARM-based devices only) */\r
-1131:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
-1132:.\Generated_Source\PSoC5/cyPm.c **** \r
-1133:.\Generated_Source\PSoC5/cyPm.c **** \r
-1134:.\Generated_Source\PSoC5/cyPm.c ****     /* Point of return from Hibernate mode */\r
-1135:.\Generated_Source\PSoC5/cyPm.c **** \r
-1136:.\Generated_Source\PSoC5/cyPm.c **** \r
-1137:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore last moment IMO frequency change */\r
-1138:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
-1139:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1140:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ\r
-1141:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.imoActFreq;\r
-1142:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1143:.\Generated_Source\PSoC5/cyPm.c **** \r
-1144:.\Generated_Source\PSoC5/cyPm.c **** \r
-1145:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore device for proper Hibernate mode exit*/\r
-1146:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibRestore();\r
-1147:.\Generated_Source\PSoC5/cyPm.c **** \r
-1148:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore current wake up configuration */\r
-1149:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
-1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
-1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
-1152:.\Generated_Source\PSoC5/cyPm.c **** \r
-1153:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore global interrupt enable state */\r
-1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
-1155:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1156:.\Generated_Source\PSoC5/cyPm.c **** \r
-1157:.\Generated_Source\PSoC5/cyPm.c **** \r
-1158:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1159:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmReadStatus\r
-1160:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1161:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1162:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1163:.\Generated_Source\PSoC5/cyPm.c **** *  Manages the Power Manager Interrupt Status Register.  This register has the\r
-1164:.\Generated_Source\PSoC5/cyPm.c **** *  interrupt status for the one pulse per second, central timewheel and fast\r
-1165:.\Generated_Source\PSoC5/cyPm.c **** *  timewheel timers.  This hardware register clears on read.  To allow for only\r
-1166:.\Generated_Source\PSoC5/cyPm.c **** *  clearing the bits of interest and preserving the other bits, this function\r
-1167:.\Generated_Source\PSoC5/cyPm.c **** *  uses a shadow register that retains the state.  This function reads the\r
-1168:.\Generated_Source\PSoC5/cyPm.c **** *  status register and ORs that value with the shadow register.  That is the\r
-1169:.\Generated_Source\PSoC5/cyPm.c **** *  value that is returned.  Then the bits in the mask that are set are cleared\r
-1170:.\Generated_Source\PSoC5/cyPm.c **** *  from this value and written back to the shadow register.\r
-1171:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1172:.\Generated_Source\PSoC5/cyPm.c **** *  Note You must call this function within 1 ms (1 clock cycle of the ILO)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 22\r
-\r
-\r
-1173:.\Generated_Source\PSoC5/cyPm.c **** *  after a CTW event has occurred.\r
-1174:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1175:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1176:.\Generated_Source\PSoC5/cyPm.c **** *  mask: Bits in the shadow register to clear.\r
-1177:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1178:.\Generated_Source\PSoC5/cyPm.c **** *       Define                      Source\r
-1179:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_FTW_INT                Fast Timewheel\r
-1180:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_CTW_INT                Central Timewheel\r
-1181:.\Generated_Source\PSoC5/cyPm.c **** *  CY_PM_ONEPPS_INT             One Pulse Per Second\r
-1182:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1183:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1184:.\Generated_Source\PSoC5/cyPm.c **** *  Status.  Same bits values as the mask parameter.\r
-1185:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1186:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1187:.\Generated_Source\PSoC5/cyPm.c **** uint8 CyPmReadStatus(uint8 mask) \r
-1188:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1189:.\Generated_Source\PSoC5/cyPm.c ****     static uint8 interruptStatus;\r
-1190:.\Generated_Source\PSoC5/cyPm.c ****     uint8 interruptState;\r
-1191:.\Generated_Source\PSoC5/cyPm.c ****     uint8 tmpStatus;\r
-1192:.\Generated_Source\PSoC5/cyPm.c **** \r
-1193:.\Generated_Source\PSoC5/cyPm.c ****     /* Enter critical section */\r
-1194:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
-1195:.\Generated_Source\PSoC5/cyPm.c **** \r
-1196:.\Generated_Source\PSoC5/cyPm.c ****     /* Save value of the register, copy it and clear desired bit */\r
-1197:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus |= CY_PM_INT_SR_REG;\r
-1198:.\Generated_Source\PSoC5/cyPm.c ****     tmpStatus = interruptStatus;\r
-1199:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus &= ((uint8)(~mask));\r
-1200:.\Generated_Source\PSoC5/cyPm.c **** \r
-1201:.\Generated_Source\PSoC5/cyPm.c ****     /* Exit critical section */\r
-1202:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
-1203:.\Generated_Source\PSoC5/cyPm.c **** \r
-1204:.\Generated_Source\PSoC5/cyPm.c ****     return(tmpStatus);\r
-1205:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1206:.\Generated_Source\PSoC5/cyPm.c **** \r
-1207:.\Generated_Source\PSoC5/cyPm.c **** \r
-1208:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1209:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSaveSet\r
-1210:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1211:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1212:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1213:.\Generated_Source\PSoC5/cyPm.c **** *  Prepare device for proper Hibernate low power mode entry:\r
-1214:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables I2C backup regulator\r
-1215:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves ILO power down mode state and enable it\r
-1216:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves state of 1 kHz and 100 kHz ILO and disable them\r
-1217:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables sleep regulator and shorts vccd to vpwrsleep\r
-1218:.\Generated_Source\PSoC5/cyPm.c **** *  - Save LVI/HVI configuration and disable them - CyPmHviLviSaveDisable()\r
-1219:.\Generated_Source\PSoC5/cyPm.c **** *  - CyPmHibSlpSaveSet() function is called\r
-1220:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1221:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1222:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1223:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1224:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1225:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1226:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1227:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
-1228:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
-1229:.\Generated_Source\PSoC5/cyPm.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 23\r
-\r
-\r
-1230:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1231:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSaveSet(void) \r
-1232:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1233:.\Generated_Source\PSoC5/cyPm.c ****     /* I2C backup reg must be off when the sleep regulator is unavailable */\r
-1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))\r
-1235:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1236:.\Generated_Source\PSoC5/cyPm.c ****         /***********************************************************************\r
-1237:.\Generated_Source\PSoC5/cyPm.c ****         * If I2C backup regulator is enabled, all the fixed-function registers\r
-1238:.\Generated_Source\PSoC5/cyPm.c ****         * store their values while device is in low power mode, otherwise their\r
-1239:.\Generated_Source\PSoC5/cyPm.c ****         * configuration is lost. The I2C API makes a decision to restore or not\r
-1240:.\Generated_Source\PSoC5/cyPm.c ****         * to restore I2C registers based on this. If this regulator will be\r
-1241:.\Generated_Source\PSoC5/cyPm.c ****         * disabled and then enabled, I2C API will suppose that I2C block\r
-1242:.\Generated_Source\PSoC5/cyPm.c ****         * registers preserved their values, while this is not true. So, the\r
-1243:.\Generated_Source\PSoC5/cyPm.c ****         * backup regulator is disabled. The I2C sleep APIs is responsible for\r
-1244:.\Generated_Source\PSoC5/cyPm.c ****         * restoration.\r
-1245:.\Generated_Source\PSoC5/cyPm.c ****         ***********************************************************************/\r
-1246:.\Generated_Source\PSoC5/cyPm.c **** \r
-1247:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable I2C backup register */\r
-1248:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_CR1_REG &= ((uint8)(~CY_PM_PWRSYS_CR1_I2CREG_BACKUP));\r
-1249:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1250:.\Generated_Source\PSoC5/cyPm.c **** \r
-1251:.\Generated_Source\PSoC5/cyPm.c **** \r
-1252:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current ILO power mode and ensure low power mode */\r
-1253:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.iloPowerMode = CyILO_SetPowerMode(CY_PM_POWERDOWN_MODE);\r
-1254:.\Generated_Source\PSoC5/cyPm.c **** \r
-1255:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current 1kHz ILO enable state. Disabled automatically. */\r
-1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?\r
-1257:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;\r
-1258:.\Generated_Source\PSoC5/cyPm.c **** \r
-1259:.\Generated_Source\PSoC5/cyPm.c ****     /* Save current 100kHz ILO enable state. Disabled automatically. */\r
-1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?\r
-1261:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;\r
-1262:.\Generated_Source\PSoC5/cyPm.c **** \r
-1263:.\Generated_Source\PSoC5/cyPm.c **** \r
-1264:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable the sleep regulator and shorts vccd to vpwrsleep */\r
-1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))\r
-1266:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1267:.\Generated_Source\PSoC5/cyPm.c ****         /* Save current bypass state */\r
-1268:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_DISABLED;\r
-1269:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG |= CY_PM_PWRSYS_SLP_TR_BYPASS;\r
-1270:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1271:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1272:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1273:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_ENABLED;\r
-1274:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1275:.\Generated_Source\PSoC5/cyPm.c **** \r
-1276:.\Generated_Source\PSoC5/cyPm.c ****     /* LPCOMPs are always enabled (even when BOTH ext_vccd=1 and ext_vcca=1)*/\r
-1277:.\Generated_Source\PSoC5/cyPm.c **** \r
-1278:.\Generated_Source\PSoC5/cyPm.c **** \r
-1279:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************\r
-1280:.\Generated_Source\PSoC5/cyPm.c ****     * LVI/HVI must be disabled in Hibernate\r
-1281:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/\r
-1282:.\Generated_Source\PSoC5/cyPm.c **** \r
-1283:.\Generated_Source\PSoC5/cyPm.c ****     /* Save LVI/HVI configuration and disable them */\r
-1284:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHviLviSaveDisable();\r
-1285:.\Generated_Source\PSoC5/cyPm.c **** \r
-1286:.\Generated_Source\PSoC5/cyPm.c **** \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 24\r
-\r
-\r
-1287:.\Generated_Source\PSoC5/cyPm.c ****     /* Make the same preparations for Hibernate and Sleep modes */\r
-1288:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();\r
-1289:.\Generated_Source\PSoC5/cyPm.c **** \r
-1290:.\Generated_Source\PSoC5/cyPm.c **** \r
-1291:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************\r
-1292:.\Generated_Source\PSoC5/cyPm.c ****     * Save and set power mode wakeup trim registers\r
-1293:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/\r
-1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;\r
-1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;\r
-1296:.\Generated_Source\PSoC5/cyPm.c **** \r
-1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;\r
-1298:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = CY_PM_PWRSYS_WAKE_TR1;\r
-1299:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1300:.\Generated_Source\PSoC5/cyPm.c **** \r
-1301:.\Generated_Source\PSoC5/cyPm.c **** \r
-1302:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1303:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibRestore\r
-1304:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1305:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1306:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1307:.\Generated_Source\PSoC5/cyPm.c **** *  Restore device for proper Hibernate mode exit:\r
-1308:.\Generated_Source\PSoC5/cyPm.c **** *  - Restore LVI/HVI configuration - call CyPmHviLviRestore()\r
-1309:.\Generated_Source\PSoC5/cyPm.c **** *  - CyPmHibSlpSaveRestore() function is called\r
-1310:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores ILO power down mode state and enable it\r
-1311:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores state of 1 kHz and 100 kHz ILO and disable them\r
-1312:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores sleep regulator settings\r
-1313:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1314:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1315:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1316:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1317:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1318:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1319:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1320:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1321:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibRestore(void) \r
-1322:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1323:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore LVI/HVI configuration */\r
-1324:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHviLviRestore();\r
-1325:.\Generated_Source\PSoC5/cyPm.c **** \r
-1326:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore the same configuration for Hibernate and Sleep modes */\r
-1327:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();\r
-1328:.\Generated_Source\PSoC5/cyPm.c **** \r
-1329:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore 1kHz ILO enable state */\r
-1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)\r
-1331:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1332:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 1kHz ILO */\r
-1333:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start1K();\r
-1334:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1335:.\Generated_Source\PSoC5/cyPm.c **** \r
-1336:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore 100kHz ILO enable state */\r
-1337:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo100kEnable)\r
-1338:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1339:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 100kHz ILO */\r
-1340:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start100K();\r
-1341:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1342:.\Generated_Source\PSoC5/cyPm.c **** \r
-1343:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore ILO power mode */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 25\r
-\r
-\r
-1344:.\Generated_Source\PSoC5/cyPm.c ****     (void) CyILO_SetPowerMode(cyPmBackup.iloPowerMode);\r
-1345:.\Generated_Source\PSoC5/cyPm.c **** \r
-1346:.\Generated_Source\PSoC5/cyPm.c **** \r
-1347:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DISABLED == cyPmBackup.slpTrBypass)\r
-1348:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1349:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the sleep regulator */\r
-1350:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= ((uint8)(~CY_PM_PWRSYS_SLP_TR_BYPASS));\r
-1351:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1352:.\Generated_Source\PSoC5/cyPm.c **** \r
-1353:.\Generated_Source\PSoC5/cyPm.c **** \r
-1354:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************\r
-1355:.\Generated_Source\PSoC5/cyPm.c ****     * Restore power mode wakeup trim registers\r
-1356:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/\r
-1357:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;\r
-1358:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;\r
-1359:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1360:.\Generated_Source\PSoC5/cyPm.c **** \r
-1361:.\Generated_Source\PSoC5/cyPm.c **** \r
-1362:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1363:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmCtwSetInterval\r
-1364:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1365:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1366:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1367:.\Generated_Source\PSoC5/cyPm.c **** *  Performs CTW configuration:\r
-1368:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables CTW interrupt\r
-1369:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 1 kHz ILO\r
-1370:.\Generated_Source\PSoC5/cyPm.c **** *  - Sets new CTW interval\r
-1371:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1372:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1373:.\Generated_Source\PSoC5/cyPm.c **** *  ctwInterval: the CTW interval to be set.\r
-1374:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1375:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1376:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1377:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1378:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:\r
-1379:.\Generated_Source\PSoC5/cyPm.c **** *  Enables ILO 1 KHz clock and leaves it enabled.\r
-1380:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1381:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1382:.\Generated_Source\PSoC5/cyPm.c **** void CyPmCtwSetInterval(uint8 ctwInterval) \r
-1383:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1384:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable CTW interrupt enable */\r
-1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));\r
-1386:.\Generated_Source\PSoC5/cyPm.c **** \r
-1387:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 1kHz ILO (required for CTW operation) */\r
-1388:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start1K();\r
-1389:.\Generated_Source\PSoC5/cyPm.c **** \r
-1390:.\Generated_Source\PSoC5/cyPm.c ****     /* Interval could be set only while CTW is disabled */\r
-1391:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_CTW_EN))\r
-1392:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1393:.\Generated_Source\PSoC5/cyPm.c ****         /* Set CTW interval if needed */\r
-1394:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)\r
-1395:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1396:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable the CTW, set new CTW interval and enable it again */\r
-1397:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_EN));\r
-1398:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;\r
-1399:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
-1400:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 26\r
-\r
-\r
-1401:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1402:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1403:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1404:.\Generated_Source\PSoC5/cyPm.c ****         /* Set CTW interval if needed */\r
-1405:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)\r
-1406:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1407:.\Generated_Source\PSoC5/cyPm.c ****             /* Set the new CTW interval. Could be changed if CTW is disabled */\r
-1408:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;\r
-1409:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */\r
-1410:.\Generated_Source\PSoC5/cyPm.c **** \r
-1411:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the CTW */\r
-1412:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
-1413:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1414:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1415:.\Generated_Source\PSoC5/cyPm.c **** \r
-1416:.\Generated_Source\PSoC5/cyPm.c **** \r
-1417:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1418:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmOppsSet\r
-1419:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1420:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1421:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1422:.\Generated_Source\PSoC5/cyPm.c **** *  Performs 1PPS configuration:\r
-1423:.\Generated_Source\PSoC5/cyPm.c **** *  - Starts 32 KHz XTAL\r
-1424:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables 1PPS interupts\r
-1425:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 1PPS\r
-1426:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1427:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1428:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1429:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1430:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1431:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1432:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1433:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1434:.\Generated_Source\PSoC5/cyPm.c **** void CyPmOppsSet(void) \r
-1435:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1436:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 32kHz XTAL if needed */\r
-1437:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_SLOWCLK_X32_CR_REG & CY_PM_X32_CR_X32EN))\r
-1438:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1439:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable 32kHz XTAL */\r
-1440:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_32KHZ_Start();\r
-1441:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1442:.\Generated_Source\PSoC5/cyPm.c **** \r
-1443:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable 1PPS interrupt enable */\r
-1444:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_1PPS_IE));\r
-1445:.\Generated_Source\PSoC5/cyPm.c **** \r
-1446:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 1PPS operation */\r
-1447:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG |= CY_PM_1PPS_EN;\r
-1448:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1449:.\Generated_Source\PSoC5/cyPm.c **** \r
-1450:.\Generated_Source\PSoC5/cyPm.c **** \r
-1451:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1452:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmFtwSetInterval\r
-1453:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1454:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1455:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1456:.\Generated_Source\PSoC5/cyPm.c **** *  Performs FTW configuration:\r
-1457:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables FTW interrupt\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 27\r
-\r
-\r
-1458:.\Generated_Source\PSoC5/cyPm.c **** *  - Enables 100 kHz ILO\r
-1459:.\Generated_Source\PSoC5/cyPm.c **** *  - Sets new FTW interval.\r
-1460:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1461:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1462:.\Generated_Source\PSoC5/cyPm.c **** *  ftwInterval - FTW counter interval.\r
-1463:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1464:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1465:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1466:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1467:.\Generated_Source\PSoC5/cyPm.c **** * Side Effects:\r
-1468:.\Generated_Source\PSoC5/cyPm.c **** *  Enables ILO 100 KHz clock and leaves it enabled.\r
-1469:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1470:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1471:.\Generated_Source\PSoC5/cyPm.c **** void CyPmFtwSetInterval(uint8 ftwInterval) \r
-1472:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1473:.\Generated_Source\PSoC5/cyPm.c ****     /* Disable FTW interrupt enable */\r
-1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));\r
-1475:.\Generated_Source\PSoC5/cyPm.c **** \r
-1476:.\Generated_Source\PSoC5/cyPm.c ****     /* Enable 100kHz ILO */\r
-1477:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start100K();\r
-1478:.\Generated_Source\PSoC5/cyPm.c **** \r
-1479:.\Generated_Source\PSoC5/cyPm.c ****     /* Iterval could be set only while FTW is disabled */\r
-1480:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))\r
-1481:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1482:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable FTW, set new FTW interval if needed and enable it again */\r
-1483:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)\r
-1484:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1485:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable the CTW, set new CTW interval and enable it again */\r
-1486:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));\r
-1487:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;\r
-1488:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
-1489:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */\r
-1490:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1491:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1492:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1493:.\Generated_Source\PSoC5/cyPm.c ****         /* Set new FTW counter interval if needed. FTW is disabled. */\r
-1494:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)\r
-1495:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1496:.\Generated_Source\PSoC5/cyPm.c ****             /* Set the new CTW interval. Could be changed if CTW is disabled */\r
-1497:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;\r
-1498:.\Generated_Source\PSoC5/cyPm.c ****         }   /* Required interval is already set */\r
-1499:.\Generated_Source\PSoC5/cyPm.c **** \r
-1500:.\Generated_Source\PSoC5/cyPm.c ****         /* Enable the FTW */\r
-1501:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
-1502:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1503:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1504:.\Generated_Source\PSoC5/cyPm.c **** \r
-1505:.\Generated_Source\PSoC5/cyPm.c **** \r
-1506:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1507:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSlpSaveSet\r
-1508:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1509:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1510:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1511:.\Generated_Source\PSoC5/cyPm.c **** *  This API is used for preparing device for Sleep and Hibernate low power\r
-1512:.\Generated_Source\PSoC5/cyPm.c **** *  modes entry:\r
-1513:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves COMP, VIDAC, DSM and SAR routing connections (PSoC 5)\r
-1514:.\Generated_Source\PSoC5/cyPm.c **** *  - Saves SC/CT routing connections (PSoC 3/5/5LP)\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 28\r
-\r
-\r
-1515:.\Generated_Source\PSoC5/cyPm.c **** *  - Disables Serial Wire Viewer (SWV) (PSoC 3)\r
-1516:.\Generated_Source\PSoC5/cyPm.c **** *  - Save boost reference selection and set it to internal\r
-1517:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1518:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1519:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1520:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1521:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1522:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1523:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1524:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
-1525:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
-1526:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1527:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1528:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpSaveSet(void) \r
-1529:.\Generated_Source\PSoC5/cyPm.c **** {\r
-  26                           .loc 1 1529 0\r
-  27                           .cfi_startproc\r
-  28                           @ args = 0, pretend = 0, frame = 0\r
-  29                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  30 0000 2DE9F04F             push    {r4, r5, r6, r7, r8, r9, sl, fp, lr}\r
-  31                   .LCFI0:\r
-  32                           .cfi_def_cfa_offset 36\r
-  33                           .cfi_offset 4, -36\r
-  34                           .cfi_offset 5, -32\r
-  35                           .cfi_offset 6, -28\r
-  36                           .cfi_offset 7, -24\r
-  37                           .cfi_offset 8, -20\r
-  38                           .cfi_offset 9, -16\r
-  39                           .cfi_offset 10, -12\r
-  40                           .cfi_offset 11, -8\r
-  41                           .cfi_offset 14, -4\r
-1530:.\Generated_Source\PSoC5/cyPm.c ****     /* Save SC/CT routing registers */\r
-1531:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[0u]   = CY_GET_REG8(CYREG_SC0_SW0 );\r
-  42                           .loc 1 1531 0\r
-  43 0004 DFF848B1             ldr     fp, .L5+32\r
-  44 0008 494B                 ldr     r3, .L5\r
-  45 000a 9BF80020             ldrb    r2, [fp, #0]    @ zero_extendqisi2\r
-1532:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[1u]   = CY_GET_REG8(CYREG_SC0_SW2 );\r
-  46                           .loc 1 1532 0\r
-  47 000e 4949                 ldr     r1, .L5+4\r
-1531:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[0u]   = CY_GET_REG8(CYREG_SC0_SW0 );\r
-  48                           .loc 1 1531 0\r
-  49 0010 5A72                 strb    r2, [r3, #9]\r
-  50                           .loc 1 1532 0\r
-  51 0012 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
-1533:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[2u]   = CY_GET_REG8(CYREG_SC0_SW3 );\r
-  52                           .loc 1 1533 0\r
-  53 0014 484F                 ldr     r7, .L5+8\r
-1532:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[1u]   = CY_GET_REG8(CYREG_SC0_SW2 );\r
-  54                           .loc 1 1532 0\r
-  55 0016 9872                 strb    r0, [r3, #10]\r
-  56                           .loc 1 1533 0\r
-  57 0018 3C78                 ldrb    r4, [r7, #0]    @ zero_extendqisi2\r
-1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );\r
-1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );\r
-1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );\r
-1537:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[6u]   = CY_GET_REG8(CYREG_SC0_SW10);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 29\r
-\r
-\r
-1538:.\Generated_Source\PSoC5/cyPm.c **** \r
-1539:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[7u]   = CY_GET_REG8(CYREG_SC1_SW0 );\r
-1540:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[8u]   = CY_GET_REG8(CYREG_SC1_SW2 );\r
-1541:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[9u]   = CY_GET_REG8(CYREG_SC1_SW3 );\r
-1542:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[10u]  = CY_GET_REG8(CYREG_SC1_SW4 );\r
-1543:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[11u]  = CY_GET_REG8(CYREG_SC1_SW6 );\r
-1544:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[12u]  = CY_GET_REG8(CYREG_SC1_SW8 );\r
-1545:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[13u]  = CY_GET_REG8(CYREG_SC1_SW10);\r
-1546:.\Generated_Source\PSoC5/cyPm.c **** \r
-1547:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[14u]  = CY_GET_REG8(CYREG_SC2_SW0 );\r
-1548:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[15u]  = CY_GET_REG8(CYREG_SC2_SW2 );\r
-1549:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[16u]  = CY_GET_REG8(CYREG_SC2_SW3 );\r
-1550:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[17u]  = CY_GET_REG8(CYREG_SC2_SW4 );\r
-1551:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[18u]  = CY_GET_REG8(CYREG_SC2_SW6 );\r
-  58                           .loc 1 1551 0\r
-  59 001a DFF838A1             ldr     sl, .L5+36\r
-1533:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[2u]   = CY_GET_REG8(CYREG_SC0_SW3 );\r
-  60                           .loc 1 1533 0\r
-  61 001e DC72                 strb    r4, [r3, #11]\r
-1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );\r
-  62                           .loc 1 1534 0\r
-  63 0020 8D78                 ldrb    r5, [r1, #2]    @ zero_extendqisi2\r
-1552:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[19u]  = CY_GET_REG8(CYREG_SC2_SW8 );\r
-  64                           .loc 1 1552 0\r
-  65 0022 DFF83491             ldr     r9, .L5+40\r
-1534:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );\r
-  66                           .loc 1 1534 0\r
-  67 0026 1D73                 strb    r5, [r3, #12]\r
-1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );\r
-  68                           .loc 1 1535 0\r
-  69 0028 FE78                 ldrb    r6, [r7, #3]    @ zero_extendqisi2\r
-1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);\r
-  70                           .loc 1 1553 0\r
-  71 002a DFF83081             ldr     r8, .L5+44\r
-1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );\r
-  72                           .loc 1 1535 0\r
-  73 002e 5E73                 strb    r6, [r3, #13]\r
-1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );\r
-  74                           .loc 1 1536 0\r
-  75 0030 8A79                 ldrb    r2, [r1, #6]    @ zero_extendqisi2\r
-1554:.\Generated_Source\PSoC5/cyPm.c **** \r
-1555:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[21u]  = CY_GET_REG8(CYREG_SC3_SW0 );\r
-  76                           .loc 1 1555 0\r
-  77 0032 DFF82CC1             ldr     ip, .L5+48\r
-1536:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );\r
-  78                           .loc 1 1536 0\r
-  79 0036 9A73                 strb    r2, [r3, #14]\r
-1537:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[6u]   = CY_GET_REG8(CYREG_SC0_SW10);\r
-  80                           .loc 1 1537 0\r
-  81 0038 F879                 ldrb    r0, [r7, #7]    @ zero_extendqisi2\r
-  82 003a D873                 strb    r0, [r3, #15]\r
-1539:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[7u]   = CY_GET_REG8(CYREG_SC1_SW0 );\r
-  83                           .loc 1 1539 0\r
-  84 003c 8C7B                 ldrb    r4, [r1, #14]   @ zero_extendqisi2\r
-  85 003e 1C74                 strb    r4, [r3, #16]\r
-1540:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[8u]   = CY_GET_REG8(CYREG_SC1_SW2 );\r
-  86                           .loc 1 1540 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 30\r
-\r
-\r
-  87 0040 FD7B                 ldrb    r5, [r7, #15]   @ zero_extendqisi2\r
-  88 0042 5D74                 strb    r5, [r3, #17]\r
-1541:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[9u]   = CY_GET_REG8(CYREG_SC1_SW3 );\r
-  89                           .loc 1 1541 0\r
-  90 0044 4E7C                 ldrb    r6, [r1, #17]   @ zero_extendqisi2\r
-  91 0046 9E74                 strb    r6, [r3, #18]\r
-1542:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[10u]  = CY_GET_REG8(CYREG_SC1_SW4 );\r
-  92                           .loc 1 1542 0\r
-  93 0048 7A7C                 ldrb    r2, [r7, #17]   @ zero_extendqisi2\r
-  94 004a DA74                 strb    r2, [r3, #19]\r
-1543:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[11u]  = CY_GET_REG8(CYREG_SC1_SW6 );\r
-  95                           .loc 1 1543 0\r
-  96 004c 087D                 ldrb    r0, [r1, #20]   @ zero_extendqisi2\r
-  97 004e 1875                 strb    r0, [r3, #20]\r
-1544:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[12u]  = CY_GET_REG8(CYREG_SC1_SW8 );\r
-  98                           .loc 1 1544 0\r
-  99 0050 7C7D                 ldrb    r4, [r7, #21]   @ zero_extendqisi2\r
- 100 0052 5C75                 strb    r4, [r3, #21]\r
-1545:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[13u]  = CY_GET_REG8(CYREG_SC1_SW10);\r
- 101                           .loc 1 1545 0\r
- 102 0054 0D7E                 ldrb    r5, [r1, #24]   @ zero_extendqisi2\r
- 103 0056 9D75                 strb    r5, [r3, #22]\r
-1547:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[14u]  = CY_GET_REG8(CYREG_SC2_SW0 );\r
- 104                           .loc 1 1547 0\r
- 105 0058 7E7F                 ldrb    r6, [r7, #29]   @ zero_extendqisi2\r
- 106 005a DE75                 strb    r6, [r3, #23]\r
-1548:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[15u]  = CY_GET_REG8(CYREG_SC2_SW2 );\r
- 107                           .loc 1 1548 0\r
- 108 005c 91F82020             ldrb    r2, [r1, #32]   @ zero_extendqisi2\r
- 109 0060 1A76                 strb    r2, [r3, #24]\r
-1549:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[16u]  = CY_GET_REG8(CYREG_SC2_SW3 );\r
- 110                           .loc 1 1549 0\r
- 111 0062 97F82000             ldrb    r0, [r7, #32]   @ zero_extendqisi2\r
- 112 0066 5876                 strb    r0, [r3, #25]\r
-1550:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[17u]  = CY_GET_REG8(CYREG_SC2_SW4 );\r
- 113                           .loc 1 1550 0\r
- 114 0068 91F82240             ldrb    r4, [r1, #34]   @ zero_extendqisi2\r
- 115 006c 9C76                 strb    r4, [r3, #26]\r
-1551:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[18u]  = CY_GET_REG8(CYREG_SC2_SW6 );\r
- 116                           .loc 1 1551 0\r
- 117 006e 9AF80050             ldrb    r5, [sl, #0]    @ zero_extendqisi2\r
- 118 0072 DD76                 strb    r5, [r3, #27]\r
-1552:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[19u]  = CY_GET_REG8(CYREG_SC2_SW8 );\r
- 119                           .loc 1 1552 0\r
- 120 0074 99F80060             ldrb    r6, [r9, #0]    @ zero_extendqisi2\r
- 121 0078 1E77                 strb    r6, [r3, #28]\r
-1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);\r
- 122                           .loc 1 1553 0\r
- 123 007a 98F80020             ldrb    r2, [r8, #0]    @ zero_extendqisi2\r
-1556:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[22u]  = CY_GET_REG8(CYREG_SC3_SW2 );\r
-1557:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[23u]  = CY_GET_REG8(CYREG_SC3_SW3 );\r
- 124                           .loc 1 1557 0\r
- 125 007e 2F4E                 ldr     r6, .L5+12\r
-1553:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);\r
- 126                           .loc 1 1553 0\r
- 127 0080 5A77                 strb    r2, [r3, #29]\r
-1555:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[21u]  = CY_GET_REG8(CYREG_SC3_SW0 );\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 31\r
-\r
-\r
- 128                           .loc 1 1555 0\r
- 129 0082 9CF80000             ldrb    r0, [ip, #0]    @ zero_extendqisi2\r
- 130 0086 9877                 strb    r0, [r3, #30]\r
-1556:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[22u]  = CY_GET_REG8(CYREG_SC3_SW2 );\r
- 131                           .loc 1 1556 0\r
- 132 0088 97F82F40             ldrb    r4, [r7, #47]   @ zero_extendqisi2\r
- 133 008c DC77                 strb    r4, [r3, #31]\r
- 134                           .loc 1 1557 0\r
- 135 008e 3578                 ldrb    r5, [r6, #0]    @ zero_extendqisi2\r
-1558:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[24u]  = CY_GET_REG8(CYREG_SC3_SW4 );\r
-1559:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[25u]  = CY_GET_REG8(CYREG_SC3_SW6 );\r
- 136                           .loc 1 1559 0\r
- 137 0090 2B4C                 ldr     r4, .L5+16\r
-1557:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[23u]  = CY_GET_REG8(CYREG_SC3_SW3 );\r
- 138                           .loc 1 1557 0\r
- 139 0092 83F82050             strb    r5, [r3, #32]\r
-1558:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[24u]  = CY_GET_REG8(CYREG_SC3_SW4 );\r
- 140                           .loc 1 1558 0\r
- 141 0096 2B4D                 ldr     r5, .L5+20\r
- 142 0098 2A78                 ldrb    r2, [r5, #0]    @ zero_extendqisi2\r
- 143 009a 83F82120             strb    r2, [r3, #33]\r
- 144                           .loc 1 1559 0\r
- 145 009e 2078                 ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 146 00a0 83F82200             strb    r0, [r3, #34]\r
-1560:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[26u]  = CY_GET_REG8(CYREG_SC3_SW8 );\r
- 147                           .loc 1 1560 0\r
- 148 00a4 2848                 ldr     r0, .L5+24\r
- 149 00a6 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 150 00a8 83F82320             strb    r2, [r3, #35]\r
-1561:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[27u]  = CY_GET_REG8(CYREG_SC3_SW10);\r
- 151                           .loc 1 1561 0\r
- 152 00ac 91F83820             ldrb    r2, [r1, #56]   @ zero_extendqisi2\r
- 153 00b0 83F82420             strb    r2, [r3, #36]\r
-1562:.\Generated_Source\PSoC5/cyPm.c **** \r
-1563:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW0 , 0u);\r
- 154                           .loc 1 1563 0\r
- 155 00b4 0022                 movs    r2, #0\r
- 156 00b6 8BF80020             strb    r2, [fp, #0]\r
-1564:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , 0u);\r
- 157                           .loc 1 1564 0\r
- 158 00ba 07F8012C             strb    r2, [r7, #-1]\r
-1535:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );\r
- 159                           .loc 1 1535 0\r
- 160 00be 0337                 adds    r7, r7, #3\r
-1565:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW3 , 0u);\r
- 161                           .loc 1 1565 0\r
- 162 00c0 07F8032C             strb    r2, [r7, #-3]\r
-1564:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , 0u);\r
- 163                           .loc 1 1564 0\r
- 164 00c4 043F                 subs    r7, r7, #4\r
-1566:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW4 , 0u);\r
- 165                           .loc 1 1566 0\r
- 166 00c6 0237                 adds    r7, r7, #2\r
- 167 00c8 3A70                 strb    r2, [r7, #0]\r
-1567:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW6 , 0u);\r
- 168                           .loc 1 1567 0\r
- 169 00ca BA70                 strb    r2, [r7, #2]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 32\r
-\r
-\r
-1568:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW8 , 0u);\r
- 170                           .loc 1 1568 0\r
- 171 00cc 3A71                 strb    r2, [r7, #4]\r
-1569:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW10, 0u);\r
- 172                           .loc 1 1569 0\r
- 173 00ce BA71                 strb    r2, [r7, #6]\r
-1570:.\Generated_Source\PSoC5/cyPm.c **** \r
-1571:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW0 , 0u);\r
- 174                           .loc 1 1571 0\r
- 175 00d0 3A73                 strb    r2, [r7, #12]\r
-1572:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW2 , 0u);\r
- 176                           .loc 1 1572 0\r
- 177 00d2 BA73                 strb    r2, [r7, #14]\r
-1573:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW3 , 0u);\r
- 178                           .loc 1 1573 0\r
- 179 00d4 FA73                 strb    r2, [r7, #15]\r
-1574:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW4 , 0u);\r
- 180                           .loc 1 1574 0\r
- 181 00d6 3A74                 strb    r2, [r7, #16]\r
-1575:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW6 , 0u);\r
- 182                           .loc 1 1575 0\r
- 183 00d8 BA74                 strb    r2, [r7, #18]\r
-1576:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW8 , 0u);\r
- 184                           .loc 1 1576 0\r
- 185 00da 3A75                 strb    r2, [r7, #20]\r
-1577:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW10, 0u);\r
- 186                           .loc 1 1577 0\r
- 187 00dc BA75                 strb    r2, [r7, #22]\r
-1578:.\Generated_Source\PSoC5/cyPm.c **** \r
-1579:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW0 , 0u);\r
- 188                           .loc 1 1579 0\r
- 189 00de 3A77                 strb    r2, [r7, #28]\r
-1580:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW2 , 0u);\r
- 190                           .loc 1 1580 0\r
- 191 00e0 BA77                 strb    r2, [r7, #30]\r
-1581:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW3 , 0u);\r
- 192                           .loc 1 1581 0\r
- 193 00e2 FA77                 strb    r2, [r7, #31]\r
-1582:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW4 , 0u);\r
- 194                           .loc 1 1582 0\r
- 195 00e4 87F82020             strb    r2, [r7, #32]\r
-1583:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW6 , 0u);\r
- 196                           .loc 1 1583 0\r
- 197 00e8 8AF80020             strb    r2, [sl, #0]\r
-1584:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW8 , 0u);\r
- 198                           .loc 1 1584 0\r
- 199 00ec 89F80020             strb    r2, [r9, #0]\r
-1585:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW10, 0u);\r
- 200                           .loc 1 1585 0\r
- 201 00f0 88F80020             strb    r2, [r8, #0]\r
-1586:.\Generated_Source\PSoC5/cyPm.c **** \r
-1587:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW0 , 0u);\r
- 202                           .loc 1 1587 0\r
- 203 00f4 8CF80020             strb    r2, [ip, #0]\r
-1588:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , 0u);\r
- 204                           .loc 1 1588 0\r
- 205 00f8 87F82E20             strb    r2, [r7, #46]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 33\r
-\r
-\r
-1589:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW3 , 0u);\r
- 206                           .loc 1 1589 0\r
- 207 00fc 3270                 strb    r2, [r6, #0]\r
-1590:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW4 , 0u);\r
- 208                           .loc 1 1590 0\r
- 209 00fe 2A70                 strb    r2, [r5, #0]\r
-1591:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW6 , 0u);\r
- 210                           .loc 1 1591 0\r
- 211 0100 2270                 strb    r2, [r4, #0]\r
-1592:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW8 , 0u);\r
- 212                           .loc 1 1592 0\r
- 213 0102 0270                 strb    r2, [r0, #0]\r
-1593:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, 0u);\r
-1594:.\Generated_Source\PSoC5/cyPm.c **** \r
-1595:.\Generated_Source\PSoC5/cyPm.c **** \r
-1596:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
-1597:.\Generated_Source\PSoC5/cyPm.c **** \r
-1598:.\Generated_Source\PSoC5/cyPm.c ****         /* Serial Wire Viewer (SWV) workaround */\r
-1599:.\Generated_Source\PSoC5/cyPm.c **** \r
-1600:.\Generated_Source\PSoC5/cyPm.c ****         /* Disable SWV before entering low power mode */\r
-1601:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (CY_PM_MLOGIC_DBG_REG & CY_PM_MLOGIC_DBG_SWV_CLK_EN))\r
-1602:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1603:.\Generated_Source\PSoC5/cyPm.c ****             /* Save SWV clock enabled state */\r
-1604:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.swvClkEnabled = CY_PM_ENABLED;\r
-1605:.\Generated_Source\PSoC5/cyPm.c **** \r
-1606:.\Generated_Source\PSoC5/cyPm.c ****             /* Save current ports drive mode settings */\r
-1607:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.prt1Dm = CY_PM_PRT1_PC3_REG & ((uint8)(~CY_PM_PRT1_PC3_DM_MASK));\r
-1608:.\Generated_Source\PSoC5/cyPm.c **** \r
-1609:.\Generated_Source\PSoC5/cyPm.c ****             /* Set drive mode to strong output */\r
-1610:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |\r
-1611:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_PRT1_PC3_DM_STRONG;\r
-1612:.\Generated_Source\PSoC5/cyPm.c **** \r
-1613:.\Generated_Source\PSoC5/cyPm.c ****             /* Disable SWV clocks */\r
-1614:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_MLOGIC_DBG_REG &= ((uint8)(~CY_PM_MLOGIC_DBG_SWV_CLK_EN));\r
-1615:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-1616:.\Generated_Source\PSoC5/cyPm.c ****         else\r
-1617:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1618:.\Generated_Source\PSoC5/cyPm.c ****             /* Save SWV clock disabled state */\r
-1619:.\Generated_Source\PSoC5/cyPm.c ****             cyPmBackup.swvClkEnabled = CY_PM_DISABLED;\r
-1620:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-1621:.\Generated_Source\PSoC5/cyPm.c **** \r
-1622:.\Generated_Source\PSoC5/cyPm.c ****     #endif  /* (CY_PSOC3) */\r
-1623:.\Generated_Source\PSoC5/cyPm.c **** \r
-1624:.\Generated_Source\PSoC5/cyPm.c **** \r
-1625:.\Generated_Source\PSoC5/cyPm.c ****     /***************************************************************************\r
-1626:.\Generated_Source\PSoC5/cyPm.c ****     * Save boost reference and set it to boost's internal by clearing the bit.\r
-1627:.\Generated_Source\PSoC5/cyPm.c ****     * External (chip bandgap) reference is not available in Sleep and Hibernate.\r
-1628:.\Generated_Source\PSoC5/cyPm.c ****     ***************************************************************************/\r
-1629:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_BOOST_CR2_REG & CY_PM_BOOST_CR2_EREFSEL_EXT))\r
- 214                           .loc 1 1629 0\r
- 215 0104 1148                 ldr     r0, .L5+28\r
-1593:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, 0u);\r
- 216                           .loc 1 1593 0\r
- 217 0106 81F83820             strb    r2, [r1, #56]\r
- 218                           .loc 1 1629 0\r
- 219 010a 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
-1588:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , 0u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 34\r
-\r
-\r
- 220                           .loc 1 1588 0\r
- 221 010c 2E37                 adds    r7, r7, #46\r
- 222                           .loc 1 1629 0\r
- 223 010e 11F00802             ands    r2, r1, #8\r
- 224 0112 08D0                 beq     .L2\r
-1630:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1631:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.boostRefExt = CY_PM_ENABLED;\r
- 225                           .loc 1 1631 0\r
- 226 0114 0121                 movs    r1, #1\r
- 227 0116 83F82E10             strb    r1, [r3, #46]\r
-1632:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_BOOST_CR2_REG &= ((uint8)(~CY_PM_BOOST_CR2_EREFSEL_EXT));\r
- 228                           .loc 1 1632 0\r
- 229 011a 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 230 011c 03F0F702             and     r2, r3, #247\r
- 231 0120 0270                 strb    r2, [r0, #0]\r
- 232 0122 BDE8F08F             pop     {r4, r5, r6, r7, r8, r9, sl, fp, pc}\r
- 233                   .L2:\r
-1633:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1634:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1635:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1636:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.boostRefExt = CY_PM_DISABLED;\r
- 234                           .loc 1 1636 0\r
- 235 0126 83F82E20             strb    r2, [r3, #46]\r
- 236 012a BDE8F08F             pop     {r4, r5, r6, r7, r8, r9, sl, fp, pc}\r
- 237                   .L6:\r
- 238 012e 00BF                 .align  2\r
- 239                   .L5:\r
- 240 0130 00000000             .word   .LANCHOR0\r
- 241 0134 025A0040             .word   1073764866\r
- 242 0138 035A0040             .word   1073764867\r
- 243 013c 335A0040             .word   1073764915\r
- 244 0140 365A0040             .word   1073764918\r
- 245 0144 345A0040             .word   1073764916\r
- 246 0148 385A0040             .word   1073764920\r
- 247 014c 22430040             .word   1073759010\r
- 248 0150 005A0040             .word   1073764864\r
- 249 0154 265A0040             .word   1073764902\r
- 250 0158 285A0040             .word   1073764904\r
- 251 015c 2A5A0040             .word   1073764906\r
- 252 0160 305A0040             .word   1073764912\r
- 253                           .cfi_endproc\r
- 254                   .LFE11:\r
- 255                           .size   CyPmHibSlpSaveSet, .-CyPmHibSlpSaveSet\r
- 256                           .section        .text.CyPmHibSlpRestore,"ax",%progbits\r
- 257                           .align  1\r
- 258                           .thumb\r
- 259                           .thumb_func\r
- 260                           .type   CyPmHibSlpRestore, %function\r
- 261                   CyPmHibSlpRestore:\r
- 262                   .LFB12:\r
-1637:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1638:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1639:.\Generated_Source\PSoC5/cyPm.c **** \r
-1640:.\Generated_Source\PSoC5/cyPm.c **** \r
-1641:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1642:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHibSlpRestore\r
-1643:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 35\r
-\r
-\r
-1644:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1645:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1646:.\Generated_Source\PSoC5/cyPm.c **** *  This API is used for restoring device configurations after wakeup from Sleep\r
-1647:.\Generated_Source\PSoC5/cyPm.c **** *  and Hibernate low power modes:\r
-1648:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores SC/CT routing connections\r
-1649:.\Generated_Source\PSoC5/cyPm.c **** *  - Restores enable state of Serial Wire Viewer (SWV) (PSoC 3)\r
-1650:.\Generated_Source\PSoC5/cyPm.c **** *  - Restore boost reference selection\r
-1651:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1652:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1653:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1654:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1655:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1656:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1657:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1658:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1659:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHibSlpRestore(void) \r
-1660:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 263                           .loc 1 1660 0\r
- 264                           .cfi_startproc\r
- 265                           @ args = 0, pretend = 0, frame = 0\r
- 266                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 267                           @ link register save eliminated.\r
-1661:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore SC/CT routing registers */\r
-1662:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW0 , cyPmBackup.scctData[0u] );\r
- 268                           .loc 1 1662 0\r
- 269 0000 254B                 ldr     r3, .L9\r
- 270 0002 264A                 ldr     r2, .L9+4\r
- 271 0004 597A                 ldrb    r1, [r3, #9]    @ zero_extendqisi2\r
- 272 0006 1170                 strb    r1, [r2, #0]\r
-1663:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW2 , cyPmBackup.scctData[1u] );\r
- 273                           .loc 1 1663 0\r
- 274 0008 987A                 ldrb    r0, [r3, #10]   @ zero_extendqisi2\r
- 275 000a 9070                 strb    r0, [r2, #2]\r
-1664:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW3 , cyPmBackup.scctData[2u] );\r
- 276                           .loc 1 1664 0\r
- 277 000c D97A                 ldrb    r1, [r3, #11]   @ zero_extendqisi2\r
- 278 000e D170                 strb    r1, [r2, #3]\r
-1665:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW4 , cyPmBackup.scctData[3u] );\r
- 279                           .loc 1 1665 0\r
- 280 0010 187B                 ldrb    r0, [r3, #12]   @ zero_extendqisi2\r
- 281 0012 1071                 strb    r0, [r2, #4]\r
-1666:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW6 , cyPmBackup.scctData[4u] );\r
- 282                           .loc 1 1666 0\r
- 283 0014 597B                 ldrb    r1, [r3, #13]   @ zero_extendqisi2\r
- 284 0016 9171                 strb    r1, [r2, #6]\r
-1667:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW8 , cyPmBackup.scctData[5u] );\r
- 285                           .loc 1 1667 0\r
- 286 0018 987B                 ldrb    r0, [r3, #14]   @ zero_extendqisi2\r
- 287 001a 1072                 strb    r0, [r2, #8]\r
-1668:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC0_SW10, cyPmBackup.scctData[6u] );\r
- 288                           .loc 1 1668 0\r
- 289 001c D97B                 ldrb    r1, [r3, #15]   @ zero_extendqisi2\r
- 290 001e 9172                 strb    r1, [r2, #10]\r
-1669:.\Generated_Source\PSoC5/cyPm.c **** \r
-1670:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW0 , cyPmBackup.scctData[7u] );\r
- 291                           .loc 1 1670 0\r
- 292 0020 187C                 ldrb    r0, [r3, #16]   @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 36\r
-\r
-\r
- 293 0022 1074                 strb    r0, [r2, #16]\r
-1671:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW2 , cyPmBackup.scctData[8u] );\r
- 294                           .loc 1 1671 0\r
- 295 0024 597C                 ldrb    r1, [r3, #17]   @ zero_extendqisi2\r
- 296 0026 9174                 strb    r1, [r2, #18]\r
-1672:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW3 , cyPmBackup.scctData[9u] );\r
- 297                           .loc 1 1672 0\r
- 298 0028 987C                 ldrb    r0, [r3, #18]   @ zero_extendqisi2\r
- 299 002a D074                 strb    r0, [r2, #19]\r
-1673:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW4 , cyPmBackup.scctData[10u]);\r
- 300                           .loc 1 1673 0\r
- 301 002c D97C                 ldrb    r1, [r3, #19]   @ zero_extendqisi2\r
- 302 002e 1175                 strb    r1, [r2, #20]\r
-1674:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW6 , cyPmBackup.scctData[11u]);\r
- 303                           .loc 1 1674 0\r
- 304 0030 187D                 ldrb    r0, [r3, #20]   @ zero_extendqisi2\r
- 305 0032 9075                 strb    r0, [r2, #22]\r
-1675:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW8 , cyPmBackup.scctData[12u]);\r
- 306                           .loc 1 1675 0\r
- 307 0034 597D                 ldrb    r1, [r3, #21]   @ zero_extendqisi2\r
- 308 0036 1832                 adds    r2, r2, #24\r
- 309 0038 1170                 strb    r1, [r2, #0]\r
-1676:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC1_SW10, cyPmBackup.scctData[13u]);\r
- 310                           .loc 1 1676 0\r
- 311 003a 987D                 ldrb    r0, [r3, #22]   @ zero_extendqisi2\r
- 312 003c 9070                 strb    r0, [r2, #2]\r
-1677:.\Generated_Source\PSoC5/cyPm.c **** \r
-1678:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW0 , cyPmBackup.scctData[14u]);\r
- 313                           .loc 1 1678 0\r
- 314 003e D97D                 ldrb    r1, [r3, #23]   @ zero_extendqisi2\r
- 315 0040 1172                 strb    r1, [r2, #8]\r
-1679:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW2 , cyPmBackup.scctData[15u]);\r
- 316                           .loc 1 1679 0\r
- 317 0042 187E                 ldrb    r0, [r3, #24]   @ zero_extendqisi2\r
- 318 0044 9072                 strb    r0, [r2, #10]\r
-1680:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW3 , cyPmBackup.scctData[16u]);\r
- 319                           .loc 1 1680 0\r
- 320 0046 597E                 ldrb    r1, [r3, #25]   @ zero_extendqisi2\r
- 321 0048 D172                 strb    r1, [r2, #11]\r
-1681:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW4 , cyPmBackup.scctData[17u]);\r
- 322                           .loc 1 1681 0\r
- 323 004a 987E                 ldrb    r0, [r3, #26]   @ zero_extendqisi2\r
- 324 004c 1073                 strb    r0, [r2, #12]\r
-1682:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW6 , cyPmBackup.scctData[18u]);\r
- 325                           .loc 1 1682 0\r
- 326 004e D97E                 ldrb    r1, [r3, #27]   @ zero_extendqisi2\r
- 327 0050 9173                 strb    r1, [r2, #14]\r
-1683:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW8 , cyPmBackup.scctData[19u]);\r
- 328                           .loc 1 1683 0\r
- 329 0052 187F                 ldrb    r0, [r3, #28]   @ zero_extendqisi2\r
- 330 0054 1074                 strb    r0, [r2, #16]\r
-1684:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC2_SW10, cyPmBackup.scctData[20u]);\r
- 331                           .loc 1 1684 0\r
- 332 0056 597F                 ldrb    r1, [r3, #29]   @ zero_extendqisi2\r
- 333 0058 9174                 strb    r1, [r2, #18]\r
-1685:.\Generated_Source\PSoC5/cyPm.c **** \r
-1686:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW0 , cyPmBackup.scctData[21u]);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 37\r
-\r
-\r
- 334                           .loc 1 1686 0\r
- 335 005a 987F                 ldrb    r0, [r3, #30]   @ zero_extendqisi2\r
- 336 005c 1076                 strb    r0, [r2, #24]\r
-1687:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW2 , cyPmBackup.scctData[22u]);\r
- 337                           .loc 1 1687 0\r
- 338 005e D97F                 ldrb    r1, [r3, #31]   @ zero_extendqisi2\r
- 339 0060 9176                 strb    r1, [r2, #26]\r
-1688:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW3 , cyPmBackup.scctData[23u]);\r
- 340                           .loc 1 1688 0\r
- 341 0062 93F82000             ldrb    r0, [r3, #32]   @ zero_extendqisi2\r
- 342 0066 D076                 strb    r0, [r2, #27]\r
-1689:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW4 , cyPmBackup.scctData[24u]);\r
- 343                           .loc 1 1689 0\r
- 344 0068 93F82110             ldrb    r1, [r3, #33]   @ zero_extendqisi2\r
- 345 006c 1177                 strb    r1, [r2, #28]\r
-1690:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW6 , cyPmBackup.scctData[25u]);\r
- 346                           .loc 1 1690 0\r
- 347 006e 93F82200             ldrb    r0, [r3, #34]   @ zero_extendqisi2\r
- 348 0072 9077                 strb    r0, [r2, #30]\r
-1691:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW8 , cyPmBackup.scctData[26u]);\r
- 349                           .loc 1 1691 0\r
- 350 0074 93F82310             ldrb    r1, [r3, #35]   @ zero_extendqisi2\r
- 351 0078 82F82010             strb    r1, [r2, #32]\r
-1692:.\Generated_Source\PSoC5/cyPm.c ****     CY_SET_REG8(CYREG_SC3_SW10, cyPmBackup.scctData[27u]);\r
- 352                           .loc 1 1692 0\r
- 353 007c 93F82400             ldrb    r0, [r3, #36]   @ zero_extendqisi2\r
- 354 0080 82F82200             strb    r0, [r2, #34]\r
-1693:.\Generated_Source\PSoC5/cyPm.c **** \r
-1694:.\Generated_Source\PSoC5/cyPm.c **** \r
-1695:.\Generated_Source\PSoC5/cyPm.c ****     #if(CY_PSOC3)\r
-1696:.\Generated_Source\PSoC5/cyPm.c **** \r
-1697:.\Generated_Source\PSoC5/cyPm.c ****         /* Serial Wire Viewer (SWV) workaround */\r
-1698:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_ENABLED == cyPmBackup.swvClkEnabled)\r
-1699:.\Generated_Source\PSoC5/cyPm.c ****         {\r
-1700:.\Generated_Source\PSoC5/cyPm.c ****             /* Restore ports drive mode */\r
-1701:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |\r
-1702:.\Generated_Source\PSoC5/cyPm.c ****                                     cyPmBackup.prt1Dm;\r
-1703:.\Generated_Source\PSoC5/cyPm.c **** \r
-1704:.\Generated_Source\PSoC5/cyPm.c ****             /* Enable SWV clocks */\r
-1705:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_MLOGIC_DBG_REG |= CY_PM_MLOGIC_DBG_SWV_CLK_EN;\r
-1706:.\Generated_Source\PSoC5/cyPm.c ****         }\r
-1707:.\Generated_Source\PSoC5/cyPm.c **** \r
-1708:.\Generated_Source\PSoC5/cyPm.c ****     #endif /* (CY_PSOC3) */\r
-1709:.\Generated_Source\PSoC5/cyPm.c **** \r
-1710:.\Generated_Source\PSoC5/cyPm.c **** \r
-1711:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore boost reference */\r
-1712:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.boostRefExt)\r
- 355                           .loc 1 1712 0\r
- 356 0084 93F82E30             ldrb    r3, [r3, #46]   @ zero_extendqisi2\r
- 357 0088 012B                 cmp     r3, #1\r
- 358 008a 04D1                 bne     .L7\r
-1713:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1714:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_BOOST_CR2_REG |= CY_PM_BOOST_CR2_EREFSEL_EXT;\r
- 359                           .loc 1 1714 0\r
- 360 008c 0449                 ldr     r1, .L9+8\r
- 361 008e 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 362 0090 42F00800             orr     r0, r2, #8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 38\r
-\r
-\r
- 363 0094 0870                 strb    r0, [r1, #0]\r
- 364                   .L7:\r
- 365 0096 7047                 bx      lr\r
- 366                   .L10:\r
- 367                           .align  2\r
- 368                   .L9:\r
- 369 0098 00000000             .word   .LANCHOR0\r
- 370 009c 005A0040             .word   1073764864\r
- 371 00a0 22430040             .word   1073759010\r
- 372                           .cfi_endproc\r
- 373                   .LFE12:\r
- 374                           .size   CyPmHibSlpRestore, .-CyPmHibSlpRestore\r
- 375                           .section        .text.CyPmSaveClocks,"ax",%progbits\r
- 376                           .align  1\r
- 377                           .global CyPmSaveClocks\r
- 378                           .thumb\r
- 379                           .thumb_func\r
- 380                           .type   CyPmSaveClocks, %function\r
- 381                   CyPmSaveClocks:\r
- 382                   .LFB0:\r
-  81:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 383                           .loc 1 81 0\r
- 384                           .cfi_startproc\r
- 385                           @ args = 0, pretend = 0, frame = 0\r
- 386                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 387 0000 10B5                 push    {r4, lr}\r
- 388                   .LCFI1:\r
- 389                           .cfi_def_cfa_offset 8\r
- 390                           .cfi_offset 4, -8\r
- 391                           .cfi_offset 14, -4\r
-  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;\r
- 392                           .loc 1 83 0\r
- 393 0002 5E4A                 ldr     r2, .L46\r
- 394 0004 5E4C                 ldr     r4, .L46+4\r
- 395 0006 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 396 0008 03F00F00             and     r0, r3, #15\r
-  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;\r
- 397                           .loc 1 84 0\r
- 398 000c 5D4B                 ldr     r3, .L46+8\r
-  83:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;\r
- 399                           .loc 1 83 0\r
- 400 000e 84F83000             strb    r0, [r4, #48]\r
-  84:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;\r
- 401                           .loc 1 84 0\r
- 402 0012 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 403 0014 84F83110             strb    r1, [r4, #49]\r
-  85:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_A_MASK));\r
- 404                           .loc 1 85 0\r
- 405 0018 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 406 001a 00F0F001             and     r1, r0, #240\r
- 407 001e 1170                 strb    r1, [r2, #0]\r
-  86:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_D_MASK));\r
- 408                           .loc 1 86 0\r
- 409 0020 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 410 0022 0022                 movs    r2, #0\r
- 411 0024 1A70                 strb    r2, [r3, #0]\r
-  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 39\r
-\r
-\r
- 412                           .loc 1 89 0\r
- 413 0026 584B                 ldr     r3, .L46+12\r
- 414 0028 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 415 002a 00F0C001             and     r1, r0, #192\r
-  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
- 416                           .loc 1 90 0\r
- 417 002e 3720                 movs    r0, #55\r
-  89:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;\r
- 418                           .loc 1 89 0\r
- 419 0030 84F83510             strb    r1, [r4, #53]\r
-  90:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
- 420                           .loc 1 90 0\r
- 421 0034 FFF7FEFF             bl      CyFlash_SetWaitCycles\r
- 422                   .LVL0:\r
-  93:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
- 423                           .loc 1 93 0\r
- 424 0038 544B                 ldr     r3, .L46+16\r
- 425 003a 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 426 003c 02F00700             and     r0, r2, #7\r
- 427 0040 84F83300             strb    r0, [r4, #51]\r
-  94:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.imoUsbClk = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_USB;\r
- 428                           .loc 1 94 0\r
- 429 0044 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 430 0046 01F04002             and     r2, r1, #64\r
- 431 004a 84F83420             strb    r2, [r4, #52]\r
-  97:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
- 432                           .loc 1 97 0\r
- 433 004e 1B78                 ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 434 0050 13F01000             ands    r0, r3, #16\r
- 100:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_ENABLED;\r
- 435                           .loc 1 100 0\r
- 436 0054 18BF                 it      ne\r
- 437 0056 0120                 movne   r0, #1\r
- 105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imo2x = CY_PM_DISABLED;\r
- 438                           .loc 1 105 0\r
- 439 0058 84F83900             strb    r0, [r4, #57]\r
- 109:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);\r
- 440                           .loc 1 109 0\r
- 441 005c 0420                 movs    r0, #4\r
- 442 005e FFF7FEFF             bl      CyIMO_SetFreq\r
- 443                   .LVL1:\r
- 112:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG))\r
- 444                           .loc 1 112 0\r
- 445 0062 4B49                 ldr     r1, .L46+20\r
- 446 0064 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 447 0066 4649                 ldr     r1, .L46+4\r
- 448 0068 02F01003             and     r3, r2, #16\r
- 449 006c 1846                 mov     r0, r3\r
- 450 006e 1BB1                 cbz     r3, .L14\r
- 115:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_ENABLED;\r
- 451                           .loc 1 115 0\r
- 452 0070 0120                 movs    r0, #1\r
- 453 0072 81F83600             strb    r0, [r1, #54]\r
- 454 0076 03E0                 b       .L15\r
- 455                   .L14:\r
- 120:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoEnable = CY_PM_DISABLED;\r
- 456                           .loc 1 120 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 40\r
-\r
-\r
- 457 0078 81F83630             strb    r3, [r1, #54]\r
- 123:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
- 458                           .loc 1 123 0\r
- 459 007c FFF7FEFF             bl      CyIMO_Start\r
- 460                   .LVL2:\r
- 461                   .L15:\r
- 127:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_XCLKEN))\r
- 462                           .loc 1 127 0\r
- 463 0080 424A                 ldr     r2, .L46+16\r
- 464 0082 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 465 0084 13F02001             ands    r1, r3, #32\r
- 466 0088 10D0                 beq     .L16\r
- 131:.\Generated_Source\PSoC5/cyPm.c ****             (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_S\r
- 467                           .loc 1 131 0\r
- 468 008a 4FF04022             mov     r2, #1073758208\r
- 469 008e 1378                 ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =\r
- 470                           .loc 1 130 0\r
- 471 0090 03F04001             and     r1, r3, #64\r
- 472 0094 C8B2                 uxtb    r0, r1\r
- 473 0096 3A4B                 ldr     r3, .L46+4\r
- 474 0098 0028                 cmp     r0, #0\r
- 475 009a 14BF                 ite     ne\r
- 476 009c 0122                 movne   r2, #1\r
- 477 009e 0222                 moveq   r2, #2\r
- 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);\r
- 478                           .loc 1 134 0\r
- 479 00a0 0020                 movs    r0, #0\r
- 130:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc =\r
- 480                           .loc 1 130 0\r
- 481 00a2 83F83720             strb    r2, [r3, #55]\r
- 134:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetSource(CY_IMO_SOURCE_IMO);\r
- 482                           .loc 1 134 0\r
- 483 00a6 FFF7FEFF             bl      CyIMO_SetSource\r
- 484                   .LVL3:\r
- 485 00aa 02E0                 b       .L18\r
- 486                   .L16:\r
- 139:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.imoClkSrc = CY_IMO_SOURCE_IMO;\r
- 487                           .loc 1 139 0\r
- 488 00ac 3448                 ldr     r0, .L46+4\r
- 489 00ae 80F83710             strb    r1, [r0, #55]\r
- 490                   .L18:\r
- 143:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkImoSrc = CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK;\r
- 491                           .loc 1 143 0\r
- 492 00b2 4FF04020             mov     r0, #1073758208\r
- 493 00b6 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 494 00b8 314B                 ldr     r3, .L46+4\r
- 495 00ba 01F03002             and     r2, r1, #48\r
- 496 00be 83F83820             strb    r2, [r3, #56]\r
- 146:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_CLKDIST_IMO_OUT_IMO != cyPmClockBackup.clkImoSrc)\r
- 497                           .loc 1 146 0\r
- 498 00c2 1AB1                 cbz     r2, .L19\r
- 149:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
- 499                           .loc 1 149 0\r
- 500 00c4 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 501 00c6 01F0CF02             and     r2, r1, #207\r
- 502 00ca 0270                 strb    r2, [r0, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 41\r
-\r
-\r
- 503                   .L19:\r
- 154:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
- 504                           .loc 1 154 0\r
- 505 00cc 2F48                 ldr     r0, .L46+16\r
- 506 00ce 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 507 00d0 03F01001             and     r1, r3, #16\r
- 508 00d4 CAB2                 uxtb    r2, r1\r
- 509 00d6 0AB1                 cbz     r2, .L20\r
- 156:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_DisableDoubler();\r
- 510                           .loc 1 156 0\r
- 511 00d8 FFF7FEFF             bl      CyIMO_DisableDoubler\r
- 512                   .LVL4:\r
- 513                   .L20:\r
- 160:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkSyncDiv = CY_PM_CLKDIST_MSTR0_REG;\r
- 514                           .loc 1 160 0\r
- 515 00dc 2D48                 ldr     r0, .L46+24\r
- 516 00de 2849                 ldr     r1, .L46+4\r
- 517 00e0 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 518 00e2 81F83A30             strb    r3, [r1, #58]\r
- 161:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)\r
- 519                           .loc 1 161 0\r
- 520 00e6 13B1                 cbz     r3, .L21\r
- 163:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);\r
- 521                           .loc 1 163 0\r
- 522 00e8 0020                 movs    r0, #0\r
- 523 00ea FFF7FEFF             bl      CyMasterClk_SetDivider\r
- 524                   .LVL5:\r
- 525                   .L21:\r
- 167:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;\r
- 526                           .loc 1 167 0\r
- 527 00ee 2A4A                 ldr     r2, .L46+28\r
- 528 00f0 2349                 ldr     r1, .L46+4\r
- 529 00f2 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 530 00f4 00F00303             and     r3, r0, #3\r
- 531 00f8 81F83230             strb    r3, [r1, #50]\r
- 170:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)\r
- 532                           .loc 1 170 0\r
- 533 00fc 13B1                 cbz     r3, .L22\r
- 172:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);\r
- 534                           .loc 1 172 0\r
- 535 00fe 0020                 movs    r0, #0\r
- 536 0100 FFF7FEFF             bl      CyMasterClk_SetSource\r
- 537                   .LVL6:\r
- 538                   .L22:\r
- 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
- 539                           .loc 1 176 0\r
- 540 0104 254A                 ldr     r2, .L46+32\r
- 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
- 541                           .loc 1 177 0\r
- 542 0106 2649                 ldr     r1, .L46+36\r
- 176:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
- 543                           .loc 1 176 0\r
- 544 0108 1078                 ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 545 010a 1D4A                 ldr     r2, .L46+4\r
- 546 010c 0302                 lsls    r3, r0, #8\r
- 547 010e 9387                 strh    r3, [r2, #60]   @ movhi\r
- 177:.\Generated_Source\PSoC5/cyPm.c ****     cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 42\r
-\r
-\r
- 548                           .loc 1 177 0\r
- 549 0110 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 550 0112 0343                 orrs    r3, r3, r0\r
- 551 0114 9387                 strh    r3, [r2, #60]   @ movhi\r
- 178:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_BUS_CLK_DIV_BY_ONE != cyPmClockBackup.clkBusDiv)\r
- 552                           .loc 1 178 0\r
- 553 0116 13B1                 cbz     r3, .L23\r
- 180:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);\r
- 554                           .loc 1 180 0\r
- 555 0118 0020                 movs    r0, #0\r
- 556 011a FFF7FEFF             bl      CyBusClk_SetDivider\r
- 557                   .LVL7:\r
- 558                   .L23:\r
- 184:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);\r
- 559                           .loc 1 184 0\r
- 560 011e 1B4B                 ldr     r3, .L46+16\r
- 561 0120 2048                 ldr     r0, .L46+40\r
- 562 0122 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 563 0124 02F00701             and     r1, r2, #7\r
- 564 0128 405C                 ldrb    r0, [r0, r1]    @ zero_extendqisi2\r
- 565 012a FFF7FEFF             bl      CyFlash_SetWaitCycles\r
- 566                   .LVL8:\r
- 187:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))\r
- 567                           .loc 1 187 0\r
- 568 012e 1E4B                 ldr     r3, .L46+44\r
- 569 0130 1348                 ldr     r0, .L46+4\r
- 570 0132 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 571 0134 12F00101             ands    r1, r2, #1\r
- 572 0138 05D0                 beq     .L24\r
- 190:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_ENABLED;\r
- 573                           .loc 1 190 0\r
- 574 013a 0123                 movs    r3, #1\r
- 575 013c 80F83E30             strb    r3, [r0, #62]\r
- 191:.\Generated_Source\PSoC5/cyPm.c ****         CyPLL_OUT_Stop();\r
- 576                           .loc 1 191 0\r
- 577 0140 FFF7FEFF             bl      CyPLL_OUT_Stop\r
- 578                   .LVL9:\r
- 579 0144 01E0                 b       .L25\r
- 580                   .L24:\r
- 196:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.pllEnableState = CY_PM_DISABLED;\r
- 581                           .loc 1 196 0\r
- 582 0146 80F83E10             strb    r1, [r0, #62]\r
- 583                   .L25:\r
- 200:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))\r
- 584                           .loc 1 200 0\r
- 585 014a 184A                 ldr     r2, .L46+48\r
- 586 014c 0C4B                 ldr     r3, .L46+4\r
- 587 014e 1178                 ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 588 0150 11F00100             ands    r0, r1, #1\r
- 589 0154 05D0                 beq     .L26\r
- 203:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_ENABLED;\r
- 590                           .loc 1 203 0\r
- 591 0156 0122                 movs    r2, #1\r
- 592 0158 83F83F20             strb    r2, [r3, #63]\r
- 204:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_Stop();\r
- 593                           .loc 1 204 0\r
- 594 015c FFF7FEFF             bl      CyXTAL_Stop\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 43\r
-\r
-\r
- 595                   .LVL10:\r
- 596 0160 01E0                 b       .L27\r
- 597                   .L26:\r
- 209:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.xmhzEnableState = CY_PM_DISABLED;\r
- 598                           .loc 1 209 0\r
- 599 0162 83F83F00             strb    r0, [r3, #63]\r
- 600                   .L27:\r
- 218:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))\r
- 601                           .loc 1 218 0\r
- 602 0166 1249                 ldr     r1, .L46+52\r
- 603 0168 054B                 ldr     r3, .L46+4\r
- 604 016a 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 605 016c 10F00402             ands    r2, r0, #4\r
- 220:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_ENABLED;\r
- 606                           .loc 1 220 0\r
- 607 0170 18BF                 it      ne\r
- 608 0172 0122                 movne   r2, #1\r
- 224:.\Generated_Source\PSoC5/cyPm.c ****         cyPmClockBackup.clkDistDelay = CY_PM_DISABLED;\r
- 609                           .loc 1 224 0\r
- 610 0174 83F84020             strb    r2, [r3, #64]\r
- 611 0178 10BD                 pop     {r4, pc}\r
- 612                   .L47:\r
- 613 017a 00BF                 .align  2\r
- 614                   .L46:\r
- 615 017c A1430040             .word   1073759137\r
- 616 0180 00000000             .word   .LANCHOR0\r
- 617 0184 A2430040             .word   1073759138\r
- 618 0188 00480040             .word   1073760256\r
- 619 018c 00420040             .word   1073758720\r
- 620 0190 A0430040             .word   1073759136\r
- 621 0194 04400040             .word   1073758212\r
- 622 0198 05400040             .word   1073758213\r
- 623 019c 07400040             .word   1073758215\r
- 624 01a0 06400040             .word   1073758214\r
- 625 01a4 00000000             .word   .LANCHOR1\r
- 626 01a8 20420040             .word   1073758752\r
- 627 01ac 10420040             .word   1073758736\r
- 628 01b0 0B400040             .word   1073758219\r
- 629                           .cfi_endproc\r
- 630                   .LFE0:\r
- 631                           .size   CyPmSaveClocks, .-CyPmSaveClocks\r
- 632                           .section        .text.CyPmRestoreClocks,"ax",%progbits\r
- 633                           .align  1\r
- 634                           .global CyPmRestoreClocks\r
- 635                           .thumb\r
- 636                           .thumb_func\r
- 637                           .type   CyPmRestoreClocks, %function\r
- 638                   CyPmRestoreClocks:\r
- 639                   .LFB1:\r
- 257:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 640                           .loc 1 257 0\r
- 641                           .cfi_startproc\r
- 642                           @ args = 0, pretend = 0, frame = 8\r
- 643                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 644                   .LVL11:\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 645                           .loc 1 264 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 44\r
-\r
-\r
- 646 0000 774A                 ldr     r2, .L76\r
- 257:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 647                           .loc 1 257 0\r
- 648 0002 13B5                 push    {r0, r1, r4, lr}\r
- 649                   .LCFI2:\r
- 650                           .cfi_def_cfa_offset 16\r
- 651                           .cfi_offset 0, -16\r
- 652                           .cfi_offset 1, -12\r
- 653                           .cfi_offset 4, -8\r
- 654                           .cfi_offset 14, -4\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 655                           .loc 1 264 0\r
- 656 0004 1346                 mov     r3, r2\r
- 657 0006 53F8070F             ldr     r0, [r3, #7]!   @ unaligned\r
- 658 000a 9988                 ldrh    r1, [r3, #4]    @ unaligned\r
- 659 000c 9C79                 ldrb    r4, [r3, #6]    @ zero_extendqisi2\r
- 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
- 660                           .loc 1 269 0\r
- 661 000e 754B                 ldr     r3, .L76+4\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 662                           .loc 1 264 0\r
- 663 0010 0090                 str     r0, [sp, #0]    @ unaligned\r
- 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
- 664                           .loc 1 269 0\r
- 665 0012 93F84000             ldrb    r0, [r3, #64]   @ zero_extendqisi2\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 666                           .loc 1 264 0\r
- 667 0016 ADF80410             strh    r1, [sp, #4]    @ unaligned\r
- 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
- 668                           .loc 1 269 0\r
- 669 001a 0128                 cmp     r0, #1\r
- 264:.\Generated_Source\PSoC5/cyPm.c ****     const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
- 670                           .loc 1 264 0\r
- 671 001c 8DF80640             strb    r4, [sp, #6]\r
- 269:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
- 672                           .loc 1 269 0\r
- 673 0020 0DD1                 bne     .L49\r
- 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);\r
- 674                           .loc 1 273 0\r
- 675 0022 7149                 ldr     r1, .L76+8\r
- 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) \r
- 676                           .loc 1 272 0\r
- 677 0024 4B20                 movs    r0, #75\r
- 273:.\Generated_Source\PSoC5/cyPm.c ****                         CY_PM_GET_CPU_FREQ_MHZ);\r
- 678                           .loc 1 273 0\r
- 679 0026 0C78                 ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
- 680 0028 04F00703             and     r3, r4, #7\r
- 272:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) \r
- 681                           .loc 1 272 0\r
- 682 002c D25C                 ldrb    r2, [r2, r3]    @ zero_extendqisi2\r
- 683 002e 5043                 muls    r0, r2, r0\r
- 684 0030 FFF7FEFF             bl      CyDelayCycles\r
- 685                   .LVL12:\r
- 275:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_DELAY_REG |= CY_PM_CLKDIST_DELAY_EN;\r
- 686                           .loc 1 275 0\r
- 687 0034 6D48                 ldr     r0, .L76+12\r
- 688 0036 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 45\r
-\r
-\r
- 689 0038 41F00404             orr     r4, r1, #4\r
- 690 003c 0470                 strb    r4, [r0, #0]\r
- 691                   .L49:\r
- 279:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)\r
- 692                           .loc 1 279 0\r
- 693 003e 694B                 ldr     r3, .L76+4\r
- 694 0040 93F83F20             ldrb    r2, [r3, #63]   @ zero_extendqisi2\r
- 695 0044 012A                 cmp     r2, #1\r
- 696 0046 09D0                 beq     .L50\r
- 697                   .L53:\r
- 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||\r
- 698                           .loc 1 325 0\r
- 699 0048 664C                 ldr     r4, .L76+4\r
- 322:.\Generated_Source\PSoC5/cyPm.c ****     CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
- 700                           .loc 1 322 0\r
- 701 004a 3720                 movs    r0, #55\r
- 702 004c FFF7FEFF             bl      CyFlash_SetWaitCycles\r
- 703                   .LVL13:\r
- 325:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||\r
- 704                           .loc 1 325 0\r
- 705 0050 94F83220             ldrb    r2, [r4, #50]   @ zero_extendqisi2\r
- 706 0054 911E                 subs    r1, r2, #2\r
- 707 0056 0129                 cmp     r1, #1\r
- 708 0058 25D8                 bhi     .L52\r
- 709 005a 18E0                 b       .L75\r
- 710                   .L50:\r
- 289:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyXTAL_Start(CY_PM_XTAL_MHZ_NO_WAIT);\r
- 711                           .loc 1 289 0\r
- 712 005c 0020                 movs    r0, #0\r
- 713 005e FFF7FEFF             bl      CyXTAL_Start\r
- 714                   .LVL14:\r
- 292:.\Generated_Source\PSoC5/cyPm.c ****         (void) CY_PM_FASTCLK_XMHZ_CSR_REG;\r
- 715                           .loc 1 292 0\r
- 716 0062 6348                 ldr     r0, .L76+16\r
- 717 0064 0524                 movs    r4, #5\r
- 718 0066 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 719                   .LVL15:\r
- 720                   .L54:\r
- 298:.\Generated_Source\PSoC5/cyPm.c ****             CyDelayCycles((uint32)CY_PM_WAIT_200_US * CY_PM_GET_CPU_FREQ_MHZ);\r
- 721                           .loc 1 298 0\r
- 722 0068 5F49                 ldr     r1, .L76+8\r
- 723 006a 5D4A                 ldr     r2, .L76\r
- 724 006c 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 725 006e 03F00700             and     r0, r3, #7\r
- 726 0072 115C                 ldrb    r1, [r2, r0]    @ zero_extendqisi2\r
- 727 0074 C820                 movs    r0, #200\r
- 728 0076 4843                 muls    r0, r1, r0\r
- 729 0078 FFF7FEFF             bl      CyDelayCycles\r
- 730                   .LVL16:\r
- 301:.\Generated_Source\PSoC5/cyPm.c ****             if(0u == (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_XERR))\r
- 731                           .loc 1 301 0\r
- 732 007c 5C4B                 ldr     r3, .L76+16\r
- 733 007e 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 734 0080 0306                 lsls    r3, r0, #24\r
- 735 0082 E1D5                 bpl     .L53\r
- 736 0084 013C                 subs    r4, r4, #1\r
- 737 0086 A4B2                 uxth    r4, r4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 46\r
-\r
-\r
- 295:.\Generated_Source\PSoC5/cyPm.c ****         for(i = CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US; i > 0u; i--)\r
- 738                           .loc 1 295 0\r
- 739 0088 002C                 cmp     r4, #0\r
- 740 008a EDD1                 bne     .L54\r
- 741 008c DCE7                 b       .L53\r
- 742                   .L75:\r
- 329:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
- 743                           .loc 1 329 0\r
- 744 008e 594B                 ldr     r3, .L76+20\r
- 745 0090 94F83A00             ldrb    r0, [r4, #58]   @ zero_extendqisi2\r
- 746 0094 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 747 0096 8242                 cmp     r2, r0\r
- 748 0098 01D0                 beq     .L55\r
- 332:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
- 749                           .loc 1 332 0\r
- 750 009a FFF7FEFF             bl      CyMasterClk_SetDivider\r
- 751                   .LVL17:\r
- 752                   .L55:\r
- 336:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
- 753                           .loc 1 336 0\r
- 754 009e 94F83200             ldrb    r0, [r4, #50]   @ zero_extendqisi2\r
- 755 00a2 FFF7FEFF             bl      CyMasterClk_SetSource\r
- 756                   .LVL18:\r
- 757                   .L52:\r
- 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&\r
- 758                           .loc 1 340 0\r
- 759 00a6 4F48                 ldr     r0, .L76+4\r
- 760 00a8 90F83440             ldrb    r4, [r0, #52]   @ zero_extendqisi2\r
- 761 00ac 04F04001             and     r1, r4, #64\r
- 762 00b0 CBB2                 uxtb    r3, r1\r
- 763 00b2 0446                 mov     r4, r0\r
- 764 00b4 5BB1                 cbz     r3, .L56\r
- 341:.\Generated_Source\PSoC5/cyPm.c ****         (CY_IMO_FREQ_24MHZ == cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]))\r
- 765                           .loc 1 341 0 discriminator 1\r
- 766 00b6 90F83300             ldrb    r0, [r0, #51]   @ zero_extendqisi2\r
- 767 00ba 02AA                 add     r2, sp, #8\r
- 768 00bc 1118                 adds    r1, r2, r0\r
- 340:.\Generated_Source\PSoC5/cyPm.c ****     if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&\r
- 769                           .loc 1 340 0 discriminator 1\r
- 770 00be 11F8083C             ldrb    r3, [r1, #-8]   @ zero_extendqisi2\r
- 771 00c2 032B                 cmp     r3, #3\r
- 772 00c4 03D1                 bne     .L56\r
- 344:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(CY_IMO_FREQ_USB);\r
- 773                           .loc 1 344 0\r
- 774 00c6 0820                 movs    r0, #8\r
- 775 00c8 FFF7FEFF             bl      CyIMO_SetFreq\r
- 776                   .LVL19:\r
- 777 00cc 16E0                 b       .L57\r
- 778                   .L56:\r
- 349:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_SetFreq(cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]);\r
- 779                           .loc 1 349 0\r
- 780 00ce 94F83300             ldrb    r0, [r4, #51]   @ zero_extendqisi2\r
- 781 00d2 02AA                 add     r2, sp, #8\r
- 782 00d4 1118                 adds    r1, r2, r0\r
- 783 00d6 11F8080C             ldrb    r0, [r1, #-8]   @ zero_extendqisi2\r
- 784 00da FFF7FEFF             bl      CyIMO_SetFreq\r
- 785                   .LVL20:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 47\r
-\r
-\r
- 351:.\Generated_Source\PSoC5/cyPm.c ****         if(0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB))\r
- 786                           .loc 1 351 0\r
- 787 00de 94F83440             ldrb    r4, [r4, #52]   @ zero_extendqisi2\r
- 788 00e2 4149                 ldr     r1, .L76+8\r
- 789 00e4 04F04003             and     r3, r4, #64\r
- 790 00e8 D8B2                 uxtb    r0, r3\r
- 791 00ea 18B1                 cbz     r0, .L58\r
- 353:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG |= CY_PM_FASTCLK_IMO_CR_USB;\r
- 792                           .loc 1 353 0\r
- 793 00ec 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 794 00ee 43F04004             orr     r4, r3, #64\r
- 795 00f2 02E0                 b       .L74\r
- 796                   .L58:\r
- 357:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_PM_FASTCLK_IMO_CR_USB));\r
- 797                           .loc 1 357 0\r
- 798 00f4 0A78                 ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 799 00f6 02F0BF04             and     r4, r2, #191\r
- 800                   .L74:\r
- 801 00fa 0C70                 strb    r4, [r1, #0]\r
- 802                   .L57:\r
- 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&\r
- 803                           .loc 1 362 0\r
- 804 00fc 3948                 ldr     r0, .L76+4\r
- 805 00fe 90F83610             ldrb    r1, [r0, #54]   @ zero_extendqisi2\r
- 806 0102 0129                 cmp     r1, #1\r
- 807 0104 07D1                 bne     .L59\r
- 363:.\Generated_Source\PSoC5/cyPm.c ****        (0u == (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
- 808                           .loc 1 363 0 discriminator 1\r
- 809 0106 3C4A                 ldr     r2, .L76+24\r
- 810 0108 1478                 ldrb    r4, [r2, #0]    @ zero_extendqisi2\r
- 362:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&\r
- 811                           .loc 1 362 0 discriminator 1\r
- 812 010a 04F01003             and     r3, r4, #16\r
- 813 010e D8B2                 uxtb    r0, r3\r
- 814 0110 08B9                 cbnz    r0, .L59\r
- 366:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
- 815                           .loc 1 366 0\r
- 816 0112 FFF7FEFF             bl      CyIMO_Start\r
- 817                   .LVL21:\r
- 818                   .L59:\r
- 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&\r
- 819                           .loc 1 370 0\r
- 820 0116 3348                 ldr     r0, .L76+4\r
- 821 0118 90F83610             ldrb    r1, [r0, #54]   @ zero_extendqisi2\r
- 822 011c 39B9                 cbnz    r1, .L60\r
- 371:.\Generated_Source\PSoC5/cyPm.c ****        (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
- 823                           .loc 1 371 0 discriminator 1\r
- 824 011e 364A                 ldr     r2, .L76+24\r
- 825 0120 1478                 ldrb    r4, [r2, #0]    @ zero_extendqisi2\r
- 370:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&\r
- 826                           .loc 1 370 0 discriminator 1\r
- 827 0122 04F01003             and     r3, r4, #16\r
- 828 0126 D8B2                 uxtb    r0, r3\r
- 829 0128 08B1                 cbz     r0, .L60\r
- 373:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_Stop();\r
- 830                           .loc 1 373 0\r
- 831 012a FFF7FEFF             bl      CyIMO_Stop\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 48\r
-\r
-\r
- 832                   .LVL22:\r
- 833                   .L60:\r
- 377:.\Generated_Source\PSoC5/cyPm.c ****     CyIMO_SetSource(cyPmClockBackup.imoClkSrc);\r
- 834                           .loc 1 377 0\r
- 835 012e 2D4C                 ldr     r4, .L76+4\r
- 836 0130 94F83700             ldrb    r0, [r4, #55]   @ zero_extendqisi2\r
- 837 0134 FFF7FEFF             bl      CyIMO_SetSource\r
- 838                   .LVL23:\r
- 380:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.imo2x)\r
- 839                           .loc 1 380 0\r
- 840 0138 94F83910             ldrb    r1, [r4, #57]   @ zero_extendqisi2\r
- 841 013c 0129                 cmp     r1, #1\r
- 842 013e 01D1                 bne     .L61\r
- 382:.\Generated_Source\PSoC5/cyPm.c ****         CyIMO_EnableDoubler();\r
- 843                           .loc 1 382 0\r
- 844 0140 FFF7FEFF             bl      CyIMO_EnableDoubler\r
- 845                   .LVL24:\r
- 846                   .L61:\r
- 386:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkImoSrc != (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK))\r
- 847                           .loc 1 386 0\r
- 848 0144 4FF04023             mov     r3, #1073758208\r
- 849 0148 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 850 014a 94F83820             ldrb    r2, [r4, #56]   @ zero_extendqisi2\r
- 851 014e 00F03004             and     r4, r0, #48\r
- 852 0152 A242                 cmp     r2, r4\r
- 853 0154 04D0                 beq     .L62\r
- 388:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
- 854                           .loc 1 388 0\r
- 855 0156 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 856 0158 21F03000             bic     r0, r1, #48\r
- 857 015c 0243                 orrs    r2, r2, r0\r
- 858 015e 1A70                 strb    r2, [r3, #0]\r
- 859                   .L62:\r
- 393:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)\r
- 860                           .loc 1 393 0\r
- 861 0160 204B                 ldr     r3, .L76+4\r
- 862 0162 93F83E40             ldrb    r4, [r3, #62]   @ zero_extendqisi2\r
- 863 0166 012C                 cmp     r4, #1\r
- 864 0168 0CD1                 bne     .L63\r
- 403:.\Generated_Source\PSoC5/cyPm.c ****         (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);\r
- 865                           .loc 1 403 0\r
- 866 016a 0020                 movs    r0, #0\r
- 867 016c FFF7FEFF             bl      CyPLL_OUT_Start\r
- 868                   .LVL25:\r
- 406:.\Generated_Source\PSoC5/cyPm.c ****         CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);\r
- 869                           .loc 1 406 0\r
- 870 0170 1D49                 ldr     r1, .L76+8\r
- 871 0172 1B4A                 ldr     r2, .L76\r
- 872 0174 0878                 ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 873 0176 00F00703             and     r3, r0, #7\r
- 874 017a D45C                 ldrb    r4, [r2, r3]    @ zero_extendqisi2\r
- 875 017c FA20                 movs    r0, #250\r
- 876 017e 6043                 muls    r0, r4, r0\r
- 877 0180 FFF7FEFF             bl      CyDelayCycles\r
- 878                   .LVL26:\r
- 879                   .L63:\r
- 411:.\Generated_Source\PSoC5/cyPm.c ****     if((CY_PM_MASTER_CLK_SRC_IMO == cyPmClockBackup.masterClkSrc) ||\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 49\r
-\r
-\r
- 880                           .loc 1 411 0\r
- 881 0184 174C                 ldr     r4, .L76+4\r
- 882 0186 94F83210             ldrb    r1, [r4, #50]   @ zero_extendqisi2\r
- 883 018a 0129                 cmp     r1, #1\r
- 884 018c 0BD8                 bhi     .L64\r
- 415:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
- 885                           .loc 1 415 0\r
- 886 018e 1948                 ldr     r0, .L76+20\r
- 887 0190 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 888 0192 94F83A00             ldrb    r0, [r4, #58]   @ zero_extendqisi2\r
- 889 0196 8342                 cmp     r3, r0\r
- 890 0198 01D0                 beq     .L65\r
- 417:.\Generated_Source\PSoC5/cyPm.c ****             CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
- 891                           .loc 1 417 0\r
- 892 019a FFF7FEFF             bl      CyMasterClk_SetDivider\r
- 893                   .LVL27:\r
- 894                   .L65:\r
- 421:.\Generated_Source\PSoC5/cyPm.c ****         CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
- 895                           .loc 1 421 0\r
- 896 019e 94F83200             ldrb    r0, [r4, #50]   @ zero_extendqisi2\r
- 897 01a2 FFF7FEFF             bl      CyMasterClk_SetSource\r
- 898                   .LVL28:\r
- 899                   .L64:\r
- 425:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
- 900                           .loc 1 425 0\r
- 901 01a6 154C                 ldr     r4, .L76+28\r
- 902 01a8 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 903                   .LVL29:\r
- 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
- 904                           .loc 1 426 0\r
- 905 01aa 611E                 subs    r1, r4, #1\r
- 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)\r
- 906                           .loc 1 427 0\r
- 907 01ac 0D4C                 ldr     r4, .L76+4\r
- 426:.\Generated_Source\PSoC5/cyPm.c ****     clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
- 908                           .loc 1 426 0\r
- 909 01ae 0B78                 ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
- 910                   .LVL30:\r
- 427:.\Generated_Source\PSoC5/cyPm.c ****     if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)\r
- 911                           .loc 1 427 0\r
- 912 01b0 A08F                 ldrh    r0, [r4, #60]\r
- 913 01b2 43EA0222             orr     r2, r3, r2, lsl #8\r
- 914                   .LVL31:\r
- 915 01b6 9042                 cmp     r0, r2\r
- 916 01b8 01D0                 beq     .L66\r
- 429:.\Generated_Source\PSoC5/cyPm.c ****         CyBusClk_SetDivider(cyPmClockBackup.clkBusDiv);\r
- 917                           .loc 1 429 0\r
- 918 01ba FFF7FEFF             bl      CyBusClk_SetDivider\r
- 919                   .LVL32:\r
- 920                   .L66:\r
- 433:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_CACHE_CR_REG = ((CY_PM_CACHE_CR_REG & ((uint8)(~CY_PM_CACHE_CR_CYCLES_MASK))) |\r
- 921                           .loc 1 433 0\r
- 922 01be 1048                 ldr     r0, .L76+32\r
- 923 01c0 94F83520             ldrb    r2, [r4, #53]   @ zero_extendqisi2\r
- 924 01c4 0178                 ldrb    r1, [r0, #0]    @ zero_extendqisi2\r
- 925 01c6 01F03F03             and     r3, r1, #63\r
- 926 01ca 1343                 orrs    r3, r3, r2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 50\r
-\r
-\r
- 927 01cc 0370                 strb    r3, [r0, #0]\r
- 437:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG1_REG = cyPmClockBackup.enClkA;\r
- 928                           .loc 1 437 0\r
- 929 01ce 94F83000             ldrb    r0, [r4, #48]   @ zero_extendqisi2\r
- 930 01d2 0C49                 ldr     r1, .L76+36\r
- 931 01d4 0870                 strb    r0, [r1, #0]\r
- 438:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_ACT_CFG2_REG = cyPmClockBackup.enClkD;\r
- 932                           .loc 1 438 0\r
- 933 01d6 94F83130             ldrb    r3, [r4, #49]   @ zero_extendqisi2\r
- 934 01da 4B70                 strb    r3, [r1, #1]\r
- 439:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 935                           .loc 1 439 0\r
- 936 01dc 1CBD                 pop     {r2, r3, r4, pc}\r
- 937                   .L77:\r
- 938 01de 00BF                 .align  2\r
- 939                   .L76:\r
- 940 01e0 00000000             .word   .LANCHOR1\r
- 941 01e4 00000000             .word   .LANCHOR0\r
- 942 01e8 00420040             .word   1073758720\r
- 943 01ec 0B400040             .word   1073758219\r
- 944 01f0 10420040             .word   1073758736\r
- 945 01f4 04400040             .word   1073758212\r
- 946 01f8 A0430040             .word   1073759136\r
- 947 01fc 07400040             .word   1073758215\r
- 948 0200 00480040             .word   1073760256\r
- 949 0204 A1430040             .word   1073759137\r
- 950                           .cfi_endproc\r
- 951                   .LFE1:\r
- 952                           .size   CyPmRestoreClocks, .-CyPmRestoreClocks\r
- 953                           .section        .text.CyPmAltAct,"ax",%progbits\r
- 954                           .align  1\r
- 955                           .global CyPmAltAct\r
- 956                           .thumb\r
- 957                           .thumb_func\r
- 958                           .type   CyPmAltAct, %function\r
- 959                   CyPmAltAct:\r
- 960                   .LFB2:\r
- 584:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 961                           .loc 1 584 0\r
- 962                           .cfi_startproc\r
- 963                           @ args = 0, pretend = 0, frame = 0\r
- 964                           @ frame_needed = 0, uses_anonymous_args = 0\r
- 965                   .LVL33:\r
- 966 0000 30B5                 push    {r4, r5, lr}\r
- 967                   .LCFI3:\r
- 968                           .cfi_def_cfa_offset 12\r
- 969                           .cfi_offset 4, -12\r
- 970                           .cfi_offset 5, -8\r
- 971                           .cfi_offset 14, -4\r
- 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 972                           .loc 1 635 0\r
- 973 0002 124C                 ldr     r4, .L79\r
- 974 0004 124B                 ldr     r3, .L79+4\r
- 975 0006 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 976                           .loc 1 636 0\r
- 977 0008 0809                 lsrs    r0, r1, #4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 51\r
-\r
-\r
- 978                   .LVL34:\r
- 635:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 979                           .loc 1 635 0\r
- 980 000a 1A71                 strb    r2, [r3, #4]\r
- 636:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 981                           .loc 1 636 0\r
- 982 000c 2070                 strb    r0, [r4, #0]\r
- 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 983                           .loc 1 639 0\r
- 984 000e 1148                 ldr     r0, .L79+8\r
- 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 985                           .loc 1 640 0\r
- 986 0010 01F00F02             and     r2, r1, #15\r
- 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 987                           .loc 1 639 0\r
- 988 0014 0578                 ldrb    r5, [r0, #0]    @ zero_extendqisi2\r
- 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 989                           .loc 1 644 0\r
- 990 0016 C1F30031             ubfx    r1, r1, #12, #1\r
- 991                   .LVL35:\r
- 639:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 992                           .loc 1 639 0\r
- 993 001a 5D71                 strb    r5, [r3, #5]\r
- 640:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 994                           .loc 1 640 0\r
- 995 001c 0270                 strb    r2, [r0, #0]\r
- 643:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 996                           .loc 1 643 0\r
- 997 001e 0E4A                 ldr     r2, .L79+12\r
- 998 0020 1578                 ldrb    r5, [r2, #0]    @ zero_extendqisi2\r
- 999 0022 9D71                 strb    r5, [r3, #6]\r
- 644:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 1000                          .loc 1 644 0\r
- 1001 0024 1170                strb    r1, [r2, #0]\r
- 648:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_A\r
- 1002                          .loc 1 648 0\r
- 1003 0026 0D49                ldr     r1, .L79+16\r
- 1004 0028 0D78                ldrb    r5, [r1, #0]    @ zero_extendqisi2\r
- 1005 002a 05F0F805            and     r5, r5, #248\r
- 1006 002e 45F00105            orr     r5, r5, #1\r
- 1007 0032 0D70                strb    r5, [r1, #0]\r
- 651:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
- 1008                          .loc 1 651 0\r
- 1009 0034 0978                ldrb    r1, [r1, #0]    @ zero_extendqisi2\r
- 654:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1010                          .loc 1 654 0\r
- 1011                  @ 654 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1012 0036 00BF                NOP\r
- 1013                  \r
- 1014                  @ 0 "" 2\r
- 655:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1015                          .loc 1 655 0\r
- 1016                  @ 655 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1017 0038 00BF                NOP\r
- 1018                  \r
- 1019                  @ 0 "" 2\r
- 658:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 52\r
-\r
-\r
- 1020                          .loc 1 658 0\r
- 1021                  @ 658 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1022 003a 30BF                WFI \r
- 1023                  \r
- 1024                  @ 0 "" 2\r
- 663:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
- 1025                          .loc 1 663 0\r
- 1026                          .thumb\r
- 1027 003c 1979                ldrb    r1, [r3, #4]    @ zero_extendqisi2\r
- 1028 003e 2170                strb    r1, [r4, #0]\r
- 664:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
- 1029                          .loc 1 664 0\r
- 1030 0040 5979                ldrb    r1, [r3, #5]    @ zero_extendqisi2\r
- 1031 0042 0170                strb    r1, [r0, #0]\r
- 665:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 1032                          .loc 1 665 0\r
- 1033 0044 9B79                ldrb    r3, [r3, #6]    @ zero_extendqisi2\r
- 1034 0046 1370                strb    r3, [r2, #0]\r
- 1035 0048 30BD                pop     {r4, r5, pc}\r
- 1036                  .L80:\r
- 1037 004a 00BF                .align  2\r
- 1038                  .L79:\r
- 1039 004c 98430040            .word   1073759128\r
- 1040 0050 00000000            .word   .LANCHOR0\r
- 1041 0054 99430040            .word   1073759129\r
- 1042 0058 9A430040            .word   1073759130\r
- 1043 005c 93430040            .word   1073759123\r
- 1044                          .cfi_endproc\r
- 1045                  .LFE2:\r
- 1046                          .size   CyPmAltAct, .-CyPmAltAct\r
- 1047                          .section        .text.CyPmSleep,"ax",%progbits\r
- 1048                          .align  1\r
- 1049                          .global CyPmSleep\r
- 1050                          .thumb\r
- 1051                          .thumb_func\r
- 1052                          .type   CyPmSleep, %function\r
- 1053                  CyPmSleep:\r
- 1054                  .LFB3:\r
- 788:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1055                          .loc 1 788 0\r
- 1056                          .cfi_startproc\r
- 1057                          @ args = 0, pretend = 0, frame = 0\r
- 1058                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1059                  .LVL36:\r
- 1060 0000 70B5                push    {r4, r5, r6, lr}\r
- 1061                  .LCFI4:\r
- 1062                          .cfi_def_cfa_offset 16\r
- 1063                          .cfi_offset 4, -16\r
- 1064                          .cfi_offset 5, -12\r
- 1065                          .cfi_offset 6, -8\r
- 1066                          .cfi_offset 14, -4\r
- 788:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1067                          .loc 1 788 0\r
- 1068 0002 0C46                mov     r4, r1\r
- 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 1069                          .loc 1 792 0\r
- 1070 0004 FFF7FEFF            bl      CyEnterCriticalSection\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 53\r
-\r
-\r
- 1071                  .LVL37:\r
- 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
- 1072                          .loc 1 801 0\r
- 1073 0008 2D4B                ldr     r3, .L93\r
- 792:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 1074                          .loc 1 792 0\r
- 1075 000a 0546                mov     r5, r0\r
- 1076                  .LVL38:\r
- 801:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
- 1077                          .loc 1 801 0\r
- 1078 000c 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1079 000e 11F00806            ands    r6, r1, #8\r
- 1080 0012 50D1                bne     .L91\r
- 804:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
- 1081                          .loc 1 804 0\r
- 1082 0014 2B4A                ldr     r2, .L93+4\r
- 1083 0016 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1084                  .LVL39:\r
- 1085 0018 00F01F03            and     r3, r0, #31\r
- 1086 001c 1370                strb    r3, [r2, #0]\r
- 882:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();\r
- 1087                          .loc 1 882 0\r
- 1088 001e FFF7FEFF            bl      CyPmHibSlpSaveSet\r
- 1089                  .LVL40:\r
- 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 1090                          .loc 1 913 0\r
- 1091 0022 294A                ldr     r2, .L93+8\r
- 1092 0024 2948                ldr     r0, .L93+12\r
- 1093 0026 1178                ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 1094                          .loc 1 914 0\r
- 1095 0028 2309                lsrs    r3, r4, #4\r
- 913:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 1096                          .loc 1 913 0\r
- 1097 002a 0171                strb    r1, [r0, #4]\r
- 914:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
- 1098                          .loc 1 914 0\r
- 1099 002c 1370                strb    r3, [r2, #0]\r
- 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 1100                          .loc 1 917 0\r
- 1101 002e 5178                ldrb    r1, [r2, #1]    @ zero_extendqisi2\r
- 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 1102                          .loc 1 918 0\r
- 1103 0030 04F00F03            and     r3, r4, #15\r
- 917:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 1104                          .loc 1 917 0\r
- 1105 0034 4171                strb    r1, [r0, #5]\r
- 918:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
- 1106                          .loc 1 918 0\r
- 1107 0036 5370                strb    r3, [r2, #1]\r
- 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 1108                          .loc 1 921 0\r
- 1109 0038 9178                ldrb    r1, [r2, #2]    @ zero_extendqisi2\r
- 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 1110                          .loc 1 922 0\r
- 1111 003a C4F30034            ubfx    r4, r4, #12, #1\r
- 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 54\r
-\r
-\r
- 1112                          .loc 1 921 0\r
- 1113 003e 8171                strb    r1, [r0, #6]\r
- 922:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
- 1114                          .loc 1 922 0\r
- 1115 0040 9470                strb    r4, [r2, #2]\r
- 921:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 1116                          .loc 1 921 0\r
- 1117 0042 0232                adds    r2, r2, #2\r
- 935:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
- 1118                          .loc 1 935 0\r
- 1119 0044 A2F5CD72            sub     r2, r2, #410\r
- 1120 0048 1378                ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 1121 004a 5907                lsls    r1, r3, #29\r
- 1122 004c 03D1                bne     .L92\r
- 1123                  .L83:\r
- 938:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
- 1124                          .loc 1 938 0\r
- 1125 004e 0122                movs    r2, #1\r
- 1126 0050 80F82D20            strb    r2, [r0, #45]\r
- 1127 0054 0AE0                b       .L85\r
- 1128                  .L92:\r
- 943:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
- 1129                          .loc 1 943 0\r
- 1130 0056 80F82D60            strb    r6, [r0, #45]\r
- 946:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
- 1131                          .loc 1 946 0\r
- 1132 005a 1178                ldrb    r1, [r2, #0]    @ zero_extendqisi2\r
- 1133 005c 01F00703            and     r3, r1, #7\r
- 1134 0060 80F82C30            strb    r3, [r0, #44]\r
- 949:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
- 1135                          .loc 1 949 0\r
- 1136 0064 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1137 0066 00F0F801            and     r1, r0, #248\r
- 1138 006a 1170                strb    r1, [r2, #0]\r
- 1139                  .L85:\r
- 953:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_S\r
- 1140                          .loc 1 953 0\r
- 1141 006c 144B                ldr     r3, .L93\r
- 1142 006e 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1143 0070 00F0F801            and     r1, r0, #248\r
- 1144 0074 41F00302            orr     r2, r1, #3\r
- 1145 0078 1A70                strb    r2, [r3, #0]\r
- 956:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
- 1146                          .loc 1 956 0\r
- 1147 007a 1B78                ldrb    r3, [r3, #0]    @ zero_extendqisi2\r
- 959:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1148                          .loc 1 959 0\r
- 1149                  @ 959 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1150 007c 00BF                NOP\r
- 1151                  \r
- 1152                  @ 0 "" 2\r
- 960:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1153                          .loc 1 960 0\r
- 1154                  @ 960 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1155 007e 00BF                NOP\r
- 1156                  \r
- 1157                  @ 0 "" 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 55\r
-\r
-\r
- 963:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
- 1158                          .loc 1 963 0\r
- 1159                  @ 963 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1160 0080 30BF                WFI \r
- 1161                  \r
- 1162                  @ 0 "" 2\r
- 968:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
- 1163                          .loc 1 968 0\r
- 1164                          .thumb\r
- 1165 0082 1249                ldr     r1, .L93+12\r
- 1166 0084 91F82D30            ldrb    r3, [r1, #45]   @ zero_extendqisi2\r
- 1167 0088 012B                cmp     r3, #1\r
- 1168 008a 08D0                beq     .L86\r
- 970:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ\r
- 1169                          .loc 1 970 0\r
- 1170 008c 104B                ldr     r3, .L93+16\r
- 1171 008e 91F82C10            ldrb    r1, [r1, #44]   @ zero_extendqisi2\r
- 1172 0092 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1173 0094 20F00702            bic     r2, r0, #7\r
- 1174 0098 42EA0100            orr     r0, r2, r1\r
- 1175 009c 1870                strb    r0, [r3, #0]\r
- 1176                  .L86:\r
- 985:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();\r
- 1177                          .loc 1 985 0\r
- 1178 009e FFF7FEFF            bl      CyPmHibSlpRestore\r
- 1179                  .LVL41:\r
-1007:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
- 1180                          .loc 1 1007 0\r
- 1181 00a2 0A4B                ldr     r3, .L93+12\r
- 1182 00a4 084A                ldr     r2, .L93+8\r
- 1183 00a6 1979                ldrb    r1, [r3, #4]    @ zero_extendqisi2\r
- 1184 00a8 1170                strb    r1, [r2, #0]\r
-1008:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
- 1185                          .loc 1 1008 0\r
- 1186 00aa 5879                ldrb    r0, [r3, #5]    @ zero_extendqisi2\r
- 1187 00ac 5070                strb    r0, [r2, #1]\r
-1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 1188                          .loc 1 1009 0\r
- 1189 00ae 9979                ldrb    r1, [r3, #6]    @ zero_extendqisi2\r
- 1190 00b0 084B                ldr     r3, .L93+20\r
-1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
- 1191                          .loc 1 1012 0\r
- 1192 00b2 2846                mov     r0, r5\r
-1009:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 1193                          .loc 1 1009 0\r
- 1194 00b4 1970                strb    r1, [r3, #0]\r
- 1195                  .LVL42:\r
- 1196                  .L91:\r
-1013:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 1197                          .loc 1 1013 0\r
- 1198 00b6 BDE87040            pop     {r4, r5, r6, lr}\r
-1012:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
- 1199                          .loc 1 1012 0\r
- 1200 00ba FFF7FEBF            b       CyExitCriticalSection\r
- 1201                  .LVL43:\r
- 1202                  .L94:\r
- 1203 00be 00BF                .align  2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 56\r
-\r
-\r
- 1204                  .L93:\r
- 1205 00c0 93430040            .word   1073759123\r
- 1206 00c4 83460040            .word   1073759875\r
- 1207 00c8 98430040            .word   1073759128\r
- 1208 00cc 00000000            .word   .LANCHOR0\r
- 1209 00d0 00420040            .word   1073758720\r
- 1210 00d4 9A430040            .word   1073759130\r
- 1211                          .cfi_endproc\r
- 1212                  .LFE3:\r
- 1213                          .size   CyPmSleep, .-CyPmSleep\r
- 1214                          .section        .text.CyPmHibernate,"ax",%progbits\r
- 1215                          .align  1\r
- 1216                          .global CyPmHibernate\r
- 1217                          .thumb\r
- 1218                          .thumb_func\r
- 1219                          .type   CyPmHibernate, %function\r
- 1220                  CyPmHibernate:\r
- 1221                  .LFB4:\r
-1060:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1222                          .loc 1 1060 0\r
- 1223                          .cfi_startproc\r
- 1224                          @ args = 0, pretend = 0, frame = 0\r
- 1225                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1226 0000 38B5                push    {r3, r4, r5, lr}\r
- 1227                  .LCFI5:\r
- 1228                          .cfi_def_cfa_offset 16\r
- 1229                          .cfi_offset 3, -16\r
- 1230                          .cfi_offset 4, -12\r
- 1231                          .cfi_offset 5, -8\r
- 1232                          .cfi_offset 14, -4\r
-1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 1233                          .loc 1 1064 0\r
- 1234 0002 FFF7FEFF            bl      CyEnterCriticalSection\r
- 1235                  .LVL44:\r
-1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
- 1236                          .loc 1 1072 0\r
- 1237 0006 7F4B                ldr     r3, .L125\r
-1064:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 1238                          .loc 1 1064 0\r
- 1239 0008 0546                mov     r5, r0\r
- 1240                  .LVL45:\r
-1072:.\Generated_Source\PSoC5/cyPm.c ****         if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
- 1241                          .loc 1 1072 0\r
- 1242 000a 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1243 000c 01F00802            and     r2, r1, #8\r
- 1244 0010 D3B2                uxtb    r3, r2\r
- 1245 0012 002B                cmp     r3, #0\r
- 1246 0014 40F0F280            bne     .L123\r
-1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
- 1247                          .loc 1 1075 0\r
- 1248 0018 7B48                ldr     r0, .L125+4\r
- 1249                  .LVL46:\r
- 1250                  .LBB10:\r
- 1251                  .LBB11:\r
-1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))\r
- 1252                          .loc 1 1234 0\r
- 1253 001a 7C4B                ldr     r3, .L125+8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 57\r
-\r
-\r
- 1254                  .LBE11:\r
- 1255                  .LBE10:\r
-1075:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
- 1256                          .loc 1 1075 0\r
- 1257 001c 0478                ldrb    r4, [r0, #0]    @ zero_extendqisi2\r
- 1258 001e 04F01F01            and     r1, r4, #31\r
- 1259 0022 0170                strb    r1, [r0, #0]\r
- 1260                  .LBB15:\r
- 1261                  .LBB14:\r
-1234:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))\r
- 1262                          .loc 1 1234 0\r
- 1263 0024 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1264 0026 02F00400            and     r0, r2, #4\r
- 1265 002a C4B2                uxtb    r4, r0\r
- 1266 002c 1CB1                cbz     r4, .L97\r
-1248:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_CR1_REG &= ((uint8)(~CY_PM_PWRSYS_CR1_I2CREG_BACKUP));\r
- 1267                          .loc 1 1248 0\r
- 1268 002e 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1269 0030 01F0FB02            and     r2, r1, #251\r
- 1270 0034 1A70                strb    r2, [r3, #0]\r
- 1271                  .L97:\r
-1253:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.iloPowerMode = CyILO_SetPowerMode(CY_PM_POWERDOWN_MODE);\r
- 1272                          .loc 1 1253 0\r
- 1273 0036 0120                movs    r0, #1\r
- 1274 0038 FFF7FEFF            bl      CyILO_SetPowerMode\r
- 1275                  .LVL47:\r
- 1276 003c 744B                ldr     r3, .L125+12\r
- 1277 003e 1870                strb    r0, [r3, #0]\r
-1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?\r
- 1278                          .loc 1 1256 0\r
- 1279 0040 7448                ldr     r0, .L125+16\r
- 1280 0042 0478                ldrb    r4, [r0, #0]    @ zero_extendqisi2\r
-1257:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;\r
- 1281                          .loc 1 1257 0\r
- 1282 0044 C4F34001            ubfx    r1, r4, #1, #1\r
-1256:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?\r
- 1283                          .loc 1 1256 0\r
- 1284 0048 5970                strb    r1, [r3, #1]\r
-1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?\r
- 1285                          .loc 1 1260 0\r
- 1286 004a 0278                ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
-1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))\r
- 1287                          .loc 1 1265 0\r
- 1288 004c 6E4C                ldr     r4, .L125+4\r
-1261:.\Generated_Source\PSoC5/cyPm.c ****                                 CY_PM_DISABLED : CY_PM_ENABLED;\r
- 1289                          .loc 1 1261 0\r
- 1290 004e C2F38000            ubfx    r0, r2, #2, #1\r
-1260:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?\r
- 1291                          .loc 1 1260 0\r
- 1292 0052 9870                strb    r0, [r3, #2]\r
-1265:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))\r
- 1293                          .loc 1 1265 0\r
- 1294 0054 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1295 0056 11F01002            ands    r2, r1, #16\r
- 1296 005a 05D1                bne     .L98\r
-1268:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_DISABLED;\r
- 1297                          .loc 1 1268 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 58\r
-\r
-\r
- 1298 005c DA70                strb    r2, [r3, #3]\r
-1269:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG |= CY_PM_PWRSYS_SLP_TR_BYPASS;\r
- 1299                          .loc 1 1269 0\r
- 1300 005e 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1301 0060 43F01001            orr     r1, r3, #16\r
- 1302 0064 2170                strb    r1, [r4, #0]\r
- 1303 0066 01E0                b       .L99\r
- 1304                  .L98:\r
-1273:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.slpTrBypass = CY_PM_ENABLED;\r
- 1305                          .loc 1 1273 0\r
- 1306 0068 0120                movs    r0, #1\r
- 1307 006a D870                strb    r0, [r3, #3]\r
- 1308                  .L99:\r
- 1309                  .LBB12:\r
- 1310                  .LBB13:\r
-1715:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1716:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1717:.\Generated_Source\PSoC5/cyPm.c **** \r
-1718:.\Generated_Source\PSoC5/cyPm.c **** \r
-1719:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1720:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHviLviSaveDisable\r
-1721:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1722:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1723:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1724:.\Generated_Source\PSoC5/cyPm.c **** *  Saves analog and digital LVI and HVI configuration and disables them.\r
-1725:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1726:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1727:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1728:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1729:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1730:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1731:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1732:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
-1733:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
-1734:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1735:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1736:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviSaveDisable(void) \r
-1737:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1738:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVID_EN))\r
- 1311                          .loc 1 1738 0\r
- 1312 006c 6A4C                ldr     r4, .L125+20\r
- 1313 006e 684B                ldr     r3, .L125+12\r
- 1314 0070 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 1315 0072 12F00100            ands    r0, r2, #1\r
- 1316 0076 11D0                beq     .L100\r
-1739:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1740:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_ENABLED;\r
- 1317                          .loc 1 1740 0\r
- 1318 0078 0121                movs    r1, #1\r
-1741:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;\r
- 1319                          .loc 1 1741 0\r
- 1320 007a 684C                ldr     r4, .L125+24\r
-1740:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_ENABLED;\r
- 1321                          .loc 1 1740 0\r
- 1322 007c 83F82510            strb    r1, [r3, #37]\r
- 1323                          .loc 1 1741 0\r
- 1324 0080 2278                ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 59\r
-\r
-\r
-1742:.\Generated_Source\PSoC5/cyPm.c **** \r
-1743:.\Generated_Source\PSoC5/cyPm.c ****         /* Save state of reset device at a specified Vddd threshold */\r
-1744:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \\r
- 1325                          .loc 1 1744 0\r
- 1326 0082 6749                ldr     r1, .L125+28\r
-1741:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;\r
- 1327                          .loc 1 1741 0\r
- 1328 0084 02F00F00            and     r0, r2, #15\r
- 1329 0088 83F82600            strb    r0, [r3, #38]\r
- 1330                          .loc 1 1744 0\r
- 1331 008c 0C78                ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
-1745:.\Generated_Source\PSoC5/cyPm.c ****                              CY_PM_DISABLED : CY_PM_ENABLED;\r
- 1332                          .loc 1 1745 0\r
- 1333 008e C4F38012            ubfx    r2, r4, #6, #1\r
-1744:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \\r
- 1334                          .loc 1 1744 0\r
- 1335 0092 83F82A20            strb    r2, [r3, #42]\r
-1746:.\Generated_Source\PSoC5/cyPm.c **** \r
-1747:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvDigitDisable();\r
- 1336                          .loc 1 1747 0\r
- 1337 0096 FFF7FEFF            bl      CyVdLvDigitDisable\r
- 1338                  .LVL48:\r
- 1339 009a 01E0                b       .L101\r
- 1340                  .L100:\r
-1748:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1749:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1750:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1751:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lvidEn = CY_PM_DISABLED;\r
- 1341                          .loc 1 1751 0\r
- 1342 009c 83F82500            strb    r0, [r3, #37]\r
- 1343                  .L101:\r
-1752:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1753:.\Generated_Source\PSoC5/cyPm.c **** \r
-1754:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVIA_EN))\r
- 1344                          .loc 1 1754 0\r
- 1345 00a0 5D4B                ldr     r3, .L125+20\r
- 1346 00a2 5B4C                ldr     r4, .L125+12\r
- 1347 00a4 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1348 00a6 10F00201            ands    r1, r0, #2\r
- 1349 00aa 0FD0                beq     .L102\r
-1755:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1756:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_ENABLED;\r
- 1350                          .loc 1 1756 0\r
- 1351 00ac 0122                movs    r2, #1\r
-1757:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;\r
- 1352                          .loc 1 1757 0\r
- 1353 00ae 5B4B                ldr     r3, .L125+24\r
-1756:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_ENABLED;\r
- 1354                          .loc 1 1756 0\r
- 1355 00b0 84F82720            strb    r2, [r4, #39]\r
- 1356                          .loc 1 1757 0\r
- 1357 00b4 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-1758:.\Generated_Source\PSoC5/cyPm.c **** \r
-1759:.\Generated_Source\PSoC5/cyPm.c ****         /* Save state of reset device at a specified Vdda threshold */\r
-1760:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \\r
- 1358                          .loc 1 1760 0\r
- 1359 00b6 5A4A                ldr     r2, .L125+28\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 60\r
-\r
-\r
-1757:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;\r
- 1360                          .loc 1 1757 0\r
- 1361 00b8 0109                lsrs    r1, r0, #4\r
- 1362 00ba 84F82810            strb    r1, [r4, #40]\r
- 1363                          .loc 1 1760 0\r
- 1364 00be 1378                ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
-1761:.\Generated_Source\PSoC5/cyPm.c ****                              CY_PM_DISABLED : CY_PM_ENABLED;\r
- 1365                          .loc 1 1761 0\r
- 1366 00c0 D809                lsrs    r0, r3, #7\r
-1760:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \\r
- 1367                          .loc 1 1760 0\r
- 1368 00c2 84F82B00            strb    r0, [r4, #43]\r
-1762:.\Generated_Source\PSoC5/cyPm.c **** \r
-1763:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvAnalogDisable();\r
- 1369                          .loc 1 1763 0\r
- 1370 00c6 FFF7FEFF            bl      CyVdLvAnalogDisable\r
- 1371                  .LVL49:\r
- 1372 00ca 01E0                b       .L103\r
- 1373                  .L102:\r
-1764:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1765:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1766:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1767:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.lviaEn = CY_PM_DISABLED;\r
- 1374                          .loc 1 1767 0\r
- 1375 00cc 84F82710            strb    r1, [r4, #39]\r
- 1376                  .L103:\r
-1768:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1769:.\Generated_Source\PSoC5/cyPm.c **** \r
-1770:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_HVIA_EN))\r
- 1377                          .loc 1 1770 0\r
- 1378 00d0 514C                ldr     r4, .L125+20\r
- 1379 00d2 4F4B                ldr     r3, .L125+12\r
- 1380 00d4 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1381 00d6 11F00402            ands    r2, r1, #4\r
- 1382 00da 05D0                beq     .L104\r
-1771:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1772:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.hviaEn = CY_PM_ENABLED;\r
- 1383                          .loc 1 1772 0\r
- 1384 00dc 0120                movs    r0, #1\r
- 1385 00de 83F82900            strb    r0, [r3, #41]\r
-1773:.\Generated_Source\PSoC5/cyPm.c ****         CyVdHvAnalogDisable();\r
- 1386                          .loc 1 1773 0\r
- 1387 00e2 FFF7FEFF            bl      CyVdHvAnalogDisable\r
- 1388                  .LVL50:\r
- 1389 00e6 01E0                b       .L105\r
- 1390                  .L104:\r
-1774:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1775:.\Generated_Source\PSoC5/cyPm.c ****     else\r
-1776:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1777:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.hviaEn = CY_PM_DISABLED;\r
- 1391                          .loc 1 1777 0\r
- 1392 00e8 83F82920            strb    r2, [r3, #41]\r
- 1393                  .L105:\r
- 1394                  .LBE13:\r
- 1395                  .LBE12:\r
-1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;\r
- 1396                          .loc 1 1294 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 61\r
-\r
-\r
- 1397 00ec 4D4C                ldr     r4, .L125+32\r
-1288:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpSaveSet();\r
- 1398                          .loc 1 1288 0\r
- 1399 00ee FFF7FEFF            bl      CyPmHibSlpSaveSet\r
- 1400                  .LVL51:\r
-1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;\r
- 1401                          .loc 1 1294 0\r
- 1402 00f2 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1403 00f4 464B                ldr     r3, .L125+12\r
-1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;\r
- 1404                          .loc 1 1295 0\r
- 1405 00f6 4C4A                ldr     r2, .L125+36\r
-1294:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;\r
- 1406                          .loc 1 1294 0\r
- 1407 00f8 D971                strb    r1, [r3, #7]\r
-1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;\r
- 1408                          .loc 1 1295 0\r
- 1409 00fa 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
-1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;\r
- 1410                          .loc 1 1297 0\r
- 1411 00fc FF21                movs    r1, #255\r
-1295:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;\r
- 1412                          .loc 1 1295 0\r
- 1413 00fe 1872                strb    r0, [r3, #8]\r
-1297:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;\r
- 1414                          .loc 1 1297 0\r
- 1415 0100 2170                strb    r1, [r4, #0]\r
-1298:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = CY_PM_PWRSYS_WAKE_TR1;\r
- 1416                          .loc 1 1298 0\r
- 1417 0102 B024                movs    r4, #176\r
- 1418 0104 1470                strb    r4, [r2, #0]\r
- 1419                  .LBE14:\r
- 1420                  .LBE15:\r
-1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 1421                          .loc 1 1091 0\r
- 1422 0106 494A                ldr     r2, .L125+40\r
-1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;\r
- 1423                          .loc 1 1092 0\r
- 1424 0108 0421                movs    r1, #4\r
-1091:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
- 1425                          .loc 1 1091 0\r
- 1426 010a 1078                ldrb    r0, [r2, #0]    @ zero_extendqisi2\r
- 1427 010c 1871                strb    r0, [r3, #4]\r
-1092:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;\r
- 1428                          .loc 1 1092 0\r
- 1429 010e 1170                strb    r1, [r2, #0]\r
-1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 1430                          .loc 1 1094 0\r
- 1431 0110 5478                ldrb    r4, [r2, #1]    @ zero_extendqisi2\r
-1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;\r
- 1432                          .loc 1 1095 0\r
- 1433 0112 0021                movs    r1, #0\r
-1094:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
- 1434                          .loc 1 1094 0\r
- 1435 0114 5C71                strb    r4, [r3, #5]\r
-1095:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = 0x00u;\r
- 1436                          .loc 1 1095 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 62\r
-\r
-\r
- 1437 0116 5170                strb    r1, [r2, #1]\r
-1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 1438                          .loc 1 1097 0\r
- 1439 0118 9078                ldrb    r0, [r2, #2]    @ zero_extendqisi2\r
- 1440 011a 9871                strb    r0, [r3, #6]\r
-1098:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = 0x00u;\r
- 1441                          .loc 1 1098 0\r
- 1442 011c 9170                strb    r1, [r2, #2]\r
-1097:.\Generated_Source\PSoC5/cyPm.c ****     cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
- 1443                          .loc 1 1097 0\r
- 1444 011e 0232                adds    r2, r2, #2\r
-1102:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
- 1445                          .loc 1 1102 0\r
- 1446 0120 A2F5CD74            sub     r4, r2, #410\r
- 1447 0124 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 1448 0126 4007                lsls    r0, r0, #29\r
- 1449 0128 03D1                bne     .L124\r
- 1450                  .L106:\r
-1105:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
- 1451                          .loc 1 1105 0\r
- 1452 012a 0124                movs    r4, #1\r
- 1453 012c 83F82D40            strb    r4, [r3, #45]\r
- 1454 0130 0AE0                b       .L108\r
- 1455                  .L124:\r
-1110:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
- 1456                          .loc 1 1110 0\r
- 1457 0132 83F82D10            strb    r1, [r3, #45]\r
-1113:.\Generated_Source\PSoC5/cyPm.c ****         cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
- 1458                          .loc 1 1113 0\r
- 1459 0136 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1460 0138 01F00702            and     r2, r1, #7\r
- 1461 013c 83F82C20            strb    r2, [r3, #44]\r
-1116:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
- 1462                          .loc 1 1116 0\r
- 1463 0140 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1464 0142 03F0F800            and     r0, r3, #248\r
- 1465 0146 2070                strb    r0, [r4, #0]\r
- 1466                  .L108:\r
-1121:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_MODE_CSR_REG = (CY_PM_MODE_CSR_REG & ((uint8) (~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_H\r
- 1467                          .loc 1 1121 0\r
- 1468 0148 2E49                ldr     r1, .L125\r
- 1469 014a 0A78                ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 1470 014c 02F0F803            and     r3, r2, #248\r
- 1471 0150 43F00400            orr     r0, r3, #4\r
- 1472 0154 0870                strb    r0, [r1, #0]\r
-1124:.\Generated_Source\PSoC5/cyPm.c ****     (void) CY_PM_MODE_CSR_REG;\r
- 1473                          .loc 1 1124 0\r
- 1474 0156 0B78                ldrb    r3, [r1, #0]    @ zero_extendqisi2\r
-1127:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1475                          .loc 1 1127 0\r
- 1476                  @ 1127 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1477 0158 00BF                NOP\r
- 1478                  \r
- 1479                  @ 0 "" 2\r
-1128:.\Generated_Source\PSoC5/cyPm.c ****     CY_NOP;\r
- 1480                          .loc 1 1128 0\r
- 1481                  @ 1128 ".\Generated_Source\PSoC5\cyPm.c" 1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 63\r
-\r
-\r
- 1482 015a 00BF                NOP\r
- 1483                  \r
- 1484                  @ 0 "" 2\r
-1131:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WFI;\r
- 1485                          .loc 1 1131 0\r
- 1486                  @ 1131 ".\Generated_Source\PSoC5\cyPm.c" 1\r
- 1487 015c 30BF                WFI \r
- 1488                  \r
- 1489                  @ 0 "" 2\r
-1138:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
- 1490                          .loc 1 1138 0\r
- 1491                          .thumb\r
- 1492 015e 2C4C                ldr     r4, .L125+12\r
- 1493 0160 94F82D10            ldrb    r1, [r4, #45]   @ zero_extendqisi2\r
- 1494 0164 0129                cmp     r1, #1\r
- 1495 0166 07D0                beq     .L109\r
-1140:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ\r
- 1496                          .loc 1 1140 0\r
- 1497 0168 314A                ldr     r2, .L125+44\r
- 1498 016a 94F82C00            ldrb    r0, [r4, #44]   @ zero_extendqisi2\r
- 1499 016e 1378                ldrb    r3, [r2, #0]    @ zero_extendqisi2\r
- 1500 0170 23F00701            bic     r1, r3, #7\r
- 1501 0174 0143                orrs    r1, r1, r0\r
- 1502 0176 1170                strb    r1, [r2, #0]\r
- 1503                  .L109:\r
- 1504                  .LBB16:\r
- 1505                  .LBB17:\r
- 1506                  .LBB18:\r
- 1507                  .LBB19:\r
-1778:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1779:.\Generated_Source\PSoC5/cyPm.c **** }\r
-1780:.\Generated_Source\PSoC5/cyPm.c **** \r
-1781:.\Generated_Source\PSoC5/cyPm.c **** \r
-1782:.\Generated_Source\PSoC5/cyPm.c **** /*******************************************************************************\r
-1783:.\Generated_Source\PSoC5/cyPm.c **** * Function Name: CyPmHviLviRestore\r
-1784:.\Generated_Source\PSoC5/cyPm.c **** ********************************************************************************\r
-1785:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1786:.\Generated_Source\PSoC5/cyPm.c **** * Summary:\r
-1787:.\Generated_Source\PSoC5/cyPm.c **** *  Restores analog and digital LVI and HVI configuration.\r
-1788:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1789:.\Generated_Source\PSoC5/cyPm.c **** * Parameters:\r
-1790:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1791:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1792:.\Generated_Source\PSoC5/cyPm.c **** * Return:\r
-1793:.\Generated_Source\PSoC5/cyPm.c **** *  None\r
-1794:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1795:.\Generated_Source\PSoC5/cyPm.c **** * Reentrant:\r
-1796:.\Generated_Source\PSoC5/cyPm.c **** *  No\r
-1797:.\Generated_Source\PSoC5/cyPm.c **** *\r
-1798:.\Generated_Source\PSoC5/cyPm.c **** *******************************************************************************/\r
-1799:.\Generated_Source\PSoC5/cyPm.c **** static void CyPmHviLviRestore(void) \r
-1800:.\Generated_Source\PSoC5/cyPm.c **** {\r
-1801:.\Generated_Source\PSoC5/cyPm.c ****     /* Restore LVI/HVI configuration */\r
-1802:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.lvidEn)\r
- 1508                          .loc 1 1802 0\r
- 1509 0178 94F82540            ldrb    r4, [r4, #37]   @ zero_extendqisi2\r
- 1510 017c 244B                ldr     r3, .L125+12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 64\r
-\r
-\r
- 1511 017e 012C                cmp     r4, #1\r
- 1512 0180 05D1                bne     .L110\r
-1803:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1804:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvDigitEnable(cyPmBackup.lvidRst, cyPmBackup.lvidTrip);\r
- 1513                          .loc 1 1804 0\r
- 1514 0182 93F82A00            ldrb    r0, [r3, #42]   @ zero_extendqisi2\r
- 1515 0186 93F82610            ldrb    r1, [r3, #38]   @ zero_extendqisi2\r
- 1516 018a FFF7FEFF            bl      CyVdLvDigitEnable\r
- 1517                  .LVL52:\r
- 1518                  .L110:\r
-1805:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1806:.\Generated_Source\PSoC5/cyPm.c **** \r
-1807:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.lviaEn)\r
- 1519                          .loc 1 1807 0\r
- 1520 018e 204C                ldr     r4, .L125+12\r
- 1521 0190 94F82720            ldrb    r2, [r4, #39]   @ zero_extendqisi2\r
- 1522 0194 012A                cmp     r2, #1\r
- 1523 0196 05D1                bne     .L111\r
-1808:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1809:.\Generated_Source\PSoC5/cyPm.c ****         CyVdLvAnalogEnable(cyPmBackup.lviaRst, cyPmBackup.lviaTrip);\r
- 1524                          .loc 1 1809 0\r
- 1525 0198 94F82B00            ldrb    r0, [r4, #43]   @ zero_extendqisi2\r
- 1526 019c 94F82810            ldrb    r1, [r4, #40]   @ zero_extendqisi2\r
- 1527 01a0 FFF7FEFF            bl      CyVdLvAnalogEnable\r
- 1528                  .LVL53:\r
- 1529                  .L111:\r
-1810:.\Generated_Source\PSoC5/cyPm.c ****     }\r
-1811:.\Generated_Source\PSoC5/cyPm.c **** \r
-1812:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.hviaEn)\r
- 1530                          .loc 1 1812 0\r
- 1531 01a4 94F82910            ldrb    r1, [r4, #41]   @ zero_extendqisi2\r
- 1532 01a8 0129                cmp     r1, #1\r
- 1533 01aa 01D1                bne     .L112\r
-1813:.\Generated_Source\PSoC5/cyPm.c ****     {\r
-1814:.\Generated_Source\PSoC5/cyPm.c ****         CyVdHvAnalogEnable();\r
- 1534                          .loc 1 1814 0\r
- 1535 01ac FFF7FEFF            bl      CyVdHvAnalogEnable\r
- 1536                  .LVL54:\r
- 1537                  .L112:\r
- 1538                  .LBE19:\r
- 1539                  .LBE18:\r
-1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)\r
- 1540                          .loc 1 1330 0\r
- 1541 01b0 174C                ldr     r4, .L125+12\r
-1327:.\Generated_Source\PSoC5/cyPm.c ****     CyPmHibSlpRestore();\r
- 1542                          .loc 1 1327 0\r
- 1543 01b2 FFF7FEFF            bl      CyPmHibSlpRestore\r
- 1544                  .LVL55:\r
-1330:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)\r
- 1545                          .loc 1 1330 0\r
- 1546 01b6 6078                ldrb    r0, [r4, #1]    @ zero_extendqisi2\r
- 1547 01b8 0128                cmp     r0, #1\r
- 1548 01ba 01D1                bne     .L113\r
-1333:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start1K();\r
- 1549                          .loc 1 1333 0\r
- 1550 01bc FFF7FEFF            bl      CyILO_Start1K\r
- 1551                  .LVL56:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 65\r
-\r
-\r
- 1552                  .L113:\r
-1337:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_ENABLED == cyPmBackup.ilo100kEnable)\r
- 1553                          .loc 1 1337 0\r
- 1554 01c0 A378                ldrb    r3, [r4, #2]    @ zero_extendqisi2\r
- 1555 01c2 012B                cmp     r3, #1\r
- 1556 01c4 01D1                bne     .L114\r
-1340:.\Generated_Source\PSoC5/cyPm.c ****         CyILO_Start100K();\r
- 1557                          .loc 1 1340 0\r
- 1558 01c6 FFF7FEFF            bl      CyILO_Start100K\r
- 1559                  .LVL57:\r
- 1560                  .L114:\r
-1344:.\Generated_Source\PSoC5/cyPm.c ****     (void) CyILO_SetPowerMode(cyPmBackup.iloPowerMode);\r
- 1561                          .loc 1 1344 0\r
- 1562 01ca 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 1563 01cc FFF7FEFF            bl      CyILO_SetPowerMode\r
- 1564                  .LVL58:\r
-1347:.\Generated_Source\PSoC5/cyPm.c ****     if(CY_PM_DISABLED == cyPmBackup.slpTrBypass)\r
- 1565                          .loc 1 1347 0\r
- 1566 01d0 E278                ldrb    r2, [r4, #3]    @ zero_extendqisi2\r
- 1567 01d2 22B9                cbnz    r2, .L115\r
-1350:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_PWRSYS_SLP_TR_REG &= ((uint8)(~CY_PM_PWRSYS_SLP_TR_BYPASS));\r
- 1568                          .loc 1 1350 0\r
- 1569 01d4 0C49                ldr     r1, .L125+4\r
- 1570 01d6 0878                ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 1571 01d8 00F0EF03            and     r3, r0, #239\r
- 1572 01dc 0B70                strb    r3, [r1, #0]\r
- 1573                  .L115:\r
-1357:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;\r
- 1574                          .loc 1 1357 0\r
- 1575 01de 0C48                ldr     r0, .L125+12\r
- 1576 01e0 104A                ldr     r2, .L125+32\r
- 1577 01e2 C179                ldrb    r1, [r0, #7]    @ zero_extendqisi2\r
- 1578 01e4 1170                strb    r1, [r2, #0]\r
-1358:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;\r
- 1579                          .loc 1 1358 0\r
- 1580 01e6 037A                ldrb    r3, [r0, #8]    @ zero_extendqisi2\r
- 1581 01e8 5370                strb    r3, [r2, #1]\r
- 1582                  .LBE17:\r
- 1583                  .LBE16:\r
-1149:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
- 1584                          .loc 1 1149 0\r
- 1585 01ea 0179                ldrb    r1, [r0, #4]    @ zero_extendqisi2\r
- 1586 01ec 0F4A                ldr     r2, .L125+40\r
- 1587 01ee 1170                strb    r1, [r2, #0]\r
-1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
- 1588                          .loc 1 1150 0\r
- 1589 01f0 4379                ldrb    r3, [r0, #5]    @ zero_extendqisi2\r
-1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 1590                          .loc 1 1151 0\r
- 1591 01f2 1049                ldr     r1, .L125+48\r
-1150:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
- 1592                          .loc 1 1150 0\r
- 1593 01f4 5370                strb    r3, [r2, #1]\r
-1151:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
- 1594                          .loc 1 1151 0\r
- 1595 01f6 8079                ldrb    r0, [r0, #6]    @ zero_extendqisi2\r
- 1596 01f8 0870                strb    r0, [r1, #0]\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 66\r
-\r
-\r
-1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
- 1597                          .loc 1 1154 0\r
- 1598 01fa 2846                mov     r0, r5\r
- 1599                  .LVL59:\r
- 1600                  .L123:\r
-1155:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 1601                          .loc 1 1155 0\r
- 1602 01fc BDE83840            pop     {r3, r4, r5, lr}\r
-1154:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
- 1603                          .loc 1 1154 0\r
- 1604 0200 FFF7FEBF            b       CyExitCriticalSection\r
- 1605                  .LVL60:\r
- 1606                  .L126:\r
- 1607                          .align  2\r
- 1608                  .L125:\r
- 1609 0204 93430040            .word   1073759123\r
- 1610 0208 83460040            .word   1073759875\r
- 1611 020c 31430040            .word   1073759025\r
- 1612 0210 00000000            .word   .LANCHOR0\r
- 1613 0214 00430040            .word   1073758976\r
- 1614 0218 F5460040            .word   1073759989\r
- 1615 021c F4460040            .word   1073759988\r
- 1616 0220 F7460040            .word   1073759991\r
- 1617 0224 85460040            .word   1073759877\r
- 1618 0228 86460040            .word   1073759878\r
- 1619 022c 98430040            .word   1073759128\r
- 1620 0230 00420040            .word   1073758720\r
- 1621 0234 9A430040            .word   1073759130\r
- 1622                          .cfi_endproc\r
- 1623                  .LFE4:\r
- 1624                          .size   CyPmHibernate, .-CyPmHibernate\r
- 1625                          .section        .text.CyPmReadStatus,"ax",%progbits\r
- 1626                          .align  1\r
- 1627                          .global CyPmReadStatus\r
- 1628                          .thumb\r
- 1629                          .thumb_func\r
- 1630                          .type   CyPmReadStatus, %function\r
- 1631                  CyPmReadStatus:\r
- 1632                  .LFB5:\r
-1188:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1633                          .loc 1 1188 0\r
- 1634                          .cfi_startproc\r
- 1635                          @ args = 0, pretend = 0, frame = 0\r
- 1636                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1637                  .LVL61:\r
- 1638 0000 38B5                push    {r3, r4, r5, lr}\r
- 1639                  .LCFI6:\r
- 1640                          .cfi_def_cfa_offset 16\r
- 1641                          .cfi_offset 3, -16\r
- 1642                          .cfi_offset 4, -12\r
- 1643                          .cfi_offset 5, -8\r
- 1644                          .cfi_offset 14, -4\r
-1188:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1645                          .loc 1 1188 0\r
- 1646 0002 0546                mov     r5, r0\r
-1194:.\Generated_Source\PSoC5/cyPm.c ****     interruptState = CyEnterCriticalSection();\r
- 1647                          .loc 1 1194 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 67\r
-\r
-\r
- 1648 0004 FFF7FEFF            bl      CyEnterCriticalSection\r
- 1649                  .LVL62:\r
-1197:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus |= CY_PM_INT_SR_REG;\r
- 1650                          .loc 1 1197 0\r
- 1651 0008 0649                ldr     r1, .L128\r
- 1652 000a 074B                ldr     r3, .L128+4\r
- 1653 000c 91F84220            ldrb    r2, [r1, #66]   @ zero_extendqisi2\r
- 1654 0010 1C78                ldrb    r4, [r3, #0]    @ zero_extendqisi2\r
- 1655 0012 1443                orrs    r4, r4, r2\r
- 1656                  .LVL63:\r
-1199:.\Generated_Source\PSoC5/cyPm.c ****     interruptStatus &= ((uint8)(~mask));\r
- 1657                          .loc 1 1199 0\r
- 1658 0014 24EA0505            bic     r5, r4, r5\r
- 1659 0018 81F84250            strb    r5, [r1, #66]\r
-1202:.\Generated_Source\PSoC5/cyPm.c ****     CyExitCriticalSection(interruptState);\r
- 1660                          .loc 1 1202 0\r
- 1661 001c FFF7FEFF            bl      CyExitCriticalSection\r
- 1662                  .LVL64:\r
-1205:.\Generated_Source\PSoC5/cyPm.c **** }\r
- 1663                          .loc 1 1205 0\r
- 1664 0020 2046                mov     r0, r4\r
- 1665 0022 38BD                pop     {r3, r4, r5, pc}\r
- 1666                  .L129:\r
- 1667                          .align  2\r
- 1668                  .L128:\r
- 1669 0024 00000000            .word   .LANCHOR0\r
- 1670 0028 90430040            .word   1073759120\r
- 1671                          .cfi_endproc\r
- 1672                  .LFE5:\r
- 1673                          .size   CyPmReadStatus, .-CyPmReadStatus\r
- 1674                          .section        .text.CyPmCtwSetInterval,"ax",%progbits\r
- 1675                          .align  1\r
- 1676                          .global CyPmCtwSetInterval\r
- 1677                          .thumb\r
- 1678                          .thumb_func\r
- 1679                          .type   CyPmCtwSetInterval, %function\r
- 1680                  CyPmCtwSetInterval:\r
- 1681                  .LFB8:\r
-1383:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1682                          .loc 1 1383 0\r
- 1683                          .cfi_startproc\r
- 1684                          @ args = 0, pretend = 0, frame = 0\r
- 1685                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1686                  .LVL65:\r
- 1687 0000 38B5                push    {r3, r4, r5, lr}\r
- 1688                  .LCFI7:\r
- 1689                          .cfi_def_cfa_offset 16\r
- 1690                          .cfi_offset 3, -16\r
- 1691                          .cfi_offset 4, -12\r
- 1692                          .cfi_offset 5, -8\r
- 1693                          .cfi_offset 14, -4\r
-1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));\r
- 1694                          .loc 1 1385 0\r
- 1695 0002 124C                ldr     r4, .L134\r
-1383:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1696                          .loc 1 1383 0\r
- 1697 0004 0546                mov     r5, r0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 68\r
-\r
-\r
-1385:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));\r
- 1698                          .loc 1 1385 0\r
- 1699 0006 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1700 0008 03F0F700            and     r0, r3, #247\r
- 1701                  .LVL66:\r
- 1702 000c 2070                strb    r0, [r4, #0]\r
-1388:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start1K();\r
- 1703                          .loc 1 1388 0\r
- 1704 000e FFF7FEFF            bl      CyILO_Start1K\r
- 1705                  .LVL67:\r
-1391:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_CTW_EN))\r
- 1706                          .loc 1 1391 0\r
- 1707 0012 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1708 0014 0E4B                ldr     r3, .L134+4\r
- 1709 0016 01F00402            and     r2, r1, #4\r
- 1710 001a D0B2                uxtb    r0, r2\r
- 1711 001c 60B1                cbz     r0, .L131\r
-1394:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)\r
- 1712                          .loc 1 1394 0\r
- 1713 001e 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1714 0020 AA42                cmp     r2, r5\r
- 1715 0022 11D0                beq     .L130\r
-1397:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_EN));\r
- 1716                          .loc 1 1397 0\r
- 1717 0024 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1718 0026 01F0FB00            and     r0, r1, #251\r
- 1719 002a 2070                strb    r0, [r4, #0]\r
-1398:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;\r
- 1720                          .loc 1 1398 0\r
- 1721 002c 1D70                strb    r5, [r3, #0]\r
-1399:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
- 1722                          .loc 1 1399 0\r
- 1723 002e 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1724 0030 43F00402            orr     r2, r3, #4\r
- 1725 0034 2270                strb    r2, [r4, #0]\r
- 1726 0036 38BD                pop     {r3, r4, r5, pc}\r
- 1727                  .L131:\r
-1405:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG1_REG != ctwInterval)\r
- 1728                          .loc 1 1405 0\r
- 1729 0038 1978                ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
- 1730 003a A942                cmp     r1, r5\r
-1408:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG1_REG = ctwInterval;\r
- 1731                          .loc 1 1408 0\r
- 1732 003c 18BF                it      ne\r
- 1733 003e 1D70                strbne  r5, [r3, #0]\r
-1412:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
- 1734                          .loc 1 1412 0\r
- 1735 0040 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 1736 0042 40F00403            orr     r3, r0, #4\r
- 1737 0046 2370                strb    r3, [r4, #0]\r
- 1738                  .L130:\r
- 1739 0048 38BD                pop     {r3, r4, r5, pc}\r
- 1740                  .L135:\r
- 1741 004a 00BF                .align  2\r
- 1742                  .L134:\r
- 1743 004c 82430040            .word   1073759106\r
- 1744 0050 81430040            .word   1073759105\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 69\r
-\r
-\r
- 1745                          .cfi_endproc\r
- 1746                  .LFE8:\r
- 1747                          .size   CyPmCtwSetInterval, .-CyPmCtwSetInterval\r
- 1748                          .section        .text.CyPmOppsSet,"ax",%progbits\r
- 1749                          .align  1\r
- 1750                          .global CyPmOppsSet\r
- 1751                          .thumb\r
- 1752                          .thumb_func\r
- 1753                          .type   CyPmOppsSet, %function\r
- 1754                  CyPmOppsSet:\r
- 1755                  .LFB9:\r
-1435:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1756                          .loc 1 1435 0\r
- 1757                          .cfi_startproc\r
- 1758                          @ args = 0, pretend = 0, frame = 0\r
- 1759                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1760 0000 08B5                push    {r3, lr}\r
- 1761                  .LCFI8:\r
- 1762                          .cfi_def_cfa_offset 8\r
- 1763                          .cfi_offset 3, -8\r
- 1764                          .cfi_offset 14, -4\r
-1437:.\Generated_Source\PSoC5/cyPm.c ****     if(0u == (CY_PM_SLOWCLK_X32_CR_REG & CY_PM_X32_CR_X32EN))\r
- 1765                          .loc 1 1437 0\r
- 1766 0002 084B                ldr     r3, .L138\r
- 1767 0004 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1768 0006 C307                lsls    r3, r0, #31\r
- 1769 0008 01D4                bmi     .L137\r
-1440:.\Generated_Source\PSoC5/cyPm.c ****         CyXTAL_32KHZ_Start();\r
- 1770                          .loc 1 1440 0\r
- 1771 000a FFF7FEFF            bl      CyXTAL_32KHZ_Start\r
- 1772                  .LVL68:\r
- 1773                  .L137:\r
-1444:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_1PPS_IE));\r
- 1774                          .loc 1 1444 0\r
- 1775 000e 0649                ldr     r1, .L138+4\r
- 1776 0010 0A78                ldrb    r2, [r1, #0]    @ zero_extendqisi2\r
- 1777 0012 02F0DF03            and     r3, r2, #223\r
- 1778 0016 0B70                strb    r3, [r1, #0]\r
-1447:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG |= CY_PM_1PPS_EN;\r
- 1779                          .loc 1 1447 0\r
- 1780 0018 0878                ldrb    r0, [r1, #0]    @ zero_extendqisi2\r
- 1781 001a 40F01002            orr     r2, r0, #16\r
- 1782 001e 0A70                strb    r2, [r1, #0]\r
- 1783 0020 08BD                pop     {r3, pc}\r
- 1784                  .L139:\r
- 1785 0022 00BF                .align  2\r
- 1786                  .L138:\r
- 1787 0024 08430040            .word   1073758984\r
- 1788 0028 82430040            .word   1073759106\r
- 1789                          .cfi_endproc\r
- 1790                  .LFE9:\r
- 1791                          .size   CyPmOppsSet, .-CyPmOppsSet\r
- 1792                          .section        .text.CyPmFtwSetInterval,"ax",%progbits\r
- 1793                          .align  1\r
- 1794                          .global CyPmFtwSetInterval\r
- 1795                          .thumb\r
- 1796                          .thumb_func\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 70\r
-\r
-\r
- 1797                          .type   CyPmFtwSetInterval, %function\r
- 1798                  CyPmFtwSetInterval:\r
- 1799                  .LFB10:\r
-1472:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1800                          .loc 1 1472 0\r
- 1801                          .cfi_startproc\r
- 1802                          @ args = 0, pretend = 0, frame = 0\r
- 1803                          @ frame_needed = 0, uses_anonymous_args = 0\r
- 1804                  .LVL69:\r
- 1805 0000 38B5                push    {r3, r4, r5, lr}\r
- 1806                  .LCFI9:\r
- 1807                          .cfi_def_cfa_offset 16\r
- 1808                          .cfi_offset 3, -16\r
- 1809                          .cfi_offset 4, -12\r
- 1810                          .cfi_offset 5, -8\r
- 1811                          .cfi_offset 14, -4\r
-1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));\r
- 1812                          .loc 1 1474 0\r
- 1813 0002 114C                ldr     r4, .L144\r
-1472:.\Generated_Source\PSoC5/cyPm.c **** {\r
- 1814                          .loc 1 1472 0\r
- 1815 0004 0546                mov     r5, r0\r
-1474:.\Generated_Source\PSoC5/cyPm.c ****     CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));\r
- 1816                          .loc 1 1474 0\r
- 1817 0006 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1818 0008 03F0FD00            and     r0, r3, #253\r
- 1819                  .LVL70:\r
- 1820 000c 2070                strb    r0, [r4, #0]\r
-1477:.\Generated_Source\PSoC5/cyPm.c ****     CyILO_Start100K();\r
- 1821                          .loc 1 1477 0\r
- 1822 000e FFF7FEFF            bl      CyILO_Start100K\r
- 1823                  .LVL71:\r
-1480:.\Generated_Source\PSoC5/cyPm.c ****     if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))\r
- 1824                          .loc 1 1480 0\r
- 1825 0012 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1826 0014 0D4B                ldr     r3, .L144+4\r
- 1827 0016 11F0010F            tst     r1, #1\r
- 1828 001a 0CD0                beq     .L141\r
-1483:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)\r
- 1829                          .loc 1 1483 0\r
- 1830 001c 1A78                ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
- 1831 001e AA42                cmp     r2, r5\r
- 1832 0020 11D0                beq     .L140\r
-1486:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));\r
- 1833                          .loc 1 1486 0\r
- 1834 0022 2078                ldrb    r0, [r4, #0]    @ zero_extendqisi2\r
- 1835 0024 00F0FE01            and     r1, r0, #254\r
- 1836 0028 2170                strb    r1, [r4, #0]\r
-1487:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;\r
- 1837                          .loc 1 1487 0\r
- 1838 002a 1D70                strb    r5, [r3, #0]\r
-1488:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
- 1839                          .loc 1 1488 0\r
- 1840 002c 2378                ldrb    r3, [r4, #0]    @ zero_extendqisi2\r
- 1841 002e 43F00102            orr     r2, r3, #1\r
- 1842 0032 2270                strb    r2, [r4, #0]\r
- 1843 0034 38BD                pop     {r3, r4, r5, pc}\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 71\r
-\r
-\r
- 1844                  .L141:\r
-1494:.\Generated_Source\PSoC5/cyPm.c ****         if(CY_PM_TW_CFG0_REG != ftwInterval)\r
- 1845                          .loc 1 1494 0\r
- 1846 0036 1878                ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
- 1847 0038 A842                cmp     r0, r5\r
-1497:.\Generated_Source\PSoC5/cyPm.c ****             CY_PM_TW_CFG0_REG = ftwInterval;\r
- 1848                          .loc 1 1497 0\r
- 1849 003a 18BF                it      ne\r
- 1850 003c 1D70                strbne  r5, [r3, #0]\r
-1501:.\Generated_Source\PSoC5/cyPm.c ****         CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
- 1851                          .loc 1 1501 0\r
- 1852 003e 2178                ldrb    r1, [r4, #0]    @ zero_extendqisi2\r
- 1853 0040 41F00103            orr     r3, r1, #1\r
- 1854 0044 2370                strb    r3, [r4, #0]\r
- 1855                  .L140:\r
- 1856 0046 38BD                pop     {r3, r4, r5, pc}\r
- 1857                  .L145:\r
- 1858                          .align  2\r
- 1859                  .L144:\r
- 1860 0048 82430040            .word   1073759106\r
- 1861 004c 80430040            .word   1073759104\r
- 1862                          .cfi_endproc\r
- 1863                  .LFE10:\r
- 1864                          .size   CyPmFtwSetInterval, .-CyPmFtwSetInterval\r
- 1865                          .section        .rodata\r
- 1866                          .set    .LANCHOR1,. + 0\r
- 1867                          .type   cyPmImoFreqReg2Mhz, %object\r
- 1868                          .size   cyPmImoFreqReg2Mhz, 7\r
- 1869                  cyPmImoFreqReg2Mhz:\r
- 1870 0000 0C                  .byte   12\r
- 1871 0001 06                  .byte   6\r
- 1872 0002 18                  .byte   24\r
- 1873 0003 03                  .byte   3\r
- 1874 0004 30                  .byte   48\r
- 1875 0005 3E                  .byte   62\r
- 1876 0006 4A                  .byte   74\r
- 1877                  .LC0:\r
- 1878 0007 02                  .byte   2\r
- 1879 0008 01                  .byte   1\r
- 1880 0009 03                  .byte   3\r
- 1881 000a 00                  .byte   0\r
- 1882 000b 04                  .byte   4\r
- 1883 000c 05                  .byte   5\r
- 1884 000d 06                  .byte   6\r
- 1885                          .bss\r
- 1886                          .align  1\r
- 1887                          .set    .LANCHOR0,. + 0\r
- 1888                          .type   cyPmBackup, %object\r
- 1889                          .size   cyPmBackup, 47\r
- 1890                  cyPmBackup:\r
- 1891 0000 00000000            .space  47\r
- 1891      00000000 \r
- 1891      00000000 \r
- 1891      00000000 \r
- 1891      00000000 \r
- 1892 002f 00                  .space  1\r
- 1893                          .type   cyPmClockBackup, %object\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 72\r
-\r
-\r
- 1894                          .size   cyPmClockBackup, 18\r
- 1895                  cyPmClockBackup:\r
- 1896 0030 00000000            .space  18\r
- 1896      00000000 \r
- 1896      00000000 \r
- 1896      00000000 \r
- 1896      0000\r
- 1897                          .type   interruptStatus.4773, %object\r
- 1898                          .size   interruptStatus.4773, 1\r
- 1899                  interruptStatus.4773:\r
- 1900 0042 00                  .space  1\r
- 1901 0043 00                  .text\r
- 1902                  .Letext0:\r
- 1903                          .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 1904                          .file 3 ".\\Generated_Source\\PSoC5\\cyPm.h"\r
- 1905                          .file 4 ".\\Generated_Source\\PSoC5\\CyFlash.h"\r
- 1906                          .file 5 ".\\Generated_Source\\PSoC5\\CyLib.h"\r
- 1907                          .section        .debug_info,"",%progbits\r
- 1908                  .Ldebug_info0:\r
- 1909 0000 180A0000            .4byte  0xa18\r
- 1910 0004 0200                .2byte  0x2\r
- 1911 0006 00000000            .4byte  .Ldebug_abbrev0\r
- 1912 000a 04                  .byte   0x4\r
- 1913 000b 01                  .uleb128 0x1\r
- 1914 000c 5B040000            .4byte  .LASF111\r
- 1915 0010 01                  .byte   0x1\r
- 1916 0011 A4010000            .4byte  .LASF112\r
- 1917 0015 53030000            .4byte  .LASF113\r
- 1918 0019 18000000            .4byte  .Ldebug_ranges0+0x18\r
- 1919 001d 00000000            .4byte  0\r
- 1920 0021 00000000            .4byte  0\r
- 1921 0025 00000000            .4byte  .Ldebug_line0\r
- 1922 0029 02                  .uleb128 0x2\r
- 1923 002a 01                  .byte   0x1\r
- 1924 002b 06                  .byte   0x6\r
- 1925 002c 33010000            .4byte  .LASF0\r
- 1926 0030 02                  .uleb128 0x2\r
- 1927 0031 01                  .byte   0x1\r
- 1928 0032 08                  .byte   0x8\r
- 1929 0033 B5040000            .4byte  .LASF1\r
- 1930 0037 02                  .uleb128 0x2\r
- 1931 0038 02                  .byte   0x2\r
- 1932 0039 05                  .byte   0x5\r
- 1933 003a EE040000            .4byte  .LASF2\r
- 1934 003e 02                  .uleb128 0x2\r
- 1935 003f 02                  .byte   0x2\r
- 1936 0040 07                  .byte   0x7\r
- 1937 0041 B7020000            .4byte  .LASF3\r
- 1938 0045 02                  .uleb128 0x2\r
- 1939 0046 04                  .byte   0x4\r
- 1940 0047 05                  .byte   0x5\r
- 1941 0048 6C010000            .4byte  .LASF4\r
- 1942 004c 02                  .uleb128 0x2\r
- 1943 004d 04                  .byte   0x4\r
- 1944 004e 07                  .byte   0x7\r
- 1945 004f 28020000            .4byte  .LASF5\r
- 1946 0053 02                  .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 73\r
-\r
-\r
- 1947 0054 08                  .byte   0x8\r
- 1948 0055 05                  .byte   0x5\r
- 1949 0056 25010000            .4byte  .LASF6\r
- 1950 005a 02                  .uleb128 0x2\r
- 1951 005b 08                  .byte   0x8\r
- 1952 005c 07                  .byte   0x7\r
- 1953 005d A2000000            .4byte  .LASF7\r
- 1954 0061 03                  .uleb128 0x3\r
- 1955 0062 04                  .byte   0x4\r
- 1956 0063 05                  .byte   0x5\r
- 1957 0064 696E7400            .ascii  "int\000"\r
- 1958 0068 02                  .uleb128 0x2\r
- 1959 0069 04                  .byte   0x4\r
- 1960 006a 07                  .byte   0x7\r
- 1961 006b FA010000            .4byte  .LASF8\r
- 1962 006f 04                  .uleb128 0x4\r
- 1963 0070 87010000            .4byte  .LASF9\r
- 1964 0074 02                  .byte   0x2\r
- 1965 0075 5B                  .byte   0x5b\r
- 1966 0076 30000000            .4byte  0x30\r
- 1967 007a 04                  .uleb128 0x4\r
- 1968 007b 14000000            .4byte  .LASF10\r
- 1969 007f 02                  .byte   0x2\r
- 1970 0080 5C                  .byte   0x5c\r
- 1971 0081 3E000000            .4byte  0x3e\r
- 1972 0085 04                  .uleb128 0x4\r
- 1973 0086 C4010000            .4byte  .LASF11\r
- 1974 008a 02                  .byte   0x2\r
- 1975 008b 5D                  .byte   0x5d\r
- 1976 008c 4C000000            .4byte  0x4c\r
- 1977 0090 02                  .uleb128 0x2\r
- 1978 0091 04                  .byte   0x4\r
- 1979 0092 04                  .byte   0x4\r
- 1980 0093 14040000            .4byte  .LASF12\r
- 1981 0097 02                  .uleb128 0x2\r
- 1982 0098 08                  .byte   0x8\r
- 1983 0099 04                  .byte   0x4\r
- 1984 009a 9D010000            .4byte  .LASF13\r
- 1985 009e 02                  .uleb128 0x2\r
- 1986 009f 01                  .byte   0x1\r
- 1987 00a0 08                  .byte   0x8\r
- 1988 00a1 18050000            .4byte  .LASF14\r
- 1989 00a5 04                  .uleb128 0x4\r
- 1990 00a6 38060000            .4byte  .LASF15\r
- 1991 00aa 02                  .byte   0x2\r
- 1992 00ab E8                  .byte   0xe8\r
- 1993 00ac 4C000000            .4byte  0x4c\r
- 1994 00b0 04                  .uleb128 0x4\r
- 1995 00b1 A4040000            .4byte  .LASF16\r
- 1996 00b5 02                  .byte   0x2\r
- 1997 00b6 F0                  .byte   0xf0\r
- 1998 00b7 BB000000            .4byte  0xbb\r
- 1999 00bb 05                  .uleb128 0x5\r
- 2000 00bc 6F000000            .4byte  0x6f\r
- 2001 00c0 02                  .uleb128 0x2\r
- 2002 00c1 04                  .byte   0x4\r
- 2003 00c2 07                  .byte   0x7\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 74\r
-\r
-\r
- 2004 00c3 9D030000            .4byte  .LASF17\r
- 2005 00c7 06                  .uleb128 0x6\r
- 2006 00c8 41020000            .4byte  .LASF34\r
- 2007 00cc 12                  .byte   0x12\r
- 2008 00cd 03                  .byte   0x3\r
- 2009 00ce F1                  .byte   0xf1\r
- 2010 00cf A9010000            .4byte  0x1a9\r
- 2011 00d3 07                  .uleb128 0x7\r
- 2012 00d4 B9030000            .4byte  .LASF18\r
- 2013 00d8 03                  .byte   0x3\r
- 2014 00d9 F4                  .byte   0xf4\r
- 2015 00da 6F000000            .4byte  0x6f\r
- 2016 00de 02                  .byte   0x2\r
- 2017 00df 23                  .byte   0x23\r
- 2018 00e0 00                  .uleb128 0\r
- 2019 00e1 07                  .uleb128 0x7\r
- 2020 00e2 C0030000            .4byte  .LASF19\r
- 2021 00e6 03                  .byte   0x3\r
- 2022 00e7 F5                  .byte   0xf5\r
- 2023 00e8 6F000000            .4byte  0x6f\r
- 2024 00ec 02                  .byte   0x2\r
- 2025 00ed 23                  .byte   0x23\r
- 2026 00ee 01                  .uleb128 0x1\r
- 2027 00ef 07                  .uleb128 0x7\r
- 2028 00f0 51000000            .4byte  .LASF20\r
- 2029 00f4 03                  .byte   0x3\r
- 2030 00f5 F6                  .byte   0xf6\r
- 2031 00f6 6F000000            .4byte  0x6f\r
- 2032 00fa 02                  .byte   0x2\r
- 2033 00fb 23                  .byte   0x23\r
- 2034 00fc 02                  .uleb128 0x2\r
- 2035 00fd 07                  .uleb128 0x7\r
- 2036 00fe 20020000            .4byte  .LASF21\r
- 2037 0102 03                  .byte   0x3\r
- 2038 0103 F7                  .byte   0xf7\r
- 2039 0104 6F000000            .4byte  0x6f\r
- 2040 0108 02                  .byte   0x2\r
- 2041 0109 23                  .byte   0x23\r
- 2042 010a 03                  .uleb128 0x3\r
- 2043 010b 07                  .uleb128 0x7\r
- 2044 010c E2000000            .4byte  .LASF22\r
- 2045 0110 03                  .byte   0x3\r
- 2046 0111 F8                  .byte   0xf8\r
- 2047 0112 6F000000            .4byte  0x6f\r
- 2048 0116 02                  .byte   0x2\r
- 2049 0117 23                  .byte   0x23\r
- 2050 0118 04                  .uleb128 0x4\r
- 2051 0119 07                  .uleb128 0x7\r
- 2052 011a 41060000            .4byte  .LASF23\r
- 2053 011e 03                  .byte   0x3\r
- 2054 011f F9                  .byte   0xf9\r
- 2055 0120 6F000000            .4byte  0x6f\r
- 2056 0124 02                  .byte   0x2\r
- 2057 0125 23                  .byte   0x23\r
- 2058 0126 05                  .uleb128 0x5\r
- 2059 0127 07                  .uleb128 0x7\r
- 2060 0128 8C060000            .4byte  .LASF24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 75\r
-\r
-\r
- 2061 012c 03                  .byte   0x3\r
- 2062 012d FA                  .byte   0xfa\r
- 2063 012e 6F000000            .4byte  0x6f\r
- 2064 0132 02                  .byte   0x2\r
- 2065 0133 23                  .byte   0x23\r
- 2066 0134 06                  .uleb128 0x6\r
- 2067 0135 07                  .uleb128 0x7\r
- 2068 0136 0A040000            .4byte  .LASF25\r
- 2069 013a 03                  .byte   0x3\r
- 2070 013b FB                  .byte   0xfb\r
- 2071 013c 6F000000            .4byte  0x6f\r
- 2072 0140 02                  .byte   0x2\r
- 2073 0141 23                  .byte   0x23\r
- 2074 0142 07                  .uleb128 0x7\r
- 2075 0143 07                  .uleb128 0x7\r
- 2076 0144 3A030000            .4byte  .LASF26\r
- 2077 0148 03                  .byte   0x3\r
- 2078 0149 FC                  .byte   0xfc\r
- 2079 014a 6F000000            .4byte  0x6f\r
- 2080 014e 02                  .byte   0x2\r
- 2081 014f 23                  .byte   0x23\r
- 2082 0150 08                  .uleb128 0x8\r
- 2083 0151 07                  .uleb128 0x7\r
- 2084 0152 66010000            .4byte  .LASF27\r
- 2085 0156 03                  .byte   0x3\r
- 2086 0157 FD                  .byte   0xfd\r
- 2087 0158 6F000000            .4byte  0x6f\r
- 2088 015c 02                  .byte   0x2\r
- 2089 015d 23                  .byte   0x23\r
- 2090 015e 09                  .uleb128 0x9\r
- 2091 015f 07                  .uleb128 0x7\r
- 2092 0160 85000000            .4byte  .LASF28\r
- 2093 0164 03                  .byte   0x3\r
- 2094 0165 FE                  .byte   0xfe\r
- 2095 0166 6F000000            .4byte  0x6f\r
- 2096 016a 02                  .byte   0x2\r
- 2097 016b 23                  .byte   0x23\r
- 2098 016c 0A                  .uleb128 0xa\r
- 2099 016d 07                  .uleb128 0x7\r
- 2100 016e 3F010000            .4byte  .LASF29\r
- 2101 0172 03                  .byte   0x3\r
- 2102 0173 FF                  .byte   0xff\r
- 2103 0174 7A000000            .4byte  0x7a\r
- 2104 0178 02                  .byte   0x2\r
- 2105 0179 23                  .byte   0x23\r
- 2106 017a 0C                  .uleb128 0xc\r
- 2107 017b 08                  .uleb128 0x8\r
- 2108 017c D3040000            .4byte  .LASF30\r
- 2109 0180 03                  .byte   0x3\r
- 2110 0181 0001                .2byte  0x100\r
- 2111 0183 6F000000            .4byte  0x6f\r
- 2112 0187 02                  .byte   0x2\r
- 2113 0188 23                  .byte   0x23\r
- 2114 0189 0E                  .uleb128 0xe\r
- 2115 018a 08                  .uleb128 0x8\r
- 2116 018b CB010000            .4byte  .LASF31\r
- 2117 018f 03                  .byte   0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 76\r
-\r
-\r
- 2118 0190 0101                .2byte  0x101\r
- 2119 0192 6F000000            .4byte  0x6f\r
- 2120 0196 02                  .byte   0x2\r
- 2121 0197 23                  .byte   0x23\r
- 2122 0198 0F                  .uleb128 0xf\r
- 2123 0199 08                  .uleb128 0x8\r
- 2124 019a BB050000            .4byte  .LASF32\r
- 2125 019e 03                  .byte   0x3\r
- 2126 019f 0201                .2byte  0x102\r
- 2127 01a1 6F000000            .4byte  0x6f\r
- 2128 01a5 02                  .byte   0x2\r
- 2129 01a6 23                  .byte   0x23\r
- 2130 01a7 10                  .uleb128 0x10\r
- 2131 01a8 00                  .byte   0\r
- 2132 01a9 09                  .uleb128 0x9\r
- 2133 01aa 9D020000            .4byte  .LASF33\r
- 2134 01ae 03                  .byte   0x3\r
- 2135 01af 0401                .2byte  0x104\r
- 2136 01b1 C7000000            .4byte  0xc7\r
- 2137 01b5 0A                  .uleb128 0xa\r
- 2138 01b6 6E020000            .4byte  .LASF35\r
- 2139 01ba 2F                  .byte   0x2f\r
- 2140 01bb 03                  .byte   0x3\r
- 2141 01bc 0701                .2byte  0x107\r
- 2142 01be EF020000            .4byte  0x2ef\r
- 2143 01c2 08                  .uleb128 0x8\r
- 2144 01c3 18010000            .4byte  .LASF36\r
- 2145 01c7 03                  .byte   0x3\r
- 2146 01c8 0901                .2byte  0x109\r
- 2147 01ca 6F000000            .4byte  0x6f\r
- 2148 01ce 02                  .byte   0x2\r
- 2149 01cf 23                  .byte   0x23\r
- 2150 01d0 00                  .uleb128 0\r
- 2151 01d1 08                  .uleb128 0x8\r
- 2152 01d2 E2040000            .4byte  .LASF37\r
- 2153 01d6 03                  .byte   0x3\r
- 2154 01d7 0A01                .2byte  0x10a\r
- 2155 01d9 6F000000            .4byte  0x6f\r
- 2156 01dd 02                  .byte   0x2\r
- 2157 01de 23                  .byte   0x23\r
- 2158 01df 01                  .uleb128 0x1\r
- 2159 01e0 08                  .uleb128 0x8\r
- 2160 01e1 0A050000            .4byte  .LASF38\r
- 2161 01e5 03                  .byte   0x3\r
- 2162 01e6 0B01                .2byte  0x10b\r
- 2163 01e8 6F000000            .4byte  0x6f\r
- 2164 01ec 02                  .byte   0x2\r
- 2165 01ed 23                  .byte   0x23\r
- 2166 01ee 02                  .uleb128 0x2\r
- 2167 01ef 08                  .uleb128 0x8\r
- 2168 01f0 91030000            .4byte  .LASF39\r
- 2169 01f4 03                  .byte   0x3\r
- 2170 01f5 0D01                .2byte  0x10d\r
- 2171 01f7 6F000000            .4byte  0x6f\r
- 2172 01fb 02                  .byte   0x2\r
- 2173 01fc 23                  .byte   0x23\r
- 2174 01fd 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 77\r
-\r
-\r
- 2175 01fe 08                  .uleb128 0x8\r
- 2176 01ff 00030000            .4byte  .LASF40\r
- 2177 0203 03                  .byte   0x3\r
- 2178 0204 1701                .2byte  0x117\r
- 2179 0206 6F000000            .4byte  0x6f\r
- 2180 020a 02                  .byte   0x2\r
- 2181 020b 23                  .byte   0x23\r
- 2182 020c 04                  .uleb128 0x4\r
- 2183 020d 08                  .uleb128 0x8\r
- 2184 020e 0B030000            .4byte  .LASF41\r
- 2185 0212 03                  .byte   0x3\r
- 2186 0213 1801                .2byte  0x118\r
- 2187 0215 6F000000            .4byte  0x6f\r
- 2188 0219 02                  .byte   0x2\r
- 2189 021a 23                  .byte   0x23\r
- 2190 021b 05                  .uleb128 0x5\r
- 2191 021c 08                  .uleb128 0x8\r
- 2192 021d 16030000            .4byte  .LASF42\r
- 2193 0221 03                  .byte   0x3\r
- 2194 0222 1901                .2byte  0x119\r
- 2195 0224 6F000000            .4byte  0x6f\r
- 2196 0228 02                  .byte   0x2\r
- 2197 0229 23                  .byte   0x23\r
- 2198 022a 06                  .uleb128 0x6\r
- 2199 022b 08                  .uleb128 0x8\r
- 2200 022c 39000000            .4byte  .LASF43\r
- 2201 0230 03                  .byte   0x3\r
- 2202 0231 1B01                .2byte  0x11b\r
- 2203 0233 6F000000            .4byte  0x6f\r
- 2204 0237 02                  .byte   0x2\r
- 2205 0238 23                  .byte   0x23\r
- 2206 0239 07                  .uleb128 0x7\r
- 2207 023a 08                  .uleb128 0x8\r
- 2208 023b 45000000            .4byte  .LASF44\r
- 2209 023f 03                  .byte   0x3\r
- 2210 0240 1C01                .2byte  0x11c\r
- 2211 0242 6F000000            .4byte  0x6f\r
- 2212 0246 02                  .byte   0x2\r
- 2213 0247 23                  .byte   0x23\r
- 2214 0248 08                  .uleb128 0x8\r
- 2215 0249 08                  .uleb128 0x8\r
- 2216 024a 07020000            .4byte  .LASF45\r
- 2217 024e 03                  .byte   0x3\r
- 2218 024f 1E01                .2byte  0x11e\r
- 2219 0251 EF020000            .4byte  0x2ef\r
- 2220 0255 02                  .byte   0x2\r
- 2221 0256 23                  .byte   0x23\r
- 2222 0257 09                  .uleb128 0x9\r
- 2223 0258 08                  .uleb128 0x8\r
- 2224 0259 3A020000            .4byte  .LASF46\r
- 2225 025d 03                  .byte   0x3\r
- 2226 025e 2101                .2byte  0x121\r
- 2227 0260 6F000000            .4byte  0x6f\r
- 2228 0264 02                  .byte   0x2\r
- 2229 0265 23                  .byte   0x23\r
- 2230 0266 25                  .uleb128 0x25\r
- 2231 0267 08                  .uleb128 0x8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 78\r
-\r
-\r
- 2232 0268 83060000            .4byte  .LASF47\r
- 2233 026c 03                  .byte   0x3\r
- 2234 026d 2201                .2byte  0x122\r
- 2235 026f 6F000000            .4byte  0x6f\r
- 2236 0273 02                  .byte   0x2\r
- 2237 0274 23                  .byte   0x23\r
- 2238 0275 26                  .uleb128 0x26\r
- 2239 0276 08                  .uleb128 0x8\r
- 2240 0277 E2050000            .4byte  .LASF48\r
- 2241 027b 03                  .byte   0x3\r
- 2242 027c 2301                .2byte  0x123\r
- 2243 027e 6F000000            .4byte  0x6f\r
- 2244 0282 02                  .byte   0x2\r
- 2245 0283 23                  .byte   0x23\r
- 2246 0284 27                  .uleb128 0x27\r
- 2247 0285 08                  .uleb128 0x8\r
- 2248 0286 D9000000            .4byte  .LASF49\r
- 2249 028a 03                  .byte   0x3\r
- 2250 028b 2401                .2byte  0x124\r
- 2251 028d 6F000000            .4byte  0x6f\r
- 2252 0291 02                  .byte   0x2\r
- 2253 0292 23                  .byte   0x23\r
- 2254 0293 28                  .uleb128 0x28\r
- 2255 0294 08                  .uleb128 0x8\r
- 2256 0295 FF000000            .4byte  .LASF50\r
- 2257 0299 03                  .byte   0x3\r
- 2258 029a 2501                .2byte  0x125\r
- 2259 029c 6F000000            .4byte  0x6f\r
- 2260 02a0 02                  .byte   0x2\r
- 2261 02a1 23                  .byte   0x23\r
- 2262 02a2 29                  .uleb128 0x29\r
- 2263 02a3 08                  .uleb128 0x8\r
- 2264 02a4 3A040000            .4byte  .LASF51\r
- 2265 02a8 03                  .byte   0x3\r
- 2266 02a9 2601                .2byte  0x126\r
- 2267 02ab 6F000000            .4byte  0x6f\r
- 2268 02af 02                  .byte   0x2\r
- 2269 02b0 23                  .byte   0x23\r
- 2270 02b1 2A                  .uleb128 0x2a\r
- 2271 02b2 08                  .uleb128 0x8\r
- 2272 02b3 51060000            .4byte  .LASF52\r
- 2273 02b7 03                  .byte   0x3\r
- 2274 02b8 2701                .2byte  0x127\r
- 2275 02ba 6F000000            .4byte  0x6f\r
- 2276 02be 02                  .byte   0x2\r
- 2277 02bf 23                  .byte   0x23\r
- 2278 02c0 2B                  .uleb128 0x2b\r
- 2279 02c1 08                  .uleb128 0x8\r
- 2280 02c2 EF010000            .4byte  .LASF53\r
- 2281 02c6 03                  .byte   0x3\r
- 2282 02c7 2901                .2byte  0x129\r
- 2283 02c9 6F000000            .4byte  0x6f\r
- 2284 02cd 02                  .byte   0x2\r
- 2285 02ce 23                  .byte   0x23\r
- 2286 02cf 2C                  .uleb128 0x2c\r
- 2287 02d0 08                  .uleb128 0x8\r
- 2288 02d1 45050000            .4byte  .LASF54\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 79\r
-\r
-\r
- 2289 02d5 03                  .byte   0x3\r
- 2290 02d6 2A01                .2byte  0x12a\r
- 2291 02d8 6F000000            .4byte  0x6f\r
- 2292 02dc 02                  .byte   0x2\r
- 2293 02dd 23                  .byte   0x23\r
- 2294 02de 2D                  .uleb128 0x2d\r
- 2295 02df 08                  .uleb128 0x8\r
- 2296 02e0 2E030000            .4byte  .LASF55\r
- 2297 02e4 03                  .byte   0x3\r
- 2298 02e5 2C01                .2byte  0x12c\r
- 2299 02e7 6F000000            .4byte  0x6f\r
- 2300 02eb 02                  .byte   0x2\r
- 2301 02ec 23                  .byte   0x23\r
- 2302 02ed 2E                  .uleb128 0x2e\r
- 2303 02ee 00                  .byte   0\r
- 2304 02ef 0B                  .uleb128 0xb\r
- 2305 02f0 6F000000            .4byte  0x6f\r
- 2306 02f4 FF020000            .4byte  0x2ff\r
- 2307 02f8 0C                  .uleb128 0xc\r
- 2308 02f9 C0000000            .4byte  0xc0\r
- 2309 02fd 1B                  .byte   0x1b\r
- 2310 02fe 00                  .byte   0\r
- 2311 02ff 09                  .uleb128 0x9\r
- 2312 0300 5E000000            .4byte  .LASF56\r
- 2313 0304 03                  .byte   0x3\r
- 2314 0305 2E01                .2byte  0x12e\r
- 2315 0307 B5010000            .4byte  0x1b5\r
- 2316 030b 0D                  .uleb128 0xd\r
- 2317 030c F8040000            .4byte  .LASF57\r
- 2318 0310 01                  .byte   0x1\r
- 2319 0311 F805                .2byte  0x5f8\r
- 2320 0313 01                  .byte   0x1\r
- 2321 0314 00000000            .4byte  .LFB11\r
- 2322 0318 64010000            .4byte  .LFE11\r
- 2323 031c 00000000            .4byte  .LLST0\r
- 2324 0320 01                  .byte   0x1\r
- 2325 0321 0E                  .uleb128 0xe\r
- 2326 0322 27000000            .4byte  .LASF58\r
- 2327 0326 01                  .byte   0x1\r
- 2328 0327 7B06                .2byte  0x67b\r
- 2329 0329 01                  .byte   0x1\r
- 2330 032a 00000000            .4byte  .LFB12\r
- 2331 032e A4000000            .4byte  .LFE12\r
- 2332 0332 02                  .byte   0x2\r
- 2333 0333 7D                  .byte   0x7d\r
- 2334 0334 00                  .sleb128 0\r
- 2335 0335 01                  .byte   0x1\r
- 2336 0336 0F                  .uleb128 0xf\r
- 2337 0337 01                  .byte   0x1\r
- 2338 0338 44030000            .4byte  .LASF59\r
- 2339 033c 01                  .byte   0x1\r
- 2340 033d 50                  .byte   0x50\r
- 2341 033e 01                  .byte   0x1\r
- 2342 033f 00000000            .4byte  .LFB0\r
- 2343 0343 B4010000            .4byte  .LFE0\r
- 2344 0347 20000000            .4byte  .LLST1\r
- 2345 034b 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 80\r
-\r
-\r
- 2346 034c F1030000            .4byte  0x3f1\r
- 2347 0350 10                  .uleb128 0x10\r
- 2348 0351 38000000            .4byte  .LVL0\r
- 2349 0355 67080000            .4byte  0x867\r
- 2350 0359 64030000            .4byte  0x364\r
- 2351 035d 11                  .uleb128 0x11\r
- 2352 035e 01                  .byte   0x1\r
- 2353 035f 50                  .byte   0x50\r
- 2354 0360 02                  .byte   0x2\r
- 2355 0361 08                  .byte   0x8\r
- 2356 0362 37                  .byte   0x37\r
- 2357 0363 00                  .byte   0\r
- 2358 0364 10                  .uleb128 0x10\r
- 2359 0365 62000000            .4byte  .LVL1\r
- 2360 0369 7B080000            .4byte  0x87b\r
- 2361 036d 77030000            .4byte  0x377\r
- 2362 0371 11                  .uleb128 0x11\r
- 2363 0372 01                  .byte   0x1\r
- 2364 0373 50                  .byte   0x50\r
- 2365 0374 01                  .byte   0x1\r
- 2366 0375 34                  .byte   0x34\r
- 2367 0376 00                  .byte   0\r
- 2368 0377 12                  .uleb128 0x12\r
- 2369 0378 80000000            .4byte  .LVL2\r
- 2370 037c 8F080000            .4byte  0x88f\r
- 2371 0380 10                  .uleb128 0x10\r
- 2372 0381 AA000000            .4byte  .LVL3\r
- 2373 0385 A3080000            .4byte  0x8a3\r
- 2374 0389 93030000            .4byte  0x393\r
- 2375 038d 11                  .uleb128 0x11\r
- 2376 038e 01                  .byte   0x1\r
- 2377 038f 50                  .byte   0x50\r
- 2378 0390 01                  .byte   0x1\r
- 2379 0391 30                  .byte   0x30\r
- 2380 0392 00                  .byte   0\r
- 2381 0393 12                  .uleb128 0x12\r
- 2382 0394 DC000000            .4byte  .LVL4\r
- 2383 0398 B7080000            .4byte  0x8b7\r
- 2384 039c 10                  .uleb128 0x10\r
- 2385 039d EE000000            .4byte  .LVL5\r
- 2386 03a1 C1080000            .4byte  0x8c1\r
- 2387 03a5 AF030000            .4byte  0x3af\r
- 2388 03a9 11                  .uleb128 0x11\r
- 2389 03aa 01                  .byte   0x1\r
- 2390 03ab 50                  .byte   0x50\r
- 2391 03ac 01                  .byte   0x1\r
- 2392 03ad 30                  .byte   0x30\r
- 2393 03ae 00                  .byte   0\r
- 2394 03af 10                  .uleb128 0x10\r
- 2395 03b0 04010000            .4byte  .LVL6\r
- 2396 03b4 D5080000            .4byte  0x8d5\r
- 2397 03b8 C2030000            .4byte  0x3c2\r
- 2398 03bc 11                  .uleb128 0x11\r
- 2399 03bd 01                  .byte   0x1\r
- 2400 03be 50                  .byte   0x50\r
- 2401 03bf 01                  .byte   0x1\r
- 2402 03c0 30                  .byte   0x30\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 81\r
-\r
-\r
- 2403 03c1 00                  .byte   0\r
- 2404 03c2 10                  .uleb128 0x10\r
- 2405 03c3 1E010000            .4byte  .LVL7\r
- 2406 03c7 E9080000            .4byte  0x8e9\r
- 2407 03cb D5030000            .4byte  0x3d5\r
- 2408 03cf 11                  .uleb128 0x11\r
- 2409 03d0 01                  .byte   0x1\r
- 2410 03d1 50                  .byte   0x50\r
- 2411 03d2 01                  .byte   0x1\r
- 2412 03d3 30                  .byte   0x30\r
- 2413 03d4 00                  .byte   0\r
- 2414 03d5 12                  .uleb128 0x12\r
- 2415 03d6 2E010000            .4byte  .LVL8\r
- 2416 03da 67080000            .4byte  0x867\r
- 2417 03de 12                  .uleb128 0x12\r
- 2418 03df 44010000            .4byte  .LVL9\r
- 2419 03e3 FD080000            .4byte  0x8fd\r
- 2420 03e7 12                  .uleb128 0x12\r
- 2421 03e8 60010000            .4byte  .LVL10\r
- 2422 03ec 07090000            .4byte  0x907\r
- 2423 03f0 00                  .byte   0\r
- 2424 03f1 13                  .uleb128 0x13\r
- 2425 03f2 01                  .byte   0x1\r
- 2426 03f3 90000000            .4byte  .LASF60\r
- 2427 03f7 01                  .byte   0x1\r
- 2428 03f8 0001                .2byte  0x100\r
- 2429 03fa 01                  .byte   0x1\r
- 2430 03fb 00000000            .4byte  .LFB1\r
- 2431 03ff 08020000            .4byte  .LFE1\r
- 2432 0403 40000000            .4byte  .LLST2\r
- 2433 0407 01                  .byte   0x1\r
- 2434 0408 3B050000            .4byte  0x53b\r
- 2435 040c 14                  .uleb128 0x14\r
- 2436 040d DB050000            .4byte  .LASF61\r
- 2437 0411 01                  .byte   0x1\r
- 2438 0412 0201                .2byte  0x102\r
- 2439 0414 A5000000            .4byte  0xa5\r
- 2440 0418 10                  .byte   0x10\r
- 2441 0419 15                  .uleb128 0x15\r
- 2442 041a 6900                .ascii  "i\000"\r
- 2443 041c 01                  .byte   0x1\r
- 2444 041d 0301                .2byte  0x103\r
- 2445 041f 7A000000            .4byte  0x7a\r
- 2446 0423 16                  .uleb128 0x16\r
- 2447 0424 21030000            .4byte  .LASF62\r
- 2448 0428 01                  .byte   0x1\r
- 2449 0429 0401                .2byte  0x104\r
- 2450 042b 7A000000            .4byte  0x7a\r
- 2451 042f 60000000            .4byte  .LLST3\r
- 2452 0433 17                  .uleb128 0x17\r
- 2453 0434 A6030000            .4byte  .LASF63\r
- 2454 0438 01                  .byte   0x1\r
- 2455 0439 0801                .2byte  0x108\r
- 2456 043b 4B050000            .4byte  0x54b\r
- 2457 043f 02                  .byte   0x2\r
- 2458 0440 91                  .byte   0x91\r
- 2459 0441 70                  .sleb128 -16\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 82\r
-\r
-\r
- 2460 0442 10                  .uleb128 0x10\r
- 2461 0443 34000000            .4byte  .LVL12\r
- 2462 0447 11090000            .4byte  0x911\r
- 2463 044b 66040000            .4byte  0x466\r
- 2464 044f 11                  .uleb128 0x11\r
- 2465 0450 01                  .byte   0x1\r
- 2466 0451 50                  .byte   0x50\r
- 2467 0452 12                  .byte   0x12\r
- 2468 0453 74                  .byte   0x74\r
- 2469 0454 00                  .sleb128 0\r
- 2470 0455 37                  .byte   0x37\r
- 2471 0456 1A                  .byte   0x1a\r
- 2472 0457 03                  .byte   0x3\r
- 2473 0458 00000000            .4byte  .LANCHOR1\r
- 2474 045c 22                  .byte   0x22\r
- 2475 045d 94                  .byte   0x94\r
- 2476 045e 01                  .byte   0x1\r
- 2477 045f 08                  .byte   0x8\r
- 2478 0460 FF                  .byte   0xff\r
- 2479 0461 1A                  .byte   0x1a\r
- 2480 0462 08                  .byte   0x8\r
- 2481 0463 4B                  .byte   0x4b\r
- 2482 0464 1E                  .byte   0x1e\r
- 2483 0465 00                  .byte   0\r
- 2484 0466 10                  .uleb128 0x10\r
- 2485 0467 50000000            .4byte  .LVL13\r
- 2486 046b 67080000            .4byte  0x867\r
- 2487 046f 7A040000            .4byte  0x47a\r
- 2488 0473 11                  .uleb128 0x11\r
- 2489 0474 01                  .byte   0x1\r
- 2490 0475 50                  .byte   0x50\r
- 2491 0476 02                  .byte   0x2\r
- 2492 0477 08                  .byte   0x8\r
- 2493 0478 37                  .byte   0x37\r
- 2494 0479 00                  .byte   0\r
- 2495 047a 10                  .uleb128 0x10\r
- 2496 047b 62000000            .4byte  .LVL14\r
- 2497 047f 25090000            .4byte  0x925\r
- 2498 0483 8D040000            .4byte  0x48d\r
- 2499 0487 11                  .uleb128 0x11\r
- 2500 0488 01                  .byte   0x1\r
- 2501 0489 50                  .byte   0x50\r
- 2502 048a 01                  .byte   0x1\r
- 2503 048b 30                  .byte   0x30\r
- 2504 048c 00                  .byte   0\r
- 2505 048d 12                  .uleb128 0x12\r
- 2506 048e 7C000000            .4byte  .LVL16\r
- 2507 0492 11090000            .4byte  0x911\r
- 2508 0496 12                  .uleb128 0x12\r
- 2509 0497 9E000000            .4byte  .LVL17\r
- 2510 049b C1080000            .4byte  0x8c1\r
- 2511 049f 12                  .uleb128 0x12\r
- 2512 04a0 A6000000            .4byte  .LVL18\r
- 2513 04a4 D5080000            .4byte  0x8d5\r
- 2514 04a8 10                  .uleb128 0x10\r
- 2515 04a9 CC000000            .4byte  .LVL19\r
- 2516 04ad 7B080000            .4byte  0x87b\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 83\r
-\r
-\r
- 2517 04b1 BB040000            .4byte  0x4bb\r
- 2518 04b5 11                  .uleb128 0x11\r
- 2519 04b6 01                  .byte   0x1\r
- 2520 04b7 50                  .byte   0x50\r
- 2521 04b8 01                  .byte   0x1\r
- 2522 04b9 38                  .byte   0x38\r
- 2523 04ba 00                  .byte   0\r
- 2524 04bb 12                  .uleb128 0x12\r
- 2525 04bc DE000000            .4byte  .LVL20\r
- 2526 04c0 7B080000            .4byte  0x87b\r
- 2527 04c4 10                  .uleb128 0x10\r
- 2528 04c5 16010000            .4byte  .LVL21\r
- 2529 04c9 8F080000            .4byte  0x88f\r
- 2530 04cd DA040000            .4byte  0x4da\r
- 2531 04d1 11                  .uleb128 0x11\r
- 2532 04d2 01                  .byte   0x1\r
- 2533 04d3 50                  .byte   0x50\r
- 2534 04d4 04                  .byte   0x4\r
- 2535 04d5 74                  .byte   0x74\r
- 2536 04d6 00                  .sleb128 0\r
- 2537 04d7 40                  .byte   0x40\r
- 2538 04d8 1A                  .byte   0x1a\r
- 2539 04d9 00                  .byte   0\r
- 2540 04da 12                  .uleb128 0x12\r
- 2541 04db 2E010000            .4byte  .LVL22\r
- 2542 04df 3D090000            .4byte  0x93d\r
- 2543 04e3 12                  .uleb128 0x12\r
- 2544 04e4 38010000            .4byte  .LVL23\r
- 2545 04e8 A3080000            .4byte  0x8a3\r
- 2546 04ec 12                  .uleb128 0x12\r
- 2547 04ed 44010000            .4byte  .LVL24\r
- 2548 04f1 47090000            .4byte  0x947\r
- 2549 04f5 10                  .uleb128 0x10\r
- 2550 04f6 70010000            .4byte  .LVL25\r
- 2551 04fa 51090000            .4byte  0x951\r
- 2552 04fe 08050000            .4byte  0x508\r
- 2553 0502 11                  .uleb128 0x11\r
- 2554 0503 01                  .byte   0x1\r
- 2555 0504 50                  .byte   0x50\r
- 2556 0505 01                  .byte   0x1\r
- 2557 0506 30                  .byte   0x30\r
- 2558 0507 00                  .byte   0\r
- 2559 0508 10                  .uleb128 0x10\r
- 2560 0509 84010000            .4byte  .LVL26\r
- 2561 050d 11090000            .4byte  0x911\r
- 2562 0511 1F050000            .4byte  0x51f\r
- 2563 0515 11                  .uleb128 0x11\r
- 2564 0516 01                  .byte   0x1\r
- 2565 0517 50                  .byte   0x50\r
- 2566 0518 05                  .byte   0x5\r
- 2567 0519 74                  .byte   0x74\r
- 2568 051a 00                  .sleb128 0\r
- 2569 051b 08                  .byte   0x8\r
- 2570 051c FA                  .byte   0xfa\r
- 2571 051d 1E                  .byte   0x1e\r
- 2572 051e 00                  .byte   0\r
- 2573 051f 12                  .uleb128 0x12\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 84\r
-\r
-\r
- 2574 0520 9E010000            .4byte  .LVL27\r
- 2575 0524 C1080000            .4byte  0x8c1\r
- 2576 0528 12                  .uleb128 0x12\r
- 2577 0529 A6010000            .4byte  .LVL28\r
- 2578 052d D5080000            .4byte  0x8d5\r
- 2579 0531 12                  .uleb128 0x12\r
- 2580 0532 BE010000            .4byte  .LVL32\r
- 2581 0536 E9080000            .4byte  0x8e9\r
- 2582 053a 00                  .byte   0\r
- 2583 053b 0B                  .uleb128 0xb\r
- 2584 053c 6F000000            .4byte  0x6f\r
- 2585 0540 4B050000            .4byte  0x54b\r
- 2586 0544 0C                  .uleb128 0xc\r
- 2587 0545 C0000000            .4byte  0xc0\r
- 2588 0549 06                  .byte   0x6\r
- 2589 054a 00                  .byte   0\r
- 2590 054b 18                  .uleb128 0x18\r
- 2591 054c 3B050000            .4byte  0x53b\r
- 2592 0550 13                  .uleb128 0x13\r
- 2593 0551 01                  .byte   0x1\r
- 2594 0552 42040000            .4byte  .LASF64\r
- 2595 0556 01                  .byte   0x1\r
- 2596 0557 4702                .2byte  0x247\r
- 2597 0559 01                  .byte   0x1\r
- 2598 055a 00000000            .4byte  .LFB2\r
- 2599 055e 60000000            .4byte  .LFE2\r
- 2600 0562 8C000000            .4byte  .LLST4\r
- 2601 0566 01                  .byte   0x1\r
- 2602 0567 8C050000            .4byte  0x58c\r
- 2603 056b 19                  .uleb128 0x19\r
- 2604 056c 1A060000            .4byte  .LASF65\r
- 2605 0570 01                  .byte   0x1\r
- 2606 0571 4702                .2byte  0x247\r
- 2607 0573 7A000000            .4byte  0x7a\r
- 2608 0577 AC000000            .4byte  .LLST5\r
- 2609 057b 19                  .uleb128 0x19\r
- 2610 057c D7030000            .4byte  .LASF66\r
- 2611 0580 01                  .byte   0x1\r
- 2612 0581 4702                .2byte  0x247\r
- 2613 0583 7A000000            .4byte  0x7a\r
- 2614 0587 CD000000            .4byte  .LLST6\r
- 2615 058b 00                  .byte   0\r
- 2616 058c 13                  .uleb128 0x13\r
- 2617 058d 01                  .byte   0x1\r
- 2618 058e 30040000            .4byte  .LASF67\r
- 2619 0592 01                  .byte   0x1\r
- 2620 0593 1303                .2byte  0x313\r
- 2621 0595 01                  .byte   0x1\r
- 2622 0596 00000000            .4byte  .LFB3\r
- 2623 059a D8000000            .4byte  .LFE3\r
- 2624 059e EE000000            .4byte  .LLST7\r
- 2625 05a2 01                  .byte   0x1\r
- 2626 05a3 FD050000            .4byte  0x5fd\r
- 2627 05a7 19                  .uleb128 0x19\r
- 2628 05a8 1A060000            .4byte  .LASF65\r
- 2629 05ac 01                  .byte   0x1\r
- 2630 05ad 1303                .2byte  0x313\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 85\r
-\r
-\r
- 2631 05af 6F000000            .4byte  0x6f\r
- 2632 05b3 0E010000            .4byte  .LLST8\r
- 2633 05b7 19                  .uleb128 0x19\r
- 2634 05b8 D7030000            .4byte  .LASF66\r
- 2635 05bc 01                  .byte   0x1\r
- 2636 05bd 1303                .2byte  0x313\r
- 2637 05bf 7A000000            .4byte  0x7a\r
- 2638 05c3 2F010000            .4byte  .LLST9\r
- 2639 05c7 16                  .uleb128 0x16\r
- 2640 05c8 49010000            .4byte  .LASF68\r
- 2641 05cc 01                  .byte   0x1\r
- 2642 05cd 1503                .2byte  0x315\r
- 2643 05cf 6F000000            .4byte  0x6f\r
- 2644 05d3 50010000            .4byte  .LLST10\r
- 2645 05d7 12                  .uleb128 0x12\r
- 2646 05d8 08000000            .4byte  .LVL37\r
- 2647 05dc 69090000            .4byte  0x969\r
- 2648 05e0 12                  .uleb128 0x12\r
- 2649 05e1 22000000            .4byte  .LVL40\r
- 2650 05e5 0B030000            .4byte  0x30b\r
- 2651 05e9 12                  .uleb128 0x12\r
- 2652 05ea A2000000            .4byte  .LVL41\r
- 2653 05ee 21030000            .4byte  0x321\r
- 2654 05f2 1A                  .uleb128 0x1a\r
- 2655 05f3 BE000000            .4byte  .LVL43\r
- 2656 05f7 01                  .byte   0x1\r
- 2657 05f8 77090000            .4byte  0x977\r
- 2658 05fc 00                  .byte   0\r
- 2659 05fd 1B                  .uleb128 0x1b\r
- 2660 05fe 0B060000            .4byte  .LASF69\r
- 2661 0602 01                  .byte   0x1\r
- 2662 0603 CF04                .2byte  0x4cf\r
- 2663 0605 01                  .byte   0x1\r
- 2664 0606 01                  .byte   0x1\r
- 2665 0607 1B                  .uleb128 0x1b\r
- 2666 0608 B9000000            .4byte  .LASF70\r
- 2667 060c 01                  .byte   0x1\r
- 2668 060d C806                .2byte  0x6c8\r
- 2669 060f 01                  .byte   0x1\r
- 2670 0610 01                  .byte   0x1\r
- 2671 0611 1B                  .uleb128 0x1b\r
- 2672 0612 DB010000            .4byte  .LASF71\r
- 2673 0616 01                  .byte   0x1\r
- 2674 0617 2905                .2byte  0x529\r
- 2675 0619 01                  .byte   0x1\r
- 2676 061a 01                  .byte   0x1\r
- 2677 061b 1B                  .uleb128 0x1b\r
- 2678 061c 75010000            .4byte  .LASF72\r
- 2679 0620 01                  .byte   0x1\r
- 2680 0621 0707                .2byte  0x707\r
- 2681 0623 01                  .byte   0x1\r
- 2682 0624 01                  .byte   0x1\r
- 2683 0625 13                  .uleb128 0x13\r
- 2684 0626 01                  .byte   0x1\r
- 2685 0627 55050000            .4byte  .LASF73\r
- 2686 062b 01                  .byte   0x1\r
- 2687 062c 2304                .2byte  0x423\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 86\r
-\r
-\r
- 2688 062e 01                  .byte   0x1\r
- 2689 062f 00000000            .4byte  .LFB4\r
- 2690 0633 38020000            .4byte  .LFE4\r
- 2691 0637 84010000            .4byte  .LLST11\r
- 2692 063b 01                  .byte   0x1\r
- 2693 063c 2E070000            .4byte  0x72e\r
- 2694 0640 16                  .uleb128 0x16\r
- 2695 0641 49010000            .4byte  .LASF68\r
- 2696 0645 01                  .byte   0x1\r
- 2697 0646 2504                .2byte  0x425\r
- 2698 0648 6F000000            .4byte  0x6f\r
- 2699 064c A4010000            .4byte  .LLST12\r
- 2700 0650 1C                  .uleb128 0x1c\r
- 2701 0651 FD050000            .4byte  0x5fd\r
- 2702 0655 1A000000            .4byte  .LBB10\r
- 2703 0659 00000000            .4byte  .Ldebug_ranges0+0\r
- 2704 065d 01                  .byte   0x1\r
- 2705 065e 3F04                .2byte  0x43f\r
- 2706 0660 B1060000            .4byte  0x6b1\r
- 2707 0664 1D                  .uleb128 0x1d\r
- 2708 0665 07060000            .4byte  0x607\r
- 2709 0669 6C000000            .4byte  .LBB12\r
- 2710 066d EC000000            .4byte  .LBE12\r
- 2711 0671 01                  .byte   0x1\r
- 2712 0672 0405                .2byte  0x504\r
- 2713 0674 94060000            .4byte  0x694\r
- 2714 0678 12                  .uleb128 0x12\r
- 2715 0679 9A000000            .4byte  .LVL48\r
- 2716 067d 8B090000            .4byte  0x98b\r
- 2717 0681 12                  .uleb128 0x12\r
- 2718 0682 CA000000            .4byte  .LVL49\r
- 2719 0686 95090000            .4byte  0x995\r
- 2720 068a 12                  .uleb128 0x12\r
- 2721 068b E6000000            .4byte  .LVL50\r
- 2722 068f 9F090000            .4byte  0x99f\r
- 2723 0693 00                  .byte   0\r
- 2724 0694 10                  .uleb128 0x10\r
- 2725 0695 3C000000            .4byte  .LVL47\r
- 2726 0699 A9090000            .4byte  0x9a9\r
- 2727 069d A7060000            .4byte  0x6a7\r
- 2728 06a1 11                  .uleb128 0x11\r
- 2729 06a2 01                  .byte   0x1\r
- 2730 06a3 50                  .byte   0x50\r
- 2731 06a4 01                  .byte   0x1\r
- 2732 06a5 31                  .byte   0x31\r
- 2733 06a6 00                  .byte   0\r
- 2734 06a7 12                  .uleb128 0x12\r
- 2735 06a8 F2000000            .4byte  .LVL51\r
- 2736 06ac 0B030000            .4byte  0x30b\r
- 2737 06b0 00                  .byte   0\r
- 2738 06b1 1D                  .uleb128 0x1d\r
- 2739 06b2 11060000            .4byte  0x611\r
- 2740 06b6 78010000            .4byte  .LBB16\r
- 2741 06ba EA010000            .4byte  .LBE16\r
- 2742 06be 01                  .byte   0x1\r
- 2743 06bf 7A04                .2byte  0x47a\r
- 2744 06c1 1A070000            .4byte  0x71a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 87\r
-\r
-\r
- 2745 06c5 1D                  .uleb128 0x1d\r
- 2746 06c6 1B060000            .4byte  0x61b\r
- 2747 06ca 78010000            .4byte  .LBB18\r
- 2748 06ce B0010000            .4byte  .LBE18\r
- 2749 06d2 01                  .byte   0x1\r
- 2750 06d3 2C05                .2byte  0x52c\r
- 2751 06d5 F5060000            .4byte  0x6f5\r
- 2752 06d9 12                  .uleb128 0x12\r
- 2753 06da 8E010000            .4byte  .LVL52\r
- 2754 06de C1090000            .4byte  0x9c1\r
- 2755 06e2 12                  .uleb128 0x12\r
- 2756 06e3 A4010000            .4byte  .LVL53\r
- 2757 06e7 DA090000            .4byte  0x9da\r
- 2758 06eb 12                  .uleb128 0x12\r
- 2759 06ec B0010000            .4byte  .LVL54\r
- 2760 06f0 F3090000            .4byte  0x9f3\r
- 2761 06f4 00                  .byte   0\r
- 2762 06f5 12                  .uleb128 0x12\r
- 2763 06f6 B6010000            .4byte  .LVL55\r
- 2764 06fa 21030000            .4byte  0x321\r
- 2765 06fe 12                  .uleb128 0x12\r
- 2766 06ff C0010000            .4byte  .LVL56\r
- 2767 0703 FD090000            .4byte  0x9fd\r
- 2768 0707 12                  .uleb128 0x12\r
- 2769 0708 CA010000            .4byte  .LVL57\r
- 2770 070c 070A0000            .4byte  0xa07\r
- 2771 0710 12                  .uleb128 0x12\r
- 2772 0711 D0010000            .4byte  .LVL58\r
- 2773 0715 A9090000            .4byte  0x9a9\r
- 2774 0719 00                  .byte   0\r
- 2775 071a 12                  .uleb128 0x12\r
- 2776 071b 06000000            .4byte  .LVL44\r
- 2777 071f 69090000            .4byte  0x969\r
- 2778 0723 1A                  .uleb128 0x1a\r
- 2779 0724 04020000            .4byte  .LVL60\r
- 2780 0728 01                  .byte   0x1\r
- 2781 0729 77090000            .4byte  0x977\r
- 2782 072d 00                  .byte   0\r
- 2783 072e 1E                  .uleb128 0x1e\r
- 2784 072f 01                  .byte   0x1\r
- 2785 0730 98050000            .4byte  .LASF114\r
- 2786 0734 01                  .byte   0x1\r
- 2787 0735 A304                .2byte  0x4a3\r
- 2788 0737 01                  .byte   0x1\r
- 2789 0738 6F000000            .4byte  0x6f\r
- 2790 073c 00000000            .4byte  .LFB5\r
- 2791 0740 2C000000            .4byte  .LFE5\r
- 2792 0744 D8010000            .4byte  .LLST13\r
- 2793 0748 01                  .byte   0x1\r
- 2794 0749 A0070000            .4byte  0x7a0\r
- 2795 074d 19                  .uleb128 0x19\r
- 2796 074e EA010000            .4byte  .LASF74\r
- 2797 0752 01                  .byte   0x1\r
- 2798 0753 A304                .2byte  0x4a3\r
- 2799 0755 6F000000            .4byte  0x6f\r
- 2800 0759 F8010000            .4byte  .LLST14\r
- 2801 075d 17                  .uleb128 0x17\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 88\r
-\r
-\r
- 2802 075e 96060000            .4byte  .LASF75\r
- 2803 0762 01                  .byte   0x1\r
- 2804 0763 A504                .2byte  0x4a5\r
- 2805 0765 6F000000            .4byte  0x6f\r
- 2806 0769 05                  .byte   0x5\r
- 2807 076a 03                  .byte   0x3\r
- 2808 076b 42000000            .4byte  interruptStatus.4773\r
- 2809 076f 16                  .uleb128 0x16\r
- 2810 0770 49010000            .4byte  .LASF68\r
- 2811 0774 01                  .byte   0x1\r
- 2812 0775 A604                .2byte  0x4a6\r
- 2813 0777 6F000000            .4byte  0x6f\r
- 2814 077b 19020000            .4byte  .LLST15\r
- 2815 077f 17                  .uleb128 0x17\r
- 2816 0780 CF000000            .4byte  .LASF76\r
- 2817 0784 01                  .byte   0x1\r
- 2818 0785 A704                .2byte  0x4a7\r
- 2819 0787 6F000000            .4byte  0x6f\r
- 2820 078b 01                  .byte   0x1\r
- 2821 078c 54                  .byte   0x54\r
- 2822 078d 12                  .uleb128 0x12\r
- 2823 078e 08000000            .4byte  .LVL62\r
- 2824 0792 69090000            .4byte  0x969\r
- 2825 0796 12                  .uleb128 0x12\r
- 2826 0797 20000000            .4byte  .LVL64\r
- 2827 079b 77090000            .4byte  0x977\r
- 2828 079f 00                  .byte   0\r
- 2829 07a0 13                  .uleb128 0x13\r
- 2830 07a1 01                  .byte   0x1\r
- 2831 07a2 C8050000            .4byte  .LASF77\r
- 2832 07a6 01                  .byte   0x1\r
- 2833 07a7 6605                .2byte  0x566\r
- 2834 07a9 01                  .byte   0x1\r
- 2835 07aa 00000000            .4byte  .LFB8\r
- 2836 07ae 54000000            .4byte  .LFE8\r
- 2837 07b2 2C020000            .4byte  .LLST16\r
- 2838 07b6 01                  .byte   0x1\r
- 2839 07b7 D5070000            .4byte  0x7d5\r
- 2840 07bb 19                  .uleb128 0x19\r
- 2841 07bc CA020000            .4byte  .LASF78\r
- 2842 07c0 01                  .byte   0x1\r
- 2843 07c1 6605                .2byte  0x566\r
- 2844 07c3 6F000000            .4byte  0x6f\r
- 2845 07c7 4C020000            .4byte  .LLST17\r
- 2846 07cb 12                  .uleb128 0x12\r
- 2847 07cc 12000000            .4byte  .LVL67\r
- 2848 07d0 FD090000            .4byte  0x9fd\r
- 2849 07d4 00                  .byte   0\r
- 2850 07d5 13                  .uleb128 0x13\r
- 2851 07d6 01                  .byte   0x1\r
- 2852 07d7 A9040000            .4byte  .LASF79\r
- 2853 07db 01                  .byte   0x1\r
- 2854 07dc 9A05                .2byte  0x59a\r
- 2855 07de 01                  .byte   0x1\r
- 2856 07df 00000000            .4byte  .LFB9\r
- 2857 07e3 2C000000            .4byte  .LFE9\r
- 2858 07e7 6D020000            .4byte  .LLST18\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 89\r
-\r
-\r
- 2859 07eb 01                  .byte   0x1\r
- 2860 07ec FA070000            .4byte  0x7fa\r
- 2861 07f0 12                  .uleb128 0x12\r
- 2862 07f1 0E000000            .4byte  .LVL68\r
- 2863 07f5 110A0000            .4byte  0xa11\r
- 2864 07f9 00                  .byte   0\r
- 2865 07fa 13                  .uleb128 0x13\r
- 2866 07fb 01                  .byte   0x1\r
- 2867 07fc EC000000            .4byte  .LASF80\r
- 2868 0800 01                  .byte   0x1\r
- 2869 0801 BF05                .2byte  0x5bf\r
- 2870 0803 01                  .byte   0x1\r
- 2871 0804 00000000            .4byte  .LFB10\r
- 2872 0808 50000000            .4byte  .LFE10\r
- 2873 080c 8D020000            .4byte  .LLST19\r
- 2874 0810 01                  .byte   0x1\r
- 2875 0811 2F080000            .4byte  0x82f\r
- 2876 0815 19                  .uleb128 0x19\r
- 2877 0816 79050000            .4byte  .LASF81\r
- 2878 081a 01                  .byte   0x1\r
- 2879 081b BF05                .2byte  0x5bf\r
- 2880 081d 6F000000            .4byte  0x6f\r
- 2881 0821 AD020000            .4byte  .LLST20\r
- 2882 0825 12                  .uleb128 0x12\r
- 2883 0826 12000000            .4byte  .LVL71\r
- 2884 082a 070A0000            .4byte  0xa07\r
- 2885 082e 00                  .byte   0\r
- 2886 082f 1F                  .uleb128 0x1f\r
- 2887 0830 78060000            .4byte  .LASF82\r
- 2888 0834 01                  .byte   0x1\r
- 2889 0835 1F                  .byte   0x1f\r
- 2890 0836 FF020000            .4byte  0x2ff\r
- 2891 083a 05                  .byte   0x5\r
- 2892 083b 03                  .byte   0x3\r
- 2893 083c 00000000            .4byte  cyPmBackup\r
- 2894 0840 1F                  .uleb128 0x1f\r
- 2895 0841 C3040000            .4byte  .LASF83\r
- 2896 0845 01                  .byte   0x1\r
- 2897 0846 20                  .byte   0x20\r
- 2898 0847 A9010000            .4byte  0x1a9\r
- 2899 084b 05                  .byte   0x5\r
- 2900 084c 03                  .byte   0x3\r
- 2901 084d 30000000            .4byte  cyPmClockBackup\r
- 2902 0851 1F                  .uleb128 0x1f\r
- 2903 0852 85050000            .4byte  .LASF84\r
- 2904 0856 01                  .byte   0x1\r
- 2905 0857 23                  .byte   0x23\r
- 2906 0858 62080000            .4byte  0x862\r
- 2907 085c 05                  .byte   0x5\r
- 2908 085d 03                  .byte   0x3\r
- 2909 085e 00000000            .4byte  cyPmImoFreqReg2Mhz\r
- 2910 0862 18                  .uleb128 0x18\r
- 2911 0863 3B050000            .4byte  0x53b\r
- 2912 0867 20                  .uleb128 0x20\r
- 2913 0868 01                  .byte   0x1\r
- 2914 0869 63050000            .4byte  .LASF85\r
- 2915 086d 04                  .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 90\r
-\r
-\r
- 2916 086e 4B                  .byte   0x4b\r
- 2917 086f 01                  .byte   0x1\r
- 2918 0870 01                  .byte   0x1\r
- 2919 0871 7B080000            .4byte  0x87b\r
- 2920 0875 21                  .uleb128 0x21\r
- 2921 0876 6F000000            .4byte  0x6f\r
- 2922 087a 00                  .byte   0\r
- 2923 087b 20                  .uleb128 0x20\r
- 2924 087c 01                  .byte   0x1\r
- 2925 087d E9050000            .4byte  .LASF86\r
- 2926 0881 05                  .byte   0x5\r
- 2927 0882 49                  .byte   0x49\r
- 2928 0883 01                  .byte   0x1\r
- 2929 0884 01                  .byte   0x1\r
- 2930 0885 8F080000            .4byte  0x88f\r
- 2931 0889 21                  .uleb128 0x21\r
- 2932 088a 6F000000            .4byte  0x6f\r
- 2933 088e 00                  .byte   0\r
- 2934 088f 20                  .uleb128 0x20\r
- 2935 0890 01                  .byte   0x1\r
- 2936 0891 1B000000            .4byte  .LASF87\r
- 2937 0895 05                  .byte   0x5\r
- 2938 0896 47                  .byte   0x47\r
- 2939 0897 01                  .byte   0x1\r
- 2940 0898 01                  .byte   0x1\r
- 2941 0899 A3080000            .4byte  0x8a3\r
- 2942 089d 21                  .uleb128 0x21\r
- 2943 089e 6F000000            .4byte  0x6f\r
- 2944 08a2 00                  .byte   0\r
- 2945 08a3 20                  .uleb128 0x20\r
- 2946 08a4 01                  .byte   0x1\r
- 2947 08a5 10020000            .4byte  .LASF88\r
- 2948 08a9 05                  .byte   0x5\r
- 2949 08aa 4A                  .byte   0x4a\r
- 2950 08ab 01                  .byte   0x1\r
- 2951 08ac 01                  .byte   0x1\r
- 2952 08ad B7080000            .4byte  0x8b7\r
- 2953 08b1 21                  .uleb128 0x21\r
- 2954 08b2 6F000000            .4byte  0x6f\r
- 2955 08b6 00                  .byte   0\r
- 2956 08b7 22                  .uleb128 0x22\r
- 2957 08b8 01                  .byte   0x1\r
- 2958 08b9 1D050000            .4byte  .LASF92\r
- 2959 08bd 05                  .byte   0x5\r
- 2960 08be 4C                  .byte   0x4c\r
- 2961 08bf 01                  .byte   0x1\r
- 2962 08c0 01                  .byte   0x1\r
- 2963 08c1 20                  .uleb128 0x20\r
- 2964 08c2 01                  .byte   0x1\r
- 2965 08c3 F3030000            .4byte  .LASF89\r
- 2966 08c7 05                  .byte   0x5\r
- 2967 08c8 4F                  .byte   0x4f\r
- 2968 08c9 01                  .byte   0x1\r
- 2969 08ca 01                  .byte   0x1\r
- 2970 08cb D5080000            .4byte  0x8d5\r
- 2971 08cf 21                  .uleb128 0x21\r
- 2972 08d0 6F000000            .4byte  0x6f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 91\r
-\r
-\r
- 2973 08d4 00                  .byte   0\r
- 2974 08d5 20                  .uleb128 0x20\r
- 2975 08d6 01                  .byte   0x1\r
- 2976 08d7 EA020000            .4byte  .LASF90\r
- 2977 08db 05                  .byte   0x5\r
- 2978 08dc 4E                  .byte   0x4e\r
- 2979 08dd 01                  .byte   0x1\r
- 2980 08de 01                  .byte   0x1\r
- 2981 08df E9080000            .4byte  0x8e9\r
- 2982 08e3 21                  .uleb128 0x21\r
- 2983 08e4 6F000000            .4byte  0x6f\r
- 2984 08e8 00                  .byte   0\r
- 2985 08e9 20                  .uleb128 0x20\r
- 2986 08ea 01                  .byte   0x1\r
- 2987 08eb A7050000            .4byte  .LASF91\r
- 2988 08ef 05                  .byte   0x5\r
- 2989 08f0 50                  .byte   0x50\r
- 2990 08f1 01                  .byte   0x1\r
- 2991 08f2 01                  .byte   0x1\r
- 2992 08f3 FD080000            .4byte  0x8fd\r
- 2993 08f7 21                  .uleb128 0x21\r
- 2994 08f8 7A000000            .4byte  0x7a\r
- 2995 08fc 00                  .byte   0\r
- 2996 08fd 22                  .uleb128 0x22\r
- 2997 08fe 01                  .byte   0x1\r
- 2998 08ff E4030000            .4byte  .LASF93\r
- 2999 0903 05                  .byte   0x5\r
- 3000 0904 43                  .byte   0x43\r
- 3001 0905 01                  .byte   0x1\r
- 3002 0906 01                  .byte   0x1\r
- 3003 0907 22                  .uleb128 0x22\r
- 3004 0908 01                  .byte   0x1\r
- 3005 0909 6C060000            .4byte  .LASF94\r
- 3006 090d 05                  .byte   0x5\r
- 3007 090e 67                  .byte   0x67\r
- 3008 090f 01                  .byte   0x1\r
- 3009 0910 01                  .byte   0x1\r
- 3010 0911 20                  .uleb128 0x20\r
- 3011 0912 01                  .byte   0x1\r
- 3012 0913 4D040000            .4byte  .LASF95\r
- 3013 0917 05                  .byte   0x5\r
- 3014 0918 7A                  .byte   0x7a\r
- 3015 0919 01                  .byte   0x1\r
- 3016 091a 01                  .byte   0x1\r
- 3017 091b 25090000            .4byte  0x925\r
- 3018 091f 21                  .uleb128 0x21\r
- 3019 0920 85000000            .4byte  0x85\r
- 3020 0924 00                  .byte   0\r
- 3021 0925 23                  .uleb128 0x23\r
- 3022 0926 01                  .byte   0x1\r
- 3023 0927 84030000            .4byte  .LASF98\r
- 3024 092b 05                  .byte   0x5\r
- 3025 092c 66                  .byte   0x66\r
- 3026 092d 01                  .byte   0x1\r
- 3027 092e A5000000            .4byte  0xa5\r
- 3028 0932 01                  .byte   0x1\r
- 3029 0933 3D090000            .4byte  0x93d\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 92\r
-\r
-\r
- 3030 0937 21                  .uleb128 0x21\r
- 3031 0938 6F000000            .4byte  0x6f\r
- 3032 093c 00                  .byte   0\r
- 3033 093d 22                  .uleb128 0x22\r
- 3034 093e 01                  .byte   0x1\r
- 3035 093f 92020000            .4byte  .LASF96\r
- 3036 0943 05                  .byte   0x5\r
- 3037 0944 48                  .byte   0x48\r
- 3038 0945 01                  .byte   0x1\r
- 3039 0946 01                  .byte   0x1\r
- 3040 0947 22                  .uleb128 0x22\r
- 3041 0948 01                  .byte   0x1\r
- 3042 0949 F7050000            .4byte  .LASF97\r
- 3043 094d 05                  .byte   0x5\r
- 3044 094e 4B                  .byte   0x4b\r
- 3045 094f 01                  .byte   0x1\r
- 3046 0950 01                  .byte   0x1\r
- 3047 0951 23                  .uleb128 0x23\r
- 3048 0952 01                  .byte   0x1\r
- 3049 0953 8D010000            .4byte  .LASF99\r
- 3050 0957 05                  .byte   0x5\r
- 3051 0958 42                  .byte   0x42\r
- 3052 0959 01                  .byte   0x1\r
- 3053 095a A5000000            .4byte  0xa5\r
- 3054 095e 01                  .byte   0x1\r
- 3055 095f 69090000            .4byte  0x969\r
- 3056 0963 21                  .uleb128 0x21\r
- 3057 0964 6F000000            .4byte  0x6f\r
- 3058 0968 00                  .byte   0\r
- 3059 0969 24                  .uleb128 0x24\r
- 3060 096a 01                  .byte   0x1\r
- 3061 096b 57020000            .4byte  .LASF115\r
- 3062 096f 05                  .byte   0x5\r
- 3063 0970 7E                  .byte   0x7e\r
- 3064 0971 01                  .byte   0x1\r
- 3065 0972 6F000000            .4byte  0x6f\r
- 3066 0976 01                  .byte   0x1\r
- 3067 0977 20                  .uleb128 0x20\r
- 3068 0978 01                  .byte   0x1\r
- 3069 0979 1A040000            .4byte  .LASF100\r
- 3070 097d 05                  .byte   0x5\r
- 3071 097e 7F                  .byte   0x7f\r
- 3072 097f 01                  .byte   0x1\r
- 3073 0980 01                  .byte   0x1\r
- 3074 0981 8B090000            .4byte  0x98b\r
- 3075 0985 21                  .uleb128 0x21\r
- 3076 0986 6F000000            .4byte  0x6f\r
- 3077 098a 00                  .byte   0\r
- 3078 098b 22                  .uleb128 0x22\r
- 3079 098c 01                  .byte   0x1\r
- 3080 098d 32050000            .4byte  .LASF101\r
- 3081 0991 05                  .byte   0x5\r
- 3082 0992 9D                  .byte   0x9d\r
- 3083 0993 01                  .byte   0x1\r
- 3084 0994 01                  .byte   0x1\r
- 3085 0995 22                  .uleb128 0x22\r
- 3086 0996 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 93\r
-\r
-\r
- 3087 0997 00000000            .4byte  .LASF102\r
- 3088 099b 05                  .byte   0x5\r
- 3089 099c 9E                  .byte   0x9e\r
- 3090 099d 01                  .byte   0x1\r
- 3091 099e 01                  .byte   0x1\r
- 3092 099f 22                  .uleb128 0x22\r
- 3093 09a0 01                  .byte   0x1\r
- 3094 09a1 D6020000            .4byte  .LASF103\r
- 3095 09a5 05                  .byte   0x5\r
- 3096 09a6 A0                  .byte   0xa0\r
- 3097 09a7 01                  .byte   0x1\r
- 3098 09a8 01                  .byte   0x1\r
- 3099 09a9 23                  .uleb128 0x23\r
- 3100 09aa 01                  .byte   0x1\r
- 3101 09ab 7F020000            .4byte  .LASF104\r
- 3102 09af 05                  .byte   0x5\r
- 3103 09b0 5F                  .byte   0x5f\r
- 3104 09b1 01                  .byte   0x1\r
- 3105 09b2 6F000000            .4byte  0x6f\r
- 3106 09b6 01                  .byte   0x1\r
- 3107 09b7 C1090000            .4byte  0x9c1\r
- 3108 09bb 21                  .uleb128 0x21\r
- 3109 09bc 6F000000            .4byte  0x6f\r
- 3110 09c0 00                  .byte   0\r
- 3111 09c1 20                  .uleb128 0x20\r
- 3112 09c2 01                  .byte   0x1\r
- 3113 09c3 06010000            .4byte  .LASF105\r
- 3114 09c7 05                  .byte   0x5\r
- 3115 09c8 9B                  .byte   0x9b\r
- 3116 09c9 01                  .byte   0x1\r
- 3117 09ca 01                  .byte   0x1\r
- 3118 09cb DA090000            .4byte  0x9da\r
- 3119 09cf 21                  .uleb128 0x21\r
- 3120 09d0 6F000000            .4byte  0x6f\r
- 3121 09d4 21                  .uleb128 0x21\r
- 3122 09d5 6F000000            .4byte  0x6f\r
- 3123 09d9 00                  .byte   0\r
- 3124 09da 20                  .uleb128 0x20\r
- 3125 09db 01                  .byte   0x1\r
- 3126 09dc 25060000            .4byte  .LASF106\r
- 3127 09e0 05                  .byte   0x5\r
- 3128 09e1 9C                  .byte   0x9c\r
- 3129 09e2 01                  .byte   0x1\r
- 3130 09e3 01                  .byte   0x1\r
- 3131 09e4 F3090000            .4byte  0x9f3\r
- 3132 09e8 21                  .uleb128 0x21\r
- 3133 09e9 6F000000            .4byte  0x6f\r
- 3134 09ed 21                  .uleb128 0x21\r
- 3135 09ee 6F000000            .4byte  0x6f\r
- 3136 09f2 00                  .byte   0\r
- 3137 09f3 22                  .uleb128 0x22\r
- 3138 09f4 01                  .byte   0x1\r
- 3139 09f5 59060000            .4byte  .LASF107\r
- 3140 09f9 05                  .byte   0x5\r
- 3141 09fa 9F                  .byte   0x9f\r
- 3142 09fb 01                  .byte   0x1\r
- 3143 09fc 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 94\r
-\r
-\r
- 3144 09fd 22                  .uleb128 0x22\r
- 3145 09fe 01                  .byte   0x1\r
- 3146 09ff 58010000            .4byte  .LASF108\r
- 3147 0a03 05                  .byte   0x5\r
- 3148 0a04 58                  .byte   0x58\r
- 3149 0a05 01                  .byte   0x1\r
- 3150 0a06 01                  .byte   0x1\r
- 3151 0a07 22                  .uleb128 0x22\r
- 3152 0a08 01                  .byte   0x1\r
- 3153 0a09 C7030000            .4byte  .LASF109\r
- 3154 0a0d 05                  .byte   0x5\r
- 3155 0a0e 5A                  .byte   0x5a\r
- 3156 0a0f 01                  .byte   0x1\r
- 3157 0a10 01                  .byte   0x1\r
- 3158 0a11 22                  .uleb128 0x22\r
- 3159 0a12 01                  .byte   0x1\r
- 3160 0a13 72000000            .4byte  .LASF110\r
- 3161 0a17 05                  .byte   0x5\r
- 3162 0a18 63                  .byte   0x63\r
- 3163 0a19 01                  .byte   0x1\r
- 3164 0a1a 01                  .byte   0x1\r
- 3165 0a1b 00                  .byte   0\r
- 3166                          .section        .debug_abbrev,"",%progbits\r
- 3167                  .Ldebug_abbrev0:\r
- 3168 0000 01                  .uleb128 0x1\r
- 3169 0001 11                  .uleb128 0x11\r
- 3170 0002 01                  .byte   0x1\r
- 3171 0003 25                  .uleb128 0x25\r
- 3172 0004 0E                  .uleb128 0xe\r
- 3173 0005 13                  .uleb128 0x13\r
- 3174 0006 0B                  .uleb128 0xb\r
- 3175 0007 03                  .uleb128 0x3\r
- 3176 0008 0E                  .uleb128 0xe\r
- 3177 0009 1B                  .uleb128 0x1b\r
- 3178 000a 0E                  .uleb128 0xe\r
- 3179 000b 55                  .uleb128 0x55\r
- 3180 000c 06                  .uleb128 0x6\r
- 3181 000d 11                  .uleb128 0x11\r
- 3182 000e 01                  .uleb128 0x1\r
- 3183 000f 52                  .uleb128 0x52\r
- 3184 0010 01                  .uleb128 0x1\r
- 3185 0011 10                  .uleb128 0x10\r
- 3186 0012 06                  .uleb128 0x6\r
- 3187 0013 00                  .byte   0\r
- 3188 0014 00                  .byte   0\r
- 3189 0015 02                  .uleb128 0x2\r
- 3190 0016 24                  .uleb128 0x24\r
- 3191 0017 00                  .byte   0\r
- 3192 0018 0B                  .uleb128 0xb\r
- 3193 0019 0B                  .uleb128 0xb\r
- 3194 001a 3E                  .uleb128 0x3e\r
- 3195 001b 0B                  .uleb128 0xb\r
- 3196 001c 03                  .uleb128 0x3\r
- 3197 001d 0E                  .uleb128 0xe\r
- 3198 001e 00                  .byte   0\r
- 3199 001f 00                  .byte   0\r
- 3200 0020 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 95\r
-\r
-\r
- 3201 0021 24                  .uleb128 0x24\r
- 3202 0022 00                  .byte   0\r
- 3203 0023 0B                  .uleb128 0xb\r
- 3204 0024 0B                  .uleb128 0xb\r
- 3205 0025 3E                  .uleb128 0x3e\r
- 3206 0026 0B                  .uleb128 0xb\r
- 3207 0027 03                  .uleb128 0x3\r
- 3208 0028 08                  .uleb128 0x8\r
- 3209 0029 00                  .byte   0\r
- 3210 002a 00                  .byte   0\r
- 3211 002b 04                  .uleb128 0x4\r
- 3212 002c 16                  .uleb128 0x16\r
- 3213 002d 00                  .byte   0\r
- 3214 002e 03                  .uleb128 0x3\r
- 3215 002f 0E                  .uleb128 0xe\r
- 3216 0030 3A                  .uleb128 0x3a\r
- 3217 0031 0B                  .uleb128 0xb\r
- 3218 0032 3B                  .uleb128 0x3b\r
- 3219 0033 0B                  .uleb128 0xb\r
- 3220 0034 49                  .uleb128 0x49\r
- 3221 0035 13                  .uleb128 0x13\r
- 3222 0036 00                  .byte   0\r
- 3223 0037 00                  .byte   0\r
- 3224 0038 05                  .uleb128 0x5\r
- 3225 0039 35                  .uleb128 0x35\r
- 3226 003a 00                  .byte   0\r
- 3227 003b 49                  .uleb128 0x49\r
- 3228 003c 13                  .uleb128 0x13\r
- 3229 003d 00                  .byte   0\r
- 3230 003e 00                  .byte   0\r
- 3231 003f 06                  .uleb128 0x6\r
- 3232 0040 13                  .uleb128 0x13\r
- 3233 0041 01                  .byte   0x1\r
- 3234 0042 03                  .uleb128 0x3\r
- 3235 0043 0E                  .uleb128 0xe\r
- 3236 0044 0B                  .uleb128 0xb\r
- 3237 0045 0B                  .uleb128 0xb\r
- 3238 0046 3A                  .uleb128 0x3a\r
- 3239 0047 0B                  .uleb128 0xb\r
- 3240 0048 3B                  .uleb128 0x3b\r
- 3241 0049 0B                  .uleb128 0xb\r
- 3242 004a 01                  .uleb128 0x1\r
- 3243 004b 13                  .uleb128 0x13\r
- 3244 004c 00                  .byte   0\r
- 3245 004d 00                  .byte   0\r
- 3246 004e 07                  .uleb128 0x7\r
- 3247 004f 0D                  .uleb128 0xd\r
- 3248 0050 00                  .byte   0\r
- 3249 0051 03                  .uleb128 0x3\r
- 3250 0052 0E                  .uleb128 0xe\r
- 3251 0053 3A                  .uleb128 0x3a\r
- 3252 0054 0B                  .uleb128 0xb\r
- 3253 0055 3B                  .uleb128 0x3b\r
- 3254 0056 0B                  .uleb128 0xb\r
- 3255 0057 49                  .uleb128 0x49\r
- 3256 0058 13                  .uleb128 0x13\r
- 3257 0059 38                  .uleb128 0x38\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 96\r
-\r
-\r
- 3258 005a 0A                  .uleb128 0xa\r
- 3259 005b 00                  .byte   0\r
- 3260 005c 00                  .byte   0\r
- 3261 005d 08                  .uleb128 0x8\r
- 3262 005e 0D                  .uleb128 0xd\r
- 3263 005f 00                  .byte   0\r
- 3264 0060 03                  .uleb128 0x3\r
- 3265 0061 0E                  .uleb128 0xe\r
- 3266 0062 3A                  .uleb128 0x3a\r
- 3267 0063 0B                  .uleb128 0xb\r
- 3268 0064 3B                  .uleb128 0x3b\r
- 3269 0065 05                  .uleb128 0x5\r
- 3270 0066 49                  .uleb128 0x49\r
- 3271 0067 13                  .uleb128 0x13\r
- 3272 0068 38                  .uleb128 0x38\r
- 3273 0069 0A                  .uleb128 0xa\r
- 3274 006a 00                  .byte   0\r
- 3275 006b 00                  .byte   0\r
- 3276 006c 09                  .uleb128 0x9\r
- 3277 006d 16                  .uleb128 0x16\r
- 3278 006e 00                  .byte   0\r
- 3279 006f 03                  .uleb128 0x3\r
- 3280 0070 0E                  .uleb128 0xe\r
- 3281 0071 3A                  .uleb128 0x3a\r
- 3282 0072 0B                  .uleb128 0xb\r
- 3283 0073 3B                  .uleb128 0x3b\r
- 3284 0074 05                  .uleb128 0x5\r
- 3285 0075 49                  .uleb128 0x49\r
- 3286 0076 13                  .uleb128 0x13\r
- 3287 0077 00                  .byte   0\r
- 3288 0078 00                  .byte   0\r
- 3289 0079 0A                  .uleb128 0xa\r
- 3290 007a 13                  .uleb128 0x13\r
- 3291 007b 01                  .byte   0x1\r
- 3292 007c 03                  .uleb128 0x3\r
- 3293 007d 0E                  .uleb128 0xe\r
- 3294 007e 0B                  .uleb128 0xb\r
- 3295 007f 0B                  .uleb128 0xb\r
- 3296 0080 3A                  .uleb128 0x3a\r
- 3297 0081 0B                  .uleb128 0xb\r
- 3298 0082 3B                  .uleb128 0x3b\r
- 3299 0083 05                  .uleb128 0x5\r
- 3300 0084 01                  .uleb128 0x1\r
- 3301 0085 13                  .uleb128 0x13\r
- 3302 0086 00                  .byte   0\r
- 3303 0087 00                  .byte   0\r
- 3304 0088 0B                  .uleb128 0xb\r
- 3305 0089 01                  .uleb128 0x1\r
- 3306 008a 01                  .byte   0x1\r
- 3307 008b 49                  .uleb128 0x49\r
- 3308 008c 13                  .uleb128 0x13\r
- 3309 008d 01                  .uleb128 0x1\r
- 3310 008e 13                  .uleb128 0x13\r
- 3311 008f 00                  .byte   0\r
- 3312 0090 00                  .byte   0\r
- 3313 0091 0C                  .uleb128 0xc\r
- 3314 0092 21                  .uleb128 0x21\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 97\r
-\r
-\r
- 3315 0093 00                  .byte   0\r
- 3316 0094 49                  .uleb128 0x49\r
- 3317 0095 13                  .uleb128 0x13\r
- 3318 0096 2F                  .uleb128 0x2f\r
- 3319 0097 0B                  .uleb128 0xb\r
- 3320 0098 00                  .byte   0\r
- 3321 0099 00                  .byte   0\r
- 3322 009a 0D                  .uleb128 0xd\r
- 3323 009b 2E                  .uleb128 0x2e\r
- 3324 009c 00                  .byte   0\r
- 3325 009d 03                  .uleb128 0x3\r
- 3326 009e 0E                  .uleb128 0xe\r
- 3327 009f 3A                  .uleb128 0x3a\r
- 3328 00a0 0B                  .uleb128 0xb\r
- 3329 00a1 3B                  .uleb128 0x3b\r
- 3330 00a2 05                  .uleb128 0x5\r
- 3331 00a3 27                  .uleb128 0x27\r
- 3332 00a4 0C                  .uleb128 0xc\r
- 3333 00a5 11                  .uleb128 0x11\r
- 3334 00a6 01                  .uleb128 0x1\r
- 3335 00a7 12                  .uleb128 0x12\r
- 3336 00a8 01                  .uleb128 0x1\r
- 3337 00a9 40                  .uleb128 0x40\r
- 3338 00aa 06                  .uleb128 0x6\r
- 3339 00ab 9742                .uleb128 0x2117\r
- 3340 00ad 0C                  .uleb128 0xc\r
- 3341 00ae 00                  .byte   0\r
- 3342 00af 00                  .byte   0\r
- 3343 00b0 0E                  .uleb128 0xe\r
- 3344 00b1 2E                  .uleb128 0x2e\r
- 3345 00b2 00                  .byte   0\r
- 3346 00b3 03                  .uleb128 0x3\r
- 3347 00b4 0E                  .uleb128 0xe\r
- 3348 00b5 3A                  .uleb128 0x3a\r
- 3349 00b6 0B                  .uleb128 0xb\r
- 3350 00b7 3B                  .uleb128 0x3b\r
- 3351 00b8 05                  .uleb128 0x5\r
- 3352 00b9 27                  .uleb128 0x27\r
- 3353 00ba 0C                  .uleb128 0xc\r
- 3354 00bb 11                  .uleb128 0x11\r
- 3355 00bc 01                  .uleb128 0x1\r
- 3356 00bd 12                  .uleb128 0x12\r
- 3357 00be 01                  .uleb128 0x1\r
- 3358 00bf 40                  .uleb128 0x40\r
- 3359 00c0 0A                  .uleb128 0xa\r
- 3360 00c1 9742                .uleb128 0x2117\r
- 3361 00c3 0C                  .uleb128 0xc\r
- 3362 00c4 00                  .byte   0\r
- 3363 00c5 00                  .byte   0\r
- 3364 00c6 0F                  .uleb128 0xf\r
- 3365 00c7 2E                  .uleb128 0x2e\r
- 3366 00c8 01                  .byte   0x1\r
- 3367 00c9 3F                  .uleb128 0x3f\r
- 3368 00ca 0C                  .uleb128 0xc\r
- 3369 00cb 03                  .uleb128 0x3\r
- 3370 00cc 0E                  .uleb128 0xe\r
- 3371 00cd 3A                  .uleb128 0x3a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 98\r
-\r
-\r
- 3372 00ce 0B                  .uleb128 0xb\r
- 3373 00cf 3B                  .uleb128 0x3b\r
- 3374 00d0 0B                  .uleb128 0xb\r
- 3375 00d1 27                  .uleb128 0x27\r
- 3376 00d2 0C                  .uleb128 0xc\r
- 3377 00d3 11                  .uleb128 0x11\r
- 3378 00d4 01                  .uleb128 0x1\r
- 3379 00d5 12                  .uleb128 0x12\r
- 3380 00d6 01                  .uleb128 0x1\r
- 3381 00d7 40                  .uleb128 0x40\r
- 3382 00d8 06                  .uleb128 0x6\r
- 3383 00d9 9742                .uleb128 0x2117\r
- 3384 00db 0C                  .uleb128 0xc\r
- 3385 00dc 01                  .uleb128 0x1\r
- 3386 00dd 13                  .uleb128 0x13\r
- 3387 00de 00                  .byte   0\r
- 3388 00df 00                  .byte   0\r
- 3389 00e0 10                  .uleb128 0x10\r
- 3390 00e1 898201              .uleb128 0x4109\r
- 3391 00e4 01                  .byte   0x1\r
- 3392 00e5 11                  .uleb128 0x11\r
- 3393 00e6 01                  .uleb128 0x1\r
- 3394 00e7 31                  .uleb128 0x31\r
- 3395 00e8 13                  .uleb128 0x13\r
- 3396 00e9 01                  .uleb128 0x1\r
- 3397 00ea 13                  .uleb128 0x13\r
- 3398 00eb 00                  .byte   0\r
- 3399 00ec 00                  .byte   0\r
- 3400 00ed 11                  .uleb128 0x11\r
- 3401 00ee 8A8201              .uleb128 0x410a\r
- 3402 00f1 00                  .byte   0\r
- 3403 00f2 02                  .uleb128 0x2\r
- 3404 00f3 0A                  .uleb128 0xa\r
- 3405 00f4 9142                .uleb128 0x2111\r
- 3406 00f6 0A                  .uleb128 0xa\r
- 3407 00f7 00                  .byte   0\r
- 3408 00f8 00                  .byte   0\r
- 3409 00f9 12                  .uleb128 0x12\r
- 3410 00fa 898201              .uleb128 0x4109\r
- 3411 00fd 00                  .byte   0\r
- 3412 00fe 11                  .uleb128 0x11\r
- 3413 00ff 01                  .uleb128 0x1\r
- 3414 0100 31                  .uleb128 0x31\r
- 3415 0101 13                  .uleb128 0x13\r
- 3416 0102 00                  .byte   0\r
- 3417 0103 00                  .byte   0\r
- 3418 0104 13                  .uleb128 0x13\r
- 3419 0105 2E                  .uleb128 0x2e\r
- 3420 0106 01                  .byte   0x1\r
- 3421 0107 3F                  .uleb128 0x3f\r
- 3422 0108 0C                  .uleb128 0xc\r
- 3423 0109 03                  .uleb128 0x3\r
- 3424 010a 0E                  .uleb128 0xe\r
- 3425 010b 3A                  .uleb128 0x3a\r
- 3426 010c 0B                  .uleb128 0xb\r
- 3427 010d 3B                  .uleb128 0x3b\r
- 3428 010e 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 99\r
-\r
-\r
- 3429 010f 27                  .uleb128 0x27\r
- 3430 0110 0C                  .uleb128 0xc\r
- 3431 0111 11                  .uleb128 0x11\r
- 3432 0112 01                  .uleb128 0x1\r
- 3433 0113 12                  .uleb128 0x12\r
- 3434 0114 01                  .uleb128 0x1\r
- 3435 0115 40                  .uleb128 0x40\r
- 3436 0116 06                  .uleb128 0x6\r
- 3437 0117 9742                .uleb128 0x2117\r
- 3438 0119 0C                  .uleb128 0xc\r
- 3439 011a 01                  .uleb128 0x1\r
- 3440 011b 13                  .uleb128 0x13\r
- 3441 011c 00                  .byte   0\r
- 3442 011d 00                  .byte   0\r
- 3443 011e 14                  .uleb128 0x14\r
- 3444 011f 34                  .uleb128 0x34\r
- 3445 0120 00                  .byte   0\r
- 3446 0121 03                  .uleb128 0x3\r
- 3447 0122 0E                  .uleb128 0xe\r
- 3448 0123 3A                  .uleb128 0x3a\r
- 3449 0124 0B                  .uleb128 0xb\r
- 3450 0125 3B                  .uleb128 0x3b\r
- 3451 0126 05                  .uleb128 0x5\r
- 3452 0127 49                  .uleb128 0x49\r
- 3453 0128 13                  .uleb128 0x13\r
- 3454 0129 1C                  .uleb128 0x1c\r
- 3455 012a 0B                  .uleb128 0xb\r
- 3456 012b 00                  .byte   0\r
- 3457 012c 00                  .byte   0\r
- 3458 012d 15                  .uleb128 0x15\r
- 3459 012e 34                  .uleb128 0x34\r
- 3460 012f 00                  .byte   0\r
- 3461 0130 03                  .uleb128 0x3\r
- 3462 0131 08                  .uleb128 0x8\r
- 3463 0132 3A                  .uleb128 0x3a\r
- 3464 0133 0B                  .uleb128 0xb\r
- 3465 0134 3B                  .uleb128 0x3b\r
- 3466 0135 05                  .uleb128 0x5\r
- 3467 0136 49                  .uleb128 0x49\r
- 3468 0137 13                  .uleb128 0x13\r
- 3469 0138 00                  .byte   0\r
- 3470 0139 00                  .byte   0\r
- 3471 013a 16                  .uleb128 0x16\r
- 3472 013b 34                  .uleb128 0x34\r
- 3473 013c 00                  .byte   0\r
- 3474 013d 03                  .uleb128 0x3\r
- 3475 013e 0E                  .uleb128 0xe\r
- 3476 013f 3A                  .uleb128 0x3a\r
- 3477 0140 0B                  .uleb128 0xb\r
- 3478 0141 3B                  .uleb128 0x3b\r
- 3479 0142 05                  .uleb128 0x5\r
- 3480 0143 49                  .uleb128 0x49\r
- 3481 0144 13                  .uleb128 0x13\r
- 3482 0145 02                  .uleb128 0x2\r
- 3483 0146 06                  .uleb128 0x6\r
- 3484 0147 00                  .byte   0\r
- 3485 0148 00                  .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 100\r
-\r
-\r
- 3486 0149 17                  .uleb128 0x17\r
- 3487 014a 34                  .uleb128 0x34\r
- 3488 014b 00                  .byte   0\r
- 3489 014c 03                  .uleb128 0x3\r
- 3490 014d 0E                  .uleb128 0xe\r
- 3491 014e 3A                  .uleb128 0x3a\r
- 3492 014f 0B                  .uleb128 0xb\r
- 3493 0150 3B                  .uleb128 0x3b\r
- 3494 0151 05                  .uleb128 0x5\r
- 3495 0152 49                  .uleb128 0x49\r
- 3496 0153 13                  .uleb128 0x13\r
- 3497 0154 02                  .uleb128 0x2\r
- 3498 0155 0A                  .uleb128 0xa\r
- 3499 0156 00                  .byte   0\r
- 3500 0157 00                  .byte   0\r
- 3501 0158 18                  .uleb128 0x18\r
- 3502 0159 26                  .uleb128 0x26\r
- 3503 015a 00                  .byte   0\r
- 3504 015b 49                  .uleb128 0x49\r
- 3505 015c 13                  .uleb128 0x13\r
- 3506 015d 00                  .byte   0\r
- 3507 015e 00                  .byte   0\r
- 3508 015f 19                  .uleb128 0x19\r
- 3509 0160 05                  .uleb128 0x5\r
- 3510 0161 00                  .byte   0\r
- 3511 0162 03                  .uleb128 0x3\r
- 3512 0163 0E                  .uleb128 0xe\r
- 3513 0164 3A                  .uleb128 0x3a\r
- 3514 0165 0B                  .uleb128 0xb\r
- 3515 0166 3B                  .uleb128 0x3b\r
- 3516 0167 05                  .uleb128 0x5\r
- 3517 0168 49                  .uleb128 0x49\r
- 3518 0169 13                  .uleb128 0x13\r
- 3519 016a 02                  .uleb128 0x2\r
- 3520 016b 06                  .uleb128 0x6\r
- 3521 016c 00                  .byte   0\r
- 3522 016d 00                  .byte   0\r
- 3523 016e 1A                  .uleb128 0x1a\r
- 3524 016f 898201              .uleb128 0x4109\r
- 3525 0172 00                  .byte   0\r
- 3526 0173 11                  .uleb128 0x11\r
- 3527 0174 01                  .uleb128 0x1\r
- 3528 0175 9542                .uleb128 0x2115\r
- 3529 0177 0C                  .uleb128 0xc\r
- 3530 0178 31                  .uleb128 0x31\r
- 3531 0179 13                  .uleb128 0x13\r
- 3532 017a 00                  .byte   0\r
- 3533 017b 00                  .byte   0\r
- 3534 017c 1B                  .uleb128 0x1b\r
- 3535 017d 2E                  .uleb128 0x2e\r
- 3536 017e 00                  .byte   0\r
- 3537 017f 03                  .uleb128 0x3\r
- 3538 0180 0E                  .uleb128 0xe\r
- 3539 0181 3A                  .uleb128 0x3a\r
- 3540 0182 0B                  .uleb128 0xb\r
- 3541 0183 3B                  .uleb128 0x3b\r
- 3542 0184 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 101\r
-\r
-\r
- 3543 0185 27                  .uleb128 0x27\r
- 3544 0186 0C                  .uleb128 0xc\r
- 3545 0187 20                  .uleb128 0x20\r
- 3546 0188 0B                  .uleb128 0xb\r
- 3547 0189 00                  .byte   0\r
- 3548 018a 00                  .byte   0\r
- 3549 018b 1C                  .uleb128 0x1c\r
- 3550 018c 1D                  .uleb128 0x1d\r
- 3551 018d 01                  .byte   0x1\r
- 3552 018e 31                  .uleb128 0x31\r
- 3553 018f 13                  .uleb128 0x13\r
- 3554 0190 52                  .uleb128 0x52\r
- 3555 0191 01                  .uleb128 0x1\r
- 3556 0192 55                  .uleb128 0x55\r
- 3557 0193 06                  .uleb128 0x6\r
- 3558 0194 58                  .uleb128 0x58\r
- 3559 0195 0B                  .uleb128 0xb\r
- 3560 0196 59                  .uleb128 0x59\r
- 3561 0197 05                  .uleb128 0x5\r
- 3562 0198 01                  .uleb128 0x1\r
- 3563 0199 13                  .uleb128 0x13\r
- 3564 019a 00                  .byte   0\r
- 3565 019b 00                  .byte   0\r
- 3566 019c 1D                  .uleb128 0x1d\r
- 3567 019d 1D                  .uleb128 0x1d\r
- 3568 019e 01                  .byte   0x1\r
- 3569 019f 31                  .uleb128 0x31\r
- 3570 01a0 13                  .uleb128 0x13\r
- 3571 01a1 11                  .uleb128 0x11\r
- 3572 01a2 01                  .uleb128 0x1\r
- 3573 01a3 12                  .uleb128 0x12\r
- 3574 01a4 01                  .uleb128 0x1\r
- 3575 01a5 58                  .uleb128 0x58\r
- 3576 01a6 0B                  .uleb128 0xb\r
- 3577 01a7 59                  .uleb128 0x59\r
- 3578 01a8 05                  .uleb128 0x5\r
- 3579 01a9 01                  .uleb128 0x1\r
- 3580 01aa 13                  .uleb128 0x13\r
- 3581 01ab 00                  .byte   0\r
- 3582 01ac 00                  .byte   0\r
- 3583 01ad 1E                  .uleb128 0x1e\r
- 3584 01ae 2E                  .uleb128 0x2e\r
- 3585 01af 01                  .byte   0x1\r
- 3586 01b0 3F                  .uleb128 0x3f\r
- 3587 01b1 0C                  .uleb128 0xc\r
- 3588 01b2 03                  .uleb128 0x3\r
- 3589 01b3 0E                  .uleb128 0xe\r
- 3590 01b4 3A                  .uleb128 0x3a\r
- 3591 01b5 0B                  .uleb128 0xb\r
- 3592 01b6 3B                  .uleb128 0x3b\r
- 3593 01b7 05                  .uleb128 0x5\r
- 3594 01b8 27                  .uleb128 0x27\r
- 3595 01b9 0C                  .uleb128 0xc\r
- 3596 01ba 49                  .uleb128 0x49\r
- 3597 01bb 13                  .uleb128 0x13\r
- 3598 01bc 11                  .uleb128 0x11\r
- 3599 01bd 01                  .uleb128 0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 102\r
-\r
-\r
- 3600 01be 12                  .uleb128 0x12\r
- 3601 01bf 01                  .uleb128 0x1\r
- 3602 01c0 40                  .uleb128 0x40\r
- 3603 01c1 06                  .uleb128 0x6\r
- 3604 01c2 9742                .uleb128 0x2117\r
- 3605 01c4 0C                  .uleb128 0xc\r
- 3606 01c5 01                  .uleb128 0x1\r
- 3607 01c6 13                  .uleb128 0x13\r
- 3608 01c7 00                  .byte   0\r
- 3609 01c8 00                  .byte   0\r
- 3610 01c9 1F                  .uleb128 0x1f\r
- 3611 01ca 34                  .uleb128 0x34\r
- 3612 01cb 00                  .byte   0\r
- 3613 01cc 03                  .uleb128 0x3\r
- 3614 01cd 0E                  .uleb128 0xe\r
- 3615 01ce 3A                  .uleb128 0x3a\r
- 3616 01cf 0B                  .uleb128 0xb\r
- 3617 01d0 3B                  .uleb128 0x3b\r
- 3618 01d1 0B                  .uleb128 0xb\r
- 3619 01d2 49                  .uleb128 0x49\r
- 3620 01d3 13                  .uleb128 0x13\r
- 3621 01d4 02                  .uleb128 0x2\r
- 3622 01d5 0A                  .uleb128 0xa\r
- 3623 01d6 00                  .byte   0\r
- 3624 01d7 00                  .byte   0\r
- 3625 01d8 20                  .uleb128 0x20\r
- 3626 01d9 2E                  .uleb128 0x2e\r
- 3627 01da 01                  .byte   0x1\r
- 3628 01db 3F                  .uleb128 0x3f\r
- 3629 01dc 0C                  .uleb128 0xc\r
- 3630 01dd 03                  .uleb128 0x3\r
- 3631 01de 0E                  .uleb128 0xe\r
- 3632 01df 3A                  .uleb128 0x3a\r
- 3633 01e0 0B                  .uleb128 0xb\r
- 3634 01e1 3B                  .uleb128 0x3b\r
- 3635 01e2 0B                  .uleb128 0xb\r
- 3636 01e3 27                  .uleb128 0x27\r
- 3637 01e4 0C                  .uleb128 0xc\r
- 3638 01e5 3C                  .uleb128 0x3c\r
- 3639 01e6 0C                  .uleb128 0xc\r
- 3640 01e7 01                  .uleb128 0x1\r
- 3641 01e8 13                  .uleb128 0x13\r
- 3642 01e9 00                  .byte   0\r
- 3643 01ea 00                  .byte   0\r
- 3644 01eb 21                  .uleb128 0x21\r
- 3645 01ec 05                  .uleb128 0x5\r
- 3646 01ed 00                  .byte   0\r
- 3647 01ee 49                  .uleb128 0x49\r
- 3648 01ef 13                  .uleb128 0x13\r
- 3649 01f0 00                  .byte   0\r
- 3650 01f1 00                  .byte   0\r
- 3651 01f2 22                  .uleb128 0x22\r
- 3652 01f3 2E                  .uleb128 0x2e\r
- 3653 01f4 00                  .byte   0\r
- 3654 01f5 3F                  .uleb128 0x3f\r
- 3655 01f6 0C                  .uleb128 0xc\r
- 3656 01f7 03                  .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 103\r
-\r
-\r
- 3657 01f8 0E                  .uleb128 0xe\r
- 3658 01f9 3A                  .uleb128 0x3a\r
- 3659 01fa 0B                  .uleb128 0xb\r
- 3660 01fb 3B                  .uleb128 0x3b\r
- 3661 01fc 0B                  .uleb128 0xb\r
- 3662 01fd 27                  .uleb128 0x27\r
- 3663 01fe 0C                  .uleb128 0xc\r
- 3664 01ff 3C                  .uleb128 0x3c\r
- 3665 0200 0C                  .uleb128 0xc\r
- 3666 0201 00                  .byte   0\r
- 3667 0202 00                  .byte   0\r
- 3668 0203 23                  .uleb128 0x23\r
- 3669 0204 2E                  .uleb128 0x2e\r
- 3670 0205 01                  .byte   0x1\r
- 3671 0206 3F                  .uleb128 0x3f\r
- 3672 0207 0C                  .uleb128 0xc\r
- 3673 0208 03                  .uleb128 0x3\r
- 3674 0209 0E                  .uleb128 0xe\r
- 3675 020a 3A                  .uleb128 0x3a\r
- 3676 020b 0B                  .uleb128 0xb\r
- 3677 020c 3B                  .uleb128 0x3b\r
- 3678 020d 0B                  .uleb128 0xb\r
- 3679 020e 27                  .uleb128 0x27\r
- 3680 020f 0C                  .uleb128 0xc\r
- 3681 0210 49                  .uleb128 0x49\r
- 3682 0211 13                  .uleb128 0x13\r
- 3683 0212 3C                  .uleb128 0x3c\r
- 3684 0213 0C                  .uleb128 0xc\r
- 3685 0214 01                  .uleb128 0x1\r
- 3686 0215 13                  .uleb128 0x13\r
- 3687 0216 00                  .byte   0\r
- 3688 0217 00                  .byte   0\r
- 3689 0218 24                  .uleb128 0x24\r
- 3690 0219 2E                  .uleb128 0x2e\r
- 3691 021a 00                  .byte   0\r
- 3692 021b 3F                  .uleb128 0x3f\r
- 3693 021c 0C                  .uleb128 0xc\r
- 3694 021d 03                  .uleb128 0x3\r
- 3695 021e 0E                  .uleb128 0xe\r
- 3696 021f 3A                  .uleb128 0x3a\r
- 3697 0220 0B                  .uleb128 0xb\r
- 3698 0221 3B                  .uleb128 0x3b\r
- 3699 0222 0B                  .uleb128 0xb\r
- 3700 0223 27                  .uleb128 0x27\r
- 3701 0224 0C                  .uleb128 0xc\r
- 3702 0225 49                  .uleb128 0x49\r
- 3703 0226 13                  .uleb128 0x13\r
- 3704 0227 3C                  .uleb128 0x3c\r
- 3705 0228 0C                  .uleb128 0xc\r
- 3706 0229 00                  .byte   0\r
- 3707 022a 00                  .byte   0\r
- 3708 022b 00                  .byte   0\r
- 3709                          .section        .debug_loc,"",%progbits\r
- 3710                  .Ldebug_loc0:\r
- 3711                  .LLST0:\r
- 3712 0000 00000000            .4byte  .LFB11\r
- 3713 0004 04000000            .4byte  .LCFI0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 104\r
-\r
-\r
- 3714 0008 0200                .2byte  0x2\r
- 3715 000a 7D                  .byte   0x7d\r
- 3716 000b 00                  .sleb128 0\r
- 3717 000c 04000000            .4byte  .LCFI0\r
- 3718 0010 64010000            .4byte  .LFE11\r
- 3719 0014 0200                .2byte  0x2\r
- 3720 0016 7D                  .byte   0x7d\r
- 3721 0017 24                  .sleb128 36\r
- 3722 0018 00000000            .4byte  0\r
- 3723 001c 00000000            .4byte  0\r
- 3724                  .LLST1:\r
- 3725 0020 00000000            .4byte  .LFB0\r
- 3726 0024 02000000            .4byte  .LCFI1\r
- 3727 0028 0200                .2byte  0x2\r
- 3728 002a 7D                  .byte   0x7d\r
- 3729 002b 00                  .sleb128 0\r
- 3730 002c 02000000            .4byte  .LCFI1\r
- 3731 0030 B4010000            .4byte  .LFE0\r
- 3732 0034 0200                .2byte  0x2\r
- 3733 0036 7D                  .byte   0x7d\r
- 3734 0037 08                  .sleb128 8\r
- 3735 0038 00000000            .4byte  0\r
- 3736 003c 00000000            .4byte  0\r
- 3737                  .LLST2:\r
- 3738 0040 00000000            .4byte  .LFB1\r
- 3739 0044 04000000            .4byte  .LCFI2\r
- 3740 0048 0200                .2byte  0x2\r
- 3741 004a 7D                  .byte   0x7d\r
- 3742 004b 00                  .sleb128 0\r
- 3743 004c 04000000            .4byte  .LCFI2\r
- 3744 0050 08020000            .4byte  .LFE1\r
- 3745 0054 0200                .2byte  0x2\r
- 3746 0056 7D                  .byte   0x7d\r
- 3747 0057 10                  .sleb128 16\r
- 3748 0058 00000000            .4byte  0\r
- 3749 005c 00000000            .4byte  0\r
- 3750                  .LLST3:\r
- 3751 0060 AA010000            .4byte  .LVL29\r
- 3752 0064 B0010000            .4byte  .LVL30\r
- 3753 0068 0500                .2byte  0x5\r
- 3754 006a 72                  .byte   0x72\r
- 3755 006b 00                  .sleb128 0\r
- 3756 006c 38                  .byte   0x38\r
- 3757 006d 24                  .byte   0x24\r
- 3758 006e 9F                  .byte   0x9f\r
- 3759 006f B0010000            .4byte  .LVL30\r
- 3760 0073 B6010000            .4byte  .LVL31\r
- 3761 0077 0B00                .2byte  0xb\r
- 3762 0079 72                  .byte   0x72\r
- 3763 007a 00                  .sleb128 0\r
- 3764 007b 38                  .byte   0x38\r
- 3765 007c 24                  .byte   0x24\r
- 3766 007d 73                  .byte   0x73\r
- 3767 007e 00                  .sleb128 0\r
- 3768 007f 08                  .byte   0x8\r
- 3769 0080 FF                  .byte   0xff\r
- 3770 0081 1A                  .byte   0x1a\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 105\r
-\r
-\r
- 3771 0082 21                  .byte   0x21\r
- 3772 0083 9F                  .byte   0x9f\r
- 3773 0084 00000000            .4byte  0\r
- 3774 0088 00000000            .4byte  0\r
- 3775                  .LLST4:\r
- 3776 008c 00000000            .4byte  .LFB2\r
- 3777 0090 02000000            .4byte  .LCFI3\r
- 3778 0094 0200                .2byte  0x2\r
- 3779 0096 7D                  .byte   0x7d\r
- 3780 0097 00                  .sleb128 0\r
- 3781 0098 02000000            .4byte  .LCFI3\r
- 3782 009c 60000000            .4byte  .LFE2\r
- 3783 00a0 0200                .2byte  0x2\r
- 3784 00a2 7D                  .byte   0x7d\r
- 3785 00a3 0C                  .sleb128 12\r
- 3786 00a4 00000000            .4byte  0\r
- 3787 00a8 00000000            .4byte  0\r
- 3788                  .LLST5:\r
- 3789 00ac 00000000            .4byte  .LVL33\r
- 3790 00b0 0A000000            .4byte  .LVL34\r
- 3791 00b4 0100                .2byte  0x1\r
- 3792 00b6 50                  .byte   0x50\r
- 3793 00b7 0A000000            .4byte  .LVL34\r
- 3794 00bb 60000000            .4byte  .LFE2\r
- 3795 00bf 0400                .2byte  0x4\r
- 3796 00c1 F3                  .byte   0xf3\r
- 3797 00c2 01                  .uleb128 0x1\r
- 3798 00c3 50                  .byte   0x50\r
- 3799 00c4 9F                  .byte   0x9f\r
- 3800 00c5 00000000            .4byte  0\r
- 3801 00c9 00000000            .4byte  0\r
- 3802                  .LLST6:\r
- 3803 00cd 00000000            .4byte  .LVL33\r
- 3804 00d1 1A000000            .4byte  .LVL35\r
- 3805 00d5 0100                .2byte  0x1\r
- 3806 00d7 51                  .byte   0x51\r
- 3807 00d8 1A000000            .4byte  .LVL35\r
- 3808 00dc 60000000            .4byte  .LFE2\r
- 3809 00e0 0400                .2byte  0x4\r
- 3810 00e2 F3                  .byte   0xf3\r
- 3811 00e3 01                  .uleb128 0x1\r
- 3812 00e4 51                  .byte   0x51\r
- 3813 00e5 9F                  .byte   0x9f\r
- 3814 00e6 00000000            .4byte  0\r
- 3815 00ea 00000000            .4byte  0\r
- 3816                  .LLST7:\r
- 3817 00ee 00000000            .4byte  .LFB3\r
- 3818 00f2 02000000            .4byte  .LCFI4\r
- 3819 00f6 0200                .2byte  0x2\r
- 3820 00f8 7D                  .byte   0x7d\r
- 3821 00f9 00                  .sleb128 0\r
- 3822 00fa 02000000            .4byte  .LCFI4\r
- 3823 00fe D8000000            .4byte  .LFE3\r
- 3824 0102 0200                .2byte  0x2\r
- 3825 0104 7D                  .byte   0x7d\r
- 3826 0105 10                  .sleb128 16\r
- 3827 0106 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 106\r
-\r
-\r
- 3828 010a 00000000            .4byte  0\r
- 3829                  .LLST8:\r
- 3830 010e 00000000            .4byte  .LVL36\r
- 3831 0112 07000000            .4byte  .LVL37-1\r
- 3832 0116 0100                .2byte  0x1\r
- 3833 0118 50                  .byte   0x50\r
- 3834 0119 07000000            .4byte  .LVL37-1\r
- 3835 011d D8000000            .4byte  .LFE3\r
- 3836 0121 0400                .2byte  0x4\r
- 3837 0123 F3                  .byte   0xf3\r
- 3838 0124 01                  .uleb128 0x1\r
- 3839 0125 50                  .byte   0x50\r
- 3840 0126 9F                  .byte   0x9f\r
- 3841 0127 00000000            .4byte  0\r
- 3842 012b 00000000            .4byte  0\r
- 3843                  .LLST9:\r
- 3844 012f 00000000            .4byte  .LVL36\r
- 3845 0133 07000000            .4byte  .LVL37-1\r
- 3846 0137 0100                .2byte  0x1\r
- 3847 0139 51                  .byte   0x51\r
- 3848 013a 07000000            .4byte  .LVL37-1\r
- 3849 013e D8000000            .4byte  .LFE3\r
- 3850 0142 0400                .2byte  0x4\r
- 3851 0144 F3                  .byte   0xf3\r
- 3852 0145 01                  .uleb128 0x1\r
- 3853 0146 51                  .byte   0x51\r
- 3854 0147 9F                  .byte   0x9f\r
- 3855 0148 00000000            .4byte  0\r
- 3856 014c 00000000            .4byte  0\r
- 3857                  .LLST10:\r
- 3858 0150 0C000000            .4byte  .LVL38\r
- 3859 0154 18000000            .4byte  .LVL39\r
- 3860 0158 0100                .2byte  0x1\r
- 3861 015a 50                  .byte   0x50\r
- 3862 015b 18000000            .4byte  .LVL39\r
- 3863 015f B6000000            .4byte  .LVL42\r
- 3864 0163 0100                .2byte  0x1\r
- 3865 0165 55                  .byte   0x55\r
- 3866 0166 B6000000            .4byte  .LVL42\r
- 3867 016a BD000000            .4byte  .LVL43-1\r
- 3868 016e 0100                .2byte  0x1\r
- 3869 0170 50                  .byte   0x50\r
- 3870 0171 BD000000            .4byte  .LVL43-1\r
- 3871 0175 D8000000            .4byte  .LFE3\r
- 3872 0179 0100                .2byte  0x1\r
- 3873 017b 55                  .byte   0x55\r
- 3874 017c 00000000            .4byte  0\r
- 3875 0180 00000000            .4byte  0\r
- 3876                  .LLST11:\r
- 3877 0184 00000000            .4byte  .LFB4\r
- 3878 0188 02000000            .4byte  .LCFI5\r
- 3879 018c 0200                .2byte  0x2\r
- 3880 018e 7D                  .byte   0x7d\r
- 3881 018f 00                  .sleb128 0\r
- 3882 0190 02000000            .4byte  .LCFI5\r
- 3883 0194 38020000            .4byte  .LFE4\r
- 3884 0198 0200                .2byte  0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 107\r
-\r
-\r
- 3885 019a 7D                  .byte   0x7d\r
- 3886 019b 10                  .sleb128 16\r
- 3887 019c 00000000            .4byte  0\r
- 3888 01a0 00000000            .4byte  0\r
- 3889                  .LLST12:\r
- 3890 01a4 0A000000            .4byte  .LVL45\r
- 3891 01a8 1A000000            .4byte  .LVL46\r
- 3892 01ac 0100                .2byte  0x1\r
- 3893 01ae 50                  .byte   0x50\r
- 3894 01af 1A000000            .4byte  .LVL46\r
- 3895 01b3 FC010000            .4byte  .LVL59\r
- 3896 01b7 0100                .2byte  0x1\r
- 3897 01b9 55                  .byte   0x55\r
- 3898 01ba FC010000            .4byte  .LVL59\r
- 3899 01be 03020000            .4byte  .LVL60-1\r
- 3900 01c2 0100                .2byte  0x1\r
- 3901 01c4 50                  .byte   0x50\r
- 3902 01c5 03020000            .4byte  .LVL60-1\r
- 3903 01c9 38020000            .4byte  .LFE4\r
- 3904 01cd 0100                .2byte  0x1\r
- 3905 01cf 55                  .byte   0x55\r
- 3906 01d0 00000000            .4byte  0\r
- 3907 01d4 00000000            .4byte  0\r
- 3908                  .LLST13:\r
- 3909 01d8 00000000            .4byte  .LFB5\r
- 3910 01dc 02000000            .4byte  .LCFI6\r
- 3911 01e0 0200                .2byte  0x2\r
- 3912 01e2 7D                  .byte   0x7d\r
- 3913 01e3 00                  .sleb128 0\r
- 3914 01e4 02000000            .4byte  .LCFI6\r
- 3915 01e8 2C000000            .4byte  .LFE5\r
- 3916 01ec 0200                .2byte  0x2\r
- 3917 01ee 7D                  .byte   0x7d\r
- 3918 01ef 10                  .sleb128 16\r
- 3919 01f0 00000000            .4byte  0\r
- 3920 01f4 00000000            .4byte  0\r
- 3921                  .LLST14:\r
- 3922 01f8 00000000            .4byte  .LVL61\r
- 3923 01fc 07000000            .4byte  .LVL62-1\r
- 3924 0200 0100                .2byte  0x1\r
- 3925 0202 50                  .byte   0x50\r
- 3926 0203 07000000            .4byte  .LVL62-1\r
- 3927 0207 2C000000            .4byte  .LFE5\r
- 3928 020b 0400                .2byte  0x4\r
- 3929 020d F3                  .byte   0xf3\r
- 3930 020e 01                  .uleb128 0x1\r
- 3931 020f 50                  .byte   0x50\r
- 3932 0210 9F                  .byte   0x9f\r
- 3933 0211 00000000            .4byte  0\r
- 3934 0215 00000000            .4byte  0\r
- 3935                  .LLST15:\r
- 3936 0219 08000000            .4byte  .LVL62\r
- 3937 021d 1F000000            .4byte  .LVL64-1\r
- 3938 0221 0100                .2byte  0x1\r
- 3939 0223 50                  .byte   0x50\r
- 3940 0224 00000000            .4byte  0\r
- 3941 0228 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 108\r
-\r
-\r
- 3942                  .LLST16:\r
- 3943 022c 00000000            .4byte  .LFB8\r
- 3944 0230 02000000            .4byte  .LCFI7\r
- 3945 0234 0200                .2byte  0x2\r
- 3946 0236 7D                  .byte   0x7d\r
- 3947 0237 00                  .sleb128 0\r
- 3948 0238 02000000            .4byte  .LCFI7\r
- 3949 023c 54000000            .4byte  .LFE8\r
- 3950 0240 0200                .2byte  0x2\r
- 3951 0242 7D                  .byte   0x7d\r
- 3952 0243 10                  .sleb128 16\r
- 3953 0244 00000000            .4byte  0\r
- 3954 0248 00000000            .4byte  0\r
- 3955                  .LLST17:\r
- 3956 024c 00000000            .4byte  .LVL65\r
- 3957 0250 0C000000            .4byte  .LVL66\r
- 3958 0254 0100                .2byte  0x1\r
- 3959 0256 50                  .byte   0x50\r
- 3960 0257 0C000000            .4byte  .LVL66\r
- 3961 025b 54000000            .4byte  .LFE8\r
- 3962 025f 0400                .2byte  0x4\r
- 3963 0261 F3                  .byte   0xf3\r
- 3964 0262 01                  .uleb128 0x1\r
- 3965 0263 50                  .byte   0x50\r
- 3966 0264 9F                  .byte   0x9f\r
- 3967 0265 00000000            .4byte  0\r
- 3968 0269 00000000            .4byte  0\r
- 3969                  .LLST18:\r
- 3970 026d 00000000            .4byte  .LFB9\r
- 3971 0271 02000000            .4byte  .LCFI8\r
- 3972 0275 0200                .2byte  0x2\r
- 3973 0277 7D                  .byte   0x7d\r
- 3974 0278 00                  .sleb128 0\r
- 3975 0279 02000000            .4byte  .LCFI8\r
- 3976 027d 2C000000            .4byte  .LFE9\r
- 3977 0281 0200                .2byte  0x2\r
- 3978 0283 7D                  .byte   0x7d\r
- 3979 0284 08                  .sleb128 8\r
- 3980 0285 00000000            .4byte  0\r
- 3981 0289 00000000            .4byte  0\r
- 3982                  .LLST19:\r
- 3983 028d 00000000            .4byte  .LFB10\r
- 3984 0291 02000000            .4byte  .LCFI9\r
- 3985 0295 0200                .2byte  0x2\r
- 3986 0297 7D                  .byte   0x7d\r
- 3987 0298 00                  .sleb128 0\r
- 3988 0299 02000000            .4byte  .LCFI9\r
- 3989 029d 50000000            .4byte  .LFE10\r
- 3990 02a1 0200                .2byte  0x2\r
- 3991 02a3 7D                  .byte   0x7d\r
- 3992 02a4 10                  .sleb128 16\r
- 3993 02a5 00000000            .4byte  0\r
- 3994 02a9 00000000            .4byte  0\r
- 3995                  .LLST20:\r
- 3996 02ad 00000000            .4byte  .LVL69\r
- 3997 02b1 0C000000            .4byte  .LVL70\r
- 3998 02b5 0100                .2byte  0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 109\r
-\r
-\r
- 3999 02b7 50                  .byte   0x50\r
- 4000 02b8 0C000000            .4byte  .LVL70\r
- 4001 02bc 50000000            .4byte  .LFE10\r
- 4002 02c0 0400                .2byte  0x4\r
- 4003 02c2 F3                  .byte   0xf3\r
- 4004 02c3 01                  .uleb128 0x1\r
- 4005 02c4 50                  .byte   0x50\r
- 4006 02c5 9F                  .byte   0x9f\r
- 4007 02c6 00000000            .4byte  0\r
- 4008 02ca 00000000            .4byte  0\r
- 4009                          .section        .debug_aranges,"",%progbits\r
- 4010 0000 6C000000            .4byte  0x6c\r
- 4011 0004 0200                .2byte  0x2\r
- 4012 0006 00000000            .4byte  .Ldebug_info0\r
- 4013 000a 04                  .byte   0x4\r
- 4014 000b 00                  .byte   0\r
- 4015 000c 0000                .2byte  0\r
- 4016 000e 0000                .2byte  0\r
- 4017 0010 00000000            .4byte  .LFB11\r
- 4018 0014 64010000            .4byte  .LFE11-.LFB11\r
- 4019 0018 00000000            .4byte  .LFB12\r
- 4020 001c A4000000            .4byte  .LFE12-.LFB12\r
- 4021 0020 00000000            .4byte  .LFB0\r
- 4022 0024 B4010000            .4byte  .LFE0-.LFB0\r
- 4023 0028 00000000            .4byte  .LFB1\r
- 4024 002c 08020000            .4byte  .LFE1-.LFB1\r
- 4025 0030 00000000            .4byte  .LFB2\r
- 4026 0034 60000000            .4byte  .LFE2-.LFB2\r
- 4027 0038 00000000            .4byte  .LFB3\r
- 4028 003c D8000000            .4byte  .LFE3-.LFB3\r
- 4029 0040 00000000            .4byte  .LFB4\r
- 4030 0044 38020000            .4byte  .LFE4-.LFB4\r
- 4031 0048 00000000            .4byte  .LFB5\r
- 4032 004c 2C000000            .4byte  .LFE5-.LFB5\r
- 4033 0050 00000000            .4byte  .LFB8\r
- 4034 0054 54000000            .4byte  .LFE8-.LFB8\r
- 4035 0058 00000000            .4byte  .LFB9\r
- 4036 005c 2C000000            .4byte  .LFE9-.LFB9\r
- 4037 0060 00000000            .4byte  .LFB10\r
- 4038 0064 50000000            .4byte  .LFE10-.LFB10\r
- 4039 0068 00000000            .4byte  0\r
- 4040 006c 00000000            .4byte  0\r
- 4041                          .section        .debug_ranges,"",%progbits\r
- 4042                  .Ldebug_ranges0:\r
- 4043 0000 1A000000            .4byte  .LBB10\r
- 4044 0004 1C000000            .4byte  .LBE10\r
- 4045 0008 24000000            .4byte  .LBB15\r
- 4046 000c 06010000            .4byte  .LBE15\r
- 4047 0010 00000000            .4byte  0\r
- 4048 0014 00000000            .4byte  0\r
- 4049 0018 00000000            .4byte  .LFB11\r
- 4050 001c 64010000            .4byte  .LFE11\r
- 4051 0020 00000000            .4byte  .LFB12\r
- 4052 0024 A4000000            .4byte  .LFE12\r
- 4053 0028 00000000            .4byte  .LFB0\r
- 4054 002c B4010000            .4byte  .LFE0\r
- 4055 0030 00000000            .4byte  .LFB1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 110\r
-\r
-\r
- 4056 0034 08020000            .4byte  .LFE1\r
- 4057 0038 00000000            .4byte  .LFB2\r
- 4058 003c 60000000            .4byte  .LFE2\r
- 4059 0040 00000000            .4byte  .LFB3\r
- 4060 0044 D8000000            .4byte  .LFE3\r
- 4061 0048 00000000            .4byte  .LFB4\r
- 4062 004c 38020000            .4byte  .LFE4\r
- 4063 0050 00000000            .4byte  .LFB5\r
- 4064 0054 2C000000            .4byte  .LFE5\r
- 4065 0058 00000000            .4byte  .LFB8\r
- 4066 005c 54000000            .4byte  .LFE8\r
- 4067 0060 00000000            .4byte  .LFB9\r
- 4068 0064 2C000000            .4byte  .LFE9\r
- 4069 0068 00000000            .4byte  .LFB10\r
- 4070 006c 50000000            .4byte  .LFE10\r
- 4071 0070 00000000            .4byte  0\r
- 4072 0074 00000000            .4byte  0\r
- 4073                          .section        .debug_line,"",%progbits\r
- 4074                  .Ldebug_line0:\r
- 4075 0000 46030000            .section        .debug_str,"MS",%progbits,1\r
- 4075      02006500 \r
- 4075      00000201 \r
- 4075      FB0E0D00 \r
- 4075      01010101 \r
- 4076                  .LASF102:\r
- 4077 0000 43795664            .ascii  "CyVdLvAnalogDisable\000"\r
- 4077      4C76416E \r
- 4077      616C6F67 \r
- 4077      44697361 \r
- 4077      626C6500 \r
- 4078                  .LASF10:\r
- 4079 0014 75696E74            .ascii  "uint16\000"\r
- 4079      313600\r
- 4080                  .LASF87:\r
- 4081 001b 4379494D            .ascii  "CyIMO_Start\000"\r
- 4081      4F5F5374 \r
- 4081      61727400 \r
- 4082                  .LASF58:\r
- 4083 0027 4379506D            .ascii  "CyPmHibSlpRestore\000"\r
- 4083      48696253 \r
- 4083      6C705265 \r
- 4083      73746F72 \r
- 4083      6500\r
- 4084                  .LASF43:\r
- 4085 0039 77616B65            .ascii  "wakeupTrim0\000"\r
- 4085      75705472 \r
- 4085      696D3000 \r
- 4086                  .LASF44:\r
- 4087 0045 77616B65            .ascii  "wakeupTrim1\000"\r
- 4087      75705472 \r
- 4087      696D3100 \r
- 4088                  .LASF20:\r
- 4089 0051 6D617374            .ascii  "masterClkSrc\000"\r
- 4089      6572436C \r
- 4089      6B537263 \r
- 4089      00\r
- 4090                  .LASF56:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 111\r
-\r
-\r
- 4091 005e 43595F50            .ascii  "CY_PM_BACKUP_STRUCT\000"\r
- 4091      4D5F4241 \r
- 4091      434B5550 \r
- 4091      5F535452 \r
- 4091      55435400 \r
- 4092                  .LASF110:\r
- 4093 0072 43795854            .ascii  "CyXTAL_32KHZ_Start\000"\r
- 4093      414C5F33 \r
- 4093      324B485A \r
- 4093      5F537461 \r
- 4093      727400\r
- 4094                  .LASF28:\r
- 4095 0085 636C6B53            .ascii  "clkSyncDiv\000"\r
- 4095      796E6344 \r
- 4095      697600\r
- 4096                  .LASF60:\r
- 4097 0090 4379506D            .ascii  "CyPmRestoreClocks\000"\r
- 4097      52657374 \r
- 4097      6F726543 \r
- 4097      6C6F636B \r
- 4097      7300\r
- 4098                  .LASF7:\r
- 4099 00a2 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 4099      206C6F6E \r
- 4099      6720756E \r
- 4099      7369676E \r
- 4099      65642069 \r
- 4100                  .LASF70:\r
- 4101 00b9 4379506D            .ascii  "CyPmHviLviSaveDisable\000"\r
- 4101      4876694C \r
- 4101      76695361 \r
- 4101      76654469 \r
- 4101      7361626C \r
- 4102                  .LASF76:\r
- 4103 00cf 746D7053            .ascii  "tmpStatus\000"\r
- 4103      74617475 \r
- 4103      7300\r
- 4104                  .LASF49:\r
- 4105 00d9 6C766961            .ascii  "lviaTrip\000"\r
- 4105      54726970 \r
- 4105      00\r
- 4106                  .LASF22:\r
- 4107 00e2 696D6F55            .ascii  "imoUsbClk\000"\r
- 4107      7362436C \r
- 4107      6B00\r
- 4108                  .LASF80:\r
- 4109 00ec 4379506D            .ascii  "CyPmFtwSetInterval\000"\r
- 4109      46747753 \r
- 4109      6574496E \r
- 4109      74657276 \r
- 4109      616C00\r
- 4110                  .LASF50:\r
- 4111 00ff 68766961            .ascii  "hviaEn\000"\r
- 4111      456E00\r
- 4112                  .LASF105:\r
- 4113 0106 43795664            .ascii  "CyVdLvDigitEnable\000"\r
- 4113      4C764469 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 112\r
-\r
-\r
- 4113      67697445 \r
- 4113      6E61626C \r
- 4113      6500\r
- 4114                  .LASF36:\r
- 4115 0118 696C6F50            .ascii  "iloPowerMode\000"\r
- 4115      6F776572 \r
- 4115      4D6F6465 \r
- 4115      00\r
- 4116                  .LASF6:\r
- 4117 0125 6C6F6E67            .ascii  "long long int\000"\r
- 4117      206C6F6E \r
- 4117      6720696E \r
- 4117      7400\r
- 4118                  .LASF0:\r
- 4119 0133 7369676E            .ascii  "signed char\000"\r
- 4119      65642063 \r
- 4119      68617200 \r
- 4120                  .LASF29:\r
- 4121 013f 636C6B42            .ascii  "clkBusDiv\000"\r
- 4121      75734469 \r
- 4121      7600\r
- 4122                  .LASF68:\r
- 4123 0149 696E7465            .ascii  "interruptState\000"\r
- 4123      72727570 \r
- 4123      74537461 \r
- 4123      746500\r
- 4124                  .LASF108:\r
- 4125 0158 4379494C            .ascii  "CyILO_Start1K\000"\r
- 4125      4F5F5374 \r
- 4125      61727431 \r
- 4125      4B00\r
- 4126                  .LASF27:\r
- 4127 0166 696D6F32            .ascii  "imo2x\000"\r
- 4127      7800\r
- 4128                  .LASF4:\r
- 4129 016c 6C6F6E67            .ascii  "long int\000"\r
- 4129      20696E74 \r
- 4129      00\r
- 4130                  .LASF72:\r
- 4131 0175 4379506D            .ascii  "CyPmHviLviRestore\000"\r
- 4131      4876694C \r
- 4131      76695265 \r
- 4131      73746F72 \r
- 4131      6500\r
- 4132                  .LASF9:\r
- 4133 0187 75696E74            .ascii  "uint8\000"\r
- 4133      3800\r
- 4134                  .LASF99:\r
- 4135 018d 4379504C            .ascii  "CyPLL_OUT_Start\000"\r
- 4135      4C5F4F55 \r
- 4135      545F5374 \r
- 4135      61727400 \r
- 4136                  .LASF13:\r
- 4137 019d 646F7562            .ascii  "double\000"\r
- 4137      6C6500\r
- 4138                  .LASF112:\r
- 4139 01a4 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\cyPm.c\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 113\r
-\r
-\r
- 4139      6E657261 \r
- 4139      7465645F \r
- 4139      536F7572 \r
- 4139      63655C50 \r
- 4140                  .LASF11:\r
- 4141 01c4 75696E74            .ascii  "uint32\000"\r
- 4141      333200\r
- 4142                  .LASF31:\r
- 4143 01cb 786D687A            .ascii  "xmhzEnableState\000"\r
- 4143      456E6162 \r
- 4143      6C655374 \r
- 4143      61746500 \r
- 4144                  .LASF71:\r
- 4145 01db 4379506D            .ascii  "CyPmHibRestore\000"\r
- 4145      48696252 \r
- 4145      6573746F \r
- 4145      726500\r
- 4146                  .LASF74:\r
- 4147 01ea 6D61736B            .ascii  "mask\000"\r
- 4147      00\r
- 4148                  .LASF53:\r
- 4149 01ef 696D6F41            .ascii  "imoActFreq\000"\r
- 4149      63744672 \r
- 4149      657100\r
- 4150                  .LASF8:\r
- 4151 01fa 756E7369            .ascii  "unsigned int\000"\r
- 4151      676E6564 \r
- 4151      20696E74 \r
- 4151      00\r
- 4152                  .LASF45:\r
- 4153 0207 73636374            .ascii  "scctData\000"\r
- 4153      44617461 \r
- 4153      00\r
- 4154                  .LASF88:\r
- 4155 0210 4379494D            .ascii  "CyIMO_SetSource\000"\r
- 4155      4F5F5365 \r
- 4155      74536F75 \r
- 4155      72636500 \r
- 4156                  .LASF21:\r
- 4157 0220 696D6F46            .ascii  "imoFreq\000"\r
- 4157      72657100 \r
- 4158                  .LASF5:\r
- 4159 0228 6C6F6E67            .ascii  "long unsigned int\000"\r
- 4159      20756E73 \r
- 4159      69676E65 \r
- 4159      6420696E \r
- 4159      7400\r
- 4160                  .LASF46:\r
- 4161 023a 6C766964            .ascii  "lvidEn\000"\r
- 4161      456E00\r
- 4162                  .LASF34:\r
- 4163 0241 6379506D            .ascii  "cyPmClockBackupStruct\000"\r
- 4163      436C6F63 \r
- 4163      6B426163 \r
- 4163      6B757053 \r
- 4163      74727563 \r
- 4164                  .LASF115:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 114\r
-\r
-\r
- 4165 0257 4379456E            .ascii  "CyEnterCriticalSection\000"\r
- 4165      74657243 \r
- 4165      72697469 \r
- 4165      63616C53 \r
- 4165      65637469 \r
- 4166                  .LASF35:\r
- 4167 026e 6379506D            .ascii  "cyPmBackupStruct\000"\r
- 4167      4261636B \r
- 4167      75705374 \r
- 4167      72756374 \r
- 4167      00\r
- 4168                  .LASF104:\r
- 4169 027f 4379494C            .ascii  "CyILO_SetPowerMode\000"\r
- 4169      4F5F5365 \r
- 4169      74506F77 \r
- 4169      65724D6F \r
- 4169      646500\r
- 4170                  .LASF96:\r
- 4171 0292 4379494D            .ascii  "CyIMO_Stop\000"\r
- 4171      4F5F5374 \r
- 4171      6F7000\r
- 4172                  .LASF33:\r
- 4173 029d 43595F50            .ascii  "CY_PM_CLOCK_BACKUP_STRUCT\000"\r
- 4173      4D5F434C \r
- 4173      4F434B5F \r
- 4173      4241434B \r
- 4173      55505F53 \r
- 4174                  .LASF3:\r
- 4175 02b7 73686F72            .ascii  "short unsigned int\000"\r
- 4175      7420756E \r
- 4175      7369676E \r
- 4175      65642069 \r
- 4175      6E7400\r
- 4176                  .LASF78:\r
- 4177 02ca 63747749            .ascii  "ctwInterval\000"\r
- 4177      6E746572 \r
- 4177      76616C00 \r
- 4178                  .LASF103:\r
- 4179 02d6 43795664            .ascii  "CyVdHvAnalogDisable\000"\r
- 4179      4876416E \r
- 4179      616C6F67 \r
- 4179      44697361 \r
- 4179      626C6500 \r
- 4180                  .LASF90:\r
- 4181 02ea 43794D61            .ascii  "CyMasterClk_SetSource\000"\r
- 4181      73746572 \r
- 4181      436C6B5F \r
- 4181      53657453 \r
- 4181      6F757263 \r
- 4182                  .LASF40:\r
- 4183 0300 77616B65            .ascii  "wakeupCfg0\000"\r
- 4183      75704366 \r
- 4183      673000\r
- 4184                  .LASF41:\r
- 4185 030b 77616B65            .ascii  "wakeupCfg1\000"\r
- 4185      75704366 \r
- 4185      673100\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 115\r
-\r
-\r
- 4186                  .LASF42:\r
- 4187 0316 77616B65            .ascii  "wakeupCfg2\000"\r
- 4187      75704366 \r
- 4187      673200\r
- 4188                  .LASF62:\r
- 4189 0321 636C6B42            .ascii  "clkBusDivTmp\000"\r
- 4189      75734469 \r
- 4189      76546D70 \r
- 4189      00\r
- 4190                  .LASF55:\r
- 4191 032e 626F6F73            .ascii  "boostRefExt\000"\r
- 4191      74526566 \r
- 4191      45787400 \r
- 4192                  .LASF26:\r
- 4193 033a 636C6B49            .ascii  "clkImoSrc\000"\r
- 4193      6D6F5372 \r
- 4193      6300\r
- 4194                  .LASF59:\r
- 4195 0344 4379506D            .ascii  "CyPmSaveClocks\000"\r
- 4195      53617665 \r
- 4195      436C6F63 \r
- 4195      6B7300\r
- 4196                  .LASF113:\r
- 4197 0353 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 4197      43534932 \r
- 4197      53445C73 \r
- 4197      6F667477 \r
- 4197      6172655C \r
- 4198 0382 6E00                .ascii  "n\000"\r
- 4199                  .LASF98:\r
- 4200 0384 43795854            .ascii  "CyXTAL_Start\000"\r
- 4200      414C5F53 \r
- 4200      74617274 \r
- 4200      00\r
- 4201                  .LASF39:\r
- 4202 0391 736C7054            .ascii  "slpTrBypass\000"\r
- 4202      72427970 \r
- 4202      61737300 \r
- 4203                  .LASF17:\r
- 4204 039d 73697A65            .ascii  "sizetype\000"\r
- 4204      74797065 \r
- 4204      00\r
- 4205                  .LASF63:\r
- 4206 03a6 6379506D            .ascii  "cyPmImoFreqMhz2Reg\000"\r
- 4206      496D6F46 \r
- 4206      7265714D \r
- 4206      687A3252 \r
- 4206      656700\r
- 4207                  .LASF18:\r
- 4208 03b9 656E436C            .ascii  "enClkA\000"\r
- 4208      6B4100\r
- 4209                  .LASF19:\r
- 4210 03c0 656E436C            .ascii  "enClkD\000"\r
- 4210      6B4400\r
- 4211                  .LASF109:\r
- 4212 03c7 4379494C            .ascii  "CyILO_Start100K\000"\r
- 4212      4F5F5374 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 116\r
-\r
-\r
- 4212      61727431 \r
- 4212      30304B00 \r
- 4213                  .LASF66:\r
- 4214 03d7 77616B65            .ascii  "wakeupSource\000"\r
- 4214      7570536F \r
- 4214      75726365 \r
- 4214      00\r
- 4215                  .LASF93:\r
- 4216 03e4 4379504C            .ascii  "CyPLL_OUT_Stop\000"\r
- 4216      4C5F4F55 \r
- 4216      545F5374 \r
- 4216      6F7000\r
- 4217                  .LASF89:\r
- 4218 03f3 43794D61            .ascii  "CyMasterClk_SetDivider\000"\r
- 4218      73746572 \r
- 4218      436C6B5F \r
- 4218      53657444 \r
- 4218      69766964 \r
- 4219                  .LASF25:\r
- 4220 040a 696D6F43            .ascii  "imoClkSrc\000"\r
- 4220      6C6B5372 \r
- 4220      6300\r
- 4221                  .LASF12:\r
- 4222 0414 666C6F61            .ascii  "float\000"\r
- 4222      7400\r
- 4223                  .LASF100:\r
- 4224 041a 43794578            .ascii  "CyExitCriticalSection\000"\r
- 4224      69744372 \r
- 4224      69746963 \r
- 4224      616C5365 \r
- 4224      6374696F \r
- 4225                  .LASF67:\r
- 4226 0430 4379506D            .ascii  "CyPmSleep\000"\r
- 4226      536C6565 \r
- 4226      7000\r
- 4227                  .LASF51:\r
- 4228 043a 6C766964            .ascii  "lvidRst\000"\r
- 4228      52737400 \r
- 4229                  .LASF64:\r
- 4230 0442 4379506D            .ascii  "CyPmAltAct\000"\r
- 4230      416C7441 \r
- 4230      637400\r
- 4231                  .LASF95:\r
- 4232 044d 43794465            .ascii  "CyDelayCycles\000"\r
- 4232      6C617943 \r
- 4232      79636C65 \r
- 4232      7300\r
- 4233                  .LASF111:\r
- 4234 045b 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 4234      4320342E \r
- 4234      372E3320 \r
- 4234      32303133 \r
- 4234      30333132 \r
- 4235 048e 616E6368            .ascii  "anch revision 196615]\000"\r
- 4235      20726576 \r
- 4235      6973696F \r
- 4235      6E203139 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 117\r
-\r
-\r
- 4235      36363135 \r
- 4236                  .LASF16:\r
- 4237 04a4 72656738            .ascii  "reg8\000"\r
- 4237      00\r
- 4238                  .LASF79:\r
- 4239 04a9 4379506D            .ascii  "CyPmOppsSet\000"\r
- 4239      4F707073 \r
- 4239      53657400 \r
- 4240                  .LASF1:\r
- 4241 04b5 756E7369            .ascii  "unsigned char\000"\r
- 4241      676E6564 \r
- 4241      20636861 \r
- 4241      7200\r
- 4242                  .LASF83:\r
- 4243 04c3 6379506D            .ascii  "cyPmClockBackup\000"\r
- 4243      436C6F63 \r
- 4243      6B426163 \r
- 4243      6B757000 \r
- 4244                  .LASF30:\r
- 4245 04d3 706C6C45            .ascii  "pllEnableState\000"\r
- 4245      6E61626C \r
- 4245      65537461 \r
- 4245      746500\r
- 4246                  .LASF37:\r
- 4247 04e2 696C6F31            .ascii  "ilo1kEnable\000"\r
- 4247      6B456E61 \r
- 4247      626C6500 \r
- 4248                  .LASF2:\r
- 4249 04ee 73686F72            .ascii  "short int\000"\r
- 4249      7420696E \r
- 4249      7400\r
- 4250                  .LASF57:\r
- 4251 04f8 4379506D            .ascii  "CyPmHibSlpSaveSet\000"\r
- 4251      48696253 \r
- 4251      6C705361 \r
- 4251      76655365 \r
- 4251      7400\r
- 4252                  .LASF38:\r
- 4253 050a 696C6F31            .ascii  "ilo100kEnable\000"\r
- 4253      30306B45 \r
- 4253      6E61626C \r
- 4253      6500\r
- 4254                  .LASF14:\r
- 4255 0518 63686172            .ascii  "char\000"\r
- 4255      00\r
- 4256                  .LASF92:\r
- 4257 051d 4379494D            .ascii  "CyIMO_DisableDoubler\000"\r
- 4257      4F5F4469 \r
- 4257      7361626C \r
- 4257      65446F75 \r
- 4257      626C6572 \r
- 4258                  .LASF101:\r
- 4259 0532 43795664            .ascii  "CyVdLvDigitDisable\000"\r
- 4259      4C764469 \r
- 4259      67697444 \r
- 4259      69736162 \r
- 4259      6C6500\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 118\r
-\r
-\r
- 4260                  .LASF54:\r
- 4261 0545 696D6F41            .ascii  "imoActFreq12Mhz\000"\r
- 4261      63744672 \r
- 4261      65713132 \r
- 4261      4D687A00 \r
- 4262                  .LASF73:\r
- 4263 0555 4379506D            .ascii  "CyPmHibernate\000"\r
- 4263      48696265 \r
- 4263      726E6174 \r
- 4263      6500\r
- 4264                  .LASF85:\r
- 4265 0563 4379466C            .ascii  "CyFlash_SetWaitCycles\000"\r
- 4265      6173685F \r
- 4265      53657457 \r
- 4265      61697443 \r
- 4265      79636C65 \r
- 4266                  .LASF81:\r
- 4267 0579 66747749            .ascii  "ftwInterval\000"\r
- 4267      6E746572 \r
- 4267      76616C00 \r
- 4268                  .LASF84:\r
- 4269 0585 6379506D            .ascii  "cyPmImoFreqReg2Mhz\000"\r
- 4269      496D6F46 \r
- 4269      72657152 \r
- 4269      6567324D \r
- 4269      687A00\r
- 4270                  .LASF114:\r
- 4271 0598 4379506D            .ascii  "CyPmReadStatus\000"\r
- 4271      52656164 \r
- 4271      53746174 \r
- 4271      757300\r
- 4272                  .LASF91:\r
- 4273 05a7 43794275            .ascii  "CyBusClk_SetDivider\000"\r
- 4273      73436C6B \r
- 4273      5F536574 \r
- 4273      44697669 \r
- 4273      64657200 \r
- 4274                  .LASF32:\r
- 4275 05bb 636C6B44            .ascii  "clkDistDelay\000"\r
- 4275      69737444 \r
- 4275      656C6179 \r
- 4275      00\r
- 4276                  .LASF77:\r
- 4277 05c8 4379506D            .ascii  "CyPmCtwSetInterval\000"\r
- 4277      43747753 \r
- 4277      6574496E \r
- 4277      74657276 \r
- 4277      616C00\r
- 4278                  .LASF61:\r
- 4279 05db 73746174            .ascii  "status\000"\r
- 4279      757300\r
- 4280                  .LASF48:\r
- 4281 05e2 6C766961            .ascii  "lviaEn\000"\r
- 4281      456E00\r
- 4282                  .LASF86:\r
- 4283 05e9 4379494D            .ascii  "CyIMO_SetFreq\000"\r
- 4283      4F5F5365 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 119\r
-\r
-\r
- 4283      74467265 \r
- 4283      7100\r
- 4284                  .LASF97:\r
- 4285 05f7 4379494D            .ascii  "CyIMO_EnableDoubler\000"\r
- 4285      4F5F456E \r
- 4285      61626C65 \r
- 4285      446F7562 \r
- 4285      6C657200 \r
- 4286                  .LASF69:\r
- 4287 060b 4379506D            .ascii  "CyPmHibSaveSet\000"\r
- 4287      48696253 \r
- 4287      61766553 \r
- 4287      657400\r
- 4288                  .LASF65:\r
- 4289 061a 77616B65            .ascii  "wakeupTime\000"\r
- 4289      75705469 \r
- 4289      6D6500\r
- 4290                  .LASF106:\r
- 4291 0625 43795664            .ascii  "CyVdLvAnalogEnable\000"\r
- 4291      4C76416E \r
- 4291      616C6F67 \r
- 4291      456E6162 \r
- 4291      6C6500\r
- 4292                  .LASF15:\r
- 4293 0638 63797374            .ascii  "cystatus\000"\r
- 4293      61747573 \r
- 4293      00\r
- 4294                  .LASF23:\r
- 4295 0641 666C6173            .ascii  "flashWaitCycles\000"\r
- 4295      68576169 \r
- 4295      74437963 \r
- 4295      6C657300 \r
- 4296                  .LASF52:\r
- 4297 0651 6C766961            .ascii  "lviaRst\000"\r
- 4297      52737400 \r
- 4298                  .LASF107:\r
- 4299 0659 43795664            .ascii  "CyVdHvAnalogEnable\000"\r
- 4299      4876416E \r
- 4299      616C6F67 \r
- 4299      456E6162 \r
- 4299      6C6500\r
- 4300                  .LASF94:\r
- 4301 066c 43795854            .ascii  "CyXTAL_Stop\000"\r
- 4301      414C5F53 \r
- 4301      746F7000 \r
- 4302                  .LASF82:\r
- 4303 0678 6379506D            .ascii  "cyPmBackup\000"\r
- 4303      4261636B \r
- 4303      757000\r
- 4304                  .LASF47:\r
- 4305 0683 6C766964            .ascii  "lvidTrip\000"\r
- 4305      54726970 \r
- 4305      00\r
- 4306                  .LASF24:\r
- 4307 068c 696D6F45            .ascii  "imoEnable\000"\r
- 4307      6E61626C \r
- 4307      6500\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccJaWbtc.s                      page 120\r
-\r
-\r
- 4308                  .LASF75:\r
- 4309 0696 696E7465            .ascii  "interruptStatus\000"\r
- 4309      72727570 \r
- 4309      74537461 \r
- 4309      74757300 \r
- 4310                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.o
deleted file mode 100755 (executable)
index 7007084..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyPm.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.lst
deleted file mode 100755 (executable)
index 7e94b9e..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.lst
+++ /dev/null
@@ -1,2871 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "cyfitter_cfg.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.SetAnalogRoutingPumps,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global SetAnalogRoutingPumps\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   SetAnalogRoutingPumps, %function\r
-  24                   SetAnalogRoutingPumps:\r
-  25                   .LFB7:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\cyfitter_cfg.c"\r
-   1:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * FILENAME: cyfitter_cfg.c\r
-   3:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * PSoC Creator 3.0 Component Pack 7\r
-   4:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
-   5:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Description:\r
-   6:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * This file is automatically generated by PSoC Creator with device \r
-   7:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * initialization code.  Except for the user defined sections in\r
-   8:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * CyClockStartupError(), this file should not be modified.\r
-   9:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
-  10:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
-  11:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  12:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * You may use this file only in accordance with the license, terms, conditions, \r
-  13:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * disclaimers, and limitations in the end user license agreement accompanying \r
-  14:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * the software package with which this file was provided.\r
-  15:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************/\r
-  16:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  17:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <string.h>\r
-  18:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <cytypes.h>\r
-  19:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <cydevice_trm.h>\r
-  20:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <cyfitter.h>\r
-  21:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <CyLib.h>\r
-  22:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #include <cyfitter_cfg.h>\r
-  23:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  24:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CY_NEED_CYCLOCKSTARTUPERROR 1\r
-  25:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  26:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  27:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-  28:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYPACKED \r
-  29:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYPACKED_ATTR __attribute__ ((packed))\r
-  30:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYALIGNED __attribute__ ((aligned))\r
-  31:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CY_CFG_UNUSED __attribute__ ((unused))\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CY_CFG_SECTION __attribute__ ((section(".psocinit")))\r
-  33:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     \r
-  34:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #if defined(__ARMCC_VERSION)\r
-  35:.\Generated_Source\PSoC5/cyfitter_cfg.c ****         #define CY_CFG_MEMORY_BARRIER() __memory_changed()\r
-  36:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #else\r
-  37:.\Generated_Source\PSoC5/cyfitter_cfg.c ****         #define CY_CFG_MEMORY_BARRIER() __sync_synchronize()\r
-  38:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #endif\r
-  39:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     \r
-  40:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #elif defined(__ICCARM__)\r
-  41:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #include <intrinsics.h>\r
-  42:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  43:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYPACKED __packed\r
-  44:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYPACKED_ATTR \r
-  45:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CYALIGNED _Pragma("data_alignment=4")\r
-  46:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CY_CFG_UNUSED _Pragma("diag_suppress=Pe177")\r
-  47:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CY_CFG_SECTION _Pragma("location=\".psocinit\"")\r
-  48:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     \r
-  49:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #define CY_CFG_MEMORY_BARRIER() __DMB()\r
-  50:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     \r
-  51:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #else\r
-  52:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     #error Unsupported toolchain\r
-  53:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #endif\r
-  54:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  55:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  56:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  57:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYMEMZERO(void *s, size_t n);\r
-  58:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  59:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYMEMZERO(void *s, size_t n)\r
-  60:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
-  61:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memset(s, 0, n);\r
-  62:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
-  63:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  64:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYCONFIGCPY(void *dest, const void *src, size_t n);\r
-  65:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  66:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYCONFIGCPY(void *dest, const void *src, size_t n)\r
-  67:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
-  68:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
-  69:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
-  70:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  71:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n);\r
-  72:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
-  73:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)\r
-  74:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
-  75:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
-  76:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
-  77:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  78:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  79:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  80:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /* Clock startup error codes                                                   */\r
-  81:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CYCLOCKSTART_NO_ERROR    0u\r
-  82:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CYCLOCKSTART_XTAL_ERROR  1u\r
-  83:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CYCLOCKSTART_32KHZ_ERROR 2u\r
-  84:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CYCLOCKSTART_PLL_ERROR   3u\r
-  85:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
-  86:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #ifdef CY_NEED_CYCLOCKSTARTUPERROR\r
-  87:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
-  88:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: CyClockStartupError\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 3\r
-\r
-\r
-  89:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
-  90:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
-  91:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  If an error is encountered during clock configuration (crystal startup error,\r
-  92:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  PLL lock error, etc.), the system will end up here.  Unless reimplemented by\r
-  93:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  the customer, this function will stop in an infinite loop.\r
-  94:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
-  95:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:\r
-  96:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
-  97:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
-  98:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
-  99:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
- 100:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 101:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 102:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
- 103:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CyClockStartupError(uint8 errorCode);\r
- 104:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CY_CFG_UNUSED\r
- 105:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void CyClockStartupError(uint8 errorCode)\r
- 106:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
- 107:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* To remove the compiler warning if errorCode not used.                */\r
- 108:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     errorCode = errorCode;\r
- 109:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 110:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* `#START CyClockStartupError` */\r
- 111:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 112:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */\r
- 113:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* we will end up here to allow the customer to implement something to  */\r
- 114:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* deal with the clock condition.                                       */\r
- 115:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 116:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* `#END` */\r
- 117:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 118:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* If nothing else, stop here since the clocks have not started         */\r
- 119:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     /* correctly.                                                           */\r
- 120:.\Generated_Source\PSoC5/cyfitter_cfg.c ****     while(1) {}\r
- 121:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
- 122:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #endif\r
- 123:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 124:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CY_CFG_BASE_ADDR_COUNT 12u\r
- 125:.\Generated_Source\PSoC5/cyfitter_cfg.c **** CYPACKED typedef struct\r
- 126:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
- 127:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 offset;\r
- 128:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 value;\r
- 129:.\Generated_Source\PSoC5/cyfitter_cfg.c **** } CYPACKED_ATTR cy_cfg_addrvalue_t;\r
- 130:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 131:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 132:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 133:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
- 134:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: cfg_write_bytes32\r
- 135:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
- 136:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
- 137:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  This function is used for setting up the chip configuration areas that\r
- 138:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  contain relatively sparse data.\r
- 139:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 140:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:\r
- 141:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
- 142:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 143:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
- 144:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
- 145:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 4\r
-\r
-\r
- 146:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 147:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[]);\r
- 148:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[])\r
- 149:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
- 150:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* For 32-bit little-endian architectures */\r
- 151:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint32 i, j = 0u;\r
- 152:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      for (i = 0u; i < CY_CFG_BASE_ADDR_COUNT; i++)\r
- 153:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      {\r
- 154:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint32 baseAddr = addr_table[i];\r
- 155:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint8 count = (uint8)baseAddr;\r
- 156:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              baseAddr &= 0xFFFFFF00u;\r
- 157:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              while (count != 0u)\r
- 158:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              {\r
- 159:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      CY_SET_XTND_REG8((void CYFAR *)(baseAddr + data_table[j].offset), data_table[j].value);\r
- 160:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      j++;\r
- 161:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      count--;\r
- 162:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              }\r
- 163:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 164:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
- 165:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 166:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
- 167:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: ClockSetup\r
- 168:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
- 169:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 170:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
- 171:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  Performs the initialization of all of the clocks in the device based on the\r
- 172:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  settings in the Clock tab of the DWR.  This includes enabling the requested\r
- 173:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  clocks and setting the necessary dividers to produce the desired frequency. \r
- 174:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 175:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:\r
- 176:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  void\r
- 177:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 178:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
- 179:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  void\r
- 180:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 181:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 182:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void ClockSetup(void);\r
- 183:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void ClockSetup(void)\r
- 184:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
- 185:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint32 timeout;\r
- 186:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 pllLock;\r
- 187:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 188:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 189:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Configure ILO based on settings from Clock DWR */\r
- 190:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);\r
- 191:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 192:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Configure IMO based on settings from Clock DWR */\r
- 193:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);\r
- 194:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_\r
- 195:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 196:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Configure PLL based on settings from Clock DWR */\r
- 197:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0818u);\r
- 198:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);\r
- 199:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Wait up to 250us for the PLL to lock */\r
- 200:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      pllLock = 0u;\r
- 201:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)\r
- 202:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      { \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 5\r
-\r
-\r
- 203:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_\r
- 204:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */\r
- 205:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 206:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* If we ran out of time the PLL didn't lock so go to the error function */\r
- 207:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      if (timeout == 0u)\r
- 208:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      {\r
- 209:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CyClockStartupError(CYCLOCKSTART_PLL_ERROR);\r
- 210:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 211:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 212:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Configure Bus/Master Clock based on settings from Clock DWR */\r
- 213:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);\r
- 214:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);\r
- 215:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);\r
- 216:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);\r
- 217:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x00u);\r
- 218:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 219:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Configure USB Clock based on settings from Clock DWR */\r
- 220:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u);\r
- 221:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);\r
- 222:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
- 223:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 224:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 225:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /* Analog API Functions */\r
- 226:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 227:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 228:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
- 229:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: AnalogSetDefault\r
- 230:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
- 231:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 232:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
- 233:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  Sets up the analog portions of the chip to default values based on chip\r
- 234:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  configuration options from the project.\r
- 235:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 236:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:\r
- 237:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  void\r
- 238:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 239:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
- 240:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  void\r
- 241:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 242:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 243:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void AnalogSetDefault(void);\r
- 244:.\Generated_Source\PSoC5/cyfitter_cfg.c **** static void AnalogSetDefault(void)\r
- 245:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
- 246:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM +\r
- 247:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));\r
- 248:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));\r
- 249:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, 0x44u);\r
- 250:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
- 251:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 252:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 253:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
- 254:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: SetAnalogRoutingPumps\r
- 255:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
- 256:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 257:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
- 258:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Enables or disables the analog pumps feeding analog routing switches.\r
- 259:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Intended to be called at startup, based on the Vdda system configuration;\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 6\r
-\r
-\r
- 260:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * may be called during operation when the user informs us that the Vdda voltage\r
- 261:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * crossed the pump threshold.\r
- 262:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 263:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:\r
- 264:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  enabled - 1 to enable the pumps, 0 to disable the pumps\r
- 265:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 266:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
- 267:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  void\r
- 268:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 269:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 270:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void SetAnalogRoutingPumps(uint8 enabled)\r
- 271:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
-  27                           .loc 1 271 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
- 272:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 regValue = CY_GET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0);\r
-  33                           .loc 1 272 0\r
-  34 0000 014B                 ldr     r3, .L2\r
-  35 0002 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  36                   .LVL1:\r
- 273:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      if (enabled != 0u)\r
- 274:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      {\r
- 275:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              regValue |= 0x00u;\r
- 276:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 277:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      else\r
- 278:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      {\r
- 279:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              regValue &= (uint8)~0x00u;\r
- 280:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 281:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, regValue);\r
-  37                           .loc 1 281 0\r
-  38 0004 1A70                 strb    r2, [r3, #0]\r
-  39 0006 7047                 bx      lr\r
-  40                   .L3:\r
-  41                           .align  2\r
-  42                   .L2:\r
-  43 0008 76580040             .word   1073764470\r
-  44                           .cfi_endproc\r
-  45                   .LFE7:\r
-  46                           .size   SetAnalogRoutingPumps, .-SetAnalogRoutingPumps\r
-  47                           .section        .text.cyfitter_cfg,"ax",%progbits\r
-  48                           .align  1\r
-  49                           .global cyfitter_cfg\r
-  50                           .thumb\r
-  51                           .thumb_func\r
-  52                           .type   cyfitter_cfg, %function\r
-  53                   cyfitter_cfg:\r
-  54                   .LFB8:\r
- 282:.\Generated_Source\PSoC5/cyfitter_cfg.c **** }\r
- 283:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 284:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #define CY_AMUX_UNUSED CYREG_BOOST_SR\r
- 285:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 286:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 287:.\Generated_Source\PSoC5/cyfitter_cfg.c **** /*******************************************************************************\r
- 288:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Function Name: cyfitter_cfg\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 7\r
-\r
-\r
- 289:.\Generated_Source\PSoC5/cyfitter_cfg.c **** ********************************************************************************\r
- 290:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Summary:\r
- 291:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  This function is called by the start-up code for the selected device. It\r
- 292:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  performs all of the necessary device configuration based on the design\r
- 293:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  settings.  This includes settings from the Design Wide Resources (DWR) such\r
- 294:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *  as Clocks and Pins as well as any component configuration that is necessary.\r
- 295:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 296:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Parameters:  \r
- 297:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
- 298:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 299:.\Generated_Source\PSoC5/cyfitter_cfg.c **** * Return:\r
- 300:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *   void\r
- 301:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *\r
- 302:.\Generated_Source\PSoC5/cyfitter_cfg.c **** *******************************************************************************/\r
- 303:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 305:.\Generated_Source\PSoC5/cyfitter_cfg.c **** {\r
-  55                           .loc 1 305 0\r
-  56                           .cfi_startproc\r
-  57                           @ args = 0, pretend = 0, frame = 0\r
-  58                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  59 0000 F8B5                 push    {r3, r4, r5, r6, r7, lr}\r
-  60                   .LCFI0:\r
-  61                           .cfi_def_cfa_offset 24\r
-  62                           .cfi_offset 3, -24\r
-  63                           .cfi_offset 4, -20\r
-  64                           .cfi_offset 5, -16\r
-  65                           .cfi_offset 6, -12\r
-  66                           .cfi_offset 7, -8\r
-  67                           .cfi_offset 14, -4\r
- 306:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* IOPINS0_0 Address: CYREG_PRT0_DM0 Size (bytes): 8 */\r
- 307:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      static const uint8 CYCODE BS_IOPINS0_0_VAL[] = {\r
- 308:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              0x00u, 0xFFu, 0xFFu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
- 309:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 310:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* IOPINS0_8 Address: CYREG_PRT15_DR Size (bytes): 10 */\r
- 311:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      static const uint8 CYCODE BS_IOPINS0_8_VAL[] = {\r
- 312:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u};\r
- 313:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 314:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* IOPINS0_3 Address: CYREG_PRT3_DM0 Size (bytes): 8 */\r
- 315:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {\r
- 316:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              0x00u, 0x3Eu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
- 317:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 318:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */\r
- 319:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {\r
- 320:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              0x00u, 0xFCu, 0xFCu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
- 321:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 322:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* IOPINS0_6 Address: CYREG_PRT6_DM0 Size (bytes): 8 */\r
- 323:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      static const uint8 CYCODE BS_IOPINS0_6_VAL[] = {\r
- 324:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              0x00u, 0x0Fu, 0x0Fu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
- 325:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 326:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #ifdef CYGlobalIntDisable\r
- 327:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Disable interrupts by default. Let user enable if/when they want. */\r
- 328:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYGlobalIntDisable\r
-  68                           .loc 1 328 0\r
-  69                   @ 328 ".\Generated_Source\PSoC5\cyfitter_cfg.c" 1\r
-  70 0002 72B6                 CPSID   i\r
-  71                   @ 0 "" 2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 8\r
-\r
-\r
- 329:.\Generated_Source\PSoC5/cyfitter_cfg.c **** #endif\r
- 330:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 331:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 332:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). *\r
- 333:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01\r
-  72                           .loc 1 333 0\r
-  73                           .thumb\r
-  74 0004 5E4B                 ldr     r3, .L23\r
-  75 0006 0122                 movs    r2, #1\r
-  76                   .LBB32:\r
-  77                   .LBB33:\r
- 190:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);\r
-  78                           .loc 1 190 0\r
-  79 0008 A3F5A061             sub     r1, r3, #1280\r
- 193:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);\r
-  80                           .loc 1 193 0\r
-  81 000c A1F58075             sub     r5, r1, #256\r
- 190:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);\r
-  82                           .loc 1 190 0\r
-  83 0010 0620                 movs    r0, #6\r
- 193:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);\r
-  84                           .loc 1 193 0\r
-  85 0012 5224                 movs    r4, #82\r
- 194:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_\r
-  86                           .loc 1 194 0\r
-  87 0014 5B4E                 ldr     r6, .L23+4\r
-  88                   .LBE33:\r
-  89                   .LBE32:\r
-  90                           .loc 1 333 0\r
-  91 0016 1A70                 strb    r2, [r3, #0]\r
-  92                   .LBB36:\r
-  93                   .LBB34:\r
- 190:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);\r
-  94                           .loc 1 190 0\r
-  95 0018 0870                 strb    r0, [r1, #0]\r
- 193:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);\r
-  96                           .loc 1 193 0\r
-  97 001a 2C70                 strb    r4, [r5, #0]\r
- 194:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_\r
-  98                           .loc 1 194 0\r
-  99 001c 3778                 ldrb    r7, [r6, #0]    @ zero_extendqisi2\r
- 197:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0818u);\r
- 100                           .loc 1 197 0\r
- 101 001e 5A4B                 ldr     r3, .L23+8\r
- 194:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_\r
- 102                           .loc 1 194 0\r
- 103 0020 5A4A                 ldr     r2, .L23+12\r
- 197:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0818u);\r
- 104                           .loc 1 197 0\r
- 105 0022 40F61800             movw    r0, #2072\r
- 198:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);\r
- 106                           .loc 1 198 0\r
- 107 0026 41F25121             movw    r1, #4689\r
- 194:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_\r
- 108                           .loc 1 194 0\r
- 109 002a 1770                 strb    r7, [r2, #0]\r
- 198:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 9\r
-\r
-\r
- 110                           .loc 1 198 0\r
- 111 002c 1925                 movs    r5, #25\r
- 197:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0818u);\r
- 112                           .loc 1 197 0\r
- 113 002e 1880                 strh    r0, [r3, #0]    @ movhi\r
- 200:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      pllLock = 0u;\r
- 114                           .loc 1 200 0\r
- 115 0030 0024                 movs    r4, #0\r
- 198:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);\r
- 116                           .loc 1 198 0\r
- 117 0032 23F8021C             strh    r1, [r3, #-2]   @ movhi\r
- 118                   .LVL2:\r
- 119                   .L6:\r
- 203:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_\r
- 120                           .loc 1 203 0\r
- 121 0036 564E                 ldr     r6, .L23+16\r
- 204:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */\r
- 122                           .loc 1 204 0\r
- 123 0038 4FF4F070             mov     r0, #480\r
- 203:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_\r
- 124                           .loc 1 203 0\r
- 125 003c 3778                 ldrb    r7, [r6, #0]    @ zero_extendqisi2\r
- 126 003e 07F00102             and     r2, r7, #1\r
- 127 0042 42EA4404             orr     r4, r2, r4, lsl #1\r
- 204:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */\r
- 128                           .loc 1 204 0\r
- 129 0046 FFF7FEFF             bl      CyDelayCycles\r
- 130                   .LVL3:\r
- 201:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)\r
- 131                           .loc 1 201 0\r
- 132 004a 013D                 subs    r5, r5, #1\r
- 203:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_\r
- 133                           .loc 1 203 0\r
- 134 004c 04F00304             and     r4, r4, #3\r
- 135                   .LVL4:\r
- 201:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)\r
- 136                           .loc 1 201 0\r
- 137 0050 17D0                 beq     .L5\r
- 138 0052 032C                 cmp     r4, #3\r
- 139 0054 EFD1                 bne     .L6\r
- 213:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);\r
- 140                           .loc 1 213 0\r
- 141 0056 4F48                 ldr     r0, .L23+20\r
- 215:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);\r
- 142                           .loc 1 215 0\r
- 143 0058 4F4F                 ldr     r7, .L23+24\r
- 144 005a 0026                 movs    r6, #0\r
- 213:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);\r
- 145                           .loc 1 213 0\r
- 146 005c 4FF48073             mov     r3, #256\r
- 147                   .LBE34:\r
- 148                   .LBE36:\r
- 334:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Setup clocks based on selections from Clock DWR */\r
- 335:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      ClockSetup();\r
- 336:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Enable/Disable Debug functionality based on settings from System DWR */\r
- 337:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG, (CY_GET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DE\r
- 149                           .loc 1 337 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 10\r
-\r
-\r
- 150 0060 4E4D                 ldr     r5, .L23+28\r
- 151                   .LBB37:\r
- 152                   .LBB35:\r
- 214:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);\r
- 153                           .loc 1 214 0\r
- 154 0062 0721                 movs    r1, #7\r
- 216:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);\r
- 155                           .loc 1 216 0\r
- 156 0064 4822                 movs    r2, #72\r
- 221:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);\r
- 157                           .loc 1 221 0\r
- 158 0066 0224                 movs    r4, #2\r
- 159                   .LVL5:\r
- 213:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);\r
- 160                           .loc 1 213 0\r
- 161 0068 0380                 strh    r3, [r0, #0]    @ movhi\r
- 214:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);\r
- 162                           .loc 1 214 0\r
- 163 006a 0170                 strb    r1, [r0, #0]\r
- 215:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);\r
- 164                           .loc 1 215 0\r
- 165 006c 3E70                 strb    r6, [r7, #0]\r
- 216:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);\r
- 166                           .loc 1 216 0\r
- 167 006e BA70                 strb    r2, [r7, #2]\r
- 217:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x00u);\r
- 168                           .loc 1 217 0\r
- 169 0070 0670                 strb    r6, [r0, #0]\r
- 220:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u);\r
- 170                           .loc 1 220 0\r
- 171 0072 4671                 strb    r6, [r0, #5]\r
- 221:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);\r
- 172                           .loc 1 221 0\r
- 173 0074 00F8034C             strb    r4, [r0, #-3]\r
- 174                   .LBE35:\r
- 175                   .LBE37:\r
- 176                           .loc 1 337 0\r
- 177 0078 2878                 ldrb    r0, [r5, #0]    @ zero_extendqisi2\r
- 178 007a 40F00403             orr     r3, r0, #4\r
- 179 007e 2B70                 strb    r3, [r5, #0]\r
- 180                   .LVL6:\r
- 181 0080 00E0                 b       .L8\r
- 182                   .LVL7:\r
- 183                   .L5:\r
- 184 0082 FEE7                 b       .L5\r
- 185                   .LVL8:\r
- 186                   .L8:\r
- 187                   .LBB38:\r
- 188                   .LBB39:\r
- 338:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 339:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      {\r
- 340:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              static const uint32 CYCODE cy_cfg_addr_table[] = {\r
- 341:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40004501u, /* Base address: 0x40004500 Count: 1 */\r
- 342:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40005202u, /* Base address: 0x40005200 Count: 2 */\r
- 343:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40011701u, /* Base address: 0x40011700 Count: 1 */\r
- 344:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40011901u, /* Base address: 0x40011900 Count: 1 */\r
- 345:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014003u, /* Base address: 0x40014000 Count: 3 */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 11\r
-\r
-\r
- 346:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014102u, /* Base address: 0x40014100 Count: 2 */\r
- 347:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014202u, /* Base address: 0x40014200 Count: 2 */\r
- 348:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014302u, /* Base address: 0x40014300 Count: 2 */\r
- 349:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014703u, /* Base address: 0x40014700 Count: 3 */\r
- 350:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014803u, /* Base address: 0x40014800 Count: 3 */\r
- 351:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40014C02u, /* Base address: 0x40014C00 Count: 2 */\r
- 352:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      0x40015101u, /* Base address: 0x40015100 Count: 1 */\r
- 353:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              };\r
- 354:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 355:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {\r
- 356:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x7Eu, 0x02u},\r
- 357:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x1Cu, 0x3Eu},\r
- 358:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x7Cu, 0x40u},\r
- 359:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xEEu, 0x0Au},\r
- 360:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xEEu, 0x0Au},\r
- 361:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x33u, 0x80u},\r
- 362:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x36u, 0x40u},\r
- 363:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xCCu, 0x30u},\r
- 364:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA6u, 0x40u},\r
- 365:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA7u, 0x80u},\r
- 366:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA6u, 0x40u},\r
- 367:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA7u, 0x80u},\r
- 368:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA6u, 0x40u},\r
- 369:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xA7u, 0x80u},\r
- 370:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x08u, 0x08u},\r
- 371:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x0Fu, 0x40u},\r
- 372:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xC2u, 0x0Cu},\r
- 373:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xAEu, 0x40u},\r
- 374:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xAFu, 0x80u},\r
- 375:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xEEu, 0x50u},\r
- 376:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xACu, 0x08u},\r
- 377:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0xAFu, 0x40u},\r
- 378:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {0x00u, 0x0Au},\r
- 379:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              };\r
- 380:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 381:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 382:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 383:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CYPACKED typedef struct {\r
- 384:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      void CYFAR *address;\r
- 385:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      uint16 size;\r
- 386:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              } CYPACKED_ATTR cfg_memset_t;\r
- 387:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 388:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              static const cfg_memset_t CYCODE cfg_memset_list [] = {\r
- 389:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      /* address, size */\r
- 390:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYREG_PRT1_DR), 32u},\r
- 391:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYREG_PRT5_DR), 16u},\r
- 392:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYREG_PRT12_DR), 16u},\r
- 393:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},\r
- 394:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u},\r
- 395:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},\r
- 396:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},\r
- 397:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), 32u},\r
- 398:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              };\r
- 399:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 400:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint8 CYDATA i;\r
- 401:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 402:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              /* Zero out critical memory blocks before beginning configuration */\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 12\r
-\r
-\r
- 403:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)\r
- 404:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              {\r
- 405:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      const cfg_memset_t CYCODE * CYDATA ms = &cfg_memset_list[i];\r
- 189                           .loc 1 405 0 discriminator 2\r
- 190 0084 464F                 ldr     r7, .L23+32\r
- 191 0086 0621                 movs    r1, #6\r
- 192 0088 01FB0672             mla     r2, r1, r6, r7\r
- 193                   .LVL9:\r
- 194                   .LBB40:\r
- 195                   .LBB41:\r
-  61:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memset(s, 0, n);\r
- 196                           .loc 1 61 0 discriminator 2\r
- 197 008c 0021                 movs    r1, #0\r
- 198 008e 1068                 ldr     r0, [r2, #0]    @ unaligned\r
- 199 0090 0136                 adds    r6, r6, #1\r
- 200                   .LVL10:\r
- 201 0092 9288                 ldrh    r2, [r2, #4]    @ unaligned\r
- 202                   .LVL11:\r
- 203 0094 FFF7FEFF             bl      memset\r
- 204                   .LVL12:\r
- 205                   .LBE41:\r
- 206                   .LBE40:\r
- 207                   .LBE39:\r
- 403:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)\r
- 208                           .loc 1 403 0 discriminator 2\r
- 209 0098 082E                 cmp     r6, #8\r
- 210 009a F3D1                 bne     .L8\r
- 403:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)\r
- 211                           .loc 1 403 0 is_stmt 0\r
- 212 009c 0023                 movs    r3, #0\r
- 213 009e 1946                 mov     r1, r3\r
- 214                   .LVL13:\r
- 215                   .L11:\r
- 216                   .LBB42:\r
- 217                   .LBB43:\r
- 218                   .LBB44:\r
- 154:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint32 baseAddr = addr_table[i];\r
- 219                           .loc 1 154 0 is_stmt 1\r
- 220 00a0 404C                 ldr     r4, .L23+36\r
- 221                   .LBE44:\r
- 222                   .LBE43:\r
- 223                   .LBE42:\r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 224                           .loc 1 304 0\r
- 225 00a2 0022                 movs    r2, #0\r
- 226                   .LBB47:\r
- 227                   .LBB46:\r
- 228                   .LBB45:\r
- 154:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint32 baseAddr = addr_table[i];\r
- 229                           .loc 1 154 0\r
- 230 00a4 1859                 ldr     r0, [r3, r4]\r
- 231                   .LVL14:\r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 232                           .loc 1 304 0\r
- 233 00a6 3034                 adds    r4, r4, #48\r
- 155:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              uint8 count = (uint8)baseAddr;\r
- 234                           .loc 1 155 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 13\r
-\r
-\r
- 235 00a8 C6B2                 uxtb    r6, r0\r
- 236                   .LVL15:\r
- 156:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              baseAddr &= 0xFFFFFF00u;\r
- 237                           .loc 1 156 0\r
- 238 00aa 20F0FF07             bic     r7, r0, #255\r
- 239                   .LVL16:\r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 240                           .loc 1 304 0\r
- 241 00ae 04EB4104             add     r4, r4, r1, lsl #1\r
- 242                   .LVL17:\r
- 243                   .L9:\r
- 157:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              while (count != 0u)\r
- 244                           .loc 1 157 0\r
- 245 00b2 D5B2                 uxtb    r5, r2\r
- 246 00b4 AE42                 cmp     r6, r5\r
- 247 00b6 09D0                 beq     .L22\r
- 248                   .L10:\r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 249                           .loc 1 304 0\r
- 250 00b8 04EB420C             add     ip, r4, r2, lsl #1\r
- 159:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      CY_SET_XTND_REG8((void CYFAR *)(baseAddr + data_table[j].offset), data_table[j].value);\r
- 251                           .loc 1 159 0\r
- 252 00bc 14F81250             ldrb    r5, [r4, r2, lsl #1]    @ zero_extendqisi2\r
- 253 00c0 9CF801E0             ldrb    lr, [ip, #1]    @ zero_extendqisi2\r
- 254 00c4 0132                 adds    r2, r2, #1\r
- 255 00c6 05F807E0             strb    lr, [r5, r7]\r
- 256 00ca F2E7                 b       .L9\r
- 257                   .L22:\r
- 258 00cc 0433                 adds    r3, r3, #4\r
- 304:.\Generated_Source\PSoC5/cyfitter_cfg.c **** void cyfitter_cfg(void)\r
- 259                           .loc 1 304 0\r
- 260 00ce C0B2                 uxtb    r0, r0\r
- 261                   .LBE45:\r
- 152:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      for (i = 0u; i < CY_CFG_BASE_ADDR_COUNT; i++)\r
- 262                           .loc 1 152 0\r
- 263 00d0 302B                 cmp     r3, #48\r
- 264 00d2 0144                 add     r1, r1, r0\r
- 265                   .LVL18:\r
- 266 00d4 E4D1                 bne     .L11\r
- 267                   .LBE46:\r
- 268                   .LBE47:\r
- 406:.\Generated_Source\PSoC5/cyfitter_cfg.c ****                      CYMEMZERO(ms->address, (uint32)(ms->size));\r
- 407:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              }\r
- 408:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 409:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              cfg_write_bytes32(cy_cfg_addr_table, cy_cfg_data_table);\r
- 410:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 411:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              /* Enable digital routing */\r
- 412:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL0_B\r
- 269                           .loc 1 412 0\r
- 270 00d6 344C                 ldr     r4, .L23+40\r
- 271 00d8 2278                 ldrb    r2, [r4, #0]    @ zero_extendqisi2\r
- 272 00da 42F00200             orr     r0, r2, #2\r
- 273 00de 2070                 strb    r0, [r4, #0]\r
- 413:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_B\r
- 274                           .loc 1 413 0\r
- 275 00e0 217C                 ldrb    r1, [r4, #16]   @ zero_extendqisi2\r
- 276                   .LVL19:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 14\r
-\r
-\r
- 414:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 415:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              /* Enable UDB array */\r
- 416:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG\r
- 417:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_\r
- 277                           .loc 1 417 0\r
- 278 00e2 3248                 ldr     r0, .L23+44\r
- 413:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_B\r
- 279                           .loc 1 413 0\r
- 280 00e4 41F00203             orr     r3, r1, #2\r
- 416:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG\r
- 281                           .loc 1 416 0\r
- 282 00e8 3149                 ldr     r1, .L23+48\r
- 413:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_B\r
- 283                           .loc 1 413 0\r
- 284 00ea 2374                 strb    r3, [r4, #16]\r
- 416:.\Generated_Source\PSoC5/cyfitter_cfg.c ****              CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG\r
- 285                           .loc 1 416 0\r
- 286 00ec 0C78                 ldrb    r4, [r1, #0]    @ zero_extendqisi2\r
- 287 00ee 44F04002             orr     r2, r4, #64\r
- 288 00f2 0A70                 strb    r2, [r1, #0]\r
- 289                           .loc 1 417 0\r
- 290 00f4 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
-  75:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
- 291                           .loc 1 75 0\r
- 292 00f6 2F4A                 ldr     r2, .L23+52\r
- 293                           .loc 1 417 0\r
- 294 00f8 43F01004             orr     r4, r3, #16\r
-  75:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
- 295                           .loc 1 75 0\r
- 296 00fc 2E4B                 ldr     r3, .L23+56\r
- 297                           .loc 1 417 0\r
- 298 00fe 0470                 strb    r4, [r0, #0]\r
- 299                   .LVL20:\r
-  75:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
- 300                           .loc 1 75 0\r
- 301 0100 1868                 ldr     r0, [r3, #0]    @ unaligned\r
- 302 0102 5C68                 ldr     r4, [r3, #4]    @ unaligned\r
- 303 0104 1060                 str     r0, [r2, #0]    @ unaligned\r
- 304 0106 5460                 str     r4, [r2, #4]    @ unaligned\r
- 305                   .LVL21:\r
- 306 0108 1A46                 mov     r2, r3\r
- 307 010a 2C48                 ldr     r0, .L23+60\r
- 308 010c 52F8084F             ldr     r4, [r2, #8]!   @ unaligned\r
- 309 0110 0460                 str     r4, [r0, #0]    @ unaligned\r
- 310 0112 5468                 ldr     r4, [r2, #4]    @ unaligned\r
- 311 0114 1289                 ldrh    r2, [r2, #8]    @ unaligned\r
- 312 0116 4460                 str     r4, [r0, #4]    @ unaligned\r
- 313 0118 0281                 strh    r2, [r0, #8]    @ unaligned\r
- 314                   .LVL22:\r
- 315 011a 1A46                 mov     r2, r3\r
- 316 011c 52F8124F             ldr     r4, [r2, #18]!  @ unaligned\r
- 317 0120 5268                 ldr     r2, [r2, #4]    @ unaligned\r
- 318 0122 40F8BE4C             str     r4, [r0, #-190] @ unaligned\r
- 319 0126 40F8BA2C             str     r2, [r0, #-186] @ unaligned\r
- 320                   .LVL23:\r
- 321 012a 1A46                 mov     r2, r3\r
- 322 012c 52F81A4F             ldr     r4, [r2, #26]!  @ unaligned\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 15\r
-\r
-\r
- 323 0130 5268                 ldr     r2, [r2, #4]    @ unaligned\r
- 324 0132 40F8AE4C             str     r4, [r0, #-174] @ unaligned\r
- 325 0136 40F8AA2C             str     r2, [r0, #-170] @ unaligned\r
- 326                   .LVL24:\r
- 327 013a 53F8220F             ldr     r0, [r3, #34]!  @ unaligned\r
- 328 013e 204A                 ldr     r2, .L23+64\r
- 329 0140 5B68                 ldr     r3, [r3, #4]    @ unaligned\r
- 330 0142 1060                 str     r0, [r2, #0]    @ unaligned\r
- 331                   .LBE38:\r
- 418:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      }\r
- 419:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 420:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Perform second pass device configuration. These items must be configured in specific order afte\r
- 421:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT0_DM0), (const void CYCODE *)(BS_IOPINS0_0_VAL), 8u);\r
- 422:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT15_DR), (const void CYCODE *)(BS_IOPINS0_8_VAL), 10u);\r
- 423:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DM0), (const void CYCODE *)(BS_IOPINS0_3_VAL), 8u);\r
- 424:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT4_DM0), (const void CYCODE *)(BS_IOPINS0_4_VAL), 8u);\r
- 425:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT6_DM0), (const void CYCODE *)(BS_IOPINS0_6_VAL), 8u);\r
- 426:.\Generated_Source\PSoC5/cyfitter_cfg.c **** \r
- 427:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      /* Switch Boost to the precision bandgap reference from its internal reference */\r
- 428:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_REG8((void CYXDATA *)CYREG_BOOST_CR2, (CY_GET_REG8((void CYXDATA *)CYREG_BOOST_CR2) | 0x08u\r
- 332                           .loc 1 428 0\r
- 333 0144 1F48                 ldr     r0, .L23+68\r
- 334                   .LBB48:\r
-  75:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
- 335                           .loc 1 75 0\r
- 336 0146 5360                 str     r3, [r2, #4]    @ unaligned\r
- 337                   .LBE48:\r
- 338                           .loc 1 428 0\r
- 339 0148 0278                 ldrb    r2, [r0, #0]    @ zero_extendqisi2\r
- 340 014a 42F00803             orr     r3, r2, #8\r
- 341 014e 0370                 strb    r3, [r0, #0]\r
- 342                   .LBB49:\r
- 343                   .LBB50:\r
- 246:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM +\r
- 344                           .loc 1 246 0\r
- 345 0150 1D48                 ldr     r0, .L23+72\r
- 247:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));\r
- 346                           .loc 1 247 0\r
- 347 0152 1E4A                 ldr     r2, .L23+76\r
- 246:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM +\r
- 348                           .loc 1 246 0\r
- 349 0154 0378                 ldrb    r3, [r0, #0]    @ zero_extendqisi2\r
- 350                   .LVL25:\r
- 247:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));\r
- 351                           .loc 1 247 0\r
- 352 0156 03F00700             and     r0, r3, #7\r
- 248:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));\r
- 353                           .loc 1 248 0\r
- 354 015a 1B09                 lsrs    r3, r3, #4\r
- 355                   .LVL26:\r
- 247:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));\r
- 356                           .loc 1 247 0\r
- 357 015c 1070                 strb    r0, [r2, #0]\r
- 248:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));\r
- 358                           .loc 1 248 0\r
- 359 015e 5370                 strb    r3, [r2, #1]\r
- 249:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, 0x44u);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 16\r
-\r
-\r
- 360                           .loc 1 249 0\r
- 361 0160 1B4A                 ldr     r2, .L23+80\r
- 362 0162 4420                 movs    r0, #68\r
- 363 0164 1070                 strb    r0, [r2, #0]\r
- 364                   .LVL27:\r
- 365                   .LBE50:\r
- 366                   .LBE49:\r
- 367                   .LBB51:\r
- 368                   .LBB52:\r
-  68:.\Generated_Source\PSoC5/cyfitter_cfg.c ****      (void)memcpy(dest, src, n);\r
- 369                           .loc 1 68 0\r
- 370 0166 1B4A                 ldr     r2, .L23+84\r
- 371 0168 0B46                 mov     r3, r1\r
- 372 016a 0C31                 adds    r1, r1, #12\r
- 373                   .L12:\r
- 374 016c 53F8040B             ldr     r0, [r3], #4    @ unaligned\r
- 375 0170 8B42                 cmp     r3, r1\r
- 376 0172 42F8040B             str     r0, [r2], #4    @ unaligned\r
- 377 0176 F9D1                 bne     .L12\r
- 378 0178 1988                 ldrh    r1, [r3, #0]    @ unaligned\r
- 379 017a 1180                 strh    r1, [r2, #0]    @ unaligned\r
- 380 017c F8BD                 pop     {r3, r4, r5, r6, r7, pc}\r
- 381                   .L24:\r
- 382 017e 00BF                 .align  2\r
- 383                   .L23:\r
- 384 0180 00480040             .word   1073760256\r
- 385 0184 0F010049             .word   1224737039\r
- 386 0188 22420040             .word   1073758754\r
- 387 018c A1460040             .word   1073759905\r
- 388 0190 25420040             .word   1073758757\r
- 389 0194 04400040             .word   1073758212\r
- 390 0198 06400040             .word   1073758214\r
- 391 019c E8460040             .word   1073759976\r
- 392 01a0 00000000             .word   .LANCHOR0\r
- 393 01a4 30000000             .word   .LANCHOR0+48\r
- 394 01a8 03500140             .word   1073827843\r
- 395 01ac C2430040             .word   1073759170\r
- 396 01b0 A0430040             .word   1073759136\r
- 397 01b4 02510040             .word   1073762562\r
- 398 01b8 8E000000             .word   .LANCHOR0+142\r
- 399 01bc F0510040             .word   1073762800\r
- 400 01c0 62510040             .word   1073762658\r
- 401 01c4 22430040             .word   1073759010\r
- 402 01c8 CF010049             .word   1224737231\r
- 403 01cc 6E580040             .word   1073764462\r
- 404 01d0 76580040             .word   1073764470\r
- 405 01d4 B0430040             .word   1073759152\r
- 406                   .LBE52:\r
- 407                   .LBE51:\r
- 408                           .cfi_endproc\r
- 409                   .LFE8:\r
- 410                           .size   cyfitter_cfg, .-cyfitter_cfg\r
- 411                           .section        .rodata\r
- 412                           .align  2\r
- 413                           .set    .LANCHOR0,. + 0\r
- 414                           .type   cfg_memset_list.4819, %object\r
- 415                           .size   cfg_memset_list.4819, 48\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 17\r
-\r
-\r
- 416                   cfg_memset_list.4819:\r
- 417 0000 10510040             .4byte  1073762576\r
- 418 0004 2000                 .2byte  32\r
- 419 0006 50510040             .4byte  1073762640\r
- 420 000a 1000                 .2byte  16\r
- 421 000c C0510040             .4byte  1073762752\r
- 422 0010 1000                 .2byte  16\r
- 423 0012 00000140             .4byte  1073807360\r
- 424 0016 0010                 .2byte  4096\r
- 425 0018 00140140             .4byte  1073812480\r
- 426 001c 0008                 .2byte  2048\r
- 427 001e 00400140             .4byte  1073823744\r
- 428 0022 000A                 .2byte  2560\r
- 429 0024 004C0140             .4byte  1073826816\r
- 430 0028 0002                 .2byte  512\r
- 431 002a 00500140             .4byte  1073827840\r
- 432 002e 2000                 .2byte  32\r
- 433                           .type   cy_cfg_addr_table.4813, %object\r
- 434                           .size   cy_cfg_addr_table.4813, 48\r
- 435                   cy_cfg_addr_table.4813:\r
- 436 0030 01450040             .word   1073759489\r
- 437 0034 02520040             .word   1073762818\r
- 438 0038 01170140             .word   1073813249\r
- 439 003c 01190140             .word   1073813761\r
- 440 0040 03400140             .word   1073823747\r
- 441 0044 02410140             .word   1073824002\r
- 442 0048 02420140             .word   1073824258\r
- 443 004c 02430140             .word   1073824514\r
- 444 0050 03470140             .word   1073825539\r
- 445 0054 03480140             .word   1073825795\r
- 446 0058 024C0140             .word   1073826818\r
- 447 005c 01510140             .word   1073828097\r
- 448                           .type   cy_cfg_data_table.4814, %object\r
- 449                           .size   cy_cfg_data_table.4814, 46\r
- 450                   cy_cfg_data_table.4814:\r
- 451 0060 7E                   .byte   126\r
- 452 0061 02                   .byte   2\r
- 453 0062 1C                   .byte   28\r
- 454 0063 3E                   .byte   62\r
- 455 0064 7C                   .byte   124\r
- 456 0065 40                   .byte   64\r
- 457 0066 EE                   .byte   -18\r
- 458 0067 0A                   .byte   10\r
- 459 0068 EE                   .byte   -18\r
- 460 0069 0A                   .byte   10\r
- 461 006a 33                   .byte   51\r
- 462 006b 80                   .byte   -128\r
- 463 006c 36                   .byte   54\r
- 464 006d 40                   .byte   64\r
- 465 006e CC                   .byte   -52\r
- 466 006f 30                   .byte   48\r
- 467 0070 A6                   .byte   -90\r
- 468 0071 40                   .byte   64\r
- 469 0072 A7                   .byte   -89\r
- 470 0073 80                   .byte   -128\r
- 471 0074 A6                   .byte   -90\r
- 472 0075 40                   .byte   64\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 18\r
-\r
-\r
- 473 0076 A7                   .byte   -89\r
- 474 0077 80                   .byte   -128\r
- 475 0078 A6                   .byte   -90\r
- 476 0079 40                   .byte   64\r
- 477 007a A7                   .byte   -89\r
- 478 007b 80                   .byte   -128\r
- 479 007c 08                   .byte   8\r
- 480 007d 08                   .byte   8\r
- 481 007e 0F                   .byte   15\r
- 482 007f 40                   .byte   64\r
- 483 0080 C2                   .byte   -62\r
- 484 0081 0C                   .byte   12\r
- 485 0082 AE                   .byte   -82\r
- 486 0083 40                   .byte   64\r
- 487 0084 AF                   .byte   -81\r
- 488 0085 80                   .byte   -128\r
- 489 0086 EE                   .byte   -18\r
- 490 0087 50                   .byte   80\r
- 491 0088 AC                   .byte   -84\r
- 492 0089 08                   .byte   8\r
- 493 008a AF                   .byte   -81\r
- 494 008b 40                   .byte   64\r
- 495 008c 00                   .byte   0\r
- 496 008d 0A                   .byte   10\r
- 497                           .type   BS_IOPINS0_0_VAL.4808, %object\r
- 498                           .size   BS_IOPINS0_0_VAL.4808, 8\r
- 499                   BS_IOPINS0_0_VAL.4808:\r
- 500 008e 00                   .byte   0\r
- 501 008f FF                   .byte   -1\r
- 502 0090 FF                   .byte   -1\r
- 503 0091 00                   .byte   0\r
- 504 0092 00                   .byte   0\r
- 505 0093 00                   .byte   0\r
- 506 0094 00                   .byte   0\r
- 507 0095 00                   .byte   0\r
- 508                           .type   BS_IOPINS0_8_VAL.4809, %object\r
- 509                           .size   BS_IOPINS0_8_VAL.4809, 10\r
- 510                   BS_IOPINS0_8_VAL.4809:\r
- 511 0096 00                   .byte   0\r
- 512 0097 00                   .byte   0\r
- 513 0098 00                   .byte   0\r
- 514 0099 00                   .byte   0\r
- 515 009a 00                   .byte   0\r
- 516 009b 00                   .byte   0\r
- 517 009c 00                   .byte   0\r
- 518 009d 00                   .byte   0\r
- 519 009e C0                   .byte   -64\r
- 520 009f 00                   .byte   0\r
- 521                           .type   BS_IOPINS0_3_VAL.4810, %object\r
- 522                           .size   BS_IOPINS0_3_VAL.4810, 8\r
- 523                   BS_IOPINS0_3_VAL.4810:\r
- 524 00a0 00                   .byte   0\r
- 525 00a1 3E                   .byte   62\r
- 526 00a2 00                   .byte   0\r
- 527 00a3 00                   .byte   0\r
- 528 00a4 00                   .byte   0\r
- 529 00a5 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 19\r
-\r
-\r
- 530 00a6 00                   .byte   0\r
- 531 00a7 00                   .byte   0\r
- 532                           .type   BS_IOPINS0_4_VAL.4811, %object\r
- 533                           .size   BS_IOPINS0_4_VAL.4811, 8\r
- 534                   BS_IOPINS0_4_VAL.4811:\r
- 535 00a8 00                   .byte   0\r
- 536 00a9 FC                   .byte   -4\r
- 537 00aa FC                   .byte   -4\r
- 538 00ab 00                   .byte   0\r
- 539 00ac 00                   .byte   0\r
- 540 00ad 00                   .byte   0\r
- 541 00ae 00                   .byte   0\r
- 542 00af 00                   .byte   0\r
- 543                           .type   BS_IOPINS0_6_VAL.4812, %object\r
- 544                           .size   BS_IOPINS0_6_VAL.4812, 8\r
- 545                   BS_IOPINS0_6_VAL.4812:\r
- 546 00b0 00                   .byte   0\r
- 547 00b1 0F                   .byte   15\r
- 548 00b2 0F                   .byte   15\r
- 549 00b3 00                   .byte   0\r
- 550 00b4 00                   .byte   0\r
- 551 00b5 00                   .byte   0\r
- 552 00b6 00                   .byte   0\r
- 553 00b7 00                   .byte   0\r
- 554                           .text\r
- 555                   .Letext0:\r
- 556                           .file 2 "c:\\program files (x86)\\cypress\\psoc creator\\3.0\\psoc creator\\import\\gnu_cs\\arm\\4\r
- 557                           .file 3 "./Generated_Source/PSoC5/cytypes.h"\r
- 558                           .file 4 "./Generated_Source/PSoC5/CyLib.h"\r
- 559                           .section        .debug_info,"",%progbits\r
- 560                   .Ldebug_info0:\r
- 561 0000 45050000             .4byte  0x545\r
- 562 0004 0200                 .2byte  0x2\r
- 563 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 564 000a 04                   .byte   0x4\r
- 565 000b 01                   .uleb128 0x1\r
- 566 000c 3C020000             .4byte  .LASF52\r
- 567 0010 01                   .byte   0x1\r
- 568 0011 2E010000             .4byte  .LASF53\r
- 569 0015 99010000             .4byte  .LASF54\r
- 570 0019 A0000000             .4byte  .Ldebug_ranges0+0xa0\r
- 571 001d 00000000             .4byte  0\r
- 572 0021 00000000             .4byte  0\r
- 573 0025 00000000             .4byte  .Ldebug_line0\r
- 574 0029 02                   .uleb128 0x2\r
- 575 002a 01                   .byte   0x1\r
- 576 002b 06                   .byte   0x6\r
- 577 002c 8F000000             .4byte  .LASF0\r
- 578 0030 02                   .uleb128 0x2\r
- 579 0031 01                   .byte   0x1\r
- 580 0032 08                   .byte   0x8\r
- 581 0033 8A020000             .4byte  .LASF1\r
- 582 0037 02                   .uleb128 0x2\r
- 583 0038 02                   .byte   0x2\r
- 584 0039 05                   .byte   0x5\r
- 585 003a 98020000             .4byte  .LASF2\r
- 586 003e 02                   .uleb128 0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 20\r
-\r
-\r
- 587 003f 02                   .byte   0x2\r
- 588 0040 07                   .byte   0x7\r
- 589 0041 75010000             .4byte  .LASF3\r
- 590 0045 03                   .uleb128 0x3\r
- 591 0046 04                   .byte   0x4\r
- 592 0047 05                   .byte   0x5\r
- 593 0048 696E7400             .ascii  "int\000"\r
- 594 004c 02                   .uleb128 0x2\r
- 595 004d 04                   .byte   0x4\r
- 596 004e 07                   .byte   0x7\r
- 597 004f 21010000             .4byte  .LASF4\r
- 598 0053 02                   .uleb128 0x2\r
- 599 0054 08                   .byte   0x8\r
- 600 0055 05                   .byte   0x5\r
- 601 0056 81000000             .4byte  .LASF5\r
- 602 005a 02                   .uleb128 0x2\r
- 603 005b 08                   .byte   0x8\r
- 604 005c 07                   .byte   0x7\r
- 605 005d 3C000000             .4byte  .LASF6\r
- 606 0061 02                   .uleb128 0x2\r
- 607 0062 04                   .byte   0x4\r
- 608 0063 05                   .byte   0x5\r
- 609 0064 E5000000             .4byte  .LASF7\r
- 610 0068 02                   .uleb128 0x2\r
- 611 0069 04                   .byte   0x4\r
- 612 006a 07                   .byte   0x7\r
- 613 006b DA010000             .4byte  .LASF8\r
- 614 006f 04                   .uleb128 0x4\r
- 615 0070 04                   .byte   0x4\r
- 616 0071 02                   .uleb128 0x2\r
- 617 0072 04                   .byte   0x4\r
- 618 0073 07                   .byte   0x7\r
- 619 0074 56010000             .4byte  .LASF9\r
- 620 0078 02                   .uleb128 0x2\r
- 621 0079 01                   .byte   0x1\r
- 622 007a 08                   .byte   0x8\r
- 623 007b DF020000             .4byte  .LASF10\r
- 624 007f 05                   .uleb128 0x5\r
- 625 0080 16000000             .4byte  .LASF11\r
- 626 0084 02                   .byte   0x2\r
- 627 0085 D5                   .byte   0xd5\r
- 628 0086 4C000000             .4byte  0x4c\r
- 629 008a 05                   .uleb128 0x5\r
- 630 008b F4000000             .4byte  .LASF12\r
- 631 008f 03                   .byte   0x3\r
- 632 0090 5B                   .byte   0x5b\r
- 633 0091 30000000             .4byte  0x30\r
- 634 0095 05                   .uleb128 0x5\r
- 635 0096 06000000             .4byte  .LASF13\r
- 636 009a 03                   .byte   0x3\r
- 637 009b 5C                   .byte   0x5c\r
- 638 009c 3E000000             .4byte  0x3e\r
- 639 00a0 05                   .uleb128 0x5\r
- 640 00a1 0B010000             .4byte  .LASF14\r
- 641 00a5 03                   .byte   0x3\r
- 642 00a6 5D                   .byte   0x5d\r
- 643 00a7 71000000             .4byte  0x71\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 21\r
-\r
-\r
- 644 00ab 02                   .uleb128 0x2\r
- 645 00ac 04                   .byte   0x4\r
- 646 00ad 04                   .byte   0x4\r
- 647 00ae 28020000             .4byte  .LASF15\r
- 648 00b2 02                   .uleb128 0x2\r
- 649 00b3 08                   .byte   0x8\r
- 650 00b4 04                   .byte   0x4\r
- 651 00b5 FA000000             .4byte  .LASF16\r
- 652 00b9 05                   .uleb128 0x5\r
- 653 00ba 85020000             .4byte  .LASF17\r
- 654 00be 03                   .byte   0x3\r
- 655 00bf F0                   .byte   0xf0\r
- 656 00c0 C4000000             .4byte  0xc4\r
- 657 00c4 06                   .uleb128 0x6\r
- 658 00c5 8A000000             .4byte  0x8a\r
- 659 00c9 05                   .uleb128 0x5\r
- 660 00ca EE000000             .4byte  .LASF18\r
- 661 00ce 03                   .byte   0x3\r
- 662 00cf F1                   .byte   0xf1\r
- 663 00d0 D4000000             .4byte  0xd4\r
- 664 00d4 06                   .uleb128 0x6\r
- 665 00d5 95000000             .4byte  0x95\r
- 666 00d9 07                   .uleb128 0x7\r
- 667 00da 02                   .byte   0x2\r
- 668 00db 01                   .byte   0x1\r
- 669 00dc 7D                   .byte   0x7d\r
- 670 00dd FE000000             .4byte  0xfe\r
- 671 00e1 08                   .uleb128 0x8\r
- 672 00e2 FA020000             .4byte  .LASF19\r
- 673 00e6 01                   .byte   0x1\r
- 674 00e7 7F                   .byte   0x7f\r
- 675 00e8 8A000000             .4byte  0x8a\r
- 676 00ec 02                   .byte   0x2\r
- 677 00ed 23                   .byte   0x23\r
- 678 00ee 00                   .uleb128 0\r
- 679 00ef 08                   .uleb128 0x8\r
- 680 00f0 1B010000             .4byte  .LASF20\r
- 681 00f4 01                   .byte   0x1\r
- 682 00f5 80                   .byte   0x80\r
- 683 00f6 8A000000             .4byte  0x8a\r
- 684 00fa 02                   .byte   0x2\r
- 685 00fb 23                   .byte   0x23\r
- 686 00fc 01                   .uleb128 0x1\r
- 687 00fd 00                   .byte   0\r
- 688 00fe 05                   .uleb128 0x5\r
- 689 00ff CC020000             .4byte  .LASF21\r
- 690 0103 01                   .byte   0x1\r
- 691 0104 81                   .byte   0x81\r
- 692 0105 D9000000             .4byte  0xd9\r
- 693 0109 09                   .uleb128 0x9\r
- 694 010a 1D000000             .4byte  .LASF22\r
- 695 010e 01                   .byte   0x1\r
- 696 010f 69                   .byte   0x69\r
- 697 0110 01                   .byte   0x1\r
- 698 0111 01                   .byte   0x1\r
- 699 0112 22010000             .4byte  0x122\r
- 700 0116 0A                   .uleb128 0xa\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 22\r
-\r
-\r
- 701 0117 CA000000             .4byte  .LASF24\r
- 702 011b 01                   .byte   0x1\r
- 703 011c 69                   .byte   0x69\r
- 704 011d 8A000000             .4byte  0x8a\r
- 705 0121 00                   .byte   0\r
- 706 0122 09                   .uleb128 0x9\r
- 707 0123 CA010000             .4byte  .LASF23\r
- 708 0127 01                   .byte   0x1\r
- 709 0128 49                   .byte   0x49\r
- 710 0129 01                   .byte   0x1\r
- 711 012a 01                   .byte   0x1\r
- 712 012b 4F010000             .4byte  0x14f\r
- 713 012f 0A                   .uleb128 0xa\r
- 714 0130 23020000             .4byte  .LASF25\r
- 715 0134 01                   .byte   0x1\r
- 716 0135 49                   .byte   0x49\r
- 717 0136 6F000000             .4byte  0x6f\r
- 718 013a 0B                   .uleb128 0xb\r
- 719 013b 73726300             .ascii  "src\000"\r
- 720 013f 01                   .byte   0x1\r
- 721 0140 49                   .byte   0x49\r
- 722 0141 4F010000             .4byte  0x14f\r
- 723 0145 0B                   .uleb128 0xb\r
- 724 0146 6E00                 .ascii  "n\000"\r
- 725 0148 01                   .byte   0x1\r
- 726 0149 49                   .byte   0x49\r
- 727 014a 7F000000             .4byte  0x7f\r
- 728 014e 00                   .byte   0\r
- 729 014f 0C                   .uleb128 0xc\r
- 730 0150 04                   .byte   0x4\r
- 731 0151 55010000             .4byte  0x155\r
- 732 0155 0D                   .uleb128 0xd\r
- 733 0156 09                   .uleb128 0x9\r
- 734 0157 10030000             .4byte  .LASF26\r
- 735 015b 01                   .byte   0x1\r
- 736 015c 42                   .byte   0x42\r
- 737 015d 01                   .byte   0x1\r
- 738 015e 01                   .byte   0x1\r
- 739 015f 83010000             .4byte  0x183\r
- 740 0163 0A                   .uleb128 0xa\r
- 741 0164 23020000             .4byte  .LASF25\r
- 742 0168 01                   .byte   0x1\r
- 743 0169 42                   .byte   0x42\r
- 744 016a 6F000000             .4byte  0x6f\r
- 745 016e 0B                   .uleb128 0xb\r
- 746 016f 73726300             .ascii  "src\000"\r
- 747 0173 01                   .byte   0x1\r
- 748 0174 42                   .byte   0x42\r
- 749 0175 4F010000             .4byte  0x14f\r
- 750 0179 0B                   .uleb128 0xb\r
- 751 017a 6E00                 .ascii  "n\000"\r
- 752 017c 01                   .byte   0x1\r
- 753 017d 42                   .byte   0x42\r
- 754 017e 7F000000             .4byte  0x7f\r
- 755 0182 00                   .byte   0\r
- 756 0183 09                   .uleb128 0x9\r
- 757 0184 AD000000             .4byte  .LASF27\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 23\r
-\r
-\r
- 758 0188 01                   .byte   0x1\r
- 759 0189 94                   .byte   0x94\r
- 760 018a 01                   .byte   0x1\r
- 761 018b 01                   .byte   0x1\r
- 762 018c D1010000             .4byte  0x1d1\r
- 763 0190 0A                   .uleb128 0xa\r
- 764 0191 53000000             .4byte  .LASF28\r
- 765 0195 01                   .byte   0x1\r
- 766 0196 94                   .byte   0x94\r
- 767 0197 D1010000             .4byte  0x1d1\r
- 768 019b 0A                   .uleb128 0xa\r
- 769 019c 31000000             .4byte  .LASF29\r
- 770 01a0 01                   .byte   0x1\r
- 771 01a1 94                   .byte   0x94\r
- 772 01a2 DC010000             .4byte  0x1dc\r
- 773 01a6 0E                   .uleb128 0xe\r
- 774 01a7 6900                 .ascii  "i\000"\r
- 775 01a9 01                   .byte   0x1\r
- 776 01aa 97                   .byte   0x97\r
- 777 01ab A0000000             .4byte  0xa0\r
- 778 01af 0E                   .uleb128 0xe\r
- 779 01b0 6A00                 .ascii  "j\000"\r
- 780 01b2 01                   .byte   0x1\r
- 781 01b3 97                   .byte   0x97\r
- 782 01b4 A0000000             .4byte  0xa0\r
- 783 01b8 0F                   .uleb128 0xf\r
- 784 01b9 10                   .uleb128 0x10\r
- 785 01ba 0D000000             .4byte  .LASF30\r
- 786 01be 01                   .byte   0x1\r
- 787 01bf 9A                   .byte   0x9a\r
- 788 01c0 A0000000             .4byte  0xa0\r
- 789 01c4 10                   .uleb128 0x10\r
- 790 01c5 00000000             .4byte  .LASF31\r
- 791 01c9 01                   .byte   0x1\r
- 792 01ca 9B                   .byte   0x9b\r
- 793 01cb 8A000000             .4byte  0x8a\r
- 794 01cf 00                   .byte   0\r
- 795 01d0 00                   .byte   0\r
- 796 01d1 0C                   .uleb128 0xc\r
- 797 01d2 04                   .byte   0x4\r
- 798 01d3 D7010000             .4byte  0x1d7\r
- 799 01d7 11                   .uleb128 0x11\r
- 800 01d8 A0000000             .4byte  0xa0\r
- 801 01dc 0C                   .uleb128 0xc\r
- 802 01dd 04                   .byte   0x4\r
- 803 01de E2010000             .4byte  0x1e2\r
- 804 01e2 11                   .uleb128 0x11\r
- 805 01e3 FE000000             .4byte  0xfe\r
- 806 01e7 12                   .uleb128 0x12\r
- 807 01e8 01                   .byte   0x1\r
- 808 01e9 E4020000             .4byte  .LASF38\r
- 809 01ed 01                   .byte   0x1\r
- 810 01ee 0E01                 .2byte  0x10e\r
- 811 01f0 01                   .byte   0x1\r
- 812 01f1 00000000             .4byte  .LFB7\r
- 813 01f5 0C000000             .4byte  .LFE7\r
- 814 01f9 02                   .byte   0x2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 24\r
-\r
-\r
- 815 01fa 7D                   .byte   0x7d\r
- 816 01fb 00                   .sleb128 0\r
- 817 01fc 01                   .byte   0x1\r
- 818 01fd 1E020000             .4byte  0x21e\r
- 819 0201 13                   .uleb128 0x13\r
- 820 0202 01030000             .4byte  .LASF55\r
- 821 0206 01                   .byte   0x1\r
- 822 0207 0E01                 .2byte  0x10e\r
- 823 0209 8A000000             .4byte  0x8a\r
- 824 020d 01                   .byte   0x1\r
- 825 020e 50                   .byte   0x50\r
- 826 020f 14                   .uleb128 0x14\r
- 827 0210 12010000             .4byte  .LASF40\r
- 828 0214 01                   .byte   0x1\r
- 829 0215 1001                 .2byte  0x110\r
- 830 0217 8A000000             .4byte  0x8a\r
- 831 021b 01                   .byte   0x1\r
- 832 021c 52                   .byte   0x52\r
- 833 021d 00                   .byte   0\r
- 834 021e 09                   .uleb128 0x9\r
- 835 021f BF000000             .4byte  .LASF32\r
- 836 0223 01                   .byte   0x1\r
- 837 0224 B7                   .byte   0xb7\r
- 838 0225 01                   .byte   0x1\r
- 839 0226 01                   .byte   0x1\r
- 840 0227 42020000             .4byte  0x242\r
- 841 022b 10                   .uleb128 0x10\r
- 842 022c 68010000             .4byte  .LASF33\r
- 843 0230 01                   .byte   0x1\r
- 844 0231 B9                   .byte   0xb9\r
- 845 0232 A0000000             .4byte  0xa0\r
- 846 0236 10                   .uleb128 0x10\r
- 847 0237 B3020000             .4byte  .LASF34\r
- 848 023b 01                   .byte   0x1\r
- 849 023c BA                   .byte   0xba\r
- 850 023d 8A000000             .4byte  0x8a\r
- 851 0241 00                   .byte   0\r
- 852 0242 09                   .uleb128 0x9\r
- 853 0243 01010000             .4byte  .LASF35\r
- 854 0247 01                   .byte   0x1\r
- 855 0248 3B                   .byte   0x3b\r
- 856 0249 01                   .byte   0x1\r
- 857 024a 01                   .byte   0x1\r
- 858 024b 62020000             .4byte  0x262\r
- 859 024f 0B                   .uleb128 0xb\r
- 860 0250 7300                 .ascii  "s\000"\r
- 861 0252 01                   .byte   0x1\r
- 862 0253 3B                   .byte   0x3b\r
- 863 0254 6F000000             .4byte  0x6f\r
- 864 0258 0B                   .uleb128 0xb\r
- 865 0259 6E00                 .ascii  "n\000"\r
- 866 025b 01                   .byte   0x1\r
- 867 025c 3B                   .byte   0x3b\r
- 868 025d 7F000000             .4byte  0x7f\r
- 869 0261 00                   .byte   0\r
- 870 0262 09                   .uleb128 0x9\r
- 871 0263 70000000             .4byte  .LASF36\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 25\r
-\r
-\r
- 872 0267 01                   .byte   0x1\r
- 873 0268 F4                   .byte   0xf4\r
- 874 0269 01                   .byte   0x1\r
- 875 026a 01                   .byte   0x1\r
- 876 026b 7B020000             .4byte  0x27b\r
- 877 026f 10                   .uleb128 0x10\r
- 878 0270 E3010000             .4byte  .LASF37\r
- 879 0274 01                   .byte   0x1\r
- 880 0275 F6                   .byte   0xf6\r
- 881 0276 8A000000             .4byte  0x8a\r
- 882 027a 00                   .byte   0\r
- 883 027b 15                   .uleb128 0x15\r
- 884 027c 01                   .byte   0x1\r
- 885 027d 24030000             .4byte  .LASF39\r
- 886 0281 01                   .byte   0x1\r
- 887 0282 3001                 .2byte  0x130\r
- 888 0284 01                   .byte   0x1\r
- 889 0285 00000000             .4byte  .LFB8\r
- 890 0289 D8010000             .4byte  .LFE8\r
- 891 028d 00000000             .4byte  .LLST0\r
- 892 0291 01                   .byte   0x1\r
- 893 0292 B4040000             .4byte  0x4b4\r
- 894 0296 14                   .uleb128 0x14\r
- 895 0297 A2020000             .4byte  .LASF41\r
- 896 029b 01                   .byte   0x1\r
- 897 029c 3301                 .2byte  0x133\r
- 898 029e C4040000             .4byte  0x4c4\r
- 899 02a2 05                   .byte   0x5\r
- 900 02a3 03                   .byte   0x3\r
- 901 02a4 8E000000             .4byte  BS_IOPINS0_0_VAL.4808\r
- 902 02a8 14                   .uleb128 0x14\r
- 903 02a9 BB020000             .4byte  .LASF42\r
- 904 02ad 01                   .byte   0x1\r
- 905 02ae 3701                 .2byte  0x137\r
- 906 02b0 D9040000             .4byte  0x4d9\r
- 907 02b4 05                   .byte   0x5\r
- 908 02b5 03                   .byte   0x3\r
- 909 02b6 96000000             .4byte  BS_IOPINS0_8_VAL.4809\r
- 910 02ba 14                   .uleb128 0x14\r
- 911 02bb 12020000             .4byte  .LASF43\r
- 912 02bf 01                   .byte   0x1\r
- 913 02c0 3B01                 .2byte  0x13b\r
- 914 02c2 DE040000             .4byte  0x4de\r
- 915 02c6 05                   .byte   0x5\r
- 916 02c7 03                   .byte   0x3\r
- 917 02c8 A0000000             .4byte  BS_IOPINS0_3_VAL.4810\r
- 918 02cc 14                   .uleb128 0x14\r
- 919 02cd D4000000             .4byte  .LASF44\r
- 920 02d1 01                   .byte   0x1\r
- 921 02d2 3F01                 .2byte  0x13f\r
- 922 02d4 E3040000             .4byte  0x4e3\r
- 923 02d8 05                   .byte   0x5\r
- 924 02d9 03                   .byte   0x3\r
- 925 02da A8000000             .4byte  BS_IOPINS0_4_VAL.4811\r
- 926 02de 14                   .uleb128 0x14\r
- 927 02df 88010000             .4byte  .LASF45\r
- 928 02e3 01                   .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 26\r
-\r
-\r
- 929 02e4 4301                 .2byte  0x143\r
- 930 02e6 E8040000             .4byte  0x4e8\r
- 931 02ea 05                   .byte   0x5\r
- 932 02eb 03                   .byte   0x3\r
- 933 02ec B0000000             .4byte  BS_IOPINS0_6_VAL.4812\r
- 934 02f0 16                   .uleb128 0x16\r
- 935 02f1 1E020000             .4byte  0x21e\r
- 936 02f5 08000000             .4byte  .LBB32\r
- 937 02f9 00000000             .4byte  .Ldebug_ranges0+0\r
- 938 02fd 01                   .byte   0x1\r
- 939 02fe 4F01                 .2byte  0x14f\r
- 940 0300 2A030000             .4byte  0x32a\r
- 941 0304 17                   .uleb128 0x17\r
- 942 0305 20000000             .4byte  .Ldebug_ranges0+0x20\r
- 943 0309 18                   .uleb128 0x18\r
- 944 030a 2B020000             .4byte  0x22b\r
- 945 030e 19                   .uleb128 0x19\r
- 946 030f 36020000             .4byte  0x236\r
- 947 0313 20000000             .4byte  .LLST1\r
- 948 0317 1A                   .uleb128 0x1a\r
- 949 0318 4A000000             .4byte  .LVL3\r
- 950 031c 17050000             .4byte  0x517\r
- 951 0320 1B                   .uleb128 0x1b\r
- 952 0321 01                   .byte   0x1\r
- 953 0322 50                   .byte   0x50\r
- 954 0323 03                   .byte   0x3\r
- 955 0324 0A                   .byte   0xa\r
- 956 0325 E001                 .2byte  0x1e0\r
- 957 0327 00                   .byte   0\r
- 958 0328 00                   .byte   0\r
- 959 0329 00                   .byte   0\r
- 960 032a 1C                   .uleb128 0x1c\r
- 961 032b 40000000             .4byte  .Ldebug_ranges0+0x40\r
- 962 032f 62040000             .4byte  0x462\r
- 963 0333 14                   .uleb128 0x14\r
- 964 0334 9B000000             .4byte  .LASF46\r
- 965 0338 01                   .byte   0x1\r
- 966 0339 5401                 .2byte  0x154\r
- 967 033b FD040000             .4byte  0x4fd\r
- 968 033f 05                   .byte   0x5\r
- 969 0340 03                   .byte   0x3\r
- 970 0341 30000000             .4byte  cy_cfg_addr_table.4813\r
- 971 0345 14                   .uleb128 0x14\r
- 972 0346 5E000000             .4byte  .LASF47\r
- 973 034a 01                   .byte   0x1\r
- 974 034b 6301                 .2byte  0x163\r
- 975 034d 12050000             .4byte  0x512\r
- 976 0351 05                   .byte   0x5\r
- 977 0352 03                   .byte   0x3\r
- 978 0353 60000000             .4byte  cy_cfg_data_table.4814\r
- 979 0357 1D                   .uleb128 0x1d\r
- 980 0358 06                   .byte   0x6\r
- 981 0359 01                   .byte   0x1\r
- 982 035a 7F01                 .2byte  0x17f\r
- 983 035c 7F030000             .4byte  0x37f\r
- 984 0360 1E                   .uleb128 0x1e\r
- 985 0361 1C030000             .4byte  .LASF48\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 27\r
-\r
-\r
- 986 0365 01                   .byte   0x1\r
- 987 0366 8001                 .2byte  0x180\r
- 988 0368 6F000000             .4byte  0x6f\r
- 989 036c 02                   .byte   0x2\r
- 990 036d 23                   .byte   0x23\r
- 991 036e 00                   .uleb128 0\r
- 992 036f 1E                   .uleb128 0x1e\r
- 993 0370 70010000             .4byte  .LASF49\r
- 994 0374 01                   .byte   0x1\r
- 995 0375 8101                 .2byte  0x181\r
- 996 0377 95000000             .4byte  0x95\r
- 997 037b 02                   .byte   0x2\r
- 998 037c 23                   .byte   0x23\r
- 999 037d 04                   .uleb128 0x4\r
- 1000 037e 00                  .byte   0\r
- 1001 037f 1F                  .uleb128 0x1f\r
- 1002 0380 F5010000            .4byte  .LASF50\r
- 1003 0384 01                  .byte   0x1\r
- 1004 0385 8201                .2byte  0x182\r
- 1005 0387 57030000            .4byte  0x357\r
- 1006 038b 20                  .uleb128 0x20\r
- 1007 038c 7F030000            .4byte  0x37f\r
- 1008 0390 9B030000            .4byte  0x39b\r
- 1009 0394 21                  .uleb128 0x21\r
- 1010 0395 68000000            .4byte  0x68\r
- 1011 0399 07                  .byte   0x7\r
- 1012 039a 00                  .byte   0\r
- 1013 039b 14                  .uleb128 0x14\r
- 1014 039c 02020000            .4byte  .LASF51\r
- 1015 03a0 01                  .byte   0x1\r
- 1016 03a1 8401                .2byte  0x184\r
- 1017 03a3 AD030000            .4byte  0x3ad\r
- 1018 03a7 05                  .byte   0x5\r
- 1019 03a8 03                  .byte   0x3\r
- 1020 03a9 00000000            .4byte  cfg_memset_list.4819\r
- 1021 03ad 11                  .uleb128 0x11\r
- 1022 03ae 8B030000            .4byte  0x38b\r
- 1023 03b2 22                  .uleb128 0x22\r
- 1024 03b3 6900                .ascii  "i\000"\r
- 1025 03b5 01                  .byte   0x1\r
- 1026 03b6 9001                .2byte  0x190\r
- 1027 03b8 8A000000            .4byte  0x8a\r
- 1028 03bc 3E000000            .4byte  .LLST2\r
- 1029 03c0 23                  .uleb128 0x23\r
- 1030 03c1 84000000            .4byte  .LBB39\r
- 1031 03c5 98000000            .4byte  .LBE39\r
- 1032 03c9 1A040000            .4byte  0x41a\r
- 1033 03cd 22                  .uleb128 0x22\r
- 1034 03ce 6D7300              .ascii  "ms\000"\r
- 1035 03d1 01                  .byte   0x1\r
- 1036 03d2 9501                .2byte  0x195\r
- 1037 03d4 DC030000            .4byte  0x3dc\r
- 1038 03d8 52000000            .4byte  .LLST3\r
- 1039 03dc 0C                  .uleb128 0xc\r
- 1040 03dd 04                  .byte   0x4\r
- 1041 03de E2030000            .4byte  0x3e2\r
- 1042 03e2 11                  .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 28\r
-\r
-\r
- 1043 03e3 7F030000            .4byte  0x37f\r
- 1044 03e7 24                  .uleb128 0x24\r
- 1045 03e8 42020000            .4byte  0x242\r
- 1046 03ec 8C000000            .4byte  .LBB40\r
- 1047 03f0 98000000            .4byte  .LBE40\r
- 1048 03f4 01                  .byte   0x1\r
- 1049 03f5 9601                .2byte  0x196\r
- 1050 03f7 25                  .uleb128 0x25\r
- 1051 03f8 58020000            .4byte  0x258\r
- 1052 03fc 77000000            .4byte  .LLST4\r
- 1053 0400 25                  .uleb128 0x25\r
- 1054 0401 4F020000            .4byte  0x24f\r
- 1055 0405 AC000000            .4byte  .LLST5\r
- 1056 0409 1A                  .uleb128 0x1a\r
- 1057 040a 98000000            .4byte  .LVL12\r
- 1058 040e 2B050000            .4byte  0x52b\r
- 1059 0412 1B                  .uleb128 0x1b\r
- 1060 0413 01                  .byte   0x1\r
- 1061 0414 51                  .byte   0x51\r
- 1062 0415 01                  .byte   0x1\r
- 1063 0416 30                  .byte   0x30\r
- 1064 0417 00                  .byte   0\r
- 1065 0418 00                  .byte   0\r
- 1066 0419 00                  .byte   0\r
- 1067 041a 26                  .uleb128 0x26\r
- 1068 041b 83010000            .4byte  0x183\r
- 1069 041f A0000000            .4byte  .LBB42\r
- 1070 0423 58000000            .4byte  .Ldebug_ranges0+0x58\r
- 1071 0427 01                  .byte   0x1\r
- 1072 0428 9901                .2byte  0x199\r
- 1073 042a 17                  .uleb128 0x17\r
- 1074 042b 70000000            .4byte  .Ldebug_ranges0+0x70\r
- 1075 042f 18                  .uleb128 0x18\r
- 1076 0430 A6010000            .4byte  0x1a6\r
- 1077 0434 19                  .uleb128 0x19\r
- 1078 0435 AF010000            .4byte  0x1af\r
- 1079 0439 DC000000            .4byte  .LLST6\r
- 1080 043d 27                  .uleb128 0x27\r
- 1081 043e 9B010000            .4byte  0x19b\r
- 1082 0442 27                  .uleb128 0x27\r
- 1083 0443 90010000            .4byte  0x190\r
- 1084 0447 17                  .uleb128 0x17\r
- 1085 0448 88000000            .4byte  .Ldebug_ranges0+0x88\r
- 1086 044c 19                  .uleb128 0x19\r
- 1087 044d B9010000            .4byte  0x1b9\r
- 1088 0451 EF000000            .4byte  .LLST7\r
- 1089 0455 19                  .uleb128 0x19\r
- 1090 0456 C4010000            .4byte  0x1c4\r
- 1091 045a 0D010000            .4byte  .LLST8\r
- 1092 045e 00                  .byte   0\r
- 1093 045f 00                  .byte   0\r
- 1094 0460 00                  .byte   0\r
- 1095 0461 00                  .byte   0\r
- 1096 0462 28                  .uleb128 0x28\r
- 1097 0463 62020000            .4byte  0x262\r
- 1098 0467 50010000            .4byte  .LBB49\r
- 1099 046b 66010000            .4byte  .LBE49\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 29\r
-\r
-\r
- 1100 046f 01                  .byte   0x1\r
- 1101 0470 AF01                .2byte  0x1af\r
- 1102 0472 8A040000            .4byte  0x48a\r
- 1103 0476 29                  .uleb128 0x29\r
- 1104 0477 50010000            .4byte  .LBB50\r
- 1105 047b 66010000            .4byte  .LBE50\r
- 1106 047f 19                  .uleb128 0x19\r
- 1107 0480 6F020000            .4byte  0x26f\r
- 1108 0484 20010000            .4byte  .LLST9\r
- 1109 0488 00                  .byte   0\r
- 1110 0489 00                  .byte   0\r
- 1111 048a 24                  .uleb128 0x24\r
- 1112 048b 56010000            .4byte  0x156\r
- 1113 048f 66010000            .4byte  .LBB51\r
- 1114 0493 D8010000            .4byte  .LBE51\r
- 1115 0497 01                  .byte   0x1\r
- 1116 0498 B201                .2byte  0x1b2\r
- 1117 049a 2A                  .uleb128 0x2a\r
- 1118 049b 79010000            .4byte  0x179\r
- 1119 049f 0E                  .byte   0xe\r
- 1120 04a0 2B                  .uleb128 0x2b\r
- 1121 04a1 6E010000            .4byte  0x16e\r
- 1122 04a5 A0430040            .4byte  0x400043a0\r
- 1123 04a9 2B                  .uleb128 0x2b\r
- 1124 04aa 63010000            .4byte  0x163\r
- 1125 04ae B0430040            .4byte  0x400043b0\r
- 1126 04b2 00                  .byte   0\r
- 1127 04b3 00                  .byte   0\r
- 1128 04b4 20                  .uleb128 0x20\r
- 1129 04b5 8A000000            .4byte  0x8a\r
- 1130 04b9 C4040000            .4byte  0x4c4\r
- 1131 04bd 21                  .uleb128 0x21\r
- 1132 04be 68000000            .4byte  0x68\r
- 1133 04c2 07                  .byte   0x7\r
- 1134 04c3 00                  .byte   0\r
- 1135 04c4 11                  .uleb128 0x11\r
- 1136 04c5 B4040000            .4byte  0x4b4\r
- 1137 04c9 20                  .uleb128 0x20\r
- 1138 04ca 8A000000            .4byte  0x8a\r
- 1139 04ce D9040000            .4byte  0x4d9\r
- 1140 04d2 21                  .uleb128 0x21\r
- 1141 04d3 68000000            .4byte  0x68\r
- 1142 04d7 09                  .byte   0x9\r
- 1143 04d8 00                  .byte   0\r
- 1144 04d9 11                  .uleb128 0x11\r
- 1145 04da C9040000            .4byte  0x4c9\r
- 1146 04de 11                  .uleb128 0x11\r
- 1147 04df B4040000            .4byte  0x4b4\r
- 1148 04e3 11                  .uleb128 0x11\r
- 1149 04e4 B4040000            .4byte  0x4b4\r
- 1150 04e8 11                  .uleb128 0x11\r
- 1151 04e9 B4040000            .4byte  0x4b4\r
- 1152 04ed 20                  .uleb128 0x20\r
- 1153 04ee A0000000            .4byte  0xa0\r
- 1154 04f2 FD040000            .4byte  0x4fd\r
- 1155 04f6 21                  .uleb128 0x21\r
- 1156 04f7 68000000            .4byte  0x68\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 30\r
-\r
-\r
- 1157 04fb 0B                  .byte   0xb\r
- 1158 04fc 00                  .byte   0\r
- 1159 04fd 11                  .uleb128 0x11\r
- 1160 04fe ED040000            .4byte  0x4ed\r
- 1161 0502 20                  .uleb128 0x20\r
- 1162 0503 FE000000            .4byte  0xfe\r
- 1163 0507 12050000            .4byte  0x512\r
- 1164 050b 21                  .uleb128 0x21\r
- 1165 050c 68000000            .4byte  0x68\r
- 1166 0510 16                  .byte   0x16\r
- 1167 0511 00                  .byte   0\r
- 1168 0512 11                  .uleb128 0x11\r
- 1169 0513 02050000            .4byte  0x502\r
- 1170 0517 2C                  .uleb128 0x2c\r
- 1171 0518 01                  .byte   0x1\r
- 1172 0519 2E020000            .4byte  .LASF56\r
- 1173 051d 04                  .byte   0x4\r
- 1174 051e 7A                  .byte   0x7a\r
- 1175 051f 01                  .byte   0x1\r
- 1176 0520 01                  .byte   0x1\r
- 1177 0521 2B050000            .4byte  0x52b\r
- 1178 0525 2D                  .uleb128 0x2d\r
- 1179 0526 A0000000            .4byte  0xa0\r
- 1180 052a 00                  .byte   0\r
- 1181 052b 2E                  .uleb128 0x2e\r
- 1182 052c 01                  .byte   0x1\r
- 1183 052d 09030000            .4byte  .LASF57\r
- 1184 0531 01                  .byte   0x1\r
- 1185 0532 6F000000            .4byte  0x6f\r
- 1186 0536 01                  .byte   0x1\r
- 1187 0537 01                  .byte   0x1\r
- 1188 0538 2D                  .uleb128 0x2d\r
- 1189 0539 6F000000            .4byte  0x6f\r
- 1190 053d 2D                  .uleb128 0x2d\r
- 1191 053e 45000000            .4byte  0x45\r
- 1192 0542 2D                  .uleb128 0x2d\r
- 1193 0543 68000000            .4byte  0x68\r
- 1194 0547 00                  .byte   0\r
- 1195 0548 00                  .byte   0\r
- 1196                          .section        .debug_abbrev,"",%progbits\r
- 1197                  .Ldebug_abbrev0:\r
- 1198 0000 01                  .uleb128 0x1\r
- 1199 0001 11                  .uleb128 0x11\r
- 1200 0002 01                  .byte   0x1\r
- 1201 0003 25                  .uleb128 0x25\r
- 1202 0004 0E                  .uleb128 0xe\r
- 1203 0005 13                  .uleb128 0x13\r
- 1204 0006 0B                  .uleb128 0xb\r
- 1205 0007 03                  .uleb128 0x3\r
- 1206 0008 0E                  .uleb128 0xe\r
- 1207 0009 1B                  .uleb128 0x1b\r
- 1208 000a 0E                  .uleb128 0xe\r
- 1209 000b 55                  .uleb128 0x55\r
- 1210 000c 06                  .uleb128 0x6\r
- 1211 000d 11                  .uleb128 0x11\r
- 1212 000e 01                  .uleb128 0x1\r
- 1213 000f 52                  .uleb128 0x52\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 31\r
-\r
-\r
- 1214 0010 01                  .uleb128 0x1\r
- 1215 0011 10                  .uleb128 0x10\r
- 1216 0012 06                  .uleb128 0x6\r
- 1217 0013 00                  .byte   0\r
- 1218 0014 00                  .byte   0\r
- 1219 0015 02                  .uleb128 0x2\r
- 1220 0016 24                  .uleb128 0x24\r
- 1221 0017 00                  .byte   0\r
- 1222 0018 0B                  .uleb128 0xb\r
- 1223 0019 0B                  .uleb128 0xb\r
- 1224 001a 3E                  .uleb128 0x3e\r
- 1225 001b 0B                  .uleb128 0xb\r
- 1226 001c 03                  .uleb128 0x3\r
- 1227 001d 0E                  .uleb128 0xe\r
- 1228 001e 00                  .byte   0\r
- 1229 001f 00                  .byte   0\r
- 1230 0020 03                  .uleb128 0x3\r
- 1231 0021 24                  .uleb128 0x24\r
- 1232 0022 00                  .byte   0\r
- 1233 0023 0B                  .uleb128 0xb\r
- 1234 0024 0B                  .uleb128 0xb\r
- 1235 0025 3E                  .uleb128 0x3e\r
- 1236 0026 0B                  .uleb128 0xb\r
- 1237 0027 03                  .uleb128 0x3\r
- 1238 0028 08                  .uleb128 0x8\r
- 1239 0029 00                  .byte   0\r
- 1240 002a 00                  .byte   0\r
- 1241 002b 04                  .uleb128 0x4\r
- 1242 002c 0F                  .uleb128 0xf\r
- 1243 002d 00                  .byte   0\r
- 1244 002e 0B                  .uleb128 0xb\r
- 1245 002f 0B                  .uleb128 0xb\r
- 1246 0030 00                  .byte   0\r
- 1247 0031 00                  .byte   0\r
- 1248 0032 05                  .uleb128 0x5\r
- 1249 0033 16                  .uleb128 0x16\r
- 1250 0034 00                  .byte   0\r
- 1251 0035 03                  .uleb128 0x3\r
- 1252 0036 0E                  .uleb128 0xe\r
- 1253 0037 3A                  .uleb128 0x3a\r
- 1254 0038 0B                  .uleb128 0xb\r
- 1255 0039 3B                  .uleb128 0x3b\r
- 1256 003a 0B                  .uleb128 0xb\r
- 1257 003b 49                  .uleb128 0x49\r
- 1258 003c 13                  .uleb128 0x13\r
- 1259 003d 00                  .byte   0\r
- 1260 003e 00                  .byte   0\r
- 1261 003f 06                  .uleb128 0x6\r
- 1262 0040 35                  .uleb128 0x35\r
- 1263 0041 00                  .byte   0\r
- 1264 0042 49                  .uleb128 0x49\r
- 1265 0043 13                  .uleb128 0x13\r
- 1266 0044 00                  .byte   0\r
- 1267 0045 00                  .byte   0\r
- 1268 0046 07                  .uleb128 0x7\r
- 1269 0047 13                  .uleb128 0x13\r
- 1270 0048 01                  .byte   0x1\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 32\r
-\r
-\r
- 1271 0049 0B                  .uleb128 0xb\r
- 1272 004a 0B                  .uleb128 0xb\r
- 1273 004b 3A                  .uleb128 0x3a\r
- 1274 004c 0B                  .uleb128 0xb\r
- 1275 004d 3B                  .uleb128 0x3b\r
- 1276 004e 0B                  .uleb128 0xb\r
- 1277 004f 01                  .uleb128 0x1\r
- 1278 0050 13                  .uleb128 0x13\r
- 1279 0051 00                  .byte   0\r
- 1280 0052 00                  .byte   0\r
- 1281 0053 08                  .uleb128 0x8\r
- 1282 0054 0D                  .uleb128 0xd\r
- 1283 0055 00                  .byte   0\r
- 1284 0056 03                  .uleb128 0x3\r
- 1285 0057 0E                  .uleb128 0xe\r
- 1286 0058 3A                  .uleb128 0x3a\r
- 1287 0059 0B                  .uleb128 0xb\r
- 1288 005a 3B                  .uleb128 0x3b\r
- 1289 005b 0B                  .uleb128 0xb\r
- 1290 005c 49                  .uleb128 0x49\r
- 1291 005d 13                  .uleb128 0x13\r
- 1292 005e 38                  .uleb128 0x38\r
- 1293 005f 0A                  .uleb128 0xa\r
- 1294 0060 00                  .byte   0\r
- 1295 0061 00                  .byte   0\r
- 1296 0062 09                  .uleb128 0x9\r
- 1297 0063 2E                  .uleb128 0x2e\r
- 1298 0064 01                  .byte   0x1\r
- 1299 0065 03                  .uleb128 0x3\r
- 1300 0066 0E                  .uleb128 0xe\r
- 1301 0067 3A                  .uleb128 0x3a\r
- 1302 0068 0B                  .uleb128 0xb\r
- 1303 0069 3B                  .uleb128 0x3b\r
- 1304 006a 0B                  .uleb128 0xb\r
- 1305 006b 27                  .uleb128 0x27\r
- 1306 006c 0C                  .uleb128 0xc\r
- 1307 006d 20                  .uleb128 0x20\r
- 1308 006e 0B                  .uleb128 0xb\r
- 1309 006f 01                  .uleb128 0x1\r
- 1310 0070 13                  .uleb128 0x13\r
- 1311 0071 00                  .byte   0\r
- 1312 0072 00                  .byte   0\r
- 1313 0073 0A                  .uleb128 0xa\r
- 1314 0074 05                  .uleb128 0x5\r
- 1315 0075 00                  .byte   0\r
- 1316 0076 03                  .uleb128 0x3\r
- 1317 0077 0E                  .uleb128 0xe\r
- 1318 0078 3A                  .uleb128 0x3a\r
- 1319 0079 0B                  .uleb128 0xb\r
- 1320 007a 3B                  .uleb128 0x3b\r
- 1321 007b 0B                  .uleb128 0xb\r
- 1322 007c 49                  .uleb128 0x49\r
- 1323 007d 13                  .uleb128 0x13\r
- 1324 007e 00                  .byte   0\r
- 1325 007f 00                  .byte   0\r
- 1326 0080 0B                  .uleb128 0xb\r
- 1327 0081 05                  .uleb128 0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 33\r
-\r
-\r
- 1328 0082 00                  .byte   0\r
- 1329 0083 03                  .uleb128 0x3\r
- 1330 0084 08                  .uleb128 0x8\r
- 1331 0085 3A                  .uleb128 0x3a\r
- 1332 0086 0B                  .uleb128 0xb\r
- 1333 0087 3B                  .uleb128 0x3b\r
- 1334 0088 0B                  .uleb128 0xb\r
- 1335 0089 49                  .uleb128 0x49\r
- 1336 008a 13                  .uleb128 0x13\r
- 1337 008b 00                  .byte   0\r
- 1338 008c 00                  .byte   0\r
- 1339 008d 0C                  .uleb128 0xc\r
- 1340 008e 0F                  .uleb128 0xf\r
- 1341 008f 00                  .byte   0\r
- 1342 0090 0B                  .uleb128 0xb\r
- 1343 0091 0B                  .uleb128 0xb\r
- 1344 0092 49                  .uleb128 0x49\r
- 1345 0093 13                  .uleb128 0x13\r
- 1346 0094 00                  .byte   0\r
- 1347 0095 00                  .byte   0\r
- 1348 0096 0D                  .uleb128 0xd\r
- 1349 0097 26                  .uleb128 0x26\r
- 1350 0098 00                  .byte   0\r
- 1351 0099 00                  .byte   0\r
- 1352 009a 00                  .byte   0\r
- 1353 009b 0E                  .uleb128 0xe\r
- 1354 009c 34                  .uleb128 0x34\r
- 1355 009d 00                  .byte   0\r
- 1356 009e 03                  .uleb128 0x3\r
- 1357 009f 08                  .uleb128 0x8\r
- 1358 00a0 3A                  .uleb128 0x3a\r
- 1359 00a1 0B                  .uleb128 0xb\r
- 1360 00a2 3B                  .uleb128 0x3b\r
- 1361 00a3 0B                  .uleb128 0xb\r
- 1362 00a4 49                  .uleb128 0x49\r
- 1363 00a5 13                  .uleb128 0x13\r
- 1364 00a6 00                  .byte   0\r
- 1365 00a7 00                  .byte   0\r
- 1366 00a8 0F                  .uleb128 0xf\r
- 1367 00a9 0B                  .uleb128 0xb\r
- 1368 00aa 01                  .byte   0x1\r
- 1369 00ab 00                  .byte   0\r
- 1370 00ac 00                  .byte   0\r
- 1371 00ad 10                  .uleb128 0x10\r
- 1372 00ae 34                  .uleb128 0x34\r
- 1373 00af 00                  .byte   0\r
- 1374 00b0 03                  .uleb128 0x3\r
- 1375 00b1 0E                  .uleb128 0xe\r
- 1376 00b2 3A                  .uleb128 0x3a\r
- 1377 00b3 0B                  .uleb128 0xb\r
- 1378 00b4 3B                  .uleb128 0x3b\r
- 1379 00b5 0B                  .uleb128 0xb\r
- 1380 00b6 49                  .uleb128 0x49\r
- 1381 00b7 13                  .uleb128 0x13\r
- 1382 00b8 00                  .byte   0\r
- 1383 00b9 00                  .byte   0\r
- 1384 00ba 11                  .uleb128 0x11\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 34\r
-\r
-\r
- 1385 00bb 26                  .uleb128 0x26\r
- 1386 00bc 00                  .byte   0\r
- 1387 00bd 49                  .uleb128 0x49\r
- 1388 00be 13                  .uleb128 0x13\r
- 1389 00bf 00                  .byte   0\r
- 1390 00c0 00                  .byte   0\r
- 1391 00c1 12                  .uleb128 0x12\r
- 1392 00c2 2E                  .uleb128 0x2e\r
- 1393 00c3 01                  .byte   0x1\r
- 1394 00c4 3F                  .uleb128 0x3f\r
- 1395 00c5 0C                  .uleb128 0xc\r
- 1396 00c6 03                  .uleb128 0x3\r
- 1397 00c7 0E                  .uleb128 0xe\r
- 1398 00c8 3A                  .uleb128 0x3a\r
- 1399 00c9 0B                  .uleb128 0xb\r
- 1400 00ca 3B                  .uleb128 0x3b\r
- 1401 00cb 05                  .uleb128 0x5\r
- 1402 00cc 27                  .uleb128 0x27\r
- 1403 00cd 0C                  .uleb128 0xc\r
- 1404 00ce 11                  .uleb128 0x11\r
- 1405 00cf 01                  .uleb128 0x1\r
- 1406 00d0 12                  .uleb128 0x12\r
- 1407 00d1 01                  .uleb128 0x1\r
- 1408 00d2 40                  .uleb128 0x40\r
- 1409 00d3 0A                  .uleb128 0xa\r
- 1410 00d4 9742                .uleb128 0x2117\r
- 1411 00d6 0C                  .uleb128 0xc\r
- 1412 00d7 01                  .uleb128 0x1\r
- 1413 00d8 13                  .uleb128 0x13\r
- 1414 00d9 00                  .byte   0\r
- 1415 00da 00                  .byte   0\r
- 1416 00db 13                  .uleb128 0x13\r
- 1417 00dc 05                  .uleb128 0x5\r
- 1418 00dd 00                  .byte   0\r
- 1419 00de 03                  .uleb128 0x3\r
- 1420 00df 0E                  .uleb128 0xe\r
- 1421 00e0 3A                  .uleb128 0x3a\r
- 1422 00e1 0B                  .uleb128 0xb\r
- 1423 00e2 3B                  .uleb128 0x3b\r
- 1424 00e3 05                  .uleb128 0x5\r
- 1425 00e4 49                  .uleb128 0x49\r
- 1426 00e5 13                  .uleb128 0x13\r
- 1427 00e6 02                  .uleb128 0x2\r
- 1428 00e7 0A                  .uleb128 0xa\r
- 1429 00e8 00                  .byte   0\r
- 1430 00e9 00                  .byte   0\r
- 1431 00ea 14                  .uleb128 0x14\r
- 1432 00eb 34                  .uleb128 0x34\r
- 1433 00ec 00                  .byte   0\r
- 1434 00ed 03                  .uleb128 0x3\r
- 1435 00ee 0E                  .uleb128 0xe\r
- 1436 00ef 3A                  .uleb128 0x3a\r
- 1437 00f0 0B                  .uleb128 0xb\r
- 1438 00f1 3B                  .uleb128 0x3b\r
- 1439 00f2 05                  .uleb128 0x5\r
- 1440 00f3 49                  .uleb128 0x49\r
- 1441 00f4 13                  .uleb128 0x13\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 35\r
-\r
-\r
- 1442 00f5 02                  .uleb128 0x2\r
- 1443 00f6 0A                  .uleb128 0xa\r
- 1444 00f7 00                  .byte   0\r
- 1445 00f8 00                  .byte   0\r
- 1446 00f9 15                  .uleb128 0x15\r
- 1447 00fa 2E                  .uleb128 0x2e\r
- 1448 00fb 01                  .byte   0x1\r
- 1449 00fc 3F                  .uleb128 0x3f\r
- 1450 00fd 0C                  .uleb128 0xc\r
- 1451 00fe 03                  .uleb128 0x3\r
- 1452 00ff 0E                  .uleb128 0xe\r
- 1453 0100 3A                  .uleb128 0x3a\r
- 1454 0101 0B                  .uleb128 0xb\r
- 1455 0102 3B                  .uleb128 0x3b\r
- 1456 0103 05                  .uleb128 0x5\r
- 1457 0104 27                  .uleb128 0x27\r
- 1458 0105 0C                  .uleb128 0xc\r
- 1459 0106 11                  .uleb128 0x11\r
- 1460 0107 01                  .uleb128 0x1\r
- 1461 0108 12                  .uleb128 0x12\r
- 1462 0109 01                  .uleb128 0x1\r
- 1463 010a 40                  .uleb128 0x40\r
- 1464 010b 06                  .uleb128 0x6\r
- 1465 010c 9742                .uleb128 0x2117\r
- 1466 010e 0C                  .uleb128 0xc\r
- 1467 010f 01                  .uleb128 0x1\r
- 1468 0110 13                  .uleb128 0x13\r
- 1469 0111 00                  .byte   0\r
- 1470 0112 00                  .byte   0\r
- 1471 0113 16                  .uleb128 0x16\r
- 1472 0114 1D                  .uleb128 0x1d\r
- 1473 0115 01                  .byte   0x1\r
- 1474 0116 31                  .uleb128 0x31\r
- 1475 0117 13                  .uleb128 0x13\r
- 1476 0118 52                  .uleb128 0x52\r
- 1477 0119 01                  .uleb128 0x1\r
- 1478 011a 55                  .uleb128 0x55\r
- 1479 011b 06                  .uleb128 0x6\r
- 1480 011c 58                  .uleb128 0x58\r
- 1481 011d 0B                  .uleb128 0xb\r
- 1482 011e 59                  .uleb128 0x59\r
- 1483 011f 05                  .uleb128 0x5\r
- 1484 0120 01                  .uleb128 0x1\r
- 1485 0121 13                  .uleb128 0x13\r
- 1486 0122 00                  .byte   0\r
- 1487 0123 00                  .byte   0\r
- 1488 0124 17                  .uleb128 0x17\r
- 1489 0125 0B                  .uleb128 0xb\r
- 1490 0126 01                  .byte   0x1\r
- 1491 0127 55                  .uleb128 0x55\r
- 1492 0128 06                  .uleb128 0x6\r
- 1493 0129 00                  .byte   0\r
- 1494 012a 00                  .byte   0\r
- 1495 012b 18                  .uleb128 0x18\r
- 1496 012c 34                  .uleb128 0x34\r
- 1497 012d 00                  .byte   0\r
- 1498 012e 31                  .uleb128 0x31\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 36\r
-\r
-\r
- 1499 012f 13                  .uleb128 0x13\r
- 1500 0130 00                  .byte   0\r
- 1501 0131 00                  .byte   0\r
- 1502 0132 19                  .uleb128 0x19\r
- 1503 0133 34                  .uleb128 0x34\r
- 1504 0134 00                  .byte   0\r
- 1505 0135 31                  .uleb128 0x31\r
- 1506 0136 13                  .uleb128 0x13\r
- 1507 0137 02                  .uleb128 0x2\r
- 1508 0138 06                  .uleb128 0x6\r
- 1509 0139 00                  .byte   0\r
- 1510 013a 00                  .byte   0\r
- 1511 013b 1A                  .uleb128 0x1a\r
- 1512 013c 898201              .uleb128 0x4109\r
- 1513 013f 01                  .byte   0x1\r
- 1514 0140 11                  .uleb128 0x11\r
- 1515 0141 01                  .uleb128 0x1\r
- 1516 0142 31                  .uleb128 0x31\r
- 1517 0143 13                  .uleb128 0x13\r
- 1518 0144 00                  .byte   0\r
- 1519 0145 00                  .byte   0\r
- 1520 0146 1B                  .uleb128 0x1b\r
- 1521 0147 8A8201              .uleb128 0x410a\r
- 1522 014a 00                  .byte   0\r
- 1523 014b 02                  .uleb128 0x2\r
- 1524 014c 0A                  .uleb128 0xa\r
- 1525 014d 9142                .uleb128 0x2111\r
- 1526 014f 0A                  .uleb128 0xa\r
- 1527 0150 00                  .byte   0\r
- 1528 0151 00                  .byte   0\r
- 1529 0152 1C                  .uleb128 0x1c\r
- 1530 0153 0B                  .uleb128 0xb\r
- 1531 0154 01                  .byte   0x1\r
- 1532 0155 55                  .uleb128 0x55\r
- 1533 0156 06                  .uleb128 0x6\r
- 1534 0157 01                  .uleb128 0x1\r
- 1535 0158 13                  .uleb128 0x13\r
- 1536 0159 00                  .byte   0\r
- 1537 015a 00                  .byte   0\r
- 1538 015b 1D                  .uleb128 0x1d\r
- 1539 015c 13                  .uleb128 0x13\r
- 1540 015d 01                  .byte   0x1\r
- 1541 015e 0B                  .uleb128 0xb\r
- 1542 015f 0B                  .uleb128 0xb\r
- 1543 0160 3A                  .uleb128 0x3a\r
- 1544 0161 0B                  .uleb128 0xb\r
- 1545 0162 3B                  .uleb128 0x3b\r
- 1546 0163 05                  .uleb128 0x5\r
- 1547 0164 01                  .uleb128 0x1\r
- 1548 0165 13                  .uleb128 0x13\r
- 1549 0166 00                  .byte   0\r
- 1550 0167 00                  .byte   0\r
- 1551 0168 1E                  .uleb128 0x1e\r
- 1552 0169 0D                  .uleb128 0xd\r
- 1553 016a 00                  .byte   0\r
- 1554 016b 03                  .uleb128 0x3\r
- 1555 016c 0E                  .uleb128 0xe\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 37\r
-\r
-\r
- 1556 016d 3A                  .uleb128 0x3a\r
- 1557 016e 0B                  .uleb128 0xb\r
- 1558 016f 3B                  .uleb128 0x3b\r
- 1559 0170 05                  .uleb128 0x5\r
- 1560 0171 49                  .uleb128 0x49\r
- 1561 0172 13                  .uleb128 0x13\r
- 1562 0173 38                  .uleb128 0x38\r
- 1563 0174 0A                  .uleb128 0xa\r
- 1564 0175 00                  .byte   0\r
- 1565 0176 00                  .byte   0\r
- 1566 0177 1F                  .uleb128 0x1f\r
- 1567 0178 16                  .uleb128 0x16\r
- 1568 0179 00                  .byte   0\r
- 1569 017a 03                  .uleb128 0x3\r
- 1570 017b 0E                  .uleb128 0xe\r
- 1571 017c 3A                  .uleb128 0x3a\r
- 1572 017d 0B                  .uleb128 0xb\r
- 1573 017e 3B                  .uleb128 0x3b\r
- 1574 017f 05                  .uleb128 0x5\r
- 1575 0180 49                  .uleb128 0x49\r
- 1576 0181 13                  .uleb128 0x13\r
- 1577 0182 00                  .byte   0\r
- 1578 0183 00                  .byte   0\r
- 1579 0184 20                  .uleb128 0x20\r
- 1580 0185 01                  .uleb128 0x1\r
- 1581 0186 01                  .byte   0x1\r
- 1582 0187 49                  .uleb128 0x49\r
- 1583 0188 13                  .uleb128 0x13\r
- 1584 0189 01                  .uleb128 0x1\r
- 1585 018a 13                  .uleb128 0x13\r
- 1586 018b 00                  .byte   0\r
- 1587 018c 00                  .byte   0\r
- 1588 018d 21                  .uleb128 0x21\r
- 1589 018e 21                  .uleb128 0x21\r
- 1590 018f 00                  .byte   0\r
- 1591 0190 49                  .uleb128 0x49\r
- 1592 0191 13                  .uleb128 0x13\r
- 1593 0192 2F                  .uleb128 0x2f\r
- 1594 0193 0B                  .uleb128 0xb\r
- 1595 0194 00                  .byte   0\r
- 1596 0195 00                  .byte   0\r
- 1597 0196 22                  .uleb128 0x22\r
- 1598 0197 34                  .uleb128 0x34\r
- 1599 0198 00                  .byte   0\r
- 1600 0199 03                  .uleb128 0x3\r
- 1601 019a 08                  .uleb128 0x8\r
- 1602 019b 3A                  .uleb128 0x3a\r
- 1603 019c 0B                  .uleb128 0xb\r
- 1604 019d 3B                  .uleb128 0x3b\r
- 1605 019e 05                  .uleb128 0x5\r
- 1606 019f 49                  .uleb128 0x49\r
- 1607 01a0 13                  .uleb128 0x13\r
- 1608 01a1 02                  .uleb128 0x2\r
- 1609 01a2 06                  .uleb128 0x6\r
- 1610 01a3 00                  .byte   0\r
- 1611 01a4 00                  .byte   0\r
- 1612 01a5 23                  .uleb128 0x23\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 38\r
-\r
-\r
- 1613 01a6 0B                  .uleb128 0xb\r
- 1614 01a7 01                  .byte   0x1\r
- 1615 01a8 11                  .uleb128 0x11\r
- 1616 01a9 01                  .uleb128 0x1\r
- 1617 01aa 12                  .uleb128 0x12\r
- 1618 01ab 01                  .uleb128 0x1\r
- 1619 01ac 01                  .uleb128 0x1\r
- 1620 01ad 13                  .uleb128 0x13\r
- 1621 01ae 00                  .byte   0\r
- 1622 01af 00                  .byte   0\r
- 1623 01b0 24                  .uleb128 0x24\r
- 1624 01b1 1D                  .uleb128 0x1d\r
- 1625 01b2 01                  .byte   0x1\r
- 1626 01b3 31                  .uleb128 0x31\r
- 1627 01b4 13                  .uleb128 0x13\r
- 1628 01b5 11                  .uleb128 0x11\r
- 1629 01b6 01                  .uleb128 0x1\r
- 1630 01b7 12                  .uleb128 0x12\r
- 1631 01b8 01                  .uleb128 0x1\r
- 1632 01b9 58                  .uleb128 0x58\r
- 1633 01ba 0B                  .uleb128 0xb\r
- 1634 01bb 59                  .uleb128 0x59\r
- 1635 01bc 05                  .uleb128 0x5\r
- 1636 01bd 00                  .byte   0\r
- 1637 01be 00                  .byte   0\r
- 1638 01bf 25                  .uleb128 0x25\r
- 1639 01c0 05                  .uleb128 0x5\r
- 1640 01c1 00                  .byte   0\r
- 1641 01c2 31                  .uleb128 0x31\r
- 1642 01c3 13                  .uleb128 0x13\r
- 1643 01c4 02                  .uleb128 0x2\r
- 1644 01c5 06                  .uleb128 0x6\r
- 1645 01c6 00                  .byte   0\r
- 1646 01c7 00                  .byte   0\r
- 1647 01c8 26                  .uleb128 0x26\r
- 1648 01c9 1D                  .uleb128 0x1d\r
- 1649 01ca 01                  .byte   0x1\r
- 1650 01cb 31                  .uleb128 0x31\r
- 1651 01cc 13                  .uleb128 0x13\r
- 1652 01cd 52                  .uleb128 0x52\r
- 1653 01ce 01                  .uleb128 0x1\r
- 1654 01cf 55                  .uleb128 0x55\r
- 1655 01d0 06                  .uleb128 0x6\r
- 1656 01d1 58                  .uleb128 0x58\r
- 1657 01d2 0B                  .uleb128 0xb\r
- 1658 01d3 59                  .uleb128 0x59\r
- 1659 01d4 05                  .uleb128 0x5\r
- 1660 01d5 00                  .byte   0\r
- 1661 01d6 00                  .byte   0\r
- 1662 01d7 27                  .uleb128 0x27\r
- 1663 01d8 05                  .uleb128 0x5\r
- 1664 01d9 00                  .byte   0\r
- 1665 01da 31                  .uleb128 0x31\r
- 1666 01db 13                  .uleb128 0x13\r
- 1667 01dc 00                  .byte   0\r
- 1668 01dd 00                  .byte   0\r
- 1669 01de 28                  .uleb128 0x28\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 39\r
-\r
-\r
- 1670 01df 1D                  .uleb128 0x1d\r
- 1671 01e0 01                  .byte   0x1\r
- 1672 01e1 31                  .uleb128 0x31\r
- 1673 01e2 13                  .uleb128 0x13\r
- 1674 01e3 11                  .uleb128 0x11\r
- 1675 01e4 01                  .uleb128 0x1\r
- 1676 01e5 12                  .uleb128 0x12\r
- 1677 01e6 01                  .uleb128 0x1\r
- 1678 01e7 58                  .uleb128 0x58\r
- 1679 01e8 0B                  .uleb128 0xb\r
- 1680 01e9 59                  .uleb128 0x59\r
- 1681 01ea 05                  .uleb128 0x5\r
- 1682 01eb 01                  .uleb128 0x1\r
- 1683 01ec 13                  .uleb128 0x13\r
- 1684 01ed 00                  .byte   0\r
- 1685 01ee 00                  .byte   0\r
- 1686 01ef 29                  .uleb128 0x29\r
- 1687 01f0 0B                  .uleb128 0xb\r
- 1688 01f1 01                  .byte   0x1\r
- 1689 01f2 11                  .uleb128 0x11\r
- 1690 01f3 01                  .uleb128 0x1\r
- 1691 01f4 12                  .uleb128 0x12\r
- 1692 01f5 01                  .uleb128 0x1\r
- 1693 01f6 00                  .byte   0\r
- 1694 01f7 00                  .byte   0\r
- 1695 01f8 2A                  .uleb128 0x2a\r
- 1696 01f9 05                  .uleb128 0x5\r
- 1697 01fa 00                  .byte   0\r
- 1698 01fb 31                  .uleb128 0x31\r
- 1699 01fc 13                  .uleb128 0x13\r
- 1700 01fd 1C                  .uleb128 0x1c\r
- 1701 01fe 0B                  .uleb128 0xb\r
- 1702 01ff 00                  .byte   0\r
- 1703 0200 00                  .byte   0\r
- 1704 0201 2B                  .uleb128 0x2b\r
- 1705 0202 05                  .uleb128 0x5\r
- 1706 0203 00                  .byte   0\r
- 1707 0204 31                  .uleb128 0x31\r
- 1708 0205 13                  .uleb128 0x13\r
- 1709 0206 1C                  .uleb128 0x1c\r
- 1710 0207 06                  .uleb128 0x6\r
- 1711 0208 00                  .byte   0\r
- 1712 0209 00                  .byte   0\r
- 1713 020a 2C                  .uleb128 0x2c\r
- 1714 020b 2E                  .uleb128 0x2e\r
- 1715 020c 01                  .byte   0x1\r
- 1716 020d 3F                  .uleb128 0x3f\r
- 1717 020e 0C                  .uleb128 0xc\r
- 1718 020f 03                  .uleb128 0x3\r
- 1719 0210 0E                  .uleb128 0xe\r
- 1720 0211 3A                  .uleb128 0x3a\r
- 1721 0212 0B                  .uleb128 0xb\r
- 1722 0213 3B                  .uleb128 0x3b\r
- 1723 0214 0B                  .uleb128 0xb\r
- 1724 0215 27                  .uleb128 0x27\r
- 1725 0216 0C                  .uleb128 0xc\r
- 1726 0217 3C                  .uleb128 0x3c\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 40\r
-\r
-\r
- 1727 0218 0C                  .uleb128 0xc\r
- 1728 0219 01                  .uleb128 0x1\r
- 1729 021a 13                  .uleb128 0x13\r
- 1730 021b 00                  .byte   0\r
- 1731 021c 00                  .byte   0\r
- 1732 021d 2D                  .uleb128 0x2d\r
- 1733 021e 05                  .uleb128 0x5\r
- 1734 021f 00                  .byte   0\r
- 1735 0220 49                  .uleb128 0x49\r
- 1736 0221 13                  .uleb128 0x13\r
- 1737 0222 00                  .byte   0\r
- 1738 0223 00                  .byte   0\r
- 1739 0224 2E                  .uleb128 0x2e\r
- 1740 0225 2E                  .uleb128 0x2e\r
- 1741 0226 01                  .byte   0x1\r
- 1742 0227 3F                  .uleb128 0x3f\r
- 1743 0228 0C                  .uleb128 0xc\r
- 1744 0229 03                  .uleb128 0x3\r
- 1745 022a 0E                  .uleb128 0xe\r
- 1746 022b 27                  .uleb128 0x27\r
- 1747 022c 0C                  .uleb128 0xc\r
- 1748 022d 49                  .uleb128 0x49\r
- 1749 022e 13                  .uleb128 0x13\r
- 1750 022f 34                  .uleb128 0x34\r
- 1751 0230 0C                  .uleb128 0xc\r
- 1752 0231 3C                  .uleb128 0x3c\r
- 1753 0232 0C                  .uleb128 0xc\r
- 1754 0233 00                  .byte   0\r
- 1755 0234 00                  .byte   0\r
- 1756 0235 00                  .byte   0\r
- 1757                          .section        .debug_loc,"",%progbits\r
- 1758                  .Ldebug_loc0:\r
- 1759                  .LLST0:\r
- 1760 0000 00000000            .4byte  .LFB8\r
- 1761 0004 02000000            .4byte  .LCFI0\r
- 1762 0008 0200                .2byte  0x2\r
- 1763 000a 7D                  .byte   0x7d\r
- 1764 000b 00                  .sleb128 0\r
- 1765 000c 02000000            .4byte  .LCFI0\r
- 1766 0010 D8010000            .4byte  .LFE8\r
- 1767 0014 0200                .2byte  0x2\r
- 1768 0016 7D                  .byte   0x7d\r
- 1769 0017 18                  .sleb128 24\r
- 1770 0018 00000000            .4byte  0\r
- 1771 001c 00000000            .4byte  0\r
- 1772                  .LLST1:\r
- 1773 0020 50000000            .4byte  .LVL4\r
- 1774 0024 68000000            .4byte  .LVL5\r
- 1775 0028 0100                .2byte  0x1\r
- 1776 002a 54                  .byte   0x54\r
- 1777 002b 82000000            .4byte  .LVL7\r
- 1778 002f 84000000            .4byte  .LVL8\r
- 1779 0033 0100                .2byte  0x1\r
- 1780 0035 54                  .byte   0x54\r
- 1781 0036 00000000            .4byte  0\r
- 1782 003a 00000000            .4byte  0\r
- 1783                  .LLST2:\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 41\r
-\r
-\r
- 1784 003e 80000000            .4byte  .LVL6\r
- 1785 0042 82000000            .4byte  .LVL7\r
- 1786 0046 0200                .2byte  0x2\r
- 1787 0048 30                  .byte   0x30\r
- 1788 0049 9F                  .byte   0x9f\r
- 1789 004a 00000000            .4byte  0\r
- 1790 004e 00000000            .4byte  0\r
- 1791                  .LLST3:\r
- 1792 0052 8C000000            .4byte  .LVL9\r
- 1793 0056 94000000            .4byte  .LVL11\r
- 1794 005a 0100                .2byte  0x1\r
- 1795 005c 52                  .byte   0x52\r
- 1796 005d 94000000            .4byte  .LVL11\r
- 1797 0061 A0000000            .4byte  .LVL13\r
- 1798 0065 0800                .2byte  0x8\r
- 1799 0067 76                  .byte   0x76\r
- 1800 0068 7F                  .sleb128 -1\r
- 1801 0069 36                  .byte   0x36\r
- 1802 006a 1E                  .byte   0x1e\r
- 1803 006b 77                  .byte   0x77\r
- 1804 006c 00                  .sleb128 0\r
- 1805 006d 22                  .byte   0x22\r
- 1806 006e 9F                  .byte   0x9f\r
- 1807 006f 00000000            .4byte  0\r
- 1808 0073 00000000            .4byte  0\r
- 1809                  .LLST4:\r
- 1810 0077 8C000000            .4byte  .LVL9\r
- 1811 007b 94000000            .4byte  .LVL11\r
- 1812 007f 0900                .2byte  0x9\r
- 1813 0081 72                  .byte   0x72\r
- 1814 0082 04                  .sleb128 4\r
- 1815 0083 94                  .byte   0x94\r
- 1816 0084 02                  .byte   0x2\r
- 1817 0085 0A                  .byte   0xa\r
- 1818 0086 FFFF                .2byte  0xffff\r
- 1819 0088 1A                  .byte   0x1a\r
- 1820 0089 9F                  .byte   0x9f\r
- 1821 008a 94000000            .4byte  .LVL11\r
- 1822 008e 97000000            .4byte  .LVL12-1\r
- 1823 0092 1000                .2byte  0x10\r
- 1824 0094 76                  .byte   0x76\r
- 1825 0095 7F                  .sleb128 -1\r
- 1826 0096 36                  .byte   0x36\r
- 1827 0097 1E                  .byte   0x1e\r
- 1828 0098 77                  .byte   0x77\r
- 1829 0099 00                  .sleb128 0\r
- 1830 009a 22                  .byte   0x22\r
- 1831 009b 23                  .byte   0x23\r
- 1832 009c 04                  .uleb128 0x4\r
- 1833 009d 94                  .byte   0x94\r
- 1834 009e 02                  .byte   0x2\r
- 1835 009f 0A                  .byte   0xa\r
- 1836 00a0 FFFF                .2byte  0xffff\r
- 1837 00a2 1A                  .byte   0x1a\r
- 1838 00a3 9F                  .byte   0x9f\r
- 1839 00a4 00000000            .4byte  0\r
- 1840 00a8 00000000            .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 42\r
-\r
-\r
- 1841                  .LLST5:\r
- 1842 00ac 8C000000            .4byte  .LVL9\r
- 1843 00b0 92000000            .4byte  .LVL10\r
- 1844 00b4 0A00                .2byte  0xa\r
- 1845 00b6 76                  .byte   0x76\r
- 1846 00b7 00                  .sleb128 0\r
- 1847 00b8 36                  .byte   0x36\r
- 1848 00b9 1E                  .byte   0x1e\r
- 1849 00ba 03                  .byte   0x3\r
- 1850 00bb 00000000            .4byte  .LANCHOR0\r
- 1851 00bf 22                  .byte   0x22\r
- 1852 00c0 92000000            .4byte  .LVL10\r
- 1853 00c4 97000000            .4byte  .LVL12-1\r
- 1854 00c8 0A00                .2byte  0xa\r
- 1855 00ca 76                  .byte   0x76\r
- 1856 00cb 7F                  .sleb128 -1\r
- 1857 00cc 36                  .byte   0x36\r
- 1858 00cd 1E                  .byte   0x1e\r
- 1859 00ce 03                  .byte   0x3\r
- 1860 00cf 00000000            .4byte  .LANCHOR0\r
- 1861 00d3 22                  .byte   0x22\r
- 1862 00d4 00000000            .4byte  0\r
- 1863 00d8 00000000            .4byte  0\r
- 1864                  .LLST6:\r
- 1865 00dc D4000000            .4byte  .LVL18\r
- 1866 00e0 E2000000            .4byte  .LVL19\r
- 1867 00e4 0100                .2byte  0x1\r
- 1868 00e6 51                  .byte   0x51\r
- 1869 00e7 00000000            .4byte  0\r
- 1870 00eb 00000000            .4byte  0\r
- 1871                  .LLST7:\r
- 1872 00ef A6000000            .4byte  .LVL14\r
- 1873 00f3 AE000000            .4byte  .LVL16\r
- 1874 00f7 0100                .2byte  0x1\r
- 1875 00f9 50                  .byte   0x50\r
- 1876 00fa AE000000            .4byte  .LVL16\r
- 1877 00fe D8010000            .4byte  .LFE8\r
- 1878 0102 0100                .2byte  0x1\r
- 1879 0104 57                  .byte   0x57\r
- 1880 0105 00000000            .4byte  0\r
- 1881 0109 00000000            .4byte  0\r
- 1882                  .LLST8:\r
- 1883 010d AA000000            .4byte  .LVL15\r
- 1884 0111 B2000000            .4byte  .LVL17\r
- 1885 0115 0100                .2byte  0x1\r
- 1886 0117 50                  .byte   0x50\r
- 1887 0118 00000000            .4byte  0\r
- 1888 011c 00000000            .4byte  0\r
- 1889                  .LLST9:\r
- 1890 0120 56010000            .4byte  .LVL25\r
- 1891 0124 5C010000            .4byte  .LVL26\r
- 1892 0128 0100                .2byte  0x1\r
- 1893 012a 53                  .byte   0x53\r
- 1894 012b 00000000            .4byte  0\r
- 1895 012f 00000000            .4byte  0\r
- 1896                          .section        .debug_aranges,"",%progbits\r
- 1897 0000 24000000            .4byte  0x24\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 43\r
-\r
-\r
- 1898 0004 0200                .2byte  0x2\r
- 1899 0006 00000000            .4byte  .Ldebug_info0\r
- 1900 000a 04                  .byte   0x4\r
- 1901 000b 00                  .byte   0\r
- 1902 000c 0000                .2byte  0\r
- 1903 000e 0000                .2byte  0\r
- 1904 0010 00000000            .4byte  .LFB7\r
- 1905 0014 0C000000            .4byte  .LFE7-.LFB7\r
- 1906 0018 00000000            .4byte  .LFB8\r
- 1907 001c D8010000            .4byte  .LFE8-.LFB8\r
- 1908 0020 00000000            .4byte  0\r
- 1909 0024 00000000            .4byte  0\r
- 1910                          .section        .debug_ranges,"",%progbits\r
- 1911                  .Ldebug_ranges0:\r
- 1912 0000 08000000            .4byte  .LBB32\r
- 1913 0004 16000000            .4byte  .LBE32\r
- 1914 0008 18000000            .4byte  .LBB36\r
- 1915 000c 60000000            .4byte  .LBE36\r
- 1916 0010 62000000            .4byte  .LBB37\r
- 1917 0014 78000000            .4byte  .LBE37\r
- 1918 0018 00000000            .4byte  0\r
- 1919 001c 00000000            .4byte  0\r
- 1920 0020 08000000            .4byte  .LBB33\r
- 1921 0024 16000000            .4byte  .LBE33\r
- 1922 0028 18000000            .4byte  .LBB34\r
- 1923 002c 60000000            .4byte  .LBE34\r
- 1924 0030 62000000            .4byte  .LBB35\r
- 1925 0034 78000000            .4byte  .LBE35\r
- 1926 0038 00000000            .4byte  0\r
- 1927 003c 00000000            .4byte  0\r
- 1928 0040 84000000            .4byte  .LBB38\r
- 1929 0044 44010000            .4byte  .LBE38\r
- 1930 0048 46010000            .4byte  .LBB48\r
- 1931 004c 48010000            .4byte  .LBE48\r
- 1932 0050 00000000            .4byte  0\r
- 1933 0054 00000000            .4byte  0\r
- 1934 0058 A0000000            .4byte  .LBB42\r
- 1935 005c A2000000            .4byte  .LBE42\r
- 1936 0060 A4000000            .4byte  .LBB47\r
- 1937 0064 D6000000            .4byte  .LBE47\r
- 1938 0068 00000000            .4byte  0\r
- 1939 006c 00000000            .4byte  0\r
- 1940 0070 A0000000            .4byte  .LBB43\r
- 1941 0074 A2000000            .4byte  .LBE43\r
- 1942 0078 A4000000            .4byte  .LBB46\r
- 1943 007c D6000000            .4byte  .LBE46\r
- 1944 0080 00000000            .4byte  0\r
- 1945 0084 00000000            .4byte  0\r
- 1946 0088 A0000000            .4byte  .LBB44\r
- 1947 008c A2000000            .4byte  .LBE44\r
- 1948 0090 A4000000            .4byte  .LBB45\r
- 1949 0094 D0000000            .4byte  .LBE45\r
- 1950 0098 00000000            .4byte  0\r
- 1951 009c 00000000            .4byte  0\r
- 1952 00a0 00000000            .4byte  .LFB7\r
- 1953 00a4 0C000000            .4byte  .LFE7\r
- 1954 00a8 00000000            .4byte  .LFB8\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 44\r
-\r
-\r
- 1955 00ac D8010000            .4byte  .LFE8\r
- 1956 00b0 00000000            .4byte  0\r
- 1957 00b4 00000000            .4byte  0\r
- 1958                          .section        .debug_line,"",%progbits\r
- 1959                  .Ldebug_line0:\r
- 1960 0000 D2010000            .section        .debug_str,"MS",%progbits,1\r
- 1960      0200E200 \r
- 1960      00000201 \r
- 1960      FB0E0D00 \r
- 1960      01010101 \r
- 1961                  .LASF31:\r
- 1962 0000 636F756E            .ascii  "count\000"\r
- 1962      7400\r
- 1963                  .LASF13:\r
- 1964 0006 75696E74            .ascii  "uint16\000"\r
- 1964      313600\r
- 1965                  .LASF30:\r
- 1966 000d 62617365            .ascii  "baseAddr\000"\r
- 1966      41646472 \r
- 1966      00\r
- 1967                  .LASF11:\r
- 1968 0016 73697A65            .ascii  "size_t\000"\r
- 1968      5F7400\r
- 1969                  .LASF22:\r
- 1970 001d 4379436C            .ascii  "CyClockStartupError\000"\r
- 1970      6F636B53 \r
- 1970      74617274 \r
- 1970      75704572 \r
- 1970      726F7200 \r
- 1971                  .LASF29:\r
- 1972 0031 64617461            .ascii  "data_table\000"\r
- 1972      5F746162 \r
- 1972      6C6500\r
- 1973                  .LASF6:\r
- 1974 003c 6C6F6E67            .ascii  "long long unsigned int\000"\r
- 1974      206C6F6E \r
- 1974      6720756E \r
- 1974      7369676E \r
- 1974      65642069 \r
- 1975                  .LASF28:\r
- 1976 0053 61646472            .ascii  "addr_table\000"\r
- 1976      5F746162 \r
- 1976      6C6500\r
- 1977                  .LASF47:\r
- 1978 005e 63795F63            .ascii  "cy_cfg_data_table\000"\r
- 1978      66675F64 \r
- 1978      6174615F \r
- 1978      7461626C \r
- 1978      6500\r
- 1979                  .LASF36:\r
- 1980 0070 416E616C            .ascii  "AnalogSetDefault\000"\r
- 1980      6F675365 \r
- 1980      74446566 \r
- 1980      61756C74 \r
- 1980      00\r
- 1981                  .LASF5:\r
- 1982 0081 6C6F6E67            .ascii  "long long int\000"\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 45\r
-\r
-\r
- 1982      206C6F6E \r
- 1982      6720696E \r
- 1982      7400\r
- 1983                  .LASF0:\r
- 1984 008f 7369676E            .ascii  "signed char\000"\r
- 1984      65642063 \r
- 1984      68617200 \r
- 1985                  .LASF46:\r
- 1986 009b 63795F63            .ascii  "cy_cfg_addr_table\000"\r
- 1986      66675F61 \r
- 1986      6464725F \r
- 1986      7461626C \r
- 1986      6500\r
- 1987                  .LASF27:\r
- 1988 00ad 6366675F            .ascii  "cfg_write_bytes32\000"\r
- 1988      77726974 \r
- 1988      655F6279 \r
- 1988      74657333 \r
- 1988      3200\r
- 1989                  .LASF32:\r
- 1990 00bf 436C6F63            .ascii  "ClockSetup\000"\r
- 1990      6B536574 \r
- 1990      757000\r
- 1991                  .LASF24:\r
- 1992 00ca 6572726F            .ascii  "errorCode\000"\r
- 1992      72436F64 \r
- 1992      6500\r
- 1993                  .LASF44:\r
- 1994 00d4 42535F49            .ascii  "BS_IOPINS0_4_VAL\000"\r
- 1994      4F50494E \r
- 1994      53305F34 \r
- 1994      5F56414C \r
- 1994      00\r
- 1995                  .LASF7:\r
- 1996 00e5 6C6F6E67            .ascii  "long int\000"\r
- 1996      20696E74 \r
- 1996      00\r
- 1997                  .LASF18:\r
- 1998 00ee 72656731            .ascii  "reg16\000"\r
- 1998      3600\r
- 1999                  .LASF12:\r
- 2000 00f4 75696E74            .ascii  "uint8\000"\r
- 2000      3800\r
- 2001                  .LASF16:\r
- 2002 00fa 646F7562            .ascii  "double\000"\r
- 2002      6C6500\r
- 2003                  .LASF35:\r
- 2004 0101 43594D45            .ascii  "CYMEMZERO\000"\r
- 2004      4D5A4552 \r
- 2004      4F00\r
- 2005                  .LASF14:\r
- 2006 010b 75696E74            .ascii  "uint32\000"\r
- 2006      333200\r
- 2007                  .LASF40:\r
- 2008 0112 72656756            .ascii  "regValue\000"\r
- 2008      616C7565 \r
- 2008      00\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 46\r
-\r
-\r
- 2009                  .LASF20:\r
- 2010 011b 76616C75            .ascii  "value\000"\r
- 2010      6500\r
- 2011                  .LASF4:\r
- 2012 0121 756E7369            .ascii  "unsigned int\000"\r
- 2012      676E6564 \r
- 2012      20696E74 \r
- 2012      00\r
- 2013                  .LASF53:\r
- 2014 012e 2E5C4765            .ascii  ".\\Generated_Source\\PSoC5\\cyfitter_cfg.c\000"\r
- 2014      6E657261 \r
- 2014      7465645F \r
- 2014      536F7572 \r
- 2014      63655C50 \r
- 2015                  .LASF9:\r
- 2016 0156 6C6F6E67            .ascii  "long unsigned int\000"\r
- 2016      20756E73 \r
- 2016      69676E65 \r
- 2016      6420696E \r
- 2016      7400\r
- 2017                  .LASF33:\r
- 2018 0168 74696D65            .ascii  "timeout\000"\r
- 2018      6F757400 \r
- 2019                  .LASF49:\r
- 2020 0170 73697A65            .ascii  "size\000"\r
- 2020      00\r
- 2021                  .LASF3:\r
- 2022 0175 73686F72            .ascii  "short unsigned int\000"\r
- 2022      7420756E \r
- 2022      7369676E \r
- 2022      65642069 \r
- 2022      6E7400\r
- 2023                  .LASF45:\r
- 2024 0188 42535F49            .ascii  "BS_IOPINS0_6_VAL\000"\r
- 2024      4F50494E \r
- 2024      53305F36 \r
- 2024      5F56414C \r
- 2024      00\r
- 2025                  .LASF54:\r
- 2026 0199 573A5C53            .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 2026      43534932 \r
- 2026      53445C73 \r
- 2026      6F667477 \r
- 2026      6172655C \r
- 2027 01c8 6E00                .ascii  "n\000"\r
- 2028                  .LASF23:\r
- 2029 01ca 4359434F            .ascii  "CYCONFIGCPYCODE\000"\r
- 2029      4E464947 \r
- 2029      43505943 \r
- 2029      4F444500 \r
- 2030                  .LASF8:\r
- 2031 01da 73697A65            .ascii  "sizetype\000"\r
- 2031      74797065 \r
- 2031      00\r
- 2032                  .LASF37:\r
- 2033 01e3 62675F78            .ascii  "bg_xover_inl_trim\000"\r
- 2033      6F766572 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 47\r
-\r
-\r
- 2033      5F696E6C \r
- 2033      5F747269 \r
- 2033      6D00\r
- 2034                  .LASF50:\r
- 2035 01f5 6366675F            .ascii  "cfg_memset_t\000"\r
- 2035      6D656D73 \r
- 2035      65745F74 \r
- 2035      00\r
- 2036                  .LASF51:\r
- 2037 0202 6366675F            .ascii  "cfg_memset_list\000"\r
- 2037      6D656D73 \r
- 2037      65745F6C \r
- 2037      69737400 \r
- 2038                  .LASF43:\r
- 2039 0212 42535F49            .ascii  "BS_IOPINS0_3_VAL\000"\r
- 2039      4F50494E \r
- 2039      53305F33 \r
- 2039      5F56414C \r
- 2039      00\r
- 2040                  .LASF25:\r
- 2041 0223 64657374            .ascii  "dest\000"\r
- 2041      00\r
- 2042                  .LASF15:\r
- 2043 0228 666C6F61            .ascii  "float\000"\r
- 2043      7400\r
- 2044                  .LASF56:\r
- 2045 022e 43794465            .ascii  "CyDelayCycles\000"\r
- 2045      6C617943 \r
- 2045      79636C65 \r
- 2045      7300\r
- 2046                  .LASF52:\r
- 2047 023c 474E5520            .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 2047      4320342E \r
- 2047      372E3320 \r
- 2047      32303133 \r
- 2047      30333132 \r
- 2048 026f 616E6368            .ascii  "anch revision 196615]\000"\r
- 2048      20726576 \r
- 2048      6973696F \r
- 2048      6E203139 \r
- 2048      36363135 \r
- 2049                  .LASF17:\r
- 2050 0285 72656738            .ascii  "reg8\000"\r
- 2050      00\r
- 2051                  .LASF1:\r
- 2052 028a 756E7369            .ascii  "unsigned char\000"\r
- 2052      676E6564 \r
- 2052      20636861 \r
- 2052      7200\r
- 2053                  .LASF2:\r
- 2054 0298 73686F72            .ascii  "short int\000"\r
- 2054      7420696E \r
- 2054      7400\r
- 2055                  .LASF41:\r
- 2056 02a2 42535F49            .ascii  "BS_IOPINS0_0_VAL\000"\r
- 2056      4F50494E \r
- 2056      53305F30 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccYFm6IZ.s                      page 48\r
-\r
-\r
- 2056      5F56414C \r
- 2056      00\r
- 2057                  .LASF34:\r
- 2058 02b3 706C6C4C            .ascii  "pllLock\000"\r
- 2058      6F636B00 \r
- 2059                  .LASF42:\r
- 2060 02bb 42535F49            .ascii  "BS_IOPINS0_8_VAL\000"\r
- 2060      4F50494E \r
- 2060      53305F38 \r
- 2060      5F56414C \r
- 2060      00\r
- 2061                  .LASF21:\r
- 2062 02cc 63795F63            .ascii  "cy_cfg_addrvalue_t\000"\r
- 2062      66675F61 \r
- 2062      64647276 \r
- 2062      616C7565 \r
- 2062      5F7400\r
- 2063                  .LASF10:\r
- 2064 02df 63686172            .ascii  "char\000"\r
- 2064      00\r
- 2065                  .LASF38:\r
- 2066 02e4 53657441            .ascii  "SetAnalogRoutingPumps\000"\r
- 2066      6E616C6F \r
- 2066      67526F75 \r
- 2066      74696E67 \r
- 2066      50756D70 \r
- 2067                  .LASF19:\r
- 2068 02fa 6F666673            .ascii  "offset\000"\r
- 2068      657400\r
- 2069                  .LASF55:\r
- 2070 0301 656E6162            .ascii  "enabled\000"\r
- 2070      6C656400 \r
- 2071                  .LASF57:\r
- 2072 0309 6D656D73            .ascii  "memset\000"\r
- 2072      657400\r
- 2073                  .LASF26:\r
- 2074 0310 4359434F            .ascii  "CYCONFIGCPY\000"\r
- 2074      4E464947 \r
- 2074      43505900 \r
- 2075                  .LASF48:\r
- 2076 031c 61646472            .ascii  "address\000"\r
- 2076      65737300 \r
- 2077                  .LASF39:\r
- 2078 0324 63796669            .ascii  "cyfitter_cfg\000"\r
- 2078      74746572 \r
- 2078      5F636667 \r
- 2078      00\r
- 2079                          .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.o
deleted file mode 100755 (executable)
index 80b2555..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyfitter_cfg.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.lst
deleted file mode 100755 (executable)
index c49df57..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.lst
+++ /dev/null
@@ -1,575 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "cymetadata.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .global cy_metadata\r
-  19                           .global cy_meta_flashprotect\r
-  20                           .global cy_meta_wonvl\r
-  21                           .global cy_meta_custnvl\r
-  22                           .global cy_meta_configecc\r
-  23                           .global cy_meta_loader\r
-  24                           .section        .cyconfigecc,"a",%progbits\r
-  25                           .type   cy_meta_configecc, %object\r
-  26                           .size   cy_meta_configecc, 1\r
-  27                   cy_meta_configecc:\r
-  28 0000 00                   .space  1\r
-  29                           .section        .cywolatch,"a",%progbits\r
-  30                           .type   cy_meta_wonvl, %object\r
-  31                           .size   cy_meta_wonvl, 4\r
-  32                   cy_meta_wonvl:\r
-  33 0000 BC                   .byte   -68\r
-  34 0001 90                   .byte   -112\r
-  35 0002 AC                   .byte   -84\r
-  36 0003 AF                   .byte   -81\r
-  37                           .section        .cyloadermeta,"a",%progbits\r
-  38                           .type   cy_meta_loader, %object\r
-  39                           .size   cy_meta_loader, 64\r
-  40                   cy_meta_loader:\r
-  41 0000 00                   .byte   0\r
-  42 0001 00                   .byte   0\r
-  43 0002 00                   .byte   0\r
-  44 0003 00                   .byte   0\r
-  45 0004 00                   .byte   0\r
-  46 0005 00                   .byte   0\r
-  47 0006 00                   .byte   0\r
-  48 0007 00                   .byte   0\r
-  49 0008 00                   .byte   0\r
-  50 0009 00                   .byte   0\r
-  51 000a 00                   .byte   0\r
-  52 000b 00                   .byte   0\r
-  53 000c 00                   .byte   0\r
-  54 000d 00                   .byte   0\r
-  55 000e 00                   .byte   0\r
-  56 000f 00                   .byte   0\r
-  57 0010 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 2\r
-\r
-\r
-  58 0011 00                   .byte   0\r
-  59 0012 00                   .byte   0\r
-  60 0013 00                   .byte   0\r
-  61 0014 01                   .byte   1\r
-  62 0015 00                   .byte   0\r
-  63 0016 01                   .byte   1\r
-  64 0017 00                   .byte   0\r
-  65 0018 00                   .byte   0\r
-  66 0019 00                   .byte   0\r
-  67 001a 00                   .byte   0\r
-  68 001b 00                   .byte   0\r
-  69 001c 00                   .byte   0\r
-  70 001d 00                   .byte   0\r
-  71 001e 00                   .byte   0\r
-  72 001f 00                   .byte   0\r
-  73 0020 00                   .byte   0\r
-  74 0021 00                   .byte   0\r
-  75 0022 00                   .byte   0\r
-  76 0023 00                   .byte   0\r
-  77 0024 00                   .byte   0\r
-  78 0025 00                   .byte   0\r
-  79 0026 00                   .byte   0\r
-  80 0027 00                   .byte   0\r
-  81 0028 00                   .byte   0\r
-  82 0029 00                   .byte   0\r
-  83 002a 00                   .byte   0\r
-  84 002b 00                   .byte   0\r
-  85 002c 00                   .byte   0\r
-  86 002d 00                   .byte   0\r
-  87 002e 00                   .byte   0\r
-  88 002f 00                   .byte   0\r
-  89 0030 00                   .byte   0\r
-  90 0031 00                   .byte   0\r
-  91 0032 00                   .byte   0\r
-  92 0033 00                   .byte   0\r
-  93 0034 00                   .byte   0\r
-  94 0035 00                   .byte   0\r
-  95 0036 00                   .byte   0\r
-  96 0037 00                   .byte   0\r
-  97 0038 00                   .byte   0\r
-  98 0039 00                   .byte   0\r
-  99 003a 00                   .byte   0\r
- 100 003b 00                   .byte   0\r
- 101 003c 00                   .byte   0\r
- 102 003d 00                   .byte   0\r
- 103 003e 00                   .byte   0\r
- 104 003f 00                   .byte   0\r
- 105                           .section        .cycustnvl,"a",%progbits\r
- 106                           .type   cy_meta_custnvl, %object\r
- 107                           .size   cy_meta_custnvl, 4\r
- 108                   cy_meta_custnvl:\r
- 109 0000 80                   .byte   -128\r
- 110 0001 00                   .byte   0\r
- 111 0002 40                   .byte   64\r
- 112 0003 05                   .byte   5\r
- 113                           .section        .cymeta,"a",%progbits\r
- 114                           .type   cy_metadata, %object\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 3\r
-\r
-\r
- 115                           .size   cy_metadata, 12\r
- 116                   cy_metadata:\r
- 117 0000 00                   .byte   0\r
- 118 0001 01                   .byte   1\r
- 119 0002 2E                   .byte   46\r
- 120 0003 13                   .byte   19\r
- 121 0004 30                   .byte   48\r
- 122 0005 69                   .byte   105\r
- 123 0006 00                   .byte   0\r
- 124 0007 01                   .byte   1\r
- 125 0008 00                   .byte   0\r
- 126 0009 00                   .byte   0\r
- 127 000a 00                   .byte   0\r
- 128 000b 00                   .byte   0\r
- 129                           .section        .cyflashprotect,"a",%progbits\r
- 130                           .type   cy_meta_flashprotect, %object\r
- 131                           .size   cy_meta_flashprotect, 128\r
- 132                   cy_meta_flashprotect:\r
- 133 0000 00000000             .space  128\r
- 133      00000000 \r
- 133      00000000 \r
- 133      00000000 \r
- 133      00000000 \r
- 134                           .text\r
- 135                   .Letext0:\r
- 136                           .file 1 ".\\Generated_Source\\PSoC5\\cymetadata.c"\r
- 137                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
- 138                           .section        .debug_info,"",%progbits\r
- 139                   .Ldebug_info0:\r
- 140 0000 61010000             .4byte  0x161\r
- 141 0004 0200                 .2byte  0x2\r
- 142 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 143 000a 04                   .byte   0x4\r
- 144 000b 01                   .uleb128 0x1\r
- 145 000c 47010000             .4byte  .LASF19\r
- 146 0010 01                   .byte   0x1\r
- 147 0011 00000000             .4byte  .LASF20\r
- 148 0015 67000000             .4byte  .LASF21\r
- 149 0019 00000000             .4byte  .Ldebug_line0\r
- 150 001d 02                   .uleb128 0x2\r
- 151 001e 01                   .byte   0x1\r
- 152 001f 06                   .byte   0x6\r
- 153 0020 99010000             .4byte  .LASF0\r
- 154 0024 02                   .uleb128 0x2\r
- 155 0025 01                   .byte   0x1\r
- 156 0026 08                   .byte   0x8\r
- 157 0027 47000000             .4byte  .LASF1\r
- 158 002b 02                   .uleb128 0x2\r
- 159 002c 02                   .byte   0x2\r
- 160 002d 05                   .byte   0x5\r
- 161 002e 37010000             .4byte  .LASF2\r
- 162 0032 02                   .uleb128 0x2\r
- 163 0033 02                   .byte   0x2\r
- 164 0034 07                   .byte   0x7\r
- 165 0035 98000000             .4byte  .LASF3\r
- 166 0039 02                   .uleb128 0x2\r
- 167 003a 04                   .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 4\r
-\r
-\r
- 168 003b 05                   .byte   0x5\r
- 169 003c 90010000             .4byte  .LASF4\r
- 170 0040 02                   .uleb128 0x2\r
- 171 0041 04                   .byte   0x4\r
- 172 0042 07                   .byte   0x7\r
- 173 0043 55000000             .4byte  .LASF5\r
- 174 0047 02                   .uleb128 0x2\r
- 175 0048 08                   .byte   0x8\r
- 176 0049 05                   .byte   0x5\r
- 177 004a 24010000             .4byte  .LASF6\r
- 178 004e 02                   .uleb128 0x2\r
- 179 004f 08                   .byte   0x8\r
- 180 0050 07                   .byte   0x7\r
- 181 0051 E1000000             .4byte  .LASF7\r
- 182 0055 03                   .uleb128 0x3\r
- 183 0056 04                   .byte   0x4\r
- 184 0057 05                   .byte   0x5\r
- 185 0058 696E7400             .ascii  "int\000"\r
- 186 005c 02                   .uleb128 0x2\r
- 187 005d 04                   .byte   0x4\r
- 188 005e 07                   .byte   0x7\r
- 189 005f D4000000             .4byte  .LASF8\r
- 190 0063 04                   .uleb128 0x4\r
- 191 0064 41010000             .4byte  .LASF22\r
- 192 0068 02                   .byte   0x2\r
- 193 0069 5B                   .byte   0x5b\r
- 194 006a 24000000             .4byte  0x24\r
- 195 006e 02                   .uleb128 0x2\r
- 196 006f 04                   .byte   0x4\r
- 197 0070 04                   .byte   0x4\r
- 198 0071 41000000             .4byte  .LASF9\r
- 199 0075 02                   .uleb128 0x2\r
- 200 0076 08                   .byte   0x8\r
- 201 0077 04                   .byte   0x4\r
- 202 0078 AB000000             .4byte  .LASF10\r
- 203 007c 02                   .uleb128 0x2\r
- 204 007d 01                   .byte   0x1\r
- 205 007e 08                   .byte   0x8\r
- 206 007f 32010000             .4byte  .LASF11\r
- 207 0083 05                   .uleb128 0x5\r
- 208 0084 63000000             .4byte  0x63\r
- 209 0088 93000000             .4byte  0x93\r
- 210 008c 06                   .uleb128 0x6\r
- 211 008d 93000000             .4byte  0x93\r
- 212 0091 3F                   .byte   0x3f\r
- 213 0092 00                   .byte   0\r
- 214 0093 02                   .uleb128 0x2\r
- 215 0094 04                   .byte   0x4\r
- 216 0095 07                   .byte   0x7\r
- 217 0096 1B010000             .4byte  .LASF12\r
- 218 009a 07                   .uleb128 0x7\r
- 219 009b 26000000             .4byte  .LASF13\r
- 220 009f 01                   .byte   0x1\r
- 221 00a0 1C                   .byte   0x1c\r
- 222 00a1 AC000000             .4byte  0xac\r
- 223 00a5 01                   .byte   0x1\r
- 224 00a6 05                   .byte   0x5\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 5\r
-\r
-\r
- 225 00a7 03                   .byte   0x3\r
- 226 00a8 00000000             .4byte  cy_meta_loader\r
- 227 00ac 08                   .uleb128 0x8\r
- 228 00ad 83000000             .4byte  0x83\r
- 229 00b1 05                   .uleb128 0x5\r
- 230 00b2 63000000             .4byte  0x63\r
- 231 00b6 C1000000             .4byte  0xc1\r
- 232 00ba 06                   .uleb128 0x6\r
- 233 00bb 93000000             .4byte  0x93\r
- 234 00bf 00                   .byte   0\r
- 235 00c0 00                   .byte   0\r
- 236 00c1 07                   .uleb128 0x7\r
- 237 00c2 C2000000             .4byte  .LASF14\r
- 238 00c6 01                   .byte   0x1\r
- 239 00c7 2E                   .byte   0x2e\r
- 240 00c8 D3000000             .4byte  0xd3\r
- 241 00cc 01                   .byte   0x1\r
- 242 00cd 05                   .byte   0x5\r
- 243 00ce 03                   .byte   0x3\r
- 244 00cf 00000000             .4byte  cy_meta_configecc\r
- 245 00d3 08                   .uleb128 0x8\r
- 246 00d4 B1000000             .4byte  0xb1\r
- 247 00d8 05                   .uleb128 0x5\r
- 248 00d9 63000000             .4byte  0x63\r
- 249 00dd E8000000             .4byte  0xe8\r
- 250 00e1 06                   .uleb128 0x6\r
- 251 00e2 93000000             .4byte  0x93\r
- 252 00e6 03                   .byte   0x3\r
- 253 00e7 00                   .byte   0\r
- 254 00e8 07                   .uleb128 0x7\r
- 255 00e9 B2000000             .4byte  .LASF15\r
- 256 00ed 01                   .byte   0x1\r
- 257 00ee 39                   .byte   0x39\r
- 258 00ef FA000000             .4byte  0xfa\r
- 259 00f3 01                   .byte   0x1\r
- 260 00f4 05                   .byte   0x5\r
- 261 00f5 03                   .byte   0x3\r
- 262 00f6 00000000             .4byte  cy_meta_custnvl\r
- 263 00fa 08                   .uleb128 0x8\r
- 264 00fb D8000000             .4byte  0xd8\r
- 265 00ff 07                   .uleb128 0x7\r
- 266 0100 0D010000             .4byte  .LASF16\r
- 267 0104 01                   .byte   0x1\r
- 268 0105 44                   .byte   0x44\r
- 269 0106 11010000             .4byte  0x111\r
- 270 010a 01                   .byte   0x1\r
- 271 010b 05                   .byte   0x5\r
- 272 010c 03                   .byte   0x3\r
- 273 010d 00000000             .4byte  cy_meta_wonvl\r
- 274 0111 08                   .uleb128 0x8\r
- 275 0112 D8000000             .4byte  0xd8\r
- 276 0116 05                   .uleb128 0x5\r
- 277 0117 63000000             .4byte  0x63\r
- 278 011b 26010000             .4byte  0x126\r
- 279 011f 06                   .uleb128 0x6\r
- 280 0120 93000000             .4byte  0x93\r
- 281 0124 7F                   .byte   0x7f\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 6\r
-\r
-\r
- 282 0125 00                   .byte   0\r
- 283 0126 07                   .uleb128 0x7\r
- 284 0127 F8000000             .4byte  .LASF17\r
- 285 012b 01                   .byte   0x1\r
- 286 012c 4F                   .byte   0x4f\r
- 287 012d 38010000             .4byte  0x138\r
- 288 0131 01                   .byte   0x1\r
- 289 0132 05                   .byte   0x5\r
- 290 0133 03                   .byte   0x3\r
- 291 0134 00000000             .4byte  cy_meta_flashprotect\r
- 292 0138 08                   .uleb128 0x8\r
- 293 0139 16010000             .4byte  0x116\r
- 294 013d 05                   .uleb128 0x5\r
- 295 013e 63000000             .4byte  0x63\r
- 296 0142 4D010000             .4byte  0x14d\r
- 297 0146 06                   .uleb128 0x6\r
- 298 0147 93000000             .4byte  0x93\r
- 299 014b 0B                   .byte   0xb\r
- 300 014c 00                   .byte   0\r
- 301 014d 07                   .uleb128 0x7\r
- 302 014e 35000000             .4byte  .LASF18\r
- 303 0152 01                   .byte   0x1\r
- 304 0153 69                   .byte   0x69\r
- 305 0154 5F010000             .4byte  0x15f\r
- 306 0158 01                   .byte   0x1\r
- 307 0159 05                   .byte   0x5\r
- 308 015a 03                   .byte   0x3\r
- 309 015b 00000000             .4byte  cy_metadata\r
- 310 015f 08                   .uleb128 0x8\r
- 311 0160 3D010000             .4byte  0x13d\r
- 312 0164 00                   .byte   0\r
- 313                           .section        .debug_abbrev,"",%progbits\r
- 314                   .Ldebug_abbrev0:\r
- 315 0000 01                   .uleb128 0x1\r
- 316 0001 11                   .uleb128 0x11\r
- 317 0002 01                   .byte   0x1\r
- 318 0003 25                   .uleb128 0x25\r
- 319 0004 0E                   .uleb128 0xe\r
- 320 0005 13                   .uleb128 0x13\r
- 321 0006 0B                   .uleb128 0xb\r
- 322 0007 03                   .uleb128 0x3\r
- 323 0008 0E                   .uleb128 0xe\r
- 324 0009 1B                   .uleb128 0x1b\r
- 325 000a 0E                   .uleb128 0xe\r
- 326 000b 10                   .uleb128 0x10\r
- 327 000c 06                   .uleb128 0x6\r
- 328 000d 00                   .byte   0\r
- 329 000e 00                   .byte   0\r
- 330 000f 02                   .uleb128 0x2\r
- 331 0010 24                   .uleb128 0x24\r
- 332 0011 00                   .byte   0\r
- 333 0012 0B                   .uleb128 0xb\r
- 334 0013 0B                   .uleb128 0xb\r
- 335 0014 3E                   .uleb128 0x3e\r
- 336 0015 0B                   .uleb128 0xb\r
- 337 0016 03                   .uleb128 0x3\r
- 338 0017 0E                   .uleb128 0xe\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 7\r
-\r
-\r
- 339 0018 00                   .byte   0\r
- 340 0019 00                   .byte   0\r
- 341 001a 03                   .uleb128 0x3\r
- 342 001b 24                   .uleb128 0x24\r
- 343 001c 00                   .byte   0\r
- 344 001d 0B                   .uleb128 0xb\r
- 345 001e 0B                   .uleb128 0xb\r
- 346 001f 3E                   .uleb128 0x3e\r
- 347 0020 0B                   .uleb128 0xb\r
- 348 0021 03                   .uleb128 0x3\r
- 349 0022 08                   .uleb128 0x8\r
- 350 0023 00                   .byte   0\r
- 351 0024 00                   .byte   0\r
- 352 0025 04                   .uleb128 0x4\r
- 353 0026 16                   .uleb128 0x16\r
- 354 0027 00                   .byte   0\r
- 355 0028 03                   .uleb128 0x3\r
- 356 0029 0E                   .uleb128 0xe\r
- 357 002a 3A                   .uleb128 0x3a\r
- 358 002b 0B                   .uleb128 0xb\r
- 359 002c 3B                   .uleb128 0x3b\r
- 360 002d 0B                   .uleb128 0xb\r
- 361 002e 49                   .uleb128 0x49\r
- 362 002f 13                   .uleb128 0x13\r
- 363 0030 00                   .byte   0\r
- 364 0031 00                   .byte   0\r
- 365 0032 05                   .uleb128 0x5\r
- 366 0033 01                   .uleb128 0x1\r
- 367 0034 01                   .byte   0x1\r
- 368 0035 49                   .uleb128 0x49\r
- 369 0036 13                   .uleb128 0x13\r
- 370 0037 01                   .uleb128 0x1\r
- 371 0038 13                   .uleb128 0x13\r
- 372 0039 00                   .byte   0\r
- 373 003a 00                   .byte   0\r
- 374 003b 06                   .uleb128 0x6\r
- 375 003c 21                   .uleb128 0x21\r
- 376 003d 00                   .byte   0\r
- 377 003e 49                   .uleb128 0x49\r
- 378 003f 13                   .uleb128 0x13\r
- 379 0040 2F                   .uleb128 0x2f\r
- 380 0041 0B                   .uleb128 0xb\r
- 381 0042 00                   .byte   0\r
- 382 0043 00                   .byte   0\r
- 383 0044 07                   .uleb128 0x7\r
- 384 0045 34                   .uleb128 0x34\r
- 385 0046 00                   .byte   0\r
- 386 0047 03                   .uleb128 0x3\r
- 387 0048 0E                   .uleb128 0xe\r
- 388 0049 3A                   .uleb128 0x3a\r
- 389 004a 0B                   .uleb128 0xb\r
- 390 004b 3B                   .uleb128 0x3b\r
- 391 004c 0B                   .uleb128 0xb\r
- 392 004d 49                   .uleb128 0x49\r
- 393 004e 13                   .uleb128 0x13\r
- 394 004f 3F                   .uleb128 0x3f\r
- 395 0050 0C                   .uleb128 0xc\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 8\r
-\r
-\r
- 396 0051 02                   .uleb128 0x2\r
- 397 0052 0A                   .uleb128 0xa\r
- 398 0053 00                   .byte   0\r
- 399 0054 00                   .byte   0\r
- 400 0055 08                   .uleb128 0x8\r
- 401 0056 26                   .uleb128 0x26\r
- 402 0057 00                   .byte   0\r
- 403 0058 49                   .uleb128 0x49\r
- 404 0059 13                   .uleb128 0x13\r
- 405 005a 00                   .byte   0\r
- 406 005b 00                   .byte   0\r
- 407 005c 00                   .byte   0\r
- 408                           .section        .debug_aranges,"",%progbits\r
- 409 0000 14000000             .4byte  0x14\r
- 410 0004 0200                 .2byte  0x2\r
- 411 0006 00000000             .4byte  .Ldebug_info0\r
- 412 000a 04                   .byte   0x4\r
- 413 000b 00                   .byte   0\r
- 414 000c 0000                 .2byte  0\r
- 415 000e 0000                 .2byte  0\r
- 416 0010 00000000             .4byte  0\r
- 417 0014 00000000             .4byte  0\r
- 418                           .section        .debug_line,"",%progbits\r
- 419                   .Ldebug_line0:\r
- 420 0000 4F000000             .section        .debug_str,"MS",%progbits,1\r
- 420      02004900 \r
- 420      00000201 \r
- 420      FB0E0D00 \r
- 420      01010101 \r
- 421                   .LASF20:\r
- 422 0000 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\cymetadata.c\000"\r
- 422      6E657261 \r
- 422      7465645F \r
- 422      536F7572 \r
- 422      63655C50 \r
- 423                   .LASF13:\r
- 424 0026 63795F6D             .ascii  "cy_meta_loader\000"\r
- 424      6574615F \r
- 424      6C6F6164 \r
- 424      657200\r
- 425                   .LASF18:\r
- 426 0035 63795F6D             .ascii  "cy_metadata\000"\r
- 426      65746164 \r
- 426      61746100 \r
- 427                   .LASF9:\r
- 428 0041 666C6F61             .ascii  "float\000"\r
- 428      7400\r
- 429                   .LASF1:\r
- 430 0047 756E7369             .ascii  "unsigned char\000"\r
- 430      676E6564 \r
- 430      20636861 \r
- 430      7200\r
- 431                   .LASF5:\r
- 432 0055 6C6F6E67             .ascii  "long unsigned int\000"\r
- 432      20756E73 \r
- 432      69676E65 \r
- 432      6420696E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 9\r
-\r
-\r
- 432      7400\r
- 433                   .LASF21:\r
- 434 0067 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 434      43534932 \r
- 434      53445C73 \r
- 434      6F667477 \r
- 434      6172655C \r
- 435 0096 6E00                 .ascii  "n\000"\r
- 436                   .LASF3:\r
- 437 0098 73686F72             .ascii  "short unsigned int\000"\r
- 437      7420756E \r
- 437      7369676E \r
- 437      65642069 \r
- 437      6E7400\r
- 438                   .LASF10:\r
- 439 00ab 646F7562             .ascii  "double\000"\r
- 439      6C6500\r
- 440                   .LASF15:\r
- 441 00b2 63795F6D             .ascii  "cy_meta_custnvl\000"\r
- 441      6574615F \r
- 441      63757374 \r
- 441      6E766C00 \r
- 442                   .LASF14:\r
- 443 00c2 63795F6D             .ascii  "cy_meta_configecc\000"\r
- 443      6574615F \r
- 443      636F6E66 \r
- 443      69676563 \r
- 443      6300\r
- 444                   .LASF8:\r
- 445 00d4 756E7369             .ascii  "unsigned int\000"\r
- 445      676E6564 \r
- 445      20696E74 \r
- 445      00\r
- 446                   .LASF7:\r
- 447 00e1 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 447      206C6F6E \r
- 447      6720756E \r
- 447      7369676E \r
- 447      65642069 \r
- 448                   .LASF17:\r
- 449 00f8 63795F6D             .ascii  "cy_meta_flashprotect\000"\r
- 449      6574615F \r
- 449      666C6173 \r
- 449      6870726F \r
- 449      74656374 \r
- 450                   .LASF16:\r
- 451 010d 63795F6D             .ascii  "cy_meta_wonvl\000"\r
- 451      6574615F \r
- 451      776F6E76 \r
- 451      6C00\r
- 452                   .LASF12:\r
- 453 011b 73697A65             .ascii  "sizetype\000"\r
- 453      74797065 \r
- 453      00\r
- 454                   .LASF6:\r
- 455 0124 6C6F6E67             .ascii  "long long int\000"\r
- 455      206C6F6E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cc5i4OkO.s                      page 10\r
-\r
-\r
- 455      6720696E \r
- 455      7400\r
- 456                   .LASF11:\r
- 457 0132 63686172             .ascii  "char\000"\r
- 457      00\r
- 458                   .LASF2:\r
- 459 0137 73686F72             .ascii  "short int\000"\r
- 459      7420696E \r
- 459      7400\r
- 460                   .LASF22:\r
- 461 0141 75696E74             .ascii  "uint8\000"\r
- 461      3800\r
- 462                   .LASF19:\r
- 463 0147 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 463      4320342E \r
- 463      372E3320 \r
- 463      32303133 \r
- 463      30333132 \r
- 464 017a 616E6368             .ascii  "anch revision 196615]\000"\r
- 464      20726576 \r
- 464      6973696F \r
- 464      6E203139 \r
- 464      36363135 \r
- 465                   .LASF4:\r
- 466 0190 6C6F6E67             .ascii  "long int\000"\r
- 466      20696E74 \r
- 466      00\r
- 467                   .LASF0:\r
- 468 0199 7369676E             .ascii  "signed char\000"\r
- 468      65642063 \r
- 468      68617200 \r
- 469                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.o
deleted file mode 100755 (executable)
index de807a7..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cymetadata.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.lst
deleted file mode 100755 (executable)
index 67d24f3..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.lst
+++ /dev/null
@@ -1,532 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "cyutils.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.CySetReg24,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global CySetReg24\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   CySetReg24, %function\r
-  24                   CySetReg24:\r
-  25                   .LFB0:\r
-  26                           .file 1 ".\\Generated_Source\\PSoC5\\cyutils.c"\r
-   1:.\Generated_Source\PSoC5/cyutils.c **** /*******************************************************************************\r
-   2:.\Generated_Source\PSoC5/cyutils.c **** * FILENAME: cyutils.c\r
-   3:.\Generated_Source\PSoC5/cyutils.c **** * Version 4.0\r
-   4:.\Generated_Source\PSoC5/cyutils.c **** *\r
-   5:.\Generated_Source\PSoC5/cyutils.c **** *  Description:\r
-   6:.\Generated_Source\PSoC5/cyutils.c **** *   CyUtils provides function to handle 24-bit value writes.\r
-   7:.\Generated_Source\PSoC5/cyutils.c **** *\r
-   8:.\Generated_Source\PSoC5/cyutils.c **** ********************************************************************************\r
-   9:.\Generated_Source\PSoC5/cyutils.c **** * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-  10:.\Generated_Source\PSoC5/cyutils.c **** * You may use this file only in accordance with the license, terms, conditions,\r
-  11:.\Generated_Source\PSoC5/cyutils.c **** * disclaimers, and limitations in the end user license agreement accompanying\r
-  12:.\Generated_Source\PSoC5/cyutils.c **** * the software package with which this file was provided.\r
-  13:.\Generated_Source\PSoC5/cyutils.c **** *******************************************************************************/\r
-  14:.\Generated_Source\PSoC5/cyutils.c **** \r
-  15:.\Generated_Source\PSoC5/cyutils.c **** #include "cytypes.h"\r
-  16:.\Generated_Source\PSoC5/cyutils.c **** \r
-  17:.\Generated_Source\PSoC5/cyutils.c **** #if (!CY_PSOC3)\r
-  18:.\Generated_Source\PSoC5/cyutils.c **** \r
-  19:.\Generated_Source\PSoC5/cyutils.c ****     /***************************************************************************\r
-  20:.\Generated_Source\PSoC5/cyutils.c ****     * Function Name: CySetReg24\r
-  21:.\Generated_Source\PSoC5/cyutils.c ****     ****************************************************************************\r
-  22:.\Generated_Source\PSoC5/cyutils.c ****     *\r
-  23:.\Generated_Source\PSoC5/cyutils.c ****     * Summary:\r
-  24:.\Generated_Source\PSoC5/cyutils.c ****     *  Writes the 24-bit value to the specified register.\r
-  25:.\Generated_Source\PSoC5/cyutils.c ****     *\r
-  26:.\Generated_Source\PSoC5/cyutils.c ****     * Parameters:\r
-  27:.\Generated_Source\PSoC5/cyutils.c ****     *  addr : adress where data must be written\r
-  28:.\Generated_Source\PSoC5/cyutils.c ****     *  value: data that must be written\r
-  29:.\Generated_Source\PSoC5/cyutils.c ****     *\r
-  30:.\Generated_Source\PSoC5/cyutils.c ****     * Return:\r
-  31:.\Generated_Source\PSoC5/cyutils.c ****     *  None\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 2\r
-\r
-\r
-  32:.\Generated_Source\PSoC5/cyutils.c ****     *\r
-  33:.\Generated_Source\PSoC5/cyutils.c ****     * Reentrant:\r
-  34:.\Generated_Source\PSoC5/cyutils.c ****     *  No\r
-  35:.\Generated_Source\PSoC5/cyutils.c ****     *\r
-  36:.\Generated_Source\PSoC5/cyutils.c ****     ***************************************************************************/\r
-  37:.\Generated_Source\PSoC5/cyutils.c ****     void CySetReg24(uint32 volatile * addr, uint32 value)\r
-  38:.\Generated_Source\PSoC5/cyutils.c ****     {\r
-  27                           .loc 1 38 0\r
-  28                           .cfi_startproc\r
-  29                           @ args = 0, pretend = 0, frame = 0\r
-  30                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  31                           @ link register save eliminated.\r
-  32                   .LVL0:\r
-  39:.\Generated_Source\PSoC5/cyutils.c ****         uint8 volatile *tmpAddr;\r
-  40:.\Generated_Source\PSoC5/cyutils.c **** \r
-  41:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr = (uint8 volatile *) addr;\r
-  42:.\Generated_Source\PSoC5/cyutils.c **** \r
-  43:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr[0u] = (uint8) value;\r
-  33                           .loc 1 43 0\r
-  34 0000 CBB2                 uxtb    r3, r1\r
-  44:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr[1u] = (uint8) (value >> 8u);\r
-  35                           .loc 1 44 0\r
-  36 0002 C1F30722             ubfx    r2, r1, #8, #8\r
-  45:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr[2u] = (uint8) (value >> 16u);\r
-  37                           .loc 1 45 0\r
-  38 0006 C1F30741             ubfx    r1, r1, #16, #8\r
-  39                   .LVL1:\r
-  43:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr[0u] = (uint8) value;\r
-  40                           .loc 1 43 0\r
-  41 000a 0370                 strb    r3, [r0, #0]\r
-  44:.\Generated_Source\PSoC5/cyutils.c ****         tmpAddr[1u] = (uint8) (value >> 8u);\r
-  42                           .loc 1 44 0\r
-  43 000c 4270                 strb    r2, [r0, #1]\r
-  44                           .loc 1 45 0\r
-  45 000e 8170                 strb    r1, [r0, #2]\r
-  46 0010 7047                 bx      lr\r
-  47                           .cfi_endproc\r
-  48                   .LFE0:\r
-  49                           .size   CySetReg24, .-CySetReg24\r
-  50                           .text\r
-  51                   .Letext0:\r
-  52                           .file 2 ".\\Generated_Source\\PSoC5\\cytypes.h"\r
-  53                           .section        .debug_info,"",%progbits\r
-  54                   .Ldebug_info0:\r
-  55 0000 F0000000             .4byte  0xf0\r
-  56 0004 0200                 .2byte  0x2\r
-  57 0006 00000000             .4byte  .Ldebug_abbrev0\r
-  58 000a 04                   .byte   0x4\r
-  59 000b 01                   .uleb128 0x1\r
-  60 000c 00010000             .4byte  .LASF16\r
-  61 0010 01                   .byte   0x1\r
-  62 0011 06000000             .4byte  .LASF17\r
-  63 0015 67000000             .4byte  .LASF18\r
-  64 0019 00000000             .4byte  .Ldebug_ranges0+0\r
-  65 001d 00000000             .4byte  0\r
-  66 0021 00000000             .4byte  0\r
-  67 0025 00000000             .4byte  .Ldebug_line0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 3\r
-\r
-\r
-  68 0029 02                   .uleb128 0x2\r
-  69 002a 01                   .byte   0x1\r
-  70 002b 06                   .byte   0x6\r
-  71 002c 52010000             .4byte  .LASF0\r
-  72 0030 02                   .uleb128 0x2\r
-  73 0031 01                   .byte   0x1\r
-  74 0032 08                   .byte   0x8\r
-  75 0033 3F000000             .4byte  .LASF1\r
-  76 0037 02                   .uleb128 0x2\r
-  77 0038 02                   .byte   0x2\r
-  78 0039 05                   .byte   0x5\r
-  79 003a F0000000             .4byte  .LASF2\r
-  80 003e 02                   .uleb128 0x2\r
-  81 003f 02                   .byte   0x2\r
-  82 0040 07                   .byte   0x7\r
-  83 0041 98000000             .4byte  .LASF3\r
-  84 0045 02                   .uleb128 0x2\r
-  85 0046 04                   .byte   0x4\r
-  86 0047 05                   .byte   0x5\r
-  87 0048 49010000             .4byte  .LASF4\r
-  88 004c 02                   .uleb128 0x2\r
-  89 004d 04                   .byte   0x4\r
-  90 004e 07                   .byte   0x7\r
-  91 004f 55000000             .4byte  .LASF5\r
-  92 0053 02                   .uleb128 0x2\r
-  93 0054 08                   .byte   0x8\r
-  94 0055 05                   .byte   0x5\r
-  95 0056 DD000000             .4byte  .LASF6\r
-  96 005a 02                   .uleb128 0x2\r
-  97 005b 08                   .byte   0x8\r
-  98 005c 07                   .byte   0x7\r
-  99 005d C6000000             .4byte  .LASF7\r
- 100 0061 03                   .uleb128 0x3\r
- 101 0062 04                   .byte   0x4\r
- 102 0063 05                   .byte   0x5\r
- 103 0064 696E7400             .ascii  "int\000"\r
- 104 0068 02                   .uleb128 0x2\r
- 105 0069 04                   .byte   0x4\r
- 106 006a 07                   .byte   0x7\r
- 107 006b B9000000             .4byte  .LASF8\r
- 108 006f 04                   .uleb128 0x4\r
- 109 0070 FA000000             .4byte  .LASF9\r
- 110 0074 02                   .byte   0x2\r
- 111 0075 5B                   .byte   0x5b\r
- 112 0076 30000000             .4byte  0x30\r
- 113 007a 04                   .uleb128 0x4\r
- 114 007b B2000000             .4byte  .LASF10\r
- 115 007f 02                   .byte   0x2\r
- 116 0080 5D                   .byte   0x5d\r
- 117 0081 4C000000             .4byte  0x4c\r
- 118 0085 02                   .uleb128 0x2\r
- 119 0086 04                   .byte   0x4\r
- 120 0087 04                   .byte   0x4\r
- 121 0088 39000000             .4byte  .LASF11\r
- 122 008c 02                   .uleb128 0x2\r
- 123 008d 08                   .byte   0x8\r
- 124 008e 04                   .byte   0x4\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 4\r
-\r
-\r
- 125 008f AB000000             .4byte  .LASF12\r
- 126 0093 02                   .uleb128 0x2\r
- 127 0094 01                   .byte   0x1\r
- 128 0095 08                   .byte   0x8\r
- 129 0096 EB000000             .4byte  .LASF13\r
- 130 009a 05                   .uleb128 0x5\r
- 131 009b 6F000000             .4byte  0x6f\r
- 132 009f 05                   .uleb128 0x5\r
- 133 00a0 7A000000             .4byte  0x7a\r
- 134 00a4 06                   .uleb128 0x6\r
- 135 00a5 01                   .byte   0x1\r
- 136 00a6 29000000             .4byte  .LASF19\r
- 137 00aa 01                   .byte   0x1\r
- 138 00ab 25                   .byte   0x25\r
- 139 00ac 01                   .byte   0x1\r
- 140 00ad 00000000             .4byte  .LFB0\r
- 141 00b1 12000000             .4byte  .LFE0\r
- 142 00b5 02                   .byte   0x2\r
- 143 00b6 7D                   .byte   0x7d\r
- 144 00b7 00                   .sleb128 0\r
- 145 00b8 01                   .byte   0x1\r
- 146 00b9 E7000000             .4byte  0xe7\r
- 147 00bd 07                   .uleb128 0x7\r
- 148 00be 34000000             .4byte  .LASF14\r
- 149 00c2 01                   .byte   0x1\r
- 150 00c3 25                   .byte   0x25\r
- 151 00c4 E7000000             .4byte  0xe7\r
- 152 00c8 01                   .byte   0x1\r
- 153 00c9 50                   .byte   0x50\r
- 154 00ca 08                   .uleb128 0x8\r
- 155 00cb 00000000             .4byte  .LASF15\r
- 156 00cf 01                   .byte   0x1\r
- 157 00d0 25                   .byte   0x25\r
- 158 00d1 7A000000             .4byte  0x7a\r
- 159 00d5 00000000             .4byte  .LLST0\r
- 160 00d9 09                   .uleb128 0x9\r
- 161 00da 4D000000             .4byte  .LASF20\r
- 162 00de 01                   .byte   0x1\r
- 163 00df 27                   .byte   0x27\r
- 164 00e0 ED000000             .4byte  0xed\r
- 165 00e4 01                   .byte   0x1\r
- 166 00e5 50                   .byte   0x50\r
- 167 00e6 00                   .byte   0\r
- 168 00e7 0A                   .uleb128 0xa\r
- 169 00e8 04                   .byte   0x4\r
- 170 00e9 9F000000             .4byte  0x9f\r
- 171 00ed 0A                   .uleb128 0xa\r
- 172 00ee 04                   .byte   0x4\r
- 173 00ef 9A000000             .4byte  0x9a\r
- 174 00f3 00                   .byte   0\r
- 175                           .section        .debug_abbrev,"",%progbits\r
- 176                   .Ldebug_abbrev0:\r
- 177 0000 01                   .uleb128 0x1\r
- 178 0001 11                   .uleb128 0x11\r
- 179 0002 01                   .byte   0x1\r
- 180 0003 25                   .uleb128 0x25\r
- 181 0004 0E                   .uleb128 0xe\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 5\r
-\r
-\r
- 182 0005 13                   .uleb128 0x13\r
- 183 0006 0B                   .uleb128 0xb\r
- 184 0007 03                   .uleb128 0x3\r
- 185 0008 0E                   .uleb128 0xe\r
- 186 0009 1B                   .uleb128 0x1b\r
- 187 000a 0E                   .uleb128 0xe\r
- 188 000b 55                   .uleb128 0x55\r
- 189 000c 06                   .uleb128 0x6\r
- 190 000d 11                   .uleb128 0x11\r
- 191 000e 01                   .uleb128 0x1\r
- 192 000f 52                   .uleb128 0x52\r
- 193 0010 01                   .uleb128 0x1\r
- 194 0011 10                   .uleb128 0x10\r
- 195 0012 06                   .uleb128 0x6\r
- 196 0013 00                   .byte   0\r
- 197 0014 00                   .byte   0\r
- 198 0015 02                   .uleb128 0x2\r
- 199 0016 24                   .uleb128 0x24\r
- 200 0017 00                   .byte   0\r
- 201 0018 0B                   .uleb128 0xb\r
- 202 0019 0B                   .uleb128 0xb\r
- 203 001a 3E                   .uleb128 0x3e\r
- 204 001b 0B                   .uleb128 0xb\r
- 205 001c 03                   .uleb128 0x3\r
- 206 001d 0E                   .uleb128 0xe\r
- 207 001e 00                   .byte   0\r
- 208 001f 00                   .byte   0\r
- 209 0020 03                   .uleb128 0x3\r
- 210 0021 24                   .uleb128 0x24\r
- 211 0022 00                   .byte   0\r
- 212 0023 0B                   .uleb128 0xb\r
- 213 0024 0B                   .uleb128 0xb\r
- 214 0025 3E                   .uleb128 0x3e\r
- 215 0026 0B                   .uleb128 0xb\r
- 216 0027 03                   .uleb128 0x3\r
- 217 0028 08                   .uleb128 0x8\r
- 218 0029 00                   .byte   0\r
- 219 002a 00                   .byte   0\r
- 220 002b 04                   .uleb128 0x4\r
- 221 002c 16                   .uleb128 0x16\r
- 222 002d 00                   .byte   0\r
- 223 002e 03                   .uleb128 0x3\r
- 224 002f 0E                   .uleb128 0xe\r
- 225 0030 3A                   .uleb128 0x3a\r
- 226 0031 0B                   .uleb128 0xb\r
- 227 0032 3B                   .uleb128 0x3b\r
- 228 0033 0B                   .uleb128 0xb\r
- 229 0034 49                   .uleb128 0x49\r
- 230 0035 13                   .uleb128 0x13\r
- 231 0036 00                   .byte   0\r
- 232 0037 00                   .byte   0\r
- 233 0038 05                   .uleb128 0x5\r
- 234 0039 35                   .uleb128 0x35\r
- 235 003a 00                   .byte   0\r
- 236 003b 49                   .uleb128 0x49\r
- 237 003c 13                   .uleb128 0x13\r
- 238 003d 00                   .byte   0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 6\r
-\r
-\r
- 239 003e 00                   .byte   0\r
- 240 003f 06                   .uleb128 0x6\r
- 241 0040 2E                   .uleb128 0x2e\r
- 242 0041 01                   .byte   0x1\r
- 243 0042 3F                   .uleb128 0x3f\r
- 244 0043 0C                   .uleb128 0xc\r
- 245 0044 03                   .uleb128 0x3\r
- 246 0045 0E                   .uleb128 0xe\r
- 247 0046 3A                   .uleb128 0x3a\r
- 248 0047 0B                   .uleb128 0xb\r
- 249 0048 3B                   .uleb128 0x3b\r
- 250 0049 0B                   .uleb128 0xb\r
- 251 004a 27                   .uleb128 0x27\r
- 252 004b 0C                   .uleb128 0xc\r
- 253 004c 11                   .uleb128 0x11\r
- 254 004d 01                   .uleb128 0x1\r
- 255 004e 12                   .uleb128 0x12\r
- 256 004f 01                   .uleb128 0x1\r
- 257 0050 40                   .uleb128 0x40\r
- 258 0051 0A                   .uleb128 0xa\r
- 259 0052 9742                 .uleb128 0x2117\r
- 260 0054 0C                   .uleb128 0xc\r
- 261 0055 01                   .uleb128 0x1\r
- 262 0056 13                   .uleb128 0x13\r
- 263 0057 00                   .byte   0\r
- 264 0058 00                   .byte   0\r
- 265 0059 07                   .uleb128 0x7\r
- 266 005a 05                   .uleb128 0x5\r
- 267 005b 00                   .byte   0\r
- 268 005c 03                   .uleb128 0x3\r
- 269 005d 0E                   .uleb128 0xe\r
- 270 005e 3A                   .uleb128 0x3a\r
- 271 005f 0B                   .uleb128 0xb\r
- 272 0060 3B                   .uleb128 0x3b\r
- 273 0061 0B                   .uleb128 0xb\r
- 274 0062 49                   .uleb128 0x49\r
- 275 0063 13                   .uleb128 0x13\r
- 276 0064 02                   .uleb128 0x2\r
- 277 0065 0A                   .uleb128 0xa\r
- 278 0066 00                   .byte   0\r
- 279 0067 00                   .byte   0\r
- 280 0068 08                   .uleb128 0x8\r
- 281 0069 05                   .uleb128 0x5\r
- 282 006a 00                   .byte   0\r
- 283 006b 03                   .uleb128 0x3\r
- 284 006c 0E                   .uleb128 0xe\r
- 285 006d 3A                   .uleb128 0x3a\r
- 286 006e 0B                   .uleb128 0xb\r
- 287 006f 3B                   .uleb128 0x3b\r
- 288 0070 0B                   .uleb128 0xb\r
- 289 0071 49                   .uleb128 0x49\r
- 290 0072 13                   .uleb128 0x13\r
- 291 0073 02                   .uleb128 0x2\r
- 292 0074 06                   .uleb128 0x6\r
- 293 0075 00                   .byte   0\r
- 294 0076 00                   .byte   0\r
- 295 0077 09                   .uleb128 0x9\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 7\r
-\r
-\r
- 296 0078 34                   .uleb128 0x34\r
- 297 0079 00                   .byte   0\r
- 298 007a 03                   .uleb128 0x3\r
- 299 007b 0E                   .uleb128 0xe\r
- 300 007c 3A                   .uleb128 0x3a\r
- 301 007d 0B                   .uleb128 0xb\r
- 302 007e 3B                   .uleb128 0x3b\r
- 303 007f 0B                   .uleb128 0xb\r
- 304 0080 49                   .uleb128 0x49\r
- 305 0081 13                   .uleb128 0x13\r
- 306 0082 02                   .uleb128 0x2\r
- 307 0083 0A                   .uleb128 0xa\r
- 308 0084 00                   .byte   0\r
- 309 0085 00                   .byte   0\r
- 310 0086 0A                   .uleb128 0xa\r
- 311 0087 0F                   .uleb128 0xf\r
- 312 0088 00                   .byte   0\r
- 313 0089 0B                   .uleb128 0xb\r
- 314 008a 0B                   .uleb128 0xb\r
- 315 008b 49                   .uleb128 0x49\r
- 316 008c 13                   .uleb128 0x13\r
- 317 008d 00                   .byte   0\r
- 318 008e 00                   .byte   0\r
- 319 008f 00                   .byte   0\r
- 320                           .section        .debug_loc,"",%progbits\r
- 321                   .Ldebug_loc0:\r
- 322                   .LLST0:\r
- 323 0000 00000000             .4byte  .LVL0\r
- 324 0004 0A000000             .4byte  .LVL1\r
- 325 0008 0100                 .2byte  0x1\r
- 326 000a 51                   .byte   0x51\r
- 327 000b 0A000000             .4byte  .LVL1\r
- 328 000f 12000000             .4byte  .LFE0\r
- 329 0013 0400                 .2byte  0x4\r
- 330 0015 F3                   .byte   0xf3\r
- 331 0016 01                   .uleb128 0x1\r
- 332 0017 51                   .byte   0x51\r
- 333 0018 9F                   .byte   0x9f\r
- 334 0019 00000000             .4byte  0\r
- 335 001d 00000000             .4byte  0\r
- 336                           .section        .debug_aranges,"",%progbits\r
- 337 0000 1C000000             .4byte  0x1c\r
- 338 0004 0200                 .2byte  0x2\r
- 339 0006 00000000             .4byte  .Ldebug_info0\r
- 340 000a 04                   .byte   0x4\r
- 341 000b 00                   .byte   0\r
- 342 000c 0000                 .2byte  0\r
- 343 000e 0000                 .2byte  0\r
- 344 0010 00000000             .4byte  .LFB0\r
- 345 0014 12000000             .4byte  .LFE0-.LFB0\r
- 346 0018 00000000             .4byte  0\r
- 347 001c 00000000             .4byte  0\r
- 348                           .section        .debug_ranges,"",%progbits\r
- 349                   .Ldebug_ranges0:\r
- 350 0000 00000000             .4byte  .LFB0\r
- 351 0004 12000000             .4byte  .LFE0\r
- 352 0008 00000000             .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 8\r
-\r
-\r
- 353 000c 00000000             .4byte  0\r
- 354                           .section        .debug_line,"",%progbits\r
- 355                   .Ldebug_line0:\r
- 356 0000 61000000             .section        .debug_str,"MS",%progbits,1\r
- 356      02004600 \r
- 356      00000201 \r
- 356      FB0E0D00 \r
- 356      01010101 \r
- 357                   .LASF15:\r
- 358 0000 76616C75             .ascii  "value\000"\r
- 358      6500\r
- 359                   .LASF17:\r
- 360 0006 2E5C4765             .ascii  ".\\Generated_Source\\PSoC5\\cyutils.c\000"\r
- 360      6E657261 \r
- 360      7465645F \r
- 360      536F7572 \r
- 360      63655C50 \r
- 361                   .LASF19:\r
- 362 0029 43795365             .ascii  "CySetReg24\000"\r
- 362      74526567 \r
- 362      323400\r
- 363                   .LASF14:\r
- 364 0034 61646472             .ascii  "addr\000"\r
- 364      00\r
- 365                   .LASF11:\r
- 366 0039 666C6F61             .ascii  "float\000"\r
- 366      7400\r
- 367                   .LASF1:\r
- 368 003f 756E7369             .ascii  "unsigned char\000"\r
- 368      676E6564 \r
- 368      20636861 \r
- 368      7200\r
- 369                   .LASF20:\r
- 370 004d 746D7041             .ascii  "tmpAddr\000"\r
- 370      64647200 \r
- 371                   .LASF5:\r
- 372 0055 6C6F6E67             .ascii  "long unsigned int\000"\r
- 372      20756E73 \r
- 372      69676E65 \r
- 372      6420696E \r
- 372      7400\r
- 373                   .LASF18:\r
- 374 0067 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 374      43534932 \r
- 374      53445C73 \r
- 374      6F667477 \r
- 374      6172655C \r
- 375 0096 6E00                 .ascii  "n\000"\r
- 376                   .LASF3:\r
- 377 0098 73686F72             .ascii  "short unsigned int\000"\r
- 377      7420756E \r
- 377      7369676E \r
- 377      65642069 \r
- 377      6E7400\r
- 378                   .LASF12:\r
- 379 00ab 646F7562             .ascii  "double\000"\r
- 379      6C6500\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\cckTs2oT.s                      page 9\r
-\r
-\r
- 380                   .LASF10:\r
- 381 00b2 75696E74             .ascii  "uint32\000"\r
- 381      333200\r
- 382                   .LASF8:\r
- 383 00b9 756E7369             .ascii  "unsigned int\000"\r
- 383      676E6564 \r
- 383      20696E74 \r
- 383      00\r
- 384                   .LASF7:\r
- 385 00c6 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 385      206C6F6E \r
- 385      6720756E \r
- 385      7369676E \r
- 385      65642069 \r
- 386                   .LASF6:\r
- 387 00dd 6C6F6E67             .ascii  "long long int\000"\r
- 387      206C6F6E \r
- 387      6720696E \r
- 387      7400\r
- 388                   .LASF13:\r
- 389 00eb 63686172             .ascii  "char\000"\r
- 389      00\r
- 390                   .LASF2:\r
- 391 00f0 73686F72             .ascii  "short int\000"\r
- 391      7420696E \r
- 391      7400\r
- 392                   .LASF9:\r
- 393 00fa 75696E74             .ascii  "uint8\000"\r
- 393      3800\r
- 394                   .LASF16:\r
- 395 0100 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 395      4320342E \r
- 395      372E3320 \r
- 395      32303133 \r
- 395      30333132 \r
- 396 0133 616E6368             .ascii  "anch revision 196615]\000"\r
- 396      20726576 \r
- 396      6973696F \r
- 396      6E203139 \r
- 396      36363135 \r
- 397                   .LASF4:\r
- 398 0149 6C6F6E67             .ascii  "long int\000"\r
- 398      20696E74 \r
- 398      00\r
- 399                   .LASF0:\r
- 400 0152 7369676E             .ascii  "signed char\000"\r
- 400      65642063 \r
- 400      68617200 \r
- 401                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.o
deleted file mode 100755 (executable)
index 2a296c1..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/cyutils.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/library.deps b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/library.deps
deleted file mode 100755 (executable)
index 68e1bc0..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/library.deps
+++ /dev/null
@@ -1 +0,0 @@
-W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\CortexM3\ARM_GCC_473\Release\USB_Bootloader.a : .\CortexM3\ARM_GCC_473\Release\cyfitter_cfg.o .\CortexM3\ARM_GCC_473\Release\USBFS.o .\CortexM3\ARM_GCC_473\Release\USBFS_audio.o .\CortexM3\ARM_GCC_473\Release\USBFS_boot.o .\CortexM3\ARM_GCC_473\Release\USBFS_cdc.o .\CortexM3\ARM_GCC_473\Release\USBFS_cls.o .\CortexM3\ARM_GCC_473\Release\USBFS_descr.o .\CortexM3\ARM_GCC_473\Release\USBFS_drv.o .\CortexM3\ARM_GCC_473\Release\USBFS_episr.o .\CortexM3\ARM_GCC_473\Release\USBFS_hid.o .\CortexM3\ARM_GCC_473\Release\USBFS_pm.o .\CortexM3\ARM_GCC_473\Release\USBFS_std.o .\CortexM3\ARM_GCC_473\Release\USBFS_vnd.o .\CortexM3\ARM_GCC_473\Release\USBFS_midi.o .\CortexM3\ARM_GCC_473\Release\BL.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dm.o .\CortexM3\ARM_GCC_473\Release\USBFS_Dp.o .\CortexM3\ARM_GCC_473\Release\CyBootAsmGnu.o .\CortexM3\ARM_GCC_473\Release\CyDmac.o .\CortexM3\ARM_GCC_473\Release\CyFlash.o .\CortexM3\ARM_GCC_473\Release\CyLib.o .\CortexM3\ARM_GCC_473\Release\cyPm.o .\CortexM3\ARM_GCC_473\Release\CySpc.o .\CortexM3\ARM_GCC_473\Release\cyutils.o .\CortexM3\ARM_GCC_473\Release\SD_PULLUP.o\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.lst b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.lst
deleted file mode 100755 (executable)
index 090814a..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.lst
+++ /dev/null
@@ -1,669 +0,0 @@
-ARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                       page 1\r
-\r
-\r
-   1                           .syntax unified\r
-   2                           .cpu cortex-m3\r
-   3                           .fpu softvfp\r
-   4                           .eabi_attribute 20, 1\r
-   5                           .eabi_attribute 21, 1\r
-   6                           .eabi_attribute 23, 3\r
-   7                           .eabi_attribute 24, 1\r
-   8                           .eabi_attribute 25, 1\r
-   9                           .eabi_attribute 26, 1\r
-  10                           .eabi_attribute 30, 4\r
-  11                           .eabi_attribute 34, 1\r
-  12                           .eabi_attribute 18, 4\r
-  13                           .thumb\r
-  14                           .file   "main.c"\r
-  15                           .text\r
-  16                   .Ltext0:\r
-  17                           .cfi_sections   .debug_frame\r
-  18                           .section        .text.startup.main,"ax",%progbits\r
-  19                           .align  1\r
-  20                           .global main\r
-  21                           .thumb\r
-  22                           .thumb_func\r
-  23                           .type   main, %function\r
-  24                   main:\r
-  25                   .LFB57:\r
-  26                           .file 1 ".\\main.c"\r
-   1:.\main.c      **** //     Copyright (C) 2013 Michael McMaster <michael@codesrc.com>\r
-   2:.\main.c      **** //\r
-   3:.\main.c      **** //     This file is part of SCSI2SD.\r
-   4:.\main.c      **** //\r
-   5:.\main.c      **** //     SCSI2SD is free software: you can redistribute it and/or modify\r
-   6:.\main.c      **** //     it under the terms of the GNU General Public License as published by\r
-   7:.\main.c      **** //     the Free Software Foundation, either version 3 of the License, or\r
-   8:.\main.c      **** //     (at your option) any later version.\r
-   9:.\main.c      **** //\r
-  10:.\main.c      **** //     SCSI2SD is distributed in the hope that it will be useful,\r
-  11:.\main.c      **** //     but WITHOUT ANY WARRANTY; without even the implied warranty of\r
-  12:.\main.c      **** //     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
-  13:.\main.c      **** //     GNU General Public License for more details.\r
-  14:.\main.c      **** //\r
-  15:.\main.c      **** //     You should have received a copy of the GNU General Public License\r
-  16:.\main.c      **** //     along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.\r
-  17:.\main.c      **** #include <project.h>\r
-  18:.\main.c      **** \r
-  19:.\main.c      **** static void resetSCSI()\r
-  20:.\main.c      **** {\r
-  21:.\main.c      ****        CyPins_ClearPin(SCSI_Out_IO_raw);       \r
-  22:.\main.c      ****        CyPins_ClearPin(SCSI_Out_ATN);\r
-  23:.\main.c      ****        CyPins_ClearPin(SCSI_Out_BSY);\r
-  24:.\main.c      ****        CyPins_ClearPin(SCSI_Out_ACK);\r
-  25:.\main.c      ****        CyPins_ClearPin(SCSI_Out_RST);\r
-  26:.\main.c      ****        CyPins_ClearPin(SCSI_Out_SEL);\r
-  27:.\main.c      ****        CyPins_ClearPin(SCSI_Out_REQ);\r
-  28:.\main.c      ****        CyPins_ClearPin(SCSI_Out_MSG);\r
-  29:.\main.c      ****        CyPins_ClearPin(SCSI_Out_CD);\r
-  30:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB0);\r
-  31:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB1);\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 2\r
-\r
-\r
-  32:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB2);\r
-  33:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB3);\r
-  34:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB4);\r
-  35:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB5);\r
-  36:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB6);\r
-  37:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB7);\r
-  38:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBP_raw);\r
-  39:.\main.c      **** }\r
-  40:.\main.c      **** \r
-  41:.\main.c      **** void main()\r
-  42:.\main.c      **** {\r
-  27                           .loc 1 42 0\r
-  28                           .cfi_startproc\r
-  29                           @ Volatile: function does not return.\r
-  30                           @ args = 0, pretend = 0, frame = 0\r
-  31                           @ frame_needed = 0, uses_anonymous_args = 0\r
-  32 0000 08B5                 push    {r3, lr}\r
-  33                   .LCFI0:\r
-  34                           .cfi_def_cfa_offset 8\r
-  35                           .cfi_offset 3, -8\r
-  36                           .cfi_offset 14, -4\r
-  37                   .LBB4:\r
-  38                   .LBB5:\r
-  21:.\main.c      ****        CyPins_ClearPin(SCSI_Out_IO_raw);       \r
-  39                           .loc 1 21 0\r
-  40 0002 364B                 ldr     r3, .L4\r
-  41 0004 1A78                 ldrb    r2, [r3, #0]    @ zero_extendqisi2\r
-  42 0006 02F0FE00             and     r0, r2, #254\r
-  43 000a 1870                 strb    r0, [r3, #0]\r
-  22:.\main.c      ****        CyPins_ClearPin(SCSI_Out_ATN);\r
-  44                           .loc 1 22 0\r
-  45 000c 93F82210             ldrb    r1, [r3, #34]   @ zero_extendqisi2\r
-  46 0010 01F0FE02             and     r2, r1, #254\r
-  47 0014 83F82220             strb    r2, [r3, #34]\r
-  23:.\main.c      ****        CyPins_ClearPin(SCSI_Out_BSY);\r
-  48                           .loc 1 23 0\r
-  49 0018 0733                 adds    r3, r3, #7\r
-  50 001a 1878                 ldrb    r0, [r3, #0]    @ zero_extendqisi2\r
-  51 001c 00F0FE01             and     r1, r0, #254\r
-  52 0020 1970                 strb    r1, [r3, #0]\r
-  24:.\main.c      ****        CyPins_ClearPin(SCSI_Out_ACK);\r
-  53                           .loc 1 24 0\r
-  54 0022 13F8012C             ldrb    r2, [r3, #-1]   @ zero_extendqisi2\r
-  55 0026 02F0FE00             and     r0, r2, #254\r
-  56 002a 03F8010C             strb    r0, [r3, #-1]\r
-  25:.\main.c      ****        CyPins_ClearPin(SCSI_Out_RST);\r
-  57                           .loc 1 25 0\r
-  58 002e 13F8021C             ldrb    r1, [r3, #-2]   @ zero_extendqisi2\r
-  59 0032 01F0FE02             and     r2, r1, #254\r
-  60 0036 03F8022C             strb    r2, [r3, #-2]\r
-  26:.\main.c      ****        CyPins_ClearPin(SCSI_Out_SEL);\r
-  61                           .loc 1 26 0\r
-  62 003a 13F8040C             ldrb    r0, [r3, #-4]   @ zero_extendqisi2\r
-  63 003e 00F0FE01             and     r1, r0, #254\r
-  64 0042 03F8041C             strb    r1, [r3, #-4]\r
-  27:.\main.c      ****        CyPins_ClearPin(SCSI_Out_REQ);\r
-  65                           .loc 1 27 0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 3\r
-\r
-\r
-  66 0046 13F8062C             ldrb    r2, [r3, #-6]   @ zero_extendqisi2\r
-  67 004a 02F0FE00             and     r0, r2, #254\r
-  68 004e 03F8060C             strb    r0, [r3, #-6]\r
-  28:.\main.c      ****        CyPins_ClearPin(SCSI_Out_MSG);\r
-  69                           .loc 1 28 0\r
-  70 0052 13F8031C             ldrb    r1, [r3, #-3]   @ zero_extendqisi2\r
-  71 0056 01F0FE02             and     r2, r1, #254\r
-  72 005a 03F8032C             strb    r2, [r3, #-3]\r
-  29:.\main.c      ****        CyPins_ClearPin(SCSI_Out_CD);\r
-  73                           .loc 1 29 0\r
-  74 005e 13F8050C             ldrb    r0, [r3, #-5]   @ zero_extendqisi2\r
-  75 0062 00F0FE01             and     r1, r0, #254\r
-  76 0066 03F8051C             strb    r1, [r3, #-5]\r
-  30:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB0);\r
-  77                           .loc 1 30 0\r
-  78 006a 93F82C20             ldrb    r2, [r3, #44]   @ zero_extendqisi2\r
-  79 006e 02F0FE00             and     r0, r2, #254\r
-  80 0072 83F82C00             strb    r0, [r3, #44]\r
-  31:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB1);\r
-  81                           .loc 1 31 0\r
-  82 0076 2B33                 adds    r3, r3, #43\r
-  83 0078 1978                 ldrb    r1, [r3, #0]    @ zero_extendqisi2\r
-  84 007a 01F0FE02             and     r2, r1, #254\r
-  85 007e 1A70                 strb    r2, [r3, #0]\r
-  32:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB2);\r
-  86                           .loc 1 32 0\r
-  87 0080 13F8010C             ldrb    r0, [r3, #-1]   @ zero_extendqisi2\r
-  88 0084 00F0FE01             and     r1, r0, #254\r
-  89 0088 03F8011C             strb    r1, [r3, #-1]\r
-  33:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB3);\r
-  90                           .loc 1 33 0\r
-  91 008c 13F8022C             ldrb    r2, [r3, #-2]   @ zero_extendqisi2\r
-  92 0090 02F0FE00             and     r0, r2, #254\r
-  93 0094 03F8020C             strb    r0, [r3, #-2]\r
-  34:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB4);\r
-  94                           .loc 1 34 0\r
-  95 0098 13F80B1C             ldrb    r1, [r3, #-11]  @ zero_extendqisi2\r
-  96 009c 01F0FE02             and     r2, r1, #254\r
-  97 00a0 03F80B2C             strb    r2, [r3, #-11]\r
-  35:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB5);\r
-  98                           .loc 1 35 0\r
-  99 00a4 13F80C0C             ldrb    r0, [r3, #-12]  @ zero_extendqisi2\r
- 100 00a8 00F0FE01             and     r1, r0, #254\r
- 101 00ac 03F80C1C             strb    r1, [r3, #-12]\r
-  36:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB6);\r
- 102                           .loc 1 36 0\r
- 103 00b0 13F80D2C             ldrb    r2, [r3, #-13]  @ zero_extendqisi2\r
- 104 00b4 02F0FE00             and     r0, r2, #254\r
- 105 00b8 03F80D0C             strb    r0, [r3, #-13]\r
-  37:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBx_DB7);\r
- 106                           .loc 1 37 0\r
- 107 00bc 13F80E1C             ldrb    r1, [r3, #-14]  @ zero_extendqisi2\r
- 108 00c0 01F0FE02             and     r2, r1, #254\r
- 109 00c4 03F80E2C             strb    r2, [r3, #-14]\r
-  38:.\main.c      ****        CyPins_ClearPin(SCSI_Out_DBP_raw);\r
- 110                           .loc 1 38 0\r
- 111 00c8 13F80F0C             ldrb    r0, [r3, #-15]  @ zero_extendqisi2\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 4\r
-\r
-\r
- 112 00cc 00F0FE01             and     r1, r0, #254\r
- 113 00d0 03F80F1C             strb    r1, [r3, #-15]\r
- 114                   .LBE5:\r
- 115                   .LBE4:\r
-  43:.\main.c      ****     resetSCSI();\r
-  44:.\main.c      ****        \r
-  45:.\main.c      ****        // The call to the bootloader should not return\r
-  46:.\main.c      ****     CyBtldr_Start();\r
- 116                           .loc 1 46 0\r
- 117 00d4 FFF7FEFF             bl      BL_Start\r
- 118                   .LVL0:\r
- 119                   .L2:\r
- 120 00d8 FEE7                 b       .L2\r
- 121                   .L5:\r
- 122 00da 00BF                 .align  2\r
- 123                   .L4:\r
- 124 00dc 00500040             .word   1073762304\r
- 125                           .cfi_endproc\r
- 126                   .LFE57:\r
- 127                           .size   main, .-main\r
- 128                           .text\r
- 129                   .Letext0:\r
- 130                           .file 2 "c:\\program files (x86)\\cypress\\psoc creator\\3.0\\psoc creator\\import\\gnu_cs\\arm\\4\r
- 131                           .file 3 "./Generated_Source/PSoC5/cytypes.h"\r
- 132                           .file 4 "./Generated_Source/PSoC5/core_cm3.h"\r
- 133                           .file 5 "./Generated_Source/PSoC5/BL.h"\r
- 134                           .section        .debug_info,"",%progbits\r
- 135                   .Ldebug_info0:\r
- 136 0000 05010000             .4byte  0x105\r
- 137 0004 0200                 .2byte  0x2\r
- 138 0006 00000000             .4byte  .Ldebug_abbrev0\r
- 139 000a 04                   .byte   0x4\r
- 140 000b 01                   .uleb128 0x1\r
- 141 000c 33000000             .4byte  .LASF16\r
- 142 0010 01                   .byte   0x1\r
- 143 0011 C3000000             .4byte  .LASF17\r
- 144 0015 0F010000             .4byte  .LASF18\r
- 145 0019 00000000             .4byte  .Ldebug_ranges0+0\r
- 146 001d 00000000             .4byte  0\r
- 147 0021 00000000             .4byte  0\r
- 148 0025 00000000             .4byte  .Ldebug_line0\r
- 149 0029 02                   .uleb128 0x2\r
- 150 002a 01                   .byte   0x1\r
- 151 002b 06                   .byte   0x6\r
- 152 002c E9000000             .4byte  .LASF0\r
- 153 0030 02                   .uleb128 0x2\r
- 154 0031 01                   .byte   0x1\r
- 155 0032 08                   .byte   0x8\r
- 156 0033 AB000000             .4byte  .LASF1\r
- 157 0037 02                   .uleb128 0x2\r
- 158 0038 02                   .byte   0x2\r
- 159 0039 05                   .byte   0x5\r
- 160 003a 05010000             .4byte  .LASF2\r
- 161 003e 02                   .uleb128 0x2\r
- 162 003f 02                   .byte   0x2\r
- 163 0040 07                   .byte   0x7\r
- 164 0041 0E000000             .4byte  .LASF3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 5\r
-\r
-\r
- 165 0045 03                   .uleb128 0x3\r
- 166 0046 40010000             .4byte  .LASF9\r
- 167 004a 02                   .byte   0x2\r
- 168 004b 4F                   .byte   0x4f\r
- 169 004c 50000000             .4byte  0x50\r
- 170 0050 02                   .uleb128 0x2\r
- 171 0051 04                   .byte   0x4\r
- 172 0052 05                   .byte   0x5\r
- 173 0053 D3000000             .4byte  .LASF4\r
- 174 0057 02                   .uleb128 0x2\r
- 175 0058 04                   .byte   0x4\r
- 176 0059 07                   .byte   0x7\r
- 177 005a 82000000             .4byte  .LASF5\r
- 178 005e 02                   .uleb128 0x2\r
- 179 005f 08                   .byte   0x8\r
- 180 0060 05                   .byte   0x5\r
- 181 0061 00000000             .4byte  .LASF6\r
- 182 0065 02                   .uleb128 0x2\r
- 183 0066 08                   .byte   0x8\r
- 184 0067 07                   .byte   0x7\r
- 185 0068 94000000             .4byte  .LASF7\r
- 186 006c 04                   .uleb128 0x4\r
- 187 006d 04                   .byte   0x4\r
- 188 006e 05                   .byte   0x5\r
- 189 006f 696E7400             .ascii  "int\000"\r
- 190 0073 02                   .uleb128 0x2\r
- 191 0074 04                   .byte   0x4\r
- 192 0075 07                   .byte   0x7\r
- 193 0076 21000000             .4byte  .LASF8\r
- 194 007a 03                   .uleb128 0x3\r
- 195 007b 7C000000             .4byte  .LASF10\r
- 196 007f 03                   .byte   0x3\r
- 197 0080 5B                   .byte   0x5b\r
- 198 0081 30000000             .4byte  0x30\r
- 199 0085 02                   .uleb128 0x2\r
- 200 0086 04                   .byte   0x4\r
- 201 0087 04                   .byte   0x4\r
- 202 0088 FF000000             .4byte  .LASF11\r
- 203 008c 02                   .uleb128 0x2\r
- 204 008d 08                   .byte   0x8\r
- 205 008e 04                   .byte   0x4\r
- 206 008f CC000000             .4byte  .LASF12\r
- 207 0093 02                   .uleb128 0x2\r
- 208 0094 01                   .byte   0x1\r
- 209 0095 08                   .byte   0x8\r
- 210 0096 B9000000             .4byte  .LASF13\r
- 211 009a 03                   .uleb128 0x3\r
- 212 009b BE000000             .4byte  .LASF14\r
- 213 009f 03                   .byte   0x3\r
- 214 00a0 F0                   .byte   0xf0\r
- 215 00a1 A5000000             .4byte  0xa5\r
- 216 00a5 05                   .uleb128 0x5\r
- 217 00a6 7A000000             .4byte  0x7a\r
- 218 00aa 02                   .uleb128 0x2\r
- 219 00ab 04                   .byte   0x4\r
- 220 00ac 07                   .byte   0x7\r
- 221 00ad 51010000             .4byte  .LASF15\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 6\r
-\r
-\r
- 222 00b1 06                   .uleb128 0x6\r
- 223 00b2 F5000000             .4byte  .LASF19\r
- 224 00b6 01                   .byte   0x1\r
- 225 00b7 13                   .byte   0x13\r
- 226 00b8 01                   .byte   0x1\r
- 227 00b9 07                   .uleb128 0x7\r
- 228 00ba 01                   .byte   0x1\r
- 229 00bb 2E000000             .4byte  .LASF20\r
- 230 00bf 01                   .byte   0x1\r
- 231 00c0 29                   .byte   0x29\r
- 232 00c1 00000000             .4byte  .LFB57\r
- 233 00c5 E0000000             .4byte  .LFE57\r
- 234 00c9 00000000             .4byte  .LLST0\r
- 235 00cd 01                   .byte   0x1\r
- 236 00ce EB000000             .4byte  0xeb\r
- 237 00d2 08                   .uleb128 0x8\r
- 238 00d3 B1000000             .4byte  0xb1\r
- 239 00d7 02000000             .4byte  .LBB4\r
- 240 00db D4000000             .4byte  .LBE4\r
- 241 00df 01                   .byte   0x1\r
- 242 00e0 2B                   .byte   0x2b\r
- 243 00e1 09                   .uleb128 0x9\r
- 244 00e2 D8000000             .4byte  .LVL0\r
- 245 00e6 FE000000             .4byte  0xfe\r
- 246 00ea 00                   .byte   0\r
- 247 00eb 0A                   .uleb128 0xa\r
- 248 00ec DC000000             .4byte  .LASF21\r
- 249 00f0 04                   .byte   0x4\r
- 250 00f1 1606                 .2byte  0x616\r
- 251 00f3 F9000000             .4byte  0xf9\r
- 252 00f7 01                   .byte   0x1\r
- 253 00f8 01                   .byte   0x1\r
- 254 00f9 05                   .uleb128 0x5\r
- 255 00fa 45000000             .4byte  0x45\r
- 256 00fe 0B                   .uleb128 0xb\r
- 257 00ff 01                   .byte   0x1\r
- 258 0100 48010000             .4byte  .LASF22\r
- 259 0104 05                   .byte   0x5\r
- 260 0105 93                   .byte   0x93\r
- 261 0106 01                   .byte   0x1\r
- 262 0107 01                   .byte   0x1\r
- 263 0108 00                   .byte   0\r
- 264                           .section        .debug_abbrev,"",%progbits\r
- 265                   .Ldebug_abbrev0:\r
- 266 0000 01                   .uleb128 0x1\r
- 267 0001 11                   .uleb128 0x11\r
- 268 0002 01                   .byte   0x1\r
- 269 0003 25                   .uleb128 0x25\r
- 270 0004 0E                   .uleb128 0xe\r
- 271 0005 13                   .uleb128 0x13\r
- 272 0006 0B                   .uleb128 0xb\r
- 273 0007 03                   .uleb128 0x3\r
- 274 0008 0E                   .uleb128 0xe\r
- 275 0009 1B                   .uleb128 0x1b\r
- 276 000a 0E                   .uleb128 0xe\r
- 277 000b 55                   .uleb128 0x55\r
- 278 000c 06                   .uleb128 0x6\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 7\r
-\r
-\r
- 279 000d 11                   .uleb128 0x11\r
- 280 000e 01                   .uleb128 0x1\r
- 281 000f 52                   .uleb128 0x52\r
- 282 0010 01                   .uleb128 0x1\r
- 283 0011 10                   .uleb128 0x10\r
- 284 0012 06                   .uleb128 0x6\r
- 285 0013 00                   .byte   0\r
- 286 0014 00                   .byte   0\r
- 287 0015 02                   .uleb128 0x2\r
- 288 0016 24                   .uleb128 0x24\r
- 289 0017 00                   .byte   0\r
- 290 0018 0B                   .uleb128 0xb\r
- 291 0019 0B                   .uleb128 0xb\r
- 292 001a 3E                   .uleb128 0x3e\r
- 293 001b 0B                   .uleb128 0xb\r
- 294 001c 03                   .uleb128 0x3\r
- 295 001d 0E                   .uleb128 0xe\r
- 296 001e 00                   .byte   0\r
- 297 001f 00                   .byte   0\r
- 298 0020 03                   .uleb128 0x3\r
- 299 0021 16                   .uleb128 0x16\r
- 300 0022 00                   .byte   0\r
- 301 0023 03                   .uleb128 0x3\r
- 302 0024 0E                   .uleb128 0xe\r
- 303 0025 3A                   .uleb128 0x3a\r
- 304 0026 0B                   .uleb128 0xb\r
- 305 0027 3B                   .uleb128 0x3b\r
- 306 0028 0B                   .uleb128 0xb\r
- 307 0029 49                   .uleb128 0x49\r
- 308 002a 13                   .uleb128 0x13\r
- 309 002b 00                   .byte   0\r
- 310 002c 00                   .byte   0\r
- 311 002d 04                   .uleb128 0x4\r
- 312 002e 24                   .uleb128 0x24\r
- 313 002f 00                   .byte   0\r
- 314 0030 0B                   .uleb128 0xb\r
- 315 0031 0B                   .uleb128 0xb\r
- 316 0032 3E                   .uleb128 0x3e\r
- 317 0033 0B                   .uleb128 0xb\r
- 318 0034 03                   .uleb128 0x3\r
- 319 0035 08                   .uleb128 0x8\r
- 320 0036 00                   .byte   0\r
- 321 0037 00                   .byte   0\r
- 322 0038 05                   .uleb128 0x5\r
- 323 0039 35                   .uleb128 0x35\r
- 324 003a 00                   .byte   0\r
- 325 003b 49                   .uleb128 0x49\r
- 326 003c 13                   .uleb128 0x13\r
- 327 003d 00                   .byte   0\r
- 328 003e 00                   .byte   0\r
- 329 003f 06                   .uleb128 0x6\r
- 330 0040 2E                   .uleb128 0x2e\r
- 331 0041 00                   .byte   0\r
- 332 0042 03                   .uleb128 0x3\r
- 333 0043 0E                   .uleb128 0xe\r
- 334 0044 3A                   .uleb128 0x3a\r
- 335 0045 0B                   .uleb128 0xb\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 8\r
-\r
-\r
- 336 0046 3B                   .uleb128 0x3b\r
- 337 0047 0B                   .uleb128 0xb\r
- 338 0048 20                   .uleb128 0x20\r
- 339 0049 0B                   .uleb128 0xb\r
- 340 004a 00                   .byte   0\r
- 341 004b 00                   .byte   0\r
- 342 004c 07                   .uleb128 0x7\r
- 343 004d 2E                   .uleb128 0x2e\r
- 344 004e 01                   .byte   0x1\r
- 345 004f 3F                   .uleb128 0x3f\r
- 346 0050 0C                   .uleb128 0xc\r
- 347 0051 03                   .uleb128 0x3\r
- 348 0052 0E                   .uleb128 0xe\r
- 349 0053 3A                   .uleb128 0x3a\r
- 350 0054 0B                   .uleb128 0xb\r
- 351 0055 3B                   .uleb128 0x3b\r
- 352 0056 0B                   .uleb128 0xb\r
- 353 0057 11                   .uleb128 0x11\r
- 354 0058 01                   .uleb128 0x1\r
- 355 0059 12                   .uleb128 0x12\r
- 356 005a 01                   .uleb128 0x1\r
- 357 005b 40                   .uleb128 0x40\r
- 358 005c 06                   .uleb128 0x6\r
- 359 005d 9742                 .uleb128 0x2117\r
- 360 005f 0C                   .uleb128 0xc\r
- 361 0060 01                   .uleb128 0x1\r
- 362 0061 13                   .uleb128 0x13\r
- 363 0062 00                   .byte   0\r
- 364 0063 00                   .byte   0\r
- 365 0064 08                   .uleb128 0x8\r
- 366 0065 1D                   .uleb128 0x1d\r
- 367 0066 00                   .byte   0\r
- 368 0067 31                   .uleb128 0x31\r
- 369 0068 13                   .uleb128 0x13\r
- 370 0069 11                   .uleb128 0x11\r
- 371 006a 01                   .uleb128 0x1\r
- 372 006b 12                   .uleb128 0x12\r
- 373 006c 01                   .uleb128 0x1\r
- 374 006d 58                   .uleb128 0x58\r
- 375 006e 0B                   .uleb128 0xb\r
- 376 006f 59                   .uleb128 0x59\r
- 377 0070 0B                   .uleb128 0xb\r
- 378 0071 00                   .byte   0\r
- 379 0072 00                   .byte   0\r
- 380 0073 09                   .uleb128 0x9\r
- 381 0074 898201               .uleb128 0x4109\r
- 382 0077 00                   .byte   0\r
- 383 0078 11                   .uleb128 0x11\r
- 384 0079 01                   .uleb128 0x1\r
- 385 007a 31                   .uleb128 0x31\r
- 386 007b 13                   .uleb128 0x13\r
- 387 007c 00                   .byte   0\r
- 388 007d 00                   .byte   0\r
- 389 007e 0A                   .uleb128 0xa\r
- 390 007f 34                   .uleb128 0x34\r
- 391 0080 00                   .byte   0\r
- 392 0081 03                   .uleb128 0x3\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 9\r
-\r
-\r
- 393 0082 0E                   .uleb128 0xe\r
- 394 0083 3A                   .uleb128 0x3a\r
- 395 0084 0B                   .uleb128 0xb\r
- 396 0085 3B                   .uleb128 0x3b\r
- 397 0086 05                   .uleb128 0x5\r
- 398 0087 49                   .uleb128 0x49\r
- 399 0088 13                   .uleb128 0x13\r
- 400 0089 3F                   .uleb128 0x3f\r
- 401 008a 0C                   .uleb128 0xc\r
- 402 008b 3C                   .uleb128 0x3c\r
- 403 008c 0C                   .uleb128 0xc\r
- 404 008d 00                   .byte   0\r
- 405 008e 00                   .byte   0\r
- 406 008f 0B                   .uleb128 0xb\r
- 407 0090 2E                   .uleb128 0x2e\r
- 408 0091 00                   .byte   0\r
- 409 0092 3F                   .uleb128 0x3f\r
- 410 0093 0C                   .uleb128 0xc\r
- 411 0094 03                   .uleb128 0x3\r
- 412 0095 0E                   .uleb128 0xe\r
- 413 0096 3A                   .uleb128 0x3a\r
- 414 0097 0B                   .uleb128 0xb\r
- 415 0098 3B                   .uleb128 0x3b\r
- 416 0099 0B                   .uleb128 0xb\r
- 417 009a 27                   .uleb128 0x27\r
- 418 009b 0C                   .uleb128 0xc\r
- 419 009c 3C                   .uleb128 0x3c\r
- 420 009d 0C                   .uleb128 0xc\r
- 421 009e 00                   .byte   0\r
- 422 009f 00                   .byte   0\r
- 423 00a0 00                   .byte   0\r
- 424                           .section        .debug_loc,"",%progbits\r
- 425                   .Ldebug_loc0:\r
- 426                   .LLST0:\r
- 427 0000 00000000             .4byte  .LFB57\r
- 428 0004 02000000             .4byte  .LCFI0\r
- 429 0008 0200                 .2byte  0x2\r
- 430 000a 7D                   .byte   0x7d\r
- 431 000b 00                   .sleb128 0\r
- 432 000c 02000000             .4byte  .LCFI0\r
- 433 0010 E0000000             .4byte  .LFE57\r
- 434 0014 0200                 .2byte  0x2\r
- 435 0016 7D                   .byte   0x7d\r
- 436 0017 08                   .sleb128 8\r
- 437 0018 00000000             .4byte  0\r
- 438 001c 00000000             .4byte  0\r
- 439                           .section        .debug_aranges,"",%progbits\r
- 440 0000 1C000000             .4byte  0x1c\r
- 441 0004 0200                 .2byte  0x2\r
- 442 0006 00000000             .4byte  .Ldebug_info0\r
- 443 000a 04                   .byte   0x4\r
- 444 000b 00                   .byte   0\r
- 445 000c 0000                 .2byte  0\r
- 446 000e 0000                 .2byte  0\r
- 447 0010 00000000             .4byte  .LFB57\r
- 448 0014 E0000000             .4byte  .LFE57-.LFB57\r
- 449 0018 00000000             .4byte  0\r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 10\r
-\r
-\r
- 450 001c 00000000             .4byte  0\r
- 451                           .section        .debug_ranges,"",%progbits\r
- 452                   .Ldebug_ranges0:\r
- 453 0000 00000000             .4byte  .LFB57\r
- 454 0004 E0000000             .4byte  .LFE57\r
- 455 0008 00000000             .4byte  0\r
- 456 000c 00000000             .4byte  0\r
- 457                           .section        .debug_line,"",%progbits\r
- 458                   .Ldebug_line0:\r
- 459 0000 2B010000             .section        .debug_str,"MS",%progbits,1\r
- 459      02000101 \r
- 459      00000201 \r
- 459      FB0E0D00 \r
- 459      01010101 \r
- 460                   .LASF6:\r
- 461 0000 6C6F6E67             .ascii  "long long int\000"\r
- 461      206C6F6E \r
- 461      6720696E \r
- 461      7400\r
- 462                   .LASF3:\r
- 463 000e 73686F72             .ascii  "short unsigned int\000"\r
- 463      7420756E \r
- 463      7369676E \r
- 463      65642069 \r
- 463      6E7400\r
- 464                   .LASF8:\r
- 465 0021 756E7369             .ascii  "unsigned int\000"\r
- 465      676E6564 \r
- 465      20696E74 \r
- 465      00\r
- 466                   .LASF20:\r
- 467 002e 6D61696E             .ascii  "main\000"\r
- 467      00\r
- 468                   .LASF16:\r
- 469 0033 474E5520             .ascii  "GNU C 4.7.3 20130312 (release) [ARM/embedded-4_7-br"\r
- 469      4320342E \r
- 469      372E3320 \r
- 469      32303133 \r
- 469      30333132 \r
- 470 0066 616E6368             .ascii  "anch revision 196615]\000"\r
- 470      20726576 \r
- 470      6973696F \r
- 470      6E203139 \r
- 470      36363135 \r
- 471                   .LASF10:\r
- 472 007c 75696E74             .ascii  "uint8\000"\r
- 472      3800\r
- 473                   .LASF5:\r
- 474 0082 6C6F6E67             .ascii  "long unsigned int\000"\r
- 474      20756E73 \r
- 474      69676E65 \r
- 474      6420696E \r
- 474      7400\r
- 475                   .LASF7:\r
- 476 0094 6C6F6E67             .ascii  "long long unsigned int\000"\r
- 476      206C6F6E \r
- 476      6720756E \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 11\r
-\r
-\r
- 476      7369676E \r
- 476      65642069 \r
- 477                   .LASF1:\r
- 478 00ab 756E7369             .ascii  "unsigned char\000"\r
- 478      676E6564 \r
- 478      20636861 \r
- 478      7200\r
- 479                   .LASF13:\r
- 480 00b9 63686172             .ascii  "char\000"\r
- 480      00\r
- 481                   .LASF14:\r
- 482 00be 72656738             .ascii  "reg8\000"\r
- 482      00\r
- 483                   .LASF17:\r
- 484 00c3 2E5C6D61             .ascii  ".\\main.c\000"\r
- 484      696E2E63 \r
- 484      00\r
- 485                   .LASF12:\r
- 486 00cc 646F7562             .ascii  "double\000"\r
- 486      6C6500\r
- 487                   .LASF4:\r
- 488 00d3 6C6F6E67             .ascii  "long int\000"\r
- 488      20696E74 \r
- 488      00\r
- 489                   .LASF21:\r
- 490 00dc 49544D5F             .ascii  "ITM_RxBuffer\000"\r
- 490      52784275 \r
- 490      66666572 \r
- 490      00\r
- 491                   .LASF0:\r
- 492 00e9 7369676E             .ascii  "signed char\000"\r
- 492      65642063 \r
- 492      68617200 \r
- 493                   .LASF19:\r
- 494 00f5 72657365             .ascii  "resetSCSI\000"\r
- 494      74534353 \r
- 494      4900\r
- 495                   .LASF11:\r
- 496 00ff 666C6F61             .ascii  "float\000"\r
- 496      7400\r
- 497                   .LASF2:\r
- 498 0105 73686F72             .ascii  "short int\000"\r
- 498      7420696E \r
- 498      7400\r
- 499                   .LASF18:\r
- 500 010f 573A5C53             .ascii  "W:\\SCSI2SD\\software\\SCSI2SD\\USB_Bootloader.cyds"\r
- 500      43534932 \r
- 500      53445C73 \r
- 500      6F667477 \r
- 500      6172655C \r
- 501 013e 6E00                 .ascii  "n\000"\r
- 502                   .LASF9:\r
- 503 0140 696E7433             .ascii  "int32_t\000"\r
- 503      325F7400 \r
- 504                   .LASF22:\r
- 505 0148 424C5F53             .ascii  "BL_Start\000"\r
- 505      74617274 \r
-\fARM GAS  C:\Users\MICHA_~1\AppData\Local\Temp\ccLNGxQg.s                      page 12\r
-\r
-\r
- 505      00\r
- 506                   .LASF15:\r
- 507 0151 73697A65             .ascii  "sizetype\000"\r
- 507      74797065 \r
- 507      00\r
- 508                           .ident  "GCC: (GNU Tools for ARM Embedded Processors) 4.7.3 20130312 (release) [ARM/embedded-4_7-br\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.o b/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.o
deleted file mode 100755 (executable)
index 90a111e..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/CortexM3/ARM_GCC_473/Release/main.o and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c b/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c
index c15b7b656f85a78da146a0c3c12b0b8cb4153cd3..361d24a1b572e94afd3d79b884f762ca89537e47 100755 (executable)
--- a/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c
+++ b/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c
@@ -311,9 +311,9 @@ void cyfitter_cfg(void)
        static const uint8 CYCODE BS_IOPINS0_8_VAL[] = {\r
                0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u};\r
 \r
-       /* IOPINS0_3 Address: CYREG_PRT3_DM0 Size (bytes): 8 */\r
+       /* IOPINS0_3 Address: CYREG_PRT3_DR Size (bytes): 10 */\r
        static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {\r
-               0x00u, 0x3Eu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
+               0x3Eu, 0x00u, 0x00u, 0x3Eu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
 \r
        /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */\r
        static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {\r
@@ -420,7 +420,7 @@ void cyfitter_cfg(void)
        /* Perform second pass device configuration. These items must be configured in specific order after the regular configuration is done. */\r
        CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT0_DM0), (const void CYCODE *)(BS_IOPINS0_0_VAL), 8u);\r
        CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT15_DR), (const void CYCODE *)(BS_IOPINS0_8_VAL), 10u);\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DM0), (const void CYCODE *)(BS_IOPINS0_3_VAL), 8u);\r
+       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DR), (const void CYCODE *)(BS_IOPINS0_3_VAL), 10u);\r
        CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT4_DM0), (const void CYCODE *)(BS_IOPINS0_4_VAL), 8u);\r
        CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT6_DM0), (const void CYCODE *)(BS_IOPINS0_6_VAL), 8u);\r
 \r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c b/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c
index 00c7240a6275abde5aba4e6604de20d8f3a2cffc..a4c9cf07bc6bc8a0b8708dddcbf9616e2281cbe6 100755 (executable)
--- a/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c
+++ b/software/SCSI2SD/USB_Bootloader.cydsn/Generated_Source/PSoC5/cymetadata.c
@@ -55,7 +55,7 @@ __attribute__ ((__section__(".cycustnvl"), used))
 #error "Unsupported toolchain"\r
 #endif\r
 const uint8 cy_meta_custnvl[] = {\r
-    0x80u, 0x00u, 0x40u, 0x05u\r
+    0x00u, 0x00u, 0x40u, 0x05u\r
 };\r
 \r
 #if defined(__GNUC__) || defined(__ARMCC_VERSION)\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/TopDesign/TopDesign.cysch b/software/SCSI2SD/USB_Bootloader.cydsn/TopDesign/TopDesign.cysch
index fa108fe0d7db973e1d70786b20602ebd125afc7a..7544e05967f6b3f72459dea5137bfc2ae329ad6e 100755 (executable)
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/TopDesign/TopDesign.cysch and b/software/SCSI2SD/USB_Bootloader.cydsn/TopDesign/TopDesign.cysch differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyfit b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyfit
index c3c2e9014b992dd8596aed85189accdd08130253..0ec8f5f1fcedbdf5203a385a7dede1ff38f8f47c 100755 (executable)
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyfit and b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyfit differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyprj.Micha_000 b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyprj.Micha_000
index c307d3ab53db85219c1afa3c299f476e09fe0cf8..5f6a94463a18c7ce28668937d1cc3b8ef4540cf6 100755 (executable)
--- a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyprj.Micha_000
+++ b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.cyprj.Micha_000
@@ -1663,14 +1663,14 @@
 <v>C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif</v>\r
 <v>C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif</v>\r
 </warp_dep>\r
-<deps_time v="130399651833241176" />\r
+<deps_time v="130400487594237024" />\r
 <top_block v="TopDesign" />\r
 <last_generation v="0" />\r
 </CyGuid_925cc1e1-309e-4e08-b0a1-09a83c35b157>\r
 </dataGuid>\r
 <dataGuid v="769d31ea-68b1-4f0c-b90a-7c10a43ee563">\r
 <CyGuid_769d31ea-68b1-4f0c-b90a-7c10a43ee563 type_name="CyDesigner.Common.ProjMgmt.Model.CyLinkCustomData" version="1">\r
-<deps_time v="130399652225904316" />\r
+<deps_time v="130400487992691193" />\r
 </CyGuid_769d31ea-68b1-4f0c-b90a-7c10a43ee563>\r
 </dataGuid>\r
 <dataGuid v="bf610382-39c6-441f-80b8-b04622ea7845">\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.rpt b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.rpt
index 7a8943b3823b76cb841c28036f79fa2019550238..1536367d05126049d70cdae9d88f805e3cb420ce 100755 (executable)
--- a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.rpt
+++ b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader.rpt
@@ -1,10 +1,10 @@
-Loading plugins phase: Elapsed time ==> 0s.500ms\r
-Initializing data phase: Elapsed time ==> 3s.890ms\r
+Loading plugins phase: Elapsed time ==> 0s.499ms\r
+Initializing data phase: Elapsed time ==> 3s.703ms\r
 <CYPRESSTAG name="CyDsfit arguments...">\r
 cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -p W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE</CYPRESSTAG>\r
 <CYPRESSTAG name="Design elaboration results...">\r
 </CYPRESSTAG>\r
-Elaboration phase: Elapsed time ==> 7s.406ms\r
+Elaboration phase: Elapsed time ==> 7s.531ms\r
 <CYPRESSTAG name="HDL generation results...">\r
 </CYPRESSTAG>\r
 HDL generation phase: Elapsed time ==> 0s.109ms\r
@@ -41,7 +41,7 @@ Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\sof
 ======================================================================\r
 \r
 vlogfe V6.3 IR 41:  Verilog parser\r
-Sat Mar 22 22:32:47 2014\r
+Sun Mar 23 21:45:41 2014\r
 \r
 \r
 ======================================================================\r
@@ -51,7 +51,7 @@ Options  :    -yv2 -q10 USB_Bootloader.v
 ======================================================================\r
 \r
 vpp V6.3 IR 41:  Verilog Pre-Processor\r
-Sat Mar 22 22:32:47 2014\r
+Sun Mar 23 21:45:41 2014\r
 \r
 \r
 vpp:  No errors.\r
@@ -80,7 +80,7 @@ Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\sof
 ======================================================================\r
 \r
 tovif V6.3 IR 41:  High-level synthesis\r
-Sat Mar 22 22:32:47 2014\r
+Sun Mar 23 21:45:42 2014\r
 \r
 Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.\r
 Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.\r
@@ -104,7 +104,7 @@ Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\sof
 ======================================================================\r
 \r
 topld V6.3 IR 41:  Synthesis and optimization\r
-Sat Mar 22 22:32:48 2014\r
+Sun Mar 23 21:45:42 2014\r
 \r
 Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.\r
 Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.\r
@@ -204,10 +204,10 @@ CYPRESS_DIR    : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\wa
 Warp Program   : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe\r
 Warp Arguments : -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog\r
 </CYPRESSTAG>\r
-Warp synthesis phase: Elapsed time ==> 1s.468ms\r
+Warp synthesis phase: Elapsed time ==> 1s.454ms\r
 <CYPRESSTAG name="Fitter results...">\r
 <CYPRESSTAG name="Fitter startup details...">\r
-cyp3fit: V3.0.0.1539, Family: PSoC3, Started at: Saturday, 22 March 2014 22:32:48\r
+cyp3fit: V3.0.0.1539, Family: PSoC3, Started at: Sunday, 23 March 2014 21:45:43\r
 Options: -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Design parsing">\r
@@ -951,7 +951,7 @@ Design Equations
             Input Sync needed: True\r
             Output Sync needed: False\r
             SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
+            POR State: ANY\r
             LCD Mode: COMMON\r
             Register Mode: RegComb\r
             CaSense Mode: NEITHER\r
@@ -989,7 +989,7 @@ Design Equations
             Input Sync needed: True\r
             Output Sync needed: False\r
             SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
+            POR State: ANY\r
             LCD Mode: COMMON\r
             Register Mode: RegComb\r
             CaSense Mode: NEITHER\r
@@ -1027,7 +1027,7 @@ Design Equations
             Input Sync needed: True\r
             Output Sync needed: False\r
             SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
+            POR State: ANY\r
             LCD Mode: COMMON\r
             Register Mode: RegComb\r
             CaSense Mode: NEITHER\r
@@ -1065,7 +1065,7 @@ Design Equations
             Input Sync needed: True\r
             Output Sync needed: False\r
             SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
+            POR State: ANY\r
             LCD Mode: COMMON\r
             Register Mode: RegComb\r
             CaSense Mode: NEITHER\r
@@ -1103,7 +1103,7 @@ Design Equations
             Input Sync needed: True\r
             Output Sync needed: False\r
             SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
+            POR State: ANY\r
             LCD Mode: COMMON\r
             Register Mode: RegComb\r
             CaSense Mode: NEITHER\r
@@ -1314,8 +1314,8 @@ EMIF Fixed Blocks             :    0 :    1 :    1 :   0.00%
 LPF Fixed Blocks              :    0 :    2 :    2 :   0.00%\r
 SAR Fixed Blocks              :    0 :    1 :    1 :   0.00%\r
 </CYPRESSTAG>\r
-Technology Mapping: Elapsed time ==> 0s.030ms\r
-Tech mapping phase: Elapsed time ==> 0s.265ms\r
+Technology Mapping: Elapsed time ==> 0s.031ms\r
+Tech mapping phase: Elapsed time ==> 0s.281ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Analog Placement">\r
 Initial Analog Placement Results:\r
@@ -1345,7 +1345,7 @@ IO_5@[IOP=(3)][IoId=(5)] : SD_PULLUP(4) (fixed)
 IO_7@[IOP=(15)][IoId=(7)] : \USBFS:Dm(0)\ (fixed)\r
 IO_6@[IOP=(15)][IoId=(6)] : \USBFS:Dp(0)\ (fixed)\r
 USB[0]@[FFB(USB,0)] : \USBFS:USB\\r
-Analog Placement phase: Elapsed time ==> 0s.109ms\r
+Analog Placement phase: Elapsed time ==> 0s.156ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Analog Routing">\r
 Analog Routing phase: Elapsed time ==> 0s.000ms\r
@@ -1363,12 +1363,12 @@ Dump of CyP35AnalogRoutingResultsDB
 IsVddaHalfUsedForComp = False\r
 IsVddaHalfUsedForSar0 = False\r
 IsVddaHalfUsedForSar1 = False\r
-Analog Code Generation phase: Elapsed time ==> 1s.000ms\r
+Analog Code Generation phase: Elapsed time ==> 1s.187ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Digital Placement">\r
 <CYPRESSTAG name="Detailed placement messages">\r
 I2659: No Constrained paths were found. The placer will run in non-timing driven mode.\r
-I2076: Total run-time: 1.2 sec.\r
+I2076: Total run-time: 2.4 sec.\r
 \r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="PLD Packing">\r
@@ -1382,7 +1382,7 @@ PLD Packing: Elapsed time ==> 0s.000ms
 Initial Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>\r
 <CYPRESSTAG name="Final Partitioning Summary">\r
 Final Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>\r
-Partitioning: Elapsed time ==> 0s.093ms\r
+Partitioning: Elapsed time ==> 0s.078ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Simulated Annealing">\r
 Annealing: Elapsed time ==> 0s.000ms\r
@@ -1825,7 +1825,7 @@ Pin : Name = SD_PULLUP(0)
         Input Sync needed: True\r
         Output Sync needed: False\r
         SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
+        POR State: ANY\r
         LCD Mode: COMMON\r
         Register Mode: RegComb\r
         CaSense Mode: NEITHER\r
@@ -1864,7 +1864,7 @@ Pin : Name = SD_PULLUP(1)
         Input Sync needed: True\r
         Output Sync needed: False\r
         SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
+        POR State: ANY\r
         LCD Mode: COMMON\r
         Register Mode: RegComb\r
         CaSense Mode: NEITHER\r
@@ -1903,7 +1903,7 @@ Pin : Name = SD_PULLUP(2)
         Input Sync needed: True\r
         Output Sync needed: False\r
         SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
+        POR State: ANY\r
         LCD Mode: COMMON\r
         Register Mode: RegComb\r
         CaSense Mode: NEITHER\r
@@ -1942,7 +1942,7 @@ Pin : Name = SD_PULLUP(3)
         Input Sync needed: True\r
         Output Sync needed: False\r
         SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
+        POR State: ANY\r
         LCD Mode: COMMON\r
         Register Mode: RegComb\r
         CaSense Mode: NEITHER\r
@@ -1981,7 +1981,7 @@ Pin : Name = SD_PULLUP(4)
         Input Sync needed: True\r
         Output Sync needed: False\r
         SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
+        POR State: ANY\r
         LCD Mode: COMMON\r
         Register Mode: RegComb\r
         CaSense Mode: NEITHER\r
@@ -2664,32 +2664,32 @@ Port | Pin | Fixed |      Type |       Drive Mode |            Name | Connection
 </CYPRESSTAG>\r
 </CYPRESSTAG>\r
 </CYPRESSTAG>\r
-Digital component placer commit/Report: Elapsed time ==> 0s.014ms\r
-Digital Placement phase: Elapsed time ==> 2s.172ms\r
+Digital component placer commit/Report: Elapsed time ==> 0s.016ms\r
+Digital Placement phase: Elapsed time ==> 3s.031ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Digital Routing">\r
 Routing successful.\r
-Digital Routing phase: Elapsed time ==> 3s.093ms\r
+Digital Routing phase: Elapsed time ==> 3s.046ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Bitstream and API generation">\r
-Bitstream and API generation phase: Elapsed time ==> 0s.702ms\r
+Bitstream and API generation phase: Elapsed time ==> 0s.718ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Bitstream verification">\r
-Bitstream verification phase: Elapsed time ==> 0s.140ms\r
+Bitstream verification phase: Elapsed time ==> 0s.159ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Static timing analysis">\r
 Timing report is in USB_Bootloader_timing.html.\r
-Static timing analysis phase: Elapsed time ==> 0s.719ms\r
+Static timing analysis phase: Elapsed time ==> 1s.074ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Data reporting">\r
 Data reporting phase: Elapsed time ==> 0s.000ms\r
 </CYPRESSTAG>\r
 <CYPRESSTAG name="Database update...">\r
-Design database save phase: Elapsed time ==> 0s.406ms\r
+Design database save phase: Elapsed time ==> 0s.374ms\r
 </CYPRESSTAG>\r
-cydsfit: Elapsed time ==> 8s.765ms\r
+cydsfit: Elapsed time ==> 10s.140ms\r
 </CYPRESSTAG>\r
-Fitter phase: Elapsed time ==> 8s.859ms\r
-API generation phase: Elapsed time ==> 3s.296ms\r
-Dependency generation phase: Elapsed time ==> 0s.016ms\r
-Cleanup phase: Elapsed time ==> 0s.047ms\r
+Fitter phase: Elapsed time ==> 10s.233ms\r
+API generation phase: Elapsed time ==> 4s.062ms\r
+Dependency generation phase: Elapsed time ==> 0s.031ms\r
+Cleanup phase: Elapsed time ==> 0s.046ms\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader_timing.html b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader_timing.html
index 83b2bc27d7584bff7cbc2ac19c444bf4c4d4c34b..5617ccc8a755b4e502ee3b92b38053227b6649e9 100755 (executable)
--- a/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader_timing.html
+++ b/software/SCSI2SD/USB_Bootloader.cydsn/USB_Bootloader_timing.html
@@ -539,7 +539,7 @@ function getElementsByClass(rootNode, elemName, className)
 <tr> <td class="prop"> Project :</td>\r
 <td class="proptext"> USB_Bootloader</td></tr>\r
 <tr> <td class="prop"> Build Time :</td>\r
-<td class="proptext"> 03/22/14 22:32:57</td></tr>\r
+<td class="proptext"> 03/23/14 21:45:52</td></tr>\r
 <tr> <td class="prop"> Device :</td>\r
 <td class="proptext"> CY8C5267AXI-LP051</td></tr>\r
 <tr> <td class="prop"> Temperature :</td>\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.c
deleted file mode 100755 (executable)
index ea1c5aa..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.c
+++ /dev/null
@@ -1,1462 +0,0 @@
-/*******************************************************************************\r
-* File Name: BL.c\r
-* Version 1.20\r
-*\r
-*  Description:\r
-*   Provides an API for the Bootloader component. The API includes functions\r
-*   for starting boot loading operations, validating the application and\r
-*   jumping to the application.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "BL_PVT.h"\r
-\r
-#include "project.h"\r
-#include <string.h>\r
-\r
-\r
-/*******************************************************************************\r
-* The Checksum and SizeBytes are forcefully set in code. We then post process\r
-* the hex file from the linker and inject their values then. When the hex file\r
-* is loaded onto the device these two variables should have valid values.\r
-* Because the compiler can do optimizations remove the constant\r
-* accesses, these should not be accessed directly. Instead, the variables\r
-* CyBtldr_ChecksumAccess & CyBtldr_SizeBytesAccess should be used to get the\r
-* proper values at runtime.\r
-*******************************************************************************/\r
-#if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-    __attribute__((section (".bootloader")))\r
-#elif defined (__ICCARM__)\r
-    #pragma location=".bootloader"\r
-#endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-\r
-const uint8  CYCODE BL_Checksum = 0u;\r
-const uint8  CYCODE *BL_ChecksumAccess  = (const uint8  CYCODE *)(&BL_Checksum);\r
-\r
-#if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-    __attribute__((section (".bootloader")))\r
-#elif defined (__ICCARM__)\r
-    #pragma location=".bootloader"\r
-#endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-\r
-const uint32 CYCODE BL_SizeBytes = 0xFFFFFFFFu;\r
-const uint32 CYCODE *BL_SizeBytesAccess = (const uint32 CYCODE *)(&BL_SizeBytes);\r
-\r
-\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    uint8 BL_activeApp = BL_MD_BTLDB_ACTIVE_NONE;\r
-#else\r
-    #define BL_activeApp      (BL_MD_BTLDB_ACTIVE_0)\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/***************************************\r
-*     Function Prototypes\r
-***************************************/\r
-static cystatus BL_WritePacket(uint8 status, uint8 buffer[], uint16 size) CYSMALL \\r
-                                    ;\r
-\r
-static uint16   BL_CalcPacketChecksum(const uint8 buffer[], uint16 size) CYSMALL \\r
-                                    ;\r
-\r
-static uint8    BL_Calc8BitFlashSum(uint32 start, uint32 size) CYSMALL \\r
-                                    ;\r
-#if(!CY_PSOC4)\r
-static uint8    BL_Calc8BitEepromSum(uint32 start, uint32 size) CYSMALL \\r
-                                    ;\r
-#endif /* (!CY_PSOC4) */\r
-\r
-static void     BL_HostLink(uint8 timeOut) \\r
-                                    ;\r
-\r
-static void     BL_LaunchApplication(void) CYSMALL \\r
-                                    ;\r
-\r
-static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
-                                    ;\r
-\r
-static uint32   BL_GetMetadata(uint8 fieldName, uint8 appId)\\r
-                                    ;\r
-\r
-#if(!CY_PSOC3)\r
-    /* Implementation for the PSoC 3 resides in a BL_psoc3.a51 file.  */\r
-    static void     BL_LaunchBootloadable(uint32 appAddr);\r
-#endif  /* (!CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_CalcPacketChecksum\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This computes the 16 bit checksum for the provided number of bytes contained\r
-*  in the provided buffer\r
-*\r
-* Parameters:\r
-*  buffer:\r
-*     The buffer containing the data to compute the checksum for\r
-*  size:\r
-*     The number of bytes in buffer to compute the checksum for\r
-*\r
-* Returns:\r
-*  16 bit checksum for the provided data\r
-*\r
-*******************************************************************************/\r
-static uint16 BL_CalcPacketChecksum(const uint8 buffer[], uint16 size) \\r
-                    CYSMALL \r
-{\r
-    #if(0u != BL_PACKET_CHECKSUM_CRC)\r
-\r
-        uint16 CYDATA crc = BL_CRC_CCITT_INITIAL_VALUE;\r
-        uint16 CYDATA tmp;\r
-        uint8  CYDATA i;\r
-        uint16 CYDATA tmpIndex = size;\r
-\r
-        if(0u == size)\r
-        {\r
-            crc = ~crc;\r
-        }\r
-        else\r
-        {\r
-            do\r
-            {\r
-                tmp = buffer[tmpIndex - size];\r
-\r
-                for (i = 0u; i < 8u; i++)\r
-                {\r
-                    if (0u != ((crc & 0x0001u) ^ (tmp & 0x0001u)))\r
-                    {\r
-                        crc = (crc >> 1u) ^ BL_CRC_CCITT_POLYNOMIAL;\r
-                    }\r
-                    else\r
-                    {\r
-                        crc >>= 1u;\r
-                    }\r
-\r
-                    tmp >>= 1u;\r
-                }\r
-\r
-                size--;\r
-            }\r
-            while(0u != size);\r
-\r
-            crc = ~crc;\r
-            tmp = crc;\r
-            crc = ( uint16 )(crc << 8u) | (tmp >> 8u);\r
-        }\r
-\r
-        return(crc);\r
-\r
-    #else\r
-\r
-        uint16 CYDATA sum = 0u;\r
-\r
-        while (size > 0u)\r
-        {\r
-            sum += buffer[size - 1u];\r
-            size--;\r
-        }\r
-\r
-        return(( uint16 )1u + ( uint16 )(~sum));\r
-\r
-    #endif /* (0u != BL_PACKET_CHECKSUM_CRC) */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_Calc8BitFlashSum\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This computes the 8 bit sum for the provided number of bytes contained in\r
-*  flash.\r
-*\r
-* Parameters:\r
-*  start:\r
-*     The starting address to start summing data for\r
-*  size:\r
-*     The number of bytes to read and compute the sum for\r
-*\r
-* Returns:\r
-*   8 bit sum for the provided data\r
-*\r
-*******************************************************************************/\r
-static uint8 BL_Calc8BitFlashSum(uint32 start, uint32 size) \\r
-                CYSMALL \r
-{\r
-    uint8 CYDATA sum = 0u;\r
-\r
-    while (size > 0u)\r
-    {\r
-        size--;\r
-        sum += BL_GET_CODE_BYTE(start + size);\r
-    }\r
-\r
-    return(sum);\r
-}\r
-\r
-\r
-#if(!CY_PSOC4)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: BL_Calc8BitEepromSum\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This computes the 8 bit sum for the provided number of bytes contained in\r
-    *  EEPROM.\r
-    *\r
-    * Parameters:\r
-    *  start:\r
-    *     The starting address to start summing data for\r
-    *  size:\r
-    *     The number of bytes to read and compute the sum for\r
-    *\r
-    * Returns:\r
-    *   8 bit sum for the provided data\r
-    *\r
-    *******************************************************************************/\r
-    static uint8 BL_Calc8BitEepromSum(uint32 start, uint32 size) \\r
-                    CYSMALL \r
-    {\r
-        uint8 CYDATA sum = 0u;\r
-\r
-        while (size > 0u)\r
-        {\r
-            size--;\r
-            sum += BL_GET_EEPROM_BYTE(start + size);\r
-        }\r
-\r
-        return(sum);\r
-    }\r
-\r
-#endif  /* (!CY_PSOC4) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_Start\r
-********************************************************************************\r
-* Summary:\r
-*  This function is called in order executing following algorithm:\r
-*\r
-*  - Identify active bootloadable application (applicable only to\r
-*    Multi-application bootloader)\r
-*\r
-*  - Validate bootloader application (desing-time configurable, Bootloader\r
-*    application validation option of the component customizer)\r
-*\r
-*  - Validate active bootloadable application\r
-*\r
-*  - Run communication subroutine (desing-time configurable, Wait for command\r
-*    option of the component customizer)\r
-*\r
-*  - Schedule bootloadable and reset device\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  This method will never return. It will either load a new application and\r
-*  reset the device or it will jump directly to the existing application.\r
-*\r
-* Side Effects:\r
-*  If this method determines that the bootloader appliation itself is corrupt,\r
-*  this method will not return, instead it will simply hang the application.\r
-*\r
-*******************************************************************************/\r
-void BL_Start(void) CYSMALL \r
-{\r
-    #if(0u != BL_BOOTLOADER_APP_VALIDATION)\r
-        uint8 CYDATA calcedChecksum;\r
-    #endif    /* (0u != BL_BOOTLOADER_APP_VALIDATION) */\r
-\r
-    #if(!CY_PSOC4)\r
-        uint8 CYXDATA BL_flashBuffer[BL_FROW_SIZE];\r
-    #endif  /* (!CY_PSOC4) */\r
-\r
-    cystatus tmpStatus;\r
-\r
-\r
-    /* Identify active bootloadable application */\r
-    #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-\r
-        if(BL_MD_BTLDB_ACTIVE_VALUE(0u) == BL_MD_BTLDB_IS_ACTIVE)\r
-        {\r
-            BL_activeApp = BL_MD_BTLDB_ACTIVE_0;\r
-        }\r
-        else if (BL_MD_BTLDB_ACTIVE_VALUE(1u) == BL_MD_BTLDB_IS_ACTIVE)\r
-        {\r
-            BL_activeApp = BL_MD_BTLDB_ACTIVE_1;\r
-        }\r
-        else\r
-        {\r
-            BL_activeApp = BL_MD_BTLDB_ACTIVE_NONE;\r
-        }\r
-\r
-    #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-    /* Initialize Flash subsystem for non-PSoC 4 devices */\r
-    #if(!CY_PSOC4)\r
-        if (CYRET_SUCCESS != CySetTemp())\r
-        {\r
-            CyHalt(0x00u);\r
-        }\r
-\r
-        if (CYRET_SUCCESS != CySetFlashEEBuffer(BL_flashBuffer))\r
-        {\r
-            CyHalt(0x00u);\r
-        }\r
-    #endif  /* (CY_PSOC4) */\r
-\r
-\r
-    /***********************************************************************\r
-    * Bootloader Application Validation\r
-    *\r
-    * Halt device if:\r
-    *  - Calculated checksum does not much one stored in metadata section\r
-    *  - Invalid pointer to the place where bootloader application ends\r
-    *  - Flash subsystem where not initialized correctly\r
-    ***********************************************************************/\r
-    #if(0u != BL_BOOTLOADER_APP_VALIDATION)\r
-\r
-        /* Calculate Bootloader application checksum */\r
-        calcedChecksum = BL_Calc8BitFlashSum(BL_MD_BTLDR_ADDR_PTR,\r
-                *BL_SizeBytesAccess - BL_MD_BTLDR_ADDR_PTR);\r
-\r
-        /* we actually included the checksum, so remove it */\r
-        calcedChecksum -= *BL_ChecksumAccess;\r
-        calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
-\r
-        /* Checksum and pointer to bootloader verification */\r
-        if((calcedChecksum != *BL_ChecksumAccess) ||\r
-           (0u == *BL_SizeBytesAccess))\r
-        {\r
-            CyHalt(0x00u);\r
-        }\r
-\r
-    #endif  /* (0u != BL_BOOTLOADER_APP_VALIDATION) */\r
-\r
-\r
-    /***********************************************************************\r
-    * Active Bootloadable Application Validation\r
-    *\r
-    * If active bootloadable application is invalid or bootloader\r
-    * application is scheduled - do the following:\r
-    *  - schedule bootloader application to be run after software reset\r
-    *  - Go to the communication subroutine. Will wait for commands forever\r
-    ***********************************************************************/\r
-    tmpStatus = BL_ValidateBootloadable(BL_activeApp);\r
-\r
-    if ((BL_GET_RUN_TYPE == BL_START_BTLDR) ||\r
-        (CYRET_SUCCESS != tmpStatus))\r
-    {\r
-        BL_SET_RUN_TYPE(0u);\r
-\r
-        BL_HostLink(BL_WAIT_FOR_COMMAND_FOREVER);\r
-    }\r
-\r
-\r
-    /* Go to the communication subroutine. Will wait for commands specifed time */\r
-    #if(0u != BL_WAIT_FOR_COMMAND)\r
-\r
-        /* Timeout is in 100s of miliseconds */\r
-        BL_HostLink(BL_WAIT_FOR_COMMAND_TIME);\r
-\r
-    #endif  /* (0u != BL_WAIT_FOR_COMMAND) */\r
-\r
-\r
-    /* Schedule bootloadable application and perform software reset */\r
-    BL_LaunchApplication();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_LaunchApplication\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Jumps the PC to the start address of the user application in flash.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Returns:\r
-*  This method will never return if it succesfully goes to the user application.\r
-*\r
-*******************************************************************************/\r
-static void BL_LaunchApplication(void) CYSMALL \r
-{\r
-    /* Schedule Bootloadable to start after reset */\r
-    BL_SET_RUN_TYPE(BL_START_APP);\r
-\r
-    CySoftwareReset();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyBtldr_CheckLaunch\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine checks to see if the bootloader or the bootloadable application\r
-*  should be run.  If the application is to be run, it will start executing.\r
-*  If the bootloader is to be run, it will return so the bootloader can\r
-*  continue starting up.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Returns:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyBtldr_CheckLaunch(void) CYSMALL \r
-{\r
-\r
-#if(CY_PSOC4)\r
-\r
-    /*******************************************************************************\r
-    * Set cyBtldrRunType to zero in case of non-software reset occured. This means\r
-    * that bootloader application is scheduled - that is initial clean state. The\r
-    * value of cyBtldrRunType is valid only in case of software reset.\r
-    *******************************************************************************/\r
-    if (0u == (BL_RES_CAUSE_REG & BL_RES_CAUSE_RESET_SOFT))\r
-    {\r
-        cyBtldrRunType = 0u;\r
-    }\r
-\r
-#endif /* (CY_PSOC4) */\r
-\r
-\r
-    if (BL_GET_RUN_TYPE == BL_START_APP)\r
-    {\r
-        BL_SET_RUN_TYPE(0u);\r
-\r
-        /*******************************************************************************\r
-        * Indicates that we have told ourselves to jump to the application since we have\r
-        * already told ourselves to jump, we do not do any expensive verification of the\r
-        * application. We just check to make sure that the value at CY_APP_ADDR_ADDRESS\r
-        * is something other than 0.\r
-        *******************************************************************************/\r
-        if(0u != BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR, BL_activeApp))\r
-        {\r
-            /* Never return from this method */\r
-            BL_LaunchBootloadable(BL_GetMetadata(BL_GET_METADATA_BTLDB_ADDR,\r
-                                                                             BL_activeApp));\r
-        }\r
-    }\r
-}\r
-\r
-\r
-/* Moves the arguement appAddr (RO) into PC, moving execution to the appAddr */\r
-#if defined (__ARMCC_VERSION)\r
-\r
-    __asm static void BL_LaunchBootloadable(uint32 appAddr)\r
-    {\r
-        BX  R0\r
-        ALIGN\r
-    }\r
-\r
-#elif defined(__GNUC__)\r
-\r
-    __attribute__((noinline)) /* Workaround for GCC toolchain bug with inlining */\r
-    __attribute__((naked))\r
-    static void BL_LaunchBootloadable(uint32 appAddr)\r
-    {\r
-        __asm volatile("    BX  R0\n");\r
-    }\r
-\r
-#elif defined (__ICCARM__)\r
-\r
-    static void BL_LaunchBootloadable(uint32 appAddr)\r
-    {\r
-        __asm volatile("    BX  R0\n");\r
-    }\r
-\r
-#endif  /* (__ARMCC_VERSION) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_ValidateBootloadable\r
-********************************************************************************\r
-* Summary:\r
-*  This routine computes the checksum, zero check, 0xFF check of the\r
-*  application area to determine whether a valid application is loaded.\r
-*\r
-* Parameters:\r
-*  appId:\r
-*      The application number to verify\r
-*\r
-* Returns:\r
-*  CYRET_SUCCESS  - if successful\r
-*  CYRET_BAD_DATA - if the bootloadable is corrupt\r
-*\r
-*******************************************************************************/\r
-static cystatus BL_ValidateBootloadable(uint8 appId) CYSMALL \\r
-\r
-    {\r
-        uint32 CYDATA idx;\r
-\r
-        uint32 CYDATA end   = BL_FIRST_APP_BYTE(appId) +\r
-                                BL_GetMetadata(BL_GET_METADATA_BTLDB_LENGTH,\r
-                                                       appId);\r
-\r
-        CYBIT         valid = 0u; /* Assume bad flash image */\r
-        uint8  CYDATA calcedChecksum = 0u;\r
-\r
-\r
-        #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-\r
-            if(appId > 1u)\r
-            {\r
-                return(CYRET_BAD_DATA);\r
-            }\r
-\r
-        #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-        #if(0u != BL_FAST_APP_VALIDATION)\r
-\r
-            if(BL_MD_BTLDB_VERIFIED_VALUE(appId) == BL_MD_BTLDB_IS_VERIFIED)\r
-            {\r
-                return(CYRET_SUCCESS);\r
-            }\r
-\r
-        #endif  /* (0u != BL_FAST_APP_VALIDATION) */\r
-\r
-\r
-        /* Calculate checksum of bootloadable image */\r
-        for(idx = BL_FIRST_APP_BYTE(appId); idx < end; ++idx)\r
-        {\r
-            uint8 CYDATA curByte = BL_GET_CODE_BYTE(idx);\r
-\r
-            if((curByte != 0u) && (curByte != 0xFFu))\r
-            {\r
-                valid = 1u;\r
-            }\r
-\r
-            calcedChecksum += curByte;\r
-        }\r
-\r
-\r
-        /***************************************************************************\r
-        * We do not compute checksum over the meta data section, so no need to\r
-        * subtract off App Verified or App Active information here like we do when\r
-        * verifying a row.\r
-        ***************************************************************************/\r
-\r
-\r
-        #if((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u))\r
-\r
-            /* Add ECC data to checksum */\r
-            idx = ((BL_FIRST_APP_BYTE(appId)) >> 3u);\r
-\r
-            /* Flash may run into meta data, ECC does not so use full row */\r
-            end = (end == (CY_FLASH_SIZE - BL_MD_SIZEOF))\r
-                ? (CY_FLASH_SIZE >> 3u)\r
-                : (end >> 3u);\r
-\r
-            for (; idx < end; ++idx)\r
-            {\r
-                calcedChecksum += CY_GET_XTND_REG8((volatile uint8 *)(CYDEV_ECC_BASE + idx));\r
-            }\r
-\r
-        #endif  /* ((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u)) */\r
-\r
-\r
-        calcedChecksum = ( uint8 )1u + ( uint8 )(~calcedChecksum);\r
-\r
-        if((calcedChecksum != BL_MD_BTLDB_CHECKSUM_VALUE(appId)) ||\r
-           (0u == valid))\r
-        {\r
-            return(CYRET_BAD_DATA);\r
-        }\r
-\r
-\r
-        #if(0u != BL_FAST_APP_VALIDATION)\r
-            BL_SetFlashByte((uint32) BL_MD_BTLDB_VERIFIED_OFFSET(appId),\r
-                                          BL_MD_BTLDB_IS_VERIFIED);\r
-        #endif  /* (0u != BL_FAST_APP_VALIDATION) */\r
-\r
-\r
-        return(CYRET_SUCCESS);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_HostLink\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Causes the bootloader to attempt to read data being transmitted by the\r
-*  host application.  If data is sent from the host, this establishes the\r
-*  communication interface to process all requests.\r
-*\r
-* Parameters:\r
-*  timeOut:\r
-*   The amount of time to listen for data before giving up. Timeout is\r
-*   measured in 10s of ms.  Use 0 for infinite wait.\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-static void BL_HostLink(uint8 timeOut) \r
-{\r
-    uint16    CYDATA numberRead;\r
-    uint16    CYDATA rspSize;\r
-    uint8     CYDATA ackCode;\r
-    uint16    CYDATA pktChecksum;\r
-    cystatus  CYDATA readStat;\r
-    uint16    CYDATA pktSize    = 0u;\r
-    uint16    CYDATA dataOffset = 0u;\r
-    uint8     CYDATA timeOutCnt = 10u;\r
-\r
-    #if(0u == BL_DUAL_APP_BOOTLOADER)\r
-        uint8 CYDATA clearedMetaData = 0u;\r
-    #endif  /* (0u == BL_DUAL_APP_BOOTLOADER) */\r
-\r
-    CYBIT     communicationState = BL_COMMUNICATION_STATE_IDLE;\r
-\r
-    uint8     packetBuffer[BL_SIZEOF_COMMAND_BUFFER];\r
-    uint8     dataBuffer  [BL_SIZEOF_COMMAND_BUFFER];\r
-\r
-\r
-    /* Initialize communications channel. */\r
-    CyBtldrCommStart();\r
-\r
-    /* Enable global interrupts */\r
-    CyGlobalIntEnable;\r
-\r
-    do\r
-    {\r
-        ackCode = CYRET_SUCCESS;\r
-\r
-        do\r
-        {\r
-            readStat = CyBtldrCommRead(packetBuffer,\r
-                                        BL_SIZEOF_COMMAND_BUFFER,\r
-                                        &numberRead,\r
-                                        (0u == timeOut) ? 0xFFu : timeOut);\r
-            if (0u != timeOut)\r
-            {\r
-                timeOutCnt--;\r
-            }\r
-\r
-        } while ( (0u != timeOutCnt) && (readStat != CYRET_SUCCESS) );\r
-\r
-\r
-        if( readStat != CYRET_SUCCESS )\r
-        {\r
-            continue;\r
-        }\r
-\r
-        if((numberRead < BL_MIN_PKT_SIZE) ||\r
-           (packetBuffer[BL_SOP_ADDR] != BL_SOP))\r
-        {\r
-            ackCode = BL_ERR_DATA;\r
-        }\r
-        else\r
-        {\r
-            pktSize = ((uint16)((uint16)packetBuffer[BL_SIZE_ADDR + 1u] << 8u)) |\r
-                               packetBuffer[BL_SIZE_ADDR];\r
-\r
-            pktChecksum = ((uint16)((uint16)packetBuffer[BL_CHK_ADDR(pktSize) + 1u] << 8u)) |\r
-                                   packetBuffer[BL_CHK_ADDR(pktSize)];\r
-\r
-            if((pktSize + BL_MIN_PKT_SIZE) > numberRead)\r
-            {\r
-                ackCode = BL_ERR_LENGTH;\r
-            }\r
-            else if(packetBuffer[BL_EOP_ADDR(pktSize)] != BL_EOP)\r
-            {\r
-                ackCode = BL_ERR_DATA;\r
-            }\r
-            else if(pktChecksum != BL_CalcPacketChecksum(packetBuffer,\r
-                                                                        pktSize + BL_DATA_ADDR))\r
-            {\r
-                ackCode = BL_ERR_CHECKSUM;\r
-            }\r
-            else\r
-            {\r
-                /* Empty section */\r
-            }\r
-        }\r
-\r
-        rspSize = 0u;\r
-        if(ackCode == CYRET_SUCCESS)\r
-        {\r
-            uint8 CYDATA btldrData = packetBuffer[BL_DATA_ADDR];\r
-\r
-            ackCode = BL_ERR_DATA;\r
-            switch(packetBuffer[BL_CMD_ADDR])\r
-            {\r
-\r
-\r
-            /***************************************************************************\r
-            *   Get metadata\r
-            ***************************************************************************/\r
-            #if(0u != BL_CMD_GET_METADATA)\r
-\r
-                case BL_COMMAND_GET_METADATA:\r
-\r
-                    if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
-                    {\r
-                        if (btldrData >= BL_MAX_NUM_OF_BTLDB)\r
-                        {\r
-                            ackCode = BL_ERR_APP;\r
-                        }\r
-                        else if(CYRET_SUCCESS == BL_ValidateBootloadable(btldrData))\r
-                        {\r
-                            #if(CY_PSOC3)\r
-                                (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-                                            ((uint8  CYCODE *) (BL_META_BASE(btldrData))), 56);\r
-                            #else\r
-                                (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-                                            (uint8 *) BL_META_BASE(btldrData), 56u);\r
-                            #endif  /* (CY_PSOC3) */\r
-\r
-                            rspSize = 56u;\r
-                            ackCode = CYRET_SUCCESS;\r
-                        }\r
-                        else\r
-                        {\r
-                            ackCode = BL_ERR_APP;\r
-                        }\r
-                    }\r
-                    break;\r
-\r
-            #endif  /* (0u != BL_CMD_GET_METADATA) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Verify checksum\r
-            ***************************************************************************/\r
-            case BL_COMMAND_CHECKSUM:\r
-\r
-                if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 0u))\r
-                {\r
-                    packetBuffer[BL_DATA_ADDR] =\r
-                            (uint8)(BL_ValidateBootloadable(BL_activeApp) == CYRET_SUCCESS);\r
-\r
-                    rspSize = 1u;\r
-                    ackCode = CYRET_SUCCESS;\r
-                }\r
-                break;\r
-\r
-\r
-            /***************************************************************************\r
-            *   Get flash size\r
-            ***************************************************************************/\r
-            #if(0u != BL_CMD_GET_FLASH_SIZE_AVAIL)\r
-\r
-                case BL_COMMAND_REPORT_SIZE:\r
-\r
-                    if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
-                    {\r
-                        /* btldrData holds flash array ID sent by host */\r
-                        if(btldrData < BL_NUM_OF_FLASH_ARRAYS)\r
-                        {\r
-                            #if (1u == BL_NUM_OF_FLASH_ARRAYS)\r
-                                uint16 CYDATA startRow = (uint16)*BL_SizeBytesAccess / CYDEV_FLS_ROW_SIZE;\r
-                            #else\r
-                                uint16 CYDATA startRow = 0u;\r
-                            #endif  /* (1u == BL_NUM_OF_FLASH_ARRAYS) */\r
-\r
-                            packetBuffer[BL_DATA_ADDR]      = LO8(startRow);\r
-                            packetBuffer[BL_DATA_ADDR + 1u] = HI8(startRow);\r
-                            packetBuffer[BL_DATA_ADDR + 2u] = LO8(CY_FLASH_NUMBER_ROWS - 1u);\r
-                            packetBuffer[BL_DATA_ADDR + 3u] = HI8(CY_FLASH_NUMBER_ROWS - 1u);\r
-\r
-                            rspSize = 4u;\r
-                            ackCode = CYRET_SUCCESS;\r
-                        }\r
-\r
-                    }\r
-                    break;\r
-\r
-            #endif  /* (0u != BL_CMD_GET_FLASH_SIZE_AVAIL) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Get application status\r
-            ***************************************************************************/\r
-            #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-\r
-                #if(0u != BL_CMD_GET_APP_STATUS_AVAIL)\r
-\r
-                    case BL_COMMAND_APP_STATUS:\r
-\r
-                        if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
-                        {\r
-\r
-                            packetBuffer[BL_DATA_ADDR] =\r
-                                (uint8)BL_ValidateBootloadable(btldrData);\r
-\r
-                            packetBuffer[BL_DATA_ADDR + 1u] =\r
-                                (uint8)BL_MD_BTLDB_ACTIVE_VALUE(btldrData);\r
-\r
-                            rspSize = 2u;\r
-                            ackCode = CYRET_SUCCESS;\r
-                        }\r
-                        break;\r
-\r
-                #endif  /* (0u != BL_CMD_GET_APP_STATUS_AVAIL) */\r
-\r
-            #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Program / Erase row\r
-            ***************************************************************************/\r
-            case BL_COMMAND_PROGRAM:\r
-\r
-            /* The btldrData variable holds Flash Array ID */\r
-\r
-        #if (0u != BL_CMD_ERASE_ROW_AVAIL)\r
-\r
-            case BL_COMMAND_ERASE:\r
-                if (BL_COMMAND_ERASE == packetBuffer[BL_CMD_ADDR])\r
-                {\r
-                    if ((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
-                    {\r
-                        #if(!CY_PSOC4)\r
-                            if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
-                               (btldrData <= BL_LAST_EE_ARRAYID))\r
-                            {\r
-                                /* Size of EEPROM row */\r
-                                dataOffset = CY_EEPROM_SIZEOF_ROW;\r
-                            }\r
-                            else\r
-                            {\r
-                                /* Size of FLASH row (depends on ECC configuration) */\r
-                                dataOffset = BL_FROW_SIZE;\r
-                            }\r
-                        #else\r
-                            /* Size of FLASH row (no ECC available) */\r
-                            dataOffset = BL_FROW_SIZE;\r
-                        #endif  /* (!CY_PSOC4) */\r
-\r
-                        #if(CY_PSOC3)\r
-                            (void) memset(dataBuffer, (char8) 0, (int16) dataOffset);\r
-                        #else\r
-                            (void) memset(dataBuffer, 0, dataOffset);\r
-                        #endif  /* (CY_PSOC3) */\r
-                    }\r
-                    else\r
-                    {\r
-                        break;\r
-                    }\r
-                }\r
-\r
-        #endif  /* (0u != BL_CMD_ERASE_ROW_AVAIL) */\r
-\r
-\r
-                if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize >= 3u))\r
-                {\r
-\r
-                    /* The command may be sent along with the last block of data, to program the row. */\r
-                    #if(CY_PSOC3)\r
-                        (void) memcpy(&dataBuffer[dataOffset],\r
-                                      &packetBuffer[BL_DATA_ADDR + 3u],\r
-                                      ( int16 )pktSize - 3);\r
-                    #else\r
-                        (void) memcpy(&dataBuffer[dataOffset],\r
-                                      &packetBuffer[BL_DATA_ADDR + 3u],\r
-                                      pktSize - 3u);\r
-                    #endif  /* (CY_PSOC3) */\r
-\r
-                    dataOffset += (pktSize - 3u);\r
-\r
-                    #if(!CY_PSOC4)\r
-                        if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
-                           (btldrData <= BL_LAST_EE_ARRAYID))\r
-                        {\r
-\r
-                            CyEEPROM_Start();\r
-\r
-                            /* Size of EEPROM row */\r
-                            pktSize = CY_EEPROM_SIZEOF_ROW;\r
-                        }\r
-                        else\r
-                        {\r
-                            /* Size of FLASH row (depends on ECC configuration) */\r
-                            pktSize = BL_FROW_SIZE;\r
-                        }\r
-                    #else\r
-                        /* Size of FLASH row (no ECC available) */\r
-                        pktSize = BL_FROW_SIZE;\r
-                    #endif  /* (!CY_PSOC4) */\r
-\r
-\r
-                    /* Check if we have all data to program */\r
-                    if(dataOffset == pktSize)\r
-                    {\r
-                        /* Get FLASH/EEPROM row number */\r
-                        dataOffset = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)) |\r
-                                              packetBuffer[BL_DATA_ADDR + 1u];\r
-\r
-                        #if(!CY_PSOC4)\r
-                            if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
-                            {\r
-                        #endif  /* (!CY_PSOC4) */\r
-\r
-                        #if(0u == BL_DUAL_APP_BOOTLOADER)\r
-\r
-                            if(0u == clearedMetaData)\r
-                            {\r
-                                /* Metadata section must be filled with zeroes */\r
-\r
-                                uint8 erase[BL_FROW_SIZE];\r
-\r
-                                #if(CY_PSOC3)\r
-                                    (void) memset(erase, (char8) 0, (int16) BL_FROW_SIZE);\r
-                                #else\r
-                                    (void) memset(erase, 0, BL_FROW_SIZE);\r
-                                #endif  /* (CY_PSOC3) */\r
-\r
-                                #if(CY_PSOC4)\r
-                                    (void) CySysFlashWriteRow(BL_MD_ROW, erase);\r
-                                #else\r
-                                    (void) CyWriteRowFull((uint8)  BL_MD_FLASH_ARRAY_NUM,\r
-                                                          (uint16) BL_MD_ROW,\r
-                                                                    erase,\r
-                                                                    BL_FROW_SIZE);\r
-                                #endif  /* (CY_PSOC4) */\r
-\r
-                                /* Set up flag that metadata was cleared */\r
-                                clearedMetaData = 1u;\r
-                            }\r
-\r
-                        #else\r
-\r
-                            if(BL_activeApp < BL_MD_BTLDB_ACTIVE_NONE)\r
-                            {\r
-                                /* First active bootloadable application row */\r
-                                uint16 firstRow = (uint16) 1u +\r
-                                    (uint16) BL_GetMetadata(BL_GET_METADATA_BTLDR_LAST_ROW,\r
-                                                                          BL_activeApp);\r
-\r
-                                #if(CY_PSOC4)\r
-                                    uint16 row = dataOffset;\r
-                                #else\r
-                                    uint16 row = (uint16)(btldrData * (CYDEV_FLS_SECTOR_SIZE / CYDEV_FLS_ROW_SIZE)) +\r
-                                                  dataOffset;\r
-                                #endif  /* (CY_PSOC4) */\r
-\r
-\r
-                                /*******************************************************************************\r
-                                * Last row is equal to the first row plus the number of rows available for each\r
-                                * app. To compute this, we first subtract the number of appliaction images from\r
-                                * the total flash rows: (CY_FLASH_NUMBER_ROWS - 2u).\r
-                                *\r
-                                * Then subtract off the first row:\r
-                                * App Rows = (CY_FLASH_NUMBER_ROWS - 2u - firstRow)\r
-                                * Then divide that number by the number of application that must fit within the\r
-                                * space, if we are app1 then that number is 2, if app2 then 1.  Our divisor is\r
-                                * then: (2u - BL_activeApp).\r
-                                *\r
-                                * Adding this number to firstRow gives the address right beyond our valid range\r
-                                * so we subtract 1.\r
-                                *******************************************************************************/\r
-                                uint16 lastRow = (firstRow - 1u) +\r
-                                                  ((uint16)((CYDEV_FLASH_SIZE / CYDEV_FLS_ROW_SIZE) - 2u - firstRow) /\r
-                                                  ((uint16)2u - (uint16)BL_activeApp));\r
-\r
-\r
-                                /*******************************************************************************\r
-                                * Check to see if the row to program is within the range of the active\r
-                                * application, or if it maches the active application's metadata row.  If so,\r
-                                * refuse to program as it would corrupt the active app.\r
-                                *******************************************************************************/\r
-                                if(((row >= firstRow) && (row <= lastRow)) ||\r
-                                   ((btldrData == BL_MD_FLASH_ARRAY_NUM) &&\r
-                                   (dataOffset == BL_MD_ROW_NUM(BL_activeApp))))\r
-                                {\r
-                                    ackCode = BL_ERR_ACTIVE;\r
-                                    dataOffset = 0u;\r
-                                    break;\r
-                                }\r
-                            }\r
-\r
-                        #endif  /* (0u == BL_DUAL_APP_BOOTLOADER) */\r
-\r
-                        #if(!CY_PSOC4)\r
-                            }\r
-                        #endif  /* (!CY_PSOC4) */\r
-\r
-                        #if(CY_PSOC4)\r
-\r
-                            ackCode = (CYRET_SUCCESS != CySysFlashWriteRow((uint32) dataOffset, dataBuffer)) \\r
-                                ? BL_ERR_ROW \\r
-                                : CYRET_SUCCESS;\r
-\r
-                        #else\r
-\r
-                            ackCode = (CYRET_SUCCESS != CyWriteRowFull(btldrData, dataOffset, dataBuffer, pktSize)) \\r
-                                ? BL_ERR_ROW \\r
-                                : CYRET_SUCCESS;\r
-\r
-                        #endif  /* (CY_PSOC4) */\r
-\r
-                    }\r
-                    else\r
-                    {\r
-                        ackCode = BL_ERR_LENGTH;\r
-                    }\r
-\r
-                    dataOffset = 0u;\r
-                }\r
-                break;\r
-\r
-\r
-            /***************************************************************************\r
-            *   Sync bootloader\r
-            ***************************************************************************/\r
-            #if(0u != BL_CMD_SYNC_BOOTLOADER_AVAIL)\r
-\r
-            case BL_COMMAND_SYNC:\r
-\r
-                if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
-                {\r
-                    /* If something failed the host would send this command to reset the bootloader. */\r
-                    dataOffset = 0u;\r
-\r
-                    /* Don't ack the packet, just get ready to accept the next one */\r
-                    continue;\r
-                }\r
-                break;\r
-\r
-            #endif  /* (0u != BL_CMD_SYNC_BOOTLOADER_AVAIL) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Set active application\r
-            ***************************************************************************/\r
-            #if(0u != BL_DUAL_APP_BOOTLOADER)\r
-\r
-                case BL_COMMAND_APP_ACTIVE:\r
-\r
-                    if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 1u))\r
-                    {\r
-                        if(CYRET_SUCCESS == BL_ValidateBootloadable(btldrData))\r
-                        {\r
-                            uint8 CYDATA idx;\r
-\r
-                            for(idx = 0u; idx < BL_MAX_NUM_OF_BTLDB; idx++)\r
-                            {\r
-                                BL_SetFlashByte((uint32) BL_MD_BTLDB_ACTIVE_OFFSET(idx),\r
-                                                              (uint8 )(idx == btldrData));\r
-                            }\r
-                            BL_activeApp = btldrData;\r
-                            ackCode = CYRET_SUCCESS;\r
-                        }\r
-                        else\r
-                        {\r
-                            ackCode = BL_ERR_APP;\r
-                        }\r
-                    }\r
-                    break;\r
-\r
-            #endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Send data\r
-            ***************************************************************************/\r
-            #if (0u != BL_CMD_SEND_DATA_AVAIL)\r
-\r
-                case BL_COMMAND_DATA:\r
-\r
-                    if(BL_COMMUNICATION_STATE_ACTIVE == communicationState)\r
-                    {\r
-                        /*  Make sure that dataOffset is valid before copying the data */\r
-                        if((dataOffset + pktSize) <= BL_SIZEOF_COMMAND_BUFFER)\r
-                        {\r
-                            ackCode = CYRET_SUCCESS;\r
-\r
-                            #if(CY_PSOC3)\r
-                                (void) memcpy(&dataBuffer[dataOffset],\r
-                                              &packetBuffer[BL_DATA_ADDR],\r
-                                              ( int16 )pktSize);\r
-                            #else\r
-                                (void) memcpy(&dataBuffer[dataOffset],\r
-                                              &packetBuffer[BL_DATA_ADDR],\r
-                                              pktSize);\r
-                            #endif  /* (CY_PSOC3) */\r
-\r
-                            dataOffset += pktSize;\r
-                        }\r
-                        else\r
-                        {\r
-                            ackCode = BL_ERR_LENGTH;\r
-                        }\r
-                    }\r
-\r
-                    break;\r
-\r
-            #endif  /* (0u != BL_CMD_SEND_DATA_AVAIL) */\r
-\r
-\r
-            /***************************************************************************\r
-            *   Enter bootloader\r
-            ***************************************************************************/\r
-            case BL_COMMAND_ENTER:\r
-\r
-                if(pktSize == 0u)\r
-                {\r
-                    #if(CY_PSOC3)\r
-\r
-                        BL_ENTER CYDATA BtldrVersion =\r
-                            {CYSWAP_ENDIAN32(CYDEV_CHIP_JTAG_ID), CYDEV_CHIP_REV_EXPECT, BL_VERSION};\r
-\r
-                    #else\r
-\r
-                        BL_ENTER CYDATA BtldrVersion =\r
-                            {CYDEV_CHIP_JTAG_ID, CYDEV_CHIP_REV_EXPECT, BL_VERSION};\r
-\r
-                    #endif  /* (CY_PSOC3) */\r
-\r
-                    communicationState = BL_COMMUNICATION_STATE_ACTIVE;\r
-\r
-                    rspSize = sizeof(BL_ENTER);\r
-\r
-                    #if(CY_PSOC3)\r
-                        (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-                                      &BtldrVersion,\r
-                                      ( int16 )rspSize);\r
-                    #else\r
-                        (void) memcpy(&packetBuffer[BL_DATA_ADDR],\r
-                                      &BtldrVersion,\r
-                                      rspSize);\r
-                    #endif  /* (CY_PSOC3) */\r
-\r
-                    ackCode = CYRET_SUCCESS;\r
-                }\r
-                break;\r
-\r
-\r
-            /***************************************************************************\r
-            *   Verify row\r
-            ***************************************************************************/\r
-            case BL_COMMAND_VERIFY:\r
-\r
-                if((BL_COMMUNICATION_STATE_ACTIVE == communicationState) && (pktSize == 3u))\r
-                {\r
-                    /* Get FLASH/EEPROM row number */\r
-                    uint16 CYDATA rowNum = ((uint16)((uint16)packetBuffer[BL_DATA_ADDR + 2u] << 8u)) |\r
-                                                    packetBuffer[BL_DATA_ADDR + 1u];\r
-\r
-                    #if(!CY_PSOC4)\r
-\r
-                        uint32 CYDATA rowAddr;\r
-                        uint8 CYDATA checksum;\r
-\r
-                        if((btldrData >= BL_FIRST_EE_ARRAYID) &&\r
-                           (btldrData <= BL_LAST_EE_ARRAYID))\r
-                        {\r
-                            /* EEPROM */\r
-                            /* Both PSoC 3 and PSoC 5LP architectures have one EEPROM array. */\r
-                            rowAddr = (uint32)rowNum * CYDEV_EEPROM_ROW_SIZE;\r
-\r
-                            checksum = BL_Calc8BitEepromSum(rowAddr, CYDEV_EEPROM_ROW_SIZE);\r
-                        }\r
-                        else\r
-                        {\r
-                            /* FLASH */\r
-                            rowAddr = ((uint32)btldrData * CYDEV_FLS_SECTOR_SIZE)\r
-                                       + ((uint32)rowNum * CYDEV_FLS_ROW_SIZE);\r
-\r
-                            checksum = BL_Calc8BitFlashSum(rowAddr, CYDEV_FLS_ROW_SIZE);\r
-                        }\r
-\r
-                    #else\r
-\r
-                        uint32 CYDATA rowAddr = ((uint32)btldrData * CYDEV_FLS_SECTOR_SIZE)\r
-                                            + ((uint32)rowNum * CYDEV_FLS_ROW_SIZE);\r
-\r
-                        uint8 CYDATA checksum = BL_Calc8BitFlashSum(rowAddr, CYDEV_FLS_ROW_SIZE);\r
-\r
-                    #endif  /* (!CY_PSOC4) */\r
-\r
-\r
-                    /* Calculate checksum on data from ECC */\r
-                    #if(!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u)\r
-\r
-                        if(btldrData <= BL_LAST_FLASH_ARRAYID)\r
-                        {\r
-                            uint16 CYDATA tmpIndex;\r
-\r
-                            rowAddr = CYDEV_ECC_BASE + ((uint32)btldrData * (CYDEV_FLS_SECTOR_SIZE / 8u))\r
-                                        + ((uint32)rowNum * CYDEV_ECC_ROW_SIZE);\r
-\r
-                            for(tmpIndex = 0u; tmpIndex < CYDEV_ECC_ROW_SIZE; tmpIndex++)\r
-                            {\r
-                                checksum += CY_GET_XTND_REG8((uint8 CYFAR *)(rowAddr + tmpIndex));\r
-                            }\r
-                        }\r
-\r
-                    #endif  /* (!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0u) */\r
-\r
-\r
-                    /*******************************************************************************\r
-                    * App Verified & App Active are information that is updated in flash at runtime\r
-                    * remove these items from the checksum to allow the host to verify everything is\r
-                    * correct.\r
-                     ******************************************************************************/\r
-                    if((BL_MD_FLASH_ARRAY_NUM == btldrData) &&\r
-                       (BL_CONTAIN_METADATA(rowNum)))\r
-                    {\r
-                        checksum -= BL_MD_BTLDB_ACTIVE_VALUE  (BL_GET_APP_ID(rowNum));\r
-                        checksum -= BL_MD_BTLDB_VERIFIED_VALUE(BL_GET_APP_ID(rowNum));\r
-                    }\r
-\r
-                    packetBuffer[BL_DATA_ADDR] = (uint8)1u + (uint8)(~checksum);\r
-                    ackCode = CYRET_SUCCESS;\r
-                    rspSize = 1u;\r
-                }\r
-                break;\r
-\r
-\r
-            /***************************************************************************\r
-            *   Exit bootloader\r
-            ***************************************************************************/\r
-            case BL_COMMAND_EXIT:\r
-\r
-                if(CYRET_SUCCESS == BL_ValidateBootloadable(BL_activeApp))\r
-                {\r
-                    BL_SET_RUN_TYPE(BL_START_APP);\r
-                }\r
-\r
-                CySoftwareReset();\r
-\r
-                /* Will never get here */\r
-                break;\r
-\r
-\r
-            /***************************************************************************\r
-            *   Unsupported command\r
-            ***************************************************************************/\r
-            default:\r
-                ackCode = BL_ERR_CMD;\r
-                break;\r
-            }\r
-        }\r
-\r
-        /* ?CK the packet and function. */\r
-        (void) BL_WritePacket(ackCode, packetBuffer, rspSize);\r
-\r
-    } while ((0u == timeOut) || (BL_COMMUNICATION_STATE_ACTIVE == communicationState));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_WritePacket\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Creates a bootloader responce packet and transmits it back to the bootloader\r
-*  host application over the already established communications protocol.\r
-*\r
-* Parameters:\r
-*  status:\r
-*      The status code to pass back as the second byte of the packet\r
-*  buffer:\r
-*      The buffer containing the data portion of the packet\r
-*  size:\r
-*      The number of bytes contained within the buffer to pass back\r
-*\r
-* Return:\r
-*   CYRET_SUCCESS if successful.\r
-*   CYRET_UNKNOWN if there was an error tranmitting the packet.\r
-*\r
-*******************************************************************************/\r
-static cystatus BL_WritePacket(uint8 status, uint8 buffer[], uint16 size) CYSMALL \\r
-                                            \r
-{\r
-    uint16 CYDATA checksum;\r
-\r
-    /* Start of the packet. */\r
-    buffer[BL_SOP_ADDR]      = BL_SOP;\r
-    buffer[BL_CMD_ADDR]      = status;\r
-    buffer[BL_SIZE_ADDR]     = LO8(size);\r
-    buffer[BL_SIZE_ADDR + 1u] = HI8(size);\r
-\r
-    /* Compute the checksum. */\r
-    checksum = BL_CalcPacketChecksum(buffer, size + BL_DATA_ADDR);\r
-\r
-    buffer[BL_CHK_ADDR(size)]     = LO8(checksum);\r
-    buffer[BL_CHK_ADDR(1u + size)] = HI8(checksum);\r
-    buffer[BL_EOP_ADDR(size)]     = BL_EOP;\r
-\r
-    /* Start the packet transmit. */\r
-    return(CyBtldrCommWrite(buffer, size + BL_MIN_PKT_SIZE, &size, 150u));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_SetFlashByte\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Writes byte a flash memory location\r
-*\r
-* Parameters:\r
-*  address:\r
-*      Address in Flash memory where data will be written\r
-*\r
-*  runType:\r
-*      Byte to be written\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void BL_SetFlashByte(uint32 address, uint8 runType) \r
-{\r
-    uint32 flsAddr = address - CYDEV_FLASH_BASE;\r
-    uint8  rowData[CYDEV_FLS_ROW_SIZE];\r
-\r
-    #if !(CY_PSOC4)\r
-        uint8 arrayId = ( uint8 )(flsAddr / CYDEV_FLS_SECTOR_SIZE);\r
-    #endif  /* !(CY_PSOC4) */\r
-\r
-    uint16 rowNum = ( uint16 )((flsAddr % CYDEV_FLS_SECTOR_SIZE) / CYDEV_FLS_ROW_SIZE);\r
-    uint32 baseAddr = address - (address % CYDEV_FLS_ROW_SIZE);\r
-    uint16 idx;\r
-\r
-    for(idx = 0u; idx < CYDEV_FLS_ROW_SIZE; idx++)\r
-    {\r
-        rowData[idx] = BL_GET_CODE_BYTE(baseAddr + idx);\r
-    }\r
-\r
-    rowData[address % CYDEV_FLS_ROW_SIZE] = runType;\r
-\r
-    #if(CY_PSOC4)\r
-        (void) CySysFlashWriteRow((uint32) rowNum, rowData);\r
-    #else\r
-        (void) CyWriteRowData(arrayId, rowNum, rowData);\r
-    #endif  /* (CY_PSOC4) */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: BL_GetMetadata\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns value of the multi-byte field.\r
-*\r
-* Parameters:\r
-*  fieldName:\r
-*   The field to get data from:\r
-*     BL_GET_METADATA_BTLDB_ADDR\r
-*     BL_GET_METADATA_BTLDR_LAST_ROW\r
-*     BL_GET_METADATA_BTLDB_LENGTH\r
-*     BL_GET_METADATA_BTLDR_APP_VERSION\r
-*     BL_GET_METADATA_BTLDB_APP_VERSION\r
-*     BL_GET_METADATA_BTLDB_APP_ID\r
-*     BL_GET_METADATA_BTLDB_APP_CUST_ID\r
-*\r
-*  appId:\r
-*   Number of the bootlodable application.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-static uint32 BL_GetMetadata(uint8 fieldName, uint8 appId)\r
-{\r
-    uint32 fieldPtr;\r
-    uint8  fieldSize = 2u;\r
-    uint32 result;\r
-\r
-    switch (fieldName)\r
-    {\r
-    case BL_GET_METADATA_BTLDB_APP_CUST_ID:\r
-        fieldPtr  = BL_MD_BTLDB_APP_CUST_ID_OFFSET(appId);\r
-        fieldSize = 4u;\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDR_APP_VERSION:\r
-        fieldPtr  = BL_MD_BTLDR_APP_VERSION_OFFSET(appId);\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDB_ADDR:\r
-        fieldPtr  = BL_MD_BTLDB_ADDR_OFFSET(appId);\r
-    #if(!CY_PSOC3)\r
-        fieldSize = 4u;\r
-    #endif  /* (!CY_PSOC3) */\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDR_LAST_ROW:\r
-        fieldPtr  = BL_MD_BTLDR_LAST_ROW_OFFSET(appId);\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDB_LENGTH:\r
-        fieldPtr  = BL_MD_BTLDB_LENGTH_OFFSET(appId);\r
-    #if(!CY_PSOC3)\r
-        fieldSize = 4u;\r
-    #endif  /* (!CY_PSOC3) */\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDB_APP_VERSION:\r
-        fieldPtr  = BL_MD_BTLDB_APP_VERSION_OFFSET(appId);\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDB_APP_ID:\r
-        fieldPtr  = BL_MD_BTLDB_APP_ID_OFFSET(appId);\r
-        break;\r
-\r
-    default:\r
-        /* Should never be here */\r
-        CYASSERT(0u != 0u);\r
-        fieldPtr  = 0u;\r
-        break;\r
-    }\r
-\r
-\r
-    /* Read all fields as big-endian */\r
-    if (2u == fieldSize)\r
-    {\r
-        result =  (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u));\r
-        result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *) fieldPtr      ) <<  8u;\r
-    }\r
-    else\r
-    {\r
-        result =  (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 3u));\r
-        result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 2u)) <<  8u;\r
-        result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr + 1u)) << 16u;\r
-        result |= (uint32) CY_GET_XTND_REG8((volatile uint8 *)(fieldPtr     )) << 24u;\r
-    }\r
-\r
-    /* Following fields should be little-endian */\r
-#if(!CY_PSOC3)\r
-    switch (fieldName)\r
-    {\r
-    case BL_GET_METADATA_BTLDR_LAST_ROW:\r
-        result = CYSWAP_ENDIAN16(result);\r
-        break;\r
-\r
-    case BL_GET_METADATA_BTLDB_ADDR:\r
-    case BL_GET_METADATA_BTLDB_LENGTH:\r
-        result = CYSWAP_ENDIAN32(result);\r
-        break;\r
-\r
-    default:\r
-        break;\r
-    }\r
-\r
-#endif  /* (!CY_PSOC3) */\r
-\r
-    return (result);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.h
deleted file mode 100755 (executable)
index e459c55..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL.h
+++ /dev/null
@@ -1,318 +0,0 @@
-/*******************************************************************************\r
-* File Name: BL.h\r
-* Version 1.20\r
-*\r
-*  Description:\r
-*   Provides an API for the Bootloader. The API includes functions for starting\r
-*   boot loading operations, validating the application and jumping to the\r
-*   application.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOTLOADER_BL_H)\r
-#define CY_BOOTLOADER_BL_H\r
-\r
-#include "cytypes.h"\r
-\r
-\r
-/* Check to see if required defines such as CY_PSOC5LP are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5LP)\r
-    #error Component Bootloader_v1_20 requires cy_boot v3.0 or later\r
-#endif /* (CY_ PSOC5X) */\r
-\r
-\r
-#define BL_DUAL_APP_BOOTLOADER        (0u)\r
-#define BL_BOOTLOADER_APP_VERSION     (0u)\r
-#define BL_FAST_APP_VALIDATION        (0u)\r
-#define BL_PACKET_CHECKSUM_CRC        (0u)\r
-#define BL_WAIT_FOR_COMMAND           (1u)\r
-#define BL_WAIT_FOR_COMMAND_TIME      (20u)\r
-#define BL_BOOTLOADER_APP_VALIDATION  (1u)\r
-\r
-#define BL_CMD_GET_FLASH_SIZE_AVAIL   (1u)\r
-#define BL_CMD_ERASE_ROW_AVAIL        (1u)\r
-#define BL_CMD_VERIFY_ROW_AVAIL       (1u)\r
-#define BL_CMD_SYNC_BOOTLOADER_AVAIL  (1u)\r
-#define BL_CMD_SEND_DATA_AVAIL        (1u)\r
-#define BL_CMD_GET_METADATA           (0u)\r
-\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_CMD_GET_APP_STATUS_AVAIL   (1u)\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/*******************************************************************************\r
-* Bootloadable applications identification\r
-*******************************************************************************/\r
-#define BL_MD_BTLDB_ACTIVE_0          (0x00u)\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_MD_BTLDB_ACTIVE_1      (0x01u)\r
-    #define BL_MD_BTLDB_ACTIVE_NONE   (0x02u)\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/* Mask used to indicate starting application */\r
-#define BL_SCHEDULE_BTLDB             (0x80u)\r
-#define BL_SCHEDULE_BTLDR             (0x40u)\r
-#define BL_SCHEDULE_MASK              (0xC0u)\r
-\r
-\r
-#if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-    __attribute__((section (".bootloader")))\r
-#elif defined (__ICCARM__)\r
-    #pragma location=".bootloader"\r
-#endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-extern const uint8  CYCODE BL_Checksum;\r
-extern const uint8  CYCODE  *BL_ChecksumAccess;\r
-\r
-\r
-#if defined(__ARMCC_VERSION) || defined (__GNUC__)\r
-    __attribute__((section (".bootloader")))\r
-#elif defined (__ICCARM__)\r
-    #pragma location=".bootloader"\r
-#endif  /* defined(__ARMCC_VERSION) || defined (__GNUC__) */\r
-extern const uint32 CYCODE BL_SizeBytes;\r
-extern const uint32 CYCODE *BL_SizeBytesAccess;\r
-\r
-\r
-/*******************************************************************************\r
-* This variable is used by Bootloader/Bootloadable components to schedule what\r
-* application will be started after software reset.\r
-*******************************************************************************/\r
-#if (CY_PSOC4)\r
-    #if defined(__ARMCC_VERSION)\r
-        __attribute__ ((section(".bootloaderruntype"), zero_init))\r
-    #elif defined (__GNUC__)\r
-        __attribute__ ((section(".bootloaderruntype")))\r
-   #elif defined (__ICCARM__)\r
-        #pragma location=".bootloaderruntype"\r
-    #endif  /* defined(__ARMCC_VERSION) */\r
-    extern volatile uint32 cyBtldrRunType;\r
-#endif  /* (CY_PSOC4) */\r
-\r
-\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    extern uint8 BL_activeApp;\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-#if(CY_PSOC4)\r
-    /* Reset Cause Observation Register */\r
-    #define BL_RES_CAUSE_REG           (* (reg32 *) CYREG_RES_CAUSE)\r
-    #define BL_RES_CAUSE_PTR           (  (reg32 *) CYREG_RES_CAUSE)\r
-#else\r
-    #define BL_RESET_SR0_REG           (* (reg8 *) CYREG_RESET_SR0)\r
-    #define BL_RESET_SR0_PTR           (  (reg8 *) CYREG_RESET_SR0)\r
-#endif /* (CY_PSOC4) */\r
-\r
-\r
-/*******************************************************************************\r
-* Get the reason of the device reset\r
-*  Return cyBtldrRunType in case if software reset was reset reason and\r
-*  set cyBtldrRunType to zero (bootloader application is scheduled - that is\r
-*  initial clean state) and return zero.\r
-*******************************************************************************/\r
-#if(CY_PSOC4)\r
-    #define BL_GET_RUN_TYPE           (cyBtldrRunType)\r
-#else\r
-    #define BL_GET_RUN_TYPE       (BL_RESET_SR0_REG & BL_SCHEDULE_MASK)\r
-#endif  /* (CY_PSOC4) */\r
-\r
-\r
-/*******************************************************************************\r
-* Schedule Bootloader/Bootloadable to be run after software reset\r
-*******************************************************************************/\r
-#if(CY_PSOC4)\r
-    #define BL_SET_RUN_TYPE(x)                (cyBtldrRunType = (x))\r
-#else\r
-    #define BL_SET_RUN_TYPE(x)                (BL_RESET_SR0_REG = (x))\r
-#endif  /* (CY_PSOC4) */\r
-\r
-\r
-/* Returns the number of Flash arrays availalbe in the device */\r
-#define BL_NUM_OF_FLASH_ARRAYS    (CYDEV_FLASH_SIZE / CYDEV_FLS_SECTOR_SIZE)\r
-\r
-\r
-/*******************************************************************************\r
-* External References\r
-*******************************************************************************/\r
-void BL_SetFlashByte(uint32 address, uint8 runType);\r
-void CyBtldr_CheckLaunch(void)  CYSMALL ;\r
-void BL_Start(void) CYSMALL ;\r
-\r
-#if(CY_PSOC3)\r
-    /* Implementation for the PSoC 3 resides in a BL_psoc3.a51 file.  */\r
-    extern void     BL_LaunchBootloadable(uint32 appAddr);\r
-#endif  /* (CY_PSOC3) */\r
-\r
-/* If using custom interface as the IO Component, user must provide these functions */\r
-#if defined(CYDEV_BOOTLOADER_IO_COMP) && (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface)\r
-\r
-    extern void CyBtldrCommStart(void);\r
-    extern void CyBtldrCommStop (void);\r
-    extern void CyBtldrCommReset(void);\r
-    extern cystatus CyBtldrCommWrite(uint8* buffer, uint16 size, uint16* count, uint8 timeOut);\r
-    extern cystatus CyBtldrCommRead (uint8* buffer, uint16 size, uint16* count, uint8 timeOut);\r
-\r
-#endif  /* defined(CYDEV_BOOTLOADER_IO_COMP) && (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface) */\r
-\r
-\r
-/*******************************************************************************\r
-* Kept for backward compatibility.\r
-*******************************************************************************/\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_ValidateApp(x)                 BL_ValidateBootloadable((x))\r
-    #define BL_ValidateApplication            \\r
-                            BL_ValidateBootloadable(BL_MD_BTLDB_ACTIVE_0)\r
-#else\r
-    #define BL_ValidateApplication            \\r
-                            BL_ValidateBootloadable(BL_MD_BTLDB_ACTIVE_0)\r
-    #define BL_ValidateApp(x)                 BL_ValidateBootloadable((x))\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from version 1.10\r
-*******************************************************************************/\r
-#define BL_BOOTLOADABLE_APP_VALID     (BL_BOOTLOADER_APP_VALIDATION)\r
-#define CyBtldr_Start                               BL_Start\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from version 1.20\r
-*******************************************************************************/\r
-#define BL_META_BASE(x)                   (CYDEV_FLASH_BASE + \\r
-                                                            (CYDEV_FLASH_SIZE - (( uint32 )(x) * CYDEV_FLS_ROW_SIZE) - \\r
-                                                            BL_META_DATA_SIZE))\r
-#define BL_META_ARRAY                     (BL_NUM_OF_FLASH_ARRAYS - 1u)\r
-#define BL_META_APP_ENTRY_POINT_ADDR(x)   (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_ADDR_OFFSET)\r
-#define BL_META_APP_BYTE_LEN(x)           (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_BYTE_LEN_OFFSET)\r
-#define BL_META_APP_RUN_ADDR(x)           (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_RUN_TYPE_OFFSET)\r
-#define BL_META_APP_ACTIVE_ADDR(x)        (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_ACTIVE_OFFSET)\r
-#define BL_META_APP_VERIFIED_ADDR(x)      (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_VERIFIED_OFFSET)\r
-#define BL_META_APP_BLDBL_VER_ADDR(x)     (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_BL_BUILD_VER_OFFSET)\r
-#define BL_META_APP_VER_ADDR(x)           (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_VER_OFFSET)\r
-#define BL_META_APP_ID_ADDR(x)            (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_ID_OFFSET)\r
-#define BL_META_APP_CUST_ID_ADDR(x)       (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_CUST_ID_OFFSET)\r
-#define BL_META_LAST_BLDR_ROW_ADDR(x)     (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_BL_LAST_ROW_OFFSET)\r
-#define BL_META_CHECKSUM_ADDR(x)          (BL_META_BASE(x) + \\r
-                                                            BL_META_APP_CHECKSUM_OFFSET)\r
-#if(0u == BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_MD_BASE                    BL_META_BASE(0u)\r
-    #define BL_MD_ROW                     ((CY_FLASH_NUMBER_ROWS / BL_NUM_OF_FLASH_ARRAYS) \\r
-                                                           - 1u)\r
-    #define BL_MD_CHECKSUM_ADDR           BL_META_CHECKSUM_ADDR(0u)\r
-    #define BL_MD_LAST_BLDR_ROW_ADDR      BL_META_LAST_BLDR_ROW_ADDR(0u)\r
-    #define BL_MD_APP_BYTE_LEN            BL_META_APP_BYTE_LEN(0u)\r
-    #define BL_MD_APP_VERIFIED_ADDR       BL_META_APP_VERIFIED_ADDR(0u)\r
-    #define BL_MD_APP_ENTRY_POINT_ADDR    BL_META_APP_ENTRY_POINT_ADDR(0u)\r
-    #define BL_MD_APP_RUN_ADDR            BL_META_APP_RUN_ADDR(0u)\r
-#else\r
-    #define BL_MD_ROW(x)                  ((CY_FLASH_NUMBER_ROWS / BL_NUM_OF_FLASH_ARRAYS) \\r
-                                                            - 1u - ( uint32 )(x))\r
-    #define BL_MD_CHECKSUM_ADDR           BL_META_CHECKSUM_ADDR(appId)\r
-    #define BL_MD_LAST_BLDR_ROW_ADDR      BL_META_LAST_BLDR_ROW_ADDR(appId)\r
-    #define BL_MD_APP_BYTE_LEN            BL_META_APP_BYTE_LEN(appId)\r
-    #define BL_MD_APP_VERIFIED_ADDR       BL_META_APP_VERIFIED_ADDR(appId)\r
-    #define BL_MD_APP_ENTRY_POINT_ADDR    \\r
-                                                BL_META_APP_ENTRY_POINT_ADDR(BL_activeApp)\r
-    #define BL_MD_APP_RUN_ADDR            BL_META_APP_RUN_ADDR(BL_activeApp)\r
-#endif  /* (0u == BL_DUAL_APP_BOOTLOADER) */\r
-\r
-#define BL_P_APP_ACTIVE(x)                ((uint8 CYCODE *) BL_META_APP_ACTIVE_ADDR(x))\r
-#define BL_MD_PTR_CHECKSUM                ((uint8  CYCODE *) BL_MD_CHECKSUM_ADDR)\r
-#define BL_MD_PTR_APP_ENTRY_POINT         ((BL_APP_ADDRESS CYCODE *) \\r
-                                                                BL_MD_APP_ENTRY_POINT_ADDR)\r
-#define BL_MD_PTR_LAST_BLDR_ROW            ((uint16 CYCODE *) BL_MD_LAST_BLDR_ROW_ADDR)\r
-#define BL_MD_PTR_APP_BYTE_LEN             ((BL_APP_ADDRESS CYCODE *) \\r
-                                                                BL_MD_APP_BYTE_LEN)\r
-#define BL_MD_PTR_APP_RUN_ADDR             ((uint8  CYCODE *) BL_MD_APP_RUN_ADDR)\r
-#define BL_MD_PTR_APP_VERIFIED             ((uint8  CYCODE *) BL_MD_APP_VERIFIED_ADDR)\r
-#define BL_MD_PTR_APP_BLD_BL_VER           ((uint16 CYCODE *) BL_MD_APP_BLDBL_VER_ADDR)\r
-#define BL_MD_PTR_APP_VER                  ((uint16 CYCODE *) BL_MD_APP_VER_ADDR)\r
-#define BL_MD_PTR_APP_ID                   ((uint16 CYCODE *) BL_MD_APP_ID_ADDR)\r
-#define BL_MD_PTR_APP_CUST_ID              ((uint32 CYCODE *) BL_MD_APP_CUST_ID_ADDR)\r
-#if(CY_PSOC3)\r
-    #define BL_APP_ADDRESS                    uint16\r
-    #define BL_GET_CODE_DATA(idx)             (*((uint8  CYCODE *) (idx)))\r
-    #define BL_GET_CODE_WORD(idx)             (*((uint32 CYCODE *) (idx)))\r
-    #define BL_META_APP_ADDR_OFFSET           (3u)\r
-    #define BL_META_APP_BL_LAST_ROW_OFFSET    (7u)\r
-    #define BL_META_APP_BYTE_LEN_OFFSET       (11u)\r
-    #define BL_META_APP_RUN_TYPE_OFFSET       (15u)\r
-#else\r
-    #define BL_APP_ADDRESS                    uint32\r
-    #define BL_GET_CODE_DATA(idx)             (*((uint8  *)(CYDEV_FLASH_BASE + (idx))))\r
-    #define BL_GET_CODE_WORD(idx)             (*((uint32 *)(CYDEV_FLASH_BASE + (idx))))\r
-    #define BL_META_APP_ADDR_OFFSET           (1u)\r
-    #define BL_META_APP_BL_LAST_ROW_OFFSET    (5u)\r
-    #define BL_META_APP_BYTE_LEN_OFFSET       (9u)\r
-    #define BL_META_APP_RUN_TYPE_OFFSET       (13u)\r
-#endif /* (CY_PSOC3) */\r
-#define BL_META_APP_ACTIVE_OFFSET             (16u)\r
-#define BL_META_APP_VERIFIED_OFFSET           (17u)\r
-#define BL_META_APP_BL_BUILD_VER_OFFSET       (18u)\r
-#define BL_META_APP_ID_OFFSET                 (20u)\r
-#define BL_META_APP_VER_OFFSET                (22u)\r
-#define BL_META_APP_CUST_ID_OFFSET            (24u)\r
-#if (CY_PSOC4)\r
-    #define BL_GET_REG16(x)   ((uint16)(                                                          \\r
-                                                (( uint16 )(( uint16 )CY_GET_XTND_REG8((x)     )       ))   |   \\r
-                                                (( uint16 )(( uint16 )CY_GET_XTND_REG8((x) + 1u) <<  8u))       \\r
-                                            ))\r
-\r
-    #define BL_GET_REG32(x)   (                                                                    \\r
-                                                (( uint32 )(( uint32 ) CY_GET_XTND_REG8((x)     )       ))   |   \\r
-                                                (( uint32 )(( uint32 ) CY_GET_XTND_REG8((x) + 1u) <<  8u))   |   \\r
-                                                (( uint32 )(( uint32 ) CY_GET_XTND_REG8((x) + 2u) << 16u))   |   \\r
-                                                (( uint32 )(( uint32 ) CY_GET_XTND_REG8((x) + 3u) << 24u))       \\r
-                                            )\r
-#endif  /* (CY_PSOC4) */\r
-#define BL_META_APP_CHECKSUM_OFFSET           (0u)\r
-#define BL_META_DATA_SIZE                     (64u)\r
-#if(CY_PSOC4)\r
-    extern uint8 appRunType;\r
-#endif  /* (CY_PSOC4) */\r
-\r
-#if(CY_PSOC4)\r
-    #define BL_SOFTWARE_RESET                 CY_SET_REG32(CYREG_CM0_AIRCR, 0x05FA0004u)\r
-#else\r
-    #define BL_SOFTWARE_RESET                 CY_SET_REG8(CYREG_RESET_CR2, 0x01u)\r
-#endif  /* (CY_PSOC4) */\r
-\r
-#define BL_SetFlashRunType(runType)        BL_SetFlashByte( \\r
-                                                            BL_MD_APP_RUN_ADDR(0), (runType))\r
-\r
-#define BL_START_APP                  (BL_SCHEDULE_BTLDB)\r
-#define BL_START_BTLDR                (BL_SCHEDULE_BTLDR)\r
-\r
-/* Some PSoC Creator versions used to generate only one name types */\r
-#if !defined (CYDEV_FLASH_BASE)\r
-    #define CYDEV_FLASH_BASE                                (CYDEV_FLS_BASE)\r
-#endif /* !defined (CYDEV_FLASH_BASE) */\r
-\r
-#if !defined (CYDEV_FLASH_SIZE)\r
-    #define CYDEV_FLASH_SIZE                                (CYDEV_FLS_SIZE)\r
-#endif /* CYDEV_FLASH_SIZE */\r
-\r
-\r
-#endif /* CY_BOOTLOADER_BL_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL_PVT.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL_PVT.h
deleted file mode 100755 (executable)
index 9d12d71..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/BL_PVT.h
+++ /dev/null
@@ -1,315 +0,0 @@
-/*******************************************************************************\r
-* File Name: BL_PVT.h\r
-* Version 1.20\r
-*\r
-*  Description:\r
-*   Provides an API for the Bootloader.\r
-*\r
-********************************************************************************\r
-* Copyright 2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOTLOADER_BL_PVT_H)\r
-#define CY_BOOTLOADER_BL_PVT_H\r
-\r
-#include "BL.h"\r
-\r
-\r
-typedef struct\r
-{\r
-    uint32 SiliconId;\r
-    uint8  Revision;\r
-    uint8  BootLoaderVersion[3u];\r
-\r
-} BL_ENTER;\r
-\r
-\r
-#define BL_VERSION        {\\r
-                                            (uint8)20, \\r
-                                            (uint8)1, \\r
-                                            (uint8)0x01u \\r
-                                        }\r
-\r
-/* Packet framing constants. */\r
-#define BL_SOP            (0x01u)    /* Start of Packet */\r
-#define BL_EOP            (0x17u)    /* End of Packet */\r
-\r
-\r
-/* Bootloader command responces */\r
-#define BL_ERR_KEY       (0x01u)  /* The provided key does not match the expected value          */\r
-#define BL_ERR_VERIFY    (0x02u)  /* The verification of flash failed                            */\r
-#define BL_ERR_LENGTH    (0x03u)  /* The amount of data available is outside the expected range  */\r
-#define BL_ERR_DATA      (0x04u)  /* The data is not of the proper form                          */\r
-#define BL_ERR_CMD       (0x05u)  /* The command is not recognized                               */\r
-#define BL_ERR_DEVICE    (0x06u)  /* The expected device does not match the detected device      */\r
-#define BL_ERR_VERSION   (0x07u)  /* The bootloader version detected is not supported            */\r
-#define BL_ERR_CHECKSUM  (0x08u)  /* The checksum does not match the expected value              */\r
-#define BL_ERR_ARRAY     (0x09u)  /* The flash array is not valid                                */\r
-#define BL_ERR_ROW       (0x0Au)  /* The flash row is not valid                                  */\r
-#define BL_ERR_PROTECT   (0x0Bu)  /* The flash row is protected and can not be programmed        */\r
-#define BL_ERR_APP       (0x0Cu)  /* The application is not valid and cannot be set as active    */\r
-#define BL_ERR_ACTIVE    (0x0Du)  /* The application is currently marked as active               */\r
-#define BL_ERR_UNK       (0x0Fu)  /* An unknown error occurred                                   */\r
-\r
-\r
-/* Bootloader command definitions. */\r
-#define BL_COMMAND_CHECKSUM     (0x31u)    /* Verify the checksum for the bootloadable project   */\r
-#define BL_COMMAND_REPORT_SIZE  (0x32u)    /* Report the programmable portions of flash          */\r
-#define BL_COMMAND_APP_STATUS   (0x33u)    /* Gets status info about the provided app status     */\r
-#define BL_COMMAND_ERASE        (0x34u)    /* Erase the specified flash row                      */\r
-#define BL_COMMAND_SYNC         (0x35u)    /* Sync the bootloader and host application           */\r
-#define BL_COMMAND_APP_ACTIVE   (0x36u)    /* Sets the active application                        */\r
-#define BL_COMMAND_DATA         (0x37u)    /* Queue up a block of data for programming           */\r
-#define BL_COMMAND_ENTER        (0x38u)    /* Enter the bootloader                               */\r
-#define BL_COMMAND_PROGRAM      (0x39u)    /* Program the specified row                          */\r
-#define BL_COMMAND_VERIFY       (0x3Au)    /* Compute flash row checksum for verification        */\r
-#define BL_COMMAND_EXIT         (0x3Bu)    /* Exits the bootloader & resets the chip             */\r
-#define BL_COMMAND_GET_METADATA (0x3Cu)    /* Reports the metadata for a selected application    */\r
-\r
-\r
-/*******************************************************************************\r
-* Bootloader packet byte addresses:\r
-* [1-byte] [1-byte ] [2-byte] [n-byte] [ 2-byte ] [1-byte]\r
-* [ SOP  ] [Command] [ Size ] [ Data ] [Checksum] [ EOP  ]\r
-*******************************************************************************/\r
-#define BL_SOP_ADDR             (0x00u)         /* Start of packet offset from beginning     */\r
-#define BL_CMD_ADDR             (0x01u)         /* Command offset from beginning             */\r
-#define BL_SIZE_ADDR            (0x02u)         /* Packet size offset from beginning         */\r
-#define BL_DATA_ADDR            (0x04u)         /* Packet data offset from beginning         */\r
-#define BL_CHK_ADDR(x)          (0x04u + (x))   /* Packet checksum offset from end           */\r
-#define BL_EOP_ADDR(x)          (0x06u + (x))   /* End of packet offset from end             */\r
-#define BL_MIN_PKT_SIZE         (7u)            /* The minimum number of bytes in a packet   */\r
-\r
-\r
-/*******************************************************************************\r
-BL_ValidateBootloadable()\r
-*******************************************************************************/\r
-#define BL_FIRST_APP_BYTE(appId)      ((uint32)CYDEV_FLS_ROW_SIZE * \\r
-        ((uint32) BL_GetMetadata(BL_GET_METADATA_BTLDR_LAST_ROW, appId) + \\r
-         (uint32) 1u))\r
-\r
-#define BL_MD_BTLDB_IS_VERIFIED       (0x01u)\r
-\r
-\r
-/*******************************************************************************\r
-* BL_Start()\r
-*******************************************************************************/\r
-#define BL_MD_BTLDB_IS_ACTIVE         (0x01u)\r
-#define BL_WAIT_FOR_COMMAND_FOREVER   (0x00u)\r
-\r
-\r
- /* Maximum number of bytes accepted in a packet plus some */\r
-#define BL_SIZEOF_COMMAND_BUFFER      (300u)\r
-\r
-\r
-/*******************************************************************************\r
-* BL_HostLink()\r
-*******************************************************************************/\r
-#define BL_COMMUNICATION_STATE_IDLE   (0u)\r
-#define BL_COMMUNICATION_STATE_ACTIVE (1u)\r
-\r
-#if(!CY_PSOC4)\r
-\r
-    /*******************************************************************************\r
-    * The Array ID indicates the unique ID of the SONOS array being accessed:\r
-    * - 0x00-0x3E : Flash Arrays\r
-    * - 0x3F      : Selects all Flash arrays simultaneously\r
-    * - 0x40-0x7F : Embedded EEPROM Arrays\r
-    *******************************************************************************/\r
-    #define BL_FIRST_FLASH_ARRAYID          (0x00u)\r
-    #define BL_LAST_FLASH_ARRAYID           (0x3Fu)\r
-    #define BL_FIRST_EE_ARRAYID             (0x40u)\r
-    #define BL_LAST_EE_ARRAYID              (0x7Fu)\r
-\r
-#endif   /* (!CY_PSOC4) */\r
-\r
-\r
-/*******************************************************************************\r
-* BL_CalcPacketChecksum()\r
-*******************************************************************************/\r
-#if(0u != BL_PACKET_CHECKSUM_CRC)\r
-    #define BL_CRC_CCITT_POLYNOMIAL       (0x8408u)       /* x^16 + x^12 + x^5 + 1 */\r
-    #define BL_CRC_CCITT_INITIAL_VALUE    (0xffffu)\r
-#endif /* (0u != BL_PACKET_CHECKSUM_CRC) */\r
-\r
-\r
-/*******************************************************************************\r
-* BL_GetMetadata()\r
-*******************************************************************************/\r
-#define BL_GET_METADATA_BTLDB_ADDR             (1u)\r
-#define BL_GET_METADATA_BTLDR_LAST_ROW         (2u)\r
-#define BL_GET_METADATA_BTLDB_LENGTH           (3u)\r
-#define BL_GET_METADATA_BTLDR_APP_VERSION      (4u)\r
-#define BL_GET_METADATA_BTLDB_APP_VERSION      (5u)\r
-#define BL_GET_METADATA_BTLDB_APP_ID           (6u)\r
-#define BL_GET_METADATA_BTLDB_APP_CUST_ID      (7u)\r
-\r
-\r
-/*******************************************************************************\r
-* CyBtldr_CheckLaunch()\r
-*******************************************************************************/\r
-#define BL_RES_CAUSE_RESET_SOFT                (0x10u)\r
-\r
-\r
-/*******************************************************************************\r
-* Metadata addresses and pointer defines\r
-*******************************************************************************/\r
-#define BL_MD_SIZEOF                  (64u)\r
-\r
-\r
-/*******************************************************************************\r
-* Metadata base address. In case of bootloader application, the metadata is\r
-* placed at row N-1; in case of multi-application bootloader, the bootloadable\r
-* application number 1 will use row N-1, and application number 2 will use row\r
-* N-2 to store its metadata, where N is the total number of rows for the\r
-* selected device.\r
-*******************************************************************************/\r
-#define BL_MD_BASE_ADDR(appId)        (CYDEV_FLASH_BASE + \\r
-                                                        (CYDEV_FLASH_SIZE - ((uint32)(appId) * CYDEV_FLS_ROW_SIZE) - \\r
-                                                        BL_MD_SIZEOF))\r
-\r
-#define BL_MD_FLASH_ARRAY_NUM         (BL_NUM_OF_FLASH_ARRAYS - 1u)\r
-\r
-#define BL_MD_ROW_NUM(appId)          ((CY_FLASH_NUMBER_ROWS / BL_NUM_OF_FLASH_ARRAYS) - \\r
-                                                        1u - (uint32)(appId))\r
-\r
-#define     BL_MD_BTLDB_CHECKSUM_OFFSET(appId)       (BL_MD_BASE_ADDR(appId) + 0u)\r
-#if(CY_PSOC3)\r
-    #define BL_MD_BTLDB_ADDR_OFFSET(appId)           (BL_MD_BASE_ADDR(appId) + 3u)\r
-    #define BL_MD_BTLDR_LAST_ROW_OFFSET(appId)       (BL_MD_BASE_ADDR(appId) + 7u)\r
-    #define BL_MD_BTLDB_LENGTH_OFFSET(appId)         (BL_MD_BASE_ADDR(appId) + 11u)\r
-#else\r
-    #define BL_MD_BTLDB_ADDR_OFFSET(appId)           (BL_MD_BASE_ADDR(appId) + 1u)\r
-    #define BL_MD_BTLDR_LAST_ROW_OFFSET(appId)       (BL_MD_BASE_ADDR(appId) + 5u)\r
-    #define BL_MD_BTLDB_LENGTH_OFFSET(appId)         (BL_MD_BASE_ADDR(appId) + 9u)\r
-#endif /* (CY_PSOC3) */\r
-#define     BL_MD_BTLDB_ACTIVE_OFFSET(appId)         (BL_MD_BASE_ADDR(appId) + 16u)\r
-#define     BL_MD_BTLDB_VERIFIED_OFFSET(appId)       (BL_MD_BASE_ADDR(appId) + 17u)\r
-#define     BL_MD_BTLDR_APP_VERSION_OFFSET(appId)    (BL_MD_BASE_ADDR(appId) + 18u)\r
-#define     BL_MD_BTLDB_APP_ID_OFFSET(appId)         (BL_MD_BASE_ADDR(appId) + 20u)\r
-#define     BL_MD_BTLDB_APP_VERSION_OFFSET(appId)    (BL_MD_BASE_ADDR(appId) + 22u)\r
-#define     BL_MD_BTLDB_APP_CUST_ID_OFFSET(appId)    (BL_MD_BASE_ADDR(appId) + 24u)\r
-\r
-\r
-/*******************************************************************************\r
-* Macro for 1 byte long metadata fields\r
-*******************************************************************************/\r
-#define BL_MD_BTLDB_CHECKSUM_PTR  (appId)    \\r
-            ((reg8 *)(BL_MD_BTLDB_CHECKSUM_OFFSET(appId)))\r
-#define BL_MD_BTLDB_CHECKSUM_VALUE(appId)    \\r
-            (CY_GET_XTND_REG8(BL_MD_BTLDB_CHECKSUM_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_ACTIVE_PTR(appId)        \\r
-            ((reg8 *)(BL_MD_BTLDB_ACTIVE_OFFSET(appId)))\r
-#define BL_MD_BTLDB_ACTIVE_VALUE(appId)      \\r
-            (CY_GET_XTND_REG8(BL_MD_BTLDB_ACTIVE_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_VERIFIED_PTR(appId)      \\r
-            ((reg8 *)(BL_MD_BTLDB_VERIFIED_OFFSET(appId)))\r
-#define BL_MD_BTLDB_VERIFIED_VALUE(appId)    \\r
-            (CY_GET_XTND_REG8(BL_MD_BTLDB_VERIFIED_OFFSET(appId)))\r
-\r
-\r
-/*******************************************************************************\r
-* Macro for multiple bytes long metadata fields pointers \r
-*******************************************************************************/\r
-#define BL_MD_BTLDB_ADDR_PTR  (appId)        \\r
-            ((reg8 *)(BL_MD_BTLDB_ADDR_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDR_LAST_ROW_PTR  (appId)    \\r
-            ((reg8 *)(BL_MD_BTLDR_LAST_ROW_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_LENGTH_PTR(appId)        \\r
-            ((reg8 *)(BL_MD_BTLDB_LENGTH_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDR_APP_VERSION_PTR(appId)    \\r
-            ((reg8 *)(BL_MD_BTLDR_APP_VERSION_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_APP_ID_PTR(appId)         \\r
-            ((reg8 *)(BL_MD_BTLDB_APP_ID_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_APP_VERSION_PTR(appId)    \\r
-            ((reg8 *)(BL_MD_BTLDB_APP_VERSION_OFFSET(appId)))\r
-\r
-#define BL_MD_BTLDB_APP_CUST_ID_PTR(appId)    \\r
-            ((reg8 *)(BL_MD_BTLDB_APP_CUST_ID_OFFSET(appId)))\r
-\r
-\r
-/*******************************************************************************\r
-* Get data byte from FLASH\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-    #define BL_GET_CODE_BYTE(addr)            (*((uint8  CYCODE *) (addr)))\r
-#else\r
-    #define BL_GET_CODE_BYTE(addr)            (*((uint8  *)(CYDEV_FLASH_BASE + (addr))))\r
-#endif /* (CY_PSOC3) */\r
-\r
-\r
-#if(!CY_PSOC4)\r
-    #define BL_GET_EEPROM_BYTE(addr)          (*((uint8  *)(CYDEV_EE_BASE + (addr))))\r
-#endif /* (CY_PSOC3) */\r
-\r
-\r
-/* Our definition of a row size. */\r
-#if((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0))\r
-    #define BL_FROW_SIZE          ((CYDEV_FLS_ROW_SIZE) + (CYDEV_ECC_ROW_SIZE))\r
-#else\r
-    #define BL_FROW_SIZE          CYDEV_FLS_ROW_SIZE\r
-#endif  /* ((!CY_PSOC4) && (CYDEV_ECC_ENABLE == 0)) */\r
-\r
-\r
-/*******************************************************************************\r
-* Offset of the Bootloader application in flash\r
-*******************************************************************************/\r
-#if(CY_PSOC4)\r
-    #define BL_MD_BTLDR_ADDR_PTR        (0xC0u)     /* Exclude the vector */\r
-#else\r
-    #define BL_MD_BTLDR_ADDR_PTR        (0x00u)\r
-#endif  /* (CY_PSOC4) */\r
-\r
-\r
-/*******************************************************************************\r
-* Maximum number of Bootloadable applications\r
-*******************************************************************************/\r
-#if(1u == BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_MAX_NUM_OF_BTLDB       (0x02u)\r
-#else\r
-    #define BL_MAX_NUM_OF_BTLDB       (0x01u)\r
-#endif  /* (1u == BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/*******************************************************************************\r
-* Returns TRUE if row specified as parameter contains metadata section\r
-*******************************************************************************/\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_CONTAIN_METADATA(row)  \\r
-                                        ((BL_MD_ROW_NUM(BL_MD_BTLDB_ACTIVE_0) == (row)) || \\r
-                                         (BL_MD_ROW_NUM(BL_MD_BTLDB_ACTIVE_1) == (row)))\r
-#else\r
-    #define BL_CONTAIN_METADATA(row)  \\r
-                                        (BL_MD_ROW_NUM(BL_MD_BTLDB_ACTIVE_0) == (row))\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-\r
-/*******************************************************************************\r
-* Metadata section is located at the last flash row for the Boootloader, for the\r
-* Multi-Application Bootloader, metadata section of the Bootloadable application\r
-* # 0 is located at the last flash row, and metadata section of the Bootloadable\r
-* application # 1 is located in the flash row before last.\r
-*******************************************************************************/\r
-#if(0u != BL_DUAL_APP_BOOTLOADER)\r
-    #define BL_GET_APP_ID(row)     \\r
-                                        ((BL_MD_ROW_NUM(BL_MD_BTLDB_ACTIVE_0) == (row)) ? \\r
-                                          BL_MD_BTLDB_ACTIVE_0 : \\r
-                                          BL_MD_BTLDB_ACTIVE_1)\r
-#else\r
-    #define BL_GET_APP_ID(row)     (BL_MD_BTLDB_ACTIVE_0)\r
-#endif  /* (0u != BL_DUAL_APP_BOOTLOADER) */\r
-\r
-#endif /* CY_BOOTLOADER_BL_PVT_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Iar.icf b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Iar.icf
deleted file mode 100755 (executable)
index f5416ec..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Iar.icf
+++ /dev/null
@@ -1,113 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/\r
-/*-Editor annotation file-*/\r
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */\r
-/*-Specials-*/\r
-define symbol __ICFEDIT_intvec_start__ = 0x00000000;\r
-/*-Memory Regions-*/\r
-define symbol __ICFEDIT_region_ROM_start__ = 0x0;\r
-define symbol __ICFEDIT_region_ROM_end__   = 131072 - 1;\r
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000 - (32768 / 2);\r
-define symbol __ICFEDIT_region_RAM_end__   = 0x20000000 + (32768 / 2) - 1;\r
-/*-Sizes-*/\r
-define symbol __ICFEDIT_size_cstack__ = 0x2000;\r
-define symbol __ICFEDIT_size_heap__   = 0x0800;\r
-/**** End of ICF editor section. ###ICF###*/\r
-\r
-\r
-/******** Definitions ********/\r
-define symbol CY_APPL_LOADABLE  = 0;\r
-define symbol CY_APPL_LOADER    = 1;\r
-define symbol CY_APPL_NUM       = 1;\r
-define symbol CY_APPL_MAX       = 1;\r
-define symbol CY_METADATA_SIZE  = 64;\r
-define symbol CY_EE_IN_BTLDR    = 0x0;\r
-define symbol CY_EE_SIZE        = 2048;\r
-\r
-if (!CY_APPL_LOADABLE) {\r
-    define symbol CYDEV_BTLDR_SIZE = 0;\r
-}\r
-\r
-define symbol CY_FLASH_SIZE     = 131072;\r
-define symbol CY_APPL_ORIGIN    = 0; \r
-define symbol CY_FLASH_ROW_SIZE = 256;\r
-define symbol CY_ECC_ROW_SIZE   = 32;\r
-\r
-define memory mem with size = 4G;\r
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];\r
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];\r
-\r
-define block CSTACK      with alignment = 8, size = __ICFEDIT_size_cstack__   { };\r
-define block HEAP        with alignment = 8, size = __ICFEDIT_size_heap__     { };\r
-define block HSTACK      {block HEAP, last block CSTACK};\r
-\r
-define block LOADER     { readonly section .cybootloader };\r
-define block APPL       with fixed order {readonly section .romvectors, readonly};\r
-\r
-/* The address of Flash row next after Bootloader image */\r
-define symbol CY_BTLDR_END      = CYDEV_BTLDR_SIZE +\r
-                                    ((CYDEV_BTLDR_SIZE % CY_FLASH_ROW_SIZE) ?\r
-                                    (CY_FLASH_ROW_SIZE - (CYDEV_BTLDR_SIZE % CY_FLASH_ROW_SIZE)) : 0);\r
-\r
-/* The start address of Standard/Loader/Loadable#1 image */\r
-define symbol CY_APPL1_START    = CY_APPL_ORIGIN ? CY_APPL_ORIGIN : CY_BTLDR_END;\r
-\r
-/* The number of metadata records located at the end of Flash */\r
-define symbol CY_METADATA_CNT   = (CY_APPL_NUM == 2) ? 2 : ((CY_APPL_LOADER || CY_APPL_LOADABLE) ? 1 : 0);\r
-\r
-/* The application area size measured in rows */\r
-define symbol CY_APPL_ROW_CNT   = ((CY_FLASH_SIZE - CY_APPL1_START) / CY_FLASH_ROW_SIZE) - CY_METADATA_CNT;\r
-\r
-/* The start address of Loadable#2 image if any */\r
-define symbol CY_APPL2_START    = CY_APPL1_START + (CY_APPL_ROW_CNT / 2 + CY_APPL_ROW_CNT % 2) * CY_FLASH_ROW_SIZE;\r
-\r
-/* The current image (Standard/Loader/Loadable) start address */\r
-define symbol CY_APPL_START     = (CY_APPL_NUM == 1) ? CY_APPL1_START : CY_APPL2_START;\r
-\r
-/* The ECC data placement address */\r
-define exported symbol CY_ECC_OFFSET     = (CY_APPL_START / CY_FLASH_ROW_SIZE) * CY_ECC_ROW_SIZE;\r
-\r
-/* The EEPROM offset and size that can be used by current application (Standard/Loader/Loadable) */\r
-define symbol CY_EE_OFFSET      = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? ((CY_EE_SIZE / CY_APPL_MAX) * (CY_APPL_NUM - 1)) : 0;\r
-define symbol CY_EE_IN_USE      = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? (CY_EE_SIZE / CY_APPL_MAX) : CY_EE_SIZE;\r
-\r
-/* Define EEPROM region */\r
-define region EEPROM_region     = mem:[from (0x90200000 + CY_EE_OFFSET) size CY_EE_IN_USE];\r
-\r
-/* Define APPL region that will limit application size */\r
-define region APPL_region       = mem:[from CY_APPL_START size CY_APPL_ROW_CNT * CY_FLASH_ROW_SIZE];\r
-\r
-\r
-/****** Initializations ******/\r
-initialize by copy { readwrite };\r
-do not initialize  { section .noinit };\r
-do not initialize  { readwrite section .ramvectors };\r
-\r
-/******** Placements *********/\r
-".cybootloader"    : place at start of ROM_region {block LOADER};\r
-"APPL"             : place at start of APPL_region {block APPL};\r
-\r
-"RAMVEC"           : place at start of RAM_region { readwrite section .ramvectors };\r
-"readwrite"        : place in RAM_region          { readwrite };\r
-"HSTACK"           : place at end of RAM_region   { block HSTACK};\r
-\r
-keep {  section .cybootloader, \r
-        section .cyloadermeta, \r
-        section .cyloadablemeta,\r
-        section .cyconfigecc, \r
-        section .cycustnvl, \r
-        section .cywolatch,\r
-        section .cyeeprom, \r
-        section .cyflashprotect,\r
-        section .cymeta };\r
-\r
-".cyloadermeta"   : place at address mem : (CY_APPL_LOADER ? (CY_FLASH_SIZE - CY_METADATA_SIZE) : 0xF0000000) { readonly section .cyloadermeta };\r
-".cyloadablemeta" : place at address mem : (CY_FLASH_SIZE - CY_FLASH_ROW_SIZE * (CY_APPL_NUM - 1) - CY_METADATA_SIZE) { readonly section .cyloadablemeta };\r
-".cyconfigecc"    : place at address mem : (0x80000000 + CY_ECC_OFFSET) { readonly section .cyconfigecc };\r
-".cycustnvl"      : place at address mem : 0x90000000 { readonly section .cycustnvl };\r
-".cywolatch"      : place at address mem : 0x90100000 { readonly section .cywolatch };\r
-".cyeeprom"       : place in EEPROM_region { readonly section .cyeeprom };\r
-".cyflashprotect" : place at address mem : 0x90400000 { readonly section .cyflashprotect };\r
-".cymeta"         : place at address mem : 0x90500000 { readonly section .cymeta };\r
-\r
-\r
-/* EOF */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3RealView.scat b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3RealView.scat
deleted file mode 100755 (executable)
index 7c39f66..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3RealView.scat
+++ /dev/null
@@ -1,190 +0,0 @@
-#! armcc -E\r
-; The first line specifies a preprocessor command that the linker invokes \r
-; to pass a scatter file through a C preprocessor.\r
-\r
-;********************************************************************************\r
-;* File Name: Cm3RealView.scat\r
-;* Version 4.0\r
-;*\r
-;*  Description:\r
-;*  This Linker Descriptor file describes the memory layout of the PSoC5\r
-;*  device. The memory layout of the final binary and hex images as well as\r
-;*  the placement in PSoC5 memory is described.\r
-;*\r
-;*\r
-;*  Note:\r
-;*\r
-;*  romvectors: Cypress default Interrupt sevice routine vector table.\r
-;*\r
-;*      This is the ISR vector table at bootup. Used only for the reset vector.\r
-;*\r
-;*\r
-;*  ramvectors: Cypress ram interrupt service routine vector table.\r
-;*\r
-;*      This is the ISR vector table used by the application.\r
-;*\r
-;*\r
-;********************************************************************************\r
-;* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-;* You may use this file only in accordance with the license, terms, conditions,\r
-;* disclaimers, and limitations in the end user license agreement accompanying\r
-;* the software package with which this file was provided.\r
-;********************************************************************************/\r
-#include "cyfitter.h"\r
-\r
-#define CY_FLASH_SIZE       131072\r
-#define CY_APPL_ORIGIN      0\r
-#define CY_FLASH_ROW_SIZE   256\r
-#define CY_ECC_ROW_SIZE     32\r
-#define CY_EE_SIZE          2048\r
-#define CY_METADATA_SIZE    64\r
-\r
-\r
-; Define application base address\r
-#if (CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_LOADABLE)\r
-    #define CY_APPL_NUM     1\r
-    #define CY_APPL_MAX     1\r
-    #define CY_EE_IN_BTLDR  \r
-\r
-    #if CY_APPL_ORIGIN\r
-        #define APPL1_START     CY_APPL_ORIGIN\r
-    #else\r
-        #define APPL1_START     AlignExpr(ImageLimit(CYBOOTLOADER), CY_FLASH_ROW_SIZE)\r
-    #endif\r
-\r
-    #define APPL_START      (APPL1_START + AlignExpr(((CY_FLASH_SIZE - APPL1_START - 2 * CY_FLASH_ROW_SIZE) / 2 ) * (CY_APPL_NUM - 1), CY_FLASH_ROW_SIZE))\r
-    #define ECC_OFFSET      ((APPL_START / CY_FLASH_ROW_SIZE) * CY_ECC_ROW_SIZE)\r
-    #define EE_OFFSET       (CY_EE_IN_BTLDR ? 0 : (CY_EE_SIZE / CY_APPL_MAX) * (CY_APPL_NUM - 1))\r
-    #define EE_SIZE         (CY_EE_IN_BTLDR ? CY_EE_SIZE : (CY_EE_SIZE / CY_APPL_MAX))\r
-\r
-#else\r
-\r
-    #define APPL_START      0\r
-    #define ECC_OFFSET      0\r
-    #define EE_OFFSET       0\r
-    #define EE_SIZE         CY_EE_SIZE\r
-\r
-#endif\r
-\r
-\r
-; Place Bootloader at the beginning of Flash\r
-#if (CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-    CYBOOTLOADER 0\r
-    {\r
-        .cybootloader +0\r
-        {\r
-            * (.cybootloader)\r
-        }\r
-    }\r
-\r
-    #if CY_APPL_ORIGIN\r
-        ScatterAssert(APPL_START > LoadLimit(CYBOOTLOADER))\r
-    #endif\r
-\r
-#endif\r
-\r
-\r
-APPLICATION APPL_START (CY_FLASH_SIZE - APPL_START)\r
-{\r
-    VECTORS +0\r
-    {\r
-        * (.romvectors)\r
-    }\r
-\r
-    CODE +0\r
-    {\r
-        * (+RO)\r
-    }\r
-\r
-    ISRVECTORS (0x20000000 - (32768 / 2)) UNINIT\r
-    {\r
-        * (.ramvectors)\r
-    }\r
-\r
-    NOINIT_DATA +0 UNINIT\r
-    {\r
-        * (.noinit)\r
-    }\r
-\r
-    DATA +0\r
-    {\r
-        .ANY (+RW, +ZI)\r
-    }\r
-\r
-    ARM_LIB_HEAP (0x20000000 + (32768 / 2) - 0x0800 - 0x2000) EMPTY 0x0800\r
-    {\r
-    }\r
-\r
-    ARM_LIB_STACK (0x20000000 + (32768 / 2)) EMPTY -0x2000\r
-    {\r
-    }\r
-}\r
-\r
-\r
-#if (CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_BOOTLOADER || CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER)\r
-\r
-    CYLOADERMETA (CY_FLASH_SIZE - CY_METADATA_SIZE)\r
-    {\r
-        .cyloadermeta +0 { * (.cyloadermeta) }\r
-    }\r
-\r
-#else\r
-\r
-    #if (CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-        CYLOADABLEMETA (CY_FLASH_SIZE - CY_FLASH_ROW_SIZE * (CY_APPL_NUM - 1) - CY_METADATA_SIZE)\r
-        {\r
-            .cyloadablemeta +0 { * (.cyloadablemeta) }\r
-        }\r
-    \r
-    #endif\r
-\r
-#endif\r
-\r
-#if (CYDEV_ECC_ENABLE == 0)\r
-\r
-    CYCONFIGECC (0x80000000 + ECC_OFFSET)\r
-    {\r
-        .cyconfigecc +0 { * (.cyconfigecc) }\r
-    }\r
-\r
-#endif\r
-\r
-CYCUSTNVL 0x90000000\r
-{\r
-    .cycustnvl +0 { * (.cycustnvl) }\r
-}\r
-\r
-CYWOLATCH 0x90100000\r
-{\r
-    .cywolatch +0 { * (.cywolatch) }\r
-}\r
-\r
-#if defined(CYDEV_ALLOCATE_EEPROM)\r
-\r
-    CYEEPROM 0x90200000 + EE_OFFSET (EE_SIZE)\r
-    {\r
-        .cyeeprom +0 { * (.cyeeprom) }\r
-    }\r
-\r
-#endif\r
-\r
-CYFLASHPROTECT 0x90400000\r
-{\r
-    .cyflashprotect +0 { * (.cyflashprotect) }\r
-}\r
-\r
-CYMETA 0x90500000\r
-{\r
-    .cymeta +0 { * (.cymeta) }\r
-}\r
-\r
-#if (CYDEV_PROJ_TYPE == CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-    CYLOADERMETA +0\r
-    {\r
-        .cyloadermeta +0 { * (.cyloadermeta) }\r
-    }\r
-\r
-#endif\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Start.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Start.c
deleted file mode 100755 (executable)
index f4d6607..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/Cm3Start.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/*******************************************************************************\r
-* File Name: Cm3Start.c\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*  Startup code for the ARM CM3.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include <limits.h>\r
-#include "cydevice_trm.h"\r
-#include "cytypes.h"\r
-#include "cyfitter_cfg.h"\r
-#include "CyLib.h"\r
-#include "CyDmac.h"\r
-#include "cyfitter.h"\r
-\r
-#define CY_NUM_INTERRUPTS           (32u)\r
-#define CY_NUM_VECTORS              (CYINT_IRQ_BASE + CY_NUM_INTERRUPTS)\r
-#define CY_NUM_ROM_VECTORS          (4u)\r
-#define CY_NVIC_APINT_PTR           ((reg32 *) CYREG_NVIC_APPLN_INTR)\r
-#define CY_NVIC_CFG_CTRL_PTR        ((reg32 *) CYREG_NVIC_CFG_CONTROL)\r
-#define CY_NVIC_APINT_PRIGROUP_3_5  (0x00000400u)  /* Priority group 3.5 split */\r
-#define CY_NVIC_APINT_VECTKEY       (0x05FA0000u)  /* This key is required in order to write the NVIC_APINT register */\r
-#define CY_NVIC_CFG_STACKALIGN      (0x00000200u)  /* This specifies that the exception stack must be 8 byte aligned */\r
-\r
-\r
-/* Extern functions */\r
-extern void CyBtldr_CheckLaunch(void);\r
-\r
-/* Function prototypes */\r
-void initialize_psoc(void);\r
-CY_ISR(IntDefaultHandler);\r
-void Reset(void);\r
-CY_ISR(IntDefaultHandler);\r
-\r
-#if defined(__ARMCC_VERSION)\r
-    #define INITIAL_STACK_POINTER ((cyisraddress)(uint32)&Image$$ARM_LIB_STACK$$ZI$$Limit)\r
-#elif defined (__GNUC__)\r
-    #define INITIAL_STACK_POINTER (&__cy_stack)\r
-#elif defined (__ICCARM__)\r
-    #pragma language=extended\r
-    #pragma segment="CSTACK"\r
-    #define INITIAL_STACK_POINTER  { .__ptr = __sfe( "CSTACK" ) }\r
-\r
-    extern void __iar_program_start( void );\r
-    extern void __iar_data_init3 (void);\r
-#endif  /* (__ARMCC_VERSION) */\r
-\r
-/* Global variables */\r
-#if !defined (__ICCARM__)\r
-    CY_NOINIT static uint32 cySysNoInitDataValid;\r
-#endif  /* !defined (__ICCARM__) */\r
-\r
-\r
-/*******************************************************************************\r
-* Default Ram Interrupt Vector table storage area. Must be 256-byte aligned.\r
-*******************************************************************************/\r
-#if defined (__ICCARM__)\r
-    #pragma location=".ramvectors"\r
-    #pragma data_alignment=256\r
-#else\r
-    CY_SECTION(".ramvectors")\r
-    CY_ALIGN(256)\r
-#endif  /* defined (__ICCARM__) */\r
-cyisraddress CyRamVectors[CY_NUM_VECTORS];\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: IntDefaultHandler\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function is called for all interrupts, other than reset, that get\r
-*  called before the system is setup.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Theory:\r
-*  Any value other than zero is acceptable.\r
-*\r
-*******************************************************************************/\r
-CY_ISR(IntDefaultHandler)\r
-{\r
-\r
-    while(1)\r
-    {\r
-        /***********************************************************************\r
-        * We should never get here. If we do, a serious problem occured, so go\r
-        * into an infinite loop.\r
-        ***********************************************************************/\r
-    }\r
-}\r
-\r
-\r
-#if defined(__ARMCC_VERSION)\r
-\r
-/* Local function for the device reset. */\r
-extern void Reset(void);\r
-\r
-/* Application entry point. */\r
-extern void $Super$$main(void);\r
-\r
-/* Linker-generated Stack Base addresses, Two Region and One Region */\r
-extern uint32 Image$$ARM_LIB_STACK$$ZI$$Limit;\r
-\r
-/* RealView C Library initialization. */\r
-extern int __main(void);\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: Reset\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function handles the reset interrupt for the RVDS/MDK toolchains.\r
-*  This is the first bit of code that is executed at startup.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void Reset(void)\r
-{\r
-    #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-        /* For PSoC 5LP, debugging is enabled by default */\r
-        #if(CYDEV_DEBUGGING_ENABLE == 0)\r
-            *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
-        #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
-\r
-        /* Reset Status Register has Read-to-clear SW access mode.\r
-        * Preserve current RESET_SR0 state to make it available for next reading.\r
-        */\r
-        *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
-\r
-    #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
-\r
-    #if(CYDEV_BOOTLOADER_ENABLE)\r
-        CyBtldr_CheckLaunch();\r
-    #endif /* (CYDEV_BOOTLOADER_ENABLE) */\r
-\r
-    __main();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: $Sub$$main\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function is called imediatly before the users main\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void $Sub$$main(void)\r
-{\r
-    initialize_psoc();\r
-\r
-    /* Call original main */\r
-    $Super$$main();\r
-\r
-    while (1)\r
-    {\r
-        /* If main returns it is undefined what we should do. */\r
-    }\r
-}\r
-\r
-#elif defined(__GNUC__)\r
-\r
-void Start_c(void);\r
-\r
-/* Stack Base address */\r
-extern void __cy_stack(void);\r
-\r
-/* Application entry point. */\r
-extern int main(void);\r
-\r
-/* The static objects constructors initializer */\r
-extern void __libc_init_array(void);\r
-\r
-typedef unsigned char __cy_byte_align8 __attribute ((aligned (8)));\r
-\r
-struct __cy_region\r
-{\r
-    __cy_byte_align8 *init; /* Initial contents of this region.  */\r
-    __cy_byte_align8 *data; /* Start address of region.  */\r
-    size_t init_size;       /* Size of initial data.  */\r
-    size_t zero_size;       /* Additional size to be zeroed.  */\r
-};\r
-\r
-extern const struct __cy_region __cy_regions[];\r
-extern const char __cy_region_num __attribute__((weak));\r
-#define __cy_region_num ((size_t)&__cy_region_num)\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: Reset\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function handles the reset interrupt for the GCC toolchain. This is the\r
-*  first bit of code that is executed at startup.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void Reset(void)\r
-{\r
-    #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-        /* For PSoC 5LP, debugging is enabled by default */\r
-        #if(CYDEV_DEBUGGING_ENABLE == 0)\r
-            *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
-        #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
-\r
-        /* Reset Status Register has Read-to-clear SW access mode.\r
-        * Preserve current RESET_SR0 state to make it available for next reading.\r
-        */\r
-        *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
-\r
-    #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
-\r
-    #if(CYDEV_BOOTLOADER_ENABLE)\r
-        CyBtldr_CheckLaunch();\r
-    #endif /* (CYDEV_BOOTLOADER_ENABLE) */\r
-\r
-    Start_c();\r
-}\r
-\r
-__attribute__((weak))\r
-void _exit(int status)\r
-{\r
-    /* Cause a divide by 0 exception */\r
-    int x = status / INT_MAX;\r
-    x = 4 / x;\r
-\r
-    while(1)\r
-    {\r
-    }\r
-}\r
-\r
-/*******************************************************************************\r
-* Function Name: Start_c\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function handles initializing the .data and .bss sections in\r
-*  preperation for running standard C code.  Once initialization is complete\r
-*  it will call main(). This function will never return.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void Start_c(void)  __attribute__ ((noreturn));\r
-void Start_c(void)\r
-{\r
-    unsigned regions = __cy_region_num;\r
-    const struct __cy_region *rptr = __cy_regions;\r
-\r
-    /* Initialize memory */\r
-    for (regions = __cy_region_num, rptr = __cy_regions; regions--; rptr++)\r
-    {\r
-        uint32 *src = (uint32 *)rptr->init;\r
-        uint32 *dst = (uint32 *)rptr->data;\r
-        unsigned limit = rptr->init_size;\r
-        unsigned count;\r
-\r
-        for (count = 0u; count != limit; count += sizeof (uint32))\r
-        {\r
-            *dst++ = *src++;\r
-        }\r
-        limit = rptr->zero_size;\r
-        for (count = 0u; count != limit; count += sizeof (uint32))\r
-        {\r
-            *dst++ = 0u;\r
-        }\r
-    }\r
-\r
-    /* Invoke static objects constructors */\r
-    __libc_init_array();\r
-    (void) main();\r
-\r
-    while (1)\r
-    {\r
-        /* If main returns, make sure we don't return. */\r
-    }\r
-}\r
-\r
-\r
-#elif defined (__ICCARM__)\r
-\r
-/*******************************************************************************\r
-* Function Name: __low_level_init\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function perform early initializations for the IAR Embedded\r
-*  Workbench IDE. It is executed in the context of reset interrupt handler\r
-*  before the data sections are initialized.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  The value that determines whether or not data sections should be initialized\r
-*  by the system startup code:\r
-*    0 - skip data sections initialization;\r
-*    1 - initialize data sections;\r
-*\r
-*******************************************************************************/\r
-int __low_level_init(void)\r
-{\r
-    #if(CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE)\r
-\r
-        /* For PSoC 5LP, debugging is enabled by default */\r
-        #if(CYDEV_DEBUGGING_ENABLE == 0)\r
-            *(reg32 *)(CYDEV_DEBUG_ENABLE_REGISTER) |= CYDEV_DEBUG_ENABLE_MASK;\r
-        #endif /* (CYDEV_DEBUGGING_ENABLE) */\r
-\r
-        /* Reset Status Register has Read-to-clear SW access mode.\r
-        * Preserve current RESET_SR0 state to make it available for next reading.\r
-        */\r
-        *(reg32 *)(CYREG_PHUB_CFGMEM23_CFG1) = *(reg32 *)(CYREG_RESET_SR0);\r
-\r
-    #endif  /* (CYDEV_PROJ_TYPE != CYDEV_PROJ_TYPE_LOADABLE) */\r
-\r
-    #if (CYDEV_BOOTLOADER_ENABLE)\r
-        CyBtldr_CheckLaunch();\r
-    #endif /* CYDEV_BOOTLOADER_ENABLE */\r
-\r
-    /* Initialize data sections */\r
-    __iar_data_init3();\r
-\r
-    initialize_psoc();\r
-\r
-    return 0;\r
-}\r
-\r
-#endif /* __GNUC__ */\r
-\r
-\r
-/*******************************************************************************\r
-*\r
-* Default Rom Interrupt Vector table.\r
-*\r
-*******************************************************************************/\r
-#if defined(__ARMCC_VERSION)\r
-    /* Suppress diagnostic message 1296-D: extended constant initialiser used */\r
-    #pragma diag_suppress 1296\r
-#endif  /* defined(__ARMCC_VERSION) */\r
-\r
-#if defined (__ICCARM__)\r
-    #pragma location=".romvectors"\r
-    const intvec_elem __vector_table[CY_NUM_ROM_VECTORS] =\r
-#else\r
-    CY_SECTION(".romvectors")\r
-    const cyisraddress RomVectors[CY_NUM_ROM_VECTORS] =\r
-#endif  /* defined (__ICCARM__) */\r
-{\r
-    INITIAL_STACK_POINTER,   /* The initial stack pointer  0 */\r
-    #if defined (__ICCARM__) /* The reset handler          1 */\r
-        __iar_program_start,\r
-    #else\r
-        (cyisraddress)&Reset,\r
-    #endif  /* defined (__ICCARM__) */\r
-    &IntDefaultHandler,      /* The NMI handler            2 */\r
-    &IntDefaultHandler,      /* The hard fault handler     3 */\r
-};\r
-\r
-#if defined(__ARMCC_VERSION)\r
-    #pragma diag_default 1296\r
-#endif  /* defined(__ARMCC_VERSION) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: initialize_psoc\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function used to initialize the PSoC chip before calling main.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-#if (defined(__GNUC__) && !defined(__ARMCC_VERSION))\r
-__attribute__ ((constructor(101)))\r
-#endif\r
-void initialize_psoc(void)\r
-{\r
-    uint32 i;\r
-\r
-    /* Set Priority group 5. */\r
-\r
-    /* Writes to NVIC_APINT register require the VECTKEY in the upper half */\r
-    *CY_NVIC_APINT_PTR = CY_NVIC_APINT_VECTKEY | CY_NVIC_APINT_PRIGROUP_3_5;\r
-    *CY_NVIC_CFG_CTRL_PTR |= CY_NVIC_CFG_STACKALIGN;\r
-\r
-    /* Set Ram interrupt vectors to default functions. */\r
-    for (i = 0u; i < CY_NUM_VECTORS; i++)\r
-    {\r
-        #if defined (__ICCARM__)\r
-            CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? __vector_table[i].__fun : &IntDefaultHandler;\r
-        #else\r
-            CyRamVectors[i] = (i < CY_NUM_ROM_VECTORS) ? RomVectors[i] : &IntDefaultHandler;\r
-        #endif  /* defined (__ICCARM__) */\r
-    }\r
-\r
-    /* Was stored in CFGMEM to avoid being cleared while SRAM gets cleared */\r
-    CyResetStatus = CY_GET_REG8(CYREG_PHUB_CFGMEM23_CFG1);\r
-\r
-    /* Point NVIC at the RAM vector table. */\r
-    *CYINT_VECT_TABLE = CyRamVectors;\r
-\r
-    /* Initialize the configuration registers. */\r
-    cyfitter_cfg();\r
-\r
-    #if(0u != DMA_CHANNELS_USED__MASK0)\r
-\r
-        /* Setup DMA - only necessary if the design contains a DMA component. */\r
-        CyDmacConfigure();\r
-\r
-    #endif  /* (0u != DMA_CHANNELS_USED__MASK0) */\r
-\r
-    #if !defined (__ICCARM__)\r
-        /* Actually, no need to clean this variable, just to make compiler happy. */\r
-        cySysNoInitDataValid = 0u;\r
-    #endif  /* !defined (__ICCARM__) */\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmGnu.s b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmGnu.s
deleted file mode 100755 (executable)
index a8797f7..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmGnu.s
+++ /dev/null
@@ -1,174 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyBootAsmGnu.s\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Assembly routines for GNU as.\r
-*\r
-********************************************************************************\r
-* Copyright 2010-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-.include "cyfittergnu.inc"\r
-\r
-.syntax unified\r
-.text\r
-.thumb\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDelayCycles\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Delays for the specified number of cycles.\r
-*\r
-* Parameters:\r
-*  uint32 cycles: number of cycles to delay.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-/* void CyDelayCycles(uint32 cycles) */\r
-.align 3                    /* Align to 8 byte boundary (2^n) */\r
-.global CyDelayCycles\r
-.func CyDelayCycles, CyDelayCycles\r
-.type CyDelayCycles, %function\r
-.thumb_func\r
-CyDelayCycles:              /* cycles bytes */\r
-/* If ICache is enabled */\r
-.ifeq CYDEV_INSTRUCT_CACHE_ENABLED - 1\r
-\r
-    ADDS r0, r0, #2           /*  1    2   Round to nearest multiple of 4 */\r
-    LSRS r0, r0, #2           /*  1    2   Divide by 4 and set flags */\r
-    BEQ CyDelayCycles_done    /*  2    2   Skip if 0 */\r
-    NOP                       /*  1    2   Loop alignment padding */\r
-\r
-CyDelayCycles_loop:\r
-    SUBS r0, r0, #1           /*  1    2 */\r
-    MOV r0, r0                /*  1    2   Pad loop to power of two cycles */\r
-    BNE CyDelayCycles_loop    /*  2    2 */\r
-\r
-CyDelayCycles_done:\r
-    BX lr                     /*  3    2 */\r
-\r
-.else\r
-\r
-    CMP r0, #20               /*  1    2   If delay is short - jump to cycle */\r
-    BLS CyDelayCycles_short   /*  1    2  */\r
-    PUSH {r1}                 /*  2    2   PUSH r1 to stack */\r
-    MOVS r1, #1               /*  1    2  */\r
-\r
-    SUBS r0, r0, #20          /*  1    2   Subtract overhead */\r
-    LDR r1,=CYREG_CACHE_CC_CTL/*  2    2   Load flash wait cycles value */\r
-    LDRB r1, [r1, #0]         /*  2    2  */\r
-    ANDS r1, #0xC0            /*  1    2  */\r
-\r
-    LSRS r1, r1, #6           /*  1    2  */\r
-    PUSH {r2}                 /*  1    2   PUSH r2 to stack */\r
-    LDR r2, =cy_flash_cycles  /*  2    2  */\r
-    LDRB r1, [r2, r1]         /*  2    2  */\r
-\r
-    POP {r2}                  /*  2    2   POP r2 from stack */\r
-    NOP                       /*  1    2   Alignment padding */\r
-    NOP                       /*  1    2   Alignment padding */\r
-    NOP                       /*  1    2   Alignment padding */\r
-\r
-CyDelayCycles_loop:\r
-    SBCS r0, r0, r1           /*  1    2  */\r
-    BPL CyDelayCycles_loop    /*  3    2  */\r
-    NOP                       /*  1    2   Loop alignment padding */\r
-    NOP                       /*  1    2   Loop alignment padding */\r
-\r
-    POP {r1}                  /*  2    2   POP r1 from stack */\r
-CyDelayCycles_done:\r
-    BX lr                     /*  3    2  */\r
-    NOP                       /*  1    2   Alignment padding */\r
-    NOP                       /*  1    2   Alignment padding */\r
-\r
-CyDelayCycles_short:\r
-    SBCS r0, r0, #4           /*  1    2  */\r
-    BPL CyDelayCycles_short   /*  3    2  */\r
-    BX lr                     /*  3    2  */\r
-\r
-cy_flash_cycles:\r
-.byte 0x0B\r
-.byte 0x05\r
-.byte 0x07\r
-.byte 0x09\r
-.endif\r
-\r
-.endfunc\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEnterCriticalSection\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  CyEnterCriticalSection disables interrupts and returns a value indicating\r
-*  whether interrupts were previously enabled (the actual value depends on\r
-*  whether the device is PSoC 3 or PSoC 5).\r
-*\r
-*  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit\r
-*  with interrupts still enabled. The test and set of the interrupt bits is not\r
-*  atomic; this is true for both PSoC 3 and PSoC 5. Therefore, to avoid\r
-*  corrupting processor state, it must be the policy that all interrupt routines\r
-*  restore the interrupt enable bits as they were found on entry.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  uint8\r
-*   Returns 0 if interrupts were previously enabled or 1 if interrupts\r
-*   were previously disabled.\r
-*\r
-*******************************************************************************/\r
-/* uint8 CyEnterCriticalSection(void) */\r
-.global CyEnterCriticalSection\r
-.func CyEnterCriticalSection, CyEnterCriticalSection\r
-.type CyEnterCriticalSection, %function\r
-.thumb_func\r
-CyEnterCriticalSection:\r
-    MRS r0, PRIMASK         /* Save and return interrupt state */\r
-    CPSID I                 /* Disable interrupts */\r
-    BX lr\r
-.endfunc\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyExitCriticalSection\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  CyExitCriticalSection re-enables interrupts if they were enabled before\r
-*  CyEnterCriticalSection was called. The argument should be the value returned\r
-*  from CyEnterCriticalSection.\r
-*\r
-* Parameters:\r
-*  uint8 savedIntrStatus:\r
-*   Saved interrupt status returned by the CyEnterCriticalSection function.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-/* void CyExitCriticalSection(uint8 savedIntrStatus) */\r
-.global CyExitCriticalSection\r
-.func CyExitCriticalSection, CyExitCriticalSection\r
-.type CyExitCriticalSection, %function\r
-.thumb_func\r
-CyExitCriticalSection:\r
-    MSR PRIMASK, r0         /* Restore interrupt state */\r
-    BX lr\r
-.endfunc\r
-\r
-.end\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmIar.s b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmIar.s
deleted file mode 100755 (executable)
index 166ba87..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmIar.s
+++ /dev/null
@@ -1,156 +0,0 @@
-;-------------------------------------------------------------------------------\r
-; FILENAME: CyBootAsmIar.s\r
-; Version 4.0\r
-;\r
-;  DESCRIPTION:\r
-;    Assembly routines for IAR Embedded Workbench IDE.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions,\r
-; disclaimers, and limitations in the end user license agreement accompanying\r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-    SECTION .text:CODE:ROOT(4)\r
-    PUBLIC CyDelayCycles\r
-    PUBLIC CyEnterCriticalSection\r
-    PUBLIC CyExitCriticalSection\r
-    INCLUDE cyfitteriar.inc\r
-    THUMB\r
-\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyEnterCriticalSection\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  CyEnterCriticalSection disables interrupts and returns a value indicating\r
-;  whether interrupts were previously enabled.\r
-;\r
-;  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit\r
-;  with interrupts still enabled. The test and set of the interrupt bits is not\r
-;  atomic. Therefore, to avoid corrupting processor state, it must be the policy \r
-;  that all interrupt routines restore the interrupt enable bits as they were \r
-;  found on entry.\r
-;\r
-; Parameters:\r
-;  None\r
-;\r
-; Return:\r
-;  uint8\r
-;   Returns 0 if interrupts were previously enabled or 1 if interrupts\r
-;   were previously disabled.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; uint8 CyEnterCriticalSection(void)\r
-\r
-CyEnterCriticalSection:\r
-    MRS r0, PRIMASK         ; Save and return interrupt state\r
-    CPSID I                 ; Disable interrupts\r
-    BX lr\r
-\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyExitCriticalSection\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  CyExitCriticalSection re-enables interrupts if they were enabled before\r
-;  CyEnterCriticalSection was called. The argument should be the value returned\r
-;  from CyEnterCriticalSection.\r
-;\r
-; Parameters:\r
-;  uint8 savedIntrStatus:\r
-;   Saved interrupt status returned by the CyEnterCriticalSection function.\r
-;\r
-; Return:\r
-;  None\r
-;\r
-;-------------------------------------------------------------------------------\r
-; void CyExitCriticalSection(uint8 savedIntrStatus)\r
-\r
-CyExitCriticalSection:\r
-    MSR PRIMASK, r0         ; Restore interrupt state\r
-    BX lr\r
-\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyDelayCycles\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  Delays for the specified number of cycles.\r
-;\r
-; Parameters:\r
-;  uint32 cycles: number of cycles to delay.\r
-;\r
-; Return:\r
-;  None\r
-;\r
-;-------------------------------------------------------------------------------\r
-; void CyDelayCycles(uint32 cycles)\r
-\r
-CyDelayCycles: \r
-    IF CYDEV_INSTRUCT_CACHE_ENABLED == 1\r
-                              ; cycles bytes\r
-    ADDS r0, r0, #2           ;   1   2  Round to nearest multiple of 4\r
-    LSRS r0, r0, #2           ;   1   2  Divide by 4 and set flags\r
-    BEQ CyDelayCycles_done    ;   2   2  Skip if 0\r
-    NOP                       ;   1   2  Loop alignment padding\r
-CyDelayCycles_loop:\r
-    SUBS r0, r0, #1           ;   1   2\r
-    MOV r0, r0                ;   1   2  Pad loop to power of two cycles\r
-    BNE CyDelayCycles_loop    ;   2   2\r
-CyDelayCycles_done:\r
-    BX lr                     ;   3   2\r
-    \r
-    ELSE\r
-    \r
-    CMP r0, #20               ;   1   2  If delay is short - jump to cycle\r
-    BLS CyDelayCycles_short   ;   1   2\r
-    PUSH {r1}                 ;   2   2  PUSH r1 to stack\r
-    MOVS r1, #1               ;   1   2\r
-\r
-    SUBS r0, r0, #20          ;   1   2  Subtract overhead\r
-    LDR r1,=CYREG_CACHE_CC_CTL;   2   2  Load flash wait cycles value\r
-    LDRB r1, [r1, #0]         ;   2   2\r
-    ANDS r1, r1, #0xC0        ;   1   2\r
-\r
-    LSRS r1, r1, #6           ;   1   2\r
-    PUSH {r2}                 ;   1   2  PUSH r2 to stack\r
-    LDR r2, =cy_flash_cycles  ;   2   2\r
-    LDRB r1, [r2, r1]         ;   2   2\r
-\r
-    POP {r2}                  ;   2   2  POP r2 from stack\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-\r
-CyDelayCycles_loop:\r
-    SBCS r0, r0, r1           ;   1   2\r
-    BPL CyDelayCycles_loop    ;   3   2\r
-    NOP                       ;   1   2  Loop alignment padding\r
-    NOP                       ;   1   2  Loop alignment padding\r
-\r
-    POP {r1}                  ;   2   2  POP r1 from stack\r
-CyDelayCycles_done:\r
-    BX lr                     ;   3   2\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-CyDelayCycles_short:\r
-    SBCS r0, r0, #4           ;   1   2\r
-    BPL CyDelayCycles_short   ;   3   2\r
-    BX lr                     ;   3   2\r
-    NOP                       ;   1   2   Loop alignment padding\r
-\r
-    DATA\r
-cy_flash_cycles:\r
-byte_1 DCB 0x0B\r
-byte_2 DCB 0x05\r
-byte_3 DCB 0x07\r
-byte_4 DCB 0x09\r
-\r
-    ENDIF\r
-\r
-    END\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmRv.s b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmRv.s
deleted file mode 100755 (executable)
index 6c40635..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyBootAsmRv.s
+++ /dev/null
@@ -1,161 +0,0 @@
-;-------------------------------------------------------------------------------\r
-; FILENAME: CyBootAsmRv.s\r
-; Version 4.0\r
-;\r
-;  DESCRIPTION:\r
-;    Assembly routines for RealView.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2010-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions,\r
-; disclaimers, and limitations in the end user license agreement accompanying\r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-    AREA |.text|,CODE,ALIGN=3\r
-    THUMB\r
-    EXTERN Reset\r
-\r
-    GET cyfitterrv.inc\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyDelayCycles\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  Delays for the specified number of cycles.\r
-;\r
-; Parameters:\r
-;  uint32 cycles: number of cycles to delay.\r
-;\r
-; Return:\r
-;  None\r
-;\r
-;-------------------------------------------------------------------------------\r
-; void CyDelayCycles(uint32 cycles)\r
-    ALIGN 8\r
-CyDelayCycles FUNCTION\r
-    EXPORT CyDelayCycles\r
-    IF CYDEV_INSTRUCT_CACHE_ENABLED == 1\r
-                              ; cycles bytes\r
-    ADDS r0, r0, #2           ;   1   2  Round to nearest multiple of 4\r
-    LSRS r0, r0, #2           ;   1   2  Divide by 4 and set flags\r
-    BEQ CyDelayCycles_done    ;   2   2  Skip if 0\r
-    NOP                       ;   1   2  Loop alignment padding\r
-CyDelayCycles_loop\r
-    SUBS r0, r0, #1           ;   1   2\r
-    MOV r0, r0                ;   1   2  Pad loop to power of two cycles\r
-    BNE CyDelayCycles_loop    ;   2   2\r
-    NOP                       ;   1   2  Loop alignment padding\r
-CyDelayCycles_done\r
-    BX lr                     ;   3   2\r
-\r
-    ELSE\r
-\r
-    CMP r0, #20               ;   1   2  If delay is short - jump to cycle\r
-    BLS CyDelayCycles_short   ;   1   2\r
-    PUSH {r1}                 ;   2   2  PUSH r1 to stack\r
-    MOVS r1, #1               ;   1   2\r
-\r
-    SUBS r0, r0, #20          ;   1   2  Subtract overhead\r
-    LDR r1,=CYREG_CACHE_CC_CTL;   2   2  Load flash wait cycles value\r
-    LDRB r1, [r1, #0]         ;   2   2\r
-    ANDS r1, #0xC0            ;   1   2\r
-\r
-    LSRS r1, r1, #6           ;   1   2\r
-    PUSH {r2}                 ;   1   2  PUSH r2 to stack\r
-    LDR r2, =cy_flash_cycles  ;   2   2\r
-    LDRB r1, [r2, r1]         ;   2   2\r
-\r
-    POP {r2}                  ;   2   2  POP r2 from stack\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-\r
-CyDelayCycles_loop\r
-    SBCS r0, r0, r1           ;   1   2\r
-    BPL CyDelayCycles_loop    ;   3   2\r
-    NOP                       ;   1   2  Loop alignment padding\r
-    NOP                       ;   1   2  Loop alignment padding\r
-\r
-    POP {r1}                  ;   2   2  POP r1 from stack\r
-CyDelayCycles_done\r
-    BX lr                     ;   3   2\r
-    NOP                       ;   1   2  Alignment padding\r
-    NOP                       ;   1   2  Alignment padding\r
-\r
-CyDelayCycles_short\r
-    SBCS r0, r0, #4           ;   1   2\r
-    BPL CyDelayCycles_short   ;   3   2\r
-    BX lr                     ;   3   2\r
-\r
-cy_flash_cycles\r
-byte_1 DCB 0x0B\r
-byte_2 DCB 0x05\r
-byte_3 DCB 0x07\r
-byte_4 DCB 0x09\r
-\r
-    ENDIF\r
-    ENDFUNC\r
-\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyEnterCriticalSection\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  CyEnterCriticalSection disables interrupts and returns a value indicating\r
-;  whether interrupts were previously enabled (the actual value depends on\r
-;  whether the device is PSoC 3 or PSoC 5).\r
-;\r
-;  Note Implementation of CyEnterCriticalSection manipulates the IRQ enable bit\r
-;  with interrupts still enabled. The test and set of the interrupt bits is not\r
-;  atomic; this is true for both PSoC 3 and PSoC 5. Therefore, to avoid\r
-;  corrupting processor state, it must be the policy that all interrupt routines\r
-;  restore the interrupt enable bits as they were found on entry.\r
-;\r
-; Parameters:\r
-;  None\r
-;\r
-; Return:\r
-;  uint8\r
-;   Returns 0 if interrupts were previously enabled or 1 if interrupts\r
-;   were previously disabled.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; uint8 CyEnterCriticalSection(void)\r
-CyEnterCriticalSection FUNCTION\r
-    EXPORT CyEnterCriticalSection\r
-    MRS r0, PRIMASK         ; Save and return interrupt state\r
-    CPSID I                 ; Disable interrupts\r
-    BX lr\r
-    ENDFUNC\r
-\r
-\r
-;-------------------------------------------------------------------------------\r
-; Function Name: CyExitCriticalSection\r
-;-------------------------------------------------------------------------------\r
-;\r
-; Summary:\r
-;  CyExitCriticalSection re-enables interrupts if they were enabled before\r
-;  CyEnterCriticalSection was called. The argument should be the value returned\r
-;  from CyEnterCriticalSection.\r
-;\r
-; Parameters:\r
-;  uint8 savedIntrStatus:\r
-;   Saved interrupt status returned by the CyEnterCriticalSection function.\r
-;\r
-; Return:\r
-;  None\r
-;\r
-;-------------------------------------------------------------------------------\r
-; void CyExitCriticalSection(uint8 savedIntrStatus)\r
-CyExitCriticalSection FUNCTION\r
-    EXPORT CyExitCriticalSection\r
-    MSR PRIMASK, r0         ; Restore interrupt state\r
-    BX lr\r
-    ENDFUNC\r
-\r
-    END\r
-\r
-; [] END OF FILE\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.c
deleted file mode 100755 (executable)
index f4983c3..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.c
+++ /dev/null
@@ -1,1131 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyDmac.c\r
-* Version 4.0\r
-*\r
-* Description:\r
-*  Provides an API for the DMAC component. The API includes functions for the\r
-*  DMA controller, DMA channels and Transfer Descriptors.\r
-*\r
-*  This API is the library version not the auto generated code that gets\r
-*  generated when the user places a DMA component on the schematic.\r
-*\r
-*  The auto generated code would use the APi's in this module.\r
-*\r
-* Note:\r
-*  This code is endian agnostic.\r
-*\r
-*  The Transfer Descriptor memory can be used as regular memory if the TD's are\r
-*  not being used.\r
-*\r
-*  This code uses the first byte of each TD to manage the free list of TD's.\r
-*  The user can over write this once the TD is allocated.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "CyDmac.h"\r
-\r
-\r
-/*******************************************************************************\r
-* The following variables are initialized from CyDmacConfigure() function that\r
-* is executed from initialize_psoc() at the early initialization stage.\r
-* In case of IAR EW IDE, initialize_psoc() is executed before the data sections\r
-* are initialized. To avoid zeroing, these variables should be initialized\r
-* properly during segments initialization as well.\r
-*******************************************************************************/\r
-static uint8  CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;           /* Current Number of free elements in the list */\r
-static uint8  CyDmaTdFreeIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); /* Index of the first available TD */\r
-static uint32 CyDmaChannels = DMA_CHANNELS_USED__MASK0;              /* Bit map of DMA channel ownership */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmacConfigure\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Creates a linked list of all the TDs to be allocated. This function is called\r
-*  by the startup code; you do not normally need to call it. You could call this\r
-*  function if all of the DMA channels are inactive.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyDmacConfigure(void) \r
-{\r
-    uint8 dmaIndex;\r
-\r
-    /* Set TD list variables. */\r
-    CyDmaTdFreeIndex     = (uint8)(CY_DMA_NUMBEROF_TDS - 1u);\r
-    CyDmaTdCurrentNumber = CY_DMA_NUMBEROF_TDS;\r
-\r
-    /* Make TD free list. */\r
-    for(dmaIndex = (uint8)(CY_DMA_NUMBEROF_TDS - 1u); dmaIndex != 0u; dmaIndex--)\r
-    {\r
-        CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = (uint8)(dmaIndex - 1u);\r
-    }\r
-\r
-    /* Make the last one point to zero. */\r
-    CY_DMA_TDMEM_STRUCT_PTR[dmaIndex].TD0[0u] = 0u;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmacError\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns errors of the last failed DMA transaction.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  Errors of the last failed DMA transaction.\r
-*\r
-*  DMAC_PERIPH_ERR:\r
-*   Set to 1 when a peripheral responds to a bus transaction with an error\r
-*   response.\r
-*\r
-*  DMAC_UNPOP_ACC:\r
-*   Set to 1 when an access is attempted to an invalid address.\r
-*\r
-*  DMAC_BUS_TIMEOUT:\r
-*   Set to 1 when a bus timeout occurs. Cleared by writing a 1. Timeout values\r
-*   are determined by the BUS_TIMEOUT field in the PHUBCFG register.\r
-*\r
-* Theory:\r
-*  Once an error occurs the error bits are sticky and are only cleared by a\r
-*  write 1 to the error register.\r
-*\r
-*******************************************************************************/\r
-uint8 CyDmacError(void) \r
-{\r
-    return((uint8)(((uint32) 0x0Fu) & *CY_DMA_ERR_PTR));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmacClearError\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Clears the error bits in the error register of the DMAC.\r
-*\r
-* Parameters:\r
-* error:\r
-*   Clears the error bits in the DMAC error register.\r
-*\r
-*  DMAC_PERIPH_ERR:\r
-*   Set to 1 when a peripheral responds to a bus transaction with an error\r
-*   response.\r
-*\r
-*  DMAC_UNPOP_ACC:\r
-*   Set to 1 when an access is attempted to an invalid address.\r
-*\r
-*  DMAC_BUS_TIMEOUT:\r
-*   Set to 1 when a bus timeout occurs. Cleared by writing a 1. Timeout values\r
-*   are determined by the BUS_TIMEOUT field in the PHUBCFG register.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Theory:\r
-*  Once an error occurs the error bits are sticky and are only cleared by a\r
-*  write 1 to the error register.\r
-*\r
-*******************************************************************************/\r
-void CyDmacClearError(uint8 error) \r
-{\r
-    *CY_DMA_ERR_PTR = (((uint32)0x0Fu) & ((uint32)error));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmacErrorAddress\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  When an DMAC_BUS_TIMEOUT, DMAC_UNPOP_ACC and DMAC_PERIPH_ERR occurs the\r
-*  address of the error is written to the error address register and can be read\r
-*  with this function.\r
-*\r
-*  If there are multiple errors, only the address of the first is saved.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  The address that caused the error.\r
-*\r
-*******************************************************************************/\r
-uint32 CyDmacErrorAddress(void) \r
-{\r
-    return(CY_GET_REG32(CY_DMA_ERR_ADR_PTR));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChAlloc\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Allocates a channel from the DMAC to be used in all functions that require a\r
-*  channel handle.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  The allocated channel number. Zero is a valid channel number.\r
-*  DMA_INVALID_CHANNEL is returned if there are no channels available.\r
-*\r
-*******************************************************************************/\r
-uint8 CyDmaChAlloc(void) \r
-{\r
-    uint8 interruptState;\r
-    uint8 dmaIndex;\r
-    uint32 channel = 1u;\r
-\r
-\r
-    /* Enter critical section! */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    /* Look for a free channel. */\r
-    for(dmaIndex = 0u; dmaIndex < CY_DMA_NUMBEROF_CHANNELS; dmaIndex++)\r
-    {\r
-        if(0uL == (CyDmaChannels & channel))\r
-        {\r
-            /* Mark the channel as used. */\r
-            CyDmaChannels |= channel;\r
-            break;\r
-        }\r
-\r
-        channel <<= 1u;\r
-    }\r
-\r
-    if(dmaIndex >= CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        dmaIndex = CY_DMA_INVALID_CHANNEL;\r
-    }\r
-\r
-    /* Exit critical section! */\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return(dmaIndex);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChFree\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Frees a channel allocated by DmaChAlloc().\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   The handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChFree(uint8 chHandle) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-    uint8 interruptState;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        /* Enter critical section */\r
-        interruptState = CyEnterCriticalSection();\r
-\r
-        /* Clear the bit mask that keeps track of ownership. */\r
-        CyDmaChannels &= ~(((uint32) 1u) << chHandle);\r
-\r
-        /* Exit critical section */\r
-        CyExitCriticalSection(interruptState);\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChEnable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the DMA channel. A software or hardware request still must happen\r
-*  before the channel is executed.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-*  uint8 preserveTds:\r
-*   Preserves the original TD state when the TD has completed. This parameter\r
-*   applies to all TDs in the channel.\r
-*\r
-*   0 - When a TD is completed, the DMAC leaves the TD configuration values in\r
-*   their current state, and does not restore them to their original state.\r
-*\r
-*   1 - When a TD is completed, the DMAC restores the original configuration\r
-*   values of the TD.\r
-*\r
-*  When preserveTds is set, the TD slot that equals the channel number becomes\r
-*  RESERVED and that becomes where the working registers exist. So, for example,\r
-*  if you are using CH06 and preserveTds is set, you are not allowed to use TD\r
-*  slot 6. That is reclaimed by the DMA engine for its private use.\r
-*\r
-*  Note Do not chain back to a completed TD if the preserveTds for the channel\r
-*  is set to 0. When a TD has completed preserveTds for the channel set to 0,\r
-*  the transfer count will be at 0. If a TD with a transfer count of 0 is\r
-*  started, the TD will transfer an indefinite amount of data.\r
-*\r
-*  Take extra precautions when using the hardware request (DRQ) option when the\r
-*  preserveTds is set to 0, as you might be requesting the wrong data.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChEnable(uint8 chHandle, uint8 preserveTds) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        if (0u != preserveTds)\r
-        {\r
-            /* Store the intermediate TD states separately in CHn_SEP_TD0/1 to\r
-            *  preserve the original TD chain\r
-            */\r
-            CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= CY_DMA_CH_BASIC_CFG_WORK_SEP;\r
-        }\r
-        else\r
-        {\r
-            /* Store the intermediate and final TD states on top of the original TD chain */\r
-            CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_CH_BASIC_CFG_WORK_SEP);\r
-        }\r
-\r
-        /* Enable channel */\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= CY_DMA_CH_BASIC_CFG_EN;\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChDisable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the DMA channel. Once this function is called, CyDmaChStatus() may\r
-*  be called to determine when the channel is disabled and which TDs were being\r
-*  executed.\r
-*\r
-*  If it is currently executing it will allow the current burst to finish\r
-*  naturally.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChDisable(uint8 chHandle) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        /***********************************************************************\r
-        * Should not change configuration information of a DMA channel when it\r
-        * is active (or vulnerable to becoming active).\r
-        ***********************************************************************/\r
-\r
-        /* Disable channel */\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_EN));\r
-\r
-        /* Store the intermediate and final TD states on top of the original TD chain */\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] &= ((uint8) (~CY_DMA_CH_BASIC_CFG_WORK_SEP));\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaClearPendingDrq\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Clears pending DMA data request.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   Handle to the dma channel.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaClearPendingDrq(uint8 chHandle) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].action[0] |= CY_DMA_CPU_TERM_CHAIN;\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0] |= 0x01u;\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChPriority\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the priority of a DMA channel. You can use this function when you want\r
-*  to change the priority at run time. If the priority remains the same for a\r
-*  DMA channel, then you can configure the priority in the .cydwr file.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-*  uint8 priority:\r
-*   Priority to set the channel to, 0 - 7.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChPriority(uint8 chHandle, uint8 priority) \r
-{\r
-    uint8 value;\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        value = CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] & ((uint8)(~(0x0Eu)));\r
-\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] = value | ((uint8) ((priority & 0x7u) << 0x01u));\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChSetExtendedAddress\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the high 16 bits of the source and destination addresses for the DMA\r
-*  channel (valid for all TDs in the chain).\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-*  uint16 source:\r
-*   Upper 16 bit address of the DMA transfer source.\r
-*\r
-*  uint16 destination:\r
-*   Upper 16 bit address of the DMA transfer destination.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChSetExtendedAddress(uint8 chHandle, uint16 source, uint16 destination) \\r
-    \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-    reg16 *convert;\r
-\r
-    #if(CY_PSOC5)\r
-\r
-        /* 0x1FFF8000-0x1FFFFFFF needs to use alias at 0x20008000-0x2000FFFF */\r
-        if(source == 0x1FFFu)\r
-        {\r
-            source = 0x2000u;\r
-        }\r
-\r
-        if(destination == 0x1FFFu)\r
-        {\r
-            destination = 0x2000u;\r
-        }\r
-\r
-    #endif  /* (CY_PSOC5) */\r
-\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        /* Set source address */\r
-        convert = (reg16 *) &CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG1[0];\r
-        CY_SET_REG16(convert, source);\r
-\r
-        /* Set destination address */\r
-        convert = (reg16 *) &CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG1[2u];\r
-        CY_SET_REG16(convert, destination);\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChSetInitialTd\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the initial TD to be executed for the channel when the CyDmaChEnable()\r
-*  function is called.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitialize().\r
-*\r
-*  uint8 startTd:\r
-*   The index of TD to set as the first TD associated with the channel. Zero is\r
-*   a valid TD index.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChSetInitialTd(uint8 chHandle, uint8 startTd) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[1u] = startTd;\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChSetRequest\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Allows the caller to terminate a chain of TDs, terminate one TD, or create a\r
-*  direct request to start the DMA channel.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-*  uint8 request:\r
-*   One of the following constants. Each of the constants is a three-bit value.\r
-*\r
-*   CPU_REQ         - Create a direct request to start the DMA channel\r
-*   CPU_TERM_TD     - Terminate one TD\r
-*   CPU_TERM_CHAIN  - Terminate a chain of TDs\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChSetRequest(uint8 chHandle, uint8 request) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        CY_DMA_CH_STRUCT_PTR[chHandle].action[0u] |= (request & (CPU_REQ | CPU_TERM_TD | CPU_TERM_CHAIN));\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChGetRequest\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function allows the caller of CyDmaChSetRequest() to determine if the\r
-*  request was completed.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-* Return:\r
-*  Returns a three-bit field, corresponding to the three bits of the request,\r
-*  which describes the state of the previously posted request. If the value is\r
-*  zero, the request was completed. CY_DMA_INVALID_CHANNEL if the handle is\r
-*  invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChGetRequest(uint8 chHandle) \r
-{\r
-    cystatus status = CY_DMA_INVALID_CHANNEL;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        status = (cystatus) ((uint32)CY_DMA_CH_STRUCT_PTR[chHandle].action[0u] &\r
-                            (uint32)(CY_DMA_CPU_REQ | CY_DMA_CPU_TERM_TD | CY_DMA_CPU_TERM_CHAIN));\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Determines the status of the DMA channel.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitalize().\r
-*\r
-*  uint8 * currentTd:\r
-*   The address to store the index of the current TD. Can be NULL if the value\r
-*   is not needed.\r
-*\r
-*  uint8 * state:\r
-*   The address to store the state of the channel. Can be NULL if the value is\r
-*   not needed.\r
-*\r
-*   STATUS_TD_ACTIVE\r
-*    0: Channel is not currently being serviced by DMAC\r
-*    1: Channel is currently being serviced by DMAC\r
-*\r
-*   STATUS_CHAIN_ACTIVE\r
-*    0: TD chain is inactive; either no DMA requests have triggered a new chain\r
-*       or the previous chain has completed.\r
-*    1: TD chain has been triggered by a DMA request\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-* Theory:\r
-*   The caller can check on the activity of the Current TD and the Chain.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChStatus(uint8 chHandle, uint8 * currentTd, uint8 * state) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        if(NULL != currentTd)\r
-        {\r
-            *currentTd = CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[1] & 0x7Fu;\r
-        }\r
-\r
-        if(NULL != state)\r
-        {\r
-            *state= CY_DMA_CH_STRUCT_PTR[chHandle].basic_status[0];\r
-        }\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return (status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChSetConfiguration\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Sets configuration information of the channel.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or DMA_DmaInitialize().\r
-*\r
-*  uint8 burstCount:\r
-*   Specifies the size of bursts (1 to 127) the data transfer should be divided\r
-*   into. If this value is zero then the whole transfer is done in one burst.\r
-*\r
-*  uint8 requestPerBurst:\r
-*   The whole of the data can be split into multiple bursts, if this is\r
-*   required to complete the transaction:\r
-*    0: All subsequent bursts after the first burst will be automatically\r
-*       requested and carried out\r
-*    1: All subsequent bursts after the first burst must also be individually\r
-*       requested.\r
-*\r
-*  uint8 tdDone0:\r
-*   Selects one of the TERMOUT0 interrupt lines to signal completion. The line\r
-*   connected to the nrq terminal will determine the TERMOUT0_SEL definition and\r
-*   should be used as supplied by cyfitter.h\r
-*\r
-*  uint8 tdDone1:\r
-*   Selects one of the TERMOUT1 interrupt lines to signal completion. The line\r
-*   connected to the nrq terminal will determine the TERMOUT1_SEL definition and\r
-*   should be used as supplied by cyfitter.h\r
-*\r
-*  uint8 tdStop:\r
-*   Selects one of the TERMIN interrupt lines to signal to the DMAC that the TD\r
-*   should terminate. The signal connected to the trq terminal will determine\r
-*   which TERMIN (termination request) is used.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChSetConfiguration(uint8 chHandle, uint8 burstCount, uint8 requestPerBurst,\r
-                                 uint8 tdDone0, uint8 tdDone1, uint8 tdStop) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[0] = (burstCount & 0x7Fu) | ((uint8)((requestPerBurst & 0x1u) << 7u));\r
-        CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[1] = ((uint8)((tdDone1 & 0xFu) << 4u)) | (tdDone0 & 0xFu);\r
-        CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[2] = 0x0Fu & tdStop;\r
-        CY_DMA_CFGMEM_STRUCT_PTR[chHandle].CFG0[3] = 0u; /* burstcount_remain. */\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return (status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdAllocate\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Allocates a TD for use with an allocated DMA channel.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  Zero-based index of the TD to be used by the caller. Since there are 128 TDs\r
-*  minus the reserved TDs (0 to 23), the value returned would range from 24 to\r
-*  127 not 24 to 128. DMA_INVALID_TD is returned if there are no free TDs\r
-*  available.\r
-*\r
-*******************************************************************************/\r
-uint8 CyDmaTdAllocate(void) \r
-{\r
-    uint8 interruptState;\r
-    uint8 element = CY_DMA_INVALID_TD;\r
-\r
-    /* Enter critical section! */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    if(CyDmaTdCurrentNumber > NUMBEROF_CHANNELS)\r
-    {\r
-        /* Get pointer to the Next available. */\r
-        element = CyDmaTdFreeIndex;\r
-\r
-        /* Decrement the count. */\r
-        CyDmaTdCurrentNumber--;\r
-\r
-        /* Update the next available pointer. */\r
-        CyDmaTdFreeIndex = CY_DMA_TDMEM_STRUCT_PTR[element].TD0[0];\r
-    }\r
-\r
-    /* Exit critical section! */\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return(element);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdFree\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns a TD to the free list.\r
-*\r
-* Parameters:\r
-*  uint8 tdHandle:\r
-*   The TD handle returned by the CyDmaTdAllocate().\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyDmaTdFree(uint8 tdHandle) \r
-{\r
-    if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
-    {\r
-        /* Enter critical section! */\r
-        uint8 interruptState = CyEnterCriticalSection();\r
-\r
-        /* Get pointer to the Next available. */\r
-        CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u] = CyDmaTdFreeIndex;\r
-\r
-        /* Set new Next Available. */\r
-        CyDmaTdFreeIndex = tdHandle;\r
-\r
-        /* Keep track of how many left. */\r
-        CyDmaTdCurrentNumber++;\r
-\r
-        /* Exit critical section! */\r
-        CyExitCriticalSection(interruptState);\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdFreeCount\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the number of free TDs available to be allocated.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  The number of free TDs.\r
-*\r
-*******************************************************************************/\r
-uint8 CyDmaTdFreeCount(void) \r
-{\r
-    return(CyDmaTdCurrentNumber - CY_DMA_NUMBEROF_CHANNELS);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdSetConfiguration\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Configures the TD.\r
-*\r
-* Parameters:\r
-*  uint8 tdHandle:\r
-*   A handle previously returned by CyDmaTdAlloc().\r
-*\r
-*  uint16 transferCount:\r
-*   The size of the data transfer (in bytes) for this TD. A size of zero will\r
-*   cause the transfer to continue indefinitely. This parameter is limited to\r
-*   4095 bytes; the TD is not initialized at all when a higher value is passed.\r
-*\r
-*  uint8 nextTd:\r
-*   Zero based index of the next Transfer Descriptor in the TD chain. Zero is a\r
-*   valid pointer to the next TD; DMA_END_CHAIN_TD is the end of the chain.\r
-*   DMA_DISABLE_TD indicates an end to the chain and the DMA is disabled. No\r
-*   further TDs are fetched. DMA_DISABLE_TD is only supported on PSoC3 and\r
-*   PSoC 5LP silicons.\r
-*\r
-*  uint8 configuration:\r
-*   Stores the Bit field of configuration bits.\r
-*\r
-*   CY_DMA_TD_SWAP_EN        - Perform endian swap\r
-*\r
-*   CY_DMA_TD_SWAP_SIZE4     - Swap size = 4 bytes\r
-*\r
-*   CY_DMA_TD_AUTO_EXEC_NEXT - The next TD in the chain will trigger\r
-*                              automatically when the current TD completes.\r
-*\r
-*   CY_DMA_TD_TERMIN_EN      - Terminate this TD if a positive edge on the trq\r
-*                              input line occurs. The positive edge must occur\r
-*                              during a burst. That is the only time the DMAC\r
-*                              will listen for it.\r
-*\r
-*   DMA__TD_TERMOUT_EN       - When this TD completes, the TERMOUT signal will\r
-*                              generate a pulse. Note that this option is\r
-*                              instance specific with the instance name followed\r
-*                              by two underscores. In this example, the instance\r
-*                              name is DMA.\r
-*\r
-*   CY_DMA_TD_INC_DST_ADR    - Increment DST_ADR according to the size of each\r
-*                              data transaction in the burst.\r
-*\r
-*   CY_DMA_TD_INC_SRC_ADR    - Increment SRC_ADR according to the size of each\r
-*                              data transaction in the burst.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if tdHandle or transferCount is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaTdSetConfiguration(uint8 tdHandle, uint16 transferCount, uint8 nextTd, uint8 configuration) \\r
-    \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if((tdHandle < CY_DMA_NUMBEROF_TDS) && (0u == (0xF000u & transferCount)))\r
-    {\r
-        /* Set 12 bits transfer count. */\r
-        reg16 *convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0u];\r
-        CY_SET_REG16(convert, transferCount);\r
-\r
-        /* Set Next TD pointer. */\r
-        CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u] = nextTd;\r
-\r
-        /* Configure the TD */\r
-        CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u] = configuration;\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdGetConfiguration\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Retrieves the configuration of the TD. If a NULL pointer is passed as a\r
-*  parameter, that parameter is skipped. You may request only the values you are\r
-*  interested in.\r
-*\r
-* Parameters:\r
-*  uint8 tdHandle:\r
-*   A handle previously returned by CyDmaTdAlloc().\r
-*\r
-*  uint16 * transferCount:\r
-*   The address to store the size of the data transfer (in bytes) for this TD.\r
-*   A size of zero could indicate that the TD has completed its transfer, or\r
-*   that the TD is doing an indefinite transfer.\r
-*\r
-*  uint8 * nextTd:\r
-*   The address to store the index of the next TD in the TD chain.\r
-*\r
-*  uint8 * configuration:\r
-*   The address to store the Bit field of configuration bits.\r
-*   See CyDmaTdSetConfiguration() function description.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if tdHandle is invalid.\r
-*\r
-* Side Effects:\r
-*  If a TD has a transfer count of N and is executed, the transfer count becomes\r
-*  0. If it is reexecuted, the Transfer count of zero will be interpreted as a\r
-*  request for indefinite transfer. Be careful when requesting a TD with a\r
-*  transfer count of zero.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaTdGetConfiguration(uint8 tdHandle, uint16 * transferCount, uint8 * nextTd, uint8 * configuration) \\r
-    \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
-    {\r
-        /* If we have a pointer */\r
-        if(NULL != transferCount)\r
-        {\r
-            /* Get the 12 bits of the transfer count */\r
-            reg16 *convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[0];\r
-            *transferCount = 0x0FFFu & CY_GET_REG16(convert);\r
-        }\r
-\r
-        /* If we have a pointer */\r
-        if(NULL != nextTd)\r
-        {\r
-            /* Get the Next TD pointer */\r
-            *nextTd = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[2u];\r
-        }\r
-\r
-        /* If we have a pointer */\r
-        if(NULL != configuration)\r
-        {\r
-            /* Get the configuration the TD */\r
-            *configuration = CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD0[3u];\r
-        }\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdSetAddress\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the lower 16 bits of the source and destination addresses for this TD\r
-*  only.\r
-*\r
-* Parameters:\r
-*  uint8 tdHandle:\r
-*   A handle previously returned by CyDmaTdAlloc().\r
-*\r
-*  uint16 source:\r
-*   The lower 16 address bits of the source of the data transfer.\r
-*\r
-*  uint16 destination:\r
-*   The lower 16 address bits of the destination of the data transfer.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if tdHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaTdSetAddress(uint8 tdHandle, uint16 source, uint16 destination) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-    reg16 *convert;\r
-\r
-    if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
-    {\r
-        /* Set source address */\r
-        convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[0u];\r
-        CY_SET_REG16(convert, source);\r
-\r
-        /* Set destination address */\r
-        convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[2u];\r
-        CY_SET_REG16(convert, destination);\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaTdGetAddress\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Retrieves the lower 16 bits of the source and/or destination addresses for\r
-*  this TD only. If NULL is passed for a pointer parameter, that value is\r
-*  skipped. You may request only the values of interest.\r
-*\r
-* Parameters:\r
-*  uint8 tdHandle:\r
-*   A handle previously returned by CyDmaTdAlloc().\r
-*\r
-*  uint16 * source:\r
-*   The address to store the lower 16 address bits of the source of the data\r
-*   transfer.\r
-*\r
-*  uint16 * destination:\r
-*   The address to store the lower 16 address bits of the destination of the\r
-*   data transfer.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if tdHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaTdGetAddress(uint8 tdHandle, uint16 * source, uint16 * destination) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-    reg16 *convert;\r
-\r
-    if(tdHandle < CY_DMA_NUMBEROF_TDS)\r
-    {\r
-        /* If we have a pointer. */\r
-        if(NULL != source)\r
-        {\r
-            /* Get source address */\r
-            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[0u];\r
-            *source = CY_GET_REG16(convert);\r
-        }\r
-\r
-        /* If we have a pointer. */\r
-        if(NULL != destination)\r
-        {\r
-            /* Get Destination address. */\r
-            convert = (reg16 *) &CY_DMA_TDMEM_STRUCT_PTR[tdHandle].TD1[2u];\r
-            *destination = CY_GET_REG16(convert);\r
-        }\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDmaChRoundRobin\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Either enables or disables the Round-Robin scheduling enforcement algorithm.\r
-*  Within a priority level a Round-Robin fairness algorithm is enforced.\r
-*\r
-* Parameters:\r
-*  uint8 chHandle:\r
-*   A handle previously returned by CyDmaChAlloc() or Dma_DmaInitialize().\r
-*\r
-*  uint8 enableRR:\r
-*   0: Disable Round-Robin fairness algorithm\r
-*   1: Enable Round-Robin fairness algorithm\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_BAD_PARAM if chHandle is invalid.\r
-*\r
-*******************************************************************************/\r
-cystatus CyDmaChRoundRobin(uint8 chHandle, uint8 enableRR) \r
-{\r
-    cystatus status = CYRET_BAD_PARAM;\r
-\r
-    if(chHandle < CY_DMA_NUMBEROF_CHANNELS)\r
-    {\r
-        if (0u != enableRR)\r
-        {\r
-            CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] |= (uint8)CY_DMA_ROUND_ROBIN_ENABLE;\r
-        }\r
-        else\r
-        {\r
-            CY_DMA_CH_STRUCT_PTR[chHandle].basic_cfg[0u] &= (uint8)(~CY_DMA_ROUND_ROBIN_ENABLE);\r
-        }\r
-\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.h
deleted file mode 100755 (executable)
index 6a3ee85..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyDmac.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyDmac.h\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides the function definitions for the DMA Controller.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYDMAC_H)\r
-#define CY_BOOT_CYDMAC_H\r
-\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cydevice_trm.h"\r
-#include "CyLib.h"\r
-\r
-\r
-/***************************************\r
-*    Function Prototypes\r
-***************************************/\r
-\r
-/* DMA Controller functions. */\r
-void    CyDmacConfigure(void) ;\r
-uint8   CyDmacError(void) ;\r
-void    CyDmacClearError(uint8 error) ;\r
-uint32  CyDmacErrorAddress(void) ;\r
-\r
-/* Channel specific functions. */\r
-uint8    CyDmaChAlloc(void) ;\r
-cystatus CyDmaChFree(uint8 chHandle) ;\r
-cystatus CyDmaChEnable(uint8 chHandle, uint8 preserveTds) ;\r
-cystatus CyDmaChDisable(uint8 chHandle) ;\r
-cystatus CyDmaClearPendingDrq(uint8 chHandle) ;\r
-cystatus CyDmaChPriority(uint8 chHandle, uint8 priority) ;\r
-cystatus CyDmaChSetExtendedAddress(uint8 chHandle, uint16 source, uint16 destination)\\r
-;\r
-cystatus CyDmaChSetInitialTd(uint8 chHandle, uint8 startTd) ;\r
-cystatus CyDmaChSetRequest(uint8 chHandle, uint8 request) ;\r
-cystatus CyDmaChGetRequest(uint8 chHandle) ;\r
-cystatus CyDmaChStatus(uint8 chHandle, uint8 * currentTd, uint8 * state) ;\r
-cystatus CyDmaChSetConfiguration(uint8 chHandle, uint8 burstCount, uint8 requestPerBurst, uint8 tdDone0,\r
-                                 uint8 tdDone1, uint8 tdStop) ;\r
-cystatus CyDmaChRoundRobin(uint8 chHandle, uint8 enableRR) ;\r
-\r
-/* Transfer Descriptor functions. */\r
-uint8    CyDmaTdAllocate(void) ;\r
-void     CyDmaTdFree(uint8 tdHandle) ;\r
-uint8    CyDmaTdFreeCount(void) ;\r
-cystatus CyDmaTdSetConfiguration(uint8 tdHandle, uint16 transferCount, uint8 nextTd, uint8 configuration)\\r
-;\r
-cystatus CyDmaTdGetConfiguration(uint8 tdHandle, uint16 * transferCount, uint8 * nextTd, uint8 * configuration)\\r
-;\r
-cystatus CyDmaTdSetAddress(uint8 tdHandle, uint16 source, uint16 destination) ;\r
-cystatus CyDmaTdGetAddress(uint8 tdHandle, uint16 * source, uint16 * destination) ;\r
-\r
-\r
-/***************************************\r
-* Data Struct Definitions\r
-***************************************/\r
-\r
-typedef struct dmac_ch_struct\r
-{\r
-    volatile uint8 basic_cfg[4];\r
-    volatile uint8 action[4];\r
-    volatile uint8 basic_status[4];\r
-    volatile uint8 reserved[4];\r
-\r
-} dmac_ch;\r
-\r
-\r
-typedef struct dmac_cfgmem_struct\r
-{\r
-    volatile uint8 CFG0[4];\r
-    volatile uint8 CFG1[4];\r
-\r
-} dmac_cfgmem;\r
-\r
-\r
-typedef struct dmac_tdmem_struct\r
-{\r
-    volatile uint8  TD0[4];\r
-    volatile uint8  TD1[4];\r
-\r
-} dmac_tdmem;\r
-\r
-\r
-typedef struct dmac_tdmem2_struct\r
-{\r
-    volatile uint16 xfercnt;\r
-    volatile uint8  next_td_ptr;\r
-    volatile uint8  flags;\r
-    volatile uint16 src_adr;\r
-    volatile uint16 dst_adr;\r
-} dmac_tdmem2;\r
-\r
-\r
-/***************************************\r
-* API Constants\r
-***************************************/\r
-\r
-#define CY_DMA_INVALID_CHANNEL      0xFFu   /* Invalid Channel ID */\r
-#define CY_DMA_INVALID_TD           0xFFu   /* Invalid TD */\r
-#define CY_DMA_END_CHAIN_TD         0xFFu   /* End of chain TD */\r
-#define CY_DMA_DISABLE_TD           0xFEu\r
-\r
-#define CY_DMA_TD_SIZE              0x08u\r
-\r
-/* The "u" was removed as workaround for Keil compiler bug */\r
-#define CY_DMA_TD_SWAP_EN           0x80\r
-#define CY_DMA_TD_SWAP_SIZE4        0x40\r
-#define CY_DMA_TD_AUTO_EXEC_NEXT    0x20\r
-#define CY_DMA_TD_TERMIN_EN         0x10\r
-#define CY_DMA_TD_TERMOUT1_EN       0x08\r
-#define CY_DMA_TD_TERMOUT0_EN       0x04\r
-#define CY_DMA_TD_INC_DST_ADR       0x02\r
-#define CY_DMA_TD_INC_SRC_ADR       0x01\r
-\r
-#define CY_DMA_NUMBEROF_TDS         128u\r
-#define CY_DMA_NUMBEROF_CHANNELS    ((uint8)(CYDEV_DMA_CHANNELS_AVAILABLE))\r
-\r
-/* Action register bits */\r
-#define CY_DMA_CPU_REQ              ((uint8)(1u << 0u))\r
-#define CY_DMA_CPU_TERM_TD          ((uint8)(1u << 1u))\r
-#define CY_DMA_CPU_TERM_CHAIN       ((uint8)(1u << 2u))\r
-\r
-/* Basic Status register bits */\r
-#define CY_DMA_STATUS_CHAIN_ACTIVE  ((uint8)(1u << 0u))\r
-#define CY_DMA_STATUS_TD_ACTIVE     ((uint8)(1u << 1u))\r
-\r
-/* DMA controller register error bits */\r
-#define CY_DMA_BUS_TIMEOUT          (1u << 1u)\r
-#define CY_DMA_UNPOP_ACC            (1u << 2u)\r
-#define CY_DMA_PERIPH_ERR           (1u << 3u)\r
-\r
-/* Round robin bits */\r
-#define CY_DMA_ROUND_ROBIN_ENABLE   ((uint8)(1u << 4u))\r
-\r
-\r
-/*******************************************************************************\r
-* CyDmaChEnable() / CyDmaChDisable() API constants\r
-*******************************************************************************/\r
-#define CY_DMA_CH_BASIC_CFG_EN           (0x01u)\r
-#define CY_DMA_CH_BASIC_CFG_WORK_SEP     (0x20u)\r
-\r
-\r
-/***************************************\r
-* Registers\r
-***************************************/\r
-\r
-#define CY_DMA_CFG_REG              (*(reg32 *) CYREG_PHUB_CFG)\r
-#define CY_DMA_CFG_PTR              ( (reg32 *) CYREG_PHUB_CFG)\r
-\r
-#define CY_DMA_ERR_REG              (*(reg32 *) CYREG_PHUB_ERR)\r
-#define CY_DMA_ERR_PTR              ( (reg32 *) CYREG_PHUB_ERR)\r
-\r
-#define CY_DMA_ERR_ADR_REG          (*(reg32 *) CYREG_PHUB_ERR_ADR)\r
-#define CY_DMA_ERR_ADR_PTR          ( (reg32 *) CYREG_PHUB_ERR_ADR)\r
-\r
-#define CY_DMA_CH_STRUCT_REG        (*(dmac_ch CYXDATA *) CYDEV_PHUB_CH0_BASE)\r
-#define CY_DMA_CH_STRUCT_PTR        ( (dmac_ch CYXDATA *) CYDEV_PHUB_CH0_BASE)\r
-\r
-#define CY_DMA_CFGMEM_STRUCT_REG    (*(dmac_cfgmem CYXDATA *) CYDEV_PHUB_CFGMEM0_BASE)\r
-#define CY_DMA_CFGMEM_STRUCT_PTR    ( (dmac_cfgmem CYXDATA *) CYDEV_PHUB_CFGMEM0_BASE)\r
-\r
-#define CY_DMA_TDMEM_STRUCT_REG     (*(dmac_tdmem  CYXDATA *) CYDEV_PHUB_TDMEM0_BASE)\r
-#define CY_DMA_TDMEM_STRUCT_PTR     ( (dmac_tdmem  CYXDATA *) CYDEV_PHUB_TDMEM0_BASE)\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0\r
-*******************************************************************************/\r
-#define DMA_INVALID_CHANNEL         (CY_DMA_INVALID_CHANNEL)\r
-#define DMA_INVALID_TD              (CY_DMA_INVALID_TD)\r
-#define DMA_END_CHAIN_TD            (CY_DMA_END_CHAIN_TD)\r
-#define DMAC_TD_SIZE                (CY_DMA_TD_SIZE)\r
-#define TD_SWAP_EN                  (CY_DMA_TD_SWAP_EN)\r
-#define TD_SWAP_SIZE4               (CY_DMA_TD_SWAP_SIZE4)\r
-#define TD_AUTO_EXEC_NEXT           (CY_DMA_TD_AUTO_EXEC_NEXT)\r
-#define TD_TERMIN_EN                (CY_DMA_TD_TERMIN_EN)\r
-#define TD_TERMOUT1_EN              (CY_DMA_TD_TERMOUT1_EN)\r
-#define TD_TERMOUT0_EN              (CY_DMA_TD_TERMOUT0_EN)\r
-#define TD_INC_DST_ADR              (CY_DMA_TD_INC_DST_ADR)\r
-#define TD_INC_SRC_ADR              (CY_DMA_TD_INC_SRC_ADR)\r
-#define NUMBEROF_TDS                (CY_DMA_NUMBEROF_TDS)\r
-#define NUMBEROF_CHANNELS           (CY_DMA_NUMBEROF_CHANNELS)\r
-#define CPU_REQ                     (CY_DMA_CPU_REQ)\r
-#define CPU_TERM_TD                 (CY_DMA_CPU_TERM_TD)\r
-#define CPU_TERM_CHAIN              (CY_DMA_CPU_TERM_CHAIN)\r
-#define STATUS_CHAIN_ACTIVE         (CY_DMA_STATUS_CHAIN_ACTIVE)\r
-#define STATUS_TD_ACTIVE            (CY_DMA_STATUS_TD_ACTIVE)\r
-#define DMAC_BUS_TIMEOUT            (CY_DMA_BUS_TIMEOUT)\r
-#define DMAC_UNPOP_ACC              (CY_DMA_UNPOP_ACC)\r
-#define DMAC_PERIPH_ERR             (CY_DMA_PERIPH_ERR)\r
-#define ROUND_ROBIN_ENABLE          (CY_DMA_ROUND_ROBIN_ENABLE)\r
-#define DMA_DISABLE_TD              (CY_DMA_DISABLE_TD)\r
-\r
-#define DMAC_CFG                    (CY_DMA_CFG_PTR)\r
-#define DMAC_ERR                    (CY_DMA_ERR_PTR)\r
-#define DMAC_ERR_ADR                (CY_DMA_ERR_ADR_PTR)\r
-#define DMAC_CH                     (CY_DMA_CH_STRUCT_PTR)\r
-#define DMAC_CFGMEM                 (CY_DMA_CFGMEM_STRUCT_PTR)\r
-#define DMAC_TDMEM                  (CY_DMA_TDMEM_STRUCT_PTR)\r
-\r
-#endif  /* (CY_BOOT_CYDMAC_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.c
deleted file mode 100755 (executable)
index e692e66..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.c
+++ /dev/null
@@ -1,694 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyFlash.c\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides an API for the FLASH/EEPROM.\r
-*\r
-*  Note:\r
-*   This code is endian agnostic.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "CyFlash.h"\r
-\r
-\r
-/*******************************************************************************\r
-* Holds die temperature, updated by CySetTemp(). Used for flash writting.\r
-* The first byte is the sign of the temperature (0 = negative, 1 = positive).\r
-* The second byte is the magnitude.\r
-*******************************************************************************/\r
-uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];\r
-\r
-#if(CYDEV_ECC_ENABLE == 0)\r
-    static uint8 * rowBuffer = 0;\r
-#endif  /* (CYDEV_ECC_ENABLE == 0) */\r
-\r
-\r
-static cystatus CySetTempInt(void);\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyFlash_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enable the Flash.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyFlash_Start(void) \r
-{\r
-    /* Active Power Mode */\r
-    *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
-\r
-    /* Standby Power Mode */\r
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_FLASH_MASK;\r
-\r
-    CyDelayUs(CY_FLASH_EE_STARTUP_DELAY);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyFlash_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disable the Flash.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  This setting is ignored as long as the CPU is currently running.  This will\r
-*  only take effect when the CPU is later disabled.\r
-*\r
-*******************************************************************************/\r
-void CyFlash_Stop(void) \r
-{\r
-    /* Active Power Mode */\r
-    *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
-\r
-    /* Standby Power Mode */\r
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_FLASH_MASK));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySetTempInt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sends a command to the SPC to read the die temperature. Sets a global value\r
-*  used by the Write functions. This function must be called once before\r
-*  executing a series of Flash writing functions.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  status:\r
-*   CYRET_SUCCESS - if successful\r
-*   CYRET_LOCKED  - if Flash writing already in use\r
-*   CYRET_UNKNOWN - if there was an SPC error\r
-*\r
-*******************************************************************************/\r
-static cystatus CySetTempInt(void) \r
-{\r
-    cystatus status;\r
-\r
-    /* Make sure SPC is powered */\r
-    CySpcStart();\r
-\r
-    /* Plan for failure. */\r
-    status = CYRET_UNKNOWN;\r
-\r
-    if(CySpcLock() == CYRET_SUCCESS)\r
-    {\r
-        /* Write the command. */\r
-        if(CYRET_STARTED == CySpcGetTemp(CY_TEMP_NUMBER_OF_SAMPLES))\r
-        {\r
-            do\r
-            {\r
-                if(CySpcReadData(dieTemperature, CY_FLASH_DIE_TEMP_DATA_SIZE) == CY_FLASH_DIE_TEMP_DATA_SIZE)\r
-                {\r
-                    status = CYRET_SUCCESS;\r
-\r
-                    while(CY_SPC_BUSY)\r
-                    {\r
-                        /* Spin until idle. */\r
-                        CyDelayUs(1u);\r
-                    }\r
-                    break;\r
-                }\r
-\r
-            } while(CY_SPC_BUSY);\r
-        }\r
-\r
-        CySpcUnlock();\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return (status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySetTemp\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This is a wraparound for CySetTempInt(). It is used to return second\r
-*  successful read of temperature value.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  status:\r
-*   CYRET_SUCCESS if successful.\r
-*   CYRET_LOCKED  if Flash writing already in use\r
-*   CYRET_UNKNOWN if there was an SPC error.\r
-*\r
-*  uint8 dieTemperature[2]:\r
-*   Holds die temperature for the flash writting algorithm. The first byte is\r
-*   the sign of the temperature (0 = negative, 1 = positive). The second byte is\r
-*   the magnitude.\r
-*\r
-*******************************************************************************/\r
-cystatus CySetTemp(void) \r
-{\r
-    cystatus status = CySetTempInt();\r
-\r
-    if(status == CYRET_SUCCESS)\r
-    {\r
-        status = CySetTempInt();\r
-    }\r
-\r
-    return (status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySetFlashEEBuffer\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the user supplied temporary buffer to store SPC data while performing\r
-*  flash and EEPROM commands. This buffer is only necessary when Flash ECC is\r
-*  disabled.\r
-*\r
-* Parameters:\r
-*  buffer:\r
-*   Address of block of memory to store temporary memory. The size of the block\r
-*   of memory is CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE.\r
-*\r
-* Return:\r
-*  status:\r
-*   CYRET_SUCCESS if successful.\r
-*   CYRET_BAD_PARAM if the buffer is NULL\r
-*\r
-*******************************************************************************/\r
-cystatus CySetFlashEEBuffer(uint8 * buffer) \r
-{\r
-    cystatus status = CYRET_SUCCESS;\r
-\r
-    CySpcStart();\r
-\r
-    #if(CYDEV_ECC_ENABLE == 0)\r
-\r
-        if(NULL == buffer)\r
-        {\r
-            status = CYRET_BAD_PARAM;\r
-        }\r
-        else if(CySpcLock() != CYRET_SUCCESS)\r
-        {\r
-            status = CYRET_LOCKED;\r
-        }\r
-        else\r
-        {\r
-            rowBuffer = buffer;\r
-            CySpcUnlock();\r
-        }\r
-\r
-    #else\r
-\r
-        /* To supress the warning */\r
-        buffer = buffer;\r
-\r
-    #endif  /* (CYDEV_ECC_ENABLE == 0u) */\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-#if(CYDEV_ECC_ENABLE == 1)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyWriteRowData\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sends a command to the SPC to load and program a row of data in\r
-    *  Flash or EEPROM.\r
-    *\r
-    * Parameters:\r
-    *  arrayID:    ID of the array to write.\r
-    *   The type of write, Flash or EEPROM, is determined from the array ID.\r
-    *   The arrays in the part are sequential starting at the first ID for the\r
-    *   specific memory type. The array ID for the Flash memory lasts from 0x00 to\r
-    *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.\r
-    *  rowAddress: rowAddress of flash row to program.\r
-    *  rowData:    Array of bytes to write.\r
-    *\r
-    * Return:\r
-    *  status:\r
-    *   CYRET_SUCCESS if successful.\r
-    *   CYRET_LOCKED if the SPC is already in use.\r
-    *   CYRET_CANCELED if command not accepted\r
-    *   CYRET_UNKNOWN if there was an SPC error.\r
-    *\r
-    *******************************************************************************/\r
-    cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) \r
-    {\r
-        uint16 rowSize;\r
-        cystatus status;\r
-\r
-        rowSize = (arrayId > CY_SPC_LAST_FLASH_ARRAYID) ? CYDEV_EEPROM_ROW_SIZE : CYDEV_FLS_ROW_SIZE;\r
-        status = CyWriteRowFull(arrayId, rowAddress, rowData, rowSize);\r
-\r
-        return(status);\r
-    }\r
-\r
-#else\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyWriteRowData\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *   Sends a command to the SPC to load and program a row of data in\r
-    *   Flash or EEPROM.\r
-    *\r
-    * Parameters:\r
-    *  arrayID      : ID of the array to write.\r
-    *   The type of write, Flash or EEPROM, is determined from the array ID.\r
-    *   The arrays in the part are sequential starting at the first ID for the\r
-    *   specific memory type. The array ID for the Flash memory lasts from 0x00 to\r
-    *   0x3F and for the EEPROM memory it lasts from 0x40 to 0x7F.\r
-    *  rowAddress   : rowAddress of flash row to program.\r
-    *  rowData      : Array of bytes to write.\r
-    *\r
-    * Return:\r
-    *  status:\r
-    *   CYRET_SUCCESS if successful.\r
-    *   CYRET_LOCKED if the SPC is already in use.\r
-    *   CYRET_CANCELED if command not accepted\r
-    *   CYRET_UNKNOWN if there was an SPC error.\r
-    *\r
-    *******************************************************************************/\r
-    cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData) \r
-    {\r
-        uint8 i;\r
-        uint32 offset;\r
-        uint16 rowSize;\r
-        cystatus status;\r
-\r
-        /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */\r
-        if(NULL != rowBuffer)\r
-        {\r
-            if(arrayId > CY_SPC_LAST_FLASH_ARRAYID)\r
-            {\r
-                rowSize = CYDEV_EEPROM_ROW_SIZE;\r
-            }\r
-            else\r
-            {\r
-                rowSize = CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE;\r
-\r
-                /* Save the ECC area. */\r
-                offset = CYDEV_ECC_BASE +\r
-                        ((uint32)arrayId * CYDEV_ECC_SECTOR_SIZE) +\r
-                        ((uint32)rowAddress * CYDEV_ECC_ROW_SIZE);\r
-\r
-                for(i = 0u; i < CYDEV_ECC_ROW_SIZE; i++)\r
-                {\r
-                    *(rowBuffer + CYDEV_FLS_ROW_SIZE + i) = CY_GET_XTND_REG8((void CYFAR *)(offset + i));\r
-                }\r
-            }\r
-\r
-            /* Copy the rowdata to the temporary buffer. */\r
-        #if(CY_PSOC3)\r
-            (void) memcpy((void *) rowBuffer, (void *)((uint32) rowData), (int16) CYDEV_FLS_ROW_SIZE);\r
-        #else\r
-            (void) memcpy((void *) rowBuffer, (const void *) rowData, CYDEV_FLS_ROW_SIZE);\r
-        #endif  /* (CY_PSOC3) */\r
-\r
-            status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, rowSize);\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_UNKNOWN;\r
-        }\r
-\r
-        return(status);\r
-    }\r
-\r
-#endif /* (CYDEV_ECC_ENABLE == 0u) */\r
-\r
-\r
-#if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyWriteRowConfig\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sends a command to the SPC to load and program a row of config data in flash.\r
-    *  This function is only valid for Flash array IDs (not for EEPROM).\r
-    *\r
-    * Parameters:\r
-    *  arrayId:      ID of the array to write\r
-    *   The arrays in the part are sequential starting at the first ID for the\r
-    *   specific memory type. The array ID for the Flash memory lasts\r
-    *   from 0x00 to 0x3F.\r
-    *  rowAddress:   Address of the sector to erase.\r
-    *  rowECC:       Array of bytes to write.\r
-    *\r
-    * Return:\r
-    *  status:\r
-    *   CYRET_SUCCESS if successful.\r
-    *   CYRET_LOCKED if the SPC is already in use.\r
-    *   CYRET_CANCELED if command not accepted\r
-    *   CYRET_UNKNOWN if there was an SPC error.\r
-    *\r
-    *******************************************************************************/\r
-    cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC)\\r
-    \r
-    {\r
-        uint32 offset;\r
-        uint16 i;\r
-        cystatus status;\r
-\r
-        /* Check whether rowBuffer pointer has been initialized by CySetFlashEEBuffer() */\r
-        if(NULL != rowBuffer)\r
-        {\r
-            /* Read the existing flash data. */\r
-            offset = ((uint32)arrayId * CYDEV_FLS_SECTOR_SIZE) +\r
-                     ((uint32)rowAddress * CYDEV_FLS_ROW_SIZE);\r
-\r
-            #if (CYDEV_FLS_BASE != 0u)\r
-                offset += CYDEV_FLS_BASE;\r
-            #endif  /* (CYDEV_FLS_BASE != 0u) */\r
-\r
-            for (i = 0u; i < CYDEV_FLS_ROW_SIZE; i++)\r
-            {\r
-                rowBuffer[i] = CY_GET_XTND_REG8((void CYFAR *)(offset + i));\r
-            }\r
-\r
-            #if(CY_PSOC3)\r
-                (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],\r
-                              (void *)(uint32)rowECC,\r
-                              (int16)CYDEV_ECC_ROW_SIZE);\r
-            #else\r
-                (void) memcpy((void *)&rowBuffer[CYDEV_FLS_ROW_SIZE],\r
-                              (const void *)rowECC,\r
-                              CYDEV_ECC_ROW_SIZE);\r
-            #endif  /* (CY_PSOC3) */\r
-\r
-            status = CyWriteRowFull(arrayId, rowAddress, rowBuffer, CYDEV_FLS_ROW_SIZE + CYDEV_ECC_ROW_SIZE);\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_UNKNOWN;\r
-        }\r
-\r
-        return (status);\r
-    }\r
-\r
-#endif  /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */\r
-\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyWriteRowFull\r
-********************************************************************************\r
-* Summary:\r
-*  Sends a command to the SPC to load and program a row of data in flash.\r
-*  rowData array is expected to contain Flash and ECC data if needed.\r
-*\r
-* Parameters:\r
-*  arrayId:    FLASH or EEPROM array id.\r
-*  rowData:    Pointer to a row of data to write.\r
-*  rowNumber:  Zero based number of the row.\r
-*  rowSize:    Size of the row.\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS if successful.\r
-*  CYRET_LOCKED if the SPC is already in use.\r
-*  CYRET_CANCELED if command not accepted\r
-*  CYRET_UNKNOWN if there was an SPC error.\r
-*\r
-*******************************************************************************/\r
-cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8* rowData, uint16 rowSize) \\r
-        \r
-{\r
-    cystatus status;\r
-\r
-    if(CySpcLock() == CYRET_SUCCESS)\r
-    {\r
-        /* Load row data into SPC internal latch */\r
-        status = CySpcLoadRow(arrayId, rowData, rowSize);\r
-\r
-        if(CYRET_STARTED == status)\r
-        {\r
-            while(CY_SPC_BUSY)\r
-            {\r
-                /* Wait for SPC to finish and get SPC status */\r
-                CyDelayUs(1u);\r
-            }\r
-\r
-            /* Hide SPC status */\r
-            if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)\r
-            {\r
-                status = CYRET_SUCCESS;\r
-            }\r
-            else\r
-            {\r
-                status = CYRET_UNKNOWN;\r
-            }\r
-\r
-            if(CYRET_SUCCESS == status)\r
-            {\r
-                /* Erase and program flash with the data from SPC interval latch */\r
-                status = CySpcWriteRow(arrayId, rowNumber, dieTemperature[0u], dieTemperature[1u]);\r
-\r
-                if(CYRET_STARTED == status)\r
-                {\r
-                    while(CY_SPC_BUSY)\r
-                    {\r
-                        /* Wait for SPC to finish and get SPC status */\r
-                        CyDelayUs(1u);\r
-                    }\r
-\r
-                    /* Hide SPC status */\r
-                    if(CY_SPC_STATUS_SUCCESS == CY_SPC_READ_STATUS)\r
-                    {\r
-                        status = CYRET_SUCCESS;\r
-                    }\r
-                    else\r
-                    {\r
-                        status = CYRET_UNKNOWN;\r
-                    }\r
-                }\r
-            }\r
-\r
-        }\r
-\r
-        CySpcUnlock();\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyFlash_SetWaitCycles\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash. This function must be called before increasing CPU\r
-*  clock frequency. It can optionally be called after lowering CPU clock\r
-*  frequency in order to improve CPU performance.\r
-*\r
-* Parameters:\r
-*  uint8 freq:\r
-*   Frequency of operation in Megahertz.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyFlash_SetWaitCycles(uint8 freq) \r
-{\r
-    uint8 interruptState;\r
-\r
-    /* Save current global interrupt enable and disable it */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    /***************************************************************************\r
-    * The number of clock cycles the cache will wait before it samples data\r
-    * coming back from Flash must be equal or greater to to the CPU frequency\r
-    * outlined in clock cycles.\r
-    ***************************************************************************/\r
-\r
-    #if (CY_PSOC3)\r
-\r
-        if (freq <= 22u)\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_22MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-        else if (freq <= 44u)\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-        else\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_GREATER_44MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-\r
-    #endif  /* (CY_PSOC3) */\r
-\r
-\r
-    #if (CY_PSOC5)\r
-\r
-        if (freq <= 16u)\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_16MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-        else if (freq <= 33u)\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_33MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-        else if (freq <= 50u)\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_LESSER_OR_EQUAL_50MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-        else\r
-        {\r
-            *CY_FLASH_CONTROL_PTR = ((*CY_FLASH_CONTROL_PTR & ((uint8)(~CY_FLASH_CYCLES_MASK))) |\r
-                ((uint8)(CY_FLASH_GREATER_51MHz << CY_FLASH_CYCLES_MASK_SHIFT)));\r
-        }\r
-\r
-    #endif  /* (CY_PSOC5) */\r
-\r
-    /* Restore global interrupt enable state */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEEPROM_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enable the EEPROM.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyEEPROM_Start(void) \r
-{\r
-    /* Active Power Mode */\r
-    *CY_FLASH_PM_ACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;\r
-\r
-    /* Standby Power Mode */\r
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR |= CY_FLASH_PM_EE_MASK;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEEPROM_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disable the EEPROM.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyEEPROM_Stop (void) \r
-{\r
-    /* Active Power Mode */\r
-    *CY_FLASH_PM_ACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));\r
-\r
-    /* Standby Power Mode */\r
-    *CY_FLASH_PM_ALTACT_EEFLASH_PTR &= ((uint8)(~CY_FLASH_PM_EE_MASK));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEEPROM_ReadReserve\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Request access to the EEPROM for reading and wait until access is available.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyEEPROM_ReadReserve(void) \r
-{\r
-    /* Make a request for PHUB to have access */\r
-    *CY_FLASH_EE_SCR_PTR |= CY_FLASH_EE_SCR_AHB_EE_REQ;\r
-\r
-    while (0u == (*CY_FLASH_EE_SCR_PTR & CY_FLASH_EE_SCR_AHB_EE_ACK))\r
-    {\r
-        /* Wait for acknowledgement from PHUB */\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEEPROM_ReadRelease\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Release the read reservation of the EEPROM.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyEEPROM_ReadRelease(void) \r
-{\r
-    *CY_FLASH_EE_SCR_PTR |= 0x00u;\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.h
deleted file mode 100755 (executable)
index 69f8c88..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyFlash.h
+++ /dev/null
@@ -1,239 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyFlash.h\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides the function definitions for the FLASH/EEPROM.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYFLASH_H)\r
-#define CY_BOOT_CYFLASH_H\r
-\r
-#include "cydevice_trm.h"\r
-#include "cytypes.h"\r
-#include "CyLib.h"\r
-#include "CySpc.h"\r
-\r
-#define CY_FLASH_DIE_TEMP_DATA_SIZE      (2u)    /* Die temperature data size */\r
-\r
-extern uint8 dieTemperature[CY_FLASH_DIE_TEMP_DATA_SIZE];\r
-\r
-\r
-/***************************************\r
-*    API Constants\r
-***************************************/\r
-\r
-#define CY_FLASH_BASE               (CYDEV_FLASH_BASE)\r
-#define CY_FLASH_SIZE               (CYDEV_FLS_SIZE)\r
-#define CY_FLASH_SIZEOF_ARRAY       (CYDEV_FLS_SECTOR_SIZE)\r
-#define CY_FLASH_SIZEOF_ROW         (CYDEV_FLS_ROW_SIZE)\r
-#define CY_FLASH_SIZEOF_ECC_ROW     (CYDEV_ECC_ROW_SIZE)\r
-#define CY_FLASH_NUMBER_ROWS        (CYDEV_FLS_SIZE / CYDEV_FLS_ROW_SIZE)\r
-#define CY_FLASH_NUMBER_ARRAYS      (CYDEV_FLS_SIZE / CYDEV_FLS_SECTOR_SIZE)\r
-\r
-#define CY_EEPROM_BASE              (CYDEV_EE_BASE)\r
-#define CY_EEPROM_SIZE              (CYDEV_EE_SIZE)\r
-#define CY_EEPROM_SIZEOF_ARRAY      (CYDEV_EEPROM_SECTOR_SIZE)\r
-#define CY_EEPROM_SIZEOF_ROW        (CYDEV_EEPROM_ROW_SIZE)\r
-#define CY_EEPROM_NUMBER_ROWS       (EEPROM_SIZE / CYDEV_EEPROM_ROW_SIZE)\r
-#define CY_EEPROM_NUMBER_ARRAYS     (CYDEV_EE_SIZE / CY_EEPROM_SIZEOF_ARRAY)\r
-\r
-\r
-#if !defined(CYDEV_FLS_BASE)\r
-    #define CYDEV_FLS_BASE    CYDEV_FLASH_BASE\r
-#endif  /* !defined(CYDEV_FLS_BASE) */\r
-\r
-\r
-/***************************************\r
-*     Function Prototypes\r
-***************************************/\r
-\r
-/* Flash Functions */\r
-void     CyFlash_Start(void);\r
-void     CyFlash_Stop(void);\r
-cystatus CySetTemp(void);\r
-cystatus CySetFlashEEBuffer(uint8 * buffer);\r
-cystatus CyWriteRowFull(uint8 arrayId, uint16 rowNumber, const uint8 * rowData, uint16 rowSize) \\r
-            ;\r
-cystatus CyWriteRowData(uint8 arrayId, uint16 rowAddress, const uint8 * rowData);\r
-\r
-#if ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u))\r
-    cystatus CyWriteRowConfig(uint8 arrayId, uint16 rowAddress, const uint8 * rowECC) \\r
-            ;\r
-#endif  /* ((CYDEV_ECC_ENABLE == 0u) && (CYDEV_CONFIGURATION_ECC == 0u)) */\r
-\r
-void CyFlash_SetWaitCycles(uint8 freq) ;\r
-\r
-/* EEPROM Functions */\r
-void CyEEPROM_Start(void) ;\r
-void CyEEPROM_Stop(void) ;\r
-\r
-void CyEEPROM_ReadReserve(void) ;\r
-void CyEEPROM_ReadRelease(void) ;\r
-\r
-\r
-/***************************************\r
-*     Registers\r
-***************************************/\r
-/* Active Power Mode Configuration Register 12 */\r
-#define CY_FLASH_PM_ACT_EEFLASH_REG         (* (reg8 *) CYREG_PM_ACT_CFG12)\r
-#define CY_FLASH_PM_ACT_EEFLASH_PTR         (  (reg8 *) CYREG_PM_ACT_CFG12)\r
-\r
-/* Alternate Active Power Mode Configuration Register 12 */\r
-#define CY_FLASH_PM_ALTACT_EEFLASH_REG      (* (reg8 *) CYREG_PM_STBY_CFG12)\r
-#define CY_FLASH_PM_ALTACT_EEFLASH_PTR      (  (reg8 *) CYREG_PM_STBY_CFG12)\r
-\r
-\r
-/* Cache Control Register */\r
-#if (CY_PSOC3)\r
-\r
-    #define CY_FLASH_CONTROL_REG                (* (reg8 *) CYREG_CACHE_CR )\r
-    #define CY_FLASH_CONTROL_PTR                (  (reg8 *) CYREG_CACHE_CR )\r
-\r
-#else\r
-\r
-    #define CY_FLASH_CONTROL_REG                (* (reg8 *) CYREG_CACHE_CC_CTL )\r
-    #define CY_FLASH_CONTROL_PTR                (  (reg8 *) CYREG_CACHE_CC_CTL )\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/* EEPROM Status & Control Register */\r
-#define CY_FLASH_EE_SCR_REG                     (* (reg8 *) CYREG_SPC_EE_SCR)\r
-#define CY_FLASH_EE_SCR_PTR                     (  (reg8 *) CYREG_SPC_EE_SCR)\r
-\r
-\r
-\r
-/***************************************\r
-*     Register Constants\r
-***************************************/\r
-\r
-/* Power Mode Masks */\r
-#define CY_FLASH_PM_EE_MASK                 (0x10u)\r
-#define CY_FLASH_PM_FLASH_MASK              (0x01u)\r
-\r
-/* Frequency Constants */\r
-#if (CY_PSOC3)\r
-\r
-    #define CY_FLASH_LESSER_OR_EQUAL_22MHz      (0x01u)\r
-    #define CY_FLASH_LESSER_OR_EQUAL_44MHz      (0x02u)\r
-    #define CY_FLASH_GREATER_44MHz              (0x03u)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#if (CY_PSOC5)\r
-\r
-    #define CY_FLASH_LESSER_OR_EQUAL_16MHz      (0x01u)\r
-    #define CY_FLASH_LESSER_OR_EQUAL_33MHz      (0x02u)\r
-    #define CY_FLASH_LESSER_OR_EQUAL_50MHz      (0x03u)\r
-    #define CY_FLASH_GREATER_51MHz              (0x00u)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-#define CY_FLASH_CYCLES_MASK_SHIFT              (0x06u)\r
-#define CY_FLASH_CYCLES_MASK                    ((uint8)(0x03u << (CY_FLASH_CYCLES_MASK_SHIFT)))\r
-#define CY_FLASH_EE_STARTUP_DELAY               (5u)\r
-\r
-#define CY_FLASH_EE_SCR_AHB_EE_REQ              (0x01u)\r
-#define CY_FLASH_EE_SCR_AHB_EE_ACK              (0x02u)\r
-\r
-\r
-\r
-/* Default values for getting temperature. */\r
-\r
-#define CY_TEMP_NUMBER_OF_SAMPLES               (0x1u)\r
-#define CY_TEMP_TIMER_PERIOD                    (0xFFFu)\r
-#define CY_TEMP_CLK_DIV_SELECT                  (0x4u)\r
-#define CY_TEMP_NUM_SAMPLES                     (1 << (CY_TEMP_NUMBER_OF_SAMPLES))\r
-#define CY_SPC_CLK_PERIOD                       (120u)      /* nS */\r
-#define CY_SYS_ns_PER_TICK                      (1000u)\r
-#define CY_FRM_EXEC_TIME                        (1000u)     /* nS */\r
-\r
-#define CY_GET_TEMP_TIME                        ((1 << (CY_TEMP_NUM_SAMPLES + 1)) * \\r
-                                                    (CY_SPC_CLK_PERIOD * CY_TEMP_CLK_DIV_SELECT) * \\r
-                                                    CY_TEMP_TIMER_PERIOD + CY_FRM_EXEC_TIME)\r
-\r
-#define CY_TEMP_MAX_WAIT                        ((CY_GET_TEMP_TIME) / CY_SYS_ns_PER_TICK)    /* In system ticks. */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0\r
-*******************************************************************************/\r
-#define FLASH_SIZE                  (CY_FLASH_SIZE)\r
-#define FLASH_SIZEOF_SECTOR         (CY_FLASH_SIZEOF_ARRAY)\r
-#define FLASH_NUMBER_ROWS           (CY_FLASH_NUMBER_ROWS)\r
-#define FLASH_NUMBER_SECTORS        (CY_FLASH_NUMBER_ARRAYS)\r
-#define EEPROM_SIZE                 (CY_EEPROM_SIZE)\r
-#define EEPROM_SIZEOF_SECTOR        (CY_EEPROM_SIZEOF_ARRAY)\r
-#define EEPROM_NUMBER_ROWS          (CY_EEPROM_NUMBER_ROWS)\r
-#define EEPROM_NUMBER_SECTORS       (CY_EEPROM_NUMBER_ARRAYS)\r
-#define CY_EEPROM_NUMBER_SECTORS    (CY_EEPROM_NUMBER_ARRAYS)\r
-#define CY_EEPROM_SIZEOF_SECTOR     (CY_EEPROM_SIZEOF_ARRAY)\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30\r
-*******************************************************************************/\r
-#define FLASH_CYCLES_PTR            (CY_FLASH_CONTROL_PTR)\r
-\r
-#define TEMP_NUMBER_OF_SAMPLES      (CY_TEMP_NUMBER_OF_SAMPLES)\r
-#define TEMP_TIMER_PERIOD           (CY_TEMP_TIMER_PERIOD)\r
-#define TEMP_CLK_DIV_SELECT         (CY_TEMP_CLK_DIV_SELECT)\r
-#define NUM_SAMPLES                 (CY_TEMP_NUM_SAMPLES)\r
-#define SPC_CLK_PERIOD              (CY_SPC_CLK_PERIOD)\r
-#define FRM_EXEC_TIME               (CY_FRM_EXEC_TIME)\r
-#define GET_TEMP_TIME               (CY_GET_TEMP_TIME)\r
-#define TEMP_MAX_WAIT               (CY_TEMP_MAX_WAIT)\r
-\r
-#define ECC_ADDR                    (0x80u)\r
-\r
-\r
-#define PM_ACT_EE_PTR           (CY_FLASH_PM_ACT_EEFLASH_PTR)\r
-#define PM_ACT_FLASH_PTR        (CY_FLASH_PM_ACT_EEFLASH_PTR)\r
-\r
-#define PM_STBY_EE_PTR          (CY_FLASH_PM_ALTACT_EEFLASH_PTR)\r
-#define PM_STBY_FLASH_PTR       (CY_FLASH_PM_ALTACT_EEFLASH_PTR)\r
-\r
-#define PM_EE_MASK              (CY_FLASH_PM_EE_MASK)\r
-#define PM_FLASH_MASK           (CY_FLASH_PM_FLASH_MASK)\r
-\r
-#define FLASH_CYCLES_MASK_SHIFT     (CY_FLASH_CYCLES_MASK_SHIFT)\r
-#define FLASH_CYCLES_MASK           (CY_FLASH_CYCLES_MASK)\r
-\r
-\r
-#if (CY_PSOC3)\r
-\r
-    #define LESSER_OR_EQUAL_22MHz   (CY_FLASH_LESSER_OR_EQUAL_22MHz)\r
-    #define LESSER_OR_EQUAL_44MHz   (CY_FLASH_LESSER_OR_EQUAL_44MHz)\r
-    #define GREATER_44MHz           (CY_FLASH_GREATER_44MHz)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#if (CY_PSOC5)\r
-\r
-    #define LESSER_OR_EQUAL_16MHz   (CY_FLASH_LESSER_OR_EQUAL_16MHz)\r
-    #define LESSER_OR_EQUAL_33MHz   (CY_FLASH_LESSER_OR_EQUAL_33MHz)\r
-    #define LESSER_OR_EQUAL_50MHz   (CY_FLASH_LESSER_OR_EQUAL_50MHz)\r
-    #define LESSER_OR_EQUAL_67MHz   (CY_FLASH_LESSER_OR_EQUAL_67MHz)\r
-    #define GREATER_67MHz           (CY_FLASH_GREATER_67MHz)\r
-    #define GREATER_51MHz           (CY_FLASH_GREATER_51MHz)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-#define AHUB_EE_REQ_ACK_PTR         (CY_FLASH_EE_SCR_PTR)\r
-\r
-\r
-#endif  /* (CY_BOOT_CYFLASH_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.c
deleted file mode 100755 (executable)
index 206c6cb..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.c
+++ /dev/null
@@ -1,2710 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyLib.c\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides system API for the clocking, interrupts and watchdog timer.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "CyLib.h"\r
-\r
-\r
-/*******************************************************************************\r
-* The CyResetStatus variable is used to obtain value of RESET_SR0 register after\r
-* a device reset. It is set from initialize_psoc() at the early initialization\r
-* stage. In case of IAR EW IDE, initialize_psoc() is executed before the data\r
-* sections are initialized. To avoid zeroing, CyResetStatus should be placed\r
-* to the .noinit section.\r
-*******************************************************************************/\r
-CY_NOINIT uint8 CYXDATA CyResetStatus;\r
-\r
-\r
-/* Variable Vdda */\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    uint8 CyScPumpEnabled = (uint8)(CYDEV_VDDA_MV < 2700);\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/* Do not use these definitions directly in your application */\r
-uint32 cydelay_freq_hz  = BCLK__BUS_CLK__HZ;\r
-uint32 cydelay_freq_khz = (BCLK__BUS_CLK__HZ + 999u) / 1000u;\r
-uint8  cydelay_freq_mhz = (uint8)((BCLK__BUS_CLK__HZ + 999999u) / 1000000u);\r
-uint32 cydelay_32k_ms   = 32768u * ((BCLK__BUS_CLK__HZ + 999u) / 1000u);\r
-\r
-\r
-/* Function Prototypes */\r
-static uint8 CyUSB_PowerOnCheck(void)  ;\r
-static void CyIMO_SetTrimValue(uint8 freq) ;\r
-static void CyBusClk_Internal_SetDivider(uint16 divider);\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPLL_OUT_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*   Enables the PLL.  Optionally waits for it to become stable.\r
-*   Waits at least 250 us or until it is detected that the PLL is stable.\r
-*\r
-* Parameters:\r
-*   wait:\r
-*    0: Return immediately after configuration\r
-*    1: Wait for PLL lock or timeout.\r
-*\r
-* Return:\r
-*   Status\r
-*    CYRET_SUCCESS - Completed successfully\r
-*    CYRET_TIMEOUT - Timeout occurred without detecting a stable clock.\r
-*     If the input source of the clock is jittery, then the lock indication\r
-*     may not occur.  However, after the timeout has expired the generated PLL\r
-*     clock can still be used.\r
-*\r
-* Side Effects:\r
-*  If wait is enabled: This function wses the Fast Time Wheel to time the wait.\r
-*  Any other use of the Fast Time Wheel will be stopped during the period of\r
-*  this function and then restored. This function also uses the 100 KHz ILO.\r
-*  If not enabled, this function will enable the 100 KHz ILO for the period of\r
-*  this function.\r
-*\r
-*  No changes to the setup of the ILO, Fast Time Wheel, Central Time Wheel or\r
-*  Once Per Second interrupt may be made by interrupt routines during the period\r
-*  of this function execution. The current operation of the ILO, Central Time\r
-*  Wheel and Once Per Second interrupt are maintained during the operation of\r
-*  this function provided the reading of the Power Manager Interrupt Status\r
-*  Register is only done using the CyPmReadStatus() function.\r
-*\r
-*******************************************************************************/\r
-cystatus CyPLL_OUT_Start(uint8 wait) \r
-{\r
-    cystatus status = CYRET_SUCCESS;\r
-\r
-    uint8 iloEnableState;\r
-    uint8 pmTwCfg0State;\r
-    uint8 pmTwCfg2State;\r
-\r
-\r
-    /* Enables the PLL circuit  */\r
-    CY_CLK_PLL_CFG0_REG |= CY_CLK_PLL_ENABLE;\r
-\r
-    if(wait != 0u)\r
-    {\r
-        /* Save 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-        iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
-        pmTwCfg0State = CY_LIB_PM_TW_CFG0_REG;\r
-        pmTwCfg2State = CY_LIB_PM_TW_CFG2_REG;\r
-\r
-        CyPmFtwSetInterval(CY_CLK_PLL_FTW_INTERVAL);\r
-\r
-        status = CYRET_TIMEOUT;\r
-\r
-        while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
-        {\r
-            /* Wait for the interrupt status */\r
-            if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
-            {\r
-                if(0u != (CY_CLK_PLL_SR_REG & CY_CLK_PLL_LOCK_STATUS))\r
-                {\r
-                    status = CYRET_SUCCESS;\r
-                    break;\r
-                }\r
-            }\r
-        }\r
-\r
-        /* Restore 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-        if(0u == iloEnableState)\r
-        {\r
-            CyILO_Stop100K();\r
-        }\r
-\r
-        CY_LIB_PM_TW_CFG0_REG = pmTwCfg0State;\r
-        CY_LIB_PM_TW_CFG2_REG = pmTwCfg2State;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPLL_OUT_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the PLL.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyPLL_OUT_Stop(void) \r
-{\r
-    CY_CLK_PLL_CFG0_REG &= ((uint8)(~CY_CLK_PLL_ENABLE));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPLL_OUT_SetPQ\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the P and Q dividers and the charge pump current.\r
-*  The Frequency Out will be P/Q * Frequency In.\r
-*  The PLL must be disabled before calling this function.\r
-*\r
-* Parameters:\r
-*  uint8 pDiv:\r
-*   Valid range [8 - 255].\r
-*\r
-*  uint8 qDiv:\r
-*   Valid range [1 - 16]. Input Frequency / Q must be in range of 1 to 3 MHz.\r
-\r
-*  uint8 current:\r
-*   Valid range [1 - 7]. Charge pump current in uA. Refer to the device TRM and\r
-*   datasheet for more information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*******************************************************************************/\r
-void CyPLL_OUT_SetPQ(uint8 pDiv, uint8 qDiv, uint8 current) \r
-{\r
-    /* Halt CPU in debug mode if PLL is enabled */\r
-    CYASSERT(0u == (CY_CLK_PLL_CFG0_REG & CY_CLK_PLL_ENABLE));\r
-\r
-    if((pDiv    >= CY_CLK_PLL_MIN_P_VALUE  ) &&\r
-       (qDiv    <= CY_CLK_PLL_MAX_Q_VALUE  ) && (qDiv    >= CY_CLK_PLL_MIN_Q_VALUE  ) &&\r
-       (current >= CY_CLK_PLL_MIN_CUR_VALUE) && (current <= CY_CLK_PLL_MAX_CUR_VALUE))\r
-    {\r
-        /* Set new values */\r
-        CY_CLK_PLL_P_REG = pDiv;\r
-        CY_CLK_PLL_Q_REG = ((uint8)(qDiv - 1u));\r
-        CY_CLK_PLL_CFG1_REG = (CY_CLK_PLL_CFG1_REG & CY_CLK_PLL_CURRENT_MASK) |\r
-                                ((uint8)(((uint8)(current - 1u)) << CY_CLK_PLL_CURRENT_POSITION));\r
-    }\r
-    else\r
-    {\r
-        /***********************************************************************\r
-        * Halt CPU in debug mode if:\r
-        * - P divider is less than required\r
-        * - Q divider is out of range\r
-        * - pump current is out of range\r
-        ***********************************************************************/\r
-        CYASSERT(0u != 0u);\r
-    }\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPLL_OUT_SetSource\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the input clock source to the PLL. The PLL must be disabled before\r
-*  calling this function.\r
-*\r
-* Parameters:\r
-*   source: One of the three available PLL clock sources\r
-*    CY_PLL_SOURCE_IMO  :   IMO\r
-*    CY_PLL_SOURCE_XTAL :   MHz Crystal\r
-*    CY_PLL_SOURCE_DSI  :   DSI\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*******************************************************************************/\r
-void CyPLL_OUT_SetSource(uint8 source) \r
-{\r
-    /* Halt CPU in debug mode if PLL is enabled */\r
-    CYASSERT(0u == (CY_CLK_PLL_CFG0_REG & CY_CLK_PLL_ENABLE));\r
-\r
-    switch(source)\r
-    {\r
-        case CY_PLL_SOURCE_IMO:\r
-        case CY_PLL_SOURCE_XTAL:\r
-        case CY_PLL_SOURCE_DSI:\r
-            CY_LIB_CLKDIST_CR_REG = ((CY_LIB_CLKDIST_CR_REG & CY_LIB_CLKDIST_CR_PLL_SCR_MASK) | source);\r
-        break;\r
-\r
-        default:\r
-            CYASSERT(0u != 0u);\r
-        break;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the IMO. Optionally waits at least 6 us for it to settle.\r
-*\r
-* Parameters:\r
-*  uint8 wait:\r
-*   0: Return immediately after configuration\r
-*   1: Wait for at least 6 us for the IMO to settle.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If wait is enabled: This function wses the Fast Time Wheel to time the wait.\r
-*  Any other use of the Fast Time Wheel will be stopped during the period of\r
-*  this function and then restored. This function also uses the 100 KHz ILO.\r
-*  If not enabled, this function will enable the 100 KHz ILO for the period of\r
-*  this function.\r
-*\r
-*  No changes to the setup of the ILO, Fast Time Wheel, Central Time Wheel or\r
-*  Once Per Second interrupt may be made by interrupt routines during the period\r
-*  of this function execution. The current operation of the ILO, Central Time\r
-*  Wheel and Once Per Second interrupt are maintained during the operation of\r
-*  this function provided the reading of the Power Manager Interrupt Status\r
-*  Register is only done using the CyPmReadStatus() function.\r
-*\r
-*******************************************************************************/\r
-void CyIMO_Start(uint8 wait) \r
-{\r
-    uint8 pmFtwCfg2Reg;\r
-    uint8 pmFtwCfg0Reg;\r
-    uint8 ilo100KhzEnable;\r
-\r
-\r
-    CY_LIB_PM_ACT_CFG0_REG  |= CY_LIB_PM_ACT_CFG0_IMO_EN;\r
-    CY_LIB_PM_STBY_CFG0_REG |= CY_LIB_PM_STBY_CFG0_IMO_EN;\r
-\r
-    if(0u != wait)\r
-    {\r
-        /* Need to turn on the 100KHz ILO if it happens to not already be running.*/\r
-        ilo100KhzEnable = CY_LIB_SLOWCLK_ILO_CR0_REG & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
-        pmFtwCfg0Reg = CY_LIB_PM_TW_CFG0_REG;\r
-        pmFtwCfg2Reg = CY_LIB_PM_TW_CFG2_REG;\r
-\r
-        CyPmFtwSetInterval(CY_LIB_CLK_IMO_FTW_TIMEOUT);\r
-\r
-        while (0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
-        {\r
-            /* Wait for the interrupt status */\r
-        }\r
-\r
-        if(0u == ilo100KhzEnable)\r
-        {\r
-            CyILO_Stop100K();\r
-        }\r
-\r
-        CY_LIB_PM_TW_CFG0_REG = pmFtwCfg0Reg;\r
-        CY_LIB_PM_TW_CFG2_REG = pmFtwCfg2Reg;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*   Disables the IMO.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyIMO_Stop(void) \r
-{\r
-    CY_LIB_PM_ACT_CFG0_REG  &= ((uint8) (~CY_LIB_PM_ACT_CFG0_IMO_EN));\r
-    CY_LIB_PM_STBY_CFG0_REG &= ((uint8) (~CY_LIB_PM_STBY_CFG0_IMO_EN));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyUSB_PowerOnCheck\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the USB power status value. A private function to cy_boot.\r
-*\r
-* Parameters:\r
-*   None\r
-*\r
-* Return:\r
-*   uint8: one if the USB is enabled, 0 if not enabled.\r
-*\r
-*******************************************************************************/\r
-static uint8 CyUSB_PowerOnCheck(void)  \r
-{\r
-    uint8 poweredOn = 0u;\r
-\r
-    /* Check whether device is in Active or AltActiv and if USB is powered on */\r
-    if((((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ACTIVE ) &&\r
-       (0u != (CY_LIB_PM_ACT_CFG5_REG & CY_ACT_USB_ENABLED     )))  ||\r
-       (((CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_MASK) == CY_PM_MODE_CSR_ALT_ACT) &&\r
-       (0u != (CY_LIB_PM_STBY_CFG5_REG & CY_ALT_ACT_USB_ENABLED))))\r
-    {\r
-        poweredOn = 1u;\r
-    }\r
-\r
-    return (poweredOn);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_SetTrimValue\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the IMO factory trim values.\r
-*\r
-* Parameters:\r
-*  uint8 freq - frequency for which trims must be set\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-static void CyIMO_SetTrimValue(uint8 freq) \r
-{\r
-    uint8 usbPowerOn = CyUSB_PowerOnCheck();\r
-\r
-    /* If USB is powered */\r
-    if(usbPowerOn == 1u)\r
-    {\r
-        /* Unlock USB write */\r
-        CY_LIB_USB_CR1_REG &= ((uint8)(~CY_LIB_USB_CLK_EN));\r
-    }\r
-    switch(freq)\r
-    {\r
-    case CY_IMO_FREQ_3MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_3MHZ_PTR);\r
-        break;\r
-\r
-    case CY_IMO_FREQ_6MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_6MHZ_PTR);\r
-        break;\r
-\r
-    case CY_IMO_FREQ_12MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_12MHZ_PTR);\r
-        break;\r
-\r
-    case CY_IMO_FREQ_24MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_24MHZ_PTR);\r
-        break;\r
-\r
-    case CY_IMO_FREQ_48MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_TR1_PTR);\r
-        break;\r
-\r
-    case CY_IMO_FREQ_62MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_67MHZ_PTR);\r
-        break;\r
-\r
-#if(CY_PSOC5)\r
-    case CY_IMO_FREQ_74MHZ:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_80MHZ_PTR);\r
-        break;\r
-#endif  /* (CY_PSOC5) */\r
-\r
-    case CY_IMO_FREQ_USB:\r
-        CY_LIB_IMO_TR1_REG = CY_GET_XTND_REG8(CY_LIB_TRIM_IMO_USB_PTR);\r
-\r
-        /* If USB is powered */\r
-        if(usbPowerOn == 1u)\r
-        {\r
-            /* Lock the USB Oscillator */\r
-            CY_LIB_USB_CR1_REG |= CY_LIB_USB_CLK_EN;\r
-        }\r
-        break;\r
-\r
-    default:\r
-            CYASSERT(0u != 0u);\r
-        break;\r
-    }\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_SetFreq\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the frequency of the IMO. Changes may be made while the IMO is running.\r
-*\r
-* Parameters:\r
-*  freq: Frequency of IMO operation\r
-*       CY_IMO_FREQ_3MHZ  to set  3   MHz\r
-*       CY_IMO_FREQ_6MHZ  to set  6   MHz\r
-*       CY_IMO_FREQ_12MHZ to set 12   MHz\r
-*       CY_IMO_FREQ_24MHZ to set 24   MHz\r
-*       CY_IMO_FREQ_48MHZ to set 48   MHz\r
-*       CY_IMO_FREQ_62MHZ to set 62.6 MHz\r
-*       CY_IMO_FREQ_74MHZ to set 74.7 MHz (not applicable for PSoC 3)\r
-*       CY_IMO_FREQ_USB   to set 24   MHz (Trimmed for USB operation)\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*  When the USB setting is chosen, the USB clock locking circuit is enabled.\r
-*  Otherwise this circuit is disabled. The USB block must be powered before\r
-*  selecting the USB setting.\r
-*\r
-*******************************************************************************/\r
-void CyIMO_SetFreq(uint8 freq) \r
-{\r
-    uint8 currentFreq;\r
-    uint8 nextFreq;\r
-\r
-    /***************************************************************************\r
-    * When changing the IMO frequency the Trim values must also be set\r
-    * accordingly.This requires reading the current frequency. If the new\r
-    * frequency is faster, then set the new trim and then change the frequency,\r
-    * otherwise change the frequency and then set the new trim values.\r
-    ***************************************************************************/\r
-\r
-    currentFreq = CY_LIB_FASTCLK_IMO_CR_REG & ((uint8)(~CY_LIB_FASTCLK_IMO_CR_RANGE_MASK));\r
-\r
-    /* Check if the requested frequency is USB. */\r
-    nextFreq = (freq == CY_IMO_FREQ_USB) ? CY_IMO_FREQ_24MHZ : freq;\r
-\r
-    switch (currentFreq)\r
-    {\r
-    case 0u:\r
-        currentFreq = CY_IMO_FREQ_12MHZ;\r
-        break;\r
-\r
-    case 1u:\r
-        currentFreq = CY_IMO_FREQ_6MHZ;\r
-        break;\r
-\r
-    case 2u:\r
-        currentFreq = CY_IMO_FREQ_24MHZ;\r
-        break;\r
-\r
-    case 3u:\r
-        currentFreq = CY_IMO_FREQ_3MHZ;\r
-        break;\r
-\r
-    case 4u:\r
-        currentFreq = CY_IMO_FREQ_48MHZ;\r
-        break;\r
-\r
-    case 5u:\r
-        currentFreq = CY_IMO_FREQ_62MHZ;\r
-        break;\r
-\r
-#if(CY_PSOC5)\r
-    case 6u:\r
-        currentFreq = CY_IMO_FREQ_74MHZ;\r
-        break;\r
-#endif  /* (CY_PSOC5) */\r
-\r
-    default:\r
-        CYASSERT(0u != 0u);\r
-        break;\r
-    }\r
-\r
-    if (nextFreq >= currentFreq)\r
-    {\r
-        /* Set the new trim first */\r
-        CyIMO_SetTrimValue(freq);\r
-    }\r
-\r
-    /* Set the usbclk_on bit when using CY_IMO_FREQ_USB, if not clear it */\r
-    switch(freq)\r
-    {\r
-    case CY_IMO_FREQ_3MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_3MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-    case CY_IMO_FREQ_6MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_6MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-    case CY_IMO_FREQ_12MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_12MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-    case CY_IMO_FREQ_24MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_24MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-    case CY_IMO_FREQ_48MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_48MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-    case CY_IMO_FREQ_62MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_62MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-\r
-#if(CY_PSOC5)\r
-    case CY_IMO_FREQ_74MHZ:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_74MHZ_VALUE) & ((uint8)(~CY_LIB_IMO_USBCLK_ON_SET));\r
-        break;\r
-#endif  /* (CY_PSOC5) */\r
-\r
-    case CY_IMO_FREQ_USB:\r
-        CY_LIB_FASTCLK_IMO_CR_REG = ((CY_LIB_FASTCLK_IMO_CR_REG & CY_LIB_FASTCLK_IMO_CR_RANGE_MASK) |\r
-            CY_LIB_IMO_24MHZ_VALUE) | CY_LIB_IMO_USBCLK_ON_SET;\r
-        break;\r
-\r
-    default:\r
-        CYASSERT(0u != 0u);\r
-        break;\r
-    }\r
-\r
-    /* Turn on the IMO Doubler, if switching to CY_IMO_FREQ_USB */\r
-    if (freq == CY_IMO_FREQ_USB)\r
-    {\r
-        CyIMO_EnableDoubler();\r
-    }\r
-    else\r
-    {\r
-        CyIMO_DisableDoubler();\r
-    }\r
-\r
-    if (nextFreq < currentFreq)\r
-    {\r
-        /* Set the new trim after setting the frequency */\r
-        CyIMO_SetTrimValue(freq);\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_SetSource\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the source of the clock output from the IMO block.\r
-*\r
-*  The output from the IMO is by default the IMO itself. Optionally the MHz\r
-*  Crystal or a DSI input can be the source of the IMO output instead.\r
-*\r
-* Parameters:\r
-*   source: CY_IMO_SOURCE_DSI to set the DSI as source.\r
-*           CY_IMO_SOURCE_XTAL to set the MHz as source.\r
-*           CY_IMO_SOURCE_IMO to set the IMO itself.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*******************************************************************************/\r
-void CyIMO_SetSource(uint8 source) \r
-{\r
-    switch(source)\r
-    {\r
-    case CY_IMO_SOURCE_DSI:\r
-        CY_LIB_CLKDIST_CR_REG     &= ((uint8)(~CY_LIB_CLKDIST_CR_IMO2X));\r
-        CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_IMO;\r
-        break;\r
-\r
-    case CY_IMO_SOURCE_XTAL:\r
-        CY_LIB_CLKDIST_CR_REG     |= CY_LIB_CLKDIST_CR_IMO2X;\r
-        CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_IMO;\r
-        break;\r
-\r
-    case CY_IMO_SOURCE_IMO:\r
-        CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_IMO));\r
-        break;\r
-\r
-    default:\r
-        /* Incorrect source value */\r
-        CYASSERT(0u != 0u);\r
-        break;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_EnableDoubler\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the IMO doubler.  The 2x frequency clock is used to convert a 24 MHz\r
-*  input to a 48 MHz output for use by the USB block.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyIMO_EnableDoubler(void) \r
-{\r
-    /* Set the FASTCLK_IMO_CR_PTR regigster's 4th bit */\r
-    CY_LIB_FASTCLK_IMO_CR_REG |= CY_LIB_FASTCLK_IMO_DOUBLER;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyIMO_DisableDoubler\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*   Disables the IMO doubler.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyIMO_DisableDoubler(void) \r
-{\r
-    CY_LIB_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_LIB_FASTCLK_IMO_DOUBLER));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyMasterClk_SetSource\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the source of the master clock.\r
-*\r
-* Parameters:\r
-*   source: One of the four available Master clock sources.\r
-*     CY_MASTER_SOURCE_IMO\r
-*     CY_MASTER_SOURCE_PLL\r
-*     CY_MASTER_SOURCE_XTAL\r
-*     CY_MASTER_SOURCE_DSI\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  The current source and the new source must both be running and stable before\r
-*  calling this function.\r
-*\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*******************************************************************************/\r
-void CyMasterClk_SetSource(uint8 source) \r
-{\r
-    CY_LIB_CLKDIST_MSTR1_REG = (CY_LIB_CLKDIST_MSTR1_REG & MASTER_CLK_SRC_CLEAR) |\r
-                                (source & ((uint8)(~MASTER_CLK_SRC_CLEAR)));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyMasterClk_SetDivider\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the divider value used to generate Master Clock.\r
-*\r
-* Parameters:\r
-*  uint8 divider:\r
-*   Valid range [0-255]. The clock will be divided by this value + 1.\r
-*   For example to divide by 2 this parameter should be set to 1.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*  When changing the Master or Bus clock divider value from div-by-n to div-by-1\r
-*  the first clock cycle output after the div-by-1 can be up to 4 ns shorter\r
-*  than the final/expected div-by-1 period.\r
-*\r
-*******************************************************************************/\r
-void CyMasterClk_SetDivider(uint8 divider) \r
-{\r
-    CY_LIB_CLKDIST_MSTR0_REG = divider;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyBusClk_Internal_SetDivider\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Function used by CyBusClk_SetDivider(). For internal use only.\r
-*\r
-* Parameters:\r
-*   divider: Valid range [0-65535].\r
-*   The clock will be divided by this value + 1.\r
-*   For example to divide by 2 this parameter should be set to 1.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-static void CyBusClk_Internal_SetDivider(uint16 divider)\r
-{\r
-    /* Mask bits to enable shadow loads  */\r
-    CY_LIB_CLKDIST_AMASK_REG &= CY_LIB_CLKDIST_AMASK_MASK;\r
-    CY_LIB_CLKDIST_DMASK_REG  = CY_LIB_CLKDIST_DMASK_MASK;\r
-\r
-    /* Enable mask bits to enable shadow loads */\r
-    CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_MASK;\r
-\r
-    /* Update Shadow Divider Value Register with the new divider */\r
-    CY_LIB_CLKDIST_WRK_LSB_REG = LO8(divider);\r
-    CY_LIB_CLKDIST_WRK_MSB_REG = HI8(divider);\r
-\r
-\r
-    /***************************************************************************\r
-    * Copy shadow value defined in Shadow Divider Value Register\r
-    * (CY_LIB_CLKDIST_WRK_LSB_REG and CY_LIB_CLKDIST_WRK_MSB_REG) to all\r
-    * dividers selected in Analog and Digital Clock Mask Registers\r
-    * (CY_LIB_CLKDIST_AMASK_REG and CY_LIB_CLKDIST_DMASK_REG).\r
-    ***************************************************************************/\r
-    CY_LIB_CLKDIST_LD_REG |= CY_LIB_CLKDIST_LD_LOAD;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyBusClk_SetDivider\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the divider value used to generate Bus Clock.\r
-*\r
-* Parameters:\r
-*  divider: Valid range [0-65535]. The clock will be divided by this value + 1.\r
-*  For example to divide by 2 this parameter should be set to 1.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  If as result of this function execution the CPU clock frequency is increased\r
-*  then the number of clock cycles the cache will wait before it samples data\r
-*  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-*  with appropriate parameter. It can be optionally called if CPU clock\r
-*  frequency is lowered in order to improve CPU performance.\r
-*  See CyFlash_SetWaitCycles() description for more information.\r
-*\r
-*******************************************************************************/\r
-void CyBusClk_SetDivider(uint16 divider) \r
-{\r
-    uint8  masterClkDiv;\r
-    uint16 busClkDiv;\r
-    uint8 interruptState;\r
-\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    /* Work around to set the bus clock divider value */\r
-    busClkDiv = (uint16)((uint16)CY_LIB_CLKDIST_BCFG_MSB_REG << 8u);\r
-    busClkDiv |= CY_LIB_CLKDIST_BCFG_LSB_REG;\r
-\r
-    if ((divider == 0u) || (busClkDiv == 0u))\r
-    {\r
-        /* Save away the master clock divider value */\r
-        masterClkDiv = CY_LIB_CLKDIST_MSTR0_REG;\r
-\r
-        if (masterClkDiv < CY_LIB_CLKDIST_MASTERCLK_DIV)\r
-        {\r
-            /* Set master clock divider to 7 */\r
-            CyMasterClk_SetDivider(CY_LIB_CLKDIST_MASTERCLK_DIV);\r
-        }\r
-\r
-        if (divider == 0u)\r
-        {\r
-            /* Set the SSS bit and the divider register desired value */\r
-            CY_LIB_CLKDIST_BCFG2_REG |= CY_LIB_CLKDIST_BCFG2_SSS;\r
-            CyBusClk_Internal_SetDivider(divider);\r
-        }\r
-        else\r
-        {\r
-            CyBusClk_Internal_SetDivider(divider);\r
-            CY_LIB_CLKDIST_BCFG2_REG &= ((uint8)(~CY_LIB_CLKDIST_BCFG2_SSS));\r
-        }\r
-\r
-        /* Restore the master clock */\r
-        CyMasterClk_SetDivider(masterClkDiv);\r
-    }\r
-    else\r
-    {\r
-        CyBusClk_Internal_SetDivider(divider);\r
-    }\r
-\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyCpuClk_SetDivider\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sets the divider value used to generate the CPU Clock. Only applicable for\r
-    *  PSoC 3 parts.\r
-    *\r
-    * Parameters:\r
-    *  divider: Valid range [0-15]. The clock will be divided by this value + 1.\r
-    *  For example to divide by 2 this parameter should be set to 1.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Side Effects:\r
-    *  If as result of this function execution the CPU clock frequency is increased\r
-    *  then the number of clock cycles the cache will wait before it samples data\r
-    *  coming back from Flash must be adjusted by calling CyFlash_SetWaitCycles()\r
-    *  with appropriate parameter. It can be optionally called if CPU clock\r
-    *  frequency is lowered in order to improve CPU performance.\r
-    *  See CyFlash_SetWaitCycles() description for more information.\r
-    *\r
-    *******************************************************************************/\r
-    void CyCpuClk_SetDivider(uint8 divider) \r
-    {\r
-            CY_LIB_CLKDIST_MSTR1_REG = (CY_LIB_CLKDIST_MSTR1_REG & CY_LIB_CLKDIST_MSTR1_DIV_MASK) |\r
-                                ((uint8)(divider << CY_LIB_CLKDIST_DIV_POSITION));\r
-    }\r
-\r
-#endif /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyUsbClk_SetSource\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the source of the USB clock.\r
-*\r
-* Parameters:\r
-*  source: One of the four available USB clock sources\r
-*    CY_LIB_USB_CLK_IMO2X     - IMO 2x\r
-*    CY_LIB_USB_CLK_IMO       - IMO\r
-*    CY_LIB_USB_CLK_PLL       - PLL\r
-*    CY_LIB_USB_CLK_DSI       - DSI\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyUsbClk_SetSource(uint8 source) \r
-{\r
-    CY_LIB_CLKDIST_UCFG_REG = (CY_LIB_CLKDIST_UCFG_REG & ((uint8)(~CY_LIB_CLKDIST_UCFG_SRC_SEL_MASK))) |\r
-                        (CY_LIB_CLKDIST_UCFG_SRC_SEL_MASK & source);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Start1K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the ILO 1 KHz oscillator.\r
-*\r
-*  Note The ILO 1 KHz oscillator is always enabled by default, regardless of the\r
-*  selection in the Clock Editor. Therefore, this API is only needed if the\r
-*  oscillator was turned off manually.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_Start1K(void) \r
-{\r
-    /* Set the bit 1 of ILO RS */\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Stop1K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the ILO 1 KHz oscillator.\r
-*\r
-*  Note The ILO 1 KHz oscillator must be enabled if Sleep or Hibernate low power\r
-*  mode APIs are expected to be used. For more information, refer to the Power\r
-*  Management section of this document.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  PSoC5: Stopping the ILO 1 kHz could break the active WDT functionality.\r
-*\r
-*******************************************************************************/\r
-void CyILO_Stop1K(void) \r
-{\r
-    /* Clear the bit 1 of ILO RS */\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Start100K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the ILO 100 KHz oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_Start100K(void) \r
-{\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Stop100K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the ILO 100 KHz oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_Stop100K(void) \r
-{\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Enable33K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the ILO 33 KHz divider.\r
-*\r
-*  Note that the 33 KHz clock is generated from the 100 KHz oscillator,\r
-*  so it must also be running in order to generate the 33 KHz output.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_Enable33K(void) \r
-{\r
-    /* Set the bit 5 of ILO RS */\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG |= CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_Disable33K\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the ILO 33 KHz divider.\r
-*\r
-*  Note that the 33 KHz clock is generated from the 100 KHz oscillator, but this\r
-*  API does not disable the 100 KHz clock.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_Disable33K(void) \r
-{\r
-    CY_LIB_SLOWCLK_ILO_CR0_REG &= ((uint8)(~CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_SetSource\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the source of the clock output from the ILO block.\r
-*\r
-* Parameters:\r
-*  source: One of the three available ILO output sources\r
-*       Value        Define                Source\r
-*       0            CY_ILO_SOURCE_100K    ILO 100 KHz\r
-*       1            CY_ILO_SOURCE_33K     ILO 33 KHz\r
-*       2            CY_ILO_SOURCE_1K      ILO 1 KHz\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyILO_SetSource(uint8 source) \r
-{\r
-    CY_LIB_CLKDIST_CR_REG = (CY_LIB_CLKDIST_CR_REG & CY_ILO_SOURCE_BITS_CLEAR) |\r
-                    (((uint8) (source << 2u)) & ((uint8)(~CY_ILO_SOURCE_BITS_CLEAR)));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyILO_SetPowerMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the power mode used by the ILO during power down. Allows for lower power\r
-*  down power usage resulting in a slower startup time.\r
-*\r
-* Parameters:\r
-*  uint8 mode\r
-*   CY_ILO_FAST_START - Faster start-up, internal bias left on when powered down\r
-*   CY_ILO_SLOW_START - Slower start-up, internal bias off when powered down\r
-*\r
-* Return:\r
-*   Prevous power mode state.\r
-*\r
-*******************************************************************************/\r
-uint8 CyILO_SetPowerMode(uint8 mode) \r
-{\r
-    uint8 state;\r
-\r
-    /* Get current state. */\r
-    state = CY_LIB_SLOWCLK_ILO_CR0_REG;\r
-\r
-    /* Set the the oscillator power mode. */\r
-    if(mode != CY_ILO_FAST_START)\r
-    {\r
-        CY_LIB_SLOWCLK_ILO_CR0_REG = (state | CY_ILO_CONTROL_PD_MODE);\r
-    }\r
-    else\r
-    {\r
-        CY_LIB_SLOWCLK_ILO_CR0_REG = (state & ((uint8)(~CY_ILO_CONTROL_PD_MODE)));\r
-    }\r
-\r
-    /* Return the old mode. */\r
-    return ((state & CY_ILO_CONTROL_PD_MODE) >> CY_ILO_CONTROL_PD_POSITION);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_32KHZ_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the 32 KHz Crystal Oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_32KHZ_Start(void) \r
-{\r
-    volatile uint16 i;\r
-\r
-    CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
-    CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_STARTUP;\r
-    CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-                                CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-\r
-    #if(CY_PSOC3)\r
-        CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_PDBEN;\r
-    #endif  /* (CY_PSOC3) */\r
-\r
-    /* Enable operation of the 32K Crystal Oscillator */\r
-    CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_EN;\r
-\r
-    for (i = 1000u; i > 0u; i--)\r
-    {\r
-        if(0u != (CyXTAL_32KHZ_ReadStatus() & CY_XTAL32K_ANA_STAT))\r
-        {\r
-            /* Ready - switch to the hign power mode */\r
-            (void) CyXTAL_32KHZ_SetPowerMode(0u);\r
-\r
-            break;\r
-        }\r
-        CyDelayUs(1u);\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_32KHZ_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the 32KHz Crystal Oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_32KHZ_Stop(void) \r
-{\r
-    CY_CLK_XTAL32_TST_REG  = CY_CLK_XTAL32_TST_DEFAULT;\r
-    CY_CLK_XTAL32_TR_REG   = CY_CLK_XTAL32_TR_POWERDOWN;\r
-    CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-                             CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-    CY_CLK_XTAL32_CR_REG &= ((uint8)(~(CY_CLK_XTAL32_CR_EN | CY_CLK_XTAL32_CR_LPM)));\r
-\r
-    #if(CY_PSOC3)\r
-        CY_CLK_XTAL32_CR_REG &= ((uint8)(~CY_CLK_XTAL32_CR_PDBEN));\r
-    #endif  /* (CY_PSOC3) */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_32KHZ_ReadStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns status of the 32 KHz oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  Value     Define                    Source\r
-*  20        CY_XTAL32K_ANA_STAT       Analog measurement\r
-*                                       1: Stable\r
-*                                       0: Not stable\r
-*\r
-*******************************************************************************/\r
-uint8 CyXTAL_32KHZ_ReadStatus(void) \r
-{\r
-    return(CY_CLK_XTAL32_CR_REG & CY_XTAL32K_ANA_STAT);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_32KHZ_SetPowerMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the power mode for the 32 KHz oscillator used during sleep mode.\r
-*  Allows for lower power during sleep when there are fewer sources of noise.\r
-*  During active mode the oscillator is always run in high power mode.\r
-*\r
-* Parameters:\r
-*  uint8 mode\r
-*       0: High power mode\r
-*       1: Low power mode during sleep\r
-*\r
-* Return:\r
-*  Previous power mode.\r
-*\r
-*******************************************************************************/\r
-uint8 CyXTAL_32KHZ_SetPowerMode(uint8 mode) \r
-{\r
-    uint8 state = (0u != (CY_CLK_XTAL32_CR_REG & CY_CLK_XTAL32_CR_LPM)) ? 1u : 0u;\r
-\r
-    CY_CLK_XTAL32_TST_REG = CY_CLK_XTAL32_TST_DEFAULT;\r
-\r
-    if(1u == mode)\r
-    {\r
-        /* Low power mode during Sleep */\r
-        CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_LOW_POWER;\r
-        CyDelayUs(10u);\r
-        CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-                                CY_CLK_XTAL32_CFG_LP_LOWPOWER;\r
-        CyDelayUs(20u);\r
-        CY_CLK_XTAL32_CR_REG |= CY_CLK_XTAL32_CR_LPM;\r
-    }\r
-    else\r
-    {\r
-        /* High power mode */\r
-        CY_CLK_XTAL32_TR_REG  = CY_CLK_XTAL32_TR_HIGH_POWER;\r
-        CyDelayUs(10u);\r
-        CY_CLK_XTAL32_CFG_REG = (CY_CLK_XTAL32_CFG_REG & ((uint8)(~CY_CLK_XTAL32_CFG_LP_MASK))) |\r
-                                CY_CLK_XTAL32_CFG_LP_DEFAULT;\r
-        CY_CLK_XTAL32_CR_REG &= ((uint8)(~CY_CLK_XTAL32_CR_LPM));\r
-    }\r
-\r
-    return(state);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the megahertz crystal.\r
-*\r
-*  PSoC 3:\r
-*  Waits until the XERR bit is low (no error) for a millisecond or until the\r
-*  number of milliseconds specified by the wait parameter has expired.\r
-*\r
-* Parameters:\r
-*   wait: Valid range [0-255].\r
-*   This is the timeout value in milliseconds.\r
-*   The appropriate value is crystal specific.\r
-*\r
-* Return:\r
-*   CYRET_SUCCESS - Completed successfully\r
-*   CYRET_TIMEOUT - Timeout occurred without detecting a low value on XERR.\r
-*\r
-* Side Effects and Restrictions:\r
-*  If wait is enabled (non-zero wait). Uses the Fast Timewheel to time the wait.\r
-*  Any other use of the Fast Timewheel (FTW) will be stopped during the period\r
-*  of this function and then restored.\r
-*\r
-*  Uses the 100KHz ILO.  If not enabled, this function will enable the 100KHz\r
-*  ILO for the period of this function. No changes to the setup of the ILO,\r
-*  Fast Timewheel, Central Timewheel or Once Per Second interrupt may be made\r
-*  by interrupt routines during the period of this function.\r
-*\r
-*  The current operation of the ILO, Central Timewheel and Once Per Second\r
-*  interrupt are maintained during the operation of this function provided the\r
-*  reading of the Power Manager Interrupt Status Register is only done using the\r
-*  CyPmReadStatus() function.\r
-*\r
-*******************************************************************************/\r
-cystatus CyXTAL_Start(uint8 wait) \r
-{\r
-    cystatus status = CYRET_SUCCESS;\r
-    volatile uint8  timeout = wait;\r
-    volatile uint8 count;\r
-    uint8 iloEnableState;\r
-    uint8 pmTwCfg0Tmp;\r
-    uint8 pmTwCfg2Tmp;\r
-\r
-\r
-    /* Enables the MHz crystal oscillator circuit  */\r
-    CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_ENABLE;\r
-\r
-\r
-    if(wait > 0u)\r
-    {\r
-        /* Save 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-        iloEnableState = CY_LIB_SLOWCLK_ILO_CR0_REG;\r
-        pmTwCfg0Tmp = CY_LIB_PM_TW_CFG0_REG;\r
-        pmTwCfg2Tmp = CY_LIB_PM_TW_CFG2_REG;\r
-\r
-        /* Set 250 us interval */\r
-        CyPmFtwSetInterval(CY_CLK_XMHZ_FTW_INTERVAL);\r
-        status = CYRET_TIMEOUT;\r
-\r
-\r
-        for( ; timeout > 0u; timeout--)\r
-        {\r
-            /* Read XERR bit to clear it */\r
-            (void) CY_CLK_XMHZ_CSR_REG;\r
-\r
-            /* Wait for a millisecond - 4 x 250 us */\r
-            for(count = 4u; count > 0u; count--)\r
-            {\r
-                while(0u == (CY_PM_FTW_INT & CyPmReadStatus(CY_PM_FTW_INT)))\r
-                {\r
-                    /* Wait for the FTW interrupt event */\r
-                }\r
-            }\r
-\r
-\r
-            /*******************************************************************\r
-            * High output indicates oscillator failure.\r
-            * Only can be used after start-up interval (1 ms) is completed.\r
-            *******************************************************************/\r
-            if(0u == (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR))\r
-            {\r
-                status = CYRET_SUCCESS;\r
-                break;\r
-            }\r
-        }\r
-\r
-\r
-        /* Restore 100 KHz ILO, FTW interval, enable and interrupt enable */\r
-        if(0u == (iloEnableState & CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ))\r
-        {\r
-            CyILO_Stop100K();\r
-        }\r
-        CY_LIB_PM_TW_CFG0_REG = pmTwCfg0Tmp;\r
-        CY_LIB_PM_TW_CFG2_REG = pmTwCfg2Tmp;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the megahertz crystal oscillator.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_Stop(void) \r
-{\r
-    /* Disable the the oscillator. */\r
-    FASTCLK_XMHZ_CSR &= ((uint8)(~XMHZ_CONTROL_ENABLE));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_EnableErrStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the generation of the XERR status bit for the megahertz crystal.\r
-*  This function is not available for PSoC5.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_EnableErrStatus(void) \r
-{\r
-    /* If oscillator has insufficient amplitude, XERR bit will be high. */\r
-    CY_CLK_XMHZ_CSR_REG &= ((uint8)(~CY_CLK_XMHZ_CSR_XFB));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_DisableErrStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the generation of the XERR status bit for the megahertz crystal.\r
-*  This function is not available for PSoC5.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_DisableErrStatus(void) \r
-{\r
-    /* If oscillator has insufficient amplitude, XERR bit will be high. */\r
-    CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_XFB;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_ReadStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Reads the XERR status bit for the megahertz crystal. This status bit is a\r
-*  sticky clear on read value. This function is not available for PSoC5.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*   Status\r
-*    0: No error\r
-*    1: Error\r
-*\r
-*******************************************************************************/\r
-uint8 CyXTAL_ReadStatus(void) \r
-{\r
-    /***************************************************************************\r
-    * High output indicates oscillator failure. Only use this after start-up\r
-    * interval is completed. This can be used for status and failure recovery.\r
-    ***************************************************************************/\r
-    return((0u != (CY_CLK_XMHZ_CSR_REG & CY_CLK_XMHZ_CSR_XERR)) ? 1u : 0u);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_EnableFaultRecovery\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the fault recovery circuit which will switch to the IMO in the case\r
-*  of a fault in the megahertz crystal circuit. The crystal must be up and\r
-*  running with the XERR bit at 0, before calling this function to prevent\r
-*  immediate fault switchover. This function is not available for PSoC5.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_EnableFaultRecovery(void) \r
-{\r
-    CY_CLK_XMHZ_CSR_REG |= CY_CLK_XMHZ_CSR_XPROT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_DisableFaultRecovery\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the fault recovery circuit which will switch to the IMO in the case\r
-*  of a fault in the megahertz crystal circuit. This function is not available\r
-*  for PSoC5.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_DisableFaultRecovery(void) \r
-{\r
-    CY_CLK_XMHZ_CSR_REG &= ((uint8)(~CY_CLK_XMHZ_CSR_XPROT));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_SetStartup\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the startup settings for the crystal. Logic model outputs a frequency\r
-*  (setting + 4) MHz when enabled.\r
-*\r
-*  This is artificial as the actual frequency is determined by an attached\r
-*  external crystal.\r
-*\r
-* Parameters:\r
-*  setting: Valid range [0-31].\r
-*   Value is dependent on the frequency and quality of the crystal being used.\r
-*   Refer to the device TRM and datasheet for more information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_SetStartup(uint8 setting) \r
-{\r
-    CY_CLK_XMHZ_CFG0_REG = (CY_CLK_XMHZ_CFG0_REG & ((uint8)(~CY_CLK_XMHZ_CFG0_XCFG_MASK))) |\r
-                           (setting & CY_CLK_XMHZ_CFG0_XCFG_MASK);\r
-}\r
-\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_SetFbVoltage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the feedback reference voltage to use for the crystal circuit.\r
-*  This function is only available for PSoC3 and PSoC 5LP.\r
-*\r
-* Parameters:\r
-*  setting: Valid range [0-15].\r
-*  Refer to the device TRM and datasheet for more information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_SetFbVoltage(uint8 setting) \r
-{\r
-    CY_CLK_XMHZ_CFG1_REG = ((CY_CLK_XMHZ_CFG1_REG & ((uint8)(~CY_CLK_XMHZ_CFG1_VREF_FB_MASK))) |\r
-                            (setting & CY_CLK_XMHZ_CFG1_VREF_FB_MASK));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyXTAL_SetWdVoltage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the reference voltage used by the watchdog to detect a failure in the\r
-*  crystal circuit. This function is only available for PSoC3 and PSoC 5LP.\r
-*\r
-* Parameters:\r
-*  setting: Valid range [0-7].\r
-*  Refer to the device TRM and datasheet for more information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyXTAL_SetWdVoltage(uint8 setting) \r
-{\r
-    CY_CLK_XMHZ_CFG1_REG = ((CY_CLK_XMHZ_CFG1_REG & ((uint8)(~CY_CLK_XMHZ_CFG1_VREF_WD_MASK))) |\r
-                            (((uint8)(setting << 4u)) & CY_CLK_XMHZ_CFG1_VREF_WD_MASK));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyHalt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Halts the CPU.\r
-*\r
-* Parameters:\r
-*  uint8 reason: Value to be used during debugging.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyHalt(uint8 reason) CYREENTRANT\r
-{\r
-    if(0u != reason)\r
-    {\r
-        /* To remove unreferenced local variable warning */\r
-    }\r
-\r
-    #if defined (__ARMCC_VERSION)\r
-        __breakpoint(0x0);\r
-    #elif defined(__GNUC__) || defined (__ICCARM__)\r
-        __asm("    bkpt    1");\r
-    #elif defined(__C51__)\r
-        CYDEV_HALT_CPU;\r
-    #endif  /* (__ARMCC_VERSION) */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySoftwareReset\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Forces a software reset of the device.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CySoftwareReset(void) \r
-{\r
-    CY_LIB_RESET_CR2_REG |= CY_LIB_RESET_CR2_RESET;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDelay\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Blocks for milliseconds.\r
-*\r
-*  Note:\r
-*  CyDelay has been implemented with the instruction cache assumed enabled. When\r
-*  instruction cache is disabled on PSoC5, CyDelay will be two times larger. For\r
-*  example, with instruction cache disabled CyDelay(100) would result in about\r
-*  200 ms delay instead of 100 ms.\r
-*\r
-* Parameters:\r
-*  milliseconds: number of milliseconds to delay.\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-void CyDelay(uint32 milliseconds) CYREENTRANT\r
-{\r
-    while (milliseconds > 32768u)\r
-    {\r
-        /***********************************************************************\r
-        * This loop prevents overflow.At 100MHz, milliseconds * delay_freq_khz\r
-        * overflows at about 42 seconds.\r
-        ***********************************************************************/\r
-        CyDelayCycles(cydelay_32k_ms);\r
-        milliseconds = ((uint32)(milliseconds - 32768u));\r
-    }\r
-\r
-    CyDelayCycles(milliseconds * cydelay_freq_khz);\r
-}\r
-\r
-\r
-#if(!CY_PSOC3)\r
-\r
-    /* For PSoC3 devices function is defined in CyBootAsmKeil.a51 file */\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyDelayUs\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Blocks for microseconds.\r
-    *\r
-    *  Note:\r
-    *   CyDelay has been implemented with the instruction cache assumed enabled.\r
-    *   When instruction cache is disabled on PSoC5, CyDelayUs will be two times\r
-    *   larger. Ex: With instruction cache disabled CyDelayUs(100) would result\r
-    *   in about 200us delay instead of 100us.\r
-    *\r
-    * Parameters:\r
-    *  uint16 microseconds: number of microseconds to delay.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Side Effects:\r
-    *  CyDelayUS has been implemented with the instruction cache assumed enabled.\r
-    *  When instruction cache is disabled on PSoC 5, CyDelayUs will be two times\r
-    *  larger. For example, with instruction cache disabled CyDelayUs(100) would\r
-    *  result in about 200 us delay instead of 100 us.\r
-    *\r
-    *  If the bus clock frequency is a small non-integer number, the actual delay\r
-    *  can be up to twice as long as the nominal value. The actual delay cannot be\r
-    *  shorter than the nominal one.\r
-    *******************************************************************************/\r
-    void CyDelayUs(uint16 microseconds) CYREENTRANT\r
-    {\r
-        CyDelayCycles((uint32)microseconds * cydelay_freq_mhz);\r
-    }\r
-\r
-#endif  /* (!CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDelayFreq\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets clock frequency for CyDelay.\r
-*\r
-* Parameters:\r
-*  freq: Frequency of bus clock in Hertz.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyDelayFreq(uint32 freq) CYREENTRANT\r
-{\r
-    if (freq != 0u)\r
-    {\r
-        cydelay_freq_hz = freq;\r
-    }\r
-    else\r
-    {\r
-        cydelay_freq_hz = BCLK__BUS_CLK__HZ;\r
-    }\r
-\r
-    cydelay_freq_mhz = (uint8)((cydelay_freq_hz + 999999u) / 1000000u);\r
-    cydelay_freq_khz = (cydelay_freq_hz + 999u) / 1000u;\r
-    cydelay_32k_ms   = 32768u * cydelay_freq_khz;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyWdtStart\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the watchdog timer.\r
-*\r
-*  The timer is configured for the specified count interval, the central\r
-*  timewheel is cleared, the setting for low power mode is configured and the\r
-*  watchdog timer is enabled.\r
-*\r
-*  Once enabled the watchdog cannot be disabled. The watchdog counts each time\r
-*  the Central Time Wheel (CTW) reaches the period specified. The watchdog must\r
-*  be cleared using the CyWdtClear() function before three ticks of the watchdog\r
-*  timer occur. The CTW is free running, so this will occur after between 2 and\r
-*  3 timer periods elapse.\r
-*\r
-*  PSoC5: The watchdog timer should not be used during sleep modes. Since the\r
-*  WDT cannot be disabled after it is enabled, the WDT timeout period can be\r
-*  set to be greater than the sleep wakeup period, then feed the dog on each\r
-*  wakeup from Sleep.\r
-*\r
-* Parameters:\r
-*  ticks: One of the four available timer periods. Once WDT enabled, the\r
-   interval cannot be changed.\r
-*         CYWDT_2_TICKS     -     4 - 6     ms\r
-*         CYWDT_16_TICKS    -    32 - 48    ms\r
-*         CYWDT_128_TICKS   -   256 - 384   ms\r
-*         CYWDT_1024_TICKS  - 2.048 - 3.072 s\r
-*\r
-*  lpMode: Low power mode configuration. This parameter is ignored for PSoC 5.\r
-*          The WDT always acts as if CYWDT_LPMODE_NOCHANGE is passed.\r
-*\r
-*          CYWDT_LPMODE_NOCHANGE - No Change\r
-*          CYWDT_LPMODE_MAXINTER - Switch to longest timer mode during low power\r
-*                                 mode\r
-*          CYWDT_LPMODE_DISABLED - Disable WDT during low power mode\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  PSoC5: The ILO 1 KHz must be enabled for proper WDT operation. Stopping the\r
-*  ILO 1 kHz could break the active WDT functionality.\r
-*\r
-*******************************************************************************/\r
-void CyWdtStart(uint8 ticks, uint8 lpMode) \r
-{\r
-    /* Set WDT interval */\r
-    CY_WDT_CFG_REG = (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_INTERVAL_MASK))) | (ticks & CY_WDT_CFG_INTERVAL_MASK);\r
-\r
-    /* Reset CTW to ensure that first watchdog period is full */\r
-    CY_WDT_CFG_REG |= CY_WDT_CFG_CTW_RESET;\r
-    CY_WDT_CFG_REG &= ((uint8)(~CY_WDT_CFG_CTW_RESET));\r
-\r
-    /* Setting the low power mode */\r
-    CY_WDT_CFG_REG = (((uint8)(lpMode << CY_WDT_CFG_LPMODE_SHIFT)) & CY_WDT_CFG_LPMODE_MASK) |\r
-                       (CY_WDT_CFG_REG & ((uint8)(~CY_WDT_CFG_LPMODE_MASK)));\r
-\r
-    /* Enables the watchdog reset */\r
-    CY_WDT_CFG_REG |= CY_WDT_CFG_WDR_EN;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyWdtClear\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Clears (feeds) the watchdog timer.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyWdtClear(void) \r
-{\r
-    CY_WDT_CR_REG = CY_WDT_CR_FEED;\r
-}\r
-\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdLvDigitEnable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the digital low voltage monitors to generate interrupt on Vddd\r
-*   archives specified threshold and optionally resets device.\r
-*\r
-* Parameters:\r
-*  reset: Option to reset device at a specified Vddd threshold:\r
-*           0 - Device is not reset.\r
-*           1 - Device is reset.\r
-*\r
-*  threshold: Sets the trip level for the voltage monitor.\r
-*  Values from 1.70 V to 5.45 V are accepted with the approximately 250 mV\r
-*  interval.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdLvDigitEnable(uint8 reset, uint8 threshold) \r
-{\r
-    *CY_INT_CLEAR_PTR = 0x01u;\r
-\r
-    CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
-\r
-    CY_VD_LVI_TRIP_REG = (threshold & CY_VD_LVI_TRIP_LVID_MASK) |\r
-                            (CY_VD_LVI_TRIP_REG & ((uint8)(~CY_VD_LVI_TRIP_LVID_MASK)));\r
-    CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVID_EN;\r
-\r
-    /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-    CyDelayUs(1u);\r
-\r
-    (void)CY_VD_PERSISTENT_STATUS_REG;\r
-\r
-    if(0u != reset)\r
-    {\r
-        CY_VD_PRES_CONTROL_REG |= CY_VD_PRESD_EN;\r
-    }\r
-    else\r
-    {\r
-        CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
-    }\r
-\r
-    *CY_INT_CLR_PEND_PTR = 0x01u;\r
-    *CY_INT_ENABLE_PTR   = 0x01u;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdLvAnalogEnable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the analog low voltage monitors to generate interrupt on Vdda\r
-*   archives specified threshold and optionally resets device.\r
-*\r
-* Parameters:\r
-*  reset: Option to reset device at a specified Vdda threshold:\r
-*           0 - Device is not reset.\r
-*           1 - Device is reset.\r
-*\r
-*  threshold: Sets the trip level for the voltage monitor.\r
-*  Values from 1.70 V to 5.45 V are accepted with the approximately 250 mV\r
-*  interval.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdLvAnalogEnable(uint8 reset, uint8 threshold) \r
-{\r
-    *CY_INT_CLEAR_PTR = 0x01u;\r
-\r
-    CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
-\r
-    CY_VD_LVI_TRIP_REG = ((uint8)(threshold << 4u)) | (CY_VD_LVI_TRIP_REG & 0x0Fu);\r
-    CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_LVIA_EN;\r
-\r
-    /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-    CyDelayUs(1u);\r
-\r
-    (void)CY_VD_PERSISTENT_STATUS_REG;\r
-\r
-    if(0u != reset)\r
-    {\r
-        CY_VD_PRES_CONTROL_REG |= CY_VD_PRESA_EN;\r
-    }\r
-    else\r
-    {\r
-        CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
-    }\r
-\r
-    *CY_INT_CLR_PEND_PTR = 0x01u;\r
-    *CY_INT_ENABLE_PTR   = 0x01u;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdLvDigitDisable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the digital low voltage monitor (interrupt and device reset are\r
-*  disabled).\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdLvDigitDisable(void) \r
-{\r
-    CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_LVID_EN));\r
-\r
-    CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESD_EN));\r
-\r
-    while(0u != (CY_VD_PERSISTENT_STATUS_REG & 0x07u))\r
-    {\r
-\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdLvAnalogDisable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the analog low voltage monitor (interrupt and device reset are\r
-*  disabled).\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdLvAnalogDisable(void) \r
-{\r
-    CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_LVIA_EN));\r
-\r
-    CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
-\r
-    while(0u != (CY_VD_PERSISTENT_STATUS_REG & 0x07u))\r
-    {\r
-\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdHvAnalogEnable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables the analog high voltage monitors to generate interrupt on\r
-*  Vdda archives 5.75 V threshold and optionally resets device.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdHvAnalogEnable(void) \r
-{\r
-    *CY_INT_CLEAR_PTR = 0x01u;\r
-\r
-    CY_VD_PRES_CONTROL_REG &= ((uint8)(~CY_VD_PRESA_EN));\r
-\r
-    CY_VD_LVI_HVI_CONTROL_REG |= CY_VD_HVIA_EN;\r
-\r
-    /* Timeout to eliminate glitches on the LVI/HVI when enabling */\r
-    CyDelayUs(1u);\r
-\r
-    (void) CY_VD_PERSISTENT_STATUS_REG;\r
-\r
-    *CY_INT_CLR_PEND_PTR = 0x01u;\r
-    *CY_INT_ENABLE_PTR   = 0x01u;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdHvAnalogDisable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the analog low voltage monitor\r
-*  (interrupt and device reset are disabled).\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyVdHvAnalogDisable(void) \r
-{\r
-    CY_VD_LVI_HVI_CONTROL_REG &= ((uint8)(~CY_VD_HVIA_EN));\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdStickyStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Manages the Reset and Voltage Detection Status Register 0.\r
-*  This register has the interrupt status for the HVIA, LVID and LVIA.\r
-*  This hardware register clears on read.\r
-*\r
-* Parameters:\r
-*  mask: Bits in the shadow register to clear.\r
-*   Define                  Definition\r
-*   CY_VD_LVID            Persistent status of digital LVI.\r
-*   CY_VD_LVIA            Persistent status of analog LVI.\r
-*   CY_VD_HVIA            Persistent status of analog HVI.\r
-*\r
-* Return:\r
-*  Status.  Same enumerated bit values as used for the mask parameter.\r
-*\r
-*******************************************************************************/\r
-uint8 CyVdStickyStatus(uint8 mask) \r
-{\r
-    uint8 status;\r
-\r
-    status = CY_VD_PERSISTENT_STATUS_REG;\r
-    CY_VD_PERSISTENT_STATUS_REG &= ((uint8)(~mask));\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyVdRealTimeStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the real time voltage detection status.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  Status:\r
-*   Define                  Definition\r
-*   CY_VD_LVID            Persistent status of digital LVI.\r
-*   CY_VD_LVIA            Persistent status of analog LVI.\r
-*   CY_VD_HVIA            Persistent status of analog HVI.\r
-*\r
-*******************************************************************************/\r
-uint8 CyVdRealTimeStatus(void) \r
-{\r
-    uint8 interruptState;\r
-    uint8 vdFlagsState;\r
-\r
-    interruptState = CyEnterCriticalSection();\r
-    vdFlagsState = CY_VD_RT_STATUS_REG;\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return(vdFlagsState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyDisableInts\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disables the interrupt enable for each interrupt.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  32 bit mask of previously enabled interrupts.\r
-*\r
-*******************************************************************************/\r
-uint32 CyDisableInts(void) \r
-{\r
-    uint32 intState;\r
-    uint8 interruptState;\r
-\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* Get the current interrupt state. */\r
-        intState  = ((uint32) CY_GET_REG8(CY_INT_CLR_EN0_PTR));\r
-        intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN1_PTR)) << 8u));\r
-        intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN2_PTR)) << 16u));\r
-        intState |= ((uint32) (((uint32) CY_GET_REG8(CY_INT_CLR_EN3_PTR)) << 24u));\r
-\r
-\r
-        /* Disable all of the interrupts. */\r
-        CY_SET_REG8(CY_INT_CLR_EN0_PTR, 0xFFu);\r
-        CY_SET_REG8(CY_INT_CLR_EN1_PTR, 0xFFu);\r
-        CY_SET_REG8(CY_INT_CLR_EN2_PTR, 0xFFu);\r
-        CY_SET_REG8(CY_INT_CLR_EN3_PTR, 0xFFu);\r
-\r
-    #else\r
-\r
-        /* Get the current interrupt state. */\r
-        intState = CY_GET_REG32(CY_INT_CLEAR_PTR);\r
-\r
-        /* Disable all of the interrupts. */\r
-        CY_SET_REG32(CY_INT_CLEAR_PTR, 0xFFFFFFFFu);\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return (intState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyEnableInts\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Enables interrupts to a given state.\r
-*\r
-* Parameters:\r
-*  uint32 mask: 32 bit mask of interrupts to enable.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyEnableInts(uint32 mask) \r
-{\r
-\r
-    uint8 interruptState;\r
-\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* Set interrupts as enabled. */\r
-        CY_SET_REG8(CY_INT_SET_EN3_PTR, ((uint8) (mask >> 24u)));\r
-        CY_SET_REG8(CY_INT_SET_EN2_PTR, ((uint8) (mask >> 16u)));\r
-        CY_SET_REG8(CY_INT_SET_EN1_PTR, ((uint8) (mask >> 8u )));\r
-        CY_SET_REG8(CY_INT_SET_EN0_PTR, ((uint8) (mask )));\r
-\r
-    #else\r
-\r
-        CY_SET_REG32(CY_INT_ENABLE_PTR, mask);\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-    CyExitCriticalSection(interruptState);\r
-\r
-}\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyFlushCache\r
-    ********************************************************************************\r
-    * Summary:\r
-    *  Flushes the PSoC 5/5LP cache by invalidating all entries.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    void CyFlushCache(void)\r
-    {\r
-        uint8 interruptState;\r
-\r
-        /* Save current global interrupt enable and disable it */\r
-        interruptState = CyEnterCriticalSection();\r
-\r
-        /* Fill instruction prefectch unit to insure data integrity */\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-\r
-        /* All entries in the cache are invalidated on the next clock cycle. */\r
-        CY_CACHE_CONTROL_REG |= CY_CACHE_CONTROL_FLUSH;\r
-\r
-\r
-        /***********************************************************************\r
-        * The prefetch unit could/would be filled with the instructions that\r
-        * succeed the flush. Since a flush is desired then theoretically those\r
-        * instructions might be considered stale/invalid.\r
-        ***********************************************************************/\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-        CY_NOP;\r
-\r
-        /* Restore global interrupt enable state */\r
-        CyExitCriticalSection(interruptState);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntSetSysVector\r
-    ********************************************************************************\r
-    * Summary:\r
-    *  Sets the interrupt vector of the specified system interrupt number. System\r
-    *  interrupts are present only for the ARM platform. These interrupts are for\r
-    *  SysTick, PendSV and others.\r
-    *\r
-    * Parameters:\r
-    *  number: Interrupt number, valid range [0-15].\r
-       address: Pointer to an interrupt service routine.\r
-    *\r
-    * Return:\r
-    *   The old ISR vector at this location.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntSetSysVector(uint8 number, cyisraddress address)\r
-    {\r
-        cyisraddress oldIsr;\r
-        cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-\r
-        CYASSERT(number <= CY_INT_SYS_NUMBER_MAX);\r
-\r
-        /* Save old Interrupt service routine. */\r
-        oldIsr = ramVectorTable[number & CY_INT_SYS_NUMBER_MASK];\r
-\r
-        /* Set new Interrupt service routine. */\r
-        ramVectorTable[number & CY_INT_SYS_NUMBER_MASK] = address;\r
-\r
-        return (oldIsr);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetSysVector\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets the interrupt vector of the specified system interrupt number. System\r
-    *  interrupts are present only for the ARM platform. These interrupts are for\r
-    *  SysTick, PendSV and others.\r
-    *\r
-    * Parameters:\r
-    *   number: The interrupt number, valid range [0-15].\r
-    *\r
-    * Return:\r
-    *   Address of the ISR in the interrupt vector table.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntGetSysVector(uint8 number)\r
-    {\r
-        cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-        CYASSERT(number <= CY_INT_SYS_NUMBER_MAX);\r
-\r
-        return ramVectorTable[number & CY_INT_SYS_NUMBER_MASK];\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntSetVector\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sets the interrupt vector of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number\r
-    *  address: Pointer to an interrupt service routine\r
-    *\r
-    * Return:\r
-    *   Previous interrupt vector value.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntSetVector(uint8 number, cyisraddress address)\r
-    {\r
-        cyisraddress oldIsr;\r
-        cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        /* Save old Interrupt service routine. */\r
-        oldIsr = ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)];\r
-\r
-        /* Set new Interrupt service routine. */\r
-        ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)] = address;\r
-\r
-        return (oldIsr);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetVector\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets the interrupt vector of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number\r
-    *\r
-    * Return:\r
-    *  Address of the ISR in the interrupt vector table.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntGetVector(uint8 number)\r
-    {\r
-        cyisraddress *ramVectorTable = *CY_INT_VECT_TABLE;\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        return (ramVectorTable[CY_INT_IRQ_BASE + (number & CY_INT_NUMBER_MASK)]);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntSetPriority\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sets the Priority of the Interrupt.\r
-    *\r
-    * Parameters:\r
-    *  priority: Priority of the interrupt. 0 - 7, 0 being the highest.\r
-    *  number: The number of the interrupt, 0 - 31.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    void CyIntSetPriority(uint8 number, uint8 priority)\r
-    {\r
-        CYASSERT(priority <= CY_INT_PRIORITY_MAX);\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-        CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] = (priority & CY_INT_PRIORITY_MASK)<< 5;\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetPriority\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets the Priority of the Interrupt.\r
-    *\r
-    * Parameters:\r
-    *  number: The number of the interrupt, 0 - 31.\r
-    *\r
-    * Return:\r
-    *  Priority of the interrupt. 0 - 7, 0 being the highest.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 CyIntGetPriority(uint8 number)\r
-    {\r
-        uint8 priority;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        priority = CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] >> 5;\r
-\r
-        return (priority);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetState\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *   Gets the enable state of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *   number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *   Enable status: 1 if enabled, 0 if disabled\r
-    *\r
-    *******************************************************************************/\r
-    uint8 CyIntGetState(uint8 number)\r
-    {\r
-        reg32 * stateReg;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        /* Get a pointer to the Interrupt enable register. */\r
-        stateReg = CY_INT_ENABLE_PTR;\r
-\r
-        /* Get the state of the interrupt. */\r
-        return (0u != (*stateReg & (((uint32) 1u) << (0x1Fu & number)))) ? ((uint8)(1u)) : ((uint8)(0u));\r
-    }\r
-\r
-\r
-#else   /* PSoC3 */\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntSetVector\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sets the interrupt vector of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number:  Valid range [0-31].  Interrupt number\r
-    *  address: Pointer to an interrupt service routine\r
-    *\r
-    * Return:\r
-    *  Previous interrupt vector value.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntSetVector(uint8 number, cyisraddress address) \r
-    {\r
-        cyisraddress oldIsr;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        /* Save old Interrupt service routine. */\r
-        oldIsr = (cyisraddress) \\r
-                    CY_GET_REG16(&CY_INT_VECT_TABLE[number & CY_INT_NUMBER_MASK]);\r
-\r
-        /* Set new Interrupt service routine. */\r
-        CY_SET_REG16(&CY_INT_VECT_TABLE[number], (uint16) address);\r
-\r
-        return (oldIsr);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetVector\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets the interrupt vector of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number\r
-    *\r
-    * Return:\r
-    *  Address of the ISR in the interrupt vector table.\r
-    *\r
-    *******************************************************************************/\r
-    cyisraddress CyIntGetVector(uint8 number) \r
-    {\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        return ((cyisraddress) \\r
-                CY_GET_REG16(&CY_INT_VECT_TABLE[number & CY_INT_NUMBER_MASK]));\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntSetPriority\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sets the Priority of the Interrupt.\r
-    *\r
-    * Parameters:\r
-    *  priority: Priority of the interrupt. 0 - 7, 0 being the highest.\r
-    *  number:   The number of the interrupt, 0 - 31.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    void CyIntSetPriority(uint8 number, uint8 priority) \r
-    {\r
-        CYASSERT(priority <= CY_INT_PRIORITY_MAX);\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] =\r
-                    (priority & CY_INT_PRIORITY_MASK) << 5;\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetPriority\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets the Priority of the Interrupt.\r
-    *\r
-    * Parameters:\r
-    *  number: The number of the interrupt, 0 - 31.\r
-    *\r
-    * Return:\r
-    *  Priority of the interrupt. 0 - 7, 0 being the highest.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 CyIntGetPriority(uint8 number) \r
-    {\r
-        uint8 priority;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        priority = CY_INT_PRIORITY_PTR[number & CY_INT_NUMBER_MASK] >> 5;\r
-\r
-        return (priority);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CyIntGetState\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *   Gets the enable state of the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *   number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *   Enable status: 1 if enabled, 0 if disabled\r
-    *\r
-    *******************************************************************************/\r
-    uint8 CyIntGetState(uint8 number) \r
-    {\r
-        reg8 * stateReg;\r
-\r
-        CYASSERT(number <= CY_INT_NUMBER_MAX);\r
-\r
-        /* Get a pointer to the Interrupt enable register. */\r
-        stateReg = CY_INT_ENABLE_PTR + ((number & CY_INT_NUMBER_MASK) >> 3u);\r
-\r
-        /* Get the state of the interrupt. */\r
-        return ((0u != (*stateReg & ((uint8)(1u << (0x07u & number))))) ? ((uint8)(1u)) : ((uint8)(0u)));\r
-    }\r
-\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: CySetScPumps\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  If 1 is passed as a parameter:\r
-    *   - if any of the SC blocks are used - enable pumps for the SC blocks and\r
-    *     start boost clock.\r
-    *   - For the each enabled SC block set boost clock index and enable boost\r
-    *     clock.\r
-    *\r
-    *  If non-1 value is passed as a parameter:\r
-    *   - If all SC blocks are not used - disable pumps for the SC blocks and\r
-    *     stop boost clock.\r
-    *   - For the each enabled SC block clear boost clock index and disable boost\r
-    *     clock.\r
-    *\r
-    *  The global variable CyScPumpEnabled is updated to be equal to passed\r
-    *  parameter.\r
-    *\r
-    * Parameters:\r
-    *   uint8 enable: Enable/disable SC pumps and boost clock for enabled SC block.\r
-    *                 1 - Enable\r
-    *                 0 - Disable\r
-    *\r
-    * Return:\r
-    *   None\r
-    *\r
-    *******************************************************************************/\r
-    void CySetScPumps(uint8 enable) \r
-    {\r
-        if(1u == enable)\r
-        {\r
-            /* The SC pumps should be enabled */\r
-            CyScPumpEnabled = 1u;\r
-            /* Enable pumps if any of SC blocks are used */\r
-            if(0u != (CY_LIB_ACT_CFG9_REG & CY_LIB_ACT_CFG9_SWCAPS_MASK))\r
-            {\r
-                CY_LIB_SC_MISC_REG |= CY_LIB_SC_MISC_PUMP_FORCE;\r
-                CyScBoostClk_Start();\r
-            }\r
-            /* Set positive pump for each enabled SC block: set clock index and enable it */\r
-            if(0u != (CY_LIB_ACT_CFG9_REG & CY_LIB_ACT_CFG9_SWCAP0_EN))\r
-            {\r
-                CY_LIB_SC0_BST_REG = (CY_LIB_SC0_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK) | CyScBoostClk__INDEX;\r
-                CY_LIB_SC0_BST_REG |= CY_LIB_SC_BST_CLK_EN;\r
-            }\r
-            if(0u != (CY_LIB_ACT_CFG9_REG & CY_LIB_ACT_CFG9_SWCAP1_EN))\r
-            {\r
-                CY_LIB_SC1_BST_REG = (CY_LIB_SC1_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK) | CyScBoostClk__INDEX;\r
-                CY_LIB_SC1_BST_REG |= CY_LIB_SC_BST_CLK_EN;\r
-            }\r
-            if(0u != (CY_LIB_ACT_CFG9_REG & CY_LIB_ACT_CFG9_SWCAP2_EN))\r
-            {\r
-                CY_LIB_SC2_BST_REG = (CY_LIB_SC2_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK) | CyScBoostClk__INDEX;\r
-                CY_LIB_SC2_BST_REG |= CY_LIB_SC_BST_CLK_EN;\r
-            }\r
-            if(0u != (CY_LIB_ACT_CFG9_REG & CY_LIB_ACT_CFG9_SWCAP3_EN))\r
-            {\r
-                CY_LIB_SC3_BST_REG = (CY_LIB_SC3_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK) | CyScBoostClk__INDEX;\r
-                CY_LIB_SC3_BST_REG |= CY_LIB_SC_BST_CLK_EN;\r
-            }\r
-        }\r
-        else\r
-        {\r
-            /* The SC pumps should be disabled */\r
-            CyScPumpEnabled = 0u;\r
-            /* Disable pumps for all SC blocks and stop boost clock */\r
-            CY_LIB_SC_MISC_REG &= ((uint8)(~CY_LIB_SC_MISC_PUMP_FORCE));\r
-            CyScBoostClk_Stop();\r
-            /* Disable boost clock and clear clock index for each SC block */\r
-            CY_LIB_SC0_BST_REG &= ((uint8)(~CY_LIB_SC_BST_CLK_EN));\r
-            CY_LIB_SC0_BST_REG = CY_LIB_SC0_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK;\r
-            CY_LIB_SC1_BST_REG &= ((uint8)(~CY_LIB_SC_BST_CLK_EN));\r
-            CY_LIB_SC1_BST_REG = CY_LIB_SC1_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK;\r
-            CY_LIB_SC2_BST_REG &= ((uint8)(~CY_LIB_SC_BST_CLK_EN));\r
-            CY_LIB_SC2_BST_REG = CY_LIB_SC2_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK;\r
-            CY_LIB_SC3_BST_REG &= ((uint8)(~CY_LIB_SC_BST_CLK_EN));\r
-            CY_LIB_SC3_BST_REG = CY_LIB_SC3_BST_REG & CY_LIB_SC_BST_CLK_INDEX_MASK;\r
-        }\r
-    }\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.h
deleted file mode 100755 (executable)
index 8a69921..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CyLib.h
+++ /dev/null
@@ -1,1281 +0,0 @@
-/*******************************************************************************\r
-* File Name: CyLib.h\r
-* Version 4.0\r
-*\r
-* Description:\r
-*  Provides the function definitions for the system, clocking, interrupts and\r
-*  watchdog timer API.\r
-*\r
-* Note:\r
-*  Documentation of the API's in this file is located in the System Reference\r
-*  Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYLIB_H)\r
-#define CY_BOOT_CYLIB_H\r
-\r
-#include <string.h>\r
-#include <limits.h>\r
-#include <ctype.h>\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cydevice_trm.h"\r
-#include "cyPm.h"\r
-\r
-#if(CY_PSOC3)\r
-    #include <PSoC3_8051.h>\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    #include "CyScBoostClk.h"\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/* Global variable with preserved reset status */\r
-extern uint8 CYXDATA CyResetStatus;\r
-\r
-\r
-/* Variable Vdda */\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    extern uint8 CyScPumpEnabled;\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/* Do not use these definitions directly in your application */\r
-extern uint32 cydelay_freq_hz;\r
-extern uint32 cydelay_freq_khz;\r
-extern uint8  cydelay_freq_mhz;\r
-extern uint32 cydelay_32k_ms;\r
-\r
-\r
-/***************************************\r
-*    Function Prototypes\r
-***************************************/\r
-cystatus CyPLL_OUT_Start(uint8 wait) ;\r
-void  CyPLL_OUT_Stop(void) ;\r
-void  CyPLL_OUT_SetPQ(uint8 pDiv, uint8 qDiv, uint8 current) ;\r
-void  CyPLL_OUT_SetSource(uint8 source) ;\r
-\r
-void  CyIMO_Start(uint8 wait) ;\r
-void  CyIMO_Stop(void) ;\r
-void  CyIMO_SetFreq(uint8 freq) ;\r
-void  CyIMO_SetSource(uint8 source) ;\r
-void  CyIMO_EnableDoubler(void) ;\r
-void  CyIMO_DisableDoubler(void) ;\r
-\r
-void  CyMasterClk_SetSource(uint8 source) ;\r
-void  CyMasterClk_SetDivider(uint8 divider) ;\r
-void  CyBusClk_SetDivider(uint16 divider) ;\r
-\r
-#if(CY_PSOC3)\r
-    void  CyCpuClk_SetDivider(uint8 divider) ;\r
-#endif  /* (CY_PSOC3) */\r
-\r
-void  CyUsbClk_SetSource(uint8 source) ;\r
-\r
-void  CyILO_Start1K(void) ;\r
-void  CyILO_Stop1K(void) ;\r
-void  CyILO_Start100K(void) ;\r
-void  CyILO_Stop100K(void) ;\r
-void  CyILO_Enable33K(void) ;\r
-void  CyILO_Disable33K(void) ;\r
-void  CyILO_SetSource(uint8 source) ;\r
-uint8 CyILO_SetPowerMode(uint8 mode) ;\r
-\r
-uint8 CyXTAL_32KHZ_ReadStatus(void) ;\r
-uint8 CyXTAL_32KHZ_SetPowerMode(uint8 mode) ;\r
-void  CyXTAL_32KHZ_Start(void) ;\r
-void  CyXTAL_32KHZ_Stop(void) ;\r
-\r
-cystatus CyXTAL_Start(uint8 wait) ;\r
-void  CyXTAL_Stop(void) ;\r
-void  CyXTAL_SetStartup(uint8 setting) ;\r
-\r
-void  CyXTAL_EnableErrStatus(void) ;\r
-void  CyXTAL_DisableErrStatus(void) ;\r
-uint8 CyXTAL_ReadStatus(void) ;\r
-void  CyXTAL_EnableFaultRecovery(void) ;\r
-void  CyXTAL_DisableFaultRecovery(void) ;\r
-\r
-void CyXTAL_SetFbVoltage(uint8 setting) ;\r
-void CyXTAL_SetWdVoltage(uint8 setting) ;\r
-\r
-void CyWdtStart(uint8 ticks, uint8 lpMode) ;\r
-void CyWdtClear(void) ;\r
-\r
-/* System Function Prototypes */\r
-void CyDelay(uint32 milliseconds) CYREENTRANT;\r
-void CyDelayUs(uint16 microseconds);\r
-void CyDelayFreq(uint32 freq) CYREENTRANT;\r
-void CyDelayCycles(uint32 cycles);\r
-\r
-void CySoftwareReset(void) ;\r
-\r
-uint8 CyEnterCriticalSection(void);\r
-void CyExitCriticalSection(uint8 savedIntrStatus);\r
-void CyHalt(uint8 reason) CYREENTRANT;\r
-\r
-\r
-/* Interrupt Function Prototypes */\r
-#if(CY_PSOC5)\r
-    cyisraddress CyIntSetSysVector(uint8 number, cyisraddress address)  ;\r
-    cyisraddress CyIntGetSysVector(uint8 number) ;\r
-#endif  /* (CY_PSOC5) */\r
-\r
-cyisraddress CyIntSetVector(uint8 number, cyisraddress address) ;\r
-cyisraddress CyIntGetVector(uint8 number) ;\r
-\r
-void  CyIntSetPriority(uint8 number, uint8 priority) ;\r
-uint8 CyIntGetPriority(uint8 number) ;\r
-\r
-uint8 CyIntGetState(uint8 number) ;\r
-\r
-uint32 CyDisableInts(void) ;\r
-void CyEnableInts(uint32 mask) ;\r
-\r
-\r
-#if(CY_PSOC5)\r
-    void CyFlushCache(void);\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/* Voltage Detection Function Prototypes */\r
-void CyVdLvDigitEnable(uint8 reset, uint8 threshold) ;\r
-void CyVdLvAnalogEnable(uint8 reset, uint8 threshold) ;\r
-void CyVdLvDigitDisable(void) ;\r
-void CyVdLvAnalogDisable(void) ;\r
-void CyVdHvAnalogEnable(void) ;\r
-void CyVdHvAnalogDisable(void) ;\r
-uint8 CyVdStickyStatus(uint8 mask) ;\r
-uint8 CyVdRealTimeStatus(void) ;\r
-\r
-void CySetScPumps(uint8 enable) ;\r
-\r
-\r
-/***************************************\r
-* API Constants\r
-***************************************/\r
-\r
-\r
-/*******************************************************************************\r
-* PLL API Constants\r
-*******************************************************************************/\r
-#define CY_CLK_PLL_ENABLE               (0x01u)\r
-#define CY_CLK_PLL_LOCK_STATUS          (0x01u)\r
-\r
-#define CY_CLK_PLL_FTW_INTERVAL         (24u)\r
-\r
-#define CY_CLK_PLL_MAX_Q_VALUE          (16u)\r
-#define CY_CLK_PLL_MIN_Q_VALUE          (1u)\r
-#define CY_CLK_PLL_MIN_P_VALUE          (8u)\r
-#define CY_CLK_PLL_MIN_CUR_VALUE        (1u)\r
-#define CY_CLK_PLL_MAX_CUR_VALUE        (7u)\r
-\r
-#define CY_CLK_PLL_CURRENT_POSITION     (4u)\r
-#define CY_CLK_PLL_CURRENT_MASK         (0x8Fu)\r
-\r
-\r
-/*******************************************************************************\r
-* External 32kHz Crystal Oscillator API Constants\r
-*******************************************************************************/\r
-#define CY_XTAL32K_ANA_STAT             (0x20u)\r
-\r
-#define CY_CLK_XTAL32_CR_LPM            (0x02u)\r
-#define CY_CLK_XTAL32_CR_EN             (0x01u)\r
-#if(CY_PSOC3)\r
-    #define CY_CLK_XTAL32_CR_PDBEN      (0x04u)\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#define CY_CLK_XTAL32_TR_MASK           (0x07u)\r
-#define CY_CLK_XTAL32_TR_STARTUP        (0x03u)\r
-#define CY_CLK_XTAL32_TR_HIGH_POWER     (0x06u)\r
-#define CY_CLK_XTAL32_TR_LOW_POWER      (0x01u)\r
-#define CY_CLK_XTAL32_TR_POWERDOWN      (0x00u)\r
-\r
-#define CY_CLK_XTAL32_TST_DEFAULT       (0xF3u)\r
-\r
-#define CY_CLK_XTAL32_CFG_LP_DEFAULT    (0x04u)\r
-#define CY_CLK_XTAL32_CFG_LP_LOWPOWER   (0x08u)\r
-#define CY_CLK_XTAL32_CFG_LP_MASK       (0x0Cu)\r
-\r
-#define CY_CLK_XTAL32_CFG_LP_ALLOW      (0x80u)\r
-\r
-\r
-/*******************************************************************************\r
-* External MHz Crystal Oscillator API Constants\r
-*******************************************************************************/\r
-#define CY_CLK_XMHZ_FTW_INTERVAL        (24u)\r
-#define CY_CLK_XMHZ_MIN_TIMEOUT         (130u)\r
-\r
-#define CY_CLK_XMHZ_CSR_ENABLE          (0x01u)\r
-#define CY_CLK_XMHZ_CSR_XERR            (0x80u)\r
-#define CY_CLK_XMHZ_CSR_XFB             (0x04u)\r
-#define CY_CLK_XMHZ_CSR_XPROT           (0x40u)\r
-\r
-#define CY_CLK_XMHZ_CFG0_XCFG_MASK      (0x1Fu)\r
-#define CY_CLK_XMHZ_CFG1_VREF_FB_MASK   (0x0Fu)\r
-#define CY_CLK_XMHZ_CFG1_VREF_WD_MASK   (0x70u)\r
-\r
-\r
-/*******************************************************************************\r
-* Watchdog Timer API Constants\r
-*******************************************************************************/\r
-#define CYWDT_2_TICKS               (0x0u)     /*    4 -    6 ms */\r
-#define CYWDT_16_TICKS              (0x1u)     /*   32 -   48 ms */\r
-#define CYWDT_128_TICKS             (0x2u)     /*  256 -  384 ms */\r
-#define CYWDT_1024_TICKS            (0x3u)     /* 2048 - 3072 ms */\r
-\r
-#define CYWDT_LPMODE_NOCHANGE       (0x00u)\r
-#define CYWDT_LPMODE_MAXINTER       (0x01u)\r
-#define CYWDT_LPMODE_DISABLED       (0x03u)\r
-\r
-#define CY_WDT_CFG_INTERVAL_MASK    (0x03u)\r
-#define CY_WDT_CFG_CTW_RESET        (0x80u)\r
-#define CY_WDT_CFG_LPMODE_SHIFT     (5u)\r
-#define CY_WDT_CFG_LPMODE_MASK      (0x60u)\r
-#define CY_WDT_CFG_WDR_EN           (0x10u)\r
-#define CY_WDT_CFG_CLEAR_ALL        (0x00u)\r
-#define CY_WDT_CR_FEED              (0x01u)\r
-\r
-\r
-/*******************************************************************************\r
-*    Voltage Detection API Constants\r
-*******************************************************************************/\r
-\r
-#define CY_VD_LVID_EN                (0x01u)\r
-#define CY_VD_LVIA_EN                (0x02u)\r
-#define CY_VD_HVIA_EN                (0x04u)\r
-\r
-#define CY_VD_PRESD_EN               (0x40u)\r
-#define CY_VD_PRESA_EN               (0x80u)\r
-\r
-#define CY_VD_LVID                   (0x01u)\r
-#define CY_VD_LVIA                   (0x02u)\r
-#define CY_VD_HVIA                   (0x04u)\r
-\r
-#define CY_VD_LVI_TRIP_LVID_MASK     (0x0Fu)\r
-\r
-\r
-/*******************************************************************************\r
-*    Variable VDDA API Constants\r
-*******************************************************************************/\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    /* Active Power Mode Configuration Register 9 */\r
-    #define CY_LIB_ACT_CFG9_SWCAP0_EN        (0x01u)\r
-    #define CY_LIB_ACT_CFG9_SWCAP1_EN        (0x02u)\r
-    #define CY_LIB_ACT_CFG9_SWCAP2_EN        (0x04u)\r
-    #define CY_LIB_ACT_CFG9_SWCAP3_EN        (0x08u)\r
-    #define CY_LIB_ACT_CFG9_SWCAPS_MASK      (0x0Fu)\r
-\r
-    /* Switched Cap Miscellaneous Control Register */\r
-    #define CY_LIB_SC_MISC_PUMP_FORCE        (0x20u)\r
-\r
-    /* Switched Capacitor 0 Boost Clock Selection Register */\r
-    #define CY_LIB_SC_BST_CLK_EN             (0x08u)\r
-    #define CY_LIB_SC_BST_CLK_INDEX_MASK     (0xF8u)\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/*******************************************************************************\r
-* Clock Distribution API Constants\r
-*******************************************************************************/\r
-#define CY_LIB_CLKDIST_AMASK_MASK       (0xF0u)\r
-#define CY_LIB_CLKDIST_DMASK_MASK       (0x00u)\r
-#define CY_LIB_CLKDIST_LD_LOAD          (0x01u)\r
-#define CY_LIB_CLKDIST_BCFG2_MASK       (0x80u)\r
-#define CY_LIB_CLKDIST_MASTERCLK_DIV    (7u)\r
-#define CY_LIB_CLKDIST_BCFG2_SSS        (0x40u)\r
-#define CY_LIB_CLKDIST_MSTR1_SRC_MASK   (0xFCu)\r
-#define CY_LIB_FASTCLK_IMO_DOUBLER      (0x10u)\r
-#define CY_LIB_FASTCLK_IMO_IMO          (0x20u)\r
-#define CY_LIB_CLKDIST_CR_IMO2X         (0x40u)\r
-#define CY_LIB_FASTCLK_IMO_CR_RANGE_MASK (0xF8u)\r
-\r
-#define CY_LIB_CLKDIST_CR_PLL_SCR_MASK  (0xFCu)\r
-\r
-\r
-/* CyILO_SetPowerMode() */\r
-#define CY_ILO_CONTROL_PD_MODE          (0x10u)\r
-#define CY_ILO_CONTROL_PD_POSITION      (4u)\r
-\r
-#define CY_ILO_SOURCE_100K              (0u)\r
-#define CY_ILO_SOURCE_33K               (1u)\r
-#define CY_ILO_SOURCE_1K                (2u)\r
-\r
-#define CY_ILO_FAST_START               (0u)\r
-#define CY_ILO_SLOW_START               (1u)\r
-\r
-#define CY_ILO_SOURCE_BITS_CLEAR        (0xF3u)\r
-#define CY_ILO_SOURCE_1K_SET            (0x08u)\r
-#define CY_ILO_SOURCE_33K_SET           (0x04u)\r
-#define CY_ILO_SOURCE_100K_SET          (0x00u)\r
-\r
-#define CY_MASTER_SOURCE_IMO            (0u)\r
-#define CY_MASTER_SOURCE_PLL            (1u)\r
-#define CY_MASTER_SOURCE_XTAL           (2u)\r
-#define CY_MASTER_SOURCE_DSI            (3u)\r
-\r
-#define CY_IMO_SOURCE_IMO               (0u)\r
-#define CY_IMO_SOURCE_XTAL              (1u)\r
-#define CY_IMO_SOURCE_DSI               (2u)\r
-\r
-\r
-/* CyIMO_Start() */\r
-#define CY_LIB_PM_ACT_CFG0_IMO_EN       (0x10u)\r
-#define CY_LIB_PM_STBY_CFG0_IMO_EN      (0x10u)\r
-#define CY_LIB_CLK_IMO_FTW_TIMEOUT      (0x00u)\r
-\r
-#define CY_LIB_IMO_3MHZ_VALUE           (0x03u)\r
-#define CY_LIB_IMO_6MHZ_VALUE           (0x01u)\r
-#define CY_LIB_IMO_12MHZ_VALUE          (0x00u)\r
-#define CY_LIB_IMO_24MHZ_VALUE          (0x02u)\r
-#define CY_LIB_IMO_48MHZ_VALUE          (0x04u)\r
-#define CY_LIB_IMO_62MHZ_VALUE          (0x05u)\r
-#define CY_LIB_IMO_74MHZ_VALUE          (0x06u)\r
-\r
-\r
-/* CyIMO_SetFreq() */\r
-#define CY_IMO_FREQ_3MHZ                (0u)\r
-#define CY_IMO_FREQ_6MHZ                (1u)\r
-#define CY_IMO_FREQ_12MHZ               (2u)\r
-#define CY_IMO_FREQ_24MHZ               (3u)\r
-#define CY_IMO_FREQ_48MHZ               (4u)\r
-#define CY_IMO_FREQ_62MHZ               (5u)\r
-#if(CY_PSOC5)\r
-    #define CY_IMO_FREQ_74MHZ           (6u)\r
-#endif  /* (CY_PSOC5) */\r
-#define CY_IMO_FREQ_USB                 (8u)\r
-\r
-#define CY_LIB_IMO_USBCLK_ON_SET        (0x40u)\r
-\r
-\r
-/* CyCpuClk_SetDivider() */\r
-#define CY_LIB_CLKDIST_DIV_POSITION     (4u)\r
-#define CY_LIB_CLKDIST_MSTR1_DIV_MASK   (0x0Fu)\r
-\r
-\r
-/* CyIMO_SetTrimValue() */\r
-#define CY_LIB_USB_CLK_EN               (0x02u)\r
-\r
-\r
-/* CyPLL_OUT_SetSource() - parameters */\r
-#define CY_PLL_SOURCE_IMO               (0u)\r
-#define CY_PLL_SOURCE_XTAL              (1u)\r
-#define CY_PLL_SOURCE_DSI               (2u)\r
-\r
-\r
-/* CyILO_[Start|Stop][1|100K](), CyILO_[Enable|Disable]33K() */\r
-#define CY_LIB_SLOWCLK_ILO_CR0_EN_1KHZ   (0x02u)\r
-#define CY_LIB_SLOWCLK_ILO_CR0_EN_33KHZ  (0x20u)\r
-#define CY_LIB_SLOWCLK_ILO_CR0_EN_100KHZ (0x04u)\r
-\r
-\r
-/* CyUsbClk_SetSource() */\r
-#define CY_LIB_CLKDIST_UCFG_SRC_SEL_MASK (0x03u)\r
-\r
-\r
-/* CyUsbClk_SetSource() - parameters */\r
-#define CY_LIB_USB_CLK_IMO2X            (0x00u)\r
-#define CY_LIB_USB_CLK_IMO              (0x01u)\r
-#define CY_LIB_USB_CLK_PLL              (0x02u)\r
-#define CY_LIB_USB_CLK_DSI              (0x03u)\r
-\r
-\r
-/* CyUSB_PowerOnCheck() */\r
-#define CY_ACT_USB_ENABLED              (0x01u)\r
-#define CY_ALT_ACT_USB_ENABLED          (0x01u)\r
-\r
-\r
-/***************************************\r
-* Registers\r
-***************************************/\r
-\r
-\r
-/*******************************************************************************\r
-* System Registers\r
-*******************************************************************************/\r
-\r
-/* Software Reset Control Register */\r
-#define CY_LIB_RESET_CR2_REG         (* (reg8 *) CYREG_RESET_CR2)\r
-#define CY_LIB_RESET_CR2_PTR         (  (reg8 *) CYREG_RESET_CR2)\r
-\r
-/* Timewheel Configuration Register 0 */\r
-#define CY_LIB_PM_TW_CFG0_REG           (*(reg8 *) CYREG_PM_TW_CFG0)\r
-#define CY_LIB_PM_TW_CFG0_PTR           ( (reg8 *) CYREG_PM_TW_CFG0)\r
-\r
-/* Timewheel Configuration Register 2 */\r
-#define CY_LIB_PM_TW_CFG2_REG           (*(reg8 *) CYREG_PM_TW_CFG2)\r
-#define CY_LIB_PM_TW_CFG2_PTR           ( (reg8 *) CYREG_PM_TW_CFG2)\r
-\r
-/* USB Configuration Register */\r
-#define CY_LIB_CLKDIST_UCFG_REG         (*(reg8 *) CYREG_CLKDIST_UCFG)\r
-#define CY_LIB_CLKDIST_UCFG_PTR         ( (reg8 *) CYREG_CLKDIST_UCFG)\r
-\r
-/* Internal Main Oscillator Trim Register 1 */\r
-#define CY_LIB_IMO_TR1_REG              (*(reg8 *) CYREG_IMO_TR1)\r
-#define CY_LIB_IMO_TR1_PTR              ( (reg8 *) CYREG_IMO_TR1)\r
-\r
-/* USB control 1 Register */\r
-#define CY_LIB_USB_CR1_REG              (*(reg8 *) CYREG_USB_CR1 )\r
-#define CY_LIB_USB_CR1_PTR              ( (reg8 *) CYREG_USB_CR1 )\r
-\r
-/* Active Power Mode Configuration Register 0 */\r
-#define CY_LIB_PM_ACT_CFG0_REG          (*(reg8 *) CYREG_PM_ACT_CFG0)\r
-#define CY_LIB_PM_ACT_CFG0_PTR          ( (reg8 *) CYREG_PM_ACT_CFG0)\r
-\r
-/* Standby Power Mode Configuration Register 0 */\r
-#define CY_LIB_PM_STBY_CFG0_REG          (*(reg8 *) CYREG_PM_STBY_CFG0)\r
-#define CY_LIB_PM_STBY_CFG0_PTR          ( (reg8 *) CYREG_PM_STBY_CFG0)\r
-\r
-/* Active Power Mode Configuration Register 5 */\r
-#define CY_LIB_PM_ACT_CFG5_REG              (* (reg8 *) CYREG_PM_ACT_CFG5 )\r
-#define CY_LIB_PM_ACT_CFG5_PTR              (  (reg8 *) CYREG_PM_ACT_CFG5 )\r
-\r
-/* Standby Power Mode Configuration Register 5 */\r
-#define CY_LIB_PM_STBY_CFG5_REG             (* (reg8 *) CYREG_PM_STBY_CFG5 )\r
-#define CY_LIB_PM_STBY_CFG5_PTR             (  (reg8 *) CYREG_PM_STBY_CFG5 )\r
-\r
-/* CyIMO_SetTrimValue() */\r
-#if(CY_PSOC3)\r
-    #define CY_LIB_TRIM_IMO_3MHZ_PTR         ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_3MHZ)\r
-    #define CY_LIB_TRIM_IMO_6MHZ_PTR         ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_6MHZ)\r
-    #define CY_LIB_TRIM_IMO_12MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_12MHZ)\r
-    #define CY_LIB_TRIM_IMO_24MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_24MHZ)\r
-    #define CY_LIB_TRIM_IMO_67MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_67MHZ)\r
-    #define CY_LIB_TRIM_IMO_80MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_80MHZ)\r
-    #define CY_LIB_TRIM_IMO_USB_PTR          ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_USB)\r
-    #define CY_LIB_TRIM_IMO_TR1_PTR          ((void far *) (CYREG_FLSHID_MFG_CFG_IMO_TR1 + 1u))\r
- #else\r
-    #define CY_LIB_TRIM_IMO_3MHZ_PTR         ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_3MHZ)\r
-    #define CY_LIB_TRIM_IMO_6MHZ_PTR         ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_6MHZ)\r
-    #define CY_LIB_TRIM_IMO_12MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_12MHZ)\r
-    #define CY_LIB_TRIM_IMO_24MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_24MHZ)\r
-    #define CY_LIB_TRIM_IMO_67MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_67MHZ)\r
-    #define CY_LIB_TRIM_IMO_80MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_80MHZ)\r
-    #define CY_LIB_TRIM_IMO_USB_PTR          ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_USB)\r
-    #define CY_LIB_TRIM_IMO_TR1_PTR          ((reg8 *) (CYREG_FLSHID_MFG_CFG_IMO_TR1 + 1u))\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* PLL Registers\r
-*******************************************************************************/\r
-\r
-/* PLL Configuration Register 0 */\r
-#define CY_CLK_PLL_CFG0_REG         (*(reg8 *) CYREG_FASTCLK_PLL_CFG0)\r
-#define CY_CLK_PLL_CFG0_PTR         ( (reg8 *) CYREG_FASTCLK_PLL_CFG0)\r
-\r
-/* PLL Configuration Register 1 */\r
-#define CY_CLK_PLL_CFG1_REG         (*(reg8 *) CYREG_FASTCLK_PLL_CFG1)\r
-#define CY_CLK_PLL_CFG1_PTR         ( (reg8 *) CYREG_FASTCLK_PLL_CFG1)\r
-\r
-/* PLL Status Register */\r
-#define CY_CLK_PLL_SR_REG           (*(reg8 *) CYREG_FASTCLK_PLL_SR)\r
-#define CY_CLK_PLL_SR_PTR           ( (reg8 *) CYREG_FASTCLK_PLL_SR)\r
-\r
-/* PLL Q-Counter Configuration Register */\r
-#define CY_CLK_PLL_Q_REG            (*(reg8 *) CYREG_FASTCLK_PLL_Q)\r
-#define CY_CLK_PLL_Q_PTR            ( (reg8 *) CYREG_FASTCLK_PLL_Q)\r
-\r
-/* PLL P-Counter Configuration Register */\r
-#define CY_CLK_PLL_P_REG            (*(reg8 *) CYREG_FASTCLK_PLL_P)\r
-#define CY_CLK_PLL_P_PTR            ( (reg8 *) CYREG_FASTCLK_PLL_P)\r
-\r
-\r
-/*******************************************************************************\r
-* External MHz Crystal Oscillator Registers\r
-*******************************************************************************/\r
-\r
-/* External MHz Crystal Oscillator Status and Control Register */\r
-#define CY_CLK_XMHZ_CSR_REG         (*(reg8 *) CYREG_FASTCLK_XMHZ_CSR)\r
-#define CY_CLK_XMHZ_CSR_PTR         ( (reg8 *) CYREG_FASTCLK_XMHZ_CSR)\r
-\r
-/* External MHz Crystal Oscillator Configuration Register 0 */\r
-#define CY_CLK_XMHZ_CFG0_REG        (*(reg8 *) CYREG_FASTCLK_XMHZ_CFG0)\r
-#define CY_CLK_XMHZ_CFG0_PTR        ( (reg8 *) CYREG_FASTCLK_XMHZ_CFG0)\r
-\r
-/* External MHz Crystal Oscillator Configuration Register 1 */\r
-#define CY_CLK_XMHZ_CFG1_REG        (*(reg8 *) CYREG_FASTCLK_XMHZ_CFG1)\r
-#define CY_CLK_XMHZ_CFG1_PTR        ( (reg8 *) CYREG_FASTCLK_XMHZ_CFG1)\r
-\r
-\r
-/*******************************************************************************\r
-* External 32kHz Crystal Oscillator Registers\r
-*******************************************************************************/\r
-\r
-/* 32 kHz Watch Crystal Oscillator Trim Register */\r
-#define CY_CLK_XTAL32_TR_REG        (*(reg8 *) CYREG_X32_TR)\r
-#define CY_CLK_XTAL32_TR_PTR        ( (reg8 *) CYREG_X32_TR)\r
-\r
-/* External 32kHz Crystal Oscillator Test Register */\r
-#define CY_CLK_XTAL32_TST_REG       (*(reg8 *) CYREG_SLOWCLK_X32_TST)\r
-#define CY_CLK_XTAL32_TST_PTR       ( (reg8 *) CYREG_SLOWCLK_X32_TST)\r
-\r
-/* External 32kHz Crystal Oscillator Control Register */\r
-#define CY_CLK_XTAL32_CR_REG        (*(reg8 *) CYREG_SLOWCLK_X32_CR)\r
-#define CY_CLK_XTAL32_CR_PTR        ( (reg8 *) CYREG_SLOWCLK_X32_CR)\r
-\r
-/* External 32kHz Crystal Oscillator Configuration Register */\r
-#define CY_CLK_XTAL32_CFG_REG       (*(reg8 *) CYREG_SLOWCLK_X32_CFG)\r
-#define CY_CLK_XTAL32_CFG_PTR       ( (reg8 *) CYREG_SLOWCLK_X32_CFG)\r
-\r
-\r
-/*******************************************************************************\r
-* Watchdog Timer Registers\r
-*******************************************************************************/\r
-\r
-/* Watchdog Timer Configuration Register */\r
-#define CY_WDT_CFG_REG              (*(reg8 *) CYREG_PM_WDT_CFG)\r
-#define CY_WDT_CFG_PTR              ( (reg8 *) CYREG_PM_WDT_CFG)\r
-\r
-/* Watchdog Timer Control Register */\r
-#define CY_WDT_CR_REG               (*(reg8 *) CYREG_PM_WDT_CR)\r
-#define CY_WDT_CR_PTR               ( (reg8 *) CYREG_PM_WDT_CR)\r
-\r
-\r
-/*******************************************************************************\r
-*    LVI/HVI Registers\r
-*******************************************************************************/\r
-\r
-#define CY_VD_LVI_TRIP_REG          (* (reg8 *) CYREG_RESET_CR0)\r
-#define CY_VD_LVI_TRIP_PTR          (  (reg8 *) CYREG_RESET_CR0)\r
-\r
-#define CY_VD_LVI_HVI_CONTROL_REG   (* (reg8 *) CYREG_RESET_CR1)\r
-#define CY_VD_LVI_HVI_CONTROL_PTR   (  (reg8 *) CYREG_RESET_CR1)\r
-\r
-#define CY_VD_PRES_CONTROL_REG      (* (reg8 *) CYREG_RESET_CR3)\r
-#define CY_VD_PRES_CONTROL_PTR      (  (reg8 *) CYREG_RESET_CR3)\r
-\r
-#define CY_VD_PERSISTENT_STATUS_REG (* (reg8 *) CYREG_RESET_SR0)\r
-#define CY_VD_PERSISTENT_STATUS_PTR (  (reg8 *) CYREG_RESET_SR0)\r
-\r
-#define CY_VD_RT_STATUS_REG         (* (reg8 *) CYREG_RESET_SR2)\r
-#define CY_VD_RT_STATUS_PTR         (  (reg8 *) CYREG_RESET_SR2)\r
-\r
-\r
-/*******************************************************************************\r
-*    Variable VDDA\r
-*******************************************************************************/\r
-#if(CYDEV_VARIABLE_VDDA == 1)\r
-\r
-    /* Active Power Mode Configuration Register 9 */\r
-    #define CY_LIB_ACT_CFG9_REG            (* (reg8 *) CYREG_PM_ACT_CFG9 )\r
-    #define CY_LIB_ACT_CFG9_PTR            (  (reg8 *) CYREG_PM_ACT_CFG9 )\r
-\r
-    /* Switched Capacitor 0 Boost Clock Selection Register */\r
-    #define CY_LIB_SC0_BST_REG             (* (reg8 *) CYREG_SC0_BST )\r
-    #define CY_LIB_SC0_BST_PTR             (  (reg8 *) CYREG_SC0_BST )\r
-\r
-    /* Switched Capacitor 1 Boost Clock Selection Register */\r
-    #define CY_LIB_SC1_BST_REG             (* (reg8 *) CYREG_SC1_BST )\r
-    #define CY_LIB_SC1_BST_PTR             (  (reg8 *) CYREG_SC1_BST )\r
-\r
-    /* Switched Capacitor 2 Boost Clock Selection Register */\r
-    #define CY_LIB_SC2_BST_REG             (* (reg8 *) CYREG_SC2_BST )\r
-    #define CY_LIB_SC2_BST_PTR             (  (reg8 *) CYREG_SC2_BST )\r
-\r
-    /* Switched Capacitor 3 Boost Clock Selection Register */\r
-    #define CY_LIB_SC3_BST_REG             (* (reg8 *) CYREG_SC3_BST )\r
-    #define CY_LIB_SC3_BST_PTR             (  (reg8 *) CYREG_SC3_BST )\r
-\r
-    /* Switched Cap Miscellaneous Control Register */\r
-    #define CY_LIB_SC_MISC_REG             (* (reg8 *) CYREG_SC_MISC )\r
-    #define CY_LIB_SC_MISC_PTR             (  (reg8 *) CYREG_SC_MISC )\r
-\r
-#endif  /* (CYDEV_VARIABLE_VDDA == 1) */\r
-\r
-\r
-/*******************************************************************************\r
-*    Clock Distribution Registers\r
-*******************************************************************************/\r
-\r
-/* Analog Clock Mask Register */\r
-#define CY_LIB_CLKDIST_AMASK_REG       (* (reg8 *) CYREG_CLKDIST_AMASK )\r
-#define CY_LIB_CLKDIST_AMASK_PTR       (  (reg8 *) CYREG_CLKDIST_AMASK )\r
-\r
-/* Digital Clock Mask Register */\r
-#define CY_LIB_CLKDIST_DMASK_REG        (*(reg8 *) CYREG_CLKDIST_DMASK)\r
-#define CY_LIB_CLKDIST_DMASK_PTR        ( (reg8 *) CYREG_CLKDIST_DMASK)\r
-\r
-/* CLK_BUS Configuration Register */\r
-#define CY_LIB_CLKDIST_BCFG2_REG        (*(reg8 *) CYREG_CLKDIST_BCFG2)\r
-#define CY_LIB_CLKDIST_BCFG2_PTR        ( (reg8 *) CYREG_CLKDIST_BCFG2)\r
-\r
-/* LSB Shadow Divider Value Register */\r
-#define CY_LIB_CLKDIST_WRK_LSB_REG      (*(reg8 *) CYREG_CLKDIST_WRK0)\r
-#define CY_LIB_CLKDIST_WRK_LSB_PTR      ( (reg8 *) CYREG_CLKDIST_WRK0)\r
-\r
-/* MSB Shadow Divider Value Register */\r
-#define CY_LIB_CLKDIST_WRK_MSB_REG      (*(reg8 *) CYREG_CLKDIST_WRK1)\r
-#define CY_LIB_CLKDIST_WRK_MSB_PTR      ( (reg8 *) CYREG_CLKDIST_WRK1)\r
-\r
-/* LOAD Register */\r
-#define CY_LIB_CLKDIST_LD_REG           (*(reg8 *) CYREG_CLKDIST_LD)\r
-#define CY_LIB_CLKDIST_LD_PTR           ( (reg8 *) CYREG_CLKDIST_LD)\r
-\r
-/* CLK_BUS LSB Divider Value Register */\r
-#define CY_LIB_CLKDIST_BCFG_LSB_REG     (*(reg8 *) CYREG_CLKDIST_BCFG0)\r
-#define CY_LIB_CLKDIST_BCFG_LSB_PTR     ( (reg8 *) CYREG_CLKDIST_BCFG0)\r
-\r
-/* CLK_BUS MSB Divider Value Register */\r
-#define CY_LIB_CLKDIST_BCFG_MSB_REG     (*(reg8 *) CYREG_CLKDIST_BCFG1)\r
-#define CY_LIB_CLKDIST_BCFG_MSB_PTR     ( (reg8 *) CYREG_CLKDIST_BCFG1)\r
-\r
-/* Master clock (clk_sync_d) Divider Value Register */\r
-#define CY_LIB_CLKDIST_MSTR0_REG        (*(reg8 *) CYREG_CLKDIST_MSTR0)\r
-#define CY_LIB_CLKDIST_MSTR0_PTR        ( (reg8 *) CYREG_CLKDIST_MSTR0)\r
-\r
-/* Master (clk_sync_d) Configuration Register/CPU Divider Value */\r
-#define CY_LIB_CLKDIST_MSTR1_REG        (*(reg8 *) CYREG_CLKDIST_MSTR1)\r
-#define CY_LIB_CLKDIST_MSTR1_PTR        ( (reg8 *) CYREG_CLKDIST_MSTR1)\r
-\r
-/* Internal Main Oscillator Control Register */\r
-#define CY_LIB_FASTCLK_IMO_CR_REG       (*(reg8 *) CYREG_FASTCLK_IMO_CR)\r
-#define CY_LIB_FASTCLK_IMO_CR_PTR       ( (reg8 *) CYREG_FASTCLK_IMO_CR)\r
-\r
-/* Configuration Register CR */\r
-#define CY_LIB_CLKDIST_CR_REG           (*(reg8 *) CYREG_CLKDIST_CR)\r
-#define CY_LIB_CLKDIST_CR_PTR           ( (reg8 *) CYREG_CLKDIST_CR)\r
-\r
-/* Internal Low-speed Oscillator Control Register 0 */\r
-#define CY_LIB_SLOWCLK_ILO_CR0_REG      (*(reg8 *) CYREG_SLOWCLK_ILO_CR0)\r
-#define CY_LIB_SLOWCLK_ILO_CR0_PTR      ( (reg8 *) CYREG_SLOWCLK_ILO_CR0)\r
-\r
-\r
-/*******************************************************************************\r
-* Interrupt Registers\r
-*******************************************************************************/\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /* Interrupt Vector Table Offset */\r
-    #define CY_INT_VECT_TABLE           ((cyisraddress **) CYREG_NVIC_VECT_OFFSET)\r
-\r
-    /* Interrupt Priority 0-31 */\r
-    #define CY_INT_PRIORITY_REG         (* (reg8 *) CYREG_NVIC_PRI_0)\r
-    #define CY_INT_PRIORITY_PTR         (  (reg8 *) CYREG_NVIC_PRI_0)\r
-\r
-    /* Interrupt Enable Set 0-31 */\r
-    #define CY_INT_ENABLE_REG           (* (reg32 *) CYREG_NVIC_SETENA0)\r
-    #define CY_INT_ENABLE_PTR           (  (reg32 *) CYREG_NVIC_SETENA0)\r
-\r
-    /* Interrupt Enable Clear 0-31 */\r
-    #define CY_INT_CLEAR_REG            (* (reg32 *) CYREG_NVIC_CLRENA0)\r
-    #define CY_INT_CLEAR_PTR            (  (reg32 *) CYREG_NVIC_CLRENA0)\r
-\r
-    /* Interrupt Pending Set 0-31 */\r
-    #define CY_INT_SET_PEND_REG         (* (reg32 *) CYREG_NVIC_SETPEND0)\r
-    #define CY_INT_SET_PEND_PTR         (  (reg32 *) CYREG_NVIC_SETPEND0)\r
-\r
-    /* Interrupt Pending Clear 0-31 */\r
-    #define CY_INT_CLR_PEND_REG         (* (reg32 *) CYREG_NVIC_CLRPEND0)\r
-    #define CY_INT_CLR_PEND_PTR         (  (reg32 *) CYREG_NVIC_CLRPEND0)\r
-\r
-    /* Cache Control Register */\r
-    #define CY_CACHE_CONTROL_REG        (* (reg16 *) CYREG_CACHE_CC_CTL )\r
-    #define CY_CACHE_CONTROL_PTR        (  (reg16 *) CYREG_CACHE_CC_CTL )\r
-\r
-#elif (CY_PSOC3)\r
-\r
-    /* Interrupt Address Vector registers */\r
-    #define CY_INT_VECT_TABLE           ((cyisraddress CYXDATA *) CYREG_INTC_VECT_MBASE)\r
-\r
-    /* Interrrupt Controller Priority Registers */\r
-    #define CY_INT_PRIORITY_REG         (* (reg8 *) CYREG_INTC_PRIOR0)\r
-    #define CY_INT_PRIORITY_PTR         (  (reg8 *) CYREG_INTC_PRIOR0)\r
-\r
-    /* Interrrupt Controller Set Enable Registers */\r
-    #define CY_INT_ENABLE_REG           (* (reg8 *) CYREG_INTC_SET_EN0)\r
-    #define CY_INT_ENABLE_PTR           (  (reg8 *) CYREG_INTC_SET_EN0)\r
-\r
-    #define CY_INT_SET_EN0_REG          (* (reg8 *) CYREG_INTC_SET_EN0)\r
-    #define CY_INT_SET_EN0_PTR          (  (reg8 *) CYREG_INTC_SET_EN0)\r
-\r
-    #define CY_INT_SET_EN1_REG          (* (reg8 *) CYREG_INTC_SET_EN1)\r
-    #define CY_INT_SET_EN1_PTR          (  (reg8 *) CYREG_INTC_SET_EN1)\r
-\r
-    #define CY_INT_SET_EN2_REG          (* (reg8 *) CYREG_INTC_SET_EN2)\r
-    #define CY_INT_SET_EN2_PTR          (  (reg8 *) CYREG_INTC_SET_EN2)\r
-\r
-    #define CY_INT_SET_EN3_REG          (* (reg8 *) CYREG_INTC_SET_EN3)\r
-    #define CY_INT_SET_EN3_PTR          (  (reg8 *) CYREG_INTC_SET_EN3)\r
-\r
-    /* Interrrupt Controller Clear Enable Registers */\r
-    #define CY_INT_CLEAR_REG            (* (reg8 *) CYREG_INTC_CLR_EN0)\r
-    #define CY_INT_CLEAR_PTR            (  (reg8 *) CYREG_INTC_CLR_EN0)\r
-\r
-    #define CY_INT_CLR_EN0_REG          (* (reg8 *) CYREG_INTC_CLR_EN0)\r
-    #define CY_INT_CLR_EN0_PTR          (  (reg8 *) CYREG_INTC_CLR_EN0)\r
-\r
-    #define CY_INT_CLR_EN1_REG          (* (reg8 *) CYREG_INTC_CLR_EN1)\r
-    #define CY_INT_CLR_EN1_PTR          (  (reg8 *) CYREG_INTC_CLR_EN1)\r
-\r
-    #define CY_INT_CLR_EN2_REG          (* (reg8 *) CYREG_INTC_CLR_EN2)\r
-    #define CY_INT_CLR_EN2_PTR          (  (reg8 *) CYREG_INTC_CLR_EN2)\r
-\r
-    #define CY_INT_CLR_EN3_REG          (* (reg8 *) CYREG_INTC_CLR_EN3)\r
-    #define CY_INT_CLR_EN3_PTR          (  (reg8 *) CYREG_INTC_CLR_EN3)\r
-\r
-\r
-    /* Interrrupt Controller Set Pend Registers */\r
-    #define CY_INT_SET_PEND_REG         (* (reg8 *) CYREG_INTC_SET_PD0)\r
-    #define CY_INT_SET_PEND_PTR         (  (reg8 *) CYREG_INTC_SET_PD0)\r
-\r
-    /* Interrrupt Controller Clear Pend Registers */\r
-    #define CY_INT_CLR_PEND_REG         (* (reg8 *) CYREG_INTC_CLR_PD0)\r
-    #define CY_INT_CLR_PEND_PTR         (  (reg8 *) CYREG_INTC_CLR_PD0)\r
-\r
-\r
-    /* Access Interrupt Controller Registers based on interrupt number */\r
-    #define CY_INT_SET_EN_INDX_PTR(number)    ((reg8 *) (CYREG_INTC_SET_EN0 + (((number) & CY_INT_NUMBER_MASK) >> 3u)))\r
-    #define CY_INT_CLR_EN_INDX_PTR(number)    ((reg8 *) (CYREG_INTC_CLR_EN0 + (((number) & CY_INT_NUMBER_MASK) >> 3u)))\r
-    #define CY_INT_CLR_PEND_INDX_PTR(number)  ((reg8 *) (CYREG_INTC_CLR_PD0 + (((number) & CY_INT_NUMBER_MASK) >> 3u)))\r
-    #define CY_INT_SET_PEND_INDX_PTR(number)  ((reg8 *) (CYREG_INTC_SET_PD0 + (((number) & CY_INT_NUMBER_MASK) >> 3u)))\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyAssert\r
-********************************************************************************\r
-* Summary:\r
-*  Macro that evaluates the expression and if it is false (evaluates to 0) then\r
-*  the processor is halted.\r
-*\r
-*  This macro is evaluated unless NDEBUG is defined.\r
-*\r
-*  If NDEBUG is defined, then no code is generated for this macro. NDEBUG is\r
-*  defined by default for a Release build setting and not defined for a Debug\r
-*  build setting.\r
-*\r
-* Parameters:\r
-*  expr: Logical expression.  Asserts if false.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-#if !defined(NDEBUG)\r
-    #define CYASSERT(x)     { \\r
-                                if(!(x)) \\r
-                                { \\r
-                                    CyHalt((uint8) 0u); \\r
-                                } \\r
-                            }\r
-#else\r
-    #define CYASSERT(x)\r
-#endif /* !defined(NDEBUG) */\r
-\r
-\r
-/* Reset register fields of RESET_SR0 (CyResetStatus) */\r
-#define CY_RESET_LVID               (0x01u)\r
-#define CY_RESET_LVIA               (0x02u)\r
-#define CY_RESET_HVIA               (0x04u)\r
-#define CY_RESET_WD                 (0x08u)\r
-#define CY_RESET_SW                 (0x20u)\r
-#define CY_RESET_GPIO0              (0x40u)\r
-#define CY_RESET_GPIO1              (0x80u)\r
-\r
-\r
-/* Interrrupt Controller Configuration and Status Register */\r
-#if(CY_PSOC3)\r
-    #define INTERRUPT_CSR               ((reg8 *) CYREG_INTC_CSR_EN)\r
-    #define DISABLE_IRQ_SET             ((uint8)(0x01u << 1u))    /* INTC_CSR_EN */\r
-    #define INTERRUPT_DISABLE_IRQ       {*INTERRUPT_CSR |= DISABLE_IRQ_SET;}\r
-    #define INTERRUPT_ENABLE_IRQ        {*INTERRUPT_CSR = (uint8)(~DISABLE_IRQ_SET);}\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-#if defined(__ARMCC_VERSION)\r
-    #define CyGlobalIntEnable           {__enable_irq();}\r
-    #define CyGlobalIntDisable          {__disable_irq();}\r
-#elif defined(__GNUC__) || defined (__ICCARM__)\r
-    #define CyGlobalIntEnable           {__asm("CPSIE   i");}\r
-    #define CyGlobalIntDisable          {__asm("CPSID   i");}\r
-#elif defined(__C51__)\r
-    #define CyGlobalIntEnable           {\\r
-                                            EA = 1u; \\r
-                                            INTERRUPT_ENABLE_IRQ\\r
-                                        }\r
-\r
-    #define CyGlobalIntDisable          {\\r
-                                            INTERRUPT_DISABLE_IRQ; \\r
-                                            CY_NOP; \\r
-                                            EA = 0u;\\r
-                                        }\r
-#else\r
-    #error No compiler toolchain defined\r
-    #define CyGlobalIntEnable\r
-    #define CyGlobalIntDisable\r
-#endif  /* (__ARMCC_VERSION) */\r
-\r
-\r
-#ifdef CYREG_MLOGIC_CPU_SCR_CPU_SCR\r
-    #define CYDEV_HALT_CPU      CY_SET_REG8(CYREG_MLOGIC_CPU_SCR_CPU_SCR, 0x01u)\r
-#else\r
-    #define CYDEV_HALT_CPU      CY_SET_REG8(CYREG_MLOGIC_CPU_SCR, 0x01u)\r
-#endif  /* (CYREG_MLOGIC_CPU_SCR_CPU_SCR) */\r
-\r
-\r
-#ifdef CYREG_MLOGIC_REV_ID_REV_ID\r
-    #define CYDEV_CHIP_REV_ACTUAL       (CY_GET_REG8(CYREG_MLOGIC_REV_ID_REV_ID))\r
-#else\r
-    #define CYDEV_CHIP_REV_ACTUAL       (CY_GET_REG8(CYREG_MLOGIC_REV_ID))\r
-#endif  /* (CYREG_MLOGIC_REV_ID_REV_ID) */\r
-\r
-\r
-/*******************************************************************************\r
-* System API constants\r
-*******************************************************************************/\r
-#define CY_CACHE_CONTROL_FLUSH          (0x0004u)\r
-#define CY_LIB_RESET_CR2_RESET          (0x01u)\r
-\r
-\r
-/*******************************************************************************\r
-* Interrupt API constants\r
-*******************************************************************************/\r
-#if(CY_PSOC5)\r
-\r
-    #define CY_INT_IRQ_BASE             (16u)\r
-\r
-#elif (CY_PSOC3)\r
-\r
-    #define CY_INT_IRQ_BASE             (0u)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-/* Valid range of interrupt 0-31 */\r
-#define CY_INT_NUMBER_MAX               (31u)\r
-\r
-/* Valid range of system interrupt 0-15 */\r
-#define CY_INT_SYS_NUMBER_MAX           (15u)\r
-\r
-/* Valid range of system priority 0-7 */\r
-#define CY_INT_PRIORITY_MAX             (7u)\r
-\r
-/* Mask to get valid range of interrupt 0-31 */\r
-#define CY_INT_NUMBER_MASK              (0x1Fu)\r
-\r
-/* Mask to get valid range of system priority 0-7 */\r
-#define CY_INT_PRIORITY_MASK            (0x7u)\r
-\r
-/* Mask to get valid range of system interrupt 0-15 */\r
-#define CY_INT_SYS_NUMBER_MASK          (0xFu)\r
-\r
-\r
-/*******************************************************************************\r
-* Interrupt Macros\r
-*******************************************************************************/\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntEnable\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Enables the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntEnable(number)     CY_SET_REG32(CY_INT_ENABLE_PTR, ((uint32)((uint32)1u << (0x1Fu & (number)))))\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntDisable\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Disables the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntDisable(number)     CY_SET_REG32(CY_INT_CLEAR_PTR, ((uint32)((uint32)1u << (0x1Fu & (number)))))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntSetPending\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *   Forces the specified interrupt number to be pending.\r
-    *\r
-    * Parameters:\r
-    *   number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntSetPending(number)     CY_SET_REG32(CY_INT_SET_PEND_PTR, ((uint32)((uint32)1u << (0x1Fu & (number)))))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntClearPending\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *   Clears any pending interrupt for the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *   number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntClearPending(number)   CY_SET_REG32(CY_INT_CLR_PEND_PTR, ((uint32)((uint32)1u << (0x1Fu & (number)))))\r
-\r
-\r
-#else   /* PSoC3 */\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntEnable\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Enables the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntEnable(number)   CY_SET_REG8(CY_INT_SET_EN_INDX_PTR((number)), \\r
-                                          ((uint8)(1u << (0x07u & (number)))))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntDisable\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Disables the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntDisable(number)   CY_SET_REG8(CY_INT_CLR_EN_INDX_PTR((number)), \\r
-                                          ((uint8)(1u << (0x07u & (number)))))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntSetPending\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Forces the specified interrupt number to be pending.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntSetPending(number)   CY_SET_REG8(CY_INT_SET_PEND_INDX_PTR((number)), \\r
-                                                  ((uint8)(1u << (0x07u & (number)))))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Macro Name: CyIntClearPending\r
-    ********************************************************************************\r
-    * Summary:\r
-    *  Clears any pending interrupt for the specified interrupt number.\r
-    *\r
-    * Parameters:\r
-    *  number: Valid range [0-31].  Interrupt number.\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    *******************************************************************************/\r
-    #define CyIntClearPending(number)   CY_SET_REG8(CY_INT_CLR_PEND_INDX_PTR((number)), \\r
-                                                    ((uint8)(1u << (0x07u & (number)))))\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used.\r
-*******************************************************************************/\r
-#define CYGlobalIntEnable       CyGlobalIntEnable\r
-#define CYGlobalIntDisable      CyGlobalIntDisable\r
-\r
-#define cymemset(s,c,n)         memset((s),(c),(n))\r
-#define cymemcpy(d,s,n)         memcpy((d),(s),(n))\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0\r
-*******************************************************************************/\r
-#define MFGCFG_X32_TR_PTR               (CY_CLK_XTAL32_TR_PTR)\r
-#define MFGCFG_X32_TR                   (CY_CLK_XTAL32_TR_REG)\r
-#define SLOWCLK_X32_TST_PTR             (CY_CLK_XTAL32_TST_PTR)\r
-#define SLOWCLK_X32_TST                 (CY_CLK_XTAL32_TST_REG)\r
-#define SLOWCLK_X32_CR_PTR              (CY_CLK_XTAL32_CR_PTR)\r
-#define SLOWCLK_X32_CR                  (CY_CLK_XTAL32_CR_REG)\r
-#define SLOWCLK_X32_CFG_PTR             (CY_CLK_XTAL32_CFG_PTR)\r
-#define SLOWCLK_X32_CFG                 (CY_CLK_XTAL32_CFG_REG)\r
-\r
-#define X32_CONTROL_ANA_STAT            (CY_CLK_XTAL32_CR_ANA_STAT)\r
-#define X32_CONTROL_DIG_STAT            (0x10u)\r
-#define X32_CONTROL_LPM                 (CY_CLK_XTAL32_CR_LPM)\r
-#define X32_CONTROL_LPM_POSITION        (1u)\r
-#define X32_CONTROL_X32EN               (CY_CLK_XTAL32_CR_EN)\r
-#define X32_CONTROL_PDBEN           (CY_CLK_XTAL32_CR_PDBEN)\r
-#define X32_TR_DPMODE                   (CY_CLK_XTAL32_TR_STARTUP)\r
-#define X32_TR_CLEAR                    (CY_CLK_XTAL32_TR_POWERDOWN)\r
-#define X32_TR_HPMODE                   (CY_CLK_XTAL32_TR_HIGH_POWER)\r
-#define X32_TR_LPMODE                   (CY_CLK_XTAL32_TR_LOW_POWER)\r
-#define X32_TST_SETALL                  (CY_CLK_XTAL32_TST_DEFAULT)\r
-#define X32_CFG_LP_BITS_MASK            (CY_CLK_XTAL32_CFG_LP_MASK)\r
-#define X32_CFG_LP_DEFAULT              (CY_CLK_XTAL32_CFG_LP_DEFAULT)\r
-#define X32_CFG_LOWPOWERMODE            (0x80u)\r
-#define X32_CFG_LP_LOWPOWER             (0x8u)\r
-#define CY_X32_HIGHPOWER_MODE           (0u)\r
-#define CY_X32_LOWPOWER_MODE            (1u)\r
-#define CY_XTAL32K_DIG_STAT             (0x10u)\r
-#define CY_XTAL32K_STAT_FIELDS          (0x30u)\r
-#define CY_XTAL32K_DIG_STAT_UNSTABLE    (0u)\r
-#define CY_XTAL32K_ANA_STAT_UNSTABLE    (0x0u)\r
-#define CY_XTAL32K_STATUS               (0x20u)\r
-\r
-#define FASTCLK_XMHZ_CSR_PTR            (CY_CLK_XMHZ_CSR_PTR)\r
-#define FASTCLK_XMHZ_CSR                (CY_CLK_XMHZ_CSR_REG)\r
-#define FASTCLK_XMHZ_CFG0_PTR           (CY_CLK_XMHZ_CFG0_PTR)\r
-#define FASTCLK_XMHZ_CFG0               (CY_CLK_XMHZ_CFG0_REG)\r
-#define FASTCLK_XMHZ_CFG1_PTR           (CY_CLK_XMHZ_CFG1_PTR)\r
-#define FASTCLK_XMHZ_CFG1               (CY_CLK_XMHZ_CFG1_REG)\r
-#define FASTCLK_XMHZ_GAINMASK           (CY_CLK_XMHZ_CFG0_XCFG_MASK)\r
-#define FASTCLK_XMHZ_VREFMASK           (CY_CLK_XMHZ_CFG1_VREF_FB_MASK)\r
-#define FASTCLK_XMHZ_VREF_WD_MASK       (CY_CLK_XMHZ_CFG1_VREF_WD_MASK)\r
-#define XMHZ_CONTROL_ENABLE             (CY_CLK_XMHZ_CSR_ENABLE)\r
-#define X32_CONTROL_XERR_MASK           (CY_CLK_XMHZ_CSR_XERR)\r
-#define X32_CONTROL_XERR_DIS            (CY_CLK_XMHZ_CSR_XFB)\r
-#define X32_CONTROL_XERR_POSITION       (7u)\r
-#define X32_CONTROL_FAULT_RECOVER       (CY_CLK_XMHZ_CSR_XPROT)\r
-\r
-#define CYWDT_CFG                       (CY_WDT_CFG_PTR)\r
-#define CYWDT_CR                        (CY_WDT_CR_PTR)\r
-\r
-#define CYWDT_TICKS_MASK                (CY_WDT_CFG_INTERVAL_MASK)\r
-#define CYWDT_RESET                     (CY_WDT_CFG_CTW_RESET)\r
-#define CYWDT_LPMODE_SHIFT              (CY_WDT_CFG_LPMODE_SHIFT)\r
-#define CYWDT_LPMODE_MASK               (CY_WDT_CFG_LPMODE_MASK)\r
-#define CYWDT_ENABLE_BIT                (CY_WDT_CFG_WDR_EN)\r
-\r
-#define FASTCLK_PLL_CFG0_PTR            (CY_CLK_PLL_CFG0_PTR)\r
-#define FASTCLK_PLL_CFG0                (CY_CLK_PLL_CFG0_REG)\r
-#define FASTCLK_PLL_SR_PTR              (CY_CLK_PLL_SR_PTR)\r
-#define FASTCLK_PLL_SR                  (CY_CLK_PLL_SR_REG)\r
-\r
-#define MAX_FASTCLK_PLL_Q_VALUE         (CY_CLK_PLL_MAX_Q_VALUE)\r
-#define MIN_FASTCLK_PLL_Q_VALUE         (CY_CLK_PLL_MIN_Q_VALUE)\r
-#define MIN_FASTCLK_PLL_P_VALUE         (CY_CLK_PLL_MIN_P_VALUE)\r
-#define MIN_FASTCLK_PLL_CUR_VALUE       (CY_CLK_PLL_MIN_CUR_VALUE)\r
-#define MAX_FASTCLK_PLL_CUR_VALUE       (CY_CLK_PLL_MAX_CUR_VALUE)\r
-\r
-#define PLL_CONTROL_ENABLE              (CY_CLK_PLL_ENABLE)\r
-#define PLL_STATUS_LOCK                 (CY_CLK_PLL_LOCK_STATUS)\r
-#define PLL_STATUS_ENABLED              (CY_CLK_PLL_ENABLE)\r
-#define PLL_CURRENT_POSITION            (CY_CLK_PLL_CURRENT_POSITION)\r
-#define PLL_VCO_GAIN_2                  (2u)\r
-\r
-#define FASTCLK_PLL_Q_PTR              (CY_CLK_PLL_Q_PTR)\r
-#define FASTCLK_PLL_Q                  (CY_CLK_PLL_Q_REG)\r
-#define FASTCLK_PLL_P_PTR              (CY_CLK_PLL_P_PTR)\r
-#define FASTCLK_PLL_P                  (CY_CLK_PLL_P_REG)\r
-#define FASTCLK_PLL_CFG1_PTR           (CY_CLK_PLL_CFG1_REG)\r
-#define FASTCLK_PLL_CFG1               (CY_CLK_PLL_CFG1_REG)\r
-\r
-#define CY_VD_PRESISTENT_STATUS_REG    (CY_VD_PERSISTENT_STATUS_REG)\r
-#define CY_VD_PRESISTENT_STATUS_PTR    (CY_VD_PERSISTENT_STATUS_PTR)\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.20\r
-*******************************************************************************/\r
-\r
-#if(CY_PSOC5)\r
-\r
-    #define CYINT_IRQ_BASE      (CY_INT_IRQ_BASE)\r
-\r
-    #define CYINT_VECT_TABLE    (CY_INT_VECT_TABLE)\r
-    #define CYINT_PRIORITY      (CY_INT_PRIORITY_PTR)\r
-    #define CYINT_ENABLE        (CY_INT_ENABLE_PTR)\r
-    #define CYINT_CLEAR         (CY_INT_CLEAR_PTR)\r
-    #define CYINT_SET_PEND      (CY_INT_SET_PEND_PTR)\r
-    #define CYINT_CLR_PEND      (CY_INT_CLR_PEND_PTR)\r
-    #define CACHE_CC_CTL        (CY_CACHE_CONTROL_PTR)\r
-\r
-#elif (CY_PSOC3)\r
-\r
-    #define CYINT_IRQ_BASE      (CY_INT_IRQ_BASE)\r
-\r
-    #define CYINT_VECT_TABLE    (CY_INT_VECT_TABLE)\r
-    #define CYINT_PRIORITY      (CY_INT_PRIORITY_PTR)\r
-    #define CYINT_ENABLE        (CY_INT_ENABLE_PTR)\r
-    #define CYINT_CLEAR         (CY_INT_CLEAR_PTR)\r
-    #define CYINT_SET_PEND      (CY_INT_SET_PEND_PTR)\r
-    #define CYINT_CLR_PEND      (CY_INT_CLR_PEND_PTR)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30\r
-*******************************************************************************/\r
-#define BUS_AMASK_CLEAR                 (0xF0u)\r
-#define BUS_DMASK_CLEAR                 (0x00u)\r
-#define CLKDIST_LD_LOAD_SET             (0x01u)\r
-#define CLKDIST_WRK0_MASK_SET           (0x80u) /* Enable shadow loads */\r
-#define MASTERCLK_DIVIDER_VALUE         (7u)\r
-#define CLKDIST_BCFG2_SSS_SET           (0x40u) /* Sync source is same frequency */\r
-#define MASTER_CLK_SRC_CLEAR            (0xFCu)\r
-#define IMO_DOUBLER_ENABLE              (0x10u)\r
-#define CLOCK_IMO_IMO                   (0x20u)\r
-#define CLOCK_IMO2X_XTAL                (0x40u)\r
-#define CLOCK_IMO_RANGE_CLEAR           (0xF8u)\r
-#define CLOCK_CONTROL_DIST_MASK         (0xFCu)\r
-\r
-\r
-#define CLKDIST_AMASK                  (*(reg8 *) CYREG_CLKDIST_AMASK)\r
-#define CLKDIST_AMASK_PTR              ( (reg8 *) CYREG_CLKDIST_AMASK)\r
-#define CLKDIST_DMASK_PTR              ( (reg8 *) CYREG_CLKDIST_DMASK)\r
-#define CLKDIST_DMASK                  (*(reg8 *) CYREG_CLKDIST_DMASK)\r
-#define CLKDIST_BCFG2_PTR              ( (reg8 *) CYREG_CLKDIST_BCFG2)\r
-#define CLKDIST_BCFG2                  (*(reg8 *) CYREG_CLKDIST_BCFG2)\r
-#define CLKDIST_WRK0_PTR               ( (reg8 *) CYREG_CLKDIST_WRK0)\r
-#define CLKDIST_WRK0                   (*(reg8 *) CYREG_CLKDIST_WRK0)\r
-#define CLKDIST_LD_PTR                 ( (reg8 *) CYREG_CLKDIST_LD)\r
-#define CLKDIST_LD                     (*(reg8 *) CYREG_CLKDIST_LD)\r
-#define CLKDIST_BCFG0_PTR              ( (reg8 *) CYREG_CLKDIST_BCFG0)\r
-#define CLKDIST_BCFG0                  (*(reg8 *) CYREG_CLKDIST_BCFG0)\r
-#define CLKDIST_MSTR0_PTR              ( (reg8 *) CYREG_CLKDIST_MSTR0)\r
-#define CLKDIST_MSTR0                  (*(reg8 *) CYREG_CLKDIST_MSTR0)\r
-#define FASTCLK_IMO_CR_PTR             ( (reg8 *) CYREG_FASTCLK_IMO_CR)\r
-#define FASTCLK_IMO_CR                 (*(reg8 *) CYREG_FASTCLK_IMO_CR)\r
-#define CLKDIST_CR_PTR                 ( (reg8 *) CYREG_CLKDIST_CR)\r
-#define CLKDIST_CR                     (*(reg8 *) CYREG_CLKDIST_CR)\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.50\r
-*******************************************************************************/\r
-#define IMO_PM_ENABLE                   (0x10u)\r
-#define PM_ACT_CFG0_PTR                ( (reg8 *) CYREG_PM_ACT_CFG0)\r
-#define PM_ACT_CFG0                    (*(reg8 *) CYREG_PM_ACT_CFG0)\r
-#define SLOWCLK_ILO_CR0_PTR            ( (reg8 *) CYREG_SLOWCLK_ILO_CR0)\r
-#define SLOWCLK_ILO_CR0                (*(reg8 *) CYREG_SLOWCLK_ILO_CR0)\r
-#define ILO_CONTROL_PD_MODE             (0x10u)\r
-#define ILO_CONTROL_PD_POSITION         (4u)\r
-#define ILO_CONTROL_1KHZ_ON             (0x02u)\r
-#define ILO_CONTROL_100KHZ_ON           (0x04u)\r
-#define ILO_CONTROL_33KHZ_ON            (0x20u)\r
-#define PM_TW_CFG0_PTR                 ( (reg8 *) CYREG_PM_TW_CFG0)\r
-#define PM_TW_CFG0                     (*(reg8 *) CYREG_PM_TW_CFG0)\r
-#define PM_TW_CFG2_PTR                 ( (reg8 *) CYREG_PM_TW_CFG2)\r
-#define PM_TW_CFG2                     (*(reg8 *) CYREG_PM_TW_CFG2)\r
-#define RESET_CR2               ((reg8 *) CYREG_RESET_CR2)\r
-#define FASTCLK_IMO_USBCLK_ON_SET       (0x40u)\r
-#define CLOCK_IMO_3MHZ_VALUE            (0x03u)\r
-#define CLOCK_IMO_6MHZ_VALUE            (0x01u)\r
-#define CLOCK_IMO_12MHZ_VALUE           (0x00u)\r
-#define CLOCK_IMO_24MHZ_VALUE           (0x02u)\r
-#define CLOCK_IMO_48MHZ_VALUE           (0x04u)\r
-#define CLOCK_IMO_62MHZ_VALUE           (0x05u)\r
-#define CLOCK_IMO_74MHZ_VALUE           (0x06u)\r
-#define CLKDIST_DIV_POSITION            (4u)\r
-#define CLKDIST_MSTR1_DIV_CLEAR         (0x0Fu)\r
-#define SFR_USER_CPUCLK_DIV_MASK        (0x0Fu)\r
-#define CLOCK_USB_ENABLE                (0x02u)\r
-#define CLOCK_IMO_OUT_X2                (0x10u)\r
-#define CLOCK_IMO_OUT_X1                ((uint8)(~CLOCK_IMO_OUT_X2))\r
-#define CLOCK_IMO2X_ECO                 ((uint8)(~CLOCK_IMO2X_DSI))\r
-#define USB_CLKDIST_CONFIG_MASK         (0x03u)\r
-#define USB_CLK_IMO2X                   (0x00u)\r
-#define USB_CLK_IMO                     (0x01u)\r
-#define USB_CLK_PLL                     (0x02u)\r
-#define USB_CLK_DSI                     (0x03u)\r
-#define USB_CLK_DIV2_ON                 (0x04u)\r
-#define USB_CLK_STOP_FLAG               (0x00u)\r
-#define USB_CLK_START_FLAG              (0x01u)\r
-#define FTW_CLEAR_ALL_BITS              (0x00u)\r
-#define FTW_CLEAR_FTW_BITS              (0xFCu)\r
-#define FTW_ENABLE                      (0x01u)\r
-#define PM_STBY_CFG0_PTR               ( (reg8 *) CYREG_PM_STBY_CFG0)\r
-#define PM_STBY_CFG0                   (*(reg8 *) CYREG_PM_STBY_CFG0)\r
-#define PM_AVAIL_CR2_PTR               ( (reg8 *) CYREG_PM_AVAIL_CR2)\r
-#define PM_AVAIL_CR2                   (*(reg8 *) CYREG_PM_AVAIL_CR2)\r
-#define CLKDIST_UCFG_PTR               ( (reg8 *) CYREG_CLKDIST_UCFG)\r
-#define CLKDIST_UCFG                   (*(reg8 *) CYREG_CLKDIST_UCFG)\r
-#define CLKDIST_MSTR1_PTR              ( (reg8 *) CYREG_CLKDIST_MSTR1)\r
-#define CLKDIST_MSTR1                  (*(reg8 *) CYREG_CLKDIST_MSTR1)\r
-#define SFR_USER_CPUCLK_DIV_PTR        ((void far *) CYREG_SFR_USER_CPUCLK_DIV)\r
-#define IMO_TR1_PTR                    ( (reg8 *) CYREG_IMO_TR1)\r
-#define IMO_TR1                        (*(reg8 *) CYREG_IMO_TR1)\r
-#define CLOCK_CONTROL                  ( (reg8 *) CYREG_CLKDIST_CR)\r
-#define CY_USB_CR1_PTR                 ( (reg8 *) CYREG_USB_CR1 )\r
-#define CY_USB_CR1                     (*(reg8 *) CYREG_USB_CR1 )\r
-#define USB_CLKDIST_CONFIG_PTR         ( (reg8 *) CYREG_CLKDIST_UCFG)\r
-#define USB_CLKDIST_CONFIG             (*(reg8 *) CYREG_CLKDIST_UCFG)\r
-#define CY_PM_ACT_CFG5_REG              (* (reg8 *) CYREG_PM_ACT_CFG5 )\r
-#define CY_PM_ACT_CFG5_PTR              (  (reg8 *) CYREG_PM_ACT_CFG5 )\r
-#define CY_PM_STBY_CFG5_REG             (* (reg8 *) CYREG_PM_STBY_CFG5 )\r
-#define CY_PM_STBY_CFG5_PTR             (  (reg8 *) CYREG_PM_STBY_CFG5 )\r
-#if(CY_PSOC3)\r
-    #define FLSHID_CUST_TABLES_IMO_3MHZ_PTR         ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_3MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_6MHZ_PTR         ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_6MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_12MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_12MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_24MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_24MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_67MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_67MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_80MHZ_PTR        ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_80MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_USB_PTR          ((void far *) CYREG_FLSHID_CUST_TABLES_IMO_USB)\r
-    #define FLSHID_MFG_CFG_IMO_TR1_PTR              ((void far *) (CYREG_FLSHID_MFG_CFG_IMO_TR1 + 1u))\r
- #else\r
-    #define FLSHID_CUST_TABLES_IMO_3MHZ_PTR         ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_3MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_6MHZ_PTR         ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_6MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_12MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_12MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_24MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_24MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_67MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_67MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_80MHZ_PTR        ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_80MHZ)\r
-    #define FLSHID_CUST_TABLES_IMO_USB_PTR          ((reg8 *) CYREG_FLSHID_CUST_TABLES_IMO_USB)\r
-    #define FLSHID_MFG_CFG_IMO_TR1_PTR              ((reg8 *) (CYREG_FLSHID_MFG_CFG_IMO_TR1 + 1u))\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-#endif  /* (CY_BOOT_CYLIB_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.c
deleted file mode 100755 (executable)
index 0d2b930..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.c
+++ /dev/null
@@ -1,554 +0,0 @@
-/*******************************************************************************\r
-* File Name: CySpc.c\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides an API for the System Performance Component.\r
-*   The SPC functions are not meant to be called directly by the user\r
-*   application.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "CySpc.h"\r
-\r
-#define CY_SPC_KEY_ONE                      (0xB6u)\r
-#define CY_SPC_KEY_TWO(x)                   ((uint8) (((uint16) 0xD3u) + ((uint16) (x))))\r
-\r
-/* Command Codes */\r
-#define CY_SPC_CMD_LD_BYTE                  (0x00u)\r
-#define CY_SPC_CMD_LD_MULTI_BYTE            (0x01u)\r
-#define CY_SPC_CMD_LD_ROW                   (0x02u)\r
-#define CY_SPC_CMD_RD_BYTE                  (0x03u)\r
-#define CY_SPC_CMD_RD_MULTI_BYTE            (0x04u)\r
-#define CY_SPC_CMD_WR_ROW                   (0x05u)\r
-#define CY_SPC_CMD_WR_USER_NVL              (0x06u)\r
-#define CY_SPC_CMD_PRG_ROW                  (0x07u)\r
-#define CY_SPC_CMD_ER_SECTOR                (0x08u)\r
-#define CY_SPC_CMD_ER_ALL                   (0x09u)\r
-#define CY_SPC_CMD_RD_HIDDEN                (0x0Au)\r
-#define CY_SPC_CMD_PRG_PROTECT              (0x0Bu)\r
-#define CY_SPC_CMD_CHECKSUM                 (0x0Cu)\r
-#define CY_SPC_CMD_DWNLD_ALGORITHM          (0x0Du)\r
-#define CY_SPC_CMD_GET_TEMP                 (0x0Eu)\r
-#define CY_SPC_CMD_GET_ADC                  (0x0Fu)\r
-#define CY_SPC_CMD_RD_NVL_VOLATILE          (0x10u)\r
-#define CY_SPC_CMD_SETUP_TS                 (0x11u)\r
-#define CY_SPC_CMD_DISABLE_TS               (0x12u)\r
-#define CY_SPC_CMD_ER_ROW                   (0x13u)\r
-\r
-/* Enable bit in Active and Alternate Active mode templates */\r
-#define PM_SPC_PM_EN                        (0x08u)\r
-\r
-/* Gate calls to the SPC. */\r
-uint8 SpcLockState = CY_SPC_UNLOCKED;\r
-\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /***************************************************************************\r
-    * The wait-state pipeline must be enabled prior to accessing the SPC\r
-    * register interface regardless of CPU frequency. The CySpcLock() saves\r
-    * current wait-state pipeline state and enables it. The CySpcUnlock()\r
-    * function, which must be called after SPC transaction, restores original\r
-    * state.\r
-    ***************************************************************************/\r
-    static uint32 spcWaitPipeBypass = 0u;\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcStart\r
-********************************************************************************\r
-* Summary:\r
-*  Starts the SPC.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CySpcStart(void) \r
-{\r
-    /* Save current global interrupt enable and disable it */\r
-    uint8 interruptState = CyEnterCriticalSection();\r
-\r
-    CY_SPC_PM_ACT_REG  |= PM_SPC_PM_EN;\r
-    CY_SPC_PM_STBY_REG |= PM_SPC_PM_EN;\r
-\r
-    /* Restore global interrupt enable state */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcStop\r
-********************************************************************************\r
-* Summary:\r
-*  Stops the SPC.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CySpcStop(void) \r
-{\r
-    /* Save current global interrupt enable and disable it */\r
-    uint8 interruptState = CyEnterCriticalSection();\r
-\r
-    CY_SPC_PM_ACT_REG  &= ((uint8)(~PM_SPC_PM_EN));\r
-    CY_SPC_PM_STBY_REG &= ((uint8)(~PM_SPC_PM_EN));\r
-\r
-    /* Restore global interrupt enable state */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcReadData\r
-********************************************************************************\r
-* Summary:\r
-*  Reads data from the SPC.\r
-*\r
-* Parameters:\r
-*  uint8 buffer:\r
-*   Address to store data read.\r
-*\r
-*  uint8 size:\r
-*   Number of bytes to read from the SPC.\r
-*\r
-* Return:\r
-*  uint8:\r
-*   The number of bytes read from the SPC.\r
-*\r
-*******************************************************************************/\r
-uint8 CySpcReadData(uint8 buffer[], uint8 size) \r
-{\r
-    uint8 i;\r
-\r
-    for(i = 0u; i < size; i++)\r
-    {\r
-        while(!CY_SPC_DATA_READY)\r
-        {\r
-            CyDelayUs(1u);\r
-        }\r
-        buffer[i] = CY_SPC_CPU_DATA_REG;\r
-    }\r
-\r
-    return(i);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcLoadMultiByte\r
-********************************************************************************\r
-* Summary:\r
-*  Loads 1 to 32 bytes of data into the row latch of a Flash/EEPROM array.\r
-*\r
-* Parameters:\r
-*  uint8 array:\r
-*   Id of the array.\r
-*\r
-*  uint16 address:\r
-*   Flash/eeprom addrress\r
-*\r
-*  uint8* buffer:\r
-*   Data to load to the row latch\r
-*\r
-*  uint16 number:\r
-*   Number bytes to load.\r
-*\r
-* Return:\r
-*  CYRET_STARTED\r
-*  CYRET_CANCELED\r
-*  CYRET_LOCKED\r
-*  CYRET_BAD_PARAM\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], uint8 size)\\r
-\r
-{\r
-    cystatus status = CYRET_STARTED;\r
-    uint8 i;\r
-\r
-    /***************************************************************************\r
-    * Check if number is correct for array. Number must be less than\r
-    * 32 for Flash or less than 16 for EEPROM.\r
-    ***************************************************************************/\r
-    if(((array < CY_SPC_LAST_FLASH_ARRAYID) && (size < 32u)) ||\r
-       ((array > CY_SPC_LAST_FLASH_ARRAYID) && (size < 16u)))\r
-    {\r
-        if(CY_SPC_IDLE)\r
-        {\r
-            CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
-            CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_MULTI_BYTE);\r
-            CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_MULTI_BYTE;\r
-\r
-            if(CY_SPC_BUSY)\r
-            {\r
-                CY_SPC_CPU_DATA_REG = array;\r
-                CY_SPC_CPU_DATA_REG = 1u & HI8(address);\r
-                CY_SPC_CPU_DATA_REG = LO8(address);\r
-                CY_SPC_CPU_DATA_REG = ((uint8)(size - 1u));\r
-\r
-                for(i = 0u; i < size; i++)\r
-                {\r
-                    CY_SPC_CPU_DATA_REG = buffer[i];\r
-                }\r
-            }\r
-            else\r
-            {\r
-                status = CYRET_CANCELED;\r
-            }\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_LOCKED;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_BAD_PARAM;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcLoadRow\r
-********************************************************************************\r
-* Summary:\r
-*  Loads a row of data into the row latch of a Flash/EEPROM array.\r
-*\r
-* Parameters:\r
-*  uint8 array:\r
-*   Id of the array.\r
-*\r
-*  uint8* buffer:\r
-*   Data to be loaded to the row latch\r
-*\r
-*  uint8 size:\r
-*   The number of data bytes that the SPC expects to be written. Depends on the\r
-*   type of the array and, if the array is Flash, whether ECC is being enabled\r
-*   or not. There are following values: flash row latch size with ECC enabled,\r
-*   flash row latch size with ECC disabled and EEPROM row latch size.\r
-*\r
-* Return:\r
-*  CYRET_STARTED\r
-*  CYRET_CANCELED\r
-*  CYRET_LOCKED\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size)\r
-{\r
-    cystatus status = CYRET_STARTED;\r
-    uint16 i;\r
-\r
-    /* Make sure the SPC is ready to accept command */\r
-    if(CY_SPC_IDLE)\r
-    {\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_LD_ROW);\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_LD_ROW;\r
-\r
-        /* Make sure the command was accepted */\r
-        if(CY_SPC_BUSY)\r
-        {\r
-            CY_SPC_CPU_DATA_REG = array;\r
-\r
-            for(i = 0u; i < size; i++)\r
-            {\r
-                CY_SPC_CPU_DATA_REG = buffer[i];\r
-            }\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_CANCELED;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcWriteRow\r
-********************************************************************************\r
-* Summary:\r
-*  Erases then programs a row in Flash/EEPROM with data in row latch.\r
-*\r
-* Parameters:\r
-*  uint8 array:\r
-*   Id of the array.\r
-*\r
-*  uint16 address:\r
-*   flash/eeprom addrress\r
-*\r
-*  uint8 tempPolarity:\r
-*   temperature polarity.\r
-*   1: the Temp Magnitude is interpreted as a positive value\r
-*   0: the Temp Magnitude is interpreted as a negative value\r
-*\r
-*  uint8 tempMagnitude:\r
-*   temperature magnitude.\r
-*\r
-* Return:\r
-*  CYRET_STARTED\r
-*  CYRET_CANCELED\r
-*  CYRET_LOCKED\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcWriteRow(uint8 array, uint16 address, uint8 tempPolarity, uint8 tempMagnitude)\\r
-\r
-{\r
-    cystatus status = CYRET_STARTED;\r
-\r
-    /* Make sure the SPC is ready to accept command */\r
-    if(CY_SPC_IDLE)\r
-    {\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_WR_ROW);\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_WR_ROW;\r
-\r
-        /* Make sure the command was accepted */\r
-        if(CY_SPC_BUSY)\r
-        {\r
-            CY_SPC_CPU_DATA_REG = array;\r
-            CY_SPC_CPU_DATA_REG = HI8(address);\r
-            CY_SPC_CPU_DATA_REG = LO8(address);\r
-            CY_SPC_CPU_DATA_REG = tempPolarity;\r
-            CY_SPC_CPU_DATA_REG = tempMagnitude;\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_CANCELED;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcEraseSector\r
-********************************************************************************\r
-* Summary:\r
-*  Erases all data in the addressed sector (block of 64 rows).\r
-*\r
-* Parameters:\r
-*  uint8 array:\r
-*   Id of the array.\r
-*\r
-*  uint8 sectorNumber:\r
-*   Zero based sector number within Flash/EEPROM array\r
-*\r
-* Return:\r
-*  CYRET_STARTED\r
-*  CYRET_CANCELED\r
-*  CYRET_LOCKED\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcEraseSector(uint8 array, uint8 sectorNumber)\r
-{\r
-    cystatus status = CYRET_STARTED;\r
-\r
-    /* Make sure the SPC is ready to accept command */\r
-    if(CY_SPC_IDLE)\r
-    {\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_ER_SECTOR);\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_ER_SECTOR;\r
-\r
-        /* Make sure the command was accepted */\r
-        if(CY_SPC_BUSY)\r
-        {\r
-            CY_SPC_CPU_DATA_REG = array;\r
-            CY_SPC_CPU_DATA_REG = sectorNumber;\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_CANCELED;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcGetTemp\r
-********************************************************************************\r
-* Summary:\r
-*  Returns the internal die temperature\r
-*\r
-* Parameters:\r
-*  uint8 numSamples:\r
-*   Number of samples. Valid values are 1-5, resulting in 2 - 32 samples\r
-*   respectively.\r
-*\r
-* uint16 timerPeriod:\r
-*   Number of ADC ACLK cycles. A valid 14 bit value is accepted, higher 2 bits\r
-*   of 16 bit values are ignored.\r
-*\r
-* uint8 clkDivSelect:\r
-*   ADC ACLK clock divide value. Valid values are 2 - 225.\r
-*\r
-* Return:\r
-*  CYRET_STARTED\r
-*  CYRET_CANCELED\r
-*  CYRET_LOCKED\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcGetTemp(uint8 numSamples)\r
-{\r
-    cystatus status = CYRET_STARTED;\r
-\r
-    /* Make sure the SPC is ready to accept command */\r
-    if(CY_SPC_IDLE)\r
-    {\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_ONE;\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_KEY_TWO(CY_SPC_CMD_GET_TEMP);\r
-        CY_SPC_CPU_DATA_REG = CY_SPC_CMD_GET_TEMP;\r
-\r
-        /* Make sure the command was accepted */\r
-        if(CY_SPC_BUSY)\r
-        {\r
-            CY_SPC_CPU_DATA_REG = numSamples;\r
-        }\r
-        else\r
-        {\r
-            status = CYRET_CANCELED;\r
-        }\r
-    }\r
-    else\r
-    {\r
-        status = CYRET_LOCKED;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcLock\r
-********************************************************************************\r
-* Summary:\r
-*  Locks the SPC so it can not be used by someone else:\r
-*   - Saves wait-pipeline enable state and enable pipeline (PSoC5)\r
-*\r
-* Parameters:\r
-*  Note\r
-*\r
-* Return:\r
-*  CYRET_SUCCESS - if the resource was free.\r
-*  CYRET_LOCKED  - if the SPC is in use.\r
-*\r
-*******************************************************************************/\r
-cystatus CySpcLock(void)\r
-{\r
-    cystatus status = CYRET_LOCKED;\r
-    uint8 interruptState;\r
-\r
-    /* Enter critical section */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    if(CY_SPC_UNLOCKED == SpcLockState)\r
-    {\r
-        SpcLockState = CY_SPC_LOCKED;\r
-        status = CYRET_SUCCESS;\r
-\r
-        #if(CY_PSOC5)\r
-\r
-            if(0u != (CY_SPC_CPU_WAITPIPE_REG & CY_SPC_CPU_WAITPIPE_BYPASS))\r
-            {\r
-                /* Enable pipeline registers */\r
-                CY_SPC_CPU_WAITPIPE_REG &= ((uint32)(~CY_SPC_CPU_WAITPIPE_BYPASS));\r
-\r
-                /* At least 2 NOP instructions are recommended */\r
-                CY_NOP;\r
-                CY_NOP;\r
-                CY_NOP;\r
-\r
-                spcWaitPipeBypass = CY_SPC_CPU_WAITPIPE_BYPASS;\r
-            }\r
-\r
-        #endif  /* (CY_PSOC5) */\r
-    }\r
-\r
-    /* Exit critical section */\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CySpcUnlock\r
-********************************************************************************\r
-* Summary:\r
-*  Unlocks the SPC so it can be used by someone else:\r
-*   - Restores wait-pipeline enable state (PSoC5)\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CySpcUnlock(void)\r
-{\r
-    uint8 interruptState;\r
-\r
-    /* Enter critical section */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    /* Release the SPC object */\r
-    SpcLockState = CY_SPC_UNLOCKED;\r
-\r
-    #if(CY_PSOC5)\r
-\r
-        if(CY_SPC_CPU_WAITPIPE_BYPASS == spcWaitPipeBypass)\r
-        {\r
-            /* Force to bypass pipeline registers */\r
-            CY_SPC_CPU_WAITPIPE_REG |= CY_SPC_CPU_WAITPIPE_BYPASS;\r
-\r
-            /* At least 2 NOP instructions are recommended */\r
-            CY_NOP;\r
-            CY_NOP;\r
-            CY_NOP;\r
-\r
-            spcWaitPipeBypass = 0u;\r
-        }\r
-\r
-    #endif  /* (CY_PSOC5) */\r
-\r
-    /* Exit critical section */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.h
deleted file mode 100755 (executable)
index 6a5828c..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/CySpc.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/*******************************************************************************\r
-* File Name: CySpc.c\r
-* Version 4.0\r
-*\r
-* Description:\r
-*  Provides definitions for the System Performance Component API.\r
-*  The SPC functions are not meant to be called directly by the user\r
-*  application.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYSPC_H)\r
-#define CY_BOOT_CYSPC_H\r
-\r
-#include "cytypes.h"\r
-#include "CyLib.h"\r
-#include "cydevice_trm.h"\r
-\r
-\r
-/***************************************\r
-*    Global Variables\r
-***************************************/\r
-extern uint8 SpcLockState;\r
-\r
-\r
-/***************************************\r
-*    Function Prototypes\r
-***************************************/\r
-void     CySpcStart(void);\r
-void     CySpcStop(void);\r
-uint8    CySpcReadData(uint8 buffer[], uint8 size);\r
-cystatus CySpcLoadMultiByte(uint8 array, uint16 address, const uint8 buffer[], uint8 size)\\r
-;\r
-cystatus CySpcLoadRow(uint8 array, const uint8 buffer[], uint16 size);\r
-cystatus CySpcWriteRow(uint8 array, uint16 address, uint8 tempPolarity, uint8 tempMagnitude)\\r
-;\r
-cystatus CySpcEraseSector(uint8 array, uint8 sectorNumber);\r
-cystatus CySpcGetTemp(uint8 numSamples);\r
-cystatus CySpcLock(void);\r
-void     CySpcUnlock(void);\r
-\r
-\r
-/***************************************\r
-*    API Constants\r
-***************************************/\r
-\r
-#define CY_SPC_LOCKED                       (0x01u)\r
-#define CY_SPC_UNLOCKED                     (0x00u)\r
-\r
-/*******************************************************************************\r
-* The Array ID indicates the unique ID of the SONOS array being accessed:\r
-* - 0x00-0x3E : Flash Arrays\r
-* - 0x3F      : Selects all Flash arrays simultaneously\r
-* - 0x40-0x7F : Embedded EEPROM Arrays\r
-*******************************************************************************/\r
-#define CY_SPC_FIRST_FLASH_ARRAYID          (0x00u)\r
-#define CY_SPC_LAST_FLASH_ARRAYID           (0x3Fu)\r
-#define CY_SPC_FIRST_EE_ARRAYID             (0x40u)\r
-#define CY_SPC_LAST_EE_ARRAYID              (0x7Fu)\r
-\r
-\r
-#define CY_SPC_STATUS_DATA_READY_MASK       (0x01u)\r
-#define CY_SPC_STATUS_IDLE_MASK             (0x02u)\r
-#define CY_SPC_STATUS_CODE_MASK             (0xFCu)\r
-#define CY_SPC_STATUS_CODE_SHIFT            (0x02u)\r
-\r
-/* Status codes for the SPC. */\r
-#define CY_SPC_STATUS_SUCCESS               (0x00u)   /* Operation Successful */\r
-#define CY_SPC_STATUS_INVALID_ARRAY_ID      (0x01u)   /* Invalid Array ID for given command */\r
-#define CY_SPC_STATUS_INVALID_2BYTEKEY      (0x02u)   /* Invalid 2-byte key */\r
-#define CY_SPC_STATUS_ARRAY_ASLEEP          (0x03u)   /* Addressed Array is Asleep */\r
-#define CY_SPC_STATUS_EXTERN_ACCESS         (0x04u)   /* External Access Failure (SPC is not in external access mode) */\r
-#define CY_SPC_STATUS_INVALID_NUMBER        (0x05u)   /* Invalid 'N' Value for given command */\r
-#define CY_SPC_STATUS_TEST_MODE             (0x06u)   /* Test Mode Failure (SPC is not in test mode) */\r
-#define CY_SPC_STATUS_ALG_CSUM              (0x07u)   /* Smart Write Algorithm Checksum Failure */\r
-#define CY_SPC_STATUS_PARAM_CSUM            (0x08u)   /* Smart Write Parameter Checksum Failure */\r
-#define CY_SPC_STATUS_PROTECTION            (0x09u)   /* Protection Check Failure */\r
-#define CY_SPC_STATUS_ADDRESS_PARAM         (0x0Au)   /* Invalid Address parameter for the given command */\r
-#define CY_SPC_STATUS_COMMAND_CODE          (0x0Bu)   /* Invalid Command Code */\r
-#define CY_SPC_STATUS_ROW_ID                (0x0Cu)   /* Invalid Row ID parameter for given command */\r
-#define CY_SPC_STATUS_TADC_INPUT            (0x0Du)   /* Invalid input value for Get Temp & Get ADC commands */\r
-#define CY_SPC_STATUS_BUSY                  (0xFFu)   /* SPC is busy */\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /* Wait-state pipeline */\r
-    #define CY_SPC_CPU_WAITPIPE_BYPASS      ((uint32)0x01u)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/***************************************\r
-* Registers\r
-***************************************/\r
-\r
-/* SPC CPU Data Register */\r
-#define CY_SPC_CPU_DATA_REG         (* (reg8 *) CYREG_SPC_CPU_DATA )\r
-#define CY_SPC_CPU_DATA_PTR         (  (reg8 *) CYREG_SPC_CPU_DATA )\r
-\r
-/* SPC Status Register */\r
-#define CY_SPC_STATUS_REG           (* (reg8 *) CYREG_SPC_SR )\r
-#define CY_SPC_STATUS_PTR           (  (reg8 *) CYREG_SPC_SR )\r
-\r
-/* Active Power Mode Configuration Register 0 */\r
-#define CY_SPC_PM_ACT_REG           (* (reg8 *) CYREG_PM_ACT_CFG0 )\r
-#define CY_SPC_PM_ACT_PTR           (  (reg8 *) CYREG_PM_ACT_CFG0 )\r
-\r
-/* Standby Power Mode Configuration Register 0 */\r
-#define CY_SPC_PM_STBY_REG          (* (reg8 *) CYREG_PM_STBY_CFG0 )\r
-#define CY_SPC_PM_STBY_PTR          (  (reg8 *) CYREG_PM_STBY_CFG0 )\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /* Wait State Pipeline */\r
-    #define CY_SPC_CPU_WAITPIPE_REG     (* (reg32 *) CYREG_PANTHER_WAITPIPE )\r
-    #define CY_SPC_CPU_WAITPIPE_PTR     (  (reg32 *) CYREG_PANTHER_WAITPIPE )\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/***************************************\r
-* Macros\r
-***************************************/\r
-#define CY_SPC_IDLE                 (0u != (CY_SPC_STATUS_REG & CY_SPC_STATUS_IDLE_MASK))\r
-#define CY_SPC_BUSY                 (0u == (CY_SPC_STATUS_REG & CY_SPC_STATUS_IDLE_MASK))\r
-#define CY_SPC_DATA_READY           (0u != (CY_SPC_STATUS_REG & CY_SPC_STATUS_DATA_READY_MASK))\r
-\r
-/* SPC must be in idle state in order to obtain correct status */\r
-#define CY_SPC_READ_STATUS          (CY_SPC_IDLE ? \\r
-                                     ((uint8)(CY_SPC_STATUS_REG >> CY_SPC_STATUS_CODE_SHIFT)) : \\r
-                                     ((uint8) CY_SPC_STATUS_BUSY))\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.0\r
-*******************************************************************************/\r
-#define FIRST_FLASH_ARRAYID         (CY_SPC_FIRST_FLASH_ARRAYID)\r
-#define LAST_FLASH_ARRAYID          (CY_SPC_LAST_FLASH_ARRAYID)\r
-#define FIRST_EE_ARRAYID            (CY_SPC_FIRST_EE_ARRAYID)\r
-#define LAST_EE_ARRAYID             (CY_SPC_LAST_EE_ARRAYID)\r
-#define SIZEOF_ECC_ROW              (CYDEV_ECC_ROW_SIZE)\r
-#define SIZEOF_FLASH_ROW            (CYDEV_FLS_ROW_SIZE)\r
-#define SIZEOF_EEPROM_ROW           (CYDEV_EEPROM_ROW_SIZE)\r
-\r
-\r
-#endif /* (CY_BOOT_CYSPC_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/PSoC5_PSoC5LP_100-TQFP.xml b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/PSoC5_PSoC5LP_100-TQFP.xml
deleted file mode 100755 (executable)
index 0b36df4..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/PSoC5_PSoC5LP_100-TQFP.xml
+++ /dev/null
@@ -1,250 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>\r
-<pindata xsi:schemaLocation="http://cypress.com/xsd/cypindata_v2 ../../dtd/cypindata_v2.xsd" family="PSoC5_PSoC5LP" package="100-TQFP" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://cypress.com/xsd/cypindata_v2">\r
-  <capabilities>\r
-    <capability name="DIGITAL" value="0x0000000000000001" />\r
-    <capability name="ANALOG" value="0x0000000000000002" />\r
-    <capability name="GPIO" value="0x0000000000000004" />\r
-    <capability name="SIO" value="0x0000000000000008" />\r
-    <capability name="DAC_HI_OUT" value="0x0000000000000010" />\r
-    <capability name="ABUF_POS" value="0x0000000000000020" />\r
-    <capability name="ABUF_OUT" value="0x0000000000000040" />\r
-    <capability name="ABUF_NEG" value="0x0000000000000080" />\r
-    <capability name="XRES" value="0x0000000000000100" />\r
-    <capability name="SWD_IO" value="0x0000000000000200" />\r
-    <capability name="SWD_CK" value="0x0000000000000400" />\r
-    <capability name="JTAG_NTRST" value="0x0000000000000800" />\r
-    <capability name="I2CWKUP_SDA" value="0x0000000000001000" />\r
-    <capability name="I2CWKUP_SCL" value="0x0000000000002000" />\r
-    <capability name="EXT_VREF" value="0x0000000000004000" />\r
-    <capability name="USB_D_PLUS" value="0x0000000000008000" />\r
-    <capability name="USB_D_MINUS" value="0x0000000000010000" />\r
-    <capability name="SWO" value="0x0000000000020000" />\r
-    <capability name="JTAG_TMS" value="0x0000000000040000" />\r
-    <capability name="JTAG_TDO" value="0x0000000000080000" />\r
-    <capability name="JTAG_TDI" value="0x0000000000100000" />\r
-    <capability name="JTAG_TCK" value="0x0000000000200000" />\r
-    <capability name="ECO_MHZ_XO" value="0x0000000000400000" />\r
-    <capability name="ECO_MHZ_XI" value="0x0000000000800000" />\r
-    <capability name="ECO_32KHZ_XO" value="0x0000000001000000" />\r
-    <capability name="ECO_32KHZ_XI" value="0x0000000002000000" />\r
-    <capability name="DSM_EXT_PIN_ONE" value="0x0000000004000000" />\r
-    <capability name="DSM_EXT_PIN_TWO" value="0x0000000008000000" />\r
-    <capability name="SAR_EXT_PIN" value="0x0000000010000000" />\r
-    <capability name="TRACE" value="0x0000000020000000" />\r
-    <capability name="SPI_MOSI" value="0x0000000040000000" />\r
-    <capability name="SPI_MISO" value="0x0000000080000000" />\r
-    <capability name="SPI_SS" value="0x0000000100000000" />\r
-    <capability name="SPI_SCLK" value="0x0000000200000000" />\r
-    <capability name="EXTSYNC" value="0x0000000400000000" />\r
-    <capability name="EXTREJECT" value="0x0000000800000000" />\r
-    <capability name="EXTCLK" value="0x0000001000000000" />\r
-    <capability name="TCPWM_P" value="0x0000002000000000" />\r
-    <capability name="TCPWM_N" value="0x0000004000000000" />\r
-    <capability name="SCB_UART_RX" value="0x0000008000000000" />\r
-    <capability name="SCB_UART_TX" value="0x0000010000000000" />\r
-    <capability name="ROUTABLE" value="0x0000020000000000" />\r
-    <capability name="TRUETOUCH" value="0x0000040000000000" />\r
-    <capability name="LCD_COM" value="0x0000080000000000" />\r
-    <capability name="LCD_SEG" value="0x0000100000000000" />\r
-    <capability name="WAKEUP" value="0x0000200000000000" />\r
-  </capabilities>\r
-  <pins>\r
-    <pin number="1" name="P2[5]" pinSide="WEST" padSide="WEST" portId="2" pinId="5" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020020000007">\r
-      <function name="[TRACE_D1]" />\r
-    </pin>\r
-    <pin number="2" name="P2[6]" pinSide="WEST" padSide="SOUTH" portId="2" pinId="6" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020020000007">\r
-      <function name="[TRACE_D2]" />\r
-    </pin>\r
-    <pin number="3" name="P2[7]" pinSide="WEST" padSide="SOUTH" portId="2" pinId="7" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020020000007">\r
-      <function name="[TRACE_D3]" />\r
-    </pin>\r
-    <pin number="4" name="P12[4]" pinSide="WEST" padSide="SOUTH" portId="12" pinId="4" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000002009">\r
-      <ffbterm ffbtype="I2C" ffbid="0" term="scl_in" required="false" />\r
-      <function name="I2C0: SCL" />\r
-    </pin>\r
-    <pin number="5" name="P12[5]" pinSide="WEST" padSide="SOUTH" portId="12" pinId="5" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000001009">\r
-      <ffbterm ffbtype="I2C" ffbid="0" term="sda_in" required="false" />\r
-      <function name="I2C0: SDA" />\r
-    </pin>\r
-    <pin number="6" name="P6[4]" pinSide="WEST" padSide="SOUTH" portId="6" pinId="4" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="7" name="P6[5]" pinSide="WEST" padSide="SOUTH" portId="6" pinId="5" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="8" name="P6[6]" pinSide="WEST" padSide="SOUTH" portId="6" pinId="6" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="9" name="P6[7]" pinSide="WEST" padSide="SOUTH" portId="6" pinId="7" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="10" name="Vssb" pinSide="WEST" padSide="SOUTH" powerPadNames="Vssb" capabilities="0x0000000000000000" />\r
-    <pin number="11" name="Ind" pinSide="WEST" padSide="SOUTH" powerPadNames="Ind" capabilities="0x0000000000000000" />\r
-    <pin number="12" name="Vb" pinSide="WEST" padSide="SOUTH" powerPadNames="Vb" capabilities="0x0000000000000000" />\r
-    <pin number="13" name="Vbat" pinSide="WEST" padSide="SOUTH" powerPadNames="Vbat" capabilities="0x0000000000000000" />\r
-    <pin number="14" name="Vssd" pinSide="WEST" padSide="SOUTH" powerPadNames="Vssd" capabilities="0x0000000000000000" />\r
-    <pin number="15" name="XRES_N" pinSide="WEST" padSide="SOUTH" ioSupplyPin="Vio1" ioSupplyPinNo="26" powerPadNames="XRES_N" capabilities="0x0000000000000100">\r
-      <function name="XRES" />\r
-    </pin>\r
-    <pin number="16" name="P5[0]" pinSide="WEST" padSide="SOUTH" portId="5" pinId="0" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="17" name="P5[1]" pinSide="WEST" padSide="SOUTH" portId="5" pinId="1" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="18" name="P5[2]" pinSide="WEST" padSide="SOUTH" portId="5" pinId="2" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="19" name="P5[3]" pinSide="WEST" padSide="SOUTH" portId="5" pinId="3" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="20" name="P1[0]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="0" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000040207">\r
-      <function name="TMS" />\r
-      <function name="SWDIO" />\r
-    </pin>\r
-    <pin number="21" name="P1[1]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="1" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000200407">\r
-      <function name="TCK" />\r
-      <function name="SWDCK" />\r
-    </pin>\r
-    <pin number="22" name="P1[2]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="2" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000107">\r
-      <function name="XRES_N" />\r
-      <function name="TSTRST_N" />\r
-      <function name="GPIO" />\r
-    </pin>\r
-    <pin number="23" name="P1[3]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="3" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x00000200000A0007">\r
-      <function name="TDO" />\r
-      <function name="SWV" />\r
-    </pin>\r
-    <pin number="24" name="P1[4]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="4" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000100007">\r
-      <function name="TDI" />\r
-    </pin>\r
-    <pin number="25" name="P1[5]" pinSide="WEST" padSide="SOUTH" portId="1" pinId="5" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000807">\r
-      <function name="NTRST" />\r
-    </pin>\r
-    <pin number="26" name="Vio1" pinSide="SOUTH" padSide="SOUTH" ioSupplyPin="Vio1" ioSupplyPinNo="26" powerPadNames="Vio1" capabilities="0x0000000000000000" />\r
-    <pin number="27" name="P1[6]" pinSide="SOUTH" padSide="EAST" portId="1" pinId="6" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="28" name="P1[7]" pinSide="SOUTH" padSide="EAST" portId="1" pinId="7" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="29" name="P12[6]" pinSide="SOUTH" padSide="EAST" portId="12" pinId="6" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000009" />\r
-    <pin number="30" name="P12[7]" pinSide="SOUTH" padSide="EAST" portId="12" pinId="7" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000009" />\r
-    <pin number="31" name="P5[4]" pinSide="SOUTH" padSide="EAST" portId="5" pinId="4" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="32" name="P5[5]" pinSide="SOUTH" padSide="EAST" portId="5" pinId="5" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="33" name="P5[6]" pinSide="SOUTH" padSide="EAST" portId="5" pinId="6" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="34" name="P5[7]" pinSide="SOUTH" padSide="EAST" portId="5" pinId="7" ioSupplyPin="Vio1" ioSupplyPinNo="26" capabilities="0x0000020000000007" />\r
-    <pin number="35" name="P15[6]" pinSide="SOUTH" padSide="EAST" portId="15" pinId="6" ioSupplyPin="Vusb" ioSupplyPinNo="37" capabilities="0x0000020000008201">\r
-      <ffbterm ffbtype="USB" ffbid="0" term="dp" required="true" />\r
-      <function name="USB: D+" />\r
-      <function name="SWDIO" />\r
-    </pin>\r
-    <pin number="36" name="P15[7]" pinSide="SOUTH" padSide="EAST" portId="15" pinId="7" ioSupplyPin="Vusb" ioSupplyPinNo="37" capabilities="0x0000020000010401">\r
-      <ffbterm ffbtype="USB" ffbid="0" term="dm" required="true" />\r
-      <function name="USB: D-" />\r
-      <function name="SWDCK" />\r
-    </pin>\r
-    <pin number="37" name="Vddd" pinSide="SOUTH" padSide="EAST" powerPadNames="Vusb;Vddd" capabilities="0x0000000000000000" />\r
-    <pin number="38" name="Vssd" pinSide="SOUTH" padSide="EAST" powerPadNames="Vssd" capabilities="0x0000000000000000" />\r
-    <pin number="39" name="Vccd" pinSide="SOUTH" padSide="EAST" powerPadNames="Vccd" capabilities="0x0000000000000000" />\r
-    <pin number="40" name="n/c" pinSide="SOUTH" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="41" name="n/c" pinSide="SOUTH" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="42" name="P15[0]" pinSide="SOUTH" padSide="EAST" portId="15" pinId="0" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000400007">\r
-      <function name="MHZ XTAL: XO" />\r
-    </pin>\r
-    <pin number="43" name="P15[1]" pinSide="SOUTH" padSide="EAST" portId="15" pinId="1" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000800007">\r
-      <function name="MHZ XTAL: XI" />\r
-    </pin>\r
-    <pin number="44" name="P3[0]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="0" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="IDAC1" />\r
-    </pin>\r
-    <pin number="45" name="P3[1]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="1" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="IDAC3" />\r
-    </pin>\r
-    <pin number="46" name="P3[2]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="2" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020008004007">\r
-      <ffbterm ffbtype="DSM" ffbid="0" term="ext_pin_2" required="true" />\r
-      <function name="OPAMP3-" />\r
-      <function name="EXTREF1" />\r
-    </pin>\r
-    <pin number="47" name="P3[3]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="3" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="OPAMP3+" />\r
-    </pin>\r
-    <pin number="48" name="P3[4]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="4" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="OPAMP1-" />\r
-    </pin>\r
-    <pin number="49" name="P3[5]" pinSide="SOUTH" padSide="EAST" portId="3" pinId="5" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="OPAMP1+" />\r
-    </pin>\r
-    <pin number="50" name="Vio3" pinSide="SOUTH" padSide="EAST" ioSupplyPin="Vio3" ioSupplyPinNo="50" powerPadNames="Vio3" capabilities="0x0000000000000000" />\r
-    <pin number="51" name="P3[6]" pinSide="EAST" padSide="NORTH" portId="3" pinId="6" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="OPAMP1OUT" />\r
-    </pin>\r
-    <pin number="52" name="P3[7]" pinSide="EAST" padSide="NORTH" portId="3" pinId="7" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000000007">\r
-      <function name="OPAMP3OUT" />\r
-    </pin>\r
-    <pin number="53" name="P12[0]" pinSide="EAST" padSide="NORTH" portId="12" pinId="0" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000002009">\r
-      <ffbterm ffbtype="I2C" ffbid="0" term="scl_in" alternative="1" required="false" />\r
-      <function name="I2C1: SCL" />\r
-    </pin>\r
-    <pin number="54" name="P12[1]" pinSide="EAST" padSide="NORTH" portId="12" pinId="1" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020000001009">\r
-      <ffbterm ffbtype="I2C" ffbid="0" term="sda_in" alternative="1" required="false" />\r
-      <function name="I2C1: SDA" />\r
-    </pin>\r
-    <pin number="55" name="P15[2]" pinSide="EAST" padSide="NORTH" portId="15" pinId="2" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020001000007">\r
-      <function name="KHZ XTAL: XO" />\r
-    </pin>\r
-    <pin number="56" name="P15[3]" pinSide="EAST" padSide="NORTH" portId="15" pinId="3" ioSupplyPin="Vio3" ioSupplyPinNo="50" capabilities="0x0000020002000007">\r
-      <function name="KHZ XTAL: XI" />\r
-    </pin>\r
-    <pin number="57" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="58" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="59" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="60" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="61" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="62" name="n/c" pinSide="EAST" padSide="NONE" capabilities="0x0000000000000000" />\r
-    <pin number="63" name="Vcca" pinSide="EAST" padSide="NORTH" powerPadNames="Vcca" capabilities="0x0000000000000000" />\r
-    <pin number="64" name="Vssa" pinSide="EAST" padSide="NORTH" powerPadNames="Vssabuf;Vssa" capabilities="0x0000000000000000" />\r
-    <pin number="65" name="Vdda" pinSide="EAST" padSide="NORTH" powerPadNames="Vdda" capabilities="0x0000000000000000" />\r
-    <pin number="66" name="Vssd" pinSide="EAST" padSide="NORTH" powerPadNames="Vssd" capabilities="0x0000000000000000" />\r
-    <pin number="67" name="P12[2]" pinSide="EAST" padSide="NORTH" portId="12" pinId="2" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000009" />\r
-    <pin number="68" name="P12[3]" pinSide="EAST" padSide="NORTH" portId="12" pinId="3" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000009" />\r
-    <pin number="69" name="P4[0]" pinSide="EAST" padSide="NORTH" portId="4" pinId="0" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="70" name="P4[1]" pinSide="EAST" padSide="NORTH" portId="4" pinId="1" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="71" name="P0[0]" pinSide="EAST" padSide="NORTH" portId="0" pinId="0" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007">\r
-      <function name="OPAMP2OUT" />\r
-    </pin>\r
-    <pin number="72" name="P0[1]" pinSide="EAST" padSide="NORTH" portId="0" pinId="1" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007">\r
-      <function name="OPAMP0OUT" />\r
-    </pin>\r
-    <pin number="73" name="P0[2]" pinSide="EAST" padSide="NORTH" portId="0" pinId="2" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007">\r
-      <function name="OPAMP0+" />\r
-      <function name="EXTSAR1" />\r
-    </pin>\r
-    <pin number="74" name="P0[3]" pinSide="EAST" padSide="NORTH" portId="0" pinId="3" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020004004007">\r
-      <ffbterm ffbtype="DSM" ffbid="0" term="ext_pin_1" required="true" />\r
-      <function name="OPAMP0-" />\r
-      <function name="EXTREF0" />\r
-    </pin>\r
-    <pin number="75" name="Vio0" pinSide="EAST" padSide="WEST" ioSupplyPin="Vio0" ioSupplyPinNo="75" powerPadNames="Vio0" capabilities="0x0000000000000000" />\r
-    <pin number="76" name="P0[4]" pinSide="NORTH" padSide="WEST" portId="0" pinId="4" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020010000007">\r
-      <ffbterm ffbtype="SAR" ffbid="0" term="ext_pin" required="true" />\r
-      <function name="OPAMP2+" />\r
-      <function name="EXTSAR0" />\r
-    </pin>\r
-    <pin number="77" name="P0[5]" pinSide="NORTH" padSide="WEST" portId="0" pinId="5" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007">\r
-      <function name="OPAMP2-" />\r
-    </pin>\r
-    <pin number="78" name="P0[6]" pinSide="NORTH" padSide="WEST" portId="0" pinId="6" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000017">\r
-      <ffbterm ffbtype="VIDAC" ffbid="0" term="iout" required="false" />\r
-      <function name="IDAC0" />\r
-    </pin>\r
-    <pin number="79" name="P0[7]" pinSide="NORTH" padSide="WEST" portId="0" pinId="7" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007">\r
-      <function name="IDAC2" />\r
-    </pin>\r
-    <pin number="80" name="P4[2]" pinSide="NORTH" padSide="WEST" portId="4" pinId="2" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="81" name="P4[3]" pinSide="NORTH" padSide="WEST" portId="4" pinId="3" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="82" name="P4[4]" pinSide="NORTH" padSide="WEST" portId="4" pinId="4" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="83" name="P4[5]" pinSide="NORTH" padSide="WEST" portId="4" pinId="5" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="84" name="P4[6]" pinSide="NORTH" padSide="WEST" portId="4" pinId="6" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="85" name="P4[7]" pinSide="NORTH" padSide="WEST" portId="4" pinId="7" ioSupplyPin="Vio0" ioSupplyPinNo="75" capabilities="0x0000020000000007" />\r
-    <pin number="86" name="Vccd" pinSide="NORTH" padSide="WEST" powerPadNames="Vccd" capabilities="0x0000000000000000" />\r
-    <pin number="87" name="Vssd" pinSide="NORTH" padSide="WEST" powerPadNames="Vssd" capabilities="0x0000000000000000" />\r
-    <pin number="88" name="Vddd" pinSide="NORTH" padSide="WEST" powerPadNames="Vddd" capabilities="0x0000000000000000" />\r
-    <pin number="89" name="P6[0]" pinSide="NORTH" padSide="WEST" portId="6" pinId="0" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="90" name="P6[1]" pinSide="NORTH" padSide="WEST" portId="6" pinId="1" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="91" name="P6[2]" pinSide="NORTH" padSide="WEST" portId="6" pinId="2" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="92" name="P6[3]" pinSide="NORTH" padSide="WEST" portId="6" pinId="3" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="93" name="P15[4]" pinSide="NORTH" padSide="WEST" portId="15" pinId="4" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="94" name="P15[5]" pinSide="NORTH" padSide="WEST" portId="15" pinId="5" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="95" name="P2[0]" pinSide="NORTH" padSide="WEST" portId="2" pinId="0" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="96" name="P2[1]" pinSide="NORTH" padSide="WEST" portId="2" pinId="1" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="97" name="P2[2]" pinSide="NORTH" padSide="WEST" portId="2" pinId="2" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020000000007" />\r
-    <pin number="98" name="P2[3]" pinSide="NORTH" padSide="WEST" portId="2" pinId="3" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020020000007">\r
-      <function name="[TRACE_CLK]" />\r
-    </pin>\r
-    <pin number="99" name="P2[4]" pinSide="NORTH" padSide="WEST" portId="2" pinId="4" ioSupplyPin="Vio2" ioSupplyPinNo="100" capabilities="0x0000020020000007">\r
-      <function name="[TRACE_D0]" />\r
-    </pin>\r
-    <pin number="100" name="Vio2" pinSide="NORTH" padSide="WEST" ioSupplyPin="Vio2" ioSupplyPinNo="100" powerPadNames="Vio2" capabilities="0x0000000000000000" />\r
-  </pins>\r
-</pindata>
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_DBx_aliases.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_DBx_aliases.h
deleted file mode 100755 (executable)
index 740ea09..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_DBx_aliases.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*******************************************************************************\r
-* File Name: SCSI_Out_DBx.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SCSI_Out_DBx_ALIASES_H) /* Pins SCSI_Out_DBx_ALIASES_H */\r
-#define CY_PINS_SCSI_Out_DBx_ALIASES_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-\r
-\r
-\r
-/***************************************\r
-*              Constants        \r
-***************************************/\r
-#define SCSI_Out_DBx_0         SCSI_Out_DBx__0__PC\r
-#define SCSI_Out_DBx_1         SCSI_Out_DBx__1__PC\r
-#define SCSI_Out_DBx_2         SCSI_Out_DBx__2__PC\r
-#define SCSI_Out_DBx_3         SCSI_Out_DBx__3__PC\r
-#define SCSI_Out_DBx_4         SCSI_Out_DBx__4__PC\r
-#define SCSI_Out_DBx_5         SCSI_Out_DBx__5__PC\r
-#define SCSI_Out_DBx_6         SCSI_Out_DBx__6__PC\r
-#define SCSI_Out_DBx_7         SCSI_Out_DBx__7__PC\r
-\r
-#define SCSI_Out_DBx_DB0               SCSI_Out_DBx__DB0__PC\r
-#define SCSI_Out_DBx_DB1               SCSI_Out_DBx__DB1__PC\r
-#define SCSI_Out_DBx_DB2               SCSI_Out_DBx__DB2__PC\r
-#define SCSI_Out_DBx_DB3               SCSI_Out_DBx__DB3__PC\r
-#define SCSI_Out_DBx_DB4               SCSI_Out_DBx__DB4__PC\r
-#define SCSI_Out_DBx_DB5               SCSI_Out_DBx__DB5__PC\r
-#define SCSI_Out_DBx_DB6               SCSI_Out_DBx__DB6__PC\r
-#define SCSI_Out_DBx_DB7               SCSI_Out_DBx__DB7__PC\r
-\r
-#endif /* End Pins SCSI_Out_DBx_ALIASES_H */\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_aliases.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_aliases.h
deleted file mode 100755 (executable)
index e8aa91f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/SCSI_Out_aliases.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*******************************************************************************\r
-* File Name: SCSI_Out.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_SCSI_Out_ALIASES_H) /* Pins SCSI_Out_ALIASES_H */\r
-#define CY_PINS_SCSI_Out_ALIASES_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-\r
-\r
-\r
-/***************************************\r
-*              Constants        \r
-***************************************/\r
-#define SCSI_Out_0             SCSI_Out__0__PC\r
-#define SCSI_Out_1             SCSI_Out__1__PC\r
-#define SCSI_Out_2             SCSI_Out__2__PC\r
-#define SCSI_Out_3             SCSI_Out__3__PC\r
-#define SCSI_Out_4             SCSI_Out__4__PC\r
-#define SCSI_Out_5             SCSI_Out__5__PC\r
-#define SCSI_Out_6             SCSI_Out__6__PC\r
-#define SCSI_Out_7             SCSI_Out__7__PC\r
-#define SCSI_Out_8             SCSI_Out__8__PC\r
-#define SCSI_Out_9             SCSI_Out__9__PC\r
-\r
-#define SCSI_Out_DBP_raw               SCSI_Out__DBP_raw__PC\r
-#define SCSI_Out_ATN           SCSI_Out__ATN__PC\r
-#define SCSI_Out_BSY           SCSI_Out__BSY__PC\r
-#define SCSI_Out_ACK           SCSI_Out__ACK__PC\r
-#define SCSI_Out_RST           SCSI_Out__RST__PC\r
-#define SCSI_Out_MSG           SCSI_Out__MSG__PC\r
-#define SCSI_Out_SEL           SCSI_Out__SEL__PC\r
-#define SCSI_Out_CD            SCSI_Out__CD__PC\r
-#define SCSI_Out_REQ           SCSI_Out__REQ__PC\r
-#define SCSI_Out_IO_raw                SCSI_Out__IO_raw__PC\r
-\r
-#endif /* End Pins SCSI_Out_ALIASES_H */\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.c
deleted file mode 100755 (executable)
index 081e687..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.c
+++ /dev/null
@@ -1,1335 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  API for USBFS Component.\r
-*\r
-* Note:\r
-*  Many of the functions use endpoint number.  RAM arrays are sized with 9\r
-*  elements so they are indexed directly by epNumber.  The SIE and ARB\r
-*  registers are indexed by variations of epNumber - 1.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include <CyDmac.h>\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-#include "USBFS_hid.h"\r
-#if(USBFS_DMA1_REMOVE == 0u)\r
-    #include "USBFS_ep1_dma.h"\r
-#endif   /* End USBFS_DMA1_REMOVE */\r
-#if(USBFS_DMA2_REMOVE == 0u)\r
-    #include "USBFS_ep2_dma.h"\r
-#endif   /* End USBFS_DMA2_REMOVE */\r
-#if(USBFS_DMA3_REMOVE == 0u)\r
-    #include "USBFS_ep3_dma.h"\r
-#endif   /* End USBFS_DMA3_REMOVE */\r
-#if(USBFS_DMA4_REMOVE == 0u)\r
-    #include "USBFS_ep4_dma.h"\r
-#endif   /* End USBFS_DMA4_REMOVE */\r
-#if(USBFS_DMA5_REMOVE == 0u)\r
-    #include "USBFS_ep5_dma.h"\r
-#endif   /* End USBFS_DMA5_REMOVE */\r
-#if(USBFS_DMA6_REMOVE == 0u)\r
-    #include "USBFS_ep6_dma.h"\r
-#endif   /* End USBFS_DMA6_REMOVE */\r
-#if(USBFS_DMA7_REMOVE == 0u)\r
-    #include "USBFS_ep7_dma.h"\r
-#endif   /* End USBFS_DMA7_REMOVE */\r
-#if(USBFS_DMA8_REMOVE == 0u)\r
-    #include "USBFS_ep8_dma.h"\r
-#endif   /* End USBFS_DMA8_REMOVE */\r
-\r
-\r
-/***************************************\r
-* Global data allocation\r
-***************************************/\r
-\r
-uint8 USBFS_initVar = 0u;\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-    uint8 USBFS_DmaChan[USBFS_MAX_EP];\r
-    uint8 USBFS_DmaTd[USBFS_MAX_EP];\r
-#endif /* End USBFS_EP_MM */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Start\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function initialize the USB SIE, arbiter and the\r
-*  endpoint APIs, including setting the D+ Pullup\r
-*\r
-* Parameters:\r
-*  device: Contains the device number of the desired device descriptor.\r
-*          The device number can be found in the Device Descriptor Tab of\r
-*          "Configure" dialog, under the settings of desired Device Descriptor,\r
-*          in the "Device Number" field.\r
-*  mode: The operating voltage. This determines whether the voltage regulator\r
-*        is enabled for 5V operation or if pass through mode is used for 3.3V\r
-*        operation. Symbolic names and their associated values are given in the\r
-*        following table.\r
-*       USBFS_3V_OPERATION - Disable voltage regulator and pass-thru\r
-*                                       Vcc for pull-up\r
-*       USBFS_5V_OPERATION - Enable voltage regulator and use\r
-*                                       regulator for pull-up\r
-*       USBFS_DWR_VDDD_OPERATION - Enable or Disable voltage\r
-*                         regulator depend on Vddd Voltage configuration in DWR.\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*  The USBFS_intiVar variable is used to indicate initial\r
-*  configuration of this component. The variable is initialized to zero (0u)\r
-*  and set to one (1u) the first time USBFS_Start() is called.\r
-*  This allows for component Re-Start without unnecessary re-initialization\r
-*  in all subsequent calls to the USBFS_Start() routine.\r
-*  If re-initialization of the component is required the variable should be set\r
-*  to zero before call of UART_Start() routine, or the user may call\r
-*  USBFS_Init() and USBFS_InitComponent() as done\r
-*  in the USBFS_Start() routine.\r
-*\r
-* Side Effects:\r
-*   This function will reset all communication states to default.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Start(uint8 device, uint8 mode) \r
-{\r
-    /* If not Initialized then initialize all required hardware and software */\r
-    if(USBFS_initVar == 0u)\r
-    {\r
-        USBFS_Init();\r
-        USBFS_initVar = 1u;\r
-    }\r
-    USBFS_InitComponent(device, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Init\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize component's hardware. Usually called in USBFS_Start().\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Init(void) \r
-{\r
-    uint8 enableInterrupts;\r
-    #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-        uint16 i;\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-    enableInterrupts = CyEnterCriticalSection();\r
-\r
-    /* Enable USB block  */\r
-    USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;\r
-    /* Enable USB block for Standby Power Mode */\r
-    USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
-\r
-    /* Enable core clock */\r
-    USBFS_USB_CLK_EN_REG = USBFS_USB_CLK_ENABLE;\r
-\r
-    USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
-\r
-    /* ENABLING USBIO PADS IN USB MODE FROM I/O MODE */\r
-    /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */\r
-    USBFS_USBIO_CR0_REG &= ((uint8)(~USBFS_USBIO_CR0_TEN));\r
-    CyDelayUs(0u);  /*~50ns delay */\r
-    /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted)\r
-    *  high. This will have been set low by the power manger out of reset.\r
-    *  Also confirm USBIO pull-up disabled\r
-    */\r
-    USBFS_PM_USB_CR0_REG &= ((uint8)(~(USBFS_PM_USB_CR0_PD_N |\r
-                                                  USBFS_PM_USB_CR0_PD_PULLUP_N)));\r
-\r
-    /* Select iomode to USB mode*/\r
-    USBFS_USBIO_CR1_REG &= ((uint8)(~USBFS_USBIO_CR1_IOMODE));\r
-\r
-    /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
-    USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_REF_EN;\r
-    /* The reference will be available 1 us after the regulator is enabled */\r
-    CyDelayUs(1u);\r
-    /* OR 40us after power restored */\r
-    CyDelayUs(40u);\r
-    /* Ensure the single ended disable bits are low (PRT15.INP_DIS[7:6])(input receiver enabled). */\r
-    USBFS_DM_INP_DIS_REG &= ((uint8)(~USBFS_DM_MASK));\r
-    USBFS_DP_INP_DIS_REG &= ((uint8)(~USBFS_DP_MASK));\r
-\r
-    /* Enable USBIO */\r
-    USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_N;\r
-    CyDelayUs(2u);\r
-    /* Set the USBIO pull-up enable */\r
-    USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
-\r
-    /* Write WAx */\r
-    CY_SET_REG8(USBFS_ARB_RW1_WA_PTR,     0u);\r
-    CY_SET_REG8(USBFS_ARB_RW1_WA_MSB_PTR, 0u);\r
-\r
-    #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-        /* Init transfer descriptor. This will be used to detect the DMA state - initialized or not. */\r
-        for (i = 0u; i < USBFS_MAX_EP; i++)\r
-        {\r
-            USBFS_DmaTd[i] = DMA_INVALID_TD;\r
-        }\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-    CyExitCriticalSection(enableInterrupts);\r
-\r
-\r
-    /* Set the bus reset Interrupt. */\r
-    (void) CyIntSetVector(USBFS_BUS_RESET_VECT_NUM,   &USBFS_BUS_RESET_ISR);\r
-    CyIntSetPriority(USBFS_BUS_RESET_VECT_NUM, USBFS_BUS_RESET_PRIOR);\r
-\r
-    /* Set the SOF Interrupt. */\r
-    #if(USBFS_SOF_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_SOF_VECT_NUM,   &USBFS_SOF_ISR);\r
-        CyIntSetPriority(USBFS_SOF_VECT_NUM, USBFS_SOF_PRIOR);\r
-    #endif   /* End USBFS_SOF_ISR_REMOVE */\r
-\r
-    /* Set the Control Endpoint Interrupt. */\r
-    (void) CyIntSetVector(USBFS_EP_0_VECT_NUM,   &USBFS_EP_0_ISR);\r
-    CyIntSetPriority(USBFS_EP_0_VECT_NUM, USBFS_EP_0_PRIOR);\r
-\r
-    /* Set the Data Endpoint 1 Interrupt. */\r
-    #if(USBFS_EP1_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_1_VECT_NUM,   &USBFS_EP_1_ISR);\r
-        CyIntSetPriority(USBFS_EP_1_VECT_NUM, USBFS_EP_1_PRIOR);\r
-    #endif   /* End USBFS_EP1_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 2 Interrupt. */\r
-    #if(USBFS_EP2_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_2_VECT_NUM,   &USBFS_EP_2_ISR);\r
-        CyIntSetPriority(USBFS_EP_2_VECT_NUM, USBFS_EP_2_PRIOR);\r
-    #endif   /* End USBFS_EP2_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 3 Interrupt. */\r
-    #if(USBFS_EP3_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_3_VECT_NUM,   &USBFS_EP_3_ISR);\r
-        CyIntSetPriority(USBFS_EP_3_VECT_NUM, USBFS_EP_3_PRIOR);\r
-    #endif   /* End USBFS_EP3_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 4 Interrupt. */\r
-    #if(USBFS_EP4_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_4_VECT_NUM,   &USBFS_EP_4_ISR);\r
-        CyIntSetPriority(USBFS_EP_4_VECT_NUM, USBFS_EP_4_PRIOR);\r
-    #endif   /* End USBFS_EP4_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 5 Interrupt. */\r
-    #if(USBFS_EP5_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_5_VECT_NUM,   &USBFS_EP_5_ISR);\r
-        CyIntSetPriority(USBFS_EP_5_VECT_NUM, USBFS_EP_5_PRIOR);\r
-    #endif   /* End USBFS_EP5_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 6 Interrupt. */\r
-    #if(USBFS_EP6_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_6_VECT_NUM,   &USBFS_EP_6_ISR);\r
-        CyIntSetPriority(USBFS_EP_6_VECT_NUM, USBFS_EP_6_PRIOR);\r
-    #endif   /* End USBFS_EP6_ISR_REMOVE */\r
-\r
-     /* Set the Data Endpoint 7 Interrupt. */\r
-    #if(USBFS_EP7_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_7_VECT_NUM,   &USBFS_EP_7_ISR);\r
-        CyIntSetPriority(USBFS_EP_7_VECT_NUM, USBFS_EP_7_PRIOR);\r
-    #endif   /* End USBFS_EP7_ISR_REMOVE */\r
-\r
-    /* Set the Data Endpoint 8 Interrupt. */\r
-    #if(USBFS_EP8_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_EP_8_VECT_NUM,   &USBFS_EP_8_ISR);\r
-        CyIntSetPriority(USBFS_EP_8_VECT_NUM, USBFS_EP_8_PRIOR);\r
-    #endif   /* End USBFS_EP8_ISR_REMOVE */\r
-\r
-    #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))\r
-        /* Set the ARB Interrupt. */\r
-        (void) CyIntSetVector(USBFS_ARB_VECT_NUM,   &USBFS_ARB_ISR);\r
-        CyIntSetPriority(USBFS_ARB_VECT_NUM, USBFS_ARB_PRIOR);\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitComponent\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize the component, except for the HW which is done one time in\r
-*  the Start function.  This function pulls up D+.\r
-*\r
-* Parameters:\r
-*  device: Contains the device number of the desired device descriptor.\r
-*          The device number can be found in the Device Descriptor Tab of\r
-*          "Configure" dialog, under the settings of desired Device Descriptor,\r
-*          in the "Device Number" field.\r
-*  mode: The operating voltage. This determines whether the voltage regulator\r
-*        is enabled for 5V operation or if pass through mode is used for 3.3V\r
-*        operation. Symbolic names and their associated values are given in the\r
-*        following table.\r
-*       USBFS_3V_OPERATION - Disable voltage regulator and pass-thru\r
-*                                       Vcc for pull-up\r
-*       USBFS_5V_OPERATION - Enable voltage regulator and use\r
-*                                       regulator for pull-up\r
-*       USBFS_DWR_VDDD_OPERATION - Enable or Disable voltage\r
-*                         regulator depend on Vddd Voltage configuration in DWR.\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*   USBFS_device: Contains the device number of the desired device\r
-*       descriptor. The device number can be found in the Device Descriptor Tab\r
-*       of "Configure" dialog, under the settings of desired Device Descriptor,\r
-*       in the "Device Number" field.\r
-*   USBFS_transferState: This variable used by the communication\r
-*       functions to handle current transfer state. Initialized to\r
-*       TRANS_STATE_IDLE in this API.\r
-*   USBFS_configuration: Contains current configuration number\r
-*       which is set by the Host using SET_CONFIGURATION request.\r
-*       Initialized to zero in this API.\r
-*   USBFS_deviceAddress: Contains current device address. This\r
-*       variable is initialized to zero in this API. Host starts to communicate\r
-*      to device with address 0 and then set it to whatever value using\r
-*      SET_ADDRESS request.\r
-*   USBFS_deviceStatus: initialized to 0.\r
-*       This is two bit variable which contain power status in first bit\r
-*       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-*       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-*   USBFS_lastPacketSize initialized to 0;\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_InitComponent(uint8 device, uint8 mode) \r
-{\r
-    /* Initialize _hidProtocol variable to comply with\r
-    *  HID 7.2.6 Set_Protocol Request:\r
-    *  "When initialized, all devices default to report protocol."\r
-    */\r
-    #if defined(USBFS_ENABLE_HID_CLASS)\r
-        uint8 i;\r
-\r
-        for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
-        {\r
-            USBFS_hidProtocol[i] = USBFS_PROTOCOL_REPORT;\r
-        }\r
-    #endif /* USBFS_ENABLE_HID_CLASS */\r
-\r
-    /* Enable Interrupts. */\r
-    CyIntEnable(USBFS_BUS_RESET_VECT_NUM);\r
-    CyIntEnable(USBFS_EP_0_VECT_NUM);\r
-    #if(USBFS_EP1_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_1_VECT_NUM);\r
-    #endif   /* End USBFS_EP1_ISR_REMOVE */\r
-    #if(USBFS_EP2_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_2_VECT_NUM);\r
-    #endif   /* End USBFS_EP2_ISR_REMOVE */\r
-    #if(USBFS_EP3_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_3_VECT_NUM);\r
-    #endif   /* End USBFS_EP3_ISR_REMOVE */\r
-    #if(USBFS_EP4_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_4_VECT_NUM);\r
-    #endif   /* End USBFS_EP4_ISR_REMOVE */\r
-    #if(USBFS_EP5_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_5_VECT_NUM);\r
-    #endif   /* End USBFS_EP5_ISR_REMOVE */\r
-    #if(USBFS_EP6_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_6_VECT_NUM);\r
-    #endif   /* End USBFS_EP6_ISR_REMOVE */\r
-    #if(USBFS_EP7_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_7_VECT_NUM);\r
-    #endif   /* End USBFS_EP7_ISR_REMOVE */\r
-    #if(USBFS_EP8_ISR_REMOVE == 0u)\r
-        CyIntEnable(USBFS_EP_8_VECT_NUM);\r
-    #endif   /* End USBFS_EP8_ISR_REMOVE */\r
-    #if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))\r
-        /* usb arb interrupt enable */\r
-        USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;\r
-        CyIntEnable(USBFS_ARB_VECT_NUM);\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-    /* Arbiter configuration for DMA transfers */\r
-    #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-            USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;\r
-        #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-            /*Set cfg cmplt this rises DMA request when the full configuration is done */\r
-            USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
-        #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-    USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
-\r
-    /* USB Locking: Enabled, VRegulator: depend on mode or DWR Voltage configuration*/\r
-    switch(mode)\r
-    {\r
-        case USBFS_3V_OPERATION:\r
-            USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
-            break;\r
-        case USBFS_5V_OPERATION:\r
-            USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;\r
-            break;\r
-        default:   /*USBFS_DWR_VDDD_OPERATION */\r
-            #if(USBFS_VDDD_MV < USBFS_3500MV)\r
-                USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK;\r
-            #else\r
-                USBFS_CR1_REG = USBFS_CR1_ENABLE_LOCK | USBFS_CR1_REG_ENABLE;\r
-            #endif /* End USBFS_VDDD_MV < USBFS_3500MV */\r
-            break;\r
-    }\r
-\r
-    /* Record the descriptor selection */\r
-    USBFS_device = device;\r
-\r
-    /* Clear all of the component data */\r
-    USBFS_configuration = 0u;\r
-    USBFS_interfaceNumber = 0u;\r
-    USBFS_configurationChanged = 0u;\r
-    USBFS_deviceAddress  = 0u;\r
-    USBFS_deviceStatus = 0u;\r
-\r
-    USBFS_lastPacketSize = 0u;\r
-\r
-    /*  ACK Setup, Stall IN/OUT */\r
-    CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
-\r
-    /* Enable the SIE with an address 0 */\r
-    CY_SET_REG8(USBFS_CR0_PTR, USBFS_CR0_ENABLE);\r
-\r
-    /* Workaround for PSOC5LP */\r
-    CyDelayCycles(1u);\r
-\r
-    /* Finally, Enable d+ pullup and select iomode to USB mode*/\r
-    CY_SET_REG8(USBFS_USBIO_CR1_PTR, USBFS_USBIO_CR1_USBPUEN);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ReInitComponent\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function reinitialize the component configuration and is\r
-*  intend to be called from the Reset interrupt.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*   USBFS_device: Contains the device number of the desired device\r
-*        descriptor. The device number can be found in the Device Descriptor Tab\r
-*       of "Configure" dialog, under the settings of desired Device Descriptor,\r
-*       in the "Device Number" field.\r
-*   USBFS_transferState: This variable used by the communication\r
-*       functions to handle current transfer state. Initialized to\r
-*       TRANS_STATE_IDLE in this API.\r
-*   USBFS_configuration: Contains current configuration number\r
-*       which is set by the Host using SET_CONFIGURATION request.\r
-*       Initialized to zero in this API.\r
-*   USBFS_deviceAddress: Contains current device address. This\r
-*       variable is initialized to zero in this API. Host starts to communicate\r
-*      to device with address 0 and then set it to whatever value using\r
-*      SET_ADDRESS request.\r
-*   USBFS_deviceStatus: initialized to 0.\r
-*       This is two bit variable which contain power status in first bit\r
-*       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-*       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-*   USBFS_lastPacketSize initialized to 0;\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ReInitComponent(void) \r
-{\r
-    /* Initialize _hidProtocol variable to comply with HID 7.2.6 Set_Protocol\r
-    *  Request: "When initialized, all devices default to report protocol."\r
-    */\r
-    #if defined(USBFS_ENABLE_HID_CLASS)\r
-        uint8 i;\r
-\r
-        for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
-        {\r
-            USBFS_hidProtocol[i] = USBFS_PROTOCOL_REPORT;\r
-        }\r
-    #endif /* USBFS_ENABLE_HID_CLASS */\r
-\r
-    USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
-\r
-    /* Clear all of the component data */\r
-    USBFS_configuration = 0u;\r
-    USBFS_interfaceNumber = 0u;\r
-    USBFS_configurationChanged = 0u;\r
-    USBFS_deviceAddress  = 0u;\r
-    USBFS_deviceStatus = 0u;\r
-\r
-    USBFS_lastPacketSize = 0u;\r
-\r
-\r
-    /*  ACK Setup, Stall IN/OUT */\r
-    CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
-\r
-    /* Enable the SIE with an address 0 */\r
-    CY_SET_REG8(USBFS_CR0_PTR, USBFS_CR0_ENABLE);\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Stop\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function shuts down the USB function including to release\r
-*  the D+ Pullup and disabling the SIE.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*   USBFS_configuration: Contains current configuration number\r
-*       which is set by the Host using SET_CONFIGURATION request.\r
-*       Initialized to zero in this API.\r
-*   USBFS_deviceAddress: Contains current device address. This\r
-*       variable is initialized to zero in this API. Host starts to communicate\r
-*      to device with address 0 and then set it to whatever value using\r
-*      SET_ADDRESS request.\r
-*   USBFS_deviceStatus: initialized to 0.\r
-*       This is two bit variable which contain power status in first bit\r
-*       (DEVICE_STATUS_BUS_POWERED or DEVICE_STATUS_SELF_POWERED) and remote\r
-*       wakeup status (DEVICE_STATUS_REMOTE_WAKEUP) in second bit.\r
-*   USBFS_configurationChanged: This variable is set to one after\r
-*       SET_CONFIGURATION request and cleared in this function.\r
-*   USBFS_intiVar variable is set to zero\r
-*\r
-*******************************************************************************/\r
-void USBFS_Stop(void) \r
-{\r
-\r
-    #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-        USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */\r
-    #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-    /* Disable the SIE */\r
-    USBFS_CR0_REG &= (uint8)(~USBFS_CR0_ENABLE);\r
-    /* Disable the d+ pullup */\r
-    USBFS_USBIO_CR1_REG &= (uint8)(~USBFS_USBIO_CR1_USBPUEN);\r
-    /* Disable USB in ACT PM */\r
-    USBFS_PM_ACT_CFG_REG &= (uint8)(~USBFS_PM_ACT_EN_FSUSB);\r
-    /* Disable USB block for Standby Power Mode */\r
-    USBFS_PM_STBY_CFG_REG &= (uint8)(~USBFS_PM_STBY_EN_FSUSB);\r
-\r
-    /* Disable the reset and EP interrupts */\r
-    CyIntDisable(USBFS_BUS_RESET_VECT_NUM);\r
-    CyIntDisable(USBFS_EP_0_VECT_NUM);\r
-    #if(USBFS_EP1_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_1_VECT_NUM);\r
-    #endif   /* End USBFS_EP1_ISR_REMOVE */\r
-    #if(USBFS_EP2_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_2_VECT_NUM);\r
-    #endif   /* End USBFS_EP2_ISR_REMOVE */\r
-    #if(USBFS_EP3_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_3_VECT_NUM);\r
-    #endif   /* End USBFS_EP3_ISR_REMOVE */\r
-    #if(USBFS_EP4_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_4_VECT_NUM);\r
-    #endif   /* End USBFS_EP4_ISR_REMOVE */\r
-    #if(USBFS_EP5_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_5_VECT_NUM);\r
-    #endif   /* End USBFS_EP5_ISR_REMOVE */\r
-    #if(USBFS_EP6_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_6_VECT_NUM);\r
-    #endif   /* End USBFS_EP6_ISR_REMOVE */\r
-    #if(USBFS_EP7_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_7_VECT_NUM);\r
-    #endif   /* End USBFS_EP7_ISR_REMOVE */\r
-    #if(USBFS_EP8_ISR_REMOVE == 0u)\r
-        CyIntDisable(USBFS_EP_8_VECT_NUM);\r
-    #endif   /* End USBFS_EP8_ISR_REMOVE */\r
-\r
-    /* Clear all of the component data */\r
-    USBFS_configuration = 0u;\r
-    USBFS_interfaceNumber = 0u;\r
-    USBFS_configurationChanged = 0u;\r
-    USBFS_deviceAddress  = 0u;\r
-    USBFS_deviceStatus = 0u;\r
-    USBFS_initVar = 0u;\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CheckActivity\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the activity status of the bus.  Clears the status hardware to\r
-*  provide fresh activity status on the next call of this routine.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  1 - If bus activity was detected since the last call to this function\r
-*  0 - If bus activity not was detected since the last call to this function\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_CheckActivity(void) \r
-{\r
-    uint8 r;\r
-\r
-    r = CY_GET_REG8(USBFS_CR1_PTR);\r
-    CY_SET_REG8(USBFS_CR1_PTR, (r & ((uint8)(~USBFS_CR1_BUS_ACTIVITY))));\r
-\r
-    return((r & USBFS_CR1_BUS_ACTIVITY) >> USBFS_CR1_BUS_ACTIVITY_SHIFT);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetConfiguration\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the current configuration setting\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  configuration.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_GetConfiguration(void) \r
-{\r
-    return(USBFS_configuration);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_IsConfigurationChanged\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the clear on read configuration state. It is usefull when PC send\r
-*  double SET_CONFIGURATION request with same configuration number.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  Not zero value when new configuration has been changed, otherwise zero is\r
-*  returned.\r
-*\r
-* Global variables:\r
-*   USBFS_configurationChanged: This variable is set to one after\r
-*       SET_CONFIGURATION request and cleared in this function.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_IsConfigurationChanged(void) \r
-{\r
-    uint8 res = 0u;\r
-\r
-    if(USBFS_configurationChanged != 0u)\r
-    {\r
-        res = USBFS_configurationChanged;\r
-        USBFS_configurationChanged = 0u;\r
-    }\r
-\r
-    return(res);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetInterfaceSetting\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the alternate setting from current interface\r
-*\r
-* Parameters:\r
-*  uint8 interfaceNumber, interface number\r
-*\r
-* Return:\r
-*  Alternate setting.\r
-*\r
-*******************************************************************************/\r
-uint8  USBFS_GetInterfaceSetting(uint8 interfaceNumber)\r
-                                                    \r
-{\r
-    return(USBFS_interfaceSetting[interfaceNumber]);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetEPState\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returned the state of the requested endpoint.\r
-*\r
-* Parameters:\r
-*  epNumber: Endpoint Number\r
-*\r
-* Return:\r
-*  State of the requested endpoint.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_GetEPState(uint8 epNumber) \r
-{\r
-    return(USBFS_EP[epNumber].apiEpState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetEPCount\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function supports Data Endpoints only(EP1-EP8).\r
-*  Returns the transfer count for the requested endpoint.  The value from\r
-*  the count registers includes 2 counts for the two byte checksum of the\r
-*  packet.  This function subtracts the two counts.\r
-*\r
-* Parameters:\r
-*  epNumber: Data Endpoint Number.\r
-*            Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-*  Returns the current byte count from the specified endpoint or 0 for an\r
-*  invalid endpoint.\r
-*\r
-*******************************************************************************/\r
-uint16 USBFS_GetEPCount(uint8 epNumber) \r
-{\r
-    uint8 ri;\r
-    uint16 result = 0u;\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-\r
-        result = (uint8)(CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri)) &\r
-                          USBFS_EPX_CNT0_MASK);\r
-        result = (result << 8u) | CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri));\r
-        result -= USBFS_EPX_CNTX_CRC_COUNT;\r
-    }\r
-    return(result);\r
-}\r
-\r
-\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_InitEP_DMA\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This function allocates and initializes a DMA channel to be used by the\r
-    *  USBFS_LoadInEP() or USBFS_ReadOutEP() APIs for data\r
-    *  transfer.\r
-    *\r
-    * Parameters:\r
-    *  epNumber: Contains the data endpoint number.\r
-    *            Valid values are between 1 and 8.\r
-    *  *pData: Pointer to a data array that is related to the EP transfers.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_InitEP_DMA(uint8 epNumber, const uint8 *pData)\r
-                                                                    \r
-    {\r
-        uint16 src;\r
-        uint16 dst;\r
-        #if (CY_PSOC3)                  /* PSoC 3 */\r
-            src = HI16(CYDEV_SRAM_BASE);\r
-            dst = HI16(CYDEV_PERIPH_BASE);\r
-            pData = pData;\r
-        #else                           /* PSoC 5 */\r
-            if((USBFS_EP[epNumber].addr & USBFS_DIR_IN) != 0u )\r
-            {   /* for the IN EP source is the SRAM memory buffer */\r
-                src = HI16(pData);\r
-                dst = HI16(CYDEV_PERIPH_BASE);\r
-            }\r
-            else\r
-            {   /* for the OUT EP source is the SIE register */\r
-                src = HI16(CYDEV_PERIPH_BASE);\r
-                dst = HI16(pData);\r
-            }\r
-        #endif  /* End C51 */\r
-        switch(epNumber)\r
-        {\r
-            case USBFS_EP1:\r
-                #if(USBFS_DMA1_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep1_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA1_REMOVE */\r
-                break;\r
-            case USBFS_EP2:\r
-                #if(USBFS_DMA2_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep2_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA2_REMOVE */\r
-                break;\r
-            case USBFS_EP3:\r
-                #if(USBFS_DMA3_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep3_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA3_REMOVE */\r
-                break;\r
-            case USBFS_EP4:\r
-                #if(USBFS_DMA4_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep4_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA4_REMOVE */\r
-                break;\r
-            case USBFS_EP5:\r
-                #if(USBFS_DMA5_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep5_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA5_REMOVE */\r
-                break;\r
-            case USBFS_EP6:\r
-                #if(USBFS_DMA6_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep6_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA6_REMOVE */\r
-                break;\r
-            case USBFS_EP7:\r
-                #if(USBFS_DMA7_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep7_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA7_REMOVE */\r
-                break;\r
-            case USBFS_EP8:\r
-                #if(USBFS_DMA8_REMOVE == 0u)\r
-                    USBFS_DmaChan[epNumber] = USBFS_ep8_DmaInitialize(\r
-                        USBFS_DMA_BYTES_PER_BURST, USBFS_DMA_REQUEST_PER_BURST, src, dst);\r
-                #endif   /* End USBFS_DMA8_REMOVE */\r
-                break;\r
-            default:\r
-                /* Do not support EP0 DMA transfers */\r
-                break;\r
-        }\r
-        if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-        {\r
-            USBFS_DmaTd[epNumber] = CyDmaTdAllocate();\r
-        }\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_Stop_DMA\r
-    ********************************************************************************\r
-    *\r
-    * Summary: Stops and free DMA\r
-    *\r
-    * Parameters:\r
-    *  epNumber: Contains the data endpoint number or\r
-    *           USBFS_MAX_EP to stop all DMAs\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_Stop_DMA(uint8 epNumber) \r
-    {\r
-        uint8 i;\r
-        i = (epNumber < USBFS_MAX_EP) ? epNumber : USBFS_EP1;\r
-        do\r
-        {\r
-            if(USBFS_DmaTd[i] != DMA_INVALID_TD)\r
-            {\r
-                (void) CyDmaChDisable(USBFS_DmaChan[i]);\r
-                CyDmaTdFree(USBFS_DmaTd[i]);\r
-                USBFS_DmaTd[i] = DMA_INVALID_TD;\r
-            }\r
-            i++;\r
-        }while((i < USBFS_MAX_EP) && (epNumber == USBFS_MAX_EP));\r
-    }\r
-\r
-#endif /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_LoadInEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Loads and enables the specified USB data endpoint for an IN interrupt or bulk\r
-*  transfer.\r
-*\r
-* Parameters:\r
-*  epNumber: Contains the data endpoint number.\r
-*            Valid values are between 1 and 8.\r
-*  *pData: A pointer to a data array from which the data for the endpoint space\r
-*          is loaded.\r
-*  length: The number of bytes to transfer from the array and then send as a\r
-*          result of an IN request. Valid values are between 0 and 512.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)\r
-                                                                        \r
-{\r
-    uint8 ri;\r
-    reg8 *p;\r
-    #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-        uint16 i;\r
-    #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-        p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-            /* Limits length to available buffer space, auto MM could send packets up to 1024 bytes */\r
-            if(length > (USBFS_EPX_DATA_BUF_MAX - USBFS_EP[epNumber].buffOffset))\r
-            {\r
-                length = USBFS_EPX_DATA_BUF_MAX - USBFS_EP[epNumber].buffOffset;\r
-            }\r
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-        /* Set the count and data toggle */\r
-        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),\r
-                            (length >> 8u) | (USBFS_EP[epNumber].epToggle));\r
-        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri),  length & 0xFFu);\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-            if(pData != NULL)\r
-            {\r
-                /* Copy the data using the arbiter data register */\r
-                for (i = 0u; i < length; i++)\r
-                {\r
-                    CY_SET_REG8(p, pData[i]);\r
-                }\r
-            }\r
-            USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
-            /* Write the Mode register */\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
-        #else\r
-            /* Init DMA if it was not initialized */\r
-            if(USBFS_DmaTd[epNumber] == DMA_INVALID_TD)\r
-            {\r
-                USBFS_InitEP_DMA(epNumber, pData);\r
-            }\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-            USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
-            if((pData != NULL) && (length > 0u))\r
-            {\r
-                /* Enable DMA in mode2 for transferring data */\r
-                (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-                (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
-                                                                                 TD_TERMIN_EN | TD_INC_SRC_ADR);\r
-                (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)p));\r
-                /* Enable the DMA */\r
-                (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-                (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-                /* Generate DMA request */\r
-                * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_DMA_REQ;\r
-                * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_ARB_EPX_CFG_DMA_REQ));\r
-                /* Mode register will be written in arb ISR after DMA transfer complete */\r
-            }\r
-            else\r
-            {\r
-                /* When zero-length packet - write the Mode register directly */\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
-            }\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-            if(pData != NULL)\r
-            {\r
-                /* Enable DMA in mode3 for transferring data */\r
-                (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-                (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length,\r
-                                               USBFS_DmaTd[epNumber], TD_TERMIN_EN | TD_INC_SRC_ADR);\r
-                (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)pData), LO16((uint32)p));\r
-                /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */\r
-                (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);\r
-                /* Enable the DMA */\r
-                (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-                (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-            }\r
-            else\r
-            {\r
-                USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
-                if(length > 0u)\r
-                {\r
-                    /* Set Data ready status, This will generate DMA request */\r
-                    * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_IN_DATA_RDY;\r
-                    /* Mode register will be written in arb ISR(In Buffer Full) after first DMA transfer complete */\r
-                }\r
-                else\r
-                {\r
-                    /* When zero-length packet - write the Mode register directly */\r
-                    CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
-                }\r
-            }\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ReadOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Read data from an endpoint.  The application must call\r
-*  USBFS_GetEPState to see if an event is pending.\r
-*\r
-* Parameters:\r
-*  epNumber: Contains the data endpoint number.\r
-*            Valid values are between 1 and 8.\r
-*  pData: A pointer to a data array from which the data for the endpoint space\r
-*         is loaded.\r
-*  length: The number of bytes to transfer from the USB Out endpoint and loads\r
-*          it into data array. Valid values are between 0 and 1023. The function\r
-*          moves fewer than the requested number of bytes if the host sends\r
-*          fewer bytes than requested.\r
-*\r
-* Returns:\r
-*  Number of bytes received, 0 for an invalid endpoint.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)\r
-                                                                        \r
-{\r
-    uint8 ri;\r
-    reg8 *p;\r
-    #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-        uint16 i;\r
-    #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-    #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-        uint16 xferCount;\r
-    #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP) && (pData != NULL))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-        p = (reg8 *)(USBFS_ARB_RW1_DR_IND + ri);\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-            /* Determine which is smaller the requested data or the available data */\r
-            xferCount = USBFS_GetEPCount(epNumber);\r
-            if (length > xferCount)\r
-            {\r
-                length = xferCount;\r
-            }\r
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-            /* Copy the data using the arbiter data register */\r
-            for (i = 0u; i < length; i++)\r
-            {\r
-                pData[i] = CY_GET_REG8(p);\r
-            }\r
-\r
-            /* (re)arming of OUT endpoint */\r
-            USBFS_EnableOutEP(epNumber);\r
-        #else\r
-            /*Init DMA if it was not initialized */\r
-            if(USBFS_DmaTd[epNumber] == DMA_INVALID_TD)\r
-            {\r
-                USBFS_InitEP_DMA(epNumber, pData);\r
-            }\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_MANUAL */\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-            /* Enable DMA in mode2 for transferring data */\r
-            (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-            (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, CY_DMA_DISABLE_TD,\r
-                                                                                TD_TERMIN_EN | TD_INC_DST_ADR);\r
-            (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)p), LO16((uint32)pData));\r
-            /* Enable the DMA */\r
-            (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-            (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-\r
-            /* Generate DMA request */\r
-            * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) |= USBFS_ARB_EPX_CFG_DMA_REQ;\r
-            * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= ((uint8)(~USBFS_ARB_EPX_CFG_DMA_REQ));\r
-            /* Out EP will be (re)armed in arb ISR after transfer complete */\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-\r
-        #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-            /* Enable DMA in mode3 for transferring data */\r
-            (void) CyDmaChDisable(USBFS_DmaChan[epNumber]);\r
-            (void) CyDmaTdSetConfiguration(USBFS_DmaTd[epNumber], length, USBFS_DmaTd[epNumber],\r
-                                                                                TD_TERMIN_EN | TD_INC_DST_ADR);\r
-            (void) CyDmaTdSetAddress(USBFS_DmaTd[epNumber],  LO16((uint32)p), LO16((uint32)pData));\r
-\r
-            /* Clear Any potential pending DMA requests before starting the DMA channel to transfer data */\r
-            (void) CyDmaClearPendingDrq(USBFS_DmaChan[epNumber]);\r
-            /* Enable the DMA */\r
-            (void) CyDmaChSetInitialTd(USBFS_DmaChan[epNumber], USBFS_DmaTd[epNumber]);\r
-            (void) CyDmaChEnable(USBFS_DmaChan[epNumber], 1u);\r
-            /* Out EP will be (re)armed in arb ISR after transfer complete */\r
-        #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-\r
-    }\r
-    else\r
-    {\r
-        length = 0u;\r
-    }\r
-\r
-    return(length);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_EnableOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function enables an OUT endpoint.  It should not be\r
-*  called for an IN endpoint.\r
-*\r
-* Parameters:\r
-*  epNumber: Endpoint Number\r
-*            Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*  USBFS_EP[epNumber].apiEpState - set to NO_EVENT_PENDING\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_EnableOutEP(uint8 epNumber) \r
-{\r
-    uint8 ri;\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-        USBFS_EP[epNumber].apiEpState = USBFS_NO_EVENT_PENDING;\r
-        /* Write the Mode register */\r
-        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_EP[epNumber].epMode);\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_DisableOutEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function disables an OUT endpoint.  It should not be\r
-*  called for an IN endpoint.\r
-*\r
-* Parameters:\r
-*  epNumber: Endpoint Number\r
-*            Valid values are between 1 and 8.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_DisableOutEP(uint8 epNumber) \r
-{\r
-    uint8 ri ;\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-        /* Write the Mode register */\r
-        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Force\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Forces the bus state\r
-*\r
-* Parameters:\r
-*  bState\r
-*    USBFS_FORCE_J\r
-*    USBFS_FORCE_K\r
-*    USBFS_FORCE_SE0\r
-*    USBFS_FORCE_NONE\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Force(uint8 bState) \r
-{\r
-    CY_SET_REG8(USBFS_USBIO_CR0_PTR, bState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetEPAckState\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the ACK of the CR0 Register (ACKD)\r
-*\r
-* Parameters:\r
-*  epNumber: Endpoint Number\r
-*            Valid values are between 1 and 8.\r
-*\r
-* Returns\r
-*  0 if nothing has been ACKD, non-=zero something has been ACKD\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_GetEPAckState(uint8 epNumber) \r
-{\r
-    uint8 ri;\r
-    uint8 cr = 0u;\r
-\r
-    if((epNumber > USBFS_EP0) && (epNumber < USBFS_MAX_EP))\r
-    {\r
-        ri = ((epNumber - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-        cr = CY_GET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri)) & USBFS_MODE_ACKD;\r
-    }\r
-\r
-    return(cr);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_SetPowerStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the device power status for reporting in the Get Device Status\r
-*  request\r
-*\r
-* Parameters:\r
-*  powerStatus: USBFS_DEVICE_STATUS_BUS_POWERED(0) - Bus Powered,\r
-*               USBFS_DEVICE_STATUS_SELF_POWERED(1) - Self Powered\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*  USBFS_deviceStatus - set power status\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_SetPowerStatus(uint8 powerStatus) \r
-{\r
-    if (powerStatus != USBFS_DEVICE_STATUS_BUS_POWERED)\r
-    {\r
-        USBFS_deviceStatus |=  USBFS_DEVICE_STATUS_SELF_POWERED;\r
-    }\r
-    else\r
-    {\r
-        USBFS_deviceStatus &=  ((uint8)(~USBFS_DEVICE_STATUS_SELF_POWERED));\r
-    }\r
-}\r
-\r
-\r
-#if (USBFS_MON_VBUS == 1u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_VBusPresent\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Determines VBUS presence for Self Powered Devices.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  1 if VBUS is present, otherwise 0.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_VBusPresent(void) \r
-    {\r
-        return((0u != (CY_GET_REG8(USBFS_VBUS_PS_PTR) & USBFS_VBUS_MASK)) ? 1u : 0u);\r
-    }\r
-\r
-#endif /* USBFS_MON_VBUS */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_RWUEnabled\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns TRUE if Remote Wake Up is enabled, otherwise FALSE\r
-*\r
-* Parameters:\r
-*   None.\r
-*\r
-* Return:\r
-*  TRUE -  Remote Wake Up Enabled\r
-*  FALSE - Remote Wake Up Disabled\r
-*\r
-* Global variables:\r
-*  USBFS_deviceStatus - checked to determine remote status\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_RWUEnabled(void) \r
-{\r
-    uint8 result = USBFS_FALSE;\r
-    if((USBFS_deviceStatus & USBFS_DEVICE_STATUS_REMOTE_WAKEUP) != 0u)\r
-    {\r
-        result = USBFS_TRUE;\r
-    }\r
-\r
-    return(result);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.h
deleted file mode 100755 (executable)
index e7fd899..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS.h
+++ /dev/null
@@ -1,1189 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Header File for the USFS component. Contains prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_H)\r
-#define CY_USBFS_USBFS_H\r
-\r
-#include "cytypes.h"\r
-#include "cydevice_trm.h"\r
-#include "cyfitter.h"\r
-#include "CyLib.h"\r
-\r
-\r
-/***************************************\r
-* Conditional Compilation Parameters\r
-***************************************/\r
-\r
-/* Check to see if required defines such as CY_PSOC5LP are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5LP)\r
-    #error Component USBFS_v2_60 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5LP) */\r
-\r
-\r
-/***************************************\r
-*  Memory Type Definitions\r
-***************************************/\r
-\r
-/* Renamed Type Definitions for backward compatibility.\r
-*  Should not be used in new designs.\r
-*/\r
-#define USBFS_CODE CYCODE\r
-#define USBFS_FAR CYFAR\r
-#if defined(__C51__) || defined(__CX51__)\r
-    #define USBFS_DATA data\r
-    #define USBFS_XDATA xdata\r
-#else\r
-    #define USBFS_DATA\r
-    #define USBFS_XDATA\r
-#endif /* End __C51__ */\r
-#define USBFS_NULL       NULL\r
-\r
-\r
-/***************************************\r
-* Enumerated Types and Parameters\r
-***************************************/\r
-\r
-#define USBFS__EP_MANUAL 0\r
-#define USBFS__EP_DMAMANUAL 1\r
-#define USBFS__EP_DMAAUTO 2\r
-\r
-#define USBFS__MA_STATIC 0\r
-#define USBFS__MA_DYNAMIC 1\r
-\r
-\r
-\r
-/***************************************\r
-*    Initial Parameter Constants\r
-***************************************/\r
-\r
-#define USBFS_NUM_DEVICES   (1u)\r
-#define USBFS_ENABLE_DESCRIPTOR_STRINGS   \r
-#define USBFS_ENABLE_SN_STRING   \r
-#define USBFS_ENABLE_STRINGS   \r
-#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF_SIZE   (65u)\r
-#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_NUM_IN_RPTS   (1u)\r
-#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE   (65u)\r
-#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_NUM_OUT_RPTS   (1u)\r
-#define USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_COUNT   (1u)\r
-#define USBFS_ENABLE_HID_CLASS   \r
-#define USBFS_HID_RPT_1_SIZE_LSB   (0x24u)\r
-#define USBFS_HID_RPT_1_SIZE_MSB   (0x00u)\r
-#define USBFS_MAX_REPORTID_NUMBER   (0u)\r
-\r
-#define USBFS_MON_VBUS                       (0u)\r
-#define USBFS_EXTERN_VBUS                    (0u)\r
-#define USBFS_EXTERN_VND                     (0u)\r
-#define USBFS_EXTERN_CLS                     (0u)\r
-#define USBFS_MAX_INTERFACES_NUMBER          (1u)\r
-#define USBFS_EP0_ISR_REMOVE                 (0u)\r
-#define USBFS_EP1_ISR_REMOVE                 (0u)\r
-#define USBFS_EP2_ISR_REMOVE                 (0u)\r
-#define USBFS_EP3_ISR_REMOVE                 (1u)\r
-#define USBFS_EP4_ISR_REMOVE                 (1u)\r
-#define USBFS_EP5_ISR_REMOVE                 (1u)\r
-#define USBFS_EP6_ISR_REMOVE                 (1u)\r
-#define USBFS_EP7_ISR_REMOVE                 (1u)\r
-#define USBFS_EP8_ISR_REMOVE                 (1u)\r
-#define USBFS_EP_MM                          (0u)\r
-#define USBFS_EP_MA                          (0u)\r
-#define USBFS_DMA1_REMOVE                    (1u)\r
-#define USBFS_DMA2_REMOVE                    (1u)\r
-#define USBFS_DMA3_REMOVE                    (1u)\r
-#define USBFS_DMA4_REMOVE                    (1u)\r
-#define USBFS_DMA5_REMOVE                    (1u)\r
-#define USBFS_DMA6_REMOVE                    (1u)\r
-#define USBFS_DMA7_REMOVE                    (1u)\r
-#define USBFS_DMA8_REMOVE                    (1u)\r
-#define USBFS_SOF_ISR_REMOVE                 (0u)\r
-#define USBFS_ARB_ISR_REMOVE                 (0u)\r
-#define USBFS_DP_ISR_REMOVE                  (0u)\r
-#define USBFS_ENABLE_CDC_CLASS_API           (1u)\r
-#define USBFS_ENABLE_MIDI_API                (1u)\r
-#define USBFS_MIDI_EXT_MODE                  (0u)\r
-\r
-\r
-/***************************************\r
-*    Data Struct Definition\r
-***************************************/\r
-\r
-typedef struct\r
-{\r
-    uint8  attrib;\r
-    uint8  apiEpState;\r
-    uint8  hwEpState;\r
-    uint8  epToggle;\r
-    uint8  addr;\r
-    uint8  epMode;\r
-    uint16 buffOffset;\r
-    uint16 bufferSize;\r
-    uint8  interface;\r
-} T_USBFS_EP_CTL_BLOCK;\r
-\r
-typedef struct\r
-{\r
-    uint8  interface;\r
-    uint8  altSetting;\r
-    uint8  addr;\r
-    uint8  attributes;\r
-    uint16 bufferSize;\r
-    uint8  bMisc;\r
-} T_USBFS_EP_SETTINGS_BLOCK;\r
-\r
-typedef struct\r
-{\r
-    uint8  status;\r
-    uint16 length;\r
-} T_USBFS_XFER_STATUS_BLOCK;\r
-\r
-typedef struct\r
-{\r
-    uint16  count;\r
-    volatile uint8 *pData;\r
-    T_USBFS_XFER_STATUS_BLOCK *pStatusBlock;\r
-} T_USBFS_TD;\r
-\r
-\r
-typedef struct\r
-{\r
-    uint8   c;\r
-    const void *p_list;\r
-} T_USBFS_LUT;\r
-\r
-/* Resume/Suspend API Support */\r
-typedef struct\r
-{\r
-    uint8 enableState;\r
-    uint8 mode;\r
-} USBFS_BACKUP_STRUCT;\r
-\r
-\r
-/* Renamed structure fields for backward compatibility.\r
-*  Should not be used in new designs.\r
-*/\r
-#define wBuffOffset         buffOffset\r
-#define wBufferSize         bufferSize\r
-#define bStatus             status\r
-#define wLength             length\r
-#define wCount              count\r
-\r
-/* Renamed global variable for backward compatibility.\r
-*  Should not be used in new designs.\r
-*/\r
-#define CurrentTD           USBFS_currentTD\r
-\r
-\r
-/***************************************\r
-*       Function Prototypes\r
-***************************************/\r
-\r
-void   USBFS_Start(uint8 device, uint8 mode) ;\r
-void   USBFS_Init(void) ;\r
-void   USBFS_InitComponent(uint8 device, uint8 mode) ;\r
-void   USBFS_Stop(void) ;\r
-uint8  USBFS_CheckActivity(void) ;\r
-uint8  USBFS_GetConfiguration(void) ;\r
-uint8  USBFS_IsConfigurationChanged(void) ;\r
-uint8  USBFS_GetInterfaceSetting(uint8 interfaceNumber)\r
-                                                        ;\r
-uint8  USBFS_GetEPState(uint8 epNumber) ;\r
-uint16 USBFS_GetEPCount(uint8 epNumber) ;\r
-void   USBFS_LoadInEP(uint8 epNumber, const uint8 pData[], uint16 length)\r
-                                                                    ;\r
-uint16 USBFS_ReadOutEP(uint8 epNumber, uint8 pData[], uint16 length)\r
-                                                                    ;\r
-void   USBFS_EnableOutEP(uint8 epNumber) ;\r
-void   USBFS_DisableOutEP(uint8 epNumber) ;\r
-void   USBFS_Force(uint8 bState) ;\r
-uint8  USBFS_GetEPAckState(uint8 epNumber) ;\r
-void   USBFS_SetPowerStatus(uint8 powerStatus) ;\r
-uint8  USBFS_RWUEnabled(void) ;\r
-void   USBFS_TerminateEP(uint8 ep) ;\r
-\r
-void   USBFS_Suspend(void) ;\r
-void   USBFS_Resume(void) ;\r
-\r
-#if defined(USBFS_ENABLE_FWSN_STRING)\r
-    void   USBFS_SerialNumString(uint8 snString[]) ;\r
-#endif  /* USBFS_ENABLE_FWSN_STRING */\r
-#if (USBFS_MON_VBUS == 1u)\r
-    uint8  USBFS_VBusPresent(void) ;\r
-#endif /* End USBFS_MON_VBUS */\r
-\r
-#if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS) || \\r
-                                          (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))\r
-\r
-    void USBFS_CyBtldrCommStart(void) ;\r
-    void USBFS_CyBtldrCommStop(void) ;\r
-    void USBFS_CyBtldrCommReset(void) ;\r
-    cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
-                                                        ;\r
-    cystatus USBFS_CyBtldrCommRead( uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
-                                                        ;\r
-\r
-    #define USBFS_BTLDR_SIZEOF_WRITE_BUFFER      (64u)    /* EP 1 OUT */\r
-    #define USBFS_BTLDR_SIZEOF_READ_BUFFER       (64u)    /* EP 2 IN */\r
-    #define USBFS_BTLDR_MAX_PACKET_SIZE          USBFS_BTLDR_SIZEOF_WRITE_BUFFER\r
-\r
-    /* These defines active if used USBFS interface as an\r
-    *  IO Component for bootloading. When Custom_Interface selected\r
-    *  in Bootloder configuration as the IO Component, user must\r
-    *  provide these functions\r
-    */\r
-    #if (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS)\r
-        #define CyBtldrCommStart        USBFS_CyBtldrCommStart\r
-        #define CyBtldrCommStop         USBFS_CyBtldrCommStop\r
-        #define CyBtldrCommReset        USBFS_CyBtldrCommReset\r
-        #define CyBtldrCommWrite        USBFS_CyBtldrCommWrite\r
-        #define CyBtldrCommRead         USBFS_CyBtldrCommRead\r
-    #endif  /*End   CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS */\r
-\r
-#endif /* End CYDEV_BOOTLOADER_IO_COMP  */\r
-\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-    void USBFS_InitEP_DMA(uint8 epNumber, const uint8 *pData)\r
-                                                    ;\r
-    void USBFS_Stop_DMA(uint8 epNumber) ;\r
-#endif /* End USBFS_EP_MM != USBFS__EP_MANUAL) */\r
-\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)\r
-    void USBFS_MIDI_EP_Init(void) ;\r
-\r
-    #if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-        void USBFS_MIDI_IN_Service(void) ;\r
-        uint8 USBFS_PutUsbMidiIn(uint8 ic, const uint8 midiMsg[], uint8 cable)\r
-                                                                ;\r
-    #endif /* USBFS_MIDI_IN_BUFF_SIZE > 0 */\r
-\r
-    #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-        void USBFS_MIDI_OUT_EP_Service(void) ;\r
-    #endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */\r
-\r
-#endif /* End USBFS_ENABLE_MIDI_API != 0u */\r
-\r
-/* Renamed Functions for backward compatibility.\r
-*  Should not be used in new designs.\r
-*/\r
-\r
-#define USBFS_bCheckActivity             USBFS_CheckActivity\r
-#define USBFS_bGetConfiguration          USBFS_GetConfiguration\r
-#define USBFS_bGetInterfaceSetting       USBFS_GetInterfaceSetting\r
-#define USBFS_bGetEPState                USBFS_GetEPState\r
-#define USBFS_wGetEPCount                USBFS_GetEPCount\r
-#define USBFS_bGetEPAckState             USBFS_GetEPAckState\r
-#define USBFS_bRWUEnabled                USBFS_RWUEnabled\r
-#define USBFS_bVBusPresent               USBFS_VBusPresent\r
-\r
-#define USBFS_bConfiguration             USBFS_configuration\r
-#define USBFS_bInterfaceSetting          USBFS_interfaceSetting\r
-#define USBFS_bDeviceAddress             USBFS_deviceAddress\r
-#define USBFS_bDeviceStatus              USBFS_deviceStatus\r
-#define USBFS_bDevice                    USBFS_device\r
-#define USBFS_bTransferState             USBFS_transferState\r
-#define USBFS_bLastPacketSize            USBFS_lastPacketSize\r
-\r
-#define USBFS_LoadEP                     USBFS_LoadInEP\r
-#define USBFS_LoadInISOCEP               USBFS_LoadInEP\r
-#define USBFS_EnableOutISOCEP            USBFS_EnableOutEP\r
-\r
-#define USBFS_SetVector                  CyIntSetVector\r
-#define USBFS_SetPriority                CyIntSetPriority\r
-#define USBFS_EnableInt                  CyIntEnable\r
-\r
-\r
-/***************************************\r
-*          API Constants\r
-***************************************/\r
-\r
-#define USBFS_EP0                        (0u)\r
-#define USBFS_EP1                        (1u)\r
-#define USBFS_EP2                        (2u)\r
-#define USBFS_EP3                        (3u)\r
-#define USBFS_EP4                        (4u)\r
-#define USBFS_EP5                        (5u)\r
-#define USBFS_EP6                        (6u)\r
-#define USBFS_EP7                        (7u)\r
-#define USBFS_EP8                        (8u)\r
-#define USBFS_MAX_EP                     (9u)\r
-\r
-#define USBFS_TRUE                       (1u)\r
-#define USBFS_FALSE                      (0u)\r
-\r
-#define USBFS_NO_EVENT_ALLOWED           (2u)\r
-#define USBFS_EVENT_PENDING              (1u)\r
-#define USBFS_NO_EVENT_PENDING           (0u)\r
-\r
-#define USBFS_IN_BUFFER_FULL             USBFS_NO_EVENT_PENDING\r
-#define USBFS_IN_BUFFER_EMPTY            USBFS_EVENT_PENDING\r
-#define USBFS_OUT_BUFFER_FULL            USBFS_EVENT_PENDING\r
-#define USBFS_OUT_BUFFER_EMPTY           USBFS_NO_EVENT_PENDING\r
-\r
-#define USBFS_FORCE_J                    (0xA0u)\r
-#define USBFS_FORCE_K                    (0x80u)\r
-#define USBFS_FORCE_SE0                  (0xC0u)\r
-#define USBFS_FORCE_NONE                 (0x00u)\r
-\r
-#define USBFS_IDLE_TIMER_RUNNING         (0x02u)\r
-#define USBFS_IDLE_TIMER_EXPIRED         (0x01u)\r
-#define USBFS_IDLE_TIMER_INDEFINITE      (0x00u)\r
-\r
-#define USBFS_DEVICE_STATUS_BUS_POWERED  (0x00u)\r
-#define USBFS_DEVICE_STATUS_SELF_POWERED (0x01u)\r
-\r
-#define USBFS_3V_OPERATION               (0x00u)\r
-#define USBFS_5V_OPERATION               (0x01u)\r
-#define USBFS_DWR_VDDD_OPERATION         (0x02u)\r
-\r
-#define USBFS_MODE_DISABLE               (0x00u)\r
-#define USBFS_MODE_NAK_IN_OUT            (0x01u)\r
-#define USBFS_MODE_STATUS_OUT_ONLY       (0x02u)\r
-#define USBFS_MODE_STALL_IN_OUT          (0x03u)\r
-#define USBFS_MODE_RESERVED_0100         (0x04u)\r
-#define USBFS_MODE_ISO_OUT               (0x05u)\r
-#define USBFS_MODE_STATUS_IN_ONLY        (0x06u)\r
-#define USBFS_MODE_ISO_IN                (0x07u)\r
-#define USBFS_MODE_NAK_OUT               (0x08u)\r
-#define USBFS_MODE_ACK_OUT               (0x09u)\r
-#define USBFS_MODE_RESERVED_1010         (0x0Au)\r
-#define USBFS_MODE_ACK_OUT_STATUS_IN     (0x0Bu)\r
-#define USBFS_MODE_NAK_IN                (0x0Cu)\r
-#define USBFS_MODE_ACK_IN                (0x0Du)\r
-#define USBFS_MODE_RESERVED_1110         (0x0Eu)\r
-#define USBFS_MODE_ACK_IN_STATUS_OUT     (0x0Fu)\r
-#define USBFS_MODE_MASK                  (0x0Fu)\r
-#define USBFS_MODE_STALL_DATA_EP         (0x80u)\r
-\r
-#define USBFS_MODE_ACKD                  (0x10u)\r
-#define USBFS_MODE_OUT_RCVD              (0x20u)\r
-#define USBFS_MODE_IN_RCVD               (0x40u)\r
-#define USBFS_MODE_SETUP_RCVD            (0x80u)\r
-\r
-#define USBFS_RQST_TYPE_MASK             (0x60u)\r
-#define USBFS_RQST_TYPE_STD              (0x00u)\r
-#define USBFS_RQST_TYPE_CLS              (0x20u)\r
-#define USBFS_RQST_TYPE_VND              (0x40u)\r
-#define USBFS_RQST_DIR_MASK              (0x80u)\r
-#define USBFS_RQST_DIR_D2H               (0x80u)\r
-#define USBFS_RQST_DIR_H2D               (0x00u)\r
-#define USBFS_RQST_RCPT_MASK             (0x03u)\r
-#define USBFS_RQST_RCPT_DEV              (0x00u)\r
-#define USBFS_RQST_RCPT_IFC              (0x01u)\r
-#define USBFS_RQST_RCPT_EP               (0x02u)\r
-#define USBFS_RQST_RCPT_OTHER            (0x03u)\r
-\r
-/* USB Class Codes */\r
-#define USBFS_CLASS_DEVICE               (0x00u)     /* Use class code info from Interface Descriptors */\r
-#define USBFS_CLASS_AUDIO                (0x01u)     /* Audio device */\r
-#define USBFS_CLASS_CDC                  (0x02u)     /* Communication device class */\r
-#define USBFS_CLASS_HID                  (0x03u)     /* Human Interface Device */\r
-#define USBFS_CLASS_PDC                  (0x05u)     /* Physical device class */\r
-#define USBFS_CLASS_IMAGE                (0x06u)     /* Still Imaging device */\r
-#define USBFS_CLASS_PRINTER              (0x07u)     /* Printer device  */\r
-#define USBFS_CLASS_MSD                  (0x08u)     /* Mass Storage device  */\r
-#define USBFS_CLASS_HUB                  (0x09u)     /* Full/Hi speed Hub */\r
-#define USBFS_CLASS_CDC_DATA             (0x0Au)     /* CDC data device */\r
-#define USBFS_CLASS_SMART_CARD           (0x0Bu)     /* Smart Card device */\r
-#define USBFS_CLASS_CSD                  (0x0Du)     /* Content Security device */\r
-#define USBFS_CLASS_VIDEO                (0x0Eu)     /* Video device */\r
-#define USBFS_CLASS_PHD                  (0x0Fu)     /* Personal Healthcare device */\r
-#define USBFS_CLASS_WIRELESSD            (0xDCu)     /* Wireless Controller */\r
-#define USBFS_CLASS_MIS                  (0xE0u)     /* Miscellaneous */\r
-#define USBFS_CLASS_APP                  (0xEFu)     /* Application Specific */\r
-#define USBFS_CLASS_VENDOR               (0xFFu)     /* Vendor specific */\r
-\r
-\r
-/* Standard Request Types (Table 9-4) */\r
-#define USBFS_GET_STATUS                 (0x00u)\r
-#define USBFS_CLEAR_FEATURE              (0x01u)\r
-#define USBFS_SET_FEATURE                (0x03u)\r
-#define USBFS_SET_ADDRESS                (0x05u)\r
-#define USBFS_GET_DESCRIPTOR             (0x06u)\r
-#define USBFS_SET_DESCRIPTOR             (0x07u)\r
-#define USBFS_GET_CONFIGURATION          (0x08u)\r
-#define USBFS_SET_CONFIGURATION          (0x09u)\r
-#define USBFS_GET_INTERFACE              (0x0Au)\r
-#define USBFS_SET_INTERFACE              (0x0Bu)\r
-#define USBFS_SYNCH_FRAME                (0x0Cu)\r
-\r
-/* Vendor Specific Request Types */\r
-/* Request for Microsoft OS String Descriptor */\r
-#define USBFS_GET_EXTENDED_CONFIG_DESCRIPTOR (0x01u)\r
-\r
-/* Descriptor Types (Table 9-5) */\r
-#define USBFS_DESCR_DEVICE                   (1u)\r
-#define USBFS_DESCR_CONFIG                   (2u)\r
-#define USBFS_DESCR_STRING                   (3u)\r
-#define USBFS_DESCR_INTERFACE                (4u)\r
-#define USBFS_DESCR_ENDPOINT                 (5u)\r
-#define USBFS_DESCR_DEVICE_QUALIFIER         (6u)\r
-#define USBFS_DESCR_OTHER_SPEED              (7u)\r
-#define USBFS_DESCR_INTERFACE_POWER          (8u)\r
-\r
-/* Device Descriptor Defines */\r
-#define USBFS_DEVICE_DESCR_LENGTH            (18u)\r
-#define USBFS_DEVICE_DESCR_SN_SHIFT          (16u)\r
-\r
-/* Config Descriptor Shifts and Masks */\r
-#define USBFS_CONFIG_DESCR_LENGTH                (0u)\r
-#define USBFS_CONFIG_DESCR_TYPE                  (1u)\r
-#define USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW      (2u)\r
-#define USBFS_CONFIG_DESCR_TOTAL_LENGTH_HI       (3u)\r
-#define USBFS_CONFIG_DESCR_NUM_INTERFACES        (4u)\r
-#define USBFS_CONFIG_DESCR_CONFIG_VALUE          (5u)\r
-#define USBFS_CONFIG_DESCR_CONFIGURATION         (6u)\r
-#define USBFS_CONFIG_DESCR_ATTRIB                (7u)\r
-#define USBFS_CONFIG_DESCR_ATTRIB_SELF_POWERED   (0x40u)\r
-#define USBFS_CONFIG_DESCR_ATTRIB_RWU_EN         (0x20u)\r
-\r
-/* Feature Selectors (Table 9-6) */\r
-#define USBFS_DEVICE_REMOTE_WAKEUP           (0x01u)\r
-#define USBFS_ENDPOINT_HALT                  (0x00u)\r
-#define USBFS_TEST_MODE                      (0x02u)\r
-\r
-/* USB Device Status (Figure 9-4) */\r
-#define USBFS_DEVICE_STATUS_BUS_POWERED      (0x00u)\r
-#define USBFS_DEVICE_STATUS_SELF_POWERED     (0x01u)\r
-#define USBFS_DEVICE_STATUS_REMOTE_WAKEUP    (0x02u)\r
-\r
-/* USB Endpoint Status (Figure 9-4) */\r
-#define USBFS_ENDPOINT_STATUS_HALT           (0x01u)\r
-\r
-/* USB Endpoint Directions */\r
-#define USBFS_DIR_IN                         (0x80u)\r
-#define USBFS_DIR_OUT                        (0x00u)\r
-#define USBFS_DIR_UNUSED                     (0x7Fu)\r
-\r
-/* USB Endpoint Attributes */\r
-#define USBFS_EP_TYPE_CTRL                   (0x00u)\r
-#define USBFS_EP_TYPE_ISOC                   (0x01u)\r
-#define USBFS_EP_TYPE_BULK                   (0x02u)\r
-#define USBFS_EP_TYPE_INT                    (0x03u)\r
-#define USBFS_EP_TYPE_MASK                   (0x03u)\r
-\r
-#define USBFS_EP_SYNC_TYPE_NO_SYNC           (0x00u)\r
-#define USBFS_EP_SYNC_TYPE_ASYNC             (0x04u)\r
-#define USBFS_EP_SYNC_TYPE_ADAPTIVE          (0x08u)\r
-#define USBFS_EP_SYNC_TYPE_SYNCHRONOUS       (0x0Cu)\r
-#define USBFS_EP_SYNC_TYPE_MASK              (0x0Cu)\r
-\r
-#define USBFS_EP_USAGE_TYPE_DATA             (0x00u)\r
-#define USBFS_EP_USAGE_TYPE_FEEDBACK         (0x10u)\r
-#define USBFS_EP_USAGE_TYPE_IMPLICIT         (0x20u)\r
-#define USBFS_EP_USAGE_TYPE_RESERVED         (0x30u)\r
-#define USBFS_EP_USAGE_TYPE_MASK             (0x30u)\r
-\r
-/* Endpoint Status defines */\r
-#define USBFS_EP_STATUS_LENGTH               (0x02u)\r
-\r
-/* Endpoint Device defines */\r
-#define USBFS_DEVICE_STATUS_LENGTH           (0x02u)\r
-\r
-#define USBFS_STATUS_LENGTH_MAX \\r
-                 ( (USBFS_EP_STATUS_LENGTH > USBFS_DEVICE_STATUS_LENGTH) ? \\r
-                    USBFS_EP_STATUS_LENGTH : USBFS_DEVICE_STATUS_LENGTH )\r
-/* Transfer Completion Notification */\r
-#define USBFS_XFER_IDLE                      (0x00u)\r
-#define USBFS_XFER_STATUS_ACK                (0x01u)\r
-#define USBFS_XFER_PREMATURE                 (0x02u)\r
-#define USBFS_XFER_ERROR                     (0x03u)\r
-\r
-/* Driver State defines */\r
-#define USBFS_TRANS_STATE_IDLE               (0x00u)\r
-#define USBFS_TRANS_STATE_CONTROL_READ       (0x02u)\r
-#define USBFS_TRANS_STATE_CONTROL_WRITE      (0x04u)\r
-#define USBFS_TRANS_STATE_NO_DATA_CONTROL    (0x06u)\r
-\r
-/* String Descriptor defines */\r
-#define USBFS_STRING_MSOS                    (0xEEu)\r
-#define USBFS_MSOS_DESCRIPTOR_LENGTH         (18u)\r
-#define USBFS_MSOS_CONF_DESCR_LENGTH         (40u)\r
-\r
-#if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-    /* DMA manual mode defines */\r
-    #define USBFS_DMA_BYTES_PER_BURST        (0u)\r
-    #define USBFS_DMA_REQUEST_PER_BURST      (0u)\r
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-#if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-    /* DMA automatic mode defines */\r
-    #define USBFS_DMA_BYTES_PER_BURST        (32u)\r
-    /* BUF_SIZE-BYTES_PER_BURST examples: 55-32 bytes  44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */\r
-    #define USBFS_DMA_BUF_SIZE               (0x55u)\r
-    #define USBFS_DMA_REQUEST_PER_BURST      (1u)\r
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-\r
-/* DIE ID string descriptor defines */\r
-#if defined(USBFS_ENABLE_IDSN_STRING)\r
-    #define USBFS_IDSN_DESCR_LENGTH          (0x22u)\r
-#endif /* USBFS_ENABLE_IDSN_STRING */\r
-\r
-\r
-/***************************************\r
-* External data references\r
-***************************************/\r
-\r
-extern uint8 USBFS_initVar;\r
-extern volatile uint8 USBFS_device;\r
-extern volatile uint8 USBFS_transferState;\r
-extern volatile uint8 USBFS_configuration;\r
-extern volatile uint8 USBFS_configurationChanged;\r
-extern volatile uint8 USBFS_deviceStatus;\r
-\r
-/* HID Variables */\r
-#if defined(USBFS_ENABLE_HID_CLASS)\r
-    extern volatile uint8 USBFS_hidProtocol[USBFS_MAX_INTERFACES_NUMBER];\r
-    extern volatile uint8 USBFS_hidIdleRate[USBFS_MAX_INTERFACES_NUMBER];\r
-    extern volatile uint8 USBFS_hidIdleTimer[USBFS_MAX_INTERFACES_NUMBER];\r
-#endif /* USBFS_ENABLE_HID_CLASS */\r
-\r
-\r
-/***************************************\r
-*              Registers\r
-***************************************/\r
-\r
-#define USBFS_ARB_CFG_PTR        (  (reg8 *) USBFS_USB__ARB_CFG)\r
-#define USBFS_ARB_CFG_REG        (* (reg8 *) USBFS_USB__ARB_CFG)\r
-\r
-#define USBFS_ARB_EP1_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP1_CFG)\r
-#define USBFS_ARB_EP1_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP1_CFG)\r
-#define USBFS_ARB_EP1_CFG_IND    USBFS_USB__ARB_EP1_CFG\r
-#define USBFS_ARB_EP1_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP1_INT_EN)\r
-#define USBFS_ARB_EP1_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP1_INT_EN)\r
-#define USBFS_ARB_EP1_INT_EN_IND USBFS_USB__ARB_EP1_INT_EN\r
-#define USBFS_ARB_EP1_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP1_SR)\r
-#define USBFS_ARB_EP1_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP1_SR)\r
-#define USBFS_ARB_EP1_SR_IND     USBFS_USB__ARB_EP1_SR\r
-\r
-#define USBFS_ARB_EP2_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP2_CFG)\r
-#define USBFS_ARB_EP2_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP2_CFG)\r
-#define USBFS_ARB_EP2_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP2_INT_EN)\r
-#define USBFS_ARB_EP2_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP2_INT_EN)\r
-#define USBFS_ARB_EP2_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP2_SR)\r
-#define USBFS_ARB_EP2_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP2_SR)\r
-\r
-#define USBFS_ARB_EP3_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP3_CFG)\r
-#define USBFS_ARB_EP3_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP3_CFG)\r
-#define USBFS_ARB_EP3_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP3_INT_EN)\r
-#define USBFS_ARB_EP3_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP3_INT_EN)\r
-#define USBFS_ARB_EP3_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP3_SR)\r
-#define USBFS_ARB_EP3_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP3_SR)\r
-\r
-#define USBFS_ARB_EP4_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP4_CFG)\r
-#define USBFS_ARB_EP4_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP4_CFG)\r
-#define USBFS_ARB_EP4_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP4_INT_EN)\r
-#define USBFS_ARB_EP4_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP4_INT_EN)\r
-#define USBFS_ARB_EP4_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP4_SR)\r
-#define USBFS_ARB_EP4_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP4_SR)\r
-\r
-#define USBFS_ARB_EP5_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP5_CFG)\r
-#define USBFS_ARB_EP5_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP5_CFG)\r
-#define USBFS_ARB_EP5_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP5_INT_EN)\r
-#define USBFS_ARB_EP5_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP5_INT_EN)\r
-#define USBFS_ARB_EP5_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP5_SR)\r
-#define USBFS_ARB_EP5_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP5_SR)\r
-\r
-#define USBFS_ARB_EP6_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP6_CFG)\r
-#define USBFS_ARB_EP6_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP6_CFG)\r
-#define USBFS_ARB_EP6_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP6_INT_EN)\r
-#define USBFS_ARB_EP6_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP6_INT_EN)\r
-#define USBFS_ARB_EP6_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP6_SR)\r
-#define USBFS_ARB_EP6_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP6_SR)\r
-\r
-#define USBFS_ARB_EP7_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP7_CFG)\r
-#define USBFS_ARB_EP7_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP7_CFG)\r
-#define USBFS_ARB_EP7_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP7_INT_EN)\r
-#define USBFS_ARB_EP7_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP7_INT_EN)\r
-#define USBFS_ARB_EP7_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP7_SR)\r
-#define USBFS_ARB_EP7_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP7_SR)\r
-\r
-#define USBFS_ARB_EP8_CFG_PTR    (  (reg8 *) USBFS_USB__ARB_EP8_CFG)\r
-#define USBFS_ARB_EP8_CFG_REG    (* (reg8 *) USBFS_USB__ARB_EP8_CFG)\r
-#define USBFS_ARB_EP8_INT_EN_PTR (  (reg8 *) USBFS_USB__ARB_EP8_INT_EN)\r
-#define USBFS_ARB_EP8_INT_EN_REG (* (reg8 *) USBFS_USB__ARB_EP8_INT_EN)\r
-#define USBFS_ARB_EP8_SR_PTR     (  (reg8 *) USBFS_USB__ARB_EP8_SR)\r
-#define USBFS_ARB_EP8_SR_REG     (* (reg8 *) USBFS_USB__ARB_EP8_SR)\r
-\r
-#define USBFS_ARB_INT_EN_PTR     (  (reg8 *) USBFS_USB__ARB_INT_EN)\r
-#define USBFS_ARB_INT_EN_REG     (* (reg8 *) USBFS_USB__ARB_INT_EN)\r
-#define USBFS_ARB_INT_SR_PTR     (  (reg8 *) USBFS_USB__ARB_INT_SR)\r
-#define USBFS_ARB_INT_SR_REG     (* (reg8 *) USBFS_USB__ARB_INT_SR)\r
-\r
-#define USBFS_ARB_RW1_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW1_DR)\r
-#define USBFS_ARB_RW1_DR_IND     USBFS_USB__ARB_RW1_DR\r
-#define USBFS_ARB_RW1_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW1_RA)\r
-#define USBFS_ARB_RW1_RA_IND     USBFS_USB__ARB_RW1_RA\r
-#define USBFS_ARB_RW1_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW1_RA_MSB)\r
-#define USBFS_ARB_RW1_RA_MSB_IND USBFS_USB__ARB_RW1_RA_MSB\r
-#define USBFS_ARB_RW1_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW1_WA)\r
-#define USBFS_ARB_RW1_WA_IND     USBFS_USB__ARB_RW1_WA\r
-#define USBFS_ARB_RW1_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW1_WA_MSB)\r
-#define USBFS_ARB_RW1_WA_MSB_IND USBFS_USB__ARB_RW1_WA_MSB\r
-\r
-#define USBFS_ARB_RW2_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW2_DR)\r
-#define USBFS_ARB_RW2_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW2_RA)\r
-#define USBFS_ARB_RW2_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW2_RA_MSB)\r
-#define USBFS_ARB_RW2_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW2_WA)\r
-#define USBFS_ARB_RW2_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW2_WA_MSB)\r
-\r
-#define USBFS_ARB_RW3_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW3_DR)\r
-#define USBFS_ARB_RW3_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW3_RA)\r
-#define USBFS_ARB_RW3_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW3_RA_MSB)\r
-#define USBFS_ARB_RW3_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW3_WA)\r
-#define USBFS_ARB_RW3_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW3_WA_MSB)\r
-\r
-#define USBFS_ARB_RW4_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW4_DR)\r
-#define USBFS_ARB_RW4_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW4_RA)\r
-#define USBFS_ARB_RW4_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW4_RA_MSB)\r
-#define USBFS_ARB_RW4_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW4_WA)\r
-#define USBFS_ARB_RW4_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW4_WA_MSB)\r
-\r
-#define USBFS_ARB_RW5_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW5_DR)\r
-#define USBFS_ARB_RW5_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW5_RA)\r
-#define USBFS_ARB_RW5_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW5_RA_MSB)\r
-#define USBFS_ARB_RW5_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW5_WA)\r
-#define USBFS_ARB_RW5_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW5_WA_MSB)\r
-\r
-#define USBFS_ARB_RW6_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW6_DR)\r
-#define USBFS_ARB_RW6_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW6_RA)\r
-#define USBFS_ARB_RW6_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW6_RA_MSB)\r
-#define USBFS_ARB_RW6_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW6_WA)\r
-#define USBFS_ARB_RW6_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW6_WA_MSB)\r
-\r
-#define USBFS_ARB_RW7_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW7_DR)\r
-#define USBFS_ARB_RW7_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW7_RA)\r
-#define USBFS_ARB_RW7_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW7_RA_MSB)\r
-#define USBFS_ARB_RW7_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW7_WA)\r
-#define USBFS_ARB_RW7_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW7_WA_MSB)\r
-\r
-#define USBFS_ARB_RW8_DR_PTR     ((reg8 *) USBFS_USB__ARB_RW8_DR)\r
-#define USBFS_ARB_RW8_RA_PTR     ((reg8 *) USBFS_USB__ARB_RW8_RA)\r
-#define USBFS_ARB_RW8_RA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW8_RA_MSB)\r
-#define USBFS_ARB_RW8_WA_PTR     ((reg8 *) USBFS_USB__ARB_RW8_WA)\r
-#define USBFS_ARB_RW8_WA_MSB_PTR ((reg8 *) USBFS_USB__ARB_RW8_WA_MSB)\r
-\r
-#define USBFS_BUF_SIZE_PTR       (  (reg8 *) USBFS_USB__BUF_SIZE)\r
-#define USBFS_BUF_SIZE_REG       (* (reg8 *) USBFS_USB__BUF_SIZE)\r
-#define USBFS_BUS_RST_CNT_PTR    (  (reg8 *) USBFS_USB__BUS_RST_CNT)\r
-#define USBFS_BUS_RST_CNT_REG    (* (reg8 *) USBFS_USB__BUS_RST_CNT)\r
-#define USBFS_CWA_PTR            (  (reg8 *) USBFS_USB__CWA)\r
-#define USBFS_CWA_REG            (* (reg8 *) USBFS_USB__CWA)\r
-#define USBFS_CWA_MSB_PTR        (  (reg8 *) USBFS_USB__CWA_MSB)\r
-#define USBFS_CWA_MSB_REG        (* (reg8 *) USBFS_USB__CWA_MSB)\r
-#define USBFS_CR0_PTR            (  (reg8 *) USBFS_USB__CR0)\r
-#define USBFS_CR0_REG            (* (reg8 *) USBFS_USB__CR0)\r
-#define USBFS_CR1_PTR            (  (reg8 *) USBFS_USB__CR1)\r
-#define USBFS_CR1_REG            (* (reg8 *) USBFS_USB__CR1)\r
-\r
-#define USBFS_DMA_THRES_PTR      (  (reg8 *) USBFS_USB__DMA_THRES)\r
-#define USBFS_DMA_THRES_REG      (* (reg8 *) USBFS_USB__DMA_THRES)\r
-#define USBFS_DMA_THRES_MSB_PTR  (  (reg8 *) USBFS_USB__DMA_THRES_MSB)\r
-#define USBFS_DMA_THRES_MSB_REG  (* (reg8 *) USBFS_USB__DMA_THRES_MSB)\r
-\r
-#define USBFS_EP_ACTIVE_PTR      (  (reg8 *) USBFS_USB__EP_ACTIVE)\r
-#define USBFS_EP_ACTIVE_REG      (* (reg8 *) USBFS_USB__EP_ACTIVE)\r
-#define USBFS_EP_TYPE_PTR        (  (reg8 *) USBFS_USB__EP_TYPE)\r
-#define USBFS_EP_TYPE_REG        (* (reg8 *) USBFS_USB__EP_TYPE)\r
-\r
-#define USBFS_EP0_CNT_PTR        (  (reg8 *) USBFS_USB__EP0_CNT)\r
-#define USBFS_EP0_CNT_REG        (* (reg8 *) USBFS_USB__EP0_CNT)\r
-#define USBFS_EP0_CR_PTR         (  (reg8 *) USBFS_USB__EP0_CR)\r
-#define USBFS_EP0_CR_REG         (* (reg8 *) USBFS_USB__EP0_CR)\r
-#define USBFS_EP0_DR0_PTR        (  (reg8 *) USBFS_USB__EP0_DR0)\r
-#define USBFS_EP0_DR0_REG        (* (reg8 *) USBFS_USB__EP0_DR0)\r
-#define USBFS_EP0_DR0_IND        USBFS_USB__EP0_DR0\r
-#define USBFS_EP0_DR1_PTR        (  (reg8 *) USBFS_USB__EP0_DR1)\r
-#define USBFS_EP0_DR1_REG        (* (reg8 *) USBFS_USB__EP0_DR1)\r
-#define USBFS_EP0_DR2_PTR        (  (reg8 *) USBFS_USB__EP0_DR2)\r
-#define USBFS_EP0_DR2_REG        (* (reg8 *) USBFS_USB__EP0_DR2)\r
-#define USBFS_EP0_DR3_PTR        (  (reg8 *) USBFS_USB__EP0_DR3)\r
-#define USBFS_EP0_DR3_REG        (* (reg8 *) USBFS_USB__EP0_DR3)\r
-#define USBFS_EP0_DR4_PTR        (  (reg8 *) USBFS_USB__EP0_DR4)\r
-#define USBFS_EP0_DR4_REG        (* (reg8 *) USBFS_USB__EP0_DR4)\r
-#define USBFS_EP0_DR5_PTR        (  (reg8 *) USBFS_USB__EP0_DR5)\r
-#define USBFS_EP0_DR5_REG        (* (reg8 *) USBFS_USB__EP0_DR5)\r
-#define USBFS_EP0_DR6_PTR        (  (reg8 *) USBFS_USB__EP0_DR6)\r
-#define USBFS_EP0_DR6_REG        (* (reg8 *) USBFS_USB__EP0_DR6)\r
-#define USBFS_EP0_DR7_PTR        (  (reg8 *) USBFS_USB__EP0_DR7)\r
-#define USBFS_EP0_DR7_REG        (* (reg8 *) USBFS_USB__EP0_DR7)\r
-\r
-#define USBFS_OSCLK_DR0_PTR      (  (reg8 *) USBFS_USB__OSCLK_DR0)\r
-#define USBFS_OSCLK_DR0_REG      (* (reg8 *) USBFS_USB__OSCLK_DR0)\r
-#define USBFS_OSCLK_DR1_PTR      (  (reg8 *) USBFS_USB__OSCLK_DR1)\r
-#define USBFS_OSCLK_DR1_REG      (* (reg8 *) USBFS_USB__OSCLK_DR1)\r
-\r
-#define USBFS_PM_ACT_CFG_PTR     (  (reg8 *) USBFS_USB__PM_ACT_CFG)\r
-#define USBFS_PM_ACT_CFG_REG     (* (reg8 *) USBFS_USB__PM_ACT_CFG)\r
-#define USBFS_PM_STBY_CFG_PTR    (  (reg8 *) USBFS_USB__PM_STBY_CFG)\r
-#define USBFS_PM_STBY_CFG_REG    (* (reg8 *) USBFS_USB__PM_STBY_CFG)\r
-\r
-#define USBFS_SIE_EP_INT_EN_PTR  (  (reg8 *) USBFS_USB__SIE_EP_INT_EN)\r
-#define USBFS_SIE_EP_INT_EN_REG  (* (reg8 *) USBFS_USB__SIE_EP_INT_EN)\r
-#define USBFS_SIE_EP_INT_SR_PTR  (  (reg8 *) USBFS_USB__SIE_EP_INT_SR)\r
-#define USBFS_SIE_EP_INT_SR_REG  (* (reg8 *) USBFS_USB__SIE_EP_INT_SR)\r
-\r
-#define USBFS_SIE_EP1_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP1_CNT0)\r
-#define USBFS_SIE_EP1_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP1_CNT0)\r
-#define USBFS_SIE_EP1_CNT0_IND   USBFS_USB__SIE_EP1_CNT0\r
-#define USBFS_SIE_EP1_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP1_CNT1)\r
-#define USBFS_SIE_EP1_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP1_CNT1)\r
-#define USBFS_SIE_EP1_CNT1_IND   USBFS_USB__SIE_EP1_CNT1\r
-#define USBFS_SIE_EP1_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP1_CR0)\r
-#define USBFS_SIE_EP1_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP1_CR0)\r
-#define USBFS_SIE_EP1_CR0_IND    USBFS_USB__SIE_EP1_CR0\r
-\r
-#define USBFS_SIE_EP2_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP2_CNT0)\r
-#define USBFS_SIE_EP2_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP2_CNT0)\r
-#define USBFS_SIE_EP2_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP2_CNT1)\r
-#define USBFS_SIE_EP2_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP2_CNT1)\r
-#define USBFS_SIE_EP2_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP2_CR0)\r
-#define USBFS_SIE_EP2_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP2_CR0)\r
-\r
-#define USBFS_SIE_EP3_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP3_CNT0)\r
-#define USBFS_SIE_EP3_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP3_CNT0)\r
-#define USBFS_SIE_EP3_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP3_CNT1)\r
-#define USBFS_SIE_EP3_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP3_CNT1)\r
-#define USBFS_SIE_EP3_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP3_CR0)\r
-#define USBFS_SIE_EP3_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP3_CR0)\r
-\r
-#define USBFS_SIE_EP4_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP4_CNT0)\r
-#define USBFS_SIE_EP4_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP4_CNT0)\r
-#define USBFS_SIE_EP4_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP4_CNT1)\r
-#define USBFS_SIE_EP4_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP4_CNT1)\r
-#define USBFS_SIE_EP4_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP4_CR0)\r
-#define USBFS_SIE_EP4_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP4_CR0)\r
-\r
-#define USBFS_SIE_EP5_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP5_CNT0)\r
-#define USBFS_SIE_EP5_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP5_CNT0)\r
-#define USBFS_SIE_EP5_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP5_CNT1)\r
-#define USBFS_SIE_EP5_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP5_CNT1)\r
-#define USBFS_SIE_EP5_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP5_CR0)\r
-#define USBFS_SIE_EP5_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP5_CR0)\r
-\r
-#define USBFS_SIE_EP6_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP6_CNT0)\r
-#define USBFS_SIE_EP6_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP6_CNT0)\r
-#define USBFS_SIE_EP6_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP6_CNT1)\r
-#define USBFS_SIE_EP6_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP6_CNT1)\r
-#define USBFS_SIE_EP6_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP6_CR0)\r
-#define USBFS_SIE_EP6_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP6_CR0)\r
-\r
-#define USBFS_SIE_EP7_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP7_CNT0)\r
-#define USBFS_SIE_EP7_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP7_CNT0)\r
-#define USBFS_SIE_EP7_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP7_CNT1)\r
-#define USBFS_SIE_EP7_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP7_CNT1)\r
-#define USBFS_SIE_EP7_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP7_CR0)\r
-#define USBFS_SIE_EP7_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP7_CR0)\r
-\r
-#define USBFS_SIE_EP8_CNT0_PTR   (  (reg8 *) USBFS_USB__SIE_EP8_CNT0)\r
-#define USBFS_SIE_EP8_CNT0_REG   (* (reg8 *) USBFS_USB__SIE_EP8_CNT0)\r
-#define USBFS_SIE_EP8_CNT1_PTR   (  (reg8 *) USBFS_USB__SIE_EP8_CNT1)\r
-#define USBFS_SIE_EP8_CNT1_REG   (* (reg8 *) USBFS_USB__SIE_EP8_CNT1)\r
-#define USBFS_SIE_EP8_CR0_PTR    (  (reg8 *) USBFS_USB__SIE_EP8_CR0)\r
-#define USBFS_SIE_EP8_CR0_REG    (* (reg8 *) USBFS_USB__SIE_EP8_CR0)\r
-\r
-#define USBFS_SOF0_PTR           (  (reg8 *) USBFS_USB__SOF0)\r
-#define USBFS_SOF0_REG           (* (reg8 *) USBFS_USB__SOF0)\r
-#define USBFS_SOF1_PTR           (  (reg8 *) USBFS_USB__SOF1)\r
-#define USBFS_SOF1_REG           (* (reg8 *) USBFS_USB__SOF1)\r
-\r
-#define USBFS_USB_CLK_EN_PTR     (  (reg8 *) USBFS_USB__USB_CLK_EN)\r
-#define USBFS_USB_CLK_EN_REG     (* (reg8 *) USBFS_USB__USB_CLK_EN)\r
-\r
-#define USBFS_USBIO_CR0_PTR      (  (reg8 *) USBFS_USB__USBIO_CR0)\r
-#define USBFS_USBIO_CR0_REG      (* (reg8 *) USBFS_USB__USBIO_CR0)\r
-#define USBFS_USBIO_CR1_PTR      (  (reg8 *) USBFS_USB__USBIO_CR1)\r
-#define USBFS_USBIO_CR1_REG      (* (reg8 *) USBFS_USB__USBIO_CR1)\r
-#if(!CY_PSOC5LP)\r
-    #define USBFS_USBIO_CR2_PTR      (  (reg8 *) USBFS_USB__USBIO_CR2)\r
-    #define USBFS_USBIO_CR2_REG      (* (reg8 *) USBFS_USB__USBIO_CR2)\r
-#endif /* End CY_PSOC5LP */\r
-\r
-#define USBFS_DIE_ID             CYDEV_FLSHID_CUST_TABLES_BASE\r
-\r
-#define USBFS_PM_USB_CR0_PTR     (  (reg8 *) CYREG_PM_USB_CR0)\r
-#define USBFS_PM_USB_CR0_REG     (* (reg8 *) CYREG_PM_USB_CR0)\r
-#define USBFS_DYN_RECONFIG_PTR   (  (reg8 *) USBFS_USB__DYN_RECONFIG)\r
-#define USBFS_DYN_RECONFIG_REG   (* (reg8 *) USBFS_USB__DYN_RECONFIG)\r
-\r
-#define USBFS_DM_INP_DIS_PTR     (  (reg8 *) USBFS_Dm__INP_DIS)\r
-#define USBFS_DM_INP_DIS_REG     (* (reg8 *) USBFS_Dm__INP_DIS)\r
-#define USBFS_DP_INP_DIS_PTR     (  (reg8 *) USBFS_Dp__INP_DIS)\r
-#define USBFS_DP_INP_DIS_REG     (* (reg8 *) USBFS_Dp__INP_DIS)\r
-#define USBFS_DP_INTSTAT_PTR     (  (reg8 *) USBFS_Dp__INTSTAT)\r
-#define USBFS_DP_INTSTAT_REG     (* (reg8 *) USBFS_Dp__INTSTAT)\r
-\r
-#if (USBFS_MON_VBUS == 1u)\r
-    #if (USBFS_EXTERN_VBUS == 0u)\r
-        #define USBFS_VBUS_DR_PTR        (  (reg8 *) USBFS_VBUS__DR)\r
-        #define USBFS_VBUS_DR_REG        (* (reg8 *) USBFS_VBUS__DR)\r
-        #define USBFS_VBUS_PS_PTR        (  (reg8 *) USBFS_VBUS__PS)\r
-        #define USBFS_VBUS_PS_REG        (* (reg8 *) USBFS_VBUS__PS)\r
-        #define USBFS_VBUS_MASK          USBFS_VBUS__MASK\r
-    #else\r
-        #define USBFS_VBUS_PS_PTR        (  (reg8 *) USBFS_Vbus_ps_sts_sts_reg__STATUS_REG )\r
-        #define USBFS_VBUS_MASK          (0x01u)\r
-    #endif /* End USBFS_EXTERN_VBUS == 0u */\r
-#endif /* End USBFS_MON_VBUS */\r
-\r
-/* Renamed Registers for backward compatibility.\r
-*  Should not be used in new designs.\r
-*/\r
-#define USBFS_ARB_CFG        USBFS_ARB_CFG_PTR\r
-\r
-#define USBFS_ARB_EP1_CFG    USBFS_ARB_EP1_CFG_PTR\r
-#define USBFS_ARB_EP1_INT_EN USBFS_ARB_EP1_INT_EN_PTR\r
-#define USBFS_ARB_EP1_SR     USBFS_ARB_EP1_SR_PTR\r
-\r
-#define USBFS_ARB_EP2_CFG    USBFS_ARB_EP2_CFG_PTR\r
-#define USBFS_ARB_EP2_INT_EN USBFS_ARB_EP2_INT_EN_PTR\r
-#define USBFS_ARB_EP2_SR     USBFS_ARB_EP2_SR_PTR\r
-\r
-#define USBFS_ARB_EP3_CFG    USBFS_ARB_EP3_CFG_PTR\r
-#define USBFS_ARB_EP3_INT_EN USBFS_ARB_EP3_INT_EN_PTR\r
-#define USBFS_ARB_EP3_SR     USBFS_ARB_EP3_SR_PTR\r
-\r
-#define USBFS_ARB_EP4_CFG    USBFS_ARB_EP4_CFG_PTR\r
-#define USBFS_ARB_EP4_INT_EN USBFS_ARB_EP4_INT_EN_PTR\r
-#define USBFS_ARB_EP4_SR     USBFS_ARB_EP4_SR_PTR\r
-\r
-#define USBFS_ARB_EP5_CFG    USBFS_ARB_EP5_CFG_PTR\r
-#define USBFS_ARB_EP5_INT_EN USBFS_ARB_EP5_INT_EN_PTR\r
-#define USBFS_ARB_EP5_SR     USBFS_ARB_EP5_SR_PTR\r
-\r
-#define USBFS_ARB_EP6_CFG    USBFS_ARB_EP6_CFG_PTR\r
-#define USBFS_ARB_EP6_INT_EN USBFS_ARB_EP6_INT_EN_PTR\r
-#define USBFS_ARB_EP6_SR     USBFS_ARB_EP6_SR_PTR\r
-\r
-#define USBFS_ARB_EP7_CFG    USBFS_ARB_EP7_CFG_PTR\r
-#define USBFS_ARB_EP7_INT_EN USBFS_ARB_EP7_INT_EN_PTR\r
-#define USBFS_ARB_EP7_SR     USBFS_ARB_EP7_SR_PTR\r
-\r
-#define USBFS_ARB_EP8_CFG    USBFS_ARB_EP8_CFG_PTR\r
-#define USBFS_ARB_EP8_INT_EN USBFS_ARB_EP8_INT_EN_PTR\r
-#define USBFS_ARB_EP8_SR     USBFS_ARB_EP8_SR_PTR\r
-\r
-#define USBFS_ARB_INT_EN     USBFS_ARB_INT_EN_PTR\r
-#define USBFS_ARB_INT_SR     USBFS_ARB_INT_SR_PTR\r
-\r
-#define USBFS_ARB_RW1_DR     USBFS_ARB_RW1_DR_PTR\r
-#define USBFS_ARB_RW1_RA     USBFS_ARB_RW1_RA_PTR\r
-#define USBFS_ARB_RW1_RA_MSB USBFS_ARB_RW1_RA_MSB_PTR\r
-#define USBFS_ARB_RW1_WA     USBFS_ARB_RW1_WA_PTR\r
-#define USBFS_ARB_RW1_WA_MSB USBFS_ARB_RW1_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW2_DR     USBFS_ARB_RW2_DR_PTR\r
-#define USBFS_ARB_RW2_RA     USBFS_ARB_RW2_RA_PTR\r
-#define USBFS_ARB_RW2_RA_MSB USBFS_ARB_RW2_RA_MSB_PTR\r
-#define USBFS_ARB_RW2_WA     USBFS_ARB_RW2_WA_PTR\r
-#define USBFS_ARB_RW2_WA_MSB USBFS_ARB_RW2_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW3_DR     USBFS_ARB_RW3_DR_PTR\r
-#define USBFS_ARB_RW3_RA     USBFS_ARB_RW3_RA_PTR\r
-#define USBFS_ARB_RW3_RA_MSB USBFS_ARB_RW3_RA_MSB_PTR\r
-#define USBFS_ARB_RW3_WA     USBFS_ARB_RW3_WA_PTR\r
-#define USBFS_ARB_RW3_WA_MSB USBFS_ARB_RW3_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW4_DR     USBFS_ARB_RW4_DR_PTR\r
-#define USBFS_ARB_RW4_RA     USBFS_ARB_RW4_RA_PTR\r
-#define USBFS_ARB_RW4_RA_MSB USBFS_ARB_RW4_RA_MSB_PTR\r
-#define USBFS_ARB_RW4_WA     USBFS_ARB_RW4_WA_PTR\r
-#define USBFS_ARB_RW4_WA_MSB USBFS_ARB_RW4_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW5_DR     USBFS_ARB_RW5_DR_PTR\r
-#define USBFS_ARB_RW5_RA     USBFS_ARB_RW5_RA_PTR\r
-#define USBFS_ARB_RW5_RA_MSB USBFS_ARB_RW5_RA_MSB_PTR\r
-#define USBFS_ARB_RW5_WA     USBFS_ARB_RW5_WA_PTR\r
-#define USBFS_ARB_RW5_WA_MSB USBFS_ARB_RW5_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW6_DR     USBFS_ARB_RW6_DR_PTR\r
-#define USBFS_ARB_RW6_RA     USBFS_ARB_RW6_RA_PTR\r
-#define USBFS_ARB_RW6_RA_MSB USBFS_ARB_RW6_RA_MSB_PTR\r
-#define USBFS_ARB_RW6_WA     USBFS_ARB_RW6_WA_PTR\r
-#define USBFS_ARB_RW6_WA_MSB USBFS_ARB_RW6_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW7_DR     USBFS_ARB_RW7_DR_PTR\r
-#define USBFS_ARB_RW7_RA     USBFS_ARB_RW7_RA_PTR\r
-#define USBFS_ARB_RW7_RA_MSB USBFS_ARB_RW7_RA_MSB_PTR\r
-#define USBFS_ARB_RW7_WA     USBFS_ARB_RW7_WA_PTR\r
-#define USBFS_ARB_RW7_WA_MSB USBFS_ARB_RW7_WA_MSB_PTR\r
-\r
-#define USBFS_ARB_RW8_DR     USBFS_ARB_RW8_DR_PTR\r
-#define USBFS_ARB_RW8_RA     USBFS_ARB_RW8_RA_PTR\r
-#define USBFS_ARB_RW8_RA_MSB USBFS_ARB_RW8_RA_MSB_PTR\r
-#define USBFS_ARB_RW8_WA     USBFS_ARB_RW8_WA_PTR\r
-#define USBFS_ARB_RW8_WA_MSB USBFS_ARB_RW8_WA_MSB_PTR\r
-\r
-#define USBFS_BUF_SIZE       USBFS_BUF_SIZE_PTR\r
-#define USBFS_BUS_RST_CNT    USBFS_BUS_RST_CNT_PTR\r
-#define USBFS_CR0            USBFS_CR0_PTR\r
-#define USBFS_CR1            USBFS_CR1_PTR\r
-#define USBFS_CWA            USBFS_CWA_PTR\r
-#define USBFS_CWA_MSB        USBFS_CWA_MSB_PTR\r
-\r
-#define USBFS_DMA_THRES      USBFS_DMA_THRES_PTR\r
-#define USBFS_DMA_THRES_MSB  USBFS_DMA_THRES_MSB_PTR\r
-\r
-#define USBFS_EP_ACTIVE      USBFS_EP_ACTIVE_PTR\r
-#define USBFS_EP_TYPE        USBFS_EP_TYPE_PTR\r
-\r
-#define USBFS_EP0_CNT        USBFS_EP0_CNT_PTR\r
-#define USBFS_EP0_CR         USBFS_EP0_CR_PTR\r
-#define USBFS_EP0_DR0        USBFS_EP0_DR0_PTR\r
-#define USBFS_EP0_DR1        USBFS_EP0_DR1_PTR\r
-#define USBFS_EP0_DR2        USBFS_EP0_DR2_PTR\r
-#define USBFS_EP0_DR3        USBFS_EP0_DR3_PTR\r
-#define USBFS_EP0_DR4        USBFS_EP0_DR4_PTR\r
-#define USBFS_EP0_DR5        USBFS_EP0_DR5_PTR\r
-#define USBFS_EP0_DR6        USBFS_EP0_DR6_PTR\r
-#define USBFS_EP0_DR7        USBFS_EP0_DR7_PTR\r
-\r
-#define USBFS_OSCLK_DR0      USBFS_OSCLK_DR0_PTR\r
-#define USBFS_OSCLK_DR1      USBFS_OSCLK_DR1_PTR\r
-\r
-#define USBFS_PM_ACT_CFG     USBFS_PM_ACT_CFG_PTR\r
-#define USBFS_PM_STBY_CFG    USBFS_PM_STBY_CFG_PTR\r
-\r
-#define USBFS_SIE_EP_INT_EN  USBFS_SIE_EP_INT_EN_PTR\r
-#define USBFS_SIE_EP_INT_SR  USBFS_SIE_EP_INT_SR_PTR\r
-\r
-#define USBFS_SIE_EP1_CNT0   USBFS_SIE_EP1_CNT0_PTR\r
-#define USBFS_SIE_EP1_CNT1   USBFS_SIE_EP1_CNT1_PTR\r
-#define USBFS_SIE_EP1_CR0    USBFS_SIE_EP1_CR0_PTR\r
-\r
-#define USBFS_SIE_EP2_CNT0   USBFS_SIE_EP2_CNT0_PTR\r
-#define USBFS_SIE_EP2_CNT1   USBFS_SIE_EP2_CNT1_PTR\r
-#define USBFS_SIE_EP2_CR0    USBFS_SIE_EP2_CR0_PTR\r
-\r
-#define USBFS_SIE_EP3_CNT0   USBFS_SIE_EP3_CNT0_PTR\r
-#define USBFS_SIE_EP3_CNT1   USBFS_SIE_EP3_CNT1_PTR\r
-#define USBFS_SIE_EP3_CR0    USBFS_SIE_EP3_CR0_PTR\r
-\r
-#define USBFS_SIE_EP4_CNT0   USBFS_SIE_EP4_CNT0_PTR\r
-#define USBFS_SIE_EP4_CNT1   USBFS_SIE_EP4_CNT1_PTR\r
-#define USBFS_SIE_EP4_CR0    USBFS_SIE_EP4_CR0_PTR\r
-\r
-#define USBFS_SIE_EP5_CNT0   USBFS_SIE_EP5_CNT0_PTR\r
-#define USBFS_SIE_EP5_CNT1   USBFS_SIE_EP5_CNT1_PTR\r
-#define USBFS_SIE_EP5_CR0    USBFS_SIE_EP5_CR0_PTR\r
-\r
-#define USBFS_SIE_EP6_CNT0   USBFS_SIE_EP6_CNT0_PTR\r
-#define USBFS_SIE_EP6_CNT1   USBFS_SIE_EP6_CNT1_PTR\r
-#define USBFS_SIE_EP6_CR0    USBFS_SIE_EP6_CR0_PTR\r
-\r
-#define USBFS_SIE_EP7_CNT0   USBFS_SIE_EP7_CNT0_PTR\r
-#define USBFS_SIE_EP7_CNT1   USBFS_SIE_EP7_CNT1_PTR\r
-#define USBFS_SIE_EP7_CR0    USBFS_SIE_EP7_CR0_PTR\r
-\r
-#define USBFS_SIE_EP8_CNT0   USBFS_SIE_EP8_CNT0_PTR\r
-#define USBFS_SIE_EP8_CNT1   USBFS_SIE_EP8_CNT1_PTR\r
-#define USBFS_SIE_EP8_CR0    USBFS_SIE_EP8_CR0_PTR\r
-\r
-#define USBFS_SOF0           USBFS_SOF0_PTR\r
-#define USBFS_SOF1           USBFS_SOF1_PTR\r
-\r
-#define USBFS_USB_CLK_EN     USBFS_USB_CLK_EN_PTR\r
-\r
-#define USBFS_USBIO_CR0      USBFS_USBIO_CR0_PTR\r
-#define USBFS_USBIO_CR1      USBFS_USBIO_CR1_PTR\r
-#define USBFS_USBIO_CR2      USBFS_USBIO_CR2_PTR\r
-\r
-#define USBFS_USB_MEM        ((reg8 *) CYDEV_USB_MEM_BASE)\r
-\r
-#if(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_LEOPARD)\r
-    /* PSoC3 interrupt registers*/\r
-    #define USBFS_USB_ISR_PRIOR  ((reg8 *) CYDEV_INTC_PRIOR0)\r
-    #define USBFS_USB_ISR_SET_EN ((reg8 *) CYDEV_INTC_SET_EN0)\r
-    #define USBFS_USB_ISR_CLR_EN ((reg8 *) CYDEV_INTC_CLR_EN0)\r
-    #define USBFS_USB_ISR_VECT   ((cyisraddress *) CYDEV_INTC_VECT_MBASE)\r
-#elif(CYDEV_CHIP_DIE_EXPECT == CYDEV_CHIP_DIE_PANTHER)\r
-    /* PSoC5 interrupt registers*/\r
-    #define USBFS_USB_ISR_PRIOR  ((reg8 *) CYDEV_NVIC_PRI_0)\r
-    #define USBFS_USB_ISR_SET_EN ((reg8 *) CYDEV_NVIC_SETENA0)\r
-    #define USBFS_USB_ISR_CLR_EN ((reg8 *) CYDEV_NVIC_CLRENA0)\r
-    #define USBFS_USB_ISR_VECT   ((cyisraddress *) CYDEV_NVIC_VECT_OFFSET)\r
-#endif /* End CYDEV_CHIP_DIE_EXPECT */\r
-\r
-\r
-/***************************************\r
-* Interrupt vectors, masks and priorities\r
-***************************************/\r
-\r
-#define USBFS_BUS_RESET_PRIOR    USBFS_bus_reset__INTC_PRIOR_NUM\r
-#define USBFS_BUS_RESET_MASK     USBFS_bus_reset__INTC_MASK\r
-#define USBFS_BUS_RESET_VECT_NUM USBFS_bus_reset__INTC_NUMBER\r
-\r
-#define USBFS_SOF_PRIOR          USBFS_sof_int__INTC_PRIOR_NUM\r
-#define USBFS_SOF_MASK           USBFS_sof_int__INTC_MASK\r
-#define USBFS_SOF_VECT_NUM       USBFS_sof_int__INTC_NUMBER\r
-\r
-#define USBFS_EP_0_PRIOR         USBFS_ep_0__INTC_PRIOR_NUM\r
-#define USBFS_EP_0_MASK          USBFS_ep_0__INTC_MASK\r
-#define USBFS_EP_0_VECT_NUM      USBFS_ep_0__INTC_NUMBER\r
-\r
-#define USBFS_EP_1_PRIOR         USBFS_ep_1__INTC_PRIOR_NUM\r
-#define USBFS_EP_1_MASK          USBFS_ep_1__INTC_MASK\r
-#define USBFS_EP_1_VECT_NUM      USBFS_ep_1__INTC_NUMBER\r
-\r
-#define USBFS_EP_2_PRIOR         USBFS_ep_2__INTC_PRIOR_NUM\r
-#define USBFS_EP_2_MASK          USBFS_ep_2__INTC_MASK\r
-#define USBFS_EP_2_VECT_NUM      USBFS_ep_2__INTC_NUMBER\r
-\r
-#define USBFS_EP_3_PRIOR         USBFS_ep_3__INTC_PRIOR_NUM\r
-#define USBFS_EP_3_MASK          USBFS_ep_3__INTC_MASK\r
-#define USBFS_EP_3_VECT_NUM      USBFS_ep_3__INTC_NUMBER\r
-\r
-#define USBFS_EP_4_PRIOR         USBFS_ep_4__INTC_PRIOR_NUM\r
-#define USBFS_EP_4_MASK          USBFS_ep_4__INTC_MASK\r
-#define USBFS_EP_4_VECT_NUM      USBFS_ep_4__INTC_NUMBER\r
-\r
-#define USBFS_EP_5_PRIOR         USBFS_ep_5__INTC_PRIOR_NUM\r
-#define USBFS_EP_5_MASK          USBFS_ep_5__INTC_MASK\r
-#define USBFS_EP_5_VECT_NUM      USBFS_ep_5__INTC_NUMBER\r
-\r
-#define USBFS_EP_6_PRIOR         USBFS_ep_6__INTC_PRIOR_NUM\r
-#define USBFS_EP_6_MASK          USBFS_ep_6__INTC_MASK\r
-#define USBFS_EP_6_VECT_NUM      USBFS_ep_6__INTC_NUMBER\r
-\r
-#define USBFS_EP_7_PRIOR         USBFS_ep_7__INTC_PRIOR_NUM\r
-#define USBFS_EP_7_MASK          USBFS_ep_7__INTC_MASK\r
-#define USBFS_EP_7_VECT_NUM      USBFS_ep_7__INTC_NUMBER\r
-\r
-#define USBFS_EP_8_PRIOR         USBFS_ep_8__INTC_PRIOR_NUM\r
-#define USBFS_EP_8_MASK          USBFS_ep_8__INTC_MASK\r
-#define USBFS_EP_8_VECT_NUM      USBFS_ep_8__INTC_NUMBER\r
-\r
-#define USBFS_DP_INTC_PRIOR      USBFS_dp_int__INTC_PRIOR_NUM\r
-#define USBFS_DP_INTC_MASK       USBFS_dp_int__INTC_MASK\r
-#define USBFS_DP_INTC_VECT_NUM   USBFS_dp_int__INTC_NUMBER\r
-\r
-/* ARB ISR should have higher priority from EP_X ISR, therefore it is defined to highest (0) */\r
-#define USBFS_ARB_PRIOR          (0u)\r
-#define USBFS_ARB_MASK           USBFS_arb_int__INTC_MASK\r
-#define USBFS_ARB_VECT_NUM       USBFS_arb_int__INTC_NUMBER\r
-\r
-/***************************************\r
- *  Endpoint 0 offsets (Table 9-2)\r
- **************************************/\r
-\r
-#define USBFS_bmRequestType      USBFS_EP0_DR0_PTR\r
-#define USBFS_bRequest           USBFS_EP0_DR1_PTR\r
-#define USBFS_wValue             USBFS_EP0_DR2_PTR\r
-#define USBFS_wValueHi           USBFS_EP0_DR3_PTR\r
-#define USBFS_wValueLo           USBFS_EP0_DR2_PTR\r
-#define USBFS_wIndex             USBFS_EP0_DR4_PTR\r
-#define USBFS_wIndexHi           USBFS_EP0_DR5_PTR\r
-#define USBFS_wIndexLo           USBFS_EP0_DR4_PTR\r
-#define USBFS_length             USBFS_EP0_DR6_PTR\r
-#define USBFS_lengthHi           USBFS_EP0_DR7_PTR\r
-#define USBFS_lengthLo           USBFS_EP0_DR6_PTR\r
-\r
-\r
-/***************************************\r
-*       Register Constants\r
-***************************************/\r
-#define USBFS_VDDD_MV                    CYDEV_VDDD_MV\r
-#define USBFS_3500MV                     (3500u)\r
-\r
-#define USBFS_CR1_REG_ENABLE             (0x01u)\r
-#define USBFS_CR1_ENABLE_LOCK            (0x02u)\r
-#define USBFS_CR1_BUS_ACTIVITY_SHIFT     (0x02u)\r
-#define USBFS_CR1_BUS_ACTIVITY           ((uint8)(0x01u << USBFS_CR1_BUS_ACTIVITY_SHIFT))\r
-#define USBFS_CR1_TRIM_MSB_EN            (0x08u)\r
-\r
-#define USBFS_EP0_CNT_DATA_TOGGLE        (0x80u)\r
-#define USBFS_EPX_CNT_DATA_TOGGLE        (0x80u)\r
-#define USBFS_EPX_CNT0_MASK              (0x0Fu)\r
-#define USBFS_EPX_CNTX_MSB_MASK          (0x07u)\r
-#define USBFS_EPX_CNTX_ADDR_SHIFT        (0x04u)\r
-#define USBFS_EPX_CNTX_ADDR_OFFSET       (0x10u)\r
-#define USBFS_EPX_CNTX_CRC_COUNT         (0x02u)\r
-#define USBFS_EPX_DATA_BUF_MAX           (512u)\r
-\r
-#define USBFS_CR0_ENABLE                 (0x80u)\r
-\r
-/* A 100 KHz clock is used for BUS reset count. Recommended is to count 10 pulses */\r
-#define USBFS_BUS_RST_COUNT              (0x0au)\r
-\r
-#define USBFS_USBIO_CR1_IOMODE           (0x20u)\r
-#define USBFS_USBIO_CR1_USBPUEN          (0x04u)\r
-#define USBFS_USBIO_CR1_DP0              (0x02u)\r
-#define USBFS_USBIO_CR1_DM0              (0x01u)\r
-\r
-#define USBFS_USBIO_CR0_TEN              (0x80u)\r
-#define USBFS_USBIO_CR0_TSE0             (0x40u)\r
-#define USBFS_USBIO_CR0_TD               (0x20u)\r
-#define USBFS_USBIO_CR0_RD               (0x01u)\r
-\r
-#define USBFS_FASTCLK_IMO_CR_USBCLK_ON   (0x40u)\r
-#define USBFS_FASTCLK_IMO_CR_XCLKEN      (0x20u)\r
-#define USBFS_FASTCLK_IMO_CR_FX2ON       (0x10u)\r
-\r
-#define USBFS_ARB_EPX_CFG_RESET          (0x08u)\r
-#define USBFS_ARB_EPX_CFG_CRC_BYPASS     (0x04u)\r
-#define USBFS_ARB_EPX_CFG_DMA_REQ        (0x02u)\r
-#define USBFS_ARB_EPX_CFG_IN_DATA_RDY    (0x01u)\r
-\r
-#define USBFS_ARB_EPX_SR_IN_BUF_FULL     (0x01u)\r
-#define USBFS_ARB_EPX_SR_DMA_GNT         (0x02u)\r
-#define USBFS_ARB_EPX_SR_BUF_OVER        (0x04u)\r
-#define USBFS_ARB_EPX_SR_BUF_UNDER       (0x08u)\r
-\r
-#define USBFS_ARB_CFG_AUTO_MEM           (0x10u)\r
-#define USBFS_ARB_CFG_MANUAL_DMA         (0x20u)\r
-#define USBFS_ARB_CFG_AUTO_DMA           (0x40u)\r
-#define USBFS_ARB_CFG_CFG_CPM            (0x80u)\r
-\r
-#if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-    #define USBFS_ARB_EPX_INT_MASK           (0x1Du)\r
-#else\r
-    #define USBFS_ARB_EPX_INT_MASK           (0x1Fu)\r
-#endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-#define USBFS_ARB_INT_MASK       (uint8)((USBFS_DMA1_REMOVE ^ 1u) | \\r
-                                            (uint8)((USBFS_DMA2_REMOVE ^ 1u) << 1u) | \\r
-                                            (uint8)((USBFS_DMA3_REMOVE ^ 1u) << 2u) | \\r
-                                            (uint8)((USBFS_DMA4_REMOVE ^ 1u) << 3u) | \\r
-                                            (uint8)((USBFS_DMA5_REMOVE ^ 1u) << 4u) | \\r
-                                            (uint8)((USBFS_DMA6_REMOVE ^ 1u) << 5u) | \\r
-                                            (uint8)((USBFS_DMA7_REMOVE ^ 1u) << 6u) | \\r
-                                            (uint8)((USBFS_DMA8_REMOVE ^ 1u) << 7u) )\r
-\r
-#define USBFS_SIE_EP_INT_EP1_MASK        (0x01u)\r
-#define USBFS_SIE_EP_INT_EP2_MASK        (0x02u)\r
-#define USBFS_SIE_EP_INT_EP3_MASK        (0x04u)\r
-#define USBFS_SIE_EP_INT_EP4_MASK        (0x08u)\r
-#define USBFS_SIE_EP_INT_EP5_MASK        (0x10u)\r
-#define USBFS_SIE_EP_INT_EP6_MASK        (0x20u)\r
-#define USBFS_SIE_EP_INT_EP7_MASK        (0x40u)\r
-#define USBFS_SIE_EP_INT_EP8_MASK        (0x80u)\r
-\r
-#define USBFS_PM_ACT_EN_FSUSB            USBFS_USB__PM_ACT_MSK\r
-#define USBFS_PM_STBY_EN_FSUSB           USBFS_USB__PM_STBY_MSK\r
-#define USBFS_PM_AVAIL_EN_FSUSBIO        (0x10u)\r
-\r
-#define USBFS_PM_USB_CR0_REF_EN          (0x01u)\r
-#define USBFS_PM_USB_CR0_PD_N            (0x02u)\r
-#define USBFS_PM_USB_CR0_PD_PULLUP_N     (0x04u)\r
-\r
-#define USBFS_USB_CLK_ENABLE             (0x01u)\r
-\r
-#define USBFS_DM_MASK                    USBFS_Dm__0__MASK\r
-#define USBFS_DP_MASK                    USBFS_Dp__0__MASK\r
-\r
-#define USBFS_DYN_RECONFIG_ENABLE        (0x01u)\r
-#define USBFS_DYN_RECONFIG_EP_SHIFT      (0x01u)\r
-#define USBFS_DYN_RECONFIG_RDY_STS       (0x10u)\r
-\r
-\r
-#endif /* End CY_USBFS_USBFS_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.c
deleted file mode 100755 (executable)
index afae8fa..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dm.c  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file contains API to enable firmware control of a Pins component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-#include "USBFS_Dm.h"\r
-\r
-/* APIs are not generated for P15[7:6] on PSoC 5 */\r
-#if !(CY_PSOC5A &&\\r
-        USBFS_Dm__PORT == 15 && ((USBFS_Dm__MASK & 0xC0) != 0))\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dm_Write\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Assign a new value to the digital port's data output register.  \r
-*\r
-* Parameters:  \r
-*  prtValue:  The value to be assigned to the Digital Port. \r
-*\r
-* Return: \r
-*  None\r
-*  \r
-*******************************************************************************/\r
-void USBFS_Dm_Write(uint8 value) \r
-{\r
-    uint8 staticBits = (USBFS_Dm_DR & (uint8)(~USBFS_Dm_MASK));\r
-    USBFS_Dm_DR = staticBits | ((uint8)(value << USBFS_Dm_SHIFT) & USBFS_Dm_MASK);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dm_SetDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Change the drive mode on the pins of the port.\r
-* \r
-* Parameters:  \r
-*  mode:  Change the pins to this drive mode.\r
-*\r
-* Return: \r
-*  None\r
-*\r
-*******************************************************************************/\r
-void USBFS_Dm_SetDriveMode(uint8 mode) \r
-{\r
-       CyPins_SetPinDriveMode(USBFS_Dm_0, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dm_Read\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Read the current value on the pins of the Digital Port in right justified \r
-*  form.\r
-*\r
-* Parameters:  \r
-*  None\r
-*\r
-* Return: \r
-*  Returns the current value of the Digital Port as a right justified number\r
-*  \r
-* Note:\r
-*  Macro USBFS_Dm_ReadPS calls this function. \r
-*  \r
-*******************************************************************************/\r
-uint8 USBFS_Dm_Read(void) \r
-{\r
-    return (USBFS_Dm_PS & USBFS_Dm_MASK) >> USBFS_Dm_SHIFT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dm_ReadDataReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Read the current value assigned to a Digital Port's data output register\r
-*\r
-* Parameters:  \r
-*  None \r
-*\r
-* Return: \r
-*  Returns the current value assigned to the Digital Port's data output register\r
-*  \r
-*******************************************************************************/\r
-uint8 USBFS_Dm_ReadDataReg(void) \r
-{\r
-    return (USBFS_Dm_DR & USBFS_Dm_MASK) >> USBFS_Dm_SHIFT;\r
-}\r
-\r
-\r
-/* If Interrupts Are Enabled for this Pins component */ \r
-#if defined(USBFS_Dm_INTSTAT) \r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_Dm_ClearInterrupt\r
-    ********************************************************************************\r
-    * Summary:\r
-    *  Clears any active interrupts attached to port and returns the value of the \r
-    *  interrupt status register.\r
-    *\r
-    * Parameters:  \r
-    *  None \r
-    *\r
-    * Return: \r
-    *  Returns the value of the interrupt status register\r
-    *  \r
-    *******************************************************************************/\r
-    uint8 USBFS_Dm_ClearInterrupt(void) \r
-    {\r
-        return (USBFS_Dm_INTSTAT & USBFS_Dm_MASK) >> USBFS_Dm_SHIFT;\r
-    }\r
-\r
-#endif /* If Interrupts Are Enabled for this Pins component */ \r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-    \r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.h
deleted file mode 100755 (executable)
index c1aa9b9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dm.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_USBFS_Dm_H) /* Pins USBFS_Dm_H */\r
-#define CY_PINS_USBFS_Dm_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cypins.h"\r
-#include "USBFS_Dm_aliases.h"\r
-\r
-/* Check to see if required defines such as CY_PSOC5A are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5A)\r
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5A) */\r
-\r
-/* APIs are not generated for P15[7:6] */\r
-#if !(CY_PSOC5A &&\\r
-        USBFS_Dm__PORT == 15 && ((USBFS_Dm__MASK & 0xC0) != 0))\r
-\r
-\r
-/***************************************\r
-*        Function Prototypes             \r
-***************************************/    \r
-\r
-void    USBFS_Dm_Write(uint8 value) ;\r
-void    USBFS_Dm_SetDriveMode(uint8 mode) ;\r
-uint8   USBFS_Dm_ReadDataReg(void) ;\r
-uint8   USBFS_Dm_Read(void) ;\r
-uint8   USBFS_Dm_ClearInterrupt(void) ;\r
-\r
-\r
-/***************************************\r
-*           API Constants        \r
-***************************************/\r
-\r
-/* Drive Modes */\r
-#define USBFS_Dm_DM_ALG_HIZ         PIN_DM_ALG_HIZ\r
-#define USBFS_Dm_DM_DIG_HIZ         PIN_DM_DIG_HIZ\r
-#define USBFS_Dm_DM_RES_UP          PIN_DM_RES_UP\r
-#define USBFS_Dm_DM_RES_DWN         PIN_DM_RES_DWN\r
-#define USBFS_Dm_DM_OD_LO           PIN_DM_OD_LO\r
-#define USBFS_Dm_DM_OD_HI           PIN_DM_OD_HI\r
-#define USBFS_Dm_DM_STRONG          PIN_DM_STRONG\r
-#define USBFS_Dm_DM_RES_UPDWN       PIN_DM_RES_UPDWN\r
-\r
-/* Digital Port Constants */\r
-#define USBFS_Dm_MASK               USBFS_Dm__MASK\r
-#define USBFS_Dm_SHIFT              USBFS_Dm__SHIFT\r
-#define USBFS_Dm_WIDTH              1u\r
-\r
-\r
-/***************************************\r
-*             Registers        \r
-***************************************/\r
-\r
-/* Main Port Registers */\r
-/* Pin State */\r
-#define USBFS_Dm_PS                     (* (reg8 *) USBFS_Dm__PS)\r
-/* Data Register */\r
-#define USBFS_Dm_DR                     (* (reg8 *) USBFS_Dm__DR)\r
-/* Port Number */\r
-#define USBFS_Dm_PRT_NUM                (* (reg8 *) USBFS_Dm__PRT) \r
-/* Connect to Analog Globals */                                                  \r
-#define USBFS_Dm_AG                     (* (reg8 *) USBFS_Dm__AG)                       \r
-/* Analog MUX bux enable */\r
-#define USBFS_Dm_AMUX                   (* (reg8 *) USBFS_Dm__AMUX) \r
-/* Bidirectional Enable */                                                        \r
-#define USBFS_Dm_BIE                    (* (reg8 *) USBFS_Dm__BIE)\r
-/* Bit-mask for Aliased Register Access */\r
-#define USBFS_Dm_BIT_MASK               (* (reg8 *) USBFS_Dm__BIT_MASK)\r
-/* Bypass Enable */\r
-#define USBFS_Dm_BYP                    (* (reg8 *) USBFS_Dm__BYP)\r
-/* Port wide control signals */                                                   \r
-#define USBFS_Dm_CTL                    (* (reg8 *) USBFS_Dm__CTL)\r
-/* Drive Modes */\r
-#define USBFS_Dm_DM0                    (* (reg8 *) USBFS_Dm__DM0) \r
-#define USBFS_Dm_DM1                    (* (reg8 *) USBFS_Dm__DM1)\r
-#define USBFS_Dm_DM2                    (* (reg8 *) USBFS_Dm__DM2) \r
-/* Input Buffer Disable Override */\r
-#define USBFS_Dm_INP_DIS                (* (reg8 *) USBFS_Dm__INP_DIS)\r
-/* LCD Common or Segment Drive */\r
-#define USBFS_Dm_LCD_COM_SEG            (* (reg8 *) USBFS_Dm__LCD_COM_SEG)\r
-/* Enable Segment LCD */\r
-#define USBFS_Dm_LCD_EN                 (* (reg8 *) USBFS_Dm__LCD_EN)\r
-/* Slew Rate Control */\r
-#define USBFS_Dm_SLW                    (* (reg8 *) USBFS_Dm__SLW)\r
-\r
-/* DSI Port Registers */\r
-/* Global DSI Select Register */\r
-#define USBFS_Dm_PRTDSI__CAPS_SEL       (* (reg8 *) USBFS_Dm__PRTDSI__CAPS_SEL) \r
-/* Double Sync Enable */\r
-#define USBFS_Dm_PRTDSI__DBL_SYNC_IN    (* (reg8 *) USBFS_Dm__PRTDSI__DBL_SYNC_IN) \r
-/* Output Enable Select Drive Strength */\r
-#define USBFS_Dm_PRTDSI__OE_SEL0        (* (reg8 *) USBFS_Dm__PRTDSI__OE_SEL0) \r
-#define USBFS_Dm_PRTDSI__OE_SEL1        (* (reg8 *) USBFS_Dm__PRTDSI__OE_SEL1) \r
-/* Port Pin Output Select Registers */\r
-#define USBFS_Dm_PRTDSI__OUT_SEL0       (* (reg8 *) USBFS_Dm__PRTDSI__OUT_SEL0) \r
-#define USBFS_Dm_PRTDSI__OUT_SEL1       (* (reg8 *) USBFS_Dm__PRTDSI__OUT_SEL1) \r
-/* Sync Output Enable Registers */\r
-#define USBFS_Dm_PRTDSI__SYNC_OUT       (* (reg8 *) USBFS_Dm__PRTDSI__SYNC_OUT) \r
-\r
-\r
-#if defined(USBFS_Dm__INTSTAT)  /* Interrupt Registers */\r
-\r
-    #define USBFS_Dm_INTSTAT                (* (reg8 *) USBFS_Dm__INTSTAT)\r
-    #define USBFS_Dm_SNAP                   (* (reg8 *) USBFS_Dm__SNAP)\r
-\r
-#endif /* Interrupt Registers */\r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-#endif /*  CY_PINS_USBFS_Dm_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm_aliases.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm_aliases.h
deleted file mode 100755 (executable)
index bc4f686..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dm_aliases.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dm.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_USBFS_Dm_ALIASES_H) /* Pins USBFS_Dm_ALIASES_H */\r
-#define CY_PINS_USBFS_Dm_ALIASES_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-\r
-\r
-\r
-/***************************************\r
-*              Constants        \r
-***************************************/\r
-#define USBFS_Dm_0             USBFS_Dm__0__PC\r
-\r
-#endif /* End Pins USBFS_Dm_ALIASES_H */\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.c
deleted file mode 100755 (executable)
index 304d5d6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dp.c  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file contains API to enable firmware control of a Pins component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-#include "USBFS_Dp.h"\r
-\r
-/* APIs are not generated for P15[7:6] on PSoC 5 */\r
-#if !(CY_PSOC5A &&\\r
-        USBFS_Dp__PORT == 15 && ((USBFS_Dp__MASK & 0xC0) != 0))\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dp_Write\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Assign a new value to the digital port's data output register.  \r
-*\r
-* Parameters:  \r
-*  prtValue:  The value to be assigned to the Digital Port. \r
-*\r
-* Return: \r
-*  None\r
-*  \r
-*******************************************************************************/\r
-void USBFS_Dp_Write(uint8 value) \r
-{\r
-    uint8 staticBits = (USBFS_Dp_DR & (uint8)(~USBFS_Dp_MASK));\r
-    USBFS_Dp_DR = staticBits | ((uint8)(value << USBFS_Dp_SHIFT) & USBFS_Dp_MASK);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dp_SetDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Change the drive mode on the pins of the port.\r
-* \r
-* Parameters:  \r
-*  mode:  Change the pins to this drive mode.\r
-*\r
-* Return: \r
-*  None\r
-*\r
-*******************************************************************************/\r
-void USBFS_Dp_SetDriveMode(uint8 mode) \r
-{\r
-       CyPins_SetPinDriveMode(USBFS_Dp_0, mode);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dp_Read\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Read the current value on the pins of the Digital Port in right justified \r
-*  form.\r
-*\r
-* Parameters:  \r
-*  None\r
-*\r
-* Return: \r
-*  Returns the current value of the Digital Port as a right justified number\r
-*  \r
-* Note:\r
-*  Macro USBFS_Dp_ReadPS calls this function. \r
-*  \r
-*******************************************************************************/\r
-uint8 USBFS_Dp_Read(void) \r
-{\r
-    return (USBFS_Dp_PS & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Dp_ReadDataReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Read the current value assigned to a Digital Port's data output register\r
-*\r
-* Parameters:  \r
-*  None \r
-*\r
-* Return: \r
-*  Returns the current value assigned to the Digital Port's data output register\r
-*  \r
-*******************************************************************************/\r
-uint8 USBFS_Dp_ReadDataReg(void) \r
-{\r
-    return (USBFS_Dp_DR & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
-}\r
-\r
-\r
-/* If Interrupts Are Enabled for this Pins component */ \r
-#if defined(USBFS_Dp_INTSTAT) \r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_Dp_ClearInterrupt\r
-    ********************************************************************************\r
-    * Summary:\r
-    *  Clears any active interrupts attached to port and returns the value of the \r
-    *  interrupt status register.\r
-    *\r
-    * Parameters:  \r
-    *  None \r
-    *\r
-    * Return: \r
-    *  Returns the value of the interrupt status register\r
-    *  \r
-    *******************************************************************************/\r
-    uint8 USBFS_Dp_ClearInterrupt(void) \r
-    {\r
-        return (USBFS_Dp_INTSTAT & USBFS_Dp_MASK) >> USBFS_Dp_SHIFT;\r
-    }\r
-\r
-#endif /* If Interrupts Are Enabled for this Pins component */ \r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-    \r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.h
deleted file mode 100755 (executable)
index 2d03ad9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dp.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_USBFS_Dp_H) /* Pins USBFS_Dp_H */\r
-#define CY_PINS_USBFS_Dp_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-#include "cypins.h"\r
-#include "USBFS_Dp_aliases.h"\r
-\r
-/* Check to see if required defines such as CY_PSOC5A are available */\r
-/* They are defined starting with cy_boot v3.0 */\r
-#if !defined (CY_PSOC5A)\r
-    #error Component cy_pins_v1_90 requires cy_boot v3.0 or later\r
-#endif /* (CY_PSOC5A) */\r
-\r
-/* APIs are not generated for P15[7:6] */\r
-#if !(CY_PSOC5A &&\\r
-        USBFS_Dp__PORT == 15 && ((USBFS_Dp__MASK & 0xC0) != 0))\r
-\r
-\r
-/***************************************\r
-*        Function Prototypes             \r
-***************************************/    \r
-\r
-void    USBFS_Dp_Write(uint8 value) ;\r
-void    USBFS_Dp_SetDriveMode(uint8 mode) ;\r
-uint8   USBFS_Dp_ReadDataReg(void) ;\r
-uint8   USBFS_Dp_Read(void) ;\r
-uint8   USBFS_Dp_ClearInterrupt(void) ;\r
-\r
-\r
-/***************************************\r
-*           API Constants        \r
-***************************************/\r
-\r
-/* Drive Modes */\r
-#define USBFS_Dp_DM_ALG_HIZ         PIN_DM_ALG_HIZ\r
-#define USBFS_Dp_DM_DIG_HIZ         PIN_DM_DIG_HIZ\r
-#define USBFS_Dp_DM_RES_UP          PIN_DM_RES_UP\r
-#define USBFS_Dp_DM_RES_DWN         PIN_DM_RES_DWN\r
-#define USBFS_Dp_DM_OD_LO           PIN_DM_OD_LO\r
-#define USBFS_Dp_DM_OD_HI           PIN_DM_OD_HI\r
-#define USBFS_Dp_DM_STRONG          PIN_DM_STRONG\r
-#define USBFS_Dp_DM_RES_UPDWN       PIN_DM_RES_UPDWN\r
-\r
-/* Digital Port Constants */\r
-#define USBFS_Dp_MASK               USBFS_Dp__MASK\r
-#define USBFS_Dp_SHIFT              USBFS_Dp__SHIFT\r
-#define USBFS_Dp_WIDTH              1u\r
-\r
-\r
-/***************************************\r
-*             Registers        \r
-***************************************/\r
-\r
-/* Main Port Registers */\r
-/* Pin State */\r
-#define USBFS_Dp_PS                     (* (reg8 *) USBFS_Dp__PS)\r
-/* Data Register */\r
-#define USBFS_Dp_DR                     (* (reg8 *) USBFS_Dp__DR)\r
-/* Port Number */\r
-#define USBFS_Dp_PRT_NUM                (* (reg8 *) USBFS_Dp__PRT) \r
-/* Connect to Analog Globals */                                                  \r
-#define USBFS_Dp_AG                     (* (reg8 *) USBFS_Dp__AG)                       \r
-/* Analog MUX bux enable */\r
-#define USBFS_Dp_AMUX                   (* (reg8 *) USBFS_Dp__AMUX) \r
-/* Bidirectional Enable */                                                        \r
-#define USBFS_Dp_BIE                    (* (reg8 *) USBFS_Dp__BIE)\r
-/* Bit-mask for Aliased Register Access */\r
-#define USBFS_Dp_BIT_MASK               (* (reg8 *) USBFS_Dp__BIT_MASK)\r
-/* Bypass Enable */\r
-#define USBFS_Dp_BYP                    (* (reg8 *) USBFS_Dp__BYP)\r
-/* Port wide control signals */                                                   \r
-#define USBFS_Dp_CTL                    (* (reg8 *) USBFS_Dp__CTL)\r
-/* Drive Modes */\r
-#define USBFS_Dp_DM0                    (* (reg8 *) USBFS_Dp__DM0) \r
-#define USBFS_Dp_DM1                    (* (reg8 *) USBFS_Dp__DM1)\r
-#define USBFS_Dp_DM2                    (* (reg8 *) USBFS_Dp__DM2) \r
-/* Input Buffer Disable Override */\r
-#define USBFS_Dp_INP_DIS                (* (reg8 *) USBFS_Dp__INP_DIS)\r
-/* LCD Common or Segment Drive */\r
-#define USBFS_Dp_LCD_COM_SEG            (* (reg8 *) USBFS_Dp__LCD_COM_SEG)\r
-/* Enable Segment LCD */\r
-#define USBFS_Dp_LCD_EN                 (* (reg8 *) USBFS_Dp__LCD_EN)\r
-/* Slew Rate Control */\r
-#define USBFS_Dp_SLW                    (* (reg8 *) USBFS_Dp__SLW)\r
-\r
-/* DSI Port Registers */\r
-/* Global DSI Select Register */\r
-#define USBFS_Dp_PRTDSI__CAPS_SEL       (* (reg8 *) USBFS_Dp__PRTDSI__CAPS_SEL) \r
-/* Double Sync Enable */\r
-#define USBFS_Dp_PRTDSI__DBL_SYNC_IN    (* (reg8 *) USBFS_Dp__PRTDSI__DBL_SYNC_IN) \r
-/* Output Enable Select Drive Strength */\r
-#define USBFS_Dp_PRTDSI__OE_SEL0        (* (reg8 *) USBFS_Dp__PRTDSI__OE_SEL0) \r
-#define USBFS_Dp_PRTDSI__OE_SEL1        (* (reg8 *) USBFS_Dp__PRTDSI__OE_SEL1) \r
-/* Port Pin Output Select Registers */\r
-#define USBFS_Dp_PRTDSI__OUT_SEL0       (* (reg8 *) USBFS_Dp__PRTDSI__OUT_SEL0) \r
-#define USBFS_Dp_PRTDSI__OUT_SEL1       (* (reg8 *) USBFS_Dp__PRTDSI__OUT_SEL1) \r
-/* Sync Output Enable Registers */\r
-#define USBFS_Dp_PRTDSI__SYNC_OUT       (* (reg8 *) USBFS_Dp__PRTDSI__SYNC_OUT) \r
-\r
-\r
-#if defined(USBFS_Dp__INTSTAT)  /* Interrupt Registers */\r
-\r
-    #define USBFS_Dp_INTSTAT                (* (reg8 *) USBFS_Dp__INTSTAT)\r
-    #define USBFS_Dp_SNAP                   (* (reg8 *) USBFS_Dp__SNAP)\r
-\r
-#endif /* Interrupt Registers */\r
-\r
-#endif /* CY_PSOC5A... */\r
-\r
-#endif /*  CY_PINS_USBFS_Dp_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp_aliases.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp_aliases.h
deleted file mode 100755 (executable)
index b77c3b9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_Dp_aliases.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_Dp.h  \r
-* Version 1.90\r
-*\r
-* Description:\r
-*  This file containts Control Register function prototypes and register defines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_PINS_USBFS_Dp_ALIASES_H) /* Pins USBFS_Dp_ALIASES_H */\r
-#define CY_PINS_USBFS_Dp_ALIASES_H\r
-\r
-#include "cytypes.h"\r
-#include "cyfitter.h"\r
-\r
-\r
-\r
-/***************************************\r
-*              Constants        \r
-***************************************/\r
-#define USBFS_Dp_0             USBFS_Dp__0__PC\r
-\r
-#endif /* End Pins USBFS_Dp_ALIASES_H */\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.c
deleted file mode 100755 (executable)
index cec388b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_audio.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB AUDIO Class request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if defined(USBFS_ENABLE_AUDIO_CLASS)\r
-\r
-#include "USBFS_audio.h"\r
-#include "USBFS_pvt.h"\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING) \r
-    #include "USBFS_midi.h"\r
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-\r
-/* `#START CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-#if !defined(USER_SUPPLIED_AUDIO_HANDLER)\r
-\r
-\r
-/***************************************\r
-*    AUDIO Variables\r
-***************************************/\r
-\r
-#if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-    volatile uint8 USBFS_currentSampleFrequency[USBFS_MAX_EP][USBFS_SAMPLE_FREQ_LEN];\r
-    volatile uint8 USBFS_frequencyChanged;\r
-    volatile uint8 USBFS_currentMute;\r
-    volatile uint8 USBFS_currentVolume[USBFS_VOLUME_LEN];\r
-    volatile uint8 USBFS_minimumVolume[USBFS_VOLUME_LEN] = {USBFS_VOL_MIN_LSB,\r
-                                                                                  USBFS_VOL_MIN_MSB};\r
-    volatile uint8 USBFS_maximumVolume[USBFS_VOLUME_LEN] = {USBFS_VOL_MAX_LSB,\r
-                                                                                  USBFS_VOL_MAX_MSB};\r
-    volatile uint8 USBFS_resolutionVolume[USBFS_VOLUME_LEN] = {USBFS_VOL_RES_LSB,\r
-                                                                                     USBFS_VOL_RES_MSB};\r
-#endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_DispatchAUDIOClassRqst\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine dispatches class requests\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled\r
-*\r
-* Global variables:\r
-*   USBFS_currentSampleFrequency: Contains the current audio Sample\r
-*       Frequency. It is set by the Host using SET_CUR request to the endpoint.\r
-*   USBFS_frequencyChanged: This variable is used as a flag for the\r
-*       user code, to be aware that Host has been sent request for changing\r
-*       Sample Frequency. Sample frequency will be sent on the next OUT\r
-*       transaction. It is contains endpoint address when set. The following\r
-*       code is recommended for detecting new Sample Frequency in main code:\r
-*       if((USBFS_frequencyChanged != 0) &&\r
-*       (USBFS_transferState == USBFS_TRANS_STATE_IDLE))\r
-*       {\r
-*          USBFS_frequencyChanged = 0;\r
-*       }\r
-*       USBFS_transferState variable is checked to be sure that\r
-*             transfer completes.\r
-*   USBFS_currentMute: Contains mute configuration set by Host.\r
-*   USBFS_currentVolume: Contains volume level set by Host.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_DispatchAUDIOClassRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-\r
-    #if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-        uint8 epNumber;\r
-        epNumber = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;\r
-    #endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-    {\r
-        /* Control Read */\r
-        if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \\r
-                                                                                    USBFS_RQST_RCPT_EP)\r
-        {\r
-            /* Endpoint */\r
-            switch (CY_GET_REG8(USBFS_bRequest))\r
-            {\r
-                case USBFS_GET_CUR:\r
-                #if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_SAMPLING_FREQ_CONTROL)\r
-                    {\r
-                         /* Endpoint Control Selector is Sampling Frequency */\r
-                        USBFS_currentTD.wCount = USBFS_SAMPLE_FREQ_LEN;\r
-                        USBFS_currentTD.pData  = USBFS_currentSampleFrequency[epNumber];\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-                /* `#START AUDIO_READ_REQUESTS` Place other request handler here */\r
-\r
-                /* `#END` */\r
-                    break;\r
-                default:\r
-                    break;\r
-            }\r
-        }\r
-        else if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \\r
-                                                                                    USBFS_RQST_RCPT_IFC)\r
-        {\r
-            /* Interface or Entity ID */\r
-            switch (CY_GET_REG8(USBFS_bRequest))\r
-            {\r
-                case USBFS_GET_CUR:\r
-                #if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_MUTE_CONTROL)\r
-                    {\r
-                        /* `#START MUTE_CONTROL_GET_REQUEST` Place multi-channel handler here */\r
-\r
-                        /* `#END` */\r
-                        \r
-                         /* Entity ID Control Selector is MUTE */\r
-                        USBFS_currentTD.wCount = 1u;\r
-                        USBFS_currentTD.pData  = &USBFS_currentMute;\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                    else if(CY_GET_REG8(USBFS_wValueHi) == USBFS_VOLUME_CONTROL)\r
-                    {\r
-                        /* `#START VOLUME_CONTROL_GET_REQUEST` Place multi-channel handler here */\r
-\r
-                        /* `#END` */\r
-\r
-                        /* Entity ID Control Selector is VOLUME, */\r
-                        USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
-                        USBFS_currentTD.pData  = USBFS_currentVolume;\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                    else\r
-                    {\r
-                        /* `#START OTHER_GET_CUR_REQUESTS` Place other request handler here */\r
-\r
-                        /* `#END` */\r
-                    }\r
-                    break;\r
-                case USBFS_GET_MIN:    /* GET_MIN */\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_VOLUME_CONTROL)\r
-                    {\r
-                        /* Entity ID Control Selector is VOLUME, */\r
-                        USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
-                        USBFS_currentTD.pData  = &USBFS_minimumVolume[0];\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                    break;\r
-                case USBFS_GET_MAX:    /* GET_MAX */\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_VOLUME_CONTROL)\r
-                    {\r
-                        /* Entity ID Control Selector is VOLUME, */\r
-                        USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
-                        USBFS_currentTD.pData  = &USBFS_maximumVolume[0];\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                    break;\r
-                case USBFS_GET_RES:    /* GET_RES */\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_VOLUME_CONTROL)\r
-                    {\r
-                         /* Entity ID Control Selector is VOLUME, */\r
-                        USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
-                        USBFS_currentTD.pData  = &USBFS_resolutionVolume[0];\r
-                        requestHandled   = USBFS_InitControlRead();\r
-                    }\r
-                    break;\r
-                /* The contents of the status message is reserved for future use.\r
-                *  For the time being, a null packet should be returned in the data stage of the\r
-                *  control transfer, and the received null packet should be ACKed.\r
-                */\r
-                case USBFS_GET_STAT:\r
-                        USBFS_currentTD.wCount = 0u;\r
-                        requestHandled   = USBFS_InitControlWrite();\r
-\r
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-                /* `#START AUDIO_WRITE_REQUESTS` Place other request handler here */\r
-\r
-                /* `#END` */\r
-                    break;\r
-                default:\r
-                    break;\r
-            }\r
-        }\r
-        else\r
-        {   /* USBFS_RQST_RCPT_OTHER */\r
-        }\r
-    }\r
-    else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == \\r
-                                                                                    USBFS_RQST_DIR_H2D)\r
-    {\r
-        /* Control Write */\r
-        if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \\r
-                                                                                    USBFS_RQST_RCPT_EP)\r
-        {\r
-            /* Endpoint */\r
-            switch (CY_GET_REG8(USBFS_bRequest))\r
-            {\r
-                case USBFS_SET_CUR:\r
-                #if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_SAMPLING_FREQ_CONTROL)\r
-                    {\r
-                         /* Endpoint Control Selector is Sampling Frequency */\r
-                        USBFS_currentTD.wCount = USBFS_SAMPLE_FREQ_LEN;\r
-                        USBFS_currentTD.pData  = USBFS_currentSampleFrequency[epNumber];\r
-                        requestHandled   = USBFS_InitControlWrite();\r
-                        USBFS_frequencyChanged = epNumber;\r
-                    }\r
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-                /* `#START AUDIO_SAMPLING_FREQ_REQUESTS` Place other request handler here */\r
-\r
-                /* `#END` */\r
-                    break;\r
-                default:\r
-                    break;\r
-            }\r
-        }\r
-        else if((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK) == \\r
-                                                                                    USBFS_RQST_RCPT_IFC)\r
-        {\r
-            /* Interface or Entity ID */\r
-            switch (CY_GET_REG8(USBFS_bRequest))\r
-            {\r
-                case USBFS_SET_CUR:\r
-                #if defined(USBFS_ENABLE_AUDIO_STREAMING)\r
-                    if(CY_GET_REG8(USBFS_wValueHi) == USBFS_MUTE_CONTROL)\r
-                    {\r
-                        /* `#START MUTE_SET_REQUEST` Place multi-channel handler here */\r
-\r
-                        /* `#END` */\r
-\r
-                        /* Entity ID Control Selector is MUTE */\r
-                        USBFS_currentTD.wCount = 1u;\r
-                        USBFS_currentTD.pData  = &USBFS_currentMute;\r
-                        requestHandled   = USBFS_InitControlWrite();\r
-                    }\r
-                    else if(CY_GET_REG8(USBFS_wValueHi) == USBFS_VOLUME_CONTROL)\r
-                    {\r
-                        /* `#START VOLUME_CONTROL_SET_REQUEST` Place multi-channel handler here */\r
-\r
-                        /* `#END` */\r
-\r
-                        /* Entity ID Control Selector is VOLUME */\r
-                        USBFS_currentTD.wCount = USBFS_VOLUME_LEN;\r
-                        USBFS_currentTD.pData  = USBFS_currentVolume;\r
-                        requestHandled   = USBFS_InitControlWrite();\r
-                    }\r
-                    else\r
-                    {\r
-                        /* `#START OTHER_SET_CUR_REQUESTS` Place other request handler here */\r
-\r
-                        /* `#END` */\r
-                    }\r
-                #endif /* End USBFS_ENABLE_AUDIO_STREAMING */\r
-\r
-                /* `#START AUDIO_CONTROL_SEL_REQUESTS` Place other request handler here */\r
-\r
-                /* `#END` */\r
-                    break;\r
-                default:\r
-                    break;\r
-            }\r
-        }\r
-        else\r
-        {   /* USBFS_RQST_RCPT_OTHER */\r
-        }\r
-    }\r
-    else\r
-    {   /* requestHandled is initialized as FALSE by default */\r
-    }\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-#endif /* USER_SUPPLIED_AUDIO_HANDLER */\r
-\r
-\r
-/*******************************************************************************\r
-* Additional user functions supporting AUDIO Requests\r
-********************************************************************************/\r
-\r
-/* `#START AUDIO_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-#endif  /* End USBFS_ENABLE_AUDIO_CLASS*/\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.h
deleted file mode 100755 (executable)
index 1e6186b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_audio.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_audio.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Header File for the USFS component. Contains prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_audio_H)\r
-#define CY_USBFS_USBFS_audio_H\r
-\r
-#include "cytypes.h"\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-\r
-/* `#START CUSTOM_CONSTANTS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/***************************************\r
-*  Constants for USBFS_audio API.\r
-***************************************/\r
-\r
-/* Audio Class-Specific Request Codes (AUDIO Table A-9) */\r
-#define USBFS_REQUEST_CODE_UNDEFINED     (0x00u)\r
-#define USBFS_SET_CUR                    (0x01u)\r
-#define USBFS_GET_CUR                    (0x81u)\r
-#define USBFS_SET_MIN                    (0x02u)\r
-#define USBFS_GET_MIN                    (0x82u)\r
-#define USBFS_SET_MAX                    (0x03u)\r
-#define USBFS_GET_MAX                    (0x83u)\r
-#define USBFS_SET_RES                    (0x04u)\r
-#define USBFS_GET_RES                    (0x84u)\r
-#define USBFS_SET_MEM                    (0x05u)\r
-#define USBFS_GET_MEM                    (0x85u)\r
-#define USBFS_GET_STAT                   (0xFFu)\r
-\r
-/* Endpoint Control Selectors (AUDIO Table A-19) */\r
-#define USBFS_EP_CONTROL_UNDEFINED       (0x00u)\r
-#define USBFS_SAMPLING_FREQ_CONTROL      (0x01u)\r
-#define USBFS_PITCH_CONTROL              (0x02u)\r
-\r
-/* Feature Unit Control Selectors (AUDIO Table A-11) */\r
-#define USBFS_FU_CONTROL_UNDEFINED       (0x00u)\r
-#define USBFS_MUTE_CONTROL               (0x01u)\r
-#define USBFS_VOLUME_CONTROL             (0x02u)\r
-#define USBFS_BASS_CONTROL               (0x03u)\r
-#define USBFS_MID_CONTROL                (0x04u)\r
-#define USBFS_TREBLE_CONTROL             (0x05u)\r
-#define USBFS_GRAPHIC_EQUALIZER_CONTROL  (0x06u)\r
-#define USBFS_AUTOMATIC_GAIN_CONTROL     (0x07u)\r
-#define USBFS_DELAY_CONTROL              (0x08u)\r
-#define USBFS_BASS_BOOST_CONTROL         (0x09u)\r
-#define USBFS_LOUDNESS_CONTROL           (0x0Au)\r
-\r
-#define USBFS_SAMPLE_FREQ_LEN            (3u)\r
-#define USBFS_VOLUME_LEN                 (2u)\r
-\r
-#if !defined(USER_SUPPLIED_DEFAULT_VOLUME_VALUE)\r
-    #define USBFS_VOL_MIN_MSB            (0x80u)\r
-    #define USBFS_VOL_MIN_LSB            (0x01u)\r
-    #define USBFS_VOL_MAX_MSB            (0x7Fu)\r
-    #define USBFS_VOL_MAX_LSB            (0xFFu)\r
-    #define USBFS_VOL_RES_MSB            (0x00u)\r
-    #define USBFS_VOL_RES_LSB            (0x01u)\r
-#endif /* USER_SUPPLIED_DEFAULT_VOLUME_VALUE */\r
-\r
-\r
-/***************************************\r
-* External data references\r
-***************************************/\r
-\r
-extern volatile uint8 USBFS_currentSampleFrequency[USBFS_MAX_EP]\r
-                                                             [USBFS_SAMPLE_FREQ_LEN];\r
-extern volatile uint8 USBFS_frequencyChanged;\r
-extern volatile uint8 USBFS_currentMute;\r
-extern volatile uint8 USBFS_currentVolume[USBFS_VOLUME_LEN];\r
-extern volatile uint8 USBFS_minimumVolume[USBFS_VOLUME_LEN];\r
-extern volatile uint8 USBFS_maximumVolume[USBFS_VOLUME_LEN];\r
-extern volatile uint8 USBFS_resolutionVolume[USBFS_VOLUME_LEN];\r
-\r
-#endif /* End CY_USBFS_USBFS_audio_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_boot.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_boot.c
deleted file mode 100755 (executable)
index 2843057..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_boot.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_boot.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Boot loader API for USBFS Component.\r
-*\r
-*  Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if defined(CYDEV_BOOTLOADER_IO_COMP) && ((CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS) || \\r
-                                          (CYDEV_BOOTLOADER_IO_COMP == CyBtldr_Custom_Interface))\r
-\r
-\r
-/***************************************\r
-*    Bootloader defines\r
-***************************************/\r
-\r
-#define USBFS_CyBtLdrStarttimer(X, T)         {USBFS_universalTime = T * 10; X = 0u;}\r
-#define USBFS_CyBtLdrChecktimer(X)            ((X++ < USBFS_universalTime) ? 1u : 0u)\r
-\r
-#define USBFS_BTLDR_OUT_EP      (0x01u)\r
-#define USBFS_BTLDR_IN_EP       (0x02u)\r
-\r
-\r
-/***************************************\r
-*    Bootloader Variables\r
-***************************************/\r
-\r
-static uint16 USBFS_universalTime;\r
-static uint8 USBFS_started = 0u;\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CyBtldrCommStart\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Starts the component and enables the interrupt.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Side Effects:\r
-*  This function starts the USB with 3V or 5V operation.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_CyBtldrCommStart(void) \r
-{\r
-    CyGlobalIntEnable;      /* Enable Global Interrupts */\r
-\r
-    /*Start USBFS Operation/device 0 and with 5V or 3V operation depend on Voltage Configuration in DWR */\r
-    USBFS_Start(0u, USBFS_DWR_VDDD_OPERATION);\r
-\r
-    /* USB component started, the correct enumeration will be checked in first Read operation */\r
-    USBFS_started = 1u;\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CyBtldrCommStop.\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Disable the component and disable the interrupt.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_CyBtldrCommStop(void) \r
-{\r
-    USBFS_Stop();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CyBtldrCommReset.\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Resets the receive and transmit communication Buffers.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_CyBtldrCommReset(void) \r
-{\r
-    USBFS_EnableOutEP(USBFS_BTLDR_OUT_EP);  /* Enable the OUT endpoint */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CyBtldrCommWrite.\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Allows the caller to write data to the boot loader host. The function will\r
-*  handle polling to allow a block of data to be completely sent to the host\r
-*  device.\r
-*\r
-* Parameters:\r
-*  pData:    A pointer to the block of data to send to the device\r
-*  size:     The number of bytes to write.\r
-*  count:    Pointer to an unsigned short variable to write the number of\r
-*             bytes actually written.\r
-*  timeOut:  Number of units to wait before returning because of a timeout.\r
-*\r
-* Return:\r
-*  Returns the value that best describes the problem.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-cystatus USBFS_CyBtldrCommWrite(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
-                                                            \r
-{\r
-    uint16 time;\r
-    cystatus status;\r
-\r
-    /* Enable IN transfer */\r
-    USBFS_LoadInEP(USBFS_BTLDR_IN_EP, pData, USBFS_BTLDR_SIZEOF_READ_BUFFER);\r
-\r
-    /* Start a timer to wait on. */\r
-    USBFS_CyBtLdrStarttimer(time, timeOut);\r
-\r
-    /* Wait for the master to read it. */\r
-    while((USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL) && \\r
-           USBFS_CyBtLdrChecktimer(time))\r
-    {\r
-        CyDelay(1u); /* 1ms delay */\r
-    }\r
-\r
-    if (USBFS_GetEPState(USBFS_BTLDR_IN_EP) == USBFS_IN_BUFFER_FULL)\r
-    {\r
-        status = CYRET_TIMEOUT;\r
-    }\r
-    else\r
-    {\r
-        *count = size;\r
-        status = CYRET_SUCCESS;\r
-    }\r
-\r
-    return(status);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_CyBtldrCommRead.\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Allows the caller to read data from the boot loader host. The function will\r
-*  handle polling to allow a block of data to be completely received from the\r
-*  host device.\r
-*\r
-* Parameters:\r
-*  pData:    A pointer to the area to store the block of data received\r
-*             from the device.\r
-*  size:     The number of bytes to read.\r
-*  count:    Pointer to an unsigned short variable to write the number\r
-*             of bytes actually read.\r
-*  timeOut:  Number of units to wait before returning because of a timeOut.\r
-*            Timeout is measured in 10s of ms.\r
-*\r
-* Return:\r
-*  Returns the value that best describes the problem.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-cystatus USBFS_CyBtldrCommRead(uint8 *pData, uint16 size, uint16 *count, uint8 timeOut) CYSMALL\r
-                                                            \r
-{\r
-    cystatus status;\r
-    uint16 time;\r
-\r
-    if(size > USBFS_BTLDR_SIZEOF_WRITE_BUFFER)\r
-    {\r
-        size = USBFS_BTLDR_SIZEOF_WRITE_BUFFER;\r
-    }\r
-    /* Start a timer to wait on. */\r
-    USBFS_CyBtLdrStarttimer(time, timeOut);\r
-\r
-    /* Wait on enumeration in first time */\r
-    if(USBFS_started)\r
-    {\r
-        /* Wait for Device to enumerate */\r
-        while(!USBFS_GetConfiguration() && USBFS_CyBtLdrChecktimer(time))\r
-        {\r
-            CyDelay(1u); /* 1ms delay */\r
-        }\r
-        /* Enable first OUT, if enumeration complete */\r
-        if(USBFS_GetConfiguration())\r
-        {\r
-            USBFS_IsConfigurationChanged();  /* Clear configuration changes state status */\r
-            USBFS_CyBtldrCommReset();\r
-            USBFS_started = 0u;\r
-        }\r
-    }\r
-    else /* Check for configuration changes, has been done by Host */\r
-    {\r
-        if(USBFS_IsConfigurationChanged() != 0u) /* Host could send double SET_INTERFACE request or RESET */\r
-        {\r
-            if(USBFS_GetConfiguration() != 0u)   /* Init OUT endpoints when device reconfigured */\r
-            {\r
-                USBFS_CyBtldrCommReset();\r
-            }\r
-        }\r
-    }\r
-    /* Wait on next packet */\r
-    while((USBFS_GetEPState(USBFS_BTLDR_OUT_EP) != USBFS_OUT_BUFFER_FULL) && \\r
-           USBFS_CyBtLdrChecktimer(time))\r
-    {\r
-        CyDelay(1u); /* 1ms delay */\r
-    }\r
-\r
-    /* OUT EP has completed */\r
-    if (USBFS_GetEPState(USBFS_BTLDR_OUT_EP) == USBFS_OUT_BUFFER_FULL)\r
-    {\r
-        *count = USBFS_ReadOutEP(USBFS_BTLDR_OUT_EP, pData, size);\r
-        status = CYRET_SUCCESS;\r
-    }\r
-    else\r
-    {\r
-        *count = 0u;\r
-        status = CYRET_TIMEOUT;\r
-    }\r
-    return(status);\r
-}\r
-\r
-#endif /* End CYDEV_BOOTLOADER_IO_COMP == CyBtldr_USBFS */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.c
deleted file mode 100755 (executable)
index 82951c8..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_cdc.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB HID Class request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2012-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if defined(USBFS_ENABLE_CDC_CLASS)\r
-\r
-#include "USBFS_cdc.h"\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/***************************************\r
-*    CDC Variables\r
-***************************************/\r
-\r
-volatile uint8 USBFS_lineCoding[USBFS_LINE_CODING_SIZE];\r
-volatile uint8 USBFS_lineChanged;\r
-volatile uint16 USBFS_lineControlBitmap;\r
-volatile uint8 USBFS_cdc_data_in_ep;\r
-volatile uint8 USBFS_cdc_data_out_ep;\r
-\r
-\r
-/***************************************\r
-*     Static Function Prototypes\r
-***************************************/\r
-static uint16 USBFS_StrLen(const char8 string[]) ;\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-\r
-/* `#START CDC_CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_DispatchCDCClassRqst\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine dispatches CDC class requests.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled\r
-*\r
-* Global variables:\r
-*   USBFS_lineCoding: Contains the current line coding structure.\r
-*     It is set by the Host using SET_LINE_CODING request and returned to the\r
-*     user code by the USBFS_GetDTERate(), USBFS_GetCharFormat(),\r
-*     USBFS_GetParityType(), USBFS_GetDataBits() APIs.\r
-*   USBFS_lineControlBitmap: Contains the current control signal\r
-*     bitmap. It is set by the Host using SET_CONTROL_LINE request and returned\r
-*     to the user code by the USBFS_GetLineControl() API.\r
-*   USBFS_lineChanged: This variable is used as a flag for the\r
-*     USBFS_IsLineChanged() API, to be aware that Host has been sent request\r
-*     for changing Line Coding or Control Bitmap.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_DispatchCDCClassRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-\r
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-    {   /* Control Read */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_CDC_GET_LINE_CODING:\r
-                USBFS_currentTD.count = USBFS_LINE_CODING_SIZE;\r
-                USBFS_currentTD.pData = USBFS_lineCoding;\r
-                requestHandled  = USBFS_InitControlRead();\r
-                break;\r
-\r
-            /* `#START CDC_READ_REQUESTS` Place other request handler here */\r
-\r
-            /* `#END` */\r
-\r
-            default:    /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == \\r
-                                                                            USBFS_RQST_DIR_H2D)\r
-    {   /* Control Write */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_CDC_SET_LINE_CODING:\r
-                USBFS_currentTD.count = USBFS_LINE_CODING_SIZE;\r
-                USBFS_currentTD.pData = USBFS_lineCoding;\r
-                USBFS_lineChanged |= USBFS_LINE_CODING_CHANGED;\r
-                requestHandled = USBFS_InitControlWrite();\r
-                break;\r
-\r
-            case USBFS_CDC_SET_CONTROL_LINE_STATE:\r
-                USBFS_lineControlBitmap = CY_GET_REG8(USBFS_wValueLo);\r
-                USBFS_lineChanged |= USBFS_LINE_CONTROL_CHANGED;\r
-                requestHandled = USBFS_InitNoDataControlTransfer();\r
-                break;\r
-\r
-            /* `#START CDC_WRITE_REQUESTS` Place other request handler here */\r
-\r
-            /* `#END` */\r
-\r
-            default:    /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    else\r
-    {   /* requestHandled is initialized as FALSE by default */\r
-    }\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/***************************************\r
-* Optional CDC APIs\r
-***************************************/\r
-#if (USBFS_ENABLE_CDC_CLASS_API != 0u)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_CDC_Init\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This function initialize the CDC interface to be ready for the receive data\r
-    *  from the PC.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_lineChanged: Initialized to zero.\r
-    *   USBFS_cdc_data_out_ep: Used as an OUT endpoint number.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_CDC_Init(void) \r
-    {\r
-        USBFS_lineChanged = 0u;\r
-        USBFS_EnableOutEP(USBFS_cdc_data_out_ep);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PutData\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sends a specified number of bytes from the location specified by a\r
-    *  pointer to the PC.\r
-    *\r
-    * Parameters:\r
-    *  pData: pointer to the buffer containing data to be sent.\r
-    *  length: Specifies the number of bytes to send from the pData\r
-    *  buffer. Maximum length will be limited by the maximum packet\r
-    *  size for the endpoint.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_in_ep: CDC IN endpoint number used for sending\r
-    *     data.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_PutData(const uint8* pData, uint16 length) \r
-    {\r
-        /* Limits length to maximum packet size for the EP */\r
-        if(length > USBFS_EP[USBFS_cdc_data_in_ep].bufferSize)\r
-        {\r
-            /* Caution: Data will be lost if length is greater than Max Packet Length */\r
-            length = USBFS_EP[USBFS_cdc_data_in_ep].bufferSize;\r
-             /* Halt CPU in debug mode */\r
-            CYASSERT(0u != 0u);\r
-        }\r
-        USBFS_LoadInEP(USBFS_cdc_data_in_ep, pData, length);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_StrLen\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Calculates length of a null terminated string.\r
-    *\r
-    * Parameters:\r
-    *  string: pointer to the string.\r
-    *\r
-    * Return:\r
-    *  Length of the string\r
-    *\r
-    *******************************************************************************/\r
-    static uint16 USBFS_StrLen(const char8 string[]) \r
-    {\r
-        uint16 len = 0u;\r
-\r
-        while (string[len] != (char8)0)\r
-        {\r
-            len++;\r
-        }\r
-\r
-        return (len);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PutString\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sends a null terminated string to the PC.\r
-    *\r
-    * Parameters:\r
-    *  string: pointer to the string to be sent to the PC\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_in_ep: CDC IN endpoint number used for sending\r
-    *     data.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    * Theory:\r
-    *  This function will block if there is not enough memory to place the whole\r
-    *  string, it will block until the entire string has been written to the\r
-    *  transmit buffer.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_PutString(const char8 string[]) \r
-    {\r
-        uint16 str_length;\r
-        uint16 send_length;\r
-        uint16 buf_index = 0u;\r
-\r
-        /* Get length of the null terminated string */\r
-        str_length = USBFS_StrLen(string);\r
-        do\r
-        {\r
-            /* Limits length to maximum packet size for the EP */\r
-            send_length = (str_length > USBFS_EP[USBFS_cdc_data_in_ep].bufferSize) ?\r
-                          USBFS_EP[USBFS_cdc_data_in_ep].bufferSize : str_length;\r
-             /* Enable IN transfer */\r
-            USBFS_LoadInEP(USBFS_cdc_data_in_ep, (const uint8 *)&string[buf_index], send_length);\r
-            str_length -= send_length;\r
-\r
-            /* If more data are present to send */\r
-            if(str_length > 0u)\r
-            {\r
-                buf_index += send_length;\r
-                /* Wait for the Host to read it. */\r
-                while(USBFS_EP[USBFS_cdc_data_in_ep].apiEpState ==\r
-                                          USBFS_IN_BUFFER_FULL)\r
-                {\r
-                    ;\r
-                }\r
-            }\r
-        }while(str_length > 0u);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PutChar\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Writes a single character to the PC.\r
-    *\r
-    * Parameters:\r
-    *  txDataByte: Character to be sent to the PC.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_in_ep: CDC IN endpoint number used for sending\r
-    *     data.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_PutChar(char8 txDataByte) \r
-    {\r
-        uint8 dataByte;\r
-        dataByte = (uint8)txDataByte;\r
-\r
-        USBFS_LoadInEP(USBFS_cdc_data_in_ep, &dataByte, 1u);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PutCRLF\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Sends a carriage return (0x0D) and line feed (0x0A) to the PC\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_in_ep: CDC IN endpoint number used for sending\r
-    *     data.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_PutCRLF(void) \r
-    {\r
-        const uint8 CYCODE txData[] = {0x0Du, 0x0Au};\r
-\r
-        USBFS_LoadInEP(USBFS_cdc_data_in_ep, (const uint8 *)txData, 2u);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetCount\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This function returns the number of bytes that were received from the PC.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns the number of received bytes.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.\r
-    *\r
-    *******************************************************************************/\r
-    uint16 USBFS_GetCount(void) \r
-    {\r
-        uint16 bytesCount = 0u;\r
-\r
-        if (USBFS_EP[USBFS_cdc_data_out_ep].apiEpState == USBFS_OUT_BUFFER_FULL)\r
-        {\r
-            bytesCount = USBFS_GetEPCount(USBFS_cdc_data_out_ep);\r
-        }\r
-\r
-        return(bytesCount);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_DataIsReady\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns a nonzero value if the component received data or received\r
-    *  zero-length packet. The GetAll() or GetData() API should be called to read\r
-    *  data from the buffer and re-init OUT endpoint even when zero-length packet\r
-    *  received.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  If the OUT packet received this function returns a nonzero value.\r
-    *  Otherwise zero is returned.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_DataIsReady(void) \r
-    {\r
-        return(USBFS_EP[USBFS_cdc_data_out_ep].apiEpState);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_CDCIsReady\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns a nonzero value if the component is ready to send more data to the\r
-    *  PC. Otherwise returns zero. Should be called before sending new data to\r
-    *  ensure the previous data has finished sending.This function returns the\r
-    *  number of bytes that were received from the PC.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  If the buffer can accept new data then this function returns a nonzero value.\r
-    *  Otherwise zero is returned.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_in_ep: CDC IN endpoint number used.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_CDCIsReady(void) \r
-    {\r
-        return(USBFS_EP[USBFS_cdc_data_in_ep].apiEpState);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetData\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets a specified number of bytes from the input buffer and places it in a\r
-    *  data array specified by the passed pointer.\r
-    *  USBFS_DataIsReady() API should be called before, to be sure\r
-    *  that data is received from the Host.\r
-    *\r
-    * Parameters:\r
-    *  pData: Pointer to the data array where data will be placed.\r
-    *  Length: Number of bytes to read into the data array from the RX buffer.\r
-    *          Maximum length is limited by the the number of received bytes.\r
-    *\r
-    * Return:\r
-    *  Number of bytes received.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    uint16 USBFS_GetData(uint8* pData, uint16 length) \r
-    {\r
-        return(USBFS_ReadOutEP(USBFS_cdc_data_out_ep, pData, length));\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetAll\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Gets all bytes of received data from the input buffer and places it into a\r
-    *  specified data array. USBFS_DataIsReady() API should be called\r
-    *  before, to be sure that data is received from the Host.\r
-    *\r
-    * Parameters:\r
-    *  pData: Pointer to the data array where data will be placed.\r
-    *\r
-    * Return:\r
-    *  Number of bytes received.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.\r
-    *   USBFS_EP[].bufferSize: EP max packet size is used as a length\r
-    *     to read all data from the EP buffer.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    uint16 USBFS_GetAll(uint8* pData) \r
-    {\r
-        return (USBFS_ReadOutEP(USBFS_cdc_data_out_ep, pData,\r
-                                           USBFS_EP[USBFS_cdc_data_out_ep].bufferSize));\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetChar\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Reads one byte of received data from the buffer.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Received one character.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_cdc_data_out_ep: CDC OUT endpoint number used.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_GetChar(void) \r
-    {\r
-         uint8 rxData;\r
-\r
-        (void) USBFS_ReadOutEP(USBFS_cdc_data_out_ep, &rxData, 1u);\r
-\r
-        return(rxData);\r
-    }\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_IsLineChanged\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This function returns clear on read status of the line.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  If SET_LINE_CODING or CDC_SET_CONTROL_LINE_STATE request received then not\r
-    *  zero value returned. Otherwise zero is returned.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_transferState - it is checked to be sure then OUT data\r
-    *    phase has been complete, and data written to the lineCoding or Control\r
-    *    Bitmap buffer.\r
-    *  USBFS_lineChanged: used as a flag to be aware that Host has been\r
-    *    sent request for changing Line Coding or Control Bitmap.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_IsLineChanged(void) \r
-    {\r
-        uint8 state = 0u;\r
-\r
-        /* transferState is checked to be sure then OUT data phase has been complete */\r
-        if(USBFS_transferState == USBFS_TRANS_STATE_IDLE)\r
-        {\r
-            if(USBFS_lineChanged != 0u)\r
-            {\r
-                state = USBFS_lineChanged;\r
-                USBFS_lineChanged = 0u;\r
-            }\r
-        }\r
-\r
-        return(state);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetDTERate\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns the data terminal rate set for this port in bits per second.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns a uint32 value of the data rate in bits per second.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_lineCoding: First four bytes converted to uint32\r
-    *    depend on compiler, and returned as a data rate.\r
-    *\r
-    *******************************************************************************/\r
-    uint32 USBFS_GetDTERate(void) \r
-    {\r
-        uint32 rate;\r
-\r
-        rate = USBFS_lineCoding[USBFS_LINE_CODING_RATE + 3u];\r
-        rate = (rate << 8u) | USBFS_lineCoding[USBFS_LINE_CODING_RATE + 2u];\r
-        rate = (rate << 8u) | USBFS_lineCoding[USBFS_LINE_CODING_RATE + 1u];\r
-        rate = (rate << 8u) | USBFS_lineCoding[USBFS_LINE_CODING_RATE];\r
-\r
-        return(rate);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetCharFormat\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns the number of stop bits.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns the number of stop bits.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_lineCoding: used to get a parameter.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_GetCharFormat(void) \r
-    {\r
-        return(USBFS_lineCoding[USBFS_LINE_CODING_STOP_BITS]);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetParityType\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns the parity type for the CDC port.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns the parity type.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_lineCoding: used to get a parameter.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_GetParityType(void) \r
-    {\r
-        return(USBFS_lineCoding[USBFS_LINE_CODING_PARITY]);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetDataBits\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns the number of data bits for the CDC port.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns the number of data bits.\r
-    *  The number of data bits can be 5, 6, 7, 8 or 16.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_lineCoding: used to get a parameter.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_GetDataBits(void) \r
-    {\r
-        return(USBFS_lineCoding[USBFS_LINE_CODING_DATA_BITS]);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_GetLineControl\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Returns Line control bitmap.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  Returns Line control bitmap.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_lineControlBitmap: used to get a parameter.\r
-    *\r
-    *******************************************************************************/\r
-    uint16 USBFS_GetLineControl(void) \r
-    {\r
-        return(USBFS_lineControlBitmap);\r
-    }\r
-\r
-#endif  /* End USBFS_ENABLE_CDC_CLASS_API*/\r
-\r
-\r
-/*******************************************************************************\r
-* Additional user functions supporting CDC Requests\r
-********************************************************************************/\r
-\r
-/* `#START CDC_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-#endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.h
deleted file mode 100755 (executable)
index 334bc58..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_cdc.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Header File for the USFS component.\r
-*  Contains CDC class prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2012-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_cdc_H)\r
-#define CY_USBFS_USBFS_cdc_H\r
-\r
-#include "cytypes.h"\r
-\r
-\r
-/***************************************\r
-* Prototypes of the USBFS_cdc API.\r
-***************************************/\r
-\r
-#if (USBFS_ENABLE_CDC_CLASS_API != 0u)\r
-    void USBFS_CDC_Init(void) ;\r
-    void USBFS_PutData(const uint8* pData, uint16 length) ;\r
-    void USBFS_PutString(const char8 string[]) ;\r
-    void USBFS_PutChar(char8 txDataByte) ;\r
-    void USBFS_PutCRLF(void) ;\r
-    uint16 USBFS_GetCount(void) ;\r
-    uint8 USBFS_CDCIsReady(void) ;\r
-    uint8 USBFS_DataIsReady(void) ;\r
-    uint16 USBFS_GetData(uint8* pData, uint16 length) ;\r
-    uint16 USBFS_GetAll(uint8* pData) ;\r
-    uint8 USBFS_GetChar(void) ;\r
-    uint8 USBFS_IsLineChanged(void) ;\r
-    uint32 USBFS_GetDTERate(void) ;\r
-    uint8 USBFS_GetCharFormat(void) ;\r
-    uint8 USBFS_GetParityType(void) ;\r
-    uint8 USBFS_GetDataBits(void) ;\r
-    uint16 USBFS_GetLineControl(void) ;\r
-#endif  /* End USBFS_ENABLE_CDC_CLASS_API*/\r
-\r
-\r
-/***************************************\r
-*  Constants for USBFS_cdc API.\r
-***************************************/\r
-\r
-/* CDC Class-Specific Request Codes (CDC ver 1.2 Table 19) */\r
-#define USBFS_CDC_SET_LINE_CODING        (0x20u)\r
-#define USBFS_CDC_GET_LINE_CODING        (0x21u)\r
-#define USBFS_CDC_SET_CONTROL_LINE_STATE (0x22u)\r
-\r
-#define USBFS_LINE_CODING_CHANGED        (0x01u)\r
-#define USBFS_LINE_CONTROL_CHANGED       (0x02u)\r
-\r
-#define USBFS_1_STOPBIT                  (0x00u)\r
-#define USBFS_1_5_STOPBITS               (0x01u)\r
-#define USBFS_2_STOPBITS                 (0x02u)\r
-\r
-#define USBFS_PARITY_NONE                (0x00u)\r
-#define USBFS_PARITY_ODD                 (0x01u)\r
-#define USBFS_PARITY_EVEN                (0x02u)\r
-#define USBFS_PARITY_MARK                (0x03u)\r
-#define USBFS_PARITY_SPACE               (0x04u)\r
-\r
-#define USBFS_LINE_CODING_SIZE           (0x07u)\r
-#define USBFS_LINE_CODING_RATE           (0x00u)\r
-#define USBFS_LINE_CODING_STOP_BITS      (0x04u)\r
-#define USBFS_LINE_CODING_PARITY         (0x05u)\r
-#define USBFS_LINE_CODING_DATA_BITS      (0x06u)\r
-\r
-#define USBFS_LINE_CONTROL_DTR           (0x01u)\r
-#define USBFS_LINE_CONTROL_RTS           (0x02u)\r
-\r
-\r
-/***************************************\r
-* External data references\r
-***************************************/\r
-\r
-extern volatile uint8 USBFS_lineCoding[USBFS_LINE_CODING_SIZE];\r
-extern volatile uint8 USBFS_lineChanged;\r
-extern volatile uint16 USBFS_lineControlBitmap;\r
-extern volatile uint8 USBFS_cdc_data_in_ep;\r
-extern volatile uint8 USBFS_cdc_data_out_ep;\r
-\r
-#endif /* End CY_USBFS_USBFS_cdc_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.inf b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.inf
deleted file mode 100755 (executable)
index c3477c2..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cdc.inf
+++ /dev/null
@@ -1,122 +0,0 @@
-;******************************************************************************\r
-; File Name: USBFS_cdc.inf\r
-; Version 2.60\r
-;\r
-; Description:\r
-;  Windows USB CDC setup file for USBUART Device.\r
-;\r
-;******************************************************************************\r
-; Copyright 2007-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions,\r
-; disclaimers, and limitations in the end user license agreement accompanying\r
-; the software package with which this file was provided.\r
-;******************************************************************************\r
-\r
-[Version]\r
-Signature="$Windows NT$"\r
-Class=Ports\r
-ClassGuid={4D36E978-E325-11CE-BFC1-08002BE10318}\r
-Provider=%PROVIDER%\r
-LayoutFile=layout.inf\r
-DriverVer=03/05/2007,2.0.0000.0\r
-\r
-[Manufacturer]\r
-%MFGNAME%=DeviceList, NTx86, NTia64, NTamd64\r
-\r
-[DestinationDirs]\r
-DefaultDestDir=12\r
-\r
-[SourceDisksFiles]\r
-\r
-[SourceDisksNames]\r
-\r
-[DeviceList.NTx86]\r
-%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232\r
-\r
-[DeviceList.NTia64]\r
-%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232\r
-\r
-[DeviceList.NTamd64]\r
-%DESCRIPTION%=DriverInstall, USB\VID_04B4&PID_F232\r
-\r
-\r
-;------------------------------------------------------------------------------\r
-;  32 bit section for Windows 2000/2003/XP/Vista\r
-;------------------------------------------------------------------------------\r
-\r
-[DriverInstall.NTx86]\r
-include=mdmcpq.inf\r
-CopyFiles=DriverCopyFiles\r
-AddReg=DriverInstall.NTx86.AddReg\r
-\r
-[DriverCopyFiles]\r
-usbser.sys,,,0x20\r
-\r
-[DriverInstall.NTx86.AddReg]\r
-HKR,,DevLoader,,*ntkern\r
-HKR,,NTMPDriver,,usbser.sys\r
-HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"\r
-\r
-[DriverInstall.NTx86.Services]\r
-AddService=usbser, 0x00000002, DriverService\r
-\r
-;------------------------------------------------------------------------------\r
-;  64 bit section for Intel Itanium based systems\r
-;------------------------------------------------------------------------------\r
-\r
-[DriverInstall.NTia64]\r
-include=mdmcpq.inf\r
-CopyFiles=DriverCopyFiles\r
-AddReg=DriverInstall.NTia64.AddReg\r
-\r
-[DriverCopyFiles]\r
-usbser.sys,,,0x20\r
-\r
-[DriverInstall.NTia64.AddReg]\r
-HKR,,DevLoader,,*ntkern\r
-HKR,,NTMPDriver,,usbser.sys\r
-HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"\r
-\r
-[DriverInstall.NTia64.Services]\r
-AddService=usbser, 0x00000002, DriverService\r
-\r
-;------------------------------------------------------------------------------\r
-;  64 bit section for AMD64 and Intel EM64T based systems\r
-;------------------------------------------------------------------------------\r
-\r
-[DriverInstall.NTamd64]\r
-include=mdmcpq.inf\r
-CopyFiles=DriverCopyFiles\r
-AddReg=DriverInstall.NTamd64.AddReg\r
-\r
-[DriverCopyFiles]\r
-usbser.sys,,,0x20\r
-\r
-[DriverInstall.NTamd64.AddReg]\r
-HKR,,DevLoader,,*ntkern\r
-HKR,,NTMPDriver,,usbser.sys\r
-HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"\r
-\r
-[DriverInstall.NTamd64.Services]\r
-AddService=usbser, 0x00000002, DriverService\r
-\r
-;------------------------------------------------------------------------------\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-[DriverService]\r
-DisplayName=%SERVICE%\r
-ServiceType=1\r
-StartType=3\r
-ErrorControl=1\r
-ServiceBinary=%12%\usbser.sys\r
-\r
-;------------------------------------------------------------------------------\r
-;  String Definitions\r
-;------------------------------------------------------------------------------\r
-\r
-[Strings]\r
-PROVIDER="Cypress"\r
-MFGNAME="Cypress Semiconductor Corporation"\r
-DESCRIPTION="Cypress USB UART"\r
-SERVICE="USB UART"\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cls.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cls.c
deleted file mode 100755 (executable)
index 7bbd8d1..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_cls.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_cls.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB Class request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if(USBFS_EXTERN_CLS == USBFS_FALSE)\r
-\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/***************************************\r
-* User Implemented Class Driver Declarations.\r
-***************************************/\r
-/* `#START USER_DEFINED_CLASS_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_DispatchClassRqst\r
-********************************************************************************\r
-* Summary:\r
-*  This routine dispatches class specific requests depend on interface class.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_DispatchClassRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-    uint8 interfaceNumber = 0u;\r
-\r
-    switch(CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
-    {\r
-        case USBFS_RQST_RCPT_IFC:        /* Class-specific request directed to an interface */\r
-            interfaceNumber = CY_GET_REG8(USBFS_wIndexLo); /* wIndexLo contain Interface number */\r
-            break;\r
-        case USBFS_RQST_RCPT_EP:         /* Class-specific request directed to the endpoint */\r
-            /* Find related interface to the endpoint, wIndexLo contain EP number */\r
-            interfaceNumber =\r
-                USBFS_EP[CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].interface;\r
-            break;\r
-        default:    /* RequestHandled is initialized as FALSE by default */\r
-            break;\r
-    }\r
-    /* Handle Class request depend on interface type */\r
-    switch(USBFS_interfaceClass[interfaceNumber])\r
-    {\r
-        case USBFS_CLASS_HID:\r
-            #if defined(USBFS_ENABLE_HID_CLASS)\r
-                requestHandled = USBFS_DispatchHIDClassRqst();\r
-            #endif /* USBFS_ENABLE_HID_CLASS */\r
-            break;\r
-        case USBFS_CLASS_AUDIO:\r
-            #if defined(USBFS_ENABLE_AUDIO_CLASS)\r
-                requestHandled = USBFS_DispatchAUDIOClassRqst();\r
-            #endif /* USBFS_ENABLE_HID_CLASS */\r
-            break;\r
-        case USBFS_CLASS_CDC:\r
-            #if defined(USBFS_ENABLE_CDC_CLASS)\r
-                requestHandled = USBFS_DispatchCDCClassRqst();\r
-            #endif /* USBFS_ENABLE_CDC_CLASS */\r
-            break;\r
-        default:    /* requestHandled is initialized as FALSE by default */\r
-            break;\r
-    }\r
-\r
-    /* `#START USER_DEFINED_CLASS_CODE` Place your Class request here */\r
-\r
-    /* `#END` */\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Additional user functions supporting Class Specific Requests\r
-********************************************************************************/\r
-\r
-/* `#START CLASS_SPECIFIC_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-#endif /* USBFS_EXTERN_CLS */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_descr.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_descr.c
deleted file mode 100755 (executable)
index da14446..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_descr.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_descr.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB descriptors and storage.\r
-*\r
-*  Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/*****************************************************************************\r
-*  User supplied descriptors.  If you want to specify your own descriptors,\r
-*  remove the comments around the define USER_SUPPLIED_DESCRIPTORS below and\r
-*  add your descriptors.\r
-*****************************************************************************/\r
-/* `#START USER_DESCRIPTORS_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/***************************************\r
-*  USB Customizer Generated Descriptors\r
-***************************************/\r
-\r
-#if !defined(USER_SUPPLIED_DESCRIPTORS)\r
-/*********************************************************************\r
-* Device Descriptors\r
-*********************************************************************/\r
-const uint8 CYCODE USBFS_DEVICE0_DESCR[18u] = {\r
-/* Descriptor Length                       */ 0x12u,\r
-/* DescriptorType: DEVICE                  */ 0x01u,\r
-/* bcdUSB (ver 2.0)                        */ 0x00u, 0x02u,\r
-/* bDeviceClass                            */ 0x00u,\r
-/* bDeviceSubClass                         */ 0x00u,\r
-/* bDeviceProtocol                         */ 0x00u,\r
-/* bMaxPacketSize0                         */ 0x08u,\r
-/* idVendor                                */ 0xB4u, 0x04u,\r
-/* idProduct                               */ 0x1Du, 0xB7u,\r
-/* bcdDevice                               */ 0x01u, 0x30u,\r
-/* iManufacturer                           */ 0x01u,\r
-/* iProduct                                */ 0x02u,\r
-/* iSerialNumber                           */ 0x80u,\r
-/* bNumConfigurations                      */ 0x01u\r
-};\r
-/*********************************************************************\r
-* Config Descriptor  \r
-*********************************************************************/\r
-const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[41u] = {\r
-/*  Config Descriptor Length               */ 0x09u,\r
-/*  DescriptorType: CONFIG                 */ 0x02u,\r
-/*  wTotalLength                           */ 0x29u, 0x00u,\r
-/*  bNumInterfaces                         */ 0x01u,\r
-/*  bConfigurationValue                    */ 0x01u,\r
-/*  iConfiguration                         */ 0x00u,\r
-/*  bmAttributes                           */ 0x80u,\r
-/*  bMaxPower                              */ 0x00u,\r
-/*********************************************************************\r
-* Interface Descriptor\r
-*********************************************************************/\r
-/*  Interface Descriptor Length            */ 0x09u,\r
-/*  DescriptorType: INTERFACE              */ 0x04u,\r
-/*  bInterfaceNumber                       */ 0x00u,\r
-/*  bAlternateSetting                      */ 0x00u,\r
-/*  bNumEndpoints                          */ 0x02u,\r
-/*  bInterfaceClass                        */ 0x03u,\r
-/*  bInterfaceSubClass                     */ 0x00u,\r
-/*  bInterfaceProtocol                     */ 0x00u,\r
-/*  iInterface                             */ 0x02u,\r
-/*********************************************************************\r
-* HID Class Descriptor\r
-*********************************************************************/\r
-/*  HID Class Descriptor Length            */ 0x09u,\r
-/*  DescriptorType: HID_CLASS              */ 0x21u,\r
-/*  bcdHID                                 */ 0x11u, 0x01u,\r
-/*  bCountryCode                           */ 0x00u,\r
-/*  bNumDescriptors                        */ 0x01u,\r
-/*  bDescriptorType                        */ 0x22u,\r
-/*  wDescriptorLength (LSB)                */ USBFS_HID_RPT_1_SIZE_LSB,\r
-/*  wDescriptorLength (MSB)                */ USBFS_HID_RPT_1_SIZE_MSB,\r
-/*********************************************************************\r
-* Endpoint Descriptor\r
-*********************************************************************/\r
-/*  Endpoint Descriptor Length             */ 0x07u,\r
-/*  DescriptorType: ENDPOINT               */ 0x05u,\r
-/*  bEndpointAddress                       */ 0x01u,\r
-/*  bmAttributes                           */ 0x03u,\r
-/*  wMaxPacketSize                         */ 0x40u, 0x00u,\r
-/*  bInterval                              */ 0x01u,\r
-/*********************************************************************\r
-* Endpoint Descriptor\r
-*********************************************************************/\r
-/*  Endpoint Descriptor Length             */ 0x07u,\r
-/*  DescriptorType: ENDPOINT               */ 0x05u,\r
-/*  bEndpointAddress                       */ 0x82u,\r
-/*  bmAttributes                           */ 0x03u,\r
-/*  wMaxPacketSize                         */ 0x40u, 0x00u,\r
-/*  bInterval                              */ 0x01u\r
-};\r
-\r
-/*********************************************************************\r
-* String Descriptor Table\r
-*********************************************************************/\r
-const uint8 CYCODE USBFS_STRING_DESCRIPTORS[83u] = {\r
-/*********************************************************************\r
-* Language ID Descriptor\r
-*********************************************************************/\r
-/* Descriptor Length                       */ 0x04u,\r
-/* DescriptorType: STRING                  */ 0x03u,\r
-/* Language Id                             */ 0x09u, 0x04u,\r
-/*********************************************************************\r
-* String Descriptor: "Cypress Semiconductor"\r
-*********************************************************************/\r
-/* Descriptor Length                       */ 0x2Cu,\r
-/* DescriptorType: STRING                  */ 0x03u,\r
- (uint8)'C', 0u,(uint8)'y', 0u,(uint8)'p', 0u,(uint8)'r', 0u,(uint8)'e', 0u,\r
- (uint8)'s', 0u,(uint8)'s', 0u,(uint8)' ', 0u,(uint8)'S', 0u,(uint8)'e', 0u,\r
- (uint8)'m', 0u,(uint8)'i', 0u,(uint8)'c', 0u,(uint8)'o', 0u,(uint8)'n', 0u,\r
- (uint8)'d', 0u,(uint8)'u', 0u,(uint8)'c', 0u,(uint8)'t', 0u,(uint8)'o', 0u,\r
- (uint8)'r', 0u,\r
-/*********************************************************************\r
-* String Descriptor: "PSoC3 Bootloader"\r
-*********************************************************************/\r
-/* Descriptor Length                       */ 0x22u,\r
-/* DescriptorType: STRING                  */ 0x03u,\r
- (uint8)'P', 0u,(uint8)'S', 0u,(uint8)'o', 0u,(uint8)'C', 0u,(uint8)'3', 0u,\r
- (uint8)' ', 0u,(uint8)'B', 0u,(uint8)'o', 0u,(uint8)'o', 0u,(uint8)'t', 0u,\r
- (uint8)'l', 0u,(uint8)'o', 0u,(uint8)'a', 0u,(uint8)'d', 0u,(uint8)'e', 0u,\r
- (uint8)'r', 0u,\r
-/*********************************************************************/\r
-/* Marks the end of the list.              */ 0x00u};\r
-/*********************************************************************/\r
-\r
-/*********************************************************************\r
-* Serial Number String Descriptor\r
-*********************************************************************/\r
-const uint8 CYCODE USBFS_SN_STRING_DESCRIPTOR[10] = {\r
-/* Descriptor Length                       */ 0x0Au,\r
-/* DescriptorType: STRING                  */ 0x03u,\r
-(uint8)'0', 0u,(uint8)'0', 0u,(uint8)'0', 0u,(uint8)'1', 0u\r
-};\r
-\r
-/*********************************************************************\r
-* HID Report Descriptor: Generic HID\r
-*********************************************************************/\r
-const uint8 CYCODE USBFS_HIDREPORT_DESCRIPTOR1[40u] = {\r
-/*  Descriptor Size (Not part of descriptor)*/ USBFS_HID_RPT_1_SIZE_LSB,\r
-USBFS_HID_RPT_1_SIZE_MSB,\r
-/* USAGE_PAGE                              */ 0x05u, 0x01u, \r
-/* USAGE                                   */ 0x09u, 0x00u, \r
-/* COLLECTION                              */ 0xA1u, 0x00u, \r
-/* USAGE                                   */ 0x09u, 0x00u, \r
-/* COLLECTION                              */ 0xA1u, 0x00u, \r
-/* USAGE                                   */ 0x09u, 0x00u, \r
-/* LOGICAL_MINIMUM                         */ 0x15u, 0x00u, \r
-/* LOGICAL_MAXIMUM                         */ 0x25u, 0xFFu, \r
-/* REPORT_SIZE                             */ 0x75u, 0x08u, \r
-/* REPORT_COUNT                            */ 0x95u, 0x40u, \r
-/* OUTPUT                                  */ 0x91u, 0x02u, \r
-/* USAGE                                   */ 0x09u, 0x00u, \r
-/* LOGICAL_MINIMUM                         */ 0x15u, 0x00u, \r
-/* LOGICAL_MAXIMUM                         */ 0x25u, 0xFFu, \r
-/* REPORT_SIZE                             */ 0x75u, 0x08u, \r
-/* REPORT_COUNT                            */ 0x95u, 0x40u, \r
-/* INPUT                                   */ 0x81u, 0x02u, \r
-/* END_COLLECTION                          */ 0xC0u, \r
-/* END_COLLECTION                          */ 0xC0u, \r
-/*********************************************************************/\r
-/* End of the HID Report Descriptor        */ 0x00u, 0x00u};\r
-/*********************************************************************/\r
-\r
-#if !defined(USER_DEFINE_USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_HID_RPT_STORAGE)\r
-/*********************************************************************\r
-* HID Input Report Storage\r
-*********************************************************************/\r
-T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB;\r
-uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF[\r
-            USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF_SIZE];\r
-\r
-/*********************************************************************\r
-* HID Input Report TD Table\r
-*********************************************************************/\r
-const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE[1u] = {\r
-    {USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF_SIZE,\r
-    &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF[0u],\r
-    &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB},\r
-};\r
-/*********************************************************************\r
-* HID Output Report Storage\r
-*********************************************************************/\r
-T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB;\r
-uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF[\r
-            USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE];\r
-\r
-/*********************************************************************\r
-* HID Output Report TD Table\r
-*********************************************************************/\r
-const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE[1u] = {\r
-    {USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE,\r
-    &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF[0u],\r
-    &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB},\r
-};\r
-/*********************************************************************\r
-* HID Report Look Up Table         This table has four entries:\r
-*                                        IN Report Table\r
-*                                        OUT Report Table\r
-*                                        Feature Report Table\r
-*                                        HID Report Descriptor\r
-*                                        HID Class Descriptor\r
-*********************************************************************/\r
-const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE[5u] = {\r
-    {0x00u,     &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE},\r
-    {0x00u,     &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE},\r
-    {0x00u,    NULL},\r
-    {0x01u,     (const void *)&USBFS_HIDREPORT_DESCRIPTOR1[0]},\r
-    {0x01u,     (const void *)&USBFS_DEVICE0_CONFIGURATION0_DESCR[18]}\r
-};\r
-#endif /* USER_DEFINE_USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_HID_RPT_STORAGE */\r
-\r
-/*********************************************************************\r
-* Interface Dispatch Table -- Points to the Class Dispatch Tables\r
-*********************************************************************/\r
-const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE[1u] = {\r
-    {USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_COUNT, \r
-    &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE}\r
-};\r
-/*********************************************************************\r
-* Endpoint Setting Table -- This table contain the endpoint setting\r
-*                           for each endpoint in the configuration. It\r
-*                           contains the necessary information to\r
-*                           configure the endpoint hardware for each\r
-*                           interface and alternate setting.\r
-*********************************************************************/\r
-const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[2u] = {\r
-/* IFC  ALT    EPAddr bmAttr MaxPktSize Class ********************/\r
-{0x00u, 0x00u, 0x01u, 0x03u, 0x0040u,   0x03u},\r
-{0x00u, 0x00u, 0x82u, 0x03u, 0x0040u,   0x03u}\r
-};\r
-const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u] = {\r
-0x03u\r
-};\r
-/*********************************************************************\r
-* Config Dispatch Table -- Points to the Config Descriptor and each of\r
-*                          and endpoint setup table and to each\r
-*                          interface table if it specifies a USB Class\r
-*********************************************************************/\r
-const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[4u] = {\r
-    {0x01u,     &USBFS_DEVICE0_CONFIGURATION0_DESCR},\r
-    {0x02u,     &USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE},\r
-    {0x01u,     &USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE},\r
-    {0x00u,     &USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS}\r
-};\r
-/*********************************************************************\r
-* Device Dispatch Table -- Points to the Device Descriptor and each of\r
-*                          and Configuration Tables for this Device \r
-*********************************************************************/\r
-const T_USBFS_LUT CYCODE USBFS_DEVICE0_TABLE[2u] = {\r
-    {0x01u,     &USBFS_DEVICE0_DESCR},\r
-    {0x01u,     &USBFS_DEVICE0_CONFIGURATION0_TABLE}\r
-};\r
-/*********************************************************************\r
-* Device Table -- Indexed by the device number.\r
-*********************************************************************/\r
-const T_USBFS_LUT CYCODE USBFS_TABLE[1u] = {\r
-    {0x01u,     &USBFS_DEVICE0_TABLE}\r
-};\r
-\r
-#endif /* USER_SUPPLIED_DESCRIPTORS */\r
-\r
-#if defined(USBFS_ENABLE_MSOS_STRING)\r
-\r
-    /******************************************************************************\r
-    *  USB Microsoft OS String Descriptor\r
-    *  "MSFT" identifies a Microsoft host\r
-    *  "100" specifies version 1.00\r
-    *  USBFS_GET_EXTENDED_CONFIG_DESCRIPTOR becomes the bRequest value\r
-    *  in a host vendor device/class request\r
-    ******************************************************************************/\r
-\r
-    const uint8 CYCODE USBFS_MSOS_DESCRIPTOR[USBFS_MSOS_DESCRIPTOR_LENGTH] = {\r
-    /* Descriptor Length                       */   0x12u,\r
-    /* DescriptorType: STRING                  */   0x03u,\r
-    /* qwSignature - "MSFT100"                 */   (uint8)'M', 0u, (uint8)'S', 0u, (uint8)'F', 0u, (uint8)'T', 0u,\r
-                                                    (uint8)'1', 0u, (uint8)'0', 0u, (uint8)'0', 0u,\r
-    /* bMS_VendorCode:                         */   USBFS_GET_EXTENDED_CONFIG_DESCRIPTOR,\r
-    /* bPad                                    */   0x00u\r
-    };\r
-\r
-    /* Extended Configuration Descriptor */\r
-\r
-    const uint8 CYCODE USBFS_MSOS_CONFIGURATION_DESCR[USBFS_MSOS_CONF_DESCR_LENGTH] = {\r
-    /*  Length of the descriptor 4 bytes       */   0x28u, 0x00u, 0x00u, 0x00u,\r
-    /*  Version of the descriptor 2 bytes      */   0x00u, 0x01u,\r
-    /*  wIndex - Fixed:INDEX_CONFIG_DESCRIPTOR */   0x04u, 0x00u,\r
-    /*  bCount - Count of device functions.    */   0x01u,\r
-    /*  Reserved : 7 bytes                     */   0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    /*  bFirstInterfaceNumber                  */   0x00u,\r
-    /*  Reserved                               */   0x01u,\r
-    /*  compatibleID    - "CYUSB\0\0"          */   (uint8)'C', (uint8)'Y', (uint8)'U', (uint8)'S', (uint8)'B',\r
-                                                    0x00u, 0x00u, 0x00u,\r
-    /*  subcompatibleID - "00001\0\0"          */   (uint8)'0', (uint8)'0', (uint8)'0', (uint8)'0', (uint8)'1',\r
-                                                    0x00u, 0x00u, 0x00u,\r
-    /*  Reserved : 6 bytes                     */   0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u\r
-    };\r
-\r
-#endif /* USBFS_ENABLE_MSOS_STRING */\r
-\r
-/* DIE ID string descriptor for 8 bytes ID */\r
-#if defined(USBFS_ENABLE_IDSN_STRING)\r
-    uint8 USBFS_idSerialNumberStringDescriptor[USBFS_IDSN_DESCR_LENGTH];\r
-#endif /* USBFS_ENABLE_IDSN_STRING */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_drv.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_drv.c
deleted file mode 100755 (executable)
index e78a41b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_drv.c
+++ /dev/null
@@ -1,781 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_drv.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Endpoint 0 Driver for the USBFS Component.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/***************************************\r
-* Global data allocation\r
-***************************************/\r
-\r
-volatile T_USBFS_EP_CTL_BLOCK USBFS_EP[USBFS_MAX_EP];\r
-volatile uint8 USBFS_configuration;\r
-volatile uint8 USBFS_interfaceNumber;\r
-volatile uint8 USBFS_configurationChanged;\r
-volatile uint8 USBFS_deviceAddress;\r
-volatile uint8 USBFS_deviceStatus;\r
-volatile uint8 USBFS_interfaceSetting[USBFS_MAX_INTERFACES_NUMBER];\r
-volatile uint8 USBFS_interfaceSetting_last[USBFS_MAX_INTERFACES_NUMBER];\r
-volatile uint8 USBFS_interfaceStatus[USBFS_MAX_INTERFACES_NUMBER];\r
-volatile uint8 USBFS_device;\r
-const uint8 CYCODE *USBFS_interfaceClass;\r
-\r
-\r
-/***************************************\r
-* Local data allocation\r
-***************************************/\r
-\r
-volatile uint8 USBFS_ep0Toggle;\r
-volatile uint8 USBFS_lastPacketSize;\r
-volatile uint8 USBFS_transferState;\r
-volatile T_USBFS_TD USBFS_currentTD;\r
-volatile uint8 USBFS_ep0Mode;\r
-volatile uint8 USBFS_ep0Count;\r
-volatile uint16 USBFS_transferByteCount;\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ep_0_Interrupt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This Interrupt Service Routine handles Endpoint 0 (Control Pipe) traffic.\r
-*  It dispatches setup requests and handles the data and status stages.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-CY_ISR(USBFS_EP_0_ISR)\r
-{\r
-    uint8 bRegTemp;\r
-    uint8 modifyReg;\r
-\r
-\r
-    bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);\r
-    if ((bRegTemp & USBFS_MODE_ACKD) != 0u)\r
-    {\r
-        modifyReg = 1u;\r
-        if ((bRegTemp & USBFS_MODE_SETUP_RCVD) != 0u)\r
-        {\r
-            if((bRegTemp & USBFS_MODE_MASK) != USBFS_MODE_NAK_IN_OUT)\r
-            {\r
-                modifyReg = 0u;                                     /* When mode not NAK_IN_OUT => invalid setup */\r
-            }\r
-            else\r
-            {\r
-                USBFS_HandleSetup();\r
-                if((USBFS_ep0Mode & USBFS_MODE_SETUP_RCVD) != 0u)\r
-                {\r
-                    modifyReg = 0u;                         /* if SETUP bit set -> exit without modifying the mode */\r
-                }\r
-\r
-            }\r
-        }\r
-        else if ((bRegTemp & USBFS_MODE_IN_RCVD) != 0u)\r
-        {\r
-            USBFS_HandleIN();\r
-        }\r
-        else if ((bRegTemp & USBFS_MODE_OUT_RCVD) != 0u)\r
-        {\r
-            USBFS_HandleOUT();\r
-        }\r
-        else\r
-        {\r
-            modifyReg = 0u;\r
-        }\r
-        if(modifyReg != 0u)\r
-        {\r
-            bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR);    /* unlock registers */\r
-            if((bRegTemp & USBFS_MODE_SETUP_RCVD) == 0u)  /* Check if SETUP bit is not set, otherwise exit */\r
-            {\r
-                /* Update the count register */\r
-                bRegTemp = USBFS_ep0Toggle | USBFS_ep0Count;\r
-                CY_SET_REG8(USBFS_EP0_CNT_PTR, bRegTemp);\r
-                if(bRegTemp == CY_GET_REG8(USBFS_EP0_CNT_PTR))   /* continue if writing was successful */\r
-                {\r
-                    do\r
-                    {\r
-                        modifyReg = USBFS_ep0Mode;       /* Init temporary variable */\r
-                        /* Unlock registers */\r
-                        bRegTemp = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_SETUP_RCVD;\r
-                        if(bRegTemp == 0u)                          /* Check if SETUP bit is not set */\r
-                        {\r
-                            /* Set the Mode Register  */\r
-                            CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_ep0Mode);\r
-                            /* Writing check */\r
-                            modifyReg = CY_GET_REG8(USBFS_EP0_CR_PTR) & USBFS_MODE_MASK;\r
-                        }\r
-                    }while(modifyReg != USBFS_ep0Mode);  /* Repeat if writing was not successful */\r
-                }\r
-            }\r
-        }\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_HandleSetup\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This Routine dispatches requests for the four USB request types\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_HandleSetup(void) \r
-{\r
-    uint8 requestHandled;\r
-\r
-    requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* unlock registers */\r
-    CY_SET_REG8(USBFS_EP0_CR_PTR, requestHandled);       /* clear setup bit */\r
-    requestHandled = CY_GET_REG8(USBFS_EP0_CR_PTR);      /* reread register */\r
-    if((requestHandled & USBFS_MODE_SETUP_RCVD) != 0u)\r
-    {\r
-        USBFS_ep0Mode = requestHandled;        /* if SETUP bit set -> exit without modifying the mode */\r
-    }\r
-    else\r
-    {\r
-        /* In case the previous transfer did not complete, close it out */\r
-        USBFS_UpdateStatusBlock(USBFS_XFER_PREMATURE);\r
-\r
-        switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_TYPE_MASK)\r
-        {\r
-            case USBFS_RQST_TYPE_STD:\r
-                requestHandled = USBFS_HandleStandardRqst();\r
-                break;\r
-            case USBFS_RQST_TYPE_CLS:\r
-                requestHandled = USBFS_DispatchClassRqst();\r
-                break;\r
-            case USBFS_RQST_TYPE_VND:\r
-                requestHandled = USBFS_HandleVendorRqst();\r
-                break;\r
-            default:\r
-                requestHandled = USBFS_FALSE;\r
-                break;\r
-        }\r
-        if (requestHandled == USBFS_FALSE)\r
-        {\r
-            USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
-        }\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_HandleIN\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine handles EP0 IN transfers.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_HandleIN(void) \r
-{\r
-    switch (USBFS_transferState)\r
-    {\r
-        case USBFS_TRANS_STATE_IDLE:\r
-            break;\r
-        case USBFS_TRANS_STATE_CONTROL_READ:\r
-            USBFS_ControlReadDataStage();\r
-            break;\r
-        case USBFS_TRANS_STATE_CONTROL_WRITE:\r
-            USBFS_ControlWriteStatusStage();\r
-            break;\r
-        case USBFS_TRANS_STATE_NO_DATA_CONTROL:\r
-            USBFS_NoDataControlStatusStage();\r
-            break;\r
-        default:    /* there are no more states */\r
-            break;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_HandleOUT\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine handles EP0 OUT transfers.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_HandleOUT(void) \r
-{\r
-    switch (USBFS_transferState)\r
-    {\r
-        case USBFS_TRANS_STATE_IDLE:\r
-            break;\r
-        case USBFS_TRANS_STATE_CONTROL_READ:\r
-            USBFS_ControlReadStatusStage();\r
-            break;\r
-        case USBFS_TRANS_STATE_CONTROL_WRITE:\r
-            USBFS_ControlWriteDataStage();\r
-            break;\r
-        case USBFS_TRANS_STATE_NO_DATA_CONTROL:\r
-            /* Update the completion block */\r
-            USBFS_UpdateStatusBlock(USBFS_XFER_ERROR);\r
-            /* We expect no more data, so stall INs and OUTs */\r
-            USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
-            break;\r
-        default:    /* There are no more states */\r
-            break;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_LoadEP0\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine loads the EP0 data registers for OUT transfers.  It uses the\r
-*  currentTD (previously initialized by the _InitControlWrite function and\r
-*  updated for each OUT transfer, and the bLastPacketSize) to determine how\r
-*  many uint8s to transfer on the current OUT.\r
-*\r
-*  If the number of uint8s remaining is zero and the last transfer was full,\r
-*  we need to send a zero length packet.  Otherwise we send the minimum\r
-*  of the control endpoint size (8) or remaining number of uint8s for the\r
-*  transaction.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_transferByteCount - Update the transfer byte count from the\r
-*     last transaction.\r
-*  USBFS_ep0Count - counts the data loaded to the SIE memory in\r
-*     current packet.\r
-*  USBFS_lastPacketSize - remembers the USBFS_ep0Count value for the\r
-*     next packet.\r
-*  USBFS_transferByteCount - sum of the previous bytes transferred\r
-*     on previous packets(sum of USBFS_lastPacketSize)\r
-*  USBFS_ep0Toggle - inverted\r
-*  USBFS_ep0Mode  - prepare for mode register content.\r
-*  USBFS_transferState - set to TRANS_STATE_CONTROL_READ\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_LoadEP0(void) \r
-{\r
-    uint8 ep0Count = 0u;\r
-\r
-    /* Update the transfer byte count from the last transaction */\r
-    USBFS_transferByteCount += USBFS_lastPacketSize;\r
-    /* Now load the next transaction */\r
-    while ((USBFS_currentTD.count > 0u) && (ep0Count < 8u))\r
-    {\r
-        CY_SET_REG8((reg8 *)(USBFS_EP0_DR0_IND + ep0Count), *USBFS_currentTD.pData);\r
-        USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
-        ep0Count++;\r
-        USBFS_currentTD.count--;\r
-    }\r
-    /* Support zero-length packet*/\r
-    if( (USBFS_lastPacketSize == 8u) || (ep0Count > 0u) )\r
-    {\r
-        /* Update the data toggle */\r
-        USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
-        /* Set the Mode Register  */\r
-        USBFS_ep0Mode = USBFS_MODE_ACK_IN_STATUS_OUT;\r
-        /* Update the state (or stay the same) */\r
-        USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
-    }\r
-    else\r
-    {\r
-        /* Expect Status Stage Out */\r
-        USBFS_ep0Mode = USBFS_MODE_STATUS_OUT_ONLY;\r
-        /* Update the state (or stay the same) */\r
-        USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
-    }\r
-\r
-    /* Save the packet size for next time */\r
-    USBFS_lastPacketSize = ep0Count;\r
-    USBFS_ep0Count = ep0Count;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitControlRead\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize a control read transaction, usable to send data to the host.\r
-*  The following global variables should be initialized before this function\r
-*  called. To send zero length packet use InitZeroLengthControlTransfer\r
-*  function.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled state.\r
-*\r
-* Global variables:\r
-*  USBFS_currentTD.count - counts of data to be sent.\r
-*  USBFS_currentTD.pData - data pointer.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_InitControlRead(void) \r
-{\r
-    uint16 xferCount;\r
-    if(USBFS_currentTD.count == 0u)\r
-    {\r
-        (void) USBFS_InitZeroLengthControlTransfer();\r
-    }\r
-    else\r
-    {\r
-        /* Set up the state machine */\r
-        USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
-        /* Set the toggle, it gets updated in LoadEP */\r
-        USBFS_ep0Toggle = 0u;\r
-        /* Initialize the Status Block */\r
-        USBFS_InitializeStatusBlock();\r
-        xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
-\r
-        if (USBFS_currentTD.count > xferCount)\r
-        {\r
-            USBFS_currentTD.count = xferCount;\r
-        }\r
-        USBFS_LoadEP0();\r
-    }\r
-\r
-    return(USBFS_TRUE);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitZeroLengthControlTransfer\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize a zero length data IN transfer.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled state.\r
-*\r
-* Global variables:\r
-*  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
-*  USBFS_ep0Mode  - prepare for mode register content.\r
-*  USBFS_transferState - set to TRANS_STATE_CONTROL_READ\r
-*  USBFS_ep0Count - cleared, means the zero-length packet.\r
-*  USBFS_lastPacketSize - cleared.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_InitZeroLengthControlTransfer(void)\r
-                                                \r
-{\r
-    /* Update the state */\r
-    USBFS_transferState = USBFS_TRANS_STATE_CONTROL_READ;\r
-    /* Set the data toggle */\r
-    USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
-    /* Set the Mode Register  */\r
-    USBFS_ep0Mode = USBFS_MODE_ACK_IN_STATUS_OUT;\r
-    /* Save the packet size for next time */\r
-    USBFS_lastPacketSize = 0u;\r
-    USBFS_ep0Count = 0u;\r
-\r
-    return(USBFS_TRUE);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ControlReadDataStage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Handle the Data Stage of a control read transfer.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ControlReadDataStage(void) \r
-\r
-{\r
-    USBFS_LoadEP0();\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ControlReadStatusStage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Handle the Status Stage of a control read transfer.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_USBFS_transferByteCount - updated with last packet size.\r
-*  USBFS_transferState - set to TRANS_STATE_IDLE.\r
-*  USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ControlReadStatusStage(void) \r
-{\r
-    /* Update the transfer byte count */\r
-    USBFS_transferByteCount += USBFS_lastPacketSize;\r
-    /* Go Idle */\r
-    USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
-    /* Update the completion block */\r
-    USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
-    /* We expect no more data, so stall INs and OUTs */\r
-    USBFS_ep0Mode =  USBFS_MODE_STALL_IN_OUT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitControlWrite\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize a control write transaction\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled state.\r
-*\r
-* Global variables:\r
-*  USBFS_USBFS_transferState - set to TRANS_STATE_CONTROL_WRITE\r
-*  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
-*  USBFS_ep0Mode  - set to MODE_ACK_OUT_STATUS_IN\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_InitControlWrite(void) \r
-{\r
-    uint16 xferCount;\r
-\r
-    /* Set up the state machine */\r
-    USBFS_transferState = USBFS_TRANS_STATE_CONTROL_WRITE;\r
-    /* This might not be necessary */\r
-    USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
-    /* Initialize the Status Block */\r
-    USBFS_InitializeStatusBlock();\r
-\r
-    xferCount = (((uint16)CY_GET_REG8(USBFS_lengthHi) << 8u) | (CY_GET_REG8(USBFS_lengthLo)));\r
-\r
-    if (USBFS_currentTD.count > xferCount)\r
-    {\r
-        USBFS_currentTD.count = xferCount;\r
-    }\r
-\r
-    /* Expect Data or Status Stage */\r
-    USBFS_ep0Mode = USBFS_MODE_ACK_OUT_STATUS_IN;\r
-\r
-    return(USBFS_TRUE);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ControlWriteDataStage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Handle the Data Stage of a control write transfer\r
-*       1. Get the data (We assume the destination was validated previously)\r
-*       2. Update the count and data toggle\r
-*       3. Update the mode register for the next transaction\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_transferByteCount - Update the transfer byte count from the\r
-*    last transaction.\r
-*  USBFS_ep0Count - counts the data loaded from the SIE memory\r
-*    in current packet.\r
-*  USBFS_transferByteCount - sum of the previous bytes transferred\r
-*    on previous packets(sum of USBFS_lastPacketSize)\r
-*  USBFS_ep0Toggle - inverted\r
-*  USBFS_ep0Mode  - set to MODE_ACK_OUT_STATUS_IN.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ControlWriteDataStage(void) \r
-{\r
-    uint8 ep0Count;\r
-    uint8 regIndex = 0u;\r
-\r
-    ep0Count = (CY_GET_REG8(USBFS_EP0_CNT_PTR) & USBFS_EPX_CNT0_MASK) -\r
-               USBFS_EPX_CNTX_CRC_COUNT;\r
-\r
-    USBFS_transferByteCount += ep0Count;\r
-\r
-    while ((USBFS_currentTD.count > 0u) && (ep0Count > 0u))\r
-    {\r
-        *USBFS_currentTD.pData = CY_GET_REG8((reg8 *)(USBFS_EP0_DR0_IND + regIndex));\r
-        USBFS_currentTD.pData = &USBFS_currentTD.pData[1u];\r
-        regIndex++;\r
-        ep0Count--;\r
-        USBFS_currentTD.count--;\r
-    }\r
-    USBFS_ep0Count = ep0Count;\r
-    /* Update the data toggle */\r
-    USBFS_ep0Toggle ^= USBFS_EP0_CNT_DATA_TOGGLE;\r
-    /* Expect Data or Status Stage */\r
-    USBFS_ep0Mode = USBFS_MODE_ACK_OUT_STATUS_IN;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ControlWriteStatusStage\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Handle the Status Stage of a control write transfer\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_transferState - set to TRANS_STATE_IDLE.\r
-*  USBFS_USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ControlWriteStatusStage(void) \r
-{\r
-    /* Go Idle */\r
-    USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
-    /* Update the completion block */\r
-    USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
-    /* We expect no more data, so stall INs and OUTs */\r
-    USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitNoDataControlTransfer\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize a no data control transfer\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled state.\r
-*\r
-* Global variables:\r
-*  USBFS_transferState - set to TRANS_STATE_NO_DATA_CONTROL.\r
-*  USBFS_ep0Mode  - set to MODE_STATUS_IN_ONLY.\r
-*  USBFS_ep0Count - cleared.\r
-*  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_InitNoDataControlTransfer(void) \r
-{\r
-    USBFS_transferState = USBFS_TRANS_STATE_NO_DATA_CONTROL;\r
-    USBFS_ep0Mode = USBFS_MODE_STATUS_IN_ONLY;\r
-    USBFS_ep0Toggle = USBFS_EP0_CNT_DATA_TOGGLE;\r
-    USBFS_ep0Count = 0u;\r
-\r
-    return(USBFS_TRUE);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_NoDataControlStatusStage\r
-********************************************************************************\r
-* Summary:\r
-*  Handle the Status Stage of a no data control transfer.\r
-*\r
-*  SET_ADDRESS is special, since we need to receive the status stage with\r
-*  the old address.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_transferState - set to TRANS_STATE_IDLE.\r
-*  USBFS_ep0Mode  - set to MODE_STALL_IN_OUT.\r
-*  USBFS_ep0Toggle - set to EP0_CNT_DATA_TOGGLE\r
-*  USBFS_deviceAddress - used to set new address and cleared\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_NoDataControlStatusStage(void) \r
-{\r
-    /* Change the USB address register if we got a SET_ADDRESS. */\r
-    if (USBFS_deviceAddress != 0u)\r
-    {\r
-        CY_SET_REG8(USBFS_CR0_PTR, USBFS_deviceAddress | USBFS_CR0_ENABLE);\r
-        USBFS_deviceAddress = 0u;\r
-    }\r
-    /* Go Idle */\r
-    USBFS_transferState = USBFS_TRANS_STATE_IDLE;\r
-    /* Update the completion block */\r
-    USBFS_UpdateStatusBlock(USBFS_XFER_STATUS_ACK);\r
-     /* We expect no more data, so stall INs and OUTs */\r
-    USBFS_ep0Mode = USBFS_MODE_STALL_IN_OUT;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_UpdateStatusBlock\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Update the Completion Status Block for a Request.  The block is updated\r
-*  with the completion code the USBFS_transferByteCount.  The\r
-*  StatusBlock Pointer is set to NULL.\r
-*\r
-* Parameters:\r
-*  completionCode - status.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_currentTD.pStatusBlock->status - updated by the\r
-*    completionCode parameter.\r
-*  USBFS_currentTD.pStatusBlock->length - updated.\r
-*  USBFS_currentTD.pStatusBlock - cleared.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_UpdateStatusBlock(uint8 completionCode) \r
-{\r
-    if (USBFS_currentTD.pStatusBlock != NULL)\r
-    {\r
-        USBFS_currentTD.pStatusBlock->status = completionCode;\r
-        USBFS_currentTD.pStatusBlock->length = USBFS_transferByteCount;\r
-        USBFS_currentTD.pStatusBlock = NULL;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_InitializeStatusBlock\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Initialize the Completion Status Block for a Request.  The completion\r
-*  code is set to USB_XFER_IDLE.\r
-*\r
-*  Also, initializes USBFS_transferByteCount.  Save some space,\r
-*  this is the only consumer.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_currentTD.pStatusBlock->status - set to XFER_IDLE.\r
-*  USBFS_currentTD.pStatusBlock->length - cleared.\r
-*  USBFS_transferByteCount - cleared.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_InitializeStatusBlock(void) \r
-{\r
-    USBFS_transferByteCount = 0u;\r
-    if(USBFS_currentTD.pStatusBlock != NULL)\r
-    {\r
-        USBFS_currentTD.pStatusBlock->status = USBFS_XFER_IDLE;\r
-        USBFS_currentTD.pStatusBlock->length = 0u;\r
-    }\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_episr.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_episr.c
deleted file mode 100755 (executable)
index cd88e92..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_episr.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_episr.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Data endpoint Interrupt Service Routines\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING) && (USBFS_ENABLE_MIDI_API != 0u)\r
-    #include "USBFS_midi.h"\r
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-/* `#START CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-#if(USBFS_EP1_ISR_REMOVE == 0u)\r
-\r
-\r
-    /******************************************************************************\r
-    * Function Name: USBFS_EP_1_ISR\r
-    *******************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 1 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    ******************************************************************************/\r
-    CY_ISR(USBFS_EP_1_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-\r
-        /* `#START EP1_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP1_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP1].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP1].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP1].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR) &\r
-                                                                    (uint8)~USBFS_SIE_EP_INT_EP1_MASK);\r
-\r
-        #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )\r
-            if(USBFS_midi_out_ep == USBFS_EP1)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP1_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )\r
-            EA = int_en;\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-    }\r
-\r
-#endif   /* End USBFS_EP1_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP2_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_2_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 2 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_2_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-\r
-        /* `#START EP2_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 )\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP2_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP2].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP2].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP2].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP2_MASK);\r
-\r
-        #if( defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT )\r
-            if(USBFS_midi_out_ep == USBFS_EP2)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP2_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-    }\r
-\r
-#endif   /* End USBFS_EP2_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP3_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_3_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 3 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_3_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3 */\r
-\r
-        /* `#START EP3_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP3_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP3].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP3].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP3].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP3_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP3)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP3_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-\r
-#endif   /* End USBFS_EP3_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP4_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_4_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 4 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_4_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP4_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP4_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP4].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP4].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP4].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP4_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP4)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP4_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-\r
-#endif   /* End USBFS_EP4_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP5_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_5_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 5 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_5_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP5_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP5_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP5].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP5].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP5].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP5_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP5)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP5_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-#endif   /* End USBFS_EP5_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP6_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_6_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 6 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_6_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP6_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP6_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP6].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP6].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP6].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP6_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP6)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP6_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-\r
-#endif   /* End USBFS_EP6_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP7_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_7_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 7 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_7_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP7_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP7_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP7].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP7].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP7].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP7_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP7)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP7_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-\r
-#endif   /* End USBFS_EP7_ISR_REMOVE */\r
-\r
-\r
-#if(USBFS_EP8_ISR_REMOVE == 0u)\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_EP_8_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Endpoint 8 Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_EP_8_ISR)\r
-    {\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            uint8 int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        /* `#START EP8_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            int_en = EA;\r
-            CyGlobalIntEnable;  /* Make sure nested interrupt is enabled */\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-\r
-        CY_GET_REG8(USBFS_SIE_EP8_CR0_PTR); /* Must read the mode reg */\r
-        /* Do not toggle ISOC endpoint */\r
-        if((USBFS_EP[USBFS_EP8].attrib & USBFS_EP_TYPE_MASK) !=\r
-                                                                                    USBFS_EP_TYPE_ISOC)\r
-        {\r
-            USBFS_EP[USBFS_EP8].epToggle ^= USBFS_EPX_CNT_DATA_TOGGLE;\r
-        }\r
-        USBFS_EP[USBFS_EP8].apiEpState = USBFS_EVENT_PENDING;\r
-        CY_SET_REG8(USBFS_SIE_EP_INT_SR_PTR, CY_GET_REG8(USBFS_SIE_EP_INT_SR_PTR)\r
-                                                                        & (uint8)~USBFS_SIE_EP_INT_EP8_MASK);\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT)\r
-            if(USBFS_midi_out_ep == USBFS_EP8)\r
-            {\r
-                USBFS_MIDI_OUT_EP_Service();\r
-            }\r
-        #endif /* End USBFS_ISR_SERVICE_MIDI_OUT */\r
-\r
-        /* `#START EP8_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_OUT && CY_PSOC3)\r
-            EA = int_en;\r
-        #endif /* CY_PSOC3 & USBFS_ISR_SERVICE_MIDI_OUT  */\r
-    }\r
-\r
-#endif   /* End USBFS_EP8_ISR_REMOVE */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_SOF_ISR\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Start of Frame Interrupt Service Routine\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-CY_ISR(USBFS_SOF_ISR)\r
-{\r
-    /* `#START SOF_USER_CODE` Place your code here */\r
-\r
-    /* `#END` */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_BUS_RESET_ISR\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  USB Bus Reset Interrupt Service Routine.  Calls _Start with the same\r
-*  parameters as the last USER call to _Start\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-CY_ISR(USBFS_BUS_RESET_ISR)\r
-{\r
-    /* `#START BUS_RESET_USER_CODE` Place your code here */\r
-\r
-    /* `#END` */\r
-\r
-    USBFS_ReInitComponent();\r
-}\r
-\r
-\r
-#if((USBFS_EP_MM != USBFS__EP_MANUAL) && (USBFS_ARB_ISR_REMOVE == 0u))\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_ARB_ISR\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Arbiter Interrupt Service Routine\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Side effect:\r
-    *  Search for EP8 int_status will be much slower than search for EP1 int_status.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_ARB_ISR)\r
-    {\r
-        uint8 int_status;\r
-        uint8 ep_status;\r
-        uint8 ep = USBFS_EP1;\r
-        uint8 ptr = 0u;\r
-\r
-        /* `#START ARB_BEGIN_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        int_status = USBFS_ARB_INT_SR_REG;                   /* read Arbiter Status Register */\r
-        USBFS_ARB_INT_SR_REG = int_status;                   /* Clear Serviced Interrupts */\r
-\r
-        while(int_status != 0u)\r
-        {\r
-            if((int_status & 1u) != 0u)  /* If EpX interrupt present */\r
-            {   /* read Endpoint Status Register */\r
-                ep_status  = CY_GET_REG8((reg8 *)(USBFS_ARB_EP1_SR_IND + ptr));\r
-                /* If In Buffer Full */\r
-                if((ep_status & USBFS_ARB_EPX_SR_IN_BUF_FULL) != 0u)\r
-                {\r
-                    if((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
-                    {\r
-                        /* Clear Data ready status */\r
-                        *(reg8 *)(USBFS_ARB_EP1_CFG_IND + ptr) &=\r
-                                                                    (uint8)~USBFS_ARB_EPX_CFG_IN_DATA_RDY;\r
-                        /* Write the Mode register */\r
-                        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ptr), USBFS_EP[ep].epMode);\r
-                        #if (defined(USBFS_ENABLE_MIDI_STREAMING) && USBFS_ISR_SERVICE_MIDI_IN)\r
-                            if(ep == USBFS_midi_in_ep)\r
-                            {   /* Clear MIDI input pointer */\r
-                                USBFS_midiInPointer = 0u;\r
-                            }\r
-                        #endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-                    }\r
-                }\r
-                /* (re)arm Out EP only for mode2 */\r
-                #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-                    /* If DMA Grant */\r
-                    if((ep_status & USBFS_ARB_EPX_SR_DMA_GNT) != 0u)\r
-                    {\r
-                        if((USBFS_EP[ep].addr & USBFS_DIR_IN) == 0u)\r
-                        {\r
-                                USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
-                                /* Write the Mode register */\r
-                                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ptr),\r
-                                                                                    USBFS_EP[ep].epMode);\r
-                        }\r
-                    }\r
-                #endif /* End USBFS_EP_MM */\r
-\r
-                /* `#START ARB_USER_CODE` Place your code here for handle Buffer Underflow/Overflow */\r
-\r
-                /* `#END` */\r
-\r
-                CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_SR_IND + ptr), ep_status);   /* Clear Serviced events */\r
-            }\r
-            ptr += USBFS_EPX_CNTX_ADDR_OFFSET;               /* prepare pointer for next EP */\r
-            ep++;\r
-            int_status >>= 1u;\r
-        }\r
-\r
-        /* `#START ARB_END_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-    }\r
-\r
-#endif /* End USBFS_EP_MM */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.c
deleted file mode 100755 (executable)
index ba9fdf5..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.c
+++ /dev/null
@@ -1,422 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_hid.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB HID Class request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if defined(USBFS_ENABLE_HID_CLASS)\r
-\r
-#include "USBFS_pvt.h"\r
-#include "USBFS_hid.h"\r
-\r
-\r
-/***************************************\r
-*    HID Variables\r
-***************************************/\r
-\r
-volatile uint8 USBFS_hidProtocol[USBFS_MAX_INTERFACES_NUMBER];  /* HID device protocol status */\r
-volatile uint8 USBFS_hidIdleRate[USBFS_MAX_INTERFACES_NUMBER];  /* HID device idle reload value */\r
-volatile uint8 USBFS_hidIdleTimer[USBFS_MAX_INTERFACES_NUMBER]; /* HID device idle rate value */\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-\r
-/* `#START HID_CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_UpdateHIDTimer\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Updates the HID report timer and reloads it if expired\r
-*\r
-* Parameters:\r
-*  interface:  Interface Number.\r
-*\r
-* Return:\r
-*  status.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_UpdateHIDTimer(uint8 interface) \r
-{\r
-    uint8 stat = USBFS_IDLE_TIMER_INDEFINITE;\r
-\r
-    if(USBFS_hidIdleRate[interface] != 0u)\r
-    {\r
-        if(USBFS_hidIdleTimer[interface] > 0u)\r
-        {\r
-            USBFS_hidIdleTimer[interface]--;\r
-            stat = USBFS_IDLE_TIMER_RUNNING;\r
-        }\r
-        else\r
-        {\r
-            USBFS_hidIdleTimer[interface] = USBFS_hidIdleRate[interface];\r
-            stat = USBFS_IDLE_TIMER_EXPIRED;\r
-        }\r
-    }\r
-\r
-    return(stat);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetProtocol\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Returns the selected protocol value to the application\r
-*\r
-* Parameters:\r
-*  interface:  Interface Number.\r
-*\r
-* Return:\r
-*  Interface protocol.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_GetProtocol(uint8 interface) \r
-{\r
-    return(USBFS_hidProtocol[interface]);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_DispatchHIDClassRqst\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine dispatches class requests\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_DispatchHIDClassRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-    uint8 interfaceNumber;\r
-\r
-    interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-    {   /* Control Read */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_GET_DESCRIPTOR:\r
-                if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_CLASS)\r
-                {\r
-                    USBFS_FindHidClassDecriptor();\r
-                    if (USBFS_currentTD.count != 0u)\r
-                    {\r
-                        requestHandled = USBFS_InitControlRead();\r
-                    }\r
-                }\r
-                else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_HID_REPORT)\r
-                {\r
-                    USBFS_FindReportDescriptor();\r
-                    if (USBFS_currentTD.count != 0u)\r
-                    {\r
-                        requestHandled = USBFS_InitControlRead();\r
-                    }\r
-                }\r
-                else\r
-                {   /* requestHandled is initialezed as FALSE by default */\r
-                }\r
-                break;\r
-            case USBFS_HID_GET_REPORT:\r
-                USBFS_FindReport();\r
-                if (USBFS_currentTD.count != 0u)\r
-                {\r
-                    requestHandled = USBFS_InitControlRead();\r
-                }\r
-                break;\r
-\r
-            case USBFS_HID_GET_IDLE:\r
-                /* This function does not support multiple reports per interface*/\r
-                /* Validate interfaceNumber and Report ID (should be 0) */\r
-                if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
-                    (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
-                {\r
-                    USBFS_currentTD.count = 1u;\r
-                    USBFS_currentTD.pData = &USBFS_hidIdleRate[interfaceNumber];\r
-                    requestHandled  = USBFS_InitControlRead();\r
-                }\r
-                break;\r
-            case USBFS_HID_GET_PROTOCOL:\r
-                /* Validate interfaceNumber */\r
-                if( interfaceNumber < USBFS_MAX_INTERFACES_NUMBER)\r
-                {\r
-                    USBFS_currentTD.count = 1u;\r
-                    USBFS_currentTD.pData = &USBFS_hidProtocol[interfaceNumber];\r
-                    requestHandled  = USBFS_InitControlRead();\r
-                }\r
-                break;\r
-            default:    /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    else if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) ==\r
-                                                                            USBFS_RQST_DIR_H2D)\r
-    {   /* Control Write */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_HID_SET_REPORT:\r
-                USBFS_FindReport();\r
-                if (USBFS_currentTD.count != 0u)\r
-                {\r
-                    requestHandled = USBFS_InitControlWrite();\r
-                }\r
-                break;\r
-            case USBFS_HID_SET_IDLE:\r
-                /* This function does not support multiple reports per interface */\r
-                /* Validate interfaceNumber and Report ID (should be 0) */\r
-                if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
-                    (CY_GET_REG8(USBFS_wValueLo) == 0u ) ) /* Do not support Idle per Report ID */\r
-                {\r
-                    USBFS_hidIdleRate[interfaceNumber] = CY_GET_REG8(USBFS_wValueHi);\r
-                    /* With regards to HID spec: "7.2.4 Set_Idle Request"\r
-                    *  Latency. If the current period has gone past the\r
-                    *  newly proscribed time duration, then a report\r
-                    *  will be generated immediately.\r
-                    */\r
-                    if(USBFS_hidIdleRate[interfaceNumber] <\r
-                       USBFS_hidIdleTimer[interfaceNumber])\r
-                    {\r
-                        /* Set the timer to zero and let the UpdateHIDTimer() API return IDLE_TIMER_EXPIRED status*/\r
-                        USBFS_hidIdleTimer[interfaceNumber] = 0u;\r
-                    }\r
-                    /* If the new request is received within 4 milliseconds\r
-                    *  (1 count) of the end of the current period, then the\r
-                    *  new request will have no effect until after the report.\r
-                    */\r
-                    else if(USBFS_hidIdleTimer[interfaceNumber] <= 1u)\r
-                    {\r
-                        /* Do nothing.\r
-                        *  Let the UpdateHIDTimer() API continue to work and\r
-                        *  return IDLE_TIMER_EXPIRED status\r
-                        */\r
-                    }\r
-                    else\r
-                    {   /* Reload the timer*/\r
-                        USBFS_hidIdleTimer[interfaceNumber] =\r
-                        USBFS_hidIdleRate[interfaceNumber];\r
-                    }\r
-                    requestHandled = USBFS_InitNoDataControlTransfer();\r
-                }\r
-                break;\r
-\r
-            case USBFS_HID_SET_PROTOCOL:\r
-                /* Validate interfaceNumber and protocol (must be 0 or 1) */\r
-                if( (interfaceNumber < USBFS_MAX_INTERFACES_NUMBER) &&\r
-                    (CY_GET_REG8(USBFS_wValueLo) <= 1u) )\r
-                {\r
-                    USBFS_hidProtocol[interfaceNumber] = CY_GET_REG8(USBFS_wValueLo);\r
-                    requestHandled = USBFS_InitNoDataControlTransfer();\r
-                }\r
-                break;\r
-            default:    /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    else\r
-    {   /* requestHandled is initialized as FALSE by default */\r
-    }\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USB_FindHidClassDescriptor\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine find Hid Class Descriptor pointer based on the Interface number\r
-*  and Alternate setting then loads the currentTD structure with the address of\r
-*  the buffer and the size.\r
-*  The HID Class Descriptor resides inside the config descriptor.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  currentTD\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_FindHidClassDecriptor(void) \r
-{\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    volatile uint8 *pDescr;\r
-    uint8 interfaceN;\r
-\r
-    pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-    interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
-    /* Third entry in the LUT starts the Interface Table pointers */\r
-    /* Now use the request interface number*/\r
-    pTmp = &pTmp[interfaceN + 2u];\r
-    /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */\r
-    pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-    /* Now use Alternate setting number */\r
-    pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
-    /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
-    pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-    /* Fifth entry in the LUT points to Hid Class Descriptor in Configuration Descriptor */\r
-    pTmp = &pTmp[4u];\r
-    pDescr = (volatile uint8 *)pTmp->p_list;\r
-    /* The first byte contains the descriptor length */\r
-    USBFS_currentTD.count = *pDescr;\r
-    USBFS_currentTD.pData = pDescr;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USB_FindReportDescriptor\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine find Hid Report Descriptor pointer based on the Interface\r
-*  number, then loads the currentTD structure with the address of the buffer\r
-*  and the size.\r
-*  Hid Report Descriptor is located after IN/OUT/FEATURE reports.\r
-*\r
-* Parameters:\r
-*   void\r
-*\r
-* Return:\r
-*  currentTD\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_FindReportDescriptor(void) \r
-{\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    volatile uint8 *pDescr;\r
-    uint8 interfaceN;\r
-\r
-    pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-    interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
-    /* Third entry in the LUT starts the Interface Table pointers */\r
-    /* Now use the request interface number */\r
-    pTmp = &pTmp[interfaceN + 2u];\r
-    /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE */\r
-    pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-    /* Now use Alternate setting number */\r
-    pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
-    /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
-    pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-    /* Fourth entry in the LUT starts the Hid Report Descriptor */\r
-    pTmp = &pTmp[3u];\r
-    pDescr = (volatile uint8 *)pTmp->p_list;\r
-    /* The 1st and 2nd bytes of descriptor contain its length. LSB is 1st. */\r
-    USBFS_currentTD.count =  (((uint16)pDescr[1u] << 8u) | pDescr[0u]);\r
-    USBFS_currentTD.pData = &pDescr[2u];\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_FindReport\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine sets up a transfer based on the Interface number, Report Type\r
-*  and Report ID, then loads the currentTD structure with the address of the\r
-*  buffer and the size.  The caller has to decide if it is a control read or\r
-*  control write.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  currentTD\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_FindReport(void) \r
-{\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    T_USBFS_TD *pTD;\r
-    uint8 interfaceN;\r
-    uint8 reportType;\r
-\r
-    /* `#START HID_FINDREPORT` Place custom handling here */\r
-\r
-    /* `#END` */\r
-    USBFS_currentTD.count = 0u;   /* Init not supported condition */\r
-    pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-    reportType = CY_GET_REG8(USBFS_wValueHi);\r
-    interfaceN = CY_GET_REG8(USBFS_wIndexLo);\r
-    /* Third entry in the LUT COnfiguration Table starts the Interface Table pointers */\r
-    /* Now use the request interface number */\r
-    pTmp = &pTmp[interfaceN + 2u];\r
-    /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_TABLE*/\r
-    pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-    if(interfaceN < USBFS_MAX_INTERFACES_NUMBER)\r
-    {\r
-        /* Now use Alternate setting number */\r
-        pTmp = &pTmp[USBFS_interfaceSetting[interfaceN]];\r
-        /* USB_DEVICEx_CONFIGURATIONy_INTERFACEz_ALTERNATEi_HID_TABLE */\r
-        pTmp = (const T_USBFS_LUT CYCODE *) pTmp->p_list;\r
-        /* Validate reportType to comply with "7.2.1 Get_Report Request" */\r
-        if((reportType >= USBFS_HID_GET_REPORT_INPUT) &&\r
-           (reportType <= USBFS_HID_GET_REPORT_FEATURE))\r
-        {\r
-            /* Get the entry proper TD (IN, OUT or Feature Report Table)*/\r
-            pTmp = &pTmp[reportType - 1u];\r
-            reportType = CY_GET_REG8(USBFS_wValueLo);    /* Get reportID */\r
-            /* Validate table support by the HID descriptor, compare table count with reportID */\r
-            if(pTmp->c >= reportType)\r
-            {\r
-                pTD = (T_USBFS_TD *) pTmp->p_list;\r
-                pTD = &pTD[reportType];                          /* select entry depend on report ID*/\r
-                USBFS_currentTD.pData = pTD->pData;   /* Buffer pointer */\r
-                USBFS_currentTD.count = pTD->count;   /* Buffer Size */\r
-                USBFS_currentTD.pStatusBlock = pTD->pStatusBlock;\r
-            }\r
-        }\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Additional user functions supporting HID Requests\r
-********************************************************************************/\r
-\r
-/* `#START HID_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-#endif  /* End USBFS_ENABLE_HID_CLASS */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.h
deleted file mode 100755 (executable)
index 9a6201c..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_hid.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_hid.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Header File for the USFS component. Contains prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_hid_H)\r
-#define CY_USBFS_USBFS_hid_H\r
-\r
-#include "cytypes.h"\r
-\r
-\r
-/***************************************\r
-* Prototypes of the USBFS_hid API.\r
-***************************************/\r
-\r
-uint8 USBFS_UpdateHIDTimer(uint8 interface) ;\r
-uint8 USBFS_GetProtocol(uint8 interface) ;\r
-\r
-\r
-/***************************************\r
-*Renamed Functions for backward compatible\r
-***************************************/\r
-\r
-#define USBFS_bGetProtocol               USBFS_GetProtocol\r
-\r
-\r
-/***************************************\r
-*  Constants for USBFS_hid API.\r
-***************************************/\r
-\r
-#define USBFS_PROTOCOL_BOOT              (0x00u)\r
-#define USBFS_PROTOCOL_REPORT            (0x01u)\r
-\r
-/* Request Types (HID Chapter 7.2) */\r
-#define USBFS_HID_GET_REPORT             (0x01u)\r
-#define USBFS_HID_GET_IDLE               (0x02u)\r
-#define USBFS_HID_GET_PROTOCOL           (0x03u)\r
-#define USBFS_HID_SET_REPORT             (0x09u)\r
-#define USBFS_HID_SET_IDLE               (0x0Au)\r
-#define USBFS_HID_SET_PROTOCOL           (0x0Bu)\r
-\r
-/* Descriptor Types (HID Chapter 7.1) */\r
-#define USBFS_DESCR_HID_CLASS            (0x21u)\r
-#define USBFS_DESCR_HID_REPORT           (0x22u)\r
-#define USBFS_DESCR_HID_PHYSICAL         (0x23u)\r
-\r
-/* Report Request Types (HID Chapter 7.2.1) */\r
-#define USBFS_HID_GET_REPORT_INPUT       (0x01u)\r
-#define USBFS_HID_GET_REPORT_OUTPUT      (0x02u)\r
-#define USBFS_HID_GET_REPORT_FEATURE     (0x03u)\r
-\r
-#endif /* End CY_USBFS_USBFS_hid_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.c
deleted file mode 100755 (executable)
index 1f0ce51..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.c
+++ /dev/null
@@ -1,1341 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_midi.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  MIDI Streaming request handler.\r
-*  This file contains routines for sending and receiving MIDI\r
-*  messages, and handles running status in both directions.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING)\r
-\r
-#include "USBFS_midi.h"\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/***************************************\r
-*    MIDI Constants\r
-***************************************/\r
-\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-    /* The Size of the MIDI messages (MIDI Table 4-1) */\r
-    static const uint8 CYCODE USBFS_MIDI_SIZE[] = {\r
-    /*  Miscellaneous function codes(Reserved)  */ 0x03u,\r
-    /*  Cable events (Reserved)                 */ 0x03u,\r
-    /*  Two-byte System Common messages         */ 0x02u,\r
-    /*  Three-byte System Common messages       */ 0x03u,\r
-    /*  SysEx starts or continues               */ 0x03u,\r
-    /*  Single-byte System Common Message or\r
-        SysEx ends with following single byte   */ 0x01u,\r
-    /*  SysEx ends with following two bytes     */ 0x02u,\r
-    /*  SysEx ends with following three bytes   */ 0x03u,\r
-    /*  Note-off                                */ 0x03u,\r
-    /*  Note-on                                 */ 0x03u,\r
-    /*  Poly-KeyPress                           */ 0x03u,\r
-    /*  Control Change                          */ 0x03u,\r
-    /*  Program Change                          */ 0x02u,\r
-    /*  Channel Pressure                        */ 0x02u,\r
-    /*  PitchBend Change                        */ 0x03u,\r
-    /*  Single Byte                             */ 0x01u\r
-    };\r
-#endif  /* USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-\r
-\r
-/***************************************\r
-*  Global variables\r
-***************************************/\r
-\r
-#if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-    #if (USBFS_MIDI_IN_BUFF_SIZE >= 256)\r
-        volatile uint16 USBFS_midiInPointer;                            /* Input endpoint buffer pointer */\r
-    #else\r
-        volatile uint8 USBFS_midiInPointer;                             /* Input endpoint buffer pointer */\r
-    #endif /* End USBFS_MIDI_IN_BUFF_SIZE >=256 */\r
-    volatile uint8 USBFS_midi_in_ep;                                    /* Input endpoint number */\r
-    uint8 USBFS_midiInBuffer[USBFS_MIDI_IN_BUFF_SIZE];       /* Input endpoint buffer */\r
-#endif /* USBFS_MIDI_IN_BUFF_SIZE > 0 */\r
-\r
-#if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-    volatile uint8 USBFS_midi_out_ep;                                   /* Output endpoint number */\r
-    uint8 USBFS_midiOutBuffer[USBFS_MIDI_OUT_BUFF_SIZE];     /* Output endpoint buffer */\r
-#endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */\r
-\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-    static USBFS_MIDI_RX_STATUS USBFS_MIDI1_Event;            /* MIDI RX status structure */\r
-    static volatile uint8 USBFS_MIDI1_TxRunStat;                         /* MIDI Output running status */\r
-    volatile uint8 USBFS_MIDI1_InqFlags;                                 /* Device inquiry flag */\r
-\r
-    #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-        static USBFS_MIDI_RX_STATUS USBFS_MIDI2_Event;        /* MIDI RX status structure */\r
-        static volatile uint8 USBFS_MIDI2_TxRunStat;                     /* MIDI Output running status */\r
-        volatile uint8 USBFS_MIDI2_InqFlags;                             /* Device inquiry flag */\r
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-\r
-/* `#START MIDI_CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/***************************************\r
-* Optional MIDI APIs\r
-***************************************/\r
-#if (USBFS_ENABLE_MIDI_API != 0u)\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_MIDI_EP_Init\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function initializes the MIDI interface and UART(s) to be ready to\r
-*   receive data from the PC and MIDI ports.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Global variables:\r
-*  USBFS_midiInBuffer: This buffer is used for saving and combining\r
-*    the received data from UART(s) and(or) generated internally by\r
-*    PutUsbMidiIn() function messages. USBFS_MIDI_IN_EP_Service()\r
-*    function transfers the data from this buffer to the PC.\r
-*  USBFS_midiOutBuffer: This buffer is used by the\r
-*    USBFS_MIDI_OUT_EP_Service() function for saving the received\r
-*    from the PC data, then the data are parsed and transferred to UART(s)\r
-*    buffer and to the internal processing by the\r
-*    USBFS_callbackLocalMidiEvent function.\r
-*  USBFS_midi_out_ep: Used as an OUT endpoint number.\r
-*  USBFS_midi_in_ep: Used as an IN endpoint number.\r
-*   USBFS_midiInPointer: Initialized to zero.\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-*******************************************************************************/\r
-void USBFS_MIDI_EP_Init(void) \r
-{\r
-    #if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-       USBFS_midiInPointer = 0u;\r
-    #endif  /* USBFS_MIDI_IN_BUFF_SIZE > 0 */\r
-\r
-    #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-        #if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-            /* Init DMA configurations for IN EP*/\r
-            USBFS_LoadInEP(USBFS_midi_in_ep, USBFS_midiInBuffer,\r
-                                                                                USBFS_MIDI_IN_BUFF_SIZE);\r
-                                                                                \r
-        #endif  /* USBFS_MIDI_IN_BUFF_SIZE > 0 */\r
-        #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-            /* Init DMA configurations for OUT EP*/\r
-            (void)USBFS_ReadOutEP(USBFS_midi_out_ep, USBFS_midiOutBuffer,\r
-                                                                                USBFS_MIDI_OUT_BUFF_SIZE);\r
-        #endif /*USBFS_MIDI_OUT_BUFF_SIZE > 0 */\r
-    #endif  /* End USBFS__EP_DMAAUTO */\r
-\r
-    #if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-        USBFS_EnableOutEP(USBFS_midi_out_ep);\r
-    #endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */\r
-\r
-    /* Initialize the MIDI port(s) */\r
-    #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-        USBFS_MIDI_Init();\r
-    #endif /* USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-}\r
-\r
-#if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI_OUT_EP_Service\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Services the USB MIDI OUT endpoints.\r
-    *  This function is called from OUT EP ISR. It transfers the received from PC\r
-    *  data to the external MIDI port(UART TX buffer) and calls the\r
-    *  USBFS_callbackLocalMidiEvent() function to internal process\r
-    *  of the MIDI data.\r
-    *  This function is blocked by UART, if not enough space is available in UART\r
-    *  TX buffer. Therefore it is recommended to use large UART TX buffer size.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Global variables:\r
-    *  USBFS_midiOutBuffer: Used as temporary buffer between USB internal\r
-    *   memory and UART TX buffer.\r
-    *  USBFS_midi_out_ep: Used as an OUT endpoint number.\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI_OUT_EP_Service(void) \r
-    {\r
-        #if USBFS_MIDI_OUT_BUFF_SIZE >= 256\r
-            uint16 outLength;\r
-            uint16 outPointer;\r
-        #else\r
-            uint8 outLength;\r
-            uint8 outPointer;\r
-        #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >=256 */\r
-\r
-        uint8 dmaState = 0u;\r
-\r
-        /* Service the USB MIDI output endpoint */\r
-        if (USBFS_GetEPState(USBFS_midi_out_ep) == USBFS_OUT_BUFFER_FULL)\r
-        {\r
-            #if USBFS_MIDI_OUT_BUFF_SIZE >= 256\r
-                outLength = USBFS_GetEPCount(USBFS_midi_out_ep);\r
-            #else\r
-                outLength = (uint8)USBFS_GetEPCount(USBFS_midi_out_ep);\r
-            #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >= 256 */\r
-            #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-                #if USBFS_MIDI_OUT_BUFF_SIZE >= 256\r
-                    outLength = USBFS_ReadOutEP(USBFS_midi_out_ep,\r
-                                                                    USBFS_midiOutBuffer, outLength);\r
-                #else\r
-                    outLength = (uint8)USBFS_ReadOutEP(USBFS_midi_out_ep,\r
-                                                                    USBFS_midiOutBuffer, (uint16)outLength);\r
-                #endif /* End USBFS_MIDI_OUT_BUFF_SIZE >= 256 */\r
-                #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-                    do  /* wait for DMA transfer complete */\r
-                    {\r
-                        (void)CyDmaChStatus(USBFS_DmaChan[USBFS_midi_out_ep], NULL, &dmaState);\r
-                    }while((dmaState & (STATUS_TD_ACTIVE | STATUS_CHAIN_ACTIVE)) != 0u);\r
-                #endif /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-            #endif  /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-            if(dmaState != 0u)\r
-            {\r
-                /* Suppress compiler warning */\r
-            }\r
-            if (outLength >= USBFS_EVENT_LENGTH)\r
-            {\r
-                outPointer = 0u;\r
-                while (outPointer < outLength)\r
-                {\r
-                    /* In some OS OUT packet could be appended by nulls which could be skipped */\r
-                    if (USBFS_midiOutBuffer[outPointer] == 0u)\r
-                    {\r
-                        break;\r
-                    }\r
-                    /* Route USB MIDI to the External connection */\r
-                    #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-                        if ((USBFS_midiOutBuffer[outPointer] & USBFS_CABLE_MASK) ==\r
-                            USBFS_MIDI_CABLE_00)\r
-                        {\r
-                            USBFS_MIDI1_ProcessUsbOut(&USBFS_midiOutBuffer[outPointer]);\r
-                        }\r
-                        else if ((USBFS_midiOutBuffer[outPointer] & USBFS_CABLE_MASK) ==\r
-                                 USBFS_MIDI_CABLE_01)\r
-                        {\r
-                            #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-                                USBFS_MIDI2_ProcessUsbOut(&USBFS_midiOutBuffer[outPointer]);\r
-                            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-                        }\r
-                        else\r
-                        {\r
-                            /* `#START CUSTOM_MIDI_OUT_EP_SERV` Place your code here */\r
-\r
-                            /* `#END` */\r
-                        }\r
-                    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-                    /* Process any local MIDI output functions */\r
-                    USBFS_callbackLocalMidiEvent(\r
-                        USBFS_midiOutBuffer[outPointer] & USBFS_CABLE_MASK,\r
-                        &USBFS_midiOutBuffer[outPointer + USBFS_EVENT_BYTE1]);\r
-                    outPointer += USBFS_EVENT_LENGTH;\r
-                }\r
-            }\r
-            #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-                /* Enable Out EP*/\r
-                USBFS_EnableOutEP(USBFS_midi_out_ep);\r
-            #endif  /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-        }\r
-    }\r
-\r
-#endif /* #if (USBFS_MIDI_OUT_BUFF_SIZE > 0) */\r
-\r
-#if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI_IN_EP_Service\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Services the USB MIDI IN endpoint. Non-blocking.\r
-    *  Checks that previous packet was processed by HOST, otherwise service the\r
-    *  input endpoint on the subsequent call. It is called from the\r
-    *  USBFS_MIDI_IN_Service() and from the\r
-    *  USBFS_PutUsbMidiIn() function.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Global variables:\r
-    *  USBFS_midi_in_ep: Used as an IN endpoint number.\r
-    *  USBFS_midiInBuffer: Function loads the data from this buffer to\r
-    *    the USB IN endpoint.\r
-    *   USBFS_midiInPointer: Cleared to zero when data are sent.\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI_IN_EP_Service(void) \r
-    {\r
-        /* Service the USB MIDI input endpoint */\r
-        /* Check that previous packet was processed by HOST, otherwise service the USB later */\r
-        if (USBFS_midiInPointer != 0u)\r
-        {\r
-            if(USBFS_GetEPState(USBFS_midi_in_ep) == USBFS_EVENT_PENDING)\r
-            {\r
-            #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-                USBFS_LoadInEP(USBFS_midi_in_ep, USBFS_midiInBuffer,\r
-                                                                                (uint16)USBFS_midiInPointer);\r
-            #else /* USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-                /* rearm IN EP */\r
-                USBFS_LoadInEP(USBFS_midi_in_ep, NULL, (uint16)USBFS_midiInPointer);\r
-            #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO*/\r
-\r
-            /* Clear the midiInPointer. For DMA mode, clear this pointer in the ARB ISR when data are moved by DMA */\r
-            #if(USBFS_EP_MM == USBFS__EP_MANUAL)\r
-                USBFS_midiInPointer = 0u;\r
-            #endif /* USBFS_EP_MM == USBFS__EP_MANUAL */\r
-            }\r
-        }\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI_IN_Service\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Services the traffic from the MIDI input ports (RX UART) and prepare data\r
-    *  in USB MIDI IN endpoint buffer.\r
-    *  Calls the USBFS_MIDI_IN_EP_Service() function to sent the\r
-    *  data from buffer to PC. Non-blocking. Should be called from main foreground\r
-    *  task.\r
-    *  This function is not protected from the reentrant calls. When it is required\r
-    *  to use this function in UART RX ISR to guaranty low latency, care should be\r
-    *  taken to protect from reentrant calls.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Global variables:\r
-    *   USBFS_midiInPointer: Cleared to zero when data are sent.\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI_IN_Service(void) \r
-    {\r
-        /* Service the MIDI UART inputs until either both receivers have no more\r
-        *  events or until the input endpoint buffer fills up.\r
-        */\r
-        #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-            uint8 m1 = 0u;\r
-            uint8 m2 = 0u;\r
-            do\r
-            {\r
-                if (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))\r
-                {\r
-                    /* Check MIDI1 input port for a complete event */\r
-                    m1 = USBFS_MIDI1_GetEvent();\r
-                    if (m1 != 0u)\r
-                    {\r
-                        USBFS_PrepareInBuffer(m1, (uint8 *)&USBFS_MIDI1_Event.msgBuff[0],\r
-                                                    USBFS_MIDI1_Event.size, USBFS_MIDI_CABLE_00);\r
-                    }\r
-                }\r
-\r
-            #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-                if (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))\r
-                {\r
-                    /* Check MIDI2 input port for a complete event */\r
-                    m2 = USBFS_MIDI2_GetEvent();\r
-                    if (m2 != 0u)\r
-                    {\r
-                        USBFS_PrepareInBuffer(m2, (uint8 *)&USBFS_MIDI2_Event.msgBuff[0],\r
-                                                    USBFS_MIDI2_Event.size, USBFS_MIDI_CABLE_01);\r
-                    }\r
-                }\r
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-\r
-            }while( (USBFS_midiInPointer <= (USBFS_MIDI_IN_BUFF_SIZE - USBFS_EVENT_LENGTH))\r
-                   && ((m1 != 0u) || (m2 != 0u)) );\r
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-        /* Service the USB MIDI input endpoint */\r
-        USBFS_MIDI_IN_EP_Service();\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PutUsbMidiIn\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Puts one MIDI messages into the USB MIDI In endpoint buffer. These are\r
-    *  MIDI input messages to the host. This function is only used if the device\r
-    *  has internal MIDI input functionality. USBMIDI_MIDI_IN_Service() function\r
-    *  should additionally be called to send the message from local buffer to\r
-    *  IN endpoint.\r
-    *\r
-    * Parameters:\r
-    *  ic:   0 = No message (should never happen)\r
-    *        1 - 3 = Complete MIDI message in midiMsg\r
-    *        3 - IN EP LENGTH = Complete SySEx message(without EOSEX byte) in\r
-    *            midiMsg. The length is limited by the max BULK EP size(64)\r
-    *        MIDI_SYSEX = Start or continuation of SysEx message\r
-    *                     (put event bytes in midiMsg buffer)\r
-    *        MIDI_EOSEX = End of SysEx message\r
-    *                     (put event bytes in midiMsg buffer)\r
-    *        MIDI_TUNEREQ = Tune Request message (single byte system common msg)\r
-    *        0xf8 - 0xff = Single byte real-time message\r
-    *  midiMsg: pointer to MIDI message.\r
-    *  cable:   cable number.\r
-    *\r
-    * Return:\r
-    *  USBFS_TRUE if error.\r
-    *  USBFS_FALSE if success.\r
-    *\r
-    * Global variables:\r
-    *  USBFS_midi_in_ep: MIDI IN endpoint number used for sending data.\r
-    *  USBFS_midiInPointer: Checked this variable to see if there is\r
-    *    enough free space in the IN endpoint buffer. If buffer is full, initiate\r
-    *    sending to PC.\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_PutUsbMidiIn(uint8 ic, const uint8 midiMsg[], uint8 cable)\r
-                                                                \r
-    {\r
-        uint8 retError = USBFS_FALSE;\r
-        uint8 msgIndex;\r
-\r
-        /* Protect PrepareInBuffer() function from concurrent calls */\r
-        #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-            MIDI1_UART_DisableRxInt();\r
-            #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-                MIDI2_UART_DisableRxInt();\r
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-        if (USBFS_midiInPointer >\r
-                    (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))\r
-        {\r
-            USBFS_MIDI_IN_EP_Service();\r
-        }\r
-        if (USBFS_midiInPointer <=\r
-                    (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))\r
-        {\r
-            if((ic < USBFS_EVENT_LENGTH) || (ic >= USBFS_MIDI_STATUS_MASK))\r
-            {\r
-                USBFS_PrepareInBuffer(ic, midiMsg, ic, cable);\r
-            }\r
-            else\r
-            {   /* Only SysEx message is greater than 4 bytes */\r
-                msgIndex = 0u;\r
-                do\r
-                {\r
-                    USBFS_PrepareInBuffer(USBFS_MIDI_SYSEX, &midiMsg[msgIndex],\r
-                                                     USBFS_EVENT_BYTE3, cable);\r
-                    ic -= USBFS_EVENT_BYTE3;\r
-                    msgIndex += USBFS_EVENT_BYTE3;\r
-                    if (USBFS_midiInPointer >\r
-                        (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))\r
-                    {\r
-                        USBFS_MIDI_IN_EP_Service();\r
-                        if (USBFS_midiInPointer >\r
-                            (USBFS_EP[USBFS_midi_in_ep].bufferSize - USBFS_EVENT_LENGTH))\r
-                        {\r
-                            /* Error condition. HOST is not ready to receive this packet. */\r
-                            retError = USBFS_TRUE;\r
-                            break;\r
-                        }\r
-                    }\r
-                }while(ic > USBFS_EVENT_BYTE3);\r
-\r
-                if(retError == USBFS_FALSE)\r
-                {\r
-                    USBFS_PrepareInBuffer(USBFS_MIDI_EOSEX, midiMsg, ic, cable);\r
-                }\r
-            }\r
-        }\r
-        else\r
-        {\r
-            /* Error condition. HOST is not ready to receive this packet. */\r
-            retError = USBFS_TRUE;\r
-        }\r
-\r
-        #if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-            MIDI1_UART_EnableRxInt();\r
-            #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-                MIDI2_UART_EnableRxInt();\r
-            #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-        return (retError);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_PrepareInBuffer\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Builds a USB MIDI event in the input endpoint buffer at the current pointer.\r
-    *  Puts one MIDI message into the USB MIDI In endpoint buffer.\r
-    *\r
-    * Parameters:\r
-    *  ic:   0 = No message (should never happen)\r
-    *        1 - 3 = Complete MIDI message at pMdat[0]\r
-    *        MIDI_SYSEX = Start or continuation of SysEx message\r
-    *                     (put eventLen bytes in buffer)\r
-    *        MIDI_EOSEX = End of SysEx message\r
-    *                     (put eventLen bytes in buffer,\r
-    *                      and append MIDI_EOSEX)\r
-    *        MIDI_TUNEREQ = Tune Request message (single byte system common msg)\r
-    *        0xf8 - 0xff = Single byte real-time message\r
-    *\r
-    *  srcBuff: pointer to MIDI data\r
-    *  eventLen: number of bytes in MIDI event\r
-    *  cable: MIDI source port number\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Global variables:\r
-    *  USBFS_midiInBuffer: This buffer is used for saving and combine the\r
-    *    received from UART(s) and(or) generated internally by\r
-    *    USBFS_PutUsbMidiIn() function messages.\r
-    *  USBFS_midiInPointer: Used as an index for midiInBuffer to\r
-    *     write data.\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint8 cable)\r
-                                                                 \r
-    {\r
-        uint8 srcBuffZero;\r
-        uint8 srcBuffOne;\r
-\r
-        srcBuffZero = srcBuff[0u];\r
-        srcBuffOne  = srcBuff[1u];\r
-\r
-        if (ic >= (USBFS_MIDI_STATUS_MASK | USBFS_MIDI_SINGLE_BYTE_MASK))\r
-        {\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_SINGLE_BYTE | cable;\r
-            USBFS_midiInPointer++;\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = ic;\r
-            USBFS_midiInPointer++;\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = 0u;\r
-            USBFS_midiInPointer++;\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = 0u;\r
-            USBFS_midiInPointer++;\r
-        }\r
-        else if((ic < USBFS_EVENT_LENGTH) || (ic == USBFS_MIDI_SYSEX))\r
-        {\r
-            if(ic == USBFS_MIDI_SYSEX)\r
-            {\r
-                USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_SYSEX | cable;\r
-                USBFS_midiInPointer++;\r
-            }\r
-            else if (srcBuffZero < USBFS_MIDI_SYSEX)\r
-            {\r
-                USBFS_midiInBuffer[USBFS_midiInPointer] = (srcBuffZero >> 4u) | cable;\r
-                USBFS_midiInPointer++;\r
-            }\r
-            else if (srcBuffZero == USBFS_MIDI_TUNEREQ)\r
-            {\r
-                USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_1BYTE_COMMON | cable;\r
-                USBFS_midiInPointer++;\r
-            }\r
-            else if ((srcBuffZero == USBFS_MIDI_QFM) || (srcBuffZero == USBFS_MIDI_SONGSEL))\r
-            {\r
-                USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_2BYTE_COMMON | cable;\r
-                USBFS_midiInPointer++;\r
-            }\r
-            else if (srcBuffZero == USBFS_MIDI_SPP)\r
-            {\r
-                USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_3BYTE_COMMON | cable;\r
-                USBFS_midiInPointer++;\r
-            }\r
-            else\r
-            {\r
-            }\r
-\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuffZero;\r
-            USBFS_midiInPointer++;\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuffOne;\r
-            USBFS_midiInPointer++;\r
-            USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuff[2u];\r
-            USBFS_midiInPointer++;\r
-        }\r
-        else if (ic == USBFS_MIDI_EOSEX)\r
-        {\r
-            switch (eventLen)\r
-            {\r
-                case 0u:\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] =\r
-                                                                        USBFS_SYSEX_ENDS_WITH1 | cable;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_MIDI_EOSEX;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = 0u;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = 0u;\r
-                    USBFS_midiInPointer++;\r
-                    break;\r
-                case 1u:\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] =\r
-                                                                        USBFS_SYSEX_ENDS_WITH2 | cable;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuffZero;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_MIDI_EOSEX;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = 0u;\r
-                    USBFS_midiInPointer++;\r
-                    break;\r
-                case 2u:\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] =\r
-                                                                        USBFS_SYSEX_ENDS_WITH3 | cable;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuffZero;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = srcBuffOne;\r
-                    USBFS_midiInPointer++;\r
-                    USBFS_midiInBuffer[USBFS_midiInPointer] = USBFS_MIDI_EOSEX;\r
-                    USBFS_midiInPointer++;\r
-                    break;\r
-                default:\r
-                    break;\r
-            }\r
-        }\r
-        else\r
-        {\r
-        }\r
-    }\r
-\r
-#endif /* #if (USBFS_MIDI_IN_BUFF_SIZE > 0) */\r
-\r
-\r
-/* The implementation for external serial input and output connections\r
-*  to route USB MIDI data to and from those connections.\r
-*/\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI_Init\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Initializes MIDI variables and starts the UART(s) hardware block(s).\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Side Effects:\r
-    *  Change the priority of the UART(s) TX interrupts to be higher than the\r
-    *  default EP ISR priority.\r
-    *\r
-    * Global variables:\r
-    *   USBFS_MIDI_Event: initialized to zero.\r
-    *   USBFS_MIDI_TxRunStat: initialized to zero.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI_Init(void) \r
-    {\r
-        USBFS_MIDI1_Event.length = 0u;\r
-        USBFS_MIDI1_Event.count = 0u;\r
-        USBFS_MIDI1_Event.size = 0u;\r
-        USBFS_MIDI1_Event.runstat = 0u;\r
-        USBFS_MIDI1_TxRunStat = 0u;\r
-        USBFS_MIDI1_InqFlags = 0u;\r
-        /* Start UART block */\r
-        MIDI1_UART_Start();\r
-        /* Change the priority of the UART TX and RX interrupt */\r
-        CyIntSetPriority(MIDI1_UART_TX_VECT_NUM, USBFS_CUSTOM_UART_TX_PRIOR_NUM);\r
-        CyIntSetPriority(MIDI1_UART_RX_VECT_NUM, USBFS_CUSTOM_UART_RX_PRIOR_NUM);\r
-\r
-        #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-            USBFS_MIDI2_Event.length = 0u;\r
-            USBFS_MIDI2_Event.count = 0u;\r
-            USBFS_MIDI2_Event.size = 0u;\r
-            USBFS_MIDI2_Event.runstat = 0u;\r
-            USBFS_MIDI2_TxRunStat = 0u;\r
-            USBFS_MIDI2_InqFlags = 0u;\r
-            /* Start second UART block */\r
-            MIDI2_UART_Start();\r
-            /* Change the priority of the UART TX interrupt */\r
-            CyIntSetPriority(MIDI2_UART_TX_VECT_NUM, USBFS_CUSTOM_UART_TX_PRIOR_NUM);\r
-            CyIntSetPriority(MIDI2_UART_RX_VECT_NUM, USBFS_CUSTOM_UART_RX_PRIOR_NUM);\r
-        #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF*/\r
-\r
-        /* `#START MIDI_INIT_CUSTOM` Init other extended UARTs here */\r
-\r
-        /* `#END` */\r
-\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_ProcessMidiIn\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Processes one byte of incoming MIDI data.\r
-    *\r
-    * Parameters:\r
-    *   mData = current MIDI input data byte\r
-    *   *rxStat = pointer to a MIDI_RX_STATUS structure\r
-    *\r
-    * Return:\r
-    *   0, if no complete message\r
-    *   1 - 4, if message complete\r
-    *   MIDI_SYSEX, if start or continuation of system exclusive\r
-    *   MIDI_EOSEX, if end of system exclusive\r
-    *   0xf8 - 0xff, if single byte real time message\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_ProcessMidiIn(uint8 mData, USBFS_MIDI_RX_STATUS *rxStat)\r
-                                                                \r
-    {\r
-        uint8 midiReturn = 0u;\r
-\r
-        /* Check for a MIDI status byte.  All status bytes, except real time messages,\r
-        *  which are a single byte, force the start of a new buffer cycle.\r
-        */\r
-        if ((mData & USBFS_MIDI_STATUS_BYTE_MASK) != 0u)\r
-        {\r
-            if ((mData & USBFS_MIDI_STATUS_MASK) == USBFS_MIDI_STATUS_MASK)\r
-            {\r
-                if ((mData & USBFS_MIDI_SINGLE_BYTE_MASK) != 0u) /* System Real-Time Messages(single byte) */\r
-                {\r
-                    midiReturn = mData;\r
-                }\r
-                else                              /* System Common Messages */\r
-                {\r
-                    switch (mData)\r
-                    {\r
-                        case USBFS_MIDI_SYSEX:\r
-                            rxStat->msgBuff[0u] = USBFS_MIDI_SYSEX;\r
-                            rxStat->runstat = USBFS_MIDI_SYSEX;\r
-                            rxStat->count = 1u;\r
-                            rxStat->length = 3u;\r
-                            break;\r
-                        case USBFS_MIDI_EOSEX:\r
-                            rxStat->runstat = 0u;\r
-                            rxStat->size = rxStat->count;\r
-                            rxStat->count = 0u;\r
-                            midiReturn = USBFS_MIDI_EOSEX;\r
-                            break;\r
-                        case USBFS_MIDI_SPP:\r
-                            rxStat->msgBuff[0u] = USBFS_MIDI_SPP;\r
-                            rxStat->runstat = 0u;\r
-                            rxStat->count = 1u;\r
-                            rxStat->length = 3u;\r
-                            break;\r
-                        case USBFS_MIDI_SONGSEL:\r
-                            rxStat->msgBuff[0u] = USBFS_MIDI_SONGSEL;\r
-                            rxStat->runstat = 0u;\r
-                            rxStat->count = 1u;\r
-                            rxStat->length = 2u;\r
-                            break;\r
-                        case USBFS_MIDI_QFM:\r
-                            rxStat->msgBuff[0u] = USBFS_MIDI_QFM;\r
-                            rxStat->runstat = 0u;\r
-                            rxStat->count = 1u;\r
-                            rxStat->length = 2u;\r
-                            break;\r
-                        case USBFS_MIDI_TUNEREQ:\r
-                            rxStat->msgBuff[0u] = USBFS_MIDI_TUNEREQ;\r
-                            rxStat->runstat = 0u;\r
-                            rxStat->size = 1u;\r
-                            rxStat->count = 0u;\r
-                            midiReturn = rxStat->size;\r
-                            break;\r
-                        default:\r
-                            break;\r
-                    }\r
-                }\r
-            }\r
-            else /* Channel Messages */\r
-            {\r
-                rxStat->msgBuff[0u] = mData;\r
-                rxStat->runstat = mData;\r
-                rxStat->count = 1u;\r
-                switch (mData & USBFS_MIDI_STATUS_MASK)\r
-                {\r
-                    case USBFS_MIDI_NOTE_OFF:\r
-                    case USBFS_MIDI_NOTE_ON:\r
-                    case USBFS_MIDI_POLY_KEY_PRESSURE:\r
-                    case USBFS_MIDI_CONTROL_CHANGE:\r
-                    case USBFS_MIDI_PITCH_BEND_CHANGE:\r
-                        rxStat->length = 3u;\r
-                        break;\r
-                    case USBFS_MIDI_PROGRAM_CHANGE:\r
-                    case USBFS_MIDI_CHANNEL_PRESSURE:\r
-                        rxStat->length = 2u;\r
-                        break;\r
-                    default:\r
-                        rxStat->runstat = 0u;\r
-                        rxStat->count = 0u;\r
-                        break;\r
-                }\r
-            }\r
-        }\r
-\r
-        /* Otherwise, it's a data byte */\r
-        else\r
-        {\r
-            if (rxStat->runstat == USBFS_MIDI_SYSEX)\r
-            {\r
-                rxStat->msgBuff[rxStat->count] = mData;\r
-                rxStat->count++;\r
-                if (rxStat->count >= rxStat->length)\r
-                {\r
-                    rxStat->size = rxStat->count;\r
-                    rxStat->count = 0u;\r
-                    midiReturn = USBFS_MIDI_SYSEX;\r
-                }\r
-            }\r
-            else if (rxStat->count > 0u)\r
-            {\r
-                rxStat->msgBuff[rxStat->count] = mData;\r
-                rxStat->count++;\r
-                if (rxStat->count >= rxStat->length)\r
-                {\r
-                    rxStat->size = rxStat->count;\r
-                    rxStat->count = 0u;\r
-                    midiReturn = rxStat->size;\r
-                }\r
-            }\r
-            else if (rxStat->runstat != 0u)\r
-            {\r
-                rxStat->msgBuff[0u] = rxStat->runstat;\r
-                rxStat->msgBuff[1u] = mData;\r
-                rxStat->count = 2u;\r
-                switch (rxStat->runstat & USBFS_MIDI_STATUS_MASK)\r
-                {\r
-                    case USBFS_MIDI_NOTE_OFF:\r
-                    case USBFS_MIDI_NOTE_ON:\r
-                    case USBFS_MIDI_POLY_KEY_PRESSURE:\r
-                    case USBFS_MIDI_CONTROL_CHANGE:\r
-                    case USBFS_MIDI_PITCH_BEND_CHANGE:\r
-                        rxStat->length = 3u;\r
-                        break;\r
-                    case USBFS_MIDI_PROGRAM_CHANGE:\r
-                    case USBFS_MIDI_CHANNEL_PRESSURE:\r
-                        rxStat->size =rxStat->count;\r
-                        rxStat->count = 0u;\r
-                        midiReturn = rxStat->size;\r
-                        break;\r
-                    default:\r
-                        rxStat->count = 0u;\r
-                    break;\r
-                }\r
-            }\r
-            else\r
-            {\r
-            }\r
-        }\r
-        return (midiReturn);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI1_GetEvent\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Checks for incoming MIDI data, calls the MIDI event builder if so.\r
-    *  Returns either empty or with a complete event.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *   0, if no complete message\r
-    *   1 - 4, if message complete\r
-    *   MIDI_SYSEX, if start or continuation of system exclusive\r
-    *   MIDI_EOSEX, if end of system exclusive\r
-    *   0xf8 - 0xff, if single byte real time message\r
-    *\r
-    * Global variables:\r
-    *  USBFS_MIDI1_Event: RX status structure used to parse received\r
-    *    data.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_MIDI1_GetEvent(void) \r
-    {\r
-        uint8 msgRtn = 0u;\r
-        uint8 rxData;\r
-        #if (MIDI1_UART_RXBUFFERSIZE >= 256u)\r
-            uint16 rxBufferRead;\r
-            #if CY_PSOC3 /* This local variable is required only for PSOC3 and large buffer */\r
-                uint16 rxBufferWrite;\r
-            #endif /* end CY_PSOC3 */\r
-        #else\r
-            uint8 rxBufferRead;\r
-        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-        uint8 rxBufferLoopDetect;\r
-        /* Read buffer loop condition to the local variable */\r
-        rxBufferLoopDetect = MIDI1_UART_rxBufferLoopDetect;\r
-\r
-        if ( (MIDI1_UART_rxBufferRead != MIDI1_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u) )\r
-        {\r
-            /* Protect variables that could change on interrupt by disabling Rx interrupt.*/\r
-            #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntDisable(MIDI1_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-            rxBufferRead = MIDI1_UART_rxBufferRead;\r
-            #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                rxBufferWrite = MIDI1_UART_rxBufferWrite;\r
-                CyIntEnable(MIDI1_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-\r
-            /* Stay here until either the buffer is empty or we have a complete message\r
-            *  in the message buffer. Note that we must use a temporary buffer pointer\r
-            *  since it takes two instructions to increment with a wrap, and we can't\r
-            *  risk doing that with the real pointer and getting an interrupt in between\r
-            *  instructions.\r
-            */\r
-\r
-            #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )\r
-            #else\r
-                while ( ((rxBufferRead != MIDI1_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )\r
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */\r
-                {\r
-                    rxData = MIDI1_UART_rxBuffer[rxBufferRead];\r
-                    /* Increment pointer with a wrap */\r
-                    rxBufferRead++;\r
-                    if(rxBufferRead >= MIDI1_UART_RXBUFFERSIZE)\r
-                    {\r
-                        rxBufferRead = 0u;\r
-                    }\r
-                    /* If loop condition was set - update real read buffer pointer\r
-                    *  to avoid overflow status\r
-                    */\r
-                    if(rxBufferLoopDetect != 0u )\r
-                    {\r
-                        MIDI1_UART_rxBufferLoopDetect = 0u;\r
-                        #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                            CyIntDisable(MIDI1_UART_RX_VECT_NUM);\r
-                        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-                        MIDI1_UART_rxBufferRead = rxBufferRead;\r
-                        #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                            CyIntEnable(MIDI1_UART_RX_VECT_NUM);\r
-                        #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-                    }\r
-\r
-                    msgRtn = USBFS_ProcessMidiIn(rxData,\r
-                                                    (USBFS_MIDI_RX_STATUS *)&USBFS_MIDI1_Event);\r
-\r
-                    /* Read buffer loop condition to the local variable */\r
-                    rxBufferLoopDetect = MIDI1_UART_rxBufferLoopDetect;\r
-                }\r
-\r
-            /* Finally, update the real output pointer, then return with\r
-            *  an indication as to whether there's a complete message in the buffer.\r
-            */\r
-            #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntDisable(MIDI1_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-            MIDI1_UART_rxBufferRead = rxBufferRead;\r
-            #if ((MIDI1_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntEnable(MIDI1_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI1_UART_RXBUFFERSIZE >= 256 */\r
-        }\r
-\r
-        return (msgRtn);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI1_ProcessUsbOut\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Process a USB MIDI output event.\r
-    *  Puts data into the MIDI TX output buffer.\r
-    *\r
-    * Parameters:\r
-    *  *epBuf: pointer on MIDI event.\r
-    *\r
-    * Return:\r
-    *   None\r
-    *\r
-    * Global variables:\r
-    *  USBFS_MIDI1_TxRunStat: This variable used to save the MIDI\r
-    *    status byte and skip to send the repeated status byte in subsequent event.\r
-    *  USBFS_MIDI1_InqFlags: The following flags are set when SysEx\r
-    *    message comes.\r
-    *    USBFS_INQ_SYSEX_FLAG: Non-Real Time SySEx message received.\r
-    *    USBFS_INQ_IDENTITY_REQ_FLAG: Identity Request received.\r
-    *      This bit should be cleared by user when Identity Reply message generated.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI1_ProcessUsbOut(const uint8 epBuf[])\r
-                                                            \r
-    {\r
-        uint8 cmd;\r
-        uint8 len;\r
-        uint8 i;\r
-\r
-        /* User code is required at the beginning of the procedure */\r
-        /* `#START MIDI1_PROCESS_OUT_BEGIN` */\r
-\r
-        /* `#END` */\r
-\r
-        cmd = epBuf[USBFS_EVENT_BYTE0] & USBFS_CIN_MASK;\r
-        if((cmd != USBFS_RESERVED0) && (cmd != USBFS_RESERVED1))\r
-        {\r
-            len = USBFS_MIDI_SIZE[cmd];\r
-            i = USBFS_EVENT_BYTE1;\r
-            /* Universal System Exclusive message parsing */\r
-            if(cmd == USBFS_SYSEX)\r
-            {\r
-                if((epBuf[USBFS_EVENT_BYTE1] == USBFS_MIDI_SYSEX) &&\r
-                   (epBuf[USBFS_EVENT_BYTE2] == USBFS_MIDI_SYSEX_NON_REAL_TIME))\r
-                {   /* Non-Real Time SySEx starts */\r
-                    USBFS_MIDI1_InqFlags |= USBFS_INQ_SYSEX_FLAG;\r
-                }\r
-                else\r
-                {\r
-                    USBFS_MIDI1_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-                }\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH1)\r
-            {\r
-                USBFS_MIDI1_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH2)\r
-            {\r
-                USBFS_MIDI1_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH3)\r
-            {\r
-                /* Identify Request support */\r
-                if((USBFS_MIDI1_InqFlags & USBFS_INQ_SYSEX_FLAG) != 0u)\r
-                {\r
-                    USBFS_MIDI1_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-                    if((epBuf[USBFS_EVENT_BYTE1] == USBFS_MIDI_SYSEX_GEN_INFORMATION) &&\r
-                    (epBuf[USBFS_EVENT_BYTE2] == USBFS_MIDI_SYSEX_IDENTITY_REQ))\r
-                    {   /* Set the flag about received the Identity Request.\r
-                        *  The Identity Reply message may be send by user code.\r
-                        */\r
-                        USBFS_MIDI1_InqFlags |= USBFS_INQ_IDENTITY_REQ_FLAG;\r
-                    }\r
-                }\r
-            }\r
-            else /* Do nothing for other command */\r
-            {\r
-            }\r
-            /* Running Status for Voice and Mode messages only. */\r
-            if((cmd >= USBFS_NOTE_OFF) && ( cmd <= USBFS_PITCH_BEND_CHANGE))\r
-            {\r
-                if(USBFS_MIDI1_TxRunStat == epBuf[USBFS_EVENT_BYTE1])\r
-                {   /* Skip the repeated Status byte */\r
-                    i++;\r
-                }\r
-                else\r
-                {   /* Save Status byte for next event */\r
-                    USBFS_MIDI1_TxRunStat = epBuf[USBFS_EVENT_BYTE1];\r
-                }\r
-            }\r
-            else\r
-            {   /* Clear Running Status */\r
-                USBFS_MIDI1_TxRunStat = 0u;\r
-            }\r
-            /* Puts data into the MIDI TX output buffer.*/\r
-            do\r
-            {\r
-                MIDI1_UART_PutChar(epBuf[i]);\r
-                i++;\r
-            } while (i <= len);\r
-        }\r
-\r
-        /* User code is required at the end of the procedure */\r
-        /* `#START MIDI1_PROCESS_OUT_END` */\r
-\r
-        /* `#END` */\r
-    }\r
-\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI2_GetEvent\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Checks for incoming MIDI data, calls the MIDI event builder if so.\r
-    *  Returns either empty or with a complete event.\r
-    *\r
-    * Parameters:\r
-    *  None\r
-    *\r
-    * Return:\r
-    *   0, if no complete message\r
-    *   1 - 4, if message complete\r
-    *   MIDI_SYSEX, if start or continuation of system exclusive\r
-    *   MIDI_EOSEX, if end of system exclusive\r
-    *   0xf8 - 0xff, if single byte real time message\r
-    *\r
-    * Global variables:\r
-    *  USBFS_MIDI2_Event: RX status structure used to parse received\r
-    *    data.\r
-    *\r
-    *******************************************************************************/\r
-    uint8 USBFS_MIDI2_GetEvent(void) \r
-    {\r
-        uint8 msgRtn = 0u;\r
-        uint8 rxData;\r
-        #if (MIDI2_UART_RXBUFFERSIZE >= 256u)\r
-            uint16 rxBufferRead;\r
-            #if CY_PSOC3 /* This local variable required only for PSOC3 and large buffer */\r
-                uint16 rxBufferWrite;\r
-            #endif /* end CY_PSOC3 */\r
-        #else\r
-            uint8 rxBufferRead;\r
-        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-        uint8 rxBufferLoopDetect;\r
-        /* Read buffer loop condition to the local variable */\r
-        rxBufferLoopDetect = MIDI2_UART_rxBufferLoopDetect;\r
-\r
-        if ( (MIDI2_UART_rxBufferRead != MIDI2_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u) )\r
-        {\r
-            /* Protect variables that could change on interrupt by disabling Rx interrupt.*/\r
-            #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntDisable(MIDI2_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-            rxBufferRead = MIDI2_UART_rxBufferRead;\r
-            #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                rxBufferWrite = MIDI2_UART_rxBufferWrite;\r
-                CyIntEnable(MIDI2_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-\r
-            /* Stay here until either the buffer is empty or we have a complete message\r
-            *  in the message buffer. Note that we must use a temporary output pointer to\r
-            *  since it takes two instructions to increment with a wrap, and we can't\r
-            *  risk doing that with the real pointer and getting an interrupt in between\r
-            *  instructions.\r
-            */\r
-\r
-            #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                while ( ((rxBufferRead != rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )\r
-            #else\r
-                while ( ((rxBufferRead != MIDI2_UART_rxBufferWrite) || (rxBufferLoopDetect != 0u)) && (msgRtn == 0u) )\r
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 && CY_PSOC3 */\r
-                {\r
-                    rxData = MIDI2_UART_rxBuffer[rxBufferRead];\r
-                    rxBufferRead++;\r
-                    if(rxBufferRead >= MIDI2_UART_RXBUFFERSIZE)\r
-                    {\r
-                        rxBufferRead = 0u;\r
-                    }\r
-                    /* If loop condition was set - update real read buffer pointer\r
-                    *  to avoid overflow status\r
-                    */\r
-                    if(rxBufferLoopDetect != 0u )\r
-                    {\r
-                        MIDI2_UART_rxBufferLoopDetect = 0u;\r
-                        #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                            CyIntDisable(MIDI2_UART_RX_VECT_NUM);\r
-                        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-                        MIDI2_UART_rxBufferRead = rxBufferRead;\r
-                        #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                            CyIntEnable(MIDI2_UART_RX_VECT_NUM);\r
-                        #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-                    }\r
-\r
-                    msgRtn = USBFS_ProcessMidiIn(rxData,\r
-                                                    (USBFS_MIDI_RX_STATUS *)&USBFS_MIDI2_Event);\r
-\r
-                    /* Read buffer loop condition to the local variable */\r
-                    rxBufferLoopDetect = MIDI2_UART_rxBufferLoopDetect;\r
-                }\r
-\r
-            /* Finally, update the real output pointer, then return with\r
-            *  an indication as to whether there's a complete message in the buffer.\r
-            */\r
-            #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntDisable(MIDI2_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-            MIDI2_UART_rxBufferRead = rxBufferRead;\r
-            #if ((MIDI2_UART_RXBUFFERSIZE >= 256u) && (CY_PSOC3))\r
-                CyIntEnable(MIDI2_UART_RX_VECT_NUM);\r
-            #endif /* End MIDI2_UART_RXBUFFERSIZE >= 256 */\r
-        }\r
-\r
-        return (msgRtn);\r
-    }\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_MIDI2_ProcessUsbOut\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Process a USB MIDI output event.\r
-    *  Puts data into the MIDI TX output buffer.\r
-    *\r
-    * Parameters:\r
-    *  *epBuf: pointer on MIDI event.\r
-    *\r
-    * Return:\r
-    *   None\r
-    *\r
-    * Global variables:\r
-    *  USBFS_MIDI2_TxRunStat: This variable used to save the MIDI\r
-    *    status byte and skip to send the repeated status byte in subsequent event.\r
-    *  USBFS_MIDI2_InqFlags: The following flags are set when SysEx\r
-    *    message comes.\r
-    *  USBFS_INQ_SYSEX_FLAG: Non-Real Time SySEx message received.\r
-    *  USBFS_INQ_IDENTITY_REQ_FLAG: Identity Request received.\r
-    *    This bit should be cleared by user when Identity Reply message generated.\r
-    *\r
-    *******************************************************************************/\r
-    void USBFS_MIDI2_ProcessUsbOut(const uint8 epBuf[])\r
-                                                            \r
-    {\r
-        uint8 cmd;\r
-        uint8 len;\r
-        uint8 i;\r
-\r
-        /* User code is required at the beginning of the procedure */\r
-        /* `#START MIDI2_PROCESS_OUT_START` */\r
-\r
-        /* `#END` */\r
-\r
-        cmd = epBuf[USBFS_EVENT_BYTE0] & USBFS_CIN_MASK;\r
-        if((cmd != USBFS_RESERVED0) && (cmd != USBFS_RESERVED1))\r
-        {\r
-            len = USBFS_MIDI_SIZE[cmd];\r
-            i = USBFS_EVENT_BYTE1;\r
-            /* Universal System Exclusive message parsing */\r
-            if(cmd == USBFS_SYSEX)\r
-            {\r
-                if((epBuf[USBFS_EVENT_BYTE1] == USBFS_MIDI_SYSEX) &&\r
-                   (epBuf[USBFS_EVENT_BYTE2] == USBFS_MIDI_SYSEX_NON_REAL_TIME))\r
-                {   /* SySEx starts */\r
-                    USBFS_MIDI2_InqFlags |= USBFS_INQ_SYSEX_FLAG;\r
-                }\r
-                else\r
-                {\r
-                    USBFS_MIDI2_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-                }\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH1)\r
-            {\r
-                USBFS_MIDI2_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH2)\r
-            {\r
-                USBFS_MIDI2_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-            }\r
-            else if(cmd == USBFS_SYSEX_ENDS_WITH3)\r
-            {\r
-                /* Identify Request support */\r
-                if((USBFS_MIDI2_InqFlags & USBFS_INQ_SYSEX_FLAG) != 0u)\r
-                {\r
-                    USBFS_MIDI2_InqFlags &= (uint8)~USBFS_INQ_SYSEX_FLAG;\r
-                    if((epBuf[USBFS_EVENT_BYTE1] == USBFS_MIDI_SYSEX_GEN_INFORMATION) &&\r
-                       (epBuf[USBFS_EVENT_BYTE2] == USBFS_MIDI_SYSEX_IDENTITY_REQ))\r
-                    {   /* Set the flag about received the Identity Request.\r
-                        *  The Identity Reply message may be send by user code.\r
-                        */\r
-                        USBFS_MIDI2_InqFlags |= USBFS_INQ_IDENTITY_REQ_FLAG;\r
-                    }\r
-                }\r
-            }\r
-            else /* Do nothing for other command */\r
-            {\r
-            }\r
-            /* Running Status for Voice and Mode messages only. */\r
-            if((cmd >= USBFS_NOTE_OFF) && ( cmd <= USBFS_PITCH_BEND_CHANGE))\r
-            {\r
-                if(USBFS_MIDI2_TxRunStat == epBuf[USBFS_EVENT_BYTE1])\r
-                {   /* Skip the repeated Status byte */\r
-                    i++;\r
-                }\r
-                else\r
-                {   /* Save Status byte for next event */\r
-                    USBFS_MIDI2_TxRunStat = epBuf[USBFS_EVENT_BYTE1];\r
-                }\r
-            }\r
-            else\r
-            {   /* Clear Running Status */\r
-                USBFS_MIDI2_TxRunStat = 0u;\r
-            }\r
-            /* Puts data into the MIDI TX output buffer.*/\r
-            do\r
-            {\r
-                MIDI2_UART_PutChar(epBuf[i]);\r
-                i++;\r
-            } while (i <= len);\r
-        }\r
-\r
-        /* User code is required at the end of the procedure */\r
-        /* `#START MIDI2_PROCESS_OUT_END` */\r
-\r
-        /* `#END` */\r
-    }\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-#endif  /* End (USBFS_ENABLE_MIDI_API != 0u) */\r
-\r
-\r
-/* `#START MIDI_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-#endif  /* End defined(USBFS_ENABLE_MIDI_STREAMING) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.h
deleted file mode 100755 (executable)
index 5a72034..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_midi.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_midi.h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  Header File for the USBFS MIDI module.\r
-*  Contains prototypes and constant values.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_midi_H)\r
-#define CY_USBFS_USBFS_midi_H\r
-\r
-#include "cytypes.h"\r
-#include "USBFS.h"\r
-\r
-\r
-/***************************************\r
-*    Data Struct Definition\r
-***************************************/\r
-\r
-/* The following structure is used to hold status information for\r
-   building and parsing incoming MIDI messages. */\r
-typedef struct\r
-{\r
-    uint8    length;        /* expected length */\r
-    uint8    count;         /* current byte count */\r
-    uint8    size;          /* complete size */\r
-    uint8    runstat;       /* running status */\r
-    uint8    msgBuff[4];    /* message buffer */\r
-} USBFS_MIDI_RX_STATUS;\r
-\r
-\r
-/***************************************\r
-*           MIDI Constants.\r
-***************************************/\r
-\r
-#define USBFS_ONE_EXT_INTRF              (0x01u)\r
-#define USBFS_TWO_EXT_INTRF              (0x02u)\r
-\r
-/* Flag definitions for use with MIDI device inquiry */\r
-#define USBFS_INQ_SYSEX_FLAG             (0x01u)\r
-#define USBFS_INQ_IDENTITY_REQ_FLAG      (0x02u)\r
-\r
-/* USB-MIDI Code Index Number Classifications (MIDI Table 4-1) */\r
-#define USBFS_CIN_MASK                   (0x0Fu)\r
-#define USBFS_RESERVED0                  (0x00u)\r
-#define USBFS_RESERVED1                  (0x01u)\r
-#define USBFS_2BYTE_COMMON               (0x02u)\r
-#define USBFS_3BYTE_COMMON               (0x03u)\r
-#define USBFS_SYSEX                      (0x04u)\r
-#define USBFS_1BYTE_COMMON               (0x05u)\r
-#define USBFS_SYSEX_ENDS_WITH1           (0x05u)\r
-#define USBFS_SYSEX_ENDS_WITH2           (0x06u)\r
-#define USBFS_SYSEX_ENDS_WITH3           (0x07u)\r
-#define USBFS_NOTE_OFF                   (0x08u)\r
-#define USBFS_NOTE_ON                    (0x09u)\r
-#define USBFS_POLY_KEY_PRESSURE          (0x0Au)\r
-#define USBFS_CONTROL_CHANGE             (0x0Bu)\r
-#define USBFS_PROGRAM_CHANGE             (0x0Cu)\r
-#define USBFS_CHANNEL_PRESSURE           (0x0Du)\r
-#define USBFS_PITCH_BEND_CHANGE          (0x0Eu)\r
-#define USBFS_SINGLE_BYTE                (0x0Fu)\r
-\r
-#define USBFS_CABLE_MASK                 (0xF0u)\r
-#define USBFS_MIDI_CABLE_00              (0x00u)\r
-#define USBFS_MIDI_CABLE_01              (0x10u)\r
-\r
-#define USBFS_EVENT_BYTE0                (0x00u)\r
-#define USBFS_EVENT_BYTE1                (0x01u)\r
-#define USBFS_EVENT_BYTE2                (0x02u)\r
-#define USBFS_EVENT_BYTE3                (0x03u)\r
-#define USBFS_EVENT_LENGTH               (0x04u)\r
-\r
-#define USBFS_MIDI_STATUS_BYTE_MASK      (0x80u)\r
-#define USBFS_MIDI_STATUS_MASK           (0xF0u)\r
-#define USBFS_MIDI_SINGLE_BYTE_MASK      (0x08u)\r
-#define USBFS_MIDI_NOTE_OFF              (0x80u)\r
-#define USBFS_MIDI_NOTE_ON               (0x90u)\r
-#define USBFS_MIDI_POLY_KEY_PRESSURE     (0xA0u)\r
-#define USBFS_MIDI_CONTROL_CHANGE        (0xB0u)\r
-#define USBFS_MIDI_PROGRAM_CHANGE        (0xC0u)\r
-#define USBFS_MIDI_CHANNEL_PRESSURE      (0xD0u)\r
-#define USBFS_MIDI_PITCH_BEND_CHANGE     (0xE0u)\r
-#define USBFS_MIDI_SYSEX                 (0xF0u)\r
-#define USBFS_MIDI_EOSEX                 (0xF7u)\r
-#define USBFS_MIDI_QFM                   (0xF1u)\r
-#define USBFS_MIDI_SPP                   (0xF2u)\r
-#define USBFS_MIDI_SONGSEL               (0xF3u)\r
-#define USBFS_MIDI_TUNEREQ               (0xF6u)\r
-#define USBFS_MIDI_ACTIVESENSE           (0xFEu)\r
-\r
-/* MIDI Universal System Exclusive defines */\r
-#define USBFS_MIDI_SYSEX_NON_REAL_TIME   (0x7Eu)\r
-#define USBFS_MIDI_SYSEX_REALTIME        (0x7Fu)\r
-/* ID of target device */\r
-#define USBFS_MIDI_SYSEX_ID_ALL          (0x7Fu)\r
-/* Sub-ID#1*/\r
-#define USBFS_MIDI_SYSEX_GEN_INFORMATION (0x06u)\r
-#define USBFS_MIDI_SYSEX_GEN_MESSAGE     (0x09u)\r
-/* Sub-ID#2*/\r
-#define USBFS_MIDI_SYSEX_IDENTITY_REQ    (0x01u)\r
-#define USBFS_MIDI_SYSEX_IDENTITY_REPLY  (0x02u)\r
-#define USBFS_MIDI_SYSEX_SYSTEM_ON       (0x01u)\r
-#define USBFS_MIDI_SYSEX_SYSTEM_OFF      (0x02u)\r
-\r
-#define USBFS_CUSTOM_UART_TX_PRIOR_NUM   (0x04u)\r
-#define USBFS_CUSTOM_UART_RX_PRIOR_NUM   (0x02u)\r
-\r
-#define USBFS_ISR_SERVICE_MIDI_OUT     \\r
-        ( (USBFS_ENABLE_MIDI_API != 0u) && \\r
-          (USBFS_MIDI_OUT_BUFF_SIZE > 0) && (USBFS_EP_MM == USBFS__EP_DMAAUTO) )\r
-#define USBFS_ISR_SERVICE_MIDI_IN     \\r
-        ( (USBFS_ENABLE_MIDI_API != 0u) && (USBFS_MIDI_IN_BUFF_SIZE > 0) )\r
-\r
-/***************************************\r
-* External function references\r
-***************************************/\r
-\r
-void USBFS_callbackLocalMidiEvent(uint8 cable, uint8 *midiMsg)\r
-                                                     ;\r
-\r
-\r
-/***************************************\r
-*    External references\r
-***************************************/\r
-\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-    #include "MIDI1_UART.h"\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-    #include "MIDI2_UART.h"\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-    #include <CyDmac.h>\r
-#endif /* End USBFS_EP_MM */\r
-\r
-\r
-/***************************************\r
-*    Private function prototypes\r
-***************************************/\r
-\r
-void USBFS_PrepareInBuffer(uint8 ic, const uint8 srcBuff[], uint8 eventLen, uint8 cable)\r
-                                                                 ;\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-    void USBFS_MIDI_Init(void) ;\r
-    uint8 USBFS_ProcessMidiIn(uint8 mData, USBFS_MIDI_RX_STATUS *rxStat)\r
-                                                                ;\r
-    uint8 USBFS_MIDI1_GetEvent(void) ;\r
-    void USBFS_MIDI1_ProcessUsbOut(const uint8 epBuf[])\r
-                                                     ;\r
-\r
-    #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-        uint8 USBFS_MIDI2_GetEvent(void) ;\r
-        void USBFS_MIDI2_ProcessUsbOut(const uint8 epBuf[])\r
-                                                    ;\r
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-\r
-/***************************************\r
-* External data references\r
-***************************************/\r
-\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING)\r
-\r
-#if (USBFS_MIDI_IN_BUFF_SIZE > 0)\r
-    #if (USBFS_MIDI_IN_BUFF_SIZE >= 256)\r
-        extern volatile uint16 USBFS_midiInPointer;                       /* Input endpoint buffer pointer */\r
-    #else\r
-        extern volatile uint8 USBFS_midiInPointer;                        /* Input endpoint buffer pointer */\r
-    #endif /* End USBFS_MIDI_IN_BUFF_SIZE >=256 */\r
-    extern volatile uint8 USBFS_midi_in_ep;                               /* Input endpoint number */\r
-    extern uint8 USBFS_midiInBuffer[USBFS_MIDI_IN_BUFF_SIZE];  /* Input endpoint buffer */\r
-#endif /* USBFS_MIDI_IN_BUFF_SIZE > 0 */\r
-\r
-#if (USBFS_MIDI_OUT_BUFF_SIZE > 0)\r
-    extern volatile uint8 USBFS_midi_out_ep;                               /* Output endpoint number */\r
-    extern uint8 USBFS_midiOutBuffer[USBFS_MIDI_OUT_BUFF_SIZE]; /* Output endpoint buffer */\r
-#endif /* USBFS_MIDI_OUT_BUFF_SIZE > 0 */\r
-\r
-#if (USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF)\r
-    extern volatile uint8 USBFS_MIDI1_InqFlags;                              /* Device inquiry flag */\r
-    #if (USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF)\r
-        extern volatile uint8 USBFS_MIDI2_InqFlags;                          /* Device inquiry flag */\r
-    #endif /* End USBFS_MIDI_EXT_MODE >= USBFS_TWO_EXT_INTRF */\r
-#endif /* End USBFS_MIDI_EXT_MODE >= USBFS_ONE_EXT_INTRF */\r
-\r
-#endif /* USBFS_ENABLE_MIDI_STREAMING */\r
-\r
-\r
-#endif /* End CY_USBFS_USBFS_midi_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pm.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pm.c
deleted file mode 100755 (executable)
index 00c88f6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pm.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_pm.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  This file provides Suspend/Resume APIs functionality.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "project.h"\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-\r
-\r
-/***************************************\r
-* Custom Declarations\r
-***************************************/\r
-/* `#START PM_CUSTOM_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/***************************************\r
-* Local data allocation\r
-***************************************/\r
-\r
-static USBFS_BACKUP_STRUCT  USBFS_backup;\r
-\r
-\r
-#if(USBFS_DP_ISR_REMOVE == 0u)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_DP_Interrupt\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This Interrupt Service Routine handles DP pin changes for wake-up from\r
-    *  the sleep mode.\r
-    *\r
-    * Parameters:\r
-    *  None.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    *******************************************************************************/\r
-    CY_ISR(USBFS_DP_ISR)\r
-    {\r
-        /* `#START DP_USER_CODE` Place your code here */\r
-\r
-        /* `#END` */\r
-\r
-        /* Clears active interrupt */\r
-        CY_GET_REG8(USBFS_DP_INTSTAT_PTR);\r
-    }\r
-\r
-#endif /* (USBFS_DP_ISR_REMOVE == 0u) */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_SaveConfig\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Saves the current user configuration.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_SaveConfig(void) \r
-{\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_RestoreConfig\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Restores the current user configuration.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_RestoreConfig(void) \r
-{\r
-    if(USBFS_configuration != 0u)\r
-    {\r
-        USBFS_ConfigReg();\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Suspend\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function disables the USBFS block and prepares for power donwn mode.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*   None.\r
-*\r
-* Global variables:\r
-*  USBFS_backup.enable:  modified.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Suspend(void) \r
-{\r
-    uint8 enableInterrupts;\r
-    enableInterrupts = CyEnterCriticalSection();\r
-\r
-    if((CY_GET_REG8(USBFS_CR0_PTR) & USBFS_CR0_ENABLE) != 0u)\r
-    {   /* USB block is enabled */\r
-        USBFS_backup.enableState = 1u;\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-            USBFS_Stop_DMA(USBFS_MAX_EP);     /* Stop all DMAs */\r
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-        /* Ensure USB transmit enable is low (USB_USBIO_CR0.ten). - Manual Transmission - Disabled */\r
-        USBFS_USBIO_CR0_REG &= (uint8)~USBFS_USBIO_CR0_TEN;\r
-        CyDelayUs(0u);  /*~50ns delay */\r
-\r
-        /* Disable the USBIO by asserting PM.USB_CR0.fsusbio_pd_n(Inverted) and pd_pullup_hv(Inverted) high. */\r
-        USBFS_PM_USB_CR0_REG &=\r
-                                (uint8)~(USBFS_PM_USB_CR0_PD_N | USBFS_PM_USB_CR0_PD_PULLUP_N);\r
-\r
-        /* Disable the SIE */\r
-        USBFS_CR0_REG &= (uint8)~USBFS_CR0_ENABLE;\r
-\r
-        CyDelayUs(0u);  /*~50ns delay */\r
-        /* Store mode and Disable VRegulator*/\r
-        USBFS_backup.mode = USBFS_CR1_REG & USBFS_CR1_REG_ENABLE;\r
-        USBFS_CR1_REG &= (uint8)~USBFS_CR1_REG_ENABLE;\r
-\r
-        CyDelayUs(1u);  /* 0.5 us min delay */\r
-        /* Disable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
-        USBFS_PM_USB_CR0_REG &= (uint8)~USBFS_PM_USB_CR0_REF_EN;\r
-\r
-        /* Switch DP and DM terminals to GPIO mode and disconnect 1.5k pullup*/\r
-        USBFS_USBIO_CR1_REG |= USBFS_USBIO_CR1_IOMODE;\r
-\r
-        /* Disable USB in ACT PM */\r
-        USBFS_PM_ACT_CFG_REG &= (uint8)~USBFS_PM_ACT_EN_FSUSB;\r
-        /* Disable USB block for Standby Power Mode */\r
-        USBFS_PM_STBY_CFG_REG &= (uint8)~USBFS_PM_STBY_EN_FSUSB;\r
-        CyDelayUs(1u); /* min  0.5us delay required */\r
-\r
-    }\r
-    else\r
-    {\r
-        USBFS_backup.enableState = 0u;\r
-    }\r
-    CyExitCriticalSection(enableInterrupts);\r
-\r
-    /* Set the DP Interrupt for wake-up from sleep mode. */\r
-    #if(USBFS_DP_ISR_REMOVE == 0u)\r
-        (void) CyIntSetVector(USBFS_DP_INTC_VECT_NUM,   &USBFS_DP_ISR);\r
-        CyIntSetPriority(USBFS_DP_INTC_VECT_NUM, USBFS_DP_INTC_PRIOR);\r
-        CyIntClearPending(USBFS_DP_INTC_VECT_NUM);\r
-        CyIntEnable(USBFS_DP_INTC_VECT_NUM);\r
-    #endif /* (USBFS_DP_ISR_REMOVE == 0u) */\r
-\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Resume\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function enables the USBFS block after power down mode.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Global variables:\r
-*  USBFS_backup - checked.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Resume(void) \r
-{\r
-    uint8 enableInterrupts;\r
-    enableInterrupts = CyEnterCriticalSection();\r
-\r
-    if(USBFS_backup.enableState != 0u)\r
-    {\r
-        #if(USBFS_DP_ISR_REMOVE == 0u)\r
-            CyIntDisable(USBFS_DP_INTC_VECT_NUM);\r
-        #endif /* End USBFS_DP_ISR_REMOVE */\r
-\r
-        /* Enable USB block */\r
-        USBFS_PM_ACT_CFG_REG |= USBFS_PM_ACT_EN_FSUSB;\r
-        /* Enable USB block for Standby Power Mode */\r
-        USBFS_PM_STBY_CFG_REG |= USBFS_PM_STBY_EN_FSUSB;\r
-        /* Enable core clock */\r
-        USBFS_USB_CLK_EN_REG |= USBFS_USB_CLK_ENABLE;\r
-\r
-        /* Enable the USBIO reference by setting PM.USB_CR0.fsusbio_ref_en.*/\r
-        USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_REF_EN;\r
-        /* The reference will be available ~40us after power restored */\r
-        CyDelayUs(40u);\r
-        /* Return VRegulator*/\r
-        USBFS_CR1_REG |= USBFS_backup.mode;\r
-        CyDelayUs(0u);  /*~50ns delay */\r
-        /* Enable USBIO */\r
-        USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_N;\r
-        CyDelayUs(2u);\r
-        /* Set the USBIO pull-up enable */\r
-        USBFS_PM_USB_CR0_REG |= USBFS_PM_USB_CR0_PD_PULLUP_N;\r
-\r
-        /* Reinit Arbiter configuration for DMA transfers */\r
-        #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-            /* usb arb interrupt enable */\r
-            USBFS_ARB_INT_EN_REG = USBFS_ARB_INT_MASK;\r
-            #if(USBFS_EP_MM == USBFS__EP_DMAMANUAL)\r
-                USBFS_ARB_CFG_REG = USBFS_ARB_CFG_MANUAL_DMA;\r
-            #endif   /* End USBFS_EP_MM == USBFS__EP_DMAMANUAL */\r
-            #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-                /*Set cfg cmplt this rises DMA request when the full configuration is done */\r
-                USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
-            #endif   /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-        /* STALL_IN_OUT */\r
-        CY_SET_REG8(USBFS_EP0_CR_PTR, USBFS_MODE_STALL_IN_OUT);\r
-        /* Enable the SIE with a last address */\r
-        USBFS_CR0_REG |= USBFS_CR0_ENABLE;\r
-        CyDelayCycles(1u);\r
-        /* Finally, Enable d+ pullup and select iomode to USB mode*/\r
-        CY_SET_REG8(USBFS_USBIO_CR1_PTR, USBFS_USBIO_CR1_USBPUEN);\r
-\r
-        /* Restore USB register settings */\r
-        USBFS_RestoreConfig();\r
-\r
-    }\r
-    CyExitCriticalSection(enableInterrupts);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pvt.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pvt.h
deleted file mode 100755 (executable)
index 499fe26..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_pvt.h
+++ /dev/null
@@ -1,203 +0,0 @@
-/*******************************************************************************\r
-* File Name: .h\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  This private file provides constants and parameter values for the\r
-*  USBFS Component.\r
-*  Please do not use this file or its content in your project.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2013, Cypress Semiconductor Corporation. All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_USBFS_USBFS_pvt_H)\r
-#define CY_USBFS_USBFS_pvt_H\r
-\r
-\r
-/***************************************\r
-*     Private Variables\r
-***************************************/\r
-\r
-/* Generated external references for descriptors*/\r
-extern const uint8 CYCODE USBFS_DEVICE0_DESCR[18u];\r
-extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_DESCR[41u];\r
-extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_TABLE[1u];\r
-extern const T_USBFS_EP_SETTINGS_BLOCK CYCODE USBFS_DEVICE0_CONFIGURATION0_EP_SETTINGS_TABLE[2u];\r
-extern const uint8 CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE_CLASS[1u];\r
-extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_TABLE[4u];\r
-extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_TABLE[2u];\r
-extern const T_USBFS_LUT CYCODE USBFS_TABLE[1u];\r
-extern const uint8 CYCODE USBFS_SN_STRING_DESCRIPTOR[10];\r
-extern const uint8 CYCODE USBFS_STRING_DESCRIPTORS[83u];\r
-extern T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_SCB;\r
-extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF[\r
-            USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_BUF_SIZE];\r
-extern T_USBFS_XFER_STATUS_BLOCK USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_SCB;\r
-extern uint8 USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF[\r
-            USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_BUF_SIZE];\r
-extern const uint8 CYCODE USBFS_HIDREPORT_DESCRIPTOR1[40u];\r
-extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_IN_RPT_TABLE[1u];\r
-extern const T_USBFS_TD CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_OUT_RPT_TABLE[1u];\r
-extern const T_USBFS_LUT CYCODE USBFS_DEVICE0_CONFIGURATION0_INTERFACE0_ALTERNATE0_HID_TABLE[5u];\r
-\r
-\r
-extern const uint8 CYCODE USBFS_MSOS_DESCRIPTOR[USBFS_MSOS_DESCRIPTOR_LENGTH];\r
-extern const uint8 CYCODE USBFS_MSOS_CONFIGURATION_DESCR[USBFS_MSOS_CONF_DESCR_LENGTH];\r
-#if defined(USBFS_ENABLE_IDSN_STRING)\r
-    extern uint8 USBFS_idSerialNumberStringDescriptor[USBFS_IDSN_DESCR_LENGTH];\r
-#endif /* USBFS_ENABLE_IDSN_STRING */\r
-\r
-extern volatile uint8 USBFS_interfaceNumber;\r
-extern volatile uint8 USBFS_interfaceSetting[USBFS_MAX_INTERFACES_NUMBER];\r
-extern volatile uint8 USBFS_interfaceSetting_last[USBFS_MAX_INTERFACES_NUMBER];\r
-extern volatile uint8 USBFS_deviceAddress;\r
-extern volatile uint8 USBFS_interfaceStatus[USBFS_MAX_INTERFACES_NUMBER];\r
-extern const uint8 CYCODE *USBFS_interfaceClass;\r
-\r
-extern volatile T_USBFS_EP_CTL_BLOCK USBFS_EP[USBFS_MAX_EP];\r
-extern volatile T_USBFS_TD USBFS_currentTD;\r
-\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-    extern uint8 USBFS_DmaChan[USBFS_MAX_EP];\r
-    extern uint8 USBFS_DmaTd[USBFS_MAX_EP];\r
-#endif /* End USBFS_EP_MM */\r
-\r
-extern volatile uint8 USBFS_ep0Toggle;\r
-extern volatile uint8 USBFS_lastPacketSize;\r
-extern volatile uint8 USBFS_ep0Mode;\r
-extern volatile uint8 USBFS_ep0Count;\r
-extern volatile uint16 USBFS_transferByteCount;\r
-\r
-\r
-/***************************************\r
-*     Private Function Prototypes\r
-***************************************/\r
-void  USBFS_ReInitComponent(void) ;\r
-void  USBFS_HandleSetup(void) ;\r
-void  USBFS_HandleIN(void) ;\r
-void  USBFS_HandleOUT(void) ;\r
-void  USBFS_LoadEP0(void) ;\r
-uint8 USBFS_InitControlRead(void) ;\r
-uint8 USBFS_InitControlWrite(void) ;\r
-void  USBFS_ControlReadDataStage(void) ;\r
-void  USBFS_ControlReadStatusStage(void) ;\r
-void  USBFS_ControlReadPrematureStatus(void)\r
-                                                ;\r
-uint8 USBFS_InitControlWrite(void) ;\r
-uint8 USBFS_InitZeroLengthControlTransfer(void)\r
-                                                ;\r
-void  USBFS_ControlWriteDataStage(void) ;\r
-void  USBFS_ControlWriteStatusStage(void) ;\r
-void  USBFS_ControlWritePrematureStatus(void)\r
-                                                ;\r
-uint8 USBFS_InitNoDataControlTransfer(void) ;\r
-void  USBFS_NoDataControlStatusStage(void) ;\r
-void  USBFS_InitializeStatusBlock(void) ;\r
-void  USBFS_UpdateStatusBlock(uint8 completionCode) ;\r
-uint8 USBFS_DispatchClassRqst(void) ;\r
-\r
-void USBFS_Config(uint8 clearAltSetting) ;\r
-void USBFS_ConfigAltChanged(void) ;\r
-void USBFS_ConfigReg(void) ;\r
-\r
-const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)\r
-                                                            ;\r
-const T_USBFS_LUT CYCODE *USBFS_GetDeviceTablePtr(void)\r
-                                                            ;\r
-const uint8 CYCODE *USBFS_GetInterfaceClassTablePtr(void)\r
-                                                    ;\r
-uint8 USBFS_ClearEndpointHalt(void) ;\r
-uint8 USBFS_SetEndpointHalt(void) ;\r
-uint8 USBFS_ValidateAlternateSetting(void) ;\r
-\r
-void USBFS_SaveConfig(void) ;\r
-void USBFS_RestoreConfig(void) ;\r
-\r
-#if defined(USBFS_ENABLE_IDSN_STRING)\r
-    void USBFS_ReadDieID(uint8 descr[]) ;\r
-#endif /* USBFS_ENABLE_IDSN_STRING */\r
-\r
-#if defined(USBFS_ENABLE_HID_CLASS)\r
-    uint8 USBFS_DispatchHIDClassRqst(void);\r
-#endif /* End USBFS_ENABLE_HID_CLASS */\r
-#if defined(USBFS_ENABLE_AUDIO_CLASS)\r
-    uint8 USBFS_DispatchAUDIOClassRqst(void);\r
-#endif /* End USBFS_ENABLE_HID_CLASS */\r
-#if defined(USBFS_ENABLE_CDC_CLASS)\r
-    uint8 USBFS_DispatchCDCClassRqst(void);\r
-#endif /* End USBFS_ENABLE_CDC_CLASS */\r
-\r
-CY_ISR_PROTO(USBFS_EP_0_ISR);\r
-#if(USBFS_EP1_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_1_ISR);\r
-#endif /* End USBFS_EP1_ISR_REMOVE */\r
-#if(USBFS_EP2_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_2_ISR);\r
-#endif /* End USBFS_EP2_ISR_REMOVE */\r
-#if(USBFS_EP3_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_3_ISR);\r
-#endif /* End USBFS_EP3_ISR_REMOVE */\r
-#if(USBFS_EP4_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_4_ISR);\r
-#endif /* End USBFS_EP4_ISR_REMOVE */\r
-#if(USBFS_EP5_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_5_ISR);\r
-#endif /* End USBFS_EP5_ISR_REMOVE */\r
-#if(USBFS_EP6_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_6_ISR);\r
-#endif /* End USBFS_EP6_ISR_REMOVE */\r
-#if(USBFS_EP7_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_7_ISR);\r
-#endif /* End USBFS_EP7_ISR_REMOVE */\r
-#if(USBFS_EP8_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_EP_8_ISR);\r
-#endif /* End USBFS_EP8_ISR_REMOVE */\r
-CY_ISR_PROTO(USBFS_BUS_RESET_ISR);\r
-#if(USBFS_SOF_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_SOF_ISR);\r
-#endif /* End USBFS_SOF_ISR_REMOVE */\r
-#if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-    CY_ISR_PROTO(USBFS_ARB_ISR);\r
-#endif /* End USBFS_EP_MM */\r
-#if(USBFS_DP_ISR_REMOVE == 0u)\r
-    CY_ISR_PROTO(USBFS_DP_ISR);\r
-#endif /* End USBFS_DP_ISR_REMOVE */\r
-\r
-\r
-/***************************************\r
-* Request Handlers\r
-***************************************/\r
-\r
-uint8 USBFS_HandleStandardRqst(void) ;\r
-uint8 USBFS_DispatchClassRqst(void) ;\r
-uint8 USBFS_HandleVendorRqst(void) ;\r
-\r
-\r
-/***************************************\r
-*    HID Internal references\r
-***************************************/\r
-#if defined(USBFS_ENABLE_HID_CLASS)\r
-    void USBFS_FindReport(void) ;\r
-    void USBFS_FindReportDescriptor(void) ;\r
-    void USBFS_FindHidClassDecriptor(void) ;\r
-#endif /* USBFS_ENABLE_HID_CLASS */\r
-\r
-\r
-/***************************************\r
-*    MIDI Internal references\r
-***************************************/\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING)\r
-    void USBFS_MIDI_IN_EP_Service(void) ;\r
-#endif /* USBFS_ENABLE_MIDI_STREAMING */\r
-\r
-\r
-#endif /* CY_USBFS_USBFS_pvt_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_std.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_std.c
deleted file mode 100755 (executable)
index 18f0364..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_std.c
+++ /dev/null
@@ -1,1134 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_std.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB Standard request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-#include "USBFS_cdc.h"\r
-#include "USBFS_pvt.h"\r
-#if defined(USBFS_ENABLE_MIDI_STREAMING) \r
-    #include "USBFS_midi.h"\r
-#endif /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-\r
-\r
-/***************************************\r
-*   Static data allocation\r
-***************************************/\r
-\r
-#if defined(USBFS_ENABLE_FWSN_STRING)\r
-    static volatile uint8 *USBFS_fwSerialNumberStringDescriptor;\r
-    static volatile uint8 USBFS_snStringConfirm = USBFS_FALSE;\r
-#endif  /* USBFS_ENABLE_FWSN_STRING */\r
-\r
-#if defined(USBFS_ENABLE_FWSN_STRING)\r
-\r
-\r
-    /*******************************************************************************\r
-    * Function Name: USBFS_SerialNumString\r
-    ********************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Application firmware may supply the source of the USB device descriptors\r
-    *  serial number string during runtime.\r
-    *\r
-    * Parameters:\r
-    *  snString:  pointer to string.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    *******************************************************************************/\r
-    void  USBFS_SerialNumString(uint8 snString[]) \r
-    {\r
-        USBFS_snStringConfirm = USBFS_FALSE;\r
-        if(snString != NULL)\r
-        {\r
-            USBFS_fwSerialNumberStringDescriptor = snString;\r
-            /* Check descriptor validation */\r
-            if( (snString[0u] > 1u ) && (snString[1u] == USBFS_DESCR_STRING) )\r
-            {\r
-                USBFS_snStringConfirm = USBFS_TRUE;\r
-            }\r
-        }\r
-    }\r
-\r
-#endif  /* USBFS_ENABLE_FWSN_STRING */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_HandleStandardRqst\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This Routine dispatches standard requests\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  TRUE if request handled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_HandleStandardRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-    uint8 interfaceNumber;\r
-    #if defined(USBFS_ENABLE_STRINGS)\r
-        volatile uint8 *pStr = 0u;\r
-        #if defined(USBFS_ENABLE_DESCRIPTOR_STRINGS)\r
-            uint8 nStr;\r
-            uint8 descrLength;\r
-        #endif /* USBFS_ENABLE_DESCRIPTOR_STRINGS */\r
-    #endif /* USBFS_ENABLE_STRINGS */\r
-    static volatile uint8 USBFS_tBuffer[USBFS_STATUS_LENGTH_MAX];\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    USBFS_currentTD.count = 0u;\r
-\r
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-    {\r
-        /* Control Read */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_GET_DESCRIPTOR:\r
-                if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_DEVICE)\r
-                {\r
-                    pTmp = USBFS_GetDeviceTablePtr();\r
-                    USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
-                    USBFS_currentTD.count = USBFS_DEVICE_DESCR_LENGTH;\r
-                    requestHandled  = USBFS_InitControlRead();\r
-                }\r
-                else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_CONFIG)\r
-                {\r
-                    pTmp = USBFS_GetConfigTablePtr(CY_GET_REG8(USBFS_wValueLo));\r
-                    USBFS_currentTD.pData = (volatile uint8 *)pTmp->p_list;\r
-                    USBFS_currentTD.count = ((uint16)(USBFS_currentTD.pData)[ \\r
-                                      USBFS_CONFIG_DESCR_TOTAL_LENGTH_HI] << 8u) | \\r
-                                     (USBFS_currentTD.pData)[USBFS_CONFIG_DESCR_TOTAL_LENGTH_LOW];\r
-                    requestHandled  = USBFS_InitControlRead();\r
-                }\r
-                #if defined(USBFS_ENABLE_STRINGS)\r
-                else if (CY_GET_REG8(USBFS_wValueHi) == USBFS_DESCR_STRING)\r
-                {\r
-                    /* Descriptor Strings*/\r
-                    #if defined(USBFS_ENABLE_DESCRIPTOR_STRINGS)\r
-                        nStr = 0u;\r
-                        pStr = (volatile uint8 *)&USBFS_STRING_DESCRIPTORS[0u];\r
-                        while ( (CY_GET_REG8(USBFS_wValueLo) > nStr) && (*pStr != 0u) )\r
-                        {\r
-                            /* Read descriptor length from 1st byte */\r
-                            descrLength = *pStr;\r
-                            /* Move to next string descriptor */\r
-                            pStr = &pStr[descrLength];\r
-                            nStr++;\r
-                        }\r
-                    #endif /* End USBFS_ENABLE_DESCRIPTOR_STRINGS */\r
-                    /* Microsoft OS String*/\r
-                    #if defined(USBFS_ENABLE_MSOS_STRING)\r
-                        if( CY_GET_REG8(USBFS_wValueLo) == USBFS_STRING_MSOS )\r
-                        {\r
-                            pStr = (volatile uint8 *)&USBFS_MSOS_DESCRIPTOR[0u];\r
-                        }\r
-                    #endif /* End USBFS_ENABLE_MSOS_STRING*/\r
-                    /* SN string */\r
-                    #if defined(USBFS_ENABLE_SN_STRING)\r
-                        if( (CY_GET_REG8(USBFS_wValueLo) != 0u) &&\r
-                            (CY_GET_REG8(USBFS_wValueLo) ==\r
-                            USBFS_DEVICE0_DESCR[USBFS_DEVICE_DESCR_SN_SHIFT]) )\r
-                        {\r
-                            pStr = (volatile uint8 *)&USBFS_SN_STRING_DESCRIPTOR[0u];\r
-                            #if defined(USBFS_ENABLE_FWSN_STRING)\r
-                                if(USBFS_snStringConfirm != USBFS_FALSE)\r
-                                {\r
-                                    pStr = USBFS_fwSerialNumberStringDescriptor;\r
-                                }\r
-                            #endif  /* USBFS_ENABLE_FWSN_STRING */\r
-                            #if defined(USBFS_ENABLE_IDSN_STRING)\r
-                                /* Read DIE ID and generate string descriptor in RAM */\r
-                                USBFS_ReadDieID(USBFS_idSerialNumberStringDescriptor);\r
-                                pStr = USBFS_idSerialNumberStringDescriptor;\r
-                            #endif    /* End USBFS_ENABLE_IDSN_STRING */\r
-                        }\r
-                    #endif    /* End USBFS_ENABLE_SN_STRING */\r
-                    if (*pStr != 0u)\r
-                    {\r
-                        USBFS_currentTD.count = *pStr;\r
-                        USBFS_currentTD.pData = pStr;\r
-                        requestHandled  = USBFS_InitControlRead();\r
-                    }\r
-                }\r
-                #endif /* End USBFS_ENABLE_STRINGS */\r
-                else\r
-                {\r
-                    requestHandled = USBFS_DispatchClassRqst();\r
-                }\r
-                break;\r
-            case USBFS_GET_STATUS:\r
-                switch ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK))\r
-                {\r
-                    case USBFS_RQST_RCPT_EP:\r
-                        USBFS_currentTD.count = USBFS_EP_STATUS_LENGTH;\r
-                        USBFS_tBuffer[0u] = USBFS_EP[ \\r
-                                        CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED].hwEpState;\r
-                        USBFS_tBuffer[1u] = 0u;\r
-                        USBFS_currentTD.pData = &USBFS_tBuffer[0u];\r
-                        requestHandled  = USBFS_InitControlRead();\r
-                        break;\r
-                    case USBFS_RQST_RCPT_DEV:\r
-                        USBFS_currentTD.count = USBFS_DEVICE_STATUS_LENGTH;\r
-                        USBFS_tBuffer[0u] = USBFS_deviceStatus;\r
-                        USBFS_tBuffer[1u] = 0u;\r
-                        USBFS_currentTD.pData = &USBFS_tBuffer[0u];\r
-                        requestHandled  = USBFS_InitControlRead();\r
-                        break;\r
-                    default:    /* requestHandled is initialized as FALSE by default */\r
-                        break;\r
-                }\r
-                break;\r
-            case USBFS_GET_CONFIGURATION:\r
-                USBFS_currentTD.count = 1u;\r
-                USBFS_currentTD.pData = (volatile uint8 *)&USBFS_configuration;\r
-                requestHandled  = USBFS_InitControlRead();\r
-                break;\r
-            case USBFS_GET_INTERFACE:\r
-                USBFS_currentTD.count = 1u;\r
-                USBFS_currentTD.pData = (volatile uint8 *)&USBFS_interfaceSetting[ \\r
-                                                                            CY_GET_REG8(USBFS_wIndexLo)];\r
-                requestHandled  = USBFS_InitControlRead();\r
-                break;\r
-            default: /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    else {\r
-        /* Control Write */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_SET_ADDRESS:\r
-                USBFS_deviceAddress = CY_GET_REG8(USBFS_wValueLo);\r
-                requestHandled = USBFS_InitNoDataControlTransfer();\r
-                break;\r
-            case USBFS_SET_CONFIGURATION:\r
-                USBFS_configuration = CY_GET_REG8(USBFS_wValueLo);\r
-                USBFS_configurationChanged = USBFS_TRUE;\r
-                USBFS_Config(USBFS_TRUE);\r
-                requestHandled = USBFS_InitNoDataControlTransfer();\r
-                break;\r
-            case USBFS_SET_INTERFACE:\r
-                if (USBFS_ValidateAlternateSetting() != 0u)\r
-                {\r
-                    interfaceNumber = CY_GET_REG8(USBFS_wIndexLo);\r
-                    USBFS_interfaceNumber = interfaceNumber;\r
-                    USBFS_configurationChanged = USBFS_TRUE;\r
-                    #if ((USBFS_EP_MA == USBFS__MA_DYNAMIC) && \\r
-                         (USBFS_EP_MM == USBFS__EP_MANUAL) )\r
-                        USBFS_Config(USBFS_FALSE);\r
-                    #else\r
-                        USBFS_ConfigAltChanged();\r
-                    #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */\r
-                    /* Update handled Alt setting changes status */\r
-                    USBFS_interfaceSetting_last[interfaceNumber] =\r
-                         USBFS_interfaceSetting[interfaceNumber];\r
-                    requestHandled = USBFS_InitNoDataControlTransfer();\r
-                }\r
-                break;\r
-            case USBFS_CLEAR_FEATURE:\r
-                switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
-                {\r
-                    case USBFS_RQST_RCPT_EP:\r
-                        if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
-                        {\r
-                            requestHandled = USBFS_ClearEndpointHalt();\r
-                        }\r
-                        break;\r
-                    case USBFS_RQST_RCPT_DEV:\r
-                        /* Clear device REMOTE_WAKEUP */\r
-                        if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
-                        {\r
-                            USBFS_deviceStatus &= (uint8)~USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
-                            requestHandled = USBFS_InitNoDataControlTransfer();\r
-                        }\r
-                        break;\r
-                    case USBFS_RQST_RCPT_IFC:\r
-                        /* Validate interfaceNumber */\r
-                        if (CY_GET_REG8(USBFS_wIndexLo) < USBFS_MAX_INTERFACES_NUMBER)\r
-                        {\r
-                            USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
-                                                                (uint8)~(CY_GET_REG8(USBFS_wValueLo));\r
-                            requestHandled = USBFS_InitNoDataControlTransfer();\r
-                        }\r
-                        break;\r
-                    default:    /* requestHandled is initialized as FALSE by default */\r
-                        break;\r
-                }\r
-                break;\r
-            case USBFS_SET_FEATURE:\r
-                switch (CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_RCPT_MASK)\r
-                {\r
-                    case USBFS_RQST_RCPT_EP:\r
-                        if (CY_GET_REG8(USBFS_wValueLo) == USBFS_ENDPOINT_HALT)\r
-                        {\r
-                            requestHandled = USBFS_SetEndpointHalt();\r
-                        }\r
-                        break;\r
-                    case USBFS_RQST_RCPT_DEV:\r
-                        /* Set device REMOTE_WAKEUP */\r
-                        if (CY_GET_REG8(USBFS_wValueLo) == USBFS_DEVICE_REMOTE_WAKEUP)\r
-                        {\r
-                            USBFS_deviceStatus |= USBFS_DEVICE_STATUS_REMOTE_WAKEUP;\r
-                            requestHandled = USBFS_InitNoDataControlTransfer();\r
-                        }\r
-                        break;\r
-                    case USBFS_RQST_RCPT_IFC:\r
-                        /* Validate interfaceNumber */\r
-                        if (CY_GET_REG8(USBFS_wIndexLo) < USBFS_MAX_INTERFACES_NUMBER)\r
-                        {\r
-                            USBFS_interfaceStatus[CY_GET_REG8(USBFS_wIndexLo)] &=\r
-                                                                (uint8)~(CY_GET_REG8(USBFS_wValueLo));\r
-                            requestHandled = USBFS_InitNoDataControlTransfer();\r
-                        }\r
-                        break;\r
-                    default:    /* requestHandled is initialized as FALSE by default */\r
-                        break;\r
-                }\r
-                break;\r
-            default:    /* requestHandled is initialized as FALSE by default */\r
-                break;\r
-        }\r
-    }\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-#if defined(USBFS_ENABLE_IDSN_STRING)\r
-\r
-    /***************************************************************************\r
-    * Function Name: USBFS_ReadDieID\r
-    ****************************************************************************\r
-    *\r
-    * Summary:\r
-    *  This routine read Die ID and generate Serial Number string descriptor.\r
-    *\r
-    * Parameters:\r
-    *  descr:  pointer on string descriptor.\r
-    *\r
-    * Return:\r
-    *  None.\r
-    *\r
-    * Reentrant:\r
-    *  No.\r
-    *\r
-    ***************************************************************************/\r
-    void USBFS_ReadDieID(uint8 descr[]) \r
-    {\r
-        uint8 i;\r
-        uint8 j = 0u;\r
-        uint8 value;\r
-        const char8 CYCODE hex[16u] = "0123456789ABCDEF";\r
-\r
-\r
-        /* Check descriptor validation */\r
-        if( descr != NULL)\r
-        {\r
-            descr[0u] = USBFS_IDSN_DESCR_LENGTH;\r
-            descr[1u] = USBFS_DESCR_STRING;\r
-\r
-            /* fill descriptor */\r
-            for(i = 2u; i < USBFS_IDSN_DESCR_LENGTH; i += 4u)\r
-            {\r
-                value = CY_GET_XTND_REG8((void CYFAR *)(USBFS_DIE_ID + j));\r
-                j++;\r
-                descr[i] = (uint8)hex[value >> 4u];\r
-                descr[i + 2u] = (uint8)hex[value & 0x0Fu];\r
-            }\r
-        }\r
-    }\r
-\r
-#endif /* End USBFS_ENABLE_IDSN_STRING */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ConfigReg\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine configures hardware registers from the variables.\r
-*  It is called from USBFS_Config() function and from RestoreConfig\r
-*  after Wakeup.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ConfigReg(void) \r
-{\r
-    uint8 ep;\r
-    uint8 i;\r
-    #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-        uint8 ep_type = 0u;\r
-    #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-\r
-    /* Set the endpoint buffer addresses */\r
-    ep = USBFS_EP1;\r
-    for (i = 0u; i < 0x80u; i+= 0x10u)\r
-    {\r
-        CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_CFG_IND + i), USBFS_ARB_EPX_CFG_CRC_BYPASS |\r
-                                                          USBFS_ARB_EPX_CFG_RESET);\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_MANUAL)\r
-            /* Enable all Arbiter EP Interrupts : err, buf under, buf over, dma gnt(mode2 only), in buf full */\r
-            CY_SET_REG8((reg8 *)(USBFS_ARB_EP1_INT_EN_IND + i), USBFS_ARB_EPX_INT_MASK);\r
-        #endif   /* End USBFS_EP_MM != USBFS__EP_MANUAL */\r
-\r
-        if(USBFS_EP[ep].epMode != USBFS_MODE_DISABLE)\r
-        {\r
-            if((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u )\r
-            {\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_NAK_IN);\r
-            }\r
-            else\r
-            {\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_NAK_OUT);\r
-                /* Prepare EP type mask for automatic memory allocation */\r
-                #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-                    ep_type |= (uint8)(0x01u << (ep - USBFS_EP1));\r
-                #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-            }\r
-        }\r
-        else\r
-        {\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + i), USBFS_MODE_STALL_DATA_EP);\r
-        }\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + i),   USBFS_EP[ep].bufferSize >> 8u);\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + i),   USBFS_EP[ep].bufferSize & 0xFFu);\r
-\r
-            CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
-            CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
-            CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + i),     USBFS_EP[ep].buffOffset & 0xFFu);\r
-            CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + i), USBFS_EP[ep].buffOffset >> 8u);\r
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-        ep++;\r
-    }\r
-\r
-    #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-         /* BUF_SIZE depend on DMA_THRESS value: 55-32 bytes  44-16 bytes 33-8 bytes 22-4 bytes 11-2 bytes */\r
-        USBFS_BUF_SIZE_REG = USBFS_DMA_BUF_SIZE;\r
-        USBFS_DMA_THRES_REG = USBFS_DMA_BYTES_PER_BURST;   /* DMA burst threshold */\r
-        USBFS_DMA_THRES_MSB_REG = 0u;\r
-        USBFS_EP_ACTIVE_REG = USBFS_ARB_INT_MASK;\r
-        USBFS_EP_TYPE_REG = ep_type;\r
-        /* Cfg_cmp bit set to 1 once configuration is complete. */\r
-        USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM |\r
-                                       USBFS_ARB_CFG_CFG_CPM;\r
-        /* Cfg_cmp bit set to 0 during configuration of PFSUSB Registers. */\r
-        USBFS_ARB_CFG_REG = USBFS_ARB_CFG_AUTO_DMA | USBFS_ARB_CFG_AUTO_MEM;\r
-    #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-\r
-    CY_SET_REG8(USBFS_SIE_EP_INT_EN_PTR, 0xFFu);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_Config\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine configures endpoints for the entire configuration by scanning\r
-*  the configuration descriptor.\r
-*\r
-* Parameters:\r
-*  clearAltSetting: It configures the bAlternateSetting 0 for each interface.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* USBFS_interfaceClass - Initialized class array for each interface.\r
-*   It is used for handling Class specific requests depend on interface class.\r
-*   Different classes in multiple Alternate settings does not supported.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_Config(uint8 clearAltSetting) \r
-{\r
-    uint8 ep;\r
-    uint8 cur_ep;\r
-    uint8 i;\r
-    uint8 ep_type;\r
-    const uint8 *pDescr;\r
-    #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-        uint16 buffCount = 0u;\r
-    #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    const T_USBFS_EP_SETTINGS_BLOCK CYCODE *pEP;\r
-\r
-    /* Clear all of the endpoints */\r
-    for (ep = 0u; ep < USBFS_MAX_EP; ep++)\r
-    {\r
-        USBFS_EP[ep].attrib = 0u;\r
-        USBFS_EP[ep].hwEpState = 0u;\r
-        USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
-        USBFS_EP[ep].epToggle = 0u;\r
-        USBFS_EP[ep].epMode = USBFS_MODE_DISABLE;\r
-        USBFS_EP[ep].bufferSize = 0u;\r
-        USBFS_EP[ep].interface = 0u;\r
-\r
-    }\r
-\r
-    /* Clear Alternate settings for all interfaces */\r
-    if(clearAltSetting != 0u)\r
-    {\r
-        for (i = 0u; i < USBFS_MAX_INTERFACES_NUMBER; i++)\r
-        {\r
-            USBFS_interfaceSetting[i] = 0x00u;\r
-            USBFS_interfaceSetting_last[i] = 0x00u;\r
-        }\r
-    }\r
-\r
-    /* Init Endpoints and Device Status if configured */\r
-    if(USBFS_configuration > 0u)\r
-    {\r
-        pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-        /* Set Power status for current configuration */\r
-        pDescr = (const uint8 *)pTmp->p_list;\r
-        if((pDescr[USBFS_CONFIG_DESCR_ATTRIB] & USBFS_CONFIG_DESCR_ATTRIB_SELF_POWERED) != 0u)\r
-        {\r
-            USBFS_deviceStatus |=  USBFS_DEVICE_STATUS_SELF_POWERED;\r
-        }\r
-        else\r
-        {\r
-            USBFS_deviceStatus &=  (uint8)~USBFS_DEVICE_STATUS_SELF_POWERED;\r
-        }\r
-        /* Move to next element */\r
-        pTmp = &pTmp[1u];\r
-        ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
-\r
-        #if ((USBFS_EP_MA == USBFS__MA_DYNAMIC) && \\r
-             (USBFS_EP_MM == USBFS__EP_MANUAL) )\r
-            /* Configure for dynamic EP memory allocation */\r
-            /* p_list points the endpoint setting table. */\r
-            pEP = (T_USBFS_EP_SETTINGS_BLOCK *) pTmp->p_list;\r
-            for (i = 0u; i < ep; i++)\r
-            {\r
-                /* Compare current Alternate setting with EP Alt*/\r
-                if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)\r
-                {\r
-                    cur_ep = pEP->addr & USBFS_DIR_UNUSED;\r
-                    ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
-                    if (pEP->addr & USBFS_DIR_IN)\r
-                    {\r
-                        /* IN Endpoint */\r
-                        USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
-                        USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                        USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
-                        #if defined(USBFS_ENABLE_CDC_CLASS)\r
-                            if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
-                                (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
-                                (ep_type != USBFS_EP_TYPE_INT))\r
-                            {\r
-                                USBFS_cdc_data_in_ep = cur_ep;\r
-                            }\r
-                        #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-                        #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
-                                             (USBFS_MIDI_IN_BUFF_SIZE > 0) )\r
-                            if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
-                               (ep_type == USBFS_EP_TYPE_BULK))\r
-                            {\r
-                                USBFS_midi_in_ep = cur_ep;\r
-                            }\r
-                        #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-                    }\r
-                    else\r
-                    {\r
-                        /* OUT Endpoint */\r
-                        USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
-                        USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                    USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
-                        #if defined(USBFS_ENABLE_CDC_CLASS)\r
-                            if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
-                                (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
-                                (ep_type != USBFS_EP_TYPE_INT))\r
-                            {\r
-                                USBFS_cdc_data_out_ep = cur_ep;\r
-                            }\r
-                        #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-                        #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
-                                     (USBFS_MIDI_OUT_BUFF_SIZE > 0) )\r
-                            if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
-                               (ep_type == USBFS_EP_TYPE_BULK))\r
-                            {\r
-                                USBFS_midi_out_ep = cur_ep;\r
-                            }\r
-                        #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-                    }\r
-                    USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
-                    USBFS_EP[cur_ep].addr = pEP->addr;\r
-                    USBFS_EP[cur_ep].attrib = pEP->attributes;\r
-                }\r
-                pEP = &pEP[1u];\r
-            }\r
-        #else /* Config for static EP memory allocation  */\r
-            for (i = USBFS_EP1; i < USBFS_MAX_EP; i++)\r
-            {\r
-                /* p_list points the endpoint setting table. */\r
-                pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
-                /* Find max length for each EP and select it (length could be different in different Alt settings) */\r
-                /* but other settings should be correct with regards to Interface alt Setting */\r
-                for (cur_ep = 0u; cur_ep < ep; cur_ep++)\r
-                {\r
-                    /* EP count is equal to EP # in table and we found larger EP length than have before*/\r
-                    if(i == (pEP->addr & USBFS_DIR_UNUSED))\r
-                    {\r
-                        if(USBFS_EP[i].bufferSize < pEP->bufferSize)\r
-                        {\r
-                            USBFS_EP[i].bufferSize = pEP->bufferSize;\r
-                        }\r
-                        /* Compare current Alternate setting with EP Alt*/\r
-                        if(USBFS_interfaceSetting[pEP->interface] == pEP->altSetting)\r
-                        {\r
-                            ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
-                            if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
-                            {\r
-                                /* IN Endpoint */\r
-                                USBFS_EP[i].apiEpState = USBFS_EVENT_PENDING;\r
-                                USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                        USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
-                                /* Find and init CDC IN endpoint number */\r
-                                #if defined(USBFS_ENABLE_CDC_CLASS)\r
-                                    if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
-                                        (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
-                                        (ep_type != USBFS_EP_TYPE_INT))\r
-                                    {\r
-                                        USBFS_cdc_data_in_ep = i;\r
-                                    }\r
-                                #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-                                #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
-                                             (USBFS_MIDI_IN_BUFF_SIZE > 0) )\r
-                                    if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
-                                       (ep_type == USBFS_EP_TYPE_BULK))\r
-                                    {\r
-                                        USBFS_midi_in_ep = i;\r
-                                    }\r
-                                #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-                            }\r
-                            else\r
-                            {\r
-                                /* OUT Endpoint */\r
-                                USBFS_EP[i].apiEpState = USBFS_NO_EVENT_PENDING;\r
-                                USBFS_EP[i].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                    USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
-                                /* Find and init CDC IN endpoint number */\r
-                                #if defined(USBFS_ENABLE_CDC_CLASS)\r
-                                    if(((pEP->bMisc == USBFS_CLASS_CDC_DATA) ||\r
-                                        (pEP->bMisc == USBFS_CLASS_CDC)) &&\r
-                                        (ep_type != USBFS_EP_TYPE_INT))\r
-                                    {\r
-                                        USBFS_cdc_data_out_ep = i;\r
-                                    }\r
-                                #endif  /* End USBFS_ENABLE_CDC_CLASS*/\r
-                                #if ( defined(USBFS_ENABLE_MIDI_STREAMING) && \\r
-                                             (USBFS_MIDI_OUT_BUFF_SIZE > 0) )\r
-                                    if((pEP->bMisc == USBFS_CLASS_AUDIO) &&\r
-                                       (ep_type == USBFS_EP_TYPE_BULK))\r
-                                    {\r
-                                        USBFS_midi_out_ep = i;\r
-                                    }\r
-                                #endif  /* End USBFS_ENABLE_MIDI_STREAMING*/\r
-                            }\r
-                            USBFS_EP[i].addr = pEP->addr;\r
-                            USBFS_EP[i].attrib = pEP->attributes;\r
-\r
-                            #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-                                break;      /* use first EP setting in Auto memory managment */\r
-                            #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-                        }\r
-                    }\r
-                    pEP = &pEP[1u];\r
-                }\r
-            }\r
-        #endif /* End (USBFS_EP_MA == USBFS__MA_DYNAMIC) */\r
-\r
-        /* Init class array for each interface and interface number for each EP.\r
-        *  It is used for handling Class specific requests directed to either an\r
-        *  interface or the endpoint.\r
-        */\r
-        /* p_list points the endpoint setting table. */\r
-        pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
-        for (i = 0u; i < ep; i++)\r
-        {\r
-            /* Configure interface number for each EP*/\r
-            USBFS_EP[pEP->addr & USBFS_DIR_UNUSED].interface = pEP->interface;\r
-            pEP = &pEP[1u];\r
-        }\r
-        /* Init pointer on interface class table*/\r
-        USBFS_interfaceClass = USBFS_GetInterfaceClassTablePtr();\r
-        /* Set the endpoint buffer addresses */\r
-\r
-        #if(USBFS_EP_MM != USBFS__EP_DMAAUTO)\r
-            for (ep = USBFS_EP1; ep < USBFS_MAX_EP; ep++)\r
-            {\r
-                USBFS_EP[ep].buffOffset = buffCount;\r
-                 buffCount += USBFS_EP[ep].bufferSize;\r
-            }\r
-        #endif /* End USBFS_EP_MM != USBFS__EP_DMAAUTO */\r
-\r
-        /* Configure hardware registers */\r
-        USBFS_ConfigReg();\r
-    } /* USBFS_configuration > 0 */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ConfigAltChanged\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine update configuration for the required endpoints only.\r
-*  It is called after SET_INTERFACE request when Static memory allocation used.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_ConfigAltChanged(void) \r
-{\r
-    uint8 ep;\r
-    uint8 cur_ep;\r
-    uint8 i;\r
-    uint8 ep_type;\r
-    uint8 ri;\r
-\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    const T_USBFS_EP_SETTINGS_BLOCK CYCODE *pEP;\r
-\r
-\r
-    /* Init Endpoints and Device Status if configured */\r
-    if(USBFS_configuration > 0u)\r
-    {\r
-        pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-        pTmp = &pTmp[1u];\r
-        ep = pTmp->c;  /* For this table, c is the number of endpoints configurations  */\r
-\r
-        /* Do not touch EP which doesn't need reconfiguration */\r
-        /* When Alt setting changed, the only required endpoints need to be reconfigured */\r
-        /* p_list points the endpoint setting table. */\r
-        pEP = (const T_USBFS_EP_SETTINGS_BLOCK CYCODE *) pTmp->p_list;\r
-        for (i = 0u; i < ep; i++)\r
-        {\r
-            /*If Alt setting changed and new is same with EP Alt */\r
-            if((USBFS_interfaceSetting[pEP->interface] !=\r
-                USBFS_interfaceSetting_last[pEP->interface] ) &&\r
-               (USBFS_interfaceSetting[pEP->interface] == pEP->altSetting) &&\r
-               (pEP->interface == CY_GET_REG8(USBFS_wIndexLo)))\r
-            {\r
-                cur_ep = pEP->addr & USBFS_DIR_UNUSED;\r
-                ri = ((cur_ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-                ep_type = pEP->attributes & USBFS_EP_TYPE_MASK;\r
-                if ((pEP->addr & USBFS_DIR_IN) != 0u)\r
-                {\r
-                    /* IN Endpoint */\r
-                    USBFS_EP[cur_ep].apiEpState = USBFS_EVENT_PENDING;\r
-                    USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                USBFS_MODE_ISO_IN : USBFS_MODE_ACK_IN;\r
-                }\r
-                else\r
-                {\r
-                    /* OUT Endpoint */\r
-                    USBFS_EP[cur_ep].apiEpState = USBFS_NO_EVENT_PENDING;\r
-                    USBFS_EP[cur_ep].epMode = (ep_type == USBFS_EP_TYPE_ISOC) ?\r
-                                                USBFS_MODE_ISO_OUT : USBFS_MODE_ACK_OUT;\r
-                }\r
-                 /* Change the SIE mode for the selected EP to NAK ALL */\r
-                 CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN_OUT);\r
-                USBFS_EP[cur_ep].bufferSize = pEP->bufferSize;\r
-                USBFS_EP[cur_ep].addr = pEP->addr;\r
-                USBFS_EP[cur_ep].attrib = pEP->attributes;\r
-\r
-                /* Clear the data toggle */\r
-                USBFS_EP[cur_ep].epToggle = 0u;\r
-\r
-                /* Dynamic reconfiguration for mode 3 transfer */\r
-            #if(USBFS_EP_MM == USBFS__EP_DMAAUTO)\r
-                /* In_data_rdy for selected EP should be set to 0 */\r
-                * (reg8 *)(USBFS_ARB_EP1_CFG_IND + ri) &= (uint8)~USBFS_ARB_EPX_CFG_IN_DATA_RDY;\r
-\r
-                /* write the EP number for which reconfiguration is required */\r
-                USBFS_DYN_RECONFIG_REG = (cur_ep - USBFS_EP1) <<\r
-                                                    USBFS_DYN_RECONFIG_EP_SHIFT;\r
-                /* Set the dyn_config_en bit in dynamic reconfiguration register */\r
-                USBFS_DYN_RECONFIG_REG |= USBFS_DYN_RECONFIG_ENABLE;\r
-                /* wait for the dyn_config_rdy bit to set by the block,\r
-                *  this bit will be set to 1 when block is ready for reconfiguration.\r
-                */\r
-                while((USBFS_DYN_RECONFIG_REG & USBFS_DYN_RECONFIG_RDY_STS) == 0u)\r
-                {\r
-                    ;\r
-                }\r
-                /* Once dyn_config_rdy bit is set, FW can change the EP configuration. */\r
-                /* Change EP Type with new direction */\r
-                if((pEP->addr & USBFS_DIR_IN) == 0u)\r
-                {\r
-                    USBFS_EP_TYPE_REG |= (uint8)(0x01u << (cur_ep - USBFS_EP1));\r
-                }\r
-                else\r
-                {\r
-                    USBFS_EP_TYPE_REG &= (uint8)~(uint8)(0x01u << (cur_ep - USBFS_EP1));\r
-                }\r
-                /* dynamic reconfiguration enable bit cleared, pointers and control/status\r
-                *  signals for the selected EP is cleared/re-initialized on negative edge\r
-                *  of dynamic reconfiguration enable bit).\r
-                */\r
-                USBFS_DYN_RECONFIG_REG &= (uint8)~USBFS_DYN_RECONFIG_ENABLE;\r
-                /* The main loop has to re-enable DMA and OUT endpoint*/\r
-            #else\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri),\r
-                                                                USBFS_EP[cur_ep].bufferSize >> 8u);\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT1_IND + ri),\r
-                                                                USBFS_EP[cur_ep].bufferSize & 0xFFu);\r
-                CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_IND + ri),\r
-                                                                USBFS_EP[cur_ep].buffOffset & 0xFFu);\r
-                CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_RA_MSB_IND + ri),\r
-                                                                USBFS_EP[cur_ep].buffOffset >> 8u);\r
-                CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_IND + ri),\r
-                                                                USBFS_EP[cur_ep].buffOffset & 0xFFu);\r
-                CY_SET_REG8((reg8 *)(USBFS_ARB_RW1_WA_MSB_IND + ri),\r
-                                                                USBFS_EP[cur_ep].buffOffset >> 8u);\r
-            #endif /* End USBFS_EP_MM == USBFS__EP_DMAAUTO */\r
-            }\r
-            /* Get next EP element */\r
-            pEP = &pEP[1u];\r
-        }\r
-    }   /* USBFS_configuration > 0 */\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetConfigTablePtr\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine returns a pointer a configuration table entry\r
-*\r
-* Parameters:\r
-*  c:  Configuration Index\r
-*\r
-* Return:\r
-*  Device Descriptor pointer.\r
-*\r
-*******************************************************************************/\r
-const T_USBFS_LUT CYCODE *USBFS_GetConfigTablePtr(uint8 c)\r
-                                                        \r
-{\r
-    /* Device Table */\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-\r
-    pTmp = (const T_USBFS_LUT CYCODE *) USBFS_TABLE[USBFS_device].p_list;\r
-\r
-    /* The first entry points to the Device Descriptor,\r
-    *  the rest configuration entries.\r
-       */\r
-    return( (const T_USBFS_LUT CYCODE *) pTmp[c + 1u].p_list );\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_GetDeviceTablePtr\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine returns a pointer to the Device table\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  Device Table pointer\r
-*\r
-*******************************************************************************/\r
-const T_USBFS_LUT CYCODE *USBFS_GetDeviceTablePtr(void)\r
-                                                            \r
-{\r
-    /* Device Table */\r
-    return( (const T_USBFS_LUT CYCODE *) USBFS_TABLE[USBFS_device].p_list );\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USB_GetInterfaceClassTablePtr\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine returns Interface Class table pointer, which contains\r
-*  the relation between interface number and interface class.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  Interface Class table pointer.\r
-*\r
-*******************************************************************************/\r
-const uint8 CYCODE *USBFS_GetInterfaceClassTablePtr(void)\r
-                                                        \r
-{\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    uint8 currentInterfacesNum;\r
-\r
-    pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-    currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];\r
-    /* Third entry in the LUT starts the Interface Table pointers */\r
-    /* The INTERFACE_CLASS table is located after all interfaces */\r
-    pTmp = &pTmp[currentInterfacesNum + 2u];\r
-    return( (const uint8 CYCODE *) pTmp->p_list );\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_TerminateEP\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function terminates the specified USBFS endpoint.\r
-*  This function should be used before endpoint reconfiguration.\r
-*\r
-* Parameters:\r
-*  Endpoint number.\r
-*\r
-* Return:\r
-*  None.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-void USBFS_TerminateEP(uint8 ep) \r
-{\r
-    uint8 ri;\r
-\r
-    ep &= USBFS_DIR_UNUSED;\r
-    ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-\r
-    if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
-    {\r
-        /* Set the endpoint Halt */\r
-        USBFS_EP[ep].hwEpState |= (USBFS_ENDPOINT_STATUS_HALT);\r
-\r
-        /* Clear the data toggle */\r
-        USBFS_EP[ep].epToggle = 0u;\r
-        USBFS_EP[ep].apiEpState = USBFS_NO_EVENT_ALLOWED;\r
-\r
-        if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
-        {\r
-            /* IN Endpoint */\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN);\r
-        }\r
-        else\r
-        {\r
-            /* OUT Endpoint */\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
-        }\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_SetEndpointHalt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine handles set endpoint halt.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_SetEndpointHalt(void) \r
-{\r
-    uint8 ep;\r
-    uint8 ri;\r
-    uint8 requestHandled = USBFS_FALSE;\r
-\r
-    /* Set endpoint halt */\r
-    ep = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;\r
-    ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-\r
-    if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
-    {\r
-        /* Set the endpoint Halt */\r
-        USBFS_EP[ep].hwEpState |= (USBFS_ENDPOINT_STATUS_HALT);\r
-\r
-        /* Clear the data toggle */\r
-        USBFS_EP[ep].epToggle = 0u;\r
-        USBFS_EP[ep].apiEpState |= USBFS_NO_EVENT_ALLOWED;\r
-\r
-        if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
-        {\r
-            /* IN Endpoint */\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_STALL_DATA_EP |\r
-                                                               USBFS_MODE_ACK_IN);\r
-        }\r
-        else\r
-        {\r
-            /* OUT Endpoint */\r
-            CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_STALL_DATA_EP |\r
-                                                               USBFS_MODE_ACK_OUT);\r
-        }\r
-        requestHandled = USBFS_InitNoDataControlTransfer();\r
-    }\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ClearEndpointHalt\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine handles clear endpoint halt.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_ClearEndpointHalt(void) \r
-{\r
-    uint8 ep;\r
-    uint8 ri;\r
-    uint8 requestHandled = USBFS_FALSE;\r
-\r
-    /* Clear endpoint halt */\r
-    ep = CY_GET_REG8(USBFS_wIndexLo) & USBFS_DIR_UNUSED;\r
-    ri = ((ep - USBFS_EP1) << USBFS_EPX_CNTX_ADDR_SHIFT);\r
-\r
-    if ((ep > USBFS_EP0) && (ep < USBFS_MAX_EP))\r
-    {\r
-        /* Clear the endpoint Halt */\r
-        USBFS_EP[ep].hwEpState &= (uint8)~(USBFS_ENDPOINT_STATUS_HALT);\r
-\r
-        /* Clear the data toggle */\r
-        USBFS_EP[ep].epToggle = 0u;\r
-        /* Clear toggle bit for already armed packet */\r
-        CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri), CY_GET_REG8(\r
-                    (reg8 *)(USBFS_SIE_EP1_CNT0_IND + ri)) & (uint8)~USBFS_EPX_CNT_DATA_TOGGLE);\r
-        /* Return API State as it was defined before */\r
-        USBFS_EP[ep].apiEpState &= (uint8)~USBFS_NO_EVENT_ALLOWED;\r
-\r
-        if ((USBFS_EP[ep].addr & USBFS_DIR_IN) != 0u)\r
-        {\r
-            /* IN Endpoint */\r
-            if(USBFS_EP[ep].apiEpState == USBFS_IN_BUFFER_EMPTY)\r
-            {       /* Wait for next packet from application */\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_IN);\r
-            }\r
-            else    /* Continue armed transfer */\r
-            {\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_ACK_IN);\r
-            }\r
-        }\r
-        else\r
-        {\r
-            /* OUT Endpoint */\r
-            if(USBFS_EP[ep].apiEpState == USBFS_OUT_BUFFER_FULL)\r
-            {       /* Allow application to read full buffer */\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_NAK_OUT);\r
-            }\r
-            else    /* Mark endpoint as empty, so it will be reloaded */\r
-            {\r
-                CY_SET_REG8((reg8 *)(USBFS_SIE_EP1_CR0_IND + ri), USBFS_MODE_ACK_OUT);\r
-            }\r
-        }\r
-        requestHandled = USBFS_InitNoDataControlTransfer();\r
-    }\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_ValidateAlternateSetting\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Validates (and records) a SET INTERFACE request.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_ValidateAlternateSetting(void) \r
-{\r
-    uint8 requestHandled = USBFS_TRUE;\r
-    uint8 interfaceNum;\r
-    const T_USBFS_LUT CYCODE *pTmp;\r
-    uint8 currentInterfacesNum;\r
-\r
-    interfaceNum = CY_GET_REG8(USBFS_wIndexLo);\r
-    /* Validate interface setting, stall if invalid. */\r
-    pTmp = USBFS_GetConfigTablePtr(USBFS_configuration - 1u);\r
-    currentInterfacesNum  = ((const uint8 *) pTmp->p_list)[USBFS_CONFIG_DESCR_NUM_INTERFACES];\r
-\r
-    if((interfaceNum >= currentInterfacesNum) || (interfaceNum >= USBFS_MAX_INTERFACES_NUMBER))\r
-    {   /* Wrong interface number */\r
-        requestHandled = USBFS_FALSE;\r
-    }\r
-    else\r
-    {\r
-        /* Save current Alt setting to find out the difference in Config() function */\r
-        USBFS_interfaceSetting_last[interfaceNum] = USBFS_interfaceSetting[interfaceNum];\r
-        USBFS_interfaceSetting[interfaceNum] = CY_GET_REG8(USBFS_wValueLo);\r
-    }\r
-\r
-    return (requestHandled);\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_vnd.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_vnd.c
deleted file mode 100755 (executable)
index 15b68a5..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USBFS_vnd.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*******************************************************************************\r
-* File Name: USBFS_vnd.c\r
-* Version 2.60\r
-*\r
-* Description:\r
-*  USB vendor request handler.\r
-*\r
-* Note:\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "USBFS.h"\r
-#include "USBFS_pvt.h"\r
-\r
-#if(USBFS_EXTERN_VND == USBFS_FALSE)\r
-\r
-\r
-/***************************************\r
-* Vendor Specific Declarations\r
-***************************************/\r
-\r
-/* `#START VENDOR_SPECIFIC_DECLARATIONS` Place your declaration here */\r
-\r
-/* `#END` */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: USBFS_HandleVendorRqst\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This routine provide users with a method to implement vendor specifc\r
-*  requests.\r
-*\r
-*  To implement vendor specific requests, add your code in this function to\r
-*  decode and disposition the request.  If the request is handled, your code\r
-*  must set the variable "requestHandled" to TRUE, indicating that the\r
-*  request has been handled.\r
-*\r
-* Parameters:\r
-*  None.\r
-*\r
-* Return:\r
-*  requestHandled.\r
-*\r
-* Reentrant:\r
-*  No.\r
-*\r
-*******************************************************************************/\r
-uint8 USBFS_HandleVendorRqst(void) \r
-{\r
-    uint8 requestHandled = USBFS_FALSE;\r
-\r
-    if ((CY_GET_REG8(USBFS_bmRequestType) & USBFS_RQST_DIR_MASK) == USBFS_RQST_DIR_D2H)\r
-    {\r
-        /* Control Read */\r
-        switch (CY_GET_REG8(USBFS_bRequest))\r
-        {\r
-            case USBFS_GET_EXTENDED_CONFIG_DESCRIPTOR:\r
-                #if defined(USBFS_ENABLE_MSOS_STRING)\r
-                    USBFS_currentTD.pData = (volatile uint8 *)&USBFS_MSOS_CONFIGURATION_DESCR[0u];\r
-                    USBFS_currentTD.count = USBFS_MSOS_CONFIGURATION_DESCR[0u];\r
-                    requestHandled  = USBFS_InitControlRead();\r
-                #endif /* End USBFS_ENABLE_MSOS_STRING */\r
-                break;\r
-            default:\r
-                break;\r
-        }\r
-    }\r
-\r
-    /* `#START VENDOR_SPECIFIC_CODE` Place your vendor specific request here */\r
-\r
-    /* `#END` */\r
-\r
-    return(requestHandled);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Additional user functions supporting Vendor Specific Requests\r
-********************************************************************************/\r
-\r
-/* `#START VENDOR_SPECIFIC_FUNCTIONS` Place any additional functions here */\r
-\r
-/* `#END` */\r
-\r
-\r
-#endif /* USBFS_EXTERN_VND */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.bvf b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.bvf
deleted file mode 100755 (executable)
index 9acffcd..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.bvf
+++ /dev/null
@@ -1,25 +0,0 @@
-\r
-----------------------------------------------------------------------\r
-\r
-Verifying bitstream.\r
-\r
------------------------------------------------------------------------\r
-\r
-\r
----------Mapping jacks.---------\r
-\r
-\r
----------Processing bitstream.---------\r
-\r
-Utilized "dsi_hv_a@[DSI=(0,1)][side=top]"\r
-Utilized "dsi_hv_b@[DSI=(1,1)][side=bottom]"\r
-Utilized "dsi_hc@[DSI=(0,2)][side=top]"\r
-Utilized "dsi_hc@[DSI=(1,5)][side=bottom]"\r
-\r
-\r
-----------------------------------------------------------------------\r
-\r
-Bitstream verification passed.\r
-\r
------------------------------------------------------------------------\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.ctl b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.ctl
deleted file mode 100755 (executable)
index 3e249a5..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.ctl
+++ /dev/null
@@ -1,9 +0,0 @@
--- ======================================================================\r
--- USB_Bootloader.ctl generated from USB_Bootloader\r
--- 03/22/2014 at 22:32\r
--- This file is auto generated. ANY EDITS YOU MAKE MAY BE LOST WHEN THIS FILE IS REGENERATED!!!\r
--- ======================================================================\r
-\r
--- PSoC3/5 Clock Editor\r
--- Directives Editor\r
--- Analog Device Editor\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cycdx b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cycdx
deleted file mode 100755 (executable)
index 8f6ac4e..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cycdx
+++ /dev/null
@@ -1,85 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>\r
-<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">\r
-  <block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-  <block name="SD_PULLUP" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-  <block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-  <block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true">\r
-    <block name="bus_reset" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="ep_0" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="arb_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="USB" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="sof_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="ep_1" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="dp_int" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="Clock_vbus" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="Dp" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="ep_2" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <block name="Dm" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-    <register name="USBFS_PM_USB_CR0" address="0x40004394" bitWidth="8" desc="USB Power Mode Control Register 0">\r
-      <field name="fsusbio_ref_en" from="0" to="0" access="RW" resetVal="" desc="" />\r
-      <field name="fsusbio_pd_n" from="1" to="1" access="RW" resetVal="" desc="" />\r
-      <field name="fsusbio_pd_pullup_n" from="2" to="2" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_PM_ACT_CFG" address="0x400043A5" bitWidth="8" desc="Active Power Mode Configuration Register" />\r
-    <register name="USBFS_PM_STBY_CFG" address="0x400043B5" bitWidth="8" desc="Standby Power Mode Configuration Register" />\r
-    <register name="USBFS_PRT.PS" address="0x400051F1" bitWidth="8" desc="Port Pin State Register">\r
-      <field name="PinState_DP" from="6" to="6" access="R" resetVal="" desc="" />\r
-      <field name="PinState_DM" from="7" to="7" access="R" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_PRT_DM0" address="0x400051F2" bitWidth="8" desc="Port Drive Mode Register">\r
-      <field name="DriveMode_DP" from="6" to="6" access="RW" resetVal="" desc="" />\r
-      <field name="DriveMode_DM" from="7" to="7" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_PRT_DM1" address="0x400051F3" bitWidth="8" desc="Port Drive Mode Register">\r
-      <field name="PullUp_en_DP" from="6" to="6" access="RW" resetVal="" desc="" />\r
-      <field name="PullUp_en_DM" from="7" to="7" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_PRT.INP_DIS" address="0x400051F8" bitWidth="8" desc="Input buffer disable override">\r
-      <field name="seinput_dis_dp" from="6" to="6" access="RW" resetVal="" desc="" />\r
-      <field name="seinput_dis_dm" from="7" to="7" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_EP0_DR0" address="0x40006000" bitWidth="8" desc="bmRequestType" />\r
-    <register name="USBFS_EP0_DR1" address="0x40006001" bitWidth="8" desc="bRequest" />\r
-    <register name="USBFS_EP0_DR2" address="0x40006002" bitWidth="8" desc="wValueLo" />\r
-    <register name="USBFS_EP0_DR3" address="0x40006003" bitWidth="8" desc="wValueHi" />\r
-    <register name="USBFS_EP0_DR4" address="0x40006004" bitWidth="8" desc="wIndexLo" />\r
-    <register name="USBFS_EP0_DR5" address="0x40006005" bitWidth="8" desc="wIndexHi" />\r
-    <register name="USBFS_EP0_DR6" address="0x40006006" bitWidth="8" desc="lengthLo" />\r
-    <register name="USBFS_EP0_DR7" address="0x40006007" bitWidth="8" desc="lengthHi" />\r
-    <register name="USBFS_CR0" address="0x40006008" bitWidth="8" desc="USB Control Register 0">\r
-      <field name="device_address" from="0" to="6" access="R" resetVal="" desc="" />\r
-      <field name="usb_enable" from="7" to="7" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_CR1" address="0x40006009" bitWidth="8" desc="USB Control Register 1">\r
-      <field name="reg_enable" from="0" to="0" access="RW" resetVal="" desc="" />\r
-      <field name="enable_lock" from="1" to="1" access="RW" resetVal="" desc="" />\r
-      <field name="bus_activity" from="2" to="2" access="RW" resetVal="" desc="" />\r
-      <field name="trim_offset_msb" from="3" to="3" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_SIE_EP1_CR0" address="0x4000600E" bitWidth="8" desc="The Endpoint1 Control Register" />\r
-    <register name="USBFS_USBIO_CR0" address="0x40006010" bitWidth="8" desc="USBIO Control Register 0">\r
-      <field name="rd" from="0" to="0" access="R" resetVal="" desc="" />\r
-      <field name="td" from="5" to="5" access="RW" resetVal="" desc="" />\r
-      <field name="tse0" from="6" to="6" access="RW" resetVal="" desc="" />\r
-      <field name="ten" from="7" to="7" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_USBIO_CR1" address="0x40006012" bitWidth="8" desc="USBIO Control Register 1">\r
-      <field name="dmo" from="0" to="0" access="R" resetVal="" desc="" />\r
-      <field name="dpo" from="1" to="1" access="R" resetVal="" desc="" />\r
-      <field name="usbpuen" from="2" to="2" access="RW" resetVal="" desc="" />\r
-      <field name="iomode" from="5" to="5" access="RW" resetVal="" desc="" />\r
-    </register>\r
-    <register name="USBFS_SIE_EP2_CR0" address="0x4000601E" bitWidth="8" desc="The Endpoint2 Control Register" />\r
-    <register name="USBFS_SIE_EP3_CR0" address="0x4000602E" bitWidth="8" desc="The Endpoint3 Control Register" />\r
-    <register name="USBFS_SIE_EP4_CR0" address="0x4000603E" bitWidth="8" desc="The Endpoint4 Control Register" />\r
-    <register name="USBFS_SIE_EP5_CR0" address="0x4000604E" bitWidth="8" desc="The Endpoint5 Control Register" />\r
-    <register name="USBFS_SIE_EP6_CR0" address="0x4000605E" bitWidth="8" desc="The Endpoint6 Control Register" />\r
-    <register name="USBFS_SIE_EP7_CR0" address="0x4000606E" bitWidth="8" desc="The Endpoint7 Control Register" />\r
-    <register name="USBFS_SIE_EP8_CR0" address="0x4000607E" bitWidth="8" desc="The Endpoint8 Control Register" />\r
-    <register name="USBFS_BUF_SIZE" address="0x4000608C" bitWidth="8" desc="Dedicated Endpoint Buffer Size Register" />\r
-    <register name="USBFS_EP_ACTIVE" address="0x4000608E" bitWidth="8" desc="Endpoint Active Indication Register" />\r
-    <register name="USBFS_EP_TYPE" address="0x4000608F" bitWidth="8" desc="Endpoint Type (IN/OUT) Indication" />\r
-    <register name="USBFS_USB_CLK_EN" address="0x4000609D" bitWidth="8" desc="USB Block Clock Enable Register" />\r
-  </block>\r
-  <block name="BL" BASE="0x0" SIZE="0x0" desc="" visible="true" />\r
-</blockRegMap>
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cyfit b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cyfit
deleted file mode 100755 (executable)
index c3c2e90..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.cyfit and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.dsf b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.dsf
deleted file mode 100755 (executable)
index e69de29..0000000

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pci b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pci
deleted file mode 100755 (executable)
index abfbdf6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pci
+++ /dev/null
@@ -1,49 +0,0 @@
-# USB_Bootloader\r
-# 2014-03-22 12:32:51Z\r
-\r
-# IO_0@[IOP=(1)][IoId=(0)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 0\r
-# IO_1@[IOP=(1)][IoId=(1)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 1\r
-# IO_3@[IOP=(1)][IoId=(3)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 3\r
-dont_use_location comparatorcell -1 -1 1\r
-dont_use_location comparatorcell -1 -1 3\r
-dont_use_location sccell -1 -1 0\r
-dont_use_location sccell -1 -1 1\r
-dont_use_location sccell -1 -1 2\r
-dont_use_location sccell -1 -1 3\r
-dont_use_location vidaccell -1 -1 1\r
-dont_use_location vidaccell -1 -1 2\r
-dont_use_location vidaccell -1 -1 3\r
-dont_use_location sarcell -1 -1 1\r
-dont_use_location abufcell -1 -1 0\r
-dont_use_location abufcell -1 -1 2\r
-dont_use_location abufcell -1 -1 1\r
-dont_use_location abufcell -1 -1 3\r
-set_io "SCSI_Out(0)" iocell 4 3\r
-set_io "SCSI_Out(1)" iocell 4 2\r
-set_io "SCSI_Out(2)" iocell 0 7\r
-set_io "SCSI_Out(3)" iocell 0 6\r
-set_io "SCSI_Out(4)" iocell 0 5\r
-set_io "SCSI_Out(5)" iocell 0 4\r
-set_io "SCSI_Out(6)" iocell 0 3\r
-set_io "SCSI_Out(7)" iocell 0 2\r
-set_io "SCSI_Out(8)" iocell 0 1\r
-set_io "SCSI_Out(9)" iocell 0 0\r
-set_io "SCSI_Out_DBx(0)" iocell 6 3\r
-set_io "SCSI_Out_DBx(1)" iocell 6 2\r
-set_io "SCSI_Out_DBx(2)" iocell 6 1\r
-set_io "SCSI_Out_DBx(3)" iocell 6 0\r
-set_io "SCSI_Out_DBx(4)" iocell 4 7\r
-set_io "SCSI_Out_DBx(5)" iocell 4 6\r
-set_io "SCSI_Out_DBx(6)" iocell 4 5\r
-set_io "SCSI_Out_DBx(7)" iocell 4 4\r
-set_io "SD_PULLUP(0)" iocell 3 1\r
-set_io "SD_PULLUP(1)" iocell 3 2\r
-set_io "SD_PULLUP(2)" iocell 3 3\r
-set_io "SD_PULLUP(3)" iocell 3 4\r
-set_io "SD_PULLUP(4)" iocell 3 5\r
-set_io "\USBFS:Dm(0)\" iocell 15 7\r
-set_io "\USBFS:Dp(0)\" iocell 15 6\r
-set_location "\USBFS:USB\" usbcell -1 -1 0\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pco b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pco
deleted file mode 100755 (executable)
index e644852..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.pco
+++ /dev/null
@@ -1,58 +0,0 @@
-# USB_Bootloader\r
-# 2014-03-22 12:32:52Z\r
-\r
-# IO_0@[IOP=(1)][IoId=(0)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 0\r
-# IO_1@[IOP=(1)][IoId=(1)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 1\r
-# IO_3@[IOP=(1)][IoId=(3)] is reserved: SWDDebugEnabled\r
-dont_use_io iocell 1 3\r
-dont_use_location comparatorcell -1 -1 1\r
-dont_use_location comparatorcell -1 -1 3\r
-dont_use_location sccell -1 -1 0\r
-dont_use_location sccell -1 -1 1\r
-dont_use_location sccell -1 -1 2\r
-dont_use_location sccell -1 -1 3\r
-dont_use_location vidaccell -1 -1 1\r
-dont_use_location vidaccell -1 -1 2\r
-dont_use_location vidaccell -1 -1 3\r
-dont_use_location sarcell -1 -1 1\r
-dont_use_location abufcell -1 -1 0\r
-dont_use_location abufcell -1 -1 2\r
-dont_use_location abufcell -1 -1 1\r
-dont_use_location abufcell -1 -1 3\r
-set_location "ClockBlock" clockblockcell -1 -1 0\r
-set_io "SCSI_Out(0)" iocell 4 3\r
-set_io "SCSI_Out(1)" iocell 4 2\r
-set_io "SCSI_Out(2)" iocell 0 7\r
-set_io "SCSI_Out(3)" iocell 0 6\r
-set_io "SCSI_Out(4)" iocell 0 5\r
-set_io "SCSI_Out(5)" iocell 0 4\r
-set_io "SCSI_Out(6)" iocell 0 3\r
-set_io "SCSI_Out(7)" iocell 0 2\r
-set_io "SCSI_Out(8)" iocell 0 1\r
-set_io "SCSI_Out(9)" iocell 0 0\r
-set_io "SCSI_Out_DBx(0)" iocell 6 3\r
-set_io "SCSI_Out_DBx(1)" iocell 6 2\r
-set_io "SCSI_Out_DBx(2)" iocell 6 1\r
-set_io "SCSI_Out_DBx(3)" iocell 6 0\r
-set_io "SCSI_Out_DBx(4)" iocell 4 7\r
-set_io "SCSI_Out_DBx(5)" iocell 4 6\r
-set_io "SCSI_Out_DBx(6)" iocell 4 5\r
-set_io "SCSI_Out_DBx(7)" iocell 4 4\r
-set_io "SD_PULLUP(0)" iocell 3 1\r
-set_io "SD_PULLUP(1)" iocell 3 2\r
-set_io "SD_PULLUP(2)" iocell 3 3\r
-set_io "SD_PULLUP(3)" iocell 3 4\r
-set_io "SD_PULLUP(4)" iocell 3 5\r
-set_io "\USBFS:Dm(0)\" iocell 15 7\r
-set_io "\USBFS:Dp(0)\" iocell 15 6\r
-set_location "\USBFS:Dp\" logicalport -1 -1 15\r
-set_location "\USBFS:USB\" usbcell -1 -1 0\r
-set_location "\USBFS:arb_int\" interrupt -1 -1 22\r
-set_location "\USBFS:bus_reset\" interrupt -1 -1 23\r
-set_location "\USBFS:dp_int\" interrupt -1 -1 12\r
-set_location "\USBFS:ep_0\" interrupt -1 -1 24\r
-set_location "\USBFS:ep_1\" interrupt -1 -1 0\r
-set_location "\USBFS:ep_2\" interrupt -1 -1 1\r
-set_location "\USBFS:sof_int\" interrupt -1 -1 21\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.plc_log b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.plc_log
deleted file mode 100755 (executable)
index 1a2d4c9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.plc_log
+++ /dev/null
@@ -1,3 +0,0 @@
-I2659: No Constrained paths were found. The placer will run in non-timing driven mode.\r
-I2076: Total run-time: 1.2 sec.\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.route b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.route
deleted file mode 100755 (executable)
index c6f80c6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.route
+++ /dev/null
@@ -1,102 +0,0 @@
-net ClockBlock_BUS_CLK\r
-       term   ":clockblockcell.clk_bus_glb"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport3:pin1.in_clock"\r
-       term   ":ioport3:pin1.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport3:pin2.in_clock"\r
-       term   ":ioport3:pin2.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport3:pin3.in_clock"\r
-       term   ":ioport3:pin3.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport3:pin4.in_clock"\r
-       term   ":ioport3:pin4.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport3:pin5.in_clock"\r
-       term   ":ioport3:pin5.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:ioport15:pin6.in_clock"\r
-       term   ":ioport15:pin6.in_clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_22.clock"\r
-       term   ":interrupt_22.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_23.clock"\r
-       term   ":interrupt_23.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_12.clock"\r
-       term   ":interrupt_12.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_24.clock"\r
-       term   ":interrupt_24.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_0.clock"\r
-       term   ":interrupt_0.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_1.clock"\r
-       term   ":interrupt_1.clock"\r
-       switch ":clockblockcell.clk_bus_glb==>:interrupt_21.clock"\r
-       term   ":interrupt_21.clock"\r
-end ClockBlock_BUS_CLK\r
-net Net_40\r
-       term   ":usbcell.sof_int"\r
-       switch ":usbcell.sof_int==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v4+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v6"\r
-       switch "Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v4+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v6==>:interrupt_idmux_21.in_0"\r
-       switch ":interrupt_idmux_21.interrupt_idmux_21__out==>:interrupt_21.interrupt"\r
-       term   ":interrupt_21.interrupt"\r
-end Net_40\r
-net \USBFS:Net_1010\\r
-       term   ":logicalport_15.interrupt"\r
-       switch ":logicalport_15.interrupt==>Stub-:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v36+:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v38"\r
-       switch "Stub-:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v36+:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v38==>:interrupt_idmux_12.in_0"\r
-       switch ":interrupt_idmux_12.interrupt_idmux_12__out==>:interrupt_12.interrupt"\r
-       term   ":interrupt_12.interrupt"\r
-end \USBFS:Net_1010\\r
-net \USBFS:Net_79\\r
-       term   ":usbcell.arb_int"\r
-       switch ":usbcell.arb_int==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v25+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v27"\r
-       switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v25+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v27==>:interrupt_idmux_22.in_0"\r
-       switch ":interrupt_idmux_22.interrupt_idmux_22__out==>:interrupt_22.interrupt"\r
-       term   ":interrupt_22.interrupt"\r
-end \USBFS:Net_79\\r
-net \USBFS:Net_81\\r
-       term   ":usbcell.usb_int"\r
-       switch ":usbcell.usb_int==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v24+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v26"\r
-       switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v24+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v26==>:interrupt_idmux_23.in_0"\r
-       switch ":interrupt_idmux_23.interrupt_idmux_23__out==>:interrupt_23.interrupt"\r
-       term   ":interrupt_23.interrupt"\r
-end \USBFS:Net_81\\r
-net \USBFS:ept_int_0\\r
-       term   ":usbcell.ept_int_0"\r
-       switch ":usbcell.ept_int_0==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v5+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v7"\r
-       switch "Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v5+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v7==>:interrupt_idmux_24.in_0"\r
-       switch ":interrupt_idmux_24.interrupt_idmux_24__out==>:interrupt_24.interrupt"\r
-       term   ":interrupt_24.interrupt"\r
-end \USBFS:ept_int_0\\r
-net \USBFS:ept_int_1\\r
-       term   ":usbcell.ept_int_1"\r
-       switch ":usbcell.ept_int_1==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v10+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v8"\r
-       switch "OStub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v10+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v8"\r
-       switch ":dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:10,10"\r
-       switch ":hvswitch@[UDB=(0,1)][side=left]:23,10_f"\r
-       switch ":hvswitch@[UDB=(1,1)][side=left]:vseg_23_top_f"\r
-       switch ":hvswitch@[UDB=(2,1)][side=left]:vseg_23_top_f"\r
-       switch ":hvswitch@[UDB=(3,1)][side=left]:vseg_23_top_f"\r
-       switch ":hvswitch@[UDB=(3,1)][side=left]:23,95_b"\r
-       switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_95_f"\r
-       switch ":hvswitch@[UDB=(3,3)][side=left]:hseg_95_f"\r
-       switch ":hvswitch@[UDB=(3,4)][side=left]:hseg_95_f"\r
-       switch ":dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:48,95_f"\r
-       switch "IStub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v48+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v50"\r
-       switch "Stub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v48+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v50==>:interrupt_idmux_0.in_2"\r
-       switch ":interrupt_idmux_0.interrupt_idmux_0__out==>:interrupt_0.interrupt"\r
-       term   ":interrupt_0.interrupt"\r
-end \USBFS:ept_int_1\\r
-net \USBFS:ept_int_2\\r
-       term   ":usbcell.ept_int_2"\r
-       switch ":usbcell.ept_int_2==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v11+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v9"\r
-       switch "OStub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v11+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v9"\r
-       switch ":dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:9,90"\r
-       switch ":hvswitch@[UDB=(0,1)][side=left]:21,90_f"\r
-       switch ":hvswitch@[UDB=(1,1)][side=left]:vseg_21_top_f"\r
-       switch ":hvswitch@[UDB=(2,1)][side=left]:vseg_21_top_f"\r
-       switch ":hvswitch@[UDB=(3,1)][side=left]:vseg_21_top_f"\r
-       switch ":hvswitch@[UDB=(3,1)][side=left]:21,68_b"\r
-       switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_68_f"\r
-       switch ":hvswitch@[UDB=(3,3)][side=left]:hseg_68_f"\r
-       switch ":hvswitch@[UDB=(3,4)][side=left]:hseg_68_f"\r
-       switch ":dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:49,68_f"\r
-       switch "IStub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v49+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v51"\r
-       switch "Stub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v49+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v51==>:interrupt_idmux_1.in_2"\r
-       switch ":interrupt_idmux_1.interrupt_idmux_1__out==>:interrupt_1.interrupt"\r
-       term   ":interrupt_1.interrupt"\r
-end \USBFS:ept_int_2\\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rpt b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rpt
deleted file mode 100755 (executable)
index 7a8943b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rpt
+++ /dev/null
@@ -1,2695 +0,0 @@
-Loading plugins phase: Elapsed time ==> 0s.500ms\r
-Initializing data phase: Elapsed time ==> 3s.890ms\r
-<CYPRESSTAG name="CyDsfit arguments...">\r
-cydsfit arguments: -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -p W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 -s W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\Generated_Source\PSoC5 -- -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE</CYPRESSTAG>\r
-<CYPRESSTAG name="Design elaboration results...">\r
-</CYPRESSTAG>\r
-Elaboration phase: Elapsed time ==> 7s.406ms\r
-<CYPRESSTAG name="HDL generation results...">\r
-</CYPRESSTAG>\r
-HDL generation phase: Elapsed time ==> 0s.109ms\r
-<CYPRESSTAG name="Synthesis results...">\r
-\r
-     | | | | | | |\r
-   _________________\r
-  -|               |-\r
-  -|               |-\r
-  -|               |-\r
-  -|    CYPRESS    |-\r
-  -|               |-\r
-  -|               |-   Warp Verilog Synthesis Compiler: Version 6.3 IR 41\r
-  -|               |-   Copyright (C) 1991-2001 Cypress Semiconductor\r
-   |_______________|\r
-     | | | | | | |\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe\r
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog\r
-======================================================================\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe\r
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog\r
-======================================================================\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   vlogfe\r
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v\r
-======================================================================\r
-\r
-vlogfe V6.3 IR 41:  Verilog parser\r
-Sat Mar 22 22:32:47 2014\r
-\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   vpp\r
-Options  :    -yv2 -q10 USB_Bootloader.v\r
-======================================================================\r
-\r
-vpp V6.3 IR 41:  Verilog Pre-Processor\r
-Sat Mar 22 22:32:47 2014\r
-\r
-\r
-vpp:  No errors.\r
-\r
-Library 'work' => directory 'lcpsoc3'\r
-General_symbol_table\r
-General_symbol_table\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.\r
-Using control file 'USB_Bootloader.ctl'.\r
-\r
-vlogfe:  No errors.\r
-\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   tovif\r
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v\r
-======================================================================\r
-\r
-tovif V6.3 IR 41:  High-level synthesis\r
-Sat Mar 22 22:32:47 2014\r
-\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.\r
-Linking 'W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.\r
-Linking 'W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.\r
-\r
-tovif:  No errors.\r
-\r
-\r
-======================================================================\r
-Compiling:  USB_Bootloader.v\r
-Program  :   topld\r
-Options  :    -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 -verilog USB_Bootloader.v\r
-======================================================================\r
-\r
-topld V6.3 IR 41:  Synthesis and optimization\r
-Sat Mar 22 22:32:48 2014\r
-\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\std.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\cypress.vhd'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\work\cypress.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\lpmpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_cnst.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_mthv.vif'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif'.\r
-Linking 'W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.ctl'.\r
-Linking 'W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USB_Bootloader.v'.\r
-Linking 'C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\lcpsoc3\stdlogic\cpsoc3.vif'.\r
-\r
-----------------------------------------------------------\r
-Detecting unused logic.\r
-----------------------------------------------------------\r
-\r
-\r
-\r
-------------------------------------------------------\r
-Alias Detection\r
-------------------------------------------------------\r
-Aliasing one to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing \USBFS:tmpOE__Dp_net_0\ to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_7 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_6 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_5 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_4 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_3 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_2 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_1 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_DBx_net_0 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_9 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_8 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_7 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_6 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_5 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_4 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_3 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_2 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_1 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SCSI_Out_net_0 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SD_PULLUP_net_4 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SD_PULLUP_net_3 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SD_PULLUP_net_2 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SD_PULLUP_net_1 to \USBFS:tmpOE__Dm_net_0\\r
-Aliasing tmpOE__SD_PULLUP_net_0 to \USBFS:tmpOE__Dm_net_0\\r
-Removing Rhs of wire one[37] = \USBFS:tmpOE__Dm_net_0\[32]\r
-Removing Lhs of wire \USBFS:tmpOE__Dp_net_0\[40] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_7[49] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_6[50] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_5[51] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_4[52] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_3[53] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_2[54] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_1[55] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_DBx_net_0[56] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_9[84] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_8[85] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_7[86] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_6[87] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_5[88] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_4[89] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_3[90] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_2[91] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_1[92] = one[37]\r
-Removing Lhs of wire tmpOE__SCSI_Out_net_0[93] = one[37]\r
-Removing Lhs of wire tmpOE__SD_PULLUP_net_4[127] = one[37]\r
-Removing Lhs of wire tmpOE__SD_PULLUP_net_3[128] = one[37]\r
-Removing Lhs of wire tmpOE__SD_PULLUP_net_2[129] = one[37]\r
-Removing Lhs of wire tmpOE__SD_PULLUP_net_1[130] = one[37]\r
-Removing Lhs of wire tmpOE__SD_PULLUP_net_0[131] = one[37]\r
-\r
-------------------------------------------------------\r
-Aliased 0 equations, 25 wires.\r
-------------------------------------------------------\r
-\r
-----------------------------------------------------------\r
-Circuit simplification\r
-----------------------------------------------------------\r
-\r
-Substituting virtuals - pass 1:\r
-\r
-\r
-----------------------------------------------------------\r
-Circuit simplification results:\r
-\r
-       Expanded 0 signals.\r
-       Turned 0 signals into soft nodes.\r
-       Maximum default expansion cost was set at 3.\r
-----------------------------------------------------------\r
-\r
-topld:  No errors.\r
-\r
-CYPRESS_DIR    : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\r
-Warp Program   : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\bin/warp.exe\r
-Warp Arguments : -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -dcpsoc3 USB_Bootloader.v -verilog\r
-</CYPRESSTAG>\r
-Warp synthesis phase: Elapsed time ==> 1s.468ms\r
-<CYPRESSTAG name="Fitter results...">\r
-<CYPRESSTAG name="Fitter startup details...">\r
-cyp3fit: V3.0.0.1539, Family: PSoC3, Started at: Saturday, 22 March 2014 22:32:48\r
-Options: -yv2 -v3 -ygs -q10 -o2 -.fftcfgtype=LE -ya -.fftprj=W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj -d CY8C5267AXI-LP051 USB_Bootloader.v -verilog\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Design parsing">\r
-Design parsing phase: Elapsed time ==> 0s.046ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Tech mapping">\r
-<CYPRESSTAG name="Initial Mapping" icon="FILE_RPT_TECHM">\r
-Assigning clock USBFS_Clock_vbus to clock BUS_CLK because it is a pass-through\r
-<CYPRESSTAG name="Global Clock Selection" icon="FILE_RPT_TECHM">\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="UDB Clock/Enable Remapping Results">\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Duplicate Macrocell detection">\r
-</CYPRESSTAG>\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Duplicate Macrocell detection">\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Design Equations" icon="FILE_RPT_EQUATION">\r
-\r
-------------------------------------------------------------\r
-Design Equations\r
-------------------------------------------------------------\r
-    <CYPRESSTAG name="Pin listing">\r
-\r
-    ------------------------------------------------------------\r
-    Pin listing\r
-    ------------------------------------------------------------\r
-\r
-    Pin : Name = SCSI_Out(0)\r
-        Attributes:\r
-            Alias: DBP_raw\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(0)__PA ,\r
-            pad => SCSI_Out(0)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(1)\r
-        Attributes:\r
-            Alias: ATN\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(1)__PA ,\r
-            pad => SCSI_Out(1)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(2)\r
-        Attributes:\r
-            Alias: BSY\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(2)__PA ,\r
-            pad => SCSI_Out(2)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(3)\r
-        Attributes:\r
-            Alias: ACK\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(3)__PA ,\r
-            pad => SCSI_Out(3)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(4)\r
-        Attributes:\r
-            Alias: RST\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(4)__PA ,\r
-            pad => SCSI_Out(4)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(5)\r
-        Attributes:\r
-            Alias: MSG\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(5)__PA ,\r
-            pad => SCSI_Out(5)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(6)\r
-        Attributes:\r
-            Alias: SEL\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(6)__PA ,\r
-            pad => SCSI_Out(6)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(7)\r
-        Attributes:\r
-            Alias: CD\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(7)__PA ,\r
-            pad => SCSI_Out(7)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(8)\r
-        Attributes:\r
-            Alias: REQ\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(8)__PA ,\r
-            pad => SCSI_Out(8)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out(9)\r
-        Attributes:\r
-            Alias: IO_raw\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out(9)__PA ,\r
-            pad => SCSI_Out(9)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(0)\r
-        Attributes:\r
-            Alias: DB0\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(0)__PA ,\r
-            pad => SCSI_Out_DBx(0)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(1)\r
-        Attributes:\r
-            Alias: DB1\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(1)__PA ,\r
-            pad => SCSI_Out_DBx(1)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(2)\r
-        Attributes:\r
-            Alias: DB2\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(2)__PA ,\r
-            pad => SCSI_Out_DBx(2)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(3)\r
-        Attributes:\r
-            Alias: DB3\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(3)__PA ,\r
-            pad => SCSI_Out_DBx(3)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(4)\r
-        Attributes:\r
-            Alias: DB4\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(4)__PA ,\r
-            pad => SCSI_Out_DBx(4)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(5)\r
-        Attributes:\r
-            Alias: DB5\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(5)__PA ,\r
-            pad => SCSI_Out_DBx(5)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(6)\r
-        Attributes:\r
-            Alias: DB6\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(6)__PA ,\r
-            pad => SCSI_Out_DBx(6)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SCSI_Out_DBx(7)\r
-        Attributes:\r
-            Alias: DB7\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: NOSYNC\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: CMOS_OUT\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 0\r
-            IO Voltage: 5\r
-        PORT MAP (\r
-            pa_out => SCSI_Out_DBx(7)__PA ,\r
-            pad => SCSI_Out_DBx(7)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SD_PULLUP(0)\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: RES_PULL_UP\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 1\r
-            IO Voltage: 3.3\r
-        PORT MAP (\r
-            pa_out => SD_PULLUP(0)__PA ,\r
-            pad => SD_PULLUP(0)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SD_PULLUP(1)\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: RES_PULL_UP\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 1\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SD_PULLUP(1)__PA ,\r
-            pad => SD_PULLUP(1)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SD_PULLUP(2)\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: RES_PULL_UP\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 1\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SD_PULLUP(2)__PA ,\r
-            pad => SD_PULLUP(2)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SD_PULLUP(3)\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: RES_PULL_UP\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 1\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SD_PULLUP(3)__PA ,\r
-            pad => SD_PULLUP(3)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = SD_PULLUP(4)\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: RES_PULL_UP\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: INP_DIS_LO\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: False\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: DIGITAL\r
-            Initial Value: 1\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => SD_PULLUP(4)__PA ,\r
-            pad => SD_PULLUP(4)_PAD );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = \USBFS:Dm(0)\\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: AUTO\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: False\r
-            Interrupt mode: NONE\r
-            Drive mode: HI_Z_ANALOG\r
-            VTrip: EITHER\r
-            Slew: FAST\r
-            Input Sync needed: False\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: True\r
-            Is OE Registered: False\r
-            Uses Analog: True\r
-            Can contain Digital: False\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: USB_D_MINUS\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => \USBFS:Dm(0)\__PA ,\r
-            analog_term => \USBFS:Net_597\ ,\r
-            pad => \USBFS:Dm(0)_PAD\ );\r
-        Properties:\r
-        {\r
-        }\r
-\r
-    Pin : Name = \USBFS:Dp(0)\\r
-        Attributes:\r
-            In Group/Port: True\r
-            In Sync Option: SYNC\r
-            Out Sync Option: AUTO\r
-            Interrupt generated: True\r
-            Interrupt mode: FALLING\r
-            Drive mode: HI_Z_ANALOG\r
-            VTrip: CMOS\r
-            Slew: FAST\r
-            Input Sync needed: True\r
-            Output Sync needed: False\r
-            SC shield enabled: False\r
-            POR State: ANY\r
-            LCD Mode: COMMON\r
-            Register Mode: RegComb\r
-            CaSense Mode: NEITHER\r
-            Treat as pin: False\r
-            Is OE Registered: False\r
-            Uses Analog: True\r
-            Can contain Digital: True\r
-            Is SIO: False\r
-            SIO Output Buf: NONREGULATED\r
-            SIO Input Buf: SINGLE_ENDED\r
-            SIO HiFreq: LOW\r
-            SIO Hyst: DISABLED\r
-            SIO Vtrip: MULTIPLIER_0_5\r
-            SIO RefSel: VCC_IO\r
-            Required Capabilitites: USB_D_PLUS\r
-            Initial Value: 0\r
-            IO Voltage: 0\r
-        PORT MAP (\r
-            pa_out => \USBFS:Dp(0)\__PA ,\r
-            analog_term => \USBFS:Net_1000\ ,\r
-            pad => \USBFS:Dp(0)_PAD\ );\r
-        Properties:\r
-        {\r
-        }\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Macrocell listing" icon="FILE_RPT_EQUATION">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Datapath listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Status register listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="StatusI register listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Sync listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Control register listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Count7 listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="DRQ listing">\r
-    </CYPRESSTAG>\r
-    <CYPRESSTAG name="Interrupt listing">\r
-\r
-    ------------------------------------------------------------\r
-    Interrupt listing\r
-    ------------------------------------------------------------\r
-\r
-    interrupt: Name =\USBFS:arb_int\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_79\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:bus_reset\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_81\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:dp_int\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_1010\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:ep_0\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_0\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:ep_1\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_1\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:ep_2\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_2\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-\r
-    interrupt: Name =\USBFS:sof_int\\r
-        PORT MAP (\r
-            interrupt => Net_40 );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-    </CYPRESSTAG>\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Technology mapping summary" expanded>\r
-\r
-------------------------------------------------------------\r
-Technology mapping summary\r
-------------------------------------------------------------\r
-\r
-Resource Type                 : Used : Free :  Max :  % Used\r
-============================================================\r
-Digital clock dividers        :    0 :    8 :    8 :   0.00%\r
-Analog clock dividers         :    0 :    4 :    4 :   0.00%\r
-Pins                          :   28 :   44 :   72 :  38.89%\r
-UDB Macrocells                :    0 :  192 :  192 :   0.00%\r
-UDB Unique Pterms             :    0 :  384 :  384 :   0.00%\r
-UDB Datapath Cells            :    0 :   24 :   24 :   0.00%\r
-UDB Status Cells              :    0 :   24 :   24 :   0.00%\r
-UDB Control Cells             :    0 :   24 :   24 :   0.00%\r
-DMA Channels                  :    0 :   24 :   24 :   0.00%\r
-Interrupts                    :    7 :   25 :   32 :  21.88%\r
-VIDAC Fixed Blocks            :    0 :    1 :    1 :   0.00%\r
-Comparator Fixed Blocks       :    0 :    2 :    2 :   0.00%\r
-CapSense Buffers              :    0 :    2 :    2 :   0.00%\r
-I2C Fixed Blocks              :    0 :    1 :    1 :   0.00%\r
-Timer Fixed Blocks            :    0 :    4 :    4 :   0.00%\r
-USB Fixed Blocks              :    1 :    0 :    1 : 100.00%\r
-LCD Fixed Blocks              :    0 :    1 :    1 :   0.00%\r
-EMIF Fixed Blocks             :    0 :    1 :    1 :   0.00%\r
-LPF Fixed Blocks              :    0 :    2 :    2 :   0.00%\r
-SAR Fixed Blocks              :    0 :    1 :    1 :   0.00%\r
-</CYPRESSTAG>\r
-Technology Mapping: Elapsed time ==> 0s.030ms\r
-Tech mapping phase: Elapsed time ==> 0s.265ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Analog Placement">\r
-Initial Analog Placement Results:\r
-IO_3@[IOP=(4)][IoId=(3)] : SCSI_Out(0) (fixed)\r
-IO_2@[IOP=(4)][IoId=(2)] : SCSI_Out(1) (fixed)\r
-IO_7@[IOP=(0)][IoId=(7)] : SCSI_Out(2) (fixed)\r
-IO_6@[IOP=(0)][IoId=(6)] : SCSI_Out(3) (fixed)\r
-IO_5@[IOP=(0)][IoId=(5)] : SCSI_Out(4) (fixed)\r
-IO_4@[IOP=(0)][IoId=(4)] : SCSI_Out(5) (fixed)\r
-IO_3@[IOP=(0)][IoId=(3)] : SCSI_Out(6) (fixed)\r
-IO_2@[IOP=(0)][IoId=(2)] : SCSI_Out(7) (fixed)\r
-IO_1@[IOP=(0)][IoId=(1)] : SCSI_Out(8) (fixed)\r
-IO_0@[IOP=(0)][IoId=(0)] : SCSI_Out(9) (fixed)\r
-IO_3@[IOP=(6)][IoId=(3)] : SCSI_Out_DBx(0) (fixed)\r
-IO_2@[IOP=(6)][IoId=(2)] : SCSI_Out_DBx(1) (fixed)\r
-IO_1@[IOP=(6)][IoId=(1)] : SCSI_Out_DBx(2) (fixed)\r
-IO_0@[IOP=(6)][IoId=(0)] : SCSI_Out_DBx(3) (fixed)\r
-IO_7@[IOP=(4)][IoId=(7)] : SCSI_Out_DBx(4) (fixed)\r
-IO_6@[IOP=(4)][IoId=(6)] : SCSI_Out_DBx(5) (fixed)\r
-IO_5@[IOP=(4)][IoId=(5)] : SCSI_Out_DBx(6) (fixed)\r
-IO_4@[IOP=(4)][IoId=(4)] : SCSI_Out_DBx(7) (fixed)\r
-IO_1@[IOP=(3)][IoId=(1)] : SD_PULLUP(0) (fixed)\r
-IO_2@[IOP=(3)][IoId=(2)] : SD_PULLUP(1) (fixed)\r
-IO_3@[IOP=(3)][IoId=(3)] : SD_PULLUP(2) (fixed)\r
-IO_4@[IOP=(3)][IoId=(4)] : SD_PULLUP(3) (fixed)\r
-IO_5@[IOP=(3)][IoId=(5)] : SD_PULLUP(4) (fixed)\r
-IO_7@[IOP=(15)][IoId=(7)] : \USBFS:Dm(0)\ (fixed)\r
-IO_6@[IOP=(15)][IoId=(6)] : \USBFS:Dp(0)\ (fixed)\r
-USB[0]@[FFB(USB,0)] : \USBFS:USB\\r
-Analog Placement phase: Elapsed time ==> 0s.109ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Analog Routing">\r
-Analog Routing phase: Elapsed time ==> 0s.000ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Analog Code Generation">\r
-============ Analog Final Answer Routes ============\r
-Dump of CyAnalogRoutingResultsDB\r
-Map of net to items {\r
-}\r
-Map of item to net {\r
-}\r
-Mux Info {\r
-}\r
-Dump of CyP35AnalogRoutingResultsDB\r
-IsVddaHalfUsedForComp = False\r
-IsVddaHalfUsedForSar0 = False\r
-IsVddaHalfUsedForSar1 = False\r
-Analog Code Generation phase: Elapsed time ==> 1s.000ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Digital Placement">\r
-<CYPRESSTAG name="Detailed placement messages">\r
-I2659: No Constrained paths were found. The placer will run in non-timing driven mode.\r
-I2076: Total run-time: 1.2 sec.\r
-\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="PLD Packing">\r
-<CYPRESSTAG name="PLD Packing Summary">\r
-No PLDs were packed.\r
-</CYPRESSTAG>\r
-PLD Packing: Elapsed time ==> 0s.000ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Partitioning">\r
-<CYPRESSTAG name="Initial Partitioning Summary">\r
-Initial Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>\r
-<CYPRESSTAG name="Final Partitioning Summary">\r
-Final Partitioning Summary not displayed at this verbose level.</CYPRESSTAG>\r
-Partitioning: Elapsed time ==> 0s.093ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Simulated Annealing">\r
-Annealing: Elapsed time ==> 0s.000ms\r
-<CYPRESSTAG name="Simulated Annealing Results">\r
-The seed used for moves was 114161200.\r
-Inital cost was 120, final cost is 120 (0.00% improvement).</CYPRESSTAG>\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Final Placement Summary">\r
-\r
-------------------------------------------------------------\r
-Final Placement Summary\r
-------------------------------------------------------------\r
-\r
-       Resource Type :      Count : Avg Inputs : Avg Outputs\r
-    ========================================================\r
-                 UDB :          0 :       0.00 :       0.00\r
-<CYPRESSTAG name="Final Placement Details">\r
-<CYPRESSTAG name="Component Details">\r
-\r
-------------------------------------------------------------\r
-Component Placement Details\r
-------------------------------------------------------------\r
-UDB [UDB=(0,0)] is empty.\r
-UDB [UDB=(0,1)] is empty.\r
-UDB [UDB=(0,2)] is empty.\r
-UDB [UDB=(0,3)] is empty.\r
-UDB [UDB=(0,4)] is empty.\r
-UDB [UDB=(0,5)] is empty.\r
-UDB [UDB=(1,0)] is empty.\r
-UDB [UDB=(1,1)] is empty.\r
-UDB [UDB=(1,2)] is empty.\r
-UDB [UDB=(1,3)] is empty.\r
-UDB [UDB=(1,4)] is empty.\r
-UDB [UDB=(1,5)] is empty.\r
-UDB [UDB=(2,0)] is empty.\r
-UDB [UDB=(2,1)] is empty.\r
-UDB [UDB=(2,2)] is empty.\r
-UDB [UDB=(2,3)] is empty.\r
-UDB [UDB=(2,4)] is empty.\r
-UDB [UDB=(2,5)] is empty.\r
-UDB [UDB=(3,0)] is empty.\r
-UDB [UDB=(3,1)] is empty.\r
-UDB [UDB=(3,2)] is empty.\r
-UDB [UDB=(3,3)] is empty.\r
-UDB [UDB=(3,4)] is empty.\r
-UDB [UDB=(3,5)] is empty.\r
-Intr hod @ [IntrHod=(0)]: \r
-  Intr@ [IntrHod=(0)][IntrId=(0)] \r
-    interrupt: Name =\USBFS:ep_1\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_1\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(1)] \r
-    interrupt: Name =\USBFS:ep_2\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_2\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(12)] \r
-    interrupt: Name =\USBFS:dp_int\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_1010\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(21)] \r
-    interrupt: Name =\USBFS:sof_int\\r
-        PORT MAP (\r
-            interrupt => Net_40 );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(22)] \r
-    interrupt: Name =\USBFS:arb_int\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_79\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(23)] \r
-    interrupt: Name =\USBFS:bus_reset\\r
-        PORT MAP (\r
-            interrupt => \USBFS:Net_81\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-  Intr@ [IntrHod=(0)][IntrId=(24)] \r
-    interrupt: Name =\USBFS:ep_0\\r
-        PORT MAP (\r
-            interrupt => \USBFS:ept_int_0\ );\r
-        Properties:\r
-        {\r
-            int_type = "10"\r
-        }\r
-Drq hod @ [DrqHod=(0)]: empty\r
-Port 0 contains the following IO cells:\r
-[IoId=0]: \r
-Pin : Name = SCSI_Out(9)\r
-    Attributes:\r
-        Alias: IO_raw\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(9)__PA ,\r
-        pad => SCSI_Out(9)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=1]: \r
-Pin : Name = SCSI_Out(8)\r
-    Attributes:\r
-        Alias: REQ\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(8)__PA ,\r
-        pad => SCSI_Out(8)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=2]: \r
-Pin : Name = SCSI_Out(7)\r
-    Attributes:\r
-        Alias: CD\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(7)__PA ,\r
-        pad => SCSI_Out(7)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=3]: \r
-Pin : Name = SCSI_Out(6)\r
-    Attributes:\r
-        Alias: SEL\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(6)__PA ,\r
-        pad => SCSI_Out(6)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=4]: \r
-Pin : Name = SCSI_Out(5)\r
-    Attributes:\r
-        Alias: MSG\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(5)__PA ,\r
-        pad => SCSI_Out(5)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=5]: \r
-Pin : Name = SCSI_Out(4)\r
-    Attributes:\r
-        Alias: RST\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(4)__PA ,\r
-        pad => SCSI_Out(4)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=6]: \r
-Pin : Name = SCSI_Out(3)\r
-    Attributes:\r
-        Alias: ACK\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(3)__PA ,\r
-        pad => SCSI_Out(3)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=7]: \r
-Pin : Name = SCSI_Out(2)\r
-    Attributes:\r
-        Alias: BSY\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(2)__PA ,\r
-        pad => SCSI_Out(2)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-Port 1 is empty\r
-Port 2 is empty\r
-Port 3 contains the following IO cells:\r
-[IoId=1]: \r
-Pin : Name = SD_PULLUP(0)\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: RES_PULL_UP\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 1\r
-        IO Voltage: 3.3\r
-    PORT MAP (\r
-        pa_out => SD_PULLUP(0)__PA ,\r
-        pad => SD_PULLUP(0)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=2]: \r
-Pin : Name = SD_PULLUP(1)\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: RES_PULL_UP\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 1\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SD_PULLUP(1)__PA ,\r
-        pad => SD_PULLUP(1)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=3]: \r
-Pin : Name = SD_PULLUP(2)\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: RES_PULL_UP\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 1\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SD_PULLUP(2)__PA ,\r
-        pad => SD_PULLUP(2)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=4]: \r
-Pin : Name = SD_PULLUP(3)\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: RES_PULL_UP\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 1\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SD_PULLUP(3)__PA ,\r
-        pad => SD_PULLUP(3)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=5]: \r
-Pin : Name = SD_PULLUP(4)\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: RES_PULL_UP\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: INP_DIS_LO\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 1\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SD_PULLUP(4)__PA ,\r
-        pad => SD_PULLUP(4)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-Port 4 contains the following IO cells:\r
-[IoId=2]: \r
-Pin : Name = SCSI_Out(1)\r
-    Attributes:\r
-        Alias: ATN\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(1)__PA ,\r
-        pad => SCSI_Out(1)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=3]: \r
-Pin : Name = SCSI_Out(0)\r
-    Attributes:\r
-        Alias: DBP_raw\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out(0)__PA ,\r
-        pad => SCSI_Out(0)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=4]: \r
-Pin : Name = SCSI_Out_DBx(7)\r
-    Attributes:\r
-        Alias: DB7\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 5\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(7)__PA ,\r
-        pad => SCSI_Out_DBx(7)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=5]: \r
-Pin : Name = SCSI_Out_DBx(6)\r
-    Attributes:\r
-        Alias: DB6\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(6)__PA ,\r
-        pad => SCSI_Out_DBx(6)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=6]: \r
-Pin : Name = SCSI_Out_DBx(5)\r
-    Attributes:\r
-        Alias: DB5\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(5)__PA ,\r
-        pad => SCSI_Out_DBx(5)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=7]: \r
-Pin : Name = SCSI_Out_DBx(4)\r
-    Attributes:\r
-        Alias: DB4\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(4)__PA ,\r
-        pad => SCSI_Out_DBx(4)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-Port 5 is empty\r
-Port 6 contains the following IO cells:\r
-[IoId=0]: \r
-Pin : Name = SCSI_Out_DBx(3)\r
-    Attributes:\r
-        Alias: DB3\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(3)__PA ,\r
-        pad => SCSI_Out_DBx(3)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=1]: \r
-Pin : Name = SCSI_Out_DBx(2)\r
-    Attributes:\r
-        Alias: DB2\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(2)__PA ,\r
-        pad => SCSI_Out_DBx(2)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=2]: \r
-Pin : Name = SCSI_Out_DBx(1)\r
-    Attributes:\r
-        Alias: DB1\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(1)__PA ,\r
-        pad => SCSI_Out_DBx(1)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=3]: \r
-Pin : Name = SCSI_Out_DBx(0)\r
-    Attributes:\r
-        Alias: DB0\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: NOSYNC\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: CMOS_OUT\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: False\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: DIGITAL\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => SCSI_Out_DBx(0)__PA ,\r
-        pad => SCSI_Out_DBx(0)_PAD );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-Port 12 is empty\r
-Port 15 generates interrupt for logical port:\r
-    logicalport: Name =\USBFS:Dp\\r
-        PORT MAP (\r
-            in_clock_en => one ,\r
-            in_reset => zero ,\r
-            out_clock_en => one ,\r
-            out_reset => zero ,\r
-            interrupt => \USBFS:Net_1010\ ,\r
-            in_clock => ClockBlock_BUS_CLK );\r
-        Properties:\r
-        {\r
-            drive_mode = "000"\r
-            ibuf_enabled = "0"\r
-            id = "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42"\r
-            init_dr_st = "0"\r
-            input_clk_en = 0\r
-            input_sync = "1"\r
-            input_sync_mode = "0"\r
-            intr_mode = "10"\r
-            invert_in_clock = 0\r
-            invert_in_clock_en = 0\r
-            invert_in_reset = 0\r
-            invert_out_clock = 0\r
-            invert_out_clock_en = 0\r
-            invert_out_reset = 0\r
-            io_voltage = ""\r
-            layout_mode = "CONTIGUOUS"\r
-            oe_conn = "0"\r
-            oe_reset = 0\r
-            oe_sync = "0"\r
-            output_clk_en = 0\r
-            output_clock_mode = "0"\r
-            output_conn = "0"\r
-            output_mode = "0"\r
-            output_reset = 0\r
-            output_sync = "0"\r
-            pa_in_clock = -1\r
-            pa_in_clock_en = -1\r
-            pa_in_reset = -1\r
-            pa_out_clock = -1\r
-            pa_out_clock_en = -1\r
-            pa_out_reset = -1\r
-            pin_aliases = ""\r
-            pin_mode = "I"\r
-            por_state = 4\r
-            port_alias_group = ""\r
-            port_alias_required = 0\r
-            sio_group_cnt = 0\r
-            sio_hifreq = ""\r
-            sio_hyst = "0"\r
-            sio_ibuf = "00000000"\r
-            sio_info = "00"\r
-            sio_obuf = "00000000"\r
-            sio_refsel = "00000000"\r
-            sio_vtrip = "00000000"\r
-            slew_rate = "0"\r
-            spanning = 0\r
-            sw_only = 0\r
-            use_annotation = "0"\r
-            vtrip = "00"\r
-            width = 1\r
-        }\r
-    and contains the following IO cells:\r
-[IoId=6]: \r
-Pin : Name = \USBFS:Dp(0)\\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: SYNC\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: True\r
-        Interrupt mode: FALLING\r
-        Drive mode: HI_Z_ANALOG\r
-        VTrip: CMOS\r
-        Slew: FAST\r
-        Input Sync needed: True\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: False\r
-        Is OE Registered: False\r
-        Uses Analog: True\r
-        Can contain Digital: True\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: USB_D_PLUS\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => \USBFS:Dp(0)\__PA ,\r
-        analog_term => \USBFS:Net_1000\ ,\r
-        pad => \USBFS:Dp(0)_PAD\ );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-[IoId=7]: \r
-Pin : Name = \USBFS:Dm(0)\\r
-    Attributes:\r
-        In Group/Port: True\r
-        In Sync Option: AUTO\r
-        Out Sync Option: AUTO\r
-        Interrupt generated: False\r
-        Interrupt mode: NONE\r
-        Drive mode: HI_Z_ANALOG\r
-        VTrip: EITHER\r
-        Slew: FAST\r
-        Input Sync needed: False\r
-        Output Sync needed: False\r
-        SC shield enabled: False\r
-        POR State: ANY\r
-        LCD Mode: COMMON\r
-        Register Mode: RegComb\r
-        CaSense Mode: NEITHER\r
-        Treat as pin: True\r
-        Is OE Registered: False\r
-        Uses Analog: True\r
-        Can contain Digital: False\r
-        Is SIO: False\r
-        SIO Output Buf: NONREGULATED\r
-        SIO Input Buf: SINGLE_ENDED\r
-        SIO HiFreq: LOW\r
-        SIO Hyst: DISABLED\r
-        SIO Vtrip: MULTIPLIER_0_5\r
-        SIO RefSel: VCC_IO\r
-        Required Capabilitites: USB_D_MINUS\r
-        Initial Value: 0\r
-        IO Voltage: 0\r
-    PORT MAP (\r
-        pa_out => \USBFS:Dm(0)\__PA ,\r
-        analog_term => \USBFS:Net_597\ ,\r
-        pad => \USBFS:Dm(0)_PAD\ );\r
-    Properties:\r
-    {\r
-    }\r
-\r
-Fixed Function block hod @ [FFB(CAN,0)]: empty\r
-Fixed Function block hod @ [FFB(Cache,0)]: empty\r
-Fixed Function block hod @ [FFB(CapSense,0)]: empty\r
-Fixed Function block hod @ [FFB(Clock,0)]: \r
-    Clock Block @ [FFB(Clock,0)]: \r
-    clockblockcell: Name =ClockBlock\r
-        PORT MAP (\r
-            clk_bus_glb => ClockBlock_BUS_CLK ,\r
-            clk_bus => ClockBlock_BUS_CLK_local ,\r
-            clk_sync => ClockBlock_MASTER_CLK ,\r
-            clk_32k_xtal => ClockBlock_XTAL_32KHZ ,\r
-            xtal => ClockBlock_XTAL ,\r
-            ilo => ClockBlock_ILO ,\r
-            clk_100k => ClockBlock_100k ,\r
-            clk_1k => ClockBlock_1k ,\r
-            clk_32k => ClockBlock_32k ,\r
-            pllout => ClockBlock_PLL_OUT ,\r
-            imo => ClockBlock_IMO );\r
-        Properties:\r
-        {\r
-        }\r
-Fixed Function block hod @ [FFB(Comparator,0)]: empty\r
-Fixed Function block hod @ [FFB(DFB,0)]: empty\r
-Fixed Function block hod @ [FFB(DSM,0)]: empty\r
-Fixed Function block hod @ [FFB(Decimator,0)]: empty\r
-Fixed Function block hod @ [FFB(EMIF,0)]: empty\r
-Fixed Function block hod @ [FFB(I2C,0)]: empty\r
-Fixed Function block hod @ [FFB(LCD,0)]: empty\r
-Fixed Function block hod @ [FFB(LVD,0)]: empty\r
-Fixed Function block hod @ [FFB(PM,0)]: empty\r
-Fixed Function block hod @ [FFB(SPC,0)]: empty\r
-Fixed Function block hod @ [FFB(Timer,0)]: empty\r
-Fixed Function block hod @ [FFB(USB,0)]: \r
-    USB Block @ [FFB(USB,0)]: \r
-    usbcell: Name =\USBFS:USB\\r
-        PORT MAP (\r
-            dp => \USBFS:Net_1000\ ,\r
-            dm => \USBFS:Net_597\ ,\r
-            sof_int => Net_40 ,\r
-            arb_int => \USBFS:Net_79\ ,\r
-            usb_int => \USBFS:Net_81\ ,\r
-            ept_int_8 => \USBFS:ept_int_8\ ,\r
-            ept_int_7 => \USBFS:ept_int_7\ ,\r
-            ept_int_6 => \USBFS:ept_int_6\ ,\r
-            ept_int_5 => \USBFS:ept_int_5\ ,\r
-            ept_int_4 => \USBFS:ept_int_4\ ,\r
-            ept_int_3 => \USBFS:ept_int_3\ ,\r
-            ept_int_2 => \USBFS:ept_int_2\ ,\r
-            ept_int_1 => \USBFS:ept_int_1\ ,\r
-            ept_int_0 => \USBFS:ept_int_0\ ,\r
-            ord_int => \USBFS:Net_95\ ,\r
-            dma_req_7 => \USBFS:dma_req_7\ ,\r
-            dma_req_6 => \USBFS:dma_req_6\ ,\r
-            dma_req_5 => \USBFS:dma_req_5\ ,\r
-            dma_req_4 => \USBFS:dma_req_4\ ,\r
-            dma_req_3 => \USBFS:dma_req_3\ ,\r
-            dma_req_2 => \USBFS:dma_req_2\ ,\r
-            dma_req_1 => \USBFS:dma_req_1\ ,\r
-            dma_req_0 => \USBFS:dma_req_0\ ,\r
-            dma_termin => \USBFS:Net_824\ );\r
-        Properties:\r
-        {\r
-            cy_registers = ""\r
-        }\r
-Fixed Function block hod @ [FFB(VIDAC,0)]: empty\r
-Fixed Function block hod @ [FFB(CsAbuf,0)]: empty\r
-Fixed Function block hod @ [FFB(Vref,0)]: empty\r
-Fixed Function block hod @ [FFB(LPF,0)]: empty\r
-Fixed Function block hod @ [FFB(SAR,0)]: empty\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Port Configuration Details">\r
-\r
-------------------------------------------------------------\r
-Port Configuration report\r
-------------------------------------------------------------\r
-     |     |       | Interrupt |                  |                 | \r
-Port | Pin | Fixed |      Type |       Drive Mode |            Name | Connections\r
------+-----+-------+-----------+------------------+-----------------+-------------------------\r
-   0 |   0 |     * |      NONE |         CMOS_OUT |     SCSI_Out(9) | \r
-     |   1 |     * |      NONE |         CMOS_OUT |     SCSI_Out(8) | \r
-     |   2 |     * |      NONE |         CMOS_OUT |     SCSI_Out(7) | \r
-     |   3 |     * |      NONE |         CMOS_OUT |     SCSI_Out(6) | \r
-     |   4 |     * |      NONE |         CMOS_OUT |     SCSI_Out(5) | \r
-     |   5 |     * |      NONE |         CMOS_OUT |     SCSI_Out(4) | \r
-     |   6 |     * |      NONE |         CMOS_OUT |     SCSI_Out(3) | \r
-     |   7 |     * |      NONE |         CMOS_OUT |     SCSI_Out(2) | \r
------+-----+-------+-----------+------------------+-----------------+-------------------------\r
-   3 |   1 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(0) | \r
-     |   2 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(1) | \r
-     |   3 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(2) | \r
-     |   4 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(3) | \r
-     |   5 |     * |      NONE |      RES_PULL_UP |    SD_PULLUP(4) | \r
------+-----+-------+-----------+------------------+-----------------+-------------------------\r
-   4 |   2 |     * |      NONE |         CMOS_OUT |     SCSI_Out(1) | \r
-     |   3 |     * |      NONE |         CMOS_OUT |     SCSI_Out(0) | \r
-     |   4 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(7) | \r
-     |   5 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(6) | \r
-     |   6 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(5) | \r
-     |   7 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(4) | \r
------+-----+-------+-----------+------------------+-----------------+-------------------------\r
-   6 |   0 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(3) | \r
-     |   1 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(2) | \r
-     |   2 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(1) | \r
-     |   3 |     * |      NONE |         CMOS_OUT | SCSI_Out_DBx(0) | \r
------+-----+-------+-----------+------------------+-----------------+-------------------------\r
-  15 |   6 |     * |   FALLING |      HI_Z_ANALOG |   \USBFS:Dp(0)\ | Analog(\USBFS:Net_1000\)\r
-     |   7 |     * |      NONE |      HI_Z_ANALOG |   \USBFS:Dm(0)\ | Analog(\USBFS:Net_597\)\r
-----------------------------------------------------------------------------------------------\r
-</CYPRESSTAG>\r
-</CYPRESSTAG>\r
-</CYPRESSTAG>\r
-Digital component placer commit/Report: Elapsed time ==> 0s.014ms\r
-Digital Placement phase: Elapsed time ==> 2s.172ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Digital Routing">\r
-Routing successful.\r
-Digital Routing phase: Elapsed time ==> 3s.093ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Bitstream and API generation">\r
-Bitstream and API generation phase: Elapsed time ==> 0s.702ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Bitstream verification">\r
-Bitstream verification phase: Elapsed time ==> 0s.140ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Static timing analysis">\r
-Timing report is in USB_Bootloader_timing.html.\r
-Static timing analysis phase: Elapsed time ==> 0s.719ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Data reporting">\r
-Data reporting phase: Elapsed time ==> 0s.000ms\r
-</CYPRESSTAG>\r
-<CYPRESSTAG name="Database update...">\r
-Design database save phase: Elapsed time ==> 0s.406ms\r
-</CYPRESSTAG>\r
-cydsfit: Elapsed time ==> 8s.765ms\r
-</CYPRESSTAG>\r
-Fitter phase: Elapsed time ==> 8s.859ms\r
-API generation phase: Elapsed time ==> 3s.296ms\r
-Dependency generation phase: Elapsed time ==> 0s.016ms\r
-Cleanup phase: Elapsed time ==> 0s.047ms\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rt_log b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rt_log
deleted file mode 100755 (executable)
index cbf8613..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.rt_log
+++ /dev/null
@@ -1,22 +0,0 @@
-\r
-               SoftJin Router, Version 1.0\r
-\r
-I1203: Reading Design USB_Bootloader\r
-I1204: Reading netlist from file USB_Bootloader_r.vh2\r
-I1206: Completed Reading of file USB_Bootloader_r.vh2\r
-I1204: Reading placement from file USB_Bootloader.pco\r
-I1206: Completed Reading of file USB_Bootloader.pco\r
-I1204: Reading timing library from file USB_Bootloader_r.lib\r
-I1206: Completed Reading of file USB_Bootloader_r.lib\r
-I1204: Reading timing constraints from file USB_Bootloader.sdc\r
-I1206: Completed Reading of file USB_Bootloader.sdc\r
-I1204: Reading architecture from file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/route_arch-rrg.cydata\r
-I1206: Completed Reading of file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/route_arch-rrg.cydata\r
-I1209: Started routing\r
-I1223: Total Nets : 8 \r
-I1212: Iteration  1 :     0 unrouted : 0 seconds\r
-I1215: Routing is successful\r
-I1207: Completed routing\r
-I1210: Writing routes\r
-I1218: Exiting the router\r
-I1224: Total Time : 2 seconds\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdc
deleted file mode 100755 (executable)
index 9b30340..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdc
+++ /dev/null
@@ -1,14 +0,0 @@
-# THIS FILE IS AUTOMATICALLY GENERATED
-# Project: W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj
-# Date: Sat, 22 Mar 2014 12:32:56 GMT
-#set_units -time ns
-create_clock -name {CyIMO} -period 41.666666666666664 -waveform {0 20.8333333333333} [list [get_pins {ClockBlock/imo}]]
-create_clock -name {CyPLL_OUT} -period 15.625 -waveform {0 7.8125} [list [get_pins {ClockBlock/pllout}]]
-create_clock -name {CyILO} -period 10000 -waveform {0 5000} [list [get_pins {ClockBlock/ilo}] [get_pins {ClockBlock/clk_100k}] [get_pins {ClockBlock/clk_1k}] [get_pins {ClockBlock/clk_32k}]]
-create_clock -name {CyMASTER_CLK} -period 15.625 -waveform {0 7.8125} [list [get_pins {ClockBlock/clk_sync}]]
-create_generated_clock -name {CyBUS_CLK} -source [get_pins {ClockBlock/clk_sync}] -edges {1 2 3} [list [get_pins {ClockBlock/clk_bus_glb}]]
-
-
-# Component constraints for W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\TopDesign\TopDesign.cysch
-# Project: W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj
-# Date: Sat, 22 Mar 2014 12:32:47 GMT

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdf b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdf
deleted file mode 100755 (executable)
index 97e1414..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.sdf
+++ /dev/null
@@ -1,61 +0,0 @@
-(DELAYFILE
- (SDFVERSION "IEEE 1497 4.0")
- (DATE "2014-03-22T12:32:56Z")
- (DESIGN "USB_Bootloader")
- (VENDOR "Cypress Semiconductor")
- (PROGRAM "cydsfit")
- (VERSION "No Version Information Found")
- (DIVIDER .)
- (TIMESCALE 1 ns)
- (CELL
-  (CELLTYPE "USB_Bootloader")
-  (INSTANCE *)
-  (DELAY
-   (ABSOLUTE
-    (INTERCONNECT ClockBlock.clk_bus_glb SD_PULLUP\(0\).in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:arb_int\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb SD_PULLUP\(1\).in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb SD_PULLUP\(2\).in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb SD_PULLUP\(3\).in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb SD_PULLUP\(4\).in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:Dp\(0\)\\.in_clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:bus_reset\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:dp_int\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:ep_0\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:ep_1\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:ep_2\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT ClockBlock.clk_bus_glb \\USBFS\:sof_int\\.clock (0.000:0.000:0.000))
-    (INTERCONNECT \\USBFS\:USB\\.sof_int \\USBFS\:sof_int\\.interrupt (1.000:1.000:1.000))
-    (INTERCONNECT \\USBFS\:Dp\\.interrupt \\USBFS\:dp_int\\.interrupt (1.000:1.000:1.000))
-    (INTERCONNECT \\USBFS\:USB\\.arb_int \\USBFS\:arb_int\\.interrupt (1.000:1.000:1.000))
-    (INTERCONNECT \\USBFS\:USB\\.usb_int \\USBFS\:bus_reset\\.interrupt (1.000:1.000:1.000))
-    (INTERCONNECT \\USBFS\:USB\\.ept_int_0 \\USBFS\:ep_0\\.interrupt (1.000:1.000:1.000))
-    (INTERCONNECT \\USBFS\:USB\\.ept_int_1 \\USBFS\:ep_1\\.interrupt (9.058:9.058:9.058))
-    (INTERCONNECT \\USBFS\:USB\\.ept_int_2 \\USBFS\:ep_2\\.interrupt (9.092:9.092:9.092))
-    (INTERCONNECT SCSI_Out\(0\)_PAD SCSI_Out\(0\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(1\)_PAD SCSI_Out\(1\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(2\)_PAD SCSI_Out\(2\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(3\)_PAD SCSI_Out\(3\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(4\)_PAD SCSI_Out\(4\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(5\)_PAD SCSI_Out\(5\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(6\)_PAD SCSI_Out\(6\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(7\)_PAD SCSI_Out\(7\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(8\)_PAD SCSI_Out\(8\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out\(9\)_PAD SCSI_Out\(9\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(0\)_PAD SCSI_Out_DBx\(0\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(1\)_PAD SCSI_Out_DBx\(1\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(2\)_PAD SCSI_Out_DBx\(2\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(3\)_PAD SCSI_Out_DBx\(3\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(4\)_PAD SCSI_Out_DBx\(4\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(5\)_PAD SCSI_Out_DBx\(5\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(6\)_PAD SCSI_Out_DBx\(6\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SCSI_Out_DBx\(7\)_PAD SCSI_Out_DBx\(7\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SD_PULLUP\(0\)_PAD SD_PULLUP\(0\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SD_PULLUP\(1\)_PAD SD_PULLUP\(1\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SD_PULLUP\(2\)_PAD SD_PULLUP\(2\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SD_PULLUP\(3\)_PAD SD_PULLUP\(3\).pad_in (0.000:0.000:0.000))
-    (INTERCONNECT SD_PULLUP\(4\)_PAD SD_PULLUP\(4\).pad_in (0.000:0.000:0.000))
-   )
-  )
- )
-)

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.svd b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.svd
deleted file mode 100755 (executable)
index 2171fc7..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.svd
+++ /dev/null
@@ -1,494 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>\r
-<device schemaVersion="1.0" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd">\r
-  <name>CY8C5267AXI_LP051</name>\r
-  <version>0.1</version>\r
-  <description>CY8C52LP</description>\r
-  <addressUnitBits>8</addressUnitBits>\r
-  <width>32</width>\r
-  <peripherals>\r
-    <peripheral>\r
-      <name>USBFS</name>\r
-      <description>USBFS</description>\r
-      <baseAddress>0x40004394</baseAddress>\r
-      <addressBlock>\r
-        <offset>0</offset>\r
-        <size>0x1D0A</size>\r
-        <usage>registers</usage>\r
-      </addressBlock>\r
-      <registers>\r
-        <register>\r
-          <name>USBFS_PM_USB_CR0</name>\r
-          <description>USB Power Mode Control Register 0</description>\r
-          <addressOffset>0x0</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>fsusbio_ref_en</name>\r
-              <description>No description available</description>\r
-              <lsb>0</lsb>\r
-              <msb>0</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>fsusbio_pd_n</name>\r
-              <description>No description available</description>\r
-              <lsb>1</lsb>\r
-              <msb>1</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>fsusbio_pd_pullup_n</name>\r
-              <description>No description available</description>\r
-              <lsb>2</lsb>\r
-              <msb>2</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PM_ACT_CFG</name>\r
-          <description>Active Power Mode Configuration Register</description>\r
-          <addressOffset>0x11</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PM_STBY_CFG</name>\r
-          <description>Standby Power Mode Configuration Register</description>\r
-          <addressOffset>0x21</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PRT_PS</name>\r
-          <description>Port Pin State Register</description>\r
-          <addressOffset>0xE5D</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>PinState_DP</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>6</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-            <field>\r
-              <name>PinState_DM</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PRT_DM0</name>\r
-          <description>Port Drive Mode Register</description>\r
-          <addressOffset>0xE5E</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>DriveMode_DP</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>6</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>DriveMode_DM</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PRT_DM1</name>\r
-          <description>Port Drive Mode Register</description>\r
-          <addressOffset>0xE5F</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>PullUp_en_DP</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>6</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>PullUp_en_DM</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_PRT_INP_DIS</name>\r
-          <description>Input buffer disable override</description>\r
-          <addressOffset>0xE64</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>seinput_dis_dp</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>6</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>seinput_dis_dm</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR0</name>\r
-          <description>bmRequestType</description>\r
-          <addressOffset>0x1C6C</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR1</name>\r
-          <description>bRequest</description>\r
-          <addressOffset>0x1C6D</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR2</name>\r
-          <description>wValueLo</description>\r
-          <addressOffset>0x1C6E</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR3</name>\r
-          <description>wValueHi</description>\r
-          <addressOffset>0x1C6F</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR4</name>\r
-          <description>wIndexLo</description>\r
-          <addressOffset>0x1C70</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR5</name>\r
-          <description>wIndexHi</description>\r
-          <addressOffset>0x1C71</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR6</name>\r
-          <description>lengthLo</description>\r
-          <addressOffset>0x1C72</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP0_DR7</name>\r
-          <description>lengthHi</description>\r
-          <addressOffset>0x1C73</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_CR0</name>\r
-          <description>USB Control Register 0</description>\r
-          <addressOffset>0x1C74</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>device_address</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>0</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-            <field>\r
-              <name>usb_enable</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_CR1</name>\r
-          <description>USB Control Register 1</description>\r
-          <addressOffset>0x1C75</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>reg_enable</name>\r
-              <description>No description available</description>\r
-              <lsb>0</lsb>\r
-              <msb>0</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>enable_lock</name>\r
-              <description>No description available</description>\r
-              <lsb>1</lsb>\r
-              <msb>1</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>bus_activity</name>\r
-              <description>No description available</description>\r
-              <lsb>2</lsb>\r
-              <msb>2</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>trim_offset_msb</name>\r
-              <description>No description available</description>\r
-              <lsb>3</lsb>\r
-              <msb>3</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP1_CR0</name>\r
-          <description>The Endpoint1 Control Register</description>\r
-          <addressOffset>0x1C7A</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_USBIO_CR0</name>\r
-          <description>USBIO Control Register 0</description>\r
-          <addressOffset>0x1C7C</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>rd</name>\r
-              <description>No description available</description>\r
-              <lsb>0</lsb>\r
-              <msb>0</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-            <field>\r
-              <name>td</name>\r
-              <description>No description available</description>\r
-              <lsb>5</lsb>\r
-              <msb>5</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>tse0</name>\r
-              <description>No description available</description>\r
-              <lsb>6</lsb>\r
-              <msb>6</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>ten</name>\r
-              <description>No description available</description>\r
-              <lsb>7</lsb>\r
-              <msb>7</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_USBIO_CR1</name>\r
-          <description>USBIO Control Register 1</description>\r
-          <addressOffset>0x1C7E</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-          <fields>\r
-            <field>\r
-              <name>dmo</name>\r
-              <description>No description available</description>\r
-              <lsb>0</lsb>\r
-              <msb>0</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-            <field>\r
-              <name>dpo</name>\r
-              <description>No description available</description>\r
-              <lsb>1</lsb>\r
-              <msb>1</msb>\r
-              <access>read-only</access>\r
-            </field>\r
-            <field>\r
-              <name>usbpuen</name>\r
-              <description>No description available</description>\r
-              <lsb>2</lsb>\r
-              <msb>2</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-            <field>\r
-              <name>iomode</name>\r
-              <description>No description available</description>\r
-              <lsb>5</lsb>\r
-              <msb>5</msb>\r
-              <access>read-write</access>\r
-            </field>\r
-          </fields>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP2_CR0</name>\r
-          <description>The Endpoint2 Control Register</description>\r
-          <addressOffset>0x1C8A</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP3_CR0</name>\r
-          <description>The Endpoint3 Control Register</description>\r
-          <addressOffset>0x1C9A</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP4_CR0</name>\r
-          <description>The Endpoint4 Control Register</description>\r
-          <addressOffset>0x1CAA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP5_CR0</name>\r
-          <description>The Endpoint5 Control Register</description>\r
-          <addressOffset>0x1CBA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP6_CR0</name>\r
-          <description>The Endpoint6 Control Register</description>\r
-          <addressOffset>0x1CCA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP7_CR0</name>\r
-          <description>The Endpoint7 Control Register</description>\r
-          <addressOffset>0x1CDA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_SIE_EP8_CR0</name>\r
-          <description>The Endpoint8 Control Register</description>\r
-          <addressOffset>0x1CEA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_BUF_SIZE</name>\r
-          <description>Dedicated Endpoint Buffer Size Register</description>\r
-          <addressOffset>0x1CF8</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP_ACTIVE</name>\r
-          <description>Endpoint Active Indication Register</description>\r
-          <addressOffset>0x1CFA</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_EP_TYPE</name>\r
-          <description>Endpoint Type (IN/OUT) Indication</description>\r
-          <addressOffset>0x1CFB</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-        <register>\r
-          <name>USBFS_USB_CLK_EN</name>\r
-          <description>USB Block Clock Enable Register</description>\r
-          <addressOffset>0x1D09</addressOffset>\r
-          <size>8</size>\r
-          <access>read-write</access>\r
-          <resetValue>0</resetValue>\r
-          <resetMask>0</resetMask>\r
-        </register>\r
-      </registers>\r
-    </peripheral>\r
-  </peripherals>\r
-</device>
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.tr b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.tr
deleted file mode 100755 (executable)
index b1f0bab..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.tr
+++ /dev/null
@@ -1,98 +0,0 @@
-##################################################################### \r
-                    Table of Contents\r
-===================================================================== \r
-       1::Clock Frequency Summary\r
-       2::Clock Relationship Summary\r
-       3::Datasheet Report\r
-               3.1::Setup to Clock\r
-               3.2::Clock to Out\r
-               3.3::Pad to Pad\r
-       4::Path Details for Clock Frequency Summary\r
-       5::Path Details for Clock Relationship Summary\r
-===================================================================== \r
-                    End of Table of Contents\r
-##################################################################### \r
-\r
-##################################################################### \r
-                    1::Clock Frequency Summary\r
-===================================================================== \r
-Number of clocks: 5\r
-Clock: CyBUS_CLK     | N/A  | Target: 64.00 MHz  | \r
-Clock: CyILO         | N/A  | Target: 0.10 MHz   | \r
-Clock: CyIMO         | N/A  | Target: 24.00 MHz  | \r
-Clock: CyMASTER_CLK  | N/A  | Target: 64.00 MHz  | \r
-Clock: CyPLL_OUT     | N/A  | Target: 64.00 MHz  | \r
-\r
- =====================================================================\r
-                    End of Clock Frequency Summary\r
- #####################################################################\r
-\r
-\r
- #####################################################################\r
-                    2::Clock Relationship Summary\r
- =====================================================================\r
-\r
-Launch Clock  Capture Clock  Constraint(R-R)  Slack(R-R)  Constraint(R-F)  Slack(R-F)  Constraint(F-F)  Slack(F-F)  Constraint(F-R)  Slack(F-R)  \r
-\r
- =====================================================================\r
-                    End of Clock Relationship Summary\r
- #####################################################################\r
-\r
-\r
- #####################################################################\r
-                    3::Datasheet Report\r
-\r
-All values are in Picoseconds\r
- =====================================================================\r
-\r
-3.1::Setup to Clock                     \r
--------------------                     \r
-\r
-Port Name  Setup to Clk  Clock Name:Phase  \r
----------  ------------  ----------------  \r
-\r
-\r
------------------------3.2::Clock to Out\r
-----------------------------------------\r
-\r
-Port Name  Clock to Out  Clock Name:Phase  \r
----------  ------------  ----------------  \r
-\r
-\r
--------------------------3.3::Pad to Pad\r
-----------------------------------------\r
-\r
-Port Name (Source)  Port Name (Destination)  Delay  \r
-------------------  -----------------------  -----  \r
-\r
-===================================================================== \r
-                    End of Datasheet Report\r
-##################################################################### \r
-##################################################################### \r
-                    4::Path Details for Clock Frequency Summary\r
-\r
-===================================================================== \r
-                    End of Path Details for Clock Frequency Summary\r
-##################################################################### \r
-\r
-\r
-##################################################################### \r
-                    5::Path Details for Clock Relationship Summary\r
-===================================================================== \r
-\r
-\r
-===================================================================== \r
-                    End of Path Details for Clock Relationship Summary\r
-##################################################################### \r
-\r
-##################################################################### \r
-                    Detailed Report for all timing paths \r
-===================================================================== \r
-===================================================================== \r
-                    End of Detailed Report for all timing paths \r
-##################################################################### \r
-\r
-##################################################################### \r
-                    End of Timing Report \r
-##################################################################### \r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.v b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.v
deleted file mode 100755 (executable)
index ad431b1..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.v
+++ /dev/null
@@ -1,539 +0,0 @@
-// ======================================================================\r
-// USB_Bootloader.v generated from TopDesign.cysch\r
-// 03/22/2014 at 22:32\r
-// This file is auto generated. ANY EDITS YOU MAKE MAY BE LOST WHEN THIS FILE IS REGENERATED!!!\r
-// ======================================================================\r
-\r
-/* -- WARNING: The following section of defines are deprecated and will be removed in a future release -- */\r
-`define CYDEV_CHIP_DIE_LEOPARD 1\r
-`define CYDEV_CHIP_REV_LEOPARD_PRODUCTION 3\r
-`define CYDEV_CHIP_REV_LEOPARD_ES3 3\r
-`define CYDEV_CHIP_REV_LEOPARD_ES2 1\r
-`define CYDEV_CHIP_REV_LEOPARD_ES1 0\r
-`define CYDEV_CHIP_DIE_PSOC4A 2\r
-`define CYDEV_CHIP_REV_PSOC4A_PRODUCTION 17\r
-`define CYDEV_CHIP_REV_PSOC4A_ES0 17\r
-`define CYDEV_CHIP_DIE_PANTHER 3\r
-`define CYDEV_CHIP_REV_PANTHER_PRODUCTION 1\r
-`define CYDEV_CHIP_REV_PANTHER_ES1 1\r
-`define CYDEV_CHIP_REV_PANTHER_ES0 0\r
-`define CYDEV_CHIP_DIE_PSOC5LP 4\r
-`define CYDEV_CHIP_REV_PSOC5LP_PRODUCTION 0\r
-`define CYDEV_CHIP_REV_PSOC5LP_ES0 0\r
-`define CYDEV_CHIP_DIE_EXPECT 4\r
-`define CYDEV_CHIP_REV_EXPECT 0\r
-`define CYDEV_CHIP_DIE_ACTUAL 4\r
-/* -- WARNING: The previous section of defines are deprecated and will be removed in a future release -- */\r
-`define CYDEV_CHIP_FAMILY_UNKNOWN 0\r
-`define CYDEV_CHIP_MEMBER_UNKNOWN 0\r
-`define CYDEV_CHIP_FAMILY_PSOC3 1\r
-`define CYDEV_CHIP_MEMBER_3A 1\r
-`define CYDEV_CHIP_REVISION_3A_PRODUCTION 3\r
-`define CYDEV_CHIP_REVISION_3A_ES3 3\r
-`define CYDEV_CHIP_REVISION_3A_ES2 1\r
-`define CYDEV_CHIP_REVISION_3A_ES1 0\r
-`define CYDEV_CHIP_FAMILY_PSOC4 2\r
-`define CYDEV_CHIP_MEMBER_4A 2\r
-`define CYDEV_CHIP_REVISION_4A_PRODUCTION 17\r
-`define CYDEV_CHIP_REVISION_4A_ES0 17\r
-`define CYDEV_CHIP_FAMILY_PSOC5 3\r
-`define CYDEV_CHIP_MEMBER_5A 3\r
-`define CYDEV_CHIP_REVISION_5A_PRODUCTION 1\r
-`define CYDEV_CHIP_REVISION_5A_ES1 1\r
-`define CYDEV_CHIP_REVISION_5A_ES0 0\r
-`define CYDEV_CHIP_MEMBER_5B 4\r
-`define CYDEV_CHIP_REVISION_5B_PRODUCTION 0\r
-`define CYDEV_CHIP_REVISION_5B_ES0 0\r
-`define CYDEV_CHIP_FAMILY_USED 3\r
-`define CYDEV_CHIP_MEMBER_USED 4\r
-`define CYDEV_CHIP_REVISION_USED 0\r
-// USBFS_v2_60(AudioDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="Audio">       <Nodes />     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, CDCDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="CDC">       <Nodes />     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, DeviceDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="Device">       <Nodes>         <DescriptorNode Key="USBDescriptor77">           <Value d6p1:type="DeviceDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>DEVICE</bDescriptorType>             <bLength>18</bLength>             <iwManufacturer>75</iwManufacturer>             <iwProduct>76</iwProduct>             <sManufacturer>Cypress Semiconductor</sManufacturer>             <sProduct>PSoC3 Bootloader</sProduct>             <sSerialNumber>0001</sSerialNumber>             <bDeviceClass>0</bDeviceClass>             <bDeviceSubClass>0</bDeviceSubClass>             <bDeviceProtocol>0</bDeviceProtocol>             <bMaxPacketSize0>0</bMaxPacketSize0>             <idVendor>1204</idVendor>             <idProduct>46877</idProduct>             <bcdDevice>12289</bcdDevice>             <iManufacturer>1</iManufacturer>             <iProduct>2</iProduct>             <iSerialNumber>0</iSerialNumber>             <bNumConfigurations>1</bNumConfigurations>             <bMemoryMgmt>0</bMemoryMgmt>             <bMemoryAlloc>0</bMemoryAlloc>           </Value>           <Nodes>             <DescriptorNode Key="USBDescriptor82">               <Value d8p1:type="ConfigDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>CONFIGURATION</bDescriptorType>                 <bLength>9</bLength>                 <iwConfiguration>0</iwConfiguration>                 <wTotalLength>41</wTotalLength>                 <bNumInterfaces>1</bNumInterfaces>                 <bConfigurationValue>0</bConfigurationValue>                 <iConfiguration>0</iConfiguration>                 <bmAttributes>128</bmAttributes>                 <bMaxPower>0</bMaxPower>               </Value>               <Nodes>                 <DescriptorNode Key="Interface86">                   <Value d10p1:type="InterfaceGeneralDescriptor" xmlns:d10p1="http://www.w3.org/2001/XMLSchema-instance">                     <bDescriptorType>ALTERNATE</bDescriptorType>                     <bLength>0</bLength>                     <DisplayName />                   </Value>                   <Nodes>                     <DescriptorNode Key="USBDescriptor87">                       <Value d12p1:type="InterfaceDescriptor" xmlns:d12p1="http://www.w3.org/2001/XMLSchema-instance">                         <bDescriptorType>INTERFACE</bDescriptorType>                         <bLength>9</bLength>                         <iwInterface>76</iwInterface>                         <bInterfaceClass>3</bInterfaceClass>                         <bNumEndpoints>2</bNumEndpoints>                         <bInterfaceSubClass>0</bInterfaceSubClass>                         <bInterfaceProtocol>0</bInterfaceProtocol>                         <iInterface>2</iInterface>                         <sInterface>PSoC3 Bootloader</sInterface>                       </Value>                       <Nodes>                         <DescriptorNode Key="USBDescriptor89">                           <Value d14p1:type="EndpointDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">                             <bDescriptorType>ENDPOINT</bDescriptorType>                             <bLength>7</bLength>                             <DoubleBuffer>false</DoubleBuffer>                             <bInterval>1</bInterval>                             <bEndpointAddress>1</bEndpointAddress>                             <bmAttributes>3</bmAttributes>                             <wMaxPacketSize>64</wMaxPacketSize>                           </Value>                           <Nodes />                         </DescriptorNode>                         <DescriptorNode Key="USBDescriptor90">                           <Value d14p1:type="HIDDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">                             <bDescriptorType>HID</bDescriptorType>                             <bLength>9</bLength>                             <bReportIndex>1</bReportIndex>                             <wReportIndex>55</wReportIndex>                             <bcdHID>0</bcdHID>                             <bCountryCode>0</bCountryCode>                             <bNumDescriptors>1</bNumDescriptors>                             <bDescriptorType1>34</bDescriptorType1>                             <wDescriptorLength>36</wDescriptorLength>                           </Value>                           <Nodes />                         </DescriptorNode>                         <DescriptorNode Key="USBDescriptor91">                           <Value d14p1:type="EndpointDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">                             <bDescriptorType>ENDPOINT</bDescriptorType>                             <bLength>7</bLength>                             <DoubleBuffer>false</DoubleBuffer>                             <bInterval>1</bInterval>                             <bEndpointAddress>130</bEndpointAddress>                             <bmAttributes>3</bmAttributes>                             <wMaxPacketSize>64</wMaxPacketSize>                           </Value>                           <Nodes />                         </DescriptorNode>                       </Nodes>                     </DescriptorNode>                   </Nodes>                 </DescriptorNode>               </Nodes>             </DescriptorNode>           </Nodes>         </DescriptorNode>       </Nodes>     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, EnableCDCApi=true, EnableMidiApi=true, endpointMA=0, endpointMM=0, extern_cls=false, extern_vbus=false, extern_vnd=false, extJackCount=0, HIDReportDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="HIDReport">       <Nodes>         <DescriptorNode Key="USBDescriptor55">           <Value d6p1:type="HIDReportDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>HID_REPORT</bDescriptorType>             <bLength>2</bLength>             <Name>Generic HID</Name>             <wLength>36</wLength>           </Value>           <Nodes>             <DescriptorNode Key="USBDescriptor56">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="4" Type="USAGE_PAGE">                   <Description>(Generic Desktop Controls)</Description>                   <Value>                     <unsignedByte>5</unsignedByte>                     <unsignedByte>1</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor57">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="8" Type="USAGE">                   <Description>(Undefined)</Description>                   <Value>                     <unsignedByte>9</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor58">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="160" Type="COLLECTION">                   <Description>(Physical)</Description>                   <Value>                     <unsignedByte>161</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor59">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="8" Type="USAGE">                   <Description>(Undefined)</Description>                   <Value>                     <unsignedByte>9</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor60">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="160" Type="COLLECTION">                   <Description>(Physical)</Description>                   <Value>                     <unsignedByte>161</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor61">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="8" Type="USAGE">                   <Description>(Undefined)</Description>                   <Value>                     <unsignedByte>9</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor62">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="20" Type="LOGICAL_MINIMUM">                   <Value>                     <unsignedByte>21</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor63">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="36" Type="LOGICAL_MAXIMUM">                   <Value>                     <unsignedByte>37</unsignedByte>                     <unsignedByte>255</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor64">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="116" Type="REPORT_SIZE">                   <Value>                     <unsignedByte>117</unsignedByte>                     <unsignedByte>8</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor65">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="148" Type="REPORT_COUNT">                   <Value>                     <unsignedByte>149</unsignedByte>                     <unsignedByte>64</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor66">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="144" Type="OUTPUT">                   <Description>(Var)</Description>                   <Value>                     <unsignedByte>145</unsignedByte>                     <unsignedByte>2</unsignedByte>                   </Value>                   <Kind>Bits</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor67">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="8" Type="USAGE">                   <Description>(Undefined)</Description>                   <Value>                     <unsignedByte>9</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>List</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor68">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="20" Type="LOGICAL_MINIMUM">                   <Value>                     <unsignedByte>21</unsignedByte>                     <unsignedByte>0</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor69">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="36" Type="LOGICAL_MAXIMUM">                   <Value>                     <unsignedByte>37</unsignedByte>                     <unsignedByte>255</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor70">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="116" Type="REPORT_SIZE">                   <Value>                     <unsignedByte>117</unsignedByte>                     <unsignedByte>8</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor71">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="148" Type="REPORT_COUNT">                   <Value>                     <unsignedByte>149</unsignedByte>                     <unsignedByte>64</unsignedByte>                   </Value>                   <Kind>Int</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor72">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="128" Type="INPUT">                   <Description>(Var)</Description>                   <Value>                     <unsignedByte>129</unsignedByte>                     <unsignedByte>2</unsignedByte>                   </Value>                   <Kind>Bits</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor73">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="192" Type="END_COLLECTION">                   <Value>                     <unsignedByte>192</unsignedByte>                   </Value>                   <Kind>None</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>             <DescriptorNode Key="USBDescriptor74">               <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">                 <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>                 <bLength>1</bLength>                 <Item Code="192" Type="END_COLLECTION">                   <Value>                     <unsignedByte>192</unsignedByte>                   </Value>                   <Kind>None</Kind>                 </Item>               </Value>               <Nodes />             </DescriptorNode>           </Nodes>         </DescriptorNode>       </Nodes>     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, max_interfaces_num=1, MidiDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="Midi">       <Nodes />     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, Mode=false, mon_vbus=false, out_sof=false, Pid=F232, rm_arb_int=false, rm_dma_1=true, rm_dma_2=true, rm_dma_3=true, rm_dma_4=true, rm_dma_5=true, rm_dma_6=true, rm_dma_7=true, rm_dma_8=true, rm_dp_int=false, rm_ep_isr_0=false, rm_ep_isr_1=false, rm_ep_isr_2=false, rm_ep_isr_3=true, rm_ep_isr_4=true, rm_ep_isr_5=true, rm_ep_isr_6=true, rm_ep_isr_7=true, rm_ep_isr_8=true, rm_ord_int=true, rm_sof_int=false, rm_usb_int=false, StringDescriptors=<?xml version="1.0" encoding="utf-16"?> <Tree xmlns:CustomizerVersion="2_60">   <Tree_x0020_Descriptors>     <DescriptorNode Key="String">       <Nodes>         <DescriptorNode Key="LANGID">           <Value d6p1:type="StringZeroDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>STRING</bDescriptorType>             <bLength>4</bLength>             <wLANGID>1033</wLANGID>           </Value>           <Nodes />         </DescriptorNode>         <DescriptorNode Key="USBDescriptor75">           <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>STRING</bDescriptorType>             <bLength>44</bLength>             <snType>USER_ENTERED_TEXT</snType>             <bString>Cypress Semiconductor</bString>             <bUsed>false</bUsed>           </Value>           <Nodes />         </DescriptorNode>         <DescriptorNode Key="USBDescriptor76">           <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>STRING</bDescriptorType>             <bLength>34</bLength>             <snType>USER_ENTERED_TEXT</snType>             <bString>PSoC3 Bootloader</bString>             <bUsed>false</bUsed>           </Value>           <Nodes />         </DescriptorNode>       </Nodes>     </DescriptorNode>     <DescriptorNode Key="SpecialString">       <Nodes>         <DescriptorNode Key="Serial">           <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>STRING</bDescriptorType>             <bLength>10</bLength>             <snType>USER_ENTERED_TEXT</snType>             <bString>0001</bString>             <bUsed>true</bUsed>           </Value>           <Nodes />         </DescriptorNode>         <DescriptorNode Key="EE">           <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">             <bDescriptorType>STRING</bDescriptorType>             <bLength>16</bLength>             <snType>USER_ENTERED_TEXT</snType>             <bString>MSFT100</bString>             <bUsed>false</bUsed>           </Value>           <Nodes />         </DescriptorNode>       </Nodes>     </DescriptorNode>   </Tree_x0020_Descriptors> </Tree>, Vid=04B4, CY_COMPONENT_NAME=USBFS_v2_60, CY_CONTROL_FILE=<:default:>, CY_FITTER_NAME=USBFS, CY_INSTANCE_SHORT_NAME=USBFS, CY_MAJOR_VERSION=2, CY_MINOR_VERSION=60, CY_REMOVE=false, CY_SUPPRESS_API_GEN=false, CY_VERSION=cydsfit No Version Information Found, INSTANCE_NAME=USBFS, )\r
-module USBFS_v2_60_0 (\r
-    sof,\r
-    vbusdet);\r
-    output      sof;\r
-    input       vbusdet;\r
-\r
-\r
-          wire [7:0] dma_req;\r
-          wire [8:0] ept_int;\r
-          wire  Net_1106;\r
-          wire [7:0] Net_1105;\r
-          wire  Net_1104;\r
-          wire  Net_1103;\r
-          wire  Net_1102;\r
-          wire  Net_1101;\r
-          wire  Net_1100;\r
-          wire  Net_1099;\r
-          wire  Net_1098;\r
-          wire  Net_1097;\r
-          wire  Net_1096;\r
-          wire  Net_1013;\r
-          wire  Net_1014;\r
-          wire  Net_1015;\r
-          wire  Net_1016;\r
-          wire  Net_1017;\r
-          wire  Net_1018;\r
-          wire  Net_1019;\r
-          wire  Net_1020;\r
-          wire  Net_1010;\r
-    electrical  Net_1000;\r
-          wire  Net_79;\r
-          wire  Net_81;\r
-          wire  Net_95;\r
-    electrical  Net_597;\r
-          wire  Net_824;\r
-\r
-    cy_psoc3_usb_v1_0 USB (\r
-        .dp(Net_1000),\r
-        .dm(Net_597),\r
-        .sof_int(sof),\r
-        .arb_int(Net_79),\r
-        .usb_int(Net_81),\r
-        .ept_int(ept_int[8:0]),\r
-        .ord_int(Net_95),\r
-        .dma_req(dma_req[7:0]),\r
-        .dma_termin(Net_824));\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               sof_int\r
-                (.int_signal(sof));\r
-\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               arb_int\r
-                (.int_signal(Net_79));\r
-\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               bus_reset\r
-                (.int_signal(Net_81));\r
-\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               ep_0\r
-                (.int_signal(ept_int[0:0]));\r
-\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               ep_1\r
-                (.int_signal(ept_int[1:1]));\r
-\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               ep_2\r
-                (.int_signal(ept_int[2:2]));\r
-\r
-\r
-       wire [0:0] tmpOE__Dm_net;\r
-       wire [0:0] tmpFB_0__Dm_net;\r
-       wire [0:0] tmpIO_0__Dm_net;\r
-       wire [0:0] tmpINTERRUPT_0__Dm_net;\r
-       electrical [0:0] tmpSIOVREF__Dm_net;\r
-\r
-       cy_psoc3_pins_v1_10\r
-               #(.id("f9248435-5d3e-4e4d-bbae-bdae8795c3dd/8b77a6c4-10a0-4390-971c-672353e2a49c"),\r
-                 .drive_mode(3'b000),\r
-                 .ibuf_enabled(1'b0),\r
-                 .init_dr_st(1'b0),\r
-                 .input_clk_en(0),\r
-                 .input_sync(1'b1),\r
-                 .input_sync_mode(1'b0),\r
-                 .intr_mode(2'b00),\r
-                 .invert_in_clock(0),\r
-                 .invert_in_clock_en(0),\r
-                 .invert_in_reset(0),\r
-                 .invert_out_clock(0),\r
-                 .invert_out_clock_en(0),\r
-                 .invert_out_reset(0),\r
-                 .io_voltage(""),\r
-                 .layout_mode("NONCONTIGUOUS"),\r
-                 .oe_conn(1'b0),\r
-                 .oe_reset(0),\r
-                 .oe_sync(1'b0),\r
-                 .output_clk_en(0),\r
-                 .output_clock_mode(1'b0),\r
-                 .output_conn(1'b0),\r
-                 .output_mode(1'b0),\r
-                 .output_reset(0),\r
-                 .output_sync(1'b0),\r
-                 .pa_in_clock(-1),\r
-                 .pa_in_clock_en(-1),\r
-                 .pa_in_reset(-1),\r
-                 .pa_out_clock(-1),\r
-                 .pa_out_clock_en(-1),\r
-                 .pa_out_reset(-1),\r
-                 .pin_aliases(""),\r
-                 .pin_mode("A"),\r
-                 .por_state(4),\r
-                 .use_annotation(1'b0),\r
-                 .sio_group_cnt(0),\r
-                 .sio_hyst(1'b0),\r
-                 .sio_ibuf(""),\r
-                 .sio_info(2'b00),\r
-                 .sio_obuf(""),\r
-                 .sio_refsel(""),\r
-                 .sio_vtrip(""),\r
-                 .slew_rate(1'b0),\r
-                 .spanning(1),\r
-                 .vtrip(2'b10),\r
-                 .width(1))\r
-               Dm\r
-                (.oe(tmpOE__Dm_net),\r
-                 .y({1'b0}),\r
-                 .fb({tmpFB_0__Dm_net[0:0]}),\r
-                 .analog({Net_597}),\r
-                 .io({tmpIO_0__Dm_net[0:0]}),\r
-                 .siovref(tmpSIOVREF__Dm_net),\r
-                 .interrupt({tmpINTERRUPT_0__Dm_net[0:0]}),\r
-                 .in_clock({1'b0}),\r
-                 .in_clock_en({1'b1}),\r
-                 .in_reset({1'b0}),\r
-                 .out_clock({1'b0}),\r
-                 .out_clock_en({1'b1}),\r
-                 .out_reset({1'b0}));\r
-\r
-       assign tmpOE__Dm_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};\r
-\r
-       wire [0:0] tmpOE__Dp_net;\r
-       wire [0:0] tmpFB_0__Dp_net;\r
-       wire [0:0] tmpIO_0__Dp_net;\r
-       electrical [0:0] tmpSIOVREF__Dp_net;\r
-\r
-       cy_psoc3_pins_v1_10\r
-               #(.id("f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42"),\r
-                 .drive_mode(3'b000),\r
-                 .ibuf_enabled(1'b0),\r
-                 .init_dr_st(1'b0),\r
-                 .input_clk_en(0),\r
-                 .input_sync(1'b1),\r
-                 .input_sync_mode(1'b0),\r
-                 .intr_mode(2'b10),\r
-                 .invert_in_clock(0),\r
-                 .invert_in_clock_en(0),\r
-                 .invert_in_reset(0),\r
-                 .invert_out_clock(0),\r
-                 .invert_out_clock_en(0),\r
-                 .invert_out_reset(0),\r
-                 .io_voltage(""),\r
-                 .layout_mode("CONTIGUOUS"),\r
-                 .oe_conn(1'b0),\r
-                 .oe_reset(0),\r
-                 .oe_sync(1'b0),\r
-                 .output_clk_en(0),\r
-                 .output_clock_mode(1'b0),\r
-                 .output_conn(1'b0),\r
-                 .output_mode(1'b0),\r
-                 .output_reset(0),\r
-                 .output_sync(1'b0),\r
-                 .pa_in_clock(-1),\r
-                 .pa_in_clock_en(-1),\r
-                 .pa_in_reset(-1),\r
-                 .pa_out_clock(-1),\r
-                 .pa_out_clock_en(-1),\r
-                 .pa_out_reset(-1),\r
-                 .pin_aliases(""),\r
-                 .pin_mode("I"),\r
-                 .por_state(4),\r
-                 .use_annotation(1'b0),\r
-                 .sio_group_cnt(0),\r
-                 .sio_hyst(1'b0),\r
-                 .sio_ibuf(""),\r
-                 .sio_info(2'b00),\r
-                 .sio_obuf(""),\r
-                 .sio_refsel(""),\r
-                 .sio_vtrip(""),\r
-                 .slew_rate(1'b0),\r
-                 .spanning(0),\r
-                 .vtrip(2'b00),\r
-                 .width(1))\r
-               Dp\r
-                (.oe(tmpOE__Dp_net),\r
-                 .y({1'b0}),\r
-                 .fb({tmpFB_0__Dp_net[0:0]}),\r
-                 .analog({Net_1000}),\r
-                 .io({tmpIO_0__Dp_net[0:0]}),\r
-                 .siovref(tmpSIOVREF__Dp_net),\r
-                 .interrupt({Net_1010}),\r
-                 .in_clock({1'b0}),\r
-                 .in_clock_en({1'b1}),\r
-                 .in_reset({1'b0}),\r
-                 .out_clock({1'b0}),\r
-                 .out_clock_en({1'b1}),\r
-                 .out_reset({1'b0}));\r
-\r
-       assign tmpOE__Dp_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};\r
-\r
-\r
-       cy_isr_v1_0\r
-               #(.int_type(2'b10))\r
-               dp_int\r
-                (.int_signal(Net_1010));\r
-\r
-\r
-\r
-       cy_clock_v1_0\r
-               #(.id("f9248435-5d3e-4e4d-bbae-bdae8795c3dd/03f503a7-085a-4304-b786-de885b1c2f21"),\r
-                 .source_clock_id("75C2148C-3656-4d8a-846D-0CAE99AB6FF7"),\r
-                 .divisor(0),\r
-                 .period("0"),\r
-                 .is_direct(1),\r
-                 .is_digital(1))\r
-               Clock_vbus\r
-                (.clock_out(Net_1099));\r
-\r
-\r
-\r
-\r
-endmodule\r
-\r
-// top\r
-module top ;\r
-\r
-          wire  Net_88;\r
-          wire  Net_87;\r
-          wire  Net_86;\r
-          wire  Net_85;\r
-          wire  Net_84;\r
-    electrical  Net_36;\r
-    electrical  Net_35;\r
-    electrical  Net_34;\r
-    electrical  Net_33;\r
-    electrical  Net_32;\r
-    electrical  Net_31;\r
-    electrical  Net_30;\r
-    electrical  Net_29;\r
-    electrical  Net_28;\r
-    electrical  Net_27;\r
-    electrical [7:0] Net_37;\r
-          wire  Net_41;\r
-          wire  Net_40;\r
-\r
-    USBFS_v2_60_0 USBFS (\r
-        .sof(Net_40),\r
-        .vbusdet(1'b0));\r
-\r
-       wire [7:0] tmpOE__SCSI_Out_DBx_net;\r
-       wire [7:0] tmpFB_7__SCSI_Out_DBx_net;\r
-       wire [7:0] tmpIO_7__SCSI_Out_DBx_net;\r
-       wire [0:0] tmpINTERRUPT_0__SCSI_Out_DBx_net;\r
-       electrical [0:0] tmpSIOVREF__SCSI_Out_DBx_net;\r
-\r
-       cy_psoc3_pins_v1_10\r
-               #(.id("52f31aa9-2f0a-497d-9a1f-1424095e13e6"),\r
-                 .drive_mode(24'b110_110_110_110_110_110_110_110),\r
-                 .ibuf_enabled(8'b1_1_1_1_1_1_1_1),\r
-                 .init_dr_st(8'b0_0_0_0_0_0_0_0),\r
-                 .input_clk_en(0),\r
-                 .input_sync(8'b1_1_1_1_1_1_1_1),\r
-                 .input_sync_mode(8'b0_0_0_0_0_0_0_0),\r
-                 .intr_mode(16'b00_00_00_00_00_00_00_00),\r
-                 .invert_in_clock(0),\r
-                 .invert_in_clock_en(0),\r
-                 .invert_in_reset(0),\r
-                 .invert_out_clock(0),\r
-                 .invert_out_clock_en(0),\r
-                 .invert_out_reset(0),\r
-                 .io_voltage(", , , , , , , 5"),\r
-                 .layout_mode("NONCONTIGUOUS"),\r
-                 .oe_conn(8'b0_0_0_0_0_0_0_0),\r
-                 .oe_reset(0),\r
-                 .oe_sync(8'b0_0_0_0_0_0_0_0),\r
-                 .output_clk_en(0),\r
-                 .output_clock_mode(8'b0_0_0_0_0_0_0_0),\r
-                 .output_conn(8'b0_0_0_0_0_0_0_0),\r
-                 .output_mode(8'b0_0_0_0_0_0_0_0),\r
-                 .output_reset(0),\r
-                 .output_sync(8'b0_0_0_0_0_0_0_0),\r
-                 .pa_in_clock(-1),\r
-                 .pa_in_clock_en(-1),\r
-                 .pa_in_reset(-1),\r
-                 .pa_out_clock(-1),\r
-                 .pa_out_clock_en(-1),\r
-                 .pa_out_reset(-1),\r
-                 .pin_aliases("DB0,DB1,DB2,DB3,DB4,DB5,DB6,DB7"),\r
-                 .pin_mode("OOOOOOOO"),\r
-                 .por_state(4),\r
-                 .use_annotation(8'b1_1_1_1_1_1_1_1),\r
-                 .sio_group_cnt(0),\r
-                 .sio_hyst(8'b0_0_0_0_0_0_0_0),\r
-                 .sio_ibuf(""),\r
-                 .sio_info(16'b00_00_00_00_00_00_00_00),\r
-                 .sio_obuf(""),\r
-                 .sio_refsel(""),\r
-                 .sio_vtrip(""),\r
-                 .slew_rate(8'b0_0_0_0_0_0_0_0),\r
-                 .spanning(1),\r
-                 .vtrip(16'b10_10_10_10_10_10_10_10),\r
-                 .width(8))\r
-               SCSI_Out_DBx\r
-                (.oe(tmpOE__SCSI_Out_DBx_net),\r
-                 .y({8'b0}),\r
-                 .fb({tmpFB_7__SCSI_Out_DBx_net[7:0]}),\r
-                 .io({tmpIO_7__SCSI_Out_DBx_net[7:0]}),\r
-                 .siovref(tmpSIOVREF__SCSI_Out_DBx_net),\r
-                 .interrupt({tmpINTERRUPT_0__SCSI_Out_DBx_net[0:0]}),\r
-                 .annotation({Net_37[7:0]}),\r
-                 .in_clock({1'b0}),\r
-                 .in_clock_en({1'b1}),\r
-                 .in_reset({1'b0}),\r
-                 .out_clock({1'b0}),\r
-                 .out_clock_en({1'b1}),\r
-                 .out_reset({1'b0}));\r
-\r
-       assign tmpOE__SCSI_Out_DBx_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{8'b11111111} : {8'b11111111};\r
-\r
-       wire [9:0] tmpOE__SCSI_Out_net;\r
-       wire [9:0] tmpFB_9__SCSI_Out_net;\r
-       wire [9:0] tmpIO_9__SCSI_Out_net;\r
-       wire [0:0] tmpINTERRUPT_0__SCSI_Out_net;\r
-       electrical [0:0] tmpSIOVREF__SCSI_Out_net;\r
-\r
-       cy_psoc3_pins_v1_10\r
-               #(.id("11f071e8-9c92-47e0-872a-3f48765a75b8"),\r
-                 .drive_mode(30'b110_110_110_110_110_110_110_110_110_110),\r
-                 .ibuf_enabled(10'b1_1_1_1_1_1_1_1_1_1),\r
-                 .init_dr_st(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .input_clk_en(0),\r
-                 .input_sync(10'b1_1_1_1_1_1_1_1_1_1),\r
-                 .input_sync_mode(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .intr_mode(20'b00_00_00_00_00_00_00_00_00_00),\r
-                 .invert_in_clock(0),\r
-                 .invert_in_clock_en(0),\r
-                 .invert_in_reset(0),\r
-                 .invert_out_clock(0),\r
-                 .invert_out_clock_en(0),\r
-                 .invert_out_reset(0),\r
-                 .io_voltage("5, 5, 5, 5, 5, 5, 5, 5, 5, 5"),\r
-                 .layout_mode("NONCONTIGUOUS"),\r
-                 .oe_conn(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .oe_reset(0),\r
-                 .oe_sync(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .output_clk_en(0),\r
-                 .output_clock_mode(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .output_conn(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .output_mode(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .output_reset(0),\r
-                 .output_sync(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .pa_in_clock(-1),\r
-                 .pa_in_clock_en(-1),\r
-                 .pa_in_reset(-1),\r
-                 .pa_out_clock(-1),\r
-                 .pa_out_clock_en(-1),\r
-                 .pa_out_reset(-1),\r
-                 .pin_aliases("DBP_raw,ATN,BSY,ACK,RST,MSG,SEL,CD,REQ,IO_raw"),\r
-                 .pin_mode("OOOOOOOOOO"),\r
-                 .por_state(4),\r
-                 .use_annotation(10'b1_1_1_1_1_1_1_1_1_1),\r
-                 .sio_group_cnt(0),\r
-                 .sio_hyst(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .sio_ibuf(""),\r
-                 .sio_info(20'b00_00_00_00_00_00_00_00_00_00),\r
-                 .sio_obuf(""),\r
-                 .sio_refsel(""),\r
-                 .sio_vtrip(""),\r
-                 .slew_rate(10'b0_0_0_0_0_0_0_0_0_0),\r
-                 .spanning(1),\r
-                 .vtrip(20'b10_10_10_10_10_10_10_10_10_10),\r
-                 .width(10))\r
-               SCSI_Out\r
-                (.oe(tmpOE__SCSI_Out_net),\r
-                 .y({10'b0}),\r
-                 .fb({tmpFB_9__SCSI_Out_net[9:0]}),\r
-                 .io({tmpIO_9__SCSI_Out_net[9:0]}),\r
-                 .siovref(tmpSIOVREF__SCSI_Out_net),\r
-                 .interrupt({tmpINTERRUPT_0__SCSI_Out_net[0:0]}),\r
-                 .annotation({Net_36, Net_35, Net_34, Net_33, Net_32, Net_31, Net_30, Net_29, Net_28, Net_27}),\r
-                 .in_clock({1'b0}),\r
-                 .in_clock_en({1'b1}),\r
-                 .in_reset({1'b0}),\r
-                 .out_clock({1'b0}),\r
-                 .out_clock_en({1'b1}),\r
-                 .out_reset({1'b0}));\r
-\r
-       assign tmpOE__SCSI_Out_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{10'b1111111111} : {10'b1111111111};\r
-\r
-       wire [4:0] tmpOE__SD_PULLUP_net;\r
-       wire [4:0] tmpIO_4__SD_PULLUP_net;\r
-       wire [0:0] tmpINTERRUPT_0__SD_PULLUP_net;\r
-       electrical [0:0] tmpSIOVREF__SD_PULLUP_net;\r
-\r
-       cy_psoc3_pins_v1_10\r
-               #(.id("4c15b41e-e284-4978-99e7-5aaee19bd0ce"),\r
-                 .drive_mode(15'b010_010_010_010_010),\r
-                 .ibuf_enabled(5'b1_1_1_1_1),\r
-                 .init_dr_st(5'b1_1_1_1_1),\r
-                 .input_clk_en(0),\r
-                 .input_sync(5'b1_1_1_1_1),\r
-                 .input_sync_mode(5'b0_0_0_0_0),\r
-                 .intr_mode(10'b00_00_00_00_00),\r
-                 .invert_in_clock(0),\r
-                 .invert_in_clock_en(0),\r
-                 .invert_in_reset(0),\r
-                 .invert_out_clock(0),\r
-                 .invert_out_clock_en(0),\r
-                 .invert_out_reset(0),\r
-                 .io_voltage("3.3, , , , "),\r
-                 .layout_mode("CONTIGUOUS"),\r
-                 .oe_conn(5'b0_0_0_0_0),\r
-                 .oe_reset(0),\r
-                 .oe_sync(5'b0_0_0_0_0),\r
-                 .output_clk_en(0),\r
-                 .output_clock_mode(5'b0_0_0_0_0),\r
-                 .output_conn(5'b0_0_0_0_0),\r
-                 .output_mode(5'b0_0_0_0_0),\r
-                 .output_reset(0),\r
-                 .output_sync(5'b0_0_0_0_0),\r
-                 .pa_in_clock(-1),\r
-                 .pa_in_clock_en(-1),\r
-                 .pa_in_reset(-1),\r
-                 .pa_out_clock(-1),\r
-                 .pa_out_clock_en(-1),\r
-                 .pa_out_reset(-1),\r
-                 .pin_aliases(",,,,"),\r
-                 .pin_mode("IIIII"),\r
-                 .por_state(2),\r
-                 .use_annotation(5'b0_0_0_0_0),\r
-                 .sio_group_cnt(0),\r
-                 .sio_hyst(5'b0_0_0_0_0),\r
-                 .sio_ibuf(""),\r
-                 .sio_info(10'b00_00_00_00_00),\r
-                 .sio_obuf(""),\r
-                 .sio_refsel(""),\r
-                 .sio_vtrip(""),\r
-                 .slew_rate(5'b0_0_0_0_0),\r
-                 .spanning(0),\r
-                 .vtrip(10'b00_00_00_00_00),\r
-                 .width(5))\r
-               SD_PULLUP\r
-                (.oe(tmpOE__SD_PULLUP_net),\r
-                 .y({5'b0}),\r
-                 .fb({Net_88, Net_87, Net_86, Net_85, Net_84}),\r
-                 .io({tmpIO_4__SD_PULLUP_net[4:0]}),\r
-                 .siovref(tmpSIOVREF__SD_PULLUP_net),\r
-                 .interrupt({tmpINTERRUPT_0__SD_PULLUP_net[0:0]}),\r
-                 .in_clock({1'b0}),\r
-                 .in_clock_en({1'b1}),\r
-                 .in_reset({1'b0}),\r
-                 .out_clock({1'b0}),\r
-                 .out_clock_en({1'b1}),\r
-                 .out_reset({1'b0}));\r
-\r
-       assign tmpOE__SD_PULLUP_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{5'b11111} : {5'b11111};\r
-\r
-\r
-\r
-endmodule\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.vh2 b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.vh2
deleted file mode 100755 (executable)
index bf8fbe5..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.vh2
+++ /dev/null
@@ -1,546 +0,0 @@
---\r
---     Conversion of USB_Bootloader.v to vh2:\r
---\r
---     Cypress Semiconductor - WARP Version 6.3 IR 41\r
---     Sat Mar 22 22:32:48 2014\r
---\r
-\r
-USE cypress.cypress.all;\r
-USE cypress.rtlpkg.all;\r
-ENTITY top_RTL IS\r
-ATTRIBUTE part_name of top_RTL:TYPE IS "cpsoc3";\r
-END top_RTL;\r
---------------------------------------------------------\r
-ARCHITECTURE R_T_L OF top_RTL IS\r
-TERMINAL \USBFS:Net_1000\ : bit;\r
-TERMINAL \USBFS:Net_597\ : bit;\r
-SIGNAL Net_40 : bit;\r
-SIGNAL \USBFS:Net_79\ : bit;\r
-SIGNAL \USBFS:Net_81\ : bit;\r
-SIGNAL \USBFS:ept_int_8\ : bit;\r
-SIGNAL \USBFS:ept_int_7\ : bit;\r
-SIGNAL \USBFS:ept_int_6\ : bit;\r
-SIGNAL \USBFS:ept_int_5\ : bit;\r
-SIGNAL \USBFS:ept_int_4\ : bit;\r
-SIGNAL \USBFS:ept_int_3\ : bit;\r
-SIGNAL \USBFS:ept_int_2\ : bit;\r
-SIGNAL \USBFS:ept_int_1\ : bit;\r
-SIGNAL \USBFS:ept_int_0\ : bit;\r
-SIGNAL \USBFS:Net_95\ : bit;\r
-SIGNAL \USBFS:dma_req_7\ : bit;\r
-SIGNAL \USBFS:dma_req_6\ : bit;\r
-SIGNAL \USBFS:dma_req_5\ : bit;\r
-SIGNAL \USBFS:dma_req_4\ : bit;\r
-SIGNAL \USBFS:dma_req_3\ : bit;\r
-SIGNAL \USBFS:dma_req_2\ : bit;\r
-SIGNAL \USBFS:dma_req_1\ : bit;\r
-SIGNAL \USBFS:dma_req_0\ : bit;\r
-SIGNAL \USBFS:Net_824\ : bit;\r
-SIGNAL \USBFS:tmpOE__Dm_net_0\ : bit;\r
-SIGNAL zero : bit;\r
-SIGNAL \USBFS:tmpFB_0__Dm_net_0\ : bit;\r
-SIGNAL \USBFS:tmpIO_0__Dm_net_0\ : bit;\r
-TERMINAL \USBFS:tmpSIOVREF__Dm_net_0\ : bit;\r
-SIGNAL one : bit;\r
-SIGNAL \USBFS:tmpINTERRUPT_0__Dm_net_0\ : bit;\r
-SIGNAL \USBFS:tmpOE__Dp_net_0\ : bit;\r
-SIGNAL \USBFS:tmpFB_0__Dp_net_0\ : bit;\r
-SIGNAL \USBFS:tmpIO_0__Dp_net_0\ : bit;\r
-TERMINAL \USBFS:tmpSIOVREF__Dp_net_0\ : bit;\r
-SIGNAL \USBFS:Net_1010\ : bit;\r
-SIGNAL \USBFS:Net_1099\ : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_7 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_6 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_5 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_4 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_3 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_2 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_1 : bit;\r
-SIGNAL tmpOE__SCSI_Out_DBx_net_0 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_7 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_6 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_5 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_4 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_3 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_2 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_1 : bit;\r
-SIGNAL tmpFB_7__SCSI_Out_DBx_net_0 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_7 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_6 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_5 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_4 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_3 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_2 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_1 : bit;\r
-SIGNAL tmpIO_7__SCSI_Out_DBx_net_0 : bit;\r
-TERMINAL tmpSIOVREF__SCSI_Out_DBx_net_0 : bit;\r
-TERMINAL Net_37_7 : bit;\r
-TERMINAL Net_37_6 : bit;\r
-TERMINAL Net_37_5 : bit;\r
-TERMINAL Net_37_4 : bit;\r
-TERMINAL Net_37_3 : bit;\r
-TERMINAL Net_37_2 : bit;\r
-TERMINAL Net_37_1 : bit;\r
-TERMINAL Net_37_0 : bit;\r
-SIGNAL tmpINTERRUPT_0__SCSI_Out_DBx_net_0 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_9 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_8 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_7 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_6 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_5 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_4 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_3 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_2 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_1 : bit;\r
-SIGNAL tmpOE__SCSI_Out_net_0 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_9 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_8 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_7 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_6 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_5 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_4 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_3 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_2 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_1 : bit;\r
-SIGNAL tmpFB_9__SCSI_Out_net_0 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_9 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_8 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_7 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_6 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_5 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_4 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_3 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_2 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_1 : bit;\r
-SIGNAL tmpIO_9__SCSI_Out_net_0 : bit;\r
-TERMINAL tmpSIOVREF__SCSI_Out_net_0 : bit;\r
-TERMINAL Net_36 : bit;\r
-TERMINAL Net_35 : bit;\r
-TERMINAL Net_34 : bit;\r
-TERMINAL Net_33 : bit;\r
-TERMINAL Net_32 : bit;\r
-TERMINAL Net_31 : bit;\r
-TERMINAL Net_30 : bit;\r
-TERMINAL Net_29 : bit;\r
-TERMINAL Net_28 : bit;\r
-TERMINAL Net_27 : bit;\r
-SIGNAL tmpINTERRUPT_0__SCSI_Out_net_0 : bit;\r
-SIGNAL tmpOE__SD_PULLUP_net_4 : bit;\r
-SIGNAL tmpOE__SD_PULLUP_net_3 : bit;\r
-SIGNAL tmpOE__SD_PULLUP_net_2 : bit;\r
-SIGNAL tmpOE__SD_PULLUP_net_1 : bit;\r
-SIGNAL tmpOE__SD_PULLUP_net_0 : bit;\r
-SIGNAL Net_88 : bit;\r
-SIGNAL Net_87 : bit;\r
-SIGNAL Net_86 : bit;\r
-SIGNAL Net_85 : bit;\r
-SIGNAL Net_84 : bit;\r
-SIGNAL tmpIO_4__SD_PULLUP_net_4 : bit;\r
-SIGNAL tmpIO_4__SD_PULLUP_net_3 : bit;\r
-SIGNAL tmpIO_4__SD_PULLUP_net_2 : bit;\r
-SIGNAL tmpIO_4__SD_PULLUP_net_1 : bit;\r
-SIGNAL tmpIO_4__SD_PULLUP_net_0 : bit;\r
-TERMINAL tmpSIOVREF__SD_PULLUP_net_0 : bit;\r
-SIGNAL tmpINTERRUPT_0__SD_PULLUP_net_0 : bit;\r
-BEGIN\r
-\r
-zero <=  ('0') ;\r
-\r
-one <=  ('1') ;\r
-\r
-\USBFS:USB\:cy_psoc3_usb_v1_0\r
-       GENERIC MAP(cy_registers=>"")\r
-       PORT MAP(dp=>\USBFS:Net_1000\,\r
-               dm=>\USBFS:Net_597\,\r
-               sof_int=>Net_40,\r
-               arb_int=>\USBFS:Net_79\,\r
-               usb_int=>\USBFS:Net_81\,\r
-               ept_int=>(\USBFS:ept_int_8\, \USBFS:ept_int_7\, \USBFS:ept_int_6\, \USBFS:ept_int_5\,\r
-                       \USBFS:ept_int_4\, \USBFS:ept_int_3\, \USBFS:ept_int_2\, \USBFS:ept_int_1\,\r
-                       \USBFS:ept_int_0\),\r
-               ord_int=>\USBFS:Net_95\,\r
-               dma_req=>(\USBFS:dma_req_7\, \USBFS:dma_req_6\, \USBFS:dma_req_5\, \USBFS:dma_req_4\,\r
-                       \USBFS:dma_req_3\, \USBFS:dma_req_2\, \USBFS:dma_req_1\, \USBFS:dma_req_0\),\r
-               dma_termin=>\USBFS:Net_824\);\r
-\USBFS:sof_int\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>Net_40);\r
-\USBFS:arb_int\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:Net_79\);\r
-\USBFS:bus_reset\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:Net_81\);\r
-\USBFS:ep_0\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:ept_int_0\);\r
-\USBFS:ep_1\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:ept_int_1\);\r
-\USBFS:ep_2\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:ept_int_2\);\r
-\USBFS:Dm\:cy_psoc3_pins_v1_10\r
-       GENERIC MAP(id=>"f9248435-5d3e-4e4d-bbae-bdae8795c3dd/8b77a6c4-10a0-4390-971c-672353e2a49c",\r
-               drive_mode=>"000",\r
-               ibuf_enabled=>"0",\r
-               init_dr_st=>"0",\r
-               input_sync=>"1",\r
-               input_clk_en=>'0',\r
-               input_sync_mode=>"0",\r
-               intr_mode=>"00",\r
-               invert_in_clock=>'0',\r
-               invert_in_clock_en=>'0',\r
-               invert_in_reset=>'0',\r
-               invert_out_clock=>'0',\r
-               invert_out_clock_en=>'0',\r
-               invert_out_reset=>'0',\r
-               io_voltage=>"",\r
-               layout_mode=>"NONCONTIGUOUS",\r
-               output_conn=>"0",\r
-               output_sync=>"0",\r
-               output_clk_en=>'0',\r
-               output_mode=>"0",\r
-               output_reset=>'0',\r
-               output_clock_mode=>"0",\r
-               oe_sync=>"0",\r
-               oe_conn=>"0",\r
-               oe_reset=>'0',\r
-               pin_aliases=>"",\r
-               pin_mode=>"A",\r
-               por_state=>4,\r
-               sio_group_cnt=>0,\r
-               sio_hifreq=>"",\r
-               sio_hyst=>"0",\r
-               sio_ibuf=>"00000000",\r
-               sio_info=>"00",\r
-               sio_obuf=>"00000000",\r
-               sio_refsel=>"00000000",\r
-               sio_vtrip=>"00000000",\r
-               slew_rate=>"0",\r
-               spanning=>'1',\r
-               sw_only=>'0',\r
-               vtrip=>"10",\r
-               width=>1,\r
-               port_alias_required=>'0',\r
-               port_alias_group=>"",\r
-               use_annotation=>"0",\r
-               pa_in_clock=>-1,\r
-               pa_in_clock_en=>-1,\r
-               pa_in_reset=>-1,\r
-               pa_out_clock=>-1,\r
-               pa_out_clock_en=>-1,\r
-               pa_out_reset=>-1)\r
-       PORT MAP(oe=>(one),\r
-               y=>(zero),\r
-               fb=>(\USBFS:tmpFB_0__Dm_net_0\),\r
-               analog=>\USBFS:Net_597\,\r
-               io=>(\USBFS:tmpIO_0__Dm_net_0\),\r
-               siovref=>(\USBFS:tmpSIOVREF__Dm_net_0\),\r
-               annotation=>(open),\r
-               in_clock=>zero,\r
-               in_clock_en=>one,\r
-               in_reset=>zero,\r
-               out_clock=>zero,\r
-               out_clock_en=>one,\r
-               out_reset=>zero,\r
-               interrupt=>\USBFS:tmpINTERRUPT_0__Dm_net_0\);\r
-\USBFS:Dp\:cy_psoc3_pins_v1_10\r
-       GENERIC MAP(id=>"f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42",\r
-               drive_mode=>"000",\r
-               ibuf_enabled=>"0",\r
-               init_dr_st=>"0",\r
-               input_sync=>"1",\r
-               input_clk_en=>'0',\r
-               input_sync_mode=>"0",\r
-               intr_mode=>"10",\r
-               invert_in_clock=>'0',\r
-               invert_in_clock_en=>'0',\r
-               invert_in_reset=>'0',\r
-               invert_out_clock=>'0',\r
-               invert_out_clock_en=>'0',\r
-               invert_out_reset=>'0',\r
-               io_voltage=>"",\r
-               layout_mode=>"CONTIGUOUS",\r
-               output_conn=>"0",\r
-               output_sync=>"0",\r
-               output_clk_en=>'0',\r
-               output_mode=>"0",\r
-               output_reset=>'0',\r
-               output_clock_mode=>"0",\r
-               oe_sync=>"0",\r
-               oe_conn=>"0",\r
-               oe_reset=>'0',\r
-               pin_aliases=>"",\r
-               pin_mode=>"I",\r
-               por_state=>4,\r
-               sio_group_cnt=>0,\r
-               sio_hifreq=>"",\r
-               sio_hyst=>"0",\r
-               sio_ibuf=>"00000000",\r
-               sio_info=>"00",\r
-               sio_obuf=>"00000000",\r
-               sio_refsel=>"00000000",\r
-               sio_vtrip=>"00000000",\r
-               slew_rate=>"0",\r
-               spanning=>'0',\r
-               sw_only=>'0',\r
-               vtrip=>"00",\r
-               width=>1,\r
-               port_alias_required=>'0',\r
-               port_alias_group=>"",\r
-               use_annotation=>"0",\r
-               pa_in_clock=>-1,\r
-               pa_in_clock_en=>-1,\r
-               pa_in_reset=>-1,\r
-               pa_out_clock=>-1,\r
-               pa_out_clock_en=>-1,\r
-               pa_out_reset=>-1)\r
-       PORT MAP(oe=>(one),\r
-               y=>(zero),\r
-               fb=>(\USBFS:tmpFB_0__Dp_net_0\),\r
-               analog=>\USBFS:Net_1000\,\r
-               io=>(\USBFS:tmpIO_0__Dp_net_0\),\r
-               siovref=>(\USBFS:tmpSIOVREF__Dp_net_0\),\r
-               annotation=>(open),\r
-               in_clock=>zero,\r
-               in_clock_en=>one,\r
-               in_reset=>zero,\r
-               out_clock=>zero,\r
-               out_clock_en=>one,\r
-               out_reset=>zero,\r
-               interrupt=>\USBFS:Net_1010\);\r
-\USBFS:dp_int\:cy_isr_v1_0\r
-       GENERIC MAP(int_type=>"10")\r
-       PORT MAP(int_signal=>\USBFS:Net_1010\);\r
-\USBFS:Clock_vbus\:cy_clock_v1_0\r
-       GENERIC MAP(cy_registers=>"",\r
-               id=>"f9248435-5d3e-4e4d-bbae-bdae8795c3dd/03f503a7-085a-4304-b786-de885b1c2f21",\r
-               source_clock_id=>"75C2148C-3656-4d8a-846D-0CAE99AB6FF7",\r
-               divisor=>0,\r
-               period=>"0",\r
-               is_direct=>'1',\r
-               is_digital=>'1')\r
-       PORT MAP(clock_out=>\USBFS:Net_1099\,\r
-               dig_domain_out=>open);\r
-SCSI_Out_DBx:cy_psoc3_pins_v1_10\r
-       GENERIC MAP(id=>"52f31aa9-2f0a-497d-9a1f-1424095e13e6",\r
-               drive_mode=>"110110110110110110110110",\r
-               ibuf_enabled=>"11111111",\r
-               init_dr_st=>"00000000",\r
-               input_sync=>"11111111",\r
-               input_clk_en=>'0',\r
-               input_sync_mode=>"00000000",\r
-               intr_mode=>"0000000000000000",\r
-               invert_in_clock=>'0',\r
-               invert_in_clock_en=>'0',\r
-               invert_in_reset=>'0',\r
-               invert_out_clock=>'0',\r
-               invert_out_clock_en=>'0',\r
-               invert_out_reset=>'0',\r
-               io_voltage=>", , , , , , , 5",\r
-               layout_mode=>"NONCONTIGUOUS",\r
-               output_conn=>"00000000",\r
-               output_sync=>"00000000",\r
-               output_clk_en=>'0',\r
-               output_mode=>"00000000",\r
-               output_reset=>'0',\r
-               output_clock_mode=>"00000000",\r
-               oe_sync=>"00000000",\r
-               oe_conn=>"00000000",\r
-               oe_reset=>'0',\r
-               pin_aliases=>"DB0,DB1,DB2,DB3,DB4,DB5,DB6,DB7",\r
-               pin_mode=>"OOOOOOOO",\r
-               por_state=>4,\r
-               sio_group_cnt=>0,\r
-               sio_hifreq=>"",\r
-               sio_hyst=>"00000000",\r
-               sio_ibuf=>"00000000",\r
-               sio_info=>"0000000000000000",\r
-               sio_obuf=>"00000000",\r
-               sio_refsel=>"00000000",\r
-               sio_vtrip=>"00000000",\r
-               slew_rate=>"00000000",\r
-               spanning=>'1',\r
-               sw_only=>'0',\r
-               vtrip=>"1010101010101010",\r
-               width=>8,\r
-               port_alias_required=>'0',\r
-               port_alias_group=>"",\r
-               use_annotation=>"11111111",\r
-               pa_in_clock=>-1,\r
-               pa_in_clock_en=>-1,\r
-               pa_in_reset=>-1,\r
-               pa_out_clock=>-1,\r
-               pa_out_clock_en=>-1,\r
-               pa_out_reset=>-1)\r
-       PORT MAP(oe=>(one, one, one, one,\r
-                       one, one, one, one),\r
-               y=>(zero, zero, zero, zero,\r
-                       zero, zero, zero, zero),\r
-               fb=>(tmpFB_7__SCSI_Out_DBx_net_7, tmpFB_7__SCSI_Out_DBx_net_6, tmpFB_7__SCSI_Out_DBx_net_5, tmpFB_7__SCSI_Out_DBx_net_4,\r
-                       tmpFB_7__SCSI_Out_DBx_net_3, tmpFB_7__SCSI_Out_DBx_net_2, tmpFB_7__SCSI_Out_DBx_net_1, tmpFB_7__SCSI_Out_DBx_net_0),\r
-               analog=>(open, open, open, open,\r
-                       open, open, open, open),\r
-               io=>(tmpIO_7__SCSI_Out_DBx_net_7, tmpIO_7__SCSI_Out_DBx_net_6, tmpIO_7__SCSI_Out_DBx_net_5, tmpIO_7__SCSI_Out_DBx_net_4,\r
-                       tmpIO_7__SCSI_Out_DBx_net_3, tmpIO_7__SCSI_Out_DBx_net_2, tmpIO_7__SCSI_Out_DBx_net_1, tmpIO_7__SCSI_Out_DBx_net_0),\r
-               siovref=>(tmpSIOVREF__SCSI_Out_DBx_net_0),\r
-               annotation=>(Net_37_7, Net_37_6, Net_37_5, Net_37_4,\r
-                       Net_37_3, Net_37_2, Net_37_1, Net_37_0),\r
-               in_clock=>zero,\r
-               in_clock_en=>one,\r
-               in_reset=>zero,\r
-               out_clock=>zero,\r
-               out_clock_en=>one,\r
-               out_reset=>zero,\r
-               interrupt=>tmpINTERRUPT_0__SCSI_Out_DBx_net_0);\r
-SCSI_Out:cy_psoc3_pins_v1_10\r
-       GENERIC MAP(id=>"11f071e8-9c92-47e0-872a-3f48765a75b8",\r
-               drive_mode=>"110110110110110110110110110110",\r
-               ibuf_enabled=>"1111111111",\r
-               init_dr_st=>"0000000000",\r
-               input_sync=>"1111111111",\r
-               input_clk_en=>'0',\r
-               input_sync_mode=>"0000000000",\r
-               intr_mode=>"00000000000000000000",\r
-               invert_in_clock=>'0',\r
-               invert_in_clock_en=>'0',\r
-               invert_in_reset=>'0',\r
-               invert_out_clock=>'0',\r
-               invert_out_clock_en=>'0',\r
-               invert_out_reset=>'0',\r
-               io_voltage=>"5, 5, 5, 5, 5, 5, 5, 5, 5, 5",\r
-               layout_mode=>"NONCONTIGUOUS",\r
-               output_conn=>"0000000000",\r
-               output_sync=>"0000000000",\r
-               output_clk_en=>'0',\r
-               output_mode=>"0000000000",\r
-               output_reset=>'0',\r
-               output_clock_mode=>"0000000000",\r
-               oe_sync=>"0000000000",\r
-               oe_conn=>"0000000000",\r
-               oe_reset=>'0',\r
-               pin_aliases=>"DBP_raw,ATN,BSY,ACK,RST,MSG,SEL,CD,REQ,IO_raw",\r
-               pin_mode=>"OOOOOOOOOO",\r
-               por_state=>4,\r
-               sio_group_cnt=>0,\r
-               sio_hifreq=>"",\r
-               sio_hyst=>"0000000000",\r
-               sio_ibuf=>"00000000",\r
-               sio_info=>"00000000000000000000",\r
-               sio_obuf=>"00000000",\r
-               sio_refsel=>"00000000",\r
-               sio_vtrip=>"00000000",\r
-               slew_rate=>"0000000000",\r
-               spanning=>'1',\r
-               sw_only=>'0',\r
-               vtrip=>"10101010101010101010",\r
-               width=>10,\r
-               port_alias_required=>'0',\r
-               port_alias_group=>"",\r
-               use_annotation=>"1111111111",\r
-               pa_in_clock=>-1,\r
-               pa_in_clock_en=>-1,\r
-               pa_in_reset=>-1,\r
-               pa_out_clock=>-1,\r
-               pa_out_clock_en=>-1,\r
-               pa_out_reset=>-1)\r
-       PORT MAP(oe=>(one, one, one, one,\r
-                       one, one, one, one,\r
-                       one, one),\r
-               y=>(zero, zero, zero, zero,\r
-                       zero, zero, zero, zero,\r
-                       zero, zero),\r
-               fb=>(tmpFB_9__SCSI_Out_net_9, tmpFB_9__SCSI_Out_net_8, tmpFB_9__SCSI_Out_net_7, tmpFB_9__SCSI_Out_net_6,\r
-                       tmpFB_9__SCSI_Out_net_5, tmpFB_9__SCSI_Out_net_4, tmpFB_9__SCSI_Out_net_3, tmpFB_9__SCSI_Out_net_2,\r
-                       tmpFB_9__SCSI_Out_net_1, tmpFB_9__SCSI_Out_net_0),\r
-               analog=>(open, open, open, open,\r
-                       open, open, open, open,\r
-                       open, open),\r
-               io=>(tmpIO_9__SCSI_Out_net_9, tmpIO_9__SCSI_Out_net_8, tmpIO_9__SCSI_Out_net_7, tmpIO_9__SCSI_Out_net_6,\r
-                       tmpIO_9__SCSI_Out_net_5, tmpIO_9__SCSI_Out_net_4, tmpIO_9__SCSI_Out_net_3, tmpIO_9__SCSI_Out_net_2,\r
-                       tmpIO_9__SCSI_Out_net_1, tmpIO_9__SCSI_Out_net_0),\r
-               siovref=>(tmpSIOVREF__SCSI_Out_net_0),\r
-               annotation=>(Net_36, Net_35, Net_34, Net_33,\r
-                       Net_32, Net_31, Net_30, Net_29,\r
-                       Net_28, Net_27),\r
-               in_clock=>zero,\r
-               in_clock_en=>one,\r
-               in_reset=>zero,\r
-               out_clock=>zero,\r
-               out_clock_en=>one,\r
-               out_reset=>zero,\r
-               interrupt=>tmpINTERRUPT_0__SCSI_Out_net_0);\r
-SD_PULLUP:cy_psoc3_pins_v1_10\r
-       GENERIC MAP(id=>"4c15b41e-e284-4978-99e7-5aaee19bd0ce",\r
-               drive_mode=>"010010010010010",\r
-               ibuf_enabled=>"11111",\r
-               init_dr_st=>"11111",\r
-               input_sync=>"11111",\r
-               input_clk_en=>'0',\r
-               input_sync_mode=>"00000",\r
-               intr_mode=>"0000000000",\r
-               invert_in_clock=>'0',\r
-               invert_in_clock_en=>'0',\r
-               invert_in_reset=>'0',\r
-               invert_out_clock=>'0',\r
-               invert_out_clock_en=>'0',\r
-               invert_out_reset=>'0',\r
-               io_voltage=>"3.3, , , , ",\r
-               layout_mode=>"CONTIGUOUS",\r
-               output_conn=>"00000",\r
-               output_sync=>"00000",\r
-               output_clk_en=>'0',\r
-               output_mode=>"00000",\r
-               output_reset=>'0',\r
-               output_clock_mode=>"00000",\r
-               oe_sync=>"00000",\r
-               oe_conn=>"00000",\r
-               oe_reset=>'0',\r
-               pin_aliases=>",,,,",\r
-               pin_mode=>"IIIII",\r
-               por_state=>2,\r
-               sio_group_cnt=>0,\r
-               sio_hifreq=>"",\r
-               sio_hyst=>"00000",\r
-               sio_ibuf=>"00000000",\r
-               sio_info=>"0000000000",\r
-               sio_obuf=>"00000000",\r
-               sio_refsel=>"00000000",\r
-               sio_vtrip=>"00000000",\r
-               slew_rate=>"00000",\r
-               spanning=>'0',\r
-               sw_only=>'0',\r
-               vtrip=>"0000000000",\r
-               width=>5,\r
-               port_alias_required=>'0',\r
-               port_alias_group=>"",\r
-               use_annotation=>"00000",\r
-               pa_in_clock=>-1,\r
-               pa_in_clock_en=>-1,\r
-               pa_in_reset=>-1,\r
-               pa_out_clock=>-1,\r
-               pa_out_clock_en=>-1,\r
-               pa_out_reset=>-1)\r
-       PORT MAP(oe=>(one, one, one, one,\r
-                       one),\r
-               y=>(zero, zero, zero, zero,\r
-                       zero),\r
-               fb=>(Net_88, Net_87, Net_86, Net_85,\r
-                       Net_84),\r
-               analog=>(open, open, open, open,\r
-                       open),\r
-               io=>(tmpIO_4__SD_PULLUP_net_4, tmpIO_4__SD_PULLUP_net_3, tmpIO_4__SD_PULLUP_net_2, tmpIO_4__SD_PULLUP_net_1,\r
-                       tmpIO_4__SD_PULLUP_net_0),\r
-               siovref=>(tmpSIOVREF__SD_PULLUP_net_0),\r
-               annotation=>(open, open, open, open,\r
-                       open),\r
-               in_clock=>zero,\r
-               in_clock_en=>one,\r
-               in_reset=>zero,\r
-               out_clock=>zero,\r
-               out_clock_en=>one,\r
-               out_reset=>zero,\r
-               interrupt=>tmpINTERRUPT_0__SD_PULLUP_net_0);\r
-\r
-END R_T_L;\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.wde b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.wde
deleted file mode 100755 (executable)
index 83c0e4b..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader.wde
+++ /dev/null
@@ -1,5 +0,0 @@
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\ieee\work\stdlogic.vif\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\mod_genv.vif\r
-USB_Bootloader.ctl\r
-USB_Bootloader.v\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\warp\lib\common\stdlogic\rtlpkg.vif\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.lib b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.lib
deleted file mode 100755 (executable)
index b4f81be..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.lib
+++ /dev/null
@@ -1,1699 +0,0 @@
-library (timing) {\r
-    timescale : 1ns;\r
-    capacitive_load_unit (1,ff);\r
-    include_file(device.lib);\r
-    cell (iocell1) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.093;\r
-                intrinsic_fall : 15.093;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.033;\r
-                intrinsic_fall : 7.033;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell2) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.111;\r
-                intrinsic_fall : 15.111;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.255;\r
-                intrinsic_fall : 7.255;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell3) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.495;\r
-                intrinsic_fall : 15.495;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.644;\r
-                intrinsic_fall : 7.644;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell4) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.561;\r
-                intrinsic_fall : 15.561;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.354;\r
-                intrinsic_fall : 7.354;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell5) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.023;\r
-                intrinsic_fall : 15.023;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 8.264;\r
-                intrinsic_fall : 8.264;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell6) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.563;\r
-                intrinsic_fall : 7.563;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell7) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.744;\r
-                intrinsic_fall : 15.744;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.958;\r
-                intrinsic_fall : 7.958;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell8) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.459;\r
-                intrinsic_fall : 15.459;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.950;\r
-                intrinsic_fall : 7.950;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell9) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.802;\r
-                intrinsic_fall : 15.802;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.962;\r
-                intrinsic_fall : 7.962;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell10) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.251;\r
-                intrinsic_fall : 15.251;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.922;\r
-                intrinsic_fall : 7.922;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell11) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.011;\r
-                intrinsic_fall : 15.011;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.576;\r
-                intrinsic_fall : 7.576;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell12) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.746;\r
-                intrinsic_fall : 15.746;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.331;\r
-                intrinsic_fall : 7.331;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell13) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.065;\r
-                intrinsic_fall : 7.065;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell14) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.914;\r
-                intrinsic_fall : 14.914;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.816;\r
-                intrinsic_fall : 7.816;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell15) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.222;\r
-                intrinsic_fall : 15.222;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.459;\r
-                intrinsic_fall : 7.459;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell16) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.976;\r
-                intrinsic_fall : 15.976;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.582;\r
-                intrinsic_fall : 7.582;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell17) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.347;\r
-                intrinsic_fall : 15.347;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.368;\r
-                intrinsic_fall : 7.368;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell18) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 16.004;\r
-                intrinsic_fall : 16.004;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 6.974;\r
-                intrinsic_fall : 6.974;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell19) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.979;\r
-                intrinsic_fall : 14.979;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.661;\r
-                intrinsic_fall : 1.661;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell20) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.995;\r
-                intrinsic_fall : 14.995;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.852;\r
-                intrinsic_fall : 1.852;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell21) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.591;\r
-                intrinsic_fall : 14.591;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 3.163;\r
-                intrinsic_fall : 3.163;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell22) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.987;\r
-                intrinsic_fall : 14.987;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.191;\r
-                intrinsic_fall : 2.191;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell23) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.338;\r
-                intrinsic_fall : 15.338;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.064;\r
-                intrinsic_fall : 2.064;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell24) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.053;\r
-                intrinsic_fall : 19.053;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 9.497;\r
-                intrinsic_fall : 9.497;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell25) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.129;\r
-                intrinsic_fall : 19.129;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.717;\r
-                intrinsic_fall : 2.717;\r
-            }\r
-        }\r
-    }\r
-}\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.pco b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.pco
deleted file mode 100755 (executable)
index 9bc042e..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.pco
+++ /dev/null
@@ -1,54 +0,0 @@
-dont_use_io iocell 1 0\r
-dont_use_io iocell 1 1\r
-dont_use_io iocell 1 3\r
-dont_use_location comparatorcell -1 -1 1\r
-dont_use_location comparatorcell -1 -1 3\r
-dont_use_location sccell -1 -1 0\r
-dont_use_location sccell -1 -1 1\r
-dont_use_location sccell -1 -1 2\r
-dont_use_location sccell -1 -1 3\r
-dont_use_location vidaccell -1 -1 1\r
-dont_use_location vidaccell -1 -1 2\r
-dont_use_location vidaccell -1 -1 3\r
-dont_use_location sarcell -1 -1 1\r
-dont_use_location abufcell -1 -1 0\r
-dont_use_location abufcell -1 -1 2\r
-dont_use_location abufcell -1 -1 1\r
-dont_use_location abufcell -1 -1 3\r
-set_io "SCSI_Out(4)" iocell 0 5\r
-set_io "SCSI_Out_DBx(4)" iocell 4 7\r
-set_io "SD_PULLUP(2)" iocell 3 3\r
-set_io "SCSI_Out(7)" iocell 0 2\r
-set_io "SCSI_Out_DBx(7)" iocell 4 4\r
-set_location "\USBFS:ep_0\" interrupt -1 -1 24\r
-set_location "\USBFS:ep_2\" interrupt -1 -1 1\r
-set_location "\USBFS:ep_1\" interrupt -1 -1 0\r
-set_location "\USBFS:dp_int\" interrupt -1 -1 12\r
-set_location "\USBFS:Dp\" logicalport -1 -1 8\r
-set_location "\USBFS:bus_reset\" interrupt -1 -1 23\r
-set_io "SCSI_Out(6)" iocell 0 3\r
-set_io "SCSI_Out_DBx(6)" iocell 4 5\r
-set_io "SCSI_Out(9)" iocell 0 0\r
-set_io "SCSI_Out(5)" iocell 0 4\r
-set_io "SCSI_Out_DBx(5)" iocell 4 6\r
-set_io "SCSI_Out(2)" iocell 0 7\r
-set_io "SCSI_Out_DBx(2)" iocell 6 1\r
-set_io "SCSI_Out(8)" iocell 0 1\r
-set_location "\USBFS:USB\" usbcell -1 -1 0\r
-set_io "SD_PULLUP(0)" iocell 3 1\r
-set_io "SD_PULLUP(4)" iocell 3 5\r
-set_location "\USBFS:arb_int\" interrupt -1 -1 22\r
-set_location "\USBFS:sof_int\" interrupt -1 -1 21\r
-set_io "SD_PULLUP(1)" iocell 3 2\r
-set_io "SD_PULLUP(3)" iocell 3 4\r
-set_io "SCSI_Out(1)" iocell 4 2\r
-set_io "SCSI_Out_DBx(1)" iocell 6 2\r
-set_io "SCSI_Out(0)" iocell 4 3\r
-set_io "SCSI_Out_DBx(0)" iocell 6 3\r
-# Note: port 15 is the logical name for port 8\r
-set_io "\USBFS:Dm(0)\" iocell 15 7\r
-set_io "SCSI_Out(3)" iocell 0 6\r
-set_io "SCSI_Out_DBx(3)" iocell 6 0\r
-set_location "ClockBlock" clockblockcell -1 -1 0\r
-# Note: port 15 is the logical name for port 8\r
-set_io "\USBFS:Dp(0)\" iocell 15 6\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.vh2 b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.vh2
deleted file mode 100755 (executable)
index 93f1fea..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_p.vh2
+++ /dev/null
@@ -1,1990 +0,0 @@
--- Project:   USB_Bootloader\r
--- Generated: 03/22/2014 22:32:51\r
--- \r
-\r
-ENTITY USB_Bootloader IS\r
-    PORT(\r
-        SCSI_Out(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out(7)_PAD : OUT std_ulogic;\r
-        SCSI_Out(8)_PAD : OUT std_ulogic;\r
-        SCSI_Out(9)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(7)_PAD : OUT std_ulogic;\r
-        SD_PULLUP(0)_PAD : IN std_ulogic;\r
-        SD_PULLUP(1)_PAD : IN std_ulogic;\r
-        SD_PULLUP(2)_PAD : IN std_ulogic;\r
-        SD_PULLUP(3)_PAD : IN std_ulogic;\r
-        SD_PULLUP(4)_PAD : IN std_ulogic);\r
-    ATTRIBUTE voltage_Vio1 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vusb OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vddd OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio3 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vdda OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio0 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio2 OF __DEFAULT__ : ENTITY IS 5e0;\r
-END USB_Bootloader;\r
-\r
-ARCHITECTURE __DEFAULT__ OF USB_Bootloader IS\r
-    SIGNAL ClockBlock_100k : bit;\r
-    SIGNAL ClockBlock_1k : bit;\r
-    SIGNAL ClockBlock_32k : bit;\r
-    SIGNAL ClockBlock_BUS_CLK : bit;\r
-    ATTRIBUTE global_signal OF ClockBlock_BUS_CLK : SIGNAL IS true;\r
-    SIGNAL ClockBlock_BUS_CLK_local : bit;\r
-    SIGNAL ClockBlock_ILO : bit;\r
-    SIGNAL ClockBlock_IMO : bit;\r
-    SIGNAL ClockBlock_MASTER_CLK : bit;\r
-    SIGNAL ClockBlock_PLL_OUT : bit;\r
-    SIGNAL ClockBlock_XTAL : bit;\r
-    SIGNAL ClockBlock_XTAL_32KHZ : bit;\r
-    SIGNAL Net_40 : bit;\r
-    SIGNAL SCSI_Out(0)__PA : bit;\r
-    SIGNAL SCSI_Out(1)__PA : bit;\r
-    SIGNAL SCSI_Out(2)__PA : bit;\r
-    SIGNAL SCSI_Out(3)__PA : bit;\r
-    SIGNAL SCSI_Out(4)__PA : bit;\r
-    SIGNAL SCSI_Out(5)__PA : bit;\r
-    SIGNAL SCSI_Out(6)__PA : bit;\r
-    SIGNAL SCSI_Out(7)__PA : bit;\r
-    SIGNAL SCSI_Out(8)__PA : bit;\r
-    SIGNAL SCSI_Out(9)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(0)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(1)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(2)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(3)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(4)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(5)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(6)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(7)__PA : bit;\r
-    SIGNAL SD_PULLUP(0)__PA : bit;\r
-    SIGNAL SD_PULLUP(1)__PA : bit;\r
-    SIGNAL SD_PULLUP(2)__PA : bit;\r
-    SIGNAL SD_PULLUP(3)__PA : bit;\r
-    SIGNAL SD_PULLUP(4)__PA : bit;\r
-    SIGNAL \\\USBFS:Dm(0)\\__PA\ : bit;\r
-    SIGNAL \\\USBFS:Dp(0)\\__PA\ : bit;\r
-    SIGNAL \USBFS:Net_1010\ : bit;\r
-    SIGNAL \USBFS:Net_79\ : bit;\r
-    SIGNAL \USBFS:Net_81\ : bit;\r
-    SIGNAL \USBFS:Net_824\ : bit;\r
-    SIGNAL \USBFS:Net_95\ : bit;\r
-    SIGNAL \USBFS:dma_req_0\ : bit;\r
-    SIGNAL \USBFS:dma_req_1\ : bit;\r
-    SIGNAL \USBFS:dma_req_2\ : bit;\r
-    SIGNAL \USBFS:dma_req_3\ : bit;\r
-    SIGNAL \USBFS:dma_req_4\ : bit;\r
-    SIGNAL \USBFS:dma_req_5\ : bit;\r
-    SIGNAL \USBFS:dma_req_6\ : bit;\r
-    SIGNAL \USBFS:dma_req_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_0\ : bit;\r
-    SIGNAL \USBFS:ept_int_1\ : bit;\r
-    SIGNAL \USBFS:ept_int_2\ : bit;\r
-    SIGNAL \USBFS:ept_int_3\ : bit;\r
-    SIGNAL \USBFS:ept_int_4\ : bit;\r
-    SIGNAL \USBFS:ept_int_5\ : bit;\r
-    SIGNAL \USBFS:ept_int_6\ : bit;\r
-    SIGNAL \USBFS:ept_int_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_8\ : bit;\r
-    SIGNAL __ONE__ : bit;\r
-    ATTRIBUTE POWER OF __ONE__ : SIGNAL IS true;\r
-    SIGNAL __ZERO__ : bit;\r
-    ATTRIBUTE GROUND OF __ZERO__ : SIGNAL IS true;\r
-    SIGNAL one : bit;\r
-    ATTRIBUTE POWER OF one : SIGNAL IS true;\r
-    SIGNAL zero : bit;\r
-    ATTRIBUTE GROUND OF zero : SIGNAL IS true;\r
-    ATTRIBUTE lib_model OF SCSI_Out(0) : LABEL IS "iocell1";\r
-    ATTRIBUTE Location OF SCSI_Out(0) : LABEL IS "P4[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(1) : LABEL IS "iocell2";\r
-    ATTRIBUTE Location OF SCSI_Out(1) : LABEL IS "P4[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(2) : LABEL IS "iocell3";\r
-    ATTRIBUTE Location OF SCSI_Out(2) : LABEL IS "P0[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(3) : LABEL IS "iocell4";\r
-    ATTRIBUTE Location OF SCSI_Out(3) : LABEL IS "P0[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(4) : LABEL IS "iocell5";\r
-    ATTRIBUTE Location OF SCSI_Out(4) : LABEL IS "P0[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(5) : LABEL IS "iocell6";\r
-    ATTRIBUTE Location OF SCSI_Out(5) : LABEL IS "P0[4]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(6) : LABEL IS "iocell7";\r
-    ATTRIBUTE Location OF SCSI_Out(6) : LABEL IS "P0[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(7) : LABEL IS "iocell8";\r
-    ATTRIBUTE Location OF SCSI_Out(7) : LABEL IS "P0[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(8) : LABEL IS "iocell9";\r
-    ATTRIBUTE Location OF SCSI_Out(8) : LABEL IS "P0[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(9) : LABEL IS "iocell10";\r
-    ATTRIBUTE Location OF SCSI_Out(9) : LABEL IS "P0[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(0) : LABEL IS "iocell11";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(0) : LABEL IS "P6[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(1) : LABEL IS "iocell12";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(1) : LABEL IS "P6[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(2) : LABEL IS "iocell13";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(2) : LABEL IS "P6[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(3) : LABEL IS "iocell14";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(3) : LABEL IS "P6[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(4) : LABEL IS "iocell15";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(4) : LABEL IS "P4[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(5) : LABEL IS "iocell16";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(5) : LABEL IS "P4[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(6) : LABEL IS "iocell17";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(6) : LABEL IS "P4[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(7) : LABEL IS "iocell18";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(7) : LABEL IS "P4[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(0) : LABEL IS "iocell19";\r
-    ATTRIBUTE Location OF SD_PULLUP(0) : LABEL IS "P3[1]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(1) : LABEL IS "iocell20";\r
-    ATTRIBUTE Location OF SD_PULLUP(1) : LABEL IS "P3[2]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(2) : LABEL IS "iocell21";\r
-    ATTRIBUTE Location OF SD_PULLUP(2) : LABEL IS "P3[3]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(3) : LABEL IS "iocell22";\r
-    ATTRIBUTE Location OF SD_PULLUP(3) : LABEL IS "P3[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(4) : LABEL IS "iocell23";\r
-    ATTRIBUTE Location OF SD_PULLUP(4) : LABEL IS "P3[5]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dm(0)\ : LABEL IS "iocell24";\r
-    ATTRIBUTE Location OF \USBFS:Dm(0)\ : LABEL IS "P15[7]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dp(0)\ : LABEL IS "iocell25";\r
-    ATTRIBUTE Location OF \USBFS:Dp(0)\ : LABEL IS "P15[6]";\r
-    ATTRIBUTE Location OF \USBFS:USB\ : LABEL IS "F(USB,0)";\r
-    COMPONENT abufcell\r
-    END COMPONENT;\r
-    COMPONENT boostcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cachecell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cancell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            can_rx : IN std_ulogic;\r
-            can_tx : OUT std_ulogic;\r
-            can_tx_en : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT capsensecell\r
-        PORT (\r
-            lft : IN std_ulogic;\r
-            rt : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT clockblockcell\r
-        PORT (\r
-            dclk_0 : OUT std_ulogic;\r
-            dclk_1 : OUT std_ulogic;\r
-            dclk_2 : OUT std_ulogic;\r
-            dclk_3 : OUT std_ulogic;\r
-            dclk_4 : OUT std_ulogic;\r
-            dclk_5 : OUT std_ulogic;\r
-            dclk_6 : OUT std_ulogic;\r
-            dclk_7 : OUT std_ulogic;\r
-            dclk_glb_0 : OUT std_ulogic;\r
-            dclk_glb_1 : OUT std_ulogic;\r
-            dclk_glb_2 : OUT std_ulogic;\r
-            dclk_glb_3 : OUT std_ulogic;\r
-            dclk_glb_4 : OUT std_ulogic;\r
-            dclk_glb_5 : OUT std_ulogic;\r
-            dclk_glb_6 : OUT std_ulogic;\r
-            dclk_glb_7 : OUT std_ulogic;\r
-            aclk_0 : OUT std_ulogic;\r
-            aclk_1 : OUT std_ulogic;\r
-            aclk_2 : OUT std_ulogic;\r
-            aclk_3 : OUT std_ulogic;\r
-            aclk_glb_0 : OUT std_ulogic;\r
-            aclk_glb_1 : OUT std_ulogic;\r
-            aclk_glb_2 : OUT std_ulogic;\r
-            aclk_glb_3 : OUT std_ulogic;\r
-            clk_a_dig_0 : OUT std_ulogic;\r
-            clk_a_dig_1 : OUT std_ulogic;\r
-            clk_a_dig_2 : OUT std_ulogic;\r
-            clk_a_dig_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_3 : OUT std_ulogic;\r
-            clk_bus : OUT std_ulogic;\r
-            clk_bus_glb : OUT std_ulogic;\r
-            clk_sync : OUT std_ulogic;\r
-            clk_32k_xtal : OUT std_ulogic;\r
-            clk_100k : OUT std_ulogic;\r
-            clk_32k : OUT std_ulogic;\r
-            clk_1k : OUT std_ulogic;\r
-            clk_usb : OUT std_ulogic;\r
-            xmhz_xerr : OUT std_ulogic;\r
-            pll_lock_out : OUT std_ulogic;\r
-            dsi_dig_div_0 : IN std_ulogic;\r
-            dsi_dig_div_1 : IN std_ulogic;\r
-            dsi_dig_div_2 : IN std_ulogic;\r
-            dsi_dig_div_3 : IN std_ulogic;\r
-            dsi_dig_div_4 : IN std_ulogic;\r
-            dsi_dig_div_5 : IN std_ulogic;\r
-            dsi_dig_div_6 : IN std_ulogic;\r
-            dsi_dig_div_7 : IN std_ulogic;\r
-            dsi_ana_div_0 : IN std_ulogic;\r
-            dsi_ana_div_1 : IN std_ulogic;\r
-            dsi_ana_div_2 : IN std_ulogic;\r
-            dsi_ana_div_3 : IN std_ulogic;\r
-            dsi_glb_div : IN std_ulogic;\r
-            dsi_clkin_div : IN std_ulogic;\r
-            imo : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            xtal : OUT std_ulogic;\r
-            pllout : OUT std_ulogic;\r
-            clk_bus_glb_ff : OUT std_ulogic;\r
-            aclk_glb_ff_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_0 : OUT std_ulogic;\r
-            aclk_glb_ff_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_1 : OUT std_ulogic;\r
-            aclk_glb_ff_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_2 : OUT std_ulogic;\r
-            aclk_glb_ff_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_0 : OUT std_ulogic;\r
-            dclk_glb_ff_1 : OUT std_ulogic;\r
-            dclk_glb_ff_2 : OUT std_ulogic;\r
-            dclk_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_4 : OUT std_ulogic;\r
-            dclk_glb_ff_5 : OUT std_ulogic;\r
-            dclk_glb_ff_6 : OUT std_ulogic;\r
-            dclk_glb_ff_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT comparatorcell\r
-        PORT (\r
-            out : OUT std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT controlcell\r
-        PORT (\r
-            control_0 : OUT std_ulogic;\r
-            control_1 : OUT std_ulogic;\r
-            control_2 : OUT std_ulogic;\r
-            control_3 : OUT std_ulogic;\r
-            control_4 : OUT std_ulogic;\r
-            control_5 : OUT std_ulogic;\r
-            control_6 : OUT std_ulogic;\r
-            control_7 : OUT std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF controlcell : COMPONENT IS "clock";\r
-    ATTRIBUTE udb_clken OF controlcell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF controlcell : COMPONENT IS "reset";\r
-    COMPONENT count7cell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            load : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            count_0 : OUT std_ulogic;\r
-            count_1 : OUT std_ulogic;\r
-            count_2 : OUT std_ulogic;\r
-            count_3 : OUT std_ulogic;\r
-            count_4 : OUT std_ulogic;\r
-            count_5 : OUT std_ulogic;\r
-            count_6 : OUT std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF count7cell : COMPONENT IS "clock,clock_n,extclk,extclk_n";\r
-    ATTRIBUTE udb_clken OF count7cell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF count7cell : COMPONENT IS "reset";\r
-    COMPONENT csabufcell\r
-        PORT (\r
-            swon : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT datapathcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            cs_addr_0 : IN std_ulogic;\r
-            cs_addr_1 : IN std_ulogic;\r
-            cs_addr_2 : IN std_ulogic;\r
-            route_si : IN std_ulogic;\r
-            route_ci : IN std_ulogic;\r
-            f0_load : IN std_ulogic;\r
-            f1_load : IN std_ulogic;\r
-            d0_load : IN std_ulogic;\r
-            d1_load : IN std_ulogic;\r
-            ce0_reg : OUT std_ulogic;\r
-            cl0_reg : OUT std_ulogic;\r
-            z0_reg : OUT std_ulogic;\r
-            f0_reg : OUT std_ulogic;\r
-            ce1_reg : OUT std_ulogic;\r
-            cl1_reg : OUT std_ulogic;\r
-            z1_reg : OUT std_ulogic;\r
-            f1_reg : OUT std_ulogic;\r
-            ov_msb_reg : OUT std_ulogic;\r
-            co_msb_reg : OUT std_ulogic;\r
-            cmsb_reg : OUT std_ulogic;\r
-            so_reg : OUT std_ulogic;\r
-            f0_bus_stat_reg : OUT std_ulogic;\r
-            f0_blk_stat_reg : OUT std_ulogic;\r
-            f1_bus_stat_reg : OUT std_ulogic;\r
-            f1_blk_stat_reg : OUT std_ulogic;\r
-            ce0_comb : OUT std_ulogic;\r
-            cl0_comb : OUT std_ulogic;\r
-            z0_comb : OUT std_ulogic;\r
-            f0_comb : OUT std_ulogic;\r
-            ce1_comb : OUT std_ulogic;\r
-            cl1_comb : OUT std_ulogic;\r
-            z1_comb : OUT std_ulogic;\r
-            f1_comb : OUT std_ulogic;\r
-            ov_msb_comb : OUT std_ulogic;\r
-            co_msb_comb : OUT std_ulogic;\r
-            cmsb_comb : OUT std_ulogic;\r
-            so_comb : OUT std_ulogic;\r
-            f0_bus_stat_comb : OUT std_ulogic;\r
-            f0_blk_stat_comb : OUT std_ulogic;\r
-            f1_bus_stat_comb : OUT std_ulogic;\r
-            f1_blk_stat_comb : OUT std_ulogic;\r
-            ce0 : OUT std_ulogic;\r
-            ce0i : IN std_ulogic;\r
-            p_in_0 : IN std_ulogic;\r
-            p_in_1 : IN std_ulogic;\r
-            p_in_2 : IN std_ulogic;\r
-            p_in_3 : IN std_ulogic;\r
-            p_in_4 : IN std_ulogic;\r
-            p_in_5 : IN std_ulogic;\r
-            p_in_6 : IN std_ulogic;\r
-            p_in_7 : IN std_ulogic;\r
-            p_out_0 : OUT std_ulogic;\r
-            p_out_1 : OUT std_ulogic;\r
-            p_out_2 : OUT std_ulogic;\r
-            p_out_3 : OUT std_ulogic;\r
-            p_out_4 : OUT std_ulogic;\r
-            p_out_5 : OUT std_ulogic;\r
-            p_out_6 : OUT std_ulogic;\r
-            p_out_7 : OUT std_ulogic;\r
-            cl0i : IN std_ulogic;\r
-            cl0 : OUT std_ulogic;\r
-            z0i : IN std_ulogic;\r
-            z0 : OUT std_ulogic;\r
-            ff0i : IN std_ulogic;\r
-            ff0 : OUT std_ulogic;\r
-            ce1i : IN std_ulogic;\r
-            ce1 : OUT std_ulogic;\r
-            cl1i : IN std_ulogic;\r
-            cl1 : OUT std_ulogic;\r
-            z1i : IN std_ulogic;\r
-            z1 : OUT std_ulogic;\r
-            ff1i : IN std_ulogic;\r
-            ff1 : OUT std_ulogic;\r
-            cap0i : IN std_ulogic;\r
-            cap0 : OUT std_ulogic;\r
-            cap1i : IN std_ulogic;\r
-            cap1 : OUT std_ulogic;\r
-            ci : IN std_ulogic;\r
-            co_msb : OUT std_ulogic;\r
-            sir : IN std_ulogic;\r
-            sol_msb : OUT std_ulogic;\r
-            cfbi : IN std_ulogic;\r
-            cfbo : OUT std_ulogic;\r
-            sil : IN std_ulogic;\r
-            sor : OUT std_ulogic;\r
-            cmsbi : IN std_ulogic;\r
-            cmsbo : OUT std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF datapathcell : COMPONENT IS "clock";\r
-    ATTRIBUTE udb_clken OF datapathcell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF datapathcell : COMPONENT IS "reset";\r
-    ATTRIBUTE udb_chain OF datapathcell : COMPONENT IS "ce0i,ce0,cl0i,cl0,z0i,z0,ff0i,ff0,ce1i,ce1,cl1i,cl1,z1i,z1,ff1i,ff1,cap0i,cap0,cap1i,cap1,ci,co_msb,sir,sol_msb,cfbi,cfbo,sil,sor,cmsbi,cmsbo";\r
-    ATTRIBUTE chain_lsb OF datapathcell : COMPONENT IS "ce0i,cl0i,z0i,ff0i,ce1i,cl1i,z1i,ff1i,cap0i,cap1i,ci,sir,cfbi,sor,cmsbo";\r
-    ATTRIBUTE chain_msb OF datapathcell : COMPONENT IS "ce0,cl0,z0,ff0,ce1,cl1,z1,ff1,cap0,cap1,co_msb,sol_msb,cfbo,sil,cmsbi";\r
-    COMPONENT decimatorcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            mod_dat_0 : IN std_ulogic;\r
-            mod_dat_1 : IN std_ulogic;\r
-            mod_dat_2 : IN std_ulogic;\r
-            mod_dat_3 : IN std_ulogic;\r
-            ext_start : IN std_ulogic;\r
-            modrst : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dfbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            in_1 : IN std_ulogic;\r
-            in_2 : IN std_ulogic;\r
-            out_1 : OUT std_ulogic;\r
-            out_2 : OUT std_ulogic;\r
-            dmareq_1 : OUT std_ulogic;\r
-            dmareq_2 : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT drqcell\r
-        PORT (\r
-            dmareq : IN std_ulogic;\r
-            termin : IN std_ulogic;\r
-            termout : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dsmodcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            modbitin_udb : IN std_ulogic;\r
-            reset_udb : IN std_ulogic;\r
-            reset_dec : IN std_ulogic;\r
-            dec_clock : OUT std_ulogic;\r
-            mod_dat_0 : OUT std_ulogic;\r
-            mod_dat_1 : OUT std_ulogic;\r
-            mod_dat_2 : OUT std_ulogic;\r
-            mod_dat_3 : OUT std_ulogic;\r
-            dout_udb_0 : OUT std_ulogic;\r
-            dout_udb_1 : OUT std_ulogic;\r
-            dout_udb_2 : OUT std_ulogic;\r
-            dout_udb_3 : OUT std_ulogic;\r
-            dout_udb_4 : OUT std_ulogic;\r
-            dout_udb_5 : OUT std_ulogic;\r
-            dout_udb_6 : OUT std_ulogic;\r
-            dout_udb_7 : OUT std_ulogic;\r
-            extclk_cp_udb : IN std_ulogic;\r
-            clk_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT emifcell\r
-        PORT (\r
-            EM_clock : OUT std_ulogic;\r
-            EM_CEn : OUT std_ulogic;\r
-            EM_OEn : OUT std_ulogic;\r
-            EM_ADSCn : OUT std_ulogic;\r
-            EM_sleep : OUT std_ulogic;\r
-            EM_WRn : OUT std_ulogic;\r
-            dataport_OE : OUT std_ulogic;\r
-            dataport_OEn : OUT std_ulogic;\r
-            wr : OUT std_ulogic;\r
-            rd : OUT std_ulogic;\r
-            udb_stall : IN std_ulogic;\r
-            udb_ready : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT i2ccell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            scl_in : IN std_ulogic;\r
-            sda_in : IN std_ulogic;\r
-            scl_out : OUT std_ulogic;\r
-            sda_out : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT interrupt\r
-        PORT (\r
-            interrupt : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT iocell\r
-        PORT (\r
-            pin_input : IN std_ulogic;\r
-            oe : IN std_ulogic;\r
-            fb : OUT std_ulogic;\r
-            pad_in : IN std_ulogic;\r
-            pa_out : OUT std_ulogic;\r
-            pad_out : OUT std_ulogic;\r
-            oe_reg : OUT std_ulogic;\r
-            oe_internal : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lcdctrlcell\r
-        PORT (\r
-            drive_en : IN std_ulogic;\r
-            frame : IN std_ulogic;\r
-            data_clk : IN std_ulogic;\r
-            en_hi : IN std_ulogic;\r
-            dac_dis : IN std_ulogic;\r
-            chop_clk : IN std_ulogic;\r
-            int_clr : IN std_ulogic;\r
-            lp_ack_udb : IN std_ulogic;\r
-            mode_1 : IN std_ulogic;\r
-            mode_2 : IN std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT logicalport\r
-        PORT (\r
-            interrupt : OUT std_ulogic;\r
-            precharge : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lpfcell\r
-    END COMPONENT;\r
-    COMPONENT lvdcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockblockcell\r
-        PORT (\r
-            imo : OUT std_ulogic;\r
-            ext : OUT std_ulogic;\r
-            eco : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            wco : OUT std_ulogic;\r
-            dbl : OUT std_ulogic;\r
-            pll : OUT std_ulogic;\r
-            dpll : OUT std_ulogic;\r
-            dsi_out_0 : OUT std_ulogic;\r
-            dsi_out_1 : OUT std_ulogic;\r
-            dsi_out_2 : OUT std_ulogic;\r
-            dsi_out_3 : OUT std_ulogic;\r
-            lfclk : OUT std_ulogic;\r
-            hfclk : OUT std_ulogic;\r
-            sysclk : OUT std_ulogic;\r
-            halfsysclk : OUT std_ulogic;\r
-            udb_div_0 : OUT std_ulogic;\r
-            udb_div_1 : OUT std_ulogic;\r
-            udb_div_2 : OUT std_ulogic;\r
-            udb_div_3 : OUT std_ulogic;\r
-            udb_div_4 : OUT std_ulogic;\r
-            udb_div_5 : OUT std_ulogic;\r
-            udb_div_6 : OUT std_ulogic;\r
-            udb_div_7 : OUT std_ulogic;\r
-            udb_div_8 : OUT std_ulogic;\r
-            udb_div_9 : OUT std_ulogic;\r
-            udb_div_10 : OUT std_ulogic;\r
-            udb_div_11 : OUT std_ulogic;\r
-            udb_div_12 : OUT std_ulogic;\r
-            udb_div_13 : OUT std_ulogic;\r
-            udb_div_14 : OUT std_ulogic;\r
-            udb_div_15 : OUT std_ulogic;\r
-            uab_div_0 : OUT std_ulogic;\r
-            uab_div_1 : OUT std_ulogic;\r
-            uab_div_2 : OUT std_ulogic;\r
-            uab_div_3 : OUT std_ulogic;\r
-            ff_div_0 : OUT std_ulogic;\r
-            ff_div_1 : OUT std_ulogic;\r
-            ff_div_2 : OUT std_ulogic;\r
-            ff_div_3 : OUT std_ulogic;\r
-            ff_div_4 : OUT std_ulogic;\r
-            ff_div_5 : OUT std_ulogic;\r
-            ff_div_6 : OUT std_ulogic;\r
-            ff_div_7 : OUT std_ulogic;\r
-            ff_div_8 : OUT std_ulogic;\r
-            ff_div_9 : OUT std_ulogic;\r
-            ff_div_10 : OUT std_ulogic;\r
-            ff_div_11 : OUT std_ulogic;\r
-            ff_div_12 : OUT std_ulogic;\r
-            ff_div_13 : OUT std_ulogic;\r
-            ff_div_14 : OUT std_ulogic;\r
-            ff_div_15 : OUT std_ulogic;\r
-            dsi_in_0 : IN std_ulogic;\r
-            dsi_in_1 : IN std_ulogic;\r
-            dsi_in_2 : IN std_ulogic;\r
-            dsi_in_3 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockgenblockcell\r
-        PORT (\r
-            gen_clk_in_0 : IN std_ulogic;\r
-            gen_clk_in_1 : IN std_ulogic;\r
-            gen_clk_in_2 : IN std_ulogic;\r
-            gen_clk_in_3 : IN std_ulogic;\r
-            gen_clk_in_4 : IN std_ulogic;\r
-            gen_clk_in_5 : IN std_ulogic;\r
-            gen_clk_in_6 : IN std_ulogic;\r
-            gen_clk_in_7 : IN std_ulogic;\r
-            gen_clk_out_0 : OUT std_ulogic;\r
-            gen_clk_out_1 : OUT std_ulogic;\r
-            gen_clk_out_2 : OUT std_ulogic;\r
-            gen_clk_out_3 : OUT std_ulogic;\r
-            gen_clk_out_4 : OUT std_ulogic;\r
-            gen_clk_out_5 : OUT std_ulogic;\r
-            gen_clk_out_6 : OUT std_ulogic;\r
-            gen_clk_out_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8lcdcell\r
-        PORT (\r
-            common_0 : OUT std_ulogic;\r
-            common_1 : OUT std_ulogic;\r
-            common_2 : OUT std_ulogic;\r
-            common_3 : OUT std_ulogic;\r
-            common_4 : OUT std_ulogic;\r
-            common_5 : OUT std_ulogic;\r
-            common_6 : OUT std_ulogic;\r
-            common_7 : OUT std_ulogic;\r
-            common_8 : OUT std_ulogic;\r
-            common_9 : OUT std_ulogic;\r
-            common_10 : OUT std_ulogic;\r
-            common_11 : OUT std_ulogic;\r
-            common_12 : OUT std_ulogic;\r
-            common_13 : OUT std_ulogic;\r
-            common_14 : OUT std_ulogic;\r
-            common_15 : OUT std_ulogic;\r
-            segment_0 : OUT std_ulogic;\r
-            segment_1 : OUT std_ulogic;\r
-            segment_2 : OUT std_ulogic;\r
-            segment_3 : OUT std_ulogic;\r
-            segment_4 : OUT std_ulogic;\r
-            segment_5 : OUT std_ulogic;\r
-            segment_6 : OUT std_ulogic;\r
-            segment_7 : OUT std_ulogic;\r
-            segment_8 : OUT std_ulogic;\r
-            segment_9 : OUT std_ulogic;\r
-            segment_10 : OUT std_ulogic;\r
-            segment_11 : OUT std_ulogic;\r
-            segment_12 : OUT std_ulogic;\r
-            segment_13 : OUT std_ulogic;\r
-            segment_14 : OUT std_ulogic;\r
-            segment_15 : OUT std_ulogic;\r
-            segment_16 : OUT std_ulogic;\r
-            segment_17 : OUT std_ulogic;\r
-            segment_18 : OUT std_ulogic;\r
-            segment_19 : OUT std_ulogic;\r
-            segment_20 : OUT std_ulogic;\r
-            segment_21 : OUT std_ulogic;\r
-            segment_22 : OUT std_ulogic;\r
-            segment_23 : OUT std_ulogic;\r
-            segment_24 : OUT std_ulogic;\r
-            segment_25 : OUT std_ulogic;\r
-            segment_26 : OUT std_ulogic;\r
-            segment_27 : OUT std_ulogic;\r
-            segment_28 : OUT std_ulogic;\r
-            segment_29 : OUT std_ulogic;\r
-            segment_30 : OUT std_ulogic;\r
-            segment_31 : OUT std_ulogic;\r
-            segment_32 : OUT std_ulogic;\r
-            segment_33 : OUT std_ulogic;\r
-            segment_34 : OUT std_ulogic;\r
-            segment_35 : OUT std_ulogic;\r
-            segment_36 : OUT std_ulogic;\r
-            segment_37 : OUT std_ulogic;\r
-            segment_38 : OUT std_ulogic;\r
-            segment_39 : OUT std_ulogic;\r
-            segment_40 : OUT std_ulogic;\r
-            segment_41 : OUT std_ulogic;\r
-            segment_42 : OUT std_ulogic;\r
-            segment_43 : OUT std_ulogic;\r
-            segment_44 : OUT std_ulogic;\r
-            segment_45 : OUT std_ulogic;\r
-            segment_46 : OUT std_ulogic;\r
-            segment_47 : OUT std_ulogic;\r
-            segment_48 : OUT std_ulogic;\r
-            segment_49 : OUT std_ulogic;\r
-            segment_50 : OUT std_ulogic;\r
-            segment_51 : OUT std_ulogic;\r
-            segment_52 : OUT std_ulogic;\r
-            segment_53 : OUT std_ulogic;\r
-            segment_54 : OUT std_ulogic;\r
-            segment_55 : OUT std_ulogic;\r
-            segment_56 : OUT std_ulogic;\r
-            segment_57 : OUT std_ulogic;\r
-            segment_58 : OUT std_ulogic;\r
-            segment_59 : OUT std_ulogic;\r
-            segment_60 : OUT std_ulogic;\r
-            segment_61 : OUT std_ulogic;\r
-            segment_62 : OUT std_ulogic;\r
-            segment_63 : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8pmcell\r
-        PORT (\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8scbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            rx : IN std_ulogic;\r
-            tx : OUT std_ulogic;\r
-            mosi_m : OUT std_ulogic;\r
-            miso_m : IN std_ulogic;\r
-            select_m_0 : OUT std_ulogic;\r
-            select_m_1 : OUT std_ulogic;\r
-            select_m_2 : OUT std_ulogic;\r
-            select_m_3 : OUT std_ulogic;\r
-            sclk_m : OUT std_ulogic;\r
-            mosi_s : IN std_ulogic;\r
-            miso_s : OUT std_ulogic;\r
-            select_s : IN std_ulogic;\r
-            sclk_s : IN std_ulogic;\r
-            scl : INOUT std_ulogic;\r
-            sda : INOUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8spcifcell\r
-        PORT (\r
-            spcif_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tcpwmcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            count : IN std_ulogic;\r
-            reload : IN std_ulogic;\r
-            stop : IN std_ulogic;\r
-            start : IN std_ulogic;\r
-            tr_underflow : OUT std_ulogic;\r
-            tr_overflow : OUT std_ulogic;\r
-            tr_compare_match : OUT std_ulogic;\r
-            line_out : OUT std_ulogic;\r
-            line_out_compl : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tsscell\r
-        PORT (\r
-            clk_seq : IN std_ulogic;\r
-            clk_adc : IN std_ulogic;\r
-            ext_reject : IN std_ulogic;\r
-            ext_sync : IN std_ulogic;\r
-            tx_sync : IN std_ulogic;\r
-            reject_in : IN std_ulogic;\r
-            start_in : IN std_ulogic;\r
-            lx_det_hi : OUT std_ulogic;\r
-            lx_det_lo : OUT std_ulogic;\r
-            rej_window : OUT std_ulogic;\r
-            tx_hilo : OUT std_ulogic;\r
-            phase_end : OUT std_ulogic;\r
-            phase_num_0 : OUT std_ulogic;\r
-            phase_num_1 : OUT std_ulogic;\r
-            phase_num_2 : OUT std_ulogic;\r
-            phase_num_3 : OUT std_ulogic;\r
-            ipq_reject : OUT std_ulogic;\r
-            ipq_start : OUT std_ulogic;\r
-            epq_reject : OUT std_ulogic;\r
-            epq_start : OUT std_ulogic;\r
-            mcs_reject : OUT std_ulogic;\r
-            mcs_start : OUT std_ulogic;\r
-            do_switch : OUT std_ulogic;\r
-            adc_start : OUT std_ulogic;\r
-            adc_done : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8wdtcell\r
-        PORT (\r
-            wdt_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT macrocell\r
-        PORT (\r
-            main_0 : IN std_ulogic;\r
-            main_1 : IN std_ulogic;\r
-            main_2 : IN std_ulogic;\r
-            main_3 : IN std_ulogic;\r
-            main_4 : IN std_ulogic;\r
-            main_5 : IN std_ulogic;\r
-            main_6 : IN std_ulogic;\r
-            main_7 : IN std_ulogic;\r
-            main_8 : IN std_ulogic;\r
-            main_9 : IN std_ulogic;\r
-            main_10 : IN std_ulogic;\r
-            main_11 : IN std_ulogic;\r
-            ar_0 : IN std_ulogic;\r
-            ap_0 : IN std_ulogic;\r
-            clock_0 : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            cin : IN std_ulogic;\r
-            cpt0_0 : IN std_ulogic;\r
-            cpt0_1 : IN std_ulogic;\r
-            cpt0_2 : IN std_ulogic;\r
-            cpt0_3 : IN std_ulogic;\r
-            cpt0_4 : IN std_ulogic;\r
-            cpt0_5 : IN std_ulogic;\r
-            cpt0_6 : IN std_ulogic;\r
-            cpt0_7 : IN std_ulogic;\r
-            cpt0_8 : IN std_ulogic;\r
-            cpt0_9 : IN std_ulogic;\r
-            cpt0_10 : IN std_ulogic;\r
-            cpt0_11 : IN std_ulogic;\r
-            cpt1_0 : IN std_ulogic;\r
-            cpt1_1 : IN std_ulogic;\r
-            cpt1_2 : IN std_ulogic;\r
-            cpt1_3 : IN std_ulogic;\r
-            cpt1_4 : IN std_ulogic;\r
-            cpt1_5 : IN std_ulogic;\r
-            cpt1_6 : IN std_ulogic;\r
-            cpt1_7 : IN std_ulogic;\r
-            cpt1_8 : IN std_ulogic;\r
-            cpt1_9 : IN std_ulogic;\r
-            cpt1_10 : IN std_ulogic;\r
-            cpt1_11 : IN std_ulogic;\r
-            cout : OUT std_ulogic;\r
-            q : OUT std_ulogic;\r
-            q_fixed : OUT std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF macrocell : COMPONENT IS "clock_0";\r
-    ATTRIBUTE udb_clken OF macrocell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF macrocell : COMPONENT IS "ar_0";\r
-    ATTRIBUTE udb_preset OF macrocell : COMPONENT IS "ap_0";\r
-    ATTRIBUTE udb_chain OF macrocell : COMPONENT IS "cin,cout";\r
-    ATTRIBUTE chain_lsb OF macrocell : COMPONENT IS "cin";\r
-    ATTRIBUTE chain_msb OF macrocell : COMPONENT IS "cout";\r
-    COMPONENT p4abufcell\r
-        PORT (\r
-            ctb_dsi_comp : OUT std_ulogic;\r
-            dsi_out : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4anapumpcell\r
-        PORT (\r
-            pump_clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csdcell\r
-        PORT (\r
-            sense_out : OUT std_ulogic;\r
-            sample_out : OUT std_ulogic;\r
-            sense_in : IN std_ulogic;\r
-            sample_in : IN std_ulogic;\r
-            clk1 : IN std_ulogic;\r
-            clk2 : IN std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac7cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac8cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4ctbmblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4halfuabcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            comp : OUT std_ulogic;\r
-            ctrl : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompcell\r
-        PORT (\r
-            cmpout : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4rsbcell\r
-    END COMPONENT;\r
-    COMPONENT p4sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            sample_done : OUT std_ulogic;\r
-            chan_id_valid : OUT std_ulogic;\r
-            chan_id_0 : OUT std_ulogic;\r
-            chan_id_1 : OUT std_ulogic;\r
-            chan_id_2 : OUT std_ulogic;\r
-            chan_id_3 : OUT std_ulogic;\r
-            data_valid : OUT std_ulogic;\r
-            data_0 : OUT std_ulogic;\r
-            data_1 : OUT std_ulogic;\r
-            data_2 : OUT std_ulogic;\r
-            data_3 : OUT std_ulogic;\r
-            data_4 : OUT std_ulogic;\r
-            data_5 : OUT std_ulogic;\r
-            data_6 : OUT std_ulogic;\r
-            data_7 : OUT std_ulogic;\r
-            data_8 : OUT std_ulogic;\r
-            data_9 : OUT std_ulogic;\r
-            data_10 : OUT std_ulogic;\r
-            data_11 : OUT std_ulogic;\r
-            eos_intr : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            sw_negvref : IN std_ulogic;\r
-            cfg_st_sel_0 : IN std_ulogic;\r
-            cfg_st_sel_1 : IN std_ulogic;\r
-            cfg_average : IN std_ulogic;\r
-            cfg_resolution : IN std_ulogic;\r
-            cfg_differential : IN std_ulogic;\r
-            trigger : IN std_ulogic;\r
-            data_hilo_sel : IN std_ulogic;\r
-            swctrl0 : IN std_ulogic;\r
-            swctrl1 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4sarmuxcell\r
-    END COMPONENT;\r
-    COMPONENT p4tempcell\r
-    END COMPONENT;\r
-    COMPONENT p4vrefcell\r
-    END COMPONENT;\r
-    COMPONENT pmcell\r
-        PORT (\r
-            ctw_int : OUT std_ulogic;\r
-            ftw_int : OUT std_ulogic;\r
-            limact_int : OUT std_ulogic;\r
-            onepps_int : OUT std_ulogic;\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            pump_clock : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            sof_udb : IN std_ulogic;\r
-            vp_ctl_udb_0 : IN std_ulogic;\r
-            vp_ctl_udb_1 : IN std_ulogic;\r
-            vp_ctl_udb_2 : IN std_ulogic;\r
-            vp_ctl_udb_3 : IN std_ulogic;\r
-            vn_ctl_udb_0 : IN std_ulogic;\r
-            vn_ctl_udb_1 : IN std_ulogic;\r
-            vn_ctl_udb_2 : IN std_ulogic;\r
-            vn_ctl_udb_3 : IN std_ulogic;\r
-            data_out_udb_0 : OUT std_ulogic;\r
-            data_out_udb_1 : OUT std_ulogic;\r
-            data_out_udb_2 : OUT std_ulogic;\r
-            data_out_udb_3 : OUT std_ulogic;\r
-            data_out_udb_4 : OUT std_ulogic;\r
-            data_out_udb_5 : OUT std_ulogic;\r
-            data_out_udb_6 : OUT std_ulogic;\r
-            data_out_udb_7 : OUT std_ulogic;\r
-            data_out_udb_8 : OUT std_ulogic;\r
-            data_out_udb_9 : OUT std_ulogic;\r
-            data_out_udb_10 : OUT std_ulogic;\r
-            data_out_udb_11 : OUT std_ulogic;\r
-            eof_udb : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            next : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sccell\r
-        PORT (\r
-            aclk : IN std_ulogic;\r
-            bst_clk : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            modout : OUT std_ulogic;\r
-            dyn_cntl_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT spccell\r
-        PORT (\r
-            data_ready : OUT std_ulogic;\r
-            eeprom_fault_int : OUT std_ulogic;\r
-            idle : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT ssccell\r
-        PORT (\r
-            rst_n : IN std_ulogic;\r
-            scli : IN std_ulogic;\r
-            sdai : IN std_ulogic;\r
-            csel : IN std_ulogic;\r
-            sclo : OUT std_ulogic;\r
-            sdao : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT statuscell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            status_7 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF statuscell : COMPONENT IS "clock";\r
-    ATTRIBUTE udb_clken OF statuscell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF statuscell : COMPONENT IS "reset";\r
-    COMPONENT statusicell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF statusicell : COMPONENT IS "clock";\r
-    ATTRIBUTE udb_clken OF statusicell : COMPONENT IS "clk_en";\r
-    ATTRIBUTE udb_reset OF statusicell : COMPONENT IS "reset";\r
-    COMPONENT synccell\r
-        PORT (\r
-            in : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            out : OUT std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    ATTRIBUTE udb_clk OF synccell : COMPONENT IS "clock,clock_n,extclk,extclk_n";\r
-    ATTRIBUTE udb_clken OF synccell : COMPONENT IS "clk_en";\r
-    COMPONENT tfaultcell\r
-        PORT (\r
-            tfault_dsi : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT timercell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            kill : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            timer_reset : IN std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            cmp : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT udbclockencell\r
-        PORT (\r
-            clock_in : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clock_out : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT usbcell\r
-        PORT (\r
-            sof_int : OUT std_ulogic;\r
-            arb_int : OUT std_ulogic;\r
-            usb_int : OUT std_ulogic;\r
-            ord_int : OUT std_ulogic;\r
-            ept_int_0 : OUT std_ulogic;\r
-            ept_int_1 : OUT std_ulogic;\r
-            ept_int_2 : OUT std_ulogic;\r
-            ept_int_3 : OUT std_ulogic;\r
-            ept_int_4 : OUT std_ulogic;\r
-            ept_int_5 : OUT std_ulogic;\r
-            ept_int_6 : OUT std_ulogic;\r
-            ept_int_7 : OUT std_ulogic;\r
-            ept_int_8 : OUT std_ulogic;\r
-            dma_req_0 : OUT std_ulogic;\r
-            dma_req_1 : OUT std_ulogic;\r
-            dma_req_2 : OUT std_ulogic;\r
-            dma_req_3 : OUT std_ulogic;\r
-            dma_req_4 : OUT std_ulogic;\r
-            dma_req_5 : OUT std_ulogic;\r
-            dma_req_6 : OUT std_ulogic;\r
-            dma_req_7 : OUT std_ulogic;\r
-            dma_termin : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT vidaccell\r
-        PORT (\r
-            data_0 : IN std_ulogic;\r
-            data_1 : IN std_ulogic;\r
-            data_2 : IN std_ulogic;\r
-            data_3 : IN std_ulogic;\r
-            data_4 : IN std_ulogic;\r
-            data_5 : IN std_ulogic;\r
-            data_6 : IN std_ulogic;\r
-            data_7 : IN std_ulogic;\r
-            strobe : IN std_ulogic;\r
-            strobe_udb : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            idir : IN std_ulogic;\r
-            ioff : IN std_ulogic);\r
-    END COMPONENT;\r
-BEGIN\r
-\r
-    ClockBlock:clockblockcell\r
-        PORT MAP(\r
-            clk_bus_glb => ClockBlock_BUS_CLK,\r
-            clk_bus => ClockBlock_BUS_CLK_local,\r
-            clk_sync => ClockBlock_MASTER_CLK,\r
-            clk_32k_xtal => ClockBlock_XTAL_32KHZ,\r
-            xtal => ClockBlock_XTAL,\r
-            ilo => ClockBlock_ILO,\r
-            clk_100k => ClockBlock_100k,\r
-            clk_1k => ClockBlock_1k,\r
-            clk_32k => ClockBlock_32k,\r
-            pllout => ClockBlock_PLL_OUT,\r
-            imo => ClockBlock_IMO,\r
-            dsi_clkin_div => open,\r
-            dsi_glb_div => open);\r
-\r
-    SCSI_Out:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110110110",\r
-            ibuf_enabled => "1111111111",\r
-            id => "11f071e8-9c92-47e0-872a-3f48765a75b8",\r
-            init_dr_st => "0000000000",\r
-            input_clk_en => 0,\r
-            input_sync => "1111111111",\r
-            input_sync_mode => "0000000000",\r
-            intr_mode => "00000000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "5, 5, 5, 5, 5, 5, 5, 5, 5, 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0000000000",\r
-            oe_reset => 0,\r
-            oe_sync => "0000000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0000000000",\r
-            output_conn => "0000000000",\r
-            output_mode => "0000000000",\r
-            output_reset => 0,\r
-            output_sync => "0000000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DBP_raw,ATN,BSY,ACK,RST,MSG,SEL,CD,REQ,IO_raw",\r
-            pin_mode => "OOOOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0000000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00000000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0000000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "1111111111",\r
-            vtrip => "10101010101010101010",\r
-            width => 10,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(8):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 8,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(8)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(8)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(9):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 9,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(9)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(9)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110",\r
-            ibuf_enabled => "11111111",\r
-            id => "52f31aa9-2f0a-497d-9a1f-1424095e13e6",\r
-            init_dr_st => "00000000",\r
-            input_clk_en => 0,\r
-            input_sync => "11111111",\r
-            input_sync_mode => "00000000",\r
-            intr_mode => "0000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => ", , , , , , , 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "00000000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000000",\r
-            output_conn => "00000000",\r
-            output_mode => "00000000",\r
-            output_reset => 0,\r
-            output_sync => "00000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DB0,DB1,DB2,DB3,DB4,DB5,DB6,DB7",\r
-            pin_mode => "OOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "11111111",\r
-            vtrip => "1010101010101010",\r
-            width => 8,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out_DBx(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "010010010010010",\r
-            ibuf_enabled => "11111",\r
-            id => "4c15b41e-e284-4978-99e7-5aaee19bd0ce",\r
-            init_dr_st => "11111",\r
-            input_clk_en => 0,\r
-            input_sync => "11111",\r
-            input_sync_mode => "00000",\r
-            intr_mode => "0000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "3.3, , , , ",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "00000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000",\r
-            output_conn => "00000",\r
-            output_mode => "00000",\r
-            output_reset => 0,\r
-            output_sync => "00000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => ",,,,",\r
-            pin_mode => "IIIII",\r
-            por_state => 2,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "00000",\r
-            vtrip => "0000000000",\r
-            width => 5,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            in_clock => open);\r
-\r
-    SD_PULLUP(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(0)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(0)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(1)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(1)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(2)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(2)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(3)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(3)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(4)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(4)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dm\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000010000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dm(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/8b77a6c4-10a0-4390-971c-672353e2a49c",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "00",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "A",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "10",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    \USBFS:Dp(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dp\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000001000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dp(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dp\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "10",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "I",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "00",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            interrupt => \USBFS:Net_1010\,\r
-            in_clock => open);\r
-\r
-    \USBFS:USB\:usbcell\r
-        GENERIC MAP(\r
-            cy_registers => "")\r
-        PORT MAP(\r
-            sof_int => Net_40,\r
-            arb_int => \USBFS:Net_79\,\r
-            usb_int => \USBFS:Net_81\,\r
-            ept_int_8 => \USBFS:ept_int_8\,\r
-            ept_int_7 => \USBFS:ept_int_7\,\r
-            ept_int_6 => \USBFS:ept_int_6\,\r
-            ept_int_5 => \USBFS:ept_int_5\,\r
-            ept_int_4 => \USBFS:ept_int_4\,\r
-            ept_int_3 => \USBFS:ept_int_3\,\r
-            ept_int_2 => \USBFS:ept_int_2\,\r
-            ept_int_1 => \USBFS:ept_int_1\,\r
-            ept_int_0 => \USBFS:ept_int_0\,\r
-            ord_int => \USBFS:Net_95\,\r
-            dma_req_7 => \USBFS:dma_req_7\,\r
-            dma_req_6 => \USBFS:dma_req_6\,\r
-            dma_req_5 => \USBFS:dma_req_5\,\r
-            dma_req_4 => \USBFS:dma_req_4\,\r
-            dma_req_3 => \USBFS:dma_req_3\,\r
-            dma_req_2 => \USBFS:dma_req_2\,\r
-            dma_req_1 => \USBFS:dma_req_1\,\r
-            dma_req_0 => \USBFS:dma_req_0\,\r
-            dma_termin => \USBFS:Net_824\);\r
-\r
-    \USBFS:arb_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_79\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:bus_reset\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_81\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:dp_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_1010\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_0\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_0\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_1\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_1\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_2\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_2\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:sof_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => Net_40,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-END __DEFAULT__;\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.lib b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.lib
deleted file mode 100755 (executable)
index b4f81be..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.lib
+++ /dev/null
@@ -1,1699 +0,0 @@
-library (timing) {\r
-    timescale : 1ns;\r
-    capacitive_load_unit (1,ff);\r
-    include_file(device.lib);\r
-    cell (iocell1) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.093;\r
-                intrinsic_fall : 15.093;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.033;\r
-                intrinsic_fall : 7.033;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell2) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.111;\r
-                intrinsic_fall : 15.111;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.255;\r
-                intrinsic_fall : 7.255;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell3) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.495;\r
-                intrinsic_fall : 15.495;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.644;\r
-                intrinsic_fall : 7.644;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell4) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.561;\r
-                intrinsic_fall : 15.561;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.354;\r
-                intrinsic_fall : 7.354;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell5) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.023;\r
-                intrinsic_fall : 15.023;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 8.264;\r
-                intrinsic_fall : 8.264;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell6) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.563;\r
-                intrinsic_fall : 7.563;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell7) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.744;\r
-                intrinsic_fall : 15.744;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.958;\r
-                intrinsic_fall : 7.958;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell8) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.459;\r
-                intrinsic_fall : 15.459;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.950;\r
-                intrinsic_fall : 7.950;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell9) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.802;\r
-                intrinsic_fall : 15.802;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.962;\r
-                intrinsic_fall : 7.962;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell10) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.251;\r
-                intrinsic_fall : 15.251;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.922;\r
-                intrinsic_fall : 7.922;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell11) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.011;\r
-                intrinsic_fall : 15.011;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.576;\r
-                intrinsic_fall : 7.576;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell12) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.746;\r
-                intrinsic_fall : 15.746;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.331;\r
-                intrinsic_fall : 7.331;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell13) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.065;\r
-                intrinsic_fall : 7.065;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell14) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.914;\r
-                intrinsic_fall : 14.914;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.816;\r
-                intrinsic_fall : 7.816;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell15) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.222;\r
-                intrinsic_fall : 15.222;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.459;\r
-                intrinsic_fall : 7.459;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell16) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.976;\r
-                intrinsic_fall : 15.976;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.582;\r
-                intrinsic_fall : 7.582;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell17) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.347;\r
-                intrinsic_fall : 15.347;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.368;\r
-                intrinsic_fall : 7.368;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell18) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 16.004;\r
-                intrinsic_fall : 16.004;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 6.974;\r
-                intrinsic_fall : 6.974;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell19) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.979;\r
-                intrinsic_fall : 14.979;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.661;\r
-                intrinsic_fall : 1.661;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell20) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.995;\r
-                intrinsic_fall : 14.995;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.852;\r
-                intrinsic_fall : 1.852;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell21) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.591;\r
-                intrinsic_fall : 14.591;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 3.163;\r
-                intrinsic_fall : 3.163;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell22) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.987;\r
-                intrinsic_fall : 14.987;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.191;\r
-                intrinsic_fall : 2.191;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell23) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.338;\r
-                intrinsic_fall : 15.338;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.064;\r
-                intrinsic_fall : 2.064;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell24) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.053;\r
-                intrinsic_fall : 19.053;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 9.497;\r
-                intrinsic_fall : 9.497;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell25) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.129;\r
-                intrinsic_fall : 19.129;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.717;\r
-                intrinsic_fall : 2.717;\r
-            }\r
-        }\r
-    }\r
-}\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.vh2 b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.vh2
deleted file mode 100755 (executable)
index eb4dbe8..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_r.vh2
+++ /dev/null
@@ -1,1972 +0,0 @@
--- Project:   USB_Bootloader\r
--- Generated: 03/22/2014 22:32:52\r
--- \r
-\r
-ENTITY USB_Bootloader IS\r
-    PORT(\r
-        SCSI_Out(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out(7)_PAD : OUT std_ulogic;\r
-        SCSI_Out(8)_PAD : OUT std_ulogic;\r
-        SCSI_Out(9)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(7)_PAD : OUT std_ulogic;\r
-        SD_PULLUP(0)_PAD : IN std_ulogic;\r
-        SD_PULLUP(1)_PAD : IN std_ulogic;\r
-        SD_PULLUP(2)_PAD : IN std_ulogic;\r
-        SD_PULLUP(3)_PAD : IN std_ulogic;\r
-        SD_PULLUP(4)_PAD : IN std_ulogic);\r
-    ATTRIBUTE voltage_Vio1 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vusb OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vddd OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio3 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vdda OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio0 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio2 OF __DEFAULT__ : ENTITY IS 5e0;\r
-END USB_Bootloader;\r
-\r
-ARCHITECTURE __DEFAULT__ OF USB_Bootloader IS\r
-    SIGNAL ClockBlock_100k : bit;\r
-    SIGNAL ClockBlock_1k : bit;\r
-    SIGNAL ClockBlock_32k : bit;\r
-    SIGNAL ClockBlock_BUS_CLK : bit;\r
-    ATTRIBUTE global_signal OF ClockBlock_BUS_CLK : SIGNAL IS true;\r
-    SIGNAL ClockBlock_BUS_CLK_local : bit;\r
-    SIGNAL ClockBlock_ILO : bit;\r
-    SIGNAL ClockBlock_IMO : bit;\r
-    SIGNAL ClockBlock_MASTER_CLK : bit;\r
-    SIGNAL ClockBlock_PLL_OUT : bit;\r
-    SIGNAL ClockBlock_XTAL : bit;\r
-    SIGNAL ClockBlock_XTAL_32KHZ : bit;\r
-    SIGNAL Net_40 : bit;\r
-    SIGNAL SCSI_Out(0)__PA : bit;\r
-    SIGNAL SCSI_Out(1)__PA : bit;\r
-    SIGNAL SCSI_Out(2)__PA : bit;\r
-    SIGNAL SCSI_Out(3)__PA : bit;\r
-    SIGNAL SCSI_Out(4)__PA : bit;\r
-    SIGNAL SCSI_Out(5)__PA : bit;\r
-    SIGNAL SCSI_Out(6)__PA : bit;\r
-    SIGNAL SCSI_Out(7)__PA : bit;\r
-    SIGNAL SCSI_Out(8)__PA : bit;\r
-    SIGNAL SCSI_Out(9)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(0)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(1)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(2)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(3)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(4)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(5)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(6)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(7)__PA : bit;\r
-    SIGNAL SD_PULLUP(0)__PA : bit;\r
-    SIGNAL SD_PULLUP(1)__PA : bit;\r
-    SIGNAL SD_PULLUP(2)__PA : bit;\r
-    SIGNAL SD_PULLUP(3)__PA : bit;\r
-    SIGNAL SD_PULLUP(4)__PA : bit;\r
-    SIGNAL \\\USBFS:Dm(0)\\__PA\ : bit;\r
-    SIGNAL \\\USBFS:Dp(0)\\__PA\ : bit;\r
-    SIGNAL \USBFS:Net_1010\ : bit;\r
-    SIGNAL \USBFS:Net_79\ : bit;\r
-    SIGNAL \USBFS:Net_81\ : bit;\r
-    SIGNAL \USBFS:Net_824\ : bit;\r
-    SIGNAL \USBFS:Net_95\ : bit;\r
-    SIGNAL \USBFS:dma_req_0\ : bit;\r
-    SIGNAL \USBFS:dma_req_1\ : bit;\r
-    SIGNAL \USBFS:dma_req_2\ : bit;\r
-    SIGNAL \USBFS:dma_req_3\ : bit;\r
-    SIGNAL \USBFS:dma_req_4\ : bit;\r
-    SIGNAL \USBFS:dma_req_5\ : bit;\r
-    SIGNAL \USBFS:dma_req_6\ : bit;\r
-    SIGNAL \USBFS:dma_req_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_0\ : bit;\r
-    SIGNAL \USBFS:ept_int_1\ : bit;\r
-    SIGNAL \USBFS:ept_int_2\ : bit;\r
-    SIGNAL \USBFS:ept_int_3\ : bit;\r
-    SIGNAL \USBFS:ept_int_4\ : bit;\r
-    SIGNAL \USBFS:ept_int_5\ : bit;\r
-    SIGNAL \USBFS:ept_int_6\ : bit;\r
-    SIGNAL \USBFS:ept_int_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_8\ : bit;\r
-    SIGNAL __ONE__ : bit;\r
-    ATTRIBUTE POWER OF __ONE__ : SIGNAL IS true;\r
-    SIGNAL __ZERO__ : bit;\r
-    ATTRIBUTE GROUND OF __ZERO__ : SIGNAL IS true;\r
-    SIGNAL one : bit;\r
-    ATTRIBUTE POWER OF one : SIGNAL IS true;\r
-    SIGNAL zero : bit;\r
-    ATTRIBUTE GROUND OF zero : SIGNAL IS true;\r
-    ATTRIBUTE Location OF ClockBlock : LABEL IS "F(Clock,0)";\r
-    ATTRIBUTE lib_model OF SCSI_Out(0) : LABEL IS "iocell1";\r
-    ATTRIBUTE Location OF SCSI_Out(0) : LABEL IS "P4[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(1) : LABEL IS "iocell2";\r
-    ATTRIBUTE Location OF SCSI_Out(1) : LABEL IS "P4[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(2) : LABEL IS "iocell3";\r
-    ATTRIBUTE Location OF SCSI_Out(2) : LABEL IS "P0[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(3) : LABEL IS "iocell4";\r
-    ATTRIBUTE Location OF SCSI_Out(3) : LABEL IS "P0[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(4) : LABEL IS "iocell5";\r
-    ATTRIBUTE Location OF SCSI_Out(4) : LABEL IS "P0[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(5) : LABEL IS "iocell6";\r
-    ATTRIBUTE Location OF SCSI_Out(5) : LABEL IS "P0[4]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(6) : LABEL IS "iocell7";\r
-    ATTRIBUTE Location OF SCSI_Out(6) : LABEL IS "P0[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(7) : LABEL IS "iocell8";\r
-    ATTRIBUTE Location OF SCSI_Out(7) : LABEL IS "P0[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(8) : LABEL IS "iocell9";\r
-    ATTRIBUTE Location OF SCSI_Out(8) : LABEL IS "P0[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(9) : LABEL IS "iocell10";\r
-    ATTRIBUTE Location OF SCSI_Out(9) : LABEL IS "P0[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(0) : LABEL IS "iocell11";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(0) : LABEL IS "P6[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(1) : LABEL IS "iocell12";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(1) : LABEL IS "P6[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(2) : LABEL IS "iocell13";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(2) : LABEL IS "P6[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(3) : LABEL IS "iocell14";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(3) : LABEL IS "P6[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(4) : LABEL IS "iocell15";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(4) : LABEL IS "P4[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(5) : LABEL IS "iocell16";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(5) : LABEL IS "P4[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(6) : LABEL IS "iocell17";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(6) : LABEL IS "P4[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(7) : LABEL IS "iocell18";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(7) : LABEL IS "P4[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(0) : LABEL IS "iocell19";\r
-    ATTRIBUTE Location OF SD_PULLUP(0) : LABEL IS "P3[1]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(1) : LABEL IS "iocell20";\r
-    ATTRIBUTE Location OF SD_PULLUP(1) : LABEL IS "P3[2]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(2) : LABEL IS "iocell21";\r
-    ATTRIBUTE Location OF SD_PULLUP(2) : LABEL IS "P3[3]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(3) : LABEL IS "iocell22";\r
-    ATTRIBUTE Location OF SD_PULLUP(3) : LABEL IS "P3[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(4) : LABEL IS "iocell23";\r
-    ATTRIBUTE Location OF SD_PULLUP(4) : LABEL IS "P3[5]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dm(0)\ : LABEL IS "iocell24";\r
-    ATTRIBUTE Location OF \USBFS:Dm(0)\ : LABEL IS "P15[7]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dp(0)\ : LABEL IS "iocell25";\r
-    ATTRIBUTE Location OF \USBFS:Dp(0)\ : LABEL IS "P15[6]";\r
-    ATTRIBUTE Location OF \USBFS:Dp\ : LABEL IS "F(PICU,8)";\r
-    ATTRIBUTE Location OF \USBFS:USB\ : LABEL IS "F(USB,0)";\r
-    ATTRIBUTE Location OF \USBFS:arb_int\ : LABEL IS "[IntrHod=(0)][IntrId=(22)]";\r
-    ATTRIBUTE Location OF \USBFS:bus_reset\ : LABEL IS "[IntrHod=(0)][IntrId=(23)]";\r
-    ATTRIBUTE Location OF \USBFS:dp_int\ : LABEL IS "[IntrHod=(0)][IntrId=(12)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_0\ : LABEL IS "[IntrHod=(0)][IntrId=(24)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_1\ : LABEL IS "[IntrHod=(0)][IntrId=(0)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_2\ : LABEL IS "[IntrHod=(0)][IntrId=(1)]";\r
-    ATTRIBUTE Location OF \USBFS:sof_int\ : LABEL IS "[IntrHod=(0)][IntrId=(21)]";\r
-    COMPONENT abufcell\r
-    END COMPONENT;\r
-    COMPONENT boostcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cachecell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cancell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            can_rx : IN std_ulogic;\r
-            can_tx : OUT std_ulogic;\r
-            can_tx_en : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT capsensecell\r
-        PORT (\r
-            lft : IN std_ulogic;\r
-            rt : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT clockblockcell\r
-        PORT (\r
-            dclk_0 : OUT std_ulogic;\r
-            dclk_1 : OUT std_ulogic;\r
-            dclk_2 : OUT std_ulogic;\r
-            dclk_3 : OUT std_ulogic;\r
-            dclk_4 : OUT std_ulogic;\r
-            dclk_5 : OUT std_ulogic;\r
-            dclk_6 : OUT std_ulogic;\r
-            dclk_7 : OUT std_ulogic;\r
-            dclk_glb_0 : OUT std_ulogic;\r
-            dclk_glb_1 : OUT std_ulogic;\r
-            dclk_glb_2 : OUT std_ulogic;\r
-            dclk_glb_3 : OUT std_ulogic;\r
-            dclk_glb_4 : OUT std_ulogic;\r
-            dclk_glb_5 : OUT std_ulogic;\r
-            dclk_glb_6 : OUT std_ulogic;\r
-            dclk_glb_7 : OUT std_ulogic;\r
-            aclk_0 : OUT std_ulogic;\r
-            aclk_1 : OUT std_ulogic;\r
-            aclk_2 : OUT std_ulogic;\r
-            aclk_3 : OUT std_ulogic;\r
-            aclk_glb_0 : OUT std_ulogic;\r
-            aclk_glb_1 : OUT std_ulogic;\r
-            aclk_glb_2 : OUT std_ulogic;\r
-            aclk_glb_3 : OUT std_ulogic;\r
-            clk_a_dig_0 : OUT std_ulogic;\r
-            clk_a_dig_1 : OUT std_ulogic;\r
-            clk_a_dig_2 : OUT std_ulogic;\r
-            clk_a_dig_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_3 : OUT std_ulogic;\r
-            clk_bus : OUT std_ulogic;\r
-            clk_bus_glb : OUT std_ulogic;\r
-            clk_sync : OUT std_ulogic;\r
-            clk_32k_xtal : OUT std_ulogic;\r
-            clk_100k : OUT std_ulogic;\r
-            clk_32k : OUT std_ulogic;\r
-            clk_1k : OUT std_ulogic;\r
-            clk_usb : OUT std_ulogic;\r
-            xmhz_xerr : OUT std_ulogic;\r
-            pll_lock_out : OUT std_ulogic;\r
-            dsi_dig_div_0 : IN std_ulogic;\r
-            dsi_dig_div_1 : IN std_ulogic;\r
-            dsi_dig_div_2 : IN std_ulogic;\r
-            dsi_dig_div_3 : IN std_ulogic;\r
-            dsi_dig_div_4 : IN std_ulogic;\r
-            dsi_dig_div_5 : IN std_ulogic;\r
-            dsi_dig_div_6 : IN std_ulogic;\r
-            dsi_dig_div_7 : IN std_ulogic;\r
-            dsi_ana_div_0 : IN std_ulogic;\r
-            dsi_ana_div_1 : IN std_ulogic;\r
-            dsi_ana_div_2 : IN std_ulogic;\r
-            dsi_ana_div_3 : IN std_ulogic;\r
-            dsi_glb_div : IN std_ulogic;\r
-            dsi_clkin_div : IN std_ulogic;\r
-            imo : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            xtal : OUT std_ulogic;\r
-            pllout : OUT std_ulogic;\r
-            clk_bus_glb_ff : OUT std_ulogic;\r
-            aclk_glb_ff_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_0 : OUT std_ulogic;\r
-            aclk_glb_ff_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_1 : OUT std_ulogic;\r
-            aclk_glb_ff_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_2 : OUT std_ulogic;\r
-            aclk_glb_ff_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_0 : OUT std_ulogic;\r
-            dclk_glb_ff_1 : OUT std_ulogic;\r
-            dclk_glb_ff_2 : OUT std_ulogic;\r
-            dclk_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_4 : OUT std_ulogic;\r
-            dclk_glb_ff_5 : OUT std_ulogic;\r
-            dclk_glb_ff_6 : OUT std_ulogic;\r
-            dclk_glb_ff_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT comparatorcell\r
-        PORT (\r
-            out : OUT std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT controlcell\r
-        PORT (\r
-            control_0 : OUT std_ulogic;\r
-            control_1 : OUT std_ulogic;\r
-            control_2 : OUT std_ulogic;\r
-            control_3 : OUT std_ulogic;\r
-            control_4 : OUT std_ulogic;\r
-            control_5 : OUT std_ulogic;\r
-            control_6 : OUT std_ulogic;\r
-            control_7 : OUT std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT count7cell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            load : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            count_0 : OUT std_ulogic;\r
-            count_1 : OUT std_ulogic;\r
-            count_2 : OUT std_ulogic;\r
-            count_3 : OUT std_ulogic;\r
-            count_4 : OUT std_ulogic;\r
-            count_5 : OUT std_ulogic;\r
-            count_6 : OUT std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT csabufcell\r
-        PORT (\r
-            swon : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT datapathcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            cs_addr_0 : IN std_ulogic;\r
-            cs_addr_1 : IN std_ulogic;\r
-            cs_addr_2 : IN std_ulogic;\r
-            route_si : IN std_ulogic;\r
-            route_ci : IN std_ulogic;\r
-            f0_load : IN std_ulogic;\r
-            f1_load : IN std_ulogic;\r
-            d0_load : IN std_ulogic;\r
-            d1_load : IN std_ulogic;\r
-            ce0_reg : OUT std_ulogic;\r
-            cl0_reg : OUT std_ulogic;\r
-            z0_reg : OUT std_ulogic;\r
-            f0_reg : OUT std_ulogic;\r
-            ce1_reg : OUT std_ulogic;\r
-            cl1_reg : OUT std_ulogic;\r
-            z1_reg : OUT std_ulogic;\r
-            f1_reg : OUT std_ulogic;\r
-            ov_msb_reg : OUT std_ulogic;\r
-            co_msb_reg : OUT std_ulogic;\r
-            cmsb_reg : OUT std_ulogic;\r
-            so_reg : OUT std_ulogic;\r
-            f0_bus_stat_reg : OUT std_ulogic;\r
-            f0_blk_stat_reg : OUT std_ulogic;\r
-            f1_bus_stat_reg : OUT std_ulogic;\r
-            f1_blk_stat_reg : OUT std_ulogic;\r
-            ce0_comb : OUT std_ulogic;\r
-            cl0_comb : OUT std_ulogic;\r
-            z0_comb : OUT std_ulogic;\r
-            f0_comb : OUT std_ulogic;\r
-            ce1_comb : OUT std_ulogic;\r
-            cl1_comb : OUT std_ulogic;\r
-            z1_comb : OUT std_ulogic;\r
-            f1_comb : OUT std_ulogic;\r
-            ov_msb_comb : OUT std_ulogic;\r
-            co_msb_comb : OUT std_ulogic;\r
-            cmsb_comb : OUT std_ulogic;\r
-            so_comb : OUT std_ulogic;\r
-            f0_bus_stat_comb : OUT std_ulogic;\r
-            f0_blk_stat_comb : OUT std_ulogic;\r
-            f1_bus_stat_comb : OUT std_ulogic;\r
-            f1_blk_stat_comb : OUT std_ulogic;\r
-            ce0 : OUT std_ulogic;\r
-            ce0i : IN std_ulogic;\r
-            p_in_0 : IN std_ulogic;\r
-            p_in_1 : IN std_ulogic;\r
-            p_in_2 : IN std_ulogic;\r
-            p_in_3 : IN std_ulogic;\r
-            p_in_4 : IN std_ulogic;\r
-            p_in_5 : IN std_ulogic;\r
-            p_in_6 : IN std_ulogic;\r
-            p_in_7 : IN std_ulogic;\r
-            p_out_0 : OUT std_ulogic;\r
-            p_out_1 : OUT std_ulogic;\r
-            p_out_2 : OUT std_ulogic;\r
-            p_out_3 : OUT std_ulogic;\r
-            p_out_4 : OUT std_ulogic;\r
-            p_out_5 : OUT std_ulogic;\r
-            p_out_6 : OUT std_ulogic;\r
-            p_out_7 : OUT std_ulogic;\r
-            cl0i : IN std_ulogic;\r
-            cl0 : OUT std_ulogic;\r
-            z0i : IN std_ulogic;\r
-            z0 : OUT std_ulogic;\r
-            ff0i : IN std_ulogic;\r
-            ff0 : OUT std_ulogic;\r
-            ce1i : IN std_ulogic;\r
-            ce1 : OUT std_ulogic;\r
-            cl1i : IN std_ulogic;\r
-            cl1 : OUT std_ulogic;\r
-            z1i : IN std_ulogic;\r
-            z1 : OUT std_ulogic;\r
-            ff1i : IN std_ulogic;\r
-            ff1 : OUT std_ulogic;\r
-            cap0i : IN std_ulogic;\r
-            cap0 : OUT std_ulogic;\r
-            cap1i : IN std_ulogic;\r
-            cap1 : OUT std_ulogic;\r
-            ci : IN std_ulogic;\r
-            co_msb : OUT std_ulogic;\r
-            sir : IN std_ulogic;\r
-            sol_msb : OUT std_ulogic;\r
-            cfbi : IN std_ulogic;\r
-            cfbo : OUT std_ulogic;\r
-            sil : IN std_ulogic;\r
-            sor : OUT std_ulogic;\r
-            cmsbi : IN std_ulogic;\r
-            cmsbo : OUT std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT decimatorcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            mod_dat_0 : IN std_ulogic;\r
-            mod_dat_1 : IN std_ulogic;\r
-            mod_dat_2 : IN std_ulogic;\r
-            mod_dat_3 : IN std_ulogic;\r
-            ext_start : IN std_ulogic;\r
-            modrst : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dfbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            in_1 : IN std_ulogic;\r
-            in_2 : IN std_ulogic;\r
-            out_1 : OUT std_ulogic;\r
-            out_2 : OUT std_ulogic;\r
-            dmareq_1 : OUT std_ulogic;\r
-            dmareq_2 : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT drqcell\r
-        PORT (\r
-            dmareq : IN std_ulogic;\r
-            termin : IN std_ulogic;\r
-            termout : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dsmodcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            modbitin_udb : IN std_ulogic;\r
-            reset_udb : IN std_ulogic;\r
-            reset_dec : IN std_ulogic;\r
-            dec_clock : OUT std_ulogic;\r
-            mod_dat_0 : OUT std_ulogic;\r
-            mod_dat_1 : OUT std_ulogic;\r
-            mod_dat_2 : OUT std_ulogic;\r
-            mod_dat_3 : OUT std_ulogic;\r
-            dout_udb_0 : OUT std_ulogic;\r
-            dout_udb_1 : OUT std_ulogic;\r
-            dout_udb_2 : OUT std_ulogic;\r
-            dout_udb_3 : OUT std_ulogic;\r
-            dout_udb_4 : OUT std_ulogic;\r
-            dout_udb_5 : OUT std_ulogic;\r
-            dout_udb_6 : OUT std_ulogic;\r
-            dout_udb_7 : OUT std_ulogic;\r
-            extclk_cp_udb : IN std_ulogic;\r
-            clk_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT emifcell\r
-        PORT (\r
-            EM_clock : OUT std_ulogic;\r
-            EM_CEn : OUT std_ulogic;\r
-            EM_OEn : OUT std_ulogic;\r
-            EM_ADSCn : OUT std_ulogic;\r
-            EM_sleep : OUT std_ulogic;\r
-            EM_WRn : OUT std_ulogic;\r
-            dataport_OE : OUT std_ulogic;\r
-            dataport_OEn : OUT std_ulogic;\r
-            wr : OUT std_ulogic;\r
-            rd : OUT std_ulogic;\r
-            udb_stall : IN std_ulogic;\r
-            udb_ready : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT i2ccell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            scl_in : IN std_ulogic;\r
-            sda_in : IN std_ulogic;\r
-            scl_out : OUT std_ulogic;\r
-            sda_out : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT interrupt\r
-        PORT (\r
-            interrupt : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT iocell\r
-        PORT (\r
-            pin_input : IN std_ulogic;\r
-            oe : IN std_ulogic;\r
-            fb : OUT std_ulogic;\r
-            pad_in : IN std_ulogic;\r
-            pa_out : OUT std_ulogic;\r
-            pad_out : OUT std_ulogic;\r
-            oe_reg : OUT std_ulogic;\r
-            oe_internal : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lcdctrlcell\r
-        PORT (\r
-            drive_en : IN std_ulogic;\r
-            frame : IN std_ulogic;\r
-            data_clk : IN std_ulogic;\r
-            en_hi : IN std_ulogic;\r
-            dac_dis : IN std_ulogic;\r
-            chop_clk : IN std_ulogic;\r
-            int_clr : IN std_ulogic;\r
-            lp_ack_udb : IN std_ulogic;\r
-            mode_1 : IN std_ulogic;\r
-            mode_2 : IN std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT logicalport\r
-        PORT (\r
-            interrupt : OUT std_ulogic;\r
-            precharge : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lpfcell\r
-    END COMPONENT;\r
-    COMPONENT lvdcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockblockcell\r
-        PORT (\r
-            imo : OUT std_ulogic;\r
-            ext : OUT std_ulogic;\r
-            eco : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            wco : OUT std_ulogic;\r
-            dbl : OUT std_ulogic;\r
-            pll : OUT std_ulogic;\r
-            dpll : OUT std_ulogic;\r
-            dsi_out_0 : OUT std_ulogic;\r
-            dsi_out_1 : OUT std_ulogic;\r
-            dsi_out_2 : OUT std_ulogic;\r
-            dsi_out_3 : OUT std_ulogic;\r
-            lfclk : OUT std_ulogic;\r
-            hfclk : OUT std_ulogic;\r
-            sysclk : OUT std_ulogic;\r
-            halfsysclk : OUT std_ulogic;\r
-            udb_div_0 : OUT std_ulogic;\r
-            udb_div_1 : OUT std_ulogic;\r
-            udb_div_2 : OUT std_ulogic;\r
-            udb_div_3 : OUT std_ulogic;\r
-            udb_div_4 : OUT std_ulogic;\r
-            udb_div_5 : OUT std_ulogic;\r
-            udb_div_6 : OUT std_ulogic;\r
-            udb_div_7 : OUT std_ulogic;\r
-            udb_div_8 : OUT std_ulogic;\r
-            udb_div_9 : OUT std_ulogic;\r
-            udb_div_10 : OUT std_ulogic;\r
-            udb_div_11 : OUT std_ulogic;\r
-            udb_div_12 : OUT std_ulogic;\r
-            udb_div_13 : OUT std_ulogic;\r
-            udb_div_14 : OUT std_ulogic;\r
-            udb_div_15 : OUT std_ulogic;\r
-            uab_div_0 : OUT std_ulogic;\r
-            uab_div_1 : OUT std_ulogic;\r
-            uab_div_2 : OUT std_ulogic;\r
-            uab_div_3 : OUT std_ulogic;\r
-            ff_div_0 : OUT std_ulogic;\r
-            ff_div_1 : OUT std_ulogic;\r
-            ff_div_2 : OUT std_ulogic;\r
-            ff_div_3 : OUT std_ulogic;\r
-            ff_div_4 : OUT std_ulogic;\r
-            ff_div_5 : OUT std_ulogic;\r
-            ff_div_6 : OUT std_ulogic;\r
-            ff_div_7 : OUT std_ulogic;\r
-            ff_div_8 : OUT std_ulogic;\r
-            ff_div_9 : OUT std_ulogic;\r
-            ff_div_10 : OUT std_ulogic;\r
-            ff_div_11 : OUT std_ulogic;\r
-            ff_div_12 : OUT std_ulogic;\r
-            ff_div_13 : OUT std_ulogic;\r
-            ff_div_14 : OUT std_ulogic;\r
-            ff_div_15 : OUT std_ulogic;\r
-            dsi_in_0 : IN std_ulogic;\r
-            dsi_in_1 : IN std_ulogic;\r
-            dsi_in_2 : IN std_ulogic;\r
-            dsi_in_3 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockgenblockcell\r
-        PORT (\r
-            gen_clk_in_0 : IN std_ulogic;\r
-            gen_clk_in_1 : IN std_ulogic;\r
-            gen_clk_in_2 : IN std_ulogic;\r
-            gen_clk_in_3 : IN std_ulogic;\r
-            gen_clk_in_4 : IN std_ulogic;\r
-            gen_clk_in_5 : IN std_ulogic;\r
-            gen_clk_in_6 : IN std_ulogic;\r
-            gen_clk_in_7 : IN std_ulogic;\r
-            gen_clk_out_0 : OUT std_ulogic;\r
-            gen_clk_out_1 : OUT std_ulogic;\r
-            gen_clk_out_2 : OUT std_ulogic;\r
-            gen_clk_out_3 : OUT std_ulogic;\r
-            gen_clk_out_4 : OUT std_ulogic;\r
-            gen_clk_out_5 : OUT std_ulogic;\r
-            gen_clk_out_6 : OUT std_ulogic;\r
-            gen_clk_out_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8lcdcell\r
-        PORT (\r
-            common_0 : OUT std_ulogic;\r
-            common_1 : OUT std_ulogic;\r
-            common_2 : OUT std_ulogic;\r
-            common_3 : OUT std_ulogic;\r
-            common_4 : OUT std_ulogic;\r
-            common_5 : OUT std_ulogic;\r
-            common_6 : OUT std_ulogic;\r
-            common_7 : OUT std_ulogic;\r
-            common_8 : OUT std_ulogic;\r
-            common_9 : OUT std_ulogic;\r
-            common_10 : OUT std_ulogic;\r
-            common_11 : OUT std_ulogic;\r
-            common_12 : OUT std_ulogic;\r
-            common_13 : OUT std_ulogic;\r
-            common_14 : OUT std_ulogic;\r
-            common_15 : OUT std_ulogic;\r
-            segment_0 : OUT std_ulogic;\r
-            segment_1 : OUT std_ulogic;\r
-            segment_2 : OUT std_ulogic;\r
-            segment_3 : OUT std_ulogic;\r
-            segment_4 : OUT std_ulogic;\r
-            segment_5 : OUT std_ulogic;\r
-            segment_6 : OUT std_ulogic;\r
-            segment_7 : OUT std_ulogic;\r
-            segment_8 : OUT std_ulogic;\r
-            segment_9 : OUT std_ulogic;\r
-            segment_10 : OUT std_ulogic;\r
-            segment_11 : OUT std_ulogic;\r
-            segment_12 : OUT std_ulogic;\r
-            segment_13 : OUT std_ulogic;\r
-            segment_14 : OUT std_ulogic;\r
-            segment_15 : OUT std_ulogic;\r
-            segment_16 : OUT std_ulogic;\r
-            segment_17 : OUT std_ulogic;\r
-            segment_18 : OUT std_ulogic;\r
-            segment_19 : OUT std_ulogic;\r
-            segment_20 : OUT std_ulogic;\r
-            segment_21 : OUT std_ulogic;\r
-            segment_22 : OUT std_ulogic;\r
-            segment_23 : OUT std_ulogic;\r
-            segment_24 : OUT std_ulogic;\r
-            segment_25 : OUT std_ulogic;\r
-            segment_26 : OUT std_ulogic;\r
-            segment_27 : OUT std_ulogic;\r
-            segment_28 : OUT std_ulogic;\r
-            segment_29 : OUT std_ulogic;\r
-            segment_30 : OUT std_ulogic;\r
-            segment_31 : OUT std_ulogic;\r
-            segment_32 : OUT std_ulogic;\r
-            segment_33 : OUT std_ulogic;\r
-            segment_34 : OUT std_ulogic;\r
-            segment_35 : OUT std_ulogic;\r
-            segment_36 : OUT std_ulogic;\r
-            segment_37 : OUT std_ulogic;\r
-            segment_38 : OUT std_ulogic;\r
-            segment_39 : OUT std_ulogic;\r
-            segment_40 : OUT std_ulogic;\r
-            segment_41 : OUT std_ulogic;\r
-            segment_42 : OUT std_ulogic;\r
-            segment_43 : OUT std_ulogic;\r
-            segment_44 : OUT std_ulogic;\r
-            segment_45 : OUT std_ulogic;\r
-            segment_46 : OUT std_ulogic;\r
-            segment_47 : OUT std_ulogic;\r
-            segment_48 : OUT std_ulogic;\r
-            segment_49 : OUT std_ulogic;\r
-            segment_50 : OUT std_ulogic;\r
-            segment_51 : OUT std_ulogic;\r
-            segment_52 : OUT std_ulogic;\r
-            segment_53 : OUT std_ulogic;\r
-            segment_54 : OUT std_ulogic;\r
-            segment_55 : OUT std_ulogic;\r
-            segment_56 : OUT std_ulogic;\r
-            segment_57 : OUT std_ulogic;\r
-            segment_58 : OUT std_ulogic;\r
-            segment_59 : OUT std_ulogic;\r
-            segment_60 : OUT std_ulogic;\r
-            segment_61 : OUT std_ulogic;\r
-            segment_62 : OUT std_ulogic;\r
-            segment_63 : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8pmcell\r
-        PORT (\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8scbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            rx : IN std_ulogic;\r
-            tx : OUT std_ulogic;\r
-            mosi_m : OUT std_ulogic;\r
-            miso_m : IN std_ulogic;\r
-            select_m_0 : OUT std_ulogic;\r
-            select_m_1 : OUT std_ulogic;\r
-            select_m_2 : OUT std_ulogic;\r
-            select_m_3 : OUT std_ulogic;\r
-            sclk_m : OUT std_ulogic;\r
-            mosi_s : IN std_ulogic;\r
-            miso_s : OUT std_ulogic;\r
-            select_s : IN std_ulogic;\r
-            sclk_s : IN std_ulogic;\r
-            scl : INOUT std_ulogic;\r
-            sda : INOUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8spcifcell\r
-        PORT (\r
-            spcif_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tcpwmcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            count : IN std_ulogic;\r
-            reload : IN std_ulogic;\r
-            stop : IN std_ulogic;\r
-            start : IN std_ulogic;\r
-            tr_underflow : OUT std_ulogic;\r
-            tr_overflow : OUT std_ulogic;\r
-            tr_compare_match : OUT std_ulogic;\r
-            line_out : OUT std_ulogic;\r
-            line_out_compl : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tsscell\r
-        PORT (\r
-            clk_seq : IN std_ulogic;\r
-            clk_adc : IN std_ulogic;\r
-            ext_reject : IN std_ulogic;\r
-            ext_sync : IN std_ulogic;\r
-            tx_sync : IN std_ulogic;\r
-            reject_in : IN std_ulogic;\r
-            start_in : IN std_ulogic;\r
-            lx_det_hi : OUT std_ulogic;\r
-            lx_det_lo : OUT std_ulogic;\r
-            rej_window : OUT std_ulogic;\r
-            tx_hilo : OUT std_ulogic;\r
-            phase_end : OUT std_ulogic;\r
-            phase_num_0 : OUT std_ulogic;\r
-            phase_num_1 : OUT std_ulogic;\r
-            phase_num_2 : OUT std_ulogic;\r
-            phase_num_3 : OUT std_ulogic;\r
-            ipq_reject : OUT std_ulogic;\r
-            ipq_start : OUT std_ulogic;\r
-            epq_reject : OUT std_ulogic;\r
-            epq_start : OUT std_ulogic;\r
-            mcs_reject : OUT std_ulogic;\r
-            mcs_start : OUT std_ulogic;\r
-            do_switch : OUT std_ulogic;\r
-            adc_start : OUT std_ulogic;\r
-            adc_done : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8wdtcell\r
-        PORT (\r
-            wdt_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT macrocell\r
-        PORT (\r
-            main_0 : IN std_ulogic;\r
-            main_1 : IN std_ulogic;\r
-            main_2 : IN std_ulogic;\r
-            main_3 : IN std_ulogic;\r
-            main_4 : IN std_ulogic;\r
-            main_5 : IN std_ulogic;\r
-            main_6 : IN std_ulogic;\r
-            main_7 : IN std_ulogic;\r
-            main_8 : IN std_ulogic;\r
-            main_9 : IN std_ulogic;\r
-            main_10 : IN std_ulogic;\r
-            main_11 : IN std_ulogic;\r
-            ar_0 : IN std_ulogic;\r
-            ap_0 : IN std_ulogic;\r
-            clock_0 : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            cin : IN std_ulogic;\r
-            cpt0_0 : IN std_ulogic;\r
-            cpt0_1 : IN std_ulogic;\r
-            cpt0_2 : IN std_ulogic;\r
-            cpt0_3 : IN std_ulogic;\r
-            cpt0_4 : IN std_ulogic;\r
-            cpt0_5 : IN std_ulogic;\r
-            cpt0_6 : IN std_ulogic;\r
-            cpt0_7 : IN std_ulogic;\r
-            cpt0_8 : IN std_ulogic;\r
-            cpt0_9 : IN std_ulogic;\r
-            cpt0_10 : IN std_ulogic;\r
-            cpt0_11 : IN std_ulogic;\r
-            cpt1_0 : IN std_ulogic;\r
-            cpt1_1 : IN std_ulogic;\r
-            cpt1_2 : IN std_ulogic;\r
-            cpt1_3 : IN std_ulogic;\r
-            cpt1_4 : IN std_ulogic;\r
-            cpt1_5 : IN std_ulogic;\r
-            cpt1_6 : IN std_ulogic;\r
-            cpt1_7 : IN std_ulogic;\r
-            cpt1_8 : IN std_ulogic;\r
-            cpt1_9 : IN std_ulogic;\r
-            cpt1_10 : IN std_ulogic;\r
-            cpt1_11 : IN std_ulogic;\r
-            cout : OUT std_ulogic;\r
-            q : OUT std_ulogic;\r
-            q_fixed : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4abufcell\r
-        PORT (\r
-            ctb_dsi_comp : OUT std_ulogic;\r
-            dsi_out : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4anapumpcell\r
-        PORT (\r
-            pump_clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csdcell\r
-        PORT (\r
-            sense_out : OUT std_ulogic;\r
-            sample_out : OUT std_ulogic;\r
-            sense_in : IN std_ulogic;\r
-            sample_in : IN std_ulogic;\r
-            clk1 : IN std_ulogic;\r
-            clk2 : IN std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac7cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac8cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4ctbmblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4halfuabcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            comp : OUT std_ulogic;\r
-            ctrl : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompcell\r
-        PORT (\r
-            cmpout : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4rsbcell\r
-    END COMPONENT;\r
-    COMPONENT p4sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            sample_done : OUT std_ulogic;\r
-            chan_id_valid : OUT std_ulogic;\r
-            chan_id_0 : OUT std_ulogic;\r
-            chan_id_1 : OUT std_ulogic;\r
-            chan_id_2 : OUT std_ulogic;\r
-            chan_id_3 : OUT std_ulogic;\r
-            data_valid : OUT std_ulogic;\r
-            data_0 : OUT std_ulogic;\r
-            data_1 : OUT std_ulogic;\r
-            data_2 : OUT std_ulogic;\r
-            data_3 : OUT std_ulogic;\r
-            data_4 : OUT std_ulogic;\r
-            data_5 : OUT std_ulogic;\r
-            data_6 : OUT std_ulogic;\r
-            data_7 : OUT std_ulogic;\r
-            data_8 : OUT std_ulogic;\r
-            data_9 : OUT std_ulogic;\r
-            data_10 : OUT std_ulogic;\r
-            data_11 : OUT std_ulogic;\r
-            eos_intr : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            sw_negvref : IN std_ulogic;\r
-            cfg_st_sel_0 : IN std_ulogic;\r
-            cfg_st_sel_1 : IN std_ulogic;\r
-            cfg_average : IN std_ulogic;\r
-            cfg_resolution : IN std_ulogic;\r
-            cfg_differential : IN std_ulogic;\r
-            trigger : IN std_ulogic;\r
-            data_hilo_sel : IN std_ulogic;\r
-            swctrl0 : IN std_ulogic;\r
-            swctrl1 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4sarmuxcell\r
-    END COMPONENT;\r
-    COMPONENT p4tempcell\r
-    END COMPONENT;\r
-    COMPONENT p4vrefcell\r
-    END COMPONENT;\r
-    COMPONENT pmcell\r
-        PORT (\r
-            ctw_int : OUT std_ulogic;\r
-            ftw_int : OUT std_ulogic;\r
-            limact_int : OUT std_ulogic;\r
-            onepps_int : OUT std_ulogic;\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            pump_clock : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            sof_udb : IN std_ulogic;\r
-            vp_ctl_udb_0 : IN std_ulogic;\r
-            vp_ctl_udb_1 : IN std_ulogic;\r
-            vp_ctl_udb_2 : IN std_ulogic;\r
-            vp_ctl_udb_3 : IN std_ulogic;\r
-            vn_ctl_udb_0 : IN std_ulogic;\r
-            vn_ctl_udb_1 : IN std_ulogic;\r
-            vn_ctl_udb_2 : IN std_ulogic;\r
-            vn_ctl_udb_3 : IN std_ulogic;\r
-            data_out_udb_0 : OUT std_ulogic;\r
-            data_out_udb_1 : OUT std_ulogic;\r
-            data_out_udb_2 : OUT std_ulogic;\r
-            data_out_udb_3 : OUT std_ulogic;\r
-            data_out_udb_4 : OUT std_ulogic;\r
-            data_out_udb_5 : OUT std_ulogic;\r
-            data_out_udb_6 : OUT std_ulogic;\r
-            data_out_udb_7 : OUT std_ulogic;\r
-            data_out_udb_8 : OUT std_ulogic;\r
-            data_out_udb_9 : OUT std_ulogic;\r
-            data_out_udb_10 : OUT std_ulogic;\r
-            data_out_udb_11 : OUT std_ulogic;\r
-            eof_udb : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            next : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sccell\r
-        PORT (\r
-            aclk : IN std_ulogic;\r
-            bst_clk : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            modout : OUT std_ulogic;\r
-            dyn_cntl_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT spccell\r
-        PORT (\r
-            data_ready : OUT std_ulogic;\r
-            eeprom_fault_int : OUT std_ulogic;\r
-            idle : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT ssccell\r
-        PORT (\r
-            rst_n : IN std_ulogic;\r
-            scli : IN std_ulogic;\r
-            sdai : IN std_ulogic;\r
-            csel : IN std_ulogic;\r
-            sclo : OUT std_ulogic;\r
-            sdao : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT statuscell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            status_7 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT statusicell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT synccell\r
-        PORT (\r
-            in : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            out : OUT std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT tfaultcell\r
-        PORT (\r
-            tfault_dsi : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT timercell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            kill : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            timer_reset : IN std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            cmp : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT udbclockencell\r
-        PORT (\r
-            clock_in : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clock_out : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT usbcell\r
-        PORT (\r
-            sof_int : OUT std_ulogic;\r
-            arb_int : OUT std_ulogic;\r
-            usb_int : OUT std_ulogic;\r
-            ord_int : OUT std_ulogic;\r
-            ept_int_0 : OUT std_ulogic;\r
-            ept_int_1 : OUT std_ulogic;\r
-            ept_int_2 : OUT std_ulogic;\r
-            ept_int_3 : OUT std_ulogic;\r
-            ept_int_4 : OUT std_ulogic;\r
-            ept_int_5 : OUT std_ulogic;\r
-            ept_int_6 : OUT std_ulogic;\r
-            ept_int_7 : OUT std_ulogic;\r
-            ept_int_8 : OUT std_ulogic;\r
-            dma_req_0 : OUT std_ulogic;\r
-            dma_req_1 : OUT std_ulogic;\r
-            dma_req_2 : OUT std_ulogic;\r
-            dma_req_3 : OUT std_ulogic;\r
-            dma_req_4 : OUT std_ulogic;\r
-            dma_req_5 : OUT std_ulogic;\r
-            dma_req_6 : OUT std_ulogic;\r
-            dma_req_7 : OUT std_ulogic;\r
-            dma_termin : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT vidaccell\r
-        PORT (\r
-            data_0 : IN std_ulogic;\r
-            data_1 : IN std_ulogic;\r
-            data_2 : IN std_ulogic;\r
-            data_3 : IN std_ulogic;\r
-            data_4 : IN std_ulogic;\r
-            data_5 : IN std_ulogic;\r
-            data_6 : IN std_ulogic;\r
-            data_7 : IN std_ulogic;\r
-            strobe : IN std_ulogic;\r
-            strobe_udb : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            idir : IN std_ulogic;\r
-            ioff : IN std_ulogic);\r
-    END COMPONENT;\r
-BEGIN\r
-\r
-    ClockBlock:clockblockcell\r
-        PORT MAP(\r
-            clk_bus_glb => ClockBlock_BUS_CLK,\r
-            clk_bus => ClockBlock_BUS_CLK_local,\r
-            clk_sync => ClockBlock_MASTER_CLK,\r
-            clk_32k_xtal => ClockBlock_XTAL_32KHZ,\r
-            xtal => ClockBlock_XTAL,\r
-            ilo => ClockBlock_ILO,\r
-            clk_100k => ClockBlock_100k,\r
-            clk_1k => ClockBlock_1k,\r
-            clk_32k => ClockBlock_32k,\r
-            pllout => ClockBlock_PLL_OUT,\r
-            imo => ClockBlock_IMO,\r
-            dsi_clkin_div => open,\r
-            dsi_glb_div => open);\r
-\r
-    SCSI_Out:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110110110",\r
-            ibuf_enabled => "1111111111",\r
-            id => "11f071e8-9c92-47e0-872a-3f48765a75b8",\r
-            init_dr_st => "0000000000",\r
-            input_clk_en => 0,\r
-            input_sync => "1111111111",\r
-            input_sync_mode => "0000000000",\r
-            intr_mode => "00000000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "5, 5, 5, 5, 5, 5, 5, 5, 5, 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0000000000",\r
-            oe_reset => 0,\r
-            oe_sync => "0000000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0000000000",\r
-            output_conn => "0000000000",\r
-            output_mode => "0000000000",\r
-            output_reset => 0,\r
-            output_sync => "0000000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DBP_raw,ATN,BSY,ACK,RST,MSG,SEL,CD,REQ,IO_raw",\r
-            pin_mode => "OOOOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0000000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00000000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0000000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "1111111111",\r
-            vtrip => "10101010101010101010",\r
-            width => 10,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(8):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 8,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(8)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(8)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(9):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 9,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(9)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(9)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110",\r
-            ibuf_enabled => "11111111",\r
-            id => "52f31aa9-2f0a-497d-9a1f-1424095e13e6",\r
-            init_dr_st => "00000000",\r
-            input_clk_en => 0,\r
-            input_sync => "11111111",\r
-            input_sync_mode => "00000000",\r
-            intr_mode => "0000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => ", , , , , , , 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "00000000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000000",\r
-            output_conn => "00000000",\r
-            output_mode => "00000000",\r
-            output_reset => 0,\r
-            output_sync => "00000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DB0,DB1,DB2,DB3,DB4,DB5,DB6,DB7",\r
-            pin_mode => "OOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "11111111",\r
-            vtrip => "1010101010101010",\r
-            width => 8,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out_DBx(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "010010010010010",\r
-            ibuf_enabled => "11111",\r
-            id => "4c15b41e-e284-4978-99e7-5aaee19bd0ce",\r
-            init_dr_st => "11111",\r
-            input_clk_en => 0,\r
-            input_sync => "11111",\r
-            input_sync_mode => "00000",\r
-            intr_mode => "0000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "3.3, , , , ",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "00000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000",\r
-            output_conn => "00000",\r
-            output_mode => "00000",\r
-            output_reset => 0,\r
-            output_sync => "00000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => ",,,,",\r
-            pin_mode => "IIIII",\r
-            por_state => 2,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "00000",\r
-            vtrip => "0000000000",\r
-            width => 5,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            in_clock => open);\r
-\r
-    SD_PULLUP(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(0)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(0)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(1)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(1)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(2)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(2)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(3)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(3)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(4)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(4)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dm\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000010000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dm(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/8b77a6c4-10a0-4390-971c-672353e2a49c",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "00",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "A",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "10",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    \USBFS:Dp(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dp\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000001000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dp(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dp\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "10",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "I",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "00",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            interrupt => \USBFS:Net_1010\,\r
-            in_clock => open);\r
-\r
-    \USBFS:USB\:usbcell\r
-        GENERIC MAP(\r
-            cy_registers => "")\r
-        PORT MAP(\r
-            sof_int => Net_40,\r
-            arb_int => \USBFS:Net_79\,\r
-            usb_int => \USBFS:Net_81\,\r
-            ept_int_8 => \USBFS:ept_int_8\,\r
-            ept_int_7 => \USBFS:ept_int_7\,\r
-            ept_int_6 => \USBFS:ept_int_6\,\r
-            ept_int_5 => \USBFS:ept_int_5\,\r
-            ept_int_4 => \USBFS:ept_int_4\,\r
-            ept_int_3 => \USBFS:ept_int_3\,\r
-            ept_int_2 => \USBFS:ept_int_2\,\r
-            ept_int_1 => \USBFS:ept_int_1\,\r
-            ept_int_0 => \USBFS:ept_int_0\,\r
-            ord_int => \USBFS:Net_95\,\r
-            dma_req_7 => \USBFS:dma_req_7\,\r
-            dma_req_6 => \USBFS:dma_req_6\,\r
-            dma_req_5 => \USBFS:dma_req_5\,\r
-            dma_req_4 => \USBFS:dma_req_4\,\r
-            dma_req_3 => \USBFS:dma_req_3\,\r
-            dma_req_2 => \USBFS:dma_req_2\,\r
-            dma_req_1 => \USBFS:dma_req_1\,\r
-            dma_req_0 => \USBFS:dma_req_0\,\r
-            dma_termin => \USBFS:Net_824\);\r
-\r
-    \USBFS:arb_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_79\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:bus_reset\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_81\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:dp_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_1010\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_0\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_0\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_1\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_1\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_2\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_2\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:sof_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => Net_40,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-END __DEFAULT__;\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.lib b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.lib
deleted file mode 100755 (executable)
index b4f81be..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.lib
+++ /dev/null
@@ -1,1699 +0,0 @@
-library (timing) {\r
-    timescale : 1ns;\r
-    capacitive_load_unit (1,ff);\r
-    include_file(device.lib);\r
-    cell (iocell1) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.445;\r
-                intrinsic_fall : 16.445;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.093;\r
-                intrinsic_fall : 15.093;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.033;\r
-                intrinsic_fall : 7.033;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell2) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.297;\r
-                intrinsic_fall : 17.297;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.111;\r
-                intrinsic_fall : 15.111;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.255;\r
-                intrinsic_fall : 7.255;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell3) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.269;\r
-                intrinsic_fall : 17.269;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.495;\r
-                intrinsic_fall : 15.495;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.644;\r
-                intrinsic_fall : 7.644;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell4) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.371;\r
-                intrinsic_fall : 17.371;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.561;\r
-                intrinsic_fall : 15.561;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.354;\r
-                intrinsic_fall : 7.354;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell5) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.182;\r
-                intrinsic_fall : 17.182;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.023;\r
-                intrinsic_fall : 15.023;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 8.264;\r
-                intrinsic_fall : 8.264;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell6) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.718;\r
-                intrinsic_fall : 17.718;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.563;\r
-                intrinsic_fall : 7.563;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell7) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.610;\r
-                intrinsic_fall : 17.610;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.744;\r
-                intrinsic_fall : 15.744;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.958;\r
-                intrinsic_fall : 7.958;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell8) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.428;\r
-                intrinsic_fall : 17.428;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.459;\r
-                intrinsic_fall : 15.459;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.950;\r
-                intrinsic_fall : 7.950;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell9) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.434;\r
-                intrinsic_fall : 17.434;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.802;\r
-                intrinsic_fall : 15.802;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.962;\r
-                intrinsic_fall : 7.962;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell10) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.161;\r
-                intrinsic_fall : 17.161;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.251;\r
-                intrinsic_fall : 15.251;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.922;\r
-                intrinsic_fall : 7.922;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell11) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.840;\r
-                intrinsic_fall : 17.840;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.011;\r
-                intrinsic_fall : 15.011;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.576;\r
-                intrinsic_fall : 7.576;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell12) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.165;\r
-                intrinsic_fall : 17.165;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.746;\r
-                intrinsic_fall : 15.746;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.331;\r
-                intrinsic_fall : 7.331;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell13) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.973;\r
-                intrinsic_fall : 16.973;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.880;\r
-                intrinsic_fall : 14.880;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.065;\r
-                intrinsic_fall : 7.065;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell14) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.979;\r
-                intrinsic_fall : 16.979;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.914;\r
-                intrinsic_fall : 14.914;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.816;\r
-                intrinsic_fall : 7.816;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell15) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.374;\r
-                intrinsic_fall : 17.374;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.222;\r
-                intrinsic_fall : 15.222;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.459;\r
-                intrinsic_fall : 7.459;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell16) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.157;\r
-                intrinsic_fall : 17.157;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.976;\r
-                intrinsic_fall : 15.976;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.582;\r
-                intrinsic_fall : 7.582;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell17) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.578;\r
-                intrinsic_fall : 16.578;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.347;\r
-                intrinsic_fall : 15.347;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 7.368;\r
-                intrinsic_fall : 7.368;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell18) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.786;\r
-                intrinsic_fall : 17.786;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 16.004;\r
-                intrinsic_fall : 16.004;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 6.974;\r
-                intrinsic_fall : 6.974;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell19) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.419;\r
-                intrinsic_fall : 16.419;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.979;\r
-                intrinsic_fall : 14.979;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.661;\r
-                intrinsic_fall : 1.661;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell20) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.643;\r
-                intrinsic_fall : 17.643;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.995;\r
-                intrinsic_fall : 14.995;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 1.852;\r
-                intrinsic_fall : 1.852;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell21) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.081;\r
-                intrinsic_fall : 17.081;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.591;\r
-                intrinsic_fall : 14.591;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 3.163;\r
-                intrinsic_fall : 3.163;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell22) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 16.646;\r
-                intrinsic_fall : 16.646;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 14.987;\r
-                intrinsic_fall : 14.987;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.191;\r
-                intrinsic_fall : 2.191;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell23) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 17.787;\r
-                intrinsic_fall : 17.787;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 15.338;\r
-                intrinsic_fall : 15.338;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.064;\r
-                intrinsic_fall : 2.064;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell24) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.053;\r
-                intrinsic_fall : 19.053;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pad_in";\r
-                intrinsic_rise : 9.497;\r
-                intrinsic_fall : 9.497;\r
-            }\r
-        }\r
-    }\r
-    cell (iocell25) {\r
-        pin (in_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (in_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (in_reset) {\r
-            direction : input;\r
-        }\r
-        pin (out_clock) {\r
-            direction : input;\r
-            clock : true;\r
-        }\r
-        pin (out_clock_en) {\r
-            direction : input;\r
-        }\r
-        pin (out_reset) {\r
-            direction : input;\r
-        }\r
-        pin (pin_input) {\r
-            direction : input;\r
-        }\r
-        pin (pa_out) {\r
-            direction : output;\r
-        }\r
-        pin (oe) {\r
-            direction : input;\r
-        }\r
-        pin (pad_in) {\r
-            direction : input;\r
-        }\r
-        pin (pad_out) {\r
-            direction : output;\r
-            timing () {\r
-                timing_sense : negative_unate;\r
-                timing_type : three_state_disable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : three_state_enable;\r
-                related_pin : "oe";\r
-                intrinsic_rise : 52.000;\r
-                intrinsic_fall : 52.000;\r
-            }\r
-            timing () {\r
-                timing_sense : positive_unate;\r
-                timing_type : combinational;\r
-                related_pin : "pin_input";\r
-                intrinsic_rise : 19.129;\r
-                intrinsic_fall : 19.129;\r
-            }\r
-        }\r
-        pin (fb) {\r
-            direction : output;\r
-            timing () {\r
-                timing_type : rising_edge;\r
-                related_pin : "in_clock";\r
-                intrinsic_rise : 2.717;\r
-                intrinsic_fall : 2.717;\r
-            }\r
-        }\r
-    }\r
-}\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.vh2 b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.vh2
deleted file mode 100755 (executable)
index fa0079f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_t.vh2
+++ /dev/null
@@ -1,1972 +0,0 @@
--- Project:   W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj\r
--- Generated: 03/22/2014 22:32:56\r
--- \r
-\r
-ENTITY USB_Bootloader IS\r
-    PORT(\r
-        SCSI_Out(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out(7)_PAD : OUT std_ulogic;\r
-        SCSI_Out(8)_PAD : OUT std_ulogic;\r
-        SCSI_Out(9)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(0)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(1)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(2)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(3)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(4)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(5)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(6)_PAD : OUT std_ulogic;\r
-        SCSI_Out_DBx(7)_PAD : OUT std_ulogic;\r
-        SD_PULLUP(0)_PAD : IN std_ulogic;\r
-        SD_PULLUP(1)_PAD : IN std_ulogic;\r
-        SD_PULLUP(2)_PAD : IN std_ulogic;\r
-        SD_PULLUP(3)_PAD : IN std_ulogic;\r
-        SD_PULLUP(4)_PAD : IN std_ulogic);\r
-    ATTRIBUTE voltage_Vio1 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vusb OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vddd OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio3 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vdda OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio0 OF __DEFAULT__ : ENTITY IS 5e0;\r
-    ATTRIBUTE voltage_Vio2 OF __DEFAULT__ : ENTITY IS 5e0;\r
-END USB_Bootloader;\r
-\r
-ARCHITECTURE __DEFAULT__ OF USB_Bootloader IS\r
-    SIGNAL ClockBlock_100k : bit;\r
-    SIGNAL ClockBlock_1k : bit;\r
-    SIGNAL ClockBlock_32k : bit;\r
-    SIGNAL ClockBlock_BUS_CLK : bit;\r
-    ATTRIBUTE global_signal OF ClockBlock_BUS_CLK : SIGNAL IS true;\r
-    SIGNAL ClockBlock_BUS_CLK_local : bit;\r
-    SIGNAL ClockBlock_ILO : bit;\r
-    SIGNAL ClockBlock_IMO : bit;\r
-    SIGNAL ClockBlock_MASTER_CLK : bit;\r
-    SIGNAL ClockBlock_PLL_OUT : bit;\r
-    SIGNAL ClockBlock_XTAL : bit;\r
-    SIGNAL ClockBlock_XTAL_32KHZ : bit;\r
-    SIGNAL Net_40 : bit;\r
-    SIGNAL SCSI_Out(0)__PA : bit;\r
-    SIGNAL SCSI_Out(1)__PA : bit;\r
-    SIGNAL SCSI_Out(2)__PA : bit;\r
-    SIGNAL SCSI_Out(3)__PA : bit;\r
-    SIGNAL SCSI_Out(4)__PA : bit;\r
-    SIGNAL SCSI_Out(5)__PA : bit;\r
-    SIGNAL SCSI_Out(6)__PA : bit;\r
-    SIGNAL SCSI_Out(7)__PA : bit;\r
-    SIGNAL SCSI_Out(8)__PA : bit;\r
-    SIGNAL SCSI_Out(9)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(0)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(1)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(2)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(3)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(4)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(5)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(6)__PA : bit;\r
-    SIGNAL SCSI_Out_DBx(7)__PA : bit;\r
-    SIGNAL SD_PULLUP(0)__PA : bit;\r
-    SIGNAL SD_PULLUP(1)__PA : bit;\r
-    SIGNAL SD_PULLUP(2)__PA : bit;\r
-    SIGNAL SD_PULLUP(3)__PA : bit;\r
-    SIGNAL SD_PULLUP(4)__PA : bit;\r
-    SIGNAL \\\USBFS:Dm(0)\\__PA\ : bit;\r
-    SIGNAL \\\USBFS:Dp(0)\\__PA\ : bit;\r
-    SIGNAL \USBFS:Net_1010\ : bit;\r
-    SIGNAL \USBFS:Net_79\ : bit;\r
-    SIGNAL \USBFS:Net_81\ : bit;\r
-    SIGNAL \USBFS:Net_824\ : bit;\r
-    SIGNAL \USBFS:Net_95\ : bit;\r
-    SIGNAL \USBFS:dma_req_0\ : bit;\r
-    SIGNAL \USBFS:dma_req_1\ : bit;\r
-    SIGNAL \USBFS:dma_req_2\ : bit;\r
-    SIGNAL \USBFS:dma_req_3\ : bit;\r
-    SIGNAL \USBFS:dma_req_4\ : bit;\r
-    SIGNAL \USBFS:dma_req_5\ : bit;\r
-    SIGNAL \USBFS:dma_req_6\ : bit;\r
-    SIGNAL \USBFS:dma_req_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_0\ : bit;\r
-    SIGNAL \USBFS:ept_int_1\ : bit;\r
-    SIGNAL \USBFS:ept_int_2\ : bit;\r
-    SIGNAL \USBFS:ept_int_3\ : bit;\r
-    SIGNAL \USBFS:ept_int_4\ : bit;\r
-    SIGNAL \USBFS:ept_int_5\ : bit;\r
-    SIGNAL \USBFS:ept_int_6\ : bit;\r
-    SIGNAL \USBFS:ept_int_7\ : bit;\r
-    SIGNAL \USBFS:ept_int_8\ : bit;\r
-    SIGNAL __ONE__ : bit;\r
-    ATTRIBUTE POWER OF __ONE__ : SIGNAL IS true;\r
-    SIGNAL __ZERO__ : bit;\r
-    ATTRIBUTE GROUND OF __ZERO__ : SIGNAL IS true;\r
-    SIGNAL one : bit;\r
-    ATTRIBUTE POWER OF one : SIGNAL IS true;\r
-    SIGNAL zero : bit;\r
-    ATTRIBUTE GROUND OF zero : SIGNAL IS true;\r
-    ATTRIBUTE Location OF ClockBlock : LABEL IS "F(Clock,0)";\r
-    ATTRIBUTE lib_model OF SCSI_Out(0) : LABEL IS "iocell1";\r
-    ATTRIBUTE Location OF SCSI_Out(0) : LABEL IS "P4[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(1) : LABEL IS "iocell2";\r
-    ATTRIBUTE Location OF SCSI_Out(1) : LABEL IS "P4[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(2) : LABEL IS "iocell3";\r
-    ATTRIBUTE Location OF SCSI_Out(2) : LABEL IS "P0[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(3) : LABEL IS "iocell4";\r
-    ATTRIBUTE Location OF SCSI_Out(3) : LABEL IS "P0[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(4) : LABEL IS "iocell5";\r
-    ATTRIBUTE Location OF SCSI_Out(4) : LABEL IS "P0[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(5) : LABEL IS "iocell6";\r
-    ATTRIBUTE Location OF SCSI_Out(5) : LABEL IS "P0[4]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(6) : LABEL IS "iocell7";\r
-    ATTRIBUTE Location OF SCSI_Out(6) : LABEL IS "P0[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(7) : LABEL IS "iocell8";\r
-    ATTRIBUTE Location OF SCSI_Out(7) : LABEL IS "P0[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(8) : LABEL IS "iocell9";\r
-    ATTRIBUTE Location OF SCSI_Out(8) : LABEL IS "P0[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out(9) : LABEL IS "iocell10";\r
-    ATTRIBUTE Location OF SCSI_Out(9) : LABEL IS "P0[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(0) : LABEL IS "iocell11";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(0) : LABEL IS "P6[3]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(1) : LABEL IS "iocell12";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(1) : LABEL IS "P6[2]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(2) : LABEL IS "iocell13";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(2) : LABEL IS "P6[1]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(3) : LABEL IS "iocell14";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(3) : LABEL IS "P6[0]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(4) : LABEL IS "iocell15";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(4) : LABEL IS "P4[7]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(5) : LABEL IS "iocell16";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(5) : LABEL IS "P4[6]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(6) : LABEL IS "iocell17";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(6) : LABEL IS "P4[5]";\r
-    ATTRIBUTE lib_model OF SCSI_Out_DBx(7) : LABEL IS "iocell18";\r
-    ATTRIBUTE Location OF SCSI_Out_DBx(7) : LABEL IS "P4[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(0) : LABEL IS "iocell19";\r
-    ATTRIBUTE Location OF SD_PULLUP(0) : LABEL IS "P3[1]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(1) : LABEL IS "iocell20";\r
-    ATTRIBUTE Location OF SD_PULLUP(1) : LABEL IS "P3[2]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(2) : LABEL IS "iocell21";\r
-    ATTRIBUTE Location OF SD_PULLUP(2) : LABEL IS "P3[3]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(3) : LABEL IS "iocell22";\r
-    ATTRIBUTE Location OF SD_PULLUP(3) : LABEL IS "P3[4]";\r
-    ATTRIBUTE lib_model OF SD_PULLUP(4) : LABEL IS "iocell23";\r
-    ATTRIBUTE Location OF SD_PULLUP(4) : LABEL IS "P3[5]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dm(0)\ : LABEL IS "iocell24";\r
-    ATTRIBUTE Location OF \USBFS:Dm(0)\ : LABEL IS "P15[7]";\r
-    ATTRIBUTE lib_model OF \USBFS:Dp(0)\ : LABEL IS "iocell25";\r
-    ATTRIBUTE Location OF \USBFS:Dp(0)\ : LABEL IS "P15[6]";\r
-    ATTRIBUTE Location OF \USBFS:Dp\ : LABEL IS "F(PICU,8)";\r
-    ATTRIBUTE Location OF \USBFS:USB\ : LABEL IS "F(USB,0)";\r
-    ATTRIBUTE Location OF \USBFS:arb_int\ : LABEL IS "[IntrHod=(0)][IntrId=(22)]";\r
-    ATTRIBUTE Location OF \USBFS:bus_reset\ : LABEL IS "[IntrHod=(0)][IntrId=(23)]";\r
-    ATTRIBUTE Location OF \USBFS:dp_int\ : LABEL IS "[IntrHod=(0)][IntrId=(12)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_0\ : LABEL IS "[IntrHod=(0)][IntrId=(24)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_1\ : LABEL IS "[IntrHod=(0)][IntrId=(0)]";\r
-    ATTRIBUTE Location OF \USBFS:ep_2\ : LABEL IS "[IntrHod=(0)][IntrId=(1)]";\r
-    ATTRIBUTE Location OF \USBFS:sof_int\ : LABEL IS "[IntrHod=(0)][IntrId=(21)]";\r
-    COMPONENT abufcell\r
-    END COMPONENT;\r
-    COMPONENT boostcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cachecell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT cancell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            can_rx : IN std_ulogic;\r
-            can_tx : OUT std_ulogic;\r
-            can_tx_en : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT capsensecell\r
-        PORT (\r
-            lft : IN std_ulogic;\r
-            rt : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT clockblockcell\r
-        PORT (\r
-            dclk_0 : OUT std_ulogic;\r
-            dclk_1 : OUT std_ulogic;\r
-            dclk_2 : OUT std_ulogic;\r
-            dclk_3 : OUT std_ulogic;\r
-            dclk_4 : OUT std_ulogic;\r
-            dclk_5 : OUT std_ulogic;\r
-            dclk_6 : OUT std_ulogic;\r
-            dclk_7 : OUT std_ulogic;\r
-            dclk_glb_0 : OUT std_ulogic;\r
-            dclk_glb_1 : OUT std_ulogic;\r
-            dclk_glb_2 : OUT std_ulogic;\r
-            dclk_glb_3 : OUT std_ulogic;\r
-            dclk_glb_4 : OUT std_ulogic;\r
-            dclk_glb_5 : OUT std_ulogic;\r
-            dclk_glb_6 : OUT std_ulogic;\r
-            dclk_glb_7 : OUT std_ulogic;\r
-            aclk_0 : OUT std_ulogic;\r
-            aclk_1 : OUT std_ulogic;\r
-            aclk_2 : OUT std_ulogic;\r
-            aclk_3 : OUT std_ulogic;\r
-            aclk_glb_0 : OUT std_ulogic;\r
-            aclk_glb_1 : OUT std_ulogic;\r
-            aclk_glb_2 : OUT std_ulogic;\r
-            aclk_glb_3 : OUT std_ulogic;\r
-            clk_a_dig_0 : OUT std_ulogic;\r
-            clk_a_dig_1 : OUT std_ulogic;\r
-            clk_a_dig_2 : OUT std_ulogic;\r
-            clk_a_dig_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_3 : OUT std_ulogic;\r
-            clk_bus : OUT std_ulogic;\r
-            clk_bus_glb : OUT std_ulogic;\r
-            clk_sync : OUT std_ulogic;\r
-            clk_32k_xtal : OUT std_ulogic;\r
-            clk_100k : OUT std_ulogic;\r
-            clk_32k : OUT std_ulogic;\r
-            clk_1k : OUT std_ulogic;\r
-            clk_usb : OUT std_ulogic;\r
-            xmhz_xerr : OUT std_ulogic;\r
-            pll_lock_out : OUT std_ulogic;\r
-            dsi_dig_div_0 : IN std_ulogic;\r
-            dsi_dig_div_1 : IN std_ulogic;\r
-            dsi_dig_div_2 : IN std_ulogic;\r
-            dsi_dig_div_3 : IN std_ulogic;\r
-            dsi_dig_div_4 : IN std_ulogic;\r
-            dsi_dig_div_5 : IN std_ulogic;\r
-            dsi_dig_div_6 : IN std_ulogic;\r
-            dsi_dig_div_7 : IN std_ulogic;\r
-            dsi_ana_div_0 : IN std_ulogic;\r
-            dsi_ana_div_1 : IN std_ulogic;\r
-            dsi_ana_div_2 : IN std_ulogic;\r
-            dsi_ana_div_3 : IN std_ulogic;\r
-            dsi_glb_div : IN std_ulogic;\r
-            dsi_clkin_div : IN std_ulogic;\r
-            imo : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            xtal : OUT std_ulogic;\r
-            pllout : OUT std_ulogic;\r
-            clk_bus_glb_ff : OUT std_ulogic;\r
-            aclk_glb_ff_0 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_0 : OUT std_ulogic;\r
-            aclk_glb_ff_1 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_1 : OUT std_ulogic;\r
-            aclk_glb_ff_2 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_2 : OUT std_ulogic;\r
-            aclk_glb_ff_3 : OUT std_ulogic;\r
-            clk_a_dig_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_0 : OUT std_ulogic;\r
-            dclk_glb_ff_1 : OUT std_ulogic;\r
-            dclk_glb_ff_2 : OUT std_ulogic;\r
-            dclk_glb_ff_3 : OUT std_ulogic;\r
-            dclk_glb_ff_4 : OUT std_ulogic;\r
-            dclk_glb_ff_5 : OUT std_ulogic;\r
-            dclk_glb_ff_6 : OUT std_ulogic;\r
-            dclk_glb_ff_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT comparatorcell\r
-        PORT (\r
-            out : OUT std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT controlcell\r
-        PORT (\r
-            control_0 : OUT std_ulogic;\r
-            control_1 : OUT std_ulogic;\r
-            control_2 : OUT std_ulogic;\r
-            control_3 : OUT std_ulogic;\r
-            control_4 : OUT std_ulogic;\r
-            control_5 : OUT std_ulogic;\r
-            control_6 : OUT std_ulogic;\r
-            control_7 : OUT std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT count7cell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            load : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            count_0 : OUT std_ulogic;\r
-            count_1 : OUT std_ulogic;\r
-            count_2 : OUT std_ulogic;\r
-            count_3 : OUT std_ulogic;\r
-            count_4 : OUT std_ulogic;\r
-            count_5 : OUT std_ulogic;\r
-            count_6 : OUT std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT csabufcell\r
-        PORT (\r
-            swon : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT datapathcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            cs_addr_0 : IN std_ulogic;\r
-            cs_addr_1 : IN std_ulogic;\r
-            cs_addr_2 : IN std_ulogic;\r
-            route_si : IN std_ulogic;\r
-            route_ci : IN std_ulogic;\r
-            f0_load : IN std_ulogic;\r
-            f1_load : IN std_ulogic;\r
-            d0_load : IN std_ulogic;\r
-            d1_load : IN std_ulogic;\r
-            ce0_reg : OUT std_ulogic;\r
-            cl0_reg : OUT std_ulogic;\r
-            z0_reg : OUT std_ulogic;\r
-            f0_reg : OUT std_ulogic;\r
-            ce1_reg : OUT std_ulogic;\r
-            cl1_reg : OUT std_ulogic;\r
-            z1_reg : OUT std_ulogic;\r
-            f1_reg : OUT std_ulogic;\r
-            ov_msb_reg : OUT std_ulogic;\r
-            co_msb_reg : OUT std_ulogic;\r
-            cmsb_reg : OUT std_ulogic;\r
-            so_reg : OUT std_ulogic;\r
-            f0_bus_stat_reg : OUT std_ulogic;\r
-            f0_blk_stat_reg : OUT std_ulogic;\r
-            f1_bus_stat_reg : OUT std_ulogic;\r
-            f1_blk_stat_reg : OUT std_ulogic;\r
-            ce0_comb : OUT std_ulogic;\r
-            cl0_comb : OUT std_ulogic;\r
-            z0_comb : OUT std_ulogic;\r
-            f0_comb : OUT std_ulogic;\r
-            ce1_comb : OUT std_ulogic;\r
-            cl1_comb : OUT std_ulogic;\r
-            z1_comb : OUT std_ulogic;\r
-            f1_comb : OUT std_ulogic;\r
-            ov_msb_comb : OUT std_ulogic;\r
-            co_msb_comb : OUT std_ulogic;\r
-            cmsb_comb : OUT std_ulogic;\r
-            so_comb : OUT std_ulogic;\r
-            f0_bus_stat_comb : OUT std_ulogic;\r
-            f0_blk_stat_comb : OUT std_ulogic;\r
-            f1_bus_stat_comb : OUT std_ulogic;\r
-            f1_blk_stat_comb : OUT std_ulogic;\r
-            ce0 : OUT std_ulogic;\r
-            ce0i : IN std_ulogic;\r
-            p_in_0 : IN std_ulogic;\r
-            p_in_1 : IN std_ulogic;\r
-            p_in_2 : IN std_ulogic;\r
-            p_in_3 : IN std_ulogic;\r
-            p_in_4 : IN std_ulogic;\r
-            p_in_5 : IN std_ulogic;\r
-            p_in_6 : IN std_ulogic;\r
-            p_in_7 : IN std_ulogic;\r
-            p_out_0 : OUT std_ulogic;\r
-            p_out_1 : OUT std_ulogic;\r
-            p_out_2 : OUT std_ulogic;\r
-            p_out_3 : OUT std_ulogic;\r
-            p_out_4 : OUT std_ulogic;\r
-            p_out_5 : OUT std_ulogic;\r
-            p_out_6 : OUT std_ulogic;\r
-            p_out_7 : OUT std_ulogic;\r
-            cl0i : IN std_ulogic;\r
-            cl0 : OUT std_ulogic;\r
-            z0i : IN std_ulogic;\r
-            z0 : OUT std_ulogic;\r
-            ff0i : IN std_ulogic;\r
-            ff0 : OUT std_ulogic;\r
-            ce1i : IN std_ulogic;\r
-            ce1 : OUT std_ulogic;\r
-            cl1i : IN std_ulogic;\r
-            cl1 : OUT std_ulogic;\r
-            z1i : IN std_ulogic;\r
-            z1 : OUT std_ulogic;\r
-            ff1i : IN std_ulogic;\r
-            ff1 : OUT std_ulogic;\r
-            cap0i : IN std_ulogic;\r
-            cap0 : OUT std_ulogic;\r
-            cap1i : IN std_ulogic;\r
-            cap1 : OUT std_ulogic;\r
-            ci : IN std_ulogic;\r
-            co_msb : OUT std_ulogic;\r
-            sir : IN std_ulogic;\r
-            sol_msb : OUT std_ulogic;\r
-            cfbi : IN std_ulogic;\r
-            cfbo : OUT std_ulogic;\r
-            sil : IN std_ulogic;\r
-            sor : OUT std_ulogic;\r
-            cmsbi : IN std_ulogic;\r
-            cmsbo : OUT std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT decimatorcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            mod_dat_0 : IN std_ulogic;\r
-            mod_dat_1 : IN std_ulogic;\r
-            mod_dat_2 : IN std_ulogic;\r
-            mod_dat_3 : IN std_ulogic;\r
-            ext_start : IN std_ulogic;\r
-            modrst : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dfbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            in_1 : IN std_ulogic;\r
-            in_2 : IN std_ulogic;\r
-            out_1 : OUT std_ulogic;\r
-            out_2 : OUT std_ulogic;\r
-            dmareq_1 : OUT std_ulogic;\r
-            dmareq_2 : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT drqcell\r
-        PORT (\r
-            dmareq : IN std_ulogic;\r
-            termin : IN std_ulogic;\r
-            termout : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT dsmodcell\r
-        PORT (\r
-            aclock : IN std_ulogic;\r
-            modbitin_udb : IN std_ulogic;\r
-            reset_udb : IN std_ulogic;\r
-            reset_dec : IN std_ulogic;\r
-            dec_clock : OUT std_ulogic;\r
-            mod_dat_0 : OUT std_ulogic;\r
-            mod_dat_1 : OUT std_ulogic;\r
-            mod_dat_2 : OUT std_ulogic;\r
-            mod_dat_3 : OUT std_ulogic;\r
-            dout_udb_0 : OUT std_ulogic;\r
-            dout_udb_1 : OUT std_ulogic;\r
-            dout_udb_2 : OUT std_ulogic;\r
-            dout_udb_3 : OUT std_ulogic;\r
-            dout_udb_4 : OUT std_ulogic;\r
-            dout_udb_5 : OUT std_ulogic;\r
-            dout_udb_6 : OUT std_ulogic;\r
-            dout_udb_7 : OUT std_ulogic;\r
-            extclk_cp_udb : IN std_ulogic;\r
-            clk_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT emifcell\r
-        PORT (\r
-            EM_clock : OUT std_ulogic;\r
-            EM_CEn : OUT std_ulogic;\r
-            EM_OEn : OUT std_ulogic;\r
-            EM_ADSCn : OUT std_ulogic;\r
-            EM_sleep : OUT std_ulogic;\r
-            EM_WRn : OUT std_ulogic;\r
-            dataport_OE : OUT std_ulogic;\r
-            dataport_OEn : OUT std_ulogic;\r
-            wr : OUT std_ulogic;\r
-            rd : OUT std_ulogic;\r
-            udb_stall : IN std_ulogic;\r
-            udb_ready : IN std_ulogic;\r
-            busclk : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT i2ccell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            scl_in : IN std_ulogic;\r
-            sda_in : IN std_ulogic;\r
-            scl_out : OUT std_ulogic;\r
-            sda_out : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT interrupt\r
-        PORT (\r
-            interrupt : IN std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT iocell\r
-        PORT (\r
-            pin_input : IN std_ulogic;\r
-            oe : IN std_ulogic;\r
-            fb : OUT std_ulogic;\r
-            pad_in : IN std_ulogic;\r
-            pa_out : OUT std_ulogic;\r
-            pad_out : OUT std_ulogic;\r
-            oe_reg : OUT std_ulogic;\r
-            oe_internal : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lcdctrlcell\r
-        PORT (\r
-            drive_en : IN std_ulogic;\r
-            frame : IN std_ulogic;\r
-            data_clk : IN std_ulogic;\r
-            en_hi : IN std_ulogic;\r
-            dac_dis : IN std_ulogic;\r
-            chop_clk : IN std_ulogic;\r
-            int_clr : IN std_ulogic;\r
-            lp_ack_udb : IN std_ulogic;\r
-            mode_1 : IN std_ulogic;\r
-            mode_2 : IN std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT logicalport\r
-        PORT (\r
-            interrupt : OUT std_ulogic;\r
-            precharge : IN std_ulogic;\r
-            in_clock : IN std_ulogic;\r
-            in_clock_en : IN std_ulogic;\r
-            in_reset : IN std_ulogic;\r
-            out_clock : IN std_ulogic;\r
-            out_clock_en : IN std_ulogic;\r
-            out_reset : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT lpfcell\r
-    END COMPONENT;\r
-    COMPONENT lvdcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockblockcell\r
-        PORT (\r
-            imo : OUT std_ulogic;\r
-            ext : OUT std_ulogic;\r
-            eco : OUT std_ulogic;\r
-            ilo : OUT std_ulogic;\r
-            wco : OUT std_ulogic;\r
-            dbl : OUT std_ulogic;\r
-            pll : OUT std_ulogic;\r
-            dpll : OUT std_ulogic;\r
-            dsi_out_0 : OUT std_ulogic;\r
-            dsi_out_1 : OUT std_ulogic;\r
-            dsi_out_2 : OUT std_ulogic;\r
-            dsi_out_3 : OUT std_ulogic;\r
-            lfclk : OUT std_ulogic;\r
-            hfclk : OUT std_ulogic;\r
-            sysclk : OUT std_ulogic;\r
-            halfsysclk : OUT std_ulogic;\r
-            udb_div_0 : OUT std_ulogic;\r
-            udb_div_1 : OUT std_ulogic;\r
-            udb_div_2 : OUT std_ulogic;\r
-            udb_div_3 : OUT std_ulogic;\r
-            udb_div_4 : OUT std_ulogic;\r
-            udb_div_5 : OUT std_ulogic;\r
-            udb_div_6 : OUT std_ulogic;\r
-            udb_div_7 : OUT std_ulogic;\r
-            udb_div_8 : OUT std_ulogic;\r
-            udb_div_9 : OUT std_ulogic;\r
-            udb_div_10 : OUT std_ulogic;\r
-            udb_div_11 : OUT std_ulogic;\r
-            udb_div_12 : OUT std_ulogic;\r
-            udb_div_13 : OUT std_ulogic;\r
-            udb_div_14 : OUT std_ulogic;\r
-            udb_div_15 : OUT std_ulogic;\r
-            uab_div_0 : OUT std_ulogic;\r
-            uab_div_1 : OUT std_ulogic;\r
-            uab_div_2 : OUT std_ulogic;\r
-            uab_div_3 : OUT std_ulogic;\r
-            ff_div_0 : OUT std_ulogic;\r
-            ff_div_1 : OUT std_ulogic;\r
-            ff_div_2 : OUT std_ulogic;\r
-            ff_div_3 : OUT std_ulogic;\r
-            ff_div_4 : OUT std_ulogic;\r
-            ff_div_5 : OUT std_ulogic;\r
-            ff_div_6 : OUT std_ulogic;\r
-            ff_div_7 : OUT std_ulogic;\r
-            ff_div_8 : OUT std_ulogic;\r
-            ff_div_9 : OUT std_ulogic;\r
-            ff_div_10 : OUT std_ulogic;\r
-            ff_div_11 : OUT std_ulogic;\r
-            ff_div_12 : OUT std_ulogic;\r
-            ff_div_13 : OUT std_ulogic;\r
-            ff_div_14 : OUT std_ulogic;\r
-            ff_div_15 : OUT std_ulogic;\r
-            dsi_in_0 : IN std_ulogic;\r
-            dsi_in_1 : IN std_ulogic;\r
-            dsi_in_2 : IN std_ulogic;\r
-            dsi_in_3 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8clockgenblockcell\r
-        PORT (\r
-            gen_clk_in_0 : IN std_ulogic;\r
-            gen_clk_in_1 : IN std_ulogic;\r
-            gen_clk_in_2 : IN std_ulogic;\r
-            gen_clk_in_3 : IN std_ulogic;\r
-            gen_clk_in_4 : IN std_ulogic;\r
-            gen_clk_in_5 : IN std_ulogic;\r
-            gen_clk_in_6 : IN std_ulogic;\r
-            gen_clk_in_7 : IN std_ulogic;\r
-            gen_clk_out_0 : OUT std_ulogic;\r
-            gen_clk_out_1 : OUT std_ulogic;\r
-            gen_clk_out_2 : OUT std_ulogic;\r
-            gen_clk_out_3 : OUT std_ulogic;\r
-            gen_clk_out_4 : OUT std_ulogic;\r
-            gen_clk_out_5 : OUT std_ulogic;\r
-            gen_clk_out_6 : OUT std_ulogic;\r
-            gen_clk_out_7 : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8lcdcell\r
-        PORT (\r
-            common_0 : OUT std_ulogic;\r
-            common_1 : OUT std_ulogic;\r
-            common_2 : OUT std_ulogic;\r
-            common_3 : OUT std_ulogic;\r
-            common_4 : OUT std_ulogic;\r
-            common_5 : OUT std_ulogic;\r
-            common_6 : OUT std_ulogic;\r
-            common_7 : OUT std_ulogic;\r
-            common_8 : OUT std_ulogic;\r
-            common_9 : OUT std_ulogic;\r
-            common_10 : OUT std_ulogic;\r
-            common_11 : OUT std_ulogic;\r
-            common_12 : OUT std_ulogic;\r
-            common_13 : OUT std_ulogic;\r
-            common_14 : OUT std_ulogic;\r
-            common_15 : OUT std_ulogic;\r
-            segment_0 : OUT std_ulogic;\r
-            segment_1 : OUT std_ulogic;\r
-            segment_2 : OUT std_ulogic;\r
-            segment_3 : OUT std_ulogic;\r
-            segment_4 : OUT std_ulogic;\r
-            segment_5 : OUT std_ulogic;\r
-            segment_6 : OUT std_ulogic;\r
-            segment_7 : OUT std_ulogic;\r
-            segment_8 : OUT std_ulogic;\r
-            segment_9 : OUT std_ulogic;\r
-            segment_10 : OUT std_ulogic;\r
-            segment_11 : OUT std_ulogic;\r
-            segment_12 : OUT std_ulogic;\r
-            segment_13 : OUT std_ulogic;\r
-            segment_14 : OUT std_ulogic;\r
-            segment_15 : OUT std_ulogic;\r
-            segment_16 : OUT std_ulogic;\r
-            segment_17 : OUT std_ulogic;\r
-            segment_18 : OUT std_ulogic;\r
-            segment_19 : OUT std_ulogic;\r
-            segment_20 : OUT std_ulogic;\r
-            segment_21 : OUT std_ulogic;\r
-            segment_22 : OUT std_ulogic;\r
-            segment_23 : OUT std_ulogic;\r
-            segment_24 : OUT std_ulogic;\r
-            segment_25 : OUT std_ulogic;\r
-            segment_26 : OUT std_ulogic;\r
-            segment_27 : OUT std_ulogic;\r
-            segment_28 : OUT std_ulogic;\r
-            segment_29 : OUT std_ulogic;\r
-            segment_30 : OUT std_ulogic;\r
-            segment_31 : OUT std_ulogic;\r
-            segment_32 : OUT std_ulogic;\r
-            segment_33 : OUT std_ulogic;\r
-            segment_34 : OUT std_ulogic;\r
-            segment_35 : OUT std_ulogic;\r
-            segment_36 : OUT std_ulogic;\r
-            segment_37 : OUT std_ulogic;\r
-            segment_38 : OUT std_ulogic;\r
-            segment_39 : OUT std_ulogic;\r
-            segment_40 : OUT std_ulogic;\r
-            segment_41 : OUT std_ulogic;\r
-            segment_42 : OUT std_ulogic;\r
-            segment_43 : OUT std_ulogic;\r
-            segment_44 : OUT std_ulogic;\r
-            segment_45 : OUT std_ulogic;\r
-            segment_46 : OUT std_ulogic;\r
-            segment_47 : OUT std_ulogic;\r
-            segment_48 : OUT std_ulogic;\r
-            segment_49 : OUT std_ulogic;\r
-            segment_50 : OUT std_ulogic;\r
-            segment_51 : OUT std_ulogic;\r
-            segment_52 : OUT std_ulogic;\r
-            segment_53 : OUT std_ulogic;\r
-            segment_54 : OUT std_ulogic;\r
-            segment_55 : OUT std_ulogic;\r
-            segment_56 : OUT std_ulogic;\r
-            segment_57 : OUT std_ulogic;\r
-            segment_58 : OUT std_ulogic;\r
-            segment_59 : OUT std_ulogic;\r
-            segment_60 : OUT std_ulogic;\r
-            segment_61 : OUT std_ulogic;\r
-            segment_62 : OUT std_ulogic;\r
-            segment_63 : OUT std_ulogic;\r
-            clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8pmcell\r
-        PORT (\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8scbcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            rx : IN std_ulogic;\r
-            tx : OUT std_ulogic;\r
-            mosi_m : OUT std_ulogic;\r
-            miso_m : IN std_ulogic;\r
-            select_m_0 : OUT std_ulogic;\r
-            select_m_1 : OUT std_ulogic;\r
-            select_m_2 : OUT std_ulogic;\r
-            select_m_3 : OUT std_ulogic;\r
-            sclk_m : OUT std_ulogic;\r
-            mosi_s : IN std_ulogic;\r
-            miso_s : OUT std_ulogic;\r
-            select_s : IN std_ulogic;\r
-            sclk_s : IN std_ulogic;\r
-            scl : INOUT std_ulogic;\r
-            sda : INOUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8spcifcell\r
-        PORT (\r
-            spcif_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tcpwmcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            count : IN std_ulogic;\r
-            reload : IN std_ulogic;\r
-            stop : IN std_ulogic;\r
-            start : IN std_ulogic;\r
-            tr_underflow : OUT std_ulogic;\r
-            tr_overflow : OUT std_ulogic;\r
-            tr_compare_match : OUT std_ulogic;\r
-            line_out : OUT std_ulogic;\r
-            line_out_compl : OUT std_ulogic;\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8tsscell\r
-        PORT (\r
-            clk_seq : IN std_ulogic;\r
-            clk_adc : IN std_ulogic;\r
-            ext_reject : IN std_ulogic;\r
-            ext_sync : IN std_ulogic;\r
-            tx_sync : IN std_ulogic;\r
-            reject_in : IN std_ulogic;\r
-            start_in : IN std_ulogic;\r
-            lx_det_hi : OUT std_ulogic;\r
-            lx_det_lo : OUT std_ulogic;\r
-            rej_window : OUT std_ulogic;\r
-            tx_hilo : OUT std_ulogic;\r
-            phase_end : OUT std_ulogic;\r
-            phase_num_0 : OUT std_ulogic;\r
-            phase_num_1 : OUT std_ulogic;\r
-            phase_num_2 : OUT std_ulogic;\r
-            phase_num_3 : OUT std_ulogic;\r
-            ipq_reject : OUT std_ulogic;\r
-            ipq_start : OUT std_ulogic;\r
-            epq_reject : OUT std_ulogic;\r
-            epq_start : OUT std_ulogic;\r
-            mcs_reject : OUT std_ulogic;\r
-            mcs_start : OUT std_ulogic;\r
-            do_switch : OUT std_ulogic;\r
-            adc_start : OUT std_ulogic;\r
-            adc_done : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT m0s8wdtcell\r
-        PORT (\r
-            wdt_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT macrocell\r
-        PORT (\r
-            main_0 : IN std_ulogic;\r
-            main_1 : IN std_ulogic;\r
-            main_2 : IN std_ulogic;\r
-            main_3 : IN std_ulogic;\r
-            main_4 : IN std_ulogic;\r
-            main_5 : IN std_ulogic;\r
-            main_6 : IN std_ulogic;\r
-            main_7 : IN std_ulogic;\r
-            main_8 : IN std_ulogic;\r
-            main_9 : IN std_ulogic;\r
-            main_10 : IN std_ulogic;\r
-            main_11 : IN std_ulogic;\r
-            ar_0 : IN std_ulogic;\r
-            ap_0 : IN std_ulogic;\r
-            clock_0 : IN std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            cin : IN std_ulogic;\r
-            cpt0_0 : IN std_ulogic;\r
-            cpt0_1 : IN std_ulogic;\r
-            cpt0_2 : IN std_ulogic;\r
-            cpt0_3 : IN std_ulogic;\r
-            cpt0_4 : IN std_ulogic;\r
-            cpt0_5 : IN std_ulogic;\r
-            cpt0_6 : IN std_ulogic;\r
-            cpt0_7 : IN std_ulogic;\r
-            cpt0_8 : IN std_ulogic;\r
-            cpt0_9 : IN std_ulogic;\r
-            cpt0_10 : IN std_ulogic;\r
-            cpt0_11 : IN std_ulogic;\r
-            cpt1_0 : IN std_ulogic;\r
-            cpt1_1 : IN std_ulogic;\r
-            cpt1_2 : IN std_ulogic;\r
-            cpt1_3 : IN std_ulogic;\r
-            cpt1_4 : IN std_ulogic;\r
-            cpt1_5 : IN std_ulogic;\r
-            cpt1_6 : IN std_ulogic;\r
-            cpt1_7 : IN std_ulogic;\r
-            cpt1_8 : IN std_ulogic;\r
-            cpt1_9 : IN std_ulogic;\r
-            cpt1_10 : IN std_ulogic;\r
-            cpt1_11 : IN std_ulogic;\r
-            cout : OUT std_ulogic;\r
-            q : OUT std_ulogic;\r
-            q_fixed : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4abufcell\r
-        PORT (\r
-            ctb_dsi_comp : OUT std_ulogic;\r
-            dsi_out : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4anapumpcell\r
-        PORT (\r
-            pump_clock : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csdcell\r
-        PORT (\r
-            sense_out : OUT std_ulogic;\r
-            sample_out : OUT std_ulogic;\r
-            sense_in : IN std_ulogic;\r
-            sample_in : IN std_ulogic;\r
-            clk1 : IN std_ulogic;\r
-            clk2 : IN std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac7cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4csidac8cell\r
-        PORT (\r
-            en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4ctbmblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4halfuabcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            comp : OUT std_ulogic;\r
-            ctrl : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompblockcell\r
-        PORT (\r
-            interrupt : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4lpcompcell\r
-        PORT (\r
-            cmpout : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4rsbcell\r
-    END COMPONENT;\r
-    COMPONENT p4sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            sample_done : OUT std_ulogic;\r
-            chan_id_valid : OUT std_ulogic;\r
-            chan_id_0 : OUT std_ulogic;\r
-            chan_id_1 : OUT std_ulogic;\r
-            chan_id_2 : OUT std_ulogic;\r
-            chan_id_3 : OUT std_ulogic;\r
-            data_valid : OUT std_ulogic;\r
-            data_0 : OUT std_ulogic;\r
-            data_1 : OUT std_ulogic;\r
-            data_2 : OUT std_ulogic;\r
-            data_3 : OUT std_ulogic;\r
-            data_4 : OUT std_ulogic;\r
-            data_5 : OUT std_ulogic;\r
-            data_6 : OUT std_ulogic;\r
-            data_7 : OUT std_ulogic;\r
-            data_8 : OUT std_ulogic;\r
-            data_9 : OUT std_ulogic;\r
-            data_10 : OUT std_ulogic;\r
-            data_11 : OUT std_ulogic;\r
-            eos_intr : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            sw_negvref : IN std_ulogic;\r
-            cfg_st_sel_0 : IN std_ulogic;\r
-            cfg_st_sel_1 : IN std_ulogic;\r
-            cfg_average : IN std_ulogic;\r
-            cfg_resolution : IN std_ulogic;\r
-            cfg_differential : IN std_ulogic;\r
-            trigger : IN std_ulogic;\r
-            data_hilo_sel : IN std_ulogic;\r
-            swctrl0 : IN std_ulogic;\r
-            swctrl1 : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT p4sarmuxcell\r
-    END COMPONENT;\r
-    COMPONENT p4tempcell\r
-    END COMPONENT;\r
-    COMPONENT p4vrefcell\r
-    END COMPONENT;\r
-    COMPONENT pmcell\r
-        PORT (\r
-            ctw_int : OUT std_ulogic;\r
-            ftw_int : OUT std_ulogic;\r
-            limact_int : OUT std_ulogic;\r
-            onepps_int : OUT std_ulogic;\r
-            pm_int : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sarcell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            pump_clock : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            sof_udb : IN std_ulogic;\r
-            vp_ctl_udb_0 : IN std_ulogic;\r
-            vp_ctl_udb_1 : IN std_ulogic;\r
-            vp_ctl_udb_2 : IN std_ulogic;\r
-            vp_ctl_udb_3 : IN std_ulogic;\r
-            vn_ctl_udb_0 : IN std_ulogic;\r
-            vn_ctl_udb_1 : IN std_ulogic;\r
-            vn_ctl_udb_2 : IN std_ulogic;\r
-            vn_ctl_udb_3 : IN std_ulogic;\r
-            data_out_udb_0 : OUT std_ulogic;\r
-            data_out_udb_1 : OUT std_ulogic;\r
-            data_out_udb_2 : OUT std_ulogic;\r
-            data_out_udb_3 : OUT std_ulogic;\r
-            data_out_udb_4 : OUT std_ulogic;\r
-            data_out_udb_5 : OUT std_ulogic;\r
-            data_out_udb_6 : OUT std_ulogic;\r
-            data_out_udb_7 : OUT std_ulogic;\r
-            data_out_udb_8 : OUT std_ulogic;\r
-            data_out_udb_9 : OUT std_ulogic;\r
-            data_out_udb_10 : OUT std_ulogic;\r
-            data_out_udb_11 : OUT std_ulogic;\r
-            eof_udb : OUT std_ulogic;\r
-            irq : OUT std_ulogic;\r
-            next : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT sccell\r
-        PORT (\r
-            aclk : IN std_ulogic;\r
-            bst_clk : IN std_ulogic;\r
-            clk_udb : IN std_ulogic;\r
-            modout : OUT std_ulogic;\r
-            dyn_cntl_udb : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT spccell\r
-        PORT (\r
-            data_ready : OUT std_ulogic;\r
-            eeprom_fault_int : OUT std_ulogic;\r
-            idle : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT ssccell\r
-        PORT (\r
-            rst_n : IN std_ulogic;\r
-            scli : IN std_ulogic;\r
-            sdai : IN std_ulogic;\r
-            csel : IN std_ulogic;\r
-            sclo : OUT std_ulogic;\r
-            sdao : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT statuscell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            status_7 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT statusicell\r
-        PORT (\r
-            status_0 : IN std_ulogic;\r
-            status_1 : IN std_ulogic;\r
-            status_2 : IN std_ulogic;\r
-            status_3 : IN std_ulogic;\r
-            status_4 : IN std_ulogic;\r
-            status_5 : IN std_ulogic;\r
-            status_6 : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            interrupt : OUT std_ulogic;\r
-            clk_en : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT synccell\r
-        PORT (\r
-            in : IN std_ulogic;\r
-            clock : IN std_ulogic;\r
-            out : OUT std_ulogic;\r
-            clk_en : IN std_ulogic;\r
-            clock_n : IN std_ulogic;\r
-            extclk : IN std_ulogic;\r
-            extclk_n : IN std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT tfaultcell\r
-        PORT (\r
-            tfault_dsi : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT timercell\r
-        PORT (\r
-            clock : IN std_ulogic;\r
-            kill : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            capture : IN std_ulogic;\r
-            timer_reset : IN std_ulogic;\r
-            tc : OUT std_ulogic;\r
-            cmp : OUT std_ulogic;\r
-            irq : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT udbclockencell\r
-        PORT (\r
-            clock_in : IN std_ulogic;\r
-            enable : IN std_ulogic;\r
-            clock_out : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT usbcell\r
-        PORT (\r
-            sof_int : OUT std_ulogic;\r
-            arb_int : OUT std_ulogic;\r
-            usb_int : OUT std_ulogic;\r
-            ord_int : OUT std_ulogic;\r
-            ept_int_0 : OUT std_ulogic;\r
-            ept_int_1 : OUT std_ulogic;\r
-            ept_int_2 : OUT std_ulogic;\r
-            ept_int_3 : OUT std_ulogic;\r
-            ept_int_4 : OUT std_ulogic;\r
-            ept_int_5 : OUT std_ulogic;\r
-            ept_int_6 : OUT std_ulogic;\r
-            ept_int_7 : OUT std_ulogic;\r
-            ept_int_8 : OUT std_ulogic;\r
-            dma_req_0 : OUT std_ulogic;\r
-            dma_req_1 : OUT std_ulogic;\r
-            dma_req_2 : OUT std_ulogic;\r
-            dma_req_3 : OUT std_ulogic;\r
-            dma_req_4 : OUT std_ulogic;\r
-            dma_req_5 : OUT std_ulogic;\r
-            dma_req_6 : OUT std_ulogic;\r
-            dma_req_7 : OUT std_ulogic;\r
-            dma_termin : OUT std_ulogic);\r
-    END COMPONENT;\r
-    COMPONENT vidaccell\r
-        PORT (\r
-            data_0 : IN std_ulogic;\r
-            data_1 : IN std_ulogic;\r
-            data_2 : IN std_ulogic;\r
-            data_3 : IN std_ulogic;\r
-            data_4 : IN std_ulogic;\r
-            data_5 : IN std_ulogic;\r
-            data_6 : IN std_ulogic;\r
-            data_7 : IN std_ulogic;\r
-            strobe : IN std_ulogic;\r
-            strobe_udb : IN std_ulogic;\r
-            reset : IN std_ulogic;\r
-            idir : IN std_ulogic;\r
-            ioff : IN std_ulogic);\r
-    END COMPONENT;\r
-BEGIN\r
-\r
-    ClockBlock:clockblockcell\r
-        PORT MAP(\r
-            clk_bus_glb => ClockBlock_BUS_CLK,\r
-            clk_bus => ClockBlock_BUS_CLK_local,\r
-            clk_sync => ClockBlock_MASTER_CLK,\r
-            clk_32k_xtal => ClockBlock_XTAL_32KHZ,\r
-            xtal => ClockBlock_XTAL,\r
-            ilo => ClockBlock_ILO,\r
-            clk_100k => ClockBlock_100k,\r
-            clk_1k => ClockBlock_1k,\r
-            clk_32k => ClockBlock_32k,\r
-            pllout => ClockBlock_PLL_OUT,\r
-            imo => ClockBlock_IMO,\r
-            dsi_clkin_div => open,\r
-            dsi_glb_div => open);\r
-\r
-    SCSI_Out:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110110110",\r
-            ibuf_enabled => "1111111111",\r
-            id => "11f071e8-9c92-47e0-872a-3f48765a75b8",\r
-            init_dr_st => "0000000000",\r
-            input_clk_en => 0,\r
-            input_sync => "1111111111",\r
-            input_sync_mode => "0000000000",\r
-            intr_mode => "00000000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "5, 5, 5, 5, 5, 5, 5, 5, 5, 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0000000000",\r
-            oe_reset => 0,\r
-            oe_sync => "0000000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0000000000",\r
-            output_conn => "0000000000",\r
-            output_mode => "0000000000",\r
-            output_reset => 0,\r
-            output_sync => "0000000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DBP_raw,ATN,BSY,ACK,RST,MSG,SEL,CD,REQ,IO_raw",\r
-            pin_mode => "OOOOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0000000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00000000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0000000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "1111111111",\r
-            vtrip => "10101010101010101010",\r
-            width => 10,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(8):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 8,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(8)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(8)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out(9):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out",\r
-            logicalport_pin_id => 9,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out(9)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out(9)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "110110110110110110110110",\r
-            ibuf_enabled => "11111111",\r
-            id => "52f31aa9-2f0a-497d-9a1f-1424095e13e6",\r
-            init_dr_st => "00000000",\r
-            input_clk_en => 0,\r
-            input_sync => "11111111",\r
-            input_sync_mode => "00000000",\r
-            intr_mode => "0000000000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => ", , , , , , , 5",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "00000000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000000",\r
-            output_conn => "00000000",\r
-            output_mode => "00000000",\r
-            output_reset => 0,\r
-            output_sync => "00000000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "DB0,DB1,DB2,DB3,DB4,DB5,DB6,DB7",\r
-            pin_mode => "OOOOOOOO",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000000",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "11111111",\r
-            vtrip => "1010101010101010",\r
-            width => 8,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    SCSI_Out_DBx(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(0)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(0)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(1)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(1)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(2)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(2)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(3)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(3)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(4)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(4)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(5):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 5,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(5)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(5)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(6):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 6,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(6)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(6)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SCSI_Out_DBx(7):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SCSI_Out_DBx",\r
-            logicalport_pin_id => 7,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SCSI_Out_DBx(7)__PA,\r
-            oe => open,\r
-            pad_in => SCSI_Out_DBx(7)_PAD,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "010010010010010",\r
-            ibuf_enabled => "11111",\r
-            id => "4c15b41e-e284-4978-99e7-5aaee19bd0ce",\r
-            init_dr_st => "11111",\r
-            input_clk_en => 0,\r
-            input_sync => "11111",\r
-            input_sync_mode => "00000",\r
-            intr_mode => "0000000000",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "3.3, , , , ",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "00000",\r
-            oe_reset => 0,\r
-            oe_sync => "00000",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "00000",\r
-            output_conn => "00000",\r
-            output_mode => "00000",\r
-            output_reset => 0,\r
-            output_sync => "00000",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => ",,,,",\r
-            pin_mode => "IIIII",\r
-            por_state => 2,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "00000",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "0000000000",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "00000",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "00000",\r
-            vtrip => "0000000000",\r
-            width => 5,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            in_clock => open);\r
-\r
-    SD_PULLUP(0):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(0)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(0)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(1):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 1,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(1)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(1)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(2):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 2,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(2)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(2)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(3):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 3,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(3)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(3)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    SD_PULLUP(4):iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "SD_PULLUP",\r
-            logicalport_pin_id => 4,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000000000000000000001")\r
-        PORT MAP(\r
-            pa_out => SD_PULLUP(4)__PA,\r
-            oe => open,\r
-            pad_in => SD_PULLUP(4)_PAD,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 0,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dm\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000010000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dm(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => open,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dm\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/8b77a6c4-10a0-4390-971c-672353e2a49c",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "00",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "NONCONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "A",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 1,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "10",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open);\r
-\r
-    \USBFS:Dp(0)\:iocell\r
-        GENERIC MAP(\r
-            in_sync_mode => 2,\r
-            out_sync_mode => 0,\r
-            oe_sync_mode => 0,\r
-            logicalport => "\USBFS:Dp\",\r
-            logicalport_pin_id => 0,\r
-            io_capabilities => "0000000000000000000000000000000000000000000000001000000000000000")\r
-        PORT MAP(\r
-            pa_out => \\\USBFS:Dp(0)\\__PA\,\r
-            oe => open,\r
-            in_clock => ClockBlock_BUS_CLK,\r
-            in_clock_en => '1',\r
-            in_reset => '0',\r
-            out_clock => open,\r
-            out_clock_en => '1',\r
-            out_reset => '0');\r
-\r
-    \USBFS:Dp\:logicalport\r
-        GENERIC MAP(\r
-            drive_mode => "000",\r
-            ibuf_enabled => "0",\r
-            id => "f9248435-5d3e-4e4d-bbae-bdae8795c3dd/618a72fc-5ddd-4df5-958f-a3d55102db42",\r
-            init_dr_st => "0",\r
-            input_clk_en => 0,\r
-            input_sync => "1",\r
-            input_sync_mode => "0",\r
-            intr_mode => "10",\r
-            invert_in_clock => 0,\r
-            invert_in_clock_en => 0,\r
-            invert_in_reset => 0,\r
-            invert_out_clock => 0,\r
-            invert_out_clock_en => 0,\r
-            invert_out_reset => 0,\r
-            io_voltage => "",\r
-            layout_mode => "CONTIGUOUS",\r
-            oe_conn => "0",\r
-            oe_reset => 0,\r
-            oe_sync => "0",\r
-            output_clk_en => 0,\r
-            output_clock_mode => "0",\r
-            output_conn => "0",\r
-            output_mode => "0",\r
-            output_reset => 0,\r
-            output_sync => "0",\r
-            pa_in_clock => -1,\r
-            pa_in_clock_en => -1,\r
-            pa_in_reset => -1,\r
-            pa_out_clock => -1,\r
-            pa_out_clock_en => -1,\r
-            pa_out_reset => -1,\r
-            pin_aliases => "",\r
-            pin_mode => "I",\r
-            por_state => 4,\r
-            port_alias_group => "",\r
-            port_alias_required => 0,\r
-            sio_group_cnt => 0,\r
-            sio_hifreq => "",\r
-            sio_hyst => "0",\r
-            sio_ibuf => "00000000",\r
-            sio_info => "00",\r
-            sio_obuf => "00000000",\r
-            sio_refsel => "00000000",\r
-            sio_vtrip => "00000000",\r
-            slew_rate => "0",\r
-            spanning => 0,\r
-            sw_only => 0,\r
-            use_annotation => "0",\r
-            vtrip => "00",\r
-            width => 1,\r
-            in_clk_inv => 0,\r
-            in_clken_inv => 0,\r
-            in_clken_mode => 1,\r
-            in_rst_inv => 0,\r
-            out_clk_inv => 0,\r
-            out_clken_inv => 0,\r
-            out_clken_mode => 1,\r
-            out_rst_inv => 0)\r
-        PORT MAP(\r
-            in_clock_en => open,\r
-            in_reset => open,\r
-            out_clock_en => open,\r
-            out_reset => open,\r
-            interrupt => \USBFS:Net_1010\,\r
-            in_clock => open);\r
-\r
-    \USBFS:USB\:usbcell\r
-        GENERIC MAP(\r
-            cy_registers => "")\r
-        PORT MAP(\r
-            sof_int => Net_40,\r
-            arb_int => \USBFS:Net_79\,\r
-            usb_int => \USBFS:Net_81\,\r
-            ept_int_8 => \USBFS:ept_int_8\,\r
-            ept_int_7 => \USBFS:ept_int_7\,\r
-            ept_int_6 => \USBFS:ept_int_6\,\r
-            ept_int_5 => \USBFS:ept_int_5\,\r
-            ept_int_4 => \USBFS:ept_int_4\,\r
-            ept_int_3 => \USBFS:ept_int_3\,\r
-            ept_int_2 => \USBFS:ept_int_2\,\r
-            ept_int_1 => \USBFS:ept_int_1\,\r
-            ept_int_0 => \USBFS:ept_int_0\,\r
-            ord_int => \USBFS:Net_95\,\r
-            dma_req_7 => \USBFS:dma_req_7\,\r
-            dma_req_6 => \USBFS:dma_req_6\,\r
-            dma_req_5 => \USBFS:dma_req_5\,\r
-            dma_req_4 => \USBFS:dma_req_4\,\r
-            dma_req_3 => \USBFS:dma_req_3\,\r
-            dma_req_2 => \USBFS:dma_req_2\,\r
-            dma_req_1 => \USBFS:dma_req_1\,\r
-            dma_req_0 => \USBFS:dma_req_0\,\r
-            dma_termin => \USBFS:Net_824\);\r
-\r
-    \USBFS:arb_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_79\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:bus_reset\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_81\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:dp_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:Net_1010\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_0\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_0\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_1\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_1\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:ep_2\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => \USBFS:ept_int_2\,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-    \USBFS:sof_int\:interrupt\r
-        GENERIC MAP(\r
-            int_type => "10")\r
-        PORT MAP(\r
-            interrupt => Net_40,\r
-            clock => ClockBlock_BUS_CLK);\r
-\r
-END __DEFAULT__;\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_timing.html b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_timing.html
deleted file mode 100755 (executable)
index 83b2bc2..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_timing.html
+++ /dev/null
@@ -1,642 +0,0 @@
-<?xml version="1.0" encoding="utf-8"?>\r
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">\r
-<html xmlns="http://www.w3.org/1999/xhtml">\r
-<head>\r
-<title>Static Timing Analysis Report</title>\r
-<style type="text/css">\r
-<!--\r
-body { \r
-    font:normal normal 100%/1.0 verdana, times new roman, serif, sans-serif; \r
-}\r
-\r
-table.sta_tsu > thead > tr > th.Delay,\r
-table.sta_tsu > tbody > tr > td.Delay,\r
-table.sta_tscs > thead > tr > th.Period,\r
-table.sta_tscs > tbody > tr > td.Period,\r
-table.sta_tscs > thead > tr > th.MaxFreq,\r
-table.sta_tscs > tbody > tr > td.MaxFreq,\r
-table.sta_tscs > thead > tr > th.Frequency,\r
-table.sta_tscs > tbody > tr > td.Frequency,\r
-table.sta_tco > thead > tr > th.Delay,\r
-table.sta_tco > tbody > tr > td.Delay,\r
-table.sta_tpd > thead > tr > th.Delay,\r
-table.sta_tpd > tbody > tr > td.Delay,\r
-table.sta_toe > thead > tr > th.Delay,\r
-table.sta_toe > tbody > tr > td.Delay,\r
-table.sta_tcoe > thead > tr > th.Delay,\r
-table.sta_tcoe > tbody > tr > td.Delay,\r
-table.sta_path > thead > tr > th.Delay,\r
-table.sta_path > tbody > tr > td.Delay,\r
-table.sta_path > thead > tr > th.Total,\r
-table.sta_path > tbody > tr > td.Total,\r
-table.sta_clocksummary > thead > tr > th.ActualFreq,\r
-table.sta_clocksummary > tbody > tr > td.ActualFreq,\r
-table.sta_clocksummary > thead > tr > th.MaxFreq,\r
-table.sta_clocksummary > tbody > tr > td.MaxFreq,\r
-table > tbody > tr > td.number\r
-{\r
-       text-align: right;\r
-}\r
-\r
-\r
-table.sta_tsu {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-table.sta_tpd {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-table.sta_tscs {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-table.sta_tco {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-table.sta_toe {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-table.sta_tcoe {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-}\r
-\r
-th {\r
-   border: solid 1px;\r
-   vertical-align: top;\r
-   font-family: monospace;\r
-   text-align: center;\r
-   white-space: pre-line;\r
-}\r
-\r
-td {\r
-   border: solid 1px;\r
-   vertical-align: top;\r
-   font-family: monospace;\r
-   white-space: pre-line;\r
-}\r
-\r
-table.sta_tpd > tbody > tr:hover,\r
-table.sta_tsu > tbody > tr:hover,\r
-table.sta_tscs > tbody > tr:hover,\r
-table.sta_tco > tbody > tr:hover,\r
-table.sta_toe > tbody > tr:hover,\r
-table.sta_tcoe > tbody > tr:hover\r
-{\r
-   background-color: #e8e8ff;\r
-}\r
-\r
-table.sta_path > tbody > tr:hover {\r
-   background-color: #e8e8ff;\r
-}\r
-\r
-table.sta_path {\r
-   background-color: #f8f8f8;\r
-   border: none;\r
-   border-collapse: collapse;\r
-   width: 90%;\r
-   margin-left: 1em;\r
-   margin-right: 1em;\r
-}\r
-\r
-table.sta_clocksummary {\r
-   border: solid 2px;\r
-   border-collapse: collapse;\r
-}\r
-\r
-div.sta_sec {\r
-   padding: 0.5em;\r
-}\r
-\r
-div.sta_sec div.sta_sec {\r
-   margin-left: 0.75em;\r
-}\r
-\r
-.proptext {\r
-   font:normal normal 100%/1.0 verdana, times new roman, serif, sans-serif;\r
-   border: 0px;\r
-}\r
-\r
-.prop {\r
-   font: normal normal 100%/1.0 verdana, times new roman, serif, sans-serif;\r
-   font-weight: bolder;\r
-   border: 0px;\r
-}\r
-\r
-.sec_head {\r
-   display: block;\r
-   font-size: 1.17em;\r
-   font-weight: bolder;\r
-   margin: .83em 0;\r
-}\r
-\r
-div.sta_secbody {\r
-   margin-left: 0.75em;\r
-}\r
-\r
-div.vio_sta_secbody {\r
-   margin-left: 0.75em;\r
-}\r
-\r
-.sta_sec_desc {\r
-   margin-bottom: 0.5em;\r
-   white-space: pre-line;\r
-}\r
-\r
-.violation_color {\r
-   color: red;\r
-   border-color: black;\r
-}\r
-\r
--->\r
-</style>   \r
-<script type="text/javascript">\r
-<!--\r
-\r
-function HideElement(element)  {\r
-    var headerDiv = getChildElementsByTagName(element, "div")[0];\r
-    var expandLink = getChildElementsByTagName(headerDiv, "a")[0];\r
-    expandLink.onclick = clicked;\r
-    var children = element.childNodes;\r
-    var secBody = null;\r
-    for (var j = 0; j < children.length; j++)\r
-    {\r
-        if (children[j].nodeType == document.ELEMENT_NODE &&\r
-            (children[j].className == "sta_secbody" ||\r
-             children[j].className == "vio_sta_secbody" ||\r
-             children[j].className == "sta_sec" )) \r
-        {\r
-            secBody = children[j];\r
-            secBody.style.display = "none";\r
-        }\r
-    }\r
-}\r
-\r
-function HideElements(elements)  {\r
-    for( var i=0; i<elements.length; i++)\r
-        HideElement(elements[i]);\r
-}\r
-\r
-\r
-// Description : returns boolean indicating whether the object has the class name\r
-//    built with the understanding that there may be multiple classes\r
-//\r
-// Arguments:\r
-//    objElement              - element to check for.\r
-//    strClass                - class name to be checked.\r
-//\r
-function HasClassName(objElement, strClass)\r
-{\r
-    if ( objElement.className )\r
-    {\r
-        // the classes are just a space separated list, so first get the list\r
-        var arrList = objElement.className.split(' ');\r
-\r
-        for ( var i = 0; i < arrList.length; i++ )\r
-        {\r
-            if ( arrList[i] == strClass )\r
-            {\r
-                return true;\r
-            }\r
-        }\r
-    }\r
-    return false;\r
-}\r
-\r
-function initialize() {\r
-    if (document.ELEMENT_NODE == null)\r
-    {\r
-        /* Workaround for old IE */\r
-        document.ELEMENT_NODE = 1;\r
-        document.ATTRIBUTE_NODE = 2;\r
-        document.TEXT_NODE = 3;\r
-        document.CDATA_SECTION_MODE = 4;\r
-        document.ENTITY_REFERENCE_MODE = 5;\r
-        document.ENTITY_NODE = 6;\r
-        document.PROCESSING_INSTRUCTION_NODE = 7;\r
-        document.COMMENT_NODE = 8;\r
-        document.DOCUMENT_NODE = 9;\r
-        document.DOCUMENT_TYPE_NODE = 10;\r
-        document.DOCUMENT_FRAGMENT_NODE = 11;\r
-        document.NOTATION_NODE = 12;\r
-    }\r
-    \r
-    HideElements(getElementsByClass(document, 'div', 'sta_sec'));\r
-    toggleExpandSection(document.getElementById('clock_summary'));\r
-    toggleExpandSection(document.getElementById('violations'));\r
-\r
-    var allTD = document.getElementsByTagName("td");\r
-    for( var i=0; i< allTD.length; i++)\r
-    {\r
-        if(allTD[i].className != "proptext" && allTD[i].innerHTML.match(/^\s*[-]?[0-9]+[\.]?[0-9]*$/))\r
-        {\r
-            allTD[i].align = "right";\r
-            //allTD[i].style.textAlign = "right";\r
-        }\r
-    }\r
-\r
-    var allTables = document.getElementsByTagName("table");\r
-    for (var i = 0; i < allTables.length; i++)\r
-    {\r
-        var table = allTables[i];\r
-        if (table.className == "sta_tsu" ||\r
-            table.className == "sta_tscs" ||\r
-            table.className == "sta_tco" ||\r
-            table.className == "sta_toe" ||\r
-            table.className == "sta_tcoe")\r
-        {\r
-            var tbodyList = getChildElementsByTagName(table, "tbody");\r
-            if (tbodyList.length != 0)\r
-            {\r
-                for (var row = tbodyList[0].firstChild; row != null; row = row.nextSibling)\r
-                {\r
-                    if (row.nodeName.toLowerCase() == "tr")\r
-                    {\r
-                        if (HasClassName(row,"sta_path"))\r
-                        {\r
-                            row.style.display = "none";\r
-                        }\r
-                        else\r
-                        {\r
-                            row.style.cursor = "pointer";\r
-                            row.onclick = rowClicked;\r
-                        }\r
-                    }\r
-                }\r
-            }\r
-        }\r
-        else if(table.className == "sta_tpd" )\r
-        {\r
-            var tbodyList = getChildElementsByTagName(table, "tbody");\r
-            if (tbodyList.length != 0)\r
-            {\r
-                for (var row = tbodyList[0].firstChild; row != null; row = row.nextSibling)\r
-                {\r
-                    if (row.nodeName.toLowerCase() == "tr")\r
-                    {\r
-                        if(HasClassName(row, "sta_tv"))\r
-                        {\r
-                            row.style.cursor = "pointer";\r
-                            row.onclick = violationClicked;\r
-                        }\r
-                    }\r
-                }\r
-            }\r
-        }\r
-    }\r
-}\r
-\r
-function clicked()\r
-{\r
-    var parent = findAncestorByClass(this, "sta_sec");\r
-    toggleExpandSection(parent);\r
-    return false;\r
-}\r
-\r
-function toggleExpandSection(section)\r
-{\r
-    if (section == null)\r
-        return false;\r
-\r
-    var children = section.childNodes;\r
-    for (var i = 0; i < children.length; i++)\r
-    {\r
-        if (children[i].nodeType == document.ELEMENT_NODE &&\r
-            (children[i].className == "sta_secbody" ||\r
-             children[i].className == "vio_sta_secbody"))\r
-            toggleVisible(children[i]);\r
-    }\r
-}\r
-\r
-function findAncestorByClass(node, className)\r
-{\r
-    var parent;\r
-    for (parent = node; parent != null; parent = parent.parentNode)\r
-    {\r
-        if (parent.nodeType == document.ELEMENT_NODE &&\r
-            parent.className == className)\r
-        {\r
-            return parent;\r
-        }\r
-    }\r
-\r
-    return null;\r
-}\r
-\r
-function rowClicked()\r
-{\r
-    for (var next = this.nextSibling; next != null; next = next.nextSibling)\r
-    {\r
-        if (next.nodeType == document.ELEMENT_NODE &&\r
-            next.nodeName.toLowerCase() == "tr" &&\r
-            HasClassName(next,"sta_path"))\r
-        {\r
-            if (next.style.display == "none")\r
-                next.style.display = "table-row";\r
-            else\r
-                next.style.display = "none";\r
-            break;\r
-        }\r
-    }\r
-    return false;\r
-}\r
-function findPos(obj)\r
-{\r
-    var curtop = 0;\r
-    if (obj.offsetParent)\r
-    {\r
-        do\r
-        {\r
-            curtop += obj.offsetTop;\r
-        } while (obj = obj.offsetParent);\r
-        return [curtop];\r
-    }\r
-}\r
-\r
-function jumpto(ClassName)\r
-{\r
-    var classname = 'sta_path';\r
-    classname += ' ';\r
-    classname += ClassName;\r
-    if((obj = getElementsByClass(document, 'tr', classname)) &&\r
-            obj.length > 0 ){\r
-        window.scrollTo(0, findPos(obj[0]));\r
-    }\r
-}\r
-\r
-function violationClicked()\r
-{\r
-    expandAllSections(0);\r
-    expandViolations(1);\r
-    var ident=this.id;\r
-    var rlist= document.getElementsByTagName( "tr");\r
-\r
-    var clickedElementClassNames = this.className.split(' ');\r
-\r
-    //The second class name is to match the violation element with the\r
-    //corresponding path element in the detailed section.\r
-    var identificationClassValue = clickedElementClassNames[1];\r
-\r
-    for(var i=0 ; i < rlist.length ; i++)\r
-    {\r
-        if( rlist[i].nodeType == document.ELEMENT_NODE && HasClassName(rlist[i],"sta_path") )\r
-        {\r
-            var staPathClassNames = rlist[i].className.split(' ');\r
-            // Assumption: There will be two class names, one indicating\r
-            // style (sta_path), other to identify elements tv1.\r
-\r
-            if(staPathClassNames.length > 1)\r
-            {\r
-                // Matching second class Names of both elements.\r
-                if(staPathClassNames[1] == identificationClassValue)\r
-                {\r
-\r
-                    var parent= findAncestorByClass ( rlist[i] , "sta_tscs" );\r
-                    if(parent == null)\r
-                        parent= findAncestorByClass ( rlist[i] , "sta_tco" );\r
-                    for( ; (parent!= null && parent.nodeName!="body") ; parent= parent.parentNode )\r
-                    {\r
-                        if( parent.nodeType == document.ELEMENT_NODE && parent.className == "sta_secbody")\r
-                        {\r
-                            //parent.style.display = "block";\r
-                            visible(parent);\r
-                            rlist[i].style.display = "table-row" ;\r
-                            //alert(rlist[i].id);\r
-                        }\r
-                    }\r
-                }\r
-            }\r
-        }\r
-    }\r
-    //document.getElementById(this.id).scrollIntoView(true);\r
-    // location = location + this.id;\r
-    jumpto(identificationClassValue);\r
-    return false;\r
-}\r
-\r
-\r
-function toggleVisible(elem)\r
-{\r
-    if (elem.style.display == "none")\r
-        elem.style.display = "block";\r
-    else\r
-        elem.style.display = "none";\r
-\r
-    headerDiv = getChildElementsByTagName(elem.parentNode, "div")[0];\r
-    link = getChildElementsByTagName(headerDiv, "a")[0];\r
-    innerSpan = getChildElementsByTagName(link, "span")[0];\r
-    textNode = getChildElementsByTagName(innerSpan, "span")[0].firstChild;\r
-    textNode.data = (elem.style.display == "none") ? "+" : "-";\r
-}\r
-\r
-function visible(elem)\r
-{\r
-    elem.style.display = "block";\r
-\r
-    headerDiv = getChildElementsByTagName(elem.parentNode, "div")[0];\r
-    link = getChildElementsByTagName(headerDiv, "a")[0];\r
-    innerSpan = getChildElementsByTagName(link, "span")[0];\r
-    textNode = getChildElementsByTagName(innerSpan, "span")[0].firstChild;\r
-    textNode.data = (elem.style.display == "none") ? "+" : "-";\r
-}\r
-\r
-function getChildElementsByTagName(node, name)\r
-{\r
-    var result = new Array(), i = 0;\r
-    name = name.toLowerCase();\r
-    for (var child = node.firstChild; child != null; child = child.nextSibling)\r
-    {\r
-        if (child.nodeType == document.ELEMENT_NODE &&\r
-            child.nodeName.toLowerCase() == name)\r
-        {\r
-            result[i++] = child;\r
-        }\r
-    }\r
-\r
-    return result;\r
-}\r
-\r
-function expandAllPaths(rootNode, show)\r
-{\r
-    var show = show ? "table-row" : "none";\r
-    var elements = getElementsByClass(rootNode, "tr", "sta_path");\r
-    for (var i = 0; i < elements.length; i++)\r
-    {\r
-        elements[i].style.display = show;\r
-    }\r
-}\r
-\r
-function expandAllSections(show)\r
-{\r
-    var show = show ? "block" : "none";\r
-    var elements = getElementsByClass(document, "div", "sta_secbody");\r
-    for (var i = 0; i < elements.length; i++)\r
-    {\r
-        if (elements[i].style.display != show)\r
-            toggleVisible(elements[i]);\r
-    }\r
-\r
-    var elements1 = getElementsByClass(document, "div", "vio_sta_secbody");\r
-    for (var i = 0; i < elements1.length; i++)\r
-    {\r
-        if (elements1[i].style.display != show)\r
-            toggleVisible(elements1[i]);\r
-    }\r
-}\r
-\r
-function expandViolations(show)\r
-{\r
-    var show = show ? "block" : "none";\r
-    var elements = getElementsByClass(document, "div", "vio_sta_secbody");\r
-    for (var i = 0; i < elements.length; i++)\r
-    {\r
-        if (elements[i].style.display != show)\r
-            toggleVisible(elements[i]);\r
-    }\r
-}\r
-\r
-function expandViolationSections(show)\r
-{\r
-    var show =show ? "block" :"none" ;\r
-}\r
-\r
-function getElementsByClass(rootNode, elemName, className)\r
-{\r
-    var result = new Array(), idx = 0;\r
-    var elements = rootNode.getElementsByTagName(elemName);\r
-    for (var i = 0; i < elements.length; i++)\r
-    {\r
-        if (elements[i].className == className)\r
-            result[idx++] = elements[i];\r
-    }\r
-    return result;\r
-}\r
-\r
-//-->\r
-</script>\r
-</head>\r
-\r
-<body onload="initialize();">\r
-<noscript>\r
-<p style="display: block; border: 1px solid; margin: 4em; padding: 1.5em">View this file with a JavaScript-enabled browser to enable all features.</p>\r
-</noscript>\r
-<h1> Static Timing Analysis </h1>\r
-<table class="property">\r
-<tr> <td class="prop"> Project :</td>\r
-<td class="proptext"> USB_Bootloader</td></tr>\r
-<tr> <td class="prop"> Build Time :</td>\r
-<td class="proptext"> 03/22/14 22:32:57</td></tr>\r
-<tr> <td class="prop"> Device :</td>\r
-<td class="proptext"> CY8C5267AXI-LP051</td></tr>\r
-<tr> <td class="prop"> Temperature :</td>\r
-<td class="proptext"> -40C - 85/125C</td></tr>\r
-<tr> <td class="prop"> Vdda :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Vddd :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Vio0 :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Vio1 :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Vio2 :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Vio3 :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-<tr> <td class="prop"> Voltage :</td>\r
-<td class="proptext"> 5.0</td></tr>\r
-<tr> <td class="prop"> Vusb :</td>\r
-<td class="proptext"> 5.00</td></tr>\r
-</table>\r
-<div>\r
-<a href="#" onclick="expandAllSections(1);return false;">Expand All</a> |\r
-<a href="#" onclick="expandAllSections(0);return false;">Collapse All</a> |\r
-<a href="#" onclick="expandAllPaths(document, 1);return false;">Show All Paths</a> |\r
-<a href="#" onclick="expandAllPaths(document, 0);return false;">Hide All Paths</a>\r
-</div>\r
-<div class="sta_sec" id="violations">\r
-<div>\r
-<a href="#" style="text-decoration: none; color: inherit;">\r
-<span class="sec_head"><span style="font-family: monospace;">+</span>\r
-Timing Violation Section</span>\r
-</a>\r
-</div><div class="vio_sta_secbody"><div class="sta_sec_desc">No Timing Violations</div>\r
-</div>\r
-</div>\r
-<div class="sta_sec" id="clock_summary">\r
-<div>\r
-<a href="#" style="text-decoration: none; color: inherit;">\r
-<span class="sec_head"><span style="font-family: monospace;">+</span>\r
-Clock Summary Section</span>\r
-</a>\r
-</div><div class="sta_secbody"><table class="sta_clocksummary">\r
- <thead> \r
-<tr> \r
-<th>Clock</th>\r
-<th>Domain</th>\r
-<th>Nominal Frequency</th>\r
-<th>Required Frequency</th>\r
-<th>Maximum Frequency</th>\r
-<th>Violation</th>\r
-</tr>\r
-</thead> \r
-<tbody>\r
-<tr> \r
- <td class = "text_info">CyILO</td>\r
- <td class = "text_info">CyILO</td>\r
- <td class = "number">100.000&nbsp;kHz</td>\r
- <td class = "number">100.000&nbsp;kHz</td>\r
- <td class = "number"> N/A </td>\r
- <td class = "text_info"> </td>\r
-</tr>\r
-<tr> \r
- <td class = "text_info">CyIMO</td>\r
- <td class = "text_info">CyIMO</td>\r
- <td class = "number">24.000&nbsp;MHz</td>\r
- <td class = "number">24.000&nbsp;MHz</td>\r
- <td class = "number"> N/A </td>\r
- <td class = "text_info"> </td>\r
-</tr>\r
-<tr> \r
- <td class = "text_info">CyMASTER_CLK</td>\r
- <td class = "text_info">CyMASTER_CLK</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number"> N/A </td>\r
- <td class = "text_info"> </td>\r
-</tr>\r
-<tr> \r
- <td class = "text_info">CyBUS_CLK</td>\r
- <td class = "text_info">CyMASTER_CLK</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number"> N/A </td>\r
- <td class = "text_info"> </td>\r
-</tr>\r
-<tr> \r
- <td class = "text_info">CyPLL_OUT</td>\r
- <td class = "text_info">CyPLL_OUT</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number">64.000&nbsp;MHz</td>\r
- <td class = "number"> N/A </td>\r
- <td class = "text_info"> </td>\r
-</tr>\r
-</tbody>\r
- </table> \r
-</div>\r
-</div>\r
-</body>\r
-</html>
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_u.sdc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_u.sdc
deleted file mode 100755 (executable)
index 9a6a731..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/USB_Bootloader_u.sdc
+++ /dev/null
@@ -1,3 +0,0 @@
-# Component constraints for W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\TopDesign\TopDesign.cysch\r
-# Project: W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cyprj\r
-# Date: Sat, 22 Mar 2014 12:32:47 GMT\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/bitstream.txt b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/bitstream.txt
deleted file mode 100755 (executable)
index 50436bf..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/bitstream.txt
+++ /dev/null
@@ -1,825 +0,0 @@
-===========Generating Bitstream===========\r
-# IDMUX (count=6)\r
-00000000: 00 00 00 00 00 00\r
-# IOPORT_0 (count=7)\r
-00000006: 00 00 00 00 00 00 00\r
-# IOPINS0_0 (count=8)\r
-0000000d: 00 ff ff 00 00 00 00 00\r
-# IOPINS1_0 + 0x00000009 (count=5)\r
-00000015: 00 00 00 00 00\r
-# IOPORT_1 (count=7)\r
-0000001a: 00 00 00 00 00 00 00\r
-# IOPINS0_1 (count=16)\r
-00000021: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# IOPORT_2 (count=7)\r
-00000031: 00 00 00 00 00 00 00\r
-# IOPINS0_2 (count=16)\r
-00000038: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# IOPORT_3 (count=7)\r
-00000048: 00 00 00 00 3e 00 00\r
-# IOPINS0_3 (count=8)\r
-0000004f: 00 3e 00 00 00 00 00 00\r
-# IOPINS1_3 + 0x00000009 (count=5)\r
-00000057: 00 00 00 00 00\r
-# IOPORT_4 (count=7)\r
-0000005c: 00 00 00 00 00 00 00\r
-# IOPINS0_4 (count=8)\r
-00000063: 00 fc fc 00 00 00 00 00\r
-# IOPINS1_4 + 0x00000009 (count=5)\r
-0000006b: 00 00 00 00 00\r
-# IOPORT_5 (count=7)\r
-00000070: 00 00 00 00 00 00 00\r
-# IOPINS0_5 (count=16)\r
-00000077: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# IOPORT_6 (count=7)\r
-00000087: 00 00 00 00 00 00 00\r
-# IOPINS0_6 (count=8)\r
-0000008e: 00 0f 0f 00 00 00 00 00\r
-# IOPINS1_6 + 0x00000009 (count=5)\r
-00000096: 00 00 00 00 00\r
-# IOPORT_7 (count=6)\r
-0000009b: 00 00 00 00 00 00\r
-# IOPINS0_7 (count=16)\r
-000000a1: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# IOPORT_8 (count=7)\r
-000000b1: 00 00 00 00 40 00 00\r
-# IOPINS0_8 (count=10)\r
-000000b8: 00 00 00 00 00 00 00 00 c0 00\r
-# IOPINS1_8 + 0x0000000B (count=5)\r
-000000c2: 00 00 00 00 00\r
-# IDMUX_IRQ (count=8)\r
-000000c7: 0a 00 00 00 00 00 00 00\r
-# CYDEV_SLOWCLK_ILO_CR0 (count=1)\r
-000000cf: 06\r
-# CYDEV_FASTCLK_IMO_CR (count=1)\r
-000000d0: 52\r
-# CYDEV_FASTCLK_PLL_P (count=2)\r
-000000d1: 18 08\r
-# CYDEV_FASTCLK_PLL_CFG0 (count=2)\r
-000000d3: 51 12\r
-# CYDEV_CLKDIST_MSTR0 (count=2)\r
-000000d5: 00 01\r
-# CYDEV_CLKDIST_MSTR0 (count=1)\r
-000000d7: 07\r
-# CYDEV_CLKDIST_BCFG0 (count=1)\r
-000000d8: 00\r
-# CYDEV_CLKDIST_BCFG2 (count=1)\r
-000000d9: 48\r
-# CYDEV_CLKDIST_MSTR0 (count=1)\r
-000000da: 00\r
-# CYDEV_CLKDIST_UCFG (count=1)\r
-000000db: 00\r
-# CYDEV_CLKDIST_LD (count=1)\r
-000000dc: 02\r
-# PICU_8 (count=8)\r
-000000dd: 00 00 00 00 00 00 02 00\r
-# UDB_1_5_0_CONFIG (count=128)\r
-000000e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000000f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000105: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000115: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000125: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000135: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000145: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000155: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_5_1_CONFIG (count=128)\r
-00000165: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000175: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000185: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000195: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000001a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000001b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000001c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000001d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_4_1_CONFIG (count=128)\r
-000001e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000001f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000205: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000215: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000225: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000235: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000245: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000255: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_4_0_CONFIG (count=128)\r
-00000265: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000275: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000285: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000295: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000002a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000002b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000002c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000002d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_3_0_CONFIG (count=128)\r
-000002e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000002f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000305: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000315: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000325: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000335: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000345: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000355: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_3_1_CONFIG (count=128)\r
-00000365: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000375: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000385: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000395: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000003a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000003b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000003c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000003d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_2_1_CONFIG (count=128)\r
-000003e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000003f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000405: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000415: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000425: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000435: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000445: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000455: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_2_0_CONFIG (count=128)\r
-00000465: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000475: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000485: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000495: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000004a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000004b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000004c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000004d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_2_1_CONFIG (count=128)\r
-000004e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000004f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000505: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000515: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000525: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000535: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000545: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000555: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_2_0_CONFIG (count=128)\r
-00000565: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000575: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000585: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000595: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000005a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000005b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000005c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000005d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_3_0_CONFIG (count=128)\r
-000005e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000005f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000605: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000615: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000625: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000635: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000645: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000655: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_3_1_CONFIG (count=128)\r
-00000665: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000675: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000685: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000695: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000006a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000006b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000006c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000006d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_4_1_CONFIG (count=128)\r
-000006e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000006f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000705: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000715: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000725: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000735: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000745: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000755: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_4_0_CONFIG (count=128)\r
-00000765: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000775: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000785: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000795: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000007a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000007b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000007c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000007d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_5_0_CONFIG (count=128)\r
-000007e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000007f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000805: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000815: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000825: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000835: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000845: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000855: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_5_1_CONFIG (count=128)\r
-00000865: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000875: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000885: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000895: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000008a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000008b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000008c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000008d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_0_0_CONFIG (count=128)\r
-000008e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000008f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000905: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000915: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000925: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000935: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000945: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000955: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_0_1_CONFIG (count=128)\r
-00000965: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000975: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000985: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000995: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000009a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000009b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000009c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000009d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_1_1_CONFIG (count=128)\r
-000009e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000009f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_1_0_CONFIG (count=128)\r
-00000a65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000a95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000aa5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ab5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ac5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ad5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_1_1_CONFIG (count=128)\r
-00000ae5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000af5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_1_0_CONFIG (count=128)\r
-00000b65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000b95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ba5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000bb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000bc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000bd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_0_0_CONFIG (count=128)\r
-00000be5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000bf5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_0_0_1_CONFIG (count=128)\r
-00000c65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000c95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ca5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000cb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000cc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000cd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UWRK_B0_WRK_DP_BITS (count=64)\r
-00000ce5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000cf5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UWRK_B0_WRK_STATCTL_BITS + 0x00000070 (count=32)\r
-00000d25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UWRK_B1_WRK_DP_BITS (count=64)\r
-00000d45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UWRK_B1_WRK_STATCTL_BITS + 0x00000070 (count=32)\r
-00000d85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000d95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UCFG_BCTL1 (count=16)\r
-00000da5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UCFG_BCTL0 (count=16)\r
-00000db5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_0 (count=128)\r
-00000dc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000dd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000de5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000df5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_0_HV_ROUTING + 0x00000080 (count=128)\r
-00000e45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000e95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ea5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000eb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_1 (count=128)\r
-00000ec5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ed5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ee5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ef5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_1_HV_ROUTING + 0x00000080 (count=128)\r
-00000f45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f65: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 40\r
-00000f75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000f95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000fa5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000fb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_2 (count=128)\r
-00000fc5: 00 00 00 00 00 00 00 00 08 00 00 00 00 00 00 40\r
-00000fd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000fe5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00000ff5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001005: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001015: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001025: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001035: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_2_HV_ROUTING + 0x00000080 (count=128)\r
-00001045: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001055: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001065: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001075: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001085: 00 00 0c 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001095: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000010a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000010b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_3 (count=128)\r
-000010c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000010d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000010e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000010f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001105: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001115: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001125: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001135: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_3_HV_ROUTING + 0x00000080 (count=128)\r
-00001145: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001155: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001165: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001175: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001185: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001195: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000011a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000011b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_4 (count=128)\r
-000011c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000011d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000011e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000011f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001205: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001215: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001225: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001235: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_4_HV_ROUTING + 0x00000080 (count=128)\r
-00001245: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001255: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001265: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001275: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001285: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001295: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000012a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000012b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_0_5 (count=128)\r
-000012c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000012d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000012e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000012f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001305: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001315: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001325: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001335: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI0_5_HV_ROUTING + 0x00000080 (count=128)\r
-00001345: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001355: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001365: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001375: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001385: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001395: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000013a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000013b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_0 (count=128)\r
-000013c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000013d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000013e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000013f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001405: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001415: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001425: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001435: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_0_HV_ROUTING + 0x00000080 (count=128)\r
-00001445: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001455: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001465: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001475: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001485: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001495: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000014a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000014b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_0 (count=128)\r
-000014c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000014d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000014e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000014f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001505: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001515: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001525: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001535: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_0_HV_ROUTING + 0x00000080 (count=128)\r
-00001545: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001555: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001565: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001575: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001585: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001595: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000015a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000015b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_1 (count=128)\r
-000015c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000015d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000015e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000015f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001605: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001615: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001625: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001635: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_1_HV_ROUTING + 0x00000080 (count=128)\r
-00001645: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001655: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001665: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001675: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001685: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001695: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000016a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0a 00\r
-000016b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_1 (count=128)\r
-000016c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000016d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000016e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000016f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001705: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001715: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001725: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001735: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_1_HV_ROUTING + 0x00000080 (count=128)\r
-00001745: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001755: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001765: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001775: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001785: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001795: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000017a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0a 00\r
-000017b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_2 (count=128)\r
-000017c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000017d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000017e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000017f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001805: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001815: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001825: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001835: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_2_HV_ROUTING + 0x00000080 (count=128)\r
-00001845: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001855: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001865: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001875: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001885: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001895: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000018a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000018b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_2 (count=128)\r
-000018c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000018d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000018e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000018f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001905: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001915: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001925: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001935: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_2_HV_ROUTING + 0x00000080 (count=128)\r
-00001945: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001955: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001965: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001975: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001985: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001995: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000019a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000019b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_3 (count=128)\r
-000019c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000019d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000019e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000019f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_3_HV_ROUTING + 0x00000080 (count=128)\r
-00001a45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001a95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001aa5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ab5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_3 (count=128)\r
-00001ac5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ad5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ae5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001af5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_3_HV_ROUTING + 0x00000080 (count=128)\r
-00001b45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001b95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ba5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001bb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_4 (count=128)\r
-00001bc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001bd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001be5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001bf5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_4_HV_ROUTING + 0x00000080 (count=128)\r
-00001c45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001c95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ca5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001cb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_4 (count=128)\r
-00001cc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001cd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ce5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001cf5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_4_HV_ROUTING + 0x00000080 (count=128)\r
-00001d45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001d95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001da5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001db5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_0_5 (count=128)\r
-00001dc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001dd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001de5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001df5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_1_5_HV_ROUTING + 0x00000080 (count=128)\r
-00001e45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001e95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ea5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001eb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDBSWITCH_1_5 (count=128)\r
-00001ec5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ed5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ee5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ef5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f05: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f15: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f25: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f35: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# UDB_2_5_HV_ROUTING + 0x00000080 (count=128)\r
-00001f45: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f55: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f65: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f75: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f85: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001f95: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001fa5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001fb5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_0 (count=128)\r
-00001fc5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001fd5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001fe5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00001ff5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002005: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002015: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002025: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002035: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_0_HV_ROUTING + 0x00000080 (count=128)\r
-00002045: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002055: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002065: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002075: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002085: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002095: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000020a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000020b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_1 (count=128)\r
-000020c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000020d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000020e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000020f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002105: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002115: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002125: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002135: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_1_HV_ROUTING + 0x00000080 (count=128)\r
-00002145: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002155: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002165: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 80\r
-00002175: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002185: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002195: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000021a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 00\r
-000021b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_2 (count=128)\r
-000021c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000021d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000021e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000021f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002205: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002215: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002225: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002235: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_2_HV_ROUTING + 0x00000080 (count=128)\r
-00002245: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002255: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002265: 00 00 00 00 00 00 40 80 00 00 00 00 00 00 00 00\r
-00002275: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002285: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002295: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000022a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000022b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_3 (count=128)\r
-000022c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000022d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000022e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000022f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002305: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002315: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002325: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002335: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_3_HV_ROUTING + 0x00000080 (count=128)\r
-00002345: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002355: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002365: 00 00 00 00 00 00 40 80 00 00 00 00 00 00 00 00\r
-00002375: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002385: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002395: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000023a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000023b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_4 (count=128)\r
-000023c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000023d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000023e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000023f5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002405: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002415: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002425: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002435: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_4_HV_ROUTING + 0x00000080 (count=128)\r
-00002445: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002455: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002465: 00 00 00 00 00 00 40 80 00 00 00 00 00 00 00 00\r
-00002475: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002485: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002495: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000024a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000024b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSISWITCH_1_5 (count=128)\r
-000024c5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000024d5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000024e5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000024f5: 00 00 00 80 00 00 40 00 00 00 00 00 00 00 00 00\r
-00002505: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002515: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002525: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002535: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r
-# DSI3_5_HV_ROUTING + 0x00000080 (count=128)\r
-00002545: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002555: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002565: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002575: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-00002585: 00 00 00 00 00 00 00 00 00 00 00 00 30 00 00 00\r
-00002595: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000025a5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-000025b5: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cm3gcc.ld b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cm3gcc.ld
deleted file mode 100755 (executable)
index 6427452..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cm3gcc.ld
+++ /dev/null
@@ -1,295 +0,0 @@
-/* Linker script for ARM M-profile Simulator\r
- *\r
- * Version: Sourcery G++ Lite 2010q1-188\r
- * Support: https://support.codesourcery.com/GNUToolchain/\r
- *\r
- * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.\r
- *\r
- * The authors hereby grant permission to use, copy, modify, distribute,\r
- * and license this software and its documentation for any purpose, provided\r
- * that existing copyright notices are retained in all copies and that this\r
- * notice is included verbatim in any distributions.  No written agreement,\r
- * license, or royalty fee is required for any of the authorized uses.\r
- * Modifications to this software may be copyrighted by their authors\r
- * and need not follow the licensing terms described here, provided that\r
- * the new terms are clearly indicated on the first page of each file where\r
- * they apply.\r
- */\r
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")\r
-ENTRY(__cy_reset)\r
-SEARCH_DIR(.)\r
-GROUP(-lgcc -lc -lnosys)\r
-\r
-\r
-MEMORY\r
-{\r
-  rom (rx) : ORIGIN = 0x0, LENGTH = 131072\r
-  ram (rwx) : ORIGIN = 0x20000000 - (32768 / 2), LENGTH = 32768\r
-}\r
-\r
-\r
-CY_APPL_ORIGIN      = 0; \r
-CY_FLASH_ROW_SIZE   = 256;\r
-CY_ECC_ROW_SIZE     = 32;\r
-CY_EE_IN_BTLDR      = 0x0;\r
-CY_APPL_LOADABLE    = 0;\r
-CY_EE_SIZE          = 2048;\r
-CY_APPL_NUM         = 1;\r
-CY_APPL_MAX         = 1;\r
-CY_METADATA_SIZE    = 64;\r
-\r
-\r
-/* These force the linker to search for particular symbols from\r
- * the start of the link process and thus ensure the user's\r
- * overrides are picked up\r
- */\r
-EXTERN(Reset)\r
-\r
-/* Bring in the interrupt routines & vector */\r
-EXTERN(main)\r
-\r
-/* Bring in the meta data */\r
-EXTERN(cy_meta_loader cy_bootloader cy_meta_loadable cy_meta_bootloader)\r
-EXTERN(cy_meta_custnvl cy_meta_wolatch cy_meta_flashprotect cy_metadata)\r
-\r
-/* Provide fall-back values */\r
-PROVIDE(__cy_heap_start = _end);\r
-PROVIDE(__cy_region_num = (__cy_regions_end - __cy_regions) / 16);\r
-PROVIDE(__cy_stack = ORIGIN(ram) + LENGTH(ram));\r
-PROVIDE(__cy_heap_end = __cy_stack - 0x2000);\r
-\r
-\r
-SECTIONS\r
-{\r
-  /* The bootloader location */\r
-  .cybootloader 0x0 : { KEEP(*(.cybootloader)) } >rom\r
-\r
-  /* Calculate where the loadables should start */\r
-  appl1_start   = CY_APPL_ORIGIN ? CY_APPL_ORIGIN : ALIGN(CY_FLASH_ROW_SIZE);\r
-  appl2_start   = appl1_start + ALIGN((LENGTH(rom) - appl1_start - 2 * CY_FLASH_ROW_SIZE) / 2, CY_FLASH_ROW_SIZE);\r
-  appl_start    = (CY_APPL_NUM == 1) ? appl1_start : appl2_start;\r
-  ecc_offset    = (appl_start / CY_FLASH_ROW_SIZE) * CY_ECC_ROW_SIZE;\r
-  ee_offset     = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? ((CY_EE_SIZE / CY_APPL_MAX) * (CY_APPL_NUM - 1)) : 0;\r
-  ee_size       = (CY_APPL_LOADABLE && !CY_EE_IN_BTLDR) ? (CY_EE_SIZE / CY_APPL_MAX) : CY_EE_SIZE;\r
-  PROVIDE(CY_ECC_OFFSET = ecc_offset);\r
-  \r
-  .text appl_start :\r
-  {\r
-    CREATE_OBJECT_SYMBOLS\r
-    PROVIDE(__cy_interrupt_vector = RomVectors);\r
-\r
-    *(.romvectors)\r
-\r
-    /* Make sure we pulled in an interrupt vector.  */\r
-    ASSERT (. != __cy_interrupt_vector, "No interrupt vector");\r
-\r
-    ASSERT (CY_APPL_ORIGIN ? (SIZEOF(.cybootloader) <= CY_APPL_ORIGIN) : 1, "Wrong image location");\r
-\r
-    PROVIDE(__cy_reset = Reset);\r
-    *(.text.Reset)\r
-    /* Make sure we pulled in some reset code.  */\r
-    ASSERT (. != __cy_reset, "No reset code");\r
-\r
-       /* Place the DMA initialization before text to ensure it gets placed in first 64K of flash */\r
-    *(.dma_init)\r
-    ASSERT(appl_start + . <= 0x10000 || !0, "DMA Init must be within the first 64k of flash");\r
-               \r
-    *(.text .text.* .gnu.linkonce.t.*)\r
-    *(.plt)\r
-    *(.gnu.warning)\r
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
-       \r
-    KEEP(*(.bootloader)) /* necessary for bootloader's, but doesn't impact non-bootloaders */\r
-\r
-    *(.ARM.extab* .gnu.linkonce.armextab.*)\r
-    *(.gcc_except_table)\r
-  } >rom\r
-  .eh_frame_hdr : ALIGN (4)\r
-  {\r
-    KEEP (*(.eh_frame_hdr))\r
-  } >rom\r
-  .eh_frame : ALIGN (4)\r
-  {\r
-    KEEP (*(.eh_frame))\r
-  } >rom\r
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */\r
-  PROVIDE_HIDDEN (__exidx_start = .);\r
-  .ARM.exidx :\r
-  {\r
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
-  } >rom\r
-  __exidx_end = .;\r
-  .rodata : ALIGN (4)\r
-  {\r
-    *(.rodata .rodata.* .gnu.linkonce.r.*)\r
-\r
-    . = ALIGN(4);\r
-    KEEP(*(.init))\r
-\r
-    . = ALIGN(4);\r
-    __preinit_array_start = .;\r
-    KEEP (*(.preinit_array))\r
-    __preinit_array_end = .;\r
-\r
-    . = ALIGN(4);\r
-    __init_array_start = .;\r
-    KEEP (*(SORT(.init_array.*)))\r
-    KEEP (*(.init_array))\r
-    __init_array_end = .;\r
-\r
-    . = ALIGN(4);\r
-    KEEP(*(.fini))\r
-\r
-    . = ALIGN(4);\r
-    __fini_array_start = .;\r
-    KEEP (*(.fini_array))\r
-    KEEP (*(SORT(.fini_array.*)))\r
-    __fini_array_end = .;\r
-\r
-    . = ALIGN(0x4);\r
-    KEEP (*crtbegin.o(.ctors))\r
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))\r
-    KEEP (*(SORT(.ctors.*)))\r
-    KEEP (*crtend.o(.ctors))\r
-\r
-    . = ALIGN(0x4);\r
-    KEEP (*crtbegin.o(.dtors))\r
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))\r
-    KEEP (*(SORT(.dtors.*)))\r
-    KEEP (*crtend.o(.dtors))\r
-\r
-    . = ALIGN(4);\r
-    __cy_regions = .;\r
-    LONG (__cy_region_init_ram)\r
-    LONG (__cy_region_start_data)\r
-    LONG (__cy_region_init_size_ram)\r
-    LONG (__cy_region_zero_size_ram)\r
-    __cy_regions_end = .;\r
-\r
-    . = ALIGN (8);\r
-    _etext = .;\r
-  } >rom\r
-\r
-  .ramvectors (NOLOAD) : ALIGN(8)\r
-  {\r
-    __cy_region_start_ram = .;\r
-    KEEP(*(.ramvectors))\r
-  }\r
-\r
-  .noinit (NOLOAD) : ALIGN(8)\r
-  {\r
-    KEEP(*(.noinit))\r
-  }\r
-\r
-  .data : ALIGN(8)\r
-  {\r
-    __cy_region_start_data = .;\r
-\r
-    KEEP(*(.jcr))\r
-    *(.got.plt) *(.got)\r
-    *(.shdata)\r
-    *(.data .data.* .gnu.linkonce.d.*)\r
-    . = ALIGN (8);\r
-    *(.ram)\r
-    _edata = .;\r
-  } >ram AT>rom\r
-  .bss : ALIGN(8)\r
-  {\r
-    PROVIDE(__bss_start__ = .);\r
-    *(.shbss)\r
-    *(.bss .bss.* .gnu.linkonce.b.*)\r
-    *(COMMON)\r
-    . = ALIGN (8);\r
-    *(.ram.b)\r
-    _end = .;\r
-    __end = .;\r
-  } >ram AT>rom\r
-  PROVIDE(end = .);\r
-  PROVIDE(__bss_end__ = .);\r
-  \r
-  __cy_region_init_ram = LOADADDR (.data);\r
-  __cy_region_init_size_ram = _edata - ADDR (.data);\r
-  __cy_region_zero_size_ram = _end - _edata;\r
-  \r
-  /* The .stack and .heap sections don't contain any symbols. \r
-   * They are only used for linker to calculate RAM utilization.\r
-   */\r
-  .heap (NOLOAD) :\r
-  {\r
-    . = _end;\r
-    . += 0x0800;\r
-    __cy_heap_limit = .;\r
-  } >ram\r
-\r
-  .stack (__cy_stack - 0x2000) (NOLOAD) :\r
-  {\r
-    __cy_stack_limit = .;\r
-    . += 0x2000;\r
-  } >ram\r
-  \r
-  /* Check if data + heap + stack exceeds RAM limit */\r
-  ASSERT(__cy_stack_limit >= __cy_heap_limit, "region RAM overflowed with stack")\r
-\r
-  .cyloadermeta ((appl_start == 0) ? (LENGTH(rom) - CY_METADATA_SIZE) : 0xF0000000) :\r
-  {\r
-    KEEP(*(.cyloadermeta))\r
-  } :NONE\r
-\r
-  .cyloadablemeta (LENGTH(rom) - CY_FLASH_ROW_SIZE * (CY_APPL_NUM - 1) - CY_METADATA_SIZE) :\r
-  {\r
-    KEEP(*(.cyloadablemeta))\r
-  } >rom\r
-\r
-  .cyconfigecc (0x80000000 + ecc_offset) : \r
-  {\r
-    KEEP(*(.cyconfigecc))\r
-  } :NONE \r
-\r
-  .cycustnvl      0x90000000 : { KEEP(*(.cycustnvl)) } :NONE \r
-  .cywolatch      0x90100000 : { KEEP(*(.cywolatch)) } :NONE \r
-\r
-  .cyeeprom (0x90200000 + ee_offset) : \r
-  {\r
-    KEEP(*(.cyeeprom))\r
-    ASSERT(. <= (0x90200000 + ee_offset + ee_size), ".cyeeprom data will not fit in EEPROM");\r
-  } :NONE \r
-\r
-  .cyflashprotect 0x90400000 : { KEEP(*(.cyflashprotect)) } :NONE \r
-  .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE \r
-\r
-  .stab 0 (NOLOAD) : { *(.stab) }\r
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }\r
-  /* DWARF debug sections.\r
-   * Symbols in the DWARF debugging sections are relative to the beginning\r
-   * of the section so we begin them at 0.\r
-   */\r
-  /* DWARF 1 */\r
-  .debug          0 : { *(.debug) }\r
-  .line           0 : { *(.line) }\r
-  /* GNU DWARF 1 extensions */\r
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }\r
-  .debug_sfnames  0 : { *(.debug_sfnames) }\r
-  /* DWARF 1.1 and DWARF 2 */\r
-  .debug_aranges  0 : { *(.debug_aranges) }\r
-  .debug_pubnames 0 : { *(.debug_pubnames) }\r
-  /* DWARF 2 */\r
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
-  .debug_abbrev   0 : { *(.debug_abbrev) }\r
-  .debug_line     0 : { *(.debug_line) }\r
-  .debug_frame    0 : { *(.debug_frame) }\r
-  .debug_str      0 : { *(.debug_str) }\r
-  .debug_loc      0 : { *(.debug_loc) }\r
-  .debug_macinfo  0 : { *(.debug_macinfo) }\r
-  /* DWARF 2.1 */\r
-  .debug_ranges   0 : { *(.debug_ranges) }\r
-  /* SGI/MIPS DWARF 2 extensions */\r
-  .debug_weaknames 0 : { *(.debug_weaknames) }\r
-  .debug_funcnames 0 : { *(.debug_funcnames) }\r
-  .debug_typenames 0 : { *(.debug_typenames) }\r
-  .debug_varnames  0 : { *(.debug_varnames) }\r
-\r
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }\r
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }\r
-  /DISCARD/ : { *(.note.GNU-stack) }\r
-}\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3.h
deleted file mode 100755 (executable)
index 0e215fc..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3.h
+++ /dev/null
@@ -1,1627 +0,0 @@
-/**************************************************************************//**\r
- * @file     core_cm3.h\r
- * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File\r
- * @version  V3.20\r
- * @date     25. February 2013\r
- *\r
- * @note\r
- *\r
- ******************************************************************************/\r
-/* Copyright (c) 2009 - 2013 ARM LIMITED\r
-\r
-   All rights reserved.\r
-   Redistribution and use in source and binary forms, with or without\r
-   modification, are permitted provided that the following conditions are met:\r
-   - Redistributions of source code must retain the above copyright\r
-     notice, this list of conditions and the following disclaimer.\r
-   - Redistributions in binary form must reproduce the above copyright\r
-     notice, this list of conditions and the following disclaimer in the\r
-     documentation and/or other materials provided with the distribution.\r
-   - Neither the name of ARM nor the names of its contributors may be used\r
-     to endorse or promote products derived from this software without\r
-     specific prior written permission.\r
-   *\r
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\r
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\r
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\r
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\r
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
-   POSSIBILITY OF SUCH DAMAGE.\r
-   ---------------------------------------------------------------------------*/\r
-\r
-\r
-#if defined ( __ICCARM__ )\r
- #pragma system_include  /* treat file as system include file for MISRA check */\r
-#endif\r
-\r
-#ifdef __cplusplus\r
- extern "C" {\r
-#endif\r
-\r
-#ifndef __CORE_CM3_H_GENERIC\r
-#define __CORE_CM3_H_GENERIC\r
-\r
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\r
-  CMSIS violates the following MISRA-C:2004 rules:\r
-\r
-   \li Required Rule 8.5, object/function definition in header file.<br>\r
-     Function definitions in header files are used to allow 'inlining'.\r
-\r
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>\r
-     Unions are used for effective representation of core registers.\r
-\r
-   \li Advisory Rule 19.7, Function-like macro defined.<br>\r
-     Function-like macros are used to allow more efficient code.\r
- */\r
-\r
-\r
-/*******************************************************************************\r
- *                 CMSIS definitions\r
- ******************************************************************************/\r
-/** \ingroup Cortex_M3\r
-  @{\r
- */\r
-\r
-/*  CMSIS CM3 definitions */\r
-#define __CM3_CMSIS_VERSION_MAIN  (0x03)                                   /*!< [31:16] CMSIS HAL main version   */\r
-#define __CM3_CMSIS_VERSION_SUB   (0x20)                                   /*!< [15:0]  CMSIS HAL sub version    */\r
-#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | \\r
-                                    __CM3_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */\r
-\r
-#define __CORTEX_M                (0x03)                                   /*!< Cortex-M Core                    */\r
-\r
-\r
-#if   defined ( __CC_ARM )\r
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */\r
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */\r
-  #define __STATIC_INLINE  static __inline\r
-\r
-#elif defined ( __ICCARM__ )\r
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */\r
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */\r
-  #define __STATIC_INLINE  static inline\r
-\r
-#elif defined ( __TMS470__ )\r
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */\r
-  #define __STATIC_INLINE  static inline\r
-\r
-#elif defined ( __GNUC__ )\r
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */\r
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */\r
-  #define __STATIC_INLINE  static inline\r
-\r
-#elif defined ( __TASKING__ )\r
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */\r
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */\r
-  #define __STATIC_INLINE  static inline\r
-\r
-#endif\r
-\r
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all\r
-*/\r
-#define __FPU_USED       0\r
-\r
-#if defined ( __CC_ARM )\r
-  #if defined __TARGET_FPU_VFP\r
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"\r
-  #endif\r
-\r
-#elif defined ( __ICCARM__ )\r
-  #if defined __ARMVFP__\r
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"\r
-  #endif\r
-\r
-#elif defined ( __TMS470__ )\r
-  #if defined __TI__VFP_SUPPORT____\r
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"\r
-  #endif\r
-\r
-#elif defined ( __GNUC__ )\r
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\r
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"\r
-  #endif\r
-\r
-#elif defined ( __TASKING__ )\r
-  #if defined __FPU_VFP__\r
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"\r
-  #endif\r
-#endif\r
-\r
-#include <stdint.h>                      /* standard types definitions                      */\r
-#include <core_cmInstr.h>                /* Core Instruction Access                         */\r
-#include <core_cmFunc.h>                 /* Core Function Access                            */\r
-\r
-#endif /* __CORE_CM3_H_GENERIC */\r
-\r
-#ifndef __CMSIS_GENERIC\r
-\r
-#ifndef __CORE_CM3_H_DEPENDANT\r
-#define __CORE_CM3_H_DEPENDANT\r
-\r
-/* check device defines and use defaults */\r
-#if defined __CHECK_DEVICE_DEFINES\r
-  #ifndef __CM3_REV\r
-    #define __CM3_REV               0x0200\r
-    #warning "__CM3_REV not defined in device header file; using default!"\r
-  #endif\r
-\r
-  #ifndef __MPU_PRESENT\r
-    #define __MPU_PRESENT             0\r
-    #warning "__MPU_PRESENT not defined in device header file; using default!"\r
-  #endif\r
-\r
-  #ifndef __NVIC_PRIO_BITS\r
-    #define __NVIC_PRIO_BITS          4\r
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"\r
-  #endif\r
-\r
-  #ifndef __Vendor_SysTickConfig\r
-    #define __Vendor_SysTickConfig    0\r
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"\r
-  #endif\r
-#endif\r
-\r
-/* IO definitions (access restrictions to peripheral registers) */\r
-/**\r
-    \defgroup CMSIS_glob_defs CMSIS Global Defines\r
-\r
-    <strong>IO Type Qualifiers</strong> are used\r
-    \li to specify the access to peripheral variables.\r
-    \li for automatic generation of peripheral register debug information.\r
-*/\r
-#ifdef __cplusplus\r
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */\r
-#else\r
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */\r
-#endif\r
-#define     __O     volatile             /*!< Defines 'write only' permissions                */\r
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */\r
-\r
-/*@} end of group Cortex_M3 */\r
-\r
-\r
-\r
-/*******************************************************************************\r
- *                 Register Abstraction\r
-  Core Register contain:\r
-  - Core Register\r
-  - Core NVIC Register\r
-  - Core SCB Register\r
-  - Core SysTick Register\r
-  - Core Debug Register\r
-  - Core MPU Register\r
- ******************************************************************************/\r
-/** \defgroup CMSIS_core_register Defines and Type Definitions\r
-    \brief Type definitions and defines for Cortex-M processor based devices.\r
-*/\r
-\r
-/** \ingroup    CMSIS_core_register\r
-    \defgroup   CMSIS_CORE  Status and Control Registers\r
-    \brief  Core Register type definitions.\r
-  @{\r
- */\r
-\r
-/** \brief  Union type to access the Application Program Status Register (APSR).\r
- */\r
-typedef union\r
-{\r
-  struct\r
-  {\r
-#if (__CORTEX_M != 0x04)\r
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */\r
-#else\r
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */\r
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */\r
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */\r
-#endif\r
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */\r
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */\r
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */\r
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */\r
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */\r
-  } b;                                   /*!< Structure used for bit  access                  */\r
-  uint32_t w;                            /*!< Type      used for word access                  */\r
-} APSR_Type;\r
-\r
-\r
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).\r
- */\r
-typedef union\r
-{\r
-  struct\r
-  {\r
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */\r
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */\r
-  } b;                                   /*!< Structure used for bit  access                  */\r
-  uint32_t w;                            /*!< Type      used for word access                  */\r
-} IPSR_Type;\r
-\r
-\r
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\r
- */\r
-typedef union\r
-{\r
-  struct\r
-  {\r
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */\r
-#if (__CORTEX_M != 0x04)\r
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */\r
-#else\r
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */\r
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */\r
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */\r
-#endif\r
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */\r
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */\r
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */\r
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */\r
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */\r
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */\r
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */\r
-  } b;                                   /*!< Structure used for bit  access                  */\r
-  uint32_t w;                            /*!< Type      used for word access                  */\r
-} xPSR_Type;\r
-\r
-\r
-/** \brief  Union type to access the Control Registers (CONTROL).\r
- */\r
-typedef union\r
-{\r
-  struct\r
-  {\r
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\r
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */\r
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */\r
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */\r
-  } b;                                   /*!< Structure used for bit  access                  */\r
-  uint32_t w;                            /*!< Type      used for word access                  */\r
-} CONTROL_Type;\r
-\r
-/*@} end of group CMSIS_CORE */\r
-\r
-\r
-/** \ingroup    CMSIS_core_register\r
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\r
-    \brief      Type definitions for the NVIC Registers\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\r
- */\r
-typedef struct\r
-{\r
-  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */\r
-       uint32_t RESERVED0[24];\r
-  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */\r
-       uint32_t RSERVED1[24];\r
-  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */\r
-       uint32_t RESERVED2[24];\r
-  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */\r
-       uint32_t RESERVED3[24];\r
-  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */\r
-       uint32_t RESERVED4[56];\r
-  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\r
-       uint32_t RESERVED5[644];\r
-  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */\r
-}  NVIC_Type;\r
-\r
-/* Software Triggered Interrupt Register Definitions */\r
-#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */\r
-#define NVIC_STIR_INTID_Msk                (0x1FFUL << NVIC_STIR_INTID_Pos)            /*!< STIR: INTLINESNUM Mask */\r
-\r
-/*@} end of group CMSIS_NVIC */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_SCB     System Control Block (SCB)\r
-    \brief      Type definitions for the System Control Block Registers\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the System Control Block (SCB).\r
- */\r
-typedef struct\r
-{\r
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */\r
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */\r
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */\r
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */\r
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */\r
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */\r
-  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\r
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */\r
-  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */\r
-  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */\r
-  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */\r
-  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */\r
-  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */\r
-  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */\r
-  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */\r
-  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */\r
-  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */\r
-  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */\r
-  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */\r
-       uint32_t RESERVED0[5];\r
-  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */\r
-} SCB_Type;\r
-\r
-/* SCB CPUID Register Definitions */\r
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */\r
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\r
-\r
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */\r
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\r
-\r
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */\r
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\r
-\r
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */\r
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\r
-\r
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */\r
-#define SCB_CPUID_REVISION_Msk             (0xFUL << SCB_CPUID_REVISION_Pos)              /*!< SCB CPUID: REVISION Mask */\r
-\r
-/* SCB Interrupt Control State Register Definitions */\r
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */\r
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\r
-\r
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */\r
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\r
-\r
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */\r
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\r
-\r
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */\r
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\r
-\r
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */\r
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\r
-\r
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */\r
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\r
-\r
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */\r
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\r
-\r
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */\r
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\r
-\r
-#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */\r
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\r
-\r
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */\r
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)           /*!< SCB ICSR: VECTACTIVE Mask */\r
-\r
-/* SCB Vector Table Offset Register Definitions */\r
-#if (__CM3_REV < 0x0201)                   /* core r2p1 */\r
-#define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */\r
-#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */\r
-\r
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */\r
-#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */\r
-#else\r
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */\r
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\r
-#endif\r
-\r
-/* SCB Application Interrupt and Reset Control Register Definitions */\r
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */\r
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\r
-\r
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */\r
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\r
-\r
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */\r
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\r
-\r
-#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */\r
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\r
-\r
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */\r
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\r
-\r
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */\r
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\r
-\r
-#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */\r
-#define SCB_AIRCR_VECTRESET_Msk            (1UL << SCB_AIRCR_VECTRESET_Pos)               /*!< SCB AIRCR: VECTRESET Mask */\r
-\r
-/* SCB System Control Register Definitions */\r
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */\r
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\r
-\r
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */\r
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\r
-\r
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */\r
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\r
-\r
-/* SCB Configuration Control Register Definitions */\r
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */\r
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\r
-\r
-#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */\r
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\r
-\r
-#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */\r
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\r
-\r
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */\r
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\r
-\r
-#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */\r
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\r
-\r
-#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */\r
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL << SCB_CCR_NONBASETHRDENA_Pos)            /*!< SCB CCR: NONBASETHRDENA Mask */\r
-\r
-/* SCB System Handler Control and State Register Definitions */\r
-#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */\r
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\r
-\r
-#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */\r
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\r
-\r
-#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */\r
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\r
-\r
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */\r
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\r
-\r
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */\r
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\r
-\r
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */\r
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\r
-\r
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */\r
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\r
-\r
-#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */\r
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\r
-\r
-#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */\r
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\r
-\r
-#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */\r
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\r
-\r
-#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */\r
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\r
-\r
-#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */\r
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\r
-\r
-#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */\r
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\r
-\r
-#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */\r
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL << SCB_SHCSR_MEMFAULTACT_Pos)             /*!< SCB SHCSR: MEMFAULTACT Mask */\r
-\r
-/* SCB Configurable Fault Status Registers Definitions */\r
-#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */\r
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\r
-\r
-#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */\r
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\r
-\r
-#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */\r
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos)            /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\r
-\r
-/* SCB Hard Fault Status Registers Definitions */\r
-#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */\r
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\r
-\r
-#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */\r
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\r
-\r
-#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */\r
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\r
-\r
-/* SCB Debug Fault Status Register Definitions */\r
-#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */\r
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\r
-\r
-#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */\r
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\r
-\r
-#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */\r
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\r
-\r
-#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */\r
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\r
-\r
-#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */\r
-#define SCB_DFSR_HALTED_Msk                (1UL << SCB_DFSR_HALTED_Pos)                   /*!< SCB DFSR: HALTED Mask */\r
-\r
-/*@} end of group CMSIS_SCB */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\r
-    \brief      Type definitions for the System Control and ID Register not in the SCB\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.\r
- */\r
-typedef struct\r
-{\r
-       uint32_t RESERVED0[1];\r
-  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */\r
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))\r
-  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register      */\r
-#else\r
-       uint32_t RESERVED1[1];\r
-#endif\r
-} SCnSCB_Type;\r
-\r
-/* Interrupt Controller Type Register Definitions */\r
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */\r
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)      /*!< ICTR: INTLINESNUM Mask */\r
-\r
-/* Auxiliary Control Register Definitions */\r
-\r
-#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */\r
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */\r
-\r
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1                                          /*!< ACTLR: DISDEFWBUF Position */\r
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */\r
-\r
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */\r
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)        /*!< ACTLR: DISMCYCINT Mask */\r
-\r
-/*@} end of group CMSIS_SCnotSCB */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)\r
-    \brief      Type definitions for the System Timer Registers.\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the System Timer (SysTick).\r
- */\r
-typedef struct\r
-{\r
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\r
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */\r
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */\r
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */\r
-} SysTick_Type;\r
-\r
-/* SysTick Control / Status Register Definitions */\r
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */\r
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\r
-\r
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */\r
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\r
-\r
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */\r
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\r
-\r
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */\r
-#define SysTick_CTRL_ENABLE_Msk            (1UL << SysTick_CTRL_ENABLE_Pos)               /*!< SysTick CTRL: ENABLE Mask */\r
-\r
-/* SysTick Reload Register Definitions */\r
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */\r
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)        /*!< SysTick LOAD: RELOAD Mask */\r
-\r
-/* SysTick Current Register Definitions */\r
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */\r
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick VAL: CURRENT Mask */\r
-\r
-/* SysTick Calibration Register Definitions */\r
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */\r
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\r
-\r
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */\r
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\r
-\r
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */\r
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)        /*!< SysTick CALIB: TENMS Mask */\r
-\r
-/*@} end of group CMSIS_SysTick */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\r
-    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\r
- */\r
-typedef struct\r
-{\r
-  __O  union\r
-  {\r
-    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */\r
-    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */\r
-    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */\r
-  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */\r
-       uint32_t RESERVED0[864];\r
-  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */\r
-       uint32_t RESERVED1[15];\r
-  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */\r
-       uint32_t RESERVED2[15];\r
-  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */\r
-       uint32_t RESERVED3[29];\r
-  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */\r
-  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */\r
-  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */\r
-       uint32_t RESERVED4[43];\r
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */\r
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */\r
-       uint32_t RESERVED5[6];\r
-  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\r
-  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\r
-  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\r
-  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\r
-  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\r
-  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\r
-  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\r
-  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\r
-  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\r
-  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\r
-  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\r
-  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\r
-} ITM_Type;\r
-\r
-/* ITM Trace Privilege Register Definitions */\r
-#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */\r
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL << ITM_TPR_PRIVMASK_Pos)                /*!< ITM TPR: PRIVMASK Mask */\r
-\r
-/* ITM Trace Control Register Definitions */\r
-#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */\r
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\r
-\r
-#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */\r
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */\r
-\r
-#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */\r
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\r
-\r
-#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */\r
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */\r
-\r
-#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */\r
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\r
-\r
-#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */\r
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\r
-\r
-#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */\r
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\r
-\r
-#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */\r
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\r
-\r
-#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */\r
-#define ITM_TCR_ITMENA_Msk                 (1UL << ITM_TCR_ITMENA_Pos)                    /*!< ITM TCR: ITM Enable bit Mask */\r
-\r
-/* ITM Integration Write Register Definitions */\r
-#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */\r
-#define ITM_IWR_ATVALIDM_Msk               (1UL << ITM_IWR_ATVALIDM_Pos)                  /*!< ITM IWR: ATVALIDM Mask */\r
-\r
-/* ITM Integration Read Register Definitions */\r
-#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */\r
-#define ITM_IRR_ATREADYM_Msk               (1UL << ITM_IRR_ATREADYM_Pos)                  /*!< ITM IRR: ATREADYM Mask */\r
-\r
-/* ITM Integration Mode Control Register Definitions */\r
-#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */\r
-#define ITM_IMCR_INTEGRATION_Msk           (1UL << ITM_IMCR_INTEGRATION_Pos)              /*!< ITM IMCR: INTEGRATION Mask */\r
-\r
-/* ITM Lock Status Register Definitions */\r
-#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */\r
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\r
-\r
-#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */\r
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\r
-\r
-#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */\r
-#define ITM_LSR_Present_Msk                (1UL << ITM_LSR_Present_Pos)                   /*!< ITM LSR: Present Mask */\r
-\r
-/*@}*/ /* end of group CMSIS_ITM */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\r
-    \brief      Type definitions for the Data Watchpoint and Trace (DWT)\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\r
- */\r
-typedef struct\r
-{\r
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */\r
-  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */\r
-  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */\r
-  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */\r
-  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */\r
-  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */\r
-  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */\r
-  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */\r
-  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */\r
-  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */\r
-  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */\r
-       uint32_t RESERVED0[1];\r
-  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */\r
-  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */\r
-  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */\r
-       uint32_t RESERVED1[1];\r
-  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */\r
-  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */\r
-  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */\r
-       uint32_t RESERVED2[1];\r
-  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */\r
-  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */\r
-  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */\r
-} DWT_Type;\r
-\r
-/* DWT Control Register Definitions */\r
-#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */\r
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\r
-\r
-#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */\r
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\r
-\r
-#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */\r
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\r
-\r
-#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */\r
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\r
-\r
-#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */\r
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\r
-\r
-#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */\r
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\r
-\r
-#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */\r
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\r
-\r
-#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */\r
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\r
-\r
-#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */\r
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\r
-\r
-#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */\r
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\r
-\r
-#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */\r
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\r
-\r
-#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */\r
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\r
-\r
-#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */\r
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\r
-\r
-#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */\r
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\r
-\r
-#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */\r
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\r
-\r
-#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */\r
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\r
-\r
-#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */\r
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\r
-\r
-#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */\r
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL << DWT_CTRL_CYCCNTENA_Pos)           /*!< DWT CTRL: CYCCNTENA Mask */\r
-\r
-/* DWT CPI Count Register Definitions */\r
-#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */\r
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL << DWT_CPICNT_CPICNT_Pos)           /*!< DWT CPICNT: CPICNT Mask */\r
-\r
-/* DWT Exception Overhead Count Register Definitions */\r
-#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */\r
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL << DWT_EXCCNT_EXCCNT_Pos)           /*!< DWT EXCCNT: EXCCNT Mask */\r
-\r
-/* DWT Sleep Count Register Definitions */\r
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */\r
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos)       /*!< DWT SLEEPCNT: SLEEPCNT Mask */\r
-\r
-/* DWT LSU Count Register Definitions */\r
-#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */\r
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL << DWT_LSUCNT_LSUCNT_Pos)           /*!< DWT LSUCNT: LSUCNT Mask */\r
-\r
-/* DWT Folded-instruction Count Register Definitions */\r
-#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */\r
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos)         /*!< DWT FOLDCNT: FOLDCNT Mask */\r
-\r
-/* DWT Comparator Mask Register Definitions */\r
-#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */\r
-#define DWT_MASK_MASK_Msk                  (0x1FUL << DWT_MASK_MASK_Pos)               /*!< DWT MASK: MASK Mask */\r
-\r
-/* DWT Comparator Function Register Definitions */\r
-#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */\r
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\r
-\r
-#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */\r
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */\r
-\r
-#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */\r
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */\r
-\r
-#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */\r
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\r
-\r
-#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */\r
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */\r
-\r
-#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */\r
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */\r
-\r
-#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */\r
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */\r
-\r
-#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */\r
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */\r
-\r
-#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */\r
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL << DWT_FUNCTION_FUNCTION_Pos)        /*!< DWT FUNCTION: FUNCTION Mask */\r
-\r
-/*@}*/ /* end of group CMSIS_DWT */\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_TPI     Trace Port Interface (TPI)\r
-    \brief      Type definitions for the Trace Port Interface (TPI)\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Trace Port Interface Register (TPI).\r
- */\r
-typedef struct\r
-{\r
-  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */\r
-  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\r
-       uint32_t RESERVED0[2];\r
-  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\r
-       uint32_t RESERVED1[55];\r
-  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\r
-       uint32_t RESERVED2[131];\r
-  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\r
-  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\r
-  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\r
-       uint32_t RESERVED3[759];\r
-  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */\r
-  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\r
-  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\r
-       uint32_t RESERVED4[1];\r
-  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\r
-  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\r
-  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\r
-       uint32_t RESERVED5[39];\r
-  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */\r
-  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\r
-       uint32_t RESERVED7[8];\r
-  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\r
-  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\r
-} TPI_Type;\r
-\r
-/* TPI Asynchronous Clock Prescaler Register Definitions */\r
-#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */\r
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL << TPI_ACPR_PRESCALER_Pos)        /*!< TPI ACPR: PRESCALER Mask */\r
-\r
-/* TPI Selected Pin Protocol Register Definitions */\r
-#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */\r
-#define TPI_SPPR_TXMODE_Msk                (0x3UL << TPI_SPPR_TXMODE_Pos)              /*!< TPI SPPR: TXMODE Mask */\r
-\r
-/* TPI Formatter and Flush Status Register Definitions */\r
-#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */\r
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\r
-\r
-#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */\r
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\r
-\r
-#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */\r
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\r
-\r
-#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */\r
-#define TPI_FFSR_FlInProg_Msk              (0x1UL << TPI_FFSR_FlInProg_Pos)            /*!< TPI FFSR: FlInProg Mask */\r
-\r
-/* TPI Formatter and Flush Control Register Definitions */\r
-#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */\r
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\r
-\r
-#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */\r
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\r
-\r
-/* TPI TRIGGER Register Definitions */\r
-#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */\r
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL << TPI_TRIGGER_TRIGGER_Pos)          /*!< TPI TRIGGER: TRIGGER Mask */\r
-\r
-/* TPI Integration ETM Data Register Definitions (FIFO0) */\r
-#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */\r
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\r
-\r
-#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */\r
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\r
-\r
-#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */\r
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\r
-\r
-#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */\r
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\r
-\r
-#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */\r
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\r
-\r
-#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */\r
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\r
-\r
-#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */\r
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL << TPI_FIFO0_ETM0_Pos)              /*!< TPI FIFO0: ETM0 Mask */\r
-\r
-/* TPI ITATBCTR2 Register Definitions */\r
-#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */\r
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL << TPI_ITATBCTR2_ATREADY_Pos)        /*!< TPI ITATBCTR2: ATREADY Mask */\r
-\r
-/* TPI Integration ITM Data Register Definitions (FIFO1) */\r
-#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */\r
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\r
-\r
-#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */\r
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\r
-\r
-#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */\r
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\r
-\r
-#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */\r
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\r
-\r
-#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */\r
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\r
-\r
-#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */\r
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\r
-\r
-#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */\r
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL << TPI_FIFO1_ITM0_Pos)              /*!< TPI FIFO1: ITM0 Mask */\r
-\r
-/* TPI ITATBCTR0 Register Definitions */\r
-#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */\r
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL << TPI_ITATBCTR0_ATREADY_Pos)        /*!< TPI ITATBCTR0: ATREADY Mask */\r
-\r
-/* TPI Integration Mode Control Register Definitions */\r
-#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */\r
-#define TPI_ITCTRL_Mode_Msk                (0x1UL << TPI_ITCTRL_Mode_Pos)              /*!< TPI ITCTRL: Mode Mask */\r
-\r
-/* TPI DEVID Register Definitions */\r
-#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */\r
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\r
-\r
-#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */\r
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\r
-\r
-#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */\r
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\r
-\r
-#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */\r
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\r
-\r
-#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */\r
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\r
-\r
-#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */\r
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL << TPI_DEVID_NrTraceInput_Pos)      /*!< TPI DEVID: NrTraceInput Mask */\r
-\r
-/* TPI DEVTYPE Register Definitions */\r
-#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */\r
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL << TPI_DEVTYPE_SubType_Pos)          /*!< TPI DEVTYPE: SubType Mask */\r
-\r
-#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */\r
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\r
-\r
-/*@}*/ /* end of group CMSIS_TPI */\r
-\r
-\r
-#if (__MPU_PRESENT == 1)\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)\r
-    \brief      Type definitions for the Memory Protection Unit (MPU)\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Memory Protection Unit (MPU).\r
- */\r
-typedef struct\r
-{\r
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */\r
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */\r
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */\r
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */\r
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */\r
-  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */\r
-  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */\r
-  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */\r
-  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */\r
-  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */\r
-  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */\r
-} MPU_Type;\r
-\r
-/* MPU Type Register */\r
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */\r
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\r
-\r
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */\r
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\r
-\r
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */\r
-#define MPU_TYPE_SEPARATE_Msk              (1UL << MPU_TYPE_SEPARATE_Pos)                 /*!< MPU TYPE: SEPARATE Mask */\r
-\r
-/* MPU Control Register */\r
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */\r
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\r
-\r
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */\r
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\r
-\r
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */\r
-#define MPU_CTRL_ENABLE_Msk                (1UL << MPU_CTRL_ENABLE_Pos)                   /*!< MPU CTRL: ENABLE Mask */\r
-\r
-/* MPU Region Number Register */\r
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */\r
-#define MPU_RNR_REGION_Msk                 (0xFFUL << MPU_RNR_REGION_Pos)                 /*!< MPU RNR: REGION Mask */\r
-\r
-/* MPU Region Base Address Register */\r
-#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */\r
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\r
-\r
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */\r
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\r
-\r
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */\r
-#define MPU_RBAR_REGION_Msk                (0xFUL << MPU_RBAR_REGION_Pos)                 /*!< MPU RBAR: REGION Mask */\r
-\r
-/* MPU Region Attribute and Size Register */\r
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */\r
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\r
-\r
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */\r
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\r
-\r
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */\r
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\r
-\r
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */\r
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\r
-\r
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */\r
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\r
-\r
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */\r
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\r
-\r
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */\r
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\r
-\r
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */\r
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\r
-\r
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */\r
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\r
-\r
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */\r
-#define MPU_RASR_ENABLE_Msk                (1UL << MPU_RASR_ENABLE_Pos)                   /*!< MPU RASR: Region enable bit Disable Mask */\r
-\r
-/*@} end of group CMSIS_MPU */\r
-#endif\r
-\r
-\r
-/** \ingroup  CMSIS_core_register\r
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\r
-    \brief      Type definitions for the Core Debug Registers\r
-  @{\r
- */\r
-\r
-/** \brief  Structure type to access the Core Debug Register (CoreDebug).\r
- */\r
-typedef struct\r
-{\r
-  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */\r
-  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */\r
-  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */\r
-  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\r
-} CoreDebug_Type;\r
-\r
-/* Debug Halting Control and Status Register */\r
-#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */\r
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\r
-\r
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */\r
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\r
-\r
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\r
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\r
-\r
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */\r
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\r
-\r
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */\r
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\r
-\r
-#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */\r
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\r
-\r
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */\r
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\r
-\r
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\r
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\r
-\r
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */\r
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\r
-\r
-#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */\r
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\r
-\r
-#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */\r
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\r
-\r
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */\r
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos)         /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\r
-\r
-/* Debug Core Register Selector Register */\r
-#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */\r
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\r
-\r
-#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */\r
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos)         /*!< CoreDebug DCRSR: REGSEL Mask */\r
-\r
-/* Debug Exception and Monitor Control Register */\r
-#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */\r
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\r
-\r
-#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */\r
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\r
-\r
-#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */\r
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\r
-\r
-#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */\r
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\r
-\r
-#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */\r
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */\r
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */\r
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */\r
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */\r
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */\r
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */\r
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */\r
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\r
-\r
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */\r
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos)      /*!< CoreDebug DEMCR: VC_CORERESET Mask */\r
-\r
-/*@} end of group CMSIS_CoreDebug */\r
-\r
-\r
-/** \ingroup    CMSIS_core_register\r
-    \defgroup   CMSIS_core_base     Core Definitions\r
-    \brief      Definitions for base addresses, unions, and structures.\r
-  @{\r
- */\r
-\r
-/* Memory mapping of Cortex-M3 Hardware */\r
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */\r
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */\r
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */\r
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */\r
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */\r
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */\r
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */\r
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */\r
-\r
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\r
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */\r
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */\r
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */\r
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */\r
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */\r
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */\r
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */\r
-\r
-#if (__MPU_PRESENT == 1)\r
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */\r
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */\r
-#endif\r
-\r
-/*@} */\r
-\r
-\r
-\r
-/*******************************************************************************\r
- *                Hardware Abstraction Layer\r
-  Core Function Interface contains:\r
-  - Core NVIC Functions\r
-  - Core SysTick Functions\r
-  - Core Debug Functions\r
-  - Core Register Access Functions\r
- ******************************************************************************/\r
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\r
-*/\r
-\r
-\r
-\r
-/* ##########################   NVIC functions  #################################### */\r
-/** \ingroup  CMSIS_Core_FunctionInterface\r
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions\r
-    \brief      Functions that manage interrupts and exceptions via the NVIC.\r
-    @{\r
- */\r
-\r
-/** \brief  Set Priority Grouping\r
-\r
-  The function sets the priority grouping field using the required unlock sequence.\r
-  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\r
-  Only values from 0..7 are used.\r
-  In case of a conflict between priority grouping and available\r
-  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\r
-\r
-    \param [in]      PriorityGroup  Priority grouping field.\r
- */\r
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\r
-{\r
-  uint32_t reg_value;\r
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07);               /* only values 0..7 are used          */\r
-\r
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\r
-  reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk);             /* clear bits to change               */\r
-  reg_value  =  (reg_value                                 |\r
-                ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |\r
-                (PriorityGroupTmp << 8));                                     /* Insert write key and priorty group */\r
-  SCB->AIRCR =  reg_value;\r
-}\r
-\r
-\r
-/** \brief  Get Priority Grouping\r
-\r
-  The function reads the priority grouping field from the NVIC Interrupt Controller.\r
-\r
-    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\r
- */\r
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)\r
-{\r
-  return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos);   /* read priority grouping field */\r
-}\r
-\r
-\r
-/** \brief  Enable External Interrupt\r
-\r
-    The function enables a device-specific interrupt in the NVIC interrupt controller.\r
-\r
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.\r
- */\r
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)\r
-{\r
-  NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */\r
-}\r
-\r
-\r
-/** \brief  Disable External Interrupt\r
-\r
-    The function disables a device-specific interrupt in the NVIC interrupt controller.\r
-\r
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.\r
- */\r
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)\r
-{\r
-  NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */\r
-}\r
-\r
-\r
-/** \brief  Get Pending Interrupt\r
-\r
-    The function reads the pending register in the NVIC and returns the pending bit\r
-    for the specified interrupt.\r
-\r
-    \param [in]      IRQn  Interrupt number.\r
-\r
-    \return             0  Interrupt status is not pending.\r
-    \return             1  Interrupt status is pending.\r
- */\r
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)\r
-{\r
-  return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */\r
-}\r
-\r
-\r
-/** \brief  Set Pending Interrupt\r
-\r
-    The function sets the pending bit of an external interrupt.\r
-\r
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.\r
- */\r
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)\r
-{\r
-  NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */\r
-}\r
-\r
-\r
-/** \brief  Clear Pending Interrupt\r
-\r
-    The function clears the pending bit of an external interrupt.\r
-\r
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.\r
- */\r
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)\r
-{\r
-  NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */\r
-}\r
-\r
-\r
-/** \brief  Get Active Interrupt\r
-\r
-    The function reads the active register in NVIC and returns the active bit.\r
-\r
-    \param [in]      IRQn  Interrupt number.\r
-\r
-    \return             0  Interrupt status is not active.\r
-    \return             1  Interrupt status is active.\r
- */\r
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)\r
-{\r
-  return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */\r
-}\r
-\r
-\r
-/** \brief  Set Interrupt Priority\r
-\r
-    The function sets the priority of an interrupt.\r
-\r
-    \note The priority cannot be set for every core interrupt.\r
-\r
-    \param [in]      IRQn  Interrupt number.\r
-    \param [in]  priority  Priority to set.\r
- */\r
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\r
-{\r
-  if(IRQn < 0) {\r
-    SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */\r
-  else {\r
-    NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */\r
-}\r
-\r
-\r
-/** \brief  Get Interrupt Priority\r
-\r
-    The function reads the priority of an interrupt. The interrupt\r
-    number can be positive to specify an external (device specific)\r
-    interrupt, or negative to specify an internal (core) interrupt.\r
-\r
-\r
-    \param [in]   IRQn  Interrupt number.\r
-    \return             Interrupt Priority. Value is aligned automatically to the implemented\r
-                        priority bits of the microcontroller.\r
- */\r
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)\r
-{\r
-\r
-  if(IRQn < 0) {\r
-    return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for Cortex-M  system interrupts */\r
-  else {\r
-    return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)]           >> (8 - __NVIC_PRIO_BITS)));  } /* get priority for device specific interrupts  */\r
-}\r
-\r
-\r
-/** \brief  Encode Priority\r
-\r
-    The function encodes the priority for an interrupt with the given priority group,\r
-    preemptive priority value, and subpriority value.\r
-    In case of a conflict between priority grouping and available\r
-    priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.\r
-\r
-    \param [in]     PriorityGroup  Used priority group.\r
-    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).\r
-    \param [in]       SubPriority  Subpriority value (starting from 0).\r
-    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().\r
- */\r
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\r
-{\r
-  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */\r
-  uint32_t PreemptPriorityBits;\r
-  uint32_t SubPriorityBits;\r
-\r
-  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;\r
-  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;\r
-\r
-  return (\r
-           ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |\r
-           ((SubPriority     & ((1 << (SubPriorityBits    )) - 1)))\r
-         );\r
-}\r
-\r
-\r
-/** \brief  Decode Priority\r
-\r
-    The function decodes an interrupt priority value with a given priority group to\r
-    preemptive priority value and subpriority value.\r
-    In case of a conflict between priority grouping and available\r
-    priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.\r
-\r
-    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().\r
-    \param [in]     PriorityGroup  Used priority group.\r
-    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).\r
-    \param [out]     pSubPriority  Subpriority value (starting from 0).\r
- */\r
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)\r
-{\r
-  uint32_t PriorityGroupTmp = (PriorityGroup & 0x07);          /* only values 0..7 are used          */\r
-  uint32_t PreemptPriorityBits;\r
-  uint32_t SubPriorityBits;\r
-\r
-  PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;\r
-  SubPriorityBits     = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;\r
-\r
-  *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);\r
-  *pSubPriority     = (Priority                   ) & ((1 << (SubPriorityBits    )) - 1);\r
-}\r
-\r
-\r
-/** \brief  System Reset\r
-\r
-    The function initiates a system reset request to reset the MCU.\r
- */\r
-__STATIC_INLINE void NVIC_SystemReset(void)\r
-{\r
-  __DSB();                                                     /* Ensure all outstanding memory accesses included\r
-                                                                  buffered write are completed before reset */\r
-  SCB->AIRCR  = ((0x5FA << SCB_AIRCR_VECTKEY_Pos)      |\r
-                 (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\r
-                 SCB_AIRCR_SYSRESETREQ_Msk);                   /* Keep priority group unchanged */\r
-  __DSB();                                                     /* Ensure completion of memory access */\r
-  while(1);                                                    /* wait until reset */\r
-}\r
-\r
-/*@} end of CMSIS_Core_NVICFunctions */\r
-\r
-\r
-\r
-/* ##################################    SysTick function  ############################################ */\r
-/** \ingroup  CMSIS_Core_FunctionInterface\r
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions\r
-    \brief      Functions that configure the System.\r
-  @{\r
- */\r
-\r
-#if (__Vendor_SysTickConfig == 0)\r
-\r
-/** \brief  System Tick Configuration\r
-\r
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.\r
-    Counter is in free running mode to generate periodic interrupts.\r
-\r
-    \param [in]  ticks  Number of ticks between two interrupts.\r
-\r
-    \return          0  Function succeeded.\r
-    \return          1  Function failed.\r
-\r
-    \note     When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the\r
-    function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>\r
-    must contain a vendor-specific implementation of this function.\r
-\r
- */\r
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\r
-{\r
-  if ((ticks - 1) > SysTick_LOAD_RELOAD_Msk)  return (1);      /* Reload value impossible */\r
-\r
-  SysTick->LOAD  = ticks - 1;                                  /* set reload register */\r
-  NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority for Systick Interrupt */\r
-  SysTick->VAL   = 0;                                          /* Load the SysTick Counter Value */\r
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\r
-                   SysTick_CTRL_TICKINT_Msk   |\r
-                   SysTick_CTRL_ENABLE_Msk;                    /* Enable SysTick IRQ and SysTick Timer */\r
-  return (0);                                                  /* Function successful */\r
-}\r
-\r
-#endif\r
-\r
-/*@} end of CMSIS_Core_SysTickFunctions */\r
-\r
-\r
-\r
-/* ##################################### Debug In/Output function ########################################### */\r
-/** \ingroup  CMSIS_Core_FunctionInterface\r
-    \defgroup CMSIS_core_DebugFunctions ITM Functions\r
-    \brief   Functions that access the ITM debug interface.\r
-  @{\r
- */\r
-\r
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */\r
-#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */\r
-\r
-\r
-/** \brief  ITM Send Character\r
-\r
-    The function transmits a character via the ITM channel 0, and\r
-    \li Just returns when no debugger is connected that has booked the output.\r
-    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\r
-\r
-    \param [in]     ch  Character to transmit.\r
-\r
-    \returns            Character to transmit.\r
- */\r
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\r
-{\r
-  if ((ITM->TCR & ITM_TCR_ITMENA_Msk)                  &&      /* ITM enabled */\r
-      (ITM->TER & (1UL << 0)        )                    )     /* ITM Port #0 enabled */\r
-  {\r
-    while (ITM->PORT[0].u32 == 0);\r
-    ITM->PORT[0].u8 = (uint8_t) ch;\r
-  }\r
-  return (ch);\r
-}\r
-\r
-\r
-/** \brief  ITM Receive Character\r
-\r
-    The function inputs a character via the external variable \ref ITM_RxBuffer.\r
-\r
-    \return             Received character.\r
-    \return         -1  No character pending.\r
- */\r
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {\r
-  int32_t ch = -1;                           /* no character available */\r
-\r
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {\r
-    ch = ITM_RxBuffer;\r
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\r
-  }\r
-\r
-  return (ch);\r
-}\r
-\r
-\r
-/** \brief  ITM Check Character\r
-\r
-    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.\r
-\r
-    \return          0  No character available.\r
-    \return          1  Character available.\r
- */\r
-__STATIC_INLINE int32_t ITM_CheckChar (void) {\r
-\r
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {\r
-    return (0);                                 /* no character available */\r
-  } else {\r
-    return (1);                                 /*    character available */\r
-  }\r
-}\r
-\r
-/*@} end of CMSIS_core_DebugFunctions */\r
-\r
-#endif /* __CORE_CM3_H_DEPENDANT */\r
-\r
-#endif /* __CMSIS_GENERIC */\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3_psoc5.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3_psoc5.h
deleted file mode 100755 (executable)
index a7c7be7..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cm3_psoc5.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*******************************************************************************\r
-* File Name: core_cm3_psoc5.h\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   Provides important type information for the PSoC5.  This includes types\r
-*   necessary for core_cm3.h.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-\r
-#if !defined(__CORE_CM3_PSOC5_H__)\r
-#define __CORE_CM3_PSOC5_H__\r
-\r
-/** Interrupt Number Definition */\r
-typedef enum IRQn\r
-{\r
-/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/\r
-  NonMaskableInt_IRQn   = -14,              /*!< 2 Non Maskable Interrupt                         */\r
-  HardFault_IRQn        = -13,              /*!< 3 Cortex-M3 Hard Fault Interrupt                 */\r
-  MemoryManagement_IRQn = -12,              /*!< 4 Cortex-M3 Memory Management Interrupt          */\r
-  BusFault_IRQn         = -11,              /*!< 5 Cortex-M3 Bus Fault Interrupt                  */\r
-  UsageFault_IRQn       = -10,              /*!< 6 Cortex-M3 Usage Fault Interrupt                */\r
-  SVCall_IRQn           = -5,               /*!< 11 Cortex-M3 SV Call Interrupt                   */\r
-  DebugMonitor_IRQn     = -4,               /*!< 12 Cortex-M3 Debug Monitor Interrupt             */\r
-  PendSV_IRQn           = -2,               /*!< 14 Cortex-M3 Pend SV Interrupt                   */\r
-  SysTick_IRQn          = -1                /*!< 15 Cortex-M3 System Tick Interrupt               */\r
-/******  PSoC5 Peripheral Interrupt Numbers *******************************************************/\r
-  /* Not relevant.  All peripheral interrupts are defined by the user */\r
-} IRQn_Type;\r
-\r
-#include <cytypes.h>\r
-\r
-#define __CHECK_DEVICE_DEFINES\r
-\r
-#define __CM3_REV                 0x0201\r
-\r
-#define __MPU_PRESENT             0\r
-#define __NVIC_PRIO_BITS          3\r
-#define __Vendor_SysTickConfig    0\r
-\r
-#include <core_cm3.h>\r
-\r
-\r
-#endif /* __CORE_CM3_PSOC5_H__ */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmFunc.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmFunc.h
deleted file mode 100755 (executable)
index 139bc3c..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmFunc.h
+++ /dev/null
@@ -1,636 +0,0 @@
-/**************************************************************************//**\r
- * @file     core_cmFunc.h\r
- * @brief    CMSIS Cortex-M Core Function Access Header File\r
- * @version  V3.20\r
- * @date     25. February 2013\r
- *\r
- * @note\r
- *\r
- ******************************************************************************/\r
-/* Copyright (c) 2009 - 2013 ARM LIMITED\r
-\r
-   All rights reserved.\r
-   Redistribution and use in source and binary forms, with or without\r
-   modification, are permitted provided that the following conditions are met:\r
-   - Redistributions of source code must retain the above copyright\r
-     notice, this list of conditions and the following disclaimer.\r
-   - Redistributions in binary form must reproduce the above copyright\r
-     notice, this list of conditions and the following disclaimer in the\r
-     documentation and/or other materials provided with the distribution.\r
-   - Neither the name of ARM nor the names of its contributors may be used\r
-     to endorse or promote products derived from this software without\r
-     specific prior written permission.\r
-   *\r
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\r
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\r
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\r
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\r
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
-   POSSIBILITY OF SUCH DAMAGE.\r
-   ---------------------------------------------------------------------------*/\r
-\r
-\r
-#ifndef __CORE_CMFUNC_H\r
-#define __CORE_CMFUNC_H\r
-\r
-\r
-/* ###########################  Core Function Access  ########################### */\r
-/** \ingroup  CMSIS_Core_FunctionInterface\r
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions\r
-  @{\r
- */\r
-\r
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/\r
-/* ARM armcc specific functions */\r
-\r
-#if (__ARMCC_VERSION < 400677)\r
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"\r
-#endif\r
-\r
-/* intrinsic void __enable_irq();     */\r
-/* intrinsic void __disable_irq();    */\r
-\r
-/** \brief  Get Control Register\r
-\r
-    This function returns the content of the Control Register.\r
-\r
-    \return               Control Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_CONTROL(void)\r
-{\r
-  register uint32_t __regControl         __ASM("control");\r
-  return(__regControl);\r
-}\r
-\r
-\r
-/** \brief  Set Control Register\r
-\r
-    This function writes the given value to the Control Register.\r
-\r
-    \param [in]    control  Control Register value to set\r
- */\r
-__STATIC_INLINE void __set_CONTROL(uint32_t control)\r
-{\r
-  register uint32_t __regControl         __ASM("control");\r
-  __regControl = control;\r
-}\r
-\r
-\r
-/** \brief  Get IPSR Register\r
-\r
-    This function returns the content of the IPSR Register.\r
-\r
-    \return               IPSR Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_IPSR(void)\r
-{\r
-  register uint32_t __regIPSR          __ASM("ipsr");\r
-  return(__regIPSR);\r
-}\r
-\r
-\r
-/** \brief  Get APSR Register\r
-\r
-    This function returns the content of the APSR Register.\r
-\r
-    \return               APSR Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_APSR(void)\r
-{\r
-  register uint32_t __regAPSR          __ASM("apsr");\r
-  return(__regAPSR);\r
-}\r
-\r
-\r
-/** \brief  Get xPSR Register\r
-\r
-    This function returns the content of the xPSR Register.\r
-\r
-    \return               xPSR Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_xPSR(void)\r
-{\r
-  register uint32_t __regXPSR          __ASM("xpsr");\r
-  return(__regXPSR);\r
-}\r
-\r
-\r
-/** \brief  Get Process Stack Pointer\r
-\r
-    This function returns the current value of the Process Stack Pointer (PSP).\r
-\r
-    \return               PSP Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_PSP(void)\r
-{\r
-  register uint32_t __regProcessStackPointer  __ASM("psp");\r
-  return(__regProcessStackPointer);\r
-}\r
-\r
-\r
-/** \brief  Set Process Stack Pointer\r
-\r
-    This function assigns the given value to the Process Stack Pointer (PSP).\r
-\r
-    \param [in]    topOfProcStack  Process Stack Pointer value to set\r
- */\r
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)\r
-{\r
-  register uint32_t __regProcessStackPointer  __ASM("psp");\r
-  __regProcessStackPointer = topOfProcStack;\r
-}\r
-\r
-\r
-/** \brief  Get Main Stack Pointer\r
-\r
-    This function returns the current value of the Main Stack Pointer (MSP).\r
-\r
-    \return               MSP Register value\r
- */\r
-__STATIC_INLINE uint32_t __get_MSP(void)\r
-{\r
-  register uint32_t __regMainStackPointer     __ASM("msp");\r
-  return(__regMainStackPointer);\r
-}\r
-\r
-\r
-/** \brief  Set Main Stack Pointer\r
-\r
-    This function assigns the given value to the Main Stack Pointer (MSP).\r
-\r
-    \param [in]    topOfMainStack  Main Stack Pointer value to set\r
- */\r
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)\r
-{\r
-  register uint32_t __regMainStackPointer     __ASM("msp");\r
-  __regMainStackPointer = topOfMainStack;\r
-}\r
-\r
-\r
-/** \brief  Get Priority Mask\r
-\r
-    This function returns the current state of the priority mask bit from the Priority Mask Register.\r
-\r
-    \return               Priority Mask value\r
- */\r
-__STATIC_INLINE uint32_t __get_PRIMASK(void)\r
-{\r
-  register uint32_t __regPriMask         __ASM("primask");\r
-  return(__regPriMask);\r
-}\r
-\r
-\r
-/** \brief  Set Priority Mask\r
-\r
-    This function assigns the given value to the Priority Mask Register.\r
-\r
-    \param [in]    priMask  Priority Mask\r
- */\r
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)\r
-{\r
-  register uint32_t __regPriMask         __ASM("primask");\r
-  __regPriMask = (priMask);\r
-}\r
-\r
-\r
-#if       (__CORTEX_M >= 0x03)\r
-\r
-/** \brief  Enable FIQ\r
-\r
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.\r
-    Can only be executed in Privileged modes.\r
- */\r
-#define __enable_fault_irq                __enable_fiq\r
-\r
-\r
-/** \brief  Disable FIQ\r
-\r
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.\r
-    Can only be executed in Privileged modes.\r
- */\r
-#define __disable_fault_irq               __disable_fiq\r
-\r
-\r
-/** \brief  Get Base Priority\r
-\r
-    This function returns the current value of the Base Priority register.\r
-\r
-    \return               Base Priority register value\r
- */\r
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)\r
-{\r
-  register uint32_t __regBasePri         __ASM("basepri");\r
-  return(__regBasePri);\r
-}\r
-\r
-\r
-/** \brief  Set Base Priority\r
-\r
-    This function assigns the given value to the Base Priority register.\r
-\r
-    \param [in]    basePri  Base Priority value to set\r
- */\r
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)\r
-{\r
-  register uint32_t __regBasePri         __ASM("basepri");\r
-  __regBasePri = (basePri & 0xff);\r
-}\r
-\r
-\r
-/** \brief  Get Fault Mask\r
-\r
-    This function returns the current value of the Fault Mask register.\r
-\r
-    \return               Fault Mask register value\r
- */\r
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)\r
-{\r
-  register uint32_t __regFaultMask       __ASM("faultmask");\r
-  return(__regFaultMask);\r
-}\r
-\r
-\r
-/** \brief  Set Fault Mask\r
-\r
-    This function assigns the given value to the Fault Mask register.\r
-\r
-    \param [in]    faultMask  Fault Mask value to set\r
- */\r
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)\r
-{\r
-  register uint32_t __regFaultMask       __ASM("faultmask");\r
-  __regFaultMask = (faultMask & (uint32_t)1);\r
-}\r
-\r
-#endif /* (__CORTEX_M >= 0x03) */\r
-\r
-\r
-#if       (__CORTEX_M == 0x04)\r
-\r
-/** \brief  Get FPSCR\r
-\r
-    This function returns the current value of the Floating Point Status/Control register.\r
-\r
-    \return               Floating Point Status/Control register value\r
- */\r
-__STATIC_INLINE uint32_t __get_FPSCR(void)\r
-{\r
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
-  register uint32_t __regfpscr         __ASM("fpscr");\r
-  return(__regfpscr);\r
-#else\r
-   return(0);\r
-#endif\r
-}\r
-\r
-\r
-/** \brief  Set FPSCR\r
-\r
-    This function assigns the given value to the Floating Point Status/Control register.\r
-\r
-    \param [in]    fpscr  Floating Point Status/Control value to set\r
- */\r
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)\r
-{\r
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
-  register uint32_t __regfpscr         __ASM("fpscr");\r
-  __regfpscr = (fpscr);\r
-#endif\r
-}\r
-\r
-#endif /* (__CORTEX_M == 0x04) */\r
-\r
-\r
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/\r
-/* IAR iccarm specific functions */\r
-\r
-#include <cmsis_iar.h>\r
-\r
-\r
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/\r
-/* TI CCS specific functions */\r
-\r
-#include <cmsis_ccs.h>\r
-\r
-\r
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/\r
-/* GNU gcc specific functions */\r
-\r
-/** \brief  Enable IRQ Interrupts\r
-\r
-  This function enables IRQ interrupts by clearing the I-bit in the CPSR.\r
-  Can only be executed in Privileged modes.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)\r
-{\r
-  __ASM volatile ("cpsie i" : : : "memory");\r
-}\r
-\r
-\r
-/** \brief  Disable IRQ Interrupts\r
-\r
-  This function disables IRQ interrupts by setting the I-bit in the CPSR.\r
-  Can only be executed in Privileged modes.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)\r
-{\r
-  __ASM volatile ("cpsid i" : : : "memory");\r
-}\r
-\r
-\r
-/** \brief  Get Control Register\r
-\r
-    This function returns the content of the Control Register.\r
-\r
-    \return               Control Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, control" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Control Register\r
-\r
-    This function writes the given value to the Control Register.\r
-\r
-    \param [in]    control  Control Register value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)\r
-{\r
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");\r
-}\r
-\r
-\r
-/** \brief  Get IPSR Register\r
-\r
-    This function returns the content of the IPSR Register.\r
-\r
-    \return               IPSR Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Get APSR Register\r
-\r
-    This function returns the content of the APSR Register.\r
-\r
-    \return               APSR Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Get xPSR Register\r
-\r
-    This function returns the content of the xPSR Register.\r
-\r
-    \return               xPSR Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Get Process Stack Pointer\r
-\r
-    This function returns the current value of the Process Stack Pointer (PSP).\r
-\r
-    \return               PSP Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)\r
-{\r
-  register uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Process Stack Pointer\r
-\r
-    This function assigns the given value to the Process Stack Pointer (PSP).\r
-\r
-    \param [in]    topOfProcStack  Process Stack Pointer value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)\r
-{\r
-  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");\r
-}\r
-\r
-\r
-/** \brief  Get Main Stack Pointer\r
-\r
-    This function returns the current value of the Main Stack Pointer (MSP).\r
-\r
-    \return               MSP Register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)\r
-{\r
-  register uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Main Stack Pointer\r
-\r
-    This function assigns the given value to the Main Stack Pointer (MSP).\r
-\r
-    \param [in]    topOfMainStack  Main Stack Pointer value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)\r
-{\r
-  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");\r
-}\r
-\r
-\r
-/** \brief  Get Priority Mask\r
-\r
-    This function returns the current state of the priority mask bit from the Priority Mask Register.\r
-\r
-    \return               Priority Mask value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Priority Mask\r
-\r
-    This function assigns the given value to the Priority Mask Register.\r
-\r
-    \param [in]    priMask  Priority Mask\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)\r
-{\r
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");\r
-}\r
-\r
-\r
-#if       (__CORTEX_M >= 0x03)\r
-\r
-/** \brief  Enable FIQ\r
-\r
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.\r
-    Can only be executed in Privileged modes.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)\r
-{\r
-  __ASM volatile ("cpsie f" : : : "memory");\r
-}\r
-\r
-\r
-/** \brief  Disable FIQ\r
-\r
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.\r
-    Can only be executed in Privileged modes.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)\r
-{\r
-  __ASM volatile ("cpsid f" : : : "memory");\r
-}\r
-\r
-\r
-/** \brief  Get Base Priority\r
-\r
-    This function returns the current value of the Base Priority register.\r
-\r
-    \return               Base Priority register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Base Priority\r
-\r
-    This function assigns the given value to the Base Priority register.\r
-\r
-    \param [in]    basePri  Base Priority value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)\r
-{\r
-  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");\r
-}\r
-\r
-\r
-/** \brief  Get Fault Mask\r
-\r
-    This function returns the current value of the Fault Mask register.\r
-\r
-    \return               Fault Mask register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Set Fault Mask\r
-\r
-    This function assigns the given value to the Fault Mask register.\r
-\r
-    \param [in]    faultMask  Fault Mask value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)\r
-{\r
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");\r
-}\r
-\r
-#endif /* (__CORTEX_M >= 0x03) */\r
-\r
-\r
-#if       (__CORTEX_M == 0x04)\r
-\r
-/** \brief  Get FPSCR\r
-\r
-    This function returns the current value of the Floating Point Status/Control register.\r
-\r
-    \return               Floating Point Status/Control register value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)\r
-{\r
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
-  uint32_t result;\r
-\r
-  /* Empty asm statement works as a scheduling barrier */\r
-  __ASM volatile ("");\r
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );\r
-  __ASM volatile ("");\r
-  return(result);\r
-#else\r
-   return(0);\r
-#endif\r
-}\r
-\r
-\r
-/** \brief  Set FPSCR\r
-\r
-    This function assigns the given value to the Floating Point Status/Control register.\r
-\r
-    \param [in]    fpscr  Floating Point Status/Control value to set\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)\r
-{\r
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
-  /* Empty asm statement works as a scheduling barrier */\r
-  __ASM volatile ("");\r
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");\r
-  __ASM volatile ("");\r
-#endif\r
-}\r
-\r
-#endif /* (__CORTEX_M == 0x04) */\r
-\r
-\r
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/\r
-/* TASKING carm specific functions */\r
-\r
-/*\r
- * The CMSIS functions have been implemented as intrinsics in the compiler.\r
- * Please use "carm -?i" to get an up to date list of all instrinsics,\r
- * Including the CMSIS ones.\r
- */\r
-\r
-#endif\r
-\r
-/*@} end of CMSIS_Core_RegAccFunctions */\r
-\r
-\r
-#endif /* __CORE_CMFUNC_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmInstr.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmInstr.h
deleted file mode 100755 (executable)
index 0d75f40..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/core_cmInstr.h
+++ /dev/null
@@ -1,688 +0,0 @@
-/**************************************************************************//**\r
- * @file     core_cmInstr.h\r
- * @brief    CMSIS Cortex-M Core Instruction Access Header File\r
- * @version  V3.20\r
- * @date     05. March 2013\r
- *\r
- * @note\r
- *\r
- ******************************************************************************/\r
-/* Copyright (c) 2009 - 2013 ARM LIMITED\r
-\r
-   All rights reserved.\r
-   Redistribution and use in source and binary forms, with or without\r
-   modification, are permitted provided that the following conditions are met:\r
-   - Redistributions of source code must retain the above copyright\r
-     notice, this list of conditions and the following disclaimer.\r
-   - Redistributions in binary form must reproduce the above copyright\r
-     notice, this list of conditions and the following disclaimer in the\r
-     documentation and/or other materials provided with the distribution.\r
-   - Neither the name of ARM nor the names of its contributors may be used\r
-     to endorse or promote products derived from this software without\r
-     specific prior written permission.\r
-   *\r
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\r
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\r
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\r
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\r
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\r
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\r
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
-   POSSIBILITY OF SUCH DAMAGE.\r
-   ---------------------------------------------------------------------------*/\r
-\r
-\r
-#ifndef __CORE_CMINSTR_H\r
-#define __CORE_CMINSTR_H\r
-\r
-\r
-/* ##########################  Core Instruction Access  ######################### */\r
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface\r
-  Access to dedicated instructions\r
-  @{\r
-*/\r
-\r
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/\r
-/* ARM armcc specific functions */\r
-\r
-#if (__ARMCC_VERSION < 400677)\r
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"\r
-#endif\r
-\r
-\r
-/** \brief  No Operation\r
-\r
-    No Operation does nothing. This instruction can be used for code alignment purposes.\r
- */\r
-#define __NOP                             __nop\r
-\r
-\r
-/** \brief  Wait For Interrupt\r
-\r
-    Wait For Interrupt is a hint instruction that suspends execution\r
-    until one of a number of events occurs.\r
- */\r
-#define __WFI                             __wfi\r
-\r
-\r
-/** \brief  Wait For Event\r
-\r
-    Wait For Event is a hint instruction that permits the processor to enter\r
-    a low-power state until one of a number of events occurs.\r
- */\r
-#define __WFE                             __wfe\r
-\r
-\r
-/** \brief  Send Event\r
-\r
-    Send Event is a hint instruction. It causes an event to be signaled to the CPU.\r
- */\r
-#define __SEV                             __sev\r
-\r
-\r
-/** \brief  Instruction Synchronization Barrier\r
-\r
-    Instruction Synchronization Barrier flushes the pipeline in the processor,\r
-    so that all instructions following the ISB are fetched from cache or\r
-    memory, after the instruction has been completed.\r
- */\r
-#define __ISB()                           __isb(0xF)\r
-\r
-\r
-/** \brief  Data Synchronization Barrier\r
-\r
-    This function acts as a special kind of Data Memory Barrier.\r
-    It completes when all explicit memory accesses before this instruction complete.\r
- */\r
-#define __DSB()                           __dsb(0xF)\r
-\r
-\r
-/** \brief  Data Memory Barrier\r
-\r
-    This function ensures the apparent order of the explicit memory operations before\r
-    and after the instruction, without ensuring their completion.\r
- */\r
-#define __DMB()                           __dmb(0xF)\r
-\r
-\r
-/** \brief  Reverse byte order (32 bit)\r
-\r
-    This function reverses the byte order in integer value.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-#define __REV                             __rev\r
-\r
-\r
-/** \brief  Reverse byte order (16 bit)\r
-\r
-    This function reverses the byte order in two unsigned short values.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-#ifndef __NO_EMBEDDED_ASM\r
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)\r
-{\r
-  rev16 r0, r0\r
-  bx lr\r
-}\r
-#endif\r
-\r
-/** \brief  Reverse byte order in signed short value\r
-\r
-    This function reverses the byte order in a signed short value with sign extension to integer.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-#ifndef __NO_EMBEDDED_ASM\r
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)\r
-{\r
-  revsh r0, r0\r
-  bx lr\r
-}\r
-#endif\r
-\r
-\r
-/** \brief  Rotate Right in unsigned value (32 bit)\r
-\r
-    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\r
-\r
-    \param [in]    value  Value to rotate\r
-    \param [in]    value  Number of Bits to rotate\r
-    \return               Rotated value\r
- */\r
-#define __ROR                             __ror\r
-\r
-\r
-/** \brief  Breakpoint\r
-\r
-    This function causes the processor to enter Debug state.\r
-    Debug tools can use this to investigate system state when the instruction at a particular address is reached.\r
-\r
-    \param [in]    value  is ignored by the processor.\r
-                   If required, a debugger can use it to store additional information about the breakpoint.\r
- */\r
-#define __BKPT(value)                       __breakpoint(value)\r
-\r
-\r
-#if       (__CORTEX_M >= 0x03)\r
-\r
-/** \brief  Reverse bit order of value\r
-\r
-    This function reverses the bit order of the given value.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-#define __RBIT                            __rbit\r
-\r
-\r
-/** \brief  LDR Exclusive (8 bit)\r
-\r
-    This function performs a exclusive LDR command for 8 bit value.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return             value of type uint8_t at (*ptr)\r
- */\r
-#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))\r
-\r
-\r
-/** \brief  LDR Exclusive (16 bit)\r
-\r
-    This function performs a exclusive LDR command for 16 bit values.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return        value of type uint16_t at (*ptr)\r
- */\r
-#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))\r
-\r
-\r
-/** \brief  LDR Exclusive (32 bit)\r
-\r
-    This function performs a exclusive LDR command for 32 bit values.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return        value of type uint32_t at (*ptr)\r
- */\r
-#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))\r
-\r
-\r
-/** \brief  STR Exclusive (8 bit)\r
-\r
-    This function performs a exclusive STR command for 8 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-#define __STREXB(value, ptr)              __strex(value, ptr)\r
-\r
-\r
-/** \brief  STR Exclusive (16 bit)\r
-\r
-    This function performs a exclusive STR command for 16 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-#define __STREXH(value, ptr)              __strex(value, ptr)\r
-\r
-\r
-/** \brief  STR Exclusive (32 bit)\r
-\r
-    This function performs a exclusive STR command for 32 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-#define __STREXW(value, ptr)              __strex(value, ptr)\r
-\r
-\r
-/** \brief  Remove the exclusive lock\r
-\r
-    This function removes the exclusive lock which is created by LDREX.\r
-\r
- */\r
-#define __CLREX                           __clrex\r
-\r
-\r
-/** \brief  Signed Saturate\r
-\r
-    This function saturates a signed value.\r
-\r
-    \param [in]  value  Value to be saturated\r
-    \param [in]    sat  Bit position to saturate to (1..32)\r
-    \return             Saturated value\r
- */\r
-#define __SSAT                            __ssat\r
-\r
-\r
-/** \brief  Unsigned Saturate\r
-\r
-    This function saturates an unsigned value.\r
-\r
-    \param [in]  value  Value to be saturated\r
-    \param [in]    sat  Bit position to saturate to (0..31)\r
-    \return             Saturated value\r
- */\r
-#define __USAT                            __usat\r
-\r
-\r
-/** \brief  Count leading zeros\r
-\r
-    This function counts the number of leading zeros of a data value.\r
-\r
-    \param [in]  value  Value to count the leading zeros\r
-    \return             number of leading zeros in value\r
- */\r
-#define __CLZ                             __clz\r
-\r
-#endif /* (__CORTEX_M >= 0x03) */\r
-\r
-\r
-\r
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/\r
-/* IAR iccarm specific functions */\r
-\r
-#include <cmsis_iar.h>\r
-\r
-\r
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/\r
-/* TI CCS specific functions */\r
-\r
-#include <cmsis_ccs.h>\r
-\r
-\r
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/\r
-/* GNU gcc specific functions */\r
-\r
-/* Define macros for porting to both thumb1 and thumb2.\r
- * For thumb1, use low register (r0-r7), specified by constrant "l"\r
- * Otherwise, use general registers, specified by constrant "r" */\r
-#if defined (__thumb__) && !defined (__thumb2__)\r
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)\r
-#define __CMSIS_GCC_USE_REG(r) "l" (r)\r
-#else\r
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)\r
-#define __CMSIS_GCC_USE_REG(r) "r" (r)\r
-#endif\r
-\r
-/** \brief  No Operation\r
-\r
-    No Operation does nothing. This instruction can be used for code alignment purposes.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)\r
-{\r
-  __ASM volatile ("nop");\r
-}\r
-\r
-\r
-/** \brief  Wait For Interrupt\r
-\r
-    Wait For Interrupt is a hint instruction that suspends execution\r
-    until one of a number of events occurs.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)\r
-{\r
-  __ASM volatile ("wfi");\r
-}\r
-\r
-\r
-/** \brief  Wait For Event\r
-\r
-    Wait For Event is a hint instruction that permits the processor to enter\r
-    a low-power state until one of a number of events occurs.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)\r
-{\r
-  __ASM volatile ("wfe");\r
-}\r
-\r
-\r
-/** \brief  Send Event\r
-\r
-    Send Event is a hint instruction. It causes an event to be signaled to the CPU.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)\r
-{\r
-  __ASM volatile ("sev");\r
-}\r
-\r
-\r
-/** \brief  Instruction Synchronization Barrier\r
-\r
-    Instruction Synchronization Barrier flushes the pipeline in the processor,\r
-    so that all instructions following the ISB are fetched from cache or\r
-    memory, after the instruction has been completed.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)\r
-{\r
-  __ASM volatile ("isb");\r
-}\r
-\r
-\r
-/** \brief  Data Synchronization Barrier\r
-\r
-    This function acts as a special kind of Data Memory Barrier.\r
-    It completes when all explicit memory accesses before this instruction complete.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)\r
-{\r
-  __ASM volatile ("dsb");\r
-}\r
-\r
-\r
-/** \brief  Data Memory Barrier\r
-\r
-    This function ensures the apparent order of the explicit memory operations before\r
-    and after the instruction, without ensuring their completion.\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)\r
-{\r
-  __ASM volatile ("dmb");\r
-}\r
-\r
-\r
-/** \brief  Reverse byte order (32 bit)\r
-\r
-    This function reverses the byte order in integer value.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)\r
-{\r
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)\r
-  return __builtin_bswap32(value);\r
-#else\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\r
-  return(result);\r
-#endif\r
-}\r
-\r
-\r
-/** \brief  Reverse byte order (16 bit)\r
-\r
-    This function reverses the byte order in two unsigned short values.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)\r
-{\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\r
-  return(result);\r
-}\r
-\r
-\r
-/** \brief  Reverse byte order in signed short value\r
-\r
-    This function reverses the byte order in a signed short value with sign extension to integer.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)\r
-{\r
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\r
-  return (short)__builtin_bswap16(value);\r
-#else\r
-  uint32_t result;\r
-\r
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\r
-  return(result);\r
-#endif\r
-}\r
-\r
-\r
-/** \brief  Rotate Right in unsigned value (32 bit)\r
-\r
-    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\r
-\r
-    \param [in]    value  Value to rotate\r
-    \param [in]    value  Number of Bits to rotate\r
-    \return               Rotated value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)\r
-{\r
-  return (op1 >> op2) | (op1 << (32 - op2));\r
-}\r
-\r
-\r
-/** \brief  Breakpoint\r
-\r
-    This function causes the processor to enter Debug state.\r
-    Debug tools can use this to investigate system state when the instruction at a particular address is reached.\r
-\r
-    \param [in]    value  is ignored by the processor.\r
-                   If required, a debugger can use it to store additional information about the breakpoint.\r
- */\r
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)\r
-\r
-\r
-#if       (__CORTEX_M >= 0x03)\r
-\r
-/** \brief  Reverse bit order of value\r
-\r
-    This function reverses the bit order of the given value.\r
-\r
-    \param [in]    value  Value to reverse\r
-    \return               Reversed value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)\r
-{\r
-  uint32_t result;\r
-\r
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  LDR Exclusive (8 bit)\r
-\r
-    This function performs a exclusive LDR command for 8 bit value.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return             value of type uint8_t at (*ptr)\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)\r
-{\r
-    uint32_t result;\r
-\r
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\r
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );\r
-#else\r
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not\r
-       accepted by assembler. So has to use following less efficient pattern.\r
-    */\r
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );\r
-#endif\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  LDR Exclusive (16 bit)\r
-\r
-    This function performs a exclusive LDR command for 16 bit values.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return        value of type uint16_t at (*ptr)\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)\r
-{\r
-    uint32_t result;\r
-\r
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\r
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );\r
-#else\r
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not\r
-       accepted by assembler. So has to use following less efficient pattern.\r
-    */\r
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );\r
-#endif\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  LDR Exclusive (32 bit)\r
-\r
-    This function performs a exclusive LDR command for 32 bit values.\r
-\r
-    \param [in]    ptr  Pointer to data\r
-    \return        value of type uint32_t at (*ptr)\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)\r
-{\r
-    uint32_t result;\r
-\r
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  STR Exclusive (8 bit)\r
-\r
-    This function performs a exclusive STR command for 8 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)\r
-{\r
-   uint32_t result;\r
-\r
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  STR Exclusive (16 bit)\r
-\r
-    This function performs a exclusive STR command for 16 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)\r
-{\r
-   uint32_t result;\r
-\r
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  STR Exclusive (32 bit)\r
-\r
-    This function performs a exclusive STR command for 32 bit values.\r
-\r
-    \param [in]  value  Value to store\r
-    \param [in]    ptr  Pointer to location\r
-    \return          0  Function succeeded\r
-    \return          1  Function failed\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)\r
-{\r
-   uint32_t result;\r
-\r
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );\r
-   return(result);\r
-}\r
-\r
-\r
-/** \brief  Remove the exclusive lock\r
-\r
-    This function removes the exclusive lock which is created by LDREX.\r
-\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)\r
-{\r
-  __ASM volatile ("clrex" ::: "memory");\r
-}\r
-\r
-\r
-/** \brief  Signed Saturate\r
-\r
-    This function saturates a signed value.\r
-\r
-    \param [in]  value  Value to be saturated\r
-    \param [in]    sat  Bit position to saturate to (1..32)\r
-    \return             Saturated value\r
- */\r
-#define __SSAT(ARG1,ARG2) \\r
-({                          \\r
-  uint32_t __RES, __ARG1 = (ARG1); \\r
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \\r
-  __RES; \\r
- })\r
-\r
-\r
-/** \brief  Unsigned Saturate\r
-\r
-    This function saturates an unsigned value.\r
-\r
-    \param [in]  value  Value to be saturated\r
-    \param [in]    sat  Bit position to saturate to (0..31)\r
-    \return             Saturated value\r
- */\r
-#define __USAT(ARG1,ARG2) \\r
-({                          \\r
-  uint32_t __RES, __ARG1 = (ARG1); \\r
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \\r
-  __RES; \\r
- })\r
-\r
-\r
-/** \brief  Count leading zeros\r
-\r
-    This function counts the number of leading zeros of a data value.\r
-\r
-    \param [in]  value  Value to count the leading zeros\r
-    \return             number of leading zeros in value\r
- */\r
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)\r
-{\r
-   uint32_t result;\r
-\r
-  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );\r
-  return(result);\r
-}\r
-\r
-#endif /* (__CORTEX_M >= 0x03) */\r
-\r
-\r
-\r
-\r
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/\r
-/* TASKING carm specific functions */\r
-\r
-/*\r
- * The CMSIS functions have been implemented as intrinsics in the compiler.\r
- * Please use "carm -?i" to get an up to date list of all intrinsics,\r
- * Including the CMSIS ones.\r
- */\r
-\r
-#endif\r
-\r
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */\r
-\r
-#endif /* __CORE_CMINSTR_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.c
deleted file mode 100755 (executable)
index 01f0794..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.c
+++ /dev/null
@@ -1,1819 +0,0 @@
-/*******************************************************************************\r
-* File Name: cyPm.c\r
-* Version 4.0\r
-*\r
-* Description:\r
-*  Provides an API for the power management.\r
-*\r
-* Note:\r
-*  Documentation of the API's in this file is located in the\r
-*  System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cyPm.h"\r
-\r
-\r
-/*******************************************************************\r
-* Place your includes, defines and code here. Do not use merge\r
-* region below unless any component datasheet suggest to do so.\r
-*******************************************************************/\r
-/* `#START CY_PM_HEADER_INCLUDE` */\r
-\r
-/* `#END` */\r
-\r
-\r
-static CY_PM_BACKUP_STRUCT          cyPmBackup;\r
-static CY_PM_CLOCK_BACKUP_STRUCT    cyPmClockBackup;\r
-\r
-/* Convertion table between register's values and frequency in MHz  */\r
-static const uint8 CYCODE cyPmImoFreqReg2Mhz[7u] = {12u, 6u, 24u, 3u, 48u, 62u, 74u};\r
-\r
-/* Function Prototypes */\r
-static void CyPmHibSaveSet(void);\r
-static void CyPmHibRestore(void) ;\r
-\r
-static void CyPmHibSlpSaveSet(void) ;\r
-static void CyPmHibSlpRestore(void) ;\r
-\r
-static void CyPmHviLviSaveDisable(void) ;\r
-static void CyPmHviLviRestore(void) ;\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmSaveClocks\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This function is called in preparation for entering sleep or hibernate low\r
-*  power modes. Saves all state of the clocking system that does not persist\r
-*  during sleep/hibernate or that needs to be altered in preparation for\r
-*  sleep/hibernate. Shutdowns all the digital and analog clock dividers for the\r
-*  active power mode configuration.\r
-*\r
-*  Switches the master clock over to the IMO and shuts down the PLL and MHz\r
-*  Crystal. The IMO frequency is set to either 12 MHz or 48 MHz to match the\r
-*  Design-Wide Resources System Editor "Enable Fast IMO During Startup" setting.\r
-*  The ILO and 32 KHz oscillators are not impacted. The current Flash wait state\r
-*  setting is saved and the Flash wait state setting is set for the current IMO\r
-*  speed.\r
-*\r
-*  Note If the Master Clock source is routed through the DSI inputs, then it\r
-*  must be set manually to another source before using the\r
-*  CyPmSaveClocks()/CyPmRestoreClocks() functions.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  All peripheral clocks are going to be off after this API method call.\r
-*\r
-*******************************************************************************/\r
-void CyPmSaveClocks(void) \r
-{\r
-    /* Digital and analog clocks - save enable state and disable them all */\r
-    cyPmClockBackup.enClkA = CY_PM_ACT_CFG1_REG & CY_PM_ACT_EN_CLK_A_MASK;\r
-    cyPmClockBackup.enClkD = CY_PM_ACT_CFG2_REG;\r
-    CY_PM_ACT_CFG1_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_A_MASK));\r
-    CY_PM_ACT_CFG2_REG &= ((uint8)(~CY_PM_ACT_EN_CLK_D_MASK));\r
-\r
-    /* Save current flash wait cycles and set the maximum value */\r
-    cyPmClockBackup.flashWaitCycles = CY_PM_CACHE_CR_CYCLES_MASK & CY_PM_CACHE_CR_REG;\r
-    CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
-\r
-    /* IMO - save current IMO MHz OSC frequency and USB mode is on bit */\r
-    cyPmClockBackup.imoFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
-    cyPmClockBackup.imoUsbClk = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_USB;\r
-\r
-    /* IMO doubler - save enable state */\r
-    if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
-    {\r
-        /* IMO doubler enabled - save and disable */\r
-        cyPmClockBackup.imo2x = CY_PM_ENABLED;\r
-    }\r
-    else\r
-    {\r
-        /* IMO doubler disabled */\r
-        cyPmClockBackup.imo2x = CY_PM_DISABLED;\r
-    }\r
-\r
-    /* IMO - set appropriate frequency for LPM */\r
-    CyIMO_SetFreq(CY_PM_IMO_FREQ_LPM);\r
-\r
-    /* IMO - save enable state and enable without wait to settle */\r
-    if(0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG))\r
-    {\r
-        /* IMO - save enabled state */\r
-        cyPmClockBackup.imoEnable = CY_PM_ENABLED;\r
-    }\r
-    else\r
-    {\r
-        /* IMO - save disabled state */\r
-        cyPmClockBackup.imoEnable = CY_PM_DISABLED;\r
-\r
-        /* IMO - enable */\r
-        CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
-    }\r
-\r
-    /* IMO - save the current IMOCLK source and set to IMO if not yet */\r
-    if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_XCLKEN))\r
-    {\r
-        /* DSI or XTAL CLK */\r
-        cyPmClockBackup.imoClkSrc =\r
-            (0u == (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO2X_SRC)) ? CY_IMO_SOURCE_DSI : CY_IMO_SOURCE_XTAL;\r
-\r
-        /* IMO -  set IMOCLK source to MHz OSC */\r
-        CyIMO_SetSource(CY_IMO_SOURCE_IMO);\r
-    }\r
-    else\r
-    {\r
-        /* IMO */\r
-        cyPmClockBackup.imoClkSrc = CY_IMO_SOURCE_IMO;\r
-    }\r
-\r
-    /* Save clk_imo source */\r
-    cyPmClockBackup.clkImoSrc = CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK;\r
-\r
-    /* If IMOCLK2X or SPC OSC is source for clk_imo, set it to IMOCLK */\r
-    if(CY_PM_CLKDIST_IMO_OUT_IMO != cyPmClockBackup.clkImoSrc)\r
-    {\r
-        /* Set IMOCLK to source for clk_imo */\r
-        CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
-                                CY_PM_CLKDIST_IMO_OUT_IMO;\r
-    }    /* Need to change nothing if IMOCLK is source clk_imo */\r
-\r
-    /* IMO doubler - disable it (saved above) */\r
-    if(0u != (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_F2XON))\r
-    {\r
-        CyIMO_DisableDoubler();\r
-    }\r
-\r
-    /* Master clock - save divider and set it to divide-by-one (if no yet) */\r
-    cyPmClockBackup.clkSyncDiv = CY_PM_CLKDIST_MSTR0_REG;\r
-    if(CY_PM_DIV_BY_ONE != cyPmClockBackup.clkSyncDiv)\r
-    {\r
-        CyMasterClk_SetDivider(CY_PM_DIV_BY_ONE);\r
-    }    /* Need to change nothing if master clock divider is 1 */\r
-\r
-    /* Master clock - save current source */\r
-    cyPmClockBackup.masterClkSrc = CY_PM_CLKDIST_MSTR1_REG & CY_PM_MASTER_CLK_SRC_MASK;\r
-\r
-    /* Master clock source - set it to IMO if not yet. */\r
-    if(CY_MASTER_SOURCE_IMO != cyPmClockBackup.masterClkSrc)\r
-    {\r
-        CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);\r
-    }    /* Need to change nothing if master clock source is IMO */\r
-\r
-    /* Bus clock - save divider and set it, if needed, to divide-by-one */\r
-    cyPmClockBackup.clkBusDiv = (uint16) ((uint16) CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
-    cyPmClockBackup.clkBusDiv |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
-    if(CY_PM_BUS_CLK_DIV_BY_ONE != cyPmClockBackup.clkBusDiv)\r
-    {\r
-        CyBusClk_SetDivider(CY_PM_BUS_CLK_DIV_BY_ONE);\r
-    }    /* Do nothing if saved and actual values are equal */\r
-\r
-    /* Set number of wait cycles for the flash according CPU frequency in MHz */\r
-    CyFlash_SetWaitCycles((uint8)CY_PM_GET_CPU_FREQ_MHZ);\r
-\r
-    /* PLL - check enable state, disable if needed */\r
-    if(0u != (CY_PM_FASTCLK_PLL_CFG0_REG & CY_PM_PLL_CFG0_ENABLE))\r
-    {\r
-        /* PLL is enabled - save state and disable */\r
-        cyPmClockBackup.pllEnableState = CY_PM_ENABLED;\r
-        CyPLL_OUT_Stop();\r
-    }\r
-    else\r
-    {\r
-        /* PLL is disabled - save state */\r
-        cyPmClockBackup.pllEnableState = CY_PM_DISABLED;\r
-    }\r
-\r
-    /* MHz ECO - check enable state and disable if needed */\r
-    if(0u != (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_ENABLE))\r
-    {\r
-        /* MHz ECO is enabled - save state and disable */\r
-        cyPmClockBackup.xmhzEnableState = CY_PM_ENABLED;\r
-        CyXTAL_Stop();\r
-    }\r
-    else\r
-    {\r
-        /* MHz ECO is disabled - save state */\r
-        cyPmClockBackup.xmhzEnableState = CY_PM_DISABLED;\r
-    }\r
-\r
-\r
-    /***************************************************************************\r
-    * Save enable state of delay between the system bus clock and each of the\r
-    * 4 individual analog clocks. This bit non-retention and it's value should\r
-    * be restored on wakeup.\r
-    ***************************************************************************/\r
-    if(0u != (CY_PM_CLKDIST_DELAY_REG & CY_PM_CLKDIST_DELAY_EN))\r
-    {\r
-        cyPmClockBackup.clkDistDelay = CY_PM_ENABLED;\r
-    }\r
-    else\r
-    {\r
-        cyPmClockBackup.clkDistDelay = CY_PM_DISABLED;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmRestoreClocks\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Restores any state that was preserved by the last call to CyPmSaveClocks().\r
-*  The Flash wait state setting is also restored.\r
-*\r
-*  Note If the Master Clock source is routed through the DSI inputs, then it\r
-*  must be set manually to another source before using the\r
-*  CyPmSaveClocks()/CyPmRestoreClocks() functions.\r
-*\r
-*  PSoC 3 and PSoC 5LP:\r
-*  The merge region could be used to process state when the megahertz crystal is\r
-*  not ready after the hold-off timeout.\r
-*\r
-*  PSoC 5:\r
-*  The 130 ms is given for the megahertz crystal to stabilize. It's readiness is\r
-*  not verified after the hold-off timeout.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyPmRestoreClocks(void) \r
-{\r
-    cystatus status = CYRET_TIMEOUT;\r
-    uint16 i;\r
-    uint16 clkBusDivTmp;\r
-\r
-\r
-    /* Convertion table between CyIMO_SetFreq() parameters and register's value */\r
-    const uint8 CYCODE cyPmImoFreqMhz2Reg[7u] = {\r
-        CY_IMO_FREQ_12MHZ, CY_IMO_FREQ_6MHZ,  CY_IMO_FREQ_24MHZ, CY_IMO_FREQ_3MHZ,\r
-        CY_IMO_FREQ_48MHZ, 5u, 6u};\r
-\r
-    /* Restore enable state of delay between the system bus clock and ACLKs. */\r
-    if(CY_PM_ENABLED == cyPmClockBackup.clkDistDelay)\r
-    {\r
-        /* Delay for both the bandgap and the delay line to settle out */\r
-        CyDelayCycles((uint32)(CY_PM_CLK_DELAY_BANDGAP_SETTLE_US + CY_PM_CLK_DELAY_BIAS_SETTLE_US) *\r
-                        CY_PM_GET_CPU_FREQ_MHZ);\r
-\r
-        CY_PM_CLKDIST_DELAY_REG |= CY_PM_CLKDIST_DELAY_EN;\r
-    }\r
-\r
-    /* MHz ECO restore state */\r
-    if(CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState)\r
-    {\r
-        /***********************************************************************\r
-        * Enabling XMHZ XTAL. The actual CyXTAL_Start() with non zero wait\r
-        * period uses FTW for period measurement. This could cause a problem\r
-        * if CTW/FTW is used as a wake up time in the low power modes APIs.\r
-        * So, the XTAL wait procedure is implemented with a software delay.\r
-        ***********************************************************************/\r
-\r
-        /* Enable XMHZ XTAL with no wait */\r
-        (void) CyXTAL_Start(CY_PM_XTAL_MHZ_NO_WAIT);\r
-\r
-        /* Read XERR bit to clear it */\r
-        (void) CY_PM_FASTCLK_XMHZ_CSR_REG;\r
-\r
-        /* Wait */\r
-        for(i = CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US; i > 0u; i--)\r
-        {\r
-            /* Make a 200 microseconds delay */\r
-            CyDelayCycles((uint32)CY_PM_WAIT_200_US * CY_PM_GET_CPU_FREQ_MHZ);\r
-\r
-            /* High output indicates oscillator failure */\r
-            if(0u == (CY_PM_FASTCLK_XMHZ_CSR_REG & CY_PM_XMHZ_CSR_XERR))\r
-            {\r
-                status = CYRET_SUCCESS;\r
-                break;\r
-            }\r
-        }\r
-\r
-        if(CYRET_TIMEOUT == status)\r
-        {\r
-            /*******************************************************************\r
-            * Process the situation when megahertz crystal is not ready.\r
-            * Time to stabialize value is crystal specific.\r
-            *******************************************************************/\r
-           /* `#START_MHZ_ECO_TIMEOUT` */\r
-\r
-           /* `#END` */\r
-        }\r
-    }   /* (CY_PM_ENABLED == cyPmClockBackup.xmhzEnableState) */\r
-\r
-\r
-    /* Temprorary set the maximum flash wait cycles */\r
-    CyFlash_SetWaitCycles(CY_PM_MAX_FLASH_WAIT_CYCLES);\r
-\r
-    /* The XTAL and DSI clocks are ready to be source for Master clock. */\r
-    if((CY_PM_MASTER_CLK_SRC_XTAL == cyPmClockBackup.masterClkSrc) ||\r
-       (CY_PM_MASTER_CLK_SRC_DSI  == cyPmClockBackup.masterClkSrc))\r
-    {\r
-        /* Restore Master clock's divider */\r
-        if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
-        {\r
-            /* Restore Master clock divider */\r
-            CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
-        }\r
-\r
-        /* Restore Master clock source */\r
-        CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
-    }\r
-\r
-    /* IMO - restore IMO frequency */\r
-    if((0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB)) &&\r
-        (CY_IMO_FREQ_24MHZ == cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]))\r
-    {\r
-        /* Restore IMO frequency (24 MHz) and trim it for USB */\r
-        CyIMO_SetFreq(CY_IMO_FREQ_USB);\r
-    }\r
-    else\r
-    {\r
-        /* Restore IMO frequency */\r
-        CyIMO_SetFreq(cyPmImoFreqMhz2Reg[cyPmClockBackup.imoFreq]);\r
-\r
-        if(0u != (cyPmClockBackup.imoUsbClk & CY_PM_FASTCLK_IMO_CR_USB))\r
-        {\r
-            CY_PM_FASTCLK_IMO_CR_REG |= CY_PM_FASTCLK_IMO_CR_USB;\r
-        }\r
-        else\r
-        {\r
-            CY_PM_FASTCLK_IMO_CR_REG &= ((uint8)(~CY_PM_FASTCLK_IMO_CR_USB));\r
-        }\r
-    }\r
-\r
-    /* IMO - restore enable state if needed */\r
-    if((CY_PM_ENABLED == cyPmClockBackup.imoEnable) &&\r
-       (0u == (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
-    {\r
-        /* IMO - restore enabled state */\r
-        CyIMO_Start(CY_PM_IMO_NO_WAIT_TO_SETTLE);\r
-    }\r
-\r
-    /* IMO - restore disable state if needed */\r
-    if((CY_PM_DISABLED == cyPmClockBackup.imoEnable) &&\r
-       (0u != (CY_PM_ACT_CFG0_IMO & CY_PM_ACT_CFG0_REG)))\r
-    {\r
-        CyIMO_Stop();\r
-    }\r
-\r
-    /* IMO - restore IMOCLK source */\r
-    CyIMO_SetSource(cyPmClockBackup.imoClkSrc);\r
-\r
-    /* Restore IMO doubler enable state (turned off by CyPmSaveClocks()) */\r
-    if(CY_PM_ENABLED == cyPmClockBackup.imo2x)\r
-    {\r
-        CyIMO_EnableDoubler();\r
-    }\r
-\r
-    /* IMO - restore clk_imo source, if needed */\r
-    if(cyPmClockBackup.clkImoSrc != (CY_PM_CLKDIST_CR_REG & CY_PM_CLKDIST_IMO_OUT_MASK))\r
-    {\r
-        CY_PM_CLKDIST_CR_REG = (CY_PM_CLKDIST_CR_REG & ((uint8)(~CY_PM_CLKDIST_IMO_OUT_MASK))) |\r
-                                cyPmClockBackup.clkImoSrc;\r
-    }\r
-\r
-    /* PLL restore state */\r
-    if(CY_PM_ENABLED == cyPmClockBackup.pllEnableState)\r
-    {\r
-        /***********************************************************************\r
-        * Enable PLL. The actual CyPLL_OUT_Start() without wait period uses FTW\r
-        * for period measurement. This could cause a problem if CTW/FTW is used\r
-        * as a wakeup time in the low power modes APIs. To omit this issue PLL\r
-        * wait procedure is implemented with a software delay.\r
-        ***********************************************************************/\r
-\r
-        /* Enable PLL */\r
-        (void) CyPLL_OUT_Start(CY_PM_PLL_OUT_NO_WAIT);\r
-\r
-        /* Make a 250 us delay */\r
-        CyDelayCycles((uint32)CY_PM_WAIT_250_US * CY_PM_GET_CPU_FREQ_MHZ);\r
-    }   /* (CY_PM_ENABLED == cyPmClockBackup.pllEnableState) */\r
-\r
-\r
-    /* PLL and IMO is ready to be source for Master clock */\r
-    if((CY_PM_MASTER_CLK_SRC_IMO == cyPmClockBackup.masterClkSrc) ||\r
-       (CY_PM_MASTER_CLK_SRC_PLL == cyPmClockBackup.masterClkSrc))\r
-    {\r
-        /* Restore Master clock divider */\r
-        if(CY_PM_CLKDIST_MSTR0_REG != cyPmClockBackup.clkSyncDiv)\r
-        {\r
-            CyMasterClk_SetDivider(cyPmClockBackup.clkSyncDiv);\r
-        }\r
-\r
-        /* Restore Master clock source */\r
-        CyMasterClk_SetSource(cyPmClockBackup.masterClkSrc);\r
-    }\r
-\r
-    /* Bus clock - restore divider, if needed */\r
-    clkBusDivTmp = (uint16) ((uint16)CY_PM_CLK_BUS_MSB_DIV_REG << 8u);\r
-    clkBusDivTmp |= CY_PM_CLK_BUS_LSB_DIV_REG;\r
-    if(cyPmClockBackup.clkBusDiv != clkBusDivTmp)\r
-    {\r
-        CyBusClk_SetDivider(cyPmClockBackup.clkBusDiv);\r
-    }\r
-\r
-    /* Restore flash wait cycles */\r
-    CY_PM_CACHE_CR_REG = ((CY_PM_CACHE_CR_REG & ((uint8)(~CY_PM_CACHE_CR_CYCLES_MASK))) |\r
-                           cyPmClockBackup.flashWaitCycles);\r
-\r
-    /* Digital and analog clocks - restore state */\r
-    CY_PM_ACT_CFG1_REG = cyPmClockBackup.enClkA;\r
-    CY_PM_ACT_CFG2_REG = cyPmClockBackup.enClkD;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmAltAct\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Puts the part into the Alternate Active (Standby) state. The Alternate Active\r
-*  state can allow for any of the capabilities of the device to be active, but\r
-*  the operation of this function is dependent on the CPU being disabled during\r
-*  the Alternate Active state. The configuration code and the component APIs\r
-*  will configure the template for the Alternate Active state to be the same as\r
-*  the Active state with the exception that the CPU will be disabled during\r
-*  Alternate Active.\r
-*\r
-*  Note Before calling this function, you must manually configure the power mode\r
-*  of the source clocks for the timer that is used as the wakeup timer.\r
-*\r
-*  PSoC 3:\r
-*  Before switching to Alternate Active, if a wakeupTime other than NONE is\r
-*  specified, then the appropriate timer state is configured as specified with\r
-*  the interrupt for that timer disabled.  The wakeup source will be the\r
-*  combination of the values specified in the wakeupSource and any timer\r
-*  specified in the wakeupTime argument.  Once the wakeup condition is\r
-*  satisfied, then all saved state is restored and the function returns in the\r
-*  Active state.\r
-*\r
-*  Note that if the wakeupTime is made with a different value, the period before\r
-*  the wakeup occurs can be significantly shorter than the specified time.  If\r
-*  the next call is made with the same wakeupTime value, then the wakeup will\r
-*  occur the specified period after the previous wakeup occurred.\r
-*\r
-*  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
-*  specified timer will be left as specified by wakeupTime with the timer\r
-*  enabled and the interrupt disabled.  If the CTW, FTW or One PPS is already\r
-*  configured for wakeup, for example with the SleepTimer or RTC components,\r
-*  then specify NONE for the wakeupTime and include the appropriate source for\r
-*  wakeupSource.\r
-*\r
-*  PSoC 5LP:\r
-*  This function is used to both enter the Alternate Active mode and halt the\r
-*  processor.  For PSoC 3 these two actions must be paired together.  With PSoC\r
-*  5LP the processor can be halted independently with the __WFI() function from\r
-*  the CMSIS library that is included in Creator.  This function should be used\r
-*  instead when the action required is just to halt the processor until an\r
-*  enabled interrupt occurs.\r
-*\r
-*  The wakeupTime parameter is not used for this device. It must be set to zero\r
-*  (PM_ALT_ACT_TIME_NONE). The wake up time configuration can be done by a\r
-*  separate component: the CTW wakeup interval should be configured with the\r
-*  Sleep Timer component and one second interval should be configured with the\r
-*  RTC component.\r
-*\r
-*  The wakeup behavior depends on wakeupSource parameter in the following\r
-*  manner: upon function execution the device will be switched from Active to\r
-*  Alternate Active mode and then the CPU will be halted. When an enabled wakeup\r
-*  event occurs the device will return to Active mode.  Similarly when an\r
-*  enabled interrupt occurs the CPU will be started. These two actions will\r
-*  occur together provided that the event that occurs is an enabled wakeup\r
-*  source and also generates an interrupt. If just the wakeup event occurs then\r
-*  the device will be in Active mode, but the CPU will remain halted waiting for\r
-*  an interrupt. If an interrupt occurs from something other than a wakeup\r
-*  source, then the CPU will restart with the device in Alternate Active mode\r
-*  until a wakeup event occurs.\r
-*\r
-*  For example, if CyPmAltAct(PM_ALT_ACT_TIME_NONE, PM_ALT_ACT_SRC_PICU) is\r
-*  called and PICU interrupt occurs, the CPU will be started and device will be\r
-*  switched into Active mode. And if CyPmAltAct(PM_ALT_ACT_TIME_NONE,\r
-*  PM_ALT_ACT_SRC_NONE) is called and PICU interrupt occurs, the CPU will be\r
-*  started while device remains in Alternate Active mode.\r
-*\r
-* Parameters:\r
-*  wakeupTime: Specifies a timer wakeup source and the frequency of that\r
-*              source. For PSoC 5LP this parameter is ignored.\r
-*\r
-*           Define                      Time\r
-*  PM_ALT_ACT_TIME_NONE             None\r
-*  PM_ALT_ACT_TIME_ONE_PPS          One PPS: 1 second\r
-*  PM_ALT_ACT_TIME_CTW_2MS          CTW: 2 ms\r
-*  PM_ALT_ACT_TIME_CTW_4MS          CTW: 4 ms\r
-*  PM_ALT_ACT_TIME_CTW_8MS          CTW: 8 ms\r
-*  PM_ALT_ACT_TIME_CTW_16MS         CTW: 16 ms\r
-*  PM_ALT_ACT_TIME_CTW_32MS         CTW: 32 ms\r
-*  PM_ALT_ACT_TIME_CTW_64MS         CTW: 64 ms\r
-*  PM_ALT_ACT_TIME_CTW_128MS        CTW: 128 ms\r
-*  PM_ALT_ACT_TIME_CTW_256MS        CTW: 256 ms\r
-*  PM_ALT_ACT_TIME_CTW_512MS        CTW: 512 ms\r
-*  PM_ALT_ACT_TIME_CTW_1024MS       CTW: 1024 ms\r
-*  PM_ALT_ACT_TIME_CTW_2048MS       CTW: 2048 ms\r
-*  PM_ALT_ACT_TIME_CTW_4096MS       CTW: 4096 ms\r
-*  PM_ALT_ACT_TIME_FTW(1-256)*       FTW: 10us to 2.56 ms\r
-*\r
-*  *Note:   PM_ALT_ACT_TIME_FTW() is a macro that takes an argument that\r
-*           specifies how many increments of 10 us to delay.\r
-            For PSoC 3 silicon the valid range of  values is 1 to 256.\r
-*\r
-*  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if\r
-*                   a wakeupTime has been specified the associated timer will be\r
-*                   included as a wakeup source.\r
-*\r
-*           Define                      Source\r
-*  PM_ALT_ACT_SRC_NONE              None\r
-*  PM_ALT_ACT_SRC_COMPARATOR0       Comparator 0\r
-*  PM_ALT_ACT_SRC_COMPARATOR1       Comparator 1\r
-*  PM_ALT_ACT_SRC_COMPARATOR2       Comparator 2\r
-*  PM_ALT_ACT_SRC_COMPARATOR3       Comparator 3\r
-*  PM_ALT_ACT_SRC_INTERRUPT         Interrupt\r
-*  PM_ALT_ACT_SRC_PICU              PICU\r
-*  PM_ALT_ACT_SRC_I2C               I2C\r
-*  PM_ALT_ACT_SRC_BOOSTCONVERTER    Boost Converter\r
-*  PM_ALT_ACT_SRC_FTW               Fast Timewheel*\r
-*  PM_ALT_ACT_SRC_VD                High and Low Voltage Detection (HVI, LVI)*\r
-*  PM_ALT_ACT_SRC_CTW               Central Timewheel**\r
-*  PM_ALT_ACT_SRC_ONE_PPS           One PPS**\r
-*  PM_ALT_ACT_SRC_LCD               LCD\r
-*\r
-*  *Note : FTW and HVI/LVI wakeup signals are in the same mask bit.\r
-*  **Note: CTW and One PPS wakeup signals are in the same mask bit.\r
-*\r
-*  When specifying a Comparator as the wakeupSource an instance specific define\r
-*  should be used that will track with the specific comparator that the instance\r
-*  is placed into. As an example, for a Comparator instance named MyComp the\r
-*  value to OR into the mask is: MyComp_ctComp__CMP_MASK.\r
-*\r
-*  When CTW, FTW or One PPS is used as a wakeup source, the CyPmReadStatus()\r
-*  function must be called upon wakeup with corresponding parameter. Please\r
-*  refer to the CyPmReadStatus() API in the System Reference Guide for more\r
-*  information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-* Side Effects:\r
-*  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
-*  specified timer will be left as specified by wakeupTime with the timer\r
-*  enabled and the interrupt disabled.  Also, the ILO 1 KHz (if CTW timer is\r
-*  used as wakeup time) or ILO 100 KHz (if FTW timer is used as wakeup time)\r
-*  will be left started.\r
-*\r
-*******************************************************************************/\r
-void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource) \r
-{\r
-    #if(CY_PSOC5)\r
-\r
-        /* Arguments expected to be 0 */\r
-        CYASSERT(PM_ALT_ACT_TIME_NONE == wakeupTime);\r
-\r
-        if(0u != wakeupTime)\r
-        {\r
-            /* To remove unreferenced local variable warning */\r
-        }\r
-\r
-    #endif /* (CY_PSOC5) */\r
-\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* FTW - save current and set new configuration */\r
-        if((wakeupTime >= PM_ALT_ACT_TIME_FTW(1u)) && (wakeupTime <= PM_ALT_ACT_TIME_FTW(256u)))\r
-        {\r
-            CyPmFtwSetInterval(PM_ALT_ACT_FTW_INTERVAL(wakeupTime));\r
-\r
-            /* Include associated timer to the wakeupSource */\r
-            wakeupSource |= PM_ALT_ACT_SRC_FTW;\r
-        }\r
-\r
-        /* CTW - save current and set new configuration */\r
-        if((wakeupTime >= PM_ALT_ACT_TIME_CTW_2MS) && (wakeupTime <= PM_ALT_ACT_TIME_CTW_4096MS))\r
-        {\r
-            /* Save current CTW configuration and set new one */\r
-            CyPmCtwSetInterval((uint8)(wakeupTime - 1u));\r
-\r
-            /* Include associated timer to the wakeupSource */\r
-            wakeupSource |= PM_ALT_ACT_SRC_CTW;\r
-        }\r
-\r
-        /* 1PPS - save current and set new configuration */\r
-        if(PM_ALT_ACT_TIME_ONE_PPS == wakeupTime)\r
-        {\r
-            /* Save current 1PPS configuration and set new one */\r
-            CyPmOppsSet();\r
-\r
-            /* Include associated timer to the wakeupSource */\r
-            wakeupSource |= PM_ALT_ACT_SRC_ONE_PPS;\r
-        }\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-\r
-    /* Save and set new wake up configuration */\r
-\r
-    /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */\r
-    cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
-    CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
-\r
-    /* Comparators */\r
-    cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
-    CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
-\r
-    /* LCD */\r
-    cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
-    CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
-\r
-\r
-    /* Switch to the Alternate Active mode */\r
-    CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_ALT_ACT);\r
-\r
-    /* Recommended readback. */\r
-    (void) CY_PM_MODE_CSR_REG;\r
-\r
-    /* Two recommended NOPs to get into the mode. */\r
-    CY_NOP;\r
-    CY_NOP;\r
-\r
-    /* Execute WFI instruction (for ARM-based devices only) */\r
-    CY_PM_WFI;\r
-\r
-    /* Point of return from Alternate Active Mode */\r
-\r
-    /* Restore wake up configuration */\r
-    CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
-    CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
-    CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmSleep\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Puts the part into the Sleep state.\r
-*\r
-*  Note Before calling this function, you must manually configure the power\r
-*  mode of the source clocks for the timer that is used as wakeup timer.\r
-*\r
-*  Note Before calling this function, you must prepare clock tree configuration\r
-*  for the low power mode by calling CyPmSaveClocks(). And restore clock\r
-*  configuration after CyPmSleep() execution by calling CyPmRestoreClocks(). See\r
-*  Power Management section, Clock Configuration subsection of the System\r
-*  Reference Guide for more information.\r
-*\r
-*  PSoC 3:\r
-*  Before switching to Sleep, if a wakeupTime other than NONE is specified,\r
-*  then the appropriate timer state is configured as specified with the\r
-*  interrupt for that timer disabled.  The wakeup source will be the combination\r
-*  of the values specified in the wakeupSource and any timer specified in the\r
-*  wakeupTime argument.  Once the wakeup condition is satisfied, then all saved\r
-*  state is restored and the function returns in the Active state.\r
-*\r
-*  Note that if the wakeupTime is made with a different value, the period before\r
-*  the wakeup occurs can be significantly shorter than the specified time.  If\r
-*  the next call is made with the same wakeupTime value, then the wakeup will\r
-*  occur the specified period after the previous wakeup occurred.\r
-*\r
-*  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
-*  specified timer will be left as specified by wakeupTime with the timer\r
-*  enabled and the interrupt disabled.  If the CTW or One PPS is already\r
-*  configured for wakeup, for example with the SleepTimer or RTC components,\r
-*  then specify NONE for the wakeupTime and include the appropriate source for\r
-*  wakeupSource.\r
-*\r
-*  PSoC 5LP:\r
-*  The wakeupTime parameter is not used and the only NONE can be specified.\r
-*  The wakeup time must be configured with the component, SleepTimer for CTW\r
-*  intervals and RTC for 1PPS interval. The component must be configured to\r
-*  generate an interrrupt.\r
-*\r
-* Parameters:\r
-*  wakeupTime:      Specifies a timer wakeup source and the frequency of that\r
-*                   source. For PSoC 5LP, this parameter is ignored.\r
-*\r
-*           Define                      Time\r
-*  PM_SLEEP_TIME_NONE               None\r
-*  PM_SLEEP_TIME_ONE_PPS            One PPS: 1 second\r
-*  PM_SLEEP_TIME_CTW_2MS            CTW: 2 ms\r
-*  PM_SLEEP_TIME_CTW_4MS            CTW: 4 ms\r
-*  PM_SLEEP_TIME_CTW_8MS            CTW: 8 ms\r
-*  PM_SLEEP_TIME_CTW_16MS           CTW: 16 ms\r
-*  PM_SLEEP_TIME_CTW_32MS           CTW: 32 ms\r
-*  PM_SLEEP_TIME_CTW_64MS           CTW: 64 ms\r
-*  PM_SLEEP_TIME_CTW_128MS          CTW: 128 ms\r
-*  PM_SLEEP_TIME_CTW_256MS          CTW: 256 ms\r
-*  PM_SLEEP_TIME_CTW_512MS          CTW: 512 ms\r
-*  PM_SLEEP_TIME_CTW_1024MS         CTW: 1024 ms\r
-*  PM_SLEEP_TIME_CTW_2048MS         CTW: 2048 ms\r
-*  PM_SLEEP_TIME_CTW_4096MS         CTW: 4096 ms\r
-*\r
-*  wakeUpSource:    Specifies a bitwise mask of wakeup sources. In addition, if\r
-*                   a wakeupTime has been specified the associated timer will be\r
-*                   included as a wakeup source.\r
-*\r
-*           Define                      Source\r
-*  PM_SLEEP_SRC_NONE                None\r
-*  PM_SLEEP_SRC_COMPARATOR0         Comparator 0\r
-*  PM_SLEEP_SRC_COMPARATOR1         Comparator 1\r
-*  PM_SLEEP_SRC_COMPARATOR2         Comparator 2\r
-*  PM_SLEEP_SRC_COMPARATOR3         Comparator 3\r
-*  PM_SLEEP_SRC_PICU                PICU\r
-*  PM_SLEEP_SRC_I2C                 I2C\r
-*  PM_SLEEP_SRC_BOOSTCONVERTER      Boost Converter\r
-*  PM_SLEEP_SRC_VD                  High and Low Voltage Detection (HVI, LVI)\r
-*  PM_SLEEP_SRC_CTW                 Central Timewheel*\r
-*  PM_SLEEP_SRC_ONE_PPS             One PPS*\r
-*  PM_SLEEP_SRC_LCD                 LCD\r
-*\r
-*  *Note:   CTW and One PPS wakeup signals are in the same mask bit.\r
-*\r
-*  When specifying a Comparator as the wakeupSource an instance specific define\r
-*  should be used that will track with the specific comparator that the instance\r
-*  is placed into. As an example for a Comparator instance named MyComp the\r
-*  value to OR into the mask is: MyComp_ctComp__CMP_MASK.\r
-*\r
-*  When CTW or One PPS is used as a wakeup source, the CyPmReadStatus()\r
-*  function must be called upon wakeup with corresponding parameter. Please\r
-*  refer to the CyPmReadStatus() API in the System Reference Guide for more\r
-*  information.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-* Side Effects and Restrictions:\r
-*  If a wakeupTime other than NONE is specified, then upon exit the state of the\r
-*  specified timer will be left as specified by wakeupTime with the timer\r
-*  enabled and the interrupt disabled. Also, the ILO 1 KHz (if CTW timer is\r
-*  used as wake up time) will be left started.\r
-*\r
-*  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to\r
-*  measure Hibernate/Sleep regulator settling time after a reset. The holdoff\r
-*  delay is measured using rising edges of the 1 kHz ILO.\r
-*\r
-*  For PSoC 3 silicon hardware buzz should be disabled before entering a sleep\r
-*  power mode. It is disabled by PSoC Creator during startup.\r
-*  If a Low Voltage Interrupt (LVI), High Voltage Interrupt (HVI) or Brown Out\r
-*  detect (power supply supervising capabilities) are required in a design\r
-*  during sleep, use the Central Time Wheel (CTW) to periodically wake the\r
-*  device, perform software buzz, and refresh the supervisory services. If LVI,\r
-*  HVI, or Brown Out is not required, then use of the CTW is not required.\r
-*  Refer to the device errata for more information.\r
-*\r
-*******************************************************************************/\r
-void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource) \r
-{\r
-    uint8 interruptState;\r
-\r
-    /* Save current global interrupt enable and disable it */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-\r
-    /***********************************************************************\r
-    * The Hibernate/Sleep regulator has a settling time after a reset.\r
-    * During this time, the system ignores requests to enter Sleep and\r
-    * Hibernate modes. The holdoff delay is measured using rising edges of\r
-    * the 1 kHz ILO.\r
-    ***********************************************************************/\r
-    if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
-    {\r
-        /* Disable hold off - no action on restore */\r
-        CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
-    }\r
-    else\r
-    {\r
-        /* Abort, device is not ready for low power mode entry */\r
-\r
-        /* Restore global interrupt enable state */\r
-        CyExitCriticalSection(interruptState);\r
-\r
-        return;\r
-    }\r
-\r
-\r
-    /***********************************************************************\r
-    * PSoC3 < TO6:\r
-    * - Hardware buzz must be disabled before sleep mode entry.\r
-    * - Voltage supervision (HVI/LVI) requires hardware buzz, so they must\r
-    *   be aslo disabled.\r
-    *\r
-    * PSoC3 >= TO6:\r
-    * - Voltage supervision (HVI/LVI) requires hardware buzz, so hardware buzz must be\r
-    *   enabled before sleep mode entry and restored on wakeup.\r
-    ***********************************************************************/\r
-    #if(CY_PSOC3)\r
-\r
-        /* Silicon Revision ID is below TO6 */\r
-        if(CYDEV_CHIP_REV_ACTUAL < 5u)\r
-        {\r
-            /* Hardware buzz expected to be disabled in Sleep mode */\r
-            CYASSERT(0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ));\r
-        }\r
-\r
-\r
-        if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |\r
-            CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))\r
-        {\r
-            if(CYDEV_CHIP_REV_ACTUAL < 5u)\r
-            {\r
-                /* LVI/HVI requires hardware buzz to be enabled */\r
-                CYASSERT(0u != 0u);\r
-            }\r
-            else\r
-            {\r
-                if (0u == (CY_PM_PWRSYS_WAKE_TR2_REG & CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ))\r
-                {\r
-                    cyPmBackup.hardwareBuzz = CY_PM_DISABLED;\r
-                    CY_PM_PWRSYS_WAKE_TR2_REG |= CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ;\r
-                }\r
-                else\r
-                {\r
-                    cyPmBackup.hardwareBuzz = CY_PM_ENABLED;\r
-                }\r
-            }\r
-        }\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-\r
-    /*******************************************************************************\r
-    * For ARM-based devices, an interrupt is required for the CPU to wake up. The\r
-    * Power Management implementation assumes that wakeup time is configured with a\r
-    * separate component (component-based wakeup time configuration) for an\r
-    * interrupt to be issued on terminal count. For more information, refer to the\r
-    * Wakeup Time Configuration section of System Reference Guide.\r
-    *******************************************************************************/\r
-    #if(CY_PSOC5)\r
-\r
-        /* Arguments expected to be 0 */\r
-        CYASSERT(PM_SLEEP_TIME_NONE == wakeupTime);\r
-\r
-        if(0u != wakeupTime)\r
-        {\r
-            /* To remove unreferenced local variable warning */\r
-        }\r
-\r
-    #endif /* (CY_PSOC5) */\r
-\r
-\r
-    CyPmHibSlpSaveSet();\r
-\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* CTW - save current and set new configuration */\r
-        if((wakeupTime >= PM_SLEEP_TIME_CTW_2MS) && (wakeupTime <= PM_SLEEP_TIME_CTW_4096MS))\r
-        {\r
-            /* Save current and set new configuration of the CTW */\r
-            CyPmCtwSetInterval((uint8)(wakeupTime - 1u));\r
-\r
-            /* Include associated timer to the wakeupSource */\r
-            wakeupSource |= PM_SLEEP_SRC_CTW;\r
-        }\r
-\r
-        /* 1PPS - save current and set new configuration */\r
-        if(PM_SLEEP_TIME_ONE_PPS == wakeupTime)\r
-        {\r
-            /* Save current and set new configuration of the 1PPS */\r
-            CyPmOppsSet();\r
-\r
-            /* Include associated timer to the wakeupSource */\r
-            wakeupSource |= PM_SLEEP_SRC_ONE_PPS;\r
-        }\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-\r
-    /* Save and set new wake up configuration */\r
-\r
-    /* Interrupt, PICU, I2C, Boost converter, CTW/1PPS */\r
-    cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
-    CY_PM_WAKEUP_CFG0_REG = (uint8) (wakeupSource >> 4u);\r
-\r
-    /* Comparators */\r
-    cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
-    CY_PM_WAKEUP_CFG1_REG = (((uint8) wakeupSource) & CY_PM_WAKEUP_SRC_CMPS_MASK);\r
-\r
-    /* LCD */\r
-    cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
-    CY_PM_WAKEUP_CFG2_REG = ((uint8) ((wakeupSource >> 12u) & 0x01u));\r
-\r
-\r
-    /*******************************************************************\r
-    * Do not use merge region below unless any component datasheet\r
-    * suggest to do so.\r
-    *******************************************************************/\r
-    /* `#START CY_PM_JUST_BEFORE_SLEEP` */\r
-\r
-    /* `#END` */\r
-\r
-\r
-    /* Last moment IMO frequency change */\r
-    if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
-    {\r
-        /* IMO frequency is 12 MHz */\r
-        cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
-    }\r
-    else\r
-    {\r
-        /* IMO frequency is not 12 MHz */\r
-        cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
-\r
-        /* Save IMO frequency */\r
-        cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
-\r
-        /* Set IMO frequency to 12 MHz */\r
-        CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
-    }\r
-\r
-    /* Switch to the Sleep mode */\r
-    CY_PM_MODE_CSR_REG = ((CY_PM_MODE_CSR_REG & ((uint8)(~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_SLEEP);\r
-\r
-    /* Recommended readback. */\r
-    (void) CY_PM_MODE_CSR_REG;\r
-\r
-    /* Two recommended NOPs to get into the mode. */\r
-    CY_NOP;\r
-    CY_NOP;\r
-\r
-    /* Execute WFI instruction (for ARM-based devices only) */\r
-    CY_PM_WFI;\r
-\r
-    /* Point of return from Sleep Mode */\r
-\r
-    /* Restore last moment IMO frequency change */\r
-    if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
-    {\r
-        CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ_MASK))) |\r
-                                    cyPmBackup.imoActFreq;\r
-    }\r
-\r
-\r
-    /*******************************************************************\r
-    * Do not use merge region below unless any component datasheet\r
-    * suggest to do so.\r
-    *******************************************************************/\r
-    /* `#START CY_PM_JUST_AFTER_WAKEUP_FROM_SLEEP` */\r
-\r
-    /* `#END` */\r
-\r
-\r
-    /* Restore hardware configuration */\r
-    CyPmHibSlpRestore();\r
-\r
-\r
-    /* Disable hardware buzz, if it was previously enabled */\r
-    #if(CY_PSOC3)\r
-\r
-        if(0u != (CY_PM_RESET_CR1_REG & (CY_PM_RESET_CR1_HVIA_EN |\r
-            CY_PM_RESET_CR1_LVIA_EN | CY_PM_RESET_CR1_LVID_EN)))\r
-        {\r
-            if(CYDEV_CHIP_REV_ACTUAL >= 5u)\r
-            {\r
-                if (CY_PM_DISABLED == cyPmBackup.hardwareBuzz)\r
-                {\r
-                    CY_PM_PWRSYS_WAKE_TR2_REG &= (uint8)(~CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ);\r
-                }\r
-            }\r
-        }\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-\r
-    /* Restore current wake up configuration */\r
-    CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
-    CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
-    CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
-\r
-    /* Restore global interrupt enable state */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHibernate\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Puts the part into the Hibernate state.\r
-*\r
-*  PSoC 3 and PSoC 5LP:\r
-*  Before switching to Hibernate, the current status of the PICU wakeup source\r
-*  bit is saved and then set. This configures the device to wake up from the\r
-*  PICU. Make sure you have at least one pin configured to generate a PICU\r
-*  interrupt. For pin Px.y, the register "PICU_INTTYPE_PICUx_INTTYPEy" controls\r
-*  the PICU behavior. In the TRM, this register is "PICU[0..15]_INTTYPE[0..7]."\r
-*  In the Pins component datasheet, this register is referred to as the IRQ\r
-*  option. Once the wakeup occurs, the PICU wakeup source bit is restored and\r
-*  the PSoC returns to the Active state.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-* Side Effects:\r
-*  Applications must wait 20 us before re-entering hibernate or sleep after\r
-*  waking up from hibernate. The 20 us allows the sleep regulator time to\r
-*  stabilize before the next hibernate / sleep event occurs. The 20 us\r
-*  requirement begins when the device wakes up. There is no hardware check that\r
-*  this requirement is met. The specified delay should be done on ISR entry.\r
-*\r
-*  After wakeup PICU interrupt occurs, the Pin_ClearInterrupt() (where Pin is\r
-*  instance name of the Pins component) function must be called to clear the\r
-*  latched pin events to allow proper Hibernate mode entry andd to enable\r
-*  detection of future events.\r
-*\r
-*  The 1 kHz ILO clock is expected to be enabled for PSoC 3 and PSoC 5LP to\r
-*  measure Hibernate/Sleep regulator settling time after a reset. The holdoff\r
-*  delay is measured using rising edges of the 1 kHz ILO.\r
-*\r
-*******************************************************************************/\r
-void CyPmHibernate(void) \r
-{\r
-    uint8 interruptState;\r
-\r
-    /* Save current global interrupt enable and disable it */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-        /***********************************************************************\r
-        * The Hibernate/Sleep regulator has a settling time after a reset.\r
-        * During this time, the system ignores requests to enter Sleep and\r
-        * Hibernate modes. The holdoff delay is measured using rising edges of\r
-        * the 1 kHz ILO.\r
-        ***********************************************************************/\r
-        if(0u == (CY_PM_MODE_CSR_REG & CY_PM_MODE_CSR_PWRUP_PULSE_Q))\r
-        {\r
-            /* Disable hold off - no action on restore */\r
-            CY_PM_PWRSYS_SLP_TR_REG &= CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK;\r
-        }\r
-        else\r
-        {\r
-            /* Abort, device is not ready for low power mode entry */\r
-\r
-            /* Restore global interrupt enable state */\r
-            CyExitCriticalSection(interruptState);\r
-\r
-            return;\r
-        }\r
-\r
-    CyPmHibSaveSet();\r
-\r
-\r
-    /* Save and enable only wakeup on PICU */\r
-    cyPmBackup.wakeupCfg0 = CY_PM_WAKEUP_CFG0_REG;\r
-    CY_PM_WAKEUP_CFG0_REG = CY_PM_WAKEUP_PICU;\r
-\r
-    cyPmBackup.wakeupCfg1 = CY_PM_WAKEUP_CFG1_REG;\r
-    CY_PM_WAKEUP_CFG1_REG = 0x00u;\r
-\r
-    cyPmBackup.wakeupCfg2 = CY_PM_WAKEUP_CFG2_REG;\r
-    CY_PM_WAKEUP_CFG2_REG = 0x00u;\r
-\r
-\r
-    /* Last moment IMO frequency change */\r
-    if(0u == (CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK))\r
-    {\r
-        /* IMO frequency is 12 MHz */\r
-        cyPmBackup.imoActFreq12Mhz = CY_PM_ENABLED;\r
-    }\r
-    else\r
-    {\r
-        /* IMO frequency is not 12 MHz */\r
-        cyPmBackup.imoActFreq12Mhz = CY_PM_DISABLED;\r
-\r
-        /* Save IMO frequency */\r
-        cyPmBackup.imoActFreq = CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK;\r
-\r
-        /* Set IMO frequency to 12 MHz */\r
-        CY_PM_FASTCLK_IMO_CR_REG &= ((uint8) (~CY_PM_FASTCLK_IMO_CR_FREQ_MASK));\r
-    }\r
-\r
-\r
-    /* Switch to Hibernate Mode */\r
-    CY_PM_MODE_CSR_REG = (CY_PM_MODE_CSR_REG & ((uint8) (~CY_PM_MODE_CSR_MASK))) | CY_PM_MODE_CSR_HIBERNATE;\r
-\r
-    /* Recommended readback. */\r
-    (void) CY_PM_MODE_CSR_REG;\r
-\r
-    /* Two recommended NOPs to get into the mode. */\r
-    CY_NOP;\r
-    CY_NOP;\r
-\r
-    /* Execute WFI instruction (for ARM-based devices only) */\r
-    CY_PM_WFI;\r
-\r
-\r
-    /* Point of return from Hibernate mode */\r
-\r
-\r
-    /* Restore last moment IMO frequency change */\r
-    if(CY_PM_ENABLED != cyPmBackup.imoActFreq12Mhz)\r
-    {\r
-        CY_PM_FASTCLK_IMO_CR_REG  = (CY_PM_FASTCLK_IMO_CR_REG & ((uint8)(~CY_PM_FASTCLK_IMO_CR_FREQ_MASK))) |\r
-                                    cyPmBackup.imoActFreq;\r
-    }\r
-\r
-\r
-    /* Restore device for proper Hibernate mode exit*/\r
-    CyPmHibRestore();\r
-\r
-    /* Restore current wake up configuration */\r
-    CY_PM_WAKEUP_CFG0_REG = cyPmBackup.wakeupCfg0;\r
-    CY_PM_WAKEUP_CFG1_REG = cyPmBackup.wakeupCfg1;\r
-    CY_PM_WAKEUP_CFG2_REG = cyPmBackup.wakeupCfg2;\r
-\r
-    /* Restore global interrupt enable state */\r
-    CyExitCriticalSection(interruptState);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmReadStatus\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Manages the Power Manager Interrupt Status Register.  This register has the\r
-*  interrupt status for the one pulse per second, central timewheel and fast\r
-*  timewheel timers.  This hardware register clears on read.  To allow for only\r
-*  clearing the bits of interest and preserving the other bits, this function\r
-*  uses a shadow register that retains the state.  This function reads the\r
-*  status register and ORs that value with the shadow register.  That is the\r
-*  value that is returned.  Then the bits in the mask that are set are cleared\r
-*  from this value and written back to the shadow register.\r
-*\r
-*  Note You must call this function within 1 ms (1 clock cycle of the ILO)\r
-*  after a CTW event has occurred.\r
-*\r
-* Parameters:\r
-*  mask: Bits in the shadow register to clear.\r
-*\r
-*       Define                      Source\r
-*  CY_PM_FTW_INT                Fast Timewheel\r
-*  CY_PM_CTW_INT                Central Timewheel\r
-*  CY_PM_ONEPPS_INT             One Pulse Per Second\r
-*\r
-* Return:\r
-*  Status.  Same bits values as the mask parameter.\r
-*\r
-*******************************************************************************/\r
-uint8 CyPmReadStatus(uint8 mask) \r
-{\r
-    static uint8 interruptStatus;\r
-    uint8 interruptState;\r
-    uint8 tmpStatus;\r
-\r
-    /* Enter critical section */\r
-    interruptState = CyEnterCriticalSection();\r
-\r
-    /* Save value of the register, copy it and clear desired bit */\r
-    interruptStatus |= CY_PM_INT_SR_REG;\r
-    tmpStatus = interruptStatus;\r
-    interruptStatus &= ((uint8)(~mask));\r
-\r
-    /* Exit critical section */\r
-    CyExitCriticalSection(interruptState);\r
-\r
-    return(tmpStatus);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHibSaveSet\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Prepare device for proper Hibernate low power mode entry:\r
-*  - Disables I2C backup regulator\r
-*  - Saves ILO power down mode state and enable it\r
-*  - Saves state of 1 kHz and 100 kHz ILO and disable them\r
-*  - Disables sleep regulator and shorts vccd to vpwrsleep\r
-*  - Save LVI/HVI configuration and disable them - CyPmHviLviSaveDisable()\r
-*  - CyPmHibSlpSaveSet() function is called\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-*******************************************************************************/\r
-static void CyPmHibSaveSet(void) \r
-{\r
-    /* I2C backup reg must be off when the sleep regulator is unavailable */\r
-    if(0u != (CY_PM_PWRSYS_CR1_REG & CY_PM_PWRSYS_CR1_I2CREG_BACKUP))\r
-    {\r
-        /***********************************************************************\r
-        * If I2C backup regulator is enabled, all the fixed-function registers\r
-        * store their values while device is in low power mode, otherwise their\r
-        * configuration is lost. The I2C API makes a decision to restore or not\r
-        * to restore I2C registers based on this. If this regulator will be\r
-        * disabled and then enabled, I2C API will suppose that I2C block\r
-        * registers preserved their values, while this is not true. So, the\r
-        * backup regulator is disabled. The I2C sleep APIs is responsible for\r
-        * restoration.\r
-        ***********************************************************************/\r
-\r
-        /* Disable I2C backup register */\r
-        CY_PM_PWRSYS_CR1_REG &= ((uint8)(~CY_PM_PWRSYS_CR1_I2CREG_BACKUP));\r
-    }\r
-\r
-\r
-    /* Save current ILO power mode and ensure low power mode */\r
-    cyPmBackup.iloPowerMode = CyILO_SetPowerMode(CY_PM_POWERDOWN_MODE);\r
-\r
-    /* Save current 1kHz ILO enable state. Disabled automatically. */\r
-    cyPmBackup.ilo1kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_1K)) ?\r
-                                CY_PM_DISABLED : CY_PM_ENABLED;\r
-\r
-    /* Save current 100kHz ILO enable state. Disabled automatically. */\r
-    cyPmBackup.ilo100kEnable = (0u == (CY_PM_SLOWCLK_ILO_CR0_REG & CY_PM_ILO_CR0_EN_100K)) ?\r
-                                CY_PM_DISABLED : CY_PM_ENABLED;\r
-\r
-\r
-    /* Disable the sleep regulator and shorts vccd to vpwrsleep */\r
-    if(0u == (CY_PM_PWRSYS_SLP_TR_REG & CY_PM_PWRSYS_SLP_TR_BYPASS))\r
-    {\r
-        /* Save current bypass state */\r
-        cyPmBackup.slpTrBypass = CY_PM_DISABLED;\r
-        CY_PM_PWRSYS_SLP_TR_REG |= CY_PM_PWRSYS_SLP_TR_BYPASS;\r
-    }\r
-    else\r
-    {\r
-        cyPmBackup.slpTrBypass = CY_PM_ENABLED;\r
-    }\r
-\r
-    /* LPCOMPs are always enabled (even when BOTH ext_vccd=1 and ext_vcca=1)*/\r
-\r
-\r
-    /***************************************************************************\r
-    * LVI/HVI must be disabled in Hibernate\r
-    ***************************************************************************/\r
-\r
-    /* Save LVI/HVI configuration and disable them */\r
-    CyPmHviLviSaveDisable();\r
-\r
-\r
-    /* Make the same preparations for Hibernate and Sleep modes */\r
-    CyPmHibSlpSaveSet();\r
-\r
-\r
-    /***************************************************************************\r
-    * Save and set power mode wakeup trim registers\r
-    ***************************************************************************/\r
-    cyPmBackup.wakeupTrim0 = CY_PM_PWRSYS_WAKE_TR0_REG;\r
-    cyPmBackup.wakeupTrim1 = CY_PM_PWRSYS_WAKE_TR1_REG;\r
-\r
-    CY_PM_PWRSYS_WAKE_TR0_REG = CY_PM_PWRSYS_WAKE_TR0;\r
-    CY_PM_PWRSYS_WAKE_TR1_REG = CY_PM_PWRSYS_WAKE_TR1;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHibRestore\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Restore device for proper Hibernate mode exit:\r
-*  - Restore LVI/HVI configuration - call CyPmHviLviRestore()\r
-*  - CyPmHibSlpSaveRestore() function is called\r
-*  - Restores ILO power down mode state and enable it\r
-*  - Restores state of 1 kHz and 100 kHz ILO and disable them\r
-*  - Restores sleep regulator settings\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-static void CyPmHibRestore(void) \r
-{\r
-    /* Restore LVI/HVI configuration */\r
-    CyPmHviLviRestore();\r
-\r
-    /* Restore the same configuration for Hibernate and Sleep modes */\r
-    CyPmHibSlpRestore();\r
-\r
-    /* Restore 1kHz ILO enable state */\r
-    if(CY_PM_ENABLED == cyPmBackup.ilo1kEnable)\r
-    {\r
-        /* Enable 1kHz ILO */\r
-        CyILO_Start1K();\r
-    }\r
-\r
-    /* Restore 100kHz ILO enable state */\r
-    if(CY_PM_ENABLED == cyPmBackup.ilo100kEnable)\r
-    {\r
-        /* Enable 100kHz ILO */\r
-        CyILO_Start100K();\r
-    }\r
-\r
-    /* Restore ILO power mode */\r
-    (void) CyILO_SetPowerMode(cyPmBackup.iloPowerMode);\r
-\r
-\r
-    if(CY_PM_DISABLED == cyPmBackup.slpTrBypass)\r
-    {\r
-        /* Enable the sleep regulator */\r
-        CY_PM_PWRSYS_SLP_TR_REG &= ((uint8)(~CY_PM_PWRSYS_SLP_TR_BYPASS));\r
-    }\r
-\r
-\r
-    /***************************************************************************\r
-    * Restore power mode wakeup trim registers\r
-    ***************************************************************************/\r
-    CY_PM_PWRSYS_WAKE_TR0_REG = cyPmBackup.wakeupTrim0;\r
-    CY_PM_PWRSYS_WAKE_TR1_REG = cyPmBackup.wakeupTrim1;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmCtwSetInterval\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Performs CTW configuration:\r
-*  - Disables CTW interrupt\r
-*  - Enables 1 kHz ILO\r
-*  - Sets new CTW interval\r
-*\r
-* Parameters:\r
-*  ctwInterval: the CTW interval to be set.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  Enables ILO 1 KHz clock and leaves it enabled.\r
-*\r
-*******************************************************************************/\r
-void CyPmCtwSetInterval(uint8 ctwInterval) \r
-{\r
-    /* Disable CTW interrupt enable */\r
-    CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_IE));\r
-\r
-    /* Enable 1kHz ILO (required for CTW operation) */\r
-    CyILO_Start1K();\r
-\r
-    /* Interval could be set only while CTW is disabled */\r
-    if(0u != (CY_PM_TW_CFG2_REG & CY_PM_CTW_EN))\r
-    {\r
-        /* Set CTW interval if needed */\r
-        if(CY_PM_TW_CFG1_REG != ctwInterval)\r
-        {\r
-            /* Disable the CTW, set new CTW interval and enable it again */\r
-            CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_CTW_EN));\r
-            CY_PM_TW_CFG1_REG = ctwInterval;\r
-            CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
-        }   /* Required interval is already set */\r
-    }\r
-    else\r
-    {\r
-        /* Set CTW interval if needed */\r
-        if(CY_PM_TW_CFG1_REG != ctwInterval)\r
-        {\r
-            /* Set the new CTW interval. Could be changed if CTW is disabled */\r
-            CY_PM_TW_CFG1_REG = ctwInterval;\r
-        }   /* Required interval is already set */\r
-\r
-        /* Enable the CTW */\r
-        CY_PM_TW_CFG2_REG |= CY_PM_CTW_EN;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmOppsSet\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Performs 1PPS configuration:\r
-*  - Starts 32 KHz XTAL\r
-*  - Disables 1PPS interupts\r
-*  - Enables 1PPS\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-void CyPmOppsSet(void) \r
-{\r
-    /* Enable 32kHz XTAL if needed */\r
-    if(0u == (CY_PM_SLOWCLK_X32_CR_REG & CY_PM_X32_CR_X32EN))\r
-    {\r
-        /* Enable 32kHz XTAL */\r
-        CyXTAL_32KHZ_Start();\r
-    }\r
-\r
-    /* Disable 1PPS interrupt enable */\r
-    CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_1PPS_IE));\r
-\r
-    /* Enable 1PPS operation */\r
-    CY_PM_TW_CFG2_REG |= CY_PM_1PPS_EN;\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmFtwSetInterval\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Performs FTW configuration:\r
-*  - Disables FTW interrupt\r
-*  - Enables 100 kHz ILO\r
-*  - Sets new FTW interval.\r
-*\r
-* Parameters:\r
-*  ftwInterval - FTW counter interval.\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Side Effects:\r
-*  Enables ILO 100 KHz clock and leaves it enabled.\r
-*\r
-*******************************************************************************/\r
-void CyPmFtwSetInterval(uint8 ftwInterval) \r
-{\r
-    /* Disable FTW interrupt enable */\r
-    CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_IE));\r
-\r
-    /* Enable 100kHz ILO */\r
-    CyILO_Start100K();\r
-\r
-    /* Iterval could be set only while FTW is disabled */\r
-    if(0u != (CY_PM_TW_CFG2_REG & CY_PM_FTW_EN))\r
-    {\r
-        /* Disable FTW, set new FTW interval if needed and enable it again */\r
-        if(CY_PM_TW_CFG0_REG != ftwInterval)\r
-        {\r
-            /* Disable the CTW, set new CTW interval and enable it again */\r
-            CY_PM_TW_CFG2_REG &= ((uint8)(~CY_PM_FTW_EN));\r
-            CY_PM_TW_CFG0_REG = ftwInterval;\r
-            CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
-        }   /* Required interval is already set */\r
-    }\r
-    else\r
-    {\r
-        /* Set new FTW counter interval if needed. FTW is disabled. */\r
-        if(CY_PM_TW_CFG0_REG != ftwInterval)\r
-        {\r
-            /* Set the new CTW interval. Could be changed if CTW is disabled */\r
-            CY_PM_TW_CFG0_REG = ftwInterval;\r
-        }   /* Required interval is already set */\r
-\r
-        /* Enable the FTW */\r
-        CY_PM_TW_CFG2_REG |= CY_PM_FTW_EN;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHibSlpSaveSet\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This API is used for preparing device for Sleep and Hibernate low power\r
-*  modes entry:\r
-*  - Saves COMP, VIDAC, DSM and SAR routing connections (PSoC 5)\r
-*  - Saves SC/CT routing connections (PSoC 3/5/5LP)\r
-*  - Disables Serial Wire Viewer (SWV) (PSoC 3)\r
-*  - Save boost reference selection and set it to internal\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-*******************************************************************************/\r
-static void CyPmHibSlpSaveSet(void) \r
-{\r
-    /* Save SC/CT routing registers */\r
-    cyPmBackup.scctData[0u]   = CY_GET_REG8(CYREG_SC0_SW0 );\r
-    cyPmBackup.scctData[1u]   = CY_GET_REG8(CYREG_SC0_SW2 );\r
-    cyPmBackup.scctData[2u]   = CY_GET_REG8(CYREG_SC0_SW3 );\r
-    cyPmBackup.scctData[3u]   = CY_GET_REG8(CYREG_SC0_SW4 );\r
-    cyPmBackup.scctData[4u]   = CY_GET_REG8(CYREG_SC0_SW6 );\r
-    cyPmBackup.scctData[5u]   = CY_GET_REG8(CYREG_SC0_SW8 );\r
-    cyPmBackup.scctData[6u]   = CY_GET_REG8(CYREG_SC0_SW10);\r
-\r
-    cyPmBackup.scctData[7u]   = CY_GET_REG8(CYREG_SC1_SW0 );\r
-    cyPmBackup.scctData[8u]   = CY_GET_REG8(CYREG_SC1_SW2 );\r
-    cyPmBackup.scctData[9u]   = CY_GET_REG8(CYREG_SC1_SW3 );\r
-    cyPmBackup.scctData[10u]  = CY_GET_REG8(CYREG_SC1_SW4 );\r
-    cyPmBackup.scctData[11u]  = CY_GET_REG8(CYREG_SC1_SW6 );\r
-    cyPmBackup.scctData[12u]  = CY_GET_REG8(CYREG_SC1_SW8 );\r
-    cyPmBackup.scctData[13u]  = CY_GET_REG8(CYREG_SC1_SW10);\r
-\r
-    cyPmBackup.scctData[14u]  = CY_GET_REG8(CYREG_SC2_SW0 );\r
-    cyPmBackup.scctData[15u]  = CY_GET_REG8(CYREG_SC2_SW2 );\r
-    cyPmBackup.scctData[16u]  = CY_GET_REG8(CYREG_SC2_SW3 );\r
-    cyPmBackup.scctData[17u]  = CY_GET_REG8(CYREG_SC2_SW4 );\r
-    cyPmBackup.scctData[18u]  = CY_GET_REG8(CYREG_SC2_SW6 );\r
-    cyPmBackup.scctData[19u]  = CY_GET_REG8(CYREG_SC2_SW8 );\r
-    cyPmBackup.scctData[20u]  = CY_GET_REG8(CYREG_SC2_SW10);\r
-\r
-    cyPmBackup.scctData[21u]  = CY_GET_REG8(CYREG_SC3_SW0 );\r
-    cyPmBackup.scctData[22u]  = CY_GET_REG8(CYREG_SC3_SW2 );\r
-    cyPmBackup.scctData[23u]  = CY_GET_REG8(CYREG_SC3_SW3 );\r
-    cyPmBackup.scctData[24u]  = CY_GET_REG8(CYREG_SC3_SW4 );\r
-    cyPmBackup.scctData[25u]  = CY_GET_REG8(CYREG_SC3_SW6 );\r
-    cyPmBackup.scctData[26u]  = CY_GET_REG8(CYREG_SC3_SW8 );\r
-    cyPmBackup.scctData[27u]  = CY_GET_REG8(CYREG_SC3_SW10);\r
-\r
-    CY_SET_REG8(CYREG_SC0_SW0 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW2 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW3 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW4 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW6 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW8 , 0u);\r
-    CY_SET_REG8(CYREG_SC0_SW10, 0u);\r
-\r
-    CY_SET_REG8(CYREG_SC1_SW0 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW2 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW3 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW4 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW6 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW8 , 0u);\r
-    CY_SET_REG8(CYREG_SC1_SW10, 0u);\r
-\r
-    CY_SET_REG8(CYREG_SC2_SW0 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW2 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW3 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW4 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW6 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW8 , 0u);\r
-    CY_SET_REG8(CYREG_SC2_SW10, 0u);\r
-\r
-    CY_SET_REG8(CYREG_SC3_SW0 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW2 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW3 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW4 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW6 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW8 , 0u);\r
-    CY_SET_REG8(CYREG_SC3_SW10, 0u);\r
-\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* Serial Wire Viewer (SWV) workaround */\r
-\r
-        /* Disable SWV before entering low power mode */\r
-        if(0u != (CY_PM_MLOGIC_DBG_REG & CY_PM_MLOGIC_DBG_SWV_CLK_EN))\r
-        {\r
-            /* Save SWV clock enabled state */\r
-            cyPmBackup.swvClkEnabled = CY_PM_ENABLED;\r
-\r
-            /* Save current ports drive mode settings */\r
-            cyPmBackup.prt1Dm = CY_PM_PRT1_PC3_REG & ((uint8)(~CY_PM_PRT1_PC3_DM_MASK));\r
-\r
-            /* Set drive mode to strong output */\r
-            CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |\r
-                                CY_PM_PRT1_PC3_DM_STRONG;\r
-\r
-            /* Disable SWV clocks */\r
-            CY_PM_MLOGIC_DBG_REG &= ((uint8)(~CY_PM_MLOGIC_DBG_SWV_CLK_EN));\r
-        }\r
-        else\r
-        {\r
-            /* Save SWV clock disabled state */\r
-            cyPmBackup.swvClkEnabled = CY_PM_DISABLED;\r
-        }\r
-\r
-    #endif  /* (CY_PSOC3) */\r
-\r
-\r
-    /***************************************************************************\r
-    * Save boost reference and set it to boost's internal by clearing the bit.\r
-    * External (chip bandgap) reference is not available in Sleep and Hibernate.\r
-    ***************************************************************************/\r
-    if(0u != (CY_PM_BOOST_CR2_REG & CY_PM_BOOST_CR2_EREFSEL_EXT))\r
-    {\r
-        cyPmBackup.boostRefExt = CY_PM_ENABLED;\r
-        CY_PM_BOOST_CR2_REG &= ((uint8)(~CY_PM_BOOST_CR2_EREFSEL_EXT));\r
-    }\r
-    else\r
-    {\r
-        cyPmBackup.boostRefExt = CY_PM_DISABLED;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHibSlpRestore\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This API is used for restoring device configurations after wakeup from Sleep\r
-*  and Hibernate low power modes:\r
-*  - Restores SC/CT routing connections\r
-*  - Restores enable state of Serial Wire Viewer (SWV) (PSoC 3)\r
-*  - Restore boost reference selection\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-*******************************************************************************/\r
-static void CyPmHibSlpRestore(void) \r
-{\r
-    /* Restore SC/CT routing registers */\r
-    CY_SET_REG8(CYREG_SC0_SW0 , cyPmBackup.scctData[0u] );\r
-    CY_SET_REG8(CYREG_SC0_SW2 , cyPmBackup.scctData[1u] );\r
-    CY_SET_REG8(CYREG_SC0_SW3 , cyPmBackup.scctData[2u] );\r
-    CY_SET_REG8(CYREG_SC0_SW4 , cyPmBackup.scctData[3u] );\r
-    CY_SET_REG8(CYREG_SC0_SW6 , cyPmBackup.scctData[4u] );\r
-    CY_SET_REG8(CYREG_SC0_SW8 , cyPmBackup.scctData[5u] );\r
-    CY_SET_REG8(CYREG_SC0_SW10, cyPmBackup.scctData[6u] );\r
-\r
-    CY_SET_REG8(CYREG_SC1_SW0 , cyPmBackup.scctData[7u] );\r
-    CY_SET_REG8(CYREG_SC1_SW2 , cyPmBackup.scctData[8u] );\r
-    CY_SET_REG8(CYREG_SC1_SW3 , cyPmBackup.scctData[9u] );\r
-    CY_SET_REG8(CYREG_SC1_SW4 , cyPmBackup.scctData[10u]);\r
-    CY_SET_REG8(CYREG_SC1_SW6 , cyPmBackup.scctData[11u]);\r
-    CY_SET_REG8(CYREG_SC1_SW8 , cyPmBackup.scctData[12u]);\r
-    CY_SET_REG8(CYREG_SC1_SW10, cyPmBackup.scctData[13u]);\r
-\r
-    CY_SET_REG8(CYREG_SC2_SW0 , cyPmBackup.scctData[14u]);\r
-    CY_SET_REG8(CYREG_SC2_SW2 , cyPmBackup.scctData[15u]);\r
-    CY_SET_REG8(CYREG_SC2_SW3 , cyPmBackup.scctData[16u]);\r
-    CY_SET_REG8(CYREG_SC2_SW4 , cyPmBackup.scctData[17u]);\r
-    CY_SET_REG8(CYREG_SC2_SW6 , cyPmBackup.scctData[18u]);\r
-    CY_SET_REG8(CYREG_SC2_SW8 , cyPmBackup.scctData[19u]);\r
-    CY_SET_REG8(CYREG_SC2_SW10, cyPmBackup.scctData[20u]);\r
-\r
-    CY_SET_REG8(CYREG_SC3_SW0 , cyPmBackup.scctData[21u]);\r
-    CY_SET_REG8(CYREG_SC3_SW2 , cyPmBackup.scctData[22u]);\r
-    CY_SET_REG8(CYREG_SC3_SW3 , cyPmBackup.scctData[23u]);\r
-    CY_SET_REG8(CYREG_SC3_SW4 , cyPmBackup.scctData[24u]);\r
-    CY_SET_REG8(CYREG_SC3_SW6 , cyPmBackup.scctData[25u]);\r
-    CY_SET_REG8(CYREG_SC3_SW8 , cyPmBackup.scctData[26u]);\r
-    CY_SET_REG8(CYREG_SC3_SW10, cyPmBackup.scctData[27u]);\r
-\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        /* Serial Wire Viewer (SWV) workaround */\r
-        if(CY_PM_ENABLED == cyPmBackup.swvClkEnabled)\r
-        {\r
-            /* Restore ports drive mode */\r
-            CY_PM_PRT1_PC3_REG = (CY_PM_PRT1_PC3_REG & CY_PM_PRT1_PC3_DM_MASK) |\r
-                                    cyPmBackup.prt1Dm;\r
-\r
-            /* Enable SWV clocks */\r
-            CY_PM_MLOGIC_DBG_REG |= CY_PM_MLOGIC_DBG_SWV_CLK_EN;\r
-        }\r
-\r
-    #endif /* (CY_PSOC3) */\r
-\r
-\r
-    /* Restore boost reference */\r
-    if(CY_PM_ENABLED == cyPmBackup.boostRefExt)\r
-    {\r
-        CY_PM_BOOST_CR2_REG |= CY_PM_BOOST_CR2_EREFSEL_EXT;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHviLviSaveDisable\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Saves analog and digital LVI and HVI configuration and disables them.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-*******************************************************************************/\r
-static void CyPmHviLviSaveDisable(void) \r
-{\r
-    if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVID_EN))\r
-    {\r
-        cyPmBackup.lvidEn = CY_PM_ENABLED;\r
-        cyPmBackup.lvidTrip = CY_VD_LVI_TRIP_REG & CY_VD_LVI_TRIP_LVID_MASK;\r
-\r
-        /* Save state of reset device at a specified Vddd threshold */\r
-        cyPmBackup.lvidRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESD_EN)) ? \\r
-                             CY_PM_DISABLED : CY_PM_ENABLED;\r
-\r
-        CyVdLvDigitDisable();\r
-    }\r
-    else\r
-    {\r
-        cyPmBackup.lvidEn = CY_PM_DISABLED;\r
-    }\r
-\r
-    if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_LVIA_EN))\r
-    {\r
-        cyPmBackup.lviaEn = CY_PM_ENABLED;\r
-        cyPmBackup.lviaTrip = CY_VD_LVI_TRIP_REG >> 4u;\r
-\r
-        /* Save state of reset device at a specified Vdda threshold */\r
-        cyPmBackup.lviaRst = (0u == (CY_VD_PRES_CONTROL_REG & CY_VD_PRESA_EN)) ? \\r
-                             CY_PM_DISABLED : CY_PM_ENABLED;\r
-\r
-        CyVdLvAnalogDisable();\r
-    }\r
-    else\r
-    {\r
-        cyPmBackup.lviaEn = CY_PM_DISABLED;\r
-    }\r
-\r
-    if(0u != (CY_VD_LVI_HVI_CONTROL_REG & CY_VD_HVIA_EN))\r
-    {\r
-        cyPmBackup.hviaEn = CY_PM_ENABLED;\r
-        CyVdHvAnalogDisable();\r
-    }\r
-    else\r
-    {\r
-        cyPmBackup.hviaEn = CY_PM_DISABLED;\r
-    }\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: CyPmHviLviRestore\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Restores analog and digital LVI and HVI configuration.\r
-*\r
-* Parameters:\r
-*  None\r
-*\r
-* Return:\r
-*  None\r
-*\r
-* Reentrant:\r
-*  No\r
-*\r
-*******************************************************************************/\r
-static void CyPmHviLviRestore(void) \r
-{\r
-    /* Restore LVI/HVI configuration */\r
-    if(CY_PM_ENABLED == cyPmBackup.lvidEn)\r
-    {\r
-        CyVdLvDigitEnable(cyPmBackup.lvidRst, cyPmBackup.lvidTrip);\r
-    }\r
-\r
-    if(CY_PM_ENABLED == cyPmBackup.lviaEn)\r
-    {\r
-        CyVdLvAnalogEnable(cyPmBackup.lviaRst, cyPmBackup.lviaTrip);\r
-    }\r
-\r
-    if(CY_PM_ENABLED == cyPmBackup.hviaEn)\r
-    {\r
-        CyVdHvAnalogEnable();\r
-    }\r
-}\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.h
deleted file mode 100755 (executable)
index bfa2214..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyPm.h
+++ /dev/null
@@ -1,635 +0,0 @@
-/*******************************************************************************\r
-* File Name: cyPm.h\r
-* Version 4.0\r
-*\r
-* Description:\r
-*  Provides the function definitions for the power management API.\r
-*\r
-* Note:\r
-*  Documentation of the API's in this file is located in the\r
-*  System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYPM_H)\r
-#define CY_BOOT_CYPM_H\r
-\r
-#include "cytypes.h"        /* Register access API      */\r
-#include "cydevice_trm.h"   /* Registers addresses      */\r
-#include "cyfitter.h"       /* Comparators placement    */\r
-#include "CyLib.h"          /* Clock API                */\r
-#include "CyFlash.h"        /* Flash API - CyFlash_SetWaitCycles()  */\r
-\r
-\r
-/***************************************\r
-*    Function Prototypes\r
-***************************************/\r
-void CyPmSaveClocks(void) ;\r
-void CyPmRestoreClocks(void) ;\r
-void CyPmAltAct(uint16 wakeupTime, uint16 wakeupSource) ;\r
-void CyPmSleep(uint8 wakeupTime, uint16 wakeupSource) ;\r
-void CyPmHibernate(void) ;\r
-\r
-uint8 CyPmReadStatus(uint8 mask) ;\r
-\r
-/* Internal APIs and are not meant to be called directly by the user */\r
-void CyPmCtwSetInterval(uint8 ctwInterval) ;\r
-void CyPmFtwSetInterval(uint8 ftwInterval) ;\r
-void CyPmOppsSet(void) ;\r
-\r
-\r
-/***************************************\r
-*    API Constants\r
-***************************************/\r
-\r
-#define PM_SLEEP_SRC_NONE               (0x0000u)\r
-#define PM_SLEEP_TIME_NONE              (0x00u)\r
-#define PM_ALT_ACT_SRC_NONE             (0x0000u)\r
-#define PM_ALT_ACT_TIME_NONE            (0x0000u)\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* Wake up time for the Sleep mode */\r
-    #define PM_SLEEP_TIME_ONE_PPS           (0x01u)\r
-    #define PM_SLEEP_TIME_CTW_2MS           (0x02u)\r
-    #define PM_SLEEP_TIME_CTW_4MS           (0x03u)\r
-    #define PM_SLEEP_TIME_CTW_8MS           (0x04u)\r
-    #define PM_SLEEP_TIME_CTW_16MS          (0x05u)\r
-    #define PM_SLEEP_TIME_CTW_32MS          (0x06u)\r
-    #define PM_SLEEP_TIME_CTW_64MS          (0x07u)\r
-    #define PM_SLEEP_TIME_CTW_128MS         (0x08u)\r
-    #define PM_SLEEP_TIME_CTW_256MS         (0x09u)\r
-    #define PM_SLEEP_TIME_CTW_512MS         (0x0Au)\r
-    #define PM_SLEEP_TIME_CTW_1024MS        (0x0Bu)\r
-    #define PM_SLEEP_TIME_CTW_2048MS        (0x0Cu)\r
-    #define PM_SLEEP_TIME_CTW_4096MS        (0x0Du)\r
-\r
-    /* Difference between parameter's value and register's one */\r
-    #define CY_PM_FTW_INTERVAL_SHIFT        (0x000Eu)\r
-\r
-    /* Wake up time for the Alternate Active mode */\r
-    #define PM_ALT_ACT_TIME_ONE_PPS         (0x0001u)\r
-    #define PM_ALT_ACT_TIME_CTW_2MS         (0x0002u)\r
-    #define PM_ALT_ACT_TIME_CTW_4MS         (0x0003u)\r
-    #define PM_ALT_ACT_TIME_CTW_8MS         (0x0004u)\r
-    #define PM_ALT_ACT_TIME_CTW_16MS        (0x0005u)\r
-    #define PM_ALT_ACT_TIME_CTW_32MS        (0x0006u)\r
-    #define PM_ALT_ACT_TIME_CTW_64MS        (0x0007u)\r
-    #define PM_ALT_ACT_TIME_CTW_128MS       (0x0008u)\r
-    #define PM_ALT_ACT_TIME_CTW_256MS       (0x0009u)\r
-    #define PM_ALT_ACT_TIME_CTW_512MS       (0x000Au)\r
-    #define PM_ALT_ACT_TIME_CTW_1024MS      (0x000Bu)\r
-    #define PM_ALT_ACT_TIME_CTW_2048MS      (0x000Cu)\r
-    #define PM_ALT_ACT_TIME_CTW_4096MS      (0x000Du)\r
-    #define PM_ALT_ACT_TIME_FTW(x)          ((x) + CY_PM_FTW_INTERVAL_SHIFT)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/* Wake up sources for the Sleep mode */\r
-#define PM_SLEEP_SRC_COMPARATOR0        (0x0001u)\r
-#define PM_SLEEP_SRC_COMPARATOR1        (0x0002u)\r
-#define PM_SLEEP_SRC_COMPARATOR2        (0x0004u)\r
-#define PM_SLEEP_SRC_COMPARATOR3        (0x0008u)\r
-#define PM_SLEEP_SRC_PICU               (0x0040u)\r
-#define PM_SLEEP_SRC_I2C                (0x0080u)\r
-#define PM_SLEEP_SRC_BOOSTCONVERTER     (0x0200u)\r
-#define PM_SLEEP_SRC_VD                 (0x0400u)\r
-#define PM_SLEEP_SRC_CTW                (0x0800u)\r
-#define PM_SLEEP_SRC_ONE_PPS            (0x0800u)\r
-#define PM_SLEEP_SRC_LCD                (0x1000u)\r
-\r
-/* Wake up sources for the Alternate Active mode */\r
-#define PM_ALT_ACT_SRC_COMPARATOR0      (0x0001u)\r
-#define PM_ALT_ACT_SRC_COMPARATOR1      (0x0002u)\r
-#define PM_ALT_ACT_SRC_COMPARATOR2      (0x0004u)\r
-#define PM_ALT_ACT_SRC_COMPARATOR3      (0x0008u)\r
-#define PM_ALT_ACT_SRC_INTERRUPT        (0x0010u)\r
-#define PM_ALT_ACT_SRC_PICU             (0x0040u)\r
-#define PM_ALT_ACT_SRC_I2C              (0x0080u)\r
-#define PM_ALT_ACT_SRC_BOOSTCONVERTER   (0x0200u)\r
-#define PM_ALT_ACT_SRC_FTW              (0x0400u)\r
-#define PM_ALT_ACT_SRC_VD               (0x0400u)\r
-#define PM_ALT_ACT_SRC_CTW              (0x0800u)\r
-#define PM_ALT_ACT_SRC_ONE_PPS          (0x0800u)\r
-#define PM_ALT_ACT_SRC_LCD              (0x1000u)\r
-\r
-\r
-#define CY_PM_WAKEUP_PICU               (0x04u)\r
-#define CY_PM_IMO_NO_WAIT_TO_SETTLE     (0x00u)\r
-#define CY_PM_POWERDOWN_MODE            (0x01u)\r
-#define CY_PM_HIGHPOWER_MODE            (0x00u)     /* Deprecated */\r
-#define CY_PM_ENABLED                   (0x01u)\r
-#define CY_PM_DISABLED                  (0x00u)\r
-\r
-/* No wait for PLL to stabilize, used in CyPLL_OUT_Start() */\r
-#define CY_PM_PLL_OUT_NO_WAIT           (0u)\r
-\r
-/* No wait for MHZ XTAL to stabilize, used in CyXTAL_Start() */\r
-#define CY_PM_XTAL_MHZ_NO_WAIT          (0u)\r
-\r
-#define CY_PM_WAIT_200_US               (200u)\r
-#define CY_PM_WAIT_250_US               (250u)\r
-#define CY_PM_WAIT_20_US                (20u)\r
-\r
-#define CY_PM_FREQ_3MHZ                 (3u)\r
-#define CY_PM_FREQ_12MHZ                (12u)\r
-#define CY_PM_FREQ_48MHZ                (48u)\r
-\r
-\r
-#define     CY_PM_MHZ_XTAL_WAIT_NUM_OF_200_US   (5u)\r
-\r
-\r
-/* Delay line bandgap current settling time starting from a wakeup event */\r
-#define     CY_PM_CLK_DELAY_BANDGAP_SETTLE_US       (50u)\r
-\r
-/* Delay line internal bias settling */\r
-#define     CY_PM_CLK_DELAY_BIAS_SETTLE_US          (25u)\r
-\r
-\r
-/* Max flash wait cycles for each device */\r
-#if(CY_PSOC3)\r
-    #define     CY_PM_MAX_FLASH_WAIT_CYCLES        (45u)\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#if(CY_PSOC5)\r
-    #define     CY_PM_MAX_FLASH_WAIT_CYCLES        (55u)\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* This marco is used to obtain the CPU frequency in MHz. It should be only used\r
-* when the clock distribution system is prepared for the low power mode entry.\r
-* This macro is silicon dependent as PSoC 5 devices have no CPU clock divider\r
-* and PSoC 3 devices have different placement of the CPU clock divider register\r
-* bitfield.\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-    #define CY_PM_GET_CPU_FREQ_MHZ \\r
-                            ((uint32)(cyPmImoFreqReg2Mhz[CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK]) / \\r
-                            ((uint8)(((CY_PM_CLKDIST_MSTR1_REG & CY_PM_CLKDIST_CPU_DIV_MASK) >> 4u) + 1u)))\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#if(CY_PSOC5)\r
-\r
-    /* The CPU clock is directly derived from bus clock */\r
-    #define     CY_PM_GET_CPU_FREQ_MHZ (cyPmImoFreqReg2Mhz[CY_PM_FASTCLK_IMO_CR_REG & CY_PM_FASTCLK_IMO_CR_FREQ_MASK])\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* The low power mode entry is different for PSoC 3 and PSoC 5 devices. The low\r
-* power modes in PSoC 5 devices are invoked by Wait-For-Interrupt (WFI)\r
-* instruction. The ARM compilers has __wfi() instristic that inserts a WFI\r
-* instruction into the instruction stream generated by the compiler. The GCC\r
-* compiler has to execute assembly language instruction.\r
-*******************************************************************************/\r
-#if(CY_PSOC5)\r
-\r
-    #if defined(__ARMCC_VERSION)    /* Instristic for Keil compilers */\r
-        #define CY_PM_WFI       __wfi()\r
-    #else   /* ASM for GCC & IAR */\r
-        #define CY_PM_WFI       asm volatile ("WFI \n")\r
-    #endif /* (__ARMCC_VERSION) */\r
-\r
-#else\r
-\r
-    #define CY_PM_WFI           CY_NOP\r
-\r
-#endif /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Macro for the wakeupTime argument of the CyPmAltAct() function. The FTW should\r
-* be programmed manually for non PSoC 3 devices.\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    #define PM_ALT_ACT_FTW_INTERVAL(x)  ((uint8)((x) - CY_PM_FTW_INTERVAL_SHIFT))\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* This macro defines the IMO frequency that will be set by CyPmSaveClocks()\r
-* function based on Enable Fast IMO during Startup option from the DWR file.\r
-* The CyPmSleep()/CyPmHibernate() will set IMO 12 MHz just before entering\r
-* low power mode and restore IMO back to the value set by CyPmSaveClocks()\r
-* immediately on wakeup.\r
-*******************************************************************************/\r
-\r
-/* Enable Fast IMO during Startup - enabled */\r
-#if(1u == CYDEV_CONFIGURATION_IMOENABLED)\r
-\r
-    /* IMO will be configured to 48 MHz */\r
-    #define CY_PM_IMO_FREQ_LPM      (CY_IMO_FREQ_48MHZ)\r
-\r
-#else\r
-\r
-    /* IMO will be configured to 12 MHz */\r
-    #define CY_PM_IMO_FREQ_LPM      (CY_IMO_FREQ_12MHZ)\r
-\r
-#endif  /* (1u == CYDEV_CONFIGURATION_IMOENABLED) */\r
-\r
-\r
-typedef struct cyPmClockBackupStruct\r
-{\r
-    /* CyPmSaveClocks()/CyPmRestoreClocks() */\r
-    uint8  enClkA;              /* Analog clocks enable         */\r
-    uint8  enClkD;              /* Digital clocks enable        */\r
-    uint8  masterClkSrc;        /* The Master clock source      */\r
-    uint8  imoFreq;             /* IMO frequency (reg's value)  */\r
-    uint8  imoUsbClk;           /* IMO USB CLK (reg's value)    */\r
-    uint8  flashWaitCycles;     /* Flash wait cycles            */\r
-    uint8  imoEnable;           /* IMO enable in Active mode    */\r
-    uint8  imoClkSrc;           /* The IMO output               */\r
-    uint8  clkImoSrc;\r
-    uint8  imo2x;               /* IMO doubler enable state     */\r
-    uint8  clkSyncDiv;          /* Master clk divider           */\r
-    uint16 clkBusDiv;           /* The clk_bus divider          */\r
-    uint8  pllEnableState;      /* PLL enable state             */\r
-    uint8  xmhzEnableState;     /* XM HZ enable state           */\r
-    uint8  clkDistDelay;        /* Delay for clk_bus and ACLKs  */\r
-\r
-} CY_PM_CLOCK_BACKUP_STRUCT;\r
-\r
-\r
-typedef struct cyPmBackupStruct\r
-{\r
-    uint8 iloPowerMode;         /* ILO power mode           */\r
-    uint8 ilo1kEnable;          /* ILO 1K enable state      */\r
-    uint8 ilo100kEnable;        /* ILO 100K enable state    */\r
-\r
-    uint8 slpTrBypass;          /* Sleep Trim Bypass        */\r
-\r
-    #if(CY_PSOC3)\r
-\r
-        uint8 swvClkEnabled;    /* SWV clock enable state   */\r
-        uint8 prt1Dm;           /* Ports drive mode configuration */\r
-        uint8 hardwareBuzz;\r
-\r
-    #endif  /* (CY_PSOC3)  */\r
-\r
-    uint8 wakeupCfg0;       /* Wake up configuration 0  */\r
-    uint8 wakeupCfg1;       /* Wake up configuration 1  */\r
-    uint8 wakeupCfg2;       /* Wake up configuration 2  */\r
-\r
-    uint8 wakeupTrim0;\r
-    uint8 wakeupTrim1;\r
-\r
-    uint8 scctData[28u];   /* SC/CT routing registers  */\r
-\r
-    /* CyPmHviLviSaveDisable()/CyPmHviLviRestore() */\r
-    uint8 lvidEn;\r
-    uint8 lvidTrip;\r
-    uint8 lviaEn;\r
-    uint8 lviaTrip;\r
-    uint8 hviaEn;\r
-    uint8 lvidRst;\r
-    uint8 lviaRst;\r
-\r
-    uint8 imoActFreq;       /* Last moment IMO change   */\r
-    uint8 imoActFreq12Mhz;  /* 12 MHz or not            */\r
-\r
-    uint8 boostRefExt;      /* Boost reference selection */\r
-\r
-} CY_PM_BACKUP_STRUCT;\r
-\r
-\r
-/***************************************\r
-* Registers\r
-***************************************/\r
-\r
-/* Power Mode Wakeup Trim Register 1 */\r
-#define CY_PM_PWRSYS_WAKE_TR1_REG           (* (reg8 *) CYREG_PWRSYS_WAKE_TR1 )\r
-#define CY_PM_PWRSYS_WAKE_TR1_PTR           (  (reg8 *) CYREG_PWRSYS_WAKE_TR1 )\r
-\r
-/* Master clock Divider Value Register */\r
-#define CY_PM_CLKDIST_MSTR0_REG             (* (reg8 *) CYREG_CLKDIST_MSTR0 )\r
-#define CY_PM_CLKDIST_MSTR0_PTR             (  (reg8 *) CYREG_CLKDIST_MSTR0 )\r
-\r
-/* Master Clock Configuration Register/CPU Divider Value */\r
-#define CY_PM_CLKDIST_MSTR1_REG             (* (reg8 *) CYREG_CLKDIST_MSTR1 )\r
-#define CY_PM_CLKDIST_MSTR1_PTR             (  (reg8 *) CYREG_CLKDIST_MSTR1 )\r
-\r
-/* Clock distribution configuration Register */\r
-#define CY_PM_CLKDIST_CR_REG                (* (reg8 *) CYREG_CLKDIST_CR )\r
-#define CY_PM_CLKDIST_CR_PTR                (  (reg8 *) CYREG_CLKDIST_CR )\r
-\r
-/* CLK_BUS LSB Divider Value Register */\r
-#define CY_PM_CLK_BUS_LSB_DIV_REG           (* (reg8 *) CYREG_CLKDIST_BCFG0 )\r
-#define CY_PM_CLK_BUS_LSB_DIV_PTR           (  (reg8 *) CYREG_CLKDIST_BCFG0 )\r
-\r
-/* CLK_BUS MSB Divider Value Register */\r
-#define CY_PM_CLK_BUS_MSB_DIV_REG           (* (reg8 *) CYREG_CLKDIST_BCFG1 )\r
-#define CY_PM_CLK_BUS_MSB_DIV_PTR           (  (reg8 *) CYREG_CLKDIST_BCFG1 )\r
-\r
-/* CLK_BUS Configuration Register */\r
-#define CLK_BUS_CFG_REG                     (* (reg8 *) CYREG_CLKDIST_BCFG2 )\r
-#define CLK_BUS_CFG_PTR                     (  (reg8 *) CYREG_CLKDIST_BCFG2 )\r
-\r
-/* Power Mode Control/Status Register */\r
-#define CY_PM_MODE_CSR_REG                  (* (reg8 *) CYREG_PM_MODE_CSR )\r
-#define CY_PM_MODE_CSR_PTR                  (  (reg8 *) CYREG_PM_MODE_CSR )\r
-\r
-/* Power System Control Register 1 */\r
-#define CY_PM_PWRSYS_CR1_REG                (* (reg8 *) CYREG_PWRSYS_CR1 )\r
-#define CY_PM_PWRSYS_CR1_PTR                (  (reg8 *) CYREG_PWRSYS_CR1 )\r
-\r
-/* Power System Control Register 0 */\r
-#define CY_PM_PWRSYS_CR0_REG                (* (reg8 *) CYREG_PWRSYS_CR0 )\r
-#define CY_PM_PWRSYS_CR0_PTR                (  (reg8 *) CYREG_PWRSYS_CR0 )\r
-\r
-/* Internal Low-speed Oscillator Control Register 0 */\r
-#define CY_PM_SLOWCLK_ILO_CR0_REG           (* (reg8 *) CYREG_SLOWCLK_ILO_CR0 )\r
-#define CY_PM_SLOWCLK_ILO_CR0_PTR           (  (reg8 *) CYREG_SLOWCLK_ILO_CR0 )\r
-\r
-/* External 32kHz Crystal Oscillator Control Register */\r
-#define CY_PM_SLOWCLK_X32_CR_REG            (* (reg8 *) CYREG_SLOWCLK_X32_CR )\r
-#define CY_PM_SLOWCLK_X32_CR_PTR            (  (reg8 *) CYREG_SLOWCLK_X32_CR )\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* MLOGIC Debug Register */\r
-    #define CY_PM_MLOGIC_DBG_REG            (* (reg8 *) CYREG_MLOGIC_DEBUG )\r
-    #define CY_PM_MLOGIC_DBG_PTR            (  (reg8 *) CYREG_MLOGIC_DEBUG )\r
-\r
-    /* Port Pin Configuration Register */\r
-    #define CY_PM_PRT1_PC3_REG              (* (reg8 *) CYREG_PRT1_PC3 )\r
-    #define CY_PM_PRT1_PC3_PTR              (  (reg8 *) CYREG_PRT1_PC3 )\r
-\r
-#endif /* (CY_PSOC3) */\r
-\r
-\r
-/* Sleep Regulator Trim Register */\r
-#define CY_PM_PWRSYS_SLP_TR_REG         (* (reg8 *) CYREG_PWRSYS_SLP_TR )\r
-#define CY_PM_PWRSYS_SLP_TR_PTR         (  (reg8 *) CYREG_PWRSYS_SLP_TR )\r
-\r
-\r
-/* Reset System Control Register */\r
-#define CY_PM_RESET_CR1_REG                 (* (reg8 *) CYREG_RESET_CR1 )\r
-#define CY_PM_RESET_CR1_PTR                 (  (reg8 *) CYREG_RESET_CR1 )\r
-\r
-/* Power Mode Wakeup Trim Register 0 */\r
-#define CY_PM_PWRSYS_WAKE_TR0_REG           (* (reg8 *) CYREG_PWRSYS_WAKE_TR0 )\r
-#define CY_PM_PWRSYS_WAKE_TR0_PTR           (  (reg8 *) CYREG_PWRSYS_WAKE_TR0 )\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* Power Mode Wakeup Trim Register 2 */\r
-    #define CY_PM_PWRSYS_WAKE_TR2_REG           (* (reg8 *) CYREG_PWRSYS_WAKE_TR2 )\r
-    #define CY_PM_PWRSYS_WAKE_TR2_PTR           (  (reg8 *) CYREG_PWRSYS_WAKE_TR2 )\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-/* Power Manager Interrupt Status Register */\r
-#define CY_PM_INT_SR_REG                    (* (reg8 *) CYREG_PM_INT_SR )\r
-#define CY_PM_INT_SR_PTR                    (  (reg8 *) CYREG_PM_INT_SR )\r
-\r
-/* Active Power Mode Configuration Register 0 */\r
-#define CY_PM_ACT_CFG0_REG                  (* (reg8 *) CYREG_PM_ACT_CFG0 )\r
-#define CY_PM_ACT_CFG0_PTR                  (  (reg8 *) CYREG_PM_ACT_CFG0 )\r
-\r
-/* Active Power Mode Configuration Register 1 */\r
-#define CY_PM_ACT_CFG1_REG                  (* (reg8 *) CYREG_PM_ACT_CFG1 )\r
-#define CY_PM_ACT_CFG1_PTR                  (  (reg8 *) CYREG_PM_ACT_CFG1 )\r
-\r
-/* Active Power Mode Configuration Register 2 */\r
-#define CY_PM_ACT_CFG2_REG                  (* (reg8 *) CYREG_PM_ACT_CFG2 )\r
-#define CY_PM_ACT_CFG2_PTR                  (  (reg8 *) CYREG_PM_ACT_CFG2 )\r
-\r
-/* Boost Control 1 */\r
-#define CY_PM_BOOST_CR1_REG                 (* (reg8 *) CYREG_BOOST_CR1 )\r
-#define CY_PM_BOOST_CR1_PTR                 (  (reg8 *) CYREG_BOOST_CR1 )\r
-\r
-/* Timewheel Configuration Register 0 */\r
-#define CY_PM_TW_CFG0_REG                   (* (reg8 *) CYREG_PM_TW_CFG0 )\r
-#define CY_PM_TW_CFG0_PTR                   (  (reg8 *) CYREG_PM_TW_CFG0 )\r
-\r
-/* Timewheel Configuration Register 1 */\r
-#define CY_PM_TW_CFG1_REG                   (* (reg8 *) CYREG_PM_TW_CFG1 )\r
-#define CY_PM_TW_CFG1_PTR                   (  (reg8 *) CYREG_PM_TW_CFG1 )\r
-\r
-/* Timewheel Configuration Register 2 */\r
-#define CY_PM_TW_CFG2_REG                   (* (reg8 *) CYREG_PM_TW_CFG2 )\r
-#define CY_PM_TW_CFG2_PTR                   (  (reg8 *) CYREG_PM_TW_CFG2 )\r
-\r
-/* PLL Status Register */\r
-#define CY_PM_FASTCLK_PLL_SR_REG            (*(reg8 *) CYREG_FASTCLK_PLL_SR )\r
-#define CY_PM_FASTCLK_PLL_SR_PTR            ( (reg8 *) CYREG_FASTCLK_PLL_SR )\r
-\r
-/* Internal Main Oscillator Control Register */\r
-#define CY_PM_FASTCLK_IMO_CR_REG            (* (reg8 *) CYREG_FASTCLK_IMO_CR )\r
-#define CY_PM_FASTCLK_IMO_CR_PTR            (  (reg8 *) CYREG_FASTCLK_IMO_CR )\r
-\r
-/* PLL Configuration Register */\r
-#define CY_PM_FASTCLK_PLL_CFG0_REG          (* (reg8 *) CYREG_FASTCLK_PLL_CFG0 )\r
-#define CY_PM_FASTCLK_PLL_CFG0_PTR          (  (reg8 *) CYREG_FASTCLK_PLL_CFG0 )\r
-\r
-/* External 4-33 MHz Crystal Oscillator Status and Control Register */\r
-#define CY_PM_FASTCLK_XMHZ_CSR_REG          (* (reg8 *) CYREG_FASTCLK_XMHZ_CSR )\r
-#define CY_PM_FASTCLK_XMHZ_CSR_PTR          (  (reg8 *) CYREG_FASTCLK_XMHZ_CSR )\r
-\r
-/* Delay block Configuration Register */\r
-#define CY_PM_CLKDIST_DELAY_REG             (* (reg8 *) CYREG_CLKDIST_DLY1 )\r
-#define CY_PM_CLKDIST_DELAY_PTR             (  (reg8 *) CYREG_CLKDIST_DLY1 )\r
-\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* Cache Control Register */\r
-    #define CY_PM_CACHE_CR_REG              (* (reg8 *) CYREG_CACHE_CR )\r
-    #define CY_PM_CACHE_CR_PTR              (  (reg8 *) CYREG_CACHE_CR )\r
-\r
-#else   /* Device is PSoC 5 */\r
-\r
-    /* Cache Control Register */\r
-    #define CY_PM_CACHE_CR_REG              (* (reg8 *) CYREG_CACHE_CC_CTL )\r
-    #define CY_PM_CACHE_CR_PTR              (  (reg8 *) CYREG_CACHE_CC_CTL )\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/* Power Mode Wakeup Mask Configuration Register 0 */\r
-#define CY_PM_WAKEUP_CFG0_REG           (* (reg8 *) CYREG_PM_WAKEUP_CFG0 )\r
-#define CY_PM_WAKEUP_CFG0_PTR           (  (reg8 *) CYREG_PM_WAKEUP_CFG0 )\r
-\r
-/* Power Mode Wakeup Mask Configuration Register 1 */\r
-#define CY_PM_WAKEUP_CFG1_REG           (* (reg8 *) CYREG_PM_WAKEUP_CFG1 )\r
-#define CY_PM_WAKEUP_CFG1_PTR           (  (reg8 *) CYREG_PM_WAKEUP_CFG1 )\r
-\r
-/* Power Mode Wakeup Mask Configuration Register 2 */\r
-#define CY_PM_WAKEUP_CFG2_REG           (* (reg8 *) CYREG_PM_WAKEUP_CFG2 )\r
-#define CY_PM_WAKEUP_CFG2_PTR           (  (reg8 *) CYREG_PM_WAKEUP_CFG2 )\r
-\r
-/* Boost Control 2 */\r
-#define CY_PM_BOOST_CR2_REG           (* (reg8 *) CYREG_BOOST_CR2 )\r
-#define CY_PM_BOOST_CR2_PTR           (  (reg8 *) CYREG_BOOST_CR2 )\r
-\r
-\r
-/***************************************\r
-* Register Constants\r
-***************************************/\r
-\r
-/* Internal Main Oscillator Control Register */\r
-\r
-#define CY_PM_FASTCLK_IMO_CR_FREQ_MASK  (0x07u)    /* IMO frequency mask    */\r
-#define CY_PM_FASTCLK_IMO_CR_FREQ_12MHZ (0x00u)    /* IMO frequency 12 MHz  */\r
-#define CY_PM_FASTCLK_IMO_CR_F2XON      (0x10u)    /* IMO doubler enable    */\r
-#define CY_PM_FASTCLK_IMO_CR_USB        (0x40u)    /* IMO is in USB mode    */\r
-\r
-#define CY_PM_MASTER_CLK_SRC_IMO        (0u)\r
-#define CY_PM_MASTER_CLK_SRC_PLL        (1u)\r
-#define CY_PM_MASTER_CLK_SRC_XTAL       (2u)\r
-#define CY_PM_MASTER_CLK_SRC_DSI        (3u)\r
-#define CY_PM_MASTER_CLK_SRC_MASK       (3u)\r
-\r
-#define CY_PM_PLL_CFG0_ENABLE           (0x01u)     /* PLL enable             */\r
-#define CY_PM_PLL_STATUS_LOCK           (0x01u)     /* PLL Lock Status        */\r
-#define CY_PM_XMHZ_CSR_ENABLE           (0x01u)     /* Enable X MHz OSC       */\r
-#define CY_PM_XMHZ_CSR_XERR             (0x80u)     /* High indicates failure */\r
-#define CY_PM_BOOST_ENABLE              (0x08u)     /* Boost enable           */\r
-#define CY_PM_ILO_CR0_EN_1K             (0x02u)     /* Enable 1kHz ILO        */\r
-#define CY_PM_ILO_CR0_EN_100K           (0x04u)     /* Enable 100kHz ILO      */\r
-#define CY_PM_ILO_CR0_PD_MODE           (0x10u)     /* Power down mode for ILO*/\r
-#define CY_PM_X32_CR_X32EN              (0x01u)     /* Enable 32kHz OSC       */\r
-\r
-#define CY_PM_CTW_IE                    (0x08u)     /* CTW interrupt enable   */\r
-#define CY_PM_CTW_EN                    (0x04u)     /* CTW enable             */\r
-#define CY_PM_FTW_IE                    (0x02u)     /* FTW interrupt enable   */\r
-#define CY_PM_FTW_EN                    (0x01u)     /* FTW enable             */\r
-#define CY_PM_1PPS_EN                   (0x10u)     /* 1PPS enable            */\r
-#define CY_PM_1PPS_IE                   (0x20u)     /* 1PPS interrupt enable  */\r
-\r
-\r
-#define CY_PM_ACT_EN_CLK_A_MASK         (0x0Fu)\r
-#define CY_PM_ACT_EN_CLK_D_MASK         (0xFFu)\r
-\r
-#define CY_PM_DIV_BY_ONE                (0x00u)\r
-\r
-/* Internal Main Oscillator Control Register */\r
-#define CY_PM_FASTCLK_IMO_CR_XCLKEN     (0x20u)\r
-\r
-/* Clock distribution configuration Register */\r
-#define CY_PM_CLKDIST_IMO_OUT_MASK      (0x30u)\r
-#define CY_PM_CLKDIST_IMO_OUT_IMO       (0x00u)\r
-#define CY_PM_CLKDIST_IMO2X_SRC         (0x40u)\r
-\r
-/* Waiting for the hibernate/sleep regulator to stabilize */\r
-#define CY_PM_MODE_CSR_PWRUP_PULSE_Q    (0x08u)\r
-\r
-#define CY_PM_MODE_CSR_ACTIVE           (0x00u)     /* Active power mode      */\r
-#define CY_PM_MODE_CSR_ALT_ACT          (0x01u)     /* Alternate Active power */\r
-#define CY_PM_MODE_CSR_SLEEP            (0x03u)     /* Sleep power mode       */\r
-#define CY_PM_MODE_CSR_HIBERNATE        (0x04u)     /* Hibernate power mode   */\r
-#define CY_PM_MODE_CSR_MASK             (0x07u)\r
-\r
-/* I2C regulator backup enable */\r
-#define CY_PM_PWRSYS_CR1_I2CREG_BACKUP  (0x04u)\r
-\r
-/* When set, prepares the system to disable the LDO-A */\r
-#define CY_PM_PWRSYS_CR1_LDOA_ISO       (0x01u)\r
-\r
-/* When set, disables the analog LDO regulator */\r
-#define CY_PM_PWRSYS_CR1_LDOA_DIS       (0x02u)\r
-\r
-#define CY_PM_PWRSYS_WAKE_TR2_VCCD_CLK_DET  (0x04u)\r
-\r
-#define CY_PM_FTW_INT                   (0x01u)     /* FTW event has occured  */\r
-#define CY_PM_CTW_INT                   (0x02u)     /* CTW event has occured  */\r
-#define CY_PM_ONEPPS_INT                (0x04u)     /* 1PPS event has occured */\r
-\r
-/* Active Power Mode Configuration Register 0 */\r
-#define CY_PM_ACT_CFG0_IMO              (0x10u)     /* IMO enable in Active */\r
-\r
-/* Cache Control Register (same mask for all device revisions) */\r
-#define CY_PM_CACHE_CR_CYCLES_MASK      (0xC0u)\r
-\r
-/* Bus Clock divider to divide-by-one */\r
-#define CY_PM_BUS_CLK_DIV_BY_ONE        (0x00u)\r
-\r
-/* HVI/LVI feature on the external analog and digital supply mask */\r
-#define CY_PM_RESET_CR1_HVI_LVI_EN_MASK (0x07u)\r
-\r
-/* The high-voltage-interrupt feature on the external analog supply */\r
-#define CY_PM_RESET_CR1_HVIA_EN         (0x04u)\r
-\r
-/* The low-voltage-interrupt feature on the external analog supply */\r
-#define CY_PM_RESET_CR1_LVIA_EN         (0x02u)\r
-\r
-/* The low-voltage-interrupt feature on the external digital supply */\r
-#define CY_PM_RESET_CR1_LVID_EN         (0x01u)\r
-\r
-/* Allows the system to program delays on clk_sync_d */\r
-#define CY_PM_CLKDIST_DELAY_EN          (0x04u)\r
-\r
-\r
-#define CY_PM_WAKEUP_SRC_CMPS_MASK      (0x000Fu)\r
-\r
-/* Holdoff mask sleep trim */\r
-#define CY_PM_PWRSYS_SLP_TR_HIBSLP_HOLDOFF_MASK     (0x1Fu)\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* CPU clock divider mask */\r
-    #define CY_PM_CLKDIST_CPU_DIV_MASK          (0xF0u)\r
-\r
-    /* Serial Wire View (SWV) clock enable */\r
-    #define CY_PM_MLOGIC_DBG_SWV_CLK_EN         (0x04u)\r
-\r
-    /* Port drive mode */\r
-    #define CY_PM_PRT1_PC3_DM_MASK              (0xf1u)\r
-\r
-    /* Mode 6, stong pull-up, strong pull-down */\r
-    #define CY_PM_PRT1_PC3_DM_STRONG            (0x0Cu)\r
-\r
-    /* When set, enables buzz wakeups */\r
-    #define CY_PM_PWRSYS_WAKE_TR2_EN_BUZZ       (0x01u)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/* Disable the sleep regulator and shorts vccd to vpwrsleep */\r
-#define CY_PM_PWRSYS_SLP_TR_BYPASS          (0x10u)\r
-\r
-/* Boost Control 2: Select external precision reference */\r
-#define CY_PM_BOOST_CR2_EREFSEL_EXT     (0x08u)\r
-\r
-#if(CY_PSOC3)\r
-\r
-    #define CY_PM_PWRSYS_WAKE_TR0       (0xFFu)\r
-    #define CY_PM_PWRSYS_WAKE_TR1       (0x90u)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-#if(CY_PSOC5)\r
-\r
-    #define CY_PM_PWRSYS_WAKE_TR0       (0xFFu)\r
-    #define CY_PM_PWRSYS_WAKE_TR1       (0xB0u)\r
-\r
-#endif  /* (CY_PSOC5) */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    /* Was removed as redundant */\r
-    #define CY_PM_FTW_INTERVAL_MASK    (0xFFu)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-/* Was removed as redundant */\r
-#define CY_PM_CTW_INTERVAL_MASK         (0x0Fu)\r
-\r
-#endif  /* (CY_BOOT_CYPM_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice.h
deleted file mode 100755 (executable)
index 5f1b198..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice.h
+++ /dev/null
@@ -1,5360 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cydevice.h\r
-* OBSOLETE: Do not use this file. Use the _trm version instead.\r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* DESCRIPTION:\r
-* This file provides all of the address values for the entire PSoC device.\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-#if !defined(CYDEVICE_H)\r
-#define CYDEVICE_H\r
-#define CYDEV_FLASH_BASE 0x00000000u\r
-#define CYDEV_FLASH_SIZE 0x00020000u\r
-#define CYDEV_FLASH_DATA_MBASE 0x00000000u\r
-#define CYDEV_FLASH_DATA_MSIZE 0x00020000u\r
-#define CYDEV_SRAM_BASE 0x1fffc000u\r
-#define CYDEV_SRAM_SIZE 0x00008000u\r
-#define CYDEV_SRAM_CODE64K_MBASE 0x1fff8000u\r
-#define CYDEV_SRAM_CODE64K_MSIZE 0x00004000u\r
-#define CYDEV_SRAM_CODE32K_MBASE 0x1fffc000u\r
-#define CYDEV_SRAM_CODE32K_MSIZE 0x00002000u\r
-#define CYDEV_SRAM_CODE16K_MBASE 0x1fffe000u\r
-#define CYDEV_SRAM_CODE16K_MSIZE 0x00001000u\r
-#define CYDEV_SRAM_CODE_MBASE 0x1fffc000u\r
-#define CYDEV_SRAM_CODE_MSIZE 0x00004000u\r
-#define CYDEV_SRAM_DATA_MBASE 0x20000000u\r
-#define CYDEV_SRAM_DATA_MSIZE 0x00004000u\r
-#define CYDEV_SRAM_DATA16K_MBASE 0x20001000u\r
-#define CYDEV_SRAM_DATA16K_MSIZE 0x00001000u\r
-#define CYDEV_SRAM_DATA32K_MBASE 0x20002000u\r
-#define CYDEV_SRAM_DATA32K_MSIZE 0x00002000u\r
-#define CYDEV_SRAM_DATA64K_MBASE 0x20004000u\r
-#define CYDEV_SRAM_DATA64K_MSIZE 0x00004000u\r
-#define CYDEV_DMA_BASE 0x20008000u\r
-#define CYDEV_DMA_SIZE 0x00008000u\r
-#define CYDEV_DMA_SRAM64K_MBASE 0x20008000u\r
-#define CYDEV_DMA_SRAM64K_MSIZE 0x00004000u\r
-#define CYDEV_DMA_SRAM32K_MBASE 0x2000c000u\r
-#define CYDEV_DMA_SRAM32K_MSIZE 0x00002000u\r
-#define CYDEV_DMA_SRAM16K_MBASE 0x2000e000u\r
-#define CYDEV_DMA_SRAM16K_MSIZE 0x00001000u\r
-#define CYDEV_DMA_SRAM_MBASE 0x2000f000u\r
-#define CYDEV_DMA_SRAM_MSIZE 0x00001000u\r
-#define CYDEV_CLKDIST_BASE 0x40004000u\r
-#define CYDEV_CLKDIST_SIZE 0x00000110u\r
-#define CYDEV_CLKDIST_CR 0x40004000u\r
-#define CYDEV_CLKDIST_LD 0x40004001u\r
-#define CYDEV_CLKDIST_WRK0 0x40004002u\r
-#define CYDEV_CLKDIST_WRK1 0x40004003u\r
-#define CYDEV_CLKDIST_MSTR0 0x40004004u\r
-#define CYDEV_CLKDIST_MSTR1 0x40004005u\r
-#define CYDEV_CLKDIST_BCFG0 0x40004006u\r
-#define CYDEV_CLKDIST_BCFG1 0x40004007u\r
-#define CYDEV_CLKDIST_BCFG2 0x40004008u\r
-#define CYDEV_CLKDIST_UCFG 0x40004009u\r
-#define CYDEV_CLKDIST_DLY0 0x4000400au\r
-#define CYDEV_CLKDIST_DLY1 0x4000400bu\r
-#define CYDEV_CLKDIST_DMASK 0x40004010u\r
-#define CYDEV_CLKDIST_AMASK 0x40004014u\r
-#define CYDEV_CLKDIST_DCFG0_BASE 0x40004080u\r
-#define CYDEV_CLKDIST_DCFG0_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG0_CFG0 0x40004080u\r
-#define CYDEV_CLKDIST_DCFG0_CFG1 0x40004081u\r
-#define CYDEV_CLKDIST_DCFG0_CFG2 0x40004082u\r
-#define CYDEV_CLKDIST_DCFG1_BASE 0x40004084u\r
-#define CYDEV_CLKDIST_DCFG1_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG1_CFG0 0x40004084u\r
-#define CYDEV_CLKDIST_DCFG1_CFG1 0x40004085u\r
-#define CYDEV_CLKDIST_DCFG1_CFG2 0x40004086u\r
-#define CYDEV_CLKDIST_DCFG2_BASE 0x40004088u\r
-#define CYDEV_CLKDIST_DCFG2_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG2_CFG0 0x40004088u\r
-#define CYDEV_CLKDIST_DCFG2_CFG1 0x40004089u\r
-#define CYDEV_CLKDIST_DCFG2_CFG2 0x4000408au\r
-#define CYDEV_CLKDIST_DCFG3_BASE 0x4000408cu\r
-#define CYDEV_CLKDIST_DCFG3_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG3_CFG0 0x4000408cu\r
-#define CYDEV_CLKDIST_DCFG3_CFG1 0x4000408du\r
-#define CYDEV_CLKDIST_DCFG3_CFG2 0x4000408eu\r
-#define CYDEV_CLKDIST_DCFG4_BASE 0x40004090u\r
-#define CYDEV_CLKDIST_DCFG4_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG4_CFG0 0x40004090u\r
-#define CYDEV_CLKDIST_DCFG4_CFG1 0x40004091u\r
-#define CYDEV_CLKDIST_DCFG4_CFG2 0x40004092u\r
-#define CYDEV_CLKDIST_DCFG5_BASE 0x40004094u\r
-#define CYDEV_CLKDIST_DCFG5_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG5_CFG0 0x40004094u\r
-#define CYDEV_CLKDIST_DCFG5_CFG1 0x40004095u\r
-#define CYDEV_CLKDIST_DCFG5_CFG2 0x40004096u\r
-#define CYDEV_CLKDIST_DCFG6_BASE 0x40004098u\r
-#define CYDEV_CLKDIST_DCFG6_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG6_CFG0 0x40004098u\r
-#define CYDEV_CLKDIST_DCFG6_CFG1 0x40004099u\r
-#define CYDEV_CLKDIST_DCFG6_CFG2 0x4000409au\r
-#define CYDEV_CLKDIST_DCFG7_BASE 0x4000409cu\r
-#define CYDEV_CLKDIST_DCFG7_SIZE 0x00000003u\r
-#define CYDEV_CLKDIST_DCFG7_CFG0 0x4000409cu\r
-#define CYDEV_CLKDIST_DCFG7_CFG1 0x4000409du\r
-#define CYDEV_CLKDIST_DCFG7_CFG2 0x4000409eu\r
-#define CYDEV_CLKDIST_ACFG0_BASE 0x40004100u\r
-#define CYDEV_CLKDIST_ACFG0_SIZE 0x00000004u\r
-#define CYDEV_CLKDIST_ACFG0_CFG0 0x40004100u\r
-#define CYDEV_CLKDIST_ACFG0_CFG1 0x40004101u\r
-#define CYDEV_CLKDIST_ACFG0_CFG2 0x40004102u\r
-#define CYDEV_CLKDIST_ACFG0_CFG3 0x40004103u\r
-#define CYDEV_CLKDIST_ACFG1_BASE 0x40004104u\r
-#define CYDEV_CLKDIST_ACFG1_SIZE 0x00000004u\r
-#define CYDEV_CLKDIST_ACFG1_CFG0 0x40004104u\r
-#define CYDEV_CLKDIST_ACFG1_CFG1 0x40004105u\r
-#define CYDEV_CLKDIST_ACFG1_CFG2 0x40004106u\r
-#define CYDEV_CLKDIST_ACFG1_CFG3 0x40004107u\r
-#define CYDEV_CLKDIST_ACFG2_BASE 0x40004108u\r
-#define CYDEV_CLKDIST_ACFG2_SIZE 0x00000004u\r
-#define CYDEV_CLKDIST_ACFG2_CFG0 0x40004108u\r
-#define CYDEV_CLKDIST_ACFG2_CFG1 0x40004109u\r
-#define CYDEV_CLKDIST_ACFG2_CFG2 0x4000410au\r
-#define CYDEV_CLKDIST_ACFG2_CFG3 0x4000410bu\r
-#define CYDEV_CLKDIST_ACFG3_BASE 0x4000410cu\r
-#define CYDEV_CLKDIST_ACFG3_SIZE 0x00000004u\r
-#define CYDEV_CLKDIST_ACFG3_CFG0 0x4000410cu\r
-#define CYDEV_CLKDIST_ACFG3_CFG1 0x4000410du\r
-#define CYDEV_CLKDIST_ACFG3_CFG2 0x4000410eu\r
-#define CYDEV_CLKDIST_ACFG3_CFG3 0x4000410fu\r
-#define CYDEV_FASTCLK_BASE 0x40004200u\r
-#define CYDEV_FASTCLK_SIZE 0x00000026u\r
-#define CYDEV_FASTCLK_IMO_BASE 0x40004200u\r
-#define CYDEV_FASTCLK_IMO_SIZE 0x00000001u\r
-#define CYDEV_FASTCLK_IMO_CR 0x40004200u\r
-#define CYDEV_FASTCLK_XMHZ_BASE 0x40004210u\r
-#define CYDEV_FASTCLK_XMHZ_SIZE 0x00000004u\r
-#define CYDEV_FASTCLK_XMHZ_CSR 0x40004210u\r
-#define CYDEV_FASTCLK_XMHZ_CFG0 0x40004212u\r
-#define CYDEV_FASTCLK_XMHZ_CFG1 0x40004213u\r
-#define CYDEV_FASTCLK_PLL_BASE 0x40004220u\r
-#define CYDEV_FASTCLK_PLL_SIZE 0x00000006u\r
-#define CYDEV_FASTCLK_PLL_CFG0 0x40004220u\r
-#define CYDEV_FASTCLK_PLL_CFG1 0x40004221u\r
-#define CYDEV_FASTCLK_PLL_P 0x40004222u\r
-#define CYDEV_FASTCLK_PLL_Q 0x40004223u\r
-#define CYDEV_FASTCLK_PLL_SR 0x40004225u\r
-#define CYDEV_SLOWCLK_BASE 0x40004300u\r
-#define CYDEV_SLOWCLK_SIZE 0x0000000bu\r
-#define CYDEV_SLOWCLK_ILO_BASE 0x40004300u\r
-#define CYDEV_SLOWCLK_ILO_SIZE 0x00000002u\r
-#define CYDEV_SLOWCLK_ILO_CR0 0x40004300u\r
-#define CYDEV_SLOWCLK_ILO_CR1 0x40004301u\r
-#define CYDEV_SLOWCLK_X32_BASE 0x40004308u\r
-#define CYDEV_SLOWCLK_X32_SIZE 0x00000003u\r
-#define CYDEV_SLOWCLK_X32_CR 0x40004308u\r
-#define CYDEV_SLOWCLK_X32_CFG 0x40004309u\r
-#define CYDEV_SLOWCLK_X32_TST 0x4000430au\r
-#define CYDEV_BOOST_BASE 0x40004320u\r
-#define CYDEV_BOOST_SIZE 0x00000007u\r
-#define CYDEV_BOOST_CR0 0x40004320u\r
-#define CYDEV_BOOST_CR1 0x40004321u\r
-#define CYDEV_BOOST_CR2 0x40004322u\r
-#define CYDEV_BOOST_CR3 0x40004323u\r
-#define CYDEV_BOOST_SR 0x40004324u\r
-#define CYDEV_BOOST_CR4 0x40004325u\r
-#define CYDEV_BOOST_SR2 0x40004326u\r
-#define CYDEV_PWRSYS_BASE 0x40004330u\r
-#define CYDEV_PWRSYS_SIZE 0x00000002u\r
-#define CYDEV_PWRSYS_CR0 0x40004330u\r
-#define CYDEV_PWRSYS_CR1 0x40004331u\r
-#define CYDEV_PM_BASE 0x40004380u\r
-#define CYDEV_PM_SIZE 0x00000057u\r
-#define CYDEV_PM_TW_CFG0 0x40004380u\r
-#define CYDEV_PM_TW_CFG1 0x40004381u\r
-#define CYDEV_PM_TW_CFG2 0x40004382u\r
-#define CYDEV_PM_WDT_CFG 0x40004383u\r
-#define CYDEV_PM_WDT_CR 0x40004384u\r
-#define CYDEV_PM_INT_SR 0x40004390u\r
-#define CYDEV_PM_MODE_CFG0 0x40004391u\r
-#define CYDEV_PM_MODE_CFG1 0x40004392u\r
-#define CYDEV_PM_MODE_CSR 0x40004393u\r
-#define CYDEV_PM_USB_CR0 0x40004394u\r
-#define CYDEV_PM_WAKEUP_CFG0 0x40004398u\r
-#define CYDEV_PM_WAKEUP_CFG1 0x40004399u\r
-#define CYDEV_PM_WAKEUP_CFG2 0x4000439au\r
-#define CYDEV_PM_ACT_BASE 0x400043a0u\r
-#define CYDEV_PM_ACT_SIZE 0x0000000eu\r
-#define CYDEV_PM_ACT_CFG0 0x400043a0u\r
-#define CYDEV_PM_ACT_CFG1 0x400043a1u\r
-#define CYDEV_PM_ACT_CFG2 0x400043a2u\r
-#define CYDEV_PM_ACT_CFG3 0x400043a3u\r
-#define CYDEV_PM_ACT_CFG4 0x400043a4u\r
-#define CYDEV_PM_ACT_CFG5 0x400043a5u\r
-#define CYDEV_PM_ACT_CFG6 0x400043a6u\r
-#define CYDEV_PM_ACT_CFG7 0x400043a7u\r
-#define CYDEV_PM_ACT_CFG8 0x400043a8u\r
-#define CYDEV_PM_ACT_CFG9 0x400043a9u\r
-#define CYDEV_PM_ACT_CFG10 0x400043aau\r
-#define CYDEV_PM_ACT_CFG11 0x400043abu\r
-#define CYDEV_PM_ACT_CFG12 0x400043acu\r
-#define CYDEV_PM_ACT_CFG13 0x400043adu\r
-#define CYDEV_PM_STBY_BASE 0x400043b0u\r
-#define CYDEV_PM_STBY_SIZE 0x0000000eu\r
-#define CYDEV_PM_STBY_CFG0 0x400043b0u\r
-#define CYDEV_PM_STBY_CFG1 0x400043b1u\r
-#define CYDEV_PM_STBY_CFG2 0x400043b2u\r
-#define CYDEV_PM_STBY_CFG3 0x400043b3u\r
-#define CYDEV_PM_STBY_CFG4 0x400043b4u\r
-#define CYDEV_PM_STBY_CFG5 0x400043b5u\r
-#define CYDEV_PM_STBY_CFG6 0x400043b6u\r
-#define CYDEV_PM_STBY_CFG7 0x400043b7u\r
-#define CYDEV_PM_STBY_CFG8 0x400043b8u\r
-#define CYDEV_PM_STBY_CFG9 0x400043b9u\r
-#define CYDEV_PM_STBY_CFG10 0x400043bau\r
-#define CYDEV_PM_STBY_CFG11 0x400043bbu\r
-#define CYDEV_PM_STBY_CFG12 0x400043bcu\r
-#define CYDEV_PM_STBY_CFG13 0x400043bdu\r
-#define CYDEV_PM_AVAIL_BASE 0x400043c0u\r
-#define CYDEV_PM_AVAIL_SIZE 0x00000017u\r
-#define CYDEV_PM_AVAIL_CR0 0x400043c0u\r
-#define CYDEV_PM_AVAIL_CR1 0x400043c1u\r
-#define CYDEV_PM_AVAIL_CR2 0x400043c2u\r
-#define CYDEV_PM_AVAIL_CR3 0x400043c3u\r
-#define CYDEV_PM_AVAIL_CR4 0x400043c4u\r
-#define CYDEV_PM_AVAIL_CR5 0x400043c5u\r
-#define CYDEV_PM_AVAIL_CR6 0x400043c6u\r
-#define CYDEV_PM_AVAIL_SR0 0x400043d0u\r
-#define CYDEV_PM_AVAIL_SR1 0x400043d1u\r
-#define CYDEV_PM_AVAIL_SR2 0x400043d2u\r
-#define CYDEV_PM_AVAIL_SR3 0x400043d3u\r
-#define CYDEV_PM_AVAIL_SR4 0x400043d4u\r
-#define CYDEV_PM_AVAIL_SR5 0x400043d5u\r
-#define CYDEV_PM_AVAIL_SR6 0x400043d6u\r
-#define CYDEV_PICU_BASE 0x40004500u\r
-#define CYDEV_PICU_SIZE 0x000000b0u\r
-#define CYDEV_PICU_INTTYPE_BASE 0x40004500u\r
-#define CYDEV_PICU_INTTYPE_SIZE 0x00000080u\r
-#define CYDEV_PICU_INTTYPE_PICU0_BASE 0x40004500u\r
-#define CYDEV_PICU_INTTYPE_PICU0_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE0 0x40004500u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE1 0x40004501u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE2 0x40004502u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE3 0x40004503u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE4 0x40004504u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE5 0x40004505u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE6 0x40004506u\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE7 0x40004507u\r
-#define CYDEV_PICU_INTTYPE_PICU1_BASE 0x40004508u\r
-#define CYDEV_PICU_INTTYPE_PICU1_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE0 0x40004508u\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE1 0x40004509u\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE2 0x4000450au\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE3 0x4000450bu\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE4 0x4000450cu\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE5 0x4000450du\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE6 0x4000450eu\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE7 0x4000450fu\r
-#define CYDEV_PICU_INTTYPE_PICU2_BASE 0x40004510u\r
-#define CYDEV_PICU_INTTYPE_PICU2_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE0 0x40004510u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE1 0x40004511u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE2 0x40004512u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE3 0x40004513u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE4 0x40004514u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE5 0x40004515u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE6 0x40004516u\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE7 0x40004517u\r
-#define CYDEV_PICU_INTTYPE_PICU3_BASE 0x40004518u\r
-#define CYDEV_PICU_INTTYPE_PICU3_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE0 0x40004518u\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE1 0x40004519u\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE2 0x4000451au\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE3 0x4000451bu\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE4 0x4000451cu\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE5 0x4000451du\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE6 0x4000451eu\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE7 0x4000451fu\r
-#define CYDEV_PICU_INTTYPE_PICU4_BASE 0x40004520u\r
-#define CYDEV_PICU_INTTYPE_PICU4_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE0 0x40004520u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE1 0x40004521u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE2 0x40004522u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE3 0x40004523u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE4 0x40004524u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE5 0x40004525u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE6 0x40004526u\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE7 0x40004527u\r
-#define CYDEV_PICU_INTTYPE_PICU5_BASE 0x40004528u\r
-#define CYDEV_PICU_INTTYPE_PICU5_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE0 0x40004528u\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE1 0x40004529u\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE2 0x4000452au\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE3 0x4000452bu\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE4 0x4000452cu\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE5 0x4000452du\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE6 0x4000452eu\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE7 0x4000452fu\r
-#define CYDEV_PICU_INTTYPE_PICU6_BASE 0x40004530u\r
-#define CYDEV_PICU_INTTYPE_PICU6_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE0 0x40004530u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE1 0x40004531u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE2 0x40004532u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE3 0x40004533u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE4 0x40004534u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE5 0x40004535u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE6 0x40004536u\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE7 0x40004537u\r
-#define CYDEV_PICU_INTTYPE_PICU12_BASE 0x40004560u\r
-#define CYDEV_PICU_INTTYPE_PICU12_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE0 0x40004560u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE1 0x40004561u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE2 0x40004562u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE3 0x40004563u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE4 0x40004564u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE5 0x40004565u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE6 0x40004566u\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE7 0x40004567u\r
-#define CYDEV_PICU_INTTYPE_PICU15_BASE 0x40004578u\r
-#define CYDEV_PICU_INTTYPE_PICU15_SIZE 0x00000008u\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE0 0x40004578u\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE1 0x40004579u\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE2 0x4000457au\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE3 0x4000457bu\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE4 0x4000457cu\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE5 0x4000457du\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE6 0x4000457eu\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE7 0x4000457fu\r
-#define CYDEV_PICU_STAT_BASE 0x40004580u\r
-#define CYDEV_PICU_STAT_SIZE 0x00000010u\r
-#define CYDEV_PICU_STAT_PICU0_BASE 0x40004580u\r
-#define CYDEV_PICU_STAT_PICU0_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU0_INTSTAT 0x40004580u\r
-#define CYDEV_PICU_STAT_PICU1_BASE 0x40004581u\r
-#define CYDEV_PICU_STAT_PICU1_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU1_INTSTAT 0x40004581u\r
-#define CYDEV_PICU_STAT_PICU2_BASE 0x40004582u\r
-#define CYDEV_PICU_STAT_PICU2_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU2_INTSTAT 0x40004582u\r
-#define CYDEV_PICU_STAT_PICU3_BASE 0x40004583u\r
-#define CYDEV_PICU_STAT_PICU3_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU3_INTSTAT 0x40004583u\r
-#define CYDEV_PICU_STAT_PICU4_BASE 0x40004584u\r
-#define CYDEV_PICU_STAT_PICU4_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU4_INTSTAT 0x40004584u\r
-#define CYDEV_PICU_STAT_PICU5_BASE 0x40004585u\r
-#define CYDEV_PICU_STAT_PICU5_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU5_INTSTAT 0x40004585u\r
-#define CYDEV_PICU_STAT_PICU6_BASE 0x40004586u\r
-#define CYDEV_PICU_STAT_PICU6_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU6_INTSTAT 0x40004586u\r
-#define CYDEV_PICU_STAT_PICU12_BASE 0x4000458cu\r
-#define CYDEV_PICU_STAT_PICU12_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU12_INTSTAT 0x4000458cu\r
-#define CYDEV_PICU_STAT_PICU15_BASE 0x4000458fu\r
-#define CYDEV_PICU_STAT_PICU15_SIZE 0x00000001u\r
-#define CYDEV_PICU_STAT_PICU15_INTSTAT 0x4000458fu\r
-#define CYDEV_PICU_SNAP_BASE 0x40004590u\r
-#define CYDEV_PICU_SNAP_SIZE 0x00000010u\r
-#define CYDEV_PICU_SNAP_PICU0_BASE 0x40004590u\r
-#define CYDEV_PICU_SNAP_PICU0_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU0_SNAP 0x40004590u\r
-#define CYDEV_PICU_SNAP_PICU1_BASE 0x40004591u\r
-#define CYDEV_PICU_SNAP_PICU1_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU1_SNAP 0x40004591u\r
-#define CYDEV_PICU_SNAP_PICU2_BASE 0x40004592u\r
-#define CYDEV_PICU_SNAP_PICU2_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU2_SNAP 0x40004592u\r
-#define CYDEV_PICU_SNAP_PICU3_BASE 0x40004593u\r
-#define CYDEV_PICU_SNAP_PICU3_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU3_SNAP 0x40004593u\r
-#define CYDEV_PICU_SNAP_PICU4_BASE 0x40004594u\r
-#define CYDEV_PICU_SNAP_PICU4_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU4_SNAP 0x40004594u\r
-#define CYDEV_PICU_SNAP_PICU5_BASE 0x40004595u\r
-#define CYDEV_PICU_SNAP_PICU5_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU5_SNAP 0x40004595u\r
-#define CYDEV_PICU_SNAP_PICU6_BASE 0x40004596u\r
-#define CYDEV_PICU_SNAP_PICU6_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU6_SNAP 0x40004596u\r
-#define CYDEV_PICU_SNAP_PICU12_BASE 0x4000459cu\r
-#define CYDEV_PICU_SNAP_PICU12_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU12_SNAP 0x4000459cu\r
-#define CYDEV_PICU_SNAP_PICU_15_BASE 0x4000459fu\r
-#define CYDEV_PICU_SNAP_PICU_15_SIZE 0x00000001u\r
-#define CYDEV_PICU_SNAP_PICU_15_SNAP_15 0x4000459fu\r
-#define CYDEV_PICU_DISABLE_COR_BASE 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_SIZE 0x00000010u\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_BASE 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_BASE 0x400045a1u\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR 0x400045a1u\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_BASE 0x400045a2u\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR 0x400045a2u\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_BASE 0x400045a3u\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR 0x400045a3u\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_BASE 0x400045a4u\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR 0x400045a4u\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_BASE 0x400045a5u\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR 0x400045a5u\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_BASE 0x400045a6u\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR 0x400045a6u\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_BASE 0x400045acu\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR 0x400045acu\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_BASE 0x400045afu\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_SIZE 0x00000001u\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR 0x400045afu\r
-#define CYDEV_MFGCFG_BASE 0x40004600u\r
-#define CYDEV_MFGCFG_SIZE 0x000000edu\r
-#define CYDEV_MFGCFG_ANAIF_BASE 0x40004600u\r
-#define CYDEV_MFGCFG_ANAIF_SIZE 0x00000038u\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_BASE 0x40004608u\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_TR 0x40004608u\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_BASE 0x40004609u\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_TR 0x40004609u\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_BASE 0x4000460au\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_TR 0x4000460au\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_BASE 0x4000460bu\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_TR 0x4000460bu\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE 0x40004610u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0 0x40004610u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE 0x40004611u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0 0x40004611u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE 0x40004612u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0 0x40004612u\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_BASE 0x40004614u\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_TR0 0x40004614u\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_BASE 0x40004616u\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_TR0 0x40004616u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_BASE 0x40004620u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_TR0 0x40004620u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_TR1 0x40004621u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_BASE 0x40004622u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_TR0 0x40004622u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_TR1 0x40004623u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_BASE 0x40004624u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_TR0 0x40004624u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_TR1 0x40004625u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_BASE 0x40004626u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_TR0 0x40004626u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_TR1 0x40004627u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_BASE 0x40004630u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_TR0 0x40004630u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_TR1 0x40004631u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_BASE 0x40004632u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_TR0 0x40004632u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_TR1 0x40004633u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_BASE 0x40004634u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_TR0 0x40004634u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_TR1 0x40004635u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_BASE 0x40004636u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_TR0 0x40004636u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_TR1 0x40004637u\r
-#define CYDEV_MFGCFG_PWRSYS_BASE 0x40004680u\r
-#define CYDEV_MFGCFG_PWRSYS_SIZE 0x0000000bu\r
-#define CYDEV_MFGCFG_PWRSYS_HIB_TR0 0x40004680u\r
-#define CYDEV_MFGCFG_PWRSYS_HIB_TR1 0x40004681u\r
-#define CYDEV_MFGCFG_PWRSYS_I2C_TR 0x40004682u\r
-#define CYDEV_MFGCFG_PWRSYS_SLP_TR 0x40004683u\r
-#define CYDEV_MFGCFG_PWRSYS_BUZZ_TR 0x40004684u\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR0 0x40004685u\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR1 0x40004686u\r
-#define CYDEV_MFGCFG_PWRSYS_BREF_TR 0x40004687u\r
-#define CYDEV_MFGCFG_PWRSYS_BG_TR 0x40004688u\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR2 0x40004689u\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR3 0x4000468au\r
-#define CYDEV_MFGCFG_ILO_BASE 0x40004690u\r
-#define CYDEV_MFGCFG_ILO_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_ILO_TR0 0x40004690u\r
-#define CYDEV_MFGCFG_ILO_TR1 0x40004691u\r
-#define CYDEV_MFGCFG_X32_BASE 0x40004698u\r
-#define CYDEV_MFGCFG_X32_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_X32_TR 0x40004698u\r
-#define CYDEV_MFGCFG_IMO_BASE 0x400046a0u\r
-#define CYDEV_MFGCFG_IMO_SIZE 0x00000005u\r
-#define CYDEV_MFGCFG_IMO_TR0 0x400046a0u\r
-#define CYDEV_MFGCFG_IMO_TR1 0x400046a1u\r
-#define CYDEV_MFGCFG_IMO_GAIN 0x400046a2u\r
-#define CYDEV_MFGCFG_IMO_C36M 0x400046a3u\r
-#define CYDEV_MFGCFG_IMO_TR2 0x400046a4u\r
-#define CYDEV_MFGCFG_XMHZ_BASE 0x400046a8u\r
-#define CYDEV_MFGCFG_XMHZ_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_XMHZ_TR 0x400046a8u\r
-#define CYDEV_MFGCFG_DLY 0x400046c0u\r
-#define CYDEV_MFGCFG_MLOGIC_BASE 0x400046e0u\r
-#define CYDEV_MFGCFG_MLOGIC_SIZE 0x0000000du\r
-#define CYDEV_MFGCFG_MLOGIC_DMPSTR 0x400046e2u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_BASE 0x400046e4u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_SIZE 0x00000002u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_CR 0x400046e4u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_CFG0 0x400046e5u\r
-#define CYDEV_MFGCFG_MLOGIC_DEBUG 0x400046e8u\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE 0x400046eau\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE 0x00000001u\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR 0x400046eau\r
-#define CYDEV_MFGCFG_MLOGIC_REV_ID 0x400046ecu\r
-#define CYDEV_RESET_BASE 0x400046f0u\r
-#define CYDEV_RESET_SIZE 0x0000000fu\r
-#define CYDEV_RESET_IPOR_CR0 0x400046f0u\r
-#define CYDEV_RESET_IPOR_CR1 0x400046f1u\r
-#define CYDEV_RESET_IPOR_CR2 0x400046f2u\r
-#define CYDEV_RESET_IPOR_CR3 0x400046f3u\r
-#define CYDEV_RESET_CR0 0x400046f4u\r
-#define CYDEV_RESET_CR1 0x400046f5u\r
-#define CYDEV_RESET_CR2 0x400046f6u\r
-#define CYDEV_RESET_CR3 0x400046f7u\r
-#define CYDEV_RESET_CR4 0x400046f8u\r
-#define CYDEV_RESET_CR5 0x400046f9u\r
-#define CYDEV_RESET_SR0 0x400046fau\r
-#define CYDEV_RESET_SR1 0x400046fbu\r
-#define CYDEV_RESET_SR2 0x400046fcu\r
-#define CYDEV_RESET_SR3 0x400046fdu\r
-#define CYDEV_RESET_TR 0x400046feu\r
-#define CYDEV_SPC_BASE 0x40004700u\r
-#define CYDEV_SPC_SIZE 0x00000100u\r
-#define CYDEV_SPC_FM_EE_CR 0x40004700u\r
-#define CYDEV_SPC_FM_EE_WAKE_CNT 0x40004701u\r
-#define CYDEV_SPC_EE_SCR 0x40004702u\r
-#define CYDEV_SPC_EE_ERR 0x40004703u\r
-#define CYDEV_SPC_CPU_DATA 0x40004720u\r
-#define CYDEV_SPC_DMA_DATA 0x40004721u\r
-#define CYDEV_SPC_SR 0x40004722u\r
-#define CYDEV_SPC_CR 0x40004723u\r
-#define CYDEV_SPC_DMM_MAP_BASE 0x40004780u\r
-#define CYDEV_SPC_DMM_MAP_SIZE 0x00000080u\r
-#define CYDEV_SPC_DMM_MAP_SRAM_MBASE 0x40004780u\r
-#define CYDEV_SPC_DMM_MAP_SRAM_MSIZE 0x00000080u\r
-#define CYDEV_CACHE_BASE 0x40004800u\r
-#define CYDEV_CACHE_SIZE 0x0000009cu\r
-#define CYDEV_CACHE_CC_CTL 0x40004800u\r
-#define CYDEV_CACHE_ECC_CORR 0x40004880u\r
-#define CYDEV_CACHE_ECC_ERR 0x40004888u\r
-#define CYDEV_CACHE_FLASH_ERR 0x40004890u\r
-#define CYDEV_CACHE_HITMISS 0x40004898u\r
-#define CYDEV_I2C_BASE 0x40004900u\r
-#define CYDEV_I2C_SIZE 0x000000e1u\r
-#define CYDEV_I2C_XCFG 0x400049c8u\r
-#define CYDEV_I2C_ADR 0x400049cau\r
-#define CYDEV_I2C_CFG 0x400049d6u\r
-#define CYDEV_I2C_CSR 0x400049d7u\r
-#define CYDEV_I2C_D 0x400049d8u\r
-#define CYDEV_I2C_MCSR 0x400049d9u\r
-#define CYDEV_I2C_CLK_DIV1 0x400049dbu\r
-#define CYDEV_I2C_CLK_DIV2 0x400049dcu\r
-#define CYDEV_I2C_TMOUT_CSR 0x400049ddu\r
-#define CYDEV_I2C_TMOUT_SR 0x400049deu\r
-#define CYDEV_I2C_TMOUT_CFG0 0x400049dfu\r
-#define CYDEV_I2C_TMOUT_CFG1 0x400049e0u\r
-#define CYDEV_DEC_BASE 0x40004e00u\r
-#define CYDEV_DEC_SIZE 0x00000015u\r
-#define CYDEV_DEC_CR 0x40004e00u\r
-#define CYDEV_DEC_SR 0x40004e01u\r
-#define CYDEV_DEC_SHIFT1 0x40004e02u\r
-#define CYDEV_DEC_SHIFT2 0x40004e03u\r
-#define CYDEV_DEC_DR2 0x40004e04u\r
-#define CYDEV_DEC_DR2H 0x40004e05u\r
-#define CYDEV_DEC_DR1 0x40004e06u\r
-#define CYDEV_DEC_OCOR 0x40004e08u\r
-#define CYDEV_DEC_OCORM 0x40004e09u\r
-#define CYDEV_DEC_OCORH 0x40004e0au\r
-#define CYDEV_DEC_GCOR 0x40004e0cu\r
-#define CYDEV_DEC_GCORH 0x40004e0du\r
-#define CYDEV_DEC_GVAL 0x40004e0eu\r
-#define CYDEV_DEC_OUTSAMP 0x40004e10u\r
-#define CYDEV_DEC_OUTSAMPM 0x40004e11u\r
-#define CYDEV_DEC_OUTSAMPH 0x40004e12u\r
-#define CYDEV_DEC_OUTSAMPS 0x40004e13u\r
-#define CYDEV_DEC_COHER 0x40004e14u\r
-#define CYDEV_TMR0_BASE 0x40004f00u\r
-#define CYDEV_TMR0_SIZE 0x0000000cu\r
-#define CYDEV_TMR0_CFG0 0x40004f00u\r
-#define CYDEV_TMR0_CFG1 0x40004f01u\r
-#define CYDEV_TMR0_CFG2 0x40004f02u\r
-#define CYDEV_TMR0_SR0 0x40004f03u\r
-#define CYDEV_TMR0_PER0 0x40004f04u\r
-#define CYDEV_TMR0_PER1 0x40004f05u\r
-#define CYDEV_TMR0_CNT_CMP0 0x40004f06u\r
-#define CYDEV_TMR0_CNT_CMP1 0x40004f07u\r
-#define CYDEV_TMR0_CAP0 0x40004f08u\r
-#define CYDEV_TMR0_CAP1 0x40004f09u\r
-#define CYDEV_TMR0_RT0 0x40004f0au\r
-#define CYDEV_TMR0_RT1 0x40004f0bu\r
-#define CYDEV_TMR1_BASE 0x40004f0cu\r
-#define CYDEV_TMR1_SIZE 0x0000000cu\r
-#define CYDEV_TMR1_CFG0 0x40004f0cu\r
-#define CYDEV_TMR1_CFG1 0x40004f0du\r
-#define CYDEV_TMR1_CFG2 0x40004f0eu\r
-#define CYDEV_TMR1_SR0 0x40004f0fu\r
-#define CYDEV_TMR1_PER0 0x40004f10u\r
-#define CYDEV_TMR1_PER1 0x40004f11u\r
-#define CYDEV_TMR1_CNT_CMP0 0x40004f12u\r
-#define CYDEV_TMR1_CNT_CMP1 0x40004f13u\r
-#define CYDEV_TMR1_CAP0 0x40004f14u\r
-#define CYDEV_TMR1_CAP1 0x40004f15u\r
-#define CYDEV_TMR1_RT0 0x40004f16u\r
-#define CYDEV_TMR1_RT1 0x40004f17u\r
-#define CYDEV_TMR2_BASE 0x40004f18u\r
-#define CYDEV_TMR2_SIZE 0x0000000cu\r
-#define CYDEV_TMR2_CFG0 0x40004f18u\r
-#define CYDEV_TMR2_CFG1 0x40004f19u\r
-#define CYDEV_TMR2_CFG2 0x40004f1au\r
-#define CYDEV_TMR2_SR0 0x40004f1bu\r
-#define CYDEV_TMR2_PER0 0x40004f1cu\r
-#define CYDEV_TMR2_PER1 0x40004f1du\r
-#define CYDEV_TMR2_CNT_CMP0 0x40004f1eu\r
-#define CYDEV_TMR2_CNT_CMP1 0x40004f1fu\r
-#define CYDEV_TMR2_CAP0 0x40004f20u\r
-#define CYDEV_TMR2_CAP1 0x40004f21u\r
-#define CYDEV_TMR2_RT0 0x40004f22u\r
-#define CYDEV_TMR2_RT1 0x40004f23u\r
-#define CYDEV_TMR3_BASE 0x40004f24u\r
-#define CYDEV_TMR3_SIZE 0x0000000cu\r
-#define CYDEV_TMR3_CFG0 0x40004f24u\r
-#define CYDEV_TMR3_CFG1 0x40004f25u\r
-#define CYDEV_TMR3_CFG2 0x40004f26u\r
-#define CYDEV_TMR3_SR0 0x40004f27u\r
-#define CYDEV_TMR3_PER0 0x40004f28u\r
-#define CYDEV_TMR3_PER1 0x40004f29u\r
-#define CYDEV_TMR3_CNT_CMP0 0x40004f2au\r
-#define CYDEV_TMR3_CNT_CMP1 0x40004f2bu\r
-#define CYDEV_TMR3_CAP0 0x40004f2cu\r
-#define CYDEV_TMR3_CAP1 0x40004f2du\r
-#define CYDEV_TMR3_RT0 0x40004f2eu\r
-#define CYDEV_TMR3_RT1 0x40004f2fu\r
-#define CYDEV_IO_BASE 0x40005000u\r
-#define CYDEV_IO_SIZE 0x00000200u\r
-#define CYDEV_IO_PC_BASE 0x40005000u\r
-#define CYDEV_IO_PC_SIZE 0x00000080u\r
-#define CYDEV_IO_PC_PRT0_BASE 0x40005000u\r
-#define CYDEV_IO_PC_PRT0_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT0_PC0 0x40005000u\r
-#define CYDEV_IO_PC_PRT0_PC1 0x40005001u\r
-#define CYDEV_IO_PC_PRT0_PC2 0x40005002u\r
-#define CYDEV_IO_PC_PRT0_PC3 0x40005003u\r
-#define CYDEV_IO_PC_PRT0_PC4 0x40005004u\r
-#define CYDEV_IO_PC_PRT0_PC5 0x40005005u\r
-#define CYDEV_IO_PC_PRT0_PC6 0x40005006u\r
-#define CYDEV_IO_PC_PRT0_PC7 0x40005007u\r
-#define CYDEV_IO_PC_PRT1_BASE 0x40005008u\r
-#define CYDEV_IO_PC_PRT1_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT1_PC0 0x40005008u\r
-#define CYDEV_IO_PC_PRT1_PC1 0x40005009u\r
-#define CYDEV_IO_PC_PRT1_PC2 0x4000500au\r
-#define CYDEV_IO_PC_PRT1_PC3 0x4000500bu\r
-#define CYDEV_IO_PC_PRT1_PC4 0x4000500cu\r
-#define CYDEV_IO_PC_PRT1_PC5 0x4000500du\r
-#define CYDEV_IO_PC_PRT1_PC6 0x4000500eu\r
-#define CYDEV_IO_PC_PRT1_PC7 0x4000500fu\r
-#define CYDEV_IO_PC_PRT2_BASE 0x40005010u\r
-#define CYDEV_IO_PC_PRT2_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT2_PC0 0x40005010u\r
-#define CYDEV_IO_PC_PRT2_PC1 0x40005011u\r
-#define CYDEV_IO_PC_PRT2_PC2 0x40005012u\r
-#define CYDEV_IO_PC_PRT2_PC3 0x40005013u\r
-#define CYDEV_IO_PC_PRT2_PC4 0x40005014u\r
-#define CYDEV_IO_PC_PRT2_PC5 0x40005015u\r
-#define CYDEV_IO_PC_PRT2_PC6 0x40005016u\r
-#define CYDEV_IO_PC_PRT2_PC7 0x40005017u\r
-#define CYDEV_IO_PC_PRT3_BASE 0x40005018u\r
-#define CYDEV_IO_PC_PRT3_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT3_PC0 0x40005018u\r
-#define CYDEV_IO_PC_PRT3_PC1 0x40005019u\r
-#define CYDEV_IO_PC_PRT3_PC2 0x4000501au\r
-#define CYDEV_IO_PC_PRT3_PC3 0x4000501bu\r
-#define CYDEV_IO_PC_PRT3_PC4 0x4000501cu\r
-#define CYDEV_IO_PC_PRT3_PC5 0x4000501du\r
-#define CYDEV_IO_PC_PRT3_PC6 0x4000501eu\r
-#define CYDEV_IO_PC_PRT3_PC7 0x4000501fu\r
-#define CYDEV_IO_PC_PRT4_BASE 0x40005020u\r
-#define CYDEV_IO_PC_PRT4_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT4_PC0 0x40005020u\r
-#define CYDEV_IO_PC_PRT4_PC1 0x40005021u\r
-#define CYDEV_IO_PC_PRT4_PC2 0x40005022u\r
-#define CYDEV_IO_PC_PRT4_PC3 0x40005023u\r
-#define CYDEV_IO_PC_PRT4_PC4 0x40005024u\r
-#define CYDEV_IO_PC_PRT4_PC5 0x40005025u\r
-#define CYDEV_IO_PC_PRT4_PC6 0x40005026u\r
-#define CYDEV_IO_PC_PRT4_PC7 0x40005027u\r
-#define CYDEV_IO_PC_PRT5_BASE 0x40005028u\r
-#define CYDEV_IO_PC_PRT5_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT5_PC0 0x40005028u\r
-#define CYDEV_IO_PC_PRT5_PC1 0x40005029u\r
-#define CYDEV_IO_PC_PRT5_PC2 0x4000502au\r
-#define CYDEV_IO_PC_PRT5_PC3 0x4000502bu\r
-#define CYDEV_IO_PC_PRT5_PC4 0x4000502cu\r
-#define CYDEV_IO_PC_PRT5_PC5 0x4000502du\r
-#define CYDEV_IO_PC_PRT5_PC6 0x4000502eu\r
-#define CYDEV_IO_PC_PRT5_PC7 0x4000502fu\r
-#define CYDEV_IO_PC_PRT6_BASE 0x40005030u\r
-#define CYDEV_IO_PC_PRT6_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT6_PC0 0x40005030u\r
-#define CYDEV_IO_PC_PRT6_PC1 0x40005031u\r
-#define CYDEV_IO_PC_PRT6_PC2 0x40005032u\r
-#define CYDEV_IO_PC_PRT6_PC3 0x40005033u\r
-#define CYDEV_IO_PC_PRT6_PC4 0x40005034u\r
-#define CYDEV_IO_PC_PRT6_PC5 0x40005035u\r
-#define CYDEV_IO_PC_PRT6_PC6 0x40005036u\r
-#define CYDEV_IO_PC_PRT6_PC7 0x40005037u\r
-#define CYDEV_IO_PC_PRT12_BASE 0x40005060u\r
-#define CYDEV_IO_PC_PRT12_SIZE 0x00000008u\r
-#define CYDEV_IO_PC_PRT12_PC0 0x40005060u\r
-#define CYDEV_IO_PC_PRT12_PC1 0x40005061u\r
-#define CYDEV_IO_PC_PRT12_PC2 0x40005062u\r
-#define CYDEV_IO_PC_PRT12_PC3 0x40005063u\r
-#define CYDEV_IO_PC_PRT12_PC4 0x40005064u\r
-#define CYDEV_IO_PC_PRT12_PC5 0x40005065u\r
-#define CYDEV_IO_PC_PRT12_PC6 0x40005066u\r
-#define CYDEV_IO_PC_PRT12_PC7 0x40005067u\r
-#define CYDEV_IO_PC_PRT15_BASE 0x40005078u\r
-#define CYDEV_IO_PC_PRT15_SIZE 0x00000006u\r
-#define CYDEV_IO_PC_PRT15_PC0 0x40005078u\r
-#define CYDEV_IO_PC_PRT15_PC1 0x40005079u\r
-#define CYDEV_IO_PC_PRT15_PC2 0x4000507au\r
-#define CYDEV_IO_PC_PRT15_PC3 0x4000507bu\r
-#define CYDEV_IO_PC_PRT15_PC4 0x4000507cu\r
-#define CYDEV_IO_PC_PRT15_PC5 0x4000507du\r
-#define CYDEV_IO_PC_PRT15_7_6_BASE 0x4000507eu\r
-#define CYDEV_IO_PC_PRT15_7_6_SIZE 0x00000002u\r
-#define CYDEV_IO_PC_PRT15_7_6_PC0 0x4000507eu\r
-#define CYDEV_IO_PC_PRT15_7_6_PC1 0x4000507fu\r
-#define CYDEV_IO_DR_BASE 0x40005080u\r
-#define CYDEV_IO_DR_SIZE 0x00000010u\r
-#define CYDEV_IO_DR_PRT0_BASE 0x40005080u\r
-#define CYDEV_IO_DR_PRT0_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT0_DR_ALIAS 0x40005080u\r
-#define CYDEV_IO_DR_PRT1_BASE 0x40005081u\r
-#define CYDEV_IO_DR_PRT1_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT1_DR_ALIAS 0x40005081u\r
-#define CYDEV_IO_DR_PRT2_BASE 0x40005082u\r
-#define CYDEV_IO_DR_PRT2_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT2_DR_ALIAS 0x40005082u\r
-#define CYDEV_IO_DR_PRT3_BASE 0x40005083u\r
-#define CYDEV_IO_DR_PRT3_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT3_DR_ALIAS 0x40005083u\r
-#define CYDEV_IO_DR_PRT4_BASE 0x40005084u\r
-#define CYDEV_IO_DR_PRT4_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT4_DR_ALIAS 0x40005084u\r
-#define CYDEV_IO_DR_PRT5_BASE 0x40005085u\r
-#define CYDEV_IO_DR_PRT5_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT5_DR_ALIAS 0x40005085u\r
-#define CYDEV_IO_DR_PRT6_BASE 0x40005086u\r
-#define CYDEV_IO_DR_PRT6_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT6_DR_ALIAS 0x40005086u\r
-#define CYDEV_IO_DR_PRT12_BASE 0x4000508cu\r
-#define CYDEV_IO_DR_PRT12_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT12_DR_ALIAS 0x4000508cu\r
-#define CYDEV_IO_DR_PRT15_BASE 0x4000508fu\r
-#define CYDEV_IO_DR_PRT15_SIZE 0x00000001u\r
-#define CYDEV_IO_DR_PRT15_DR_15_ALIAS 0x4000508fu\r
-#define CYDEV_IO_PS_BASE 0x40005090u\r
-#define CYDEV_IO_PS_SIZE 0x00000010u\r
-#define CYDEV_IO_PS_PRT0_BASE 0x40005090u\r
-#define CYDEV_IO_PS_PRT0_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT0_PS_ALIAS 0x40005090u\r
-#define CYDEV_IO_PS_PRT1_BASE 0x40005091u\r
-#define CYDEV_IO_PS_PRT1_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT1_PS_ALIAS 0x40005091u\r
-#define CYDEV_IO_PS_PRT2_BASE 0x40005092u\r
-#define CYDEV_IO_PS_PRT2_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT2_PS_ALIAS 0x40005092u\r
-#define CYDEV_IO_PS_PRT3_BASE 0x40005093u\r
-#define CYDEV_IO_PS_PRT3_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT3_PS_ALIAS 0x40005093u\r
-#define CYDEV_IO_PS_PRT4_BASE 0x40005094u\r
-#define CYDEV_IO_PS_PRT4_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT4_PS_ALIAS 0x40005094u\r
-#define CYDEV_IO_PS_PRT5_BASE 0x40005095u\r
-#define CYDEV_IO_PS_PRT5_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT5_PS_ALIAS 0x40005095u\r
-#define CYDEV_IO_PS_PRT6_BASE 0x40005096u\r
-#define CYDEV_IO_PS_PRT6_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT6_PS_ALIAS 0x40005096u\r
-#define CYDEV_IO_PS_PRT12_BASE 0x4000509cu\r
-#define CYDEV_IO_PS_PRT12_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT12_PS_ALIAS 0x4000509cu\r
-#define CYDEV_IO_PS_PRT15_BASE 0x4000509fu\r
-#define CYDEV_IO_PS_PRT15_SIZE 0x00000001u\r
-#define CYDEV_IO_PS_PRT15_PS15_ALIAS 0x4000509fu\r
-#define CYDEV_IO_PRT_BASE 0x40005100u\r
-#define CYDEV_IO_PRT_SIZE 0x00000100u\r
-#define CYDEV_IO_PRT_PRT0_BASE 0x40005100u\r
-#define CYDEV_IO_PRT_PRT0_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT0_DR 0x40005100u\r
-#define CYDEV_IO_PRT_PRT0_PS 0x40005101u\r
-#define CYDEV_IO_PRT_PRT0_DM0 0x40005102u\r
-#define CYDEV_IO_PRT_PRT0_DM1 0x40005103u\r
-#define CYDEV_IO_PRT_PRT0_DM2 0x40005104u\r
-#define CYDEV_IO_PRT_PRT0_SLW 0x40005105u\r
-#define CYDEV_IO_PRT_PRT0_BYP 0x40005106u\r
-#define CYDEV_IO_PRT_PRT0_BIE 0x40005107u\r
-#define CYDEV_IO_PRT_PRT0_INP_DIS 0x40005108u\r
-#define CYDEV_IO_PRT_PRT0_CTL 0x40005109u\r
-#define CYDEV_IO_PRT_PRT0_PRT 0x4000510au\r
-#define CYDEV_IO_PRT_PRT0_BIT_MASK 0x4000510bu\r
-#define CYDEV_IO_PRT_PRT0_AMUX 0x4000510cu\r
-#define CYDEV_IO_PRT_PRT0_AG 0x4000510du\r
-#define CYDEV_IO_PRT_PRT0_LCD_COM_SEG 0x4000510eu\r
-#define CYDEV_IO_PRT_PRT0_LCD_EN 0x4000510fu\r
-#define CYDEV_IO_PRT_PRT1_BASE 0x40005110u\r
-#define CYDEV_IO_PRT_PRT1_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT1_DR 0x40005110u\r
-#define CYDEV_IO_PRT_PRT1_PS 0x40005111u\r
-#define CYDEV_IO_PRT_PRT1_DM0 0x40005112u\r
-#define CYDEV_IO_PRT_PRT1_DM1 0x40005113u\r
-#define CYDEV_IO_PRT_PRT1_DM2 0x40005114u\r
-#define CYDEV_IO_PRT_PRT1_SLW 0x40005115u\r
-#define CYDEV_IO_PRT_PRT1_BYP 0x40005116u\r
-#define CYDEV_IO_PRT_PRT1_BIE 0x40005117u\r
-#define CYDEV_IO_PRT_PRT1_INP_DIS 0x40005118u\r
-#define CYDEV_IO_PRT_PRT1_CTL 0x40005119u\r
-#define CYDEV_IO_PRT_PRT1_PRT 0x4000511au\r
-#define CYDEV_IO_PRT_PRT1_BIT_MASK 0x4000511bu\r
-#define CYDEV_IO_PRT_PRT1_AMUX 0x4000511cu\r
-#define CYDEV_IO_PRT_PRT1_AG 0x4000511du\r
-#define CYDEV_IO_PRT_PRT1_LCD_COM_SEG 0x4000511eu\r
-#define CYDEV_IO_PRT_PRT1_LCD_EN 0x4000511fu\r
-#define CYDEV_IO_PRT_PRT2_BASE 0x40005120u\r
-#define CYDEV_IO_PRT_PRT2_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT2_DR 0x40005120u\r
-#define CYDEV_IO_PRT_PRT2_PS 0x40005121u\r
-#define CYDEV_IO_PRT_PRT2_DM0 0x40005122u\r
-#define CYDEV_IO_PRT_PRT2_DM1 0x40005123u\r
-#define CYDEV_IO_PRT_PRT2_DM2 0x40005124u\r
-#define CYDEV_IO_PRT_PRT2_SLW 0x40005125u\r
-#define CYDEV_IO_PRT_PRT2_BYP 0x40005126u\r
-#define CYDEV_IO_PRT_PRT2_BIE 0x40005127u\r
-#define CYDEV_IO_PRT_PRT2_INP_DIS 0x40005128u\r
-#define CYDEV_IO_PRT_PRT2_CTL 0x40005129u\r
-#define CYDEV_IO_PRT_PRT2_PRT 0x4000512au\r
-#define CYDEV_IO_PRT_PRT2_BIT_MASK 0x4000512bu\r
-#define CYDEV_IO_PRT_PRT2_AMUX 0x4000512cu\r
-#define CYDEV_IO_PRT_PRT2_AG 0x4000512du\r
-#define CYDEV_IO_PRT_PRT2_LCD_COM_SEG 0x4000512eu\r
-#define CYDEV_IO_PRT_PRT2_LCD_EN 0x4000512fu\r
-#define CYDEV_IO_PRT_PRT3_BASE 0x40005130u\r
-#define CYDEV_IO_PRT_PRT3_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT3_DR 0x40005130u\r
-#define CYDEV_IO_PRT_PRT3_PS 0x40005131u\r
-#define CYDEV_IO_PRT_PRT3_DM0 0x40005132u\r
-#define CYDEV_IO_PRT_PRT3_DM1 0x40005133u\r
-#define CYDEV_IO_PRT_PRT3_DM2 0x40005134u\r
-#define CYDEV_IO_PRT_PRT3_SLW 0x40005135u\r
-#define CYDEV_IO_PRT_PRT3_BYP 0x40005136u\r
-#define CYDEV_IO_PRT_PRT3_BIE 0x40005137u\r
-#define CYDEV_IO_PRT_PRT3_INP_DIS 0x40005138u\r
-#define CYDEV_IO_PRT_PRT3_CTL 0x40005139u\r
-#define CYDEV_IO_PRT_PRT3_PRT 0x4000513au\r
-#define CYDEV_IO_PRT_PRT3_BIT_MASK 0x4000513bu\r
-#define CYDEV_IO_PRT_PRT3_AMUX 0x4000513cu\r
-#define CYDEV_IO_PRT_PRT3_AG 0x4000513du\r
-#define CYDEV_IO_PRT_PRT3_LCD_COM_SEG 0x4000513eu\r
-#define CYDEV_IO_PRT_PRT3_LCD_EN 0x4000513fu\r
-#define CYDEV_IO_PRT_PRT4_BASE 0x40005140u\r
-#define CYDEV_IO_PRT_PRT4_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT4_DR 0x40005140u\r
-#define CYDEV_IO_PRT_PRT4_PS 0x40005141u\r
-#define CYDEV_IO_PRT_PRT4_DM0 0x40005142u\r
-#define CYDEV_IO_PRT_PRT4_DM1 0x40005143u\r
-#define CYDEV_IO_PRT_PRT4_DM2 0x40005144u\r
-#define CYDEV_IO_PRT_PRT4_SLW 0x40005145u\r
-#define CYDEV_IO_PRT_PRT4_BYP 0x40005146u\r
-#define CYDEV_IO_PRT_PRT4_BIE 0x40005147u\r
-#define CYDEV_IO_PRT_PRT4_INP_DIS 0x40005148u\r
-#define CYDEV_IO_PRT_PRT4_CTL 0x40005149u\r
-#define CYDEV_IO_PRT_PRT4_PRT 0x4000514au\r
-#define CYDEV_IO_PRT_PRT4_BIT_MASK 0x4000514bu\r
-#define CYDEV_IO_PRT_PRT4_AMUX 0x4000514cu\r
-#define CYDEV_IO_PRT_PRT4_AG 0x4000514du\r
-#define CYDEV_IO_PRT_PRT4_LCD_COM_SEG 0x4000514eu\r
-#define CYDEV_IO_PRT_PRT4_LCD_EN 0x4000514fu\r
-#define CYDEV_IO_PRT_PRT5_BASE 0x40005150u\r
-#define CYDEV_IO_PRT_PRT5_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT5_DR 0x40005150u\r
-#define CYDEV_IO_PRT_PRT5_PS 0x40005151u\r
-#define CYDEV_IO_PRT_PRT5_DM0 0x40005152u\r
-#define CYDEV_IO_PRT_PRT5_DM1 0x40005153u\r
-#define CYDEV_IO_PRT_PRT5_DM2 0x40005154u\r
-#define CYDEV_IO_PRT_PRT5_SLW 0x40005155u\r
-#define CYDEV_IO_PRT_PRT5_BYP 0x40005156u\r
-#define CYDEV_IO_PRT_PRT5_BIE 0x40005157u\r
-#define CYDEV_IO_PRT_PRT5_INP_DIS 0x40005158u\r
-#define CYDEV_IO_PRT_PRT5_CTL 0x40005159u\r
-#define CYDEV_IO_PRT_PRT5_PRT 0x4000515au\r
-#define CYDEV_IO_PRT_PRT5_BIT_MASK 0x4000515bu\r
-#define CYDEV_IO_PRT_PRT5_AMUX 0x4000515cu\r
-#define CYDEV_IO_PRT_PRT5_AG 0x4000515du\r
-#define CYDEV_IO_PRT_PRT5_LCD_COM_SEG 0x4000515eu\r
-#define CYDEV_IO_PRT_PRT5_LCD_EN 0x4000515fu\r
-#define CYDEV_IO_PRT_PRT6_BASE 0x40005160u\r
-#define CYDEV_IO_PRT_PRT6_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT6_DR 0x40005160u\r
-#define CYDEV_IO_PRT_PRT6_PS 0x40005161u\r
-#define CYDEV_IO_PRT_PRT6_DM0 0x40005162u\r
-#define CYDEV_IO_PRT_PRT6_DM1 0x40005163u\r
-#define CYDEV_IO_PRT_PRT6_DM2 0x40005164u\r
-#define CYDEV_IO_PRT_PRT6_SLW 0x40005165u\r
-#define CYDEV_IO_PRT_PRT6_BYP 0x40005166u\r
-#define CYDEV_IO_PRT_PRT6_BIE 0x40005167u\r
-#define CYDEV_IO_PRT_PRT6_INP_DIS 0x40005168u\r
-#define CYDEV_IO_PRT_PRT6_CTL 0x40005169u\r
-#define CYDEV_IO_PRT_PRT6_PRT 0x4000516au\r
-#define CYDEV_IO_PRT_PRT6_BIT_MASK 0x4000516bu\r
-#define CYDEV_IO_PRT_PRT6_AMUX 0x4000516cu\r
-#define CYDEV_IO_PRT_PRT6_AG 0x4000516du\r
-#define CYDEV_IO_PRT_PRT6_LCD_COM_SEG 0x4000516eu\r
-#define CYDEV_IO_PRT_PRT6_LCD_EN 0x4000516fu\r
-#define CYDEV_IO_PRT_PRT12_BASE 0x400051c0u\r
-#define CYDEV_IO_PRT_PRT12_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT12_DR 0x400051c0u\r
-#define CYDEV_IO_PRT_PRT12_PS 0x400051c1u\r
-#define CYDEV_IO_PRT_PRT12_DM0 0x400051c2u\r
-#define CYDEV_IO_PRT_PRT12_DM1 0x400051c3u\r
-#define CYDEV_IO_PRT_PRT12_DM2 0x400051c4u\r
-#define CYDEV_IO_PRT_PRT12_SLW 0x400051c5u\r
-#define CYDEV_IO_PRT_PRT12_BYP 0x400051c6u\r
-#define CYDEV_IO_PRT_PRT12_BIE 0x400051c7u\r
-#define CYDEV_IO_PRT_PRT12_INP_DIS 0x400051c8u\r
-#define CYDEV_IO_PRT_PRT12_SIO_HYST_EN 0x400051c9u\r
-#define CYDEV_IO_PRT_PRT12_PRT 0x400051cau\r
-#define CYDEV_IO_PRT_PRT12_BIT_MASK 0x400051cbu\r
-#define CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ 0x400051ccu\r
-#define CYDEV_IO_PRT_PRT12_AG 0x400051cdu\r
-#define CYDEV_IO_PRT_PRT12_SIO_CFG 0x400051ceu\r
-#define CYDEV_IO_PRT_PRT12_SIO_DIFF 0x400051cfu\r
-#define CYDEV_IO_PRT_PRT15_BASE 0x400051f0u\r
-#define CYDEV_IO_PRT_PRT15_SIZE 0x00000010u\r
-#define CYDEV_IO_PRT_PRT15_DR 0x400051f0u\r
-#define CYDEV_IO_PRT_PRT15_PS 0x400051f1u\r
-#define CYDEV_IO_PRT_PRT15_DM0 0x400051f2u\r
-#define CYDEV_IO_PRT_PRT15_DM1 0x400051f3u\r
-#define CYDEV_IO_PRT_PRT15_DM2 0x400051f4u\r
-#define CYDEV_IO_PRT_PRT15_SLW 0x400051f5u\r
-#define CYDEV_IO_PRT_PRT15_BYP 0x400051f6u\r
-#define CYDEV_IO_PRT_PRT15_BIE 0x400051f7u\r
-#define CYDEV_IO_PRT_PRT15_INP_DIS 0x400051f8u\r
-#define CYDEV_IO_PRT_PRT15_CTL 0x400051f9u\r
-#define CYDEV_IO_PRT_PRT15_PRT 0x400051fau\r
-#define CYDEV_IO_PRT_PRT15_BIT_MASK 0x400051fbu\r
-#define CYDEV_IO_PRT_PRT15_AMUX 0x400051fcu\r
-#define CYDEV_IO_PRT_PRT15_AG 0x400051fdu\r
-#define CYDEV_IO_PRT_PRT15_LCD_COM_SEG 0x400051feu\r
-#define CYDEV_IO_PRT_PRT15_LCD_EN 0x400051ffu\r
-#define CYDEV_PRTDSI_BASE 0x40005200u\r
-#define CYDEV_PRTDSI_SIZE 0x0000007fu\r
-#define CYDEV_PRTDSI_PRT0_BASE 0x40005200u\r
-#define CYDEV_PRTDSI_PRT0_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT0_OUT_SEL0 0x40005200u\r
-#define CYDEV_PRTDSI_PRT0_OUT_SEL1 0x40005201u\r
-#define CYDEV_PRTDSI_PRT0_OE_SEL0 0x40005202u\r
-#define CYDEV_PRTDSI_PRT0_OE_SEL1 0x40005203u\r
-#define CYDEV_PRTDSI_PRT0_DBL_SYNC_IN 0x40005204u\r
-#define CYDEV_PRTDSI_PRT0_SYNC_OUT 0x40005205u\r
-#define CYDEV_PRTDSI_PRT0_CAPS_SEL 0x40005206u\r
-#define CYDEV_PRTDSI_PRT1_BASE 0x40005208u\r
-#define CYDEV_PRTDSI_PRT1_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT1_OUT_SEL0 0x40005208u\r
-#define CYDEV_PRTDSI_PRT1_OUT_SEL1 0x40005209u\r
-#define CYDEV_PRTDSI_PRT1_OE_SEL0 0x4000520au\r
-#define CYDEV_PRTDSI_PRT1_OE_SEL1 0x4000520bu\r
-#define CYDEV_PRTDSI_PRT1_DBL_SYNC_IN 0x4000520cu\r
-#define CYDEV_PRTDSI_PRT1_SYNC_OUT 0x4000520du\r
-#define CYDEV_PRTDSI_PRT1_CAPS_SEL 0x4000520eu\r
-#define CYDEV_PRTDSI_PRT2_BASE 0x40005210u\r
-#define CYDEV_PRTDSI_PRT2_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT2_OUT_SEL0 0x40005210u\r
-#define CYDEV_PRTDSI_PRT2_OUT_SEL1 0x40005211u\r
-#define CYDEV_PRTDSI_PRT2_OE_SEL0 0x40005212u\r
-#define CYDEV_PRTDSI_PRT2_OE_SEL1 0x40005213u\r
-#define CYDEV_PRTDSI_PRT2_DBL_SYNC_IN 0x40005214u\r
-#define CYDEV_PRTDSI_PRT2_SYNC_OUT 0x40005215u\r
-#define CYDEV_PRTDSI_PRT2_CAPS_SEL 0x40005216u\r
-#define CYDEV_PRTDSI_PRT3_BASE 0x40005218u\r
-#define CYDEV_PRTDSI_PRT3_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT3_OUT_SEL0 0x40005218u\r
-#define CYDEV_PRTDSI_PRT3_OUT_SEL1 0x40005219u\r
-#define CYDEV_PRTDSI_PRT3_OE_SEL0 0x4000521au\r
-#define CYDEV_PRTDSI_PRT3_OE_SEL1 0x4000521bu\r
-#define CYDEV_PRTDSI_PRT3_DBL_SYNC_IN 0x4000521cu\r
-#define CYDEV_PRTDSI_PRT3_SYNC_OUT 0x4000521du\r
-#define CYDEV_PRTDSI_PRT3_CAPS_SEL 0x4000521eu\r
-#define CYDEV_PRTDSI_PRT4_BASE 0x40005220u\r
-#define CYDEV_PRTDSI_PRT4_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT4_OUT_SEL0 0x40005220u\r
-#define CYDEV_PRTDSI_PRT4_OUT_SEL1 0x40005221u\r
-#define CYDEV_PRTDSI_PRT4_OE_SEL0 0x40005222u\r
-#define CYDEV_PRTDSI_PRT4_OE_SEL1 0x40005223u\r
-#define CYDEV_PRTDSI_PRT4_DBL_SYNC_IN 0x40005224u\r
-#define CYDEV_PRTDSI_PRT4_SYNC_OUT 0x40005225u\r
-#define CYDEV_PRTDSI_PRT4_CAPS_SEL 0x40005226u\r
-#define CYDEV_PRTDSI_PRT5_BASE 0x40005228u\r
-#define CYDEV_PRTDSI_PRT5_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT5_OUT_SEL0 0x40005228u\r
-#define CYDEV_PRTDSI_PRT5_OUT_SEL1 0x40005229u\r
-#define CYDEV_PRTDSI_PRT5_OE_SEL0 0x4000522au\r
-#define CYDEV_PRTDSI_PRT5_OE_SEL1 0x4000522bu\r
-#define CYDEV_PRTDSI_PRT5_DBL_SYNC_IN 0x4000522cu\r
-#define CYDEV_PRTDSI_PRT5_SYNC_OUT 0x4000522du\r
-#define CYDEV_PRTDSI_PRT5_CAPS_SEL 0x4000522eu\r
-#define CYDEV_PRTDSI_PRT6_BASE 0x40005230u\r
-#define CYDEV_PRTDSI_PRT6_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT6_OUT_SEL0 0x40005230u\r
-#define CYDEV_PRTDSI_PRT6_OUT_SEL1 0x40005231u\r
-#define CYDEV_PRTDSI_PRT6_OE_SEL0 0x40005232u\r
-#define CYDEV_PRTDSI_PRT6_OE_SEL1 0x40005233u\r
-#define CYDEV_PRTDSI_PRT6_DBL_SYNC_IN 0x40005234u\r
-#define CYDEV_PRTDSI_PRT6_SYNC_OUT 0x40005235u\r
-#define CYDEV_PRTDSI_PRT6_CAPS_SEL 0x40005236u\r
-#define CYDEV_PRTDSI_PRT12_BASE 0x40005260u\r
-#define CYDEV_PRTDSI_PRT12_SIZE 0x00000006u\r
-#define CYDEV_PRTDSI_PRT12_OUT_SEL0 0x40005260u\r
-#define CYDEV_PRTDSI_PRT12_OUT_SEL1 0x40005261u\r
-#define CYDEV_PRTDSI_PRT12_OE_SEL0 0x40005262u\r
-#define CYDEV_PRTDSI_PRT12_OE_SEL1 0x40005263u\r
-#define CYDEV_PRTDSI_PRT12_DBL_SYNC_IN 0x40005264u\r
-#define CYDEV_PRTDSI_PRT12_SYNC_OUT 0x40005265u\r
-#define CYDEV_PRTDSI_PRT15_BASE 0x40005278u\r
-#define CYDEV_PRTDSI_PRT15_SIZE 0x00000007u\r
-#define CYDEV_PRTDSI_PRT15_OUT_SEL0 0x40005278u\r
-#define CYDEV_PRTDSI_PRT15_OUT_SEL1 0x40005279u\r
-#define CYDEV_PRTDSI_PRT15_OE_SEL0 0x4000527au\r
-#define CYDEV_PRTDSI_PRT15_OE_SEL1 0x4000527bu\r
-#define CYDEV_PRTDSI_PRT15_DBL_SYNC_IN 0x4000527cu\r
-#define CYDEV_PRTDSI_PRT15_SYNC_OUT 0x4000527du\r
-#define CYDEV_PRTDSI_PRT15_CAPS_SEL 0x4000527eu\r
-#define CYDEV_EMIF_BASE 0x40005400u\r
-#define CYDEV_EMIF_SIZE 0x00000007u\r
-#define CYDEV_EMIF_NO_UDB 0x40005400u\r
-#define CYDEV_EMIF_RP_WAIT_STATES 0x40005401u\r
-#define CYDEV_EMIF_MEM_DWN 0x40005402u\r
-#define CYDEV_EMIF_MEMCLK_DIV 0x40005403u\r
-#define CYDEV_EMIF_CLOCK_EN 0x40005404u\r
-#define CYDEV_EMIF_EM_TYPE 0x40005405u\r
-#define CYDEV_EMIF_WP_WAIT_STATES 0x40005406u\r
-#define CYDEV_ANAIF_BASE 0x40005800u\r
-#define CYDEV_ANAIF_SIZE 0x000003a9u\r
-#define CYDEV_ANAIF_CFG_BASE 0x40005800u\r
-#define CYDEV_ANAIF_CFG_SIZE 0x0000010fu\r
-#define CYDEV_ANAIF_CFG_SC0_BASE 0x40005800u\r
-#define CYDEV_ANAIF_CFG_SC0_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_SC0_CR0 0x40005800u\r
-#define CYDEV_ANAIF_CFG_SC0_CR1 0x40005801u\r
-#define CYDEV_ANAIF_CFG_SC0_CR2 0x40005802u\r
-#define CYDEV_ANAIF_CFG_SC1_BASE 0x40005804u\r
-#define CYDEV_ANAIF_CFG_SC1_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_SC1_CR0 0x40005804u\r
-#define CYDEV_ANAIF_CFG_SC1_CR1 0x40005805u\r
-#define CYDEV_ANAIF_CFG_SC1_CR2 0x40005806u\r
-#define CYDEV_ANAIF_CFG_SC2_BASE 0x40005808u\r
-#define CYDEV_ANAIF_CFG_SC2_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_SC2_CR0 0x40005808u\r
-#define CYDEV_ANAIF_CFG_SC2_CR1 0x40005809u\r
-#define CYDEV_ANAIF_CFG_SC2_CR2 0x4000580au\r
-#define CYDEV_ANAIF_CFG_SC3_BASE 0x4000580cu\r
-#define CYDEV_ANAIF_CFG_SC3_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_SC3_CR0 0x4000580cu\r
-#define CYDEV_ANAIF_CFG_SC3_CR1 0x4000580du\r
-#define CYDEV_ANAIF_CFG_SC3_CR2 0x4000580eu\r
-#define CYDEV_ANAIF_CFG_DAC0_BASE 0x40005820u\r
-#define CYDEV_ANAIF_CFG_DAC0_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_DAC0_CR0 0x40005820u\r
-#define CYDEV_ANAIF_CFG_DAC0_CR1 0x40005821u\r
-#define CYDEV_ANAIF_CFG_DAC0_TST 0x40005822u\r
-#define CYDEV_ANAIF_CFG_DAC1_BASE 0x40005824u\r
-#define CYDEV_ANAIF_CFG_DAC1_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_DAC1_CR0 0x40005824u\r
-#define CYDEV_ANAIF_CFG_DAC1_CR1 0x40005825u\r
-#define CYDEV_ANAIF_CFG_DAC1_TST 0x40005826u\r
-#define CYDEV_ANAIF_CFG_DAC2_BASE 0x40005828u\r
-#define CYDEV_ANAIF_CFG_DAC2_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_DAC2_CR0 0x40005828u\r
-#define CYDEV_ANAIF_CFG_DAC2_CR1 0x40005829u\r
-#define CYDEV_ANAIF_CFG_DAC2_TST 0x4000582au\r
-#define CYDEV_ANAIF_CFG_DAC3_BASE 0x4000582cu\r
-#define CYDEV_ANAIF_CFG_DAC3_SIZE 0x00000003u\r
-#define CYDEV_ANAIF_CFG_DAC3_CR0 0x4000582cu\r
-#define CYDEV_ANAIF_CFG_DAC3_CR1 0x4000582du\r
-#define CYDEV_ANAIF_CFG_DAC3_TST 0x4000582eu\r
-#define CYDEV_ANAIF_CFG_CMP0_BASE 0x40005840u\r
-#define CYDEV_ANAIF_CFG_CMP0_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_CMP0_CR 0x40005840u\r
-#define CYDEV_ANAIF_CFG_CMP1_BASE 0x40005841u\r
-#define CYDEV_ANAIF_CFG_CMP1_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_CMP1_CR 0x40005841u\r
-#define CYDEV_ANAIF_CFG_CMP2_BASE 0x40005842u\r
-#define CYDEV_ANAIF_CFG_CMP2_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_CMP2_CR 0x40005842u\r
-#define CYDEV_ANAIF_CFG_CMP3_BASE 0x40005843u\r
-#define CYDEV_ANAIF_CFG_CMP3_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_CMP3_CR 0x40005843u\r
-#define CYDEV_ANAIF_CFG_LUT0_BASE 0x40005848u\r
-#define CYDEV_ANAIF_CFG_LUT0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LUT0_CR 0x40005848u\r
-#define CYDEV_ANAIF_CFG_LUT0_MX 0x40005849u\r
-#define CYDEV_ANAIF_CFG_LUT1_BASE 0x4000584au\r
-#define CYDEV_ANAIF_CFG_LUT1_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LUT1_CR 0x4000584au\r
-#define CYDEV_ANAIF_CFG_LUT1_MX 0x4000584bu\r
-#define CYDEV_ANAIF_CFG_LUT2_BASE 0x4000584cu\r
-#define CYDEV_ANAIF_CFG_LUT2_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LUT2_CR 0x4000584cu\r
-#define CYDEV_ANAIF_CFG_LUT2_MX 0x4000584du\r
-#define CYDEV_ANAIF_CFG_LUT3_BASE 0x4000584eu\r
-#define CYDEV_ANAIF_CFG_LUT3_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LUT3_CR 0x4000584eu\r
-#define CYDEV_ANAIF_CFG_LUT3_MX 0x4000584fu\r
-#define CYDEV_ANAIF_CFG_OPAMP0_BASE 0x40005858u\r
-#define CYDEV_ANAIF_CFG_OPAMP0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_OPAMP0_CR 0x40005858u\r
-#define CYDEV_ANAIF_CFG_OPAMP0_RSVD 0x40005859u\r
-#define CYDEV_ANAIF_CFG_OPAMP1_BASE 0x4000585au\r
-#define CYDEV_ANAIF_CFG_OPAMP1_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_OPAMP1_CR 0x4000585au\r
-#define CYDEV_ANAIF_CFG_OPAMP1_RSVD 0x4000585bu\r
-#define CYDEV_ANAIF_CFG_OPAMP2_BASE 0x4000585cu\r
-#define CYDEV_ANAIF_CFG_OPAMP2_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_OPAMP2_CR 0x4000585cu\r
-#define CYDEV_ANAIF_CFG_OPAMP2_RSVD 0x4000585du\r
-#define CYDEV_ANAIF_CFG_OPAMP3_BASE 0x4000585eu\r
-#define CYDEV_ANAIF_CFG_OPAMP3_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_OPAMP3_CR 0x4000585eu\r
-#define CYDEV_ANAIF_CFG_OPAMP3_RSVD 0x4000585fu\r
-#define CYDEV_ANAIF_CFG_LCDDAC_BASE 0x40005868u\r
-#define CYDEV_ANAIF_CFG_LCDDAC_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LCDDAC_CR0 0x40005868u\r
-#define CYDEV_ANAIF_CFG_LCDDAC_CR1 0x40005869u\r
-#define CYDEV_ANAIF_CFG_LCDDRV_BASE 0x4000586au\r
-#define CYDEV_ANAIF_CFG_LCDDRV_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_LCDDRV_CR 0x4000586au\r
-#define CYDEV_ANAIF_CFG_LCDTMR_BASE 0x4000586bu\r
-#define CYDEV_ANAIF_CFG_LCDTMR_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_LCDTMR_CFG 0x4000586bu\r
-#define CYDEV_ANAIF_CFG_BG_BASE 0x4000586cu\r
-#define CYDEV_ANAIF_CFG_BG_SIZE 0x00000004u\r
-#define CYDEV_ANAIF_CFG_BG_CR0 0x4000586cu\r
-#define CYDEV_ANAIF_CFG_BG_RSVD 0x4000586du\r
-#define CYDEV_ANAIF_CFG_BG_DFT0 0x4000586eu\r
-#define CYDEV_ANAIF_CFG_BG_DFT1 0x4000586fu\r
-#define CYDEV_ANAIF_CFG_CAPSL_BASE 0x40005870u\r
-#define CYDEV_ANAIF_CFG_CAPSL_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_CAPSL_CFG0 0x40005870u\r
-#define CYDEV_ANAIF_CFG_CAPSL_CFG1 0x40005871u\r
-#define CYDEV_ANAIF_CFG_CAPSR_BASE 0x40005872u\r
-#define CYDEV_ANAIF_CFG_CAPSR_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_CAPSR_CFG0 0x40005872u\r
-#define CYDEV_ANAIF_CFG_CAPSR_CFG1 0x40005873u\r
-#define CYDEV_ANAIF_CFG_PUMP_BASE 0x40005876u\r
-#define CYDEV_ANAIF_CFG_PUMP_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_PUMP_CR0 0x40005876u\r
-#define CYDEV_ANAIF_CFG_PUMP_CR1 0x40005877u\r
-#define CYDEV_ANAIF_CFG_LPF0_BASE 0x40005878u\r
-#define CYDEV_ANAIF_CFG_LPF0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LPF0_CR0 0x40005878u\r
-#define CYDEV_ANAIF_CFG_LPF0_RSVD 0x40005879u\r
-#define CYDEV_ANAIF_CFG_LPF1_BASE 0x4000587au\r
-#define CYDEV_ANAIF_CFG_LPF1_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_CFG_LPF1_CR0 0x4000587au\r
-#define CYDEV_ANAIF_CFG_LPF1_RSVD 0x4000587bu\r
-#define CYDEV_ANAIF_CFG_MISC_BASE 0x4000587cu\r
-#define CYDEV_ANAIF_CFG_MISC_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_CFG_MISC_CR0 0x4000587cu\r
-#define CYDEV_ANAIF_CFG_DSM0_BASE 0x40005880u\r
-#define CYDEV_ANAIF_CFG_DSM0_SIZE 0x00000020u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR0 0x40005880u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR1 0x40005881u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR2 0x40005882u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR3 0x40005883u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR4 0x40005884u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR5 0x40005885u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR6 0x40005886u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR7 0x40005887u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR8 0x40005888u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR9 0x40005889u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR10 0x4000588au\r
-#define CYDEV_ANAIF_CFG_DSM0_CR11 0x4000588bu\r
-#define CYDEV_ANAIF_CFG_DSM0_CR12 0x4000588cu\r
-#define CYDEV_ANAIF_CFG_DSM0_CR13 0x4000588du\r
-#define CYDEV_ANAIF_CFG_DSM0_CR14 0x4000588eu\r
-#define CYDEV_ANAIF_CFG_DSM0_CR15 0x4000588fu\r
-#define CYDEV_ANAIF_CFG_DSM0_CR16 0x40005890u\r
-#define CYDEV_ANAIF_CFG_DSM0_CR17 0x40005891u\r
-#define CYDEV_ANAIF_CFG_DSM0_REF0 0x40005892u\r
-#define CYDEV_ANAIF_CFG_DSM0_REF1 0x40005893u\r
-#define CYDEV_ANAIF_CFG_DSM0_REF2 0x40005894u\r
-#define CYDEV_ANAIF_CFG_DSM0_REF3 0x40005895u\r
-#define CYDEV_ANAIF_CFG_DSM0_DEM0 0x40005896u\r
-#define CYDEV_ANAIF_CFG_DSM0_DEM1 0x40005897u\r
-#define CYDEV_ANAIF_CFG_DSM0_TST0 0x40005898u\r
-#define CYDEV_ANAIF_CFG_DSM0_TST1 0x40005899u\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF0 0x4000589au\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF1 0x4000589bu\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF2 0x4000589cu\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF3 0x4000589du\r
-#define CYDEV_ANAIF_CFG_DSM0_MISC 0x4000589eu\r
-#define CYDEV_ANAIF_CFG_DSM0_RSVD1 0x4000589fu\r
-#define CYDEV_ANAIF_CFG_SAR0_BASE 0x40005900u\r
-#define CYDEV_ANAIF_CFG_SAR0_SIZE 0x00000007u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR0 0x40005900u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR1 0x40005901u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR2 0x40005902u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR3 0x40005903u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR4 0x40005904u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR5 0x40005905u\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR6 0x40005906u\r
-#define CYDEV_ANAIF_CFG_SAR1_BASE 0x40005908u\r
-#define CYDEV_ANAIF_CFG_SAR1_SIZE 0x00000007u\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR0 0x40005908u\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR1 0x40005909u\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR2 0x4000590au\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR3 0x4000590bu\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR4 0x4000590cu\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR5 0x4000590du\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR6 0x4000590eu\r
-#define CYDEV_ANAIF_RT_BASE 0x40005a00u\r
-#define CYDEV_ANAIF_RT_SIZE 0x00000162u\r
-#define CYDEV_ANAIF_RT_SC0_BASE 0x40005a00u\r
-#define CYDEV_ANAIF_RT_SC0_SIZE 0x0000000du\r
-#define CYDEV_ANAIF_RT_SC0_SW0 0x40005a00u\r
-#define CYDEV_ANAIF_RT_SC0_SW2 0x40005a02u\r
-#define CYDEV_ANAIF_RT_SC0_SW3 0x40005a03u\r
-#define CYDEV_ANAIF_RT_SC0_SW4 0x40005a04u\r
-#define CYDEV_ANAIF_RT_SC0_SW6 0x40005a06u\r
-#define CYDEV_ANAIF_RT_SC0_SW7 0x40005a07u\r
-#define CYDEV_ANAIF_RT_SC0_SW8 0x40005a08u\r
-#define CYDEV_ANAIF_RT_SC0_SW10 0x40005a0au\r
-#define CYDEV_ANAIF_RT_SC0_CLK 0x40005a0bu\r
-#define CYDEV_ANAIF_RT_SC0_BST 0x40005a0cu\r
-#define CYDEV_ANAIF_RT_SC1_BASE 0x40005a10u\r
-#define CYDEV_ANAIF_RT_SC1_SIZE 0x0000000du\r
-#define CYDEV_ANAIF_RT_SC1_SW0 0x40005a10u\r
-#define CYDEV_ANAIF_RT_SC1_SW2 0x40005a12u\r
-#define CYDEV_ANAIF_RT_SC1_SW3 0x40005a13u\r
-#define CYDEV_ANAIF_RT_SC1_SW4 0x40005a14u\r
-#define CYDEV_ANAIF_RT_SC1_SW6 0x40005a16u\r
-#define CYDEV_ANAIF_RT_SC1_SW7 0x40005a17u\r
-#define CYDEV_ANAIF_RT_SC1_SW8 0x40005a18u\r
-#define CYDEV_ANAIF_RT_SC1_SW10 0x40005a1au\r
-#define CYDEV_ANAIF_RT_SC1_CLK 0x40005a1bu\r
-#define CYDEV_ANAIF_RT_SC1_BST 0x40005a1cu\r
-#define CYDEV_ANAIF_RT_SC2_BASE 0x40005a20u\r
-#define CYDEV_ANAIF_RT_SC2_SIZE 0x0000000du\r
-#define CYDEV_ANAIF_RT_SC2_SW0 0x40005a20u\r
-#define CYDEV_ANAIF_RT_SC2_SW2 0x40005a22u\r
-#define CYDEV_ANAIF_RT_SC2_SW3 0x40005a23u\r
-#define CYDEV_ANAIF_RT_SC2_SW4 0x40005a24u\r
-#define CYDEV_ANAIF_RT_SC2_SW6 0x40005a26u\r
-#define CYDEV_ANAIF_RT_SC2_SW7 0x40005a27u\r
-#define CYDEV_ANAIF_RT_SC2_SW8 0x40005a28u\r
-#define CYDEV_ANAIF_RT_SC2_SW10 0x40005a2au\r
-#define CYDEV_ANAIF_RT_SC2_CLK 0x40005a2bu\r
-#define CYDEV_ANAIF_RT_SC2_BST 0x40005a2cu\r
-#define CYDEV_ANAIF_RT_SC3_BASE 0x40005a30u\r
-#define CYDEV_ANAIF_RT_SC3_SIZE 0x0000000du\r
-#define CYDEV_ANAIF_RT_SC3_SW0 0x40005a30u\r
-#define CYDEV_ANAIF_RT_SC3_SW2 0x40005a32u\r
-#define CYDEV_ANAIF_RT_SC3_SW3 0x40005a33u\r
-#define CYDEV_ANAIF_RT_SC3_SW4 0x40005a34u\r
-#define CYDEV_ANAIF_RT_SC3_SW6 0x40005a36u\r
-#define CYDEV_ANAIF_RT_SC3_SW7 0x40005a37u\r
-#define CYDEV_ANAIF_RT_SC3_SW8 0x40005a38u\r
-#define CYDEV_ANAIF_RT_SC3_SW10 0x40005a3au\r
-#define CYDEV_ANAIF_RT_SC3_CLK 0x40005a3bu\r
-#define CYDEV_ANAIF_RT_SC3_BST 0x40005a3cu\r
-#define CYDEV_ANAIF_RT_DAC0_BASE 0x40005a80u\r
-#define CYDEV_ANAIF_RT_DAC0_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_DAC0_SW0 0x40005a80u\r
-#define CYDEV_ANAIF_RT_DAC0_SW2 0x40005a82u\r
-#define CYDEV_ANAIF_RT_DAC0_SW3 0x40005a83u\r
-#define CYDEV_ANAIF_RT_DAC0_SW4 0x40005a84u\r
-#define CYDEV_ANAIF_RT_DAC0_STROBE 0x40005a87u\r
-#define CYDEV_ANAIF_RT_DAC1_BASE 0x40005a88u\r
-#define CYDEV_ANAIF_RT_DAC1_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_DAC1_SW0 0x40005a88u\r
-#define CYDEV_ANAIF_RT_DAC1_SW2 0x40005a8au\r
-#define CYDEV_ANAIF_RT_DAC1_SW3 0x40005a8bu\r
-#define CYDEV_ANAIF_RT_DAC1_SW4 0x40005a8cu\r
-#define CYDEV_ANAIF_RT_DAC1_STROBE 0x40005a8fu\r
-#define CYDEV_ANAIF_RT_DAC2_BASE 0x40005a90u\r
-#define CYDEV_ANAIF_RT_DAC2_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_DAC2_SW0 0x40005a90u\r
-#define CYDEV_ANAIF_RT_DAC2_SW2 0x40005a92u\r
-#define CYDEV_ANAIF_RT_DAC2_SW3 0x40005a93u\r
-#define CYDEV_ANAIF_RT_DAC2_SW4 0x40005a94u\r
-#define CYDEV_ANAIF_RT_DAC2_STROBE 0x40005a97u\r
-#define CYDEV_ANAIF_RT_DAC3_BASE 0x40005a98u\r
-#define CYDEV_ANAIF_RT_DAC3_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_DAC3_SW0 0x40005a98u\r
-#define CYDEV_ANAIF_RT_DAC3_SW2 0x40005a9au\r
-#define CYDEV_ANAIF_RT_DAC3_SW3 0x40005a9bu\r
-#define CYDEV_ANAIF_RT_DAC3_SW4 0x40005a9cu\r
-#define CYDEV_ANAIF_RT_DAC3_STROBE 0x40005a9fu\r
-#define CYDEV_ANAIF_RT_CMP0_BASE 0x40005ac0u\r
-#define CYDEV_ANAIF_RT_CMP0_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_CMP0_SW0 0x40005ac0u\r
-#define CYDEV_ANAIF_RT_CMP0_SW2 0x40005ac2u\r
-#define CYDEV_ANAIF_RT_CMP0_SW3 0x40005ac3u\r
-#define CYDEV_ANAIF_RT_CMP0_SW4 0x40005ac4u\r
-#define CYDEV_ANAIF_RT_CMP0_SW6 0x40005ac6u\r
-#define CYDEV_ANAIF_RT_CMP0_CLK 0x40005ac7u\r
-#define CYDEV_ANAIF_RT_CMP1_BASE 0x40005ac8u\r
-#define CYDEV_ANAIF_RT_CMP1_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_CMP1_SW0 0x40005ac8u\r
-#define CYDEV_ANAIF_RT_CMP1_SW2 0x40005acau\r
-#define CYDEV_ANAIF_RT_CMP1_SW3 0x40005acbu\r
-#define CYDEV_ANAIF_RT_CMP1_SW4 0x40005accu\r
-#define CYDEV_ANAIF_RT_CMP1_SW6 0x40005aceu\r
-#define CYDEV_ANAIF_RT_CMP1_CLK 0x40005acfu\r
-#define CYDEV_ANAIF_RT_CMP2_BASE 0x40005ad0u\r
-#define CYDEV_ANAIF_RT_CMP2_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_CMP2_SW0 0x40005ad0u\r
-#define CYDEV_ANAIF_RT_CMP2_SW2 0x40005ad2u\r
-#define CYDEV_ANAIF_RT_CMP2_SW3 0x40005ad3u\r
-#define CYDEV_ANAIF_RT_CMP2_SW4 0x40005ad4u\r
-#define CYDEV_ANAIF_RT_CMP2_SW6 0x40005ad6u\r
-#define CYDEV_ANAIF_RT_CMP2_CLK 0x40005ad7u\r
-#define CYDEV_ANAIF_RT_CMP3_BASE 0x40005ad8u\r
-#define CYDEV_ANAIF_RT_CMP3_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_CMP3_SW0 0x40005ad8u\r
-#define CYDEV_ANAIF_RT_CMP3_SW2 0x40005adau\r
-#define CYDEV_ANAIF_RT_CMP3_SW3 0x40005adbu\r
-#define CYDEV_ANAIF_RT_CMP3_SW4 0x40005adcu\r
-#define CYDEV_ANAIF_RT_CMP3_SW6 0x40005adeu\r
-#define CYDEV_ANAIF_RT_CMP3_CLK 0x40005adfu\r
-#define CYDEV_ANAIF_RT_DSM0_BASE 0x40005b00u\r
-#define CYDEV_ANAIF_RT_DSM0_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_DSM0_SW0 0x40005b00u\r
-#define CYDEV_ANAIF_RT_DSM0_SW2 0x40005b02u\r
-#define CYDEV_ANAIF_RT_DSM0_SW3 0x40005b03u\r
-#define CYDEV_ANAIF_RT_DSM0_SW4 0x40005b04u\r
-#define CYDEV_ANAIF_RT_DSM0_SW6 0x40005b06u\r
-#define CYDEV_ANAIF_RT_DSM0_CLK 0x40005b07u\r
-#define CYDEV_ANAIF_RT_SAR0_BASE 0x40005b20u\r
-#define CYDEV_ANAIF_RT_SAR0_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_SAR0_SW0 0x40005b20u\r
-#define CYDEV_ANAIF_RT_SAR0_SW2 0x40005b22u\r
-#define CYDEV_ANAIF_RT_SAR0_SW3 0x40005b23u\r
-#define CYDEV_ANAIF_RT_SAR0_SW4 0x40005b24u\r
-#define CYDEV_ANAIF_RT_SAR0_SW6 0x40005b26u\r
-#define CYDEV_ANAIF_RT_SAR0_CLK 0x40005b27u\r
-#define CYDEV_ANAIF_RT_SAR1_BASE 0x40005b28u\r
-#define CYDEV_ANAIF_RT_SAR1_SIZE 0x00000008u\r
-#define CYDEV_ANAIF_RT_SAR1_SW0 0x40005b28u\r
-#define CYDEV_ANAIF_RT_SAR1_SW2 0x40005b2au\r
-#define CYDEV_ANAIF_RT_SAR1_SW3 0x40005b2bu\r
-#define CYDEV_ANAIF_RT_SAR1_SW4 0x40005b2cu\r
-#define CYDEV_ANAIF_RT_SAR1_SW6 0x40005b2eu\r
-#define CYDEV_ANAIF_RT_SAR1_CLK 0x40005b2fu\r
-#define CYDEV_ANAIF_RT_OPAMP0_BASE 0x40005b40u\r
-#define CYDEV_ANAIF_RT_OPAMP0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_RT_OPAMP0_MX 0x40005b40u\r
-#define CYDEV_ANAIF_RT_OPAMP0_SW 0x40005b41u\r
-#define CYDEV_ANAIF_RT_OPAMP1_BASE 0x40005b42u\r
-#define CYDEV_ANAIF_RT_OPAMP1_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_RT_OPAMP1_MX 0x40005b42u\r
-#define CYDEV_ANAIF_RT_OPAMP1_SW 0x40005b43u\r
-#define CYDEV_ANAIF_RT_OPAMP2_BASE 0x40005b44u\r
-#define CYDEV_ANAIF_RT_OPAMP2_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_RT_OPAMP2_MX 0x40005b44u\r
-#define CYDEV_ANAIF_RT_OPAMP2_SW 0x40005b45u\r
-#define CYDEV_ANAIF_RT_OPAMP3_BASE 0x40005b46u\r
-#define CYDEV_ANAIF_RT_OPAMP3_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_RT_OPAMP3_MX 0x40005b46u\r
-#define CYDEV_ANAIF_RT_OPAMP3_SW 0x40005b47u\r
-#define CYDEV_ANAIF_RT_LCDDAC_BASE 0x40005b50u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SIZE 0x00000005u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW0 0x40005b50u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW1 0x40005b51u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW2 0x40005b52u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW3 0x40005b53u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW4 0x40005b54u\r
-#define CYDEV_ANAIF_RT_SC_BASE 0x40005b56u\r
-#define CYDEV_ANAIF_RT_SC_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_RT_SC_MISC 0x40005b56u\r
-#define CYDEV_ANAIF_RT_BUS_BASE 0x40005b58u\r
-#define CYDEV_ANAIF_RT_BUS_SIZE 0x00000004u\r
-#define CYDEV_ANAIF_RT_BUS_SW0 0x40005b58u\r
-#define CYDEV_ANAIF_RT_BUS_SW2 0x40005b5au\r
-#define CYDEV_ANAIF_RT_BUS_SW3 0x40005b5bu\r
-#define CYDEV_ANAIF_RT_DFT_BASE 0x40005b5cu\r
-#define CYDEV_ANAIF_RT_DFT_SIZE 0x00000006u\r
-#define CYDEV_ANAIF_RT_DFT_CR0 0x40005b5cu\r
-#define CYDEV_ANAIF_RT_DFT_CR1 0x40005b5du\r
-#define CYDEV_ANAIF_RT_DFT_CR2 0x40005b5eu\r
-#define CYDEV_ANAIF_RT_DFT_CR3 0x40005b5fu\r
-#define CYDEV_ANAIF_RT_DFT_CR4 0x40005b60u\r
-#define CYDEV_ANAIF_RT_DFT_CR5 0x40005b61u\r
-#define CYDEV_ANAIF_WRK_BASE 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_SIZE 0x00000029u\r
-#define CYDEV_ANAIF_WRK_DAC0_BASE 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_DAC0_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_WRK_DAC0_D 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_DAC1_BASE 0x40005b81u\r
-#define CYDEV_ANAIF_WRK_DAC1_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_WRK_DAC1_D 0x40005b81u\r
-#define CYDEV_ANAIF_WRK_DAC2_BASE 0x40005b82u\r
-#define CYDEV_ANAIF_WRK_DAC2_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_WRK_DAC2_D 0x40005b82u\r
-#define CYDEV_ANAIF_WRK_DAC3_BASE 0x40005b83u\r
-#define CYDEV_ANAIF_WRK_DAC3_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_WRK_DAC3_D 0x40005b83u\r
-#define CYDEV_ANAIF_WRK_DSM0_BASE 0x40005b88u\r
-#define CYDEV_ANAIF_WRK_DSM0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_WRK_DSM0_OUT0 0x40005b88u\r
-#define CYDEV_ANAIF_WRK_DSM0_OUT1 0x40005b89u\r
-#define CYDEV_ANAIF_WRK_LUT_BASE 0x40005b90u\r
-#define CYDEV_ANAIF_WRK_LUT_SIZE 0x00000005u\r
-#define CYDEV_ANAIF_WRK_LUT_SR 0x40005b90u\r
-#define CYDEV_ANAIF_WRK_LUT_WRK1 0x40005b91u\r
-#define CYDEV_ANAIF_WRK_LUT_MSK 0x40005b92u\r
-#define CYDEV_ANAIF_WRK_LUT_CLK 0x40005b93u\r
-#define CYDEV_ANAIF_WRK_LUT_CPTR 0x40005b94u\r
-#define CYDEV_ANAIF_WRK_CMP_BASE 0x40005b96u\r
-#define CYDEV_ANAIF_WRK_CMP_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_WRK_CMP_WRK 0x40005b96u\r
-#define CYDEV_ANAIF_WRK_CMP_TST 0x40005b97u\r
-#define CYDEV_ANAIF_WRK_SC_BASE 0x40005b98u\r
-#define CYDEV_ANAIF_WRK_SC_SIZE 0x00000005u\r
-#define CYDEV_ANAIF_WRK_SC_SR 0x40005b98u\r
-#define CYDEV_ANAIF_WRK_SC_WRK1 0x40005b99u\r
-#define CYDEV_ANAIF_WRK_SC_MSK 0x40005b9au\r
-#define CYDEV_ANAIF_WRK_SC_CMPINV 0x40005b9bu\r
-#define CYDEV_ANAIF_WRK_SC_CPTR 0x40005b9cu\r
-#define CYDEV_ANAIF_WRK_SAR0_BASE 0x40005ba0u\r
-#define CYDEV_ANAIF_WRK_SAR0_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_WRK_SAR0_WRK0 0x40005ba0u\r
-#define CYDEV_ANAIF_WRK_SAR0_WRK1 0x40005ba1u\r
-#define CYDEV_ANAIF_WRK_SAR1_BASE 0x40005ba2u\r
-#define CYDEV_ANAIF_WRK_SAR1_SIZE 0x00000002u\r
-#define CYDEV_ANAIF_WRK_SAR1_WRK0 0x40005ba2u\r
-#define CYDEV_ANAIF_WRK_SAR1_WRK1 0x40005ba3u\r
-#define CYDEV_ANAIF_WRK_SARS_BASE 0x40005ba8u\r
-#define CYDEV_ANAIF_WRK_SARS_SIZE 0x00000001u\r
-#define CYDEV_ANAIF_WRK_SARS_SOF 0x40005ba8u\r
-#define CYDEV_USB_BASE 0x40006000u\r
-#define CYDEV_USB_SIZE 0x00000300u\r
-#define CYDEV_USB_EP0_DR0 0x40006000u\r
-#define CYDEV_USB_EP0_DR1 0x40006001u\r
-#define CYDEV_USB_EP0_DR2 0x40006002u\r
-#define CYDEV_USB_EP0_DR3 0x40006003u\r
-#define CYDEV_USB_EP0_DR4 0x40006004u\r
-#define CYDEV_USB_EP0_DR5 0x40006005u\r
-#define CYDEV_USB_EP0_DR6 0x40006006u\r
-#define CYDEV_USB_EP0_DR7 0x40006007u\r
-#define CYDEV_USB_CR0 0x40006008u\r
-#define CYDEV_USB_CR1 0x40006009u\r
-#define CYDEV_USB_SIE_EP_INT_EN 0x4000600au\r
-#define CYDEV_USB_SIE_EP_INT_SR 0x4000600bu\r
-#define CYDEV_USB_SIE_EP1_BASE 0x4000600cu\r
-#define CYDEV_USB_SIE_EP1_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP1_CNT0 0x4000600cu\r
-#define CYDEV_USB_SIE_EP1_CNT1 0x4000600du\r
-#define CYDEV_USB_SIE_EP1_CR0 0x4000600eu\r
-#define CYDEV_USB_USBIO_CR0 0x40006010u\r
-#define CYDEV_USB_USBIO_CR1 0x40006012u\r
-#define CYDEV_USB_DYN_RECONFIG 0x40006014u\r
-#define CYDEV_USB_SOF0 0x40006018u\r
-#define CYDEV_USB_SOF1 0x40006019u\r
-#define CYDEV_USB_SIE_EP2_BASE 0x4000601cu\r
-#define CYDEV_USB_SIE_EP2_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP2_CNT0 0x4000601cu\r
-#define CYDEV_USB_SIE_EP2_CNT1 0x4000601du\r
-#define CYDEV_USB_SIE_EP2_CR0 0x4000601eu\r
-#define CYDEV_USB_EP0_CR 0x40006028u\r
-#define CYDEV_USB_EP0_CNT 0x40006029u\r
-#define CYDEV_USB_SIE_EP3_BASE 0x4000602cu\r
-#define CYDEV_USB_SIE_EP3_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP3_CNT0 0x4000602cu\r
-#define CYDEV_USB_SIE_EP3_CNT1 0x4000602du\r
-#define CYDEV_USB_SIE_EP3_CR0 0x4000602eu\r
-#define CYDEV_USB_SIE_EP4_BASE 0x4000603cu\r
-#define CYDEV_USB_SIE_EP4_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP4_CNT0 0x4000603cu\r
-#define CYDEV_USB_SIE_EP4_CNT1 0x4000603du\r
-#define CYDEV_USB_SIE_EP4_CR0 0x4000603eu\r
-#define CYDEV_USB_SIE_EP5_BASE 0x4000604cu\r
-#define CYDEV_USB_SIE_EP5_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP5_CNT0 0x4000604cu\r
-#define CYDEV_USB_SIE_EP5_CNT1 0x4000604du\r
-#define CYDEV_USB_SIE_EP5_CR0 0x4000604eu\r
-#define CYDEV_USB_SIE_EP6_BASE 0x4000605cu\r
-#define CYDEV_USB_SIE_EP6_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP6_CNT0 0x4000605cu\r
-#define CYDEV_USB_SIE_EP6_CNT1 0x4000605du\r
-#define CYDEV_USB_SIE_EP6_CR0 0x4000605eu\r
-#define CYDEV_USB_SIE_EP7_BASE 0x4000606cu\r
-#define CYDEV_USB_SIE_EP7_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP7_CNT0 0x4000606cu\r
-#define CYDEV_USB_SIE_EP7_CNT1 0x4000606du\r
-#define CYDEV_USB_SIE_EP7_CR0 0x4000606eu\r
-#define CYDEV_USB_SIE_EP8_BASE 0x4000607cu\r
-#define CYDEV_USB_SIE_EP8_SIZE 0x00000003u\r
-#define CYDEV_USB_SIE_EP8_CNT0 0x4000607cu\r
-#define CYDEV_USB_SIE_EP8_CNT1 0x4000607du\r
-#define CYDEV_USB_SIE_EP8_CR0 0x4000607eu\r
-#define CYDEV_USB_ARB_EP1_BASE 0x40006080u\r
-#define CYDEV_USB_ARB_EP1_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP1_CFG 0x40006080u\r
-#define CYDEV_USB_ARB_EP1_INT_EN 0x40006081u\r
-#define CYDEV_USB_ARB_EP1_SR 0x40006082u\r
-#define CYDEV_USB_ARB_RW1_BASE 0x40006084u\r
-#define CYDEV_USB_ARB_RW1_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW1_WA 0x40006084u\r
-#define CYDEV_USB_ARB_RW1_WA_MSB 0x40006085u\r
-#define CYDEV_USB_ARB_RW1_RA 0x40006086u\r
-#define CYDEV_USB_ARB_RW1_RA_MSB 0x40006087u\r
-#define CYDEV_USB_ARB_RW1_DR 0x40006088u\r
-#define CYDEV_USB_BUF_SIZE 0x4000608cu\r
-#define CYDEV_USB_EP_ACTIVE 0x4000608eu\r
-#define CYDEV_USB_EP_TYPE 0x4000608fu\r
-#define CYDEV_USB_ARB_EP2_BASE 0x40006090u\r
-#define CYDEV_USB_ARB_EP2_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP2_CFG 0x40006090u\r
-#define CYDEV_USB_ARB_EP2_INT_EN 0x40006091u\r
-#define CYDEV_USB_ARB_EP2_SR 0x40006092u\r
-#define CYDEV_USB_ARB_RW2_BASE 0x40006094u\r
-#define CYDEV_USB_ARB_RW2_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW2_WA 0x40006094u\r
-#define CYDEV_USB_ARB_RW2_WA_MSB 0x40006095u\r
-#define CYDEV_USB_ARB_RW2_RA 0x40006096u\r
-#define CYDEV_USB_ARB_RW2_RA_MSB 0x40006097u\r
-#define CYDEV_USB_ARB_RW2_DR 0x40006098u\r
-#define CYDEV_USB_ARB_CFG 0x4000609cu\r
-#define CYDEV_USB_USB_CLK_EN 0x4000609du\r
-#define CYDEV_USB_ARB_INT_EN 0x4000609eu\r
-#define CYDEV_USB_ARB_INT_SR 0x4000609fu\r
-#define CYDEV_USB_ARB_EP3_BASE 0x400060a0u\r
-#define CYDEV_USB_ARB_EP3_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP3_CFG 0x400060a0u\r
-#define CYDEV_USB_ARB_EP3_INT_EN 0x400060a1u\r
-#define CYDEV_USB_ARB_EP3_SR 0x400060a2u\r
-#define CYDEV_USB_ARB_RW3_BASE 0x400060a4u\r
-#define CYDEV_USB_ARB_RW3_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW3_WA 0x400060a4u\r
-#define CYDEV_USB_ARB_RW3_WA_MSB 0x400060a5u\r
-#define CYDEV_USB_ARB_RW3_RA 0x400060a6u\r
-#define CYDEV_USB_ARB_RW3_RA_MSB 0x400060a7u\r
-#define CYDEV_USB_ARB_RW3_DR 0x400060a8u\r
-#define CYDEV_USB_CWA 0x400060acu\r
-#define CYDEV_USB_CWA_MSB 0x400060adu\r
-#define CYDEV_USB_ARB_EP4_BASE 0x400060b0u\r
-#define CYDEV_USB_ARB_EP4_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP4_CFG 0x400060b0u\r
-#define CYDEV_USB_ARB_EP4_INT_EN 0x400060b1u\r
-#define CYDEV_USB_ARB_EP4_SR 0x400060b2u\r
-#define CYDEV_USB_ARB_RW4_BASE 0x400060b4u\r
-#define CYDEV_USB_ARB_RW4_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW4_WA 0x400060b4u\r
-#define CYDEV_USB_ARB_RW4_WA_MSB 0x400060b5u\r
-#define CYDEV_USB_ARB_RW4_RA 0x400060b6u\r
-#define CYDEV_USB_ARB_RW4_RA_MSB 0x400060b7u\r
-#define CYDEV_USB_ARB_RW4_DR 0x400060b8u\r
-#define CYDEV_USB_DMA_THRES 0x400060bcu\r
-#define CYDEV_USB_DMA_THRES_MSB 0x400060bdu\r
-#define CYDEV_USB_ARB_EP5_BASE 0x400060c0u\r
-#define CYDEV_USB_ARB_EP5_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP5_CFG 0x400060c0u\r
-#define CYDEV_USB_ARB_EP5_INT_EN 0x400060c1u\r
-#define CYDEV_USB_ARB_EP5_SR 0x400060c2u\r
-#define CYDEV_USB_ARB_RW5_BASE 0x400060c4u\r
-#define CYDEV_USB_ARB_RW5_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW5_WA 0x400060c4u\r
-#define CYDEV_USB_ARB_RW5_WA_MSB 0x400060c5u\r
-#define CYDEV_USB_ARB_RW5_RA 0x400060c6u\r
-#define CYDEV_USB_ARB_RW5_RA_MSB 0x400060c7u\r
-#define CYDEV_USB_ARB_RW5_DR 0x400060c8u\r
-#define CYDEV_USB_BUS_RST_CNT 0x400060ccu\r
-#define CYDEV_USB_ARB_EP6_BASE 0x400060d0u\r
-#define CYDEV_USB_ARB_EP6_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP6_CFG 0x400060d0u\r
-#define CYDEV_USB_ARB_EP6_INT_EN 0x400060d1u\r
-#define CYDEV_USB_ARB_EP6_SR 0x400060d2u\r
-#define CYDEV_USB_ARB_RW6_BASE 0x400060d4u\r
-#define CYDEV_USB_ARB_RW6_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW6_WA 0x400060d4u\r
-#define CYDEV_USB_ARB_RW6_WA_MSB 0x400060d5u\r
-#define CYDEV_USB_ARB_RW6_RA 0x400060d6u\r
-#define CYDEV_USB_ARB_RW6_RA_MSB 0x400060d7u\r
-#define CYDEV_USB_ARB_RW6_DR 0x400060d8u\r
-#define CYDEV_USB_ARB_EP7_BASE 0x400060e0u\r
-#define CYDEV_USB_ARB_EP7_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP7_CFG 0x400060e0u\r
-#define CYDEV_USB_ARB_EP7_INT_EN 0x400060e1u\r
-#define CYDEV_USB_ARB_EP7_SR 0x400060e2u\r
-#define CYDEV_USB_ARB_RW7_BASE 0x400060e4u\r
-#define CYDEV_USB_ARB_RW7_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW7_WA 0x400060e4u\r
-#define CYDEV_USB_ARB_RW7_WA_MSB 0x400060e5u\r
-#define CYDEV_USB_ARB_RW7_RA 0x400060e6u\r
-#define CYDEV_USB_ARB_RW7_RA_MSB 0x400060e7u\r
-#define CYDEV_USB_ARB_RW7_DR 0x400060e8u\r
-#define CYDEV_USB_ARB_EP8_BASE 0x400060f0u\r
-#define CYDEV_USB_ARB_EP8_SIZE 0x00000003u\r
-#define CYDEV_USB_ARB_EP8_CFG 0x400060f0u\r
-#define CYDEV_USB_ARB_EP8_INT_EN 0x400060f1u\r
-#define CYDEV_USB_ARB_EP8_SR 0x400060f2u\r
-#define CYDEV_USB_ARB_RW8_BASE 0x400060f4u\r
-#define CYDEV_USB_ARB_RW8_SIZE 0x00000005u\r
-#define CYDEV_USB_ARB_RW8_WA 0x400060f4u\r
-#define CYDEV_USB_ARB_RW8_WA_MSB 0x400060f5u\r
-#define CYDEV_USB_ARB_RW8_RA 0x400060f6u\r
-#define CYDEV_USB_ARB_RW8_RA_MSB 0x400060f7u\r
-#define CYDEV_USB_ARB_RW8_DR 0x400060f8u\r
-#define CYDEV_USB_MEM_BASE 0x40006100u\r
-#define CYDEV_USB_MEM_SIZE 0x00000200u\r
-#define CYDEV_USB_MEM_DATA_MBASE 0x40006100u\r
-#define CYDEV_USB_MEM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_UWRK_BASE 0x40006400u\r
-#define CYDEV_UWRK_SIZE 0x00000b60u\r
-#define CYDEV_UWRK_UWRK8_BASE 0x40006400u\r
-#define CYDEV_UWRK_UWRK8_SIZE 0x000003b0u\r
-#define CYDEV_UWRK_UWRK8_B0_BASE 0x40006400u\r
-#define CYDEV_UWRK_UWRK8_B0_SIZE 0x000000b0u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_A0 0x40006400u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_A0 0x40006401u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_A0 0x40006402u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_A0 0x40006403u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_A0 0x40006404u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_A0 0x40006405u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_A0 0x40006406u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_A0 0x40006407u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_A0 0x40006408u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_A0 0x40006409u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_A0 0x4000640au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_A0 0x4000640bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_A0 0x4000640cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_A0 0x4000640du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_A0 0x4000640eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_A0 0x4000640fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_A1 0x40006410u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_A1 0x40006411u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_A1 0x40006412u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_A1 0x40006413u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_A1 0x40006414u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_A1 0x40006415u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_A1 0x40006416u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_A1 0x40006417u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_A1 0x40006418u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_A1 0x40006419u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_A1 0x4000641au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_A1 0x4000641bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_A1 0x4000641cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_A1 0x4000641du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_A1 0x4000641eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_A1 0x4000641fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_D0 0x40006420u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_D0 0x40006421u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_D0 0x40006422u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_D0 0x40006423u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_D0 0x40006424u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_D0 0x40006425u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_D0 0x40006426u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_D0 0x40006427u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_D0 0x40006428u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_D0 0x40006429u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_D0 0x4000642au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_D0 0x4000642bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_D0 0x4000642cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_D0 0x4000642du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_D0 0x4000642eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_D0 0x4000642fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_D1 0x40006430u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_D1 0x40006431u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_D1 0x40006432u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_D1 0x40006433u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_D1 0x40006434u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_D1 0x40006435u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_D1 0x40006436u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_D1 0x40006437u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_D1 0x40006438u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_D1 0x40006439u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_D1 0x4000643au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_D1 0x4000643bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_D1 0x4000643cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_D1 0x4000643du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_D1 0x4000643eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_D1 0x4000643fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_F0 0x40006440u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_F0 0x40006441u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_F0 0x40006442u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_F0 0x40006443u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_F0 0x40006444u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_F0 0x40006445u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_F0 0x40006446u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_F0 0x40006447u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_F0 0x40006448u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_F0 0x40006449u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_F0 0x4000644au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_F0 0x4000644bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_F0 0x4000644cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_F0 0x4000644du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_F0 0x4000644eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_F0 0x4000644fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_F1 0x40006450u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_F1 0x40006451u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_F1 0x40006452u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_F1 0x40006453u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_F1 0x40006454u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_F1 0x40006455u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_F1 0x40006456u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_F1 0x40006457u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_F1 0x40006458u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_F1 0x40006459u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_F1 0x4000645au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_F1 0x4000645bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_F1 0x4000645cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_F1 0x4000645du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_F1 0x4000645eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_F1 0x4000645fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_ST 0x40006460u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_ST 0x40006461u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_ST 0x40006462u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_ST 0x40006463u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_ST 0x40006464u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_ST 0x40006465u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_ST 0x40006466u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_ST 0x40006467u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_ST 0x40006468u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_ST 0x40006469u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_ST 0x4000646au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_ST 0x4000646bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_ST 0x4000646cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_ST 0x4000646du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_ST 0x4000646eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_ST 0x4000646fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_CTL 0x40006470u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_CTL 0x40006471u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_CTL 0x40006472u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_CTL 0x40006473u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_CTL 0x40006474u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_CTL 0x40006475u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_CTL 0x40006476u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_CTL 0x40006477u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_CTL 0x40006478u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_CTL 0x40006479u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_CTL 0x4000647au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_CTL 0x4000647bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_CTL 0x4000647cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_CTL 0x4000647du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_CTL 0x4000647eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_CTL 0x4000647fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_MSK 0x40006480u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_MSK 0x40006481u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_MSK 0x40006482u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_MSK 0x40006483u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_MSK 0x40006484u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_MSK 0x40006485u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_MSK 0x40006486u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_MSK 0x40006487u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_MSK 0x40006488u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_MSK 0x40006489u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_MSK 0x4000648au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_MSK 0x4000648bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_MSK 0x4000648cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_MSK 0x4000648du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_MSK 0x4000648eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_MSK 0x4000648fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_ACTL 0x40006490u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_ACTL 0x40006491u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_ACTL 0x40006492u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_ACTL 0x40006493u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_ACTL 0x40006494u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_ACTL 0x40006495u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_ACTL 0x40006496u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_ACTL 0x40006497u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_ACTL 0x40006498u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_ACTL 0x40006499u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_ACTL 0x4000649au\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_ACTL 0x4000649bu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_ACTL 0x4000649cu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_ACTL 0x4000649du\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_ACTL 0x4000649eu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_ACTL 0x4000649fu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_MC 0x400064a0u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_MC 0x400064a1u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_MC 0x400064a2u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_MC 0x400064a3u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_MC 0x400064a4u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_MC 0x400064a5u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_MC 0x400064a6u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_MC 0x400064a7u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_MC 0x400064a8u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_MC 0x400064a9u\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_MC 0x400064aau\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_MC 0x400064abu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_MC 0x400064acu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_MC 0x400064adu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_MC 0x400064aeu\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_MC 0x400064afu\r
-#define CYDEV_UWRK_UWRK8_B1_BASE 0x40006500u\r
-#define CYDEV_UWRK_UWRK8_B1_SIZE 0x000000b0u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_A0 0x40006504u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_A0 0x40006505u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_A0 0x40006506u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_A0 0x40006507u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_A0 0x40006508u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_A0 0x40006509u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_A0 0x4000650au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_A0 0x4000650bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_A1 0x40006514u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_A1 0x40006515u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_A1 0x40006516u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_A1 0x40006517u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_A1 0x40006518u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_A1 0x40006519u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_A1 0x4000651au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_A1 0x4000651bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_D0 0x40006524u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_D0 0x40006525u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_D0 0x40006526u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_D0 0x40006527u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_D0 0x40006528u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_D0 0x40006529u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_D0 0x4000652au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_D0 0x4000652bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_D1 0x40006534u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_D1 0x40006535u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_D1 0x40006536u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_D1 0x40006537u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_D1 0x40006538u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_D1 0x40006539u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_D1 0x4000653au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_D1 0x4000653bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_F0 0x40006544u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_F0 0x40006545u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_F0 0x40006546u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_F0 0x40006547u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_F0 0x40006548u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_F0 0x40006549u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_F0 0x4000654au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_F0 0x4000654bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_F1 0x40006554u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_F1 0x40006555u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_F1 0x40006556u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_F1 0x40006557u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_F1 0x40006558u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_F1 0x40006559u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_F1 0x4000655au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_F1 0x4000655bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_ST 0x40006564u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_ST 0x40006565u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_ST 0x40006566u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_ST 0x40006567u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_ST 0x40006568u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_ST 0x40006569u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_ST 0x4000656au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_ST 0x4000656bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_CTL 0x40006574u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_CTL 0x40006575u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_CTL 0x40006576u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_CTL 0x40006577u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_CTL 0x40006578u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_CTL 0x40006579u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_CTL 0x4000657au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_CTL 0x4000657bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_MSK 0x40006584u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_MSK 0x40006585u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_MSK 0x40006586u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_MSK 0x40006587u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_MSK 0x40006588u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_MSK 0x40006589u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_MSK 0x4000658au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_MSK 0x4000658bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_ACTL 0x40006594u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_ACTL 0x40006595u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_ACTL 0x40006596u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_ACTL 0x40006597u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_ACTL 0x40006598u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_ACTL 0x40006599u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_ACTL 0x4000659au\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_ACTL 0x4000659bu\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_MC 0x400065a4u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_MC 0x400065a5u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_MC 0x400065a6u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_MC 0x400065a7u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_MC 0x400065a8u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_MC 0x400065a9u\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_MC 0x400065aau\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_MC 0x400065abu\r
-#define CYDEV_UWRK_UWRK16_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_SIZE 0x00000760u\r
-#define CYDEV_UWRK_UWRK16_CAT_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_CAT_SIZE 0x00000760u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_SIZE 0x00000160u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1 0x40006802u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1 0x40006804u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1 0x40006806u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1 0x40006808u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1 0x4000680au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1 0x4000680cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1 0x4000680eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1 0x40006810u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1 0x40006812u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1 0x40006814u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1 0x40006816u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1 0x40006818u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1 0x4000681au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1 0x4000681cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1 0x4000681eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1 0x40006840u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1 0x40006842u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1 0x40006844u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1 0x40006846u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1 0x40006848u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1 0x4000684au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1 0x4000684cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1 0x4000684eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1 0x40006850u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1 0x40006852u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1 0x40006854u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1 0x40006856u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1 0x40006858u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1 0x4000685au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1 0x4000685cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1 0x4000685eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1 0x40006880u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1 0x40006882u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1 0x40006884u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1 0x40006886u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1 0x40006888u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1 0x4000688au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1 0x4000688cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1 0x4000688eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1 0x40006890u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1 0x40006892u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1 0x40006894u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1 0x40006896u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1 0x40006898u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1 0x4000689au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1 0x4000689cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1 0x4000689eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL 0x400068c0u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL 0x400068c2u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL 0x400068c4u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL 0x400068c6u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL 0x400068c8u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL 0x400068cau\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL 0x400068ccu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL 0x400068ceu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL 0x400068d0u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL 0x400068d2u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL 0x400068d4u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL 0x400068d6u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL 0x400068d8u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL 0x400068dau\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL 0x400068dcu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL 0x400068deu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL 0x40006900u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL 0x40006902u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL 0x40006904u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL 0x40006906u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL 0x40006908u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL 0x4000690au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL 0x4000690cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL 0x4000690eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL 0x40006910u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL 0x40006912u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL 0x40006914u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL 0x40006916u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL 0x40006918u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL 0x4000691au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL 0x4000691cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL 0x4000691eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00 0x40006940u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00 0x40006942u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00 0x40006944u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00 0x40006946u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00 0x40006948u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00 0x4000694au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00 0x4000694cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00 0x4000694eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00 0x40006950u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00 0x40006952u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00 0x40006954u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00 0x40006956u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00 0x40006958u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00 0x4000695au\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00 0x4000695cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00 0x4000695eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_BASE 0x40006a00u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_SIZE 0x00000160u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1 0x40006a08u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1 0x40006a0au\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1 0x40006a0cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1 0x40006a0eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1 0x40006a10u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1 0x40006a12u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1 0x40006a14u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1 0x40006a16u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1 0x40006a48u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1 0x40006a4au\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1 0x40006a4cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1 0x40006a4eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1 0x40006a50u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1 0x40006a52u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1 0x40006a54u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1 0x40006a56u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1 0x40006a88u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1 0x40006a8au\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1 0x40006a8cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1 0x40006a8eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1 0x40006a90u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1 0x40006a92u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1 0x40006a94u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1 0x40006a96u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL 0x40006ac8u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL 0x40006acau\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL 0x40006accu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL 0x40006aceu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL 0x40006ad0u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL 0x40006ad2u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL 0x40006ad4u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL 0x40006ad6u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL 0x40006b08u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL 0x40006b0au\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL 0x40006b0cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL 0x40006b0eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL 0x40006b10u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL 0x40006b12u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL 0x40006b14u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL 0x40006b16u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00 0x40006b48u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00 0x40006b4au\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00 0x40006b4cu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00 0x40006b4eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00 0x40006b50u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00 0x40006b52u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00 0x40006b54u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00 0x40006b56u\r
-#define CYDEV_UWRK_UWRK16_DEF_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_DEF_SIZE 0x0000075eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_SIZE 0x0000015eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0 0x40006802u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0 0x40006804u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0 0x40006806u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0 0x40006808u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0 0x4000680au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0 0x4000680cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0 0x4000680eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0 0x40006810u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0 0x40006812u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0 0x40006814u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0 0x40006816u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0 0x40006818u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0 0x4000681au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0 0x4000681cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1 0x40006820u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1 0x40006822u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1 0x40006824u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1 0x40006826u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1 0x40006828u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1 0x4000682au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1 0x4000682cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1 0x4000682eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1 0x40006830u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1 0x40006832u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1 0x40006834u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1 0x40006836u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1 0x40006838u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1 0x4000683au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1 0x4000683cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0 0x40006840u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0 0x40006842u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0 0x40006844u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0 0x40006846u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0 0x40006848u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0 0x4000684au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0 0x4000684cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0 0x4000684eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0 0x40006850u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0 0x40006852u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0 0x40006854u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0 0x40006856u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0 0x40006858u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0 0x4000685au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0 0x4000685cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1 0x40006860u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1 0x40006862u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1 0x40006864u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1 0x40006866u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1 0x40006868u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1 0x4000686au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1 0x4000686cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1 0x4000686eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1 0x40006870u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1 0x40006872u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1 0x40006874u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1 0x40006876u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1 0x40006878u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1 0x4000687au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1 0x4000687cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0 0x40006880u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0 0x40006882u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0 0x40006884u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0 0x40006886u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0 0x40006888u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0 0x4000688au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0 0x4000688cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0 0x4000688eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0 0x40006890u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0 0x40006892u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0 0x40006894u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0 0x40006896u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0 0x40006898u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0 0x4000689au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0 0x4000689cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1 0x400068a0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1 0x400068a2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1 0x400068a4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1 0x400068a6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1 0x400068a8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1 0x400068aau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1 0x400068acu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1 0x400068aeu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1 0x400068b0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1 0x400068b2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1 0x400068b4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1 0x400068b6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1 0x400068b8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1 0x400068bau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1 0x400068bcu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST 0x400068c0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST 0x400068c2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST 0x400068c4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST 0x400068c6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST 0x400068c8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST 0x400068cau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST 0x400068ccu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST 0x400068ceu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST 0x400068d0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST 0x400068d2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST 0x400068d4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST 0x400068d6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST 0x400068d8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST 0x400068dau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST 0x400068dcu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL 0x400068e0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL 0x400068e2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL 0x400068e4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL 0x400068e6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL 0x400068e8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL 0x400068eau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL 0x400068ecu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL 0x400068eeu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL 0x400068f0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL 0x400068f2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL 0x400068f4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL 0x400068f6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL 0x400068f8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL 0x400068fau\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL 0x400068fcu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK 0x40006900u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK 0x40006902u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK 0x40006904u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK 0x40006906u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK 0x40006908u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK 0x4000690au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK 0x4000690cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK 0x4000690eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK 0x40006910u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK 0x40006912u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK 0x40006914u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK 0x40006916u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK 0x40006918u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK 0x4000691au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK 0x4000691cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL 0x40006920u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL 0x40006922u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL 0x40006924u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL 0x40006926u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL 0x40006928u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL 0x4000692au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL 0x4000692cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL 0x4000692eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL 0x40006930u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL 0x40006932u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL 0x40006934u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL 0x40006936u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL 0x40006938u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL 0x4000693au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL 0x4000693cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC 0x40006940u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC 0x40006942u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC 0x40006944u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC 0x40006946u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC 0x40006948u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC 0x4000694au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC 0x4000694cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC 0x4000694eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC 0x40006950u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC 0x40006952u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC 0x40006954u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC 0x40006956u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC 0x40006958u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC 0x4000695au\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC 0x4000695cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_BASE 0x40006a00u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_SIZE 0x0000015eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0 0x40006a08u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0 0x40006a0au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0 0x40006a0cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0 0x40006a0eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0 0x40006a10u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0 0x40006a12u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0 0x40006a14u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0 0x40006a16u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1 0x40006a28u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1 0x40006a2au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1 0x40006a2cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1 0x40006a2eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1 0x40006a30u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1 0x40006a32u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1 0x40006a34u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1 0x40006a36u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0 0x40006a48u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0 0x40006a4au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0 0x40006a4cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0 0x40006a4eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0 0x40006a50u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0 0x40006a52u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0 0x40006a54u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0 0x40006a56u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1 0x40006a68u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1 0x40006a6au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1 0x40006a6cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1 0x40006a6eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1 0x40006a70u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1 0x40006a72u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1 0x40006a74u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1 0x40006a76u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0 0x40006a88u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0 0x40006a8au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0 0x40006a8cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0 0x40006a8eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0 0x40006a90u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0 0x40006a92u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0 0x40006a94u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0 0x40006a96u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1 0x40006aa8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1 0x40006aaau\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1 0x40006aacu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1 0x40006aaeu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1 0x40006ab0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1 0x40006ab2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1 0x40006ab4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1 0x40006ab6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST 0x40006ac8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST 0x40006acau\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST 0x40006accu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST 0x40006aceu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST 0x40006ad0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST 0x40006ad2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST 0x40006ad4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST 0x40006ad6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL 0x40006ae8u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL 0x40006aeau\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL 0x40006aecu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL 0x40006aeeu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL 0x40006af0u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL 0x40006af2u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL 0x40006af4u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL 0x40006af6u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK 0x40006b08u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK 0x40006b0au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK 0x40006b0cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK 0x40006b0eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK 0x40006b10u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK 0x40006b12u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK 0x40006b14u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK 0x40006b16u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL 0x40006b28u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL 0x40006b2au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL 0x40006b2cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL 0x40006b2eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL 0x40006b30u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL 0x40006b32u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL 0x40006b34u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL 0x40006b36u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC 0x40006b48u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC 0x40006b4au\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC 0x40006b4cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC 0x40006b4eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC 0x40006b50u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC 0x40006b52u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC 0x40006b54u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC 0x40006b56u\r
-#define CYDEV_PHUB_BASE 0x40007000u\r
-#define CYDEV_PHUB_SIZE 0x00000c00u\r
-#define CYDEV_PHUB_CFG 0x40007000u\r
-#define CYDEV_PHUB_ERR 0x40007004u\r
-#define CYDEV_PHUB_ERR_ADR 0x40007008u\r
-#define CYDEV_PHUB_CH0_BASE 0x40007010u\r
-#define CYDEV_PHUB_CH0_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH0_BASIC_CFG 0x40007010u\r
-#define CYDEV_PHUB_CH0_ACTION 0x40007014u\r
-#define CYDEV_PHUB_CH0_BASIC_STATUS 0x40007018u\r
-#define CYDEV_PHUB_CH1_BASE 0x40007020u\r
-#define CYDEV_PHUB_CH1_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH1_BASIC_CFG 0x40007020u\r
-#define CYDEV_PHUB_CH1_ACTION 0x40007024u\r
-#define CYDEV_PHUB_CH1_BASIC_STATUS 0x40007028u\r
-#define CYDEV_PHUB_CH2_BASE 0x40007030u\r
-#define CYDEV_PHUB_CH2_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH2_BASIC_CFG 0x40007030u\r
-#define CYDEV_PHUB_CH2_ACTION 0x40007034u\r
-#define CYDEV_PHUB_CH2_BASIC_STATUS 0x40007038u\r
-#define CYDEV_PHUB_CH3_BASE 0x40007040u\r
-#define CYDEV_PHUB_CH3_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH3_BASIC_CFG 0x40007040u\r
-#define CYDEV_PHUB_CH3_ACTION 0x40007044u\r
-#define CYDEV_PHUB_CH3_BASIC_STATUS 0x40007048u\r
-#define CYDEV_PHUB_CH4_BASE 0x40007050u\r
-#define CYDEV_PHUB_CH4_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH4_BASIC_CFG 0x40007050u\r
-#define CYDEV_PHUB_CH4_ACTION 0x40007054u\r
-#define CYDEV_PHUB_CH4_BASIC_STATUS 0x40007058u\r
-#define CYDEV_PHUB_CH5_BASE 0x40007060u\r
-#define CYDEV_PHUB_CH5_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH5_BASIC_CFG 0x40007060u\r
-#define CYDEV_PHUB_CH5_ACTION 0x40007064u\r
-#define CYDEV_PHUB_CH5_BASIC_STATUS 0x40007068u\r
-#define CYDEV_PHUB_CH6_BASE 0x40007070u\r
-#define CYDEV_PHUB_CH6_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH6_BASIC_CFG 0x40007070u\r
-#define CYDEV_PHUB_CH6_ACTION 0x40007074u\r
-#define CYDEV_PHUB_CH6_BASIC_STATUS 0x40007078u\r
-#define CYDEV_PHUB_CH7_BASE 0x40007080u\r
-#define CYDEV_PHUB_CH7_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH7_BASIC_CFG 0x40007080u\r
-#define CYDEV_PHUB_CH7_ACTION 0x40007084u\r
-#define CYDEV_PHUB_CH7_BASIC_STATUS 0x40007088u\r
-#define CYDEV_PHUB_CH8_BASE 0x40007090u\r
-#define CYDEV_PHUB_CH8_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH8_BASIC_CFG 0x40007090u\r
-#define CYDEV_PHUB_CH8_ACTION 0x40007094u\r
-#define CYDEV_PHUB_CH8_BASIC_STATUS 0x40007098u\r
-#define CYDEV_PHUB_CH9_BASE 0x400070a0u\r
-#define CYDEV_PHUB_CH9_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH9_BASIC_CFG 0x400070a0u\r
-#define CYDEV_PHUB_CH9_ACTION 0x400070a4u\r
-#define CYDEV_PHUB_CH9_BASIC_STATUS 0x400070a8u\r
-#define CYDEV_PHUB_CH10_BASE 0x400070b0u\r
-#define CYDEV_PHUB_CH10_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH10_BASIC_CFG 0x400070b0u\r
-#define CYDEV_PHUB_CH10_ACTION 0x400070b4u\r
-#define CYDEV_PHUB_CH10_BASIC_STATUS 0x400070b8u\r
-#define CYDEV_PHUB_CH11_BASE 0x400070c0u\r
-#define CYDEV_PHUB_CH11_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH11_BASIC_CFG 0x400070c0u\r
-#define CYDEV_PHUB_CH11_ACTION 0x400070c4u\r
-#define CYDEV_PHUB_CH11_BASIC_STATUS 0x400070c8u\r
-#define CYDEV_PHUB_CH12_BASE 0x400070d0u\r
-#define CYDEV_PHUB_CH12_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH12_BASIC_CFG 0x400070d0u\r
-#define CYDEV_PHUB_CH12_ACTION 0x400070d4u\r
-#define CYDEV_PHUB_CH12_BASIC_STATUS 0x400070d8u\r
-#define CYDEV_PHUB_CH13_BASE 0x400070e0u\r
-#define CYDEV_PHUB_CH13_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH13_BASIC_CFG 0x400070e0u\r
-#define CYDEV_PHUB_CH13_ACTION 0x400070e4u\r
-#define CYDEV_PHUB_CH13_BASIC_STATUS 0x400070e8u\r
-#define CYDEV_PHUB_CH14_BASE 0x400070f0u\r
-#define CYDEV_PHUB_CH14_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH14_BASIC_CFG 0x400070f0u\r
-#define CYDEV_PHUB_CH14_ACTION 0x400070f4u\r
-#define CYDEV_PHUB_CH14_BASIC_STATUS 0x400070f8u\r
-#define CYDEV_PHUB_CH15_BASE 0x40007100u\r
-#define CYDEV_PHUB_CH15_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH15_BASIC_CFG 0x40007100u\r
-#define CYDEV_PHUB_CH15_ACTION 0x40007104u\r
-#define CYDEV_PHUB_CH15_BASIC_STATUS 0x40007108u\r
-#define CYDEV_PHUB_CH16_BASE 0x40007110u\r
-#define CYDEV_PHUB_CH16_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH16_BASIC_CFG 0x40007110u\r
-#define CYDEV_PHUB_CH16_ACTION 0x40007114u\r
-#define CYDEV_PHUB_CH16_BASIC_STATUS 0x40007118u\r
-#define CYDEV_PHUB_CH17_BASE 0x40007120u\r
-#define CYDEV_PHUB_CH17_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH17_BASIC_CFG 0x40007120u\r
-#define CYDEV_PHUB_CH17_ACTION 0x40007124u\r
-#define CYDEV_PHUB_CH17_BASIC_STATUS 0x40007128u\r
-#define CYDEV_PHUB_CH18_BASE 0x40007130u\r
-#define CYDEV_PHUB_CH18_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH18_BASIC_CFG 0x40007130u\r
-#define CYDEV_PHUB_CH18_ACTION 0x40007134u\r
-#define CYDEV_PHUB_CH18_BASIC_STATUS 0x40007138u\r
-#define CYDEV_PHUB_CH19_BASE 0x40007140u\r
-#define CYDEV_PHUB_CH19_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH19_BASIC_CFG 0x40007140u\r
-#define CYDEV_PHUB_CH19_ACTION 0x40007144u\r
-#define CYDEV_PHUB_CH19_BASIC_STATUS 0x40007148u\r
-#define CYDEV_PHUB_CH20_BASE 0x40007150u\r
-#define CYDEV_PHUB_CH20_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH20_BASIC_CFG 0x40007150u\r
-#define CYDEV_PHUB_CH20_ACTION 0x40007154u\r
-#define CYDEV_PHUB_CH20_BASIC_STATUS 0x40007158u\r
-#define CYDEV_PHUB_CH21_BASE 0x40007160u\r
-#define CYDEV_PHUB_CH21_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH21_BASIC_CFG 0x40007160u\r
-#define CYDEV_PHUB_CH21_ACTION 0x40007164u\r
-#define CYDEV_PHUB_CH21_BASIC_STATUS 0x40007168u\r
-#define CYDEV_PHUB_CH22_BASE 0x40007170u\r
-#define CYDEV_PHUB_CH22_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH22_BASIC_CFG 0x40007170u\r
-#define CYDEV_PHUB_CH22_ACTION 0x40007174u\r
-#define CYDEV_PHUB_CH22_BASIC_STATUS 0x40007178u\r
-#define CYDEV_PHUB_CH23_BASE 0x40007180u\r
-#define CYDEV_PHUB_CH23_SIZE 0x0000000cu\r
-#define CYDEV_PHUB_CH23_BASIC_CFG 0x40007180u\r
-#define CYDEV_PHUB_CH23_ACTION 0x40007184u\r
-#define CYDEV_PHUB_CH23_BASIC_STATUS 0x40007188u\r
-#define CYDEV_PHUB_CFGMEM0_BASE 0x40007600u\r
-#define CYDEV_PHUB_CFGMEM0_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM0_CFG0 0x40007600u\r
-#define CYDEV_PHUB_CFGMEM0_CFG1 0x40007604u\r
-#define CYDEV_PHUB_CFGMEM1_BASE 0x40007608u\r
-#define CYDEV_PHUB_CFGMEM1_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM1_CFG0 0x40007608u\r
-#define CYDEV_PHUB_CFGMEM1_CFG1 0x4000760cu\r
-#define CYDEV_PHUB_CFGMEM2_BASE 0x40007610u\r
-#define CYDEV_PHUB_CFGMEM2_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM2_CFG0 0x40007610u\r
-#define CYDEV_PHUB_CFGMEM2_CFG1 0x40007614u\r
-#define CYDEV_PHUB_CFGMEM3_BASE 0x40007618u\r
-#define CYDEV_PHUB_CFGMEM3_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM3_CFG0 0x40007618u\r
-#define CYDEV_PHUB_CFGMEM3_CFG1 0x4000761cu\r
-#define CYDEV_PHUB_CFGMEM4_BASE 0x40007620u\r
-#define CYDEV_PHUB_CFGMEM4_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM4_CFG0 0x40007620u\r
-#define CYDEV_PHUB_CFGMEM4_CFG1 0x40007624u\r
-#define CYDEV_PHUB_CFGMEM5_BASE 0x40007628u\r
-#define CYDEV_PHUB_CFGMEM5_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM5_CFG0 0x40007628u\r
-#define CYDEV_PHUB_CFGMEM5_CFG1 0x4000762cu\r
-#define CYDEV_PHUB_CFGMEM6_BASE 0x40007630u\r
-#define CYDEV_PHUB_CFGMEM6_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM6_CFG0 0x40007630u\r
-#define CYDEV_PHUB_CFGMEM6_CFG1 0x40007634u\r
-#define CYDEV_PHUB_CFGMEM7_BASE 0x40007638u\r
-#define CYDEV_PHUB_CFGMEM7_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM7_CFG0 0x40007638u\r
-#define CYDEV_PHUB_CFGMEM7_CFG1 0x4000763cu\r
-#define CYDEV_PHUB_CFGMEM8_BASE 0x40007640u\r
-#define CYDEV_PHUB_CFGMEM8_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM8_CFG0 0x40007640u\r
-#define CYDEV_PHUB_CFGMEM8_CFG1 0x40007644u\r
-#define CYDEV_PHUB_CFGMEM9_BASE 0x40007648u\r
-#define CYDEV_PHUB_CFGMEM9_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM9_CFG0 0x40007648u\r
-#define CYDEV_PHUB_CFGMEM9_CFG1 0x4000764cu\r
-#define CYDEV_PHUB_CFGMEM10_BASE 0x40007650u\r
-#define CYDEV_PHUB_CFGMEM10_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM10_CFG0 0x40007650u\r
-#define CYDEV_PHUB_CFGMEM10_CFG1 0x40007654u\r
-#define CYDEV_PHUB_CFGMEM11_BASE 0x40007658u\r
-#define CYDEV_PHUB_CFGMEM11_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM11_CFG0 0x40007658u\r
-#define CYDEV_PHUB_CFGMEM11_CFG1 0x4000765cu\r
-#define CYDEV_PHUB_CFGMEM12_BASE 0x40007660u\r
-#define CYDEV_PHUB_CFGMEM12_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM12_CFG0 0x40007660u\r
-#define CYDEV_PHUB_CFGMEM12_CFG1 0x40007664u\r
-#define CYDEV_PHUB_CFGMEM13_BASE 0x40007668u\r
-#define CYDEV_PHUB_CFGMEM13_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM13_CFG0 0x40007668u\r
-#define CYDEV_PHUB_CFGMEM13_CFG1 0x4000766cu\r
-#define CYDEV_PHUB_CFGMEM14_BASE 0x40007670u\r
-#define CYDEV_PHUB_CFGMEM14_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM14_CFG0 0x40007670u\r
-#define CYDEV_PHUB_CFGMEM14_CFG1 0x40007674u\r
-#define CYDEV_PHUB_CFGMEM15_BASE 0x40007678u\r
-#define CYDEV_PHUB_CFGMEM15_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM15_CFG0 0x40007678u\r
-#define CYDEV_PHUB_CFGMEM15_CFG1 0x4000767cu\r
-#define CYDEV_PHUB_CFGMEM16_BASE 0x40007680u\r
-#define CYDEV_PHUB_CFGMEM16_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM16_CFG0 0x40007680u\r
-#define CYDEV_PHUB_CFGMEM16_CFG1 0x40007684u\r
-#define CYDEV_PHUB_CFGMEM17_BASE 0x40007688u\r
-#define CYDEV_PHUB_CFGMEM17_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM17_CFG0 0x40007688u\r
-#define CYDEV_PHUB_CFGMEM17_CFG1 0x4000768cu\r
-#define CYDEV_PHUB_CFGMEM18_BASE 0x40007690u\r
-#define CYDEV_PHUB_CFGMEM18_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM18_CFG0 0x40007690u\r
-#define CYDEV_PHUB_CFGMEM18_CFG1 0x40007694u\r
-#define CYDEV_PHUB_CFGMEM19_BASE 0x40007698u\r
-#define CYDEV_PHUB_CFGMEM19_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM19_CFG0 0x40007698u\r
-#define CYDEV_PHUB_CFGMEM19_CFG1 0x4000769cu\r
-#define CYDEV_PHUB_CFGMEM20_BASE 0x400076a0u\r
-#define CYDEV_PHUB_CFGMEM20_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM20_CFG0 0x400076a0u\r
-#define CYDEV_PHUB_CFGMEM20_CFG1 0x400076a4u\r
-#define CYDEV_PHUB_CFGMEM21_BASE 0x400076a8u\r
-#define CYDEV_PHUB_CFGMEM21_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM21_CFG0 0x400076a8u\r
-#define CYDEV_PHUB_CFGMEM21_CFG1 0x400076acu\r
-#define CYDEV_PHUB_CFGMEM22_BASE 0x400076b0u\r
-#define CYDEV_PHUB_CFGMEM22_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM22_CFG0 0x400076b0u\r
-#define CYDEV_PHUB_CFGMEM22_CFG1 0x400076b4u\r
-#define CYDEV_PHUB_CFGMEM23_BASE 0x400076b8u\r
-#define CYDEV_PHUB_CFGMEM23_SIZE 0x00000008u\r
-#define CYDEV_PHUB_CFGMEM23_CFG0 0x400076b8u\r
-#define CYDEV_PHUB_CFGMEM23_CFG1 0x400076bcu\r
-#define CYDEV_PHUB_TDMEM0_BASE 0x40007800u\r
-#define CYDEV_PHUB_TDMEM0_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM0_ORIG_TD0 0x40007800u\r
-#define CYDEV_PHUB_TDMEM0_ORIG_TD1 0x40007804u\r
-#define CYDEV_PHUB_TDMEM1_BASE 0x40007808u\r
-#define CYDEV_PHUB_TDMEM1_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM1_ORIG_TD0 0x40007808u\r
-#define CYDEV_PHUB_TDMEM1_ORIG_TD1 0x4000780cu\r
-#define CYDEV_PHUB_TDMEM2_BASE 0x40007810u\r
-#define CYDEV_PHUB_TDMEM2_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM2_ORIG_TD0 0x40007810u\r
-#define CYDEV_PHUB_TDMEM2_ORIG_TD1 0x40007814u\r
-#define CYDEV_PHUB_TDMEM3_BASE 0x40007818u\r
-#define CYDEV_PHUB_TDMEM3_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM3_ORIG_TD0 0x40007818u\r
-#define CYDEV_PHUB_TDMEM3_ORIG_TD1 0x4000781cu\r
-#define CYDEV_PHUB_TDMEM4_BASE 0x40007820u\r
-#define CYDEV_PHUB_TDMEM4_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM4_ORIG_TD0 0x40007820u\r
-#define CYDEV_PHUB_TDMEM4_ORIG_TD1 0x40007824u\r
-#define CYDEV_PHUB_TDMEM5_BASE 0x40007828u\r
-#define CYDEV_PHUB_TDMEM5_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM5_ORIG_TD0 0x40007828u\r
-#define CYDEV_PHUB_TDMEM5_ORIG_TD1 0x4000782cu\r
-#define CYDEV_PHUB_TDMEM6_BASE 0x40007830u\r
-#define CYDEV_PHUB_TDMEM6_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM6_ORIG_TD0 0x40007830u\r
-#define CYDEV_PHUB_TDMEM6_ORIG_TD1 0x40007834u\r
-#define CYDEV_PHUB_TDMEM7_BASE 0x40007838u\r
-#define CYDEV_PHUB_TDMEM7_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM7_ORIG_TD0 0x40007838u\r
-#define CYDEV_PHUB_TDMEM7_ORIG_TD1 0x4000783cu\r
-#define CYDEV_PHUB_TDMEM8_BASE 0x40007840u\r
-#define CYDEV_PHUB_TDMEM8_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM8_ORIG_TD0 0x40007840u\r
-#define CYDEV_PHUB_TDMEM8_ORIG_TD1 0x40007844u\r
-#define CYDEV_PHUB_TDMEM9_BASE 0x40007848u\r
-#define CYDEV_PHUB_TDMEM9_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM9_ORIG_TD0 0x40007848u\r
-#define CYDEV_PHUB_TDMEM9_ORIG_TD1 0x4000784cu\r
-#define CYDEV_PHUB_TDMEM10_BASE 0x40007850u\r
-#define CYDEV_PHUB_TDMEM10_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM10_ORIG_TD0 0x40007850u\r
-#define CYDEV_PHUB_TDMEM10_ORIG_TD1 0x40007854u\r
-#define CYDEV_PHUB_TDMEM11_BASE 0x40007858u\r
-#define CYDEV_PHUB_TDMEM11_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM11_ORIG_TD0 0x40007858u\r
-#define CYDEV_PHUB_TDMEM11_ORIG_TD1 0x4000785cu\r
-#define CYDEV_PHUB_TDMEM12_BASE 0x40007860u\r
-#define CYDEV_PHUB_TDMEM12_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM12_ORIG_TD0 0x40007860u\r
-#define CYDEV_PHUB_TDMEM12_ORIG_TD1 0x40007864u\r
-#define CYDEV_PHUB_TDMEM13_BASE 0x40007868u\r
-#define CYDEV_PHUB_TDMEM13_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM13_ORIG_TD0 0x40007868u\r
-#define CYDEV_PHUB_TDMEM13_ORIG_TD1 0x4000786cu\r
-#define CYDEV_PHUB_TDMEM14_BASE 0x40007870u\r
-#define CYDEV_PHUB_TDMEM14_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM14_ORIG_TD0 0x40007870u\r
-#define CYDEV_PHUB_TDMEM14_ORIG_TD1 0x40007874u\r
-#define CYDEV_PHUB_TDMEM15_BASE 0x40007878u\r
-#define CYDEV_PHUB_TDMEM15_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM15_ORIG_TD0 0x40007878u\r
-#define CYDEV_PHUB_TDMEM15_ORIG_TD1 0x4000787cu\r
-#define CYDEV_PHUB_TDMEM16_BASE 0x40007880u\r
-#define CYDEV_PHUB_TDMEM16_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM16_ORIG_TD0 0x40007880u\r
-#define CYDEV_PHUB_TDMEM16_ORIG_TD1 0x40007884u\r
-#define CYDEV_PHUB_TDMEM17_BASE 0x40007888u\r
-#define CYDEV_PHUB_TDMEM17_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM17_ORIG_TD0 0x40007888u\r
-#define CYDEV_PHUB_TDMEM17_ORIG_TD1 0x4000788cu\r
-#define CYDEV_PHUB_TDMEM18_BASE 0x40007890u\r
-#define CYDEV_PHUB_TDMEM18_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM18_ORIG_TD0 0x40007890u\r
-#define CYDEV_PHUB_TDMEM18_ORIG_TD1 0x40007894u\r
-#define CYDEV_PHUB_TDMEM19_BASE 0x40007898u\r
-#define CYDEV_PHUB_TDMEM19_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM19_ORIG_TD0 0x40007898u\r
-#define CYDEV_PHUB_TDMEM19_ORIG_TD1 0x4000789cu\r
-#define CYDEV_PHUB_TDMEM20_BASE 0x400078a0u\r
-#define CYDEV_PHUB_TDMEM20_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM20_ORIG_TD0 0x400078a0u\r
-#define CYDEV_PHUB_TDMEM20_ORIG_TD1 0x400078a4u\r
-#define CYDEV_PHUB_TDMEM21_BASE 0x400078a8u\r
-#define CYDEV_PHUB_TDMEM21_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM21_ORIG_TD0 0x400078a8u\r
-#define CYDEV_PHUB_TDMEM21_ORIG_TD1 0x400078acu\r
-#define CYDEV_PHUB_TDMEM22_BASE 0x400078b0u\r
-#define CYDEV_PHUB_TDMEM22_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM22_ORIG_TD0 0x400078b0u\r
-#define CYDEV_PHUB_TDMEM22_ORIG_TD1 0x400078b4u\r
-#define CYDEV_PHUB_TDMEM23_BASE 0x400078b8u\r
-#define CYDEV_PHUB_TDMEM23_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM23_ORIG_TD0 0x400078b8u\r
-#define CYDEV_PHUB_TDMEM23_ORIG_TD1 0x400078bcu\r
-#define CYDEV_PHUB_TDMEM24_BASE 0x400078c0u\r
-#define CYDEV_PHUB_TDMEM24_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM24_ORIG_TD0 0x400078c0u\r
-#define CYDEV_PHUB_TDMEM24_ORIG_TD1 0x400078c4u\r
-#define CYDEV_PHUB_TDMEM25_BASE 0x400078c8u\r
-#define CYDEV_PHUB_TDMEM25_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM25_ORIG_TD0 0x400078c8u\r
-#define CYDEV_PHUB_TDMEM25_ORIG_TD1 0x400078ccu\r
-#define CYDEV_PHUB_TDMEM26_BASE 0x400078d0u\r
-#define CYDEV_PHUB_TDMEM26_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM26_ORIG_TD0 0x400078d0u\r
-#define CYDEV_PHUB_TDMEM26_ORIG_TD1 0x400078d4u\r
-#define CYDEV_PHUB_TDMEM27_BASE 0x400078d8u\r
-#define CYDEV_PHUB_TDMEM27_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM27_ORIG_TD0 0x400078d8u\r
-#define CYDEV_PHUB_TDMEM27_ORIG_TD1 0x400078dcu\r
-#define CYDEV_PHUB_TDMEM28_BASE 0x400078e0u\r
-#define CYDEV_PHUB_TDMEM28_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM28_ORIG_TD0 0x400078e0u\r
-#define CYDEV_PHUB_TDMEM28_ORIG_TD1 0x400078e4u\r
-#define CYDEV_PHUB_TDMEM29_BASE 0x400078e8u\r
-#define CYDEV_PHUB_TDMEM29_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM29_ORIG_TD0 0x400078e8u\r
-#define CYDEV_PHUB_TDMEM29_ORIG_TD1 0x400078ecu\r
-#define CYDEV_PHUB_TDMEM30_BASE 0x400078f0u\r
-#define CYDEV_PHUB_TDMEM30_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM30_ORIG_TD0 0x400078f0u\r
-#define CYDEV_PHUB_TDMEM30_ORIG_TD1 0x400078f4u\r
-#define CYDEV_PHUB_TDMEM31_BASE 0x400078f8u\r
-#define CYDEV_PHUB_TDMEM31_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM31_ORIG_TD0 0x400078f8u\r
-#define CYDEV_PHUB_TDMEM31_ORIG_TD1 0x400078fcu\r
-#define CYDEV_PHUB_TDMEM32_BASE 0x40007900u\r
-#define CYDEV_PHUB_TDMEM32_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM32_ORIG_TD0 0x40007900u\r
-#define CYDEV_PHUB_TDMEM32_ORIG_TD1 0x40007904u\r
-#define CYDEV_PHUB_TDMEM33_BASE 0x40007908u\r
-#define CYDEV_PHUB_TDMEM33_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM33_ORIG_TD0 0x40007908u\r
-#define CYDEV_PHUB_TDMEM33_ORIG_TD1 0x4000790cu\r
-#define CYDEV_PHUB_TDMEM34_BASE 0x40007910u\r
-#define CYDEV_PHUB_TDMEM34_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM34_ORIG_TD0 0x40007910u\r
-#define CYDEV_PHUB_TDMEM34_ORIG_TD1 0x40007914u\r
-#define CYDEV_PHUB_TDMEM35_BASE 0x40007918u\r
-#define CYDEV_PHUB_TDMEM35_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM35_ORIG_TD0 0x40007918u\r
-#define CYDEV_PHUB_TDMEM35_ORIG_TD1 0x4000791cu\r
-#define CYDEV_PHUB_TDMEM36_BASE 0x40007920u\r
-#define CYDEV_PHUB_TDMEM36_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM36_ORIG_TD0 0x40007920u\r
-#define CYDEV_PHUB_TDMEM36_ORIG_TD1 0x40007924u\r
-#define CYDEV_PHUB_TDMEM37_BASE 0x40007928u\r
-#define CYDEV_PHUB_TDMEM37_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM37_ORIG_TD0 0x40007928u\r
-#define CYDEV_PHUB_TDMEM37_ORIG_TD1 0x4000792cu\r
-#define CYDEV_PHUB_TDMEM38_BASE 0x40007930u\r
-#define CYDEV_PHUB_TDMEM38_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM38_ORIG_TD0 0x40007930u\r
-#define CYDEV_PHUB_TDMEM38_ORIG_TD1 0x40007934u\r
-#define CYDEV_PHUB_TDMEM39_BASE 0x40007938u\r
-#define CYDEV_PHUB_TDMEM39_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM39_ORIG_TD0 0x40007938u\r
-#define CYDEV_PHUB_TDMEM39_ORIG_TD1 0x4000793cu\r
-#define CYDEV_PHUB_TDMEM40_BASE 0x40007940u\r
-#define CYDEV_PHUB_TDMEM40_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM40_ORIG_TD0 0x40007940u\r
-#define CYDEV_PHUB_TDMEM40_ORIG_TD1 0x40007944u\r
-#define CYDEV_PHUB_TDMEM41_BASE 0x40007948u\r
-#define CYDEV_PHUB_TDMEM41_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM41_ORIG_TD0 0x40007948u\r
-#define CYDEV_PHUB_TDMEM41_ORIG_TD1 0x4000794cu\r
-#define CYDEV_PHUB_TDMEM42_BASE 0x40007950u\r
-#define CYDEV_PHUB_TDMEM42_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM42_ORIG_TD0 0x40007950u\r
-#define CYDEV_PHUB_TDMEM42_ORIG_TD1 0x40007954u\r
-#define CYDEV_PHUB_TDMEM43_BASE 0x40007958u\r
-#define CYDEV_PHUB_TDMEM43_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM43_ORIG_TD0 0x40007958u\r
-#define CYDEV_PHUB_TDMEM43_ORIG_TD1 0x4000795cu\r
-#define CYDEV_PHUB_TDMEM44_BASE 0x40007960u\r
-#define CYDEV_PHUB_TDMEM44_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM44_ORIG_TD0 0x40007960u\r
-#define CYDEV_PHUB_TDMEM44_ORIG_TD1 0x40007964u\r
-#define CYDEV_PHUB_TDMEM45_BASE 0x40007968u\r
-#define CYDEV_PHUB_TDMEM45_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM45_ORIG_TD0 0x40007968u\r
-#define CYDEV_PHUB_TDMEM45_ORIG_TD1 0x4000796cu\r
-#define CYDEV_PHUB_TDMEM46_BASE 0x40007970u\r
-#define CYDEV_PHUB_TDMEM46_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM46_ORIG_TD0 0x40007970u\r
-#define CYDEV_PHUB_TDMEM46_ORIG_TD1 0x40007974u\r
-#define CYDEV_PHUB_TDMEM47_BASE 0x40007978u\r
-#define CYDEV_PHUB_TDMEM47_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM47_ORIG_TD0 0x40007978u\r
-#define CYDEV_PHUB_TDMEM47_ORIG_TD1 0x4000797cu\r
-#define CYDEV_PHUB_TDMEM48_BASE 0x40007980u\r
-#define CYDEV_PHUB_TDMEM48_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM48_ORIG_TD0 0x40007980u\r
-#define CYDEV_PHUB_TDMEM48_ORIG_TD1 0x40007984u\r
-#define CYDEV_PHUB_TDMEM49_BASE 0x40007988u\r
-#define CYDEV_PHUB_TDMEM49_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM49_ORIG_TD0 0x40007988u\r
-#define CYDEV_PHUB_TDMEM49_ORIG_TD1 0x4000798cu\r
-#define CYDEV_PHUB_TDMEM50_BASE 0x40007990u\r
-#define CYDEV_PHUB_TDMEM50_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM50_ORIG_TD0 0x40007990u\r
-#define CYDEV_PHUB_TDMEM50_ORIG_TD1 0x40007994u\r
-#define CYDEV_PHUB_TDMEM51_BASE 0x40007998u\r
-#define CYDEV_PHUB_TDMEM51_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM51_ORIG_TD0 0x40007998u\r
-#define CYDEV_PHUB_TDMEM51_ORIG_TD1 0x4000799cu\r
-#define CYDEV_PHUB_TDMEM52_BASE 0x400079a0u\r
-#define CYDEV_PHUB_TDMEM52_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM52_ORIG_TD0 0x400079a0u\r
-#define CYDEV_PHUB_TDMEM52_ORIG_TD1 0x400079a4u\r
-#define CYDEV_PHUB_TDMEM53_BASE 0x400079a8u\r
-#define CYDEV_PHUB_TDMEM53_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM53_ORIG_TD0 0x400079a8u\r
-#define CYDEV_PHUB_TDMEM53_ORIG_TD1 0x400079acu\r
-#define CYDEV_PHUB_TDMEM54_BASE 0x400079b0u\r
-#define CYDEV_PHUB_TDMEM54_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM54_ORIG_TD0 0x400079b0u\r
-#define CYDEV_PHUB_TDMEM54_ORIG_TD1 0x400079b4u\r
-#define CYDEV_PHUB_TDMEM55_BASE 0x400079b8u\r
-#define CYDEV_PHUB_TDMEM55_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM55_ORIG_TD0 0x400079b8u\r
-#define CYDEV_PHUB_TDMEM55_ORIG_TD1 0x400079bcu\r
-#define CYDEV_PHUB_TDMEM56_BASE 0x400079c0u\r
-#define CYDEV_PHUB_TDMEM56_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM56_ORIG_TD0 0x400079c0u\r
-#define CYDEV_PHUB_TDMEM56_ORIG_TD1 0x400079c4u\r
-#define CYDEV_PHUB_TDMEM57_BASE 0x400079c8u\r
-#define CYDEV_PHUB_TDMEM57_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM57_ORIG_TD0 0x400079c8u\r
-#define CYDEV_PHUB_TDMEM57_ORIG_TD1 0x400079ccu\r
-#define CYDEV_PHUB_TDMEM58_BASE 0x400079d0u\r
-#define CYDEV_PHUB_TDMEM58_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM58_ORIG_TD0 0x400079d0u\r
-#define CYDEV_PHUB_TDMEM58_ORIG_TD1 0x400079d4u\r
-#define CYDEV_PHUB_TDMEM59_BASE 0x400079d8u\r
-#define CYDEV_PHUB_TDMEM59_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM59_ORIG_TD0 0x400079d8u\r
-#define CYDEV_PHUB_TDMEM59_ORIG_TD1 0x400079dcu\r
-#define CYDEV_PHUB_TDMEM60_BASE 0x400079e0u\r
-#define CYDEV_PHUB_TDMEM60_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM60_ORIG_TD0 0x400079e0u\r
-#define CYDEV_PHUB_TDMEM60_ORIG_TD1 0x400079e4u\r
-#define CYDEV_PHUB_TDMEM61_BASE 0x400079e8u\r
-#define CYDEV_PHUB_TDMEM61_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM61_ORIG_TD0 0x400079e8u\r
-#define CYDEV_PHUB_TDMEM61_ORIG_TD1 0x400079ecu\r
-#define CYDEV_PHUB_TDMEM62_BASE 0x400079f0u\r
-#define CYDEV_PHUB_TDMEM62_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM62_ORIG_TD0 0x400079f0u\r
-#define CYDEV_PHUB_TDMEM62_ORIG_TD1 0x400079f4u\r
-#define CYDEV_PHUB_TDMEM63_BASE 0x400079f8u\r
-#define CYDEV_PHUB_TDMEM63_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM63_ORIG_TD0 0x400079f8u\r
-#define CYDEV_PHUB_TDMEM63_ORIG_TD1 0x400079fcu\r
-#define CYDEV_PHUB_TDMEM64_BASE 0x40007a00u\r
-#define CYDEV_PHUB_TDMEM64_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM64_ORIG_TD0 0x40007a00u\r
-#define CYDEV_PHUB_TDMEM64_ORIG_TD1 0x40007a04u\r
-#define CYDEV_PHUB_TDMEM65_BASE 0x40007a08u\r
-#define CYDEV_PHUB_TDMEM65_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM65_ORIG_TD0 0x40007a08u\r
-#define CYDEV_PHUB_TDMEM65_ORIG_TD1 0x40007a0cu\r
-#define CYDEV_PHUB_TDMEM66_BASE 0x40007a10u\r
-#define CYDEV_PHUB_TDMEM66_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM66_ORIG_TD0 0x40007a10u\r
-#define CYDEV_PHUB_TDMEM66_ORIG_TD1 0x40007a14u\r
-#define CYDEV_PHUB_TDMEM67_BASE 0x40007a18u\r
-#define CYDEV_PHUB_TDMEM67_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM67_ORIG_TD0 0x40007a18u\r
-#define CYDEV_PHUB_TDMEM67_ORIG_TD1 0x40007a1cu\r
-#define CYDEV_PHUB_TDMEM68_BASE 0x40007a20u\r
-#define CYDEV_PHUB_TDMEM68_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM68_ORIG_TD0 0x40007a20u\r
-#define CYDEV_PHUB_TDMEM68_ORIG_TD1 0x40007a24u\r
-#define CYDEV_PHUB_TDMEM69_BASE 0x40007a28u\r
-#define CYDEV_PHUB_TDMEM69_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM69_ORIG_TD0 0x40007a28u\r
-#define CYDEV_PHUB_TDMEM69_ORIG_TD1 0x40007a2cu\r
-#define CYDEV_PHUB_TDMEM70_BASE 0x40007a30u\r
-#define CYDEV_PHUB_TDMEM70_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM70_ORIG_TD0 0x40007a30u\r
-#define CYDEV_PHUB_TDMEM70_ORIG_TD1 0x40007a34u\r
-#define CYDEV_PHUB_TDMEM71_BASE 0x40007a38u\r
-#define CYDEV_PHUB_TDMEM71_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM71_ORIG_TD0 0x40007a38u\r
-#define CYDEV_PHUB_TDMEM71_ORIG_TD1 0x40007a3cu\r
-#define CYDEV_PHUB_TDMEM72_BASE 0x40007a40u\r
-#define CYDEV_PHUB_TDMEM72_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM72_ORIG_TD0 0x40007a40u\r
-#define CYDEV_PHUB_TDMEM72_ORIG_TD1 0x40007a44u\r
-#define CYDEV_PHUB_TDMEM73_BASE 0x40007a48u\r
-#define CYDEV_PHUB_TDMEM73_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM73_ORIG_TD0 0x40007a48u\r
-#define CYDEV_PHUB_TDMEM73_ORIG_TD1 0x40007a4cu\r
-#define CYDEV_PHUB_TDMEM74_BASE 0x40007a50u\r
-#define CYDEV_PHUB_TDMEM74_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM74_ORIG_TD0 0x40007a50u\r
-#define CYDEV_PHUB_TDMEM74_ORIG_TD1 0x40007a54u\r
-#define CYDEV_PHUB_TDMEM75_BASE 0x40007a58u\r
-#define CYDEV_PHUB_TDMEM75_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM75_ORIG_TD0 0x40007a58u\r
-#define CYDEV_PHUB_TDMEM75_ORIG_TD1 0x40007a5cu\r
-#define CYDEV_PHUB_TDMEM76_BASE 0x40007a60u\r
-#define CYDEV_PHUB_TDMEM76_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM76_ORIG_TD0 0x40007a60u\r
-#define CYDEV_PHUB_TDMEM76_ORIG_TD1 0x40007a64u\r
-#define CYDEV_PHUB_TDMEM77_BASE 0x40007a68u\r
-#define CYDEV_PHUB_TDMEM77_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM77_ORIG_TD0 0x40007a68u\r
-#define CYDEV_PHUB_TDMEM77_ORIG_TD1 0x40007a6cu\r
-#define CYDEV_PHUB_TDMEM78_BASE 0x40007a70u\r
-#define CYDEV_PHUB_TDMEM78_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM78_ORIG_TD0 0x40007a70u\r
-#define CYDEV_PHUB_TDMEM78_ORIG_TD1 0x40007a74u\r
-#define CYDEV_PHUB_TDMEM79_BASE 0x40007a78u\r
-#define CYDEV_PHUB_TDMEM79_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM79_ORIG_TD0 0x40007a78u\r
-#define CYDEV_PHUB_TDMEM79_ORIG_TD1 0x40007a7cu\r
-#define CYDEV_PHUB_TDMEM80_BASE 0x40007a80u\r
-#define CYDEV_PHUB_TDMEM80_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM80_ORIG_TD0 0x40007a80u\r
-#define CYDEV_PHUB_TDMEM80_ORIG_TD1 0x40007a84u\r
-#define CYDEV_PHUB_TDMEM81_BASE 0x40007a88u\r
-#define CYDEV_PHUB_TDMEM81_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM81_ORIG_TD0 0x40007a88u\r
-#define CYDEV_PHUB_TDMEM81_ORIG_TD1 0x40007a8cu\r
-#define CYDEV_PHUB_TDMEM82_BASE 0x40007a90u\r
-#define CYDEV_PHUB_TDMEM82_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM82_ORIG_TD0 0x40007a90u\r
-#define CYDEV_PHUB_TDMEM82_ORIG_TD1 0x40007a94u\r
-#define CYDEV_PHUB_TDMEM83_BASE 0x40007a98u\r
-#define CYDEV_PHUB_TDMEM83_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM83_ORIG_TD0 0x40007a98u\r
-#define CYDEV_PHUB_TDMEM83_ORIG_TD1 0x40007a9cu\r
-#define CYDEV_PHUB_TDMEM84_BASE 0x40007aa0u\r
-#define CYDEV_PHUB_TDMEM84_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM84_ORIG_TD0 0x40007aa0u\r
-#define CYDEV_PHUB_TDMEM84_ORIG_TD1 0x40007aa4u\r
-#define CYDEV_PHUB_TDMEM85_BASE 0x40007aa8u\r
-#define CYDEV_PHUB_TDMEM85_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM85_ORIG_TD0 0x40007aa8u\r
-#define CYDEV_PHUB_TDMEM85_ORIG_TD1 0x40007aacu\r
-#define CYDEV_PHUB_TDMEM86_BASE 0x40007ab0u\r
-#define CYDEV_PHUB_TDMEM86_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM86_ORIG_TD0 0x40007ab0u\r
-#define CYDEV_PHUB_TDMEM86_ORIG_TD1 0x40007ab4u\r
-#define CYDEV_PHUB_TDMEM87_BASE 0x40007ab8u\r
-#define CYDEV_PHUB_TDMEM87_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM87_ORIG_TD0 0x40007ab8u\r
-#define CYDEV_PHUB_TDMEM87_ORIG_TD1 0x40007abcu\r
-#define CYDEV_PHUB_TDMEM88_BASE 0x40007ac0u\r
-#define CYDEV_PHUB_TDMEM88_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM88_ORIG_TD0 0x40007ac0u\r
-#define CYDEV_PHUB_TDMEM88_ORIG_TD1 0x40007ac4u\r
-#define CYDEV_PHUB_TDMEM89_BASE 0x40007ac8u\r
-#define CYDEV_PHUB_TDMEM89_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM89_ORIG_TD0 0x40007ac8u\r
-#define CYDEV_PHUB_TDMEM89_ORIG_TD1 0x40007accu\r
-#define CYDEV_PHUB_TDMEM90_BASE 0x40007ad0u\r
-#define CYDEV_PHUB_TDMEM90_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM90_ORIG_TD0 0x40007ad0u\r
-#define CYDEV_PHUB_TDMEM90_ORIG_TD1 0x40007ad4u\r
-#define CYDEV_PHUB_TDMEM91_BASE 0x40007ad8u\r
-#define CYDEV_PHUB_TDMEM91_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM91_ORIG_TD0 0x40007ad8u\r
-#define CYDEV_PHUB_TDMEM91_ORIG_TD1 0x40007adcu\r
-#define CYDEV_PHUB_TDMEM92_BASE 0x40007ae0u\r
-#define CYDEV_PHUB_TDMEM92_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM92_ORIG_TD0 0x40007ae0u\r
-#define CYDEV_PHUB_TDMEM92_ORIG_TD1 0x40007ae4u\r
-#define CYDEV_PHUB_TDMEM93_BASE 0x40007ae8u\r
-#define CYDEV_PHUB_TDMEM93_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM93_ORIG_TD0 0x40007ae8u\r
-#define CYDEV_PHUB_TDMEM93_ORIG_TD1 0x40007aecu\r
-#define CYDEV_PHUB_TDMEM94_BASE 0x40007af0u\r
-#define CYDEV_PHUB_TDMEM94_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM94_ORIG_TD0 0x40007af0u\r
-#define CYDEV_PHUB_TDMEM94_ORIG_TD1 0x40007af4u\r
-#define CYDEV_PHUB_TDMEM95_BASE 0x40007af8u\r
-#define CYDEV_PHUB_TDMEM95_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM95_ORIG_TD0 0x40007af8u\r
-#define CYDEV_PHUB_TDMEM95_ORIG_TD1 0x40007afcu\r
-#define CYDEV_PHUB_TDMEM96_BASE 0x40007b00u\r
-#define CYDEV_PHUB_TDMEM96_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM96_ORIG_TD0 0x40007b00u\r
-#define CYDEV_PHUB_TDMEM96_ORIG_TD1 0x40007b04u\r
-#define CYDEV_PHUB_TDMEM97_BASE 0x40007b08u\r
-#define CYDEV_PHUB_TDMEM97_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM97_ORIG_TD0 0x40007b08u\r
-#define CYDEV_PHUB_TDMEM97_ORIG_TD1 0x40007b0cu\r
-#define CYDEV_PHUB_TDMEM98_BASE 0x40007b10u\r
-#define CYDEV_PHUB_TDMEM98_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM98_ORIG_TD0 0x40007b10u\r
-#define CYDEV_PHUB_TDMEM98_ORIG_TD1 0x40007b14u\r
-#define CYDEV_PHUB_TDMEM99_BASE 0x40007b18u\r
-#define CYDEV_PHUB_TDMEM99_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM99_ORIG_TD0 0x40007b18u\r
-#define CYDEV_PHUB_TDMEM99_ORIG_TD1 0x40007b1cu\r
-#define CYDEV_PHUB_TDMEM100_BASE 0x40007b20u\r
-#define CYDEV_PHUB_TDMEM100_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM100_ORIG_TD0 0x40007b20u\r
-#define CYDEV_PHUB_TDMEM100_ORIG_TD1 0x40007b24u\r
-#define CYDEV_PHUB_TDMEM101_BASE 0x40007b28u\r
-#define CYDEV_PHUB_TDMEM101_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM101_ORIG_TD0 0x40007b28u\r
-#define CYDEV_PHUB_TDMEM101_ORIG_TD1 0x40007b2cu\r
-#define CYDEV_PHUB_TDMEM102_BASE 0x40007b30u\r
-#define CYDEV_PHUB_TDMEM102_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM102_ORIG_TD0 0x40007b30u\r
-#define CYDEV_PHUB_TDMEM102_ORIG_TD1 0x40007b34u\r
-#define CYDEV_PHUB_TDMEM103_BASE 0x40007b38u\r
-#define CYDEV_PHUB_TDMEM103_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM103_ORIG_TD0 0x40007b38u\r
-#define CYDEV_PHUB_TDMEM103_ORIG_TD1 0x40007b3cu\r
-#define CYDEV_PHUB_TDMEM104_BASE 0x40007b40u\r
-#define CYDEV_PHUB_TDMEM104_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM104_ORIG_TD0 0x40007b40u\r
-#define CYDEV_PHUB_TDMEM104_ORIG_TD1 0x40007b44u\r
-#define CYDEV_PHUB_TDMEM105_BASE 0x40007b48u\r
-#define CYDEV_PHUB_TDMEM105_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM105_ORIG_TD0 0x40007b48u\r
-#define CYDEV_PHUB_TDMEM105_ORIG_TD1 0x40007b4cu\r
-#define CYDEV_PHUB_TDMEM106_BASE 0x40007b50u\r
-#define CYDEV_PHUB_TDMEM106_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM106_ORIG_TD0 0x40007b50u\r
-#define CYDEV_PHUB_TDMEM106_ORIG_TD1 0x40007b54u\r
-#define CYDEV_PHUB_TDMEM107_BASE 0x40007b58u\r
-#define CYDEV_PHUB_TDMEM107_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM107_ORIG_TD0 0x40007b58u\r
-#define CYDEV_PHUB_TDMEM107_ORIG_TD1 0x40007b5cu\r
-#define CYDEV_PHUB_TDMEM108_BASE 0x40007b60u\r
-#define CYDEV_PHUB_TDMEM108_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM108_ORIG_TD0 0x40007b60u\r
-#define CYDEV_PHUB_TDMEM108_ORIG_TD1 0x40007b64u\r
-#define CYDEV_PHUB_TDMEM109_BASE 0x40007b68u\r
-#define CYDEV_PHUB_TDMEM109_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM109_ORIG_TD0 0x40007b68u\r
-#define CYDEV_PHUB_TDMEM109_ORIG_TD1 0x40007b6cu\r
-#define CYDEV_PHUB_TDMEM110_BASE 0x40007b70u\r
-#define CYDEV_PHUB_TDMEM110_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM110_ORIG_TD0 0x40007b70u\r
-#define CYDEV_PHUB_TDMEM110_ORIG_TD1 0x40007b74u\r
-#define CYDEV_PHUB_TDMEM111_BASE 0x40007b78u\r
-#define CYDEV_PHUB_TDMEM111_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM111_ORIG_TD0 0x40007b78u\r
-#define CYDEV_PHUB_TDMEM111_ORIG_TD1 0x40007b7cu\r
-#define CYDEV_PHUB_TDMEM112_BASE 0x40007b80u\r
-#define CYDEV_PHUB_TDMEM112_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM112_ORIG_TD0 0x40007b80u\r
-#define CYDEV_PHUB_TDMEM112_ORIG_TD1 0x40007b84u\r
-#define CYDEV_PHUB_TDMEM113_BASE 0x40007b88u\r
-#define CYDEV_PHUB_TDMEM113_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM113_ORIG_TD0 0x40007b88u\r
-#define CYDEV_PHUB_TDMEM113_ORIG_TD1 0x40007b8cu\r
-#define CYDEV_PHUB_TDMEM114_BASE 0x40007b90u\r
-#define CYDEV_PHUB_TDMEM114_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM114_ORIG_TD0 0x40007b90u\r
-#define CYDEV_PHUB_TDMEM114_ORIG_TD1 0x40007b94u\r
-#define CYDEV_PHUB_TDMEM115_BASE 0x40007b98u\r
-#define CYDEV_PHUB_TDMEM115_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM115_ORIG_TD0 0x40007b98u\r
-#define CYDEV_PHUB_TDMEM115_ORIG_TD1 0x40007b9cu\r
-#define CYDEV_PHUB_TDMEM116_BASE 0x40007ba0u\r
-#define CYDEV_PHUB_TDMEM116_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM116_ORIG_TD0 0x40007ba0u\r
-#define CYDEV_PHUB_TDMEM116_ORIG_TD1 0x40007ba4u\r
-#define CYDEV_PHUB_TDMEM117_BASE 0x40007ba8u\r
-#define CYDEV_PHUB_TDMEM117_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM117_ORIG_TD0 0x40007ba8u\r
-#define CYDEV_PHUB_TDMEM117_ORIG_TD1 0x40007bacu\r
-#define CYDEV_PHUB_TDMEM118_BASE 0x40007bb0u\r
-#define CYDEV_PHUB_TDMEM118_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM118_ORIG_TD0 0x40007bb0u\r
-#define CYDEV_PHUB_TDMEM118_ORIG_TD1 0x40007bb4u\r
-#define CYDEV_PHUB_TDMEM119_BASE 0x40007bb8u\r
-#define CYDEV_PHUB_TDMEM119_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM119_ORIG_TD0 0x40007bb8u\r
-#define CYDEV_PHUB_TDMEM119_ORIG_TD1 0x40007bbcu\r
-#define CYDEV_PHUB_TDMEM120_BASE 0x40007bc0u\r
-#define CYDEV_PHUB_TDMEM120_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM120_ORIG_TD0 0x40007bc0u\r
-#define CYDEV_PHUB_TDMEM120_ORIG_TD1 0x40007bc4u\r
-#define CYDEV_PHUB_TDMEM121_BASE 0x40007bc8u\r
-#define CYDEV_PHUB_TDMEM121_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM121_ORIG_TD0 0x40007bc8u\r
-#define CYDEV_PHUB_TDMEM121_ORIG_TD1 0x40007bccu\r
-#define CYDEV_PHUB_TDMEM122_BASE 0x40007bd0u\r
-#define CYDEV_PHUB_TDMEM122_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM122_ORIG_TD0 0x40007bd0u\r
-#define CYDEV_PHUB_TDMEM122_ORIG_TD1 0x40007bd4u\r
-#define CYDEV_PHUB_TDMEM123_BASE 0x40007bd8u\r
-#define CYDEV_PHUB_TDMEM123_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM123_ORIG_TD0 0x40007bd8u\r
-#define CYDEV_PHUB_TDMEM123_ORIG_TD1 0x40007bdcu\r
-#define CYDEV_PHUB_TDMEM124_BASE 0x40007be0u\r
-#define CYDEV_PHUB_TDMEM124_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM124_ORIG_TD0 0x40007be0u\r
-#define CYDEV_PHUB_TDMEM124_ORIG_TD1 0x40007be4u\r
-#define CYDEV_PHUB_TDMEM125_BASE 0x40007be8u\r
-#define CYDEV_PHUB_TDMEM125_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM125_ORIG_TD0 0x40007be8u\r
-#define CYDEV_PHUB_TDMEM125_ORIG_TD1 0x40007becu\r
-#define CYDEV_PHUB_TDMEM126_BASE 0x40007bf0u\r
-#define CYDEV_PHUB_TDMEM126_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM126_ORIG_TD0 0x40007bf0u\r
-#define CYDEV_PHUB_TDMEM126_ORIG_TD1 0x40007bf4u\r
-#define CYDEV_PHUB_TDMEM127_BASE 0x40007bf8u\r
-#define CYDEV_PHUB_TDMEM127_SIZE 0x00000008u\r
-#define CYDEV_PHUB_TDMEM127_ORIG_TD0 0x40007bf8u\r
-#define CYDEV_PHUB_TDMEM127_ORIG_TD1 0x40007bfcu\r
-#define CYDEV_EE_BASE 0x40008000u\r
-#define CYDEV_EE_SIZE 0x00000800u\r
-#define CYDEV_EE_DATA_MBASE 0x40008000u\r
-#define CYDEV_EE_DATA_MSIZE 0x00000800u\r
-#define CYDEV_CAN0_BASE 0x4000a000u\r
-#define CYDEV_CAN0_SIZE 0x000002a0u\r
-#define CYDEV_CAN0_CSR_BASE 0x4000a000u\r
-#define CYDEV_CAN0_CSR_SIZE 0x00000018u\r
-#define CYDEV_CAN0_CSR_INT_SR 0x4000a000u\r
-#define CYDEV_CAN0_CSR_INT_EN 0x4000a004u\r
-#define CYDEV_CAN0_CSR_BUF_SR 0x4000a008u\r
-#define CYDEV_CAN0_CSR_ERR_SR 0x4000a00cu\r
-#define CYDEV_CAN0_CSR_CMD 0x4000a010u\r
-#define CYDEV_CAN0_CSR_CFG 0x4000a014u\r
-#define CYDEV_CAN0_TX0_BASE 0x4000a020u\r
-#define CYDEV_CAN0_TX0_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX0_CMD 0x4000a020u\r
-#define CYDEV_CAN0_TX0_ID 0x4000a024u\r
-#define CYDEV_CAN0_TX0_DH 0x4000a028u\r
-#define CYDEV_CAN0_TX0_DL 0x4000a02cu\r
-#define CYDEV_CAN0_TX1_BASE 0x4000a030u\r
-#define CYDEV_CAN0_TX1_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX1_CMD 0x4000a030u\r
-#define CYDEV_CAN0_TX1_ID 0x4000a034u\r
-#define CYDEV_CAN0_TX1_DH 0x4000a038u\r
-#define CYDEV_CAN0_TX1_DL 0x4000a03cu\r
-#define CYDEV_CAN0_TX2_BASE 0x4000a040u\r
-#define CYDEV_CAN0_TX2_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX2_CMD 0x4000a040u\r
-#define CYDEV_CAN0_TX2_ID 0x4000a044u\r
-#define CYDEV_CAN0_TX2_DH 0x4000a048u\r
-#define CYDEV_CAN0_TX2_DL 0x4000a04cu\r
-#define CYDEV_CAN0_TX3_BASE 0x4000a050u\r
-#define CYDEV_CAN0_TX3_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX3_CMD 0x4000a050u\r
-#define CYDEV_CAN0_TX3_ID 0x4000a054u\r
-#define CYDEV_CAN0_TX3_DH 0x4000a058u\r
-#define CYDEV_CAN0_TX3_DL 0x4000a05cu\r
-#define CYDEV_CAN0_TX4_BASE 0x4000a060u\r
-#define CYDEV_CAN0_TX4_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX4_CMD 0x4000a060u\r
-#define CYDEV_CAN0_TX4_ID 0x4000a064u\r
-#define CYDEV_CAN0_TX4_DH 0x4000a068u\r
-#define CYDEV_CAN0_TX4_DL 0x4000a06cu\r
-#define CYDEV_CAN0_TX5_BASE 0x4000a070u\r
-#define CYDEV_CAN0_TX5_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX5_CMD 0x4000a070u\r
-#define CYDEV_CAN0_TX5_ID 0x4000a074u\r
-#define CYDEV_CAN0_TX5_DH 0x4000a078u\r
-#define CYDEV_CAN0_TX5_DL 0x4000a07cu\r
-#define CYDEV_CAN0_TX6_BASE 0x4000a080u\r
-#define CYDEV_CAN0_TX6_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX6_CMD 0x4000a080u\r
-#define CYDEV_CAN0_TX6_ID 0x4000a084u\r
-#define CYDEV_CAN0_TX6_DH 0x4000a088u\r
-#define CYDEV_CAN0_TX6_DL 0x4000a08cu\r
-#define CYDEV_CAN0_TX7_BASE 0x4000a090u\r
-#define CYDEV_CAN0_TX7_SIZE 0x00000010u\r
-#define CYDEV_CAN0_TX7_CMD 0x4000a090u\r
-#define CYDEV_CAN0_TX7_ID 0x4000a094u\r
-#define CYDEV_CAN0_TX7_DH 0x4000a098u\r
-#define CYDEV_CAN0_TX7_DL 0x4000a09cu\r
-#define CYDEV_CAN0_RX0_BASE 0x4000a0a0u\r
-#define CYDEV_CAN0_RX0_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX0_CMD 0x4000a0a0u\r
-#define CYDEV_CAN0_RX0_ID 0x4000a0a4u\r
-#define CYDEV_CAN0_RX0_DH 0x4000a0a8u\r
-#define CYDEV_CAN0_RX0_DL 0x4000a0acu\r
-#define CYDEV_CAN0_RX0_AMR 0x4000a0b0u\r
-#define CYDEV_CAN0_RX0_ACR 0x4000a0b4u\r
-#define CYDEV_CAN0_RX0_AMRD 0x4000a0b8u\r
-#define CYDEV_CAN0_RX0_ACRD 0x4000a0bcu\r
-#define CYDEV_CAN0_RX1_BASE 0x4000a0c0u\r
-#define CYDEV_CAN0_RX1_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX1_CMD 0x4000a0c0u\r
-#define CYDEV_CAN0_RX1_ID 0x4000a0c4u\r
-#define CYDEV_CAN0_RX1_DH 0x4000a0c8u\r
-#define CYDEV_CAN0_RX1_DL 0x4000a0ccu\r
-#define CYDEV_CAN0_RX1_AMR 0x4000a0d0u\r
-#define CYDEV_CAN0_RX1_ACR 0x4000a0d4u\r
-#define CYDEV_CAN0_RX1_AMRD 0x4000a0d8u\r
-#define CYDEV_CAN0_RX1_ACRD 0x4000a0dcu\r
-#define CYDEV_CAN0_RX2_BASE 0x4000a0e0u\r
-#define CYDEV_CAN0_RX2_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX2_CMD 0x4000a0e0u\r
-#define CYDEV_CAN0_RX2_ID 0x4000a0e4u\r
-#define CYDEV_CAN0_RX2_DH 0x4000a0e8u\r
-#define CYDEV_CAN0_RX2_DL 0x4000a0ecu\r
-#define CYDEV_CAN0_RX2_AMR 0x4000a0f0u\r
-#define CYDEV_CAN0_RX2_ACR 0x4000a0f4u\r
-#define CYDEV_CAN0_RX2_AMRD 0x4000a0f8u\r
-#define CYDEV_CAN0_RX2_ACRD 0x4000a0fcu\r
-#define CYDEV_CAN0_RX3_BASE 0x4000a100u\r
-#define CYDEV_CAN0_RX3_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX3_CMD 0x4000a100u\r
-#define CYDEV_CAN0_RX3_ID 0x4000a104u\r
-#define CYDEV_CAN0_RX3_DH 0x4000a108u\r
-#define CYDEV_CAN0_RX3_DL 0x4000a10cu\r
-#define CYDEV_CAN0_RX3_AMR 0x4000a110u\r
-#define CYDEV_CAN0_RX3_ACR 0x4000a114u\r
-#define CYDEV_CAN0_RX3_AMRD 0x4000a118u\r
-#define CYDEV_CAN0_RX3_ACRD 0x4000a11cu\r
-#define CYDEV_CAN0_RX4_BASE 0x4000a120u\r
-#define CYDEV_CAN0_RX4_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX4_CMD 0x4000a120u\r
-#define CYDEV_CAN0_RX4_ID 0x4000a124u\r
-#define CYDEV_CAN0_RX4_DH 0x4000a128u\r
-#define CYDEV_CAN0_RX4_DL 0x4000a12cu\r
-#define CYDEV_CAN0_RX4_AMR 0x4000a130u\r
-#define CYDEV_CAN0_RX4_ACR 0x4000a134u\r
-#define CYDEV_CAN0_RX4_AMRD 0x4000a138u\r
-#define CYDEV_CAN0_RX4_ACRD 0x4000a13cu\r
-#define CYDEV_CAN0_RX5_BASE 0x4000a140u\r
-#define CYDEV_CAN0_RX5_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX5_CMD 0x4000a140u\r
-#define CYDEV_CAN0_RX5_ID 0x4000a144u\r
-#define CYDEV_CAN0_RX5_DH 0x4000a148u\r
-#define CYDEV_CAN0_RX5_DL 0x4000a14cu\r
-#define CYDEV_CAN0_RX5_AMR 0x4000a150u\r
-#define CYDEV_CAN0_RX5_ACR 0x4000a154u\r
-#define CYDEV_CAN0_RX5_AMRD 0x4000a158u\r
-#define CYDEV_CAN0_RX5_ACRD 0x4000a15cu\r
-#define CYDEV_CAN0_RX6_BASE 0x4000a160u\r
-#define CYDEV_CAN0_RX6_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX6_CMD 0x4000a160u\r
-#define CYDEV_CAN0_RX6_ID 0x4000a164u\r
-#define CYDEV_CAN0_RX6_DH 0x4000a168u\r
-#define CYDEV_CAN0_RX6_DL 0x4000a16cu\r
-#define CYDEV_CAN0_RX6_AMR 0x4000a170u\r
-#define CYDEV_CAN0_RX6_ACR 0x4000a174u\r
-#define CYDEV_CAN0_RX6_AMRD 0x4000a178u\r
-#define CYDEV_CAN0_RX6_ACRD 0x4000a17cu\r
-#define CYDEV_CAN0_RX7_BASE 0x4000a180u\r
-#define CYDEV_CAN0_RX7_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX7_CMD 0x4000a180u\r
-#define CYDEV_CAN0_RX7_ID 0x4000a184u\r
-#define CYDEV_CAN0_RX7_DH 0x4000a188u\r
-#define CYDEV_CAN0_RX7_DL 0x4000a18cu\r
-#define CYDEV_CAN0_RX7_AMR 0x4000a190u\r
-#define CYDEV_CAN0_RX7_ACR 0x4000a194u\r
-#define CYDEV_CAN0_RX7_AMRD 0x4000a198u\r
-#define CYDEV_CAN0_RX7_ACRD 0x4000a19cu\r
-#define CYDEV_CAN0_RX8_BASE 0x4000a1a0u\r
-#define CYDEV_CAN0_RX8_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX8_CMD 0x4000a1a0u\r
-#define CYDEV_CAN0_RX8_ID 0x4000a1a4u\r
-#define CYDEV_CAN0_RX8_DH 0x4000a1a8u\r
-#define CYDEV_CAN0_RX8_DL 0x4000a1acu\r
-#define CYDEV_CAN0_RX8_AMR 0x4000a1b0u\r
-#define CYDEV_CAN0_RX8_ACR 0x4000a1b4u\r
-#define CYDEV_CAN0_RX8_AMRD 0x4000a1b8u\r
-#define CYDEV_CAN0_RX8_ACRD 0x4000a1bcu\r
-#define CYDEV_CAN0_RX9_BASE 0x4000a1c0u\r
-#define CYDEV_CAN0_RX9_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX9_CMD 0x4000a1c0u\r
-#define CYDEV_CAN0_RX9_ID 0x4000a1c4u\r
-#define CYDEV_CAN0_RX9_DH 0x4000a1c8u\r
-#define CYDEV_CAN0_RX9_DL 0x4000a1ccu\r
-#define CYDEV_CAN0_RX9_AMR 0x4000a1d0u\r
-#define CYDEV_CAN0_RX9_ACR 0x4000a1d4u\r
-#define CYDEV_CAN0_RX9_AMRD 0x4000a1d8u\r
-#define CYDEV_CAN0_RX9_ACRD 0x4000a1dcu\r
-#define CYDEV_CAN0_RX10_BASE 0x4000a1e0u\r
-#define CYDEV_CAN0_RX10_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX10_CMD 0x4000a1e0u\r
-#define CYDEV_CAN0_RX10_ID 0x4000a1e4u\r
-#define CYDEV_CAN0_RX10_DH 0x4000a1e8u\r
-#define CYDEV_CAN0_RX10_DL 0x4000a1ecu\r
-#define CYDEV_CAN0_RX10_AMR 0x4000a1f0u\r
-#define CYDEV_CAN0_RX10_ACR 0x4000a1f4u\r
-#define CYDEV_CAN0_RX10_AMRD 0x4000a1f8u\r
-#define CYDEV_CAN0_RX10_ACRD 0x4000a1fcu\r
-#define CYDEV_CAN0_RX11_BASE 0x4000a200u\r
-#define CYDEV_CAN0_RX11_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX11_CMD 0x4000a200u\r
-#define CYDEV_CAN0_RX11_ID 0x4000a204u\r
-#define CYDEV_CAN0_RX11_DH 0x4000a208u\r
-#define CYDEV_CAN0_RX11_DL 0x4000a20cu\r
-#define CYDEV_CAN0_RX11_AMR 0x4000a210u\r
-#define CYDEV_CAN0_RX11_ACR 0x4000a214u\r
-#define CYDEV_CAN0_RX11_AMRD 0x4000a218u\r
-#define CYDEV_CAN0_RX11_ACRD 0x4000a21cu\r
-#define CYDEV_CAN0_RX12_BASE 0x4000a220u\r
-#define CYDEV_CAN0_RX12_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX12_CMD 0x4000a220u\r
-#define CYDEV_CAN0_RX12_ID 0x4000a224u\r
-#define CYDEV_CAN0_RX12_DH 0x4000a228u\r
-#define CYDEV_CAN0_RX12_DL 0x4000a22cu\r
-#define CYDEV_CAN0_RX12_AMR 0x4000a230u\r
-#define CYDEV_CAN0_RX12_ACR 0x4000a234u\r
-#define CYDEV_CAN0_RX12_AMRD 0x4000a238u\r
-#define CYDEV_CAN0_RX12_ACRD 0x4000a23cu\r
-#define CYDEV_CAN0_RX13_BASE 0x4000a240u\r
-#define CYDEV_CAN0_RX13_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX13_CMD 0x4000a240u\r
-#define CYDEV_CAN0_RX13_ID 0x4000a244u\r
-#define CYDEV_CAN0_RX13_DH 0x4000a248u\r
-#define CYDEV_CAN0_RX13_DL 0x4000a24cu\r
-#define CYDEV_CAN0_RX13_AMR 0x4000a250u\r
-#define CYDEV_CAN0_RX13_ACR 0x4000a254u\r
-#define CYDEV_CAN0_RX13_AMRD 0x4000a258u\r
-#define CYDEV_CAN0_RX13_ACRD 0x4000a25cu\r
-#define CYDEV_CAN0_RX14_BASE 0x4000a260u\r
-#define CYDEV_CAN0_RX14_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX14_CMD 0x4000a260u\r
-#define CYDEV_CAN0_RX14_ID 0x4000a264u\r
-#define CYDEV_CAN0_RX14_DH 0x4000a268u\r
-#define CYDEV_CAN0_RX14_DL 0x4000a26cu\r
-#define CYDEV_CAN0_RX14_AMR 0x4000a270u\r
-#define CYDEV_CAN0_RX14_ACR 0x4000a274u\r
-#define CYDEV_CAN0_RX14_AMRD 0x4000a278u\r
-#define CYDEV_CAN0_RX14_ACRD 0x4000a27cu\r
-#define CYDEV_CAN0_RX15_BASE 0x4000a280u\r
-#define CYDEV_CAN0_RX15_SIZE 0x00000020u\r
-#define CYDEV_CAN0_RX15_CMD 0x4000a280u\r
-#define CYDEV_CAN0_RX15_ID 0x4000a284u\r
-#define CYDEV_CAN0_RX15_DH 0x4000a288u\r
-#define CYDEV_CAN0_RX15_DL 0x4000a28cu\r
-#define CYDEV_CAN0_RX15_AMR 0x4000a290u\r
-#define CYDEV_CAN0_RX15_ACR 0x4000a294u\r
-#define CYDEV_CAN0_RX15_AMRD 0x4000a298u\r
-#define CYDEV_CAN0_RX15_ACRD 0x4000a29cu\r
-#define CYDEV_DFB0_BASE 0x4000c000u\r
-#define CYDEV_DFB0_SIZE 0x000007b5u\r
-#define CYDEV_DFB0_DPA_SRAM_BASE 0x4000c000u\r
-#define CYDEV_DFB0_DPA_SRAM_SIZE 0x00000200u\r
-#define CYDEV_DFB0_DPA_SRAM_DATA_MBASE 0x4000c000u\r
-#define CYDEV_DFB0_DPA_SRAM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_DFB0_DPB_SRAM_BASE 0x4000c200u\r
-#define CYDEV_DFB0_DPB_SRAM_SIZE 0x00000200u\r
-#define CYDEV_DFB0_DPB_SRAM_DATA_MBASE 0x4000c200u\r
-#define CYDEV_DFB0_DPB_SRAM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_DFB0_CSA_SRAM_BASE 0x4000c400u\r
-#define CYDEV_DFB0_CSA_SRAM_SIZE 0x00000100u\r
-#define CYDEV_DFB0_CSA_SRAM_DATA_MBASE 0x4000c400u\r
-#define CYDEV_DFB0_CSA_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_CSB_SRAM_BASE 0x4000c500u\r
-#define CYDEV_DFB0_CSB_SRAM_SIZE 0x00000100u\r
-#define CYDEV_DFB0_CSB_SRAM_DATA_MBASE 0x4000c500u\r
-#define CYDEV_DFB0_CSB_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_FSM_SRAM_BASE 0x4000c600u\r
-#define CYDEV_DFB0_FSM_SRAM_SIZE 0x00000100u\r
-#define CYDEV_DFB0_FSM_SRAM_DATA_MBASE 0x4000c600u\r
-#define CYDEV_DFB0_FSM_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_ACU_SRAM_BASE 0x4000c700u\r
-#define CYDEV_DFB0_ACU_SRAM_SIZE 0x00000040u\r
-#define CYDEV_DFB0_ACU_SRAM_DATA_MBASE 0x4000c700u\r
-#define CYDEV_DFB0_ACU_SRAM_DATA_MSIZE 0x00000040u\r
-#define CYDEV_DFB0_CR 0x4000c780u\r
-#define CYDEV_DFB0_SR 0x4000c784u\r
-#define CYDEV_DFB0_RAM_EN 0x4000c788u\r
-#define CYDEV_DFB0_RAM_DIR 0x4000c78cu\r
-#define CYDEV_DFB0_SEMA 0x4000c790u\r
-#define CYDEV_DFB0_DSI_CTRL 0x4000c794u\r
-#define CYDEV_DFB0_INT_CTRL 0x4000c798u\r
-#define CYDEV_DFB0_DMA_CTRL 0x4000c79cu\r
-#define CYDEV_DFB0_STAGEA 0x4000c7a0u\r
-#define CYDEV_DFB0_STAGEAM 0x4000c7a1u\r
-#define CYDEV_DFB0_STAGEAH 0x4000c7a2u\r
-#define CYDEV_DFB0_STAGEB 0x4000c7a4u\r
-#define CYDEV_DFB0_STAGEBM 0x4000c7a5u\r
-#define CYDEV_DFB0_STAGEBH 0x4000c7a6u\r
-#define CYDEV_DFB0_HOLDA 0x4000c7a8u\r
-#define CYDEV_DFB0_HOLDAM 0x4000c7a9u\r
-#define CYDEV_DFB0_HOLDAH 0x4000c7aau\r
-#define CYDEV_DFB0_HOLDAS 0x4000c7abu\r
-#define CYDEV_DFB0_HOLDB 0x4000c7acu\r
-#define CYDEV_DFB0_HOLDBM 0x4000c7adu\r
-#define CYDEV_DFB0_HOLDBH 0x4000c7aeu\r
-#define CYDEV_DFB0_HOLDBS 0x4000c7afu\r
-#define CYDEV_DFB0_COHER 0x4000c7b0u\r
-#define CYDEV_DFB0_DALIGN 0x4000c7b4u\r
-#define CYDEV_UCFG_BASE 0x40010000u\r
-#define CYDEV_UCFG_SIZE 0x00005040u\r
-#define CYDEV_UCFG_B0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_SIZE 0x00000fefu\r
-#define CYDEV_UCFG_B0_P0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_P0_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P0_U0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_P0_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT0 0x40010000u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT1 0x40010004u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT2 0x40010008u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT3 0x4001000cu\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT4 0x40010010u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT5 0x40010014u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT6 0x40010018u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT7 0x4001001cu\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT8 0x40010020u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT9 0x40010024u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT10 0x40010028u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT11 0x4001002cu\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT0 0x40010030u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT1 0x40010032u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT2 0x40010034u\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT3 0x40010036u\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST 0x40010038u\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB 0x4001003au\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET 0x4001003cu\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS 0x4001003eu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG0 0x40010040u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG1 0x40010041u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG2 0x40010042u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG3 0x40010043u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG4 0x40010044u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG5 0x40010045u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG6 0x40010046u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG7 0x40010047u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG8 0x40010048u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG9 0x40010049u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG10 0x4001004au\r
-#define CYDEV_UCFG_B0_P0_U0_CFG11 0x4001004bu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG12 0x4001004cu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG13 0x4001004du\r
-#define CYDEV_UCFG_B0_P0_U0_CFG14 0x4001004eu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG15 0x4001004fu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG16 0x40010050u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG17 0x40010051u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG18 0x40010052u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG19 0x40010053u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG20 0x40010054u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG21 0x40010055u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG22 0x40010056u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG23 0x40010057u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG24 0x40010058u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG25 0x40010059u\r
-#define CYDEV_UCFG_B0_P0_U0_CFG26 0x4001005au\r
-#define CYDEV_UCFG_B0_P0_U0_CFG27 0x4001005bu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG28 0x4001005cu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG29 0x4001005du\r
-#define CYDEV_UCFG_B0_P0_U0_CFG30 0x4001005eu\r
-#define CYDEV_UCFG_B0_P0_U0_CFG31 0x4001005fu\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG0 0x40010060u\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG1 0x40010062u\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG2 0x40010064u\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG3 0x40010066u\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG4 0x40010068u\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG5 0x4001006au\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG6 0x4001006cu\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG7 0x4001006eu\r
-#define CYDEV_UCFG_B0_P0_U1_BASE 0x40010080u\r
-#define CYDEV_UCFG_B0_P0_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT0 0x40010080u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT1 0x40010084u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT2 0x40010088u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT3 0x4001008cu\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT4 0x40010090u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT5 0x40010094u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT6 0x40010098u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT7 0x4001009cu\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT8 0x400100a0u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT9 0x400100a4u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT10 0x400100a8u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT11 0x400100acu\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT0 0x400100b0u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT1 0x400100b2u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT2 0x400100b4u\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT3 0x400100b6u\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST 0x400100b8u\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB 0x400100bau\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET 0x400100bcu\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS 0x400100beu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG0 0x400100c0u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG1 0x400100c1u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG2 0x400100c2u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG3 0x400100c3u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG4 0x400100c4u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG5 0x400100c5u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG6 0x400100c6u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG7 0x400100c7u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG8 0x400100c8u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG9 0x400100c9u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG10 0x400100cau\r
-#define CYDEV_UCFG_B0_P0_U1_CFG11 0x400100cbu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG12 0x400100ccu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG13 0x400100cdu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG14 0x400100ceu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG15 0x400100cfu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG16 0x400100d0u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG17 0x400100d1u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG18 0x400100d2u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG19 0x400100d3u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG20 0x400100d4u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG21 0x400100d5u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG22 0x400100d6u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG23 0x400100d7u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG24 0x400100d8u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG25 0x400100d9u\r
-#define CYDEV_UCFG_B0_P0_U1_CFG26 0x400100dau\r
-#define CYDEV_UCFG_B0_P0_U1_CFG27 0x400100dbu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG28 0x400100dcu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG29 0x400100ddu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG30 0x400100deu\r
-#define CYDEV_UCFG_B0_P0_U1_CFG31 0x400100dfu\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG0 0x400100e0u\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG1 0x400100e2u\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG2 0x400100e4u\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG3 0x400100e6u\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG4 0x400100e8u\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG5 0x400100eau\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG6 0x400100ecu\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG7 0x400100eeu\r
-#define CYDEV_UCFG_B0_P0_ROUTE_BASE 0x40010100u\r
-#define CYDEV_UCFG_B0_P0_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P1_BASE 0x40010200u\r
-#define CYDEV_UCFG_B0_P1_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P1_U0_BASE 0x40010200u\r
-#define CYDEV_UCFG_B0_P1_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT0 0x40010200u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT1 0x40010204u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT2 0x40010208u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT3 0x4001020cu\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT4 0x40010210u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT5 0x40010214u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT6 0x40010218u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT7 0x4001021cu\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT8 0x40010220u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT9 0x40010224u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT10 0x40010228u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT11 0x4001022cu\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT0 0x40010230u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT1 0x40010232u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT2 0x40010234u\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT3 0x40010236u\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST 0x40010238u\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB 0x4001023au\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET 0x4001023cu\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS 0x4001023eu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG0 0x40010240u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG1 0x40010241u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG2 0x40010242u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG3 0x40010243u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG4 0x40010244u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG5 0x40010245u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG6 0x40010246u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG7 0x40010247u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG8 0x40010248u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG9 0x40010249u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG10 0x4001024au\r
-#define CYDEV_UCFG_B0_P1_U0_CFG11 0x4001024bu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG12 0x4001024cu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG13 0x4001024du\r
-#define CYDEV_UCFG_B0_P1_U0_CFG14 0x4001024eu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG15 0x4001024fu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG16 0x40010250u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG17 0x40010251u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG18 0x40010252u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG19 0x40010253u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG20 0x40010254u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG21 0x40010255u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG22 0x40010256u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG23 0x40010257u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG24 0x40010258u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG25 0x40010259u\r
-#define CYDEV_UCFG_B0_P1_U0_CFG26 0x4001025au\r
-#define CYDEV_UCFG_B0_P1_U0_CFG27 0x4001025bu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG28 0x4001025cu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG29 0x4001025du\r
-#define CYDEV_UCFG_B0_P1_U0_CFG30 0x4001025eu\r
-#define CYDEV_UCFG_B0_P1_U0_CFG31 0x4001025fu\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG0 0x40010260u\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG1 0x40010262u\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG2 0x40010264u\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG3 0x40010266u\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG4 0x40010268u\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG5 0x4001026au\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG6 0x4001026cu\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG7 0x4001026eu\r
-#define CYDEV_UCFG_B0_P1_U1_BASE 0x40010280u\r
-#define CYDEV_UCFG_B0_P1_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT0 0x40010280u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT1 0x40010284u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT2 0x40010288u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT3 0x4001028cu\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT4 0x40010290u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT5 0x40010294u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT6 0x40010298u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT7 0x4001029cu\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT8 0x400102a0u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT9 0x400102a4u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT10 0x400102a8u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT11 0x400102acu\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT0 0x400102b0u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT1 0x400102b2u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT2 0x400102b4u\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT3 0x400102b6u\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST 0x400102b8u\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB 0x400102bau\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET 0x400102bcu\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS 0x400102beu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG0 0x400102c0u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG1 0x400102c1u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG2 0x400102c2u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG3 0x400102c3u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG4 0x400102c4u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG5 0x400102c5u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG6 0x400102c6u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG7 0x400102c7u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG8 0x400102c8u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG9 0x400102c9u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG10 0x400102cau\r
-#define CYDEV_UCFG_B0_P1_U1_CFG11 0x400102cbu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG12 0x400102ccu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG13 0x400102cdu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG14 0x400102ceu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG15 0x400102cfu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG16 0x400102d0u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG17 0x400102d1u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG18 0x400102d2u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG19 0x400102d3u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG20 0x400102d4u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG21 0x400102d5u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG22 0x400102d6u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG23 0x400102d7u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG24 0x400102d8u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG25 0x400102d9u\r
-#define CYDEV_UCFG_B0_P1_U1_CFG26 0x400102dau\r
-#define CYDEV_UCFG_B0_P1_U1_CFG27 0x400102dbu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG28 0x400102dcu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG29 0x400102ddu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG30 0x400102deu\r
-#define CYDEV_UCFG_B0_P1_U1_CFG31 0x400102dfu\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG0 0x400102e0u\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG1 0x400102e2u\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG2 0x400102e4u\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG3 0x400102e6u\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG4 0x400102e8u\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG5 0x400102eau\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG6 0x400102ecu\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG7 0x400102eeu\r
-#define CYDEV_UCFG_B0_P1_ROUTE_BASE 0x40010300u\r
-#define CYDEV_UCFG_B0_P1_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P2_BASE 0x40010400u\r
-#define CYDEV_UCFG_B0_P2_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P2_U0_BASE 0x40010400u\r
-#define CYDEV_UCFG_B0_P2_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT0 0x40010400u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT1 0x40010404u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT2 0x40010408u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT3 0x4001040cu\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT4 0x40010410u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT5 0x40010414u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT6 0x40010418u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT7 0x4001041cu\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT8 0x40010420u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT9 0x40010424u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT10 0x40010428u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT11 0x4001042cu\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT0 0x40010430u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT1 0x40010432u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT2 0x40010434u\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT3 0x40010436u\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST 0x40010438u\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB 0x4001043au\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET 0x4001043cu\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS 0x4001043eu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG0 0x40010440u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG1 0x40010441u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG2 0x40010442u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG3 0x40010443u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG4 0x40010444u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG5 0x40010445u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG6 0x40010446u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG7 0x40010447u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG8 0x40010448u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG9 0x40010449u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG10 0x4001044au\r
-#define CYDEV_UCFG_B0_P2_U0_CFG11 0x4001044bu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG12 0x4001044cu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG13 0x4001044du\r
-#define CYDEV_UCFG_B0_P2_U0_CFG14 0x4001044eu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG15 0x4001044fu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG16 0x40010450u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG17 0x40010451u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG18 0x40010452u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG19 0x40010453u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG20 0x40010454u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG21 0x40010455u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG22 0x40010456u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG23 0x40010457u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG24 0x40010458u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG25 0x40010459u\r
-#define CYDEV_UCFG_B0_P2_U0_CFG26 0x4001045au\r
-#define CYDEV_UCFG_B0_P2_U0_CFG27 0x4001045bu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG28 0x4001045cu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG29 0x4001045du\r
-#define CYDEV_UCFG_B0_P2_U0_CFG30 0x4001045eu\r
-#define CYDEV_UCFG_B0_P2_U0_CFG31 0x4001045fu\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG0 0x40010460u\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG1 0x40010462u\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG2 0x40010464u\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG3 0x40010466u\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG4 0x40010468u\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG5 0x4001046au\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG6 0x4001046cu\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG7 0x4001046eu\r
-#define CYDEV_UCFG_B0_P2_U1_BASE 0x40010480u\r
-#define CYDEV_UCFG_B0_P2_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT0 0x40010480u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT1 0x40010484u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT2 0x40010488u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT3 0x4001048cu\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT4 0x40010490u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT5 0x40010494u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT6 0x40010498u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT7 0x4001049cu\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT8 0x400104a0u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT9 0x400104a4u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT10 0x400104a8u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT11 0x400104acu\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT0 0x400104b0u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT1 0x400104b2u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT2 0x400104b4u\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT3 0x400104b6u\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST 0x400104b8u\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB 0x400104bau\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET 0x400104bcu\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS 0x400104beu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG0 0x400104c0u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG1 0x400104c1u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG2 0x400104c2u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG3 0x400104c3u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG4 0x400104c4u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG5 0x400104c5u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG6 0x400104c6u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG7 0x400104c7u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG8 0x400104c8u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG9 0x400104c9u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG10 0x400104cau\r
-#define CYDEV_UCFG_B0_P2_U1_CFG11 0x400104cbu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG12 0x400104ccu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG13 0x400104cdu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG14 0x400104ceu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG15 0x400104cfu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG16 0x400104d0u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG17 0x400104d1u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG18 0x400104d2u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG19 0x400104d3u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG20 0x400104d4u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG21 0x400104d5u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG22 0x400104d6u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG23 0x400104d7u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG24 0x400104d8u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG25 0x400104d9u\r
-#define CYDEV_UCFG_B0_P2_U1_CFG26 0x400104dau\r
-#define CYDEV_UCFG_B0_P2_U1_CFG27 0x400104dbu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG28 0x400104dcu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG29 0x400104ddu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG30 0x400104deu\r
-#define CYDEV_UCFG_B0_P2_U1_CFG31 0x400104dfu\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG0 0x400104e0u\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG1 0x400104e2u\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG2 0x400104e4u\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG3 0x400104e6u\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG4 0x400104e8u\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG5 0x400104eau\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG6 0x400104ecu\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG7 0x400104eeu\r
-#define CYDEV_UCFG_B0_P2_ROUTE_BASE 0x40010500u\r
-#define CYDEV_UCFG_B0_P2_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P3_BASE 0x40010600u\r
-#define CYDEV_UCFG_B0_P3_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P3_U0_BASE 0x40010600u\r
-#define CYDEV_UCFG_B0_P3_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT0 0x40010600u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT1 0x40010604u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT2 0x40010608u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT3 0x4001060cu\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT4 0x40010610u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT5 0x40010614u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT6 0x40010618u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT7 0x4001061cu\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT8 0x40010620u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT9 0x40010624u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT10 0x40010628u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT11 0x4001062cu\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT0 0x40010630u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT1 0x40010632u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT2 0x40010634u\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT3 0x40010636u\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST 0x40010638u\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB 0x4001063au\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET 0x4001063cu\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS 0x4001063eu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG0 0x40010640u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG1 0x40010641u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG2 0x40010642u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG3 0x40010643u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG4 0x40010644u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG5 0x40010645u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG6 0x40010646u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG7 0x40010647u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG8 0x40010648u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG9 0x40010649u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG10 0x4001064au\r
-#define CYDEV_UCFG_B0_P3_U0_CFG11 0x4001064bu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG12 0x4001064cu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG13 0x4001064du\r
-#define CYDEV_UCFG_B0_P3_U0_CFG14 0x4001064eu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG15 0x4001064fu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG16 0x40010650u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG17 0x40010651u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG18 0x40010652u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG19 0x40010653u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG20 0x40010654u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG21 0x40010655u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG22 0x40010656u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG23 0x40010657u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG24 0x40010658u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG25 0x40010659u\r
-#define CYDEV_UCFG_B0_P3_U0_CFG26 0x4001065au\r
-#define CYDEV_UCFG_B0_P3_U0_CFG27 0x4001065bu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG28 0x4001065cu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG29 0x4001065du\r
-#define CYDEV_UCFG_B0_P3_U0_CFG30 0x4001065eu\r
-#define CYDEV_UCFG_B0_P3_U0_CFG31 0x4001065fu\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG0 0x40010660u\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG1 0x40010662u\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG2 0x40010664u\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG3 0x40010666u\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG4 0x40010668u\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG5 0x4001066au\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG6 0x4001066cu\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG7 0x4001066eu\r
-#define CYDEV_UCFG_B0_P3_U1_BASE 0x40010680u\r
-#define CYDEV_UCFG_B0_P3_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT0 0x40010680u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT1 0x40010684u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT2 0x40010688u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT3 0x4001068cu\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT4 0x40010690u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT5 0x40010694u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT6 0x40010698u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT7 0x4001069cu\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT8 0x400106a0u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT9 0x400106a4u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT10 0x400106a8u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT11 0x400106acu\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT0 0x400106b0u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT1 0x400106b2u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT2 0x400106b4u\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT3 0x400106b6u\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST 0x400106b8u\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB 0x400106bau\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET 0x400106bcu\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS 0x400106beu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG0 0x400106c0u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG1 0x400106c1u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG2 0x400106c2u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG3 0x400106c3u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG4 0x400106c4u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG5 0x400106c5u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG6 0x400106c6u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG7 0x400106c7u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG8 0x400106c8u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG9 0x400106c9u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG10 0x400106cau\r
-#define CYDEV_UCFG_B0_P3_U1_CFG11 0x400106cbu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG12 0x400106ccu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG13 0x400106cdu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG14 0x400106ceu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG15 0x400106cfu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG16 0x400106d0u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG17 0x400106d1u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG18 0x400106d2u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG19 0x400106d3u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG20 0x400106d4u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG21 0x400106d5u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG22 0x400106d6u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG23 0x400106d7u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG24 0x400106d8u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG25 0x400106d9u\r
-#define CYDEV_UCFG_B0_P3_U1_CFG26 0x400106dau\r
-#define CYDEV_UCFG_B0_P3_U1_CFG27 0x400106dbu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG28 0x400106dcu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG29 0x400106ddu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG30 0x400106deu\r
-#define CYDEV_UCFG_B0_P3_U1_CFG31 0x400106dfu\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG0 0x400106e0u\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG1 0x400106e2u\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG2 0x400106e4u\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG3 0x400106e6u\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG4 0x400106e8u\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG5 0x400106eau\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG6 0x400106ecu\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG7 0x400106eeu\r
-#define CYDEV_UCFG_B0_P3_ROUTE_BASE 0x40010700u\r
-#define CYDEV_UCFG_B0_P3_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P4_BASE 0x40010800u\r
-#define CYDEV_UCFG_B0_P4_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P4_U0_BASE 0x40010800u\r
-#define CYDEV_UCFG_B0_P4_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT0 0x40010800u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT1 0x40010804u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT2 0x40010808u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT3 0x4001080cu\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT4 0x40010810u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT5 0x40010814u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT6 0x40010818u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT7 0x4001081cu\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT8 0x40010820u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT9 0x40010824u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT10 0x40010828u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT11 0x4001082cu\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT0 0x40010830u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT1 0x40010832u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT2 0x40010834u\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT3 0x40010836u\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST 0x40010838u\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB 0x4001083au\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET 0x4001083cu\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS 0x4001083eu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG0 0x40010840u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG1 0x40010841u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG2 0x40010842u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG3 0x40010843u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG4 0x40010844u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG5 0x40010845u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG6 0x40010846u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG7 0x40010847u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG8 0x40010848u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG9 0x40010849u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG10 0x4001084au\r
-#define CYDEV_UCFG_B0_P4_U0_CFG11 0x4001084bu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG12 0x4001084cu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG13 0x4001084du\r
-#define CYDEV_UCFG_B0_P4_U0_CFG14 0x4001084eu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG15 0x4001084fu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG16 0x40010850u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG17 0x40010851u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG18 0x40010852u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG19 0x40010853u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG20 0x40010854u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG21 0x40010855u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG22 0x40010856u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG23 0x40010857u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG24 0x40010858u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG25 0x40010859u\r
-#define CYDEV_UCFG_B0_P4_U0_CFG26 0x4001085au\r
-#define CYDEV_UCFG_B0_P4_U0_CFG27 0x4001085bu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG28 0x4001085cu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG29 0x4001085du\r
-#define CYDEV_UCFG_B0_P4_U0_CFG30 0x4001085eu\r
-#define CYDEV_UCFG_B0_P4_U0_CFG31 0x4001085fu\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG0 0x40010860u\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG1 0x40010862u\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG2 0x40010864u\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG3 0x40010866u\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG4 0x40010868u\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG5 0x4001086au\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG6 0x4001086cu\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG7 0x4001086eu\r
-#define CYDEV_UCFG_B0_P4_U1_BASE 0x40010880u\r
-#define CYDEV_UCFG_B0_P4_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT0 0x40010880u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT1 0x40010884u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT2 0x40010888u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT3 0x4001088cu\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT4 0x40010890u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT5 0x40010894u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT6 0x40010898u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT7 0x4001089cu\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT8 0x400108a0u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT9 0x400108a4u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT10 0x400108a8u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT11 0x400108acu\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT0 0x400108b0u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT1 0x400108b2u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT2 0x400108b4u\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT3 0x400108b6u\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST 0x400108b8u\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB 0x400108bau\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET 0x400108bcu\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS 0x400108beu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG0 0x400108c0u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG1 0x400108c1u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG2 0x400108c2u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG3 0x400108c3u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG4 0x400108c4u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG5 0x400108c5u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG6 0x400108c6u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG7 0x400108c7u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG8 0x400108c8u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG9 0x400108c9u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG10 0x400108cau\r
-#define CYDEV_UCFG_B0_P4_U1_CFG11 0x400108cbu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG12 0x400108ccu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG13 0x400108cdu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG14 0x400108ceu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG15 0x400108cfu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG16 0x400108d0u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG17 0x400108d1u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG18 0x400108d2u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG19 0x400108d3u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG20 0x400108d4u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG21 0x400108d5u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG22 0x400108d6u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG23 0x400108d7u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG24 0x400108d8u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG25 0x400108d9u\r
-#define CYDEV_UCFG_B0_P4_U1_CFG26 0x400108dau\r
-#define CYDEV_UCFG_B0_P4_U1_CFG27 0x400108dbu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG28 0x400108dcu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG29 0x400108ddu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG30 0x400108deu\r
-#define CYDEV_UCFG_B0_P4_U1_CFG31 0x400108dfu\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG0 0x400108e0u\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG1 0x400108e2u\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG2 0x400108e4u\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG3 0x400108e6u\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG4 0x400108e8u\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG5 0x400108eau\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG6 0x400108ecu\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG7 0x400108eeu\r
-#define CYDEV_UCFG_B0_P4_ROUTE_BASE 0x40010900u\r
-#define CYDEV_UCFG_B0_P4_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P5_BASE 0x40010a00u\r
-#define CYDEV_UCFG_B0_P5_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P5_U0_BASE 0x40010a00u\r
-#define CYDEV_UCFG_B0_P5_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT0 0x40010a00u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT1 0x40010a04u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT2 0x40010a08u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT3 0x40010a0cu\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT4 0x40010a10u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT5 0x40010a14u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT6 0x40010a18u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT7 0x40010a1cu\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT8 0x40010a20u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT9 0x40010a24u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT10 0x40010a28u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT11 0x40010a2cu\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT0 0x40010a30u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT1 0x40010a32u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT2 0x40010a34u\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT3 0x40010a36u\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST 0x40010a38u\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB 0x40010a3au\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET 0x40010a3cu\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS 0x40010a3eu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG0 0x40010a40u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG1 0x40010a41u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG2 0x40010a42u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG3 0x40010a43u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG4 0x40010a44u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG5 0x40010a45u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG6 0x40010a46u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG7 0x40010a47u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG8 0x40010a48u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG9 0x40010a49u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG10 0x40010a4au\r
-#define CYDEV_UCFG_B0_P5_U0_CFG11 0x40010a4bu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG12 0x40010a4cu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG13 0x40010a4du\r
-#define CYDEV_UCFG_B0_P5_U0_CFG14 0x40010a4eu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG15 0x40010a4fu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG16 0x40010a50u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG17 0x40010a51u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG18 0x40010a52u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG19 0x40010a53u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG20 0x40010a54u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG21 0x40010a55u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG22 0x40010a56u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG23 0x40010a57u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG24 0x40010a58u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG25 0x40010a59u\r
-#define CYDEV_UCFG_B0_P5_U0_CFG26 0x40010a5au\r
-#define CYDEV_UCFG_B0_P5_U0_CFG27 0x40010a5bu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG28 0x40010a5cu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG29 0x40010a5du\r
-#define CYDEV_UCFG_B0_P5_U0_CFG30 0x40010a5eu\r
-#define CYDEV_UCFG_B0_P5_U0_CFG31 0x40010a5fu\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG0 0x40010a60u\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG1 0x40010a62u\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG2 0x40010a64u\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG3 0x40010a66u\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG4 0x40010a68u\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG5 0x40010a6au\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG6 0x40010a6cu\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG7 0x40010a6eu\r
-#define CYDEV_UCFG_B0_P5_U1_BASE 0x40010a80u\r
-#define CYDEV_UCFG_B0_P5_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT0 0x40010a80u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT1 0x40010a84u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT2 0x40010a88u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT3 0x40010a8cu\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT4 0x40010a90u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT5 0x40010a94u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT6 0x40010a98u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT7 0x40010a9cu\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT8 0x40010aa0u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT9 0x40010aa4u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT10 0x40010aa8u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT11 0x40010aacu\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT0 0x40010ab0u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT1 0x40010ab2u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT2 0x40010ab4u\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT3 0x40010ab6u\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST 0x40010ab8u\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB 0x40010abau\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET 0x40010abcu\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS 0x40010abeu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG0 0x40010ac0u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG1 0x40010ac1u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG2 0x40010ac2u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG3 0x40010ac3u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG4 0x40010ac4u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG5 0x40010ac5u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG6 0x40010ac6u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG7 0x40010ac7u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG8 0x40010ac8u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG9 0x40010ac9u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG10 0x40010acau\r
-#define CYDEV_UCFG_B0_P5_U1_CFG11 0x40010acbu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG12 0x40010accu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG13 0x40010acdu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG14 0x40010aceu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG15 0x40010acfu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG16 0x40010ad0u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG17 0x40010ad1u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG18 0x40010ad2u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG19 0x40010ad3u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG20 0x40010ad4u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG21 0x40010ad5u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG22 0x40010ad6u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG23 0x40010ad7u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG24 0x40010ad8u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG25 0x40010ad9u\r
-#define CYDEV_UCFG_B0_P5_U1_CFG26 0x40010adau\r
-#define CYDEV_UCFG_B0_P5_U1_CFG27 0x40010adbu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG28 0x40010adcu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG29 0x40010addu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG30 0x40010adeu\r
-#define CYDEV_UCFG_B0_P5_U1_CFG31 0x40010adfu\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG0 0x40010ae0u\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG1 0x40010ae2u\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG2 0x40010ae4u\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG3 0x40010ae6u\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG4 0x40010ae8u\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG5 0x40010aeau\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG6 0x40010aecu\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG7 0x40010aeeu\r
-#define CYDEV_UCFG_B0_P5_ROUTE_BASE 0x40010b00u\r
-#define CYDEV_UCFG_B0_P5_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P6_BASE 0x40010c00u\r
-#define CYDEV_UCFG_B0_P6_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P6_U0_BASE 0x40010c00u\r
-#define CYDEV_UCFG_B0_P6_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT0 0x40010c00u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT1 0x40010c04u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT2 0x40010c08u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT3 0x40010c0cu\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT4 0x40010c10u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT5 0x40010c14u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT6 0x40010c18u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT7 0x40010c1cu\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT8 0x40010c20u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT9 0x40010c24u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT10 0x40010c28u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT11 0x40010c2cu\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT0 0x40010c30u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT1 0x40010c32u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT2 0x40010c34u\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT3 0x40010c36u\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST 0x40010c38u\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB 0x40010c3au\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET 0x40010c3cu\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS 0x40010c3eu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG0 0x40010c40u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG1 0x40010c41u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG2 0x40010c42u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG3 0x40010c43u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG4 0x40010c44u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG5 0x40010c45u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG6 0x40010c46u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG7 0x40010c47u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG8 0x40010c48u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG9 0x40010c49u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG10 0x40010c4au\r
-#define CYDEV_UCFG_B0_P6_U0_CFG11 0x40010c4bu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG12 0x40010c4cu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG13 0x40010c4du\r
-#define CYDEV_UCFG_B0_P6_U0_CFG14 0x40010c4eu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG15 0x40010c4fu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG16 0x40010c50u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG17 0x40010c51u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG18 0x40010c52u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG19 0x40010c53u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG20 0x40010c54u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG21 0x40010c55u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG22 0x40010c56u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG23 0x40010c57u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG24 0x40010c58u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG25 0x40010c59u\r
-#define CYDEV_UCFG_B0_P6_U0_CFG26 0x40010c5au\r
-#define CYDEV_UCFG_B0_P6_U0_CFG27 0x40010c5bu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG28 0x40010c5cu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG29 0x40010c5du\r
-#define CYDEV_UCFG_B0_P6_U0_CFG30 0x40010c5eu\r
-#define CYDEV_UCFG_B0_P6_U0_CFG31 0x40010c5fu\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG0 0x40010c60u\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG1 0x40010c62u\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG2 0x40010c64u\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG3 0x40010c66u\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG4 0x40010c68u\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG5 0x40010c6au\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG6 0x40010c6cu\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG7 0x40010c6eu\r
-#define CYDEV_UCFG_B0_P6_U1_BASE 0x40010c80u\r
-#define CYDEV_UCFG_B0_P6_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT0 0x40010c80u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT1 0x40010c84u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT2 0x40010c88u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT3 0x40010c8cu\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT4 0x40010c90u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT5 0x40010c94u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT6 0x40010c98u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT7 0x40010c9cu\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT8 0x40010ca0u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT9 0x40010ca4u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT10 0x40010ca8u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT11 0x40010cacu\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT0 0x40010cb0u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT1 0x40010cb2u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT2 0x40010cb4u\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT3 0x40010cb6u\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST 0x40010cb8u\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB 0x40010cbau\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET 0x40010cbcu\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS 0x40010cbeu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG0 0x40010cc0u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG1 0x40010cc1u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG2 0x40010cc2u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG3 0x40010cc3u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG4 0x40010cc4u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG5 0x40010cc5u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG6 0x40010cc6u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG7 0x40010cc7u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG8 0x40010cc8u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG9 0x40010cc9u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG10 0x40010ccau\r
-#define CYDEV_UCFG_B0_P6_U1_CFG11 0x40010ccbu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG12 0x40010cccu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG13 0x40010ccdu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG14 0x40010cceu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG15 0x40010ccfu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG16 0x40010cd0u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG17 0x40010cd1u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG18 0x40010cd2u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG19 0x40010cd3u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG20 0x40010cd4u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG21 0x40010cd5u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG22 0x40010cd6u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG23 0x40010cd7u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG24 0x40010cd8u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG25 0x40010cd9u\r
-#define CYDEV_UCFG_B0_P6_U1_CFG26 0x40010cdau\r
-#define CYDEV_UCFG_B0_P6_U1_CFG27 0x40010cdbu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG28 0x40010cdcu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG29 0x40010cddu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG30 0x40010cdeu\r
-#define CYDEV_UCFG_B0_P6_U1_CFG31 0x40010cdfu\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG0 0x40010ce0u\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG1 0x40010ce2u\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG2 0x40010ce4u\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG3 0x40010ce6u\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG4 0x40010ce8u\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG5 0x40010ceau\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG6 0x40010cecu\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG7 0x40010ceeu\r
-#define CYDEV_UCFG_B0_P6_ROUTE_BASE 0x40010d00u\r
-#define CYDEV_UCFG_B0_P6_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P7_BASE 0x40010e00u\r
-#define CYDEV_UCFG_B0_P7_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P7_U0_BASE 0x40010e00u\r
-#define CYDEV_UCFG_B0_P7_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT0 0x40010e00u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT1 0x40010e04u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT2 0x40010e08u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT3 0x40010e0cu\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT4 0x40010e10u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT5 0x40010e14u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT6 0x40010e18u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT7 0x40010e1cu\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT8 0x40010e20u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT9 0x40010e24u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT10 0x40010e28u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT11 0x40010e2cu\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT0 0x40010e30u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT1 0x40010e32u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT2 0x40010e34u\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT3 0x40010e36u\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST 0x40010e38u\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB 0x40010e3au\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET 0x40010e3cu\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS 0x40010e3eu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG0 0x40010e40u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG1 0x40010e41u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG2 0x40010e42u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG3 0x40010e43u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG4 0x40010e44u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG5 0x40010e45u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG6 0x40010e46u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG7 0x40010e47u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG8 0x40010e48u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG9 0x40010e49u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG10 0x40010e4au\r
-#define CYDEV_UCFG_B0_P7_U0_CFG11 0x40010e4bu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG12 0x40010e4cu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG13 0x40010e4du\r
-#define CYDEV_UCFG_B0_P7_U0_CFG14 0x40010e4eu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG15 0x40010e4fu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG16 0x40010e50u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG17 0x40010e51u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG18 0x40010e52u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG19 0x40010e53u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG20 0x40010e54u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG21 0x40010e55u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG22 0x40010e56u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG23 0x40010e57u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG24 0x40010e58u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG25 0x40010e59u\r
-#define CYDEV_UCFG_B0_P7_U0_CFG26 0x40010e5au\r
-#define CYDEV_UCFG_B0_P7_U0_CFG27 0x40010e5bu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG28 0x40010e5cu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG29 0x40010e5du\r
-#define CYDEV_UCFG_B0_P7_U0_CFG30 0x40010e5eu\r
-#define CYDEV_UCFG_B0_P7_U0_CFG31 0x40010e5fu\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG0 0x40010e60u\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG1 0x40010e62u\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG2 0x40010e64u\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG3 0x40010e66u\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG4 0x40010e68u\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG5 0x40010e6au\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG6 0x40010e6cu\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG7 0x40010e6eu\r
-#define CYDEV_UCFG_B0_P7_U1_BASE 0x40010e80u\r
-#define CYDEV_UCFG_B0_P7_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT0 0x40010e80u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT1 0x40010e84u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT2 0x40010e88u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT3 0x40010e8cu\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT4 0x40010e90u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT5 0x40010e94u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT6 0x40010e98u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT7 0x40010e9cu\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT8 0x40010ea0u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT9 0x40010ea4u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT10 0x40010ea8u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT11 0x40010eacu\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT0 0x40010eb0u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT1 0x40010eb2u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT2 0x40010eb4u\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT3 0x40010eb6u\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST 0x40010eb8u\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB 0x40010ebau\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET 0x40010ebcu\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS 0x40010ebeu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG0 0x40010ec0u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG1 0x40010ec1u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG2 0x40010ec2u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG3 0x40010ec3u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG4 0x40010ec4u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG5 0x40010ec5u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG6 0x40010ec6u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG7 0x40010ec7u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG8 0x40010ec8u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG9 0x40010ec9u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG10 0x40010ecau\r
-#define CYDEV_UCFG_B0_P7_U1_CFG11 0x40010ecbu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG12 0x40010eccu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG13 0x40010ecdu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG14 0x40010eceu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG15 0x40010ecfu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG16 0x40010ed0u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG17 0x40010ed1u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG18 0x40010ed2u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG19 0x40010ed3u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG20 0x40010ed4u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG21 0x40010ed5u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG22 0x40010ed6u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG23 0x40010ed7u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG24 0x40010ed8u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG25 0x40010ed9u\r
-#define CYDEV_UCFG_B0_P7_U1_CFG26 0x40010edau\r
-#define CYDEV_UCFG_B0_P7_U1_CFG27 0x40010edbu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG28 0x40010edcu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG29 0x40010eddu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG30 0x40010edeu\r
-#define CYDEV_UCFG_B0_P7_U1_CFG31 0x40010edfu\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG0 0x40010ee0u\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG1 0x40010ee2u\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG2 0x40010ee4u\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG3 0x40010ee6u\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG4 0x40010ee8u\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG5 0x40010eeau\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG6 0x40010eecu\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG7 0x40010eeeu\r
-#define CYDEV_UCFG_B0_P7_ROUTE_BASE 0x40010f00u\r
-#define CYDEV_UCFG_B0_P7_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_BASE 0x40011000u\r
-#define CYDEV_UCFG_B1_SIZE 0x00000fefu\r
-#define CYDEV_UCFG_B1_P2_BASE 0x40011400u\r
-#define CYDEV_UCFG_B1_P2_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P2_U0_BASE 0x40011400u\r
-#define CYDEV_UCFG_B1_P2_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT0 0x40011400u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT1 0x40011404u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT2 0x40011408u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT3 0x4001140cu\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT4 0x40011410u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT5 0x40011414u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT6 0x40011418u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT7 0x4001141cu\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT8 0x40011420u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT9 0x40011424u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT10 0x40011428u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT11 0x4001142cu\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT0 0x40011430u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT1 0x40011432u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT2 0x40011434u\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT3 0x40011436u\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST 0x40011438u\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB 0x4001143au\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET 0x4001143cu\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS 0x4001143eu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG0 0x40011440u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG1 0x40011441u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG2 0x40011442u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG3 0x40011443u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG4 0x40011444u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG5 0x40011445u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG6 0x40011446u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG7 0x40011447u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG8 0x40011448u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG9 0x40011449u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG10 0x4001144au\r
-#define CYDEV_UCFG_B1_P2_U0_CFG11 0x4001144bu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG12 0x4001144cu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG13 0x4001144du\r
-#define CYDEV_UCFG_B1_P2_U0_CFG14 0x4001144eu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG15 0x4001144fu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG16 0x40011450u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG17 0x40011451u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG18 0x40011452u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG19 0x40011453u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG20 0x40011454u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG21 0x40011455u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG22 0x40011456u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG23 0x40011457u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG24 0x40011458u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG25 0x40011459u\r
-#define CYDEV_UCFG_B1_P2_U0_CFG26 0x4001145au\r
-#define CYDEV_UCFG_B1_P2_U0_CFG27 0x4001145bu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG28 0x4001145cu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG29 0x4001145du\r
-#define CYDEV_UCFG_B1_P2_U0_CFG30 0x4001145eu\r
-#define CYDEV_UCFG_B1_P2_U0_CFG31 0x4001145fu\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG0 0x40011460u\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG1 0x40011462u\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG2 0x40011464u\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG3 0x40011466u\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG4 0x40011468u\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG5 0x4001146au\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG6 0x4001146cu\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG7 0x4001146eu\r
-#define CYDEV_UCFG_B1_P2_U1_BASE 0x40011480u\r
-#define CYDEV_UCFG_B1_P2_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT0 0x40011480u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT1 0x40011484u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT2 0x40011488u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT3 0x4001148cu\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT4 0x40011490u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT5 0x40011494u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT6 0x40011498u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT7 0x4001149cu\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT8 0x400114a0u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT9 0x400114a4u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT10 0x400114a8u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT11 0x400114acu\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT0 0x400114b0u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT1 0x400114b2u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT2 0x400114b4u\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT3 0x400114b6u\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST 0x400114b8u\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB 0x400114bau\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET 0x400114bcu\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS 0x400114beu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG0 0x400114c0u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG1 0x400114c1u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG2 0x400114c2u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG3 0x400114c3u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG4 0x400114c4u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG5 0x400114c5u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG6 0x400114c6u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG7 0x400114c7u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG8 0x400114c8u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG9 0x400114c9u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG10 0x400114cau\r
-#define CYDEV_UCFG_B1_P2_U1_CFG11 0x400114cbu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG12 0x400114ccu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG13 0x400114cdu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG14 0x400114ceu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG15 0x400114cfu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG16 0x400114d0u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG17 0x400114d1u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG18 0x400114d2u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG19 0x400114d3u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG20 0x400114d4u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG21 0x400114d5u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG22 0x400114d6u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG23 0x400114d7u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG24 0x400114d8u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG25 0x400114d9u\r
-#define CYDEV_UCFG_B1_P2_U1_CFG26 0x400114dau\r
-#define CYDEV_UCFG_B1_P2_U1_CFG27 0x400114dbu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG28 0x400114dcu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG29 0x400114ddu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG30 0x400114deu\r
-#define CYDEV_UCFG_B1_P2_U1_CFG31 0x400114dfu\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG0 0x400114e0u\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG1 0x400114e2u\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG2 0x400114e4u\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG3 0x400114e6u\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG4 0x400114e8u\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG5 0x400114eau\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG6 0x400114ecu\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG7 0x400114eeu\r
-#define CYDEV_UCFG_B1_P2_ROUTE_BASE 0x40011500u\r
-#define CYDEV_UCFG_B1_P2_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P3_BASE 0x40011600u\r
-#define CYDEV_UCFG_B1_P3_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P3_U0_BASE 0x40011600u\r
-#define CYDEV_UCFG_B1_P3_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT0 0x40011600u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT1 0x40011604u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT2 0x40011608u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT3 0x4001160cu\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT4 0x40011610u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT5 0x40011614u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT6 0x40011618u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT7 0x4001161cu\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT8 0x40011620u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT9 0x40011624u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT10 0x40011628u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT11 0x4001162cu\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT0 0x40011630u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT1 0x40011632u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT2 0x40011634u\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT3 0x40011636u\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST 0x40011638u\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB 0x4001163au\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET 0x4001163cu\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS 0x4001163eu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG0 0x40011640u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG1 0x40011641u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG2 0x40011642u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG3 0x40011643u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG4 0x40011644u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG5 0x40011645u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG6 0x40011646u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG7 0x40011647u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG8 0x40011648u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG9 0x40011649u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG10 0x4001164au\r
-#define CYDEV_UCFG_B1_P3_U0_CFG11 0x4001164bu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG12 0x4001164cu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG13 0x4001164du\r
-#define CYDEV_UCFG_B1_P3_U0_CFG14 0x4001164eu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG15 0x4001164fu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG16 0x40011650u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG17 0x40011651u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG18 0x40011652u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG19 0x40011653u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG20 0x40011654u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG21 0x40011655u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG22 0x40011656u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG23 0x40011657u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG24 0x40011658u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG25 0x40011659u\r
-#define CYDEV_UCFG_B1_P3_U0_CFG26 0x4001165au\r
-#define CYDEV_UCFG_B1_P3_U0_CFG27 0x4001165bu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG28 0x4001165cu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG29 0x4001165du\r
-#define CYDEV_UCFG_B1_P3_U0_CFG30 0x4001165eu\r
-#define CYDEV_UCFG_B1_P3_U0_CFG31 0x4001165fu\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG0 0x40011660u\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG1 0x40011662u\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG2 0x40011664u\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG3 0x40011666u\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG4 0x40011668u\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG5 0x4001166au\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG6 0x4001166cu\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG7 0x4001166eu\r
-#define CYDEV_UCFG_B1_P3_U1_BASE 0x40011680u\r
-#define CYDEV_UCFG_B1_P3_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT0 0x40011680u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT1 0x40011684u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT2 0x40011688u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT3 0x4001168cu\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT4 0x40011690u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT5 0x40011694u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT6 0x40011698u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT7 0x4001169cu\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT8 0x400116a0u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT9 0x400116a4u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT10 0x400116a8u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT11 0x400116acu\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT0 0x400116b0u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT1 0x400116b2u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT2 0x400116b4u\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT3 0x400116b6u\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST 0x400116b8u\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB 0x400116bau\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET 0x400116bcu\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS 0x400116beu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG0 0x400116c0u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG1 0x400116c1u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG2 0x400116c2u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG3 0x400116c3u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG4 0x400116c4u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG5 0x400116c5u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG6 0x400116c6u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG7 0x400116c7u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG8 0x400116c8u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG9 0x400116c9u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG10 0x400116cau\r
-#define CYDEV_UCFG_B1_P3_U1_CFG11 0x400116cbu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG12 0x400116ccu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG13 0x400116cdu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG14 0x400116ceu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG15 0x400116cfu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG16 0x400116d0u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG17 0x400116d1u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG18 0x400116d2u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG19 0x400116d3u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG20 0x400116d4u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG21 0x400116d5u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG22 0x400116d6u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG23 0x400116d7u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG24 0x400116d8u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG25 0x400116d9u\r
-#define CYDEV_UCFG_B1_P3_U1_CFG26 0x400116dau\r
-#define CYDEV_UCFG_B1_P3_U1_CFG27 0x400116dbu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG28 0x400116dcu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG29 0x400116ddu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG30 0x400116deu\r
-#define CYDEV_UCFG_B1_P3_U1_CFG31 0x400116dfu\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG0 0x400116e0u\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG1 0x400116e2u\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG2 0x400116e4u\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG3 0x400116e6u\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG4 0x400116e8u\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG5 0x400116eau\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG6 0x400116ecu\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG7 0x400116eeu\r
-#define CYDEV_UCFG_B1_P3_ROUTE_BASE 0x40011700u\r
-#define CYDEV_UCFG_B1_P3_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P4_BASE 0x40011800u\r
-#define CYDEV_UCFG_B1_P4_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P4_U0_BASE 0x40011800u\r
-#define CYDEV_UCFG_B1_P4_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT0 0x40011800u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT1 0x40011804u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT2 0x40011808u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT3 0x4001180cu\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT4 0x40011810u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT5 0x40011814u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT6 0x40011818u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT7 0x4001181cu\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT8 0x40011820u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT9 0x40011824u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT10 0x40011828u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT11 0x4001182cu\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT0 0x40011830u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT1 0x40011832u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT2 0x40011834u\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT3 0x40011836u\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST 0x40011838u\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB 0x4001183au\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET 0x4001183cu\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS 0x4001183eu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG0 0x40011840u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG1 0x40011841u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG2 0x40011842u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG3 0x40011843u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG4 0x40011844u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG5 0x40011845u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG6 0x40011846u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG7 0x40011847u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG8 0x40011848u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG9 0x40011849u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG10 0x4001184au\r
-#define CYDEV_UCFG_B1_P4_U0_CFG11 0x4001184bu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG12 0x4001184cu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG13 0x4001184du\r
-#define CYDEV_UCFG_B1_P4_U0_CFG14 0x4001184eu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG15 0x4001184fu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG16 0x40011850u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG17 0x40011851u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG18 0x40011852u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG19 0x40011853u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG20 0x40011854u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG21 0x40011855u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG22 0x40011856u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG23 0x40011857u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG24 0x40011858u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG25 0x40011859u\r
-#define CYDEV_UCFG_B1_P4_U0_CFG26 0x4001185au\r
-#define CYDEV_UCFG_B1_P4_U0_CFG27 0x4001185bu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG28 0x4001185cu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG29 0x4001185du\r
-#define CYDEV_UCFG_B1_P4_U0_CFG30 0x4001185eu\r
-#define CYDEV_UCFG_B1_P4_U0_CFG31 0x4001185fu\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG0 0x40011860u\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG1 0x40011862u\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG2 0x40011864u\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG3 0x40011866u\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG4 0x40011868u\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG5 0x4001186au\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG6 0x4001186cu\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG7 0x4001186eu\r
-#define CYDEV_UCFG_B1_P4_U1_BASE 0x40011880u\r
-#define CYDEV_UCFG_B1_P4_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT0 0x40011880u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT1 0x40011884u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT2 0x40011888u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT3 0x4001188cu\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT4 0x40011890u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT5 0x40011894u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT6 0x40011898u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT7 0x4001189cu\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT8 0x400118a0u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT9 0x400118a4u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT10 0x400118a8u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT11 0x400118acu\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT0 0x400118b0u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT1 0x400118b2u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT2 0x400118b4u\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT3 0x400118b6u\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST 0x400118b8u\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB 0x400118bau\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET 0x400118bcu\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS 0x400118beu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG0 0x400118c0u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG1 0x400118c1u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG2 0x400118c2u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG3 0x400118c3u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG4 0x400118c4u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG5 0x400118c5u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG6 0x400118c6u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG7 0x400118c7u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG8 0x400118c8u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG9 0x400118c9u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG10 0x400118cau\r
-#define CYDEV_UCFG_B1_P4_U1_CFG11 0x400118cbu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG12 0x400118ccu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG13 0x400118cdu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG14 0x400118ceu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG15 0x400118cfu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG16 0x400118d0u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG17 0x400118d1u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG18 0x400118d2u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG19 0x400118d3u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG20 0x400118d4u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG21 0x400118d5u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG22 0x400118d6u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG23 0x400118d7u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG24 0x400118d8u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG25 0x400118d9u\r
-#define CYDEV_UCFG_B1_P4_U1_CFG26 0x400118dau\r
-#define CYDEV_UCFG_B1_P4_U1_CFG27 0x400118dbu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG28 0x400118dcu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG29 0x400118ddu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG30 0x400118deu\r
-#define CYDEV_UCFG_B1_P4_U1_CFG31 0x400118dfu\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG0 0x400118e0u\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG1 0x400118e2u\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG2 0x400118e4u\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG3 0x400118e6u\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG4 0x400118e8u\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG5 0x400118eau\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG6 0x400118ecu\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG7 0x400118eeu\r
-#define CYDEV_UCFG_B1_P4_ROUTE_BASE 0x40011900u\r
-#define CYDEV_UCFG_B1_P4_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P5_BASE 0x40011a00u\r
-#define CYDEV_UCFG_B1_P5_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P5_U0_BASE 0x40011a00u\r
-#define CYDEV_UCFG_B1_P5_U0_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT0 0x40011a00u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT1 0x40011a04u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT2 0x40011a08u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT3 0x40011a0cu\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT4 0x40011a10u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT5 0x40011a14u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT6 0x40011a18u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT7 0x40011a1cu\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT8 0x40011a20u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT9 0x40011a24u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT10 0x40011a28u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT11 0x40011a2cu\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT0 0x40011a30u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT1 0x40011a32u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT2 0x40011a34u\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT3 0x40011a36u\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST 0x40011a38u\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB 0x40011a3au\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET 0x40011a3cu\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS 0x40011a3eu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG0 0x40011a40u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG1 0x40011a41u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG2 0x40011a42u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG3 0x40011a43u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG4 0x40011a44u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG5 0x40011a45u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG6 0x40011a46u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG7 0x40011a47u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG8 0x40011a48u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG9 0x40011a49u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG10 0x40011a4au\r
-#define CYDEV_UCFG_B1_P5_U0_CFG11 0x40011a4bu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG12 0x40011a4cu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG13 0x40011a4du\r
-#define CYDEV_UCFG_B1_P5_U0_CFG14 0x40011a4eu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG15 0x40011a4fu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG16 0x40011a50u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG17 0x40011a51u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG18 0x40011a52u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG19 0x40011a53u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG20 0x40011a54u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG21 0x40011a55u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG22 0x40011a56u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG23 0x40011a57u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG24 0x40011a58u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG25 0x40011a59u\r
-#define CYDEV_UCFG_B1_P5_U0_CFG26 0x40011a5au\r
-#define CYDEV_UCFG_B1_P5_U0_CFG27 0x40011a5bu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG28 0x40011a5cu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG29 0x40011a5du\r
-#define CYDEV_UCFG_B1_P5_U0_CFG30 0x40011a5eu\r
-#define CYDEV_UCFG_B1_P5_U0_CFG31 0x40011a5fu\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG0 0x40011a60u\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG1 0x40011a62u\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG2 0x40011a64u\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG3 0x40011a66u\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG4 0x40011a68u\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG5 0x40011a6au\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG6 0x40011a6cu\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG7 0x40011a6eu\r
-#define CYDEV_UCFG_B1_P5_U1_BASE 0x40011a80u\r
-#define CYDEV_UCFG_B1_P5_U1_SIZE 0x00000070u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT0 0x40011a80u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT1 0x40011a84u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT2 0x40011a88u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT3 0x40011a8cu\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT4 0x40011a90u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT5 0x40011a94u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT6 0x40011a98u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT7 0x40011a9cu\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT8 0x40011aa0u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT9 0x40011aa4u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT10 0x40011aa8u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT11 0x40011aacu\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT0 0x40011ab0u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT1 0x40011ab2u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT2 0x40011ab4u\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT3 0x40011ab6u\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST 0x40011ab8u\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB 0x40011abau\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET 0x40011abcu\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS 0x40011abeu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG0 0x40011ac0u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG1 0x40011ac1u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG2 0x40011ac2u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG3 0x40011ac3u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG4 0x40011ac4u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG5 0x40011ac5u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG6 0x40011ac6u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG7 0x40011ac7u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG8 0x40011ac8u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG9 0x40011ac9u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG10 0x40011acau\r
-#define CYDEV_UCFG_B1_P5_U1_CFG11 0x40011acbu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG12 0x40011accu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG13 0x40011acdu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG14 0x40011aceu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG15 0x40011acfu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG16 0x40011ad0u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG17 0x40011ad1u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG18 0x40011ad2u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG19 0x40011ad3u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG20 0x40011ad4u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG21 0x40011ad5u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG22 0x40011ad6u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG23 0x40011ad7u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG24 0x40011ad8u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG25 0x40011ad9u\r
-#define CYDEV_UCFG_B1_P5_U1_CFG26 0x40011adau\r
-#define CYDEV_UCFG_B1_P5_U1_CFG27 0x40011adbu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG28 0x40011adcu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG29 0x40011addu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG30 0x40011adeu\r
-#define CYDEV_UCFG_B1_P5_U1_CFG31 0x40011adfu\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG0 0x40011ae0u\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG1 0x40011ae2u\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG2 0x40011ae4u\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG3 0x40011ae6u\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG4 0x40011ae8u\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG5 0x40011aeau\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG6 0x40011aecu\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG7 0x40011aeeu\r
-#define CYDEV_UCFG_B1_P5_ROUTE_BASE 0x40011b00u\r
-#define CYDEV_UCFG_B1_P5_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI0_BASE 0x40014000u\r
-#define CYDEV_UCFG_DSI0_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI1_BASE 0x40014100u\r
-#define CYDEV_UCFG_DSI1_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI2_BASE 0x40014200u\r
-#define CYDEV_UCFG_DSI2_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI3_BASE 0x40014300u\r
-#define CYDEV_UCFG_DSI3_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI4_BASE 0x40014400u\r
-#define CYDEV_UCFG_DSI4_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI5_BASE 0x40014500u\r
-#define CYDEV_UCFG_DSI5_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI6_BASE 0x40014600u\r
-#define CYDEV_UCFG_DSI6_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI7_BASE 0x40014700u\r
-#define CYDEV_UCFG_DSI7_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI8_BASE 0x40014800u\r
-#define CYDEV_UCFG_DSI8_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI9_BASE 0x40014900u\r
-#define CYDEV_UCFG_DSI9_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI12_BASE 0x40014c00u\r
-#define CYDEV_UCFG_DSI12_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI13_BASE 0x40014d00u\r
-#define CYDEV_UCFG_DSI13_SIZE 0x000000efu\r
-#define CYDEV_UCFG_BCTL0_BASE 0x40015000u\r
-#define CYDEV_UCFG_BCTL0_SIZE 0x00000010u\r
-#define CYDEV_UCFG_BCTL0_MDCLK_EN 0x40015000u\r
-#define CYDEV_UCFG_BCTL0_MBCLK_EN 0x40015001u\r
-#define CYDEV_UCFG_BCTL0_WAIT_CFG 0x40015002u\r
-#define CYDEV_UCFG_BCTL0_BANK_CTL 0x40015003u\r
-#define CYDEV_UCFG_BCTL0_UDB_TEST_3 0x40015007u\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN0 0x40015008u\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN0 0x40015009u\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN1 0x4001500au\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN1 0x4001500bu\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN2 0x4001500cu\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN2 0x4001500du\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN3 0x4001500eu\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN3 0x4001500fu\r
-#define CYDEV_UCFG_BCTL1_BASE 0x40015010u\r
-#define CYDEV_UCFG_BCTL1_SIZE 0x00000010u\r
-#define CYDEV_UCFG_BCTL1_MDCLK_EN 0x40015010u\r
-#define CYDEV_UCFG_BCTL1_MBCLK_EN 0x40015011u\r
-#define CYDEV_UCFG_BCTL1_WAIT_CFG 0x40015012u\r
-#define CYDEV_UCFG_BCTL1_BANK_CTL 0x40015013u\r
-#define CYDEV_UCFG_BCTL1_UDB_TEST_3 0x40015017u\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN0 0x40015018u\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN0 0x40015019u\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN1 0x4001501au\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN1 0x4001501bu\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN2 0x4001501cu\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN2 0x4001501du\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN3 0x4001501eu\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN3 0x4001501fu\r
-#define CYDEV_IDMUX_BASE 0x40015100u\r
-#define CYDEV_IDMUX_SIZE 0x00000016u\r
-#define CYDEV_IDMUX_IRQ_CTL0 0x40015100u\r
-#define CYDEV_IDMUX_IRQ_CTL1 0x40015101u\r
-#define CYDEV_IDMUX_IRQ_CTL2 0x40015102u\r
-#define CYDEV_IDMUX_IRQ_CTL3 0x40015103u\r
-#define CYDEV_IDMUX_IRQ_CTL4 0x40015104u\r
-#define CYDEV_IDMUX_IRQ_CTL5 0x40015105u\r
-#define CYDEV_IDMUX_IRQ_CTL6 0x40015106u\r
-#define CYDEV_IDMUX_IRQ_CTL7 0x40015107u\r
-#define CYDEV_IDMUX_DRQ_CTL0 0x40015110u\r
-#define CYDEV_IDMUX_DRQ_CTL1 0x40015111u\r
-#define CYDEV_IDMUX_DRQ_CTL2 0x40015112u\r
-#define CYDEV_IDMUX_DRQ_CTL3 0x40015113u\r
-#define CYDEV_IDMUX_DRQ_CTL4 0x40015114u\r
-#define CYDEV_IDMUX_DRQ_CTL5 0x40015115u\r
-#define CYDEV_CACHERAM_BASE 0x40030000u\r
-#define CYDEV_CACHERAM_SIZE 0x00000400u\r
-#define CYDEV_CACHERAM_DATA_MBASE 0x40030000u\r
-#define CYDEV_CACHERAM_DATA_MSIZE 0x00000400u\r
-#define CYDEV_SFR_BASE 0x40050100u\r
-#define CYDEV_SFR_SIZE 0x000000fbu\r
-#define CYDEV_SFR_GPIO0 0x40050180u\r
-#define CYDEV_SFR_GPIRD0 0x40050189u\r
-#define CYDEV_SFR_GPIO0_SEL 0x4005018au\r
-#define CYDEV_SFR_GPIO1 0x40050190u\r
-#define CYDEV_SFR_GPIRD1 0x40050191u\r
-#define CYDEV_SFR_GPIO2 0x40050198u\r
-#define CYDEV_SFR_GPIRD2 0x40050199u\r
-#define CYDEV_SFR_GPIO2_SEL 0x4005019au\r
-#define CYDEV_SFR_GPIO1_SEL 0x400501a2u\r
-#define CYDEV_SFR_GPIO3 0x400501b0u\r
-#define CYDEV_SFR_GPIRD3 0x400501b1u\r
-#define CYDEV_SFR_GPIO3_SEL 0x400501b2u\r
-#define CYDEV_SFR_GPIO4 0x400501c0u\r
-#define CYDEV_SFR_GPIRD4 0x400501c1u\r
-#define CYDEV_SFR_GPIO4_SEL 0x400501c2u\r
-#define CYDEV_SFR_GPIO5 0x400501c8u\r
-#define CYDEV_SFR_GPIRD5 0x400501c9u\r
-#define CYDEV_SFR_GPIO5_SEL 0x400501cau\r
-#define CYDEV_SFR_GPIO6 0x400501d8u\r
-#define CYDEV_SFR_GPIRD6 0x400501d9u\r
-#define CYDEV_SFR_GPIO6_SEL 0x400501dau\r
-#define CYDEV_SFR_GPIO12 0x400501e8u\r
-#define CYDEV_SFR_GPIRD12 0x400501e9u\r
-#define CYDEV_SFR_GPIO12_SEL 0x400501f2u\r
-#define CYDEV_SFR_GPIO15 0x400501f8u\r
-#define CYDEV_SFR_GPIRD15 0x400501f9u\r
-#define CYDEV_SFR_GPIO15_SEL 0x400501fau\r
-#define CYDEV_P3BA_BASE 0x40050300u\r
-#define CYDEV_P3BA_SIZE 0x0000002bu\r
-#define CYDEV_P3BA_Y_START 0x40050300u\r
-#define CYDEV_P3BA_YROLL 0x40050301u\r
-#define CYDEV_P3BA_YCFG 0x40050302u\r
-#define CYDEV_P3BA_X_START1 0x40050303u\r
-#define CYDEV_P3BA_X_START2 0x40050304u\r
-#define CYDEV_P3BA_XROLL1 0x40050305u\r
-#define CYDEV_P3BA_XROLL2 0x40050306u\r
-#define CYDEV_P3BA_XINC 0x40050307u\r
-#define CYDEV_P3BA_XCFG 0x40050308u\r
-#define CYDEV_P3BA_OFFSETADDR1 0x40050309u\r
-#define CYDEV_P3BA_OFFSETADDR2 0x4005030au\r
-#define CYDEV_P3BA_OFFSETADDR3 0x4005030bu\r
-#define CYDEV_P3BA_ABSADDR1 0x4005030cu\r
-#define CYDEV_P3BA_ABSADDR2 0x4005030du\r
-#define CYDEV_P3BA_ABSADDR3 0x4005030eu\r
-#define CYDEV_P3BA_ABSADDR4 0x4005030fu\r
-#define CYDEV_P3BA_DATCFG1 0x40050310u\r
-#define CYDEV_P3BA_DATCFG2 0x40050311u\r
-#define CYDEV_P3BA_CMP_RSLT1 0x40050314u\r
-#define CYDEV_P3BA_CMP_RSLT2 0x40050315u\r
-#define CYDEV_P3BA_CMP_RSLT3 0x40050316u\r
-#define CYDEV_P3BA_CMP_RSLT4 0x40050317u\r
-#define CYDEV_P3BA_DATA_REG1 0x40050318u\r
-#define CYDEV_P3BA_DATA_REG2 0x40050319u\r
-#define CYDEV_P3BA_DATA_REG3 0x4005031au\r
-#define CYDEV_P3BA_DATA_REG4 0x4005031bu\r
-#define CYDEV_P3BA_EXP_DATA1 0x4005031cu\r
-#define CYDEV_P3BA_EXP_DATA2 0x4005031du\r
-#define CYDEV_P3BA_EXP_DATA3 0x4005031eu\r
-#define CYDEV_P3BA_EXP_DATA4 0x4005031fu\r
-#define CYDEV_P3BA_MSTR_HRDATA1 0x40050320u\r
-#define CYDEV_P3BA_MSTR_HRDATA2 0x40050321u\r
-#define CYDEV_P3BA_MSTR_HRDATA3 0x40050322u\r
-#define CYDEV_P3BA_MSTR_HRDATA4 0x40050323u\r
-#define CYDEV_P3BA_BIST_EN 0x40050324u\r
-#define CYDEV_P3BA_PHUB_MASTER_SSR 0x40050325u\r
-#define CYDEV_P3BA_SEQCFG1 0x40050326u\r
-#define CYDEV_P3BA_SEQCFG2 0x40050327u\r
-#define CYDEV_P3BA_Y_CURR 0x40050328u\r
-#define CYDEV_P3BA_X_CURR1 0x40050329u\r
-#define CYDEV_P3BA_X_CURR2 0x4005032au\r
-#define CYDEV_PANTHER_BASE 0x40080000u\r
-#define CYDEV_PANTHER_SIZE 0x00000020u\r
-#define CYDEV_PANTHER_STCALIB_CFG 0x40080000u\r
-#define CYDEV_PANTHER_WAITPIPE 0x40080004u\r
-#define CYDEV_PANTHER_TRACE_CFG 0x40080008u\r
-#define CYDEV_PANTHER_DBG_CFG 0x4008000cu\r
-#define CYDEV_PANTHER_CM3_LCKRST_STAT 0x40080018u\r
-#define CYDEV_PANTHER_DEVICE_ID 0x4008001cu\r
-#define CYDEV_FLSECC_BASE 0x48000000u\r
-#define CYDEV_FLSECC_SIZE 0x00008000u\r
-#define CYDEV_FLSECC_DATA_MBASE 0x48000000u\r
-#define CYDEV_FLSECC_DATA_MSIZE 0x00008000u\r
-#define CYDEV_FLSHID_BASE 0x49000000u\r
-#define CYDEV_FLSHID_SIZE 0x00000200u\r
-#define CYDEV_FLSHID_RSVD_MBASE 0x49000000u\r
-#define CYDEV_FLSHID_RSVD_MSIZE 0x00000080u\r
-#define CYDEV_FLSHID_CUST_MDATA_MBASE 0x49000080u\r
-#define CYDEV_FLSHID_CUST_MDATA_MSIZE 0x00000080u\r
-#define CYDEV_FLSHID_CUST_TABLES_BASE 0x49000100u\r
-#define CYDEV_FLSHID_CUST_TABLES_SIZE 0x00000040u\r
-#define CYDEV_FLSHID_CUST_TABLES_Y_LOC 0x49000100u\r
-#define CYDEV_FLSHID_CUST_TABLES_X_LOC 0x49000101u\r
-#define CYDEV_FLSHID_CUST_TABLES_WAFER_NUM 0x49000102u\r
-#define CYDEV_FLSHID_CUST_TABLES_LOT_LSB 0x49000103u\r
-#define CYDEV_FLSHID_CUST_TABLES_LOT_MSB 0x49000104u\r
-#define CYDEV_FLSHID_CUST_TABLES_WRK_WK 0x49000105u\r
-#define CYDEV_FLSHID_CUST_TABLES_FAB_YR 0x49000106u\r
-#define CYDEV_FLSHID_CUST_TABLES_MINOR 0x49000107u\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ 0x49000108u\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ 0x49000109u\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ 0x4900010au\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ 0x4900010bu\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ 0x4900010cu\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ 0x4900010du\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ 0x4900010eu\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_USB 0x4900010fu\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS 0x49000110u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS 0x49000111u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS 0x49000112u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS 0x49000113u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS 0x49000114u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS 0x49000115u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS 0x49000116u\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS 0x49000117u\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M1 0x49000118u\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M2 0x49000119u\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M3 0x4900011au\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M4 0x4900011bu\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M5 0x4900011cu\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M6 0x4900011du\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M7 0x4900011eu\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M8 0x4900011fu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M1 0x49000120u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M2 0x49000121u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M3 0x49000122u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M4 0x49000123u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M5 0x49000124u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M6 0x49000125u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M7 0x49000126u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M8 0x49000127u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M1 0x49000128u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M2 0x49000129u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M3 0x4900012au\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M4 0x4900012bu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M5 0x4900012cu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M6 0x4900012du\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M7 0x4900012eu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M8 0x4900012fu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M1 0x49000130u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M2 0x49000131u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M3 0x49000132u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M4 0x49000133u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M5 0x49000134u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M6 0x49000135u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M7 0x49000136u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M8 0x49000137u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M1 0x49000138u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M2 0x49000139u\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M3 0x4900013au\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M4 0x4900013bu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M5 0x4900013cu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M6 0x4900013du\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M7 0x4900013eu\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M8 0x4900013fu\r
-#define CYDEV_FLSHID_MFG_CFG_BASE 0x49000180u\r
-#define CYDEV_FLSHID_MFG_CFG_SIZE 0x00000080u\r
-#define CYDEV_FLSHID_MFG_CFG_IMO_TR1 0x49000188u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP0_TR0 0x490001acu\r
-#define CYDEV_FLSHID_MFG_CFG_CMP1_TR0 0x490001aeu\r
-#define CYDEV_FLSHID_MFG_CFG_CMP2_TR0 0x490001b0u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP3_TR0 0x490001b2u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP0_TR1 0x490001b4u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP1_TR1 0x490001b6u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP2_TR1 0x490001b8u\r
-#define CYDEV_FLSHID_MFG_CFG_CMP3_TR1 0x490001bau\r
-#define CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM 0x490001ceu\r
-#define CYDEV_EXTMEM_BASE 0x60000000u\r
-#define CYDEV_EXTMEM_SIZE 0x00800000u\r
-#define CYDEV_EXTMEM_DATA_MBASE 0x60000000u\r
-#define CYDEV_EXTMEM_DATA_MSIZE 0x00800000u\r
-#define CYDEV_ITM_BASE 0xe0000000u\r
-#define CYDEV_ITM_SIZE 0x00001000u\r
-#define CYDEV_ITM_TRACE_EN 0xe0000e00u\r
-#define CYDEV_ITM_TRACE_PRIVILEGE 0xe0000e40u\r
-#define CYDEV_ITM_TRACE_CTRL 0xe0000e80u\r
-#define CYDEV_ITM_LOCK_ACCESS 0xe0000fb0u\r
-#define CYDEV_ITM_LOCK_STATUS 0xe0000fb4u\r
-#define CYDEV_ITM_PID4 0xe0000fd0u\r
-#define CYDEV_ITM_PID5 0xe0000fd4u\r
-#define CYDEV_ITM_PID6 0xe0000fd8u\r
-#define CYDEV_ITM_PID7 0xe0000fdcu\r
-#define CYDEV_ITM_PID0 0xe0000fe0u\r
-#define CYDEV_ITM_PID1 0xe0000fe4u\r
-#define CYDEV_ITM_PID2 0xe0000fe8u\r
-#define CYDEV_ITM_PID3 0xe0000fecu\r
-#define CYDEV_ITM_CID0 0xe0000ff0u\r
-#define CYDEV_ITM_CID1 0xe0000ff4u\r
-#define CYDEV_ITM_CID2 0xe0000ff8u\r
-#define CYDEV_ITM_CID3 0xe0000ffcu\r
-#define CYDEV_DWT_BASE 0xe0001000u\r
-#define CYDEV_DWT_SIZE 0x0000005cu\r
-#define CYDEV_DWT_CTRL 0xe0001000u\r
-#define CYDEV_DWT_CYCLE_COUNT 0xe0001004u\r
-#define CYDEV_DWT_CPI_COUNT 0xe0001008u\r
-#define CYDEV_DWT_EXC_OVHD_COUNT 0xe000100cu\r
-#define CYDEV_DWT_SLEEP_COUNT 0xe0001010u\r
-#define CYDEV_DWT_LSU_COUNT 0xe0001014u\r
-#define CYDEV_DWT_FOLD_COUNT 0xe0001018u\r
-#define CYDEV_DWT_PC_SAMPLE 0xe000101cu\r
-#define CYDEV_DWT_COMP_0 0xe0001020u\r
-#define CYDEV_DWT_MASK_0 0xe0001024u\r
-#define CYDEV_DWT_FUNCTION_0 0xe0001028u\r
-#define CYDEV_DWT_COMP_1 0xe0001030u\r
-#define CYDEV_DWT_MASK_1 0xe0001034u\r
-#define CYDEV_DWT_FUNCTION_1 0xe0001038u\r
-#define CYDEV_DWT_COMP_2 0xe0001040u\r
-#define CYDEV_DWT_MASK_2 0xe0001044u\r
-#define CYDEV_DWT_FUNCTION_2 0xe0001048u\r
-#define CYDEV_DWT_COMP_3 0xe0001050u\r
-#define CYDEV_DWT_MASK_3 0xe0001054u\r
-#define CYDEV_DWT_FUNCTION_3 0xe0001058u\r
-#define CYDEV_FPB_BASE 0xe0002000u\r
-#define CYDEV_FPB_SIZE 0x00001000u\r
-#define CYDEV_FPB_CTRL 0xe0002000u\r
-#define CYDEV_FPB_REMAP 0xe0002004u\r
-#define CYDEV_FPB_FP_COMP_0 0xe0002008u\r
-#define CYDEV_FPB_FP_COMP_1 0xe000200cu\r
-#define CYDEV_FPB_FP_COMP_2 0xe0002010u\r
-#define CYDEV_FPB_FP_COMP_3 0xe0002014u\r
-#define CYDEV_FPB_FP_COMP_4 0xe0002018u\r
-#define CYDEV_FPB_FP_COMP_5 0xe000201cu\r
-#define CYDEV_FPB_FP_COMP_6 0xe0002020u\r
-#define CYDEV_FPB_FP_COMP_7 0xe0002024u\r
-#define CYDEV_FPB_PID4 0xe0002fd0u\r
-#define CYDEV_FPB_PID5 0xe0002fd4u\r
-#define CYDEV_FPB_PID6 0xe0002fd8u\r
-#define CYDEV_FPB_PID7 0xe0002fdcu\r
-#define CYDEV_FPB_PID0 0xe0002fe0u\r
-#define CYDEV_FPB_PID1 0xe0002fe4u\r
-#define CYDEV_FPB_PID2 0xe0002fe8u\r
-#define CYDEV_FPB_PID3 0xe0002fecu\r
-#define CYDEV_FPB_CID0 0xe0002ff0u\r
-#define CYDEV_FPB_CID1 0xe0002ff4u\r
-#define CYDEV_FPB_CID2 0xe0002ff8u\r
-#define CYDEV_FPB_CID3 0xe0002ffcu\r
-#define CYDEV_NVIC_BASE 0xe000e000u\r
-#define CYDEV_NVIC_SIZE 0x00000d3cu\r
-#define CYDEV_NVIC_INT_CTL_TYPE 0xe000e004u\r
-#define CYDEV_NVIC_SYSTICK_CTL 0xe000e010u\r
-#define CYDEV_NVIC_SYSTICK_RELOAD 0xe000e014u\r
-#define CYDEV_NVIC_SYSTICK_CURRENT 0xe000e018u\r
-#define CYDEV_NVIC_SYSTICK_CAL 0xe000e01cu\r
-#define CYDEV_NVIC_SETENA0 0xe000e100u\r
-#define CYDEV_NVIC_CLRENA0 0xe000e180u\r
-#define CYDEV_NVIC_SETPEND0 0xe000e200u\r
-#define CYDEV_NVIC_CLRPEND0 0xe000e280u\r
-#define CYDEV_NVIC_ACTIVE0 0xe000e300u\r
-#define CYDEV_NVIC_PRI_0 0xe000e400u\r
-#define CYDEV_NVIC_PRI_1 0xe000e401u\r
-#define CYDEV_NVIC_PRI_2 0xe000e402u\r
-#define CYDEV_NVIC_PRI_3 0xe000e403u\r
-#define CYDEV_NVIC_PRI_4 0xe000e404u\r
-#define CYDEV_NVIC_PRI_5 0xe000e405u\r
-#define CYDEV_NVIC_PRI_6 0xe000e406u\r
-#define CYDEV_NVIC_PRI_7 0xe000e407u\r
-#define CYDEV_NVIC_PRI_8 0xe000e408u\r
-#define CYDEV_NVIC_PRI_9 0xe000e409u\r
-#define CYDEV_NVIC_PRI_10 0xe000e40au\r
-#define CYDEV_NVIC_PRI_11 0xe000e40bu\r
-#define CYDEV_NVIC_PRI_12 0xe000e40cu\r
-#define CYDEV_NVIC_PRI_13 0xe000e40du\r
-#define CYDEV_NVIC_PRI_14 0xe000e40eu\r
-#define CYDEV_NVIC_PRI_15 0xe000e40fu\r
-#define CYDEV_NVIC_PRI_16 0xe000e410u\r
-#define CYDEV_NVIC_PRI_17 0xe000e411u\r
-#define CYDEV_NVIC_PRI_18 0xe000e412u\r
-#define CYDEV_NVIC_PRI_19 0xe000e413u\r
-#define CYDEV_NVIC_PRI_20 0xe000e414u\r
-#define CYDEV_NVIC_PRI_21 0xe000e415u\r
-#define CYDEV_NVIC_PRI_22 0xe000e416u\r
-#define CYDEV_NVIC_PRI_23 0xe000e417u\r
-#define CYDEV_NVIC_PRI_24 0xe000e418u\r
-#define CYDEV_NVIC_PRI_25 0xe000e419u\r
-#define CYDEV_NVIC_PRI_26 0xe000e41au\r
-#define CYDEV_NVIC_PRI_27 0xe000e41bu\r
-#define CYDEV_NVIC_PRI_28 0xe000e41cu\r
-#define CYDEV_NVIC_PRI_29 0xe000e41du\r
-#define CYDEV_NVIC_PRI_30 0xe000e41eu\r
-#define CYDEV_NVIC_PRI_31 0xe000e41fu\r
-#define CYDEV_NVIC_CPUID_BASE 0xe000ed00u\r
-#define CYDEV_NVIC_INTR_CTRL_STATE 0xe000ed04u\r
-#define CYDEV_NVIC_VECT_OFFSET 0xe000ed08u\r
-#define CYDEV_NVIC_APPLN_INTR 0xe000ed0cu\r
-#define CYDEV_NVIC_SYSTEM_CONTROL 0xe000ed10u\r
-#define CYDEV_NVIC_CFG_CONTROL 0xe000ed14u\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_4_7 0xe000ed18u\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_8_11 0xe000ed1cu\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_12_15 0xe000ed20u\r
-#define CYDEV_NVIC_SYS_HANDLER_CSR 0xe000ed24u\r
-#define CYDEV_NVIC_MEMMAN_FAULT_STATUS 0xe000ed28u\r
-#define CYDEV_NVIC_BUS_FAULT_STATUS 0xe000ed29u\r
-#define CYDEV_NVIC_USAGE_FAULT_STATUS 0xe000ed2au\r
-#define CYDEV_NVIC_HARD_FAULT_STATUS 0xe000ed2cu\r
-#define CYDEV_NVIC_DEBUG_FAULT_STATUS 0xe000ed30u\r
-#define CYDEV_NVIC_MEMMAN_FAULT_ADD 0xe000ed34u\r
-#define CYDEV_NVIC_BUS_FAULT_ADD 0xe000ed38u\r
-#define CYDEV_CORE_DBG_BASE 0xe000edf0u\r
-#define CYDEV_CORE_DBG_SIZE 0x00000010u\r
-#define CYDEV_CORE_DBG_DBG_HLT_CS 0xe000edf0u\r
-#define CYDEV_CORE_DBG_DBG_REG_SEL 0xe000edf4u\r
-#define CYDEV_CORE_DBG_DBG_REG_DATA 0xe000edf8u\r
-#define CYDEV_CORE_DBG_EXC_MON_CTL 0xe000edfcu\r
-#define CYDEV_TPIU_BASE 0xe0040000u\r
-#define CYDEV_TPIU_SIZE 0x00001000u\r
-#define CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ 0xe0040000u\r
-#define CYDEV_TPIU_CURRENT_SYNC_PRT_SZ 0xe0040004u\r
-#define CYDEV_TPIU_ASYNC_CLK_PRESCALER 0xe0040010u\r
-#define CYDEV_TPIU_PROTOCOL 0xe00400f0u\r
-#define CYDEV_TPIU_FORM_FLUSH_STAT 0xe0040300u\r
-#define CYDEV_TPIU_FORM_FLUSH_CTRL 0xe0040304u\r
-#define CYDEV_TPIU_TRIGGER 0xe0040ee8u\r
-#define CYDEV_TPIU_ITETMDATA 0xe0040eecu\r
-#define CYDEV_TPIU_ITATBCTR2 0xe0040ef0u\r
-#define CYDEV_TPIU_ITATBCTR0 0xe0040ef8u\r
-#define CYDEV_TPIU_ITITMDATA 0xe0040efcu\r
-#define CYDEV_TPIU_ITCTRL 0xe0040f00u\r
-#define CYDEV_TPIU_DEVID 0xe0040fc8u\r
-#define CYDEV_TPIU_DEVTYPE 0xe0040fccu\r
-#define CYDEV_TPIU_PID4 0xe0040fd0u\r
-#define CYDEV_TPIU_PID5 0xe0040fd4u\r
-#define CYDEV_TPIU_PID6 0xe0040fd8u\r
-#define CYDEV_TPIU_PID7 0xe0040fdcu\r
-#define CYDEV_TPIU_PID0 0xe0040fe0u\r
-#define CYDEV_TPIU_PID1 0xe0040fe4u\r
-#define CYDEV_TPIU_PID2 0xe0040fe8u\r
-#define CYDEV_TPIU_PID3 0xe0040fecu\r
-#define CYDEV_TPIU_CID0 0xe0040ff0u\r
-#define CYDEV_TPIU_CID1 0xe0040ff4u\r
-#define CYDEV_TPIU_CID2 0xe0040ff8u\r
-#define CYDEV_TPIU_CID3 0xe0040ffcu\r
-#define CYDEV_ETM_BASE 0xe0041000u\r
-#define CYDEV_ETM_SIZE 0x00001000u\r
-#define CYDEV_ETM_CTL 0xe0041000u\r
-#define CYDEV_ETM_CFG_CODE 0xe0041004u\r
-#define CYDEV_ETM_TRIG_EVENT 0xe0041008u\r
-#define CYDEV_ETM_STATUS 0xe0041010u\r
-#define CYDEV_ETM_SYS_CFG 0xe0041014u\r
-#define CYDEV_ETM_TRACE_ENB_EVENT 0xe0041020u\r
-#define CYDEV_ETM_TRACE_EN_CTRL1 0xe0041024u\r
-#define CYDEV_ETM_FIFOFULL_LEVEL 0xe004102cu\r
-#define CYDEV_ETM_SYNC_FREQ 0xe00411e0u\r
-#define CYDEV_ETM_ETM_ID 0xe00411e4u\r
-#define CYDEV_ETM_CFG_CODE_EXT 0xe00411e8u\r
-#define CYDEV_ETM_TR_SS_EMBICE_CTRL 0xe00411f0u\r
-#define CYDEV_ETM_CS_TRACE_ID 0xe0041200u\r
-#define CYDEV_ETM_OS_LOCK_ACCESS 0xe0041300u\r
-#define CYDEV_ETM_OS_LOCK_STATUS 0xe0041304u\r
-#define CYDEV_ETM_PDSR 0xe0041314u\r
-#define CYDEV_ETM_ITMISCIN 0xe0041ee0u\r
-#define CYDEV_ETM_ITTRIGOUT 0xe0041ee8u\r
-#define CYDEV_ETM_ITATBCTR2 0xe0041ef0u\r
-#define CYDEV_ETM_ITATBCTR0 0xe0041ef8u\r
-#define CYDEV_ETM_INT_MODE_CTRL 0xe0041f00u\r
-#define CYDEV_ETM_CLM_TAG_SET 0xe0041fa0u\r
-#define CYDEV_ETM_CLM_TAG_CLR 0xe0041fa4u\r
-#define CYDEV_ETM_LOCK_ACCESS 0xe0041fb0u\r
-#define CYDEV_ETM_LOCK_STATUS 0xe0041fb4u\r
-#define CYDEV_ETM_AUTH_STATUS 0xe0041fb8u\r
-#define CYDEV_ETM_DEV_TYPE 0xe0041fccu\r
-#define CYDEV_ETM_PID4 0xe0041fd0u\r
-#define CYDEV_ETM_PID5 0xe0041fd4u\r
-#define CYDEV_ETM_PID6 0xe0041fd8u\r
-#define CYDEV_ETM_PID7 0xe0041fdcu\r
-#define CYDEV_ETM_PID0 0xe0041fe0u\r
-#define CYDEV_ETM_PID1 0xe0041fe4u\r
-#define CYDEV_ETM_PID2 0xe0041fe8u\r
-#define CYDEV_ETM_PID3 0xe0041fecu\r
-#define CYDEV_ETM_CID0 0xe0041ff0u\r
-#define CYDEV_ETM_CID1 0xe0041ff4u\r
-#define CYDEV_ETM_CID2 0xe0041ff8u\r
-#define CYDEV_ETM_CID3 0xe0041ffcu\r
-#define CYDEV_ROM_TABLE_BASE 0xe00ff000u\r
-#define CYDEV_ROM_TABLE_SIZE 0x00001000u\r
-#define CYDEV_ROM_TABLE_NVIC 0xe00ff000u\r
-#define CYDEV_ROM_TABLE_DWT 0xe00ff004u\r
-#define CYDEV_ROM_TABLE_FPB 0xe00ff008u\r
-#define CYDEV_ROM_TABLE_ITM 0xe00ff00cu\r
-#define CYDEV_ROM_TABLE_TPIU 0xe00ff010u\r
-#define CYDEV_ROM_TABLE_ETM 0xe00ff014u\r
-#define CYDEV_ROM_TABLE_END 0xe00ff018u\r
-#define CYDEV_ROM_TABLE_MEMTYPE 0xe00fffccu\r
-#define CYDEV_ROM_TABLE_PID4 0xe00fffd0u\r
-#define CYDEV_ROM_TABLE_PID5 0xe00fffd4u\r
-#define CYDEV_ROM_TABLE_PID6 0xe00fffd8u\r
-#define CYDEV_ROM_TABLE_PID7 0xe00fffdcu\r
-#define CYDEV_ROM_TABLE_PID0 0xe00fffe0u\r
-#define CYDEV_ROM_TABLE_PID1 0xe00fffe4u\r
-#define CYDEV_ROM_TABLE_PID2 0xe00fffe8u\r
-#define CYDEV_ROM_TABLE_PID3 0xe00fffecu\r
-#define CYDEV_ROM_TABLE_CID0 0xe00ffff0u\r
-#define CYDEV_ROM_TABLE_CID1 0xe00ffff4u\r
-#define CYDEV_ROM_TABLE_CID2 0xe00ffff8u\r
-#define CYDEV_ROM_TABLE_CID3 0xe00ffffcu\r
-#define CYDEV_FLS_SIZE CYDEV_FLASH_SIZE\r
-#define CYDEV_ECC_BASE CYDEV_FLSECC_BASE\r
-#define CYDEV_FLS_SECTOR_SIZE 0x00010000u\r
-#define CYDEV_FLS_ROW_SIZE 0x00000100u\r
-#define CYDEV_ECC_SECTOR_SIZE 0x00002000u\r
-#define CYDEV_ECC_ROW_SIZE 0x00000020u\r
-#define CYDEV_EEPROM_SECTOR_SIZE 0x00000400u\r
-#define CYDEV_EEPROM_ROW_SIZE 0x00000010u\r
-#define CYDEV_PERIPH_BASE CYDEV_CLKDIST_BASE\r
-#define CYCLK_LD_DISABLE 0x00000004u\r
-#define CYCLK_LD_SYNC_EN 0x00000002u\r
-#define CYCLK_LD_LOAD 0x00000001u\r
-#define CYCLK_PIPE 0x00000080u\r
-#define CYCLK_SSS 0x00000040u\r
-#define CYCLK_EARLY 0x00000020u\r
-#define CYCLK_DUTY 0x00000010u\r
-#define CYCLK_SYNC 0x00000008u\r
-#define CYCLK_SRC_SEL_CLK_SYNC_D 0\r
-#define CYCLK_SRC_SEL_SYNC_DIG 0\r
-#define CYCLK_SRC_SEL_IMO 1\r
-#define CYCLK_SRC_SEL_XTAL_MHZ 2\r
-#define CYCLK_SRC_SEL_XTALM 2\r
-#define CYCLK_SRC_SEL_ILO 3\r
-#define CYCLK_SRC_SEL_PLL 4\r
-#define CYCLK_SRC_SEL_XTAL_KHZ 5\r
-#define CYCLK_SRC_SEL_XTALK 5\r
-#define CYCLK_SRC_SEL_DSI_G 6\r
-#define CYCLK_SRC_SEL_DSI_D 7\r
-#define CYCLK_SRC_SEL_CLK_SYNC_A 0\r
-#define CYCLK_SRC_SEL_DSI_A 7\r
-#endif /* CYDEVICE_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice_trm.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice_trm.h
deleted file mode 100755 (executable)
index e2c0687..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevice_trm.h
+++ /dev/null
@@ -1,5360 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cydevice_trm.h\r
-* \r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* DESCRIPTION:\r
-* This file provides all of the address values for the entire PSoC device.\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-#if !defined(CYDEVICE_TRM_H)\r
-#define CYDEVICE_TRM_H\r
-#define CYDEV_FLASH_BASE 0x00000000u\r
-#define CYDEV_FLASH_SIZE 0x00020000u\r
-#define CYREG_FLASH_DATA_MBASE 0x00000000u\r
-#define CYREG_FLASH_DATA_MSIZE 0x00020000u\r
-#define CYDEV_SRAM_BASE 0x1fffc000u\r
-#define CYDEV_SRAM_SIZE 0x00008000u\r
-#define CYREG_SRAM_CODE64K_MBASE 0x1fff8000u\r
-#define CYREG_SRAM_CODE64K_MSIZE 0x00004000u\r
-#define CYREG_SRAM_CODE32K_MBASE 0x1fffc000u\r
-#define CYREG_SRAM_CODE32K_MSIZE 0x00002000u\r
-#define CYREG_SRAM_CODE16K_MBASE 0x1fffe000u\r
-#define CYREG_SRAM_CODE16K_MSIZE 0x00001000u\r
-#define CYREG_SRAM_CODE_MBASE 0x1fffc000u\r
-#define CYREG_SRAM_CODE_MSIZE 0x00004000u\r
-#define CYREG_SRAM_DATA_MBASE 0x20000000u\r
-#define CYREG_SRAM_DATA_MSIZE 0x00004000u\r
-#define CYREG_SRAM_DATA16K_MBASE 0x20001000u\r
-#define CYREG_SRAM_DATA16K_MSIZE 0x00001000u\r
-#define CYREG_SRAM_DATA32K_MBASE 0x20002000u\r
-#define CYREG_SRAM_DATA32K_MSIZE 0x00002000u\r
-#define CYREG_SRAM_DATA64K_MBASE 0x20004000u\r
-#define CYREG_SRAM_DATA64K_MSIZE 0x00004000u\r
-#define CYDEV_DMA_BASE 0x20008000u\r
-#define CYDEV_DMA_SIZE 0x00008000u\r
-#define CYREG_DMA_SRAM64K_MBASE 0x20008000u\r
-#define CYREG_DMA_SRAM64K_MSIZE 0x00004000u\r
-#define CYREG_DMA_SRAM32K_MBASE 0x2000c000u\r
-#define CYREG_DMA_SRAM32K_MSIZE 0x00002000u\r
-#define CYREG_DMA_SRAM16K_MBASE 0x2000e000u\r
-#define CYREG_DMA_SRAM16K_MSIZE 0x00001000u\r
-#define CYREG_DMA_SRAM_MBASE 0x2000f000u\r
-#define CYREG_DMA_SRAM_MSIZE 0x00001000u\r
-#define CYDEV_CLKDIST_BASE 0x40004000u\r
-#define CYDEV_CLKDIST_SIZE 0x00000110u\r
-#define CYREG_CLKDIST_CR 0x40004000u\r
-#define CYREG_CLKDIST_LD 0x40004001u\r
-#define CYREG_CLKDIST_WRK0 0x40004002u\r
-#define CYREG_CLKDIST_WRK1 0x40004003u\r
-#define CYREG_CLKDIST_MSTR0 0x40004004u\r
-#define CYREG_CLKDIST_MSTR1 0x40004005u\r
-#define CYREG_CLKDIST_BCFG0 0x40004006u\r
-#define CYREG_CLKDIST_BCFG1 0x40004007u\r
-#define CYREG_CLKDIST_BCFG2 0x40004008u\r
-#define CYREG_CLKDIST_UCFG 0x40004009u\r
-#define CYREG_CLKDIST_DLY0 0x4000400au\r
-#define CYREG_CLKDIST_DLY1 0x4000400bu\r
-#define CYREG_CLKDIST_DMASK 0x40004010u\r
-#define CYREG_CLKDIST_AMASK 0x40004014u\r
-#define CYDEV_CLKDIST_DCFG0_BASE 0x40004080u\r
-#define CYDEV_CLKDIST_DCFG0_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG0_CFG0 0x40004080u\r
-#define CYREG_CLKDIST_DCFG0_CFG1 0x40004081u\r
-#define CYREG_CLKDIST_DCFG0_CFG2 0x40004082u\r
-#define CYDEV_CLKDIST_DCFG1_BASE 0x40004084u\r
-#define CYDEV_CLKDIST_DCFG1_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG1_CFG0 0x40004084u\r
-#define CYREG_CLKDIST_DCFG1_CFG1 0x40004085u\r
-#define CYREG_CLKDIST_DCFG1_CFG2 0x40004086u\r
-#define CYDEV_CLKDIST_DCFG2_BASE 0x40004088u\r
-#define CYDEV_CLKDIST_DCFG2_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG2_CFG0 0x40004088u\r
-#define CYREG_CLKDIST_DCFG2_CFG1 0x40004089u\r
-#define CYREG_CLKDIST_DCFG2_CFG2 0x4000408au\r
-#define CYDEV_CLKDIST_DCFG3_BASE 0x4000408cu\r
-#define CYDEV_CLKDIST_DCFG3_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG3_CFG0 0x4000408cu\r
-#define CYREG_CLKDIST_DCFG3_CFG1 0x4000408du\r
-#define CYREG_CLKDIST_DCFG3_CFG2 0x4000408eu\r
-#define CYDEV_CLKDIST_DCFG4_BASE 0x40004090u\r
-#define CYDEV_CLKDIST_DCFG4_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG4_CFG0 0x40004090u\r
-#define CYREG_CLKDIST_DCFG4_CFG1 0x40004091u\r
-#define CYREG_CLKDIST_DCFG4_CFG2 0x40004092u\r
-#define CYDEV_CLKDIST_DCFG5_BASE 0x40004094u\r
-#define CYDEV_CLKDIST_DCFG5_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG5_CFG0 0x40004094u\r
-#define CYREG_CLKDIST_DCFG5_CFG1 0x40004095u\r
-#define CYREG_CLKDIST_DCFG5_CFG2 0x40004096u\r
-#define CYDEV_CLKDIST_DCFG6_BASE 0x40004098u\r
-#define CYDEV_CLKDIST_DCFG6_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG6_CFG0 0x40004098u\r
-#define CYREG_CLKDIST_DCFG6_CFG1 0x40004099u\r
-#define CYREG_CLKDIST_DCFG6_CFG2 0x4000409au\r
-#define CYDEV_CLKDIST_DCFG7_BASE 0x4000409cu\r
-#define CYDEV_CLKDIST_DCFG7_SIZE 0x00000003u\r
-#define CYREG_CLKDIST_DCFG7_CFG0 0x4000409cu\r
-#define CYREG_CLKDIST_DCFG7_CFG1 0x4000409du\r
-#define CYREG_CLKDIST_DCFG7_CFG2 0x4000409eu\r
-#define CYDEV_CLKDIST_ACFG0_BASE 0x40004100u\r
-#define CYDEV_CLKDIST_ACFG0_SIZE 0x00000004u\r
-#define CYREG_CLKDIST_ACFG0_CFG0 0x40004100u\r
-#define CYREG_CLKDIST_ACFG0_CFG1 0x40004101u\r
-#define CYREG_CLKDIST_ACFG0_CFG2 0x40004102u\r
-#define CYREG_CLKDIST_ACFG0_CFG3 0x40004103u\r
-#define CYDEV_CLKDIST_ACFG1_BASE 0x40004104u\r
-#define CYDEV_CLKDIST_ACFG1_SIZE 0x00000004u\r
-#define CYREG_CLKDIST_ACFG1_CFG0 0x40004104u\r
-#define CYREG_CLKDIST_ACFG1_CFG1 0x40004105u\r
-#define CYREG_CLKDIST_ACFG1_CFG2 0x40004106u\r
-#define CYREG_CLKDIST_ACFG1_CFG3 0x40004107u\r
-#define CYDEV_CLKDIST_ACFG2_BASE 0x40004108u\r
-#define CYDEV_CLKDIST_ACFG2_SIZE 0x00000004u\r
-#define CYREG_CLKDIST_ACFG2_CFG0 0x40004108u\r
-#define CYREG_CLKDIST_ACFG2_CFG1 0x40004109u\r
-#define CYREG_CLKDIST_ACFG2_CFG2 0x4000410au\r
-#define CYREG_CLKDIST_ACFG2_CFG3 0x4000410bu\r
-#define CYDEV_CLKDIST_ACFG3_BASE 0x4000410cu\r
-#define CYDEV_CLKDIST_ACFG3_SIZE 0x00000004u\r
-#define CYREG_CLKDIST_ACFG3_CFG0 0x4000410cu\r
-#define CYREG_CLKDIST_ACFG3_CFG1 0x4000410du\r
-#define CYREG_CLKDIST_ACFG3_CFG2 0x4000410eu\r
-#define CYREG_CLKDIST_ACFG3_CFG3 0x4000410fu\r
-#define CYDEV_FASTCLK_BASE 0x40004200u\r
-#define CYDEV_FASTCLK_SIZE 0x00000026u\r
-#define CYDEV_FASTCLK_IMO_BASE 0x40004200u\r
-#define CYDEV_FASTCLK_IMO_SIZE 0x00000001u\r
-#define CYREG_FASTCLK_IMO_CR 0x40004200u\r
-#define CYDEV_FASTCLK_XMHZ_BASE 0x40004210u\r
-#define CYDEV_FASTCLK_XMHZ_SIZE 0x00000004u\r
-#define CYREG_FASTCLK_XMHZ_CSR 0x40004210u\r
-#define CYREG_FASTCLK_XMHZ_CFG0 0x40004212u\r
-#define CYREG_FASTCLK_XMHZ_CFG1 0x40004213u\r
-#define CYDEV_FASTCLK_PLL_BASE 0x40004220u\r
-#define CYDEV_FASTCLK_PLL_SIZE 0x00000006u\r
-#define CYREG_FASTCLK_PLL_CFG0 0x40004220u\r
-#define CYREG_FASTCLK_PLL_CFG1 0x40004221u\r
-#define CYREG_FASTCLK_PLL_P 0x40004222u\r
-#define CYREG_FASTCLK_PLL_Q 0x40004223u\r
-#define CYREG_FASTCLK_PLL_SR 0x40004225u\r
-#define CYDEV_SLOWCLK_BASE 0x40004300u\r
-#define CYDEV_SLOWCLK_SIZE 0x0000000bu\r
-#define CYDEV_SLOWCLK_ILO_BASE 0x40004300u\r
-#define CYDEV_SLOWCLK_ILO_SIZE 0x00000002u\r
-#define CYREG_SLOWCLK_ILO_CR0 0x40004300u\r
-#define CYREG_SLOWCLK_ILO_CR1 0x40004301u\r
-#define CYDEV_SLOWCLK_X32_BASE 0x40004308u\r
-#define CYDEV_SLOWCLK_X32_SIZE 0x00000003u\r
-#define CYREG_SLOWCLK_X32_CR 0x40004308u\r
-#define CYREG_SLOWCLK_X32_CFG 0x40004309u\r
-#define CYREG_SLOWCLK_X32_TST 0x4000430au\r
-#define CYDEV_BOOST_BASE 0x40004320u\r
-#define CYDEV_BOOST_SIZE 0x00000007u\r
-#define CYREG_BOOST_CR0 0x40004320u\r
-#define CYREG_BOOST_CR1 0x40004321u\r
-#define CYREG_BOOST_CR2 0x40004322u\r
-#define CYREG_BOOST_CR3 0x40004323u\r
-#define CYREG_BOOST_SR 0x40004324u\r
-#define CYREG_BOOST_CR4 0x40004325u\r
-#define CYREG_BOOST_SR2 0x40004326u\r
-#define CYDEV_PWRSYS_BASE 0x40004330u\r
-#define CYDEV_PWRSYS_SIZE 0x00000002u\r
-#define CYREG_PWRSYS_CR0 0x40004330u\r
-#define CYREG_PWRSYS_CR1 0x40004331u\r
-#define CYDEV_PM_BASE 0x40004380u\r
-#define CYDEV_PM_SIZE 0x00000057u\r
-#define CYREG_PM_TW_CFG0 0x40004380u\r
-#define CYREG_PM_TW_CFG1 0x40004381u\r
-#define CYREG_PM_TW_CFG2 0x40004382u\r
-#define CYREG_PM_WDT_CFG 0x40004383u\r
-#define CYREG_PM_WDT_CR 0x40004384u\r
-#define CYREG_PM_INT_SR 0x40004390u\r
-#define CYREG_PM_MODE_CFG0 0x40004391u\r
-#define CYREG_PM_MODE_CFG1 0x40004392u\r
-#define CYREG_PM_MODE_CSR 0x40004393u\r
-#define CYREG_PM_USB_CR0 0x40004394u\r
-#define CYREG_PM_WAKEUP_CFG0 0x40004398u\r
-#define CYREG_PM_WAKEUP_CFG1 0x40004399u\r
-#define CYREG_PM_WAKEUP_CFG2 0x4000439au\r
-#define CYDEV_PM_ACT_BASE 0x400043a0u\r
-#define CYDEV_PM_ACT_SIZE 0x0000000eu\r
-#define CYREG_PM_ACT_CFG0 0x400043a0u\r
-#define CYREG_PM_ACT_CFG1 0x400043a1u\r
-#define CYREG_PM_ACT_CFG2 0x400043a2u\r
-#define CYREG_PM_ACT_CFG3 0x400043a3u\r
-#define CYREG_PM_ACT_CFG4 0x400043a4u\r
-#define CYREG_PM_ACT_CFG5 0x400043a5u\r
-#define CYREG_PM_ACT_CFG6 0x400043a6u\r
-#define CYREG_PM_ACT_CFG7 0x400043a7u\r
-#define CYREG_PM_ACT_CFG8 0x400043a8u\r
-#define CYREG_PM_ACT_CFG9 0x400043a9u\r
-#define CYREG_PM_ACT_CFG10 0x400043aau\r
-#define CYREG_PM_ACT_CFG11 0x400043abu\r
-#define CYREG_PM_ACT_CFG12 0x400043acu\r
-#define CYREG_PM_ACT_CFG13 0x400043adu\r
-#define CYDEV_PM_STBY_BASE 0x400043b0u\r
-#define CYDEV_PM_STBY_SIZE 0x0000000eu\r
-#define CYREG_PM_STBY_CFG0 0x400043b0u\r
-#define CYREG_PM_STBY_CFG1 0x400043b1u\r
-#define CYREG_PM_STBY_CFG2 0x400043b2u\r
-#define CYREG_PM_STBY_CFG3 0x400043b3u\r
-#define CYREG_PM_STBY_CFG4 0x400043b4u\r
-#define CYREG_PM_STBY_CFG5 0x400043b5u\r
-#define CYREG_PM_STBY_CFG6 0x400043b6u\r
-#define CYREG_PM_STBY_CFG7 0x400043b7u\r
-#define CYREG_PM_STBY_CFG8 0x400043b8u\r
-#define CYREG_PM_STBY_CFG9 0x400043b9u\r
-#define CYREG_PM_STBY_CFG10 0x400043bau\r
-#define CYREG_PM_STBY_CFG11 0x400043bbu\r
-#define CYREG_PM_STBY_CFG12 0x400043bcu\r
-#define CYREG_PM_STBY_CFG13 0x400043bdu\r
-#define CYDEV_PM_AVAIL_BASE 0x400043c0u\r
-#define CYDEV_PM_AVAIL_SIZE 0x00000017u\r
-#define CYREG_PM_AVAIL_CR0 0x400043c0u\r
-#define CYREG_PM_AVAIL_CR1 0x400043c1u\r
-#define CYREG_PM_AVAIL_CR2 0x400043c2u\r
-#define CYREG_PM_AVAIL_CR3 0x400043c3u\r
-#define CYREG_PM_AVAIL_CR4 0x400043c4u\r
-#define CYREG_PM_AVAIL_CR5 0x400043c5u\r
-#define CYREG_PM_AVAIL_CR6 0x400043c6u\r
-#define CYREG_PM_AVAIL_SR0 0x400043d0u\r
-#define CYREG_PM_AVAIL_SR1 0x400043d1u\r
-#define CYREG_PM_AVAIL_SR2 0x400043d2u\r
-#define CYREG_PM_AVAIL_SR3 0x400043d3u\r
-#define CYREG_PM_AVAIL_SR4 0x400043d4u\r
-#define CYREG_PM_AVAIL_SR5 0x400043d5u\r
-#define CYREG_PM_AVAIL_SR6 0x400043d6u\r
-#define CYDEV_PICU_BASE 0x40004500u\r
-#define CYDEV_PICU_SIZE 0x000000b0u\r
-#define CYDEV_PICU_INTTYPE_BASE 0x40004500u\r
-#define CYDEV_PICU_INTTYPE_SIZE 0x00000080u\r
-#define CYDEV_PICU_INTTYPE_PICU0_BASE 0x40004500u\r
-#define CYDEV_PICU_INTTYPE_PICU0_SIZE 0x00000008u\r
-#define CYREG_PICU0_INTTYPE0 0x40004500u\r
-#define CYREG_PICU0_INTTYPE1 0x40004501u\r
-#define CYREG_PICU0_INTTYPE2 0x40004502u\r
-#define CYREG_PICU0_INTTYPE3 0x40004503u\r
-#define CYREG_PICU0_INTTYPE4 0x40004504u\r
-#define CYREG_PICU0_INTTYPE5 0x40004505u\r
-#define CYREG_PICU0_INTTYPE6 0x40004506u\r
-#define CYREG_PICU0_INTTYPE7 0x40004507u\r
-#define CYDEV_PICU_INTTYPE_PICU1_BASE 0x40004508u\r
-#define CYDEV_PICU_INTTYPE_PICU1_SIZE 0x00000008u\r
-#define CYREG_PICU1_INTTYPE0 0x40004508u\r
-#define CYREG_PICU1_INTTYPE1 0x40004509u\r
-#define CYREG_PICU1_INTTYPE2 0x4000450au\r
-#define CYREG_PICU1_INTTYPE3 0x4000450bu\r
-#define CYREG_PICU1_INTTYPE4 0x4000450cu\r
-#define CYREG_PICU1_INTTYPE5 0x4000450du\r
-#define CYREG_PICU1_INTTYPE6 0x4000450eu\r
-#define CYREG_PICU1_INTTYPE7 0x4000450fu\r
-#define CYDEV_PICU_INTTYPE_PICU2_BASE 0x40004510u\r
-#define CYDEV_PICU_INTTYPE_PICU2_SIZE 0x00000008u\r
-#define CYREG_PICU2_INTTYPE0 0x40004510u\r
-#define CYREG_PICU2_INTTYPE1 0x40004511u\r
-#define CYREG_PICU2_INTTYPE2 0x40004512u\r
-#define CYREG_PICU2_INTTYPE3 0x40004513u\r
-#define CYREG_PICU2_INTTYPE4 0x40004514u\r
-#define CYREG_PICU2_INTTYPE5 0x40004515u\r
-#define CYREG_PICU2_INTTYPE6 0x40004516u\r
-#define CYREG_PICU2_INTTYPE7 0x40004517u\r
-#define CYDEV_PICU_INTTYPE_PICU3_BASE 0x40004518u\r
-#define CYDEV_PICU_INTTYPE_PICU3_SIZE 0x00000008u\r
-#define CYREG_PICU3_INTTYPE0 0x40004518u\r
-#define CYREG_PICU3_INTTYPE1 0x40004519u\r
-#define CYREG_PICU3_INTTYPE2 0x4000451au\r
-#define CYREG_PICU3_INTTYPE3 0x4000451bu\r
-#define CYREG_PICU3_INTTYPE4 0x4000451cu\r
-#define CYREG_PICU3_INTTYPE5 0x4000451du\r
-#define CYREG_PICU3_INTTYPE6 0x4000451eu\r
-#define CYREG_PICU3_INTTYPE7 0x4000451fu\r
-#define CYDEV_PICU_INTTYPE_PICU4_BASE 0x40004520u\r
-#define CYDEV_PICU_INTTYPE_PICU4_SIZE 0x00000008u\r
-#define CYREG_PICU4_INTTYPE0 0x40004520u\r
-#define CYREG_PICU4_INTTYPE1 0x40004521u\r
-#define CYREG_PICU4_INTTYPE2 0x40004522u\r
-#define CYREG_PICU4_INTTYPE3 0x40004523u\r
-#define CYREG_PICU4_INTTYPE4 0x40004524u\r
-#define CYREG_PICU4_INTTYPE5 0x40004525u\r
-#define CYREG_PICU4_INTTYPE6 0x40004526u\r
-#define CYREG_PICU4_INTTYPE7 0x40004527u\r
-#define CYDEV_PICU_INTTYPE_PICU5_BASE 0x40004528u\r
-#define CYDEV_PICU_INTTYPE_PICU5_SIZE 0x00000008u\r
-#define CYREG_PICU5_INTTYPE0 0x40004528u\r
-#define CYREG_PICU5_INTTYPE1 0x40004529u\r
-#define CYREG_PICU5_INTTYPE2 0x4000452au\r
-#define CYREG_PICU5_INTTYPE3 0x4000452bu\r
-#define CYREG_PICU5_INTTYPE4 0x4000452cu\r
-#define CYREG_PICU5_INTTYPE5 0x4000452du\r
-#define CYREG_PICU5_INTTYPE6 0x4000452eu\r
-#define CYREG_PICU5_INTTYPE7 0x4000452fu\r
-#define CYDEV_PICU_INTTYPE_PICU6_BASE 0x40004530u\r
-#define CYDEV_PICU_INTTYPE_PICU6_SIZE 0x00000008u\r
-#define CYREG_PICU6_INTTYPE0 0x40004530u\r
-#define CYREG_PICU6_INTTYPE1 0x40004531u\r
-#define CYREG_PICU6_INTTYPE2 0x40004532u\r
-#define CYREG_PICU6_INTTYPE3 0x40004533u\r
-#define CYREG_PICU6_INTTYPE4 0x40004534u\r
-#define CYREG_PICU6_INTTYPE5 0x40004535u\r
-#define CYREG_PICU6_INTTYPE6 0x40004536u\r
-#define CYREG_PICU6_INTTYPE7 0x40004537u\r
-#define CYDEV_PICU_INTTYPE_PICU12_BASE 0x40004560u\r
-#define CYDEV_PICU_INTTYPE_PICU12_SIZE 0x00000008u\r
-#define CYREG_PICU12_INTTYPE0 0x40004560u\r
-#define CYREG_PICU12_INTTYPE1 0x40004561u\r
-#define CYREG_PICU12_INTTYPE2 0x40004562u\r
-#define CYREG_PICU12_INTTYPE3 0x40004563u\r
-#define CYREG_PICU12_INTTYPE4 0x40004564u\r
-#define CYREG_PICU12_INTTYPE5 0x40004565u\r
-#define CYREG_PICU12_INTTYPE6 0x40004566u\r
-#define CYREG_PICU12_INTTYPE7 0x40004567u\r
-#define CYDEV_PICU_INTTYPE_PICU15_BASE 0x40004578u\r
-#define CYDEV_PICU_INTTYPE_PICU15_SIZE 0x00000008u\r
-#define CYREG_PICU15_INTTYPE0 0x40004578u\r
-#define CYREG_PICU15_INTTYPE1 0x40004579u\r
-#define CYREG_PICU15_INTTYPE2 0x4000457au\r
-#define CYREG_PICU15_INTTYPE3 0x4000457bu\r
-#define CYREG_PICU15_INTTYPE4 0x4000457cu\r
-#define CYREG_PICU15_INTTYPE5 0x4000457du\r
-#define CYREG_PICU15_INTTYPE6 0x4000457eu\r
-#define CYREG_PICU15_INTTYPE7 0x4000457fu\r
-#define CYDEV_PICU_STAT_BASE 0x40004580u\r
-#define CYDEV_PICU_STAT_SIZE 0x00000010u\r
-#define CYDEV_PICU_STAT_PICU0_BASE 0x40004580u\r
-#define CYDEV_PICU_STAT_PICU0_SIZE 0x00000001u\r
-#define CYREG_PICU0_INTSTAT 0x40004580u\r
-#define CYDEV_PICU_STAT_PICU1_BASE 0x40004581u\r
-#define CYDEV_PICU_STAT_PICU1_SIZE 0x00000001u\r
-#define CYREG_PICU1_INTSTAT 0x40004581u\r
-#define CYDEV_PICU_STAT_PICU2_BASE 0x40004582u\r
-#define CYDEV_PICU_STAT_PICU2_SIZE 0x00000001u\r
-#define CYREG_PICU2_INTSTAT 0x40004582u\r
-#define CYDEV_PICU_STAT_PICU3_BASE 0x40004583u\r
-#define CYDEV_PICU_STAT_PICU3_SIZE 0x00000001u\r
-#define CYREG_PICU3_INTSTAT 0x40004583u\r
-#define CYDEV_PICU_STAT_PICU4_BASE 0x40004584u\r
-#define CYDEV_PICU_STAT_PICU4_SIZE 0x00000001u\r
-#define CYREG_PICU4_INTSTAT 0x40004584u\r
-#define CYDEV_PICU_STAT_PICU5_BASE 0x40004585u\r
-#define CYDEV_PICU_STAT_PICU5_SIZE 0x00000001u\r
-#define CYREG_PICU5_INTSTAT 0x40004585u\r
-#define CYDEV_PICU_STAT_PICU6_BASE 0x40004586u\r
-#define CYDEV_PICU_STAT_PICU6_SIZE 0x00000001u\r
-#define CYREG_PICU6_INTSTAT 0x40004586u\r
-#define CYDEV_PICU_STAT_PICU12_BASE 0x4000458cu\r
-#define CYDEV_PICU_STAT_PICU12_SIZE 0x00000001u\r
-#define CYREG_PICU12_INTSTAT 0x4000458cu\r
-#define CYDEV_PICU_STAT_PICU15_BASE 0x4000458fu\r
-#define CYDEV_PICU_STAT_PICU15_SIZE 0x00000001u\r
-#define CYREG_PICU15_INTSTAT 0x4000458fu\r
-#define CYDEV_PICU_SNAP_BASE 0x40004590u\r
-#define CYDEV_PICU_SNAP_SIZE 0x00000010u\r
-#define CYDEV_PICU_SNAP_PICU0_BASE 0x40004590u\r
-#define CYDEV_PICU_SNAP_PICU0_SIZE 0x00000001u\r
-#define CYREG_PICU0_SNAP 0x40004590u\r
-#define CYDEV_PICU_SNAP_PICU1_BASE 0x40004591u\r
-#define CYDEV_PICU_SNAP_PICU1_SIZE 0x00000001u\r
-#define CYREG_PICU1_SNAP 0x40004591u\r
-#define CYDEV_PICU_SNAP_PICU2_BASE 0x40004592u\r
-#define CYDEV_PICU_SNAP_PICU2_SIZE 0x00000001u\r
-#define CYREG_PICU2_SNAP 0x40004592u\r
-#define CYDEV_PICU_SNAP_PICU3_BASE 0x40004593u\r
-#define CYDEV_PICU_SNAP_PICU3_SIZE 0x00000001u\r
-#define CYREG_PICU3_SNAP 0x40004593u\r
-#define CYDEV_PICU_SNAP_PICU4_BASE 0x40004594u\r
-#define CYDEV_PICU_SNAP_PICU4_SIZE 0x00000001u\r
-#define CYREG_PICU4_SNAP 0x40004594u\r
-#define CYDEV_PICU_SNAP_PICU5_BASE 0x40004595u\r
-#define CYDEV_PICU_SNAP_PICU5_SIZE 0x00000001u\r
-#define CYREG_PICU5_SNAP 0x40004595u\r
-#define CYDEV_PICU_SNAP_PICU6_BASE 0x40004596u\r
-#define CYDEV_PICU_SNAP_PICU6_SIZE 0x00000001u\r
-#define CYREG_PICU6_SNAP 0x40004596u\r
-#define CYDEV_PICU_SNAP_PICU12_BASE 0x4000459cu\r
-#define CYDEV_PICU_SNAP_PICU12_SIZE 0x00000001u\r
-#define CYREG_PICU12_SNAP 0x4000459cu\r
-#define CYDEV_PICU_SNAP_PICU_15_BASE 0x4000459fu\r
-#define CYDEV_PICU_SNAP_PICU_15_SIZE 0x00000001u\r
-#define CYREG_PICU_15_SNAP_15 0x4000459fu\r
-#define CYDEV_PICU_DISABLE_COR_BASE 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_SIZE 0x00000010u\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_BASE 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_SIZE 0x00000001u\r
-#define CYREG_PICU0_DISABLE_COR 0x400045a0u\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_BASE 0x400045a1u\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_SIZE 0x00000001u\r
-#define CYREG_PICU1_DISABLE_COR 0x400045a1u\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_BASE 0x400045a2u\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_SIZE 0x00000001u\r
-#define CYREG_PICU2_DISABLE_COR 0x400045a2u\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_BASE 0x400045a3u\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_SIZE 0x00000001u\r
-#define CYREG_PICU3_DISABLE_COR 0x400045a3u\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_BASE 0x400045a4u\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_SIZE 0x00000001u\r
-#define CYREG_PICU4_DISABLE_COR 0x400045a4u\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_BASE 0x400045a5u\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_SIZE 0x00000001u\r
-#define CYREG_PICU5_DISABLE_COR 0x400045a5u\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_BASE 0x400045a6u\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_SIZE 0x00000001u\r
-#define CYREG_PICU6_DISABLE_COR 0x400045a6u\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_BASE 0x400045acu\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_SIZE 0x00000001u\r
-#define CYREG_PICU12_DISABLE_COR 0x400045acu\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_BASE 0x400045afu\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_SIZE 0x00000001u\r
-#define CYREG_PICU15_DISABLE_COR 0x400045afu\r
-#define CYDEV_MFGCFG_BASE 0x40004600u\r
-#define CYDEV_MFGCFG_SIZE 0x000000edu\r
-#define CYDEV_MFGCFG_ANAIF_BASE 0x40004600u\r
-#define CYDEV_MFGCFG_ANAIF_SIZE 0x00000038u\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_BASE 0x40004608u\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_SIZE 0x00000001u\r
-#define CYREG_DAC0_TR 0x40004608u\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_BASE 0x40004609u\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_SIZE 0x00000001u\r
-#define CYREG_DAC1_TR 0x40004609u\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_BASE 0x4000460au\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_SIZE 0x00000001u\r
-#define CYREG_DAC2_TR 0x4000460au\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_BASE 0x4000460bu\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_SIZE 0x00000001u\r
-#define CYREG_DAC3_TR 0x4000460bu\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE 0x40004610u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE 0x00000001u\r
-#define CYREG_NPUMP_DSM_TR0 0x40004610u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE 0x40004611u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE 0x00000001u\r
-#define CYREG_NPUMP_SC_TR0 0x40004611u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE 0x40004612u\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE 0x00000001u\r
-#define CYREG_NPUMP_OPAMP_TR0 0x40004612u\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_BASE 0x40004614u\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_SIZE 0x00000001u\r
-#define CYREG_SAR0_TR0 0x40004614u\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_BASE 0x40004616u\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_SIZE 0x00000001u\r
-#define CYREG_SAR1_TR0 0x40004616u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_BASE 0x40004620u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE 0x00000002u\r
-#define CYREG_OPAMP0_TR0 0x40004620u\r
-#define CYREG_OPAMP0_TR1 0x40004621u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_BASE 0x40004622u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE 0x00000002u\r
-#define CYREG_OPAMP1_TR0 0x40004622u\r
-#define CYREG_OPAMP1_TR1 0x40004623u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_BASE 0x40004624u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE 0x00000002u\r
-#define CYREG_OPAMP2_TR0 0x40004624u\r
-#define CYREG_OPAMP2_TR1 0x40004625u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_BASE 0x40004626u\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE 0x00000002u\r
-#define CYREG_OPAMP3_TR0 0x40004626u\r
-#define CYREG_OPAMP3_TR1 0x40004627u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_BASE 0x40004630u\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_SIZE 0x00000002u\r
-#define CYREG_CMP0_TR0 0x40004630u\r
-#define CYREG_CMP0_TR1 0x40004631u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_BASE 0x40004632u\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_SIZE 0x00000002u\r
-#define CYREG_CMP1_TR0 0x40004632u\r
-#define CYREG_CMP1_TR1 0x40004633u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_BASE 0x40004634u\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_SIZE 0x00000002u\r
-#define CYREG_CMP2_TR0 0x40004634u\r
-#define CYREG_CMP2_TR1 0x40004635u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_BASE 0x40004636u\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_SIZE 0x00000002u\r
-#define CYREG_CMP3_TR0 0x40004636u\r
-#define CYREG_CMP3_TR1 0x40004637u\r
-#define CYDEV_MFGCFG_PWRSYS_BASE 0x40004680u\r
-#define CYDEV_MFGCFG_PWRSYS_SIZE 0x0000000bu\r
-#define CYREG_PWRSYS_HIB_TR0 0x40004680u\r
-#define CYREG_PWRSYS_HIB_TR1 0x40004681u\r
-#define CYREG_PWRSYS_I2C_TR 0x40004682u\r
-#define CYREG_PWRSYS_SLP_TR 0x40004683u\r
-#define CYREG_PWRSYS_BUZZ_TR 0x40004684u\r
-#define CYREG_PWRSYS_WAKE_TR0 0x40004685u\r
-#define CYREG_PWRSYS_WAKE_TR1 0x40004686u\r
-#define CYREG_PWRSYS_BREF_TR 0x40004687u\r
-#define CYREG_PWRSYS_BG_TR 0x40004688u\r
-#define CYREG_PWRSYS_WAKE_TR2 0x40004689u\r
-#define CYREG_PWRSYS_WAKE_TR3 0x4000468au\r
-#define CYDEV_MFGCFG_ILO_BASE 0x40004690u\r
-#define CYDEV_MFGCFG_ILO_SIZE 0x00000002u\r
-#define CYREG_ILO_TR0 0x40004690u\r
-#define CYREG_ILO_TR1 0x40004691u\r
-#define CYDEV_MFGCFG_X32_BASE 0x40004698u\r
-#define CYDEV_MFGCFG_X32_SIZE 0x00000001u\r
-#define CYREG_X32_TR 0x40004698u\r
-#define CYDEV_MFGCFG_IMO_BASE 0x400046a0u\r
-#define CYDEV_MFGCFG_IMO_SIZE 0x00000005u\r
-#define CYREG_IMO_TR0 0x400046a0u\r
-#define CYREG_IMO_TR1 0x400046a1u\r
-#define CYREG_IMO_GAIN 0x400046a2u\r
-#define CYREG_IMO_C36M 0x400046a3u\r
-#define CYREG_IMO_TR2 0x400046a4u\r
-#define CYDEV_MFGCFG_XMHZ_BASE 0x400046a8u\r
-#define CYDEV_MFGCFG_XMHZ_SIZE 0x00000001u\r
-#define CYREG_XMHZ_TR 0x400046a8u\r
-#define CYREG_MFGCFG_DLY 0x400046c0u\r
-#define CYDEV_MFGCFG_MLOGIC_BASE 0x400046e0u\r
-#define CYDEV_MFGCFG_MLOGIC_SIZE 0x0000000du\r
-#define CYREG_MLOGIC_DMPSTR 0x400046e2u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_BASE 0x400046e4u\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_SIZE 0x00000002u\r
-#define CYREG_MLOGIC_SEG_CR 0x400046e4u\r
-#define CYREG_MLOGIC_SEG_CFG0 0x400046e5u\r
-#define CYREG_MLOGIC_DEBUG 0x400046e8u\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE 0x400046eau\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE 0x00000001u\r
-#define CYREG_MLOGIC_CPU_SCR_CPU_SCR 0x400046eau\r
-#define CYREG_MLOGIC_REV_ID 0x400046ecu\r
-#define CYDEV_RESET_BASE 0x400046f0u\r
-#define CYDEV_RESET_SIZE 0x0000000fu\r
-#define CYREG_RESET_IPOR_CR0 0x400046f0u\r
-#define CYREG_RESET_IPOR_CR1 0x400046f1u\r
-#define CYREG_RESET_IPOR_CR2 0x400046f2u\r
-#define CYREG_RESET_IPOR_CR3 0x400046f3u\r
-#define CYREG_RESET_CR0 0x400046f4u\r
-#define CYREG_RESET_CR1 0x400046f5u\r
-#define CYREG_RESET_CR2 0x400046f6u\r
-#define CYREG_RESET_CR3 0x400046f7u\r
-#define CYREG_RESET_CR4 0x400046f8u\r
-#define CYREG_RESET_CR5 0x400046f9u\r
-#define CYREG_RESET_SR0 0x400046fau\r
-#define CYREG_RESET_SR1 0x400046fbu\r
-#define CYREG_RESET_SR2 0x400046fcu\r
-#define CYREG_RESET_SR3 0x400046fdu\r
-#define CYREG_RESET_TR 0x400046feu\r
-#define CYDEV_SPC_BASE 0x40004700u\r
-#define CYDEV_SPC_SIZE 0x00000100u\r
-#define CYREG_SPC_FM_EE_CR 0x40004700u\r
-#define CYREG_SPC_FM_EE_WAKE_CNT 0x40004701u\r
-#define CYREG_SPC_EE_SCR 0x40004702u\r
-#define CYREG_SPC_EE_ERR 0x40004703u\r
-#define CYREG_SPC_CPU_DATA 0x40004720u\r
-#define CYREG_SPC_DMA_DATA 0x40004721u\r
-#define CYREG_SPC_SR 0x40004722u\r
-#define CYREG_SPC_CR 0x40004723u\r
-#define CYDEV_SPC_DMM_MAP_BASE 0x40004780u\r
-#define CYDEV_SPC_DMM_MAP_SIZE 0x00000080u\r
-#define CYREG_SPC_DMM_MAP_SRAM_MBASE 0x40004780u\r
-#define CYREG_SPC_DMM_MAP_SRAM_MSIZE 0x00000080u\r
-#define CYDEV_CACHE_BASE 0x40004800u\r
-#define CYDEV_CACHE_SIZE 0x0000009cu\r
-#define CYREG_CACHE_CC_CTL 0x40004800u\r
-#define CYREG_CACHE_ECC_CORR 0x40004880u\r
-#define CYREG_CACHE_ECC_ERR 0x40004888u\r
-#define CYREG_CACHE_FLASH_ERR 0x40004890u\r
-#define CYREG_CACHE_HITMISS 0x40004898u\r
-#define CYDEV_I2C_BASE 0x40004900u\r
-#define CYDEV_I2C_SIZE 0x000000e1u\r
-#define CYREG_I2C_XCFG 0x400049c8u\r
-#define CYREG_I2C_ADR 0x400049cau\r
-#define CYREG_I2C_CFG 0x400049d6u\r
-#define CYREG_I2C_CSR 0x400049d7u\r
-#define CYREG_I2C_D 0x400049d8u\r
-#define CYREG_I2C_MCSR 0x400049d9u\r
-#define CYREG_I2C_CLK_DIV1 0x400049dbu\r
-#define CYREG_I2C_CLK_DIV2 0x400049dcu\r
-#define CYREG_I2C_TMOUT_CSR 0x400049ddu\r
-#define CYREG_I2C_TMOUT_SR 0x400049deu\r
-#define CYREG_I2C_TMOUT_CFG0 0x400049dfu\r
-#define CYREG_I2C_TMOUT_CFG1 0x400049e0u\r
-#define CYDEV_DEC_BASE 0x40004e00u\r
-#define CYDEV_DEC_SIZE 0x00000015u\r
-#define CYREG_DEC_CR 0x40004e00u\r
-#define CYREG_DEC_SR 0x40004e01u\r
-#define CYREG_DEC_SHIFT1 0x40004e02u\r
-#define CYREG_DEC_SHIFT2 0x40004e03u\r
-#define CYREG_DEC_DR2 0x40004e04u\r
-#define CYREG_DEC_DR2H 0x40004e05u\r
-#define CYREG_DEC_DR1 0x40004e06u\r
-#define CYREG_DEC_OCOR 0x40004e08u\r
-#define CYREG_DEC_OCORM 0x40004e09u\r
-#define CYREG_DEC_OCORH 0x40004e0au\r
-#define CYREG_DEC_GCOR 0x40004e0cu\r
-#define CYREG_DEC_GCORH 0x40004e0du\r
-#define CYREG_DEC_GVAL 0x40004e0eu\r
-#define CYREG_DEC_OUTSAMP 0x40004e10u\r
-#define CYREG_DEC_OUTSAMPM 0x40004e11u\r
-#define CYREG_DEC_OUTSAMPH 0x40004e12u\r
-#define CYREG_DEC_OUTSAMPS 0x40004e13u\r
-#define CYREG_DEC_COHER 0x40004e14u\r
-#define CYDEV_TMR0_BASE 0x40004f00u\r
-#define CYDEV_TMR0_SIZE 0x0000000cu\r
-#define CYREG_TMR0_CFG0 0x40004f00u\r
-#define CYREG_TMR0_CFG1 0x40004f01u\r
-#define CYREG_TMR0_CFG2 0x40004f02u\r
-#define CYREG_TMR0_SR0 0x40004f03u\r
-#define CYREG_TMR0_PER0 0x40004f04u\r
-#define CYREG_TMR0_PER1 0x40004f05u\r
-#define CYREG_TMR0_CNT_CMP0 0x40004f06u\r
-#define CYREG_TMR0_CNT_CMP1 0x40004f07u\r
-#define CYREG_TMR0_CAP0 0x40004f08u\r
-#define CYREG_TMR0_CAP1 0x40004f09u\r
-#define CYREG_TMR0_RT0 0x40004f0au\r
-#define CYREG_TMR0_RT1 0x40004f0bu\r
-#define CYDEV_TMR1_BASE 0x40004f0cu\r
-#define CYDEV_TMR1_SIZE 0x0000000cu\r
-#define CYREG_TMR1_CFG0 0x40004f0cu\r
-#define CYREG_TMR1_CFG1 0x40004f0du\r
-#define CYREG_TMR1_CFG2 0x40004f0eu\r
-#define CYREG_TMR1_SR0 0x40004f0fu\r
-#define CYREG_TMR1_PER0 0x40004f10u\r
-#define CYREG_TMR1_PER1 0x40004f11u\r
-#define CYREG_TMR1_CNT_CMP0 0x40004f12u\r
-#define CYREG_TMR1_CNT_CMP1 0x40004f13u\r
-#define CYREG_TMR1_CAP0 0x40004f14u\r
-#define CYREG_TMR1_CAP1 0x40004f15u\r
-#define CYREG_TMR1_RT0 0x40004f16u\r
-#define CYREG_TMR1_RT1 0x40004f17u\r
-#define CYDEV_TMR2_BASE 0x40004f18u\r
-#define CYDEV_TMR2_SIZE 0x0000000cu\r
-#define CYREG_TMR2_CFG0 0x40004f18u\r
-#define CYREG_TMR2_CFG1 0x40004f19u\r
-#define CYREG_TMR2_CFG2 0x40004f1au\r
-#define CYREG_TMR2_SR0 0x40004f1bu\r
-#define CYREG_TMR2_PER0 0x40004f1cu\r
-#define CYREG_TMR2_PER1 0x40004f1du\r
-#define CYREG_TMR2_CNT_CMP0 0x40004f1eu\r
-#define CYREG_TMR2_CNT_CMP1 0x40004f1fu\r
-#define CYREG_TMR2_CAP0 0x40004f20u\r
-#define CYREG_TMR2_CAP1 0x40004f21u\r
-#define CYREG_TMR2_RT0 0x40004f22u\r
-#define CYREG_TMR2_RT1 0x40004f23u\r
-#define CYDEV_TMR3_BASE 0x40004f24u\r
-#define CYDEV_TMR3_SIZE 0x0000000cu\r
-#define CYREG_TMR3_CFG0 0x40004f24u\r
-#define CYREG_TMR3_CFG1 0x40004f25u\r
-#define CYREG_TMR3_CFG2 0x40004f26u\r
-#define CYREG_TMR3_SR0 0x40004f27u\r
-#define CYREG_TMR3_PER0 0x40004f28u\r
-#define CYREG_TMR3_PER1 0x40004f29u\r
-#define CYREG_TMR3_CNT_CMP0 0x40004f2au\r
-#define CYREG_TMR3_CNT_CMP1 0x40004f2bu\r
-#define CYREG_TMR3_CAP0 0x40004f2cu\r
-#define CYREG_TMR3_CAP1 0x40004f2du\r
-#define CYREG_TMR3_RT0 0x40004f2eu\r
-#define CYREG_TMR3_RT1 0x40004f2fu\r
-#define CYDEV_IO_BASE 0x40005000u\r
-#define CYDEV_IO_SIZE 0x00000200u\r
-#define CYDEV_IO_PC_BASE 0x40005000u\r
-#define CYDEV_IO_PC_SIZE 0x00000080u\r
-#define CYDEV_IO_PC_PRT0_BASE 0x40005000u\r
-#define CYDEV_IO_PC_PRT0_SIZE 0x00000008u\r
-#define CYREG_PRT0_PC0 0x40005000u\r
-#define CYREG_PRT0_PC1 0x40005001u\r
-#define CYREG_PRT0_PC2 0x40005002u\r
-#define CYREG_PRT0_PC3 0x40005003u\r
-#define CYREG_PRT0_PC4 0x40005004u\r
-#define CYREG_PRT0_PC5 0x40005005u\r
-#define CYREG_PRT0_PC6 0x40005006u\r
-#define CYREG_PRT0_PC7 0x40005007u\r
-#define CYDEV_IO_PC_PRT1_BASE 0x40005008u\r
-#define CYDEV_IO_PC_PRT1_SIZE 0x00000008u\r
-#define CYREG_PRT1_PC0 0x40005008u\r
-#define CYREG_PRT1_PC1 0x40005009u\r
-#define CYREG_PRT1_PC2 0x4000500au\r
-#define CYREG_PRT1_PC3 0x4000500bu\r
-#define CYREG_PRT1_PC4 0x4000500cu\r
-#define CYREG_PRT1_PC5 0x4000500du\r
-#define CYREG_PRT1_PC6 0x4000500eu\r
-#define CYREG_PRT1_PC7 0x4000500fu\r
-#define CYDEV_IO_PC_PRT2_BASE 0x40005010u\r
-#define CYDEV_IO_PC_PRT2_SIZE 0x00000008u\r
-#define CYREG_PRT2_PC0 0x40005010u\r
-#define CYREG_PRT2_PC1 0x40005011u\r
-#define CYREG_PRT2_PC2 0x40005012u\r
-#define CYREG_PRT2_PC3 0x40005013u\r
-#define CYREG_PRT2_PC4 0x40005014u\r
-#define CYREG_PRT2_PC5 0x40005015u\r
-#define CYREG_PRT2_PC6 0x40005016u\r
-#define CYREG_PRT2_PC7 0x40005017u\r
-#define CYDEV_IO_PC_PRT3_BASE 0x40005018u\r
-#define CYDEV_IO_PC_PRT3_SIZE 0x00000008u\r
-#define CYREG_PRT3_PC0 0x40005018u\r
-#define CYREG_PRT3_PC1 0x40005019u\r
-#define CYREG_PRT3_PC2 0x4000501au\r
-#define CYREG_PRT3_PC3 0x4000501bu\r
-#define CYREG_PRT3_PC4 0x4000501cu\r
-#define CYREG_PRT3_PC5 0x4000501du\r
-#define CYREG_PRT3_PC6 0x4000501eu\r
-#define CYREG_PRT3_PC7 0x4000501fu\r
-#define CYDEV_IO_PC_PRT4_BASE 0x40005020u\r
-#define CYDEV_IO_PC_PRT4_SIZE 0x00000008u\r
-#define CYREG_PRT4_PC0 0x40005020u\r
-#define CYREG_PRT4_PC1 0x40005021u\r
-#define CYREG_PRT4_PC2 0x40005022u\r
-#define CYREG_PRT4_PC3 0x40005023u\r
-#define CYREG_PRT4_PC4 0x40005024u\r
-#define CYREG_PRT4_PC5 0x40005025u\r
-#define CYREG_PRT4_PC6 0x40005026u\r
-#define CYREG_PRT4_PC7 0x40005027u\r
-#define CYDEV_IO_PC_PRT5_BASE 0x40005028u\r
-#define CYDEV_IO_PC_PRT5_SIZE 0x00000008u\r
-#define CYREG_PRT5_PC0 0x40005028u\r
-#define CYREG_PRT5_PC1 0x40005029u\r
-#define CYREG_PRT5_PC2 0x4000502au\r
-#define CYREG_PRT5_PC3 0x4000502bu\r
-#define CYREG_PRT5_PC4 0x4000502cu\r
-#define CYREG_PRT5_PC5 0x4000502du\r
-#define CYREG_PRT5_PC6 0x4000502eu\r
-#define CYREG_PRT5_PC7 0x4000502fu\r
-#define CYDEV_IO_PC_PRT6_BASE 0x40005030u\r
-#define CYDEV_IO_PC_PRT6_SIZE 0x00000008u\r
-#define CYREG_PRT6_PC0 0x40005030u\r
-#define CYREG_PRT6_PC1 0x40005031u\r
-#define CYREG_PRT6_PC2 0x40005032u\r
-#define CYREG_PRT6_PC3 0x40005033u\r
-#define CYREG_PRT6_PC4 0x40005034u\r
-#define CYREG_PRT6_PC5 0x40005035u\r
-#define CYREG_PRT6_PC6 0x40005036u\r
-#define CYREG_PRT6_PC7 0x40005037u\r
-#define CYDEV_IO_PC_PRT12_BASE 0x40005060u\r
-#define CYDEV_IO_PC_PRT12_SIZE 0x00000008u\r
-#define CYREG_PRT12_PC0 0x40005060u\r
-#define CYREG_PRT12_PC1 0x40005061u\r
-#define CYREG_PRT12_PC2 0x40005062u\r
-#define CYREG_PRT12_PC3 0x40005063u\r
-#define CYREG_PRT12_PC4 0x40005064u\r
-#define CYREG_PRT12_PC5 0x40005065u\r
-#define CYREG_PRT12_PC6 0x40005066u\r
-#define CYREG_PRT12_PC7 0x40005067u\r
-#define CYDEV_IO_PC_PRT15_BASE 0x40005078u\r
-#define CYDEV_IO_PC_PRT15_SIZE 0x00000006u\r
-#define CYREG_IO_PC_PRT15_PC0 0x40005078u\r
-#define CYREG_IO_PC_PRT15_PC1 0x40005079u\r
-#define CYREG_IO_PC_PRT15_PC2 0x4000507au\r
-#define CYREG_IO_PC_PRT15_PC3 0x4000507bu\r
-#define CYREG_IO_PC_PRT15_PC4 0x4000507cu\r
-#define CYREG_IO_PC_PRT15_PC5 0x4000507du\r
-#define CYDEV_IO_PC_PRT15_7_6_BASE 0x4000507eu\r
-#define CYDEV_IO_PC_PRT15_7_6_SIZE 0x00000002u\r
-#define CYREG_IO_PC_PRT15_7_6_PC0 0x4000507eu\r
-#define CYREG_IO_PC_PRT15_7_6_PC1 0x4000507fu\r
-#define CYDEV_IO_DR_BASE 0x40005080u\r
-#define CYDEV_IO_DR_SIZE 0x00000010u\r
-#define CYDEV_IO_DR_PRT0_BASE 0x40005080u\r
-#define CYDEV_IO_DR_PRT0_SIZE 0x00000001u\r
-#define CYREG_PRT0_DR_ALIAS 0x40005080u\r
-#define CYDEV_IO_DR_PRT1_BASE 0x40005081u\r
-#define CYDEV_IO_DR_PRT1_SIZE 0x00000001u\r
-#define CYREG_PRT1_DR_ALIAS 0x40005081u\r
-#define CYDEV_IO_DR_PRT2_BASE 0x40005082u\r
-#define CYDEV_IO_DR_PRT2_SIZE 0x00000001u\r
-#define CYREG_PRT2_DR_ALIAS 0x40005082u\r
-#define CYDEV_IO_DR_PRT3_BASE 0x40005083u\r
-#define CYDEV_IO_DR_PRT3_SIZE 0x00000001u\r
-#define CYREG_PRT3_DR_ALIAS 0x40005083u\r
-#define CYDEV_IO_DR_PRT4_BASE 0x40005084u\r
-#define CYDEV_IO_DR_PRT4_SIZE 0x00000001u\r
-#define CYREG_PRT4_DR_ALIAS 0x40005084u\r
-#define CYDEV_IO_DR_PRT5_BASE 0x40005085u\r
-#define CYDEV_IO_DR_PRT5_SIZE 0x00000001u\r
-#define CYREG_PRT5_DR_ALIAS 0x40005085u\r
-#define CYDEV_IO_DR_PRT6_BASE 0x40005086u\r
-#define CYDEV_IO_DR_PRT6_SIZE 0x00000001u\r
-#define CYREG_PRT6_DR_ALIAS 0x40005086u\r
-#define CYDEV_IO_DR_PRT12_BASE 0x4000508cu\r
-#define CYDEV_IO_DR_PRT12_SIZE 0x00000001u\r
-#define CYREG_PRT12_DR_ALIAS 0x4000508cu\r
-#define CYDEV_IO_DR_PRT15_BASE 0x4000508fu\r
-#define CYDEV_IO_DR_PRT15_SIZE 0x00000001u\r
-#define CYREG_PRT15_DR_15_ALIAS 0x4000508fu\r
-#define CYDEV_IO_PS_BASE 0x40005090u\r
-#define CYDEV_IO_PS_SIZE 0x00000010u\r
-#define CYDEV_IO_PS_PRT0_BASE 0x40005090u\r
-#define CYDEV_IO_PS_PRT0_SIZE 0x00000001u\r
-#define CYREG_PRT0_PS_ALIAS 0x40005090u\r
-#define CYDEV_IO_PS_PRT1_BASE 0x40005091u\r
-#define CYDEV_IO_PS_PRT1_SIZE 0x00000001u\r
-#define CYREG_PRT1_PS_ALIAS 0x40005091u\r
-#define CYDEV_IO_PS_PRT2_BASE 0x40005092u\r
-#define CYDEV_IO_PS_PRT2_SIZE 0x00000001u\r
-#define CYREG_PRT2_PS_ALIAS 0x40005092u\r
-#define CYDEV_IO_PS_PRT3_BASE 0x40005093u\r
-#define CYDEV_IO_PS_PRT3_SIZE 0x00000001u\r
-#define CYREG_PRT3_PS_ALIAS 0x40005093u\r
-#define CYDEV_IO_PS_PRT4_BASE 0x40005094u\r
-#define CYDEV_IO_PS_PRT4_SIZE 0x00000001u\r
-#define CYREG_PRT4_PS_ALIAS 0x40005094u\r
-#define CYDEV_IO_PS_PRT5_BASE 0x40005095u\r
-#define CYDEV_IO_PS_PRT5_SIZE 0x00000001u\r
-#define CYREG_PRT5_PS_ALIAS 0x40005095u\r
-#define CYDEV_IO_PS_PRT6_BASE 0x40005096u\r
-#define CYDEV_IO_PS_PRT6_SIZE 0x00000001u\r
-#define CYREG_PRT6_PS_ALIAS 0x40005096u\r
-#define CYDEV_IO_PS_PRT12_BASE 0x4000509cu\r
-#define CYDEV_IO_PS_PRT12_SIZE 0x00000001u\r
-#define CYREG_PRT12_PS_ALIAS 0x4000509cu\r
-#define CYDEV_IO_PS_PRT15_BASE 0x4000509fu\r
-#define CYDEV_IO_PS_PRT15_SIZE 0x00000001u\r
-#define CYREG_PRT15_PS15_ALIAS 0x4000509fu\r
-#define CYDEV_IO_PRT_BASE 0x40005100u\r
-#define CYDEV_IO_PRT_SIZE 0x00000100u\r
-#define CYDEV_IO_PRT_PRT0_BASE 0x40005100u\r
-#define CYDEV_IO_PRT_PRT0_SIZE 0x00000010u\r
-#define CYREG_PRT0_DR 0x40005100u\r
-#define CYREG_PRT0_PS 0x40005101u\r
-#define CYREG_PRT0_DM0 0x40005102u\r
-#define CYREG_PRT0_DM1 0x40005103u\r
-#define CYREG_PRT0_DM2 0x40005104u\r
-#define CYREG_PRT0_SLW 0x40005105u\r
-#define CYREG_PRT0_BYP 0x40005106u\r
-#define CYREG_PRT0_BIE 0x40005107u\r
-#define CYREG_PRT0_INP_DIS 0x40005108u\r
-#define CYREG_PRT0_CTL 0x40005109u\r
-#define CYREG_PRT0_PRT 0x4000510au\r
-#define CYREG_PRT0_BIT_MASK 0x4000510bu\r
-#define CYREG_PRT0_AMUX 0x4000510cu\r
-#define CYREG_PRT0_AG 0x4000510du\r
-#define CYREG_PRT0_LCD_COM_SEG 0x4000510eu\r
-#define CYREG_PRT0_LCD_EN 0x4000510fu\r
-#define CYDEV_IO_PRT_PRT1_BASE 0x40005110u\r
-#define CYDEV_IO_PRT_PRT1_SIZE 0x00000010u\r
-#define CYREG_PRT1_DR 0x40005110u\r
-#define CYREG_PRT1_PS 0x40005111u\r
-#define CYREG_PRT1_DM0 0x40005112u\r
-#define CYREG_PRT1_DM1 0x40005113u\r
-#define CYREG_PRT1_DM2 0x40005114u\r
-#define CYREG_PRT1_SLW 0x40005115u\r
-#define CYREG_PRT1_BYP 0x40005116u\r
-#define CYREG_PRT1_BIE 0x40005117u\r
-#define CYREG_PRT1_INP_DIS 0x40005118u\r
-#define CYREG_PRT1_CTL 0x40005119u\r
-#define CYREG_PRT1_PRT 0x4000511au\r
-#define CYREG_PRT1_BIT_MASK 0x4000511bu\r
-#define CYREG_PRT1_AMUX 0x4000511cu\r
-#define CYREG_PRT1_AG 0x4000511du\r
-#define CYREG_PRT1_LCD_COM_SEG 0x4000511eu\r
-#define CYREG_PRT1_LCD_EN 0x4000511fu\r
-#define CYDEV_IO_PRT_PRT2_BASE 0x40005120u\r
-#define CYDEV_IO_PRT_PRT2_SIZE 0x00000010u\r
-#define CYREG_PRT2_DR 0x40005120u\r
-#define CYREG_PRT2_PS 0x40005121u\r
-#define CYREG_PRT2_DM0 0x40005122u\r
-#define CYREG_PRT2_DM1 0x40005123u\r
-#define CYREG_PRT2_DM2 0x40005124u\r
-#define CYREG_PRT2_SLW 0x40005125u\r
-#define CYREG_PRT2_BYP 0x40005126u\r
-#define CYREG_PRT2_BIE 0x40005127u\r
-#define CYREG_PRT2_INP_DIS 0x40005128u\r
-#define CYREG_PRT2_CTL 0x40005129u\r
-#define CYREG_PRT2_PRT 0x4000512au\r
-#define CYREG_PRT2_BIT_MASK 0x4000512bu\r
-#define CYREG_PRT2_AMUX 0x4000512cu\r
-#define CYREG_PRT2_AG 0x4000512du\r
-#define CYREG_PRT2_LCD_COM_SEG 0x4000512eu\r
-#define CYREG_PRT2_LCD_EN 0x4000512fu\r
-#define CYDEV_IO_PRT_PRT3_BASE 0x40005130u\r
-#define CYDEV_IO_PRT_PRT3_SIZE 0x00000010u\r
-#define CYREG_PRT3_DR 0x40005130u\r
-#define CYREG_PRT3_PS 0x40005131u\r
-#define CYREG_PRT3_DM0 0x40005132u\r
-#define CYREG_PRT3_DM1 0x40005133u\r
-#define CYREG_PRT3_DM2 0x40005134u\r
-#define CYREG_PRT3_SLW 0x40005135u\r
-#define CYREG_PRT3_BYP 0x40005136u\r
-#define CYREG_PRT3_BIE 0x40005137u\r
-#define CYREG_PRT3_INP_DIS 0x40005138u\r
-#define CYREG_PRT3_CTL 0x40005139u\r
-#define CYREG_PRT3_PRT 0x4000513au\r
-#define CYREG_PRT3_BIT_MASK 0x4000513bu\r
-#define CYREG_PRT3_AMUX 0x4000513cu\r
-#define CYREG_PRT3_AG 0x4000513du\r
-#define CYREG_PRT3_LCD_COM_SEG 0x4000513eu\r
-#define CYREG_PRT3_LCD_EN 0x4000513fu\r
-#define CYDEV_IO_PRT_PRT4_BASE 0x40005140u\r
-#define CYDEV_IO_PRT_PRT4_SIZE 0x00000010u\r
-#define CYREG_PRT4_DR 0x40005140u\r
-#define CYREG_PRT4_PS 0x40005141u\r
-#define CYREG_PRT4_DM0 0x40005142u\r
-#define CYREG_PRT4_DM1 0x40005143u\r
-#define CYREG_PRT4_DM2 0x40005144u\r
-#define CYREG_PRT4_SLW 0x40005145u\r
-#define CYREG_PRT4_BYP 0x40005146u\r
-#define CYREG_PRT4_BIE 0x40005147u\r
-#define CYREG_PRT4_INP_DIS 0x40005148u\r
-#define CYREG_PRT4_CTL 0x40005149u\r
-#define CYREG_PRT4_PRT 0x4000514au\r
-#define CYREG_PRT4_BIT_MASK 0x4000514bu\r
-#define CYREG_PRT4_AMUX 0x4000514cu\r
-#define CYREG_PRT4_AG 0x4000514du\r
-#define CYREG_PRT4_LCD_COM_SEG 0x4000514eu\r
-#define CYREG_PRT4_LCD_EN 0x4000514fu\r
-#define CYDEV_IO_PRT_PRT5_BASE 0x40005150u\r
-#define CYDEV_IO_PRT_PRT5_SIZE 0x00000010u\r
-#define CYREG_PRT5_DR 0x40005150u\r
-#define CYREG_PRT5_PS 0x40005151u\r
-#define CYREG_PRT5_DM0 0x40005152u\r
-#define CYREG_PRT5_DM1 0x40005153u\r
-#define CYREG_PRT5_DM2 0x40005154u\r
-#define CYREG_PRT5_SLW 0x40005155u\r
-#define CYREG_PRT5_BYP 0x40005156u\r
-#define CYREG_PRT5_BIE 0x40005157u\r
-#define CYREG_PRT5_INP_DIS 0x40005158u\r
-#define CYREG_PRT5_CTL 0x40005159u\r
-#define CYREG_PRT5_PRT 0x4000515au\r
-#define CYREG_PRT5_BIT_MASK 0x4000515bu\r
-#define CYREG_PRT5_AMUX 0x4000515cu\r
-#define CYREG_PRT5_AG 0x4000515du\r
-#define CYREG_PRT5_LCD_COM_SEG 0x4000515eu\r
-#define CYREG_PRT5_LCD_EN 0x4000515fu\r
-#define CYDEV_IO_PRT_PRT6_BASE 0x40005160u\r
-#define CYDEV_IO_PRT_PRT6_SIZE 0x00000010u\r
-#define CYREG_PRT6_DR 0x40005160u\r
-#define CYREG_PRT6_PS 0x40005161u\r
-#define CYREG_PRT6_DM0 0x40005162u\r
-#define CYREG_PRT6_DM1 0x40005163u\r
-#define CYREG_PRT6_DM2 0x40005164u\r
-#define CYREG_PRT6_SLW 0x40005165u\r
-#define CYREG_PRT6_BYP 0x40005166u\r
-#define CYREG_PRT6_BIE 0x40005167u\r
-#define CYREG_PRT6_INP_DIS 0x40005168u\r
-#define CYREG_PRT6_CTL 0x40005169u\r
-#define CYREG_PRT6_PRT 0x4000516au\r
-#define CYREG_PRT6_BIT_MASK 0x4000516bu\r
-#define CYREG_PRT6_AMUX 0x4000516cu\r
-#define CYREG_PRT6_AG 0x4000516du\r
-#define CYREG_PRT6_LCD_COM_SEG 0x4000516eu\r
-#define CYREG_PRT6_LCD_EN 0x4000516fu\r
-#define CYDEV_IO_PRT_PRT12_BASE 0x400051c0u\r
-#define CYDEV_IO_PRT_PRT12_SIZE 0x00000010u\r
-#define CYREG_PRT12_DR 0x400051c0u\r
-#define CYREG_PRT12_PS 0x400051c1u\r
-#define CYREG_PRT12_DM0 0x400051c2u\r
-#define CYREG_PRT12_DM1 0x400051c3u\r
-#define CYREG_PRT12_DM2 0x400051c4u\r
-#define CYREG_PRT12_SLW 0x400051c5u\r
-#define CYREG_PRT12_BYP 0x400051c6u\r
-#define CYREG_PRT12_BIE 0x400051c7u\r
-#define CYREG_PRT12_INP_DIS 0x400051c8u\r
-#define CYREG_PRT12_SIO_HYST_EN 0x400051c9u\r
-#define CYREG_PRT12_PRT 0x400051cau\r
-#define CYREG_PRT12_BIT_MASK 0x400051cbu\r
-#define CYREG_PRT12_SIO_REG_HIFREQ 0x400051ccu\r
-#define CYREG_PRT12_AG 0x400051cdu\r
-#define CYREG_PRT12_SIO_CFG 0x400051ceu\r
-#define CYREG_PRT12_SIO_DIFF 0x400051cfu\r
-#define CYDEV_IO_PRT_PRT15_BASE 0x400051f0u\r
-#define CYDEV_IO_PRT_PRT15_SIZE 0x00000010u\r
-#define CYREG_PRT15_DR 0x400051f0u\r
-#define CYREG_PRT15_PS 0x400051f1u\r
-#define CYREG_PRT15_DM0 0x400051f2u\r
-#define CYREG_PRT15_DM1 0x400051f3u\r
-#define CYREG_PRT15_DM2 0x400051f4u\r
-#define CYREG_PRT15_SLW 0x400051f5u\r
-#define CYREG_PRT15_BYP 0x400051f6u\r
-#define CYREG_PRT15_BIE 0x400051f7u\r
-#define CYREG_PRT15_INP_DIS 0x400051f8u\r
-#define CYREG_PRT15_CTL 0x400051f9u\r
-#define CYREG_PRT15_PRT 0x400051fau\r
-#define CYREG_PRT15_BIT_MASK 0x400051fbu\r
-#define CYREG_PRT15_AMUX 0x400051fcu\r
-#define CYREG_PRT15_AG 0x400051fdu\r
-#define CYREG_PRT15_LCD_COM_SEG 0x400051feu\r
-#define CYREG_PRT15_LCD_EN 0x400051ffu\r
-#define CYDEV_PRTDSI_BASE 0x40005200u\r
-#define CYDEV_PRTDSI_SIZE 0x0000007fu\r
-#define CYDEV_PRTDSI_PRT0_BASE 0x40005200u\r
-#define CYDEV_PRTDSI_PRT0_SIZE 0x00000007u\r
-#define CYREG_PRT0_OUT_SEL0 0x40005200u\r
-#define CYREG_PRT0_OUT_SEL1 0x40005201u\r
-#define CYREG_PRT0_OE_SEL0 0x40005202u\r
-#define CYREG_PRT0_OE_SEL1 0x40005203u\r
-#define CYREG_PRT0_DBL_SYNC_IN 0x40005204u\r
-#define CYREG_PRT0_SYNC_OUT 0x40005205u\r
-#define CYREG_PRT0_CAPS_SEL 0x40005206u\r
-#define CYDEV_PRTDSI_PRT1_BASE 0x40005208u\r
-#define CYDEV_PRTDSI_PRT1_SIZE 0x00000007u\r
-#define CYREG_PRT1_OUT_SEL0 0x40005208u\r
-#define CYREG_PRT1_OUT_SEL1 0x40005209u\r
-#define CYREG_PRT1_OE_SEL0 0x4000520au\r
-#define CYREG_PRT1_OE_SEL1 0x4000520bu\r
-#define CYREG_PRT1_DBL_SYNC_IN 0x4000520cu\r
-#define CYREG_PRT1_SYNC_OUT 0x4000520du\r
-#define CYREG_PRT1_CAPS_SEL 0x4000520eu\r
-#define CYDEV_PRTDSI_PRT2_BASE 0x40005210u\r
-#define CYDEV_PRTDSI_PRT2_SIZE 0x00000007u\r
-#define CYREG_PRT2_OUT_SEL0 0x40005210u\r
-#define CYREG_PRT2_OUT_SEL1 0x40005211u\r
-#define CYREG_PRT2_OE_SEL0 0x40005212u\r
-#define CYREG_PRT2_OE_SEL1 0x40005213u\r
-#define CYREG_PRT2_DBL_SYNC_IN 0x40005214u\r
-#define CYREG_PRT2_SYNC_OUT 0x40005215u\r
-#define CYREG_PRT2_CAPS_SEL 0x40005216u\r
-#define CYDEV_PRTDSI_PRT3_BASE 0x40005218u\r
-#define CYDEV_PRTDSI_PRT3_SIZE 0x00000007u\r
-#define CYREG_PRT3_OUT_SEL0 0x40005218u\r
-#define CYREG_PRT3_OUT_SEL1 0x40005219u\r
-#define CYREG_PRT3_OE_SEL0 0x4000521au\r
-#define CYREG_PRT3_OE_SEL1 0x4000521bu\r
-#define CYREG_PRT3_DBL_SYNC_IN 0x4000521cu\r
-#define CYREG_PRT3_SYNC_OUT 0x4000521du\r
-#define CYREG_PRT3_CAPS_SEL 0x4000521eu\r
-#define CYDEV_PRTDSI_PRT4_BASE 0x40005220u\r
-#define CYDEV_PRTDSI_PRT4_SIZE 0x00000007u\r
-#define CYREG_PRT4_OUT_SEL0 0x40005220u\r
-#define CYREG_PRT4_OUT_SEL1 0x40005221u\r
-#define CYREG_PRT4_OE_SEL0 0x40005222u\r
-#define CYREG_PRT4_OE_SEL1 0x40005223u\r
-#define CYREG_PRT4_DBL_SYNC_IN 0x40005224u\r
-#define CYREG_PRT4_SYNC_OUT 0x40005225u\r
-#define CYREG_PRT4_CAPS_SEL 0x40005226u\r
-#define CYDEV_PRTDSI_PRT5_BASE 0x40005228u\r
-#define CYDEV_PRTDSI_PRT5_SIZE 0x00000007u\r
-#define CYREG_PRT5_OUT_SEL0 0x40005228u\r
-#define CYREG_PRT5_OUT_SEL1 0x40005229u\r
-#define CYREG_PRT5_OE_SEL0 0x4000522au\r
-#define CYREG_PRT5_OE_SEL1 0x4000522bu\r
-#define CYREG_PRT5_DBL_SYNC_IN 0x4000522cu\r
-#define CYREG_PRT5_SYNC_OUT 0x4000522du\r
-#define CYREG_PRT5_CAPS_SEL 0x4000522eu\r
-#define CYDEV_PRTDSI_PRT6_BASE 0x40005230u\r
-#define CYDEV_PRTDSI_PRT6_SIZE 0x00000007u\r
-#define CYREG_PRT6_OUT_SEL0 0x40005230u\r
-#define CYREG_PRT6_OUT_SEL1 0x40005231u\r
-#define CYREG_PRT6_OE_SEL0 0x40005232u\r
-#define CYREG_PRT6_OE_SEL1 0x40005233u\r
-#define CYREG_PRT6_DBL_SYNC_IN 0x40005234u\r
-#define CYREG_PRT6_SYNC_OUT 0x40005235u\r
-#define CYREG_PRT6_CAPS_SEL 0x40005236u\r
-#define CYDEV_PRTDSI_PRT12_BASE 0x40005260u\r
-#define CYDEV_PRTDSI_PRT12_SIZE 0x00000006u\r
-#define CYREG_PRT12_OUT_SEL0 0x40005260u\r
-#define CYREG_PRT12_OUT_SEL1 0x40005261u\r
-#define CYREG_PRT12_OE_SEL0 0x40005262u\r
-#define CYREG_PRT12_OE_SEL1 0x40005263u\r
-#define CYREG_PRT12_DBL_SYNC_IN 0x40005264u\r
-#define CYREG_PRT12_SYNC_OUT 0x40005265u\r
-#define CYDEV_PRTDSI_PRT15_BASE 0x40005278u\r
-#define CYDEV_PRTDSI_PRT15_SIZE 0x00000007u\r
-#define CYREG_PRT15_OUT_SEL0 0x40005278u\r
-#define CYREG_PRT15_OUT_SEL1 0x40005279u\r
-#define CYREG_PRT15_OE_SEL0 0x4000527au\r
-#define CYREG_PRT15_OE_SEL1 0x4000527bu\r
-#define CYREG_PRT15_DBL_SYNC_IN 0x4000527cu\r
-#define CYREG_PRT15_SYNC_OUT 0x4000527du\r
-#define CYREG_PRT15_CAPS_SEL 0x4000527eu\r
-#define CYDEV_EMIF_BASE 0x40005400u\r
-#define CYDEV_EMIF_SIZE 0x00000007u\r
-#define CYREG_EMIF_NO_UDB 0x40005400u\r
-#define CYREG_EMIF_RP_WAIT_STATES 0x40005401u\r
-#define CYREG_EMIF_MEM_DWN 0x40005402u\r
-#define CYREG_EMIF_MEMCLK_DIV 0x40005403u\r
-#define CYREG_EMIF_CLOCK_EN 0x40005404u\r
-#define CYREG_EMIF_EM_TYPE 0x40005405u\r
-#define CYREG_EMIF_WP_WAIT_STATES 0x40005406u\r
-#define CYDEV_ANAIF_BASE 0x40005800u\r
-#define CYDEV_ANAIF_SIZE 0x000003a9u\r
-#define CYDEV_ANAIF_CFG_BASE 0x40005800u\r
-#define CYDEV_ANAIF_CFG_SIZE 0x0000010fu\r
-#define CYDEV_ANAIF_CFG_SC0_BASE 0x40005800u\r
-#define CYDEV_ANAIF_CFG_SC0_SIZE 0x00000003u\r
-#define CYREG_SC0_CR0 0x40005800u\r
-#define CYREG_SC0_CR1 0x40005801u\r
-#define CYREG_SC0_CR2 0x40005802u\r
-#define CYDEV_ANAIF_CFG_SC1_BASE 0x40005804u\r
-#define CYDEV_ANAIF_CFG_SC1_SIZE 0x00000003u\r
-#define CYREG_SC1_CR0 0x40005804u\r
-#define CYREG_SC1_CR1 0x40005805u\r
-#define CYREG_SC1_CR2 0x40005806u\r
-#define CYDEV_ANAIF_CFG_SC2_BASE 0x40005808u\r
-#define CYDEV_ANAIF_CFG_SC2_SIZE 0x00000003u\r
-#define CYREG_SC2_CR0 0x40005808u\r
-#define CYREG_SC2_CR1 0x40005809u\r
-#define CYREG_SC2_CR2 0x4000580au\r
-#define CYDEV_ANAIF_CFG_SC3_BASE 0x4000580cu\r
-#define CYDEV_ANAIF_CFG_SC3_SIZE 0x00000003u\r
-#define CYREG_SC3_CR0 0x4000580cu\r
-#define CYREG_SC3_CR1 0x4000580du\r
-#define CYREG_SC3_CR2 0x4000580eu\r
-#define CYDEV_ANAIF_CFG_DAC0_BASE 0x40005820u\r
-#define CYDEV_ANAIF_CFG_DAC0_SIZE 0x00000003u\r
-#define CYREG_DAC0_CR0 0x40005820u\r
-#define CYREG_DAC0_CR1 0x40005821u\r
-#define CYREG_DAC0_TST 0x40005822u\r
-#define CYDEV_ANAIF_CFG_DAC1_BASE 0x40005824u\r
-#define CYDEV_ANAIF_CFG_DAC1_SIZE 0x00000003u\r
-#define CYREG_DAC1_CR0 0x40005824u\r
-#define CYREG_DAC1_CR1 0x40005825u\r
-#define CYREG_DAC1_TST 0x40005826u\r
-#define CYDEV_ANAIF_CFG_DAC2_BASE 0x40005828u\r
-#define CYDEV_ANAIF_CFG_DAC2_SIZE 0x00000003u\r
-#define CYREG_DAC2_CR0 0x40005828u\r
-#define CYREG_DAC2_CR1 0x40005829u\r
-#define CYREG_DAC2_TST 0x4000582au\r
-#define CYDEV_ANAIF_CFG_DAC3_BASE 0x4000582cu\r
-#define CYDEV_ANAIF_CFG_DAC3_SIZE 0x00000003u\r
-#define CYREG_DAC3_CR0 0x4000582cu\r
-#define CYREG_DAC3_CR1 0x4000582du\r
-#define CYREG_DAC3_TST 0x4000582eu\r
-#define CYDEV_ANAIF_CFG_CMP0_BASE 0x40005840u\r
-#define CYDEV_ANAIF_CFG_CMP0_SIZE 0x00000001u\r
-#define CYREG_CMP0_CR 0x40005840u\r
-#define CYDEV_ANAIF_CFG_CMP1_BASE 0x40005841u\r
-#define CYDEV_ANAIF_CFG_CMP1_SIZE 0x00000001u\r
-#define CYREG_CMP1_CR 0x40005841u\r
-#define CYDEV_ANAIF_CFG_CMP2_BASE 0x40005842u\r
-#define CYDEV_ANAIF_CFG_CMP2_SIZE 0x00000001u\r
-#define CYREG_CMP2_CR 0x40005842u\r
-#define CYDEV_ANAIF_CFG_CMP3_BASE 0x40005843u\r
-#define CYDEV_ANAIF_CFG_CMP3_SIZE 0x00000001u\r
-#define CYREG_CMP3_CR 0x40005843u\r
-#define CYDEV_ANAIF_CFG_LUT0_BASE 0x40005848u\r
-#define CYDEV_ANAIF_CFG_LUT0_SIZE 0x00000002u\r
-#define CYREG_LUT0_CR 0x40005848u\r
-#define CYREG_LUT0_MX 0x40005849u\r
-#define CYDEV_ANAIF_CFG_LUT1_BASE 0x4000584au\r
-#define CYDEV_ANAIF_CFG_LUT1_SIZE 0x00000002u\r
-#define CYREG_LUT1_CR 0x4000584au\r
-#define CYREG_LUT1_MX 0x4000584bu\r
-#define CYDEV_ANAIF_CFG_LUT2_BASE 0x4000584cu\r
-#define CYDEV_ANAIF_CFG_LUT2_SIZE 0x00000002u\r
-#define CYREG_LUT2_CR 0x4000584cu\r
-#define CYREG_LUT2_MX 0x4000584du\r
-#define CYDEV_ANAIF_CFG_LUT3_BASE 0x4000584eu\r
-#define CYDEV_ANAIF_CFG_LUT3_SIZE 0x00000002u\r
-#define CYREG_LUT3_CR 0x4000584eu\r
-#define CYREG_LUT3_MX 0x4000584fu\r
-#define CYDEV_ANAIF_CFG_OPAMP0_BASE 0x40005858u\r
-#define CYDEV_ANAIF_CFG_OPAMP0_SIZE 0x00000002u\r
-#define CYREG_OPAMP0_CR 0x40005858u\r
-#define CYREG_OPAMP0_RSVD 0x40005859u\r
-#define CYDEV_ANAIF_CFG_OPAMP1_BASE 0x4000585au\r
-#define CYDEV_ANAIF_CFG_OPAMP1_SIZE 0x00000002u\r
-#define CYREG_OPAMP1_CR 0x4000585au\r
-#define CYREG_OPAMP1_RSVD 0x4000585bu\r
-#define CYDEV_ANAIF_CFG_OPAMP2_BASE 0x4000585cu\r
-#define CYDEV_ANAIF_CFG_OPAMP2_SIZE 0x00000002u\r
-#define CYREG_OPAMP2_CR 0x4000585cu\r
-#define CYREG_OPAMP2_RSVD 0x4000585du\r
-#define CYDEV_ANAIF_CFG_OPAMP3_BASE 0x4000585eu\r
-#define CYDEV_ANAIF_CFG_OPAMP3_SIZE 0x00000002u\r
-#define CYREG_OPAMP3_CR 0x4000585eu\r
-#define CYREG_OPAMP3_RSVD 0x4000585fu\r
-#define CYDEV_ANAIF_CFG_LCDDAC_BASE 0x40005868u\r
-#define CYDEV_ANAIF_CFG_LCDDAC_SIZE 0x00000002u\r
-#define CYREG_LCDDAC_CR0 0x40005868u\r
-#define CYREG_LCDDAC_CR1 0x40005869u\r
-#define CYDEV_ANAIF_CFG_LCDDRV_BASE 0x4000586au\r
-#define CYDEV_ANAIF_CFG_LCDDRV_SIZE 0x00000001u\r
-#define CYREG_LCDDRV_CR 0x4000586au\r
-#define CYDEV_ANAIF_CFG_LCDTMR_BASE 0x4000586bu\r
-#define CYDEV_ANAIF_CFG_LCDTMR_SIZE 0x00000001u\r
-#define CYREG_LCDTMR_CFG 0x4000586bu\r
-#define CYDEV_ANAIF_CFG_BG_BASE 0x4000586cu\r
-#define CYDEV_ANAIF_CFG_BG_SIZE 0x00000004u\r
-#define CYREG_BG_CR0 0x4000586cu\r
-#define CYREG_BG_RSVD 0x4000586du\r
-#define CYREG_BG_DFT0 0x4000586eu\r
-#define CYREG_BG_DFT1 0x4000586fu\r
-#define CYDEV_ANAIF_CFG_CAPSL_BASE 0x40005870u\r
-#define CYDEV_ANAIF_CFG_CAPSL_SIZE 0x00000002u\r
-#define CYREG_CAPSL_CFG0 0x40005870u\r
-#define CYREG_CAPSL_CFG1 0x40005871u\r
-#define CYDEV_ANAIF_CFG_CAPSR_BASE 0x40005872u\r
-#define CYDEV_ANAIF_CFG_CAPSR_SIZE 0x00000002u\r
-#define CYREG_CAPSR_CFG0 0x40005872u\r
-#define CYREG_CAPSR_CFG1 0x40005873u\r
-#define CYDEV_ANAIF_CFG_PUMP_BASE 0x40005876u\r
-#define CYDEV_ANAIF_CFG_PUMP_SIZE 0x00000002u\r
-#define CYREG_PUMP_CR0 0x40005876u\r
-#define CYREG_PUMP_CR1 0x40005877u\r
-#define CYDEV_ANAIF_CFG_LPF0_BASE 0x40005878u\r
-#define CYDEV_ANAIF_CFG_LPF0_SIZE 0x00000002u\r
-#define CYREG_LPF0_CR0 0x40005878u\r
-#define CYREG_LPF0_RSVD 0x40005879u\r
-#define CYDEV_ANAIF_CFG_LPF1_BASE 0x4000587au\r
-#define CYDEV_ANAIF_CFG_LPF1_SIZE 0x00000002u\r
-#define CYREG_LPF1_CR0 0x4000587au\r
-#define CYREG_LPF1_RSVD 0x4000587bu\r
-#define CYDEV_ANAIF_CFG_MISC_BASE 0x4000587cu\r
-#define CYDEV_ANAIF_CFG_MISC_SIZE 0x00000001u\r
-#define CYREG_ANAIF_CFG_MISC_CR0 0x4000587cu\r
-#define CYDEV_ANAIF_CFG_DSM0_BASE 0x40005880u\r
-#define CYDEV_ANAIF_CFG_DSM0_SIZE 0x00000020u\r
-#define CYREG_DSM0_CR0 0x40005880u\r
-#define CYREG_DSM0_CR1 0x40005881u\r
-#define CYREG_DSM0_CR2 0x40005882u\r
-#define CYREG_DSM0_CR3 0x40005883u\r
-#define CYREG_DSM0_CR4 0x40005884u\r
-#define CYREG_DSM0_CR5 0x40005885u\r
-#define CYREG_DSM0_CR6 0x40005886u\r
-#define CYREG_DSM0_CR7 0x40005887u\r
-#define CYREG_DSM0_CR8 0x40005888u\r
-#define CYREG_DSM0_CR9 0x40005889u\r
-#define CYREG_DSM0_CR10 0x4000588au\r
-#define CYREG_DSM0_CR11 0x4000588bu\r
-#define CYREG_DSM0_CR12 0x4000588cu\r
-#define CYREG_DSM0_CR13 0x4000588du\r
-#define CYREG_DSM0_CR14 0x4000588eu\r
-#define CYREG_DSM0_CR15 0x4000588fu\r
-#define CYREG_DSM0_CR16 0x40005890u\r
-#define CYREG_DSM0_CR17 0x40005891u\r
-#define CYREG_DSM0_REF0 0x40005892u\r
-#define CYREG_DSM0_REF1 0x40005893u\r
-#define CYREG_DSM0_REF2 0x40005894u\r
-#define CYREG_DSM0_REF3 0x40005895u\r
-#define CYREG_DSM0_DEM0 0x40005896u\r
-#define CYREG_DSM0_DEM1 0x40005897u\r
-#define CYREG_DSM0_TST0 0x40005898u\r
-#define CYREG_DSM0_TST1 0x40005899u\r
-#define CYREG_DSM0_BUF0 0x4000589au\r
-#define CYREG_DSM0_BUF1 0x4000589bu\r
-#define CYREG_DSM0_BUF2 0x4000589cu\r
-#define CYREG_DSM0_BUF3 0x4000589du\r
-#define CYREG_DSM0_MISC 0x4000589eu\r
-#define CYREG_DSM0_RSVD1 0x4000589fu\r
-#define CYDEV_ANAIF_CFG_SAR0_BASE 0x40005900u\r
-#define CYDEV_ANAIF_CFG_SAR0_SIZE 0x00000007u\r
-#define CYREG_SAR0_CSR0 0x40005900u\r
-#define CYREG_SAR0_CSR1 0x40005901u\r
-#define CYREG_SAR0_CSR2 0x40005902u\r
-#define CYREG_SAR0_CSR3 0x40005903u\r
-#define CYREG_SAR0_CSR4 0x40005904u\r
-#define CYREG_SAR0_CSR5 0x40005905u\r
-#define CYREG_SAR0_CSR6 0x40005906u\r
-#define CYDEV_ANAIF_CFG_SAR1_BASE 0x40005908u\r
-#define CYDEV_ANAIF_CFG_SAR1_SIZE 0x00000007u\r
-#define CYREG_SAR1_CSR0 0x40005908u\r
-#define CYREG_SAR1_CSR1 0x40005909u\r
-#define CYREG_SAR1_CSR2 0x4000590au\r
-#define CYREG_SAR1_CSR3 0x4000590bu\r
-#define CYREG_SAR1_CSR4 0x4000590cu\r
-#define CYREG_SAR1_CSR5 0x4000590du\r
-#define CYREG_SAR1_CSR6 0x4000590eu\r
-#define CYDEV_ANAIF_RT_BASE 0x40005a00u\r
-#define CYDEV_ANAIF_RT_SIZE 0x00000162u\r
-#define CYDEV_ANAIF_RT_SC0_BASE 0x40005a00u\r
-#define CYDEV_ANAIF_RT_SC0_SIZE 0x0000000du\r
-#define CYREG_SC0_SW0 0x40005a00u\r
-#define CYREG_SC0_SW2 0x40005a02u\r
-#define CYREG_SC0_SW3 0x40005a03u\r
-#define CYREG_SC0_SW4 0x40005a04u\r
-#define CYREG_SC0_SW6 0x40005a06u\r
-#define CYREG_SC0_SW7 0x40005a07u\r
-#define CYREG_SC0_SW8 0x40005a08u\r
-#define CYREG_SC0_SW10 0x40005a0au\r
-#define CYREG_SC0_CLK 0x40005a0bu\r
-#define CYREG_SC0_BST 0x40005a0cu\r
-#define CYDEV_ANAIF_RT_SC1_BASE 0x40005a10u\r
-#define CYDEV_ANAIF_RT_SC1_SIZE 0x0000000du\r
-#define CYREG_SC1_SW0 0x40005a10u\r
-#define CYREG_SC1_SW2 0x40005a12u\r
-#define CYREG_SC1_SW3 0x40005a13u\r
-#define CYREG_SC1_SW4 0x40005a14u\r
-#define CYREG_SC1_SW6 0x40005a16u\r
-#define CYREG_SC1_SW7 0x40005a17u\r
-#define CYREG_SC1_SW8 0x40005a18u\r
-#define CYREG_SC1_SW10 0x40005a1au\r
-#define CYREG_SC1_CLK 0x40005a1bu\r
-#define CYREG_SC1_BST 0x40005a1cu\r
-#define CYDEV_ANAIF_RT_SC2_BASE 0x40005a20u\r
-#define CYDEV_ANAIF_RT_SC2_SIZE 0x0000000du\r
-#define CYREG_SC2_SW0 0x40005a20u\r
-#define CYREG_SC2_SW2 0x40005a22u\r
-#define CYREG_SC2_SW3 0x40005a23u\r
-#define CYREG_SC2_SW4 0x40005a24u\r
-#define CYREG_SC2_SW6 0x40005a26u\r
-#define CYREG_SC2_SW7 0x40005a27u\r
-#define CYREG_SC2_SW8 0x40005a28u\r
-#define CYREG_SC2_SW10 0x40005a2au\r
-#define CYREG_SC2_CLK 0x40005a2bu\r
-#define CYREG_SC2_BST 0x40005a2cu\r
-#define CYDEV_ANAIF_RT_SC3_BASE 0x40005a30u\r
-#define CYDEV_ANAIF_RT_SC3_SIZE 0x0000000du\r
-#define CYREG_SC3_SW0 0x40005a30u\r
-#define CYREG_SC3_SW2 0x40005a32u\r
-#define CYREG_SC3_SW3 0x40005a33u\r
-#define CYREG_SC3_SW4 0x40005a34u\r
-#define CYREG_SC3_SW6 0x40005a36u\r
-#define CYREG_SC3_SW7 0x40005a37u\r
-#define CYREG_SC3_SW8 0x40005a38u\r
-#define CYREG_SC3_SW10 0x40005a3au\r
-#define CYREG_SC3_CLK 0x40005a3bu\r
-#define CYREG_SC3_BST 0x40005a3cu\r
-#define CYDEV_ANAIF_RT_DAC0_BASE 0x40005a80u\r
-#define CYDEV_ANAIF_RT_DAC0_SIZE 0x00000008u\r
-#define CYREG_DAC0_SW0 0x40005a80u\r
-#define CYREG_DAC0_SW2 0x40005a82u\r
-#define CYREG_DAC0_SW3 0x40005a83u\r
-#define CYREG_DAC0_SW4 0x40005a84u\r
-#define CYREG_DAC0_STROBE 0x40005a87u\r
-#define CYDEV_ANAIF_RT_DAC1_BASE 0x40005a88u\r
-#define CYDEV_ANAIF_RT_DAC1_SIZE 0x00000008u\r
-#define CYREG_DAC1_SW0 0x40005a88u\r
-#define CYREG_DAC1_SW2 0x40005a8au\r
-#define CYREG_DAC1_SW3 0x40005a8bu\r
-#define CYREG_DAC1_SW4 0x40005a8cu\r
-#define CYREG_DAC1_STROBE 0x40005a8fu\r
-#define CYDEV_ANAIF_RT_DAC2_BASE 0x40005a90u\r
-#define CYDEV_ANAIF_RT_DAC2_SIZE 0x00000008u\r
-#define CYREG_DAC2_SW0 0x40005a90u\r
-#define CYREG_DAC2_SW2 0x40005a92u\r
-#define CYREG_DAC2_SW3 0x40005a93u\r
-#define CYREG_DAC2_SW4 0x40005a94u\r
-#define CYREG_DAC2_STROBE 0x40005a97u\r
-#define CYDEV_ANAIF_RT_DAC3_BASE 0x40005a98u\r
-#define CYDEV_ANAIF_RT_DAC3_SIZE 0x00000008u\r
-#define CYREG_DAC3_SW0 0x40005a98u\r
-#define CYREG_DAC3_SW2 0x40005a9au\r
-#define CYREG_DAC3_SW3 0x40005a9bu\r
-#define CYREG_DAC3_SW4 0x40005a9cu\r
-#define CYREG_DAC3_STROBE 0x40005a9fu\r
-#define CYDEV_ANAIF_RT_CMP0_BASE 0x40005ac0u\r
-#define CYDEV_ANAIF_RT_CMP0_SIZE 0x00000008u\r
-#define CYREG_CMP0_SW0 0x40005ac0u\r
-#define CYREG_CMP0_SW2 0x40005ac2u\r
-#define CYREG_CMP0_SW3 0x40005ac3u\r
-#define CYREG_CMP0_SW4 0x40005ac4u\r
-#define CYREG_CMP0_SW6 0x40005ac6u\r
-#define CYREG_CMP0_CLK 0x40005ac7u\r
-#define CYDEV_ANAIF_RT_CMP1_BASE 0x40005ac8u\r
-#define CYDEV_ANAIF_RT_CMP1_SIZE 0x00000008u\r
-#define CYREG_CMP1_SW0 0x40005ac8u\r
-#define CYREG_CMP1_SW2 0x40005acau\r
-#define CYREG_CMP1_SW3 0x40005acbu\r
-#define CYREG_CMP1_SW4 0x40005accu\r
-#define CYREG_CMP1_SW6 0x40005aceu\r
-#define CYREG_CMP1_CLK 0x40005acfu\r
-#define CYDEV_ANAIF_RT_CMP2_BASE 0x40005ad0u\r
-#define CYDEV_ANAIF_RT_CMP2_SIZE 0x00000008u\r
-#define CYREG_CMP2_SW0 0x40005ad0u\r
-#define CYREG_CMP2_SW2 0x40005ad2u\r
-#define CYREG_CMP2_SW3 0x40005ad3u\r
-#define CYREG_CMP2_SW4 0x40005ad4u\r
-#define CYREG_CMP2_SW6 0x40005ad6u\r
-#define CYREG_CMP2_CLK 0x40005ad7u\r
-#define CYDEV_ANAIF_RT_CMP3_BASE 0x40005ad8u\r
-#define CYDEV_ANAIF_RT_CMP3_SIZE 0x00000008u\r
-#define CYREG_CMP3_SW0 0x40005ad8u\r
-#define CYREG_CMP3_SW2 0x40005adau\r
-#define CYREG_CMP3_SW3 0x40005adbu\r
-#define CYREG_CMP3_SW4 0x40005adcu\r
-#define CYREG_CMP3_SW6 0x40005adeu\r
-#define CYREG_CMP3_CLK 0x40005adfu\r
-#define CYDEV_ANAIF_RT_DSM0_BASE 0x40005b00u\r
-#define CYDEV_ANAIF_RT_DSM0_SIZE 0x00000008u\r
-#define CYREG_DSM0_SW0 0x40005b00u\r
-#define CYREG_DSM0_SW2 0x40005b02u\r
-#define CYREG_DSM0_SW3 0x40005b03u\r
-#define CYREG_DSM0_SW4 0x40005b04u\r
-#define CYREG_DSM0_SW6 0x40005b06u\r
-#define CYREG_DSM0_CLK 0x40005b07u\r
-#define CYDEV_ANAIF_RT_SAR0_BASE 0x40005b20u\r
-#define CYDEV_ANAIF_RT_SAR0_SIZE 0x00000008u\r
-#define CYREG_SAR0_SW0 0x40005b20u\r
-#define CYREG_SAR0_SW2 0x40005b22u\r
-#define CYREG_SAR0_SW3 0x40005b23u\r
-#define CYREG_SAR0_SW4 0x40005b24u\r
-#define CYREG_SAR0_SW6 0x40005b26u\r
-#define CYREG_SAR0_CLK 0x40005b27u\r
-#define CYDEV_ANAIF_RT_SAR1_BASE 0x40005b28u\r
-#define CYDEV_ANAIF_RT_SAR1_SIZE 0x00000008u\r
-#define CYREG_SAR1_SW0 0x40005b28u\r
-#define CYREG_SAR1_SW2 0x40005b2au\r
-#define CYREG_SAR1_SW3 0x40005b2bu\r
-#define CYREG_SAR1_SW4 0x40005b2cu\r
-#define CYREG_SAR1_SW6 0x40005b2eu\r
-#define CYREG_SAR1_CLK 0x40005b2fu\r
-#define CYDEV_ANAIF_RT_OPAMP0_BASE 0x40005b40u\r
-#define CYDEV_ANAIF_RT_OPAMP0_SIZE 0x00000002u\r
-#define CYREG_OPAMP0_MX 0x40005b40u\r
-#define CYREG_OPAMP0_SW 0x40005b41u\r
-#define CYDEV_ANAIF_RT_OPAMP1_BASE 0x40005b42u\r
-#define CYDEV_ANAIF_RT_OPAMP1_SIZE 0x00000002u\r
-#define CYREG_OPAMP1_MX 0x40005b42u\r
-#define CYREG_OPAMP1_SW 0x40005b43u\r
-#define CYDEV_ANAIF_RT_OPAMP2_BASE 0x40005b44u\r
-#define CYDEV_ANAIF_RT_OPAMP2_SIZE 0x00000002u\r
-#define CYREG_OPAMP2_MX 0x40005b44u\r
-#define CYREG_OPAMP2_SW 0x40005b45u\r
-#define CYDEV_ANAIF_RT_OPAMP3_BASE 0x40005b46u\r
-#define CYDEV_ANAIF_RT_OPAMP3_SIZE 0x00000002u\r
-#define CYREG_OPAMP3_MX 0x40005b46u\r
-#define CYREG_OPAMP3_SW 0x40005b47u\r
-#define CYDEV_ANAIF_RT_LCDDAC_BASE 0x40005b50u\r
-#define CYDEV_ANAIF_RT_LCDDAC_SIZE 0x00000005u\r
-#define CYREG_LCDDAC_SW0 0x40005b50u\r
-#define CYREG_LCDDAC_SW1 0x40005b51u\r
-#define CYREG_LCDDAC_SW2 0x40005b52u\r
-#define CYREG_LCDDAC_SW3 0x40005b53u\r
-#define CYREG_LCDDAC_SW4 0x40005b54u\r
-#define CYDEV_ANAIF_RT_SC_BASE 0x40005b56u\r
-#define CYDEV_ANAIF_RT_SC_SIZE 0x00000001u\r
-#define CYREG_SC_MISC 0x40005b56u\r
-#define CYDEV_ANAIF_RT_BUS_BASE 0x40005b58u\r
-#define CYDEV_ANAIF_RT_BUS_SIZE 0x00000004u\r
-#define CYREG_BUS_SW0 0x40005b58u\r
-#define CYREG_BUS_SW2 0x40005b5au\r
-#define CYREG_BUS_SW3 0x40005b5bu\r
-#define CYDEV_ANAIF_RT_DFT_BASE 0x40005b5cu\r
-#define CYDEV_ANAIF_RT_DFT_SIZE 0x00000006u\r
-#define CYREG_DFT_CR0 0x40005b5cu\r
-#define CYREG_DFT_CR1 0x40005b5du\r
-#define CYREG_DFT_CR2 0x40005b5eu\r
-#define CYREG_DFT_CR3 0x40005b5fu\r
-#define CYREG_DFT_CR4 0x40005b60u\r
-#define CYREG_DFT_CR5 0x40005b61u\r
-#define CYDEV_ANAIF_WRK_BASE 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_SIZE 0x00000029u\r
-#define CYDEV_ANAIF_WRK_DAC0_BASE 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_DAC0_SIZE 0x00000001u\r
-#define CYREG_DAC0_D 0x40005b80u\r
-#define CYDEV_ANAIF_WRK_DAC1_BASE 0x40005b81u\r
-#define CYDEV_ANAIF_WRK_DAC1_SIZE 0x00000001u\r
-#define CYREG_DAC1_D 0x40005b81u\r
-#define CYDEV_ANAIF_WRK_DAC2_BASE 0x40005b82u\r
-#define CYDEV_ANAIF_WRK_DAC2_SIZE 0x00000001u\r
-#define CYREG_DAC2_D 0x40005b82u\r
-#define CYDEV_ANAIF_WRK_DAC3_BASE 0x40005b83u\r
-#define CYDEV_ANAIF_WRK_DAC3_SIZE 0x00000001u\r
-#define CYREG_DAC3_D 0x40005b83u\r
-#define CYDEV_ANAIF_WRK_DSM0_BASE 0x40005b88u\r
-#define CYDEV_ANAIF_WRK_DSM0_SIZE 0x00000002u\r
-#define CYREG_DSM0_OUT0 0x40005b88u\r
-#define CYREG_DSM0_OUT1 0x40005b89u\r
-#define CYDEV_ANAIF_WRK_LUT_BASE 0x40005b90u\r
-#define CYDEV_ANAIF_WRK_LUT_SIZE 0x00000005u\r
-#define CYREG_LUT_SR 0x40005b90u\r
-#define CYREG_LUT_WRK1 0x40005b91u\r
-#define CYREG_LUT_MSK 0x40005b92u\r
-#define CYREG_LUT_CLK 0x40005b93u\r
-#define CYREG_LUT_CPTR 0x40005b94u\r
-#define CYDEV_ANAIF_WRK_CMP_BASE 0x40005b96u\r
-#define CYDEV_ANAIF_WRK_CMP_SIZE 0x00000002u\r
-#define CYREG_CMP_WRK 0x40005b96u\r
-#define CYREG_CMP_TST 0x40005b97u\r
-#define CYDEV_ANAIF_WRK_SC_BASE 0x40005b98u\r
-#define CYDEV_ANAIF_WRK_SC_SIZE 0x00000005u\r
-#define CYREG_SC_SR 0x40005b98u\r
-#define CYREG_SC_WRK1 0x40005b99u\r
-#define CYREG_SC_MSK 0x40005b9au\r
-#define CYREG_SC_CMPINV 0x40005b9bu\r
-#define CYREG_SC_CPTR 0x40005b9cu\r
-#define CYDEV_ANAIF_WRK_SAR0_BASE 0x40005ba0u\r
-#define CYDEV_ANAIF_WRK_SAR0_SIZE 0x00000002u\r
-#define CYREG_SAR0_WRK0 0x40005ba0u\r
-#define CYREG_SAR0_WRK1 0x40005ba1u\r
-#define CYDEV_ANAIF_WRK_SAR1_BASE 0x40005ba2u\r
-#define CYDEV_ANAIF_WRK_SAR1_SIZE 0x00000002u\r
-#define CYREG_SAR1_WRK0 0x40005ba2u\r
-#define CYREG_SAR1_WRK1 0x40005ba3u\r
-#define CYDEV_ANAIF_WRK_SARS_BASE 0x40005ba8u\r
-#define CYDEV_ANAIF_WRK_SARS_SIZE 0x00000001u\r
-#define CYREG_ANAIF_WRK_SARS_SOF 0x40005ba8u\r
-#define CYDEV_USB_BASE 0x40006000u\r
-#define CYDEV_USB_SIZE 0x00000300u\r
-#define CYREG_USB_EP0_DR0 0x40006000u\r
-#define CYREG_USB_EP0_DR1 0x40006001u\r
-#define CYREG_USB_EP0_DR2 0x40006002u\r
-#define CYREG_USB_EP0_DR3 0x40006003u\r
-#define CYREG_USB_EP0_DR4 0x40006004u\r
-#define CYREG_USB_EP0_DR5 0x40006005u\r
-#define CYREG_USB_EP0_DR6 0x40006006u\r
-#define CYREG_USB_EP0_DR7 0x40006007u\r
-#define CYREG_USB_CR0 0x40006008u\r
-#define CYREG_USB_CR1 0x40006009u\r
-#define CYREG_USB_SIE_EP_INT_EN 0x4000600au\r
-#define CYREG_USB_SIE_EP_INT_SR 0x4000600bu\r
-#define CYDEV_USB_SIE_EP1_BASE 0x4000600cu\r
-#define CYDEV_USB_SIE_EP1_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP1_CNT0 0x4000600cu\r
-#define CYREG_USB_SIE_EP1_CNT1 0x4000600du\r
-#define CYREG_USB_SIE_EP1_CR0 0x4000600eu\r
-#define CYREG_USB_USBIO_CR0 0x40006010u\r
-#define CYREG_USB_USBIO_CR1 0x40006012u\r
-#define CYREG_USB_DYN_RECONFIG 0x40006014u\r
-#define CYREG_USB_SOF0 0x40006018u\r
-#define CYREG_USB_SOF1 0x40006019u\r
-#define CYDEV_USB_SIE_EP2_BASE 0x4000601cu\r
-#define CYDEV_USB_SIE_EP2_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP2_CNT0 0x4000601cu\r
-#define CYREG_USB_SIE_EP2_CNT1 0x4000601du\r
-#define CYREG_USB_SIE_EP2_CR0 0x4000601eu\r
-#define CYREG_USB_EP0_CR 0x40006028u\r
-#define CYREG_USB_EP0_CNT 0x40006029u\r
-#define CYDEV_USB_SIE_EP3_BASE 0x4000602cu\r
-#define CYDEV_USB_SIE_EP3_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP3_CNT0 0x4000602cu\r
-#define CYREG_USB_SIE_EP3_CNT1 0x4000602du\r
-#define CYREG_USB_SIE_EP3_CR0 0x4000602eu\r
-#define CYDEV_USB_SIE_EP4_BASE 0x4000603cu\r
-#define CYDEV_USB_SIE_EP4_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP4_CNT0 0x4000603cu\r
-#define CYREG_USB_SIE_EP4_CNT1 0x4000603du\r
-#define CYREG_USB_SIE_EP4_CR0 0x4000603eu\r
-#define CYDEV_USB_SIE_EP5_BASE 0x4000604cu\r
-#define CYDEV_USB_SIE_EP5_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP5_CNT0 0x4000604cu\r
-#define CYREG_USB_SIE_EP5_CNT1 0x4000604du\r
-#define CYREG_USB_SIE_EP5_CR0 0x4000604eu\r
-#define CYDEV_USB_SIE_EP6_BASE 0x4000605cu\r
-#define CYDEV_USB_SIE_EP6_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP6_CNT0 0x4000605cu\r
-#define CYREG_USB_SIE_EP6_CNT1 0x4000605du\r
-#define CYREG_USB_SIE_EP6_CR0 0x4000605eu\r
-#define CYDEV_USB_SIE_EP7_BASE 0x4000606cu\r
-#define CYDEV_USB_SIE_EP7_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP7_CNT0 0x4000606cu\r
-#define CYREG_USB_SIE_EP7_CNT1 0x4000606du\r
-#define CYREG_USB_SIE_EP7_CR0 0x4000606eu\r
-#define CYDEV_USB_SIE_EP8_BASE 0x4000607cu\r
-#define CYDEV_USB_SIE_EP8_SIZE 0x00000003u\r
-#define CYREG_USB_SIE_EP8_CNT0 0x4000607cu\r
-#define CYREG_USB_SIE_EP8_CNT1 0x4000607du\r
-#define CYREG_USB_SIE_EP8_CR0 0x4000607eu\r
-#define CYDEV_USB_ARB_EP1_BASE 0x40006080u\r
-#define CYDEV_USB_ARB_EP1_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP1_CFG 0x40006080u\r
-#define CYREG_USB_ARB_EP1_INT_EN 0x40006081u\r
-#define CYREG_USB_ARB_EP1_SR 0x40006082u\r
-#define CYDEV_USB_ARB_RW1_BASE 0x40006084u\r
-#define CYDEV_USB_ARB_RW1_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW1_WA 0x40006084u\r
-#define CYREG_USB_ARB_RW1_WA_MSB 0x40006085u\r
-#define CYREG_USB_ARB_RW1_RA 0x40006086u\r
-#define CYREG_USB_ARB_RW1_RA_MSB 0x40006087u\r
-#define CYREG_USB_ARB_RW1_DR 0x40006088u\r
-#define CYREG_USB_BUF_SIZE 0x4000608cu\r
-#define CYREG_USB_EP_ACTIVE 0x4000608eu\r
-#define CYREG_USB_EP_TYPE 0x4000608fu\r
-#define CYDEV_USB_ARB_EP2_BASE 0x40006090u\r
-#define CYDEV_USB_ARB_EP2_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP2_CFG 0x40006090u\r
-#define CYREG_USB_ARB_EP2_INT_EN 0x40006091u\r
-#define CYREG_USB_ARB_EP2_SR 0x40006092u\r
-#define CYDEV_USB_ARB_RW2_BASE 0x40006094u\r
-#define CYDEV_USB_ARB_RW2_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW2_WA 0x40006094u\r
-#define CYREG_USB_ARB_RW2_WA_MSB 0x40006095u\r
-#define CYREG_USB_ARB_RW2_RA 0x40006096u\r
-#define CYREG_USB_ARB_RW2_RA_MSB 0x40006097u\r
-#define CYREG_USB_ARB_RW2_DR 0x40006098u\r
-#define CYREG_USB_ARB_CFG 0x4000609cu\r
-#define CYREG_USB_USB_CLK_EN 0x4000609du\r
-#define CYREG_USB_ARB_INT_EN 0x4000609eu\r
-#define CYREG_USB_ARB_INT_SR 0x4000609fu\r
-#define CYDEV_USB_ARB_EP3_BASE 0x400060a0u\r
-#define CYDEV_USB_ARB_EP3_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP3_CFG 0x400060a0u\r
-#define CYREG_USB_ARB_EP3_INT_EN 0x400060a1u\r
-#define CYREG_USB_ARB_EP3_SR 0x400060a2u\r
-#define CYDEV_USB_ARB_RW3_BASE 0x400060a4u\r
-#define CYDEV_USB_ARB_RW3_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW3_WA 0x400060a4u\r
-#define CYREG_USB_ARB_RW3_WA_MSB 0x400060a5u\r
-#define CYREG_USB_ARB_RW3_RA 0x400060a6u\r
-#define CYREG_USB_ARB_RW3_RA_MSB 0x400060a7u\r
-#define CYREG_USB_ARB_RW3_DR 0x400060a8u\r
-#define CYREG_USB_CWA 0x400060acu\r
-#define CYREG_USB_CWA_MSB 0x400060adu\r
-#define CYDEV_USB_ARB_EP4_BASE 0x400060b0u\r
-#define CYDEV_USB_ARB_EP4_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP4_CFG 0x400060b0u\r
-#define CYREG_USB_ARB_EP4_INT_EN 0x400060b1u\r
-#define CYREG_USB_ARB_EP4_SR 0x400060b2u\r
-#define CYDEV_USB_ARB_RW4_BASE 0x400060b4u\r
-#define CYDEV_USB_ARB_RW4_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW4_WA 0x400060b4u\r
-#define CYREG_USB_ARB_RW4_WA_MSB 0x400060b5u\r
-#define CYREG_USB_ARB_RW4_RA 0x400060b6u\r
-#define CYREG_USB_ARB_RW4_RA_MSB 0x400060b7u\r
-#define CYREG_USB_ARB_RW4_DR 0x400060b8u\r
-#define CYREG_USB_DMA_THRES 0x400060bcu\r
-#define CYREG_USB_DMA_THRES_MSB 0x400060bdu\r
-#define CYDEV_USB_ARB_EP5_BASE 0x400060c0u\r
-#define CYDEV_USB_ARB_EP5_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP5_CFG 0x400060c0u\r
-#define CYREG_USB_ARB_EP5_INT_EN 0x400060c1u\r
-#define CYREG_USB_ARB_EP5_SR 0x400060c2u\r
-#define CYDEV_USB_ARB_RW5_BASE 0x400060c4u\r
-#define CYDEV_USB_ARB_RW5_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW5_WA 0x400060c4u\r
-#define CYREG_USB_ARB_RW5_WA_MSB 0x400060c5u\r
-#define CYREG_USB_ARB_RW5_RA 0x400060c6u\r
-#define CYREG_USB_ARB_RW5_RA_MSB 0x400060c7u\r
-#define CYREG_USB_ARB_RW5_DR 0x400060c8u\r
-#define CYREG_USB_BUS_RST_CNT 0x400060ccu\r
-#define CYDEV_USB_ARB_EP6_BASE 0x400060d0u\r
-#define CYDEV_USB_ARB_EP6_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP6_CFG 0x400060d0u\r
-#define CYREG_USB_ARB_EP6_INT_EN 0x400060d1u\r
-#define CYREG_USB_ARB_EP6_SR 0x400060d2u\r
-#define CYDEV_USB_ARB_RW6_BASE 0x400060d4u\r
-#define CYDEV_USB_ARB_RW6_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW6_WA 0x400060d4u\r
-#define CYREG_USB_ARB_RW6_WA_MSB 0x400060d5u\r
-#define CYREG_USB_ARB_RW6_RA 0x400060d6u\r
-#define CYREG_USB_ARB_RW6_RA_MSB 0x400060d7u\r
-#define CYREG_USB_ARB_RW6_DR 0x400060d8u\r
-#define CYDEV_USB_ARB_EP7_BASE 0x400060e0u\r
-#define CYDEV_USB_ARB_EP7_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP7_CFG 0x400060e0u\r
-#define CYREG_USB_ARB_EP7_INT_EN 0x400060e1u\r
-#define CYREG_USB_ARB_EP7_SR 0x400060e2u\r
-#define CYDEV_USB_ARB_RW7_BASE 0x400060e4u\r
-#define CYDEV_USB_ARB_RW7_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW7_WA 0x400060e4u\r
-#define CYREG_USB_ARB_RW7_WA_MSB 0x400060e5u\r
-#define CYREG_USB_ARB_RW7_RA 0x400060e6u\r
-#define CYREG_USB_ARB_RW7_RA_MSB 0x400060e7u\r
-#define CYREG_USB_ARB_RW7_DR 0x400060e8u\r
-#define CYDEV_USB_ARB_EP8_BASE 0x400060f0u\r
-#define CYDEV_USB_ARB_EP8_SIZE 0x00000003u\r
-#define CYREG_USB_ARB_EP8_CFG 0x400060f0u\r
-#define CYREG_USB_ARB_EP8_INT_EN 0x400060f1u\r
-#define CYREG_USB_ARB_EP8_SR 0x400060f2u\r
-#define CYDEV_USB_ARB_RW8_BASE 0x400060f4u\r
-#define CYDEV_USB_ARB_RW8_SIZE 0x00000005u\r
-#define CYREG_USB_ARB_RW8_WA 0x400060f4u\r
-#define CYREG_USB_ARB_RW8_WA_MSB 0x400060f5u\r
-#define CYREG_USB_ARB_RW8_RA 0x400060f6u\r
-#define CYREG_USB_ARB_RW8_RA_MSB 0x400060f7u\r
-#define CYREG_USB_ARB_RW8_DR 0x400060f8u\r
-#define CYDEV_USB_MEM_BASE 0x40006100u\r
-#define CYDEV_USB_MEM_SIZE 0x00000200u\r
-#define CYREG_USB_MEM_DATA_MBASE 0x40006100u\r
-#define CYREG_USB_MEM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_UWRK_BASE 0x40006400u\r
-#define CYDEV_UWRK_SIZE 0x00000b60u\r
-#define CYDEV_UWRK_UWRK8_BASE 0x40006400u\r
-#define CYDEV_UWRK_UWRK8_SIZE 0x000003b0u\r
-#define CYDEV_UWRK_UWRK8_B0_BASE 0x40006400u\r
-#define CYDEV_UWRK_UWRK8_B0_SIZE 0x000000b0u\r
-#define CYREG_B0_UDB00_A0 0x40006400u\r
-#define CYREG_B0_UDB01_A0 0x40006401u\r
-#define CYREG_B0_UDB02_A0 0x40006402u\r
-#define CYREG_B0_UDB03_A0 0x40006403u\r
-#define CYREG_B0_UDB04_A0 0x40006404u\r
-#define CYREG_B0_UDB05_A0 0x40006405u\r
-#define CYREG_B0_UDB06_A0 0x40006406u\r
-#define CYREG_B0_UDB07_A0 0x40006407u\r
-#define CYREG_B0_UDB08_A0 0x40006408u\r
-#define CYREG_B0_UDB09_A0 0x40006409u\r
-#define CYREG_B0_UDB10_A0 0x4000640au\r
-#define CYREG_B0_UDB11_A0 0x4000640bu\r
-#define CYREG_B0_UDB12_A0 0x4000640cu\r
-#define CYREG_B0_UDB13_A0 0x4000640du\r
-#define CYREG_B0_UDB14_A0 0x4000640eu\r
-#define CYREG_B0_UDB15_A0 0x4000640fu\r
-#define CYREG_B0_UDB00_A1 0x40006410u\r
-#define CYREG_B0_UDB01_A1 0x40006411u\r
-#define CYREG_B0_UDB02_A1 0x40006412u\r
-#define CYREG_B0_UDB03_A1 0x40006413u\r
-#define CYREG_B0_UDB04_A1 0x40006414u\r
-#define CYREG_B0_UDB05_A1 0x40006415u\r
-#define CYREG_B0_UDB06_A1 0x40006416u\r
-#define CYREG_B0_UDB07_A1 0x40006417u\r
-#define CYREG_B0_UDB08_A1 0x40006418u\r
-#define CYREG_B0_UDB09_A1 0x40006419u\r
-#define CYREG_B0_UDB10_A1 0x4000641au\r
-#define CYREG_B0_UDB11_A1 0x4000641bu\r
-#define CYREG_B0_UDB12_A1 0x4000641cu\r
-#define CYREG_B0_UDB13_A1 0x4000641du\r
-#define CYREG_B0_UDB14_A1 0x4000641eu\r
-#define CYREG_B0_UDB15_A1 0x4000641fu\r
-#define CYREG_B0_UDB00_D0 0x40006420u\r
-#define CYREG_B0_UDB01_D0 0x40006421u\r
-#define CYREG_B0_UDB02_D0 0x40006422u\r
-#define CYREG_B0_UDB03_D0 0x40006423u\r
-#define CYREG_B0_UDB04_D0 0x40006424u\r
-#define CYREG_B0_UDB05_D0 0x40006425u\r
-#define CYREG_B0_UDB06_D0 0x40006426u\r
-#define CYREG_B0_UDB07_D0 0x40006427u\r
-#define CYREG_B0_UDB08_D0 0x40006428u\r
-#define CYREG_B0_UDB09_D0 0x40006429u\r
-#define CYREG_B0_UDB10_D0 0x4000642au\r
-#define CYREG_B0_UDB11_D0 0x4000642bu\r
-#define CYREG_B0_UDB12_D0 0x4000642cu\r
-#define CYREG_B0_UDB13_D0 0x4000642du\r
-#define CYREG_B0_UDB14_D0 0x4000642eu\r
-#define CYREG_B0_UDB15_D0 0x4000642fu\r
-#define CYREG_B0_UDB00_D1 0x40006430u\r
-#define CYREG_B0_UDB01_D1 0x40006431u\r
-#define CYREG_B0_UDB02_D1 0x40006432u\r
-#define CYREG_B0_UDB03_D1 0x40006433u\r
-#define CYREG_B0_UDB04_D1 0x40006434u\r
-#define CYREG_B0_UDB05_D1 0x40006435u\r
-#define CYREG_B0_UDB06_D1 0x40006436u\r
-#define CYREG_B0_UDB07_D1 0x40006437u\r
-#define CYREG_B0_UDB08_D1 0x40006438u\r
-#define CYREG_B0_UDB09_D1 0x40006439u\r
-#define CYREG_B0_UDB10_D1 0x4000643au\r
-#define CYREG_B0_UDB11_D1 0x4000643bu\r
-#define CYREG_B0_UDB12_D1 0x4000643cu\r
-#define CYREG_B0_UDB13_D1 0x4000643du\r
-#define CYREG_B0_UDB14_D1 0x4000643eu\r
-#define CYREG_B0_UDB15_D1 0x4000643fu\r
-#define CYREG_B0_UDB00_F0 0x40006440u\r
-#define CYREG_B0_UDB01_F0 0x40006441u\r
-#define CYREG_B0_UDB02_F0 0x40006442u\r
-#define CYREG_B0_UDB03_F0 0x40006443u\r
-#define CYREG_B0_UDB04_F0 0x40006444u\r
-#define CYREG_B0_UDB05_F0 0x40006445u\r
-#define CYREG_B0_UDB06_F0 0x40006446u\r
-#define CYREG_B0_UDB07_F0 0x40006447u\r
-#define CYREG_B0_UDB08_F0 0x40006448u\r
-#define CYREG_B0_UDB09_F0 0x40006449u\r
-#define CYREG_B0_UDB10_F0 0x4000644au\r
-#define CYREG_B0_UDB11_F0 0x4000644bu\r
-#define CYREG_B0_UDB12_F0 0x4000644cu\r
-#define CYREG_B0_UDB13_F0 0x4000644du\r
-#define CYREG_B0_UDB14_F0 0x4000644eu\r
-#define CYREG_B0_UDB15_F0 0x4000644fu\r
-#define CYREG_B0_UDB00_F1 0x40006450u\r
-#define CYREG_B0_UDB01_F1 0x40006451u\r
-#define CYREG_B0_UDB02_F1 0x40006452u\r
-#define CYREG_B0_UDB03_F1 0x40006453u\r
-#define CYREG_B0_UDB04_F1 0x40006454u\r
-#define CYREG_B0_UDB05_F1 0x40006455u\r
-#define CYREG_B0_UDB06_F1 0x40006456u\r
-#define CYREG_B0_UDB07_F1 0x40006457u\r
-#define CYREG_B0_UDB08_F1 0x40006458u\r
-#define CYREG_B0_UDB09_F1 0x40006459u\r
-#define CYREG_B0_UDB10_F1 0x4000645au\r
-#define CYREG_B0_UDB11_F1 0x4000645bu\r
-#define CYREG_B0_UDB12_F1 0x4000645cu\r
-#define CYREG_B0_UDB13_F1 0x4000645du\r
-#define CYREG_B0_UDB14_F1 0x4000645eu\r
-#define CYREG_B0_UDB15_F1 0x4000645fu\r
-#define CYREG_B0_UDB00_ST 0x40006460u\r
-#define CYREG_B0_UDB01_ST 0x40006461u\r
-#define CYREG_B0_UDB02_ST 0x40006462u\r
-#define CYREG_B0_UDB03_ST 0x40006463u\r
-#define CYREG_B0_UDB04_ST 0x40006464u\r
-#define CYREG_B0_UDB05_ST 0x40006465u\r
-#define CYREG_B0_UDB06_ST 0x40006466u\r
-#define CYREG_B0_UDB07_ST 0x40006467u\r
-#define CYREG_B0_UDB08_ST 0x40006468u\r
-#define CYREG_B0_UDB09_ST 0x40006469u\r
-#define CYREG_B0_UDB10_ST 0x4000646au\r
-#define CYREG_B0_UDB11_ST 0x4000646bu\r
-#define CYREG_B0_UDB12_ST 0x4000646cu\r
-#define CYREG_B0_UDB13_ST 0x4000646du\r
-#define CYREG_B0_UDB14_ST 0x4000646eu\r
-#define CYREG_B0_UDB15_ST 0x4000646fu\r
-#define CYREG_B0_UDB00_CTL 0x40006470u\r
-#define CYREG_B0_UDB01_CTL 0x40006471u\r
-#define CYREG_B0_UDB02_CTL 0x40006472u\r
-#define CYREG_B0_UDB03_CTL 0x40006473u\r
-#define CYREG_B0_UDB04_CTL 0x40006474u\r
-#define CYREG_B0_UDB05_CTL 0x40006475u\r
-#define CYREG_B0_UDB06_CTL 0x40006476u\r
-#define CYREG_B0_UDB07_CTL 0x40006477u\r
-#define CYREG_B0_UDB08_CTL 0x40006478u\r
-#define CYREG_B0_UDB09_CTL 0x40006479u\r
-#define CYREG_B0_UDB10_CTL 0x4000647au\r
-#define CYREG_B0_UDB11_CTL 0x4000647bu\r
-#define CYREG_B0_UDB12_CTL 0x4000647cu\r
-#define CYREG_B0_UDB13_CTL 0x4000647du\r
-#define CYREG_B0_UDB14_CTL 0x4000647eu\r
-#define CYREG_B0_UDB15_CTL 0x4000647fu\r
-#define CYREG_B0_UDB00_MSK 0x40006480u\r
-#define CYREG_B0_UDB01_MSK 0x40006481u\r
-#define CYREG_B0_UDB02_MSK 0x40006482u\r
-#define CYREG_B0_UDB03_MSK 0x40006483u\r
-#define CYREG_B0_UDB04_MSK 0x40006484u\r
-#define CYREG_B0_UDB05_MSK 0x40006485u\r
-#define CYREG_B0_UDB06_MSK 0x40006486u\r
-#define CYREG_B0_UDB07_MSK 0x40006487u\r
-#define CYREG_B0_UDB08_MSK 0x40006488u\r
-#define CYREG_B0_UDB09_MSK 0x40006489u\r
-#define CYREG_B0_UDB10_MSK 0x4000648au\r
-#define CYREG_B0_UDB11_MSK 0x4000648bu\r
-#define CYREG_B0_UDB12_MSK 0x4000648cu\r
-#define CYREG_B0_UDB13_MSK 0x4000648du\r
-#define CYREG_B0_UDB14_MSK 0x4000648eu\r
-#define CYREG_B0_UDB15_MSK 0x4000648fu\r
-#define CYREG_B0_UDB00_ACTL 0x40006490u\r
-#define CYREG_B0_UDB01_ACTL 0x40006491u\r
-#define CYREG_B0_UDB02_ACTL 0x40006492u\r
-#define CYREG_B0_UDB03_ACTL 0x40006493u\r
-#define CYREG_B0_UDB04_ACTL 0x40006494u\r
-#define CYREG_B0_UDB05_ACTL 0x40006495u\r
-#define CYREG_B0_UDB06_ACTL 0x40006496u\r
-#define CYREG_B0_UDB07_ACTL 0x40006497u\r
-#define CYREG_B0_UDB08_ACTL 0x40006498u\r
-#define CYREG_B0_UDB09_ACTL 0x40006499u\r
-#define CYREG_B0_UDB10_ACTL 0x4000649au\r
-#define CYREG_B0_UDB11_ACTL 0x4000649bu\r
-#define CYREG_B0_UDB12_ACTL 0x4000649cu\r
-#define CYREG_B0_UDB13_ACTL 0x4000649du\r
-#define CYREG_B0_UDB14_ACTL 0x4000649eu\r
-#define CYREG_B0_UDB15_ACTL 0x4000649fu\r
-#define CYREG_B0_UDB00_MC 0x400064a0u\r
-#define CYREG_B0_UDB01_MC 0x400064a1u\r
-#define CYREG_B0_UDB02_MC 0x400064a2u\r
-#define CYREG_B0_UDB03_MC 0x400064a3u\r
-#define CYREG_B0_UDB04_MC 0x400064a4u\r
-#define CYREG_B0_UDB05_MC 0x400064a5u\r
-#define CYREG_B0_UDB06_MC 0x400064a6u\r
-#define CYREG_B0_UDB07_MC 0x400064a7u\r
-#define CYREG_B0_UDB08_MC 0x400064a8u\r
-#define CYREG_B0_UDB09_MC 0x400064a9u\r
-#define CYREG_B0_UDB10_MC 0x400064aau\r
-#define CYREG_B0_UDB11_MC 0x400064abu\r
-#define CYREG_B0_UDB12_MC 0x400064acu\r
-#define CYREG_B0_UDB13_MC 0x400064adu\r
-#define CYREG_B0_UDB14_MC 0x400064aeu\r
-#define CYREG_B0_UDB15_MC 0x400064afu\r
-#define CYDEV_UWRK_UWRK8_B1_BASE 0x40006500u\r
-#define CYDEV_UWRK_UWRK8_B1_SIZE 0x000000b0u\r
-#define CYREG_B1_UDB04_A0 0x40006504u\r
-#define CYREG_B1_UDB05_A0 0x40006505u\r
-#define CYREG_B1_UDB06_A0 0x40006506u\r
-#define CYREG_B1_UDB07_A0 0x40006507u\r
-#define CYREG_B1_UDB08_A0 0x40006508u\r
-#define CYREG_B1_UDB09_A0 0x40006509u\r
-#define CYREG_B1_UDB10_A0 0x4000650au\r
-#define CYREG_B1_UDB11_A0 0x4000650bu\r
-#define CYREG_B1_UDB04_A1 0x40006514u\r
-#define CYREG_B1_UDB05_A1 0x40006515u\r
-#define CYREG_B1_UDB06_A1 0x40006516u\r
-#define CYREG_B1_UDB07_A1 0x40006517u\r
-#define CYREG_B1_UDB08_A1 0x40006518u\r
-#define CYREG_B1_UDB09_A1 0x40006519u\r
-#define CYREG_B1_UDB10_A1 0x4000651au\r
-#define CYREG_B1_UDB11_A1 0x4000651bu\r
-#define CYREG_B1_UDB04_D0 0x40006524u\r
-#define CYREG_B1_UDB05_D0 0x40006525u\r
-#define CYREG_B1_UDB06_D0 0x40006526u\r
-#define CYREG_B1_UDB07_D0 0x40006527u\r
-#define CYREG_B1_UDB08_D0 0x40006528u\r
-#define CYREG_B1_UDB09_D0 0x40006529u\r
-#define CYREG_B1_UDB10_D0 0x4000652au\r
-#define CYREG_B1_UDB11_D0 0x4000652bu\r
-#define CYREG_B1_UDB04_D1 0x40006534u\r
-#define CYREG_B1_UDB05_D1 0x40006535u\r
-#define CYREG_B1_UDB06_D1 0x40006536u\r
-#define CYREG_B1_UDB07_D1 0x40006537u\r
-#define CYREG_B1_UDB08_D1 0x40006538u\r
-#define CYREG_B1_UDB09_D1 0x40006539u\r
-#define CYREG_B1_UDB10_D1 0x4000653au\r
-#define CYREG_B1_UDB11_D1 0x4000653bu\r
-#define CYREG_B1_UDB04_F0 0x40006544u\r
-#define CYREG_B1_UDB05_F0 0x40006545u\r
-#define CYREG_B1_UDB06_F0 0x40006546u\r
-#define CYREG_B1_UDB07_F0 0x40006547u\r
-#define CYREG_B1_UDB08_F0 0x40006548u\r
-#define CYREG_B1_UDB09_F0 0x40006549u\r
-#define CYREG_B1_UDB10_F0 0x4000654au\r
-#define CYREG_B1_UDB11_F0 0x4000654bu\r
-#define CYREG_B1_UDB04_F1 0x40006554u\r
-#define CYREG_B1_UDB05_F1 0x40006555u\r
-#define CYREG_B1_UDB06_F1 0x40006556u\r
-#define CYREG_B1_UDB07_F1 0x40006557u\r
-#define CYREG_B1_UDB08_F1 0x40006558u\r
-#define CYREG_B1_UDB09_F1 0x40006559u\r
-#define CYREG_B1_UDB10_F1 0x4000655au\r
-#define CYREG_B1_UDB11_F1 0x4000655bu\r
-#define CYREG_B1_UDB04_ST 0x40006564u\r
-#define CYREG_B1_UDB05_ST 0x40006565u\r
-#define CYREG_B1_UDB06_ST 0x40006566u\r
-#define CYREG_B1_UDB07_ST 0x40006567u\r
-#define CYREG_B1_UDB08_ST 0x40006568u\r
-#define CYREG_B1_UDB09_ST 0x40006569u\r
-#define CYREG_B1_UDB10_ST 0x4000656au\r
-#define CYREG_B1_UDB11_ST 0x4000656bu\r
-#define CYREG_B1_UDB04_CTL 0x40006574u\r
-#define CYREG_B1_UDB05_CTL 0x40006575u\r
-#define CYREG_B1_UDB06_CTL 0x40006576u\r
-#define CYREG_B1_UDB07_CTL 0x40006577u\r
-#define CYREG_B1_UDB08_CTL 0x40006578u\r
-#define CYREG_B1_UDB09_CTL 0x40006579u\r
-#define CYREG_B1_UDB10_CTL 0x4000657au\r
-#define CYREG_B1_UDB11_CTL 0x4000657bu\r
-#define CYREG_B1_UDB04_MSK 0x40006584u\r
-#define CYREG_B1_UDB05_MSK 0x40006585u\r
-#define CYREG_B1_UDB06_MSK 0x40006586u\r
-#define CYREG_B1_UDB07_MSK 0x40006587u\r
-#define CYREG_B1_UDB08_MSK 0x40006588u\r
-#define CYREG_B1_UDB09_MSK 0x40006589u\r
-#define CYREG_B1_UDB10_MSK 0x4000658au\r
-#define CYREG_B1_UDB11_MSK 0x4000658bu\r
-#define CYREG_B1_UDB04_ACTL 0x40006594u\r
-#define CYREG_B1_UDB05_ACTL 0x40006595u\r
-#define CYREG_B1_UDB06_ACTL 0x40006596u\r
-#define CYREG_B1_UDB07_ACTL 0x40006597u\r
-#define CYREG_B1_UDB08_ACTL 0x40006598u\r
-#define CYREG_B1_UDB09_ACTL 0x40006599u\r
-#define CYREG_B1_UDB10_ACTL 0x4000659au\r
-#define CYREG_B1_UDB11_ACTL 0x4000659bu\r
-#define CYREG_B1_UDB04_MC 0x400065a4u\r
-#define CYREG_B1_UDB05_MC 0x400065a5u\r
-#define CYREG_B1_UDB06_MC 0x400065a6u\r
-#define CYREG_B1_UDB07_MC 0x400065a7u\r
-#define CYREG_B1_UDB08_MC 0x400065a8u\r
-#define CYREG_B1_UDB09_MC 0x400065a9u\r
-#define CYREG_B1_UDB10_MC 0x400065aau\r
-#define CYREG_B1_UDB11_MC 0x400065abu\r
-#define CYDEV_UWRK_UWRK16_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_SIZE 0x00000760u\r
-#define CYDEV_UWRK_UWRK16_CAT_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_CAT_SIZE 0x00000760u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_SIZE 0x00000160u\r
-#define CYREG_B0_UDB00_A0_A1 0x40006800u\r
-#define CYREG_B0_UDB01_A0_A1 0x40006802u\r
-#define CYREG_B0_UDB02_A0_A1 0x40006804u\r
-#define CYREG_B0_UDB03_A0_A1 0x40006806u\r
-#define CYREG_B0_UDB04_A0_A1 0x40006808u\r
-#define CYREG_B0_UDB05_A0_A1 0x4000680au\r
-#define CYREG_B0_UDB06_A0_A1 0x4000680cu\r
-#define CYREG_B0_UDB07_A0_A1 0x4000680eu\r
-#define CYREG_B0_UDB08_A0_A1 0x40006810u\r
-#define CYREG_B0_UDB09_A0_A1 0x40006812u\r
-#define CYREG_B0_UDB10_A0_A1 0x40006814u\r
-#define CYREG_B0_UDB11_A0_A1 0x40006816u\r
-#define CYREG_B0_UDB12_A0_A1 0x40006818u\r
-#define CYREG_B0_UDB13_A0_A1 0x4000681au\r
-#define CYREG_B0_UDB14_A0_A1 0x4000681cu\r
-#define CYREG_B0_UDB15_A0_A1 0x4000681eu\r
-#define CYREG_B0_UDB00_D0_D1 0x40006840u\r
-#define CYREG_B0_UDB01_D0_D1 0x40006842u\r
-#define CYREG_B0_UDB02_D0_D1 0x40006844u\r
-#define CYREG_B0_UDB03_D0_D1 0x40006846u\r
-#define CYREG_B0_UDB04_D0_D1 0x40006848u\r
-#define CYREG_B0_UDB05_D0_D1 0x4000684au\r
-#define CYREG_B0_UDB06_D0_D1 0x4000684cu\r
-#define CYREG_B0_UDB07_D0_D1 0x4000684eu\r
-#define CYREG_B0_UDB08_D0_D1 0x40006850u\r
-#define CYREG_B0_UDB09_D0_D1 0x40006852u\r
-#define CYREG_B0_UDB10_D0_D1 0x40006854u\r
-#define CYREG_B0_UDB11_D0_D1 0x40006856u\r
-#define CYREG_B0_UDB12_D0_D1 0x40006858u\r
-#define CYREG_B0_UDB13_D0_D1 0x4000685au\r
-#define CYREG_B0_UDB14_D0_D1 0x4000685cu\r
-#define CYREG_B0_UDB15_D0_D1 0x4000685eu\r
-#define CYREG_B0_UDB00_F0_F1 0x40006880u\r
-#define CYREG_B0_UDB01_F0_F1 0x40006882u\r
-#define CYREG_B0_UDB02_F0_F1 0x40006884u\r
-#define CYREG_B0_UDB03_F0_F1 0x40006886u\r
-#define CYREG_B0_UDB04_F0_F1 0x40006888u\r
-#define CYREG_B0_UDB05_F0_F1 0x4000688au\r
-#define CYREG_B0_UDB06_F0_F1 0x4000688cu\r
-#define CYREG_B0_UDB07_F0_F1 0x4000688eu\r
-#define CYREG_B0_UDB08_F0_F1 0x40006890u\r
-#define CYREG_B0_UDB09_F0_F1 0x40006892u\r
-#define CYREG_B0_UDB10_F0_F1 0x40006894u\r
-#define CYREG_B0_UDB11_F0_F1 0x40006896u\r
-#define CYREG_B0_UDB12_F0_F1 0x40006898u\r
-#define CYREG_B0_UDB13_F0_F1 0x4000689au\r
-#define CYREG_B0_UDB14_F0_F1 0x4000689cu\r
-#define CYREG_B0_UDB15_F0_F1 0x4000689eu\r
-#define CYREG_B0_UDB00_ST_CTL 0x400068c0u\r
-#define CYREG_B0_UDB01_ST_CTL 0x400068c2u\r
-#define CYREG_B0_UDB02_ST_CTL 0x400068c4u\r
-#define CYREG_B0_UDB03_ST_CTL 0x400068c6u\r
-#define CYREG_B0_UDB04_ST_CTL 0x400068c8u\r
-#define CYREG_B0_UDB05_ST_CTL 0x400068cau\r
-#define CYREG_B0_UDB06_ST_CTL 0x400068ccu\r
-#define CYREG_B0_UDB07_ST_CTL 0x400068ceu\r
-#define CYREG_B0_UDB08_ST_CTL 0x400068d0u\r
-#define CYREG_B0_UDB09_ST_CTL 0x400068d2u\r
-#define CYREG_B0_UDB10_ST_CTL 0x400068d4u\r
-#define CYREG_B0_UDB11_ST_CTL 0x400068d6u\r
-#define CYREG_B0_UDB12_ST_CTL 0x400068d8u\r
-#define CYREG_B0_UDB13_ST_CTL 0x400068dau\r
-#define CYREG_B0_UDB14_ST_CTL 0x400068dcu\r
-#define CYREG_B0_UDB15_ST_CTL 0x400068deu\r
-#define CYREG_B0_UDB00_MSK_ACTL 0x40006900u\r
-#define CYREG_B0_UDB01_MSK_ACTL 0x40006902u\r
-#define CYREG_B0_UDB02_MSK_ACTL 0x40006904u\r
-#define CYREG_B0_UDB03_MSK_ACTL 0x40006906u\r
-#define CYREG_B0_UDB04_MSK_ACTL 0x40006908u\r
-#define CYREG_B0_UDB05_MSK_ACTL 0x4000690au\r
-#define CYREG_B0_UDB06_MSK_ACTL 0x4000690cu\r
-#define CYREG_B0_UDB07_MSK_ACTL 0x4000690eu\r
-#define CYREG_B0_UDB08_MSK_ACTL 0x40006910u\r
-#define CYREG_B0_UDB09_MSK_ACTL 0x40006912u\r
-#define CYREG_B0_UDB10_MSK_ACTL 0x40006914u\r
-#define CYREG_B0_UDB11_MSK_ACTL 0x40006916u\r
-#define CYREG_B0_UDB12_MSK_ACTL 0x40006918u\r
-#define CYREG_B0_UDB13_MSK_ACTL 0x4000691au\r
-#define CYREG_B0_UDB14_MSK_ACTL 0x4000691cu\r
-#define CYREG_B0_UDB15_MSK_ACTL 0x4000691eu\r
-#define CYREG_B0_UDB00_MC_00 0x40006940u\r
-#define CYREG_B0_UDB01_MC_00 0x40006942u\r
-#define CYREG_B0_UDB02_MC_00 0x40006944u\r
-#define CYREG_B0_UDB03_MC_00 0x40006946u\r
-#define CYREG_B0_UDB04_MC_00 0x40006948u\r
-#define CYREG_B0_UDB05_MC_00 0x4000694au\r
-#define CYREG_B0_UDB06_MC_00 0x4000694cu\r
-#define CYREG_B0_UDB07_MC_00 0x4000694eu\r
-#define CYREG_B0_UDB08_MC_00 0x40006950u\r
-#define CYREG_B0_UDB09_MC_00 0x40006952u\r
-#define CYREG_B0_UDB10_MC_00 0x40006954u\r
-#define CYREG_B0_UDB11_MC_00 0x40006956u\r
-#define CYREG_B0_UDB12_MC_00 0x40006958u\r
-#define CYREG_B0_UDB13_MC_00 0x4000695au\r
-#define CYREG_B0_UDB14_MC_00 0x4000695cu\r
-#define CYREG_B0_UDB15_MC_00 0x4000695eu\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_BASE 0x40006a00u\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_SIZE 0x00000160u\r
-#define CYREG_B1_UDB04_A0_A1 0x40006a08u\r
-#define CYREG_B1_UDB05_A0_A1 0x40006a0au\r
-#define CYREG_B1_UDB06_A0_A1 0x40006a0cu\r
-#define CYREG_B1_UDB07_A0_A1 0x40006a0eu\r
-#define CYREG_B1_UDB08_A0_A1 0x40006a10u\r
-#define CYREG_B1_UDB09_A0_A1 0x40006a12u\r
-#define CYREG_B1_UDB10_A0_A1 0x40006a14u\r
-#define CYREG_B1_UDB11_A0_A1 0x40006a16u\r
-#define CYREG_B1_UDB04_D0_D1 0x40006a48u\r
-#define CYREG_B1_UDB05_D0_D1 0x40006a4au\r
-#define CYREG_B1_UDB06_D0_D1 0x40006a4cu\r
-#define CYREG_B1_UDB07_D0_D1 0x40006a4eu\r
-#define CYREG_B1_UDB08_D0_D1 0x40006a50u\r
-#define CYREG_B1_UDB09_D0_D1 0x40006a52u\r
-#define CYREG_B1_UDB10_D0_D1 0x40006a54u\r
-#define CYREG_B1_UDB11_D0_D1 0x40006a56u\r
-#define CYREG_B1_UDB04_F0_F1 0x40006a88u\r
-#define CYREG_B1_UDB05_F0_F1 0x40006a8au\r
-#define CYREG_B1_UDB06_F0_F1 0x40006a8cu\r
-#define CYREG_B1_UDB07_F0_F1 0x40006a8eu\r
-#define CYREG_B1_UDB08_F0_F1 0x40006a90u\r
-#define CYREG_B1_UDB09_F0_F1 0x40006a92u\r
-#define CYREG_B1_UDB10_F0_F1 0x40006a94u\r
-#define CYREG_B1_UDB11_F0_F1 0x40006a96u\r
-#define CYREG_B1_UDB04_ST_CTL 0x40006ac8u\r
-#define CYREG_B1_UDB05_ST_CTL 0x40006acau\r
-#define CYREG_B1_UDB06_ST_CTL 0x40006accu\r
-#define CYREG_B1_UDB07_ST_CTL 0x40006aceu\r
-#define CYREG_B1_UDB08_ST_CTL 0x40006ad0u\r
-#define CYREG_B1_UDB09_ST_CTL 0x40006ad2u\r
-#define CYREG_B1_UDB10_ST_CTL 0x40006ad4u\r
-#define CYREG_B1_UDB11_ST_CTL 0x40006ad6u\r
-#define CYREG_B1_UDB04_MSK_ACTL 0x40006b08u\r
-#define CYREG_B1_UDB05_MSK_ACTL 0x40006b0au\r
-#define CYREG_B1_UDB06_MSK_ACTL 0x40006b0cu\r
-#define CYREG_B1_UDB07_MSK_ACTL 0x40006b0eu\r
-#define CYREG_B1_UDB08_MSK_ACTL 0x40006b10u\r
-#define CYREG_B1_UDB09_MSK_ACTL 0x40006b12u\r
-#define CYREG_B1_UDB10_MSK_ACTL 0x40006b14u\r
-#define CYREG_B1_UDB11_MSK_ACTL 0x40006b16u\r
-#define CYREG_B1_UDB04_MC_00 0x40006b48u\r
-#define CYREG_B1_UDB05_MC_00 0x40006b4au\r
-#define CYREG_B1_UDB06_MC_00 0x40006b4cu\r
-#define CYREG_B1_UDB07_MC_00 0x40006b4eu\r
-#define CYREG_B1_UDB08_MC_00 0x40006b50u\r
-#define CYREG_B1_UDB09_MC_00 0x40006b52u\r
-#define CYREG_B1_UDB10_MC_00 0x40006b54u\r
-#define CYREG_B1_UDB11_MC_00 0x40006b56u\r
-#define CYDEV_UWRK_UWRK16_DEF_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_DEF_SIZE 0x0000075eu\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_BASE 0x40006800u\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_SIZE 0x0000015eu\r
-#define CYREG_B0_UDB00_01_A0 0x40006800u\r
-#define CYREG_B0_UDB01_02_A0 0x40006802u\r
-#define CYREG_B0_UDB02_03_A0 0x40006804u\r
-#define CYREG_B0_UDB03_04_A0 0x40006806u\r
-#define CYREG_B0_UDB04_05_A0 0x40006808u\r
-#define CYREG_B0_UDB05_06_A0 0x4000680au\r
-#define CYREG_B0_UDB06_07_A0 0x4000680cu\r
-#define CYREG_B0_UDB07_08_A0 0x4000680eu\r
-#define CYREG_B0_UDB08_09_A0 0x40006810u\r
-#define CYREG_B0_UDB09_10_A0 0x40006812u\r
-#define CYREG_B0_UDB10_11_A0 0x40006814u\r
-#define CYREG_B0_UDB11_12_A0 0x40006816u\r
-#define CYREG_B0_UDB12_13_A0 0x40006818u\r
-#define CYREG_B0_UDB13_14_A0 0x4000681au\r
-#define CYREG_B0_UDB14_15_A0 0x4000681cu\r
-#define CYREG_B0_UDB00_01_A1 0x40006820u\r
-#define CYREG_B0_UDB01_02_A1 0x40006822u\r
-#define CYREG_B0_UDB02_03_A1 0x40006824u\r
-#define CYREG_B0_UDB03_04_A1 0x40006826u\r
-#define CYREG_B0_UDB04_05_A1 0x40006828u\r
-#define CYREG_B0_UDB05_06_A1 0x4000682au\r
-#define CYREG_B0_UDB06_07_A1 0x4000682cu\r
-#define CYREG_B0_UDB07_08_A1 0x4000682eu\r
-#define CYREG_B0_UDB08_09_A1 0x40006830u\r
-#define CYREG_B0_UDB09_10_A1 0x40006832u\r
-#define CYREG_B0_UDB10_11_A1 0x40006834u\r
-#define CYREG_B0_UDB11_12_A1 0x40006836u\r
-#define CYREG_B0_UDB12_13_A1 0x40006838u\r
-#define CYREG_B0_UDB13_14_A1 0x4000683au\r
-#define CYREG_B0_UDB14_15_A1 0x4000683cu\r
-#define CYREG_B0_UDB00_01_D0 0x40006840u\r
-#define CYREG_B0_UDB01_02_D0 0x40006842u\r
-#define CYREG_B0_UDB02_03_D0 0x40006844u\r
-#define CYREG_B0_UDB03_04_D0 0x40006846u\r
-#define CYREG_B0_UDB04_05_D0 0x40006848u\r
-#define CYREG_B0_UDB05_06_D0 0x4000684au\r
-#define CYREG_B0_UDB06_07_D0 0x4000684cu\r
-#define CYREG_B0_UDB07_08_D0 0x4000684eu\r
-#define CYREG_B0_UDB08_09_D0 0x40006850u\r
-#define CYREG_B0_UDB09_10_D0 0x40006852u\r
-#define CYREG_B0_UDB10_11_D0 0x40006854u\r
-#define CYREG_B0_UDB11_12_D0 0x40006856u\r
-#define CYREG_B0_UDB12_13_D0 0x40006858u\r
-#define CYREG_B0_UDB13_14_D0 0x4000685au\r
-#define CYREG_B0_UDB14_15_D0 0x4000685cu\r
-#define CYREG_B0_UDB00_01_D1 0x40006860u\r
-#define CYREG_B0_UDB01_02_D1 0x40006862u\r
-#define CYREG_B0_UDB02_03_D1 0x40006864u\r
-#define CYREG_B0_UDB03_04_D1 0x40006866u\r
-#define CYREG_B0_UDB04_05_D1 0x40006868u\r
-#define CYREG_B0_UDB05_06_D1 0x4000686au\r
-#define CYREG_B0_UDB06_07_D1 0x4000686cu\r
-#define CYREG_B0_UDB07_08_D1 0x4000686eu\r
-#define CYREG_B0_UDB08_09_D1 0x40006870u\r
-#define CYREG_B0_UDB09_10_D1 0x40006872u\r
-#define CYREG_B0_UDB10_11_D1 0x40006874u\r
-#define CYREG_B0_UDB11_12_D1 0x40006876u\r
-#define CYREG_B0_UDB12_13_D1 0x40006878u\r
-#define CYREG_B0_UDB13_14_D1 0x4000687au\r
-#define CYREG_B0_UDB14_15_D1 0x4000687cu\r
-#define CYREG_B0_UDB00_01_F0 0x40006880u\r
-#define CYREG_B0_UDB01_02_F0 0x40006882u\r
-#define CYREG_B0_UDB02_03_F0 0x40006884u\r
-#define CYREG_B0_UDB03_04_F0 0x40006886u\r
-#define CYREG_B0_UDB04_05_F0 0x40006888u\r
-#define CYREG_B0_UDB05_06_F0 0x4000688au\r
-#define CYREG_B0_UDB06_07_F0 0x4000688cu\r
-#define CYREG_B0_UDB07_08_F0 0x4000688eu\r
-#define CYREG_B0_UDB08_09_F0 0x40006890u\r
-#define CYREG_B0_UDB09_10_F0 0x40006892u\r
-#define CYREG_B0_UDB10_11_F0 0x40006894u\r
-#define CYREG_B0_UDB11_12_F0 0x40006896u\r
-#define CYREG_B0_UDB12_13_F0 0x40006898u\r
-#define CYREG_B0_UDB13_14_F0 0x4000689au\r
-#define CYREG_B0_UDB14_15_F0 0x4000689cu\r
-#define CYREG_B0_UDB00_01_F1 0x400068a0u\r
-#define CYREG_B0_UDB01_02_F1 0x400068a2u\r
-#define CYREG_B0_UDB02_03_F1 0x400068a4u\r
-#define CYREG_B0_UDB03_04_F1 0x400068a6u\r
-#define CYREG_B0_UDB04_05_F1 0x400068a8u\r
-#define CYREG_B0_UDB05_06_F1 0x400068aau\r
-#define CYREG_B0_UDB06_07_F1 0x400068acu\r
-#define CYREG_B0_UDB07_08_F1 0x400068aeu\r
-#define CYREG_B0_UDB08_09_F1 0x400068b0u\r
-#define CYREG_B0_UDB09_10_F1 0x400068b2u\r
-#define CYREG_B0_UDB10_11_F1 0x400068b4u\r
-#define CYREG_B0_UDB11_12_F1 0x400068b6u\r
-#define CYREG_B0_UDB12_13_F1 0x400068b8u\r
-#define CYREG_B0_UDB13_14_F1 0x400068bau\r
-#define CYREG_B0_UDB14_15_F1 0x400068bcu\r
-#define CYREG_B0_UDB00_01_ST 0x400068c0u\r
-#define CYREG_B0_UDB01_02_ST 0x400068c2u\r
-#define CYREG_B0_UDB02_03_ST 0x400068c4u\r
-#define CYREG_B0_UDB03_04_ST 0x400068c6u\r
-#define CYREG_B0_UDB04_05_ST 0x400068c8u\r
-#define CYREG_B0_UDB05_06_ST 0x400068cau\r
-#define CYREG_B0_UDB06_07_ST 0x400068ccu\r
-#define CYREG_B0_UDB07_08_ST 0x400068ceu\r
-#define CYREG_B0_UDB08_09_ST 0x400068d0u\r
-#define CYREG_B0_UDB09_10_ST 0x400068d2u\r
-#define CYREG_B0_UDB10_11_ST 0x400068d4u\r
-#define CYREG_B0_UDB11_12_ST 0x400068d6u\r
-#define CYREG_B0_UDB12_13_ST 0x400068d8u\r
-#define CYREG_B0_UDB13_14_ST 0x400068dau\r
-#define CYREG_B0_UDB14_15_ST 0x400068dcu\r
-#define CYREG_B0_UDB00_01_CTL 0x400068e0u\r
-#define CYREG_B0_UDB01_02_CTL 0x400068e2u\r
-#define CYREG_B0_UDB02_03_CTL 0x400068e4u\r
-#define CYREG_B0_UDB03_04_CTL 0x400068e6u\r
-#define CYREG_B0_UDB04_05_CTL 0x400068e8u\r
-#define CYREG_B0_UDB05_06_CTL 0x400068eau\r
-#define CYREG_B0_UDB06_07_CTL 0x400068ecu\r
-#define CYREG_B0_UDB07_08_CTL 0x400068eeu\r
-#define CYREG_B0_UDB08_09_CTL 0x400068f0u\r
-#define CYREG_B0_UDB09_10_CTL 0x400068f2u\r
-#define CYREG_B0_UDB10_11_CTL 0x400068f4u\r
-#define CYREG_B0_UDB11_12_CTL 0x400068f6u\r
-#define CYREG_B0_UDB12_13_CTL 0x400068f8u\r
-#define CYREG_B0_UDB13_14_CTL 0x400068fau\r
-#define CYREG_B0_UDB14_15_CTL 0x400068fcu\r
-#define CYREG_B0_UDB00_01_MSK 0x40006900u\r
-#define CYREG_B0_UDB01_02_MSK 0x40006902u\r
-#define CYREG_B0_UDB02_03_MSK 0x40006904u\r
-#define CYREG_B0_UDB03_04_MSK 0x40006906u\r
-#define CYREG_B0_UDB04_05_MSK 0x40006908u\r
-#define CYREG_B0_UDB05_06_MSK 0x4000690au\r
-#define CYREG_B0_UDB06_07_MSK 0x4000690cu\r
-#define CYREG_B0_UDB07_08_MSK 0x4000690eu\r
-#define CYREG_B0_UDB08_09_MSK 0x40006910u\r
-#define CYREG_B0_UDB09_10_MSK 0x40006912u\r
-#define CYREG_B0_UDB10_11_MSK 0x40006914u\r
-#define CYREG_B0_UDB11_12_MSK 0x40006916u\r
-#define CYREG_B0_UDB12_13_MSK 0x40006918u\r
-#define CYREG_B0_UDB13_14_MSK 0x4000691au\r
-#define CYREG_B0_UDB14_15_MSK 0x4000691cu\r
-#define CYREG_B0_UDB00_01_ACTL 0x40006920u\r
-#define CYREG_B0_UDB01_02_ACTL 0x40006922u\r
-#define CYREG_B0_UDB02_03_ACTL 0x40006924u\r
-#define CYREG_B0_UDB03_04_ACTL 0x40006926u\r
-#define CYREG_B0_UDB04_05_ACTL 0x40006928u\r
-#define CYREG_B0_UDB05_06_ACTL 0x4000692au\r
-#define CYREG_B0_UDB06_07_ACTL 0x4000692cu\r
-#define CYREG_B0_UDB07_08_ACTL 0x4000692eu\r
-#define CYREG_B0_UDB08_09_ACTL 0x40006930u\r
-#define CYREG_B0_UDB09_10_ACTL 0x40006932u\r
-#define CYREG_B0_UDB10_11_ACTL 0x40006934u\r
-#define CYREG_B0_UDB11_12_ACTL 0x40006936u\r
-#define CYREG_B0_UDB12_13_ACTL 0x40006938u\r
-#define CYREG_B0_UDB13_14_ACTL 0x4000693au\r
-#define CYREG_B0_UDB14_15_ACTL 0x4000693cu\r
-#define CYREG_B0_UDB00_01_MC 0x40006940u\r
-#define CYREG_B0_UDB01_02_MC 0x40006942u\r
-#define CYREG_B0_UDB02_03_MC 0x40006944u\r
-#define CYREG_B0_UDB03_04_MC 0x40006946u\r
-#define CYREG_B0_UDB04_05_MC 0x40006948u\r
-#define CYREG_B0_UDB05_06_MC 0x4000694au\r
-#define CYREG_B0_UDB06_07_MC 0x4000694cu\r
-#define CYREG_B0_UDB07_08_MC 0x4000694eu\r
-#define CYREG_B0_UDB08_09_MC 0x40006950u\r
-#define CYREG_B0_UDB09_10_MC 0x40006952u\r
-#define CYREG_B0_UDB10_11_MC 0x40006954u\r
-#define CYREG_B0_UDB11_12_MC 0x40006956u\r
-#define CYREG_B0_UDB12_13_MC 0x40006958u\r
-#define CYREG_B0_UDB13_14_MC 0x4000695au\r
-#define CYREG_B0_UDB14_15_MC 0x4000695cu\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_BASE 0x40006a00u\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_SIZE 0x0000015eu\r
-#define CYREG_B1_UDB04_05_A0 0x40006a08u\r
-#define CYREG_B1_UDB05_06_A0 0x40006a0au\r
-#define CYREG_B1_UDB06_07_A0 0x40006a0cu\r
-#define CYREG_B1_UDB07_08_A0 0x40006a0eu\r
-#define CYREG_B1_UDB08_09_A0 0x40006a10u\r
-#define CYREG_B1_UDB09_10_A0 0x40006a12u\r
-#define CYREG_B1_UDB10_11_A0 0x40006a14u\r
-#define CYREG_B1_UDB11_12_A0 0x40006a16u\r
-#define CYREG_B1_UDB04_05_A1 0x40006a28u\r
-#define CYREG_B1_UDB05_06_A1 0x40006a2au\r
-#define CYREG_B1_UDB06_07_A1 0x40006a2cu\r
-#define CYREG_B1_UDB07_08_A1 0x40006a2eu\r
-#define CYREG_B1_UDB08_09_A1 0x40006a30u\r
-#define CYREG_B1_UDB09_10_A1 0x40006a32u\r
-#define CYREG_B1_UDB10_11_A1 0x40006a34u\r
-#define CYREG_B1_UDB11_12_A1 0x40006a36u\r
-#define CYREG_B1_UDB04_05_D0 0x40006a48u\r
-#define CYREG_B1_UDB05_06_D0 0x40006a4au\r
-#define CYREG_B1_UDB06_07_D0 0x40006a4cu\r
-#define CYREG_B1_UDB07_08_D0 0x40006a4eu\r
-#define CYREG_B1_UDB08_09_D0 0x40006a50u\r
-#define CYREG_B1_UDB09_10_D0 0x40006a52u\r
-#define CYREG_B1_UDB10_11_D0 0x40006a54u\r
-#define CYREG_B1_UDB11_12_D0 0x40006a56u\r
-#define CYREG_B1_UDB04_05_D1 0x40006a68u\r
-#define CYREG_B1_UDB05_06_D1 0x40006a6au\r
-#define CYREG_B1_UDB06_07_D1 0x40006a6cu\r
-#define CYREG_B1_UDB07_08_D1 0x40006a6eu\r
-#define CYREG_B1_UDB08_09_D1 0x40006a70u\r
-#define CYREG_B1_UDB09_10_D1 0x40006a72u\r
-#define CYREG_B1_UDB10_11_D1 0x40006a74u\r
-#define CYREG_B1_UDB11_12_D1 0x40006a76u\r
-#define CYREG_B1_UDB04_05_F0 0x40006a88u\r
-#define CYREG_B1_UDB05_06_F0 0x40006a8au\r
-#define CYREG_B1_UDB06_07_F0 0x40006a8cu\r
-#define CYREG_B1_UDB07_08_F0 0x40006a8eu\r
-#define CYREG_B1_UDB08_09_F0 0x40006a90u\r
-#define CYREG_B1_UDB09_10_F0 0x40006a92u\r
-#define CYREG_B1_UDB10_11_F0 0x40006a94u\r
-#define CYREG_B1_UDB11_12_F0 0x40006a96u\r
-#define CYREG_B1_UDB04_05_F1 0x40006aa8u\r
-#define CYREG_B1_UDB05_06_F1 0x40006aaau\r
-#define CYREG_B1_UDB06_07_F1 0x40006aacu\r
-#define CYREG_B1_UDB07_08_F1 0x40006aaeu\r
-#define CYREG_B1_UDB08_09_F1 0x40006ab0u\r
-#define CYREG_B1_UDB09_10_F1 0x40006ab2u\r
-#define CYREG_B1_UDB10_11_F1 0x40006ab4u\r
-#define CYREG_B1_UDB11_12_F1 0x40006ab6u\r
-#define CYREG_B1_UDB04_05_ST 0x40006ac8u\r
-#define CYREG_B1_UDB05_06_ST 0x40006acau\r
-#define CYREG_B1_UDB06_07_ST 0x40006accu\r
-#define CYREG_B1_UDB07_08_ST 0x40006aceu\r
-#define CYREG_B1_UDB08_09_ST 0x40006ad0u\r
-#define CYREG_B1_UDB09_10_ST 0x40006ad2u\r
-#define CYREG_B1_UDB10_11_ST 0x40006ad4u\r
-#define CYREG_B1_UDB11_12_ST 0x40006ad6u\r
-#define CYREG_B1_UDB04_05_CTL 0x40006ae8u\r
-#define CYREG_B1_UDB05_06_CTL 0x40006aeau\r
-#define CYREG_B1_UDB06_07_CTL 0x40006aecu\r
-#define CYREG_B1_UDB07_08_CTL 0x40006aeeu\r
-#define CYREG_B1_UDB08_09_CTL 0x40006af0u\r
-#define CYREG_B1_UDB09_10_CTL 0x40006af2u\r
-#define CYREG_B1_UDB10_11_CTL 0x40006af4u\r
-#define CYREG_B1_UDB11_12_CTL 0x40006af6u\r
-#define CYREG_B1_UDB04_05_MSK 0x40006b08u\r
-#define CYREG_B1_UDB05_06_MSK 0x40006b0au\r
-#define CYREG_B1_UDB06_07_MSK 0x40006b0cu\r
-#define CYREG_B1_UDB07_08_MSK 0x40006b0eu\r
-#define CYREG_B1_UDB08_09_MSK 0x40006b10u\r
-#define CYREG_B1_UDB09_10_MSK 0x40006b12u\r
-#define CYREG_B1_UDB10_11_MSK 0x40006b14u\r
-#define CYREG_B1_UDB11_12_MSK 0x40006b16u\r
-#define CYREG_B1_UDB04_05_ACTL 0x40006b28u\r
-#define CYREG_B1_UDB05_06_ACTL 0x40006b2au\r
-#define CYREG_B1_UDB06_07_ACTL 0x40006b2cu\r
-#define CYREG_B1_UDB07_08_ACTL 0x40006b2eu\r
-#define CYREG_B1_UDB08_09_ACTL 0x40006b30u\r
-#define CYREG_B1_UDB09_10_ACTL 0x40006b32u\r
-#define CYREG_B1_UDB10_11_ACTL 0x40006b34u\r
-#define CYREG_B1_UDB11_12_ACTL 0x40006b36u\r
-#define CYREG_B1_UDB04_05_MC 0x40006b48u\r
-#define CYREG_B1_UDB05_06_MC 0x40006b4au\r
-#define CYREG_B1_UDB06_07_MC 0x40006b4cu\r
-#define CYREG_B1_UDB07_08_MC 0x40006b4eu\r
-#define CYREG_B1_UDB08_09_MC 0x40006b50u\r
-#define CYREG_B1_UDB09_10_MC 0x40006b52u\r
-#define CYREG_B1_UDB10_11_MC 0x40006b54u\r
-#define CYREG_B1_UDB11_12_MC 0x40006b56u\r
-#define CYDEV_PHUB_BASE 0x40007000u\r
-#define CYDEV_PHUB_SIZE 0x00000c00u\r
-#define CYREG_PHUB_CFG 0x40007000u\r
-#define CYREG_PHUB_ERR 0x40007004u\r
-#define CYREG_PHUB_ERR_ADR 0x40007008u\r
-#define CYDEV_PHUB_CH0_BASE 0x40007010u\r
-#define CYDEV_PHUB_CH0_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH0_BASIC_CFG 0x40007010u\r
-#define CYREG_PHUB_CH0_ACTION 0x40007014u\r
-#define CYREG_PHUB_CH0_BASIC_STATUS 0x40007018u\r
-#define CYDEV_PHUB_CH1_BASE 0x40007020u\r
-#define CYDEV_PHUB_CH1_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH1_BASIC_CFG 0x40007020u\r
-#define CYREG_PHUB_CH1_ACTION 0x40007024u\r
-#define CYREG_PHUB_CH1_BASIC_STATUS 0x40007028u\r
-#define CYDEV_PHUB_CH2_BASE 0x40007030u\r
-#define CYDEV_PHUB_CH2_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH2_BASIC_CFG 0x40007030u\r
-#define CYREG_PHUB_CH2_ACTION 0x40007034u\r
-#define CYREG_PHUB_CH2_BASIC_STATUS 0x40007038u\r
-#define CYDEV_PHUB_CH3_BASE 0x40007040u\r
-#define CYDEV_PHUB_CH3_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH3_BASIC_CFG 0x40007040u\r
-#define CYREG_PHUB_CH3_ACTION 0x40007044u\r
-#define CYREG_PHUB_CH3_BASIC_STATUS 0x40007048u\r
-#define CYDEV_PHUB_CH4_BASE 0x40007050u\r
-#define CYDEV_PHUB_CH4_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH4_BASIC_CFG 0x40007050u\r
-#define CYREG_PHUB_CH4_ACTION 0x40007054u\r
-#define CYREG_PHUB_CH4_BASIC_STATUS 0x40007058u\r
-#define CYDEV_PHUB_CH5_BASE 0x40007060u\r
-#define CYDEV_PHUB_CH5_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH5_BASIC_CFG 0x40007060u\r
-#define CYREG_PHUB_CH5_ACTION 0x40007064u\r
-#define CYREG_PHUB_CH5_BASIC_STATUS 0x40007068u\r
-#define CYDEV_PHUB_CH6_BASE 0x40007070u\r
-#define CYDEV_PHUB_CH6_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH6_BASIC_CFG 0x40007070u\r
-#define CYREG_PHUB_CH6_ACTION 0x40007074u\r
-#define CYREG_PHUB_CH6_BASIC_STATUS 0x40007078u\r
-#define CYDEV_PHUB_CH7_BASE 0x40007080u\r
-#define CYDEV_PHUB_CH7_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH7_BASIC_CFG 0x40007080u\r
-#define CYREG_PHUB_CH7_ACTION 0x40007084u\r
-#define CYREG_PHUB_CH7_BASIC_STATUS 0x40007088u\r
-#define CYDEV_PHUB_CH8_BASE 0x40007090u\r
-#define CYDEV_PHUB_CH8_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH8_BASIC_CFG 0x40007090u\r
-#define CYREG_PHUB_CH8_ACTION 0x40007094u\r
-#define CYREG_PHUB_CH8_BASIC_STATUS 0x40007098u\r
-#define CYDEV_PHUB_CH9_BASE 0x400070a0u\r
-#define CYDEV_PHUB_CH9_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH9_BASIC_CFG 0x400070a0u\r
-#define CYREG_PHUB_CH9_ACTION 0x400070a4u\r
-#define CYREG_PHUB_CH9_BASIC_STATUS 0x400070a8u\r
-#define CYDEV_PHUB_CH10_BASE 0x400070b0u\r
-#define CYDEV_PHUB_CH10_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH10_BASIC_CFG 0x400070b0u\r
-#define CYREG_PHUB_CH10_ACTION 0x400070b4u\r
-#define CYREG_PHUB_CH10_BASIC_STATUS 0x400070b8u\r
-#define CYDEV_PHUB_CH11_BASE 0x400070c0u\r
-#define CYDEV_PHUB_CH11_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH11_BASIC_CFG 0x400070c0u\r
-#define CYREG_PHUB_CH11_ACTION 0x400070c4u\r
-#define CYREG_PHUB_CH11_BASIC_STATUS 0x400070c8u\r
-#define CYDEV_PHUB_CH12_BASE 0x400070d0u\r
-#define CYDEV_PHUB_CH12_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH12_BASIC_CFG 0x400070d0u\r
-#define CYREG_PHUB_CH12_ACTION 0x400070d4u\r
-#define CYREG_PHUB_CH12_BASIC_STATUS 0x400070d8u\r
-#define CYDEV_PHUB_CH13_BASE 0x400070e0u\r
-#define CYDEV_PHUB_CH13_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH13_BASIC_CFG 0x400070e0u\r
-#define CYREG_PHUB_CH13_ACTION 0x400070e4u\r
-#define CYREG_PHUB_CH13_BASIC_STATUS 0x400070e8u\r
-#define CYDEV_PHUB_CH14_BASE 0x400070f0u\r
-#define CYDEV_PHUB_CH14_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH14_BASIC_CFG 0x400070f0u\r
-#define CYREG_PHUB_CH14_ACTION 0x400070f4u\r
-#define CYREG_PHUB_CH14_BASIC_STATUS 0x400070f8u\r
-#define CYDEV_PHUB_CH15_BASE 0x40007100u\r
-#define CYDEV_PHUB_CH15_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH15_BASIC_CFG 0x40007100u\r
-#define CYREG_PHUB_CH15_ACTION 0x40007104u\r
-#define CYREG_PHUB_CH15_BASIC_STATUS 0x40007108u\r
-#define CYDEV_PHUB_CH16_BASE 0x40007110u\r
-#define CYDEV_PHUB_CH16_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH16_BASIC_CFG 0x40007110u\r
-#define CYREG_PHUB_CH16_ACTION 0x40007114u\r
-#define CYREG_PHUB_CH16_BASIC_STATUS 0x40007118u\r
-#define CYDEV_PHUB_CH17_BASE 0x40007120u\r
-#define CYDEV_PHUB_CH17_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH17_BASIC_CFG 0x40007120u\r
-#define CYREG_PHUB_CH17_ACTION 0x40007124u\r
-#define CYREG_PHUB_CH17_BASIC_STATUS 0x40007128u\r
-#define CYDEV_PHUB_CH18_BASE 0x40007130u\r
-#define CYDEV_PHUB_CH18_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH18_BASIC_CFG 0x40007130u\r
-#define CYREG_PHUB_CH18_ACTION 0x40007134u\r
-#define CYREG_PHUB_CH18_BASIC_STATUS 0x40007138u\r
-#define CYDEV_PHUB_CH19_BASE 0x40007140u\r
-#define CYDEV_PHUB_CH19_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH19_BASIC_CFG 0x40007140u\r
-#define CYREG_PHUB_CH19_ACTION 0x40007144u\r
-#define CYREG_PHUB_CH19_BASIC_STATUS 0x40007148u\r
-#define CYDEV_PHUB_CH20_BASE 0x40007150u\r
-#define CYDEV_PHUB_CH20_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH20_BASIC_CFG 0x40007150u\r
-#define CYREG_PHUB_CH20_ACTION 0x40007154u\r
-#define CYREG_PHUB_CH20_BASIC_STATUS 0x40007158u\r
-#define CYDEV_PHUB_CH21_BASE 0x40007160u\r
-#define CYDEV_PHUB_CH21_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH21_BASIC_CFG 0x40007160u\r
-#define CYREG_PHUB_CH21_ACTION 0x40007164u\r
-#define CYREG_PHUB_CH21_BASIC_STATUS 0x40007168u\r
-#define CYDEV_PHUB_CH22_BASE 0x40007170u\r
-#define CYDEV_PHUB_CH22_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH22_BASIC_CFG 0x40007170u\r
-#define CYREG_PHUB_CH22_ACTION 0x40007174u\r
-#define CYREG_PHUB_CH22_BASIC_STATUS 0x40007178u\r
-#define CYDEV_PHUB_CH23_BASE 0x40007180u\r
-#define CYDEV_PHUB_CH23_SIZE 0x0000000cu\r
-#define CYREG_PHUB_CH23_BASIC_CFG 0x40007180u\r
-#define CYREG_PHUB_CH23_ACTION 0x40007184u\r
-#define CYREG_PHUB_CH23_BASIC_STATUS 0x40007188u\r
-#define CYDEV_PHUB_CFGMEM0_BASE 0x40007600u\r
-#define CYDEV_PHUB_CFGMEM0_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM0_CFG0 0x40007600u\r
-#define CYREG_PHUB_CFGMEM0_CFG1 0x40007604u\r
-#define CYDEV_PHUB_CFGMEM1_BASE 0x40007608u\r
-#define CYDEV_PHUB_CFGMEM1_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM1_CFG0 0x40007608u\r
-#define CYREG_PHUB_CFGMEM1_CFG1 0x4000760cu\r
-#define CYDEV_PHUB_CFGMEM2_BASE 0x40007610u\r
-#define CYDEV_PHUB_CFGMEM2_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM2_CFG0 0x40007610u\r
-#define CYREG_PHUB_CFGMEM2_CFG1 0x40007614u\r
-#define CYDEV_PHUB_CFGMEM3_BASE 0x40007618u\r
-#define CYDEV_PHUB_CFGMEM3_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM3_CFG0 0x40007618u\r
-#define CYREG_PHUB_CFGMEM3_CFG1 0x4000761cu\r
-#define CYDEV_PHUB_CFGMEM4_BASE 0x40007620u\r
-#define CYDEV_PHUB_CFGMEM4_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM4_CFG0 0x40007620u\r
-#define CYREG_PHUB_CFGMEM4_CFG1 0x40007624u\r
-#define CYDEV_PHUB_CFGMEM5_BASE 0x40007628u\r
-#define CYDEV_PHUB_CFGMEM5_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM5_CFG0 0x40007628u\r
-#define CYREG_PHUB_CFGMEM5_CFG1 0x4000762cu\r
-#define CYDEV_PHUB_CFGMEM6_BASE 0x40007630u\r
-#define CYDEV_PHUB_CFGMEM6_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM6_CFG0 0x40007630u\r
-#define CYREG_PHUB_CFGMEM6_CFG1 0x40007634u\r
-#define CYDEV_PHUB_CFGMEM7_BASE 0x40007638u\r
-#define CYDEV_PHUB_CFGMEM7_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM7_CFG0 0x40007638u\r
-#define CYREG_PHUB_CFGMEM7_CFG1 0x4000763cu\r
-#define CYDEV_PHUB_CFGMEM8_BASE 0x40007640u\r
-#define CYDEV_PHUB_CFGMEM8_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM8_CFG0 0x40007640u\r
-#define CYREG_PHUB_CFGMEM8_CFG1 0x40007644u\r
-#define CYDEV_PHUB_CFGMEM9_BASE 0x40007648u\r
-#define CYDEV_PHUB_CFGMEM9_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM9_CFG0 0x40007648u\r
-#define CYREG_PHUB_CFGMEM9_CFG1 0x4000764cu\r
-#define CYDEV_PHUB_CFGMEM10_BASE 0x40007650u\r
-#define CYDEV_PHUB_CFGMEM10_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM10_CFG0 0x40007650u\r
-#define CYREG_PHUB_CFGMEM10_CFG1 0x40007654u\r
-#define CYDEV_PHUB_CFGMEM11_BASE 0x40007658u\r
-#define CYDEV_PHUB_CFGMEM11_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM11_CFG0 0x40007658u\r
-#define CYREG_PHUB_CFGMEM11_CFG1 0x4000765cu\r
-#define CYDEV_PHUB_CFGMEM12_BASE 0x40007660u\r
-#define CYDEV_PHUB_CFGMEM12_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM12_CFG0 0x40007660u\r
-#define CYREG_PHUB_CFGMEM12_CFG1 0x40007664u\r
-#define CYDEV_PHUB_CFGMEM13_BASE 0x40007668u\r
-#define CYDEV_PHUB_CFGMEM13_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM13_CFG0 0x40007668u\r
-#define CYREG_PHUB_CFGMEM13_CFG1 0x4000766cu\r
-#define CYDEV_PHUB_CFGMEM14_BASE 0x40007670u\r
-#define CYDEV_PHUB_CFGMEM14_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM14_CFG0 0x40007670u\r
-#define CYREG_PHUB_CFGMEM14_CFG1 0x40007674u\r
-#define CYDEV_PHUB_CFGMEM15_BASE 0x40007678u\r
-#define CYDEV_PHUB_CFGMEM15_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM15_CFG0 0x40007678u\r
-#define CYREG_PHUB_CFGMEM15_CFG1 0x4000767cu\r
-#define CYDEV_PHUB_CFGMEM16_BASE 0x40007680u\r
-#define CYDEV_PHUB_CFGMEM16_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM16_CFG0 0x40007680u\r
-#define CYREG_PHUB_CFGMEM16_CFG1 0x40007684u\r
-#define CYDEV_PHUB_CFGMEM17_BASE 0x40007688u\r
-#define CYDEV_PHUB_CFGMEM17_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM17_CFG0 0x40007688u\r
-#define CYREG_PHUB_CFGMEM17_CFG1 0x4000768cu\r
-#define CYDEV_PHUB_CFGMEM18_BASE 0x40007690u\r
-#define CYDEV_PHUB_CFGMEM18_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM18_CFG0 0x40007690u\r
-#define CYREG_PHUB_CFGMEM18_CFG1 0x40007694u\r
-#define CYDEV_PHUB_CFGMEM19_BASE 0x40007698u\r
-#define CYDEV_PHUB_CFGMEM19_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM19_CFG0 0x40007698u\r
-#define CYREG_PHUB_CFGMEM19_CFG1 0x4000769cu\r
-#define CYDEV_PHUB_CFGMEM20_BASE 0x400076a0u\r
-#define CYDEV_PHUB_CFGMEM20_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM20_CFG0 0x400076a0u\r
-#define CYREG_PHUB_CFGMEM20_CFG1 0x400076a4u\r
-#define CYDEV_PHUB_CFGMEM21_BASE 0x400076a8u\r
-#define CYDEV_PHUB_CFGMEM21_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM21_CFG0 0x400076a8u\r
-#define CYREG_PHUB_CFGMEM21_CFG1 0x400076acu\r
-#define CYDEV_PHUB_CFGMEM22_BASE 0x400076b0u\r
-#define CYDEV_PHUB_CFGMEM22_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM22_CFG0 0x400076b0u\r
-#define CYREG_PHUB_CFGMEM22_CFG1 0x400076b4u\r
-#define CYDEV_PHUB_CFGMEM23_BASE 0x400076b8u\r
-#define CYDEV_PHUB_CFGMEM23_SIZE 0x00000008u\r
-#define CYREG_PHUB_CFGMEM23_CFG0 0x400076b8u\r
-#define CYREG_PHUB_CFGMEM23_CFG1 0x400076bcu\r
-#define CYDEV_PHUB_TDMEM0_BASE 0x40007800u\r
-#define CYDEV_PHUB_TDMEM0_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM0_ORIG_TD0 0x40007800u\r
-#define CYREG_PHUB_TDMEM0_ORIG_TD1 0x40007804u\r
-#define CYDEV_PHUB_TDMEM1_BASE 0x40007808u\r
-#define CYDEV_PHUB_TDMEM1_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM1_ORIG_TD0 0x40007808u\r
-#define CYREG_PHUB_TDMEM1_ORIG_TD1 0x4000780cu\r
-#define CYDEV_PHUB_TDMEM2_BASE 0x40007810u\r
-#define CYDEV_PHUB_TDMEM2_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM2_ORIG_TD0 0x40007810u\r
-#define CYREG_PHUB_TDMEM2_ORIG_TD1 0x40007814u\r
-#define CYDEV_PHUB_TDMEM3_BASE 0x40007818u\r
-#define CYDEV_PHUB_TDMEM3_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM3_ORIG_TD0 0x40007818u\r
-#define CYREG_PHUB_TDMEM3_ORIG_TD1 0x4000781cu\r
-#define CYDEV_PHUB_TDMEM4_BASE 0x40007820u\r
-#define CYDEV_PHUB_TDMEM4_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM4_ORIG_TD0 0x40007820u\r
-#define CYREG_PHUB_TDMEM4_ORIG_TD1 0x40007824u\r
-#define CYDEV_PHUB_TDMEM5_BASE 0x40007828u\r
-#define CYDEV_PHUB_TDMEM5_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM5_ORIG_TD0 0x40007828u\r
-#define CYREG_PHUB_TDMEM5_ORIG_TD1 0x4000782cu\r
-#define CYDEV_PHUB_TDMEM6_BASE 0x40007830u\r
-#define CYDEV_PHUB_TDMEM6_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM6_ORIG_TD0 0x40007830u\r
-#define CYREG_PHUB_TDMEM6_ORIG_TD1 0x40007834u\r
-#define CYDEV_PHUB_TDMEM7_BASE 0x40007838u\r
-#define CYDEV_PHUB_TDMEM7_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM7_ORIG_TD0 0x40007838u\r
-#define CYREG_PHUB_TDMEM7_ORIG_TD1 0x4000783cu\r
-#define CYDEV_PHUB_TDMEM8_BASE 0x40007840u\r
-#define CYDEV_PHUB_TDMEM8_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM8_ORIG_TD0 0x40007840u\r
-#define CYREG_PHUB_TDMEM8_ORIG_TD1 0x40007844u\r
-#define CYDEV_PHUB_TDMEM9_BASE 0x40007848u\r
-#define CYDEV_PHUB_TDMEM9_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM9_ORIG_TD0 0x40007848u\r
-#define CYREG_PHUB_TDMEM9_ORIG_TD1 0x4000784cu\r
-#define CYDEV_PHUB_TDMEM10_BASE 0x40007850u\r
-#define CYDEV_PHUB_TDMEM10_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM10_ORIG_TD0 0x40007850u\r
-#define CYREG_PHUB_TDMEM10_ORIG_TD1 0x40007854u\r
-#define CYDEV_PHUB_TDMEM11_BASE 0x40007858u\r
-#define CYDEV_PHUB_TDMEM11_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM11_ORIG_TD0 0x40007858u\r
-#define CYREG_PHUB_TDMEM11_ORIG_TD1 0x4000785cu\r
-#define CYDEV_PHUB_TDMEM12_BASE 0x40007860u\r
-#define CYDEV_PHUB_TDMEM12_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM12_ORIG_TD0 0x40007860u\r
-#define CYREG_PHUB_TDMEM12_ORIG_TD1 0x40007864u\r
-#define CYDEV_PHUB_TDMEM13_BASE 0x40007868u\r
-#define CYDEV_PHUB_TDMEM13_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM13_ORIG_TD0 0x40007868u\r
-#define CYREG_PHUB_TDMEM13_ORIG_TD1 0x4000786cu\r
-#define CYDEV_PHUB_TDMEM14_BASE 0x40007870u\r
-#define CYDEV_PHUB_TDMEM14_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM14_ORIG_TD0 0x40007870u\r
-#define CYREG_PHUB_TDMEM14_ORIG_TD1 0x40007874u\r
-#define CYDEV_PHUB_TDMEM15_BASE 0x40007878u\r
-#define CYDEV_PHUB_TDMEM15_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM15_ORIG_TD0 0x40007878u\r
-#define CYREG_PHUB_TDMEM15_ORIG_TD1 0x4000787cu\r
-#define CYDEV_PHUB_TDMEM16_BASE 0x40007880u\r
-#define CYDEV_PHUB_TDMEM16_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM16_ORIG_TD0 0x40007880u\r
-#define CYREG_PHUB_TDMEM16_ORIG_TD1 0x40007884u\r
-#define CYDEV_PHUB_TDMEM17_BASE 0x40007888u\r
-#define CYDEV_PHUB_TDMEM17_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM17_ORIG_TD0 0x40007888u\r
-#define CYREG_PHUB_TDMEM17_ORIG_TD1 0x4000788cu\r
-#define CYDEV_PHUB_TDMEM18_BASE 0x40007890u\r
-#define CYDEV_PHUB_TDMEM18_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM18_ORIG_TD0 0x40007890u\r
-#define CYREG_PHUB_TDMEM18_ORIG_TD1 0x40007894u\r
-#define CYDEV_PHUB_TDMEM19_BASE 0x40007898u\r
-#define CYDEV_PHUB_TDMEM19_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM19_ORIG_TD0 0x40007898u\r
-#define CYREG_PHUB_TDMEM19_ORIG_TD1 0x4000789cu\r
-#define CYDEV_PHUB_TDMEM20_BASE 0x400078a0u\r
-#define CYDEV_PHUB_TDMEM20_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM20_ORIG_TD0 0x400078a0u\r
-#define CYREG_PHUB_TDMEM20_ORIG_TD1 0x400078a4u\r
-#define CYDEV_PHUB_TDMEM21_BASE 0x400078a8u\r
-#define CYDEV_PHUB_TDMEM21_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM21_ORIG_TD0 0x400078a8u\r
-#define CYREG_PHUB_TDMEM21_ORIG_TD1 0x400078acu\r
-#define CYDEV_PHUB_TDMEM22_BASE 0x400078b0u\r
-#define CYDEV_PHUB_TDMEM22_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM22_ORIG_TD0 0x400078b0u\r
-#define CYREG_PHUB_TDMEM22_ORIG_TD1 0x400078b4u\r
-#define CYDEV_PHUB_TDMEM23_BASE 0x400078b8u\r
-#define CYDEV_PHUB_TDMEM23_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM23_ORIG_TD0 0x400078b8u\r
-#define CYREG_PHUB_TDMEM23_ORIG_TD1 0x400078bcu\r
-#define CYDEV_PHUB_TDMEM24_BASE 0x400078c0u\r
-#define CYDEV_PHUB_TDMEM24_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM24_ORIG_TD0 0x400078c0u\r
-#define CYREG_PHUB_TDMEM24_ORIG_TD1 0x400078c4u\r
-#define CYDEV_PHUB_TDMEM25_BASE 0x400078c8u\r
-#define CYDEV_PHUB_TDMEM25_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM25_ORIG_TD0 0x400078c8u\r
-#define CYREG_PHUB_TDMEM25_ORIG_TD1 0x400078ccu\r
-#define CYDEV_PHUB_TDMEM26_BASE 0x400078d0u\r
-#define CYDEV_PHUB_TDMEM26_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM26_ORIG_TD0 0x400078d0u\r
-#define CYREG_PHUB_TDMEM26_ORIG_TD1 0x400078d4u\r
-#define CYDEV_PHUB_TDMEM27_BASE 0x400078d8u\r
-#define CYDEV_PHUB_TDMEM27_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM27_ORIG_TD0 0x400078d8u\r
-#define CYREG_PHUB_TDMEM27_ORIG_TD1 0x400078dcu\r
-#define CYDEV_PHUB_TDMEM28_BASE 0x400078e0u\r
-#define CYDEV_PHUB_TDMEM28_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM28_ORIG_TD0 0x400078e0u\r
-#define CYREG_PHUB_TDMEM28_ORIG_TD1 0x400078e4u\r
-#define CYDEV_PHUB_TDMEM29_BASE 0x400078e8u\r
-#define CYDEV_PHUB_TDMEM29_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM29_ORIG_TD0 0x400078e8u\r
-#define CYREG_PHUB_TDMEM29_ORIG_TD1 0x400078ecu\r
-#define CYDEV_PHUB_TDMEM30_BASE 0x400078f0u\r
-#define CYDEV_PHUB_TDMEM30_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM30_ORIG_TD0 0x400078f0u\r
-#define CYREG_PHUB_TDMEM30_ORIG_TD1 0x400078f4u\r
-#define CYDEV_PHUB_TDMEM31_BASE 0x400078f8u\r
-#define CYDEV_PHUB_TDMEM31_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM31_ORIG_TD0 0x400078f8u\r
-#define CYREG_PHUB_TDMEM31_ORIG_TD1 0x400078fcu\r
-#define CYDEV_PHUB_TDMEM32_BASE 0x40007900u\r
-#define CYDEV_PHUB_TDMEM32_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM32_ORIG_TD0 0x40007900u\r
-#define CYREG_PHUB_TDMEM32_ORIG_TD1 0x40007904u\r
-#define CYDEV_PHUB_TDMEM33_BASE 0x40007908u\r
-#define CYDEV_PHUB_TDMEM33_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM33_ORIG_TD0 0x40007908u\r
-#define CYREG_PHUB_TDMEM33_ORIG_TD1 0x4000790cu\r
-#define CYDEV_PHUB_TDMEM34_BASE 0x40007910u\r
-#define CYDEV_PHUB_TDMEM34_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM34_ORIG_TD0 0x40007910u\r
-#define CYREG_PHUB_TDMEM34_ORIG_TD1 0x40007914u\r
-#define CYDEV_PHUB_TDMEM35_BASE 0x40007918u\r
-#define CYDEV_PHUB_TDMEM35_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM35_ORIG_TD0 0x40007918u\r
-#define CYREG_PHUB_TDMEM35_ORIG_TD1 0x4000791cu\r
-#define CYDEV_PHUB_TDMEM36_BASE 0x40007920u\r
-#define CYDEV_PHUB_TDMEM36_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM36_ORIG_TD0 0x40007920u\r
-#define CYREG_PHUB_TDMEM36_ORIG_TD1 0x40007924u\r
-#define CYDEV_PHUB_TDMEM37_BASE 0x40007928u\r
-#define CYDEV_PHUB_TDMEM37_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM37_ORIG_TD0 0x40007928u\r
-#define CYREG_PHUB_TDMEM37_ORIG_TD1 0x4000792cu\r
-#define CYDEV_PHUB_TDMEM38_BASE 0x40007930u\r
-#define CYDEV_PHUB_TDMEM38_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM38_ORIG_TD0 0x40007930u\r
-#define CYREG_PHUB_TDMEM38_ORIG_TD1 0x40007934u\r
-#define CYDEV_PHUB_TDMEM39_BASE 0x40007938u\r
-#define CYDEV_PHUB_TDMEM39_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM39_ORIG_TD0 0x40007938u\r
-#define CYREG_PHUB_TDMEM39_ORIG_TD1 0x4000793cu\r
-#define CYDEV_PHUB_TDMEM40_BASE 0x40007940u\r
-#define CYDEV_PHUB_TDMEM40_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM40_ORIG_TD0 0x40007940u\r
-#define CYREG_PHUB_TDMEM40_ORIG_TD1 0x40007944u\r
-#define CYDEV_PHUB_TDMEM41_BASE 0x40007948u\r
-#define CYDEV_PHUB_TDMEM41_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM41_ORIG_TD0 0x40007948u\r
-#define CYREG_PHUB_TDMEM41_ORIG_TD1 0x4000794cu\r
-#define CYDEV_PHUB_TDMEM42_BASE 0x40007950u\r
-#define CYDEV_PHUB_TDMEM42_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM42_ORIG_TD0 0x40007950u\r
-#define CYREG_PHUB_TDMEM42_ORIG_TD1 0x40007954u\r
-#define CYDEV_PHUB_TDMEM43_BASE 0x40007958u\r
-#define CYDEV_PHUB_TDMEM43_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM43_ORIG_TD0 0x40007958u\r
-#define CYREG_PHUB_TDMEM43_ORIG_TD1 0x4000795cu\r
-#define CYDEV_PHUB_TDMEM44_BASE 0x40007960u\r
-#define CYDEV_PHUB_TDMEM44_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM44_ORIG_TD0 0x40007960u\r
-#define CYREG_PHUB_TDMEM44_ORIG_TD1 0x40007964u\r
-#define CYDEV_PHUB_TDMEM45_BASE 0x40007968u\r
-#define CYDEV_PHUB_TDMEM45_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM45_ORIG_TD0 0x40007968u\r
-#define CYREG_PHUB_TDMEM45_ORIG_TD1 0x4000796cu\r
-#define CYDEV_PHUB_TDMEM46_BASE 0x40007970u\r
-#define CYDEV_PHUB_TDMEM46_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM46_ORIG_TD0 0x40007970u\r
-#define CYREG_PHUB_TDMEM46_ORIG_TD1 0x40007974u\r
-#define CYDEV_PHUB_TDMEM47_BASE 0x40007978u\r
-#define CYDEV_PHUB_TDMEM47_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM47_ORIG_TD0 0x40007978u\r
-#define CYREG_PHUB_TDMEM47_ORIG_TD1 0x4000797cu\r
-#define CYDEV_PHUB_TDMEM48_BASE 0x40007980u\r
-#define CYDEV_PHUB_TDMEM48_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM48_ORIG_TD0 0x40007980u\r
-#define CYREG_PHUB_TDMEM48_ORIG_TD1 0x40007984u\r
-#define CYDEV_PHUB_TDMEM49_BASE 0x40007988u\r
-#define CYDEV_PHUB_TDMEM49_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM49_ORIG_TD0 0x40007988u\r
-#define CYREG_PHUB_TDMEM49_ORIG_TD1 0x4000798cu\r
-#define CYDEV_PHUB_TDMEM50_BASE 0x40007990u\r
-#define CYDEV_PHUB_TDMEM50_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM50_ORIG_TD0 0x40007990u\r
-#define CYREG_PHUB_TDMEM50_ORIG_TD1 0x40007994u\r
-#define CYDEV_PHUB_TDMEM51_BASE 0x40007998u\r
-#define CYDEV_PHUB_TDMEM51_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM51_ORIG_TD0 0x40007998u\r
-#define CYREG_PHUB_TDMEM51_ORIG_TD1 0x4000799cu\r
-#define CYDEV_PHUB_TDMEM52_BASE 0x400079a0u\r
-#define CYDEV_PHUB_TDMEM52_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM52_ORIG_TD0 0x400079a0u\r
-#define CYREG_PHUB_TDMEM52_ORIG_TD1 0x400079a4u\r
-#define CYDEV_PHUB_TDMEM53_BASE 0x400079a8u\r
-#define CYDEV_PHUB_TDMEM53_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM53_ORIG_TD0 0x400079a8u\r
-#define CYREG_PHUB_TDMEM53_ORIG_TD1 0x400079acu\r
-#define CYDEV_PHUB_TDMEM54_BASE 0x400079b0u\r
-#define CYDEV_PHUB_TDMEM54_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM54_ORIG_TD0 0x400079b0u\r
-#define CYREG_PHUB_TDMEM54_ORIG_TD1 0x400079b4u\r
-#define CYDEV_PHUB_TDMEM55_BASE 0x400079b8u\r
-#define CYDEV_PHUB_TDMEM55_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM55_ORIG_TD0 0x400079b8u\r
-#define CYREG_PHUB_TDMEM55_ORIG_TD1 0x400079bcu\r
-#define CYDEV_PHUB_TDMEM56_BASE 0x400079c0u\r
-#define CYDEV_PHUB_TDMEM56_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM56_ORIG_TD0 0x400079c0u\r
-#define CYREG_PHUB_TDMEM56_ORIG_TD1 0x400079c4u\r
-#define CYDEV_PHUB_TDMEM57_BASE 0x400079c8u\r
-#define CYDEV_PHUB_TDMEM57_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM57_ORIG_TD0 0x400079c8u\r
-#define CYREG_PHUB_TDMEM57_ORIG_TD1 0x400079ccu\r
-#define CYDEV_PHUB_TDMEM58_BASE 0x400079d0u\r
-#define CYDEV_PHUB_TDMEM58_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM58_ORIG_TD0 0x400079d0u\r
-#define CYREG_PHUB_TDMEM58_ORIG_TD1 0x400079d4u\r
-#define CYDEV_PHUB_TDMEM59_BASE 0x400079d8u\r
-#define CYDEV_PHUB_TDMEM59_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM59_ORIG_TD0 0x400079d8u\r
-#define CYREG_PHUB_TDMEM59_ORIG_TD1 0x400079dcu\r
-#define CYDEV_PHUB_TDMEM60_BASE 0x400079e0u\r
-#define CYDEV_PHUB_TDMEM60_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM60_ORIG_TD0 0x400079e0u\r
-#define CYREG_PHUB_TDMEM60_ORIG_TD1 0x400079e4u\r
-#define CYDEV_PHUB_TDMEM61_BASE 0x400079e8u\r
-#define CYDEV_PHUB_TDMEM61_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM61_ORIG_TD0 0x400079e8u\r
-#define CYREG_PHUB_TDMEM61_ORIG_TD1 0x400079ecu\r
-#define CYDEV_PHUB_TDMEM62_BASE 0x400079f0u\r
-#define CYDEV_PHUB_TDMEM62_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM62_ORIG_TD0 0x400079f0u\r
-#define CYREG_PHUB_TDMEM62_ORIG_TD1 0x400079f4u\r
-#define CYDEV_PHUB_TDMEM63_BASE 0x400079f8u\r
-#define CYDEV_PHUB_TDMEM63_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM63_ORIG_TD0 0x400079f8u\r
-#define CYREG_PHUB_TDMEM63_ORIG_TD1 0x400079fcu\r
-#define CYDEV_PHUB_TDMEM64_BASE 0x40007a00u\r
-#define CYDEV_PHUB_TDMEM64_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM64_ORIG_TD0 0x40007a00u\r
-#define CYREG_PHUB_TDMEM64_ORIG_TD1 0x40007a04u\r
-#define CYDEV_PHUB_TDMEM65_BASE 0x40007a08u\r
-#define CYDEV_PHUB_TDMEM65_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM65_ORIG_TD0 0x40007a08u\r
-#define CYREG_PHUB_TDMEM65_ORIG_TD1 0x40007a0cu\r
-#define CYDEV_PHUB_TDMEM66_BASE 0x40007a10u\r
-#define CYDEV_PHUB_TDMEM66_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM66_ORIG_TD0 0x40007a10u\r
-#define CYREG_PHUB_TDMEM66_ORIG_TD1 0x40007a14u\r
-#define CYDEV_PHUB_TDMEM67_BASE 0x40007a18u\r
-#define CYDEV_PHUB_TDMEM67_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM67_ORIG_TD0 0x40007a18u\r
-#define CYREG_PHUB_TDMEM67_ORIG_TD1 0x40007a1cu\r
-#define CYDEV_PHUB_TDMEM68_BASE 0x40007a20u\r
-#define CYDEV_PHUB_TDMEM68_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM68_ORIG_TD0 0x40007a20u\r
-#define CYREG_PHUB_TDMEM68_ORIG_TD1 0x40007a24u\r
-#define CYDEV_PHUB_TDMEM69_BASE 0x40007a28u\r
-#define CYDEV_PHUB_TDMEM69_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM69_ORIG_TD0 0x40007a28u\r
-#define CYREG_PHUB_TDMEM69_ORIG_TD1 0x40007a2cu\r
-#define CYDEV_PHUB_TDMEM70_BASE 0x40007a30u\r
-#define CYDEV_PHUB_TDMEM70_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM70_ORIG_TD0 0x40007a30u\r
-#define CYREG_PHUB_TDMEM70_ORIG_TD1 0x40007a34u\r
-#define CYDEV_PHUB_TDMEM71_BASE 0x40007a38u\r
-#define CYDEV_PHUB_TDMEM71_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM71_ORIG_TD0 0x40007a38u\r
-#define CYREG_PHUB_TDMEM71_ORIG_TD1 0x40007a3cu\r
-#define CYDEV_PHUB_TDMEM72_BASE 0x40007a40u\r
-#define CYDEV_PHUB_TDMEM72_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM72_ORIG_TD0 0x40007a40u\r
-#define CYREG_PHUB_TDMEM72_ORIG_TD1 0x40007a44u\r
-#define CYDEV_PHUB_TDMEM73_BASE 0x40007a48u\r
-#define CYDEV_PHUB_TDMEM73_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM73_ORIG_TD0 0x40007a48u\r
-#define CYREG_PHUB_TDMEM73_ORIG_TD1 0x40007a4cu\r
-#define CYDEV_PHUB_TDMEM74_BASE 0x40007a50u\r
-#define CYDEV_PHUB_TDMEM74_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM74_ORIG_TD0 0x40007a50u\r
-#define CYREG_PHUB_TDMEM74_ORIG_TD1 0x40007a54u\r
-#define CYDEV_PHUB_TDMEM75_BASE 0x40007a58u\r
-#define CYDEV_PHUB_TDMEM75_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM75_ORIG_TD0 0x40007a58u\r
-#define CYREG_PHUB_TDMEM75_ORIG_TD1 0x40007a5cu\r
-#define CYDEV_PHUB_TDMEM76_BASE 0x40007a60u\r
-#define CYDEV_PHUB_TDMEM76_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM76_ORIG_TD0 0x40007a60u\r
-#define CYREG_PHUB_TDMEM76_ORIG_TD1 0x40007a64u\r
-#define CYDEV_PHUB_TDMEM77_BASE 0x40007a68u\r
-#define CYDEV_PHUB_TDMEM77_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM77_ORIG_TD0 0x40007a68u\r
-#define CYREG_PHUB_TDMEM77_ORIG_TD1 0x40007a6cu\r
-#define CYDEV_PHUB_TDMEM78_BASE 0x40007a70u\r
-#define CYDEV_PHUB_TDMEM78_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM78_ORIG_TD0 0x40007a70u\r
-#define CYREG_PHUB_TDMEM78_ORIG_TD1 0x40007a74u\r
-#define CYDEV_PHUB_TDMEM79_BASE 0x40007a78u\r
-#define CYDEV_PHUB_TDMEM79_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM79_ORIG_TD0 0x40007a78u\r
-#define CYREG_PHUB_TDMEM79_ORIG_TD1 0x40007a7cu\r
-#define CYDEV_PHUB_TDMEM80_BASE 0x40007a80u\r
-#define CYDEV_PHUB_TDMEM80_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM80_ORIG_TD0 0x40007a80u\r
-#define CYREG_PHUB_TDMEM80_ORIG_TD1 0x40007a84u\r
-#define CYDEV_PHUB_TDMEM81_BASE 0x40007a88u\r
-#define CYDEV_PHUB_TDMEM81_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM81_ORIG_TD0 0x40007a88u\r
-#define CYREG_PHUB_TDMEM81_ORIG_TD1 0x40007a8cu\r
-#define CYDEV_PHUB_TDMEM82_BASE 0x40007a90u\r
-#define CYDEV_PHUB_TDMEM82_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM82_ORIG_TD0 0x40007a90u\r
-#define CYREG_PHUB_TDMEM82_ORIG_TD1 0x40007a94u\r
-#define CYDEV_PHUB_TDMEM83_BASE 0x40007a98u\r
-#define CYDEV_PHUB_TDMEM83_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM83_ORIG_TD0 0x40007a98u\r
-#define CYREG_PHUB_TDMEM83_ORIG_TD1 0x40007a9cu\r
-#define CYDEV_PHUB_TDMEM84_BASE 0x40007aa0u\r
-#define CYDEV_PHUB_TDMEM84_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM84_ORIG_TD0 0x40007aa0u\r
-#define CYREG_PHUB_TDMEM84_ORIG_TD1 0x40007aa4u\r
-#define CYDEV_PHUB_TDMEM85_BASE 0x40007aa8u\r
-#define CYDEV_PHUB_TDMEM85_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM85_ORIG_TD0 0x40007aa8u\r
-#define CYREG_PHUB_TDMEM85_ORIG_TD1 0x40007aacu\r
-#define CYDEV_PHUB_TDMEM86_BASE 0x40007ab0u\r
-#define CYDEV_PHUB_TDMEM86_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM86_ORIG_TD0 0x40007ab0u\r
-#define CYREG_PHUB_TDMEM86_ORIG_TD1 0x40007ab4u\r
-#define CYDEV_PHUB_TDMEM87_BASE 0x40007ab8u\r
-#define CYDEV_PHUB_TDMEM87_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM87_ORIG_TD0 0x40007ab8u\r
-#define CYREG_PHUB_TDMEM87_ORIG_TD1 0x40007abcu\r
-#define CYDEV_PHUB_TDMEM88_BASE 0x40007ac0u\r
-#define CYDEV_PHUB_TDMEM88_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM88_ORIG_TD0 0x40007ac0u\r
-#define CYREG_PHUB_TDMEM88_ORIG_TD1 0x40007ac4u\r
-#define CYDEV_PHUB_TDMEM89_BASE 0x40007ac8u\r
-#define CYDEV_PHUB_TDMEM89_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM89_ORIG_TD0 0x40007ac8u\r
-#define CYREG_PHUB_TDMEM89_ORIG_TD1 0x40007accu\r
-#define CYDEV_PHUB_TDMEM90_BASE 0x40007ad0u\r
-#define CYDEV_PHUB_TDMEM90_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM90_ORIG_TD0 0x40007ad0u\r
-#define CYREG_PHUB_TDMEM90_ORIG_TD1 0x40007ad4u\r
-#define CYDEV_PHUB_TDMEM91_BASE 0x40007ad8u\r
-#define CYDEV_PHUB_TDMEM91_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM91_ORIG_TD0 0x40007ad8u\r
-#define CYREG_PHUB_TDMEM91_ORIG_TD1 0x40007adcu\r
-#define CYDEV_PHUB_TDMEM92_BASE 0x40007ae0u\r
-#define CYDEV_PHUB_TDMEM92_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM92_ORIG_TD0 0x40007ae0u\r
-#define CYREG_PHUB_TDMEM92_ORIG_TD1 0x40007ae4u\r
-#define CYDEV_PHUB_TDMEM93_BASE 0x40007ae8u\r
-#define CYDEV_PHUB_TDMEM93_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM93_ORIG_TD0 0x40007ae8u\r
-#define CYREG_PHUB_TDMEM93_ORIG_TD1 0x40007aecu\r
-#define CYDEV_PHUB_TDMEM94_BASE 0x40007af0u\r
-#define CYDEV_PHUB_TDMEM94_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM94_ORIG_TD0 0x40007af0u\r
-#define CYREG_PHUB_TDMEM94_ORIG_TD1 0x40007af4u\r
-#define CYDEV_PHUB_TDMEM95_BASE 0x40007af8u\r
-#define CYDEV_PHUB_TDMEM95_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM95_ORIG_TD0 0x40007af8u\r
-#define CYREG_PHUB_TDMEM95_ORIG_TD1 0x40007afcu\r
-#define CYDEV_PHUB_TDMEM96_BASE 0x40007b00u\r
-#define CYDEV_PHUB_TDMEM96_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM96_ORIG_TD0 0x40007b00u\r
-#define CYREG_PHUB_TDMEM96_ORIG_TD1 0x40007b04u\r
-#define CYDEV_PHUB_TDMEM97_BASE 0x40007b08u\r
-#define CYDEV_PHUB_TDMEM97_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM97_ORIG_TD0 0x40007b08u\r
-#define CYREG_PHUB_TDMEM97_ORIG_TD1 0x40007b0cu\r
-#define CYDEV_PHUB_TDMEM98_BASE 0x40007b10u\r
-#define CYDEV_PHUB_TDMEM98_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM98_ORIG_TD0 0x40007b10u\r
-#define CYREG_PHUB_TDMEM98_ORIG_TD1 0x40007b14u\r
-#define CYDEV_PHUB_TDMEM99_BASE 0x40007b18u\r
-#define CYDEV_PHUB_TDMEM99_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM99_ORIG_TD0 0x40007b18u\r
-#define CYREG_PHUB_TDMEM99_ORIG_TD1 0x40007b1cu\r
-#define CYDEV_PHUB_TDMEM100_BASE 0x40007b20u\r
-#define CYDEV_PHUB_TDMEM100_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM100_ORIG_TD0 0x40007b20u\r
-#define CYREG_PHUB_TDMEM100_ORIG_TD1 0x40007b24u\r
-#define CYDEV_PHUB_TDMEM101_BASE 0x40007b28u\r
-#define CYDEV_PHUB_TDMEM101_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM101_ORIG_TD0 0x40007b28u\r
-#define CYREG_PHUB_TDMEM101_ORIG_TD1 0x40007b2cu\r
-#define CYDEV_PHUB_TDMEM102_BASE 0x40007b30u\r
-#define CYDEV_PHUB_TDMEM102_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM102_ORIG_TD0 0x40007b30u\r
-#define CYREG_PHUB_TDMEM102_ORIG_TD1 0x40007b34u\r
-#define CYDEV_PHUB_TDMEM103_BASE 0x40007b38u\r
-#define CYDEV_PHUB_TDMEM103_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM103_ORIG_TD0 0x40007b38u\r
-#define CYREG_PHUB_TDMEM103_ORIG_TD1 0x40007b3cu\r
-#define CYDEV_PHUB_TDMEM104_BASE 0x40007b40u\r
-#define CYDEV_PHUB_TDMEM104_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM104_ORIG_TD0 0x40007b40u\r
-#define CYREG_PHUB_TDMEM104_ORIG_TD1 0x40007b44u\r
-#define CYDEV_PHUB_TDMEM105_BASE 0x40007b48u\r
-#define CYDEV_PHUB_TDMEM105_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM105_ORIG_TD0 0x40007b48u\r
-#define CYREG_PHUB_TDMEM105_ORIG_TD1 0x40007b4cu\r
-#define CYDEV_PHUB_TDMEM106_BASE 0x40007b50u\r
-#define CYDEV_PHUB_TDMEM106_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM106_ORIG_TD0 0x40007b50u\r
-#define CYREG_PHUB_TDMEM106_ORIG_TD1 0x40007b54u\r
-#define CYDEV_PHUB_TDMEM107_BASE 0x40007b58u\r
-#define CYDEV_PHUB_TDMEM107_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM107_ORIG_TD0 0x40007b58u\r
-#define CYREG_PHUB_TDMEM107_ORIG_TD1 0x40007b5cu\r
-#define CYDEV_PHUB_TDMEM108_BASE 0x40007b60u\r
-#define CYDEV_PHUB_TDMEM108_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM108_ORIG_TD0 0x40007b60u\r
-#define CYREG_PHUB_TDMEM108_ORIG_TD1 0x40007b64u\r
-#define CYDEV_PHUB_TDMEM109_BASE 0x40007b68u\r
-#define CYDEV_PHUB_TDMEM109_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM109_ORIG_TD0 0x40007b68u\r
-#define CYREG_PHUB_TDMEM109_ORIG_TD1 0x40007b6cu\r
-#define CYDEV_PHUB_TDMEM110_BASE 0x40007b70u\r
-#define CYDEV_PHUB_TDMEM110_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM110_ORIG_TD0 0x40007b70u\r
-#define CYREG_PHUB_TDMEM110_ORIG_TD1 0x40007b74u\r
-#define CYDEV_PHUB_TDMEM111_BASE 0x40007b78u\r
-#define CYDEV_PHUB_TDMEM111_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM111_ORIG_TD0 0x40007b78u\r
-#define CYREG_PHUB_TDMEM111_ORIG_TD1 0x40007b7cu\r
-#define CYDEV_PHUB_TDMEM112_BASE 0x40007b80u\r
-#define CYDEV_PHUB_TDMEM112_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM112_ORIG_TD0 0x40007b80u\r
-#define CYREG_PHUB_TDMEM112_ORIG_TD1 0x40007b84u\r
-#define CYDEV_PHUB_TDMEM113_BASE 0x40007b88u\r
-#define CYDEV_PHUB_TDMEM113_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM113_ORIG_TD0 0x40007b88u\r
-#define CYREG_PHUB_TDMEM113_ORIG_TD1 0x40007b8cu\r
-#define CYDEV_PHUB_TDMEM114_BASE 0x40007b90u\r
-#define CYDEV_PHUB_TDMEM114_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM114_ORIG_TD0 0x40007b90u\r
-#define CYREG_PHUB_TDMEM114_ORIG_TD1 0x40007b94u\r
-#define CYDEV_PHUB_TDMEM115_BASE 0x40007b98u\r
-#define CYDEV_PHUB_TDMEM115_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM115_ORIG_TD0 0x40007b98u\r
-#define CYREG_PHUB_TDMEM115_ORIG_TD1 0x40007b9cu\r
-#define CYDEV_PHUB_TDMEM116_BASE 0x40007ba0u\r
-#define CYDEV_PHUB_TDMEM116_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM116_ORIG_TD0 0x40007ba0u\r
-#define CYREG_PHUB_TDMEM116_ORIG_TD1 0x40007ba4u\r
-#define CYDEV_PHUB_TDMEM117_BASE 0x40007ba8u\r
-#define CYDEV_PHUB_TDMEM117_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM117_ORIG_TD0 0x40007ba8u\r
-#define CYREG_PHUB_TDMEM117_ORIG_TD1 0x40007bacu\r
-#define CYDEV_PHUB_TDMEM118_BASE 0x40007bb0u\r
-#define CYDEV_PHUB_TDMEM118_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM118_ORIG_TD0 0x40007bb0u\r
-#define CYREG_PHUB_TDMEM118_ORIG_TD1 0x40007bb4u\r
-#define CYDEV_PHUB_TDMEM119_BASE 0x40007bb8u\r
-#define CYDEV_PHUB_TDMEM119_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM119_ORIG_TD0 0x40007bb8u\r
-#define CYREG_PHUB_TDMEM119_ORIG_TD1 0x40007bbcu\r
-#define CYDEV_PHUB_TDMEM120_BASE 0x40007bc0u\r
-#define CYDEV_PHUB_TDMEM120_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM120_ORIG_TD0 0x40007bc0u\r
-#define CYREG_PHUB_TDMEM120_ORIG_TD1 0x40007bc4u\r
-#define CYDEV_PHUB_TDMEM121_BASE 0x40007bc8u\r
-#define CYDEV_PHUB_TDMEM121_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM121_ORIG_TD0 0x40007bc8u\r
-#define CYREG_PHUB_TDMEM121_ORIG_TD1 0x40007bccu\r
-#define CYDEV_PHUB_TDMEM122_BASE 0x40007bd0u\r
-#define CYDEV_PHUB_TDMEM122_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM122_ORIG_TD0 0x40007bd0u\r
-#define CYREG_PHUB_TDMEM122_ORIG_TD1 0x40007bd4u\r
-#define CYDEV_PHUB_TDMEM123_BASE 0x40007bd8u\r
-#define CYDEV_PHUB_TDMEM123_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM123_ORIG_TD0 0x40007bd8u\r
-#define CYREG_PHUB_TDMEM123_ORIG_TD1 0x40007bdcu\r
-#define CYDEV_PHUB_TDMEM124_BASE 0x40007be0u\r
-#define CYDEV_PHUB_TDMEM124_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM124_ORIG_TD0 0x40007be0u\r
-#define CYREG_PHUB_TDMEM124_ORIG_TD1 0x40007be4u\r
-#define CYDEV_PHUB_TDMEM125_BASE 0x40007be8u\r
-#define CYDEV_PHUB_TDMEM125_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM125_ORIG_TD0 0x40007be8u\r
-#define CYREG_PHUB_TDMEM125_ORIG_TD1 0x40007becu\r
-#define CYDEV_PHUB_TDMEM126_BASE 0x40007bf0u\r
-#define CYDEV_PHUB_TDMEM126_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM126_ORIG_TD0 0x40007bf0u\r
-#define CYREG_PHUB_TDMEM126_ORIG_TD1 0x40007bf4u\r
-#define CYDEV_PHUB_TDMEM127_BASE 0x40007bf8u\r
-#define CYDEV_PHUB_TDMEM127_SIZE 0x00000008u\r
-#define CYREG_PHUB_TDMEM127_ORIG_TD0 0x40007bf8u\r
-#define CYREG_PHUB_TDMEM127_ORIG_TD1 0x40007bfcu\r
-#define CYDEV_EE_BASE 0x40008000u\r
-#define CYDEV_EE_SIZE 0x00000800u\r
-#define CYREG_EE_DATA_MBASE 0x40008000u\r
-#define CYREG_EE_DATA_MSIZE 0x00000800u\r
-#define CYDEV_CAN0_BASE 0x4000a000u\r
-#define CYDEV_CAN0_SIZE 0x000002a0u\r
-#define CYDEV_CAN0_CSR_BASE 0x4000a000u\r
-#define CYDEV_CAN0_CSR_SIZE 0x00000018u\r
-#define CYREG_CAN0_CSR_INT_SR 0x4000a000u\r
-#define CYREG_CAN0_CSR_INT_EN 0x4000a004u\r
-#define CYREG_CAN0_CSR_BUF_SR 0x4000a008u\r
-#define CYREG_CAN0_CSR_ERR_SR 0x4000a00cu\r
-#define CYREG_CAN0_CSR_CMD 0x4000a010u\r
-#define CYREG_CAN0_CSR_CFG 0x4000a014u\r
-#define CYDEV_CAN0_TX0_BASE 0x4000a020u\r
-#define CYDEV_CAN0_TX0_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX0_CMD 0x4000a020u\r
-#define CYREG_CAN0_TX0_ID 0x4000a024u\r
-#define CYREG_CAN0_TX0_DH 0x4000a028u\r
-#define CYREG_CAN0_TX0_DL 0x4000a02cu\r
-#define CYDEV_CAN0_TX1_BASE 0x4000a030u\r
-#define CYDEV_CAN0_TX1_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX1_CMD 0x4000a030u\r
-#define CYREG_CAN0_TX1_ID 0x4000a034u\r
-#define CYREG_CAN0_TX1_DH 0x4000a038u\r
-#define CYREG_CAN0_TX1_DL 0x4000a03cu\r
-#define CYDEV_CAN0_TX2_BASE 0x4000a040u\r
-#define CYDEV_CAN0_TX2_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX2_CMD 0x4000a040u\r
-#define CYREG_CAN0_TX2_ID 0x4000a044u\r
-#define CYREG_CAN0_TX2_DH 0x4000a048u\r
-#define CYREG_CAN0_TX2_DL 0x4000a04cu\r
-#define CYDEV_CAN0_TX3_BASE 0x4000a050u\r
-#define CYDEV_CAN0_TX3_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX3_CMD 0x4000a050u\r
-#define CYREG_CAN0_TX3_ID 0x4000a054u\r
-#define CYREG_CAN0_TX3_DH 0x4000a058u\r
-#define CYREG_CAN0_TX3_DL 0x4000a05cu\r
-#define CYDEV_CAN0_TX4_BASE 0x4000a060u\r
-#define CYDEV_CAN0_TX4_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX4_CMD 0x4000a060u\r
-#define CYREG_CAN0_TX4_ID 0x4000a064u\r
-#define CYREG_CAN0_TX4_DH 0x4000a068u\r
-#define CYREG_CAN0_TX4_DL 0x4000a06cu\r
-#define CYDEV_CAN0_TX5_BASE 0x4000a070u\r
-#define CYDEV_CAN0_TX5_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX5_CMD 0x4000a070u\r
-#define CYREG_CAN0_TX5_ID 0x4000a074u\r
-#define CYREG_CAN0_TX5_DH 0x4000a078u\r
-#define CYREG_CAN0_TX5_DL 0x4000a07cu\r
-#define CYDEV_CAN0_TX6_BASE 0x4000a080u\r
-#define CYDEV_CAN0_TX6_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX6_CMD 0x4000a080u\r
-#define CYREG_CAN0_TX6_ID 0x4000a084u\r
-#define CYREG_CAN0_TX6_DH 0x4000a088u\r
-#define CYREG_CAN0_TX6_DL 0x4000a08cu\r
-#define CYDEV_CAN0_TX7_BASE 0x4000a090u\r
-#define CYDEV_CAN0_TX7_SIZE 0x00000010u\r
-#define CYREG_CAN0_TX7_CMD 0x4000a090u\r
-#define CYREG_CAN0_TX7_ID 0x4000a094u\r
-#define CYREG_CAN0_TX7_DH 0x4000a098u\r
-#define CYREG_CAN0_TX7_DL 0x4000a09cu\r
-#define CYDEV_CAN0_RX0_BASE 0x4000a0a0u\r
-#define CYDEV_CAN0_RX0_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX0_CMD 0x4000a0a0u\r
-#define CYREG_CAN0_RX0_ID 0x4000a0a4u\r
-#define CYREG_CAN0_RX0_DH 0x4000a0a8u\r
-#define CYREG_CAN0_RX0_DL 0x4000a0acu\r
-#define CYREG_CAN0_RX0_AMR 0x4000a0b0u\r
-#define CYREG_CAN0_RX0_ACR 0x4000a0b4u\r
-#define CYREG_CAN0_RX0_AMRD 0x4000a0b8u\r
-#define CYREG_CAN0_RX0_ACRD 0x4000a0bcu\r
-#define CYDEV_CAN0_RX1_BASE 0x4000a0c0u\r
-#define CYDEV_CAN0_RX1_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX1_CMD 0x4000a0c0u\r
-#define CYREG_CAN0_RX1_ID 0x4000a0c4u\r
-#define CYREG_CAN0_RX1_DH 0x4000a0c8u\r
-#define CYREG_CAN0_RX1_DL 0x4000a0ccu\r
-#define CYREG_CAN0_RX1_AMR 0x4000a0d0u\r
-#define CYREG_CAN0_RX1_ACR 0x4000a0d4u\r
-#define CYREG_CAN0_RX1_AMRD 0x4000a0d8u\r
-#define CYREG_CAN0_RX1_ACRD 0x4000a0dcu\r
-#define CYDEV_CAN0_RX2_BASE 0x4000a0e0u\r
-#define CYDEV_CAN0_RX2_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX2_CMD 0x4000a0e0u\r
-#define CYREG_CAN0_RX2_ID 0x4000a0e4u\r
-#define CYREG_CAN0_RX2_DH 0x4000a0e8u\r
-#define CYREG_CAN0_RX2_DL 0x4000a0ecu\r
-#define CYREG_CAN0_RX2_AMR 0x4000a0f0u\r
-#define CYREG_CAN0_RX2_ACR 0x4000a0f4u\r
-#define CYREG_CAN0_RX2_AMRD 0x4000a0f8u\r
-#define CYREG_CAN0_RX2_ACRD 0x4000a0fcu\r
-#define CYDEV_CAN0_RX3_BASE 0x4000a100u\r
-#define CYDEV_CAN0_RX3_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX3_CMD 0x4000a100u\r
-#define CYREG_CAN0_RX3_ID 0x4000a104u\r
-#define CYREG_CAN0_RX3_DH 0x4000a108u\r
-#define CYREG_CAN0_RX3_DL 0x4000a10cu\r
-#define CYREG_CAN0_RX3_AMR 0x4000a110u\r
-#define CYREG_CAN0_RX3_ACR 0x4000a114u\r
-#define CYREG_CAN0_RX3_AMRD 0x4000a118u\r
-#define CYREG_CAN0_RX3_ACRD 0x4000a11cu\r
-#define CYDEV_CAN0_RX4_BASE 0x4000a120u\r
-#define CYDEV_CAN0_RX4_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX4_CMD 0x4000a120u\r
-#define CYREG_CAN0_RX4_ID 0x4000a124u\r
-#define CYREG_CAN0_RX4_DH 0x4000a128u\r
-#define CYREG_CAN0_RX4_DL 0x4000a12cu\r
-#define CYREG_CAN0_RX4_AMR 0x4000a130u\r
-#define CYREG_CAN0_RX4_ACR 0x4000a134u\r
-#define CYREG_CAN0_RX4_AMRD 0x4000a138u\r
-#define CYREG_CAN0_RX4_ACRD 0x4000a13cu\r
-#define CYDEV_CAN0_RX5_BASE 0x4000a140u\r
-#define CYDEV_CAN0_RX5_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX5_CMD 0x4000a140u\r
-#define CYREG_CAN0_RX5_ID 0x4000a144u\r
-#define CYREG_CAN0_RX5_DH 0x4000a148u\r
-#define CYREG_CAN0_RX5_DL 0x4000a14cu\r
-#define CYREG_CAN0_RX5_AMR 0x4000a150u\r
-#define CYREG_CAN0_RX5_ACR 0x4000a154u\r
-#define CYREG_CAN0_RX5_AMRD 0x4000a158u\r
-#define CYREG_CAN0_RX5_ACRD 0x4000a15cu\r
-#define CYDEV_CAN0_RX6_BASE 0x4000a160u\r
-#define CYDEV_CAN0_RX6_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX6_CMD 0x4000a160u\r
-#define CYREG_CAN0_RX6_ID 0x4000a164u\r
-#define CYREG_CAN0_RX6_DH 0x4000a168u\r
-#define CYREG_CAN0_RX6_DL 0x4000a16cu\r
-#define CYREG_CAN0_RX6_AMR 0x4000a170u\r
-#define CYREG_CAN0_RX6_ACR 0x4000a174u\r
-#define CYREG_CAN0_RX6_AMRD 0x4000a178u\r
-#define CYREG_CAN0_RX6_ACRD 0x4000a17cu\r
-#define CYDEV_CAN0_RX7_BASE 0x4000a180u\r
-#define CYDEV_CAN0_RX7_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX7_CMD 0x4000a180u\r
-#define CYREG_CAN0_RX7_ID 0x4000a184u\r
-#define CYREG_CAN0_RX7_DH 0x4000a188u\r
-#define CYREG_CAN0_RX7_DL 0x4000a18cu\r
-#define CYREG_CAN0_RX7_AMR 0x4000a190u\r
-#define CYREG_CAN0_RX7_ACR 0x4000a194u\r
-#define CYREG_CAN0_RX7_AMRD 0x4000a198u\r
-#define CYREG_CAN0_RX7_ACRD 0x4000a19cu\r
-#define CYDEV_CAN0_RX8_BASE 0x4000a1a0u\r
-#define CYDEV_CAN0_RX8_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX8_CMD 0x4000a1a0u\r
-#define CYREG_CAN0_RX8_ID 0x4000a1a4u\r
-#define CYREG_CAN0_RX8_DH 0x4000a1a8u\r
-#define CYREG_CAN0_RX8_DL 0x4000a1acu\r
-#define CYREG_CAN0_RX8_AMR 0x4000a1b0u\r
-#define CYREG_CAN0_RX8_ACR 0x4000a1b4u\r
-#define CYREG_CAN0_RX8_AMRD 0x4000a1b8u\r
-#define CYREG_CAN0_RX8_ACRD 0x4000a1bcu\r
-#define CYDEV_CAN0_RX9_BASE 0x4000a1c0u\r
-#define CYDEV_CAN0_RX9_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX9_CMD 0x4000a1c0u\r
-#define CYREG_CAN0_RX9_ID 0x4000a1c4u\r
-#define CYREG_CAN0_RX9_DH 0x4000a1c8u\r
-#define CYREG_CAN0_RX9_DL 0x4000a1ccu\r
-#define CYREG_CAN0_RX9_AMR 0x4000a1d0u\r
-#define CYREG_CAN0_RX9_ACR 0x4000a1d4u\r
-#define CYREG_CAN0_RX9_AMRD 0x4000a1d8u\r
-#define CYREG_CAN0_RX9_ACRD 0x4000a1dcu\r
-#define CYDEV_CAN0_RX10_BASE 0x4000a1e0u\r
-#define CYDEV_CAN0_RX10_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX10_CMD 0x4000a1e0u\r
-#define CYREG_CAN0_RX10_ID 0x4000a1e4u\r
-#define CYREG_CAN0_RX10_DH 0x4000a1e8u\r
-#define CYREG_CAN0_RX10_DL 0x4000a1ecu\r
-#define CYREG_CAN0_RX10_AMR 0x4000a1f0u\r
-#define CYREG_CAN0_RX10_ACR 0x4000a1f4u\r
-#define CYREG_CAN0_RX10_AMRD 0x4000a1f8u\r
-#define CYREG_CAN0_RX10_ACRD 0x4000a1fcu\r
-#define CYDEV_CAN0_RX11_BASE 0x4000a200u\r
-#define CYDEV_CAN0_RX11_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX11_CMD 0x4000a200u\r
-#define CYREG_CAN0_RX11_ID 0x4000a204u\r
-#define CYREG_CAN0_RX11_DH 0x4000a208u\r
-#define CYREG_CAN0_RX11_DL 0x4000a20cu\r
-#define CYREG_CAN0_RX11_AMR 0x4000a210u\r
-#define CYREG_CAN0_RX11_ACR 0x4000a214u\r
-#define CYREG_CAN0_RX11_AMRD 0x4000a218u\r
-#define CYREG_CAN0_RX11_ACRD 0x4000a21cu\r
-#define CYDEV_CAN0_RX12_BASE 0x4000a220u\r
-#define CYDEV_CAN0_RX12_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX12_CMD 0x4000a220u\r
-#define CYREG_CAN0_RX12_ID 0x4000a224u\r
-#define CYREG_CAN0_RX12_DH 0x4000a228u\r
-#define CYREG_CAN0_RX12_DL 0x4000a22cu\r
-#define CYREG_CAN0_RX12_AMR 0x4000a230u\r
-#define CYREG_CAN0_RX12_ACR 0x4000a234u\r
-#define CYREG_CAN0_RX12_AMRD 0x4000a238u\r
-#define CYREG_CAN0_RX12_ACRD 0x4000a23cu\r
-#define CYDEV_CAN0_RX13_BASE 0x4000a240u\r
-#define CYDEV_CAN0_RX13_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX13_CMD 0x4000a240u\r
-#define CYREG_CAN0_RX13_ID 0x4000a244u\r
-#define CYREG_CAN0_RX13_DH 0x4000a248u\r
-#define CYREG_CAN0_RX13_DL 0x4000a24cu\r
-#define CYREG_CAN0_RX13_AMR 0x4000a250u\r
-#define CYREG_CAN0_RX13_ACR 0x4000a254u\r
-#define CYREG_CAN0_RX13_AMRD 0x4000a258u\r
-#define CYREG_CAN0_RX13_ACRD 0x4000a25cu\r
-#define CYDEV_CAN0_RX14_BASE 0x4000a260u\r
-#define CYDEV_CAN0_RX14_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX14_CMD 0x4000a260u\r
-#define CYREG_CAN0_RX14_ID 0x4000a264u\r
-#define CYREG_CAN0_RX14_DH 0x4000a268u\r
-#define CYREG_CAN0_RX14_DL 0x4000a26cu\r
-#define CYREG_CAN0_RX14_AMR 0x4000a270u\r
-#define CYREG_CAN0_RX14_ACR 0x4000a274u\r
-#define CYREG_CAN0_RX14_AMRD 0x4000a278u\r
-#define CYREG_CAN0_RX14_ACRD 0x4000a27cu\r
-#define CYDEV_CAN0_RX15_BASE 0x4000a280u\r
-#define CYDEV_CAN0_RX15_SIZE 0x00000020u\r
-#define CYREG_CAN0_RX15_CMD 0x4000a280u\r
-#define CYREG_CAN0_RX15_ID 0x4000a284u\r
-#define CYREG_CAN0_RX15_DH 0x4000a288u\r
-#define CYREG_CAN0_RX15_DL 0x4000a28cu\r
-#define CYREG_CAN0_RX15_AMR 0x4000a290u\r
-#define CYREG_CAN0_RX15_ACR 0x4000a294u\r
-#define CYREG_CAN0_RX15_AMRD 0x4000a298u\r
-#define CYREG_CAN0_RX15_ACRD 0x4000a29cu\r
-#define CYDEV_DFB0_BASE 0x4000c000u\r
-#define CYDEV_DFB0_SIZE 0x000007b5u\r
-#define CYDEV_DFB0_DPA_SRAM_BASE 0x4000c000u\r
-#define CYDEV_DFB0_DPA_SRAM_SIZE 0x00000200u\r
-#define CYREG_DFB0_DPA_SRAM_DATA_MBASE 0x4000c000u\r
-#define CYREG_DFB0_DPA_SRAM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_DFB0_DPB_SRAM_BASE 0x4000c200u\r
-#define CYDEV_DFB0_DPB_SRAM_SIZE 0x00000200u\r
-#define CYREG_DFB0_DPB_SRAM_DATA_MBASE 0x4000c200u\r
-#define CYREG_DFB0_DPB_SRAM_DATA_MSIZE 0x00000200u\r
-#define CYDEV_DFB0_CSA_SRAM_BASE 0x4000c400u\r
-#define CYDEV_DFB0_CSA_SRAM_SIZE 0x00000100u\r
-#define CYREG_DFB0_CSA_SRAM_DATA_MBASE 0x4000c400u\r
-#define CYREG_DFB0_CSA_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_CSB_SRAM_BASE 0x4000c500u\r
-#define CYDEV_DFB0_CSB_SRAM_SIZE 0x00000100u\r
-#define CYREG_DFB0_CSB_SRAM_DATA_MBASE 0x4000c500u\r
-#define CYREG_DFB0_CSB_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_FSM_SRAM_BASE 0x4000c600u\r
-#define CYDEV_DFB0_FSM_SRAM_SIZE 0x00000100u\r
-#define CYREG_DFB0_FSM_SRAM_DATA_MBASE 0x4000c600u\r
-#define CYREG_DFB0_FSM_SRAM_DATA_MSIZE 0x00000100u\r
-#define CYDEV_DFB0_ACU_SRAM_BASE 0x4000c700u\r
-#define CYDEV_DFB0_ACU_SRAM_SIZE 0x00000040u\r
-#define CYREG_DFB0_ACU_SRAM_DATA_MBASE 0x4000c700u\r
-#define CYREG_DFB0_ACU_SRAM_DATA_MSIZE 0x00000040u\r
-#define CYREG_DFB0_CR 0x4000c780u\r
-#define CYREG_DFB0_SR 0x4000c784u\r
-#define CYREG_DFB0_RAM_EN 0x4000c788u\r
-#define CYREG_DFB0_RAM_DIR 0x4000c78cu\r
-#define CYREG_DFB0_SEMA 0x4000c790u\r
-#define CYREG_DFB0_DSI_CTRL 0x4000c794u\r
-#define CYREG_DFB0_INT_CTRL 0x4000c798u\r
-#define CYREG_DFB0_DMA_CTRL 0x4000c79cu\r
-#define CYREG_DFB0_STAGEA 0x4000c7a0u\r
-#define CYREG_DFB0_STAGEAM 0x4000c7a1u\r
-#define CYREG_DFB0_STAGEAH 0x4000c7a2u\r
-#define CYREG_DFB0_STAGEB 0x4000c7a4u\r
-#define CYREG_DFB0_STAGEBM 0x4000c7a5u\r
-#define CYREG_DFB0_STAGEBH 0x4000c7a6u\r
-#define CYREG_DFB0_HOLDA 0x4000c7a8u\r
-#define CYREG_DFB0_HOLDAM 0x4000c7a9u\r
-#define CYREG_DFB0_HOLDAH 0x4000c7aau\r
-#define CYREG_DFB0_HOLDAS 0x4000c7abu\r
-#define CYREG_DFB0_HOLDB 0x4000c7acu\r
-#define CYREG_DFB0_HOLDBM 0x4000c7adu\r
-#define CYREG_DFB0_HOLDBH 0x4000c7aeu\r
-#define CYREG_DFB0_HOLDBS 0x4000c7afu\r
-#define CYREG_DFB0_COHER 0x4000c7b0u\r
-#define CYREG_DFB0_DALIGN 0x4000c7b4u\r
-#define CYDEV_UCFG_BASE 0x40010000u\r
-#define CYDEV_UCFG_SIZE 0x00005040u\r
-#define CYDEV_UCFG_B0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_SIZE 0x00000fefu\r
-#define CYDEV_UCFG_B0_P0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_P0_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P0_U0_BASE 0x40010000u\r
-#define CYDEV_UCFG_B0_P0_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P0_U0_PLD_IT0 0x40010000u\r
-#define CYREG_B0_P0_U0_PLD_IT1 0x40010004u\r
-#define CYREG_B0_P0_U0_PLD_IT2 0x40010008u\r
-#define CYREG_B0_P0_U0_PLD_IT3 0x4001000cu\r
-#define CYREG_B0_P0_U0_PLD_IT4 0x40010010u\r
-#define CYREG_B0_P0_U0_PLD_IT5 0x40010014u\r
-#define CYREG_B0_P0_U0_PLD_IT6 0x40010018u\r
-#define CYREG_B0_P0_U0_PLD_IT7 0x4001001cu\r
-#define CYREG_B0_P0_U0_PLD_IT8 0x40010020u\r
-#define CYREG_B0_P0_U0_PLD_IT9 0x40010024u\r
-#define CYREG_B0_P0_U0_PLD_IT10 0x40010028u\r
-#define CYREG_B0_P0_U0_PLD_IT11 0x4001002cu\r
-#define CYREG_B0_P0_U0_PLD_ORT0 0x40010030u\r
-#define CYREG_B0_P0_U0_PLD_ORT1 0x40010032u\r
-#define CYREG_B0_P0_U0_PLD_ORT2 0x40010034u\r
-#define CYREG_B0_P0_U0_PLD_ORT3 0x40010036u\r
-#define CYREG_B0_P0_U0_MC_CFG_CEN_CONST 0x40010038u\r
-#define CYREG_B0_P0_U0_MC_CFG_XORFB 0x4001003au\r
-#define CYREG_B0_P0_U0_MC_CFG_SET_RESET 0x4001003cu\r
-#define CYREG_B0_P0_U0_MC_CFG_BYPASS 0x4001003eu\r
-#define CYREG_B0_P0_U0_CFG0 0x40010040u\r
-#define CYREG_B0_P0_U0_CFG1 0x40010041u\r
-#define CYREG_B0_P0_U0_CFG2 0x40010042u\r
-#define CYREG_B0_P0_U0_CFG3 0x40010043u\r
-#define CYREG_B0_P0_U0_CFG4 0x40010044u\r
-#define CYREG_B0_P0_U0_CFG5 0x40010045u\r
-#define CYREG_B0_P0_U0_CFG6 0x40010046u\r
-#define CYREG_B0_P0_U0_CFG7 0x40010047u\r
-#define CYREG_B0_P0_U0_CFG8 0x40010048u\r
-#define CYREG_B0_P0_U0_CFG9 0x40010049u\r
-#define CYREG_B0_P0_U0_CFG10 0x4001004au\r
-#define CYREG_B0_P0_U0_CFG11 0x4001004bu\r
-#define CYREG_B0_P0_U0_CFG12 0x4001004cu\r
-#define CYREG_B0_P0_U0_CFG13 0x4001004du\r
-#define CYREG_B0_P0_U0_CFG14 0x4001004eu\r
-#define CYREG_B0_P0_U0_CFG15 0x4001004fu\r
-#define CYREG_B0_P0_U0_CFG16 0x40010050u\r
-#define CYREG_B0_P0_U0_CFG17 0x40010051u\r
-#define CYREG_B0_P0_U0_CFG18 0x40010052u\r
-#define CYREG_B0_P0_U0_CFG19 0x40010053u\r
-#define CYREG_B0_P0_U0_CFG20 0x40010054u\r
-#define CYREG_B0_P0_U0_CFG21 0x40010055u\r
-#define CYREG_B0_P0_U0_CFG22 0x40010056u\r
-#define CYREG_B0_P0_U0_CFG23 0x40010057u\r
-#define CYREG_B0_P0_U0_CFG24 0x40010058u\r
-#define CYREG_B0_P0_U0_CFG25 0x40010059u\r
-#define CYREG_B0_P0_U0_CFG26 0x4001005au\r
-#define CYREG_B0_P0_U0_CFG27 0x4001005bu\r
-#define CYREG_B0_P0_U0_CFG28 0x4001005cu\r
-#define CYREG_B0_P0_U0_CFG29 0x4001005du\r
-#define CYREG_B0_P0_U0_CFG30 0x4001005eu\r
-#define CYREG_B0_P0_U0_CFG31 0x4001005fu\r
-#define CYREG_B0_P0_U0_DCFG0 0x40010060u\r
-#define CYREG_B0_P0_U0_DCFG1 0x40010062u\r
-#define CYREG_B0_P0_U0_DCFG2 0x40010064u\r
-#define CYREG_B0_P0_U0_DCFG3 0x40010066u\r
-#define CYREG_B0_P0_U0_DCFG4 0x40010068u\r
-#define CYREG_B0_P0_U0_DCFG5 0x4001006au\r
-#define CYREG_B0_P0_U0_DCFG6 0x4001006cu\r
-#define CYREG_B0_P0_U0_DCFG7 0x4001006eu\r
-#define CYDEV_UCFG_B0_P0_U1_BASE 0x40010080u\r
-#define CYDEV_UCFG_B0_P0_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P0_U1_PLD_IT0 0x40010080u\r
-#define CYREG_B0_P0_U1_PLD_IT1 0x40010084u\r
-#define CYREG_B0_P0_U1_PLD_IT2 0x40010088u\r
-#define CYREG_B0_P0_U1_PLD_IT3 0x4001008cu\r
-#define CYREG_B0_P0_U1_PLD_IT4 0x40010090u\r
-#define CYREG_B0_P0_U1_PLD_IT5 0x40010094u\r
-#define CYREG_B0_P0_U1_PLD_IT6 0x40010098u\r
-#define CYREG_B0_P0_U1_PLD_IT7 0x4001009cu\r
-#define CYREG_B0_P0_U1_PLD_IT8 0x400100a0u\r
-#define CYREG_B0_P0_U1_PLD_IT9 0x400100a4u\r
-#define CYREG_B0_P0_U1_PLD_IT10 0x400100a8u\r
-#define CYREG_B0_P0_U1_PLD_IT11 0x400100acu\r
-#define CYREG_B0_P0_U1_PLD_ORT0 0x400100b0u\r
-#define CYREG_B0_P0_U1_PLD_ORT1 0x400100b2u\r
-#define CYREG_B0_P0_U1_PLD_ORT2 0x400100b4u\r
-#define CYREG_B0_P0_U1_PLD_ORT3 0x400100b6u\r
-#define CYREG_B0_P0_U1_MC_CFG_CEN_CONST 0x400100b8u\r
-#define CYREG_B0_P0_U1_MC_CFG_XORFB 0x400100bau\r
-#define CYREG_B0_P0_U1_MC_CFG_SET_RESET 0x400100bcu\r
-#define CYREG_B0_P0_U1_MC_CFG_BYPASS 0x400100beu\r
-#define CYREG_B0_P0_U1_CFG0 0x400100c0u\r
-#define CYREG_B0_P0_U1_CFG1 0x400100c1u\r
-#define CYREG_B0_P0_U1_CFG2 0x400100c2u\r
-#define CYREG_B0_P0_U1_CFG3 0x400100c3u\r
-#define CYREG_B0_P0_U1_CFG4 0x400100c4u\r
-#define CYREG_B0_P0_U1_CFG5 0x400100c5u\r
-#define CYREG_B0_P0_U1_CFG6 0x400100c6u\r
-#define CYREG_B0_P0_U1_CFG7 0x400100c7u\r
-#define CYREG_B0_P0_U1_CFG8 0x400100c8u\r
-#define CYREG_B0_P0_U1_CFG9 0x400100c9u\r
-#define CYREG_B0_P0_U1_CFG10 0x400100cau\r
-#define CYREG_B0_P0_U1_CFG11 0x400100cbu\r
-#define CYREG_B0_P0_U1_CFG12 0x400100ccu\r
-#define CYREG_B0_P0_U1_CFG13 0x400100cdu\r
-#define CYREG_B0_P0_U1_CFG14 0x400100ceu\r
-#define CYREG_B0_P0_U1_CFG15 0x400100cfu\r
-#define CYREG_B0_P0_U1_CFG16 0x400100d0u\r
-#define CYREG_B0_P0_U1_CFG17 0x400100d1u\r
-#define CYREG_B0_P0_U1_CFG18 0x400100d2u\r
-#define CYREG_B0_P0_U1_CFG19 0x400100d3u\r
-#define CYREG_B0_P0_U1_CFG20 0x400100d4u\r
-#define CYREG_B0_P0_U1_CFG21 0x400100d5u\r
-#define CYREG_B0_P0_U1_CFG22 0x400100d6u\r
-#define CYREG_B0_P0_U1_CFG23 0x400100d7u\r
-#define CYREG_B0_P0_U1_CFG24 0x400100d8u\r
-#define CYREG_B0_P0_U1_CFG25 0x400100d9u\r
-#define CYREG_B0_P0_U1_CFG26 0x400100dau\r
-#define CYREG_B0_P0_U1_CFG27 0x400100dbu\r
-#define CYREG_B0_P0_U1_CFG28 0x400100dcu\r
-#define CYREG_B0_P0_U1_CFG29 0x400100ddu\r
-#define CYREG_B0_P0_U1_CFG30 0x400100deu\r
-#define CYREG_B0_P0_U1_CFG31 0x400100dfu\r
-#define CYREG_B0_P0_U1_DCFG0 0x400100e0u\r
-#define CYREG_B0_P0_U1_DCFG1 0x400100e2u\r
-#define CYREG_B0_P0_U1_DCFG2 0x400100e4u\r
-#define CYREG_B0_P0_U1_DCFG3 0x400100e6u\r
-#define CYREG_B0_P0_U1_DCFG4 0x400100e8u\r
-#define CYREG_B0_P0_U1_DCFG5 0x400100eau\r
-#define CYREG_B0_P0_U1_DCFG6 0x400100ecu\r
-#define CYREG_B0_P0_U1_DCFG7 0x400100eeu\r
-#define CYDEV_UCFG_B0_P0_ROUTE_BASE 0x40010100u\r
-#define CYDEV_UCFG_B0_P0_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P1_BASE 0x40010200u\r
-#define CYDEV_UCFG_B0_P1_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P1_U0_BASE 0x40010200u\r
-#define CYDEV_UCFG_B0_P1_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P1_U0_PLD_IT0 0x40010200u\r
-#define CYREG_B0_P1_U0_PLD_IT1 0x40010204u\r
-#define CYREG_B0_P1_U0_PLD_IT2 0x40010208u\r
-#define CYREG_B0_P1_U0_PLD_IT3 0x4001020cu\r
-#define CYREG_B0_P1_U0_PLD_IT4 0x40010210u\r
-#define CYREG_B0_P1_U0_PLD_IT5 0x40010214u\r
-#define CYREG_B0_P1_U0_PLD_IT6 0x40010218u\r
-#define CYREG_B0_P1_U0_PLD_IT7 0x4001021cu\r
-#define CYREG_B0_P1_U0_PLD_IT8 0x40010220u\r
-#define CYREG_B0_P1_U0_PLD_IT9 0x40010224u\r
-#define CYREG_B0_P1_U0_PLD_IT10 0x40010228u\r
-#define CYREG_B0_P1_U0_PLD_IT11 0x4001022cu\r
-#define CYREG_B0_P1_U0_PLD_ORT0 0x40010230u\r
-#define CYREG_B0_P1_U0_PLD_ORT1 0x40010232u\r
-#define CYREG_B0_P1_U0_PLD_ORT2 0x40010234u\r
-#define CYREG_B0_P1_U0_PLD_ORT3 0x40010236u\r
-#define CYREG_B0_P1_U0_MC_CFG_CEN_CONST 0x40010238u\r
-#define CYREG_B0_P1_U0_MC_CFG_XORFB 0x4001023au\r
-#define CYREG_B0_P1_U0_MC_CFG_SET_RESET 0x4001023cu\r
-#define CYREG_B0_P1_U0_MC_CFG_BYPASS 0x4001023eu\r
-#define CYREG_B0_P1_U0_CFG0 0x40010240u\r
-#define CYREG_B0_P1_U0_CFG1 0x40010241u\r
-#define CYREG_B0_P1_U0_CFG2 0x40010242u\r
-#define CYREG_B0_P1_U0_CFG3 0x40010243u\r
-#define CYREG_B0_P1_U0_CFG4 0x40010244u\r
-#define CYREG_B0_P1_U0_CFG5 0x40010245u\r
-#define CYREG_B0_P1_U0_CFG6 0x40010246u\r
-#define CYREG_B0_P1_U0_CFG7 0x40010247u\r
-#define CYREG_B0_P1_U0_CFG8 0x40010248u\r
-#define CYREG_B0_P1_U0_CFG9 0x40010249u\r
-#define CYREG_B0_P1_U0_CFG10 0x4001024au\r
-#define CYREG_B0_P1_U0_CFG11 0x4001024bu\r
-#define CYREG_B0_P1_U0_CFG12 0x4001024cu\r
-#define CYREG_B0_P1_U0_CFG13 0x4001024du\r
-#define CYREG_B0_P1_U0_CFG14 0x4001024eu\r
-#define CYREG_B0_P1_U0_CFG15 0x4001024fu\r
-#define CYREG_B0_P1_U0_CFG16 0x40010250u\r
-#define CYREG_B0_P1_U0_CFG17 0x40010251u\r
-#define CYREG_B0_P1_U0_CFG18 0x40010252u\r
-#define CYREG_B0_P1_U0_CFG19 0x40010253u\r
-#define CYREG_B0_P1_U0_CFG20 0x40010254u\r
-#define CYREG_B0_P1_U0_CFG21 0x40010255u\r
-#define CYREG_B0_P1_U0_CFG22 0x40010256u\r
-#define CYREG_B0_P1_U0_CFG23 0x40010257u\r
-#define CYREG_B0_P1_U0_CFG24 0x40010258u\r
-#define CYREG_B0_P1_U0_CFG25 0x40010259u\r
-#define CYREG_B0_P1_U0_CFG26 0x4001025au\r
-#define CYREG_B0_P1_U0_CFG27 0x4001025bu\r
-#define CYREG_B0_P1_U0_CFG28 0x4001025cu\r
-#define CYREG_B0_P1_U0_CFG29 0x4001025du\r
-#define CYREG_B0_P1_U0_CFG30 0x4001025eu\r
-#define CYREG_B0_P1_U0_CFG31 0x4001025fu\r
-#define CYREG_B0_P1_U0_DCFG0 0x40010260u\r
-#define CYREG_B0_P1_U0_DCFG1 0x40010262u\r
-#define CYREG_B0_P1_U0_DCFG2 0x40010264u\r
-#define CYREG_B0_P1_U0_DCFG3 0x40010266u\r
-#define CYREG_B0_P1_U0_DCFG4 0x40010268u\r
-#define CYREG_B0_P1_U0_DCFG5 0x4001026au\r
-#define CYREG_B0_P1_U0_DCFG6 0x4001026cu\r
-#define CYREG_B0_P1_U0_DCFG7 0x4001026eu\r
-#define CYDEV_UCFG_B0_P1_U1_BASE 0x40010280u\r
-#define CYDEV_UCFG_B0_P1_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P1_U1_PLD_IT0 0x40010280u\r
-#define CYREG_B0_P1_U1_PLD_IT1 0x40010284u\r
-#define CYREG_B0_P1_U1_PLD_IT2 0x40010288u\r
-#define CYREG_B0_P1_U1_PLD_IT3 0x4001028cu\r
-#define CYREG_B0_P1_U1_PLD_IT4 0x40010290u\r
-#define CYREG_B0_P1_U1_PLD_IT5 0x40010294u\r
-#define CYREG_B0_P1_U1_PLD_IT6 0x40010298u\r
-#define CYREG_B0_P1_U1_PLD_IT7 0x4001029cu\r
-#define CYREG_B0_P1_U1_PLD_IT8 0x400102a0u\r
-#define CYREG_B0_P1_U1_PLD_IT9 0x400102a4u\r
-#define CYREG_B0_P1_U1_PLD_IT10 0x400102a8u\r
-#define CYREG_B0_P1_U1_PLD_IT11 0x400102acu\r
-#define CYREG_B0_P1_U1_PLD_ORT0 0x400102b0u\r
-#define CYREG_B0_P1_U1_PLD_ORT1 0x400102b2u\r
-#define CYREG_B0_P1_U1_PLD_ORT2 0x400102b4u\r
-#define CYREG_B0_P1_U1_PLD_ORT3 0x400102b6u\r
-#define CYREG_B0_P1_U1_MC_CFG_CEN_CONST 0x400102b8u\r
-#define CYREG_B0_P1_U1_MC_CFG_XORFB 0x400102bau\r
-#define CYREG_B0_P1_U1_MC_CFG_SET_RESET 0x400102bcu\r
-#define CYREG_B0_P1_U1_MC_CFG_BYPASS 0x400102beu\r
-#define CYREG_B0_P1_U1_CFG0 0x400102c0u\r
-#define CYREG_B0_P1_U1_CFG1 0x400102c1u\r
-#define CYREG_B0_P1_U1_CFG2 0x400102c2u\r
-#define CYREG_B0_P1_U1_CFG3 0x400102c3u\r
-#define CYREG_B0_P1_U1_CFG4 0x400102c4u\r
-#define CYREG_B0_P1_U1_CFG5 0x400102c5u\r
-#define CYREG_B0_P1_U1_CFG6 0x400102c6u\r
-#define CYREG_B0_P1_U1_CFG7 0x400102c7u\r
-#define CYREG_B0_P1_U1_CFG8 0x400102c8u\r
-#define CYREG_B0_P1_U1_CFG9 0x400102c9u\r
-#define CYREG_B0_P1_U1_CFG10 0x400102cau\r
-#define CYREG_B0_P1_U1_CFG11 0x400102cbu\r
-#define CYREG_B0_P1_U1_CFG12 0x400102ccu\r
-#define CYREG_B0_P1_U1_CFG13 0x400102cdu\r
-#define CYREG_B0_P1_U1_CFG14 0x400102ceu\r
-#define CYREG_B0_P1_U1_CFG15 0x400102cfu\r
-#define CYREG_B0_P1_U1_CFG16 0x400102d0u\r
-#define CYREG_B0_P1_U1_CFG17 0x400102d1u\r
-#define CYREG_B0_P1_U1_CFG18 0x400102d2u\r
-#define CYREG_B0_P1_U1_CFG19 0x400102d3u\r
-#define CYREG_B0_P1_U1_CFG20 0x400102d4u\r
-#define CYREG_B0_P1_U1_CFG21 0x400102d5u\r
-#define CYREG_B0_P1_U1_CFG22 0x400102d6u\r
-#define CYREG_B0_P1_U1_CFG23 0x400102d7u\r
-#define CYREG_B0_P1_U1_CFG24 0x400102d8u\r
-#define CYREG_B0_P1_U1_CFG25 0x400102d9u\r
-#define CYREG_B0_P1_U1_CFG26 0x400102dau\r
-#define CYREG_B0_P1_U1_CFG27 0x400102dbu\r
-#define CYREG_B0_P1_U1_CFG28 0x400102dcu\r
-#define CYREG_B0_P1_U1_CFG29 0x400102ddu\r
-#define CYREG_B0_P1_U1_CFG30 0x400102deu\r
-#define CYREG_B0_P1_U1_CFG31 0x400102dfu\r
-#define CYREG_B0_P1_U1_DCFG0 0x400102e0u\r
-#define CYREG_B0_P1_U1_DCFG1 0x400102e2u\r
-#define CYREG_B0_P1_U1_DCFG2 0x400102e4u\r
-#define CYREG_B0_P1_U1_DCFG3 0x400102e6u\r
-#define CYREG_B0_P1_U1_DCFG4 0x400102e8u\r
-#define CYREG_B0_P1_U1_DCFG5 0x400102eau\r
-#define CYREG_B0_P1_U1_DCFG6 0x400102ecu\r
-#define CYREG_B0_P1_U1_DCFG7 0x400102eeu\r
-#define CYDEV_UCFG_B0_P1_ROUTE_BASE 0x40010300u\r
-#define CYDEV_UCFG_B0_P1_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P2_BASE 0x40010400u\r
-#define CYDEV_UCFG_B0_P2_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P2_U0_BASE 0x40010400u\r
-#define CYDEV_UCFG_B0_P2_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P2_U0_PLD_IT0 0x40010400u\r
-#define CYREG_B0_P2_U0_PLD_IT1 0x40010404u\r
-#define CYREG_B0_P2_U0_PLD_IT2 0x40010408u\r
-#define CYREG_B0_P2_U0_PLD_IT3 0x4001040cu\r
-#define CYREG_B0_P2_U0_PLD_IT4 0x40010410u\r
-#define CYREG_B0_P2_U0_PLD_IT5 0x40010414u\r
-#define CYREG_B0_P2_U0_PLD_IT6 0x40010418u\r
-#define CYREG_B0_P2_U0_PLD_IT7 0x4001041cu\r
-#define CYREG_B0_P2_U0_PLD_IT8 0x40010420u\r
-#define CYREG_B0_P2_U0_PLD_IT9 0x40010424u\r
-#define CYREG_B0_P2_U0_PLD_IT10 0x40010428u\r
-#define CYREG_B0_P2_U0_PLD_IT11 0x4001042cu\r
-#define CYREG_B0_P2_U0_PLD_ORT0 0x40010430u\r
-#define CYREG_B0_P2_U0_PLD_ORT1 0x40010432u\r
-#define CYREG_B0_P2_U0_PLD_ORT2 0x40010434u\r
-#define CYREG_B0_P2_U0_PLD_ORT3 0x40010436u\r
-#define CYREG_B0_P2_U0_MC_CFG_CEN_CONST 0x40010438u\r
-#define CYREG_B0_P2_U0_MC_CFG_XORFB 0x4001043au\r
-#define CYREG_B0_P2_U0_MC_CFG_SET_RESET 0x4001043cu\r
-#define CYREG_B0_P2_U0_MC_CFG_BYPASS 0x4001043eu\r
-#define CYREG_B0_P2_U0_CFG0 0x40010440u\r
-#define CYREG_B0_P2_U0_CFG1 0x40010441u\r
-#define CYREG_B0_P2_U0_CFG2 0x40010442u\r
-#define CYREG_B0_P2_U0_CFG3 0x40010443u\r
-#define CYREG_B0_P2_U0_CFG4 0x40010444u\r
-#define CYREG_B0_P2_U0_CFG5 0x40010445u\r
-#define CYREG_B0_P2_U0_CFG6 0x40010446u\r
-#define CYREG_B0_P2_U0_CFG7 0x40010447u\r
-#define CYREG_B0_P2_U0_CFG8 0x40010448u\r
-#define CYREG_B0_P2_U0_CFG9 0x40010449u\r
-#define CYREG_B0_P2_U0_CFG10 0x4001044au\r
-#define CYREG_B0_P2_U0_CFG11 0x4001044bu\r
-#define CYREG_B0_P2_U0_CFG12 0x4001044cu\r
-#define CYREG_B0_P2_U0_CFG13 0x4001044du\r
-#define CYREG_B0_P2_U0_CFG14 0x4001044eu\r
-#define CYREG_B0_P2_U0_CFG15 0x4001044fu\r
-#define CYREG_B0_P2_U0_CFG16 0x40010450u\r
-#define CYREG_B0_P2_U0_CFG17 0x40010451u\r
-#define CYREG_B0_P2_U0_CFG18 0x40010452u\r
-#define CYREG_B0_P2_U0_CFG19 0x40010453u\r
-#define CYREG_B0_P2_U0_CFG20 0x40010454u\r
-#define CYREG_B0_P2_U0_CFG21 0x40010455u\r
-#define CYREG_B0_P2_U0_CFG22 0x40010456u\r
-#define CYREG_B0_P2_U0_CFG23 0x40010457u\r
-#define CYREG_B0_P2_U0_CFG24 0x40010458u\r
-#define CYREG_B0_P2_U0_CFG25 0x40010459u\r
-#define CYREG_B0_P2_U0_CFG26 0x4001045au\r
-#define CYREG_B0_P2_U0_CFG27 0x4001045bu\r
-#define CYREG_B0_P2_U0_CFG28 0x4001045cu\r
-#define CYREG_B0_P2_U0_CFG29 0x4001045du\r
-#define CYREG_B0_P2_U0_CFG30 0x4001045eu\r
-#define CYREG_B0_P2_U0_CFG31 0x4001045fu\r
-#define CYREG_B0_P2_U0_DCFG0 0x40010460u\r
-#define CYREG_B0_P2_U0_DCFG1 0x40010462u\r
-#define CYREG_B0_P2_U0_DCFG2 0x40010464u\r
-#define CYREG_B0_P2_U0_DCFG3 0x40010466u\r
-#define CYREG_B0_P2_U0_DCFG4 0x40010468u\r
-#define CYREG_B0_P2_U0_DCFG5 0x4001046au\r
-#define CYREG_B0_P2_U0_DCFG6 0x4001046cu\r
-#define CYREG_B0_P2_U0_DCFG7 0x4001046eu\r
-#define CYDEV_UCFG_B0_P2_U1_BASE 0x40010480u\r
-#define CYDEV_UCFG_B0_P2_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P2_U1_PLD_IT0 0x40010480u\r
-#define CYREG_B0_P2_U1_PLD_IT1 0x40010484u\r
-#define CYREG_B0_P2_U1_PLD_IT2 0x40010488u\r
-#define CYREG_B0_P2_U1_PLD_IT3 0x4001048cu\r
-#define CYREG_B0_P2_U1_PLD_IT4 0x40010490u\r
-#define CYREG_B0_P2_U1_PLD_IT5 0x40010494u\r
-#define CYREG_B0_P2_U1_PLD_IT6 0x40010498u\r
-#define CYREG_B0_P2_U1_PLD_IT7 0x4001049cu\r
-#define CYREG_B0_P2_U1_PLD_IT8 0x400104a0u\r
-#define CYREG_B0_P2_U1_PLD_IT9 0x400104a4u\r
-#define CYREG_B0_P2_U1_PLD_IT10 0x400104a8u\r
-#define CYREG_B0_P2_U1_PLD_IT11 0x400104acu\r
-#define CYREG_B0_P2_U1_PLD_ORT0 0x400104b0u\r
-#define CYREG_B0_P2_U1_PLD_ORT1 0x400104b2u\r
-#define CYREG_B0_P2_U1_PLD_ORT2 0x400104b4u\r
-#define CYREG_B0_P2_U1_PLD_ORT3 0x400104b6u\r
-#define CYREG_B0_P2_U1_MC_CFG_CEN_CONST 0x400104b8u\r
-#define CYREG_B0_P2_U1_MC_CFG_XORFB 0x400104bau\r
-#define CYREG_B0_P2_U1_MC_CFG_SET_RESET 0x400104bcu\r
-#define CYREG_B0_P2_U1_MC_CFG_BYPASS 0x400104beu\r
-#define CYREG_B0_P2_U1_CFG0 0x400104c0u\r
-#define CYREG_B0_P2_U1_CFG1 0x400104c1u\r
-#define CYREG_B0_P2_U1_CFG2 0x400104c2u\r
-#define CYREG_B0_P2_U1_CFG3 0x400104c3u\r
-#define CYREG_B0_P2_U1_CFG4 0x400104c4u\r
-#define CYREG_B0_P2_U1_CFG5 0x400104c5u\r
-#define CYREG_B0_P2_U1_CFG6 0x400104c6u\r
-#define CYREG_B0_P2_U1_CFG7 0x400104c7u\r
-#define CYREG_B0_P2_U1_CFG8 0x400104c8u\r
-#define CYREG_B0_P2_U1_CFG9 0x400104c9u\r
-#define CYREG_B0_P2_U1_CFG10 0x400104cau\r
-#define CYREG_B0_P2_U1_CFG11 0x400104cbu\r
-#define CYREG_B0_P2_U1_CFG12 0x400104ccu\r
-#define CYREG_B0_P2_U1_CFG13 0x400104cdu\r
-#define CYREG_B0_P2_U1_CFG14 0x400104ceu\r
-#define CYREG_B0_P2_U1_CFG15 0x400104cfu\r
-#define CYREG_B0_P2_U1_CFG16 0x400104d0u\r
-#define CYREG_B0_P2_U1_CFG17 0x400104d1u\r
-#define CYREG_B0_P2_U1_CFG18 0x400104d2u\r
-#define CYREG_B0_P2_U1_CFG19 0x400104d3u\r
-#define CYREG_B0_P2_U1_CFG20 0x400104d4u\r
-#define CYREG_B0_P2_U1_CFG21 0x400104d5u\r
-#define CYREG_B0_P2_U1_CFG22 0x400104d6u\r
-#define CYREG_B0_P2_U1_CFG23 0x400104d7u\r
-#define CYREG_B0_P2_U1_CFG24 0x400104d8u\r
-#define CYREG_B0_P2_U1_CFG25 0x400104d9u\r
-#define CYREG_B0_P2_U1_CFG26 0x400104dau\r
-#define CYREG_B0_P2_U1_CFG27 0x400104dbu\r
-#define CYREG_B0_P2_U1_CFG28 0x400104dcu\r
-#define CYREG_B0_P2_U1_CFG29 0x400104ddu\r
-#define CYREG_B0_P2_U1_CFG30 0x400104deu\r
-#define CYREG_B0_P2_U1_CFG31 0x400104dfu\r
-#define CYREG_B0_P2_U1_DCFG0 0x400104e0u\r
-#define CYREG_B0_P2_U1_DCFG1 0x400104e2u\r
-#define CYREG_B0_P2_U1_DCFG2 0x400104e4u\r
-#define CYREG_B0_P2_U1_DCFG3 0x400104e6u\r
-#define CYREG_B0_P2_U1_DCFG4 0x400104e8u\r
-#define CYREG_B0_P2_U1_DCFG5 0x400104eau\r
-#define CYREG_B0_P2_U1_DCFG6 0x400104ecu\r
-#define CYREG_B0_P2_U1_DCFG7 0x400104eeu\r
-#define CYDEV_UCFG_B0_P2_ROUTE_BASE 0x40010500u\r
-#define CYDEV_UCFG_B0_P2_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P3_BASE 0x40010600u\r
-#define CYDEV_UCFG_B0_P3_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P3_U0_BASE 0x40010600u\r
-#define CYDEV_UCFG_B0_P3_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P3_U0_PLD_IT0 0x40010600u\r
-#define CYREG_B0_P3_U0_PLD_IT1 0x40010604u\r
-#define CYREG_B0_P3_U0_PLD_IT2 0x40010608u\r
-#define CYREG_B0_P3_U0_PLD_IT3 0x4001060cu\r
-#define CYREG_B0_P3_U0_PLD_IT4 0x40010610u\r
-#define CYREG_B0_P3_U0_PLD_IT5 0x40010614u\r
-#define CYREG_B0_P3_U0_PLD_IT6 0x40010618u\r
-#define CYREG_B0_P3_U0_PLD_IT7 0x4001061cu\r
-#define CYREG_B0_P3_U0_PLD_IT8 0x40010620u\r
-#define CYREG_B0_P3_U0_PLD_IT9 0x40010624u\r
-#define CYREG_B0_P3_U0_PLD_IT10 0x40010628u\r
-#define CYREG_B0_P3_U0_PLD_IT11 0x4001062cu\r
-#define CYREG_B0_P3_U0_PLD_ORT0 0x40010630u\r
-#define CYREG_B0_P3_U0_PLD_ORT1 0x40010632u\r
-#define CYREG_B0_P3_U0_PLD_ORT2 0x40010634u\r
-#define CYREG_B0_P3_U0_PLD_ORT3 0x40010636u\r
-#define CYREG_B0_P3_U0_MC_CFG_CEN_CONST 0x40010638u\r
-#define CYREG_B0_P3_U0_MC_CFG_XORFB 0x4001063au\r
-#define CYREG_B0_P3_U0_MC_CFG_SET_RESET 0x4001063cu\r
-#define CYREG_B0_P3_U0_MC_CFG_BYPASS 0x4001063eu\r
-#define CYREG_B0_P3_U0_CFG0 0x40010640u\r
-#define CYREG_B0_P3_U0_CFG1 0x40010641u\r
-#define CYREG_B0_P3_U0_CFG2 0x40010642u\r
-#define CYREG_B0_P3_U0_CFG3 0x40010643u\r
-#define CYREG_B0_P3_U0_CFG4 0x40010644u\r
-#define CYREG_B0_P3_U0_CFG5 0x40010645u\r
-#define CYREG_B0_P3_U0_CFG6 0x40010646u\r
-#define CYREG_B0_P3_U0_CFG7 0x40010647u\r
-#define CYREG_B0_P3_U0_CFG8 0x40010648u\r
-#define CYREG_B0_P3_U0_CFG9 0x40010649u\r
-#define CYREG_B0_P3_U0_CFG10 0x4001064au\r
-#define CYREG_B0_P3_U0_CFG11 0x4001064bu\r
-#define CYREG_B0_P3_U0_CFG12 0x4001064cu\r
-#define CYREG_B0_P3_U0_CFG13 0x4001064du\r
-#define CYREG_B0_P3_U0_CFG14 0x4001064eu\r
-#define CYREG_B0_P3_U0_CFG15 0x4001064fu\r
-#define CYREG_B0_P3_U0_CFG16 0x40010650u\r
-#define CYREG_B0_P3_U0_CFG17 0x40010651u\r
-#define CYREG_B0_P3_U0_CFG18 0x40010652u\r
-#define CYREG_B0_P3_U0_CFG19 0x40010653u\r
-#define CYREG_B0_P3_U0_CFG20 0x40010654u\r
-#define CYREG_B0_P3_U0_CFG21 0x40010655u\r
-#define CYREG_B0_P3_U0_CFG22 0x40010656u\r
-#define CYREG_B0_P3_U0_CFG23 0x40010657u\r
-#define CYREG_B0_P3_U0_CFG24 0x40010658u\r
-#define CYREG_B0_P3_U0_CFG25 0x40010659u\r
-#define CYREG_B0_P3_U0_CFG26 0x4001065au\r
-#define CYREG_B0_P3_U0_CFG27 0x4001065bu\r
-#define CYREG_B0_P3_U0_CFG28 0x4001065cu\r
-#define CYREG_B0_P3_U0_CFG29 0x4001065du\r
-#define CYREG_B0_P3_U0_CFG30 0x4001065eu\r
-#define CYREG_B0_P3_U0_CFG31 0x4001065fu\r
-#define CYREG_B0_P3_U0_DCFG0 0x40010660u\r
-#define CYREG_B0_P3_U0_DCFG1 0x40010662u\r
-#define CYREG_B0_P3_U0_DCFG2 0x40010664u\r
-#define CYREG_B0_P3_U0_DCFG3 0x40010666u\r
-#define CYREG_B0_P3_U0_DCFG4 0x40010668u\r
-#define CYREG_B0_P3_U0_DCFG5 0x4001066au\r
-#define CYREG_B0_P3_U0_DCFG6 0x4001066cu\r
-#define CYREG_B0_P3_U0_DCFG7 0x4001066eu\r
-#define CYDEV_UCFG_B0_P3_U1_BASE 0x40010680u\r
-#define CYDEV_UCFG_B0_P3_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P3_U1_PLD_IT0 0x40010680u\r
-#define CYREG_B0_P3_U1_PLD_IT1 0x40010684u\r
-#define CYREG_B0_P3_U1_PLD_IT2 0x40010688u\r
-#define CYREG_B0_P3_U1_PLD_IT3 0x4001068cu\r
-#define CYREG_B0_P3_U1_PLD_IT4 0x40010690u\r
-#define CYREG_B0_P3_U1_PLD_IT5 0x40010694u\r
-#define CYREG_B0_P3_U1_PLD_IT6 0x40010698u\r
-#define CYREG_B0_P3_U1_PLD_IT7 0x4001069cu\r
-#define CYREG_B0_P3_U1_PLD_IT8 0x400106a0u\r
-#define CYREG_B0_P3_U1_PLD_IT9 0x400106a4u\r
-#define CYREG_B0_P3_U1_PLD_IT10 0x400106a8u\r
-#define CYREG_B0_P3_U1_PLD_IT11 0x400106acu\r
-#define CYREG_B0_P3_U1_PLD_ORT0 0x400106b0u\r
-#define CYREG_B0_P3_U1_PLD_ORT1 0x400106b2u\r
-#define CYREG_B0_P3_U1_PLD_ORT2 0x400106b4u\r
-#define CYREG_B0_P3_U1_PLD_ORT3 0x400106b6u\r
-#define CYREG_B0_P3_U1_MC_CFG_CEN_CONST 0x400106b8u\r
-#define CYREG_B0_P3_U1_MC_CFG_XORFB 0x400106bau\r
-#define CYREG_B0_P3_U1_MC_CFG_SET_RESET 0x400106bcu\r
-#define CYREG_B0_P3_U1_MC_CFG_BYPASS 0x400106beu\r
-#define CYREG_B0_P3_U1_CFG0 0x400106c0u\r
-#define CYREG_B0_P3_U1_CFG1 0x400106c1u\r
-#define CYREG_B0_P3_U1_CFG2 0x400106c2u\r
-#define CYREG_B0_P3_U1_CFG3 0x400106c3u\r
-#define CYREG_B0_P3_U1_CFG4 0x400106c4u\r
-#define CYREG_B0_P3_U1_CFG5 0x400106c5u\r
-#define CYREG_B0_P3_U1_CFG6 0x400106c6u\r
-#define CYREG_B0_P3_U1_CFG7 0x400106c7u\r
-#define CYREG_B0_P3_U1_CFG8 0x400106c8u\r
-#define CYREG_B0_P3_U1_CFG9 0x400106c9u\r
-#define CYREG_B0_P3_U1_CFG10 0x400106cau\r
-#define CYREG_B0_P3_U1_CFG11 0x400106cbu\r
-#define CYREG_B0_P3_U1_CFG12 0x400106ccu\r
-#define CYREG_B0_P3_U1_CFG13 0x400106cdu\r
-#define CYREG_B0_P3_U1_CFG14 0x400106ceu\r
-#define CYREG_B0_P3_U1_CFG15 0x400106cfu\r
-#define CYREG_B0_P3_U1_CFG16 0x400106d0u\r
-#define CYREG_B0_P3_U1_CFG17 0x400106d1u\r
-#define CYREG_B0_P3_U1_CFG18 0x400106d2u\r
-#define CYREG_B0_P3_U1_CFG19 0x400106d3u\r
-#define CYREG_B0_P3_U1_CFG20 0x400106d4u\r
-#define CYREG_B0_P3_U1_CFG21 0x400106d5u\r
-#define CYREG_B0_P3_U1_CFG22 0x400106d6u\r
-#define CYREG_B0_P3_U1_CFG23 0x400106d7u\r
-#define CYREG_B0_P3_U1_CFG24 0x400106d8u\r
-#define CYREG_B0_P3_U1_CFG25 0x400106d9u\r
-#define CYREG_B0_P3_U1_CFG26 0x400106dau\r
-#define CYREG_B0_P3_U1_CFG27 0x400106dbu\r
-#define CYREG_B0_P3_U1_CFG28 0x400106dcu\r
-#define CYREG_B0_P3_U1_CFG29 0x400106ddu\r
-#define CYREG_B0_P3_U1_CFG30 0x400106deu\r
-#define CYREG_B0_P3_U1_CFG31 0x400106dfu\r
-#define CYREG_B0_P3_U1_DCFG0 0x400106e0u\r
-#define CYREG_B0_P3_U1_DCFG1 0x400106e2u\r
-#define CYREG_B0_P3_U1_DCFG2 0x400106e4u\r
-#define CYREG_B0_P3_U1_DCFG3 0x400106e6u\r
-#define CYREG_B0_P3_U1_DCFG4 0x400106e8u\r
-#define CYREG_B0_P3_U1_DCFG5 0x400106eau\r
-#define CYREG_B0_P3_U1_DCFG6 0x400106ecu\r
-#define CYREG_B0_P3_U1_DCFG7 0x400106eeu\r
-#define CYDEV_UCFG_B0_P3_ROUTE_BASE 0x40010700u\r
-#define CYDEV_UCFG_B0_P3_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P4_BASE 0x40010800u\r
-#define CYDEV_UCFG_B0_P4_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P4_U0_BASE 0x40010800u\r
-#define CYDEV_UCFG_B0_P4_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P4_U0_PLD_IT0 0x40010800u\r
-#define CYREG_B0_P4_U0_PLD_IT1 0x40010804u\r
-#define CYREG_B0_P4_U0_PLD_IT2 0x40010808u\r
-#define CYREG_B0_P4_U0_PLD_IT3 0x4001080cu\r
-#define CYREG_B0_P4_U0_PLD_IT4 0x40010810u\r
-#define CYREG_B0_P4_U0_PLD_IT5 0x40010814u\r
-#define CYREG_B0_P4_U0_PLD_IT6 0x40010818u\r
-#define CYREG_B0_P4_U0_PLD_IT7 0x4001081cu\r
-#define CYREG_B0_P4_U0_PLD_IT8 0x40010820u\r
-#define CYREG_B0_P4_U0_PLD_IT9 0x40010824u\r
-#define CYREG_B0_P4_U0_PLD_IT10 0x40010828u\r
-#define CYREG_B0_P4_U0_PLD_IT11 0x4001082cu\r
-#define CYREG_B0_P4_U0_PLD_ORT0 0x40010830u\r
-#define CYREG_B0_P4_U0_PLD_ORT1 0x40010832u\r
-#define CYREG_B0_P4_U0_PLD_ORT2 0x40010834u\r
-#define CYREG_B0_P4_U0_PLD_ORT3 0x40010836u\r
-#define CYREG_B0_P4_U0_MC_CFG_CEN_CONST 0x40010838u\r
-#define CYREG_B0_P4_U0_MC_CFG_XORFB 0x4001083au\r
-#define CYREG_B0_P4_U0_MC_CFG_SET_RESET 0x4001083cu\r
-#define CYREG_B0_P4_U0_MC_CFG_BYPASS 0x4001083eu\r
-#define CYREG_B0_P4_U0_CFG0 0x40010840u\r
-#define CYREG_B0_P4_U0_CFG1 0x40010841u\r
-#define CYREG_B0_P4_U0_CFG2 0x40010842u\r
-#define CYREG_B0_P4_U0_CFG3 0x40010843u\r
-#define CYREG_B0_P4_U0_CFG4 0x40010844u\r
-#define CYREG_B0_P4_U0_CFG5 0x40010845u\r
-#define CYREG_B0_P4_U0_CFG6 0x40010846u\r
-#define CYREG_B0_P4_U0_CFG7 0x40010847u\r
-#define CYREG_B0_P4_U0_CFG8 0x40010848u\r
-#define CYREG_B0_P4_U0_CFG9 0x40010849u\r
-#define CYREG_B0_P4_U0_CFG10 0x4001084au\r
-#define CYREG_B0_P4_U0_CFG11 0x4001084bu\r
-#define CYREG_B0_P4_U0_CFG12 0x4001084cu\r
-#define CYREG_B0_P4_U0_CFG13 0x4001084du\r
-#define CYREG_B0_P4_U0_CFG14 0x4001084eu\r
-#define CYREG_B0_P4_U0_CFG15 0x4001084fu\r
-#define CYREG_B0_P4_U0_CFG16 0x40010850u\r
-#define CYREG_B0_P4_U0_CFG17 0x40010851u\r
-#define CYREG_B0_P4_U0_CFG18 0x40010852u\r
-#define CYREG_B0_P4_U0_CFG19 0x40010853u\r
-#define CYREG_B0_P4_U0_CFG20 0x40010854u\r
-#define CYREG_B0_P4_U0_CFG21 0x40010855u\r
-#define CYREG_B0_P4_U0_CFG22 0x40010856u\r
-#define CYREG_B0_P4_U0_CFG23 0x40010857u\r
-#define CYREG_B0_P4_U0_CFG24 0x40010858u\r
-#define CYREG_B0_P4_U0_CFG25 0x40010859u\r
-#define CYREG_B0_P4_U0_CFG26 0x4001085au\r
-#define CYREG_B0_P4_U0_CFG27 0x4001085bu\r
-#define CYREG_B0_P4_U0_CFG28 0x4001085cu\r
-#define CYREG_B0_P4_U0_CFG29 0x4001085du\r
-#define CYREG_B0_P4_U0_CFG30 0x4001085eu\r
-#define CYREG_B0_P4_U0_CFG31 0x4001085fu\r
-#define CYREG_B0_P4_U0_DCFG0 0x40010860u\r
-#define CYREG_B0_P4_U0_DCFG1 0x40010862u\r
-#define CYREG_B0_P4_U0_DCFG2 0x40010864u\r
-#define CYREG_B0_P4_U0_DCFG3 0x40010866u\r
-#define CYREG_B0_P4_U0_DCFG4 0x40010868u\r
-#define CYREG_B0_P4_U0_DCFG5 0x4001086au\r
-#define CYREG_B0_P4_U0_DCFG6 0x4001086cu\r
-#define CYREG_B0_P4_U0_DCFG7 0x4001086eu\r
-#define CYDEV_UCFG_B0_P4_U1_BASE 0x40010880u\r
-#define CYDEV_UCFG_B0_P4_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P4_U1_PLD_IT0 0x40010880u\r
-#define CYREG_B0_P4_U1_PLD_IT1 0x40010884u\r
-#define CYREG_B0_P4_U1_PLD_IT2 0x40010888u\r
-#define CYREG_B0_P4_U1_PLD_IT3 0x4001088cu\r
-#define CYREG_B0_P4_U1_PLD_IT4 0x40010890u\r
-#define CYREG_B0_P4_U1_PLD_IT5 0x40010894u\r
-#define CYREG_B0_P4_U1_PLD_IT6 0x40010898u\r
-#define CYREG_B0_P4_U1_PLD_IT7 0x4001089cu\r
-#define CYREG_B0_P4_U1_PLD_IT8 0x400108a0u\r
-#define CYREG_B0_P4_U1_PLD_IT9 0x400108a4u\r
-#define CYREG_B0_P4_U1_PLD_IT10 0x400108a8u\r
-#define CYREG_B0_P4_U1_PLD_IT11 0x400108acu\r
-#define CYREG_B0_P4_U1_PLD_ORT0 0x400108b0u\r
-#define CYREG_B0_P4_U1_PLD_ORT1 0x400108b2u\r
-#define CYREG_B0_P4_U1_PLD_ORT2 0x400108b4u\r
-#define CYREG_B0_P4_U1_PLD_ORT3 0x400108b6u\r
-#define CYREG_B0_P4_U1_MC_CFG_CEN_CONST 0x400108b8u\r
-#define CYREG_B0_P4_U1_MC_CFG_XORFB 0x400108bau\r
-#define CYREG_B0_P4_U1_MC_CFG_SET_RESET 0x400108bcu\r
-#define CYREG_B0_P4_U1_MC_CFG_BYPASS 0x400108beu\r
-#define CYREG_B0_P4_U1_CFG0 0x400108c0u\r
-#define CYREG_B0_P4_U1_CFG1 0x400108c1u\r
-#define CYREG_B0_P4_U1_CFG2 0x400108c2u\r
-#define CYREG_B0_P4_U1_CFG3 0x400108c3u\r
-#define CYREG_B0_P4_U1_CFG4 0x400108c4u\r
-#define CYREG_B0_P4_U1_CFG5 0x400108c5u\r
-#define CYREG_B0_P4_U1_CFG6 0x400108c6u\r
-#define CYREG_B0_P4_U1_CFG7 0x400108c7u\r
-#define CYREG_B0_P4_U1_CFG8 0x400108c8u\r
-#define CYREG_B0_P4_U1_CFG9 0x400108c9u\r
-#define CYREG_B0_P4_U1_CFG10 0x400108cau\r
-#define CYREG_B0_P4_U1_CFG11 0x400108cbu\r
-#define CYREG_B0_P4_U1_CFG12 0x400108ccu\r
-#define CYREG_B0_P4_U1_CFG13 0x400108cdu\r
-#define CYREG_B0_P4_U1_CFG14 0x400108ceu\r
-#define CYREG_B0_P4_U1_CFG15 0x400108cfu\r
-#define CYREG_B0_P4_U1_CFG16 0x400108d0u\r
-#define CYREG_B0_P4_U1_CFG17 0x400108d1u\r
-#define CYREG_B0_P4_U1_CFG18 0x400108d2u\r
-#define CYREG_B0_P4_U1_CFG19 0x400108d3u\r
-#define CYREG_B0_P4_U1_CFG20 0x400108d4u\r
-#define CYREG_B0_P4_U1_CFG21 0x400108d5u\r
-#define CYREG_B0_P4_U1_CFG22 0x400108d6u\r
-#define CYREG_B0_P4_U1_CFG23 0x400108d7u\r
-#define CYREG_B0_P4_U1_CFG24 0x400108d8u\r
-#define CYREG_B0_P4_U1_CFG25 0x400108d9u\r
-#define CYREG_B0_P4_U1_CFG26 0x400108dau\r
-#define CYREG_B0_P4_U1_CFG27 0x400108dbu\r
-#define CYREG_B0_P4_U1_CFG28 0x400108dcu\r
-#define CYREG_B0_P4_U1_CFG29 0x400108ddu\r
-#define CYREG_B0_P4_U1_CFG30 0x400108deu\r
-#define CYREG_B0_P4_U1_CFG31 0x400108dfu\r
-#define CYREG_B0_P4_U1_DCFG0 0x400108e0u\r
-#define CYREG_B0_P4_U1_DCFG1 0x400108e2u\r
-#define CYREG_B0_P4_U1_DCFG2 0x400108e4u\r
-#define CYREG_B0_P4_U1_DCFG3 0x400108e6u\r
-#define CYREG_B0_P4_U1_DCFG4 0x400108e8u\r
-#define CYREG_B0_P4_U1_DCFG5 0x400108eau\r
-#define CYREG_B0_P4_U1_DCFG6 0x400108ecu\r
-#define CYREG_B0_P4_U1_DCFG7 0x400108eeu\r
-#define CYDEV_UCFG_B0_P4_ROUTE_BASE 0x40010900u\r
-#define CYDEV_UCFG_B0_P4_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P5_BASE 0x40010a00u\r
-#define CYDEV_UCFG_B0_P5_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P5_U0_BASE 0x40010a00u\r
-#define CYDEV_UCFG_B0_P5_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P5_U0_PLD_IT0 0x40010a00u\r
-#define CYREG_B0_P5_U0_PLD_IT1 0x40010a04u\r
-#define CYREG_B0_P5_U0_PLD_IT2 0x40010a08u\r
-#define CYREG_B0_P5_U0_PLD_IT3 0x40010a0cu\r
-#define CYREG_B0_P5_U0_PLD_IT4 0x40010a10u\r
-#define CYREG_B0_P5_U0_PLD_IT5 0x40010a14u\r
-#define CYREG_B0_P5_U0_PLD_IT6 0x40010a18u\r
-#define CYREG_B0_P5_U0_PLD_IT7 0x40010a1cu\r
-#define CYREG_B0_P5_U0_PLD_IT8 0x40010a20u\r
-#define CYREG_B0_P5_U0_PLD_IT9 0x40010a24u\r
-#define CYREG_B0_P5_U0_PLD_IT10 0x40010a28u\r
-#define CYREG_B0_P5_U0_PLD_IT11 0x40010a2cu\r
-#define CYREG_B0_P5_U0_PLD_ORT0 0x40010a30u\r
-#define CYREG_B0_P5_U0_PLD_ORT1 0x40010a32u\r
-#define CYREG_B0_P5_U0_PLD_ORT2 0x40010a34u\r
-#define CYREG_B0_P5_U0_PLD_ORT3 0x40010a36u\r
-#define CYREG_B0_P5_U0_MC_CFG_CEN_CONST 0x40010a38u\r
-#define CYREG_B0_P5_U0_MC_CFG_XORFB 0x40010a3au\r
-#define CYREG_B0_P5_U0_MC_CFG_SET_RESET 0x40010a3cu\r
-#define CYREG_B0_P5_U0_MC_CFG_BYPASS 0x40010a3eu\r
-#define CYREG_B0_P5_U0_CFG0 0x40010a40u\r
-#define CYREG_B0_P5_U0_CFG1 0x40010a41u\r
-#define CYREG_B0_P5_U0_CFG2 0x40010a42u\r
-#define CYREG_B0_P5_U0_CFG3 0x40010a43u\r
-#define CYREG_B0_P5_U0_CFG4 0x40010a44u\r
-#define CYREG_B0_P5_U0_CFG5 0x40010a45u\r
-#define CYREG_B0_P5_U0_CFG6 0x40010a46u\r
-#define CYREG_B0_P5_U0_CFG7 0x40010a47u\r
-#define CYREG_B0_P5_U0_CFG8 0x40010a48u\r
-#define CYREG_B0_P5_U0_CFG9 0x40010a49u\r
-#define CYREG_B0_P5_U0_CFG10 0x40010a4au\r
-#define CYREG_B0_P5_U0_CFG11 0x40010a4bu\r
-#define CYREG_B0_P5_U0_CFG12 0x40010a4cu\r
-#define CYREG_B0_P5_U0_CFG13 0x40010a4du\r
-#define CYREG_B0_P5_U0_CFG14 0x40010a4eu\r
-#define CYREG_B0_P5_U0_CFG15 0x40010a4fu\r
-#define CYREG_B0_P5_U0_CFG16 0x40010a50u\r
-#define CYREG_B0_P5_U0_CFG17 0x40010a51u\r
-#define CYREG_B0_P5_U0_CFG18 0x40010a52u\r
-#define CYREG_B0_P5_U0_CFG19 0x40010a53u\r
-#define CYREG_B0_P5_U0_CFG20 0x40010a54u\r
-#define CYREG_B0_P5_U0_CFG21 0x40010a55u\r
-#define CYREG_B0_P5_U0_CFG22 0x40010a56u\r
-#define CYREG_B0_P5_U0_CFG23 0x40010a57u\r
-#define CYREG_B0_P5_U0_CFG24 0x40010a58u\r
-#define CYREG_B0_P5_U0_CFG25 0x40010a59u\r
-#define CYREG_B0_P5_U0_CFG26 0x40010a5au\r
-#define CYREG_B0_P5_U0_CFG27 0x40010a5bu\r
-#define CYREG_B0_P5_U0_CFG28 0x40010a5cu\r
-#define CYREG_B0_P5_U0_CFG29 0x40010a5du\r
-#define CYREG_B0_P5_U0_CFG30 0x40010a5eu\r
-#define CYREG_B0_P5_U0_CFG31 0x40010a5fu\r
-#define CYREG_B0_P5_U0_DCFG0 0x40010a60u\r
-#define CYREG_B0_P5_U0_DCFG1 0x40010a62u\r
-#define CYREG_B0_P5_U0_DCFG2 0x40010a64u\r
-#define CYREG_B0_P5_U0_DCFG3 0x40010a66u\r
-#define CYREG_B0_P5_U0_DCFG4 0x40010a68u\r
-#define CYREG_B0_P5_U0_DCFG5 0x40010a6au\r
-#define CYREG_B0_P5_U0_DCFG6 0x40010a6cu\r
-#define CYREG_B0_P5_U0_DCFG7 0x40010a6eu\r
-#define CYDEV_UCFG_B0_P5_U1_BASE 0x40010a80u\r
-#define CYDEV_UCFG_B0_P5_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P5_U1_PLD_IT0 0x40010a80u\r
-#define CYREG_B0_P5_U1_PLD_IT1 0x40010a84u\r
-#define CYREG_B0_P5_U1_PLD_IT2 0x40010a88u\r
-#define CYREG_B0_P5_U1_PLD_IT3 0x40010a8cu\r
-#define CYREG_B0_P5_U1_PLD_IT4 0x40010a90u\r
-#define CYREG_B0_P5_U1_PLD_IT5 0x40010a94u\r
-#define CYREG_B0_P5_U1_PLD_IT6 0x40010a98u\r
-#define CYREG_B0_P5_U1_PLD_IT7 0x40010a9cu\r
-#define CYREG_B0_P5_U1_PLD_IT8 0x40010aa0u\r
-#define CYREG_B0_P5_U1_PLD_IT9 0x40010aa4u\r
-#define CYREG_B0_P5_U1_PLD_IT10 0x40010aa8u\r
-#define CYREG_B0_P5_U1_PLD_IT11 0x40010aacu\r
-#define CYREG_B0_P5_U1_PLD_ORT0 0x40010ab0u\r
-#define CYREG_B0_P5_U1_PLD_ORT1 0x40010ab2u\r
-#define CYREG_B0_P5_U1_PLD_ORT2 0x40010ab4u\r
-#define CYREG_B0_P5_U1_PLD_ORT3 0x40010ab6u\r
-#define CYREG_B0_P5_U1_MC_CFG_CEN_CONST 0x40010ab8u\r
-#define CYREG_B0_P5_U1_MC_CFG_XORFB 0x40010abau\r
-#define CYREG_B0_P5_U1_MC_CFG_SET_RESET 0x40010abcu\r
-#define CYREG_B0_P5_U1_MC_CFG_BYPASS 0x40010abeu\r
-#define CYREG_B0_P5_U1_CFG0 0x40010ac0u\r
-#define CYREG_B0_P5_U1_CFG1 0x40010ac1u\r
-#define CYREG_B0_P5_U1_CFG2 0x40010ac2u\r
-#define CYREG_B0_P5_U1_CFG3 0x40010ac3u\r
-#define CYREG_B0_P5_U1_CFG4 0x40010ac4u\r
-#define CYREG_B0_P5_U1_CFG5 0x40010ac5u\r
-#define CYREG_B0_P5_U1_CFG6 0x40010ac6u\r
-#define CYREG_B0_P5_U1_CFG7 0x40010ac7u\r
-#define CYREG_B0_P5_U1_CFG8 0x40010ac8u\r
-#define CYREG_B0_P5_U1_CFG9 0x40010ac9u\r
-#define CYREG_B0_P5_U1_CFG10 0x40010acau\r
-#define CYREG_B0_P5_U1_CFG11 0x40010acbu\r
-#define CYREG_B0_P5_U1_CFG12 0x40010accu\r
-#define CYREG_B0_P5_U1_CFG13 0x40010acdu\r
-#define CYREG_B0_P5_U1_CFG14 0x40010aceu\r
-#define CYREG_B0_P5_U1_CFG15 0x40010acfu\r
-#define CYREG_B0_P5_U1_CFG16 0x40010ad0u\r
-#define CYREG_B0_P5_U1_CFG17 0x40010ad1u\r
-#define CYREG_B0_P5_U1_CFG18 0x40010ad2u\r
-#define CYREG_B0_P5_U1_CFG19 0x40010ad3u\r
-#define CYREG_B0_P5_U1_CFG20 0x40010ad4u\r
-#define CYREG_B0_P5_U1_CFG21 0x40010ad5u\r
-#define CYREG_B0_P5_U1_CFG22 0x40010ad6u\r
-#define CYREG_B0_P5_U1_CFG23 0x40010ad7u\r
-#define CYREG_B0_P5_U1_CFG24 0x40010ad8u\r
-#define CYREG_B0_P5_U1_CFG25 0x40010ad9u\r
-#define CYREG_B0_P5_U1_CFG26 0x40010adau\r
-#define CYREG_B0_P5_U1_CFG27 0x40010adbu\r
-#define CYREG_B0_P5_U1_CFG28 0x40010adcu\r
-#define CYREG_B0_P5_U1_CFG29 0x40010addu\r
-#define CYREG_B0_P5_U1_CFG30 0x40010adeu\r
-#define CYREG_B0_P5_U1_CFG31 0x40010adfu\r
-#define CYREG_B0_P5_U1_DCFG0 0x40010ae0u\r
-#define CYREG_B0_P5_U1_DCFG1 0x40010ae2u\r
-#define CYREG_B0_P5_U1_DCFG2 0x40010ae4u\r
-#define CYREG_B0_P5_U1_DCFG3 0x40010ae6u\r
-#define CYREG_B0_P5_U1_DCFG4 0x40010ae8u\r
-#define CYREG_B0_P5_U1_DCFG5 0x40010aeau\r
-#define CYREG_B0_P5_U1_DCFG6 0x40010aecu\r
-#define CYREG_B0_P5_U1_DCFG7 0x40010aeeu\r
-#define CYDEV_UCFG_B0_P5_ROUTE_BASE 0x40010b00u\r
-#define CYDEV_UCFG_B0_P5_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P6_BASE 0x40010c00u\r
-#define CYDEV_UCFG_B0_P6_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P6_U0_BASE 0x40010c00u\r
-#define CYDEV_UCFG_B0_P6_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P6_U0_PLD_IT0 0x40010c00u\r
-#define CYREG_B0_P6_U0_PLD_IT1 0x40010c04u\r
-#define CYREG_B0_P6_U0_PLD_IT2 0x40010c08u\r
-#define CYREG_B0_P6_U0_PLD_IT3 0x40010c0cu\r
-#define CYREG_B0_P6_U0_PLD_IT4 0x40010c10u\r
-#define CYREG_B0_P6_U0_PLD_IT5 0x40010c14u\r
-#define CYREG_B0_P6_U0_PLD_IT6 0x40010c18u\r
-#define CYREG_B0_P6_U0_PLD_IT7 0x40010c1cu\r
-#define CYREG_B0_P6_U0_PLD_IT8 0x40010c20u\r
-#define CYREG_B0_P6_U0_PLD_IT9 0x40010c24u\r
-#define CYREG_B0_P6_U0_PLD_IT10 0x40010c28u\r
-#define CYREG_B0_P6_U0_PLD_IT11 0x40010c2cu\r
-#define CYREG_B0_P6_U0_PLD_ORT0 0x40010c30u\r
-#define CYREG_B0_P6_U0_PLD_ORT1 0x40010c32u\r
-#define CYREG_B0_P6_U0_PLD_ORT2 0x40010c34u\r
-#define CYREG_B0_P6_U0_PLD_ORT3 0x40010c36u\r
-#define CYREG_B0_P6_U0_MC_CFG_CEN_CONST 0x40010c38u\r
-#define CYREG_B0_P6_U0_MC_CFG_XORFB 0x40010c3au\r
-#define CYREG_B0_P6_U0_MC_CFG_SET_RESET 0x40010c3cu\r
-#define CYREG_B0_P6_U0_MC_CFG_BYPASS 0x40010c3eu\r
-#define CYREG_B0_P6_U0_CFG0 0x40010c40u\r
-#define CYREG_B0_P6_U0_CFG1 0x40010c41u\r
-#define CYREG_B0_P6_U0_CFG2 0x40010c42u\r
-#define CYREG_B0_P6_U0_CFG3 0x40010c43u\r
-#define CYREG_B0_P6_U0_CFG4 0x40010c44u\r
-#define CYREG_B0_P6_U0_CFG5 0x40010c45u\r
-#define CYREG_B0_P6_U0_CFG6 0x40010c46u\r
-#define CYREG_B0_P6_U0_CFG7 0x40010c47u\r
-#define CYREG_B0_P6_U0_CFG8 0x40010c48u\r
-#define CYREG_B0_P6_U0_CFG9 0x40010c49u\r
-#define CYREG_B0_P6_U0_CFG10 0x40010c4au\r
-#define CYREG_B0_P6_U0_CFG11 0x40010c4bu\r
-#define CYREG_B0_P6_U0_CFG12 0x40010c4cu\r
-#define CYREG_B0_P6_U0_CFG13 0x40010c4du\r
-#define CYREG_B0_P6_U0_CFG14 0x40010c4eu\r
-#define CYREG_B0_P6_U0_CFG15 0x40010c4fu\r
-#define CYREG_B0_P6_U0_CFG16 0x40010c50u\r
-#define CYREG_B0_P6_U0_CFG17 0x40010c51u\r
-#define CYREG_B0_P6_U0_CFG18 0x40010c52u\r
-#define CYREG_B0_P6_U0_CFG19 0x40010c53u\r
-#define CYREG_B0_P6_U0_CFG20 0x40010c54u\r
-#define CYREG_B0_P6_U0_CFG21 0x40010c55u\r
-#define CYREG_B0_P6_U0_CFG22 0x40010c56u\r
-#define CYREG_B0_P6_U0_CFG23 0x40010c57u\r
-#define CYREG_B0_P6_U0_CFG24 0x40010c58u\r
-#define CYREG_B0_P6_U0_CFG25 0x40010c59u\r
-#define CYREG_B0_P6_U0_CFG26 0x40010c5au\r
-#define CYREG_B0_P6_U0_CFG27 0x40010c5bu\r
-#define CYREG_B0_P6_U0_CFG28 0x40010c5cu\r
-#define CYREG_B0_P6_U0_CFG29 0x40010c5du\r
-#define CYREG_B0_P6_U0_CFG30 0x40010c5eu\r
-#define CYREG_B0_P6_U0_CFG31 0x40010c5fu\r
-#define CYREG_B0_P6_U0_DCFG0 0x40010c60u\r
-#define CYREG_B0_P6_U0_DCFG1 0x40010c62u\r
-#define CYREG_B0_P6_U0_DCFG2 0x40010c64u\r
-#define CYREG_B0_P6_U0_DCFG3 0x40010c66u\r
-#define CYREG_B0_P6_U0_DCFG4 0x40010c68u\r
-#define CYREG_B0_P6_U0_DCFG5 0x40010c6au\r
-#define CYREG_B0_P6_U0_DCFG6 0x40010c6cu\r
-#define CYREG_B0_P6_U0_DCFG7 0x40010c6eu\r
-#define CYDEV_UCFG_B0_P6_U1_BASE 0x40010c80u\r
-#define CYDEV_UCFG_B0_P6_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P6_U1_PLD_IT0 0x40010c80u\r
-#define CYREG_B0_P6_U1_PLD_IT1 0x40010c84u\r
-#define CYREG_B0_P6_U1_PLD_IT2 0x40010c88u\r
-#define CYREG_B0_P6_U1_PLD_IT3 0x40010c8cu\r
-#define CYREG_B0_P6_U1_PLD_IT4 0x40010c90u\r
-#define CYREG_B0_P6_U1_PLD_IT5 0x40010c94u\r
-#define CYREG_B0_P6_U1_PLD_IT6 0x40010c98u\r
-#define CYREG_B0_P6_U1_PLD_IT7 0x40010c9cu\r
-#define CYREG_B0_P6_U1_PLD_IT8 0x40010ca0u\r
-#define CYREG_B0_P6_U1_PLD_IT9 0x40010ca4u\r
-#define CYREG_B0_P6_U1_PLD_IT10 0x40010ca8u\r
-#define CYREG_B0_P6_U1_PLD_IT11 0x40010cacu\r
-#define CYREG_B0_P6_U1_PLD_ORT0 0x40010cb0u\r
-#define CYREG_B0_P6_U1_PLD_ORT1 0x40010cb2u\r
-#define CYREG_B0_P6_U1_PLD_ORT2 0x40010cb4u\r
-#define CYREG_B0_P6_U1_PLD_ORT3 0x40010cb6u\r
-#define CYREG_B0_P6_U1_MC_CFG_CEN_CONST 0x40010cb8u\r
-#define CYREG_B0_P6_U1_MC_CFG_XORFB 0x40010cbau\r
-#define CYREG_B0_P6_U1_MC_CFG_SET_RESET 0x40010cbcu\r
-#define CYREG_B0_P6_U1_MC_CFG_BYPASS 0x40010cbeu\r
-#define CYREG_B0_P6_U1_CFG0 0x40010cc0u\r
-#define CYREG_B0_P6_U1_CFG1 0x40010cc1u\r
-#define CYREG_B0_P6_U1_CFG2 0x40010cc2u\r
-#define CYREG_B0_P6_U1_CFG3 0x40010cc3u\r
-#define CYREG_B0_P6_U1_CFG4 0x40010cc4u\r
-#define CYREG_B0_P6_U1_CFG5 0x40010cc5u\r
-#define CYREG_B0_P6_U1_CFG6 0x40010cc6u\r
-#define CYREG_B0_P6_U1_CFG7 0x40010cc7u\r
-#define CYREG_B0_P6_U1_CFG8 0x40010cc8u\r
-#define CYREG_B0_P6_U1_CFG9 0x40010cc9u\r
-#define CYREG_B0_P6_U1_CFG10 0x40010ccau\r
-#define CYREG_B0_P6_U1_CFG11 0x40010ccbu\r
-#define CYREG_B0_P6_U1_CFG12 0x40010cccu\r
-#define CYREG_B0_P6_U1_CFG13 0x40010ccdu\r
-#define CYREG_B0_P6_U1_CFG14 0x40010cceu\r
-#define CYREG_B0_P6_U1_CFG15 0x40010ccfu\r
-#define CYREG_B0_P6_U1_CFG16 0x40010cd0u\r
-#define CYREG_B0_P6_U1_CFG17 0x40010cd1u\r
-#define CYREG_B0_P6_U1_CFG18 0x40010cd2u\r
-#define CYREG_B0_P6_U1_CFG19 0x40010cd3u\r
-#define CYREG_B0_P6_U1_CFG20 0x40010cd4u\r
-#define CYREG_B0_P6_U1_CFG21 0x40010cd5u\r
-#define CYREG_B0_P6_U1_CFG22 0x40010cd6u\r
-#define CYREG_B0_P6_U1_CFG23 0x40010cd7u\r
-#define CYREG_B0_P6_U1_CFG24 0x40010cd8u\r
-#define CYREG_B0_P6_U1_CFG25 0x40010cd9u\r
-#define CYREG_B0_P6_U1_CFG26 0x40010cdau\r
-#define CYREG_B0_P6_U1_CFG27 0x40010cdbu\r
-#define CYREG_B0_P6_U1_CFG28 0x40010cdcu\r
-#define CYREG_B0_P6_U1_CFG29 0x40010cddu\r
-#define CYREG_B0_P6_U1_CFG30 0x40010cdeu\r
-#define CYREG_B0_P6_U1_CFG31 0x40010cdfu\r
-#define CYREG_B0_P6_U1_DCFG0 0x40010ce0u\r
-#define CYREG_B0_P6_U1_DCFG1 0x40010ce2u\r
-#define CYREG_B0_P6_U1_DCFG2 0x40010ce4u\r
-#define CYREG_B0_P6_U1_DCFG3 0x40010ce6u\r
-#define CYREG_B0_P6_U1_DCFG4 0x40010ce8u\r
-#define CYREG_B0_P6_U1_DCFG5 0x40010ceau\r
-#define CYREG_B0_P6_U1_DCFG6 0x40010cecu\r
-#define CYREG_B0_P6_U1_DCFG7 0x40010ceeu\r
-#define CYDEV_UCFG_B0_P6_ROUTE_BASE 0x40010d00u\r
-#define CYDEV_UCFG_B0_P6_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B0_P7_BASE 0x40010e00u\r
-#define CYDEV_UCFG_B0_P7_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B0_P7_U0_BASE 0x40010e00u\r
-#define CYDEV_UCFG_B0_P7_U0_SIZE 0x00000070u\r
-#define CYREG_B0_P7_U0_PLD_IT0 0x40010e00u\r
-#define CYREG_B0_P7_U0_PLD_IT1 0x40010e04u\r
-#define CYREG_B0_P7_U0_PLD_IT2 0x40010e08u\r
-#define CYREG_B0_P7_U0_PLD_IT3 0x40010e0cu\r
-#define CYREG_B0_P7_U0_PLD_IT4 0x40010e10u\r
-#define CYREG_B0_P7_U0_PLD_IT5 0x40010e14u\r
-#define CYREG_B0_P7_U0_PLD_IT6 0x40010e18u\r
-#define CYREG_B0_P7_U0_PLD_IT7 0x40010e1cu\r
-#define CYREG_B0_P7_U0_PLD_IT8 0x40010e20u\r
-#define CYREG_B0_P7_U0_PLD_IT9 0x40010e24u\r
-#define CYREG_B0_P7_U0_PLD_IT10 0x40010e28u\r
-#define CYREG_B0_P7_U0_PLD_IT11 0x40010e2cu\r
-#define CYREG_B0_P7_U0_PLD_ORT0 0x40010e30u\r
-#define CYREG_B0_P7_U0_PLD_ORT1 0x40010e32u\r
-#define CYREG_B0_P7_U0_PLD_ORT2 0x40010e34u\r
-#define CYREG_B0_P7_U0_PLD_ORT3 0x40010e36u\r
-#define CYREG_B0_P7_U0_MC_CFG_CEN_CONST 0x40010e38u\r
-#define CYREG_B0_P7_U0_MC_CFG_XORFB 0x40010e3au\r
-#define CYREG_B0_P7_U0_MC_CFG_SET_RESET 0x40010e3cu\r
-#define CYREG_B0_P7_U0_MC_CFG_BYPASS 0x40010e3eu\r
-#define CYREG_B0_P7_U0_CFG0 0x40010e40u\r
-#define CYREG_B0_P7_U0_CFG1 0x40010e41u\r
-#define CYREG_B0_P7_U0_CFG2 0x40010e42u\r
-#define CYREG_B0_P7_U0_CFG3 0x40010e43u\r
-#define CYREG_B0_P7_U0_CFG4 0x40010e44u\r
-#define CYREG_B0_P7_U0_CFG5 0x40010e45u\r
-#define CYREG_B0_P7_U0_CFG6 0x40010e46u\r
-#define CYREG_B0_P7_U0_CFG7 0x40010e47u\r
-#define CYREG_B0_P7_U0_CFG8 0x40010e48u\r
-#define CYREG_B0_P7_U0_CFG9 0x40010e49u\r
-#define CYREG_B0_P7_U0_CFG10 0x40010e4au\r
-#define CYREG_B0_P7_U0_CFG11 0x40010e4bu\r
-#define CYREG_B0_P7_U0_CFG12 0x40010e4cu\r
-#define CYREG_B0_P7_U0_CFG13 0x40010e4du\r
-#define CYREG_B0_P7_U0_CFG14 0x40010e4eu\r
-#define CYREG_B0_P7_U0_CFG15 0x40010e4fu\r
-#define CYREG_B0_P7_U0_CFG16 0x40010e50u\r
-#define CYREG_B0_P7_U0_CFG17 0x40010e51u\r
-#define CYREG_B0_P7_U0_CFG18 0x40010e52u\r
-#define CYREG_B0_P7_U0_CFG19 0x40010e53u\r
-#define CYREG_B0_P7_U0_CFG20 0x40010e54u\r
-#define CYREG_B0_P7_U0_CFG21 0x40010e55u\r
-#define CYREG_B0_P7_U0_CFG22 0x40010e56u\r
-#define CYREG_B0_P7_U0_CFG23 0x40010e57u\r
-#define CYREG_B0_P7_U0_CFG24 0x40010e58u\r
-#define CYREG_B0_P7_U0_CFG25 0x40010e59u\r
-#define CYREG_B0_P7_U0_CFG26 0x40010e5au\r
-#define CYREG_B0_P7_U0_CFG27 0x40010e5bu\r
-#define CYREG_B0_P7_U0_CFG28 0x40010e5cu\r
-#define CYREG_B0_P7_U0_CFG29 0x40010e5du\r
-#define CYREG_B0_P7_U0_CFG30 0x40010e5eu\r
-#define CYREG_B0_P7_U0_CFG31 0x40010e5fu\r
-#define CYREG_B0_P7_U0_DCFG0 0x40010e60u\r
-#define CYREG_B0_P7_U0_DCFG1 0x40010e62u\r
-#define CYREG_B0_P7_U0_DCFG2 0x40010e64u\r
-#define CYREG_B0_P7_U0_DCFG3 0x40010e66u\r
-#define CYREG_B0_P7_U0_DCFG4 0x40010e68u\r
-#define CYREG_B0_P7_U0_DCFG5 0x40010e6au\r
-#define CYREG_B0_P7_U0_DCFG6 0x40010e6cu\r
-#define CYREG_B0_P7_U0_DCFG7 0x40010e6eu\r
-#define CYDEV_UCFG_B0_P7_U1_BASE 0x40010e80u\r
-#define CYDEV_UCFG_B0_P7_U1_SIZE 0x00000070u\r
-#define CYREG_B0_P7_U1_PLD_IT0 0x40010e80u\r
-#define CYREG_B0_P7_U1_PLD_IT1 0x40010e84u\r
-#define CYREG_B0_P7_U1_PLD_IT2 0x40010e88u\r
-#define CYREG_B0_P7_U1_PLD_IT3 0x40010e8cu\r
-#define CYREG_B0_P7_U1_PLD_IT4 0x40010e90u\r
-#define CYREG_B0_P7_U1_PLD_IT5 0x40010e94u\r
-#define CYREG_B0_P7_U1_PLD_IT6 0x40010e98u\r
-#define CYREG_B0_P7_U1_PLD_IT7 0x40010e9cu\r
-#define CYREG_B0_P7_U1_PLD_IT8 0x40010ea0u\r
-#define CYREG_B0_P7_U1_PLD_IT9 0x40010ea4u\r
-#define CYREG_B0_P7_U1_PLD_IT10 0x40010ea8u\r
-#define CYREG_B0_P7_U1_PLD_IT11 0x40010eacu\r
-#define CYREG_B0_P7_U1_PLD_ORT0 0x40010eb0u\r
-#define CYREG_B0_P7_U1_PLD_ORT1 0x40010eb2u\r
-#define CYREG_B0_P7_U1_PLD_ORT2 0x40010eb4u\r
-#define CYREG_B0_P7_U1_PLD_ORT3 0x40010eb6u\r
-#define CYREG_B0_P7_U1_MC_CFG_CEN_CONST 0x40010eb8u\r
-#define CYREG_B0_P7_U1_MC_CFG_XORFB 0x40010ebau\r
-#define CYREG_B0_P7_U1_MC_CFG_SET_RESET 0x40010ebcu\r
-#define CYREG_B0_P7_U1_MC_CFG_BYPASS 0x40010ebeu\r
-#define CYREG_B0_P7_U1_CFG0 0x40010ec0u\r
-#define CYREG_B0_P7_U1_CFG1 0x40010ec1u\r
-#define CYREG_B0_P7_U1_CFG2 0x40010ec2u\r
-#define CYREG_B0_P7_U1_CFG3 0x40010ec3u\r
-#define CYREG_B0_P7_U1_CFG4 0x40010ec4u\r
-#define CYREG_B0_P7_U1_CFG5 0x40010ec5u\r
-#define CYREG_B0_P7_U1_CFG6 0x40010ec6u\r
-#define CYREG_B0_P7_U1_CFG7 0x40010ec7u\r
-#define CYREG_B0_P7_U1_CFG8 0x40010ec8u\r
-#define CYREG_B0_P7_U1_CFG9 0x40010ec9u\r
-#define CYREG_B0_P7_U1_CFG10 0x40010ecau\r
-#define CYREG_B0_P7_U1_CFG11 0x40010ecbu\r
-#define CYREG_B0_P7_U1_CFG12 0x40010eccu\r
-#define CYREG_B0_P7_U1_CFG13 0x40010ecdu\r
-#define CYREG_B0_P7_U1_CFG14 0x40010eceu\r
-#define CYREG_B0_P7_U1_CFG15 0x40010ecfu\r
-#define CYREG_B0_P7_U1_CFG16 0x40010ed0u\r
-#define CYREG_B0_P7_U1_CFG17 0x40010ed1u\r
-#define CYREG_B0_P7_U1_CFG18 0x40010ed2u\r
-#define CYREG_B0_P7_U1_CFG19 0x40010ed3u\r
-#define CYREG_B0_P7_U1_CFG20 0x40010ed4u\r
-#define CYREG_B0_P7_U1_CFG21 0x40010ed5u\r
-#define CYREG_B0_P7_U1_CFG22 0x40010ed6u\r
-#define CYREG_B0_P7_U1_CFG23 0x40010ed7u\r
-#define CYREG_B0_P7_U1_CFG24 0x40010ed8u\r
-#define CYREG_B0_P7_U1_CFG25 0x40010ed9u\r
-#define CYREG_B0_P7_U1_CFG26 0x40010edau\r
-#define CYREG_B0_P7_U1_CFG27 0x40010edbu\r
-#define CYREG_B0_P7_U1_CFG28 0x40010edcu\r
-#define CYREG_B0_P7_U1_CFG29 0x40010eddu\r
-#define CYREG_B0_P7_U1_CFG30 0x40010edeu\r
-#define CYREG_B0_P7_U1_CFG31 0x40010edfu\r
-#define CYREG_B0_P7_U1_DCFG0 0x40010ee0u\r
-#define CYREG_B0_P7_U1_DCFG1 0x40010ee2u\r
-#define CYREG_B0_P7_U1_DCFG2 0x40010ee4u\r
-#define CYREG_B0_P7_U1_DCFG3 0x40010ee6u\r
-#define CYREG_B0_P7_U1_DCFG4 0x40010ee8u\r
-#define CYREG_B0_P7_U1_DCFG5 0x40010eeau\r
-#define CYREG_B0_P7_U1_DCFG6 0x40010eecu\r
-#define CYREG_B0_P7_U1_DCFG7 0x40010eeeu\r
-#define CYDEV_UCFG_B0_P7_ROUTE_BASE 0x40010f00u\r
-#define CYDEV_UCFG_B0_P7_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_BASE 0x40011000u\r
-#define CYDEV_UCFG_B1_SIZE 0x00000fefu\r
-#define CYDEV_UCFG_B1_P2_BASE 0x40011400u\r
-#define CYDEV_UCFG_B1_P2_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P2_U0_BASE 0x40011400u\r
-#define CYDEV_UCFG_B1_P2_U0_SIZE 0x00000070u\r
-#define CYREG_B1_P2_U0_PLD_IT0 0x40011400u\r
-#define CYREG_B1_P2_U0_PLD_IT1 0x40011404u\r
-#define CYREG_B1_P2_U0_PLD_IT2 0x40011408u\r
-#define CYREG_B1_P2_U0_PLD_IT3 0x4001140cu\r
-#define CYREG_B1_P2_U0_PLD_IT4 0x40011410u\r
-#define CYREG_B1_P2_U0_PLD_IT5 0x40011414u\r
-#define CYREG_B1_P2_U0_PLD_IT6 0x40011418u\r
-#define CYREG_B1_P2_U0_PLD_IT7 0x4001141cu\r
-#define CYREG_B1_P2_U0_PLD_IT8 0x40011420u\r
-#define CYREG_B1_P2_U0_PLD_IT9 0x40011424u\r
-#define CYREG_B1_P2_U0_PLD_IT10 0x40011428u\r
-#define CYREG_B1_P2_U0_PLD_IT11 0x4001142cu\r
-#define CYREG_B1_P2_U0_PLD_ORT0 0x40011430u\r
-#define CYREG_B1_P2_U0_PLD_ORT1 0x40011432u\r
-#define CYREG_B1_P2_U0_PLD_ORT2 0x40011434u\r
-#define CYREG_B1_P2_U0_PLD_ORT3 0x40011436u\r
-#define CYREG_B1_P2_U0_MC_CFG_CEN_CONST 0x40011438u\r
-#define CYREG_B1_P2_U0_MC_CFG_XORFB 0x4001143au\r
-#define CYREG_B1_P2_U0_MC_CFG_SET_RESET 0x4001143cu\r
-#define CYREG_B1_P2_U0_MC_CFG_BYPASS 0x4001143eu\r
-#define CYREG_B1_P2_U0_CFG0 0x40011440u\r
-#define CYREG_B1_P2_U0_CFG1 0x40011441u\r
-#define CYREG_B1_P2_U0_CFG2 0x40011442u\r
-#define CYREG_B1_P2_U0_CFG3 0x40011443u\r
-#define CYREG_B1_P2_U0_CFG4 0x40011444u\r
-#define CYREG_B1_P2_U0_CFG5 0x40011445u\r
-#define CYREG_B1_P2_U0_CFG6 0x40011446u\r
-#define CYREG_B1_P2_U0_CFG7 0x40011447u\r
-#define CYREG_B1_P2_U0_CFG8 0x40011448u\r
-#define CYREG_B1_P2_U0_CFG9 0x40011449u\r
-#define CYREG_B1_P2_U0_CFG10 0x4001144au\r
-#define CYREG_B1_P2_U0_CFG11 0x4001144bu\r
-#define CYREG_B1_P2_U0_CFG12 0x4001144cu\r
-#define CYREG_B1_P2_U0_CFG13 0x4001144du\r
-#define CYREG_B1_P2_U0_CFG14 0x4001144eu\r
-#define CYREG_B1_P2_U0_CFG15 0x4001144fu\r
-#define CYREG_B1_P2_U0_CFG16 0x40011450u\r
-#define CYREG_B1_P2_U0_CFG17 0x40011451u\r
-#define CYREG_B1_P2_U0_CFG18 0x40011452u\r
-#define CYREG_B1_P2_U0_CFG19 0x40011453u\r
-#define CYREG_B1_P2_U0_CFG20 0x40011454u\r
-#define CYREG_B1_P2_U0_CFG21 0x40011455u\r
-#define CYREG_B1_P2_U0_CFG22 0x40011456u\r
-#define CYREG_B1_P2_U0_CFG23 0x40011457u\r
-#define CYREG_B1_P2_U0_CFG24 0x40011458u\r
-#define CYREG_B1_P2_U0_CFG25 0x40011459u\r
-#define CYREG_B1_P2_U0_CFG26 0x4001145au\r
-#define CYREG_B1_P2_U0_CFG27 0x4001145bu\r
-#define CYREG_B1_P2_U0_CFG28 0x4001145cu\r
-#define CYREG_B1_P2_U0_CFG29 0x4001145du\r
-#define CYREG_B1_P2_U0_CFG30 0x4001145eu\r
-#define CYREG_B1_P2_U0_CFG31 0x4001145fu\r
-#define CYREG_B1_P2_U0_DCFG0 0x40011460u\r
-#define CYREG_B1_P2_U0_DCFG1 0x40011462u\r
-#define CYREG_B1_P2_U0_DCFG2 0x40011464u\r
-#define CYREG_B1_P2_U0_DCFG3 0x40011466u\r
-#define CYREG_B1_P2_U0_DCFG4 0x40011468u\r
-#define CYREG_B1_P2_U0_DCFG5 0x4001146au\r
-#define CYREG_B1_P2_U0_DCFG6 0x4001146cu\r
-#define CYREG_B1_P2_U0_DCFG7 0x4001146eu\r
-#define CYDEV_UCFG_B1_P2_U1_BASE 0x40011480u\r
-#define CYDEV_UCFG_B1_P2_U1_SIZE 0x00000070u\r
-#define CYREG_B1_P2_U1_PLD_IT0 0x40011480u\r
-#define CYREG_B1_P2_U1_PLD_IT1 0x40011484u\r
-#define CYREG_B1_P2_U1_PLD_IT2 0x40011488u\r
-#define CYREG_B1_P2_U1_PLD_IT3 0x4001148cu\r
-#define CYREG_B1_P2_U1_PLD_IT4 0x40011490u\r
-#define CYREG_B1_P2_U1_PLD_IT5 0x40011494u\r
-#define CYREG_B1_P2_U1_PLD_IT6 0x40011498u\r
-#define CYREG_B1_P2_U1_PLD_IT7 0x4001149cu\r
-#define CYREG_B1_P2_U1_PLD_IT8 0x400114a0u\r
-#define CYREG_B1_P2_U1_PLD_IT9 0x400114a4u\r
-#define CYREG_B1_P2_U1_PLD_IT10 0x400114a8u\r
-#define CYREG_B1_P2_U1_PLD_IT11 0x400114acu\r
-#define CYREG_B1_P2_U1_PLD_ORT0 0x400114b0u\r
-#define CYREG_B1_P2_U1_PLD_ORT1 0x400114b2u\r
-#define CYREG_B1_P2_U1_PLD_ORT2 0x400114b4u\r
-#define CYREG_B1_P2_U1_PLD_ORT3 0x400114b6u\r
-#define CYREG_B1_P2_U1_MC_CFG_CEN_CONST 0x400114b8u\r
-#define CYREG_B1_P2_U1_MC_CFG_XORFB 0x400114bau\r
-#define CYREG_B1_P2_U1_MC_CFG_SET_RESET 0x400114bcu\r
-#define CYREG_B1_P2_U1_MC_CFG_BYPASS 0x400114beu\r
-#define CYREG_B1_P2_U1_CFG0 0x400114c0u\r
-#define CYREG_B1_P2_U1_CFG1 0x400114c1u\r
-#define CYREG_B1_P2_U1_CFG2 0x400114c2u\r
-#define CYREG_B1_P2_U1_CFG3 0x400114c3u\r
-#define CYREG_B1_P2_U1_CFG4 0x400114c4u\r
-#define CYREG_B1_P2_U1_CFG5 0x400114c5u\r
-#define CYREG_B1_P2_U1_CFG6 0x400114c6u\r
-#define CYREG_B1_P2_U1_CFG7 0x400114c7u\r
-#define CYREG_B1_P2_U1_CFG8 0x400114c8u\r
-#define CYREG_B1_P2_U1_CFG9 0x400114c9u\r
-#define CYREG_B1_P2_U1_CFG10 0x400114cau\r
-#define CYREG_B1_P2_U1_CFG11 0x400114cbu\r
-#define CYREG_B1_P2_U1_CFG12 0x400114ccu\r
-#define CYREG_B1_P2_U1_CFG13 0x400114cdu\r
-#define CYREG_B1_P2_U1_CFG14 0x400114ceu\r
-#define CYREG_B1_P2_U1_CFG15 0x400114cfu\r
-#define CYREG_B1_P2_U1_CFG16 0x400114d0u\r
-#define CYREG_B1_P2_U1_CFG17 0x400114d1u\r
-#define CYREG_B1_P2_U1_CFG18 0x400114d2u\r
-#define CYREG_B1_P2_U1_CFG19 0x400114d3u\r
-#define CYREG_B1_P2_U1_CFG20 0x400114d4u\r
-#define CYREG_B1_P2_U1_CFG21 0x400114d5u\r
-#define CYREG_B1_P2_U1_CFG22 0x400114d6u\r
-#define CYREG_B1_P2_U1_CFG23 0x400114d7u\r
-#define CYREG_B1_P2_U1_CFG24 0x400114d8u\r
-#define CYREG_B1_P2_U1_CFG25 0x400114d9u\r
-#define CYREG_B1_P2_U1_CFG26 0x400114dau\r
-#define CYREG_B1_P2_U1_CFG27 0x400114dbu\r
-#define CYREG_B1_P2_U1_CFG28 0x400114dcu\r
-#define CYREG_B1_P2_U1_CFG29 0x400114ddu\r
-#define CYREG_B1_P2_U1_CFG30 0x400114deu\r
-#define CYREG_B1_P2_U1_CFG31 0x400114dfu\r
-#define CYREG_B1_P2_U1_DCFG0 0x400114e0u\r
-#define CYREG_B1_P2_U1_DCFG1 0x400114e2u\r
-#define CYREG_B1_P2_U1_DCFG2 0x400114e4u\r
-#define CYREG_B1_P2_U1_DCFG3 0x400114e6u\r
-#define CYREG_B1_P2_U1_DCFG4 0x400114e8u\r
-#define CYREG_B1_P2_U1_DCFG5 0x400114eau\r
-#define CYREG_B1_P2_U1_DCFG6 0x400114ecu\r
-#define CYREG_B1_P2_U1_DCFG7 0x400114eeu\r
-#define CYDEV_UCFG_B1_P2_ROUTE_BASE 0x40011500u\r
-#define CYDEV_UCFG_B1_P2_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P3_BASE 0x40011600u\r
-#define CYDEV_UCFG_B1_P3_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P3_U0_BASE 0x40011600u\r
-#define CYDEV_UCFG_B1_P3_U0_SIZE 0x00000070u\r
-#define CYREG_B1_P3_U0_PLD_IT0 0x40011600u\r
-#define CYREG_B1_P3_U0_PLD_IT1 0x40011604u\r
-#define CYREG_B1_P3_U0_PLD_IT2 0x40011608u\r
-#define CYREG_B1_P3_U0_PLD_IT3 0x4001160cu\r
-#define CYREG_B1_P3_U0_PLD_IT4 0x40011610u\r
-#define CYREG_B1_P3_U0_PLD_IT5 0x40011614u\r
-#define CYREG_B1_P3_U0_PLD_IT6 0x40011618u\r
-#define CYREG_B1_P3_U0_PLD_IT7 0x4001161cu\r
-#define CYREG_B1_P3_U0_PLD_IT8 0x40011620u\r
-#define CYREG_B1_P3_U0_PLD_IT9 0x40011624u\r
-#define CYREG_B1_P3_U0_PLD_IT10 0x40011628u\r
-#define CYREG_B1_P3_U0_PLD_IT11 0x4001162cu\r
-#define CYREG_B1_P3_U0_PLD_ORT0 0x40011630u\r
-#define CYREG_B1_P3_U0_PLD_ORT1 0x40011632u\r
-#define CYREG_B1_P3_U0_PLD_ORT2 0x40011634u\r
-#define CYREG_B1_P3_U0_PLD_ORT3 0x40011636u\r
-#define CYREG_B1_P3_U0_MC_CFG_CEN_CONST 0x40011638u\r
-#define CYREG_B1_P3_U0_MC_CFG_XORFB 0x4001163au\r
-#define CYREG_B1_P3_U0_MC_CFG_SET_RESET 0x4001163cu\r
-#define CYREG_B1_P3_U0_MC_CFG_BYPASS 0x4001163eu\r
-#define CYREG_B1_P3_U0_CFG0 0x40011640u\r
-#define CYREG_B1_P3_U0_CFG1 0x40011641u\r
-#define CYREG_B1_P3_U0_CFG2 0x40011642u\r
-#define CYREG_B1_P3_U0_CFG3 0x40011643u\r
-#define CYREG_B1_P3_U0_CFG4 0x40011644u\r
-#define CYREG_B1_P3_U0_CFG5 0x40011645u\r
-#define CYREG_B1_P3_U0_CFG6 0x40011646u\r
-#define CYREG_B1_P3_U0_CFG7 0x40011647u\r
-#define CYREG_B1_P3_U0_CFG8 0x40011648u\r
-#define CYREG_B1_P3_U0_CFG9 0x40011649u\r
-#define CYREG_B1_P3_U0_CFG10 0x4001164au\r
-#define CYREG_B1_P3_U0_CFG11 0x4001164bu\r
-#define CYREG_B1_P3_U0_CFG12 0x4001164cu\r
-#define CYREG_B1_P3_U0_CFG13 0x4001164du\r
-#define CYREG_B1_P3_U0_CFG14 0x4001164eu\r
-#define CYREG_B1_P3_U0_CFG15 0x4001164fu\r
-#define CYREG_B1_P3_U0_CFG16 0x40011650u\r
-#define CYREG_B1_P3_U0_CFG17 0x40011651u\r
-#define CYREG_B1_P3_U0_CFG18 0x40011652u\r
-#define CYREG_B1_P3_U0_CFG19 0x40011653u\r
-#define CYREG_B1_P3_U0_CFG20 0x40011654u\r
-#define CYREG_B1_P3_U0_CFG21 0x40011655u\r
-#define CYREG_B1_P3_U0_CFG22 0x40011656u\r
-#define CYREG_B1_P3_U0_CFG23 0x40011657u\r
-#define CYREG_B1_P3_U0_CFG24 0x40011658u\r
-#define CYREG_B1_P3_U0_CFG25 0x40011659u\r
-#define CYREG_B1_P3_U0_CFG26 0x4001165au\r
-#define CYREG_B1_P3_U0_CFG27 0x4001165bu\r
-#define CYREG_B1_P3_U0_CFG28 0x4001165cu\r
-#define CYREG_B1_P3_U0_CFG29 0x4001165du\r
-#define CYREG_B1_P3_U0_CFG30 0x4001165eu\r
-#define CYREG_B1_P3_U0_CFG31 0x4001165fu\r
-#define CYREG_B1_P3_U0_DCFG0 0x40011660u\r
-#define CYREG_B1_P3_U0_DCFG1 0x40011662u\r
-#define CYREG_B1_P3_U0_DCFG2 0x40011664u\r
-#define CYREG_B1_P3_U0_DCFG3 0x40011666u\r
-#define CYREG_B1_P3_U0_DCFG4 0x40011668u\r
-#define CYREG_B1_P3_U0_DCFG5 0x4001166au\r
-#define CYREG_B1_P3_U0_DCFG6 0x4001166cu\r
-#define CYREG_B1_P3_U0_DCFG7 0x4001166eu\r
-#define CYDEV_UCFG_B1_P3_U1_BASE 0x40011680u\r
-#define CYDEV_UCFG_B1_P3_U1_SIZE 0x00000070u\r
-#define CYREG_B1_P3_U1_PLD_IT0 0x40011680u\r
-#define CYREG_B1_P3_U1_PLD_IT1 0x40011684u\r
-#define CYREG_B1_P3_U1_PLD_IT2 0x40011688u\r
-#define CYREG_B1_P3_U1_PLD_IT3 0x4001168cu\r
-#define CYREG_B1_P3_U1_PLD_IT4 0x40011690u\r
-#define CYREG_B1_P3_U1_PLD_IT5 0x40011694u\r
-#define CYREG_B1_P3_U1_PLD_IT6 0x40011698u\r
-#define CYREG_B1_P3_U1_PLD_IT7 0x4001169cu\r
-#define CYREG_B1_P3_U1_PLD_IT8 0x400116a0u\r
-#define CYREG_B1_P3_U1_PLD_IT9 0x400116a4u\r
-#define CYREG_B1_P3_U1_PLD_IT10 0x400116a8u\r
-#define CYREG_B1_P3_U1_PLD_IT11 0x400116acu\r
-#define CYREG_B1_P3_U1_PLD_ORT0 0x400116b0u\r
-#define CYREG_B1_P3_U1_PLD_ORT1 0x400116b2u\r
-#define CYREG_B1_P3_U1_PLD_ORT2 0x400116b4u\r
-#define CYREG_B1_P3_U1_PLD_ORT3 0x400116b6u\r
-#define CYREG_B1_P3_U1_MC_CFG_CEN_CONST 0x400116b8u\r
-#define CYREG_B1_P3_U1_MC_CFG_XORFB 0x400116bau\r
-#define CYREG_B1_P3_U1_MC_CFG_SET_RESET 0x400116bcu\r
-#define CYREG_B1_P3_U1_MC_CFG_BYPASS 0x400116beu\r
-#define CYREG_B1_P3_U1_CFG0 0x400116c0u\r
-#define CYREG_B1_P3_U1_CFG1 0x400116c1u\r
-#define CYREG_B1_P3_U1_CFG2 0x400116c2u\r
-#define CYREG_B1_P3_U1_CFG3 0x400116c3u\r
-#define CYREG_B1_P3_U1_CFG4 0x400116c4u\r
-#define CYREG_B1_P3_U1_CFG5 0x400116c5u\r
-#define CYREG_B1_P3_U1_CFG6 0x400116c6u\r
-#define CYREG_B1_P3_U1_CFG7 0x400116c7u\r
-#define CYREG_B1_P3_U1_CFG8 0x400116c8u\r
-#define CYREG_B1_P3_U1_CFG9 0x400116c9u\r
-#define CYREG_B1_P3_U1_CFG10 0x400116cau\r
-#define CYREG_B1_P3_U1_CFG11 0x400116cbu\r
-#define CYREG_B1_P3_U1_CFG12 0x400116ccu\r
-#define CYREG_B1_P3_U1_CFG13 0x400116cdu\r
-#define CYREG_B1_P3_U1_CFG14 0x400116ceu\r
-#define CYREG_B1_P3_U1_CFG15 0x400116cfu\r
-#define CYREG_B1_P3_U1_CFG16 0x400116d0u\r
-#define CYREG_B1_P3_U1_CFG17 0x400116d1u\r
-#define CYREG_B1_P3_U1_CFG18 0x400116d2u\r
-#define CYREG_B1_P3_U1_CFG19 0x400116d3u\r
-#define CYREG_B1_P3_U1_CFG20 0x400116d4u\r
-#define CYREG_B1_P3_U1_CFG21 0x400116d5u\r
-#define CYREG_B1_P3_U1_CFG22 0x400116d6u\r
-#define CYREG_B1_P3_U1_CFG23 0x400116d7u\r
-#define CYREG_B1_P3_U1_CFG24 0x400116d8u\r
-#define CYREG_B1_P3_U1_CFG25 0x400116d9u\r
-#define CYREG_B1_P3_U1_CFG26 0x400116dau\r
-#define CYREG_B1_P3_U1_CFG27 0x400116dbu\r
-#define CYREG_B1_P3_U1_CFG28 0x400116dcu\r
-#define CYREG_B1_P3_U1_CFG29 0x400116ddu\r
-#define CYREG_B1_P3_U1_CFG30 0x400116deu\r
-#define CYREG_B1_P3_U1_CFG31 0x400116dfu\r
-#define CYREG_B1_P3_U1_DCFG0 0x400116e0u\r
-#define CYREG_B1_P3_U1_DCFG1 0x400116e2u\r
-#define CYREG_B1_P3_U1_DCFG2 0x400116e4u\r
-#define CYREG_B1_P3_U1_DCFG3 0x400116e6u\r
-#define CYREG_B1_P3_U1_DCFG4 0x400116e8u\r
-#define CYREG_B1_P3_U1_DCFG5 0x400116eau\r
-#define CYREG_B1_P3_U1_DCFG6 0x400116ecu\r
-#define CYREG_B1_P3_U1_DCFG7 0x400116eeu\r
-#define CYDEV_UCFG_B1_P3_ROUTE_BASE 0x40011700u\r
-#define CYDEV_UCFG_B1_P3_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P4_BASE 0x40011800u\r
-#define CYDEV_UCFG_B1_P4_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P4_U0_BASE 0x40011800u\r
-#define CYDEV_UCFG_B1_P4_U0_SIZE 0x00000070u\r
-#define CYREG_B1_P4_U0_PLD_IT0 0x40011800u\r
-#define CYREG_B1_P4_U0_PLD_IT1 0x40011804u\r
-#define CYREG_B1_P4_U0_PLD_IT2 0x40011808u\r
-#define CYREG_B1_P4_U0_PLD_IT3 0x4001180cu\r
-#define CYREG_B1_P4_U0_PLD_IT4 0x40011810u\r
-#define CYREG_B1_P4_U0_PLD_IT5 0x40011814u\r
-#define CYREG_B1_P4_U0_PLD_IT6 0x40011818u\r
-#define CYREG_B1_P4_U0_PLD_IT7 0x4001181cu\r
-#define CYREG_B1_P4_U0_PLD_IT8 0x40011820u\r
-#define CYREG_B1_P4_U0_PLD_IT9 0x40011824u\r
-#define CYREG_B1_P4_U0_PLD_IT10 0x40011828u\r
-#define CYREG_B1_P4_U0_PLD_IT11 0x4001182cu\r
-#define CYREG_B1_P4_U0_PLD_ORT0 0x40011830u\r
-#define CYREG_B1_P4_U0_PLD_ORT1 0x40011832u\r
-#define CYREG_B1_P4_U0_PLD_ORT2 0x40011834u\r
-#define CYREG_B1_P4_U0_PLD_ORT3 0x40011836u\r
-#define CYREG_B1_P4_U0_MC_CFG_CEN_CONST 0x40011838u\r
-#define CYREG_B1_P4_U0_MC_CFG_XORFB 0x4001183au\r
-#define CYREG_B1_P4_U0_MC_CFG_SET_RESET 0x4001183cu\r
-#define CYREG_B1_P4_U0_MC_CFG_BYPASS 0x4001183eu\r
-#define CYREG_B1_P4_U0_CFG0 0x40011840u\r
-#define CYREG_B1_P4_U0_CFG1 0x40011841u\r
-#define CYREG_B1_P4_U0_CFG2 0x40011842u\r
-#define CYREG_B1_P4_U0_CFG3 0x40011843u\r
-#define CYREG_B1_P4_U0_CFG4 0x40011844u\r
-#define CYREG_B1_P4_U0_CFG5 0x40011845u\r
-#define CYREG_B1_P4_U0_CFG6 0x40011846u\r
-#define CYREG_B1_P4_U0_CFG7 0x40011847u\r
-#define CYREG_B1_P4_U0_CFG8 0x40011848u\r
-#define CYREG_B1_P4_U0_CFG9 0x40011849u\r
-#define CYREG_B1_P4_U0_CFG10 0x4001184au\r
-#define CYREG_B1_P4_U0_CFG11 0x4001184bu\r
-#define CYREG_B1_P4_U0_CFG12 0x4001184cu\r
-#define CYREG_B1_P4_U0_CFG13 0x4001184du\r
-#define CYREG_B1_P4_U0_CFG14 0x4001184eu\r
-#define CYREG_B1_P4_U0_CFG15 0x4001184fu\r
-#define CYREG_B1_P4_U0_CFG16 0x40011850u\r
-#define CYREG_B1_P4_U0_CFG17 0x40011851u\r
-#define CYREG_B1_P4_U0_CFG18 0x40011852u\r
-#define CYREG_B1_P4_U0_CFG19 0x40011853u\r
-#define CYREG_B1_P4_U0_CFG20 0x40011854u\r
-#define CYREG_B1_P4_U0_CFG21 0x40011855u\r
-#define CYREG_B1_P4_U0_CFG22 0x40011856u\r
-#define CYREG_B1_P4_U0_CFG23 0x40011857u\r
-#define CYREG_B1_P4_U0_CFG24 0x40011858u\r
-#define CYREG_B1_P4_U0_CFG25 0x40011859u\r
-#define CYREG_B1_P4_U0_CFG26 0x4001185au\r
-#define CYREG_B1_P4_U0_CFG27 0x4001185bu\r
-#define CYREG_B1_P4_U0_CFG28 0x4001185cu\r
-#define CYREG_B1_P4_U0_CFG29 0x4001185du\r
-#define CYREG_B1_P4_U0_CFG30 0x4001185eu\r
-#define CYREG_B1_P4_U0_CFG31 0x4001185fu\r
-#define CYREG_B1_P4_U0_DCFG0 0x40011860u\r
-#define CYREG_B1_P4_U0_DCFG1 0x40011862u\r
-#define CYREG_B1_P4_U0_DCFG2 0x40011864u\r
-#define CYREG_B1_P4_U0_DCFG3 0x40011866u\r
-#define CYREG_B1_P4_U0_DCFG4 0x40011868u\r
-#define CYREG_B1_P4_U0_DCFG5 0x4001186au\r
-#define CYREG_B1_P4_U0_DCFG6 0x4001186cu\r
-#define CYREG_B1_P4_U0_DCFG7 0x4001186eu\r
-#define CYDEV_UCFG_B1_P4_U1_BASE 0x40011880u\r
-#define CYDEV_UCFG_B1_P4_U1_SIZE 0x00000070u\r
-#define CYREG_B1_P4_U1_PLD_IT0 0x40011880u\r
-#define CYREG_B1_P4_U1_PLD_IT1 0x40011884u\r
-#define CYREG_B1_P4_U1_PLD_IT2 0x40011888u\r
-#define CYREG_B1_P4_U1_PLD_IT3 0x4001188cu\r
-#define CYREG_B1_P4_U1_PLD_IT4 0x40011890u\r
-#define CYREG_B1_P4_U1_PLD_IT5 0x40011894u\r
-#define CYREG_B1_P4_U1_PLD_IT6 0x40011898u\r
-#define CYREG_B1_P4_U1_PLD_IT7 0x4001189cu\r
-#define CYREG_B1_P4_U1_PLD_IT8 0x400118a0u\r
-#define CYREG_B1_P4_U1_PLD_IT9 0x400118a4u\r
-#define CYREG_B1_P4_U1_PLD_IT10 0x400118a8u\r
-#define CYREG_B1_P4_U1_PLD_IT11 0x400118acu\r
-#define CYREG_B1_P4_U1_PLD_ORT0 0x400118b0u\r
-#define CYREG_B1_P4_U1_PLD_ORT1 0x400118b2u\r
-#define CYREG_B1_P4_U1_PLD_ORT2 0x400118b4u\r
-#define CYREG_B1_P4_U1_PLD_ORT3 0x400118b6u\r
-#define CYREG_B1_P4_U1_MC_CFG_CEN_CONST 0x400118b8u\r
-#define CYREG_B1_P4_U1_MC_CFG_XORFB 0x400118bau\r
-#define CYREG_B1_P4_U1_MC_CFG_SET_RESET 0x400118bcu\r
-#define CYREG_B1_P4_U1_MC_CFG_BYPASS 0x400118beu\r
-#define CYREG_B1_P4_U1_CFG0 0x400118c0u\r
-#define CYREG_B1_P4_U1_CFG1 0x400118c1u\r
-#define CYREG_B1_P4_U1_CFG2 0x400118c2u\r
-#define CYREG_B1_P4_U1_CFG3 0x400118c3u\r
-#define CYREG_B1_P4_U1_CFG4 0x400118c4u\r
-#define CYREG_B1_P4_U1_CFG5 0x400118c5u\r
-#define CYREG_B1_P4_U1_CFG6 0x400118c6u\r
-#define CYREG_B1_P4_U1_CFG7 0x400118c7u\r
-#define CYREG_B1_P4_U1_CFG8 0x400118c8u\r
-#define CYREG_B1_P4_U1_CFG9 0x400118c9u\r
-#define CYREG_B1_P4_U1_CFG10 0x400118cau\r
-#define CYREG_B1_P4_U1_CFG11 0x400118cbu\r
-#define CYREG_B1_P4_U1_CFG12 0x400118ccu\r
-#define CYREG_B1_P4_U1_CFG13 0x400118cdu\r
-#define CYREG_B1_P4_U1_CFG14 0x400118ceu\r
-#define CYREG_B1_P4_U1_CFG15 0x400118cfu\r
-#define CYREG_B1_P4_U1_CFG16 0x400118d0u\r
-#define CYREG_B1_P4_U1_CFG17 0x400118d1u\r
-#define CYREG_B1_P4_U1_CFG18 0x400118d2u\r
-#define CYREG_B1_P4_U1_CFG19 0x400118d3u\r
-#define CYREG_B1_P4_U1_CFG20 0x400118d4u\r
-#define CYREG_B1_P4_U1_CFG21 0x400118d5u\r
-#define CYREG_B1_P4_U1_CFG22 0x400118d6u\r
-#define CYREG_B1_P4_U1_CFG23 0x400118d7u\r
-#define CYREG_B1_P4_U1_CFG24 0x400118d8u\r
-#define CYREG_B1_P4_U1_CFG25 0x400118d9u\r
-#define CYREG_B1_P4_U1_CFG26 0x400118dau\r
-#define CYREG_B1_P4_U1_CFG27 0x400118dbu\r
-#define CYREG_B1_P4_U1_CFG28 0x400118dcu\r
-#define CYREG_B1_P4_U1_CFG29 0x400118ddu\r
-#define CYREG_B1_P4_U1_CFG30 0x400118deu\r
-#define CYREG_B1_P4_U1_CFG31 0x400118dfu\r
-#define CYREG_B1_P4_U1_DCFG0 0x400118e0u\r
-#define CYREG_B1_P4_U1_DCFG1 0x400118e2u\r
-#define CYREG_B1_P4_U1_DCFG2 0x400118e4u\r
-#define CYREG_B1_P4_U1_DCFG3 0x400118e6u\r
-#define CYREG_B1_P4_U1_DCFG4 0x400118e8u\r
-#define CYREG_B1_P4_U1_DCFG5 0x400118eau\r
-#define CYREG_B1_P4_U1_DCFG6 0x400118ecu\r
-#define CYREG_B1_P4_U1_DCFG7 0x400118eeu\r
-#define CYDEV_UCFG_B1_P4_ROUTE_BASE 0x40011900u\r
-#define CYDEV_UCFG_B1_P4_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_B1_P5_BASE 0x40011a00u\r
-#define CYDEV_UCFG_B1_P5_SIZE 0x000001efu\r
-#define CYDEV_UCFG_B1_P5_U0_BASE 0x40011a00u\r
-#define CYDEV_UCFG_B1_P5_U0_SIZE 0x00000070u\r
-#define CYREG_B1_P5_U0_PLD_IT0 0x40011a00u\r
-#define CYREG_B1_P5_U0_PLD_IT1 0x40011a04u\r
-#define CYREG_B1_P5_U0_PLD_IT2 0x40011a08u\r
-#define CYREG_B1_P5_U0_PLD_IT3 0x40011a0cu\r
-#define CYREG_B1_P5_U0_PLD_IT4 0x40011a10u\r
-#define CYREG_B1_P5_U0_PLD_IT5 0x40011a14u\r
-#define CYREG_B1_P5_U0_PLD_IT6 0x40011a18u\r
-#define CYREG_B1_P5_U0_PLD_IT7 0x40011a1cu\r
-#define CYREG_B1_P5_U0_PLD_IT8 0x40011a20u\r
-#define CYREG_B1_P5_U0_PLD_IT9 0x40011a24u\r
-#define CYREG_B1_P5_U0_PLD_IT10 0x40011a28u\r
-#define CYREG_B1_P5_U0_PLD_IT11 0x40011a2cu\r
-#define CYREG_B1_P5_U0_PLD_ORT0 0x40011a30u\r
-#define CYREG_B1_P5_U0_PLD_ORT1 0x40011a32u\r
-#define CYREG_B1_P5_U0_PLD_ORT2 0x40011a34u\r
-#define CYREG_B1_P5_U0_PLD_ORT3 0x40011a36u\r
-#define CYREG_B1_P5_U0_MC_CFG_CEN_CONST 0x40011a38u\r
-#define CYREG_B1_P5_U0_MC_CFG_XORFB 0x40011a3au\r
-#define CYREG_B1_P5_U0_MC_CFG_SET_RESET 0x40011a3cu\r
-#define CYREG_B1_P5_U0_MC_CFG_BYPASS 0x40011a3eu\r
-#define CYREG_B1_P5_U0_CFG0 0x40011a40u\r
-#define CYREG_B1_P5_U0_CFG1 0x40011a41u\r
-#define CYREG_B1_P5_U0_CFG2 0x40011a42u\r
-#define CYREG_B1_P5_U0_CFG3 0x40011a43u\r
-#define CYREG_B1_P5_U0_CFG4 0x40011a44u\r
-#define CYREG_B1_P5_U0_CFG5 0x40011a45u\r
-#define CYREG_B1_P5_U0_CFG6 0x40011a46u\r
-#define CYREG_B1_P5_U0_CFG7 0x40011a47u\r
-#define CYREG_B1_P5_U0_CFG8 0x40011a48u\r
-#define CYREG_B1_P5_U0_CFG9 0x40011a49u\r
-#define CYREG_B1_P5_U0_CFG10 0x40011a4au\r
-#define CYREG_B1_P5_U0_CFG11 0x40011a4bu\r
-#define CYREG_B1_P5_U0_CFG12 0x40011a4cu\r
-#define CYREG_B1_P5_U0_CFG13 0x40011a4du\r
-#define CYREG_B1_P5_U0_CFG14 0x40011a4eu\r
-#define CYREG_B1_P5_U0_CFG15 0x40011a4fu\r
-#define CYREG_B1_P5_U0_CFG16 0x40011a50u\r
-#define CYREG_B1_P5_U0_CFG17 0x40011a51u\r
-#define CYREG_B1_P5_U0_CFG18 0x40011a52u\r
-#define CYREG_B1_P5_U0_CFG19 0x40011a53u\r
-#define CYREG_B1_P5_U0_CFG20 0x40011a54u\r
-#define CYREG_B1_P5_U0_CFG21 0x40011a55u\r
-#define CYREG_B1_P5_U0_CFG22 0x40011a56u\r
-#define CYREG_B1_P5_U0_CFG23 0x40011a57u\r
-#define CYREG_B1_P5_U0_CFG24 0x40011a58u\r
-#define CYREG_B1_P5_U0_CFG25 0x40011a59u\r
-#define CYREG_B1_P5_U0_CFG26 0x40011a5au\r
-#define CYREG_B1_P5_U0_CFG27 0x40011a5bu\r
-#define CYREG_B1_P5_U0_CFG28 0x40011a5cu\r
-#define CYREG_B1_P5_U0_CFG29 0x40011a5du\r
-#define CYREG_B1_P5_U0_CFG30 0x40011a5eu\r
-#define CYREG_B1_P5_U0_CFG31 0x40011a5fu\r
-#define CYREG_B1_P5_U0_DCFG0 0x40011a60u\r
-#define CYREG_B1_P5_U0_DCFG1 0x40011a62u\r
-#define CYREG_B1_P5_U0_DCFG2 0x40011a64u\r
-#define CYREG_B1_P5_U0_DCFG3 0x40011a66u\r
-#define CYREG_B1_P5_U0_DCFG4 0x40011a68u\r
-#define CYREG_B1_P5_U0_DCFG5 0x40011a6au\r
-#define CYREG_B1_P5_U0_DCFG6 0x40011a6cu\r
-#define CYREG_B1_P5_U0_DCFG7 0x40011a6eu\r
-#define CYDEV_UCFG_B1_P5_U1_BASE 0x40011a80u\r
-#define CYDEV_UCFG_B1_P5_U1_SIZE 0x00000070u\r
-#define CYREG_B1_P5_U1_PLD_IT0 0x40011a80u\r
-#define CYREG_B1_P5_U1_PLD_IT1 0x40011a84u\r
-#define CYREG_B1_P5_U1_PLD_IT2 0x40011a88u\r
-#define CYREG_B1_P5_U1_PLD_IT3 0x40011a8cu\r
-#define CYREG_B1_P5_U1_PLD_IT4 0x40011a90u\r
-#define CYREG_B1_P5_U1_PLD_IT5 0x40011a94u\r
-#define CYREG_B1_P5_U1_PLD_IT6 0x40011a98u\r
-#define CYREG_B1_P5_U1_PLD_IT7 0x40011a9cu\r
-#define CYREG_B1_P5_U1_PLD_IT8 0x40011aa0u\r
-#define CYREG_B1_P5_U1_PLD_IT9 0x40011aa4u\r
-#define CYREG_B1_P5_U1_PLD_IT10 0x40011aa8u\r
-#define CYREG_B1_P5_U1_PLD_IT11 0x40011aacu\r
-#define CYREG_B1_P5_U1_PLD_ORT0 0x40011ab0u\r
-#define CYREG_B1_P5_U1_PLD_ORT1 0x40011ab2u\r
-#define CYREG_B1_P5_U1_PLD_ORT2 0x40011ab4u\r
-#define CYREG_B1_P5_U1_PLD_ORT3 0x40011ab6u\r
-#define CYREG_B1_P5_U1_MC_CFG_CEN_CONST 0x40011ab8u\r
-#define CYREG_B1_P5_U1_MC_CFG_XORFB 0x40011abau\r
-#define CYREG_B1_P5_U1_MC_CFG_SET_RESET 0x40011abcu\r
-#define CYREG_B1_P5_U1_MC_CFG_BYPASS 0x40011abeu\r
-#define CYREG_B1_P5_U1_CFG0 0x40011ac0u\r
-#define CYREG_B1_P5_U1_CFG1 0x40011ac1u\r
-#define CYREG_B1_P5_U1_CFG2 0x40011ac2u\r
-#define CYREG_B1_P5_U1_CFG3 0x40011ac3u\r
-#define CYREG_B1_P5_U1_CFG4 0x40011ac4u\r
-#define CYREG_B1_P5_U1_CFG5 0x40011ac5u\r
-#define CYREG_B1_P5_U1_CFG6 0x40011ac6u\r
-#define CYREG_B1_P5_U1_CFG7 0x40011ac7u\r
-#define CYREG_B1_P5_U1_CFG8 0x40011ac8u\r
-#define CYREG_B1_P5_U1_CFG9 0x40011ac9u\r
-#define CYREG_B1_P5_U1_CFG10 0x40011acau\r
-#define CYREG_B1_P5_U1_CFG11 0x40011acbu\r
-#define CYREG_B1_P5_U1_CFG12 0x40011accu\r
-#define CYREG_B1_P5_U1_CFG13 0x40011acdu\r
-#define CYREG_B1_P5_U1_CFG14 0x40011aceu\r
-#define CYREG_B1_P5_U1_CFG15 0x40011acfu\r
-#define CYREG_B1_P5_U1_CFG16 0x40011ad0u\r
-#define CYREG_B1_P5_U1_CFG17 0x40011ad1u\r
-#define CYREG_B1_P5_U1_CFG18 0x40011ad2u\r
-#define CYREG_B1_P5_U1_CFG19 0x40011ad3u\r
-#define CYREG_B1_P5_U1_CFG20 0x40011ad4u\r
-#define CYREG_B1_P5_U1_CFG21 0x40011ad5u\r
-#define CYREG_B1_P5_U1_CFG22 0x40011ad6u\r
-#define CYREG_B1_P5_U1_CFG23 0x40011ad7u\r
-#define CYREG_B1_P5_U1_CFG24 0x40011ad8u\r
-#define CYREG_B1_P5_U1_CFG25 0x40011ad9u\r
-#define CYREG_B1_P5_U1_CFG26 0x40011adau\r
-#define CYREG_B1_P5_U1_CFG27 0x40011adbu\r
-#define CYREG_B1_P5_U1_CFG28 0x40011adcu\r
-#define CYREG_B1_P5_U1_CFG29 0x40011addu\r
-#define CYREG_B1_P5_U1_CFG30 0x40011adeu\r
-#define CYREG_B1_P5_U1_CFG31 0x40011adfu\r
-#define CYREG_B1_P5_U1_DCFG0 0x40011ae0u\r
-#define CYREG_B1_P5_U1_DCFG1 0x40011ae2u\r
-#define CYREG_B1_P5_U1_DCFG2 0x40011ae4u\r
-#define CYREG_B1_P5_U1_DCFG3 0x40011ae6u\r
-#define CYREG_B1_P5_U1_DCFG4 0x40011ae8u\r
-#define CYREG_B1_P5_U1_DCFG5 0x40011aeau\r
-#define CYREG_B1_P5_U1_DCFG6 0x40011aecu\r
-#define CYREG_B1_P5_U1_DCFG7 0x40011aeeu\r
-#define CYDEV_UCFG_B1_P5_ROUTE_BASE 0x40011b00u\r
-#define CYDEV_UCFG_B1_P5_ROUTE_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI0_BASE 0x40014000u\r
-#define CYDEV_UCFG_DSI0_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI1_BASE 0x40014100u\r
-#define CYDEV_UCFG_DSI1_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI2_BASE 0x40014200u\r
-#define CYDEV_UCFG_DSI2_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI3_BASE 0x40014300u\r
-#define CYDEV_UCFG_DSI3_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI4_BASE 0x40014400u\r
-#define CYDEV_UCFG_DSI4_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI5_BASE 0x40014500u\r
-#define CYDEV_UCFG_DSI5_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI6_BASE 0x40014600u\r
-#define CYDEV_UCFG_DSI6_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI7_BASE 0x40014700u\r
-#define CYDEV_UCFG_DSI7_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI8_BASE 0x40014800u\r
-#define CYDEV_UCFG_DSI8_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI9_BASE 0x40014900u\r
-#define CYDEV_UCFG_DSI9_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI12_BASE 0x40014c00u\r
-#define CYDEV_UCFG_DSI12_SIZE 0x000000efu\r
-#define CYDEV_UCFG_DSI13_BASE 0x40014d00u\r
-#define CYDEV_UCFG_DSI13_SIZE 0x000000efu\r
-#define CYDEV_UCFG_BCTL0_BASE 0x40015000u\r
-#define CYDEV_UCFG_BCTL0_SIZE 0x00000010u\r
-#define CYREG_BCTL0_MDCLK_EN 0x40015000u\r
-#define CYREG_BCTL0_MBCLK_EN 0x40015001u\r
-#define CYREG_BCTL0_WAIT_CFG 0x40015002u\r
-#define CYREG_BCTL0_BANK_CTL 0x40015003u\r
-#define CYREG_BCTL0_UDB_TEST_3 0x40015007u\r
-#define CYREG_BCTL0_DCLK_EN0 0x40015008u\r
-#define CYREG_BCTL0_BCLK_EN0 0x40015009u\r
-#define CYREG_BCTL0_DCLK_EN1 0x4001500au\r
-#define CYREG_BCTL0_BCLK_EN1 0x4001500bu\r
-#define CYREG_BCTL0_DCLK_EN2 0x4001500cu\r
-#define CYREG_BCTL0_BCLK_EN2 0x4001500du\r
-#define CYREG_BCTL0_DCLK_EN3 0x4001500eu\r
-#define CYREG_BCTL0_BCLK_EN3 0x4001500fu\r
-#define CYDEV_UCFG_BCTL1_BASE 0x40015010u\r
-#define CYDEV_UCFG_BCTL1_SIZE 0x00000010u\r
-#define CYREG_BCTL1_MDCLK_EN 0x40015010u\r
-#define CYREG_BCTL1_MBCLK_EN 0x40015011u\r
-#define CYREG_BCTL1_WAIT_CFG 0x40015012u\r
-#define CYREG_BCTL1_BANK_CTL 0x40015013u\r
-#define CYREG_BCTL1_UDB_TEST_3 0x40015017u\r
-#define CYREG_BCTL1_DCLK_EN0 0x40015018u\r
-#define CYREG_BCTL1_BCLK_EN0 0x40015019u\r
-#define CYREG_BCTL1_DCLK_EN1 0x4001501au\r
-#define CYREG_BCTL1_BCLK_EN1 0x4001501bu\r
-#define CYREG_BCTL1_DCLK_EN2 0x4001501cu\r
-#define CYREG_BCTL1_BCLK_EN2 0x4001501du\r
-#define CYREG_BCTL1_DCLK_EN3 0x4001501eu\r
-#define CYREG_BCTL1_BCLK_EN3 0x4001501fu\r
-#define CYDEV_IDMUX_BASE 0x40015100u\r
-#define CYDEV_IDMUX_SIZE 0x00000016u\r
-#define CYREG_IDMUX_IRQ_CTL0 0x40015100u\r
-#define CYREG_IDMUX_IRQ_CTL1 0x40015101u\r
-#define CYREG_IDMUX_IRQ_CTL2 0x40015102u\r
-#define CYREG_IDMUX_IRQ_CTL3 0x40015103u\r
-#define CYREG_IDMUX_IRQ_CTL4 0x40015104u\r
-#define CYREG_IDMUX_IRQ_CTL5 0x40015105u\r
-#define CYREG_IDMUX_IRQ_CTL6 0x40015106u\r
-#define CYREG_IDMUX_IRQ_CTL7 0x40015107u\r
-#define CYREG_IDMUX_DRQ_CTL0 0x40015110u\r
-#define CYREG_IDMUX_DRQ_CTL1 0x40015111u\r
-#define CYREG_IDMUX_DRQ_CTL2 0x40015112u\r
-#define CYREG_IDMUX_DRQ_CTL3 0x40015113u\r
-#define CYREG_IDMUX_DRQ_CTL4 0x40015114u\r
-#define CYREG_IDMUX_DRQ_CTL5 0x40015115u\r
-#define CYDEV_CACHERAM_BASE 0x40030000u\r
-#define CYDEV_CACHERAM_SIZE 0x00000400u\r
-#define CYREG_CACHERAM_DATA_MBASE 0x40030000u\r
-#define CYREG_CACHERAM_DATA_MSIZE 0x00000400u\r
-#define CYDEV_SFR_BASE 0x40050100u\r
-#define CYDEV_SFR_SIZE 0x000000fbu\r
-#define CYREG_SFR_GPIO0 0x40050180u\r
-#define CYREG_SFR_GPIRD0 0x40050189u\r
-#define CYREG_SFR_GPIO0_SEL 0x4005018au\r
-#define CYREG_SFR_GPIO1 0x40050190u\r
-#define CYREG_SFR_GPIRD1 0x40050191u\r
-#define CYREG_SFR_GPIO2 0x40050198u\r
-#define CYREG_SFR_GPIRD2 0x40050199u\r
-#define CYREG_SFR_GPIO2_SEL 0x4005019au\r
-#define CYREG_SFR_GPIO1_SEL 0x400501a2u\r
-#define CYREG_SFR_GPIO3 0x400501b0u\r
-#define CYREG_SFR_GPIRD3 0x400501b1u\r
-#define CYREG_SFR_GPIO3_SEL 0x400501b2u\r
-#define CYREG_SFR_GPIO4 0x400501c0u\r
-#define CYREG_SFR_GPIRD4 0x400501c1u\r
-#define CYREG_SFR_GPIO4_SEL 0x400501c2u\r
-#define CYREG_SFR_GPIO5 0x400501c8u\r
-#define CYREG_SFR_GPIRD5 0x400501c9u\r
-#define CYREG_SFR_GPIO5_SEL 0x400501cau\r
-#define CYREG_SFR_GPIO6 0x400501d8u\r
-#define CYREG_SFR_GPIRD6 0x400501d9u\r
-#define CYREG_SFR_GPIO6_SEL 0x400501dau\r
-#define CYREG_SFR_GPIO12 0x400501e8u\r
-#define CYREG_SFR_GPIRD12 0x400501e9u\r
-#define CYREG_SFR_GPIO12_SEL 0x400501f2u\r
-#define CYREG_SFR_GPIO15 0x400501f8u\r
-#define CYREG_SFR_GPIRD15 0x400501f9u\r
-#define CYREG_SFR_GPIO15_SEL 0x400501fau\r
-#define CYDEV_P3BA_BASE 0x40050300u\r
-#define CYDEV_P3BA_SIZE 0x0000002bu\r
-#define CYREG_P3BA_Y_START 0x40050300u\r
-#define CYREG_P3BA_YROLL 0x40050301u\r
-#define CYREG_P3BA_YCFG 0x40050302u\r
-#define CYREG_P3BA_X_START1 0x40050303u\r
-#define CYREG_P3BA_X_START2 0x40050304u\r
-#define CYREG_P3BA_XROLL1 0x40050305u\r
-#define CYREG_P3BA_XROLL2 0x40050306u\r
-#define CYREG_P3BA_XINC 0x40050307u\r
-#define CYREG_P3BA_XCFG 0x40050308u\r
-#define CYREG_P3BA_OFFSETADDR1 0x40050309u\r
-#define CYREG_P3BA_OFFSETADDR2 0x4005030au\r
-#define CYREG_P3BA_OFFSETADDR3 0x4005030bu\r
-#define CYREG_P3BA_ABSADDR1 0x4005030cu\r
-#define CYREG_P3BA_ABSADDR2 0x4005030du\r
-#define CYREG_P3BA_ABSADDR3 0x4005030eu\r
-#define CYREG_P3BA_ABSADDR4 0x4005030fu\r
-#define CYREG_P3BA_DATCFG1 0x40050310u\r
-#define CYREG_P3BA_DATCFG2 0x40050311u\r
-#define CYREG_P3BA_CMP_RSLT1 0x40050314u\r
-#define CYREG_P3BA_CMP_RSLT2 0x40050315u\r
-#define CYREG_P3BA_CMP_RSLT3 0x40050316u\r
-#define CYREG_P3BA_CMP_RSLT4 0x40050317u\r
-#define CYREG_P3BA_DATA_REG1 0x40050318u\r
-#define CYREG_P3BA_DATA_REG2 0x40050319u\r
-#define CYREG_P3BA_DATA_REG3 0x4005031au\r
-#define CYREG_P3BA_DATA_REG4 0x4005031bu\r
-#define CYREG_P3BA_EXP_DATA1 0x4005031cu\r
-#define CYREG_P3BA_EXP_DATA2 0x4005031du\r
-#define CYREG_P3BA_EXP_DATA3 0x4005031eu\r
-#define CYREG_P3BA_EXP_DATA4 0x4005031fu\r
-#define CYREG_P3BA_MSTR_HRDATA1 0x40050320u\r
-#define CYREG_P3BA_MSTR_HRDATA2 0x40050321u\r
-#define CYREG_P3BA_MSTR_HRDATA3 0x40050322u\r
-#define CYREG_P3BA_MSTR_HRDATA4 0x40050323u\r
-#define CYREG_P3BA_BIST_EN 0x40050324u\r
-#define CYREG_P3BA_PHUB_MASTER_SSR 0x40050325u\r
-#define CYREG_P3BA_SEQCFG1 0x40050326u\r
-#define CYREG_P3BA_SEQCFG2 0x40050327u\r
-#define CYREG_P3BA_Y_CURR 0x40050328u\r
-#define CYREG_P3BA_X_CURR1 0x40050329u\r
-#define CYREG_P3BA_X_CURR2 0x4005032au\r
-#define CYDEV_PANTHER_BASE 0x40080000u\r
-#define CYDEV_PANTHER_SIZE 0x00000020u\r
-#define CYREG_PANTHER_STCALIB_CFG 0x40080000u\r
-#define CYREG_PANTHER_WAITPIPE 0x40080004u\r
-#define CYREG_PANTHER_TRACE_CFG 0x40080008u\r
-#define CYREG_PANTHER_DBG_CFG 0x4008000cu\r
-#define CYREG_PANTHER_CM3_LCKRST_STAT 0x40080018u\r
-#define CYREG_PANTHER_DEVICE_ID 0x4008001cu\r
-#define CYDEV_FLSECC_BASE 0x48000000u\r
-#define CYDEV_FLSECC_SIZE 0x00008000u\r
-#define CYREG_FLSECC_DATA_MBASE 0x48000000u\r
-#define CYREG_FLSECC_DATA_MSIZE 0x00008000u\r
-#define CYDEV_FLSHID_BASE 0x49000000u\r
-#define CYDEV_FLSHID_SIZE 0x00000200u\r
-#define CYREG_FLSHID_RSVD_MBASE 0x49000000u\r
-#define CYREG_FLSHID_RSVD_MSIZE 0x00000080u\r
-#define CYREG_FLSHID_CUST_MDATA_MBASE 0x49000080u\r
-#define CYREG_FLSHID_CUST_MDATA_MSIZE 0x00000080u\r
-#define CYDEV_FLSHID_CUST_TABLES_BASE 0x49000100u\r
-#define CYDEV_FLSHID_CUST_TABLES_SIZE 0x00000040u\r
-#define CYREG_FLSHID_CUST_TABLES_Y_LOC 0x49000100u\r
-#define CYREG_FLSHID_CUST_TABLES_X_LOC 0x49000101u\r
-#define CYREG_FLSHID_CUST_TABLES_WAFER_NUM 0x49000102u\r
-#define CYREG_FLSHID_CUST_TABLES_LOT_LSB 0x49000103u\r
-#define CYREG_FLSHID_CUST_TABLES_LOT_MSB 0x49000104u\r
-#define CYREG_FLSHID_CUST_TABLES_WRK_WK 0x49000105u\r
-#define CYREG_FLSHID_CUST_TABLES_FAB_YR 0x49000106u\r
-#define CYREG_FLSHID_CUST_TABLES_MINOR 0x49000107u\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_3MHZ 0x49000108u\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_6MHZ 0x49000109u\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_12MHZ 0x4900010au\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_24MHZ 0x4900010bu\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_67MHZ 0x4900010cu\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_80MHZ 0x4900010du\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_92MHZ 0x4900010eu\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_USB 0x4900010fu\r
-#define CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS 0x49000110u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS 0x49000111u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS 0x49000112u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS 0x49000113u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS 0x49000114u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS 0x49000115u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS 0x49000116u\r
-#define CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS 0x49000117u\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M1 0x49000118u\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M2 0x49000119u\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M3 0x4900011au\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M4 0x4900011bu\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M5 0x4900011cu\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M6 0x4900011du\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M7 0x4900011eu\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M8 0x4900011fu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M1 0x49000120u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M2 0x49000121u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M3 0x49000122u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M4 0x49000123u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M5 0x49000124u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M6 0x49000125u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M7 0x49000126u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M8 0x49000127u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M1 0x49000128u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M2 0x49000129u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M3 0x4900012au\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M4 0x4900012bu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M5 0x4900012cu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M6 0x4900012du\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M7 0x4900012eu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M8 0x4900012fu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M1 0x49000130u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M2 0x49000131u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M3 0x49000132u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M4 0x49000133u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M5 0x49000134u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M6 0x49000135u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M7 0x49000136u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M8 0x49000137u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M1 0x49000138u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M2 0x49000139u\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M3 0x4900013au\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M4 0x4900013bu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M5 0x4900013cu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M6 0x4900013du\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M7 0x4900013eu\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M8 0x4900013fu\r
-#define CYDEV_FLSHID_MFG_CFG_BASE 0x49000180u\r
-#define CYDEV_FLSHID_MFG_CFG_SIZE 0x00000080u\r
-#define CYREG_FLSHID_MFG_CFG_IMO_TR1 0x49000188u\r
-#define CYREG_FLSHID_MFG_CFG_CMP0_TR0 0x490001acu\r
-#define CYREG_FLSHID_MFG_CFG_CMP1_TR0 0x490001aeu\r
-#define CYREG_FLSHID_MFG_CFG_CMP2_TR0 0x490001b0u\r
-#define CYREG_FLSHID_MFG_CFG_CMP3_TR0 0x490001b2u\r
-#define CYREG_FLSHID_MFG_CFG_CMP0_TR1 0x490001b4u\r
-#define CYREG_FLSHID_MFG_CFG_CMP1_TR1 0x490001b6u\r
-#define CYREG_FLSHID_MFG_CFG_CMP2_TR1 0x490001b8u\r
-#define CYREG_FLSHID_MFG_CFG_CMP3_TR1 0x490001bau\r
-#define CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM 0x490001ceu\r
-#define CYDEV_EXTMEM_BASE 0x60000000u\r
-#define CYDEV_EXTMEM_SIZE 0x00800000u\r
-#define CYREG_EXTMEM_DATA_MBASE 0x60000000u\r
-#define CYREG_EXTMEM_DATA_MSIZE 0x00800000u\r
-#define CYDEV_ITM_BASE 0xe0000000u\r
-#define CYDEV_ITM_SIZE 0x00001000u\r
-#define CYREG_ITM_TRACE_EN 0xe0000e00u\r
-#define CYREG_ITM_TRACE_PRIVILEGE 0xe0000e40u\r
-#define CYREG_ITM_TRACE_CTRL 0xe0000e80u\r
-#define CYREG_ITM_LOCK_ACCESS 0xe0000fb0u\r
-#define CYREG_ITM_LOCK_STATUS 0xe0000fb4u\r
-#define CYREG_ITM_PID4 0xe0000fd0u\r
-#define CYREG_ITM_PID5 0xe0000fd4u\r
-#define CYREG_ITM_PID6 0xe0000fd8u\r
-#define CYREG_ITM_PID7 0xe0000fdcu\r
-#define CYREG_ITM_PID0 0xe0000fe0u\r
-#define CYREG_ITM_PID1 0xe0000fe4u\r
-#define CYREG_ITM_PID2 0xe0000fe8u\r
-#define CYREG_ITM_PID3 0xe0000fecu\r
-#define CYREG_ITM_CID0 0xe0000ff0u\r
-#define CYREG_ITM_CID1 0xe0000ff4u\r
-#define CYREG_ITM_CID2 0xe0000ff8u\r
-#define CYREG_ITM_CID3 0xe0000ffcu\r
-#define CYDEV_DWT_BASE 0xe0001000u\r
-#define CYDEV_DWT_SIZE 0x0000005cu\r
-#define CYREG_DWT_CTRL 0xe0001000u\r
-#define CYREG_DWT_CYCLE_COUNT 0xe0001004u\r
-#define CYREG_DWT_CPI_COUNT 0xe0001008u\r
-#define CYREG_DWT_EXC_OVHD_COUNT 0xe000100cu\r
-#define CYREG_DWT_SLEEP_COUNT 0xe0001010u\r
-#define CYREG_DWT_LSU_COUNT 0xe0001014u\r
-#define CYREG_DWT_FOLD_COUNT 0xe0001018u\r
-#define CYREG_DWT_PC_SAMPLE 0xe000101cu\r
-#define CYREG_DWT_COMP_0 0xe0001020u\r
-#define CYREG_DWT_MASK_0 0xe0001024u\r
-#define CYREG_DWT_FUNCTION_0 0xe0001028u\r
-#define CYREG_DWT_COMP_1 0xe0001030u\r
-#define CYREG_DWT_MASK_1 0xe0001034u\r
-#define CYREG_DWT_FUNCTION_1 0xe0001038u\r
-#define CYREG_DWT_COMP_2 0xe0001040u\r
-#define CYREG_DWT_MASK_2 0xe0001044u\r
-#define CYREG_DWT_FUNCTION_2 0xe0001048u\r
-#define CYREG_DWT_COMP_3 0xe0001050u\r
-#define CYREG_DWT_MASK_3 0xe0001054u\r
-#define CYREG_DWT_FUNCTION_3 0xe0001058u\r
-#define CYDEV_FPB_BASE 0xe0002000u\r
-#define CYDEV_FPB_SIZE 0x00001000u\r
-#define CYREG_FPB_CTRL 0xe0002000u\r
-#define CYREG_FPB_REMAP 0xe0002004u\r
-#define CYREG_FPB_FP_COMP_0 0xe0002008u\r
-#define CYREG_FPB_FP_COMP_1 0xe000200cu\r
-#define CYREG_FPB_FP_COMP_2 0xe0002010u\r
-#define CYREG_FPB_FP_COMP_3 0xe0002014u\r
-#define CYREG_FPB_FP_COMP_4 0xe0002018u\r
-#define CYREG_FPB_FP_COMP_5 0xe000201cu\r
-#define CYREG_FPB_FP_COMP_6 0xe0002020u\r
-#define CYREG_FPB_FP_COMP_7 0xe0002024u\r
-#define CYREG_FPB_PID4 0xe0002fd0u\r
-#define CYREG_FPB_PID5 0xe0002fd4u\r
-#define CYREG_FPB_PID6 0xe0002fd8u\r
-#define CYREG_FPB_PID7 0xe0002fdcu\r
-#define CYREG_FPB_PID0 0xe0002fe0u\r
-#define CYREG_FPB_PID1 0xe0002fe4u\r
-#define CYREG_FPB_PID2 0xe0002fe8u\r
-#define CYREG_FPB_PID3 0xe0002fecu\r
-#define CYREG_FPB_CID0 0xe0002ff0u\r
-#define CYREG_FPB_CID1 0xe0002ff4u\r
-#define CYREG_FPB_CID2 0xe0002ff8u\r
-#define CYREG_FPB_CID3 0xe0002ffcu\r
-#define CYDEV_NVIC_BASE 0xe000e000u\r
-#define CYDEV_NVIC_SIZE 0x00000d3cu\r
-#define CYREG_NVIC_INT_CTL_TYPE 0xe000e004u\r
-#define CYREG_NVIC_SYSTICK_CTL 0xe000e010u\r
-#define CYREG_NVIC_SYSTICK_RELOAD 0xe000e014u\r
-#define CYREG_NVIC_SYSTICK_CURRENT 0xe000e018u\r
-#define CYREG_NVIC_SYSTICK_CAL 0xe000e01cu\r
-#define CYREG_NVIC_SETENA0 0xe000e100u\r
-#define CYREG_NVIC_CLRENA0 0xe000e180u\r
-#define CYREG_NVIC_SETPEND0 0xe000e200u\r
-#define CYREG_NVIC_CLRPEND0 0xe000e280u\r
-#define CYREG_NVIC_ACTIVE0 0xe000e300u\r
-#define CYREG_NVIC_PRI_0 0xe000e400u\r
-#define CYREG_NVIC_PRI_1 0xe000e401u\r
-#define CYREG_NVIC_PRI_2 0xe000e402u\r
-#define CYREG_NVIC_PRI_3 0xe000e403u\r
-#define CYREG_NVIC_PRI_4 0xe000e404u\r
-#define CYREG_NVIC_PRI_5 0xe000e405u\r
-#define CYREG_NVIC_PRI_6 0xe000e406u\r
-#define CYREG_NVIC_PRI_7 0xe000e407u\r
-#define CYREG_NVIC_PRI_8 0xe000e408u\r
-#define CYREG_NVIC_PRI_9 0xe000e409u\r
-#define CYREG_NVIC_PRI_10 0xe000e40au\r
-#define CYREG_NVIC_PRI_11 0xe000e40bu\r
-#define CYREG_NVIC_PRI_12 0xe000e40cu\r
-#define CYREG_NVIC_PRI_13 0xe000e40du\r
-#define CYREG_NVIC_PRI_14 0xe000e40eu\r
-#define CYREG_NVIC_PRI_15 0xe000e40fu\r
-#define CYREG_NVIC_PRI_16 0xe000e410u\r
-#define CYREG_NVIC_PRI_17 0xe000e411u\r
-#define CYREG_NVIC_PRI_18 0xe000e412u\r
-#define CYREG_NVIC_PRI_19 0xe000e413u\r
-#define CYREG_NVIC_PRI_20 0xe000e414u\r
-#define CYREG_NVIC_PRI_21 0xe000e415u\r
-#define CYREG_NVIC_PRI_22 0xe000e416u\r
-#define CYREG_NVIC_PRI_23 0xe000e417u\r
-#define CYREG_NVIC_PRI_24 0xe000e418u\r
-#define CYREG_NVIC_PRI_25 0xe000e419u\r
-#define CYREG_NVIC_PRI_26 0xe000e41au\r
-#define CYREG_NVIC_PRI_27 0xe000e41bu\r
-#define CYREG_NVIC_PRI_28 0xe000e41cu\r
-#define CYREG_NVIC_PRI_29 0xe000e41du\r
-#define CYREG_NVIC_PRI_30 0xe000e41eu\r
-#define CYREG_NVIC_PRI_31 0xe000e41fu\r
-#define CYREG_NVIC_CPUID_BASE 0xe000ed00u\r
-#define CYREG_NVIC_INTR_CTRL_STATE 0xe000ed04u\r
-#define CYREG_NVIC_VECT_OFFSET 0xe000ed08u\r
-#define CYREG_NVIC_APPLN_INTR 0xe000ed0cu\r
-#define CYREG_NVIC_SYSTEM_CONTROL 0xe000ed10u\r
-#define CYREG_NVIC_CFG_CONTROL 0xe000ed14u\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_4_7 0xe000ed18u\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_8_11 0xe000ed1cu\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_12_15 0xe000ed20u\r
-#define CYREG_NVIC_SYS_HANDLER_CSR 0xe000ed24u\r
-#define CYREG_NVIC_MEMMAN_FAULT_STATUS 0xe000ed28u\r
-#define CYREG_NVIC_BUS_FAULT_STATUS 0xe000ed29u\r
-#define CYREG_NVIC_USAGE_FAULT_STATUS 0xe000ed2au\r
-#define CYREG_NVIC_HARD_FAULT_STATUS 0xe000ed2cu\r
-#define CYREG_NVIC_DEBUG_FAULT_STATUS 0xe000ed30u\r
-#define CYREG_NVIC_MEMMAN_FAULT_ADD 0xe000ed34u\r
-#define CYREG_NVIC_BUS_FAULT_ADD 0xe000ed38u\r
-#define CYDEV_CORE_DBG_BASE 0xe000edf0u\r
-#define CYDEV_CORE_DBG_SIZE 0x00000010u\r
-#define CYREG_CORE_DBG_DBG_HLT_CS 0xe000edf0u\r
-#define CYREG_CORE_DBG_DBG_REG_SEL 0xe000edf4u\r
-#define CYREG_CORE_DBG_DBG_REG_DATA 0xe000edf8u\r
-#define CYREG_CORE_DBG_EXC_MON_CTL 0xe000edfcu\r
-#define CYDEV_TPIU_BASE 0xe0040000u\r
-#define CYDEV_TPIU_SIZE 0x00001000u\r
-#define CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ 0xe0040000u\r
-#define CYREG_TPIU_CURRENT_SYNC_PRT_SZ 0xe0040004u\r
-#define CYREG_TPIU_ASYNC_CLK_PRESCALER 0xe0040010u\r
-#define CYREG_TPIU_PROTOCOL 0xe00400f0u\r
-#define CYREG_TPIU_FORM_FLUSH_STAT 0xe0040300u\r
-#define CYREG_TPIU_FORM_FLUSH_CTRL 0xe0040304u\r
-#define CYREG_TPIU_TRIGGER 0xe0040ee8u\r
-#define CYREG_TPIU_ITETMDATA 0xe0040eecu\r
-#define CYREG_TPIU_ITATBCTR2 0xe0040ef0u\r
-#define CYREG_TPIU_ITATBCTR0 0xe0040ef8u\r
-#define CYREG_TPIU_ITITMDATA 0xe0040efcu\r
-#define CYREG_TPIU_ITCTRL 0xe0040f00u\r
-#define CYREG_TPIU_DEVID 0xe0040fc8u\r
-#define CYREG_TPIU_DEVTYPE 0xe0040fccu\r
-#define CYREG_TPIU_PID4 0xe0040fd0u\r
-#define CYREG_TPIU_PID5 0xe0040fd4u\r
-#define CYREG_TPIU_PID6 0xe0040fd8u\r
-#define CYREG_TPIU_PID7 0xe0040fdcu\r
-#define CYREG_TPIU_PID0 0xe0040fe0u\r
-#define CYREG_TPIU_PID1 0xe0040fe4u\r
-#define CYREG_TPIU_PID2 0xe0040fe8u\r
-#define CYREG_TPIU_PID3 0xe0040fecu\r
-#define CYREG_TPIU_CID0 0xe0040ff0u\r
-#define CYREG_TPIU_CID1 0xe0040ff4u\r
-#define CYREG_TPIU_CID2 0xe0040ff8u\r
-#define CYREG_TPIU_CID3 0xe0040ffcu\r
-#define CYDEV_ETM_BASE 0xe0041000u\r
-#define CYDEV_ETM_SIZE 0x00001000u\r
-#define CYREG_ETM_CTL 0xe0041000u\r
-#define CYREG_ETM_CFG_CODE 0xe0041004u\r
-#define CYREG_ETM_TRIG_EVENT 0xe0041008u\r
-#define CYREG_ETM_STATUS 0xe0041010u\r
-#define CYREG_ETM_SYS_CFG 0xe0041014u\r
-#define CYREG_ETM_TRACE_ENB_EVENT 0xe0041020u\r
-#define CYREG_ETM_TRACE_EN_CTRL1 0xe0041024u\r
-#define CYREG_ETM_FIFOFULL_LEVEL 0xe004102cu\r
-#define CYREG_ETM_SYNC_FREQ 0xe00411e0u\r
-#define CYREG_ETM_ETM_ID 0xe00411e4u\r
-#define CYREG_ETM_CFG_CODE_EXT 0xe00411e8u\r
-#define CYREG_ETM_TR_SS_EMBICE_CTRL 0xe00411f0u\r
-#define CYREG_ETM_CS_TRACE_ID 0xe0041200u\r
-#define CYREG_ETM_OS_LOCK_ACCESS 0xe0041300u\r
-#define CYREG_ETM_OS_LOCK_STATUS 0xe0041304u\r
-#define CYREG_ETM_PDSR 0xe0041314u\r
-#define CYREG_ETM_ITMISCIN 0xe0041ee0u\r
-#define CYREG_ETM_ITTRIGOUT 0xe0041ee8u\r
-#define CYREG_ETM_ITATBCTR2 0xe0041ef0u\r
-#define CYREG_ETM_ITATBCTR0 0xe0041ef8u\r
-#define CYREG_ETM_INT_MODE_CTRL 0xe0041f00u\r
-#define CYREG_ETM_CLM_TAG_SET 0xe0041fa0u\r
-#define CYREG_ETM_CLM_TAG_CLR 0xe0041fa4u\r
-#define CYREG_ETM_LOCK_ACCESS 0xe0041fb0u\r
-#define CYREG_ETM_LOCK_STATUS 0xe0041fb4u\r
-#define CYREG_ETM_AUTH_STATUS 0xe0041fb8u\r
-#define CYREG_ETM_DEV_TYPE 0xe0041fccu\r
-#define CYREG_ETM_PID4 0xe0041fd0u\r
-#define CYREG_ETM_PID5 0xe0041fd4u\r
-#define CYREG_ETM_PID6 0xe0041fd8u\r
-#define CYREG_ETM_PID7 0xe0041fdcu\r
-#define CYREG_ETM_PID0 0xe0041fe0u\r
-#define CYREG_ETM_PID1 0xe0041fe4u\r
-#define CYREG_ETM_PID2 0xe0041fe8u\r
-#define CYREG_ETM_PID3 0xe0041fecu\r
-#define CYREG_ETM_CID0 0xe0041ff0u\r
-#define CYREG_ETM_CID1 0xe0041ff4u\r
-#define CYREG_ETM_CID2 0xe0041ff8u\r
-#define CYREG_ETM_CID3 0xe0041ffcu\r
-#define CYDEV_ROM_TABLE_BASE 0xe00ff000u\r
-#define CYDEV_ROM_TABLE_SIZE 0x00001000u\r
-#define CYREG_ROM_TABLE_NVIC 0xe00ff000u\r
-#define CYREG_ROM_TABLE_DWT 0xe00ff004u\r
-#define CYREG_ROM_TABLE_FPB 0xe00ff008u\r
-#define CYREG_ROM_TABLE_ITM 0xe00ff00cu\r
-#define CYREG_ROM_TABLE_TPIU 0xe00ff010u\r
-#define CYREG_ROM_TABLE_ETM 0xe00ff014u\r
-#define CYREG_ROM_TABLE_END 0xe00ff018u\r
-#define CYREG_ROM_TABLE_MEMTYPE 0xe00fffccu\r
-#define CYREG_ROM_TABLE_PID4 0xe00fffd0u\r
-#define CYREG_ROM_TABLE_PID5 0xe00fffd4u\r
-#define CYREG_ROM_TABLE_PID6 0xe00fffd8u\r
-#define CYREG_ROM_TABLE_PID7 0xe00fffdcu\r
-#define CYREG_ROM_TABLE_PID0 0xe00fffe0u\r
-#define CYREG_ROM_TABLE_PID1 0xe00fffe4u\r
-#define CYREG_ROM_TABLE_PID2 0xe00fffe8u\r
-#define CYREG_ROM_TABLE_PID3 0xe00fffecu\r
-#define CYREG_ROM_TABLE_CID0 0xe00ffff0u\r
-#define CYREG_ROM_TABLE_CID1 0xe00ffff4u\r
-#define CYREG_ROM_TABLE_CID2 0xe00ffff8u\r
-#define CYREG_ROM_TABLE_CID3 0xe00ffffcu\r
-#define CYDEV_FLS_SIZE CYDEV_FLASH_SIZE\r
-#define CYDEV_ECC_BASE CYDEV_FLSECC_BASE\r
-#define CYDEV_FLS_SECTOR_SIZE 0x00010000u\r
-#define CYDEV_FLS_ROW_SIZE 0x00000100u\r
-#define CYDEV_ECC_SECTOR_SIZE 0x00002000u\r
-#define CYDEV_ECC_ROW_SIZE 0x00000020u\r
-#define CYDEV_EEPROM_SECTOR_SIZE 0x00000400u\r
-#define CYDEV_EEPROM_ROW_SIZE 0x00000010u\r
-#define CYDEV_PERIPH_BASE CYDEV_CLKDIST_BASE\r
-#define CYCLK_LD_DISABLE 0x00000004u\r
-#define CYCLK_LD_SYNC_EN 0x00000002u\r
-#define CYCLK_LD_LOAD 0x00000001u\r
-#define CYCLK_PIPE 0x00000080u\r
-#define CYCLK_SSS 0x00000040u\r
-#define CYCLK_EARLY 0x00000020u\r
-#define CYCLK_DUTY 0x00000010u\r
-#define CYCLK_SYNC 0x00000008u\r
-#define CYCLK_SRC_SEL_CLK_SYNC_D 0\r
-#define CYCLK_SRC_SEL_SYNC_DIG 0\r
-#define CYCLK_SRC_SEL_IMO 1\r
-#define CYCLK_SRC_SEL_XTAL_MHZ 2\r
-#define CYCLK_SRC_SEL_XTALM 2\r
-#define CYCLK_SRC_SEL_ILO 3\r
-#define CYCLK_SRC_SEL_PLL 4\r
-#define CYCLK_SRC_SEL_XTAL_KHZ 5\r
-#define CYCLK_SRC_SEL_XTALK 5\r
-#define CYCLK_SRC_SEL_DSI_G 6\r
-#define CYCLK_SRC_SEL_DSI_D 7\r
-#define CYCLK_SRC_SEL_CLK_SYNC_A 0\r
-#define CYCLK_SRC_SEL_DSI_A 7\r
-#endif /* CYDEVICE_TRM_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu.inc
deleted file mode 100755 (executable)
index 1776ef9..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu.inc
+++ /dev/null
@@ -1,5357 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cydevicegnu.inc\r
-* OBSOLETE: Do not use this file. Use the _trm version instead.\r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* DESCRIPTION:\r
-* This file provides all of the address values for the entire PSoC device.\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-.set CYDEV_FLASH_BASE, 0x00000000\r
-.set CYDEV_FLASH_SIZE, 0x00020000\r
-.set CYDEV_FLASH_DATA_MBASE, 0x00000000\r
-.set CYDEV_FLASH_DATA_MSIZE, 0x00020000\r
-.set CYDEV_SRAM_BASE, 0x1fffc000\r
-.set CYDEV_SRAM_SIZE, 0x00008000\r
-.set CYDEV_SRAM_CODE64K_MBASE, 0x1fff8000\r
-.set CYDEV_SRAM_CODE64K_MSIZE, 0x00004000\r
-.set CYDEV_SRAM_CODE32K_MBASE, 0x1fffc000\r
-.set CYDEV_SRAM_CODE32K_MSIZE, 0x00002000\r
-.set CYDEV_SRAM_CODE16K_MBASE, 0x1fffe000\r
-.set CYDEV_SRAM_CODE16K_MSIZE, 0x00001000\r
-.set CYDEV_SRAM_CODE_MBASE, 0x1fffc000\r
-.set CYDEV_SRAM_CODE_MSIZE, 0x00004000\r
-.set CYDEV_SRAM_DATA_MBASE, 0x20000000\r
-.set CYDEV_SRAM_DATA_MSIZE, 0x00004000\r
-.set CYDEV_SRAM_DATA16K_MBASE, 0x20001000\r
-.set CYDEV_SRAM_DATA16K_MSIZE, 0x00001000\r
-.set CYDEV_SRAM_DATA32K_MBASE, 0x20002000\r
-.set CYDEV_SRAM_DATA32K_MSIZE, 0x00002000\r
-.set CYDEV_SRAM_DATA64K_MBASE, 0x20004000\r
-.set CYDEV_SRAM_DATA64K_MSIZE, 0x00004000\r
-.set CYDEV_DMA_BASE, 0x20008000\r
-.set CYDEV_DMA_SIZE, 0x00008000\r
-.set CYDEV_DMA_SRAM64K_MBASE, 0x20008000\r
-.set CYDEV_DMA_SRAM64K_MSIZE, 0x00004000\r
-.set CYDEV_DMA_SRAM32K_MBASE, 0x2000c000\r
-.set CYDEV_DMA_SRAM32K_MSIZE, 0x00002000\r
-.set CYDEV_DMA_SRAM16K_MBASE, 0x2000e000\r
-.set CYDEV_DMA_SRAM16K_MSIZE, 0x00001000\r
-.set CYDEV_DMA_SRAM_MBASE, 0x2000f000\r
-.set CYDEV_DMA_SRAM_MSIZE, 0x00001000\r
-.set CYDEV_CLKDIST_BASE, 0x40004000\r
-.set CYDEV_CLKDIST_SIZE, 0x00000110\r
-.set CYDEV_CLKDIST_CR, 0x40004000\r
-.set CYDEV_CLKDIST_LD, 0x40004001\r
-.set CYDEV_CLKDIST_WRK0, 0x40004002\r
-.set CYDEV_CLKDIST_WRK1, 0x40004003\r
-.set CYDEV_CLKDIST_MSTR0, 0x40004004\r
-.set CYDEV_CLKDIST_MSTR1, 0x40004005\r
-.set CYDEV_CLKDIST_BCFG0, 0x40004006\r
-.set CYDEV_CLKDIST_BCFG1, 0x40004007\r
-.set CYDEV_CLKDIST_BCFG2, 0x40004008\r
-.set CYDEV_CLKDIST_UCFG, 0x40004009\r
-.set CYDEV_CLKDIST_DLY0, 0x4000400a\r
-.set CYDEV_CLKDIST_DLY1, 0x4000400b\r
-.set CYDEV_CLKDIST_DMASK, 0x40004010\r
-.set CYDEV_CLKDIST_AMASK, 0x40004014\r
-.set CYDEV_CLKDIST_DCFG0_BASE, 0x40004080\r
-.set CYDEV_CLKDIST_DCFG0_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG0_CFG0, 0x40004080\r
-.set CYDEV_CLKDIST_DCFG0_CFG1, 0x40004081\r
-.set CYDEV_CLKDIST_DCFG0_CFG2, 0x40004082\r
-.set CYDEV_CLKDIST_DCFG1_BASE, 0x40004084\r
-.set CYDEV_CLKDIST_DCFG1_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG1_CFG0, 0x40004084\r
-.set CYDEV_CLKDIST_DCFG1_CFG1, 0x40004085\r
-.set CYDEV_CLKDIST_DCFG1_CFG2, 0x40004086\r
-.set CYDEV_CLKDIST_DCFG2_BASE, 0x40004088\r
-.set CYDEV_CLKDIST_DCFG2_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG2_CFG0, 0x40004088\r
-.set CYDEV_CLKDIST_DCFG2_CFG1, 0x40004089\r
-.set CYDEV_CLKDIST_DCFG2_CFG2, 0x4000408a\r
-.set CYDEV_CLKDIST_DCFG3_BASE, 0x4000408c\r
-.set CYDEV_CLKDIST_DCFG3_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG3_CFG0, 0x4000408c\r
-.set CYDEV_CLKDIST_DCFG3_CFG1, 0x4000408d\r
-.set CYDEV_CLKDIST_DCFG3_CFG2, 0x4000408e\r
-.set CYDEV_CLKDIST_DCFG4_BASE, 0x40004090\r
-.set CYDEV_CLKDIST_DCFG4_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG4_CFG0, 0x40004090\r
-.set CYDEV_CLKDIST_DCFG4_CFG1, 0x40004091\r
-.set CYDEV_CLKDIST_DCFG4_CFG2, 0x40004092\r
-.set CYDEV_CLKDIST_DCFG5_BASE, 0x40004094\r
-.set CYDEV_CLKDIST_DCFG5_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG5_CFG0, 0x40004094\r
-.set CYDEV_CLKDIST_DCFG5_CFG1, 0x40004095\r
-.set CYDEV_CLKDIST_DCFG5_CFG2, 0x40004096\r
-.set CYDEV_CLKDIST_DCFG6_BASE, 0x40004098\r
-.set CYDEV_CLKDIST_DCFG6_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG6_CFG0, 0x40004098\r
-.set CYDEV_CLKDIST_DCFG6_CFG1, 0x40004099\r
-.set CYDEV_CLKDIST_DCFG6_CFG2, 0x4000409a\r
-.set CYDEV_CLKDIST_DCFG7_BASE, 0x4000409c\r
-.set CYDEV_CLKDIST_DCFG7_SIZE, 0x00000003\r
-.set CYDEV_CLKDIST_DCFG7_CFG0, 0x4000409c\r
-.set CYDEV_CLKDIST_DCFG7_CFG1, 0x4000409d\r
-.set CYDEV_CLKDIST_DCFG7_CFG2, 0x4000409e\r
-.set CYDEV_CLKDIST_ACFG0_BASE, 0x40004100\r
-.set CYDEV_CLKDIST_ACFG0_SIZE, 0x00000004\r
-.set CYDEV_CLKDIST_ACFG0_CFG0, 0x40004100\r
-.set CYDEV_CLKDIST_ACFG0_CFG1, 0x40004101\r
-.set CYDEV_CLKDIST_ACFG0_CFG2, 0x40004102\r
-.set CYDEV_CLKDIST_ACFG0_CFG3, 0x40004103\r
-.set CYDEV_CLKDIST_ACFG1_BASE, 0x40004104\r
-.set CYDEV_CLKDIST_ACFG1_SIZE, 0x00000004\r
-.set CYDEV_CLKDIST_ACFG1_CFG0, 0x40004104\r
-.set CYDEV_CLKDIST_ACFG1_CFG1, 0x40004105\r
-.set CYDEV_CLKDIST_ACFG1_CFG2, 0x40004106\r
-.set CYDEV_CLKDIST_ACFG1_CFG3, 0x40004107\r
-.set CYDEV_CLKDIST_ACFG2_BASE, 0x40004108\r
-.set CYDEV_CLKDIST_ACFG2_SIZE, 0x00000004\r
-.set CYDEV_CLKDIST_ACFG2_CFG0, 0x40004108\r
-.set CYDEV_CLKDIST_ACFG2_CFG1, 0x40004109\r
-.set CYDEV_CLKDIST_ACFG2_CFG2, 0x4000410a\r
-.set CYDEV_CLKDIST_ACFG2_CFG3, 0x4000410b\r
-.set CYDEV_CLKDIST_ACFG3_BASE, 0x4000410c\r
-.set CYDEV_CLKDIST_ACFG3_SIZE, 0x00000004\r
-.set CYDEV_CLKDIST_ACFG3_CFG0, 0x4000410c\r
-.set CYDEV_CLKDIST_ACFG3_CFG1, 0x4000410d\r
-.set CYDEV_CLKDIST_ACFG3_CFG2, 0x4000410e\r
-.set CYDEV_CLKDIST_ACFG3_CFG3, 0x4000410f\r
-.set CYDEV_FASTCLK_BASE, 0x40004200\r
-.set CYDEV_FASTCLK_SIZE, 0x00000026\r
-.set CYDEV_FASTCLK_IMO_BASE, 0x40004200\r
-.set CYDEV_FASTCLK_IMO_SIZE, 0x00000001\r
-.set CYDEV_FASTCLK_IMO_CR, 0x40004200\r
-.set CYDEV_FASTCLK_XMHZ_BASE, 0x40004210\r
-.set CYDEV_FASTCLK_XMHZ_SIZE, 0x00000004\r
-.set CYDEV_FASTCLK_XMHZ_CSR, 0x40004210\r
-.set CYDEV_FASTCLK_XMHZ_CFG0, 0x40004212\r
-.set CYDEV_FASTCLK_XMHZ_CFG1, 0x40004213\r
-.set CYDEV_FASTCLK_PLL_BASE, 0x40004220\r
-.set CYDEV_FASTCLK_PLL_SIZE, 0x00000006\r
-.set CYDEV_FASTCLK_PLL_CFG0, 0x40004220\r
-.set CYDEV_FASTCLK_PLL_CFG1, 0x40004221\r
-.set CYDEV_FASTCLK_PLL_P, 0x40004222\r
-.set CYDEV_FASTCLK_PLL_Q, 0x40004223\r
-.set CYDEV_FASTCLK_PLL_SR, 0x40004225\r
-.set CYDEV_SLOWCLK_BASE, 0x40004300\r
-.set CYDEV_SLOWCLK_SIZE, 0x0000000b\r
-.set CYDEV_SLOWCLK_ILO_BASE, 0x40004300\r
-.set CYDEV_SLOWCLK_ILO_SIZE, 0x00000002\r
-.set CYDEV_SLOWCLK_ILO_CR0, 0x40004300\r
-.set CYDEV_SLOWCLK_ILO_CR1, 0x40004301\r
-.set CYDEV_SLOWCLK_X32_BASE, 0x40004308\r
-.set CYDEV_SLOWCLK_X32_SIZE, 0x00000003\r
-.set CYDEV_SLOWCLK_X32_CR, 0x40004308\r
-.set CYDEV_SLOWCLK_X32_CFG, 0x40004309\r
-.set CYDEV_SLOWCLK_X32_TST, 0x4000430a\r
-.set CYDEV_BOOST_BASE, 0x40004320\r
-.set CYDEV_BOOST_SIZE, 0x00000007\r
-.set CYDEV_BOOST_CR0, 0x40004320\r
-.set CYDEV_BOOST_CR1, 0x40004321\r
-.set CYDEV_BOOST_CR2, 0x40004322\r
-.set CYDEV_BOOST_CR3, 0x40004323\r
-.set CYDEV_BOOST_SR, 0x40004324\r
-.set CYDEV_BOOST_CR4, 0x40004325\r
-.set CYDEV_BOOST_SR2, 0x40004326\r
-.set CYDEV_PWRSYS_BASE, 0x40004330\r
-.set CYDEV_PWRSYS_SIZE, 0x00000002\r
-.set CYDEV_PWRSYS_CR0, 0x40004330\r
-.set CYDEV_PWRSYS_CR1, 0x40004331\r
-.set CYDEV_PM_BASE, 0x40004380\r
-.set CYDEV_PM_SIZE, 0x00000057\r
-.set CYDEV_PM_TW_CFG0, 0x40004380\r
-.set CYDEV_PM_TW_CFG1, 0x40004381\r
-.set CYDEV_PM_TW_CFG2, 0x40004382\r
-.set CYDEV_PM_WDT_CFG, 0x40004383\r
-.set CYDEV_PM_WDT_CR, 0x40004384\r
-.set CYDEV_PM_INT_SR, 0x40004390\r
-.set CYDEV_PM_MODE_CFG0, 0x40004391\r
-.set CYDEV_PM_MODE_CFG1, 0x40004392\r
-.set CYDEV_PM_MODE_CSR, 0x40004393\r
-.set CYDEV_PM_USB_CR0, 0x40004394\r
-.set CYDEV_PM_WAKEUP_CFG0, 0x40004398\r
-.set CYDEV_PM_WAKEUP_CFG1, 0x40004399\r
-.set CYDEV_PM_WAKEUP_CFG2, 0x4000439a\r
-.set CYDEV_PM_ACT_BASE, 0x400043a0\r
-.set CYDEV_PM_ACT_SIZE, 0x0000000e\r
-.set CYDEV_PM_ACT_CFG0, 0x400043a0\r
-.set CYDEV_PM_ACT_CFG1, 0x400043a1\r
-.set CYDEV_PM_ACT_CFG2, 0x400043a2\r
-.set CYDEV_PM_ACT_CFG3, 0x400043a3\r
-.set CYDEV_PM_ACT_CFG4, 0x400043a4\r
-.set CYDEV_PM_ACT_CFG5, 0x400043a5\r
-.set CYDEV_PM_ACT_CFG6, 0x400043a6\r
-.set CYDEV_PM_ACT_CFG7, 0x400043a7\r
-.set CYDEV_PM_ACT_CFG8, 0x400043a8\r
-.set CYDEV_PM_ACT_CFG9, 0x400043a9\r
-.set CYDEV_PM_ACT_CFG10, 0x400043aa\r
-.set CYDEV_PM_ACT_CFG11, 0x400043ab\r
-.set CYDEV_PM_ACT_CFG12, 0x400043ac\r
-.set CYDEV_PM_ACT_CFG13, 0x400043ad\r
-.set CYDEV_PM_STBY_BASE, 0x400043b0\r
-.set CYDEV_PM_STBY_SIZE, 0x0000000e\r
-.set CYDEV_PM_STBY_CFG0, 0x400043b0\r
-.set CYDEV_PM_STBY_CFG1, 0x400043b1\r
-.set CYDEV_PM_STBY_CFG2, 0x400043b2\r
-.set CYDEV_PM_STBY_CFG3, 0x400043b3\r
-.set CYDEV_PM_STBY_CFG4, 0x400043b4\r
-.set CYDEV_PM_STBY_CFG5, 0x400043b5\r
-.set CYDEV_PM_STBY_CFG6, 0x400043b6\r
-.set CYDEV_PM_STBY_CFG7, 0x400043b7\r
-.set CYDEV_PM_STBY_CFG8, 0x400043b8\r
-.set CYDEV_PM_STBY_CFG9, 0x400043b9\r
-.set CYDEV_PM_STBY_CFG10, 0x400043ba\r
-.set CYDEV_PM_STBY_CFG11, 0x400043bb\r
-.set CYDEV_PM_STBY_CFG12, 0x400043bc\r
-.set CYDEV_PM_STBY_CFG13, 0x400043bd\r
-.set CYDEV_PM_AVAIL_BASE, 0x400043c0\r
-.set CYDEV_PM_AVAIL_SIZE, 0x00000017\r
-.set CYDEV_PM_AVAIL_CR0, 0x400043c0\r
-.set CYDEV_PM_AVAIL_CR1, 0x400043c1\r
-.set CYDEV_PM_AVAIL_CR2, 0x400043c2\r
-.set CYDEV_PM_AVAIL_CR3, 0x400043c3\r
-.set CYDEV_PM_AVAIL_CR4, 0x400043c4\r
-.set CYDEV_PM_AVAIL_CR5, 0x400043c5\r
-.set CYDEV_PM_AVAIL_CR6, 0x400043c6\r
-.set CYDEV_PM_AVAIL_SR0, 0x400043d0\r
-.set CYDEV_PM_AVAIL_SR1, 0x400043d1\r
-.set CYDEV_PM_AVAIL_SR2, 0x400043d2\r
-.set CYDEV_PM_AVAIL_SR3, 0x400043d3\r
-.set CYDEV_PM_AVAIL_SR4, 0x400043d4\r
-.set CYDEV_PM_AVAIL_SR5, 0x400043d5\r
-.set CYDEV_PM_AVAIL_SR6, 0x400043d6\r
-.set CYDEV_PICU_BASE, 0x40004500\r
-.set CYDEV_PICU_SIZE, 0x000000b0\r
-.set CYDEV_PICU_INTTYPE_BASE, 0x40004500\r
-.set CYDEV_PICU_INTTYPE_SIZE, 0x00000080\r
-.set CYDEV_PICU_INTTYPE_PICU0_BASE, 0x40004500\r
-.set CYDEV_PICU_INTTYPE_PICU0_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE0, 0x40004500\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE1, 0x40004501\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE2, 0x40004502\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE3, 0x40004503\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE4, 0x40004504\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE5, 0x40004505\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE6, 0x40004506\r
-.set CYDEV_PICU_INTTYPE_PICU0_INTTYPE7, 0x40004507\r
-.set CYDEV_PICU_INTTYPE_PICU1_BASE, 0x40004508\r
-.set CYDEV_PICU_INTTYPE_PICU1_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE0, 0x40004508\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE1, 0x40004509\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE2, 0x4000450a\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE3, 0x4000450b\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE4, 0x4000450c\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE5, 0x4000450d\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE6, 0x4000450e\r
-.set CYDEV_PICU_INTTYPE_PICU1_INTTYPE7, 0x4000450f\r
-.set CYDEV_PICU_INTTYPE_PICU2_BASE, 0x40004510\r
-.set CYDEV_PICU_INTTYPE_PICU2_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE0, 0x40004510\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE1, 0x40004511\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE2, 0x40004512\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE3, 0x40004513\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE4, 0x40004514\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE5, 0x40004515\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE6, 0x40004516\r
-.set CYDEV_PICU_INTTYPE_PICU2_INTTYPE7, 0x40004517\r
-.set CYDEV_PICU_INTTYPE_PICU3_BASE, 0x40004518\r
-.set CYDEV_PICU_INTTYPE_PICU3_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE0, 0x40004518\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE1, 0x40004519\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE2, 0x4000451a\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE3, 0x4000451b\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE4, 0x4000451c\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE5, 0x4000451d\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE6, 0x4000451e\r
-.set CYDEV_PICU_INTTYPE_PICU3_INTTYPE7, 0x4000451f\r
-.set CYDEV_PICU_INTTYPE_PICU4_BASE, 0x40004520\r
-.set CYDEV_PICU_INTTYPE_PICU4_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE0, 0x40004520\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE1, 0x40004521\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE2, 0x40004522\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE3, 0x40004523\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE4, 0x40004524\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE5, 0x40004525\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE6, 0x40004526\r
-.set CYDEV_PICU_INTTYPE_PICU4_INTTYPE7, 0x40004527\r
-.set CYDEV_PICU_INTTYPE_PICU5_BASE, 0x40004528\r
-.set CYDEV_PICU_INTTYPE_PICU5_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE0, 0x40004528\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE1, 0x40004529\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE2, 0x4000452a\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE3, 0x4000452b\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE4, 0x4000452c\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE5, 0x4000452d\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE6, 0x4000452e\r
-.set CYDEV_PICU_INTTYPE_PICU5_INTTYPE7, 0x4000452f\r
-.set CYDEV_PICU_INTTYPE_PICU6_BASE, 0x40004530\r
-.set CYDEV_PICU_INTTYPE_PICU6_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE0, 0x40004530\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE1, 0x40004531\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE2, 0x40004532\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE3, 0x40004533\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE4, 0x40004534\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE5, 0x40004535\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE6, 0x40004536\r
-.set CYDEV_PICU_INTTYPE_PICU6_INTTYPE7, 0x40004537\r
-.set CYDEV_PICU_INTTYPE_PICU12_BASE, 0x40004560\r
-.set CYDEV_PICU_INTTYPE_PICU12_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE0, 0x40004560\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE1, 0x40004561\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE2, 0x40004562\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE3, 0x40004563\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE4, 0x40004564\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE5, 0x40004565\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE6, 0x40004566\r
-.set CYDEV_PICU_INTTYPE_PICU12_INTTYPE7, 0x40004567\r
-.set CYDEV_PICU_INTTYPE_PICU15_BASE, 0x40004578\r
-.set CYDEV_PICU_INTTYPE_PICU15_SIZE, 0x00000008\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE0, 0x40004578\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE1, 0x40004579\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE2, 0x4000457a\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE3, 0x4000457b\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE4, 0x4000457c\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE5, 0x4000457d\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE6, 0x4000457e\r
-.set CYDEV_PICU_INTTYPE_PICU15_INTTYPE7, 0x4000457f\r
-.set CYDEV_PICU_STAT_BASE, 0x40004580\r
-.set CYDEV_PICU_STAT_SIZE, 0x00000010\r
-.set CYDEV_PICU_STAT_PICU0_BASE, 0x40004580\r
-.set CYDEV_PICU_STAT_PICU0_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU0_INTSTAT, 0x40004580\r
-.set CYDEV_PICU_STAT_PICU1_BASE, 0x40004581\r
-.set CYDEV_PICU_STAT_PICU1_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU1_INTSTAT, 0x40004581\r
-.set CYDEV_PICU_STAT_PICU2_BASE, 0x40004582\r
-.set CYDEV_PICU_STAT_PICU2_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU2_INTSTAT, 0x40004582\r
-.set CYDEV_PICU_STAT_PICU3_BASE, 0x40004583\r
-.set CYDEV_PICU_STAT_PICU3_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU3_INTSTAT, 0x40004583\r
-.set CYDEV_PICU_STAT_PICU4_BASE, 0x40004584\r
-.set CYDEV_PICU_STAT_PICU4_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU4_INTSTAT, 0x40004584\r
-.set CYDEV_PICU_STAT_PICU5_BASE, 0x40004585\r
-.set CYDEV_PICU_STAT_PICU5_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU5_INTSTAT, 0x40004585\r
-.set CYDEV_PICU_STAT_PICU6_BASE, 0x40004586\r
-.set CYDEV_PICU_STAT_PICU6_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU6_INTSTAT, 0x40004586\r
-.set CYDEV_PICU_STAT_PICU12_BASE, 0x4000458c\r
-.set CYDEV_PICU_STAT_PICU12_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU12_INTSTAT, 0x4000458c\r
-.set CYDEV_PICU_STAT_PICU15_BASE, 0x4000458f\r
-.set CYDEV_PICU_STAT_PICU15_SIZE, 0x00000001\r
-.set CYDEV_PICU_STAT_PICU15_INTSTAT, 0x4000458f\r
-.set CYDEV_PICU_SNAP_BASE, 0x40004590\r
-.set CYDEV_PICU_SNAP_SIZE, 0x00000010\r
-.set CYDEV_PICU_SNAP_PICU0_BASE, 0x40004590\r
-.set CYDEV_PICU_SNAP_PICU0_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU0_SNAP, 0x40004590\r
-.set CYDEV_PICU_SNAP_PICU1_BASE, 0x40004591\r
-.set CYDEV_PICU_SNAP_PICU1_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU1_SNAP, 0x40004591\r
-.set CYDEV_PICU_SNAP_PICU2_BASE, 0x40004592\r
-.set CYDEV_PICU_SNAP_PICU2_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU2_SNAP, 0x40004592\r
-.set CYDEV_PICU_SNAP_PICU3_BASE, 0x40004593\r
-.set CYDEV_PICU_SNAP_PICU3_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU3_SNAP, 0x40004593\r
-.set CYDEV_PICU_SNAP_PICU4_BASE, 0x40004594\r
-.set CYDEV_PICU_SNAP_PICU4_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU4_SNAP, 0x40004594\r
-.set CYDEV_PICU_SNAP_PICU5_BASE, 0x40004595\r
-.set CYDEV_PICU_SNAP_PICU5_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU5_SNAP, 0x40004595\r
-.set CYDEV_PICU_SNAP_PICU6_BASE, 0x40004596\r
-.set CYDEV_PICU_SNAP_PICU6_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU6_SNAP, 0x40004596\r
-.set CYDEV_PICU_SNAP_PICU12_BASE, 0x4000459c\r
-.set CYDEV_PICU_SNAP_PICU12_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU12_SNAP, 0x4000459c\r
-.set CYDEV_PICU_SNAP_PICU_15_BASE, 0x4000459f\r
-.set CYDEV_PICU_SNAP_PICU_15_SIZE, 0x00000001\r
-.set CYDEV_PICU_SNAP_PICU_15_SNAP_15, 0x4000459f\r
-.set CYDEV_PICU_DISABLE_COR_BASE, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_SIZE, 0x00000010\r
-.set CYDEV_PICU_DISABLE_COR_PICU0_BASE, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_PICU0_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_PICU1_BASE, 0x400045a1\r
-.set CYDEV_PICU_DISABLE_COR_PICU1_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR, 0x400045a1\r
-.set CYDEV_PICU_DISABLE_COR_PICU2_BASE, 0x400045a2\r
-.set CYDEV_PICU_DISABLE_COR_PICU2_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR, 0x400045a2\r
-.set CYDEV_PICU_DISABLE_COR_PICU3_BASE, 0x400045a3\r
-.set CYDEV_PICU_DISABLE_COR_PICU3_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR, 0x400045a3\r
-.set CYDEV_PICU_DISABLE_COR_PICU4_BASE, 0x400045a4\r
-.set CYDEV_PICU_DISABLE_COR_PICU4_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR, 0x400045a4\r
-.set CYDEV_PICU_DISABLE_COR_PICU5_BASE, 0x400045a5\r
-.set CYDEV_PICU_DISABLE_COR_PICU5_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR, 0x400045a5\r
-.set CYDEV_PICU_DISABLE_COR_PICU6_BASE, 0x400045a6\r
-.set CYDEV_PICU_DISABLE_COR_PICU6_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR, 0x400045a6\r
-.set CYDEV_PICU_DISABLE_COR_PICU12_BASE, 0x400045ac\r
-.set CYDEV_PICU_DISABLE_COR_PICU12_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR, 0x400045ac\r
-.set CYDEV_PICU_DISABLE_COR_PICU15_BASE, 0x400045af\r
-.set CYDEV_PICU_DISABLE_COR_PICU15_SIZE, 0x00000001\r
-.set CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR, 0x400045af\r
-.set CYDEV_MFGCFG_BASE, 0x40004600\r
-.set CYDEV_MFGCFG_SIZE, 0x000000ed\r
-.set CYDEV_MFGCFG_ANAIF_BASE, 0x40004600\r
-.set CYDEV_MFGCFG_ANAIF_SIZE, 0x00000038\r
-.set CYDEV_MFGCFG_ANAIF_DAC0_BASE, 0x40004608\r
-.set CYDEV_MFGCFG_ANAIF_DAC0_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_DAC0_TR, 0x40004608\r
-.set CYDEV_MFGCFG_ANAIF_DAC1_BASE, 0x40004609\r
-.set CYDEV_MFGCFG_ANAIF_DAC1_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_DAC1_TR, 0x40004609\r
-.set CYDEV_MFGCFG_ANAIF_DAC2_BASE, 0x4000460a\r
-.set CYDEV_MFGCFG_ANAIF_DAC2_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_DAC2_TR, 0x4000460a\r
-.set CYDEV_MFGCFG_ANAIF_DAC3_BASE, 0x4000460b\r
-.set CYDEV_MFGCFG_ANAIF_DAC3_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_DAC3_TR, 0x4000460b\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE, 0x40004610\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0, 0x40004610\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE, 0x40004611\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0, 0x40004611\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE, 0x40004612\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0, 0x40004612\r
-.set CYDEV_MFGCFG_ANAIF_SAR0_BASE, 0x40004614\r
-.set CYDEV_MFGCFG_ANAIF_SAR0_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_SAR0_TR0, 0x40004614\r
-.set CYDEV_MFGCFG_ANAIF_SAR1_BASE, 0x40004616\r
-.set CYDEV_MFGCFG_ANAIF_SAR1_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_ANAIF_SAR1_TR0, 0x40004616\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_BASE, 0x40004620\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_TR0, 0x40004620\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_TR1, 0x40004621\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_BASE, 0x40004622\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_TR0, 0x40004622\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_TR1, 0x40004623\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_BASE, 0x40004624\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_TR0, 0x40004624\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_TR1, 0x40004625\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_BASE, 0x40004626\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_TR0, 0x40004626\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_TR1, 0x40004627\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_BASE, 0x40004630\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_TR0, 0x40004630\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_TR1, 0x40004631\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_BASE, 0x40004632\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_TR0, 0x40004632\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_TR1, 0x40004633\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_BASE, 0x40004634\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_TR0, 0x40004634\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_TR1, 0x40004635\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_BASE, 0x40004636\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_TR0, 0x40004636\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_TR1, 0x40004637\r
-.set CYDEV_MFGCFG_PWRSYS_BASE, 0x40004680\r
-.set CYDEV_MFGCFG_PWRSYS_SIZE, 0x0000000b\r
-.set CYDEV_MFGCFG_PWRSYS_HIB_TR0, 0x40004680\r
-.set CYDEV_MFGCFG_PWRSYS_HIB_TR1, 0x40004681\r
-.set CYDEV_MFGCFG_PWRSYS_I2C_TR, 0x40004682\r
-.set CYDEV_MFGCFG_PWRSYS_SLP_TR, 0x40004683\r
-.set CYDEV_MFGCFG_PWRSYS_BUZZ_TR, 0x40004684\r
-.set CYDEV_MFGCFG_PWRSYS_WAKE_TR0, 0x40004685\r
-.set CYDEV_MFGCFG_PWRSYS_WAKE_TR1, 0x40004686\r
-.set CYDEV_MFGCFG_PWRSYS_BREF_TR, 0x40004687\r
-.set CYDEV_MFGCFG_PWRSYS_BG_TR, 0x40004688\r
-.set CYDEV_MFGCFG_PWRSYS_WAKE_TR2, 0x40004689\r
-.set CYDEV_MFGCFG_PWRSYS_WAKE_TR3, 0x4000468a\r
-.set CYDEV_MFGCFG_ILO_BASE, 0x40004690\r
-.set CYDEV_MFGCFG_ILO_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_ILO_TR0, 0x40004690\r
-.set CYDEV_MFGCFG_ILO_TR1, 0x40004691\r
-.set CYDEV_MFGCFG_X32_BASE, 0x40004698\r
-.set CYDEV_MFGCFG_X32_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_X32_TR, 0x40004698\r
-.set CYDEV_MFGCFG_IMO_BASE, 0x400046a0\r
-.set CYDEV_MFGCFG_IMO_SIZE, 0x00000005\r
-.set CYDEV_MFGCFG_IMO_TR0, 0x400046a0\r
-.set CYDEV_MFGCFG_IMO_TR1, 0x400046a1\r
-.set CYDEV_MFGCFG_IMO_GAIN, 0x400046a2\r
-.set CYDEV_MFGCFG_IMO_C36M, 0x400046a3\r
-.set CYDEV_MFGCFG_IMO_TR2, 0x400046a4\r
-.set CYDEV_MFGCFG_XMHZ_BASE, 0x400046a8\r
-.set CYDEV_MFGCFG_XMHZ_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_XMHZ_TR, 0x400046a8\r
-.set CYDEV_MFGCFG_DLY, 0x400046c0\r
-.set CYDEV_MFGCFG_MLOGIC_BASE, 0x400046e0\r
-.set CYDEV_MFGCFG_MLOGIC_SIZE, 0x0000000d\r
-.set CYDEV_MFGCFG_MLOGIC_DMPSTR, 0x400046e2\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_BASE, 0x400046e4\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_SIZE, 0x00000002\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_CR, 0x400046e4\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_CFG0, 0x400046e5\r
-.set CYDEV_MFGCFG_MLOGIC_DEBUG, 0x400046e8\r
-.set CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE, 0x400046ea\r
-.set CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE, 0x00000001\r
-.set CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR, 0x400046ea\r
-.set CYDEV_MFGCFG_MLOGIC_REV_ID, 0x400046ec\r
-.set CYDEV_RESET_BASE, 0x400046f0\r
-.set CYDEV_RESET_SIZE, 0x0000000f\r
-.set CYDEV_RESET_IPOR_CR0, 0x400046f0\r
-.set CYDEV_RESET_IPOR_CR1, 0x400046f1\r
-.set CYDEV_RESET_IPOR_CR2, 0x400046f2\r
-.set CYDEV_RESET_IPOR_CR3, 0x400046f3\r
-.set CYDEV_RESET_CR0, 0x400046f4\r
-.set CYDEV_RESET_CR1, 0x400046f5\r
-.set CYDEV_RESET_CR2, 0x400046f6\r
-.set CYDEV_RESET_CR3, 0x400046f7\r
-.set CYDEV_RESET_CR4, 0x400046f8\r
-.set CYDEV_RESET_CR5, 0x400046f9\r
-.set CYDEV_RESET_SR0, 0x400046fa\r
-.set CYDEV_RESET_SR1, 0x400046fb\r
-.set CYDEV_RESET_SR2, 0x400046fc\r
-.set CYDEV_RESET_SR3, 0x400046fd\r
-.set CYDEV_RESET_TR, 0x400046fe\r
-.set CYDEV_SPC_BASE, 0x40004700\r
-.set CYDEV_SPC_SIZE, 0x00000100\r
-.set CYDEV_SPC_FM_EE_CR, 0x40004700\r
-.set CYDEV_SPC_FM_EE_WAKE_CNT, 0x40004701\r
-.set CYDEV_SPC_EE_SCR, 0x40004702\r
-.set CYDEV_SPC_EE_ERR, 0x40004703\r
-.set CYDEV_SPC_CPU_DATA, 0x40004720\r
-.set CYDEV_SPC_DMA_DATA, 0x40004721\r
-.set CYDEV_SPC_SR, 0x40004722\r
-.set CYDEV_SPC_CR, 0x40004723\r
-.set CYDEV_SPC_DMM_MAP_BASE, 0x40004780\r
-.set CYDEV_SPC_DMM_MAP_SIZE, 0x00000080\r
-.set CYDEV_SPC_DMM_MAP_SRAM_MBASE, 0x40004780\r
-.set CYDEV_SPC_DMM_MAP_SRAM_MSIZE, 0x00000080\r
-.set CYDEV_CACHE_BASE, 0x40004800\r
-.set CYDEV_CACHE_SIZE, 0x0000009c\r
-.set CYDEV_CACHE_CC_CTL, 0x40004800\r
-.set CYDEV_CACHE_ECC_CORR, 0x40004880\r
-.set CYDEV_CACHE_ECC_ERR, 0x40004888\r
-.set CYDEV_CACHE_FLASH_ERR, 0x40004890\r
-.set CYDEV_CACHE_HITMISS, 0x40004898\r
-.set CYDEV_I2C_BASE, 0x40004900\r
-.set CYDEV_I2C_SIZE, 0x000000e1\r
-.set CYDEV_I2C_XCFG, 0x400049c8\r
-.set CYDEV_I2C_ADR, 0x400049ca\r
-.set CYDEV_I2C_CFG, 0x400049d6\r
-.set CYDEV_I2C_CSR, 0x400049d7\r
-.set CYDEV_I2C_D, 0x400049d8\r
-.set CYDEV_I2C_MCSR, 0x400049d9\r
-.set CYDEV_I2C_CLK_DIV1, 0x400049db\r
-.set CYDEV_I2C_CLK_DIV2, 0x400049dc\r
-.set CYDEV_I2C_TMOUT_CSR, 0x400049dd\r
-.set CYDEV_I2C_TMOUT_SR, 0x400049de\r
-.set CYDEV_I2C_TMOUT_CFG0, 0x400049df\r
-.set CYDEV_I2C_TMOUT_CFG1, 0x400049e0\r
-.set CYDEV_DEC_BASE, 0x40004e00\r
-.set CYDEV_DEC_SIZE, 0x00000015\r
-.set CYDEV_DEC_CR, 0x40004e00\r
-.set CYDEV_DEC_SR, 0x40004e01\r
-.set CYDEV_DEC_SHIFT1, 0x40004e02\r
-.set CYDEV_DEC_SHIFT2, 0x40004e03\r
-.set CYDEV_DEC_DR2, 0x40004e04\r
-.set CYDEV_DEC_DR2H, 0x40004e05\r
-.set CYDEV_DEC_DR1, 0x40004e06\r
-.set CYDEV_DEC_OCOR, 0x40004e08\r
-.set CYDEV_DEC_OCORM, 0x40004e09\r
-.set CYDEV_DEC_OCORH, 0x40004e0a\r
-.set CYDEV_DEC_GCOR, 0x40004e0c\r
-.set CYDEV_DEC_GCORH, 0x40004e0d\r
-.set CYDEV_DEC_GVAL, 0x40004e0e\r
-.set CYDEV_DEC_OUTSAMP, 0x40004e10\r
-.set CYDEV_DEC_OUTSAMPM, 0x40004e11\r
-.set CYDEV_DEC_OUTSAMPH, 0x40004e12\r
-.set CYDEV_DEC_OUTSAMPS, 0x40004e13\r
-.set CYDEV_DEC_COHER, 0x40004e14\r
-.set CYDEV_TMR0_BASE, 0x40004f00\r
-.set CYDEV_TMR0_SIZE, 0x0000000c\r
-.set CYDEV_TMR0_CFG0, 0x40004f00\r
-.set CYDEV_TMR0_CFG1, 0x40004f01\r
-.set CYDEV_TMR0_CFG2, 0x40004f02\r
-.set CYDEV_TMR0_SR0, 0x40004f03\r
-.set CYDEV_TMR0_PER0, 0x40004f04\r
-.set CYDEV_TMR0_PER1, 0x40004f05\r
-.set CYDEV_TMR0_CNT_CMP0, 0x40004f06\r
-.set CYDEV_TMR0_CNT_CMP1, 0x40004f07\r
-.set CYDEV_TMR0_CAP0, 0x40004f08\r
-.set CYDEV_TMR0_CAP1, 0x40004f09\r
-.set CYDEV_TMR0_RT0, 0x40004f0a\r
-.set CYDEV_TMR0_RT1, 0x40004f0b\r
-.set CYDEV_TMR1_BASE, 0x40004f0c\r
-.set CYDEV_TMR1_SIZE, 0x0000000c\r
-.set CYDEV_TMR1_CFG0, 0x40004f0c\r
-.set CYDEV_TMR1_CFG1, 0x40004f0d\r
-.set CYDEV_TMR1_CFG2, 0x40004f0e\r
-.set CYDEV_TMR1_SR0, 0x40004f0f\r
-.set CYDEV_TMR1_PER0, 0x40004f10\r
-.set CYDEV_TMR1_PER1, 0x40004f11\r
-.set CYDEV_TMR1_CNT_CMP0, 0x40004f12\r
-.set CYDEV_TMR1_CNT_CMP1, 0x40004f13\r
-.set CYDEV_TMR1_CAP0, 0x40004f14\r
-.set CYDEV_TMR1_CAP1, 0x40004f15\r
-.set CYDEV_TMR1_RT0, 0x40004f16\r
-.set CYDEV_TMR1_RT1, 0x40004f17\r
-.set CYDEV_TMR2_BASE, 0x40004f18\r
-.set CYDEV_TMR2_SIZE, 0x0000000c\r
-.set CYDEV_TMR2_CFG0, 0x40004f18\r
-.set CYDEV_TMR2_CFG1, 0x40004f19\r
-.set CYDEV_TMR2_CFG2, 0x40004f1a\r
-.set CYDEV_TMR2_SR0, 0x40004f1b\r
-.set CYDEV_TMR2_PER0, 0x40004f1c\r
-.set CYDEV_TMR2_PER1, 0x40004f1d\r
-.set CYDEV_TMR2_CNT_CMP0, 0x40004f1e\r
-.set CYDEV_TMR2_CNT_CMP1, 0x40004f1f\r
-.set CYDEV_TMR2_CAP0, 0x40004f20\r
-.set CYDEV_TMR2_CAP1, 0x40004f21\r
-.set CYDEV_TMR2_RT0, 0x40004f22\r
-.set CYDEV_TMR2_RT1, 0x40004f23\r
-.set CYDEV_TMR3_BASE, 0x40004f24\r
-.set CYDEV_TMR3_SIZE, 0x0000000c\r
-.set CYDEV_TMR3_CFG0, 0x40004f24\r
-.set CYDEV_TMR3_CFG1, 0x40004f25\r
-.set CYDEV_TMR3_CFG2, 0x40004f26\r
-.set CYDEV_TMR3_SR0, 0x40004f27\r
-.set CYDEV_TMR3_PER0, 0x40004f28\r
-.set CYDEV_TMR3_PER1, 0x40004f29\r
-.set CYDEV_TMR3_CNT_CMP0, 0x40004f2a\r
-.set CYDEV_TMR3_CNT_CMP1, 0x40004f2b\r
-.set CYDEV_TMR3_CAP0, 0x40004f2c\r
-.set CYDEV_TMR3_CAP1, 0x40004f2d\r
-.set CYDEV_TMR3_RT0, 0x40004f2e\r
-.set CYDEV_TMR3_RT1, 0x40004f2f\r
-.set CYDEV_IO_BASE, 0x40005000\r
-.set CYDEV_IO_SIZE, 0x00000200\r
-.set CYDEV_IO_PC_BASE, 0x40005000\r
-.set CYDEV_IO_PC_SIZE, 0x00000080\r
-.set CYDEV_IO_PC_PRT0_BASE, 0x40005000\r
-.set CYDEV_IO_PC_PRT0_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT0_PC0, 0x40005000\r
-.set CYDEV_IO_PC_PRT0_PC1, 0x40005001\r
-.set CYDEV_IO_PC_PRT0_PC2, 0x40005002\r
-.set CYDEV_IO_PC_PRT0_PC3, 0x40005003\r
-.set CYDEV_IO_PC_PRT0_PC4, 0x40005004\r
-.set CYDEV_IO_PC_PRT0_PC5, 0x40005005\r
-.set CYDEV_IO_PC_PRT0_PC6, 0x40005006\r
-.set CYDEV_IO_PC_PRT0_PC7, 0x40005007\r
-.set CYDEV_IO_PC_PRT1_BASE, 0x40005008\r
-.set CYDEV_IO_PC_PRT1_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT1_PC0, 0x40005008\r
-.set CYDEV_IO_PC_PRT1_PC1, 0x40005009\r
-.set CYDEV_IO_PC_PRT1_PC2, 0x4000500a\r
-.set CYDEV_IO_PC_PRT1_PC3, 0x4000500b\r
-.set CYDEV_IO_PC_PRT1_PC4, 0x4000500c\r
-.set CYDEV_IO_PC_PRT1_PC5, 0x4000500d\r
-.set CYDEV_IO_PC_PRT1_PC6, 0x4000500e\r
-.set CYDEV_IO_PC_PRT1_PC7, 0x4000500f\r
-.set CYDEV_IO_PC_PRT2_BASE, 0x40005010\r
-.set CYDEV_IO_PC_PRT2_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT2_PC0, 0x40005010\r
-.set CYDEV_IO_PC_PRT2_PC1, 0x40005011\r
-.set CYDEV_IO_PC_PRT2_PC2, 0x40005012\r
-.set CYDEV_IO_PC_PRT2_PC3, 0x40005013\r
-.set CYDEV_IO_PC_PRT2_PC4, 0x40005014\r
-.set CYDEV_IO_PC_PRT2_PC5, 0x40005015\r
-.set CYDEV_IO_PC_PRT2_PC6, 0x40005016\r
-.set CYDEV_IO_PC_PRT2_PC7, 0x40005017\r
-.set CYDEV_IO_PC_PRT3_BASE, 0x40005018\r
-.set CYDEV_IO_PC_PRT3_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT3_PC0, 0x40005018\r
-.set CYDEV_IO_PC_PRT3_PC1, 0x40005019\r
-.set CYDEV_IO_PC_PRT3_PC2, 0x4000501a\r
-.set CYDEV_IO_PC_PRT3_PC3, 0x4000501b\r
-.set CYDEV_IO_PC_PRT3_PC4, 0x4000501c\r
-.set CYDEV_IO_PC_PRT3_PC5, 0x4000501d\r
-.set CYDEV_IO_PC_PRT3_PC6, 0x4000501e\r
-.set CYDEV_IO_PC_PRT3_PC7, 0x4000501f\r
-.set CYDEV_IO_PC_PRT4_BASE, 0x40005020\r
-.set CYDEV_IO_PC_PRT4_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT4_PC0, 0x40005020\r
-.set CYDEV_IO_PC_PRT4_PC1, 0x40005021\r
-.set CYDEV_IO_PC_PRT4_PC2, 0x40005022\r
-.set CYDEV_IO_PC_PRT4_PC3, 0x40005023\r
-.set CYDEV_IO_PC_PRT4_PC4, 0x40005024\r
-.set CYDEV_IO_PC_PRT4_PC5, 0x40005025\r
-.set CYDEV_IO_PC_PRT4_PC6, 0x40005026\r
-.set CYDEV_IO_PC_PRT4_PC7, 0x40005027\r
-.set CYDEV_IO_PC_PRT5_BASE, 0x40005028\r
-.set CYDEV_IO_PC_PRT5_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT5_PC0, 0x40005028\r
-.set CYDEV_IO_PC_PRT5_PC1, 0x40005029\r
-.set CYDEV_IO_PC_PRT5_PC2, 0x4000502a\r
-.set CYDEV_IO_PC_PRT5_PC3, 0x4000502b\r
-.set CYDEV_IO_PC_PRT5_PC4, 0x4000502c\r
-.set CYDEV_IO_PC_PRT5_PC5, 0x4000502d\r
-.set CYDEV_IO_PC_PRT5_PC6, 0x4000502e\r
-.set CYDEV_IO_PC_PRT5_PC7, 0x4000502f\r
-.set CYDEV_IO_PC_PRT6_BASE, 0x40005030\r
-.set CYDEV_IO_PC_PRT6_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT6_PC0, 0x40005030\r
-.set CYDEV_IO_PC_PRT6_PC1, 0x40005031\r
-.set CYDEV_IO_PC_PRT6_PC2, 0x40005032\r
-.set CYDEV_IO_PC_PRT6_PC3, 0x40005033\r
-.set CYDEV_IO_PC_PRT6_PC4, 0x40005034\r
-.set CYDEV_IO_PC_PRT6_PC5, 0x40005035\r
-.set CYDEV_IO_PC_PRT6_PC6, 0x40005036\r
-.set CYDEV_IO_PC_PRT6_PC7, 0x40005037\r
-.set CYDEV_IO_PC_PRT12_BASE, 0x40005060\r
-.set CYDEV_IO_PC_PRT12_SIZE, 0x00000008\r
-.set CYDEV_IO_PC_PRT12_PC0, 0x40005060\r
-.set CYDEV_IO_PC_PRT12_PC1, 0x40005061\r
-.set CYDEV_IO_PC_PRT12_PC2, 0x40005062\r
-.set CYDEV_IO_PC_PRT12_PC3, 0x40005063\r
-.set CYDEV_IO_PC_PRT12_PC4, 0x40005064\r
-.set CYDEV_IO_PC_PRT12_PC5, 0x40005065\r
-.set CYDEV_IO_PC_PRT12_PC6, 0x40005066\r
-.set CYDEV_IO_PC_PRT12_PC7, 0x40005067\r
-.set CYDEV_IO_PC_PRT15_BASE, 0x40005078\r
-.set CYDEV_IO_PC_PRT15_SIZE, 0x00000006\r
-.set CYDEV_IO_PC_PRT15_PC0, 0x40005078\r
-.set CYDEV_IO_PC_PRT15_PC1, 0x40005079\r
-.set CYDEV_IO_PC_PRT15_PC2, 0x4000507a\r
-.set CYDEV_IO_PC_PRT15_PC3, 0x4000507b\r
-.set CYDEV_IO_PC_PRT15_PC4, 0x4000507c\r
-.set CYDEV_IO_PC_PRT15_PC5, 0x4000507d\r
-.set CYDEV_IO_PC_PRT15_7_6_BASE, 0x4000507e\r
-.set CYDEV_IO_PC_PRT15_7_6_SIZE, 0x00000002\r
-.set CYDEV_IO_PC_PRT15_7_6_PC0, 0x4000507e\r
-.set CYDEV_IO_PC_PRT15_7_6_PC1, 0x4000507f\r
-.set CYDEV_IO_DR_BASE, 0x40005080\r
-.set CYDEV_IO_DR_SIZE, 0x00000010\r
-.set CYDEV_IO_DR_PRT0_BASE, 0x40005080\r
-.set CYDEV_IO_DR_PRT0_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT0_DR_ALIAS, 0x40005080\r
-.set CYDEV_IO_DR_PRT1_BASE, 0x40005081\r
-.set CYDEV_IO_DR_PRT1_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT1_DR_ALIAS, 0x40005081\r
-.set CYDEV_IO_DR_PRT2_BASE, 0x40005082\r
-.set CYDEV_IO_DR_PRT2_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT2_DR_ALIAS, 0x40005082\r
-.set CYDEV_IO_DR_PRT3_BASE, 0x40005083\r
-.set CYDEV_IO_DR_PRT3_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT3_DR_ALIAS, 0x40005083\r
-.set CYDEV_IO_DR_PRT4_BASE, 0x40005084\r
-.set CYDEV_IO_DR_PRT4_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT4_DR_ALIAS, 0x40005084\r
-.set CYDEV_IO_DR_PRT5_BASE, 0x40005085\r
-.set CYDEV_IO_DR_PRT5_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT5_DR_ALIAS, 0x40005085\r
-.set CYDEV_IO_DR_PRT6_BASE, 0x40005086\r
-.set CYDEV_IO_DR_PRT6_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT6_DR_ALIAS, 0x40005086\r
-.set CYDEV_IO_DR_PRT12_BASE, 0x4000508c\r
-.set CYDEV_IO_DR_PRT12_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT12_DR_ALIAS, 0x4000508c\r
-.set CYDEV_IO_DR_PRT15_BASE, 0x4000508f\r
-.set CYDEV_IO_DR_PRT15_SIZE, 0x00000001\r
-.set CYDEV_IO_DR_PRT15_DR_15_ALIAS, 0x4000508f\r
-.set CYDEV_IO_PS_BASE, 0x40005090\r
-.set CYDEV_IO_PS_SIZE, 0x00000010\r
-.set CYDEV_IO_PS_PRT0_BASE, 0x40005090\r
-.set CYDEV_IO_PS_PRT0_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT0_PS_ALIAS, 0x40005090\r
-.set CYDEV_IO_PS_PRT1_BASE, 0x40005091\r
-.set CYDEV_IO_PS_PRT1_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT1_PS_ALIAS, 0x40005091\r
-.set CYDEV_IO_PS_PRT2_BASE, 0x40005092\r
-.set CYDEV_IO_PS_PRT2_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT2_PS_ALIAS, 0x40005092\r
-.set CYDEV_IO_PS_PRT3_BASE, 0x40005093\r
-.set CYDEV_IO_PS_PRT3_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT3_PS_ALIAS, 0x40005093\r
-.set CYDEV_IO_PS_PRT4_BASE, 0x40005094\r
-.set CYDEV_IO_PS_PRT4_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT4_PS_ALIAS, 0x40005094\r
-.set CYDEV_IO_PS_PRT5_BASE, 0x40005095\r
-.set CYDEV_IO_PS_PRT5_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT5_PS_ALIAS, 0x40005095\r
-.set CYDEV_IO_PS_PRT6_BASE, 0x40005096\r
-.set CYDEV_IO_PS_PRT6_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT6_PS_ALIAS, 0x40005096\r
-.set CYDEV_IO_PS_PRT12_BASE, 0x4000509c\r
-.set CYDEV_IO_PS_PRT12_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT12_PS_ALIAS, 0x4000509c\r
-.set CYDEV_IO_PS_PRT15_BASE, 0x4000509f\r
-.set CYDEV_IO_PS_PRT15_SIZE, 0x00000001\r
-.set CYDEV_IO_PS_PRT15_PS15_ALIAS, 0x4000509f\r
-.set CYDEV_IO_PRT_BASE, 0x40005100\r
-.set CYDEV_IO_PRT_SIZE, 0x00000100\r
-.set CYDEV_IO_PRT_PRT0_BASE, 0x40005100\r
-.set CYDEV_IO_PRT_PRT0_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT0_DR, 0x40005100\r
-.set CYDEV_IO_PRT_PRT0_PS, 0x40005101\r
-.set CYDEV_IO_PRT_PRT0_DM0, 0x40005102\r
-.set CYDEV_IO_PRT_PRT0_DM1, 0x40005103\r
-.set CYDEV_IO_PRT_PRT0_DM2, 0x40005104\r
-.set CYDEV_IO_PRT_PRT0_SLW, 0x40005105\r
-.set CYDEV_IO_PRT_PRT0_BYP, 0x40005106\r
-.set CYDEV_IO_PRT_PRT0_BIE, 0x40005107\r
-.set CYDEV_IO_PRT_PRT0_INP_DIS, 0x40005108\r
-.set CYDEV_IO_PRT_PRT0_CTL, 0x40005109\r
-.set CYDEV_IO_PRT_PRT0_PRT, 0x4000510a\r
-.set CYDEV_IO_PRT_PRT0_BIT_MASK, 0x4000510b\r
-.set CYDEV_IO_PRT_PRT0_AMUX, 0x4000510c\r
-.set CYDEV_IO_PRT_PRT0_AG, 0x4000510d\r
-.set CYDEV_IO_PRT_PRT0_LCD_COM_SEG, 0x4000510e\r
-.set CYDEV_IO_PRT_PRT0_LCD_EN, 0x4000510f\r
-.set CYDEV_IO_PRT_PRT1_BASE, 0x40005110\r
-.set CYDEV_IO_PRT_PRT1_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT1_DR, 0x40005110\r
-.set CYDEV_IO_PRT_PRT1_PS, 0x40005111\r
-.set CYDEV_IO_PRT_PRT1_DM0, 0x40005112\r
-.set CYDEV_IO_PRT_PRT1_DM1, 0x40005113\r
-.set CYDEV_IO_PRT_PRT1_DM2, 0x40005114\r
-.set CYDEV_IO_PRT_PRT1_SLW, 0x40005115\r
-.set CYDEV_IO_PRT_PRT1_BYP, 0x40005116\r
-.set CYDEV_IO_PRT_PRT1_BIE, 0x40005117\r
-.set CYDEV_IO_PRT_PRT1_INP_DIS, 0x40005118\r
-.set CYDEV_IO_PRT_PRT1_CTL, 0x40005119\r
-.set CYDEV_IO_PRT_PRT1_PRT, 0x4000511a\r
-.set CYDEV_IO_PRT_PRT1_BIT_MASK, 0x4000511b\r
-.set CYDEV_IO_PRT_PRT1_AMUX, 0x4000511c\r
-.set CYDEV_IO_PRT_PRT1_AG, 0x4000511d\r
-.set CYDEV_IO_PRT_PRT1_LCD_COM_SEG, 0x4000511e\r
-.set CYDEV_IO_PRT_PRT1_LCD_EN, 0x4000511f\r
-.set CYDEV_IO_PRT_PRT2_BASE, 0x40005120\r
-.set CYDEV_IO_PRT_PRT2_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT2_DR, 0x40005120\r
-.set CYDEV_IO_PRT_PRT2_PS, 0x40005121\r
-.set CYDEV_IO_PRT_PRT2_DM0, 0x40005122\r
-.set CYDEV_IO_PRT_PRT2_DM1, 0x40005123\r
-.set CYDEV_IO_PRT_PRT2_DM2, 0x40005124\r
-.set CYDEV_IO_PRT_PRT2_SLW, 0x40005125\r
-.set CYDEV_IO_PRT_PRT2_BYP, 0x40005126\r
-.set CYDEV_IO_PRT_PRT2_BIE, 0x40005127\r
-.set CYDEV_IO_PRT_PRT2_INP_DIS, 0x40005128\r
-.set CYDEV_IO_PRT_PRT2_CTL, 0x40005129\r
-.set CYDEV_IO_PRT_PRT2_PRT, 0x4000512a\r
-.set CYDEV_IO_PRT_PRT2_BIT_MASK, 0x4000512b\r
-.set CYDEV_IO_PRT_PRT2_AMUX, 0x4000512c\r
-.set CYDEV_IO_PRT_PRT2_AG, 0x4000512d\r
-.set CYDEV_IO_PRT_PRT2_LCD_COM_SEG, 0x4000512e\r
-.set CYDEV_IO_PRT_PRT2_LCD_EN, 0x4000512f\r
-.set CYDEV_IO_PRT_PRT3_BASE, 0x40005130\r
-.set CYDEV_IO_PRT_PRT3_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT3_DR, 0x40005130\r
-.set CYDEV_IO_PRT_PRT3_PS, 0x40005131\r
-.set CYDEV_IO_PRT_PRT3_DM0, 0x40005132\r
-.set CYDEV_IO_PRT_PRT3_DM1, 0x40005133\r
-.set CYDEV_IO_PRT_PRT3_DM2, 0x40005134\r
-.set CYDEV_IO_PRT_PRT3_SLW, 0x40005135\r
-.set CYDEV_IO_PRT_PRT3_BYP, 0x40005136\r
-.set CYDEV_IO_PRT_PRT3_BIE, 0x40005137\r
-.set CYDEV_IO_PRT_PRT3_INP_DIS, 0x40005138\r
-.set CYDEV_IO_PRT_PRT3_CTL, 0x40005139\r
-.set CYDEV_IO_PRT_PRT3_PRT, 0x4000513a\r
-.set CYDEV_IO_PRT_PRT3_BIT_MASK, 0x4000513b\r
-.set CYDEV_IO_PRT_PRT3_AMUX, 0x4000513c\r
-.set CYDEV_IO_PRT_PRT3_AG, 0x4000513d\r
-.set CYDEV_IO_PRT_PRT3_LCD_COM_SEG, 0x4000513e\r
-.set CYDEV_IO_PRT_PRT3_LCD_EN, 0x4000513f\r
-.set CYDEV_IO_PRT_PRT4_BASE, 0x40005140\r
-.set CYDEV_IO_PRT_PRT4_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT4_DR, 0x40005140\r
-.set CYDEV_IO_PRT_PRT4_PS, 0x40005141\r
-.set CYDEV_IO_PRT_PRT4_DM0, 0x40005142\r
-.set CYDEV_IO_PRT_PRT4_DM1, 0x40005143\r
-.set CYDEV_IO_PRT_PRT4_DM2, 0x40005144\r
-.set CYDEV_IO_PRT_PRT4_SLW, 0x40005145\r
-.set CYDEV_IO_PRT_PRT4_BYP, 0x40005146\r
-.set CYDEV_IO_PRT_PRT4_BIE, 0x40005147\r
-.set CYDEV_IO_PRT_PRT4_INP_DIS, 0x40005148\r
-.set CYDEV_IO_PRT_PRT4_CTL, 0x40005149\r
-.set CYDEV_IO_PRT_PRT4_PRT, 0x4000514a\r
-.set CYDEV_IO_PRT_PRT4_BIT_MASK, 0x4000514b\r
-.set CYDEV_IO_PRT_PRT4_AMUX, 0x4000514c\r
-.set CYDEV_IO_PRT_PRT4_AG, 0x4000514d\r
-.set CYDEV_IO_PRT_PRT4_LCD_COM_SEG, 0x4000514e\r
-.set CYDEV_IO_PRT_PRT4_LCD_EN, 0x4000514f\r
-.set CYDEV_IO_PRT_PRT5_BASE, 0x40005150\r
-.set CYDEV_IO_PRT_PRT5_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT5_DR, 0x40005150\r
-.set CYDEV_IO_PRT_PRT5_PS, 0x40005151\r
-.set CYDEV_IO_PRT_PRT5_DM0, 0x40005152\r
-.set CYDEV_IO_PRT_PRT5_DM1, 0x40005153\r
-.set CYDEV_IO_PRT_PRT5_DM2, 0x40005154\r
-.set CYDEV_IO_PRT_PRT5_SLW, 0x40005155\r
-.set CYDEV_IO_PRT_PRT5_BYP, 0x40005156\r
-.set CYDEV_IO_PRT_PRT5_BIE, 0x40005157\r
-.set CYDEV_IO_PRT_PRT5_INP_DIS, 0x40005158\r
-.set CYDEV_IO_PRT_PRT5_CTL, 0x40005159\r
-.set CYDEV_IO_PRT_PRT5_PRT, 0x4000515a\r
-.set CYDEV_IO_PRT_PRT5_BIT_MASK, 0x4000515b\r
-.set CYDEV_IO_PRT_PRT5_AMUX, 0x4000515c\r
-.set CYDEV_IO_PRT_PRT5_AG, 0x4000515d\r
-.set CYDEV_IO_PRT_PRT5_LCD_COM_SEG, 0x4000515e\r
-.set CYDEV_IO_PRT_PRT5_LCD_EN, 0x4000515f\r
-.set CYDEV_IO_PRT_PRT6_BASE, 0x40005160\r
-.set CYDEV_IO_PRT_PRT6_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT6_DR, 0x40005160\r
-.set CYDEV_IO_PRT_PRT6_PS, 0x40005161\r
-.set CYDEV_IO_PRT_PRT6_DM0, 0x40005162\r
-.set CYDEV_IO_PRT_PRT6_DM1, 0x40005163\r
-.set CYDEV_IO_PRT_PRT6_DM2, 0x40005164\r
-.set CYDEV_IO_PRT_PRT6_SLW, 0x40005165\r
-.set CYDEV_IO_PRT_PRT6_BYP, 0x40005166\r
-.set CYDEV_IO_PRT_PRT6_BIE, 0x40005167\r
-.set CYDEV_IO_PRT_PRT6_INP_DIS, 0x40005168\r
-.set CYDEV_IO_PRT_PRT6_CTL, 0x40005169\r
-.set CYDEV_IO_PRT_PRT6_PRT, 0x4000516a\r
-.set CYDEV_IO_PRT_PRT6_BIT_MASK, 0x4000516b\r
-.set CYDEV_IO_PRT_PRT6_AMUX, 0x4000516c\r
-.set CYDEV_IO_PRT_PRT6_AG, 0x4000516d\r
-.set CYDEV_IO_PRT_PRT6_LCD_COM_SEG, 0x4000516e\r
-.set CYDEV_IO_PRT_PRT6_LCD_EN, 0x4000516f\r
-.set CYDEV_IO_PRT_PRT12_BASE, 0x400051c0\r
-.set CYDEV_IO_PRT_PRT12_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT12_DR, 0x400051c0\r
-.set CYDEV_IO_PRT_PRT12_PS, 0x400051c1\r
-.set CYDEV_IO_PRT_PRT12_DM0, 0x400051c2\r
-.set CYDEV_IO_PRT_PRT12_DM1, 0x400051c3\r
-.set CYDEV_IO_PRT_PRT12_DM2, 0x400051c4\r
-.set CYDEV_IO_PRT_PRT12_SLW, 0x400051c5\r
-.set CYDEV_IO_PRT_PRT12_BYP, 0x400051c6\r
-.set CYDEV_IO_PRT_PRT12_BIE, 0x400051c7\r
-.set CYDEV_IO_PRT_PRT12_INP_DIS, 0x400051c8\r
-.set CYDEV_IO_PRT_PRT12_SIO_HYST_EN, 0x400051c9\r
-.set CYDEV_IO_PRT_PRT12_PRT, 0x400051ca\r
-.set CYDEV_IO_PRT_PRT12_BIT_MASK, 0x400051cb\r
-.set CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ, 0x400051cc\r
-.set CYDEV_IO_PRT_PRT12_AG, 0x400051cd\r
-.set CYDEV_IO_PRT_PRT12_SIO_CFG, 0x400051ce\r
-.set CYDEV_IO_PRT_PRT12_SIO_DIFF, 0x400051cf\r
-.set CYDEV_IO_PRT_PRT15_BASE, 0x400051f0\r
-.set CYDEV_IO_PRT_PRT15_SIZE, 0x00000010\r
-.set CYDEV_IO_PRT_PRT15_DR, 0x400051f0\r
-.set CYDEV_IO_PRT_PRT15_PS, 0x400051f1\r
-.set CYDEV_IO_PRT_PRT15_DM0, 0x400051f2\r
-.set CYDEV_IO_PRT_PRT15_DM1, 0x400051f3\r
-.set CYDEV_IO_PRT_PRT15_DM2, 0x400051f4\r
-.set CYDEV_IO_PRT_PRT15_SLW, 0x400051f5\r
-.set CYDEV_IO_PRT_PRT15_BYP, 0x400051f6\r
-.set CYDEV_IO_PRT_PRT15_BIE, 0x400051f7\r
-.set CYDEV_IO_PRT_PRT15_INP_DIS, 0x400051f8\r
-.set CYDEV_IO_PRT_PRT15_CTL, 0x400051f9\r
-.set CYDEV_IO_PRT_PRT15_PRT, 0x400051fa\r
-.set CYDEV_IO_PRT_PRT15_BIT_MASK, 0x400051fb\r
-.set CYDEV_IO_PRT_PRT15_AMUX, 0x400051fc\r
-.set CYDEV_IO_PRT_PRT15_AG, 0x400051fd\r
-.set CYDEV_IO_PRT_PRT15_LCD_COM_SEG, 0x400051fe\r
-.set CYDEV_IO_PRT_PRT15_LCD_EN, 0x400051ff\r
-.set CYDEV_PRTDSI_BASE, 0x40005200\r
-.set CYDEV_PRTDSI_SIZE, 0x0000007f\r
-.set CYDEV_PRTDSI_PRT0_BASE, 0x40005200\r
-.set CYDEV_PRTDSI_PRT0_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT0_OUT_SEL0, 0x40005200\r
-.set CYDEV_PRTDSI_PRT0_OUT_SEL1, 0x40005201\r
-.set CYDEV_PRTDSI_PRT0_OE_SEL0, 0x40005202\r
-.set CYDEV_PRTDSI_PRT0_OE_SEL1, 0x40005203\r
-.set CYDEV_PRTDSI_PRT0_DBL_SYNC_IN, 0x40005204\r
-.set CYDEV_PRTDSI_PRT0_SYNC_OUT, 0x40005205\r
-.set CYDEV_PRTDSI_PRT0_CAPS_SEL, 0x40005206\r
-.set CYDEV_PRTDSI_PRT1_BASE, 0x40005208\r
-.set CYDEV_PRTDSI_PRT1_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT1_OUT_SEL0, 0x40005208\r
-.set CYDEV_PRTDSI_PRT1_OUT_SEL1, 0x40005209\r
-.set CYDEV_PRTDSI_PRT1_OE_SEL0, 0x4000520a\r
-.set CYDEV_PRTDSI_PRT1_OE_SEL1, 0x4000520b\r
-.set CYDEV_PRTDSI_PRT1_DBL_SYNC_IN, 0x4000520c\r
-.set CYDEV_PRTDSI_PRT1_SYNC_OUT, 0x4000520d\r
-.set CYDEV_PRTDSI_PRT1_CAPS_SEL, 0x4000520e\r
-.set CYDEV_PRTDSI_PRT2_BASE, 0x40005210\r
-.set CYDEV_PRTDSI_PRT2_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT2_OUT_SEL0, 0x40005210\r
-.set CYDEV_PRTDSI_PRT2_OUT_SEL1, 0x40005211\r
-.set CYDEV_PRTDSI_PRT2_OE_SEL0, 0x40005212\r
-.set CYDEV_PRTDSI_PRT2_OE_SEL1, 0x40005213\r
-.set CYDEV_PRTDSI_PRT2_DBL_SYNC_IN, 0x40005214\r
-.set CYDEV_PRTDSI_PRT2_SYNC_OUT, 0x40005215\r
-.set CYDEV_PRTDSI_PRT2_CAPS_SEL, 0x40005216\r
-.set CYDEV_PRTDSI_PRT3_BASE, 0x40005218\r
-.set CYDEV_PRTDSI_PRT3_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT3_OUT_SEL0, 0x40005218\r
-.set CYDEV_PRTDSI_PRT3_OUT_SEL1, 0x40005219\r
-.set CYDEV_PRTDSI_PRT3_OE_SEL0, 0x4000521a\r
-.set CYDEV_PRTDSI_PRT3_OE_SEL1, 0x4000521b\r
-.set CYDEV_PRTDSI_PRT3_DBL_SYNC_IN, 0x4000521c\r
-.set CYDEV_PRTDSI_PRT3_SYNC_OUT, 0x4000521d\r
-.set CYDEV_PRTDSI_PRT3_CAPS_SEL, 0x4000521e\r
-.set CYDEV_PRTDSI_PRT4_BASE, 0x40005220\r
-.set CYDEV_PRTDSI_PRT4_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT4_OUT_SEL0, 0x40005220\r
-.set CYDEV_PRTDSI_PRT4_OUT_SEL1, 0x40005221\r
-.set CYDEV_PRTDSI_PRT4_OE_SEL0, 0x40005222\r
-.set CYDEV_PRTDSI_PRT4_OE_SEL1, 0x40005223\r
-.set CYDEV_PRTDSI_PRT4_DBL_SYNC_IN, 0x40005224\r
-.set CYDEV_PRTDSI_PRT4_SYNC_OUT, 0x40005225\r
-.set CYDEV_PRTDSI_PRT4_CAPS_SEL, 0x40005226\r
-.set CYDEV_PRTDSI_PRT5_BASE, 0x40005228\r
-.set CYDEV_PRTDSI_PRT5_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT5_OUT_SEL0, 0x40005228\r
-.set CYDEV_PRTDSI_PRT5_OUT_SEL1, 0x40005229\r
-.set CYDEV_PRTDSI_PRT5_OE_SEL0, 0x4000522a\r
-.set CYDEV_PRTDSI_PRT5_OE_SEL1, 0x4000522b\r
-.set CYDEV_PRTDSI_PRT5_DBL_SYNC_IN, 0x4000522c\r
-.set CYDEV_PRTDSI_PRT5_SYNC_OUT, 0x4000522d\r
-.set CYDEV_PRTDSI_PRT5_CAPS_SEL, 0x4000522e\r
-.set CYDEV_PRTDSI_PRT6_BASE, 0x40005230\r
-.set CYDEV_PRTDSI_PRT6_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT6_OUT_SEL0, 0x40005230\r
-.set CYDEV_PRTDSI_PRT6_OUT_SEL1, 0x40005231\r
-.set CYDEV_PRTDSI_PRT6_OE_SEL0, 0x40005232\r
-.set CYDEV_PRTDSI_PRT6_OE_SEL1, 0x40005233\r
-.set CYDEV_PRTDSI_PRT6_DBL_SYNC_IN, 0x40005234\r
-.set CYDEV_PRTDSI_PRT6_SYNC_OUT, 0x40005235\r
-.set CYDEV_PRTDSI_PRT6_CAPS_SEL, 0x40005236\r
-.set CYDEV_PRTDSI_PRT12_BASE, 0x40005260\r
-.set CYDEV_PRTDSI_PRT12_SIZE, 0x00000006\r
-.set CYDEV_PRTDSI_PRT12_OUT_SEL0, 0x40005260\r
-.set CYDEV_PRTDSI_PRT12_OUT_SEL1, 0x40005261\r
-.set CYDEV_PRTDSI_PRT12_OE_SEL0, 0x40005262\r
-.set CYDEV_PRTDSI_PRT12_OE_SEL1, 0x40005263\r
-.set CYDEV_PRTDSI_PRT12_DBL_SYNC_IN, 0x40005264\r
-.set CYDEV_PRTDSI_PRT12_SYNC_OUT, 0x40005265\r
-.set CYDEV_PRTDSI_PRT15_BASE, 0x40005278\r
-.set CYDEV_PRTDSI_PRT15_SIZE, 0x00000007\r
-.set CYDEV_PRTDSI_PRT15_OUT_SEL0, 0x40005278\r
-.set CYDEV_PRTDSI_PRT15_OUT_SEL1, 0x40005279\r
-.set CYDEV_PRTDSI_PRT15_OE_SEL0, 0x4000527a\r
-.set CYDEV_PRTDSI_PRT15_OE_SEL1, 0x4000527b\r
-.set CYDEV_PRTDSI_PRT15_DBL_SYNC_IN, 0x4000527c\r
-.set CYDEV_PRTDSI_PRT15_SYNC_OUT, 0x4000527d\r
-.set CYDEV_PRTDSI_PRT15_CAPS_SEL, 0x4000527e\r
-.set CYDEV_EMIF_BASE, 0x40005400\r
-.set CYDEV_EMIF_SIZE, 0x00000007\r
-.set CYDEV_EMIF_NO_UDB, 0x40005400\r
-.set CYDEV_EMIF_RP_WAIT_STATES, 0x40005401\r
-.set CYDEV_EMIF_MEM_DWN, 0x40005402\r
-.set CYDEV_EMIF_MEMCLK_DIV, 0x40005403\r
-.set CYDEV_EMIF_CLOCK_EN, 0x40005404\r
-.set CYDEV_EMIF_EM_TYPE, 0x40005405\r
-.set CYDEV_EMIF_WP_WAIT_STATES, 0x40005406\r
-.set CYDEV_ANAIF_BASE, 0x40005800\r
-.set CYDEV_ANAIF_SIZE, 0x000003a9\r
-.set CYDEV_ANAIF_CFG_BASE, 0x40005800\r
-.set CYDEV_ANAIF_CFG_SIZE, 0x0000010f\r
-.set CYDEV_ANAIF_CFG_SC0_BASE, 0x40005800\r
-.set CYDEV_ANAIF_CFG_SC0_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_SC0_CR0, 0x40005800\r
-.set CYDEV_ANAIF_CFG_SC0_CR1, 0x40005801\r
-.set CYDEV_ANAIF_CFG_SC0_CR2, 0x40005802\r
-.set CYDEV_ANAIF_CFG_SC1_BASE, 0x40005804\r
-.set CYDEV_ANAIF_CFG_SC1_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_SC1_CR0, 0x40005804\r
-.set CYDEV_ANAIF_CFG_SC1_CR1, 0x40005805\r
-.set CYDEV_ANAIF_CFG_SC1_CR2, 0x40005806\r
-.set CYDEV_ANAIF_CFG_SC2_BASE, 0x40005808\r
-.set CYDEV_ANAIF_CFG_SC2_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_SC2_CR0, 0x40005808\r
-.set CYDEV_ANAIF_CFG_SC2_CR1, 0x40005809\r
-.set CYDEV_ANAIF_CFG_SC2_CR2, 0x4000580a\r
-.set CYDEV_ANAIF_CFG_SC3_BASE, 0x4000580c\r
-.set CYDEV_ANAIF_CFG_SC3_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_SC3_CR0, 0x4000580c\r
-.set CYDEV_ANAIF_CFG_SC3_CR1, 0x4000580d\r
-.set CYDEV_ANAIF_CFG_SC3_CR2, 0x4000580e\r
-.set CYDEV_ANAIF_CFG_DAC0_BASE, 0x40005820\r
-.set CYDEV_ANAIF_CFG_DAC0_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_DAC0_CR0, 0x40005820\r
-.set CYDEV_ANAIF_CFG_DAC0_CR1, 0x40005821\r
-.set CYDEV_ANAIF_CFG_DAC0_TST, 0x40005822\r
-.set CYDEV_ANAIF_CFG_DAC1_BASE, 0x40005824\r
-.set CYDEV_ANAIF_CFG_DAC1_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_DAC1_CR0, 0x40005824\r
-.set CYDEV_ANAIF_CFG_DAC1_CR1, 0x40005825\r
-.set CYDEV_ANAIF_CFG_DAC1_TST, 0x40005826\r
-.set CYDEV_ANAIF_CFG_DAC2_BASE, 0x40005828\r
-.set CYDEV_ANAIF_CFG_DAC2_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_DAC2_CR0, 0x40005828\r
-.set CYDEV_ANAIF_CFG_DAC2_CR1, 0x40005829\r
-.set CYDEV_ANAIF_CFG_DAC2_TST, 0x4000582a\r
-.set CYDEV_ANAIF_CFG_DAC3_BASE, 0x4000582c\r
-.set CYDEV_ANAIF_CFG_DAC3_SIZE, 0x00000003\r
-.set CYDEV_ANAIF_CFG_DAC3_CR0, 0x4000582c\r
-.set CYDEV_ANAIF_CFG_DAC3_CR1, 0x4000582d\r
-.set CYDEV_ANAIF_CFG_DAC3_TST, 0x4000582e\r
-.set CYDEV_ANAIF_CFG_CMP0_BASE, 0x40005840\r
-.set CYDEV_ANAIF_CFG_CMP0_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_CMP0_CR, 0x40005840\r
-.set CYDEV_ANAIF_CFG_CMP1_BASE, 0x40005841\r
-.set CYDEV_ANAIF_CFG_CMP1_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_CMP1_CR, 0x40005841\r
-.set CYDEV_ANAIF_CFG_CMP2_BASE, 0x40005842\r
-.set CYDEV_ANAIF_CFG_CMP2_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_CMP2_CR, 0x40005842\r
-.set CYDEV_ANAIF_CFG_CMP3_BASE, 0x40005843\r
-.set CYDEV_ANAIF_CFG_CMP3_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_CMP3_CR, 0x40005843\r
-.set CYDEV_ANAIF_CFG_LUT0_BASE, 0x40005848\r
-.set CYDEV_ANAIF_CFG_LUT0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LUT0_CR, 0x40005848\r
-.set CYDEV_ANAIF_CFG_LUT0_MX, 0x40005849\r
-.set CYDEV_ANAIF_CFG_LUT1_BASE, 0x4000584a\r
-.set CYDEV_ANAIF_CFG_LUT1_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LUT1_CR, 0x4000584a\r
-.set CYDEV_ANAIF_CFG_LUT1_MX, 0x4000584b\r
-.set CYDEV_ANAIF_CFG_LUT2_BASE, 0x4000584c\r
-.set CYDEV_ANAIF_CFG_LUT2_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LUT2_CR, 0x4000584c\r
-.set CYDEV_ANAIF_CFG_LUT2_MX, 0x4000584d\r
-.set CYDEV_ANAIF_CFG_LUT3_BASE, 0x4000584e\r
-.set CYDEV_ANAIF_CFG_LUT3_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LUT3_CR, 0x4000584e\r
-.set CYDEV_ANAIF_CFG_LUT3_MX, 0x4000584f\r
-.set CYDEV_ANAIF_CFG_OPAMP0_BASE, 0x40005858\r
-.set CYDEV_ANAIF_CFG_OPAMP0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_OPAMP0_CR, 0x40005858\r
-.set CYDEV_ANAIF_CFG_OPAMP0_RSVD, 0x40005859\r
-.set CYDEV_ANAIF_CFG_OPAMP1_BASE, 0x4000585a\r
-.set CYDEV_ANAIF_CFG_OPAMP1_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_OPAMP1_CR, 0x4000585a\r
-.set CYDEV_ANAIF_CFG_OPAMP1_RSVD, 0x4000585b\r
-.set CYDEV_ANAIF_CFG_OPAMP2_BASE, 0x4000585c\r
-.set CYDEV_ANAIF_CFG_OPAMP2_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_OPAMP2_CR, 0x4000585c\r
-.set CYDEV_ANAIF_CFG_OPAMP2_RSVD, 0x4000585d\r
-.set CYDEV_ANAIF_CFG_OPAMP3_BASE, 0x4000585e\r
-.set CYDEV_ANAIF_CFG_OPAMP3_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_OPAMP3_CR, 0x4000585e\r
-.set CYDEV_ANAIF_CFG_OPAMP3_RSVD, 0x4000585f\r
-.set CYDEV_ANAIF_CFG_LCDDAC_BASE, 0x40005868\r
-.set CYDEV_ANAIF_CFG_LCDDAC_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LCDDAC_CR0, 0x40005868\r
-.set CYDEV_ANAIF_CFG_LCDDAC_CR1, 0x40005869\r
-.set CYDEV_ANAIF_CFG_LCDDRV_BASE, 0x4000586a\r
-.set CYDEV_ANAIF_CFG_LCDDRV_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_LCDDRV_CR, 0x4000586a\r
-.set CYDEV_ANAIF_CFG_LCDTMR_BASE, 0x4000586b\r
-.set CYDEV_ANAIF_CFG_LCDTMR_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_LCDTMR_CFG, 0x4000586b\r
-.set CYDEV_ANAIF_CFG_BG_BASE, 0x4000586c\r
-.set CYDEV_ANAIF_CFG_BG_SIZE, 0x00000004\r
-.set CYDEV_ANAIF_CFG_BG_CR0, 0x4000586c\r
-.set CYDEV_ANAIF_CFG_BG_RSVD, 0x4000586d\r
-.set CYDEV_ANAIF_CFG_BG_DFT0, 0x4000586e\r
-.set CYDEV_ANAIF_CFG_BG_DFT1, 0x4000586f\r
-.set CYDEV_ANAIF_CFG_CAPSL_BASE, 0x40005870\r
-.set CYDEV_ANAIF_CFG_CAPSL_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_CAPSL_CFG0, 0x40005870\r
-.set CYDEV_ANAIF_CFG_CAPSL_CFG1, 0x40005871\r
-.set CYDEV_ANAIF_CFG_CAPSR_BASE, 0x40005872\r
-.set CYDEV_ANAIF_CFG_CAPSR_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_CAPSR_CFG0, 0x40005872\r
-.set CYDEV_ANAIF_CFG_CAPSR_CFG1, 0x40005873\r
-.set CYDEV_ANAIF_CFG_PUMP_BASE, 0x40005876\r
-.set CYDEV_ANAIF_CFG_PUMP_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_PUMP_CR0, 0x40005876\r
-.set CYDEV_ANAIF_CFG_PUMP_CR1, 0x40005877\r
-.set CYDEV_ANAIF_CFG_LPF0_BASE, 0x40005878\r
-.set CYDEV_ANAIF_CFG_LPF0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LPF0_CR0, 0x40005878\r
-.set CYDEV_ANAIF_CFG_LPF0_RSVD, 0x40005879\r
-.set CYDEV_ANAIF_CFG_LPF1_BASE, 0x4000587a\r
-.set CYDEV_ANAIF_CFG_LPF1_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_CFG_LPF1_CR0, 0x4000587a\r
-.set CYDEV_ANAIF_CFG_LPF1_RSVD, 0x4000587b\r
-.set CYDEV_ANAIF_CFG_MISC_BASE, 0x4000587c\r
-.set CYDEV_ANAIF_CFG_MISC_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_CFG_MISC_CR0, 0x4000587c\r
-.set CYDEV_ANAIF_CFG_DSM0_BASE, 0x40005880\r
-.set CYDEV_ANAIF_CFG_DSM0_SIZE, 0x00000020\r
-.set CYDEV_ANAIF_CFG_DSM0_CR0, 0x40005880\r
-.set CYDEV_ANAIF_CFG_DSM0_CR1, 0x40005881\r
-.set CYDEV_ANAIF_CFG_DSM0_CR2, 0x40005882\r
-.set CYDEV_ANAIF_CFG_DSM0_CR3, 0x40005883\r
-.set CYDEV_ANAIF_CFG_DSM0_CR4, 0x40005884\r
-.set CYDEV_ANAIF_CFG_DSM0_CR5, 0x40005885\r
-.set CYDEV_ANAIF_CFG_DSM0_CR6, 0x40005886\r
-.set CYDEV_ANAIF_CFG_DSM0_CR7, 0x40005887\r
-.set CYDEV_ANAIF_CFG_DSM0_CR8, 0x40005888\r
-.set CYDEV_ANAIF_CFG_DSM0_CR9, 0x40005889\r
-.set CYDEV_ANAIF_CFG_DSM0_CR10, 0x4000588a\r
-.set CYDEV_ANAIF_CFG_DSM0_CR11, 0x4000588b\r
-.set CYDEV_ANAIF_CFG_DSM0_CR12, 0x4000588c\r
-.set CYDEV_ANAIF_CFG_DSM0_CR13, 0x4000588d\r
-.set CYDEV_ANAIF_CFG_DSM0_CR14, 0x4000588e\r
-.set CYDEV_ANAIF_CFG_DSM0_CR15, 0x4000588f\r
-.set CYDEV_ANAIF_CFG_DSM0_CR16, 0x40005890\r
-.set CYDEV_ANAIF_CFG_DSM0_CR17, 0x40005891\r
-.set CYDEV_ANAIF_CFG_DSM0_REF0, 0x40005892\r
-.set CYDEV_ANAIF_CFG_DSM0_REF1, 0x40005893\r
-.set CYDEV_ANAIF_CFG_DSM0_REF2, 0x40005894\r
-.set CYDEV_ANAIF_CFG_DSM0_REF3, 0x40005895\r
-.set CYDEV_ANAIF_CFG_DSM0_DEM0, 0x40005896\r
-.set CYDEV_ANAIF_CFG_DSM0_DEM1, 0x40005897\r
-.set CYDEV_ANAIF_CFG_DSM0_TST0, 0x40005898\r
-.set CYDEV_ANAIF_CFG_DSM0_TST1, 0x40005899\r
-.set CYDEV_ANAIF_CFG_DSM0_BUF0, 0x4000589a\r
-.set CYDEV_ANAIF_CFG_DSM0_BUF1, 0x4000589b\r
-.set CYDEV_ANAIF_CFG_DSM0_BUF2, 0x4000589c\r
-.set CYDEV_ANAIF_CFG_DSM0_BUF3, 0x4000589d\r
-.set CYDEV_ANAIF_CFG_DSM0_MISC, 0x4000589e\r
-.set CYDEV_ANAIF_CFG_DSM0_RSVD1, 0x4000589f\r
-.set CYDEV_ANAIF_CFG_SAR0_BASE, 0x40005900\r
-.set CYDEV_ANAIF_CFG_SAR0_SIZE, 0x00000007\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR0, 0x40005900\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR1, 0x40005901\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR2, 0x40005902\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR3, 0x40005903\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR4, 0x40005904\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR5, 0x40005905\r
-.set CYDEV_ANAIF_CFG_SAR0_CSR6, 0x40005906\r
-.set CYDEV_ANAIF_CFG_SAR1_BASE, 0x40005908\r
-.set CYDEV_ANAIF_CFG_SAR1_SIZE, 0x00000007\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR0, 0x40005908\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR1, 0x40005909\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR2, 0x4000590a\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR3, 0x4000590b\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR4, 0x4000590c\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR5, 0x4000590d\r
-.set CYDEV_ANAIF_CFG_SAR1_CSR6, 0x4000590e\r
-.set CYDEV_ANAIF_RT_BASE, 0x40005a00\r
-.set CYDEV_ANAIF_RT_SIZE, 0x00000162\r
-.set CYDEV_ANAIF_RT_SC0_BASE, 0x40005a00\r
-.set CYDEV_ANAIF_RT_SC0_SIZE, 0x0000000d\r
-.set CYDEV_ANAIF_RT_SC0_SW0, 0x40005a00\r
-.set CYDEV_ANAIF_RT_SC0_SW2, 0x40005a02\r
-.set CYDEV_ANAIF_RT_SC0_SW3, 0x40005a03\r
-.set CYDEV_ANAIF_RT_SC0_SW4, 0x40005a04\r
-.set CYDEV_ANAIF_RT_SC0_SW6, 0x40005a06\r
-.set CYDEV_ANAIF_RT_SC0_SW7, 0x40005a07\r
-.set CYDEV_ANAIF_RT_SC0_SW8, 0x40005a08\r
-.set CYDEV_ANAIF_RT_SC0_SW10, 0x40005a0a\r
-.set CYDEV_ANAIF_RT_SC0_CLK, 0x40005a0b\r
-.set CYDEV_ANAIF_RT_SC0_BST, 0x40005a0c\r
-.set CYDEV_ANAIF_RT_SC1_BASE, 0x40005a10\r
-.set CYDEV_ANAIF_RT_SC1_SIZE, 0x0000000d\r
-.set CYDEV_ANAIF_RT_SC1_SW0, 0x40005a10\r
-.set CYDEV_ANAIF_RT_SC1_SW2, 0x40005a12\r
-.set CYDEV_ANAIF_RT_SC1_SW3, 0x40005a13\r
-.set CYDEV_ANAIF_RT_SC1_SW4, 0x40005a14\r
-.set CYDEV_ANAIF_RT_SC1_SW6, 0x40005a16\r
-.set CYDEV_ANAIF_RT_SC1_SW7, 0x40005a17\r
-.set CYDEV_ANAIF_RT_SC1_SW8, 0x40005a18\r
-.set CYDEV_ANAIF_RT_SC1_SW10, 0x40005a1a\r
-.set CYDEV_ANAIF_RT_SC1_CLK, 0x40005a1b\r
-.set CYDEV_ANAIF_RT_SC1_BST, 0x40005a1c\r
-.set CYDEV_ANAIF_RT_SC2_BASE, 0x40005a20\r
-.set CYDEV_ANAIF_RT_SC2_SIZE, 0x0000000d\r
-.set CYDEV_ANAIF_RT_SC2_SW0, 0x40005a20\r
-.set CYDEV_ANAIF_RT_SC2_SW2, 0x40005a22\r
-.set CYDEV_ANAIF_RT_SC2_SW3, 0x40005a23\r
-.set CYDEV_ANAIF_RT_SC2_SW4, 0x40005a24\r
-.set CYDEV_ANAIF_RT_SC2_SW6, 0x40005a26\r
-.set CYDEV_ANAIF_RT_SC2_SW7, 0x40005a27\r
-.set CYDEV_ANAIF_RT_SC2_SW8, 0x40005a28\r
-.set CYDEV_ANAIF_RT_SC2_SW10, 0x40005a2a\r
-.set CYDEV_ANAIF_RT_SC2_CLK, 0x40005a2b\r
-.set CYDEV_ANAIF_RT_SC2_BST, 0x40005a2c\r
-.set CYDEV_ANAIF_RT_SC3_BASE, 0x40005a30\r
-.set CYDEV_ANAIF_RT_SC3_SIZE, 0x0000000d\r
-.set CYDEV_ANAIF_RT_SC3_SW0, 0x40005a30\r
-.set CYDEV_ANAIF_RT_SC3_SW2, 0x40005a32\r
-.set CYDEV_ANAIF_RT_SC3_SW3, 0x40005a33\r
-.set CYDEV_ANAIF_RT_SC3_SW4, 0x40005a34\r
-.set CYDEV_ANAIF_RT_SC3_SW6, 0x40005a36\r
-.set CYDEV_ANAIF_RT_SC3_SW7, 0x40005a37\r
-.set CYDEV_ANAIF_RT_SC3_SW8, 0x40005a38\r
-.set CYDEV_ANAIF_RT_SC3_SW10, 0x40005a3a\r
-.set CYDEV_ANAIF_RT_SC3_CLK, 0x40005a3b\r
-.set CYDEV_ANAIF_RT_SC3_BST, 0x40005a3c\r
-.set CYDEV_ANAIF_RT_DAC0_BASE, 0x40005a80\r
-.set CYDEV_ANAIF_RT_DAC0_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_DAC0_SW0, 0x40005a80\r
-.set CYDEV_ANAIF_RT_DAC0_SW2, 0x40005a82\r
-.set CYDEV_ANAIF_RT_DAC0_SW3, 0x40005a83\r
-.set CYDEV_ANAIF_RT_DAC0_SW4, 0x40005a84\r
-.set CYDEV_ANAIF_RT_DAC0_STROBE, 0x40005a87\r
-.set CYDEV_ANAIF_RT_DAC1_BASE, 0x40005a88\r
-.set CYDEV_ANAIF_RT_DAC1_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_DAC1_SW0, 0x40005a88\r
-.set CYDEV_ANAIF_RT_DAC1_SW2, 0x40005a8a\r
-.set CYDEV_ANAIF_RT_DAC1_SW3, 0x40005a8b\r
-.set CYDEV_ANAIF_RT_DAC1_SW4, 0x40005a8c\r
-.set CYDEV_ANAIF_RT_DAC1_STROBE, 0x40005a8f\r
-.set CYDEV_ANAIF_RT_DAC2_BASE, 0x40005a90\r
-.set CYDEV_ANAIF_RT_DAC2_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_DAC2_SW0, 0x40005a90\r
-.set CYDEV_ANAIF_RT_DAC2_SW2, 0x40005a92\r
-.set CYDEV_ANAIF_RT_DAC2_SW3, 0x40005a93\r
-.set CYDEV_ANAIF_RT_DAC2_SW4, 0x40005a94\r
-.set CYDEV_ANAIF_RT_DAC2_STROBE, 0x40005a97\r
-.set CYDEV_ANAIF_RT_DAC3_BASE, 0x40005a98\r
-.set CYDEV_ANAIF_RT_DAC3_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_DAC3_SW0, 0x40005a98\r
-.set CYDEV_ANAIF_RT_DAC3_SW2, 0x40005a9a\r
-.set CYDEV_ANAIF_RT_DAC3_SW3, 0x40005a9b\r
-.set CYDEV_ANAIF_RT_DAC3_SW4, 0x40005a9c\r
-.set CYDEV_ANAIF_RT_DAC3_STROBE, 0x40005a9f\r
-.set CYDEV_ANAIF_RT_CMP0_BASE, 0x40005ac0\r
-.set CYDEV_ANAIF_RT_CMP0_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_CMP0_SW0, 0x40005ac0\r
-.set CYDEV_ANAIF_RT_CMP0_SW2, 0x40005ac2\r
-.set CYDEV_ANAIF_RT_CMP0_SW3, 0x40005ac3\r
-.set CYDEV_ANAIF_RT_CMP0_SW4, 0x40005ac4\r
-.set CYDEV_ANAIF_RT_CMP0_SW6, 0x40005ac6\r
-.set CYDEV_ANAIF_RT_CMP0_CLK, 0x40005ac7\r
-.set CYDEV_ANAIF_RT_CMP1_BASE, 0x40005ac8\r
-.set CYDEV_ANAIF_RT_CMP1_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_CMP1_SW0, 0x40005ac8\r
-.set CYDEV_ANAIF_RT_CMP1_SW2, 0x40005aca\r
-.set CYDEV_ANAIF_RT_CMP1_SW3, 0x40005acb\r
-.set CYDEV_ANAIF_RT_CMP1_SW4, 0x40005acc\r
-.set CYDEV_ANAIF_RT_CMP1_SW6, 0x40005ace\r
-.set CYDEV_ANAIF_RT_CMP1_CLK, 0x40005acf\r
-.set CYDEV_ANAIF_RT_CMP2_BASE, 0x40005ad0\r
-.set CYDEV_ANAIF_RT_CMP2_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_CMP2_SW0, 0x40005ad0\r
-.set CYDEV_ANAIF_RT_CMP2_SW2, 0x40005ad2\r
-.set CYDEV_ANAIF_RT_CMP2_SW3, 0x40005ad3\r
-.set CYDEV_ANAIF_RT_CMP2_SW4, 0x40005ad4\r
-.set CYDEV_ANAIF_RT_CMP2_SW6, 0x40005ad6\r
-.set CYDEV_ANAIF_RT_CMP2_CLK, 0x40005ad7\r
-.set CYDEV_ANAIF_RT_CMP3_BASE, 0x40005ad8\r
-.set CYDEV_ANAIF_RT_CMP3_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_CMP3_SW0, 0x40005ad8\r
-.set CYDEV_ANAIF_RT_CMP3_SW2, 0x40005ada\r
-.set CYDEV_ANAIF_RT_CMP3_SW3, 0x40005adb\r
-.set CYDEV_ANAIF_RT_CMP3_SW4, 0x40005adc\r
-.set CYDEV_ANAIF_RT_CMP3_SW6, 0x40005ade\r
-.set CYDEV_ANAIF_RT_CMP3_CLK, 0x40005adf\r
-.set CYDEV_ANAIF_RT_DSM0_BASE, 0x40005b00\r
-.set CYDEV_ANAIF_RT_DSM0_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_DSM0_SW0, 0x40005b00\r
-.set CYDEV_ANAIF_RT_DSM0_SW2, 0x40005b02\r
-.set CYDEV_ANAIF_RT_DSM0_SW3, 0x40005b03\r
-.set CYDEV_ANAIF_RT_DSM0_SW4, 0x40005b04\r
-.set CYDEV_ANAIF_RT_DSM0_SW6, 0x40005b06\r
-.set CYDEV_ANAIF_RT_DSM0_CLK, 0x40005b07\r
-.set CYDEV_ANAIF_RT_SAR0_BASE, 0x40005b20\r
-.set CYDEV_ANAIF_RT_SAR0_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_SAR0_SW0, 0x40005b20\r
-.set CYDEV_ANAIF_RT_SAR0_SW2, 0x40005b22\r
-.set CYDEV_ANAIF_RT_SAR0_SW3, 0x40005b23\r
-.set CYDEV_ANAIF_RT_SAR0_SW4, 0x40005b24\r
-.set CYDEV_ANAIF_RT_SAR0_SW6, 0x40005b26\r
-.set CYDEV_ANAIF_RT_SAR0_CLK, 0x40005b27\r
-.set CYDEV_ANAIF_RT_SAR1_BASE, 0x40005b28\r
-.set CYDEV_ANAIF_RT_SAR1_SIZE, 0x00000008\r
-.set CYDEV_ANAIF_RT_SAR1_SW0, 0x40005b28\r
-.set CYDEV_ANAIF_RT_SAR1_SW2, 0x40005b2a\r
-.set CYDEV_ANAIF_RT_SAR1_SW3, 0x40005b2b\r
-.set CYDEV_ANAIF_RT_SAR1_SW4, 0x40005b2c\r
-.set CYDEV_ANAIF_RT_SAR1_SW6, 0x40005b2e\r
-.set CYDEV_ANAIF_RT_SAR1_CLK, 0x40005b2f\r
-.set CYDEV_ANAIF_RT_OPAMP0_BASE, 0x40005b40\r
-.set CYDEV_ANAIF_RT_OPAMP0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_RT_OPAMP0_MX, 0x40005b40\r
-.set CYDEV_ANAIF_RT_OPAMP0_SW, 0x40005b41\r
-.set CYDEV_ANAIF_RT_OPAMP1_BASE, 0x40005b42\r
-.set CYDEV_ANAIF_RT_OPAMP1_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_RT_OPAMP1_MX, 0x40005b42\r
-.set CYDEV_ANAIF_RT_OPAMP1_SW, 0x40005b43\r
-.set CYDEV_ANAIF_RT_OPAMP2_BASE, 0x40005b44\r
-.set CYDEV_ANAIF_RT_OPAMP2_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_RT_OPAMP2_MX, 0x40005b44\r
-.set CYDEV_ANAIF_RT_OPAMP2_SW, 0x40005b45\r
-.set CYDEV_ANAIF_RT_OPAMP3_BASE, 0x40005b46\r
-.set CYDEV_ANAIF_RT_OPAMP3_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_RT_OPAMP3_MX, 0x40005b46\r
-.set CYDEV_ANAIF_RT_OPAMP3_SW, 0x40005b47\r
-.set CYDEV_ANAIF_RT_LCDDAC_BASE, 0x40005b50\r
-.set CYDEV_ANAIF_RT_LCDDAC_SIZE, 0x00000005\r
-.set CYDEV_ANAIF_RT_LCDDAC_SW0, 0x40005b50\r
-.set CYDEV_ANAIF_RT_LCDDAC_SW1, 0x40005b51\r
-.set CYDEV_ANAIF_RT_LCDDAC_SW2, 0x40005b52\r
-.set CYDEV_ANAIF_RT_LCDDAC_SW3, 0x40005b53\r
-.set CYDEV_ANAIF_RT_LCDDAC_SW4, 0x40005b54\r
-.set CYDEV_ANAIF_RT_SC_BASE, 0x40005b56\r
-.set CYDEV_ANAIF_RT_SC_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_RT_SC_MISC, 0x40005b56\r
-.set CYDEV_ANAIF_RT_BUS_BASE, 0x40005b58\r
-.set CYDEV_ANAIF_RT_BUS_SIZE, 0x00000004\r
-.set CYDEV_ANAIF_RT_BUS_SW0, 0x40005b58\r
-.set CYDEV_ANAIF_RT_BUS_SW2, 0x40005b5a\r
-.set CYDEV_ANAIF_RT_BUS_SW3, 0x40005b5b\r
-.set CYDEV_ANAIF_RT_DFT_BASE, 0x40005b5c\r
-.set CYDEV_ANAIF_RT_DFT_SIZE, 0x00000006\r
-.set CYDEV_ANAIF_RT_DFT_CR0, 0x40005b5c\r
-.set CYDEV_ANAIF_RT_DFT_CR1, 0x40005b5d\r
-.set CYDEV_ANAIF_RT_DFT_CR2, 0x40005b5e\r
-.set CYDEV_ANAIF_RT_DFT_CR3, 0x40005b5f\r
-.set CYDEV_ANAIF_RT_DFT_CR4, 0x40005b60\r
-.set CYDEV_ANAIF_RT_DFT_CR5, 0x40005b61\r
-.set CYDEV_ANAIF_WRK_BASE, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_SIZE, 0x00000029\r
-.set CYDEV_ANAIF_WRK_DAC0_BASE, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_DAC0_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_WRK_DAC0_D, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_DAC1_BASE, 0x40005b81\r
-.set CYDEV_ANAIF_WRK_DAC1_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_WRK_DAC1_D, 0x40005b81\r
-.set CYDEV_ANAIF_WRK_DAC2_BASE, 0x40005b82\r
-.set CYDEV_ANAIF_WRK_DAC2_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_WRK_DAC2_D, 0x40005b82\r
-.set CYDEV_ANAIF_WRK_DAC3_BASE, 0x40005b83\r
-.set CYDEV_ANAIF_WRK_DAC3_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_WRK_DAC3_D, 0x40005b83\r
-.set CYDEV_ANAIF_WRK_DSM0_BASE, 0x40005b88\r
-.set CYDEV_ANAIF_WRK_DSM0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_WRK_DSM0_OUT0, 0x40005b88\r
-.set CYDEV_ANAIF_WRK_DSM0_OUT1, 0x40005b89\r
-.set CYDEV_ANAIF_WRK_LUT_BASE, 0x40005b90\r
-.set CYDEV_ANAIF_WRK_LUT_SIZE, 0x00000005\r
-.set CYDEV_ANAIF_WRK_LUT_SR, 0x40005b90\r
-.set CYDEV_ANAIF_WRK_LUT_WRK1, 0x40005b91\r
-.set CYDEV_ANAIF_WRK_LUT_MSK, 0x40005b92\r
-.set CYDEV_ANAIF_WRK_LUT_CLK, 0x40005b93\r
-.set CYDEV_ANAIF_WRK_LUT_CPTR, 0x40005b94\r
-.set CYDEV_ANAIF_WRK_CMP_BASE, 0x40005b96\r
-.set CYDEV_ANAIF_WRK_CMP_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_WRK_CMP_WRK, 0x40005b96\r
-.set CYDEV_ANAIF_WRK_CMP_TST, 0x40005b97\r
-.set CYDEV_ANAIF_WRK_SC_BASE, 0x40005b98\r
-.set CYDEV_ANAIF_WRK_SC_SIZE, 0x00000005\r
-.set CYDEV_ANAIF_WRK_SC_SR, 0x40005b98\r
-.set CYDEV_ANAIF_WRK_SC_WRK1, 0x40005b99\r
-.set CYDEV_ANAIF_WRK_SC_MSK, 0x40005b9a\r
-.set CYDEV_ANAIF_WRK_SC_CMPINV, 0x40005b9b\r
-.set CYDEV_ANAIF_WRK_SC_CPTR, 0x40005b9c\r
-.set CYDEV_ANAIF_WRK_SAR0_BASE, 0x40005ba0\r
-.set CYDEV_ANAIF_WRK_SAR0_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_WRK_SAR0_WRK0, 0x40005ba0\r
-.set CYDEV_ANAIF_WRK_SAR0_WRK1, 0x40005ba1\r
-.set CYDEV_ANAIF_WRK_SAR1_BASE, 0x40005ba2\r
-.set CYDEV_ANAIF_WRK_SAR1_SIZE, 0x00000002\r
-.set CYDEV_ANAIF_WRK_SAR1_WRK0, 0x40005ba2\r
-.set CYDEV_ANAIF_WRK_SAR1_WRK1, 0x40005ba3\r
-.set CYDEV_ANAIF_WRK_SARS_BASE, 0x40005ba8\r
-.set CYDEV_ANAIF_WRK_SARS_SIZE, 0x00000001\r
-.set CYDEV_ANAIF_WRK_SARS_SOF, 0x40005ba8\r
-.set CYDEV_USB_BASE, 0x40006000\r
-.set CYDEV_USB_SIZE, 0x00000300\r
-.set CYDEV_USB_EP0_DR0, 0x40006000\r
-.set CYDEV_USB_EP0_DR1, 0x40006001\r
-.set CYDEV_USB_EP0_DR2, 0x40006002\r
-.set CYDEV_USB_EP0_DR3, 0x40006003\r
-.set CYDEV_USB_EP0_DR4, 0x40006004\r
-.set CYDEV_USB_EP0_DR5, 0x40006005\r
-.set CYDEV_USB_EP0_DR6, 0x40006006\r
-.set CYDEV_USB_EP0_DR7, 0x40006007\r
-.set CYDEV_USB_CR0, 0x40006008\r
-.set CYDEV_USB_CR1, 0x40006009\r
-.set CYDEV_USB_SIE_EP_INT_EN, 0x4000600a\r
-.set CYDEV_USB_SIE_EP_INT_SR, 0x4000600b\r
-.set CYDEV_USB_SIE_EP1_BASE, 0x4000600c\r
-.set CYDEV_USB_SIE_EP1_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP1_CNT0, 0x4000600c\r
-.set CYDEV_USB_SIE_EP1_CNT1, 0x4000600d\r
-.set CYDEV_USB_SIE_EP1_CR0, 0x4000600e\r
-.set CYDEV_USB_USBIO_CR0, 0x40006010\r
-.set CYDEV_USB_USBIO_CR1, 0x40006012\r
-.set CYDEV_USB_DYN_RECONFIG, 0x40006014\r
-.set CYDEV_USB_SOF0, 0x40006018\r
-.set CYDEV_USB_SOF1, 0x40006019\r
-.set CYDEV_USB_SIE_EP2_BASE, 0x4000601c\r
-.set CYDEV_USB_SIE_EP2_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP2_CNT0, 0x4000601c\r
-.set CYDEV_USB_SIE_EP2_CNT1, 0x4000601d\r
-.set CYDEV_USB_SIE_EP2_CR0, 0x4000601e\r
-.set CYDEV_USB_EP0_CR, 0x40006028\r
-.set CYDEV_USB_EP0_CNT, 0x40006029\r
-.set CYDEV_USB_SIE_EP3_BASE, 0x4000602c\r
-.set CYDEV_USB_SIE_EP3_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP3_CNT0, 0x4000602c\r
-.set CYDEV_USB_SIE_EP3_CNT1, 0x4000602d\r
-.set CYDEV_USB_SIE_EP3_CR0, 0x4000602e\r
-.set CYDEV_USB_SIE_EP4_BASE, 0x4000603c\r
-.set CYDEV_USB_SIE_EP4_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP4_CNT0, 0x4000603c\r
-.set CYDEV_USB_SIE_EP4_CNT1, 0x4000603d\r
-.set CYDEV_USB_SIE_EP4_CR0, 0x4000603e\r
-.set CYDEV_USB_SIE_EP5_BASE, 0x4000604c\r
-.set CYDEV_USB_SIE_EP5_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP5_CNT0, 0x4000604c\r
-.set CYDEV_USB_SIE_EP5_CNT1, 0x4000604d\r
-.set CYDEV_USB_SIE_EP5_CR0, 0x4000604e\r
-.set CYDEV_USB_SIE_EP6_BASE, 0x4000605c\r
-.set CYDEV_USB_SIE_EP6_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP6_CNT0, 0x4000605c\r
-.set CYDEV_USB_SIE_EP6_CNT1, 0x4000605d\r
-.set CYDEV_USB_SIE_EP6_CR0, 0x4000605e\r
-.set CYDEV_USB_SIE_EP7_BASE, 0x4000606c\r
-.set CYDEV_USB_SIE_EP7_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP7_CNT0, 0x4000606c\r
-.set CYDEV_USB_SIE_EP7_CNT1, 0x4000606d\r
-.set CYDEV_USB_SIE_EP7_CR0, 0x4000606e\r
-.set CYDEV_USB_SIE_EP8_BASE, 0x4000607c\r
-.set CYDEV_USB_SIE_EP8_SIZE, 0x00000003\r
-.set CYDEV_USB_SIE_EP8_CNT0, 0x4000607c\r
-.set CYDEV_USB_SIE_EP8_CNT1, 0x4000607d\r
-.set CYDEV_USB_SIE_EP8_CR0, 0x4000607e\r
-.set CYDEV_USB_ARB_EP1_BASE, 0x40006080\r
-.set CYDEV_USB_ARB_EP1_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP1_CFG, 0x40006080\r
-.set CYDEV_USB_ARB_EP1_INT_EN, 0x40006081\r
-.set CYDEV_USB_ARB_EP1_SR, 0x40006082\r
-.set CYDEV_USB_ARB_RW1_BASE, 0x40006084\r
-.set CYDEV_USB_ARB_RW1_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW1_WA, 0x40006084\r
-.set CYDEV_USB_ARB_RW1_WA_MSB, 0x40006085\r
-.set CYDEV_USB_ARB_RW1_RA, 0x40006086\r
-.set CYDEV_USB_ARB_RW1_RA_MSB, 0x40006087\r
-.set CYDEV_USB_ARB_RW1_DR, 0x40006088\r
-.set CYDEV_USB_BUF_SIZE, 0x4000608c\r
-.set CYDEV_USB_EP_ACTIVE, 0x4000608e\r
-.set CYDEV_USB_EP_TYPE, 0x4000608f\r
-.set CYDEV_USB_ARB_EP2_BASE, 0x40006090\r
-.set CYDEV_USB_ARB_EP2_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP2_CFG, 0x40006090\r
-.set CYDEV_USB_ARB_EP2_INT_EN, 0x40006091\r
-.set CYDEV_USB_ARB_EP2_SR, 0x40006092\r
-.set CYDEV_USB_ARB_RW2_BASE, 0x40006094\r
-.set CYDEV_USB_ARB_RW2_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW2_WA, 0x40006094\r
-.set CYDEV_USB_ARB_RW2_WA_MSB, 0x40006095\r
-.set CYDEV_USB_ARB_RW2_RA, 0x40006096\r
-.set CYDEV_USB_ARB_RW2_RA_MSB, 0x40006097\r
-.set CYDEV_USB_ARB_RW2_DR, 0x40006098\r
-.set CYDEV_USB_ARB_CFG, 0x4000609c\r
-.set CYDEV_USB_USB_CLK_EN, 0x4000609d\r
-.set CYDEV_USB_ARB_INT_EN, 0x4000609e\r
-.set CYDEV_USB_ARB_INT_SR, 0x4000609f\r
-.set CYDEV_USB_ARB_EP3_BASE, 0x400060a0\r
-.set CYDEV_USB_ARB_EP3_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP3_CFG, 0x400060a0\r
-.set CYDEV_USB_ARB_EP3_INT_EN, 0x400060a1\r
-.set CYDEV_USB_ARB_EP3_SR, 0x400060a2\r
-.set CYDEV_USB_ARB_RW3_BASE, 0x400060a4\r
-.set CYDEV_USB_ARB_RW3_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW3_WA, 0x400060a4\r
-.set CYDEV_USB_ARB_RW3_WA_MSB, 0x400060a5\r
-.set CYDEV_USB_ARB_RW3_RA, 0x400060a6\r
-.set CYDEV_USB_ARB_RW3_RA_MSB, 0x400060a7\r
-.set CYDEV_USB_ARB_RW3_DR, 0x400060a8\r
-.set CYDEV_USB_CWA, 0x400060ac\r
-.set CYDEV_USB_CWA_MSB, 0x400060ad\r
-.set CYDEV_USB_ARB_EP4_BASE, 0x400060b0\r
-.set CYDEV_USB_ARB_EP4_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP4_CFG, 0x400060b0\r
-.set CYDEV_USB_ARB_EP4_INT_EN, 0x400060b1\r
-.set CYDEV_USB_ARB_EP4_SR, 0x400060b2\r
-.set CYDEV_USB_ARB_RW4_BASE, 0x400060b4\r
-.set CYDEV_USB_ARB_RW4_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW4_WA, 0x400060b4\r
-.set CYDEV_USB_ARB_RW4_WA_MSB, 0x400060b5\r
-.set CYDEV_USB_ARB_RW4_RA, 0x400060b6\r
-.set CYDEV_USB_ARB_RW4_RA_MSB, 0x400060b7\r
-.set CYDEV_USB_ARB_RW4_DR, 0x400060b8\r
-.set CYDEV_USB_DMA_THRES, 0x400060bc\r
-.set CYDEV_USB_DMA_THRES_MSB, 0x400060bd\r
-.set CYDEV_USB_ARB_EP5_BASE, 0x400060c0\r
-.set CYDEV_USB_ARB_EP5_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP5_CFG, 0x400060c0\r
-.set CYDEV_USB_ARB_EP5_INT_EN, 0x400060c1\r
-.set CYDEV_USB_ARB_EP5_SR, 0x400060c2\r
-.set CYDEV_USB_ARB_RW5_BASE, 0x400060c4\r
-.set CYDEV_USB_ARB_RW5_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW5_WA, 0x400060c4\r
-.set CYDEV_USB_ARB_RW5_WA_MSB, 0x400060c5\r
-.set CYDEV_USB_ARB_RW5_RA, 0x400060c6\r
-.set CYDEV_USB_ARB_RW5_RA_MSB, 0x400060c7\r
-.set CYDEV_USB_ARB_RW5_DR, 0x400060c8\r
-.set CYDEV_USB_BUS_RST_CNT, 0x400060cc\r
-.set CYDEV_USB_ARB_EP6_BASE, 0x400060d0\r
-.set CYDEV_USB_ARB_EP6_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP6_CFG, 0x400060d0\r
-.set CYDEV_USB_ARB_EP6_INT_EN, 0x400060d1\r
-.set CYDEV_USB_ARB_EP6_SR, 0x400060d2\r
-.set CYDEV_USB_ARB_RW6_BASE, 0x400060d4\r
-.set CYDEV_USB_ARB_RW6_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW6_WA, 0x400060d4\r
-.set CYDEV_USB_ARB_RW6_WA_MSB, 0x400060d5\r
-.set CYDEV_USB_ARB_RW6_RA, 0x400060d6\r
-.set CYDEV_USB_ARB_RW6_RA_MSB, 0x400060d7\r
-.set CYDEV_USB_ARB_RW6_DR, 0x400060d8\r
-.set CYDEV_USB_ARB_EP7_BASE, 0x400060e0\r
-.set CYDEV_USB_ARB_EP7_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP7_CFG, 0x400060e0\r
-.set CYDEV_USB_ARB_EP7_INT_EN, 0x400060e1\r
-.set CYDEV_USB_ARB_EP7_SR, 0x400060e2\r
-.set CYDEV_USB_ARB_RW7_BASE, 0x400060e4\r
-.set CYDEV_USB_ARB_RW7_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW7_WA, 0x400060e4\r
-.set CYDEV_USB_ARB_RW7_WA_MSB, 0x400060e5\r
-.set CYDEV_USB_ARB_RW7_RA, 0x400060e6\r
-.set CYDEV_USB_ARB_RW7_RA_MSB, 0x400060e7\r
-.set CYDEV_USB_ARB_RW7_DR, 0x400060e8\r
-.set CYDEV_USB_ARB_EP8_BASE, 0x400060f0\r
-.set CYDEV_USB_ARB_EP8_SIZE, 0x00000003\r
-.set CYDEV_USB_ARB_EP8_CFG, 0x400060f0\r
-.set CYDEV_USB_ARB_EP8_INT_EN, 0x400060f1\r
-.set CYDEV_USB_ARB_EP8_SR, 0x400060f2\r
-.set CYDEV_USB_ARB_RW8_BASE, 0x400060f4\r
-.set CYDEV_USB_ARB_RW8_SIZE, 0x00000005\r
-.set CYDEV_USB_ARB_RW8_WA, 0x400060f4\r
-.set CYDEV_USB_ARB_RW8_WA_MSB, 0x400060f5\r
-.set CYDEV_USB_ARB_RW8_RA, 0x400060f6\r
-.set CYDEV_USB_ARB_RW8_RA_MSB, 0x400060f7\r
-.set CYDEV_USB_ARB_RW8_DR, 0x400060f8\r
-.set CYDEV_USB_MEM_BASE, 0x40006100\r
-.set CYDEV_USB_MEM_SIZE, 0x00000200\r
-.set CYDEV_USB_MEM_DATA_MBASE, 0x40006100\r
-.set CYDEV_USB_MEM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_UWRK_BASE, 0x40006400\r
-.set CYDEV_UWRK_SIZE, 0x00000b60\r
-.set CYDEV_UWRK_UWRK8_BASE, 0x40006400\r
-.set CYDEV_UWRK_UWRK8_SIZE, 0x000003b0\r
-.set CYDEV_UWRK_UWRK8_B0_BASE, 0x40006400\r
-.set CYDEV_UWRK_UWRK8_B0_SIZE, 0x000000b0\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_A0, 0x40006400\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_A0, 0x40006401\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_A0, 0x40006402\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_A0, 0x40006403\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_A0, 0x40006404\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_A0, 0x40006405\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_A0, 0x40006406\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_A0, 0x40006407\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_A0, 0x40006408\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_A0, 0x40006409\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_A0, 0x4000640a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_A0, 0x4000640b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_A0, 0x4000640c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_A0, 0x4000640d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_A0, 0x4000640e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_A0, 0x4000640f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_A1, 0x40006410\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_A1, 0x40006411\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_A1, 0x40006412\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_A1, 0x40006413\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_A1, 0x40006414\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_A1, 0x40006415\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_A1, 0x40006416\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_A1, 0x40006417\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_A1, 0x40006418\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_A1, 0x40006419\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_A1, 0x4000641a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_A1, 0x4000641b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_A1, 0x4000641c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_A1, 0x4000641d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_A1, 0x4000641e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_A1, 0x4000641f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_D0, 0x40006420\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_D0, 0x40006421\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_D0, 0x40006422\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_D0, 0x40006423\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_D0, 0x40006424\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_D0, 0x40006425\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_D0, 0x40006426\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_D0, 0x40006427\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_D0, 0x40006428\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_D0, 0x40006429\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_D0, 0x4000642a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_D0, 0x4000642b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_D0, 0x4000642c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_D0, 0x4000642d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_D0, 0x4000642e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_D0, 0x4000642f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_D1, 0x40006430\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_D1, 0x40006431\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_D1, 0x40006432\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_D1, 0x40006433\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_D1, 0x40006434\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_D1, 0x40006435\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_D1, 0x40006436\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_D1, 0x40006437\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_D1, 0x40006438\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_D1, 0x40006439\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_D1, 0x4000643a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_D1, 0x4000643b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_D1, 0x4000643c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_D1, 0x4000643d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_D1, 0x4000643e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_D1, 0x4000643f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_F0, 0x40006440\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_F0, 0x40006441\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_F0, 0x40006442\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_F0, 0x40006443\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_F0, 0x40006444\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_F0, 0x40006445\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_F0, 0x40006446\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_F0, 0x40006447\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_F0, 0x40006448\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_F0, 0x40006449\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_F0, 0x4000644a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_F0, 0x4000644b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_F0, 0x4000644c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_F0, 0x4000644d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_F0, 0x4000644e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_F0, 0x4000644f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_F1, 0x40006450\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_F1, 0x40006451\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_F1, 0x40006452\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_F1, 0x40006453\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_F1, 0x40006454\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_F1, 0x40006455\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_F1, 0x40006456\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_F1, 0x40006457\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_F1, 0x40006458\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_F1, 0x40006459\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_F1, 0x4000645a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_F1, 0x4000645b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_F1, 0x4000645c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_F1, 0x4000645d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_F1, 0x4000645e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_F1, 0x4000645f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_ST, 0x40006460\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_ST, 0x40006461\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_ST, 0x40006462\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_ST, 0x40006463\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_ST, 0x40006464\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_ST, 0x40006465\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_ST, 0x40006466\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_ST, 0x40006467\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_ST, 0x40006468\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_ST, 0x40006469\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_ST, 0x4000646a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_ST, 0x4000646b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_ST, 0x4000646c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_ST, 0x4000646d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_ST, 0x4000646e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_ST, 0x4000646f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_CTL, 0x40006470\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_CTL, 0x40006471\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_CTL, 0x40006472\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_CTL, 0x40006473\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_CTL, 0x40006474\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_CTL, 0x40006475\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_CTL, 0x40006476\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_CTL, 0x40006477\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_CTL, 0x40006478\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_CTL, 0x40006479\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_CTL, 0x4000647a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_CTL, 0x4000647b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_CTL, 0x4000647c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_CTL, 0x4000647d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_CTL, 0x4000647e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_CTL, 0x4000647f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_MSK, 0x40006480\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_MSK, 0x40006481\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_MSK, 0x40006482\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_MSK, 0x40006483\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_MSK, 0x40006484\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_MSK, 0x40006485\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_MSK, 0x40006486\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_MSK, 0x40006487\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_MSK, 0x40006488\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_MSK, 0x40006489\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_MSK, 0x4000648a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_MSK, 0x4000648b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_MSK, 0x4000648c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_MSK, 0x4000648d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_MSK, 0x4000648e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_MSK, 0x4000648f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_ACTL, 0x40006490\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_ACTL, 0x40006491\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_ACTL, 0x40006492\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_ACTL, 0x40006493\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_ACTL, 0x40006494\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_ACTL, 0x40006495\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_ACTL, 0x40006496\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_ACTL, 0x40006497\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_ACTL, 0x40006498\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_ACTL, 0x40006499\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_ACTL, 0x4000649a\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_ACTL, 0x4000649b\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_ACTL, 0x4000649c\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_ACTL, 0x4000649d\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_ACTL, 0x4000649e\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_ACTL, 0x4000649f\r
-.set CYDEV_UWRK_UWRK8_B0_UDB00_MC, 0x400064a0\r
-.set CYDEV_UWRK_UWRK8_B0_UDB01_MC, 0x400064a1\r
-.set CYDEV_UWRK_UWRK8_B0_UDB02_MC, 0x400064a2\r
-.set CYDEV_UWRK_UWRK8_B0_UDB03_MC, 0x400064a3\r
-.set CYDEV_UWRK_UWRK8_B0_UDB04_MC, 0x400064a4\r
-.set CYDEV_UWRK_UWRK8_B0_UDB05_MC, 0x400064a5\r
-.set CYDEV_UWRK_UWRK8_B0_UDB06_MC, 0x400064a6\r
-.set CYDEV_UWRK_UWRK8_B0_UDB07_MC, 0x400064a7\r
-.set CYDEV_UWRK_UWRK8_B0_UDB08_MC, 0x400064a8\r
-.set CYDEV_UWRK_UWRK8_B0_UDB09_MC, 0x400064a9\r
-.set CYDEV_UWRK_UWRK8_B0_UDB10_MC, 0x400064aa\r
-.set CYDEV_UWRK_UWRK8_B0_UDB11_MC, 0x400064ab\r
-.set CYDEV_UWRK_UWRK8_B0_UDB12_MC, 0x400064ac\r
-.set CYDEV_UWRK_UWRK8_B0_UDB13_MC, 0x400064ad\r
-.set CYDEV_UWRK_UWRK8_B0_UDB14_MC, 0x400064ae\r
-.set CYDEV_UWRK_UWRK8_B0_UDB15_MC, 0x400064af\r
-.set CYDEV_UWRK_UWRK8_B1_BASE, 0x40006500\r
-.set CYDEV_UWRK_UWRK8_B1_SIZE, 0x000000b0\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_A0, 0x40006504\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_A0, 0x40006505\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_A0, 0x40006506\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_A0, 0x40006507\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_A0, 0x40006508\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_A0, 0x40006509\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_A0, 0x4000650a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_A0, 0x4000650b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_A1, 0x40006514\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_A1, 0x40006515\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_A1, 0x40006516\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_A1, 0x40006517\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_A1, 0x40006518\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_A1, 0x40006519\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_A1, 0x4000651a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_A1, 0x4000651b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_D0, 0x40006524\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_D0, 0x40006525\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_D0, 0x40006526\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_D0, 0x40006527\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_D0, 0x40006528\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_D0, 0x40006529\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_D0, 0x4000652a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_D0, 0x4000652b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_D1, 0x40006534\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_D1, 0x40006535\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_D1, 0x40006536\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_D1, 0x40006537\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_D1, 0x40006538\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_D1, 0x40006539\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_D1, 0x4000653a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_D1, 0x4000653b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_F0, 0x40006544\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_F0, 0x40006545\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_F0, 0x40006546\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_F0, 0x40006547\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_F0, 0x40006548\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_F0, 0x40006549\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_F0, 0x4000654a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_F0, 0x4000654b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_F1, 0x40006554\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_F1, 0x40006555\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_F1, 0x40006556\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_F1, 0x40006557\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_F1, 0x40006558\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_F1, 0x40006559\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_F1, 0x4000655a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_F1, 0x4000655b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_ST, 0x40006564\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_ST, 0x40006565\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_ST, 0x40006566\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_ST, 0x40006567\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_ST, 0x40006568\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_ST, 0x40006569\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_ST, 0x4000656a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_ST, 0x4000656b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_CTL, 0x40006574\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_CTL, 0x40006575\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_CTL, 0x40006576\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_CTL, 0x40006577\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_CTL, 0x40006578\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_CTL, 0x40006579\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_CTL, 0x4000657a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_CTL, 0x4000657b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_MSK, 0x40006584\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_MSK, 0x40006585\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_MSK, 0x40006586\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_MSK, 0x40006587\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_MSK, 0x40006588\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_MSK, 0x40006589\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_MSK, 0x4000658a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_MSK, 0x4000658b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_ACTL, 0x40006594\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_ACTL, 0x40006595\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_ACTL, 0x40006596\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_ACTL, 0x40006597\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_ACTL, 0x40006598\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_ACTL, 0x40006599\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_ACTL, 0x4000659a\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_ACTL, 0x4000659b\r
-.set CYDEV_UWRK_UWRK8_B1_UDB04_MC, 0x400065a4\r
-.set CYDEV_UWRK_UWRK8_B1_UDB05_MC, 0x400065a5\r
-.set CYDEV_UWRK_UWRK8_B1_UDB06_MC, 0x400065a6\r
-.set CYDEV_UWRK_UWRK8_B1_UDB07_MC, 0x400065a7\r
-.set CYDEV_UWRK_UWRK8_B1_UDB08_MC, 0x400065a8\r
-.set CYDEV_UWRK_UWRK8_B1_UDB09_MC, 0x400065a9\r
-.set CYDEV_UWRK_UWRK8_B1_UDB10_MC, 0x400065aa\r
-.set CYDEV_UWRK_UWRK8_B1_UDB11_MC, 0x400065ab\r
-.set CYDEV_UWRK_UWRK16_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_SIZE, 0x00000760\r
-.set CYDEV_UWRK_UWRK16_CAT_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_CAT_SIZE, 0x00000760\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_SIZE, 0x00000160\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1, 0x40006802\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1, 0x40006804\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1, 0x40006806\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1, 0x40006808\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1, 0x4000680a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1, 0x4000680c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1, 0x4000680e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1, 0x40006810\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1, 0x40006812\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1, 0x40006814\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1, 0x40006816\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1, 0x40006818\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1, 0x4000681a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1, 0x4000681c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1, 0x4000681e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1, 0x40006840\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1, 0x40006842\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1, 0x40006844\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1, 0x40006846\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1, 0x40006848\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1, 0x4000684a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1, 0x4000684c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1, 0x4000684e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1, 0x40006850\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1, 0x40006852\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1, 0x40006854\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1, 0x40006856\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1, 0x40006858\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1, 0x4000685a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1, 0x4000685c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1, 0x4000685e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1, 0x40006880\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1, 0x40006882\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1, 0x40006884\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1, 0x40006886\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1, 0x40006888\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1, 0x4000688a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1, 0x4000688c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1, 0x4000688e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1, 0x40006890\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1, 0x40006892\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1, 0x40006894\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1, 0x40006896\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1, 0x40006898\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1, 0x4000689a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1, 0x4000689c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1, 0x4000689e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL, 0x400068c0\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL, 0x400068c2\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL, 0x400068c4\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL, 0x400068c6\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL, 0x400068c8\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL, 0x400068ca\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL, 0x400068cc\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL, 0x400068ce\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL, 0x400068d0\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL, 0x400068d2\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL, 0x400068d4\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL, 0x400068d6\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL, 0x400068d8\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL, 0x400068da\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL, 0x400068dc\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL, 0x400068de\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL, 0x40006900\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL, 0x40006902\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL, 0x40006904\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL, 0x40006906\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL, 0x40006908\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL, 0x4000690a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL, 0x4000690c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL, 0x4000690e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL, 0x40006910\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL, 0x40006912\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL, 0x40006914\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL, 0x40006916\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL, 0x40006918\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL, 0x4000691a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL, 0x4000691c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL, 0x4000691e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00, 0x40006940\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00, 0x40006942\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00, 0x40006944\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00, 0x40006946\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00, 0x40006948\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00, 0x4000694a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00, 0x4000694c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00, 0x4000694e\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00, 0x40006950\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00, 0x40006952\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00, 0x40006954\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00, 0x40006956\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00, 0x40006958\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00, 0x4000695a\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00, 0x4000695c\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00, 0x4000695e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_BASE, 0x40006a00\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_SIZE, 0x00000160\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1, 0x40006a08\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1, 0x40006a0a\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1, 0x40006a0c\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1, 0x40006a0e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1, 0x40006a10\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1, 0x40006a12\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1, 0x40006a14\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1, 0x40006a16\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1, 0x40006a48\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1, 0x40006a4a\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1, 0x40006a4c\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1, 0x40006a4e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1, 0x40006a50\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1, 0x40006a52\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1, 0x40006a54\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1, 0x40006a56\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1, 0x40006a88\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1, 0x40006a8a\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1, 0x40006a8c\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1, 0x40006a8e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1, 0x40006a90\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1, 0x40006a92\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1, 0x40006a94\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1, 0x40006a96\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL, 0x40006ac8\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL, 0x40006aca\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL, 0x40006acc\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL, 0x40006ace\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL, 0x40006ad0\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL, 0x40006ad2\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL, 0x40006ad4\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL, 0x40006ad6\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL, 0x40006b08\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL, 0x40006b0a\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL, 0x40006b0c\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL, 0x40006b0e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL, 0x40006b10\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL, 0x40006b12\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL, 0x40006b14\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL, 0x40006b16\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00, 0x40006b48\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00, 0x40006b4a\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00, 0x40006b4c\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00, 0x40006b4e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00, 0x40006b50\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00, 0x40006b52\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00, 0x40006b54\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00, 0x40006b56\r
-.set CYDEV_UWRK_UWRK16_DEF_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_DEF_SIZE, 0x0000075e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_SIZE, 0x0000015e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0, 0x40006802\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0, 0x40006804\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0, 0x40006806\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0, 0x40006808\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0, 0x4000680a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0, 0x4000680c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0, 0x4000680e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0, 0x40006810\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0, 0x40006812\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0, 0x40006814\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0, 0x40006816\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0, 0x40006818\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0, 0x4000681a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0, 0x4000681c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1, 0x40006820\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1, 0x40006822\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1, 0x40006824\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1, 0x40006826\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1, 0x40006828\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1, 0x4000682a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1, 0x4000682c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1, 0x4000682e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1, 0x40006830\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1, 0x40006832\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1, 0x40006834\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1, 0x40006836\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1, 0x40006838\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1, 0x4000683a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1, 0x4000683c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0, 0x40006840\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0, 0x40006842\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0, 0x40006844\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0, 0x40006846\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0, 0x40006848\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0, 0x4000684a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0, 0x4000684c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0, 0x4000684e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0, 0x40006850\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0, 0x40006852\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0, 0x40006854\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0, 0x40006856\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0, 0x40006858\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0, 0x4000685a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0, 0x4000685c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1, 0x40006860\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1, 0x40006862\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1, 0x40006864\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1, 0x40006866\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1, 0x40006868\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1, 0x4000686a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1, 0x4000686c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1, 0x4000686e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1, 0x40006870\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1, 0x40006872\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1, 0x40006874\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1, 0x40006876\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1, 0x40006878\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1, 0x4000687a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1, 0x4000687c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0, 0x40006880\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0, 0x40006882\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0, 0x40006884\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0, 0x40006886\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0, 0x40006888\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0, 0x4000688a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0, 0x4000688c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0, 0x4000688e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0, 0x40006890\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0, 0x40006892\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0, 0x40006894\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0, 0x40006896\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0, 0x40006898\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0, 0x4000689a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0, 0x4000689c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1, 0x400068a0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1, 0x400068a2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1, 0x400068a4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1, 0x400068a6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1, 0x400068a8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1, 0x400068aa\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1, 0x400068ac\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1, 0x400068ae\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1, 0x400068b0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1, 0x400068b2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1, 0x400068b4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1, 0x400068b6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1, 0x400068b8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1, 0x400068ba\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1, 0x400068bc\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST, 0x400068c0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST, 0x400068c2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST, 0x400068c4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST, 0x400068c6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST, 0x400068c8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST, 0x400068ca\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST, 0x400068cc\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST, 0x400068ce\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST, 0x400068d0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST, 0x400068d2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST, 0x400068d4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST, 0x400068d6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST, 0x400068d8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST, 0x400068da\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST, 0x400068dc\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL, 0x400068e0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL, 0x400068e2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL, 0x400068e4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL, 0x400068e6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL, 0x400068e8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL, 0x400068ea\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL, 0x400068ec\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL, 0x400068ee\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL, 0x400068f0\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL, 0x400068f2\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL, 0x400068f4\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL, 0x400068f6\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL, 0x400068f8\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL, 0x400068fa\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL, 0x400068fc\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK, 0x40006900\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK, 0x40006902\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK, 0x40006904\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK, 0x40006906\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK, 0x40006908\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK, 0x4000690a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK, 0x4000690c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK, 0x4000690e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK, 0x40006910\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK, 0x40006912\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK, 0x40006914\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK, 0x40006916\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK, 0x40006918\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK, 0x4000691a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK, 0x4000691c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL, 0x40006920\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL, 0x40006922\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL, 0x40006924\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL, 0x40006926\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL, 0x40006928\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL, 0x4000692a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL, 0x4000692c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL, 0x4000692e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL, 0x40006930\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL, 0x40006932\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL, 0x40006934\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL, 0x40006936\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL, 0x40006938\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL, 0x4000693a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL, 0x4000693c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC, 0x40006940\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC, 0x40006942\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC, 0x40006944\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC, 0x40006946\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC, 0x40006948\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC, 0x4000694a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC, 0x4000694c\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC, 0x4000694e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC, 0x40006950\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC, 0x40006952\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC, 0x40006954\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC, 0x40006956\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC, 0x40006958\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC, 0x4000695a\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC, 0x4000695c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_BASE, 0x40006a00\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_SIZE, 0x0000015e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0, 0x40006a08\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0, 0x40006a0a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0, 0x40006a0c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0, 0x40006a0e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0, 0x40006a10\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0, 0x40006a12\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0, 0x40006a14\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0, 0x40006a16\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1, 0x40006a28\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1, 0x40006a2a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1, 0x40006a2c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1, 0x40006a2e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1, 0x40006a30\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1, 0x40006a32\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1, 0x40006a34\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1, 0x40006a36\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0, 0x40006a48\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0, 0x40006a4a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0, 0x40006a4c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0, 0x40006a4e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0, 0x40006a50\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0, 0x40006a52\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0, 0x40006a54\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0, 0x40006a56\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1, 0x40006a68\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1, 0x40006a6a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1, 0x40006a6c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1, 0x40006a6e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1, 0x40006a70\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1, 0x40006a72\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1, 0x40006a74\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1, 0x40006a76\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0, 0x40006a88\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0, 0x40006a8a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0, 0x40006a8c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0, 0x40006a8e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0, 0x40006a90\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0, 0x40006a92\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0, 0x40006a94\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0, 0x40006a96\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1, 0x40006aa8\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1, 0x40006aaa\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1, 0x40006aac\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1, 0x40006aae\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1, 0x40006ab0\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1, 0x40006ab2\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1, 0x40006ab4\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1, 0x40006ab6\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST, 0x40006ac8\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST, 0x40006aca\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST, 0x40006acc\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST, 0x40006ace\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST, 0x40006ad0\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST, 0x40006ad2\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST, 0x40006ad4\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST, 0x40006ad6\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL, 0x40006ae8\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL, 0x40006aea\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL, 0x40006aec\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL, 0x40006aee\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL, 0x40006af0\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL, 0x40006af2\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL, 0x40006af4\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL, 0x40006af6\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK, 0x40006b08\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK, 0x40006b0a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK, 0x40006b0c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK, 0x40006b0e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK, 0x40006b10\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK, 0x40006b12\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK, 0x40006b14\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK, 0x40006b16\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL, 0x40006b28\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL, 0x40006b2a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL, 0x40006b2c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL, 0x40006b2e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL, 0x40006b30\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL, 0x40006b32\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL, 0x40006b34\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL, 0x40006b36\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC, 0x40006b48\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC, 0x40006b4a\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC, 0x40006b4c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC, 0x40006b4e\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC, 0x40006b50\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC, 0x40006b52\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC, 0x40006b54\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC, 0x40006b56\r
-.set CYDEV_PHUB_BASE, 0x40007000\r
-.set CYDEV_PHUB_SIZE, 0x00000c00\r
-.set CYDEV_PHUB_CFG, 0x40007000\r
-.set CYDEV_PHUB_ERR, 0x40007004\r
-.set CYDEV_PHUB_ERR_ADR, 0x40007008\r
-.set CYDEV_PHUB_CH0_BASE, 0x40007010\r
-.set CYDEV_PHUB_CH0_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH0_BASIC_CFG, 0x40007010\r
-.set CYDEV_PHUB_CH0_ACTION, 0x40007014\r
-.set CYDEV_PHUB_CH0_BASIC_STATUS, 0x40007018\r
-.set CYDEV_PHUB_CH1_BASE, 0x40007020\r
-.set CYDEV_PHUB_CH1_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH1_BASIC_CFG, 0x40007020\r
-.set CYDEV_PHUB_CH1_ACTION, 0x40007024\r
-.set CYDEV_PHUB_CH1_BASIC_STATUS, 0x40007028\r
-.set CYDEV_PHUB_CH2_BASE, 0x40007030\r
-.set CYDEV_PHUB_CH2_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH2_BASIC_CFG, 0x40007030\r
-.set CYDEV_PHUB_CH2_ACTION, 0x40007034\r
-.set CYDEV_PHUB_CH2_BASIC_STATUS, 0x40007038\r
-.set CYDEV_PHUB_CH3_BASE, 0x40007040\r
-.set CYDEV_PHUB_CH3_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH3_BASIC_CFG, 0x40007040\r
-.set CYDEV_PHUB_CH3_ACTION, 0x40007044\r
-.set CYDEV_PHUB_CH3_BASIC_STATUS, 0x40007048\r
-.set CYDEV_PHUB_CH4_BASE, 0x40007050\r
-.set CYDEV_PHUB_CH4_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH4_BASIC_CFG, 0x40007050\r
-.set CYDEV_PHUB_CH4_ACTION, 0x40007054\r
-.set CYDEV_PHUB_CH4_BASIC_STATUS, 0x40007058\r
-.set CYDEV_PHUB_CH5_BASE, 0x40007060\r
-.set CYDEV_PHUB_CH5_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH5_BASIC_CFG, 0x40007060\r
-.set CYDEV_PHUB_CH5_ACTION, 0x40007064\r
-.set CYDEV_PHUB_CH5_BASIC_STATUS, 0x40007068\r
-.set CYDEV_PHUB_CH6_BASE, 0x40007070\r
-.set CYDEV_PHUB_CH6_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH6_BASIC_CFG, 0x40007070\r
-.set CYDEV_PHUB_CH6_ACTION, 0x40007074\r
-.set CYDEV_PHUB_CH6_BASIC_STATUS, 0x40007078\r
-.set CYDEV_PHUB_CH7_BASE, 0x40007080\r
-.set CYDEV_PHUB_CH7_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH7_BASIC_CFG, 0x40007080\r
-.set CYDEV_PHUB_CH7_ACTION, 0x40007084\r
-.set CYDEV_PHUB_CH7_BASIC_STATUS, 0x40007088\r
-.set CYDEV_PHUB_CH8_BASE, 0x40007090\r
-.set CYDEV_PHUB_CH8_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH8_BASIC_CFG, 0x40007090\r
-.set CYDEV_PHUB_CH8_ACTION, 0x40007094\r
-.set CYDEV_PHUB_CH8_BASIC_STATUS, 0x40007098\r
-.set CYDEV_PHUB_CH9_BASE, 0x400070a0\r
-.set CYDEV_PHUB_CH9_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH9_BASIC_CFG, 0x400070a0\r
-.set CYDEV_PHUB_CH9_ACTION, 0x400070a4\r
-.set CYDEV_PHUB_CH9_BASIC_STATUS, 0x400070a8\r
-.set CYDEV_PHUB_CH10_BASE, 0x400070b0\r
-.set CYDEV_PHUB_CH10_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH10_BASIC_CFG, 0x400070b0\r
-.set CYDEV_PHUB_CH10_ACTION, 0x400070b4\r
-.set CYDEV_PHUB_CH10_BASIC_STATUS, 0x400070b8\r
-.set CYDEV_PHUB_CH11_BASE, 0x400070c0\r
-.set CYDEV_PHUB_CH11_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH11_BASIC_CFG, 0x400070c0\r
-.set CYDEV_PHUB_CH11_ACTION, 0x400070c4\r
-.set CYDEV_PHUB_CH11_BASIC_STATUS, 0x400070c8\r
-.set CYDEV_PHUB_CH12_BASE, 0x400070d0\r
-.set CYDEV_PHUB_CH12_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH12_BASIC_CFG, 0x400070d0\r
-.set CYDEV_PHUB_CH12_ACTION, 0x400070d4\r
-.set CYDEV_PHUB_CH12_BASIC_STATUS, 0x400070d8\r
-.set CYDEV_PHUB_CH13_BASE, 0x400070e0\r
-.set CYDEV_PHUB_CH13_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH13_BASIC_CFG, 0x400070e0\r
-.set CYDEV_PHUB_CH13_ACTION, 0x400070e4\r
-.set CYDEV_PHUB_CH13_BASIC_STATUS, 0x400070e8\r
-.set CYDEV_PHUB_CH14_BASE, 0x400070f0\r
-.set CYDEV_PHUB_CH14_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH14_BASIC_CFG, 0x400070f0\r
-.set CYDEV_PHUB_CH14_ACTION, 0x400070f4\r
-.set CYDEV_PHUB_CH14_BASIC_STATUS, 0x400070f8\r
-.set CYDEV_PHUB_CH15_BASE, 0x40007100\r
-.set CYDEV_PHUB_CH15_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH15_BASIC_CFG, 0x40007100\r
-.set CYDEV_PHUB_CH15_ACTION, 0x40007104\r
-.set CYDEV_PHUB_CH15_BASIC_STATUS, 0x40007108\r
-.set CYDEV_PHUB_CH16_BASE, 0x40007110\r
-.set CYDEV_PHUB_CH16_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH16_BASIC_CFG, 0x40007110\r
-.set CYDEV_PHUB_CH16_ACTION, 0x40007114\r
-.set CYDEV_PHUB_CH16_BASIC_STATUS, 0x40007118\r
-.set CYDEV_PHUB_CH17_BASE, 0x40007120\r
-.set CYDEV_PHUB_CH17_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH17_BASIC_CFG, 0x40007120\r
-.set CYDEV_PHUB_CH17_ACTION, 0x40007124\r
-.set CYDEV_PHUB_CH17_BASIC_STATUS, 0x40007128\r
-.set CYDEV_PHUB_CH18_BASE, 0x40007130\r
-.set CYDEV_PHUB_CH18_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH18_BASIC_CFG, 0x40007130\r
-.set CYDEV_PHUB_CH18_ACTION, 0x40007134\r
-.set CYDEV_PHUB_CH18_BASIC_STATUS, 0x40007138\r
-.set CYDEV_PHUB_CH19_BASE, 0x40007140\r
-.set CYDEV_PHUB_CH19_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH19_BASIC_CFG, 0x40007140\r
-.set CYDEV_PHUB_CH19_ACTION, 0x40007144\r
-.set CYDEV_PHUB_CH19_BASIC_STATUS, 0x40007148\r
-.set CYDEV_PHUB_CH20_BASE, 0x40007150\r
-.set CYDEV_PHUB_CH20_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH20_BASIC_CFG, 0x40007150\r
-.set CYDEV_PHUB_CH20_ACTION, 0x40007154\r
-.set CYDEV_PHUB_CH20_BASIC_STATUS, 0x40007158\r
-.set CYDEV_PHUB_CH21_BASE, 0x40007160\r
-.set CYDEV_PHUB_CH21_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH21_BASIC_CFG, 0x40007160\r
-.set CYDEV_PHUB_CH21_ACTION, 0x40007164\r
-.set CYDEV_PHUB_CH21_BASIC_STATUS, 0x40007168\r
-.set CYDEV_PHUB_CH22_BASE, 0x40007170\r
-.set CYDEV_PHUB_CH22_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH22_BASIC_CFG, 0x40007170\r
-.set CYDEV_PHUB_CH22_ACTION, 0x40007174\r
-.set CYDEV_PHUB_CH22_BASIC_STATUS, 0x40007178\r
-.set CYDEV_PHUB_CH23_BASE, 0x40007180\r
-.set CYDEV_PHUB_CH23_SIZE, 0x0000000c\r
-.set CYDEV_PHUB_CH23_BASIC_CFG, 0x40007180\r
-.set CYDEV_PHUB_CH23_ACTION, 0x40007184\r
-.set CYDEV_PHUB_CH23_BASIC_STATUS, 0x40007188\r
-.set CYDEV_PHUB_CFGMEM0_BASE, 0x40007600\r
-.set CYDEV_PHUB_CFGMEM0_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM0_CFG0, 0x40007600\r
-.set CYDEV_PHUB_CFGMEM0_CFG1, 0x40007604\r
-.set CYDEV_PHUB_CFGMEM1_BASE, 0x40007608\r
-.set CYDEV_PHUB_CFGMEM1_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM1_CFG0, 0x40007608\r
-.set CYDEV_PHUB_CFGMEM1_CFG1, 0x4000760c\r
-.set CYDEV_PHUB_CFGMEM2_BASE, 0x40007610\r
-.set CYDEV_PHUB_CFGMEM2_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM2_CFG0, 0x40007610\r
-.set CYDEV_PHUB_CFGMEM2_CFG1, 0x40007614\r
-.set CYDEV_PHUB_CFGMEM3_BASE, 0x40007618\r
-.set CYDEV_PHUB_CFGMEM3_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM3_CFG0, 0x40007618\r
-.set CYDEV_PHUB_CFGMEM3_CFG1, 0x4000761c\r
-.set CYDEV_PHUB_CFGMEM4_BASE, 0x40007620\r
-.set CYDEV_PHUB_CFGMEM4_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM4_CFG0, 0x40007620\r
-.set CYDEV_PHUB_CFGMEM4_CFG1, 0x40007624\r
-.set CYDEV_PHUB_CFGMEM5_BASE, 0x40007628\r
-.set CYDEV_PHUB_CFGMEM5_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM5_CFG0, 0x40007628\r
-.set CYDEV_PHUB_CFGMEM5_CFG1, 0x4000762c\r
-.set CYDEV_PHUB_CFGMEM6_BASE, 0x40007630\r
-.set CYDEV_PHUB_CFGMEM6_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM6_CFG0, 0x40007630\r
-.set CYDEV_PHUB_CFGMEM6_CFG1, 0x40007634\r
-.set CYDEV_PHUB_CFGMEM7_BASE, 0x40007638\r
-.set CYDEV_PHUB_CFGMEM7_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM7_CFG0, 0x40007638\r
-.set CYDEV_PHUB_CFGMEM7_CFG1, 0x4000763c\r
-.set CYDEV_PHUB_CFGMEM8_BASE, 0x40007640\r
-.set CYDEV_PHUB_CFGMEM8_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM8_CFG0, 0x40007640\r
-.set CYDEV_PHUB_CFGMEM8_CFG1, 0x40007644\r
-.set CYDEV_PHUB_CFGMEM9_BASE, 0x40007648\r
-.set CYDEV_PHUB_CFGMEM9_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM9_CFG0, 0x40007648\r
-.set CYDEV_PHUB_CFGMEM9_CFG1, 0x4000764c\r
-.set CYDEV_PHUB_CFGMEM10_BASE, 0x40007650\r
-.set CYDEV_PHUB_CFGMEM10_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM10_CFG0, 0x40007650\r
-.set CYDEV_PHUB_CFGMEM10_CFG1, 0x40007654\r
-.set CYDEV_PHUB_CFGMEM11_BASE, 0x40007658\r
-.set CYDEV_PHUB_CFGMEM11_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM11_CFG0, 0x40007658\r
-.set CYDEV_PHUB_CFGMEM11_CFG1, 0x4000765c\r
-.set CYDEV_PHUB_CFGMEM12_BASE, 0x40007660\r
-.set CYDEV_PHUB_CFGMEM12_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM12_CFG0, 0x40007660\r
-.set CYDEV_PHUB_CFGMEM12_CFG1, 0x40007664\r
-.set CYDEV_PHUB_CFGMEM13_BASE, 0x40007668\r
-.set CYDEV_PHUB_CFGMEM13_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM13_CFG0, 0x40007668\r
-.set CYDEV_PHUB_CFGMEM13_CFG1, 0x4000766c\r
-.set CYDEV_PHUB_CFGMEM14_BASE, 0x40007670\r
-.set CYDEV_PHUB_CFGMEM14_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM14_CFG0, 0x40007670\r
-.set CYDEV_PHUB_CFGMEM14_CFG1, 0x40007674\r
-.set CYDEV_PHUB_CFGMEM15_BASE, 0x40007678\r
-.set CYDEV_PHUB_CFGMEM15_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM15_CFG0, 0x40007678\r
-.set CYDEV_PHUB_CFGMEM15_CFG1, 0x4000767c\r
-.set CYDEV_PHUB_CFGMEM16_BASE, 0x40007680\r
-.set CYDEV_PHUB_CFGMEM16_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM16_CFG0, 0x40007680\r
-.set CYDEV_PHUB_CFGMEM16_CFG1, 0x40007684\r
-.set CYDEV_PHUB_CFGMEM17_BASE, 0x40007688\r
-.set CYDEV_PHUB_CFGMEM17_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM17_CFG0, 0x40007688\r
-.set CYDEV_PHUB_CFGMEM17_CFG1, 0x4000768c\r
-.set CYDEV_PHUB_CFGMEM18_BASE, 0x40007690\r
-.set CYDEV_PHUB_CFGMEM18_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM18_CFG0, 0x40007690\r
-.set CYDEV_PHUB_CFGMEM18_CFG1, 0x40007694\r
-.set CYDEV_PHUB_CFGMEM19_BASE, 0x40007698\r
-.set CYDEV_PHUB_CFGMEM19_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM19_CFG0, 0x40007698\r
-.set CYDEV_PHUB_CFGMEM19_CFG1, 0x4000769c\r
-.set CYDEV_PHUB_CFGMEM20_BASE, 0x400076a0\r
-.set CYDEV_PHUB_CFGMEM20_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM20_CFG0, 0x400076a0\r
-.set CYDEV_PHUB_CFGMEM20_CFG1, 0x400076a4\r
-.set CYDEV_PHUB_CFGMEM21_BASE, 0x400076a8\r
-.set CYDEV_PHUB_CFGMEM21_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM21_CFG0, 0x400076a8\r
-.set CYDEV_PHUB_CFGMEM21_CFG1, 0x400076ac\r
-.set CYDEV_PHUB_CFGMEM22_BASE, 0x400076b0\r
-.set CYDEV_PHUB_CFGMEM22_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM22_CFG0, 0x400076b0\r
-.set CYDEV_PHUB_CFGMEM22_CFG1, 0x400076b4\r
-.set CYDEV_PHUB_CFGMEM23_BASE, 0x400076b8\r
-.set CYDEV_PHUB_CFGMEM23_SIZE, 0x00000008\r
-.set CYDEV_PHUB_CFGMEM23_CFG0, 0x400076b8\r
-.set CYDEV_PHUB_CFGMEM23_CFG1, 0x400076bc\r
-.set CYDEV_PHUB_TDMEM0_BASE, 0x40007800\r
-.set CYDEV_PHUB_TDMEM0_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM0_ORIG_TD0, 0x40007800\r
-.set CYDEV_PHUB_TDMEM0_ORIG_TD1, 0x40007804\r
-.set CYDEV_PHUB_TDMEM1_BASE, 0x40007808\r
-.set CYDEV_PHUB_TDMEM1_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM1_ORIG_TD0, 0x40007808\r
-.set CYDEV_PHUB_TDMEM1_ORIG_TD1, 0x4000780c\r
-.set CYDEV_PHUB_TDMEM2_BASE, 0x40007810\r
-.set CYDEV_PHUB_TDMEM2_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM2_ORIG_TD0, 0x40007810\r
-.set CYDEV_PHUB_TDMEM2_ORIG_TD1, 0x40007814\r
-.set CYDEV_PHUB_TDMEM3_BASE, 0x40007818\r
-.set CYDEV_PHUB_TDMEM3_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM3_ORIG_TD0, 0x40007818\r
-.set CYDEV_PHUB_TDMEM3_ORIG_TD1, 0x4000781c\r
-.set CYDEV_PHUB_TDMEM4_BASE, 0x40007820\r
-.set CYDEV_PHUB_TDMEM4_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM4_ORIG_TD0, 0x40007820\r
-.set CYDEV_PHUB_TDMEM4_ORIG_TD1, 0x40007824\r
-.set CYDEV_PHUB_TDMEM5_BASE, 0x40007828\r
-.set CYDEV_PHUB_TDMEM5_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM5_ORIG_TD0, 0x40007828\r
-.set CYDEV_PHUB_TDMEM5_ORIG_TD1, 0x4000782c\r
-.set CYDEV_PHUB_TDMEM6_BASE, 0x40007830\r
-.set CYDEV_PHUB_TDMEM6_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM6_ORIG_TD0, 0x40007830\r
-.set CYDEV_PHUB_TDMEM6_ORIG_TD1, 0x40007834\r
-.set CYDEV_PHUB_TDMEM7_BASE, 0x40007838\r
-.set CYDEV_PHUB_TDMEM7_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM7_ORIG_TD0, 0x40007838\r
-.set CYDEV_PHUB_TDMEM7_ORIG_TD1, 0x4000783c\r
-.set CYDEV_PHUB_TDMEM8_BASE, 0x40007840\r
-.set CYDEV_PHUB_TDMEM8_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM8_ORIG_TD0, 0x40007840\r
-.set CYDEV_PHUB_TDMEM8_ORIG_TD1, 0x40007844\r
-.set CYDEV_PHUB_TDMEM9_BASE, 0x40007848\r
-.set CYDEV_PHUB_TDMEM9_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM9_ORIG_TD0, 0x40007848\r
-.set CYDEV_PHUB_TDMEM9_ORIG_TD1, 0x4000784c\r
-.set CYDEV_PHUB_TDMEM10_BASE, 0x40007850\r
-.set CYDEV_PHUB_TDMEM10_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM10_ORIG_TD0, 0x40007850\r
-.set CYDEV_PHUB_TDMEM10_ORIG_TD1, 0x40007854\r
-.set CYDEV_PHUB_TDMEM11_BASE, 0x40007858\r
-.set CYDEV_PHUB_TDMEM11_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM11_ORIG_TD0, 0x40007858\r
-.set CYDEV_PHUB_TDMEM11_ORIG_TD1, 0x4000785c\r
-.set CYDEV_PHUB_TDMEM12_BASE, 0x40007860\r
-.set CYDEV_PHUB_TDMEM12_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM12_ORIG_TD0, 0x40007860\r
-.set CYDEV_PHUB_TDMEM12_ORIG_TD1, 0x40007864\r
-.set CYDEV_PHUB_TDMEM13_BASE, 0x40007868\r
-.set CYDEV_PHUB_TDMEM13_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM13_ORIG_TD0, 0x40007868\r
-.set CYDEV_PHUB_TDMEM13_ORIG_TD1, 0x4000786c\r
-.set CYDEV_PHUB_TDMEM14_BASE, 0x40007870\r
-.set CYDEV_PHUB_TDMEM14_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM14_ORIG_TD0, 0x40007870\r
-.set CYDEV_PHUB_TDMEM14_ORIG_TD1, 0x40007874\r
-.set CYDEV_PHUB_TDMEM15_BASE, 0x40007878\r
-.set CYDEV_PHUB_TDMEM15_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM15_ORIG_TD0, 0x40007878\r
-.set CYDEV_PHUB_TDMEM15_ORIG_TD1, 0x4000787c\r
-.set CYDEV_PHUB_TDMEM16_BASE, 0x40007880\r
-.set CYDEV_PHUB_TDMEM16_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM16_ORIG_TD0, 0x40007880\r
-.set CYDEV_PHUB_TDMEM16_ORIG_TD1, 0x40007884\r
-.set CYDEV_PHUB_TDMEM17_BASE, 0x40007888\r
-.set CYDEV_PHUB_TDMEM17_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM17_ORIG_TD0, 0x40007888\r
-.set CYDEV_PHUB_TDMEM17_ORIG_TD1, 0x4000788c\r
-.set CYDEV_PHUB_TDMEM18_BASE, 0x40007890\r
-.set CYDEV_PHUB_TDMEM18_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM18_ORIG_TD0, 0x40007890\r
-.set CYDEV_PHUB_TDMEM18_ORIG_TD1, 0x40007894\r
-.set CYDEV_PHUB_TDMEM19_BASE, 0x40007898\r
-.set CYDEV_PHUB_TDMEM19_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM19_ORIG_TD0, 0x40007898\r
-.set CYDEV_PHUB_TDMEM19_ORIG_TD1, 0x4000789c\r
-.set CYDEV_PHUB_TDMEM20_BASE, 0x400078a0\r
-.set CYDEV_PHUB_TDMEM20_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM20_ORIG_TD0, 0x400078a0\r
-.set CYDEV_PHUB_TDMEM20_ORIG_TD1, 0x400078a4\r
-.set CYDEV_PHUB_TDMEM21_BASE, 0x400078a8\r
-.set CYDEV_PHUB_TDMEM21_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM21_ORIG_TD0, 0x400078a8\r
-.set CYDEV_PHUB_TDMEM21_ORIG_TD1, 0x400078ac\r
-.set CYDEV_PHUB_TDMEM22_BASE, 0x400078b0\r
-.set CYDEV_PHUB_TDMEM22_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM22_ORIG_TD0, 0x400078b0\r
-.set CYDEV_PHUB_TDMEM22_ORIG_TD1, 0x400078b4\r
-.set CYDEV_PHUB_TDMEM23_BASE, 0x400078b8\r
-.set CYDEV_PHUB_TDMEM23_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM23_ORIG_TD0, 0x400078b8\r
-.set CYDEV_PHUB_TDMEM23_ORIG_TD1, 0x400078bc\r
-.set CYDEV_PHUB_TDMEM24_BASE, 0x400078c0\r
-.set CYDEV_PHUB_TDMEM24_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM24_ORIG_TD0, 0x400078c0\r
-.set CYDEV_PHUB_TDMEM24_ORIG_TD1, 0x400078c4\r
-.set CYDEV_PHUB_TDMEM25_BASE, 0x400078c8\r
-.set CYDEV_PHUB_TDMEM25_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM25_ORIG_TD0, 0x400078c8\r
-.set CYDEV_PHUB_TDMEM25_ORIG_TD1, 0x400078cc\r
-.set CYDEV_PHUB_TDMEM26_BASE, 0x400078d0\r
-.set CYDEV_PHUB_TDMEM26_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM26_ORIG_TD0, 0x400078d0\r
-.set CYDEV_PHUB_TDMEM26_ORIG_TD1, 0x400078d4\r
-.set CYDEV_PHUB_TDMEM27_BASE, 0x400078d8\r
-.set CYDEV_PHUB_TDMEM27_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM27_ORIG_TD0, 0x400078d8\r
-.set CYDEV_PHUB_TDMEM27_ORIG_TD1, 0x400078dc\r
-.set CYDEV_PHUB_TDMEM28_BASE, 0x400078e0\r
-.set CYDEV_PHUB_TDMEM28_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM28_ORIG_TD0, 0x400078e0\r
-.set CYDEV_PHUB_TDMEM28_ORIG_TD1, 0x400078e4\r
-.set CYDEV_PHUB_TDMEM29_BASE, 0x400078e8\r
-.set CYDEV_PHUB_TDMEM29_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM29_ORIG_TD0, 0x400078e8\r
-.set CYDEV_PHUB_TDMEM29_ORIG_TD1, 0x400078ec\r
-.set CYDEV_PHUB_TDMEM30_BASE, 0x400078f0\r
-.set CYDEV_PHUB_TDMEM30_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM30_ORIG_TD0, 0x400078f0\r
-.set CYDEV_PHUB_TDMEM30_ORIG_TD1, 0x400078f4\r
-.set CYDEV_PHUB_TDMEM31_BASE, 0x400078f8\r
-.set CYDEV_PHUB_TDMEM31_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM31_ORIG_TD0, 0x400078f8\r
-.set CYDEV_PHUB_TDMEM31_ORIG_TD1, 0x400078fc\r
-.set CYDEV_PHUB_TDMEM32_BASE, 0x40007900\r
-.set CYDEV_PHUB_TDMEM32_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM32_ORIG_TD0, 0x40007900\r
-.set CYDEV_PHUB_TDMEM32_ORIG_TD1, 0x40007904\r
-.set CYDEV_PHUB_TDMEM33_BASE, 0x40007908\r
-.set CYDEV_PHUB_TDMEM33_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM33_ORIG_TD0, 0x40007908\r
-.set CYDEV_PHUB_TDMEM33_ORIG_TD1, 0x4000790c\r
-.set CYDEV_PHUB_TDMEM34_BASE, 0x40007910\r
-.set CYDEV_PHUB_TDMEM34_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM34_ORIG_TD0, 0x40007910\r
-.set CYDEV_PHUB_TDMEM34_ORIG_TD1, 0x40007914\r
-.set CYDEV_PHUB_TDMEM35_BASE, 0x40007918\r
-.set CYDEV_PHUB_TDMEM35_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM35_ORIG_TD0, 0x40007918\r
-.set CYDEV_PHUB_TDMEM35_ORIG_TD1, 0x4000791c\r
-.set CYDEV_PHUB_TDMEM36_BASE, 0x40007920\r
-.set CYDEV_PHUB_TDMEM36_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM36_ORIG_TD0, 0x40007920\r
-.set CYDEV_PHUB_TDMEM36_ORIG_TD1, 0x40007924\r
-.set CYDEV_PHUB_TDMEM37_BASE, 0x40007928\r
-.set CYDEV_PHUB_TDMEM37_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM37_ORIG_TD0, 0x40007928\r
-.set CYDEV_PHUB_TDMEM37_ORIG_TD1, 0x4000792c\r
-.set CYDEV_PHUB_TDMEM38_BASE, 0x40007930\r
-.set CYDEV_PHUB_TDMEM38_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM38_ORIG_TD0, 0x40007930\r
-.set CYDEV_PHUB_TDMEM38_ORIG_TD1, 0x40007934\r
-.set CYDEV_PHUB_TDMEM39_BASE, 0x40007938\r
-.set CYDEV_PHUB_TDMEM39_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM39_ORIG_TD0, 0x40007938\r
-.set CYDEV_PHUB_TDMEM39_ORIG_TD1, 0x4000793c\r
-.set CYDEV_PHUB_TDMEM40_BASE, 0x40007940\r
-.set CYDEV_PHUB_TDMEM40_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM40_ORIG_TD0, 0x40007940\r
-.set CYDEV_PHUB_TDMEM40_ORIG_TD1, 0x40007944\r
-.set CYDEV_PHUB_TDMEM41_BASE, 0x40007948\r
-.set CYDEV_PHUB_TDMEM41_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM41_ORIG_TD0, 0x40007948\r
-.set CYDEV_PHUB_TDMEM41_ORIG_TD1, 0x4000794c\r
-.set CYDEV_PHUB_TDMEM42_BASE, 0x40007950\r
-.set CYDEV_PHUB_TDMEM42_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM42_ORIG_TD0, 0x40007950\r
-.set CYDEV_PHUB_TDMEM42_ORIG_TD1, 0x40007954\r
-.set CYDEV_PHUB_TDMEM43_BASE, 0x40007958\r
-.set CYDEV_PHUB_TDMEM43_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM43_ORIG_TD0, 0x40007958\r
-.set CYDEV_PHUB_TDMEM43_ORIG_TD1, 0x4000795c\r
-.set CYDEV_PHUB_TDMEM44_BASE, 0x40007960\r
-.set CYDEV_PHUB_TDMEM44_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM44_ORIG_TD0, 0x40007960\r
-.set CYDEV_PHUB_TDMEM44_ORIG_TD1, 0x40007964\r
-.set CYDEV_PHUB_TDMEM45_BASE, 0x40007968\r
-.set CYDEV_PHUB_TDMEM45_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM45_ORIG_TD0, 0x40007968\r
-.set CYDEV_PHUB_TDMEM45_ORIG_TD1, 0x4000796c\r
-.set CYDEV_PHUB_TDMEM46_BASE, 0x40007970\r
-.set CYDEV_PHUB_TDMEM46_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM46_ORIG_TD0, 0x40007970\r
-.set CYDEV_PHUB_TDMEM46_ORIG_TD1, 0x40007974\r
-.set CYDEV_PHUB_TDMEM47_BASE, 0x40007978\r
-.set CYDEV_PHUB_TDMEM47_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM47_ORIG_TD0, 0x40007978\r
-.set CYDEV_PHUB_TDMEM47_ORIG_TD1, 0x4000797c\r
-.set CYDEV_PHUB_TDMEM48_BASE, 0x40007980\r
-.set CYDEV_PHUB_TDMEM48_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM48_ORIG_TD0, 0x40007980\r
-.set CYDEV_PHUB_TDMEM48_ORIG_TD1, 0x40007984\r
-.set CYDEV_PHUB_TDMEM49_BASE, 0x40007988\r
-.set CYDEV_PHUB_TDMEM49_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM49_ORIG_TD0, 0x40007988\r
-.set CYDEV_PHUB_TDMEM49_ORIG_TD1, 0x4000798c\r
-.set CYDEV_PHUB_TDMEM50_BASE, 0x40007990\r
-.set CYDEV_PHUB_TDMEM50_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM50_ORIG_TD0, 0x40007990\r
-.set CYDEV_PHUB_TDMEM50_ORIG_TD1, 0x40007994\r
-.set CYDEV_PHUB_TDMEM51_BASE, 0x40007998\r
-.set CYDEV_PHUB_TDMEM51_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM51_ORIG_TD0, 0x40007998\r
-.set CYDEV_PHUB_TDMEM51_ORIG_TD1, 0x4000799c\r
-.set CYDEV_PHUB_TDMEM52_BASE, 0x400079a0\r
-.set CYDEV_PHUB_TDMEM52_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM52_ORIG_TD0, 0x400079a0\r
-.set CYDEV_PHUB_TDMEM52_ORIG_TD1, 0x400079a4\r
-.set CYDEV_PHUB_TDMEM53_BASE, 0x400079a8\r
-.set CYDEV_PHUB_TDMEM53_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM53_ORIG_TD0, 0x400079a8\r
-.set CYDEV_PHUB_TDMEM53_ORIG_TD1, 0x400079ac\r
-.set CYDEV_PHUB_TDMEM54_BASE, 0x400079b0\r
-.set CYDEV_PHUB_TDMEM54_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM54_ORIG_TD0, 0x400079b0\r
-.set CYDEV_PHUB_TDMEM54_ORIG_TD1, 0x400079b4\r
-.set CYDEV_PHUB_TDMEM55_BASE, 0x400079b8\r
-.set CYDEV_PHUB_TDMEM55_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM55_ORIG_TD0, 0x400079b8\r
-.set CYDEV_PHUB_TDMEM55_ORIG_TD1, 0x400079bc\r
-.set CYDEV_PHUB_TDMEM56_BASE, 0x400079c0\r
-.set CYDEV_PHUB_TDMEM56_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM56_ORIG_TD0, 0x400079c0\r
-.set CYDEV_PHUB_TDMEM56_ORIG_TD1, 0x400079c4\r
-.set CYDEV_PHUB_TDMEM57_BASE, 0x400079c8\r
-.set CYDEV_PHUB_TDMEM57_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM57_ORIG_TD0, 0x400079c8\r
-.set CYDEV_PHUB_TDMEM57_ORIG_TD1, 0x400079cc\r
-.set CYDEV_PHUB_TDMEM58_BASE, 0x400079d0\r
-.set CYDEV_PHUB_TDMEM58_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM58_ORIG_TD0, 0x400079d0\r
-.set CYDEV_PHUB_TDMEM58_ORIG_TD1, 0x400079d4\r
-.set CYDEV_PHUB_TDMEM59_BASE, 0x400079d8\r
-.set CYDEV_PHUB_TDMEM59_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM59_ORIG_TD0, 0x400079d8\r
-.set CYDEV_PHUB_TDMEM59_ORIG_TD1, 0x400079dc\r
-.set CYDEV_PHUB_TDMEM60_BASE, 0x400079e0\r
-.set CYDEV_PHUB_TDMEM60_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM60_ORIG_TD0, 0x400079e0\r
-.set CYDEV_PHUB_TDMEM60_ORIG_TD1, 0x400079e4\r
-.set CYDEV_PHUB_TDMEM61_BASE, 0x400079e8\r
-.set CYDEV_PHUB_TDMEM61_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM61_ORIG_TD0, 0x400079e8\r
-.set CYDEV_PHUB_TDMEM61_ORIG_TD1, 0x400079ec\r
-.set CYDEV_PHUB_TDMEM62_BASE, 0x400079f0\r
-.set CYDEV_PHUB_TDMEM62_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM62_ORIG_TD0, 0x400079f0\r
-.set CYDEV_PHUB_TDMEM62_ORIG_TD1, 0x400079f4\r
-.set CYDEV_PHUB_TDMEM63_BASE, 0x400079f8\r
-.set CYDEV_PHUB_TDMEM63_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM63_ORIG_TD0, 0x400079f8\r
-.set CYDEV_PHUB_TDMEM63_ORIG_TD1, 0x400079fc\r
-.set CYDEV_PHUB_TDMEM64_BASE, 0x40007a00\r
-.set CYDEV_PHUB_TDMEM64_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM64_ORIG_TD0, 0x40007a00\r
-.set CYDEV_PHUB_TDMEM64_ORIG_TD1, 0x40007a04\r
-.set CYDEV_PHUB_TDMEM65_BASE, 0x40007a08\r
-.set CYDEV_PHUB_TDMEM65_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM65_ORIG_TD0, 0x40007a08\r
-.set CYDEV_PHUB_TDMEM65_ORIG_TD1, 0x40007a0c\r
-.set CYDEV_PHUB_TDMEM66_BASE, 0x40007a10\r
-.set CYDEV_PHUB_TDMEM66_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM66_ORIG_TD0, 0x40007a10\r
-.set CYDEV_PHUB_TDMEM66_ORIG_TD1, 0x40007a14\r
-.set CYDEV_PHUB_TDMEM67_BASE, 0x40007a18\r
-.set CYDEV_PHUB_TDMEM67_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM67_ORIG_TD0, 0x40007a18\r
-.set CYDEV_PHUB_TDMEM67_ORIG_TD1, 0x40007a1c\r
-.set CYDEV_PHUB_TDMEM68_BASE, 0x40007a20\r
-.set CYDEV_PHUB_TDMEM68_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM68_ORIG_TD0, 0x40007a20\r
-.set CYDEV_PHUB_TDMEM68_ORIG_TD1, 0x40007a24\r
-.set CYDEV_PHUB_TDMEM69_BASE, 0x40007a28\r
-.set CYDEV_PHUB_TDMEM69_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM69_ORIG_TD0, 0x40007a28\r
-.set CYDEV_PHUB_TDMEM69_ORIG_TD1, 0x40007a2c\r
-.set CYDEV_PHUB_TDMEM70_BASE, 0x40007a30\r
-.set CYDEV_PHUB_TDMEM70_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM70_ORIG_TD0, 0x40007a30\r
-.set CYDEV_PHUB_TDMEM70_ORIG_TD1, 0x40007a34\r
-.set CYDEV_PHUB_TDMEM71_BASE, 0x40007a38\r
-.set CYDEV_PHUB_TDMEM71_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM71_ORIG_TD0, 0x40007a38\r
-.set CYDEV_PHUB_TDMEM71_ORIG_TD1, 0x40007a3c\r
-.set CYDEV_PHUB_TDMEM72_BASE, 0x40007a40\r
-.set CYDEV_PHUB_TDMEM72_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM72_ORIG_TD0, 0x40007a40\r
-.set CYDEV_PHUB_TDMEM72_ORIG_TD1, 0x40007a44\r
-.set CYDEV_PHUB_TDMEM73_BASE, 0x40007a48\r
-.set CYDEV_PHUB_TDMEM73_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM73_ORIG_TD0, 0x40007a48\r
-.set CYDEV_PHUB_TDMEM73_ORIG_TD1, 0x40007a4c\r
-.set CYDEV_PHUB_TDMEM74_BASE, 0x40007a50\r
-.set CYDEV_PHUB_TDMEM74_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM74_ORIG_TD0, 0x40007a50\r
-.set CYDEV_PHUB_TDMEM74_ORIG_TD1, 0x40007a54\r
-.set CYDEV_PHUB_TDMEM75_BASE, 0x40007a58\r
-.set CYDEV_PHUB_TDMEM75_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM75_ORIG_TD0, 0x40007a58\r
-.set CYDEV_PHUB_TDMEM75_ORIG_TD1, 0x40007a5c\r
-.set CYDEV_PHUB_TDMEM76_BASE, 0x40007a60\r
-.set CYDEV_PHUB_TDMEM76_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM76_ORIG_TD0, 0x40007a60\r
-.set CYDEV_PHUB_TDMEM76_ORIG_TD1, 0x40007a64\r
-.set CYDEV_PHUB_TDMEM77_BASE, 0x40007a68\r
-.set CYDEV_PHUB_TDMEM77_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM77_ORIG_TD0, 0x40007a68\r
-.set CYDEV_PHUB_TDMEM77_ORIG_TD1, 0x40007a6c\r
-.set CYDEV_PHUB_TDMEM78_BASE, 0x40007a70\r
-.set CYDEV_PHUB_TDMEM78_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM78_ORIG_TD0, 0x40007a70\r
-.set CYDEV_PHUB_TDMEM78_ORIG_TD1, 0x40007a74\r
-.set CYDEV_PHUB_TDMEM79_BASE, 0x40007a78\r
-.set CYDEV_PHUB_TDMEM79_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM79_ORIG_TD0, 0x40007a78\r
-.set CYDEV_PHUB_TDMEM79_ORIG_TD1, 0x40007a7c\r
-.set CYDEV_PHUB_TDMEM80_BASE, 0x40007a80\r
-.set CYDEV_PHUB_TDMEM80_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM80_ORIG_TD0, 0x40007a80\r
-.set CYDEV_PHUB_TDMEM80_ORIG_TD1, 0x40007a84\r
-.set CYDEV_PHUB_TDMEM81_BASE, 0x40007a88\r
-.set CYDEV_PHUB_TDMEM81_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM81_ORIG_TD0, 0x40007a88\r
-.set CYDEV_PHUB_TDMEM81_ORIG_TD1, 0x40007a8c\r
-.set CYDEV_PHUB_TDMEM82_BASE, 0x40007a90\r
-.set CYDEV_PHUB_TDMEM82_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM82_ORIG_TD0, 0x40007a90\r
-.set CYDEV_PHUB_TDMEM82_ORIG_TD1, 0x40007a94\r
-.set CYDEV_PHUB_TDMEM83_BASE, 0x40007a98\r
-.set CYDEV_PHUB_TDMEM83_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM83_ORIG_TD0, 0x40007a98\r
-.set CYDEV_PHUB_TDMEM83_ORIG_TD1, 0x40007a9c\r
-.set CYDEV_PHUB_TDMEM84_BASE, 0x40007aa0\r
-.set CYDEV_PHUB_TDMEM84_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM84_ORIG_TD0, 0x40007aa0\r
-.set CYDEV_PHUB_TDMEM84_ORIG_TD1, 0x40007aa4\r
-.set CYDEV_PHUB_TDMEM85_BASE, 0x40007aa8\r
-.set CYDEV_PHUB_TDMEM85_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM85_ORIG_TD0, 0x40007aa8\r
-.set CYDEV_PHUB_TDMEM85_ORIG_TD1, 0x40007aac\r
-.set CYDEV_PHUB_TDMEM86_BASE, 0x40007ab0\r
-.set CYDEV_PHUB_TDMEM86_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM86_ORIG_TD0, 0x40007ab0\r
-.set CYDEV_PHUB_TDMEM86_ORIG_TD1, 0x40007ab4\r
-.set CYDEV_PHUB_TDMEM87_BASE, 0x40007ab8\r
-.set CYDEV_PHUB_TDMEM87_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM87_ORIG_TD0, 0x40007ab8\r
-.set CYDEV_PHUB_TDMEM87_ORIG_TD1, 0x40007abc\r
-.set CYDEV_PHUB_TDMEM88_BASE, 0x40007ac0\r
-.set CYDEV_PHUB_TDMEM88_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM88_ORIG_TD0, 0x40007ac0\r
-.set CYDEV_PHUB_TDMEM88_ORIG_TD1, 0x40007ac4\r
-.set CYDEV_PHUB_TDMEM89_BASE, 0x40007ac8\r
-.set CYDEV_PHUB_TDMEM89_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM89_ORIG_TD0, 0x40007ac8\r
-.set CYDEV_PHUB_TDMEM89_ORIG_TD1, 0x40007acc\r
-.set CYDEV_PHUB_TDMEM90_BASE, 0x40007ad0\r
-.set CYDEV_PHUB_TDMEM90_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM90_ORIG_TD0, 0x40007ad0\r
-.set CYDEV_PHUB_TDMEM90_ORIG_TD1, 0x40007ad4\r
-.set CYDEV_PHUB_TDMEM91_BASE, 0x40007ad8\r
-.set CYDEV_PHUB_TDMEM91_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM91_ORIG_TD0, 0x40007ad8\r
-.set CYDEV_PHUB_TDMEM91_ORIG_TD1, 0x40007adc\r
-.set CYDEV_PHUB_TDMEM92_BASE, 0x40007ae0\r
-.set CYDEV_PHUB_TDMEM92_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM92_ORIG_TD0, 0x40007ae0\r
-.set CYDEV_PHUB_TDMEM92_ORIG_TD1, 0x40007ae4\r
-.set CYDEV_PHUB_TDMEM93_BASE, 0x40007ae8\r
-.set CYDEV_PHUB_TDMEM93_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM93_ORIG_TD0, 0x40007ae8\r
-.set CYDEV_PHUB_TDMEM93_ORIG_TD1, 0x40007aec\r
-.set CYDEV_PHUB_TDMEM94_BASE, 0x40007af0\r
-.set CYDEV_PHUB_TDMEM94_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM94_ORIG_TD0, 0x40007af0\r
-.set CYDEV_PHUB_TDMEM94_ORIG_TD1, 0x40007af4\r
-.set CYDEV_PHUB_TDMEM95_BASE, 0x40007af8\r
-.set CYDEV_PHUB_TDMEM95_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM95_ORIG_TD0, 0x40007af8\r
-.set CYDEV_PHUB_TDMEM95_ORIG_TD1, 0x40007afc\r
-.set CYDEV_PHUB_TDMEM96_BASE, 0x40007b00\r
-.set CYDEV_PHUB_TDMEM96_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM96_ORIG_TD0, 0x40007b00\r
-.set CYDEV_PHUB_TDMEM96_ORIG_TD1, 0x40007b04\r
-.set CYDEV_PHUB_TDMEM97_BASE, 0x40007b08\r
-.set CYDEV_PHUB_TDMEM97_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM97_ORIG_TD0, 0x40007b08\r
-.set CYDEV_PHUB_TDMEM97_ORIG_TD1, 0x40007b0c\r
-.set CYDEV_PHUB_TDMEM98_BASE, 0x40007b10\r
-.set CYDEV_PHUB_TDMEM98_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM98_ORIG_TD0, 0x40007b10\r
-.set CYDEV_PHUB_TDMEM98_ORIG_TD1, 0x40007b14\r
-.set CYDEV_PHUB_TDMEM99_BASE, 0x40007b18\r
-.set CYDEV_PHUB_TDMEM99_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM99_ORIG_TD0, 0x40007b18\r
-.set CYDEV_PHUB_TDMEM99_ORIG_TD1, 0x40007b1c\r
-.set CYDEV_PHUB_TDMEM100_BASE, 0x40007b20\r
-.set CYDEV_PHUB_TDMEM100_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM100_ORIG_TD0, 0x40007b20\r
-.set CYDEV_PHUB_TDMEM100_ORIG_TD1, 0x40007b24\r
-.set CYDEV_PHUB_TDMEM101_BASE, 0x40007b28\r
-.set CYDEV_PHUB_TDMEM101_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM101_ORIG_TD0, 0x40007b28\r
-.set CYDEV_PHUB_TDMEM101_ORIG_TD1, 0x40007b2c\r
-.set CYDEV_PHUB_TDMEM102_BASE, 0x40007b30\r
-.set CYDEV_PHUB_TDMEM102_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM102_ORIG_TD0, 0x40007b30\r
-.set CYDEV_PHUB_TDMEM102_ORIG_TD1, 0x40007b34\r
-.set CYDEV_PHUB_TDMEM103_BASE, 0x40007b38\r
-.set CYDEV_PHUB_TDMEM103_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM103_ORIG_TD0, 0x40007b38\r
-.set CYDEV_PHUB_TDMEM103_ORIG_TD1, 0x40007b3c\r
-.set CYDEV_PHUB_TDMEM104_BASE, 0x40007b40\r
-.set CYDEV_PHUB_TDMEM104_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM104_ORIG_TD0, 0x40007b40\r
-.set CYDEV_PHUB_TDMEM104_ORIG_TD1, 0x40007b44\r
-.set CYDEV_PHUB_TDMEM105_BASE, 0x40007b48\r
-.set CYDEV_PHUB_TDMEM105_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM105_ORIG_TD0, 0x40007b48\r
-.set CYDEV_PHUB_TDMEM105_ORIG_TD1, 0x40007b4c\r
-.set CYDEV_PHUB_TDMEM106_BASE, 0x40007b50\r
-.set CYDEV_PHUB_TDMEM106_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM106_ORIG_TD0, 0x40007b50\r
-.set CYDEV_PHUB_TDMEM106_ORIG_TD1, 0x40007b54\r
-.set CYDEV_PHUB_TDMEM107_BASE, 0x40007b58\r
-.set CYDEV_PHUB_TDMEM107_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM107_ORIG_TD0, 0x40007b58\r
-.set CYDEV_PHUB_TDMEM107_ORIG_TD1, 0x40007b5c\r
-.set CYDEV_PHUB_TDMEM108_BASE, 0x40007b60\r
-.set CYDEV_PHUB_TDMEM108_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM108_ORIG_TD0, 0x40007b60\r
-.set CYDEV_PHUB_TDMEM108_ORIG_TD1, 0x40007b64\r
-.set CYDEV_PHUB_TDMEM109_BASE, 0x40007b68\r
-.set CYDEV_PHUB_TDMEM109_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM109_ORIG_TD0, 0x40007b68\r
-.set CYDEV_PHUB_TDMEM109_ORIG_TD1, 0x40007b6c\r
-.set CYDEV_PHUB_TDMEM110_BASE, 0x40007b70\r
-.set CYDEV_PHUB_TDMEM110_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM110_ORIG_TD0, 0x40007b70\r
-.set CYDEV_PHUB_TDMEM110_ORIG_TD1, 0x40007b74\r
-.set CYDEV_PHUB_TDMEM111_BASE, 0x40007b78\r
-.set CYDEV_PHUB_TDMEM111_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM111_ORIG_TD0, 0x40007b78\r
-.set CYDEV_PHUB_TDMEM111_ORIG_TD1, 0x40007b7c\r
-.set CYDEV_PHUB_TDMEM112_BASE, 0x40007b80\r
-.set CYDEV_PHUB_TDMEM112_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM112_ORIG_TD0, 0x40007b80\r
-.set CYDEV_PHUB_TDMEM112_ORIG_TD1, 0x40007b84\r
-.set CYDEV_PHUB_TDMEM113_BASE, 0x40007b88\r
-.set CYDEV_PHUB_TDMEM113_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM113_ORIG_TD0, 0x40007b88\r
-.set CYDEV_PHUB_TDMEM113_ORIG_TD1, 0x40007b8c\r
-.set CYDEV_PHUB_TDMEM114_BASE, 0x40007b90\r
-.set CYDEV_PHUB_TDMEM114_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM114_ORIG_TD0, 0x40007b90\r
-.set CYDEV_PHUB_TDMEM114_ORIG_TD1, 0x40007b94\r
-.set CYDEV_PHUB_TDMEM115_BASE, 0x40007b98\r
-.set CYDEV_PHUB_TDMEM115_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM115_ORIG_TD0, 0x40007b98\r
-.set CYDEV_PHUB_TDMEM115_ORIG_TD1, 0x40007b9c\r
-.set CYDEV_PHUB_TDMEM116_BASE, 0x40007ba0\r
-.set CYDEV_PHUB_TDMEM116_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM116_ORIG_TD0, 0x40007ba0\r
-.set CYDEV_PHUB_TDMEM116_ORIG_TD1, 0x40007ba4\r
-.set CYDEV_PHUB_TDMEM117_BASE, 0x40007ba8\r
-.set CYDEV_PHUB_TDMEM117_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM117_ORIG_TD0, 0x40007ba8\r
-.set CYDEV_PHUB_TDMEM117_ORIG_TD1, 0x40007bac\r
-.set CYDEV_PHUB_TDMEM118_BASE, 0x40007bb0\r
-.set CYDEV_PHUB_TDMEM118_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM118_ORIG_TD0, 0x40007bb0\r
-.set CYDEV_PHUB_TDMEM118_ORIG_TD1, 0x40007bb4\r
-.set CYDEV_PHUB_TDMEM119_BASE, 0x40007bb8\r
-.set CYDEV_PHUB_TDMEM119_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM119_ORIG_TD0, 0x40007bb8\r
-.set CYDEV_PHUB_TDMEM119_ORIG_TD1, 0x40007bbc\r
-.set CYDEV_PHUB_TDMEM120_BASE, 0x40007bc0\r
-.set CYDEV_PHUB_TDMEM120_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM120_ORIG_TD0, 0x40007bc0\r
-.set CYDEV_PHUB_TDMEM120_ORIG_TD1, 0x40007bc4\r
-.set CYDEV_PHUB_TDMEM121_BASE, 0x40007bc8\r
-.set CYDEV_PHUB_TDMEM121_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM121_ORIG_TD0, 0x40007bc8\r
-.set CYDEV_PHUB_TDMEM121_ORIG_TD1, 0x40007bcc\r
-.set CYDEV_PHUB_TDMEM122_BASE, 0x40007bd0\r
-.set CYDEV_PHUB_TDMEM122_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM122_ORIG_TD0, 0x40007bd0\r
-.set CYDEV_PHUB_TDMEM122_ORIG_TD1, 0x40007bd4\r
-.set CYDEV_PHUB_TDMEM123_BASE, 0x40007bd8\r
-.set CYDEV_PHUB_TDMEM123_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM123_ORIG_TD0, 0x40007bd8\r
-.set CYDEV_PHUB_TDMEM123_ORIG_TD1, 0x40007bdc\r
-.set CYDEV_PHUB_TDMEM124_BASE, 0x40007be0\r
-.set CYDEV_PHUB_TDMEM124_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM124_ORIG_TD0, 0x40007be0\r
-.set CYDEV_PHUB_TDMEM124_ORIG_TD1, 0x40007be4\r
-.set CYDEV_PHUB_TDMEM125_BASE, 0x40007be8\r
-.set CYDEV_PHUB_TDMEM125_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM125_ORIG_TD0, 0x40007be8\r
-.set CYDEV_PHUB_TDMEM125_ORIG_TD1, 0x40007bec\r
-.set CYDEV_PHUB_TDMEM126_BASE, 0x40007bf0\r
-.set CYDEV_PHUB_TDMEM126_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM126_ORIG_TD0, 0x40007bf0\r
-.set CYDEV_PHUB_TDMEM126_ORIG_TD1, 0x40007bf4\r
-.set CYDEV_PHUB_TDMEM127_BASE, 0x40007bf8\r
-.set CYDEV_PHUB_TDMEM127_SIZE, 0x00000008\r
-.set CYDEV_PHUB_TDMEM127_ORIG_TD0, 0x40007bf8\r
-.set CYDEV_PHUB_TDMEM127_ORIG_TD1, 0x40007bfc\r
-.set CYDEV_EE_BASE, 0x40008000\r
-.set CYDEV_EE_SIZE, 0x00000800\r
-.set CYDEV_EE_DATA_MBASE, 0x40008000\r
-.set CYDEV_EE_DATA_MSIZE, 0x00000800\r
-.set CYDEV_CAN0_BASE, 0x4000a000\r
-.set CYDEV_CAN0_SIZE, 0x000002a0\r
-.set CYDEV_CAN0_CSR_BASE, 0x4000a000\r
-.set CYDEV_CAN0_CSR_SIZE, 0x00000018\r
-.set CYDEV_CAN0_CSR_INT_SR, 0x4000a000\r
-.set CYDEV_CAN0_CSR_INT_EN, 0x4000a004\r
-.set CYDEV_CAN0_CSR_BUF_SR, 0x4000a008\r
-.set CYDEV_CAN0_CSR_ERR_SR, 0x4000a00c\r
-.set CYDEV_CAN0_CSR_CMD, 0x4000a010\r
-.set CYDEV_CAN0_CSR_CFG, 0x4000a014\r
-.set CYDEV_CAN0_TX0_BASE, 0x4000a020\r
-.set CYDEV_CAN0_TX0_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX0_CMD, 0x4000a020\r
-.set CYDEV_CAN0_TX0_ID, 0x4000a024\r
-.set CYDEV_CAN0_TX0_DH, 0x4000a028\r
-.set CYDEV_CAN0_TX0_DL, 0x4000a02c\r
-.set CYDEV_CAN0_TX1_BASE, 0x4000a030\r
-.set CYDEV_CAN0_TX1_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX1_CMD, 0x4000a030\r
-.set CYDEV_CAN0_TX1_ID, 0x4000a034\r
-.set CYDEV_CAN0_TX1_DH, 0x4000a038\r
-.set CYDEV_CAN0_TX1_DL, 0x4000a03c\r
-.set CYDEV_CAN0_TX2_BASE, 0x4000a040\r
-.set CYDEV_CAN0_TX2_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX2_CMD, 0x4000a040\r
-.set CYDEV_CAN0_TX2_ID, 0x4000a044\r
-.set CYDEV_CAN0_TX2_DH, 0x4000a048\r
-.set CYDEV_CAN0_TX2_DL, 0x4000a04c\r
-.set CYDEV_CAN0_TX3_BASE, 0x4000a050\r
-.set CYDEV_CAN0_TX3_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX3_CMD, 0x4000a050\r
-.set CYDEV_CAN0_TX3_ID, 0x4000a054\r
-.set CYDEV_CAN0_TX3_DH, 0x4000a058\r
-.set CYDEV_CAN0_TX3_DL, 0x4000a05c\r
-.set CYDEV_CAN0_TX4_BASE, 0x4000a060\r
-.set CYDEV_CAN0_TX4_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX4_CMD, 0x4000a060\r
-.set CYDEV_CAN0_TX4_ID, 0x4000a064\r
-.set CYDEV_CAN0_TX4_DH, 0x4000a068\r
-.set CYDEV_CAN0_TX4_DL, 0x4000a06c\r
-.set CYDEV_CAN0_TX5_BASE, 0x4000a070\r
-.set CYDEV_CAN0_TX5_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX5_CMD, 0x4000a070\r
-.set CYDEV_CAN0_TX5_ID, 0x4000a074\r
-.set CYDEV_CAN0_TX5_DH, 0x4000a078\r
-.set CYDEV_CAN0_TX5_DL, 0x4000a07c\r
-.set CYDEV_CAN0_TX6_BASE, 0x4000a080\r
-.set CYDEV_CAN0_TX6_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX6_CMD, 0x4000a080\r
-.set CYDEV_CAN0_TX6_ID, 0x4000a084\r
-.set CYDEV_CAN0_TX6_DH, 0x4000a088\r
-.set CYDEV_CAN0_TX6_DL, 0x4000a08c\r
-.set CYDEV_CAN0_TX7_BASE, 0x4000a090\r
-.set CYDEV_CAN0_TX7_SIZE, 0x00000010\r
-.set CYDEV_CAN0_TX7_CMD, 0x4000a090\r
-.set CYDEV_CAN0_TX7_ID, 0x4000a094\r
-.set CYDEV_CAN0_TX7_DH, 0x4000a098\r
-.set CYDEV_CAN0_TX7_DL, 0x4000a09c\r
-.set CYDEV_CAN0_RX0_BASE, 0x4000a0a0\r
-.set CYDEV_CAN0_RX0_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX0_CMD, 0x4000a0a0\r
-.set CYDEV_CAN0_RX0_ID, 0x4000a0a4\r
-.set CYDEV_CAN0_RX0_DH, 0x4000a0a8\r
-.set CYDEV_CAN0_RX0_DL, 0x4000a0ac\r
-.set CYDEV_CAN0_RX0_AMR, 0x4000a0b0\r
-.set CYDEV_CAN0_RX0_ACR, 0x4000a0b4\r
-.set CYDEV_CAN0_RX0_AMRD, 0x4000a0b8\r
-.set CYDEV_CAN0_RX0_ACRD, 0x4000a0bc\r
-.set CYDEV_CAN0_RX1_BASE, 0x4000a0c0\r
-.set CYDEV_CAN0_RX1_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX1_CMD, 0x4000a0c0\r
-.set CYDEV_CAN0_RX1_ID, 0x4000a0c4\r
-.set CYDEV_CAN0_RX1_DH, 0x4000a0c8\r
-.set CYDEV_CAN0_RX1_DL, 0x4000a0cc\r
-.set CYDEV_CAN0_RX1_AMR, 0x4000a0d0\r
-.set CYDEV_CAN0_RX1_ACR, 0x4000a0d4\r
-.set CYDEV_CAN0_RX1_AMRD, 0x4000a0d8\r
-.set CYDEV_CAN0_RX1_ACRD, 0x4000a0dc\r
-.set CYDEV_CAN0_RX2_BASE, 0x4000a0e0\r
-.set CYDEV_CAN0_RX2_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX2_CMD, 0x4000a0e0\r
-.set CYDEV_CAN0_RX2_ID, 0x4000a0e4\r
-.set CYDEV_CAN0_RX2_DH, 0x4000a0e8\r
-.set CYDEV_CAN0_RX2_DL, 0x4000a0ec\r
-.set CYDEV_CAN0_RX2_AMR, 0x4000a0f0\r
-.set CYDEV_CAN0_RX2_ACR, 0x4000a0f4\r
-.set CYDEV_CAN0_RX2_AMRD, 0x4000a0f8\r
-.set CYDEV_CAN0_RX2_ACRD, 0x4000a0fc\r
-.set CYDEV_CAN0_RX3_BASE, 0x4000a100\r
-.set CYDEV_CAN0_RX3_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX3_CMD, 0x4000a100\r
-.set CYDEV_CAN0_RX3_ID, 0x4000a104\r
-.set CYDEV_CAN0_RX3_DH, 0x4000a108\r
-.set CYDEV_CAN0_RX3_DL, 0x4000a10c\r
-.set CYDEV_CAN0_RX3_AMR, 0x4000a110\r
-.set CYDEV_CAN0_RX3_ACR, 0x4000a114\r
-.set CYDEV_CAN0_RX3_AMRD, 0x4000a118\r
-.set CYDEV_CAN0_RX3_ACRD, 0x4000a11c\r
-.set CYDEV_CAN0_RX4_BASE, 0x4000a120\r
-.set CYDEV_CAN0_RX4_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX4_CMD, 0x4000a120\r
-.set CYDEV_CAN0_RX4_ID, 0x4000a124\r
-.set CYDEV_CAN0_RX4_DH, 0x4000a128\r
-.set CYDEV_CAN0_RX4_DL, 0x4000a12c\r
-.set CYDEV_CAN0_RX4_AMR, 0x4000a130\r
-.set CYDEV_CAN0_RX4_ACR, 0x4000a134\r
-.set CYDEV_CAN0_RX4_AMRD, 0x4000a138\r
-.set CYDEV_CAN0_RX4_ACRD, 0x4000a13c\r
-.set CYDEV_CAN0_RX5_BASE, 0x4000a140\r
-.set CYDEV_CAN0_RX5_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX5_CMD, 0x4000a140\r
-.set CYDEV_CAN0_RX5_ID, 0x4000a144\r
-.set CYDEV_CAN0_RX5_DH, 0x4000a148\r
-.set CYDEV_CAN0_RX5_DL, 0x4000a14c\r
-.set CYDEV_CAN0_RX5_AMR, 0x4000a150\r
-.set CYDEV_CAN0_RX5_ACR, 0x4000a154\r
-.set CYDEV_CAN0_RX5_AMRD, 0x4000a158\r
-.set CYDEV_CAN0_RX5_ACRD, 0x4000a15c\r
-.set CYDEV_CAN0_RX6_BASE, 0x4000a160\r
-.set CYDEV_CAN0_RX6_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX6_CMD, 0x4000a160\r
-.set CYDEV_CAN0_RX6_ID, 0x4000a164\r
-.set CYDEV_CAN0_RX6_DH, 0x4000a168\r
-.set CYDEV_CAN0_RX6_DL, 0x4000a16c\r
-.set CYDEV_CAN0_RX6_AMR, 0x4000a170\r
-.set CYDEV_CAN0_RX6_ACR, 0x4000a174\r
-.set CYDEV_CAN0_RX6_AMRD, 0x4000a178\r
-.set CYDEV_CAN0_RX6_ACRD, 0x4000a17c\r
-.set CYDEV_CAN0_RX7_BASE, 0x4000a180\r
-.set CYDEV_CAN0_RX7_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX7_CMD, 0x4000a180\r
-.set CYDEV_CAN0_RX7_ID, 0x4000a184\r
-.set CYDEV_CAN0_RX7_DH, 0x4000a188\r
-.set CYDEV_CAN0_RX7_DL, 0x4000a18c\r
-.set CYDEV_CAN0_RX7_AMR, 0x4000a190\r
-.set CYDEV_CAN0_RX7_ACR, 0x4000a194\r
-.set CYDEV_CAN0_RX7_AMRD, 0x4000a198\r
-.set CYDEV_CAN0_RX7_ACRD, 0x4000a19c\r
-.set CYDEV_CAN0_RX8_BASE, 0x4000a1a0\r
-.set CYDEV_CAN0_RX8_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX8_CMD, 0x4000a1a0\r
-.set CYDEV_CAN0_RX8_ID, 0x4000a1a4\r
-.set CYDEV_CAN0_RX8_DH, 0x4000a1a8\r
-.set CYDEV_CAN0_RX8_DL, 0x4000a1ac\r
-.set CYDEV_CAN0_RX8_AMR, 0x4000a1b0\r
-.set CYDEV_CAN0_RX8_ACR, 0x4000a1b4\r
-.set CYDEV_CAN0_RX8_AMRD, 0x4000a1b8\r
-.set CYDEV_CAN0_RX8_ACRD, 0x4000a1bc\r
-.set CYDEV_CAN0_RX9_BASE, 0x4000a1c0\r
-.set CYDEV_CAN0_RX9_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX9_CMD, 0x4000a1c0\r
-.set CYDEV_CAN0_RX9_ID, 0x4000a1c4\r
-.set CYDEV_CAN0_RX9_DH, 0x4000a1c8\r
-.set CYDEV_CAN0_RX9_DL, 0x4000a1cc\r
-.set CYDEV_CAN0_RX9_AMR, 0x4000a1d0\r
-.set CYDEV_CAN0_RX9_ACR, 0x4000a1d4\r
-.set CYDEV_CAN0_RX9_AMRD, 0x4000a1d8\r
-.set CYDEV_CAN0_RX9_ACRD, 0x4000a1dc\r
-.set CYDEV_CAN0_RX10_BASE, 0x4000a1e0\r
-.set CYDEV_CAN0_RX10_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX10_CMD, 0x4000a1e0\r
-.set CYDEV_CAN0_RX10_ID, 0x4000a1e4\r
-.set CYDEV_CAN0_RX10_DH, 0x4000a1e8\r
-.set CYDEV_CAN0_RX10_DL, 0x4000a1ec\r
-.set CYDEV_CAN0_RX10_AMR, 0x4000a1f0\r
-.set CYDEV_CAN0_RX10_ACR, 0x4000a1f4\r
-.set CYDEV_CAN0_RX10_AMRD, 0x4000a1f8\r
-.set CYDEV_CAN0_RX10_ACRD, 0x4000a1fc\r
-.set CYDEV_CAN0_RX11_BASE, 0x4000a200\r
-.set CYDEV_CAN0_RX11_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX11_CMD, 0x4000a200\r
-.set CYDEV_CAN0_RX11_ID, 0x4000a204\r
-.set CYDEV_CAN0_RX11_DH, 0x4000a208\r
-.set CYDEV_CAN0_RX11_DL, 0x4000a20c\r
-.set CYDEV_CAN0_RX11_AMR, 0x4000a210\r
-.set CYDEV_CAN0_RX11_ACR, 0x4000a214\r
-.set CYDEV_CAN0_RX11_AMRD, 0x4000a218\r
-.set CYDEV_CAN0_RX11_ACRD, 0x4000a21c\r
-.set CYDEV_CAN0_RX12_BASE, 0x4000a220\r
-.set CYDEV_CAN0_RX12_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX12_CMD, 0x4000a220\r
-.set CYDEV_CAN0_RX12_ID, 0x4000a224\r
-.set CYDEV_CAN0_RX12_DH, 0x4000a228\r
-.set CYDEV_CAN0_RX12_DL, 0x4000a22c\r
-.set CYDEV_CAN0_RX12_AMR, 0x4000a230\r
-.set CYDEV_CAN0_RX12_ACR, 0x4000a234\r
-.set CYDEV_CAN0_RX12_AMRD, 0x4000a238\r
-.set CYDEV_CAN0_RX12_ACRD, 0x4000a23c\r
-.set CYDEV_CAN0_RX13_BASE, 0x4000a240\r
-.set CYDEV_CAN0_RX13_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX13_CMD, 0x4000a240\r
-.set CYDEV_CAN0_RX13_ID, 0x4000a244\r
-.set CYDEV_CAN0_RX13_DH, 0x4000a248\r
-.set CYDEV_CAN0_RX13_DL, 0x4000a24c\r
-.set CYDEV_CAN0_RX13_AMR, 0x4000a250\r
-.set CYDEV_CAN0_RX13_ACR, 0x4000a254\r
-.set CYDEV_CAN0_RX13_AMRD, 0x4000a258\r
-.set CYDEV_CAN0_RX13_ACRD, 0x4000a25c\r
-.set CYDEV_CAN0_RX14_BASE, 0x4000a260\r
-.set CYDEV_CAN0_RX14_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX14_CMD, 0x4000a260\r
-.set CYDEV_CAN0_RX14_ID, 0x4000a264\r
-.set CYDEV_CAN0_RX14_DH, 0x4000a268\r
-.set CYDEV_CAN0_RX14_DL, 0x4000a26c\r
-.set CYDEV_CAN0_RX14_AMR, 0x4000a270\r
-.set CYDEV_CAN0_RX14_ACR, 0x4000a274\r
-.set CYDEV_CAN0_RX14_AMRD, 0x4000a278\r
-.set CYDEV_CAN0_RX14_ACRD, 0x4000a27c\r
-.set CYDEV_CAN0_RX15_BASE, 0x4000a280\r
-.set CYDEV_CAN0_RX15_SIZE, 0x00000020\r
-.set CYDEV_CAN0_RX15_CMD, 0x4000a280\r
-.set CYDEV_CAN0_RX15_ID, 0x4000a284\r
-.set CYDEV_CAN0_RX15_DH, 0x4000a288\r
-.set CYDEV_CAN0_RX15_DL, 0x4000a28c\r
-.set CYDEV_CAN0_RX15_AMR, 0x4000a290\r
-.set CYDEV_CAN0_RX15_ACR, 0x4000a294\r
-.set CYDEV_CAN0_RX15_AMRD, 0x4000a298\r
-.set CYDEV_CAN0_RX15_ACRD, 0x4000a29c\r
-.set CYDEV_DFB0_BASE, 0x4000c000\r
-.set CYDEV_DFB0_SIZE, 0x000007b5\r
-.set CYDEV_DFB0_DPA_SRAM_BASE, 0x4000c000\r
-.set CYDEV_DFB0_DPA_SRAM_SIZE, 0x00000200\r
-.set CYDEV_DFB0_DPA_SRAM_DATA_MBASE, 0x4000c000\r
-.set CYDEV_DFB0_DPA_SRAM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_DFB0_DPB_SRAM_BASE, 0x4000c200\r
-.set CYDEV_DFB0_DPB_SRAM_SIZE, 0x00000200\r
-.set CYDEV_DFB0_DPB_SRAM_DATA_MBASE, 0x4000c200\r
-.set CYDEV_DFB0_DPB_SRAM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_DFB0_CSA_SRAM_BASE, 0x4000c400\r
-.set CYDEV_DFB0_CSA_SRAM_SIZE, 0x00000100\r
-.set CYDEV_DFB0_CSA_SRAM_DATA_MBASE, 0x4000c400\r
-.set CYDEV_DFB0_CSA_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_CSB_SRAM_BASE, 0x4000c500\r
-.set CYDEV_DFB0_CSB_SRAM_SIZE, 0x00000100\r
-.set CYDEV_DFB0_CSB_SRAM_DATA_MBASE, 0x4000c500\r
-.set CYDEV_DFB0_CSB_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_FSM_SRAM_BASE, 0x4000c600\r
-.set CYDEV_DFB0_FSM_SRAM_SIZE, 0x00000100\r
-.set CYDEV_DFB0_FSM_SRAM_DATA_MBASE, 0x4000c600\r
-.set CYDEV_DFB0_FSM_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_ACU_SRAM_BASE, 0x4000c700\r
-.set CYDEV_DFB0_ACU_SRAM_SIZE, 0x00000040\r
-.set CYDEV_DFB0_ACU_SRAM_DATA_MBASE, 0x4000c700\r
-.set CYDEV_DFB0_ACU_SRAM_DATA_MSIZE, 0x00000040\r
-.set CYDEV_DFB0_CR, 0x4000c780\r
-.set CYDEV_DFB0_SR, 0x4000c784\r
-.set CYDEV_DFB0_RAM_EN, 0x4000c788\r
-.set CYDEV_DFB0_RAM_DIR, 0x4000c78c\r
-.set CYDEV_DFB0_SEMA, 0x4000c790\r
-.set CYDEV_DFB0_DSI_CTRL, 0x4000c794\r
-.set CYDEV_DFB0_INT_CTRL, 0x4000c798\r
-.set CYDEV_DFB0_DMA_CTRL, 0x4000c79c\r
-.set CYDEV_DFB0_STAGEA, 0x4000c7a0\r
-.set CYDEV_DFB0_STAGEAM, 0x4000c7a1\r
-.set CYDEV_DFB0_STAGEAH, 0x4000c7a2\r
-.set CYDEV_DFB0_STAGEB, 0x4000c7a4\r
-.set CYDEV_DFB0_STAGEBM, 0x4000c7a5\r
-.set CYDEV_DFB0_STAGEBH, 0x4000c7a6\r
-.set CYDEV_DFB0_HOLDA, 0x4000c7a8\r
-.set CYDEV_DFB0_HOLDAM, 0x4000c7a9\r
-.set CYDEV_DFB0_HOLDAH, 0x4000c7aa\r
-.set CYDEV_DFB0_HOLDAS, 0x4000c7ab\r
-.set CYDEV_DFB0_HOLDB, 0x4000c7ac\r
-.set CYDEV_DFB0_HOLDBM, 0x4000c7ad\r
-.set CYDEV_DFB0_HOLDBH, 0x4000c7ae\r
-.set CYDEV_DFB0_HOLDBS, 0x4000c7af\r
-.set CYDEV_DFB0_COHER, 0x4000c7b0\r
-.set CYDEV_DFB0_DALIGN, 0x4000c7b4\r
-.set CYDEV_UCFG_BASE, 0x40010000\r
-.set CYDEV_UCFG_SIZE, 0x00005040\r
-.set CYDEV_UCFG_B0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_SIZE, 0x00000fef\r
-.set CYDEV_UCFG_B0_P0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_P0_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P0_U0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_P0_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT0, 0x40010000\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT1, 0x40010004\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT2, 0x40010008\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT3, 0x4001000c\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT4, 0x40010010\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT5, 0x40010014\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT6, 0x40010018\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT7, 0x4001001c\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT8, 0x40010020\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT9, 0x40010024\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT10, 0x40010028\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_IT11, 0x4001002c\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_ORT0, 0x40010030\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_ORT1, 0x40010032\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_ORT2, 0x40010034\r
-.set CYDEV_UCFG_B0_P0_U0_PLD_ORT3, 0x40010036\r
-.set CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST, 0x40010038\r
-.set CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB, 0x4001003a\r
-.set CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET, 0x4001003c\r
-.set CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS, 0x4001003e\r
-.set CYDEV_UCFG_B0_P0_U0_CFG0, 0x40010040\r
-.set CYDEV_UCFG_B0_P0_U0_CFG1, 0x40010041\r
-.set CYDEV_UCFG_B0_P0_U0_CFG2, 0x40010042\r
-.set CYDEV_UCFG_B0_P0_U0_CFG3, 0x40010043\r
-.set CYDEV_UCFG_B0_P0_U0_CFG4, 0x40010044\r
-.set CYDEV_UCFG_B0_P0_U0_CFG5, 0x40010045\r
-.set CYDEV_UCFG_B0_P0_U0_CFG6, 0x40010046\r
-.set CYDEV_UCFG_B0_P0_U0_CFG7, 0x40010047\r
-.set CYDEV_UCFG_B0_P0_U0_CFG8, 0x40010048\r
-.set CYDEV_UCFG_B0_P0_U0_CFG9, 0x40010049\r
-.set CYDEV_UCFG_B0_P0_U0_CFG10, 0x4001004a\r
-.set CYDEV_UCFG_B0_P0_U0_CFG11, 0x4001004b\r
-.set CYDEV_UCFG_B0_P0_U0_CFG12, 0x4001004c\r
-.set CYDEV_UCFG_B0_P0_U0_CFG13, 0x4001004d\r
-.set CYDEV_UCFG_B0_P0_U0_CFG14, 0x4001004e\r
-.set CYDEV_UCFG_B0_P0_U0_CFG15, 0x4001004f\r
-.set CYDEV_UCFG_B0_P0_U0_CFG16, 0x40010050\r
-.set CYDEV_UCFG_B0_P0_U0_CFG17, 0x40010051\r
-.set CYDEV_UCFG_B0_P0_U0_CFG18, 0x40010052\r
-.set CYDEV_UCFG_B0_P0_U0_CFG19, 0x40010053\r
-.set CYDEV_UCFG_B0_P0_U0_CFG20, 0x40010054\r
-.set CYDEV_UCFG_B0_P0_U0_CFG21, 0x40010055\r
-.set CYDEV_UCFG_B0_P0_U0_CFG22, 0x40010056\r
-.set CYDEV_UCFG_B0_P0_U0_CFG23, 0x40010057\r
-.set CYDEV_UCFG_B0_P0_U0_CFG24, 0x40010058\r
-.set CYDEV_UCFG_B0_P0_U0_CFG25, 0x40010059\r
-.set CYDEV_UCFG_B0_P0_U0_CFG26, 0x4001005a\r
-.set CYDEV_UCFG_B0_P0_U0_CFG27, 0x4001005b\r
-.set CYDEV_UCFG_B0_P0_U0_CFG28, 0x4001005c\r
-.set CYDEV_UCFG_B0_P0_U0_CFG29, 0x4001005d\r
-.set CYDEV_UCFG_B0_P0_U0_CFG30, 0x4001005e\r
-.set CYDEV_UCFG_B0_P0_U0_CFG31, 0x4001005f\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG0, 0x40010060\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG1, 0x40010062\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG2, 0x40010064\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG3, 0x40010066\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG4, 0x40010068\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG5, 0x4001006a\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG6, 0x4001006c\r
-.set CYDEV_UCFG_B0_P0_U0_DCFG7, 0x4001006e\r
-.set CYDEV_UCFG_B0_P0_U1_BASE, 0x40010080\r
-.set CYDEV_UCFG_B0_P0_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT0, 0x40010080\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT1, 0x40010084\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT2, 0x40010088\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT3, 0x4001008c\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT4, 0x40010090\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT5, 0x40010094\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT6, 0x40010098\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT7, 0x4001009c\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT8, 0x400100a0\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT9, 0x400100a4\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT10, 0x400100a8\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_IT11, 0x400100ac\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_ORT0, 0x400100b0\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_ORT1, 0x400100b2\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_ORT2, 0x400100b4\r
-.set CYDEV_UCFG_B0_P0_U1_PLD_ORT3, 0x400100b6\r
-.set CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST, 0x400100b8\r
-.set CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB, 0x400100ba\r
-.set CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET, 0x400100bc\r
-.set CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS, 0x400100be\r
-.set CYDEV_UCFG_B0_P0_U1_CFG0, 0x400100c0\r
-.set CYDEV_UCFG_B0_P0_U1_CFG1, 0x400100c1\r
-.set CYDEV_UCFG_B0_P0_U1_CFG2, 0x400100c2\r
-.set CYDEV_UCFG_B0_P0_U1_CFG3, 0x400100c3\r
-.set CYDEV_UCFG_B0_P0_U1_CFG4, 0x400100c4\r
-.set CYDEV_UCFG_B0_P0_U1_CFG5, 0x400100c5\r
-.set CYDEV_UCFG_B0_P0_U1_CFG6, 0x400100c6\r
-.set CYDEV_UCFG_B0_P0_U1_CFG7, 0x400100c7\r
-.set CYDEV_UCFG_B0_P0_U1_CFG8, 0x400100c8\r
-.set CYDEV_UCFG_B0_P0_U1_CFG9, 0x400100c9\r
-.set CYDEV_UCFG_B0_P0_U1_CFG10, 0x400100ca\r
-.set CYDEV_UCFG_B0_P0_U1_CFG11, 0x400100cb\r
-.set CYDEV_UCFG_B0_P0_U1_CFG12, 0x400100cc\r
-.set CYDEV_UCFG_B0_P0_U1_CFG13, 0x400100cd\r
-.set CYDEV_UCFG_B0_P0_U1_CFG14, 0x400100ce\r
-.set CYDEV_UCFG_B0_P0_U1_CFG15, 0x400100cf\r
-.set CYDEV_UCFG_B0_P0_U1_CFG16, 0x400100d0\r
-.set CYDEV_UCFG_B0_P0_U1_CFG17, 0x400100d1\r
-.set CYDEV_UCFG_B0_P0_U1_CFG18, 0x400100d2\r
-.set CYDEV_UCFG_B0_P0_U1_CFG19, 0x400100d3\r
-.set CYDEV_UCFG_B0_P0_U1_CFG20, 0x400100d4\r
-.set CYDEV_UCFG_B0_P0_U1_CFG21, 0x400100d5\r
-.set CYDEV_UCFG_B0_P0_U1_CFG22, 0x400100d6\r
-.set CYDEV_UCFG_B0_P0_U1_CFG23, 0x400100d7\r
-.set CYDEV_UCFG_B0_P0_U1_CFG24, 0x400100d8\r
-.set CYDEV_UCFG_B0_P0_U1_CFG25, 0x400100d9\r
-.set CYDEV_UCFG_B0_P0_U1_CFG26, 0x400100da\r
-.set CYDEV_UCFG_B0_P0_U1_CFG27, 0x400100db\r
-.set CYDEV_UCFG_B0_P0_U1_CFG28, 0x400100dc\r
-.set CYDEV_UCFG_B0_P0_U1_CFG29, 0x400100dd\r
-.set CYDEV_UCFG_B0_P0_U1_CFG30, 0x400100de\r
-.set CYDEV_UCFG_B0_P0_U1_CFG31, 0x400100df\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG0, 0x400100e0\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG1, 0x400100e2\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG2, 0x400100e4\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG3, 0x400100e6\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG4, 0x400100e8\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG5, 0x400100ea\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG6, 0x400100ec\r
-.set CYDEV_UCFG_B0_P0_U1_DCFG7, 0x400100ee\r
-.set CYDEV_UCFG_B0_P0_ROUTE_BASE, 0x40010100\r
-.set CYDEV_UCFG_B0_P0_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P1_BASE, 0x40010200\r
-.set CYDEV_UCFG_B0_P1_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P1_U0_BASE, 0x40010200\r
-.set CYDEV_UCFG_B0_P1_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT0, 0x40010200\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT1, 0x40010204\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT2, 0x40010208\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT3, 0x4001020c\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT4, 0x40010210\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT5, 0x40010214\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT6, 0x40010218\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT7, 0x4001021c\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT8, 0x40010220\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT9, 0x40010224\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT10, 0x40010228\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_IT11, 0x4001022c\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_ORT0, 0x40010230\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_ORT1, 0x40010232\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_ORT2, 0x40010234\r
-.set CYDEV_UCFG_B0_P1_U0_PLD_ORT3, 0x40010236\r
-.set CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST, 0x40010238\r
-.set CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB, 0x4001023a\r
-.set CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET, 0x4001023c\r
-.set CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS, 0x4001023e\r
-.set CYDEV_UCFG_B0_P1_U0_CFG0, 0x40010240\r
-.set CYDEV_UCFG_B0_P1_U0_CFG1, 0x40010241\r
-.set CYDEV_UCFG_B0_P1_U0_CFG2, 0x40010242\r
-.set CYDEV_UCFG_B0_P1_U0_CFG3, 0x40010243\r
-.set CYDEV_UCFG_B0_P1_U0_CFG4, 0x40010244\r
-.set CYDEV_UCFG_B0_P1_U0_CFG5, 0x40010245\r
-.set CYDEV_UCFG_B0_P1_U0_CFG6, 0x40010246\r
-.set CYDEV_UCFG_B0_P1_U0_CFG7, 0x40010247\r
-.set CYDEV_UCFG_B0_P1_U0_CFG8, 0x40010248\r
-.set CYDEV_UCFG_B0_P1_U0_CFG9, 0x40010249\r
-.set CYDEV_UCFG_B0_P1_U0_CFG10, 0x4001024a\r
-.set CYDEV_UCFG_B0_P1_U0_CFG11, 0x4001024b\r
-.set CYDEV_UCFG_B0_P1_U0_CFG12, 0x4001024c\r
-.set CYDEV_UCFG_B0_P1_U0_CFG13, 0x4001024d\r
-.set CYDEV_UCFG_B0_P1_U0_CFG14, 0x4001024e\r
-.set CYDEV_UCFG_B0_P1_U0_CFG15, 0x4001024f\r
-.set CYDEV_UCFG_B0_P1_U0_CFG16, 0x40010250\r
-.set CYDEV_UCFG_B0_P1_U0_CFG17, 0x40010251\r
-.set CYDEV_UCFG_B0_P1_U0_CFG18, 0x40010252\r
-.set CYDEV_UCFG_B0_P1_U0_CFG19, 0x40010253\r
-.set CYDEV_UCFG_B0_P1_U0_CFG20, 0x40010254\r
-.set CYDEV_UCFG_B0_P1_U0_CFG21, 0x40010255\r
-.set CYDEV_UCFG_B0_P1_U0_CFG22, 0x40010256\r
-.set CYDEV_UCFG_B0_P1_U0_CFG23, 0x40010257\r
-.set CYDEV_UCFG_B0_P1_U0_CFG24, 0x40010258\r
-.set CYDEV_UCFG_B0_P1_U0_CFG25, 0x40010259\r
-.set CYDEV_UCFG_B0_P1_U0_CFG26, 0x4001025a\r
-.set CYDEV_UCFG_B0_P1_U0_CFG27, 0x4001025b\r
-.set CYDEV_UCFG_B0_P1_U0_CFG28, 0x4001025c\r
-.set CYDEV_UCFG_B0_P1_U0_CFG29, 0x4001025d\r
-.set CYDEV_UCFG_B0_P1_U0_CFG30, 0x4001025e\r
-.set CYDEV_UCFG_B0_P1_U0_CFG31, 0x4001025f\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG0, 0x40010260\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG1, 0x40010262\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG2, 0x40010264\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG3, 0x40010266\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG4, 0x40010268\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG5, 0x4001026a\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG6, 0x4001026c\r
-.set CYDEV_UCFG_B0_P1_U0_DCFG7, 0x4001026e\r
-.set CYDEV_UCFG_B0_P1_U1_BASE, 0x40010280\r
-.set CYDEV_UCFG_B0_P1_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT0, 0x40010280\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT1, 0x40010284\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT2, 0x40010288\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT3, 0x4001028c\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT4, 0x40010290\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT5, 0x40010294\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT6, 0x40010298\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT7, 0x4001029c\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT8, 0x400102a0\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT9, 0x400102a4\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT10, 0x400102a8\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_IT11, 0x400102ac\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_ORT0, 0x400102b0\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_ORT1, 0x400102b2\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_ORT2, 0x400102b4\r
-.set CYDEV_UCFG_B0_P1_U1_PLD_ORT3, 0x400102b6\r
-.set CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST, 0x400102b8\r
-.set CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB, 0x400102ba\r
-.set CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET, 0x400102bc\r
-.set CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS, 0x400102be\r
-.set CYDEV_UCFG_B0_P1_U1_CFG0, 0x400102c0\r
-.set CYDEV_UCFG_B0_P1_U1_CFG1, 0x400102c1\r
-.set CYDEV_UCFG_B0_P1_U1_CFG2, 0x400102c2\r
-.set CYDEV_UCFG_B0_P1_U1_CFG3, 0x400102c3\r
-.set CYDEV_UCFG_B0_P1_U1_CFG4, 0x400102c4\r
-.set CYDEV_UCFG_B0_P1_U1_CFG5, 0x400102c5\r
-.set CYDEV_UCFG_B0_P1_U1_CFG6, 0x400102c6\r
-.set CYDEV_UCFG_B0_P1_U1_CFG7, 0x400102c7\r
-.set CYDEV_UCFG_B0_P1_U1_CFG8, 0x400102c8\r
-.set CYDEV_UCFG_B0_P1_U1_CFG9, 0x400102c9\r
-.set CYDEV_UCFG_B0_P1_U1_CFG10, 0x400102ca\r
-.set CYDEV_UCFG_B0_P1_U1_CFG11, 0x400102cb\r
-.set CYDEV_UCFG_B0_P1_U1_CFG12, 0x400102cc\r
-.set CYDEV_UCFG_B0_P1_U1_CFG13, 0x400102cd\r
-.set CYDEV_UCFG_B0_P1_U1_CFG14, 0x400102ce\r
-.set CYDEV_UCFG_B0_P1_U1_CFG15, 0x400102cf\r
-.set CYDEV_UCFG_B0_P1_U1_CFG16, 0x400102d0\r
-.set CYDEV_UCFG_B0_P1_U1_CFG17, 0x400102d1\r
-.set CYDEV_UCFG_B0_P1_U1_CFG18, 0x400102d2\r
-.set CYDEV_UCFG_B0_P1_U1_CFG19, 0x400102d3\r
-.set CYDEV_UCFG_B0_P1_U1_CFG20, 0x400102d4\r
-.set CYDEV_UCFG_B0_P1_U1_CFG21, 0x400102d5\r
-.set CYDEV_UCFG_B0_P1_U1_CFG22, 0x400102d6\r
-.set CYDEV_UCFG_B0_P1_U1_CFG23, 0x400102d7\r
-.set CYDEV_UCFG_B0_P1_U1_CFG24, 0x400102d8\r
-.set CYDEV_UCFG_B0_P1_U1_CFG25, 0x400102d9\r
-.set CYDEV_UCFG_B0_P1_U1_CFG26, 0x400102da\r
-.set CYDEV_UCFG_B0_P1_U1_CFG27, 0x400102db\r
-.set CYDEV_UCFG_B0_P1_U1_CFG28, 0x400102dc\r
-.set CYDEV_UCFG_B0_P1_U1_CFG29, 0x400102dd\r
-.set CYDEV_UCFG_B0_P1_U1_CFG30, 0x400102de\r
-.set CYDEV_UCFG_B0_P1_U1_CFG31, 0x400102df\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG0, 0x400102e0\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG1, 0x400102e2\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG2, 0x400102e4\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG3, 0x400102e6\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG4, 0x400102e8\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG5, 0x400102ea\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG6, 0x400102ec\r
-.set CYDEV_UCFG_B0_P1_U1_DCFG7, 0x400102ee\r
-.set CYDEV_UCFG_B0_P1_ROUTE_BASE, 0x40010300\r
-.set CYDEV_UCFG_B0_P1_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P2_BASE, 0x40010400\r
-.set CYDEV_UCFG_B0_P2_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P2_U0_BASE, 0x40010400\r
-.set CYDEV_UCFG_B0_P2_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT0, 0x40010400\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT1, 0x40010404\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT2, 0x40010408\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT3, 0x4001040c\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT4, 0x40010410\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT5, 0x40010414\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT6, 0x40010418\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT7, 0x4001041c\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT8, 0x40010420\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT9, 0x40010424\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT10, 0x40010428\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_IT11, 0x4001042c\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_ORT0, 0x40010430\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_ORT1, 0x40010432\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_ORT2, 0x40010434\r
-.set CYDEV_UCFG_B0_P2_U0_PLD_ORT3, 0x40010436\r
-.set CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST, 0x40010438\r
-.set CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB, 0x4001043a\r
-.set CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET, 0x4001043c\r
-.set CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS, 0x4001043e\r
-.set CYDEV_UCFG_B0_P2_U0_CFG0, 0x40010440\r
-.set CYDEV_UCFG_B0_P2_U0_CFG1, 0x40010441\r
-.set CYDEV_UCFG_B0_P2_U0_CFG2, 0x40010442\r
-.set CYDEV_UCFG_B0_P2_U0_CFG3, 0x40010443\r
-.set CYDEV_UCFG_B0_P2_U0_CFG4, 0x40010444\r
-.set CYDEV_UCFG_B0_P2_U0_CFG5, 0x40010445\r
-.set CYDEV_UCFG_B0_P2_U0_CFG6, 0x40010446\r
-.set CYDEV_UCFG_B0_P2_U0_CFG7, 0x40010447\r
-.set CYDEV_UCFG_B0_P2_U0_CFG8, 0x40010448\r
-.set CYDEV_UCFG_B0_P2_U0_CFG9, 0x40010449\r
-.set CYDEV_UCFG_B0_P2_U0_CFG10, 0x4001044a\r
-.set CYDEV_UCFG_B0_P2_U0_CFG11, 0x4001044b\r
-.set CYDEV_UCFG_B0_P2_U0_CFG12, 0x4001044c\r
-.set CYDEV_UCFG_B0_P2_U0_CFG13, 0x4001044d\r
-.set CYDEV_UCFG_B0_P2_U0_CFG14, 0x4001044e\r
-.set CYDEV_UCFG_B0_P2_U0_CFG15, 0x4001044f\r
-.set CYDEV_UCFG_B0_P2_U0_CFG16, 0x40010450\r
-.set CYDEV_UCFG_B0_P2_U0_CFG17, 0x40010451\r
-.set CYDEV_UCFG_B0_P2_U0_CFG18, 0x40010452\r
-.set CYDEV_UCFG_B0_P2_U0_CFG19, 0x40010453\r
-.set CYDEV_UCFG_B0_P2_U0_CFG20, 0x40010454\r
-.set CYDEV_UCFG_B0_P2_U0_CFG21, 0x40010455\r
-.set CYDEV_UCFG_B0_P2_U0_CFG22, 0x40010456\r
-.set CYDEV_UCFG_B0_P2_U0_CFG23, 0x40010457\r
-.set CYDEV_UCFG_B0_P2_U0_CFG24, 0x40010458\r
-.set CYDEV_UCFG_B0_P2_U0_CFG25, 0x40010459\r
-.set CYDEV_UCFG_B0_P2_U0_CFG26, 0x4001045a\r
-.set CYDEV_UCFG_B0_P2_U0_CFG27, 0x4001045b\r
-.set CYDEV_UCFG_B0_P2_U0_CFG28, 0x4001045c\r
-.set CYDEV_UCFG_B0_P2_U0_CFG29, 0x4001045d\r
-.set CYDEV_UCFG_B0_P2_U0_CFG30, 0x4001045e\r
-.set CYDEV_UCFG_B0_P2_U0_CFG31, 0x4001045f\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG0, 0x40010460\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG1, 0x40010462\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG2, 0x40010464\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG3, 0x40010466\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG4, 0x40010468\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG5, 0x4001046a\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG6, 0x4001046c\r
-.set CYDEV_UCFG_B0_P2_U0_DCFG7, 0x4001046e\r
-.set CYDEV_UCFG_B0_P2_U1_BASE, 0x40010480\r
-.set CYDEV_UCFG_B0_P2_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT0, 0x40010480\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT1, 0x40010484\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT2, 0x40010488\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT3, 0x4001048c\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT4, 0x40010490\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT5, 0x40010494\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT6, 0x40010498\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT7, 0x4001049c\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT8, 0x400104a0\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT9, 0x400104a4\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT10, 0x400104a8\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_IT11, 0x400104ac\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_ORT0, 0x400104b0\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_ORT1, 0x400104b2\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_ORT2, 0x400104b4\r
-.set CYDEV_UCFG_B0_P2_U1_PLD_ORT3, 0x400104b6\r
-.set CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST, 0x400104b8\r
-.set CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB, 0x400104ba\r
-.set CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET, 0x400104bc\r
-.set CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS, 0x400104be\r
-.set CYDEV_UCFG_B0_P2_U1_CFG0, 0x400104c0\r
-.set CYDEV_UCFG_B0_P2_U1_CFG1, 0x400104c1\r
-.set CYDEV_UCFG_B0_P2_U1_CFG2, 0x400104c2\r
-.set CYDEV_UCFG_B0_P2_U1_CFG3, 0x400104c3\r
-.set CYDEV_UCFG_B0_P2_U1_CFG4, 0x400104c4\r
-.set CYDEV_UCFG_B0_P2_U1_CFG5, 0x400104c5\r
-.set CYDEV_UCFG_B0_P2_U1_CFG6, 0x400104c6\r
-.set CYDEV_UCFG_B0_P2_U1_CFG7, 0x400104c7\r
-.set CYDEV_UCFG_B0_P2_U1_CFG8, 0x400104c8\r
-.set CYDEV_UCFG_B0_P2_U1_CFG9, 0x400104c9\r
-.set CYDEV_UCFG_B0_P2_U1_CFG10, 0x400104ca\r
-.set CYDEV_UCFG_B0_P2_U1_CFG11, 0x400104cb\r
-.set CYDEV_UCFG_B0_P2_U1_CFG12, 0x400104cc\r
-.set CYDEV_UCFG_B0_P2_U1_CFG13, 0x400104cd\r
-.set CYDEV_UCFG_B0_P2_U1_CFG14, 0x400104ce\r
-.set CYDEV_UCFG_B0_P2_U1_CFG15, 0x400104cf\r
-.set CYDEV_UCFG_B0_P2_U1_CFG16, 0x400104d0\r
-.set CYDEV_UCFG_B0_P2_U1_CFG17, 0x400104d1\r
-.set CYDEV_UCFG_B0_P2_U1_CFG18, 0x400104d2\r
-.set CYDEV_UCFG_B0_P2_U1_CFG19, 0x400104d3\r
-.set CYDEV_UCFG_B0_P2_U1_CFG20, 0x400104d4\r
-.set CYDEV_UCFG_B0_P2_U1_CFG21, 0x400104d5\r
-.set CYDEV_UCFG_B0_P2_U1_CFG22, 0x400104d6\r
-.set CYDEV_UCFG_B0_P2_U1_CFG23, 0x400104d7\r
-.set CYDEV_UCFG_B0_P2_U1_CFG24, 0x400104d8\r
-.set CYDEV_UCFG_B0_P2_U1_CFG25, 0x400104d9\r
-.set CYDEV_UCFG_B0_P2_U1_CFG26, 0x400104da\r
-.set CYDEV_UCFG_B0_P2_U1_CFG27, 0x400104db\r
-.set CYDEV_UCFG_B0_P2_U1_CFG28, 0x400104dc\r
-.set CYDEV_UCFG_B0_P2_U1_CFG29, 0x400104dd\r
-.set CYDEV_UCFG_B0_P2_U1_CFG30, 0x400104de\r
-.set CYDEV_UCFG_B0_P2_U1_CFG31, 0x400104df\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG0, 0x400104e0\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG1, 0x400104e2\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG2, 0x400104e4\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG3, 0x400104e6\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG4, 0x400104e8\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG5, 0x400104ea\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG6, 0x400104ec\r
-.set CYDEV_UCFG_B0_P2_U1_DCFG7, 0x400104ee\r
-.set CYDEV_UCFG_B0_P2_ROUTE_BASE, 0x40010500\r
-.set CYDEV_UCFG_B0_P2_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P3_BASE, 0x40010600\r
-.set CYDEV_UCFG_B0_P3_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P3_U0_BASE, 0x40010600\r
-.set CYDEV_UCFG_B0_P3_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT0, 0x40010600\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT1, 0x40010604\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT2, 0x40010608\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT3, 0x4001060c\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT4, 0x40010610\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT5, 0x40010614\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT6, 0x40010618\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT7, 0x4001061c\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT8, 0x40010620\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT9, 0x40010624\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT10, 0x40010628\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_IT11, 0x4001062c\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_ORT0, 0x40010630\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_ORT1, 0x40010632\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_ORT2, 0x40010634\r
-.set CYDEV_UCFG_B0_P3_U0_PLD_ORT3, 0x40010636\r
-.set CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST, 0x40010638\r
-.set CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB, 0x4001063a\r
-.set CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET, 0x4001063c\r
-.set CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS, 0x4001063e\r
-.set CYDEV_UCFG_B0_P3_U0_CFG0, 0x40010640\r
-.set CYDEV_UCFG_B0_P3_U0_CFG1, 0x40010641\r
-.set CYDEV_UCFG_B0_P3_U0_CFG2, 0x40010642\r
-.set CYDEV_UCFG_B0_P3_U0_CFG3, 0x40010643\r
-.set CYDEV_UCFG_B0_P3_U0_CFG4, 0x40010644\r
-.set CYDEV_UCFG_B0_P3_U0_CFG5, 0x40010645\r
-.set CYDEV_UCFG_B0_P3_U0_CFG6, 0x40010646\r
-.set CYDEV_UCFG_B0_P3_U0_CFG7, 0x40010647\r
-.set CYDEV_UCFG_B0_P3_U0_CFG8, 0x40010648\r
-.set CYDEV_UCFG_B0_P3_U0_CFG9, 0x40010649\r
-.set CYDEV_UCFG_B0_P3_U0_CFG10, 0x4001064a\r
-.set CYDEV_UCFG_B0_P3_U0_CFG11, 0x4001064b\r
-.set CYDEV_UCFG_B0_P3_U0_CFG12, 0x4001064c\r
-.set CYDEV_UCFG_B0_P3_U0_CFG13, 0x4001064d\r
-.set CYDEV_UCFG_B0_P3_U0_CFG14, 0x4001064e\r
-.set CYDEV_UCFG_B0_P3_U0_CFG15, 0x4001064f\r
-.set CYDEV_UCFG_B0_P3_U0_CFG16, 0x40010650\r
-.set CYDEV_UCFG_B0_P3_U0_CFG17, 0x40010651\r
-.set CYDEV_UCFG_B0_P3_U0_CFG18, 0x40010652\r
-.set CYDEV_UCFG_B0_P3_U0_CFG19, 0x40010653\r
-.set CYDEV_UCFG_B0_P3_U0_CFG20, 0x40010654\r
-.set CYDEV_UCFG_B0_P3_U0_CFG21, 0x40010655\r
-.set CYDEV_UCFG_B0_P3_U0_CFG22, 0x40010656\r
-.set CYDEV_UCFG_B0_P3_U0_CFG23, 0x40010657\r
-.set CYDEV_UCFG_B0_P3_U0_CFG24, 0x40010658\r
-.set CYDEV_UCFG_B0_P3_U0_CFG25, 0x40010659\r
-.set CYDEV_UCFG_B0_P3_U0_CFG26, 0x4001065a\r
-.set CYDEV_UCFG_B0_P3_U0_CFG27, 0x4001065b\r
-.set CYDEV_UCFG_B0_P3_U0_CFG28, 0x4001065c\r
-.set CYDEV_UCFG_B0_P3_U0_CFG29, 0x4001065d\r
-.set CYDEV_UCFG_B0_P3_U0_CFG30, 0x4001065e\r
-.set CYDEV_UCFG_B0_P3_U0_CFG31, 0x4001065f\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG0, 0x40010660\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG1, 0x40010662\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG2, 0x40010664\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG3, 0x40010666\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG4, 0x40010668\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG5, 0x4001066a\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG6, 0x4001066c\r
-.set CYDEV_UCFG_B0_P3_U0_DCFG7, 0x4001066e\r
-.set CYDEV_UCFG_B0_P3_U1_BASE, 0x40010680\r
-.set CYDEV_UCFG_B0_P3_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT0, 0x40010680\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT1, 0x40010684\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT2, 0x40010688\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT3, 0x4001068c\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT4, 0x40010690\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT5, 0x40010694\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT6, 0x40010698\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT7, 0x4001069c\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT8, 0x400106a0\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT9, 0x400106a4\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT10, 0x400106a8\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_IT11, 0x400106ac\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_ORT0, 0x400106b0\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_ORT1, 0x400106b2\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_ORT2, 0x400106b4\r
-.set CYDEV_UCFG_B0_P3_U1_PLD_ORT3, 0x400106b6\r
-.set CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST, 0x400106b8\r
-.set CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB, 0x400106ba\r
-.set CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET, 0x400106bc\r
-.set CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS, 0x400106be\r
-.set CYDEV_UCFG_B0_P3_U1_CFG0, 0x400106c0\r
-.set CYDEV_UCFG_B0_P3_U1_CFG1, 0x400106c1\r
-.set CYDEV_UCFG_B0_P3_U1_CFG2, 0x400106c2\r
-.set CYDEV_UCFG_B0_P3_U1_CFG3, 0x400106c3\r
-.set CYDEV_UCFG_B0_P3_U1_CFG4, 0x400106c4\r
-.set CYDEV_UCFG_B0_P3_U1_CFG5, 0x400106c5\r
-.set CYDEV_UCFG_B0_P3_U1_CFG6, 0x400106c6\r
-.set CYDEV_UCFG_B0_P3_U1_CFG7, 0x400106c7\r
-.set CYDEV_UCFG_B0_P3_U1_CFG8, 0x400106c8\r
-.set CYDEV_UCFG_B0_P3_U1_CFG9, 0x400106c9\r
-.set CYDEV_UCFG_B0_P3_U1_CFG10, 0x400106ca\r
-.set CYDEV_UCFG_B0_P3_U1_CFG11, 0x400106cb\r
-.set CYDEV_UCFG_B0_P3_U1_CFG12, 0x400106cc\r
-.set CYDEV_UCFG_B0_P3_U1_CFG13, 0x400106cd\r
-.set CYDEV_UCFG_B0_P3_U1_CFG14, 0x400106ce\r
-.set CYDEV_UCFG_B0_P3_U1_CFG15, 0x400106cf\r
-.set CYDEV_UCFG_B0_P3_U1_CFG16, 0x400106d0\r
-.set CYDEV_UCFG_B0_P3_U1_CFG17, 0x400106d1\r
-.set CYDEV_UCFG_B0_P3_U1_CFG18, 0x400106d2\r
-.set CYDEV_UCFG_B0_P3_U1_CFG19, 0x400106d3\r
-.set CYDEV_UCFG_B0_P3_U1_CFG20, 0x400106d4\r
-.set CYDEV_UCFG_B0_P3_U1_CFG21, 0x400106d5\r
-.set CYDEV_UCFG_B0_P3_U1_CFG22, 0x400106d6\r
-.set CYDEV_UCFG_B0_P3_U1_CFG23, 0x400106d7\r
-.set CYDEV_UCFG_B0_P3_U1_CFG24, 0x400106d8\r
-.set CYDEV_UCFG_B0_P3_U1_CFG25, 0x400106d9\r
-.set CYDEV_UCFG_B0_P3_U1_CFG26, 0x400106da\r
-.set CYDEV_UCFG_B0_P3_U1_CFG27, 0x400106db\r
-.set CYDEV_UCFG_B0_P3_U1_CFG28, 0x400106dc\r
-.set CYDEV_UCFG_B0_P3_U1_CFG29, 0x400106dd\r
-.set CYDEV_UCFG_B0_P3_U1_CFG30, 0x400106de\r
-.set CYDEV_UCFG_B0_P3_U1_CFG31, 0x400106df\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG0, 0x400106e0\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG1, 0x400106e2\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG2, 0x400106e4\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG3, 0x400106e6\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG4, 0x400106e8\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG5, 0x400106ea\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG6, 0x400106ec\r
-.set CYDEV_UCFG_B0_P3_U1_DCFG7, 0x400106ee\r
-.set CYDEV_UCFG_B0_P3_ROUTE_BASE, 0x40010700\r
-.set CYDEV_UCFG_B0_P3_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P4_BASE, 0x40010800\r
-.set CYDEV_UCFG_B0_P4_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P4_U0_BASE, 0x40010800\r
-.set CYDEV_UCFG_B0_P4_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT0, 0x40010800\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT1, 0x40010804\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT2, 0x40010808\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT3, 0x4001080c\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT4, 0x40010810\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT5, 0x40010814\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT6, 0x40010818\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT7, 0x4001081c\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT8, 0x40010820\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT9, 0x40010824\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT10, 0x40010828\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_IT11, 0x4001082c\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_ORT0, 0x40010830\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_ORT1, 0x40010832\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_ORT2, 0x40010834\r
-.set CYDEV_UCFG_B0_P4_U0_PLD_ORT3, 0x40010836\r
-.set CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST, 0x40010838\r
-.set CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB, 0x4001083a\r
-.set CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET, 0x4001083c\r
-.set CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS, 0x4001083e\r
-.set CYDEV_UCFG_B0_P4_U0_CFG0, 0x40010840\r
-.set CYDEV_UCFG_B0_P4_U0_CFG1, 0x40010841\r
-.set CYDEV_UCFG_B0_P4_U0_CFG2, 0x40010842\r
-.set CYDEV_UCFG_B0_P4_U0_CFG3, 0x40010843\r
-.set CYDEV_UCFG_B0_P4_U0_CFG4, 0x40010844\r
-.set CYDEV_UCFG_B0_P4_U0_CFG5, 0x40010845\r
-.set CYDEV_UCFG_B0_P4_U0_CFG6, 0x40010846\r
-.set CYDEV_UCFG_B0_P4_U0_CFG7, 0x40010847\r
-.set CYDEV_UCFG_B0_P4_U0_CFG8, 0x40010848\r
-.set CYDEV_UCFG_B0_P4_U0_CFG9, 0x40010849\r
-.set CYDEV_UCFG_B0_P4_U0_CFG10, 0x4001084a\r
-.set CYDEV_UCFG_B0_P4_U0_CFG11, 0x4001084b\r
-.set CYDEV_UCFG_B0_P4_U0_CFG12, 0x4001084c\r
-.set CYDEV_UCFG_B0_P4_U0_CFG13, 0x4001084d\r
-.set CYDEV_UCFG_B0_P4_U0_CFG14, 0x4001084e\r
-.set CYDEV_UCFG_B0_P4_U0_CFG15, 0x4001084f\r
-.set CYDEV_UCFG_B0_P4_U0_CFG16, 0x40010850\r
-.set CYDEV_UCFG_B0_P4_U0_CFG17, 0x40010851\r
-.set CYDEV_UCFG_B0_P4_U0_CFG18, 0x40010852\r
-.set CYDEV_UCFG_B0_P4_U0_CFG19, 0x40010853\r
-.set CYDEV_UCFG_B0_P4_U0_CFG20, 0x40010854\r
-.set CYDEV_UCFG_B0_P4_U0_CFG21, 0x40010855\r
-.set CYDEV_UCFG_B0_P4_U0_CFG22, 0x40010856\r
-.set CYDEV_UCFG_B0_P4_U0_CFG23, 0x40010857\r
-.set CYDEV_UCFG_B0_P4_U0_CFG24, 0x40010858\r
-.set CYDEV_UCFG_B0_P4_U0_CFG25, 0x40010859\r
-.set CYDEV_UCFG_B0_P4_U0_CFG26, 0x4001085a\r
-.set CYDEV_UCFG_B0_P4_U0_CFG27, 0x4001085b\r
-.set CYDEV_UCFG_B0_P4_U0_CFG28, 0x4001085c\r
-.set CYDEV_UCFG_B0_P4_U0_CFG29, 0x4001085d\r
-.set CYDEV_UCFG_B0_P4_U0_CFG30, 0x4001085e\r
-.set CYDEV_UCFG_B0_P4_U0_CFG31, 0x4001085f\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG0, 0x40010860\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG1, 0x40010862\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG2, 0x40010864\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG3, 0x40010866\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG4, 0x40010868\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG5, 0x4001086a\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG6, 0x4001086c\r
-.set CYDEV_UCFG_B0_P4_U0_DCFG7, 0x4001086e\r
-.set CYDEV_UCFG_B0_P4_U1_BASE, 0x40010880\r
-.set CYDEV_UCFG_B0_P4_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT0, 0x40010880\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT1, 0x40010884\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT2, 0x40010888\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT3, 0x4001088c\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT4, 0x40010890\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT5, 0x40010894\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT6, 0x40010898\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT7, 0x4001089c\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT8, 0x400108a0\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT9, 0x400108a4\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT10, 0x400108a8\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_IT11, 0x400108ac\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_ORT0, 0x400108b0\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_ORT1, 0x400108b2\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_ORT2, 0x400108b4\r
-.set CYDEV_UCFG_B0_P4_U1_PLD_ORT3, 0x400108b6\r
-.set CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST, 0x400108b8\r
-.set CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB, 0x400108ba\r
-.set CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET, 0x400108bc\r
-.set CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS, 0x400108be\r
-.set CYDEV_UCFG_B0_P4_U1_CFG0, 0x400108c0\r
-.set CYDEV_UCFG_B0_P4_U1_CFG1, 0x400108c1\r
-.set CYDEV_UCFG_B0_P4_U1_CFG2, 0x400108c2\r
-.set CYDEV_UCFG_B0_P4_U1_CFG3, 0x400108c3\r
-.set CYDEV_UCFG_B0_P4_U1_CFG4, 0x400108c4\r
-.set CYDEV_UCFG_B0_P4_U1_CFG5, 0x400108c5\r
-.set CYDEV_UCFG_B0_P4_U1_CFG6, 0x400108c6\r
-.set CYDEV_UCFG_B0_P4_U1_CFG7, 0x400108c7\r
-.set CYDEV_UCFG_B0_P4_U1_CFG8, 0x400108c8\r
-.set CYDEV_UCFG_B0_P4_U1_CFG9, 0x400108c9\r
-.set CYDEV_UCFG_B0_P4_U1_CFG10, 0x400108ca\r
-.set CYDEV_UCFG_B0_P4_U1_CFG11, 0x400108cb\r
-.set CYDEV_UCFG_B0_P4_U1_CFG12, 0x400108cc\r
-.set CYDEV_UCFG_B0_P4_U1_CFG13, 0x400108cd\r
-.set CYDEV_UCFG_B0_P4_U1_CFG14, 0x400108ce\r
-.set CYDEV_UCFG_B0_P4_U1_CFG15, 0x400108cf\r
-.set CYDEV_UCFG_B0_P4_U1_CFG16, 0x400108d0\r
-.set CYDEV_UCFG_B0_P4_U1_CFG17, 0x400108d1\r
-.set CYDEV_UCFG_B0_P4_U1_CFG18, 0x400108d2\r
-.set CYDEV_UCFG_B0_P4_U1_CFG19, 0x400108d3\r
-.set CYDEV_UCFG_B0_P4_U1_CFG20, 0x400108d4\r
-.set CYDEV_UCFG_B0_P4_U1_CFG21, 0x400108d5\r
-.set CYDEV_UCFG_B0_P4_U1_CFG22, 0x400108d6\r
-.set CYDEV_UCFG_B0_P4_U1_CFG23, 0x400108d7\r
-.set CYDEV_UCFG_B0_P4_U1_CFG24, 0x400108d8\r
-.set CYDEV_UCFG_B0_P4_U1_CFG25, 0x400108d9\r
-.set CYDEV_UCFG_B0_P4_U1_CFG26, 0x400108da\r
-.set CYDEV_UCFG_B0_P4_U1_CFG27, 0x400108db\r
-.set CYDEV_UCFG_B0_P4_U1_CFG28, 0x400108dc\r
-.set CYDEV_UCFG_B0_P4_U1_CFG29, 0x400108dd\r
-.set CYDEV_UCFG_B0_P4_U1_CFG30, 0x400108de\r
-.set CYDEV_UCFG_B0_P4_U1_CFG31, 0x400108df\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG0, 0x400108e0\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG1, 0x400108e2\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG2, 0x400108e4\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG3, 0x400108e6\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG4, 0x400108e8\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG5, 0x400108ea\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG6, 0x400108ec\r
-.set CYDEV_UCFG_B0_P4_U1_DCFG7, 0x400108ee\r
-.set CYDEV_UCFG_B0_P4_ROUTE_BASE, 0x40010900\r
-.set CYDEV_UCFG_B0_P4_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P5_BASE, 0x40010a00\r
-.set CYDEV_UCFG_B0_P5_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P5_U0_BASE, 0x40010a00\r
-.set CYDEV_UCFG_B0_P5_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT0, 0x40010a00\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT1, 0x40010a04\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT2, 0x40010a08\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT3, 0x40010a0c\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT4, 0x40010a10\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT5, 0x40010a14\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT6, 0x40010a18\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT7, 0x40010a1c\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT8, 0x40010a20\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT9, 0x40010a24\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT10, 0x40010a28\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_IT11, 0x40010a2c\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_ORT0, 0x40010a30\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_ORT1, 0x40010a32\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_ORT2, 0x40010a34\r
-.set CYDEV_UCFG_B0_P5_U0_PLD_ORT3, 0x40010a36\r
-.set CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST, 0x40010a38\r
-.set CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB, 0x40010a3a\r
-.set CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET, 0x40010a3c\r
-.set CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS, 0x40010a3e\r
-.set CYDEV_UCFG_B0_P5_U0_CFG0, 0x40010a40\r
-.set CYDEV_UCFG_B0_P5_U0_CFG1, 0x40010a41\r
-.set CYDEV_UCFG_B0_P5_U0_CFG2, 0x40010a42\r
-.set CYDEV_UCFG_B0_P5_U0_CFG3, 0x40010a43\r
-.set CYDEV_UCFG_B0_P5_U0_CFG4, 0x40010a44\r
-.set CYDEV_UCFG_B0_P5_U0_CFG5, 0x40010a45\r
-.set CYDEV_UCFG_B0_P5_U0_CFG6, 0x40010a46\r
-.set CYDEV_UCFG_B0_P5_U0_CFG7, 0x40010a47\r
-.set CYDEV_UCFG_B0_P5_U0_CFG8, 0x40010a48\r
-.set CYDEV_UCFG_B0_P5_U0_CFG9, 0x40010a49\r
-.set CYDEV_UCFG_B0_P5_U0_CFG10, 0x40010a4a\r
-.set CYDEV_UCFG_B0_P5_U0_CFG11, 0x40010a4b\r
-.set CYDEV_UCFG_B0_P5_U0_CFG12, 0x40010a4c\r
-.set CYDEV_UCFG_B0_P5_U0_CFG13, 0x40010a4d\r
-.set CYDEV_UCFG_B0_P5_U0_CFG14, 0x40010a4e\r
-.set CYDEV_UCFG_B0_P5_U0_CFG15, 0x40010a4f\r
-.set CYDEV_UCFG_B0_P5_U0_CFG16, 0x40010a50\r
-.set CYDEV_UCFG_B0_P5_U0_CFG17, 0x40010a51\r
-.set CYDEV_UCFG_B0_P5_U0_CFG18, 0x40010a52\r
-.set CYDEV_UCFG_B0_P5_U0_CFG19, 0x40010a53\r
-.set CYDEV_UCFG_B0_P5_U0_CFG20, 0x40010a54\r
-.set CYDEV_UCFG_B0_P5_U0_CFG21, 0x40010a55\r
-.set CYDEV_UCFG_B0_P5_U0_CFG22, 0x40010a56\r
-.set CYDEV_UCFG_B0_P5_U0_CFG23, 0x40010a57\r
-.set CYDEV_UCFG_B0_P5_U0_CFG24, 0x40010a58\r
-.set CYDEV_UCFG_B0_P5_U0_CFG25, 0x40010a59\r
-.set CYDEV_UCFG_B0_P5_U0_CFG26, 0x40010a5a\r
-.set CYDEV_UCFG_B0_P5_U0_CFG27, 0x40010a5b\r
-.set CYDEV_UCFG_B0_P5_U0_CFG28, 0x40010a5c\r
-.set CYDEV_UCFG_B0_P5_U0_CFG29, 0x40010a5d\r
-.set CYDEV_UCFG_B0_P5_U0_CFG30, 0x40010a5e\r
-.set CYDEV_UCFG_B0_P5_U0_CFG31, 0x40010a5f\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG0, 0x40010a60\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG1, 0x40010a62\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG2, 0x40010a64\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG3, 0x40010a66\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG4, 0x40010a68\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG5, 0x40010a6a\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG6, 0x40010a6c\r
-.set CYDEV_UCFG_B0_P5_U0_DCFG7, 0x40010a6e\r
-.set CYDEV_UCFG_B0_P5_U1_BASE, 0x40010a80\r
-.set CYDEV_UCFG_B0_P5_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT0, 0x40010a80\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT1, 0x40010a84\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT2, 0x40010a88\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT3, 0x40010a8c\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT4, 0x40010a90\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT5, 0x40010a94\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT6, 0x40010a98\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT7, 0x40010a9c\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT8, 0x40010aa0\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT9, 0x40010aa4\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT10, 0x40010aa8\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_IT11, 0x40010aac\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_ORT0, 0x40010ab0\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_ORT1, 0x40010ab2\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_ORT2, 0x40010ab4\r
-.set CYDEV_UCFG_B0_P5_U1_PLD_ORT3, 0x40010ab6\r
-.set CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST, 0x40010ab8\r
-.set CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB, 0x40010aba\r
-.set CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET, 0x40010abc\r
-.set CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS, 0x40010abe\r
-.set CYDEV_UCFG_B0_P5_U1_CFG0, 0x40010ac0\r
-.set CYDEV_UCFG_B0_P5_U1_CFG1, 0x40010ac1\r
-.set CYDEV_UCFG_B0_P5_U1_CFG2, 0x40010ac2\r
-.set CYDEV_UCFG_B0_P5_U1_CFG3, 0x40010ac3\r
-.set CYDEV_UCFG_B0_P5_U1_CFG4, 0x40010ac4\r
-.set CYDEV_UCFG_B0_P5_U1_CFG5, 0x40010ac5\r
-.set CYDEV_UCFG_B0_P5_U1_CFG6, 0x40010ac6\r
-.set CYDEV_UCFG_B0_P5_U1_CFG7, 0x40010ac7\r
-.set CYDEV_UCFG_B0_P5_U1_CFG8, 0x40010ac8\r
-.set CYDEV_UCFG_B0_P5_U1_CFG9, 0x40010ac9\r
-.set CYDEV_UCFG_B0_P5_U1_CFG10, 0x40010aca\r
-.set CYDEV_UCFG_B0_P5_U1_CFG11, 0x40010acb\r
-.set CYDEV_UCFG_B0_P5_U1_CFG12, 0x40010acc\r
-.set CYDEV_UCFG_B0_P5_U1_CFG13, 0x40010acd\r
-.set CYDEV_UCFG_B0_P5_U1_CFG14, 0x40010ace\r
-.set CYDEV_UCFG_B0_P5_U1_CFG15, 0x40010acf\r
-.set CYDEV_UCFG_B0_P5_U1_CFG16, 0x40010ad0\r
-.set CYDEV_UCFG_B0_P5_U1_CFG17, 0x40010ad1\r
-.set CYDEV_UCFG_B0_P5_U1_CFG18, 0x40010ad2\r
-.set CYDEV_UCFG_B0_P5_U1_CFG19, 0x40010ad3\r
-.set CYDEV_UCFG_B0_P5_U1_CFG20, 0x40010ad4\r
-.set CYDEV_UCFG_B0_P5_U1_CFG21, 0x40010ad5\r
-.set CYDEV_UCFG_B0_P5_U1_CFG22, 0x40010ad6\r
-.set CYDEV_UCFG_B0_P5_U1_CFG23, 0x40010ad7\r
-.set CYDEV_UCFG_B0_P5_U1_CFG24, 0x40010ad8\r
-.set CYDEV_UCFG_B0_P5_U1_CFG25, 0x40010ad9\r
-.set CYDEV_UCFG_B0_P5_U1_CFG26, 0x40010ada\r
-.set CYDEV_UCFG_B0_P5_U1_CFG27, 0x40010adb\r
-.set CYDEV_UCFG_B0_P5_U1_CFG28, 0x40010adc\r
-.set CYDEV_UCFG_B0_P5_U1_CFG29, 0x40010add\r
-.set CYDEV_UCFG_B0_P5_U1_CFG30, 0x40010ade\r
-.set CYDEV_UCFG_B0_P5_U1_CFG31, 0x40010adf\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG0, 0x40010ae0\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG1, 0x40010ae2\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG2, 0x40010ae4\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG3, 0x40010ae6\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG4, 0x40010ae8\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG5, 0x40010aea\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG6, 0x40010aec\r
-.set CYDEV_UCFG_B0_P5_U1_DCFG7, 0x40010aee\r
-.set CYDEV_UCFG_B0_P5_ROUTE_BASE, 0x40010b00\r
-.set CYDEV_UCFG_B0_P5_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P6_BASE, 0x40010c00\r
-.set CYDEV_UCFG_B0_P6_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P6_U0_BASE, 0x40010c00\r
-.set CYDEV_UCFG_B0_P6_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT0, 0x40010c00\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT1, 0x40010c04\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT2, 0x40010c08\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT3, 0x40010c0c\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT4, 0x40010c10\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT5, 0x40010c14\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT6, 0x40010c18\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT7, 0x40010c1c\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT8, 0x40010c20\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT9, 0x40010c24\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT10, 0x40010c28\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_IT11, 0x40010c2c\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_ORT0, 0x40010c30\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_ORT1, 0x40010c32\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_ORT2, 0x40010c34\r
-.set CYDEV_UCFG_B0_P6_U0_PLD_ORT3, 0x40010c36\r
-.set CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST, 0x40010c38\r
-.set CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB, 0x40010c3a\r
-.set CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET, 0x40010c3c\r
-.set CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS, 0x40010c3e\r
-.set CYDEV_UCFG_B0_P6_U0_CFG0, 0x40010c40\r
-.set CYDEV_UCFG_B0_P6_U0_CFG1, 0x40010c41\r
-.set CYDEV_UCFG_B0_P6_U0_CFG2, 0x40010c42\r
-.set CYDEV_UCFG_B0_P6_U0_CFG3, 0x40010c43\r
-.set CYDEV_UCFG_B0_P6_U0_CFG4, 0x40010c44\r
-.set CYDEV_UCFG_B0_P6_U0_CFG5, 0x40010c45\r
-.set CYDEV_UCFG_B0_P6_U0_CFG6, 0x40010c46\r
-.set CYDEV_UCFG_B0_P6_U0_CFG7, 0x40010c47\r
-.set CYDEV_UCFG_B0_P6_U0_CFG8, 0x40010c48\r
-.set CYDEV_UCFG_B0_P6_U0_CFG9, 0x40010c49\r
-.set CYDEV_UCFG_B0_P6_U0_CFG10, 0x40010c4a\r
-.set CYDEV_UCFG_B0_P6_U0_CFG11, 0x40010c4b\r
-.set CYDEV_UCFG_B0_P6_U0_CFG12, 0x40010c4c\r
-.set CYDEV_UCFG_B0_P6_U0_CFG13, 0x40010c4d\r
-.set CYDEV_UCFG_B0_P6_U0_CFG14, 0x40010c4e\r
-.set CYDEV_UCFG_B0_P6_U0_CFG15, 0x40010c4f\r
-.set CYDEV_UCFG_B0_P6_U0_CFG16, 0x40010c50\r
-.set CYDEV_UCFG_B0_P6_U0_CFG17, 0x40010c51\r
-.set CYDEV_UCFG_B0_P6_U0_CFG18, 0x40010c52\r
-.set CYDEV_UCFG_B0_P6_U0_CFG19, 0x40010c53\r
-.set CYDEV_UCFG_B0_P6_U0_CFG20, 0x40010c54\r
-.set CYDEV_UCFG_B0_P6_U0_CFG21, 0x40010c55\r
-.set CYDEV_UCFG_B0_P6_U0_CFG22, 0x40010c56\r
-.set CYDEV_UCFG_B0_P6_U0_CFG23, 0x40010c57\r
-.set CYDEV_UCFG_B0_P6_U0_CFG24, 0x40010c58\r
-.set CYDEV_UCFG_B0_P6_U0_CFG25, 0x40010c59\r
-.set CYDEV_UCFG_B0_P6_U0_CFG26, 0x40010c5a\r
-.set CYDEV_UCFG_B0_P6_U0_CFG27, 0x40010c5b\r
-.set CYDEV_UCFG_B0_P6_U0_CFG28, 0x40010c5c\r
-.set CYDEV_UCFG_B0_P6_U0_CFG29, 0x40010c5d\r
-.set CYDEV_UCFG_B0_P6_U0_CFG30, 0x40010c5e\r
-.set CYDEV_UCFG_B0_P6_U0_CFG31, 0x40010c5f\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG0, 0x40010c60\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG1, 0x40010c62\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG2, 0x40010c64\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG3, 0x40010c66\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG4, 0x40010c68\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG5, 0x40010c6a\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG6, 0x40010c6c\r
-.set CYDEV_UCFG_B0_P6_U0_DCFG7, 0x40010c6e\r
-.set CYDEV_UCFG_B0_P6_U1_BASE, 0x40010c80\r
-.set CYDEV_UCFG_B0_P6_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT0, 0x40010c80\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT1, 0x40010c84\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT2, 0x40010c88\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT3, 0x40010c8c\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT4, 0x40010c90\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT5, 0x40010c94\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT6, 0x40010c98\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT7, 0x40010c9c\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT8, 0x40010ca0\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT9, 0x40010ca4\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT10, 0x40010ca8\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_IT11, 0x40010cac\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_ORT0, 0x40010cb0\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_ORT1, 0x40010cb2\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_ORT2, 0x40010cb4\r
-.set CYDEV_UCFG_B0_P6_U1_PLD_ORT3, 0x40010cb6\r
-.set CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST, 0x40010cb8\r
-.set CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB, 0x40010cba\r
-.set CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET, 0x40010cbc\r
-.set CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS, 0x40010cbe\r
-.set CYDEV_UCFG_B0_P6_U1_CFG0, 0x40010cc0\r
-.set CYDEV_UCFG_B0_P6_U1_CFG1, 0x40010cc1\r
-.set CYDEV_UCFG_B0_P6_U1_CFG2, 0x40010cc2\r
-.set CYDEV_UCFG_B0_P6_U1_CFG3, 0x40010cc3\r
-.set CYDEV_UCFG_B0_P6_U1_CFG4, 0x40010cc4\r
-.set CYDEV_UCFG_B0_P6_U1_CFG5, 0x40010cc5\r
-.set CYDEV_UCFG_B0_P6_U1_CFG6, 0x40010cc6\r
-.set CYDEV_UCFG_B0_P6_U1_CFG7, 0x40010cc7\r
-.set CYDEV_UCFG_B0_P6_U1_CFG8, 0x40010cc8\r
-.set CYDEV_UCFG_B0_P6_U1_CFG9, 0x40010cc9\r
-.set CYDEV_UCFG_B0_P6_U1_CFG10, 0x40010cca\r
-.set CYDEV_UCFG_B0_P6_U1_CFG11, 0x40010ccb\r
-.set CYDEV_UCFG_B0_P6_U1_CFG12, 0x40010ccc\r
-.set CYDEV_UCFG_B0_P6_U1_CFG13, 0x40010ccd\r
-.set CYDEV_UCFG_B0_P6_U1_CFG14, 0x40010cce\r
-.set CYDEV_UCFG_B0_P6_U1_CFG15, 0x40010ccf\r
-.set CYDEV_UCFG_B0_P6_U1_CFG16, 0x40010cd0\r
-.set CYDEV_UCFG_B0_P6_U1_CFG17, 0x40010cd1\r
-.set CYDEV_UCFG_B0_P6_U1_CFG18, 0x40010cd2\r
-.set CYDEV_UCFG_B0_P6_U1_CFG19, 0x40010cd3\r
-.set CYDEV_UCFG_B0_P6_U1_CFG20, 0x40010cd4\r
-.set CYDEV_UCFG_B0_P6_U1_CFG21, 0x40010cd5\r
-.set CYDEV_UCFG_B0_P6_U1_CFG22, 0x40010cd6\r
-.set CYDEV_UCFG_B0_P6_U1_CFG23, 0x40010cd7\r
-.set CYDEV_UCFG_B0_P6_U1_CFG24, 0x40010cd8\r
-.set CYDEV_UCFG_B0_P6_U1_CFG25, 0x40010cd9\r
-.set CYDEV_UCFG_B0_P6_U1_CFG26, 0x40010cda\r
-.set CYDEV_UCFG_B0_P6_U1_CFG27, 0x40010cdb\r
-.set CYDEV_UCFG_B0_P6_U1_CFG28, 0x40010cdc\r
-.set CYDEV_UCFG_B0_P6_U1_CFG29, 0x40010cdd\r
-.set CYDEV_UCFG_B0_P6_U1_CFG30, 0x40010cde\r
-.set CYDEV_UCFG_B0_P6_U1_CFG31, 0x40010cdf\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG0, 0x40010ce0\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG1, 0x40010ce2\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG2, 0x40010ce4\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG3, 0x40010ce6\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG4, 0x40010ce8\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG5, 0x40010cea\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG6, 0x40010cec\r
-.set CYDEV_UCFG_B0_P6_U1_DCFG7, 0x40010cee\r
-.set CYDEV_UCFG_B0_P6_ROUTE_BASE, 0x40010d00\r
-.set CYDEV_UCFG_B0_P6_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P7_BASE, 0x40010e00\r
-.set CYDEV_UCFG_B0_P7_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P7_U0_BASE, 0x40010e00\r
-.set CYDEV_UCFG_B0_P7_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT0, 0x40010e00\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT1, 0x40010e04\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT2, 0x40010e08\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT3, 0x40010e0c\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT4, 0x40010e10\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT5, 0x40010e14\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT6, 0x40010e18\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT7, 0x40010e1c\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT8, 0x40010e20\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT9, 0x40010e24\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT10, 0x40010e28\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_IT11, 0x40010e2c\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_ORT0, 0x40010e30\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_ORT1, 0x40010e32\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_ORT2, 0x40010e34\r
-.set CYDEV_UCFG_B0_P7_U0_PLD_ORT3, 0x40010e36\r
-.set CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST, 0x40010e38\r
-.set CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB, 0x40010e3a\r
-.set CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET, 0x40010e3c\r
-.set CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS, 0x40010e3e\r
-.set CYDEV_UCFG_B0_P7_U0_CFG0, 0x40010e40\r
-.set CYDEV_UCFG_B0_P7_U0_CFG1, 0x40010e41\r
-.set CYDEV_UCFG_B0_P7_U0_CFG2, 0x40010e42\r
-.set CYDEV_UCFG_B0_P7_U0_CFG3, 0x40010e43\r
-.set CYDEV_UCFG_B0_P7_U0_CFG4, 0x40010e44\r
-.set CYDEV_UCFG_B0_P7_U0_CFG5, 0x40010e45\r
-.set CYDEV_UCFG_B0_P7_U0_CFG6, 0x40010e46\r
-.set CYDEV_UCFG_B0_P7_U0_CFG7, 0x40010e47\r
-.set CYDEV_UCFG_B0_P7_U0_CFG8, 0x40010e48\r
-.set CYDEV_UCFG_B0_P7_U0_CFG9, 0x40010e49\r
-.set CYDEV_UCFG_B0_P7_U0_CFG10, 0x40010e4a\r
-.set CYDEV_UCFG_B0_P7_U0_CFG11, 0x40010e4b\r
-.set CYDEV_UCFG_B0_P7_U0_CFG12, 0x40010e4c\r
-.set CYDEV_UCFG_B0_P7_U0_CFG13, 0x40010e4d\r
-.set CYDEV_UCFG_B0_P7_U0_CFG14, 0x40010e4e\r
-.set CYDEV_UCFG_B0_P7_U0_CFG15, 0x40010e4f\r
-.set CYDEV_UCFG_B0_P7_U0_CFG16, 0x40010e50\r
-.set CYDEV_UCFG_B0_P7_U0_CFG17, 0x40010e51\r
-.set CYDEV_UCFG_B0_P7_U0_CFG18, 0x40010e52\r
-.set CYDEV_UCFG_B0_P7_U0_CFG19, 0x40010e53\r
-.set CYDEV_UCFG_B0_P7_U0_CFG20, 0x40010e54\r
-.set CYDEV_UCFG_B0_P7_U0_CFG21, 0x40010e55\r
-.set CYDEV_UCFG_B0_P7_U0_CFG22, 0x40010e56\r
-.set CYDEV_UCFG_B0_P7_U0_CFG23, 0x40010e57\r
-.set CYDEV_UCFG_B0_P7_U0_CFG24, 0x40010e58\r
-.set CYDEV_UCFG_B0_P7_U0_CFG25, 0x40010e59\r
-.set CYDEV_UCFG_B0_P7_U0_CFG26, 0x40010e5a\r
-.set CYDEV_UCFG_B0_P7_U0_CFG27, 0x40010e5b\r
-.set CYDEV_UCFG_B0_P7_U0_CFG28, 0x40010e5c\r
-.set CYDEV_UCFG_B0_P7_U0_CFG29, 0x40010e5d\r
-.set CYDEV_UCFG_B0_P7_U0_CFG30, 0x40010e5e\r
-.set CYDEV_UCFG_B0_P7_U0_CFG31, 0x40010e5f\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG0, 0x40010e60\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG1, 0x40010e62\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG2, 0x40010e64\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG3, 0x40010e66\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG4, 0x40010e68\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG5, 0x40010e6a\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG6, 0x40010e6c\r
-.set CYDEV_UCFG_B0_P7_U0_DCFG7, 0x40010e6e\r
-.set CYDEV_UCFG_B0_P7_U1_BASE, 0x40010e80\r
-.set CYDEV_UCFG_B0_P7_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT0, 0x40010e80\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT1, 0x40010e84\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT2, 0x40010e88\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT3, 0x40010e8c\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT4, 0x40010e90\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT5, 0x40010e94\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT6, 0x40010e98\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT7, 0x40010e9c\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT8, 0x40010ea0\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT9, 0x40010ea4\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT10, 0x40010ea8\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_IT11, 0x40010eac\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_ORT0, 0x40010eb0\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_ORT1, 0x40010eb2\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_ORT2, 0x40010eb4\r
-.set CYDEV_UCFG_B0_P7_U1_PLD_ORT3, 0x40010eb6\r
-.set CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST, 0x40010eb8\r
-.set CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB, 0x40010eba\r
-.set CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET, 0x40010ebc\r
-.set CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS, 0x40010ebe\r
-.set CYDEV_UCFG_B0_P7_U1_CFG0, 0x40010ec0\r
-.set CYDEV_UCFG_B0_P7_U1_CFG1, 0x40010ec1\r
-.set CYDEV_UCFG_B0_P7_U1_CFG2, 0x40010ec2\r
-.set CYDEV_UCFG_B0_P7_U1_CFG3, 0x40010ec3\r
-.set CYDEV_UCFG_B0_P7_U1_CFG4, 0x40010ec4\r
-.set CYDEV_UCFG_B0_P7_U1_CFG5, 0x40010ec5\r
-.set CYDEV_UCFG_B0_P7_U1_CFG6, 0x40010ec6\r
-.set CYDEV_UCFG_B0_P7_U1_CFG7, 0x40010ec7\r
-.set CYDEV_UCFG_B0_P7_U1_CFG8, 0x40010ec8\r
-.set CYDEV_UCFG_B0_P7_U1_CFG9, 0x40010ec9\r
-.set CYDEV_UCFG_B0_P7_U1_CFG10, 0x40010eca\r
-.set CYDEV_UCFG_B0_P7_U1_CFG11, 0x40010ecb\r
-.set CYDEV_UCFG_B0_P7_U1_CFG12, 0x40010ecc\r
-.set CYDEV_UCFG_B0_P7_U1_CFG13, 0x40010ecd\r
-.set CYDEV_UCFG_B0_P7_U1_CFG14, 0x40010ece\r
-.set CYDEV_UCFG_B0_P7_U1_CFG15, 0x40010ecf\r
-.set CYDEV_UCFG_B0_P7_U1_CFG16, 0x40010ed0\r
-.set CYDEV_UCFG_B0_P7_U1_CFG17, 0x40010ed1\r
-.set CYDEV_UCFG_B0_P7_U1_CFG18, 0x40010ed2\r
-.set CYDEV_UCFG_B0_P7_U1_CFG19, 0x40010ed3\r
-.set CYDEV_UCFG_B0_P7_U1_CFG20, 0x40010ed4\r
-.set CYDEV_UCFG_B0_P7_U1_CFG21, 0x40010ed5\r
-.set CYDEV_UCFG_B0_P7_U1_CFG22, 0x40010ed6\r
-.set CYDEV_UCFG_B0_P7_U1_CFG23, 0x40010ed7\r
-.set CYDEV_UCFG_B0_P7_U1_CFG24, 0x40010ed8\r
-.set CYDEV_UCFG_B0_P7_U1_CFG25, 0x40010ed9\r
-.set CYDEV_UCFG_B0_P7_U1_CFG26, 0x40010eda\r
-.set CYDEV_UCFG_B0_P7_U1_CFG27, 0x40010edb\r
-.set CYDEV_UCFG_B0_P7_U1_CFG28, 0x40010edc\r
-.set CYDEV_UCFG_B0_P7_U1_CFG29, 0x40010edd\r
-.set CYDEV_UCFG_B0_P7_U1_CFG30, 0x40010ede\r
-.set CYDEV_UCFG_B0_P7_U1_CFG31, 0x40010edf\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG0, 0x40010ee0\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG1, 0x40010ee2\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG2, 0x40010ee4\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG3, 0x40010ee6\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG4, 0x40010ee8\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG5, 0x40010eea\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG6, 0x40010eec\r
-.set CYDEV_UCFG_B0_P7_U1_DCFG7, 0x40010eee\r
-.set CYDEV_UCFG_B0_P7_ROUTE_BASE, 0x40010f00\r
-.set CYDEV_UCFG_B0_P7_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_BASE, 0x40011000\r
-.set CYDEV_UCFG_B1_SIZE, 0x00000fef\r
-.set CYDEV_UCFG_B1_P2_BASE, 0x40011400\r
-.set CYDEV_UCFG_B1_P2_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P2_U0_BASE, 0x40011400\r
-.set CYDEV_UCFG_B1_P2_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT0, 0x40011400\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT1, 0x40011404\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT2, 0x40011408\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT3, 0x4001140c\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT4, 0x40011410\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT5, 0x40011414\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT6, 0x40011418\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT7, 0x4001141c\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT8, 0x40011420\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT9, 0x40011424\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT10, 0x40011428\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_IT11, 0x4001142c\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_ORT0, 0x40011430\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_ORT1, 0x40011432\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_ORT2, 0x40011434\r
-.set CYDEV_UCFG_B1_P2_U0_PLD_ORT3, 0x40011436\r
-.set CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST, 0x40011438\r
-.set CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB, 0x4001143a\r
-.set CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET, 0x4001143c\r
-.set CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS, 0x4001143e\r
-.set CYDEV_UCFG_B1_P2_U0_CFG0, 0x40011440\r
-.set CYDEV_UCFG_B1_P2_U0_CFG1, 0x40011441\r
-.set CYDEV_UCFG_B1_P2_U0_CFG2, 0x40011442\r
-.set CYDEV_UCFG_B1_P2_U0_CFG3, 0x40011443\r
-.set CYDEV_UCFG_B1_P2_U0_CFG4, 0x40011444\r
-.set CYDEV_UCFG_B1_P2_U0_CFG5, 0x40011445\r
-.set CYDEV_UCFG_B1_P2_U0_CFG6, 0x40011446\r
-.set CYDEV_UCFG_B1_P2_U0_CFG7, 0x40011447\r
-.set CYDEV_UCFG_B1_P2_U0_CFG8, 0x40011448\r
-.set CYDEV_UCFG_B1_P2_U0_CFG9, 0x40011449\r
-.set CYDEV_UCFG_B1_P2_U0_CFG10, 0x4001144a\r
-.set CYDEV_UCFG_B1_P2_U0_CFG11, 0x4001144b\r
-.set CYDEV_UCFG_B1_P2_U0_CFG12, 0x4001144c\r
-.set CYDEV_UCFG_B1_P2_U0_CFG13, 0x4001144d\r
-.set CYDEV_UCFG_B1_P2_U0_CFG14, 0x4001144e\r
-.set CYDEV_UCFG_B1_P2_U0_CFG15, 0x4001144f\r
-.set CYDEV_UCFG_B1_P2_U0_CFG16, 0x40011450\r
-.set CYDEV_UCFG_B1_P2_U0_CFG17, 0x40011451\r
-.set CYDEV_UCFG_B1_P2_U0_CFG18, 0x40011452\r
-.set CYDEV_UCFG_B1_P2_U0_CFG19, 0x40011453\r
-.set CYDEV_UCFG_B1_P2_U0_CFG20, 0x40011454\r
-.set CYDEV_UCFG_B1_P2_U0_CFG21, 0x40011455\r
-.set CYDEV_UCFG_B1_P2_U0_CFG22, 0x40011456\r
-.set CYDEV_UCFG_B1_P2_U0_CFG23, 0x40011457\r
-.set CYDEV_UCFG_B1_P2_U0_CFG24, 0x40011458\r
-.set CYDEV_UCFG_B1_P2_U0_CFG25, 0x40011459\r
-.set CYDEV_UCFG_B1_P2_U0_CFG26, 0x4001145a\r
-.set CYDEV_UCFG_B1_P2_U0_CFG27, 0x4001145b\r
-.set CYDEV_UCFG_B1_P2_U0_CFG28, 0x4001145c\r
-.set CYDEV_UCFG_B1_P2_U0_CFG29, 0x4001145d\r
-.set CYDEV_UCFG_B1_P2_U0_CFG30, 0x4001145e\r
-.set CYDEV_UCFG_B1_P2_U0_CFG31, 0x4001145f\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG0, 0x40011460\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG1, 0x40011462\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG2, 0x40011464\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG3, 0x40011466\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG4, 0x40011468\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG5, 0x4001146a\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG6, 0x4001146c\r
-.set CYDEV_UCFG_B1_P2_U0_DCFG7, 0x4001146e\r
-.set CYDEV_UCFG_B1_P2_U1_BASE, 0x40011480\r
-.set CYDEV_UCFG_B1_P2_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT0, 0x40011480\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT1, 0x40011484\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT2, 0x40011488\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT3, 0x4001148c\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT4, 0x40011490\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT5, 0x40011494\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT6, 0x40011498\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT7, 0x4001149c\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT8, 0x400114a0\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT9, 0x400114a4\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT10, 0x400114a8\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_IT11, 0x400114ac\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_ORT0, 0x400114b0\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_ORT1, 0x400114b2\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_ORT2, 0x400114b4\r
-.set CYDEV_UCFG_B1_P2_U1_PLD_ORT3, 0x400114b6\r
-.set CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST, 0x400114b8\r
-.set CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB, 0x400114ba\r
-.set CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET, 0x400114bc\r
-.set CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS, 0x400114be\r
-.set CYDEV_UCFG_B1_P2_U1_CFG0, 0x400114c0\r
-.set CYDEV_UCFG_B1_P2_U1_CFG1, 0x400114c1\r
-.set CYDEV_UCFG_B1_P2_U1_CFG2, 0x400114c2\r
-.set CYDEV_UCFG_B1_P2_U1_CFG3, 0x400114c3\r
-.set CYDEV_UCFG_B1_P2_U1_CFG4, 0x400114c4\r
-.set CYDEV_UCFG_B1_P2_U1_CFG5, 0x400114c5\r
-.set CYDEV_UCFG_B1_P2_U1_CFG6, 0x400114c6\r
-.set CYDEV_UCFG_B1_P2_U1_CFG7, 0x400114c7\r
-.set CYDEV_UCFG_B1_P2_U1_CFG8, 0x400114c8\r
-.set CYDEV_UCFG_B1_P2_U1_CFG9, 0x400114c9\r
-.set CYDEV_UCFG_B1_P2_U1_CFG10, 0x400114ca\r
-.set CYDEV_UCFG_B1_P2_U1_CFG11, 0x400114cb\r
-.set CYDEV_UCFG_B1_P2_U1_CFG12, 0x400114cc\r
-.set CYDEV_UCFG_B1_P2_U1_CFG13, 0x400114cd\r
-.set CYDEV_UCFG_B1_P2_U1_CFG14, 0x400114ce\r
-.set CYDEV_UCFG_B1_P2_U1_CFG15, 0x400114cf\r
-.set CYDEV_UCFG_B1_P2_U1_CFG16, 0x400114d0\r
-.set CYDEV_UCFG_B1_P2_U1_CFG17, 0x400114d1\r
-.set CYDEV_UCFG_B1_P2_U1_CFG18, 0x400114d2\r
-.set CYDEV_UCFG_B1_P2_U1_CFG19, 0x400114d3\r
-.set CYDEV_UCFG_B1_P2_U1_CFG20, 0x400114d4\r
-.set CYDEV_UCFG_B1_P2_U1_CFG21, 0x400114d5\r
-.set CYDEV_UCFG_B1_P2_U1_CFG22, 0x400114d6\r
-.set CYDEV_UCFG_B1_P2_U1_CFG23, 0x400114d7\r
-.set CYDEV_UCFG_B1_P2_U1_CFG24, 0x400114d8\r
-.set CYDEV_UCFG_B1_P2_U1_CFG25, 0x400114d9\r
-.set CYDEV_UCFG_B1_P2_U1_CFG26, 0x400114da\r
-.set CYDEV_UCFG_B1_P2_U1_CFG27, 0x400114db\r
-.set CYDEV_UCFG_B1_P2_U1_CFG28, 0x400114dc\r
-.set CYDEV_UCFG_B1_P2_U1_CFG29, 0x400114dd\r
-.set CYDEV_UCFG_B1_P2_U1_CFG30, 0x400114de\r
-.set CYDEV_UCFG_B1_P2_U1_CFG31, 0x400114df\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG0, 0x400114e0\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG1, 0x400114e2\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG2, 0x400114e4\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG3, 0x400114e6\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG4, 0x400114e8\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG5, 0x400114ea\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG6, 0x400114ec\r
-.set CYDEV_UCFG_B1_P2_U1_DCFG7, 0x400114ee\r
-.set CYDEV_UCFG_B1_P2_ROUTE_BASE, 0x40011500\r
-.set CYDEV_UCFG_B1_P2_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P3_BASE, 0x40011600\r
-.set CYDEV_UCFG_B1_P3_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P3_U0_BASE, 0x40011600\r
-.set CYDEV_UCFG_B1_P3_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT0, 0x40011600\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT1, 0x40011604\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT2, 0x40011608\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT3, 0x4001160c\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT4, 0x40011610\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT5, 0x40011614\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT6, 0x40011618\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT7, 0x4001161c\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT8, 0x40011620\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT9, 0x40011624\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT10, 0x40011628\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_IT11, 0x4001162c\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_ORT0, 0x40011630\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_ORT1, 0x40011632\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_ORT2, 0x40011634\r
-.set CYDEV_UCFG_B1_P3_U0_PLD_ORT3, 0x40011636\r
-.set CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST, 0x40011638\r
-.set CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB, 0x4001163a\r
-.set CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET, 0x4001163c\r
-.set CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS, 0x4001163e\r
-.set CYDEV_UCFG_B1_P3_U0_CFG0, 0x40011640\r
-.set CYDEV_UCFG_B1_P3_U0_CFG1, 0x40011641\r
-.set CYDEV_UCFG_B1_P3_U0_CFG2, 0x40011642\r
-.set CYDEV_UCFG_B1_P3_U0_CFG3, 0x40011643\r
-.set CYDEV_UCFG_B1_P3_U0_CFG4, 0x40011644\r
-.set CYDEV_UCFG_B1_P3_U0_CFG5, 0x40011645\r
-.set CYDEV_UCFG_B1_P3_U0_CFG6, 0x40011646\r
-.set CYDEV_UCFG_B1_P3_U0_CFG7, 0x40011647\r
-.set CYDEV_UCFG_B1_P3_U0_CFG8, 0x40011648\r
-.set CYDEV_UCFG_B1_P3_U0_CFG9, 0x40011649\r
-.set CYDEV_UCFG_B1_P3_U0_CFG10, 0x4001164a\r
-.set CYDEV_UCFG_B1_P3_U0_CFG11, 0x4001164b\r
-.set CYDEV_UCFG_B1_P3_U0_CFG12, 0x4001164c\r
-.set CYDEV_UCFG_B1_P3_U0_CFG13, 0x4001164d\r
-.set CYDEV_UCFG_B1_P3_U0_CFG14, 0x4001164e\r
-.set CYDEV_UCFG_B1_P3_U0_CFG15, 0x4001164f\r
-.set CYDEV_UCFG_B1_P3_U0_CFG16, 0x40011650\r
-.set CYDEV_UCFG_B1_P3_U0_CFG17, 0x40011651\r
-.set CYDEV_UCFG_B1_P3_U0_CFG18, 0x40011652\r
-.set CYDEV_UCFG_B1_P3_U0_CFG19, 0x40011653\r
-.set CYDEV_UCFG_B1_P3_U0_CFG20, 0x40011654\r
-.set CYDEV_UCFG_B1_P3_U0_CFG21, 0x40011655\r
-.set CYDEV_UCFG_B1_P3_U0_CFG22, 0x40011656\r
-.set CYDEV_UCFG_B1_P3_U0_CFG23, 0x40011657\r
-.set CYDEV_UCFG_B1_P3_U0_CFG24, 0x40011658\r
-.set CYDEV_UCFG_B1_P3_U0_CFG25, 0x40011659\r
-.set CYDEV_UCFG_B1_P3_U0_CFG26, 0x4001165a\r
-.set CYDEV_UCFG_B1_P3_U0_CFG27, 0x4001165b\r
-.set CYDEV_UCFG_B1_P3_U0_CFG28, 0x4001165c\r
-.set CYDEV_UCFG_B1_P3_U0_CFG29, 0x4001165d\r
-.set CYDEV_UCFG_B1_P3_U0_CFG30, 0x4001165e\r
-.set CYDEV_UCFG_B1_P3_U0_CFG31, 0x4001165f\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG0, 0x40011660\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG1, 0x40011662\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG2, 0x40011664\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG3, 0x40011666\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG4, 0x40011668\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG5, 0x4001166a\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG6, 0x4001166c\r
-.set CYDEV_UCFG_B1_P3_U0_DCFG7, 0x4001166e\r
-.set CYDEV_UCFG_B1_P3_U1_BASE, 0x40011680\r
-.set CYDEV_UCFG_B1_P3_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT0, 0x40011680\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT1, 0x40011684\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT2, 0x40011688\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT3, 0x4001168c\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT4, 0x40011690\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT5, 0x40011694\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT6, 0x40011698\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT7, 0x4001169c\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT8, 0x400116a0\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT9, 0x400116a4\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT10, 0x400116a8\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_IT11, 0x400116ac\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_ORT0, 0x400116b0\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_ORT1, 0x400116b2\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_ORT2, 0x400116b4\r
-.set CYDEV_UCFG_B1_P3_U1_PLD_ORT3, 0x400116b6\r
-.set CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST, 0x400116b8\r
-.set CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB, 0x400116ba\r
-.set CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET, 0x400116bc\r
-.set CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS, 0x400116be\r
-.set CYDEV_UCFG_B1_P3_U1_CFG0, 0x400116c0\r
-.set CYDEV_UCFG_B1_P3_U1_CFG1, 0x400116c1\r
-.set CYDEV_UCFG_B1_P3_U1_CFG2, 0x400116c2\r
-.set CYDEV_UCFG_B1_P3_U1_CFG3, 0x400116c3\r
-.set CYDEV_UCFG_B1_P3_U1_CFG4, 0x400116c4\r
-.set CYDEV_UCFG_B1_P3_U1_CFG5, 0x400116c5\r
-.set CYDEV_UCFG_B1_P3_U1_CFG6, 0x400116c6\r
-.set CYDEV_UCFG_B1_P3_U1_CFG7, 0x400116c7\r
-.set CYDEV_UCFG_B1_P3_U1_CFG8, 0x400116c8\r
-.set CYDEV_UCFG_B1_P3_U1_CFG9, 0x400116c9\r
-.set CYDEV_UCFG_B1_P3_U1_CFG10, 0x400116ca\r
-.set CYDEV_UCFG_B1_P3_U1_CFG11, 0x400116cb\r
-.set CYDEV_UCFG_B1_P3_U1_CFG12, 0x400116cc\r
-.set CYDEV_UCFG_B1_P3_U1_CFG13, 0x400116cd\r
-.set CYDEV_UCFG_B1_P3_U1_CFG14, 0x400116ce\r
-.set CYDEV_UCFG_B1_P3_U1_CFG15, 0x400116cf\r
-.set CYDEV_UCFG_B1_P3_U1_CFG16, 0x400116d0\r
-.set CYDEV_UCFG_B1_P3_U1_CFG17, 0x400116d1\r
-.set CYDEV_UCFG_B1_P3_U1_CFG18, 0x400116d2\r
-.set CYDEV_UCFG_B1_P3_U1_CFG19, 0x400116d3\r
-.set CYDEV_UCFG_B1_P3_U1_CFG20, 0x400116d4\r
-.set CYDEV_UCFG_B1_P3_U1_CFG21, 0x400116d5\r
-.set CYDEV_UCFG_B1_P3_U1_CFG22, 0x400116d6\r
-.set CYDEV_UCFG_B1_P3_U1_CFG23, 0x400116d7\r
-.set CYDEV_UCFG_B1_P3_U1_CFG24, 0x400116d8\r
-.set CYDEV_UCFG_B1_P3_U1_CFG25, 0x400116d9\r
-.set CYDEV_UCFG_B1_P3_U1_CFG26, 0x400116da\r
-.set CYDEV_UCFG_B1_P3_U1_CFG27, 0x400116db\r
-.set CYDEV_UCFG_B1_P3_U1_CFG28, 0x400116dc\r
-.set CYDEV_UCFG_B1_P3_U1_CFG29, 0x400116dd\r
-.set CYDEV_UCFG_B1_P3_U1_CFG30, 0x400116de\r
-.set CYDEV_UCFG_B1_P3_U1_CFG31, 0x400116df\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG0, 0x400116e0\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG1, 0x400116e2\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG2, 0x400116e4\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG3, 0x400116e6\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG4, 0x400116e8\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG5, 0x400116ea\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG6, 0x400116ec\r
-.set CYDEV_UCFG_B1_P3_U1_DCFG7, 0x400116ee\r
-.set CYDEV_UCFG_B1_P3_ROUTE_BASE, 0x40011700\r
-.set CYDEV_UCFG_B1_P3_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P4_BASE, 0x40011800\r
-.set CYDEV_UCFG_B1_P4_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P4_U0_BASE, 0x40011800\r
-.set CYDEV_UCFG_B1_P4_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT0, 0x40011800\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT1, 0x40011804\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT2, 0x40011808\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT3, 0x4001180c\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT4, 0x40011810\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT5, 0x40011814\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT6, 0x40011818\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT7, 0x4001181c\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT8, 0x40011820\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT9, 0x40011824\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT10, 0x40011828\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_IT11, 0x4001182c\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_ORT0, 0x40011830\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_ORT1, 0x40011832\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_ORT2, 0x40011834\r
-.set CYDEV_UCFG_B1_P4_U0_PLD_ORT3, 0x40011836\r
-.set CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST, 0x40011838\r
-.set CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB, 0x4001183a\r
-.set CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET, 0x4001183c\r
-.set CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS, 0x4001183e\r
-.set CYDEV_UCFG_B1_P4_U0_CFG0, 0x40011840\r
-.set CYDEV_UCFG_B1_P4_U0_CFG1, 0x40011841\r
-.set CYDEV_UCFG_B1_P4_U0_CFG2, 0x40011842\r
-.set CYDEV_UCFG_B1_P4_U0_CFG3, 0x40011843\r
-.set CYDEV_UCFG_B1_P4_U0_CFG4, 0x40011844\r
-.set CYDEV_UCFG_B1_P4_U0_CFG5, 0x40011845\r
-.set CYDEV_UCFG_B1_P4_U0_CFG6, 0x40011846\r
-.set CYDEV_UCFG_B1_P4_U0_CFG7, 0x40011847\r
-.set CYDEV_UCFG_B1_P4_U0_CFG8, 0x40011848\r
-.set CYDEV_UCFG_B1_P4_U0_CFG9, 0x40011849\r
-.set CYDEV_UCFG_B1_P4_U0_CFG10, 0x4001184a\r
-.set CYDEV_UCFG_B1_P4_U0_CFG11, 0x4001184b\r
-.set CYDEV_UCFG_B1_P4_U0_CFG12, 0x4001184c\r
-.set CYDEV_UCFG_B1_P4_U0_CFG13, 0x4001184d\r
-.set CYDEV_UCFG_B1_P4_U0_CFG14, 0x4001184e\r
-.set CYDEV_UCFG_B1_P4_U0_CFG15, 0x4001184f\r
-.set CYDEV_UCFG_B1_P4_U0_CFG16, 0x40011850\r
-.set CYDEV_UCFG_B1_P4_U0_CFG17, 0x40011851\r
-.set CYDEV_UCFG_B1_P4_U0_CFG18, 0x40011852\r
-.set CYDEV_UCFG_B1_P4_U0_CFG19, 0x40011853\r
-.set CYDEV_UCFG_B1_P4_U0_CFG20, 0x40011854\r
-.set CYDEV_UCFG_B1_P4_U0_CFG21, 0x40011855\r
-.set CYDEV_UCFG_B1_P4_U0_CFG22, 0x40011856\r
-.set CYDEV_UCFG_B1_P4_U0_CFG23, 0x40011857\r
-.set CYDEV_UCFG_B1_P4_U0_CFG24, 0x40011858\r
-.set CYDEV_UCFG_B1_P4_U0_CFG25, 0x40011859\r
-.set CYDEV_UCFG_B1_P4_U0_CFG26, 0x4001185a\r
-.set CYDEV_UCFG_B1_P4_U0_CFG27, 0x4001185b\r
-.set CYDEV_UCFG_B1_P4_U0_CFG28, 0x4001185c\r
-.set CYDEV_UCFG_B1_P4_U0_CFG29, 0x4001185d\r
-.set CYDEV_UCFG_B1_P4_U0_CFG30, 0x4001185e\r
-.set CYDEV_UCFG_B1_P4_U0_CFG31, 0x4001185f\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG0, 0x40011860\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG1, 0x40011862\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG2, 0x40011864\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG3, 0x40011866\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG4, 0x40011868\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG5, 0x4001186a\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG6, 0x4001186c\r
-.set CYDEV_UCFG_B1_P4_U0_DCFG7, 0x4001186e\r
-.set CYDEV_UCFG_B1_P4_U1_BASE, 0x40011880\r
-.set CYDEV_UCFG_B1_P4_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT0, 0x40011880\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT1, 0x40011884\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT2, 0x40011888\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT3, 0x4001188c\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT4, 0x40011890\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT5, 0x40011894\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT6, 0x40011898\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT7, 0x4001189c\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT8, 0x400118a0\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT9, 0x400118a4\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT10, 0x400118a8\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_IT11, 0x400118ac\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_ORT0, 0x400118b0\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_ORT1, 0x400118b2\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_ORT2, 0x400118b4\r
-.set CYDEV_UCFG_B1_P4_U1_PLD_ORT3, 0x400118b6\r
-.set CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST, 0x400118b8\r
-.set CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB, 0x400118ba\r
-.set CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET, 0x400118bc\r
-.set CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS, 0x400118be\r
-.set CYDEV_UCFG_B1_P4_U1_CFG0, 0x400118c0\r
-.set CYDEV_UCFG_B1_P4_U1_CFG1, 0x400118c1\r
-.set CYDEV_UCFG_B1_P4_U1_CFG2, 0x400118c2\r
-.set CYDEV_UCFG_B1_P4_U1_CFG3, 0x400118c3\r
-.set CYDEV_UCFG_B1_P4_U1_CFG4, 0x400118c4\r
-.set CYDEV_UCFG_B1_P4_U1_CFG5, 0x400118c5\r
-.set CYDEV_UCFG_B1_P4_U1_CFG6, 0x400118c6\r
-.set CYDEV_UCFG_B1_P4_U1_CFG7, 0x400118c7\r
-.set CYDEV_UCFG_B1_P4_U1_CFG8, 0x400118c8\r
-.set CYDEV_UCFG_B1_P4_U1_CFG9, 0x400118c9\r
-.set CYDEV_UCFG_B1_P4_U1_CFG10, 0x400118ca\r
-.set CYDEV_UCFG_B1_P4_U1_CFG11, 0x400118cb\r
-.set CYDEV_UCFG_B1_P4_U1_CFG12, 0x400118cc\r
-.set CYDEV_UCFG_B1_P4_U1_CFG13, 0x400118cd\r
-.set CYDEV_UCFG_B1_P4_U1_CFG14, 0x400118ce\r
-.set CYDEV_UCFG_B1_P4_U1_CFG15, 0x400118cf\r
-.set CYDEV_UCFG_B1_P4_U1_CFG16, 0x400118d0\r
-.set CYDEV_UCFG_B1_P4_U1_CFG17, 0x400118d1\r
-.set CYDEV_UCFG_B1_P4_U1_CFG18, 0x400118d2\r
-.set CYDEV_UCFG_B1_P4_U1_CFG19, 0x400118d3\r
-.set CYDEV_UCFG_B1_P4_U1_CFG20, 0x400118d4\r
-.set CYDEV_UCFG_B1_P4_U1_CFG21, 0x400118d5\r
-.set CYDEV_UCFG_B1_P4_U1_CFG22, 0x400118d6\r
-.set CYDEV_UCFG_B1_P4_U1_CFG23, 0x400118d7\r
-.set CYDEV_UCFG_B1_P4_U1_CFG24, 0x400118d8\r
-.set CYDEV_UCFG_B1_P4_U1_CFG25, 0x400118d9\r
-.set CYDEV_UCFG_B1_P4_U1_CFG26, 0x400118da\r
-.set CYDEV_UCFG_B1_P4_U1_CFG27, 0x400118db\r
-.set CYDEV_UCFG_B1_P4_U1_CFG28, 0x400118dc\r
-.set CYDEV_UCFG_B1_P4_U1_CFG29, 0x400118dd\r
-.set CYDEV_UCFG_B1_P4_U1_CFG30, 0x400118de\r
-.set CYDEV_UCFG_B1_P4_U1_CFG31, 0x400118df\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG0, 0x400118e0\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG1, 0x400118e2\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG2, 0x400118e4\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG3, 0x400118e6\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG4, 0x400118e8\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG5, 0x400118ea\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG6, 0x400118ec\r
-.set CYDEV_UCFG_B1_P4_U1_DCFG7, 0x400118ee\r
-.set CYDEV_UCFG_B1_P4_ROUTE_BASE, 0x40011900\r
-.set CYDEV_UCFG_B1_P4_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P5_BASE, 0x40011a00\r
-.set CYDEV_UCFG_B1_P5_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P5_U0_BASE, 0x40011a00\r
-.set CYDEV_UCFG_B1_P5_U0_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT0, 0x40011a00\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT1, 0x40011a04\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT2, 0x40011a08\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT3, 0x40011a0c\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT4, 0x40011a10\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT5, 0x40011a14\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT6, 0x40011a18\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT7, 0x40011a1c\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT8, 0x40011a20\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT9, 0x40011a24\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT10, 0x40011a28\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_IT11, 0x40011a2c\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_ORT0, 0x40011a30\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_ORT1, 0x40011a32\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_ORT2, 0x40011a34\r
-.set CYDEV_UCFG_B1_P5_U0_PLD_ORT3, 0x40011a36\r
-.set CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST, 0x40011a38\r
-.set CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB, 0x40011a3a\r
-.set CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET, 0x40011a3c\r
-.set CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS, 0x40011a3e\r
-.set CYDEV_UCFG_B1_P5_U0_CFG0, 0x40011a40\r
-.set CYDEV_UCFG_B1_P5_U0_CFG1, 0x40011a41\r
-.set CYDEV_UCFG_B1_P5_U0_CFG2, 0x40011a42\r
-.set CYDEV_UCFG_B1_P5_U0_CFG3, 0x40011a43\r
-.set CYDEV_UCFG_B1_P5_U0_CFG4, 0x40011a44\r
-.set CYDEV_UCFG_B1_P5_U0_CFG5, 0x40011a45\r
-.set CYDEV_UCFG_B1_P5_U0_CFG6, 0x40011a46\r
-.set CYDEV_UCFG_B1_P5_U0_CFG7, 0x40011a47\r
-.set CYDEV_UCFG_B1_P5_U0_CFG8, 0x40011a48\r
-.set CYDEV_UCFG_B1_P5_U0_CFG9, 0x40011a49\r
-.set CYDEV_UCFG_B1_P5_U0_CFG10, 0x40011a4a\r
-.set CYDEV_UCFG_B1_P5_U0_CFG11, 0x40011a4b\r
-.set CYDEV_UCFG_B1_P5_U0_CFG12, 0x40011a4c\r
-.set CYDEV_UCFG_B1_P5_U0_CFG13, 0x40011a4d\r
-.set CYDEV_UCFG_B1_P5_U0_CFG14, 0x40011a4e\r
-.set CYDEV_UCFG_B1_P5_U0_CFG15, 0x40011a4f\r
-.set CYDEV_UCFG_B1_P5_U0_CFG16, 0x40011a50\r
-.set CYDEV_UCFG_B1_P5_U0_CFG17, 0x40011a51\r
-.set CYDEV_UCFG_B1_P5_U0_CFG18, 0x40011a52\r
-.set CYDEV_UCFG_B1_P5_U0_CFG19, 0x40011a53\r
-.set CYDEV_UCFG_B1_P5_U0_CFG20, 0x40011a54\r
-.set CYDEV_UCFG_B1_P5_U0_CFG21, 0x40011a55\r
-.set CYDEV_UCFG_B1_P5_U0_CFG22, 0x40011a56\r
-.set CYDEV_UCFG_B1_P5_U0_CFG23, 0x40011a57\r
-.set CYDEV_UCFG_B1_P5_U0_CFG24, 0x40011a58\r
-.set CYDEV_UCFG_B1_P5_U0_CFG25, 0x40011a59\r
-.set CYDEV_UCFG_B1_P5_U0_CFG26, 0x40011a5a\r
-.set CYDEV_UCFG_B1_P5_U0_CFG27, 0x40011a5b\r
-.set CYDEV_UCFG_B1_P5_U0_CFG28, 0x40011a5c\r
-.set CYDEV_UCFG_B1_P5_U0_CFG29, 0x40011a5d\r
-.set CYDEV_UCFG_B1_P5_U0_CFG30, 0x40011a5e\r
-.set CYDEV_UCFG_B1_P5_U0_CFG31, 0x40011a5f\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG0, 0x40011a60\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG1, 0x40011a62\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG2, 0x40011a64\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG3, 0x40011a66\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG4, 0x40011a68\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG5, 0x40011a6a\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG6, 0x40011a6c\r
-.set CYDEV_UCFG_B1_P5_U0_DCFG7, 0x40011a6e\r
-.set CYDEV_UCFG_B1_P5_U1_BASE, 0x40011a80\r
-.set CYDEV_UCFG_B1_P5_U1_SIZE, 0x00000070\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT0, 0x40011a80\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT1, 0x40011a84\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT2, 0x40011a88\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT3, 0x40011a8c\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT4, 0x40011a90\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT5, 0x40011a94\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT6, 0x40011a98\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT7, 0x40011a9c\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT8, 0x40011aa0\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT9, 0x40011aa4\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT10, 0x40011aa8\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_IT11, 0x40011aac\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_ORT0, 0x40011ab0\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_ORT1, 0x40011ab2\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_ORT2, 0x40011ab4\r
-.set CYDEV_UCFG_B1_P5_U1_PLD_ORT3, 0x40011ab6\r
-.set CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST, 0x40011ab8\r
-.set CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB, 0x40011aba\r
-.set CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET, 0x40011abc\r
-.set CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS, 0x40011abe\r
-.set CYDEV_UCFG_B1_P5_U1_CFG0, 0x40011ac0\r
-.set CYDEV_UCFG_B1_P5_U1_CFG1, 0x40011ac1\r
-.set CYDEV_UCFG_B1_P5_U1_CFG2, 0x40011ac2\r
-.set CYDEV_UCFG_B1_P5_U1_CFG3, 0x40011ac3\r
-.set CYDEV_UCFG_B1_P5_U1_CFG4, 0x40011ac4\r
-.set CYDEV_UCFG_B1_P5_U1_CFG5, 0x40011ac5\r
-.set CYDEV_UCFG_B1_P5_U1_CFG6, 0x40011ac6\r
-.set CYDEV_UCFG_B1_P5_U1_CFG7, 0x40011ac7\r
-.set CYDEV_UCFG_B1_P5_U1_CFG8, 0x40011ac8\r
-.set CYDEV_UCFG_B1_P5_U1_CFG9, 0x40011ac9\r
-.set CYDEV_UCFG_B1_P5_U1_CFG10, 0x40011aca\r
-.set CYDEV_UCFG_B1_P5_U1_CFG11, 0x40011acb\r
-.set CYDEV_UCFG_B1_P5_U1_CFG12, 0x40011acc\r
-.set CYDEV_UCFG_B1_P5_U1_CFG13, 0x40011acd\r
-.set CYDEV_UCFG_B1_P5_U1_CFG14, 0x40011ace\r
-.set CYDEV_UCFG_B1_P5_U1_CFG15, 0x40011acf\r
-.set CYDEV_UCFG_B1_P5_U1_CFG16, 0x40011ad0\r
-.set CYDEV_UCFG_B1_P5_U1_CFG17, 0x40011ad1\r
-.set CYDEV_UCFG_B1_P5_U1_CFG18, 0x40011ad2\r
-.set CYDEV_UCFG_B1_P5_U1_CFG19, 0x40011ad3\r
-.set CYDEV_UCFG_B1_P5_U1_CFG20, 0x40011ad4\r
-.set CYDEV_UCFG_B1_P5_U1_CFG21, 0x40011ad5\r
-.set CYDEV_UCFG_B1_P5_U1_CFG22, 0x40011ad6\r
-.set CYDEV_UCFG_B1_P5_U1_CFG23, 0x40011ad7\r
-.set CYDEV_UCFG_B1_P5_U1_CFG24, 0x40011ad8\r
-.set CYDEV_UCFG_B1_P5_U1_CFG25, 0x40011ad9\r
-.set CYDEV_UCFG_B1_P5_U1_CFG26, 0x40011ada\r
-.set CYDEV_UCFG_B1_P5_U1_CFG27, 0x40011adb\r
-.set CYDEV_UCFG_B1_P5_U1_CFG28, 0x40011adc\r
-.set CYDEV_UCFG_B1_P5_U1_CFG29, 0x40011add\r
-.set CYDEV_UCFG_B1_P5_U1_CFG30, 0x40011ade\r
-.set CYDEV_UCFG_B1_P5_U1_CFG31, 0x40011adf\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG0, 0x40011ae0\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG1, 0x40011ae2\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG2, 0x40011ae4\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG3, 0x40011ae6\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG4, 0x40011ae8\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG5, 0x40011aea\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG6, 0x40011aec\r
-.set CYDEV_UCFG_B1_P5_U1_DCFG7, 0x40011aee\r
-.set CYDEV_UCFG_B1_P5_ROUTE_BASE, 0x40011b00\r
-.set CYDEV_UCFG_B1_P5_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI0_BASE, 0x40014000\r
-.set CYDEV_UCFG_DSI0_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI1_BASE, 0x40014100\r
-.set CYDEV_UCFG_DSI1_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI2_BASE, 0x40014200\r
-.set CYDEV_UCFG_DSI2_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI3_BASE, 0x40014300\r
-.set CYDEV_UCFG_DSI3_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI4_BASE, 0x40014400\r
-.set CYDEV_UCFG_DSI4_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI5_BASE, 0x40014500\r
-.set CYDEV_UCFG_DSI5_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI6_BASE, 0x40014600\r
-.set CYDEV_UCFG_DSI6_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI7_BASE, 0x40014700\r
-.set CYDEV_UCFG_DSI7_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI8_BASE, 0x40014800\r
-.set CYDEV_UCFG_DSI8_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI9_BASE, 0x40014900\r
-.set CYDEV_UCFG_DSI9_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI12_BASE, 0x40014c00\r
-.set CYDEV_UCFG_DSI12_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI13_BASE, 0x40014d00\r
-.set CYDEV_UCFG_DSI13_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_BCTL0_BASE, 0x40015000\r
-.set CYDEV_UCFG_BCTL0_SIZE, 0x00000010\r
-.set CYDEV_UCFG_BCTL0_MDCLK_EN, 0x40015000\r
-.set CYDEV_UCFG_BCTL0_MBCLK_EN, 0x40015001\r
-.set CYDEV_UCFG_BCTL0_WAIT_CFG, 0x40015002\r
-.set CYDEV_UCFG_BCTL0_BANK_CTL, 0x40015003\r
-.set CYDEV_UCFG_BCTL0_UDB_TEST_3, 0x40015007\r
-.set CYDEV_UCFG_BCTL0_DCLK_EN0, 0x40015008\r
-.set CYDEV_UCFG_BCTL0_BCLK_EN0, 0x40015009\r
-.set CYDEV_UCFG_BCTL0_DCLK_EN1, 0x4001500a\r
-.set CYDEV_UCFG_BCTL0_BCLK_EN1, 0x4001500b\r
-.set CYDEV_UCFG_BCTL0_DCLK_EN2, 0x4001500c\r
-.set CYDEV_UCFG_BCTL0_BCLK_EN2, 0x4001500d\r
-.set CYDEV_UCFG_BCTL0_DCLK_EN3, 0x4001500e\r
-.set CYDEV_UCFG_BCTL0_BCLK_EN3, 0x4001500f\r
-.set CYDEV_UCFG_BCTL1_BASE, 0x40015010\r
-.set CYDEV_UCFG_BCTL1_SIZE, 0x00000010\r
-.set CYDEV_UCFG_BCTL1_MDCLK_EN, 0x40015010\r
-.set CYDEV_UCFG_BCTL1_MBCLK_EN, 0x40015011\r
-.set CYDEV_UCFG_BCTL1_WAIT_CFG, 0x40015012\r
-.set CYDEV_UCFG_BCTL1_BANK_CTL, 0x40015013\r
-.set CYDEV_UCFG_BCTL1_UDB_TEST_3, 0x40015017\r
-.set CYDEV_UCFG_BCTL1_DCLK_EN0, 0x40015018\r
-.set CYDEV_UCFG_BCTL1_BCLK_EN0, 0x40015019\r
-.set CYDEV_UCFG_BCTL1_DCLK_EN1, 0x4001501a\r
-.set CYDEV_UCFG_BCTL1_BCLK_EN1, 0x4001501b\r
-.set CYDEV_UCFG_BCTL1_DCLK_EN2, 0x4001501c\r
-.set CYDEV_UCFG_BCTL1_BCLK_EN2, 0x4001501d\r
-.set CYDEV_UCFG_BCTL1_DCLK_EN3, 0x4001501e\r
-.set CYDEV_UCFG_BCTL1_BCLK_EN3, 0x4001501f\r
-.set CYDEV_IDMUX_BASE, 0x40015100\r
-.set CYDEV_IDMUX_SIZE, 0x00000016\r
-.set CYDEV_IDMUX_IRQ_CTL0, 0x40015100\r
-.set CYDEV_IDMUX_IRQ_CTL1, 0x40015101\r
-.set CYDEV_IDMUX_IRQ_CTL2, 0x40015102\r
-.set CYDEV_IDMUX_IRQ_CTL3, 0x40015103\r
-.set CYDEV_IDMUX_IRQ_CTL4, 0x40015104\r
-.set CYDEV_IDMUX_IRQ_CTL5, 0x40015105\r
-.set CYDEV_IDMUX_IRQ_CTL6, 0x40015106\r
-.set CYDEV_IDMUX_IRQ_CTL7, 0x40015107\r
-.set CYDEV_IDMUX_DRQ_CTL0, 0x40015110\r
-.set CYDEV_IDMUX_DRQ_CTL1, 0x40015111\r
-.set CYDEV_IDMUX_DRQ_CTL2, 0x40015112\r
-.set CYDEV_IDMUX_DRQ_CTL3, 0x40015113\r
-.set CYDEV_IDMUX_DRQ_CTL4, 0x40015114\r
-.set CYDEV_IDMUX_DRQ_CTL5, 0x40015115\r
-.set CYDEV_CACHERAM_BASE, 0x40030000\r
-.set CYDEV_CACHERAM_SIZE, 0x00000400\r
-.set CYDEV_CACHERAM_DATA_MBASE, 0x40030000\r
-.set CYDEV_CACHERAM_DATA_MSIZE, 0x00000400\r
-.set CYDEV_SFR_BASE, 0x40050100\r
-.set CYDEV_SFR_SIZE, 0x000000fb\r
-.set CYDEV_SFR_GPIO0, 0x40050180\r
-.set CYDEV_SFR_GPIRD0, 0x40050189\r
-.set CYDEV_SFR_GPIO0_SEL, 0x4005018a\r
-.set CYDEV_SFR_GPIO1, 0x40050190\r
-.set CYDEV_SFR_GPIRD1, 0x40050191\r
-.set CYDEV_SFR_GPIO2, 0x40050198\r
-.set CYDEV_SFR_GPIRD2, 0x40050199\r
-.set CYDEV_SFR_GPIO2_SEL, 0x4005019a\r
-.set CYDEV_SFR_GPIO1_SEL, 0x400501a2\r
-.set CYDEV_SFR_GPIO3, 0x400501b0\r
-.set CYDEV_SFR_GPIRD3, 0x400501b1\r
-.set CYDEV_SFR_GPIO3_SEL, 0x400501b2\r
-.set CYDEV_SFR_GPIO4, 0x400501c0\r
-.set CYDEV_SFR_GPIRD4, 0x400501c1\r
-.set CYDEV_SFR_GPIO4_SEL, 0x400501c2\r
-.set CYDEV_SFR_GPIO5, 0x400501c8\r
-.set CYDEV_SFR_GPIRD5, 0x400501c9\r
-.set CYDEV_SFR_GPIO5_SEL, 0x400501ca\r
-.set CYDEV_SFR_GPIO6, 0x400501d8\r
-.set CYDEV_SFR_GPIRD6, 0x400501d9\r
-.set CYDEV_SFR_GPIO6_SEL, 0x400501da\r
-.set CYDEV_SFR_GPIO12, 0x400501e8\r
-.set CYDEV_SFR_GPIRD12, 0x400501e9\r
-.set CYDEV_SFR_GPIO12_SEL, 0x400501f2\r
-.set CYDEV_SFR_GPIO15, 0x400501f8\r
-.set CYDEV_SFR_GPIRD15, 0x400501f9\r
-.set CYDEV_SFR_GPIO15_SEL, 0x400501fa\r
-.set CYDEV_P3BA_BASE, 0x40050300\r
-.set CYDEV_P3BA_SIZE, 0x0000002b\r
-.set CYDEV_P3BA_Y_START, 0x40050300\r
-.set CYDEV_P3BA_YROLL, 0x40050301\r
-.set CYDEV_P3BA_YCFG, 0x40050302\r
-.set CYDEV_P3BA_X_START1, 0x40050303\r
-.set CYDEV_P3BA_X_START2, 0x40050304\r
-.set CYDEV_P3BA_XROLL1, 0x40050305\r
-.set CYDEV_P3BA_XROLL2, 0x40050306\r
-.set CYDEV_P3BA_XINC, 0x40050307\r
-.set CYDEV_P3BA_XCFG, 0x40050308\r
-.set CYDEV_P3BA_OFFSETADDR1, 0x40050309\r
-.set CYDEV_P3BA_OFFSETADDR2, 0x4005030a\r
-.set CYDEV_P3BA_OFFSETADDR3, 0x4005030b\r
-.set CYDEV_P3BA_ABSADDR1, 0x4005030c\r
-.set CYDEV_P3BA_ABSADDR2, 0x4005030d\r
-.set CYDEV_P3BA_ABSADDR3, 0x4005030e\r
-.set CYDEV_P3BA_ABSADDR4, 0x4005030f\r
-.set CYDEV_P3BA_DATCFG1, 0x40050310\r
-.set CYDEV_P3BA_DATCFG2, 0x40050311\r
-.set CYDEV_P3BA_CMP_RSLT1, 0x40050314\r
-.set CYDEV_P3BA_CMP_RSLT2, 0x40050315\r
-.set CYDEV_P3BA_CMP_RSLT3, 0x40050316\r
-.set CYDEV_P3BA_CMP_RSLT4, 0x40050317\r
-.set CYDEV_P3BA_DATA_REG1, 0x40050318\r
-.set CYDEV_P3BA_DATA_REG2, 0x40050319\r
-.set CYDEV_P3BA_DATA_REG3, 0x4005031a\r
-.set CYDEV_P3BA_DATA_REG4, 0x4005031b\r
-.set CYDEV_P3BA_EXP_DATA1, 0x4005031c\r
-.set CYDEV_P3BA_EXP_DATA2, 0x4005031d\r
-.set CYDEV_P3BA_EXP_DATA3, 0x4005031e\r
-.set CYDEV_P3BA_EXP_DATA4, 0x4005031f\r
-.set CYDEV_P3BA_MSTR_HRDATA1, 0x40050320\r
-.set CYDEV_P3BA_MSTR_HRDATA2, 0x40050321\r
-.set CYDEV_P3BA_MSTR_HRDATA3, 0x40050322\r
-.set CYDEV_P3BA_MSTR_HRDATA4, 0x40050323\r
-.set CYDEV_P3BA_BIST_EN, 0x40050324\r
-.set CYDEV_P3BA_PHUB_MASTER_SSR, 0x40050325\r
-.set CYDEV_P3BA_SEQCFG1, 0x40050326\r
-.set CYDEV_P3BA_SEQCFG2, 0x40050327\r
-.set CYDEV_P3BA_Y_CURR, 0x40050328\r
-.set CYDEV_P3BA_X_CURR1, 0x40050329\r
-.set CYDEV_P3BA_X_CURR2, 0x4005032a\r
-.set CYDEV_PANTHER_BASE, 0x40080000\r
-.set CYDEV_PANTHER_SIZE, 0x00000020\r
-.set CYDEV_PANTHER_STCALIB_CFG, 0x40080000\r
-.set CYDEV_PANTHER_WAITPIPE, 0x40080004\r
-.set CYDEV_PANTHER_TRACE_CFG, 0x40080008\r
-.set CYDEV_PANTHER_DBG_CFG, 0x4008000c\r
-.set CYDEV_PANTHER_CM3_LCKRST_STAT, 0x40080018\r
-.set CYDEV_PANTHER_DEVICE_ID, 0x4008001c\r
-.set CYDEV_FLSECC_BASE, 0x48000000\r
-.set CYDEV_FLSECC_SIZE, 0x00008000\r
-.set CYDEV_FLSECC_DATA_MBASE, 0x48000000\r
-.set CYDEV_FLSECC_DATA_MSIZE, 0x00008000\r
-.set CYDEV_FLSHID_BASE, 0x49000000\r
-.set CYDEV_FLSHID_SIZE, 0x00000200\r
-.set CYDEV_FLSHID_RSVD_MBASE, 0x49000000\r
-.set CYDEV_FLSHID_RSVD_MSIZE, 0x00000080\r
-.set CYDEV_FLSHID_CUST_MDATA_MBASE, 0x49000080\r
-.set CYDEV_FLSHID_CUST_MDATA_MSIZE, 0x00000080\r
-.set CYDEV_FLSHID_CUST_TABLES_BASE, 0x49000100\r
-.set CYDEV_FLSHID_CUST_TABLES_SIZE, 0x00000040\r
-.set CYDEV_FLSHID_CUST_TABLES_Y_LOC, 0x49000100\r
-.set CYDEV_FLSHID_CUST_TABLES_X_LOC, 0x49000101\r
-.set CYDEV_FLSHID_CUST_TABLES_WAFER_NUM, 0x49000102\r
-.set CYDEV_FLSHID_CUST_TABLES_LOT_LSB, 0x49000103\r
-.set CYDEV_FLSHID_CUST_TABLES_LOT_MSB, 0x49000104\r
-.set CYDEV_FLSHID_CUST_TABLES_WRK_WK, 0x49000105\r
-.set CYDEV_FLSHID_CUST_TABLES_FAB_YR, 0x49000106\r
-.set CYDEV_FLSHID_CUST_TABLES_MINOR, 0x49000107\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ, 0x49000108\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ, 0x49000109\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ, 0x4900010a\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ, 0x4900010b\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ, 0x4900010c\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ, 0x4900010d\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ, 0x4900010e\r
-.set CYDEV_FLSHID_CUST_TABLES_IMO_USB, 0x4900010f\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS, 0x49000110\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS, 0x49000111\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS, 0x49000112\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS, 0x49000113\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS, 0x49000114\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS, 0x49000115\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS, 0x49000116\r
-.set CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS, 0x49000117\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M1, 0x49000118\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M2, 0x49000119\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M3, 0x4900011a\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M4, 0x4900011b\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M5, 0x4900011c\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M6, 0x4900011d\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M7, 0x4900011e\r
-.set CYDEV_FLSHID_CUST_TABLES_DEC_M8, 0x4900011f\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M1, 0x49000120\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M2, 0x49000121\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M3, 0x49000122\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M4, 0x49000123\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M5, 0x49000124\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M6, 0x49000125\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M7, 0x49000126\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC0_M8, 0x49000127\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M1, 0x49000128\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M2, 0x49000129\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M3, 0x4900012a\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M4, 0x4900012b\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M5, 0x4900012c\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M6, 0x4900012d\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M7, 0x4900012e\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC2_M8, 0x4900012f\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M1, 0x49000130\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M2, 0x49000131\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M3, 0x49000132\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M4, 0x49000133\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M5, 0x49000134\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M6, 0x49000135\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M7, 0x49000136\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC1_M8, 0x49000137\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M1, 0x49000138\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M2, 0x49000139\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M3, 0x4900013a\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M4, 0x4900013b\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M5, 0x4900013c\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M6, 0x4900013d\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M7, 0x4900013e\r
-.set CYDEV_FLSHID_CUST_TABLES_DAC3_M8, 0x4900013f\r
-.set CYDEV_FLSHID_MFG_CFG_BASE, 0x49000180\r
-.set CYDEV_FLSHID_MFG_CFG_SIZE, 0x00000080\r
-.set CYDEV_FLSHID_MFG_CFG_IMO_TR1, 0x49000188\r
-.set CYDEV_FLSHID_MFG_CFG_CMP0_TR0, 0x490001ac\r
-.set CYDEV_FLSHID_MFG_CFG_CMP1_TR0, 0x490001ae\r
-.set CYDEV_FLSHID_MFG_CFG_CMP2_TR0, 0x490001b0\r
-.set CYDEV_FLSHID_MFG_CFG_CMP3_TR0, 0x490001b2\r
-.set CYDEV_FLSHID_MFG_CFG_CMP0_TR1, 0x490001b4\r
-.set CYDEV_FLSHID_MFG_CFG_CMP1_TR1, 0x490001b6\r
-.set CYDEV_FLSHID_MFG_CFG_CMP2_TR1, 0x490001b8\r
-.set CYDEV_FLSHID_MFG_CFG_CMP3_TR1, 0x490001ba\r
-.set CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM, 0x490001ce\r
-.set CYDEV_EXTMEM_BASE, 0x60000000\r
-.set CYDEV_EXTMEM_SIZE, 0x00800000\r
-.set CYDEV_EXTMEM_DATA_MBASE, 0x60000000\r
-.set CYDEV_EXTMEM_DATA_MSIZE, 0x00800000\r
-.set CYDEV_ITM_BASE, 0xe0000000\r
-.set CYDEV_ITM_SIZE, 0x00001000\r
-.set CYDEV_ITM_TRACE_EN, 0xe0000e00\r
-.set CYDEV_ITM_TRACE_PRIVILEGE, 0xe0000e40\r
-.set CYDEV_ITM_TRACE_CTRL, 0xe0000e80\r
-.set CYDEV_ITM_LOCK_ACCESS, 0xe0000fb0\r
-.set CYDEV_ITM_LOCK_STATUS, 0xe0000fb4\r
-.set CYDEV_ITM_PID4, 0xe0000fd0\r
-.set CYDEV_ITM_PID5, 0xe0000fd4\r
-.set CYDEV_ITM_PID6, 0xe0000fd8\r
-.set CYDEV_ITM_PID7, 0xe0000fdc\r
-.set CYDEV_ITM_PID0, 0xe0000fe0\r
-.set CYDEV_ITM_PID1, 0xe0000fe4\r
-.set CYDEV_ITM_PID2, 0xe0000fe8\r
-.set CYDEV_ITM_PID3, 0xe0000fec\r
-.set CYDEV_ITM_CID0, 0xe0000ff0\r
-.set CYDEV_ITM_CID1, 0xe0000ff4\r
-.set CYDEV_ITM_CID2, 0xe0000ff8\r
-.set CYDEV_ITM_CID3, 0xe0000ffc\r
-.set CYDEV_DWT_BASE, 0xe0001000\r
-.set CYDEV_DWT_SIZE, 0x0000005c\r
-.set CYDEV_DWT_CTRL, 0xe0001000\r
-.set CYDEV_DWT_CYCLE_COUNT, 0xe0001004\r
-.set CYDEV_DWT_CPI_COUNT, 0xe0001008\r
-.set CYDEV_DWT_EXC_OVHD_COUNT, 0xe000100c\r
-.set CYDEV_DWT_SLEEP_COUNT, 0xe0001010\r
-.set CYDEV_DWT_LSU_COUNT, 0xe0001014\r
-.set CYDEV_DWT_FOLD_COUNT, 0xe0001018\r
-.set CYDEV_DWT_PC_SAMPLE, 0xe000101c\r
-.set CYDEV_DWT_COMP_0, 0xe0001020\r
-.set CYDEV_DWT_MASK_0, 0xe0001024\r
-.set CYDEV_DWT_FUNCTION_0, 0xe0001028\r
-.set CYDEV_DWT_COMP_1, 0xe0001030\r
-.set CYDEV_DWT_MASK_1, 0xe0001034\r
-.set CYDEV_DWT_FUNCTION_1, 0xe0001038\r
-.set CYDEV_DWT_COMP_2, 0xe0001040\r
-.set CYDEV_DWT_MASK_2, 0xe0001044\r
-.set CYDEV_DWT_FUNCTION_2, 0xe0001048\r
-.set CYDEV_DWT_COMP_3, 0xe0001050\r
-.set CYDEV_DWT_MASK_3, 0xe0001054\r
-.set CYDEV_DWT_FUNCTION_3, 0xe0001058\r
-.set CYDEV_FPB_BASE, 0xe0002000\r
-.set CYDEV_FPB_SIZE, 0x00001000\r
-.set CYDEV_FPB_CTRL, 0xe0002000\r
-.set CYDEV_FPB_REMAP, 0xe0002004\r
-.set CYDEV_FPB_FP_COMP_0, 0xe0002008\r
-.set CYDEV_FPB_FP_COMP_1, 0xe000200c\r
-.set CYDEV_FPB_FP_COMP_2, 0xe0002010\r
-.set CYDEV_FPB_FP_COMP_3, 0xe0002014\r
-.set CYDEV_FPB_FP_COMP_4, 0xe0002018\r
-.set CYDEV_FPB_FP_COMP_5, 0xe000201c\r
-.set CYDEV_FPB_FP_COMP_6, 0xe0002020\r
-.set CYDEV_FPB_FP_COMP_7, 0xe0002024\r
-.set CYDEV_FPB_PID4, 0xe0002fd0\r
-.set CYDEV_FPB_PID5, 0xe0002fd4\r
-.set CYDEV_FPB_PID6, 0xe0002fd8\r
-.set CYDEV_FPB_PID7, 0xe0002fdc\r
-.set CYDEV_FPB_PID0, 0xe0002fe0\r
-.set CYDEV_FPB_PID1, 0xe0002fe4\r
-.set CYDEV_FPB_PID2, 0xe0002fe8\r
-.set CYDEV_FPB_PID3, 0xe0002fec\r
-.set CYDEV_FPB_CID0, 0xe0002ff0\r
-.set CYDEV_FPB_CID1, 0xe0002ff4\r
-.set CYDEV_FPB_CID2, 0xe0002ff8\r
-.set CYDEV_FPB_CID3, 0xe0002ffc\r
-.set CYDEV_NVIC_BASE, 0xe000e000\r
-.set CYDEV_NVIC_SIZE, 0x00000d3c\r
-.set CYDEV_NVIC_INT_CTL_TYPE, 0xe000e004\r
-.set CYDEV_NVIC_SYSTICK_CTL, 0xe000e010\r
-.set CYDEV_NVIC_SYSTICK_RELOAD, 0xe000e014\r
-.set CYDEV_NVIC_SYSTICK_CURRENT, 0xe000e018\r
-.set CYDEV_NVIC_SYSTICK_CAL, 0xe000e01c\r
-.set CYDEV_NVIC_SETENA0, 0xe000e100\r
-.set CYDEV_NVIC_CLRENA0, 0xe000e180\r
-.set CYDEV_NVIC_SETPEND0, 0xe000e200\r
-.set CYDEV_NVIC_CLRPEND0, 0xe000e280\r
-.set CYDEV_NVIC_ACTIVE0, 0xe000e300\r
-.set CYDEV_NVIC_PRI_0, 0xe000e400\r
-.set CYDEV_NVIC_PRI_1, 0xe000e401\r
-.set CYDEV_NVIC_PRI_2, 0xe000e402\r
-.set CYDEV_NVIC_PRI_3, 0xe000e403\r
-.set CYDEV_NVIC_PRI_4, 0xe000e404\r
-.set CYDEV_NVIC_PRI_5, 0xe000e405\r
-.set CYDEV_NVIC_PRI_6, 0xe000e406\r
-.set CYDEV_NVIC_PRI_7, 0xe000e407\r
-.set CYDEV_NVIC_PRI_8, 0xe000e408\r
-.set CYDEV_NVIC_PRI_9, 0xe000e409\r
-.set CYDEV_NVIC_PRI_10, 0xe000e40a\r
-.set CYDEV_NVIC_PRI_11, 0xe000e40b\r
-.set CYDEV_NVIC_PRI_12, 0xe000e40c\r
-.set CYDEV_NVIC_PRI_13, 0xe000e40d\r
-.set CYDEV_NVIC_PRI_14, 0xe000e40e\r
-.set CYDEV_NVIC_PRI_15, 0xe000e40f\r
-.set CYDEV_NVIC_PRI_16, 0xe000e410\r
-.set CYDEV_NVIC_PRI_17, 0xe000e411\r
-.set CYDEV_NVIC_PRI_18, 0xe000e412\r
-.set CYDEV_NVIC_PRI_19, 0xe000e413\r
-.set CYDEV_NVIC_PRI_20, 0xe000e414\r
-.set CYDEV_NVIC_PRI_21, 0xe000e415\r
-.set CYDEV_NVIC_PRI_22, 0xe000e416\r
-.set CYDEV_NVIC_PRI_23, 0xe000e417\r
-.set CYDEV_NVIC_PRI_24, 0xe000e418\r
-.set CYDEV_NVIC_PRI_25, 0xe000e419\r
-.set CYDEV_NVIC_PRI_26, 0xe000e41a\r
-.set CYDEV_NVIC_PRI_27, 0xe000e41b\r
-.set CYDEV_NVIC_PRI_28, 0xe000e41c\r
-.set CYDEV_NVIC_PRI_29, 0xe000e41d\r
-.set CYDEV_NVIC_PRI_30, 0xe000e41e\r
-.set CYDEV_NVIC_PRI_31, 0xe000e41f\r
-.set CYDEV_NVIC_CPUID_BASE, 0xe000ed00\r
-.set CYDEV_NVIC_INTR_CTRL_STATE, 0xe000ed04\r
-.set CYDEV_NVIC_VECT_OFFSET, 0xe000ed08\r
-.set CYDEV_NVIC_APPLN_INTR, 0xe000ed0c\r
-.set CYDEV_NVIC_SYSTEM_CONTROL, 0xe000ed10\r
-.set CYDEV_NVIC_CFG_CONTROL, 0xe000ed14\r
-.set CYDEV_NVIC_SYS_PRIO_HANDLER_4_7, 0xe000ed18\r
-.set CYDEV_NVIC_SYS_PRIO_HANDLER_8_11, 0xe000ed1c\r
-.set CYDEV_NVIC_SYS_PRIO_HANDLER_12_15, 0xe000ed20\r
-.set CYDEV_NVIC_SYS_HANDLER_CSR, 0xe000ed24\r
-.set CYDEV_NVIC_MEMMAN_FAULT_STATUS, 0xe000ed28\r
-.set CYDEV_NVIC_BUS_FAULT_STATUS, 0xe000ed29\r
-.set CYDEV_NVIC_USAGE_FAULT_STATUS, 0xe000ed2a\r
-.set CYDEV_NVIC_HARD_FAULT_STATUS, 0xe000ed2c\r
-.set CYDEV_NVIC_DEBUG_FAULT_STATUS, 0xe000ed30\r
-.set CYDEV_NVIC_MEMMAN_FAULT_ADD, 0xe000ed34\r
-.set CYDEV_NVIC_BUS_FAULT_ADD, 0xe000ed38\r
-.set CYDEV_CORE_DBG_BASE, 0xe000edf0\r
-.set CYDEV_CORE_DBG_SIZE, 0x00000010\r
-.set CYDEV_CORE_DBG_DBG_HLT_CS, 0xe000edf0\r
-.set CYDEV_CORE_DBG_DBG_REG_SEL, 0xe000edf4\r
-.set CYDEV_CORE_DBG_DBG_REG_DATA, 0xe000edf8\r
-.set CYDEV_CORE_DBG_EXC_MON_CTL, 0xe000edfc\r
-.set CYDEV_TPIU_BASE, 0xe0040000\r
-.set CYDEV_TPIU_SIZE, 0x00001000\r
-.set CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ, 0xe0040000\r
-.set CYDEV_TPIU_CURRENT_SYNC_PRT_SZ, 0xe0040004\r
-.set CYDEV_TPIU_ASYNC_CLK_PRESCALER, 0xe0040010\r
-.set CYDEV_TPIU_PROTOCOL, 0xe00400f0\r
-.set CYDEV_TPIU_FORM_FLUSH_STAT, 0xe0040300\r
-.set CYDEV_TPIU_FORM_FLUSH_CTRL, 0xe0040304\r
-.set CYDEV_TPIU_TRIGGER, 0xe0040ee8\r
-.set CYDEV_TPIU_ITETMDATA, 0xe0040eec\r
-.set CYDEV_TPIU_ITATBCTR2, 0xe0040ef0\r
-.set CYDEV_TPIU_ITATBCTR0, 0xe0040ef8\r
-.set CYDEV_TPIU_ITITMDATA, 0xe0040efc\r
-.set CYDEV_TPIU_ITCTRL, 0xe0040f00\r
-.set CYDEV_TPIU_DEVID, 0xe0040fc8\r
-.set CYDEV_TPIU_DEVTYPE, 0xe0040fcc\r
-.set CYDEV_TPIU_PID4, 0xe0040fd0\r
-.set CYDEV_TPIU_PID5, 0xe0040fd4\r
-.set CYDEV_TPIU_PID6, 0xe0040fd8\r
-.set CYDEV_TPIU_PID7, 0xe0040fdc\r
-.set CYDEV_TPIU_PID0, 0xe0040fe0\r
-.set CYDEV_TPIU_PID1, 0xe0040fe4\r
-.set CYDEV_TPIU_PID2, 0xe0040fe8\r
-.set CYDEV_TPIU_PID3, 0xe0040fec\r
-.set CYDEV_TPIU_CID0, 0xe0040ff0\r
-.set CYDEV_TPIU_CID1, 0xe0040ff4\r
-.set CYDEV_TPIU_CID2, 0xe0040ff8\r
-.set CYDEV_TPIU_CID3, 0xe0040ffc\r
-.set CYDEV_ETM_BASE, 0xe0041000\r
-.set CYDEV_ETM_SIZE, 0x00001000\r
-.set CYDEV_ETM_CTL, 0xe0041000\r
-.set CYDEV_ETM_CFG_CODE, 0xe0041004\r
-.set CYDEV_ETM_TRIG_EVENT, 0xe0041008\r
-.set CYDEV_ETM_STATUS, 0xe0041010\r
-.set CYDEV_ETM_SYS_CFG, 0xe0041014\r
-.set CYDEV_ETM_TRACE_ENB_EVENT, 0xe0041020\r
-.set CYDEV_ETM_TRACE_EN_CTRL1, 0xe0041024\r
-.set CYDEV_ETM_FIFOFULL_LEVEL, 0xe004102c\r
-.set CYDEV_ETM_SYNC_FREQ, 0xe00411e0\r
-.set CYDEV_ETM_ETM_ID, 0xe00411e4\r
-.set CYDEV_ETM_CFG_CODE_EXT, 0xe00411e8\r
-.set CYDEV_ETM_TR_SS_EMBICE_CTRL, 0xe00411f0\r
-.set CYDEV_ETM_CS_TRACE_ID, 0xe0041200\r
-.set CYDEV_ETM_OS_LOCK_ACCESS, 0xe0041300\r
-.set CYDEV_ETM_OS_LOCK_STATUS, 0xe0041304\r
-.set CYDEV_ETM_PDSR, 0xe0041314\r
-.set CYDEV_ETM_ITMISCIN, 0xe0041ee0\r
-.set CYDEV_ETM_ITTRIGOUT, 0xe0041ee8\r
-.set CYDEV_ETM_ITATBCTR2, 0xe0041ef0\r
-.set CYDEV_ETM_ITATBCTR0, 0xe0041ef8\r
-.set CYDEV_ETM_INT_MODE_CTRL, 0xe0041f00\r
-.set CYDEV_ETM_CLM_TAG_SET, 0xe0041fa0\r
-.set CYDEV_ETM_CLM_TAG_CLR, 0xe0041fa4\r
-.set CYDEV_ETM_LOCK_ACCESS, 0xe0041fb0\r
-.set CYDEV_ETM_LOCK_STATUS, 0xe0041fb4\r
-.set CYDEV_ETM_AUTH_STATUS, 0xe0041fb8\r
-.set CYDEV_ETM_DEV_TYPE, 0xe0041fcc\r
-.set CYDEV_ETM_PID4, 0xe0041fd0\r
-.set CYDEV_ETM_PID5, 0xe0041fd4\r
-.set CYDEV_ETM_PID6, 0xe0041fd8\r
-.set CYDEV_ETM_PID7, 0xe0041fdc\r
-.set CYDEV_ETM_PID0, 0xe0041fe0\r
-.set CYDEV_ETM_PID1, 0xe0041fe4\r
-.set CYDEV_ETM_PID2, 0xe0041fe8\r
-.set CYDEV_ETM_PID3, 0xe0041fec\r
-.set CYDEV_ETM_CID0, 0xe0041ff0\r
-.set CYDEV_ETM_CID1, 0xe0041ff4\r
-.set CYDEV_ETM_CID2, 0xe0041ff8\r
-.set CYDEV_ETM_CID3, 0xe0041ffc\r
-.set CYDEV_ROM_TABLE_BASE, 0xe00ff000\r
-.set CYDEV_ROM_TABLE_SIZE, 0x00001000\r
-.set CYDEV_ROM_TABLE_NVIC, 0xe00ff000\r
-.set CYDEV_ROM_TABLE_DWT, 0xe00ff004\r
-.set CYDEV_ROM_TABLE_FPB, 0xe00ff008\r
-.set CYDEV_ROM_TABLE_ITM, 0xe00ff00c\r
-.set CYDEV_ROM_TABLE_TPIU, 0xe00ff010\r
-.set CYDEV_ROM_TABLE_ETM, 0xe00ff014\r
-.set CYDEV_ROM_TABLE_END, 0xe00ff018\r
-.set CYDEV_ROM_TABLE_MEMTYPE, 0xe00fffcc\r
-.set CYDEV_ROM_TABLE_PID4, 0xe00fffd0\r
-.set CYDEV_ROM_TABLE_PID5, 0xe00fffd4\r
-.set CYDEV_ROM_TABLE_PID6, 0xe00fffd8\r
-.set CYDEV_ROM_TABLE_PID7, 0xe00fffdc\r
-.set CYDEV_ROM_TABLE_PID0, 0xe00fffe0\r
-.set CYDEV_ROM_TABLE_PID1, 0xe00fffe4\r
-.set CYDEV_ROM_TABLE_PID2, 0xe00fffe8\r
-.set CYDEV_ROM_TABLE_PID3, 0xe00fffec\r
-.set CYDEV_ROM_TABLE_CID0, 0xe00ffff0\r
-.set CYDEV_ROM_TABLE_CID1, 0xe00ffff4\r
-.set CYDEV_ROM_TABLE_CID2, 0xe00ffff8\r
-.set CYDEV_ROM_TABLE_CID3, 0xe00ffffc\r
-.set CYDEV_FLS_SIZE, CYDEV_FLASH_SIZE\r
-.set CYDEV_ECC_BASE, CYDEV_FLSECC_BASE\r
-.set CYDEV_FLS_SECTOR_SIZE, 0x00010000\r
-.set CYDEV_FLS_ROW_SIZE, 0x00000100\r
-.set CYDEV_ECC_SECTOR_SIZE, 0x00002000\r
-.set CYDEV_ECC_ROW_SIZE, 0x00000020\r
-.set CYDEV_EEPROM_SECTOR_SIZE, 0x00000400\r
-.set CYDEV_EEPROM_ROW_SIZE, 0x00000010\r
-.set CYDEV_PERIPH_BASE, CYDEV_CLKDIST_BASE\r
-.set CYCLK_LD_DISABLE, 0x00000004\r
-.set CYCLK_LD_SYNC_EN, 0x00000002\r
-.set CYCLK_LD_LOAD, 0x00000001\r
-.set CYCLK_PIPE, 0x00000080\r
-.set CYCLK_SSS, 0x00000040\r
-.set CYCLK_EARLY, 0x00000020\r
-.set CYCLK_DUTY, 0x00000010\r
-.set CYCLK_SYNC, 0x00000008\r
-.set CYCLK_SRC_SEL_CLK_SYNC_D, 0\r
-.set CYCLK_SRC_SEL_SYNC_DIG, 0\r
-.set CYCLK_SRC_SEL_IMO, 1\r
-.set CYCLK_SRC_SEL_XTAL_MHZ, 2\r
-.set CYCLK_SRC_SEL_XTALM, 2\r
-.set CYCLK_SRC_SEL_ILO, 3\r
-.set CYCLK_SRC_SEL_PLL, 4\r
-.set CYCLK_SRC_SEL_XTAL_KHZ, 5\r
-.set CYCLK_SRC_SEL_XTALK, 5\r
-.set CYCLK_SRC_SEL_DSI_G, 6\r
-.set CYCLK_SRC_SEL_DSI_D, 7\r
-.set CYCLK_SRC_SEL_CLK_SYNC_A, 0\r
-.set CYCLK_SRC_SEL_DSI_A, 7\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu_trm.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu_trm.inc
deleted file mode 100755 (executable)
index 3c24869..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicegnu_trm.inc
+++ /dev/null
@@ -1,5357 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cydevicegnu_trm.inc\r
-* \r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* DESCRIPTION:\r
-* This file provides all of the address values for the entire PSoC device.\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-.set CYDEV_FLASH_BASE, 0x00000000\r
-.set CYDEV_FLASH_SIZE, 0x00020000\r
-.set CYREG_FLASH_DATA_MBASE, 0x00000000\r
-.set CYREG_FLASH_DATA_MSIZE, 0x00020000\r
-.set CYDEV_SRAM_BASE, 0x1fffc000\r
-.set CYDEV_SRAM_SIZE, 0x00008000\r
-.set CYREG_SRAM_CODE64K_MBASE, 0x1fff8000\r
-.set CYREG_SRAM_CODE64K_MSIZE, 0x00004000\r
-.set CYREG_SRAM_CODE32K_MBASE, 0x1fffc000\r
-.set CYREG_SRAM_CODE32K_MSIZE, 0x00002000\r
-.set CYREG_SRAM_CODE16K_MBASE, 0x1fffe000\r
-.set CYREG_SRAM_CODE16K_MSIZE, 0x00001000\r
-.set CYREG_SRAM_CODE_MBASE, 0x1fffc000\r
-.set CYREG_SRAM_CODE_MSIZE, 0x00004000\r
-.set CYREG_SRAM_DATA_MBASE, 0x20000000\r
-.set CYREG_SRAM_DATA_MSIZE, 0x00004000\r
-.set CYREG_SRAM_DATA16K_MBASE, 0x20001000\r
-.set CYREG_SRAM_DATA16K_MSIZE, 0x00001000\r
-.set CYREG_SRAM_DATA32K_MBASE, 0x20002000\r
-.set CYREG_SRAM_DATA32K_MSIZE, 0x00002000\r
-.set CYREG_SRAM_DATA64K_MBASE, 0x20004000\r
-.set CYREG_SRAM_DATA64K_MSIZE, 0x00004000\r
-.set CYDEV_DMA_BASE, 0x20008000\r
-.set CYDEV_DMA_SIZE, 0x00008000\r
-.set CYREG_DMA_SRAM64K_MBASE, 0x20008000\r
-.set CYREG_DMA_SRAM64K_MSIZE, 0x00004000\r
-.set CYREG_DMA_SRAM32K_MBASE, 0x2000c000\r
-.set CYREG_DMA_SRAM32K_MSIZE, 0x00002000\r
-.set CYREG_DMA_SRAM16K_MBASE, 0x2000e000\r
-.set CYREG_DMA_SRAM16K_MSIZE, 0x00001000\r
-.set CYREG_DMA_SRAM_MBASE, 0x2000f000\r
-.set CYREG_DMA_SRAM_MSIZE, 0x00001000\r
-.set CYDEV_CLKDIST_BASE, 0x40004000\r
-.set CYDEV_CLKDIST_SIZE, 0x00000110\r
-.set CYREG_CLKDIST_CR, 0x40004000\r
-.set CYREG_CLKDIST_LD, 0x40004001\r
-.set CYREG_CLKDIST_WRK0, 0x40004002\r
-.set CYREG_CLKDIST_WRK1, 0x40004003\r
-.set CYREG_CLKDIST_MSTR0, 0x40004004\r
-.set CYREG_CLKDIST_MSTR1, 0x40004005\r
-.set CYREG_CLKDIST_BCFG0, 0x40004006\r
-.set CYREG_CLKDIST_BCFG1, 0x40004007\r
-.set CYREG_CLKDIST_BCFG2, 0x40004008\r
-.set CYREG_CLKDIST_UCFG, 0x40004009\r
-.set CYREG_CLKDIST_DLY0, 0x4000400a\r
-.set CYREG_CLKDIST_DLY1, 0x4000400b\r
-.set CYREG_CLKDIST_DMASK, 0x40004010\r
-.set CYREG_CLKDIST_AMASK, 0x40004014\r
-.set CYDEV_CLKDIST_DCFG0_BASE, 0x40004080\r
-.set CYDEV_CLKDIST_DCFG0_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG0_CFG0, 0x40004080\r
-.set CYREG_CLKDIST_DCFG0_CFG1, 0x40004081\r
-.set CYREG_CLKDIST_DCFG0_CFG2, 0x40004082\r
-.set CYDEV_CLKDIST_DCFG1_BASE, 0x40004084\r
-.set CYDEV_CLKDIST_DCFG1_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG1_CFG0, 0x40004084\r
-.set CYREG_CLKDIST_DCFG1_CFG1, 0x40004085\r
-.set CYREG_CLKDIST_DCFG1_CFG2, 0x40004086\r
-.set CYDEV_CLKDIST_DCFG2_BASE, 0x40004088\r
-.set CYDEV_CLKDIST_DCFG2_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG2_CFG0, 0x40004088\r
-.set CYREG_CLKDIST_DCFG2_CFG1, 0x40004089\r
-.set CYREG_CLKDIST_DCFG2_CFG2, 0x4000408a\r
-.set CYDEV_CLKDIST_DCFG3_BASE, 0x4000408c\r
-.set CYDEV_CLKDIST_DCFG3_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG3_CFG0, 0x4000408c\r
-.set CYREG_CLKDIST_DCFG3_CFG1, 0x4000408d\r
-.set CYREG_CLKDIST_DCFG3_CFG2, 0x4000408e\r
-.set CYDEV_CLKDIST_DCFG4_BASE, 0x40004090\r
-.set CYDEV_CLKDIST_DCFG4_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG4_CFG0, 0x40004090\r
-.set CYREG_CLKDIST_DCFG4_CFG1, 0x40004091\r
-.set CYREG_CLKDIST_DCFG4_CFG2, 0x40004092\r
-.set CYDEV_CLKDIST_DCFG5_BASE, 0x40004094\r
-.set CYDEV_CLKDIST_DCFG5_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG5_CFG0, 0x40004094\r
-.set CYREG_CLKDIST_DCFG5_CFG1, 0x40004095\r
-.set CYREG_CLKDIST_DCFG5_CFG2, 0x40004096\r
-.set CYDEV_CLKDIST_DCFG6_BASE, 0x40004098\r
-.set CYDEV_CLKDIST_DCFG6_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG6_CFG0, 0x40004098\r
-.set CYREG_CLKDIST_DCFG6_CFG1, 0x40004099\r
-.set CYREG_CLKDIST_DCFG6_CFG2, 0x4000409a\r
-.set CYDEV_CLKDIST_DCFG7_BASE, 0x4000409c\r
-.set CYDEV_CLKDIST_DCFG7_SIZE, 0x00000003\r
-.set CYREG_CLKDIST_DCFG7_CFG0, 0x4000409c\r
-.set CYREG_CLKDIST_DCFG7_CFG1, 0x4000409d\r
-.set CYREG_CLKDIST_DCFG7_CFG2, 0x4000409e\r
-.set CYDEV_CLKDIST_ACFG0_BASE, 0x40004100\r
-.set CYDEV_CLKDIST_ACFG0_SIZE, 0x00000004\r
-.set CYREG_CLKDIST_ACFG0_CFG0, 0x40004100\r
-.set CYREG_CLKDIST_ACFG0_CFG1, 0x40004101\r
-.set CYREG_CLKDIST_ACFG0_CFG2, 0x40004102\r
-.set CYREG_CLKDIST_ACFG0_CFG3, 0x40004103\r
-.set CYDEV_CLKDIST_ACFG1_BASE, 0x40004104\r
-.set CYDEV_CLKDIST_ACFG1_SIZE, 0x00000004\r
-.set CYREG_CLKDIST_ACFG1_CFG0, 0x40004104\r
-.set CYREG_CLKDIST_ACFG1_CFG1, 0x40004105\r
-.set CYREG_CLKDIST_ACFG1_CFG2, 0x40004106\r
-.set CYREG_CLKDIST_ACFG1_CFG3, 0x40004107\r
-.set CYDEV_CLKDIST_ACFG2_BASE, 0x40004108\r
-.set CYDEV_CLKDIST_ACFG2_SIZE, 0x00000004\r
-.set CYREG_CLKDIST_ACFG2_CFG0, 0x40004108\r
-.set CYREG_CLKDIST_ACFG2_CFG1, 0x40004109\r
-.set CYREG_CLKDIST_ACFG2_CFG2, 0x4000410a\r
-.set CYREG_CLKDIST_ACFG2_CFG3, 0x4000410b\r
-.set CYDEV_CLKDIST_ACFG3_BASE, 0x4000410c\r
-.set CYDEV_CLKDIST_ACFG3_SIZE, 0x00000004\r
-.set CYREG_CLKDIST_ACFG3_CFG0, 0x4000410c\r
-.set CYREG_CLKDIST_ACFG3_CFG1, 0x4000410d\r
-.set CYREG_CLKDIST_ACFG3_CFG2, 0x4000410e\r
-.set CYREG_CLKDIST_ACFG3_CFG3, 0x4000410f\r
-.set CYDEV_FASTCLK_BASE, 0x40004200\r
-.set CYDEV_FASTCLK_SIZE, 0x00000026\r
-.set CYDEV_FASTCLK_IMO_BASE, 0x40004200\r
-.set CYDEV_FASTCLK_IMO_SIZE, 0x00000001\r
-.set CYREG_FASTCLK_IMO_CR, 0x40004200\r
-.set CYDEV_FASTCLK_XMHZ_BASE, 0x40004210\r
-.set CYDEV_FASTCLK_XMHZ_SIZE, 0x00000004\r
-.set CYREG_FASTCLK_XMHZ_CSR, 0x40004210\r
-.set CYREG_FASTCLK_XMHZ_CFG0, 0x40004212\r
-.set CYREG_FASTCLK_XMHZ_CFG1, 0x40004213\r
-.set CYDEV_FASTCLK_PLL_BASE, 0x40004220\r
-.set CYDEV_FASTCLK_PLL_SIZE, 0x00000006\r
-.set CYREG_FASTCLK_PLL_CFG0, 0x40004220\r
-.set CYREG_FASTCLK_PLL_CFG1, 0x40004221\r
-.set CYREG_FASTCLK_PLL_P, 0x40004222\r
-.set CYREG_FASTCLK_PLL_Q, 0x40004223\r
-.set CYREG_FASTCLK_PLL_SR, 0x40004225\r
-.set CYDEV_SLOWCLK_BASE, 0x40004300\r
-.set CYDEV_SLOWCLK_SIZE, 0x0000000b\r
-.set CYDEV_SLOWCLK_ILO_BASE, 0x40004300\r
-.set CYDEV_SLOWCLK_ILO_SIZE, 0x00000002\r
-.set CYREG_SLOWCLK_ILO_CR0, 0x40004300\r
-.set CYREG_SLOWCLK_ILO_CR1, 0x40004301\r
-.set CYDEV_SLOWCLK_X32_BASE, 0x40004308\r
-.set CYDEV_SLOWCLK_X32_SIZE, 0x00000003\r
-.set CYREG_SLOWCLK_X32_CR, 0x40004308\r
-.set CYREG_SLOWCLK_X32_CFG, 0x40004309\r
-.set CYREG_SLOWCLK_X32_TST, 0x4000430a\r
-.set CYDEV_BOOST_BASE, 0x40004320\r
-.set CYDEV_BOOST_SIZE, 0x00000007\r
-.set CYREG_BOOST_CR0, 0x40004320\r
-.set CYREG_BOOST_CR1, 0x40004321\r
-.set CYREG_BOOST_CR2, 0x40004322\r
-.set CYREG_BOOST_CR3, 0x40004323\r
-.set CYREG_BOOST_SR, 0x40004324\r
-.set CYREG_BOOST_CR4, 0x40004325\r
-.set CYREG_BOOST_SR2, 0x40004326\r
-.set CYDEV_PWRSYS_BASE, 0x40004330\r
-.set CYDEV_PWRSYS_SIZE, 0x00000002\r
-.set CYREG_PWRSYS_CR0, 0x40004330\r
-.set CYREG_PWRSYS_CR1, 0x40004331\r
-.set CYDEV_PM_BASE, 0x40004380\r
-.set CYDEV_PM_SIZE, 0x00000057\r
-.set CYREG_PM_TW_CFG0, 0x40004380\r
-.set CYREG_PM_TW_CFG1, 0x40004381\r
-.set CYREG_PM_TW_CFG2, 0x40004382\r
-.set CYREG_PM_WDT_CFG, 0x40004383\r
-.set CYREG_PM_WDT_CR, 0x40004384\r
-.set CYREG_PM_INT_SR, 0x40004390\r
-.set CYREG_PM_MODE_CFG0, 0x40004391\r
-.set CYREG_PM_MODE_CFG1, 0x40004392\r
-.set CYREG_PM_MODE_CSR, 0x40004393\r
-.set CYREG_PM_USB_CR0, 0x40004394\r
-.set CYREG_PM_WAKEUP_CFG0, 0x40004398\r
-.set CYREG_PM_WAKEUP_CFG1, 0x40004399\r
-.set CYREG_PM_WAKEUP_CFG2, 0x4000439a\r
-.set CYDEV_PM_ACT_BASE, 0x400043a0\r
-.set CYDEV_PM_ACT_SIZE, 0x0000000e\r
-.set CYREG_PM_ACT_CFG0, 0x400043a0\r
-.set CYREG_PM_ACT_CFG1, 0x400043a1\r
-.set CYREG_PM_ACT_CFG2, 0x400043a2\r
-.set CYREG_PM_ACT_CFG3, 0x400043a3\r
-.set CYREG_PM_ACT_CFG4, 0x400043a4\r
-.set CYREG_PM_ACT_CFG5, 0x400043a5\r
-.set CYREG_PM_ACT_CFG6, 0x400043a6\r
-.set CYREG_PM_ACT_CFG7, 0x400043a7\r
-.set CYREG_PM_ACT_CFG8, 0x400043a8\r
-.set CYREG_PM_ACT_CFG9, 0x400043a9\r
-.set CYREG_PM_ACT_CFG10, 0x400043aa\r
-.set CYREG_PM_ACT_CFG11, 0x400043ab\r
-.set CYREG_PM_ACT_CFG12, 0x400043ac\r
-.set CYREG_PM_ACT_CFG13, 0x400043ad\r
-.set CYDEV_PM_STBY_BASE, 0x400043b0\r
-.set CYDEV_PM_STBY_SIZE, 0x0000000e\r
-.set CYREG_PM_STBY_CFG0, 0x400043b0\r
-.set CYREG_PM_STBY_CFG1, 0x400043b1\r
-.set CYREG_PM_STBY_CFG2, 0x400043b2\r
-.set CYREG_PM_STBY_CFG3, 0x400043b3\r
-.set CYREG_PM_STBY_CFG4, 0x400043b4\r
-.set CYREG_PM_STBY_CFG5, 0x400043b5\r
-.set CYREG_PM_STBY_CFG6, 0x400043b6\r
-.set CYREG_PM_STBY_CFG7, 0x400043b7\r
-.set CYREG_PM_STBY_CFG8, 0x400043b8\r
-.set CYREG_PM_STBY_CFG9, 0x400043b9\r
-.set CYREG_PM_STBY_CFG10, 0x400043ba\r
-.set CYREG_PM_STBY_CFG11, 0x400043bb\r
-.set CYREG_PM_STBY_CFG12, 0x400043bc\r
-.set CYREG_PM_STBY_CFG13, 0x400043bd\r
-.set CYDEV_PM_AVAIL_BASE, 0x400043c0\r
-.set CYDEV_PM_AVAIL_SIZE, 0x00000017\r
-.set CYREG_PM_AVAIL_CR0, 0x400043c0\r
-.set CYREG_PM_AVAIL_CR1, 0x400043c1\r
-.set CYREG_PM_AVAIL_CR2, 0x400043c2\r
-.set CYREG_PM_AVAIL_CR3, 0x400043c3\r
-.set CYREG_PM_AVAIL_CR4, 0x400043c4\r
-.set CYREG_PM_AVAIL_CR5, 0x400043c5\r
-.set CYREG_PM_AVAIL_CR6, 0x400043c6\r
-.set CYREG_PM_AVAIL_SR0, 0x400043d0\r
-.set CYREG_PM_AVAIL_SR1, 0x400043d1\r
-.set CYREG_PM_AVAIL_SR2, 0x400043d2\r
-.set CYREG_PM_AVAIL_SR3, 0x400043d3\r
-.set CYREG_PM_AVAIL_SR4, 0x400043d4\r
-.set CYREG_PM_AVAIL_SR5, 0x400043d5\r
-.set CYREG_PM_AVAIL_SR6, 0x400043d6\r
-.set CYDEV_PICU_BASE, 0x40004500\r
-.set CYDEV_PICU_SIZE, 0x000000b0\r
-.set CYDEV_PICU_INTTYPE_BASE, 0x40004500\r
-.set CYDEV_PICU_INTTYPE_SIZE, 0x00000080\r
-.set CYDEV_PICU_INTTYPE_PICU0_BASE, 0x40004500\r
-.set CYDEV_PICU_INTTYPE_PICU0_SIZE, 0x00000008\r
-.set CYREG_PICU0_INTTYPE0, 0x40004500\r
-.set CYREG_PICU0_INTTYPE1, 0x40004501\r
-.set CYREG_PICU0_INTTYPE2, 0x40004502\r
-.set CYREG_PICU0_INTTYPE3, 0x40004503\r
-.set CYREG_PICU0_INTTYPE4, 0x40004504\r
-.set CYREG_PICU0_INTTYPE5, 0x40004505\r
-.set CYREG_PICU0_INTTYPE6, 0x40004506\r
-.set CYREG_PICU0_INTTYPE7, 0x40004507\r
-.set CYDEV_PICU_INTTYPE_PICU1_BASE, 0x40004508\r
-.set CYDEV_PICU_INTTYPE_PICU1_SIZE, 0x00000008\r
-.set CYREG_PICU1_INTTYPE0, 0x40004508\r
-.set CYREG_PICU1_INTTYPE1, 0x40004509\r
-.set CYREG_PICU1_INTTYPE2, 0x4000450a\r
-.set CYREG_PICU1_INTTYPE3, 0x4000450b\r
-.set CYREG_PICU1_INTTYPE4, 0x4000450c\r
-.set CYREG_PICU1_INTTYPE5, 0x4000450d\r
-.set CYREG_PICU1_INTTYPE6, 0x4000450e\r
-.set CYREG_PICU1_INTTYPE7, 0x4000450f\r
-.set CYDEV_PICU_INTTYPE_PICU2_BASE, 0x40004510\r
-.set CYDEV_PICU_INTTYPE_PICU2_SIZE, 0x00000008\r
-.set CYREG_PICU2_INTTYPE0, 0x40004510\r
-.set CYREG_PICU2_INTTYPE1, 0x40004511\r
-.set CYREG_PICU2_INTTYPE2, 0x40004512\r
-.set CYREG_PICU2_INTTYPE3, 0x40004513\r
-.set CYREG_PICU2_INTTYPE4, 0x40004514\r
-.set CYREG_PICU2_INTTYPE5, 0x40004515\r
-.set CYREG_PICU2_INTTYPE6, 0x40004516\r
-.set CYREG_PICU2_INTTYPE7, 0x40004517\r
-.set CYDEV_PICU_INTTYPE_PICU3_BASE, 0x40004518\r
-.set CYDEV_PICU_INTTYPE_PICU3_SIZE, 0x00000008\r
-.set CYREG_PICU3_INTTYPE0, 0x40004518\r
-.set CYREG_PICU3_INTTYPE1, 0x40004519\r
-.set CYREG_PICU3_INTTYPE2, 0x4000451a\r
-.set CYREG_PICU3_INTTYPE3, 0x4000451b\r
-.set CYREG_PICU3_INTTYPE4, 0x4000451c\r
-.set CYREG_PICU3_INTTYPE5, 0x4000451d\r
-.set CYREG_PICU3_INTTYPE6, 0x4000451e\r
-.set CYREG_PICU3_INTTYPE7, 0x4000451f\r
-.set CYDEV_PICU_INTTYPE_PICU4_BASE, 0x40004520\r
-.set CYDEV_PICU_INTTYPE_PICU4_SIZE, 0x00000008\r
-.set CYREG_PICU4_INTTYPE0, 0x40004520\r
-.set CYREG_PICU4_INTTYPE1, 0x40004521\r
-.set CYREG_PICU4_INTTYPE2, 0x40004522\r
-.set CYREG_PICU4_INTTYPE3, 0x40004523\r
-.set CYREG_PICU4_INTTYPE4, 0x40004524\r
-.set CYREG_PICU4_INTTYPE5, 0x40004525\r
-.set CYREG_PICU4_INTTYPE6, 0x40004526\r
-.set CYREG_PICU4_INTTYPE7, 0x40004527\r
-.set CYDEV_PICU_INTTYPE_PICU5_BASE, 0x40004528\r
-.set CYDEV_PICU_INTTYPE_PICU5_SIZE, 0x00000008\r
-.set CYREG_PICU5_INTTYPE0, 0x40004528\r
-.set CYREG_PICU5_INTTYPE1, 0x40004529\r
-.set CYREG_PICU5_INTTYPE2, 0x4000452a\r
-.set CYREG_PICU5_INTTYPE3, 0x4000452b\r
-.set CYREG_PICU5_INTTYPE4, 0x4000452c\r
-.set CYREG_PICU5_INTTYPE5, 0x4000452d\r
-.set CYREG_PICU5_INTTYPE6, 0x4000452e\r
-.set CYREG_PICU5_INTTYPE7, 0x4000452f\r
-.set CYDEV_PICU_INTTYPE_PICU6_BASE, 0x40004530\r
-.set CYDEV_PICU_INTTYPE_PICU6_SIZE, 0x00000008\r
-.set CYREG_PICU6_INTTYPE0, 0x40004530\r
-.set CYREG_PICU6_INTTYPE1, 0x40004531\r
-.set CYREG_PICU6_INTTYPE2, 0x40004532\r
-.set CYREG_PICU6_INTTYPE3, 0x40004533\r
-.set CYREG_PICU6_INTTYPE4, 0x40004534\r
-.set CYREG_PICU6_INTTYPE5, 0x40004535\r
-.set CYREG_PICU6_INTTYPE6, 0x40004536\r
-.set CYREG_PICU6_INTTYPE7, 0x40004537\r
-.set CYDEV_PICU_INTTYPE_PICU12_BASE, 0x40004560\r
-.set CYDEV_PICU_INTTYPE_PICU12_SIZE, 0x00000008\r
-.set CYREG_PICU12_INTTYPE0, 0x40004560\r
-.set CYREG_PICU12_INTTYPE1, 0x40004561\r
-.set CYREG_PICU12_INTTYPE2, 0x40004562\r
-.set CYREG_PICU12_INTTYPE3, 0x40004563\r
-.set CYREG_PICU12_INTTYPE4, 0x40004564\r
-.set CYREG_PICU12_INTTYPE5, 0x40004565\r
-.set CYREG_PICU12_INTTYPE6, 0x40004566\r
-.set CYREG_PICU12_INTTYPE7, 0x40004567\r
-.set CYDEV_PICU_INTTYPE_PICU15_BASE, 0x40004578\r
-.set CYDEV_PICU_INTTYPE_PICU15_SIZE, 0x00000008\r
-.set CYREG_PICU15_INTTYPE0, 0x40004578\r
-.set CYREG_PICU15_INTTYPE1, 0x40004579\r
-.set CYREG_PICU15_INTTYPE2, 0x4000457a\r
-.set CYREG_PICU15_INTTYPE3, 0x4000457b\r
-.set CYREG_PICU15_INTTYPE4, 0x4000457c\r
-.set CYREG_PICU15_INTTYPE5, 0x4000457d\r
-.set CYREG_PICU15_INTTYPE6, 0x4000457e\r
-.set CYREG_PICU15_INTTYPE7, 0x4000457f\r
-.set CYDEV_PICU_STAT_BASE, 0x40004580\r
-.set CYDEV_PICU_STAT_SIZE, 0x00000010\r
-.set CYDEV_PICU_STAT_PICU0_BASE, 0x40004580\r
-.set CYDEV_PICU_STAT_PICU0_SIZE, 0x00000001\r
-.set CYREG_PICU0_INTSTAT, 0x40004580\r
-.set CYDEV_PICU_STAT_PICU1_BASE, 0x40004581\r
-.set CYDEV_PICU_STAT_PICU1_SIZE, 0x00000001\r
-.set CYREG_PICU1_INTSTAT, 0x40004581\r
-.set CYDEV_PICU_STAT_PICU2_BASE, 0x40004582\r
-.set CYDEV_PICU_STAT_PICU2_SIZE, 0x00000001\r
-.set CYREG_PICU2_INTSTAT, 0x40004582\r
-.set CYDEV_PICU_STAT_PICU3_BASE, 0x40004583\r
-.set CYDEV_PICU_STAT_PICU3_SIZE, 0x00000001\r
-.set CYREG_PICU3_INTSTAT, 0x40004583\r
-.set CYDEV_PICU_STAT_PICU4_BASE, 0x40004584\r
-.set CYDEV_PICU_STAT_PICU4_SIZE, 0x00000001\r
-.set CYREG_PICU4_INTSTAT, 0x40004584\r
-.set CYDEV_PICU_STAT_PICU5_BASE, 0x40004585\r
-.set CYDEV_PICU_STAT_PICU5_SIZE, 0x00000001\r
-.set CYREG_PICU5_INTSTAT, 0x40004585\r
-.set CYDEV_PICU_STAT_PICU6_BASE, 0x40004586\r
-.set CYDEV_PICU_STAT_PICU6_SIZE, 0x00000001\r
-.set CYREG_PICU6_INTSTAT, 0x40004586\r
-.set CYDEV_PICU_STAT_PICU12_BASE, 0x4000458c\r
-.set CYDEV_PICU_STAT_PICU12_SIZE, 0x00000001\r
-.set CYREG_PICU12_INTSTAT, 0x4000458c\r
-.set CYDEV_PICU_STAT_PICU15_BASE, 0x4000458f\r
-.set CYDEV_PICU_STAT_PICU15_SIZE, 0x00000001\r
-.set CYREG_PICU15_INTSTAT, 0x4000458f\r
-.set CYDEV_PICU_SNAP_BASE, 0x40004590\r
-.set CYDEV_PICU_SNAP_SIZE, 0x00000010\r
-.set CYDEV_PICU_SNAP_PICU0_BASE, 0x40004590\r
-.set CYDEV_PICU_SNAP_PICU0_SIZE, 0x00000001\r
-.set CYREG_PICU0_SNAP, 0x40004590\r
-.set CYDEV_PICU_SNAP_PICU1_BASE, 0x40004591\r
-.set CYDEV_PICU_SNAP_PICU1_SIZE, 0x00000001\r
-.set CYREG_PICU1_SNAP, 0x40004591\r
-.set CYDEV_PICU_SNAP_PICU2_BASE, 0x40004592\r
-.set CYDEV_PICU_SNAP_PICU2_SIZE, 0x00000001\r
-.set CYREG_PICU2_SNAP, 0x40004592\r
-.set CYDEV_PICU_SNAP_PICU3_BASE, 0x40004593\r
-.set CYDEV_PICU_SNAP_PICU3_SIZE, 0x00000001\r
-.set CYREG_PICU3_SNAP, 0x40004593\r
-.set CYDEV_PICU_SNAP_PICU4_BASE, 0x40004594\r
-.set CYDEV_PICU_SNAP_PICU4_SIZE, 0x00000001\r
-.set CYREG_PICU4_SNAP, 0x40004594\r
-.set CYDEV_PICU_SNAP_PICU5_BASE, 0x40004595\r
-.set CYDEV_PICU_SNAP_PICU5_SIZE, 0x00000001\r
-.set CYREG_PICU5_SNAP, 0x40004595\r
-.set CYDEV_PICU_SNAP_PICU6_BASE, 0x40004596\r
-.set CYDEV_PICU_SNAP_PICU6_SIZE, 0x00000001\r
-.set CYREG_PICU6_SNAP, 0x40004596\r
-.set CYDEV_PICU_SNAP_PICU12_BASE, 0x4000459c\r
-.set CYDEV_PICU_SNAP_PICU12_SIZE, 0x00000001\r
-.set CYREG_PICU12_SNAP, 0x4000459c\r
-.set CYDEV_PICU_SNAP_PICU_15_BASE, 0x4000459f\r
-.set CYDEV_PICU_SNAP_PICU_15_SIZE, 0x00000001\r
-.set CYREG_PICU_15_SNAP_15, 0x4000459f\r
-.set CYDEV_PICU_DISABLE_COR_BASE, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_SIZE, 0x00000010\r
-.set CYDEV_PICU_DISABLE_COR_PICU0_BASE, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_PICU0_SIZE, 0x00000001\r
-.set CYREG_PICU0_DISABLE_COR, 0x400045a0\r
-.set CYDEV_PICU_DISABLE_COR_PICU1_BASE, 0x400045a1\r
-.set CYDEV_PICU_DISABLE_COR_PICU1_SIZE, 0x00000001\r
-.set CYREG_PICU1_DISABLE_COR, 0x400045a1\r
-.set CYDEV_PICU_DISABLE_COR_PICU2_BASE, 0x400045a2\r
-.set CYDEV_PICU_DISABLE_COR_PICU2_SIZE, 0x00000001\r
-.set CYREG_PICU2_DISABLE_COR, 0x400045a2\r
-.set CYDEV_PICU_DISABLE_COR_PICU3_BASE, 0x400045a3\r
-.set CYDEV_PICU_DISABLE_COR_PICU3_SIZE, 0x00000001\r
-.set CYREG_PICU3_DISABLE_COR, 0x400045a3\r
-.set CYDEV_PICU_DISABLE_COR_PICU4_BASE, 0x400045a4\r
-.set CYDEV_PICU_DISABLE_COR_PICU4_SIZE, 0x00000001\r
-.set CYREG_PICU4_DISABLE_COR, 0x400045a4\r
-.set CYDEV_PICU_DISABLE_COR_PICU5_BASE, 0x400045a5\r
-.set CYDEV_PICU_DISABLE_COR_PICU5_SIZE, 0x00000001\r
-.set CYREG_PICU5_DISABLE_COR, 0x400045a5\r
-.set CYDEV_PICU_DISABLE_COR_PICU6_BASE, 0x400045a6\r
-.set CYDEV_PICU_DISABLE_COR_PICU6_SIZE, 0x00000001\r
-.set CYREG_PICU6_DISABLE_COR, 0x400045a6\r
-.set CYDEV_PICU_DISABLE_COR_PICU12_BASE, 0x400045ac\r
-.set CYDEV_PICU_DISABLE_COR_PICU12_SIZE, 0x00000001\r
-.set CYREG_PICU12_DISABLE_COR, 0x400045ac\r
-.set CYDEV_PICU_DISABLE_COR_PICU15_BASE, 0x400045af\r
-.set CYDEV_PICU_DISABLE_COR_PICU15_SIZE, 0x00000001\r
-.set CYREG_PICU15_DISABLE_COR, 0x400045af\r
-.set CYDEV_MFGCFG_BASE, 0x40004600\r
-.set CYDEV_MFGCFG_SIZE, 0x000000ed\r
-.set CYDEV_MFGCFG_ANAIF_BASE, 0x40004600\r
-.set CYDEV_MFGCFG_ANAIF_SIZE, 0x00000038\r
-.set CYDEV_MFGCFG_ANAIF_DAC0_BASE, 0x40004608\r
-.set CYDEV_MFGCFG_ANAIF_DAC0_SIZE, 0x00000001\r
-.set CYREG_DAC0_TR, 0x40004608\r
-.set CYDEV_MFGCFG_ANAIF_DAC1_BASE, 0x40004609\r
-.set CYDEV_MFGCFG_ANAIF_DAC1_SIZE, 0x00000001\r
-.set CYREG_DAC1_TR, 0x40004609\r
-.set CYDEV_MFGCFG_ANAIF_DAC2_BASE, 0x4000460a\r
-.set CYDEV_MFGCFG_ANAIF_DAC2_SIZE, 0x00000001\r
-.set CYREG_DAC2_TR, 0x4000460a\r
-.set CYDEV_MFGCFG_ANAIF_DAC3_BASE, 0x4000460b\r
-.set CYDEV_MFGCFG_ANAIF_DAC3_SIZE, 0x00000001\r
-.set CYREG_DAC3_TR, 0x4000460b\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE, 0x40004610\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE, 0x00000001\r
-.set CYREG_NPUMP_DSM_TR0, 0x40004610\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE, 0x40004611\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE, 0x00000001\r
-.set CYREG_NPUMP_SC_TR0, 0x40004611\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE, 0x40004612\r
-.set CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE, 0x00000001\r
-.set CYREG_NPUMP_OPAMP_TR0, 0x40004612\r
-.set CYDEV_MFGCFG_ANAIF_SAR0_BASE, 0x40004614\r
-.set CYDEV_MFGCFG_ANAIF_SAR0_SIZE, 0x00000001\r
-.set CYREG_SAR0_TR0, 0x40004614\r
-.set CYDEV_MFGCFG_ANAIF_SAR1_BASE, 0x40004616\r
-.set CYDEV_MFGCFG_ANAIF_SAR1_SIZE, 0x00000001\r
-.set CYREG_SAR1_TR0, 0x40004616\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_BASE, 0x40004620\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE, 0x00000002\r
-.set CYREG_OPAMP0_TR0, 0x40004620\r
-.set CYREG_OPAMP0_TR1, 0x40004621\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_BASE, 0x40004622\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE, 0x00000002\r
-.set CYREG_OPAMP1_TR0, 0x40004622\r
-.set CYREG_OPAMP1_TR1, 0x40004623\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_BASE, 0x40004624\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE, 0x00000002\r
-.set CYREG_OPAMP2_TR0, 0x40004624\r
-.set CYREG_OPAMP2_TR1, 0x40004625\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_BASE, 0x40004626\r
-.set CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE, 0x00000002\r
-.set CYREG_OPAMP3_TR0, 0x40004626\r
-.set CYREG_OPAMP3_TR1, 0x40004627\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_BASE, 0x40004630\r
-.set CYDEV_MFGCFG_ANAIF_CMP0_SIZE, 0x00000002\r
-.set CYREG_CMP0_TR0, 0x40004630\r
-.set CYREG_CMP0_TR1, 0x40004631\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_BASE, 0x40004632\r
-.set CYDEV_MFGCFG_ANAIF_CMP1_SIZE, 0x00000002\r
-.set CYREG_CMP1_TR0, 0x40004632\r
-.set CYREG_CMP1_TR1, 0x40004633\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_BASE, 0x40004634\r
-.set CYDEV_MFGCFG_ANAIF_CMP2_SIZE, 0x00000002\r
-.set CYREG_CMP2_TR0, 0x40004634\r
-.set CYREG_CMP2_TR1, 0x40004635\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_BASE, 0x40004636\r
-.set CYDEV_MFGCFG_ANAIF_CMP3_SIZE, 0x00000002\r
-.set CYREG_CMP3_TR0, 0x40004636\r
-.set CYREG_CMP3_TR1, 0x40004637\r
-.set CYDEV_MFGCFG_PWRSYS_BASE, 0x40004680\r
-.set CYDEV_MFGCFG_PWRSYS_SIZE, 0x0000000b\r
-.set CYREG_PWRSYS_HIB_TR0, 0x40004680\r
-.set CYREG_PWRSYS_HIB_TR1, 0x40004681\r
-.set CYREG_PWRSYS_I2C_TR, 0x40004682\r
-.set CYREG_PWRSYS_SLP_TR, 0x40004683\r
-.set CYREG_PWRSYS_BUZZ_TR, 0x40004684\r
-.set CYREG_PWRSYS_WAKE_TR0, 0x40004685\r
-.set CYREG_PWRSYS_WAKE_TR1, 0x40004686\r
-.set CYREG_PWRSYS_BREF_TR, 0x40004687\r
-.set CYREG_PWRSYS_BG_TR, 0x40004688\r
-.set CYREG_PWRSYS_WAKE_TR2, 0x40004689\r
-.set CYREG_PWRSYS_WAKE_TR3, 0x4000468a\r
-.set CYDEV_MFGCFG_ILO_BASE, 0x40004690\r
-.set CYDEV_MFGCFG_ILO_SIZE, 0x00000002\r
-.set CYREG_ILO_TR0, 0x40004690\r
-.set CYREG_ILO_TR1, 0x40004691\r
-.set CYDEV_MFGCFG_X32_BASE, 0x40004698\r
-.set CYDEV_MFGCFG_X32_SIZE, 0x00000001\r
-.set CYREG_X32_TR, 0x40004698\r
-.set CYDEV_MFGCFG_IMO_BASE, 0x400046a0\r
-.set CYDEV_MFGCFG_IMO_SIZE, 0x00000005\r
-.set CYREG_IMO_TR0, 0x400046a0\r
-.set CYREG_IMO_TR1, 0x400046a1\r
-.set CYREG_IMO_GAIN, 0x400046a2\r
-.set CYREG_IMO_C36M, 0x400046a3\r
-.set CYREG_IMO_TR2, 0x400046a4\r
-.set CYDEV_MFGCFG_XMHZ_BASE, 0x400046a8\r
-.set CYDEV_MFGCFG_XMHZ_SIZE, 0x00000001\r
-.set CYREG_XMHZ_TR, 0x400046a8\r
-.set CYREG_MFGCFG_DLY, 0x400046c0\r
-.set CYDEV_MFGCFG_MLOGIC_BASE, 0x400046e0\r
-.set CYDEV_MFGCFG_MLOGIC_SIZE, 0x0000000d\r
-.set CYREG_MLOGIC_DMPSTR, 0x400046e2\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_BASE, 0x400046e4\r
-.set CYDEV_MFGCFG_MLOGIC_SEG_SIZE, 0x00000002\r
-.set CYREG_MLOGIC_SEG_CR, 0x400046e4\r
-.set CYREG_MLOGIC_SEG_CFG0, 0x400046e5\r
-.set CYREG_MLOGIC_DEBUG, 0x400046e8\r
-.set CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE, 0x400046ea\r
-.set CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE, 0x00000001\r
-.set CYREG_MLOGIC_CPU_SCR_CPU_SCR, 0x400046ea\r
-.set CYREG_MLOGIC_REV_ID, 0x400046ec\r
-.set CYDEV_RESET_BASE, 0x400046f0\r
-.set CYDEV_RESET_SIZE, 0x0000000f\r
-.set CYREG_RESET_IPOR_CR0, 0x400046f0\r
-.set CYREG_RESET_IPOR_CR1, 0x400046f1\r
-.set CYREG_RESET_IPOR_CR2, 0x400046f2\r
-.set CYREG_RESET_IPOR_CR3, 0x400046f3\r
-.set CYREG_RESET_CR0, 0x400046f4\r
-.set CYREG_RESET_CR1, 0x400046f5\r
-.set CYREG_RESET_CR2, 0x400046f6\r
-.set CYREG_RESET_CR3, 0x400046f7\r
-.set CYREG_RESET_CR4, 0x400046f8\r
-.set CYREG_RESET_CR5, 0x400046f9\r
-.set CYREG_RESET_SR0, 0x400046fa\r
-.set CYREG_RESET_SR1, 0x400046fb\r
-.set CYREG_RESET_SR2, 0x400046fc\r
-.set CYREG_RESET_SR3, 0x400046fd\r
-.set CYREG_RESET_TR, 0x400046fe\r
-.set CYDEV_SPC_BASE, 0x40004700\r
-.set CYDEV_SPC_SIZE, 0x00000100\r
-.set CYREG_SPC_FM_EE_CR, 0x40004700\r
-.set CYREG_SPC_FM_EE_WAKE_CNT, 0x40004701\r
-.set CYREG_SPC_EE_SCR, 0x40004702\r
-.set CYREG_SPC_EE_ERR, 0x40004703\r
-.set CYREG_SPC_CPU_DATA, 0x40004720\r
-.set CYREG_SPC_DMA_DATA, 0x40004721\r
-.set CYREG_SPC_SR, 0x40004722\r
-.set CYREG_SPC_CR, 0x40004723\r
-.set CYDEV_SPC_DMM_MAP_BASE, 0x40004780\r
-.set CYDEV_SPC_DMM_MAP_SIZE, 0x00000080\r
-.set CYREG_SPC_DMM_MAP_SRAM_MBASE, 0x40004780\r
-.set CYREG_SPC_DMM_MAP_SRAM_MSIZE, 0x00000080\r
-.set CYDEV_CACHE_BASE, 0x40004800\r
-.set CYDEV_CACHE_SIZE, 0x0000009c\r
-.set CYREG_CACHE_CC_CTL, 0x40004800\r
-.set CYREG_CACHE_ECC_CORR, 0x40004880\r
-.set CYREG_CACHE_ECC_ERR, 0x40004888\r
-.set CYREG_CACHE_FLASH_ERR, 0x40004890\r
-.set CYREG_CACHE_HITMISS, 0x40004898\r
-.set CYDEV_I2C_BASE, 0x40004900\r
-.set CYDEV_I2C_SIZE, 0x000000e1\r
-.set CYREG_I2C_XCFG, 0x400049c8\r
-.set CYREG_I2C_ADR, 0x400049ca\r
-.set CYREG_I2C_CFG, 0x400049d6\r
-.set CYREG_I2C_CSR, 0x400049d7\r
-.set CYREG_I2C_D, 0x400049d8\r
-.set CYREG_I2C_MCSR, 0x400049d9\r
-.set CYREG_I2C_CLK_DIV1, 0x400049db\r
-.set CYREG_I2C_CLK_DIV2, 0x400049dc\r
-.set CYREG_I2C_TMOUT_CSR, 0x400049dd\r
-.set CYREG_I2C_TMOUT_SR, 0x400049de\r
-.set CYREG_I2C_TMOUT_CFG0, 0x400049df\r
-.set CYREG_I2C_TMOUT_CFG1, 0x400049e0\r
-.set CYDEV_DEC_BASE, 0x40004e00\r
-.set CYDEV_DEC_SIZE, 0x00000015\r
-.set CYREG_DEC_CR, 0x40004e00\r
-.set CYREG_DEC_SR, 0x40004e01\r
-.set CYREG_DEC_SHIFT1, 0x40004e02\r
-.set CYREG_DEC_SHIFT2, 0x40004e03\r
-.set CYREG_DEC_DR2, 0x40004e04\r
-.set CYREG_DEC_DR2H, 0x40004e05\r
-.set CYREG_DEC_DR1, 0x40004e06\r
-.set CYREG_DEC_OCOR, 0x40004e08\r
-.set CYREG_DEC_OCORM, 0x40004e09\r
-.set CYREG_DEC_OCORH, 0x40004e0a\r
-.set CYREG_DEC_GCOR, 0x40004e0c\r
-.set CYREG_DEC_GCORH, 0x40004e0d\r
-.set CYREG_DEC_GVAL, 0x40004e0e\r
-.set CYREG_DEC_OUTSAMP, 0x40004e10\r
-.set CYREG_DEC_OUTSAMPM, 0x40004e11\r
-.set CYREG_DEC_OUTSAMPH, 0x40004e12\r
-.set CYREG_DEC_OUTSAMPS, 0x40004e13\r
-.set CYREG_DEC_COHER, 0x40004e14\r
-.set CYDEV_TMR0_BASE, 0x40004f00\r
-.set CYDEV_TMR0_SIZE, 0x0000000c\r
-.set CYREG_TMR0_CFG0, 0x40004f00\r
-.set CYREG_TMR0_CFG1, 0x40004f01\r
-.set CYREG_TMR0_CFG2, 0x40004f02\r
-.set CYREG_TMR0_SR0, 0x40004f03\r
-.set CYREG_TMR0_PER0, 0x40004f04\r
-.set CYREG_TMR0_PER1, 0x40004f05\r
-.set CYREG_TMR0_CNT_CMP0, 0x40004f06\r
-.set CYREG_TMR0_CNT_CMP1, 0x40004f07\r
-.set CYREG_TMR0_CAP0, 0x40004f08\r
-.set CYREG_TMR0_CAP1, 0x40004f09\r
-.set CYREG_TMR0_RT0, 0x40004f0a\r
-.set CYREG_TMR0_RT1, 0x40004f0b\r
-.set CYDEV_TMR1_BASE, 0x40004f0c\r
-.set CYDEV_TMR1_SIZE, 0x0000000c\r
-.set CYREG_TMR1_CFG0, 0x40004f0c\r
-.set CYREG_TMR1_CFG1, 0x40004f0d\r
-.set CYREG_TMR1_CFG2, 0x40004f0e\r
-.set CYREG_TMR1_SR0, 0x40004f0f\r
-.set CYREG_TMR1_PER0, 0x40004f10\r
-.set CYREG_TMR1_PER1, 0x40004f11\r
-.set CYREG_TMR1_CNT_CMP0, 0x40004f12\r
-.set CYREG_TMR1_CNT_CMP1, 0x40004f13\r
-.set CYREG_TMR1_CAP0, 0x40004f14\r
-.set CYREG_TMR1_CAP1, 0x40004f15\r
-.set CYREG_TMR1_RT0, 0x40004f16\r
-.set CYREG_TMR1_RT1, 0x40004f17\r
-.set CYDEV_TMR2_BASE, 0x40004f18\r
-.set CYDEV_TMR2_SIZE, 0x0000000c\r
-.set CYREG_TMR2_CFG0, 0x40004f18\r
-.set CYREG_TMR2_CFG1, 0x40004f19\r
-.set CYREG_TMR2_CFG2, 0x40004f1a\r
-.set CYREG_TMR2_SR0, 0x40004f1b\r
-.set CYREG_TMR2_PER0, 0x40004f1c\r
-.set CYREG_TMR2_PER1, 0x40004f1d\r
-.set CYREG_TMR2_CNT_CMP0, 0x40004f1e\r
-.set CYREG_TMR2_CNT_CMP1, 0x40004f1f\r
-.set CYREG_TMR2_CAP0, 0x40004f20\r
-.set CYREG_TMR2_CAP1, 0x40004f21\r
-.set CYREG_TMR2_RT0, 0x40004f22\r
-.set CYREG_TMR2_RT1, 0x40004f23\r
-.set CYDEV_TMR3_BASE, 0x40004f24\r
-.set CYDEV_TMR3_SIZE, 0x0000000c\r
-.set CYREG_TMR3_CFG0, 0x40004f24\r
-.set CYREG_TMR3_CFG1, 0x40004f25\r
-.set CYREG_TMR3_CFG2, 0x40004f26\r
-.set CYREG_TMR3_SR0, 0x40004f27\r
-.set CYREG_TMR3_PER0, 0x40004f28\r
-.set CYREG_TMR3_PER1, 0x40004f29\r
-.set CYREG_TMR3_CNT_CMP0, 0x40004f2a\r
-.set CYREG_TMR3_CNT_CMP1, 0x40004f2b\r
-.set CYREG_TMR3_CAP0, 0x40004f2c\r
-.set CYREG_TMR3_CAP1, 0x40004f2d\r
-.set CYREG_TMR3_RT0, 0x40004f2e\r
-.set CYREG_TMR3_RT1, 0x40004f2f\r
-.set CYDEV_IO_BASE, 0x40005000\r
-.set CYDEV_IO_SIZE, 0x00000200\r
-.set CYDEV_IO_PC_BASE, 0x40005000\r
-.set CYDEV_IO_PC_SIZE, 0x00000080\r
-.set CYDEV_IO_PC_PRT0_BASE, 0x40005000\r
-.set CYDEV_IO_PC_PRT0_SIZE, 0x00000008\r
-.set CYREG_PRT0_PC0, 0x40005000\r
-.set CYREG_PRT0_PC1, 0x40005001\r
-.set CYREG_PRT0_PC2, 0x40005002\r
-.set CYREG_PRT0_PC3, 0x40005003\r
-.set CYREG_PRT0_PC4, 0x40005004\r
-.set CYREG_PRT0_PC5, 0x40005005\r
-.set CYREG_PRT0_PC6, 0x40005006\r
-.set CYREG_PRT0_PC7, 0x40005007\r
-.set CYDEV_IO_PC_PRT1_BASE, 0x40005008\r
-.set CYDEV_IO_PC_PRT1_SIZE, 0x00000008\r
-.set CYREG_PRT1_PC0, 0x40005008\r
-.set CYREG_PRT1_PC1, 0x40005009\r
-.set CYREG_PRT1_PC2, 0x4000500a\r
-.set CYREG_PRT1_PC3, 0x4000500b\r
-.set CYREG_PRT1_PC4, 0x4000500c\r
-.set CYREG_PRT1_PC5, 0x4000500d\r
-.set CYREG_PRT1_PC6, 0x4000500e\r
-.set CYREG_PRT1_PC7, 0x4000500f\r
-.set CYDEV_IO_PC_PRT2_BASE, 0x40005010\r
-.set CYDEV_IO_PC_PRT2_SIZE, 0x00000008\r
-.set CYREG_PRT2_PC0, 0x40005010\r
-.set CYREG_PRT2_PC1, 0x40005011\r
-.set CYREG_PRT2_PC2, 0x40005012\r
-.set CYREG_PRT2_PC3, 0x40005013\r
-.set CYREG_PRT2_PC4, 0x40005014\r
-.set CYREG_PRT2_PC5, 0x40005015\r
-.set CYREG_PRT2_PC6, 0x40005016\r
-.set CYREG_PRT2_PC7, 0x40005017\r
-.set CYDEV_IO_PC_PRT3_BASE, 0x40005018\r
-.set CYDEV_IO_PC_PRT3_SIZE, 0x00000008\r
-.set CYREG_PRT3_PC0, 0x40005018\r
-.set CYREG_PRT3_PC1, 0x40005019\r
-.set CYREG_PRT3_PC2, 0x4000501a\r
-.set CYREG_PRT3_PC3, 0x4000501b\r
-.set CYREG_PRT3_PC4, 0x4000501c\r
-.set CYREG_PRT3_PC5, 0x4000501d\r
-.set CYREG_PRT3_PC6, 0x4000501e\r
-.set CYREG_PRT3_PC7, 0x4000501f\r
-.set CYDEV_IO_PC_PRT4_BASE, 0x40005020\r
-.set CYDEV_IO_PC_PRT4_SIZE, 0x00000008\r
-.set CYREG_PRT4_PC0, 0x40005020\r
-.set CYREG_PRT4_PC1, 0x40005021\r
-.set CYREG_PRT4_PC2, 0x40005022\r
-.set CYREG_PRT4_PC3, 0x40005023\r
-.set CYREG_PRT4_PC4, 0x40005024\r
-.set CYREG_PRT4_PC5, 0x40005025\r
-.set CYREG_PRT4_PC6, 0x40005026\r
-.set CYREG_PRT4_PC7, 0x40005027\r
-.set CYDEV_IO_PC_PRT5_BASE, 0x40005028\r
-.set CYDEV_IO_PC_PRT5_SIZE, 0x00000008\r
-.set CYREG_PRT5_PC0, 0x40005028\r
-.set CYREG_PRT5_PC1, 0x40005029\r
-.set CYREG_PRT5_PC2, 0x4000502a\r
-.set CYREG_PRT5_PC3, 0x4000502b\r
-.set CYREG_PRT5_PC4, 0x4000502c\r
-.set CYREG_PRT5_PC5, 0x4000502d\r
-.set CYREG_PRT5_PC6, 0x4000502e\r
-.set CYREG_PRT5_PC7, 0x4000502f\r
-.set CYDEV_IO_PC_PRT6_BASE, 0x40005030\r
-.set CYDEV_IO_PC_PRT6_SIZE, 0x00000008\r
-.set CYREG_PRT6_PC0, 0x40005030\r
-.set CYREG_PRT6_PC1, 0x40005031\r
-.set CYREG_PRT6_PC2, 0x40005032\r
-.set CYREG_PRT6_PC3, 0x40005033\r
-.set CYREG_PRT6_PC4, 0x40005034\r
-.set CYREG_PRT6_PC5, 0x40005035\r
-.set CYREG_PRT6_PC6, 0x40005036\r
-.set CYREG_PRT6_PC7, 0x40005037\r
-.set CYDEV_IO_PC_PRT12_BASE, 0x40005060\r
-.set CYDEV_IO_PC_PRT12_SIZE, 0x00000008\r
-.set CYREG_PRT12_PC0, 0x40005060\r
-.set CYREG_PRT12_PC1, 0x40005061\r
-.set CYREG_PRT12_PC2, 0x40005062\r
-.set CYREG_PRT12_PC3, 0x40005063\r
-.set CYREG_PRT12_PC4, 0x40005064\r
-.set CYREG_PRT12_PC5, 0x40005065\r
-.set CYREG_PRT12_PC6, 0x40005066\r
-.set CYREG_PRT12_PC7, 0x40005067\r
-.set CYDEV_IO_PC_PRT15_BASE, 0x40005078\r
-.set CYDEV_IO_PC_PRT15_SIZE, 0x00000006\r
-.set CYREG_IO_PC_PRT15_PC0, 0x40005078\r
-.set CYREG_IO_PC_PRT15_PC1, 0x40005079\r
-.set CYREG_IO_PC_PRT15_PC2, 0x4000507a\r
-.set CYREG_IO_PC_PRT15_PC3, 0x4000507b\r
-.set CYREG_IO_PC_PRT15_PC4, 0x4000507c\r
-.set CYREG_IO_PC_PRT15_PC5, 0x4000507d\r
-.set CYDEV_IO_PC_PRT15_7_6_BASE, 0x4000507e\r
-.set CYDEV_IO_PC_PRT15_7_6_SIZE, 0x00000002\r
-.set CYREG_IO_PC_PRT15_7_6_PC0, 0x4000507e\r
-.set CYREG_IO_PC_PRT15_7_6_PC1, 0x4000507f\r
-.set CYDEV_IO_DR_BASE, 0x40005080\r
-.set CYDEV_IO_DR_SIZE, 0x00000010\r
-.set CYDEV_IO_DR_PRT0_BASE, 0x40005080\r
-.set CYDEV_IO_DR_PRT0_SIZE, 0x00000001\r
-.set CYREG_PRT0_DR_ALIAS, 0x40005080\r
-.set CYDEV_IO_DR_PRT1_BASE, 0x40005081\r
-.set CYDEV_IO_DR_PRT1_SIZE, 0x00000001\r
-.set CYREG_PRT1_DR_ALIAS, 0x40005081\r
-.set CYDEV_IO_DR_PRT2_BASE, 0x40005082\r
-.set CYDEV_IO_DR_PRT2_SIZE, 0x00000001\r
-.set CYREG_PRT2_DR_ALIAS, 0x40005082\r
-.set CYDEV_IO_DR_PRT3_BASE, 0x40005083\r
-.set CYDEV_IO_DR_PRT3_SIZE, 0x00000001\r
-.set CYREG_PRT3_DR_ALIAS, 0x40005083\r
-.set CYDEV_IO_DR_PRT4_BASE, 0x40005084\r
-.set CYDEV_IO_DR_PRT4_SIZE, 0x00000001\r
-.set CYREG_PRT4_DR_ALIAS, 0x40005084\r
-.set CYDEV_IO_DR_PRT5_BASE, 0x40005085\r
-.set CYDEV_IO_DR_PRT5_SIZE, 0x00000001\r
-.set CYREG_PRT5_DR_ALIAS, 0x40005085\r
-.set CYDEV_IO_DR_PRT6_BASE, 0x40005086\r
-.set CYDEV_IO_DR_PRT6_SIZE, 0x00000001\r
-.set CYREG_PRT6_DR_ALIAS, 0x40005086\r
-.set CYDEV_IO_DR_PRT12_BASE, 0x4000508c\r
-.set CYDEV_IO_DR_PRT12_SIZE, 0x00000001\r
-.set CYREG_PRT12_DR_ALIAS, 0x4000508c\r
-.set CYDEV_IO_DR_PRT15_BASE, 0x4000508f\r
-.set CYDEV_IO_DR_PRT15_SIZE, 0x00000001\r
-.set CYREG_PRT15_DR_15_ALIAS, 0x4000508f\r
-.set CYDEV_IO_PS_BASE, 0x40005090\r
-.set CYDEV_IO_PS_SIZE, 0x00000010\r
-.set CYDEV_IO_PS_PRT0_BASE, 0x40005090\r
-.set CYDEV_IO_PS_PRT0_SIZE, 0x00000001\r
-.set CYREG_PRT0_PS_ALIAS, 0x40005090\r
-.set CYDEV_IO_PS_PRT1_BASE, 0x40005091\r
-.set CYDEV_IO_PS_PRT1_SIZE, 0x00000001\r
-.set CYREG_PRT1_PS_ALIAS, 0x40005091\r
-.set CYDEV_IO_PS_PRT2_BASE, 0x40005092\r
-.set CYDEV_IO_PS_PRT2_SIZE, 0x00000001\r
-.set CYREG_PRT2_PS_ALIAS, 0x40005092\r
-.set CYDEV_IO_PS_PRT3_BASE, 0x40005093\r
-.set CYDEV_IO_PS_PRT3_SIZE, 0x00000001\r
-.set CYREG_PRT3_PS_ALIAS, 0x40005093\r
-.set CYDEV_IO_PS_PRT4_BASE, 0x40005094\r
-.set CYDEV_IO_PS_PRT4_SIZE, 0x00000001\r
-.set CYREG_PRT4_PS_ALIAS, 0x40005094\r
-.set CYDEV_IO_PS_PRT5_BASE, 0x40005095\r
-.set CYDEV_IO_PS_PRT5_SIZE, 0x00000001\r
-.set CYREG_PRT5_PS_ALIAS, 0x40005095\r
-.set CYDEV_IO_PS_PRT6_BASE, 0x40005096\r
-.set CYDEV_IO_PS_PRT6_SIZE, 0x00000001\r
-.set CYREG_PRT6_PS_ALIAS, 0x40005096\r
-.set CYDEV_IO_PS_PRT12_BASE, 0x4000509c\r
-.set CYDEV_IO_PS_PRT12_SIZE, 0x00000001\r
-.set CYREG_PRT12_PS_ALIAS, 0x4000509c\r
-.set CYDEV_IO_PS_PRT15_BASE, 0x4000509f\r
-.set CYDEV_IO_PS_PRT15_SIZE, 0x00000001\r
-.set CYREG_PRT15_PS15_ALIAS, 0x4000509f\r
-.set CYDEV_IO_PRT_BASE, 0x40005100\r
-.set CYDEV_IO_PRT_SIZE, 0x00000100\r
-.set CYDEV_IO_PRT_PRT0_BASE, 0x40005100\r
-.set CYDEV_IO_PRT_PRT0_SIZE, 0x00000010\r
-.set CYREG_PRT0_DR, 0x40005100\r
-.set CYREG_PRT0_PS, 0x40005101\r
-.set CYREG_PRT0_DM0, 0x40005102\r
-.set CYREG_PRT0_DM1, 0x40005103\r
-.set CYREG_PRT0_DM2, 0x40005104\r
-.set CYREG_PRT0_SLW, 0x40005105\r
-.set CYREG_PRT0_BYP, 0x40005106\r
-.set CYREG_PRT0_BIE, 0x40005107\r
-.set CYREG_PRT0_INP_DIS, 0x40005108\r
-.set CYREG_PRT0_CTL, 0x40005109\r
-.set CYREG_PRT0_PRT, 0x4000510a\r
-.set CYREG_PRT0_BIT_MASK, 0x4000510b\r
-.set CYREG_PRT0_AMUX, 0x4000510c\r
-.set CYREG_PRT0_AG, 0x4000510d\r
-.set CYREG_PRT0_LCD_COM_SEG, 0x4000510e\r
-.set CYREG_PRT0_LCD_EN, 0x4000510f\r
-.set CYDEV_IO_PRT_PRT1_BASE, 0x40005110\r
-.set CYDEV_IO_PRT_PRT1_SIZE, 0x00000010\r
-.set CYREG_PRT1_DR, 0x40005110\r
-.set CYREG_PRT1_PS, 0x40005111\r
-.set CYREG_PRT1_DM0, 0x40005112\r
-.set CYREG_PRT1_DM1, 0x40005113\r
-.set CYREG_PRT1_DM2, 0x40005114\r
-.set CYREG_PRT1_SLW, 0x40005115\r
-.set CYREG_PRT1_BYP, 0x40005116\r
-.set CYREG_PRT1_BIE, 0x40005117\r
-.set CYREG_PRT1_INP_DIS, 0x40005118\r
-.set CYREG_PRT1_CTL, 0x40005119\r
-.set CYREG_PRT1_PRT, 0x4000511a\r
-.set CYREG_PRT1_BIT_MASK, 0x4000511b\r
-.set CYREG_PRT1_AMUX, 0x4000511c\r
-.set CYREG_PRT1_AG, 0x4000511d\r
-.set CYREG_PRT1_LCD_COM_SEG, 0x4000511e\r
-.set CYREG_PRT1_LCD_EN, 0x4000511f\r
-.set CYDEV_IO_PRT_PRT2_BASE, 0x40005120\r
-.set CYDEV_IO_PRT_PRT2_SIZE, 0x00000010\r
-.set CYREG_PRT2_DR, 0x40005120\r
-.set CYREG_PRT2_PS, 0x40005121\r
-.set CYREG_PRT2_DM0, 0x40005122\r
-.set CYREG_PRT2_DM1, 0x40005123\r
-.set CYREG_PRT2_DM2, 0x40005124\r
-.set CYREG_PRT2_SLW, 0x40005125\r
-.set CYREG_PRT2_BYP, 0x40005126\r
-.set CYREG_PRT2_BIE, 0x40005127\r
-.set CYREG_PRT2_INP_DIS, 0x40005128\r
-.set CYREG_PRT2_CTL, 0x40005129\r
-.set CYREG_PRT2_PRT, 0x4000512a\r
-.set CYREG_PRT2_BIT_MASK, 0x4000512b\r
-.set CYREG_PRT2_AMUX, 0x4000512c\r
-.set CYREG_PRT2_AG, 0x4000512d\r
-.set CYREG_PRT2_LCD_COM_SEG, 0x4000512e\r
-.set CYREG_PRT2_LCD_EN, 0x4000512f\r
-.set CYDEV_IO_PRT_PRT3_BASE, 0x40005130\r
-.set CYDEV_IO_PRT_PRT3_SIZE, 0x00000010\r
-.set CYREG_PRT3_DR, 0x40005130\r
-.set CYREG_PRT3_PS, 0x40005131\r
-.set CYREG_PRT3_DM0, 0x40005132\r
-.set CYREG_PRT3_DM1, 0x40005133\r
-.set CYREG_PRT3_DM2, 0x40005134\r
-.set CYREG_PRT3_SLW, 0x40005135\r
-.set CYREG_PRT3_BYP, 0x40005136\r
-.set CYREG_PRT3_BIE, 0x40005137\r
-.set CYREG_PRT3_INP_DIS, 0x40005138\r
-.set CYREG_PRT3_CTL, 0x40005139\r
-.set CYREG_PRT3_PRT, 0x4000513a\r
-.set CYREG_PRT3_BIT_MASK, 0x4000513b\r
-.set CYREG_PRT3_AMUX, 0x4000513c\r
-.set CYREG_PRT3_AG, 0x4000513d\r
-.set CYREG_PRT3_LCD_COM_SEG, 0x4000513e\r
-.set CYREG_PRT3_LCD_EN, 0x4000513f\r
-.set CYDEV_IO_PRT_PRT4_BASE, 0x40005140\r
-.set CYDEV_IO_PRT_PRT4_SIZE, 0x00000010\r
-.set CYREG_PRT4_DR, 0x40005140\r
-.set CYREG_PRT4_PS, 0x40005141\r
-.set CYREG_PRT4_DM0, 0x40005142\r
-.set CYREG_PRT4_DM1, 0x40005143\r
-.set CYREG_PRT4_DM2, 0x40005144\r
-.set CYREG_PRT4_SLW, 0x40005145\r
-.set CYREG_PRT4_BYP, 0x40005146\r
-.set CYREG_PRT4_BIE, 0x40005147\r
-.set CYREG_PRT4_INP_DIS, 0x40005148\r
-.set CYREG_PRT4_CTL, 0x40005149\r
-.set CYREG_PRT4_PRT, 0x4000514a\r
-.set CYREG_PRT4_BIT_MASK, 0x4000514b\r
-.set CYREG_PRT4_AMUX, 0x4000514c\r
-.set CYREG_PRT4_AG, 0x4000514d\r
-.set CYREG_PRT4_LCD_COM_SEG, 0x4000514e\r
-.set CYREG_PRT4_LCD_EN, 0x4000514f\r
-.set CYDEV_IO_PRT_PRT5_BASE, 0x40005150\r
-.set CYDEV_IO_PRT_PRT5_SIZE, 0x00000010\r
-.set CYREG_PRT5_DR, 0x40005150\r
-.set CYREG_PRT5_PS, 0x40005151\r
-.set CYREG_PRT5_DM0, 0x40005152\r
-.set CYREG_PRT5_DM1, 0x40005153\r
-.set CYREG_PRT5_DM2, 0x40005154\r
-.set CYREG_PRT5_SLW, 0x40005155\r
-.set CYREG_PRT5_BYP, 0x40005156\r
-.set CYREG_PRT5_BIE, 0x40005157\r
-.set CYREG_PRT5_INP_DIS, 0x40005158\r
-.set CYREG_PRT5_CTL, 0x40005159\r
-.set CYREG_PRT5_PRT, 0x4000515a\r
-.set CYREG_PRT5_BIT_MASK, 0x4000515b\r
-.set CYREG_PRT5_AMUX, 0x4000515c\r
-.set CYREG_PRT5_AG, 0x4000515d\r
-.set CYREG_PRT5_LCD_COM_SEG, 0x4000515e\r
-.set CYREG_PRT5_LCD_EN, 0x4000515f\r
-.set CYDEV_IO_PRT_PRT6_BASE, 0x40005160\r
-.set CYDEV_IO_PRT_PRT6_SIZE, 0x00000010\r
-.set CYREG_PRT6_DR, 0x40005160\r
-.set CYREG_PRT6_PS, 0x40005161\r
-.set CYREG_PRT6_DM0, 0x40005162\r
-.set CYREG_PRT6_DM1, 0x40005163\r
-.set CYREG_PRT6_DM2, 0x40005164\r
-.set CYREG_PRT6_SLW, 0x40005165\r
-.set CYREG_PRT6_BYP, 0x40005166\r
-.set CYREG_PRT6_BIE, 0x40005167\r
-.set CYREG_PRT6_INP_DIS, 0x40005168\r
-.set CYREG_PRT6_CTL, 0x40005169\r
-.set CYREG_PRT6_PRT, 0x4000516a\r
-.set CYREG_PRT6_BIT_MASK, 0x4000516b\r
-.set CYREG_PRT6_AMUX, 0x4000516c\r
-.set CYREG_PRT6_AG, 0x4000516d\r
-.set CYREG_PRT6_LCD_COM_SEG, 0x4000516e\r
-.set CYREG_PRT6_LCD_EN, 0x4000516f\r
-.set CYDEV_IO_PRT_PRT12_BASE, 0x400051c0\r
-.set CYDEV_IO_PRT_PRT12_SIZE, 0x00000010\r
-.set CYREG_PRT12_DR, 0x400051c0\r
-.set CYREG_PRT12_PS, 0x400051c1\r
-.set CYREG_PRT12_DM0, 0x400051c2\r
-.set CYREG_PRT12_DM1, 0x400051c3\r
-.set CYREG_PRT12_DM2, 0x400051c4\r
-.set CYREG_PRT12_SLW, 0x400051c5\r
-.set CYREG_PRT12_BYP, 0x400051c6\r
-.set CYREG_PRT12_BIE, 0x400051c7\r
-.set CYREG_PRT12_INP_DIS, 0x400051c8\r
-.set CYREG_PRT12_SIO_HYST_EN, 0x400051c9\r
-.set CYREG_PRT12_PRT, 0x400051ca\r
-.set CYREG_PRT12_BIT_MASK, 0x400051cb\r
-.set CYREG_PRT12_SIO_REG_HIFREQ, 0x400051cc\r
-.set CYREG_PRT12_AG, 0x400051cd\r
-.set CYREG_PRT12_SIO_CFG, 0x400051ce\r
-.set CYREG_PRT12_SIO_DIFF, 0x400051cf\r
-.set CYDEV_IO_PRT_PRT15_BASE, 0x400051f0\r
-.set CYDEV_IO_PRT_PRT15_SIZE, 0x00000010\r
-.set CYREG_PRT15_DR, 0x400051f0\r
-.set CYREG_PRT15_PS, 0x400051f1\r
-.set CYREG_PRT15_DM0, 0x400051f2\r
-.set CYREG_PRT15_DM1, 0x400051f3\r
-.set CYREG_PRT15_DM2, 0x400051f4\r
-.set CYREG_PRT15_SLW, 0x400051f5\r
-.set CYREG_PRT15_BYP, 0x400051f6\r
-.set CYREG_PRT15_BIE, 0x400051f7\r
-.set CYREG_PRT15_INP_DIS, 0x400051f8\r
-.set CYREG_PRT15_CTL, 0x400051f9\r
-.set CYREG_PRT15_PRT, 0x400051fa\r
-.set CYREG_PRT15_BIT_MASK, 0x400051fb\r
-.set CYREG_PRT15_AMUX, 0x400051fc\r
-.set CYREG_PRT15_AG, 0x400051fd\r
-.set CYREG_PRT15_LCD_COM_SEG, 0x400051fe\r
-.set CYREG_PRT15_LCD_EN, 0x400051ff\r
-.set CYDEV_PRTDSI_BASE, 0x40005200\r
-.set CYDEV_PRTDSI_SIZE, 0x0000007f\r
-.set CYDEV_PRTDSI_PRT0_BASE, 0x40005200\r
-.set CYDEV_PRTDSI_PRT0_SIZE, 0x00000007\r
-.set CYREG_PRT0_OUT_SEL0, 0x40005200\r
-.set CYREG_PRT0_OUT_SEL1, 0x40005201\r
-.set CYREG_PRT0_OE_SEL0, 0x40005202\r
-.set CYREG_PRT0_OE_SEL1, 0x40005203\r
-.set CYREG_PRT0_DBL_SYNC_IN, 0x40005204\r
-.set CYREG_PRT0_SYNC_OUT, 0x40005205\r
-.set CYREG_PRT0_CAPS_SEL, 0x40005206\r
-.set CYDEV_PRTDSI_PRT1_BASE, 0x40005208\r
-.set CYDEV_PRTDSI_PRT1_SIZE, 0x00000007\r
-.set CYREG_PRT1_OUT_SEL0, 0x40005208\r
-.set CYREG_PRT1_OUT_SEL1, 0x40005209\r
-.set CYREG_PRT1_OE_SEL0, 0x4000520a\r
-.set CYREG_PRT1_OE_SEL1, 0x4000520b\r
-.set CYREG_PRT1_DBL_SYNC_IN, 0x4000520c\r
-.set CYREG_PRT1_SYNC_OUT, 0x4000520d\r
-.set CYREG_PRT1_CAPS_SEL, 0x4000520e\r
-.set CYDEV_PRTDSI_PRT2_BASE, 0x40005210\r
-.set CYDEV_PRTDSI_PRT2_SIZE, 0x00000007\r
-.set CYREG_PRT2_OUT_SEL0, 0x40005210\r
-.set CYREG_PRT2_OUT_SEL1, 0x40005211\r
-.set CYREG_PRT2_OE_SEL0, 0x40005212\r
-.set CYREG_PRT2_OE_SEL1, 0x40005213\r
-.set CYREG_PRT2_DBL_SYNC_IN, 0x40005214\r
-.set CYREG_PRT2_SYNC_OUT, 0x40005215\r
-.set CYREG_PRT2_CAPS_SEL, 0x40005216\r
-.set CYDEV_PRTDSI_PRT3_BASE, 0x40005218\r
-.set CYDEV_PRTDSI_PRT3_SIZE, 0x00000007\r
-.set CYREG_PRT3_OUT_SEL0, 0x40005218\r
-.set CYREG_PRT3_OUT_SEL1, 0x40005219\r
-.set CYREG_PRT3_OE_SEL0, 0x4000521a\r
-.set CYREG_PRT3_OE_SEL1, 0x4000521b\r
-.set CYREG_PRT3_DBL_SYNC_IN, 0x4000521c\r
-.set CYREG_PRT3_SYNC_OUT, 0x4000521d\r
-.set CYREG_PRT3_CAPS_SEL, 0x4000521e\r
-.set CYDEV_PRTDSI_PRT4_BASE, 0x40005220\r
-.set CYDEV_PRTDSI_PRT4_SIZE, 0x00000007\r
-.set CYREG_PRT4_OUT_SEL0, 0x40005220\r
-.set CYREG_PRT4_OUT_SEL1, 0x40005221\r
-.set CYREG_PRT4_OE_SEL0, 0x40005222\r
-.set CYREG_PRT4_OE_SEL1, 0x40005223\r
-.set CYREG_PRT4_DBL_SYNC_IN, 0x40005224\r
-.set CYREG_PRT4_SYNC_OUT, 0x40005225\r
-.set CYREG_PRT4_CAPS_SEL, 0x40005226\r
-.set CYDEV_PRTDSI_PRT5_BASE, 0x40005228\r
-.set CYDEV_PRTDSI_PRT5_SIZE, 0x00000007\r
-.set CYREG_PRT5_OUT_SEL0, 0x40005228\r
-.set CYREG_PRT5_OUT_SEL1, 0x40005229\r
-.set CYREG_PRT5_OE_SEL0, 0x4000522a\r
-.set CYREG_PRT5_OE_SEL1, 0x4000522b\r
-.set CYREG_PRT5_DBL_SYNC_IN, 0x4000522c\r
-.set CYREG_PRT5_SYNC_OUT, 0x4000522d\r
-.set CYREG_PRT5_CAPS_SEL, 0x4000522e\r
-.set CYDEV_PRTDSI_PRT6_BASE, 0x40005230\r
-.set CYDEV_PRTDSI_PRT6_SIZE, 0x00000007\r
-.set CYREG_PRT6_OUT_SEL0, 0x40005230\r
-.set CYREG_PRT6_OUT_SEL1, 0x40005231\r
-.set CYREG_PRT6_OE_SEL0, 0x40005232\r
-.set CYREG_PRT6_OE_SEL1, 0x40005233\r
-.set CYREG_PRT6_DBL_SYNC_IN, 0x40005234\r
-.set CYREG_PRT6_SYNC_OUT, 0x40005235\r
-.set CYREG_PRT6_CAPS_SEL, 0x40005236\r
-.set CYDEV_PRTDSI_PRT12_BASE, 0x40005260\r
-.set CYDEV_PRTDSI_PRT12_SIZE, 0x00000006\r
-.set CYREG_PRT12_OUT_SEL0, 0x40005260\r
-.set CYREG_PRT12_OUT_SEL1, 0x40005261\r
-.set CYREG_PRT12_OE_SEL0, 0x40005262\r
-.set CYREG_PRT12_OE_SEL1, 0x40005263\r
-.set CYREG_PRT12_DBL_SYNC_IN, 0x40005264\r
-.set CYREG_PRT12_SYNC_OUT, 0x40005265\r
-.set CYDEV_PRTDSI_PRT15_BASE, 0x40005278\r
-.set CYDEV_PRTDSI_PRT15_SIZE, 0x00000007\r
-.set CYREG_PRT15_OUT_SEL0, 0x40005278\r
-.set CYREG_PRT15_OUT_SEL1, 0x40005279\r
-.set CYREG_PRT15_OE_SEL0, 0x4000527a\r
-.set CYREG_PRT15_OE_SEL1, 0x4000527b\r
-.set CYREG_PRT15_DBL_SYNC_IN, 0x4000527c\r
-.set CYREG_PRT15_SYNC_OUT, 0x4000527d\r
-.set CYREG_PRT15_CAPS_SEL, 0x4000527e\r
-.set CYDEV_EMIF_BASE, 0x40005400\r
-.set CYDEV_EMIF_SIZE, 0x00000007\r
-.set CYREG_EMIF_NO_UDB, 0x40005400\r
-.set CYREG_EMIF_RP_WAIT_STATES, 0x40005401\r
-.set CYREG_EMIF_MEM_DWN, 0x40005402\r
-.set CYREG_EMIF_MEMCLK_DIV, 0x40005403\r
-.set CYREG_EMIF_CLOCK_EN, 0x40005404\r
-.set CYREG_EMIF_EM_TYPE, 0x40005405\r
-.set CYREG_EMIF_WP_WAIT_STATES, 0x40005406\r
-.set CYDEV_ANAIF_BASE, 0x40005800\r
-.set CYDEV_ANAIF_SIZE, 0x000003a9\r
-.set CYDEV_ANAIF_CFG_BASE, 0x40005800\r
-.set CYDEV_ANAIF_CFG_SIZE, 0x0000010f\r
-.set CYDEV_ANAIF_CFG_SC0_BASE, 0x40005800\r
-.set CYDEV_ANAIF_CFG_SC0_SIZE, 0x00000003\r
-.set CYREG_SC0_CR0, 0x40005800\r
-.set CYREG_SC0_CR1, 0x40005801\r
-.set CYREG_SC0_CR2, 0x40005802\r
-.set CYDEV_ANAIF_CFG_SC1_BASE, 0x40005804\r
-.set CYDEV_ANAIF_CFG_SC1_SIZE, 0x00000003\r
-.set CYREG_SC1_CR0, 0x40005804\r
-.set CYREG_SC1_CR1, 0x40005805\r
-.set CYREG_SC1_CR2, 0x40005806\r
-.set CYDEV_ANAIF_CFG_SC2_BASE, 0x40005808\r
-.set CYDEV_ANAIF_CFG_SC2_SIZE, 0x00000003\r
-.set CYREG_SC2_CR0, 0x40005808\r
-.set CYREG_SC2_CR1, 0x40005809\r
-.set CYREG_SC2_CR2, 0x4000580a\r
-.set CYDEV_ANAIF_CFG_SC3_BASE, 0x4000580c\r
-.set CYDEV_ANAIF_CFG_SC3_SIZE, 0x00000003\r
-.set CYREG_SC3_CR0, 0x4000580c\r
-.set CYREG_SC3_CR1, 0x4000580d\r
-.set CYREG_SC3_CR2, 0x4000580e\r
-.set CYDEV_ANAIF_CFG_DAC0_BASE, 0x40005820\r
-.set CYDEV_ANAIF_CFG_DAC0_SIZE, 0x00000003\r
-.set CYREG_DAC0_CR0, 0x40005820\r
-.set CYREG_DAC0_CR1, 0x40005821\r
-.set CYREG_DAC0_TST, 0x40005822\r
-.set CYDEV_ANAIF_CFG_DAC1_BASE, 0x40005824\r
-.set CYDEV_ANAIF_CFG_DAC1_SIZE, 0x00000003\r
-.set CYREG_DAC1_CR0, 0x40005824\r
-.set CYREG_DAC1_CR1, 0x40005825\r
-.set CYREG_DAC1_TST, 0x40005826\r
-.set CYDEV_ANAIF_CFG_DAC2_BASE, 0x40005828\r
-.set CYDEV_ANAIF_CFG_DAC2_SIZE, 0x00000003\r
-.set CYREG_DAC2_CR0, 0x40005828\r
-.set CYREG_DAC2_CR1, 0x40005829\r
-.set CYREG_DAC2_TST, 0x4000582a\r
-.set CYDEV_ANAIF_CFG_DAC3_BASE, 0x4000582c\r
-.set CYDEV_ANAIF_CFG_DAC3_SIZE, 0x00000003\r
-.set CYREG_DAC3_CR0, 0x4000582c\r
-.set CYREG_DAC3_CR1, 0x4000582d\r
-.set CYREG_DAC3_TST, 0x4000582e\r
-.set CYDEV_ANAIF_CFG_CMP0_BASE, 0x40005840\r
-.set CYDEV_ANAIF_CFG_CMP0_SIZE, 0x00000001\r
-.set CYREG_CMP0_CR, 0x40005840\r
-.set CYDEV_ANAIF_CFG_CMP1_BASE, 0x40005841\r
-.set CYDEV_ANAIF_CFG_CMP1_SIZE, 0x00000001\r
-.set CYREG_CMP1_CR, 0x40005841\r
-.set CYDEV_ANAIF_CFG_CMP2_BASE, 0x40005842\r
-.set CYDEV_ANAIF_CFG_CMP2_SIZE, 0x00000001\r
-.set CYREG_CMP2_CR, 0x40005842\r
-.set CYDEV_ANAIF_CFG_CMP3_BASE, 0x40005843\r
-.set CYDEV_ANAIF_CFG_CMP3_SIZE, 0x00000001\r
-.set CYREG_CMP3_CR, 0x40005843\r
-.set CYDEV_ANAIF_CFG_LUT0_BASE, 0x40005848\r
-.set CYDEV_ANAIF_CFG_LUT0_SIZE, 0x00000002\r
-.set CYREG_LUT0_CR, 0x40005848\r
-.set CYREG_LUT0_MX, 0x40005849\r
-.set CYDEV_ANAIF_CFG_LUT1_BASE, 0x4000584a\r
-.set CYDEV_ANAIF_CFG_LUT1_SIZE, 0x00000002\r
-.set CYREG_LUT1_CR, 0x4000584a\r
-.set CYREG_LUT1_MX, 0x4000584b\r
-.set CYDEV_ANAIF_CFG_LUT2_BASE, 0x4000584c\r
-.set CYDEV_ANAIF_CFG_LUT2_SIZE, 0x00000002\r
-.set CYREG_LUT2_CR, 0x4000584c\r
-.set CYREG_LUT2_MX, 0x4000584d\r
-.set CYDEV_ANAIF_CFG_LUT3_BASE, 0x4000584e\r
-.set CYDEV_ANAIF_CFG_LUT3_SIZE, 0x00000002\r
-.set CYREG_LUT3_CR, 0x4000584e\r
-.set CYREG_LUT3_MX, 0x4000584f\r
-.set CYDEV_ANAIF_CFG_OPAMP0_BASE, 0x40005858\r
-.set CYDEV_ANAIF_CFG_OPAMP0_SIZE, 0x00000002\r
-.set CYREG_OPAMP0_CR, 0x40005858\r
-.set CYREG_OPAMP0_RSVD, 0x40005859\r
-.set CYDEV_ANAIF_CFG_OPAMP1_BASE, 0x4000585a\r
-.set CYDEV_ANAIF_CFG_OPAMP1_SIZE, 0x00000002\r
-.set CYREG_OPAMP1_CR, 0x4000585a\r
-.set CYREG_OPAMP1_RSVD, 0x4000585b\r
-.set CYDEV_ANAIF_CFG_OPAMP2_BASE, 0x4000585c\r
-.set CYDEV_ANAIF_CFG_OPAMP2_SIZE, 0x00000002\r
-.set CYREG_OPAMP2_CR, 0x4000585c\r
-.set CYREG_OPAMP2_RSVD, 0x4000585d\r
-.set CYDEV_ANAIF_CFG_OPAMP3_BASE, 0x4000585e\r
-.set CYDEV_ANAIF_CFG_OPAMP3_SIZE, 0x00000002\r
-.set CYREG_OPAMP3_CR, 0x4000585e\r
-.set CYREG_OPAMP3_RSVD, 0x4000585f\r
-.set CYDEV_ANAIF_CFG_LCDDAC_BASE, 0x40005868\r
-.set CYDEV_ANAIF_CFG_LCDDAC_SIZE, 0x00000002\r
-.set CYREG_LCDDAC_CR0, 0x40005868\r
-.set CYREG_LCDDAC_CR1, 0x40005869\r
-.set CYDEV_ANAIF_CFG_LCDDRV_BASE, 0x4000586a\r
-.set CYDEV_ANAIF_CFG_LCDDRV_SIZE, 0x00000001\r
-.set CYREG_LCDDRV_CR, 0x4000586a\r
-.set CYDEV_ANAIF_CFG_LCDTMR_BASE, 0x4000586b\r
-.set CYDEV_ANAIF_CFG_LCDTMR_SIZE, 0x00000001\r
-.set CYREG_LCDTMR_CFG, 0x4000586b\r
-.set CYDEV_ANAIF_CFG_BG_BASE, 0x4000586c\r
-.set CYDEV_ANAIF_CFG_BG_SIZE, 0x00000004\r
-.set CYREG_BG_CR0, 0x4000586c\r
-.set CYREG_BG_RSVD, 0x4000586d\r
-.set CYREG_BG_DFT0, 0x4000586e\r
-.set CYREG_BG_DFT1, 0x4000586f\r
-.set CYDEV_ANAIF_CFG_CAPSL_BASE, 0x40005870\r
-.set CYDEV_ANAIF_CFG_CAPSL_SIZE, 0x00000002\r
-.set CYREG_CAPSL_CFG0, 0x40005870\r
-.set CYREG_CAPSL_CFG1, 0x40005871\r
-.set CYDEV_ANAIF_CFG_CAPSR_BASE, 0x40005872\r
-.set CYDEV_ANAIF_CFG_CAPSR_SIZE, 0x00000002\r
-.set CYREG_CAPSR_CFG0, 0x40005872\r
-.set CYREG_CAPSR_CFG1, 0x40005873\r
-.set CYDEV_ANAIF_CFG_PUMP_BASE, 0x40005876\r
-.set CYDEV_ANAIF_CFG_PUMP_SIZE, 0x00000002\r
-.set CYREG_PUMP_CR0, 0x40005876\r
-.set CYREG_PUMP_CR1, 0x40005877\r
-.set CYDEV_ANAIF_CFG_LPF0_BASE, 0x40005878\r
-.set CYDEV_ANAIF_CFG_LPF0_SIZE, 0x00000002\r
-.set CYREG_LPF0_CR0, 0x40005878\r
-.set CYREG_LPF0_RSVD, 0x40005879\r
-.set CYDEV_ANAIF_CFG_LPF1_BASE, 0x4000587a\r
-.set CYDEV_ANAIF_CFG_LPF1_SIZE, 0x00000002\r
-.set CYREG_LPF1_CR0, 0x4000587a\r
-.set CYREG_LPF1_RSVD, 0x4000587b\r
-.set CYDEV_ANAIF_CFG_MISC_BASE, 0x4000587c\r
-.set CYDEV_ANAIF_CFG_MISC_SIZE, 0x00000001\r
-.set CYREG_ANAIF_CFG_MISC_CR0, 0x4000587c\r
-.set CYDEV_ANAIF_CFG_DSM0_BASE, 0x40005880\r
-.set CYDEV_ANAIF_CFG_DSM0_SIZE, 0x00000020\r
-.set CYREG_DSM0_CR0, 0x40005880\r
-.set CYREG_DSM0_CR1, 0x40005881\r
-.set CYREG_DSM0_CR2, 0x40005882\r
-.set CYREG_DSM0_CR3, 0x40005883\r
-.set CYREG_DSM0_CR4, 0x40005884\r
-.set CYREG_DSM0_CR5, 0x40005885\r
-.set CYREG_DSM0_CR6, 0x40005886\r
-.set CYREG_DSM0_CR7, 0x40005887\r
-.set CYREG_DSM0_CR8, 0x40005888\r
-.set CYREG_DSM0_CR9, 0x40005889\r
-.set CYREG_DSM0_CR10, 0x4000588a\r
-.set CYREG_DSM0_CR11, 0x4000588b\r
-.set CYREG_DSM0_CR12, 0x4000588c\r
-.set CYREG_DSM0_CR13, 0x4000588d\r
-.set CYREG_DSM0_CR14, 0x4000588e\r
-.set CYREG_DSM0_CR15, 0x4000588f\r
-.set CYREG_DSM0_CR16, 0x40005890\r
-.set CYREG_DSM0_CR17, 0x40005891\r
-.set CYREG_DSM0_REF0, 0x40005892\r
-.set CYREG_DSM0_REF1, 0x40005893\r
-.set CYREG_DSM0_REF2, 0x40005894\r
-.set CYREG_DSM0_REF3, 0x40005895\r
-.set CYREG_DSM0_DEM0, 0x40005896\r
-.set CYREG_DSM0_DEM1, 0x40005897\r
-.set CYREG_DSM0_TST0, 0x40005898\r
-.set CYREG_DSM0_TST1, 0x40005899\r
-.set CYREG_DSM0_BUF0, 0x4000589a\r
-.set CYREG_DSM0_BUF1, 0x4000589b\r
-.set CYREG_DSM0_BUF2, 0x4000589c\r
-.set CYREG_DSM0_BUF3, 0x4000589d\r
-.set CYREG_DSM0_MISC, 0x4000589e\r
-.set CYREG_DSM0_RSVD1, 0x4000589f\r
-.set CYDEV_ANAIF_CFG_SAR0_BASE, 0x40005900\r
-.set CYDEV_ANAIF_CFG_SAR0_SIZE, 0x00000007\r
-.set CYREG_SAR0_CSR0, 0x40005900\r
-.set CYREG_SAR0_CSR1, 0x40005901\r
-.set CYREG_SAR0_CSR2, 0x40005902\r
-.set CYREG_SAR0_CSR3, 0x40005903\r
-.set CYREG_SAR0_CSR4, 0x40005904\r
-.set CYREG_SAR0_CSR5, 0x40005905\r
-.set CYREG_SAR0_CSR6, 0x40005906\r
-.set CYDEV_ANAIF_CFG_SAR1_BASE, 0x40005908\r
-.set CYDEV_ANAIF_CFG_SAR1_SIZE, 0x00000007\r
-.set CYREG_SAR1_CSR0, 0x40005908\r
-.set CYREG_SAR1_CSR1, 0x40005909\r
-.set CYREG_SAR1_CSR2, 0x4000590a\r
-.set CYREG_SAR1_CSR3, 0x4000590b\r
-.set CYREG_SAR1_CSR4, 0x4000590c\r
-.set CYREG_SAR1_CSR5, 0x4000590d\r
-.set CYREG_SAR1_CSR6, 0x4000590e\r
-.set CYDEV_ANAIF_RT_BASE, 0x40005a00\r
-.set CYDEV_ANAIF_RT_SIZE, 0x00000162\r
-.set CYDEV_ANAIF_RT_SC0_BASE, 0x40005a00\r
-.set CYDEV_ANAIF_RT_SC0_SIZE, 0x0000000d\r
-.set CYREG_SC0_SW0, 0x40005a00\r
-.set CYREG_SC0_SW2, 0x40005a02\r
-.set CYREG_SC0_SW3, 0x40005a03\r
-.set CYREG_SC0_SW4, 0x40005a04\r
-.set CYREG_SC0_SW6, 0x40005a06\r
-.set CYREG_SC0_SW7, 0x40005a07\r
-.set CYREG_SC0_SW8, 0x40005a08\r
-.set CYREG_SC0_SW10, 0x40005a0a\r
-.set CYREG_SC0_CLK, 0x40005a0b\r
-.set CYREG_SC0_BST, 0x40005a0c\r
-.set CYDEV_ANAIF_RT_SC1_BASE, 0x40005a10\r
-.set CYDEV_ANAIF_RT_SC1_SIZE, 0x0000000d\r
-.set CYREG_SC1_SW0, 0x40005a10\r
-.set CYREG_SC1_SW2, 0x40005a12\r
-.set CYREG_SC1_SW3, 0x40005a13\r
-.set CYREG_SC1_SW4, 0x40005a14\r
-.set CYREG_SC1_SW6, 0x40005a16\r
-.set CYREG_SC1_SW7, 0x40005a17\r
-.set CYREG_SC1_SW8, 0x40005a18\r
-.set CYREG_SC1_SW10, 0x40005a1a\r
-.set CYREG_SC1_CLK, 0x40005a1b\r
-.set CYREG_SC1_BST, 0x40005a1c\r
-.set CYDEV_ANAIF_RT_SC2_BASE, 0x40005a20\r
-.set CYDEV_ANAIF_RT_SC2_SIZE, 0x0000000d\r
-.set CYREG_SC2_SW0, 0x40005a20\r
-.set CYREG_SC2_SW2, 0x40005a22\r
-.set CYREG_SC2_SW3, 0x40005a23\r
-.set CYREG_SC2_SW4, 0x40005a24\r
-.set CYREG_SC2_SW6, 0x40005a26\r
-.set CYREG_SC2_SW7, 0x40005a27\r
-.set CYREG_SC2_SW8, 0x40005a28\r
-.set CYREG_SC2_SW10, 0x40005a2a\r
-.set CYREG_SC2_CLK, 0x40005a2b\r
-.set CYREG_SC2_BST, 0x40005a2c\r
-.set CYDEV_ANAIF_RT_SC3_BASE, 0x40005a30\r
-.set CYDEV_ANAIF_RT_SC3_SIZE, 0x0000000d\r
-.set CYREG_SC3_SW0, 0x40005a30\r
-.set CYREG_SC3_SW2, 0x40005a32\r
-.set CYREG_SC3_SW3, 0x40005a33\r
-.set CYREG_SC3_SW4, 0x40005a34\r
-.set CYREG_SC3_SW6, 0x40005a36\r
-.set CYREG_SC3_SW7, 0x40005a37\r
-.set CYREG_SC3_SW8, 0x40005a38\r
-.set CYREG_SC3_SW10, 0x40005a3a\r
-.set CYREG_SC3_CLK, 0x40005a3b\r
-.set CYREG_SC3_BST, 0x40005a3c\r
-.set CYDEV_ANAIF_RT_DAC0_BASE, 0x40005a80\r
-.set CYDEV_ANAIF_RT_DAC0_SIZE, 0x00000008\r
-.set CYREG_DAC0_SW0, 0x40005a80\r
-.set CYREG_DAC0_SW2, 0x40005a82\r
-.set CYREG_DAC0_SW3, 0x40005a83\r
-.set CYREG_DAC0_SW4, 0x40005a84\r
-.set CYREG_DAC0_STROBE, 0x40005a87\r
-.set CYDEV_ANAIF_RT_DAC1_BASE, 0x40005a88\r
-.set CYDEV_ANAIF_RT_DAC1_SIZE, 0x00000008\r
-.set CYREG_DAC1_SW0, 0x40005a88\r
-.set CYREG_DAC1_SW2, 0x40005a8a\r
-.set CYREG_DAC1_SW3, 0x40005a8b\r
-.set CYREG_DAC1_SW4, 0x40005a8c\r
-.set CYREG_DAC1_STROBE, 0x40005a8f\r
-.set CYDEV_ANAIF_RT_DAC2_BASE, 0x40005a90\r
-.set CYDEV_ANAIF_RT_DAC2_SIZE, 0x00000008\r
-.set CYREG_DAC2_SW0, 0x40005a90\r
-.set CYREG_DAC2_SW2, 0x40005a92\r
-.set CYREG_DAC2_SW3, 0x40005a93\r
-.set CYREG_DAC2_SW4, 0x40005a94\r
-.set CYREG_DAC2_STROBE, 0x40005a97\r
-.set CYDEV_ANAIF_RT_DAC3_BASE, 0x40005a98\r
-.set CYDEV_ANAIF_RT_DAC3_SIZE, 0x00000008\r
-.set CYREG_DAC3_SW0, 0x40005a98\r
-.set CYREG_DAC3_SW2, 0x40005a9a\r
-.set CYREG_DAC3_SW3, 0x40005a9b\r
-.set CYREG_DAC3_SW4, 0x40005a9c\r
-.set CYREG_DAC3_STROBE, 0x40005a9f\r
-.set CYDEV_ANAIF_RT_CMP0_BASE, 0x40005ac0\r
-.set CYDEV_ANAIF_RT_CMP0_SIZE, 0x00000008\r
-.set CYREG_CMP0_SW0, 0x40005ac0\r
-.set CYREG_CMP0_SW2, 0x40005ac2\r
-.set CYREG_CMP0_SW3, 0x40005ac3\r
-.set CYREG_CMP0_SW4, 0x40005ac4\r
-.set CYREG_CMP0_SW6, 0x40005ac6\r
-.set CYREG_CMP0_CLK, 0x40005ac7\r
-.set CYDEV_ANAIF_RT_CMP1_BASE, 0x40005ac8\r
-.set CYDEV_ANAIF_RT_CMP1_SIZE, 0x00000008\r
-.set CYREG_CMP1_SW0, 0x40005ac8\r
-.set CYREG_CMP1_SW2, 0x40005aca\r
-.set CYREG_CMP1_SW3, 0x40005acb\r
-.set CYREG_CMP1_SW4, 0x40005acc\r
-.set CYREG_CMP1_SW6, 0x40005ace\r
-.set CYREG_CMP1_CLK, 0x40005acf\r
-.set CYDEV_ANAIF_RT_CMP2_BASE, 0x40005ad0\r
-.set CYDEV_ANAIF_RT_CMP2_SIZE, 0x00000008\r
-.set CYREG_CMP2_SW0, 0x40005ad0\r
-.set CYREG_CMP2_SW2, 0x40005ad2\r
-.set CYREG_CMP2_SW3, 0x40005ad3\r
-.set CYREG_CMP2_SW4, 0x40005ad4\r
-.set CYREG_CMP2_SW6, 0x40005ad6\r
-.set CYREG_CMP2_CLK, 0x40005ad7\r
-.set CYDEV_ANAIF_RT_CMP3_BASE, 0x40005ad8\r
-.set CYDEV_ANAIF_RT_CMP3_SIZE, 0x00000008\r
-.set CYREG_CMP3_SW0, 0x40005ad8\r
-.set CYREG_CMP3_SW2, 0x40005ada\r
-.set CYREG_CMP3_SW3, 0x40005adb\r
-.set CYREG_CMP3_SW4, 0x40005adc\r
-.set CYREG_CMP3_SW6, 0x40005ade\r
-.set CYREG_CMP3_CLK, 0x40005adf\r
-.set CYDEV_ANAIF_RT_DSM0_BASE, 0x40005b00\r
-.set CYDEV_ANAIF_RT_DSM0_SIZE, 0x00000008\r
-.set CYREG_DSM0_SW0, 0x40005b00\r
-.set CYREG_DSM0_SW2, 0x40005b02\r
-.set CYREG_DSM0_SW3, 0x40005b03\r
-.set CYREG_DSM0_SW4, 0x40005b04\r
-.set CYREG_DSM0_SW6, 0x40005b06\r
-.set CYREG_DSM0_CLK, 0x40005b07\r
-.set CYDEV_ANAIF_RT_SAR0_BASE, 0x40005b20\r
-.set CYDEV_ANAIF_RT_SAR0_SIZE, 0x00000008\r
-.set CYREG_SAR0_SW0, 0x40005b20\r
-.set CYREG_SAR0_SW2, 0x40005b22\r
-.set CYREG_SAR0_SW3, 0x40005b23\r
-.set CYREG_SAR0_SW4, 0x40005b24\r
-.set CYREG_SAR0_SW6, 0x40005b26\r
-.set CYREG_SAR0_CLK, 0x40005b27\r
-.set CYDEV_ANAIF_RT_SAR1_BASE, 0x40005b28\r
-.set CYDEV_ANAIF_RT_SAR1_SIZE, 0x00000008\r
-.set CYREG_SAR1_SW0, 0x40005b28\r
-.set CYREG_SAR1_SW2, 0x40005b2a\r
-.set CYREG_SAR1_SW3, 0x40005b2b\r
-.set CYREG_SAR1_SW4, 0x40005b2c\r
-.set CYREG_SAR1_SW6, 0x40005b2e\r
-.set CYREG_SAR1_CLK, 0x40005b2f\r
-.set CYDEV_ANAIF_RT_OPAMP0_BASE, 0x40005b40\r
-.set CYDEV_ANAIF_RT_OPAMP0_SIZE, 0x00000002\r
-.set CYREG_OPAMP0_MX, 0x40005b40\r
-.set CYREG_OPAMP0_SW, 0x40005b41\r
-.set CYDEV_ANAIF_RT_OPAMP1_BASE, 0x40005b42\r
-.set CYDEV_ANAIF_RT_OPAMP1_SIZE, 0x00000002\r
-.set CYREG_OPAMP1_MX, 0x40005b42\r
-.set CYREG_OPAMP1_SW, 0x40005b43\r
-.set CYDEV_ANAIF_RT_OPAMP2_BASE, 0x40005b44\r
-.set CYDEV_ANAIF_RT_OPAMP2_SIZE, 0x00000002\r
-.set CYREG_OPAMP2_MX, 0x40005b44\r
-.set CYREG_OPAMP2_SW, 0x40005b45\r
-.set CYDEV_ANAIF_RT_OPAMP3_BASE, 0x40005b46\r
-.set CYDEV_ANAIF_RT_OPAMP3_SIZE, 0x00000002\r
-.set CYREG_OPAMP3_MX, 0x40005b46\r
-.set CYREG_OPAMP3_SW, 0x40005b47\r
-.set CYDEV_ANAIF_RT_LCDDAC_BASE, 0x40005b50\r
-.set CYDEV_ANAIF_RT_LCDDAC_SIZE, 0x00000005\r
-.set CYREG_LCDDAC_SW0, 0x40005b50\r
-.set CYREG_LCDDAC_SW1, 0x40005b51\r
-.set CYREG_LCDDAC_SW2, 0x40005b52\r
-.set CYREG_LCDDAC_SW3, 0x40005b53\r
-.set CYREG_LCDDAC_SW4, 0x40005b54\r
-.set CYDEV_ANAIF_RT_SC_BASE, 0x40005b56\r
-.set CYDEV_ANAIF_RT_SC_SIZE, 0x00000001\r
-.set CYREG_SC_MISC, 0x40005b56\r
-.set CYDEV_ANAIF_RT_BUS_BASE, 0x40005b58\r
-.set CYDEV_ANAIF_RT_BUS_SIZE, 0x00000004\r
-.set CYREG_BUS_SW0, 0x40005b58\r
-.set CYREG_BUS_SW2, 0x40005b5a\r
-.set CYREG_BUS_SW3, 0x40005b5b\r
-.set CYDEV_ANAIF_RT_DFT_BASE, 0x40005b5c\r
-.set CYDEV_ANAIF_RT_DFT_SIZE, 0x00000006\r
-.set CYREG_DFT_CR0, 0x40005b5c\r
-.set CYREG_DFT_CR1, 0x40005b5d\r
-.set CYREG_DFT_CR2, 0x40005b5e\r
-.set CYREG_DFT_CR3, 0x40005b5f\r
-.set CYREG_DFT_CR4, 0x40005b60\r
-.set CYREG_DFT_CR5, 0x40005b61\r
-.set CYDEV_ANAIF_WRK_BASE, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_SIZE, 0x00000029\r
-.set CYDEV_ANAIF_WRK_DAC0_BASE, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_DAC0_SIZE, 0x00000001\r
-.set CYREG_DAC0_D, 0x40005b80\r
-.set CYDEV_ANAIF_WRK_DAC1_BASE, 0x40005b81\r
-.set CYDEV_ANAIF_WRK_DAC1_SIZE, 0x00000001\r
-.set CYREG_DAC1_D, 0x40005b81\r
-.set CYDEV_ANAIF_WRK_DAC2_BASE, 0x40005b82\r
-.set CYDEV_ANAIF_WRK_DAC2_SIZE, 0x00000001\r
-.set CYREG_DAC2_D, 0x40005b82\r
-.set CYDEV_ANAIF_WRK_DAC3_BASE, 0x40005b83\r
-.set CYDEV_ANAIF_WRK_DAC3_SIZE, 0x00000001\r
-.set CYREG_DAC3_D, 0x40005b83\r
-.set CYDEV_ANAIF_WRK_DSM0_BASE, 0x40005b88\r
-.set CYDEV_ANAIF_WRK_DSM0_SIZE, 0x00000002\r
-.set CYREG_DSM0_OUT0, 0x40005b88\r
-.set CYREG_DSM0_OUT1, 0x40005b89\r
-.set CYDEV_ANAIF_WRK_LUT_BASE, 0x40005b90\r
-.set CYDEV_ANAIF_WRK_LUT_SIZE, 0x00000005\r
-.set CYREG_LUT_SR, 0x40005b90\r
-.set CYREG_LUT_WRK1, 0x40005b91\r
-.set CYREG_LUT_MSK, 0x40005b92\r
-.set CYREG_LUT_CLK, 0x40005b93\r
-.set CYREG_LUT_CPTR, 0x40005b94\r
-.set CYDEV_ANAIF_WRK_CMP_BASE, 0x40005b96\r
-.set CYDEV_ANAIF_WRK_CMP_SIZE, 0x00000002\r
-.set CYREG_CMP_WRK, 0x40005b96\r
-.set CYREG_CMP_TST, 0x40005b97\r
-.set CYDEV_ANAIF_WRK_SC_BASE, 0x40005b98\r
-.set CYDEV_ANAIF_WRK_SC_SIZE, 0x00000005\r
-.set CYREG_SC_SR, 0x40005b98\r
-.set CYREG_SC_WRK1, 0x40005b99\r
-.set CYREG_SC_MSK, 0x40005b9a\r
-.set CYREG_SC_CMPINV, 0x40005b9b\r
-.set CYREG_SC_CPTR, 0x40005b9c\r
-.set CYDEV_ANAIF_WRK_SAR0_BASE, 0x40005ba0\r
-.set CYDEV_ANAIF_WRK_SAR0_SIZE, 0x00000002\r
-.set CYREG_SAR0_WRK0, 0x40005ba0\r
-.set CYREG_SAR0_WRK1, 0x40005ba1\r
-.set CYDEV_ANAIF_WRK_SAR1_BASE, 0x40005ba2\r
-.set CYDEV_ANAIF_WRK_SAR1_SIZE, 0x00000002\r
-.set CYREG_SAR1_WRK0, 0x40005ba2\r
-.set CYREG_SAR1_WRK1, 0x40005ba3\r
-.set CYDEV_ANAIF_WRK_SARS_BASE, 0x40005ba8\r
-.set CYDEV_ANAIF_WRK_SARS_SIZE, 0x00000001\r
-.set CYREG_ANAIF_WRK_SARS_SOF, 0x40005ba8\r
-.set CYDEV_USB_BASE, 0x40006000\r
-.set CYDEV_USB_SIZE, 0x00000300\r
-.set CYREG_USB_EP0_DR0, 0x40006000\r
-.set CYREG_USB_EP0_DR1, 0x40006001\r
-.set CYREG_USB_EP0_DR2, 0x40006002\r
-.set CYREG_USB_EP0_DR3, 0x40006003\r
-.set CYREG_USB_EP0_DR4, 0x40006004\r
-.set CYREG_USB_EP0_DR5, 0x40006005\r
-.set CYREG_USB_EP0_DR6, 0x40006006\r
-.set CYREG_USB_EP0_DR7, 0x40006007\r
-.set CYREG_USB_CR0, 0x40006008\r
-.set CYREG_USB_CR1, 0x40006009\r
-.set CYREG_USB_SIE_EP_INT_EN, 0x4000600a\r
-.set CYREG_USB_SIE_EP_INT_SR, 0x4000600b\r
-.set CYDEV_USB_SIE_EP1_BASE, 0x4000600c\r
-.set CYDEV_USB_SIE_EP1_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP1_CNT0, 0x4000600c\r
-.set CYREG_USB_SIE_EP1_CNT1, 0x4000600d\r
-.set CYREG_USB_SIE_EP1_CR0, 0x4000600e\r
-.set CYREG_USB_USBIO_CR0, 0x40006010\r
-.set CYREG_USB_USBIO_CR1, 0x40006012\r
-.set CYREG_USB_DYN_RECONFIG, 0x40006014\r
-.set CYREG_USB_SOF0, 0x40006018\r
-.set CYREG_USB_SOF1, 0x40006019\r
-.set CYDEV_USB_SIE_EP2_BASE, 0x4000601c\r
-.set CYDEV_USB_SIE_EP2_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP2_CNT0, 0x4000601c\r
-.set CYREG_USB_SIE_EP2_CNT1, 0x4000601d\r
-.set CYREG_USB_SIE_EP2_CR0, 0x4000601e\r
-.set CYREG_USB_EP0_CR, 0x40006028\r
-.set CYREG_USB_EP0_CNT, 0x40006029\r
-.set CYDEV_USB_SIE_EP3_BASE, 0x4000602c\r
-.set CYDEV_USB_SIE_EP3_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP3_CNT0, 0x4000602c\r
-.set CYREG_USB_SIE_EP3_CNT1, 0x4000602d\r
-.set CYREG_USB_SIE_EP3_CR0, 0x4000602e\r
-.set CYDEV_USB_SIE_EP4_BASE, 0x4000603c\r
-.set CYDEV_USB_SIE_EP4_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP4_CNT0, 0x4000603c\r
-.set CYREG_USB_SIE_EP4_CNT1, 0x4000603d\r
-.set CYREG_USB_SIE_EP4_CR0, 0x4000603e\r
-.set CYDEV_USB_SIE_EP5_BASE, 0x4000604c\r
-.set CYDEV_USB_SIE_EP5_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP5_CNT0, 0x4000604c\r
-.set CYREG_USB_SIE_EP5_CNT1, 0x4000604d\r
-.set CYREG_USB_SIE_EP5_CR0, 0x4000604e\r
-.set CYDEV_USB_SIE_EP6_BASE, 0x4000605c\r
-.set CYDEV_USB_SIE_EP6_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP6_CNT0, 0x4000605c\r
-.set CYREG_USB_SIE_EP6_CNT1, 0x4000605d\r
-.set CYREG_USB_SIE_EP6_CR0, 0x4000605e\r
-.set CYDEV_USB_SIE_EP7_BASE, 0x4000606c\r
-.set CYDEV_USB_SIE_EP7_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP7_CNT0, 0x4000606c\r
-.set CYREG_USB_SIE_EP7_CNT1, 0x4000606d\r
-.set CYREG_USB_SIE_EP7_CR0, 0x4000606e\r
-.set CYDEV_USB_SIE_EP8_BASE, 0x4000607c\r
-.set CYDEV_USB_SIE_EP8_SIZE, 0x00000003\r
-.set CYREG_USB_SIE_EP8_CNT0, 0x4000607c\r
-.set CYREG_USB_SIE_EP8_CNT1, 0x4000607d\r
-.set CYREG_USB_SIE_EP8_CR0, 0x4000607e\r
-.set CYDEV_USB_ARB_EP1_BASE, 0x40006080\r
-.set CYDEV_USB_ARB_EP1_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP1_CFG, 0x40006080\r
-.set CYREG_USB_ARB_EP1_INT_EN, 0x40006081\r
-.set CYREG_USB_ARB_EP1_SR, 0x40006082\r
-.set CYDEV_USB_ARB_RW1_BASE, 0x40006084\r
-.set CYDEV_USB_ARB_RW1_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW1_WA, 0x40006084\r
-.set CYREG_USB_ARB_RW1_WA_MSB, 0x40006085\r
-.set CYREG_USB_ARB_RW1_RA, 0x40006086\r
-.set CYREG_USB_ARB_RW1_RA_MSB, 0x40006087\r
-.set CYREG_USB_ARB_RW1_DR, 0x40006088\r
-.set CYREG_USB_BUF_SIZE, 0x4000608c\r
-.set CYREG_USB_EP_ACTIVE, 0x4000608e\r
-.set CYREG_USB_EP_TYPE, 0x4000608f\r
-.set CYDEV_USB_ARB_EP2_BASE, 0x40006090\r
-.set CYDEV_USB_ARB_EP2_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP2_CFG, 0x40006090\r
-.set CYREG_USB_ARB_EP2_INT_EN, 0x40006091\r
-.set CYREG_USB_ARB_EP2_SR, 0x40006092\r
-.set CYDEV_USB_ARB_RW2_BASE, 0x40006094\r
-.set CYDEV_USB_ARB_RW2_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW2_WA, 0x40006094\r
-.set CYREG_USB_ARB_RW2_WA_MSB, 0x40006095\r
-.set CYREG_USB_ARB_RW2_RA, 0x40006096\r
-.set CYREG_USB_ARB_RW2_RA_MSB, 0x40006097\r
-.set CYREG_USB_ARB_RW2_DR, 0x40006098\r
-.set CYREG_USB_ARB_CFG, 0x4000609c\r
-.set CYREG_USB_USB_CLK_EN, 0x4000609d\r
-.set CYREG_USB_ARB_INT_EN, 0x4000609e\r
-.set CYREG_USB_ARB_INT_SR, 0x4000609f\r
-.set CYDEV_USB_ARB_EP3_BASE, 0x400060a0\r
-.set CYDEV_USB_ARB_EP3_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP3_CFG, 0x400060a0\r
-.set CYREG_USB_ARB_EP3_INT_EN, 0x400060a1\r
-.set CYREG_USB_ARB_EP3_SR, 0x400060a2\r
-.set CYDEV_USB_ARB_RW3_BASE, 0x400060a4\r
-.set CYDEV_USB_ARB_RW3_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW3_WA, 0x400060a4\r
-.set CYREG_USB_ARB_RW3_WA_MSB, 0x400060a5\r
-.set CYREG_USB_ARB_RW3_RA, 0x400060a6\r
-.set CYREG_USB_ARB_RW3_RA_MSB, 0x400060a7\r
-.set CYREG_USB_ARB_RW3_DR, 0x400060a8\r
-.set CYREG_USB_CWA, 0x400060ac\r
-.set CYREG_USB_CWA_MSB, 0x400060ad\r
-.set CYDEV_USB_ARB_EP4_BASE, 0x400060b0\r
-.set CYDEV_USB_ARB_EP4_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP4_CFG, 0x400060b0\r
-.set CYREG_USB_ARB_EP4_INT_EN, 0x400060b1\r
-.set CYREG_USB_ARB_EP4_SR, 0x400060b2\r
-.set CYDEV_USB_ARB_RW4_BASE, 0x400060b4\r
-.set CYDEV_USB_ARB_RW4_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW4_WA, 0x400060b4\r
-.set CYREG_USB_ARB_RW4_WA_MSB, 0x400060b5\r
-.set CYREG_USB_ARB_RW4_RA, 0x400060b6\r
-.set CYREG_USB_ARB_RW4_RA_MSB, 0x400060b7\r
-.set CYREG_USB_ARB_RW4_DR, 0x400060b8\r
-.set CYREG_USB_DMA_THRES, 0x400060bc\r
-.set CYREG_USB_DMA_THRES_MSB, 0x400060bd\r
-.set CYDEV_USB_ARB_EP5_BASE, 0x400060c0\r
-.set CYDEV_USB_ARB_EP5_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP5_CFG, 0x400060c0\r
-.set CYREG_USB_ARB_EP5_INT_EN, 0x400060c1\r
-.set CYREG_USB_ARB_EP5_SR, 0x400060c2\r
-.set CYDEV_USB_ARB_RW5_BASE, 0x400060c4\r
-.set CYDEV_USB_ARB_RW5_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW5_WA, 0x400060c4\r
-.set CYREG_USB_ARB_RW5_WA_MSB, 0x400060c5\r
-.set CYREG_USB_ARB_RW5_RA, 0x400060c6\r
-.set CYREG_USB_ARB_RW5_RA_MSB, 0x400060c7\r
-.set CYREG_USB_ARB_RW5_DR, 0x400060c8\r
-.set CYREG_USB_BUS_RST_CNT, 0x400060cc\r
-.set CYDEV_USB_ARB_EP6_BASE, 0x400060d0\r
-.set CYDEV_USB_ARB_EP6_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP6_CFG, 0x400060d0\r
-.set CYREG_USB_ARB_EP6_INT_EN, 0x400060d1\r
-.set CYREG_USB_ARB_EP6_SR, 0x400060d2\r
-.set CYDEV_USB_ARB_RW6_BASE, 0x400060d4\r
-.set CYDEV_USB_ARB_RW6_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW6_WA, 0x400060d4\r
-.set CYREG_USB_ARB_RW6_WA_MSB, 0x400060d5\r
-.set CYREG_USB_ARB_RW6_RA, 0x400060d6\r
-.set CYREG_USB_ARB_RW6_RA_MSB, 0x400060d7\r
-.set CYREG_USB_ARB_RW6_DR, 0x400060d8\r
-.set CYDEV_USB_ARB_EP7_BASE, 0x400060e0\r
-.set CYDEV_USB_ARB_EP7_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP7_CFG, 0x400060e0\r
-.set CYREG_USB_ARB_EP7_INT_EN, 0x400060e1\r
-.set CYREG_USB_ARB_EP7_SR, 0x400060e2\r
-.set CYDEV_USB_ARB_RW7_BASE, 0x400060e4\r
-.set CYDEV_USB_ARB_RW7_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW7_WA, 0x400060e4\r
-.set CYREG_USB_ARB_RW7_WA_MSB, 0x400060e5\r
-.set CYREG_USB_ARB_RW7_RA, 0x400060e6\r
-.set CYREG_USB_ARB_RW7_RA_MSB, 0x400060e7\r
-.set CYREG_USB_ARB_RW7_DR, 0x400060e8\r
-.set CYDEV_USB_ARB_EP8_BASE, 0x400060f0\r
-.set CYDEV_USB_ARB_EP8_SIZE, 0x00000003\r
-.set CYREG_USB_ARB_EP8_CFG, 0x400060f0\r
-.set CYREG_USB_ARB_EP8_INT_EN, 0x400060f1\r
-.set CYREG_USB_ARB_EP8_SR, 0x400060f2\r
-.set CYDEV_USB_ARB_RW8_BASE, 0x400060f4\r
-.set CYDEV_USB_ARB_RW8_SIZE, 0x00000005\r
-.set CYREG_USB_ARB_RW8_WA, 0x400060f4\r
-.set CYREG_USB_ARB_RW8_WA_MSB, 0x400060f5\r
-.set CYREG_USB_ARB_RW8_RA, 0x400060f6\r
-.set CYREG_USB_ARB_RW8_RA_MSB, 0x400060f7\r
-.set CYREG_USB_ARB_RW8_DR, 0x400060f8\r
-.set CYDEV_USB_MEM_BASE, 0x40006100\r
-.set CYDEV_USB_MEM_SIZE, 0x00000200\r
-.set CYREG_USB_MEM_DATA_MBASE, 0x40006100\r
-.set CYREG_USB_MEM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_UWRK_BASE, 0x40006400\r
-.set CYDEV_UWRK_SIZE, 0x00000b60\r
-.set CYDEV_UWRK_UWRK8_BASE, 0x40006400\r
-.set CYDEV_UWRK_UWRK8_SIZE, 0x000003b0\r
-.set CYDEV_UWRK_UWRK8_B0_BASE, 0x40006400\r
-.set CYDEV_UWRK_UWRK8_B0_SIZE, 0x000000b0\r
-.set CYREG_B0_UDB00_A0, 0x40006400\r
-.set CYREG_B0_UDB01_A0, 0x40006401\r
-.set CYREG_B0_UDB02_A0, 0x40006402\r
-.set CYREG_B0_UDB03_A0, 0x40006403\r
-.set CYREG_B0_UDB04_A0, 0x40006404\r
-.set CYREG_B0_UDB05_A0, 0x40006405\r
-.set CYREG_B0_UDB06_A0, 0x40006406\r
-.set CYREG_B0_UDB07_A0, 0x40006407\r
-.set CYREG_B0_UDB08_A0, 0x40006408\r
-.set CYREG_B0_UDB09_A0, 0x40006409\r
-.set CYREG_B0_UDB10_A0, 0x4000640a\r
-.set CYREG_B0_UDB11_A0, 0x4000640b\r
-.set CYREG_B0_UDB12_A0, 0x4000640c\r
-.set CYREG_B0_UDB13_A0, 0x4000640d\r
-.set CYREG_B0_UDB14_A0, 0x4000640e\r
-.set CYREG_B0_UDB15_A0, 0x4000640f\r
-.set CYREG_B0_UDB00_A1, 0x40006410\r
-.set CYREG_B0_UDB01_A1, 0x40006411\r
-.set CYREG_B0_UDB02_A1, 0x40006412\r
-.set CYREG_B0_UDB03_A1, 0x40006413\r
-.set CYREG_B0_UDB04_A1, 0x40006414\r
-.set CYREG_B0_UDB05_A1, 0x40006415\r
-.set CYREG_B0_UDB06_A1, 0x40006416\r
-.set CYREG_B0_UDB07_A1, 0x40006417\r
-.set CYREG_B0_UDB08_A1, 0x40006418\r
-.set CYREG_B0_UDB09_A1, 0x40006419\r
-.set CYREG_B0_UDB10_A1, 0x4000641a\r
-.set CYREG_B0_UDB11_A1, 0x4000641b\r
-.set CYREG_B0_UDB12_A1, 0x4000641c\r
-.set CYREG_B0_UDB13_A1, 0x4000641d\r
-.set CYREG_B0_UDB14_A1, 0x4000641e\r
-.set CYREG_B0_UDB15_A1, 0x4000641f\r
-.set CYREG_B0_UDB00_D0, 0x40006420\r
-.set CYREG_B0_UDB01_D0, 0x40006421\r
-.set CYREG_B0_UDB02_D0, 0x40006422\r
-.set CYREG_B0_UDB03_D0, 0x40006423\r
-.set CYREG_B0_UDB04_D0, 0x40006424\r
-.set CYREG_B0_UDB05_D0, 0x40006425\r
-.set CYREG_B0_UDB06_D0, 0x40006426\r
-.set CYREG_B0_UDB07_D0, 0x40006427\r
-.set CYREG_B0_UDB08_D0, 0x40006428\r
-.set CYREG_B0_UDB09_D0, 0x40006429\r
-.set CYREG_B0_UDB10_D0, 0x4000642a\r
-.set CYREG_B0_UDB11_D0, 0x4000642b\r
-.set CYREG_B0_UDB12_D0, 0x4000642c\r
-.set CYREG_B0_UDB13_D0, 0x4000642d\r
-.set CYREG_B0_UDB14_D0, 0x4000642e\r
-.set CYREG_B0_UDB15_D0, 0x4000642f\r
-.set CYREG_B0_UDB00_D1, 0x40006430\r
-.set CYREG_B0_UDB01_D1, 0x40006431\r
-.set CYREG_B0_UDB02_D1, 0x40006432\r
-.set CYREG_B0_UDB03_D1, 0x40006433\r
-.set CYREG_B0_UDB04_D1, 0x40006434\r
-.set CYREG_B0_UDB05_D1, 0x40006435\r
-.set CYREG_B0_UDB06_D1, 0x40006436\r
-.set CYREG_B0_UDB07_D1, 0x40006437\r
-.set CYREG_B0_UDB08_D1, 0x40006438\r
-.set CYREG_B0_UDB09_D1, 0x40006439\r
-.set CYREG_B0_UDB10_D1, 0x4000643a\r
-.set CYREG_B0_UDB11_D1, 0x4000643b\r
-.set CYREG_B0_UDB12_D1, 0x4000643c\r
-.set CYREG_B0_UDB13_D1, 0x4000643d\r
-.set CYREG_B0_UDB14_D1, 0x4000643e\r
-.set CYREG_B0_UDB15_D1, 0x4000643f\r
-.set CYREG_B0_UDB00_F0, 0x40006440\r
-.set CYREG_B0_UDB01_F0, 0x40006441\r
-.set CYREG_B0_UDB02_F0, 0x40006442\r
-.set CYREG_B0_UDB03_F0, 0x40006443\r
-.set CYREG_B0_UDB04_F0, 0x40006444\r
-.set CYREG_B0_UDB05_F0, 0x40006445\r
-.set CYREG_B0_UDB06_F0, 0x40006446\r
-.set CYREG_B0_UDB07_F0, 0x40006447\r
-.set CYREG_B0_UDB08_F0, 0x40006448\r
-.set CYREG_B0_UDB09_F0, 0x40006449\r
-.set CYREG_B0_UDB10_F0, 0x4000644a\r
-.set CYREG_B0_UDB11_F0, 0x4000644b\r
-.set CYREG_B0_UDB12_F0, 0x4000644c\r
-.set CYREG_B0_UDB13_F0, 0x4000644d\r
-.set CYREG_B0_UDB14_F0, 0x4000644e\r
-.set CYREG_B0_UDB15_F0, 0x4000644f\r
-.set CYREG_B0_UDB00_F1, 0x40006450\r
-.set CYREG_B0_UDB01_F1, 0x40006451\r
-.set CYREG_B0_UDB02_F1, 0x40006452\r
-.set CYREG_B0_UDB03_F1, 0x40006453\r
-.set CYREG_B0_UDB04_F1, 0x40006454\r
-.set CYREG_B0_UDB05_F1, 0x40006455\r
-.set CYREG_B0_UDB06_F1, 0x40006456\r
-.set CYREG_B0_UDB07_F1, 0x40006457\r
-.set CYREG_B0_UDB08_F1, 0x40006458\r
-.set CYREG_B0_UDB09_F1, 0x40006459\r
-.set CYREG_B0_UDB10_F1, 0x4000645a\r
-.set CYREG_B0_UDB11_F1, 0x4000645b\r
-.set CYREG_B0_UDB12_F1, 0x4000645c\r
-.set CYREG_B0_UDB13_F1, 0x4000645d\r
-.set CYREG_B0_UDB14_F1, 0x4000645e\r
-.set CYREG_B0_UDB15_F1, 0x4000645f\r
-.set CYREG_B0_UDB00_ST, 0x40006460\r
-.set CYREG_B0_UDB01_ST, 0x40006461\r
-.set CYREG_B0_UDB02_ST, 0x40006462\r
-.set CYREG_B0_UDB03_ST, 0x40006463\r
-.set CYREG_B0_UDB04_ST, 0x40006464\r
-.set CYREG_B0_UDB05_ST, 0x40006465\r
-.set CYREG_B0_UDB06_ST, 0x40006466\r
-.set CYREG_B0_UDB07_ST, 0x40006467\r
-.set CYREG_B0_UDB08_ST, 0x40006468\r
-.set CYREG_B0_UDB09_ST, 0x40006469\r
-.set CYREG_B0_UDB10_ST, 0x4000646a\r
-.set CYREG_B0_UDB11_ST, 0x4000646b\r
-.set CYREG_B0_UDB12_ST, 0x4000646c\r
-.set CYREG_B0_UDB13_ST, 0x4000646d\r
-.set CYREG_B0_UDB14_ST, 0x4000646e\r
-.set CYREG_B0_UDB15_ST, 0x4000646f\r
-.set CYREG_B0_UDB00_CTL, 0x40006470\r
-.set CYREG_B0_UDB01_CTL, 0x40006471\r
-.set CYREG_B0_UDB02_CTL, 0x40006472\r
-.set CYREG_B0_UDB03_CTL, 0x40006473\r
-.set CYREG_B0_UDB04_CTL, 0x40006474\r
-.set CYREG_B0_UDB05_CTL, 0x40006475\r
-.set CYREG_B0_UDB06_CTL, 0x40006476\r
-.set CYREG_B0_UDB07_CTL, 0x40006477\r
-.set CYREG_B0_UDB08_CTL, 0x40006478\r
-.set CYREG_B0_UDB09_CTL, 0x40006479\r
-.set CYREG_B0_UDB10_CTL, 0x4000647a\r
-.set CYREG_B0_UDB11_CTL, 0x4000647b\r
-.set CYREG_B0_UDB12_CTL, 0x4000647c\r
-.set CYREG_B0_UDB13_CTL, 0x4000647d\r
-.set CYREG_B0_UDB14_CTL, 0x4000647e\r
-.set CYREG_B0_UDB15_CTL, 0x4000647f\r
-.set CYREG_B0_UDB00_MSK, 0x40006480\r
-.set CYREG_B0_UDB01_MSK, 0x40006481\r
-.set CYREG_B0_UDB02_MSK, 0x40006482\r
-.set CYREG_B0_UDB03_MSK, 0x40006483\r
-.set CYREG_B0_UDB04_MSK, 0x40006484\r
-.set CYREG_B0_UDB05_MSK, 0x40006485\r
-.set CYREG_B0_UDB06_MSK, 0x40006486\r
-.set CYREG_B0_UDB07_MSK, 0x40006487\r
-.set CYREG_B0_UDB08_MSK, 0x40006488\r
-.set CYREG_B0_UDB09_MSK, 0x40006489\r
-.set CYREG_B0_UDB10_MSK, 0x4000648a\r
-.set CYREG_B0_UDB11_MSK, 0x4000648b\r
-.set CYREG_B0_UDB12_MSK, 0x4000648c\r
-.set CYREG_B0_UDB13_MSK, 0x4000648d\r
-.set CYREG_B0_UDB14_MSK, 0x4000648e\r
-.set CYREG_B0_UDB15_MSK, 0x4000648f\r
-.set CYREG_B0_UDB00_ACTL, 0x40006490\r
-.set CYREG_B0_UDB01_ACTL, 0x40006491\r
-.set CYREG_B0_UDB02_ACTL, 0x40006492\r
-.set CYREG_B0_UDB03_ACTL, 0x40006493\r
-.set CYREG_B0_UDB04_ACTL, 0x40006494\r
-.set CYREG_B0_UDB05_ACTL, 0x40006495\r
-.set CYREG_B0_UDB06_ACTL, 0x40006496\r
-.set CYREG_B0_UDB07_ACTL, 0x40006497\r
-.set CYREG_B0_UDB08_ACTL, 0x40006498\r
-.set CYREG_B0_UDB09_ACTL, 0x40006499\r
-.set CYREG_B0_UDB10_ACTL, 0x4000649a\r
-.set CYREG_B0_UDB11_ACTL, 0x4000649b\r
-.set CYREG_B0_UDB12_ACTL, 0x4000649c\r
-.set CYREG_B0_UDB13_ACTL, 0x4000649d\r
-.set CYREG_B0_UDB14_ACTL, 0x4000649e\r
-.set CYREG_B0_UDB15_ACTL, 0x4000649f\r
-.set CYREG_B0_UDB00_MC, 0x400064a0\r
-.set CYREG_B0_UDB01_MC, 0x400064a1\r
-.set CYREG_B0_UDB02_MC, 0x400064a2\r
-.set CYREG_B0_UDB03_MC, 0x400064a3\r
-.set CYREG_B0_UDB04_MC, 0x400064a4\r
-.set CYREG_B0_UDB05_MC, 0x400064a5\r
-.set CYREG_B0_UDB06_MC, 0x400064a6\r
-.set CYREG_B0_UDB07_MC, 0x400064a7\r
-.set CYREG_B0_UDB08_MC, 0x400064a8\r
-.set CYREG_B0_UDB09_MC, 0x400064a9\r
-.set CYREG_B0_UDB10_MC, 0x400064aa\r
-.set CYREG_B0_UDB11_MC, 0x400064ab\r
-.set CYREG_B0_UDB12_MC, 0x400064ac\r
-.set CYREG_B0_UDB13_MC, 0x400064ad\r
-.set CYREG_B0_UDB14_MC, 0x400064ae\r
-.set CYREG_B0_UDB15_MC, 0x400064af\r
-.set CYDEV_UWRK_UWRK8_B1_BASE, 0x40006500\r
-.set CYDEV_UWRK_UWRK8_B1_SIZE, 0x000000b0\r
-.set CYREG_B1_UDB04_A0, 0x40006504\r
-.set CYREG_B1_UDB05_A0, 0x40006505\r
-.set CYREG_B1_UDB06_A0, 0x40006506\r
-.set CYREG_B1_UDB07_A0, 0x40006507\r
-.set CYREG_B1_UDB08_A0, 0x40006508\r
-.set CYREG_B1_UDB09_A0, 0x40006509\r
-.set CYREG_B1_UDB10_A0, 0x4000650a\r
-.set CYREG_B1_UDB11_A0, 0x4000650b\r
-.set CYREG_B1_UDB04_A1, 0x40006514\r
-.set CYREG_B1_UDB05_A1, 0x40006515\r
-.set CYREG_B1_UDB06_A1, 0x40006516\r
-.set CYREG_B1_UDB07_A1, 0x40006517\r
-.set CYREG_B1_UDB08_A1, 0x40006518\r
-.set CYREG_B1_UDB09_A1, 0x40006519\r
-.set CYREG_B1_UDB10_A1, 0x4000651a\r
-.set CYREG_B1_UDB11_A1, 0x4000651b\r
-.set CYREG_B1_UDB04_D0, 0x40006524\r
-.set CYREG_B1_UDB05_D0, 0x40006525\r
-.set CYREG_B1_UDB06_D0, 0x40006526\r
-.set CYREG_B1_UDB07_D0, 0x40006527\r
-.set CYREG_B1_UDB08_D0, 0x40006528\r
-.set CYREG_B1_UDB09_D0, 0x40006529\r
-.set CYREG_B1_UDB10_D0, 0x4000652a\r
-.set CYREG_B1_UDB11_D0, 0x4000652b\r
-.set CYREG_B1_UDB04_D1, 0x40006534\r
-.set CYREG_B1_UDB05_D1, 0x40006535\r
-.set CYREG_B1_UDB06_D1, 0x40006536\r
-.set CYREG_B1_UDB07_D1, 0x40006537\r
-.set CYREG_B1_UDB08_D1, 0x40006538\r
-.set CYREG_B1_UDB09_D1, 0x40006539\r
-.set CYREG_B1_UDB10_D1, 0x4000653a\r
-.set CYREG_B1_UDB11_D1, 0x4000653b\r
-.set CYREG_B1_UDB04_F0, 0x40006544\r
-.set CYREG_B1_UDB05_F0, 0x40006545\r
-.set CYREG_B1_UDB06_F0, 0x40006546\r
-.set CYREG_B1_UDB07_F0, 0x40006547\r
-.set CYREG_B1_UDB08_F0, 0x40006548\r
-.set CYREG_B1_UDB09_F0, 0x40006549\r
-.set CYREG_B1_UDB10_F0, 0x4000654a\r
-.set CYREG_B1_UDB11_F0, 0x4000654b\r
-.set CYREG_B1_UDB04_F1, 0x40006554\r
-.set CYREG_B1_UDB05_F1, 0x40006555\r
-.set CYREG_B1_UDB06_F1, 0x40006556\r
-.set CYREG_B1_UDB07_F1, 0x40006557\r
-.set CYREG_B1_UDB08_F1, 0x40006558\r
-.set CYREG_B1_UDB09_F1, 0x40006559\r
-.set CYREG_B1_UDB10_F1, 0x4000655a\r
-.set CYREG_B1_UDB11_F1, 0x4000655b\r
-.set CYREG_B1_UDB04_ST, 0x40006564\r
-.set CYREG_B1_UDB05_ST, 0x40006565\r
-.set CYREG_B1_UDB06_ST, 0x40006566\r
-.set CYREG_B1_UDB07_ST, 0x40006567\r
-.set CYREG_B1_UDB08_ST, 0x40006568\r
-.set CYREG_B1_UDB09_ST, 0x40006569\r
-.set CYREG_B1_UDB10_ST, 0x4000656a\r
-.set CYREG_B1_UDB11_ST, 0x4000656b\r
-.set CYREG_B1_UDB04_CTL, 0x40006574\r
-.set CYREG_B1_UDB05_CTL, 0x40006575\r
-.set CYREG_B1_UDB06_CTL, 0x40006576\r
-.set CYREG_B1_UDB07_CTL, 0x40006577\r
-.set CYREG_B1_UDB08_CTL, 0x40006578\r
-.set CYREG_B1_UDB09_CTL, 0x40006579\r
-.set CYREG_B1_UDB10_CTL, 0x4000657a\r
-.set CYREG_B1_UDB11_CTL, 0x4000657b\r
-.set CYREG_B1_UDB04_MSK, 0x40006584\r
-.set CYREG_B1_UDB05_MSK, 0x40006585\r
-.set CYREG_B1_UDB06_MSK, 0x40006586\r
-.set CYREG_B1_UDB07_MSK, 0x40006587\r
-.set CYREG_B1_UDB08_MSK, 0x40006588\r
-.set CYREG_B1_UDB09_MSK, 0x40006589\r
-.set CYREG_B1_UDB10_MSK, 0x4000658a\r
-.set CYREG_B1_UDB11_MSK, 0x4000658b\r
-.set CYREG_B1_UDB04_ACTL, 0x40006594\r
-.set CYREG_B1_UDB05_ACTL, 0x40006595\r
-.set CYREG_B1_UDB06_ACTL, 0x40006596\r
-.set CYREG_B1_UDB07_ACTL, 0x40006597\r
-.set CYREG_B1_UDB08_ACTL, 0x40006598\r
-.set CYREG_B1_UDB09_ACTL, 0x40006599\r
-.set CYREG_B1_UDB10_ACTL, 0x4000659a\r
-.set CYREG_B1_UDB11_ACTL, 0x4000659b\r
-.set CYREG_B1_UDB04_MC, 0x400065a4\r
-.set CYREG_B1_UDB05_MC, 0x400065a5\r
-.set CYREG_B1_UDB06_MC, 0x400065a6\r
-.set CYREG_B1_UDB07_MC, 0x400065a7\r
-.set CYREG_B1_UDB08_MC, 0x400065a8\r
-.set CYREG_B1_UDB09_MC, 0x400065a9\r
-.set CYREG_B1_UDB10_MC, 0x400065aa\r
-.set CYREG_B1_UDB11_MC, 0x400065ab\r
-.set CYDEV_UWRK_UWRK16_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_SIZE, 0x00000760\r
-.set CYDEV_UWRK_UWRK16_CAT_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_CAT_SIZE, 0x00000760\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_CAT_B0_SIZE, 0x00000160\r
-.set CYREG_B0_UDB00_A0_A1, 0x40006800\r
-.set CYREG_B0_UDB01_A0_A1, 0x40006802\r
-.set CYREG_B0_UDB02_A0_A1, 0x40006804\r
-.set CYREG_B0_UDB03_A0_A1, 0x40006806\r
-.set CYREG_B0_UDB04_A0_A1, 0x40006808\r
-.set CYREG_B0_UDB05_A0_A1, 0x4000680a\r
-.set CYREG_B0_UDB06_A0_A1, 0x4000680c\r
-.set CYREG_B0_UDB07_A0_A1, 0x4000680e\r
-.set CYREG_B0_UDB08_A0_A1, 0x40006810\r
-.set CYREG_B0_UDB09_A0_A1, 0x40006812\r
-.set CYREG_B0_UDB10_A0_A1, 0x40006814\r
-.set CYREG_B0_UDB11_A0_A1, 0x40006816\r
-.set CYREG_B0_UDB12_A0_A1, 0x40006818\r
-.set CYREG_B0_UDB13_A0_A1, 0x4000681a\r
-.set CYREG_B0_UDB14_A0_A1, 0x4000681c\r
-.set CYREG_B0_UDB15_A0_A1, 0x4000681e\r
-.set CYREG_B0_UDB00_D0_D1, 0x40006840\r
-.set CYREG_B0_UDB01_D0_D1, 0x40006842\r
-.set CYREG_B0_UDB02_D0_D1, 0x40006844\r
-.set CYREG_B0_UDB03_D0_D1, 0x40006846\r
-.set CYREG_B0_UDB04_D0_D1, 0x40006848\r
-.set CYREG_B0_UDB05_D0_D1, 0x4000684a\r
-.set CYREG_B0_UDB06_D0_D1, 0x4000684c\r
-.set CYREG_B0_UDB07_D0_D1, 0x4000684e\r
-.set CYREG_B0_UDB08_D0_D1, 0x40006850\r
-.set CYREG_B0_UDB09_D0_D1, 0x40006852\r
-.set CYREG_B0_UDB10_D0_D1, 0x40006854\r
-.set CYREG_B0_UDB11_D0_D1, 0x40006856\r
-.set CYREG_B0_UDB12_D0_D1, 0x40006858\r
-.set CYREG_B0_UDB13_D0_D1, 0x4000685a\r
-.set CYREG_B0_UDB14_D0_D1, 0x4000685c\r
-.set CYREG_B0_UDB15_D0_D1, 0x4000685e\r
-.set CYREG_B0_UDB00_F0_F1, 0x40006880\r
-.set CYREG_B0_UDB01_F0_F1, 0x40006882\r
-.set CYREG_B0_UDB02_F0_F1, 0x40006884\r
-.set CYREG_B0_UDB03_F0_F1, 0x40006886\r
-.set CYREG_B0_UDB04_F0_F1, 0x40006888\r
-.set CYREG_B0_UDB05_F0_F1, 0x4000688a\r
-.set CYREG_B0_UDB06_F0_F1, 0x4000688c\r
-.set CYREG_B0_UDB07_F0_F1, 0x4000688e\r
-.set CYREG_B0_UDB08_F0_F1, 0x40006890\r
-.set CYREG_B0_UDB09_F0_F1, 0x40006892\r
-.set CYREG_B0_UDB10_F0_F1, 0x40006894\r
-.set CYREG_B0_UDB11_F0_F1, 0x40006896\r
-.set CYREG_B0_UDB12_F0_F1, 0x40006898\r
-.set CYREG_B0_UDB13_F0_F1, 0x4000689a\r
-.set CYREG_B0_UDB14_F0_F1, 0x4000689c\r
-.set CYREG_B0_UDB15_F0_F1, 0x4000689e\r
-.set CYREG_B0_UDB00_ST_CTL, 0x400068c0\r
-.set CYREG_B0_UDB01_ST_CTL, 0x400068c2\r
-.set CYREG_B0_UDB02_ST_CTL, 0x400068c4\r
-.set CYREG_B0_UDB03_ST_CTL, 0x400068c6\r
-.set CYREG_B0_UDB04_ST_CTL, 0x400068c8\r
-.set CYREG_B0_UDB05_ST_CTL, 0x400068ca\r
-.set CYREG_B0_UDB06_ST_CTL, 0x400068cc\r
-.set CYREG_B0_UDB07_ST_CTL, 0x400068ce\r
-.set CYREG_B0_UDB08_ST_CTL, 0x400068d0\r
-.set CYREG_B0_UDB09_ST_CTL, 0x400068d2\r
-.set CYREG_B0_UDB10_ST_CTL, 0x400068d4\r
-.set CYREG_B0_UDB11_ST_CTL, 0x400068d6\r
-.set CYREG_B0_UDB12_ST_CTL, 0x400068d8\r
-.set CYREG_B0_UDB13_ST_CTL, 0x400068da\r
-.set CYREG_B0_UDB14_ST_CTL, 0x400068dc\r
-.set CYREG_B0_UDB15_ST_CTL, 0x400068de\r
-.set CYREG_B0_UDB00_MSK_ACTL, 0x40006900\r
-.set CYREG_B0_UDB01_MSK_ACTL, 0x40006902\r
-.set CYREG_B0_UDB02_MSK_ACTL, 0x40006904\r
-.set CYREG_B0_UDB03_MSK_ACTL, 0x40006906\r
-.set CYREG_B0_UDB04_MSK_ACTL, 0x40006908\r
-.set CYREG_B0_UDB05_MSK_ACTL, 0x4000690a\r
-.set CYREG_B0_UDB06_MSK_ACTL, 0x4000690c\r
-.set CYREG_B0_UDB07_MSK_ACTL, 0x4000690e\r
-.set CYREG_B0_UDB08_MSK_ACTL, 0x40006910\r
-.set CYREG_B0_UDB09_MSK_ACTL, 0x40006912\r
-.set CYREG_B0_UDB10_MSK_ACTL, 0x40006914\r
-.set CYREG_B0_UDB11_MSK_ACTL, 0x40006916\r
-.set CYREG_B0_UDB12_MSK_ACTL, 0x40006918\r
-.set CYREG_B0_UDB13_MSK_ACTL, 0x4000691a\r
-.set CYREG_B0_UDB14_MSK_ACTL, 0x4000691c\r
-.set CYREG_B0_UDB15_MSK_ACTL, 0x4000691e\r
-.set CYREG_B0_UDB00_MC_00, 0x40006940\r
-.set CYREG_B0_UDB01_MC_00, 0x40006942\r
-.set CYREG_B0_UDB02_MC_00, 0x40006944\r
-.set CYREG_B0_UDB03_MC_00, 0x40006946\r
-.set CYREG_B0_UDB04_MC_00, 0x40006948\r
-.set CYREG_B0_UDB05_MC_00, 0x4000694a\r
-.set CYREG_B0_UDB06_MC_00, 0x4000694c\r
-.set CYREG_B0_UDB07_MC_00, 0x4000694e\r
-.set CYREG_B0_UDB08_MC_00, 0x40006950\r
-.set CYREG_B0_UDB09_MC_00, 0x40006952\r
-.set CYREG_B0_UDB10_MC_00, 0x40006954\r
-.set CYREG_B0_UDB11_MC_00, 0x40006956\r
-.set CYREG_B0_UDB12_MC_00, 0x40006958\r
-.set CYREG_B0_UDB13_MC_00, 0x4000695a\r
-.set CYREG_B0_UDB14_MC_00, 0x4000695c\r
-.set CYREG_B0_UDB15_MC_00, 0x4000695e\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_BASE, 0x40006a00\r
-.set CYDEV_UWRK_UWRK16_CAT_B1_SIZE, 0x00000160\r
-.set CYREG_B1_UDB04_A0_A1, 0x40006a08\r
-.set CYREG_B1_UDB05_A0_A1, 0x40006a0a\r
-.set CYREG_B1_UDB06_A0_A1, 0x40006a0c\r
-.set CYREG_B1_UDB07_A0_A1, 0x40006a0e\r
-.set CYREG_B1_UDB08_A0_A1, 0x40006a10\r
-.set CYREG_B1_UDB09_A0_A1, 0x40006a12\r
-.set CYREG_B1_UDB10_A0_A1, 0x40006a14\r
-.set CYREG_B1_UDB11_A0_A1, 0x40006a16\r
-.set CYREG_B1_UDB04_D0_D1, 0x40006a48\r
-.set CYREG_B1_UDB05_D0_D1, 0x40006a4a\r
-.set CYREG_B1_UDB06_D0_D1, 0x40006a4c\r
-.set CYREG_B1_UDB07_D0_D1, 0x40006a4e\r
-.set CYREG_B1_UDB08_D0_D1, 0x40006a50\r
-.set CYREG_B1_UDB09_D0_D1, 0x40006a52\r
-.set CYREG_B1_UDB10_D0_D1, 0x40006a54\r
-.set CYREG_B1_UDB11_D0_D1, 0x40006a56\r
-.set CYREG_B1_UDB04_F0_F1, 0x40006a88\r
-.set CYREG_B1_UDB05_F0_F1, 0x40006a8a\r
-.set CYREG_B1_UDB06_F0_F1, 0x40006a8c\r
-.set CYREG_B1_UDB07_F0_F1, 0x40006a8e\r
-.set CYREG_B1_UDB08_F0_F1, 0x40006a90\r
-.set CYREG_B1_UDB09_F0_F1, 0x40006a92\r
-.set CYREG_B1_UDB10_F0_F1, 0x40006a94\r
-.set CYREG_B1_UDB11_F0_F1, 0x40006a96\r
-.set CYREG_B1_UDB04_ST_CTL, 0x40006ac8\r
-.set CYREG_B1_UDB05_ST_CTL, 0x40006aca\r
-.set CYREG_B1_UDB06_ST_CTL, 0x40006acc\r
-.set CYREG_B1_UDB07_ST_CTL, 0x40006ace\r
-.set CYREG_B1_UDB08_ST_CTL, 0x40006ad0\r
-.set CYREG_B1_UDB09_ST_CTL, 0x40006ad2\r
-.set CYREG_B1_UDB10_ST_CTL, 0x40006ad4\r
-.set CYREG_B1_UDB11_ST_CTL, 0x40006ad6\r
-.set CYREG_B1_UDB04_MSK_ACTL, 0x40006b08\r
-.set CYREG_B1_UDB05_MSK_ACTL, 0x40006b0a\r
-.set CYREG_B1_UDB06_MSK_ACTL, 0x40006b0c\r
-.set CYREG_B1_UDB07_MSK_ACTL, 0x40006b0e\r
-.set CYREG_B1_UDB08_MSK_ACTL, 0x40006b10\r
-.set CYREG_B1_UDB09_MSK_ACTL, 0x40006b12\r
-.set CYREG_B1_UDB10_MSK_ACTL, 0x40006b14\r
-.set CYREG_B1_UDB11_MSK_ACTL, 0x40006b16\r
-.set CYREG_B1_UDB04_MC_00, 0x40006b48\r
-.set CYREG_B1_UDB05_MC_00, 0x40006b4a\r
-.set CYREG_B1_UDB06_MC_00, 0x40006b4c\r
-.set CYREG_B1_UDB07_MC_00, 0x40006b4e\r
-.set CYREG_B1_UDB08_MC_00, 0x40006b50\r
-.set CYREG_B1_UDB09_MC_00, 0x40006b52\r
-.set CYREG_B1_UDB10_MC_00, 0x40006b54\r
-.set CYREG_B1_UDB11_MC_00, 0x40006b56\r
-.set CYDEV_UWRK_UWRK16_DEF_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_DEF_SIZE, 0x0000075e\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_BASE, 0x40006800\r
-.set CYDEV_UWRK_UWRK16_DEF_B0_SIZE, 0x0000015e\r
-.set CYREG_B0_UDB00_01_A0, 0x40006800\r
-.set CYREG_B0_UDB01_02_A0, 0x40006802\r
-.set CYREG_B0_UDB02_03_A0, 0x40006804\r
-.set CYREG_B0_UDB03_04_A0, 0x40006806\r
-.set CYREG_B0_UDB04_05_A0, 0x40006808\r
-.set CYREG_B0_UDB05_06_A0, 0x4000680a\r
-.set CYREG_B0_UDB06_07_A0, 0x4000680c\r
-.set CYREG_B0_UDB07_08_A0, 0x4000680e\r
-.set CYREG_B0_UDB08_09_A0, 0x40006810\r
-.set CYREG_B0_UDB09_10_A0, 0x40006812\r
-.set CYREG_B0_UDB10_11_A0, 0x40006814\r
-.set CYREG_B0_UDB11_12_A0, 0x40006816\r
-.set CYREG_B0_UDB12_13_A0, 0x40006818\r
-.set CYREG_B0_UDB13_14_A0, 0x4000681a\r
-.set CYREG_B0_UDB14_15_A0, 0x4000681c\r
-.set CYREG_B0_UDB00_01_A1, 0x40006820\r
-.set CYREG_B0_UDB01_02_A1, 0x40006822\r
-.set CYREG_B0_UDB02_03_A1, 0x40006824\r
-.set CYREG_B0_UDB03_04_A1, 0x40006826\r
-.set CYREG_B0_UDB04_05_A1, 0x40006828\r
-.set CYREG_B0_UDB05_06_A1, 0x4000682a\r
-.set CYREG_B0_UDB06_07_A1, 0x4000682c\r
-.set CYREG_B0_UDB07_08_A1, 0x4000682e\r
-.set CYREG_B0_UDB08_09_A1, 0x40006830\r
-.set CYREG_B0_UDB09_10_A1, 0x40006832\r
-.set CYREG_B0_UDB10_11_A1, 0x40006834\r
-.set CYREG_B0_UDB11_12_A1, 0x40006836\r
-.set CYREG_B0_UDB12_13_A1, 0x40006838\r
-.set CYREG_B0_UDB13_14_A1, 0x4000683a\r
-.set CYREG_B0_UDB14_15_A1, 0x4000683c\r
-.set CYREG_B0_UDB00_01_D0, 0x40006840\r
-.set CYREG_B0_UDB01_02_D0, 0x40006842\r
-.set CYREG_B0_UDB02_03_D0, 0x40006844\r
-.set CYREG_B0_UDB03_04_D0, 0x40006846\r
-.set CYREG_B0_UDB04_05_D0, 0x40006848\r
-.set CYREG_B0_UDB05_06_D0, 0x4000684a\r
-.set CYREG_B0_UDB06_07_D0, 0x4000684c\r
-.set CYREG_B0_UDB07_08_D0, 0x4000684e\r
-.set CYREG_B0_UDB08_09_D0, 0x40006850\r
-.set CYREG_B0_UDB09_10_D0, 0x40006852\r
-.set CYREG_B0_UDB10_11_D0, 0x40006854\r
-.set CYREG_B0_UDB11_12_D0, 0x40006856\r
-.set CYREG_B0_UDB12_13_D0, 0x40006858\r
-.set CYREG_B0_UDB13_14_D0, 0x4000685a\r
-.set CYREG_B0_UDB14_15_D0, 0x4000685c\r
-.set CYREG_B0_UDB00_01_D1, 0x40006860\r
-.set CYREG_B0_UDB01_02_D1, 0x40006862\r
-.set CYREG_B0_UDB02_03_D1, 0x40006864\r
-.set CYREG_B0_UDB03_04_D1, 0x40006866\r
-.set CYREG_B0_UDB04_05_D1, 0x40006868\r
-.set CYREG_B0_UDB05_06_D1, 0x4000686a\r
-.set CYREG_B0_UDB06_07_D1, 0x4000686c\r
-.set CYREG_B0_UDB07_08_D1, 0x4000686e\r
-.set CYREG_B0_UDB08_09_D1, 0x40006870\r
-.set CYREG_B0_UDB09_10_D1, 0x40006872\r
-.set CYREG_B0_UDB10_11_D1, 0x40006874\r
-.set CYREG_B0_UDB11_12_D1, 0x40006876\r
-.set CYREG_B0_UDB12_13_D1, 0x40006878\r
-.set CYREG_B0_UDB13_14_D1, 0x4000687a\r
-.set CYREG_B0_UDB14_15_D1, 0x4000687c\r
-.set CYREG_B0_UDB00_01_F0, 0x40006880\r
-.set CYREG_B0_UDB01_02_F0, 0x40006882\r
-.set CYREG_B0_UDB02_03_F0, 0x40006884\r
-.set CYREG_B0_UDB03_04_F0, 0x40006886\r
-.set CYREG_B0_UDB04_05_F0, 0x40006888\r
-.set CYREG_B0_UDB05_06_F0, 0x4000688a\r
-.set CYREG_B0_UDB06_07_F0, 0x4000688c\r
-.set CYREG_B0_UDB07_08_F0, 0x4000688e\r
-.set CYREG_B0_UDB08_09_F0, 0x40006890\r
-.set CYREG_B0_UDB09_10_F0, 0x40006892\r
-.set CYREG_B0_UDB10_11_F0, 0x40006894\r
-.set CYREG_B0_UDB11_12_F0, 0x40006896\r
-.set CYREG_B0_UDB12_13_F0, 0x40006898\r
-.set CYREG_B0_UDB13_14_F0, 0x4000689a\r
-.set CYREG_B0_UDB14_15_F0, 0x4000689c\r
-.set CYREG_B0_UDB00_01_F1, 0x400068a0\r
-.set CYREG_B0_UDB01_02_F1, 0x400068a2\r
-.set CYREG_B0_UDB02_03_F1, 0x400068a4\r
-.set CYREG_B0_UDB03_04_F1, 0x400068a6\r
-.set CYREG_B0_UDB04_05_F1, 0x400068a8\r
-.set CYREG_B0_UDB05_06_F1, 0x400068aa\r
-.set CYREG_B0_UDB06_07_F1, 0x400068ac\r
-.set CYREG_B0_UDB07_08_F1, 0x400068ae\r
-.set CYREG_B0_UDB08_09_F1, 0x400068b0\r
-.set CYREG_B0_UDB09_10_F1, 0x400068b2\r
-.set CYREG_B0_UDB10_11_F1, 0x400068b4\r
-.set CYREG_B0_UDB11_12_F1, 0x400068b6\r
-.set CYREG_B0_UDB12_13_F1, 0x400068b8\r
-.set CYREG_B0_UDB13_14_F1, 0x400068ba\r
-.set CYREG_B0_UDB14_15_F1, 0x400068bc\r
-.set CYREG_B0_UDB00_01_ST, 0x400068c0\r
-.set CYREG_B0_UDB01_02_ST, 0x400068c2\r
-.set CYREG_B0_UDB02_03_ST, 0x400068c4\r
-.set CYREG_B0_UDB03_04_ST, 0x400068c6\r
-.set CYREG_B0_UDB04_05_ST, 0x400068c8\r
-.set CYREG_B0_UDB05_06_ST, 0x400068ca\r
-.set CYREG_B0_UDB06_07_ST, 0x400068cc\r
-.set CYREG_B0_UDB07_08_ST, 0x400068ce\r
-.set CYREG_B0_UDB08_09_ST, 0x400068d0\r
-.set CYREG_B0_UDB09_10_ST, 0x400068d2\r
-.set CYREG_B0_UDB10_11_ST, 0x400068d4\r
-.set CYREG_B0_UDB11_12_ST, 0x400068d6\r
-.set CYREG_B0_UDB12_13_ST, 0x400068d8\r
-.set CYREG_B0_UDB13_14_ST, 0x400068da\r
-.set CYREG_B0_UDB14_15_ST, 0x400068dc\r
-.set CYREG_B0_UDB00_01_CTL, 0x400068e0\r
-.set CYREG_B0_UDB01_02_CTL, 0x400068e2\r
-.set CYREG_B0_UDB02_03_CTL, 0x400068e4\r
-.set CYREG_B0_UDB03_04_CTL, 0x400068e6\r
-.set CYREG_B0_UDB04_05_CTL, 0x400068e8\r
-.set CYREG_B0_UDB05_06_CTL, 0x400068ea\r
-.set CYREG_B0_UDB06_07_CTL, 0x400068ec\r
-.set CYREG_B0_UDB07_08_CTL, 0x400068ee\r
-.set CYREG_B0_UDB08_09_CTL, 0x400068f0\r
-.set CYREG_B0_UDB09_10_CTL, 0x400068f2\r
-.set CYREG_B0_UDB10_11_CTL, 0x400068f4\r
-.set CYREG_B0_UDB11_12_CTL, 0x400068f6\r
-.set CYREG_B0_UDB12_13_CTL, 0x400068f8\r
-.set CYREG_B0_UDB13_14_CTL, 0x400068fa\r
-.set CYREG_B0_UDB14_15_CTL, 0x400068fc\r
-.set CYREG_B0_UDB00_01_MSK, 0x40006900\r
-.set CYREG_B0_UDB01_02_MSK, 0x40006902\r
-.set CYREG_B0_UDB02_03_MSK, 0x40006904\r
-.set CYREG_B0_UDB03_04_MSK, 0x40006906\r
-.set CYREG_B0_UDB04_05_MSK, 0x40006908\r
-.set CYREG_B0_UDB05_06_MSK, 0x4000690a\r
-.set CYREG_B0_UDB06_07_MSK, 0x4000690c\r
-.set CYREG_B0_UDB07_08_MSK, 0x4000690e\r
-.set CYREG_B0_UDB08_09_MSK, 0x40006910\r
-.set CYREG_B0_UDB09_10_MSK, 0x40006912\r
-.set CYREG_B0_UDB10_11_MSK, 0x40006914\r
-.set CYREG_B0_UDB11_12_MSK, 0x40006916\r
-.set CYREG_B0_UDB12_13_MSK, 0x40006918\r
-.set CYREG_B0_UDB13_14_MSK, 0x4000691a\r
-.set CYREG_B0_UDB14_15_MSK, 0x4000691c\r
-.set CYREG_B0_UDB00_01_ACTL, 0x40006920\r
-.set CYREG_B0_UDB01_02_ACTL, 0x40006922\r
-.set CYREG_B0_UDB02_03_ACTL, 0x40006924\r
-.set CYREG_B0_UDB03_04_ACTL, 0x40006926\r
-.set CYREG_B0_UDB04_05_ACTL, 0x40006928\r
-.set CYREG_B0_UDB05_06_ACTL, 0x4000692a\r
-.set CYREG_B0_UDB06_07_ACTL, 0x4000692c\r
-.set CYREG_B0_UDB07_08_ACTL, 0x4000692e\r
-.set CYREG_B0_UDB08_09_ACTL, 0x40006930\r
-.set CYREG_B0_UDB09_10_ACTL, 0x40006932\r
-.set CYREG_B0_UDB10_11_ACTL, 0x40006934\r
-.set CYREG_B0_UDB11_12_ACTL, 0x40006936\r
-.set CYREG_B0_UDB12_13_ACTL, 0x40006938\r
-.set CYREG_B0_UDB13_14_ACTL, 0x4000693a\r
-.set CYREG_B0_UDB14_15_ACTL, 0x4000693c\r
-.set CYREG_B0_UDB00_01_MC, 0x40006940\r
-.set CYREG_B0_UDB01_02_MC, 0x40006942\r
-.set CYREG_B0_UDB02_03_MC, 0x40006944\r
-.set CYREG_B0_UDB03_04_MC, 0x40006946\r
-.set CYREG_B0_UDB04_05_MC, 0x40006948\r
-.set CYREG_B0_UDB05_06_MC, 0x4000694a\r
-.set CYREG_B0_UDB06_07_MC, 0x4000694c\r
-.set CYREG_B0_UDB07_08_MC, 0x4000694e\r
-.set CYREG_B0_UDB08_09_MC, 0x40006950\r
-.set CYREG_B0_UDB09_10_MC, 0x40006952\r
-.set CYREG_B0_UDB10_11_MC, 0x40006954\r
-.set CYREG_B0_UDB11_12_MC, 0x40006956\r
-.set CYREG_B0_UDB12_13_MC, 0x40006958\r
-.set CYREG_B0_UDB13_14_MC, 0x4000695a\r
-.set CYREG_B0_UDB14_15_MC, 0x4000695c\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_BASE, 0x40006a00\r
-.set CYDEV_UWRK_UWRK16_DEF_B1_SIZE, 0x0000015e\r
-.set CYREG_B1_UDB04_05_A0, 0x40006a08\r
-.set CYREG_B1_UDB05_06_A0, 0x40006a0a\r
-.set CYREG_B1_UDB06_07_A0, 0x40006a0c\r
-.set CYREG_B1_UDB07_08_A0, 0x40006a0e\r
-.set CYREG_B1_UDB08_09_A0, 0x40006a10\r
-.set CYREG_B1_UDB09_10_A0, 0x40006a12\r
-.set CYREG_B1_UDB10_11_A0, 0x40006a14\r
-.set CYREG_B1_UDB11_12_A0, 0x40006a16\r
-.set CYREG_B1_UDB04_05_A1, 0x40006a28\r
-.set CYREG_B1_UDB05_06_A1, 0x40006a2a\r
-.set CYREG_B1_UDB06_07_A1, 0x40006a2c\r
-.set CYREG_B1_UDB07_08_A1, 0x40006a2e\r
-.set CYREG_B1_UDB08_09_A1, 0x40006a30\r
-.set CYREG_B1_UDB09_10_A1, 0x40006a32\r
-.set CYREG_B1_UDB10_11_A1, 0x40006a34\r
-.set CYREG_B1_UDB11_12_A1, 0x40006a36\r
-.set CYREG_B1_UDB04_05_D0, 0x40006a48\r
-.set CYREG_B1_UDB05_06_D0, 0x40006a4a\r
-.set CYREG_B1_UDB06_07_D0, 0x40006a4c\r
-.set CYREG_B1_UDB07_08_D0, 0x40006a4e\r
-.set CYREG_B1_UDB08_09_D0, 0x40006a50\r
-.set CYREG_B1_UDB09_10_D0, 0x40006a52\r
-.set CYREG_B1_UDB10_11_D0, 0x40006a54\r
-.set CYREG_B1_UDB11_12_D0, 0x40006a56\r
-.set CYREG_B1_UDB04_05_D1, 0x40006a68\r
-.set CYREG_B1_UDB05_06_D1, 0x40006a6a\r
-.set CYREG_B1_UDB06_07_D1, 0x40006a6c\r
-.set CYREG_B1_UDB07_08_D1, 0x40006a6e\r
-.set CYREG_B1_UDB08_09_D1, 0x40006a70\r
-.set CYREG_B1_UDB09_10_D1, 0x40006a72\r
-.set CYREG_B1_UDB10_11_D1, 0x40006a74\r
-.set CYREG_B1_UDB11_12_D1, 0x40006a76\r
-.set CYREG_B1_UDB04_05_F0, 0x40006a88\r
-.set CYREG_B1_UDB05_06_F0, 0x40006a8a\r
-.set CYREG_B1_UDB06_07_F0, 0x40006a8c\r
-.set CYREG_B1_UDB07_08_F0, 0x40006a8e\r
-.set CYREG_B1_UDB08_09_F0, 0x40006a90\r
-.set CYREG_B1_UDB09_10_F0, 0x40006a92\r
-.set CYREG_B1_UDB10_11_F0, 0x40006a94\r
-.set CYREG_B1_UDB11_12_F0, 0x40006a96\r
-.set CYREG_B1_UDB04_05_F1, 0x40006aa8\r
-.set CYREG_B1_UDB05_06_F1, 0x40006aaa\r
-.set CYREG_B1_UDB06_07_F1, 0x40006aac\r
-.set CYREG_B1_UDB07_08_F1, 0x40006aae\r
-.set CYREG_B1_UDB08_09_F1, 0x40006ab0\r
-.set CYREG_B1_UDB09_10_F1, 0x40006ab2\r
-.set CYREG_B1_UDB10_11_F1, 0x40006ab4\r
-.set CYREG_B1_UDB11_12_F1, 0x40006ab6\r
-.set CYREG_B1_UDB04_05_ST, 0x40006ac8\r
-.set CYREG_B1_UDB05_06_ST, 0x40006aca\r
-.set CYREG_B1_UDB06_07_ST, 0x40006acc\r
-.set CYREG_B1_UDB07_08_ST, 0x40006ace\r
-.set CYREG_B1_UDB08_09_ST, 0x40006ad0\r
-.set CYREG_B1_UDB09_10_ST, 0x40006ad2\r
-.set CYREG_B1_UDB10_11_ST, 0x40006ad4\r
-.set CYREG_B1_UDB11_12_ST, 0x40006ad6\r
-.set CYREG_B1_UDB04_05_CTL, 0x40006ae8\r
-.set CYREG_B1_UDB05_06_CTL, 0x40006aea\r
-.set CYREG_B1_UDB06_07_CTL, 0x40006aec\r
-.set CYREG_B1_UDB07_08_CTL, 0x40006aee\r
-.set CYREG_B1_UDB08_09_CTL, 0x40006af0\r
-.set CYREG_B1_UDB09_10_CTL, 0x40006af2\r
-.set CYREG_B1_UDB10_11_CTL, 0x40006af4\r
-.set CYREG_B1_UDB11_12_CTL, 0x40006af6\r
-.set CYREG_B1_UDB04_05_MSK, 0x40006b08\r
-.set CYREG_B1_UDB05_06_MSK, 0x40006b0a\r
-.set CYREG_B1_UDB06_07_MSK, 0x40006b0c\r
-.set CYREG_B1_UDB07_08_MSK, 0x40006b0e\r
-.set CYREG_B1_UDB08_09_MSK, 0x40006b10\r
-.set CYREG_B1_UDB09_10_MSK, 0x40006b12\r
-.set CYREG_B1_UDB10_11_MSK, 0x40006b14\r
-.set CYREG_B1_UDB11_12_MSK, 0x40006b16\r
-.set CYREG_B1_UDB04_05_ACTL, 0x40006b28\r
-.set CYREG_B1_UDB05_06_ACTL, 0x40006b2a\r
-.set CYREG_B1_UDB06_07_ACTL, 0x40006b2c\r
-.set CYREG_B1_UDB07_08_ACTL, 0x40006b2e\r
-.set CYREG_B1_UDB08_09_ACTL, 0x40006b30\r
-.set CYREG_B1_UDB09_10_ACTL, 0x40006b32\r
-.set CYREG_B1_UDB10_11_ACTL, 0x40006b34\r
-.set CYREG_B1_UDB11_12_ACTL, 0x40006b36\r
-.set CYREG_B1_UDB04_05_MC, 0x40006b48\r
-.set CYREG_B1_UDB05_06_MC, 0x40006b4a\r
-.set CYREG_B1_UDB06_07_MC, 0x40006b4c\r
-.set CYREG_B1_UDB07_08_MC, 0x40006b4e\r
-.set CYREG_B1_UDB08_09_MC, 0x40006b50\r
-.set CYREG_B1_UDB09_10_MC, 0x40006b52\r
-.set CYREG_B1_UDB10_11_MC, 0x40006b54\r
-.set CYREG_B1_UDB11_12_MC, 0x40006b56\r
-.set CYDEV_PHUB_BASE, 0x40007000\r
-.set CYDEV_PHUB_SIZE, 0x00000c00\r
-.set CYREG_PHUB_CFG, 0x40007000\r
-.set CYREG_PHUB_ERR, 0x40007004\r
-.set CYREG_PHUB_ERR_ADR, 0x40007008\r
-.set CYDEV_PHUB_CH0_BASE, 0x40007010\r
-.set CYDEV_PHUB_CH0_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH0_BASIC_CFG, 0x40007010\r
-.set CYREG_PHUB_CH0_ACTION, 0x40007014\r
-.set CYREG_PHUB_CH0_BASIC_STATUS, 0x40007018\r
-.set CYDEV_PHUB_CH1_BASE, 0x40007020\r
-.set CYDEV_PHUB_CH1_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH1_BASIC_CFG, 0x40007020\r
-.set CYREG_PHUB_CH1_ACTION, 0x40007024\r
-.set CYREG_PHUB_CH1_BASIC_STATUS, 0x40007028\r
-.set CYDEV_PHUB_CH2_BASE, 0x40007030\r
-.set CYDEV_PHUB_CH2_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH2_BASIC_CFG, 0x40007030\r
-.set CYREG_PHUB_CH2_ACTION, 0x40007034\r
-.set CYREG_PHUB_CH2_BASIC_STATUS, 0x40007038\r
-.set CYDEV_PHUB_CH3_BASE, 0x40007040\r
-.set CYDEV_PHUB_CH3_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH3_BASIC_CFG, 0x40007040\r
-.set CYREG_PHUB_CH3_ACTION, 0x40007044\r
-.set CYREG_PHUB_CH3_BASIC_STATUS, 0x40007048\r
-.set CYDEV_PHUB_CH4_BASE, 0x40007050\r
-.set CYDEV_PHUB_CH4_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH4_BASIC_CFG, 0x40007050\r
-.set CYREG_PHUB_CH4_ACTION, 0x40007054\r
-.set CYREG_PHUB_CH4_BASIC_STATUS, 0x40007058\r
-.set CYDEV_PHUB_CH5_BASE, 0x40007060\r
-.set CYDEV_PHUB_CH5_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH5_BASIC_CFG, 0x40007060\r
-.set CYREG_PHUB_CH5_ACTION, 0x40007064\r
-.set CYREG_PHUB_CH5_BASIC_STATUS, 0x40007068\r
-.set CYDEV_PHUB_CH6_BASE, 0x40007070\r
-.set CYDEV_PHUB_CH6_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH6_BASIC_CFG, 0x40007070\r
-.set CYREG_PHUB_CH6_ACTION, 0x40007074\r
-.set CYREG_PHUB_CH6_BASIC_STATUS, 0x40007078\r
-.set CYDEV_PHUB_CH7_BASE, 0x40007080\r
-.set CYDEV_PHUB_CH7_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH7_BASIC_CFG, 0x40007080\r
-.set CYREG_PHUB_CH7_ACTION, 0x40007084\r
-.set CYREG_PHUB_CH7_BASIC_STATUS, 0x40007088\r
-.set CYDEV_PHUB_CH8_BASE, 0x40007090\r
-.set CYDEV_PHUB_CH8_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH8_BASIC_CFG, 0x40007090\r
-.set CYREG_PHUB_CH8_ACTION, 0x40007094\r
-.set CYREG_PHUB_CH8_BASIC_STATUS, 0x40007098\r
-.set CYDEV_PHUB_CH9_BASE, 0x400070a0\r
-.set CYDEV_PHUB_CH9_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH9_BASIC_CFG, 0x400070a0\r
-.set CYREG_PHUB_CH9_ACTION, 0x400070a4\r
-.set CYREG_PHUB_CH9_BASIC_STATUS, 0x400070a8\r
-.set CYDEV_PHUB_CH10_BASE, 0x400070b0\r
-.set CYDEV_PHUB_CH10_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH10_BASIC_CFG, 0x400070b0\r
-.set CYREG_PHUB_CH10_ACTION, 0x400070b4\r
-.set CYREG_PHUB_CH10_BASIC_STATUS, 0x400070b8\r
-.set CYDEV_PHUB_CH11_BASE, 0x400070c0\r
-.set CYDEV_PHUB_CH11_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH11_BASIC_CFG, 0x400070c0\r
-.set CYREG_PHUB_CH11_ACTION, 0x400070c4\r
-.set CYREG_PHUB_CH11_BASIC_STATUS, 0x400070c8\r
-.set CYDEV_PHUB_CH12_BASE, 0x400070d0\r
-.set CYDEV_PHUB_CH12_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH12_BASIC_CFG, 0x400070d0\r
-.set CYREG_PHUB_CH12_ACTION, 0x400070d4\r
-.set CYREG_PHUB_CH12_BASIC_STATUS, 0x400070d8\r
-.set CYDEV_PHUB_CH13_BASE, 0x400070e0\r
-.set CYDEV_PHUB_CH13_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH13_BASIC_CFG, 0x400070e0\r
-.set CYREG_PHUB_CH13_ACTION, 0x400070e4\r
-.set CYREG_PHUB_CH13_BASIC_STATUS, 0x400070e8\r
-.set CYDEV_PHUB_CH14_BASE, 0x400070f0\r
-.set CYDEV_PHUB_CH14_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH14_BASIC_CFG, 0x400070f0\r
-.set CYREG_PHUB_CH14_ACTION, 0x400070f4\r
-.set CYREG_PHUB_CH14_BASIC_STATUS, 0x400070f8\r
-.set CYDEV_PHUB_CH15_BASE, 0x40007100\r
-.set CYDEV_PHUB_CH15_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH15_BASIC_CFG, 0x40007100\r
-.set CYREG_PHUB_CH15_ACTION, 0x40007104\r
-.set CYREG_PHUB_CH15_BASIC_STATUS, 0x40007108\r
-.set CYDEV_PHUB_CH16_BASE, 0x40007110\r
-.set CYDEV_PHUB_CH16_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH16_BASIC_CFG, 0x40007110\r
-.set CYREG_PHUB_CH16_ACTION, 0x40007114\r
-.set CYREG_PHUB_CH16_BASIC_STATUS, 0x40007118\r
-.set CYDEV_PHUB_CH17_BASE, 0x40007120\r
-.set CYDEV_PHUB_CH17_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH17_BASIC_CFG, 0x40007120\r
-.set CYREG_PHUB_CH17_ACTION, 0x40007124\r
-.set CYREG_PHUB_CH17_BASIC_STATUS, 0x40007128\r
-.set CYDEV_PHUB_CH18_BASE, 0x40007130\r
-.set CYDEV_PHUB_CH18_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH18_BASIC_CFG, 0x40007130\r
-.set CYREG_PHUB_CH18_ACTION, 0x40007134\r
-.set CYREG_PHUB_CH18_BASIC_STATUS, 0x40007138\r
-.set CYDEV_PHUB_CH19_BASE, 0x40007140\r
-.set CYDEV_PHUB_CH19_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH19_BASIC_CFG, 0x40007140\r
-.set CYREG_PHUB_CH19_ACTION, 0x40007144\r
-.set CYREG_PHUB_CH19_BASIC_STATUS, 0x40007148\r
-.set CYDEV_PHUB_CH20_BASE, 0x40007150\r
-.set CYDEV_PHUB_CH20_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH20_BASIC_CFG, 0x40007150\r
-.set CYREG_PHUB_CH20_ACTION, 0x40007154\r
-.set CYREG_PHUB_CH20_BASIC_STATUS, 0x40007158\r
-.set CYDEV_PHUB_CH21_BASE, 0x40007160\r
-.set CYDEV_PHUB_CH21_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH21_BASIC_CFG, 0x40007160\r
-.set CYREG_PHUB_CH21_ACTION, 0x40007164\r
-.set CYREG_PHUB_CH21_BASIC_STATUS, 0x40007168\r
-.set CYDEV_PHUB_CH22_BASE, 0x40007170\r
-.set CYDEV_PHUB_CH22_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH22_BASIC_CFG, 0x40007170\r
-.set CYREG_PHUB_CH22_ACTION, 0x40007174\r
-.set CYREG_PHUB_CH22_BASIC_STATUS, 0x40007178\r
-.set CYDEV_PHUB_CH23_BASE, 0x40007180\r
-.set CYDEV_PHUB_CH23_SIZE, 0x0000000c\r
-.set CYREG_PHUB_CH23_BASIC_CFG, 0x40007180\r
-.set CYREG_PHUB_CH23_ACTION, 0x40007184\r
-.set CYREG_PHUB_CH23_BASIC_STATUS, 0x40007188\r
-.set CYDEV_PHUB_CFGMEM0_BASE, 0x40007600\r
-.set CYDEV_PHUB_CFGMEM0_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM0_CFG0, 0x40007600\r
-.set CYREG_PHUB_CFGMEM0_CFG1, 0x40007604\r
-.set CYDEV_PHUB_CFGMEM1_BASE, 0x40007608\r
-.set CYDEV_PHUB_CFGMEM1_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM1_CFG0, 0x40007608\r
-.set CYREG_PHUB_CFGMEM1_CFG1, 0x4000760c\r
-.set CYDEV_PHUB_CFGMEM2_BASE, 0x40007610\r
-.set CYDEV_PHUB_CFGMEM2_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM2_CFG0, 0x40007610\r
-.set CYREG_PHUB_CFGMEM2_CFG1, 0x40007614\r
-.set CYDEV_PHUB_CFGMEM3_BASE, 0x40007618\r
-.set CYDEV_PHUB_CFGMEM3_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM3_CFG0, 0x40007618\r
-.set CYREG_PHUB_CFGMEM3_CFG1, 0x4000761c\r
-.set CYDEV_PHUB_CFGMEM4_BASE, 0x40007620\r
-.set CYDEV_PHUB_CFGMEM4_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM4_CFG0, 0x40007620\r
-.set CYREG_PHUB_CFGMEM4_CFG1, 0x40007624\r
-.set CYDEV_PHUB_CFGMEM5_BASE, 0x40007628\r
-.set CYDEV_PHUB_CFGMEM5_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM5_CFG0, 0x40007628\r
-.set CYREG_PHUB_CFGMEM5_CFG1, 0x4000762c\r
-.set CYDEV_PHUB_CFGMEM6_BASE, 0x40007630\r
-.set CYDEV_PHUB_CFGMEM6_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM6_CFG0, 0x40007630\r
-.set CYREG_PHUB_CFGMEM6_CFG1, 0x40007634\r
-.set CYDEV_PHUB_CFGMEM7_BASE, 0x40007638\r
-.set CYDEV_PHUB_CFGMEM7_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM7_CFG0, 0x40007638\r
-.set CYREG_PHUB_CFGMEM7_CFG1, 0x4000763c\r
-.set CYDEV_PHUB_CFGMEM8_BASE, 0x40007640\r
-.set CYDEV_PHUB_CFGMEM8_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM8_CFG0, 0x40007640\r
-.set CYREG_PHUB_CFGMEM8_CFG1, 0x40007644\r
-.set CYDEV_PHUB_CFGMEM9_BASE, 0x40007648\r
-.set CYDEV_PHUB_CFGMEM9_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM9_CFG0, 0x40007648\r
-.set CYREG_PHUB_CFGMEM9_CFG1, 0x4000764c\r
-.set CYDEV_PHUB_CFGMEM10_BASE, 0x40007650\r
-.set CYDEV_PHUB_CFGMEM10_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM10_CFG0, 0x40007650\r
-.set CYREG_PHUB_CFGMEM10_CFG1, 0x40007654\r
-.set CYDEV_PHUB_CFGMEM11_BASE, 0x40007658\r
-.set CYDEV_PHUB_CFGMEM11_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM11_CFG0, 0x40007658\r
-.set CYREG_PHUB_CFGMEM11_CFG1, 0x4000765c\r
-.set CYDEV_PHUB_CFGMEM12_BASE, 0x40007660\r
-.set CYDEV_PHUB_CFGMEM12_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM12_CFG0, 0x40007660\r
-.set CYREG_PHUB_CFGMEM12_CFG1, 0x40007664\r
-.set CYDEV_PHUB_CFGMEM13_BASE, 0x40007668\r
-.set CYDEV_PHUB_CFGMEM13_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM13_CFG0, 0x40007668\r
-.set CYREG_PHUB_CFGMEM13_CFG1, 0x4000766c\r
-.set CYDEV_PHUB_CFGMEM14_BASE, 0x40007670\r
-.set CYDEV_PHUB_CFGMEM14_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM14_CFG0, 0x40007670\r
-.set CYREG_PHUB_CFGMEM14_CFG1, 0x40007674\r
-.set CYDEV_PHUB_CFGMEM15_BASE, 0x40007678\r
-.set CYDEV_PHUB_CFGMEM15_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM15_CFG0, 0x40007678\r
-.set CYREG_PHUB_CFGMEM15_CFG1, 0x4000767c\r
-.set CYDEV_PHUB_CFGMEM16_BASE, 0x40007680\r
-.set CYDEV_PHUB_CFGMEM16_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM16_CFG0, 0x40007680\r
-.set CYREG_PHUB_CFGMEM16_CFG1, 0x40007684\r
-.set CYDEV_PHUB_CFGMEM17_BASE, 0x40007688\r
-.set CYDEV_PHUB_CFGMEM17_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM17_CFG0, 0x40007688\r
-.set CYREG_PHUB_CFGMEM17_CFG1, 0x4000768c\r
-.set CYDEV_PHUB_CFGMEM18_BASE, 0x40007690\r
-.set CYDEV_PHUB_CFGMEM18_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM18_CFG0, 0x40007690\r
-.set CYREG_PHUB_CFGMEM18_CFG1, 0x40007694\r
-.set CYDEV_PHUB_CFGMEM19_BASE, 0x40007698\r
-.set CYDEV_PHUB_CFGMEM19_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM19_CFG0, 0x40007698\r
-.set CYREG_PHUB_CFGMEM19_CFG1, 0x4000769c\r
-.set CYDEV_PHUB_CFGMEM20_BASE, 0x400076a0\r
-.set CYDEV_PHUB_CFGMEM20_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM20_CFG0, 0x400076a0\r
-.set CYREG_PHUB_CFGMEM20_CFG1, 0x400076a4\r
-.set CYDEV_PHUB_CFGMEM21_BASE, 0x400076a8\r
-.set CYDEV_PHUB_CFGMEM21_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM21_CFG0, 0x400076a8\r
-.set CYREG_PHUB_CFGMEM21_CFG1, 0x400076ac\r
-.set CYDEV_PHUB_CFGMEM22_BASE, 0x400076b0\r
-.set CYDEV_PHUB_CFGMEM22_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM22_CFG0, 0x400076b0\r
-.set CYREG_PHUB_CFGMEM22_CFG1, 0x400076b4\r
-.set CYDEV_PHUB_CFGMEM23_BASE, 0x400076b8\r
-.set CYDEV_PHUB_CFGMEM23_SIZE, 0x00000008\r
-.set CYREG_PHUB_CFGMEM23_CFG0, 0x400076b8\r
-.set CYREG_PHUB_CFGMEM23_CFG1, 0x400076bc\r
-.set CYDEV_PHUB_TDMEM0_BASE, 0x40007800\r
-.set CYDEV_PHUB_TDMEM0_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM0_ORIG_TD0, 0x40007800\r
-.set CYREG_PHUB_TDMEM0_ORIG_TD1, 0x40007804\r
-.set CYDEV_PHUB_TDMEM1_BASE, 0x40007808\r
-.set CYDEV_PHUB_TDMEM1_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM1_ORIG_TD0, 0x40007808\r
-.set CYREG_PHUB_TDMEM1_ORIG_TD1, 0x4000780c\r
-.set CYDEV_PHUB_TDMEM2_BASE, 0x40007810\r
-.set CYDEV_PHUB_TDMEM2_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM2_ORIG_TD0, 0x40007810\r
-.set CYREG_PHUB_TDMEM2_ORIG_TD1, 0x40007814\r
-.set CYDEV_PHUB_TDMEM3_BASE, 0x40007818\r
-.set CYDEV_PHUB_TDMEM3_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM3_ORIG_TD0, 0x40007818\r
-.set CYREG_PHUB_TDMEM3_ORIG_TD1, 0x4000781c\r
-.set CYDEV_PHUB_TDMEM4_BASE, 0x40007820\r
-.set CYDEV_PHUB_TDMEM4_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM4_ORIG_TD0, 0x40007820\r
-.set CYREG_PHUB_TDMEM4_ORIG_TD1, 0x40007824\r
-.set CYDEV_PHUB_TDMEM5_BASE, 0x40007828\r
-.set CYDEV_PHUB_TDMEM5_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM5_ORIG_TD0, 0x40007828\r
-.set CYREG_PHUB_TDMEM5_ORIG_TD1, 0x4000782c\r
-.set CYDEV_PHUB_TDMEM6_BASE, 0x40007830\r
-.set CYDEV_PHUB_TDMEM6_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM6_ORIG_TD0, 0x40007830\r
-.set CYREG_PHUB_TDMEM6_ORIG_TD1, 0x40007834\r
-.set CYDEV_PHUB_TDMEM7_BASE, 0x40007838\r
-.set CYDEV_PHUB_TDMEM7_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM7_ORIG_TD0, 0x40007838\r
-.set CYREG_PHUB_TDMEM7_ORIG_TD1, 0x4000783c\r
-.set CYDEV_PHUB_TDMEM8_BASE, 0x40007840\r
-.set CYDEV_PHUB_TDMEM8_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM8_ORIG_TD0, 0x40007840\r
-.set CYREG_PHUB_TDMEM8_ORIG_TD1, 0x40007844\r
-.set CYDEV_PHUB_TDMEM9_BASE, 0x40007848\r
-.set CYDEV_PHUB_TDMEM9_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM9_ORIG_TD0, 0x40007848\r
-.set CYREG_PHUB_TDMEM9_ORIG_TD1, 0x4000784c\r
-.set CYDEV_PHUB_TDMEM10_BASE, 0x40007850\r
-.set CYDEV_PHUB_TDMEM10_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM10_ORIG_TD0, 0x40007850\r
-.set CYREG_PHUB_TDMEM10_ORIG_TD1, 0x40007854\r
-.set CYDEV_PHUB_TDMEM11_BASE, 0x40007858\r
-.set CYDEV_PHUB_TDMEM11_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM11_ORIG_TD0, 0x40007858\r
-.set CYREG_PHUB_TDMEM11_ORIG_TD1, 0x4000785c\r
-.set CYDEV_PHUB_TDMEM12_BASE, 0x40007860\r
-.set CYDEV_PHUB_TDMEM12_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM12_ORIG_TD0, 0x40007860\r
-.set CYREG_PHUB_TDMEM12_ORIG_TD1, 0x40007864\r
-.set CYDEV_PHUB_TDMEM13_BASE, 0x40007868\r
-.set CYDEV_PHUB_TDMEM13_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM13_ORIG_TD0, 0x40007868\r
-.set CYREG_PHUB_TDMEM13_ORIG_TD1, 0x4000786c\r
-.set CYDEV_PHUB_TDMEM14_BASE, 0x40007870\r
-.set CYDEV_PHUB_TDMEM14_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM14_ORIG_TD0, 0x40007870\r
-.set CYREG_PHUB_TDMEM14_ORIG_TD1, 0x40007874\r
-.set CYDEV_PHUB_TDMEM15_BASE, 0x40007878\r
-.set CYDEV_PHUB_TDMEM15_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM15_ORIG_TD0, 0x40007878\r
-.set CYREG_PHUB_TDMEM15_ORIG_TD1, 0x4000787c\r
-.set CYDEV_PHUB_TDMEM16_BASE, 0x40007880\r
-.set CYDEV_PHUB_TDMEM16_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM16_ORIG_TD0, 0x40007880\r
-.set CYREG_PHUB_TDMEM16_ORIG_TD1, 0x40007884\r
-.set CYDEV_PHUB_TDMEM17_BASE, 0x40007888\r
-.set CYDEV_PHUB_TDMEM17_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM17_ORIG_TD0, 0x40007888\r
-.set CYREG_PHUB_TDMEM17_ORIG_TD1, 0x4000788c\r
-.set CYDEV_PHUB_TDMEM18_BASE, 0x40007890\r
-.set CYDEV_PHUB_TDMEM18_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM18_ORIG_TD0, 0x40007890\r
-.set CYREG_PHUB_TDMEM18_ORIG_TD1, 0x40007894\r
-.set CYDEV_PHUB_TDMEM19_BASE, 0x40007898\r
-.set CYDEV_PHUB_TDMEM19_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM19_ORIG_TD0, 0x40007898\r
-.set CYREG_PHUB_TDMEM19_ORIG_TD1, 0x4000789c\r
-.set CYDEV_PHUB_TDMEM20_BASE, 0x400078a0\r
-.set CYDEV_PHUB_TDMEM20_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM20_ORIG_TD0, 0x400078a0\r
-.set CYREG_PHUB_TDMEM20_ORIG_TD1, 0x400078a4\r
-.set CYDEV_PHUB_TDMEM21_BASE, 0x400078a8\r
-.set CYDEV_PHUB_TDMEM21_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM21_ORIG_TD0, 0x400078a8\r
-.set CYREG_PHUB_TDMEM21_ORIG_TD1, 0x400078ac\r
-.set CYDEV_PHUB_TDMEM22_BASE, 0x400078b0\r
-.set CYDEV_PHUB_TDMEM22_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM22_ORIG_TD0, 0x400078b0\r
-.set CYREG_PHUB_TDMEM22_ORIG_TD1, 0x400078b4\r
-.set CYDEV_PHUB_TDMEM23_BASE, 0x400078b8\r
-.set CYDEV_PHUB_TDMEM23_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM23_ORIG_TD0, 0x400078b8\r
-.set CYREG_PHUB_TDMEM23_ORIG_TD1, 0x400078bc\r
-.set CYDEV_PHUB_TDMEM24_BASE, 0x400078c0\r
-.set CYDEV_PHUB_TDMEM24_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM24_ORIG_TD0, 0x400078c0\r
-.set CYREG_PHUB_TDMEM24_ORIG_TD1, 0x400078c4\r
-.set CYDEV_PHUB_TDMEM25_BASE, 0x400078c8\r
-.set CYDEV_PHUB_TDMEM25_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM25_ORIG_TD0, 0x400078c8\r
-.set CYREG_PHUB_TDMEM25_ORIG_TD1, 0x400078cc\r
-.set CYDEV_PHUB_TDMEM26_BASE, 0x400078d0\r
-.set CYDEV_PHUB_TDMEM26_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM26_ORIG_TD0, 0x400078d0\r
-.set CYREG_PHUB_TDMEM26_ORIG_TD1, 0x400078d4\r
-.set CYDEV_PHUB_TDMEM27_BASE, 0x400078d8\r
-.set CYDEV_PHUB_TDMEM27_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM27_ORIG_TD0, 0x400078d8\r
-.set CYREG_PHUB_TDMEM27_ORIG_TD1, 0x400078dc\r
-.set CYDEV_PHUB_TDMEM28_BASE, 0x400078e0\r
-.set CYDEV_PHUB_TDMEM28_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM28_ORIG_TD0, 0x400078e0\r
-.set CYREG_PHUB_TDMEM28_ORIG_TD1, 0x400078e4\r
-.set CYDEV_PHUB_TDMEM29_BASE, 0x400078e8\r
-.set CYDEV_PHUB_TDMEM29_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM29_ORIG_TD0, 0x400078e8\r
-.set CYREG_PHUB_TDMEM29_ORIG_TD1, 0x400078ec\r
-.set CYDEV_PHUB_TDMEM30_BASE, 0x400078f0\r
-.set CYDEV_PHUB_TDMEM30_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM30_ORIG_TD0, 0x400078f0\r
-.set CYREG_PHUB_TDMEM30_ORIG_TD1, 0x400078f4\r
-.set CYDEV_PHUB_TDMEM31_BASE, 0x400078f8\r
-.set CYDEV_PHUB_TDMEM31_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM31_ORIG_TD0, 0x400078f8\r
-.set CYREG_PHUB_TDMEM31_ORIG_TD1, 0x400078fc\r
-.set CYDEV_PHUB_TDMEM32_BASE, 0x40007900\r
-.set CYDEV_PHUB_TDMEM32_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM32_ORIG_TD0, 0x40007900\r
-.set CYREG_PHUB_TDMEM32_ORIG_TD1, 0x40007904\r
-.set CYDEV_PHUB_TDMEM33_BASE, 0x40007908\r
-.set CYDEV_PHUB_TDMEM33_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM33_ORIG_TD0, 0x40007908\r
-.set CYREG_PHUB_TDMEM33_ORIG_TD1, 0x4000790c\r
-.set CYDEV_PHUB_TDMEM34_BASE, 0x40007910\r
-.set CYDEV_PHUB_TDMEM34_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM34_ORIG_TD0, 0x40007910\r
-.set CYREG_PHUB_TDMEM34_ORIG_TD1, 0x40007914\r
-.set CYDEV_PHUB_TDMEM35_BASE, 0x40007918\r
-.set CYDEV_PHUB_TDMEM35_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM35_ORIG_TD0, 0x40007918\r
-.set CYREG_PHUB_TDMEM35_ORIG_TD1, 0x4000791c\r
-.set CYDEV_PHUB_TDMEM36_BASE, 0x40007920\r
-.set CYDEV_PHUB_TDMEM36_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM36_ORIG_TD0, 0x40007920\r
-.set CYREG_PHUB_TDMEM36_ORIG_TD1, 0x40007924\r
-.set CYDEV_PHUB_TDMEM37_BASE, 0x40007928\r
-.set CYDEV_PHUB_TDMEM37_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM37_ORIG_TD0, 0x40007928\r
-.set CYREG_PHUB_TDMEM37_ORIG_TD1, 0x4000792c\r
-.set CYDEV_PHUB_TDMEM38_BASE, 0x40007930\r
-.set CYDEV_PHUB_TDMEM38_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM38_ORIG_TD0, 0x40007930\r
-.set CYREG_PHUB_TDMEM38_ORIG_TD1, 0x40007934\r
-.set CYDEV_PHUB_TDMEM39_BASE, 0x40007938\r
-.set CYDEV_PHUB_TDMEM39_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM39_ORIG_TD0, 0x40007938\r
-.set CYREG_PHUB_TDMEM39_ORIG_TD1, 0x4000793c\r
-.set CYDEV_PHUB_TDMEM40_BASE, 0x40007940\r
-.set CYDEV_PHUB_TDMEM40_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM40_ORIG_TD0, 0x40007940\r
-.set CYREG_PHUB_TDMEM40_ORIG_TD1, 0x40007944\r
-.set CYDEV_PHUB_TDMEM41_BASE, 0x40007948\r
-.set CYDEV_PHUB_TDMEM41_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM41_ORIG_TD0, 0x40007948\r
-.set CYREG_PHUB_TDMEM41_ORIG_TD1, 0x4000794c\r
-.set CYDEV_PHUB_TDMEM42_BASE, 0x40007950\r
-.set CYDEV_PHUB_TDMEM42_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM42_ORIG_TD0, 0x40007950\r
-.set CYREG_PHUB_TDMEM42_ORIG_TD1, 0x40007954\r
-.set CYDEV_PHUB_TDMEM43_BASE, 0x40007958\r
-.set CYDEV_PHUB_TDMEM43_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM43_ORIG_TD0, 0x40007958\r
-.set CYREG_PHUB_TDMEM43_ORIG_TD1, 0x4000795c\r
-.set CYDEV_PHUB_TDMEM44_BASE, 0x40007960\r
-.set CYDEV_PHUB_TDMEM44_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM44_ORIG_TD0, 0x40007960\r
-.set CYREG_PHUB_TDMEM44_ORIG_TD1, 0x40007964\r
-.set CYDEV_PHUB_TDMEM45_BASE, 0x40007968\r
-.set CYDEV_PHUB_TDMEM45_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM45_ORIG_TD0, 0x40007968\r
-.set CYREG_PHUB_TDMEM45_ORIG_TD1, 0x4000796c\r
-.set CYDEV_PHUB_TDMEM46_BASE, 0x40007970\r
-.set CYDEV_PHUB_TDMEM46_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM46_ORIG_TD0, 0x40007970\r
-.set CYREG_PHUB_TDMEM46_ORIG_TD1, 0x40007974\r
-.set CYDEV_PHUB_TDMEM47_BASE, 0x40007978\r
-.set CYDEV_PHUB_TDMEM47_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM47_ORIG_TD0, 0x40007978\r
-.set CYREG_PHUB_TDMEM47_ORIG_TD1, 0x4000797c\r
-.set CYDEV_PHUB_TDMEM48_BASE, 0x40007980\r
-.set CYDEV_PHUB_TDMEM48_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM48_ORIG_TD0, 0x40007980\r
-.set CYREG_PHUB_TDMEM48_ORIG_TD1, 0x40007984\r
-.set CYDEV_PHUB_TDMEM49_BASE, 0x40007988\r
-.set CYDEV_PHUB_TDMEM49_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM49_ORIG_TD0, 0x40007988\r
-.set CYREG_PHUB_TDMEM49_ORIG_TD1, 0x4000798c\r
-.set CYDEV_PHUB_TDMEM50_BASE, 0x40007990\r
-.set CYDEV_PHUB_TDMEM50_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM50_ORIG_TD0, 0x40007990\r
-.set CYREG_PHUB_TDMEM50_ORIG_TD1, 0x40007994\r
-.set CYDEV_PHUB_TDMEM51_BASE, 0x40007998\r
-.set CYDEV_PHUB_TDMEM51_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM51_ORIG_TD0, 0x40007998\r
-.set CYREG_PHUB_TDMEM51_ORIG_TD1, 0x4000799c\r
-.set CYDEV_PHUB_TDMEM52_BASE, 0x400079a0\r
-.set CYDEV_PHUB_TDMEM52_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM52_ORIG_TD0, 0x400079a0\r
-.set CYREG_PHUB_TDMEM52_ORIG_TD1, 0x400079a4\r
-.set CYDEV_PHUB_TDMEM53_BASE, 0x400079a8\r
-.set CYDEV_PHUB_TDMEM53_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM53_ORIG_TD0, 0x400079a8\r
-.set CYREG_PHUB_TDMEM53_ORIG_TD1, 0x400079ac\r
-.set CYDEV_PHUB_TDMEM54_BASE, 0x400079b0\r
-.set CYDEV_PHUB_TDMEM54_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM54_ORIG_TD0, 0x400079b0\r
-.set CYREG_PHUB_TDMEM54_ORIG_TD1, 0x400079b4\r
-.set CYDEV_PHUB_TDMEM55_BASE, 0x400079b8\r
-.set CYDEV_PHUB_TDMEM55_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM55_ORIG_TD0, 0x400079b8\r
-.set CYREG_PHUB_TDMEM55_ORIG_TD1, 0x400079bc\r
-.set CYDEV_PHUB_TDMEM56_BASE, 0x400079c0\r
-.set CYDEV_PHUB_TDMEM56_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM56_ORIG_TD0, 0x400079c0\r
-.set CYREG_PHUB_TDMEM56_ORIG_TD1, 0x400079c4\r
-.set CYDEV_PHUB_TDMEM57_BASE, 0x400079c8\r
-.set CYDEV_PHUB_TDMEM57_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM57_ORIG_TD0, 0x400079c8\r
-.set CYREG_PHUB_TDMEM57_ORIG_TD1, 0x400079cc\r
-.set CYDEV_PHUB_TDMEM58_BASE, 0x400079d0\r
-.set CYDEV_PHUB_TDMEM58_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM58_ORIG_TD0, 0x400079d0\r
-.set CYREG_PHUB_TDMEM58_ORIG_TD1, 0x400079d4\r
-.set CYDEV_PHUB_TDMEM59_BASE, 0x400079d8\r
-.set CYDEV_PHUB_TDMEM59_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM59_ORIG_TD0, 0x400079d8\r
-.set CYREG_PHUB_TDMEM59_ORIG_TD1, 0x400079dc\r
-.set CYDEV_PHUB_TDMEM60_BASE, 0x400079e0\r
-.set CYDEV_PHUB_TDMEM60_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM60_ORIG_TD0, 0x400079e0\r
-.set CYREG_PHUB_TDMEM60_ORIG_TD1, 0x400079e4\r
-.set CYDEV_PHUB_TDMEM61_BASE, 0x400079e8\r
-.set CYDEV_PHUB_TDMEM61_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM61_ORIG_TD0, 0x400079e8\r
-.set CYREG_PHUB_TDMEM61_ORIG_TD1, 0x400079ec\r
-.set CYDEV_PHUB_TDMEM62_BASE, 0x400079f0\r
-.set CYDEV_PHUB_TDMEM62_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM62_ORIG_TD0, 0x400079f0\r
-.set CYREG_PHUB_TDMEM62_ORIG_TD1, 0x400079f4\r
-.set CYDEV_PHUB_TDMEM63_BASE, 0x400079f8\r
-.set CYDEV_PHUB_TDMEM63_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM63_ORIG_TD0, 0x400079f8\r
-.set CYREG_PHUB_TDMEM63_ORIG_TD1, 0x400079fc\r
-.set CYDEV_PHUB_TDMEM64_BASE, 0x40007a00\r
-.set CYDEV_PHUB_TDMEM64_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM64_ORIG_TD0, 0x40007a00\r
-.set CYREG_PHUB_TDMEM64_ORIG_TD1, 0x40007a04\r
-.set CYDEV_PHUB_TDMEM65_BASE, 0x40007a08\r
-.set CYDEV_PHUB_TDMEM65_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM65_ORIG_TD0, 0x40007a08\r
-.set CYREG_PHUB_TDMEM65_ORIG_TD1, 0x40007a0c\r
-.set CYDEV_PHUB_TDMEM66_BASE, 0x40007a10\r
-.set CYDEV_PHUB_TDMEM66_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM66_ORIG_TD0, 0x40007a10\r
-.set CYREG_PHUB_TDMEM66_ORIG_TD1, 0x40007a14\r
-.set CYDEV_PHUB_TDMEM67_BASE, 0x40007a18\r
-.set CYDEV_PHUB_TDMEM67_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM67_ORIG_TD0, 0x40007a18\r
-.set CYREG_PHUB_TDMEM67_ORIG_TD1, 0x40007a1c\r
-.set CYDEV_PHUB_TDMEM68_BASE, 0x40007a20\r
-.set CYDEV_PHUB_TDMEM68_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM68_ORIG_TD0, 0x40007a20\r
-.set CYREG_PHUB_TDMEM68_ORIG_TD1, 0x40007a24\r
-.set CYDEV_PHUB_TDMEM69_BASE, 0x40007a28\r
-.set CYDEV_PHUB_TDMEM69_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM69_ORIG_TD0, 0x40007a28\r
-.set CYREG_PHUB_TDMEM69_ORIG_TD1, 0x40007a2c\r
-.set CYDEV_PHUB_TDMEM70_BASE, 0x40007a30\r
-.set CYDEV_PHUB_TDMEM70_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM70_ORIG_TD0, 0x40007a30\r
-.set CYREG_PHUB_TDMEM70_ORIG_TD1, 0x40007a34\r
-.set CYDEV_PHUB_TDMEM71_BASE, 0x40007a38\r
-.set CYDEV_PHUB_TDMEM71_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM71_ORIG_TD0, 0x40007a38\r
-.set CYREG_PHUB_TDMEM71_ORIG_TD1, 0x40007a3c\r
-.set CYDEV_PHUB_TDMEM72_BASE, 0x40007a40\r
-.set CYDEV_PHUB_TDMEM72_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM72_ORIG_TD0, 0x40007a40\r
-.set CYREG_PHUB_TDMEM72_ORIG_TD1, 0x40007a44\r
-.set CYDEV_PHUB_TDMEM73_BASE, 0x40007a48\r
-.set CYDEV_PHUB_TDMEM73_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM73_ORIG_TD0, 0x40007a48\r
-.set CYREG_PHUB_TDMEM73_ORIG_TD1, 0x40007a4c\r
-.set CYDEV_PHUB_TDMEM74_BASE, 0x40007a50\r
-.set CYDEV_PHUB_TDMEM74_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM74_ORIG_TD0, 0x40007a50\r
-.set CYREG_PHUB_TDMEM74_ORIG_TD1, 0x40007a54\r
-.set CYDEV_PHUB_TDMEM75_BASE, 0x40007a58\r
-.set CYDEV_PHUB_TDMEM75_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM75_ORIG_TD0, 0x40007a58\r
-.set CYREG_PHUB_TDMEM75_ORIG_TD1, 0x40007a5c\r
-.set CYDEV_PHUB_TDMEM76_BASE, 0x40007a60\r
-.set CYDEV_PHUB_TDMEM76_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM76_ORIG_TD0, 0x40007a60\r
-.set CYREG_PHUB_TDMEM76_ORIG_TD1, 0x40007a64\r
-.set CYDEV_PHUB_TDMEM77_BASE, 0x40007a68\r
-.set CYDEV_PHUB_TDMEM77_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM77_ORIG_TD0, 0x40007a68\r
-.set CYREG_PHUB_TDMEM77_ORIG_TD1, 0x40007a6c\r
-.set CYDEV_PHUB_TDMEM78_BASE, 0x40007a70\r
-.set CYDEV_PHUB_TDMEM78_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM78_ORIG_TD0, 0x40007a70\r
-.set CYREG_PHUB_TDMEM78_ORIG_TD1, 0x40007a74\r
-.set CYDEV_PHUB_TDMEM79_BASE, 0x40007a78\r
-.set CYDEV_PHUB_TDMEM79_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM79_ORIG_TD0, 0x40007a78\r
-.set CYREG_PHUB_TDMEM79_ORIG_TD1, 0x40007a7c\r
-.set CYDEV_PHUB_TDMEM80_BASE, 0x40007a80\r
-.set CYDEV_PHUB_TDMEM80_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM80_ORIG_TD0, 0x40007a80\r
-.set CYREG_PHUB_TDMEM80_ORIG_TD1, 0x40007a84\r
-.set CYDEV_PHUB_TDMEM81_BASE, 0x40007a88\r
-.set CYDEV_PHUB_TDMEM81_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM81_ORIG_TD0, 0x40007a88\r
-.set CYREG_PHUB_TDMEM81_ORIG_TD1, 0x40007a8c\r
-.set CYDEV_PHUB_TDMEM82_BASE, 0x40007a90\r
-.set CYDEV_PHUB_TDMEM82_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM82_ORIG_TD0, 0x40007a90\r
-.set CYREG_PHUB_TDMEM82_ORIG_TD1, 0x40007a94\r
-.set CYDEV_PHUB_TDMEM83_BASE, 0x40007a98\r
-.set CYDEV_PHUB_TDMEM83_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM83_ORIG_TD0, 0x40007a98\r
-.set CYREG_PHUB_TDMEM83_ORIG_TD1, 0x40007a9c\r
-.set CYDEV_PHUB_TDMEM84_BASE, 0x40007aa0\r
-.set CYDEV_PHUB_TDMEM84_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM84_ORIG_TD0, 0x40007aa0\r
-.set CYREG_PHUB_TDMEM84_ORIG_TD1, 0x40007aa4\r
-.set CYDEV_PHUB_TDMEM85_BASE, 0x40007aa8\r
-.set CYDEV_PHUB_TDMEM85_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM85_ORIG_TD0, 0x40007aa8\r
-.set CYREG_PHUB_TDMEM85_ORIG_TD1, 0x40007aac\r
-.set CYDEV_PHUB_TDMEM86_BASE, 0x40007ab0\r
-.set CYDEV_PHUB_TDMEM86_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM86_ORIG_TD0, 0x40007ab0\r
-.set CYREG_PHUB_TDMEM86_ORIG_TD1, 0x40007ab4\r
-.set CYDEV_PHUB_TDMEM87_BASE, 0x40007ab8\r
-.set CYDEV_PHUB_TDMEM87_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM87_ORIG_TD0, 0x40007ab8\r
-.set CYREG_PHUB_TDMEM87_ORIG_TD1, 0x40007abc\r
-.set CYDEV_PHUB_TDMEM88_BASE, 0x40007ac0\r
-.set CYDEV_PHUB_TDMEM88_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM88_ORIG_TD0, 0x40007ac0\r
-.set CYREG_PHUB_TDMEM88_ORIG_TD1, 0x40007ac4\r
-.set CYDEV_PHUB_TDMEM89_BASE, 0x40007ac8\r
-.set CYDEV_PHUB_TDMEM89_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM89_ORIG_TD0, 0x40007ac8\r
-.set CYREG_PHUB_TDMEM89_ORIG_TD1, 0x40007acc\r
-.set CYDEV_PHUB_TDMEM90_BASE, 0x40007ad0\r
-.set CYDEV_PHUB_TDMEM90_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM90_ORIG_TD0, 0x40007ad0\r
-.set CYREG_PHUB_TDMEM90_ORIG_TD1, 0x40007ad4\r
-.set CYDEV_PHUB_TDMEM91_BASE, 0x40007ad8\r
-.set CYDEV_PHUB_TDMEM91_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM91_ORIG_TD0, 0x40007ad8\r
-.set CYREG_PHUB_TDMEM91_ORIG_TD1, 0x40007adc\r
-.set CYDEV_PHUB_TDMEM92_BASE, 0x40007ae0\r
-.set CYDEV_PHUB_TDMEM92_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM92_ORIG_TD0, 0x40007ae0\r
-.set CYREG_PHUB_TDMEM92_ORIG_TD1, 0x40007ae4\r
-.set CYDEV_PHUB_TDMEM93_BASE, 0x40007ae8\r
-.set CYDEV_PHUB_TDMEM93_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM93_ORIG_TD0, 0x40007ae8\r
-.set CYREG_PHUB_TDMEM93_ORIG_TD1, 0x40007aec\r
-.set CYDEV_PHUB_TDMEM94_BASE, 0x40007af0\r
-.set CYDEV_PHUB_TDMEM94_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM94_ORIG_TD0, 0x40007af0\r
-.set CYREG_PHUB_TDMEM94_ORIG_TD1, 0x40007af4\r
-.set CYDEV_PHUB_TDMEM95_BASE, 0x40007af8\r
-.set CYDEV_PHUB_TDMEM95_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM95_ORIG_TD0, 0x40007af8\r
-.set CYREG_PHUB_TDMEM95_ORIG_TD1, 0x40007afc\r
-.set CYDEV_PHUB_TDMEM96_BASE, 0x40007b00\r
-.set CYDEV_PHUB_TDMEM96_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM96_ORIG_TD0, 0x40007b00\r
-.set CYREG_PHUB_TDMEM96_ORIG_TD1, 0x40007b04\r
-.set CYDEV_PHUB_TDMEM97_BASE, 0x40007b08\r
-.set CYDEV_PHUB_TDMEM97_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM97_ORIG_TD0, 0x40007b08\r
-.set CYREG_PHUB_TDMEM97_ORIG_TD1, 0x40007b0c\r
-.set CYDEV_PHUB_TDMEM98_BASE, 0x40007b10\r
-.set CYDEV_PHUB_TDMEM98_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM98_ORIG_TD0, 0x40007b10\r
-.set CYREG_PHUB_TDMEM98_ORIG_TD1, 0x40007b14\r
-.set CYDEV_PHUB_TDMEM99_BASE, 0x40007b18\r
-.set CYDEV_PHUB_TDMEM99_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM99_ORIG_TD0, 0x40007b18\r
-.set CYREG_PHUB_TDMEM99_ORIG_TD1, 0x40007b1c\r
-.set CYDEV_PHUB_TDMEM100_BASE, 0x40007b20\r
-.set CYDEV_PHUB_TDMEM100_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM100_ORIG_TD0, 0x40007b20\r
-.set CYREG_PHUB_TDMEM100_ORIG_TD1, 0x40007b24\r
-.set CYDEV_PHUB_TDMEM101_BASE, 0x40007b28\r
-.set CYDEV_PHUB_TDMEM101_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM101_ORIG_TD0, 0x40007b28\r
-.set CYREG_PHUB_TDMEM101_ORIG_TD1, 0x40007b2c\r
-.set CYDEV_PHUB_TDMEM102_BASE, 0x40007b30\r
-.set CYDEV_PHUB_TDMEM102_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM102_ORIG_TD0, 0x40007b30\r
-.set CYREG_PHUB_TDMEM102_ORIG_TD1, 0x40007b34\r
-.set CYDEV_PHUB_TDMEM103_BASE, 0x40007b38\r
-.set CYDEV_PHUB_TDMEM103_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM103_ORIG_TD0, 0x40007b38\r
-.set CYREG_PHUB_TDMEM103_ORIG_TD1, 0x40007b3c\r
-.set CYDEV_PHUB_TDMEM104_BASE, 0x40007b40\r
-.set CYDEV_PHUB_TDMEM104_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM104_ORIG_TD0, 0x40007b40\r
-.set CYREG_PHUB_TDMEM104_ORIG_TD1, 0x40007b44\r
-.set CYDEV_PHUB_TDMEM105_BASE, 0x40007b48\r
-.set CYDEV_PHUB_TDMEM105_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM105_ORIG_TD0, 0x40007b48\r
-.set CYREG_PHUB_TDMEM105_ORIG_TD1, 0x40007b4c\r
-.set CYDEV_PHUB_TDMEM106_BASE, 0x40007b50\r
-.set CYDEV_PHUB_TDMEM106_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM106_ORIG_TD0, 0x40007b50\r
-.set CYREG_PHUB_TDMEM106_ORIG_TD1, 0x40007b54\r
-.set CYDEV_PHUB_TDMEM107_BASE, 0x40007b58\r
-.set CYDEV_PHUB_TDMEM107_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM107_ORIG_TD0, 0x40007b58\r
-.set CYREG_PHUB_TDMEM107_ORIG_TD1, 0x40007b5c\r
-.set CYDEV_PHUB_TDMEM108_BASE, 0x40007b60\r
-.set CYDEV_PHUB_TDMEM108_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM108_ORIG_TD0, 0x40007b60\r
-.set CYREG_PHUB_TDMEM108_ORIG_TD1, 0x40007b64\r
-.set CYDEV_PHUB_TDMEM109_BASE, 0x40007b68\r
-.set CYDEV_PHUB_TDMEM109_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM109_ORIG_TD0, 0x40007b68\r
-.set CYREG_PHUB_TDMEM109_ORIG_TD1, 0x40007b6c\r
-.set CYDEV_PHUB_TDMEM110_BASE, 0x40007b70\r
-.set CYDEV_PHUB_TDMEM110_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM110_ORIG_TD0, 0x40007b70\r
-.set CYREG_PHUB_TDMEM110_ORIG_TD1, 0x40007b74\r
-.set CYDEV_PHUB_TDMEM111_BASE, 0x40007b78\r
-.set CYDEV_PHUB_TDMEM111_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM111_ORIG_TD0, 0x40007b78\r
-.set CYREG_PHUB_TDMEM111_ORIG_TD1, 0x40007b7c\r
-.set CYDEV_PHUB_TDMEM112_BASE, 0x40007b80\r
-.set CYDEV_PHUB_TDMEM112_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM112_ORIG_TD0, 0x40007b80\r
-.set CYREG_PHUB_TDMEM112_ORIG_TD1, 0x40007b84\r
-.set CYDEV_PHUB_TDMEM113_BASE, 0x40007b88\r
-.set CYDEV_PHUB_TDMEM113_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM113_ORIG_TD0, 0x40007b88\r
-.set CYREG_PHUB_TDMEM113_ORIG_TD1, 0x40007b8c\r
-.set CYDEV_PHUB_TDMEM114_BASE, 0x40007b90\r
-.set CYDEV_PHUB_TDMEM114_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM114_ORIG_TD0, 0x40007b90\r
-.set CYREG_PHUB_TDMEM114_ORIG_TD1, 0x40007b94\r
-.set CYDEV_PHUB_TDMEM115_BASE, 0x40007b98\r
-.set CYDEV_PHUB_TDMEM115_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM115_ORIG_TD0, 0x40007b98\r
-.set CYREG_PHUB_TDMEM115_ORIG_TD1, 0x40007b9c\r
-.set CYDEV_PHUB_TDMEM116_BASE, 0x40007ba0\r
-.set CYDEV_PHUB_TDMEM116_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM116_ORIG_TD0, 0x40007ba0\r
-.set CYREG_PHUB_TDMEM116_ORIG_TD1, 0x40007ba4\r
-.set CYDEV_PHUB_TDMEM117_BASE, 0x40007ba8\r
-.set CYDEV_PHUB_TDMEM117_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM117_ORIG_TD0, 0x40007ba8\r
-.set CYREG_PHUB_TDMEM117_ORIG_TD1, 0x40007bac\r
-.set CYDEV_PHUB_TDMEM118_BASE, 0x40007bb0\r
-.set CYDEV_PHUB_TDMEM118_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM118_ORIG_TD0, 0x40007bb0\r
-.set CYREG_PHUB_TDMEM118_ORIG_TD1, 0x40007bb4\r
-.set CYDEV_PHUB_TDMEM119_BASE, 0x40007bb8\r
-.set CYDEV_PHUB_TDMEM119_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM119_ORIG_TD0, 0x40007bb8\r
-.set CYREG_PHUB_TDMEM119_ORIG_TD1, 0x40007bbc\r
-.set CYDEV_PHUB_TDMEM120_BASE, 0x40007bc0\r
-.set CYDEV_PHUB_TDMEM120_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM120_ORIG_TD0, 0x40007bc0\r
-.set CYREG_PHUB_TDMEM120_ORIG_TD1, 0x40007bc4\r
-.set CYDEV_PHUB_TDMEM121_BASE, 0x40007bc8\r
-.set CYDEV_PHUB_TDMEM121_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM121_ORIG_TD0, 0x40007bc8\r
-.set CYREG_PHUB_TDMEM121_ORIG_TD1, 0x40007bcc\r
-.set CYDEV_PHUB_TDMEM122_BASE, 0x40007bd0\r
-.set CYDEV_PHUB_TDMEM122_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM122_ORIG_TD0, 0x40007bd0\r
-.set CYREG_PHUB_TDMEM122_ORIG_TD1, 0x40007bd4\r
-.set CYDEV_PHUB_TDMEM123_BASE, 0x40007bd8\r
-.set CYDEV_PHUB_TDMEM123_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM123_ORIG_TD0, 0x40007bd8\r
-.set CYREG_PHUB_TDMEM123_ORIG_TD1, 0x40007bdc\r
-.set CYDEV_PHUB_TDMEM124_BASE, 0x40007be0\r
-.set CYDEV_PHUB_TDMEM124_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM124_ORIG_TD0, 0x40007be0\r
-.set CYREG_PHUB_TDMEM124_ORIG_TD1, 0x40007be4\r
-.set CYDEV_PHUB_TDMEM125_BASE, 0x40007be8\r
-.set CYDEV_PHUB_TDMEM125_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM125_ORIG_TD0, 0x40007be8\r
-.set CYREG_PHUB_TDMEM125_ORIG_TD1, 0x40007bec\r
-.set CYDEV_PHUB_TDMEM126_BASE, 0x40007bf0\r
-.set CYDEV_PHUB_TDMEM126_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM126_ORIG_TD0, 0x40007bf0\r
-.set CYREG_PHUB_TDMEM126_ORIG_TD1, 0x40007bf4\r
-.set CYDEV_PHUB_TDMEM127_BASE, 0x40007bf8\r
-.set CYDEV_PHUB_TDMEM127_SIZE, 0x00000008\r
-.set CYREG_PHUB_TDMEM127_ORIG_TD0, 0x40007bf8\r
-.set CYREG_PHUB_TDMEM127_ORIG_TD1, 0x40007bfc\r
-.set CYDEV_EE_BASE, 0x40008000\r
-.set CYDEV_EE_SIZE, 0x00000800\r
-.set CYREG_EE_DATA_MBASE, 0x40008000\r
-.set CYREG_EE_DATA_MSIZE, 0x00000800\r
-.set CYDEV_CAN0_BASE, 0x4000a000\r
-.set CYDEV_CAN0_SIZE, 0x000002a0\r
-.set CYDEV_CAN0_CSR_BASE, 0x4000a000\r
-.set CYDEV_CAN0_CSR_SIZE, 0x00000018\r
-.set CYREG_CAN0_CSR_INT_SR, 0x4000a000\r
-.set CYREG_CAN0_CSR_INT_EN, 0x4000a004\r
-.set CYREG_CAN0_CSR_BUF_SR, 0x4000a008\r
-.set CYREG_CAN0_CSR_ERR_SR, 0x4000a00c\r
-.set CYREG_CAN0_CSR_CMD, 0x4000a010\r
-.set CYREG_CAN0_CSR_CFG, 0x4000a014\r
-.set CYDEV_CAN0_TX0_BASE, 0x4000a020\r
-.set CYDEV_CAN0_TX0_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX0_CMD, 0x4000a020\r
-.set CYREG_CAN0_TX0_ID, 0x4000a024\r
-.set CYREG_CAN0_TX0_DH, 0x4000a028\r
-.set CYREG_CAN0_TX0_DL, 0x4000a02c\r
-.set CYDEV_CAN0_TX1_BASE, 0x4000a030\r
-.set CYDEV_CAN0_TX1_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX1_CMD, 0x4000a030\r
-.set CYREG_CAN0_TX1_ID, 0x4000a034\r
-.set CYREG_CAN0_TX1_DH, 0x4000a038\r
-.set CYREG_CAN0_TX1_DL, 0x4000a03c\r
-.set CYDEV_CAN0_TX2_BASE, 0x4000a040\r
-.set CYDEV_CAN0_TX2_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX2_CMD, 0x4000a040\r
-.set CYREG_CAN0_TX2_ID, 0x4000a044\r
-.set CYREG_CAN0_TX2_DH, 0x4000a048\r
-.set CYREG_CAN0_TX2_DL, 0x4000a04c\r
-.set CYDEV_CAN0_TX3_BASE, 0x4000a050\r
-.set CYDEV_CAN0_TX3_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX3_CMD, 0x4000a050\r
-.set CYREG_CAN0_TX3_ID, 0x4000a054\r
-.set CYREG_CAN0_TX3_DH, 0x4000a058\r
-.set CYREG_CAN0_TX3_DL, 0x4000a05c\r
-.set CYDEV_CAN0_TX4_BASE, 0x4000a060\r
-.set CYDEV_CAN0_TX4_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX4_CMD, 0x4000a060\r
-.set CYREG_CAN0_TX4_ID, 0x4000a064\r
-.set CYREG_CAN0_TX4_DH, 0x4000a068\r
-.set CYREG_CAN0_TX4_DL, 0x4000a06c\r
-.set CYDEV_CAN0_TX5_BASE, 0x4000a070\r
-.set CYDEV_CAN0_TX5_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX5_CMD, 0x4000a070\r
-.set CYREG_CAN0_TX5_ID, 0x4000a074\r
-.set CYREG_CAN0_TX5_DH, 0x4000a078\r
-.set CYREG_CAN0_TX5_DL, 0x4000a07c\r
-.set CYDEV_CAN0_TX6_BASE, 0x4000a080\r
-.set CYDEV_CAN0_TX6_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX6_CMD, 0x4000a080\r
-.set CYREG_CAN0_TX6_ID, 0x4000a084\r
-.set CYREG_CAN0_TX6_DH, 0x4000a088\r
-.set CYREG_CAN0_TX6_DL, 0x4000a08c\r
-.set CYDEV_CAN0_TX7_BASE, 0x4000a090\r
-.set CYDEV_CAN0_TX7_SIZE, 0x00000010\r
-.set CYREG_CAN0_TX7_CMD, 0x4000a090\r
-.set CYREG_CAN0_TX7_ID, 0x4000a094\r
-.set CYREG_CAN0_TX7_DH, 0x4000a098\r
-.set CYREG_CAN0_TX7_DL, 0x4000a09c\r
-.set CYDEV_CAN0_RX0_BASE, 0x4000a0a0\r
-.set CYDEV_CAN0_RX0_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX0_CMD, 0x4000a0a0\r
-.set CYREG_CAN0_RX0_ID, 0x4000a0a4\r
-.set CYREG_CAN0_RX0_DH, 0x4000a0a8\r
-.set CYREG_CAN0_RX0_DL, 0x4000a0ac\r
-.set CYREG_CAN0_RX0_AMR, 0x4000a0b0\r
-.set CYREG_CAN0_RX0_ACR, 0x4000a0b4\r
-.set CYREG_CAN0_RX0_AMRD, 0x4000a0b8\r
-.set CYREG_CAN0_RX0_ACRD, 0x4000a0bc\r
-.set CYDEV_CAN0_RX1_BASE, 0x4000a0c0\r
-.set CYDEV_CAN0_RX1_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX1_CMD, 0x4000a0c0\r
-.set CYREG_CAN0_RX1_ID, 0x4000a0c4\r
-.set CYREG_CAN0_RX1_DH, 0x4000a0c8\r
-.set CYREG_CAN0_RX1_DL, 0x4000a0cc\r
-.set CYREG_CAN0_RX1_AMR, 0x4000a0d0\r
-.set CYREG_CAN0_RX1_ACR, 0x4000a0d4\r
-.set CYREG_CAN0_RX1_AMRD, 0x4000a0d8\r
-.set CYREG_CAN0_RX1_ACRD, 0x4000a0dc\r
-.set CYDEV_CAN0_RX2_BASE, 0x4000a0e0\r
-.set CYDEV_CAN0_RX2_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX2_CMD, 0x4000a0e0\r
-.set CYREG_CAN0_RX2_ID, 0x4000a0e4\r
-.set CYREG_CAN0_RX2_DH, 0x4000a0e8\r
-.set CYREG_CAN0_RX2_DL, 0x4000a0ec\r
-.set CYREG_CAN0_RX2_AMR, 0x4000a0f0\r
-.set CYREG_CAN0_RX2_ACR, 0x4000a0f4\r
-.set CYREG_CAN0_RX2_AMRD, 0x4000a0f8\r
-.set CYREG_CAN0_RX2_ACRD, 0x4000a0fc\r
-.set CYDEV_CAN0_RX3_BASE, 0x4000a100\r
-.set CYDEV_CAN0_RX3_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX3_CMD, 0x4000a100\r
-.set CYREG_CAN0_RX3_ID, 0x4000a104\r
-.set CYREG_CAN0_RX3_DH, 0x4000a108\r
-.set CYREG_CAN0_RX3_DL, 0x4000a10c\r
-.set CYREG_CAN0_RX3_AMR, 0x4000a110\r
-.set CYREG_CAN0_RX3_ACR, 0x4000a114\r
-.set CYREG_CAN0_RX3_AMRD, 0x4000a118\r
-.set CYREG_CAN0_RX3_ACRD, 0x4000a11c\r
-.set CYDEV_CAN0_RX4_BASE, 0x4000a120\r
-.set CYDEV_CAN0_RX4_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX4_CMD, 0x4000a120\r
-.set CYREG_CAN0_RX4_ID, 0x4000a124\r
-.set CYREG_CAN0_RX4_DH, 0x4000a128\r
-.set CYREG_CAN0_RX4_DL, 0x4000a12c\r
-.set CYREG_CAN0_RX4_AMR, 0x4000a130\r
-.set CYREG_CAN0_RX4_ACR, 0x4000a134\r
-.set CYREG_CAN0_RX4_AMRD, 0x4000a138\r
-.set CYREG_CAN0_RX4_ACRD, 0x4000a13c\r
-.set CYDEV_CAN0_RX5_BASE, 0x4000a140\r
-.set CYDEV_CAN0_RX5_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX5_CMD, 0x4000a140\r
-.set CYREG_CAN0_RX5_ID, 0x4000a144\r
-.set CYREG_CAN0_RX5_DH, 0x4000a148\r
-.set CYREG_CAN0_RX5_DL, 0x4000a14c\r
-.set CYREG_CAN0_RX5_AMR, 0x4000a150\r
-.set CYREG_CAN0_RX5_ACR, 0x4000a154\r
-.set CYREG_CAN0_RX5_AMRD, 0x4000a158\r
-.set CYREG_CAN0_RX5_ACRD, 0x4000a15c\r
-.set CYDEV_CAN0_RX6_BASE, 0x4000a160\r
-.set CYDEV_CAN0_RX6_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX6_CMD, 0x4000a160\r
-.set CYREG_CAN0_RX6_ID, 0x4000a164\r
-.set CYREG_CAN0_RX6_DH, 0x4000a168\r
-.set CYREG_CAN0_RX6_DL, 0x4000a16c\r
-.set CYREG_CAN0_RX6_AMR, 0x4000a170\r
-.set CYREG_CAN0_RX6_ACR, 0x4000a174\r
-.set CYREG_CAN0_RX6_AMRD, 0x4000a178\r
-.set CYREG_CAN0_RX6_ACRD, 0x4000a17c\r
-.set CYDEV_CAN0_RX7_BASE, 0x4000a180\r
-.set CYDEV_CAN0_RX7_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX7_CMD, 0x4000a180\r
-.set CYREG_CAN0_RX7_ID, 0x4000a184\r
-.set CYREG_CAN0_RX7_DH, 0x4000a188\r
-.set CYREG_CAN0_RX7_DL, 0x4000a18c\r
-.set CYREG_CAN0_RX7_AMR, 0x4000a190\r
-.set CYREG_CAN0_RX7_ACR, 0x4000a194\r
-.set CYREG_CAN0_RX7_AMRD, 0x4000a198\r
-.set CYREG_CAN0_RX7_ACRD, 0x4000a19c\r
-.set CYDEV_CAN0_RX8_BASE, 0x4000a1a0\r
-.set CYDEV_CAN0_RX8_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX8_CMD, 0x4000a1a0\r
-.set CYREG_CAN0_RX8_ID, 0x4000a1a4\r
-.set CYREG_CAN0_RX8_DH, 0x4000a1a8\r
-.set CYREG_CAN0_RX8_DL, 0x4000a1ac\r
-.set CYREG_CAN0_RX8_AMR, 0x4000a1b0\r
-.set CYREG_CAN0_RX8_ACR, 0x4000a1b4\r
-.set CYREG_CAN0_RX8_AMRD, 0x4000a1b8\r
-.set CYREG_CAN0_RX8_ACRD, 0x4000a1bc\r
-.set CYDEV_CAN0_RX9_BASE, 0x4000a1c0\r
-.set CYDEV_CAN0_RX9_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX9_CMD, 0x4000a1c0\r
-.set CYREG_CAN0_RX9_ID, 0x4000a1c4\r
-.set CYREG_CAN0_RX9_DH, 0x4000a1c8\r
-.set CYREG_CAN0_RX9_DL, 0x4000a1cc\r
-.set CYREG_CAN0_RX9_AMR, 0x4000a1d0\r
-.set CYREG_CAN0_RX9_ACR, 0x4000a1d4\r
-.set CYREG_CAN0_RX9_AMRD, 0x4000a1d8\r
-.set CYREG_CAN0_RX9_ACRD, 0x4000a1dc\r
-.set CYDEV_CAN0_RX10_BASE, 0x4000a1e0\r
-.set CYDEV_CAN0_RX10_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX10_CMD, 0x4000a1e0\r
-.set CYREG_CAN0_RX10_ID, 0x4000a1e4\r
-.set CYREG_CAN0_RX10_DH, 0x4000a1e8\r
-.set CYREG_CAN0_RX10_DL, 0x4000a1ec\r
-.set CYREG_CAN0_RX10_AMR, 0x4000a1f0\r
-.set CYREG_CAN0_RX10_ACR, 0x4000a1f4\r
-.set CYREG_CAN0_RX10_AMRD, 0x4000a1f8\r
-.set CYREG_CAN0_RX10_ACRD, 0x4000a1fc\r
-.set CYDEV_CAN0_RX11_BASE, 0x4000a200\r
-.set CYDEV_CAN0_RX11_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX11_CMD, 0x4000a200\r
-.set CYREG_CAN0_RX11_ID, 0x4000a204\r
-.set CYREG_CAN0_RX11_DH, 0x4000a208\r
-.set CYREG_CAN0_RX11_DL, 0x4000a20c\r
-.set CYREG_CAN0_RX11_AMR, 0x4000a210\r
-.set CYREG_CAN0_RX11_ACR, 0x4000a214\r
-.set CYREG_CAN0_RX11_AMRD, 0x4000a218\r
-.set CYREG_CAN0_RX11_ACRD, 0x4000a21c\r
-.set CYDEV_CAN0_RX12_BASE, 0x4000a220\r
-.set CYDEV_CAN0_RX12_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX12_CMD, 0x4000a220\r
-.set CYREG_CAN0_RX12_ID, 0x4000a224\r
-.set CYREG_CAN0_RX12_DH, 0x4000a228\r
-.set CYREG_CAN0_RX12_DL, 0x4000a22c\r
-.set CYREG_CAN0_RX12_AMR, 0x4000a230\r
-.set CYREG_CAN0_RX12_ACR, 0x4000a234\r
-.set CYREG_CAN0_RX12_AMRD, 0x4000a238\r
-.set CYREG_CAN0_RX12_ACRD, 0x4000a23c\r
-.set CYDEV_CAN0_RX13_BASE, 0x4000a240\r
-.set CYDEV_CAN0_RX13_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX13_CMD, 0x4000a240\r
-.set CYREG_CAN0_RX13_ID, 0x4000a244\r
-.set CYREG_CAN0_RX13_DH, 0x4000a248\r
-.set CYREG_CAN0_RX13_DL, 0x4000a24c\r
-.set CYREG_CAN0_RX13_AMR, 0x4000a250\r
-.set CYREG_CAN0_RX13_ACR, 0x4000a254\r
-.set CYREG_CAN0_RX13_AMRD, 0x4000a258\r
-.set CYREG_CAN0_RX13_ACRD, 0x4000a25c\r
-.set CYDEV_CAN0_RX14_BASE, 0x4000a260\r
-.set CYDEV_CAN0_RX14_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX14_CMD, 0x4000a260\r
-.set CYREG_CAN0_RX14_ID, 0x4000a264\r
-.set CYREG_CAN0_RX14_DH, 0x4000a268\r
-.set CYREG_CAN0_RX14_DL, 0x4000a26c\r
-.set CYREG_CAN0_RX14_AMR, 0x4000a270\r
-.set CYREG_CAN0_RX14_ACR, 0x4000a274\r
-.set CYREG_CAN0_RX14_AMRD, 0x4000a278\r
-.set CYREG_CAN0_RX14_ACRD, 0x4000a27c\r
-.set CYDEV_CAN0_RX15_BASE, 0x4000a280\r
-.set CYDEV_CAN0_RX15_SIZE, 0x00000020\r
-.set CYREG_CAN0_RX15_CMD, 0x4000a280\r
-.set CYREG_CAN0_RX15_ID, 0x4000a284\r
-.set CYREG_CAN0_RX15_DH, 0x4000a288\r
-.set CYREG_CAN0_RX15_DL, 0x4000a28c\r
-.set CYREG_CAN0_RX15_AMR, 0x4000a290\r
-.set CYREG_CAN0_RX15_ACR, 0x4000a294\r
-.set CYREG_CAN0_RX15_AMRD, 0x4000a298\r
-.set CYREG_CAN0_RX15_ACRD, 0x4000a29c\r
-.set CYDEV_DFB0_BASE, 0x4000c000\r
-.set CYDEV_DFB0_SIZE, 0x000007b5\r
-.set CYDEV_DFB0_DPA_SRAM_BASE, 0x4000c000\r
-.set CYDEV_DFB0_DPA_SRAM_SIZE, 0x00000200\r
-.set CYREG_DFB0_DPA_SRAM_DATA_MBASE, 0x4000c000\r
-.set CYREG_DFB0_DPA_SRAM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_DFB0_DPB_SRAM_BASE, 0x4000c200\r
-.set CYDEV_DFB0_DPB_SRAM_SIZE, 0x00000200\r
-.set CYREG_DFB0_DPB_SRAM_DATA_MBASE, 0x4000c200\r
-.set CYREG_DFB0_DPB_SRAM_DATA_MSIZE, 0x00000200\r
-.set CYDEV_DFB0_CSA_SRAM_BASE, 0x4000c400\r
-.set CYDEV_DFB0_CSA_SRAM_SIZE, 0x00000100\r
-.set CYREG_DFB0_CSA_SRAM_DATA_MBASE, 0x4000c400\r
-.set CYREG_DFB0_CSA_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_CSB_SRAM_BASE, 0x4000c500\r
-.set CYDEV_DFB0_CSB_SRAM_SIZE, 0x00000100\r
-.set CYREG_DFB0_CSB_SRAM_DATA_MBASE, 0x4000c500\r
-.set CYREG_DFB0_CSB_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_FSM_SRAM_BASE, 0x4000c600\r
-.set CYDEV_DFB0_FSM_SRAM_SIZE, 0x00000100\r
-.set CYREG_DFB0_FSM_SRAM_DATA_MBASE, 0x4000c600\r
-.set CYREG_DFB0_FSM_SRAM_DATA_MSIZE, 0x00000100\r
-.set CYDEV_DFB0_ACU_SRAM_BASE, 0x4000c700\r
-.set CYDEV_DFB0_ACU_SRAM_SIZE, 0x00000040\r
-.set CYREG_DFB0_ACU_SRAM_DATA_MBASE, 0x4000c700\r
-.set CYREG_DFB0_ACU_SRAM_DATA_MSIZE, 0x00000040\r
-.set CYREG_DFB0_CR, 0x4000c780\r
-.set CYREG_DFB0_SR, 0x4000c784\r
-.set CYREG_DFB0_RAM_EN, 0x4000c788\r
-.set CYREG_DFB0_RAM_DIR, 0x4000c78c\r
-.set CYREG_DFB0_SEMA, 0x4000c790\r
-.set CYREG_DFB0_DSI_CTRL, 0x4000c794\r
-.set CYREG_DFB0_INT_CTRL, 0x4000c798\r
-.set CYREG_DFB0_DMA_CTRL, 0x4000c79c\r
-.set CYREG_DFB0_STAGEA, 0x4000c7a0\r
-.set CYREG_DFB0_STAGEAM, 0x4000c7a1\r
-.set CYREG_DFB0_STAGEAH, 0x4000c7a2\r
-.set CYREG_DFB0_STAGEB, 0x4000c7a4\r
-.set CYREG_DFB0_STAGEBM, 0x4000c7a5\r
-.set CYREG_DFB0_STAGEBH, 0x4000c7a6\r
-.set CYREG_DFB0_HOLDA, 0x4000c7a8\r
-.set CYREG_DFB0_HOLDAM, 0x4000c7a9\r
-.set CYREG_DFB0_HOLDAH, 0x4000c7aa\r
-.set CYREG_DFB0_HOLDAS, 0x4000c7ab\r
-.set CYREG_DFB0_HOLDB, 0x4000c7ac\r
-.set CYREG_DFB0_HOLDBM, 0x4000c7ad\r
-.set CYREG_DFB0_HOLDBH, 0x4000c7ae\r
-.set CYREG_DFB0_HOLDBS, 0x4000c7af\r
-.set CYREG_DFB0_COHER, 0x4000c7b0\r
-.set CYREG_DFB0_DALIGN, 0x4000c7b4\r
-.set CYDEV_UCFG_BASE, 0x40010000\r
-.set CYDEV_UCFG_SIZE, 0x00005040\r
-.set CYDEV_UCFG_B0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_SIZE, 0x00000fef\r
-.set CYDEV_UCFG_B0_P0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_P0_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P0_U0_BASE, 0x40010000\r
-.set CYDEV_UCFG_B0_P0_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P0_U0_PLD_IT0, 0x40010000\r
-.set CYREG_B0_P0_U0_PLD_IT1, 0x40010004\r
-.set CYREG_B0_P0_U0_PLD_IT2, 0x40010008\r
-.set CYREG_B0_P0_U0_PLD_IT3, 0x4001000c\r
-.set CYREG_B0_P0_U0_PLD_IT4, 0x40010010\r
-.set CYREG_B0_P0_U0_PLD_IT5, 0x40010014\r
-.set CYREG_B0_P0_U0_PLD_IT6, 0x40010018\r
-.set CYREG_B0_P0_U0_PLD_IT7, 0x4001001c\r
-.set CYREG_B0_P0_U0_PLD_IT8, 0x40010020\r
-.set CYREG_B0_P0_U0_PLD_IT9, 0x40010024\r
-.set CYREG_B0_P0_U0_PLD_IT10, 0x40010028\r
-.set CYREG_B0_P0_U0_PLD_IT11, 0x4001002c\r
-.set CYREG_B0_P0_U0_PLD_ORT0, 0x40010030\r
-.set CYREG_B0_P0_U0_PLD_ORT1, 0x40010032\r
-.set CYREG_B0_P0_U0_PLD_ORT2, 0x40010034\r
-.set CYREG_B0_P0_U0_PLD_ORT3, 0x40010036\r
-.set CYREG_B0_P0_U0_MC_CFG_CEN_CONST, 0x40010038\r
-.set CYREG_B0_P0_U0_MC_CFG_XORFB, 0x4001003a\r
-.set CYREG_B0_P0_U0_MC_CFG_SET_RESET, 0x4001003c\r
-.set CYREG_B0_P0_U0_MC_CFG_BYPASS, 0x4001003e\r
-.set CYREG_B0_P0_U0_CFG0, 0x40010040\r
-.set CYREG_B0_P0_U0_CFG1, 0x40010041\r
-.set CYREG_B0_P0_U0_CFG2, 0x40010042\r
-.set CYREG_B0_P0_U0_CFG3, 0x40010043\r
-.set CYREG_B0_P0_U0_CFG4, 0x40010044\r
-.set CYREG_B0_P0_U0_CFG5, 0x40010045\r
-.set CYREG_B0_P0_U0_CFG6, 0x40010046\r
-.set CYREG_B0_P0_U0_CFG7, 0x40010047\r
-.set CYREG_B0_P0_U0_CFG8, 0x40010048\r
-.set CYREG_B0_P0_U0_CFG9, 0x40010049\r
-.set CYREG_B0_P0_U0_CFG10, 0x4001004a\r
-.set CYREG_B0_P0_U0_CFG11, 0x4001004b\r
-.set CYREG_B0_P0_U0_CFG12, 0x4001004c\r
-.set CYREG_B0_P0_U0_CFG13, 0x4001004d\r
-.set CYREG_B0_P0_U0_CFG14, 0x4001004e\r
-.set CYREG_B0_P0_U0_CFG15, 0x4001004f\r
-.set CYREG_B0_P0_U0_CFG16, 0x40010050\r
-.set CYREG_B0_P0_U0_CFG17, 0x40010051\r
-.set CYREG_B0_P0_U0_CFG18, 0x40010052\r
-.set CYREG_B0_P0_U0_CFG19, 0x40010053\r
-.set CYREG_B0_P0_U0_CFG20, 0x40010054\r
-.set CYREG_B0_P0_U0_CFG21, 0x40010055\r
-.set CYREG_B0_P0_U0_CFG22, 0x40010056\r
-.set CYREG_B0_P0_U0_CFG23, 0x40010057\r
-.set CYREG_B0_P0_U0_CFG24, 0x40010058\r
-.set CYREG_B0_P0_U0_CFG25, 0x40010059\r
-.set CYREG_B0_P0_U0_CFG26, 0x4001005a\r
-.set CYREG_B0_P0_U0_CFG27, 0x4001005b\r
-.set CYREG_B0_P0_U0_CFG28, 0x4001005c\r
-.set CYREG_B0_P0_U0_CFG29, 0x4001005d\r
-.set CYREG_B0_P0_U0_CFG30, 0x4001005e\r
-.set CYREG_B0_P0_U0_CFG31, 0x4001005f\r
-.set CYREG_B0_P0_U0_DCFG0, 0x40010060\r
-.set CYREG_B0_P0_U0_DCFG1, 0x40010062\r
-.set CYREG_B0_P0_U0_DCFG2, 0x40010064\r
-.set CYREG_B0_P0_U0_DCFG3, 0x40010066\r
-.set CYREG_B0_P0_U0_DCFG4, 0x40010068\r
-.set CYREG_B0_P0_U0_DCFG5, 0x4001006a\r
-.set CYREG_B0_P0_U0_DCFG6, 0x4001006c\r
-.set CYREG_B0_P0_U0_DCFG7, 0x4001006e\r
-.set CYDEV_UCFG_B0_P0_U1_BASE, 0x40010080\r
-.set CYDEV_UCFG_B0_P0_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P0_U1_PLD_IT0, 0x40010080\r
-.set CYREG_B0_P0_U1_PLD_IT1, 0x40010084\r
-.set CYREG_B0_P0_U1_PLD_IT2, 0x40010088\r
-.set CYREG_B0_P0_U1_PLD_IT3, 0x4001008c\r
-.set CYREG_B0_P0_U1_PLD_IT4, 0x40010090\r
-.set CYREG_B0_P0_U1_PLD_IT5, 0x40010094\r
-.set CYREG_B0_P0_U1_PLD_IT6, 0x40010098\r
-.set CYREG_B0_P0_U1_PLD_IT7, 0x4001009c\r
-.set CYREG_B0_P0_U1_PLD_IT8, 0x400100a0\r
-.set CYREG_B0_P0_U1_PLD_IT9, 0x400100a4\r
-.set CYREG_B0_P0_U1_PLD_IT10, 0x400100a8\r
-.set CYREG_B0_P0_U1_PLD_IT11, 0x400100ac\r
-.set CYREG_B0_P0_U1_PLD_ORT0, 0x400100b0\r
-.set CYREG_B0_P0_U1_PLD_ORT1, 0x400100b2\r
-.set CYREG_B0_P0_U1_PLD_ORT2, 0x400100b4\r
-.set CYREG_B0_P0_U1_PLD_ORT3, 0x400100b6\r
-.set CYREG_B0_P0_U1_MC_CFG_CEN_CONST, 0x400100b8\r
-.set CYREG_B0_P0_U1_MC_CFG_XORFB, 0x400100ba\r
-.set CYREG_B0_P0_U1_MC_CFG_SET_RESET, 0x400100bc\r
-.set CYREG_B0_P0_U1_MC_CFG_BYPASS, 0x400100be\r
-.set CYREG_B0_P0_U1_CFG0, 0x400100c0\r
-.set CYREG_B0_P0_U1_CFG1, 0x400100c1\r
-.set CYREG_B0_P0_U1_CFG2, 0x400100c2\r
-.set CYREG_B0_P0_U1_CFG3, 0x400100c3\r
-.set CYREG_B0_P0_U1_CFG4, 0x400100c4\r
-.set CYREG_B0_P0_U1_CFG5, 0x400100c5\r
-.set CYREG_B0_P0_U1_CFG6, 0x400100c6\r
-.set CYREG_B0_P0_U1_CFG7, 0x400100c7\r
-.set CYREG_B0_P0_U1_CFG8, 0x400100c8\r
-.set CYREG_B0_P0_U1_CFG9, 0x400100c9\r
-.set CYREG_B0_P0_U1_CFG10, 0x400100ca\r
-.set CYREG_B0_P0_U1_CFG11, 0x400100cb\r
-.set CYREG_B0_P0_U1_CFG12, 0x400100cc\r
-.set CYREG_B0_P0_U1_CFG13, 0x400100cd\r
-.set CYREG_B0_P0_U1_CFG14, 0x400100ce\r
-.set CYREG_B0_P0_U1_CFG15, 0x400100cf\r
-.set CYREG_B0_P0_U1_CFG16, 0x400100d0\r
-.set CYREG_B0_P0_U1_CFG17, 0x400100d1\r
-.set CYREG_B0_P0_U1_CFG18, 0x400100d2\r
-.set CYREG_B0_P0_U1_CFG19, 0x400100d3\r
-.set CYREG_B0_P0_U1_CFG20, 0x400100d4\r
-.set CYREG_B0_P0_U1_CFG21, 0x400100d5\r
-.set CYREG_B0_P0_U1_CFG22, 0x400100d6\r
-.set CYREG_B0_P0_U1_CFG23, 0x400100d7\r
-.set CYREG_B0_P0_U1_CFG24, 0x400100d8\r
-.set CYREG_B0_P0_U1_CFG25, 0x400100d9\r
-.set CYREG_B0_P0_U1_CFG26, 0x400100da\r
-.set CYREG_B0_P0_U1_CFG27, 0x400100db\r
-.set CYREG_B0_P0_U1_CFG28, 0x400100dc\r
-.set CYREG_B0_P0_U1_CFG29, 0x400100dd\r
-.set CYREG_B0_P0_U1_CFG30, 0x400100de\r
-.set CYREG_B0_P0_U1_CFG31, 0x400100df\r
-.set CYREG_B0_P0_U1_DCFG0, 0x400100e0\r
-.set CYREG_B0_P0_U1_DCFG1, 0x400100e2\r
-.set CYREG_B0_P0_U1_DCFG2, 0x400100e4\r
-.set CYREG_B0_P0_U1_DCFG3, 0x400100e6\r
-.set CYREG_B0_P0_U1_DCFG4, 0x400100e8\r
-.set CYREG_B0_P0_U1_DCFG5, 0x400100ea\r
-.set CYREG_B0_P0_U1_DCFG6, 0x400100ec\r
-.set CYREG_B0_P0_U1_DCFG7, 0x400100ee\r
-.set CYDEV_UCFG_B0_P0_ROUTE_BASE, 0x40010100\r
-.set CYDEV_UCFG_B0_P0_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P1_BASE, 0x40010200\r
-.set CYDEV_UCFG_B0_P1_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P1_U0_BASE, 0x40010200\r
-.set CYDEV_UCFG_B0_P1_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P1_U0_PLD_IT0, 0x40010200\r
-.set CYREG_B0_P1_U0_PLD_IT1, 0x40010204\r
-.set CYREG_B0_P1_U0_PLD_IT2, 0x40010208\r
-.set CYREG_B0_P1_U0_PLD_IT3, 0x4001020c\r
-.set CYREG_B0_P1_U0_PLD_IT4, 0x40010210\r
-.set CYREG_B0_P1_U0_PLD_IT5, 0x40010214\r
-.set CYREG_B0_P1_U0_PLD_IT6, 0x40010218\r
-.set CYREG_B0_P1_U0_PLD_IT7, 0x4001021c\r
-.set CYREG_B0_P1_U0_PLD_IT8, 0x40010220\r
-.set CYREG_B0_P1_U0_PLD_IT9, 0x40010224\r
-.set CYREG_B0_P1_U0_PLD_IT10, 0x40010228\r
-.set CYREG_B0_P1_U0_PLD_IT11, 0x4001022c\r
-.set CYREG_B0_P1_U0_PLD_ORT0, 0x40010230\r
-.set CYREG_B0_P1_U0_PLD_ORT1, 0x40010232\r
-.set CYREG_B0_P1_U0_PLD_ORT2, 0x40010234\r
-.set CYREG_B0_P1_U0_PLD_ORT3, 0x40010236\r
-.set CYREG_B0_P1_U0_MC_CFG_CEN_CONST, 0x40010238\r
-.set CYREG_B0_P1_U0_MC_CFG_XORFB, 0x4001023a\r
-.set CYREG_B0_P1_U0_MC_CFG_SET_RESET, 0x4001023c\r
-.set CYREG_B0_P1_U0_MC_CFG_BYPASS, 0x4001023e\r
-.set CYREG_B0_P1_U0_CFG0, 0x40010240\r
-.set CYREG_B0_P1_U0_CFG1, 0x40010241\r
-.set CYREG_B0_P1_U0_CFG2, 0x40010242\r
-.set CYREG_B0_P1_U0_CFG3, 0x40010243\r
-.set CYREG_B0_P1_U0_CFG4, 0x40010244\r
-.set CYREG_B0_P1_U0_CFG5, 0x40010245\r
-.set CYREG_B0_P1_U0_CFG6, 0x40010246\r
-.set CYREG_B0_P1_U0_CFG7, 0x40010247\r
-.set CYREG_B0_P1_U0_CFG8, 0x40010248\r
-.set CYREG_B0_P1_U0_CFG9, 0x40010249\r
-.set CYREG_B0_P1_U0_CFG10, 0x4001024a\r
-.set CYREG_B0_P1_U0_CFG11, 0x4001024b\r
-.set CYREG_B0_P1_U0_CFG12, 0x4001024c\r
-.set CYREG_B0_P1_U0_CFG13, 0x4001024d\r
-.set CYREG_B0_P1_U0_CFG14, 0x4001024e\r
-.set CYREG_B0_P1_U0_CFG15, 0x4001024f\r
-.set CYREG_B0_P1_U0_CFG16, 0x40010250\r
-.set CYREG_B0_P1_U0_CFG17, 0x40010251\r
-.set CYREG_B0_P1_U0_CFG18, 0x40010252\r
-.set CYREG_B0_P1_U0_CFG19, 0x40010253\r
-.set CYREG_B0_P1_U0_CFG20, 0x40010254\r
-.set CYREG_B0_P1_U0_CFG21, 0x40010255\r
-.set CYREG_B0_P1_U0_CFG22, 0x40010256\r
-.set CYREG_B0_P1_U0_CFG23, 0x40010257\r
-.set CYREG_B0_P1_U0_CFG24, 0x40010258\r
-.set CYREG_B0_P1_U0_CFG25, 0x40010259\r
-.set CYREG_B0_P1_U0_CFG26, 0x4001025a\r
-.set CYREG_B0_P1_U0_CFG27, 0x4001025b\r
-.set CYREG_B0_P1_U0_CFG28, 0x4001025c\r
-.set CYREG_B0_P1_U0_CFG29, 0x4001025d\r
-.set CYREG_B0_P1_U0_CFG30, 0x4001025e\r
-.set CYREG_B0_P1_U0_CFG31, 0x4001025f\r
-.set CYREG_B0_P1_U0_DCFG0, 0x40010260\r
-.set CYREG_B0_P1_U0_DCFG1, 0x40010262\r
-.set CYREG_B0_P1_U0_DCFG2, 0x40010264\r
-.set CYREG_B0_P1_U0_DCFG3, 0x40010266\r
-.set CYREG_B0_P1_U0_DCFG4, 0x40010268\r
-.set CYREG_B0_P1_U0_DCFG5, 0x4001026a\r
-.set CYREG_B0_P1_U0_DCFG6, 0x4001026c\r
-.set CYREG_B0_P1_U0_DCFG7, 0x4001026e\r
-.set CYDEV_UCFG_B0_P1_U1_BASE, 0x40010280\r
-.set CYDEV_UCFG_B0_P1_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P1_U1_PLD_IT0, 0x40010280\r
-.set CYREG_B0_P1_U1_PLD_IT1, 0x40010284\r
-.set CYREG_B0_P1_U1_PLD_IT2, 0x40010288\r
-.set CYREG_B0_P1_U1_PLD_IT3, 0x4001028c\r
-.set CYREG_B0_P1_U1_PLD_IT4, 0x40010290\r
-.set CYREG_B0_P1_U1_PLD_IT5, 0x40010294\r
-.set CYREG_B0_P1_U1_PLD_IT6, 0x40010298\r
-.set CYREG_B0_P1_U1_PLD_IT7, 0x4001029c\r
-.set CYREG_B0_P1_U1_PLD_IT8, 0x400102a0\r
-.set CYREG_B0_P1_U1_PLD_IT9, 0x400102a4\r
-.set CYREG_B0_P1_U1_PLD_IT10, 0x400102a8\r
-.set CYREG_B0_P1_U1_PLD_IT11, 0x400102ac\r
-.set CYREG_B0_P1_U1_PLD_ORT0, 0x400102b0\r
-.set CYREG_B0_P1_U1_PLD_ORT1, 0x400102b2\r
-.set CYREG_B0_P1_U1_PLD_ORT2, 0x400102b4\r
-.set CYREG_B0_P1_U1_PLD_ORT3, 0x400102b6\r
-.set CYREG_B0_P1_U1_MC_CFG_CEN_CONST, 0x400102b8\r
-.set CYREG_B0_P1_U1_MC_CFG_XORFB, 0x400102ba\r
-.set CYREG_B0_P1_U1_MC_CFG_SET_RESET, 0x400102bc\r
-.set CYREG_B0_P1_U1_MC_CFG_BYPASS, 0x400102be\r
-.set CYREG_B0_P1_U1_CFG0, 0x400102c0\r
-.set CYREG_B0_P1_U1_CFG1, 0x400102c1\r
-.set CYREG_B0_P1_U1_CFG2, 0x400102c2\r
-.set CYREG_B0_P1_U1_CFG3, 0x400102c3\r
-.set CYREG_B0_P1_U1_CFG4, 0x400102c4\r
-.set CYREG_B0_P1_U1_CFG5, 0x400102c5\r
-.set CYREG_B0_P1_U1_CFG6, 0x400102c6\r
-.set CYREG_B0_P1_U1_CFG7, 0x400102c7\r
-.set CYREG_B0_P1_U1_CFG8, 0x400102c8\r
-.set CYREG_B0_P1_U1_CFG9, 0x400102c9\r
-.set CYREG_B0_P1_U1_CFG10, 0x400102ca\r
-.set CYREG_B0_P1_U1_CFG11, 0x400102cb\r
-.set CYREG_B0_P1_U1_CFG12, 0x400102cc\r
-.set CYREG_B0_P1_U1_CFG13, 0x400102cd\r
-.set CYREG_B0_P1_U1_CFG14, 0x400102ce\r
-.set CYREG_B0_P1_U1_CFG15, 0x400102cf\r
-.set CYREG_B0_P1_U1_CFG16, 0x400102d0\r
-.set CYREG_B0_P1_U1_CFG17, 0x400102d1\r
-.set CYREG_B0_P1_U1_CFG18, 0x400102d2\r
-.set CYREG_B0_P1_U1_CFG19, 0x400102d3\r
-.set CYREG_B0_P1_U1_CFG20, 0x400102d4\r
-.set CYREG_B0_P1_U1_CFG21, 0x400102d5\r
-.set CYREG_B0_P1_U1_CFG22, 0x400102d6\r
-.set CYREG_B0_P1_U1_CFG23, 0x400102d7\r
-.set CYREG_B0_P1_U1_CFG24, 0x400102d8\r
-.set CYREG_B0_P1_U1_CFG25, 0x400102d9\r
-.set CYREG_B0_P1_U1_CFG26, 0x400102da\r
-.set CYREG_B0_P1_U1_CFG27, 0x400102db\r
-.set CYREG_B0_P1_U1_CFG28, 0x400102dc\r
-.set CYREG_B0_P1_U1_CFG29, 0x400102dd\r
-.set CYREG_B0_P1_U1_CFG30, 0x400102de\r
-.set CYREG_B0_P1_U1_CFG31, 0x400102df\r
-.set CYREG_B0_P1_U1_DCFG0, 0x400102e0\r
-.set CYREG_B0_P1_U1_DCFG1, 0x400102e2\r
-.set CYREG_B0_P1_U1_DCFG2, 0x400102e4\r
-.set CYREG_B0_P1_U1_DCFG3, 0x400102e6\r
-.set CYREG_B0_P1_U1_DCFG4, 0x400102e8\r
-.set CYREG_B0_P1_U1_DCFG5, 0x400102ea\r
-.set CYREG_B0_P1_U1_DCFG6, 0x400102ec\r
-.set CYREG_B0_P1_U1_DCFG7, 0x400102ee\r
-.set CYDEV_UCFG_B0_P1_ROUTE_BASE, 0x40010300\r
-.set CYDEV_UCFG_B0_P1_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P2_BASE, 0x40010400\r
-.set CYDEV_UCFG_B0_P2_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P2_U0_BASE, 0x40010400\r
-.set CYDEV_UCFG_B0_P2_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P2_U0_PLD_IT0, 0x40010400\r
-.set CYREG_B0_P2_U0_PLD_IT1, 0x40010404\r
-.set CYREG_B0_P2_U0_PLD_IT2, 0x40010408\r
-.set CYREG_B0_P2_U0_PLD_IT3, 0x4001040c\r
-.set CYREG_B0_P2_U0_PLD_IT4, 0x40010410\r
-.set CYREG_B0_P2_U0_PLD_IT5, 0x40010414\r
-.set CYREG_B0_P2_U0_PLD_IT6, 0x40010418\r
-.set CYREG_B0_P2_U0_PLD_IT7, 0x4001041c\r
-.set CYREG_B0_P2_U0_PLD_IT8, 0x40010420\r
-.set CYREG_B0_P2_U0_PLD_IT9, 0x40010424\r
-.set CYREG_B0_P2_U0_PLD_IT10, 0x40010428\r
-.set CYREG_B0_P2_U0_PLD_IT11, 0x4001042c\r
-.set CYREG_B0_P2_U0_PLD_ORT0, 0x40010430\r
-.set CYREG_B0_P2_U0_PLD_ORT1, 0x40010432\r
-.set CYREG_B0_P2_U0_PLD_ORT2, 0x40010434\r
-.set CYREG_B0_P2_U0_PLD_ORT3, 0x40010436\r
-.set CYREG_B0_P2_U0_MC_CFG_CEN_CONST, 0x40010438\r
-.set CYREG_B0_P2_U0_MC_CFG_XORFB, 0x4001043a\r
-.set CYREG_B0_P2_U0_MC_CFG_SET_RESET, 0x4001043c\r
-.set CYREG_B0_P2_U0_MC_CFG_BYPASS, 0x4001043e\r
-.set CYREG_B0_P2_U0_CFG0, 0x40010440\r
-.set CYREG_B0_P2_U0_CFG1, 0x40010441\r
-.set CYREG_B0_P2_U0_CFG2, 0x40010442\r
-.set CYREG_B0_P2_U0_CFG3, 0x40010443\r
-.set CYREG_B0_P2_U0_CFG4, 0x40010444\r
-.set CYREG_B0_P2_U0_CFG5, 0x40010445\r
-.set CYREG_B0_P2_U0_CFG6, 0x40010446\r
-.set CYREG_B0_P2_U0_CFG7, 0x40010447\r
-.set CYREG_B0_P2_U0_CFG8, 0x40010448\r
-.set CYREG_B0_P2_U0_CFG9, 0x40010449\r
-.set CYREG_B0_P2_U0_CFG10, 0x4001044a\r
-.set CYREG_B0_P2_U0_CFG11, 0x4001044b\r
-.set CYREG_B0_P2_U0_CFG12, 0x4001044c\r
-.set CYREG_B0_P2_U0_CFG13, 0x4001044d\r
-.set CYREG_B0_P2_U0_CFG14, 0x4001044e\r
-.set CYREG_B0_P2_U0_CFG15, 0x4001044f\r
-.set CYREG_B0_P2_U0_CFG16, 0x40010450\r
-.set CYREG_B0_P2_U0_CFG17, 0x40010451\r
-.set CYREG_B0_P2_U0_CFG18, 0x40010452\r
-.set CYREG_B0_P2_U0_CFG19, 0x40010453\r
-.set CYREG_B0_P2_U0_CFG20, 0x40010454\r
-.set CYREG_B0_P2_U0_CFG21, 0x40010455\r
-.set CYREG_B0_P2_U0_CFG22, 0x40010456\r
-.set CYREG_B0_P2_U0_CFG23, 0x40010457\r
-.set CYREG_B0_P2_U0_CFG24, 0x40010458\r
-.set CYREG_B0_P2_U0_CFG25, 0x40010459\r
-.set CYREG_B0_P2_U0_CFG26, 0x4001045a\r
-.set CYREG_B0_P2_U0_CFG27, 0x4001045b\r
-.set CYREG_B0_P2_U0_CFG28, 0x4001045c\r
-.set CYREG_B0_P2_U0_CFG29, 0x4001045d\r
-.set CYREG_B0_P2_U0_CFG30, 0x4001045e\r
-.set CYREG_B0_P2_U0_CFG31, 0x4001045f\r
-.set CYREG_B0_P2_U0_DCFG0, 0x40010460\r
-.set CYREG_B0_P2_U0_DCFG1, 0x40010462\r
-.set CYREG_B0_P2_U0_DCFG2, 0x40010464\r
-.set CYREG_B0_P2_U0_DCFG3, 0x40010466\r
-.set CYREG_B0_P2_U0_DCFG4, 0x40010468\r
-.set CYREG_B0_P2_U0_DCFG5, 0x4001046a\r
-.set CYREG_B0_P2_U0_DCFG6, 0x4001046c\r
-.set CYREG_B0_P2_U0_DCFG7, 0x4001046e\r
-.set CYDEV_UCFG_B0_P2_U1_BASE, 0x40010480\r
-.set CYDEV_UCFG_B0_P2_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P2_U1_PLD_IT0, 0x40010480\r
-.set CYREG_B0_P2_U1_PLD_IT1, 0x40010484\r
-.set CYREG_B0_P2_U1_PLD_IT2, 0x40010488\r
-.set CYREG_B0_P2_U1_PLD_IT3, 0x4001048c\r
-.set CYREG_B0_P2_U1_PLD_IT4, 0x40010490\r
-.set CYREG_B0_P2_U1_PLD_IT5, 0x40010494\r
-.set CYREG_B0_P2_U1_PLD_IT6, 0x40010498\r
-.set CYREG_B0_P2_U1_PLD_IT7, 0x4001049c\r
-.set CYREG_B0_P2_U1_PLD_IT8, 0x400104a0\r
-.set CYREG_B0_P2_U1_PLD_IT9, 0x400104a4\r
-.set CYREG_B0_P2_U1_PLD_IT10, 0x400104a8\r
-.set CYREG_B0_P2_U1_PLD_IT11, 0x400104ac\r
-.set CYREG_B0_P2_U1_PLD_ORT0, 0x400104b0\r
-.set CYREG_B0_P2_U1_PLD_ORT1, 0x400104b2\r
-.set CYREG_B0_P2_U1_PLD_ORT2, 0x400104b4\r
-.set CYREG_B0_P2_U1_PLD_ORT3, 0x400104b6\r
-.set CYREG_B0_P2_U1_MC_CFG_CEN_CONST, 0x400104b8\r
-.set CYREG_B0_P2_U1_MC_CFG_XORFB, 0x400104ba\r
-.set CYREG_B0_P2_U1_MC_CFG_SET_RESET, 0x400104bc\r
-.set CYREG_B0_P2_U1_MC_CFG_BYPASS, 0x400104be\r
-.set CYREG_B0_P2_U1_CFG0, 0x400104c0\r
-.set CYREG_B0_P2_U1_CFG1, 0x400104c1\r
-.set CYREG_B0_P2_U1_CFG2, 0x400104c2\r
-.set CYREG_B0_P2_U1_CFG3, 0x400104c3\r
-.set CYREG_B0_P2_U1_CFG4, 0x400104c4\r
-.set CYREG_B0_P2_U1_CFG5, 0x400104c5\r
-.set CYREG_B0_P2_U1_CFG6, 0x400104c6\r
-.set CYREG_B0_P2_U1_CFG7, 0x400104c7\r
-.set CYREG_B0_P2_U1_CFG8, 0x400104c8\r
-.set CYREG_B0_P2_U1_CFG9, 0x400104c9\r
-.set CYREG_B0_P2_U1_CFG10, 0x400104ca\r
-.set CYREG_B0_P2_U1_CFG11, 0x400104cb\r
-.set CYREG_B0_P2_U1_CFG12, 0x400104cc\r
-.set CYREG_B0_P2_U1_CFG13, 0x400104cd\r
-.set CYREG_B0_P2_U1_CFG14, 0x400104ce\r
-.set CYREG_B0_P2_U1_CFG15, 0x400104cf\r
-.set CYREG_B0_P2_U1_CFG16, 0x400104d0\r
-.set CYREG_B0_P2_U1_CFG17, 0x400104d1\r
-.set CYREG_B0_P2_U1_CFG18, 0x400104d2\r
-.set CYREG_B0_P2_U1_CFG19, 0x400104d3\r
-.set CYREG_B0_P2_U1_CFG20, 0x400104d4\r
-.set CYREG_B0_P2_U1_CFG21, 0x400104d5\r
-.set CYREG_B0_P2_U1_CFG22, 0x400104d6\r
-.set CYREG_B0_P2_U1_CFG23, 0x400104d7\r
-.set CYREG_B0_P2_U1_CFG24, 0x400104d8\r
-.set CYREG_B0_P2_U1_CFG25, 0x400104d9\r
-.set CYREG_B0_P2_U1_CFG26, 0x400104da\r
-.set CYREG_B0_P2_U1_CFG27, 0x400104db\r
-.set CYREG_B0_P2_U1_CFG28, 0x400104dc\r
-.set CYREG_B0_P2_U1_CFG29, 0x400104dd\r
-.set CYREG_B0_P2_U1_CFG30, 0x400104de\r
-.set CYREG_B0_P2_U1_CFG31, 0x400104df\r
-.set CYREG_B0_P2_U1_DCFG0, 0x400104e0\r
-.set CYREG_B0_P2_U1_DCFG1, 0x400104e2\r
-.set CYREG_B0_P2_U1_DCFG2, 0x400104e4\r
-.set CYREG_B0_P2_U1_DCFG3, 0x400104e6\r
-.set CYREG_B0_P2_U1_DCFG4, 0x400104e8\r
-.set CYREG_B0_P2_U1_DCFG5, 0x400104ea\r
-.set CYREG_B0_P2_U1_DCFG6, 0x400104ec\r
-.set CYREG_B0_P2_U1_DCFG7, 0x400104ee\r
-.set CYDEV_UCFG_B0_P2_ROUTE_BASE, 0x40010500\r
-.set CYDEV_UCFG_B0_P2_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P3_BASE, 0x40010600\r
-.set CYDEV_UCFG_B0_P3_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P3_U0_BASE, 0x40010600\r
-.set CYDEV_UCFG_B0_P3_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P3_U0_PLD_IT0, 0x40010600\r
-.set CYREG_B0_P3_U0_PLD_IT1, 0x40010604\r
-.set CYREG_B0_P3_U0_PLD_IT2, 0x40010608\r
-.set CYREG_B0_P3_U0_PLD_IT3, 0x4001060c\r
-.set CYREG_B0_P3_U0_PLD_IT4, 0x40010610\r
-.set CYREG_B0_P3_U0_PLD_IT5, 0x40010614\r
-.set CYREG_B0_P3_U0_PLD_IT6, 0x40010618\r
-.set CYREG_B0_P3_U0_PLD_IT7, 0x4001061c\r
-.set CYREG_B0_P3_U0_PLD_IT8, 0x40010620\r
-.set CYREG_B0_P3_U0_PLD_IT9, 0x40010624\r
-.set CYREG_B0_P3_U0_PLD_IT10, 0x40010628\r
-.set CYREG_B0_P3_U0_PLD_IT11, 0x4001062c\r
-.set CYREG_B0_P3_U0_PLD_ORT0, 0x40010630\r
-.set CYREG_B0_P3_U0_PLD_ORT1, 0x40010632\r
-.set CYREG_B0_P3_U0_PLD_ORT2, 0x40010634\r
-.set CYREG_B0_P3_U0_PLD_ORT3, 0x40010636\r
-.set CYREG_B0_P3_U0_MC_CFG_CEN_CONST, 0x40010638\r
-.set CYREG_B0_P3_U0_MC_CFG_XORFB, 0x4001063a\r
-.set CYREG_B0_P3_U0_MC_CFG_SET_RESET, 0x4001063c\r
-.set CYREG_B0_P3_U0_MC_CFG_BYPASS, 0x4001063e\r
-.set CYREG_B0_P3_U0_CFG0, 0x40010640\r
-.set CYREG_B0_P3_U0_CFG1, 0x40010641\r
-.set CYREG_B0_P3_U0_CFG2, 0x40010642\r
-.set CYREG_B0_P3_U0_CFG3, 0x40010643\r
-.set CYREG_B0_P3_U0_CFG4, 0x40010644\r
-.set CYREG_B0_P3_U0_CFG5, 0x40010645\r
-.set CYREG_B0_P3_U0_CFG6, 0x40010646\r
-.set CYREG_B0_P3_U0_CFG7, 0x40010647\r
-.set CYREG_B0_P3_U0_CFG8, 0x40010648\r
-.set CYREG_B0_P3_U0_CFG9, 0x40010649\r
-.set CYREG_B0_P3_U0_CFG10, 0x4001064a\r
-.set CYREG_B0_P3_U0_CFG11, 0x4001064b\r
-.set CYREG_B0_P3_U0_CFG12, 0x4001064c\r
-.set CYREG_B0_P3_U0_CFG13, 0x4001064d\r
-.set CYREG_B0_P3_U0_CFG14, 0x4001064e\r
-.set CYREG_B0_P3_U0_CFG15, 0x4001064f\r
-.set CYREG_B0_P3_U0_CFG16, 0x40010650\r
-.set CYREG_B0_P3_U0_CFG17, 0x40010651\r
-.set CYREG_B0_P3_U0_CFG18, 0x40010652\r
-.set CYREG_B0_P3_U0_CFG19, 0x40010653\r
-.set CYREG_B0_P3_U0_CFG20, 0x40010654\r
-.set CYREG_B0_P3_U0_CFG21, 0x40010655\r
-.set CYREG_B0_P3_U0_CFG22, 0x40010656\r
-.set CYREG_B0_P3_U0_CFG23, 0x40010657\r
-.set CYREG_B0_P3_U0_CFG24, 0x40010658\r
-.set CYREG_B0_P3_U0_CFG25, 0x40010659\r
-.set CYREG_B0_P3_U0_CFG26, 0x4001065a\r
-.set CYREG_B0_P3_U0_CFG27, 0x4001065b\r
-.set CYREG_B0_P3_U0_CFG28, 0x4001065c\r
-.set CYREG_B0_P3_U0_CFG29, 0x4001065d\r
-.set CYREG_B0_P3_U0_CFG30, 0x4001065e\r
-.set CYREG_B0_P3_U0_CFG31, 0x4001065f\r
-.set CYREG_B0_P3_U0_DCFG0, 0x40010660\r
-.set CYREG_B0_P3_U0_DCFG1, 0x40010662\r
-.set CYREG_B0_P3_U0_DCFG2, 0x40010664\r
-.set CYREG_B0_P3_U0_DCFG3, 0x40010666\r
-.set CYREG_B0_P3_U0_DCFG4, 0x40010668\r
-.set CYREG_B0_P3_U0_DCFG5, 0x4001066a\r
-.set CYREG_B0_P3_U0_DCFG6, 0x4001066c\r
-.set CYREG_B0_P3_U0_DCFG7, 0x4001066e\r
-.set CYDEV_UCFG_B0_P3_U1_BASE, 0x40010680\r
-.set CYDEV_UCFG_B0_P3_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P3_U1_PLD_IT0, 0x40010680\r
-.set CYREG_B0_P3_U1_PLD_IT1, 0x40010684\r
-.set CYREG_B0_P3_U1_PLD_IT2, 0x40010688\r
-.set CYREG_B0_P3_U1_PLD_IT3, 0x4001068c\r
-.set CYREG_B0_P3_U1_PLD_IT4, 0x40010690\r
-.set CYREG_B0_P3_U1_PLD_IT5, 0x40010694\r
-.set CYREG_B0_P3_U1_PLD_IT6, 0x40010698\r
-.set CYREG_B0_P3_U1_PLD_IT7, 0x4001069c\r
-.set CYREG_B0_P3_U1_PLD_IT8, 0x400106a0\r
-.set CYREG_B0_P3_U1_PLD_IT9, 0x400106a4\r
-.set CYREG_B0_P3_U1_PLD_IT10, 0x400106a8\r
-.set CYREG_B0_P3_U1_PLD_IT11, 0x400106ac\r
-.set CYREG_B0_P3_U1_PLD_ORT0, 0x400106b0\r
-.set CYREG_B0_P3_U1_PLD_ORT1, 0x400106b2\r
-.set CYREG_B0_P3_U1_PLD_ORT2, 0x400106b4\r
-.set CYREG_B0_P3_U1_PLD_ORT3, 0x400106b6\r
-.set CYREG_B0_P3_U1_MC_CFG_CEN_CONST, 0x400106b8\r
-.set CYREG_B0_P3_U1_MC_CFG_XORFB, 0x400106ba\r
-.set CYREG_B0_P3_U1_MC_CFG_SET_RESET, 0x400106bc\r
-.set CYREG_B0_P3_U1_MC_CFG_BYPASS, 0x400106be\r
-.set CYREG_B0_P3_U1_CFG0, 0x400106c0\r
-.set CYREG_B0_P3_U1_CFG1, 0x400106c1\r
-.set CYREG_B0_P3_U1_CFG2, 0x400106c2\r
-.set CYREG_B0_P3_U1_CFG3, 0x400106c3\r
-.set CYREG_B0_P3_U1_CFG4, 0x400106c4\r
-.set CYREG_B0_P3_U1_CFG5, 0x400106c5\r
-.set CYREG_B0_P3_U1_CFG6, 0x400106c6\r
-.set CYREG_B0_P3_U1_CFG7, 0x400106c7\r
-.set CYREG_B0_P3_U1_CFG8, 0x400106c8\r
-.set CYREG_B0_P3_U1_CFG9, 0x400106c9\r
-.set CYREG_B0_P3_U1_CFG10, 0x400106ca\r
-.set CYREG_B0_P3_U1_CFG11, 0x400106cb\r
-.set CYREG_B0_P3_U1_CFG12, 0x400106cc\r
-.set CYREG_B0_P3_U1_CFG13, 0x400106cd\r
-.set CYREG_B0_P3_U1_CFG14, 0x400106ce\r
-.set CYREG_B0_P3_U1_CFG15, 0x400106cf\r
-.set CYREG_B0_P3_U1_CFG16, 0x400106d0\r
-.set CYREG_B0_P3_U1_CFG17, 0x400106d1\r
-.set CYREG_B0_P3_U1_CFG18, 0x400106d2\r
-.set CYREG_B0_P3_U1_CFG19, 0x400106d3\r
-.set CYREG_B0_P3_U1_CFG20, 0x400106d4\r
-.set CYREG_B0_P3_U1_CFG21, 0x400106d5\r
-.set CYREG_B0_P3_U1_CFG22, 0x400106d6\r
-.set CYREG_B0_P3_U1_CFG23, 0x400106d7\r
-.set CYREG_B0_P3_U1_CFG24, 0x400106d8\r
-.set CYREG_B0_P3_U1_CFG25, 0x400106d9\r
-.set CYREG_B0_P3_U1_CFG26, 0x400106da\r
-.set CYREG_B0_P3_U1_CFG27, 0x400106db\r
-.set CYREG_B0_P3_U1_CFG28, 0x400106dc\r
-.set CYREG_B0_P3_U1_CFG29, 0x400106dd\r
-.set CYREG_B0_P3_U1_CFG30, 0x400106de\r
-.set CYREG_B0_P3_U1_CFG31, 0x400106df\r
-.set CYREG_B0_P3_U1_DCFG0, 0x400106e0\r
-.set CYREG_B0_P3_U1_DCFG1, 0x400106e2\r
-.set CYREG_B0_P3_U1_DCFG2, 0x400106e4\r
-.set CYREG_B0_P3_U1_DCFG3, 0x400106e6\r
-.set CYREG_B0_P3_U1_DCFG4, 0x400106e8\r
-.set CYREG_B0_P3_U1_DCFG5, 0x400106ea\r
-.set CYREG_B0_P3_U1_DCFG6, 0x400106ec\r
-.set CYREG_B0_P3_U1_DCFG7, 0x400106ee\r
-.set CYDEV_UCFG_B0_P3_ROUTE_BASE, 0x40010700\r
-.set CYDEV_UCFG_B0_P3_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P4_BASE, 0x40010800\r
-.set CYDEV_UCFG_B0_P4_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P4_U0_BASE, 0x40010800\r
-.set CYDEV_UCFG_B0_P4_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P4_U0_PLD_IT0, 0x40010800\r
-.set CYREG_B0_P4_U0_PLD_IT1, 0x40010804\r
-.set CYREG_B0_P4_U0_PLD_IT2, 0x40010808\r
-.set CYREG_B0_P4_U0_PLD_IT3, 0x4001080c\r
-.set CYREG_B0_P4_U0_PLD_IT4, 0x40010810\r
-.set CYREG_B0_P4_U0_PLD_IT5, 0x40010814\r
-.set CYREG_B0_P4_U0_PLD_IT6, 0x40010818\r
-.set CYREG_B0_P4_U0_PLD_IT7, 0x4001081c\r
-.set CYREG_B0_P4_U0_PLD_IT8, 0x40010820\r
-.set CYREG_B0_P4_U0_PLD_IT9, 0x40010824\r
-.set CYREG_B0_P4_U0_PLD_IT10, 0x40010828\r
-.set CYREG_B0_P4_U0_PLD_IT11, 0x4001082c\r
-.set CYREG_B0_P4_U0_PLD_ORT0, 0x40010830\r
-.set CYREG_B0_P4_U0_PLD_ORT1, 0x40010832\r
-.set CYREG_B0_P4_U0_PLD_ORT2, 0x40010834\r
-.set CYREG_B0_P4_U0_PLD_ORT3, 0x40010836\r
-.set CYREG_B0_P4_U0_MC_CFG_CEN_CONST, 0x40010838\r
-.set CYREG_B0_P4_U0_MC_CFG_XORFB, 0x4001083a\r
-.set CYREG_B0_P4_U0_MC_CFG_SET_RESET, 0x4001083c\r
-.set CYREG_B0_P4_U0_MC_CFG_BYPASS, 0x4001083e\r
-.set CYREG_B0_P4_U0_CFG0, 0x40010840\r
-.set CYREG_B0_P4_U0_CFG1, 0x40010841\r
-.set CYREG_B0_P4_U0_CFG2, 0x40010842\r
-.set CYREG_B0_P4_U0_CFG3, 0x40010843\r
-.set CYREG_B0_P4_U0_CFG4, 0x40010844\r
-.set CYREG_B0_P4_U0_CFG5, 0x40010845\r
-.set CYREG_B0_P4_U0_CFG6, 0x40010846\r
-.set CYREG_B0_P4_U0_CFG7, 0x40010847\r
-.set CYREG_B0_P4_U0_CFG8, 0x40010848\r
-.set CYREG_B0_P4_U0_CFG9, 0x40010849\r
-.set CYREG_B0_P4_U0_CFG10, 0x4001084a\r
-.set CYREG_B0_P4_U0_CFG11, 0x4001084b\r
-.set CYREG_B0_P4_U0_CFG12, 0x4001084c\r
-.set CYREG_B0_P4_U0_CFG13, 0x4001084d\r
-.set CYREG_B0_P4_U0_CFG14, 0x4001084e\r
-.set CYREG_B0_P4_U0_CFG15, 0x4001084f\r
-.set CYREG_B0_P4_U0_CFG16, 0x40010850\r
-.set CYREG_B0_P4_U0_CFG17, 0x40010851\r
-.set CYREG_B0_P4_U0_CFG18, 0x40010852\r
-.set CYREG_B0_P4_U0_CFG19, 0x40010853\r
-.set CYREG_B0_P4_U0_CFG20, 0x40010854\r
-.set CYREG_B0_P4_U0_CFG21, 0x40010855\r
-.set CYREG_B0_P4_U0_CFG22, 0x40010856\r
-.set CYREG_B0_P4_U0_CFG23, 0x40010857\r
-.set CYREG_B0_P4_U0_CFG24, 0x40010858\r
-.set CYREG_B0_P4_U0_CFG25, 0x40010859\r
-.set CYREG_B0_P4_U0_CFG26, 0x4001085a\r
-.set CYREG_B0_P4_U0_CFG27, 0x4001085b\r
-.set CYREG_B0_P4_U0_CFG28, 0x4001085c\r
-.set CYREG_B0_P4_U0_CFG29, 0x4001085d\r
-.set CYREG_B0_P4_U0_CFG30, 0x4001085e\r
-.set CYREG_B0_P4_U0_CFG31, 0x4001085f\r
-.set CYREG_B0_P4_U0_DCFG0, 0x40010860\r
-.set CYREG_B0_P4_U0_DCFG1, 0x40010862\r
-.set CYREG_B0_P4_U0_DCFG2, 0x40010864\r
-.set CYREG_B0_P4_U0_DCFG3, 0x40010866\r
-.set CYREG_B0_P4_U0_DCFG4, 0x40010868\r
-.set CYREG_B0_P4_U0_DCFG5, 0x4001086a\r
-.set CYREG_B0_P4_U0_DCFG6, 0x4001086c\r
-.set CYREG_B0_P4_U0_DCFG7, 0x4001086e\r
-.set CYDEV_UCFG_B0_P4_U1_BASE, 0x40010880\r
-.set CYDEV_UCFG_B0_P4_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P4_U1_PLD_IT0, 0x40010880\r
-.set CYREG_B0_P4_U1_PLD_IT1, 0x40010884\r
-.set CYREG_B0_P4_U1_PLD_IT2, 0x40010888\r
-.set CYREG_B0_P4_U1_PLD_IT3, 0x4001088c\r
-.set CYREG_B0_P4_U1_PLD_IT4, 0x40010890\r
-.set CYREG_B0_P4_U1_PLD_IT5, 0x40010894\r
-.set CYREG_B0_P4_U1_PLD_IT6, 0x40010898\r
-.set CYREG_B0_P4_U1_PLD_IT7, 0x4001089c\r
-.set CYREG_B0_P4_U1_PLD_IT8, 0x400108a0\r
-.set CYREG_B0_P4_U1_PLD_IT9, 0x400108a4\r
-.set CYREG_B0_P4_U1_PLD_IT10, 0x400108a8\r
-.set CYREG_B0_P4_U1_PLD_IT11, 0x400108ac\r
-.set CYREG_B0_P4_U1_PLD_ORT0, 0x400108b0\r
-.set CYREG_B0_P4_U1_PLD_ORT1, 0x400108b2\r
-.set CYREG_B0_P4_U1_PLD_ORT2, 0x400108b4\r
-.set CYREG_B0_P4_U1_PLD_ORT3, 0x400108b6\r
-.set CYREG_B0_P4_U1_MC_CFG_CEN_CONST, 0x400108b8\r
-.set CYREG_B0_P4_U1_MC_CFG_XORFB, 0x400108ba\r
-.set CYREG_B0_P4_U1_MC_CFG_SET_RESET, 0x400108bc\r
-.set CYREG_B0_P4_U1_MC_CFG_BYPASS, 0x400108be\r
-.set CYREG_B0_P4_U1_CFG0, 0x400108c0\r
-.set CYREG_B0_P4_U1_CFG1, 0x400108c1\r
-.set CYREG_B0_P4_U1_CFG2, 0x400108c2\r
-.set CYREG_B0_P4_U1_CFG3, 0x400108c3\r
-.set CYREG_B0_P4_U1_CFG4, 0x400108c4\r
-.set CYREG_B0_P4_U1_CFG5, 0x400108c5\r
-.set CYREG_B0_P4_U1_CFG6, 0x400108c6\r
-.set CYREG_B0_P4_U1_CFG7, 0x400108c7\r
-.set CYREG_B0_P4_U1_CFG8, 0x400108c8\r
-.set CYREG_B0_P4_U1_CFG9, 0x400108c9\r
-.set CYREG_B0_P4_U1_CFG10, 0x400108ca\r
-.set CYREG_B0_P4_U1_CFG11, 0x400108cb\r
-.set CYREG_B0_P4_U1_CFG12, 0x400108cc\r
-.set CYREG_B0_P4_U1_CFG13, 0x400108cd\r
-.set CYREG_B0_P4_U1_CFG14, 0x400108ce\r
-.set CYREG_B0_P4_U1_CFG15, 0x400108cf\r
-.set CYREG_B0_P4_U1_CFG16, 0x400108d0\r
-.set CYREG_B0_P4_U1_CFG17, 0x400108d1\r
-.set CYREG_B0_P4_U1_CFG18, 0x400108d2\r
-.set CYREG_B0_P4_U1_CFG19, 0x400108d3\r
-.set CYREG_B0_P4_U1_CFG20, 0x400108d4\r
-.set CYREG_B0_P4_U1_CFG21, 0x400108d5\r
-.set CYREG_B0_P4_U1_CFG22, 0x400108d6\r
-.set CYREG_B0_P4_U1_CFG23, 0x400108d7\r
-.set CYREG_B0_P4_U1_CFG24, 0x400108d8\r
-.set CYREG_B0_P4_U1_CFG25, 0x400108d9\r
-.set CYREG_B0_P4_U1_CFG26, 0x400108da\r
-.set CYREG_B0_P4_U1_CFG27, 0x400108db\r
-.set CYREG_B0_P4_U1_CFG28, 0x400108dc\r
-.set CYREG_B0_P4_U1_CFG29, 0x400108dd\r
-.set CYREG_B0_P4_U1_CFG30, 0x400108de\r
-.set CYREG_B0_P4_U1_CFG31, 0x400108df\r
-.set CYREG_B0_P4_U1_DCFG0, 0x400108e0\r
-.set CYREG_B0_P4_U1_DCFG1, 0x400108e2\r
-.set CYREG_B0_P4_U1_DCFG2, 0x400108e4\r
-.set CYREG_B0_P4_U1_DCFG3, 0x400108e6\r
-.set CYREG_B0_P4_U1_DCFG4, 0x400108e8\r
-.set CYREG_B0_P4_U1_DCFG5, 0x400108ea\r
-.set CYREG_B0_P4_U1_DCFG6, 0x400108ec\r
-.set CYREG_B0_P4_U1_DCFG7, 0x400108ee\r
-.set CYDEV_UCFG_B0_P4_ROUTE_BASE, 0x40010900\r
-.set CYDEV_UCFG_B0_P4_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P5_BASE, 0x40010a00\r
-.set CYDEV_UCFG_B0_P5_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P5_U0_BASE, 0x40010a00\r
-.set CYDEV_UCFG_B0_P5_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P5_U0_PLD_IT0, 0x40010a00\r
-.set CYREG_B0_P5_U0_PLD_IT1, 0x40010a04\r
-.set CYREG_B0_P5_U0_PLD_IT2, 0x40010a08\r
-.set CYREG_B0_P5_U0_PLD_IT3, 0x40010a0c\r
-.set CYREG_B0_P5_U0_PLD_IT4, 0x40010a10\r
-.set CYREG_B0_P5_U0_PLD_IT5, 0x40010a14\r
-.set CYREG_B0_P5_U0_PLD_IT6, 0x40010a18\r
-.set CYREG_B0_P5_U0_PLD_IT7, 0x40010a1c\r
-.set CYREG_B0_P5_U0_PLD_IT8, 0x40010a20\r
-.set CYREG_B0_P5_U0_PLD_IT9, 0x40010a24\r
-.set CYREG_B0_P5_U0_PLD_IT10, 0x40010a28\r
-.set CYREG_B0_P5_U0_PLD_IT11, 0x40010a2c\r
-.set CYREG_B0_P5_U0_PLD_ORT0, 0x40010a30\r
-.set CYREG_B0_P5_U0_PLD_ORT1, 0x40010a32\r
-.set CYREG_B0_P5_U0_PLD_ORT2, 0x40010a34\r
-.set CYREG_B0_P5_U0_PLD_ORT3, 0x40010a36\r
-.set CYREG_B0_P5_U0_MC_CFG_CEN_CONST, 0x40010a38\r
-.set CYREG_B0_P5_U0_MC_CFG_XORFB, 0x40010a3a\r
-.set CYREG_B0_P5_U0_MC_CFG_SET_RESET, 0x40010a3c\r
-.set CYREG_B0_P5_U0_MC_CFG_BYPASS, 0x40010a3e\r
-.set CYREG_B0_P5_U0_CFG0, 0x40010a40\r
-.set CYREG_B0_P5_U0_CFG1, 0x40010a41\r
-.set CYREG_B0_P5_U0_CFG2, 0x40010a42\r
-.set CYREG_B0_P5_U0_CFG3, 0x40010a43\r
-.set CYREG_B0_P5_U0_CFG4, 0x40010a44\r
-.set CYREG_B0_P5_U0_CFG5, 0x40010a45\r
-.set CYREG_B0_P5_U0_CFG6, 0x40010a46\r
-.set CYREG_B0_P5_U0_CFG7, 0x40010a47\r
-.set CYREG_B0_P5_U0_CFG8, 0x40010a48\r
-.set CYREG_B0_P5_U0_CFG9, 0x40010a49\r
-.set CYREG_B0_P5_U0_CFG10, 0x40010a4a\r
-.set CYREG_B0_P5_U0_CFG11, 0x40010a4b\r
-.set CYREG_B0_P5_U0_CFG12, 0x40010a4c\r
-.set CYREG_B0_P5_U0_CFG13, 0x40010a4d\r
-.set CYREG_B0_P5_U0_CFG14, 0x40010a4e\r
-.set CYREG_B0_P5_U0_CFG15, 0x40010a4f\r
-.set CYREG_B0_P5_U0_CFG16, 0x40010a50\r
-.set CYREG_B0_P5_U0_CFG17, 0x40010a51\r
-.set CYREG_B0_P5_U0_CFG18, 0x40010a52\r
-.set CYREG_B0_P5_U0_CFG19, 0x40010a53\r
-.set CYREG_B0_P5_U0_CFG20, 0x40010a54\r
-.set CYREG_B0_P5_U0_CFG21, 0x40010a55\r
-.set CYREG_B0_P5_U0_CFG22, 0x40010a56\r
-.set CYREG_B0_P5_U0_CFG23, 0x40010a57\r
-.set CYREG_B0_P5_U0_CFG24, 0x40010a58\r
-.set CYREG_B0_P5_U0_CFG25, 0x40010a59\r
-.set CYREG_B0_P5_U0_CFG26, 0x40010a5a\r
-.set CYREG_B0_P5_U0_CFG27, 0x40010a5b\r
-.set CYREG_B0_P5_U0_CFG28, 0x40010a5c\r
-.set CYREG_B0_P5_U0_CFG29, 0x40010a5d\r
-.set CYREG_B0_P5_U0_CFG30, 0x40010a5e\r
-.set CYREG_B0_P5_U0_CFG31, 0x40010a5f\r
-.set CYREG_B0_P5_U0_DCFG0, 0x40010a60\r
-.set CYREG_B0_P5_U0_DCFG1, 0x40010a62\r
-.set CYREG_B0_P5_U0_DCFG2, 0x40010a64\r
-.set CYREG_B0_P5_U0_DCFG3, 0x40010a66\r
-.set CYREG_B0_P5_U0_DCFG4, 0x40010a68\r
-.set CYREG_B0_P5_U0_DCFG5, 0x40010a6a\r
-.set CYREG_B0_P5_U0_DCFG6, 0x40010a6c\r
-.set CYREG_B0_P5_U0_DCFG7, 0x40010a6e\r
-.set CYDEV_UCFG_B0_P5_U1_BASE, 0x40010a80\r
-.set CYDEV_UCFG_B0_P5_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P5_U1_PLD_IT0, 0x40010a80\r
-.set CYREG_B0_P5_U1_PLD_IT1, 0x40010a84\r
-.set CYREG_B0_P5_U1_PLD_IT2, 0x40010a88\r
-.set CYREG_B0_P5_U1_PLD_IT3, 0x40010a8c\r
-.set CYREG_B0_P5_U1_PLD_IT4, 0x40010a90\r
-.set CYREG_B0_P5_U1_PLD_IT5, 0x40010a94\r
-.set CYREG_B0_P5_U1_PLD_IT6, 0x40010a98\r
-.set CYREG_B0_P5_U1_PLD_IT7, 0x40010a9c\r
-.set CYREG_B0_P5_U1_PLD_IT8, 0x40010aa0\r
-.set CYREG_B0_P5_U1_PLD_IT9, 0x40010aa4\r
-.set CYREG_B0_P5_U1_PLD_IT10, 0x40010aa8\r
-.set CYREG_B0_P5_U1_PLD_IT11, 0x40010aac\r
-.set CYREG_B0_P5_U1_PLD_ORT0, 0x40010ab0\r
-.set CYREG_B0_P5_U1_PLD_ORT1, 0x40010ab2\r
-.set CYREG_B0_P5_U1_PLD_ORT2, 0x40010ab4\r
-.set CYREG_B0_P5_U1_PLD_ORT3, 0x40010ab6\r
-.set CYREG_B0_P5_U1_MC_CFG_CEN_CONST, 0x40010ab8\r
-.set CYREG_B0_P5_U1_MC_CFG_XORFB, 0x40010aba\r
-.set CYREG_B0_P5_U1_MC_CFG_SET_RESET, 0x40010abc\r
-.set CYREG_B0_P5_U1_MC_CFG_BYPASS, 0x40010abe\r
-.set CYREG_B0_P5_U1_CFG0, 0x40010ac0\r
-.set CYREG_B0_P5_U1_CFG1, 0x40010ac1\r
-.set CYREG_B0_P5_U1_CFG2, 0x40010ac2\r
-.set CYREG_B0_P5_U1_CFG3, 0x40010ac3\r
-.set CYREG_B0_P5_U1_CFG4, 0x40010ac4\r
-.set CYREG_B0_P5_U1_CFG5, 0x40010ac5\r
-.set CYREG_B0_P5_U1_CFG6, 0x40010ac6\r
-.set CYREG_B0_P5_U1_CFG7, 0x40010ac7\r
-.set CYREG_B0_P5_U1_CFG8, 0x40010ac8\r
-.set CYREG_B0_P5_U1_CFG9, 0x40010ac9\r
-.set CYREG_B0_P5_U1_CFG10, 0x40010aca\r
-.set CYREG_B0_P5_U1_CFG11, 0x40010acb\r
-.set CYREG_B0_P5_U1_CFG12, 0x40010acc\r
-.set CYREG_B0_P5_U1_CFG13, 0x40010acd\r
-.set CYREG_B0_P5_U1_CFG14, 0x40010ace\r
-.set CYREG_B0_P5_U1_CFG15, 0x40010acf\r
-.set CYREG_B0_P5_U1_CFG16, 0x40010ad0\r
-.set CYREG_B0_P5_U1_CFG17, 0x40010ad1\r
-.set CYREG_B0_P5_U1_CFG18, 0x40010ad2\r
-.set CYREG_B0_P5_U1_CFG19, 0x40010ad3\r
-.set CYREG_B0_P5_U1_CFG20, 0x40010ad4\r
-.set CYREG_B0_P5_U1_CFG21, 0x40010ad5\r
-.set CYREG_B0_P5_U1_CFG22, 0x40010ad6\r
-.set CYREG_B0_P5_U1_CFG23, 0x40010ad7\r
-.set CYREG_B0_P5_U1_CFG24, 0x40010ad8\r
-.set CYREG_B0_P5_U1_CFG25, 0x40010ad9\r
-.set CYREG_B0_P5_U1_CFG26, 0x40010ada\r
-.set CYREG_B0_P5_U1_CFG27, 0x40010adb\r
-.set CYREG_B0_P5_U1_CFG28, 0x40010adc\r
-.set CYREG_B0_P5_U1_CFG29, 0x40010add\r
-.set CYREG_B0_P5_U1_CFG30, 0x40010ade\r
-.set CYREG_B0_P5_U1_CFG31, 0x40010adf\r
-.set CYREG_B0_P5_U1_DCFG0, 0x40010ae0\r
-.set CYREG_B0_P5_U1_DCFG1, 0x40010ae2\r
-.set CYREG_B0_P5_U1_DCFG2, 0x40010ae4\r
-.set CYREG_B0_P5_U1_DCFG3, 0x40010ae6\r
-.set CYREG_B0_P5_U1_DCFG4, 0x40010ae8\r
-.set CYREG_B0_P5_U1_DCFG5, 0x40010aea\r
-.set CYREG_B0_P5_U1_DCFG6, 0x40010aec\r
-.set CYREG_B0_P5_U1_DCFG7, 0x40010aee\r
-.set CYDEV_UCFG_B0_P5_ROUTE_BASE, 0x40010b00\r
-.set CYDEV_UCFG_B0_P5_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P6_BASE, 0x40010c00\r
-.set CYDEV_UCFG_B0_P6_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P6_U0_BASE, 0x40010c00\r
-.set CYDEV_UCFG_B0_P6_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P6_U0_PLD_IT0, 0x40010c00\r
-.set CYREG_B0_P6_U0_PLD_IT1, 0x40010c04\r
-.set CYREG_B0_P6_U0_PLD_IT2, 0x40010c08\r
-.set CYREG_B0_P6_U0_PLD_IT3, 0x40010c0c\r
-.set CYREG_B0_P6_U0_PLD_IT4, 0x40010c10\r
-.set CYREG_B0_P6_U0_PLD_IT5, 0x40010c14\r
-.set CYREG_B0_P6_U0_PLD_IT6, 0x40010c18\r
-.set CYREG_B0_P6_U0_PLD_IT7, 0x40010c1c\r
-.set CYREG_B0_P6_U0_PLD_IT8, 0x40010c20\r
-.set CYREG_B0_P6_U0_PLD_IT9, 0x40010c24\r
-.set CYREG_B0_P6_U0_PLD_IT10, 0x40010c28\r
-.set CYREG_B0_P6_U0_PLD_IT11, 0x40010c2c\r
-.set CYREG_B0_P6_U0_PLD_ORT0, 0x40010c30\r
-.set CYREG_B0_P6_U0_PLD_ORT1, 0x40010c32\r
-.set CYREG_B0_P6_U0_PLD_ORT2, 0x40010c34\r
-.set CYREG_B0_P6_U0_PLD_ORT3, 0x40010c36\r
-.set CYREG_B0_P6_U0_MC_CFG_CEN_CONST, 0x40010c38\r
-.set CYREG_B0_P6_U0_MC_CFG_XORFB, 0x40010c3a\r
-.set CYREG_B0_P6_U0_MC_CFG_SET_RESET, 0x40010c3c\r
-.set CYREG_B0_P6_U0_MC_CFG_BYPASS, 0x40010c3e\r
-.set CYREG_B0_P6_U0_CFG0, 0x40010c40\r
-.set CYREG_B0_P6_U0_CFG1, 0x40010c41\r
-.set CYREG_B0_P6_U0_CFG2, 0x40010c42\r
-.set CYREG_B0_P6_U0_CFG3, 0x40010c43\r
-.set CYREG_B0_P6_U0_CFG4, 0x40010c44\r
-.set CYREG_B0_P6_U0_CFG5, 0x40010c45\r
-.set CYREG_B0_P6_U0_CFG6, 0x40010c46\r
-.set CYREG_B0_P6_U0_CFG7, 0x40010c47\r
-.set CYREG_B0_P6_U0_CFG8, 0x40010c48\r
-.set CYREG_B0_P6_U0_CFG9, 0x40010c49\r
-.set CYREG_B0_P6_U0_CFG10, 0x40010c4a\r
-.set CYREG_B0_P6_U0_CFG11, 0x40010c4b\r
-.set CYREG_B0_P6_U0_CFG12, 0x40010c4c\r
-.set CYREG_B0_P6_U0_CFG13, 0x40010c4d\r
-.set CYREG_B0_P6_U0_CFG14, 0x40010c4e\r
-.set CYREG_B0_P6_U0_CFG15, 0x40010c4f\r
-.set CYREG_B0_P6_U0_CFG16, 0x40010c50\r
-.set CYREG_B0_P6_U0_CFG17, 0x40010c51\r
-.set CYREG_B0_P6_U0_CFG18, 0x40010c52\r
-.set CYREG_B0_P6_U0_CFG19, 0x40010c53\r
-.set CYREG_B0_P6_U0_CFG20, 0x40010c54\r
-.set CYREG_B0_P6_U0_CFG21, 0x40010c55\r
-.set CYREG_B0_P6_U0_CFG22, 0x40010c56\r
-.set CYREG_B0_P6_U0_CFG23, 0x40010c57\r
-.set CYREG_B0_P6_U0_CFG24, 0x40010c58\r
-.set CYREG_B0_P6_U0_CFG25, 0x40010c59\r
-.set CYREG_B0_P6_U0_CFG26, 0x40010c5a\r
-.set CYREG_B0_P6_U0_CFG27, 0x40010c5b\r
-.set CYREG_B0_P6_U0_CFG28, 0x40010c5c\r
-.set CYREG_B0_P6_U0_CFG29, 0x40010c5d\r
-.set CYREG_B0_P6_U0_CFG30, 0x40010c5e\r
-.set CYREG_B0_P6_U0_CFG31, 0x40010c5f\r
-.set CYREG_B0_P6_U0_DCFG0, 0x40010c60\r
-.set CYREG_B0_P6_U0_DCFG1, 0x40010c62\r
-.set CYREG_B0_P6_U0_DCFG2, 0x40010c64\r
-.set CYREG_B0_P6_U0_DCFG3, 0x40010c66\r
-.set CYREG_B0_P6_U0_DCFG4, 0x40010c68\r
-.set CYREG_B0_P6_U0_DCFG5, 0x40010c6a\r
-.set CYREG_B0_P6_U0_DCFG6, 0x40010c6c\r
-.set CYREG_B0_P6_U0_DCFG7, 0x40010c6e\r
-.set CYDEV_UCFG_B0_P6_U1_BASE, 0x40010c80\r
-.set CYDEV_UCFG_B0_P6_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P6_U1_PLD_IT0, 0x40010c80\r
-.set CYREG_B0_P6_U1_PLD_IT1, 0x40010c84\r
-.set CYREG_B0_P6_U1_PLD_IT2, 0x40010c88\r
-.set CYREG_B0_P6_U1_PLD_IT3, 0x40010c8c\r
-.set CYREG_B0_P6_U1_PLD_IT4, 0x40010c90\r
-.set CYREG_B0_P6_U1_PLD_IT5, 0x40010c94\r
-.set CYREG_B0_P6_U1_PLD_IT6, 0x40010c98\r
-.set CYREG_B0_P6_U1_PLD_IT7, 0x40010c9c\r
-.set CYREG_B0_P6_U1_PLD_IT8, 0x40010ca0\r
-.set CYREG_B0_P6_U1_PLD_IT9, 0x40010ca4\r
-.set CYREG_B0_P6_U1_PLD_IT10, 0x40010ca8\r
-.set CYREG_B0_P6_U1_PLD_IT11, 0x40010cac\r
-.set CYREG_B0_P6_U1_PLD_ORT0, 0x40010cb0\r
-.set CYREG_B0_P6_U1_PLD_ORT1, 0x40010cb2\r
-.set CYREG_B0_P6_U1_PLD_ORT2, 0x40010cb4\r
-.set CYREG_B0_P6_U1_PLD_ORT3, 0x40010cb6\r
-.set CYREG_B0_P6_U1_MC_CFG_CEN_CONST, 0x40010cb8\r
-.set CYREG_B0_P6_U1_MC_CFG_XORFB, 0x40010cba\r
-.set CYREG_B0_P6_U1_MC_CFG_SET_RESET, 0x40010cbc\r
-.set CYREG_B0_P6_U1_MC_CFG_BYPASS, 0x40010cbe\r
-.set CYREG_B0_P6_U1_CFG0, 0x40010cc0\r
-.set CYREG_B0_P6_U1_CFG1, 0x40010cc1\r
-.set CYREG_B0_P6_U1_CFG2, 0x40010cc2\r
-.set CYREG_B0_P6_U1_CFG3, 0x40010cc3\r
-.set CYREG_B0_P6_U1_CFG4, 0x40010cc4\r
-.set CYREG_B0_P6_U1_CFG5, 0x40010cc5\r
-.set CYREG_B0_P6_U1_CFG6, 0x40010cc6\r
-.set CYREG_B0_P6_U1_CFG7, 0x40010cc7\r
-.set CYREG_B0_P6_U1_CFG8, 0x40010cc8\r
-.set CYREG_B0_P6_U1_CFG9, 0x40010cc9\r
-.set CYREG_B0_P6_U1_CFG10, 0x40010cca\r
-.set CYREG_B0_P6_U1_CFG11, 0x40010ccb\r
-.set CYREG_B0_P6_U1_CFG12, 0x40010ccc\r
-.set CYREG_B0_P6_U1_CFG13, 0x40010ccd\r
-.set CYREG_B0_P6_U1_CFG14, 0x40010cce\r
-.set CYREG_B0_P6_U1_CFG15, 0x40010ccf\r
-.set CYREG_B0_P6_U1_CFG16, 0x40010cd0\r
-.set CYREG_B0_P6_U1_CFG17, 0x40010cd1\r
-.set CYREG_B0_P6_U1_CFG18, 0x40010cd2\r
-.set CYREG_B0_P6_U1_CFG19, 0x40010cd3\r
-.set CYREG_B0_P6_U1_CFG20, 0x40010cd4\r
-.set CYREG_B0_P6_U1_CFG21, 0x40010cd5\r
-.set CYREG_B0_P6_U1_CFG22, 0x40010cd6\r
-.set CYREG_B0_P6_U1_CFG23, 0x40010cd7\r
-.set CYREG_B0_P6_U1_CFG24, 0x40010cd8\r
-.set CYREG_B0_P6_U1_CFG25, 0x40010cd9\r
-.set CYREG_B0_P6_U1_CFG26, 0x40010cda\r
-.set CYREG_B0_P6_U1_CFG27, 0x40010cdb\r
-.set CYREG_B0_P6_U1_CFG28, 0x40010cdc\r
-.set CYREG_B0_P6_U1_CFG29, 0x40010cdd\r
-.set CYREG_B0_P6_U1_CFG30, 0x40010cde\r
-.set CYREG_B0_P6_U1_CFG31, 0x40010cdf\r
-.set CYREG_B0_P6_U1_DCFG0, 0x40010ce0\r
-.set CYREG_B0_P6_U1_DCFG1, 0x40010ce2\r
-.set CYREG_B0_P6_U1_DCFG2, 0x40010ce4\r
-.set CYREG_B0_P6_U1_DCFG3, 0x40010ce6\r
-.set CYREG_B0_P6_U1_DCFG4, 0x40010ce8\r
-.set CYREG_B0_P6_U1_DCFG5, 0x40010cea\r
-.set CYREG_B0_P6_U1_DCFG6, 0x40010cec\r
-.set CYREG_B0_P6_U1_DCFG7, 0x40010cee\r
-.set CYDEV_UCFG_B0_P6_ROUTE_BASE, 0x40010d00\r
-.set CYDEV_UCFG_B0_P6_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B0_P7_BASE, 0x40010e00\r
-.set CYDEV_UCFG_B0_P7_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B0_P7_U0_BASE, 0x40010e00\r
-.set CYDEV_UCFG_B0_P7_U0_SIZE, 0x00000070\r
-.set CYREG_B0_P7_U0_PLD_IT0, 0x40010e00\r
-.set CYREG_B0_P7_U0_PLD_IT1, 0x40010e04\r
-.set CYREG_B0_P7_U0_PLD_IT2, 0x40010e08\r
-.set CYREG_B0_P7_U0_PLD_IT3, 0x40010e0c\r
-.set CYREG_B0_P7_U0_PLD_IT4, 0x40010e10\r
-.set CYREG_B0_P7_U0_PLD_IT5, 0x40010e14\r
-.set CYREG_B0_P7_U0_PLD_IT6, 0x40010e18\r
-.set CYREG_B0_P7_U0_PLD_IT7, 0x40010e1c\r
-.set CYREG_B0_P7_U0_PLD_IT8, 0x40010e20\r
-.set CYREG_B0_P7_U0_PLD_IT9, 0x40010e24\r
-.set CYREG_B0_P7_U0_PLD_IT10, 0x40010e28\r
-.set CYREG_B0_P7_U0_PLD_IT11, 0x40010e2c\r
-.set CYREG_B0_P7_U0_PLD_ORT0, 0x40010e30\r
-.set CYREG_B0_P7_U0_PLD_ORT1, 0x40010e32\r
-.set CYREG_B0_P7_U0_PLD_ORT2, 0x40010e34\r
-.set CYREG_B0_P7_U0_PLD_ORT3, 0x40010e36\r
-.set CYREG_B0_P7_U0_MC_CFG_CEN_CONST, 0x40010e38\r
-.set CYREG_B0_P7_U0_MC_CFG_XORFB, 0x40010e3a\r
-.set CYREG_B0_P7_U0_MC_CFG_SET_RESET, 0x40010e3c\r
-.set CYREG_B0_P7_U0_MC_CFG_BYPASS, 0x40010e3e\r
-.set CYREG_B0_P7_U0_CFG0, 0x40010e40\r
-.set CYREG_B0_P7_U0_CFG1, 0x40010e41\r
-.set CYREG_B0_P7_U0_CFG2, 0x40010e42\r
-.set CYREG_B0_P7_U0_CFG3, 0x40010e43\r
-.set CYREG_B0_P7_U0_CFG4, 0x40010e44\r
-.set CYREG_B0_P7_U0_CFG5, 0x40010e45\r
-.set CYREG_B0_P7_U0_CFG6, 0x40010e46\r
-.set CYREG_B0_P7_U0_CFG7, 0x40010e47\r
-.set CYREG_B0_P7_U0_CFG8, 0x40010e48\r
-.set CYREG_B0_P7_U0_CFG9, 0x40010e49\r
-.set CYREG_B0_P7_U0_CFG10, 0x40010e4a\r
-.set CYREG_B0_P7_U0_CFG11, 0x40010e4b\r
-.set CYREG_B0_P7_U0_CFG12, 0x40010e4c\r
-.set CYREG_B0_P7_U0_CFG13, 0x40010e4d\r
-.set CYREG_B0_P7_U0_CFG14, 0x40010e4e\r
-.set CYREG_B0_P7_U0_CFG15, 0x40010e4f\r
-.set CYREG_B0_P7_U0_CFG16, 0x40010e50\r
-.set CYREG_B0_P7_U0_CFG17, 0x40010e51\r
-.set CYREG_B0_P7_U0_CFG18, 0x40010e52\r
-.set CYREG_B0_P7_U0_CFG19, 0x40010e53\r
-.set CYREG_B0_P7_U0_CFG20, 0x40010e54\r
-.set CYREG_B0_P7_U0_CFG21, 0x40010e55\r
-.set CYREG_B0_P7_U0_CFG22, 0x40010e56\r
-.set CYREG_B0_P7_U0_CFG23, 0x40010e57\r
-.set CYREG_B0_P7_U0_CFG24, 0x40010e58\r
-.set CYREG_B0_P7_U0_CFG25, 0x40010e59\r
-.set CYREG_B0_P7_U0_CFG26, 0x40010e5a\r
-.set CYREG_B0_P7_U0_CFG27, 0x40010e5b\r
-.set CYREG_B0_P7_U0_CFG28, 0x40010e5c\r
-.set CYREG_B0_P7_U0_CFG29, 0x40010e5d\r
-.set CYREG_B0_P7_U0_CFG30, 0x40010e5e\r
-.set CYREG_B0_P7_U0_CFG31, 0x40010e5f\r
-.set CYREG_B0_P7_U0_DCFG0, 0x40010e60\r
-.set CYREG_B0_P7_U0_DCFG1, 0x40010e62\r
-.set CYREG_B0_P7_U0_DCFG2, 0x40010e64\r
-.set CYREG_B0_P7_U0_DCFG3, 0x40010e66\r
-.set CYREG_B0_P7_U0_DCFG4, 0x40010e68\r
-.set CYREG_B0_P7_U0_DCFG5, 0x40010e6a\r
-.set CYREG_B0_P7_U0_DCFG6, 0x40010e6c\r
-.set CYREG_B0_P7_U0_DCFG7, 0x40010e6e\r
-.set CYDEV_UCFG_B0_P7_U1_BASE, 0x40010e80\r
-.set CYDEV_UCFG_B0_P7_U1_SIZE, 0x00000070\r
-.set CYREG_B0_P7_U1_PLD_IT0, 0x40010e80\r
-.set CYREG_B0_P7_U1_PLD_IT1, 0x40010e84\r
-.set CYREG_B0_P7_U1_PLD_IT2, 0x40010e88\r
-.set CYREG_B0_P7_U1_PLD_IT3, 0x40010e8c\r
-.set CYREG_B0_P7_U1_PLD_IT4, 0x40010e90\r
-.set CYREG_B0_P7_U1_PLD_IT5, 0x40010e94\r
-.set CYREG_B0_P7_U1_PLD_IT6, 0x40010e98\r
-.set CYREG_B0_P7_U1_PLD_IT7, 0x40010e9c\r
-.set CYREG_B0_P7_U1_PLD_IT8, 0x40010ea0\r
-.set CYREG_B0_P7_U1_PLD_IT9, 0x40010ea4\r
-.set CYREG_B0_P7_U1_PLD_IT10, 0x40010ea8\r
-.set CYREG_B0_P7_U1_PLD_IT11, 0x40010eac\r
-.set CYREG_B0_P7_U1_PLD_ORT0, 0x40010eb0\r
-.set CYREG_B0_P7_U1_PLD_ORT1, 0x40010eb2\r
-.set CYREG_B0_P7_U1_PLD_ORT2, 0x40010eb4\r
-.set CYREG_B0_P7_U1_PLD_ORT3, 0x40010eb6\r
-.set CYREG_B0_P7_U1_MC_CFG_CEN_CONST, 0x40010eb8\r
-.set CYREG_B0_P7_U1_MC_CFG_XORFB, 0x40010eba\r
-.set CYREG_B0_P7_U1_MC_CFG_SET_RESET, 0x40010ebc\r
-.set CYREG_B0_P7_U1_MC_CFG_BYPASS, 0x40010ebe\r
-.set CYREG_B0_P7_U1_CFG0, 0x40010ec0\r
-.set CYREG_B0_P7_U1_CFG1, 0x40010ec1\r
-.set CYREG_B0_P7_U1_CFG2, 0x40010ec2\r
-.set CYREG_B0_P7_U1_CFG3, 0x40010ec3\r
-.set CYREG_B0_P7_U1_CFG4, 0x40010ec4\r
-.set CYREG_B0_P7_U1_CFG5, 0x40010ec5\r
-.set CYREG_B0_P7_U1_CFG6, 0x40010ec6\r
-.set CYREG_B0_P7_U1_CFG7, 0x40010ec7\r
-.set CYREG_B0_P7_U1_CFG8, 0x40010ec8\r
-.set CYREG_B0_P7_U1_CFG9, 0x40010ec9\r
-.set CYREG_B0_P7_U1_CFG10, 0x40010eca\r
-.set CYREG_B0_P7_U1_CFG11, 0x40010ecb\r
-.set CYREG_B0_P7_U1_CFG12, 0x40010ecc\r
-.set CYREG_B0_P7_U1_CFG13, 0x40010ecd\r
-.set CYREG_B0_P7_U1_CFG14, 0x40010ece\r
-.set CYREG_B0_P7_U1_CFG15, 0x40010ecf\r
-.set CYREG_B0_P7_U1_CFG16, 0x40010ed0\r
-.set CYREG_B0_P7_U1_CFG17, 0x40010ed1\r
-.set CYREG_B0_P7_U1_CFG18, 0x40010ed2\r
-.set CYREG_B0_P7_U1_CFG19, 0x40010ed3\r
-.set CYREG_B0_P7_U1_CFG20, 0x40010ed4\r
-.set CYREG_B0_P7_U1_CFG21, 0x40010ed5\r
-.set CYREG_B0_P7_U1_CFG22, 0x40010ed6\r
-.set CYREG_B0_P7_U1_CFG23, 0x40010ed7\r
-.set CYREG_B0_P7_U1_CFG24, 0x40010ed8\r
-.set CYREG_B0_P7_U1_CFG25, 0x40010ed9\r
-.set CYREG_B0_P7_U1_CFG26, 0x40010eda\r
-.set CYREG_B0_P7_U1_CFG27, 0x40010edb\r
-.set CYREG_B0_P7_U1_CFG28, 0x40010edc\r
-.set CYREG_B0_P7_U1_CFG29, 0x40010edd\r
-.set CYREG_B0_P7_U1_CFG30, 0x40010ede\r
-.set CYREG_B0_P7_U1_CFG31, 0x40010edf\r
-.set CYREG_B0_P7_U1_DCFG0, 0x40010ee0\r
-.set CYREG_B0_P7_U1_DCFG1, 0x40010ee2\r
-.set CYREG_B0_P7_U1_DCFG2, 0x40010ee4\r
-.set CYREG_B0_P7_U1_DCFG3, 0x40010ee6\r
-.set CYREG_B0_P7_U1_DCFG4, 0x40010ee8\r
-.set CYREG_B0_P7_U1_DCFG5, 0x40010eea\r
-.set CYREG_B0_P7_U1_DCFG6, 0x40010eec\r
-.set CYREG_B0_P7_U1_DCFG7, 0x40010eee\r
-.set CYDEV_UCFG_B0_P7_ROUTE_BASE, 0x40010f00\r
-.set CYDEV_UCFG_B0_P7_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_BASE, 0x40011000\r
-.set CYDEV_UCFG_B1_SIZE, 0x00000fef\r
-.set CYDEV_UCFG_B1_P2_BASE, 0x40011400\r
-.set CYDEV_UCFG_B1_P2_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P2_U0_BASE, 0x40011400\r
-.set CYDEV_UCFG_B1_P2_U0_SIZE, 0x00000070\r
-.set CYREG_B1_P2_U0_PLD_IT0, 0x40011400\r
-.set CYREG_B1_P2_U0_PLD_IT1, 0x40011404\r
-.set CYREG_B1_P2_U0_PLD_IT2, 0x40011408\r
-.set CYREG_B1_P2_U0_PLD_IT3, 0x4001140c\r
-.set CYREG_B1_P2_U0_PLD_IT4, 0x40011410\r
-.set CYREG_B1_P2_U0_PLD_IT5, 0x40011414\r
-.set CYREG_B1_P2_U0_PLD_IT6, 0x40011418\r
-.set CYREG_B1_P2_U0_PLD_IT7, 0x4001141c\r
-.set CYREG_B1_P2_U0_PLD_IT8, 0x40011420\r
-.set CYREG_B1_P2_U0_PLD_IT9, 0x40011424\r
-.set CYREG_B1_P2_U0_PLD_IT10, 0x40011428\r
-.set CYREG_B1_P2_U0_PLD_IT11, 0x4001142c\r
-.set CYREG_B1_P2_U0_PLD_ORT0, 0x40011430\r
-.set CYREG_B1_P2_U0_PLD_ORT1, 0x40011432\r
-.set CYREG_B1_P2_U0_PLD_ORT2, 0x40011434\r
-.set CYREG_B1_P2_U0_PLD_ORT3, 0x40011436\r
-.set CYREG_B1_P2_U0_MC_CFG_CEN_CONST, 0x40011438\r
-.set CYREG_B1_P2_U0_MC_CFG_XORFB, 0x4001143a\r
-.set CYREG_B1_P2_U0_MC_CFG_SET_RESET, 0x4001143c\r
-.set CYREG_B1_P2_U0_MC_CFG_BYPASS, 0x4001143e\r
-.set CYREG_B1_P2_U0_CFG0, 0x40011440\r
-.set CYREG_B1_P2_U0_CFG1, 0x40011441\r
-.set CYREG_B1_P2_U0_CFG2, 0x40011442\r
-.set CYREG_B1_P2_U0_CFG3, 0x40011443\r
-.set CYREG_B1_P2_U0_CFG4, 0x40011444\r
-.set CYREG_B1_P2_U0_CFG5, 0x40011445\r
-.set CYREG_B1_P2_U0_CFG6, 0x40011446\r
-.set CYREG_B1_P2_U0_CFG7, 0x40011447\r
-.set CYREG_B1_P2_U0_CFG8, 0x40011448\r
-.set CYREG_B1_P2_U0_CFG9, 0x40011449\r
-.set CYREG_B1_P2_U0_CFG10, 0x4001144a\r
-.set CYREG_B1_P2_U0_CFG11, 0x4001144b\r
-.set CYREG_B1_P2_U0_CFG12, 0x4001144c\r
-.set CYREG_B1_P2_U0_CFG13, 0x4001144d\r
-.set CYREG_B1_P2_U0_CFG14, 0x4001144e\r
-.set CYREG_B1_P2_U0_CFG15, 0x4001144f\r
-.set CYREG_B1_P2_U0_CFG16, 0x40011450\r
-.set CYREG_B1_P2_U0_CFG17, 0x40011451\r
-.set CYREG_B1_P2_U0_CFG18, 0x40011452\r
-.set CYREG_B1_P2_U0_CFG19, 0x40011453\r
-.set CYREG_B1_P2_U0_CFG20, 0x40011454\r
-.set CYREG_B1_P2_U0_CFG21, 0x40011455\r
-.set CYREG_B1_P2_U0_CFG22, 0x40011456\r
-.set CYREG_B1_P2_U0_CFG23, 0x40011457\r
-.set CYREG_B1_P2_U0_CFG24, 0x40011458\r
-.set CYREG_B1_P2_U0_CFG25, 0x40011459\r
-.set CYREG_B1_P2_U0_CFG26, 0x4001145a\r
-.set CYREG_B1_P2_U0_CFG27, 0x4001145b\r
-.set CYREG_B1_P2_U0_CFG28, 0x4001145c\r
-.set CYREG_B1_P2_U0_CFG29, 0x4001145d\r
-.set CYREG_B1_P2_U0_CFG30, 0x4001145e\r
-.set CYREG_B1_P2_U0_CFG31, 0x4001145f\r
-.set CYREG_B1_P2_U0_DCFG0, 0x40011460\r
-.set CYREG_B1_P2_U0_DCFG1, 0x40011462\r
-.set CYREG_B1_P2_U0_DCFG2, 0x40011464\r
-.set CYREG_B1_P2_U0_DCFG3, 0x40011466\r
-.set CYREG_B1_P2_U0_DCFG4, 0x40011468\r
-.set CYREG_B1_P2_U0_DCFG5, 0x4001146a\r
-.set CYREG_B1_P2_U0_DCFG6, 0x4001146c\r
-.set CYREG_B1_P2_U0_DCFG7, 0x4001146e\r
-.set CYDEV_UCFG_B1_P2_U1_BASE, 0x40011480\r
-.set CYDEV_UCFG_B1_P2_U1_SIZE, 0x00000070\r
-.set CYREG_B1_P2_U1_PLD_IT0, 0x40011480\r
-.set CYREG_B1_P2_U1_PLD_IT1, 0x40011484\r
-.set CYREG_B1_P2_U1_PLD_IT2, 0x40011488\r
-.set CYREG_B1_P2_U1_PLD_IT3, 0x4001148c\r
-.set CYREG_B1_P2_U1_PLD_IT4, 0x40011490\r
-.set CYREG_B1_P2_U1_PLD_IT5, 0x40011494\r
-.set CYREG_B1_P2_U1_PLD_IT6, 0x40011498\r
-.set CYREG_B1_P2_U1_PLD_IT7, 0x4001149c\r
-.set CYREG_B1_P2_U1_PLD_IT8, 0x400114a0\r
-.set CYREG_B1_P2_U1_PLD_IT9, 0x400114a4\r
-.set CYREG_B1_P2_U1_PLD_IT10, 0x400114a8\r
-.set CYREG_B1_P2_U1_PLD_IT11, 0x400114ac\r
-.set CYREG_B1_P2_U1_PLD_ORT0, 0x400114b0\r
-.set CYREG_B1_P2_U1_PLD_ORT1, 0x400114b2\r
-.set CYREG_B1_P2_U1_PLD_ORT2, 0x400114b4\r
-.set CYREG_B1_P2_U1_PLD_ORT3, 0x400114b6\r
-.set CYREG_B1_P2_U1_MC_CFG_CEN_CONST, 0x400114b8\r
-.set CYREG_B1_P2_U1_MC_CFG_XORFB, 0x400114ba\r
-.set CYREG_B1_P2_U1_MC_CFG_SET_RESET, 0x400114bc\r
-.set CYREG_B1_P2_U1_MC_CFG_BYPASS, 0x400114be\r
-.set CYREG_B1_P2_U1_CFG0, 0x400114c0\r
-.set CYREG_B1_P2_U1_CFG1, 0x400114c1\r
-.set CYREG_B1_P2_U1_CFG2, 0x400114c2\r
-.set CYREG_B1_P2_U1_CFG3, 0x400114c3\r
-.set CYREG_B1_P2_U1_CFG4, 0x400114c4\r
-.set CYREG_B1_P2_U1_CFG5, 0x400114c5\r
-.set CYREG_B1_P2_U1_CFG6, 0x400114c6\r
-.set CYREG_B1_P2_U1_CFG7, 0x400114c7\r
-.set CYREG_B1_P2_U1_CFG8, 0x400114c8\r
-.set CYREG_B1_P2_U1_CFG9, 0x400114c9\r
-.set CYREG_B1_P2_U1_CFG10, 0x400114ca\r
-.set CYREG_B1_P2_U1_CFG11, 0x400114cb\r
-.set CYREG_B1_P2_U1_CFG12, 0x400114cc\r
-.set CYREG_B1_P2_U1_CFG13, 0x400114cd\r
-.set CYREG_B1_P2_U1_CFG14, 0x400114ce\r
-.set CYREG_B1_P2_U1_CFG15, 0x400114cf\r
-.set CYREG_B1_P2_U1_CFG16, 0x400114d0\r
-.set CYREG_B1_P2_U1_CFG17, 0x400114d1\r
-.set CYREG_B1_P2_U1_CFG18, 0x400114d2\r
-.set CYREG_B1_P2_U1_CFG19, 0x400114d3\r
-.set CYREG_B1_P2_U1_CFG20, 0x400114d4\r
-.set CYREG_B1_P2_U1_CFG21, 0x400114d5\r
-.set CYREG_B1_P2_U1_CFG22, 0x400114d6\r
-.set CYREG_B1_P2_U1_CFG23, 0x400114d7\r
-.set CYREG_B1_P2_U1_CFG24, 0x400114d8\r
-.set CYREG_B1_P2_U1_CFG25, 0x400114d9\r
-.set CYREG_B1_P2_U1_CFG26, 0x400114da\r
-.set CYREG_B1_P2_U1_CFG27, 0x400114db\r
-.set CYREG_B1_P2_U1_CFG28, 0x400114dc\r
-.set CYREG_B1_P2_U1_CFG29, 0x400114dd\r
-.set CYREG_B1_P2_U1_CFG30, 0x400114de\r
-.set CYREG_B1_P2_U1_CFG31, 0x400114df\r
-.set CYREG_B1_P2_U1_DCFG0, 0x400114e0\r
-.set CYREG_B1_P2_U1_DCFG1, 0x400114e2\r
-.set CYREG_B1_P2_U1_DCFG2, 0x400114e4\r
-.set CYREG_B1_P2_U1_DCFG3, 0x400114e6\r
-.set CYREG_B1_P2_U1_DCFG4, 0x400114e8\r
-.set CYREG_B1_P2_U1_DCFG5, 0x400114ea\r
-.set CYREG_B1_P2_U1_DCFG6, 0x400114ec\r
-.set CYREG_B1_P2_U1_DCFG7, 0x400114ee\r
-.set CYDEV_UCFG_B1_P2_ROUTE_BASE, 0x40011500\r
-.set CYDEV_UCFG_B1_P2_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P3_BASE, 0x40011600\r
-.set CYDEV_UCFG_B1_P3_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P3_U0_BASE, 0x40011600\r
-.set CYDEV_UCFG_B1_P3_U0_SIZE, 0x00000070\r
-.set CYREG_B1_P3_U0_PLD_IT0, 0x40011600\r
-.set CYREG_B1_P3_U0_PLD_IT1, 0x40011604\r
-.set CYREG_B1_P3_U0_PLD_IT2, 0x40011608\r
-.set CYREG_B1_P3_U0_PLD_IT3, 0x4001160c\r
-.set CYREG_B1_P3_U0_PLD_IT4, 0x40011610\r
-.set CYREG_B1_P3_U0_PLD_IT5, 0x40011614\r
-.set CYREG_B1_P3_U0_PLD_IT6, 0x40011618\r
-.set CYREG_B1_P3_U0_PLD_IT7, 0x4001161c\r
-.set CYREG_B1_P3_U0_PLD_IT8, 0x40011620\r
-.set CYREG_B1_P3_U0_PLD_IT9, 0x40011624\r
-.set CYREG_B1_P3_U0_PLD_IT10, 0x40011628\r
-.set CYREG_B1_P3_U0_PLD_IT11, 0x4001162c\r
-.set CYREG_B1_P3_U0_PLD_ORT0, 0x40011630\r
-.set CYREG_B1_P3_U0_PLD_ORT1, 0x40011632\r
-.set CYREG_B1_P3_U0_PLD_ORT2, 0x40011634\r
-.set CYREG_B1_P3_U0_PLD_ORT3, 0x40011636\r
-.set CYREG_B1_P3_U0_MC_CFG_CEN_CONST, 0x40011638\r
-.set CYREG_B1_P3_U0_MC_CFG_XORFB, 0x4001163a\r
-.set CYREG_B1_P3_U0_MC_CFG_SET_RESET, 0x4001163c\r
-.set CYREG_B1_P3_U0_MC_CFG_BYPASS, 0x4001163e\r
-.set CYREG_B1_P3_U0_CFG0, 0x40011640\r
-.set CYREG_B1_P3_U0_CFG1, 0x40011641\r
-.set CYREG_B1_P3_U0_CFG2, 0x40011642\r
-.set CYREG_B1_P3_U0_CFG3, 0x40011643\r
-.set CYREG_B1_P3_U0_CFG4, 0x40011644\r
-.set CYREG_B1_P3_U0_CFG5, 0x40011645\r
-.set CYREG_B1_P3_U0_CFG6, 0x40011646\r
-.set CYREG_B1_P3_U0_CFG7, 0x40011647\r
-.set CYREG_B1_P3_U0_CFG8, 0x40011648\r
-.set CYREG_B1_P3_U0_CFG9, 0x40011649\r
-.set CYREG_B1_P3_U0_CFG10, 0x4001164a\r
-.set CYREG_B1_P3_U0_CFG11, 0x4001164b\r
-.set CYREG_B1_P3_U0_CFG12, 0x4001164c\r
-.set CYREG_B1_P3_U0_CFG13, 0x4001164d\r
-.set CYREG_B1_P3_U0_CFG14, 0x4001164e\r
-.set CYREG_B1_P3_U0_CFG15, 0x4001164f\r
-.set CYREG_B1_P3_U0_CFG16, 0x40011650\r
-.set CYREG_B1_P3_U0_CFG17, 0x40011651\r
-.set CYREG_B1_P3_U0_CFG18, 0x40011652\r
-.set CYREG_B1_P3_U0_CFG19, 0x40011653\r
-.set CYREG_B1_P3_U0_CFG20, 0x40011654\r
-.set CYREG_B1_P3_U0_CFG21, 0x40011655\r
-.set CYREG_B1_P3_U0_CFG22, 0x40011656\r
-.set CYREG_B1_P3_U0_CFG23, 0x40011657\r
-.set CYREG_B1_P3_U0_CFG24, 0x40011658\r
-.set CYREG_B1_P3_U0_CFG25, 0x40011659\r
-.set CYREG_B1_P3_U0_CFG26, 0x4001165a\r
-.set CYREG_B1_P3_U0_CFG27, 0x4001165b\r
-.set CYREG_B1_P3_U0_CFG28, 0x4001165c\r
-.set CYREG_B1_P3_U0_CFG29, 0x4001165d\r
-.set CYREG_B1_P3_U0_CFG30, 0x4001165e\r
-.set CYREG_B1_P3_U0_CFG31, 0x4001165f\r
-.set CYREG_B1_P3_U0_DCFG0, 0x40011660\r
-.set CYREG_B1_P3_U0_DCFG1, 0x40011662\r
-.set CYREG_B1_P3_U0_DCFG2, 0x40011664\r
-.set CYREG_B1_P3_U0_DCFG3, 0x40011666\r
-.set CYREG_B1_P3_U0_DCFG4, 0x40011668\r
-.set CYREG_B1_P3_U0_DCFG5, 0x4001166a\r
-.set CYREG_B1_P3_U0_DCFG6, 0x4001166c\r
-.set CYREG_B1_P3_U0_DCFG7, 0x4001166e\r
-.set CYDEV_UCFG_B1_P3_U1_BASE, 0x40011680\r
-.set CYDEV_UCFG_B1_P3_U1_SIZE, 0x00000070\r
-.set CYREG_B1_P3_U1_PLD_IT0, 0x40011680\r
-.set CYREG_B1_P3_U1_PLD_IT1, 0x40011684\r
-.set CYREG_B1_P3_U1_PLD_IT2, 0x40011688\r
-.set CYREG_B1_P3_U1_PLD_IT3, 0x4001168c\r
-.set CYREG_B1_P3_U1_PLD_IT4, 0x40011690\r
-.set CYREG_B1_P3_U1_PLD_IT5, 0x40011694\r
-.set CYREG_B1_P3_U1_PLD_IT6, 0x40011698\r
-.set CYREG_B1_P3_U1_PLD_IT7, 0x4001169c\r
-.set CYREG_B1_P3_U1_PLD_IT8, 0x400116a0\r
-.set CYREG_B1_P3_U1_PLD_IT9, 0x400116a4\r
-.set CYREG_B1_P3_U1_PLD_IT10, 0x400116a8\r
-.set CYREG_B1_P3_U1_PLD_IT11, 0x400116ac\r
-.set CYREG_B1_P3_U1_PLD_ORT0, 0x400116b0\r
-.set CYREG_B1_P3_U1_PLD_ORT1, 0x400116b2\r
-.set CYREG_B1_P3_U1_PLD_ORT2, 0x400116b4\r
-.set CYREG_B1_P3_U1_PLD_ORT3, 0x400116b6\r
-.set CYREG_B1_P3_U1_MC_CFG_CEN_CONST, 0x400116b8\r
-.set CYREG_B1_P3_U1_MC_CFG_XORFB, 0x400116ba\r
-.set CYREG_B1_P3_U1_MC_CFG_SET_RESET, 0x400116bc\r
-.set CYREG_B1_P3_U1_MC_CFG_BYPASS, 0x400116be\r
-.set CYREG_B1_P3_U1_CFG0, 0x400116c0\r
-.set CYREG_B1_P3_U1_CFG1, 0x400116c1\r
-.set CYREG_B1_P3_U1_CFG2, 0x400116c2\r
-.set CYREG_B1_P3_U1_CFG3, 0x400116c3\r
-.set CYREG_B1_P3_U1_CFG4, 0x400116c4\r
-.set CYREG_B1_P3_U1_CFG5, 0x400116c5\r
-.set CYREG_B1_P3_U1_CFG6, 0x400116c6\r
-.set CYREG_B1_P3_U1_CFG7, 0x400116c7\r
-.set CYREG_B1_P3_U1_CFG8, 0x400116c8\r
-.set CYREG_B1_P3_U1_CFG9, 0x400116c9\r
-.set CYREG_B1_P3_U1_CFG10, 0x400116ca\r
-.set CYREG_B1_P3_U1_CFG11, 0x400116cb\r
-.set CYREG_B1_P3_U1_CFG12, 0x400116cc\r
-.set CYREG_B1_P3_U1_CFG13, 0x400116cd\r
-.set CYREG_B1_P3_U1_CFG14, 0x400116ce\r
-.set CYREG_B1_P3_U1_CFG15, 0x400116cf\r
-.set CYREG_B1_P3_U1_CFG16, 0x400116d0\r
-.set CYREG_B1_P3_U1_CFG17, 0x400116d1\r
-.set CYREG_B1_P3_U1_CFG18, 0x400116d2\r
-.set CYREG_B1_P3_U1_CFG19, 0x400116d3\r
-.set CYREG_B1_P3_U1_CFG20, 0x400116d4\r
-.set CYREG_B1_P3_U1_CFG21, 0x400116d5\r
-.set CYREG_B1_P3_U1_CFG22, 0x400116d6\r
-.set CYREG_B1_P3_U1_CFG23, 0x400116d7\r
-.set CYREG_B1_P3_U1_CFG24, 0x400116d8\r
-.set CYREG_B1_P3_U1_CFG25, 0x400116d9\r
-.set CYREG_B1_P3_U1_CFG26, 0x400116da\r
-.set CYREG_B1_P3_U1_CFG27, 0x400116db\r
-.set CYREG_B1_P3_U1_CFG28, 0x400116dc\r
-.set CYREG_B1_P3_U1_CFG29, 0x400116dd\r
-.set CYREG_B1_P3_U1_CFG30, 0x400116de\r
-.set CYREG_B1_P3_U1_CFG31, 0x400116df\r
-.set CYREG_B1_P3_U1_DCFG0, 0x400116e0\r
-.set CYREG_B1_P3_U1_DCFG1, 0x400116e2\r
-.set CYREG_B1_P3_U1_DCFG2, 0x400116e4\r
-.set CYREG_B1_P3_U1_DCFG3, 0x400116e6\r
-.set CYREG_B1_P3_U1_DCFG4, 0x400116e8\r
-.set CYREG_B1_P3_U1_DCFG5, 0x400116ea\r
-.set CYREG_B1_P3_U1_DCFG6, 0x400116ec\r
-.set CYREG_B1_P3_U1_DCFG7, 0x400116ee\r
-.set CYDEV_UCFG_B1_P3_ROUTE_BASE, 0x40011700\r
-.set CYDEV_UCFG_B1_P3_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P4_BASE, 0x40011800\r
-.set CYDEV_UCFG_B1_P4_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P4_U0_BASE, 0x40011800\r
-.set CYDEV_UCFG_B1_P4_U0_SIZE, 0x00000070\r
-.set CYREG_B1_P4_U0_PLD_IT0, 0x40011800\r
-.set CYREG_B1_P4_U0_PLD_IT1, 0x40011804\r
-.set CYREG_B1_P4_U0_PLD_IT2, 0x40011808\r
-.set CYREG_B1_P4_U0_PLD_IT3, 0x4001180c\r
-.set CYREG_B1_P4_U0_PLD_IT4, 0x40011810\r
-.set CYREG_B1_P4_U0_PLD_IT5, 0x40011814\r
-.set CYREG_B1_P4_U0_PLD_IT6, 0x40011818\r
-.set CYREG_B1_P4_U0_PLD_IT7, 0x4001181c\r
-.set CYREG_B1_P4_U0_PLD_IT8, 0x40011820\r
-.set CYREG_B1_P4_U0_PLD_IT9, 0x40011824\r
-.set CYREG_B1_P4_U0_PLD_IT10, 0x40011828\r
-.set CYREG_B1_P4_U0_PLD_IT11, 0x4001182c\r
-.set CYREG_B1_P4_U0_PLD_ORT0, 0x40011830\r
-.set CYREG_B1_P4_U0_PLD_ORT1, 0x40011832\r
-.set CYREG_B1_P4_U0_PLD_ORT2, 0x40011834\r
-.set CYREG_B1_P4_U0_PLD_ORT3, 0x40011836\r
-.set CYREG_B1_P4_U0_MC_CFG_CEN_CONST, 0x40011838\r
-.set CYREG_B1_P4_U0_MC_CFG_XORFB, 0x4001183a\r
-.set CYREG_B1_P4_U0_MC_CFG_SET_RESET, 0x4001183c\r
-.set CYREG_B1_P4_U0_MC_CFG_BYPASS, 0x4001183e\r
-.set CYREG_B1_P4_U0_CFG0, 0x40011840\r
-.set CYREG_B1_P4_U0_CFG1, 0x40011841\r
-.set CYREG_B1_P4_U0_CFG2, 0x40011842\r
-.set CYREG_B1_P4_U0_CFG3, 0x40011843\r
-.set CYREG_B1_P4_U0_CFG4, 0x40011844\r
-.set CYREG_B1_P4_U0_CFG5, 0x40011845\r
-.set CYREG_B1_P4_U0_CFG6, 0x40011846\r
-.set CYREG_B1_P4_U0_CFG7, 0x40011847\r
-.set CYREG_B1_P4_U0_CFG8, 0x40011848\r
-.set CYREG_B1_P4_U0_CFG9, 0x40011849\r
-.set CYREG_B1_P4_U0_CFG10, 0x4001184a\r
-.set CYREG_B1_P4_U0_CFG11, 0x4001184b\r
-.set CYREG_B1_P4_U0_CFG12, 0x4001184c\r
-.set CYREG_B1_P4_U0_CFG13, 0x4001184d\r
-.set CYREG_B1_P4_U0_CFG14, 0x4001184e\r
-.set CYREG_B1_P4_U0_CFG15, 0x4001184f\r
-.set CYREG_B1_P4_U0_CFG16, 0x40011850\r
-.set CYREG_B1_P4_U0_CFG17, 0x40011851\r
-.set CYREG_B1_P4_U0_CFG18, 0x40011852\r
-.set CYREG_B1_P4_U0_CFG19, 0x40011853\r
-.set CYREG_B1_P4_U0_CFG20, 0x40011854\r
-.set CYREG_B1_P4_U0_CFG21, 0x40011855\r
-.set CYREG_B1_P4_U0_CFG22, 0x40011856\r
-.set CYREG_B1_P4_U0_CFG23, 0x40011857\r
-.set CYREG_B1_P4_U0_CFG24, 0x40011858\r
-.set CYREG_B1_P4_U0_CFG25, 0x40011859\r
-.set CYREG_B1_P4_U0_CFG26, 0x4001185a\r
-.set CYREG_B1_P4_U0_CFG27, 0x4001185b\r
-.set CYREG_B1_P4_U0_CFG28, 0x4001185c\r
-.set CYREG_B1_P4_U0_CFG29, 0x4001185d\r
-.set CYREG_B1_P4_U0_CFG30, 0x4001185e\r
-.set CYREG_B1_P4_U0_CFG31, 0x4001185f\r
-.set CYREG_B1_P4_U0_DCFG0, 0x40011860\r
-.set CYREG_B1_P4_U0_DCFG1, 0x40011862\r
-.set CYREG_B1_P4_U0_DCFG2, 0x40011864\r
-.set CYREG_B1_P4_U0_DCFG3, 0x40011866\r
-.set CYREG_B1_P4_U0_DCFG4, 0x40011868\r
-.set CYREG_B1_P4_U0_DCFG5, 0x4001186a\r
-.set CYREG_B1_P4_U0_DCFG6, 0x4001186c\r
-.set CYREG_B1_P4_U0_DCFG7, 0x4001186e\r
-.set CYDEV_UCFG_B1_P4_U1_BASE, 0x40011880\r
-.set CYDEV_UCFG_B1_P4_U1_SIZE, 0x00000070\r
-.set CYREG_B1_P4_U1_PLD_IT0, 0x40011880\r
-.set CYREG_B1_P4_U1_PLD_IT1, 0x40011884\r
-.set CYREG_B1_P4_U1_PLD_IT2, 0x40011888\r
-.set CYREG_B1_P4_U1_PLD_IT3, 0x4001188c\r
-.set CYREG_B1_P4_U1_PLD_IT4, 0x40011890\r
-.set CYREG_B1_P4_U1_PLD_IT5, 0x40011894\r
-.set CYREG_B1_P4_U1_PLD_IT6, 0x40011898\r
-.set CYREG_B1_P4_U1_PLD_IT7, 0x4001189c\r
-.set CYREG_B1_P4_U1_PLD_IT8, 0x400118a0\r
-.set CYREG_B1_P4_U1_PLD_IT9, 0x400118a4\r
-.set CYREG_B1_P4_U1_PLD_IT10, 0x400118a8\r
-.set CYREG_B1_P4_U1_PLD_IT11, 0x400118ac\r
-.set CYREG_B1_P4_U1_PLD_ORT0, 0x400118b0\r
-.set CYREG_B1_P4_U1_PLD_ORT1, 0x400118b2\r
-.set CYREG_B1_P4_U1_PLD_ORT2, 0x400118b4\r
-.set CYREG_B1_P4_U1_PLD_ORT3, 0x400118b6\r
-.set CYREG_B1_P4_U1_MC_CFG_CEN_CONST, 0x400118b8\r
-.set CYREG_B1_P4_U1_MC_CFG_XORFB, 0x400118ba\r
-.set CYREG_B1_P4_U1_MC_CFG_SET_RESET, 0x400118bc\r
-.set CYREG_B1_P4_U1_MC_CFG_BYPASS, 0x400118be\r
-.set CYREG_B1_P4_U1_CFG0, 0x400118c0\r
-.set CYREG_B1_P4_U1_CFG1, 0x400118c1\r
-.set CYREG_B1_P4_U1_CFG2, 0x400118c2\r
-.set CYREG_B1_P4_U1_CFG3, 0x400118c3\r
-.set CYREG_B1_P4_U1_CFG4, 0x400118c4\r
-.set CYREG_B1_P4_U1_CFG5, 0x400118c5\r
-.set CYREG_B1_P4_U1_CFG6, 0x400118c6\r
-.set CYREG_B1_P4_U1_CFG7, 0x400118c7\r
-.set CYREG_B1_P4_U1_CFG8, 0x400118c8\r
-.set CYREG_B1_P4_U1_CFG9, 0x400118c9\r
-.set CYREG_B1_P4_U1_CFG10, 0x400118ca\r
-.set CYREG_B1_P4_U1_CFG11, 0x400118cb\r
-.set CYREG_B1_P4_U1_CFG12, 0x400118cc\r
-.set CYREG_B1_P4_U1_CFG13, 0x400118cd\r
-.set CYREG_B1_P4_U1_CFG14, 0x400118ce\r
-.set CYREG_B1_P4_U1_CFG15, 0x400118cf\r
-.set CYREG_B1_P4_U1_CFG16, 0x400118d0\r
-.set CYREG_B1_P4_U1_CFG17, 0x400118d1\r
-.set CYREG_B1_P4_U1_CFG18, 0x400118d2\r
-.set CYREG_B1_P4_U1_CFG19, 0x400118d3\r
-.set CYREG_B1_P4_U1_CFG20, 0x400118d4\r
-.set CYREG_B1_P4_U1_CFG21, 0x400118d5\r
-.set CYREG_B1_P4_U1_CFG22, 0x400118d6\r
-.set CYREG_B1_P4_U1_CFG23, 0x400118d7\r
-.set CYREG_B1_P4_U1_CFG24, 0x400118d8\r
-.set CYREG_B1_P4_U1_CFG25, 0x400118d9\r
-.set CYREG_B1_P4_U1_CFG26, 0x400118da\r
-.set CYREG_B1_P4_U1_CFG27, 0x400118db\r
-.set CYREG_B1_P4_U1_CFG28, 0x400118dc\r
-.set CYREG_B1_P4_U1_CFG29, 0x400118dd\r
-.set CYREG_B1_P4_U1_CFG30, 0x400118de\r
-.set CYREG_B1_P4_U1_CFG31, 0x400118df\r
-.set CYREG_B1_P4_U1_DCFG0, 0x400118e0\r
-.set CYREG_B1_P4_U1_DCFG1, 0x400118e2\r
-.set CYREG_B1_P4_U1_DCFG2, 0x400118e4\r
-.set CYREG_B1_P4_U1_DCFG3, 0x400118e6\r
-.set CYREG_B1_P4_U1_DCFG4, 0x400118e8\r
-.set CYREG_B1_P4_U1_DCFG5, 0x400118ea\r
-.set CYREG_B1_P4_U1_DCFG6, 0x400118ec\r
-.set CYREG_B1_P4_U1_DCFG7, 0x400118ee\r
-.set CYDEV_UCFG_B1_P4_ROUTE_BASE, 0x40011900\r
-.set CYDEV_UCFG_B1_P4_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_B1_P5_BASE, 0x40011a00\r
-.set CYDEV_UCFG_B1_P5_SIZE, 0x000001ef\r
-.set CYDEV_UCFG_B1_P5_U0_BASE, 0x40011a00\r
-.set CYDEV_UCFG_B1_P5_U0_SIZE, 0x00000070\r
-.set CYREG_B1_P5_U0_PLD_IT0, 0x40011a00\r
-.set CYREG_B1_P5_U0_PLD_IT1, 0x40011a04\r
-.set CYREG_B1_P5_U0_PLD_IT2, 0x40011a08\r
-.set CYREG_B1_P5_U0_PLD_IT3, 0x40011a0c\r
-.set CYREG_B1_P5_U0_PLD_IT4, 0x40011a10\r
-.set CYREG_B1_P5_U0_PLD_IT5, 0x40011a14\r
-.set CYREG_B1_P5_U0_PLD_IT6, 0x40011a18\r
-.set CYREG_B1_P5_U0_PLD_IT7, 0x40011a1c\r
-.set CYREG_B1_P5_U0_PLD_IT8, 0x40011a20\r
-.set CYREG_B1_P5_U0_PLD_IT9, 0x40011a24\r
-.set CYREG_B1_P5_U0_PLD_IT10, 0x40011a28\r
-.set CYREG_B1_P5_U0_PLD_IT11, 0x40011a2c\r
-.set CYREG_B1_P5_U0_PLD_ORT0, 0x40011a30\r
-.set CYREG_B1_P5_U0_PLD_ORT1, 0x40011a32\r
-.set CYREG_B1_P5_U0_PLD_ORT2, 0x40011a34\r
-.set CYREG_B1_P5_U0_PLD_ORT3, 0x40011a36\r
-.set CYREG_B1_P5_U0_MC_CFG_CEN_CONST, 0x40011a38\r
-.set CYREG_B1_P5_U0_MC_CFG_XORFB, 0x40011a3a\r
-.set CYREG_B1_P5_U0_MC_CFG_SET_RESET, 0x40011a3c\r
-.set CYREG_B1_P5_U0_MC_CFG_BYPASS, 0x40011a3e\r
-.set CYREG_B1_P5_U0_CFG0, 0x40011a40\r
-.set CYREG_B1_P5_U0_CFG1, 0x40011a41\r
-.set CYREG_B1_P5_U0_CFG2, 0x40011a42\r
-.set CYREG_B1_P5_U0_CFG3, 0x40011a43\r
-.set CYREG_B1_P5_U0_CFG4, 0x40011a44\r
-.set CYREG_B1_P5_U0_CFG5, 0x40011a45\r
-.set CYREG_B1_P5_U0_CFG6, 0x40011a46\r
-.set CYREG_B1_P5_U0_CFG7, 0x40011a47\r
-.set CYREG_B1_P5_U0_CFG8, 0x40011a48\r
-.set CYREG_B1_P5_U0_CFG9, 0x40011a49\r
-.set CYREG_B1_P5_U0_CFG10, 0x40011a4a\r
-.set CYREG_B1_P5_U0_CFG11, 0x40011a4b\r
-.set CYREG_B1_P5_U0_CFG12, 0x40011a4c\r
-.set CYREG_B1_P5_U0_CFG13, 0x40011a4d\r
-.set CYREG_B1_P5_U0_CFG14, 0x40011a4e\r
-.set CYREG_B1_P5_U0_CFG15, 0x40011a4f\r
-.set CYREG_B1_P5_U0_CFG16, 0x40011a50\r
-.set CYREG_B1_P5_U0_CFG17, 0x40011a51\r
-.set CYREG_B1_P5_U0_CFG18, 0x40011a52\r
-.set CYREG_B1_P5_U0_CFG19, 0x40011a53\r
-.set CYREG_B1_P5_U0_CFG20, 0x40011a54\r
-.set CYREG_B1_P5_U0_CFG21, 0x40011a55\r
-.set CYREG_B1_P5_U0_CFG22, 0x40011a56\r
-.set CYREG_B1_P5_U0_CFG23, 0x40011a57\r
-.set CYREG_B1_P5_U0_CFG24, 0x40011a58\r
-.set CYREG_B1_P5_U0_CFG25, 0x40011a59\r
-.set CYREG_B1_P5_U0_CFG26, 0x40011a5a\r
-.set CYREG_B1_P5_U0_CFG27, 0x40011a5b\r
-.set CYREG_B1_P5_U0_CFG28, 0x40011a5c\r
-.set CYREG_B1_P5_U0_CFG29, 0x40011a5d\r
-.set CYREG_B1_P5_U0_CFG30, 0x40011a5e\r
-.set CYREG_B1_P5_U0_CFG31, 0x40011a5f\r
-.set CYREG_B1_P5_U0_DCFG0, 0x40011a60\r
-.set CYREG_B1_P5_U0_DCFG1, 0x40011a62\r
-.set CYREG_B1_P5_U0_DCFG2, 0x40011a64\r
-.set CYREG_B1_P5_U0_DCFG3, 0x40011a66\r
-.set CYREG_B1_P5_U0_DCFG4, 0x40011a68\r
-.set CYREG_B1_P5_U0_DCFG5, 0x40011a6a\r
-.set CYREG_B1_P5_U0_DCFG6, 0x40011a6c\r
-.set CYREG_B1_P5_U0_DCFG7, 0x40011a6e\r
-.set CYDEV_UCFG_B1_P5_U1_BASE, 0x40011a80\r
-.set CYDEV_UCFG_B1_P5_U1_SIZE, 0x00000070\r
-.set CYREG_B1_P5_U1_PLD_IT0, 0x40011a80\r
-.set CYREG_B1_P5_U1_PLD_IT1, 0x40011a84\r
-.set CYREG_B1_P5_U1_PLD_IT2, 0x40011a88\r
-.set CYREG_B1_P5_U1_PLD_IT3, 0x40011a8c\r
-.set CYREG_B1_P5_U1_PLD_IT4, 0x40011a90\r
-.set CYREG_B1_P5_U1_PLD_IT5, 0x40011a94\r
-.set CYREG_B1_P5_U1_PLD_IT6, 0x40011a98\r
-.set CYREG_B1_P5_U1_PLD_IT7, 0x40011a9c\r
-.set CYREG_B1_P5_U1_PLD_IT8, 0x40011aa0\r
-.set CYREG_B1_P5_U1_PLD_IT9, 0x40011aa4\r
-.set CYREG_B1_P5_U1_PLD_IT10, 0x40011aa8\r
-.set CYREG_B1_P5_U1_PLD_IT11, 0x40011aac\r
-.set CYREG_B1_P5_U1_PLD_ORT0, 0x40011ab0\r
-.set CYREG_B1_P5_U1_PLD_ORT1, 0x40011ab2\r
-.set CYREG_B1_P5_U1_PLD_ORT2, 0x40011ab4\r
-.set CYREG_B1_P5_U1_PLD_ORT3, 0x40011ab6\r
-.set CYREG_B1_P5_U1_MC_CFG_CEN_CONST, 0x40011ab8\r
-.set CYREG_B1_P5_U1_MC_CFG_XORFB, 0x40011aba\r
-.set CYREG_B1_P5_U1_MC_CFG_SET_RESET, 0x40011abc\r
-.set CYREG_B1_P5_U1_MC_CFG_BYPASS, 0x40011abe\r
-.set CYREG_B1_P5_U1_CFG0, 0x40011ac0\r
-.set CYREG_B1_P5_U1_CFG1, 0x40011ac1\r
-.set CYREG_B1_P5_U1_CFG2, 0x40011ac2\r
-.set CYREG_B1_P5_U1_CFG3, 0x40011ac3\r
-.set CYREG_B1_P5_U1_CFG4, 0x40011ac4\r
-.set CYREG_B1_P5_U1_CFG5, 0x40011ac5\r
-.set CYREG_B1_P5_U1_CFG6, 0x40011ac6\r
-.set CYREG_B1_P5_U1_CFG7, 0x40011ac7\r
-.set CYREG_B1_P5_U1_CFG8, 0x40011ac8\r
-.set CYREG_B1_P5_U1_CFG9, 0x40011ac9\r
-.set CYREG_B1_P5_U1_CFG10, 0x40011aca\r
-.set CYREG_B1_P5_U1_CFG11, 0x40011acb\r
-.set CYREG_B1_P5_U1_CFG12, 0x40011acc\r
-.set CYREG_B1_P5_U1_CFG13, 0x40011acd\r
-.set CYREG_B1_P5_U1_CFG14, 0x40011ace\r
-.set CYREG_B1_P5_U1_CFG15, 0x40011acf\r
-.set CYREG_B1_P5_U1_CFG16, 0x40011ad0\r
-.set CYREG_B1_P5_U1_CFG17, 0x40011ad1\r
-.set CYREG_B1_P5_U1_CFG18, 0x40011ad2\r
-.set CYREG_B1_P5_U1_CFG19, 0x40011ad3\r
-.set CYREG_B1_P5_U1_CFG20, 0x40011ad4\r
-.set CYREG_B1_P5_U1_CFG21, 0x40011ad5\r
-.set CYREG_B1_P5_U1_CFG22, 0x40011ad6\r
-.set CYREG_B1_P5_U1_CFG23, 0x40011ad7\r
-.set CYREG_B1_P5_U1_CFG24, 0x40011ad8\r
-.set CYREG_B1_P5_U1_CFG25, 0x40011ad9\r
-.set CYREG_B1_P5_U1_CFG26, 0x40011ada\r
-.set CYREG_B1_P5_U1_CFG27, 0x40011adb\r
-.set CYREG_B1_P5_U1_CFG28, 0x40011adc\r
-.set CYREG_B1_P5_U1_CFG29, 0x40011add\r
-.set CYREG_B1_P5_U1_CFG30, 0x40011ade\r
-.set CYREG_B1_P5_U1_CFG31, 0x40011adf\r
-.set CYREG_B1_P5_U1_DCFG0, 0x40011ae0\r
-.set CYREG_B1_P5_U1_DCFG1, 0x40011ae2\r
-.set CYREG_B1_P5_U1_DCFG2, 0x40011ae4\r
-.set CYREG_B1_P5_U1_DCFG3, 0x40011ae6\r
-.set CYREG_B1_P5_U1_DCFG4, 0x40011ae8\r
-.set CYREG_B1_P5_U1_DCFG5, 0x40011aea\r
-.set CYREG_B1_P5_U1_DCFG6, 0x40011aec\r
-.set CYREG_B1_P5_U1_DCFG7, 0x40011aee\r
-.set CYDEV_UCFG_B1_P5_ROUTE_BASE, 0x40011b00\r
-.set CYDEV_UCFG_B1_P5_ROUTE_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI0_BASE, 0x40014000\r
-.set CYDEV_UCFG_DSI0_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI1_BASE, 0x40014100\r
-.set CYDEV_UCFG_DSI1_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI2_BASE, 0x40014200\r
-.set CYDEV_UCFG_DSI2_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI3_BASE, 0x40014300\r
-.set CYDEV_UCFG_DSI3_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI4_BASE, 0x40014400\r
-.set CYDEV_UCFG_DSI4_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI5_BASE, 0x40014500\r
-.set CYDEV_UCFG_DSI5_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI6_BASE, 0x40014600\r
-.set CYDEV_UCFG_DSI6_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI7_BASE, 0x40014700\r
-.set CYDEV_UCFG_DSI7_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI8_BASE, 0x40014800\r
-.set CYDEV_UCFG_DSI8_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI9_BASE, 0x40014900\r
-.set CYDEV_UCFG_DSI9_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI12_BASE, 0x40014c00\r
-.set CYDEV_UCFG_DSI12_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_DSI13_BASE, 0x40014d00\r
-.set CYDEV_UCFG_DSI13_SIZE, 0x000000ef\r
-.set CYDEV_UCFG_BCTL0_BASE, 0x40015000\r
-.set CYDEV_UCFG_BCTL0_SIZE, 0x00000010\r
-.set CYREG_BCTL0_MDCLK_EN, 0x40015000\r
-.set CYREG_BCTL0_MBCLK_EN, 0x40015001\r
-.set CYREG_BCTL0_WAIT_CFG, 0x40015002\r
-.set CYREG_BCTL0_BANK_CTL, 0x40015003\r
-.set CYREG_BCTL0_UDB_TEST_3, 0x40015007\r
-.set CYREG_BCTL0_DCLK_EN0, 0x40015008\r
-.set CYREG_BCTL0_BCLK_EN0, 0x40015009\r
-.set CYREG_BCTL0_DCLK_EN1, 0x4001500a\r
-.set CYREG_BCTL0_BCLK_EN1, 0x4001500b\r
-.set CYREG_BCTL0_DCLK_EN2, 0x4001500c\r
-.set CYREG_BCTL0_BCLK_EN2, 0x4001500d\r
-.set CYREG_BCTL0_DCLK_EN3, 0x4001500e\r
-.set CYREG_BCTL0_BCLK_EN3, 0x4001500f\r
-.set CYDEV_UCFG_BCTL1_BASE, 0x40015010\r
-.set CYDEV_UCFG_BCTL1_SIZE, 0x00000010\r
-.set CYREG_BCTL1_MDCLK_EN, 0x40015010\r
-.set CYREG_BCTL1_MBCLK_EN, 0x40015011\r
-.set CYREG_BCTL1_WAIT_CFG, 0x40015012\r
-.set CYREG_BCTL1_BANK_CTL, 0x40015013\r
-.set CYREG_BCTL1_UDB_TEST_3, 0x40015017\r
-.set CYREG_BCTL1_DCLK_EN0, 0x40015018\r
-.set CYREG_BCTL1_BCLK_EN0, 0x40015019\r
-.set CYREG_BCTL1_DCLK_EN1, 0x4001501a\r
-.set CYREG_BCTL1_BCLK_EN1, 0x4001501b\r
-.set CYREG_BCTL1_DCLK_EN2, 0x4001501c\r
-.set CYREG_BCTL1_BCLK_EN2, 0x4001501d\r
-.set CYREG_BCTL1_DCLK_EN3, 0x4001501e\r
-.set CYREG_BCTL1_BCLK_EN3, 0x4001501f\r
-.set CYDEV_IDMUX_BASE, 0x40015100\r
-.set CYDEV_IDMUX_SIZE, 0x00000016\r
-.set CYREG_IDMUX_IRQ_CTL0, 0x40015100\r
-.set CYREG_IDMUX_IRQ_CTL1, 0x40015101\r
-.set CYREG_IDMUX_IRQ_CTL2, 0x40015102\r
-.set CYREG_IDMUX_IRQ_CTL3, 0x40015103\r
-.set CYREG_IDMUX_IRQ_CTL4, 0x40015104\r
-.set CYREG_IDMUX_IRQ_CTL5, 0x40015105\r
-.set CYREG_IDMUX_IRQ_CTL6, 0x40015106\r
-.set CYREG_IDMUX_IRQ_CTL7, 0x40015107\r
-.set CYREG_IDMUX_DRQ_CTL0, 0x40015110\r
-.set CYREG_IDMUX_DRQ_CTL1, 0x40015111\r
-.set CYREG_IDMUX_DRQ_CTL2, 0x40015112\r
-.set CYREG_IDMUX_DRQ_CTL3, 0x40015113\r
-.set CYREG_IDMUX_DRQ_CTL4, 0x40015114\r
-.set CYREG_IDMUX_DRQ_CTL5, 0x40015115\r
-.set CYDEV_CACHERAM_BASE, 0x40030000\r
-.set CYDEV_CACHERAM_SIZE, 0x00000400\r
-.set CYREG_CACHERAM_DATA_MBASE, 0x40030000\r
-.set CYREG_CACHERAM_DATA_MSIZE, 0x00000400\r
-.set CYDEV_SFR_BASE, 0x40050100\r
-.set CYDEV_SFR_SIZE, 0x000000fb\r
-.set CYREG_SFR_GPIO0, 0x40050180\r
-.set CYREG_SFR_GPIRD0, 0x40050189\r
-.set CYREG_SFR_GPIO0_SEL, 0x4005018a\r
-.set CYREG_SFR_GPIO1, 0x40050190\r
-.set CYREG_SFR_GPIRD1, 0x40050191\r
-.set CYREG_SFR_GPIO2, 0x40050198\r
-.set CYREG_SFR_GPIRD2, 0x40050199\r
-.set CYREG_SFR_GPIO2_SEL, 0x4005019a\r
-.set CYREG_SFR_GPIO1_SEL, 0x400501a2\r
-.set CYREG_SFR_GPIO3, 0x400501b0\r
-.set CYREG_SFR_GPIRD3, 0x400501b1\r
-.set CYREG_SFR_GPIO3_SEL, 0x400501b2\r
-.set CYREG_SFR_GPIO4, 0x400501c0\r
-.set CYREG_SFR_GPIRD4, 0x400501c1\r
-.set CYREG_SFR_GPIO4_SEL, 0x400501c2\r
-.set CYREG_SFR_GPIO5, 0x400501c8\r
-.set CYREG_SFR_GPIRD5, 0x400501c9\r
-.set CYREG_SFR_GPIO5_SEL, 0x400501ca\r
-.set CYREG_SFR_GPIO6, 0x400501d8\r
-.set CYREG_SFR_GPIRD6, 0x400501d9\r
-.set CYREG_SFR_GPIO6_SEL, 0x400501da\r
-.set CYREG_SFR_GPIO12, 0x400501e8\r
-.set CYREG_SFR_GPIRD12, 0x400501e9\r
-.set CYREG_SFR_GPIO12_SEL, 0x400501f2\r
-.set CYREG_SFR_GPIO15, 0x400501f8\r
-.set CYREG_SFR_GPIRD15, 0x400501f9\r
-.set CYREG_SFR_GPIO15_SEL, 0x400501fa\r
-.set CYDEV_P3BA_BASE, 0x40050300\r
-.set CYDEV_P3BA_SIZE, 0x0000002b\r
-.set CYREG_P3BA_Y_START, 0x40050300\r
-.set CYREG_P3BA_YROLL, 0x40050301\r
-.set CYREG_P3BA_YCFG, 0x40050302\r
-.set CYREG_P3BA_X_START1, 0x40050303\r
-.set CYREG_P3BA_X_START2, 0x40050304\r
-.set CYREG_P3BA_XROLL1, 0x40050305\r
-.set CYREG_P3BA_XROLL2, 0x40050306\r
-.set CYREG_P3BA_XINC, 0x40050307\r
-.set CYREG_P3BA_XCFG, 0x40050308\r
-.set CYREG_P3BA_OFFSETADDR1, 0x40050309\r
-.set CYREG_P3BA_OFFSETADDR2, 0x4005030a\r
-.set CYREG_P3BA_OFFSETADDR3, 0x4005030b\r
-.set CYREG_P3BA_ABSADDR1, 0x4005030c\r
-.set CYREG_P3BA_ABSADDR2, 0x4005030d\r
-.set CYREG_P3BA_ABSADDR3, 0x4005030e\r
-.set CYREG_P3BA_ABSADDR4, 0x4005030f\r
-.set CYREG_P3BA_DATCFG1, 0x40050310\r
-.set CYREG_P3BA_DATCFG2, 0x40050311\r
-.set CYREG_P3BA_CMP_RSLT1, 0x40050314\r
-.set CYREG_P3BA_CMP_RSLT2, 0x40050315\r
-.set CYREG_P3BA_CMP_RSLT3, 0x40050316\r
-.set CYREG_P3BA_CMP_RSLT4, 0x40050317\r
-.set CYREG_P3BA_DATA_REG1, 0x40050318\r
-.set CYREG_P3BA_DATA_REG2, 0x40050319\r
-.set CYREG_P3BA_DATA_REG3, 0x4005031a\r
-.set CYREG_P3BA_DATA_REG4, 0x4005031b\r
-.set CYREG_P3BA_EXP_DATA1, 0x4005031c\r
-.set CYREG_P3BA_EXP_DATA2, 0x4005031d\r
-.set CYREG_P3BA_EXP_DATA3, 0x4005031e\r
-.set CYREG_P3BA_EXP_DATA4, 0x4005031f\r
-.set CYREG_P3BA_MSTR_HRDATA1, 0x40050320\r
-.set CYREG_P3BA_MSTR_HRDATA2, 0x40050321\r
-.set CYREG_P3BA_MSTR_HRDATA3, 0x40050322\r
-.set CYREG_P3BA_MSTR_HRDATA4, 0x40050323\r
-.set CYREG_P3BA_BIST_EN, 0x40050324\r
-.set CYREG_P3BA_PHUB_MASTER_SSR, 0x40050325\r
-.set CYREG_P3BA_SEQCFG1, 0x40050326\r
-.set CYREG_P3BA_SEQCFG2, 0x40050327\r
-.set CYREG_P3BA_Y_CURR, 0x40050328\r
-.set CYREG_P3BA_X_CURR1, 0x40050329\r
-.set CYREG_P3BA_X_CURR2, 0x4005032a\r
-.set CYDEV_PANTHER_BASE, 0x40080000\r
-.set CYDEV_PANTHER_SIZE, 0x00000020\r
-.set CYREG_PANTHER_STCALIB_CFG, 0x40080000\r
-.set CYREG_PANTHER_WAITPIPE, 0x40080004\r
-.set CYREG_PANTHER_TRACE_CFG, 0x40080008\r
-.set CYREG_PANTHER_DBG_CFG, 0x4008000c\r
-.set CYREG_PANTHER_CM3_LCKRST_STAT, 0x40080018\r
-.set CYREG_PANTHER_DEVICE_ID, 0x4008001c\r
-.set CYDEV_FLSECC_BASE, 0x48000000\r
-.set CYDEV_FLSECC_SIZE, 0x00008000\r
-.set CYREG_FLSECC_DATA_MBASE, 0x48000000\r
-.set CYREG_FLSECC_DATA_MSIZE, 0x00008000\r
-.set CYDEV_FLSHID_BASE, 0x49000000\r
-.set CYDEV_FLSHID_SIZE, 0x00000200\r
-.set CYREG_FLSHID_RSVD_MBASE, 0x49000000\r
-.set CYREG_FLSHID_RSVD_MSIZE, 0x00000080\r
-.set CYREG_FLSHID_CUST_MDATA_MBASE, 0x49000080\r
-.set CYREG_FLSHID_CUST_MDATA_MSIZE, 0x00000080\r
-.set CYDEV_FLSHID_CUST_TABLES_BASE, 0x49000100\r
-.set CYDEV_FLSHID_CUST_TABLES_SIZE, 0x00000040\r
-.set CYREG_FLSHID_CUST_TABLES_Y_LOC, 0x49000100\r
-.set CYREG_FLSHID_CUST_TABLES_X_LOC, 0x49000101\r
-.set CYREG_FLSHID_CUST_TABLES_WAFER_NUM, 0x49000102\r
-.set CYREG_FLSHID_CUST_TABLES_LOT_LSB, 0x49000103\r
-.set CYREG_FLSHID_CUST_TABLES_LOT_MSB, 0x49000104\r
-.set CYREG_FLSHID_CUST_TABLES_WRK_WK, 0x49000105\r
-.set CYREG_FLSHID_CUST_TABLES_FAB_YR, 0x49000106\r
-.set CYREG_FLSHID_CUST_TABLES_MINOR, 0x49000107\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_3MHZ, 0x49000108\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_6MHZ, 0x49000109\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_12MHZ, 0x4900010a\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_24MHZ, 0x4900010b\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_67MHZ, 0x4900010c\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_80MHZ, 0x4900010d\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_92MHZ, 0x4900010e\r
-.set CYREG_FLSHID_CUST_TABLES_IMO_USB, 0x4900010f\r
-.set CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS, 0x49000110\r
-.set CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS, 0x49000111\r
-.set CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS, 0x49000112\r
-.set CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS, 0x49000113\r
-.set CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS, 0x49000114\r
-.set CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS, 0x49000115\r
-.set CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS, 0x49000116\r
-.set CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS, 0x49000117\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M1, 0x49000118\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M2, 0x49000119\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M3, 0x4900011a\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M4, 0x4900011b\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M5, 0x4900011c\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M6, 0x4900011d\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M7, 0x4900011e\r
-.set CYREG_FLSHID_CUST_TABLES_DEC_M8, 0x4900011f\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M1, 0x49000120\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M2, 0x49000121\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M3, 0x49000122\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M4, 0x49000123\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M5, 0x49000124\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M6, 0x49000125\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M7, 0x49000126\r
-.set CYREG_FLSHID_CUST_TABLES_DAC0_M8, 0x49000127\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M1, 0x49000128\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M2, 0x49000129\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M3, 0x4900012a\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M4, 0x4900012b\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M5, 0x4900012c\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M6, 0x4900012d\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M7, 0x4900012e\r
-.set CYREG_FLSHID_CUST_TABLES_DAC2_M8, 0x4900012f\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M1, 0x49000130\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M2, 0x49000131\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M3, 0x49000132\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M4, 0x49000133\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M5, 0x49000134\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M6, 0x49000135\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M7, 0x49000136\r
-.set CYREG_FLSHID_CUST_TABLES_DAC1_M8, 0x49000137\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M1, 0x49000138\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M2, 0x49000139\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M3, 0x4900013a\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M4, 0x4900013b\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M5, 0x4900013c\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M6, 0x4900013d\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M7, 0x4900013e\r
-.set CYREG_FLSHID_CUST_TABLES_DAC3_M8, 0x4900013f\r
-.set CYDEV_FLSHID_MFG_CFG_BASE, 0x49000180\r
-.set CYDEV_FLSHID_MFG_CFG_SIZE, 0x00000080\r
-.set CYREG_FLSHID_MFG_CFG_IMO_TR1, 0x49000188\r
-.set CYREG_FLSHID_MFG_CFG_CMP0_TR0, 0x490001ac\r
-.set CYREG_FLSHID_MFG_CFG_CMP1_TR0, 0x490001ae\r
-.set CYREG_FLSHID_MFG_CFG_CMP2_TR0, 0x490001b0\r
-.set CYREG_FLSHID_MFG_CFG_CMP3_TR0, 0x490001b2\r
-.set CYREG_FLSHID_MFG_CFG_CMP0_TR1, 0x490001b4\r
-.set CYREG_FLSHID_MFG_CFG_CMP1_TR1, 0x490001b6\r
-.set CYREG_FLSHID_MFG_CFG_CMP2_TR1, 0x490001b8\r
-.set CYREG_FLSHID_MFG_CFG_CMP3_TR1, 0x490001ba\r
-.set CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM, 0x490001ce\r
-.set CYDEV_EXTMEM_BASE, 0x60000000\r
-.set CYDEV_EXTMEM_SIZE, 0x00800000\r
-.set CYREG_EXTMEM_DATA_MBASE, 0x60000000\r
-.set CYREG_EXTMEM_DATA_MSIZE, 0x00800000\r
-.set CYDEV_ITM_BASE, 0xe0000000\r
-.set CYDEV_ITM_SIZE, 0x00001000\r
-.set CYREG_ITM_TRACE_EN, 0xe0000e00\r
-.set CYREG_ITM_TRACE_PRIVILEGE, 0xe0000e40\r
-.set CYREG_ITM_TRACE_CTRL, 0xe0000e80\r
-.set CYREG_ITM_LOCK_ACCESS, 0xe0000fb0\r
-.set CYREG_ITM_LOCK_STATUS, 0xe0000fb4\r
-.set CYREG_ITM_PID4, 0xe0000fd0\r
-.set CYREG_ITM_PID5, 0xe0000fd4\r
-.set CYREG_ITM_PID6, 0xe0000fd8\r
-.set CYREG_ITM_PID7, 0xe0000fdc\r
-.set CYREG_ITM_PID0, 0xe0000fe0\r
-.set CYREG_ITM_PID1, 0xe0000fe4\r
-.set CYREG_ITM_PID2, 0xe0000fe8\r
-.set CYREG_ITM_PID3, 0xe0000fec\r
-.set CYREG_ITM_CID0, 0xe0000ff0\r
-.set CYREG_ITM_CID1, 0xe0000ff4\r
-.set CYREG_ITM_CID2, 0xe0000ff8\r
-.set CYREG_ITM_CID3, 0xe0000ffc\r
-.set CYDEV_DWT_BASE, 0xe0001000\r
-.set CYDEV_DWT_SIZE, 0x0000005c\r
-.set CYREG_DWT_CTRL, 0xe0001000\r
-.set CYREG_DWT_CYCLE_COUNT, 0xe0001004\r
-.set CYREG_DWT_CPI_COUNT, 0xe0001008\r
-.set CYREG_DWT_EXC_OVHD_COUNT, 0xe000100c\r
-.set CYREG_DWT_SLEEP_COUNT, 0xe0001010\r
-.set CYREG_DWT_LSU_COUNT, 0xe0001014\r
-.set CYREG_DWT_FOLD_COUNT, 0xe0001018\r
-.set CYREG_DWT_PC_SAMPLE, 0xe000101c\r
-.set CYREG_DWT_COMP_0, 0xe0001020\r
-.set CYREG_DWT_MASK_0, 0xe0001024\r
-.set CYREG_DWT_FUNCTION_0, 0xe0001028\r
-.set CYREG_DWT_COMP_1, 0xe0001030\r
-.set CYREG_DWT_MASK_1, 0xe0001034\r
-.set CYREG_DWT_FUNCTION_1, 0xe0001038\r
-.set CYREG_DWT_COMP_2, 0xe0001040\r
-.set CYREG_DWT_MASK_2, 0xe0001044\r
-.set CYREG_DWT_FUNCTION_2, 0xe0001048\r
-.set CYREG_DWT_COMP_3, 0xe0001050\r
-.set CYREG_DWT_MASK_3, 0xe0001054\r
-.set CYREG_DWT_FUNCTION_3, 0xe0001058\r
-.set CYDEV_FPB_BASE, 0xe0002000\r
-.set CYDEV_FPB_SIZE, 0x00001000\r
-.set CYREG_FPB_CTRL, 0xe0002000\r
-.set CYREG_FPB_REMAP, 0xe0002004\r
-.set CYREG_FPB_FP_COMP_0, 0xe0002008\r
-.set CYREG_FPB_FP_COMP_1, 0xe000200c\r
-.set CYREG_FPB_FP_COMP_2, 0xe0002010\r
-.set CYREG_FPB_FP_COMP_3, 0xe0002014\r
-.set CYREG_FPB_FP_COMP_4, 0xe0002018\r
-.set CYREG_FPB_FP_COMP_5, 0xe000201c\r
-.set CYREG_FPB_FP_COMP_6, 0xe0002020\r
-.set CYREG_FPB_FP_COMP_7, 0xe0002024\r
-.set CYREG_FPB_PID4, 0xe0002fd0\r
-.set CYREG_FPB_PID5, 0xe0002fd4\r
-.set CYREG_FPB_PID6, 0xe0002fd8\r
-.set CYREG_FPB_PID7, 0xe0002fdc\r
-.set CYREG_FPB_PID0, 0xe0002fe0\r
-.set CYREG_FPB_PID1, 0xe0002fe4\r
-.set CYREG_FPB_PID2, 0xe0002fe8\r
-.set CYREG_FPB_PID3, 0xe0002fec\r
-.set CYREG_FPB_CID0, 0xe0002ff0\r
-.set CYREG_FPB_CID1, 0xe0002ff4\r
-.set CYREG_FPB_CID2, 0xe0002ff8\r
-.set CYREG_FPB_CID3, 0xe0002ffc\r
-.set CYDEV_NVIC_BASE, 0xe000e000\r
-.set CYDEV_NVIC_SIZE, 0x00000d3c\r
-.set CYREG_NVIC_INT_CTL_TYPE, 0xe000e004\r
-.set CYREG_NVIC_SYSTICK_CTL, 0xe000e010\r
-.set CYREG_NVIC_SYSTICK_RELOAD, 0xe000e014\r
-.set CYREG_NVIC_SYSTICK_CURRENT, 0xe000e018\r
-.set CYREG_NVIC_SYSTICK_CAL, 0xe000e01c\r
-.set CYREG_NVIC_SETENA0, 0xe000e100\r
-.set CYREG_NVIC_CLRENA0, 0xe000e180\r
-.set CYREG_NVIC_SETPEND0, 0xe000e200\r
-.set CYREG_NVIC_CLRPEND0, 0xe000e280\r
-.set CYREG_NVIC_ACTIVE0, 0xe000e300\r
-.set CYREG_NVIC_PRI_0, 0xe000e400\r
-.set CYREG_NVIC_PRI_1, 0xe000e401\r
-.set CYREG_NVIC_PRI_2, 0xe000e402\r
-.set CYREG_NVIC_PRI_3, 0xe000e403\r
-.set CYREG_NVIC_PRI_4, 0xe000e404\r
-.set CYREG_NVIC_PRI_5, 0xe000e405\r
-.set CYREG_NVIC_PRI_6, 0xe000e406\r
-.set CYREG_NVIC_PRI_7, 0xe000e407\r
-.set CYREG_NVIC_PRI_8, 0xe000e408\r
-.set CYREG_NVIC_PRI_9, 0xe000e409\r
-.set CYREG_NVIC_PRI_10, 0xe000e40a\r
-.set CYREG_NVIC_PRI_11, 0xe000e40b\r
-.set CYREG_NVIC_PRI_12, 0xe000e40c\r
-.set CYREG_NVIC_PRI_13, 0xe000e40d\r
-.set CYREG_NVIC_PRI_14, 0xe000e40e\r
-.set CYREG_NVIC_PRI_15, 0xe000e40f\r
-.set CYREG_NVIC_PRI_16, 0xe000e410\r
-.set CYREG_NVIC_PRI_17, 0xe000e411\r
-.set CYREG_NVIC_PRI_18, 0xe000e412\r
-.set CYREG_NVIC_PRI_19, 0xe000e413\r
-.set CYREG_NVIC_PRI_20, 0xe000e414\r
-.set CYREG_NVIC_PRI_21, 0xe000e415\r
-.set CYREG_NVIC_PRI_22, 0xe000e416\r
-.set CYREG_NVIC_PRI_23, 0xe000e417\r
-.set CYREG_NVIC_PRI_24, 0xe000e418\r
-.set CYREG_NVIC_PRI_25, 0xe000e419\r
-.set CYREG_NVIC_PRI_26, 0xe000e41a\r
-.set CYREG_NVIC_PRI_27, 0xe000e41b\r
-.set CYREG_NVIC_PRI_28, 0xe000e41c\r
-.set CYREG_NVIC_PRI_29, 0xe000e41d\r
-.set CYREG_NVIC_PRI_30, 0xe000e41e\r
-.set CYREG_NVIC_PRI_31, 0xe000e41f\r
-.set CYREG_NVIC_CPUID_BASE, 0xe000ed00\r
-.set CYREG_NVIC_INTR_CTRL_STATE, 0xe000ed04\r
-.set CYREG_NVIC_VECT_OFFSET, 0xe000ed08\r
-.set CYREG_NVIC_APPLN_INTR, 0xe000ed0c\r
-.set CYREG_NVIC_SYSTEM_CONTROL, 0xe000ed10\r
-.set CYREG_NVIC_CFG_CONTROL, 0xe000ed14\r
-.set CYREG_NVIC_SYS_PRIO_HANDLER_4_7, 0xe000ed18\r
-.set CYREG_NVIC_SYS_PRIO_HANDLER_8_11, 0xe000ed1c\r
-.set CYREG_NVIC_SYS_PRIO_HANDLER_12_15, 0xe000ed20\r
-.set CYREG_NVIC_SYS_HANDLER_CSR, 0xe000ed24\r
-.set CYREG_NVIC_MEMMAN_FAULT_STATUS, 0xe000ed28\r
-.set CYREG_NVIC_BUS_FAULT_STATUS, 0xe000ed29\r
-.set CYREG_NVIC_USAGE_FAULT_STATUS, 0xe000ed2a\r
-.set CYREG_NVIC_HARD_FAULT_STATUS, 0xe000ed2c\r
-.set CYREG_NVIC_DEBUG_FAULT_STATUS, 0xe000ed30\r
-.set CYREG_NVIC_MEMMAN_FAULT_ADD, 0xe000ed34\r
-.set CYREG_NVIC_BUS_FAULT_ADD, 0xe000ed38\r
-.set CYDEV_CORE_DBG_BASE, 0xe000edf0\r
-.set CYDEV_CORE_DBG_SIZE, 0x00000010\r
-.set CYREG_CORE_DBG_DBG_HLT_CS, 0xe000edf0\r
-.set CYREG_CORE_DBG_DBG_REG_SEL, 0xe000edf4\r
-.set CYREG_CORE_DBG_DBG_REG_DATA, 0xe000edf8\r
-.set CYREG_CORE_DBG_EXC_MON_CTL, 0xe000edfc\r
-.set CYDEV_TPIU_BASE, 0xe0040000\r
-.set CYDEV_TPIU_SIZE, 0x00001000\r
-.set CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ, 0xe0040000\r
-.set CYREG_TPIU_CURRENT_SYNC_PRT_SZ, 0xe0040004\r
-.set CYREG_TPIU_ASYNC_CLK_PRESCALER, 0xe0040010\r
-.set CYREG_TPIU_PROTOCOL, 0xe00400f0\r
-.set CYREG_TPIU_FORM_FLUSH_STAT, 0xe0040300\r
-.set CYREG_TPIU_FORM_FLUSH_CTRL, 0xe0040304\r
-.set CYREG_TPIU_TRIGGER, 0xe0040ee8\r
-.set CYREG_TPIU_ITETMDATA, 0xe0040eec\r
-.set CYREG_TPIU_ITATBCTR2, 0xe0040ef0\r
-.set CYREG_TPIU_ITATBCTR0, 0xe0040ef8\r
-.set CYREG_TPIU_ITITMDATA, 0xe0040efc\r
-.set CYREG_TPIU_ITCTRL, 0xe0040f00\r
-.set CYREG_TPIU_DEVID, 0xe0040fc8\r
-.set CYREG_TPIU_DEVTYPE, 0xe0040fcc\r
-.set CYREG_TPIU_PID4, 0xe0040fd0\r
-.set CYREG_TPIU_PID5, 0xe0040fd4\r
-.set CYREG_TPIU_PID6, 0xe0040fd8\r
-.set CYREG_TPIU_PID7, 0xe0040fdc\r
-.set CYREG_TPIU_PID0, 0xe0040fe0\r
-.set CYREG_TPIU_PID1, 0xe0040fe4\r
-.set CYREG_TPIU_PID2, 0xe0040fe8\r
-.set CYREG_TPIU_PID3, 0xe0040fec\r
-.set CYREG_TPIU_CID0, 0xe0040ff0\r
-.set CYREG_TPIU_CID1, 0xe0040ff4\r
-.set CYREG_TPIU_CID2, 0xe0040ff8\r
-.set CYREG_TPIU_CID3, 0xe0040ffc\r
-.set CYDEV_ETM_BASE, 0xe0041000\r
-.set CYDEV_ETM_SIZE, 0x00001000\r
-.set CYREG_ETM_CTL, 0xe0041000\r
-.set CYREG_ETM_CFG_CODE, 0xe0041004\r
-.set CYREG_ETM_TRIG_EVENT, 0xe0041008\r
-.set CYREG_ETM_STATUS, 0xe0041010\r
-.set CYREG_ETM_SYS_CFG, 0xe0041014\r
-.set CYREG_ETM_TRACE_ENB_EVENT, 0xe0041020\r
-.set CYREG_ETM_TRACE_EN_CTRL1, 0xe0041024\r
-.set CYREG_ETM_FIFOFULL_LEVEL, 0xe004102c\r
-.set CYREG_ETM_SYNC_FREQ, 0xe00411e0\r
-.set CYREG_ETM_ETM_ID, 0xe00411e4\r
-.set CYREG_ETM_CFG_CODE_EXT, 0xe00411e8\r
-.set CYREG_ETM_TR_SS_EMBICE_CTRL, 0xe00411f0\r
-.set CYREG_ETM_CS_TRACE_ID, 0xe0041200\r
-.set CYREG_ETM_OS_LOCK_ACCESS, 0xe0041300\r
-.set CYREG_ETM_OS_LOCK_STATUS, 0xe0041304\r
-.set CYREG_ETM_PDSR, 0xe0041314\r
-.set CYREG_ETM_ITMISCIN, 0xe0041ee0\r
-.set CYREG_ETM_ITTRIGOUT, 0xe0041ee8\r
-.set CYREG_ETM_ITATBCTR2, 0xe0041ef0\r
-.set CYREG_ETM_ITATBCTR0, 0xe0041ef8\r
-.set CYREG_ETM_INT_MODE_CTRL, 0xe0041f00\r
-.set CYREG_ETM_CLM_TAG_SET, 0xe0041fa0\r
-.set CYREG_ETM_CLM_TAG_CLR, 0xe0041fa4\r
-.set CYREG_ETM_LOCK_ACCESS, 0xe0041fb0\r
-.set CYREG_ETM_LOCK_STATUS, 0xe0041fb4\r
-.set CYREG_ETM_AUTH_STATUS, 0xe0041fb8\r
-.set CYREG_ETM_DEV_TYPE, 0xe0041fcc\r
-.set CYREG_ETM_PID4, 0xe0041fd0\r
-.set CYREG_ETM_PID5, 0xe0041fd4\r
-.set CYREG_ETM_PID6, 0xe0041fd8\r
-.set CYREG_ETM_PID7, 0xe0041fdc\r
-.set CYREG_ETM_PID0, 0xe0041fe0\r
-.set CYREG_ETM_PID1, 0xe0041fe4\r
-.set CYREG_ETM_PID2, 0xe0041fe8\r
-.set CYREG_ETM_PID3, 0xe0041fec\r
-.set CYREG_ETM_CID0, 0xe0041ff0\r
-.set CYREG_ETM_CID1, 0xe0041ff4\r
-.set CYREG_ETM_CID2, 0xe0041ff8\r
-.set CYREG_ETM_CID3, 0xe0041ffc\r
-.set CYDEV_ROM_TABLE_BASE, 0xe00ff000\r
-.set CYDEV_ROM_TABLE_SIZE, 0x00001000\r
-.set CYREG_ROM_TABLE_NVIC, 0xe00ff000\r
-.set CYREG_ROM_TABLE_DWT, 0xe00ff004\r
-.set CYREG_ROM_TABLE_FPB, 0xe00ff008\r
-.set CYREG_ROM_TABLE_ITM, 0xe00ff00c\r
-.set CYREG_ROM_TABLE_TPIU, 0xe00ff010\r
-.set CYREG_ROM_TABLE_ETM, 0xe00ff014\r
-.set CYREG_ROM_TABLE_END, 0xe00ff018\r
-.set CYREG_ROM_TABLE_MEMTYPE, 0xe00fffcc\r
-.set CYREG_ROM_TABLE_PID4, 0xe00fffd0\r
-.set CYREG_ROM_TABLE_PID5, 0xe00fffd4\r
-.set CYREG_ROM_TABLE_PID6, 0xe00fffd8\r
-.set CYREG_ROM_TABLE_PID7, 0xe00fffdc\r
-.set CYREG_ROM_TABLE_PID0, 0xe00fffe0\r
-.set CYREG_ROM_TABLE_PID1, 0xe00fffe4\r
-.set CYREG_ROM_TABLE_PID2, 0xe00fffe8\r
-.set CYREG_ROM_TABLE_PID3, 0xe00fffec\r
-.set CYREG_ROM_TABLE_CID0, 0xe00ffff0\r
-.set CYREG_ROM_TABLE_CID1, 0xe00ffff4\r
-.set CYREG_ROM_TABLE_CID2, 0xe00ffff8\r
-.set CYREG_ROM_TABLE_CID3, 0xe00ffffc\r
-.set CYDEV_FLS_SIZE, CYDEV_FLASH_SIZE\r
-.set CYDEV_ECC_BASE, CYDEV_FLSECC_BASE\r
-.set CYDEV_FLS_SECTOR_SIZE, 0x00010000\r
-.set CYDEV_FLS_ROW_SIZE, 0x00000100\r
-.set CYDEV_ECC_SECTOR_SIZE, 0x00002000\r
-.set CYDEV_ECC_ROW_SIZE, 0x00000020\r
-.set CYDEV_EEPROM_SECTOR_SIZE, 0x00000400\r
-.set CYDEV_EEPROM_ROW_SIZE, 0x00000010\r
-.set CYDEV_PERIPH_BASE, CYDEV_CLKDIST_BASE\r
-.set CYCLK_LD_DISABLE, 0x00000004\r
-.set CYCLK_LD_SYNC_EN, 0x00000002\r
-.set CYCLK_LD_LOAD, 0x00000001\r
-.set CYCLK_PIPE, 0x00000080\r
-.set CYCLK_SSS, 0x00000040\r
-.set CYCLK_EARLY, 0x00000020\r
-.set CYCLK_DUTY, 0x00000010\r
-.set CYCLK_SYNC, 0x00000008\r
-.set CYCLK_SRC_SEL_CLK_SYNC_D, 0\r
-.set CYCLK_SRC_SEL_SYNC_DIG, 0\r
-.set CYCLK_SRC_SEL_IMO, 1\r
-.set CYCLK_SRC_SEL_XTAL_MHZ, 2\r
-.set CYCLK_SRC_SEL_XTALM, 2\r
-.set CYCLK_SRC_SEL_ILO, 3\r
-.set CYCLK_SRC_SEL_PLL, 4\r
-.set CYCLK_SRC_SEL_XTAL_KHZ, 5\r
-.set CYCLK_SRC_SEL_XTALK, 5\r
-.set CYCLK_SRC_SEL_DSI_G, 6\r
-.set CYCLK_SRC_SEL_DSI_D, 7\r
-.set CYCLK_SRC_SEL_CLK_SYNC_A, 0\r
-.set CYCLK_SRC_SEL_DSI_A, 7\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar.inc
deleted file mode 100755 (executable)
index e4f1a44..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar.inc
+++ /dev/null
@@ -1,5356 +0,0 @@
-;\r
-; FILENAME: cydeviceiar.inc\r
-; OBSOLETE: Do not use this file. Use the _trm version instead.\r
-; PSoC Creator 3.0 Component Pack 7\r
-;\r
-; DESCRIPTION:\r
-; This file provides all of the address values for the entire PSoC device.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions, \r
-; disclaimers, and limitations in the end user license agreement accompanying \r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-#define CYDEV_FLASH_BASE 0x00000000\r
-#define CYDEV_FLASH_SIZE 0x00020000\r
-#define CYDEV_FLASH_DATA_MBASE 0x00000000\r
-#define CYDEV_FLASH_DATA_MSIZE 0x00020000\r
-#define CYDEV_SRAM_BASE 0x1fffc000\r
-#define CYDEV_SRAM_SIZE 0x00008000\r
-#define CYDEV_SRAM_CODE64K_MBASE 0x1fff8000\r
-#define CYDEV_SRAM_CODE64K_MSIZE 0x00004000\r
-#define CYDEV_SRAM_CODE32K_MBASE 0x1fffc000\r
-#define CYDEV_SRAM_CODE32K_MSIZE 0x00002000\r
-#define CYDEV_SRAM_CODE16K_MBASE 0x1fffe000\r
-#define CYDEV_SRAM_CODE16K_MSIZE 0x00001000\r
-#define CYDEV_SRAM_CODE_MBASE 0x1fffc000\r
-#define CYDEV_SRAM_CODE_MSIZE 0x00004000\r
-#define CYDEV_SRAM_DATA_MBASE 0x20000000\r
-#define CYDEV_SRAM_DATA_MSIZE 0x00004000\r
-#define CYDEV_SRAM_DATA16K_MBASE 0x20001000\r
-#define CYDEV_SRAM_DATA16K_MSIZE 0x00001000\r
-#define CYDEV_SRAM_DATA32K_MBASE 0x20002000\r
-#define CYDEV_SRAM_DATA32K_MSIZE 0x00002000\r
-#define CYDEV_SRAM_DATA64K_MBASE 0x20004000\r
-#define CYDEV_SRAM_DATA64K_MSIZE 0x00004000\r
-#define CYDEV_DMA_BASE 0x20008000\r
-#define CYDEV_DMA_SIZE 0x00008000\r
-#define CYDEV_DMA_SRAM64K_MBASE 0x20008000\r
-#define CYDEV_DMA_SRAM64K_MSIZE 0x00004000\r
-#define CYDEV_DMA_SRAM32K_MBASE 0x2000c000\r
-#define CYDEV_DMA_SRAM32K_MSIZE 0x00002000\r
-#define CYDEV_DMA_SRAM16K_MBASE 0x2000e000\r
-#define CYDEV_DMA_SRAM16K_MSIZE 0x00001000\r
-#define CYDEV_DMA_SRAM_MBASE 0x2000f000\r
-#define CYDEV_DMA_SRAM_MSIZE 0x00001000\r
-#define CYDEV_CLKDIST_BASE 0x40004000\r
-#define CYDEV_CLKDIST_SIZE 0x00000110\r
-#define CYDEV_CLKDIST_CR 0x40004000\r
-#define CYDEV_CLKDIST_LD 0x40004001\r
-#define CYDEV_CLKDIST_WRK0 0x40004002\r
-#define CYDEV_CLKDIST_WRK1 0x40004003\r
-#define CYDEV_CLKDIST_MSTR0 0x40004004\r
-#define CYDEV_CLKDIST_MSTR1 0x40004005\r
-#define CYDEV_CLKDIST_BCFG0 0x40004006\r
-#define CYDEV_CLKDIST_BCFG1 0x40004007\r
-#define CYDEV_CLKDIST_BCFG2 0x40004008\r
-#define CYDEV_CLKDIST_UCFG 0x40004009\r
-#define CYDEV_CLKDIST_DLY0 0x4000400a\r
-#define CYDEV_CLKDIST_DLY1 0x4000400b\r
-#define CYDEV_CLKDIST_DMASK 0x40004010\r
-#define CYDEV_CLKDIST_AMASK 0x40004014\r
-#define CYDEV_CLKDIST_DCFG0_BASE 0x40004080\r
-#define CYDEV_CLKDIST_DCFG0_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG0_CFG0 0x40004080\r
-#define CYDEV_CLKDIST_DCFG0_CFG1 0x40004081\r
-#define CYDEV_CLKDIST_DCFG0_CFG2 0x40004082\r
-#define CYDEV_CLKDIST_DCFG1_BASE 0x40004084\r
-#define CYDEV_CLKDIST_DCFG1_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG1_CFG0 0x40004084\r
-#define CYDEV_CLKDIST_DCFG1_CFG1 0x40004085\r
-#define CYDEV_CLKDIST_DCFG1_CFG2 0x40004086\r
-#define CYDEV_CLKDIST_DCFG2_BASE 0x40004088\r
-#define CYDEV_CLKDIST_DCFG2_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG2_CFG0 0x40004088\r
-#define CYDEV_CLKDIST_DCFG2_CFG1 0x40004089\r
-#define CYDEV_CLKDIST_DCFG2_CFG2 0x4000408a\r
-#define CYDEV_CLKDIST_DCFG3_BASE 0x4000408c\r
-#define CYDEV_CLKDIST_DCFG3_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG3_CFG0 0x4000408c\r
-#define CYDEV_CLKDIST_DCFG3_CFG1 0x4000408d\r
-#define CYDEV_CLKDIST_DCFG3_CFG2 0x4000408e\r
-#define CYDEV_CLKDIST_DCFG4_BASE 0x40004090\r
-#define CYDEV_CLKDIST_DCFG4_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG4_CFG0 0x40004090\r
-#define CYDEV_CLKDIST_DCFG4_CFG1 0x40004091\r
-#define CYDEV_CLKDIST_DCFG4_CFG2 0x40004092\r
-#define CYDEV_CLKDIST_DCFG5_BASE 0x40004094\r
-#define CYDEV_CLKDIST_DCFG5_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG5_CFG0 0x40004094\r
-#define CYDEV_CLKDIST_DCFG5_CFG1 0x40004095\r
-#define CYDEV_CLKDIST_DCFG5_CFG2 0x40004096\r
-#define CYDEV_CLKDIST_DCFG6_BASE 0x40004098\r
-#define CYDEV_CLKDIST_DCFG6_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG6_CFG0 0x40004098\r
-#define CYDEV_CLKDIST_DCFG6_CFG1 0x40004099\r
-#define CYDEV_CLKDIST_DCFG6_CFG2 0x4000409a\r
-#define CYDEV_CLKDIST_DCFG7_BASE 0x4000409c\r
-#define CYDEV_CLKDIST_DCFG7_SIZE 0x00000003\r
-#define CYDEV_CLKDIST_DCFG7_CFG0 0x4000409c\r
-#define CYDEV_CLKDIST_DCFG7_CFG1 0x4000409d\r
-#define CYDEV_CLKDIST_DCFG7_CFG2 0x4000409e\r
-#define CYDEV_CLKDIST_ACFG0_BASE 0x40004100\r
-#define CYDEV_CLKDIST_ACFG0_SIZE 0x00000004\r
-#define CYDEV_CLKDIST_ACFG0_CFG0 0x40004100\r
-#define CYDEV_CLKDIST_ACFG0_CFG1 0x40004101\r
-#define CYDEV_CLKDIST_ACFG0_CFG2 0x40004102\r
-#define CYDEV_CLKDIST_ACFG0_CFG3 0x40004103\r
-#define CYDEV_CLKDIST_ACFG1_BASE 0x40004104\r
-#define CYDEV_CLKDIST_ACFG1_SIZE 0x00000004\r
-#define CYDEV_CLKDIST_ACFG1_CFG0 0x40004104\r
-#define CYDEV_CLKDIST_ACFG1_CFG1 0x40004105\r
-#define CYDEV_CLKDIST_ACFG1_CFG2 0x40004106\r
-#define CYDEV_CLKDIST_ACFG1_CFG3 0x40004107\r
-#define CYDEV_CLKDIST_ACFG2_BASE 0x40004108\r
-#define CYDEV_CLKDIST_ACFG2_SIZE 0x00000004\r
-#define CYDEV_CLKDIST_ACFG2_CFG0 0x40004108\r
-#define CYDEV_CLKDIST_ACFG2_CFG1 0x40004109\r
-#define CYDEV_CLKDIST_ACFG2_CFG2 0x4000410a\r
-#define CYDEV_CLKDIST_ACFG2_CFG3 0x4000410b\r
-#define CYDEV_CLKDIST_ACFG3_BASE 0x4000410c\r
-#define CYDEV_CLKDIST_ACFG3_SIZE 0x00000004\r
-#define CYDEV_CLKDIST_ACFG3_CFG0 0x4000410c\r
-#define CYDEV_CLKDIST_ACFG3_CFG1 0x4000410d\r
-#define CYDEV_CLKDIST_ACFG3_CFG2 0x4000410e\r
-#define CYDEV_CLKDIST_ACFG3_CFG3 0x4000410f\r
-#define CYDEV_FASTCLK_BASE 0x40004200\r
-#define CYDEV_FASTCLK_SIZE 0x00000026\r
-#define CYDEV_FASTCLK_IMO_BASE 0x40004200\r
-#define CYDEV_FASTCLK_IMO_SIZE 0x00000001\r
-#define CYDEV_FASTCLK_IMO_CR 0x40004200\r
-#define CYDEV_FASTCLK_XMHZ_BASE 0x40004210\r
-#define CYDEV_FASTCLK_XMHZ_SIZE 0x00000004\r
-#define CYDEV_FASTCLK_XMHZ_CSR 0x40004210\r
-#define CYDEV_FASTCLK_XMHZ_CFG0 0x40004212\r
-#define CYDEV_FASTCLK_XMHZ_CFG1 0x40004213\r
-#define CYDEV_FASTCLK_PLL_BASE 0x40004220\r
-#define CYDEV_FASTCLK_PLL_SIZE 0x00000006\r
-#define CYDEV_FASTCLK_PLL_CFG0 0x40004220\r
-#define CYDEV_FASTCLK_PLL_CFG1 0x40004221\r
-#define CYDEV_FASTCLK_PLL_P 0x40004222\r
-#define CYDEV_FASTCLK_PLL_Q 0x40004223\r
-#define CYDEV_FASTCLK_PLL_SR 0x40004225\r
-#define CYDEV_SLOWCLK_BASE 0x40004300\r
-#define CYDEV_SLOWCLK_SIZE 0x0000000b\r
-#define CYDEV_SLOWCLK_ILO_BASE 0x40004300\r
-#define CYDEV_SLOWCLK_ILO_SIZE 0x00000002\r
-#define CYDEV_SLOWCLK_ILO_CR0 0x40004300\r
-#define CYDEV_SLOWCLK_ILO_CR1 0x40004301\r
-#define CYDEV_SLOWCLK_X32_BASE 0x40004308\r
-#define CYDEV_SLOWCLK_X32_SIZE 0x00000003\r
-#define CYDEV_SLOWCLK_X32_CR 0x40004308\r
-#define CYDEV_SLOWCLK_X32_CFG 0x40004309\r
-#define CYDEV_SLOWCLK_X32_TST 0x4000430a\r
-#define CYDEV_BOOST_BASE 0x40004320\r
-#define CYDEV_BOOST_SIZE 0x00000007\r
-#define CYDEV_BOOST_CR0 0x40004320\r
-#define CYDEV_BOOST_CR1 0x40004321\r
-#define CYDEV_BOOST_CR2 0x40004322\r
-#define CYDEV_BOOST_CR3 0x40004323\r
-#define CYDEV_BOOST_SR 0x40004324\r
-#define CYDEV_BOOST_CR4 0x40004325\r
-#define CYDEV_BOOST_SR2 0x40004326\r
-#define CYDEV_PWRSYS_BASE 0x40004330\r
-#define CYDEV_PWRSYS_SIZE 0x00000002\r
-#define CYDEV_PWRSYS_CR0 0x40004330\r
-#define CYDEV_PWRSYS_CR1 0x40004331\r
-#define CYDEV_PM_BASE 0x40004380\r
-#define CYDEV_PM_SIZE 0x00000057\r
-#define CYDEV_PM_TW_CFG0 0x40004380\r
-#define CYDEV_PM_TW_CFG1 0x40004381\r
-#define CYDEV_PM_TW_CFG2 0x40004382\r
-#define CYDEV_PM_WDT_CFG 0x40004383\r
-#define CYDEV_PM_WDT_CR 0x40004384\r
-#define CYDEV_PM_INT_SR 0x40004390\r
-#define CYDEV_PM_MODE_CFG0 0x40004391\r
-#define CYDEV_PM_MODE_CFG1 0x40004392\r
-#define CYDEV_PM_MODE_CSR 0x40004393\r
-#define CYDEV_PM_USB_CR0 0x40004394\r
-#define CYDEV_PM_WAKEUP_CFG0 0x40004398\r
-#define CYDEV_PM_WAKEUP_CFG1 0x40004399\r
-#define CYDEV_PM_WAKEUP_CFG2 0x4000439a\r
-#define CYDEV_PM_ACT_BASE 0x400043a0\r
-#define CYDEV_PM_ACT_SIZE 0x0000000e\r
-#define CYDEV_PM_ACT_CFG0 0x400043a0\r
-#define CYDEV_PM_ACT_CFG1 0x400043a1\r
-#define CYDEV_PM_ACT_CFG2 0x400043a2\r
-#define CYDEV_PM_ACT_CFG3 0x400043a3\r
-#define CYDEV_PM_ACT_CFG4 0x400043a4\r
-#define CYDEV_PM_ACT_CFG5 0x400043a5\r
-#define CYDEV_PM_ACT_CFG6 0x400043a6\r
-#define CYDEV_PM_ACT_CFG7 0x400043a7\r
-#define CYDEV_PM_ACT_CFG8 0x400043a8\r
-#define CYDEV_PM_ACT_CFG9 0x400043a9\r
-#define CYDEV_PM_ACT_CFG10 0x400043aa\r
-#define CYDEV_PM_ACT_CFG11 0x400043ab\r
-#define CYDEV_PM_ACT_CFG12 0x400043ac\r
-#define CYDEV_PM_ACT_CFG13 0x400043ad\r
-#define CYDEV_PM_STBY_BASE 0x400043b0\r
-#define CYDEV_PM_STBY_SIZE 0x0000000e\r
-#define CYDEV_PM_STBY_CFG0 0x400043b0\r
-#define CYDEV_PM_STBY_CFG1 0x400043b1\r
-#define CYDEV_PM_STBY_CFG2 0x400043b2\r
-#define CYDEV_PM_STBY_CFG3 0x400043b3\r
-#define CYDEV_PM_STBY_CFG4 0x400043b4\r
-#define CYDEV_PM_STBY_CFG5 0x400043b5\r
-#define CYDEV_PM_STBY_CFG6 0x400043b6\r
-#define CYDEV_PM_STBY_CFG7 0x400043b7\r
-#define CYDEV_PM_STBY_CFG8 0x400043b8\r
-#define CYDEV_PM_STBY_CFG9 0x400043b9\r
-#define CYDEV_PM_STBY_CFG10 0x400043ba\r
-#define CYDEV_PM_STBY_CFG11 0x400043bb\r
-#define CYDEV_PM_STBY_CFG12 0x400043bc\r
-#define CYDEV_PM_STBY_CFG13 0x400043bd\r
-#define CYDEV_PM_AVAIL_BASE 0x400043c0\r
-#define CYDEV_PM_AVAIL_SIZE 0x00000017\r
-#define CYDEV_PM_AVAIL_CR0 0x400043c0\r
-#define CYDEV_PM_AVAIL_CR1 0x400043c1\r
-#define CYDEV_PM_AVAIL_CR2 0x400043c2\r
-#define CYDEV_PM_AVAIL_CR3 0x400043c3\r
-#define CYDEV_PM_AVAIL_CR4 0x400043c4\r
-#define CYDEV_PM_AVAIL_CR5 0x400043c5\r
-#define CYDEV_PM_AVAIL_CR6 0x400043c6\r
-#define CYDEV_PM_AVAIL_SR0 0x400043d0\r
-#define CYDEV_PM_AVAIL_SR1 0x400043d1\r
-#define CYDEV_PM_AVAIL_SR2 0x400043d2\r
-#define CYDEV_PM_AVAIL_SR3 0x400043d3\r
-#define CYDEV_PM_AVAIL_SR4 0x400043d4\r
-#define CYDEV_PM_AVAIL_SR5 0x400043d5\r
-#define CYDEV_PM_AVAIL_SR6 0x400043d6\r
-#define CYDEV_PICU_BASE 0x40004500\r
-#define CYDEV_PICU_SIZE 0x000000b0\r
-#define CYDEV_PICU_INTTYPE_BASE 0x40004500\r
-#define CYDEV_PICU_INTTYPE_SIZE 0x00000080\r
-#define CYDEV_PICU_INTTYPE_PICU0_BASE 0x40004500\r
-#define CYDEV_PICU_INTTYPE_PICU0_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE0 0x40004500\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE1 0x40004501\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE2 0x40004502\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE3 0x40004503\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE4 0x40004504\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE5 0x40004505\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE6 0x40004506\r
-#define CYDEV_PICU_INTTYPE_PICU0_INTTYPE7 0x40004507\r
-#define CYDEV_PICU_INTTYPE_PICU1_BASE 0x40004508\r
-#define CYDEV_PICU_INTTYPE_PICU1_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE0 0x40004508\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE1 0x40004509\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE2 0x4000450a\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE3 0x4000450b\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE4 0x4000450c\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE5 0x4000450d\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE6 0x4000450e\r
-#define CYDEV_PICU_INTTYPE_PICU1_INTTYPE7 0x4000450f\r
-#define CYDEV_PICU_INTTYPE_PICU2_BASE 0x40004510\r
-#define CYDEV_PICU_INTTYPE_PICU2_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE0 0x40004510\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE1 0x40004511\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE2 0x40004512\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE3 0x40004513\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE4 0x40004514\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE5 0x40004515\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE6 0x40004516\r
-#define CYDEV_PICU_INTTYPE_PICU2_INTTYPE7 0x40004517\r
-#define CYDEV_PICU_INTTYPE_PICU3_BASE 0x40004518\r
-#define CYDEV_PICU_INTTYPE_PICU3_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE0 0x40004518\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE1 0x40004519\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE2 0x4000451a\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE3 0x4000451b\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE4 0x4000451c\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE5 0x4000451d\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE6 0x4000451e\r
-#define CYDEV_PICU_INTTYPE_PICU3_INTTYPE7 0x4000451f\r
-#define CYDEV_PICU_INTTYPE_PICU4_BASE 0x40004520\r
-#define CYDEV_PICU_INTTYPE_PICU4_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE0 0x40004520\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE1 0x40004521\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE2 0x40004522\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE3 0x40004523\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE4 0x40004524\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE5 0x40004525\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE6 0x40004526\r
-#define CYDEV_PICU_INTTYPE_PICU4_INTTYPE7 0x40004527\r
-#define CYDEV_PICU_INTTYPE_PICU5_BASE 0x40004528\r
-#define CYDEV_PICU_INTTYPE_PICU5_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE0 0x40004528\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE1 0x40004529\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE2 0x4000452a\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE3 0x4000452b\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE4 0x4000452c\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE5 0x4000452d\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE6 0x4000452e\r
-#define CYDEV_PICU_INTTYPE_PICU5_INTTYPE7 0x4000452f\r
-#define CYDEV_PICU_INTTYPE_PICU6_BASE 0x40004530\r
-#define CYDEV_PICU_INTTYPE_PICU6_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE0 0x40004530\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE1 0x40004531\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE2 0x40004532\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE3 0x40004533\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE4 0x40004534\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE5 0x40004535\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE6 0x40004536\r
-#define CYDEV_PICU_INTTYPE_PICU6_INTTYPE7 0x40004537\r
-#define CYDEV_PICU_INTTYPE_PICU12_BASE 0x40004560\r
-#define CYDEV_PICU_INTTYPE_PICU12_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE0 0x40004560\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE1 0x40004561\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE2 0x40004562\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE3 0x40004563\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE4 0x40004564\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE5 0x40004565\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE6 0x40004566\r
-#define CYDEV_PICU_INTTYPE_PICU12_INTTYPE7 0x40004567\r
-#define CYDEV_PICU_INTTYPE_PICU15_BASE 0x40004578\r
-#define CYDEV_PICU_INTTYPE_PICU15_SIZE 0x00000008\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE0 0x40004578\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE1 0x40004579\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE2 0x4000457a\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE3 0x4000457b\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE4 0x4000457c\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE5 0x4000457d\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE6 0x4000457e\r
-#define CYDEV_PICU_INTTYPE_PICU15_INTTYPE7 0x4000457f\r
-#define CYDEV_PICU_STAT_BASE 0x40004580\r
-#define CYDEV_PICU_STAT_SIZE 0x00000010\r
-#define CYDEV_PICU_STAT_PICU0_BASE 0x40004580\r
-#define CYDEV_PICU_STAT_PICU0_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU0_INTSTAT 0x40004580\r
-#define CYDEV_PICU_STAT_PICU1_BASE 0x40004581\r
-#define CYDEV_PICU_STAT_PICU1_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU1_INTSTAT 0x40004581\r
-#define CYDEV_PICU_STAT_PICU2_BASE 0x40004582\r
-#define CYDEV_PICU_STAT_PICU2_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU2_INTSTAT 0x40004582\r
-#define CYDEV_PICU_STAT_PICU3_BASE 0x40004583\r
-#define CYDEV_PICU_STAT_PICU3_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU3_INTSTAT 0x40004583\r
-#define CYDEV_PICU_STAT_PICU4_BASE 0x40004584\r
-#define CYDEV_PICU_STAT_PICU4_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU4_INTSTAT 0x40004584\r
-#define CYDEV_PICU_STAT_PICU5_BASE 0x40004585\r
-#define CYDEV_PICU_STAT_PICU5_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU5_INTSTAT 0x40004585\r
-#define CYDEV_PICU_STAT_PICU6_BASE 0x40004586\r
-#define CYDEV_PICU_STAT_PICU6_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU6_INTSTAT 0x40004586\r
-#define CYDEV_PICU_STAT_PICU12_BASE 0x4000458c\r
-#define CYDEV_PICU_STAT_PICU12_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU12_INTSTAT 0x4000458c\r
-#define CYDEV_PICU_STAT_PICU15_BASE 0x4000458f\r
-#define CYDEV_PICU_STAT_PICU15_SIZE 0x00000001\r
-#define CYDEV_PICU_STAT_PICU15_INTSTAT 0x4000458f\r
-#define CYDEV_PICU_SNAP_BASE 0x40004590\r
-#define CYDEV_PICU_SNAP_SIZE 0x00000010\r
-#define CYDEV_PICU_SNAP_PICU0_BASE 0x40004590\r
-#define CYDEV_PICU_SNAP_PICU0_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU0_SNAP 0x40004590\r
-#define CYDEV_PICU_SNAP_PICU1_BASE 0x40004591\r
-#define CYDEV_PICU_SNAP_PICU1_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU1_SNAP 0x40004591\r
-#define CYDEV_PICU_SNAP_PICU2_BASE 0x40004592\r
-#define CYDEV_PICU_SNAP_PICU2_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU2_SNAP 0x40004592\r
-#define CYDEV_PICU_SNAP_PICU3_BASE 0x40004593\r
-#define CYDEV_PICU_SNAP_PICU3_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU3_SNAP 0x40004593\r
-#define CYDEV_PICU_SNAP_PICU4_BASE 0x40004594\r
-#define CYDEV_PICU_SNAP_PICU4_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU4_SNAP 0x40004594\r
-#define CYDEV_PICU_SNAP_PICU5_BASE 0x40004595\r
-#define CYDEV_PICU_SNAP_PICU5_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU5_SNAP 0x40004595\r
-#define CYDEV_PICU_SNAP_PICU6_BASE 0x40004596\r
-#define CYDEV_PICU_SNAP_PICU6_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU6_SNAP 0x40004596\r
-#define CYDEV_PICU_SNAP_PICU12_BASE 0x4000459c\r
-#define CYDEV_PICU_SNAP_PICU12_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU12_SNAP 0x4000459c\r
-#define CYDEV_PICU_SNAP_PICU_15_BASE 0x4000459f\r
-#define CYDEV_PICU_SNAP_PICU_15_SIZE 0x00000001\r
-#define CYDEV_PICU_SNAP_PICU_15_SNAP_15 0x4000459f\r
-#define CYDEV_PICU_DISABLE_COR_BASE 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_SIZE 0x00000010\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_BASE 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_BASE 0x400045a1\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR 0x400045a1\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_BASE 0x400045a2\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR 0x400045a2\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_BASE 0x400045a3\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR 0x400045a3\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_BASE 0x400045a4\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR 0x400045a4\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_BASE 0x400045a5\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR 0x400045a5\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_BASE 0x400045a6\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR 0x400045a6\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_BASE 0x400045ac\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR 0x400045ac\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_BASE 0x400045af\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_SIZE 0x00000001\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR 0x400045af\r
-#define CYDEV_MFGCFG_BASE 0x40004600\r
-#define CYDEV_MFGCFG_SIZE 0x000000ed\r
-#define CYDEV_MFGCFG_ANAIF_BASE 0x40004600\r
-#define CYDEV_MFGCFG_ANAIF_SIZE 0x00000038\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_BASE 0x40004608\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_TR 0x40004608\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_BASE 0x40004609\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_TR 0x40004609\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_BASE 0x4000460a\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_TR 0x4000460a\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_BASE 0x4000460b\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_TR 0x4000460b\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE 0x40004610\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0 0x40004610\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE 0x40004611\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0 0x40004611\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE 0x40004612\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0 0x40004612\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_BASE 0x40004614\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_TR0 0x40004614\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_BASE 0x40004616\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_TR0 0x40004616\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_BASE 0x40004620\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_TR0 0x40004620\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_TR1 0x40004621\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_BASE 0x40004622\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_TR0 0x40004622\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_TR1 0x40004623\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_BASE 0x40004624\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_TR0 0x40004624\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_TR1 0x40004625\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_BASE 0x40004626\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_TR0 0x40004626\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_TR1 0x40004627\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_BASE 0x40004630\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_TR0 0x40004630\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_TR1 0x40004631\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_BASE 0x40004632\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_TR0 0x40004632\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_TR1 0x40004633\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_BASE 0x40004634\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_TR0 0x40004634\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_TR1 0x40004635\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_BASE 0x40004636\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_TR0 0x40004636\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_TR1 0x40004637\r
-#define CYDEV_MFGCFG_PWRSYS_BASE 0x40004680\r
-#define CYDEV_MFGCFG_PWRSYS_SIZE 0x0000000b\r
-#define CYDEV_MFGCFG_PWRSYS_HIB_TR0 0x40004680\r
-#define CYDEV_MFGCFG_PWRSYS_HIB_TR1 0x40004681\r
-#define CYDEV_MFGCFG_PWRSYS_I2C_TR 0x40004682\r
-#define CYDEV_MFGCFG_PWRSYS_SLP_TR 0x40004683\r
-#define CYDEV_MFGCFG_PWRSYS_BUZZ_TR 0x40004684\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR0 0x40004685\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR1 0x40004686\r
-#define CYDEV_MFGCFG_PWRSYS_BREF_TR 0x40004687\r
-#define CYDEV_MFGCFG_PWRSYS_BG_TR 0x40004688\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR2 0x40004689\r
-#define CYDEV_MFGCFG_PWRSYS_WAKE_TR3 0x4000468a\r
-#define CYDEV_MFGCFG_ILO_BASE 0x40004690\r
-#define CYDEV_MFGCFG_ILO_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_ILO_TR0 0x40004690\r
-#define CYDEV_MFGCFG_ILO_TR1 0x40004691\r
-#define CYDEV_MFGCFG_X32_BASE 0x40004698\r
-#define CYDEV_MFGCFG_X32_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_X32_TR 0x40004698\r
-#define CYDEV_MFGCFG_IMO_BASE 0x400046a0\r
-#define CYDEV_MFGCFG_IMO_SIZE 0x00000005\r
-#define CYDEV_MFGCFG_IMO_TR0 0x400046a0\r
-#define CYDEV_MFGCFG_IMO_TR1 0x400046a1\r
-#define CYDEV_MFGCFG_IMO_GAIN 0x400046a2\r
-#define CYDEV_MFGCFG_IMO_C36M 0x400046a3\r
-#define CYDEV_MFGCFG_IMO_TR2 0x400046a4\r
-#define CYDEV_MFGCFG_XMHZ_BASE 0x400046a8\r
-#define CYDEV_MFGCFG_XMHZ_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_XMHZ_TR 0x400046a8\r
-#define CYDEV_MFGCFG_DLY 0x400046c0\r
-#define CYDEV_MFGCFG_MLOGIC_BASE 0x400046e0\r
-#define CYDEV_MFGCFG_MLOGIC_SIZE 0x0000000d\r
-#define CYDEV_MFGCFG_MLOGIC_DMPSTR 0x400046e2\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_BASE 0x400046e4\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_SIZE 0x00000002\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_CR 0x400046e4\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_CFG0 0x400046e5\r
-#define CYDEV_MFGCFG_MLOGIC_DEBUG 0x400046e8\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE 0x400046ea\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE 0x00000001\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR 0x400046ea\r
-#define CYDEV_MFGCFG_MLOGIC_REV_ID 0x400046ec\r
-#define CYDEV_RESET_BASE 0x400046f0\r
-#define CYDEV_RESET_SIZE 0x0000000f\r
-#define CYDEV_RESET_IPOR_CR0 0x400046f0\r
-#define CYDEV_RESET_IPOR_CR1 0x400046f1\r
-#define CYDEV_RESET_IPOR_CR2 0x400046f2\r
-#define CYDEV_RESET_IPOR_CR3 0x400046f3\r
-#define CYDEV_RESET_CR0 0x400046f4\r
-#define CYDEV_RESET_CR1 0x400046f5\r
-#define CYDEV_RESET_CR2 0x400046f6\r
-#define CYDEV_RESET_CR3 0x400046f7\r
-#define CYDEV_RESET_CR4 0x400046f8\r
-#define CYDEV_RESET_CR5 0x400046f9\r
-#define CYDEV_RESET_SR0 0x400046fa\r
-#define CYDEV_RESET_SR1 0x400046fb\r
-#define CYDEV_RESET_SR2 0x400046fc\r
-#define CYDEV_RESET_SR3 0x400046fd\r
-#define CYDEV_RESET_TR 0x400046fe\r
-#define CYDEV_SPC_BASE 0x40004700\r
-#define CYDEV_SPC_SIZE 0x00000100\r
-#define CYDEV_SPC_FM_EE_CR 0x40004700\r
-#define CYDEV_SPC_FM_EE_WAKE_CNT 0x40004701\r
-#define CYDEV_SPC_EE_SCR 0x40004702\r
-#define CYDEV_SPC_EE_ERR 0x40004703\r
-#define CYDEV_SPC_CPU_DATA 0x40004720\r
-#define CYDEV_SPC_DMA_DATA 0x40004721\r
-#define CYDEV_SPC_SR 0x40004722\r
-#define CYDEV_SPC_CR 0x40004723\r
-#define CYDEV_SPC_DMM_MAP_BASE 0x40004780\r
-#define CYDEV_SPC_DMM_MAP_SIZE 0x00000080\r
-#define CYDEV_SPC_DMM_MAP_SRAM_MBASE 0x40004780\r
-#define CYDEV_SPC_DMM_MAP_SRAM_MSIZE 0x00000080\r
-#define CYDEV_CACHE_BASE 0x40004800\r
-#define CYDEV_CACHE_SIZE 0x0000009c\r
-#define CYDEV_CACHE_CC_CTL 0x40004800\r
-#define CYDEV_CACHE_ECC_CORR 0x40004880\r
-#define CYDEV_CACHE_ECC_ERR 0x40004888\r
-#define CYDEV_CACHE_FLASH_ERR 0x40004890\r
-#define CYDEV_CACHE_HITMISS 0x40004898\r
-#define CYDEV_I2C_BASE 0x40004900\r
-#define CYDEV_I2C_SIZE 0x000000e1\r
-#define CYDEV_I2C_XCFG 0x400049c8\r
-#define CYDEV_I2C_ADR 0x400049ca\r
-#define CYDEV_I2C_CFG 0x400049d6\r
-#define CYDEV_I2C_CSR 0x400049d7\r
-#define CYDEV_I2C_D 0x400049d8\r
-#define CYDEV_I2C_MCSR 0x400049d9\r
-#define CYDEV_I2C_CLK_DIV1 0x400049db\r
-#define CYDEV_I2C_CLK_DIV2 0x400049dc\r
-#define CYDEV_I2C_TMOUT_CSR 0x400049dd\r
-#define CYDEV_I2C_TMOUT_SR 0x400049de\r
-#define CYDEV_I2C_TMOUT_CFG0 0x400049df\r
-#define CYDEV_I2C_TMOUT_CFG1 0x400049e0\r
-#define CYDEV_DEC_BASE 0x40004e00\r
-#define CYDEV_DEC_SIZE 0x00000015\r
-#define CYDEV_DEC_CR 0x40004e00\r
-#define CYDEV_DEC_SR 0x40004e01\r
-#define CYDEV_DEC_SHIFT1 0x40004e02\r
-#define CYDEV_DEC_SHIFT2 0x40004e03\r
-#define CYDEV_DEC_DR2 0x40004e04\r
-#define CYDEV_DEC_DR2H 0x40004e05\r
-#define CYDEV_DEC_DR1 0x40004e06\r
-#define CYDEV_DEC_OCOR 0x40004e08\r
-#define CYDEV_DEC_OCORM 0x40004e09\r
-#define CYDEV_DEC_OCORH 0x40004e0a\r
-#define CYDEV_DEC_GCOR 0x40004e0c\r
-#define CYDEV_DEC_GCORH 0x40004e0d\r
-#define CYDEV_DEC_GVAL 0x40004e0e\r
-#define CYDEV_DEC_OUTSAMP 0x40004e10\r
-#define CYDEV_DEC_OUTSAMPM 0x40004e11\r
-#define CYDEV_DEC_OUTSAMPH 0x40004e12\r
-#define CYDEV_DEC_OUTSAMPS 0x40004e13\r
-#define CYDEV_DEC_COHER 0x40004e14\r
-#define CYDEV_TMR0_BASE 0x40004f00\r
-#define CYDEV_TMR0_SIZE 0x0000000c\r
-#define CYDEV_TMR0_CFG0 0x40004f00\r
-#define CYDEV_TMR0_CFG1 0x40004f01\r
-#define CYDEV_TMR0_CFG2 0x40004f02\r
-#define CYDEV_TMR0_SR0 0x40004f03\r
-#define CYDEV_TMR0_PER0 0x40004f04\r
-#define CYDEV_TMR0_PER1 0x40004f05\r
-#define CYDEV_TMR0_CNT_CMP0 0x40004f06\r
-#define CYDEV_TMR0_CNT_CMP1 0x40004f07\r
-#define CYDEV_TMR0_CAP0 0x40004f08\r
-#define CYDEV_TMR0_CAP1 0x40004f09\r
-#define CYDEV_TMR0_RT0 0x40004f0a\r
-#define CYDEV_TMR0_RT1 0x40004f0b\r
-#define CYDEV_TMR1_BASE 0x40004f0c\r
-#define CYDEV_TMR1_SIZE 0x0000000c\r
-#define CYDEV_TMR1_CFG0 0x40004f0c\r
-#define CYDEV_TMR1_CFG1 0x40004f0d\r
-#define CYDEV_TMR1_CFG2 0x40004f0e\r
-#define CYDEV_TMR1_SR0 0x40004f0f\r
-#define CYDEV_TMR1_PER0 0x40004f10\r
-#define CYDEV_TMR1_PER1 0x40004f11\r
-#define CYDEV_TMR1_CNT_CMP0 0x40004f12\r
-#define CYDEV_TMR1_CNT_CMP1 0x40004f13\r
-#define CYDEV_TMR1_CAP0 0x40004f14\r
-#define CYDEV_TMR1_CAP1 0x40004f15\r
-#define CYDEV_TMR1_RT0 0x40004f16\r
-#define CYDEV_TMR1_RT1 0x40004f17\r
-#define CYDEV_TMR2_BASE 0x40004f18\r
-#define CYDEV_TMR2_SIZE 0x0000000c\r
-#define CYDEV_TMR2_CFG0 0x40004f18\r
-#define CYDEV_TMR2_CFG1 0x40004f19\r
-#define CYDEV_TMR2_CFG2 0x40004f1a\r
-#define CYDEV_TMR2_SR0 0x40004f1b\r
-#define CYDEV_TMR2_PER0 0x40004f1c\r
-#define CYDEV_TMR2_PER1 0x40004f1d\r
-#define CYDEV_TMR2_CNT_CMP0 0x40004f1e\r
-#define CYDEV_TMR2_CNT_CMP1 0x40004f1f\r
-#define CYDEV_TMR2_CAP0 0x40004f20\r
-#define CYDEV_TMR2_CAP1 0x40004f21\r
-#define CYDEV_TMR2_RT0 0x40004f22\r
-#define CYDEV_TMR2_RT1 0x40004f23\r
-#define CYDEV_TMR3_BASE 0x40004f24\r
-#define CYDEV_TMR3_SIZE 0x0000000c\r
-#define CYDEV_TMR3_CFG0 0x40004f24\r
-#define CYDEV_TMR3_CFG1 0x40004f25\r
-#define CYDEV_TMR3_CFG2 0x40004f26\r
-#define CYDEV_TMR3_SR0 0x40004f27\r
-#define CYDEV_TMR3_PER0 0x40004f28\r
-#define CYDEV_TMR3_PER1 0x40004f29\r
-#define CYDEV_TMR3_CNT_CMP0 0x40004f2a\r
-#define CYDEV_TMR3_CNT_CMP1 0x40004f2b\r
-#define CYDEV_TMR3_CAP0 0x40004f2c\r
-#define CYDEV_TMR3_CAP1 0x40004f2d\r
-#define CYDEV_TMR3_RT0 0x40004f2e\r
-#define CYDEV_TMR3_RT1 0x40004f2f\r
-#define CYDEV_IO_BASE 0x40005000\r
-#define CYDEV_IO_SIZE 0x00000200\r
-#define CYDEV_IO_PC_BASE 0x40005000\r
-#define CYDEV_IO_PC_SIZE 0x00000080\r
-#define CYDEV_IO_PC_PRT0_BASE 0x40005000\r
-#define CYDEV_IO_PC_PRT0_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT0_PC0 0x40005000\r
-#define CYDEV_IO_PC_PRT0_PC1 0x40005001\r
-#define CYDEV_IO_PC_PRT0_PC2 0x40005002\r
-#define CYDEV_IO_PC_PRT0_PC3 0x40005003\r
-#define CYDEV_IO_PC_PRT0_PC4 0x40005004\r
-#define CYDEV_IO_PC_PRT0_PC5 0x40005005\r
-#define CYDEV_IO_PC_PRT0_PC6 0x40005006\r
-#define CYDEV_IO_PC_PRT0_PC7 0x40005007\r
-#define CYDEV_IO_PC_PRT1_BASE 0x40005008\r
-#define CYDEV_IO_PC_PRT1_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT1_PC0 0x40005008\r
-#define CYDEV_IO_PC_PRT1_PC1 0x40005009\r
-#define CYDEV_IO_PC_PRT1_PC2 0x4000500a\r
-#define CYDEV_IO_PC_PRT1_PC3 0x4000500b\r
-#define CYDEV_IO_PC_PRT1_PC4 0x4000500c\r
-#define CYDEV_IO_PC_PRT1_PC5 0x4000500d\r
-#define CYDEV_IO_PC_PRT1_PC6 0x4000500e\r
-#define CYDEV_IO_PC_PRT1_PC7 0x4000500f\r
-#define CYDEV_IO_PC_PRT2_BASE 0x40005010\r
-#define CYDEV_IO_PC_PRT2_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT2_PC0 0x40005010\r
-#define CYDEV_IO_PC_PRT2_PC1 0x40005011\r
-#define CYDEV_IO_PC_PRT2_PC2 0x40005012\r
-#define CYDEV_IO_PC_PRT2_PC3 0x40005013\r
-#define CYDEV_IO_PC_PRT2_PC4 0x40005014\r
-#define CYDEV_IO_PC_PRT2_PC5 0x40005015\r
-#define CYDEV_IO_PC_PRT2_PC6 0x40005016\r
-#define CYDEV_IO_PC_PRT2_PC7 0x40005017\r
-#define CYDEV_IO_PC_PRT3_BASE 0x40005018\r
-#define CYDEV_IO_PC_PRT3_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT3_PC0 0x40005018\r
-#define CYDEV_IO_PC_PRT3_PC1 0x40005019\r
-#define CYDEV_IO_PC_PRT3_PC2 0x4000501a\r
-#define CYDEV_IO_PC_PRT3_PC3 0x4000501b\r
-#define CYDEV_IO_PC_PRT3_PC4 0x4000501c\r
-#define CYDEV_IO_PC_PRT3_PC5 0x4000501d\r
-#define CYDEV_IO_PC_PRT3_PC6 0x4000501e\r
-#define CYDEV_IO_PC_PRT3_PC7 0x4000501f\r
-#define CYDEV_IO_PC_PRT4_BASE 0x40005020\r
-#define CYDEV_IO_PC_PRT4_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT4_PC0 0x40005020\r
-#define CYDEV_IO_PC_PRT4_PC1 0x40005021\r
-#define CYDEV_IO_PC_PRT4_PC2 0x40005022\r
-#define CYDEV_IO_PC_PRT4_PC3 0x40005023\r
-#define CYDEV_IO_PC_PRT4_PC4 0x40005024\r
-#define CYDEV_IO_PC_PRT4_PC5 0x40005025\r
-#define CYDEV_IO_PC_PRT4_PC6 0x40005026\r
-#define CYDEV_IO_PC_PRT4_PC7 0x40005027\r
-#define CYDEV_IO_PC_PRT5_BASE 0x40005028\r
-#define CYDEV_IO_PC_PRT5_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT5_PC0 0x40005028\r
-#define CYDEV_IO_PC_PRT5_PC1 0x40005029\r
-#define CYDEV_IO_PC_PRT5_PC2 0x4000502a\r
-#define CYDEV_IO_PC_PRT5_PC3 0x4000502b\r
-#define CYDEV_IO_PC_PRT5_PC4 0x4000502c\r
-#define CYDEV_IO_PC_PRT5_PC5 0x4000502d\r
-#define CYDEV_IO_PC_PRT5_PC6 0x4000502e\r
-#define CYDEV_IO_PC_PRT5_PC7 0x4000502f\r
-#define CYDEV_IO_PC_PRT6_BASE 0x40005030\r
-#define CYDEV_IO_PC_PRT6_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT6_PC0 0x40005030\r
-#define CYDEV_IO_PC_PRT6_PC1 0x40005031\r
-#define CYDEV_IO_PC_PRT6_PC2 0x40005032\r
-#define CYDEV_IO_PC_PRT6_PC3 0x40005033\r
-#define CYDEV_IO_PC_PRT6_PC4 0x40005034\r
-#define CYDEV_IO_PC_PRT6_PC5 0x40005035\r
-#define CYDEV_IO_PC_PRT6_PC6 0x40005036\r
-#define CYDEV_IO_PC_PRT6_PC7 0x40005037\r
-#define CYDEV_IO_PC_PRT12_BASE 0x40005060\r
-#define CYDEV_IO_PC_PRT12_SIZE 0x00000008\r
-#define CYDEV_IO_PC_PRT12_PC0 0x40005060\r
-#define CYDEV_IO_PC_PRT12_PC1 0x40005061\r
-#define CYDEV_IO_PC_PRT12_PC2 0x40005062\r
-#define CYDEV_IO_PC_PRT12_PC3 0x40005063\r
-#define CYDEV_IO_PC_PRT12_PC4 0x40005064\r
-#define CYDEV_IO_PC_PRT12_PC5 0x40005065\r
-#define CYDEV_IO_PC_PRT12_PC6 0x40005066\r
-#define CYDEV_IO_PC_PRT12_PC7 0x40005067\r
-#define CYDEV_IO_PC_PRT15_BASE 0x40005078\r
-#define CYDEV_IO_PC_PRT15_SIZE 0x00000006\r
-#define CYDEV_IO_PC_PRT15_PC0 0x40005078\r
-#define CYDEV_IO_PC_PRT15_PC1 0x40005079\r
-#define CYDEV_IO_PC_PRT15_PC2 0x4000507a\r
-#define CYDEV_IO_PC_PRT15_PC3 0x4000507b\r
-#define CYDEV_IO_PC_PRT15_PC4 0x4000507c\r
-#define CYDEV_IO_PC_PRT15_PC5 0x4000507d\r
-#define CYDEV_IO_PC_PRT15_7_6_BASE 0x4000507e\r
-#define CYDEV_IO_PC_PRT15_7_6_SIZE 0x00000002\r
-#define CYDEV_IO_PC_PRT15_7_6_PC0 0x4000507e\r
-#define CYDEV_IO_PC_PRT15_7_6_PC1 0x4000507f\r
-#define CYDEV_IO_DR_BASE 0x40005080\r
-#define CYDEV_IO_DR_SIZE 0x00000010\r
-#define CYDEV_IO_DR_PRT0_BASE 0x40005080\r
-#define CYDEV_IO_DR_PRT0_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT0_DR_ALIAS 0x40005080\r
-#define CYDEV_IO_DR_PRT1_BASE 0x40005081\r
-#define CYDEV_IO_DR_PRT1_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT1_DR_ALIAS 0x40005081\r
-#define CYDEV_IO_DR_PRT2_BASE 0x40005082\r
-#define CYDEV_IO_DR_PRT2_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT2_DR_ALIAS 0x40005082\r
-#define CYDEV_IO_DR_PRT3_BASE 0x40005083\r
-#define CYDEV_IO_DR_PRT3_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT3_DR_ALIAS 0x40005083\r
-#define CYDEV_IO_DR_PRT4_BASE 0x40005084\r
-#define CYDEV_IO_DR_PRT4_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT4_DR_ALIAS 0x40005084\r
-#define CYDEV_IO_DR_PRT5_BASE 0x40005085\r
-#define CYDEV_IO_DR_PRT5_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT5_DR_ALIAS 0x40005085\r
-#define CYDEV_IO_DR_PRT6_BASE 0x40005086\r
-#define CYDEV_IO_DR_PRT6_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT6_DR_ALIAS 0x40005086\r
-#define CYDEV_IO_DR_PRT12_BASE 0x4000508c\r
-#define CYDEV_IO_DR_PRT12_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT12_DR_ALIAS 0x4000508c\r
-#define CYDEV_IO_DR_PRT15_BASE 0x4000508f\r
-#define CYDEV_IO_DR_PRT15_SIZE 0x00000001\r
-#define CYDEV_IO_DR_PRT15_DR_15_ALIAS 0x4000508f\r
-#define CYDEV_IO_PS_BASE 0x40005090\r
-#define CYDEV_IO_PS_SIZE 0x00000010\r
-#define CYDEV_IO_PS_PRT0_BASE 0x40005090\r
-#define CYDEV_IO_PS_PRT0_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT0_PS_ALIAS 0x40005090\r
-#define CYDEV_IO_PS_PRT1_BASE 0x40005091\r
-#define CYDEV_IO_PS_PRT1_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT1_PS_ALIAS 0x40005091\r
-#define CYDEV_IO_PS_PRT2_BASE 0x40005092\r
-#define CYDEV_IO_PS_PRT2_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT2_PS_ALIAS 0x40005092\r
-#define CYDEV_IO_PS_PRT3_BASE 0x40005093\r
-#define CYDEV_IO_PS_PRT3_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT3_PS_ALIAS 0x40005093\r
-#define CYDEV_IO_PS_PRT4_BASE 0x40005094\r
-#define CYDEV_IO_PS_PRT4_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT4_PS_ALIAS 0x40005094\r
-#define CYDEV_IO_PS_PRT5_BASE 0x40005095\r
-#define CYDEV_IO_PS_PRT5_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT5_PS_ALIAS 0x40005095\r
-#define CYDEV_IO_PS_PRT6_BASE 0x40005096\r
-#define CYDEV_IO_PS_PRT6_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT6_PS_ALIAS 0x40005096\r
-#define CYDEV_IO_PS_PRT12_BASE 0x4000509c\r
-#define CYDEV_IO_PS_PRT12_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT12_PS_ALIAS 0x4000509c\r
-#define CYDEV_IO_PS_PRT15_BASE 0x4000509f\r
-#define CYDEV_IO_PS_PRT15_SIZE 0x00000001\r
-#define CYDEV_IO_PS_PRT15_PS15_ALIAS 0x4000509f\r
-#define CYDEV_IO_PRT_BASE 0x40005100\r
-#define CYDEV_IO_PRT_SIZE 0x00000100\r
-#define CYDEV_IO_PRT_PRT0_BASE 0x40005100\r
-#define CYDEV_IO_PRT_PRT0_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT0_DR 0x40005100\r
-#define CYDEV_IO_PRT_PRT0_PS 0x40005101\r
-#define CYDEV_IO_PRT_PRT0_DM0 0x40005102\r
-#define CYDEV_IO_PRT_PRT0_DM1 0x40005103\r
-#define CYDEV_IO_PRT_PRT0_DM2 0x40005104\r
-#define CYDEV_IO_PRT_PRT0_SLW 0x40005105\r
-#define CYDEV_IO_PRT_PRT0_BYP 0x40005106\r
-#define CYDEV_IO_PRT_PRT0_BIE 0x40005107\r
-#define CYDEV_IO_PRT_PRT0_INP_DIS 0x40005108\r
-#define CYDEV_IO_PRT_PRT0_CTL 0x40005109\r
-#define CYDEV_IO_PRT_PRT0_PRT 0x4000510a\r
-#define CYDEV_IO_PRT_PRT0_BIT_MASK 0x4000510b\r
-#define CYDEV_IO_PRT_PRT0_AMUX 0x4000510c\r
-#define CYDEV_IO_PRT_PRT0_AG 0x4000510d\r
-#define CYDEV_IO_PRT_PRT0_LCD_COM_SEG 0x4000510e\r
-#define CYDEV_IO_PRT_PRT0_LCD_EN 0x4000510f\r
-#define CYDEV_IO_PRT_PRT1_BASE 0x40005110\r
-#define CYDEV_IO_PRT_PRT1_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT1_DR 0x40005110\r
-#define CYDEV_IO_PRT_PRT1_PS 0x40005111\r
-#define CYDEV_IO_PRT_PRT1_DM0 0x40005112\r
-#define CYDEV_IO_PRT_PRT1_DM1 0x40005113\r
-#define CYDEV_IO_PRT_PRT1_DM2 0x40005114\r
-#define CYDEV_IO_PRT_PRT1_SLW 0x40005115\r
-#define CYDEV_IO_PRT_PRT1_BYP 0x40005116\r
-#define CYDEV_IO_PRT_PRT1_BIE 0x40005117\r
-#define CYDEV_IO_PRT_PRT1_INP_DIS 0x40005118\r
-#define CYDEV_IO_PRT_PRT1_CTL 0x40005119\r
-#define CYDEV_IO_PRT_PRT1_PRT 0x4000511a\r
-#define CYDEV_IO_PRT_PRT1_BIT_MASK 0x4000511b\r
-#define CYDEV_IO_PRT_PRT1_AMUX 0x4000511c\r
-#define CYDEV_IO_PRT_PRT1_AG 0x4000511d\r
-#define CYDEV_IO_PRT_PRT1_LCD_COM_SEG 0x4000511e\r
-#define CYDEV_IO_PRT_PRT1_LCD_EN 0x4000511f\r
-#define CYDEV_IO_PRT_PRT2_BASE 0x40005120\r
-#define CYDEV_IO_PRT_PRT2_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT2_DR 0x40005120\r
-#define CYDEV_IO_PRT_PRT2_PS 0x40005121\r
-#define CYDEV_IO_PRT_PRT2_DM0 0x40005122\r
-#define CYDEV_IO_PRT_PRT2_DM1 0x40005123\r
-#define CYDEV_IO_PRT_PRT2_DM2 0x40005124\r
-#define CYDEV_IO_PRT_PRT2_SLW 0x40005125\r
-#define CYDEV_IO_PRT_PRT2_BYP 0x40005126\r
-#define CYDEV_IO_PRT_PRT2_BIE 0x40005127\r
-#define CYDEV_IO_PRT_PRT2_INP_DIS 0x40005128\r
-#define CYDEV_IO_PRT_PRT2_CTL 0x40005129\r
-#define CYDEV_IO_PRT_PRT2_PRT 0x4000512a\r
-#define CYDEV_IO_PRT_PRT2_BIT_MASK 0x4000512b\r
-#define CYDEV_IO_PRT_PRT2_AMUX 0x4000512c\r
-#define CYDEV_IO_PRT_PRT2_AG 0x4000512d\r
-#define CYDEV_IO_PRT_PRT2_LCD_COM_SEG 0x4000512e\r
-#define CYDEV_IO_PRT_PRT2_LCD_EN 0x4000512f\r
-#define CYDEV_IO_PRT_PRT3_BASE 0x40005130\r
-#define CYDEV_IO_PRT_PRT3_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT3_DR 0x40005130\r
-#define CYDEV_IO_PRT_PRT3_PS 0x40005131\r
-#define CYDEV_IO_PRT_PRT3_DM0 0x40005132\r
-#define CYDEV_IO_PRT_PRT3_DM1 0x40005133\r
-#define CYDEV_IO_PRT_PRT3_DM2 0x40005134\r
-#define CYDEV_IO_PRT_PRT3_SLW 0x40005135\r
-#define CYDEV_IO_PRT_PRT3_BYP 0x40005136\r
-#define CYDEV_IO_PRT_PRT3_BIE 0x40005137\r
-#define CYDEV_IO_PRT_PRT3_INP_DIS 0x40005138\r
-#define CYDEV_IO_PRT_PRT3_CTL 0x40005139\r
-#define CYDEV_IO_PRT_PRT3_PRT 0x4000513a\r
-#define CYDEV_IO_PRT_PRT3_BIT_MASK 0x4000513b\r
-#define CYDEV_IO_PRT_PRT3_AMUX 0x4000513c\r
-#define CYDEV_IO_PRT_PRT3_AG 0x4000513d\r
-#define CYDEV_IO_PRT_PRT3_LCD_COM_SEG 0x4000513e\r
-#define CYDEV_IO_PRT_PRT3_LCD_EN 0x4000513f\r
-#define CYDEV_IO_PRT_PRT4_BASE 0x40005140\r
-#define CYDEV_IO_PRT_PRT4_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT4_DR 0x40005140\r
-#define CYDEV_IO_PRT_PRT4_PS 0x40005141\r
-#define CYDEV_IO_PRT_PRT4_DM0 0x40005142\r
-#define CYDEV_IO_PRT_PRT4_DM1 0x40005143\r
-#define CYDEV_IO_PRT_PRT4_DM2 0x40005144\r
-#define CYDEV_IO_PRT_PRT4_SLW 0x40005145\r
-#define CYDEV_IO_PRT_PRT4_BYP 0x40005146\r
-#define CYDEV_IO_PRT_PRT4_BIE 0x40005147\r
-#define CYDEV_IO_PRT_PRT4_INP_DIS 0x40005148\r
-#define CYDEV_IO_PRT_PRT4_CTL 0x40005149\r
-#define CYDEV_IO_PRT_PRT4_PRT 0x4000514a\r
-#define CYDEV_IO_PRT_PRT4_BIT_MASK 0x4000514b\r
-#define CYDEV_IO_PRT_PRT4_AMUX 0x4000514c\r
-#define CYDEV_IO_PRT_PRT4_AG 0x4000514d\r
-#define CYDEV_IO_PRT_PRT4_LCD_COM_SEG 0x4000514e\r
-#define CYDEV_IO_PRT_PRT4_LCD_EN 0x4000514f\r
-#define CYDEV_IO_PRT_PRT5_BASE 0x40005150\r
-#define CYDEV_IO_PRT_PRT5_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT5_DR 0x40005150\r
-#define CYDEV_IO_PRT_PRT5_PS 0x40005151\r
-#define CYDEV_IO_PRT_PRT5_DM0 0x40005152\r
-#define CYDEV_IO_PRT_PRT5_DM1 0x40005153\r
-#define CYDEV_IO_PRT_PRT5_DM2 0x40005154\r
-#define CYDEV_IO_PRT_PRT5_SLW 0x40005155\r
-#define CYDEV_IO_PRT_PRT5_BYP 0x40005156\r
-#define CYDEV_IO_PRT_PRT5_BIE 0x40005157\r
-#define CYDEV_IO_PRT_PRT5_INP_DIS 0x40005158\r
-#define CYDEV_IO_PRT_PRT5_CTL 0x40005159\r
-#define CYDEV_IO_PRT_PRT5_PRT 0x4000515a\r
-#define CYDEV_IO_PRT_PRT5_BIT_MASK 0x4000515b\r
-#define CYDEV_IO_PRT_PRT5_AMUX 0x4000515c\r
-#define CYDEV_IO_PRT_PRT5_AG 0x4000515d\r
-#define CYDEV_IO_PRT_PRT5_LCD_COM_SEG 0x4000515e\r
-#define CYDEV_IO_PRT_PRT5_LCD_EN 0x4000515f\r
-#define CYDEV_IO_PRT_PRT6_BASE 0x40005160\r
-#define CYDEV_IO_PRT_PRT6_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT6_DR 0x40005160\r
-#define CYDEV_IO_PRT_PRT6_PS 0x40005161\r
-#define CYDEV_IO_PRT_PRT6_DM0 0x40005162\r
-#define CYDEV_IO_PRT_PRT6_DM1 0x40005163\r
-#define CYDEV_IO_PRT_PRT6_DM2 0x40005164\r
-#define CYDEV_IO_PRT_PRT6_SLW 0x40005165\r
-#define CYDEV_IO_PRT_PRT6_BYP 0x40005166\r
-#define CYDEV_IO_PRT_PRT6_BIE 0x40005167\r
-#define CYDEV_IO_PRT_PRT6_INP_DIS 0x40005168\r
-#define CYDEV_IO_PRT_PRT6_CTL 0x40005169\r
-#define CYDEV_IO_PRT_PRT6_PRT 0x4000516a\r
-#define CYDEV_IO_PRT_PRT6_BIT_MASK 0x4000516b\r
-#define CYDEV_IO_PRT_PRT6_AMUX 0x4000516c\r
-#define CYDEV_IO_PRT_PRT6_AG 0x4000516d\r
-#define CYDEV_IO_PRT_PRT6_LCD_COM_SEG 0x4000516e\r
-#define CYDEV_IO_PRT_PRT6_LCD_EN 0x4000516f\r
-#define CYDEV_IO_PRT_PRT12_BASE 0x400051c0\r
-#define CYDEV_IO_PRT_PRT12_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT12_DR 0x400051c0\r
-#define CYDEV_IO_PRT_PRT12_PS 0x400051c1\r
-#define CYDEV_IO_PRT_PRT12_DM0 0x400051c2\r
-#define CYDEV_IO_PRT_PRT12_DM1 0x400051c3\r
-#define CYDEV_IO_PRT_PRT12_DM2 0x400051c4\r
-#define CYDEV_IO_PRT_PRT12_SLW 0x400051c5\r
-#define CYDEV_IO_PRT_PRT12_BYP 0x400051c6\r
-#define CYDEV_IO_PRT_PRT12_BIE 0x400051c7\r
-#define CYDEV_IO_PRT_PRT12_INP_DIS 0x400051c8\r
-#define CYDEV_IO_PRT_PRT12_SIO_HYST_EN 0x400051c9\r
-#define CYDEV_IO_PRT_PRT12_PRT 0x400051ca\r
-#define CYDEV_IO_PRT_PRT12_BIT_MASK 0x400051cb\r
-#define CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ 0x400051cc\r
-#define CYDEV_IO_PRT_PRT12_AG 0x400051cd\r
-#define CYDEV_IO_PRT_PRT12_SIO_CFG 0x400051ce\r
-#define CYDEV_IO_PRT_PRT12_SIO_DIFF 0x400051cf\r
-#define CYDEV_IO_PRT_PRT15_BASE 0x400051f0\r
-#define CYDEV_IO_PRT_PRT15_SIZE 0x00000010\r
-#define CYDEV_IO_PRT_PRT15_DR 0x400051f0\r
-#define CYDEV_IO_PRT_PRT15_PS 0x400051f1\r
-#define CYDEV_IO_PRT_PRT15_DM0 0x400051f2\r
-#define CYDEV_IO_PRT_PRT15_DM1 0x400051f3\r
-#define CYDEV_IO_PRT_PRT15_DM2 0x400051f4\r
-#define CYDEV_IO_PRT_PRT15_SLW 0x400051f5\r
-#define CYDEV_IO_PRT_PRT15_BYP 0x400051f6\r
-#define CYDEV_IO_PRT_PRT15_BIE 0x400051f7\r
-#define CYDEV_IO_PRT_PRT15_INP_DIS 0x400051f8\r
-#define CYDEV_IO_PRT_PRT15_CTL 0x400051f9\r
-#define CYDEV_IO_PRT_PRT15_PRT 0x400051fa\r
-#define CYDEV_IO_PRT_PRT15_BIT_MASK 0x400051fb\r
-#define CYDEV_IO_PRT_PRT15_AMUX 0x400051fc\r
-#define CYDEV_IO_PRT_PRT15_AG 0x400051fd\r
-#define CYDEV_IO_PRT_PRT15_LCD_COM_SEG 0x400051fe\r
-#define CYDEV_IO_PRT_PRT15_LCD_EN 0x400051ff\r
-#define CYDEV_PRTDSI_BASE 0x40005200\r
-#define CYDEV_PRTDSI_SIZE 0x0000007f\r
-#define CYDEV_PRTDSI_PRT0_BASE 0x40005200\r
-#define CYDEV_PRTDSI_PRT0_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT0_OUT_SEL0 0x40005200\r
-#define CYDEV_PRTDSI_PRT0_OUT_SEL1 0x40005201\r
-#define CYDEV_PRTDSI_PRT0_OE_SEL0 0x40005202\r
-#define CYDEV_PRTDSI_PRT0_OE_SEL1 0x40005203\r
-#define CYDEV_PRTDSI_PRT0_DBL_SYNC_IN 0x40005204\r
-#define CYDEV_PRTDSI_PRT0_SYNC_OUT 0x40005205\r
-#define CYDEV_PRTDSI_PRT0_CAPS_SEL 0x40005206\r
-#define CYDEV_PRTDSI_PRT1_BASE 0x40005208\r
-#define CYDEV_PRTDSI_PRT1_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT1_OUT_SEL0 0x40005208\r
-#define CYDEV_PRTDSI_PRT1_OUT_SEL1 0x40005209\r
-#define CYDEV_PRTDSI_PRT1_OE_SEL0 0x4000520a\r
-#define CYDEV_PRTDSI_PRT1_OE_SEL1 0x4000520b\r
-#define CYDEV_PRTDSI_PRT1_DBL_SYNC_IN 0x4000520c\r
-#define CYDEV_PRTDSI_PRT1_SYNC_OUT 0x4000520d\r
-#define CYDEV_PRTDSI_PRT1_CAPS_SEL 0x4000520e\r
-#define CYDEV_PRTDSI_PRT2_BASE 0x40005210\r
-#define CYDEV_PRTDSI_PRT2_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT2_OUT_SEL0 0x40005210\r
-#define CYDEV_PRTDSI_PRT2_OUT_SEL1 0x40005211\r
-#define CYDEV_PRTDSI_PRT2_OE_SEL0 0x40005212\r
-#define CYDEV_PRTDSI_PRT2_OE_SEL1 0x40005213\r
-#define CYDEV_PRTDSI_PRT2_DBL_SYNC_IN 0x40005214\r
-#define CYDEV_PRTDSI_PRT2_SYNC_OUT 0x40005215\r
-#define CYDEV_PRTDSI_PRT2_CAPS_SEL 0x40005216\r
-#define CYDEV_PRTDSI_PRT3_BASE 0x40005218\r
-#define CYDEV_PRTDSI_PRT3_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT3_OUT_SEL0 0x40005218\r
-#define CYDEV_PRTDSI_PRT3_OUT_SEL1 0x40005219\r
-#define CYDEV_PRTDSI_PRT3_OE_SEL0 0x4000521a\r
-#define CYDEV_PRTDSI_PRT3_OE_SEL1 0x4000521b\r
-#define CYDEV_PRTDSI_PRT3_DBL_SYNC_IN 0x4000521c\r
-#define CYDEV_PRTDSI_PRT3_SYNC_OUT 0x4000521d\r
-#define CYDEV_PRTDSI_PRT3_CAPS_SEL 0x4000521e\r
-#define CYDEV_PRTDSI_PRT4_BASE 0x40005220\r
-#define CYDEV_PRTDSI_PRT4_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT4_OUT_SEL0 0x40005220\r
-#define CYDEV_PRTDSI_PRT4_OUT_SEL1 0x40005221\r
-#define CYDEV_PRTDSI_PRT4_OE_SEL0 0x40005222\r
-#define CYDEV_PRTDSI_PRT4_OE_SEL1 0x40005223\r
-#define CYDEV_PRTDSI_PRT4_DBL_SYNC_IN 0x40005224\r
-#define CYDEV_PRTDSI_PRT4_SYNC_OUT 0x40005225\r
-#define CYDEV_PRTDSI_PRT4_CAPS_SEL 0x40005226\r
-#define CYDEV_PRTDSI_PRT5_BASE 0x40005228\r
-#define CYDEV_PRTDSI_PRT5_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT5_OUT_SEL0 0x40005228\r
-#define CYDEV_PRTDSI_PRT5_OUT_SEL1 0x40005229\r
-#define CYDEV_PRTDSI_PRT5_OE_SEL0 0x4000522a\r
-#define CYDEV_PRTDSI_PRT5_OE_SEL1 0x4000522b\r
-#define CYDEV_PRTDSI_PRT5_DBL_SYNC_IN 0x4000522c\r
-#define CYDEV_PRTDSI_PRT5_SYNC_OUT 0x4000522d\r
-#define CYDEV_PRTDSI_PRT5_CAPS_SEL 0x4000522e\r
-#define CYDEV_PRTDSI_PRT6_BASE 0x40005230\r
-#define CYDEV_PRTDSI_PRT6_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT6_OUT_SEL0 0x40005230\r
-#define CYDEV_PRTDSI_PRT6_OUT_SEL1 0x40005231\r
-#define CYDEV_PRTDSI_PRT6_OE_SEL0 0x40005232\r
-#define CYDEV_PRTDSI_PRT6_OE_SEL1 0x40005233\r
-#define CYDEV_PRTDSI_PRT6_DBL_SYNC_IN 0x40005234\r
-#define CYDEV_PRTDSI_PRT6_SYNC_OUT 0x40005235\r
-#define CYDEV_PRTDSI_PRT6_CAPS_SEL 0x40005236\r
-#define CYDEV_PRTDSI_PRT12_BASE 0x40005260\r
-#define CYDEV_PRTDSI_PRT12_SIZE 0x00000006\r
-#define CYDEV_PRTDSI_PRT12_OUT_SEL0 0x40005260\r
-#define CYDEV_PRTDSI_PRT12_OUT_SEL1 0x40005261\r
-#define CYDEV_PRTDSI_PRT12_OE_SEL0 0x40005262\r
-#define CYDEV_PRTDSI_PRT12_OE_SEL1 0x40005263\r
-#define CYDEV_PRTDSI_PRT12_DBL_SYNC_IN 0x40005264\r
-#define CYDEV_PRTDSI_PRT12_SYNC_OUT 0x40005265\r
-#define CYDEV_PRTDSI_PRT15_BASE 0x40005278\r
-#define CYDEV_PRTDSI_PRT15_SIZE 0x00000007\r
-#define CYDEV_PRTDSI_PRT15_OUT_SEL0 0x40005278\r
-#define CYDEV_PRTDSI_PRT15_OUT_SEL1 0x40005279\r
-#define CYDEV_PRTDSI_PRT15_OE_SEL0 0x4000527a\r
-#define CYDEV_PRTDSI_PRT15_OE_SEL1 0x4000527b\r
-#define CYDEV_PRTDSI_PRT15_DBL_SYNC_IN 0x4000527c\r
-#define CYDEV_PRTDSI_PRT15_SYNC_OUT 0x4000527d\r
-#define CYDEV_PRTDSI_PRT15_CAPS_SEL 0x4000527e\r
-#define CYDEV_EMIF_BASE 0x40005400\r
-#define CYDEV_EMIF_SIZE 0x00000007\r
-#define CYDEV_EMIF_NO_UDB 0x40005400\r
-#define CYDEV_EMIF_RP_WAIT_STATES 0x40005401\r
-#define CYDEV_EMIF_MEM_DWN 0x40005402\r
-#define CYDEV_EMIF_MEMCLK_DIV 0x40005403\r
-#define CYDEV_EMIF_CLOCK_EN 0x40005404\r
-#define CYDEV_EMIF_EM_TYPE 0x40005405\r
-#define CYDEV_EMIF_WP_WAIT_STATES 0x40005406\r
-#define CYDEV_ANAIF_BASE 0x40005800\r
-#define CYDEV_ANAIF_SIZE 0x000003a9\r
-#define CYDEV_ANAIF_CFG_BASE 0x40005800\r
-#define CYDEV_ANAIF_CFG_SIZE 0x0000010f\r
-#define CYDEV_ANAIF_CFG_SC0_BASE 0x40005800\r
-#define CYDEV_ANAIF_CFG_SC0_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_SC0_CR0 0x40005800\r
-#define CYDEV_ANAIF_CFG_SC0_CR1 0x40005801\r
-#define CYDEV_ANAIF_CFG_SC0_CR2 0x40005802\r
-#define CYDEV_ANAIF_CFG_SC1_BASE 0x40005804\r
-#define CYDEV_ANAIF_CFG_SC1_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_SC1_CR0 0x40005804\r
-#define CYDEV_ANAIF_CFG_SC1_CR1 0x40005805\r
-#define CYDEV_ANAIF_CFG_SC1_CR2 0x40005806\r
-#define CYDEV_ANAIF_CFG_SC2_BASE 0x40005808\r
-#define CYDEV_ANAIF_CFG_SC2_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_SC2_CR0 0x40005808\r
-#define CYDEV_ANAIF_CFG_SC2_CR1 0x40005809\r
-#define CYDEV_ANAIF_CFG_SC2_CR2 0x4000580a\r
-#define CYDEV_ANAIF_CFG_SC3_BASE 0x4000580c\r
-#define CYDEV_ANAIF_CFG_SC3_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_SC3_CR0 0x4000580c\r
-#define CYDEV_ANAIF_CFG_SC3_CR1 0x4000580d\r
-#define CYDEV_ANAIF_CFG_SC3_CR2 0x4000580e\r
-#define CYDEV_ANAIF_CFG_DAC0_BASE 0x40005820\r
-#define CYDEV_ANAIF_CFG_DAC0_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_DAC0_CR0 0x40005820\r
-#define CYDEV_ANAIF_CFG_DAC0_CR1 0x40005821\r
-#define CYDEV_ANAIF_CFG_DAC0_TST 0x40005822\r
-#define CYDEV_ANAIF_CFG_DAC1_BASE 0x40005824\r
-#define CYDEV_ANAIF_CFG_DAC1_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_DAC1_CR0 0x40005824\r
-#define CYDEV_ANAIF_CFG_DAC1_CR1 0x40005825\r
-#define CYDEV_ANAIF_CFG_DAC1_TST 0x40005826\r
-#define CYDEV_ANAIF_CFG_DAC2_BASE 0x40005828\r
-#define CYDEV_ANAIF_CFG_DAC2_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_DAC2_CR0 0x40005828\r
-#define CYDEV_ANAIF_CFG_DAC2_CR1 0x40005829\r
-#define CYDEV_ANAIF_CFG_DAC2_TST 0x4000582a\r
-#define CYDEV_ANAIF_CFG_DAC3_BASE 0x4000582c\r
-#define CYDEV_ANAIF_CFG_DAC3_SIZE 0x00000003\r
-#define CYDEV_ANAIF_CFG_DAC3_CR0 0x4000582c\r
-#define CYDEV_ANAIF_CFG_DAC3_CR1 0x4000582d\r
-#define CYDEV_ANAIF_CFG_DAC3_TST 0x4000582e\r
-#define CYDEV_ANAIF_CFG_CMP0_BASE 0x40005840\r
-#define CYDEV_ANAIF_CFG_CMP0_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_CMP0_CR 0x40005840\r
-#define CYDEV_ANAIF_CFG_CMP1_BASE 0x40005841\r
-#define CYDEV_ANAIF_CFG_CMP1_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_CMP1_CR 0x40005841\r
-#define CYDEV_ANAIF_CFG_CMP2_BASE 0x40005842\r
-#define CYDEV_ANAIF_CFG_CMP2_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_CMP2_CR 0x40005842\r
-#define CYDEV_ANAIF_CFG_CMP3_BASE 0x40005843\r
-#define CYDEV_ANAIF_CFG_CMP3_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_CMP3_CR 0x40005843\r
-#define CYDEV_ANAIF_CFG_LUT0_BASE 0x40005848\r
-#define CYDEV_ANAIF_CFG_LUT0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LUT0_CR 0x40005848\r
-#define CYDEV_ANAIF_CFG_LUT0_MX 0x40005849\r
-#define CYDEV_ANAIF_CFG_LUT1_BASE 0x4000584a\r
-#define CYDEV_ANAIF_CFG_LUT1_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LUT1_CR 0x4000584a\r
-#define CYDEV_ANAIF_CFG_LUT1_MX 0x4000584b\r
-#define CYDEV_ANAIF_CFG_LUT2_BASE 0x4000584c\r
-#define CYDEV_ANAIF_CFG_LUT2_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LUT2_CR 0x4000584c\r
-#define CYDEV_ANAIF_CFG_LUT2_MX 0x4000584d\r
-#define CYDEV_ANAIF_CFG_LUT3_BASE 0x4000584e\r
-#define CYDEV_ANAIF_CFG_LUT3_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LUT3_CR 0x4000584e\r
-#define CYDEV_ANAIF_CFG_LUT3_MX 0x4000584f\r
-#define CYDEV_ANAIF_CFG_OPAMP0_BASE 0x40005858\r
-#define CYDEV_ANAIF_CFG_OPAMP0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_OPAMP0_CR 0x40005858\r
-#define CYDEV_ANAIF_CFG_OPAMP0_RSVD 0x40005859\r
-#define CYDEV_ANAIF_CFG_OPAMP1_BASE 0x4000585a\r
-#define CYDEV_ANAIF_CFG_OPAMP1_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_OPAMP1_CR 0x4000585a\r
-#define CYDEV_ANAIF_CFG_OPAMP1_RSVD 0x4000585b\r
-#define CYDEV_ANAIF_CFG_OPAMP2_BASE 0x4000585c\r
-#define CYDEV_ANAIF_CFG_OPAMP2_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_OPAMP2_CR 0x4000585c\r
-#define CYDEV_ANAIF_CFG_OPAMP2_RSVD 0x4000585d\r
-#define CYDEV_ANAIF_CFG_OPAMP3_BASE 0x4000585e\r
-#define CYDEV_ANAIF_CFG_OPAMP3_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_OPAMP3_CR 0x4000585e\r
-#define CYDEV_ANAIF_CFG_OPAMP3_RSVD 0x4000585f\r
-#define CYDEV_ANAIF_CFG_LCDDAC_BASE 0x40005868\r
-#define CYDEV_ANAIF_CFG_LCDDAC_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LCDDAC_CR0 0x40005868\r
-#define CYDEV_ANAIF_CFG_LCDDAC_CR1 0x40005869\r
-#define CYDEV_ANAIF_CFG_LCDDRV_BASE 0x4000586a\r
-#define CYDEV_ANAIF_CFG_LCDDRV_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_LCDDRV_CR 0x4000586a\r
-#define CYDEV_ANAIF_CFG_LCDTMR_BASE 0x4000586b\r
-#define CYDEV_ANAIF_CFG_LCDTMR_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_LCDTMR_CFG 0x4000586b\r
-#define CYDEV_ANAIF_CFG_BG_BASE 0x4000586c\r
-#define CYDEV_ANAIF_CFG_BG_SIZE 0x00000004\r
-#define CYDEV_ANAIF_CFG_BG_CR0 0x4000586c\r
-#define CYDEV_ANAIF_CFG_BG_RSVD 0x4000586d\r
-#define CYDEV_ANAIF_CFG_BG_DFT0 0x4000586e\r
-#define CYDEV_ANAIF_CFG_BG_DFT1 0x4000586f\r
-#define CYDEV_ANAIF_CFG_CAPSL_BASE 0x40005870\r
-#define CYDEV_ANAIF_CFG_CAPSL_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_CAPSL_CFG0 0x40005870\r
-#define CYDEV_ANAIF_CFG_CAPSL_CFG1 0x40005871\r
-#define CYDEV_ANAIF_CFG_CAPSR_BASE 0x40005872\r
-#define CYDEV_ANAIF_CFG_CAPSR_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_CAPSR_CFG0 0x40005872\r
-#define CYDEV_ANAIF_CFG_CAPSR_CFG1 0x40005873\r
-#define CYDEV_ANAIF_CFG_PUMP_BASE 0x40005876\r
-#define CYDEV_ANAIF_CFG_PUMP_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_PUMP_CR0 0x40005876\r
-#define CYDEV_ANAIF_CFG_PUMP_CR1 0x40005877\r
-#define CYDEV_ANAIF_CFG_LPF0_BASE 0x40005878\r
-#define CYDEV_ANAIF_CFG_LPF0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LPF0_CR0 0x40005878\r
-#define CYDEV_ANAIF_CFG_LPF0_RSVD 0x40005879\r
-#define CYDEV_ANAIF_CFG_LPF1_BASE 0x4000587a\r
-#define CYDEV_ANAIF_CFG_LPF1_SIZE 0x00000002\r
-#define CYDEV_ANAIF_CFG_LPF1_CR0 0x4000587a\r
-#define CYDEV_ANAIF_CFG_LPF1_RSVD 0x4000587b\r
-#define CYDEV_ANAIF_CFG_MISC_BASE 0x4000587c\r
-#define CYDEV_ANAIF_CFG_MISC_SIZE 0x00000001\r
-#define CYDEV_ANAIF_CFG_MISC_CR0 0x4000587c\r
-#define CYDEV_ANAIF_CFG_DSM0_BASE 0x40005880\r
-#define CYDEV_ANAIF_CFG_DSM0_SIZE 0x00000020\r
-#define CYDEV_ANAIF_CFG_DSM0_CR0 0x40005880\r
-#define CYDEV_ANAIF_CFG_DSM0_CR1 0x40005881\r
-#define CYDEV_ANAIF_CFG_DSM0_CR2 0x40005882\r
-#define CYDEV_ANAIF_CFG_DSM0_CR3 0x40005883\r
-#define CYDEV_ANAIF_CFG_DSM0_CR4 0x40005884\r
-#define CYDEV_ANAIF_CFG_DSM0_CR5 0x40005885\r
-#define CYDEV_ANAIF_CFG_DSM0_CR6 0x40005886\r
-#define CYDEV_ANAIF_CFG_DSM0_CR7 0x40005887\r
-#define CYDEV_ANAIF_CFG_DSM0_CR8 0x40005888\r
-#define CYDEV_ANAIF_CFG_DSM0_CR9 0x40005889\r
-#define CYDEV_ANAIF_CFG_DSM0_CR10 0x4000588a\r
-#define CYDEV_ANAIF_CFG_DSM0_CR11 0x4000588b\r
-#define CYDEV_ANAIF_CFG_DSM0_CR12 0x4000588c\r
-#define CYDEV_ANAIF_CFG_DSM0_CR13 0x4000588d\r
-#define CYDEV_ANAIF_CFG_DSM0_CR14 0x4000588e\r
-#define CYDEV_ANAIF_CFG_DSM0_CR15 0x4000588f\r
-#define CYDEV_ANAIF_CFG_DSM0_CR16 0x40005890\r
-#define CYDEV_ANAIF_CFG_DSM0_CR17 0x40005891\r
-#define CYDEV_ANAIF_CFG_DSM0_REF0 0x40005892\r
-#define CYDEV_ANAIF_CFG_DSM0_REF1 0x40005893\r
-#define CYDEV_ANAIF_CFG_DSM0_REF2 0x40005894\r
-#define CYDEV_ANAIF_CFG_DSM0_REF3 0x40005895\r
-#define CYDEV_ANAIF_CFG_DSM0_DEM0 0x40005896\r
-#define CYDEV_ANAIF_CFG_DSM0_DEM1 0x40005897\r
-#define CYDEV_ANAIF_CFG_DSM0_TST0 0x40005898\r
-#define CYDEV_ANAIF_CFG_DSM0_TST1 0x40005899\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF0 0x4000589a\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF1 0x4000589b\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF2 0x4000589c\r
-#define CYDEV_ANAIF_CFG_DSM0_BUF3 0x4000589d\r
-#define CYDEV_ANAIF_CFG_DSM0_MISC 0x4000589e\r
-#define CYDEV_ANAIF_CFG_DSM0_RSVD1 0x4000589f\r
-#define CYDEV_ANAIF_CFG_SAR0_BASE 0x40005900\r
-#define CYDEV_ANAIF_CFG_SAR0_SIZE 0x00000007\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR0 0x40005900\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR1 0x40005901\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR2 0x40005902\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR3 0x40005903\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR4 0x40005904\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR5 0x40005905\r
-#define CYDEV_ANAIF_CFG_SAR0_CSR6 0x40005906\r
-#define CYDEV_ANAIF_CFG_SAR1_BASE 0x40005908\r
-#define CYDEV_ANAIF_CFG_SAR1_SIZE 0x00000007\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR0 0x40005908\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR1 0x40005909\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR2 0x4000590a\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR3 0x4000590b\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR4 0x4000590c\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR5 0x4000590d\r
-#define CYDEV_ANAIF_CFG_SAR1_CSR6 0x4000590e\r
-#define CYDEV_ANAIF_RT_BASE 0x40005a00\r
-#define CYDEV_ANAIF_RT_SIZE 0x00000162\r
-#define CYDEV_ANAIF_RT_SC0_BASE 0x40005a00\r
-#define CYDEV_ANAIF_RT_SC0_SIZE 0x0000000d\r
-#define CYDEV_ANAIF_RT_SC0_SW0 0x40005a00\r
-#define CYDEV_ANAIF_RT_SC0_SW2 0x40005a02\r
-#define CYDEV_ANAIF_RT_SC0_SW3 0x40005a03\r
-#define CYDEV_ANAIF_RT_SC0_SW4 0x40005a04\r
-#define CYDEV_ANAIF_RT_SC0_SW6 0x40005a06\r
-#define CYDEV_ANAIF_RT_SC0_SW7 0x40005a07\r
-#define CYDEV_ANAIF_RT_SC0_SW8 0x40005a08\r
-#define CYDEV_ANAIF_RT_SC0_SW10 0x40005a0a\r
-#define CYDEV_ANAIF_RT_SC0_CLK 0x40005a0b\r
-#define CYDEV_ANAIF_RT_SC0_BST 0x40005a0c\r
-#define CYDEV_ANAIF_RT_SC1_BASE 0x40005a10\r
-#define CYDEV_ANAIF_RT_SC1_SIZE 0x0000000d\r
-#define CYDEV_ANAIF_RT_SC1_SW0 0x40005a10\r
-#define CYDEV_ANAIF_RT_SC1_SW2 0x40005a12\r
-#define CYDEV_ANAIF_RT_SC1_SW3 0x40005a13\r
-#define CYDEV_ANAIF_RT_SC1_SW4 0x40005a14\r
-#define CYDEV_ANAIF_RT_SC1_SW6 0x40005a16\r
-#define CYDEV_ANAIF_RT_SC1_SW7 0x40005a17\r
-#define CYDEV_ANAIF_RT_SC1_SW8 0x40005a18\r
-#define CYDEV_ANAIF_RT_SC1_SW10 0x40005a1a\r
-#define CYDEV_ANAIF_RT_SC1_CLK 0x40005a1b\r
-#define CYDEV_ANAIF_RT_SC1_BST 0x40005a1c\r
-#define CYDEV_ANAIF_RT_SC2_BASE 0x40005a20\r
-#define CYDEV_ANAIF_RT_SC2_SIZE 0x0000000d\r
-#define CYDEV_ANAIF_RT_SC2_SW0 0x40005a20\r
-#define CYDEV_ANAIF_RT_SC2_SW2 0x40005a22\r
-#define CYDEV_ANAIF_RT_SC2_SW3 0x40005a23\r
-#define CYDEV_ANAIF_RT_SC2_SW4 0x40005a24\r
-#define CYDEV_ANAIF_RT_SC2_SW6 0x40005a26\r
-#define CYDEV_ANAIF_RT_SC2_SW7 0x40005a27\r
-#define CYDEV_ANAIF_RT_SC2_SW8 0x40005a28\r
-#define CYDEV_ANAIF_RT_SC2_SW10 0x40005a2a\r
-#define CYDEV_ANAIF_RT_SC2_CLK 0x40005a2b\r
-#define CYDEV_ANAIF_RT_SC2_BST 0x40005a2c\r
-#define CYDEV_ANAIF_RT_SC3_BASE 0x40005a30\r
-#define CYDEV_ANAIF_RT_SC3_SIZE 0x0000000d\r
-#define CYDEV_ANAIF_RT_SC3_SW0 0x40005a30\r
-#define CYDEV_ANAIF_RT_SC3_SW2 0x40005a32\r
-#define CYDEV_ANAIF_RT_SC3_SW3 0x40005a33\r
-#define CYDEV_ANAIF_RT_SC3_SW4 0x40005a34\r
-#define CYDEV_ANAIF_RT_SC3_SW6 0x40005a36\r
-#define CYDEV_ANAIF_RT_SC3_SW7 0x40005a37\r
-#define CYDEV_ANAIF_RT_SC3_SW8 0x40005a38\r
-#define CYDEV_ANAIF_RT_SC3_SW10 0x40005a3a\r
-#define CYDEV_ANAIF_RT_SC3_CLK 0x40005a3b\r
-#define CYDEV_ANAIF_RT_SC3_BST 0x40005a3c\r
-#define CYDEV_ANAIF_RT_DAC0_BASE 0x40005a80\r
-#define CYDEV_ANAIF_RT_DAC0_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_DAC0_SW0 0x40005a80\r
-#define CYDEV_ANAIF_RT_DAC0_SW2 0x40005a82\r
-#define CYDEV_ANAIF_RT_DAC0_SW3 0x40005a83\r
-#define CYDEV_ANAIF_RT_DAC0_SW4 0x40005a84\r
-#define CYDEV_ANAIF_RT_DAC0_STROBE 0x40005a87\r
-#define CYDEV_ANAIF_RT_DAC1_BASE 0x40005a88\r
-#define CYDEV_ANAIF_RT_DAC1_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_DAC1_SW0 0x40005a88\r
-#define CYDEV_ANAIF_RT_DAC1_SW2 0x40005a8a\r
-#define CYDEV_ANAIF_RT_DAC1_SW3 0x40005a8b\r
-#define CYDEV_ANAIF_RT_DAC1_SW4 0x40005a8c\r
-#define CYDEV_ANAIF_RT_DAC1_STROBE 0x40005a8f\r
-#define CYDEV_ANAIF_RT_DAC2_BASE 0x40005a90\r
-#define CYDEV_ANAIF_RT_DAC2_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_DAC2_SW0 0x40005a90\r
-#define CYDEV_ANAIF_RT_DAC2_SW2 0x40005a92\r
-#define CYDEV_ANAIF_RT_DAC2_SW3 0x40005a93\r
-#define CYDEV_ANAIF_RT_DAC2_SW4 0x40005a94\r
-#define CYDEV_ANAIF_RT_DAC2_STROBE 0x40005a97\r
-#define CYDEV_ANAIF_RT_DAC3_BASE 0x40005a98\r
-#define CYDEV_ANAIF_RT_DAC3_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_DAC3_SW0 0x40005a98\r
-#define CYDEV_ANAIF_RT_DAC3_SW2 0x40005a9a\r
-#define CYDEV_ANAIF_RT_DAC3_SW3 0x40005a9b\r
-#define CYDEV_ANAIF_RT_DAC3_SW4 0x40005a9c\r
-#define CYDEV_ANAIF_RT_DAC3_STROBE 0x40005a9f\r
-#define CYDEV_ANAIF_RT_CMP0_BASE 0x40005ac0\r
-#define CYDEV_ANAIF_RT_CMP0_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_CMP0_SW0 0x40005ac0\r
-#define CYDEV_ANAIF_RT_CMP0_SW2 0x40005ac2\r
-#define CYDEV_ANAIF_RT_CMP0_SW3 0x40005ac3\r
-#define CYDEV_ANAIF_RT_CMP0_SW4 0x40005ac4\r
-#define CYDEV_ANAIF_RT_CMP0_SW6 0x40005ac6\r
-#define CYDEV_ANAIF_RT_CMP0_CLK 0x40005ac7\r
-#define CYDEV_ANAIF_RT_CMP1_BASE 0x40005ac8\r
-#define CYDEV_ANAIF_RT_CMP1_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_CMP1_SW0 0x40005ac8\r
-#define CYDEV_ANAIF_RT_CMP1_SW2 0x40005aca\r
-#define CYDEV_ANAIF_RT_CMP1_SW3 0x40005acb\r
-#define CYDEV_ANAIF_RT_CMP1_SW4 0x40005acc\r
-#define CYDEV_ANAIF_RT_CMP1_SW6 0x40005ace\r
-#define CYDEV_ANAIF_RT_CMP1_CLK 0x40005acf\r
-#define CYDEV_ANAIF_RT_CMP2_BASE 0x40005ad0\r
-#define CYDEV_ANAIF_RT_CMP2_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_CMP2_SW0 0x40005ad0\r
-#define CYDEV_ANAIF_RT_CMP2_SW2 0x40005ad2\r
-#define CYDEV_ANAIF_RT_CMP2_SW3 0x40005ad3\r
-#define CYDEV_ANAIF_RT_CMP2_SW4 0x40005ad4\r
-#define CYDEV_ANAIF_RT_CMP2_SW6 0x40005ad6\r
-#define CYDEV_ANAIF_RT_CMP2_CLK 0x40005ad7\r
-#define CYDEV_ANAIF_RT_CMP3_BASE 0x40005ad8\r
-#define CYDEV_ANAIF_RT_CMP3_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_CMP3_SW0 0x40005ad8\r
-#define CYDEV_ANAIF_RT_CMP3_SW2 0x40005ada\r
-#define CYDEV_ANAIF_RT_CMP3_SW3 0x40005adb\r
-#define CYDEV_ANAIF_RT_CMP3_SW4 0x40005adc\r
-#define CYDEV_ANAIF_RT_CMP3_SW6 0x40005ade\r
-#define CYDEV_ANAIF_RT_CMP3_CLK 0x40005adf\r
-#define CYDEV_ANAIF_RT_DSM0_BASE 0x40005b00\r
-#define CYDEV_ANAIF_RT_DSM0_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_DSM0_SW0 0x40005b00\r
-#define CYDEV_ANAIF_RT_DSM0_SW2 0x40005b02\r
-#define CYDEV_ANAIF_RT_DSM0_SW3 0x40005b03\r
-#define CYDEV_ANAIF_RT_DSM0_SW4 0x40005b04\r
-#define CYDEV_ANAIF_RT_DSM0_SW6 0x40005b06\r
-#define CYDEV_ANAIF_RT_DSM0_CLK 0x40005b07\r
-#define CYDEV_ANAIF_RT_SAR0_BASE 0x40005b20\r
-#define CYDEV_ANAIF_RT_SAR0_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_SAR0_SW0 0x40005b20\r
-#define CYDEV_ANAIF_RT_SAR0_SW2 0x40005b22\r
-#define CYDEV_ANAIF_RT_SAR0_SW3 0x40005b23\r
-#define CYDEV_ANAIF_RT_SAR0_SW4 0x40005b24\r
-#define CYDEV_ANAIF_RT_SAR0_SW6 0x40005b26\r
-#define CYDEV_ANAIF_RT_SAR0_CLK 0x40005b27\r
-#define CYDEV_ANAIF_RT_SAR1_BASE 0x40005b28\r
-#define CYDEV_ANAIF_RT_SAR1_SIZE 0x00000008\r
-#define CYDEV_ANAIF_RT_SAR1_SW0 0x40005b28\r
-#define CYDEV_ANAIF_RT_SAR1_SW2 0x40005b2a\r
-#define CYDEV_ANAIF_RT_SAR1_SW3 0x40005b2b\r
-#define CYDEV_ANAIF_RT_SAR1_SW4 0x40005b2c\r
-#define CYDEV_ANAIF_RT_SAR1_SW6 0x40005b2e\r
-#define CYDEV_ANAIF_RT_SAR1_CLK 0x40005b2f\r
-#define CYDEV_ANAIF_RT_OPAMP0_BASE 0x40005b40\r
-#define CYDEV_ANAIF_RT_OPAMP0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_RT_OPAMP0_MX 0x40005b40\r
-#define CYDEV_ANAIF_RT_OPAMP0_SW 0x40005b41\r
-#define CYDEV_ANAIF_RT_OPAMP1_BASE 0x40005b42\r
-#define CYDEV_ANAIF_RT_OPAMP1_SIZE 0x00000002\r
-#define CYDEV_ANAIF_RT_OPAMP1_MX 0x40005b42\r
-#define CYDEV_ANAIF_RT_OPAMP1_SW 0x40005b43\r
-#define CYDEV_ANAIF_RT_OPAMP2_BASE 0x40005b44\r
-#define CYDEV_ANAIF_RT_OPAMP2_SIZE 0x00000002\r
-#define CYDEV_ANAIF_RT_OPAMP2_MX 0x40005b44\r
-#define CYDEV_ANAIF_RT_OPAMP2_SW 0x40005b45\r
-#define CYDEV_ANAIF_RT_OPAMP3_BASE 0x40005b46\r
-#define CYDEV_ANAIF_RT_OPAMP3_SIZE 0x00000002\r
-#define CYDEV_ANAIF_RT_OPAMP3_MX 0x40005b46\r
-#define CYDEV_ANAIF_RT_OPAMP3_SW 0x40005b47\r
-#define CYDEV_ANAIF_RT_LCDDAC_BASE 0x40005b50\r
-#define CYDEV_ANAIF_RT_LCDDAC_SIZE 0x00000005\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW0 0x40005b50\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW1 0x40005b51\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW2 0x40005b52\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW3 0x40005b53\r
-#define CYDEV_ANAIF_RT_LCDDAC_SW4 0x40005b54\r
-#define CYDEV_ANAIF_RT_SC_BASE 0x40005b56\r
-#define CYDEV_ANAIF_RT_SC_SIZE 0x00000001\r
-#define CYDEV_ANAIF_RT_SC_MISC 0x40005b56\r
-#define CYDEV_ANAIF_RT_BUS_BASE 0x40005b58\r
-#define CYDEV_ANAIF_RT_BUS_SIZE 0x00000004\r
-#define CYDEV_ANAIF_RT_BUS_SW0 0x40005b58\r
-#define CYDEV_ANAIF_RT_BUS_SW2 0x40005b5a\r
-#define CYDEV_ANAIF_RT_BUS_SW3 0x40005b5b\r
-#define CYDEV_ANAIF_RT_DFT_BASE 0x40005b5c\r
-#define CYDEV_ANAIF_RT_DFT_SIZE 0x00000006\r
-#define CYDEV_ANAIF_RT_DFT_CR0 0x40005b5c\r
-#define CYDEV_ANAIF_RT_DFT_CR1 0x40005b5d\r
-#define CYDEV_ANAIF_RT_DFT_CR2 0x40005b5e\r
-#define CYDEV_ANAIF_RT_DFT_CR3 0x40005b5f\r
-#define CYDEV_ANAIF_RT_DFT_CR4 0x40005b60\r
-#define CYDEV_ANAIF_RT_DFT_CR5 0x40005b61\r
-#define CYDEV_ANAIF_WRK_BASE 0x40005b80\r
-#define CYDEV_ANAIF_WRK_SIZE 0x00000029\r
-#define CYDEV_ANAIF_WRK_DAC0_BASE 0x40005b80\r
-#define CYDEV_ANAIF_WRK_DAC0_SIZE 0x00000001\r
-#define CYDEV_ANAIF_WRK_DAC0_D 0x40005b80\r
-#define CYDEV_ANAIF_WRK_DAC1_BASE 0x40005b81\r
-#define CYDEV_ANAIF_WRK_DAC1_SIZE 0x00000001\r
-#define CYDEV_ANAIF_WRK_DAC1_D 0x40005b81\r
-#define CYDEV_ANAIF_WRK_DAC2_BASE 0x40005b82\r
-#define CYDEV_ANAIF_WRK_DAC2_SIZE 0x00000001\r
-#define CYDEV_ANAIF_WRK_DAC2_D 0x40005b82\r
-#define CYDEV_ANAIF_WRK_DAC3_BASE 0x40005b83\r
-#define CYDEV_ANAIF_WRK_DAC3_SIZE 0x00000001\r
-#define CYDEV_ANAIF_WRK_DAC3_D 0x40005b83\r
-#define CYDEV_ANAIF_WRK_DSM0_BASE 0x40005b88\r
-#define CYDEV_ANAIF_WRK_DSM0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_WRK_DSM0_OUT0 0x40005b88\r
-#define CYDEV_ANAIF_WRK_DSM0_OUT1 0x40005b89\r
-#define CYDEV_ANAIF_WRK_LUT_BASE 0x40005b90\r
-#define CYDEV_ANAIF_WRK_LUT_SIZE 0x00000005\r
-#define CYDEV_ANAIF_WRK_LUT_SR 0x40005b90\r
-#define CYDEV_ANAIF_WRK_LUT_WRK1 0x40005b91\r
-#define CYDEV_ANAIF_WRK_LUT_MSK 0x40005b92\r
-#define CYDEV_ANAIF_WRK_LUT_CLK 0x40005b93\r
-#define CYDEV_ANAIF_WRK_LUT_CPTR 0x40005b94\r
-#define CYDEV_ANAIF_WRK_CMP_BASE 0x40005b96\r
-#define CYDEV_ANAIF_WRK_CMP_SIZE 0x00000002\r
-#define CYDEV_ANAIF_WRK_CMP_WRK 0x40005b96\r
-#define CYDEV_ANAIF_WRK_CMP_TST 0x40005b97\r
-#define CYDEV_ANAIF_WRK_SC_BASE 0x40005b98\r
-#define CYDEV_ANAIF_WRK_SC_SIZE 0x00000005\r
-#define CYDEV_ANAIF_WRK_SC_SR 0x40005b98\r
-#define CYDEV_ANAIF_WRK_SC_WRK1 0x40005b99\r
-#define CYDEV_ANAIF_WRK_SC_MSK 0x40005b9a\r
-#define CYDEV_ANAIF_WRK_SC_CMPINV 0x40005b9b\r
-#define CYDEV_ANAIF_WRK_SC_CPTR 0x40005b9c\r
-#define CYDEV_ANAIF_WRK_SAR0_BASE 0x40005ba0\r
-#define CYDEV_ANAIF_WRK_SAR0_SIZE 0x00000002\r
-#define CYDEV_ANAIF_WRK_SAR0_WRK0 0x40005ba0\r
-#define CYDEV_ANAIF_WRK_SAR0_WRK1 0x40005ba1\r
-#define CYDEV_ANAIF_WRK_SAR1_BASE 0x40005ba2\r
-#define CYDEV_ANAIF_WRK_SAR1_SIZE 0x00000002\r
-#define CYDEV_ANAIF_WRK_SAR1_WRK0 0x40005ba2\r
-#define CYDEV_ANAIF_WRK_SAR1_WRK1 0x40005ba3\r
-#define CYDEV_ANAIF_WRK_SARS_BASE 0x40005ba8\r
-#define CYDEV_ANAIF_WRK_SARS_SIZE 0x00000001\r
-#define CYDEV_ANAIF_WRK_SARS_SOF 0x40005ba8\r
-#define CYDEV_USB_BASE 0x40006000\r
-#define CYDEV_USB_SIZE 0x00000300\r
-#define CYDEV_USB_EP0_DR0 0x40006000\r
-#define CYDEV_USB_EP0_DR1 0x40006001\r
-#define CYDEV_USB_EP0_DR2 0x40006002\r
-#define CYDEV_USB_EP0_DR3 0x40006003\r
-#define CYDEV_USB_EP0_DR4 0x40006004\r
-#define CYDEV_USB_EP0_DR5 0x40006005\r
-#define CYDEV_USB_EP0_DR6 0x40006006\r
-#define CYDEV_USB_EP0_DR7 0x40006007\r
-#define CYDEV_USB_CR0 0x40006008\r
-#define CYDEV_USB_CR1 0x40006009\r
-#define CYDEV_USB_SIE_EP_INT_EN 0x4000600a\r
-#define CYDEV_USB_SIE_EP_INT_SR 0x4000600b\r
-#define CYDEV_USB_SIE_EP1_BASE 0x4000600c\r
-#define CYDEV_USB_SIE_EP1_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP1_CNT0 0x4000600c\r
-#define CYDEV_USB_SIE_EP1_CNT1 0x4000600d\r
-#define CYDEV_USB_SIE_EP1_CR0 0x4000600e\r
-#define CYDEV_USB_USBIO_CR0 0x40006010\r
-#define CYDEV_USB_USBIO_CR1 0x40006012\r
-#define CYDEV_USB_DYN_RECONFIG 0x40006014\r
-#define CYDEV_USB_SOF0 0x40006018\r
-#define CYDEV_USB_SOF1 0x40006019\r
-#define CYDEV_USB_SIE_EP2_BASE 0x4000601c\r
-#define CYDEV_USB_SIE_EP2_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP2_CNT0 0x4000601c\r
-#define CYDEV_USB_SIE_EP2_CNT1 0x4000601d\r
-#define CYDEV_USB_SIE_EP2_CR0 0x4000601e\r
-#define CYDEV_USB_EP0_CR 0x40006028\r
-#define CYDEV_USB_EP0_CNT 0x40006029\r
-#define CYDEV_USB_SIE_EP3_BASE 0x4000602c\r
-#define CYDEV_USB_SIE_EP3_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP3_CNT0 0x4000602c\r
-#define CYDEV_USB_SIE_EP3_CNT1 0x4000602d\r
-#define CYDEV_USB_SIE_EP3_CR0 0x4000602e\r
-#define CYDEV_USB_SIE_EP4_BASE 0x4000603c\r
-#define CYDEV_USB_SIE_EP4_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP4_CNT0 0x4000603c\r
-#define CYDEV_USB_SIE_EP4_CNT1 0x4000603d\r
-#define CYDEV_USB_SIE_EP4_CR0 0x4000603e\r
-#define CYDEV_USB_SIE_EP5_BASE 0x4000604c\r
-#define CYDEV_USB_SIE_EP5_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP5_CNT0 0x4000604c\r
-#define CYDEV_USB_SIE_EP5_CNT1 0x4000604d\r
-#define CYDEV_USB_SIE_EP5_CR0 0x4000604e\r
-#define CYDEV_USB_SIE_EP6_BASE 0x4000605c\r
-#define CYDEV_USB_SIE_EP6_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP6_CNT0 0x4000605c\r
-#define CYDEV_USB_SIE_EP6_CNT1 0x4000605d\r
-#define CYDEV_USB_SIE_EP6_CR0 0x4000605e\r
-#define CYDEV_USB_SIE_EP7_BASE 0x4000606c\r
-#define CYDEV_USB_SIE_EP7_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP7_CNT0 0x4000606c\r
-#define CYDEV_USB_SIE_EP7_CNT1 0x4000606d\r
-#define CYDEV_USB_SIE_EP7_CR0 0x4000606e\r
-#define CYDEV_USB_SIE_EP8_BASE 0x4000607c\r
-#define CYDEV_USB_SIE_EP8_SIZE 0x00000003\r
-#define CYDEV_USB_SIE_EP8_CNT0 0x4000607c\r
-#define CYDEV_USB_SIE_EP8_CNT1 0x4000607d\r
-#define CYDEV_USB_SIE_EP8_CR0 0x4000607e\r
-#define CYDEV_USB_ARB_EP1_BASE 0x40006080\r
-#define CYDEV_USB_ARB_EP1_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP1_CFG 0x40006080\r
-#define CYDEV_USB_ARB_EP1_INT_EN 0x40006081\r
-#define CYDEV_USB_ARB_EP1_SR 0x40006082\r
-#define CYDEV_USB_ARB_RW1_BASE 0x40006084\r
-#define CYDEV_USB_ARB_RW1_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW1_WA 0x40006084\r
-#define CYDEV_USB_ARB_RW1_WA_MSB 0x40006085\r
-#define CYDEV_USB_ARB_RW1_RA 0x40006086\r
-#define CYDEV_USB_ARB_RW1_RA_MSB 0x40006087\r
-#define CYDEV_USB_ARB_RW1_DR 0x40006088\r
-#define CYDEV_USB_BUF_SIZE 0x4000608c\r
-#define CYDEV_USB_EP_ACTIVE 0x4000608e\r
-#define CYDEV_USB_EP_TYPE 0x4000608f\r
-#define CYDEV_USB_ARB_EP2_BASE 0x40006090\r
-#define CYDEV_USB_ARB_EP2_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP2_CFG 0x40006090\r
-#define CYDEV_USB_ARB_EP2_INT_EN 0x40006091\r
-#define CYDEV_USB_ARB_EP2_SR 0x40006092\r
-#define CYDEV_USB_ARB_RW2_BASE 0x40006094\r
-#define CYDEV_USB_ARB_RW2_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW2_WA 0x40006094\r
-#define CYDEV_USB_ARB_RW2_WA_MSB 0x40006095\r
-#define CYDEV_USB_ARB_RW2_RA 0x40006096\r
-#define CYDEV_USB_ARB_RW2_RA_MSB 0x40006097\r
-#define CYDEV_USB_ARB_RW2_DR 0x40006098\r
-#define CYDEV_USB_ARB_CFG 0x4000609c\r
-#define CYDEV_USB_USB_CLK_EN 0x4000609d\r
-#define CYDEV_USB_ARB_INT_EN 0x4000609e\r
-#define CYDEV_USB_ARB_INT_SR 0x4000609f\r
-#define CYDEV_USB_ARB_EP3_BASE 0x400060a0\r
-#define CYDEV_USB_ARB_EP3_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP3_CFG 0x400060a0\r
-#define CYDEV_USB_ARB_EP3_INT_EN 0x400060a1\r
-#define CYDEV_USB_ARB_EP3_SR 0x400060a2\r
-#define CYDEV_USB_ARB_RW3_BASE 0x400060a4\r
-#define CYDEV_USB_ARB_RW3_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW3_WA 0x400060a4\r
-#define CYDEV_USB_ARB_RW3_WA_MSB 0x400060a5\r
-#define CYDEV_USB_ARB_RW3_RA 0x400060a6\r
-#define CYDEV_USB_ARB_RW3_RA_MSB 0x400060a7\r
-#define CYDEV_USB_ARB_RW3_DR 0x400060a8\r
-#define CYDEV_USB_CWA 0x400060ac\r
-#define CYDEV_USB_CWA_MSB 0x400060ad\r
-#define CYDEV_USB_ARB_EP4_BASE 0x400060b0\r
-#define CYDEV_USB_ARB_EP4_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP4_CFG 0x400060b0\r
-#define CYDEV_USB_ARB_EP4_INT_EN 0x400060b1\r
-#define CYDEV_USB_ARB_EP4_SR 0x400060b2\r
-#define CYDEV_USB_ARB_RW4_BASE 0x400060b4\r
-#define CYDEV_USB_ARB_RW4_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW4_WA 0x400060b4\r
-#define CYDEV_USB_ARB_RW4_WA_MSB 0x400060b5\r
-#define CYDEV_USB_ARB_RW4_RA 0x400060b6\r
-#define CYDEV_USB_ARB_RW4_RA_MSB 0x400060b7\r
-#define CYDEV_USB_ARB_RW4_DR 0x400060b8\r
-#define CYDEV_USB_DMA_THRES 0x400060bc\r
-#define CYDEV_USB_DMA_THRES_MSB 0x400060bd\r
-#define CYDEV_USB_ARB_EP5_BASE 0x400060c0\r
-#define CYDEV_USB_ARB_EP5_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP5_CFG 0x400060c0\r
-#define CYDEV_USB_ARB_EP5_INT_EN 0x400060c1\r
-#define CYDEV_USB_ARB_EP5_SR 0x400060c2\r
-#define CYDEV_USB_ARB_RW5_BASE 0x400060c4\r
-#define CYDEV_USB_ARB_RW5_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW5_WA 0x400060c4\r
-#define CYDEV_USB_ARB_RW5_WA_MSB 0x400060c5\r
-#define CYDEV_USB_ARB_RW5_RA 0x400060c6\r
-#define CYDEV_USB_ARB_RW5_RA_MSB 0x400060c7\r
-#define CYDEV_USB_ARB_RW5_DR 0x400060c8\r
-#define CYDEV_USB_BUS_RST_CNT 0x400060cc\r
-#define CYDEV_USB_ARB_EP6_BASE 0x400060d0\r
-#define CYDEV_USB_ARB_EP6_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP6_CFG 0x400060d0\r
-#define CYDEV_USB_ARB_EP6_INT_EN 0x400060d1\r
-#define CYDEV_USB_ARB_EP6_SR 0x400060d2\r
-#define CYDEV_USB_ARB_RW6_BASE 0x400060d4\r
-#define CYDEV_USB_ARB_RW6_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW6_WA 0x400060d4\r
-#define CYDEV_USB_ARB_RW6_WA_MSB 0x400060d5\r
-#define CYDEV_USB_ARB_RW6_RA 0x400060d6\r
-#define CYDEV_USB_ARB_RW6_RA_MSB 0x400060d7\r
-#define CYDEV_USB_ARB_RW6_DR 0x400060d8\r
-#define CYDEV_USB_ARB_EP7_BASE 0x400060e0\r
-#define CYDEV_USB_ARB_EP7_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP7_CFG 0x400060e0\r
-#define CYDEV_USB_ARB_EP7_INT_EN 0x400060e1\r
-#define CYDEV_USB_ARB_EP7_SR 0x400060e2\r
-#define CYDEV_USB_ARB_RW7_BASE 0x400060e4\r
-#define CYDEV_USB_ARB_RW7_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW7_WA 0x400060e4\r
-#define CYDEV_USB_ARB_RW7_WA_MSB 0x400060e5\r
-#define CYDEV_USB_ARB_RW7_RA 0x400060e6\r
-#define CYDEV_USB_ARB_RW7_RA_MSB 0x400060e7\r
-#define CYDEV_USB_ARB_RW7_DR 0x400060e8\r
-#define CYDEV_USB_ARB_EP8_BASE 0x400060f0\r
-#define CYDEV_USB_ARB_EP8_SIZE 0x00000003\r
-#define CYDEV_USB_ARB_EP8_CFG 0x400060f0\r
-#define CYDEV_USB_ARB_EP8_INT_EN 0x400060f1\r
-#define CYDEV_USB_ARB_EP8_SR 0x400060f2\r
-#define CYDEV_USB_ARB_RW8_BASE 0x400060f4\r
-#define CYDEV_USB_ARB_RW8_SIZE 0x00000005\r
-#define CYDEV_USB_ARB_RW8_WA 0x400060f4\r
-#define CYDEV_USB_ARB_RW8_WA_MSB 0x400060f5\r
-#define CYDEV_USB_ARB_RW8_RA 0x400060f6\r
-#define CYDEV_USB_ARB_RW8_RA_MSB 0x400060f7\r
-#define CYDEV_USB_ARB_RW8_DR 0x400060f8\r
-#define CYDEV_USB_MEM_BASE 0x40006100\r
-#define CYDEV_USB_MEM_SIZE 0x00000200\r
-#define CYDEV_USB_MEM_DATA_MBASE 0x40006100\r
-#define CYDEV_USB_MEM_DATA_MSIZE 0x00000200\r
-#define CYDEV_UWRK_BASE 0x40006400\r
-#define CYDEV_UWRK_SIZE 0x00000b60\r
-#define CYDEV_UWRK_UWRK8_BASE 0x40006400\r
-#define CYDEV_UWRK_UWRK8_SIZE 0x000003b0\r
-#define CYDEV_UWRK_UWRK8_B0_BASE 0x40006400\r
-#define CYDEV_UWRK_UWRK8_B0_SIZE 0x000000b0\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_A0 0x40006400\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_A0 0x40006401\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_A0 0x40006402\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_A0 0x40006403\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_A0 0x40006404\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_A0 0x40006405\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_A0 0x40006406\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_A0 0x40006407\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_A0 0x40006408\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_A0 0x40006409\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_A0 0x4000640a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_A0 0x4000640b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_A0 0x4000640c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_A0 0x4000640d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_A0 0x4000640e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_A0 0x4000640f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_A1 0x40006410\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_A1 0x40006411\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_A1 0x40006412\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_A1 0x40006413\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_A1 0x40006414\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_A1 0x40006415\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_A1 0x40006416\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_A1 0x40006417\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_A1 0x40006418\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_A1 0x40006419\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_A1 0x4000641a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_A1 0x4000641b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_A1 0x4000641c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_A1 0x4000641d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_A1 0x4000641e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_A1 0x4000641f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_D0 0x40006420\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_D0 0x40006421\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_D0 0x40006422\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_D0 0x40006423\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_D0 0x40006424\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_D0 0x40006425\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_D0 0x40006426\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_D0 0x40006427\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_D0 0x40006428\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_D0 0x40006429\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_D0 0x4000642a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_D0 0x4000642b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_D0 0x4000642c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_D0 0x4000642d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_D0 0x4000642e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_D0 0x4000642f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_D1 0x40006430\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_D1 0x40006431\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_D1 0x40006432\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_D1 0x40006433\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_D1 0x40006434\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_D1 0x40006435\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_D1 0x40006436\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_D1 0x40006437\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_D1 0x40006438\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_D1 0x40006439\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_D1 0x4000643a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_D1 0x4000643b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_D1 0x4000643c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_D1 0x4000643d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_D1 0x4000643e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_D1 0x4000643f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_F0 0x40006440\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_F0 0x40006441\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_F0 0x40006442\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_F0 0x40006443\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_F0 0x40006444\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_F0 0x40006445\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_F0 0x40006446\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_F0 0x40006447\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_F0 0x40006448\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_F0 0x40006449\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_F0 0x4000644a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_F0 0x4000644b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_F0 0x4000644c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_F0 0x4000644d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_F0 0x4000644e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_F0 0x4000644f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_F1 0x40006450\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_F1 0x40006451\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_F1 0x40006452\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_F1 0x40006453\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_F1 0x40006454\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_F1 0x40006455\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_F1 0x40006456\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_F1 0x40006457\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_F1 0x40006458\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_F1 0x40006459\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_F1 0x4000645a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_F1 0x4000645b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_F1 0x4000645c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_F1 0x4000645d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_F1 0x4000645e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_F1 0x4000645f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_ST 0x40006460\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_ST 0x40006461\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_ST 0x40006462\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_ST 0x40006463\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_ST 0x40006464\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_ST 0x40006465\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_ST 0x40006466\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_ST 0x40006467\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_ST 0x40006468\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_ST 0x40006469\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_ST 0x4000646a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_ST 0x4000646b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_ST 0x4000646c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_ST 0x4000646d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_ST 0x4000646e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_ST 0x4000646f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_CTL 0x40006470\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_CTL 0x40006471\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_CTL 0x40006472\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_CTL 0x40006473\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_CTL 0x40006474\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_CTL 0x40006475\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_CTL 0x40006476\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_CTL 0x40006477\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_CTL 0x40006478\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_CTL 0x40006479\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_CTL 0x4000647a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_CTL 0x4000647b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_CTL 0x4000647c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_CTL 0x4000647d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_CTL 0x4000647e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_CTL 0x4000647f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_MSK 0x40006480\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_MSK 0x40006481\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_MSK 0x40006482\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_MSK 0x40006483\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_MSK 0x40006484\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_MSK 0x40006485\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_MSK 0x40006486\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_MSK 0x40006487\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_MSK 0x40006488\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_MSK 0x40006489\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_MSK 0x4000648a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_MSK 0x4000648b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_MSK 0x4000648c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_MSK 0x4000648d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_MSK 0x4000648e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_MSK 0x4000648f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_ACTL 0x40006490\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_ACTL 0x40006491\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_ACTL 0x40006492\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_ACTL 0x40006493\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_ACTL 0x40006494\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_ACTL 0x40006495\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_ACTL 0x40006496\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_ACTL 0x40006497\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_ACTL 0x40006498\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_ACTL 0x40006499\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_ACTL 0x4000649a\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_ACTL 0x4000649b\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_ACTL 0x4000649c\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_ACTL 0x4000649d\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_ACTL 0x4000649e\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_ACTL 0x4000649f\r
-#define CYDEV_UWRK_UWRK8_B0_UDB00_MC 0x400064a0\r
-#define CYDEV_UWRK_UWRK8_B0_UDB01_MC 0x400064a1\r
-#define CYDEV_UWRK_UWRK8_B0_UDB02_MC 0x400064a2\r
-#define CYDEV_UWRK_UWRK8_B0_UDB03_MC 0x400064a3\r
-#define CYDEV_UWRK_UWRK8_B0_UDB04_MC 0x400064a4\r
-#define CYDEV_UWRK_UWRK8_B0_UDB05_MC 0x400064a5\r
-#define CYDEV_UWRK_UWRK8_B0_UDB06_MC 0x400064a6\r
-#define CYDEV_UWRK_UWRK8_B0_UDB07_MC 0x400064a7\r
-#define CYDEV_UWRK_UWRK8_B0_UDB08_MC 0x400064a8\r
-#define CYDEV_UWRK_UWRK8_B0_UDB09_MC 0x400064a9\r
-#define CYDEV_UWRK_UWRK8_B0_UDB10_MC 0x400064aa\r
-#define CYDEV_UWRK_UWRK8_B0_UDB11_MC 0x400064ab\r
-#define CYDEV_UWRK_UWRK8_B0_UDB12_MC 0x400064ac\r
-#define CYDEV_UWRK_UWRK8_B0_UDB13_MC 0x400064ad\r
-#define CYDEV_UWRK_UWRK8_B0_UDB14_MC 0x400064ae\r
-#define CYDEV_UWRK_UWRK8_B0_UDB15_MC 0x400064af\r
-#define CYDEV_UWRK_UWRK8_B1_BASE 0x40006500\r
-#define CYDEV_UWRK_UWRK8_B1_SIZE 0x000000b0\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_A0 0x40006504\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_A0 0x40006505\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_A0 0x40006506\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_A0 0x40006507\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_A0 0x40006508\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_A0 0x40006509\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_A0 0x4000650a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_A0 0x4000650b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_A1 0x40006514\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_A1 0x40006515\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_A1 0x40006516\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_A1 0x40006517\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_A1 0x40006518\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_A1 0x40006519\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_A1 0x4000651a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_A1 0x4000651b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_D0 0x40006524\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_D0 0x40006525\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_D0 0x40006526\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_D0 0x40006527\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_D0 0x40006528\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_D0 0x40006529\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_D0 0x4000652a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_D0 0x4000652b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_D1 0x40006534\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_D1 0x40006535\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_D1 0x40006536\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_D1 0x40006537\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_D1 0x40006538\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_D1 0x40006539\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_D1 0x4000653a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_D1 0x4000653b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_F0 0x40006544\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_F0 0x40006545\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_F0 0x40006546\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_F0 0x40006547\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_F0 0x40006548\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_F0 0x40006549\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_F0 0x4000654a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_F0 0x4000654b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_F1 0x40006554\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_F1 0x40006555\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_F1 0x40006556\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_F1 0x40006557\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_F1 0x40006558\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_F1 0x40006559\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_F1 0x4000655a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_F1 0x4000655b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_ST 0x40006564\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_ST 0x40006565\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_ST 0x40006566\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_ST 0x40006567\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_ST 0x40006568\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_ST 0x40006569\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_ST 0x4000656a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_ST 0x4000656b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_CTL 0x40006574\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_CTL 0x40006575\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_CTL 0x40006576\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_CTL 0x40006577\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_CTL 0x40006578\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_CTL 0x40006579\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_CTL 0x4000657a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_CTL 0x4000657b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_MSK 0x40006584\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_MSK 0x40006585\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_MSK 0x40006586\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_MSK 0x40006587\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_MSK 0x40006588\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_MSK 0x40006589\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_MSK 0x4000658a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_MSK 0x4000658b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_ACTL 0x40006594\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_ACTL 0x40006595\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_ACTL 0x40006596\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_ACTL 0x40006597\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_ACTL 0x40006598\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_ACTL 0x40006599\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_ACTL 0x4000659a\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_ACTL 0x4000659b\r
-#define CYDEV_UWRK_UWRK8_B1_UDB04_MC 0x400065a4\r
-#define CYDEV_UWRK_UWRK8_B1_UDB05_MC 0x400065a5\r
-#define CYDEV_UWRK_UWRK8_B1_UDB06_MC 0x400065a6\r
-#define CYDEV_UWRK_UWRK8_B1_UDB07_MC 0x400065a7\r
-#define CYDEV_UWRK_UWRK8_B1_UDB08_MC 0x400065a8\r
-#define CYDEV_UWRK_UWRK8_B1_UDB09_MC 0x400065a9\r
-#define CYDEV_UWRK_UWRK8_B1_UDB10_MC 0x400065aa\r
-#define CYDEV_UWRK_UWRK8_B1_UDB11_MC 0x400065ab\r
-#define CYDEV_UWRK_UWRK16_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_SIZE 0x00000760\r
-#define CYDEV_UWRK_UWRK16_CAT_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_CAT_SIZE 0x00000760\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_SIZE 0x00000160\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1 0x40006800\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1 0x40006802\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1 0x40006804\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1 0x40006806\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1 0x40006808\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1 0x4000680a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1 0x4000680c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1 0x4000680e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1 0x40006810\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1 0x40006812\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1 0x40006814\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1 0x40006816\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1 0x40006818\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1 0x4000681a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1 0x4000681c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1 0x4000681e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1 0x40006840\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1 0x40006842\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1 0x40006844\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1 0x40006846\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1 0x40006848\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1 0x4000684a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1 0x4000684c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1 0x4000684e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1 0x40006850\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1 0x40006852\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1 0x40006854\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1 0x40006856\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1 0x40006858\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1 0x4000685a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1 0x4000685c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1 0x4000685e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1 0x40006880\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1 0x40006882\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1 0x40006884\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1 0x40006886\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1 0x40006888\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1 0x4000688a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1 0x4000688c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1 0x4000688e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1 0x40006890\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1 0x40006892\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1 0x40006894\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1 0x40006896\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1 0x40006898\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1 0x4000689a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1 0x4000689c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1 0x4000689e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL 0x400068c0\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL 0x400068c2\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL 0x400068c4\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL 0x400068c6\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL 0x400068c8\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL 0x400068ca\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL 0x400068cc\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL 0x400068ce\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL 0x400068d0\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL 0x400068d2\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL 0x400068d4\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL 0x400068d6\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL 0x400068d8\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL 0x400068da\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL 0x400068dc\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL 0x400068de\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL 0x40006900\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL 0x40006902\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL 0x40006904\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL 0x40006906\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL 0x40006908\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL 0x4000690a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL 0x4000690c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL 0x4000690e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL 0x40006910\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL 0x40006912\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL 0x40006914\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL 0x40006916\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL 0x40006918\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL 0x4000691a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL 0x4000691c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL 0x4000691e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00 0x40006940\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00 0x40006942\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00 0x40006944\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00 0x40006946\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00 0x40006948\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00 0x4000694a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00 0x4000694c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00 0x4000694e\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00 0x40006950\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00 0x40006952\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00 0x40006954\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00 0x40006956\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00 0x40006958\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00 0x4000695a\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00 0x4000695c\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00 0x4000695e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_BASE 0x40006a00\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_SIZE 0x00000160\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1 0x40006a08\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1 0x40006a0a\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1 0x40006a0c\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1 0x40006a0e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1 0x40006a10\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1 0x40006a12\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1 0x40006a14\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1 0x40006a16\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1 0x40006a48\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1 0x40006a4a\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1 0x40006a4c\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1 0x40006a4e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1 0x40006a50\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1 0x40006a52\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1 0x40006a54\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1 0x40006a56\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1 0x40006a88\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1 0x40006a8a\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1 0x40006a8c\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1 0x40006a8e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1 0x40006a90\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1 0x40006a92\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1 0x40006a94\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1 0x40006a96\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL 0x40006ac8\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL 0x40006aca\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL 0x40006acc\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL 0x40006ace\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL 0x40006ad0\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL 0x40006ad2\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL 0x40006ad4\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL 0x40006ad6\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL 0x40006b08\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL 0x40006b0a\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL 0x40006b0c\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL 0x40006b0e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL 0x40006b10\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL 0x40006b12\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL 0x40006b14\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL 0x40006b16\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00 0x40006b48\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00 0x40006b4a\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00 0x40006b4c\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00 0x40006b4e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00 0x40006b50\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00 0x40006b52\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00 0x40006b54\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00 0x40006b56\r
-#define CYDEV_UWRK_UWRK16_DEF_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_DEF_SIZE 0x0000075e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_SIZE 0x0000015e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0 0x40006800\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0 0x40006802\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0 0x40006804\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0 0x40006806\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0 0x40006808\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0 0x4000680a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0 0x4000680c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0 0x4000680e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0 0x40006810\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0 0x40006812\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0 0x40006814\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0 0x40006816\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0 0x40006818\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0 0x4000681a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0 0x4000681c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1 0x40006820\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1 0x40006822\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1 0x40006824\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1 0x40006826\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1 0x40006828\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1 0x4000682a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1 0x4000682c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1 0x4000682e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1 0x40006830\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1 0x40006832\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1 0x40006834\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1 0x40006836\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1 0x40006838\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1 0x4000683a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1 0x4000683c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0 0x40006840\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0 0x40006842\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0 0x40006844\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0 0x40006846\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0 0x40006848\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0 0x4000684a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0 0x4000684c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0 0x4000684e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0 0x40006850\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0 0x40006852\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0 0x40006854\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0 0x40006856\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0 0x40006858\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0 0x4000685a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0 0x4000685c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1 0x40006860\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1 0x40006862\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1 0x40006864\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1 0x40006866\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1 0x40006868\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1 0x4000686a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1 0x4000686c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1 0x4000686e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1 0x40006870\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1 0x40006872\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1 0x40006874\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1 0x40006876\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1 0x40006878\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1 0x4000687a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1 0x4000687c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0 0x40006880\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0 0x40006882\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0 0x40006884\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0 0x40006886\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0 0x40006888\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0 0x4000688a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0 0x4000688c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0 0x4000688e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0 0x40006890\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0 0x40006892\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0 0x40006894\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0 0x40006896\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0 0x40006898\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0 0x4000689a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0 0x4000689c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1 0x400068a0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1 0x400068a2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1 0x400068a4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1 0x400068a6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1 0x400068a8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1 0x400068aa\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1 0x400068ac\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1 0x400068ae\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1 0x400068b0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1 0x400068b2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1 0x400068b4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1 0x400068b6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1 0x400068b8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1 0x400068ba\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1 0x400068bc\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST 0x400068c0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST 0x400068c2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST 0x400068c4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST 0x400068c6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST 0x400068c8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST 0x400068ca\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST 0x400068cc\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST 0x400068ce\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST 0x400068d0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST 0x400068d2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST 0x400068d4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST 0x400068d6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST 0x400068d8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST 0x400068da\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST 0x400068dc\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL 0x400068e0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL 0x400068e2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL 0x400068e4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL 0x400068e6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL 0x400068e8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL 0x400068ea\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL 0x400068ec\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL 0x400068ee\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL 0x400068f0\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL 0x400068f2\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL 0x400068f4\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL 0x400068f6\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL 0x400068f8\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL 0x400068fa\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL 0x400068fc\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK 0x40006900\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK 0x40006902\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK 0x40006904\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK 0x40006906\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK 0x40006908\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK 0x4000690a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK 0x4000690c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK 0x4000690e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK 0x40006910\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK 0x40006912\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK 0x40006914\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK 0x40006916\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK 0x40006918\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK 0x4000691a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK 0x4000691c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL 0x40006920\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL 0x40006922\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL 0x40006924\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL 0x40006926\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL 0x40006928\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL 0x4000692a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL 0x4000692c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL 0x4000692e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL 0x40006930\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL 0x40006932\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL 0x40006934\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL 0x40006936\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL 0x40006938\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL 0x4000693a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL 0x4000693c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC 0x40006940\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC 0x40006942\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC 0x40006944\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC 0x40006946\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC 0x40006948\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC 0x4000694a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC 0x4000694c\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC 0x4000694e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC 0x40006950\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC 0x40006952\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC 0x40006954\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC 0x40006956\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC 0x40006958\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC 0x4000695a\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC 0x4000695c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_BASE 0x40006a00\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_SIZE 0x0000015e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0 0x40006a08\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0 0x40006a0a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0 0x40006a0c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0 0x40006a0e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0 0x40006a10\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0 0x40006a12\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0 0x40006a14\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0 0x40006a16\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1 0x40006a28\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1 0x40006a2a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1 0x40006a2c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1 0x40006a2e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1 0x40006a30\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1 0x40006a32\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1 0x40006a34\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1 0x40006a36\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0 0x40006a48\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0 0x40006a4a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0 0x40006a4c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0 0x40006a4e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0 0x40006a50\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0 0x40006a52\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0 0x40006a54\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0 0x40006a56\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1 0x40006a68\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1 0x40006a6a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1 0x40006a6c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1 0x40006a6e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1 0x40006a70\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1 0x40006a72\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1 0x40006a74\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1 0x40006a76\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0 0x40006a88\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0 0x40006a8a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0 0x40006a8c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0 0x40006a8e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0 0x40006a90\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0 0x40006a92\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0 0x40006a94\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0 0x40006a96\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1 0x40006aa8\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1 0x40006aaa\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1 0x40006aac\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1 0x40006aae\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1 0x40006ab0\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1 0x40006ab2\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1 0x40006ab4\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1 0x40006ab6\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST 0x40006ac8\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST 0x40006aca\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST 0x40006acc\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST 0x40006ace\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST 0x40006ad0\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST 0x40006ad2\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST 0x40006ad4\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST 0x40006ad6\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL 0x40006ae8\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL 0x40006aea\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL 0x40006aec\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL 0x40006aee\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL 0x40006af0\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL 0x40006af2\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL 0x40006af4\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL 0x40006af6\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK 0x40006b08\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK 0x40006b0a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK 0x40006b0c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK 0x40006b0e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK 0x40006b10\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK 0x40006b12\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK 0x40006b14\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK 0x40006b16\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL 0x40006b28\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL 0x40006b2a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL 0x40006b2c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL 0x40006b2e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL 0x40006b30\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL 0x40006b32\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL 0x40006b34\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL 0x40006b36\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC 0x40006b48\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC 0x40006b4a\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC 0x40006b4c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC 0x40006b4e\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC 0x40006b50\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC 0x40006b52\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC 0x40006b54\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC 0x40006b56\r
-#define CYDEV_PHUB_BASE 0x40007000\r
-#define CYDEV_PHUB_SIZE 0x00000c00\r
-#define CYDEV_PHUB_CFG 0x40007000\r
-#define CYDEV_PHUB_ERR 0x40007004\r
-#define CYDEV_PHUB_ERR_ADR 0x40007008\r
-#define CYDEV_PHUB_CH0_BASE 0x40007010\r
-#define CYDEV_PHUB_CH0_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH0_BASIC_CFG 0x40007010\r
-#define CYDEV_PHUB_CH0_ACTION 0x40007014\r
-#define CYDEV_PHUB_CH0_BASIC_STATUS 0x40007018\r
-#define CYDEV_PHUB_CH1_BASE 0x40007020\r
-#define CYDEV_PHUB_CH1_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH1_BASIC_CFG 0x40007020\r
-#define CYDEV_PHUB_CH1_ACTION 0x40007024\r
-#define CYDEV_PHUB_CH1_BASIC_STATUS 0x40007028\r
-#define CYDEV_PHUB_CH2_BASE 0x40007030\r
-#define CYDEV_PHUB_CH2_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH2_BASIC_CFG 0x40007030\r
-#define CYDEV_PHUB_CH2_ACTION 0x40007034\r
-#define CYDEV_PHUB_CH2_BASIC_STATUS 0x40007038\r
-#define CYDEV_PHUB_CH3_BASE 0x40007040\r
-#define CYDEV_PHUB_CH3_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH3_BASIC_CFG 0x40007040\r
-#define CYDEV_PHUB_CH3_ACTION 0x40007044\r
-#define CYDEV_PHUB_CH3_BASIC_STATUS 0x40007048\r
-#define CYDEV_PHUB_CH4_BASE 0x40007050\r
-#define CYDEV_PHUB_CH4_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH4_BASIC_CFG 0x40007050\r
-#define CYDEV_PHUB_CH4_ACTION 0x40007054\r
-#define CYDEV_PHUB_CH4_BASIC_STATUS 0x40007058\r
-#define CYDEV_PHUB_CH5_BASE 0x40007060\r
-#define CYDEV_PHUB_CH5_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH5_BASIC_CFG 0x40007060\r
-#define CYDEV_PHUB_CH5_ACTION 0x40007064\r
-#define CYDEV_PHUB_CH5_BASIC_STATUS 0x40007068\r
-#define CYDEV_PHUB_CH6_BASE 0x40007070\r
-#define CYDEV_PHUB_CH6_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH6_BASIC_CFG 0x40007070\r
-#define CYDEV_PHUB_CH6_ACTION 0x40007074\r
-#define CYDEV_PHUB_CH6_BASIC_STATUS 0x40007078\r
-#define CYDEV_PHUB_CH7_BASE 0x40007080\r
-#define CYDEV_PHUB_CH7_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH7_BASIC_CFG 0x40007080\r
-#define CYDEV_PHUB_CH7_ACTION 0x40007084\r
-#define CYDEV_PHUB_CH7_BASIC_STATUS 0x40007088\r
-#define CYDEV_PHUB_CH8_BASE 0x40007090\r
-#define CYDEV_PHUB_CH8_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH8_BASIC_CFG 0x40007090\r
-#define CYDEV_PHUB_CH8_ACTION 0x40007094\r
-#define CYDEV_PHUB_CH8_BASIC_STATUS 0x40007098\r
-#define CYDEV_PHUB_CH9_BASE 0x400070a0\r
-#define CYDEV_PHUB_CH9_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH9_BASIC_CFG 0x400070a0\r
-#define CYDEV_PHUB_CH9_ACTION 0x400070a4\r
-#define CYDEV_PHUB_CH9_BASIC_STATUS 0x400070a8\r
-#define CYDEV_PHUB_CH10_BASE 0x400070b0\r
-#define CYDEV_PHUB_CH10_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH10_BASIC_CFG 0x400070b0\r
-#define CYDEV_PHUB_CH10_ACTION 0x400070b4\r
-#define CYDEV_PHUB_CH10_BASIC_STATUS 0x400070b8\r
-#define CYDEV_PHUB_CH11_BASE 0x400070c0\r
-#define CYDEV_PHUB_CH11_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH11_BASIC_CFG 0x400070c0\r
-#define CYDEV_PHUB_CH11_ACTION 0x400070c4\r
-#define CYDEV_PHUB_CH11_BASIC_STATUS 0x400070c8\r
-#define CYDEV_PHUB_CH12_BASE 0x400070d0\r
-#define CYDEV_PHUB_CH12_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH12_BASIC_CFG 0x400070d0\r
-#define CYDEV_PHUB_CH12_ACTION 0x400070d4\r
-#define CYDEV_PHUB_CH12_BASIC_STATUS 0x400070d8\r
-#define CYDEV_PHUB_CH13_BASE 0x400070e0\r
-#define CYDEV_PHUB_CH13_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH13_BASIC_CFG 0x400070e0\r
-#define CYDEV_PHUB_CH13_ACTION 0x400070e4\r
-#define CYDEV_PHUB_CH13_BASIC_STATUS 0x400070e8\r
-#define CYDEV_PHUB_CH14_BASE 0x400070f0\r
-#define CYDEV_PHUB_CH14_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH14_BASIC_CFG 0x400070f0\r
-#define CYDEV_PHUB_CH14_ACTION 0x400070f4\r
-#define CYDEV_PHUB_CH14_BASIC_STATUS 0x400070f8\r
-#define CYDEV_PHUB_CH15_BASE 0x40007100\r
-#define CYDEV_PHUB_CH15_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH15_BASIC_CFG 0x40007100\r
-#define CYDEV_PHUB_CH15_ACTION 0x40007104\r
-#define CYDEV_PHUB_CH15_BASIC_STATUS 0x40007108\r
-#define CYDEV_PHUB_CH16_BASE 0x40007110\r
-#define CYDEV_PHUB_CH16_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH16_BASIC_CFG 0x40007110\r
-#define CYDEV_PHUB_CH16_ACTION 0x40007114\r
-#define CYDEV_PHUB_CH16_BASIC_STATUS 0x40007118\r
-#define CYDEV_PHUB_CH17_BASE 0x40007120\r
-#define CYDEV_PHUB_CH17_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH17_BASIC_CFG 0x40007120\r
-#define CYDEV_PHUB_CH17_ACTION 0x40007124\r
-#define CYDEV_PHUB_CH17_BASIC_STATUS 0x40007128\r
-#define CYDEV_PHUB_CH18_BASE 0x40007130\r
-#define CYDEV_PHUB_CH18_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH18_BASIC_CFG 0x40007130\r
-#define CYDEV_PHUB_CH18_ACTION 0x40007134\r
-#define CYDEV_PHUB_CH18_BASIC_STATUS 0x40007138\r
-#define CYDEV_PHUB_CH19_BASE 0x40007140\r
-#define CYDEV_PHUB_CH19_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH19_BASIC_CFG 0x40007140\r
-#define CYDEV_PHUB_CH19_ACTION 0x40007144\r
-#define CYDEV_PHUB_CH19_BASIC_STATUS 0x40007148\r
-#define CYDEV_PHUB_CH20_BASE 0x40007150\r
-#define CYDEV_PHUB_CH20_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH20_BASIC_CFG 0x40007150\r
-#define CYDEV_PHUB_CH20_ACTION 0x40007154\r
-#define CYDEV_PHUB_CH20_BASIC_STATUS 0x40007158\r
-#define CYDEV_PHUB_CH21_BASE 0x40007160\r
-#define CYDEV_PHUB_CH21_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH21_BASIC_CFG 0x40007160\r
-#define CYDEV_PHUB_CH21_ACTION 0x40007164\r
-#define CYDEV_PHUB_CH21_BASIC_STATUS 0x40007168\r
-#define CYDEV_PHUB_CH22_BASE 0x40007170\r
-#define CYDEV_PHUB_CH22_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH22_BASIC_CFG 0x40007170\r
-#define CYDEV_PHUB_CH22_ACTION 0x40007174\r
-#define CYDEV_PHUB_CH22_BASIC_STATUS 0x40007178\r
-#define CYDEV_PHUB_CH23_BASE 0x40007180\r
-#define CYDEV_PHUB_CH23_SIZE 0x0000000c\r
-#define CYDEV_PHUB_CH23_BASIC_CFG 0x40007180\r
-#define CYDEV_PHUB_CH23_ACTION 0x40007184\r
-#define CYDEV_PHUB_CH23_BASIC_STATUS 0x40007188\r
-#define CYDEV_PHUB_CFGMEM0_BASE 0x40007600\r
-#define CYDEV_PHUB_CFGMEM0_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM0_CFG0 0x40007600\r
-#define CYDEV_PHUB_CFGMEM0_CFG1 0x40007604\r
-#define CYDEV_PHUB_CFGMEM1_BASE 0x40007608\r
-#define CYDEV_PHUB_CFGMEM1_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM1_CFG0 0x40007608\r
-#define CYDEV_PHUB_CFGMEM1_CFG1 0x4000760c\r
-#define CYDEV_PHUB_CFGMEM2_BASE 0x40007610\r
-#define CYDEV_PHUB_CFGMEM2_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM2_CFG0 0x40007610\r
-#define CYDEV_PHUB_CFGMEM2_CFG1 0x40007614\r
-#define CYDEV_PHUB_CFGMEM3_BASE 0x40007618\r
-#define CYDEV_PHUB_CFGMEM3_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM3_CFG0 0x40007618\r
-#define CYDEV_PHUB_CFGMEM3_CFG1 0x4000761c\r
-#define CYDEV_PHUB_CFGMEM4_BASE 0x40007620\r
-#define CYDEV_PHUB_CFGMEM4_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM4_CFG0 0x40007620\r
-#define CYDEV_PHUB_CFGMEM4_CFG1 0x40007624\r
-#define CYDEV_PHUB_CFGMEM5_BASE 0x40007628\r
-#define CYDEV_PHUB_CFGMEM5_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM5_CFG0 0x40007628\r
-#define CYDEV_PHUB_CFGMEM5_CFG1 0x4000762c\r
-#define CYDEV_PHUB_CFGMEM6_BASE 0x40007630\r
-#define CYDEV_PHUB_CFGMEM6_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM6_CFG0 0x40007630\r
-#define CYDEV_PHUB_CFGMEM6_CFG1 0x40007634\r
-#define CYDEV_PHUB_CFGMEM7_BASE 0x40007638\r
-#define CYDEV_PHUB_CFGMEM7_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM7_CFG0 0x40007638\r
-#define CYDEV_PHUB_CFGMEM7_CFG1 0x4000763c\r
-#define CYDEV_PHUB_CFGMEM8_BASE 0x40007640\r
-#define CYDEV_PHUB_CFGMEM8_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM8_CFG0 0x40007640\r
-#define CYDEV_PHUB_CFGMEM8_CFG1 0x40007644\r
-#define CYDEV_PHUB_CFGMEM9_BASE 0x40007648\r
-#define CYDEV_PHUB_CFGMEM9_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM9_CFG0 0x40007648\r
-#define CYDEV_PHUB_CFGMEM9_CFG1 0x4000764c\r
-#define CYDEV_PHUB_CFGMEM10_BASE 0x40007650\r
-#define CYDEV_PHUB_CFGMEM10_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM10_CFG0 0x40007650\r
-#define CYDEV_PHUB_CFGMEM10_CFG1 0x40007654\r
-#define CYDEV_PHUB_CFGMEM11_BASE 0x40007658\r
-#define CYDEV_PHUB_CFGMEM11_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM11_CFG0 0x40007658\r
-#define CYDEV_PHUB_CFGMEM11_CFG1 0x4000765c\r
-#define CYDEV_PHUB_CFGMEM12_BASE 0x40007660\r
-#define CYDEV_PHUB_CFGMEM12_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM12_CFG0 0x40007660\r
-#define CYDEV_PHUB_CFGMEM12_CFG1 0x40007664\r
-#define CYDEV_PHUB_CFGMEM13_BASE 0x40007668\r
-#define CYDEV_PHUB_CFGMEM13_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM13_CFG0 0x40007668\r
-#define CYDEV_PHUB_CFGMEM13_CFG1 0x4000766c\r
-#define CYDEV_PHUB_CFGMEM14_BASE 0x40007670\r
-#define CYDEV_PHUB_CFGMEM14_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM14_CFG0 0x40007670\r
-#define CYDEV_PHUB_CFGMEM14_CFG1 0x40007674\r
-#define CYDEV_PHUB_CFGMEM15_BASE 0x40007678\r
-#define CYDEV_PHUB_CFGMEM15_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM15_CFG0 0x40007678\r
-#define CYDEV_PHUB_CFGMEM15_CFG1 0x4000767c\r
-#define CYDEV_PHUB_CFGMEM16_BASE 0x40007680\r
-#define CYDEV_PHUB_CFGMEM16_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM16_CFG0 0x40007680\r
-#define CYDEV_PHUB_CFGMEM16_CFG1 0x40007684\r
-#define CYDEV_PHUB_CFGMEM17_BASE 0x40007688\r
-#define CYDEV_PHUB_CFGMEM17_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM17_CFG0 0x40007688\r
-#define CYDEV_PHUB_CFGMEM17_CFG1 0x4000768c\r
-#define CYDEV_PHUB_CFGMEM18_BASE 0x40007690\r
-#define CYDEV_PHUB_CFGMEM18_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM18_CFG0 0x40007690\r
-#define CYDEV_PHUB_CFGMEM18_CFG1 0x40007694\r
-#define CYDEV_PHUB_CFGMEM19_BASE 0x40007698\r
-#define CYDEV_PHUB_CFGMEM19_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM19_CFG0 0x40007698\r
-#define CYDEV_PHUB_CFGMEM19_CFG1 0x4000769c\r
-#define CYDEV_PHUB_CFGMEM20_BASE 0x400076a0\r
-#define CYDEV_PHUB_CFGMEM20_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM20_CFG0 0x400076a0\r
-#define CYDEV_PHUB_CFGMEM20_CFG1 0x400076a4\r
-#define CYDEV_PHUB_CFGMEM21_BASE 0x400076a8\r
-#define CYDEV_PHUB_CFGMEM21_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM21_CFG0 0x400076a8\r
-#define CYDEV_PHUB_CFGMEM21_CFG1 0x400076ac\r
-#define CYDEV_PHUB_CFGMEM22_BASE 0x400076b0\r
-#define CYDEV_PHUB_CFGMEM22_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM22_CFG0 0x400076b0\r
-#define CYDEV_PHUB_CFGMEM22_CFG1 0x400076b4\r
-#define CYDEV_PHUB_CFGMEM23_BASE 0x400076b8\r
-#define CYDEV_PHUB_CFGMEM23_SIZE 0x00000008\r
-#define CYDEV_PHUB_CFGMEM23_CFG0 0x400076b8\r
-#define CYDEV_PHUB_CFGMEM23_CFG1 0x400076bc\r
-#define CYDEV_PHUB_TDMEM0_BASE 0x40007800\r
-#define CYDEV_PHUB_TDMEM0_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM0_ORIG_TD0 0x40007800\r
-#define CYDEV_PHUB_TDMEM0_ORIG_TD1 0x40007804\r
-#define CYDEV_PHUB_TDMEM1_BASE 0x40007808\r
-#define CYDEV_PHUB_TDMEM1_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM1_ORIG_TD0 0x40007808\r
-#define CYDEV_PHUB_TDMEM1_ORIG_TD1 0x4000780c\r
-#define CYDEV_PHUB_TDMEM2_BASE 0x40007810\r
-#define CYDEV_PHUB_TDMEM2_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM2_ORIG_TD0 0x40007810\r
-#define CYDEV_PHUB_TDMEM2_ORIG_TD1 0x40007814\r
-#define CYDEV_PHUB_TDMEM3_BASE 0x40007818\r
-#define CYDEV_PHUB_TDMEM3_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM3_ORIG_TD0 0x40007818\r
-#define CYDEV_PHUB_TDMEM3_ORIG_TD1 0x4000781c\r
-#define CYDEV_PHUB_TDMEM4_BASE 0x40007820\r
-#define CYDEV_PHUB_TDMEM4_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM4_ORIG_TD0 0x40007820\r
-#define CYDEV_PHUB_TDMEM4_ORIG_TD1 0x40007824\r
-#define CYDEV_PHUB_TDMEM5_BASE 0x40007828\r
-#define CYDEV_PHUB_TDMEM5_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM5_ORIG_TD0 0x40007828\r
-#define CYDEV_PHUB_TDMEM5_ORIG_TD1 0x4000782c\r
-#define CYDEV_PHUB_TDMEM6_BASE 0x40007830\r
-#define CYDEV_PHUB_TDMEM6_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM6_ORIG_TD0 0x40007830\r
-#define CYDEV_PHUB_TDMEM6_ORIG_TD1 0x40007834\r
-#define CYDEV_PHUB_TDMEM7_BASE 0x40007838\r
-#define CYDEV_PHUB_TDMEM7_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM7_ORIG_TD0 0x40007838\r
-#define CYDEV_PHUB_TDMEM7_ORIG_TD1 0x4000783c\r
-#define CYDEV_PHUB_TDMEM8_BASE 0x40007840\r
-#define CYDEV_PHUB_TDMEM8_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM8_ORIG_TD0 0x40007840\r
-#define CYDEV_PHUB_TDMEM8_ORIG_TD1 0x40007844\r
-#define CYDEV_PHUB_TDMEM9_BASE 0x40007848\r
-#define CYDEV_PHUB_TDMEM9_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM9_ORIG_TD0 0x40007848\r
-#define CYDEV_PHUB_TDMEM9_ORIG_TD1 0x4000784c\r
-#define CYDEV_PHUB_TDMEM10_BASE 0x40007850\r
-#define CYDEV_PHUB_TDMEM10_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM10_ORIG_TD0 0x40007850\r
-#define CYDEV_PHUB_TDMEM10_ORIG_TD1 0x40007854\r
-#define CYDEV_PHUB_TDMEM11_BASE 0x40007858\r
-#define CYDEV_PHUB_TDMEM11_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM11_ORIG_TD0 0x40007858\r
-#define CYDEV_PHUB_TDMEM11_ORIG_TD1 0x4000785c\r
-#define CYDEV_PHUB_TDMEM12_BASE 0x40007860\r
-#define CYDEV_PHUB_TDMEM12_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM12_ORIG_TD0 0x40007860\r
-#define CYDEV_PHUB_TDMEM12_ORIG_TD1 0x40007864\r
-#define CYDEV_PHUB_TDMEM13_BASE 0x40007868\r
-#define CYDEV_PHUB_TDMEM13_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM13_ORIG_TD0 0x40007868\r
-#define CYDEV_PHUB_TDMEM13_ORIG_TD1 0x4000786c\r
-#define CYDEV_PHUB_TDMEM14_BASE 0x40007870\r
-#define CYDEV_PHUB_TDMEM14_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM14_ORIG_TD0 0x40007870\r
-#define CYDEV_PHUB_TDMEM14_ORIG_TD1 0x40007874\r
-#define CYDEV_PHUB_TDMEM15_BASE 0x40007878\r
-#define CYDEV_PHUB_TDMEM15_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM15_ORIG_TD0 0x40007878\r
-#define CYDEV_PHUB_TDMEM15_ORIG_TD1 0x4000787c\r
-#define CYDEV_PHUB_TDMEM16_BASE 0x40007880\r
-#define CYDEV_PHUB_TDMEM16_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM16_ORIG_TD0 0x40007880\r
-#define CYDEV_PHUB_TDMEM16_ORIG_TD1 0x40007884\r
-#define CYDEV_PHUB_TDMEM17_BASE 0x40007888\r
-#define CYDEV_PHUB_TDMEM17_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM17_ORIG_TD0 0x40007888\r
-#define CYDEV_PHUB_TDMEM17_ORIG_TD1 0x4000788c\r
-#define CYDEV_PHUB_TDMEM18_BASE 0x40007890\r
-#define CYDEV_PHUB_TDMEM18_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM18_ORIG_TD0 0x40007890\r
-#define CYDEV_PHUB_TDMEM18_ORIG_TD1 0x40007894\r
-#define CYDEV_PHUB_TDMEM19_BASE 0x40007898\r
-#define CYDEV_PHUB_TDMEM19_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM19_ORIG_TD0 0x40007898\r
-#define CYDEV_PHUB_TDMEM19_ORIG_TD1 0x4000789c\r
-#define CYDEV_PHUB_TDMEM20_BASE 0x400078a0\r
-#define CYDEV_PHUB_TDMEM20_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM20_ORIG_TD0 0x400078a0\r
-#define CYDEV_PHUB_TDMEM20_ORIG_TD1 0x400078a4\r
-#define CYDEV_PHUB_TDMEM21_BASE 0x400078a8\r
-#define CYDEV_PHUB_TDMEM21_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM21_ORIG_TD0 0x400078a8\r
-#define CYDEV_PHUB_TDMEM21_ORIG_TD1 0x400078ac\r
-#define CYDEV_PHUB_TDMEM22_BASE 0x400078b0\r
-#define CYDEV_PHUB_TDMEM22_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM22_ORIG_TD0 0x400078b0\r
-#define CYDEV_PHUB_TDMEM22_ORIG_TD1 0x400078b4\r
-#define CYDEV_PHUB_TDMEM23_BASE 0x400078b8\r
-#define CYDEV_PHUB_TDMEM23_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM23_ORIG_TD0 0x400078b8\r
-#define CYDEV_PHUB_TDMEM23_ORIG_TD1 0x400078bc\r
-#define CYDEV_PHUB_TDMEM24_BASE 0x400078c0\r
-#define CYDEV_PHUB_TDMEM24_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM24_ORIG_TD0 0x400078c0\r
-#define CYDEV_PHUB_TDMEM24_ORIG_TD1 0x400078c4\r
-#define CYDEV_PHUB_TDMEM25_BASE 0x400078c8\r
-#define CYDEV_PHUB_TDMEM25_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM25_ORIG_TD0 0x400078c8\r
-#define CYDEV_PHUB_TDMEM25_ORIG_TD1 0x400078cc\r
-#define CYDEV_PHUB_TDMEM26_BASE 0x400078d0\r
-#define CYDEV_PHUB_TDMEM26_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM26_ORIG_TD0 0x400078d0\r
-#define CYDEV_PHUB_TDMEM26_ORIG_TD1 0x400078d4\r
-#define CYDEV_PHUB_TDMEM27_BASE 0x400078d8\r
-#define CYDEV_PHUB_TDMEM27_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM27_ORIG_TD0 0x400078d8\r
-#define CYDEV_PHUB_TDMEM27_ORIG_TD1 0x400078dc\r
-#define CYDEV_PHUB_TDMEM28_BASE 0x400078e0\r
-#define CYDEV_PHUB_TDMEM28_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM28_ORIG_TD0 0x400078e0\r
-#define CYDEV_PHUB_TDMEM28_ORIG_TD1 0x400078e4\r
-#define CYDEV_PHUB_TDMEM29_BASE 0x400078e8\r
-#define CYDEV_PHUB_TDMEM29_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM29_ORIG_TD0 0x400078e8\r
-#define CYDEV_PHUB_TDMEM29_ORIG_TD1 0x400078ec\r
-#define CYDEV_PHUB_TDMEM30_BASE 0x400078f0\r
-#define CYDEV_PHUB_TDMEM30_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM30_ORIG_TD0 0x400078f0\r
-#define CYDEV_PHUB_TDMEM30_ORIG_TD1 0x400078f4\r
-#define CYDEV_PHUB_TDMEM31_BASE 0x400078f8\r
-#define CYDEV_PHUB_TDMEM31_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM31_ORIG_TD0 0x400078f8\r
-#define CYDEV_PHUB_TDMEM31_ORIG_TD1 0x400078fc\r
-#define CYDEV_PHUB_TDMEM32_BASE 0x40007900\r
-#define CYDEV_PHUB_TDMEM32_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM32_ORIG_TD0 0x40007900\r
-#define CYDEV_PHUB_TDMEM32_ORIG_TD1 0x40007904\r
-#define CYDEV_PHUB_TDMEM33_BASE 0x40007908\r
-#define CYDEV_PHUB_TDMEM33_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM33_ORIG_TD0 0x40007908\r
-#define CYDEV_PHUB_TDMEM33_ORIG_TD1 0x4000790c\r
-#define CYDEV_PHUB_TDMEM34_BASE 0x40007910\r
-#define CYDEV_PHUB_TDMEM34_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM34_ORIG_TD0 0x40007910\r
-#define CYDEV_PHUB_TDMEM34_ORIG_TD1 0x40007914\r
-#define CYDEV_PHUB_TDMEM35_BASE 0x40007918\r
-#define CYDEV_PHUB_TDMEM35_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM35_ORIG_TD0 0x40007918\r
-#define CYDEV_PHUB_TDMEM35_ORIG_TD1 0x4000791c\r
-#define CYDEV_PHUB_TDMEM36_BASE 0x40007920\r
-#define CYDEV_PHUB_TDMEM36_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM36_ORIG_TD0 0x40007920\r
-#define CYDEV_PHUB_TDMEM36_ORIG_TD1 0x40007924\r
-#define CYDEV_PHUB_TDMEM37_BASE 0x40007928\r
-#define CYDEV_PHUB_TDMEM37_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM37_ORIG_TD0 0x40007928\r
-#define CYDEV_PHUB_TDMEM37_ORIG_TD1 0x4000792c\r
-#define CYDEV_PHUB_TDMEM38_BASE 0x40007930\r
-#define CYDEV_PHUB_TDMEM38_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM38_ORIG_TD0 0x40007930\r
-#define CYDEV_PHUB_TDMEM38_ORIG_TD1 0x40007934\r
-#define CYDEV_PHUB_TDMEM39_BASE 0x40007938\r
-#define CYDEV_PHUB_TDMEM39_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM39_ORIG_TD0 0x40007938\r
-#define CYDEV_PHUB_TDMEM39_ORIG_TD1 0x4000793c\r
-#define CYDEV_PHUB_TDMEM40_BASE 0x40007940\r
-#define CYDEV_PHUB_TDMEM40_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM40_ORIG_TD0 0x40007940\r
-#define CYDEV_PHUB_TDMEM40_ORIG_TD1 0x40007944\r
-#define CYDEV_PHUB_TDMEM41_BASE 0x40007948\r
-#define CYDEV_PHUB_TDMEM41_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM41_ORIG_TD0 0x40007948\r
-#define CYDEV_PHUB_TDMEM41_ORIG_TD1 0x4000794c\r
-#define CYDEV_PHUB_TDMEM42_BASE 0x40007950\r
-#define CYDEV_PHUB_TDMEM42_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM42_ORIG_TD0 0x40007950\r
-#define CYDEV_PHUB_TDMEM42_ORIG_TD1 0x40007954\r
-#define CYDEV_PHUB_TDMEM43_BASE 0x40007958\r
-#define CYDEV_PHUB_TDMEM43_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM43_ORIG_TD0 0x40007958\r
-#define CYDEV_PHUB_TDMEM43_ORIG_TD1 0x4000795c\r
-#define CYDEV_PHUB_TDMEM44_BASE 0x40007960\r
-#define CYDEV_PHUB_TDMEM44_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM44_ORIG_TD0 0x40007960\r
-#define CYDEV_PHUB_TDMEM44_ORIG_TD1 0x40007964\r
-#define CYDEV_PHUB_TDMEM45_BASE 0x40007968\r
-#define CYDEV_PHUB_TDMEM45_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM45_ORIG_TD0 0x40007968\r
-#define CYDEV_PHUB_TDMEM45_ORIG_TD1 0x4000796c\r
-#define CYDEV_PHUB_TDMEM46_BASE 0x40007970\r
-#define CYDEV_PHUB_TDMEM46_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM46_ORIG_TD0 0x40007970\r
-#define CYDEV_PHUB_TDMEM46_ORIG_TD1 0x40007974\r
-#define CYDEV_PHUB_TDMEM47_BASE 0x40007978\r
-#define CYDEV_PHUB_TDMEM47_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM47_ORIG_TD0 0x40007978\r
-#define CYDEV_PHUB_TDMEM47_ORIG_TD1 0x4000797c\r
-#define CYDEV_PHUB_TDMEM48_BASE 0x40007980\r
-#define CYDEV_PHUB_TDMEM48_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM48_ORIG_TD0 0x40007980\r
-#define CYDEV_PHUB_TDMEM48_ORIG_TD1 0x40007984\r
-#define CYDEV_PHUB_TDMEM49_BASE 0x40007988\r
-#define CYDEV_PHUB_TDMEM49_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM49_ORIG_TD0 0x40007988\r
-#define CYDEV_PHUB_TDMEM49_ORIG_TD1 0x4000798c\r
-#define CYDEV_PHUB_TDMEM50_BASE 0x40007990\r
-#define CYDEV_PHUB_TDMEM50_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM50_ORIG_TD0 0x40007990\r
-#define CYDEV_PHUB_TDMEM50_ORIG_TD1 0x40007994\r
-#define CYDEV_PHUB_TDMEM51_BASE 0x40007998\r
-#define CYDEV_PHUB_TDMEM51_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM51_ORIG_TD0 0x40007998\r
-#define CYDEV_PHUB_TDMEM51_ORIG_TD1 0x4000799c\r
-#define CYDEV_PHUB_TDMEM52_BASE 0x400079a0\r
-#define CYDEV_PHUB_TDMEM52_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM52_ORIG_TD0 0x400079a0\r
-#define CYDEV_PHUB_TDMEM52_ORIG_TD1 0x400079a4\r
-#define CYDEV_PHUB_TDMEM53_BASE 0x400079a8\r
-#define CYDEV_PHUB_TDMEM53_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM53_ORIG_TD0 0x400079a8\r
-#define CYDEV_PHUB_TDMEM53_ORIG_TD1 0x400079ac\r
-#define CYDEV_PHUB_TDMEM54_BASE 0x400079b0\r
-#define CYDEV_PHUB_TDMEM54_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM54_ORIG_TD0 0x400079b0\r
-#define CYDEV_PHUB_TDMEM54_ORIG_TD1 0x400079b4\r
-#define CYDEV_PHUB_TDMEM55_BASE 0x400079b8\r
-#define CYDEV_PHUB_TDMEM55_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM55_ORIG_TD0 0x400079b8\r
-#define CYDEV_PHUB_TDMEM55_ORIG_TD1 0x400079bc\r
-#define CYDEV_PHUB_TDMEM56_BASE 0x400079c0\r
-#define CYDEV_PHUB_TDMEM56_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM56_ORIG_TD0 0x400079c0\r
-#define CYDEV_PHUB_TDMEM56_ORIG_TD1 0x400079c4\r
-#define CYDEV_PHUB_TDMEM57_BASE 0x400079c8\r
-#define CYDEV_PHUB_TDMEM57_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM57_ORIG_TD0 0x400079c8\r
-#define CYDEV_PHUB_TDMEM57_ORIG_TD1 0x400079cc\r
-#define CYDEV_PHUB_TDMEM58_BASE 0x400079d0\r
-#define CYDEV_PHUB_TDMEM58_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM58_ORIG_TD0 0x400079d0\r
-#define CYDEV_PHUB_TDMEM58_ORIG_TD1 0x400079d4\r
-#define CYDEV_PHUB_TDMEM59_BASE 0x400079d8\r
-#define CYDEV_PHUB_TDMEM59_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM59_ORIG_TD0 0x400079d8\r
-#define CYDEV_PHUB_TDMEM59_ORIG_TD1 0x400079dc\r
-#define CYDEV_PHUB_TDMEM60_BASE 0x400079e0\r
-#define CYDEV_PHUB_TDMEM60_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM60_ORIG_TD0 0x400079e0\r
-#define CYDEV_PHUB_TDMEM60_ORIG_TD1 0x400079e4\r
-#define CYDEV_PHUB_TDMEM61_BASE 0x400079e8\r
-#define CYDEV_PHUB_TDMEM61_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM61_ORIG_TD0 0x400079e8\r
-#define CYDEV_PHUB_TDMEM61_ORIG_TD1 0x400079ec\r
-#define CYDEV_PHUB_TDMEM62_BASE 0x400079f0\r
-#define CYDEV_PHUB_TDMEM62_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM62_ORIG_TD0 0x400079f0\r
-#define CYDEV_PHUB_TDMEM62_ORIG_TD1 0x400079f4\r
-#define CYDEV_PHUB_TDMEM63_BASE 0x400079f8\r
-#define CYDEV_PHUB_TDMEM63_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM63_ORIG_TD0 0x400079f8\r
-#define CYDEV_PHUB_TDMEM63_ORIG_TD1 0x400079fc\r
-#define CYDEV_PHUB_TDMEM64_BASE 0x40007a00\r
-#define CYDEV_PHUB_TDMEM64_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM64_ORIG_TD0 0x40007a00\r
-#define CYDEV_PHUB_TDMEM64_ORIG_TD1 0x40007a04\r
-#define CYDEV_PHUB_TDMEM65_BASE 0x40007a08\r
-#define CYDEV_PHUB_TDMEM65_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM65_ORIG_TD0 0x40007a08\r
-#define CYDEV_PHUB_TDMEM65_ORIG_TD1 0x40007a0c\r
-#define CYDEV_PHUB_TDMEM66_BASE 0x40007a10\r
-#define CYDEV_PHUB_TDMEM66_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM66_ORIG_TD0 0x40007a10\r
-#define CYDEV_PHUB_TDMEM66_ORIG_TD1 0x40007a14\r
-#define CYDEV_PHUB_TDMEM67_BASE 0x40007a18\r
-#define CYDEV_PHUB_TDMEM67_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM67_ORIG_TD0 0x40007a18\r
-#define CYDEV_PHUB_TDMEM67_ORIG_TD1 0x40007a1c\r
-#define CYDEV_PHUB_TDMEM68_BASE 0x40007a20\r
-#define CYDEV_PHUB_TDMEM68_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM68_ORIG_TD0 0x40007a20\r
-#define CYDEV_PHUB_TDMEM68_ORIG_TD1 0x40007a24\r
-#define CYDEV_PHUB_TDMEM69_BASE 0x40007a28\r
-#define CYDEV_PHUB_TDMEM69_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM69_ORIG_TD0 0x40007a28\r
-#define CYDEV_PHUB_TDMEM69_ORIG_TD1 0x40007a2c\r
-#define CYDEV_PHUB_TDMEM70_BASE 0x40007a30\r
-#define CYDEV_PHUB_TDMEM70_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM70_ORIG_TD0 0x40007a30\r
-#define CYDEV_PHUB_TDMEM70_ORIG_TD1 0x40007a34\r
-#define CYDEV_PHUB_TDMEM71_BASE 0x40007a38\r
-#define CYDEV_PHUB_TDMEM71_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM71_ORIG_TD0 0x40007a38\r
-#define CYDEV_PHUB_TDMEM71_ORIG_TD1 0x40007a3c\r
-#define CYDEV_PHUB_TDMEM72_BASE 0x40007a40\r
-#define CYDEV_PHUB_TDMEM72_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM72_ORIG_TD0 0x40007a40\r
-#define CYDEV_PHUB_TDMEM72_ORIG_TD1 0x40007a44\r
-#define CYDEV_PHUB_TDMEM73_BASE 0x40007a48\r
-#define CYDEV_PHUB_TDMEM73_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM73_ORIG_TD0 0x40007a48\r
-#define CYDEV_PHUB_TDMEM73_ORIG_TD1 0x40007a4c\r
-#define CYDEV_PHUB_TDMEM74_BASE 0x40007a50\r
-#define CYDEV_PHUB_TDMEM74_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM74_ORIG_TD0 0x40007a50\r
-#define CYDEV_PHUB_TDMEM74_ORIG_TD1 0x40007a54\r
-#define CYDEV_PHUB_TDMEM75_BASE 0x40007a58\r
-#define CYDEV_PHUB_TDMEM75_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM75_ORIG_TD0 0x40007a58\r
-#define CYDEV_PHUB_TDMEM75_ORIG_TD1 0x40007a5c\r
-#define CYDEV_PHUB_TDMEM76_BASE 0x40007a60\r
-#define CYDEV_PHUB_TDMEM76_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM76_ORIG_TD0 0x40007a60\r
-#define CYDEV_PHUB_TDMEM76_ORIG_TD1 0x40007a64\r
-#define CYDEV_PHUB_TDMEM77_BASE 0x40007a68\r
-#define CYDEV_PHUB_TDMEM77_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM77_ORIG_TD0 0x40007a68\r
-#define CYDEV_PHUB_TDMEM77_ORIG_TD1 0x40007a6c\r
-#define CYDEV_PHUB_TDMEM78_BASE 0x40007a70\r
-#define CYDEV_PHUB_TDMEM78_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM78_ORIG_TD0 0x40007a70\r
-#define CYDEV_PHUB_TDMEM78_ORIG_TD1 0x40007a74\r
-#define CYDEV_PHUB_TDMEM79_BASE 0x40007a78\r
-#define CYDEV_PHUB_TDMEM79_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM79_ORIG_TD0 0x40007a78\r
-#define CYDEV_PHUB_TDMEM79_ORIG_TD1 0x40007a7c\r
-#define CYDEV_PHUB_TDMEM80_BASE 0x40007a80\r
-#define CYDEV_PHUB_TDMEM80_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM80_ORIG_TD0 0x40007a80\r
-#define CYDEV_PHUB_TDMEM80_ORIG_TD1 0x40007a84\r
-#define CYDEV_PHUB_TDMEM81_BASE 0x40007a88\r
-#define CYDEV_PHUB_TDMEM81_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM81_ORIG_TD0 0x40007a88\r
-#define CYDEV_PHUB_TDMEM81_ORIG_TD1 0x40007a8c\r
-#define CYDEV_PHUB_TDMEM82_BASE 0x40007a90\r
-#define CYDEV_PHUB_TDMEM82_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM82_ORIG_TD0 0x40007a90\r
-#define CYDEV_PHUB_TDMEM82_ORIG_TD1 0x40007a94\r
-#define CYDEV_PHUB_TDMEM83_BASE 0x40007a98\r
-#define CYDEV_PHUB_TDMEM83_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM83_ORIG_TD0 0x40007a98\r
-#define CYDEV_PHUB_TDMEM83_ORIG_TD1 0x40007a9c\r
-#define CYDEV_PHUB_TDMEM84_BASE 0x40007aa0\r
-#define CYDEV_PHUB_TDMEM84_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM84_ORIG_TD0 0x40007aa0\r
-#define CYDEV_PHUB_TDMEM84_ORIG_TD1 0x40007aa4\r
-#define CYDEV_PHUB_TDMEM85_BASE 0x40007aa8\r
-#define CYDEV_PHUB_TDMEM85_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM85_ORIG_TD0 0x40007aa8\r
-#define CYDEV_PHUB_TDMEM85_ORIG_TD1 0x40007aac\r
-#define CYDEV_PHUB_TDMEM86_BASE 0x40007ab0\r
-#define CYDEV_PHUB_TDMEM86_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM86_ORIG_TD0 0x40007ab0\r
-#define CYDEV_PHUB_TDMEM86_ORIG_TD1 0x40007ab4\r
-#define CYDEV_PHUB_TDMEM87_BASE 0x40007ab8\r
-#define CYDEV_PHUB_TDMEM87_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM87_ORIG_TD0 0x40007ab8\r
-#define CYDEV_PHUB_TDMEM87_ORIG_TD1 0x40007abc\r
-#define CYDEV_PHUB_TDMEM88_BASE 0x40007ac0\r
-#define CYDEV_PHUB_TDMEM88_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM88_ORIG_TD0 0x40007ac0\r
-#define CYDEV_PHUB_TDMEM88_ORIG_TD1 0x40007ac4\r
-#define CYDEV_PHUB_TDMEM89_BASE 0x40007ac8\r
-#define CYDEV_PHUB_TDMEM89_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM89_ORIG_TD0 0x40007ac8\r
-#define CYDEV_PHUB_TDMEM89_ORIG_TD1 0x40007acc\r
-#define CYDEV_PHUB_TDMEM90_BASE 0x40007ad0\r
-#define CYDEV_PHUB_TDMEM90_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM90_ORIG_TD0 0x40007ad0\r
-#define CYDEV_PHUB_TDMEM90_ORIG_TD1 0x40007ad4\r
-#define CYDEV_PHUB_TDMEM91_BASE 0x40007ad8\r
-#define CYDEV_PHUB_TDMEM91_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM91_ORIG_TD0 0x40007ad8\r
-#define CYDEV_PHUB_TDMEM91_ORIG_TD1 0x40007adc\r
-#define CYDEV_PHUB_TDMEM92_BASE 0x40007ae0\r
-#define CYDEV_PHUB_TDMEM92_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM92_ORIG_TD0 0x40007ae0\r
-#define CYDEV_PHUB_TDMEM92_ORIG_TD1 0x40007ae4\r
-#define CYDEV_PHUB_TDMEM93_BASE 0x40007ae8\r
-#define CYDEV_PHUB_TDMEM93_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM93_ORIG_TD0 0x40007ae8\r
-#define CYDEV_PHUB_TDMEM93_ORIG_TD1 0x40007aec\r
-#define CYDEV_PHUB_TDMEM94_BASE 0x40007af0\r
-#define CYDEV_PHUB_TDMEM94_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM94_ORIG_TD0 0x40007af0\r
-#define CYDEV_PHUB_TDMEM94_ORIG_TD1 0x40007af4\r
-#define CYDEV_PHUB_TDMEM95_BASE 0x40007af8\r
-#define CYDEV_PHUB_TDMEM95_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM95_ORIG_TD0 0x40007af8\r
-#define CYDEV_PHUB_TDMEM95_ORIG_TD1 0x40007afc\r
-#define CYDEV_PHUB_TDMEM96_BASE 0x40007b00\r
-#define CYDEV_PHUB_TDMEM96_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM96_ORIG_TD0 0x40007b00\r
-#define CYDEV_PHUB_TDMEM96_ORIG_TD1 0x40007b04\r
-#define CYDEV_PHUB_TDMEM97_BASE 0x40007b08\r
-#define CYDEV_PHUB_TDMEM97_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM97_ORIG_TD0 0x40007b08\r
-#define CYDEV_PHUB_TDMEM97_ORIG_TD1 0x40007b0c\r
-#define CYDEV_PHUB_TDMEM98_BASE 0x40007b10\r
-#define CYDEV_PHUB_TDMEM98_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM98_ORIG_TD0 0x40007b10\r
-#define CYDEV_PHUB_TDMEM98_ORIG_TD1 0x40007b14\r
-#define CYDEV_PHUB_TDMEM99_BASE 0x40007b18\r
-#define CYDEV_PHUB_TDMEM99_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM99_ORIG_TD0 0x40007b18\r
-#define CYDEV_PHUB_TDMEM99_ORIG_TD1 0x40007b1c\r
-#define CYDEV_PHUB_TDMEM100_BASE 0x40007b20\r
-#define CYDEV_PHUB_TDMEM100_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM100_ORIG_TD0 0x40007b20\r
-#define CYDEV_PHUB_TDMEM100_ORIG_TD1 0x40007b24\r
-#define CYDEV_PHUB_TDMEM101_BASE 0x40007b28\r
-#define CYDEV_PHUB_TDMEM101_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM101_ORIG_TD0 0x40007b28\r
-#define CYDEV_PHUB_TDMEM101_ORIG_TD1 0x40007b2c\r
-#define CYDEV_PHUB_TDMEM102_BASE 0x40007b30\r
-#define CYDEV_PHUB_TDMEM102_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM102_ORIG_TD0 0x40007b30\r
-#define CYDEV_PHUB_TDMEM102_ORIG_TD1 0x40007b34\r
-#define CYDEV_PHUB_TDMEM103_BASE 0x40007b38\r
-#define CYDEV_PHUB_TDMEM103_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM103_ORIG_TD0 0x40007b38\r
-#define CYDEV_PHUB_TDMEM103_ORIG_TD1 0x40007b3c\r
-#define CYDEV_PHUB_TDMEM104_BASE 0x40007b40\r
-#define CYDEV_PHUB_TDMEM104_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM104_ORIG_TD0 0x40007b40\r
-#define CYDEV_PHUB_TDMEM104_ORIG_TD1 0x40007b44\r
-#define CYDEV_PHUB_TDMEM105_BASE 0x40007b48\r
-#define CYDEV_PHUB_TDMEM105_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM105_ORIG_TD0 0x40007b48\r
-#define CYDEV_PHUB_TDMEM105_ORIG_TD1 0x40007b4c\r
-#define CYDEV_PHUB_TDMEM106_BASE 0x40007b50\r
-#define CYDEV_PHUB_TDMEM106_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM106_ORIG_TD0 0x40007b50\r
-#define CYDEV_PHUB_TDMEM106_ORIG_TD1 0x40007b54\r
-#define CYDEV_PHUB_TDMEM107_BASE 0x40007b58\r
-#define CYDEV_PHUB_TDMEM107_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM107_ORIG_TD0 0x40007b58\r
-#define CYDEV_PHUB_TDMEM107_ORIG_TD1 0x40007b5c\r
-#define CYDEV_PHUB_TDMEM108_BASE 0x40007b60\r
-#define CYDEV_PHUB_TDMEM108_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM108_ORIG_TD0 0x40007b60\r
-#define CYDEV_PHUB_TDMEM108_ORIG_TD1 0x40007b64\r
-#define CYDEV_PHUB_TDMEM109_BASE 0x40007b68\r
-#define CYDEV_PHUB_TDMEM109_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM109_ORIG_TD0 0x40007b68\r
-#define CYDEV_PHUB_TDMEM109_ORIG_TD1 0x40007b6c\r
-#define CYDEV_PHUB_TDMEM110_BASE 0x40007b70\r
-#define CYDEV_PHUB_TDMEM110_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM110_ORIG_TD0 0x40007b70\r
-#define CYDEV_PHUB_TDMEM110_ORIG_TD1 0x40007b74\r
-#define CYDEV_PHUB_TDMEM111_BASE 0x40007b78\r
-#define CYDEV_PHUB_TDMEM111_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM111_ORIG_TD0 0x40007b78\r
-#define CYDEV_PHUB_TDMEM111_ORIG_TD1 0x40007b7c\r
-#define CYDEV_PHUB_TDMEM112_BASE 0x40007b80\r
-#define CYDEV_PHUB_TDMEM112_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM112_ORIG_TD0 0x40007b80\r
-#define CYDEV_PHUB_TDMEM112_ORIG_TD1 0x40007b84\r
-#define CYDEV_PHUB_TDMEM113_BASE 0x40007b88\r
-#define CYDEV_PHUB_TDMEM113_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM113_ORIG_TD0 0x40007b88\r
-#define CYDEV_PHUB_TDMEM113_ORIG_TD1 0x40007b8c\r
-#define CYDEV_PHUB_TDMEM114_BASE 0x40007b90\r
-#define CYDEV_PHUB_TDMEM114_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM114_ORIG_TD0 0x40007b90\r
-#define CYDEV_PHUB_TDMEM114_ORIG_TD1 0x40007b94\r
-#define CYDEV_PHUB_TDMEM115_BASE 0x40007b98\r
-#define CYDEV_PHUB_TDMEM115_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM115_ORIG_TD0 0x40007b98\r
-#define CYDEV_PHUB_TDMEM115_ORIG_TD1 0x40007b9c\r
-#define CYDEV_PHUB_TDMEM116_BASE 0x40007ba0\r
-#define CYDEV_PHUB_TDMEM116_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM116_ORIG_TD0 0x40007ba0\r
-#define CYDEV_PHUB_TDMEM116_ORIG_TD1 0x40007ba4\r
-#define CYDEV_PHUB_TDMEM117_BASE 0x40007ba8\r
-#define CYDEV_PHUB_TDMEM117_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM117_ORIG_TD0 0x40007ba8\r
-#define CYDEV_PHUB_TDMEM117_ORIG_TD1 0x40007bac\r
-#define CYDEV_PHUB_TDMEM118_BASE 0x40007bb0\r
-#define CYDEV_PHUB_TDMEM118_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM118_ORIG_TD0 0x40007bb0\r
-#define CYDEV_PHUB_TDMEM118_ORIG_TD1 0x40007bb4\r
-#define CYDEV_PHUB_TDMEM119_BASE 0x40007bb8\r
-#define CYDEV_PHUB_TDMEM119_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM119_ORIG_TD0 0x40007bb8\r
-#define CYDEV_PHUB_TDMEM119_ORIG_TD1 0x40007bbc\r
-#define CYDEV_PHUB_TDMEM120_BASE 0x40007bc0\r
-#define CYDEV_PHUB_TDMEM120_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM120_ORIG_TD0 0x40007bc0\r
-#define CYDEV_PHUB_TDMEM120_ORIG_TD1 0x40007bc4\r
-#define CYDEV_PHUB_TDMEM121_BASE 0x40007bc8\r
-#define CYDEV_PHUB_TDMEM121_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM121_ORIG_TD0 0x40007bc8\r
-#define CYDEV_PHUB_TDMEM121_ORIG_TD1 0x40007bcc\r
-#define CYDEV_PHUB_TDMEM122_BASE 0x40007bd0\r
-#define CYDEV_PHUB_TDMEM122_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM122_ORIG_TD0 0x40007bd0\r
-#define CYDEV_PHUB_TDMEM122_ORIG_TD1 0x40007bd4\r
-#define CYDEV_PHUB_TDMEM123_BASE 0x40007bd8\r
-#define CYDEV_PHUB_TDMEM123_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM123_ORIG_TD0 0x40007bd8\r
-#define CYDEV_PHUB_TDMEM123_ORIG_TD1 0x40007bdc\r
-#define CYDEV_PHUB_TDMEM124_BASE 0x40007be0\r
-#define CYDEV_PHUB_TDMEM124_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM124_ORIG_TD0 0x40007be0\r
-#define CYDEV_PHUB_TDMEM124_ORIG_TD1 0x40007be4\r
-#define CYDEV_PHUB_TDMEM125_BASE 0x40007be8\r
-#define CYDEV_PHUB_TDMEM125_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM125_ORIG_TD0 0x40007be8\r
-#define CYDEV_PHUB_TDMEM125_ORIG_TD1 0x40007bec\r
-#define CYDEV_PHUB_TDMEM126_BASE 0x40007bf0\r
-#define CYDEV_PHUB_TDMEM126_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM126_ORIG_TD0 0x40007bf0\r
-#define CYDEV_PHUB_TDMEM126_ORIG_TD1 0x40007bf4\r
-#define CYDEV_PHUB_TDMEM127_BASE 0x40007bf8\r
-#define CYDEV_PHUB_TDMEM127_SIZE 0x00000008\r
-#define CYDEV_PHUB_TDMEM127_ORIG_TD0 0x40007bf8\r
-#define CYDEV_PHUB_TDMEM127_ORIG_TD1 0x40007bfc\r
-#define CYDEV_EE_BASE 0x40008000\r
-#define CYDEV_EE_SIZE 0x00000800\r
-#define CYDEV_EE_DATA_MBASE 0x40008000\r
-#define CYDEV_EE_DATA_MSIZE 0x00000800\r
-#define CYDEV_CAN0_BASE 0x4000a000\r
-#define CYDEV_CAN0_SIZE 0x000002a0\r
-#define CYDEV_CAN0_CSR_BASE 0x4000a000\r
-#define CYDEV_CAN0_CSR_SIZE 0x00000018\r
-#define CYDEV_CAN0_CSR_INT_SR 0x4000a000\r
-#define CYDEV_CAN0_CSR_INT_EN 0x4000a004\r
-#define CYDEV_CAN0_CSR_BUF_SR 0x4000a008\r
-#define CYDEV_CAN0_CSR_ERR_SR 0x4000a00c\r
-#define CYDEV_CAN0_CSR_CMD 0x4000a010\r
-#define CYDEV_CAN0_CSR_CFG 0x4000a014\r
-#define CYDEV_CAN0_TX0_BASE 0x4000a020\r
-#define CYDEV_CAN0_TX0_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX0_CMD 0x4000a020\r
-#define CYDEV_CAN0_TX0_ID 0x4000a024\r
-#define CYDEV_CAN0_TX0_DH 0x4000a028\r
-#define CYDEV_CAN0_TX0_DL 0x4000a02c\r
-#define CYDEV_CAN0_TX1_BASE 0x4000a030\r
-#define CYDEV_CAN0_TX1_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX1_CMD 0x4000a030\r
-#define CYDEV_CAN0_TX1_ID 0x4000a034\r
-#define CYDEV_CAN0_TX1_DH 0x4000a038\r
-#define CYDEV_CAN0_TX1_DL 0x4000a03c\r
-#define CYDEV_CAN0_TX2_BASE 0x4000a040\r
-#define CYDEV_CAN0_TX2_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX2_CMD 0x4000a040\r
-#define CYDEV_CAN0_TX2_ID 0x4000a044\r
-#define CYDEV_CAN0_TX2_DH 0x4000a048\r
-#define CYDEV_CAN0_TX2_DL 0x4000a04c\r
-#define CYDEV_CAN0_TX3_BASE 0x4000a050\r
-#define CYDEV_CAN0_TX3_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX3_CMD 0x4000a050\r
-#define CYDEV_CAN0_TX3_ID 0x4000a054\r
-#define CYDEV_CAN0_TX3_DH 0x4000a058\r
-#define CYDEV_CAN0_TX3_DL 0x4000a05c\r
-#define CYDEV_CAN0_TX4_BASE 0x4000a060\r
-#define CYDEV_CAN0_TX4_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX4_CMD 0x4000a060\r
-#define CYDEV_CAN0_TX4_ID 0x4000a064\r
-#define CYDEV_CAN0_TX4_DH 0x4000a068\r
-#define CYDEV_CAN0_TX4_DL 0x4000a06c\r
-#define CYDEV_CAN0_TX5_BASE 0x4000a070\r
-#define CYDEV_CAN0_TX5_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX5_CMD 0x4000a070\r
-#define CYDEV_CAN0_TX5_ID 0x4000a074\r
-#define CYDEV_CAN0_TX5_DH 0x4000a078\r
-#define CYDEV_CAN0_TX5_DL 0x4000a07c\r
-#define CYDEV_CAN0_TX6_BASE 0x4000a080\r
-#define CYDEV_CAN0_TX6_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX6_CMD 0x4000a080\r
-#define CYDEV_CAN0_TX6_ID 0x4000a084\r
-#define CYDEV_CAN0_TX6_DH 0x4000a088\r
-#define CYDEV_CAN0_TX6_DL 0x4000a08c\r
-#define CYDEV_CAN0_TX7_BASE 0x4000a090\r
-#define CYDEV_CAN0_TX7_SIZE 0x00000010\r
-#define CYDEV_CAN0_TX7_CMD 0x4000a090\r
-#define CYDEV_CAN0_TX7_ID 0x4000a094\r
-#define CYDEV_CAN0_TX7_DH 0x4000a098\r
-#define CYDEV_CAN0_TX7_DL 0x4000a09c\r
-#define CYDEV_CAN0_RX0_BASE 0x4000a0a0\r
-#define CYDEV_CAN0_RX0_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX0_CMD 0x4000a0a0\r
-#define CYDEV_CAN0_RX0_ID 0x4000a0a4\r
-#define CYDEV_CAN0_RX0_DH 0x4000a0a8\r
-#define CYDEV_CAN0_RX0_DL 0x4000a0ac\r
-#define CYDEV_CAN0_RX0_AMR 0x4000a0b0\r
-#define CYDEV_CAN0_RX0_ACR 0x4000a0b4\r
-#define CYDEV_CAN0_RX0_AMRD 0x4000a0b8\r
-#define CYDEV_CAN0_RX0_ACRD 0x4000a0bc\r
-#define CYDEV_CAN0_RX1_BASE 0x4000a0c0\r
-#define CYDEV_CAN0_RX1_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX1_CMD 0x4000a0c0\r
-#define CYDEV_CAN0_RX1_ID 0x4000a0c4\r
-#define CYDEV_CAN0_RX1_DH 0x4000a0c8\r
-#define CYDEV_CAN0_RX1_DL 0x4000a0cc\r
-#define CYDEV_CAN0_RX1_AMR 0x4000a0d0\r
-#define CYDEV_CAN0_RX1_ACR 0x4000a0d4\r
-#define CYDEV_CAN0_RX1_AMRD 0x4000a0d8\r
-#define CYDEV_CAN0_RX1_ACRD 0x4000a0dc\r
-#define CYDEV_CAN0_RX2_BASE 0x4000a0e0\r
-#define CYDEV_CAN0_RX2_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX2_CMD 0x4000a0e0\r
-#define CYDEV_CAN0_RX2_ID 0x4000a0e4\r
-#define CYDEV_CAN0_RX2_DH 0x4000a0e8\r
-#define CYDEV_CAN0_RX2_DL 0x4000a0ec\r
-#define CYDEV_CAN0_RX2_AMR 0x4000a0f0\r
-#define CYDEV_CAN0_RX2_ACR 0x4000a0f4\r
-#define CYDEV_CAN0_RX2_AMRD 0x4000a0f8\r
-#define CYDEV_CAN0_RX2_ACRD 0x4000a0fc\r
-#define CYDEV_CAN0_RX3_BASE 0x4000a100\r
-#define CYDEV_CAN0_RX3_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX3_CMD 0x4000a100\r
-#define CYDEV_CAN0_RX3_ID 0x4000a104\r
-#define CYDEV_CAN0_RX3_DH 0x4000a108\r
-#define CYDEV_CAN0_RX3_DL 0x4000a10c\r
-#define CYDEV_CAN0_RX3_AMR 0x4000a110\r
-#define CYDEV_CAN0_RX3_ACR 0x4000a114\r
-#define CYDEV_CAN0_RX3_AMRD 0x4000a118\r
-#define CYDEV_CAN0_RX3_ACRD 0x4000a11c\r
-#define CYDEV_CAN0_RX4_BASE 0x4000a120\r
-#define CYDEV_CAN0_RX4_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX4_CMD 0x4000a120\r
-#define CYDEV_CAN0_RX4_ID 0x4000a124\r
-#define CYDEV_CAN0_RX4_DH 0x4000a128\r
-#define CYDEV_CAN0_RX4_DL 0x4000a12c\r
-#define CYDEV_CAN0_RX4_AMR 0x4000a130\r
-#define CYDEV_CAN0_RX4_ACR 0x4000a134\r
-#define CYDEV_CAN0_RX4_AMRD 0x4000a138\r
-#define CYDEV_CAN0_RX4_ACRD 0x4000a13c\r
-#define CYDEV_CAN0_RX5_BASE 0x4000a140\r
-#define CYDEV_CAN0_RX5_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX5_CMD 0x4000a140\r
-#define CYDEV_CAN0_RX5_ID 0x4000a144\r
-#define CYDEV_CAN0_RX5_DH 0x4000a148\r
-#define CYDEV_CAN0_RX5_DL 0x4000a14c\r
-#define CYDEV_CAN0_RX5_AMR 0x4000a150\r
-#define CYDEV_CAN0_RX5_ACR 0x4000a154\r
-#define CYDEV_CAN0_RX5_AMRD 0x4000a158\r
-#define CYDEV_CAN0_RX5_ACRD 0x4000a15c\r
-#define CYDEV_CAN0_RX6_BASE 0x4000a160\r
-#define CYDEV_CAN0_RX6_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX6_CMD 0x4000a160\r
-#define CYDEV_CAN0_RX6_ID 0x4000a164\r
-#define CYDEV_CAN0_RX6_DH 0x4000a168\r
-#define CYDEV_CAN0_RX6_DL 0x4000a16c\r
-#define CYDEV_CAN0_RX6_AMR 0x4000a170\r
-#define CYDEV_CAN0_RX6_ACR 0x4000a174\r
-#define CYDEV_CAN0_RX6_AMRD 0x4000a178\r
-#define CYDEV_CAN0_RX6_ACRD 0x4000a17c\r
-#define CYDEV_CAN0_RX7_BASE 0x4000a180\r
-#define CYDEV_CAN0_RX7_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX7_CMD 0x4000a180\r
-#define CYDEV_CAN0_RX7_ID 0x4000a184\r
-#define CYDEV_CAN0_RX7_DH 0x4000a188\r
-#define CYDEV_CAN0_RX7_DL 0x4000a18c\r
-#define CYDEV_CAN0_RX7_AMR 0x4000a190\r
-#define CYDEV_CAN0_RX7_ACR 0x4000a194\r
-#define CYDEV_CAN0_RX7_AMRD 0x4000a198\r
-#define CYDEV_CAN0_RX7_ACRD 0x4000a19c\r
-#define CYDEV_CAN0_RX8_BASE 0x4000a1a0\r
-#define CYDEV_CAN0_RX8_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX8_CMD 0x4000a1a0\r
-#define CYDEV_CAN0_RX8_ID 0x4000a1a4\r
-#define CYDEV_CAN0_RX8_DH 0x4000a1a8\r
-#define CYDEV_CAN0_RX8_DL 0x4000a1ac\r
-#define CYDEV_CAN0_RX8_AMR 0x4000a1b0\r
-#define CYDEV_CAN0_RX8_ACR 0x4000a1b4\r
-#define CYDEV_CAN0_RX8_AMRD 0x4000a1b8\r
-#define CYDEV_CAN0_RX8_ACRD 0x4000a1bc\r
-#define CYDEV_CAN0_RX9_BASE 0x4000a1c0\r
-#define CYDEV_CAN0_RX9_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX9_CMD 0x4000a1c0\r
-#define CYDEV_CAN0_RX9_ID 0x4000a1c4\r
-#define CYDEV_CAN0_RX9_DH 0x4000a1c8\r
-#define CYDEV_CAN0_RX9_DL 0x4000a1cc\r
-#define CYDEV_CAN0_RX9_AMR 0x4000a1d0\r
-#define CYDEV_CAN0_RX9_ACR 0x4000a1d4\r
-#define CYDEV_CAN0_RX9_AMRD 0x4000a1d8\r
-#define CYDEV_CAN0_RX9_ACRD 0x4000a1dc\r
-#define CYDEV_CAN0_RX10_BASE 0x4000a1e0\r
-#define CYDEV_CAN0_RX10_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX10_CMD 0x4000a1e0\r
-#define CYDEV_CAN0_RX10_ID 0x4000a1e4\r
-#define CYDEV_CAN0_RX10_DH 0x4000a1e8\r
-#define CYDEV_CAN0_RX10_DL 0x4000a1ec\r
-#define CYDEV_CAN0_RX10_AMR 0x4000a1f0\r
-#define CYDEV_CAN0_RX10_ACR 0x4000a1f4\r
-#define CYDEV_CAN0_RX10_AMRD 0x4000a1f8\r
-#define CYDEV_CAN0_RX10_ACRD 0x4000a1fc\r
-#define CYDEV_CAN0_RX11_BASE 0x4000a200\r
-#define CYDEV_CAN0_RX11_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX11_CMD 0x4000a200\r
-#define CYDEV_CAN0_RX11_ID 0x4000a204\r
-#define CYDEV_CAN0_RX11_DH 0x4000a208\r
-#define CYDEV_CAN0_RX11_DL 0x4000a20c\r
-#define CYDEV_CAN0_RX11_AMR 0x4000a210\r
-#define CYDEV_CAN0_RX11_ACR 0x4000a214\r
-#define CYDEV_CAN0_RX11_AMRD 0x4000a218\r
-#define CYDEV_CAN0_RX11_ACRD 0x4000a21c\r
-#define CYDEV_CAN0_RX12_BASE 0x4000a220\r
-#define CYDEV_CAN0_RX12_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX12_CMD 0x4000a220\r
-#define CYDEV_CAN0_RX12_ID 0x4000a224\r
-#define CYDEV_CAN0_RX12_DH 0x4000a228\r
-#define CYDEV_CAN0_RX12_DL 0x4000a22c\r
-#define CYDEV_CAN0_RX12_AMR 0x4000a230\r
-#define CYDEV_CAN0_RX12_ACR 0x4000a234\r
-#define CYDEV_CAN0_RX12_AMRD 0x4000a238\r
-#define CYDEV_CAN0_RX12_ACRD 0x4000a23c\r
-#define CYDEV_CAN0_RX13_BASE 0x4000a240\r
-#define CYDEV_CAN0_RX13_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX13_CMD 0x4000a240\r
-#define CYDEV_CAN0_RX13_ID 0x4000a244\r
-#define CYDEV_CAN0_RX13_DH 0x4000a248\r
-#define CYDEV_CAN0_RX13_DL 0x4000a24c\r
-#define CYDEV_CAN0_RX13_AMR 0x4000a250\r
-#define CYDEV_CAN0_RX13_ACR 0x4000a254\r
-#define CYDEV_CAN0_RX13_AMRD 0x4000a258\r
-#define CYDEV_CAN0_RX13_ACRD 0x4000a25c\r
-#define CYDEV_CAN0_RX14_BASE 0x4000a260\r
-#define CYDEV_CAN0_RX14_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX14_CMD 0x4000a260\r
-#define CYDEV_CAN0_RX14_ID 0x4000a264\r
-#define CYDEV_CAN0_RX14_DH 0x4000a268\r
-#define CYDEV_CAN0_RX14_DL 0x4000a26c\r
-#define CYDEV_CAN0_RX14_AMR 0x4000a270\r
-#define CYDEV_CAN0_RX14_ACR 0x4000a274\r
-#define CYDEV_CAN0_RX14_AMRD 0x4000a278\r
-#define CYDEV_CAN0_RX14_ACRD 0x4000a27c\r
-#define CYDEV_CAN0_RX15_BASE 0x4000a280\r
-#define CYDEV_CAN0_RX15_SIZE 0x00000020\r
-#define CYDEV_CAN0_RX15_CMD 0x4000a280\r
-#define CYDEV_CAN0_RX15_ID 0x4000a284\r
-#define CYDEV_CAN0_RX15_DH 0x4000a288\r
-#define CYDEV_CAN0_RX15_DL 0x4000a28c\r
-#define CYDEV_CAN0_RX15_AMR 0x4000a290\r
-#define CYDEV_CAN0_RX15_ACR 0x4000a294\r
-#define CYDEV_CAN0_RX15_AMRD 0x4000a298\r
-#define CYDEV_CAN0_RX15_ACRD 0x4000a29c\r
-#define CYDEV_DFB0_BASE 0x4000c000\r
-#define CYDEV_DFB0_SIZE 0x000007b5\r
-#define CYDEV_DFB0_DPA_SRAM_BASE 0x4000c000\r
-#define CYDEV_DFB0_DPA_SRAM_SIZE 0x00000200\r
-#define CYDEV_DFB0_DPA_SRAM_DATA_MBASE 0x4000c000\r
-#define CYDEV_DFB0_DPA_SRAM_DATA_MSIZE 0x00000200\r
-#define CYDEV_DFB0_DPB_SRAM_BASE 0x4000c200\r
-#define CYDEV_DFB0_DPB_SRAM_SIZE 0x00000200\r
-#define CYDEV_DFB0_DPB_SRAM_DATA_MBASE 0x4000c200\r
-#define CYDEV_DFB0_DPB_SRAM_DATA_MSIZE 0x00000200\r
-#define CYDEV_DFB0_CSA_SRAM_BASE 0x4000c400\r
-#define CYDEV_DFB0_CSA_SRAM_SIZE 0x00000100\r
-#define CYDEV_DFB0_CSA_SRAM_DATA_MBASE 0x4000c400\r
-#define CYDEV_DFB0_CSA_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_CSB_SRAM_BASE 0x4000c500\r
-#define CYDEV_DFB0_CSB_SRAM_SIZE 0x00000100\r
-#define CYDEV_DFB0_CSB_SRAM_DATA_MBASE 0x4000c500\r
-#define CYDEV_DFB0_CSB_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_FSM_SRAM_BASE 0x4000c600\r
-#define CYDEV_DFB0_FSM_SRAM_SIZE 0x00000100\r
-#define CYDEV_DFB0_FSM_SRAM_DATA_MBASE 0x4000c600\r
-#define CYDEV_DFB0_FSM_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_ACU_SRAM_BASE 0x4000c700\r
-#define CYDEV_DFB0_ACU_SRAM_SIZE 0x00000040\r
-#define CYDEV_DFB0_ACU_SRAM_DATA_MBASE 0x4000c700\r
-#define CYDEV_DFB0_ACU_SRAM_DATA_MSIZE 0x00000040\r
-#define CYDEV_DFB0_CR 0x4000c780\r
-#define CYDEV_DFB0_SR 0x4000c784\r
-#define CYDEV_DFB0_RAM_EN 0x4000c788\r
-#define CYDEV_DFB0_RAM_DIR 0x4000c78c\r
-#define CYDEV_DFB0_SEMA 0x4000c790\r
-#define CYDEV_DFB0_DSI_CTRL 0x4000c794\r
-#define CYDEV_DFB0_INT_CTRL 0x4000c798\r
-#define CYDEV_DFB0_DMA_CTRL 0x4000c79c\r
-#define CYDEV_DFB0_STAGEA 0x4000c7a0\r
-#define CYDEV_DFB0_STAGEAM 0x4000c7a1\r
-#define CYDEV_DFB0_STAGEAH 0x4000c7a2\r
-#define CYDEV_DFB0_STAGEB 0x4000c7a4\r
-#define CYDEV_DFB0_STAGEBM 0x4000c7a5\r
-#define CYDEV_DFB0_STAGEBH 0x4000c7a6\r
-#define CYDEV_DFB0_HOLDA 0x4000c7a8\r
-#define CYDEV_DFB0_HOLDAM 0x4000c7a9\r
-#define CYDEV_DFB0_HOLDAH 0x4000c7aa\r
-#define CYDEV_DFB0_HOLDAS 0x4000c7ab\r
-#define CYDEV_DFB0_HOLDB 0x4000c7ac\r
-#define CYDEV_DFB0_HOLDBM 0x4000c7ad\r
-#define CYDEV_DFB0_HOLDBH 0x4000c7ae\r
-#define CYDEV_DFB0_HOLDBS 0x4000c7af\r
-#define CYDEV_DFB0_COHER 0x4000c7b0\r
-#define CYDEV_DFB0_DALIGN 0x4000c7b4\r
-#define CYDEV_UCFG_BASE 0x40010000\r
-#define CYDEV_UCFG_SIZE 0x00005040\r
-#define CYDEV_UCFG_B0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_SIZE 0x00000fef\r
-#define CYDEV_UCFG_B0_P0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_P0_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P0_U0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_P0_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT0 0x40010000\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT1 0x40010004\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT2 0x40010008\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT3 0x4001000c\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT4 0x40010010\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT5 0x40010014\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT6 0x40010018\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT7 0x4001001c\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT8 0x40010020\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT9 0x40010024\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT10 0x40010028\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_IT11 0x4001002c\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT0 0x40010030\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT1 0x40010032\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT2 0x40010034\r
-#define CYDEV_UCFG_B0_P0_U0_PLD_ORT3 0x40010036\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST 0x40010038\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB 0x4001003a\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET 0x4001003c\r
-#define CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS 0x4001003e\r
-#define CYDEV_UCFG_B0_P0_U0_CFG0 0x40010040\r
-#define CYDEV_UCFG_B0_P0_U0_CFG1 0x40010041\r
-#define CYDEV_UCFG_B0_P0_U0_CFG2 0x40010042\r
-#define CYDEV_UCFG_B0_P0_U0_CFG3 0x40010043\r
-#define CYDEV_UCFG_B0_P0_U0_CFG4 0x40010044\r
-#define CYDEV_UCFG_B0_P0_U0_CFG5 0x40010045\r
-#define CYDEV_UCFG_B0_P0_U0_CFG6 0x40010046\r
-#define CYDEV_UCFG_B0_P0_U0_CFG7 0x40010047\r
-#define CYDEV_UCFG_B0_P0_U0_CFG8 0x40010048\r
-#define CYDEV_UCFG_B0_P0_U0_CFG9 0x40010049\r
-#define CYDEV_UCFG_B0_P0_U0_CFG10 0x4001004a\r
-#define CYDEV_UCFG_B0_P0_U0_CFG11 0x4001004b\r
-#define CYDEV_UCFG_B0_P0_U0_CFG12 0x4001004c\r
-#define CYDEV_UCFG_B0_P0_U0_CFG13 0x4001004d\r
-#define CYDEV_UCFG_B0_P0_U0_CFG14 0x4001004e\r
-#define CYDEV_UCFG_B0_P0_U0_CFG15 0x4001004f\r
-#define CYDEV_UCFG_B0_P0_U0_CFG16 0x40010050\r
-#define CYDEV_UCFG_B0_P0_U0_CFG17 0x40010051\r
-#define CYDEV_UCFG_B0_P0_U0_CFG18 0x40010052\r
-#define CYDEV_UCFG_B0_P0_U0_CFG19 0x40010053\r
-#define CYDEV_UCFG_B0_P0_U0_CFG20 0x40010054\r
-#define CYDEV_UCFG_B0_P0_U0_CFG21 0x40010055\r
-#define CYDEV_UCFG_B0_P0_U0_CFG22 0x40010056\r
-#define CYDEV_UCFG_B0_P0_U0_CFG23 0x40010057\r
-#define CYDEV_UCFG_B0_P0_U0_CFG24 0x40010058\r
-#define CYDEV_UCFG_B0_P0_U0_CFG25 0x40010059\r
-#define CYDEV_UCFG_B0_P0_U0_CFG26 0x4001005a\r
-#define CYDEV_UCFG_B0_P0_U0_CFG27 0x4001005b\r
-#define CYDEV_UCFG_B0_P0_U0_CFG28 0x4001005c\r
-#define CYDEV_UCFG_B0_P0_U0_CFG29 0x4001005d\r
-#define CYDEV_UCFG_B0_P0_U0_CFG30 0x4001005e\r
-#define CYDEV_UCFG_B0_P0_U0_CFG31 0x4001005f\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG0 0x40010060\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG1 0x40010062\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG2 0x40010064\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG3 0x40010066\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG4 0x40010068\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG5 0x4001006a\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG6 0x4001006c\r
-#define CYDEV_UCFG_B0_P0_U0_DCFG7 0x4001006e\r
-#define CYDEV_UCFG_B0_P0_U1_BASE 0x40010080\r
-#define CYDEV_UCFG_B0_P0_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT0 0x40010080\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT1 0x40010084\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT2 0x40010088\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT3 0x4001008c\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT4 0x40010090\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT5 0x40010094\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT6 0x40010098\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT7 0x4001009c\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT8 0x400100a0\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT9 0x400100a4\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT10 0x400100a8\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_IT11 0x400100ac\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT0 0x400100b0\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT1 0x400100b2\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT2 0x400100b4\r
-#define CYDEV_UCFG_B0_P0_U1_PLD_ORT3 0x400100b6\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST 0x400100b8\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB 0x400100ba\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET 0x400100bc\r
-#define CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS 0x400100be\r
-#define CYDEV_UCFG_B0_P0_U1_CFG0 0x400100c0\r
-#define CYDEV_UCFG_B0_P0_U1_CFG1 0x400100c1\r
-#define CYDEV_UCFG_B0_P0_U1_CFG2 0x400100c2\r
-#define CYDEV_UCFG_B0_P0_U1_CFG3 0x400100c3\r
-#define CYDEV_UCFG_B0_P0_U1_CFG4 0x400100c4\r
-#define CYDEV_UCFG_B0_P0_U1_CFG5 0x400100c5\r
-#define CYDEV_UCFG_B0_P0_U1_CFG6 0x400100c6\r
-#define CYDEV_UCFG_B0_P0_U1_CFG7 0x400100c7\r
-#define CYDEV_UCFG_B0_P0_U1_CFG8 0x400100c8\r
-#define CYDEV_UCFG_B0_P0_U1_CFG9 0x400100c9\r
-#define CYDEV_UCFG_B0_P0_U1_CFG10 0x400100ca\r
-#define CYDEV_UCFG_B0_P0_U1_CFG11 0x400100cb\r
-#define CYDEV_UCFG_B0_P0_U1_CFG12 0x400100cc\r
-#define CYDEV_UCFG_B0_P0_U1_CFG13 0x400100cd\r
-#define CYDEV_UCFG_B0_P0_U1_CFG14 0x400100ce\r
-#define CYDEV_UCFG_B0_P0_U1_CFG15 0x400100cf\r
-#define CYDEV_UCFG_B0_P0_U1_CFG16 0x400100d0\r
-#define CYDEV_UCFG_B0_P0_U1_CFG17 0x400100d1\r
-#define CYDEV_UCFG_B0_P0_U1_CFG18 0x400100d2\r
-#define CYDEV_UCFG_B0_P0_U1_CFG19 0x400100d3\r
-#define CYDEV_UCFG_B0_P0_U1_CFG20 0x400100d4\r
-#define CYDEV_UCFG_B0_P0_U1_CFG21 0x400100d5\r
-#define CYDEV_UCFG_B0_P0_U1_CFG22 0x400100d6\r
-#define CYDEV_UCFG_B0_P0_U1_CFG23 0x400100d7\r
-#define CYDEV_UCFG_B0_P0_U1_CFG24 0x400100d8\r
-#define CYDEV_UCFG_B0_P0_U1_CFG25 0x400100d9\r
-#define CYDEV_UCFG_B0_P0_U1_CFG26 0x400100da\r
-#define CYDEV_UCFG_B0_P0_U1_CFG27 0x400100db\r
-#define CYDEV_UCFG_B0_P0_U1_CFG28 0x400100dc\r
-#define CYDEV_UCFG_B0_P0_U1_CFG29 0x400100dd\r
-#define CYDEV_UCFG_B0_P0_U1_CFG30 0x400100de\r
-#define CYDEV_UCFG_B0_P0_U1_CFG31 0x400100df\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG0 0x400100e0\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG1 0x400100e2\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG2 0x400100e4\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG3 0x400100e6\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG4 0x400100e8\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG5 0x400100ea\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG6 0x400100ec\r
-#define CYDEV_UCFG_B0_P0_U1_DCFG7 0x400100ee\r
-#define CYDEV_UCFG_B0_P0_ROUTE_BASE 0x40010100\r
-#define CYDEV_UCFG_B0_P0_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P1_BASE 0x40010200\r
-#define CYDEV_UCFG_B0_P1_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P1_U0_BASE 0x40010200\r
-#define CYDEV_UCFG_B0_P1_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT0 0x40010200\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT1 0x40010204\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT2 0x40010208\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT3 0x4001020c\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT4 0x40010210\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT5 0x40010214\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT6 0x40010218\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT7 0x4001021c\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT8 0x40010220\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT9 0x40010224\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT10 0x40010228\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_IT11 0x4001022c\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT0 0x40010230\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT1 0x40010232\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT2 0x40010234\r
-#define CYDEV_UCFG_B0_P1_U0_PLD_ORT3 0x40010236\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST 0x40010238\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB 0x4001023a\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET 0x4001023c\r
-#define CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS 0x4001023e\r
-#define CYDEV_UCFG_B0_P1_U0_CFG0 0x40010240\r
-#define CYDEV_UCFG_B0_P1_U0_CFG1 0x40010241\r
-#define CYDEV_UCFG_B0_P1_U0_CFG2 0x40010242\r
-#define CYDEV_UCFG_B0_P1_U0_CFG3 0x40010243\r
-#define CYDEV_UCFG_B0_P1_U0_CFG4 0x40010244\r
-#define CYDEV_UCFG_B0_P1_U0_CFG5 0x40010245\r
-#define CYDEV_UCFG_B0_P1_U0_CFG6 0x40010246\r
-#define CYDEV_UCFG_B0_P1_U0_CFG7 0x40010247\r
-#define CYDEV_UCFG_B0_P1_U0_CFG8 0x40010248\r
-#define CYDEV_UCFG_B0_P1_U0_CFG9 0x40010249\r
-#define CYDEV_UCFG_B0_P1_U0_CFG10 0x4001024a\r
-#define CYDEV_UCFG_B0_P1_U0_CFG11 0x4001024b\r
-#define CYDEV_UCFG_B0_P1_U0_CFG12 0x4001024c\r
-#define CYDEV_UCFG_B0_P1_U0_CFG13 0x4001024d\r
-#define CYDEV_UCFG_B0_P1_U0_CFG14 0x4001024e\r
-#define CYDEV_UCFG_B0_P1_U0_CFG15 0x4001024f\r
-#define CYDEV_UCFG_B0_P1_U0_CFG16 0x40010250\r
-#define CYDEV_UCFG_B0_P1_U0_CFG17 0x40010251\r
-#define CYDEV_UCFG_B0_P1_U0_CFG18 0x40010252\r
-#define CYDEV_UCFG_B0_P1_U0_CFG19 0x40010253\r
-#define CYDEV_UCFG_B0_P1_U0_CFG20 0x40010254\r
-#define CYDEV_UCFG_B0_P1_U0_CFG21 0x40010255\r
-#define CYDEV_UCFG_B0_P1_U0_CFG22 0x40010256\r
-#define CYDEV_UCFG_B0_P1_U0_CFG23 0x40010257\r
-#define CYDEV_UCFG_B0_P1_U0_CFG24 0x40010258\r
-#define CYDEV_UCFG_B0_P1_U0_CFG25 0x40010259\r
-#define CYDEV_UCFG_B0_P1_U0_CFG26 0x4001025a\r
-#define CYDEV_UCFG_B0_P1_U0_CFG27 0x4001025b\r
-#define CYDEV_UCFG_B0_P1_U0_CFG28 0x4001025c\r
-#define CYDEV_UCFG_B0_P1_U0_CFG29 0x4001025d\r
-#define CYDEV_UCFG_B0_P1_U0_CFG30 0x4001025e\r
-#define CYDEV_UCFG_B0_P1_U0_CFG31 0x4001025f\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG0 0x40010260\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG1 0x40010262\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG2 0x40010264\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG3 0x40010266\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG4 0x40010268\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG5 0x4001026a\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG6 0x4001026c\r
-#define CYDEV_UCFG_B0_P1_U0_DCFG7 0x4001026e\r
-#define CYDEV_UCFG_B0_P1_U1_BASE 0x40010280\r
-#define CYDEV_UCFG_B0_P1_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT0 0x40010280\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT1 0x40010284\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT2 0x40010288\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT3 0x4001028c\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT4 0x40010290\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT5 0x40010294\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT6 0x40010298\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT7 0x4001029c\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT8 0x400102a0\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT9 0x400102a4\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT10 0x400102a8\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_IT11 0x400102ac\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT0 0x400102b0\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT1 0x400102b2\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT2 0x400102b4\r
-#define CYDEV_UCFG_B0_P1_U1_PLD_ORT3 0x400102b6\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST 0x400102b8\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB 0x400102ba\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET 0x400102bc\r
-#define CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS 0x400102be\r
-#define CYDEV_UCFG_B0_P1_U1_CFG0 0x400102c0\r
-#define CYDEV_UCFG_B0_P1_U1_CFG1 0x400102c1\r
-#define CYDEV_UCFG_B0_P1_U1_CFG2 0x400102c2\r
-#define CYDEV_UCFG_B0_P1_U1_CFG3 0x400102c3\r
-#define CYDEV_UCFG_B0_P1_U1_CFG4 0x400102c4\r
-#define CYDEV_UCFG_B0_P1_U1_CFG5 0x400102c5\r
-#define CYDEV_UCFG_B0_P1_U1_CFG6 0x400102c6\r
-#define CYDEV_UCFG_B0_P1_U1_CFG7 0x400102c7\r
-#define CYDEV_UCFG_B0_P1_U1_CFG8 0x400102c8\r
-#define CYDEV_UCFG_B0_P1_U1_CFG9 0x400102c9\r
-#define CYDEV_UCFG_B0_P1_U1_CFG10 0x400102ca\r
-#define CYDEV_UCFG_B0_P1_U1_CFG11 0x400102cb\r
-#define CYDEV_UCFG_B0_P1_U1_CFG12 0x400102cc\r
-#define CYDEV_UCFG_B0_P1_U1_CFG13 0x400102cd\r
-#define CYDEV_UCFG_B0_P1_U1_CFG14 0x400102ce\r
-#define CYDEV_UCFG_B0_P1_U1_CFG15 0x400102cf\r
-#define CYDEV_UCFG_B0_P1_U1_CFG16 0x400102d0\r
-#define CYDEV_UCFG_B0_P1_U1_CFG17 0x400102d1\r
-#define CYDEV_UCFG_B0_P1_U1_CFG18 0x400102d2\r
-#define CYDEV_UCFG_B0_P1_U1_CFG19 0x400102d3\r
-#define CYDEV_UCFG_B0_P1_U1_CFG20 0x400102d4\r
-#define CYDEV_UCFG_B0_P1_U1_CFG21 0x400102d5\r
-#define CYDEV_UCFG_B0_P1_U1_CFG22 0x400102d6\r
-#define CYDEV_UCFG_B0_P1_U1_CFG23 0x400102d7\r
-#define CYDEV_UCFG_B0_P1_U1_CFG24 0x400102d8\r
-#define CYDEV_UCFG_B0_P1_U1_CFG25 0x400102d9\r
-#define CYDEV_UCFG_B0_P1_U1_CFG26 0x400102da\r
-#define CYDEV_UCFG_B0_P1_U1_CFG27 0x400102db\r
-#define CYDEV_UCFG_B0_P1_U1_CFG28 0x400102dc\r
-#define CYDEV_UCFG_B0_P1_U1_CFG29 0x400102dd\r
-#define CYDEV_UCFG_B0_P1_U1_CFG30 0x400102de\r
-#define CYDEV_UCFG_B0_P1_U1_CFG31 0x400102df\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG0 0x400102e0\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG1 0x400102e2\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG2 0x400102e4\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG3 0x400102e6\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG4 0x400102e8\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG5 0x400102ea\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG6 0x400102ec\r
-#define CYDEV_UCFG_B0_P1_U1_DCFG7 0x400102ee\r
-#define CYDEV_UCFG_B0_P1_ROUTE_BASE 0x40010300\r
-#define CYDEV_UCFG_B0_P1_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P2_BASE 0x40010400\r
-#define CYDEV_UCFG_B0_P2_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P2_U0_BASE 0x40010400\r
-#define CYDEV_UCFG_B0_P2_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT0 0x40010400\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT1 0x40010404\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT2 0x40010408\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT3 0x4001040c\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT4 0x40010410\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT5 0x40010414\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT6 0x40010418\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT7 0x4001041c\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT8 0x40010420\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT9 0x40010424\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT10 0x40010428\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_IT11 0x4001042c\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT0 0x40010430\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT1 0x40010432\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT2 0x40010434\r
-#define CYDEV_UCFG_B0_P2_U0_PLD_ORT3 0x40010436\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST 0x40010438\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB 0x4001043a\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET 0x4001043c\r
-#define CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS 0x4001043e\r
-#define CYDEV_UCFG_B0_P2_U0_CFG0 0x40010440\r
-#define CYDEV_UCFG_B0_P2_U0_CFG1 0x40010441\r
-#define CYDEV_UCFG_B0_P2_U0_CFG2 0x40010442\r
-#define CYDEV_UCFG_B0_P2_U0_CFG3 0x40010443\r
-#define CYDEV_UCFG_B0_P2_U0_CFG4 0x40010444\r
-#define CYDEV_UCFG_B0_P2_U0_CFG5 0x40010445\r
-#define CYDEV_UCFG_B0_P2_U0_CFG6 0x40010446\r
-#define CYDEV_UCFG_B0_P2_U0_CFG7 0x40010447\r
-#define CYDEV_UCFG_B0_P2_U0_CFG8 0x40010448\r
-#define CYDEV_UCFG_B0_P2_U0_CFG9 0x40010449\r
-#define CYDEV_UCFG_B0_P2_U0_CFG10 0x4001044a\r
-#define CYDEV_UCFG_B0_P2_U0_CFG11 0x4001044b\r
-#define CYDEV_UCFG_B0_P2_U0_CFG12 0x4001044c\r
-#define CYDEV_UCFG_B0_P2_U0_CFG13 0x4001044d\r
-#define CYDEV_UCFG_B0_P2_U0_CFG14 0x4001044e\r
-#define CYDEV_UCFG_B0_P2_U0_CFG15 0x4001044f\r
-#define CYDEV_UCFG_B0_P2_U0_CFG16 0x40010450\r
-#define CYDEV_UCFG_B0_P2_U0_CFG17 0x40010451\r
-#define CYDEV_UCFG_B0_P2_U0_CFG18 0x40010452\r
-#define CYDEV_UCFG_B0_P2_U0_CFG19 0x40010453\r
-#define CYDEV_UCFG_B0_P2_U0_CFG20 0x40010454\r
-#define CYDEV_UCFG_B0_P2_U0_CFG21 0x40010455\r
-#define CYDEV_UCFG_B0_P2_U0_CFG22 0x40010456\r
-#define CYDEV_UCFG_B0_P2_U0_CFG23 0x40010457\r
-#define CYDEV_UCFG_B0_P2_U0_CFG24 0x40010458\r
-#define CYDEV_UCFG_B0_P2_U0_CFG25 0x40010459\r
-#define CYDEV_UCFG_B0_P2_U0_CFG26 0x4001045a\r
-#define CYDEV_UCFG_B0_P2_U0_CFG27 0x4001045b\r
-#define CYDEV_UCFG_B0_P2_U0_CFG28 0x4001045c\r
-#define CYDEV_UCFG_B0_P2_U0_CFG29 0x4001045d\r
-#define CYDEV_UCFG_B0_P2_U0_CFG30 0x4001045e\r
-#define CYDEV_UCFG_B0_P2_U0_CFG31 0x4001045f\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG0 0x40010460\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG1 0x40010462\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG2 0x40010464\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG3 0x40010466\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG4 0x40010468\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG5 0x4001046a\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG6 0x4001046c\r
-#define CYDEV_UCFG_B0_P2_U0_DCFG7 0x4001046e\r
-#define CYDEV_UCFG_B0_P2_U1_BASE 0x40010480\r
-#define CYDEV_UCFG_B0_P2_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT0 0x40010480\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT1 0x40010484\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT2 0x40010488\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT3 0x4001048c\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT4 0x40010490\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT5 0x40010494\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT6 0x40010498\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT7 0x4001049c\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT8 0x400104a0\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT9 0x400104a4\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT10 0x400104a8\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_IT11 0x400104ac\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT0 0x400104b0\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT1 0x400104b2\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT2 0x400104b4\r
-#define CYDEV_UCFG_B0_P2_U1_PLD_ORT3 0x400104b6\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST 0x400104b8\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB 0x400104ba\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET 0x400104bc\r
-#define CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS 0x400104be\r
-#define CYDEV_UCFG_B0_P2_U1_CFG0 0x400104c0\r
-#define CYDEV_UCFG_B0_P2_U1_CFG1 0x400104c1\r
-#define CYDEV_UCFG_B0_P2_U1_CFG2 0x400104c2\r
-#define CYDEV_UCFG_B0_P2_U1_CFG3 0x400104c3\r
-#define CYDEV_UCFG_B0_P2_U1_CFG4 0x400104c4\r
-#define CYDEV_UCFG_B0_P2_U1_CFG5 0x400104c5\r
-#define CYDEV_UCFG_B0_P2_U1_CFG6 0x400104c6\r
-#define CYDEV_UCFG_B0_P2_U1_CFG7 0x400104c7\r
-#define CYDEV_UCFG_B0_P2_U1_CFG8 0x400104c8\r
-#define CYDEV_UCFG_B0_P2_U1_CFG9 0x400104c9\r
-#define CYDEV_UCFG_B0_P2_U1_CFG10 0x400104ca\r
-#define CYDEV_UCFG_B0_P2_U1_CFG11 0x400104cb\r
-#define CYDEV_UCFG_B0_P2_U1_CFG12 0x400104cc\r
-#define CYDEV_UCFG_B0_P2_U1_CFG13 0x400104cd\r
-#define CYDEV_UCFG_B0_P2_U1_CFG14 0x400104ce\r
-#define CYDEV_UCFG_B0_P2_U1_CFG15 0x400104cf\r
-#define CYDEV_UCFG_B0_P2_U1_CFG16 0x400104d0\r
-#define CYDEV_UCFG_B0_P2_U1_CFG17 0x400104d1\r
-#define CYDEV_UCFG_B0_P2_U1_CFG18 0x400104d2\r
-#define CYDEV_UCFG_B0_P2_U1_CFG19 0x400104d3\r
-#define CYDEV_UCFG_B0_P2_U1_CFG20 0x400104d4\r
-#define CYDEV_UCFG_B0_P2_U1_CFG21 0x400104d5\r
-#define CYDEV_UCFG_B0_P2_U1_CFG22 0x400104d6\r
-#define CYDEV_UCFG_B0_P2_U1_CFG23 0x400104d7\r
-#define CYDEV_UCFG_B0_P2_U1_CFG24 0x400104d8\r
-#define CYDEV_UCFG_B0_P2_U1_CFG25 0x400104d9\r
-#define CYDEV_UCFG_B0_P2_U1_CFG26 0x400104da\r
-#define CYDEV_UCFG_B0_P2_U1_CFG27 0x400104db\r
-#define CYDEV_UCFG_B0_P2_U1_CFG28 0x400104dc\r
-#define CYDEV_UCFG_B0_P2_U1_CFG29 0x400104dd\r
-#define CYDEV_UCFG_B0_P2_U1_CFG30 0x400104de\r
-#define CYDEV_UCFG_B0_P2_U1_CFG31 0x400104df\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG0 0x400104e0\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG1 0x400104e2\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG2 0x400104e4\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG3 0x400104e6\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG4 0x400104e8\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG5 0x400104ea\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG6 0x400104ec\r
-#define CYDEV_UCFG_B0_P2_U1_DCFG7 0x400104ee\r
-#define CYDEV_UCFG_B0_P2_ROUTE_BASE 0x40010500\r
-#define CYDEV_UCFG_B0_P2_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P3_BASE 0x40010600\r
-#define CYDEV_UCFG_B0_P3_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P3_U0_BASE 0x40010600\r
-#define CYDEV_UCFG_B0_P3_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT0 0x40010600\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT1 0x40010604\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT2 0x40010608\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT3 0x4001060c\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT4 0x40010610\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT5 0x40010614\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT6 0x40010618\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT7 0x4001061c\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT8 0x40010620\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT9 0x40010624\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT10 0x40010628\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_IT11 0x4001062c\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT0 0x40010630\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT1 0x40010632\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT2 0x40010634\r
-#define CYDEV_UCFG_B0_P3_U0_PLD_ORT3 0x40010636\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST 0x40010638\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB 0x4001063a\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET 0x4001063c\r
-#define CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS 0x4001063e\r
-#define CYDEV_UCFG_B0_P3_U0_CFG0 0x40010640\r
-#define CYDEV_UCFG_B0_P3_U0_CFG1 0x40010641\r
-#define CYDEV_UCFG_B0_P3_U0_CFG2 0x40010642\r
-#define CYDEV_UCFG_B0_P3_U0_CFG3 0x40010643\r
-#define CYDEV_UCFG_B0_P3_U0_CFG4 0x40010644\r
-#define CYDEV_UCFG_B0_P3_U0_CFG5 0x40010645\r
-#define CYDEV_UCFG_B0_P3_U0_CFG6 0x40010646\r
-#define CYDEV_UCFG_B0_P3_U0_CFG7 0x40010647\r
-#define CYDEV_UCFG_B0_P3_U0_CFG8 0x40010648\r
-#define CYDEV_UCFG_B0_P3_U0_CFG9 0x40010649\r
-#define CYDEV_UCFG_B0_P3_U0_CFG10 0x4001064a\r
-#define CYDEV_UCFG_B0_P3_U0_CFG11 0x4001064b\r
-#define CYDEV_UCFG_B0_P3_U0_CFG12 0x4001064c\r
-#define CYDEV_UCFG_B0_P3_U0_CFG13 0x4001064d\r
-#define CYDEV_UCFG_B0_P3_U0_CFG14 0x4001064e\r
-#define CYDEV_UCFG_B0_P3_U0_CFG15 0x4001064f\r
-#define CYDEV_UCFG_B0_P3_U0_CFG16 0x40010650\r
-#define CYDEV_UCFG_B0_P3_U0_CFG17 0x40010651\r
-#define CYDEV_UCFG_B0_P3_U0_CFG18 0x40010652\r
-#define CYDEV_UCFG_B0_P3_U0_CFG19 0x40010653\r
-#define CYDEV_UCFG_B0_P3_U0_CFG20 0x40010654\r
-#define CYDEV_UCFG_B0_P3_U0_CFG21 0x40010655\r
-#define CYDEV_UCFG_B0_P3_U0_CFG22 0x40010656\r
-#define CYDEV_UCFG_B0_P3_U0_CFG23 0x40010657\r
-#define CYDEV_UCFG_B0_P3_U0_CFG24 0x40010658\r
-#define CYDEV_UCFG_B0_P3_U0_CFG25 0x40010659\r
-#define CYDEV_UCFG_B0_P3_U0_CFG26 0x4001065a\r
-#define CYDEV_UCFG_B0_P3_U0_CFG27 0x4001065b\r
-#define CYDEV_UCFG_B0_P3_U0_CFG28 0x4001065c\r
-#define CYDEV_UCFG_B0_P3_U0_CFG29 0x4001065d\r
-#define CYDEV_UCFG_B0_P3_U0_CFG30 0x4001065e\r
-#define CYDEV_UCFG_B0_P3_U0_CFG31 0x4001065f\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG0 0x40010660\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG1 0x40010662\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG2 0x40010664\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG3 0x40010666\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG4 0x40010668\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG5 0x4001066a\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG6 0x4001066c\r
-#define CYDEV_UCFG_B0_P3_U0_DCFG7 0x4001066e\r
-#define CYDEV_UCFG_B0_P3_U1_BASE 0x40010680\r
-#define CYDEV_UCFG_B0_P3_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT0 0x40010680\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT1 0x40010684\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT2 0x40010688\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT3 0x4001068c\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT4 0x40010690\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT5 0x40010694\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT6 0x40010698\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT7 0x4001069c\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT8 0x400106a0\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT9 0x400106a4\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT10 0x400106a8\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_IT11 0x400106ac\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT0 0x400106b0\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT1 0x400106b2\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT2 0x400106b4\r
-#define CYDEV_UCFG_B0_P3_U1_PLD_ORT3 0x400106b6\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST 0x400106b8\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB 0x400106ba\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET 0x400106bc\r
-#define CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS 0x400106be\r
-#define CYDEV_UCFG_B0_P3_U1_CFG0 0x400106c0\r
-#define CYDEV_UCFG_B0_P3_U1_CFG1 0x400106c1\r
-#define CYDEV_UCFG_B0_P3_U1_CFG2 0x400106c2\r
-#define CYDEV_UCFG_B0_P3_U1_CFG3 0x400106c3\r
-#define CYDEV_UCFG_B0_P3_U1_CFG4 0x400106c4\r
-#define CYDEV_UCFG_B0_P3_U1_CFG5 0x400106c5\r
-#define CYDEV_UCFG_B0_P3_U1_CFG6 0x400106c6\r
-#define CYDEV_UCFG_B0_P3_U1_CFG7 0x400106c7\r
-#define CYDEV_UCFG_B0_P3_U1_CFG8 0x400106c8\r
-#define CYDEV_UCFG_B0_P3_U1_CFG9 0x400106c9\r
-#define CYDEV_UCFG_B0_P3_U1_CFG10 0x400106ca\r
-#define CYDEV_UCFG_B0_P3_U1_CFG11 0x400106cb\r
-#define CYDEV_UCFG_B0_P3_U1_CFG12 0x400106cc\r
-#define CYDEV_UCFG_B0_P3_U1_CFG13 0x400106cd\r
-#define CYDEV_UCFG_B0_P3_U1_CFG14 0x400106ce\r
-#define CYDEV_UCFG_B0_P3_U1_CFG15 0x400106cf\r
-#define CYDEV_UCFG_B0_P3_U1_CFG16 0x400106d0\r
-#define CYDEV_UCFG_B0_P3_U1_CFG17 0x400106d1\r
-#define CYDEV_UCFG_B0_P3_U1_CFG18 0x400106d2\r
-#define CYDEV_UCFG_B0_P3_U1_CFG19 0x400106d3\r
-#define CYDEV_UCFG_B0_P3_U1_CFG20 0x400106d4\r
-#define CYDEV_UCFG_B0_P3_U1_CFG21 0x400106d5\r
-#define CYDEV_UCFG_B0_P3_U1_CFG22 0x400106d6\r
-#define CYDEV_UCFG_B0_P3_U1_CFG23 0x400106d7\r
-#define CYDEV_UCFG_B0_P3_U1_CFG24 0x400106d8\r
-#define CYDEV_UCFG_B0_P3_U1_CFG25 0x400106d9\r
-#define CYDEV_UCFG_B0_P3_U1_CFG26 0x400106da\r
-#define CYDEV_UCFG_B0_P3_U1_CFG27 0x400106db\r
-#define CYDEV_UCFG_B0_P3_U1_CFG28 0x400106dc\r
-#define CYDEV_UCFG_B0_P3_U1_CFG29 0x400106dd\r
-#define CYDEV_UCFG_B0_P3_U1_CFG30 0x400106de\r
-#define CYDEV_UCFG_B0_P3_U1_CFG31 0x400106df\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG0 0x400106e0\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG1 0x400106e2\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG2 0x400106e4\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG3 0x400106e6\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG4 0x400106e8\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG5 0x400106ea\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG6 0x400106ec\r
-#define CYDEV_UCFG_B0_P3_U1_DCFG7 0x400106ee\r
-#define CYDEV_UCFG_B0_P3_ROUTE_BASE 0x40010700\r
-#define CYDEV_UCFG_B0_P3_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P4_BASE 0x40010800\r
-#define CYDEV_UCFG_B0_P4_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P4_U0_BASE 0x40010800\r
-#define CYDEV_UCFG_B0_P4_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT0 0x40010800\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT1 0x40010804\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT2 0x40010808\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT3 0x4001080c\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT4 0x40010810\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT5 0x40010814\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT6 0x40010818\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT7 0x4001081c\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT8 0x40010820\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT9 0x40010824\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT10 0x40010828\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_IT11 0x4001082c\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT0 0x40010830\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT1 0x40010832\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT2 0x40010834\r
-#define CYDEV_UCFG_B0_P4_U0_PLD_ORT3 0x40010836\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST 0x40010838\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB 0x4001083a\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET 0x4001083c\r
-#define CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS 0x4001083e\r
-#define CYDEV_UCFG_B0_P4_U0_CFG0 0x40010840\r
-#define CYDEV_UCFG_B0_P4_U0_CFG1 0x40010841\r
-#define CYDEV_UCFG_B0_P4_U0_CFG2 0x40010842\r
-#define CYDEV_UCFG_B0_P4_U0_CFG3 0x40010843\r
-#define CYDEV_UCFG_B0_P4_U0_CFG4 0x40010844\r
-#define CYDEV_UCFG_B0_P4_U0_CFG5 0x40010845\r
-#define CYDEV_UCFG_B0_P4_U0_CFG6 0x40010846\r
-#define CYDEV_UCFG_B0_P4_U0_CFG7 0x40010847\r
-#define CYDEV_UCFG_B0_P4_U0_CFG8 0x40010848\r
-#define CYDEV_UCFG_B0_P4_U0_CFG9 0x40010849\r
-#define CYDEV_UCFG_B0_P4_U0_CFG10 0x4001084a\r
-#define CYDEV_UCFG_B0_P4_U0_CFG11 0x4001084b\r
-#define CYDEV_UCFG_B0_P4_U0_CFG12 0x4001084c\r
-#define CYDEV_UCFG_B0_P4_U0_CFG13 0x4001084d\r
-#define CYDEV_UCFG_B0_P4_U0_CFG14 0x4001084e\r
-#define CYDEV_UCFG_B0_P4_U0_CFG15 0x4001084f\r
-#define CYDEV_UCFG_B0_P4_U0_CFG16 0x40010850\r
-#define CYDEV_UCFG_B0_P4_U0_CFG17 0x40010851\r
-#define CYDEV_UCFG_B0_P4_U0_CFG18 0x40010852\r
-#define CYDEV_UCFG_B0_P4_U0_CFG19 0x40010853\r
-#define CYDEV_UCFG_B0_P4_U0_CFG20 0x40010854\r
-#define CYDEV_UCFG_B0_P4_U0_CFG21 0x40010855\r
-#define CYDEV_UCFG_B0_P4_U0_CFG22 0x40010856\r
-#define CYDEV_UCFG_B0_P4_U0_CFG23 0x40010857\r
-#define CYDEV_UCFG_B0_P4_U0_CFG24 0x40010858\r
-#define CYDEV_UCFG_B0_P4_U0_CFG25 0x40010859\r
-#define CYDEV_UCFG_B0_P4_U0_CFG26 0x4001085a\r
-#define CYDEV_UCFG_B0_P4_U0_CFG27 0x4001085b\r
-#define CYDEV_UCFG_B0_P4_U0_CFG28 0x4001085c\r
-#define CYDEV_UCFG_B0_P4_U0_CFG29 0x4001085d\r
-#define CYDEV_UCFG_B0_P4_U0_CFG30 0x4001085e\r
-#define CYDEV_UCFG_B0_P4_U0_CFG31 0x4001085f\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG0 0x40010860\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG1 0x40010862\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG2 0x40010864\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG3 0x40010866\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG4 0x40010868\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG5 0x4001086a\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG6 0x4001086c\r
-#define CYDEV_UCFG_B0_P4_U0_DCFG7 0x4001086e\r
-#define CYDEV_UCFG_B0_P4_U1_BASE 0x40010880\r
-#define CYDEV_UCFG_B0_P4_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT0 0x40010880\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT1 0x40010884\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT2 0x40010888\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT3 0x4001088c\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT4 0x40010890\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT5 0x40010894\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT6 0x40010898\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT7 0x4001089c\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT8 0x400108a0\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT9 0x400108a4\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT10 0x400108a8\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_IT11 0x400108ac\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT0 0x400108b0\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT1 0x400108b2\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT2 0x400108b4\r
-#define CYDEV_UCFG_B0_P4_U1_PLD_ORT3 0x400108b6\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST 0x400108b8\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB 0x400108ba\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET 0x400108bc\r
-#define CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS 0x400108be\r
-#define CYDEV_UCFG_B0_P4_U1_CFG0 0x400108c0\r
-#define CYDEV_UCFG_B0_P4_U1_CFG1 0x400108c1\r
-#define CYDEV_UCFG_B0_P4_U1_CFG2 0x400108c2\r
-#define CYDEV_UCFG_B0_P4_U1_CFG3 0x400108c3\r
-#define CYDEV_UCFG_B0_P4_U1_CFG4 0x400108c4\r
-#define CYDEV_UCFG_B0_P4_U1_CFG5 0x400108c5\r
-#define CYDEV_UCFG_B0_P4_U1_CFG6 0x400108c6\r
-#define CYDEV_UCFG_B0_P4_U1_CFG7 0x400108c7\r
-#define CYDEV_UCFG_B0_P4_U1_CFG8 0x400108c8\r
-#define CYDEV_UCFG_B0_P4_U1_CFG9 0x400108c9\r
-#define CYDEV_UCFG_B0_P4_U1_CFG10 0x400108ca\r
-#define CYDEV_UCFG_B0_P4_U1_CFG11 0x400108cb\r
-#define CYDEV_UCFG_B0_P4_U1_CFG12 0x400108cc\r
-#define CYDEV_UCFG_B0_P4_U1_CFG13 0x400108cd\r
-#define CYDEV_UCFG_B0_P4_U1_CFG14 0x400108ce\r
-#define CYDEV_UCFG_B0_P4_U1_CFG15 0x400108cf\r
-#define CYDEV_UCFG_B0_P4_U1_CFG16 0x400108d0\r
-#define CYDEV_UCFG_B0_P4_U1_CFG17 0x400108d1\r
-#define CYDEV_UCFG_B0_P4_U1_CFG18 0x400108d2\r
-#define CYDEV_UCFG_B0_P4_U1_CFG19 0x400108d3\r
-#define CYDEV_UCFG_B0_P4_U1_CFG20 0x400108d4\r
-#define CYDEV_UCFG_B0_P4_U1_CFG21 0x400108d5\r
-#define CYDEV_UCFG_B0_P4_U1_CFG22 0x400108d6\r
-#define CYDEV_UCFG_B0_P4_U1_CFG23 0x400108d7\r
-#define CYDEV_UCFG_B0_P4_U1_CFG24 0x400108d8\r
-#define CYDEV_UCFG_B0_P4_U1_CFG25 0x400108d9\r
-#define CYDEV_UCFG_B0_P4_U1_CFG26 0x400108da\r
-#define CYDEV_UCFG_B0_P4_U1_CFG27 0x400108db\r
-#define CYDEV_UCFG_B0_P4_U1_CFG28 0x400108dc\r
-#define CYDEV_UCFG_B0_P4_U1_CFG29 0x400108dd\r
-#define CYDEV_UCFG_B0_P4_U1_CFG30 0x400108de\r
-#define CYDEV_UCFG_B0_P4_U1_CFG31 0x400108df\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG0 0x400108e0\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG1 0x400108e2\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG2 0x400108e4\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG3 0x400108e6\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG4 0x400108e8\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG5 0x400108ea\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG6 0x400108ec\r
-#define CYDEV_UCFG_B0_P4_U1_DCFG7 0x400108ee\r
-#define CYDEV_UCFG_B0_P4_ROUTE_BASE 0x40010900\r
-#define CYDEV_UCFG_B0_P4_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P5_BASE 0x40010a00\r
-#define CYDEV_UCFG_B0_P5_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P5_U0_BASE 0x40010a00\r
-#define CYDEV_UCFG_B0_P5_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT0 0x40010a00\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT1 0x40010a04\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT2 0x40010a08\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT3 0x40010a0c\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT4 0x40010a10\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT5 0x40010a14\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT6 0x40010a18\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT7 0x40010a1c\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT8 0x40010a20\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT9 0x40010a24\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT10 0x40010a28\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_IT11 0x40010a2c\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT0 0x40010a30\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT1 0x40010a32\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT2 0x40010a34\r
-#define CYDEV_UCFG_B0_P5_U0_PLD_ORT3 0x40010a36\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST 0x40010a38\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB 0x40010a3a\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET 0x40010a3c\r
-#define CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS 0x40010a3e\r
-#define CYDEV_UCFG_B0_P5_U0_CFG0 0x40010a40\r
-#define CYDEV_UCFG_B0_P5_U0_CFG1 0x40010a41\r
-#define CYDEV_UCFG_B0_P5_U0_CFG2 0x40010a42\r
-#define CYDEV_UCFG_B0_P5_U0_CFG3 0x40010a43\r
-#define CYDEV_UCFG_B0_P5_U0_CFG4 0x40010a44\r
-#define CYDEV_UCFG_B0_P5_U0_CFG5 0x40010a45\r
-#define CYDEV_UCFG_B0_P5_U0_CFG6 0x40010a46\r
-#define CYDEV_UCFG_B0_P5_U0_CFG7 0x40010a47\r
-#define CYDEV_UCFG_B0_P5_U0_CFG8 0x40010a48\r
-#define CYDEV_UCFG_B0_P5_U0_CFG9 0x40010a49\r
-#define CYDEV_UCFG_B0_P5_U0_CFG10 0x40010a4a\r
-#define CYDEV_UCFG_B0_P5_U0_CFG11 0x40010a4b\r
-#define CYDEV_UCFG_B0_P5_U0_CFG12 0x40010a4c\r
-#define CYDEV_UCFG_B0_P5_U0_CFG13 0x40010a4d\r
-#define CYDEV_UCFG_B0_P5_U0_CFG14 0x40010a4e\r
-#define CYDEV_UCFG_B0_P5_U0_CFG15 0x40010a4f\r
-#define CYDEV_UCFG_B0_P5_U0_CFG16 0x40010a50\r
-#define CYDEV_UCFG_B0_P5_U0_CFG17 0x40010a51\r
-#define CYDEV_UCFG_B0_P5_U0_CFG18 0x40010a52\r
-#define CYDEV_UCFG_B0_P5_U0_CFG19 0x40010a53\r
-#define CYDEV_UCFG_B0_P5_U0_CFG20 0x40010a54\r
-#define CYDEV_UCFG_B0_P5_U0_CFG21 0x40010a55\r
-#define CYDEV_UCFG_B0_P5_U0_CFG22 0x40010a56\r
-#define CYDEV_UCFG_B0_P5_U0_CFG23 0x40010a57\r
-#define CYDEV_UCFG_B0_P5_U0_CFG24 0x40010a58\r
-#define CYDEV_UCFG_B0_P5_U0_CFG25 0x40010a59\r
-#define CYDEV_UCFG_B0_P5_U0_CFG26 0x40010a5a\r
-#define CYDEV_UCFG_B0_P5_U0_CFG27 0x40010a5b\r
-#define CYDEV_UCFG_B0_P5_U0_CFG28 0x40010a5c\r
-#define CYDEV_UCFG_B0_P5_U0_CFG29 0x40010a5d\r
-#define CYDEV_UCFG_B0_P5_U0_CFG30 0x40010a5e\r
-#define CYDEV_UCFG_B0_P5_U0_CFG31 0x40010a5f\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG0 0x40010a60\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG1 0x40010a62\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG2 0x40010a64\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG3 0x40010a66\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG4 0x40010a68\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG5 0x40010a6a\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG6 0x40010a6c\r
-#define CYDEV_UCFG_B0_P5_U0_DCFG7 0x40010a6e\r
-#define CYDEV_UCFG_B0_P5_U1_BASE 0x40010a80\r
-#define CYDEV_UCFG_B0_P5_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT0 0x40010a80\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT1 0x40010a84\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT2 0x40010a88\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT3 0x40010a8c\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT4 0x40010a90\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT5 0x40010a94\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT6 0x40010a98\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT7 0x40010a9c\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT8 0x40010aa0\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT9 0x40010aa4\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT10 0x40010aa8\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_IT11 0x40010aac\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT0 0x40010ab0\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT1 0x40010ab2\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT2 0x40010ab4\r
-#define CYDEV_UCFG_B0_P5_U1_PLD_ORT3 0x40010ab6\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST 0x40010ab8\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB 0x40010aba\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET 0x40010abc\r
-#define CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS 0x40010abe\r
-#define CYDEV_UCFG_B0_P5_U1_CFG0 0x40010ac0\r
-#define CYDEV_UCFG_B0_P5_U1_CFG1 0x40010ac1\r
-#define CYDEV_UCFG_B0_P5_U1_CFG2 0x40010ac2\r
-#define CYDEV_UCFG_B0_P5_U1_CFG3 0x40010ac3\r
-#define CYDEV_UCFG_B0_P5_U1_CFG4 0x40010ac4\r
-#define CYDEV_UCFG_B0_P5_U1_CFG5 0x40010ac5\r
-#define CYDEV_UCFG_B0_P5_U1_CFG6 0x40010ac6\r
-#define CYDEV_UCFG_B0_P5_U1_CFG7 0x40010ac7\r
-#define CYDEV_UCFG_B0_P5_U1_CFG8 0x40010ac8\r
-#define CYDEV_UCFG_B0_P5_U1_CFG9 0x40010ac9\r
-#define CYDEV_UCFG_B0_P5_U1_CFG10 0x40010aca\r
-#define CYDEV_UCFG_B0_P5_U1_CFG11 0x40010acb\r
-#define CYDEV_UCFG_B0_P5_U1_CFG12 0x40010acc\r
-#define CYDEV_UCFG_B0_P5_U1_CFG13 0x40010acd\r
-#define CYDEV_UCFG_B0_P5_U1_CFG14 0x40010ace\r
-#define CYDEV_UCFG_B0_P5_U1_CFG15 0x40010acf\r
-#define CYDEV_UCFG_B0_P5_U1_CFG16 0x40010ad0\r
-#define CYDEV_UCFG_B0_P5_U1_CFG17 0x40010ad1\r
-#define CYDEV_UCFG_B0_P5_U1_CFG18 0x40010ad2\r
-#define CYDEV_UCFG_B0_P5_U1_CFG19 0x40010ad3\r
-#define CYDEV_UCFG_B0_P5_U1_CFG20 0x40010ad4\r
-#define CYDEV_UCFG_B0_P5_U1_CFG21 0x40010ad5\r
-#define CYDEV_UCFG_B0_P5_U1_CFG22 0x40010ad6\r
-#define CYDEV_UCFG_B0_P5_U1_CFG23 0x40010ad7\r
-#define CYDEV_UCFG_B0_P5_U1_CFG24 0x40010ad8\r
-#define CYDEV_UCFG_B0_P5_U1_CFG25 0x40010ad9\r
-#define CYDEV_UCFG_B0_P5_U1_CFG26 0x40010ada\r
-#define CYDEV_UCFG_B0_P5_U1_CFG27 0x40010adb\r
-#define CYDEV_UCFG_B0_P5_U1_CFG28 0x40010adc\r
-#define CYDEV_UCFG_B0_P5_U1_CFG29 0x40010add\r
-#define CYDEV_UCFG_B0_P5_U1_CFG30 0x40010ade\r
-#define CYDEV_UCFG_B0_P5_U1_CFG31 0x40010adf\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG0 0x40010ae0\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG1 0x40010ae2\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG2 0x40010ae4\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG3 0x40010ae6\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG4 0x40010ae8\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG5 0x40010aea\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG6 0x40010aec\r
-#define CYDEV_UCFG_B0_P5_U1_DCFG7 0x40010aee\r
-#define CYDEV_UCFG_B0_P5_ROUTE_BASE 0x40010b00\r
-#define CYDEV_UCFG_B0_P5_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P6_BASE 0x40010c00\r
-#define CYDEV_UCFG_B0_P6_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P6_U0_BASE 0x40010c00\r
-#define CYDEV_UCFG_B0_P6_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT0 0x40010c00\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT1 0x40010c04\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT2 0x40010c08\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT3 0x40010c0c\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT4 0x40010c10\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT5 0x40010c14\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT6 0x40010c18\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT7 0x40010c1c\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT8 0x40010c20\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT9 0x40010c24\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT10 0x40010c28\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_IT11 0x40010c2c\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT0 0x40010c30\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT1 0x40010c32\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT2 0x40010c34\r
-#define CYDEV_UCFG_B0_P6_U0_PLD_ORT3 0x40010c36\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST 0x40010c38\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB 0x40010c3a\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET 0x40010c3c\r
-#define CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS 0x40010c3e\r
-#define CYDEV_UCFG_B0_P6_U0_CFG0 0x40010c40\r
-#define CYDEV_UCFG_B0_P6_U0_CFG1 0x40010c41\r
-#define CYDEV_UCFG_B0_P6_U0_CFG2 0x40010c42\r
-#define CYDEV_UCFG_B0_P6_U0_CFG3 0x40010c43\r
-#define CYDEV_UCFG_B0_P6_U0_CFG4 0x40010c44\r
-#define CYDEV_UCFG_B0_P6_U0_CFG5 0x40010c45\r
-#define CYDEV_UCFG_B0_P6_U0_CFG6 0x40010c46\r
-#define CYDEV_UCFG_B0_P6_U0_CFG7 0x40010c47\r
-#define CYDEV_UCFG_B0_P6_U0_CFG8 0x40010c48\r
-#define CYDEV_UCFG_B0_P6_U0_CFG9 0x40010c49\r
-#define CYDEV_UCFG_B0_P6_U0_CFG10 0x40010c4a\r
-#define CYDEV_UCFG_B0_P6_U0_CFG11 0x40010c4b\r
-#define CYDEV_UCFG_B0_P6_U0_CFG12 0x40010c4c\r
-#define CYDEV_UCFG_B0_P6_U0_CFG13 0x40010c4d\r
-#define CYDEV_UCFG_B0_P6_U0_CFG14 0x40010c4e\r
-#define CYDEV_UCFG_B0_P6_U0_CFG15 0x40010c4f\r
-#define CYDEV_UCFG_B0_P6_U0_CFG16 0x40010c50\r
-#define CYDEV_UCFG_B0_P6_U0_CFG17 0x40010c51\r
-#define CYDEV_UCFG_B0_P6_U0_CFG18 0x40010c52\r
-#define CYDEV_UCFG_B0_P6_U0_CFG19 0x40010c53\r
-#define CYDEV_UCFG_B0_P6_U0_CFG20 0x40010c54\r
-#define CYDEV_UCFG_B0_P6_U0_CFG21 0x40010c55\r
-#define CYDEV_UCFG_B0_P6_U0_CFG22 0x40010c56\r
-#define CYDEV_UCFG_B0_P6_U0_CFG23 0x40010c57\r
-#define CYDEV_UCFG_B0_P6_U0_CFG24 0x40010c58\r
-#define CYDEV_UCFG_B0_P6_U0_CFG25 0x40010c59\r
-#define CYDEV_UCFG_B0_P6_U0_CFG26 0x40010c5a\r
-#define CYDEV_UCFG_B0_P6_U0_CFG27 0x40010c5b\r
-#define CYDEV_UCFG_B0_P6_U0_CFG28 0x40010c5c\r
-#define CYDEV_UCFG_B0_P6_U0_CFG29 0x40010c5d\r
-#define CYDEV_UCFG_B0_P6_U0_CFG30 0x40010c5e\r
-#define CYDEV_UCFG_B0_P6_U0_CFG31 0x40010c5f\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG0 0x40010c60\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG1 0x40010c62\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG2 0x40010c64\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG3 0x40010c66\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG4 0x40010c68\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG5 0x40010c6a\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG6 0x40010c6c\r
-#define CYDEV_UCFG_B0_P6_U0_DCFG7 0x40010c6e\r
-#define CYDEV_UCFG_B0_P6_U1_BASE 0x40010c80\r
-#define CYDEV_UCFG_B0_P6_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT0 0x40010c80\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT1 0x40010c84\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT2 0x40010c88\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT3 0x40010c8c\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT4 0x40010c90\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT5 0x40010c94\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT6 0x40010c98\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT7 0x40010c9c\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT8 0x40010ca0\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT9 0x40010ca4\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT10 0x40010ca8\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_IT11 0x40010cac\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT0 0x40010cb0\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT1 0x40010cb2\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT2 0x40010cb4\r
-#define CYDEV_UCFG_B0_P6_U1_PLD_ORT3 0x40010cb6\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST 0x40010cb8\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB 0x40010cba\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET 0x40010cbc\r
-#define CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS 0x40010cbe\r
-#define CYDEV_UCFG_B0_P6_U1_CFG0 0x40010cc0\r
-#define CYDEV_UCFG_B0_P6_U1_CFG1 0x40010cc1\r
-#define CYDEV_UCFG_B0_P6_U1_CFG2 0x40010cc2\r
-#define CYDEV_UCFG_B0_P6_U1_CFG3 0x40010cc3\r
-#define CYDEV_UCFG_B0_P6_U1_CFG4 0x40010cc4\r
-#define CYDEV_UCFG_B0_P6_U1_CFG5 0x40010cc5\r
-#define CYDEV_UCFG_B0_P6_U1_CFG6 0x40010cc6\r
-#define CYDEV_UCFG_B0_P6_U1_CFG7 0x40010cc7\r
-#define CYDEV_UCFG_B0_P6_U1_CFG8 0x40010cc8\r
-#define CYDEV_UCFG_B0_P6_U1_CFG9 0x40010cc9\r
-#define CYDEV_UCFG_B0_P6_U1_CFG10 0x40010cca\r
-#define CYDEV_UCFG_B0_P6_U1_CFG11 0x40010ccb\r
-#define CYDEV_UCFG_B0_P6_U1_CFG12 0x40010ccc\r
-#define CYDEV_UCFG_B0_P6_U1_CFG13 0x40010ccd\r
-#define CYDEV_UCFG_B0_P6_U1_CFG14 0x40010cce\r
-#define CYDEV_UCFG_B0_P6_U1_CFG15 0x40010ccf\r
-#define CYDEV_UCFG_B0_P6_U1_CFG16 0x40010cd0\r
-#define CYDEV_UCFG_B0_P6_U1_CFG17 0x40010cd1\r
-#define CYDEV_UCFG_B0_P6_U1_CFG18 0x40010cd2\r
-#define CYDEV_UCFG_B0_P6_U1_CFG19 0x40010cd3\r
-#define CYDEV_UCFG_B0_P6_U1_CFG20 0x40010cd4\r
-#define CYDEV_UCFG_B0_P6_U1_CFG21 0x40010cd5\r
-#define CYDEV_UCFG_B0_P6_U1_CFG22 0x40010cd6\r
-#define CYDEV_UCFG_B0_P6_U1_CFG23 0x40010cd7\r
-#define CYDEV_UCFG_B0_P6_U1_CFG24 0x40010cd8\r
-#define CYDEV_UCFG_B0_P6_U1_CFG25 0x40010cd9\r
-#define CYDEV_UCFG_B0_P6_U1_CFG26 0x40010cda\r
-#define CYDEV_UCFG_B0_P6_U1_CFG27 0x40010cdb\r
-#define CYDEV_UCFG_B0_P6_U1_CFG28 0x40010cdc\r
-#define CYDEV_UCFG_B0_P6_U1_CFG29 0x40010cdd\r
-#define CYDEV_UCFG_B0_P6_U1_CFG30 0x40010cde\r
-#define CYDEV_UCFG_B0_P6_U1_CFG31 0x40010cdf\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG0 0x40010ce0\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG1 0x40010ce2\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG2 0x40010ce4\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG3 0x40010ce6\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG4 0x40010ce8\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG5 0x40010cea\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG6 0x40010cec\r
-#define CYDEV_UCFG_B0_P6_U1_DCFG7 0x40010cee\r
-#define CYDEV_UCFG_B0_P6_ROUTE_BASE 0x40010d00\r
-#define CYDEV_UCFG_B0_P6_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P7_BASE 0x40010e00\r
-#define CYDEV_UCFG_B0_P7_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P7_U0_BASE 0x40010e00\r
-#define CYDEV_UCFG_B0_P7_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT0 0x40010e00\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT1 0x40010e04\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT2 0x40010e08\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT3 0x40010e0c\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT4 0x40010e10\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT5 0x40010e14\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT6 0x40010e18\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT7 0x40010e1c\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT8 0x40010e20\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT9 0x40010e24\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT10 0x40010e28\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_IT11 0x40010e2c\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT0 0x40010e30\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT1 0x40010e32\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT2 0x40010e34\r
-#define CYDEV_UCFG_B0_P7_U0_PLD_ORT3 0x40010e36\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST 0x40010e38\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB 0x40010e3a\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET 0x40010e3c\r
-#define CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS 0x40010e3e\r
-#define CYDEV_UCFG_B0_P7_U0_CFG0 0x40010e40\r
-#define CYDEV_UCFG_B0_P7_U0_CFG1 0x40010e41\r
-#define CYDEV_UCFG_B0_P7_U0_CFG2 0x40010e42\r
-#define CYDEV_UCFG_B0_P7_U0_CFG3 0x40010e43\r
-#define CYDEV_UCFG_B0_P7_U0_CFG4 0x40010e44\r
-#define CYDEV_UCFG_B0_P7_U0_CFG5 0x40010e45\r
-#define CYDEV_UCFG_B0_P7_U0_CFG6 0x40010e46\r
-#define CYDEV_UCFG_B0_P7_U0_CFG7 0x40010e47\r
-#define CYDEV_UCFG_B0_P7_U0_CFG8 0x40010e48\r
-#define CYDEV_UCFG_B0_P7_U0_CFG9 0x40010e49\r
-#define CYDEV_UCFG_B0_P7_U0_CFG10 0x40010e4a\r
-#define CYDEV_UCFG_B0_P7_U0_CFG11 0x40010e4b\r
-#define CYDEV_UCFG_B0_P7_U0_CFG12 0x40010e4c\r
-#define CYDEV_UCFG_B0_P7_U0_CFG13 0x40010e4d\r
-#define CYDEV_UCFG_B0_P7_U0_CFG14 0x40010e4e\r
-#define CYDEV_UCFG_B0_P7_U0_CFG15 0x40010e4f\r
-#define CYDEV_UCFG_B0_P7_U0_CFG16 0x40010e50\r
-#define CYDEV_UCFG_B0_P7_U0_CFG17 0x40010e51\r
-#define CYDEV_UCFG_B0_P7_U0_CFG18 0x40010e52\r
-#define CYDEV_UCFG_B0_P7_U0_CFG19 0x40010e53\r
-#define CYDEV_UCFG_B0_P7_U0_CFG20 0x40010e54\r
-#define CYDEV_UCFG_B0_P7_U0_CFG21 0x40010e55\r
-#define CYDEV_UCFG_B0_P7_U0_CFG22 0x40010e56\r
-#define CYDEV_UCFG_B0_P7_U0_CFG23 0x40010e57\r
-#define CYDEV_UCFG_B0_P7_U0_CFG24 0x40010e58\r
-#define CYDEV_UCFG_B0_P7_U0_CFG25 0x40010e59\r
-#define CYDEV_UCFG_B0_P7_U0_CFG26 0x40010e5a\r
-#define CYDEV_UCFG_B0_P7_U0_CFG27 0x40010e5b\r
-#define CYDEV_UCFG_B0_P7_U0_CFG28 0x40010e5c\r
-#define CYDEV_UCFG_B0_P7_U0_CFG29 0x40010e5d\r
-#define CYDEV_UCFG_B0_P7_U0_CFG30 0x40010e5e\r
-#define CYDEV_UCFG_B0_P7_U0_CFG31 0x40010e5f\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG0 0x40010e60\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG1 0x40010e62\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG2 0x40010e64\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG3 0x40010e66\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG4 0x40010e68\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG5 0x40010e6a\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG6 0x40010e6c\r
-#define CYDEV_UCFG_B0_P7_U0_DCFG7 0x40010e6e\r
-#define CYDEV_UCFG_B0_P7_U1_BASE 0x40010e80\r
-#define CYDEV_UCFG_B0_P7_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT0 0x40010e80\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT1 0x40010e84\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT2 0x40010e88\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT3 0x40010e8c\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT4 0x40010e90\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT5 0x40010e94\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT6 0x40010e98\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT7 0x40010e9c\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT8 0x40010ea0\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT9 0x40010ea4\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT10 0x40010ea8\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_IT11 0x40010eac\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT0 0x40010eb0\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT1 0x40010eb2\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT2 0x40010eb4\r
-#define CYDEV_UCFG_B0_P7_U1_PLD_ORT3 0x40010eb6\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST 0x40010eb8\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB 0x40010eba\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET 0x40010ebc\r
-#define CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS 0x40010ebe\r
-#define CYDEV_UCFG_B0_P7_U1_CFG0 0x40010ec0\r
-#define CYDEV_UCFG_B0_P7_U1_CFG1 0x40010ec1\r
-#define CYDEV_UCFG_B0_P7_U1_CFG2 0x40010ec2\r
-#define CYDEV_UCFG_B0_P7_U1_CFG3 0x40010ec3\r
-#define CYDEV_UCFG_B0_P7_U1_CFG4 0x40010ec4\r
-#define CYDEV_UCFG_B0_P7_U1_CFG5 0x40010ec5\r
-#define CYDEV_UCFG_B0_P7_U1_CFG6 0x40010ec6\r
-#define CYDEV_UCFG_B0_P7_U1_CFG7 0x40010ec7\r
-#define CYDEV_UCFG_B0_P7_U1_CFG8 0x40010ec8\r
-#define CYDEV_UCFG_B0_P7_U1_CFG9 0x40010ec9\r
-#define CYDEV_UCFG_B0_P7_U1_CFG10 0x40010eca\r
-#define CYDEV_UCFG_B0_P7_U1_CFG11 0x40010ecb\r
-#define CYDEV_UCFG_B0_P7_U1_CFG12 0x40010ecc\r
-#define CYDEV_UCFG_B0_P7_U1_CFG13 0x40010ecd\r
-#define CYDEV_UCFG_B0_P7_U1_CFG14 0x40010ece\r
-#define CYDEV_UCFG_B0_P7_U1_CFG15 0x40010ecf\r
-#define CYDEV_UCFG_B0_P7_U1_CFG16 0x40010ed0\r
-#define CYDEV_UCFG_B0_P7_U1_CFG17 0x40010ed1\r
-#define CYDEV_UCFG_B0_P7_U1_CFG18 0x40010ed2\r
-#define CYDEV_UCFG_B0_P7_U1_CFG19 0x40010ed3\r
-#define CYDEV_UCFG_B0_P7_U1_CFG20 0x40010ed4\r
-#define CYDEV_UCFG_B0_P7_U1_CFG21 0x40010ed5\r
-#define CYDEV_UCFG_B0_P7_U1_CFG22 0x40010ed6\r
-#define CYDEV_UCFG_B0_P7_U1_CFG23 0x40010ed7\r
-#define CYDEV_UCFG_B0_P7_U1_CFG24 0x40010ed8\r
-#define CYDEV_UCFG_B0_P7_U1_CFG25 0x40010ed9\r
-#define CYDEV_UCFG_B0_P7_U1_CFG26 0x40010eda\r
-#define CYDEV_UCFG_B0_P7_U1_CFG27 0x40010edb\r
-#define CYDEV_UCFG_B0_P7_U1_CFG28 0x40010edc\r
-#define CYDEV_UCFG_B0_P7_U1_CFG29 0x40010edd\r
-#define CYDEV_UCFG_B0_P7_U1_CFG30 0x40010ede\r
-#define CYDEV_UCFG_B0_P7_U1_CFG31 0x40010edf\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG0 0x40010ee0\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG1 0x40010ee2\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG2 0x40010ee4\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG3 0x40010ee6\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG4 0x40010ee8\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG5 0x40010eea\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG6 0x40010eec\r
-#define CYDEV_UCFG_B0_P7_U1_DCFG7 0x40010eee\r
-#define CYDEV_UCFG_B0_P7_ROUTE_BASE 0x40010f00\r
-#define CYDEV_UCFG_B0_P7_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_BASE 0x40011000\r
-#define CYDEV_UCFG_B1_SIZE 0x00000fef\r
-#define CYDEV_UCFG_B1_P2_BASE 0x40011400\r
-#define CYDEV_UCFG_B1_P2_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P2_U0_BASE 0x40011400\r
-#define CYDEV_UCFG_B1_P2_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT0 0x40011400\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT1 0x40011404\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT2 0x40011408\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT3 0x4001140c\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT4 0x40011410\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT5 0x40011414\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT6 0x40011418\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT7 0x4001141c\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT8 0x40011420\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT9 0x40011424\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT10 0x40011428\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_IT11 0x4001142c\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT0 0x40011430\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT1 0x40011432\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT2 0x40011434\r
-#define CYDEV_UCFG_B1_P2_U0_PLD_ORT3 0x40011436\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST 0x40011438\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB 0x4001143a\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET 0x4001143c\r
-#define CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS 0x4001143e\r
-#define CYDEV_UCFG_B1_P2_U0_CFG0 0x40011440\r
-#define CYDEV_UCFG_B1_P2_U0_CFG1 0x40011441\r
-#define CYDEV_UCFG_B1_P2_U0_CFG2 0x40011442\r
-#define CYDEV_UCFG_B1_P2_U0_CFG3 0x40011443\r
-#define CYDEV_UCFG_B1_P2_U0_CFG4 0x40011444\r
-#define CYDEV_UCFG_B1_P2_U0_CFG5 0x40011445\r
-#define CYDEV_UCFG_B1_P2_U0_CFG6 0x40011446\r
-#define CYDEV_UCFG_B1_P2_U0_CFG7 0x40011447\r
-#define CYDEV_UCFG_B1_P2_U0_CFG8 0x40011448\r
-#define CYDEV_UCFG_B1_P2_U0_CFG9 0x40011449\r
-#define CYDEV_UCFG_B1_P2_U0_CFG10 0x4001144a\r
-#define CYDEV_UCFG_B1_P2_U0_CFG11 0x4001144b\r
-#define CYDEV_UCFG_B1_P2_U0_CFG12 0x4001144c\r
-#define CYDEV_UCFG_B1_P2_U0_CFG13 0x4001144d\r
-#define CYDEV_UCFG_B1_P2_U0_CFG14 0x4001144e\r
-#define CYDEV_UCFG_B1_P2_U0_CFG15 0x4001144f\r
-#define CYDEV_UCFG_B1_P2_U0_CFG16 0x40011450\r
-#define CYDEV_UCFG_B1_P2_U0_CFG17 0x40011451\r
-#define CYDEV_UCFG_B1_P2_U0_CFG18 0x40011452\r
-#define CYDEV_UCFG_B1_P2_U0_CFG19 0x40011453\r
-#define CYDEV_UCFG_B1_P2_U0_CFG20 0x40011454\r
-#define CYDEV_UCFG_B1_P2_U0_CFG21 0x40011455\r
-#define CYDEV_UCFG_B1_P2_U0_CFG22 0x40011456\r
-#define CYDEV_UCFG_B1_P2_U0_CFG23 0x40011457\r
-#define CYDEV_UCFG_B1_P2_U0_CFG24 0x40011458\r
-#define CYDEV_UCFG_B1_P2_U0_CFG25 0x40011459\r
-#define CYDEV_UCFG_B1_P2_U0_CFG26 0x4001145a\r
-#define CYDEV_UCFG_B1_P2_U0_CFG27 0x4001145b\r
-#define CYDEV_UCFG_B1_P2_U0_CFG28 0x4001145c\r
-#define CYDEV_UCFG_B1_P2_U0_CFG29 0x4001145d\r
-#define CYDEV_UCFG_B1_P2_U0_CFG30 0x4001145e\r
-#define CYDEV_UCFG_B1_P2_U0_CFG31 0x4001145f\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG0 0x40011460\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG1 0x40011462\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG2 0x40011464\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG3 0x40011466\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG4 0x40011468\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG5 0x4001146a\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG6 0x4001146c\r
-#define CYDEV_UCFG_B1_P2_U0_DCFG7 0x4001146e\r
-#define CYDEV_UCFG_B1_P2_U1_BASE 0x40011480\r
-#define CYDEV_UCFG_B1_P2_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT0 0x40011480\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT1 0x40011484\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT2 0x40011488\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT3 0x4001148c\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT4 0x40011490\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT5 0x40011494\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT6 0x40011498\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT7 0x4001149c\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT8 0x400114a0\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT9 0x400114a4\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT10 0x400114a8\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_IT11 0x400114ac\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT0 0x400114b0\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT1 0x400114b2\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT2 0x400114b4\r
-#define CYDEV_UCFG_B1_P2_U1_PLD_ORT3 0x400114b6\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST 0x400114b8\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB 0x400114ba\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET 0x400114bc\r
-#define CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS 0x400114be\r
-#define CYDEV_UCFG_B1_P2_U1_CFG0 0x400114c0\r
-#define CYDEV_UCFG_B1_P2_U1_CFG1 0x400114c1\r
-#define CYDEV_UCFG_B1_P2_U1_CFG2 0x400114c2\r
-#define CYDEV_UCFG_B1_P2_U1_CFG3 0x400114c3\r
-#define CYDEV_UCFG_B1_P2_U1_CFG4 0x400114c4\r
-#define CYDEV_UCFG_B1_P2_U1_CFG5 0x400114c5\r
-#define CYDEV_UCFG_B1_P2_U1_CFG6 0x400114c6\r
-#define CYDEV_UCFG_B1_P2_U1_CFG7 0x400114c7\r
-#define CYDEV_UCFG_B1_P2_U1_CFG8 0x400114c8\r
-#define CYDEV_UCFG_B1_P2_U1_CFG9 0x400114c9\r
-#define CYDEV_UCFG_B1_P2_U1_CFG10 0x400114ca\r
-#define CYDEV_UCFG_B1_P2_U1_CFG11 0x400114cb\r
-#define CYDEV_UCFG_B1_P2_U1_CFG12 0x400114cc\r
-#define CYDEV_UCFG_B1_P2_U1_CFG13 0x400114cd\r
-#define CYDEV_UCFG_B1_P2_U1_CFG14 0x400114ce\r
-#define CYDEV_UCFG_B1_P2_U1_CFG15 0x400114cf\r
-#define CYDEV_UCFG_B1_P2_U1_CFG16 0x400114d0\r
-#define CYDEV_UCFG_B1_P2_U1_CFG17 0x400114d1\r
-#define CYDEV_UCFG_B1_P2_U1_CFG18 0x400114d2\r
-#define CYDEV_UCFG_B1_P2_U1_CFG19 0x400114d3\r
-#define CYDEV_UCFG_B1_P2_U1_CFG20 0x400114d4\r
-#define CYDEV_UCFG_B1_P2_U1_CFG21 0x400114d5\r
-#define CYDEV_UCFG_B1_P2_U1_CFG22 0x400114d6\r
-#define CYDEV_UCFG_B1_P2_U1_CFG23 0x400114d7\r
-#define CYDEV_UCFG_B1_P2_U1_CFG24 0x400114d8\r
-#define CYDEV_UCFG_B1_P2_U1_CFG25 0x400114d9\r
-#define CYDEV_UCFG_B1_P2_U1_CFG26 0x400114da\r
-#define CYDEV_UCFG_B1_P2_U1_CFG27 0x400114db\r
-#define CYDEV_UCFG_B1_P2_U1_CFG28 0x400114dc\r
-#define CYDEV_UCFG_B1_P2_U1_CFG29 0x400114dd\r
-#define CYDEV_UCFG_B1_P2_U1_CFG30 0x400114de\r
-#define CYDEV_UCFG_B1_P2_U1_CFG31 0x400114df\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG0 0x400114e0\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG1 0x400114e2\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG2 0x400114e4\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG3 0x400114e6\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG4 0x400114e8\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG5 0x400114ea\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG6 0x400114ec\r
-#define CYDEV_UCFG_B1_P2_U1_DCFG7 0x400114ee\r
-#define CYDEV_UCFG_B1_P2_ROUTE_BASE 0x40011500\r
-#define CYDEV_UCFG_B1_P2_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P3_BASE 0x40011600\r
-#define CYDEV_UCFG_B1_P3_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P3_U0_BASE 0x40011600\r
-#define CYDEV_UCFG_B1_P3_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT0 0x40011600\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT1 0x40011604\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT2 0x40011608\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT3 0x4001160c\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT4 0x40011610\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT5 0x40011614\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT6 0x40011618\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT7 0x4001161c\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT8 0x40011620\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT9 0x40011624\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT10 0x40011628\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_IT11 0x4001162c\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT0 0x40011630\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT1 0x40011632\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT2 0x40011634\r
-#define CYDEV_UCFG_B1_P3_U0_PLD_ORT3 0x40011636\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST 0x40011638\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB 0x4001163a\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET 0x4001163c\r
-#define CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS 0x4001163e\r
-#define CYDEV_UCFG_B1_P3_U0_CFG0 0x40011640\r
-#define CYDEV_UCFG_B1_P3_U0_CFG1 0x40011641\r
-#define CYDEV_UCFG_B1_P3_U0_CFG2 0x40011642\r
-#define CYDEV_UCFG_B1_P3_U0_CFG3 0x40011643\r
-#define CYDEV_UCFG_B1_P3_U0_CFG4 0x40011644\r
-#define CYDEV_UCFG_B1_P3_U0_CFG5 0x40011645\r
-#define CYDEV_UCFG_B1_P3_U0_CFG6 0x40011646\r
-#define CYDEV_UCFG_B1_P3_U0_CFG7 0x40011647\r
-#define CYDEV_UCFG_B1_P3_U0_CFG8 0x40011648\r
-#define CYDEV_UCFG_B1_P3_U0_CFG9 0x40011649\r
-#define CYDEV_UCFG_B1_P3_U0_CFG10 0x4001164a\r
-#define CYDEV_UCFG_B1_P3_U0_CFG11 0x4001164b\r
-#define CYDEV_UCFG_B1_P3_U0_CFG12 0x4001164c\r
-#define CYDEV_UCFG_B1_P3_U0_CFG13 0x4001164d\r
-#define CYDEV_UCFG_B1_P3_U0_CFG14 0x4001164e\r
-#define CYDEV_UCFG_B1_P3_U0_CFG15 0x4001164f\r
-#define CYDEV_UCFG_B1_P3_U0_CFG16 0x40011650\r
-#define CYDEV_UCFG_B1_P3_U0_CFG17 0x40011651\r
-#define CYDEV_UCFG_B1_P3_U0_CFG18 0x40011652\r
-#define CYDEV_UCFG_B1_P3_U0_CFG19 0x40011653\r
-#define CYDEV_UCFG_B1_P3_U0_CFG20 0x40011654\r
-#define CYDEV_UCFG_B1_P3_U0_CFG21 0x40011655\r
-#define CYDEV_UCFG_B1_P3_U0_CFG22 0x40011656\r
-#define CYDEV_UCFG_B1_P3_U0_CFG23 0x40011657\r
-#define CYDEV_UCFG_B1_P3_U0_CFG24 0x40011658\r
-#define CYDEV_UCFG_B1_P3_U0_CFG25 0x40011659\r
-#define CYDEV_UCFG_B1_P3_U0_CFG26 0x4001165a\r
-#define CYDEV_UCFG_B1_P3_U0_CFG27 0x4001165b\r
-#define CYDEV_UCFG_B1_P3_U0_CFG28 0x4001165c\r
-#define CYDEV_UCFG_B1_P3_U0_CFG29 0x4001165d\r
-#define CYDEV_UCFG_B1_P3_U0_CFG30 0x4001165e\r
-#define CYDEV_UCFG_B1_P3_U0_CFG31 0x4001165f\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG0 0x40011660\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG1 0x40011662\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG2 0x40011664\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG3 0x40011666\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG4 0x40011668\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG5 0x4001166a\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG6 0x4001166c\r
-#define CYDEV_UCFG_B1_P3_U0_DCFG7 0x4001166e\r
-#define CYDEV_UCFG_B1_P3_U1_BASE 0x40011680\r
-#define CYDEV_UCFG_B1_P3_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT0 0x40011680\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT1 0x40011684\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT2 0x40011688\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT3 0x4001168c\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT4 0x40011690\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT5 0x40011694\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT6 0x40011698\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT7 0x4001169c\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT8 0x400116a0\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT9 0x400116a4\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT10 0x400116a8\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_IT11 0x400116ac\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT0 0x400116b0\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT1 0x400116b2\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT2 0x400116b4\r
-#define CYDEV_UCFG_B1_P3_U1_PLD_ORT3 0x400116b6\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST 0x400116b8\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB 0x400116ba\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET 0x400116bc\r
-#define CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS 0x400116be\r
-#define CYDEV_UCFG_B1_P3_U1_CFG0 0x400116c0\r
-#define CYDEV_UCFG_B1_P3_U1_CFG1 0x400116c1\r
-#define CYDEV_UCFG_B1_P3_U1_CFG2 0x400116c2\r
-#define CYDEV_UCFG_B1_P3_U1_CFG3 0x400116c3\r
-#define CYDEV_UCFG_B1_P3_U1_CFG4 0x400116c4\r
-#define CYDEV_UCFG_B1_P3_U1_CFG5 0x400116c5\r
-#define CYDEV_UCFG_B1_P3_U1_CFG6 0x400116c6\r
-#define CYDEV_UCFG_B1_P3_U1_CFG7 0x400116c7\r
-#define CYDEV_UCFG_B1_P3_U1_CFG8 0x400116c8\r
-#define CYDEV_UCFG_B1_P3_U1_CFG9 0x400116c9\r
-#define CYDEV_UCFG_B1_P3_U1_CFG10 0x400116ca\r
-#define CYDEV_UCFG_B1_P3_U1_CFG11 0x400116cb\r
-#define CYDEV_UCFG_B1_P3_U1_CFG12 0x400116cc\r
-#define CYDEV_UCFG_B1_P3_U1_CFG13 0x400116cd\r
-#define CYDEV_UCFG_B1_P3_U1_CFG14 0x400116ce\r
-#define CYDEV_UCFG_B1_P3_U1_CFG15 0x400116cf\r
-#define CYDEV_UCFG_B1_P3_U1_CFG16 0x400116d0\r
-#define CYDEV_UCFG_B1_P3_U1_CFG17 0x400116d1\r
-#define CYDEV_UCFG_B1_P3_U1_CFG18 0x400116d2\r
-#define CYDEV_UCFG_B1_P3_U1_CFG19 0x400116d3\r
-#define CYDEV_UCFG_B1_P3_U1_CFG20 0x400116d4\r
-#define CYDEV_UCFG_B1_P3_U1_CFG21 0x400116d5\r
-#define CYDEV_UCFG_B1_P3_U1_CFG22 0x400116d6\r
-#define CYDEV_UCFG_B1_P3_U1_CFG23 0x400116d7\r
-#define CYDEV_UCFG_B1_P3_U1_CFG24 0x400116d8\r
-#define CYDEV_UCFG_B1_P3_U1_CFG25 0x400116d9\r
-#define CYDEV_UCFG_B1_P3_U1_CFG26 0x400116da\r
-#define CYDEV_UCFG_B1_P3_U1_CFG27 0x400116db\r
-#define CYDEV_UCFG_B1_P3_U1_CFG28 0x400116dc\r
-#define CYDEV_UCFG_B1_P3_U1_CFG29 0x400116dd\r
-#define CYDEV_UCFG_B1_P3_U1_CFG30 0x400116de\r
-#define CYDEV_UCFG_B1_P3_U1_CFG31 0x400116df\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG0 0x400116e0\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG1 0x400116e2\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG2 0x400116e4\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG3 0x400116e6\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG4 0x400116e8\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG5 0x400116ea\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG6 0x400116ec\r
-#define CYDEV_UCFG_B1_P3_U1_DCFG7 0x400116ee\r
-#define CYDEV_UCFG_B1_P3_ROUTE_BASE 0x40011700\r
-#define CYDEV_UCFG_B1_P3_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P4_BASE 0x40011800\r
-#define CYDEV_UCFG_B1_P4_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P4_U0_BASE 0x40011800\r
-#define CYDEV_UCFG_B1_P4_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT0 0x40011800\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT1 0x40011804\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT2 0x40011808\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT3 0x4001180c\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT4 0x40011810\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT5 0x40011814\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT6 0x40011818\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT7 0x4001181c\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT8 0x40011820\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT9 0x40011824\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT10 0x40011828\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_IT11 0x4001182c\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT0 0x40011830\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT1 0x40011832\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT2 0x40011834\r
-#define CYDEV_UCFG_B1_P4_U0_PLD_ORT3 0x40011836\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST 0x40011838\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB 0x4001183a\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET 0x4001183c\r
-#define CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS 0x4001183e\r
-#define CYDEV_UCFG_B1_P4_U0_CFG0 0x40011840\r
-#define CYDEV_UCFG_B1_P4_U0_CFG1 0x40011841\r
-#define CYDEV_UCFG_B1_P4_U0_CFG2 0x40011842\r
-#define CYDEV_UCFG_B1_P4_U0_CFG3 0x40011843\r
-#define CYDEV_UCFG_B1_P4_U0_CFG4 0x40011844\r
-#define CYDEV_UCFG_B1_P4_U0_CFG5 0x40011845\r
-#define CYDEV_UCFG_B1_P4_U0_CFG6 0x40011846\r
-#define CYDEV_UCFG_B1_P4_U0_CFG7 0x40011847\r
-#define CYDEV_UCFG_B1_P4_U0_CFG8 0x40011848\r
-#define CYDEV_UCFG_B1_P4_U0_CFG9 0x40011849\r
-#define CYDEV_UCFG_B1_P4_U0_CFG10 0x4001184a\r
-#define CYDEV_UCFG_B1_P4_U0_CFG11 0x4001184b\r
-#define CYDEV_UCFG_B1_P4_U0_CFG12 0x4001184c\r
-#define CYDEV_UCFG_B1_P4_U0_CFG13 0x4001184d\r
-#define CYDEV_UCFG_B1_P4_U0_CFG14 0x4001184e\r
-#define CYDEV_UCFG_B1_P4_U0_CFG15 0x4001184f\r
-#define CYDEV_UCFG_B1_P4_U0_CFG16 0x40011850\r
-#define CYDEV_UCFG_B1_P4_U0_CFG17 0x40011851\r
-#define CYDEV_UCFG_B1_P4_U0_CFG18 0x40011852\r
-#define CYDEV_UCFG_B1_P4_U0_CFG19 0x40011853\r
-#define CYDEV_UCFG_B1_P4_U0_CFG20 0x40011854\r
-#define CYDEV_UCFG_B1_P4_U0_CFG21 0x40011855\r
-#define CYDEV_UCFG_B1_P4_U0_CFG22 0x40011856\r
-#define CYDEV_UCFG_B1_P4_U0_CFG23 0x40011857\r
-#define CYDEV_UCFG_B1_P4_U0_CFG24 0x40011858\r
-#define CYDEV_UCFG_B1_P4_U0_CFG25 0x40011859\r
-#define CYDEV_UCFG_B1_P4_U0_CFG26 0x4001185a\r
-#define CYDEV_UCFG_B1_P4_U0_CFG27 0x4001185b\r
-#define CYDEV_UCFG_B1_P4_U0_CFG28 0x4001185c\r
-#define CYDEV_UCFG_B1_P4_U0_CFG29 0x4001185d\r
-#define CYDEV_UCFG_B1_P4_U0_CFG30 0x4001185e\r
-#define CYDEV_UCFG_B1_P4_U0_CFG31 0x4001185f\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG0 0x40011860\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG1 0x40011862\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG2 0x40011864\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG3 0x40011866\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG4 0x40011868\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG5 0x4001186a\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG6 0x4001186c\r
-#define CYDEV_UCFG_B1_P4_U0_DCFG7 0x4001186e\r
-#define CYDEV_UCFG_B1_P4_U1_BASE 0x40011880\r
-#define CYDEV_UCFG_B1_P4_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT0 0x40011880\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT1 0x40011884\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT2 0x40011888\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT3 0x4001188c\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT4 0x40011890\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT5 0x40011894\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT6 0x40011898\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT7 0x4001189c\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT8 0x400118a0\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT9 0x400118a4\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT10 0x400118a8\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_IT11 0x400118ac\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT0 0x400118b0\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT1 0x400118b2\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT2 0x400118b4\r
-#define CYDEV_UCFG_B1_P4_U1_PLD_ORT3 0x400118b6\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST 0x400118b8\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB 0x400118ba\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET 0x400118bc\r
-#define CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS 0x400118be\r
-#define CYDEV_UCFG_B1_P4_U1_CFG0 0x400118c0\r
-#define CYDEV_UCFG_B1_P4_U1_CFG1 0x400118c1\r
-#define CYDEV_UCFG_B1_P4_U1_CFG2 0x400118c2\r
-#define CYDEV_UCFG_B1_P4_U1_CFG3 0x400118c3\r
-#define CYDEV_UCFG_B1_P4_U1_CFG4 0x400118c4\r
-#define CYDEV_UCFG_B1_P4_U1_CFG5 0x400118c5\r
-#define CYDEV_UCFG_B1_P4_U1_CFG6 0x400118c6\r
-#define CYDEV_UCFG_B1_P4_U1_CFG7 0x400118c7\r
-#define CYDEV_UCFG_B1_P4_U1_CFG8 0x400118c8\r
-#define CYDEV_UCFG_B1_P4_U1_CFG9 0x400118c9\r
-#define CYDEV_UCFG_B1_P4_U1_CFG10 0x400118ca\r
-#define CYDEV_UCFG_B1_P4_U1_CFG11 0x400118cb\r
-#define CYDEV_UCFG_B1_P4_U1_CFG12 0x400118cc\r
-#define CYDEV_UCFG_B1_P4_U1_CFG13 0x400118cd\r
-#define CYDEV_UCFG_B1_P4_U1_CFG14 0x400118ce\r
-#define CYDEV_UCFG_B1_P4_U1_CFG15 0x400118cf\r
-#define CYDEV_UCFG_B1_P4_U1_CFG16 0x400118d0\r
-#define CYDEV_UCFG_B1_P4_U1_CFG17 0x400118d1\r
-#define CYDEV_UCFG_B1_P4_U1_CFG18 0x400118d2\r
-#define CYDEV_UCFG_B1_P4_U1_CFG19 0x400118d3\r
-#define CYDEV_UCFG_B1_P4_U1_CFG20 0x400118d4\r
-#define CYDEV_UCFG_B1_P4_U1_CFG21 0x400118d5\r
-#define CYDEV_UCFG_B1_P4_U1_CFG22 0x400118d6\r
-#define CYDEV_UCFG_B1_P4_U1_CFG23 0x400118d7\r
-#define CYDEV_UCFG_B1_P4_U1_CFG24 0x400118d8\r
-#define CYDEV_UCFG_B1_P4_U1_CFG25 0x400118d9\r
-#define CYDEV_UCFG_B1_P4_U1_CFG26 0x400118da\r
-#define CYDEV_UCFG_B1_P4_U1_CFG27 0x400118db\r
-#define CYDEV_UCFG_B1_P4_U1_CFG28 0x400118dc\r
-#define CYDEV_UCFG_B1_P4_U1_CFG29 0x400118dd\r
-#define CYDEV_UCFG_B1_P4_U1_CFG30 0x400118de\r
-#define CYDEV_UCFG_B1_P4_U1_CFG31 0x400118df\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG0 0x400118e0\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG1 0x400118e2\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG2 0x400118e4\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG3 0x400118e6\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG4 0x400118e8\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG5 0x400118ea\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG6 0x400118ec\r
-#define CYDEV_UCFG_B1_P4_U1_DCFG7 0x400118ee\r
-#define CYDEV_UCFG_B1_P4_ROUTE_BASE 0x40011900\r
-#define CYDEV_UCFG_B1_P4_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P5_BASE 0x40011a00\r
-#define CYDEV_UCFG_B1_P5_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P5_U0_BASE 0x40011a00\r
-#define CYDEV_UCFG_B1_P5_U0_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT0 0x40011a00\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT1 0x40011a04\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT2 0x40011a08\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT3 0x40011a0c\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT4 0x40011a10\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT5 0x40011a14\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT6 0x40011a18\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT7 0x40011a1c\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT8 0x40011a20\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT9 0x40011a24\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT10 0x40011a28\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_IT11 0x40011a2c\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT0 0x40011a30\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT1 0x40011a32\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT2 0x40011a34\r
-#define CYDEV_UCFG_B1_P5_U0_PLD_ORT3 0x40011a36\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST 0x40011a38\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB 0x40011a3a\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET 0x40011a3c\r
-#define CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS 0x40011a3e\r
-#define CYDEV_UCFG_B1_P5_U0_CFG0 0x40011a40\r
-#define CYDEV_UCFG_B1_P5_U0_CFG1 0x40011a41\r
-#define CYDEV_UCFG_B1_P5_U0_CFG2 0x40011a42\r
-#define CYDEV_UCFG_B1_P5_U0_CFG3 0x40011a43\r
-#define CYDEV_UCFG_B1_P5_U0_CFG4 0x40011a44\r
-#define CYDEV_UCFG_B1_P5_U0_CFG5 0x40011a45\r
-#define CYDEV_UCFG_B1_P5_U0_CFG6 0x40011a46\r
-#define CYDEV_UCFG_B1_P5_U0_CFG7 0x40011a47\r
-#define CYDEV_UCFG_B1_P5_U0_CFG8 0x40011a48\r
-#define CYDEV_UCFG_B1_P5_U0_CFG9 0x40011a49\r
-#define CYDEV_UCFG_B1_P5_U0_CFG10 0x40011a4a\r
-#define CYDEV_UCFG_B1_P5_U0_CFG11 0x40011a4b\r
-#define CYDEV_UCFG_B1_P5_U0_CFG12 0x40011a4c\r
-#define CYDEV_UCFG_B1_P5_U0_CFG13 0x40011a4d\r
-#define CYDEV_UCFG_B1_P5_U0_CFG14 0x40011a4e\r
-#define CYDEV_UCFG_B1_P5_U0_CFG15 0x40011a4f\r
-#define CYDEV_UCFG_B1_P5_U0_CFG16 0x40011a50\r
-#define CYDEV_UCFG_B1_P5_U0_CFG17 0x40011a51\r
-#define CYDEV_UCFG_B1_P5_U0_CFG18 0x40011a52\r
-#define CYDEV_UCFG_B1_P5_U0_CFG19 0x40011a53\r
-#define CYDEV_UCFG_B1_P5_U0_CFG20 0x40011a54\r
-#define CYDEV_UCFG_B1_P5_U0_CFG21 0x40011a55\r
-#define CYDEV_UCFG_B1_P5_U0_CFG22 0x40011a56\r
-#define CYDEV_UCFG_B1_P5_U0_CFG23 0x40011a57\r
-#define CYDEV_UCFG_B1_P5_U0_CFG24 0x40011a58\r
-#define CYDEV_UCFG_B1_P5_U0_CFG25 0x40011a59\r
-#define CYDEV_UCFG_B1_P5_U0_CFG26 0x40011a5a\r
-#define CYDEV_UCFG_B1_P5_U0_CFG27 0x40011a5b\r
-#define CYDEV_UCFG_B1_P5_U0_CFG28 0x40011a5c\r
-#define CYDEV_UCFG_B1_P5_U0_CFG29 0x40011a5d\r
-#define CYDEV_UCFG_B1_P5_U0_CFG30 0x40011a5e\r
-#define CYDEV_UCFG_B1_P5_U0_CFG31 0x40011a5f\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG0 0x40011a60\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG1 0x40011a62\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG2 0x40011a64\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG3 0x40011a66\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG4 0x40011a68\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG5 0x40011a6a\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG6 0x40011a6c\r
-#define CYDEV_UCFG_B1_P5_U0_DCFG7 0x40011a6e\r
-#define CYDEV_UCFG_B1_P5_U1_BASE 0x40011a80\r
-#define CYDEV_UCFG_B1_P5_U1_SIZE 0x00000070\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT0 0x40011a80\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT1 0x40011a84\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT2 0x40011a88\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT3 0x40011a8c\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT4 0x40011a90\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT5 0x40011a94\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT6 0x40011a98\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT7 0x40011a9c\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT8 0x40011aa0\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT9 0x40011aa4\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT10 0x40011aa8\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_IT11 0x40011aac\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT0 0x40011ab0\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT1 0x40011ab2\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT2 0x40011ab4\r
-#define CYDEV_UCFG_B1_P5_U1_PLD_ORT3 0x40011ab6\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST 0x40011ab8\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB 0x40011aba\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET 0x40011abc\r
-#define CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS 0x40011abe\r
-#define CYDEV_UCFG_B1_P5_U1_CFG0 0x40011ac0\r
-#define CYDEV_UCFG_B1_P5_U1_CFG1 0x40011ac1\r
-#define CYDEV_UCFG_B1_P5_U1_CFG2 0x40011ac2\r
-#define CYDEV_UCFG_B1_P5_U1_CFG3 0x40011ac3\r
-#define CYDEV_UCFG_B1_P5_U1_CFG4 0x40011ac4\r
-#define CYDEV_UCFG_B1_P5_U1_CFG5 0x40011ac5\r
-#define CYDEV_UCFG_B1_P5_U1_CFG6 0x40011ac6\r
-#define CYDEV_UCFG_B1_P5_U1_CFG7 0x40011ac7\r
-#define CYDEV_UCFG_B1_P5_U1_CFG8 0x40011ac8\r
-#define CYDEV_UCFG_B1_P5_U1_CFG9 0x40011ac9\r
-#define CYDEV_UCFG_B1_P5_U1_CFG10 0x40011aca\r
-#define CYDEV_UCFG_B1_P5_U1_CFG11 0x40011acb\r
-#define CYDEV_UCFG_B1_P5_U1_CFG12 0x40011acc\r
-#define CYDEV_UCFG_B1_P5_U1_CFG13 0x40011acd\r
-#define CYDEV_UCFG_B1_P5_U1_CFG14 0x40011ace\r
-#define CYDEV_UCFG_B1_P5_U1_CFG15 0x40011acf\r
-#define CYDEV_UCFG_B1_P5_U1_CFG16 0x40011ad0\r
-#define CYDEV_UCFG_B1_P5_U1_CFG17 0x40011ad1\r
-#define CYDEV_UCFG_B1_P5_U1_CFG18 0x40011ad2\r
-#define CYDEV_UCFG_B1_P5_U1_CFG19 0x40011ad3\r
-#define CYDEV_UCFG_B1_P5_U1_CFG20 0x40011ad4\r
-#define CYDEV_UCFG_B1_P5_U1_CFG21 0x40011ad5\r
-#define CYDEV_UCFG_B1_P5_U1_CFG22 0x40011ad6\r
-#define CYDEV_UCFG_B1_P5_U1_CFG23 0x40011ad7\r
-#define CYDEV_UCFG_B1_P5_U1_CFG24 0x40011ad8\r
-#define CYDEV_UCFG_B1_P5_U1_CFG25 0x40011ad9\r
-#define CYDEV_UCFG_B1_P5_U1_CFG26 0x40011ada\r
-#define CYDEV_UCFG_B1_P5_U1_CFG27 0x40011adb\r
-#define CYDEV_UCFG_B1_P5_U1_CFG28 0x40011adc\r
-#define CYDEV_UCFG_B1_P5_U1_CFG29 0x40011add\r
-#define CYDEV_UCFG_B1_P5_U1_CFG30 0x40011ade\r
-#define CYDEV_UCFG_B1_P5_U1_CFG31 0x40011adf\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG0 0x40011ae0\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG1 0x40011ae2\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG2 0x40011ae4\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG3 0x40011ae6\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG4 0x40011ae8\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG5 0x40011aea\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG6 0x40011aec\r
-#define CYDEV_UCFG_B1_P5_U1_DCFG7 0x40011aee\r
-#define CYDEV_UCFG_B1_P5_ROUTE_BASE 0x40011b00\r
-#define CYDEV_UCFG_B1_P5_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI0_BASE 0x40014000\r
-#define CYDEV_UCFG_DSI0_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI1_BASE 0x40014100\r
-#define CYDEV_UCFG_DSI1_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI2_BASE 0x40014200\r
-#define CYDEV_UCFG_DSI2_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI3_BASE 0x40014300\r
-#define CYDEV_UCFG_DSI3_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI4_BASE 0x40014400\r
-#define CYDEV_UCFG_DSI4_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI5_BASE 0x40014500\r
-#define CYDEV_UCFG_DSI5_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI6_BASE 0x40014600\r
-#define CYDEV_UCFG_DSI6_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI7_BASE 0x40014700\r
-#define CYDEV_UCFG_DSI7_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI8_BASE 0x40014800\r
-#define CYDEV_UCFG_DSI8_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI9_BASE 0x40014900\r
-#define CYDEV_UCFG_DSI9_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI12_BASE 0x40014c00\r
-#define CYDEV_UCFG_DSI12_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI13_BASE 0x40014d00\r
-#define CYDEV_UCFG_DSI13_SIZE 0x000000ef\r
-#define CYDEV_UCFG_BCTL0_BASE 0x40015000\r
-#define CYDEV_UCFG_BCTL0_SIZE 0x00000010\r
-#define CYDEV_UCFG_BCTL0_MDCLK_EN 0x40015000\r
-#define CYDEV_UCFG_BCTL0_MBCLK_EN 0x40015001\r
-#define CYDEV_UCFG_BCTL0_WAIT_CFG 0x40015002\r
-#define CYDEV_UCFG_BCTL0_BANK_CTL 0x40015003\r
-#define CYDEV_UCFG_BCTL0_UDB_TEST_3 0x40015007\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN0 0x40015008\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN0 0x40015009\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN1 0x4001500a\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN1 0x4001500b\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN2 0x4001500c\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN2 0x4001500d\r
-#define CYDEV_UCFG_BCTL0_DCLK_EN3 0x4001500e\r
-#define CYDEV_UCFG_BCTL0_BCLK_EN3 0x4001500f\r
-#define CYDEV_UCFG_BCTL1_BASE 0x40015010\r
-#define CYDEV_UCFG_BCTL1_SIZE 0x00000010\r
-#define CYDEV_UCFG_BCTL1_MDCLK_EN 0x40015010\r
-#define CYDEV_UCFG_BCTL1_MBCLK_EN 0x40015011\r
-#define CYDEV_UCFG_BCTL1_WAIT_CFG 0x40015012\r
-#define CYDEV_UCFG_BCTL1_BANK_CTL 0x40015013\r
-#define CYDEV_UCFG_BCTL1_UDB_TEST_3 0x40015017\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN0 0x40015018\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN0 0x40015019\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN1 0x4001501a\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN1 0x4001501b\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN2 0x4001501c\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN2 0x4001501d\r
-#define CYDEV_UCFG_BCTL1_DCLK_EN3 0x4001501e\r
-#define CYDEV_UCFG_BCTL1_BCLK_EN3 0x4001501f\r
-#define CYDEV_IDMUX_BASE 0x40015100\r
-#define CYDEV_IDMUX_SIZE 0x00000016\r
-#define CYDEV_IDMUX_IRQ_CTL0 0x40015100\r
-#define CYDEV_IDMUX_IRQ_CTL1 0x40015101\r
-#define CYDEV_IDMUX_IRQ_CTL2 0x40015102\r
-#define CYDEV_IDMUX_IRQ_CTL3 0x40015103\r
-#define CYDEV_IDMUX_IRQ_CTL4 0x40015104\r
-#define CYDEV_IDMUX_IRQ_CTL5 0x40015105\r
-#define CYDEV_IDMUX_IRQ_CTL6 0x40015106\r
-#define CYDEV_IDMUX_IRQ_CTL7 0x40015107\r
-#define CYDEV_IDMUX_DRQ_CTL0 0x40015110\r
-#define CYDEV_IDMUX_DRQ_CTL1 0x40015111\r
-#define CYDEV_IDMUX_DRQ_CTL2 0x40015112\r
-#define CYDEV_IDMUX_DRQ_CTL3 0x40015113\r
-#define CYDEV_IDMUX_DRQ_CTL4 0x40015114\r
-#define CYDEV_IDMUX_DRQ_CTL5 0x40015115\r
-#define CYDEV_CACHERAM_BASE 0x40030000\r
-#define CYDEV_CACHERAM_SIZE 0x00000400\r
-#define CYDEV_CACHERAM_DATA_MBASE 0x40030000\r
-#define CYDEV_CACHERAM_DATA_MSIZE 0x00000400\r
-#define CYDEV_SFR_BASE 0x40050100\r
-#define CYDEV_SFR_SIZE 0x000000fb\r
-#define CYDEV_SFR_GPIO0 0x40050180\r
-#define CYDEV_SFR_GPIRD0 0x40050189\r
-#define CYDEV_SFR_GPIO0_SEL 0x4005018a\r
-#define CYDEV_SFR_GPIO1 0x40050190\r
-#define CYDEV_SFR_GPIRD1 0x40050191\r
-#define CYDEV_SFR_GPIO2 0x40050198\r
-#define CYDEV_SFR_GPIRD2 0x40050199\r
-#define CYDEV_SFR_GPIO2_SEL 0x4005019a\r
-#define CYDEV_SFR_GPIO1_SEL 0x400501a2\r
-#define CYDEV_SFR_GPIO3 0x400501b0\r
-#define CYDEV_SFR_GPIRD3 0x400501b1\r
-#define CYDEV_SFR_GPIO3_SEL 0x400501b2\r
-#define CYDEV_SFR_GPIO4 0x400501c0\r
-#define CYDEV_SFR_GPIRD4 0x400501c1\r
-#define CYDEV_SFR_GPIO4_SEL 0x400501c2\r
-#define CYDEV_SFR_GPIO5 0x400501c8\r
-#define CYDEV_SFR_GPIRD5 0x400501c9\r
-#define CYDEV_SFR_GPIO5_SEL 0x400501ca\r
-#define CYDEV_SFR_GPIO6 0x400501d8\r
-#define CYDEV_SFR_GPIRD6 0x400501d9\r
-#define CYDEV_SFR_GPIO6_SEL 0x400501da\r
-#define CYDEV_SFR_GPIO12 0x400501e8\r
-#define CYDEV_SFR_GPIRD12 0x400501e9\r
-#define CYDEV_SFR_GPIO12_SEL 0x400501f2\r
-#define CYDEV_SFR_GPIO15 0x400501f8\r
-#define CYDEV_SFR_GPIRD15 0x400501f9\r
-#define CYDEV_SFR_GPIO15_SEL 0x400501fa\r
-#define CYDEV_P3BA_BASE 0x40050300\r
-#define CYDEV_P3BA_SIZE 0x0000002b\r
-#define CYDEV_P3BA_Y_START 0x40050300\r
-#define CYDEV_P3BA_YROLL 0x40050301\r
-#define CYDEV_P3BA_YCFG 0x40050302\r
-#define CYDEV_P3BA_X_START1 0x40050303\r
-#define CYDEV_P3BA_X_START2 0x40050304\r
-#define CYDEV_P3BA_XROLL1 0x40050305\r
-#define CYDEV_P3BA_XROLL2 0x40050306\r
-#define CYDEV_P3BA_XINC 0x40050307\r
-#define CYDEV_P3BA_XCFG 0x40050308\r
-#define CYDEV_P3BA_OFFSETADDR1 0x40050309\r
-#define CYDEV_P3BA_OFFSETADDR2 0x4005030a\r
-#define CYDEV_P3BA_OFFSETADDR3 0x4005030b\r
-#define CYDEV_P3BA_ABSADDR1 0x4005030c\r
-#define CYDEV_P3BA_ABSADDR2 0x4005030d\r
-#define CYDEV_P3BA_ABSADDR3 0x4005030e\r
-#define CYDEV_P3BA_ABSADDR4 0x4005030f\r
-#define CYDEV_P3BA_DATCFG1 0x40050310\r
-#define CYDEV_P3BA_DATCFG2 0x40050311\r
-#define CYDEV_P3BA_CMP_RSLT1 0x40050314\r
-#define CYDEV_P3BA_CMP_RSLT2 0x40050315\r
-#define CYDEV_P3BA_CMP_RSLT3 0x40050316\r
-#define CYDEV_P3BA_CMP_RSLT4 0x40050317\r
-#define CYDEV_P3BA_DATA_REG1 0x40050318\r
-#define CYDEV_P3BA_DATA_REG2 0x40050319\r
-#define CYDEV_P3BA_DATA_REG3 0x4005031a\r
-#define CYDEV_P3BA_DATA_REG4 0x4005031b\r
-#define CYDEV_P3BA_EXP_DATA1 0x4005031c\r
-#define CYDEV_P3BA_EXP_DATA2 0x4005031d\r
-#define CYDEV_P3BA_EXP_DATA3 0x4005031e\r
-#define CYDEV_P3BA_EXP_DATA4 0x4005031f\r
-#define CYDEV_P3BA_MSTR_HRDATA1 0x40050320\r
-#define CYDEV_P3BA_MSTR_HRDATA2 0x40050321\r
-#define CYDEV_P3BA_MSTR_HRDATA3 0x40050322\r
-#define CYDEV_P3BA_MSTR_HRDATA4 0x40050323\r
-#define CYDEV_P3BA_BIST_EN 0x40050324\r
-#define CYDEV_P3BA_PHUB_MASTER_SSR 0x40050325\r
-#define CYDEV_P3BA_SEQCFG1 0x40050326\r
-#define CYDEV_P3BA_SEQCFG2 0x40050327\r
-#define CYDEV_P3BA_Y_CURR 0x40050328\r
-#define CYDEV_P3BA_X_CURR1 0x40050329\r
-#define CYDEV_P3BA_X_CURR2 0x4005032a\r
-#define CYDEV_PANTHER_BASE 0x40080000\r
-#define CYDEV_PANTHER_SIZE 0x00000020\r
-#define CYDEV_PANTHER_STCALIB_CFG 0x40080000\r
-#define CYDEV_PANTHER_WAITPIPE 0x40080004\r
-#define CYDEV_PANTHER_TRACE_CFG 0x40080008\r
-#define CYDEV_PANTHER_DBG_CFG 0x4008000c\r
-#define CYDEV_PANTHER_CM3_LCKRST_STAT 0x40080018\r
-#define CYDEV_PANTHER_DEVICE_ID 0x4008001c\r
-#define CYDEV_FLSECC_BASE 0x48000000\r
-#define CYDEV_FLSECC_SIZE 0x00008000\r
-#define CYDEV_FLSECC_DATA_MBASE 0x48000000\r
-#define CYDEV_FLSECC_DATA_MSIZE 0x00008000\r
-#define CYDEV_FLSHID_BASE 0x49000000\r
-#define CYDEV_FLSHID_SIZE 0x00000200\r
-#define CYDEV_FLSHID_RSVD_MBASE 0x49000000\r
-#define CYDEV_FLSHID_RSVD_MSIZE 0x00000080\r
-#define CYDEV_FLSHID_CUST_MDATA_MBASE 0x49000080\r
-#define CYDEV_FLSHID_CUST_MDATA_MSIZE 0x00000080\r
-#define CYDEV_FLSHID_CUST_TABLES_BASE 0x49000100\r
-#define CYDEV_FLSHID_CUST_TABLES_SIZE 0x00000040\r
-#define CYDEV_FLSHID_CUST_TABLES_Y_LOC 0x49000100\r
-#define CYDEV_FLSHID_CUST_TABLES_X_LOC 0x49000101\r
-#define CYDEV_FLSHID_CUST_TABLES_WAFER_NUM 0x49000102\r
-#define CYDEV_FLSHID_CUST_TABLES_LOT_LSB 0x49000103\r
-#define CYDEV_FLSHID_CUST_TABLES_LOT_MSB 0x49000104\r
-#define CYDEV_FLSHID_CUST_TABLES_WRK_WK 0x49000105\r
-#define CYDEV_FLSHID_CUST_TABLES_FAB_YR 0x49000106\r
-#define CYDEV_FLSHID_CUST_TABLES_MINOR 0x49000107\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ 0x49000108\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ 0x49000109\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ 0x4900010a\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ 0x4900010b\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ 0x4900010c\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ 0x4900010d\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ 0x4900010e\r
-#define CYDEV_FLSHID_CUST_TABLES_IMO_USB 0x4900010f\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS 0x49000110\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS 0x49000111\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS 0x49000112\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS 0x49000113\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS 0x49000114\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS 0x49000115\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS 0x49000116\r
-#define CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS 0x49000117\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M1 0x49000118\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M2 0x49000119\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M3 0x4900011a\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M4 0x4900011b\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M5 0x4900011c\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M6 0x4900011d\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M7 0x4900011e\r
-#define CYDEV_FLSHID_CUST_TABLES_DEC_M8 0x4900011f\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M1 0x49000120\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M2 0x49000121\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M3 0x49000122\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M4 0x49000123\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M5 0x49000124\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M6 0x49000125\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M7 0x49000126\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC0_M8 0x49000127\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M1 0x49000128\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M2 0x49000129\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M3 0x4900012a\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M4 0x4900012b\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M5 0x4900012c\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M6 0x4900012d\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M7 0x4900012e\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC2_M8 0x4900012f\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M1 0x49000130\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M2 0x49000131\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M3 0x49000132\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M4 0x49000133\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M5 0x49000134\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M6 0x49000135\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M7 0x49000136\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC1_M8 0x49000137\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M1 0x49000138\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M2 0x49000139\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M3 0x4900013a\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M4 0x4900013b\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M5 0x4900013c\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M6 0x4900013d\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M7 0x4900013e\r
-#define CYDEV_FLSHID_CUST_TABLES_DAC3_M8 0x4900013f\r
-#define CYDEV_FLSHID_MFG_CFG_BASE 0x49000180\r
-#define CYDEV_FLSHID_MFG_CFG_SIZE 0x00000080\r
-#define CYDEV_FLSHID_MFG_CFG_IMO_TR1 0x49000188\r
-#define CYDEV_FLSHID_MFG_CFG_CMP0_TR0 0x490001ac\r
-#define CYDEV_FLSHID_MFG_CFG_CMP1_TR0 0x490001ae\r
-#define CYDEV_FLSHID_MFG_CFG_CMP2_TR0 0x490001b0\r
-#define CYDEV_FLSHID_MFG_CFG_CMP3_TR0 0x490001b2\r
-#define CYDEV_FLSHID_MFG_CFG_CMP0_TR1 0x490001b4\r
-#define CYDEV_FLSHID_MFG_CFG_CMP1_TR1 0x490001b6\r
-#define CYDEV_FLSHID_MFG_CFG_CMP2_TR1 0x490001b8\r
-#define CYDEV_FLSHID_MFG_CFG_CMP3_TR1 0x490001ba\r
-#define CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM 0x490001ce\r
-#define CYDEV_EXTMEM_BASE 0x60000000\r
-#define CYDEV_EXTMEM_SIZE 0x00800000\r
-#define CYDEV_EXTMEM_DATA_MBASE 0x60000000\r
-#define CYDEV_EXTMEM_DATA_MSIZE 0x00800000\r
-#define CYDEV_ITM_BASE 0xe0000000\r
-#define CYDEV_ITM_SIZE 0x00001000\r
-#define CYDEV_ITM_TRACE_EN 0xe0000e00\r
-#define CYDEV_ITM_TRACE_PRIVILEGE 0xe0000e40\r
-#define CYDEV_ITM_TRACE_CTRL 0xe0000e80\r
-#define CYDEV_ITM_LOCK_ACCESS 0xe0000fb0\r
-#define CYDEV_ITM_LOCK_STATUS 0xe0000fb4\r
-#define CYDEV_ITM_PID4 0xe0000fd0\r
-#define CYDEV_ITM_PID5 0xe0000fd4\r
-#define CYDEV_ITM_PID6 0xe0000fd8\r
-#define CYDEV_ITM_PID7 0xe0000fdc\r
-#define CYDEV_ITM_PID0 0xe0000fe0\r
-#define CYDEV_ITM_PID1 0xe0000fe4\r
-#define CYDEV_ITM_PID2 0xe0000fe8\r
-#define CYDEV_ITM_PID3 0xe0000fec\r
-#define CYDEV_ITM_CID0 0xe0000ff0\r
-#define CYDEV_ITM_CID1 0xe0000ff4\r
-#define CYDEV_ITM_CID2 0xe0000ff8\r
-#define CYDEV_ITM_CID3 0xe0000ffc\r
-#define CYDEV_DWT_BASE 0xe0001000\r
-#define CYDEV_DWT_SIZE 0x0000005c\r
-#define CYDEV_DWT_CTRL 0xe0001000\r
-#define CYDEV_DWT_CYCLE_COUNT 0xe0001004\r
-#define CYDEV_DWT_CPI_COUNT 0xe0001008\r
-#define CYDEV_DWT_EXC_OVHD_COUNT 0xe000100c\r
-#define CYDEV_DWT_SLEEP_COUNT 0xe0001010\r
-#define CYDEV_DWT_LSU_COUNT 0xe0001014\r
-#define CYDEV_DWT_FOLD_COUNT 0xe0001018\r
-#define CYDEV_DWT_PC_SAMPLE 0xe000101c\r
-#define CYDEV_DWT_COMP_0 0xe0001020\r
-#define CYDEV_DWT_MASK_0 0xe0001024\r
-#define CYDEV_DWT_FUNCTION_0 0xe0001028\r
-#define CYDEV_DWT_COMP_1 0xe0001030\r
-#define CYDEV_DWT_MASK_1 0xe0001034\r
-#define CYDEV_DWT_FUNCTION_1 0xe0001038\r
-#define CYDEV_DWT_COMP_2 0xe0001040\r
-#define CYDEV_DWT_MASK_2 0xe0001044\r
-#define CYDEV_DWT_FUNCTION_2 0xe0001048\r
-#define CYDEV_DWT_COMP_3 0xe0001050\r
-#define CYDEV_DWT_MASK_3 0xe0001054\r
-#define CYDEV_DWT_FUNCTION_3 0xe0001058\r
-#define CYDEV_FPB_BASE 0xe0002000\r
-#define CYDEV_FPB_SIZE 0x00001000\r
-#define CYDEV_FPB_CTRL 0xe0002000\r
-#define CYDEV_FPB_REMAP 0xe0002004\r
-#define CYDEV_FPB_FP_COMP_0 0xe0002008\r
-#define CYDEV_FPB_FP_COMP_1 0xe000200c\r
-#define CYDEV_FPB_FP_COMP_2 0xe0002010\r
-#define CYDEV_FPB_FP_COMP_3 0xe0002014\r
-#define CYDEV_FPB_FP_COMP_4 0xe0002018\r
-#define CYDEV_FPB_FP_COMP_5 0xe000201c\r
-#define CYDEV_FPB_FP_COMP_6 0xe0002020\r
-#define CYDEV_FPB_FP_COMP_7 0xe0002024\r
-#define CYDEV_FPB_PID4 0xe0002fd0\r
-#define CYDEV_FPB_PID5 0xe0002fd4\r
-#define CYDEV_FPB_PID6 0xe0002fd8\r
-#define CYDEV_FPB_PID7 0xe0002fdc\r
-#define CYDEV_FPB_PID0 0xe0002fe0\r
-#define CYDEV_FPB_PID1 0xe0002fe4\r
-#define CYDEV_FPB_PID2 0xe0002fe8\r
-#define CYDEV_FPB_PID3 0xe0002fec\r
-#define CYDEV_FPB_CID0 0xe0002ff0\r
-#define CYDEV_FPB_CID1 0xe0002ff4\r
-#define CYDEV_FPB_CID2 0xe0002ff8\r
-#define CYDEV_FPB_CID3 0xe0002ffc\r
-#define CYDEV_NVIC_BASE 0xe000e000\r
-#define CYDEV_NVIC_SIZE 0x00000d3c\r
-#define CYDEV_NVIC_INT_CTL_TYPE 0xe000e004\r
-#define CYDEV_NVIC_SYSTICK_CTL 0xe000e010\r
-#define CYDEV_NVIC_SYSTICK_RELOAD 0xe000e014\r
-#define CYDEV_NVIC_SYSTICK_CURRENT 0xe000e018\r
-#define CYDEV_NVIC_SYSTICK_CAL 0xe000e01c\r
-#define CYDEV_NVIC_SETENA0 0xe000e100\r
-#define CYDEV_NVIC_CLRENA0 0xe000e180\r
-#define CYDEV_NVIC_SETPEND0 0xe000e200\r
-#define CYDEV_NVIC_CLRPEND0 0xe000e280\r
-#define CYDEV_NVIC_ACTIVE0 0xe000e300\r
-#define CYDEV_NVIC_PRI_0 0xe000e400\r
-#define CYDEV_NVIC_PRI_1 0xe000e401\r
-#define CYDEV_NVIC_PRI_2 0xe000e402\r
-#define CYDEV_NVIC_PRI_3 0xe000e403\r
-#define CYDEV_NVIC_PRI_4 0xe000e404\r
-#define CYDEV_NVIC_PRI_5 0xe000e405\r
-#define CYDEV_NVIC_PRI_6 0xe000e406\r
-#define CYDEV_NVIC_PRI_7 0xe000e407\r
-#define CYDEV_NVIC_PRI_8 0xe000e408\r
-#define CYDEV_NVIC_PRI_9 0xe000e409\r
-#define CYDEV_NVIC_PRI_10 0xe000e40a\r
-#define CYDEV_NVIC_PRI_11 0xe000e40b\r
-#define CYDEV_NVIC_PRI_12 0xe000e40c\r
-#define CYDEV_NVIC_PRI_13 0xe000e40d\r
-#define CYDEV_NVIC_PRI_14 0xe000e40e\r
-#define CYDEV_NVIC_PRI_15 0xe000e40f\r
-#define CYDEV_NVIC_PRI_16 0xe000e410\r
-#define CYDEV_NVIC_PRI_17 0xe000e411\r
-#define CYDEV_NVIC_PRI_18 0xe000e412\r
-#define CYDEV_NVIC_PRI_19 0xe000e413\r
-#define CYDEV_NVIC_PRI_20 0xe000e414\r
-#define CYDEV_NVIC_PRI_21 0xe000e415\r
-#define CYDEV_NVIC_PRI_22 0xe000e416\r
-#define CYDEV_NVIC_PRI_23 0xe000e417\r
-#define CYDEV_NVIC_PRI_24 0xe000e418\r
-#define CYDEV_NVIC_PRI_25 0xe000e419\r
-#define CYDEV_NVIC_PRI_26 0xe000e41a\r
-#define CYDEV_NVIC_PRI_27 0xe000e41b\r
-#define CYDEV_NVIC_PRI_28 0xe000e41c\r
-#define CYDEV_NVIC_PRI_29 0xe000e41d\r
-#define CYDEV_NVIC_PRI_30 0xe000e41e\r
-#define CYDEV_NVIC_PRI_31 0xe000e41f\r
-#define CYDEV_NVIC_CPUID_BASE 0xe000ed00\r
-#define CYDEV_NVIC_INTR_CTRL_STATE 0xe000ed04\r
-#define CYDEV_NVIC_VECT_OFFSET 0xe000ed08\r
-#define CYDEV_NVIC_APPLN_INTR 0xe000ed0c\r
-#define CYDEV_NVIC_SYSTEM_CONTROL 0xe000ed10\r
-#define CYDEV_NVIC_CFG_CONTROL 0xe000ed14\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_4_7 0xe000ed18\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_8_11 0xe000ed1c\r
-#define CYDEV_NVIC_SYS_PRIO_HANDLER_12_15 0xe000ed20\r
-#define CYDEV_NVIC_SYS_HANDLER_CSR 0xe000ed24\r
-#define CYDEV_NVIC_MEMMAN_FAULT_STATUS 0xe000ed28\r
-#define CYDEV_NVIC_BUS_FAULT_STATUS 0xe000ed29\r
-#define CYDEV_NVIC_USAGE_FAULT_STATUS 0xe000ed2a\r
-#define CYDEV_NVIC_HARD_FAULT_STATUS 0xe000ed2c\r
-#define CYDEV_NVIC_DEBUG_FAULT_STATUS 0xe000ed30\r
-#define CYDEV_NVIC_MEMMAN_FAULT_ADD 0xe000ed34\r
-#define CYDEV_NVIC_BUS_FAULT_ADD 0xe000ed38\r
-#define CYDEV_CORE_DBG_BASE 0xe000edf0\r
-#define CYDEV_CORE_DBG_SIZE 0x00000010\r
-#define CYDEV_CORE_DBG_DBG_HLT_CS 0xe000edf0\r
-#define CYDEV_CORE_DBG_DBG_REG_SEL 0xe000edf4\r
-#define CYDEV_CORE_DBG_DBG_REG_DATA 0xe000edf8\r
-#define CYDEV_CORE_DBG_EXC_MON_CTL 0xe000edfc\r
-#define CYDEV_TPIU_BASE 0xe0040000\r
-#define CYDEV_TPIU_SIZE 0x00001000\r
-#define CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ 0xe0040000\r
-#define CYDEV_TPIU_CURRENT_SYNC_PRT_SZ 0xe0040004\r
-#define CYDEV_TPIU_ASYNC_CLK_PRESCALER 0xe0040010\r
-#define CYDEV_TPIU_PROTOCOL 0xe00400f0\r
-#define CYDEV_TPIU_FORM_FLUSH_STAT 0xe0040300\r
-#define CYDEV_TPIU_FORM_FLUSH_CTRL 0xe0040304\r
-#define CYDEV_TPIU_TRIGGER 0xe0040ee8\r
-#define CYDEV_TPIU_ITETMDATA 0xe0040eec\r
-#define CYDEV_TPIU_ITATBCTR2 0xe0040ef0\r
-#define CYDEV_TPIU_ITATBCTR0 0xe0040ef8\r
-#define CYDEV_TPIU_ITITMDATA 0xe0040efc\r
-#define CYDEV_TPIU_ITCTRL 0xe0040f00\r
-#define CYDEV_TPIU_DEVID 0xe0040fc8\r
-#define CYDEV_TPIU_DEVTYPE 0xe0040fcc\r
-#define CYDEV_TPIU_PID4 0xe0040fd0\r
-#define CYDEV_TPIU_PID5 0xe0040fd4\r
-#define CYDEV_TPIU_PID6 0xe0040fd8\r
-#define CYDEV_TPIU_PID7 0xe0040fdc\r
-#define CYDEV_TPIU_PID0 0xe0040fe0\r
-#define CYDEV_TPIU_PID1 0xe0040fe4\r
-#define CYDEV_TPIU_PID2 0xe0040fe8\r
-#define CYDEV_TPIU_PID3 0xe0040fec\r
-#define CYDEV_TPIU_CID0 0xe0040ff0\r
-#define CYDEV_TPIU_CID1 0xe0040ff4\r
-#define CYDEV_TPIU_CID2 0xe0040ff8\r
-#define CYDEV_TPIU_CID3 0xe0040ffc\r
-#define CYDEV_ETM_BASE 0xe0041000\r
-#define CYDEV_ETM_SIZE 0x00001000\r
-#define CYDEV_ETM_CTL 0xe0041000\r
-#define CYDEV_ETM_CFG_CODE 0xe0041004\r
-#define CYDEV_ETM_TRIG_EVENT 0xe0041008\r
-#define CYDEV_ETM_STATUS 0xe0041010\r
-#define CYDEV_ETM_SYS_CFG 0xe0041014\r
-#define CYDEV_ETM_TRACE_ENB_EVENT 0xe0041020\r
-#define CYDEV_ETM_TRACE_EN_CTRL1 0xe0041024\r
-#define CYDEV_ETM_FIFOFULL_LEVEL 0xe004102c\r
-#define CYDEV_ETM_SYNC_FREQ 0xe00411e0\r
-#define CYDEV_ETM_ETM_ID 0xe00411e4\r
-#define CYDEV_ETM_CFG_CODE_EXT 0xe00411e8\r
-#define CYDEV_ETM_TR_SS_EMBICE_CTRL 0xe00411f0\r
-#define CYDEV_ETM_CS_TRACE_ID 0xe0041200\r
-#define CYDEV_ETM_OS_LOCK_ACCESS 0xe0041300\r
-#define CYDEV_ETM_OS_LOCK_STATUS 0xe0041304\r
-#define CYDEV_ETM_PDSR 0xe0041314\r
-#define CYDEV_ETM_ITMISCIN 0xe0041ee0\r
-#define CYDEV_ETM_ITTRIGOUT 0xe0041ee8\r
-#define CYDEV_ETM_ITATBCTR2 0xe0041ef0\r
-#define CYDEV_ETM_ITATBCTR0 0xe0041ef8\r
-#define CYDEV_ETM_INT_MODE_CTRL 0xe0041f00\r
-#define CYDEV_ETM_CLM_TAG_SET 0xe0041fa0\r
-#define CYDEV_ETM_CLM_TAG_CLR 0xe0041fa4\r
-#define CYDEV_ETM_LOCK_ACCESS 0xe0041fb0\r
-#define CYDEV_ETM_LOCK_STATUS 0xe0041fb4\r
-#define CYDEV_ETM_AUTH_STATUS 0xe0041fb8\r
-#define CYDEV_ETM_DEV_TYPE 0xe0041fcc\r
-#define CYDEV_ETM_PID4 0xe0041fd0\r
-#define CYDEV_ETM_PID5 0xe0041fd4\r
-#define CYDEV_ETM_PID6 0xe0041fd8\r
-#define CYDEV_ETM_PID7 0xe0041fdc\r
-#define CYDEV_ETM_PID0 0xe0041fe0\r
-#define CYDEV_ETM_PID1 0xe0041fe4\r
-#define CYDEV_ETM_PID2 0xe0041fe8\r
-#define CYDEV_ETM_PID3 0xe0041fec\r
-#define CYDEV_ETM_CID0 0xe0041ff0\r
-#define CYDEV_ETM_CID1 0xe0041ff4\r
-#define CYDEV_ETM_CID2 0xe0041ff8\r
-#define CYDEV_ETM_CID3 0xe0041ffc\r
-#define CYDEV_ROM_TABLE_BASE 0xe00ff000\r
-#define CYDEV_ROM_TABLE_SIZE 0x00001000\r
-#define CYDEV_ROM_TABLE_NVIC 0xe00ff000\r
-#define CYDEV_ROM_TABLE_DWT 0xe00ff004\r
-#define CYDEV_ROM_TABLE_FPB 0xe00ff008\r
-#define CYDEV_ROM_TABLE_ITM 0xe00ff00c\r
-#define CYDEV_ROM_TABLE_TPIU 0xe00ff010\r
-#define CYDEV_ROM_TABLE_ETM 0xe00ff014\r
-#define CYDEV_ROM_TABLE_END 0xe00ff018\r
-#define CYDEV_ROM_TABLE_MEMTYPE 0xe00fffcc\r
-#define CYDEV_ROM_TABLE_PID4 0xe00fffd0\r
-#define CYDEV_ROM_TABLE_PID5 0xe00fffd4\r
-#define CYDEV_ROM_TABLE_PID6 0xe00fffd8\r
-#define CYDEV_ROM_TABLE_PID7 0xe00fffdc\r
-#define CYDEV_ROM_TABLE_PID0 0xe00fffe0\r
-#define CYDEV_ROM_TABLE_PID1 0xe00fffe4\r
-#define CYDEV_ROM_TABLE_PID2 0xe00fffe8\r
-#define CYDEV_ROM_TABLE_PID3 0xe00fffec\r
-#define CYDEV_ROM_TABLE_CID0 0xe00ffff0\r
-#define CYDEV_ROM_TABLE_CID1 0xe00ffff4\r
-#define CYDEV_ROM_TABLE_CID2 0xe00ffff8\r
-#define CYDEV_ROM_TABLE_CID3 0xe00ffffc\r
-#define CYDEV_FLS_SIZE CYDEV_FLASH_SIZE\r
-#define CYDEV_ECC_BASE CYDEV_FLSECC_BASE\r
-#define CYDEV_FLS_SECTOR_SIZE 0x00010000\r
-#define CYDEV_FLS_ROW_SIZE 0x00000100\r
-#define CYDEV_ECC_SECTOR_SIZE 0x00002000\r
-#define CYDEV_ECC_ROW_SIZE 0x00000020\r
-#define CYDEV_EEPROM_SECTOR_SIZE 0x00000400\r
-#define CYDEV_EEPROM_ROW_SIZE 0x00000010\r
-#define CYDEV_PERIPH_BASE CYDEV_CLKDIST_BASE\r
-#define CYCLK_LD_DISABLE 0x00000004\r
-#define CYCLK_LD_SYNC_EN 0x00000002\r
-#define CYCLK_LD_LOAD 0x00000001\r
-#define CYCLK_PIPE 0x00000080\r
-#define CYCLK_SSS 0x00000040\r
-#define CYCLK_EARLY 0x00000020\r
-#define CYCLK_DUTY 0x00000010\r
-#define CYCLK_SYNC 0x00000008\r
-#define CYCLK_SRC_SEL_CLK_SYNC_D 0\r
-#define CYCLK_SRC_SEL_SYNC_DIG 0\r
-#define CYCLK_SRC_SEL_IMO 1\r
-#define CYCLK_SRC_SEL_XTAL_MHZ 2\r
-#define CYCLK_SRC_SEL_XTALM 2\r
-#define CYCLK_SRC_SEL_ILO 3\r
-#define CYCLK_SRC_SEL_PLL 4\r
-#define CYCLK_SRC_SEL_XTAL_KHZ 5\r
-#define CYCLK_SRC_SEL_XTALK 5\r
-#define CYCLK_SRC_SEL_DSI_G 6\r
-#define CYCLK_SRC_SEL_DSI_D 7\r
-#define CYCLK_SRC_SEL_CLK_SYNC_A 0\r
-#define CYCLK_SRC_SEL_DSI_A 7\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar_trm.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar_trm.inc
deleted file mode 100755 (executable)
index ebd1b1d..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydeviceiar_trm.inc
+++ /dev/null
@@ -1,5356 +0,0 @@
-;\r
-; FILENAME: cydeviceiar_trm.inc\r
-; \r
-; PSoC Creator 3.0 Component Pack 7\r
-;\r
-; DESCRIPTION:\r
-; This file provides all of the address values for the entire PSoC device.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions, \r
-; disclaimers, and limitations in the end user license agreement accompanying \r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-#define CYDEV_FLASH_BASE 0x00000000\r
-#define CYDEV_FLASH_SIZE 0x00020000\r
-#define CYREG_FLASH_DATA_MBASE 0x00000000\r
-#define CYREG_FLASH_DATA_MSIZE 0x00020000\r
-#define CYDEV_SRAM_BASE 0x1fffc000\r
-#define CYDEV_SRAM_SIZE 0x00008000\r
-#define CYREG_SRAM_CODE64K_MBASE 0x1fff8000\r
-#define CYREG_SRAM_CODE64K_MSIZE 0x00004000\r
-#define CYREG_SRAM_CODE32K_MBASE 0x1fffc000\r
-#define CYREG_SRAM_CODE32K_MSIZE 0x00002000\r
-#define CYREG_SRAM_CODE16K_MBASE 0x1fffe000\r
-#define CYREG_SRAM_CODE16K_MSIZE 0x00001000\r
-#define CYREG_SRAM_CODE_MBASE 0x1fffc000\r
-#define CYREG_SRAM_CODE_MSIZE 0x00004000\r
-#define CYREG_SRAM_DATA_MBASE 0x20000000\r
-#define CYREG_SRAM_DATA_MSIZE 0x00004000\r
-#define CYREG_SRAM_DATA16K_MBASE 0x20001000\r
-#define CYREG_SRAM_DATA16K_MSIZE 0x00001000\r
-#define CYREG_SRAM_DATA32K_MBASE 0x20002000\r
-#define CYREG_SRAM_DATA32K_MSIZE 0x00002000\r
-#define CYREG_SRAM_DATA64K_MBASE 0x20004000\r
-#define CYREG_SRAM_DATA64K_MSIZE 0x00004000\r
-#define CYDEV_DMA_BASE 0x20008000\r
-#define CYDEV_DMA_SIZE 0x00008000\r
-#define CYREG_DMA_SRAM64K_MBASE 0x20008000\r
-#define CYREG_DMA_SRAM64K_MSIZE 0x00004000\r
-#define CYREG_DMA_SRAM32K_MBASE 0x2000c000\r
-#define CYREG_DMA_SRAM32K_MSIZE 0x00002000\r
-#define CYREG_DMA_SRAM16K_MBASE 0x2000e000\r
-#define CYREG_DMA_SRAM16K_MSIZE 0x00001000\r
-#define CYREG_DMA_SRAM_MBASE 0x2000f000\r
-#define CYREG_DMA_SRAM_MSIZE 0x00001000\r
-#define CYDEV_CLKDIST_BASE 0x40004000\r
-#define CYDEV_CLKDIST_SIZE 0x00000110\r
-#define CYREG_CLKDIST_CR 0x40004000\r
-#define CYREG_CLKDIST_LD 0x40004001\r
-#define CYREG_CLKDIST_WRK0 0x40004002\r
-#define CYREG_CLKDIST_WRK1 0x40004003\r
-#define CYREG_CLKDIST_MSTR0 0x40004004\r
-#define CYREG_CLKDIST_MSTR1 0x40004005\r
-#define CYREG_CLKDIST_BCFG0 0x40004006\r
-#define CYREG_CLKDIST_BCFG1 0x40004007\r
-#define CYREG_CLKDIST_BCFG2 0x40004008\r
-#define CYREG_CLKDIST_UCFG 0x40004009\r
-#define CYREG_CLKDIST_DLY0 0x4000400a\r
-#define CYREG_CLKDIST_DLY1 0x4000400b\r
-#define CYREG_CLKDIST_DMASK 0x40004010\r
-#define CYREG_CLKDIST_AMASK 0x40004014\r
-#define CYDEV_CLKDIST_DCFG0_BASE 0x40004080\r
-#define CYDEV_CLKDIST_DCFG0_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG0_CFG0 0x40004080\r
-#define CYREG_CLKDIST_DCFG0_CFG1 0x40004081\r
-#define CYREG_CLKDIST_DCFG0_CFG2 0x40004082\r
-#define CYDEV_CLKDIST_DCFG1_BASE 0x40004084\r
-#define CYDEV_CLKDIST_DCFG1_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG1_CFG0 0x40004084\r
-#define CYREG_CLKDIST_DCFG1_CFG1 0x40004085\r
-#define CYREG_CLKDIST_DCFG1_CFG2 0x40004086\r
-#define CYDEV_CLKDIST_DCFG2_BASE 0x40004088\r
-#define CYDEV_CLKDIST_DCFG2_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG2_CFG0 0x40004088\r
-#define CYREG_CLKDIST_DCFG2_CFG1 0x40004089\r
-#define CYREG_CLKDIST_DCFG2_CFG2 0x4000408a\r
-#define CYDEV_CLKDIST_DCFG3_BASE 0x4000408c\r
-#define CYDEV_CLKDIST_DCFG3_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG3_CFG0 0x4000408c\r
-#define CYREG_CLKDIST_DCFG3_CFG1 0x4000408d\r
-#define CYREG_CLKDIST_DCFG3_CFG2 0x4000408e\r
-#define CYDEV_CLKDIST_DCFG4_BASE 0x40004090\r
-#define CYDEV_CLKDIST_DCFG4_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG4_CFG0 0x40004090\r
-#define CYREG_CLKDIST_DCFG4_CFG1 0x40004091\r
-#define CYREG_CLKDIST_DCFG4_CFG2 0x40004092\r
-#define CYDEV_CLKDIST_DCFG5_BASE 0x40004094\r
-#define CYDEV_CLKDIST_DCFG5_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG5_CFG0 0x40004094\r
-#define CYREG_CLKDIST_DCFG5_CFG1 0x40004095\r
-#define CYREG_CLKDIST_DCFG5_CFG2 0x40004096\r
-#define CYDEV_CLKDIST_DCFG6_BASE 0x40004098\r
-#define CYDEV_CLKDIST_DCFG6_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG6_CFG0 0x40004098\r
-#define CYREG_CLKDIST_DCFG6_CFG1 0x40004099\r
-#define CYREG_CLKDIST_DCFG6_CFG2 0x4000409a\r
-#define CYDEV_CLKDIST_DCFG7_BASE 0x4000409c\r
-#define CYDEV_CLKDIST_DCFG7_SIZE 0x00000003\r
-#define CYREG_CLKDIST_DCFG7_CFG0 0x4000409c\r
-#define CYREG_CLKDIST_DCFG7_CFG1 0x4000409d\r
-#define CYREG_CLKDIST_DCFG7_CFG2 0x4000409e\r
-#define CYDEV_CLKDIST_ACFG0_BASE 0x40004100\r
-#define CYDEV_CLKDIST_ACFG0_SIZE 0x00000004\r
-#define CYREG_CLKDIST_ACFG0_CFG0 0x40004100\r
-#define CYREG_CLKDIST_ACFG0_CFG1 0x40004101\r
-#define CYREG_CLKDIST_ACFG0_CFG2 0x40004102\r
-#define CYREG_CLKDIST_ACFG0_CFG3 0x40004103\r
-#define CYDEV_CLKDIST_ACFG1_BASE 0x40004104\r
-#define CYDEV_CLKDIST_ACFG1_SIZE 0x00000004\r
-#define CYREG_CLKDIST_ACFG1_CFG0 0x40004104\r
-#define CYREG_CLKDIST_ACFG1_CFG1 0x40004105\r
-#define CYREG_CLKDIST_ACFG1_CFG2 0x40004106\r
-#define CYREG_CLKDIST_ACFG1_CFG3 0x40004107\r
-#define CYDEV_CLKDIST_ACFG2_BASE 0x40004108\r
-#define CYDEV_CLKDIST_ACFG2_SIZE 0x00000004\r
-#define CYREG_CLKDIST_ACFG2_CFG0 0x40004108\r
-#define CYREG_CLKDIST_ACFG2_CFG1 0x40004109\r
-#define CYREG_CLKDIST_ACFG2_CFG2 0x4000410a\r
-#define CYREG_CLKDIST_ACFG2_CFG3 0x4000410b\r
-#define CYDEV_CLKDIST_ACFG3_BASE 0x4000410c\r
-#define CYDEV_CLKDIST_ACFG3_SIZE 0x00000004\r
-#define CYREG_CLKDIST_ACFG3_CFG0 0x4000410c\r
-#define CYREG_CLKDIST_ACFG3_CFG1 0x4000410d\r
-#define CYREG_CLKDIST_ACFG3_CFG2 0x4000410e\r
-#define CYREG_CLKDIST_ACFG3_CFG3 0x4000410f\r
-#define CYDEV_FASTCLK_BASE 0x40004200\r
-#define CYDEV_FASTCLK_SIZE 0x00000026\r
-#define CYDEV_FASTCLK_IMO_BASE 0x40004200\r
-#define CYDEV_FASTCLK_IMO_SIZE 0x00000001\r
-#define CYREG_FASTCLK_IMO_CR 0x40004200\r
-#define CYDEV_FASTCLK_XMHZ_BASE 0x40004210\r
-#define CYDEV_FASTCLK_XMHZ_SIZE 0x00000004\r
-#define CYREG_FASTCLK_XMHZ_CSR 0x40004210\r
-#define CYREG_FASTCLK_XMHZ_CFG0 0x40004212\r
-#define CYREG_FASTCLK_XMHZ_CFG1 0x40004213\r
-#define CYDEV_FASTCLK_PLL_BASE 0x40004220\r
-#define CYDEV_FASTCLK_PLL_SIZE 0x00000006\r
-#define CYREG_FASTCLK_PLL_CFG0 0x40004220\r
-#define CYREG_FASTCLK_PLL_CFG1 0x40004221\r
-#define CYREG_FASTCLK_PLL_P 0x40004222\r
-#define CYREG_FASTCLK_PLL_Q 0x40004223\r
-#define CYREG_FASTCLK_PLL_SR 0x40004225\r
-#define CYDEV_SLOWCLK_BASE 0x40004300\r
-#define CYDEV_SLOWCLK_SIZE 0x0000000b\r
-#define CYDEV_SLOWCLK_ILO_BASE 0x40004300\r
-#define CYDEV_SLOWCLK_ILO_SIZE 0x00000002\r
-#define CYREG_SLOWCLK_ILO_CR0 0x40004300\r
-#define CYREG_SLOWCLK_ILO_CR1 0x40004301\r
-#define CYDEV_SLOWCLK_X32_BASE 0x40004308\r
-#define CYDEV_SLOWCLK_X32_SIZE 0x00000003\r
-#define CYREG_SLOWCLK_X32_CR 0x40004308\r
-#define CYREG_SLOWCLK_X32_CFG 0x40004309\r
-#define CYREG_SLOWCLK_X32_TST 0x4000430a\r
-#define CYDEV_BOOST_BASE 0x40004320\r
-#define CYDEV_BOOST_SIZE 0x00000007\r
-#define CYREG_BOOST_CR0 0x40004320\r
-#define CYREG_BOOST_CR1 0x40004321\r
-#define CYREG_BOOST_CR2 0x40004322\r
-#define CYREG_BOOST_CR3 0x40004323\r
-#define CYREG_BOOST_SR 0x40004324\r
-#define CYREG_BOOST_CR4 0x40004325\r
-#define CYREG_BOOST_SR2 0x40004326\r
-#define CYDEV_PWRSYS_BASE 0x40004330\r
-#define CYDEV_PWRSYS_SIZE 0x00000002\r
-#define CYREG_PWRSYS_CR0 0x40004330\r
-#define CYREG_PWRSYS_CR1 0x40004331\r
-#define CYDEV_PM_BASE 0x40004380\r
-#define CYDEV_PM_SIZE 0x00000057\r
-#define CYREG_PM_TW_CFG0 0x40004380\r
-#define CYREG_PM_TW_CFG1 0x40004381\r
-#define CYREG_PM_TW_CFG2 0x40004382\r
-#define CYREG_PM_WDT_CFG 0x40004383\r
-#define CYREG_PM_WDT_CR 0x40004384\r
-#define CYREG_PM_INT_SR 0x40004390\r
-#define CYREG_PM_MODE_CFG0 0x40004391\r
-#define CYREG_PM_MODE_CFG1 0x40004392\r
-#define CYREG_PM_MODE_CSR 0x40004393\r
-#define CYREG_PM_USB_CR0 0x40004394\r
-#define CYREG_PM_WAKEUP_CFG0 0x40004398\r
-#define CYREG_PM_WAKEUP_CFG1 0x40004399\r
-#define CYREG_PM_WAKEUP_CFG2 0x4000439a\r
-#define CYDEV_PM_ACT_BASE 0x400043a0\r
-#define CYDEV_PM_ACT_SIZE 0x0000000e\r
-#define CYREG_PM_ACT_CFG0 0x400043a0\r
-#define CYREG_PM_ACT_CFG1 0x400043a1\r
-#define CYREG_PM_ACT_CFG2 0x400043a2\r
-#define CYREG_PM_ACT_CFG3 0x400043a3\r
-#define CYREG_PM_ACT_CFG4 0x400043a4\r
-#define CYREG_PM_ACT_CFG5 0x400043a5\r
-#define CYREG_PM_ACT_CFG6 0x400043a6\r
-#define CYREG_PM_ACT_CFG7 0x400043a7\r
-#define CYREG_PM_ACT_CFG8 0x400043a8\r
-#define CYREG_PM_ACT_CFG9 0x400043a9\r
-#define CYREG_PM_ACT_CFG10 0x400043aa\r
-#define CYREG_PM_ACT_CFG11 0x400043ab\r
-#define CYREG_PM_ACT_CFG12 0x400043ac\r
-#define CYREG_PM_ACT_CFG13 0x400043ad\r
-#define CYDEV_PM_STBY_BASE 0x400043b0\r
-#define CYDEV_PM_STBY_SIZE 0x0000000e\r
-#define CYREG_PM_STBY_CFG0 0x400043b0\r
-#define CYREG_PM_STBY_CFG1 0x400043b1\r
-#define CYREG_PM_STBY_CFG2 0x400043b2\r
-#define CYREG_PM_STBY_CFG3 0x400043b3\r
-#define CYREG_PM_STBY_CFG4 0x400043b4\r
-#define CYREG_PM_STBY_CFG5 0x400043b5\r
-#define CYREG_PM_STBY_CFG6 0x400043b6\r
-#define CYREG_PM_STBY_CFG7 0x400043b7\r
-#define CYREG_PM_STBY_CFG8 0x400043b8\r
-#define CYREG_PM_STBY_CFG9 0x400043b9\r
-#define CYREG_PM_STBY_CFG10 0x400043ba\r
-#define CYREG_PM_STBY_CFG11 0x400043bb\r
-#define CYREG_PM_STBY_CFG12 0x400043bc\r
-#define CYREG_PM_STBY_CFG13 0x400043bd\r
-#define CYDEV_PM_AVAIL_BASE 0x400043c0\r
-#define CYDEV_PM_AVAIL_SIZE 0x00000017\r
-#define CYREG_PM_AVAIL_CR0 0x400043c0\r
-#define CYREG_PM_AVAIL_CR1 0x400043c1\r
-#define CYREG_PM_AVAIL_CR2 0x400043c2\r
-#define CYREG_PM_AVAIL_CR3 0x400043c3\r
-#define CYREG_PM_AVAIL_CR4 0x400043c4\r
-#define CYREG_PM_AVAIL_CR5 0x400043c5\r
-#define CYREG_PM_AVAIL_CR6 0x400043c6\r
-#define CYREG_PM_AVAIL_SR0 0x400043d0\r
-#define CYREG_PM_AVAIL_SR1 0x400043d1\r
-#define CYREG_PM_AVAIL_SR2 0x400043d2\r
-#define CYREG_PM_AVAIL_SR3 0x400043d3\r
-#define CYREG_PM_AVAIL_SR4 0x400043d4\r
-#define CYREG_PM_AVAIL_SR5 0x400043d5\r
-#define CYREG_PM_AVAIL_SR6 0x400043d6\r
-#define CYDEV_PICU_BASE 0x40004500\r
-#define CYDEV_PICU_SIZE 0x000000b0\r
-#define CYDEV_PICU_INTTYPE_BASE 0x40004500\r
-#define CYDEV_PICU_INTTYPE_SIZE 0x00000080\r
-#define CYDEV_PICU_INTTYPE_PICU0_BASE 0x40004500\r
-#define CYDEV_PICU_INTTYPE_PICU0_SIZE 0x00000008\r
-#define CYREG_PICU0_INTTYPE0 0x40004500\r
-#define CYREG_PICU0_INTTYPE1 0x40004501\r
-#define CYREG_PICU0_INTTYPE2 0x40004502\r
-#define CYREG_PICU0_INTTYPE3 0x40004503\r
-#define CYREG_PICU0_INTTYPE4 0x40004504\r
-#define CYREG_PICU0_INTTYPE5 0x40004505\r
-#define CYREG_PICU0_INTTYPE6 0x40004506\r
-#define CYREG_PICU0_INTTYPE7 0x40004507\r
-#define CYDEV_PICU_INTTYPE_PICU1_BASE 0x40004508\r
-#define CYDEV_PICU_INTTYPE_PICU1_SIZE 0x00000008\r
-#define CYREG_PICU1_INTTYPE0 0x40004508\r
-#define CYREG_PICU1_INTTYPE1 0x40004509\r
-#define CYREG_PICU1_INTTYPE2 0x4000450a\r
-#define CYREG_PICU1_INTTYPE3 0x4000450b\r
-#define CYREG_PICU1_INTTYPE4 0x4000450c\r
-#define CYREG_PICU1_INTTYPE5 0x4000450d\r
-#define CYREG_PICU1_INTTYPE6 0x4000450e\r
-#define CYREG_PICU1_INTTYPE7 0x4000450f\r
-#define CYDEV_PICU_INTTYPE_PICU2_BASE 0x40004510\r
-#define CYDEV_PICU_INTTYPE_PICU2_SIZE 0x00000008\r
-#define CYREG_PICU2_INTTYPE0 0x40004510\r
-#define CYREG_PICU2_INTTYPE1 0x40004511\r
-#define CYREG_PICU2_INTTYPE2 0x40004512\r
-#define CYREG_PICU2_INTTYPE3 0x40004513\r
-#define CYREG_PICU2_INTTYPE4 0x40004514\r
-#define CYREG_PICU2_INTTYPE5 0x40004515\r
-#define CYREG_PICU2_INTTYPE6 0x40004516\r
-#define CYREG_PICU2_INTTYPE7 0x40004517\r
-#define CYDEV_PICU_INTTYPE_PICU3_BASE 0x40004518\r
-#define CYDEV_PICU_INTTYPE_PICU3_SIZE 0x00000008\r
-#define CYREG_PICU3_INTTYPE0 0x40004518\r
-#define CYREG_PICU3_INTTYPE1 0x40004519\r
-#define CYREG_PICU3_INTTYPE2 0x4000451a\r
-#define CYREG_PICU3_INTTYPE3 0x4000451b\r
-#define CYREG_PICU3_INTTYPE4 0x4000451c\r
-#define CYREG_PICU3_INTTYPE5 0x4000451d\r
-#define CYREG_PICU3_INTTYPE6 0x4000451e\r
-#define CYREG_PICU3_INTTYPE7 0x4000451f\r
-#define CYDEV_PICU_INTTYPE_PICU4_BASE 0x40004520\r
-#define CYDEV_PICU_INTTYPE_PICU4_SIZE 0x00000008\r
-#define CYREG_PICU4_INTTYPE0 0x40004520\r
-#define CYREG_PICU4_INTTYPE1 0x40004521\r
-#define CYREG_PICU4_INTTYPE2 0x40004522\r
-#define CYREG_PICU4_INTTYPE3 0x40004523\r
-#define CYREG_PICU4_INTTYPE4 0x40004524\r
-#define CYREG_PICU4_INTTYPE5 0x40004525\r
-#define CYREG_PICU4_INTTYPE6 0x40004526\r
-#define CYREG_PICU4_INTTYPE7 0x40004527\r
-#define CYDEV_PICU_INTTYPE_PICU5_BASE 0x40004528\r
-#define CYDEV_PICU_INTTYPE_PICU5_SIZE 0x00000008\r
-#define CYREG_PICU5_INTTYPE0 0x40004528\r
-#define CYREG_PICU5_INTTYPE1 0x40004529\r
-#define CYREG_PICU5_INTTYPE2 0x4000452a\r
-#define CYREG_PICU5_INTTYPE3 0x4000452b\r
-#define CYREG_PICU5_INTTYPE4 0x4000452c\r
-#define CYREG_PICU5_INTTYPE5 0x4000452d\r
-#define CYREG_PICU5_INTTYPE6 0x4000452e\r
-#define CYREG_PICU5_INTTYPE7 0x4000452f\r
-#define CYDEV_PICU_INTTYPE_PICU6_BASE 0x40004530\r
-#define CYDEV_PICU_INTTYPE_PICU6_SIZE 0x00000008\r
-#define CYREG_PICU6_INTTYPE0 0x40004530\r
-#define CYREG_PICU6_INTTYPE1 0x40004531\r
-#define CYREG_PICU6_INTTYPE2 0x40004532\r
-#define CYREG_PICU6_INTTYPE3 0x40004533\r
-#define CYREG_PICU6_INTTYPE4 0x40004534\r
-#define CYREG_PICU6_INTTYPE5 0x40004535\r
-#define CYREG_PICU6_INTTYPE6 0x40004536\r
-#define CYREG_PICU6_INTTYPE7 0x40004537\r
-#define CYDEV_PICU_INTTYPE_PICU12_BASE 0x40004560\r
-#define CYDEV_PICU_INTTYPE_PICU12_SIZE 0x00000008\r
-#define CYREG_PICU12_INTTYPE0 0x40004560\r
-#define CYREG_PICU12_INTTYPE1 0x40004561\r
-#define CYREG_PICU12_INTTYPE2 0x40004562\r
-#define CYREG_PICU12_INTTYPE3 0x40004563\r
-#define CYREG_PICU12_INTTYPE4 0x40004564\r
-#define CYREG_PICU12_INTTYPE5 0x40004565\r
-#define CYREG_PICU12_INTTYPE6 0x40004566\r
-#define CYREG_PICU12_INTTYPE7 0x40004567\r
-#define CYDEV_PICU_INTTYPE_PICU15_BASE 0x40004578\r
-#define CYDEV_PICU_INTTYPE_PICU15_SIZE 0x00000008\r
-#define CYREG_PICU15_INTTYPE0 0x40004578\r
-#define CYREG_PICU15_INTTYPE1 0x40004579\r
-#define CYREG_PICU15_INTTYPE2 0x4000457a\r
-#define CYREG_PICU15_INTTYPE3 0x4000457b\r
-#define CYREG_PICU15_INTTYPE4 0x4000457c\r
-#define CYREG_PICU15_INTTYPE5 0x4000457d\r
-#define CYREG_PICU15_INTTYPE6 0x4000457e\r
-#define CYREG_PICU15_INTTYPE7 0x4000457f\r
-#define CYDEV_PICU_STAT_BASE 0x40004580\r
-#define CYDEV_PICU_STAT_SIZE 0x00000010\r
-#define CYDEV_PICU_STAT_PICU0_BASE 0x40004580\r
-#define CYDEV_PICU_STAT_PICU0_SIZE 0x00000001\r
-#define CYREG_PICU0_INTSTAT 0x40004580\r
-#define CYDEV_PICU_STAT_PICU1_BASE 0x40004581\r
-#define CYDEV_PICU_STAT_PICU1_SIZE 0x00000001\r
-#define CYREG_PICU1_INTSTAT 0x40004581\r
-#define CYDEV_PICU_STAT_PICU2_BASE 0x40004582\r
-#define CYDEV_PICU_STAT_PICU2_SIZE 0x00000001\r
-#define CYREG_PICU2_INTSTAT 0x40004582\r
-#define CYDEV_PICU_STAT_PICU3_BASE 0x40004583\r
-#define CYDEV_PICU_STAT_PICU3_SIZE 0x00000001\r
-#define CYREG_PICU3_INTSTAT 0x40004583\r
-#define CYDEV_PICU_STAT_PICU4_BASE 0x40004584\r
-#define CYDEV_PICU_STAT_PICU4_SIZE 0x00000001\r
-#define CYREG_PICU4_INTSTAT 0x40004584\r
-#define CYDEV_PICU_STAT_PICU5_BASE 0x40004585\r
-#define CYDEV_PICU_STAT_PICU5_SIZE 0x00000001\r
-#define CYREG_PICU5_INTSTAT 0x40004585\r
-#define CYDEV_PICU_STAT_PICU6_BASE 0x40004586\r
-#define CYDEV_PICU_STAT_PICU6_SIZE 0x00000001\r
-#define CYREG_PICU6_INTSTAT 0x40004586\r
-#define CYDEV_PICU_STAT_PICU12_BASE 0x4000458c\r
-#define CYDEV_PICU_STAT_PICU12_SIZE 0x00000001\r
-#define CYREG_PICU12_INTSTAT 0x4000458c\r
-#define CYDEV_PICU_STAT_PICU15_BASE 0x4000458f\r
-#define CYDEV_PICU_STAT_PICU15_SIZE 0x00000001\r
-#define CYREG_PICU15_INTSTAT 0x4000458f\r
-#define CYDEV_PICU_SNAP_BASE 0x40004590\r
-#define CYDEV_PICU_SNAP_SIZE 0x00000010\r
-#define CYDEV_PICU_SNAP_PICU0_BASE 0x40004590\r
-#define CYDEV_PICU_SNAP_PICU0_SIZE 0x00000001\r
-#define CYREG_PICU0_SNAP 0x40004590\r
-#define CYDEV_PICU_SNAP_PICU1_BASE 0x40004591\r
-#define CYDEV_PICU_SNAP_PICU1_SIZE 0x00000001\r
-#define CYREG_PICU1_SNAP 0x40004591\r
-#define CYDEV_PICU_SNAP_PICU2_BASE 0x40004592\r
-#define CYDEV_PICU_SNAP_PICU2_SIZE 0x00000001\r
-#define CYREG_PICU2_SNAP 0x40004592\r
-#define CYDEV_PICU_SNAP_PICU3_BASE 0x40004593\r
-#define CYDEV_PICU_SNAP_PICU3_SIZE 0x00000001\r
-#define CYREG_PICU3_SNAP 0x40004593\r
-#define CYDEV_PICU_SNAP_PICU4_BASE 0x40004594\r
-#define CYDEV_PICU_SNAP_PICU4_SIZE 0x00000001\r
-#define CYREG_PICU4_SNAP 0x40004594\r
-#define CYDEV_PICU_SNAP_PICU5_BASE 0x40004595\r
-#define CYDEV_PICU_SNAP_PICU5_SIZE 0x00000001\r
-#define CYREG_PICU5_SNAP 0x40004595\r
-#define CYDEV_PICU_SNAP_PICU6_BASE 0x40004596\r
-#define CYDEV_PICU_SNAP_PICU6_SIZE 0x00000001\r
-#define CYREG_PICU6_SNAP 0x40004596\r
-#define CYDEV_PICU_SNAP_PICU12_BASE 0x4000459c\r
-#define CYDEV_PICU_SNAP_PICU12_SIZE 0x00000001\r
-#define CYREG_PICU12_SNAP 0x4000459c\r
-#define CYDEV_PICU_SNAP_PICU_15_BASE 0x4000459f\r
-#define CYDEV_PICU_SNAP_PICU_15_SIZE 0x00000001\r
-#define CYREG_PICU_15_SNAP_15 0x4000459f\r
-#define CYDEV_PICU_DISABLE_COR_BASE 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_SIZE 0x00000010\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_BASE 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_PICU0_SIZE 0x00000001\r
-#define CYREG_PICU0_DISABLE_COR 0x400045a0\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_BASE 0x400045a1\r
-#define CYDEV_PICU_DISABLE_COR_PICU1_SIZE 0x00000001\r
-#define CYREG_PICU1_DISABLE_COR 0x400045a1\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_BASE 0x400045a2\r
-#define CYDEV_PICU_DISABLE_COR_PICU2_SIZE 0x00000001\r
-#define CYREG_PICU2_DISABLE_COR 0x400045a2\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_BASE 0x400045a3\r
-#define CYDEV_PICU_DISABLE_COR_PICU3_SIZE 0x00000001\r
-#define CYREG_PICU3_DISABLE_COR 0x400045a3\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_BASE 0x400045a4\r
-#define CYDEV_PICU_DISABLE_COR_PICU4_SIZE 0x00000001\r
-#define CYREG_PICU4_DISABLE_COR 0x400045a4\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_BASE 0x400045a5\r
-#define CYDEV_PICU_DISABLE_COR_PICU5_SIZE 0x00000001\r
-#define CYREG_PICU5_DISABLE_COR 0x400045a5\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_BASE 0x400045a6\r
-#define CYDEV_PICU_DISABLE_COR_PICU6_SIZE 0x00000001\r
-#define CYREG_PICU6_DISABLE_COR 0x400045a6\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_BASE 0x400045ac\r
-#define CYDEV_PICU_DISABLE_COR_PICU12_SIZE 0x00000001\r
-#define CYREG_PICU12_DISABLE_COR 0x400045ac\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_BASE 0x400045af\r
-#define CYDEV_PICU_DISABLE_COR_PICU15_SIZE 0x00000001\r
-#define CYREG_PICU15_DISABLE_COR 0x400045af\r
-#define CYDEV_MFGCFG_BASE 0x40004600\r
-#define CYDEV_MFGCFG_SIZE 0x000000ed\r
-#define CYDEV_MFGCFG_ANAIF_BASE 0x40004600\r
-#define CYDEV_MFGCFG_ANAIF_SIZE 0x00000038\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_BASE 0x40004608\r
-#define CYDEV_MFGCFG_ANAIF_DAC0_SIZE 0x00000001\r
-#define CYREG_DAC0_TR 0x40004608\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_BASE 0x40004609\r
-#define CYDEV_MFGCFG_ANAIF_DAC1_SIZE 0x00000001\r
-#define CYREG_DAC1_TR 0x40004609\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_BASE 0x4000460a\r
-#define CYDEV_MFGCFG_ANAIF_DAC2_SIZE 0x00000001\r
-#define CYREG_DAC2_TR 0x4000460a\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_BASE 0x4000460b\r
-#define CYDEV_MFGCFG_ANAIF_DAC3_SIZE 0x00000001\r
-#define CYREG_DAC3_TR 0x4000460b\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE 0x40004610\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE 0x00000001\r
-#define CYREG_NPUMP_DSM_TR0 0x40004610\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE 0x40004611\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE 0x00000001\r
-#define CYREG_NPUMP_SC_TR0 0x40004611\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE 0x40004612\r
-#define CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE 0x00000001\r
-#define CYREG_NPUMP_OPAMP_TR0 0x40004612\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_BASE 0x40004614\r
-#define CYDEV_MFGCFG_ANAIF_SAR0_SIZE 0x00000001\r
-#define CYREG_SAR0_TR0 0x40004614\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_BASE 0x40004616\r
-#define CYDEV_MFGCFG_ANAIF_SAR1_SIZE 0x00000001\r
-#define CYREG_SAR1_TR0 0x40004616\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_BASE 0x40004620\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE 0x00000002\r
-#define CYREG_OPAMP0_TR0 0x40004620\r
-#define CYREG_OPAMP0_TR1 0x40004621\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_BASE 0x40004622\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE 0x00000002\r
-#define CYREG_OPAMP1_TR0 0x40004622\r
-#define CYREG_OPAMP1_TR1 0x40004623\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_BASE 0x40004624\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE 0x00000002\r
-#define CYREG_OPAMP2_TR0 0x40004624\r
-#define CYREG_OPAMP2_TR1 0x40004625\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_BASE 0x40004626\r
-#define CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE 0x00000002\r
-#define CYREG_OPAMP3_TR0 0x40004626\r
-#define CYREG_OPAMP3_TR1 0x40004627\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_BASE 0x40004630\r
-#define CYDEV_MFGCFG_ANAIF_CMP0_SIZE 0x00000002\r
-#define CYREG_CMP0_TR0 0x40004630\r
-#define CYREG_CMP0_TR1 0x40004631\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_BASE 0x40004632\r
-#define CYDEV_MFGCFG_ANAIF_CMP1_SIZE 0x00000002\r
-#define CYREG_CMP1_TR0 0x40004632\r
-#define CYREG_CMP1_TR1 0x40004633\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_BASE 0x40004634\r
-#define CYDEV_MFGCFG_ANAIF_CMP2_SIZE 0x00000002\r
-#define CYREG_CMP2_TR0 0x40004634\r
-#define CYREG_CMP2_TR1 0x40004635\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_BASE 0x40004636\r
-#define CYDEV_MFGCFG_ANAIF_CMP3_SIZE 0x00000002\r
-#define CYREG_CMP3_TR0 0x40004636\r
-#define CYREG_CMP3_TR1 0x40004637\r
-#define CYDEV_MFGCFG_PWRSYS_BASE 0x40004680\r
-#define CYDEV_MFGCFG_PWRSYS_SIZE 0x0000000b\r
-#define CYREG_PWRSYS_HIB_TR0 0x40004680\r
-#define CYREG_PWRSYS_HIB_TR1 0x40004681\r
-#define CYREG_PWRSYS_I2C_TR 0x40004682\r
-#define CYREG_PWRSYS_SLP_TR 0x40004683\r
-#define CYREG_PWRSYS_BUZZ_TR 0x40004684\r
-#define CYREG_PWRSYS_WAKE_TR0 0x40004685\r
-#define CYREG_PWRSYS_WAKE_TR1 0x40004686\r
-#define CYREG_PWRSYS_BREF_TR 0x40004687\r
-#define CYREG_PWRSYS_BG_TR 0x40004688\r
-#define CYREG_PWRSYS_WAKE_TR2 0x40004689\r
-#define CYREG_PWRSYS_WAKE_TR3 0x4000468a\r
-#define CYDEV_MFGCFG_ILO_BASE 0x40004690\r
-#define CYDEV_MFGCFG_ILO_SIZE 0x00000002\r
-#define CYREG_ILO_TR0 0x40004690\r
-#define CYREG_ILO_TR1 0x40004691\r
-#define CYDEV_MFGCFG_X32_BASE 0x40004698\r
-#define CYDEV_MFGCFG_X32_SIZE 0x00000001\r
-#define CYREG_X32_TR 0x40004698\r
-#define CYDEV_MFGCFG_IMO_BASE 0x400046a0\r
-#define CYDEV_MFGCFG_IMO_SIZE 0x00000005\r
-#define CYREG_IMO_TR0 0x400046a0\r
-#define CYREG_IMO_TR1 0x400046a1\r
-#define CYREG_IMO_GAIN 0x400046a2\r
-#define CYREG_IMO_C36M 0x400046a3\r
-#define CYREG_IMO_TR2 0x400046a4\r
-#define CYDEV_MFGCFG_XMHZ_BASE 0x400046a8\r
-#define CYDEV_MFGCFG_XMHZ_SIZE 0x00000001\r
-#define CYREG_XMHZ_TR 0x400046a8\r
-#define CYREG_MFGCFG_DLY 0x400046c0\r
-#define CYDEV_MFGCFG_MLOGIC_BASE 0x400046e0\r
-#define CYDEV_MFGCFG_MLOGIC_SIZE 0x0000000d\r
-#define CYREG_MLOGIC_DMPSTR 0x400046e2\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_BASE 0x400046e4\r
-#define CYDEV_MFGCFG_MLOGIC_SEG_SIZE 0x00000002\r
-#define CYREG_MLOGIC_SEG_CR 0x400046e4\r
-#define CYREG_MLOGIC_SEG_CFG0 0x400046e5\r
-#define CYREG_MLOGIC_DEBUG 0x400046e8\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE 0x400046ea\r
-#define CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE 0x00000001\r
-#define CYREG_MLOGIC_CPU_SCR_CPU_SCR 0x400046ea\r
-#define CYREG_MLOGIC_REV_ID 0x400046ec\r
-#define CYDEV_RESET_BASE 0x400046f0\r
-#define CYDEV_RESET_SIZE 0x0000000f\r
-#define CYREG_RESET_IPOR_CR0 0x400046f0\r
-#define CYREG_RESET_IPOR_CR1 0x400046f1\r
-#define CYREG_RESET_IPOR_CR2 0x400046f2\r
-#define CYREG_RESET_IPOR_CR3 0x400046f3\r
-#define CYREG_RESET_CR0 0x400046f4\r
-#define CYREG_RESET_CR1 0x400046f5\r
-#define CYREG_RESET_CR2 0x400046f6\r
-#define CYREG_RESET_CR3 0x400046f7\r
-#define CYREG_RESET_CR4 0x400046f8\r
-#define CYREG_RESET_CR5 0x400046f9\r
-#define CYREG_RESET_SR0 0x400046fa\r
-#define CYREG_RESET_SR1 0x400046fb\r
-#define CYREG_RESET_SR2 0x400046fc\r
-#define CYREG_RESET_SR3 0x400046fd\r
-#define CYREG_RESET_TR 0x400046fe\r
-#define CYDEV_SPC_BASE 0x40004700\r
-#define CYDEV_SPC_SIZE 0x00000100\r
-#define CYREG_SPC_FM_EE_CR 0x40004700\r
-#define CYREG_SPC_FM_EE_WAKE_CNT 0x40004701\r
-#define CYREG_SPC_EE_SCR 0x40004702\r
-#define CYREG_SPC_EE_ERR 0x40004703\r
-#define CYREG_SPC_CPU_DATA 0x40004720\r
-#define CYREG_SPC_DMA_DATA 0x40004721\r
-#define CYREG_SPC_SR 0x40004722\r
-#define CYREG_SPC_CR 0x40004723\r
-#define CYDEV_SPC_DMM_MAP_BASE 0x40004780\r
-#define CYDEV_SPC_DMM_MAP_SIZE 0x00000080\r
-#define CYREG_SPC_DMM_MAP_SRAM_MBASE 0x40004780\r
-#define CYREG_SPC_DMM_MAP_SRAM_MSIZE 0x00000080\r
-#define CYDEV_CACHE_BASE 0x40004800\r
-#define CYDEV_CACHE_SIZE 0x0000009c\r
-#define CYREG_CACHE_CC_CTL 0x40004800\r
-#define CYREG_CACHE_ECC_CORR 0x40004880\r
-#define CYREG_CACHE_ECC_ERR 0x40004888\r
-#define CYREG_CACHE_FLASH_ERR 0x40004890\r
-#define CYREG_CACHE_HITMISS 0x40004898\r
-#define CYDEV_I2C_BASE 0x40004900\r
-#define CYDEV_I2C_SIZE 0x000000e1\r
-#define CYREG_I2C_XCFG 0x400049c8\r
-#define CYREG_I2C_ADR 0x400049ca\r
-#define CYREG_I2C_CFG 0x400049d6\r
-#define CYREG_I2C_CSR 0x400049d7\r
-#define CYREG_I2C_D 0x400049d8\r
-#define CYREG_I2C_MCSR 0x400049d9\r
-#define CYREG_I2C_CLK_DIV1 0x400049db\r
-#define CYREG_I2C_CLK_DIV2 0x400049dc\r
-#define CYREG_I2C_TMOUT_CSR 0x400049dd\r
-#define CYREG_I2C_TMOUT_SR 0x400049de\r
-#define CYREG_I2C_TMOUT_CFG0 0x400049df\r
-#define CYREG_I2C_TMOUT_CFG1 0x400049e0\r
-#define CYDEV_DEC_BASE 0x40004e00\r
-#define CYDEV_DEC_SIZE 0x00000015\r
-#define CYREG_DEC_CR 0x40004e00\r
-#define CYREG_DEC_SR 0x40004e01\r
-#define CYREG_DEC_SHIFT1 0x40004e02\r
-#define CYREG_DEC_SHIFT2 0x40004e03\r
-#define CYREG_DEC_DR2 0x40004e04\r
-#define CYREG_DEC_DR2H 0x40004e05\r
-#define CYREG_DEC_DR1 0x40004e06\r
-#define CYREG_DEC_OCOR 0x40004e08\r
-#define CYREG_DEC_OCORM 0x40004e09\r
-#define CYREG_DEC_OCORH 0x40004e0a\r
-#define CYREG_DEC_GCOR 0x40004e0c\r
-#define CYREG_DEC_GCORH 0x40004e0d\r
-#define CYREG_DEC_GVAL 0x40004e0e\r
-#define CYREG_DEC_OUTSAMP 0x40004e10\r
-#define CYREG_DEC_OUTSAMPM 0x40004e11\r
-#define CYREG_DEC_OUTSAMPH 0x40004e12\r
-#define CYREG_DEC_OUTSAMPS 0x40004e13\r
-#define CYREG_DEC_COHER 0x40004e14\r
-#define CYDEV_TMR0_BASE 0x40004f00\r
-#define CYDEV_TMR0_SIZE 0x0000000c\r
-#define CYREG_TMR0_CFG0 0x40004f00\r
-#define CYREG_TMR0_CFG1 0x40004f01\r
-#define CYREG_TMR0_CFG2 0x40004f02\r
-#define CYREG_TMR0_SR0 0x40004f03\r
-#define CYREG_TMR0_PER0 0x40004f04\r
-#define CYREG_TMR0_PER1 0x40004f05\r
-#define CYREG_TMR0_CNT_CMP0 0x40004f06\r
-#define CYREG_TMR0_CNT_CMP1 0x40004f07\r
-#define CYREG_TMR0_CAP0 0x40004f08\r
-#define CYREG_TMR0_CAP1 0x40004f09\r
-#define CYREG_TMR0_RT0 0x40004f0a\r
-#define CYREG_TMR0_RT1 0x40004f0b\r
-#define CYDEV_TMR1_BASE 0x40004f0c\r
-#define CYDEV_TMR1_SIZE 0x0000000c\r
-#define CYREG_TMR1_CFG0 0x40004f0c\r
-#define CYREG_TMR1_CFG1 0x40004f0d\r
-#define CYREG_TMR1_CFG2 0x40004f0e\r
-#define CYREG_TMR1_SR0 0x40004f0f\r
-#define CYREG_TMR1_PER0 0x40004f10\r
-#define CYREG_TMR1_PER1 0x40004f11\r
-#define CYREG_TMR1_CNT_CMP0 0x40004f12\r
-#define CYREG_TMR1_CNT_CMP1 0x40004f13\r
-#define CYREG_TMR1_CAP0 0x40004f14\r
-#define CYREG_TMR1_CAP1 0x40004f15\r
-#define CYREG_TMR1_RT0 0x40004f16\r
-#define CYREG_TMR1_RT1 0x40004f17\r
-#define CYDEV_TMR2_BASE 0x40004f18\r
-#define CYDEV_TMR2_SIZE 0x0000000c\r
-#define CYREG_TMR2_CFG0 0x40004f18\r
-#define CYREG_TMR2_CFG1 0x40004f19\r
-#define CYREG_TMR2_CFG2 0x40004f1a\r
-#define CYREG_TMR2_SR0 0x40004f1b\r
-#define CYREG_TMR2_PER0 0x40004f1c\r
-#define CYREG_TMR2_PER1 0x40004f1d\r
-#define CYREG_TMR2_CNT_CMP0 0x40004f1e\r
-#define CYREG_TMR2_CNT_CMP1 0x40004f1f\r
-#define CYREG_TMR2_CAP0 0x40004f20\r
-#define CYREG_TMR2_CAP1 0x40004f21\r
-#define CYREG_TMR2_RT0 0x40004f22\r
-#define CYREG_TMR2_RT1 0x40004f23\r
-#define CYDEV_TMR3_BASE 0x40004f24\r
-#define CYDEV_TMR3_SIZE 0x0000000c\r
-#define CYREG_TMR3_CFG0 0x40004f24\r
-#define CYREG_TMR3_CFG1 0x40004f25\r
-#define CYREG_TMR3_CFG2 0x40004f26\r
-#define CYREG_TMR3_SR0 0x40004f27\r
-#define CYREG_TMR3_PER0 0x40004f28\r
-#define CYREG_TMR3_PER1 0x40004f29\r
-#define CYREG_TMR3_CNT_CMP0 0x40004f2a\r
-#define CYREG_TMR3_CNT_CMP1 0x40004f2b\r
-#define CYREG_TMR3_CAP0 0x40004f2c\r
-#define CYREG_TMR3_CAP1 0x40004f2d\r
-#define CYREG_TMR3_RT0 0x40004f2e\r
-#define CYREG_TMR3_RT1 0x40004f2f\r
-#define CYDEV_IO_BASE 0x40005000\r
-#define CYDEV_IO_SIZE 0x00000200\r
-#define CYDEV_IO_PC_BASE 0x40005000\r
-#define CYDEV_IO_PC_SIZE 0x00000080\r
-#define CYDEV_IO_PC_PRT0_BASE 0x40005000\r
-#define CYDEV_IO_PC_PRT0_SIZE 0x00000008\r
-#define CYREG_PRT0_PC0 0x40005000\r
-#define CYREG_PRT0_PC1 0x40005001\r
-#define CYREG_PRT0_PC2 0x40005002\r
-#define CYREG_PRT0_PC3 0x40005003\r
-#define CYREG_PRT0_PC4 0x40005004\r
-#define CYREG_PRT0_PC5 0x40005005\r
-#define CYREG_PRT0_PC6 0x40005006\r
-#define CYREG_PRT0_PC7 0x40005007\r
-#define CYDEV_IO_PC_PRT1_BASE 0x40005008\r
-#define CYDEV_IO_PC_PRT1_SIZE 0x00000008\r
-#define CYREG_PRT1_PC0 0x40005008\r
-#define CYREG_PRT1_PC1 0x40005009\r
-#define CYREG_PRT1_PC2 0x4000500a\r
-#define CYREG_PRT1_PC3 0x4000500b\r
-#define CYREG_PRT1_PC4 0x4000500c\r
-#define CYREG_PRT1_PC5 0x4000500d\r
-#define CYREG_PRT1_PC6 0x4000500e\r
-#define CYREG_PRT1_PC7 0x4000500f\r
-#define CYDEV_IO_PC_PRT2_BASE 0x40005010\r
-#define CYDEV_IO_PC_PRT2_SIZE 0x00000008\r
-#define CYREG_PRT2_PC0 0x40005010\r
-#define CYREG_PRT2_PC1 0x40005011\r
-#define CYREG_PRT2_PC2 0x40005012\r
-#define CYREG_PRT2_PC3 0x40005013\r
-#define CYREG_PRT2_PC4 0x40005014\r
-#define CYREG_PRT2_PC5 0x40005015\r
-#define CYREG_PRT2_PC6 0x40005016\r
-#define CYREG_PRT2_PC7 0x40005017\r
-#define CYDEV_IO_PC_PRT3_BASE 0x40005018\r
-#define CYDEV_IO_PC_PRT3_SIZE 0x00000008\r
-#define CYREG_PRT3_PC0 0x40005018\r
-#define CYREG_PRT3_PC1 0x40005019\r
-#define CYREG_PRT3_PC2 0x4000501a\r
-#define CYREG_PRT3_PC3 0x4000501b\r
-#define CYREG_PRT3_PC4 0x4000501c\r
-#define CYREG_PRT3_PC5 0x4000501d\r
-#define CYREG_PRT3_PC6 0x4000501e\r
-#define CYREG_PRT3_PC7 0x4000501f\r
-#define CYDEV_IO_PC_PRT4_BASE 0x40005020\r
-#define CYDEV_IO_PC_PRT4_SIZE 0x00000008\r
-#define CYREG_PRT4_PC0 0x40005020\r
-#define CYREG_PRT4_PC1 0x40005021\r
-#define CYREG_PRT4_PC2 0x40005022\r
-#define CYREG_PRT4_PC3 0x40005023\r
-#define CYREG_PRT4_PC4 0x40005024\r
-#define CYREG_PRT4_PC5 0x40005025\r
-#define CYREG_PRT4_PC6 0x40005026\r
-#define CYREG_PRT4_PC7 0x40005027\r
-#define CYDEV_IO_PC_PRT5_BASE 0x40005028\r
-#define CYDEV_IO_PC_PRT5_SIZE 0x00000008\r
-#define CYREG_PRT5_PC0 0x40005028\r
-#define CYREG_PRT5_PC1 0x40005029\r
-#define CYREG_PRT5_PC2 0x4000502a\r
-#define CYREG_PRT5_PC3 0x4000502b\r
-#define CYREG_PRT5_PC4 0x4000502c\r
-#define CYREG_PRT5_PC5 0x4000502d\r
-#define CYREG_PRT5_PC6 0x4000502e\r
-#define CYREG_PRT5_PC7 0x4000502f\r
-#define CYDEV_IO_PC_PRT6_BASE 0x40005030\r
-#define CYDEV_IO_PC_PRT6_SIZE 0x00000008\r
-#define CYREG_PRT6_PC0 0x40005030\r
-#define CYREG_PRT6_PC1 0x40005031\r
-#define CYREG_PRT6_PC2 0x40005032\r
-#define CYREG_PRT6_PC3 0x40005033\r
-#define CYREG_PRT6_PC4 0x40005034\r
-#define CYREG_PRT6_PC5 0x40005035\r
-#define CYREG_PRT6_PC6 0x40005036\r
-#define CYREG_PRT6_PC7 0x40005037\r
-#define CYDEV_IO_PC_PRT12_BASE 0x40005060\r
-#define CYDEV_IO_PC_PRT12_SIZE 0x00000008\r
-#define CYREG_PRT12_PC0 0x40005060\r
-#define CYREG_PRT12_PC1 0x40005061\r
-#define CYREG_PRT12_PC2 0x40005062\r
-#define CYREG_PRT12_PC3 0x40005063\r
-#define CYREG_PRT12_PC4 0x40005064\r
-#define CYREG_PRT12_PC5 0x40005065\r
-#define CYREG_PRT12_PC6 0x40005066\r
-#define CYREG_PRT12_PC7 0x40005067\r
-#define CYDEV_IO_PC_PRT15_BASE 0x40005078\r
-#define CYDEV_IO_PC_PRT15_SIZE 0x00000006\r
-#define CYREG_IO_PC_PRT15_PC0 0x40005078\r
-#define CYREG_IO_PC_PRT15_PC1 0x40005079\r
-#define CYREG_IO_PC_PRT15_PC2 0x4000507a\r
-#define CYREG_IO_PC_PRT15_PC3 0x4000507b\r
-#define CYREG_IO_PC_PRT15_PC4 0x4000507c\r
-#define CYREG_IO_PC_PRT15_PC5 0x4000507d\r
-#define CYDEV_IO_PC_PRT15_7_6_BASE 0x4000507e\r
-#define CYDEV_IO_PC_PRT15_7_6_SIZE 0x00000002\r
-#define CYREG_IO_PC_PRT15_7_6_PC0 0x4000507e\r
-#define CYREG_IO_PC_PRT15_7_6_PC1 0x4000507f\r
-#define CYDEV_IO_DR_BASE 0x40005080\r
-#define CYDEV_IO_DR_SIZE 0x00000010\r
-#define CYDEV_IO_DR_PRT0_BASE 0x40005080\r
-#define CYDEV_IO_DR_PRT0_SIZE 0x00000001\r
-#define CYREG_PRT0_DR_ALIAS 0x40005080\r
-#define CYDEV_IO_DR_PRT1_BASE 0x40005081\r
-#define CYDEV_IO_DR_PRT1_SIZE 0x00000001\r
-#define CYREG_PRT1_DR_ALIAS 0x40005081\r
-#define CYDEV_IO_DR_PRT2_BASE 0x40005082\r
-#define CYDEV_IO_DR_PRT2_SIZE 0x00000001\r
-#define CYREG_PRT2_DR_ALIAS 0x40005082\r
-#define CYDEV_IO_DR_PRT3_BASE 0x40005083\r
-#define CYDEV_IO_DR_PRT3_SIZE 0x00000001\r
-#define CYREG_PRT3_DR_ALIAS 0x40005083\r
-#define CYDEV_IO_DR_PRT4_BASE 0x40005084\r
-#define CYDEV_IO_DR_PRT4_SIZE 0x00000001\r
-#define CYREG_PRT4_DR_ALIAS 0x40005084\r
-#define CYDEV_IO_DR_PRT5_BASE 0x40005085\r
-#define CYDEV_IO_DR_PRT5_SIZE 0x00000001\r
-#define CYREG_PRT5_DR_ALIAS 0x40005085\r
-#define CYDEV_IO_DR_PRT6_BASE 0x40005086\r
-#define CYDEV_IO_DR_PRT6_SIZE 0x00000001\r
-#define CYREG_PRT6_DR_ALIAS 0x40005086\r
-#define CYDEV_IO_DR_PRT12_BASE 0x4000508c\r
-#define CYDEV_IO_DR_PRT12_SIZE 0x00000001\r
-#define CYREG_PRT12_DR_ALIAS 0x4000508c\r
-#define CYDEV_IO_DR_PRT15_BASE 0x4000508f\r
-#define CYDEV_IO_DR_PRT15_SIZE 0x00000001\r
-#define CYREG_PRT15_DR_15_ALIAS 0x4000508f\r
-#define CYDEV_IO_PS_BASE 0x40005090\r
-#define CYDEV_IO_PS_SIZE 0x00000010\r
-#define CYDEV_IO_PS_PRT0_BASE 0x40005090\r
-#define CYDEV_IO_PS_PRT0_SIZE 0x00000001\r
-#define CYREG_PRT0_PS_ALIAS 0x40005090\r
-#define CYDEV_IO_PS_PRT1_BASE 0x40005091\r
-#define CYDEV_IO_PS_PRT1_SIZE 0x00000001\r
-#define CYREG_PRT1_PS_ALIAS 0x40005091\r
-#define CYDEV_IO_PS_PRT2_BASE 0x40005092\r
-#define CYDEV_IO_PS_PRT2_SIZE 0x00000001\r
-#define CYREG_PRT2_PS_ALIAS 0x40005092\r
-#define CYDEV_IO_PS_PRT3_BASE 0x40005093\r
-#define CYDEV_IO_PS_PRT3_SIZE 0x00000001\r
-#define CYREG_PRT3_PS_ALIAS 0x40005093\r
-#define CYDEV_IO_PS_PRT4_BASE 0x40005094\r
-#define CYDEV_IO_PS_PRT4_SIZE 0x00000001\r
-#define CYREG_PRT4_PS_ALIAS 0x40005094\r
-#define CYDEV_IO_PS_PRT5_BASE 0x40005095\r
-#define CYDEV_IO_PS_PRT5_SIZE 0x00000001\r
-#define CYREG_PRT5_PS_ALIAS 0x40005095\r
-#define CYDEV_IO_PS_PRT6_BASE 0x40005096\r
-#define CYDEV_IO_PS_PRT6_SIZE 0x00000001\r
-#define CYREG_PRT6_PS_ALIAS 0x40005096\r
-#define CYDEV_IO_PS_PRT12_BASE 0x4000509c\r
-#define CYDEV_IO_PS_PRT12_SIZE 0x00000001\r
-#define CYREG_PRT12_PS_ALIAS 0x4000509c\r
-#define CYDEV_IO_PS_PRT15_BASE 0x4000509f\r
-#define CYDEV_IO_PS_PRT15_SIZE 0x00000001\r
-#define CYREG_PRT15_PS15_ALIAS 0x4000509f\r
-#define CYDEV_IO_PRT_BASE 0x40005100\r
-#define CYDEV_IO_PRT_SIZE 0x00000100\r
-#define CYDEV_IO_PRT_PRT0_BASE 0x40005100\r
-#define CYDEV_IO_PRT_PRT0_SIZE 0x00000010\r
-#define CYREG_PRT0_DR 0x40005100\r
-#define CYREG_PRT0_PS 0x40005101\r
-#define CYREG_PRT0_DM0 0x40005102\r
-#define CYREG_PRT0_DM1 0x40005103\r
-#define CYREG_PRT0_DM2 0x40005104\r
-#define CYREG_PRT0_SLW 0x40005105\r
-#define CYREG_PRT0_BYP 0x40005106\r
-#define CYREG_PRT0_BIE 0x40005107\r
-#define CYREG_PRT0_INP_DIS 0x40005108\r
-#define CYREG_PRT0_CTL 0x40005109\r
-#define CYREG_PRT0_PRT 0x4000510a\r
-#define CYREG_PRT0_BIT_MASK 0x4000510b\r
-#define CYREG_PRT0_AMUX 0x4000510c\r
-#define CYREG_PRT0_AG 0x4000510d\r
-#define CYREG_PRT0_LCD_COM_SEG 0x4000510e\r
-#define CYREG_PRT0_LCD_EN 0x4000510f\r
-#define CYDEV_IO_PRT_PRT1_BASE 0x40005110\r
-#define CYDEV_IO_PRT_PRT1_SIZE 0x00000010\r
-#define CYREG_PRT1_DR 0x40005110\r
-#define CYREG_PRT1_PS 0x40005111\r
-#define CYREG_PRT1_DM0 0x40005112\r
-#define CYREG_PRT1_DM1 0x40005113\r
-#define CYREG_PRT1_DM2 0x40005114\r
-#define CYREG_PRT1_SLW 0x40005115\r
-#define CYREG_PRT1_BYP 0x40005116\r
-#define CYREG_PRT1_BIE 0x40005117\r
-#define CYREG_PRT1_INP_DIS 0x40005118\r
-#define CYREG_PRT1_CTL 0x40005119\r
-#define CYREG_PRT1_PRT 0x4000511a\r
-#define CYREG_PRT1_BIT_MASK 0x4000511b\r
-#define CYREG_PRT1_AMUX 0x4000511c\r
-#define CYREG_PRT1_AG 0x4000511d\r
-#define CYREG_PRT1_LCD_COM_SEG 0x4000511e\r
-#define CYREG_PRT1_LCD_EN 0x4000511f\r
-#define CYDEV_IO_PRT_PRT2_BASE 0x40005120\r
-#define CYDEV_IO_PRT_PRT2_SIZE 0x00000010\r
-#define CYREG_PRT2_DR 0x40005120\r
-#define CYREG_PRT2_PS 0x40005121\r
-#define CYREG_PRT2_DM0 0x40005122\r
-#define CYREG_PRT2_DM1 0x40005123\r
-#define CYREG_PRT2_DM2 0x40005124\r
-#define CYREG_PRT2_SLW 0x40005125\r
-#define CYREG_PRT2_BYP 0x40005126\r
-#define CYREG_PRT2_BIE 0x40005127\r
-#define CYREG_PRT2_INP_DIS 0x40005128\r
-#define CYREG_PRT2_CTL 0x40005129\r
-#define CYREG_PRT2_PRT 0x4000512a\r
-#define CYREG_PRT2_BIT_MASK 0x4000512b\r
-#define CYREG_PRT2_AMUX 0x4000512c\r
-#define CYREG_PRT2_AG 0x4000512d\r
-#define CYREG_PRT2_LCD_COM_SEG 0x4000512e\r
-#define CYREG_PRT2_LCD_EN 0x4000512f\r
-#define CYDEV_IO_PRT_PRT3_BASE 0x40005130\r
-#define CYDEV_IO_PRT_PRT3_SIZE 0x00000010\r
-#define CYREG_PRT3_DR 0x40005130\r
-#define CYREG_PRT3_PS 0x40005131\r
-#define CYREG_PRT3_DM0 0x40005132\r
-#define CYREG_PRT3_DM1 0x40005133\r
-#define CYREG_PRT3_DM2 0x40005134\r
-#define CYREG_PRT3_SLW 0x40005135\r
-#define CYREG_PRT3_BYP 0x40005136\r
-#define CYREG_PRT3_BIE 0x40005137\r
-#define CYREG_PRT3_INP_DIS 0x40005138\r
-#define CYREG_PRT3_CTL 0x40005139\r
-#define CYREG_PRT3_PRT 0x4000513a\r
-#define CYREG_PRT3_BIT_MASK 0x4000513b\r
-#define CYREG_PRT3_AMUX 0x4000513c\r
-#define CYREG_PRT3_AG 0x4000513d\r
-#define CYREG_PRT3_LCD_COM_SEG 0x4000513e\r
-#define CYREG_PRT3_LCD_EN 0x4000513f\r
-#define CYDEV_IO_PRT_PRT4_BASE 0x40005140\r
-#define CYDEV_IO_PRT_PRT4_SIZE 0x00000010\r
-#define CYREG_PRT4_DR 0x40005140\r
-#define CYREG_PRT4_PS 0x40005141\r
-#define CYREG_PRT4_DM0 0x40005142\r
-#define CYREG_PRT4_DM1 0x40005143\r
-#define CYREG_PRT4_DM2 0x40005144\r
-#define CYREG_PRT4_SLW 0x40005145\r
-#define CYREG_PRT4_BYP 0x40005146\r
-#define CYREG_PRT4_BIE 0x40005147\r
-#define CYREG_PRT4_INP_DIS 0x40005148\r
-#define CYREG_PRT4_CTL 0x40005149\r
-#define CYREG_PRT4_PRT 0x4000514a\r
-#define CYREG_PRT4_BIT_MASK 0x4000514b\r
-#define CYREG_PRT4_AMUX 0x4000514c\r
-#define CYREG_PRT4_AG 0x4000514d\r
-#define CYREG_PRT4_LCD_COM_SEG 0x4000514e\r
-#define CYREG_PRT4_LCD_EN 0x4000514f\r
-#define CYDEV_IO_PRT_PRT5_BASE 0x40005150\r
-#define CYDEV_IO_PRT_PRT5_SIZE 0x00000010\r
-#define CYREG_PRT5_DR 0x40005150\r
-#define CYREG_PRT5_PS 0x40005151\r
-#define CYREG_PRT5_DM0 0x40005152\r
-#define CYREG_PRT5_DM1 0x40005153\r
-#define CYREG_PRT5_DM2 0x40005154\r
-#define CYREG_PRT5_SLW 0x40005155\r
-#define CYREG_PRT5_BYP 0x40005156\r
-#define CYREG_PRT5_BIE 0x40005157\r
-#define CYREG_PRT5_INP_DIS 0x40005158\r
-#define CYREG_PRT5_CTL 0x40005159\r
-#define CYREG_PRT5_PRT 0x4000515a\r
-#define CYREG_PRT5_BIT_MASK 0x4000515b\r
-#define CYREG_PRT5_AMUX 0x4000515c\r
-#define CYREG_PRT5_AG 0x4000515d\r
-#define CYREG_PRT5_LCD_COM_SEG 0x4000515e\r
-#define CYREG_PRT5_LCD_EN 0x4000515f\r
-#define CYDEV_IO_PRT_PRT6_BASE 0x40005160\r
-#define CYDEV_IO_PRT_PRT6_SIZE 0x00000010\r
-#define CYREG_PRT6_DR 0x40005160\r
-#define CYREG_PRT6_PS 0x40005161\r
-#define CYREG_PRT6_DM0 0x40005162\r
-#define CYREG_PRT6_DM1 0x40005163\r
-#define CYREG_PRT6_DM2 0x40005164\r
-#define CYREG_PRT6_SLW 0x40005165\r
-#define CYREG_PRT6_BYP 0x40005166\r
-#define CYREG_PRT6_BIE 0x40005167\r
-#define CYREG_PRT6_INP_DIS 0x40005168\r
-#define CYREG_PRT6_CTL 0x40005169\r
-#define CYREG_PRT6_PRT 0x4000516a\r
-#define CYREG_PRT6_BIT_MASK 0x4000516b\r
-#define CYREG_PRT6_AMUX 0x4000516c\r
-#define CYREG_PRT6_AG 0x4000516d\r
-#define CYREG_PRT6_LCD_COM_SEG 0x4000516e\r
-#define CYREG_PRT6_LCD_EN 0x4000516f\r
-#define CYDEV_IO_PRT_PRT12_BASE 0x400051c0\r
-#define CYDEV_IO_PRT_PRT12_SIZE 0x00000010\r
-#define CYREG_PRT12_DR 0x400051c0\r
-#define CYREG_PRT12_PS 0x400051c1\r
-#define CYREG_PRT12_DM0 0x400051c2\r
-#define CYREG_PRT12_DM1 0x400051c3\r
-#define CYREG_PRT12_DM2 0x400051c4\r
-#define CYREG_PRT12_SLW 0x400051c5\r
-#define CYREG_PRT12_BYP 0x400051c6\r
-#define CYREG_PRT12_BIE 0x400051c7\r
-#define CYREG_PRT12_INP_DIS 0x400051c8\r
-#define CYREG_PRT12_SIO_HYST_EN 0x400051c9\r
-#define CYREG_PRT12_PRT 0x400051ca\r
-#define CYREG_PRT12_BIT_MASK 0x400051cb\r
-#define CYREG_PRT12_SIO_REG_HIFREQ 0x400051cc\r
-#define CYREG_PRT12_AG 0x400051cd\r
-#define CYREG_PRT12_SIO_CFG 0x400051ce\r
-#define CYREG_PRT12_SIO_DIFF 0x400051cf\r
-#define CYDEV_IO_PRT_PRT15_BASE 0x400051f0\r
-#define CYDEV_IO_PRT_PRT15_SIZE 0x00000010\r
-#define CYREG_PRT15_DR 0x400051f0\r
-#define CYREG_PRT15_PS 0x400051f1\r
-#define CYREG_PRT15_DM0 0x400051f2\r
-#define CYREG_PRT15_DM1 0x400051f3\r
-#define CYREG_PRT15_DM2 0x400051f4\r
-#define CYREG_PRT15_SLW 0x400051f5\r
-#define CYREG_PRT15_BYP 0x400051f6\r
-#define CYREG_PRT15_BIE 0x400051f7\r
-#define CYREG_PRT15_INP_DIS 0x400051f8\r
-#define CYREG_PRT15_CTL 0x400051f9\r
-#define CYREG_PRT15_PRT 0x400051fa\r
-#define CYREG_PRT15_BIT_MASK 0x400051fb\r
-#define CYREG_PRT15_AMUX 0x400051fc\r
-#define CYREG_PRT15_AG 0x400051fd\r
-#define CYREG_PRT15_LCD_COM_SEG 0x400051fe\r
-#define CYREG_PRT15_LCD_EN 0x400051ff\r
-#define CYDEV_PRTDSI_BASE 0x40005200\r
-#define CYDEV_PRTDSI_SIZE 0x0000007f\r
-#define CYDEV_PRTDSI_PRT0_BASE 0x40005200\r
-#define CYDEV_PRTDSI_PRT0_SIZE 0x00000007\r
-#define CYREG_PRT0_OUT_SEL0 0x40005200\r
-#define CYREG_PRT0_OUT_SEL1 0x40005201\r
-#define CYREG_PRT0_OE_SEL0 0x40005202\r
-#define CYREG_PRT0_OE_SEL1 0x40005203\r
-#define CYREG_PRT0_DBL_SYNC_IN 0x40005204\r
-#define CYREG_PRT0_SYNC_OUT 0x40005205\r
-#define CYREG_PRT0_CAPS_SEL 0x40005206\r
-#define CYDEV_PRTDSI_PRT1_BASE 0x40005208\r
-#define CYDEV_PRTDSI_PRT1_SIZE 0x00000007\r
-#define CYREG_PRT1_OUT_SEL0 0x40005208\r
-#define CYREG_PRT1_OUT_SEL1 0x40005209\r
-#define CYREG_PRT1_OE_SEL0 0x4000520a\r
-#define CYREG_PRT1_OE_SEL1 0x4000520b\r
-#define CYREG_PRT1_DBL_SYNC_IN 0x4000520c\r
-#define CYREG_PRT1_SYNC_OUT 0x4000520d\r
-#define CYREG_PRT1_CAPS_SEL 0x4000520e\r
-#define CYDEV_PRTDSI_PRT2_BASE 0x40005210\r
-#define CYDEV_PRTDSI_PRT2_SIZE 0x00000007\r
-#define CYREG_PRT2_OUT_SEL0 0x40005210\r
-#define CYREG_PRT2_OUT_SEL1 0x40005211\r
-#define CYREG_PRT2_OE_SEL0 0x40005212\r
-#define CYREG_PRT2_OE_SEL1 0x40005213\r
-#define CYREG_PRT2_DBL_SYNC_IN 0x40005214\r
-#define CYREG_PRT2_SYNC_OUT 0x40005215\r
-#define CYREG_PRT2_CAPS_SEL 0x40005216\r
-#define CYDEV_PRTDSI_PRT3_BASE 0x40005218\r
-#define CYDEV_PRTDSI_PRT3_SIZE 0x00000007\r
-#define CYREG_PRT3_OUT_SEL0 0x40005218\r
-#define CYREG_PRT3_OUT_SEL1 0x40005219\r
-#define CYREG_PRT3_OE_SEL0 0x4000521a\r
-#define CYREG_PRT3_OE_SEL1 0x4000521b\r
-#define CYREG_PRT3_DBL_SYNC_IN 0x4000521c\r
-#define CYREG_PRT3_SYNC_OUT 0x4000521d\r
-#define CYREG_PRT3_CAPS_SEL 0x4000521e\r
-#define CYDEV_PRTDSI_PRT4_BASE 0x40005220\r
-#define CYDEV_PRTDSI_PRT4_SIZE 0x00000007\r
-#define CYREG_PRT4_OUT_SEL0 0x40005220\r
-#define CYREG_PRT4_OUT_SEL1 0x40005221\r
-#define CYREG_PRT4_OE_SEL0 0x40005222\r
-#define CYREG_PRT4_OE_SEL1 0x40005223\r
-#define CYREG_PRT4_DBL_SYNC_IN 0x40005224\r
-#define CYREG_PRT4_SYNC_OUT 0x40005225\r
-#define CYREG_PRT4_CAPS_SEL 0x40005226\r
-#define CYDEV_PRTDSI_PRT5_BASE 0x40005228\r
-#define CYDEV_PRTDSI_PRT5_SIZE 0x00000007\r
-#define CYREG_PRT5_OUT_SEL0 0x40005228\r
-#define CYREG_PRT5_OUT_SEL1 0x40005229\r
-#define CYREG_PRT5_OE_SEL0 0x4000522a\r
-#define CYREG_PRT5_OE_SEL1 0x4000522b\r
-#define CYREG_PRT5_DBL_SYNC_IN 0x4000522c\r
-#define CYREG_PRT5_SYNC_OUT 0x4000522d\r
-#define CYREG_PRT5_CAPS_SEL 0x4000522e\r
-#define CYDEV_PRTDSI_PRT6_BASE 0x40005230\r
-#define CYDEV_PRTDSI_PRT6_SIZE 0x00000007\r
-#define CYREG_PRT6_OUT_SEL0 0x40005230\r
-#define CYREG_PRT6_OUT_SEL1 0x40005231\r
-#define CYREG_PRT6_OE_SEL0 0x40005232\r
-#define CYREG_PRT6_OE_SEL1 0x40005233\r
-#define CYREG_PRT6_DBL_SYNC_IN 0x40005234\r
-#define CYREG_PRT6_SYNC_OUT 0x40005235\r
-#define CYREG_PRT6_CAPS_SEL 0x40005236\r
-#define CYDEV_PRTDSI_PRT12_BASE 0x40005260\r
-#define CYDEV_PRTDSI_PRT12_SIZE 0x00000006\r
-#define CYREG_PRT12_OUT_SEL0 0x40005260\r
-#define CYREG_PRT12_OUT_SEL1 0x40005261\r
-#define CYREG_PRT12_OE_SEL0 0x40005262\r
-#define CYREG_PRT12_OE_SEL1 0x40005263\r
-#define CYREG_PRT12_DBL_SYNC_IN 0x40005264\r
-#define CYREG_PRT12_SYNC_OUT 0x40005265\r
-#define CYDEV_PRTDSI_PRT15_BASE 0x40005278\r
-#define CYDEV_PRTDSI_PRT15_SIZE 0x00000007\r
-#define CYREG_PRT15_OUT_SEL0 0x40005278\r
-#define CYREG_PRT15_OUT_SEL1 0x40005279\r
-#define CYREG_PRT15_OE_SEL0 0x4000527a\r
-#define CYREG_PRT15_OE_SEL1 0x4000527b\r
-#define CYREG_PRT15_DBL_SYNC_IN 0x4000527c\r
-#define CYREG_PRT15_SYNC_OUT 0x4000527d\r
-#define CYREG_PRT15_CAPS_SEL 0x4000527e\r
-#define CYDEV_EMIF_BASE 0x40005400\r
-#define CYDEV_EMIF_SIZE 0x00000007\r
-#define CYREG_EMIF_NO_UDB 0x40005400\r
-#define CYREG_EMIF_RP_WAIT_STATES 0x40005401\r
-#define CYREG_EMIF_MEM_DWN 0x40005402\r
-#define CYREG_EMIF_MEMCLK_DIV 0x40005403\r
-#define CYREG_EMIF_CLOCK_EN 0x40005404\r
-#define CYREG_EMIF_EM_TYPE 0x40005405\r
-#define CYREG_EMIF_WP_WAIT_STATES 0x40005406\r
-#define CYDEV_ANAIF_BASE 0x40005800\r
-#define CYDEV_ANAIF_SIZE 0x000003a9\r
-#define CYDEV_ANAIF_CFG_BASE 0x40005800\r
-#define CYDEV_ANAIF_CFG_SIZE 0x0000010f\r
-#define CYDEV_ANAIF_CFG_SC0_BASE 0x40005800\r
-#define CYDEV_ANAIF_CFG_SC0_SIZE 0x00000003\r
-#define CYREG_SC0_CR0 0x40005800\r
-#define CYREG_SC0_CR1 0x40005801\r
-#define CYREG_SC0_CR2 0x40005802\r
-#define CYDEV_ANAIF_CFG_SC1_BASE 0x40005804\r
-#define CYDEV_ANAIF_CFG_SC1_SIZE 0x00000003\r
-#define CYREG_SC1_CR0 0x40005804\r
-#define CYREG_SC1_CR1 0x40005805\r
-#define CYREG_SC1_CR2 0x40005806\r
-#define CYDEV_ANAIF_CFG_SC2_BASE 0x40005808\r
-#define CYDEV_ANAIF_CFG_SC2_SIZE 0x00000003\r
-#define CYREG_SC2_CR0 0x40005808\r
-#define CYREG_SC2_CR1 0x40005809\r
-#define CYREG_SC2_CR2 0x4000580a\r
-#define CYDEV_ANAIF_CFG_SC3_BASE 0x4000580c\r
-#define CYDEV_ANAIF_CFG_SC3_SIZE 0x00000003\r
-#define CYREG_SC3_CR0 0x4000580c\r
-#define CYREG_SC3_CR1 0x4000580d\r
-#define CYREG_SC3_CR2 0x4000580e\r
-#define CYDEV_ANAIF_CFG_DAC0_BASE 0x40005820\r
-#define CYDEV_ANAIF_CFG_DAC0_SIZE 0x00000003\r
-#define CYREG_DAC0_CR0 0x40005820\r
-#define CYREG_DAC0_CR1 0x40005821\r
-#define CYREG_DAC0_TST 0x40005822\r
-#define CYDEV_ANAIF_CFG_DAC1_BASE 0x40005824\r
-#define CYDEV_ANAIF_CFG_DAC1_SIZE 0x00000003\r
-#define CYREG_DAC1_CR0 0x40005824\r
-#define CYREG_DAC1_CR1 0x40005825\r
-#define CYREG_DAC1_TST 0x40005826\r
-#define CYDEV_ANAIF_CFG_DAC2_BASE 0x40005828\r
-#define CYDEV_ANAIF_CFG_DAC2_SIZE 0x00000003\r
-#define CYREG_DAC2_CR0 0x40005828\r
-#define CYREG_DAC2_CR1 0x40005829\r
-#define CYREG_DAC2_TST 0x4000582a\r
-#define CYDEV_ANAIF_CFG_DAC3_BASE 0x4000582c\r
-#define CYDEV_ANAIF_CFG_DAC3_SIZE 0x00000003\r
-#define CYREG_DAC3_CR0 0x4000582c\r
-#define CYREG_DAC3_CR1 0x4000582d\r
-#define CYREG_DAC3_TST 0x4000582e\r
-#define CYDEV_ANAIF_CFG_CMP0_BASE 0x40005840\r
-#define CYDEV_ANAIF_CFG_CMP0_SIZE 0x00000001\r
-#define CYREG_CMP0_CR 0x40005840\r
-#define CYDEV_ANAIF_CFG_CMP1_BASE 0x40005841\r
-#define CYDEV_ANAIF_CFG_CMP1_SIZE 0x00000001\r
-#define CYREG_CMP1_CR 0x40005841\r
-#define CYDEV_ANAIF_CFG_CMP2_BASE 0x40005842\r
-#define CYDEV_ANAIF_CFG_CMP2_SIZE 0x00000001\r
-#define CYREG_CMP2_CR 0x40005842\r
-#define CYDEV_ANAIF_CFG_CMP3_BASE 0x40005843\r
-#define CYDEV_ANAIF_CFG_CMP3_SIZE 0x00000001\r
-#define CYREG_CMP3_CR 0x40005843\r
-#define CYDEV_ANAIF_CFG_LUT0_BASE 0x40005848\r
-#define CYDEV_ANAIF_CFG_LUT0_SIZE 0x00000002\r
-#define CYREG_LUT0_CR 0x40005848\r
-#define CYREG_LUT0_MX 0x40005849\r
-#define CYDEV_ANAIF_CFG_LUT1_BASE 0x4000584a\r
-#define CYDEV_ANAIF_CFG_LUT1_SIZE 0x00000002\r
-#define CYREG_LUT1_CR 0x4000584a\r
-#define CYREG_LUT1_MX 0x4000584b\r
-#define CYDEV_ANAIF_CFG_LUT2_BASE 0x4000584c\r
-#define CYDEV_ANAIF_CFG_LUT2_SIZE 0x00000002\r
-#define CYREG_LUT2_CR 0x4000584c\r
-#define CYREG_LUT2_MX 0x4000584d\r
-#define CYDEV_ANAIF_CFG_LUT3_BASE 0x4000584e\r
-#define CYDEV_ANAIF_CFG_LUT3_SIZE 0x00000002\r
-#define CYREG_LUT3_CR 0x4000584e\r
-#define CYREG_LUT3_MX 0x4000584f\r
-#define CYDEV_ANAIF_CFG_OPAMP0_BASE 0x40005858\r
-#define CYDEV_ANAIF_CFG_OPAMP0_SIZE 0x00000002\r
-#define CYREG_OPAMP0_CR 0x40005858\r
-#define CYREG_OPAMP0_RSVD 0x40005859\r
-#define CYDEV_ANAIF_CFG_OPAMP1_BASE 0x4000585a\r
-#define CYDEV_ANAIF_CFG_OPAMP1_SIZE 0x00000002\r
-#define CYREG_OPAMP1_CR 0x4000585a\r
-#define CYREG_OPAMP1_RSVD 0x4000585b\r
-#define CYDEV_ANAIF_CFG_OPAMP2_BASE 0x4000585c\r
-#define CYDEV_ANAIF_CFG_OPAMP2_SIZE 0x00000002\r
-#define CYREG_OPAMP2_CR 0x4000585c\r
-#define CYREG_OPAMP2_RSVD 0x4000585d\r
-#define CYDEV_ANAIF_CFG_OPAMP3_BASE 0x4000585e\r
-#define CYDEV_ANAIF_CFG_OPAMP3_SIZE 0x00000002\r
-#define CYREG_OPAMP3_CR 0x4000585e\r
-#define CYREG_OPAMP3_RSVD 0x4000585f\r
-#define CYDEV_ANAIF_CFG_LCDDAC_BASE 0x40005868\r
-#define CYDEV_ANAIF_CFG_LCDDAC_SIZE 0x00000002\r
-#define CYREG_LCDDAC_CR0 0x40005868\r
-#define CYREG_LCDDAC_CR1 0x40005869\r
-#define CYDEV_ANAIF_CFG_LCDDRV_BASE 0x4000586a\r
-#define CYDEV_ANAIF_CFG_LCDDRV_SIZE 0x00000001\r
-#define CYREG_LCDDRV_CR 0x4000586a\r
-#define CYDEV_ANAIF_CFG_LCDTMR_BASE 0x4000586b\r
-#define CYDEV_ANAIF_CFG_LCDTMR_SIZE 0x00000001\r
-#define CYREG_LCDTMR_CFG 0x4000586b\r
-#define CYDEV_ANAIF_CFG_BG_BASE 0x4000586c\r
-#define CYDEV_ANAIF_CFG_BG_SIZE 0x00000004\r
-#define CYREG_BG_CR0 0x4000586c\r
-#define CYREG_BG_RSVD 0x4000586d\r
-#define CYREG_BG_DFT0 0x4000586e\r
-#define CYREG_BG_DFT1 0x4000586f\r
-#define CYDEV_ANAIF_CFG_CAPSL_BASE 0x40005870\r
-#define CYDEV_ANAIF_CFG_CAPSL_SIZE 0x00000002\r
-#define CYREG_CAPSL_CFG0 0x40005870\r
-#define CYREG_CAPSL_CFG1 0x40005871\r
-#define CYDEV_ANAIF_CFG_CAPSR_BASE 0x40005872\r
-#define CYDEV_ANAIF_CFG_CAPSR_SIZE 0x00000002\r
-#define CYREG_CAPSR_CFG0 0x40005872\r
-#define CYREG_CAPSR_CFG1 0x40005873\r
-#define CYDEV_ANAIF_CFG_PUMP_BASE 0x40005876\r
-#define CYDEV_ANAIF_CFG_PUMP_SIZE 0x00000002\r
-#define CYREG_PUMP_CR0 0x40005876\r
-#define CYREG_PUMP_CR1 0x40005877\r
-#define CYDEV_ANAIF_CFG_LPF0_BASE 0x40005878\r
-#define CYDEV_ANAIF_CFG_LPF0_SIZE 0x00000002\r
-#define CYREG_LPF0_CR0 0x40005878\r
-#define CYREG_LPF0_RSVD 0x40005879\r
-#define CYDEV_ANAIF_CFG_LPF1_BASE 0x4000587a\r
-#define CYDEV_ANAIF_CFG_LPF1_SIZE 0x00000002\r
-#define CYREG_LPF1_CR0 0x4000587a\r
-#define CYREG_LPF1_RSVD 0x4000587b\r
-#define CYDEV_ANAIF_CFG_MISC_BASE 0x4000587c\r
-#define CYDEV_ANAIF_CFG_MISC_SIZE 0x00000001\r
-#define CYREG_ANAIF_CFG_MISC_CR0 0x4000587c\r
-#define CYDEV_ANAIF_CFG_DSM0_BASE 0x40005880\r
-#define CYDEV_ANAIF_CFG_DSM0_SIZE 0x00000020\r
-#define CYREG_DSM0_CR0 0x40005880\r
-#define CYREG_DSM0_CR1 0x40005881\r
-#define CYREG_DSM0_CR2 0x40005882\r
-#define CYREG_DSM0_CR3 0x40005883\r
-#define CYREG_DSM0_CR4 0x40005884\r
-#define CYREG_DSM0_CR5 0x40005885\r
-#define CYREG_DSM0_CR6 0x40005886\r
-#define CYREG_DSM0_CR7 0x40005887\r
-#define CYREG_DSM0_CR8 0x40005888\r
-#define CYREG_DSM0_CR9 0x40005889\r
-#define CYREG_DSM0_CR10 0x4000588a\r
-#define CYREG_DSM0_CR11 0x4000588b\r
-#define CYREG_DSM0_CR12 0x4000588c\r
-#define CYREG_DSM0_CR13 0x4000588d\r
-#define CYREG_DSM0_CR14 0x4000588e\r
-#define CYREG_DSM0_CR15 0x4000588f\r
-#define CYREG_DSM0_CR16 0x40005890\r
-#define CYREG_DSM0_CR17 0x40005891\r
-#define CYREG_DSM0_REF0 0x40005892\r
-#define CYREG_DSM0_REF1 0x40005893\r
-#define CYREG_DSM0_REF2 0x40005894\r
-#define CYREG_DSM0_REF3 0x40005895\r
-#define CYREG_DSM0_DEM0 0x40005896\r
-#define CYREG_DSM0_DEM1 0x40005897\r
-#define CYREG_DSM0_TST0 0x40005898\r
-#define CYREG_DSM0_TST1 0x40005899\r
-#define CYREG_DSM0_BUF0 0x4000589a\r
-#define CYREG_DSM0_BUF1 0x4000589b\r
-#define CYREG_DSM0_BUF2 0x4000589c\r
-#define CYREG_DSM0_BUF3 0x4000589d\r
-#define CYREG_DSM0_MISC 0x4000589e\r
-#define CYREG_DSM0_RSVD1 0x4000589f\r
-#define CYDEV_ANAIF_CFG_SAR0_BASE 0x40005900\r
-#define CYDEV_ANAIF_CFG_SAR0_SIZE 0x00000007\r
-#define CYREG_SAR0_CSR0 0x40005900\r
-#define CYREG_SAR0_CSR1 0x40005901\r
-#define CYREG_SAR0_CSR2 0x40005902\r
-#define CYREG_SAR0_CSR3 0x40005903\r
-#define CYREG_SAR0_CSR4 0x40005904\r
-#define CYREG_SAR0_CSR5 0x40005905\r
-#define CYREG_SAR0_CSR6 0x40005906\r
-#define CYDEV_ANAIF_CFG_SAR1_BASE 0x40005908\r
-#define CYDEV_ANAIF_CFG_SAR1_SIZE 0x00000007\r
-#define CYREG_SAR1_CSR0 0x40005908\r
-#define CYREG_SAR1_CSR1 0x40005909\r
-#define CYREG_SAR1_CSR2 0x4000590a\r
-#define CYREG_SAR1_CSR3 0x4000590b\r
-#define CYREG_SAR1_CSR4 0x4000590c\r
-#define CYREG_SAR1_CSR5 0x4000590d\r
-#define CYREG_SAR1_CSR6 0x4000590e\r
-#define CYDEV_ANAIF_RT_BASE 0x40005a00\r
-#define CYDEV_ANAIF_RT_SIZE 0x00000162\r
-#define CYDEV_ANAIF_RT_SC0_BASE 0x40005a00\r
-#define CYDEV_ANAIF_RT_SC0_SIZE 0x0000000d\r
-#define CYREG_SC0_SW0 0x40005a00\r
-#define CYREG_SC0_SW2 0x40005a02\r
-#define CYREG_SC0_SW3 0x40005a03\r
-#define CYREG_SC0_SW4 0x40005a04\r
-#define CYREG_SC0_SW6 0x40005a06\r
-#define CYREG_SC0_SW7 0x40005a07\r
-#define CYREG_SC0_SW8 0x40005a08\r
-#define CYREG_SC0_SW10 0x40005a0a\r
-#define CYREG_SC0_CLK 0x40005a0b\r
-#define CYREG_SC0_BST 0x40005a0c\r
-#define CYDEV_ANAIF_RT_SC1_BASE 0x40005a10\r
-#define CYDEV_ANAIF_RT_SC1_SIZE 0x0000000d\r
-#define CYREG_SC1_SW0 0x40005a10\r
-#define CYREG_SC1_SW2 0x40005a12\r
-#define CYREG_SC1_SW3 0x40005a13\r
-#define CYREG_SC1_SW4 0x40005a14\r
-#define CYREG_SC1_SW6 0x40005a16\r
-#define CYREG_SC1_SW7 0x40005a17\r
-#define CYREG_SC1_SW8 0x40005a18\r
-#define CYREG_SC1_SW10 0x40005a1a\r
-#define CYREG_SC1_CLK 0x40005a1b\r
-#define CYREG_SC1_BST 0x40005a1c\r
-#define CYDEV_ANAIF_RT_SC2_BASE 0x40005a20\r
-#define CYDEV_ANAIF_RT_SC2_SIZE 0x0000000d\r
-#define CYREG_SC2_SW0 0x40005a20\r
-#define CYREG_SC2_SW2 0x40005a22\r
-#define CYREG_SC2_SW3 0x40005a23\r
-#define CYREG_SC2_SW4 0x40005a24\r
-#define CYREG_SC2_SW6 0x40005a26\r
-#define CYREG_SC2_SW7 0x40005a27\r
-#define CYREG_SC2_SW8 0x40005a28\r
-#define CYREG_SC2_SW10 0x40005a2a\r
-#define CYREG_SC2_CLK 0x40005a2b\r
-#define CYREG_SC2_BST 0x40005a2c\r
-#define CYDEV_ANAIF_RT_SC3_BASE 0x40005a30\r
-#define CYDEV_ANAIF_RT_SC3_SIZE 0x0000000d\r
-#define CYREG_SC3_SW0 0x40005a30\r
-#define CYREG_SC3_SW2 0x40005a32\r
-#define CYREG_SC3_SW3 0x40005a33\r
-#define CYREG_SC3_SW4 0x40005a34\r
-#define CYREG_SC3_SW6 0x40005a36\r
-#define CYREG_SC3_SW7 0x40005a37\r
-#define CYREG_SC3_SW8 0x40005a38\r
-#define CYREG_SC3_SW10 0x40005a3a\r
-#define CYREG_SC3_CLK 0x40005a3b\r
-#define CYREG_SC3_BST 0x40005a3c\r
-#define CYDEV_ANAIF_RT_DAC0_BASE 0x40005a80\r
-#define CYDEV_ANAIF_RT_DAC0_SIZE 0x00000008\r
-#define CYREG_DAC0_SW0 0x40005a80\r
-#define CYREG_DAC0_SW2 0x40005a82\r
-#define CYREG_DAC0_SW3 0x40005a83\r
-#define CYREG_DAC0_SW4 0x40005a84\r
-#define CYREG_DAC0_STROBE 0x40005a87\r
-#define CYDEV_ANAIF_RT_DAC1_BASE 0x40005a88\r
-#define CYDEV_ANAIF_RT_DAC1_SIZE 0x00000008\r
-#define CYREG_DAC1_SW0 0x40005a88\r
-#define CYREG_DAC1_SW2 0x40005a8a\r
-#define CYREG_DAC1_SW3 0x40005a8b\r
-#define CYREG_DAC1_SW4 0x40005a8c\r
-#define CYREG_DAC1_STROBE 0x40005a8f\r
-#define CYDEV_ANAIF_RT_DAC2_BASE 0x40005a90\r
-#define CYDEV_ANAIF_RT_DAC2_SIZE 0x00000008\r
-#define CYREG_DAC2_SW0 0x40005a90\r
-#define CYREG_DAC2_SW2 0x40005a92\r
-#define CYREG_DAC2_SW3 0x40005a93\r
-#define CYREG_DAC2_SW4 0x40005a94\r
-#define CYREG_DAC2_STROBE 0x40005a97\r
-#define CYDEV_ANAIF_RT_DAC3_BASE 0x40005a98\r
-#define CYDEV_ANAIF_RT_DAC3_SIZE 0x00000008\r
-#define CYREG_DAC3_SW0 0x40005a98\r
-#define CYREG_DAC3_SW2 0x40005a9a\r
-#define CYREG_DAC3_SW3 0x40005a9b\r
-#define CYREG_DAC3_SW4 0x40005a9c\r
-#define CYREG_DAC3_STROBE 0x40005a9f\r
-#define CYDEV_ANAIF_RT_CMP0_BASE 0x40005ac0\r
-#define CYDEV_ANAIF_RT_CMP0_SIZE 0x00000008\r
-#define CYREG_CMP0_SW0 0x40005ac0\r
-#define CYREG_CMP0_SW2 0x40005ac2\r
-#define CYREG_CMP0_SW3 0x40005ac3\r
-#define CYREG_CMP0_SW4 0x40005ac4\r
-#define CYREG_CMP0_SW6 0x40005ac6\r
-#define CYREG_CMP0_CLK 0x40005ac7\r
-#define CYDEV_ANAIF_RT_CMP1_BASE 0x40005ac8\r
-#define CYDEV_ANAIF_RT_CMP1_SIZE 0x00000008\r
-#define CYREG_CMP1_SW0 0x40005ac8\r
-#define CYREG_CMP1_SW2 0x40005aca\r
-#define CYREG_CMP1_SW3 0x40005acb\r
-#define CYREG_CMP1_SW4 0x40005acc\r
-#define CYREG_CMP1_SW6 0x40005ace\r
-#define CYREG_CMP1_CLK 0x40005acf\r
-#define CYDEV_ANAIF_RT_CMP2_BASE 0x40005ad0\r
-#define CYDEV_ANAIF_RT_CMP2_SIZE 0x00000008\r
-#define CYREG_CMP2_SW0 0x40005ad0\r
-#define CYREG_CMP2_SW2 0x40005ad2\r
-#define CYREG_CMP2_SW3 0x40005ad3\r
-#define CYREG_CMP2_SW4 0x40005ad4\r
-#define CYREG_CMP2_SW6 0x40005ad6\r
-#define CYREG_CMP2_CLK 0x40005ad7\r
-#define CYDEV_ANAIF_RT_CMP3_BASE 0x40005ad8\r
-#define CYDEV_ANAIF_RT_CMP3_SIZE 0x00000008\r
-#define CYREG_CMP3_SW0 0x40005ad8\r
-#define CYREG_CMP3_SW2 0x40005ada\r
-#define CYREG_CMP3_SW3 0x40005adb\r
-#define CYREG_CMP3_SW4 0x40005adc\r
-#define CYREG_CMP3_SW6 0x40005ade\r
-#define CYREG_CMP3_CLK 0x40005adf\r
-#define CYDEV_ANAIF_RT_DSM0_BASE 0x40005b00\r
-#define CYDEV_ANAIF_RT_DSM0_SIZE 0x00000008\r
-#define CYREG_DSM0_SW0 0x40005b00\r
-#define CYREG_DSM0_SW2 0x40005b02\r
-#define CYREG_DSM0_SW3 0x40005b03\r
-#define CYREG_DSM0_SW4 0x40005b04\r
-#define CYREG_DSM0_SW6 0x40005b06\r
-#define CYREG_DSM0_CLK 0x40005b07\r
-#define CYDEV_ANAIF_RT_SAR0_BASE 0x40005b20\r
-#define CYDEV_ANAIF_RT_SAR0_SIZE 0x00000008\r
-#define CYREG_SAR0_SW0 0x40005b20\r
-#define CYREG_SAR0_SW2 0x40005b22\r
-#define CYREG_SAR0_SW3 0x40005b23\r
-#define CYREG_SAR0_SW4 0x40005b24\r
-#define CYREG_SAR0_SW6 0x40005b26\r
-#define CYREG_SAR0_CLK 0x40005b27\r
-#define CYDEV_ANAIF_RT_SAR1_BASE 0x40005b28\r
-#define CYDEV_ANAIF_RT_SAR1_SIZE 0x00000008\r
-#define CYREG_SAR1_SW0 0x40005b28\r
-#define CYREG_SAR1_SW2 0x40005b2a\r
-#define CYREG_SAR1_SW3 0x40005b2b\r
-#define CYREG_SAR1_SW4 0x40005b2c\r
-#define CYREG_SAR1_SW6 0x40005b2e\r
-#define CYREG_SAR1_CLK 0x40005b2f\r
-#define CYDEV_ANAIF_RT_OPAMP0_BASE 0x40005b40\r
-#define CYDEV_ANAIF_RT_OPAMP0_SIZE 0x00000002\r
-#define CYREG_OPAMP0_MX 0x40005b40\r
-#define CYREG_OPAMP0_SW 0x40005b41\r
-#define CYDEV_ANAIF_RT_OPAMP1_BASE 0x40005b42\r
-#define CYDEV_ANAIF_RT_OPAMP1_SIZE 0x00000002\r
-#define CYREG_OPAMP1_MX 0x40005b42\r
-#define CYREG_OPAMP1_SW 0x40005b43\r
-#define CYDEV_ANAIF_RT_OPAMP2_BASE 0x40005b44\r
-#define CYDEV_ANAIF_RT_OPAMP2_SIZE 0x00000002\r
-#define CYREG_OPAMP2_MX 0x40005b44\r
-#define CYREG_OPAMP2_SW 0x40005b45\r
-#define CYDEV_ANAIF_RT_OPAMP3_BASE 0x40005b46\r
-#define CYDEV_ANAIF_RT_OPAMP3_SIZE 0x00000002\r
-#define CYREG_OPAMP3_MX 0x40005b46\r
-#define CYREG_OPAMP3_SW 0x40005b47\r
-#define CYDEV_ANAIF_RT_LCDDAC_BASE 0x40005b50\r
-#define CYDEV_ANAIF_RT_LCDDAC_SIZE 0x00000005\r
-#define CYREG_LCDDAC_SW0 0x40005b50\r
-#define CYREG_LCDDAC_SW1 0x40005b51\r
-#define CYREG_LCDDAC_SW2 0x40005b52\r
-#define CYREG_LCDDAC_SW3 0x40005b53\r
-#define CYREG_LCDDAC_SW4 0x40005b54\r
-#define CYDEV_ANAIF_RT_SC_BASE 0x40005b56\r
-#define CYDEV_ANAIF_RT_SC_SIZE 0x00000001\r
-#define CYREG_SC_MISC 0x40005b56\r
-#define CYDEV_ANAIF_RT_BUS_BASE 0x40005b58\r
-#define CYDEV_ANAIF_RT_BUS_SIZE 0x00000004\r
-#define CYREG_BUS_SW0 0x40005b58\r
-#define CYREG_BUS_SW2 0x40005b5a\r
-#define CYREG_BUS_SW3 0x40005b5b\r
-#define CYDEV_ANAIF_RT_DFT_BASE 0x40005b5c\r
-#define CYDEV_ANAIF_RT_DFT_SIZE 0x00000006\r
-#define CYREG_DFT_CR0 0x40005b5c\r
-#define CYREG_DFT_CR1 0x40005b5d\r
-#define CYREG_DFT_CR2 0x40005b5e\r
-#define CYREG_DFT_CR3 0x40005b5f\r
-#define CYREG_DFT_CR4 0x40005b60\r
-#define CYREG_DFT_CR5 0x40005b61\r
-#define CYDEV_ANAIF_WRK_BASE 0x40005b80\r
-#define CYDEV_ANAIF_WRK_SIZE 0x00000029\r
-#define CYDEV_ANAIF_WRK_DAC0_BASE 0x40005b80\r
-#define CYDEV_ANAIF_WRK_DAC0_SIZE 0x00000001\r
-#define CYREG_DAC0_D 0x40005b80\r
-#define CYDEV_ANAIF_WRK_DAC1_BASE 0x40005b81\r
-#define CYDEV_ANAIF_WRK_DAC1_SIZE 0x00000001\r
-#define CYREG_DAC1_D 0x40005b81\r
-#define CYDEV_ANAIF_WRK_DAC2_BASE 0x40005b82\r
-#define CYDEV_ANAIF_WRK_DAC2_SIZE 0x00000001\r
-#define CYREG_DAC2_D 0x40005b82\r
-#define CYDEV_ANAIF_WRK_DAC3_BASE 0x40005b83\r
-#define CYDEV_ANAIF_WRK_DAC3_SIZE 0x00000001\r
-#define CYREG_DAC3_D 0x40005b83\r
-#define CYDEV_ANAIF_WRK_DSM0_BASE 0x40005b88\r
-#define CYDEV_ANAIF_WRK_DSM0_SIZE 0x00000002\r
-#define CYREG_DSM0_OUT0 0x40005b88\r
-#define CYREG_DSM0_OUT1 0x40005b89\r
-#define CYDEV_ANAIF_WRK_LUT_BASE 0x40005b90\r
-#define CYDEV_ANAIF_WRK_LUT_SIZE 0x00000005\r
-#define CYREG_LUT_SR 0x40005b90\r
-#define CYREG_LUT_WRK1 0x40005b91\r
-#define CYREG_LUT_MSK 0x40005b92\r
-#define CYREG_LUT_CLK 0x40005b93\r
-#define CYREG_LUT_CPTR 0x40005b94\r
-#define CYDEV_ANAIF_WRK_CMP_BASE 0x40005b96\r
-#define CYDEV_ANAIF_WRK_CMP_SIZE 0x00000002\r
-#define CYREG_CMP_WRK 0x40005b96\r
-#define CYREG_CMP_TST 0x40005b97\r
-#define CYDEV_ANAIF_WRK_SC_BASE 0x40005b98\r
-#define CYDEV_ANAIF_WRK_SC_SIZE 0x00000005\r
-#define CYREG_SC_SR 0x40005b98\r
-#define CYREG_SC_WRK1 0x40005b99\r
-#define CYREG_SC_MSK 0x40005b9a\r
-#define CYREG_SC_CMPINV 0x40005b9b\r
-#define CYREG_SC_CPTR 0x40005b9c\r
-#define CYDEV_ANAIF_WRK_SAR0_BASE 0x40005ba0\r
-#define CYDEV_ANAIF_WRK_SAR0_SIZE 0x00000002\r
-#define CYREG_SAR0_WRK0 0x40005ba0\r
-#define CYREG_SAR0_WRK1 0x40005ba1\r
-#define CYDEV_ANAIF_WRK_SAR1_BASE 0x40005ba2\r
-#define CYDEV_ANAIF_WRK_SAR1_SIZE 0x00000002\r
-#define CYREG_SAR1_WRK0 0x40005ba2\r
-#define CYREG_SAR1_WRK1 0x40005ba3\r
-#define CYDEV_ANAIF_WRK_SARS_BASE 0x40005ba8\r
-#define CYDEV_ANAIF_WRK_SARS_SIZE 0x00000001\r
-#define CYREG_ANAIF_WRK_SARS_SOF 0x40005ba8\r
-#define CYDEV_USB_BASE 0x40006000\r
-#define CYDEV_USB_SIZE 0x00000300\r
-#define CYREG_USB_EP0_DR0 0x40006000\r
-#define CYREG_USB_EP0_DR1 0x40006001\r
-#define CYREG_USB_EP0_DR2 0x40006002\r
-#define CYREG_USB_EP0_DR3 0x40006003\r
-#define CYREG_USB_EP0_DR4 0x40006004\r
-#define CYREG_USB_EP0_DR5 0x40006005\r
-#define CYREG_USB_EP0_DR6 0x40006006\r
-#define CYREG_USB_EP0_DR7 0x40006007\r
-#define CYREG_USB_CR0 0x40006008\r
-#define CYREG_USB_CR1 0x40006009\r
-#define CYREG_USB_SIE_EP_INT_EN 0x4000600a\r
-#define CYREG_USB_SIE_EP_INT_SR 0x4000600b\r
-#define CYDEV_USB_SIE_EP1_BASE 0x4000600c\r
-#define CYDEV_USB_SIE_EP1_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP1_CNT0 0x4000600c\r
-#define CYREG_USB_SIE_EP1_CNT1 0x4000600d\r
-#define CYREG_USB_SIE_EP1_CR0 0x4000600e\r
-#define CYREG_USB_USBIO_CR0 0x40006010\r
-#define CYREG_USB_USBIO_CR1 0x40006012\r
-#define CYREG_USB_DYN_RECONFIG 0x40006014\r
-#define CYREG_USB_SOF0 0x40006018\r
-#define CYREG_USB_SOF1 0x40006019\r
-#define CYDEV_USB_SIE_EP2_BASE 0x4000601c\r
-#define CYDEV_USB_SIE_EP2_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP2_CNT0 0x4000601c\r
-#define CYREG_USB_SIE_EP2_CNT1 0x4000601d\r
-#define CYREG_USB_SIE_EP2_CR0 0x4000601e\r
-#define CYREG_USB_EP0_CR 0x40006028\r
-#define CYREG_USB_EP0_CNT 0x40006029\r
-#define CYDEV_USB_SIE_EP3_BASE 0x4000602c\r
-#define CYDEV_USB_SIE_EP3_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP3_CNT0 0x4000602c\r
-#define CYREG_USB_SIE_EP3_CNT1 0x4000602d\r
-#define CYREG_USB_SIE_EP3_CR0 0x4000602e\r
-#define CYDEV_USB_SIE_EP4_BASE 0x4000603c\r
-#define CYDEV_USB_SIE_EP4_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP4_CNT0 0x4000603c\r
-#define CYREG_USB_SIE_EP4_CNT1 0x4000603d\r
-#define CYREG_USB_SIE_EP4_CR0 0x4000603e\r
-#define CYDEV_USB_SIE_EP5_BASE 0x4000604c\r
-#define CYDEV_USB_SIE_EP5_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP5_CNT0 0x4000604c\r
-#define CYREG_USB_SIE_EP5_CNT1 0x4000604d\r
-#define CYREG_USB_SIE_EP5_CR0 0x4000604e\r
-#define CYDEV_USB_SIE_EP6_BASE 0x4000605c\r
-#define CYDEV_USB_SIE_EP6_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP6_CNT0 0x4000605c\r
-#define CYREG_USB_SIE_EP6_CNT1 0x4000605d\r
-#define CYREG_USB_SIE_EP6_CR0 0x4000605e\r
-#define CYDEV_USB_SIE_EP7_BASE 0x4000606c\r
-#define CYDEV_USB_SIE_EP7_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP7_CNT0 0x4000606c\r
-#define CYREG_USB_SIE_EP7_CNT1 0x4000606d\r
-#define CYREG_USB_SIE_EP7_CR0 0x4000606e\r
-#define CYDEV_USB_SIE_EP8_BASE 0x4000607c\r
-#define CYDEV_USB_SIE_EP8_SIZE 0x00000003\r
-#define CYREG_USB_SIE_EP8_CNT0 0x4000607c\r
-#define CYREG_USB_SIE_EP8_CNT1 0x4000607d\r
-#define CYREG_USB_SIE_EP8_CR0 0x4000607e\r
-#define CYDEV_USB_ARB_EP1_BASE 0x40006080\r
-#define CYDEV_USB_ARB_EP1_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP1_CFG 0x40006080\r
-#define CYREG_USB_ARB_EP1_INT_EN 0x40006081\r
-#define CYREG_USB_ARB_EP1_SR 0x40006082\r
-#define CYDEV_USB_ARB_RW1_BASE 0x40006084\r
-#define CYDEV_USB_ARB_RW1_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW1_WA 0x40006084\r
-#define CYREG_USB_ARB_RW1_WA_MSB 0x40006085\r
-#define CYREG_USB_ARB_RW1_RA 0x40006086\r
-#define CYREG_USB_ARB_RW1_RA_MSB 0x40006087\r
-#define CYREG_USB_ARB_RW1_DR 0x40006088\r
-#define CYREG_USB_BUF_SIZE 0x4000608c\r
-#define CYREG_USB_EP_ACTIVE 0x4000608e\r
-#define CYREG_USB_EP_TYPE 0x4000608f\r
-#define CYDEV_USB_ARB_EP2_BASE 0x40006090\r
-#define CYDEV_USB_ARB_EP2_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP2_CFG 0x40006090\r
-#define CYREG_USB_ARB_EP2_INT_EN 0x40006091\r
-#define CYREG_USB_ARB_EP2_SR 0x40006092\r
-#define CYDEV_USB_ARB_RW2_BASE 0x40006094\r
-#define CYDEV_USB_ARB_RW2_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW2_WA 0x40006094\r
-#define CYREG_USB_ARB_RW2_WA_MSB 0x40006095\r
-#define CYREG_USB_ARB_RW2_RA 0x40006096\r
-#define CYREG_USB_ARB_RW2_RA_MSB 0x40006097\r
-#define CYREG_USB_ARB_RW2_DR 0x40006098\r
-#define CYREG_USB_ARB_CFG 0x4000609c\r
-#define CYREG_USB_USB_CLK_EN 0x4000609d\r
-#define CYREG_USB_ARB_INT_EN 0x4000609e\r
-#define CYREG_USB_ARB_INT_SR 0x4000609f\r
-#define CYDEV_USB_ARB_EP3_BASE 0x400060a0\r
-#define CYDEV_USB_ARB_EP3_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP3_CFG 0x400060a0\r
-#define CYREG_USB_ARB_EP3_INT_EN 0x400060a1\r
-#define CYREG_USB_ARB_EP3_SR 0x400060a2\r
-#define CYDEV_USB_ARB_RW3_BASE 0x400060a4\r
-#define CYDEV_USB_ARB_RW3_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW3_WA 0x400060a4\r
-#define CYREG_USB_ARB_RW3_WA_MSB 0x400060a5\r
-#define CYREG_USB_ARB_RW3_RA 0x400060a6\r
-#define CYREG_USB_ARB_RW3_RA_MSB 0x400060a7\r
-#define CYREG_USB_ARB_RW3_DR 0x400060a8\r
-#define CYREG_USB_CWA 0x400060ac\r
-#define CYREG_USB_CWA_MSB 0x400060ad\r
-#define CYDEV_USB_ARB_EP4_BASE 0x400060b0\r
-#define CYDEV_USB_ARB_EP4_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP4_CFG 0x400060b0\r
-#define CYREG_USB_ARB_EP4_INT_EN 0x400060b1\r
-#define CYREG_USB_ARB_EP4_SR 0x400060b2\r
-#define CYDEV_USB_ARB_RW4_BASE 0x400060b4\r
-#define CYDEV_USB_ARB_RW4_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW4_WA 0x400060b4\r
-#define CYREG_USB_ARB_RW4_WA_MSB 0x400060b5\r
-#define CYREG_USB_ARB_RW4_RA 0x400060b6\r
-#define CYREG_USB_ARB_RW4_RA_MSB 0x400060b7\r
-#define CYREG_USB_ARB_RW4_DR 0x400060b8\r
-#define CYREG_USB_DMA_THRES 0x400060bc\r
-#define CYREG_USB_DMA_THRES_MSB 0x400060bd\r
-#define CYDEV_USB_ARB_EP5_BASE 0x400060c0\r
-#define CYDEV_USB_ARB_EP5_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP5_CFG 0x400060c0\r
-#define CYREG_USB_ARB_EP5_INT_EN 0x400060c1\r
-#define CYREG_USB_ARB_EP5_SR 0x400060c2\r
-#define CYDEV_USB_ARB_RW5_BASE 0x400060c4\r
-#define CYDEV_USB_ARB_RW5_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW5_WA 0x400060c4\r
-#define CYREG_USB_ARB_RW5_WA_MSB 0x400060c5\r
-#define CYREG_USB_ARB_RW5_RA 0x400060c6\r
-#define CYREG_USB_ARB_RW5_RA_MSB 0x400060c7\r
-#define CYREG_USB_ARB_RW5_DR 0x400060c8\r
-#define CYREG_USB_BUS_RST_CNT 0x400060cc\r
-#define CYDEV_USB_ARB_EP6_BASE 0x400060d0\r
-#define CYDEV_USB_ARB_EP6_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP6_CFG 0x400060d0\r
-#define CYREG_USB_ARB_EP6_INT_EN 0x400060d1\r
-#define CYREG_USB_ARB_EP6_SR 0x400060d2\r
-#define CYDEV_USB_ARB_RW6_BASE 0x400060d4\r
-#define CYDEV_USB_ARB_RW6_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW6_WA 0x400060d4\r
-#define CYREG_USB_ARB_RW6_WA_MSB 0x400060d5\r
-#define CYREG_USB_ARB_RW6_RA 0x400060d6\r
-#define CYREG_USB_ARB_RW6_RA_MSB 0x400060d7\r
-#define CYREG_USB_ARB_RW6_DR 0x400060d8\r
-#define CYDEV_USB_ARB_EP7_BASE 0x400060e0\r
-#define CYDEV_USB_ARB_EP7_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP7_CFG 0x400060e0\r
-#define CYREG_USB_ARB_EP7_INT_EN 0x400060e1\r
-#define CYREG_USB_ARB_EP7_SR 0x400060e2\r
-#define CYDEV_USB_ARB_RW7_BASE 0x400060e4\r
-#define CYDEV_USB_ARB_RW7_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW7_WA 0x400060e4\r
-#define CYREG_USB_ARB_RW7_WA_MSB 0x400060e5\r
-#define CYREG_USB_ARB_RW7_RA 0x400060e6\r
-#define CYREG_USB_ARB_RW7_RA_MSB 0x400060e7\r
-#define CYREG_USB_ARB_RW7_DR 0x400060e8\r
-#define CYDEV_USB_ARB_EP8_BASE 0x400060f0\r
-#define CYDEV_USB_ARB_EP8_SIZE 0x00000003\r
-#define CYREG_USB_ARB_EP8_CFG 0x400060f0\r
-#define CYREG_USB_ARB_EP8_INT_EN 0x400060f1\r
-#define CYREG_USB_ARB_EP8_SR 0x400060f2\r
-#define CYDEV_USB_ARB_RW8_BASE 0x400060f4\r
-#define CYDEV_USB_ARB_RW8_SIZE 0x00000005\r
-#define CYREG_USB_ARB_RW8_WA 0x400060f4\r
-#define CYREG_USB_ARB_RW8_WA_MSB 0x400060f5\r
-#define CYREG_USB_ARB_RW8_RA 0x400060f6\r
-#define CYREG_USB_ARB_RW8_RA_MSB 0x400060f7\r
-#define CYREG_USB_ARB_RW8_DR 0x400060f8\r
-#define CYDEV_USB_MEM_BASE 0x40006100\r
-#define CYDEV_USB_MEM_SIZE 0x00000200\r
-#define CYREG_USB_MEM_DATA_MBASE 0x40006100\r
-#define CYREG_USB_MEM_DATA_MSIZE 0x00000200\r
-#define CYDEV_UWRK_BASE 0x40006400\r
-#define CYDEV_UWRK_SIZE 0x00000b60\r
-#define CYDEV_UWRK_UWRK8_BASE 0x40006400\r
-#define CYDEV_UWRK_UWRK8_SIZE 0x000003b0\r
-#define CYDEV_UWRK_UWRK8_B0_BASE 0x40006400\r
-#define CYDEV_UWRK_UWRK8_B0_SIZE 0x000000b0\r
-#define CYREG_B0_UDB00_A0 0x40006400\r
-#define CYREG_B0_UDB01_A0 0x40006401\r
-#define CYREG_B0_UDB02_A0 0x40006402\r
-#define CYREG_B0_UDB03_A0 0x40006403\r
-#define CYREG_B0_UDB04_A0 0x40006404\r
-#define CYREG_B0_UDB05_A0 0x40006405\r
-#define CYREG_B0_UDB06_A0 0x40006406\r
-#define CYREG_B0_UDB07_A0 0x40006407\r
-#define CYREG_B0_UDB08_A0 0x40006408\r
-#define CYREG_B0_UDB09_A0 0x40006409\r
-#define CYREG_B0_UDB10_A0 0x4000640a\r
-#define CYREG_B0_UDB11_A0 0x4000640b\r
-#define CYREG_B0_UDB12_A0 0x4000640c\r
-#define CYREG_B0_UDB13_A0 0x4000640d\r
-#define CYREG_B0_UDB14_A0 0x4000640e\r
-#define CYREG_B0_UDB15_A0 0x4000640f\r
-#define CYREG_B0_UDB00_A1 0x40006410\r
-#define CYREG_B0_UDB01_A1 0x40006411\r
-#define CYREG_B0_UDB02_A1 0x40006412\r
-#define CYREG_B0_UDB03_A1 0x40006413\r
-#define CYREG_B0_UDB04_A1 0x40006414\r
-#define CYREG_B0_UDB05_A1 0x40006415\r
-#define CYREG_B0_UDB06_A1 0x40006416\r
-#define CYREG_B0_UDB07_A1 0x40006417\r
-#define CYREG_B0_UDB08_A1 0x40006418\r
-#define CYREG_B0_UDB09_A1 0x40006419\r
-#define CYREG_B0_UDB10_A1 0x4000641a\r
-#define CYREG_B0_UDB11_A1 0x4000641b\r
-#define CYREG_B0_UDB12_A1 0x4000641c\r
-#define CYREG_B0_UDB13_A1 0x4000641d\r
-#define CYREG_B0_UDB14_A1 0x4000641e\r
-#define CYREG_B0_UDB15_A1 0x4000641f\r
-#define CYREG_B0_UDB00_D0 0x40006420\r
-#define CYREG_B0_UDB01_D0 0x40006421\r
-#define CYREG_B0_UDB02_D0 0x40006422\r
-#define CYREG_B0_UDB03_D0 0x40006423\r
-#define CYREG_B0_UDB04_D0 0x40006424\r
-#define CYREG_B0_UDB05_D0 0x40006425\r
-#define CYREG_B0_UDB06_D0 0x40006426\r
-#define CYREG_B0_UDB07_D0 0x40006427\r
-#define CYREG_B0_UDB08_D0 0x40006428\r
-#define CYREG_B0_UDB09_D0 0x40006429\r
-#define CYREG_B0_UDB10_D0 0x4000642a\r
-#define CYREG_B0_UDB11_D0 0x4000642b\r
-#define CYREG_B0_UDB12_D0 0x4000642c\r
-#define CYREG_B0_UDB13_D0 0x4000642d\r
-#define CYREG_B0_UDB14_D0 0x4000642e\r
-#define CYREG_B0_UDB15_D0 0x4000642f\r
-#define CYREG_B0_UDB00_D1 0x40006430\r
-#define CYREG_B0_UDB01_D1 0x40006431\r
-#define CYREG_B0_UDB02_D1 0x40006432\r
-#define CYREG_B0_UDB03_D1 0x40006433\r
-#define CYREG_B0_UDB04_D1 0x40006434\r
-#define CYREG_B0_UDB05_D1 0x40006435\r
-#define CYREG_B0_UDB06_D1 0x40006436\r
-#define CYREG_B0_UDB07_D1 0x40006437\r
-#define CYREG_B0_UDB08_D1 0x40006438\r
-#define CYREG_B0_UDB09_D1 0x40006439\r
-#define CYREG_B0_UDB10_D1 0x4000643a\r
-#define CYREG_B0_UDB11_D1 0x4000643b\r
-#define CYREG_B0_UDB12_D1 0x4000643c\r
-#define CYREG_B0_UDB13_D1 0x4000643d\r
-#define CYREG_B0_UDB14_D1 0x4000643e\r
-#define CYREG_B0_UDB15_D1 0x4000643f\r
-#define CYREG_B0_UDB00_F0 0x40006440\r
-#define CYREG_B0_UDB01_F0 0x40006441\r
-#define CYREG_B0_UDB02_F0 0x40006442\r
-#define CYREG_B0_UDB03_F0 0x40006443\r
-#define CYREG_B0_UDB04_F0 0x40006444\r
-#define CYREG_B0_UDB05_F0 0x40006445\r
-#define CYREG_B0_UDB06_F0 0x40006446\r
-#define CYREG_B0_UDB07_F0 0x40006447\r
-#define CYREG_B0_UDB08_F0 0x40006448\r
-#define CYREG_B0_UDB09_F0 0x40006449\r
-#define CYREG_B0_UDB10_F0 0x4000644a\r
-#define CYREG_B0_UDB11_F0 0x4000644b\r
-#define CYREG_B0_UDB12_F0 0x4000644c\r
-#define CYREG_B0_UDB13_F0 0x4000644d\r
-#define CYREG_B0_UDB14_F0 0x4000644e\r
-#define CYREG_B0_UDB15_F0 0x4000644f\r
-#define CYREG_B0_UDB00_F1 0x40006450\r
-#define CYREG_B0_UDB01_F1 0x40006451\r
-#define CYREG_B0_UDB02_F1 0x40006452\r
-#define CYREG_B0_UDB03_F1 0x40006453\r
-#define CYREG_B0_UDB04_F1 0x40006454\r
-#define CYREG_B0_UDB05_F1 0x40006455\r
-#define CYREG_B0_UDB06_F1 0x40006456\r
-#define CYREG_B0_UDB07_F1 0x40006457\r
-#define CYREG_B0_UDB08_F1 0x40006458\r
-#define CYREG_B0_UDB09_F1 0x40006459\r
-#define CYREG_B0_UDB10_F1 0x4000645a\r
-#define CYREG_B0_UDB11_F1 0x4000645b\r
-#define CYREG_B0_UDB12_F1 0x4000645c\r
-#define CYREG_B0_UDB13_F1 0x4000645d\r
-#define CYREG_B0_UDB14_F1 0x4000645e\r
-#define CYREG_B0_UDB15_F1 0x4000645f\r
-#define CYREG_B0_UDB00_ST 0x40006460\r
-#define CYREG_B0_UDB01_ST 0x40006461\r
-#define CYREG_B0_UDB02_ST 0x40006462\r
-#define CYREG_B0_UDB03_ST 0x40006463\r
-#define CYREG_B0_UDB04_ST 0x40006464\r
-#define CYREG_B0_UDB05_ST 0x40006465\r
-#define CYREG_B0_UDB06_ST 0x40006466\r
-#define CYREG_B0_UDB07_ST 0x40006467\r
-#define CYREG_B0_UDB08_ST 0x40006468\r
-#define CYREG_B0_UDB09_ST 0x40006469\r
-#define CYREG_B0_UDB10_ST 0x4000646a\r
-#define CYREG_B0_UDB11_ST 0x4000646b\r
-#define CYREG_B0_UDB12_ST 0x4000646c\r
-#define CYREG_B0_UDB13_ST 0x4000646d\r
-#define CYREG_B0_UDB14_ST 0x4000646e\r
-#define CYREG_B0_UDB15_ST 0x4000646f\r
-#define CYREG_B0_UDB00_CTL 0x40006470\r
-#define CYREG_B0_UDB01_CTL 0x40006471\r
-#define CYREG_B0_UDB02_CTL 0x40006472\r
-#define CYREG_B0_UDB03_CTL 0x40006473\r
-#define CYREG_B0_UDB04_CTL 0x40006474\r
-#define CYREG_B0_UDB05_CTL 0x40006475\r
-#define CYREG_B0_UDB06_CTL 0x40006476\r
-#define CYREG_B0_UDB07_CTL 0x40006477\r
-#define CYREG_B0_UDB08_CTL 0x40006478\r
-#define CYREG_B0_UDB09_CTL 0x40006479\r
-#define CYREG_B0_UDB10_CTL 0x4000647a\r
-#define CYREG_B0_UDB11_CTL 0x4000647b\r
-#define CYREG_B0_UDB12_CTL 0x4000647c\r
-#define CYREG_B0_UDB13_CTL 0x4000647d\r
-#define CYREG_B0_UDB14_CTL 0x4000647e\r
-#define CYREG_B0_UDB15_CTL 0x4000647f\r
-#define CYREG_B0_UDB00_MSK 0x40006480\r
-#define CYREG_B0_UDB01_MSK 0x40006481\r
-#define CYREG_B0_UDB02_MSK 0x40006482\r
-#define CYREG_B0_UDB03_MSK 0x40006483\r
-#define CYREG_B0_UDB04_MSK 0x40006484\r
-#define CYREG_B0_UDB05_MSK 0x40006485\r
-#define CYREG_B0_UDB06_MSK 0x40006486\r
-#define CYREG_B0_UDB07_MSK 0x40006487\r
-#define CYREG_B0_UDB08_MSK 0x40006488\r
-#define CYREG_B0_UDB09_MSK 0x40006489\r
-#define CYREG_B0_UDB10_MSK 0x4000648a\r
-#define CYREG_B0_UDB11_MSK 0x4000648b\r
-#define CYREG_B0_UDB12_MSK 0x4000648c\r
-#define CYREG_B0_UDB13_MSK 0x4000648d\r
-#define CYREG_B0_UDB14_MSK 0x4000648e\r
-#define CYREG_B0_UDB15_MSK 0x4000648f\r
-#define CYREG_B0_UDB00_ACTL 0x40006490\r
-#define CYREG_B0_UDB01_ACTL 0x40006491\r
-#define CYREG_B0_UDB02_ACTL 0x40006492\r
-#define CYREG_B0_UDB03_ACTL 0x40006493\r
-#define CYREG_B0_UDB04_ACTL 0x40006494\r
-#define CYREG_B0_UDB05_ACTL 0x40006495\r
-#define CYREG_B0_UDB06_ACTL 0x40006496\r
-#define CYREG_B0_UDB07_ACTL 0x40006497\r
-#define CYREG_B0_UDB08_ACTL 0x40006498\r
-#define CYREG_B0_UDB09_ACTL 0x40006499\r
-#define CYREG_B0_UDB10_ACTL 0x4000649a\r
-#define CYREG_B0_UDB11_ACTL 0x4000649b\r
-#define CYREG_B0_UDB12_ACTL 0x4000649c\r
-#define CYREG_B0_UDB13_ACTL 0x4000649d\r
-#define CYREG_B0_UDB14_ACTL 0x4000649e\r
-#define CYREG_B0_UDB15_ACTL 0x4000649f\r
-#define CYREG_B0_UDB00_MC 0x400064a0\r
-#define CYREG_B0_UDB01_MC 0x400064a1\r
-#define CYREG_B0_UDB02_MC 0x400064a2\r
-#define CYREG_B0_UDB03_MC 0x400064a3\r
-#define CYREG_B0_UDB04_MC 0x400064a4\r
-#define CYREG_B0_UDB05_MC 0x400064a5\r
-#define CYREG_B0_UDB06_MC 0x400064a6\r
-#define CYREG_B0_UDB07_MC 0x400064a7\r
-#define CYREG_B0_UDB08_MC 0x400064a8\r
-#define CYREG_B0_UDB09_MC 0x400064a9\r
-#define CYREG_B0_UDB10_MC 0x400064aa\r
-#define CYREG_B0_UDB11_MC 0x400064ab\r
-#define CYREG_B0_UDB12_MC 0x400064ac\r
-#define CYREG_B0_UDB13_MC 0x400064ad\r
-#define CYREG_B0_UDB14_MC 0x400064ae\r
-#define CYREG_B0_UDB15_MC 0x400064af\r
-#define CYDEV_UWRK_UWRK8_B1_BASE 0x40006500\r
-#define CYDEV_UWRK_UWRK8_B1_SIZE 0x000000b0\r
-#define CYREG_B1_UDB04_A0 0x40006504\r
-#define CYREG_B1_UDB05_A0 0x40006505\r
-#define CYREG_B1_UDB06_A0 0x40006506\r
-#define CYREG_B1_UDB07_A0 0x40006507\r
-#define CYREG_B1_UDB08_A0 0x40006508\r
-#define CYREG_B1_UDB09_A0 0x40006509\r
-#define CYREG_B1_UDB10_A0 0x4000650a\r
-#define CYREG_B1_UDB11_A0 0x4000650b\r
-#define CYREG_B1_UDB04_A1 0x40006514\r
-#define CYREG_B1_UDB05_A1 0x40006515\r
-#define CYREG_B1_UDB06_A1 0x40006516\r
-#define CYREG_B1_UDB07_A1 0x40006517\r
-#define CYREG_B1_UDB08_A1 0x40006518\r
-#define CYREG_B1_UDB09_A1 0x40006519\r
-#define CYREG_B1_UDB10_A1 0x4000651a\r
-#define CYREG_B1_UDB11_A1 0x4000651b\r
-#define CYREG_B1_UDB04_D0 0x40006524\r
-#define CYREG_B1_UDB05_D0 0x40006525\r
-#define CYREG_B1_UDB06_D0 0x40006526\r
-#define CYREG_B1_UDB07_D0 0x40006527\r
-#define CYREG_B1_UDB08_D0 0x40006528\r
-#define CYREG_B1_UDB09_D0 0x40006529\r
-#define CYREG_B1_UDB10_D0 0x4000652a\r
-#define CYREG_B1_UDB11_D0 0x4000652b\r
-#define CYREG_B1_UDB04_D1 0x40006534\r
-#define CYREG_B1_UDB05_D1 0x40006535\r
-#define CYREG_B1_UDB06_D1 0x40006536\r
-#define CYREG_B1_UDB07_D1 0x40006537\r
-#define CYREG_B1_UDB08_D1 0x40006538\r
-#define CYREG_B1_UDB09_D1 0x40006539\r
-#define CYREG_B1_UDB10_D1 0x4000653a\r
-#define CYREG_B1_UDB11_D1 0x4000653b\r
-#define CYREG_B1_UDB04_F0 0x40006544\r
-#define CYREG_B1_UDB05_F0 0x40006545\r
-#define CYREG_B1_UDB06_F0 0x40006546\r
-#define CYREG_B1_UDB07_F0 0x40006547\r
-#define CYREG_B1_UDB08_F0 0x40006548\r
-#define CYREG_B1_UDB09_F0 0x40006549\r
-#define CYREG_B1_UDB10_F0 0x4000654a\r
-#define CYREG_B1_UDB11_F0 0x4000654b\r
-#define CYREG_B1_UDB04_F1 0x40006554\r
-#define CYREG_B1_UDB05_F1 0x40006555\r
-#define CYREG_B1_UDB06_F1 0x40006556\r
-#define CYREG_B1_UDB07_F1 0x40006557\r
-#define CYREG_B1_UDB08_F1 0x40006558\r
-#define CYREG_B1_UDB09_F1 0x40006559\r
-#define CYREG_B1_UDB10_F1 0x4000655a\r
-#define CYREG_B1_UDB11_F1 0x4000655b\r
-#define CYREG_B1_UDB04_ST 0x40006564\r
-#define CYREG_B1_UDB05_ST 0x40006565\r
-#define CYREG_B1_UDB06_ST 0x40006566\r
-#define CYREG_B1_UDB07_ST 0x40006567\r
-#define CYREG_B1_UDB08_ST 0x40006568\r
-#define CYREG_B1_UDB09_ST 0x40006569\r
-#define CYREG_B1_UDB10_ST 0x4000656a\r
-#define CYREG_B1_UDB11_ST 0x4000656b\r
-#define CYREG_B1_UDB04_CTL 0x40006574\r
-#define CYREG_B1_UDB05_CTL 0x40006575\r
-#define CYREG_B1_UDB06_CTL 0x40006576\r
-#define CYREG_B1_UDB07_CTL 0x40006577\r
-#define CYREG_B1_UDB08_CTL 0x40006578\r
-#define CYREG_B1_UDB09_CTL 0x40006579\r
-#define CYREG_B1_UDB10_CTL 0x4000657a\r
-#define CYREG_B1_UDB11_CTL 0x4000657b\r
-#define CYREG_B1_UDB04_MSK 0x40006584\r
-#define CYREG_B1_UDB05_MSK 0x40006585\r
-#define CYREG_B1_UDB06_MSK 0x40006586\r
-#define CYREG_B1_UDB07_MSK 0x40006587\r
-#define CYREG_B1_UDB08_MSK 0x40006588\r
-#define CYREG_B1_UDB09_MSK 0x40006589\r
-#define CYREG_B1_UDB10_MSK 0x4000658a\r
-#define CYREG_B1_UDB11_MSK 0x4000658b\r
-#define CYREG_B1_UDB04_ACTL 0x40006594\r
-#define CYREG_B1_UDB05_ACTL 0x40006595\r
-#define CYREG_B1_UDB06_ACTL 0x40006596\r
-#define CYREG_B1_UDB07_ACTL 0x40006597\r
-#define CYREG_B1_UDB08_ACTL 0x40006598\r
-#define CYREG_B1_UDB09_ACTL 0x40006599\r
-#define CYREG_B1_UDB10_ACTL 0x4000659a\r
-#define CYREG_B1_UDB11_ACTL 0x4000659b\r
-#define CYREG_B1_UDB04_MC 0x400065a4\r
-#define CYREG_B1_UDB05_MC 0x400065a5\r
-#define CYREG_B1_UDB06_MC 0x400065a6\r
-#define CYREG_B1_UDB07_MC 0x400065a7\r
-#define CYREG_B1_UDB08_MC 0x400065a8\r
-#define CYREG_B1_UDB09_MC 0x400065a9\r
-#define CYREG_B1_UDB10_MC 0x400065aa\r
-#define CYREG_B1_UDB11_MC 0x400065ab\r
-#define CYDEV_UWRK_UWRK16_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_SIZE 0x00000760\r
-#define CYDEV_UWRK_UWRK16_CAT_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_CAT_SIZE 0x00000760\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_CAT_B0_SIZE 0x00000160\r
-#define CYREG_B0_UDB00_A0_A1 0x40006800\r
-#define CYREG_B0_UDB01_A0_A1 0x40006802\r
-#define CYREG_B0_UDB02_A0_A1 0x40006804\r
-#define CYREG_B0_UDB03_A0_A1 0x40006806\r
-#define CYREG_B0_UDB04_A0_A1 0x40006808\r
-#define CYREG_B0_UDB05_A0_A1 0x4000680a\r
-#define CYREG_B0_UDB06_A0_A1 0x4000680c\r
-#define CYREG_B0_UDB07_A0_A1 0x4000680e\r
-#define CYREG_B0_UDB08_A0_A1 0x40006810\r
-#define CYREG_B0_UDB09_A0_A1 0x40006812\r
-#define CYREG_B0_UDB10_A0_A1 0x40006814\r
-#define CYREG_B0_UDB11_A0_A1 0x40006816\r
-#define CYREG_B0_UDB12_A0_A1 0x40006818\r
-#define CYREG_B0_UDB13_A0_A1 0x4000681a\r
-#define CYREG_B0_UDB14_A0_A1 0x4000681c\r
-#define CYREG_B0_UDB15_A0_A1 0x4000681e\r
-#define CYREG_B0_UDB00_D0_D1 0x40006840\r
-#define CYREG_B0_UDB01_D0_D1 0x40006842\r
-#define CYREG_B0_UDB02_D0_D1 0x40006844\r
-#define CYREG_B0_UDB03_D0_D1 0x40006846\r
-#define CYREG_B0_UDB04_D0_D1 0x40006848\r
-#define CYREG_B0_UDB05_D0_D1 0x4000684a\r
-#define CYREG_B0_UDB06_D0_D1 0x4000684c\r
-#define CYREG_B0_UDB07_D0_D1 0x4000684e\r
-#define CYREG_B0_UDB08_D0_D1 0x40006850\r
-#define CYREG_B0_UDB09_D0_D1 0x40006852\r
-#define CYREG_B0_UDB10_D0_D1 0x40006854\r
-#define CYREG_B0_UDB11_D0_D1 0x40006856\r
-#define CYREG_B0_UDB12_D0_D1 0x40006858\r
-#define CYREG_B0_UDB13_D0_D1 0x4000685a\r
-#define CYREG_B0_UDB14_D0_D1 0x4000685c\r
-#define CYREG_B0_UDB15_D0_D1 0x4000685e\r
-#define CYREG_B0_UDB00_F0_F1 0x40006880\r
-#define CYREG_B0_UDB01_F0_F1 0x40006882\r
-#define CYREG_B0_UDB02_F0_F1 0x40006884\r
-#define CYREG_B0_UDB03_F0_F1 0x40006886\r
-#define CYREG_B0_UDB04_F0_F1 0x40006888\r
-#define CYREG_B0_UDB05_F0_F1 0x4000688a\r
-#define CYREG_B0_UDB06_F0_F1 0x4000688c\r
-#define CYREG_B0_UDB07_F0_F1 0x4000688e\r
-#define CYREG_B0_UDB08_F0_F1 0x40006890\r
-#define CYREG_B0_UDB09_F0_F1 0x40006892\r
-#define CYREG_B0_UDB10_F0_F1 0x40006894\r
-#define CYREG_B0_UDB11_F0_F1 0x40006896\r
-#define CYREG_B0_UDB12_F0_F1 0x40006898\r
-#define CYREG_B0_UDB13_F0_F1 0x4000689a\r
-#define CYREG_B0_UDB14_F0_F1 0x4000689c\r
-#define CYREG_B0_UDB15_F0_F1 0x4000689e\r
-#define CYREG_B0_UDB00_ST_CTL 0x400068c0\r
-#define CYREG_B0_UDB01_ST_CTL 0x400068c2\r
-#define CYREG_B0_UDB02_ST_CTL 0x400068c4\r
-#define CYREG_B0_UDB03_ST_CTL 0x400068c6\r
-#define CYREG_B0_UDB04_ST_CTL 0x400068c8\r
-#define CYREG_B0_UDB05_ST_CTL 0x400068ca\r
-#define CYREG_B0_UDB06_ST_CTL 0x400068cc\r
-#define CYREG_B0_UDB07_ST_CTL 0x400068ce\r
-#define CYREG_B0_UDB08_ST_CTL 0x400068d0\r
-#define CYREG_B0_UDB09_ST_CTL 0x400068d2\r
-#define CYREG_B0_UDB10_ST_CTL 0x400068d4\r
-#define CYREG_B0_UDB11_ST_CTL 0x400068d6\r
-#define CYREG_B0_UDB12_ST_CTL 0x400068d8\r
-#define CYREG_B0_UDB13_ST_CTL 0x400068da\r
-#define CYREG_B0_UDB14_ST_CTL 0x400068dc\r
-#define CYREG_B0_UDB15_ST_CTL 0x400068de\r
-#define CYREG_B0_UDB00_MSK_ACTL 0x40006900\r
-#define CYREG_B0_UDB01_MSK_ACTL 0x40006902\r
-#define CYREG_B0_UDB02_MSK_ACTL 0x40006904\r
-#define CYREG_B0_UDB03_MSK_ACTL 0x40006906\r
-#define CYREG_B0_UDB04_MSK_ACTL 0x40006908\r
-#define CYREG_B0_UDB05_MSK_ACTL 0x4000690a\r
-#define CYREG_B0_UDB06_MSK_ACTL 0x4000690c\r
-#define CYREG_B0_UDB07_MSK_ACTL 0x4000690e\r
-#define CYREG_B0_UDB08_MSK_ACTL 0x40006910\r
-#define CYREG_B0_UDB09_MSK_ACTL 0x40006912\r
-#define CYREG_B0_UDB10_MSK_ACTL 0x40006914\r
-#define CYREG_B0_UDB11_MSK_ACTL 0x40006916\r
-#define CYREG_B0_UDB12_MSK_ACTL 0x40006918\r
-#define CYREG_B0_UDB13_MSK_ACTL 0x4000691a\r
-#define CYREG_B0_UDB14_MSK_ACTL 0x4000691c\r
-#define CYREG_B0_UDB15_MSK_ACTL 0x4000691e\r
-#define CYREG_B0_UDB00_MC_00 0x40006940\r
-#define CYREG_B0_UDB01_MC_00 0x40006942\r
-#define CYREG_B0_UDB02_MC_00 0x40006944\r
-#define CYREG_B0_UDB03_MC_00 0x40006946\r
-#define CYREG_B0_UDB04_MC_00 0x40006948\r
-#define CYREG_B0_UDB05_MC_00 0x4000694a\r
-#define CYREG_B0_UDB06_MC_00 0x4000694c\r
-#define CYREG_B0_UDB07_MC_00 0x4000694e\r
-#define CYREG_B0_UDB08_MC_00 0x40006950\r
-#define CYREG_B0_UDB09_MC_00 0x40006952\r
-#define CYREG_B0_UDB10_MC_00 0x40006954\r
-#define CYREG_B0_UDB11_MC_00 0x40006956\r
-#define CYREG_B0_UDB12_MC_00 0x40006958\r
-#define CYREG_B0_UDB13_MC_00 0x4000695a\r
-#define CYREG_B0_UDB14_MC_00 0x4000695c\r
-#define CYREG_B0_UDB15_MC_00 0x4000695e\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_BASE 0x40006a00\r
-#define CYDEV_UWRK_UWRK16_CAT_B1_SIZE 0x00000160\r
-#define CYREG_B1_UDB04_A0_A1 0x40006a08\r
-#define CYREG_B1_UDB05_A0_A1 0x40006a0a\r
-#define CYREG_B1_UDB06_A0_A1 0x40006a0c\r
-#define CYREG_B1_UDB07_A0_A1 0x40006a0e\r
-#define CYREG_B1_UDB08_A0_A1 0x40006a10\r
-#define CYREG_B1_UDB09_A0_A1 0x40006a12\r
-#define CYREG_B1_UDB10_A0_A1 0x40006a14\r
-#define CYREG_B1_UDB11_A0_A1 0x40006a16\r
-#define CYREG_B1_UDB04_D0_D1 0x40006a48\r
-#define CYREG_B1_UDB05_D0_D1 0x40006a4a\r
-#define CYREG_B1_UDB06_D0_D1 0x40006a4c\r
-#define CYREG_B1_UDB07_D0_D1 0x40006a4e\r
-#define CYREG_B1_UDB08_D0_D1 0x40006a50\r
-#define CYREG_B1_UDB09_D0_D1 0x40006a52\r
-#define CYREG_B1_UDB10_D0_D1 0x40006a54\r
-#define CYREG_B1_UDB11_D0_D1 0x40006a56\r
-#define CYREG_B1_UDB04_F0_F1 0x40006a88\r
-#define CYREG_B1_UDB05_F0_F1 0x40006a8a\r
-#define CYREG_B1_UDB06_F0_F1 0x40006a8c\r
-#define CYREG_B1_UDB07_F0_F1 0x40006a8e\r
-#define CYREG_B1_UDB08_F0_F1 0x40006a90\r
-#define CYREG_B1_UDB09_F0_F1 0x40006a92\r
-#define CYREG_B1_UDB10_F0_F1 0x40006a94\r
-#define CYREG_B1_UDB11_F0_F1 0x40006a96\r
-#define CYREG_B1_UDB04_ST_CTL 0x40006ac8\r
-#define CYREG_B1_UDB05_ST_CTL 0x40006aca\r
-#define CYREG_B1_UDB06_ST_CTL 0x40006acc\r
-#define CYREG_B1_UDB07_ST_CTL 0x40006ace\r
-#define CYREG_B1_UDB08_ST_CTL 0x40006ad0\r
-#define CYREG_B1_UDB09_ST_CTL 0x40006ad2\r
-#define CYREG_B1_UDB10_ST_CTL 0x40006ad4\r
-#define CYREG_B1_UDB11_ST_CTL 0x40006ad6\r
-#define CYREG_B1_UDB04_MSK_ACTL 0x40006b08\r
-#define CYREG_B1_UDB05_MSK_ACTL 0x40006b0a\r
-#define CYREG_B1_UDB06_MSK_ACTL 0x40006b0c\r
-#define CYREG_B1_UDB07_MSK_ACTL 0x40006b0e\r
-#define CYREG_B1_UDB08_MSK_ACTL 0x40006b10\r
-#define CYREG_B1_UDB09_MSK_ACTL 0x40006b12\r
-#define CYREG_B1_UDB10_MSK_ACTL 0x40006b14\r
-#define CYREG_B1_UDB11_MSK_ACTL 0x40006b16\r
-#define CYREG_B1_UDB04_MC_00 0x40006b48\r
-#define CYREG_B1_UDB05_MC_00 0x40006b4a\r
-#define CYREG_B1_UDB06_MC_00 0x40006b4c\r
-#define CYREG_B1_UDB07_MC_00 0x40006b4e\r
-#define CYREG_B1_UDB08_MC_00 0x40006b50\r
-#define CYREG_B1_UDB09_MC_00 0x40006b52\r
-#define CYREG_B1_UDB10_MC_00 0x40006b54\r
-#define CYREG_B1_UDB11_MC_00 0x40006b56\r
-#define CYDEV_UWRK_UWRK16_DEF_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_DEF_SIZE 0x0000075e\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_BASE 0x40006800\r
-#define CYDEV_UWRK_UWRK16_DEF_B0_SIZE 0x0000015e\r
-#define CYREG_B0_UDB00_01_A0 0x40006800\r
-#define CYREG_B0_UDB01_02_A0 0x40006802\r
-#define CYREG_B0_UDB02_03_A0 0x40006804\r
-#define CYREG_B0_UDB03_04_A0 0x40006806\r
-#define CYREG_B0_UDB04_05_A0 0x40006808\r
-#define CYREG_B0_UDB05_06_A0 0x4000680a\r
-#define CYREG_B0_UDB06_07_A0 0x4000680c\r
-#define CYREG_B0_UDB07_08_A0 0x4000680e\r
-#define CYREG_B0_UDB08_09_A0 0x40006810\r
-#define CYREG_B0_UDB09_10_A0 0x40006812\r
-#define CYREG_B0_UDB10_11_A0 0x40006814\r
-#define CYREG_B0_UDB11_12_A0 0x40006816\r
-#define CYREG_B0_UDB12_13_A0 0x40006818\r
-#define CYREG_B0_UDB13_14_A0 0x4000681a\r
-#define CYREG_B0_UDB14_15_A0 0x4000681c\r
-#define CYREG_B0_UDB00_01_A1 0x40006820\r
-#define CYREG_B0_UDB01_02_A1 0x40006822\r
-#define CYREG_B0_UDB02_03_A1 0x40006824\r
-#define CYREG_B0_UDB03_04_A1 0x40006826\r
-#define CYREG_B0_UDB04_05_A1 0x40006828\r
-#define CYREG_B0_UDB05_06_A1 0x4000682a\r
-#define CYREG_B0_UDB06_07_A1 0x4000682c\r
-#define CYREG_B0_UDB07_08_A1 0x4000682e\r
-#define CYREG_B0_UDB08_09_A1 0x40006830\r
-#define CYREG_B0_UDB09_10_A1 0x40006832\r
-#define CYREG_B0_UDB10_11_A1 0x40006834\r
-#define CYREG_B0_UDB11_12_A1 0x40006836\r
-#define CYREG_B0_UDB12_13_A1 0x40006838\r
-#define CYREG_B0_UDB13_14_A1 0x4000683a\r
-#define CYREG_B0_UDB14_15_A1 0x4000683c\r
-#define CYREG_B0_UDB00_01_D0 0x40006840\r
-#define CYREG_B0_UDB01_02_D0 0x40006842\r
-#define CYREG_B0_UDB02_03_D0 0x40006844\r
-#define CYREG_B0_UDB03_04_D0 0x40006846\r
-#define CYREG_B0_UDB04_05_D0 0x40006848\r
-#define CYREG_B0_UDB05_06_D0 0x4000684a\r
-#define CYREG_B0_UDB06_07_D0 0x4000684c\r
-#define CYREG_B0_UDB07_08_D0 0x4000684e\r
-#define CYREG_B0_UDB08_09_D0 0x40006850\r
-#define CYREG_B0_UDB09_10_D0 0x40006852\r
-#define CYREG_B0_UDB10_11_D0 0x40006854\r
-#define CYREG_B0_UDB11_12_D0 0x40006856\r
-#define CYREG_B0_UDB12_13_D0 0x40006858\r
-#define CYREG_B0_UDB13_14_D0 0x4000685a\r
-#define CYREG_B0_UDB14_15_D0 0x4000685c\r
-#define CYREG_B0_UDB00_01_D1 0x40006860\r
-#define CYREG_B0_UDB01_02_D1 0x40006862\r
-#define CYREG_B0_UDB02_03_D1 0x40006864\r
-#define CYREG_B0_UDB03_04_D1 0x40006866\r
-#define CYREG_B0_UDB04_05_D1 0x40006868\r
-#define CYREG_B0_UDB05_06_D1 0x4000686a\r
-#define CYREG_B0_UDB06_07_D1 0x4000686c\r
-#define CYREG_B0_UDB07_08_D1 0x4000686e\r
-#define CYREG_B0_UDB08_09_D1 0x40006870\r
-#define CYREG_B0_UDB09_10_D1 0x40006872\r
-#define CYREG_B0_UDB10_11_D1 0x40006874\r
-#define CYREG_B0_UDB11_12_D1 0x40006876\r
-#define CYREG_B0_UDB12_13_D1 0x40006878\r
-#define CYREG_B0_UDB13_14_D1 0x4000687a\r
-#define CYREG_B0_UDB14_15_D1 0x4000687c\r
-#define CYREG_B0_UDB00_01_F0 0x40006880\r
-#define CYREG_B0_UDB01_02_F0 0x40006882\r
-#define CYREG_B0_UDB02_03_F0 0x40006884\r
-#define CYREG_B0_UDB03_04_F0 0x40006886\r
-#define CYREG_B0_UDB04_05_F0 0x40006888\r
-#define CYREG_B0_UDB05_06_F0 0x4000688a\r
-#define CYREG_B0_UDB06_07_F0 0x4000688c\r
-#define CYREG_B0_UDB07_08_F0 0x4000688e\r
-#define CYREG_B0_UDB08_09_F0 0x40006890\r
-#define CYREG_B0_UDB09_10_F0 0x40006892\r
-#define CYREG_B0_UDB10_11_F0 0x40006894\r
-#define CYREG_B0_UDB11_12_F0 0x40006896\r
-#define CYREG_B0_UDB12_13_F0 0x40006898\r
-#define CYREG_B0_UDB13_14_F0 0x4000689a\r
-#define CYREG_B0_UDB14_15_F0 0x4000689c\r
-#define CYREG_B0_UDB00_01_F1 0x400068a0\r
-#define CYREG_B0_UDB01_02_F1 0x400068a2\r
-#define CYREG_B0_UDB02_03_F1 0x400068a4\r
-#define CYREG_B0_UDB03_04_F1 0x400068a6\r
-#define CYREG_B0_UDB04_05_F1 0x400068a8\r
-#define CYREG_B0_UDB05_06_F1 0x400068aa\r
-#define CYREG_B0_UDB06_07_F1 0x400068ac\r
-#define CYREG_B0_UDB07_08_F1 0x400068ae\r
-#define CYREG_B0_UDB08_09_F1 0x400068b0\r
-#define CYREG_B0_UDB09_10_F1 0x400068b2\r
-#define CYREG_B0_UDB10_11_F1 0x400068b4\r
-#define CYREG_B0_UDB11_12_F1 0x400068b6\r
-#define CYREG_B0_UDB12_13_F1 0x400068b8\r
-#define CYREG_B0_UDB13_14_F1 0x400068ba\r
-#define CYREG_B0_UDB14_15_F1 0x400068bc\r
-#define CYREG_B0_UDB00_01_ST 0x400068c0\r
-#define CYREG_B0_UDB01_02_ST 0x400068c2\r
-#define CYREG_B0_UDB02_03_ST 0x400068c4\r
-#define CYREG_B0_UDB03_04_ST 0x400068c6\r
-#define CYREG_B0_UDB04_05_ST 0x400068c8\r
-#define CYREG_B0_UDB05_06_ST 0x400068ca\r
-#define CYREG_B0_UDB06_07_ST 0x400068cc\r
-#define CYREG_B0_UDB07_08_ST 0x400068ce\r
-#define CYREG_B0_UDB08_09_ST 0x400068d0\r
-#define CYREG_B0_UDB09_10_ST 0x400068d2\r
-#define CYREG_B0_UDB10_11_ST 0x400068d4\r
-#define CYREG_B0_UDB11_12_ST 0x400068d6\r
-#define CYREG_B0_UDB12_13_ST 0x400068d8\r
-#define CYREG_B0_UDB13_14_ST 0x400068da\r
-#define CYREG_B0_UDB14_15_ST 0x400068dc\r
-#define CYREG_B0_UDB00_01_CTL 0x400068e0\r
-#define CYREG_B0_UDB01_02_CTL 0x400068e2\r
-#define CYREG_B0_UDB02_03_CTL 0x400068e4\r
-#define CYREG_B0_UDB03_04_CTL 0x400068e6\r
-#define CYREG_B0_UDB04_05_CTL 0x400068e8\r
-#define CYREG_B0_UDB05_06_CTL 0x400068ea\r
-#define CYREG_B0_UDB06_07_CTL 0x400068ec\r
-#define CYREG_B0_UDB07_08_CTL 0x400068ee\r
-#define CYREG_B0_UDB08_09_CTL 0x400068f0\r
-#define CYREG_B0_UDB09_10_CTL 0x400068f2\r
-#define CYREG_B0_UDB10_11_CTL 0x400068f4\r
-#define CYREG_B0_UDB11_12_CTL 0x400068f6\r
-#define CYREG_B0_UDB12_13_CTL 0x400068f8\r
-#define CYREG_B0_UDB13_14_CTL 0x400068fa\r
-#define CYREG_B0_UDB14_15_CTL 0x400068fc\r
-#define CYREG_B0_UDB00_01_MSK 0x40006900\r
-#define CYREG_B0_UDB01_02_MSK 0x40006902\r
-#define CYREG_B0_UDB02_03_MSK 0x40006904\r
-#define CYREG_B0_UDB03_04_MSK 0x40006906\r
-#define CYREG_B0_UDB04_05_MSK 0x40006908\r
-#define CYREG_B0_UDB05_06_MSK 0x4000690a\r
-#define CYREG_B0_UDB06_07_MSK 0x4000690c\r
-#define CYREG_B0_UDB07_08_MSK 0x4000690e\r
-#define CYREG_B0_UDB08_09_MSK 0x40006910\r
-#define CYREG_B0_UDB09_10_MSK 0x40006912\r
-#define CYREG_B0_UDB10_11_MSK 0x40006914\r
-#define CYREG_B0_UDB11_12_MSK 0x40006916\r
-#define CYREG_B0_UDB12_13_MSK 0x40006918\r
-#define CYREG_B0_UDB13_14_MSK 0x4000691a\r
-#define CYREG_B0_UDB14_15_MSK 0x4000691c\r
-#define CYREG_B0_UDB00_01_ACTL 0x40006920\r
-#define CYREG_B0_UDB01_02_ACTL 0x40006922\r
-#define CYREG_B0_UDB02_03_ACTL 0x40006924\r
-#define CYREG_B0_UDB03_04_ACTL 0x40006926\r
-#define CYREG_B0_UDB04_05_ACTL 0x40006928\r
-#define CYREG_B0_UDB05_06_ACTL 0x4000692a\r
-#define CYREG_B0_UDB06_07_ACTL 0x4000692c\r
-#define CYREG_B0_UDB07_08_ACTL 0x4000692e\r
-#define CYREG_B0_UDB08_09_ACTL 0x40006930\r
-#define CYREG_B0_UDB09_10_ACTL 0x40006932\r
-#define CYREG_B0_UDB10_11_ACTL 0x40006934\r
-#define CYREG_B0_UDB11_12_ACTL 0x40006936\r
-#define CYREG_B0_UDB12_13_ACTL 0x40006938\r
-#define CYREG_B0_UDB13_14_ACTL 0x4000693a\r
-#define CYREG_B0_UDB14_15_ACTL 0x4000693c\r
-#define CYREG_B0_UDB00_01_MC 0x40006940\r
-#define CYREG_B0_UDB01_02_MC 0x40006942\r
-#define CYREG_B0_UDB02_03_MC 0x40006944\r
-#define CYREG_B0_UDB03_04_MC 0x40006946\r
-#define CYREG_B0_UDB04_05_MC 0x40006948\r
-#define CYREG_B0_UDB05_06_MC 0x4000694a\r
-#define CYREG_B0_UDB06_07_MC 0x4000694c\r
-#define CYREG_B0_UDB07_08_MC 0x4000694e\r
-#define CYREG_B0_UDB08_09_MC 0x40006950\r
-#define CYREG_B0_UDB09_10_MC 0x40006952\r
-#define CYREG_B0_UDB10_11_MC 0x40006954\r
-#define CYREG_B0_UDB11_12_MC 0x40006956\r
-#define CYREG_B0_UDB12_13_MC 0x40006958\r
-#define CYREG_B0_UDB13_14_MC 0x4000695a\r
-#define CYREG_B0_UDB14_15_MC 0x4000695c\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_BASE 0x40006a00\r
-#define CYDEV_UWRK_UWRK16_DEF_B1_SIZE 0x0000015e\r
-#define CYREG_B1_UDB04_05_A0 0x40006a08\r
-#define CYREG_B1_UDB05_06_A0 0x40006a0a\r
-#define CYREG_B1_UDB06_07_A0 0x40006a0c\r
-#define CYREG_B1_UDB07_08_A0 0x40006a0e\r
-#define CYREG_B1_UDB08_09_A0 0x40006a10\r
-#define CYREG_B1_UDB09_10_A0 0x40006a12\r
-#define CYREG_B1_UDB10_11_A0 0x40006a14\r
-#define CYREG_B1_UDB11_12_A0 0x40006a16\r
-#define CYREG_B1_UDB04_05_A1 0x40006a28\r
-#define CYREG_B1_UDB05_06_A1 0x40006a2a\r
-#define CYREG_B1_UDB06_07_A1 0x40006a2c\r
-#define CYREG_B1_UDB07_08_A1 0x40006a2e\r
-#define CYREG_B1_UDB08_09_A1 0x40006a30\r
-#define CYREG_B1_UDB09_10_A1 0x40006a32\r
-#define CYREG_B1_UDB10_11_A1 0x40006a34\r
-#define CYREG_B1_UDB11_12_A1 0x40006a36\r
-#define CYREG_B1_UDB04_05_D0 0x40006a48\r
-#define CYREG_B1_UDB05_06_D0 0x40006a4a\r
-#define CYREG_B1_UDB06_07_D0 0x40006a4c\r
-#define CYREG_B1_UDB07_08_D0 0x40006a4e\r
-#define CYREG_B1_UDB08_09_D0 0x40006a50\r
-#define CYREG_B1_UDB09_10_D0 0x40006a52\r
-#define CYREG_B1_UDB10_11_D0 0x40006a54\r
-#define CYREG_B1_UDB11_12_D0 0x40006a56\r
-#define CYREG_B1_UDB04_05_D1 0x40006a68\r
-#define CYREG_B1_UDB05_06_D1 0x40006a6a\r
-#define CYREG_B1_UDB06_07_D1 0x40006a6c\r
-#define CYREG_B1_UDB07_08_D1 0x40006a6e\r
-#define CYREG_B1_UDB08_09_D1 0x40006a70\r
-#define CYREG_B1_UDB09_10_D1 0x40006a72\r
-#define CYREG_B1_UDB10_11_D1 0x40006a74\r
-#define CYREG_B1_UDB11_12_D1 0x40006a76\r
-#define CYREG_B1_UDB04_05_F0 0x40006a88\r
-#define CYREG_B1_UDB05_06_F0 0x40006a8a\r
-#define CYREG_B1_UDB06_07_F0 0x40006a8c\r
-#define CYREG_B1_UDB07_08_F0 0x40006a8e\r
-#define CYREG_B1_UDB08_09_F0 0x40006a90\r
-#define CYREG_B1_UDB09_10_F0 0x40006a92\r
-#define CYREG_B1_UDB10_11_F0 0x40006a94\r
-#define CYREG_B1_UDB11_12_F0 0x40006a96\r
-#define CYREG_B1_UDB04_05_F1 0x40006aa8\r
-#define CYREG_B1_UDB05_06_F1 0x40006aaa\r
-#define CYREG_B1_UDB06_07_F1 0x40006aac\r
-#define CYREG_B1_UDB07_08_F1 0x40006aae\r
-#define CYREG_B1_UDB08_09_F1 0x40006ab0\r
-#define CYREG_B1_UDB09_10_F1 0x40006ab2\r
-#define CYREG_B1_UDB10_11_F1 0x40006ab4\r
-#define CYREG_B1_UDB11_12_F1 0x40006ab6\r
-#define CYREG_B1_UDB04_05_ST 0x40006ac8\r
-#define CYREG_B1_UDB05_06_ST 0x40006aca\r
-#define CYREG_B1_UDB06_07_ST 0x40006acc\r
-#define CYREG_B1_UDB07_08_ST 0x40006ace\r
-#define CYREG_B1_UDB08_09_ST 0x40006ad0\r
-#define CYREG_B1_UDB09_10_ST 0x40006ad2\r
-#define CYREG_B1_UDB10_11_ST 0x40006ad4\r
-#define CYREG_B1_UDB11_12_ST 0x40006ad6\r
-#define CYREG_B1_UDB04_05_CTL 0x40006ae8\r
-#define CYREG_B1_UDB05_06_CTL 0x40006aea\r
-#define CYREG_B1_UDB06_07_CTL 0x40006aec\r
-#define CYREG_B1_UDB07_08_CTL 0x40006aee\r
-#define CYREG_B1_UDB08_09_CTL 0x40006af0\r
-#define CYREG_B1_UDB09_10_CTL 0x40006af2\r
-#define CYREG_B1_UDB10_11_CTL 0x40006af4\r
-#define CYREG_B1_UDB11_12_CTL 0x40006af6\r
-#define CYREG_B1_UDB04_05_MSK 0x40006b08\r
-#define CYREG_B1_UDB05_06_MSK 0x40006b0a\r
-#define CYREG_B1_UDB06_07_MSK 0x40006b0c\r
-#define CYREG_B1_UDB07_08_MSK 0x40006b0e\r
-#define CYREG_B1_UDB08_09_MSK 0x40006b10\r
-#define CYREG_B1_UDB09_10_MSK 0x40006b12\r
-#define CYREG_B1_UDB10_11_MSK 0x40006b14\r
-#define CYREG_B1_UDB11_12_MSK 0x40006b16\r
-#define CYREG_B1_UDB04_05_ACTL 0x40006b28\r
-#define CYREG_B1_UDB05_06_ACTL 0x40006b2a\r
-#define CYREG_B1_UDB06_07_ACTL 0x40006b2c\r
-#define CYREG_B1_UDB07_08_ACTL 0x40006b2e\r
-#define CYREG_B1_UDB08_09_ACTL 0x40006b30\r
-#define CYREG_B1_UDB09_10_ACTL 0x40006b32\r
-#define CYREG_B1_UDB10_11_ACTL 0x40006b34\r
-#define CYREG_B1_UDB11_12_ACTL 0x40006b36\r
-#define CYREG_B1_UDB04_05_MC 0x40006b48\r
-#define CYREG_B1_UDB05_06_MC 0x40006b4a\r
-#define CYREG_B1_UDB06_07_MC 0x40006b4c\r
-#define CYREG_B1_UDB07_08_MC 0x40006b4e\r
-#define CYREG_B1_UDB08_09_MC 0x40006b50\r
-#define CYREG_B1_UDB09_10_MC 0x40006b52\r
-#define CYREG_B1_UDB10_11_MC 0x40006b54\r
-#define CYREG_B1_UDB11_12_MC 0x40006b56\r
-#define CYDEV_PHUB_BASE 0x40007000\r
-#define CYDEV_PHUB_SIZE 0x00000c00\r
-#define CYREG_PHUB_CFG 0x40007000\r
-#define CYREG_PHUB_ERR 0x40007004\r
-#define CYREG_PHUB_ERR_ADR 0x40007008\r
-#define CYDEV_PHUB_CH0_BASE 0x40007010\r
-#define CYDEV_PHUB_CH0_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH0_BASIC_CFG 0x40007010\r
-#define CYREG_PHUB_CH0_ACTION 0x40007014\r
-#define CYREG_PHUB_CH0_BASIC_STATUS 0x40007018\r
-#define CYDEV_PHUB_CH1_BASE 0x40007020\r
-#define CYDEV_PHUB_CH1_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH1_BASIC_CFG 0x40007020\r
-#define CYREG_PHUB_CH1_ACTION 0x40007024\r
-#define CYREG_PHUB_CH1_BASIC_STATUS 0x40007028\r
-#define CYDEV_PHUB_CH2_BASE 0x40007030\r
-#define CYDEV_PHUB_CH2_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH2_BASIC_CFG 0x40007030\r
-#define CYREG_PHUB_CH2_ACTION 0x40007034\r
-#define CYREG_PHUB_CH2_BASIC_STATUS 0x40007038\r
-#define CYDEV_PHUB_CH3_BASE 0x40007040\r
-#define CYDEV_PHUB_CH3_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH3_BASIC_CFG 0x40007040\r
-#define CYREG_PHUB_CH3_ACTION 0x40007044\r
-#define CYREG_PHUB_CH3_BASIC_STATUS 0x40007048\r
-#define CYDEV_PHUB_CH4_BASE 0x40007050\r
-#define CYDEV_PHUB_CH4_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH4_BASIC_CFG 0x40007050\r
-#define CYREG_PHUB_CH4_ACTION 0x40007054\r
-#define CYREG_PHUB_CH4_BASIC_STATUS 0x40007058\r
-#define CYDEV_PHUB_CH5_BASE 0x40007060\r
-#define CYDEV_PHUB_CH5_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH5_BASIC_CFG 0x40007060\r
-#define CYREG_PHUB_CH5_ACTION 0x40007064\r
-#define CYREG_PHUB_CH5_BASIC_STATUS 0x40007068\r
-#define CYDEV_PHUB_CH6_BASE 0x40007070\r
-#define CYDEV_PHUB_CH6_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH6_BASIC_CFG 0x40007070\r
-#define CYREG_PHUB_CH6_ACTION 0x40007074\r
-#define CYREG_PHUB_CH6_BASIC_STATUS 0x40007078\r
-#define CYDEV_PHUB_CH7_BASE 0x40007080\r
-#define CYDEV_PHUB_CH7_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH7_BASIC_CFG 0x40007080\r
-#define CYREG_PHUB_CH7_ACTION 0x40007084\r
-#define CYREG_PHUB_CH7_BASIC_STATUS 0x40007088\r
-#define CYDEV_PHUB_CH8_BASE 0x40007090\r
-#define CYDEV_PHUB_CH8_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH8_BASIC_CFG 0x40007090\r
-#define CYREG_PHUB_CH8_ACTION 0x40007094\r
-#define CYREG_PHUB_CH8_BASIC_STATUS 0x40007098\r
-#define CYDEV_PHUB_CH9_BASE 0x400070a0\r
-#define CYDEV_PHUB_CH9_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH9_BASIC_CFG 0x400070a0\r
-#define CYREG_PHUB_CH9_ACTION 0x400070a4\r
-#define CYREG_PHUB_CH9_BASIC_STATUS 0x400070a8\r
-#define CYDEV_PHUB_CH10_BASE 0x400070b0\r
-#define CYDEV_PHUB_CH10_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH10_BASIC_CFG 0x400070b0\r
-#define CYREG_PHUB_CH10_ACTION 0x400070b4\r
-#define CYREG_PHUB_CH10_BASIC_STATUS 0x400070b8\r
-#define CYDEV_PHUB_CH11_BASE 0x400070c0\r
-#define CYDEV_PHUB_CH11_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH11_BASIC_CFG 0x400070c0\r
-#define CYREG_PHUB_CH11_ACTION 0x400070c4\r
-#define CYREG_PHUB_CH11_BASIC_STATUS 0x400070c8\r
-#define CYDEV_PHUB_CH12_BASE 0x400070d0\r
-#define CYDEV_PHUB_CH12_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH12_BASIC_CFG 0x400070d0\r
-#define CYREG_PHUB_CH12_ACTION 0x400070d4\r
-#define CYREG_PHUB_CH12_BASIC_STATUS 0x400070d8\r
-#define CYDEV_PHUB_CH13_BASE 0x400070e0\r
-#define CYDEV_PHUB_CH13_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH13_BASIC_CFG 0x400070e0\r
-#define CYREG_PHUB_CH13_ACTION 0x400070e4\r
-#define CYREG_PHUB_CH13_BASIC_STATUS 0x400070e8\r
-#define CYDEV_PHUB_CH14_BASE 0x400070f0\r
-#define CYDEV_PHUB_CH14_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH14_BASIC_CFG 0x400070f0\r
-#define CYREG_PHUB_CH14_ACTION 0x400070f4\r
-#define CYREG_PHUB_CH14_BASIC_STATUS 0x400070f8\r
-#define CYDEV_PHUB_CH15_BASE 0x40007100\r
-#define CYDEV_PHUB_CH15_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH15_BASIC_CFG 0x40007100\r
-#define CYREG_PHUB_CH15_ACTION 0x40007104\r
-#define CYREG_PHUB_CH15_BASIC_STATUS 0x40007108\r
-#define CYDEV_PHUB_CH16_BASE 0x40007110\r
-#define CYDEV_PHUB_CH16_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH16_BASIC_CFG 0x40007110\r
-#define CYREG_PHUB_CH16_ACTION 0x40007114\r
-#define CYREG_PHUB_CH16_BASIC_STATUS 0x40007118\r
-#define CYDEV_PHUB_CH17_BASE 0x40007120\r
-#define CYDEV_PHUB_CH17_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH17_BASIC_CFG 0x40007120\r
-#define CYREG_PHUB_CH17_ACTION 0x40007124\r
-#define CYREG_PHUB_CH17_BASIC_STATUS 0x40007128\r
-#define CYDEV_PHUB_CH18_BASE 0x40007130\r
-#define CYDEV_PHUB_CH18_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH18_BASIC_CFG 0x40007130\r
-#define CYREG_PHUB_CH18_ACTION 0x40007134\r
-#define CYREG_PHUB_CH18_BASIC_STATUS 0x40007138\r
-#define CYDEV_PHUB_CH19_BASE 0x40007140\r
-#define CYDEV_PHUB_CH19_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH19_BASIC_CFG 0x40007140\r
-#define CYREG_PHUB_CH19_ACTION 0x40007144\r
-#define CYREG_PHUB_CH19_BASIC_STATUS 0x40007148\r
-#define CYDEV_PHUB_CH20_BASE 0x40007150\r
-#define CYDEV_PHUB_CH20_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH20_BASIC_CFG 0x40007150\r
-#define CYREG_PHUB_CH20_ACTION 0x40007154\r
-#define CYREG_PHUB_CH20_BASIC_STATUS 0x40007158\r
-#define CYDEV_PHUB_CH21_BASE 0x40007160\r
-#define CYDEV_PHUB_CH21_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH21_BASIC_CFG 0x40007160\r
-#define CYREG_PHUB_CH21_ACTION 0x40007164\r
-#define CYREG_PHUB_CH21_BASIC_STATUS 0x40007168\r
-#define CYDEV_PHUB_CH22_BASE 0x40007170\r
-#define CYDEV_PHUB_CH22_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH22_BASIC_CFG 0x40007170\r
-#define CYREG_PHUB_CH22_ACTION 0x40007174\r
-#define CYREG_PHUB_CH22_BASIC_STATUS 0x40007178\r
-#define CYDEV_PHUB_CH23_BASE 0x40007180\r
-#define CYDEV_PHUB_CH23_SIZE 0x0000000c\r
-#define CYREG_PHUB_CH23_BASIC_CFG 0x40007180\r
-#define CYREG_PHUB_CH23_ACTION 0x40007184\r
-#define CYREG_PHUB_CH23_BASIC_STATUS 0x40007188\r
-#define CYDEV_PHUB_CFGMEM0_BASE 0x40007600\r
-#define CYDEV_PHUB_CFGMEM0_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM0_CFG0 0x40007600\r
-#define CYREG_PHUB_CFGMEM0_CFG1 0x40007604\r
-#define CYDEV_PHUB_CFGMEM1_BASE 0x40007608\r
-#define CYDEV_PHUB_CFGMEM1_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM1_CFG0 0x40007608\r
-#define CYREG_PHUB_CFGMEM1_CFG1 0x4000760c\r
-#define CYDEV_PHUB_CFGMEM2_BASE 0x40007610\r
-#define CYDEV_PHUB_CFGMEM2_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM2_CFG0 0x40007610\r
-#define CYREG_PHUB_CFGMEM2_CFG1 0x40007614\r
-#define CYDEV_PHUB_CFGMEM3_BASE 0x40007618\r
-#define CYDEV_PHUB_CFGMEM3_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM3_CFG0 0x40007618\r
-#define CYREG_PHUB_CFGMEM3_CFG1 0x4000761c\r
-#define CYDEV_PHUB_CFGMEM4_BASE 0x40007620\r
-#define CYDEV_PHUB_CFGMEM4_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM4_CFG0 0x40007620\r
-#define CYREG_PHUB_CFGMEM4_CFG1 0x40007624\r
-#define CYDEV_PHUB_CFGMEM5_BASE 0x40007628\r
-#define CYDEV_PHUB_CFGMEM5_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM5_CFG0 0x40007628\r
-#define CYREG_PHUB_CFGMEM5_CFG1 0x4000762c\r
-#define CYDEV_PHUB_CFGMEM6_BASE 0x40007630\r
-#define CYDEV_PHUB_CFGMEM6_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM6_CFG0 0x40007630\r
-#define CYREG_PHUB_CFGMEM6_CFG1 0x40007634\r
-#define CYDEV_PHUB_CFGMEM7_BASE 0x40007638\r
-#define CYDEV_PHUB_CFGMEM7_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM7_CFG0 0x40007638\r
-#define CYREG_PHUB_CFGMEM7_CFG1 0x4000763c\r
-#define CYDEV_PHUB_CFGMEM8_BASE 0x40007640\r
-#define CYDEV_PHUB_CFGMEM8_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM8_CFG0 0x40007640\r
-#define CYREG_PHUB_CFGMEM8_CFG1 0x40007644\r
-#define CYDEV_PHUB_CFGMEM9_BASE 0x40007648\r
-#define CYDEV_PHUB_CFGMEM9_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM9_CFG0 0x40007648\r
-#define CYREG_PHUB_CFGMEM9_CFG1 0x4000764c\r
-#define CYDEV_PHUB_CFGMEM10_BASE 0x40007650\r
-#define CYDEV_PHUB_CFGMEM10_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM10_CFG0 0x40007650\r
-#define CYREG_PHUB_CFGMEM10_CFG1 0x40007654\r
-#define CYDEV_PHUB_CFGMEM11_BASE 0x40007658\r
-#define CYDEV_PHUB_CFGMEM11_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM11_CFG0 0x40007658\r
-#define CYREG_PHUB_CFGMEM11_CFG1 0x4000765c\r
-#define CYDEV_PHUB_CFGMEM12_BASE 0x40007660\r
-#define CYDEV_PHUB_CFGMEM12_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM12_CFG0 0x40007660\r
-#define CYREG_PHUB_CFGMEM12_CFG1 0x40007664\r
-#define CYDEV_PHUB_CFGMEM13_BASE 0x40007668\r
-#define CYDEV_PHUB_CFGMEM13_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM13_CFG0 0x40007668\r
-#define CYREG_PHUB_CFGMEM13_CFG1 0x4000766c\r
-#define CYDEV_PHUB_CFGMEM14_BASE 0x40007670\r
-#define CYDEV_PHUB_CFGMEM14_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM14_CFG0 0x40007670\r
-#define CYREG_PHUB_CFGMEM14_CFG1 0x40007674\r
-#define CYDEV_PHUB_CFGMEM15_BASE 0x40007678\r
-#define CYDEV_PHUB_CFGMEM15_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM15_CFG0 0x40007678\r
-#define CYREG_PHUB_CFGMEM15_CFG1 0x4000767c\r
-#define CYDEV_PHUB_CFGMEM16_BASE 0x40007680\r
-#define CYDEV_PHUB_CFGMEM16_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM16_CFG0 0x40007680\r
-#define CYREG_PHUB_CFGMEM16_CFG1 0x40007684\r
-#define CYDEV_PHUB_CFGMEM17_BASE 0x40007688\r
-#define CYDEV_PHUB_CFGMEM17_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM17_CFG0 0x40007688\r
-#define CYREG_PHUB_CFGMEM17_CFG1 0x4000768c\r
-#define CYDEV_PHUB_CFGMEM18_BASE 0x40007690\r
-#define CYDEV_PHUB_CFGMEM18_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM18_CFG0 0x40007690\r
-#define CYREG_PHUB_CFGMEM18_CFG1 0x40007694\r
-#define CYDEV_PHUB_CFGMEM19_BASE 0x40007698\r
-#define CYDEV_PHUB_CFGMEM19_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM19_CFG0 0x40007698\r
-#define CYREG_PHUB_CFGMEM19_CFG1 0x4000769c\r
-#define CYDEV_PHUB_CFGMEM20_BASE 0x400076a0\r
-#define CYDEV_PHUB_CFGMEM20_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM20_CFG0 0x400076a0\r
-#define CYREG_PHUB_CFGMEM20_CFG1 0x400076a4\r
-#define CYDEV_PHUB_CFGMEM21_BASE 0x400076a8\r
-#define CYDEV_PHUB_CFGMEM21_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM21_CFG0 0x400076a8\r
-#define CYREG_PHUB_CFGMEM21_CFG1 0x400076ac\r
-#define CYDEV_PHUB_CFGMEM22_BASE 0x400076b0\r
-#define CYDEV_PHUB_CFGMEM22_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM22_CFG0 0x400076b0\r
-#define CYREG_PHUB_CFGMEM22_CFG1 0x400076b4\r
-#define CYDEV_PHUB_CFGMEM23_BASE 0x400076b8\r
-#define CYDEV_PHUB_CFGMEM23_SIZE 0x00000008\r
-#define CYREG_PHUB_CFGMEM23_CFG0 0x400076b8\r
-#define CYREG_PHUB_CFGMEM23_CFG1 0x400076bc\r
-#define CYDEV_PHUB_TDMEM0_BASE 0x40007800\r
-#define CYDEV_PHUB_TDMEM0_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM0_ORIG_TD0 0x40007800\r
-#define CYREG_PHUB_TDMEM0_ORIG_TD1 0x40007804\r
-#define CYDEV_PHUB_TDMEM1_BASE 0x40007808\r
-#define CYDEV_PHUB_TDMEM1_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM1_ORIG_TD0 0x40007808\r
-#define CYREG_PHUB_TDMEM1_ORIG_TD1 0x4000780c\r
-#define CYDEV_PHUB_TDMEM2_BASE 0x40007810\r
-#define CYDEV_PHUB_TDMEM2_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM2_ORIG_TD0 0x40007810\r
-#define CYREG_PHUB_TDMEM2_ORIG_TD1 0x40007814\r
-#define CYDEV_PHUB_TDMEM3_BASE 0x40007818\r
-#define CYDEV_PHUB_TDMEM3_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM3_ORIG_TD0 0x40007818\r
-#define CYREG_PHUB_TDMEM3_ORIG_TD1 0x4000781c\r
-#define CYDEV_PHUB_TDMEM4_BASE 0x40007820\r
-#define CYDEV_PHUB_TDMEM4_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM4_ORIG_TD0 0x40007820\r
-#define CYREG_PHUB_TDMEM4_ORIG_TD1 0x40007824\r
-#define CYDEV_PHUB_TDMEM5_BASE 0x40007828\r
-#define CYDEV_PHUB_TDMEM5_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM5_ORIG_TD0 0x40007828\r
-#define CYREG_PHUB_TDMEM5_ORIG_TD1 0x4000782c\r
-#define CYDEV_PHUB_TDMEM6_BASE 0x40007830\r
-#define CYDEV_PHUB_TDMEM6_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM6_ORIG_TD0 0x40007830\r
-#define CYREG_PHUB_TDMEM6_ORIG_TD1 0x40007834\r
-#define CYDEV_PHUB_TDMEM7_BASE 0x40007838\r
-#define CYDEV_PHUB_TDMEM7_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM7_ORIG_TD0 0x40007838\r
-#define CYREG_PHUB_TDMEM7_ORIG_TD1 0x4000783c\r
-#define CYDEV_PHUB_TDMEM8_BASE 0x40007840\r
-#define CYDEV_PHUB_TDMEM8_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM8_ORIG_TD0 0x40007840\r
-#define CYREG_PHUB_TDMEM8_ORIG_TD1 0x40007844\r
-#define CYDEV_PHUB_TDMEM9_BASE 0x40007848\r
-#define CYDEV_PHUB_TDMEM9_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM9_ORIG_TD0 0x40007848\r
-#define CYREG_PHUB_TDMEM9_ORIG_TD1 0x4000784c\r
-#define CYDEV_PHUB_TDMEM10_BASE 0x40007850\r
-#define CYDEV_PHUB_TDMEM10_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM10_ORIG_TD0 0x40007850\r
-#define CYREG_PHUB_TDMEM10_ORIG_TD1 0x40007854\r
-#define CYDEV_PHUB_TDMEM11_BASE 0x40007858\r
-#define CYDEV_PHUB_TDMEM11_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM11_ORIG_TD0 0x40007858\r
-#define CYREG_PHUB_TDMEM11_ORIG_TD1 0x4000785c\r
-#define CYDEV_PHUB_TDMEM12_BASE 0x40007860\r
-#define CYDEV_PHUB_TDMEM12_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM12_ORIG_TD0 0x40007860\r
-#define CYREG_PHUB_TDMEM12_ORIG_TD1 0x40007864\r
-#define CYDEV_PHUB_TDMEM13_BASE 0x40007868\r
-#define CYDEV_PHUB_TDMEM13_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM13_ORIG_TD0 0x40007868\r
-#define CYREG_PHUB_TDMEM13_ORIG_TD1 0x4000786c\r
-#define CYDEV_PHUB_TDMEM14_BASE 0x40007870\r
-#define CYDEV_PHUB_TDMEM14_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM14_ORIG_TD0 0x40007870\r
-#define CYREG_PHUB_TDMEM14_ORIG_TD1 0x40007874\r
-#define CYDEV_PHUB_TDMEM15_BASE 0x40007878\r
-#define CYDEV_PHUB_TDMEM15_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM15_ORIG_TD0 0x40007878\r
-#define CYREG_PHUB_TDMEM15_ORIG_TD1 0x4000787c\r
-#define CYDEV_PHUB_TDMEM16_BASE 0x40007880\r
-#define CYDEV_PHUB_TDMEM16_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM16_ORIG_TD0 0x40007880\r
-#define CYREG_PHUB_TDMEM16_ORIG_TD1 0x40007884\r
-#define CYDEV_PHUB_TDMEM17_BASE 0x40007888\r
-#define CYDEV_PHUB_TDMEM17_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM17_ORIG_TD0 0x40007888\r
-#define CYREG_PHUB_TDMEM17_ORIG_TD1 0x4000788c\r
-#define CYDEV_PHUB_TDMEM18_BASE 0x40007890\r
-#define CYDEV_PHUB_TDMEM18_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM18_ORIG_TD0 0x40007890\r
-#define CYREG_PHUB_TDMEM18_ORIG_TD1 0x40007894\r
-#define CYDEV_PHUB_TDMEM19_BASE 0x40007898\r
-#define CYDEV_PHUB_TDMEM19_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM19_ORIG_TD0 0x40007898\r
-#define CYREG_PHUB_TDMEM19_ORIG_TD1 0x4000789c\r
-#define CYDEV_PHUB_TDMEM20_BASE 0x400078a0\r
-#define CYDEV_PHUB_TDMEM20_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM20_ORIG_TD0 0x400078a0\r
-#define CYREG_PHUB_TDMEM20_ORIG_TD1 0x400078a4\r
-#define CYDEV_PHUB_TDMEM21_BASE 0x400078a8\r
-#define CYDEV_PHUB_TDMEM21_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM21_ORIG_TD0 0x400078a8\r
-#define CYREG_PHUB_TDMEM21_ORIG_TD1 0x400078ac\r
-#define CYDEV_PHUB_TDMEM22_BASE 0x400078b0\r
-#define CYDEV_PHUB_TDMEM22_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM22_ORIG_TD0 0x400078b0\r
-#define CYREG_PHUB_TDMEM22_ORIG_TD1 0x400078b4\r
-#define CYDEV_PHUB_TDMEM23_BASE 0x400078b8\r
-#define CYDEV_PHUB_TDMEM23_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM23_ORIG_TD0 0x400078b8\r
-#define CYREG_PHUB_TDMEM23_ORIG_TD1 0x400078bc\r
-#define CYDEV_PHUB_TDMEM24_BASE 0x400078c0\r
-#define CYDEV_PHUB_TDMEM24_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM24_ORIG_TD0 0x400078c0\r
-#define CYREG_PHUB_TDMEM24_ORIG_TD1 0x400078c4\r
-#define CYDEV_PHUB_TDMEM25_BASE 0x400078c8\r
-#define CYDEV_PHUB_TDMEM25_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM25_ORIG_TD0 0x400078c8\r
-#define CYREG_PHUB_TDMEM25_ORIG_TD1 0x400078cc\r
-#define CYDEV_PHUB_TDMEM26_BASE 0x400078d0\r
-#define CYDEV_PHUB_TDMEM26_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM26_ORIG_TD0 0x400078d0\r
-#define CYREG_PHUB_TDMEM26_ORIG_TD1 0x400078d4\r
-#define CYDEV_PHUB_TDMEM27_BASE 0x400078d8\r
-#define CYDEV_PHUB_TDMEM27_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM27_ORIG_TD0 0x400078d8\r
-#define CYREG_PHUB_TDMEM27_ORIG_TD1 0x400078dc\r
-#define CYDEV_PHUB_TDMEM28_BASE 0x400078e0\r
-#define CYDEV_PHUB_TDMEM28_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM28_ORIG_TD0 0x400078e0\r
-#define CYREG_PHUB_TDMEM28_ORIG_TD1 0x400078e4\r
-#define CYDEV_PHUB_TDMEM29_BASE 0x400078e8\r
-#define CYDEV_PHUB_TDMEM29_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM29_ORIG_TD0 0x400078e8\r
-#define CYREG_PHUB_TDMEM29_ORIG_TD1 0x400078ec\r
-#define CYDEV_PHUB_TDMEM30_BASE 0x400078f0\r
-#define CYDEV_PHUB_TDMEM30_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM30_ORIG_TD0 0x400078f0\r
-#define CYREG_PHUB_TDMEM30_ORIG_TD1 0x400078f4\r
-#define CYDEV_PHUB_TDMEM31_BASE 0x400078f8\r
-#define CYDEV_PHUB_TDMEM31_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM31_ORIG_TD0 0x400078f8\r
-#define CYREG_PHUB_TDMEM31_ORIG_TD1 0x400078fc\r
-#define CYDEV_PHUB_TDMEM32_BASE 0x40007900\r
-#define CYDEV_PHUB_TDMEM32_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM32_ORIG_TD0 0x40007900\r
-#define CYREG_PHUB_TDMEM32_ORIG_TD1 0x40007904\r
-#define CYDEV_PHUB_TDMEM33_BASE 0x40007908\r
-#define CYDEV_PHUB_TDMEM33_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM33_ORIG_TD0 0x40007908\r
-#define CYREG_PHUB_TDMEM33_ORIG_TD1 0x4000790c\r
-#define CYDEV_PHUB_TDMEM34_BASE 0x40007910\r
-#define CYDEV_PHUB_TDMEM34_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM34_ORIG_TD0 0x40007910\r
-#define CYREG_PHUB_TDMEM34_ORIG_TD1 0x40007914\r
-#define CYDEV_PHUB_TDMEM35_BASE 0x40007918\r
-#define CYDEV_PHUB_TDMEM35_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM35_ORIG_TD0 0x40007918\r
-#define CYREG_PHUB_TDMEM35_ORIG_TD1 0x4000791c\r
-#define CYDEV_PHUB_TDMEM36_BASE 0x40007920\r
-#define CYDEV_PHUB_TDMEM36_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM36_ORIG_TD0 0x40007920\r
-#define CYREG_PHUB_TDMEM36_ORIG_TD1 0x40007924\r
-#define CYDEV_PHUB_TDMEM37_BASE 0x40007928\r
-#define CYDEV_PHUB_TDMEM37_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM37_ORIG_TD0 0x40007928\r
-#define CYREG_PHUB_TDMEM37_ORIG_TD1 0x4000792c\r
-#define CYDEV_PHUB_TDMEM38_BASE 0x40007930\r
-#define CYDEV_PHUB_TDMEM38_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM38_ORIG_TD0 0x40007930\r
-#define CYREG_PHUB_TDMEM38_ORIG_TD1 0x40007934\r
-#define CYDEV_PHUB_TDMEM39_BASE 0x40007938\r
-#define CYDEV_PHUB_TDMEM39_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM39_ORIG_TD0 0x40007938\r
-#define CYREG_PHUB_TDMEM39_ORIG_TD1 0x4000793c\r
-#define CYDEV_PHUB_TDMEM40_BASE 0x40007940\r
-#define CYDEV_PHUB_TDMEM40_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM40_ORIG_TD0 0x40007940\r
-#define CYREG_PHUB_TDMEM40_ORIG_TD1 0x40007944\r
-#define CYDEV_PHUB_TDMEM41_BASE 0x40007948\r
-#define CYDEV_PHUB_TDMEM41_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM41_ORIG_TD0 0x40007948\r
-#define CYREG_PHUB_TDMEM41_ORIG_TD1 0x4000794c\r
-#define CYDEV_PHUB_TDMEM42_BASE 0x40007950\r
-#define CYDEV_PHUB_TDMEM42_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM42_ORIG_TD0 0x40007950\r
-#define CYREG_PHUB_TDMEM42_ORIG_TD1 0x40007954\r
-#define CYDEV_PHUB_TDMEM43_BASE 0x40007958\r
-#define CYDEV_PHUB_TDMEM43_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM43_ORIG_TD0 0x40007958\r
-#define CYREG_PHUB_TDMEM43_ORIG_TD1 0x4000795c\r
-#define CYDEV_PHUB_TDMEM44_BASE 0x40007960\r
-#define CYDEV_PHUB_TDMEM44_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM44_ORIG_TD0 0x40007960\r
-#define CYREG_PHUB_TDMEM44_ORIG_TD1 0x40007964\r
-#define CYDEV_PHUB_TDMEM45_BASE 0x40007968\r
-#define CYDEV_PHUB_TDMEM45_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM45_ORIG_TD0 0x40007968\r
-#define CYREG_PHUB_TDMEM45_ORIG_TD1 0x4000796c\r
-#define CYDEV_PHUB_TDMEM46_BASE 0x40007970\r
-#define CYDEV_PHUB_TDMEM46_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM46_ORIG_TD0 0x40007970\r
-#define CYREG_PHUB_TDMEM46_ORIG_TD1 0x40007974\r
-#define CYDEV_PHUB_TDMEM47_BASE 0x40007978\r
-#define CYDEV_PHUB_TDMEM47_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM47_ORIG_TD0 0x40007978\r
-#define CYREG_PHUB_TDMEM47_ORIG_TD1 0x4000797c\r
-#define CYDEV_PHUB_TDMEM48_BASE 0x40007980\r
-#define CYDEV_PHUB_TDMEM48_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM48_ORIG_TD0 0x40007980\r
-#define CYREG_PHUB_TDMEM48_ORIG_TD1 0x40007984\r
-#define CYDEV_PHUB_TDMEM49_BASE 0x40007988\r
-#define CYDEV_PHUB_TDMEM49_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM49_ORIG_TD0 0x40007988\r
-#define CYREG_PHUB_TDMEM49_ORIG_TD1 0x4000798c\r
-#define CYDEV_PHUB_TDMEM50_BASE 0x40007990\r
-#define CYDEV_PHUB_TDMEM50_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM50_ORIG_TD0 0x40007990\r
-#define CYREG_PHUB_TDMEM50_ORIG_TD1 0x40007994\r
-#define CYDEV_PHUB_TDMEM51_BASE 0x40007998\r
-#define CYDEV_PHUB_TDMEM51_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM51_ORIG_TD0 0x40007998\r
-#define CYREG_PHUB_TDMEM51_ORIG_TD1 0x4000799c\r
-#define CYDEV_PHUB_TDMEM52_BASE 0x400079a0\r
-#define CYDEV_PHUB_TDMEM52_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM52_ORIG_TD0 0x400079a0\r
-#define CYREG_PHUB_TDMEM52_ORIG_TD1 0x400079a4\r
-#define CYDEV_PHUB_TDMEM53_BASE 0x400079a8\r
-#define CYDEV_PHUB_TDMEM53_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM53_ORIG_TD0 0x400079a8\r
-#define CYREG_PHUB_TDMEM53_ORIG_TD1 0x400079ac\r
-#define CYDEV_PHUB_TDMEM54_BASE 0x400079b0\r
-#define CYDEV_PHUB_TDMEM54_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM54_ORIG_TD0 0x400079b0\r
-#define CYREG_PHUB_TDMEM54_ORIG_TD1 0x400079b4\r
-#define CYDEV_PHUB_TDMEM55_BASE 0x400079b8\r
-#define CYDEV_PHUB_TDMEM55_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM55_ORIG_TD0 0x400079b8\r
-#define CYREG_PHUB_TDMEM55_ORIG_TD1 0x400079bc\r
-#define CYDEV_PHUB_TDMEM56_BASE 0x400079c0\r
-#define CYDEV_PHUB_TDMEM56_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM56_ORIG_TD0 0x400079c0\r
-#define CYREG_PHUB_TDMEM56_ORIG_TD1 0x400079c4\r
-#define CYDEV_PHUB_TDMEM57_BASE 0x400079c8\r
-#define CYDEV_PHUB_TDMEM57_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM57_ORIG_TD0 0x400079c8\r
-#define CYREG_PHUB_TDMEM57_ORIG_TD1 0x400079cc\r
-#define CYDEV_PHUB_TDMEM58_BASE 0x400079d0\r
-#define CYDEV_PHUB_TDMEM58_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM58_ORIG_TD0 0x400079d0\r
-#define CYREG_PHUB_TDMEM58_ORIG_TD1 0x400079d4\r
-#define CYDEV_PHUB_TDMEM59_BASE 0x400079d8\r
-#define CYDEV_PHUB_TDMEM59_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM59_ORIG_TD0 0x400079d8\r
-#define CYREG_PHUB_TDMEM59_ORIG_TD1 0x400079dc\r
-#define CYDEV_PHUB_TDMEM60_BASE 0x400079e0\r
-#define CYDEV_PHUB_TDMEM60_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM60_ORIG_TD0 0x400079e0\r
-#define CYREG_PHUB_TDMEM60_ORIG_TD1 0x400079e4\r
-#define CYDEV_PHUB_TDMEM61_BASE 0x400079e8\r
-#define CYDEV_PHUB_TDMEM61_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM61_ORIG_TD0 0x400079e8\r
-#define CYREG_PHUB_TDMEM61_ORIG_TD1 0x400079ec\r
-#define CYDEV_PHUB_TDMEM62_BASE 0x400079f0\r
-#define CYDEV_PHUB_TDMEM62_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM62_ORIG_TD0 0x400079f0\r
-#define CYREG_PHUB_TDMEM62_ORIG_TD1 0x400079f4\r
-#define CYDEV_PHUB_TDMEM63_BASE 0x400079f8\r
-#define CYDEV_PHUB_TDMEM63_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM63_ORIG_TD0 0x400079f8\r
-#define CYREG_PHUB_TDMEM63_ORIG_TD1 0x400079fc\r
-#define CYDEV_PHUB_TDMEM64_BASE 0x40007a00\r
-#define CYDEV_PHUB_TDMEM64_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM64_ORIG_TD0 0x40007a00\r
-#define CYREG_PHUB_TDMEM64_ORIG_TD1 0x40007a04\r
-#define CYDEV_PHUB_TDMEM65_BASE 0x40007a08\r
-#define CYDEV_PHUB_TDMEM65_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM65_ORIG_TD0 0x40007a08\r
-#define CYREG_PHUB_TDMEM65_ORIG_TD1 0x40007a0c\r
-#define CYDEV_PHUB_TDMEM66_BASE 0x40007a10\r
-#define CYDEV_PHUB_TDMEM66_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM66_ORIG_TD0 0x40007a10\r
-#define CYREG_PHUB_TDMEM66_ORIG_TD1 0x40007a14\r
-#define CYDEV_PHUB_TDMEM67_BASE 0x40007a18\r
-#define CYDEV_PHUB_TDMEM67_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM67_ORIG_TD0 0x40007a18\r
-#define CYREG_PHUB_TDMEM67_ORIG_TD1 0x40007a1c\r
-#define CYDEV_PHUB_TDMEM68_BASE 0x40007a20\r
-#define CYDEV_PHUB_TDMEM68_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM68_ORIG_TD0 0x40007a20\r
-#define CYREG_PHUB_TDMEM68_ORIG_TD1 0x40007a24\r
-#define CYDEV_PHUB_TDMEM69_BASE 0x40007a28\r
-#define CYDEV_PHUB_TDMEM69_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM69_ORIG_TD0 0x40007a28\r
-#define CYREG_PHUB_TDMEM69_ORIG_TD1 0x40007a2c\r
-#define CYDEV_PHUB_TDMEM70_BASE 0x40007a30\r
-#define CYDEV_PHUB_TDMEM70_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM70_ORIG_TD0 0x40007a30\r
-#define CYREG_PHUB_TDMEM70_ORIG_TD1 0x40007a34\r
-#define CYDEV_PHUB_TDMEM71_BASE 0x40007a38\r
-#define CYDEV_PHUB_TDMEM71_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM71_ORIG_TD0 0x40007a38\r
-#define CYREG_PHUB_TDMEM71_ORIG_TD1 0x40007a3c\r
-#define CYDEV_PHUB_TDMEM72_BASE 0x40007a40\r
-#define CYDEV_PHUB_TDMEM72_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM72_ORIG_TD0 0x40007a40\r
-#define CYREG_PHUB_TDMEM72_ORIG_TD1 0x40007a44\r
-#define CYDEV_PHUB_TDMEM73_BASE 0x40007a48\r
-#define CYDEV_PHUB_TDMEM73_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM73_ORIG_TD0 0x40007a48\r
-#define CYREG_PHUB_TDMEM73_ORIG_TD1 0x40007a4c\r
-#define CYDEV_PHUB_TDMEM74_BASE 0x40007a50\r
-#define CYDEV_PHUB_TDMEM74_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM74_ORIG_TD0 0x40007a50\r
-#define CYREG_PHUB_TDMEM74_ORIG_TD1 0x40007a54\r
-#define CYDEV_PHUB_TDMEM75_BASE 0x40007a58\r
-#define CYDEV_PHUB_TDMEM75_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM75_ORIG_TD0 0x40007a58\r
-#define CYREG_PHUB_TDMEM75_ORIG_TD1 0x40007a5c\r
-#define CYDEV_PHUB_TDMEM76_BASE 0x40007a60\r
-#define CYDEV_PHUB_TDMEM76_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM76_ORIG_TD0 0x40007a60\r
-#define CYREG_PHUB_TDMEM76_ORIG_TD1 0x40007a64\r
-#define CYDEV_PHUB_TDMEM77_BASE 0x40007a68\r
-#define CYDEV_PHUB_TDMEM77_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM77_ORIG_TD0 0x40007a68\r
-#define CYREG_PHUB_TDMEM77_ORIG_TD1 0x40007a6c\r
-#define CYDEV_PHUB_TDMEM78_BASE 0x40007a70\r
-#define CYDEV_PHUB_TDMEM78_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM78_ORIG_TD0 0x40007a70\r
-#define CYREG_PHUB_TDMEM78_ORIG_TD1 0x40007a74\r
-#define CYDEV_PHUB_TDMEM79_BASE 0x40007a78\r
-#define CYDEV_PHUB_TDMEM79_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM79_ORIG_TD0 0x40007a78\r
-#define CYREG_PHUB_TDMEM79_ORIG_TD1 0x40007a7c\r
-#define CYDEV_PHUB_TDMEM80_BASE 0x40007a80\r
-#define CYDEV_PHUB_TDMEM80_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM80_ORIG_TD0 0x40007a80\r
-#define CYREG_PHUB_TDMEM80_ORIG_TD1 0x40007a84\r
-#define CYDEV_PHUB_TDMEM81_BASE 0x40007a88\r
-#define CYDEV_PHUB_TDMEM81_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM81_ORIG_TD0 0x40007a88\r
-#define CYREG_PHUB_TDMEM81_ORIG_TD1 0x40007a8c\r
-#define CYDEV_PHUB_TDMEM82_BASE 0x40007a90\r
-#define CYDEV_PHUB_TDMEM82_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM82_ORIG_TD0 0x40007a90\r
-#define CYREG_PHUB_TDMEM82_ORIG_TD1 0x40007a94\r
-#define CYDEV_PHUB_TDMEM83_BASE 0x40007a98\r
-#define CYDEV_PHUB_TDMEM83_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM83_ORIG_TD0 0x40007a98\r
-#define CYREG_PHUB_TDMEM83_ORIG_TD1 0x40007a9c\r
-#define CYDEV_PHUB_TDMEM84_BASE 0x40007aa0\r
-#define CYDEV_PHUB_TDMEM84_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM84_ORIG_TD0 0x40007aa0\r
-#define CYREG_PHUB_TDMEM84_ORIG_TD1 0x40007aa4\r
-#define CYDEV_PHUB_TDMEM85_BASE 0x40007aa8\r
-#define CYDEV_PHUB_TDMEM85_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM85_ORIG_TD0 0x40007aa8\r
-#define CYREG_PHUB_TDMEM85_ORIG_TD1 0x40007aac\r
-#define CYDEV_PHUB_TDMEM86_BASE 0x40007ab0\r
-#define CYDEV_PHUB_TDMEM86_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM86_ORIG_TD0 0x40007ab0\r
-#define CYREG_PHUB_TDMEM86_ORIG_TD1 0x40007ab4\r
-#define CYDEV_PHUB_TDMEM87_BASE 0x40007ab8\r
-#define CYDEV_PHUB_TDMEM87_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM87_ORIG_TD0 0x40007ab8\r
-#define CYREG_PHUB_TDMEM87_ORIG_TD1 0x40007abc\r
-#define CYDEV_PHUB_TDMEM88_BASE 0x40007ac0\r
-#define CYDEV_PHUB_TDMEM88_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM88_ORIG_TD0 0x40007ac0\r
-#define CYREG_PHUB_TDMEM88_ORIG_TD1 0x40007ac4\r
-#define CYDEV_PHUB_TDMEM89_BASE 0x40007ac8\r
-#define CYDEV_PHUB_TDMEM89_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM89_ORIG_TD0 0x40007ac8\r
-#define CYREG_PHUB_TDMEM89_ORIG_TD1 0x40007acc\r
-#define CYDEV_PHUB_TDMEM90_BASE 0x40007ad0\r
-#define CYDEV_PHUB_TDMEM90_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM90_ORIG_TD0 0x40007ad0\r
-#define CYREG_PHUB_TDMEM90_ORIG_TD1 0x40007ad4\r
-#define CYDEV_PHUB_TDMEM91_BASE 0x40007ad8\r
-#define CYDEV_PHUB_TDMEM91_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM91_ORIG_TD0 0x40007ad8\r
-#define CYREG_PHUB_TDMEM91_ORIG_TD1 0x40007adc\r
-#define CYDEV_PHUB_TDMEM92_BASE 0x40007ae0\r
-#define CYDEV_PHUB_TDMEM92_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM92_ORIG_TD0 0x40007ae0\r
-#define CYREG_PHUB_TDMEM92_ORIG_TD1 0x40007ae4\r
-#define CYDEV_PHUB_TDMEM93_BASE 0x40007ae8\r
-#define CYDEV_PHUB_TDMEM93_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM93_ORIG_TD0 0x40007ae8\r
-#define CYREG_PHUB_TDMEM93_ORIG_TD1 0x40007aec\r
-#define CYDEV_PHUB_TDMEM94_BASE 0x40007af0\r
-#define CYDEV_PHUB_TDMEM94_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM94_ORIG_TD0 0x40007af0\r
-#define CYREG_PHUB_TDMEM94_ORIG_TD1 0x40007af4\r
-#define CYDEV_PHUB_TDMEM95_BASE 0x40007af8\r
-#define CYDEV_PHUB_TDMEM95_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM95_ORIG_TD0 0x40007af8\r
-#define CYREG_PHUB_TDMEM95_ORIG_TD1 0x40007afc\r
-#define CYDEV_PHUB_TDMEM96_BASE 0x40007b00\r
-#define CYDEV_PHUB_TDMEM96_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM96_ORIG_TD0 0x40007b00\r
-#define CYREG_PHUB_TDMEM96_ORIG_TD1 0x40007b04\r
-#define CYDEV_PHUB_TDMEM97_BASE 0x40007b08\r
-#define CYDEV_PHUB_TDMEM97_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM97_ORIG_TD0 0x40007b08\r
-#define CYREG_PHUB_TDMEM97_ORIG_TD1 0x40007b0c\r
-#define CYDEV_PHUB_TDMEM98_BASE 0x40007b10\r
-#define CYDEV_PHUB_TDMEM98_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM98_ORIG_TD0 0x40007b10\r
-#define CYREG_PHUB_TDMEM98_ORIG_TD1 0x40007b14\r
-#define CYDEV_PHUB_TDMEM99_BASE 0x40007b18\r
-#define CYDEV_PHUB_TDMEM99_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM99_ORIG_TD0 0x40007b18\r
-#define CYREG_PHUB_TDMEM99_ORIG_TD1 0x40007b1c\r
-#define CYDEV_PHUB_TDMEM100_BASE 0x40007b20\r
-#define CYDEV_PHUB_TDMEM100_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM100_ORIG_TD0 0x40007b20\r
-#define CYREG_PHUB_TDMEM100_ORIG_TD1 0x40007b24\r
-#define CYDEV_PHUB_TDMEM101_BASE 0x40007b28\r
-#define CYDEV_PHUB_TDMEM101_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM101_ORIG_TD0 0x40007b28\r
-#define CYREG_PHUB_TDMEM101_ORIG_TD1 0x40007b2c\r
-#define CYDEV_PHUB_TDMEM102_BASE 0x40007b30\r
-#define CYDEV_PHUB_TDMEM102_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM102_ORIG_TD0 0x40007b30\r
-#define CYREG_PHUB_TDMEM102_ORIG_TD1 0x40007b34\r
-#define CYDEV_PHUB_TDMEM103_BASE 0x40007b38\r
-#define CYDEV_PHUB_TDMEM103_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM103_ORIG_TD0 0x40007b38\r
-#define CYREG_PHUB_TDMEM103_ORIG_TD1 0x40007b3c\r
-#define CYDEV_PHUB_TDMEM104_BASE 0x40007b40\r
-#define CYDEV_PHUB_TDMEM104_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM104_ORIG_TD0 0x40007b40\r
-#define CYREG_PHUB_TDMEM104_ORIG_TD1 0x40007b44\r
-#define CYDEV_PHUB_TDMEM105_BASE 0x40007b48\r
-#define CYDEV_PHUB_TDMEM105_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM105_ORIG_TD0 0x40007b48\r
-#define CYREG_PHUB_TDMEM105_ORIG_TD1 0x40007b4c\r
-#define CYDEV_PHUB_TDMEM106_BASE 0x40007b50\r
-#define CYDEV_PHUB_TDMEM106_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM106_ORIG_TD0 0x40007b50\r
-#define CYREG_PHUB_TDMEM106_ORIG_TD1 0x40007b54\r
-#define CYDEV_PHUB_TDMEM107_BASE 0x40007b58\r
-#define CYDEV_PHUB_TDMEM107_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM107_ORIG_TD0 0x40007b58\r
-#define CYREG_PHUB_TDMEM107_ORIG_TD1 0x40007b5c\r
-#define CYDEV_PHUB_TDMEM108_BASE 0x40007b60\r
-#define CYDEV_PHUB_TDMEM108_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM108_ORIG_TD0 0x40007b60\r
-#define CYREG_PHUB_TDMEM108_ORIG_TD1 0x40007b64\r
-#define CYDEV_PHUB_TDMEM109_BASE 0x40007b68\r
-#define CYDEV_PHUB_TDMEM109_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM109_ORIG_TD0 0x40007b68\r
-#define CYREG_PHUB_TDMEM109_ORIG_TD1 0x40007b6c\r
-#define CYDEV_PHUB_TDMEM110_BASE 0x40007b70\r
-#define CYDEV_PHUB_TDMEM110_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM110_ORIG_TD0 0x40007b70\r
-#define CYREG_PHUB_TDMEM110_ORIG_TD1 0x40007b74\r
-#define CYDEV_PHUB_TDMEM111_BASE 0x40007b78\r
-#define CYDEV_PHUB_TDMEM111_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM111_ORIG_TD0 0x40007b78\r
-#define CYREG_PHUB_TDMEM111_ORIG_TD1 0x40007b7c\r
-#define CYDEV_PHUB_TDMEM112_BASE 0x40007b80\r
-#define CYDEV_PHUB_TDMEM112_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM112_ORIG_TD0 0x40007b80\r
-#define CYREG_PHUB_TDMEM112_ORIG_TD1 0x40007b84\r
-#define CYDEV_PHUB_TDMEM113_BASE 0x40007b88\r
-#define CYDEV_PHUB_TDMEM113_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM113_ORIG_TD0 0x40007b88\r
-#define CYREG_PHUB_TDMEM113_ORIG_TD1 0x40007b8c\r
-#define CYDEV_PHUB_TDMEM114_BASE 0x40007b90\r
-#define CYDEV_PHUB_TDMEM114_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM114_ORIG_TD0 0x40007b90\r
-#define CYREG_PHUB_TDMEM114_ORIG_TD1 0x40007b94\r
-#define CYDEV_PHUB_TDMEM115_BASE 0x40007b98\r
-#define CYDEV_PHUB_TDMEM115_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM115_ORIG_TD0 0x40007b98\r
-#define CYREG_PHUB_TDMEM115_ORIG_TD1 0x40007b9c\r
-#define CYDEV_PHUB_TDMEM116_BASE 0x40007ba0\r
-#define CYDEV_PHUB_TDMEM116_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM116_ORIG_TD0 0x40007ba0\r
-#define CYREG_PHUB_TDMEM116_ORIG_TD1 0x40007ba4\r
-#define CYDEV_PHUB_TDMEM117_BASE 0x40007ba8\r
-#define CYDEV_PHUB_TDMEM117_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM117_ORIG_TD0 0x40007ba8\r
-#define CYREG_PHUB_TDMEM117_ORIG_TD1 0x40007bac\r
-#define CYDEV_PHUB_TDMEM118_BASE 0x40007bb0\r
-#define CYDEV_PHUB_TDMEM118_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM118_ORIG_TD0 0x40007bb0\r
-#define CYREG_PHUB_TDMEM118_ORIG_TD1 0x40007bb4\r
-#define CYDEV_PHUB_TDMEM119_BASE 0x40007bb8\r
-#define CYDEV_PHUB_TDMEM119_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM119_ORIG_TD0 0x40007bb8\r
-#define CYREG_PHUB_TDMEM119_ORIG_TD1 0x40007bbc\r
-#define CYDEV_PHUB_TDMEM120_BASE 0x40007bc0\r
-#define CYDEV_PHUB_TDMEM120_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM120_ORIG_TD0 0x40007bc0\r
-#define CYREG_PHUB_TDMEM120_ORIG_TD1 0x40007bc4\r
-#define CYDEV_PHUB_TDMEM121_BASE 0x40007bc8\r
-#define CYDEV_PHUB_TDMEM121_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM121_ORIG_TD0 0x40007bc8\r
-#define CYREG_PHUB_TDMEM121_ORIG_TD1 0x40007bcc\r
-#define CYDEV_PHUB_TDMEM122_BASE 0x40007bd0\r
-#define CYDEV_PHUB_TDMEM122_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM122_ORIG_TD0 0x40007bd0\r
-#define CYREG_PHUB_TDMEM122_ORIG_TD1 0x40007bd4\r
-#define CYDEV_PHUB_TDMEM123_BASE 0x40007bd8\r
-#define CYDEV_PHUB_TDMEM123_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM123_ORIG_TD0 0x40007bd8\r
-#define CYREG_PHUB_TDMEM123_ORIG_TD1 0x40007bdc\r
-#define CYDEV_PHUB_TDMEM124_BASE 0x40007be0\r
-#define CYDEV_PHUB_TDMEM124_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM124_ORIG_TD0 0x40007be0\r
-#define CYREG_PHUB_TDMEM124_ORIG_TD1 0x40007be4\r
-#define CYDEV_PHUB_TDMEM125_BASE 0x40007be8\r
-#define CYDEV_PHUB_TDMEM125_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM125_ORIG_TD0 0x40007be8\r
-#define CYREG_PHUB_TDMEM125_ORIG_TD1 0x40007bec\r
-#define CYDEV_PHUB_TDMEM126_BASE 0x40007bf0\r
-#define CYDEV_PHUB_TDMEM126_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM126_ORIG_TD0 0x40007bf0\r
-#define CYREG_PHUB_TDMEM126_ORIG_TD1 0x40007bf4\r
-#define CYDEV_PHUB_TDMEM127_BASE 0x40007bf8\r
-#define CYDEV_PHUB_TDMEM127_SIZE 0x00000008\r
-#define CYREG_PHUB_TDMEM127_ORIG_TD0 0x40007bf8\r
-#define CYREG_PHUB_TDMEM127_ORIG_TD1 0x40007bfc\r
-#define CYDEV_EE_BASE 0x40008000\r
-#define CYDEV_EE_SIZE 0x00000800\r
-#define CYREG_EE_DATA_MBASE 0x40008000\r
-#define CYREG_EE_DATA_MSIZE 0x00000800\r
-#define CYDEV_CAN0_BASE 0x4000a000\r
-#define CYDEV_CAN0_SIZE 0x000002a0\r
-#define CYDEV_CAN0_CSR_BASE 0x4000a000\r
-#define CYDEV_CAN0_CSR_SIZE 0x00000018\r
-#define CYREG_CAN0_CSR_INT_SR 0x4000a000\r
-#define CYREG_CAN0_CSR_INT_EN 0x4000a004\r
-#define CYREG_CAN0_CSR_BUF_SR 0x4000a008\r
-#define CYREG_CAN0_CSR_ERR_SR 0x4000a00c\r
-#define CYREG_CAN0_CSR_CMD 0x4000a010\r
-#define CYREG_CAN0_CSR_CFG 0x4000a014\r
-#define CYDEV_CAN0_TX0_BASE 0x4000a020\r
-#define CYDEV_CAN0_TX0_SIZE 0x00000010\r
-#define CYREG_CAN0_TX0_CMD 0x4000a020\r
-#define CYREG_CAN0_TX0_ID 0x4000a024\r
-#define CYREG_CAN0_TX0_DH 0x4000a028\r
-#define CYREG_CAN0_TX0_DL 0x4000a02c\r
-#define CYDEV_CAN0_TX1_BASE 0x4000a030\r
-#define CYDEV_CAN0_TX1_SIZE 0x00000010\r
-#define CYREG_CAN0_TX1_CMD 0x4000a030\r
-#define CYREG_CAN0_TX1_ID 0x4000a034\r
-#define CYREG_CAN0_TX1_DH 0x4000a038\r
-#define CYREG_CAN0_TX1_DL 0x4000a03c\r
-#define CYDEV_CAN0_TX2_BASE 0x4000a040\r
-#define CYDEV_CAN0_TX2_SIZE 0x00000010\r
-#define CYREG_CAN0_TX2_CMD 0x4000a040\r
-#define CYREG_CAN0_TX2_ID 0x4000a044\r
-#define CYREG_CAN0_TX2_DH 0x4000a048\r
-#define CYREG_CAN0_TX2_DL 0x4000a04c\r
-#define CYDEV_CAN0_TX3_BASE 0x4000a050\r
-#define CYDEV_CAN0_TX3_SIZE 0x00000010\r
-#define CYREG_CAN0_TX3_CMD 0x4000a050\r
-#define CYREG_CAN0_TX3_ID 0x4000a054\r
-#define CYREG_CAN0_TX3_DH 0x4000a058\r
-#define CYREG_CAN0_TX3_DL 0x4000a05c\r
-#define CYDEV_CAN0_TX4_BASE 0x4000a060\r
-#define CYDEV_CAN0_TX4_SIZE 0x00000010\r
-#define CYREG_CAN0_TX4_CMD 0x4000a060\r
-#define CYREG_CAN0_TX4_ID 0x4000a064\r
-#define CYREG_CAN0_TX4_DH 0x4000a068\r
-#define CYREG_CAN0_TX4_DL 0x4000a06c\r
-#define CYDEV_CAN0_TX5_BASE 0x4000a070\r
-#define CYDEV_CAN0_TX5_SIZE 0x00000010\r
-#define CYREG_CAN0_TX5_CMD 0x4000a070\r
-#define CYREG_CAN0_TX5_ID 0x4000a074\r
-#define CYREG_CAN0_TX5_DH 0x4000a078\r
-#define CYREG_CAN0_TX5_DL 0x4000a07c\r
-#define CYDEV_CAN0_TX6_BASE 0x4000a080\r
-#define CYDEV_CAN0_TX6_SIZE 0x00000010\r
-#define CYREG_CAN0_TX6_CMD 0x4000a080\r
-#define CYREG_CAN0_TX6_ID 0x4000a084\r
-#define CYREG_CAN0_TX6_DH 0x4000a088\r
-#define CYREG_CAN0_TX6_DL 0x4000a08c\r
-#define CYDEV_CAN0_TX7_BASE 0x4000a090\r
-#define CYDEV_CAN0_TX7_SIZE 0x00000010\r
-#define CYREG_CAN0_TX7_CMD 0x4000a090\r
-#define CYREG_CAN0_TX7_ID 0x4000a094\r
-#define CYREG_CAN0_TX7_DH 0x4000a098\r
-#define CYREG_CAN0_TX7_DL 0x4000a09c\r
-#define CYDEV_CAN0_RX0_BASE 0x4000a0a0\r
-#define CYDEV_CAN0_RX0_SIZE 0x00000020\r
-#define CYREG_CAN0_RX0_CMD 0x4000a0a0\r
-#define CYREG_CAN0_RX0_ID 0x4000a0a4\r
-#define CYREG_CAN0_RX0_DH 0x4000a0a8\r
-#define CYREG_CAN0_RX0_DL 0x4000a0ac\r
-#define CYREG_CAN0_RX0_AMR 0x4000a0b0\r
-#define CYREG_CAN0_RX0_ACR 0x4000a0b4\r
-#define CYREG_CAN0_RX0_AMRD 0x4000a0b8\r
-#define CYREG_CAN0_RX0_ACRD 0x4000a0bc\r
-#define CYDEV_CAN0_RX1_BASE 0x4000a0c0\r
-#define CYDEV_CAN0_RX1_SIZE 0x00000020\r
-#define CYREG_CAN0_RX1_CMD 0x4000a0c0\r
-#define CYREG_CAN0_RX1_ID 0x4000a0c4\r
-#define CYREG_CAN0_RX1_DH 0x4000a0c8\r
-#define CYREG_CAN0_RX1_DL 0x4000a0cc\r
-#define CYREG_CAN0_RX1_AMR 0x4000a0d0\r
-#define CYREG_CAN0_RX1_ACR 0x4000a0d4\r
-#define CYREG_CAN0_RX1_AMRD 0x4000a0d8\r
-#define CYREG_CAN0_RX1_ACRD 0x4000a0dc\r
-#define CYDEV_CAN0_RX2_BASE 0x4000a0e0\r
-#define CYDEV_CAN0_RX2_SIZE 0x00000020\r
-#define CYREG_CAN0_RX2_CMD 0x4000a0e0\r
-#define CYREG_CAN0_RX2_ID 0x4000a0e4\r
-#define CYREG_CAN0_RX2_DH 0x4000a0e8\r
-#define CYREG_CAN0_RX2_DL 0x4000a0ec\r
-#define CYREG_CAN0_RX2_AMR 0x4000a0f0\r
-#define CYREG_CAN0_RX2_ACR 0x4000a0f4\r
-#define CYREG_CAN0_RX2_AMRD 0x4000a0f8\r
-#define CYREG_CAN0_RX2_ACRD 0x4000a0fc\r
-#define CYDEV_CAN0_RX3_BASE 0x4000a100\r
-#define CYDEV_CAN0_RX3_SIZE 0x00000020\r
-#define CYREG_CAN0_RX3_CMD 0x4000a100\r
-#define CYREG_CAN0_RX3_ID 0x4000a104\r
-#define CYREG_CAN0_RX3_DH 0x4000a108\r
-#define CYREG_CAN0_RX3_DL 0x4000a10c\r
-#define CYREG_CAN0_RX3_AMR 0x4000a110\r
-#define CYREG_CAN0_RX3_ACR 0x4000a114\r
-#define CYREG_CAN0_RX3_AMRD 0x4000a118\r
-#define CYREG_CAN0_RX3_ACRD 0x4000a11c\r
-#define CYDEV_CAN0_RX4_BASE 0x4000a120\r
-#define CYDEV_CAN0_RX4_SIZE 0x00000020\r
-#define CYREG_CAN0_RX4_CMD 0x4000a120\r
-#define CYREG_CAN0_RX4_ID 0x4000a124\r
-#define CYREG_CAN0_RX4_DH 0x4000a128\r
-#define CYREG_CAN0_RX4_DL 0x4000a12c\r
-#define CYREG_CAN0_RX4_AMR 0x4000a130\r
-#define CYREG_CAN0_RX4_ACR 0x4000a134\r
-#define CYREG_CAN0_RX4_AMRD 0x4000a138\r
-#define CYREG_CAN0_RX4_ACRD 0x4000a13c\r
-#define CYDEV_CAN0_RX5_BASE 0x4000a140\r
-#define CYDEV_CAN0_RX5_SIZE 0x00000020\r
-#define CYREG_CAN0_RX5_CMD 0x4000a140\r
-#define CYREG_CAN0_RX5_ID 0x4000a144\r
-#define CYREG_CAN0_RX5_DH 0x4000a148\r
-#define CYREG_CAN0_RX5_DL 0x4000a14c\r
-#define CYREG_CAN0_RX5_AMR 0x4000a150\r
-#define CYREG_CAN0_RX5_ACR 0x4000a154\r
-#define CYREG_CAN0_RX5_AMRD 0x4000a158\r
-#define CYREG_CAN0_RX5_ACRD 0x4000a15c\r
-#define CYDEV_CAN0_RX6_BASE 0x4000a160\r
-#define CYDEV_CAN0_RX6_SIZE 0x00000020\r
-#define CYREG_CAN0_RX6_CMD 0x4000a160\r
-#define CYREG_CAN0_RX6_ID 0x4000a164\r
-#define CYREG_CAN0_RX6_DH 0x4000a168\r
-#define CYREG_CAN0_RX6_DL 0x4000a16c\r
-#define CYREG_CAN0_RX6_AMR 0x4000a170\r
-#define CYREG_CAN0_RX6_ACR 0x4000a174\r
-#define CYREG_CAN0_RX6_AMRD 0x4000a178\r
-#define CYREG_CAN0_RX6_ACRD 0x4000a17c\r
-#define CYDEV_CAN0_RX7_BASE 0x4000a180\r
-#define CYDEV_CAN0_RX7_SIZE 0x00000020\r
-#define CYREG_CAN0_RX7_CMD 0x4000a180\r
-#define CYREG_CAN0_RX7_ID 0x4000a184\r
-#define CYREG_CAN0_RX7_DH 0x4000a188\r
-#define CYREG_CAN0_RX7_DL 0x4000a18c\r
-#define CYREG_CAN0_RX7_AMR 0x4000a190\r
-#define CYREG_CAN0_RX7_ACR 0x4000a194\r
-#define CYREG_CAN0_RX7_AMRD 0x4000a198\r
-#define CYREG_CAN0_RX7_ACRD 0x4000a19c\r
-#define CYDEV_CAN0_RX8_BASE 0x4000a1a0\r
-#define CYDEV_CAN0_RX8_SIZE 0x00000020\r
-#define CYREG_CAN0_RX8_CMD 0x4000a1a0\r
-#define CYREG_CAN0_RX8_ID 0x4000a1a4\r
-#define CYREG_CAN0_RX8_DH 0x4000a1a8\r
-#define CYREG_CAN0_RX8_DL 0x4000a1ac\r
-#define CYREG_CAN0_RX8_AMR 0x4000a1b0\r
-#define CYREG_CAN0_RX8_ACR 0x4000a1b4\r
-#define CYREG_CAN0_RX8_AMRD 0x4000a1b8\r
-#define CYREG_CAN0_RX8_ACRD 0x4000a1bc\r
-#define CYDEV_CAN0_RX9_BASE 0x4000a1c0\r
-#define CYDEV_CAN0_RX9_SIZE 0x00000020\r
-#define CYREG_CAN0_RX9_CMD 0x4000a1c0\r
-#define CYREG_CAN0_RX9_ID 0x4000a1c4\r
-#define CYREG_CAN0_RX9_DH 0x4000a1c8\r
-#define CYREG_CAN0_RX9_DL 0x4000a1cc\r
-#define CYREG_CAN0_RX9_AMR 0x4000a1d0\r
-#define CYREG_CAN0_RX9_ACR 0x4000a1d4\r
-#define CYREG_CAN0_RX9_AMRD 0x4000a1d8\r
-#define CYREG_CAN0_RX9_ACRD 0x4000a1dc\r
-#define CYDEV_CAN0_RX10_BASE 0x4000a1e0\r
-#define CYDEV_CAN0_RX10_SIZE 0x00000020\r
-#define CYREG_CAN0_RX10_CMD 0x4000a1e0\r
-#define CYREG_CAN0_RX10_ID 0x4000a1e4\r
-#define CYREG_CAN0_RX10_DH 0x4000a1e8\r
-#define CYREG_CAN0_RX10_DL 0x4000a1ec\r
-#define CYREG_CAN0_RX10_AMR 0x4000a1f0\r
-#define CYREG_CAN0_RX10_ACR 0x4000a1f4\r
-#define CYREG_CAN0_RX10_AMRD 0x4000a1f8\r
-#define CYREG_CAN0_RX10_ACRD 0x4000a1fc\r
-#define CYDEV_CAN0_RX11_BASE 0x4000a200\r
-#define CYDEV_CAN0_RX11_SIZE 0x00000020\r
-#define CYREG_CAN0_RX11_CMD 0x4000a200\r
-#define CYREG_CAN0_RX11_ID 0x4000a204\r
-#define CYREG_CAN0_RX11_DH 0x4000a208\r
-#define CYREG_CAN0_RX11_DL 0x4000a20c\r
-#define CYREG_CAN0_RX11_AMR 0x4000a210\r
-#define CYREG_CAN0_RX11_ACR 0x4000a214\r
-#define CYREG_CAN0_RX11_AMRD 0x4000a218\r
-#define CYREG_CAN0_RX11_ACRD 0x4000a21c\r
-#define CYDEV_CAN0_RX12_BASE 0x4000a220\r
-#define CYDEV_CAN0_RX12_SIZE 0x00000020\r
-#define CYREG_CAN0_RX12_CMD 0x4000a220\r
-#define CYREG_CAN0_RX12_ID 0x4000a224\r
-#define CYREG_CAN0_RX12_DH 0x4000a228\r
-#define CYREG_CAN0_RX12_DL 0x4000a22c\r
-#define CYREG_CAN0_RX12_AMR 0x4000a230\r
-#define CYREG_CAN0_RX12_ACR 0x4000a234\r
-#define CYREG_CAN0_RX12_AMRD 0x4000a238\r
-#define CYREG_CAN0_RX12_ACRD 0x4000a23c\r
-#define CYDEV_CAN0_RX13_BASE 0x4000a240\r
-#define CYDEV_CAN0_RX13_SIZE 0x00000020\r
-#define CYREG_CAN0_RX13_CMD 0x4000a240\r
-#define CYREG_CAN0_RX13_ID 0x4000a244\r
-#define CYREG_CAN0_RX13_DH 0x4000a248\r
-#define CYREG_CAN0_RX13_DL 0x4000a24c\r
-#define CYREG_CAN0_RX13_AMR 0x4000a250\r
-#define CYREG_CAN0_RX13_ACR 0x4000a254\r
-#define CYREG_CAN0_RX13_AMRD 0x4000a258\r
-#define CYREG_CAN0_RX13_ACRD 0x4000a25c\r
-#define CYDEV_CAN0_RX14_BASE 0x4000a260\r
-#define CYDEV_CAN0_RX14_SIZE 0x00000020\r
-#define CYREG_CAN0_RX14_CMD 0x4000a260\r
-#define CYREG_CAN0_RX14_ID 0x4000a264\r
-#define CYREG_CAN0_RX14_DH 0x4000a268\r
-#define CYREG_CAN0_RX14_DL 0x4000a26c\r
-#define CYREG_CAN0_RX14_AMR 0x4000a270\r
-#define CYREG_CAN0_RX14_ACR 0x4000a274\r
-#define CYREG_CAN0_RX14_AMRD 0x4000a278\r
-#define CYREG_CAN0_RX14_ACRD 0x4000a27c\r
-#define CYDEV_CAN0_RX15_BASE 0x4000a280\r
-#define CYDEV_CAN0_RX15_SIZE 0x00000020\r
-#define CYREG_CAN0_RX15_CMD 0x4000a280\r
-#define CYREG_CAN0_RX15_ID 0x4000a284\r
-#define CYREG_CAN0_RX15_DH 0x4000a288\r
-#define CYREG_CAN0_RX15_DL 0x4000a28c\r
-#define CYREG_CAN0_RX15_AMR 0x4000a290\r
-#define CYREG_CAN0_RX15_ACR 0x4000a294\r
-#define CYREG_CAN0_RX15_AMRD 0x4000a298\r
-#define CYREG_CAN0_RX15_ACRD 0x4000a29c\r
-#define CYDEV_DFB0_BASE 0x4000c000\r
-#define CYDEV_DFB0_SIZE 0x000007b5\r
-#define CYDEV_DFB0_DPA_SRAM_BASE 0x4000c000\r
-#define CYDEV_DFB0_DPA_SRAM_SIZE 0x00000200\r
-#define CYREG_DFB0_DPA_SRAM_DATA_MBASE 0x4000c000\r
-#define CYREG_DFB0_DPA_SRAM_DATA_MSIZE 0x00000200\r
-#define CYDEV_DFB0_DPB_SRAM_BASE 0x4000c200\r
-#define CYDEV_DFB0_DPB_SRAM_SIZE 0x00000200\r
-#define CYREG_DFB0_DPB_SRAM_DATA_MBASE 0x4000c200\r
-#define CYREG_DFB0_DPB_SRAM_DATA_MSIZE 0x00000200\r
-#define CYDEV_DFB0_CSA_SRAM_BASE 0x4000c400\r
-#define CYDEV_DFB0_CSA_SRAM_SIZE 0x00000100\r
-#define CYREG_DFB0_CSA_SRAM_DATA_MBASE 0x4000c400\r
-#define CYREG_DFB0_CSA_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_CSB_SRAM_BASE 0x4000c500\r
-#define CYDEV_DFB0_CSB_SRAM_SIZE 0x00000100\r
-#define CYREG_DFB0_CSB_SRAM_DATA_MBASE 0x4000c500\r
-#define CYREG_DFB0_CSB_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_FSM_SRAM_BASE 0x4000c600\r
-#define CYDEV_DFB0_FSM_SRAM_SIZE 0x00000100\r
-#define CYREG_DFB0_FSM_SRAM_DATA_MBASE 0x4000c600\r
-#define CYREG_DFB0_FSM_SRAM_DATA_MSIZE 0x00000100\r
-#define CYDEV_DFB0_ACU_SRAM_BASE 0x4000c700\r
-#define CYDEV_DFB0_ACU_SRAM_SIZE 0x00000040\r
-#define CYREG_DFB0_ACU_SRAM_DATA_MBASE 0x4000c700\r
-#define CYREG_DFB0_ACU_SRAM_DATA_MSIZE 0x00000040\r
-#define CYREG_DFB0_CR 0x4000c780\r
-#define CYREG_DFB0_SR 0x4000c784\r
-#define CYREG_DFB0_RAM_EN 0x4000c788\r
-#define CYREG_DFB0_RAM_DIR 0x4000c78c\r
-#define CYREG_DFB0_SEMA 0x4000c790\r
-#define CYREG_DFB0_DSI_CTRL 0x4000c794\r
-#define CYREG_DFB0_INT_CTRL 0x4000c798\r
-#define CYREG_DFB0_DMA_CTRL 0x4000c79c\r
-#define CYREG_DFB0_STAGEA 0x4000c7a0\r
-#define CYREG_DFB0_STAGEAM 0x4000c7a1\r
-#define CYREG_DFB0_STAGEAH 0x4000c7a2\r
-#define CYREG_DFB0_STAGEB 0x4000c7a4\r
-#define CYREG_DFB0_STAGEBM 0x4000c7a5\r
-#define CYREG_DFB0_STAGEBH 0x4000c7a6\r
-#define CYREG_DFB0_HOLDA 0x4000c7a8\r
-#define CYREG_DFB0_HOLDAM 0x4000c7a9\r
-#define CYREG_DFB0_HOLDAH 0x4000c7aa\r
-#define CYREG_DFB0_HOLDAS 0x4000c7ab\r
-#define CYREG_DFB0_HOLDB 0x4000c7ac\r
-#define CYREG_DFB0_HOLDBM 0x4000c7ad\r
-#define CYREG_DFB0_HOLDBH 0x4000c7ae\r
-#define CYREG_DFB0_HOLDBS 0x4000c7af\r
-#define CYREG_DFB0_COHER 0x4000c7b0\r
-#define CYREG_DFB0_DALIGN 0x4000c7b4\r
-#define CYDEV_UCFG_BASE 0x40010000\r
-#define CYDEV_UCFG_SIZE 0x00005040\r
-#define CYDEV_UCFG_B0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_SIZE 0x00000fef\r
-#define CYDEV_UCFG_B0_P0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_P0_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P0_U0_BASE 0x40010000\r
-#define CYDEV_UCFG_B0_P0_U0_SIZE 0x00000070\r
-#define CYREG_B0_P0_U0_PLD_IT0 0x40010000\r
-#define CYREG_B0_P0_U0_PLD_IT1 0x40010004\r
-#define CYREG_B0_P0_U0_PLD_IT2 0x40010008\r
-#define CYREG_B0_P0_U0_PLD_IT3 0x4001000c\r
-#define CYREG_B0_P0_U0_PLD_IT4 0x40010010\r
-#define CYREG_B0_P0_U0_PLD_IT5 0x40010014\r
-#define CYREG_B0_P0_U0_PLD_IT6 0x40010018\r
-#define CYREG_B0_P0_U0_PLD_IT7 0x4001001c\r
-#define CYREG_B0_P0_U0_PLD_IT8 0x40010020\r
-#define CYREG_B0_P0_U0_PLD_IT9 0x40010024\r
-#define CYREG_B0_P0_U0_PLD_IT10 0x40010028\r
-#define CYREG_B0_P0_U0_PLD_IT11 0x4001002c\r
-#define CYREG_B0_P0_U0_PLD_ORT0 0x40010030\r
-#define CYREG_B0_P0_U0_PLD_ORT1 0x40010032\r
-#define CYREG_B0_P0_U0_PLD_ORT2 0x40010034\r
-#define CYREG_B0_P0_U0_PLD_ORT3 0x40010036\r
-#define CYREG_B0_P0_U0_MC_CFG_CEN_CONST 0x40010038\r
-#define CYREG_B0_P0_U0_MC_CFG_XORFB 0x4001003a\r
-#define CYREG_B0_P0_U0_MC_CFG_SET_RESET 0x4001003c\r
-#define CYREG_B0_P0_U0_MC_CFG_BYPASS 0x4001003e\r
-#define CYREG_B0_P0_U0_CFG0 0x40010040\r
-#define CYREG_B0_P0_U0_CFG1 0x40010041\r
-#define CYREG_B0_P0_U0_CFG2 0x40010042\r
-#define CYREG_B0_P0_U0_CFG3 0x40010043\r
-#define CYREG_B0_P0_U0_CFG4 0x40010044\r
-#define CYREG_B0_P0_U0_CFG5 0x40010045\r
-#define CYREG_B0_P0_U0_CFG6 0x40010046\r
-#define CYREG_B0_P0_U0_CFG7 0x40010047\r
-#define CYREG_B0_P0_U0_CFG8 0x40010048\r
-#define CYREG_B0_P0_U0_CFG9 0x40010049\r
-#define CYREG_B0_P0_U0_CFG10 0x4001004a\r
-#define CYREG_B0_P0_U0_CFG11 0x4001004b\r
-#define CYREG_B0_P0_U0_CFG12 0x4001004c\r
-#define CYREG_B0_P0_U0_CFG13 0x4001004d\r
-#define CYREG_B0_P0_U0_CFG14 0x4001004e\r
-#define CYREG_B0_P0_U0_CFG15 0x4001004f\r
-#define CYREG_B0_P0_U0_CFG16 0x40010050\r
-#define CYREG_B0_P0_U0_CFG17 0x40010051\r
-#define CYREG_B0_P0_U0_CFG18 0x40010052\r
-#define CYREG_B0_P0_U0_CFG19 0x40010053\r
-#define CYREG_B0_P0_U0_CFG20 0x40010054\r
-#define CYREG_B0_P0_U0_CFG21 0x40010055\r
-#define CYREG_B0_P0_U0_CFG22 0x40010056\r
-#define CYREG_B0_P0_U0_CFG23 0x40010057\r
-#define CYREG_B0_P0_U0_CFG24 0x40010058\r
-#define CYREG_B0_P0_U0_CFG25 0x40010059\r
-#define CYREG_B0_P0_U0_CFG26 0x4001005a\r
-#define CYREG_B0_P0_U0_CFG27 0x4001005b\r
-#define CYREG_B0_P0_U0_CFG28 0x4001005c\r
-#define CYREG_B0_P0_U0_CFG29 0x4001005d\r
-#define CYREG_B0_P0_U0_CFG30 0x4001005e\r
-#define CYREG_B0_P0_U0_CFG31 0x4001005f\r
-#define CYREG_B0_P0_U0_DCFG0 0x40010060\r
-#define CYREG_B0_P0_U0_DCFG1 0x40010062\r
-#define CYREG_B0_P0_U0_DCFG2 0x40010064\r
-#define CYREG_B0_P0_U0_DCFG3 0x40010066\r
-#define CYREG_B0_P0_U0_DCFG4 0x40010068\r
-#define CYREG_B0_P0_U0_DCFG5 0x4001006a\r
-#define CYREG_B0_P0_U0_DCFG6 0x4001006c\r
-#define CYREG_B0_P0_U0_DCFG7 0x4001006e\r
-#define CYDEV_UCFG_B0_P0_U1_BASE 0x40010080\r
-#define CYDEV_UCFG_B0_P0_U1_SIZE 0x00000070\r
-#define CYREG_B0_P0_U1_PLD_IT0 0x40010080\r
-#define CYREG_B0_P0_U1_PLD_IT1 0x40010084\r
-#define CYREG_B0_P0_U1_PLD_IT2 0x40010088\r
-#define CYREG_B0_P0_U1_PLD_IT3 0x4001008c\r
-#define CYREG_B0_P0_U1_PLD_IT4 0x40010090\r
-#define CYREG_B0_P0_U1_PLD_IT5 0x40010094\r
-#define CYREG_B0_P0_U1_PLD_IT6 0x40010098\r
-#define CYREG_B0_P0_U1_PLD_IT7 0x4001009c\r
-#define CYREG_B0_P0_U1_PLD_IT8 0x400100a0\r
-#define CYREG_B0_P0_U1_PLD_IT9 0x400100a4\r
-#define CYREG_B0_P0_U1_PLD_IT10 0x400100a8\r
-#define CYREG_B0_P0_U1_PLD_IT11 0x400100ac\r
-#define CYREG_B0_P0_U1_PLD_ORT0 0x400100b0\r
-#define CYREG_B0_P0_U1_PLD_ORT1 0x400100b2\r
-#define CYREG_B0_P0_U1_PLD_ORT2 0x400100b4\r
-#define CYREG_B0_P0_U1_PLD_ORT3 0x400100b6\r
-#define CYREG_B0_P0_U1_MC_CFG_CEN_CONST 0x400100b8\r
-#define CYREG_B0_P0_U1_MC_CFG_XORFB 0x400100ba\r
-#define CYREG_B0_P0_U1_MC_CFG_SET_RESET 0x400100bc\r
-#define CYREG_B0_P0_U1_MC_CFG_BYPASS 0x400100be\r
-#define CYREG_B0_P0_U1_CFG0 0x400100c0\r
-#define CYREG_B0_P0_U1_CFG1 0x400100c1\r
-#define CYREG_B0_P0_U1_CFG2 0x400100c2\r
-#define CYREG_B0_P0_U1_CFG3 0x400100c3\r
-#define CYREG_B0_P0_U1_CFG4 0x400100c4\r
-#define CYREG_B0_P0_U1_CFG5 0x400100c5\r
-#define CYREG_B0_P0_U1_CFG6 0x400100c6\r
-#define CYREG_B0_P0_U1_CFG7 0x400100c7\r
-#define CYREG_B0_P0_U1_CFG8 0x400100c8\r
-#define CYREG_B0_P0_U1_CFG9 0x400100c9\r
-#define CYREG_B0_P0_U1_CFG10 0x400100ca\r
-#define CYREG_B0_P0_U1_CFG11 0x400100cb\r
-#define CYREG_B0_P0_U1_CFG12 0x400100cc\r
-#define CYREG_B0_P0_U1_CFG13 0x400100cd\r
-#define CYREG_B0_P0_U1_CFG14 0x400100ce\r
-#define CYREG_B0_P0_U1_CFG15 0x400100cf\r
-#define CYREG_B0_P0_U1_CFG16 0x400100d0\r
-#define CYREG_B0_P0_U1_CFG17 0x400100d1\r
-#define CYREG_B0_P0_U1_CFG18 0x400100d2\r
-#define CYREG_B0_P0_U1_CFG19 0x400100d3\r
-#define CYREG_B0_P0_U1_CFG20 0x400100d4\r
-#define CYREG_B0_P0_U1_CFG21 0x400100d5\r
-#define CYREG_B0_P0_U1_CFG22 0x400100d6\r
-#define CYREG_B0_P0_U1_CFG23 0x400100d7\r
-#define CYREG_B0_P0_U1_CFG24 0x400100d8\r
-#define CYREG_B0_P0_U1_CFG25 0x400100d9\r
-#define CYREG_B0_P0_U1_CFG26 0x400100da\r
-#define CYREG_B0_P0_U1_CFG27 0x400100db\r
-#define CYREG_B0_P0_U1_CFG28 0x400100dc\r
-#define CYREG_B0_P0_U1_CFG29 0x400100dd\r
-#define CYREG_B0_P0_U1_CFG30 0x400100de\r
-#define CYREG_B0_P0_U1_CFG31 0x400100df\r
-#define CYREG_B0_P0_U1_DCFG0 0x400100e0\r
-#define CYREG_B0_P0_U1_DCFG1 0x400100e2\r
-#define CYREG_B0_P0_U1_DCFG2 0x400100e4\r
-#define CYREG_B0_P0_U1_DCFG3 0x400100e6\r
-#define CYREG_B0_P0_U1_DCFG4 0x400100e8\r
-#define CYREG_B0_P0_U1_DCFG5 0x400100ea\r
-#define CYREG_B0_P0_U1_DCFG6 0x400100ec\r
-#define CYREG_B0_P0_U1_DCFG7 0x400100ee\r
-#define CYDEV_UCFG_B0_P0_ROUTE_BASE 0x40010100\r
-#define CYDEV_UCFG_B0_P0_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P1_BASE 0x40010200\r
-#define CYDEV_UCFG_B0_P1_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P1_U0_BASE 0x40010200\r
-#define CYDEV_UCFG_B0_P1_U0_SIZE 0x00000070\r
-#define CYREG_B0_P1_U0_PLD_IT0 0x40010200\r
-#define CYREG_B0_P1_U0_PLD_IT1 0x40010204\r
-#define CYREG_B0_P1_U0_PLD_IT2 0x40010208\r
-#define CYREG_B0_P1_U0_PLD_IT3 0x4001020c\r
-#define CYREG_B0_P1_U0_PLD_IT4 0x40010210\r
-#define CYREG_B0_P1_U0_PLD_IT5 0x40010214\r
-#define CYREG_B0_P1_U0_PLD_IT6 0x40010218\r
-#define CYREG_B0_P1_U0_PLD_IT7 0x4001021c\r
-#define CYREG_B0_P1_U0_PLD_IT8 0x40010220\r
-#define CYREG_B0_P1_U0_PLD_IT9 0x40010224\r
-#define CYREG_B0_P1_U0_PLD_IT10 0x40010228\r
-#define CYREG_B0_P1_U0_PLD_IT11 0x4001022c\r
-#define CYREG_B0_P1_U0_PLD_ORT0 0x40010230\r
-#define CYREG_B0_P1_U0_PLD_ORT1 0x40010232\r
-#define CYREG_B0_P1_U0_PLD_ORT2 0x40010234\r
-#define CYREG_B0_P1_U0_PLD_ORT3 0x40010236\r
-#define CYREG_B0_P1_U0_MC_CFG_CEN_CONST 0x40010238\r
-#define CYREG_B0_P1_U0_MC_CFG_XORFB 0x4001023a\r
-#define CYREG_B0_P1_U0_MC_CFG_SET_RESET 0x4001023c\r
-#define CYREG_B0_P1_U0_MC_CFG_BYPASS 0x4001023e\r
-#define CYREG_B0_P1_U0_CFG0 0x40010240\r
-#define CYREG_B0_P1_U0_CFG1 0x40010241\r
-#define CYREG_B0_P1_U0_CFG2 0x40010242\r
-#define CYREG_B0_P1_U0_CFG3 0x40010243\r
-#define CYREG_B0_P1_U0_CFG4 0x40010244\r
-#define CYREG_B0_P1_U0_CFG5 0x40010245\r
-#define CYREG_B0_P1_U0_CFG6 0x40010246\r
-#define CYREG_B0_P1_U0_CFG7 0x40010247\r
-#define CYREG_B0_P1_U0_CFG8 0x40010248\r
-#define CYREG_B0_P1_U0_CFG9 0x40010249\r
-#define CYREG_B0_P1_U0_CFG10 0x4001024a\r
-#define CYREG_B0_P1_U0_CFG11 0x4001024b\r
-#define CYREG_B0_P1_U0_CFG12 0x4001024c\r
-#define CYREG_B0_P1_U0_CFG13 0x4001024d\r
-#define CYREG_B0_P1_U0_CFG14 0x4001024e\r
-#define CYREG_B0_P1_U0_CFG15 0x4001024f\r
-#define CYREG_B0_P1_U0_CFG16 0x40010250\r
-#define CYREG_B0_P1_U0_CFG17 0x40010251\r
-#define CYREG_B0_P1_U0_CFG18 0x40010252\r
-#define CYREG_B0_P1_U0_CFG19 0x40010253\r
-#define CYREG_B0_P1_U0_CFG20 0x40010254\r
-#define CYREG_B0_P1_U0_CFG21 0x40010255\r
-#define CYREG_B0_P1_U0_CFG22 0x40010256\r
-#define CYREG_B0_P1_U0_CFG23 0x40010257\r
-#define CYREG_B0_P1_U0_CFG24 0x40010258\r
-#define CYREG_B0_P1_U0_CFG25 0x40010259\r
-#define CYREG_B0_P1_U0_CFG26 0x4001025a\r
-#define CYREG_B0_P1_U0_CFG27 0x4001025b\r
-#define CYREG_B0_P1_U0_CFG28 0x4001025c\r
-#define CYREG_B0_P1_U0_CFG29 0x4001025d\r
-#define CYREG_B0_P1_U0_CFG30 0x4001025e\r
-#define CYREG_B0_P1_U0_CFG31 0x4001025f\r
-#define CYREG_B0_P1_U0_DCFG0 0x40010260\r
-#define CYREG_B0_P1_U0_DCFG1 0x40010262\r
-#define CYREG_B0_P1_U0_DCFG2 0x40010264\r
-#define CYREG_B0_P1_U0_DCFG3 0x40010266\r
-#define CYREG_B0_P1_U0_DCFG4 0x40010268\r
-#define CYREG_B0_P1_U0_DCFG5 0x4001026a\r
-#define CYREG_B0_P1_U0_DCFG6 0x4001026c\r
-#define CYREG_B0_P1_U0_DCFG7 0x4001026e\r
-#define CYDEV_UCFG_B0_P1_U1_BASE 0x40010280\r
-#define CYDEV_UCFG_B0_P1_U1_SIZE 0x00000070\r
-#define CYREG_B0_P1_U1_PLD_IT0 0x40010280\r
-#define CYREG_B0_P1_U1_PLD_IT1 0x40010284\r
-#define CYREG_B0_P1_U1_PLD_IT2 0x40010288\r
-#define CYREG_B0_P1_U1_PLD_IT3 0x4001028c\r
-#define CYREG_B0_P1_U1_PLD_IT4 0x40010290\r
-#define CYREG_B0_P1_U1_PLD_IT5 0x40010294\r
-#define CYREG_B0_P1_U1_PLD_IT6 0x40010298\r
-#define CYREG_B0_P1_U1_PLD_IT7 0x4001029c\r
-#define CYREG_B0_P1_U1_PLD_IT8 0x400102a0\r
-#define CYREG_B0_P1_U1_PLD_IT9 0x400102a4\r
-#define CYREG_B0_P1_U1_PLD_IT10 0x400102a8\r
-#define CYREG_B0_P1_U1_PLD_IT11 0x400102ac\r
-#define CYREG_B0_P1_U1_PLD_ORT0 0x400102b0\r
-#define CYREG_B0_P1_U1_PLD_ORT1 0x400102b2\r
-#define CYREG_B0_P1_U1_PLD_ORT2 0x400102b4\r
-#define CYREG_B0_P1_U1_PLD_ORT3 0x400102b6\r
-#define CYREG_B0_P1_U1_MC_CFG_CEN_CONST 0x400102b8\r
-#define CYREG_B0_P1_U1_MC_CFG_XORFB 0x400102ba\r
-#define CYREG_B0_P1_U1_MC_CFG_SET_RESET 0x400102bc\r
-#define CYREG_B0_P1_U1_MC_CFG_BYPASS 0x400102be\r
-#define CYREG_B0_P1_U1_CFG0 0x400102c0\r
-#define CYREG_B0_P1_U1_CFG1 0x400102c1\r
-#define CYREG_B0_P1_U1_CFG2 0x400102c2\r
-#define CYREG_B0_P1_U1_CFG3 0x400102c3\r
-#define CYREG_B0_P1_U1_CFG4 0x400102c4\r
-#define CYREG_B0_P1_U1_CFG5 0x400102c5\r
-#define CYREG_B0_P1_U1_CFG6 0x400102c6\r
-#define CYREG_B0_P1_U1_CFG7 0x400102c7\r
-#define CYREG_B0_P1_U1_CFG8 0x400102c8\r
-#define CYREG_B0_P1_U1_CFG9 0x400102c9\r
-#define CYREG_B0_P1_U1_CFG10 0x400102ca\r
-#define CYREG_B0_P1_U1_CFG11 0x400102cb\r
-#define CYREG_B0_P1_U1_CFG12 0x400102cc\r
-#define CYREG_B0_P1_U1_CFG13 0x400102cd\r
-#define CYREG_B0_P1_U1_CFG14 0x400102ce\r
-#define CYREG_B0_P1_U1_CFG15 0x400102cf\r
-#define CYREG_B0_P1_U1_CFG16 0x400102d0\r
-#define CYREG_B0_P1_U1_CFG17 0x400102d1\r
-#define CYREG_B0_P1_U1_CFG18 0x400102d2\r
-#define CYREG_B0_P1_U1_CFG19 0x400102d3\r
-#define CYREG_B0_P1_U1_CFG20 0x400102d4\r
-#define CYREG_B0_P1_U1_CFG21 0x400102d5\r
-#define CYREG_B0_P1_U1_CFG22 0x400102d6\r
-#define CYREG_B0_P1_U1_CFG23 0x400102d7\r
-#define CYREG_B0_P1_U1_CFG24 0x400102d8\r
-#define CYREG_B0_P1_U1_CFG25 0x400102d9\r
-#define CYREG_B0_P1_U1_CFG26 0x400102da\r
-#define CYREG_B0_P1_U1_CFG27 0x400102db\r
-#define CYREG_B0_P1_U1_CFG28 0x400102dc\r
-#define CYREG_B0_P1_U1_CFG29 0x400102dd\r
-#define CYREG_B0_P1_U1_CFG30 0x400102de\r
-#define CYREG_B0_P1_U1_CFG31 0x400102df\r
-#define CYREG_B0_P1_U1_DCFG0 0x400102e0\r
-#define CYREG_B0_P1_U1_DCFG1 0x400102e2\r
-#define CYREG_B0_P1_U1_DCFG2 0x400102e4\r
-#define CYREG_B0_P1_U1_DCFG3 0x400102e6\r
-#define CYREG_B0_P1_U1_DCFG4 0x400102e8\r
-#define CYREG_B0_P1_U1_DCFG5 0x400102ea\r
-#define CYREG_B0_P1_U1_DCFG6 0x400102ec\r
-#define CYREG_B0_P1_U1_DCFG7 0x400102ee\r
-#define CYDEV_UCFG_B0_P1_ROUTE_BASE 0x40010300\r
-#define CYDEV_UCFG_B0_P1_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P2_BASE 0x40010400\r
-#define CYDEV_UCFG_B0_P2_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P2_U0_BASE 0x40010400\r
-#define CYDEV_UCFG_B0_P2_U0_SIZE 0x00000070\r
-#define CYREG_B0_P2_U0_PLD_IT0 0x40010400\r
-#define CYREG_B0_P2_U0_PLD_IT1 0x40010404\r
-#define CYREG_B0_P2_U0_PLD_IT2 0x40010408\r
-#define CYREG_B0_P2_U0_PLD_IT3 0x4001040c\r
-#define CYREG_B0_P2_U0_PLD_IT4 0x40010410\r
-#define CYREG_B0_P2_U0_PLD_IT5 0x40010414\r
-#define CYREG_B0_P2_U0_PLD_IT6 0x40010418\r
-#define CYREG_B0_P2_U0_PLD_IT7 0x4001041c\r
-#define CYREG_B0_P2_U0_PLD_IT8 0x40010420\r
-#define CYREG_B0_P2_U0_PLD_IT9 0x40010424\r
-#define CYREG_B0_P2_U0_PLD_IT10 0x40010428\r
-#define CYREG_B0_P2_U0_PLD_IT11 0x4001042c\r
-#define CYREG_B0_P2_U0_PLD_ORT0 0x40010430\r
-#define CYREG_B0_P2_U0_PLD_ORT1 0x40010432\r
-#define CYREG_B0_P2_U0_PLD_ORT2 0x40010434\r
-#define CYREG_B0_P2_U0_PLD_ORT3 0x40010436\r
-#define CYREG_B0_P2_U0_MC_CFG_CEN_CONST 0x40010438\r
-#define CYREG_B0_P2_U0_MC_CFG_XORFB 0x4001043a\r
-#define CYREG_B0_P2_U0_MC_CFG_SET_RESET 0x4001043c\r
-#define CYREG_B0_P2_U0_MC_CFG_BYPASS 0x4001043e\r
-#define CYREG_B0_P2_U0_CFG0 0x40010440\r
-#define CYREG_B0_P2_U0_CFG1 0x40010441\r
-#define CYREG_B0_P2_U0_CFG2 0x40010442\r
-#define CYREG_B0_P2_U0_CFG3 0x40010443\r
-#define CYREG_B0_P2_U0_CFG4 0x40010444\r
-#define CYREG_B0_P2_U0_CFG5 0x40010445\r
-#define CYREG_B0_P2_U0_CFG6 0x40010446\r
-#define CYREG_B0_P2_U0_CFG7 0x40010447\r
-#define CYREG_B0_P2_U0_CFG8 0x40010448\r
-#define CYREG_B0_P2_U0_CFG9 0x40010449\r
-#define CYREG_B0_P2_U0_CFG10 0x4001044a\r
-#define CYREG_B0_P2_U0_CFG11 0x4001044b\r
-#define CYREG_B0_P2_U0_CFG12 0x4001044c\r
-#define CYREG_B0_P2_U0_CFG13 0x4001044d\r
-#define CYREG_B0_P2_U0_CFG14 0x4001044e\r
-#define CYREG_B0_P2_U0_CFG15 0x4001044f\r
-#define CYREG_B0_P2_U0_CFG16 0x40010450\r
-#define CYREG_B0_P2_U0_CFG17 0x40010451\r
-#define CYREG_B0_P2_U0_CFG18 0x40010452\r
-#define CYREG_B0_P2_U0_CFG19 0x40010453\r
-#define CYREG_B0_P2_U0_CFG20 0x40010454\r
-#define CYREG_B0_P2_U0_CFG21 0x40010455\r
-#define CYREG_B0_P2_U0_CFG22 0x40010456\r
-#define CYREG_B0_P2_U0_CFG23 0x40010457\r
-#define CYREG_B0_P2_U0_CFG24 0x40010458\r
-#define CYREG_B0_P2_U0_CFG25 0x40010459\r
-#define CYREG_B0_P2_U0_CFG26 0x4001045a\r
-#define CYREG_B0_P2_U0_CFG27 0x4001045b\r
-#define CYREG_B0_P2_U0_CFG28 0x4001045c\r
-#define CYREG_B0_P2_U0_CFG29 0x4001045d\r
-#define CYREG_B0_P2_U0_CFG30 0x4001045e\r
-#define CYREG_B0_P2_U0_CFG31 0x4001045f\r
-#define CYREG_B0_P2_U0_DCFG0 0x40010460\r
-#define CYREG_B0_P2_U0_DCFG1 0x40010462\r
-#define CYREG_B0_P2_U0_DCFG2 0x40010464\r
-#define CYREG_B0_P2_U0_DCFG3 0x40010466\r
-#define CYREG_B0_P2_U0_DCFG4 0x40010468\r
-#define CYREG_B0_P2_U0_DCFG5 0x4001046a\r
-#define CYREG_B0_P2_U0_DCFG6 0x4001046c\r
-#define CYREG_B0_P2_U0_DCFG7 0x4001046e\r
-#define CYDEV_UCFG_B0_P2_U1_BASE 0x40010480\r
-#define CYDEV_UCFG_B0_P2_U1_SIZE 0x00000070\r
-#define CYREG_B0_P2_U1_PLD_IT0 0x40010480\r
-#define CYREG_B0_P2_U1_PLD_IT1 0x40010484\r
-#define CYREG_B0_P2_U1_PLD_IT2 0x40010488\r
-#define CYREG_B0_P2_U1_PLD_IT3 0x4001048c\r
-#define CYREG_B0_P2_U1_PLD_IT4 0x40010490\r
-#define CYREG_B0_P2_U1_PLD_IT5 0x40010494\r
-#define CYREG_B0_P2_U1_PLD_IT6 0x40010498\r
-#define CYREG_B0_P2_U1_PLD_IT7 0x4001049c\r
-#define CYREG_B0_P2_U1_PLD_IT8 0x400104a0\r
-#define CYREG_B0_P2_U1_PLD_IT9 0x400104a4\r
-#define CYREG_B0_P2_U1_PLD_IT10 0x400104a8\r
-#define CYREG_B0_P2_U1_PLD_IT11 0x400104ac\r
-#define CYREG_B0_P2_U1_PLD_ORT0 0x400104b0\r
-#define CYREG_B0_P2_U1_PLD_ORT1 0x400104b2\r
-#define CYREG_B0_P2_U1_PLD_ORT2 0x400104b4\r
-#define CYREG_B0_P2_U1_PLD_ORT3 0x400104b6\r
-#define CYREG_B0_P2_U1_MC_CFG_CEN_CONST 0x400104b8\r
-#define CYREG_B0_P2_U1_MC_CFG_XORFB 0x400104ba\r
-#define CYREG_B0_P2_U1_MC_CFG_SET_RESET 0x400104bc\r
-#define CYREG_B0_P2_U1_MC_CFG_BYPASS 0x400104be\r
-#define CYREG_B0_P2_U1_CFG0 0x400104c0\r
-#define CYREG_B0_P2_U1_CFG1 0x400104c1\r
-#define CYREG_B0_P2_U1_CFG2 0x400104c2\r
-#define CYREG_B0_P2_U1_CFG3 0x400104c3\r
-#define CYREG_B0_P2_U1_CFG4 0x400104c4\r
-#define CYREG_B0_P2_U1_CFG5 0x400104c5\r
-#define CYREG_B0_P2_U1_CFG6 0x400104c6\r
-#define CYREG_B0_P2_U1_CFG7 0x400104c7\r
-#define CYREG_B0_P2_U1_CFG8 0x400104c8\r
-#define CYREG_B0_P2_U1_CFG9 0x400104c9\r
-#define CYREG_B0_P2_U1_CFG10 0x400104ca\r
-#define CYREG_B0_P2_U1_CFG11 0x400104cb\r
-#define CYREG_B0_P2_U1_CFG12 0x400104cc\r
-#define CYREG_B0_P2_U1_CFG13 0x400104cd\r
-#define CYREG_B0_P2_U1_CFG14 0x400104ce\r
-#define CYREG_B0_P2_U1_CFG15 0x400104cf\r
-#define CYREG_B0_P2_U1_CFG16 0x400104d0\r
-#define CYREG_B0_P2_U1_CFG17 0x400104d1\r
-#define CYREG_B0_P2_U1_CFG18 0x400104d2\r
-#define CYREG_B0_P2_U1_CFG19 0x400104d3\r
-#define CYREG_B0_P2_U1_CFG20 0x400104d4\r
-#define CYREG_B0_P2_U1_CFG21 0x400104d5\r
-#define CYREG_B0_P2_U1_CFG22 0x400104d6\r
-#define CYREG_B0_P2_U1_CFG23 0x400104d7\r
-#define CYREG_B0_P2_U1_CFG24 0x400104d8\r
-#define CYREG_B0_P2_U1_CFG25 0x400104d9\r
-#define CYREG_B0_P2_U1_CFG26 0x400104da\r
-#define CYREG_B0_P2_U1_CFG27 0x400104db\r
-#define CYREG_B0_P2_U1_CFG28 0x400104dc\r
-#define CYREG_B0_P2_U1_CFG29 0x400104dd\r
-#define CYREG_B0_P2_U1_CFG30 0x400104de\r
-#define CYREG_B0_P2_U1_CFG31 0x400104df\r
-#define CYREG_B0_P2_U1_DCFG0 0x400104e0\r
-#define CYREG_B0_P2_U1_DCFG1 0x400104e2\r
-#define CYREG_B0_P2_U1_DCFG2 0x400104e4\r
-#define CYREG_B0_P2_U1_DCFG3 0x400104e6\r
-#define CYREG_B0_P2_U1_DCFG4 0x400104e8\r
-#define CYREG_B0_P2_U1_DCFG5 0x400104ea\r
-#define CYREG_B0_P2_U1_DCFG6 0x400104ec\r
-#define CYREG_B0_P2_U1_DCFG7 0x400104ee\r
-#define CYDEV_UCFG_B0_P2_ROUTE_BASE 0x40010500\r
-#define CYDEV_UCFG_B0_P2_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P3_BASE 0x40010600\r
-#define CYDEV_UCFG_B0_P3_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P3_U0_BASE 0x40010600\r
-#define CYDEV_UCFG_B0_P3_U0_SIZE 0x00000070\r
-#define CYREG_B0_P3_U0_PLD_IT0 0x40010600\r
-#define CYREG_B0_P3_U0_PLD_IT1 0x40010604\r
-#define CYREG_B0_P3_U0_PLD_IT2 0x40010608\r
-#define CYREG_B0_P3_U0_PLD_IT3 0x4001060c\r
-#define CYREG_B0_P3_U0_PLD_IT4 0x40010610\r
-#define CYREG_B0_P3_U0_PLD_IT5 0x40010614\r
-#define CYREG_B0_P3_U0_PLD_IT6 0x40010618\r
-#define CYREG_B0_P3_U0_PLD_IT7 0x4001061c\r
-#define CYREG_B0_P3_U0_PLD_IT8 0x40010620\r
-#define CYREG_B0_P3_U0_PLD_IT9 0x40010624\r
-#define CYREG_B0_P3_U0_PLD_IT10 0x40010628\r
-#define CYREG_B0_P3_U0_PLD_IT11 0x4001062c\r
-#define CYREG_B0_P3_U0_PLD_ORT0 0x40010630\r
-#define CYREG_B0_P3_U0_PLD_ORT1 0x40010632\r
-#define CYREG_B0_P3_U0_PLD_ORT2 0x40010634\r
-#define CYREG_B0_P3_U0_PLD_ORT3 0x40010636\r
-#define CYREG_B0_P3_U0_MC_CFG_CEN_CONST 0x40010638\r
-#define CYREG_B0_P3_U0_MC_CFG_XORFB 0x4001063a\r
-#define CYREG_B0_P3_U0_MC_CFG_SET_RESET 0x4001063c\r
-#define CYREG_B0_P3_U0_MC_CFG_BYPASS 0x4001063e\r
-#define CYREG_B0_P3_U0_CFG0 0x40010640\r
-#define CYREG_B0_P3_U0_CFG1 0x40010641\r
-#define CYREG_B0_P3_U0_CFG2 0x40010642\r
-#define CYREG_B0_P3_U0_CFG3 0x40010643\r
-#define CYREG_B0_P3_U0_CFG4 0x40010644\r
-#define CYREG_B0_P3_U0_CFG5 0x40010645\r
-#define CYREG_B0_P3_U0_CFG6 0x40010646\r
-#define CYREG_B0_P3_U0_CFG7 0x40010647\r
-#define CYREG_B0_P3_U0_CFG8 0x40010648\r
-#define CYREG_B0_P3_U0_CFG9 0x40010649\r
-#define CYREG_B0_P3_U0_CFG10 0x4001064a\r
-#define CYREG_B0_P3_U0_CFG11 0x4001064b\r
-#define CYREG_B0_P3_U0_CFG12 0x4001064c\r
-#define CYREG_B0_P3_U0_CFG13 0x4001064d\r
-#define CYREG_B0_P3_U0_CFG14 0x4001064e\r
-#define CYREG_B0_P3_U0_CFG15 0x4001064f\r
-#define CYREG_B0_P3_U0_CFG16 0x40010650\r
-#define CYREG_B0_P3_U0_CFG17 0x40010651\r
-#define CYREG_B0_P3_U0_CFG18 0x40010652\r
-#define CYREG_B0_P3_U0_CFG19 0x40010653\r
-#define CYREG_B0_P3_U0_CFG20 0x40010654\r
-#define CYREG_B0_P3_U0_CFG21 0x40010655\r
-#define CYREG_B0_P3_U0_CFG22 0x40010656\r
-#define CYREG_B0_P3_U0_CFG23 0x40010657\r
-#define CYREG_B0_P3_U0_CFG24 0x40010658\r
-#define CYREG_B0_P3_U0_CFG25 0x40010659\r
-#define CYREG_B0_P3_U0_CFG26 0x4001065a\r
-#define CYREG_B0_P3_U0_CFG27 0x4001065b\r
-#define CYREG_B0_P3_U0_CFG28 0x4001065c\r
-#define CYREG_B0_P3_U0_CFG29 0x4001065d\r
-#define CYREG_B0_P3_U0_CFG30 0x4001065e\r
-#define CYREG_B0_P3_U0_CFG31 0x4001065f\r
-#define CYREG_B0_P3_U0_DCFG0 0x40010660\r
-#define CYREG_B0_P3_U0_DCFG1 0x40010662\r
-#define CYREG_B0_P3_U0_DCFG2 0x40010664\r
-#define CYREG_B0_P3_U0_DCFG3 0x40010666\r
-#define CYREG_B0_P3_U0_DCFG4 0x40010668\r
-#define CYREG_B0_P3_U0_DCFG5 0x4001066a\r
-#define CYREG_B0_P3_U0_DCFG6 0x4001066c\r
-#define CYREG_B0_P3_U0_DCFG7 0x4001066e\r
-#define CYDEV_UCFG_B0_P3_U1_BASE 0x40010680\r
-#define CYDEV_UCFG_B0_P3_U1_SIZE 0x00000070\r
-#define CYREG_B0_P3_U1_PLD_IT0 0x40010680\r
-#define CYREG_B0_P3_U1_PLD_IT1 0x40010684\r
-#define CYREG_B0_P3_U1_PLD_IT2 0x40010688\r
-#define CYREG_B0_P3_U1_PLD_IT3 0x4001068c\r
-#define CYREG_B0_P3_U1_PLD_IT4 0x40010690\r
-#define CYREG_B0_P3_U1_PLD_IT5 0x40010694\r
-#define CYREG_B0_P3_U1_PLD_IT6 0x40010698\r
-#define CYREG_B0_P3_U1_PLD_IT7 0x4001069c\r
-#define CYREG_B0_P3_U1_PLD_IT8 0x400106a0\r
-#define CYREG_B0_P3_U1_PLD_IT9 0x400106a4\r
-#define CYREG_B0_P3_U1_PLD_IT10 0x400106a8\r
-#define CYREG_B0_P3_U1_PLD_IT11 0x400106ac\r
-#define CYREG_B0_P3_U1_PLD_ORT0 0x400106b0\r
-#define CYREG_B0_P3_U1_PLD_ORT1 0x400106b2\r
-#define CYREG_B0_P3_U1_PLD_ORT2 0x400106b4\r
-#define CYREG_B0_P3_U1_PLD_ORT3 0x400106b6\r
-#define CYREG_B0_P3_U1_MC_CFG_CEN_CONST 0x400106b8\r
-#define CYREG_B0_P3_U1_MC_CFG_XORFB 0x400106ba\r
-#define CYREG_B0_P3_U1_MC_CFG_SET_RESET 0x400106bc\r
-#define CYREG_B0_P3_U1_MC_CFG_BYPASS 0x400106be\r
-#define CYREG_B0_P3_U1_CFG0 0x400106c0\r
-#define CYREG_B0_P3_U1_CFG1 0x400106c1\r
-#define CYREG_B0_P3_U1_CFG2 0x400106c2\r
-#define CYREG_B0_P3_U1_CFG3 0x400106c3\r
-#define CYREG_B0_P3_U1_CFG4 0x400106c4\r
-#define CYREG_B0_P3_U1_CFG5 0x400106c5\r
-#define CYREG_B0_P3_U1_CFG6 0x400106c6\r
-#define CYREG_B0_P3_U1_CFG7 0x400106c7\r
-#define CYREG_B0_P3_U1_CFG8 0x400106c8\r
-#define CYREG_B0_P3_U1_CFG9 0x400106c9\r
-#define CYREG_B0_P3_U1_CFG10 0x400106ca\r
-#define CYREG_B0_P3_U1_CFG11 0x400106cb\r
-#define CYREG_B0_P3_U1_CFG12 0x400106cc\r
-#define CYREG_B0_P3_U1_CFG13 0x400106cd\r
-#define CYREG_B0_P3_U1_CFG14 0x400106ce\r
-#define CYREG_B0_P3_U1_CFG15 0x400106cf\r
-#define CYREG_B0_P3_U1_CFG16 0x400106d0\r
-#define CYREG_B0_P3_U1_CFG17 0x400106d1\r
-#define CYREG_B0_P3_U1_CFG18 0x400106d2\r
-#define CYREG_B0_P3_U1_CFG19 0x400106d3\r
-#define CYREG_B0_P3_U1_CFG20 0x400106d4\r
-#define CYREG_B0_P3_U1_CFG21 0x400106d5\r
-#define CYREG_B0_P3_U1_CFG22 0x400106d6\r
-#define CYREG_B0_P3_U1_CFG23 0x400106d7\r
-#define CYREG_B0_P3_U1_CFG24 0x400106d8\r
-#define CYREG_B0_P3_U1_CFG25 0x400106d9\r
-#define CYREG_B0_P3_U1_CFG26 0x400106da\r
-#define CYREG_B0_P3_U1_CFG27 0x400106db\r
-#define CYREG_B0_P3_U1_CFG28 0x400106dc\r
-#define CYREG_B0_P3_U1_CFG29 0x400106dd\r
-#define CYREG_B0_P3_U1_CFG30 0x400106de\r
-#define CYREG_B0_P3_U1_CFG31 0x400106df\r
-#define CYREG_B0_P3_U1_DCFG0 0x400106e0\r
-#define CYREG_B0_P3_U1_DCFG1 0x400106e2\r
-#define CYREG_B0_P3_U1_DCFG2 0x400106e4\r
-#define CYREG_B0_P3_U1_DCFG3 0x400106e6\r
-#define CYREG_B0_P3_U1_DCFG4 0x400106e8\r
-#define CYREG_B0_P3_U1_DCFG5 0x400106ea\r
-#define CYREG_B0_P3_U1_DCFG6 0x400106ec\r
-#define CYREG_B0_P3_U1_DCFG7 0x400106ee\r
-#define CYDEV_UCFG_B0_P3_ROUTE_BASE 0x40010700\r
-#define CYDEV_UCFG_B0_P3_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P4_BASE 0x40010800\r
-#define CYDEV_UCFG_B0_P4_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P4_U0_BASE 0x40010800\r
-#define CYDEV_UCFG_B0_P4_U0_SIZE 0x00000070\r
-#define CYREG_B0_P4_U0_PLD_IT0 0x40010800\r
-#define CYREG_B0_P4_U0_PLD_IT1 0x40010804\r
-#define CYREG_B0_P4_U0_PLD_IT2 0x40010808\r
-#define CYREG_B0_P4_U0_PLD_IT3 0x4001080c\r
-#define CYREG_B0_P4_U0_PLD_IT4 0x40010810\r
-#define CYREG_B0_P4_U0_PLD_IT5 0x40010814\r
-#define CYREG_B0_P4_U0_PLD_IT6 0x40010818\r
-#define CYREG_B0_P4_U0_PLD_IT7 0x4001081c\r
-#define CYREG_B0_P4_U0_PLD_IT8 0x40010820\r
-#define CYREG_B0_P4_U0_PLD_IT9 0x40010824\r
-#define CYREG_B0_P4_U0_PLD_IT10 0x40010828\r
-#define CYREG_B0_P4_U0_PLD_IT11 0x4001082c\r
-#define CYREG_B0_P4_U0_PLD_ORT0 0x40010830\r
-#define CYREG_B0_P4_U0_PLD_ORT1 0x40010832\r
-#define CYREG_B0_P4_U0_PLD_ORT2 0x40010834\r
-#define CYREG_B0_P4_U0_PLD_ORT3 0x40010836\r
-#define CYREG_B0_P4_U0_MC_CFG_CEN_CONST 0x40010838\r
-#define CYREG_B0_P4_U0_MC_CFG_XORFB 0x4001083a\r
-#define CYREG_B0_P4_U0_MC_CFG_SET_RESET 0x4001083c\r
-#define CYREG_B0_P4_U0_MC_CFG_BYPASS 0x4001083e\r
-#define CYREG_B0_P4_U0_CFG0 0x40010840\r
-#define CYREG_B0_P4_U0_CFG1 0x40010841\r
-#define CYREG_B0_P4_U0_CFG2 0x40010842\r
-#define CYREG_B0_P4_U0_CFG3 0x40010843\r
-#define CYREG_B0_P4_U0_CFG4 0x40010844\r
-#define CYREG_B0_P4_U0_CFG5 0x40010845\r
-#define CYREG_B0_P4_U0_CFG6 0x40010846\r
-#define CYREG_B0_P4_U0_CFG7 0x40010847\r
-#define CYREG_B0_P4_U0_CFG8 0x40010848\r
-#define CYREG_B0_P4_U0_CFG9 0x40010849\r
-#define CYREG_B0_P4_U0_CFG10 0x4001084a\r
-#define CYREG_B0_P4_U0_CFG11 0x4001084b\r
-#define CYREG_B0_P4_U0_CFG12 0x4001084c\r
-#define CYREG_B0_P4_U0_CFG13 0x4001084d\r
-#define CYREG_B0_P4_U0_CFG14 0x4001084e\r
-#define CYREG_B0_P4_U0_CFG15 0x4001084f\r
-#define CYREG_B0_P4_U0_CFG16 0x40010850\r
-#define CYREG_B0_P4_U0_CFG17 0x40010851\r
-#define CYREG_B0_P4_U0_CFG18 0x40010852\r
-#define CYREG_B0_P4_U0_CFG19 0x40010853\r
-#define CYREG_B0_P4_U0_CFG20 0x40010854\r
-#define CYREG_B0_P4_U0_CFG21 0x40010855\r
-#define CYREG_B0_P4_U0_CFG22 0x40010856\r
-#define CYREG_B0_P4_U0_CFG23 0x40010857\r
-#define CYREG_B0_P4_U0_CFG24 0x40010858\r
-#define CYREG_B0_P4_U0_CFG25 0x40010859\r
-#define CYREG_B0_P4_U0_CFG26 0x4001085a\r
-#define CYREG_B0_P4_U0_CFG27 0x4001085b\r
-#define CYREG_B0_P4_U0_CFG28 0x4001085c\r
-#define CYREG_B0_P4_U0_CFG29 0x4001085d\r
-#define CYREG_B0_P4_U0_CFG30 0x4001085e\r
-#define CYREG_B0_P4_U0_CFG31 0x4001085f\r
-#define CYREG_B0_P4_U0_DCFG0 0x40010860\r
-#define CYREG_B0_P4_U0_DCFG1 0x40010862\r
-#define CYREG_B0_P4_U0_DCFG2 0x40010864\r
-#define CYREG_B0_P4_U0_DCFG3 0x40010866\r
-#define CYREG_B0_P4_U0_DCFG4 0x40010868\r
-#define CYREG_B0_P4_U0_DCFG5 0x4001086a\r
-#define CYREG_B0_P4_U0_DCFG6 0x4001086c\r
-#define CYREG_B0_P4_U0_DCFG7 0x4001086e\r
-#define CYDEV_UCFG_B0_P4_U1_BASE 0x40010880\r
-#define CYDEV_UCFG_B0_P4_U1_SIZE 0x00000070\r
-#define CYREG_B0_P4_U1_PLD_IT0 0x40010880\r
-#define CYREG_B0_P4_U1_PLD_IT1 0x40010884\r
-#define CYREG_B0_P4_U1_PLD_IT2 0x40010888\r
-#define CYREG_B0_P4_U1_PLD_IT3 0x4001088c\r
-#define CYREG_B0_P4_U1_PLD_IT4 0x40010890\r
-#define CYREG_B0_P4_U1_PLD_IT5 0x40010894\r
-#define CYREG_B0_P4_U1_PLD_IT6 0x40010898\r
-#define CYREG_B0_P4_U1_PLD_IT7 0x4001089c\r
-#define CYREG_B0_P4_U1_PLD_IT8 0x400108a0\r
-#define CYREG_B0_P4_U1_PLD_IT9 0x400108a4\r
-#define CYREG_B0_P4_U1_PLD_IT10 0x400108a8\r
-#define CYREG_B0_P4_U1_PLD_IT11 0x400108ac\r
-#define CYREG_B0_P4_U1_PLD_ORT0 0x400108b0\r
-#define CYREG_B0_P4_U1_PLD_ORT1 0x400108b2\r
-#define CYREG_B0_P4_U1_PLD_ORT2 0x400108b4\r
-#define CYREG_B0_P4_U1_PLD_ORT3 0x400108b6\r
-#define CYREG_B0_P4_U1_MC_CFG_CEN_CONST 0x400108b8\r
-#define CYREG_B0_P4_U1_MC_CFG_XORFB 0x400108ba\r
-#define CYREG_B0_P4_U1_MC_CFG_SET_RESET 0x400108bc\r
-#define CYREG_B0_P4_U1_MC_CFG_BYPASS 0x400108be\r
-#define CYREG_B0_P4_U1_CFG0 0x400108c0\r
-#define CYREG_B0_P4_U1_CFG1 0x400108c1\r
-#define CYREG_B0_P4_U1_CFG2 0x400108c2\r
-#define CYREG_B0_P4_U1_CFG3 0x400108c3\r
-#define CYREG_B0_P4_U1_CFG4 0x400108c4\r
-#define CYREG_B0_P4_U1_CFG5 0x400108c5\r
-#define CYREG_B0_P4_U1_CFG6 0x400108c6\r
-#define CYREG_B0_P4_U1_CFG7 0x400108c7\r
-#define CYREG_B0_P4_U1_CFG8 0x400108c8\r
-#define CYREG_B0_P4_U1_CFG9 0x400108c9\r
-#define CYREG_B0_P4_U1_CFG10 0x400108ca\r
-#define CYREG_B0_P4_U1_CFG11 0x400108cb\r
-#define CYREG_B0_P4_U1_CFG12 0x400108cc\r
-#define CYREG_B0_P4_U1_CFG13 0x400108cd\r
-#define CYREG_B0_P4_U1_CFG14 0x400108ce\r
-#define CYREG_B0_P4_U1_CFG15 0x400108cf\r
-#define CYREG_B0_P4_U1_CFG16 0x400108d0\r
-#define CYREG_B0_P4_U1_CFG17 0x400108d1\r
-#define CYREG_B0_P4_U1_CFG18 0x400108d2\r
-#define CYREG_B0_P4_U1_CFG19 0x400108d3\r
-#define CYREG_B0_P4_U1_CFG20 0x400108d4\r
-#define CYREG_B0_P4_U1_CFG21 0x400108d5\r
-#define CYREG_B0_P4_U1_CFG22 0x400108d6\r
-#define CYREG_B0_P4_U1_CFG23 0x400108d7\r
-#define CYREG_B0_P4_U1_CFG24 0x400108d8\r
-#define CYREG_B0_P4_U1_CFG25 0x400108d9\r
-#define CYREG_B0_P4_U1_CFG26 0x400108da\r
-#define CYREG_B0_P4_U1_CFG27 0x400108db\r
-#define CYREG_B0_P4_U1_CFG28 0x400108dc\r
-#define CYREG_B0_P4_U1_CFG29 0x400108dd\r
-#define CYREG_B0_P4_U1_CFG30 0x400108de\r
-#define CYREG_B0_P4_U1_CFG31 0x400108df\r
-#define CYREG_B0_P4_U1_DCFG0 0x400108e0\r
-#define CYREG_B0_P4_U1_DCFG1 0x400108e2\r
-#define CYREG_B0_P4_U1_DCFG2 0x400108e4\r
-#define CYREG_B0_P4_U1_DCFG3 0x400108e6\r
-#define CYREG_B0_P4_U1_DCFG4 0x400108e8\r
-#define CYREG_B0_P4_U1_DCFG5 0x400108ea\r
-#define CYREG_B0_P4_U1_DCFG6 0x400108ec\r
-#define CYREG_B0_P4_U1_DCFG7 0x400108ee\r
-#define CYDEV_UCFG_B0_P4_ROUTE_BASE 0x40010900\r
-#define CYDEV_UCFG_B0_P4_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P5_BASE 0x40010a00\r
-#define CYDEV_UCFG_B0_P5_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P5_U0_BASE 0x40010a00\r
-#define CYDEV_UCFG_B0_P5_U0_SIZE 0x00000070\r
-#define CYREG_B0_P5_U0_PLD_IT0 0x40010a00\r
-#define CYREG_B0_P5_U0_PLD_IT1 0x40010a04\r
-#define CYREG_B0_P5_U0_PLD_IT2 0x40010a08\r
-#define CYREG_B0_P5_U0_PLD_IT3 0x40010a0c\r
-#define CYREG_B0_P5_U0_PLD_IT4 0x40010a10\r
-#define CYREG_B0_P5_U0_PLD_IT5 0x40010a14\r
-#define CYREG_B0_P5_U0_PLD_IT6 0x40010a18\r
-#define CYREG_B0_P5_U0_PLD_IT7 0x40010a1c\r
-#define CYREG_B0_P5_U0_PLD_IT8 0x40010a20\r
-#define CYREG_B0_P5_U0_PLD_IT9 0x40010a24\r
-#define CYREG_B0_P5_U0_PLD_IT10 0x40010a28\r
-#define CYREG_B0_P5_U0_PLD_IT11 0x40010a2c\r
-#define CYREG_B0_P5_U0_PLD_ORT0 0x40010a30\r
-#define CYREG_B0_P5_U0_PLD_ORT1 0x40010a32\r
-#define CYREG_B0_P5_U0_PLD_ORT2 0x40010a34\r
-#define CYREG_B0_P5_U0_PLD_ORT3 0x40010a36\r
-#define CYREG_B0_P5_U0_MC_CFG_CEN_CONST 0x40010a38\r
-#define CYREG_B0_P5_U0_MC_CFG_XORFB 0x40010a3a\r
-#define CYREG_B0_P5_U0_MC_CFG_SET_RESET 0x40010a3c\r
-#define CYREG_B0_P5_U0_MC_CFG_BYPASS 0x40010a3e\r
-#define CYREG_B0_P5_U0_CFG0 0x40010a40\r
-#define CYREG_B0_P5_U0_CFG1 0x40010a41\r
-#define CYREG_B0_P5_U0_CFG2 0x40010a42\r
-#define CYREG_B0_P5_U0_CFG3 0x40010a43\r
-#define CYREG_B0_P5_U0_CFG4 0x40010a44\r
-#define CYREG_B0_P5_U0_CFG5 0x40010a45\r
-#define CYREG_B0_P5_U0_CFG6 0x40010a46\r
-#define CYREG_B0_P5_U0_CFG7 0x40010a47\r
-#define CYREG_B0_P5_U0_CFG8 0x40010a48\r
-#define CYREG_B0_P5_U0_CFG9 0x40010a49\r
-#define CYREG_B0_P5_U0_CFG10 0x40010a4a\r
-#define CYREG_B0_P5_U0_CFG11 0x40010a4b\r
-#define CYREG_B0_P5_U0_CFG12 0x40010a4c\r
-#define CYREG_B0_P5_U0_CFG13 0x40010a4d\r
-#define CYREG_B0_P5_U0_CFG14 0x40010a4e\r
-#define CYREG_B0_P5_U0_CFG15 0x40010a4f\r
-#define CYREG_B0_P5_U0_CFG16 0x40010a50\r
-#define CYREG_B0_P5_U0_CFG17 0x40010a51\r
-#define CYREG_B0_P5_U0_CFG18 0x40010a52\r
-#define CYREG_B0_P5_U0_CFG19 0x40010a53\r
-#define CYREG_B0_P5_U0_CFG20 0x40010a54\r
-#define CYREG_B0_P5_U0_CFG21 0x40010a55\r
-#define CYREG_B0_P5_U0_CFG22 0x40010a56\r
-#define CYREG_B0_P5_U0_CFG23 0x40010a57\r
-#define CYREG_B0_P5_U0_CFG24 0x40010a58\r
-#define CYREG_B0_P5_U0_CFG25 0x40010a59\r
-#define CYREG_B0_P5_U0_CFG26 0x40010a5a\r
-#define CYREG_B0_P5_U0_CFG27 0x40010a5b\r
-#define CYREG_B0_P5_U0_CFG28 0x40010a5c\r
-#define CYREG_B0_P5_U0_CFG29 0x40010a5d\r
-#define CYREG_B0_P5_U0_CFG30 0x40010a5e\r
-#define CYREG_B0_P5_U0_CFG31 0x40010a5f\r
-#define CYREG_B0_P5_U0_DCFG0 0x40010a60\r
-#define CYREG_B0_P5_U0_DCFG1 0x40010a62\r
-#define CYREG_B0_P5_U0_DCFG2 0x40010a64\r
-#define CYREG_B0_P5_U0_DCFG3 0x40010a66\r
-#define CYREG_B0_P5_U0_DCFG4 0x40010a68\r
-#define CYREG_B0_P5_U0_DCFG5 0x40010a6a\r
-#define CYREG_B0_P5_U0_DCFG6 0x40010a6c\r
-#define CYREG_B0_P5_U0_DCFG7 0x40010a6e\r
-#define CYDEV_UCFG_B0_P5_U1_BASE 0x40010a80\r
-#define CYDEV_UCFG_B0_P5_U1_SIZE 0x00000070\r
-#define CYREG_B0_P5_U1_PLD_IT0 0x40010a80\r
-#define CYREG_B0_P5_U1_PLD_IT1 0x40010a84\r
-#define CYREG_B0_P5_U1_PLD_IT2 0x40010a88\r
-#define CYREG_B0_P5_U1_PLD_IT3 0x40010a8c\r
-#define CYREG_B0_P5_U1_PLD_IT4 0x40010a90\r
-#define CYREG_B0_P5_U1_PLD_IT5 0x40010a94\r
-#define CYREG_B0_P5_U1_PLD_IT6 0x40010a98\r
-#define CYREG_B0_P5_U1_PLD_IT7 0x40010a9c\r
-#define CYREG_B0_P5_U1_PLD_IT8 0x40010aa0\r
-#define CYREG_B0_P5_U1_PLD_IT9 0x40010aa4\r
-#define CYREG_B0_P5_U1_PLD_IT10 0x40010aa8\r
-#define CYREG_B0_P5_U1_PLD_IT11 0x40010aac\r
-#define CYREG_B0_P5_U1_PLD_ORT0 0x40010ab0\r
-#define CYREG_B0_P5_U1_PLD_ORT1 0x40010ab2\r
-#define CYREG_B0_P5_U1_PLD_ORT2 0x40010ab4\r
-#define CYREG_B0_P5_U1_PLD_ORT3 0x40010ab6\r
-#define CYREG_B0_P5_U1_MC_CFG_CEN_CONST 0x40010ab8\r
-#define CYREG_B0_P5_U1_MC_CFG_XORFB 0x40010aba\r
-#define CYREG_B0_P5_U1_MC_CFG_SET_RESET 0x40010abc\r
-#define CYREG_B0_P5_U1_MC_CFG_BYPASS 0x40010abe\r
-#define CYREG_B0_P5_U1_CFG0 0x40010ac0\r
-#define CYREG_B0_P5_U1_CFG1 0x40010ac1\r
-#define CYREG_B0_P5_U1_CFG2 0x40010ac2\r
-#define CYREG_B0_P5_U1_CFG3 0x40010ac3\r
-#define CYREG_B0_P5_U1_CFG4 0x40010ac4\r
-#define CYREG_B0_P5_U1_CFG5 0x40010ac5\r
-#define CYREG_B0_P5_U1_CFG6 0x40010ac6\r
-#define CYREG_B0_P5_U1_CFG7 0x40010ac7\r
-#define CYREG_B0_P5_U1_CFG8 0x40010ac8\r
-#define CYREG_B0_P5_U1_CFG9 0x40010ac9\r
-#define CYREG_B0_P5_U1_CFG10 0x40010aca\r
-#define CYREG_B0_P5_U1_CFG11 0x40010acb\r
-#define CYREG_B0_P5_U1_CFG12 0x40010acc\r
-#define CYREG_B0_P5_U1_CFG13 0x40010acd\r
-#define CYREG_B0_P5_U1_CFG14 0x40010ace\r
-#define CYREG_B0_P5_U1_CFG15 0x40010acf\r
-#define CYREG_B0_P5_U1_CFG16 0x40010ad0\r
-#define CYREG_B0_P5_U1_CFG17 0x40010ad1\r
-#define CYREG_B0_P5_U1_CFG18 0x40010ad2\r
-#define CYREG_B0_P5_U1_CFG19 0x40010ad3\r
-#define CYREG_B0_P5_U1_CFG20 0x40010ad4\r
-#define CYREG_B0_P5_U1_CFG21 0x40010ad5\r
-#define CYREG_B0_P5_U1_CFG22 0x40010ad6\r
-#define CYREG_B0_P5_U1_CFG23 0x40010ad7\r
-#define CYREG_B0_P5_U1_CFG24 0x40010ad8\r
-#define CYREG_B0_P5_U1_CFG25 0x40010ad9\r
-#define CYREG_B0_P5_U1_CFG26 0x40010ada\r
-#define CYREG_B0_P5_U1_CFG27 0x40010adb\r
-#define CYREG_B0_P5_U1_CFG28 0x40010adc\r
-#define CYREG_B0_P5_U1_CFG29 0x40010add\r
-#define CYREG_B0_P5_U1_CFG30 0x40010ade\r
-#define CYREG_B0_P5_U1_CFG31 0x40010adf\r
-#define CYREG_B0_P5_U1_DCFG0 0x40010ae0\r
-#define CYREG_B0_P5_U1_DCFG1 0x40010ae2\r
-#define CYREG_B0_P5_U1_DCFG2 0x40010ae4\r
-#define CYREG_B0_P5_U1_DCFG3 0x40010ae6\r
-#define CYREG_B0_P5_U1_DCFG4 0x40010ae8\r
-#define CYREG_B0_P5_U1_DCFG5 0x40010aea\r
-#define CYREG_B0_P5_U1_DCFG6 0x40010aec\r
-#define CYREG_B0_P5_U1_DCFG7 0x40010aee\r
-#define CYDEV_UCFG_B0_P5_ROUTE_BASE 0x40010b00\r
-#define CYDEV_UCFG_B0_P5_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P6_BASE 0x40010c00\r
-#define CYDEV_UCFG_B0_P6_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P6_U0_BASE 0x40010c00\r
-#define CYDEV_UCFG_B0_P6_U0_SIZE 0x00000070\r
-#define CYREG_B0_P6_U0_PLD_IT0 0x40010c00\r
-#define CYREG_B0_P6_U0_PLD_IT1 0x40010c04\r
-#define CYREG_B0_P6_U0_PLD_IT2 0x40010c08\r
-#define CYREG_B0_P6_U0_PLD_IT3 0x40010c0c\r
-#define CYREG_B0_P6_U0_PLD_IT4 0x40010c10\r
-#define CYREG_B0_P6_U0_PLD_IT5 0x40010c14\r
-#define CYREG_B0_P6_U0_PLD_IT6 0x40010c18\r
-#define CYREG_B0_P6_U0_PLD_IT7 0x40010c1c\r
-#define CYREG_B0_P6_U0_PLD_IT8 0x40010c20\r
-#define CYREG_B0_P6_U0_PLD_IT9 0x40010c24\r
-#define CYREG_B0_P6_U0_PLD_IT10 0x40010c28\r
-#define CYREG_B0_P6_U0_PLD_IT11 0x40010c2c\r
-#define CYREG_B0_P6_U0_PLD_ORT0 0x40010c30\r
-#define CYREG_B0_P6_U0_PLD_ORT1 0x40010c32\r
-#define CYREG_B0_P6_U0_PLD_ORT2 0x40010c34\r
-#define CYREG_B0_P6_U0_PLD_ORT3 0x40010c36\r
-#define CYREG_B0_P6_U0_MC_CFG_CEN_CONST 0x40010c38\r
-#define CYREG_B0_P6_U0_MC_CFG_XORFB 0x40010c3a\r
-#define CYREG_B0_P6_U0_MC_CFG_SET_RESET 0x40010c3c\r
-#define CYREG_B0_P6_U0_MC_CFG_BYPASS 0x40010c3e\r
-#define CYREG_B0_P6_U0_CFG0 0x40010c40\r
-#define CYREG_B0_P6_U0_CFG1 0x40010c41\r
-#define CYREG_B0_P6_U0_CFG2 0x40010c42\r
-#define CYREG_B0_P6_U0_CFG3 0x40010c43\r
-#define CYREG_B0_P6_U0_CFG4 0x40010c44\r
-#define CYREG_B0_P6_U0_CFG5 0x40010c45\r
-#define CYREG_B0_P6_U0_CFG6 0x40010c46\r
-#define CYREG_B0_P6_U0_CFG7 0x40010c47\r
-#define CYREG_B0_P6_U0_CFG8 0x40010c48\r
-#define CYREG_B0_P6_U0_CFG9 0x40010c49\r
-#define CYREG_B0_P6_U0_CFG10 0x40010c4a\r
-#define CYREG_B0_P6_U0_CFG11 0x40010c4b\r
-#define CYREG_B0_P6_U0_CFG12 0x40010c4c\r
-#define CYREG_B0_P6_U0_CFG13 0x40010c4d\r
-#define CYREG_B0_P6_U0_CFG14 0x40010c4e\r
-#define CYREG_B0_P6_U0_CFG15 0x40010c4f\r
-#define CYREG_B0_P6_U0_CFG16 0x40010c50\r
-#define CYREG_B0_P6_U0_CFG17 0x40010c51\r
-#define CYREG_B0_P6_U0_CFG18 0x40010c52\r
-#define CYREG_B0_P6_U0_CFG19 0x40010c53\r
-#define CYREG_B0_P6_U0_CFG20 0x40010c54\r
-#define CYREG_B0_P6_U0_CFG21 0x40010c55\r
-#define CYREG_B0_P6_U0_CFG22 0x40010c56\r
-#define CYREG_B0_P6_U0_CFG23 0x40010c57\r
-#define CYREG_B0_P6_U0_CFG24 0x40010c58\r
-#define CYREG_B0_P6_U0_CFG25 0x40010c59\r
-#define CYREG_B0_P6_U0_CFG26 0x40010c5a\r
-#define CYREG_B0_P6_U0_CFG27 0x40010c5b\r
-#define CYREG_B0_P6_U0_CFG28 0x40010c5c\r
-#define CYREG_B0_P6_U0_CFG29 0x40010c5d\r
-#define CYREG_B0_P6_U0_CFG30 0x40010c5e\r
-#define CYREG_B0_P6_U0_CFG31 0x40010c5f\r
-#define CYREG_B0_P6_U0_DCFG0 0x40010c60\r
-#define CYREG_B0_P6_U0_DCFG1 0x40010c62\r
-#define CYREG_B0_P6_U0_DCFG2 0x40010c64\r
-#define CYREG_B0_P6_U0_DCFG3 0x40010c66\r
-#define CYREG_B0_P6_U0_DCFG4 0x40010c68\r
-#define CYREG_B0_P6_U0_DCFG5 0x40010c6a\r
-#define CYREG_B0_P6_U0_DCFG6 0x40010c6c\r
-#define CYREG_B0_P6_U0_DCFG7 0x40010c6e\r
-#define CYDEV_UCFG_B0_P6_U1_BASE 0x40010c80\r
-#define CYDEV_UCFG_B0_P6_U1_SIZE 0x00000070\r
-#define CYREG_B0_P6_U1_PLD_IT0 0x40010c80\r
-#define CYREG_B0_P6_U1_PLD_IT1 0x40010c84\r
-#define CYREG_B0_P6_U1_PLD_IT2 0x40010c88\r
-#define CYREG_B0_P6_U1_PLD_IT3 0x40010c8c\r
-#define CYREG_B0_P6_U1_PLD_IT4 0x40010c90\r
-#define CYREG_B0_P6_U1_PLD_IT5 0x40010c94\r
-#define CYREG_B0_P6_U1_PLD_IT6 0x40010c98\r
-#define CYREG_B0_P6_U1_PLD_IT7 0x40010c9c\r
-#define CYREG_B0_P6_U1_PLD_IT8 0x40010ca0\r
-#define CYREG_B0_P6_U1_PLD_IT9 0x40010ca4\r
-#define CYREG_B0_P6_U1_PLD_IT10 0x40010ca8\r
-#define CYREG_B0_P6_U1_PLD_IT11 0x40010cac\r
-#define CYREG_B0_P6_U1_PLD_ORT0 0x40010cb0\r
-#define CYREG_B0_P6_U1_PLD_ORT1 0x40010cb2\r
-#define CYREG_B0_P6_U1_PLD_ORT2 0x40010cb4\r
-#define CYREG_B0_P6_U1_PLD_ORT3 0x40010cb6\r
-#define CYREG_B0_P6_U1_MC_CFG_CEN_CONST 0x40010cb8\r
-#define CYREG_B0_P6_U1_MC_CFG_XORFB 0x40010cba\r
-#define CYREG_B0_P6_U1_MC_CFG_SET_RESET 0x40010cbc\r
-#define CYREG_B0_P6_U1_MC_CFG_BYPASS 0x40010cbe\r
-#define CYREG_B0_P6_U1_CFG0 0x40010cc0\r
-#define CYREG_B0_P6_U1_CFG1 0x40010cc1\r
-#define CYREG_B0_P6_U1_CFG2 0x40010cc2\r
-#define CYREG_B0_P6_U1_CFG3 0x40010cc3\r
-#define CYREG_B0_P6_U1_CFG4 0x40010cc4\r
-#define CYREG_B0_P6_U1_CFG5 0x40010cc5\r
-#define CYREG_B0_P6_U1_CFG6 0x40010cc6\r
-#define CYREG_B0_P6_U1_CFG7 0x40010cc7\r
-#define CYREG_B0_P6_U1_CFG8 0x40010cc8\r
-#define CYREG_B0_P6_U1_CFG9 0x40010cc9\r
-#define CYREG_B0_P6_U1_CFG10 0x40010cca\r
-#define CYREG_B0_P6_U1_CFG11 0x40010ccb\r
-#define CYREG_B0_P6_U1_CFG12 0x40010ccc\r
-#define CYREG_B0_P6_U1_CFG13 0x40010ccd\r
-#define CYREG_B0_P6_U1_CFG14 0x40010cce\r
-#define CYREG_B0_P6_U1_CFG15 0x40010ccf\r
-#define CYREG_B0_P6_U1_CFG16 0x40010cd0\r
-#define CYREG_B0_P6_U1_CFG17 0x40010cd1\r
-#define CYREG_B0_P6_U1_CFG18 0x40010cd2\r
-#define CYREG_B0_P6_U1_CFG19 0x40010cd3\r
-#define CYREG_B0_P6_U1_CFG20 0x40010cd4\r
-#define CYREG_B0_P6_U1_CFG21 0x40010cd5\r
-#define CYREG_B0_P6_U1_CFG22 0x40010cd6\r
-#define CYREG_B0_P6_U1_CFG23 0x40010cd7\r
-#define CYREG_B0_P6_U1_CFG24 0x40010cd8\r
-#define CYREG_B0_P6_U1_CFG25 0x40010cd9\r
-#define CYREG_B0_P6_U1_CFG26 0x40010cda\r
-#define CYREG_B0_P6_U1_CFG27 0x40010cdb\r
-#define CYREG_B0_P6_U1_CFG28 0x40010cdc\r
-#define CYREG_B0_P6_U1_CFG29 0x40010cdd\r
-#define CYREG_B0_P6_U1_CFG30 0x40010cde\r
-#define CYREG_B0_P6_U1_CFG31 0x40010cdf\r
-#define CYREG_B0_P6_U1_DCFG0 0x40010ce0\r
-#define CYREG_B0_P6_U1_DCFG1 0x40010ce2\r
-#define CYREG_B0_P6_U1_DCFG2 0x40010ce4\r
-#define CYREG_B0_P6_U1_DCFG3 0x40010ce6\r
-#define CYREG_B0_P6_U1_DCFG4 0x40010ce8\r
-#define CYREG_B0_P6_U1_DCFG5 0x40010cea\r
-#define CYREG_B0_P6_U1_DCFG6 0x40010cec\r
-#define CYREG_B0_P6_U1_DCFG7 0x40010cee\r
-#define CYDEV_UCFG_B0_P6_ROUTE_BASE 0x40010d00\r
-#define CYDEV_UCFG_B0_P6_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B0_P7_BASE 0x40010e00\r
-#define CYDEV_UCFG_B0_P7_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B0_P7_U0_BASE 0x40010e00\r
-#define CYDEV_UCFG_B0_P7_U0_SIZE 0x00000070\r
-#define CYREG_B0_P7_U0_PLD_IT0 0x40010e00\r
-#define CYREG_B0_P7_U0_PLD_IT1 0x40010e04\r
-#define CYREG_B0_P7_U0_PLD_IT2 0x40010e08\r
-#define CYREG_B0_P7_U0_PLD_IT3 0x40010e0c\r
-#define CYREG_B0_P7_U0_PLD_IT4 0x40010e10\r
-#define CYREG_B0_P7_U0_PLD_IT5 0x40010e14\r
-#define CYREG_B0_P7_U0_PLD_IT6 0x40010e18\r
-#define CYREG_B0_P7_U0_PLD_IT7 0x40010e1c\r
-#define CYREG_B0_P7_U0_PLD_IT8 0x40010e20\r
-#define CYREG_B0_P7_U0_PLD_IT9 0x40010e24\r
-#define CYREG_B0_P7_U0_PLD_IT10 0x40010e28\r
-#define CYREG_B0_P7_U0_PLD_IT11 0x40010e2c\r
-#define CYREG_B0_P7_U0_PLD_ORT0 0x40010e30\r
-#define CYREG_B0_P7_U0_PLD_ORT1 0x40010e32\r
-#define CYREG_B0_P7_U0_PLD_ORT2 0x40010e34\r
-#define CYREG_B0_P7_U0_PLD_ORT3 0x40010e36\r
-#define CYREG_B0_P7_U0_MC_CFG_CEN_CONST 0x40010e38\r
-#define CYREG_B0_P7_U0_MC_CFG_XORFB 0x40010e3a\r
-#define CYREG_B0_P7_U0_MC_CFG_SET_RESET 0x40010e3c\r
-#define CYREG_B0_P7_U0_MC_CFG_BYPASS 0x40010e3e\r
-#define CYREG_B0_P7_U0_CFG0 0x40010e40\r
-#define CYREG_B0_P7_U0_CFG1 0x40010e41\r
-#define CYREG_B0_P7_U0_CFG2 0x40010e42\r
-#define CYREG_B0_P7_U0_CFG3 0x40010e43\r
-#define CYREG_B0_P7_U0_CFG4 0x40010e44\r
-#define CYREG_B0_P7_U0_CFG5 0x40010e45\r
-#define CYREG_B0_P7_U0_CFG6 0x40010e46\r
-#define CYREG_B0_P7_U0_CFG7 0x40010e47\r
-#define CYREG_B0_P7_U0_CFG8 0x40010e48\r
-#define CYREG_B0_P7_U0_CFG9 0x40010e49\r
-#define CYREG_B0_P7_U0_CFG10 0x40010e4a\r
-#define CYREG_B0_P7_U0_CFG11 0x40010e4b\r
-#define CYREG_B0_P7_U0_CFG12 0x40010e4c\r
-#define CYREG_B0_P7_U0_CFG13 0x40010e4d\r
-#define CYREG_B0_P7_U0_CFG14 0x40010e4e\r
-#define CYREG_B0_P7_U0_CFG15 0x40010e4f\r
-#define CYREG_B0_P7_U0_CFG16 0x40010e50\r
-#define CYREG_B0_P7_U0_CFG17 0x40010e51\r
-#define CYREG_B0_P7_U0_CFG18 0x40010e52\r
-#define CYREG_B0_P7_U0_CFG19 0x40010e53\r
-#define CYREG_B0_P7_U0_CFG20 0x40010e54\r
-#define CYREG_B0_P7_U0_CFG21 0x40010e55\r
-#define CYREG_B0_P7_U0_CFG22 0x40010e56\r
-#define CYREG_B0_P7_U0_CFG23 0x40010e57\r
-#define CYREG_B0_P7_U0_CFG24 0x40010e58\r
-#define CYREG_B0_P7_U0_CFG25 0x40010e59\r
-#define CYREG_B0_P7_U0_CFG26 0x40010e5a\r
-#define CYREG_B0_P7_U0_CFG27 0x40010e5b\r
-#define CYREG_B0_P7_U0_CFG28 0x40010e5c\r
-#define CYREG_B0_P7_U0_CFG29 0x40010e5d\r
-#define CYREG_B0_P7_U0_CFG30 0x40010e5e\r
-#define CYREG_B0_P7_U0_CFG31 0x40010e5f\r
-#define CYREG_B0_P7_U0_DCFG0 0x40010e60\r
-#define CYREG_B0_P7_U0_DCFG1 0x40010e62\r
-#define CYREG_B0_P7_U0_DCFG2 0x40010e64\r
-#define CYREG_B0_P7_U0_DCFG3 0x40010e66\r
-#define CYREG_B0_P7_U0_DCFG4 0x40010e68\r
-#define CYREG_B0_P7_U0_DCFG5 0x40010e6a\r
-#define CYREG_B0_P7_U0_DCFG6 0x40010e6c\r
-#define CYREG_B0_P7_U0_DCFG7 0x40010e6e\r
-#define CYDEV_UCFG_B0_P7_U1_BASE 0x40010e80\r
-#define CYDEV_UCFG_B0_P7_U1_SIZE 0x00000070\r
-#define CYREG_B0_P7_U1_PLD_IT0 0x40010e80\r
-#define CYREG_B0_P7_U1_PLD_IT1 0x40010e84\r
-#define CYREG_B0_P7_U1_PLD_IT2 0x40010e88\r
-#define CYREG_B0_P7_U1_PLD_IT3 0x40010e8c\r
-#define CYREG_B0_P7_U1_PLD_IT4 0x40010e90\r
-#define CYREG_B0_P7_U1_PLD_IT5 0x40010e94\r
-#define CYREG_B0_P7_U1_PLD_IT6 0x40010e98\r
-#define CYREG_B0_P7_U1_PLD_IT7 0x40010e9c\r
-#define CYREG_B0_P7_U1_PLD_IT8 0x40010ea0\r
-#define CYREG_B0_P7_U1_PLD_IT9 0x40010ea4\r
-#define CYREG_B0_P7_U1_PLD_IT10 0x40010ea8\r
-#define CYREG_B0_P7_U1_PLD_IT11 0x40010eac\r
-#define CYREG_B0_P7_U1_PLD_ORT0 0x40010eb0\r
-#define CYREG_B0_P7_U1_PLD_ORT1 0x40010eb2\r
-#define CYREG_B0_P7_U1_PLD_ORT2 0x40010eb4\r
-#define CYREG_B0_P7_U1_PLD_ORT3 0x40010eb6\r
-#define CYREG_B0_P7_U1_MC_CFG_CEN_CONST 0x40010eb8\r
-#define CYREG_B0_P7_U1_MC_CFG_XORFB 0x40010eba\r
-#define CYREG_B0_P7_U1_MC_CFG_SET_RESET 0x40010ebc\r
-#define CYREG_B0_P7_U1_MC_CFG_BYPASS 0x40010ebe\r
-#define CYREG_B0_P7_U1_CFG0 0x40010ec0\r
-#define CYREG_B0_P7_U1_CFG1 0x40010ec1\r
-#define CYREG_B0_P7_U1_CFG2 0x40010ec2\r
-#define CYREG_B0_P7_U1_CFG3 0x40010ec3\r
-#define CYREG_B0_P7_U1_CFG4 0x40010ec4\r
-#define CYREG_B0_P7_U1_CFG5 0x40010ec5\r
-#define CYREG_B0_P7_U1_CFG6 0x40010ec6\r
-#define CYREG_B0_P7_U1_CFG7 0x40010ec7\r
-#define CYREG_B0_P7_U1_CFG8 0x40010ec8\r
-#define CYREG_B0_P7_U1_CFG9 0x40010ec9\r
-#define CYREG_B0_P7_U1_CFG10 0x40010eca\r
-#define CYREG_B0_P7_U1_CFG11 0x40010ecb\r
-#define CYREG_B0_P7_U1_CFG12 0x40010ecc\r
-#define CYREG_B0_P7_U1_CFG13 0x40010ecd\r
-#define CYREG_B0_P7_U1_CFG14 0x40010ece\r
-#define CYREG_B0_P7_U1_CFG15 0x40010ecf\r
-#define CYREG_B0_P7_U1_CFG16 0x40010ed0\r
-#define CYREG_B0_P7_U1_CFG17 0x40010ed1\r
-#define CYREG_B0_P7_U1_CFG18 0x40010ed2\r
-#define CYREG_B0_P7_U1_CFG19 0x40010ed3\r
-#define CYREG_B0_P7_U1_CFG20 0x40010ed4\r
-#define CYREG_B0_P7_U1_CFG21 0x40010ed5\r
-#define CYREG_B0_P7_U1_CFG22 0x40010ed6\r
-#define CYREG_B0_P7_U1_CFG23 0x40010ed7\r
-#define CYREG_B0_P7_U1_CFG24 0x40010ed8\r
-#define CYREG_B0_P7_U1_CFG25 0x40010ed9\r
-#define CYREG_B0_P7_U1_CFG26 0x40010eda\r
-#define CYREG_B0_P7_U1_CFG27 0x40010edb\r
-#define CYREG_B0_P7_U1_CFG28 0x40010edc\r
-#define CYREG_B0_P7_U1_CFG29 0x40010edd\r
-#define CYREG_B0_P7_U1_CFG30 0x40010ede\r
-#define CYREG_B0_P7_U1_CFG31 0x40010edf\r
-#define CYREG_B0_P7_U1_DCFG0 0x40010ee0\r
-#define CYREG_B0_P7_U1_DCFG1 0x40010ee2\r
-#define CYREG_B0_P7_U1_DCFG2 0x40010ee4\r
-#define CYREG_B0_P7_U1_DCFG3 0x40010ee6\r
-#define CYREG_B0_P7_U1_DCFG4 0x40010ee8\r
-#define CYREG_B0_P7_U1_DCFG5 0x40010eea\r
-#define CYREG_B0_P7_U1_DCFG6 0x40010eec\r
-#define CYREG_B0_P7_U1_DCFG7 0x40010eee\r
-#define CYDEV_UCFG_B0_P7_ROUTE_BASE 0x40010f00\r
-#define CYDEV_UCFG_B0_P7_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_BASE 0x40011000\r
-#define CYDEV_UCFG_B1_SIZE 0x00000fef\r
-#define CYDEV_UCFG_B1_P2_BASE 0x40011400\r
-#define CYDEV_UCFG_B1_P2_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P2_U0_BASE 0x40011400\r
-#define CYDEV_UCFG_B1_P2_U0_SIZE 0x00000070\r
-#define CYREG_B1_P2_U0_PLD_IT0 0x40011400\r
-#define CYREG_B1_P2_U0_PLD_IT1 0x40011404\r
-#define CYREG_B1_P2_U0_PLD_IT2 0x40011408\r
-#define CYREG_B1_P2_U0_PLD_IT3 0x4001140c\r
-#define CYREG_B1_P2_U0_PLD_IT4 0x40011410\r
-#define CYREG_B1_P2_U0_PLD_IT5 0x40011414\r
-#define CYREG_B1_P2_U0_PLD_IT6 0x40011418\r
-#define CYREG_B1_P2_U0_PLD_IT7 0x4001141c\r
-#define CYREG_B1_P2_U0_PLD_IT8 0x40011420\r
-#define CYREG_B1_P2_U0_PLD_IT9 0x40011424\r
-#define CYREG_B1_P2_U0_PLD_IT10 0x40011428\r
-#define CYREG_B1_P2_U0_PLD_IT11 0x4001142c\r
-#define CYREG_B1_P2_U0_PLD_ORT0 0x40011430\r
-#define CYREG_B1_P2_U0_PLD_ORT1 0x40011432\r
-#define CYREG_B1_P2_U0_PLD_ORT2 0x40011434\r
-#define CYREG_B1_P2_U0_PLD_ORT3 0x40011436\r
-#define CYREG_B1_P2_U0_MC_CFG_CEN_CONST 0x40011438\r
-#define CYREG_B1_P2_U0_MC_CFG_XORFB 0x4001143a\r
-#define CYREG_B1_P2_U0_MC_CFG_SET_RESET 0x4001143c\r
-#define CYREG_B1_P2_U0_MC_CFG_BYPASS 0x4001143e\r
-#define CYREG_B1_P2_U0_CFG0 0x40011440\r
-#define CYREG_B1_P2_U0_CFG1 0x40011441\r
-#define CYREG_B1_P2_U0_CFG2 0x40011442\r
-#define CYREG_B1_P2_U0_CFG3 0x40011443\r
-#define CYREG_B1_P2_U0_CFG4 0x40011444\r
-#define CYREG_B1_P2_U0_CFG5 0x40011445\r
-#define CYREG_B1_P2_U0_CFG6 0x40011446\r
-#define CYREG_B1_P2_U0_CFG7 0x40011447\r
-#define CYREG_B1_P2_U0_CFG8 0x40011448\r
-#define CYREG_B1_P2_U0_CFG9 0x40011449\r
-#define CYREG_B1_P2_U0_CFG10 0x4001144a\r
-#define CYREG_B1_P2_U0_CFG11 0x4001144b\r
-#define CYREG_B1_P2_U0_CFG12 0x4001144c\r
-#define CYREG_B1_P2_U0_CFG13 0x4001144d\r
-#define CYREG_B1_P2_U0_CFG14 0x4001144e\r
-#define CYREG_B1_P2_U0_CFG15 0x4001144f\r
-#define CYREG_B1_P2_U0_CFG16 0x40011450\r
-#define CYREG_B1_P2_U0_CFG17 0x40011451\r
-#define CYREG_B1_P2_U0_CFG18 0x40011452\r
-#define CYREG_B1_P2_U0_CFG19 0x40011453\r
-#define CYREG_B1_P2_U0_CFG20 0x40011454\r
-#define CYREG_B1_P2_U0_CFG21 0x40011455\r
-#define CYREG_B1_P2_U0_CFG22 0x40011456\r
-#define CYREG_B1_P2_U0_CFG23 0x40011457\r
-#define CYREG_B1_P2_U0_CFG24 0x40011458\r
-#define CYREG_B1_P2_U0_CFG25 0x40011459\r
-#define CYREG_B1_P2_U0_CFG26 0x4001145a\r
-#define CYREG_B1_P2_U0_CFG27 0x4001145b\r
-#define CYREG_B1_P2_U0_CFG28 0x4001145c\r
-#define CYREG_B1_P2_U0_CFG29 0x4001145d\r
-#define CYREG_B1_P2_U0_CFG30 0x4001145e\r
-#define CYREG_B1_P2_U0_CFG31 0x4001145f\r
-#define CYREG_B1_P2_U0_DCFG0 0x40011460\r
-#define CYREG_B1_P2_U0_DCFG1 0x40011462\r
-#define CYREG_B1_P2_U0_DCFG2 0x40011464\r
-#define CYREG_B1_P2_U0_DCFG3 0x40011466\r
-#define CYREG_B1_P2_U0_DCFG4 0x40011468\r
-#define CYREG_B1_P2_U0_DCFG5 0x4001146a\r
-#define CYREG_B1_P2_U0_DCFG6 0x4001146c\r
-#define CYREG_B1_P2_U0_DCFG7 0x4001146e\r
-#define CYDEV_UCFG_B1_P2_U1_BASE 0x40011480\r
-#define CYDEV_UCFG_B1_P2_U1_SIZE 0x00000070\r
-#define CYREG_B1_P2_U1_PLD_IT0 0x40011480\r
-#define CYREG_B1_P2_U1_PLD_IT1 0x40011484\r
-#define CYREG_B1_P2_U1_PLD_IT2 0x40011488\r
-#define CYREG_B1_P2_U1_PLD_IT3 0x4001148c\r
-#define CYREG_B1_P2_U1_PLD_IT4 0x40011490\r
-#define CYREG_B1_P2_U1_PLD_IT5 0x40011494\r
-#define CYREG_B1_P2_U1_PLD_IT6 0x40011498\r
-#define CYREG_B1_P2_U1_PLD_IT7 0x4001149c\r
-#define CYREG_B1_P2_U1_PLD_IT8 0x400114a0\r
-#define CYREG_B1_P2_U1_PLD_IT9 0x400114a4\r
-#define CYREG_B1_P2_U1_PLD_IT10 0x400114a8\r
-#define CYREG_B1_P2_U1_PLD_IT11 0x400114ac\r
-#define CYREG_B1_P2_U1_PLD_ORT0 0x400114b0\r
-#define CYREG_B1_P2_U1_PLD_ORT1 0x400114b2\r
-#define CYREG_B1_P2_U1_PLD_ORT2 0x400114b4\r
-#define CYREG_B1_P2_U1_PLD_ORT3 0x400114b6\r
-#define CYREG_B1_P2_U1_MC_CFG_CEN_CONST 0x400114b8\r
-#define CYREG_B1_P2_U1_MC_CFG_XORFB 0x400114ba\r
-#define CYREG_B1_P2_U1_MC_CFG_SET_RESET 0x400114bc\r
-#define CYREG_B1_P2_U1_MC_CFG_BYPASS 0x400114be\r
-#define CYREG_B1_P2_U1_CFG0 0x400114c0\r
-#define CYREG_B1_P2_U1_CFG1 0x400114c1\r
-#define CYREG_B1_P2_U1_CFG2 0x400114c2\r
-#define CYREG_B1_P2_U1_CFG3 0x400114c3\r
-#define CYREG_B1_P2_U1_CFG4 0x400114c4\r
-#define CYREG_B1_P2_U1_CFG5 0x400114c5\r
-#define CYREG_B1_P2_U1_CFG6 0x400114c6\r
-#define CYREG_B1_P2_U1_CFG7 0x400114c7\r
-#define CYREG_B1_P2_U1_CFG8 0x400114c8\r
-#define CYREG_B1_P2_U1_CFG9 0x400114c9\r
-#define CYREG_B1_P2_U1_CFG10 0x400114ca\r
-#define CYREG_B1_P2_U1_CFG11 0x400114cb\r
-#define CYREG_B1_P2_U1_CFG12 0x400114cc\r
-#define CYREG_B1_P2_U1_CFG13 0x400114cd\r
-#define CYREG_B1_P2_U1_CFG14 0x400114ce\r
-#define CYREG_B1_P2_U1_CFG15 0x400114cf\r
-#define CYREG_B1_P2_U1_CFG16 0x400114d0\r
-#define CYREG_B1_P2_U1_CFG17 0x400114d1\r
-#define CYREG_B1_P2_U1_CFG18 0x400114d2\r
-#define CYREG_B1_P2_U1_CFG19 0x400114d3\r
-#define CYREG_B1_P2_U1_CFG20 0x400114d4\r
-#define CYREG_B1_P2_U1_CFG21 0x400114d5\r
-#define CYREG_B1_P2_U1_CFG22 0x400114d6\r
-#define CYREG_B1_P2_U1_CFG23 0x400114d7\r
-#define CYREG_B1_P2_U1_CFG24 0x400114d8\r
-#define CYREG_B1_P2_U1_CFG25 0x400114d9\r
-#define CYREG_B1_P2_U1_CFG26 0x400114da\r
-#define CYREG_B1_P2_U1_CFG27 0x400114db\r
-#define CYREG_B1_P2_U1_CFG28 0x400114dc\r
-#define CYREG_B1_P2_U1_CFG29 0x400114dd\r
-#define CYREG_B1_P2_U1_CFG30 0x400114de\r
-#define CYREG_B1_P2_U1_CFG31 0x400114df\r
-#define CYREG_B1_P2_U1_DCFG0 0x400114e0\r
-#define CYREG_B1_P2_U1_DCFG1 0x400114e2\r
-#define CYREG_B1_P2_U1_DCFG2 0x400114e4\r
-#define CYREG_B1_P2_U1_DCFG3 0x400114e6\r
-#define CYREG_B1_P2_U1_DCFG4 0x400114e8\r
-#define CYREG_B1_P2_U1_DCFG5 0x400114ea\r
-#define CYREG_B1_P2_U1_DCFG6 0x400114ec\r
-#define CYREG_B1_P2_U1_DCFG7 0x400114ee\r
-#define CYDEV_UCFG_B1_P2_ROUTE_BASE 0x40011500\r
-#define CYDEV_UCFG_B1_P2_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P3_BASE 0x40011600\r
-#define CYDEV_UCFG_B1_P3_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P3_U0_BASE 0x40011600\r
-#define CYDEV_UCFG_B1_P3_U0_SIZE 0x00000070\r
-#define CYREG_B1_P3_U0_PLD_IT0 0x40011600\r
-#define CYREG_B1_P3_U0_PLD_IT1 0x40011604\r
-#define CYREG_B1_P3_U0_PLD_IT2 0x40011608\r
-#define CYREG_B1_P3_U0_PLD_IT3 0x4001160c\r
-#define CYREG_B1_P3_U0_PLD_IT4 0x40011610\r
-#define CYREG_B1_P3_U0_PLD_IT5 0x40011614\r
-#define CYREG_B1_P3_U0_PLD_IT6 0x40011618\r
-#define CYREG_B1_P3_U0_PLD_IT7 0x4001161c\r
-#define CYREG_B1_P3_U0_PLD_IT8 0x40011620\r
-#define CYREG_B1_P3_U0_PLD_IT9 0x40011624\r
-#define CYREG_B1_P3_U0_PLD_IT10 0x40011628\r
-#define CYREG_B1_P3_U0_PLD_IT11 0x4001162c\r
-#define CYREG_B1_P3_U0_PLD_ORT0 0x40011630\r
-#define CYREG_B1_P3_U0_PLD_ORT1 0x40011632\r
-#define CYREG_B1_P3_U0_PLD_ORT2 0x40011634\r
-#define CYREG_B1_P3_U0_PLD_ORT3 0x40011636\r
-#define CYREG_B1_P3_U0_MC_CFG_CEN_CONST 0x40011638\r
-#define CYREG_B1_P3_U0_MC_CFG_XORFB 0x4001163a\r
-#define CYREG_B1_P3_U0_MC_CFG_SET_RESET 0x4001163c\r
-#define CYREG_B1_P3_U0_MC_CFG_BYPASS 0x4001163e\r
-#define CYREG_B1_P3_U0_CFG0 0x40011640\r
-#define CYREG_B1_P3_U0_CFG1 0x40011641\r
-#define CYREG_B1_P3_U0_CFG2 0x40011642\r
-#define CYREG_B1_P3_U0_CFG3 0x40011643\r
-#define CYREG_B1_P3_U0_CFG4 0x40011644\r
-#define CYREG_B1_P3_U0_CFG5 0x40011645\r
-#define CYREG_B1_P3_U0_CFG6 0x40011646\r
-#define CYREG_B1_P3_U0_CFG7 0x40011647\r
-#define CYREG_B1_P3_U0_CFG8 0x40011648\r
-#define CYREG_B1_P3_U0_CFG9 0x40011649\r
-#define CYREG_B1_P3_U0_CFG10 0x4001164a\r
-#define CYREG_B1_P3_U0_CFG11 0x4001164b\r
-#define CYREG_B1_P3_U0_CFG12 0x4001164c\r
-#define CYREG_B1_P3_U0_CFG13 0x4001164d\r
-#define CYREG_B1_P3_U0_CFG14 0x4001164e\r
-#define CYREG_B1_P3_U0_CFG15 0x4001164f\r
-#define CYREG_B1_P3_U0_CFG16 0x40011650\r
-#define CYREG_B1_P3_U0_CFG17 0x40011651\r
-#define CYREG_B1_P3_U0_CFG18 0x40011652\r
-#define CYREG_B1_P3_U0_CFG19 0x40011653\r
-#define CYREG_B1_P3_U0_CFG20 0x40011654\r
-#define CYREG_B1_P3_U0_CFG21 0x40011655\r
-#define CYREG_B1_P3_U0_CFG22 0x40011656\r
-#define CYREG_B1_P3_U0_CFG23 0x40011657\r
-#define CYREG_B1_P3_U0_CFG24 0x40011658\r
-#define CYREG_B1_P3_U0_CFG25 0x40011659\r
-#define CYREG_B1_P3_U0_CFG26 0x4001165a\r
-#define CYREG_B1_P3_U0_CFG27 0x4001165b\r
-#define CYREG_B1_P3_U0_CFG28 0x4001165c\r
-#define CYREG_B1_P3_U0_CFG29 0x4001165d\r
-#define CYREG_B1_P3_U0_CFG30 0x4001165e\r
-#define CYREG_B1_P3_U0_CFG31 0x4001165f\r
-#define CYREG_B1_P3_U0_DCFG0 0x40011660\r
-#define CYREG_B1_P3_U0_DCFG1 0x40011662\r
-#define CYREG_B1_P3_U0_DCFG2 0x40011664\r
-#define CYREG_B1_P3_U0_DCFG3 0x40011666\r
-#define CYREG_B1_P3_U0_DCFG4 0x40011668\r
-#define CYREG_B1_P3_U0_DCFG5 0x4001166a\r
-#define CYREG_B1_P3_U0_DCFG6 0x4001166c\r
-#define CYREG_B1_P3_U0_DCFG7 0x4001166e\r
-#define CYDEV_UCFG_B1_P3_U1_BASE 0x40011680\r
-#define CYDEV_UCFG_B1_P3_U1_SIZE 0x00000070\r
-#define CYREG_B1_P3_U1_PLD_IT0 0x40011680\r
-#define CYREG_B1_P3_U1_PLD_IT1 0x40011684\r
-#define CYREG_B1_P3_U1_PLD_IT2 0x40011688\r
-#define CYREG_B1_P3_U1_PLD_IT3 0x4001168c\r
-#define CYREG_B1_P3_U1_PLD_IT4 0x40011690\r
-#define CYREG_B1_P3_U1_PLD_IT5 0x40011694\r
-#define CYREG_B1_P3_U1_PLD_IT6 0x40011698\r
-#define CYREG_B1_P3_U1_PLD_IT7 0x4001169c\r
-#define CYREG_B1_P3_U1_PLD_IT8 0x400116a0\r
-#define CYREG_B1_P3_U1_PLD_IT9 0x400116a4\r
-#define CYREG_B1_P3_U1_PLD_IT10 0x400116a8\r
-#define CYREG_B1_P3_U1_PLD_IT11 0x400116ac\r
-#define CYREG_B1_P3_U1_PLD_ORT0 0x400116b0\r
-#define CYREG_B1_P3_U1_PLD_ORT1 0x400116b2\r
-#define CYREG_B1_P3_U1_PLD_ORT2 0x400116b4\r
-#define CYREG_B1_P3_U1_PLD_ORT3 0x400116b6\r
-#define CYREG_B1_P3_U1_MC_CFG_CEN_CONST 0x400116b8\r
-#define CYREG_B1_P3_U1_MC_CFG_XORFB 0x400116ba\r
-#define CYREG_B1_P3_U1_MC_CFG_SET_RESET 0x400116bc\r
-#define CYREG_B1_P3_U1_MC_CFG_BYPASS 0x400116be\r
-#define CYREG_B1_P3_U1_CFG0 0x400116c0\r
-#define CYREG_B1_P3_U1_CFG1 0x400116c1\r
-#define CYREG_B1_P3_U1_CFG2 0x400116c2\r
-#define CYREG_B1_P3_U1_CFG3 0x400116c3\r
-#define CYREG_B1_P3_U1_CFG4 0x400116c4\r
-#define CYREG_B1_P3_U1_CFG5 0x400116c5\r
-#define CYREG_B1_P3_U1_CFG6 0x400116c6\r
-#define CYREG_B1_P3_U1_CFG7 0x400116c7\r
-#define CYREG_B1_P3_U1_CFG8 0x400116c8\r
-#define CYREG_B1_P3_U1_CFG9 0x400116c9\r
-#define CYREG_B1_P3_U1_CFG10 0x400116ca\r
-#define CYREG_B1_P3_U1_CFG11 0x400116cb\r
-#define CYREG_B1_P3_U1_CFG12 0x400116cc\r
-#define CYREG_B1_P3_U1_CFG13 0x400116cd\r
-#define CYREG_B1_P3_U1_CFG14 0x400116ce\r
-#define CYREG_B1_P3_U1_CFG15 0x400116cf\r
-#define CYREG_B1_P3_U1_CFG16 0x400116d0\r
-#define CYREG_B1_P3_U1_CFG17 0x400116d1\r
-#define CYREG_B1_P3_U1_CFG18 0x400116d2\r
-#define CYREG_B1_P3_U1_CFG19 0x400116d3\r
-#define CYREG_B1_P3_U1_CFG20 0x400116d4\r
-#define CYREG_B1_P3_U1_CFG21 0x400116d5\r
-#define CYREG_B1_P3_U1_CFG22 0x400116d6\r
-#define CYREG_B1_P3_U1_CFG23 0x400116d7\r
-#define CYREG_B1_P3_U1_CFG24 0x400116d8\r
-#define CYREG_B1_P3_U1_CFG25 0x400116d9\r
-#define CYREG_B1_P3_U1_CFG26 0x400116da\r
-#define CYREG_B1_P3_U1_CFG27 0x400116db\r
-#define CYREG_B1_P3_U1_CFG28 0x400116dc\r
-#define CYREG_B1_P3_U1_CFG29 0x400116dd\r
-#define CYREG_B1_P3_U1_CFG30 0x400116de\r
-#define CYREG_B1_P3_U1_CFG31 0x400116df\r
-#define CYREG_B1_P3_U1_DCFG0 0x400116e0\r
-#define CYREG_B1_P3_U1_DCFG1 0x400116e2\r
-#define CYREG_B1_P3_U1_DCFG2 0x400116e4\r
-#define CYREG_B1_P3_U1_DCFG3 0x400116e6\r
-#define CYREG_B1_P3_U1_DCFG4 0x400116e8\r
-#define CYREG_B1_P3_U1_DCFG5 0x400116ea\r
-#define CYREG_B1_P3_U1_DCFG6 0x400116ec\r
-#define CYREG_B1_P3_U1_DCFG7 0x400116ee\r
-#define CYDEV_UCFG_B1_P3_ROUTE_BASE 0x40011700\r
-#define CYDEV_UCFG_B1_P3_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P4_BASE 0x40011800\r
-#define CYDEV_UCFG_B1_P4_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P4_U0_BASE 0x40011800\r
-#define CYDEV_UCFG_B1_P4_U0_SIZE 0x00000070\r
-#define CYREG_B1_P4_U0_PLD_IT0 0x40011800\r
-#define CYREG_B1_P4_U0_PLD_IT1 0x40011804\r
-#define CYREG_B1_P4_U0_PLD_IT2 0x40011808\r
-#define CYREG_B1_P4_U0_PLD_IT3 0x4001180c\r
-#define CYREG_B1_P4_U0_PLD_IT4 0x40011810\r
-#define CYREG_B1_P4_U0_PLD_IT5 0x40011814\r
-#define CYREG_B1_P4_U0_PLD_IT6 0x40011818\r
-#define CYREG_B1_P4_U0_PLD_IT7 0x4001181c\r
-#define CYREG_B1_P4_U0_PLD_IT8 0x40011820\r
-#define CYREG_B1_P4_U0_PLD_IT9 0x40011824\r
-#define CYREG_B1_P4_U0_PLD_IT10 0x40011828\r
-#define CYREG_B1_P4_U0_PLD_IT11 0x4001182c\r
-#define CYREG_B1_P4_U0_PLD_ORT0 0x40011830\r
-#define CYREG_B1_P4_U0_PLD_ORT1 0x40011832\r
-#define CYREG_B1_P4_U0_PLD_ORT2 0x40011834\r
-#define CYREG_B1_P4_U0_PLD_ORT3 0x40011836\r
-#define CYREG_B1_P4_U0_MC_CFG_CEN_CONST 0x40011838\r
-#define CYREG_B1_P4_U0_MC_CFG_XORFB 0x4001183a\r
-#define CYREG_B1_P4_U0_MC_CFG_SET_RESET 0x4001183c\r
-#define CYREG_B1_P4_U0_MC_CFG_BYPASS 0x4001183e\r
-#define CYREG_B1_P4_U0_CFG0 0x40011840\r
-#define CYREG_B1_P4_U0_CFG1 0x40011841\r
-#define CYREG_B1_P4_U0_CFG2 0x40011842\r
-#define CYREG_B1_P4_U0_CFG3 0x40011843\r
-#define CYREG_B1_P4_U0_CFG4 0x40011844\r
-#define CYREG_B1_P4_U0_CFG5 0x40011845\r
-#define CYREG_B1_P4_U0_CFG6 0x40011846\r
-#define CYREG_B1_P4_U0_CFG7 0x40011847\r
-#define CYREG_B1_P4_U0_CFG8 0x40011848\r
-#define CYREG_B1_P4_U0_CFG9 0x40011849\r
-#define CYREG_B1_P4_U0_CFG10 0x4001184a\r
-#define CYREG_B1_P4_U0_CFG11 0x4001184b\r
-#define CYREG_B1_P4_U0_CFG12 0x4001184c\r
-#define CYREG_B1_P4_U0_CFG13 0x4001184d\r
-#define CYREG_B1_P4_U0_CFG14 0x4001184e\r
-#define CYREG_B1_P4_U0_CFG15 0x4001184f\r
-#define CYREG_B1_P4_U0_CFG16 0x40011850\r
-#define CYREG_B1_P4_U0_CFG17 0x40011851\r
-#define CYREG_B1_P4_U0_CFG18 0x40011852\r
-#define CYREG_B1_P4_U0_CFG19 0x40011853\r
-#define CYREG_B1_P4_U0_CFG20 0x40011854\r
-#define CYREG_B1_P4_U0_CFG21 0x40011855\r
-#define CYREG_B1_P4_U0_CFG22 0x40011856\r
-#define CYREG_B1_P4_U0_CFG23 0x40011857\r
-#define CYREG_B1_P4_U0_CFG24 0x40011858\r
-#define CYREG_B1_P4_U0_CFG25 0x40011859\r
-#define CYREG_B1_P4_U0_CFG26 0x4001185a\r
-#define CYREG_B1_P4_U0_CFG27 0x4001185b\r
-#define CYREG_B1_P4_U0_CFG28 0x4001185c\r
-#define CYREG_B1_P4_U0_CFG29 0x4001185d\r
-#define CYREG_B1_P4_U0_CFG30 0x4001185e\r
-#define CYREG_B1_P4_U0_CFG31 0x4001185f\r
-#define CYREG_B1_P4_U0_DCFG0 0x40011860\r
-#define CYREG_B1_P4_U0_DCFG1 0x40011862\r
-#define CYREG_B1_P4_U0_DCFG2 0x40011864\r
-#define CYREG_B1_P4_U0_DCFG3 0x40011866\r
-#define CYREG_B1_P4_U0_DCFG4 0x40011868\r
-#define CYREG_B1_P4_U0_DCFG5 0x4001186a\r
-#define CYREG_B1_P4_U0_DCFG6 0x4001186c\r
-#define CYREG_B1_P4_U0_DCFG7 0x4001186e\r
-#define CYDEV_UCFG_B1_P4_U1_BASE 0x40011880\r
-#define CYDEV_UCFG_B1_P4_U1_SIZE 0x00000070\r
-#define CYREG_B1_P4_U1_PLD_IT0 0x40011880\r
-#define CYREG_B1_P4_U1_PLD_IT1 0x40011884\r
-#define CYREG_B1_P4_U1_PLD_IT2 0x40011888\r
-#define CYREG_B1_P4_U1_PLD_IT3 0x4001188c\r
-#define CYREG_B1_P4_U1_PLD_IT4 0x40011890\r
-#define CYREG_B1_P4_U1_PLD_IT5 0x40011894\r
-#define CYREG_B1_P4_U1_PLD_IT6 0x40011898\r
-#define CYREG_B1_P4_U1_PLD_IT7 0x4001189c\r
-#define CYREG_B1_P4_U1_PLD_IT8 0x400118a0\r
-#define CYREG_B1_P4_U1_PLD_IT9 0x400118a4\r
-#define CYREG_B1_P4_U1_PLD_IT10 0x400118a8\r
-#define CYREG_B1_P4_U1_PLD_IT11 0x400118ac\r
-#define CYREG_B1_P4_U1_PLD_ORT0 0x400118b0\r
-#define CYREG_B1_P4_U1_PLD_ORT1 0x400118b2\r
-#define CYREG_B1_P4_U1_PLD_ORT2 0x400118b4\r
-#define CYREG_B1_P4_U1_PLD_ORT3 0x400118b6\r
-#define CYREG_B1_P4_U1_MC_CFG_CEN_CONST 0x400118b8\r
-#define CYREG_B1_P4_U1_MC_CFG_XORFB 0x400118ba\r
-#define CYREG_B1_P4_U1_MC_CFG_SET_RESET 0x400118bc\r
-#define CYREG_B1_P4_U1_MC_CFG_BYPASS 0x400118be\r
-#define CYREG_B1_P4_U1_CFG0 0x400118c0\r
-#define CYREG_B1_P4_U1_CFG1 0x400118c1\r
-#define CYREG_B1_P4_U1_CFG2 0x400118c2\r
-#define CYREG_B1_P4_U1_CFG3 0x400118c3\r
-#define CYREG_B1_P4_U1_CFG4 0x400118c4\r
-#define CYREG_B1_P4_U1_CFG5 0x400118c5\r
-#define CYREG_B1_P4_U1_CFG6 0x400118c6\r
-#define CYREG_B1_P4_U1_CFG7 0x400118c7\r
-#define CYREG_B1_P4_U1_CFG8 0x400118c8\r
-#define CYREG_B1_P4_U1_CFG9 0x400118c9\r
-#define CYREG_B1_P4_U1_CFG10 0x400118ca\r
-#define CYREG_B1_P4_U1_CFG11 0x400118cb\r
-#define CYREG_B1_P4_U1_CFG12 0x400118cc\r
-#define CYREG_B1_P4_U1_CFG13 0x400118cd\r
-#define CYREG_B1_P4_U1_CFG14 0x400118ce\r
-#define CYREG_B1_P4_U1_CFG15 0x400118cf\r
-#define CYREG_B1_P4_U1_CFG16 0x400118d0\r
-#define CYREG_B1_P4_U1_CFG17 0x400118d1\r
-#define CYREG_B1_P4_U1_CFG18 0x400118d2\r
-#define CYREG_B1_P4_U1_CFG19 0x400118d3\r
-#define CYREG_B1_P4_U1_CFG20 0x400118d4\r
-#define CYREG_B1_P4_U1_CFG21 0x400118d5\r
-#define CYREG_B1_P4_U1_CFG22 0x400118d6\r
-#define CYREG_B1_P4_U1_CFG23 0x400118d7\r
-#define CYREG_B1_P4_U1_CFG24 0x400118d8\r
-#define CYREG_B1_P4_U1_CFG25 0x400118d9\r
-#define CYREG_B1_P4_U1_CFG26 0x400118da\r
-#define CYREG_B1_P4_U1_CFG27 0x400118db\r
-#define CYREG_B1_P4_U1_CFG28 0x400118dc\r
-#define CYREG_B1_P4_U1_CFG29 0x400118dd\r
-#define CYREG_B1_P4_U1_CFG30 0x400118de\r
-#define CYREG_B1_P4_U1_CFG31 0x400118df\r
-#define CYREG_B1_P4_U1_DCFG0 0x400118e0\r
-#define CYREG_B1_P4_U1_DCFG1 0x400118e2\r
-#define CYREG_B1_P4_U1_DCFG2 0x400118e4\r
-#define CYREG_B1_P4_U1_DCFG3 0x400118e6\r
-#define CYREG_B1_P4_U1_DCFG4 0x400118e8\r
-#define CYREG_B1_P4_U1_DCFG5 0x400118ea\r
-#define CYREG_B1_P4_U1_DCFG6 0x400118ec\r
-#define CYREG_B1_P4_U1_DCFG7 0x400118ee\r
-#define CYDEV_UCFG_B1_P4_ROUTE_BASE 0x40011900\r
-#define CYDEV_UCFG_B1_P4_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_B1_P5_BASE 0x40011a00\r
-#define CYDEV_UCFG_B1_P5_SIZE 0x000001ef\r
-#define CYDEV_UCFG_B1_P5_U0_BASE 0x40011a00\r
-#define CYDEV_UCFG_B1_P5_U0_SIZE 0x00000070\r
-#define CYREG_B1_P5_U0_PLD_IT0 0x40011a00\r
-#define CYREG_B1_P5_U0_PLD_IT1 0x40011a04\r
-#define CYREG_B1_P5_U0_PLD_IT2 0x40011a08\r
-#define CYREG_B1_P5_U0_PLD_IT3 0x40011a0c\r
-#define CYREG_B1_P5_U0_PLD_IT4 0x40011a10\r
-#define CYREG_B1_P5_U0_PLD_IT5 0x40011a14\r
-#define CYREG_B1_P5_U0_PLD_IT6 0x40011a18\r
-#define CYREG_B1_P5_U0_PLD_IT7 0x40011a1c\r
-#define CYREG_B1_P5_U0_PLD_IT8 0x40011a20\r
-#define CYREG_B1_P5_U0_PLD_IT9 0x40011a24\r
-#define CYREG_B1_P5_U0_PLD_IT10 0x40011a28\r
-#define CYREG_B1_P5_U0_PLD_IT11 0x40011a2c\r
-#define CYREG_B1_P5_U0_PLD_ORT0 0x40011a30\r
-#define CYREG_B1_P5_U0_PLD_ORT1 0x40011a32\r
-#define CYREG_B1_P5_U0_PLD_ORT2 0x40011a34\r
-#define CYREG_B1_P5_U0_PLD_ORT3 0x40011a36\r
-#define CYREG_B1_P5_U0_MC_CFG_CEN_CONST 0x40011a38\r
-#define CYREG_B1_P5_U0_MC_CFG_XORFB 0x40011a3a\r
-#define CYREG_B1_P5_U0_MC_CFG_SET_RESET 0x40011a3c\r
-#define CYREG_B1_P5_U0_MC_CFG_BYPASS 0x40011a3e\r
-#define CYREG_B1_P5_U0_CFG0 0x40011a40\r
-#define CYREG_B1_P5_U0_CFG1 0x40011a41\r
-#define CYREG_B1_P5_U0_CFG2 0x40011a42\r
-#define CYREG_B1_P5_U0_CFG3 0x40011a43\r
-#define CYREG_B1_P5_U0_CFG4 0x40011a44\r
-#define CYREG_B1_P5_U0_CFG5 0x40011a45\r
-#define CYREG_B1_P5_U0_CFG6 0x40011a46\r
-#define CYREG_B1_P5_U0_CFG7 0x40011a47\r
-#define CYREG_B1_P5_U0_CFG8 0x40011a48\r
-#define CYREG_B1_P5_U0_CFG9 0x40011a49\r
-#define CYREG_B1_P5_U0_CFG10 0x40011a4a\r
-#define CYREG_B1_P5_U0_CFG11 0x40011a4b\r
-#define CYREG_B1_P5_U0_CFG12 0x40011a4c\r
-#define CYREG_B1_P5_U0_CFG13 0x40011a4d\r
-#define CYREG_B1_P5_U0_CFG14 0x40011a4e\r
-#define CYREG_B1_P5_U0_CFG15 0x40011a4f\r
-#define CYREG_B1_P5_U0_CFG16 0x40011a50\r
-#define CYREG_B1_P5_U0_CFG17 0x40011a51\r
-#define CYREG_B1_P5_U0_CFG18 0x40011a52\r
-#define CYREG_B1_P5_U0_CFG19 0x40011a53\r
-#define CYREG_B1_P5_U0_CFG20 0x40011a54\r
-#define CYREG_B1_P5_U0_CFG21 0x40011a55\r
-#define CYREG_B1_P5_U0_CFG22 0x40011a56\r
-#define CYREG_B1_P5_U0_CFG23 0x40011a57\r
-#define CYREG_B1_P5_U0_CFG24 0x40011a58\r
-#define CYREG_B1_P5_U0_CFG25 0x40011a59\r
-#define CYREG_B1_P5_U0_CFG26 0x40011a5a\r
-#define CYREG_B1_P5_U0_CFG27 0x40011a5b\r
-#define CYREG_B1_P5_U0_CFG28 0x40011a5c\r
-#define CYREG_B1_P5_U0_CFG29 0x40011a5d\r
-#define CYREG_B1_P5_U0_CFG30 0x40011a5e\r
-#define CYREG_B1_P5_U0_CFG31 0x40011a5f\r
-#define CYREG_B1_P5_U0_DCFG0 0x40011a60\r
-#define CYREG_B1_P5_U0_DCFG1 0x40011a62\r
-#define CYREG_B1_P5_U0_DCFG2 0x40011a64\r
-#define CYREG_B1_P5_U0_DCFG3 0x40011a66\r
-#define CYREG_B1_P5_U0_DCFG4 0x40011a68\r
-#define CYREG_B1_P5_U0_DCFG5 0x40011a6a\r
-#define CYREG_B1_P5_U0_DCFG6 0x40011a6c\r
-#define CYREG_B1_P5_U0_DCFG7 0x40011a6e\r
-#define CYDEV_UCFG_B1_P5_U1_BASE 0x40011a80\r
-#define CYDEV_UCFG_B1_P5_U1_SIZE 0x00000070\r
-#define CYREG_B1_P5_U1_PLD_IT0 0x40011a80\r
-#define CYREG_B1_P5_U1_PLD_IT1 0x40011a84\r
-#define CYREG_B1_P5_U1_PLD_IT2 0x40011a88\r
-#define CYREG_B1_P5_U1_PLD_IT3 0x40011a8c\r
-#define CYREG_B1_P5_U1_PLD_IT4 0x40011a90\r
-#define CYREG_B1_P5_U1_PLD_IT5 0x40011a94\r
-#define CYREG_B1_P5_U1_PLD_IT6 0x40011a98\r
-#define CYREG_B1_P5_U1_PLD_IT7 0x40011a9c\r
-#define CYREG_B1_P5_U1_PLD_IT8 0x40011aa0\r
-#define CYREG_B1_P5_U1_PLD_IT9 0x40011aa4\r
-#define CYREG_B1_P5_U1_PLD_IT10 0x40011aa8\r
-#define CYREG_B1_P5_U1_PLD_IT11 0x40011aac\r
-#define CYREG_B1_P5_U1_PLD_ORT0 0x40011ab0\r
-#define CYREG_B1_P5_U1_PLD_ORT1 0x40011ab2\r
-#define CYREG_B1_P5_U1_PLD_ORT2 0x40011ab4\r
-#define CYREG_B1_P5_U1_PLD_ORT3 0x40011ab6\r
-#define CYREG_B1_P5_U1_MC_CFG_CEN_CONST 0x40011ab8\r
-#define CYREG_B1_P5_U1_MC_CFG_XORFB 0x40011aba\r
-#define CYREG_B1_P5_U1_MC_CFG_SET_RESET 0x40011abc\r
-#define CYREG_B1_P5_U1_MC_CFG_BYPASS 0x40011abe\r
-#define CYREG_B1_P5_U1_CFG0 0x40011ac0\r
-#define CYREG_B1_P5_U1_CFG1 0x40011ac1\r
-#define CYREG_B1_P5_U1_CFG2 0x40011ac2\r
-#define CYREG_B1_P5_U1_CFG3 0x40011ac3\r
-#define CYREG_B1_P5_U1_CFG4 0x40011ac4\r
-#define CYREG_B1_P5_U1_CFG5 0x40011ac5\r
-#define CYREG_B1_P5_U1_CFG6 0x40011ac6\r
-#define CYREG_B1_P5_U1_CFG7 0x40011ac7\r
-#define CYREG_B1_P5_U1_CFG8 0x40011ac8\r
-#define CYREG_B1_P5_U1_CFG9 0x40011ac9\r
-#define CYREG_B1_P5_U1_CFG10 0x40011aca\r
-#define CYREG_B1_P5_U1_CFG11 0x40011acb\r
-#define CYREG_B1_P5_U1_CFG12 0x40011acc\r
-#define CYREG_B1_P5_U1_CFG13 0x40011acd\r
-#define CYREG_B1_P5_U1_CFG14 0x40011ace\r
-#define CYREG_B1_P5_U1_CFG15 0x40011acf\r
-#define CYREG_B1_P5_U1_CFG16 0x40011ad0\r
-#define CYREG_B1_P5_U1_CFG17 0x40011ad1\r
-#define CYREG_B1_P5_U1_CFG18 0x40011ad2\r
-#define CYREG_B1_P5_U1_CFG19 0x40011ad3\r
-#define CYREG_B1_P5_U1_CFG20 0x40011ad4\r
-#define CYREG_B1_P5_U1_CFG21 0x40011ad5\r
-#define CYREG_B1_P5_U1_CFG22 0x40011ad6\r
-#define CYREG_B1_P5_U1_CFG23 0x40011ad7\r
-#define CYREG_B1_P5_U1_CFG24 0x40011ad8\r
-#define CYREG_B1_P5_U1_CFG25 0x40011ad9\r
-#define CYREG_B1_P5_U1_CFG26 0x40011ada\r
-#define CYREG_B1_P5_U1_CFG27 0x40011adb\r
-#define CYREG_B1_P5_U1_CFG28 0x40011adc\r
-#define CYREG_B1_P5_U1_CFG29 0x40011add\r
-#define CYREG_B1_P5_U1_CFG30 0x40011ade\r
-#define CYREG_B1_P5_U1_CFG31 0x40011adf\r
-#define CYREG_B1_P5_U1_DCFG0 0x40011ae0\r
-#define CYREG_B1_P5_U1_DCFG1 0x40011ae2\r
-#define CYREG_B1_P5_U1_DCFG2 0x40011ae4\r
-#define CYREG_B1_P5_U1_DCFG3 0x40011ae6\r
-#define CYREG_B1_P5_U1_DCFG4 0x40011ae8\r
-#define CYREG_B1_P5_U1_DCFG5 0x40011aea\r
-#define CYREG_B1_P5_U1_DCFG6 0x40011aec\r
-#define CYREG_B1_P5_U1_DCFG7 0x40011aee\r
-#define CYDEV_UCFG_B1_P5_ROUTE_BASE 0x40011b00\r
-#define CYDEV_UCFG_B1_P5_ROUTE_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI0_BASE 0x40014000\r
-#define CYDEV_UCFG_DSI0_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI1_BASE 0x40014100\r
-#define CYDEV_UCFG_DSI1_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI2_BASE 0x40014200\r
-#define CYDEV_UCFG_DSI2_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI3_BASE 0x40014300\r
-#define CYDEV_UCFG_DSI3_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI4_BASE 0x40014400\r
-#define CYDEV_UCFG_DSI4_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI5_BASE 0x40014500\r
-#define CYDEV_UCFG_DSI5_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI6_BASE 0x40014600\r
-#define CYDEV_UCFG_DSI6_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI7_BASE 0x40014700\r
-#define CYDEV_UCFG_DSI7_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI8_BASE 0x40014800\r
-#define CYDEV_UCFG_DSI8_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI9_BASE 0x40014900\r
-#define CYDEV_UCFG_DSI9_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI12_BASE 0x40014c00\r
-#define CYDEV_UCFG_DSI12_SIZE 0x000000ef\r
-#define CYDEV_UCFG_DSI13_BASE 0x40014d00\r
-#define CYDEV_UCFG_DSI13_SIZE 0x000000ef\r
-#define CYDEV_UCFG_BCTL0_BASE 0x40015000\r
-#define CYDEV_UCFG_BCTL0_SIZE 0x00000010\r
-#define CYREG_BCTL0_MDCLK_EN 0x40015000\r
-#define CYREG_BCTL0_MBCLK_EN 0x40015001\r
-#define CYREG_BCTL0_WAIT_CFG 0x40015002\r
-#define CYREG_BCTL0_BANK_CTL 0x40015003\r
-#define CYREG_BCTL0_UDB_TEST_3 0x40015007\r
-#define CYREG_BCTL0_DCLK_EN0 0x40015008\r
-#define CYREG_BCTL0_BCLK_EN0 0x40015009\r
-#define CYREG_BCTL0_DCLK_EN1 0x4001500a\r
-#define CYREG_BCTL0_BCLK_EN1 0x4001500b\r
-#define CYREG_BCTL0_DCLK_EN2 0x4001500c\r
-#define CYREG_BCTL0_BCLK_EN2 0x4001500d\r
-#define CYREG_BCTL0_DCLK_EN3 0x4001500e\r
-#define CYREG_BCTL0_BCLK_EN3 0x4001500f\r
-#define CYDEV_UCFG_BCTL1_BASE 0x40015010\r
-#define CYDEV_UCFG_BCTL1_SIZE 0x00000010\r
-#define CYREG_BCTL1_MDCLK_EN 0x40015010\r
-#define CYREG_BCTL1_MBCLK_EN 0x40015011\r
-#define CYREG_BCTL1_WAIT_CFG 0x40015012\r
-#define CYREG_BCTL1_BANK_CTL 0x40015013\r
-#define CYREG_BCTL1_UDB_TEST_3 0x40015017\r
-#define CYREG_BCTL1_DCLK_EN0 0x40015018\r
-#define CYREG_BCTL1_BCLK_EN0 0x40015019\r
-#define CYREG_BCTL1_DCLK_EN1 0x4001501a\r
-#define CYREG_BCTL1_BCLK_EN1 0x4001501b\r
-#define CYREG_BCTL1_DCLK_EN2 0x4001501c\r
-#define CYREG_BCTL1_BCLK_EN2 0x4001501d\r
-#define CYREG_BCTL1_DCLK_EN3 0x4001501e\r
-#define CYREG_BCTL1_BCLK_EN3 0x4001501f\r
-#define CYDEV_IDMUX_BASE 0x40015100\r
-#define CYDEV_IDMUX_SIZE 0x00000016\r
-#define CYREG_IDMUX_IRQ_CTL0 0x40015100\r
-#define CYREG_IDMUX_IRQ_CTL1 0x40015101\r
-#define CYREG_IDMUX_IRQ_CTL2 0x40015102\r
-#define CYREG_IDMUX_IRQ_CTL3 0x40015103\r
-#define CYREG_IDMUX_IRQ_CTL4 0x40015104\r
-#define CYREG_IDMUX_IRQ_CTL5 0x40015105\r
-#define CYREG_IDMUX_IRQ_CTL6 0x40015106\r
-#define CYREG_IDMUX_IRQ_CTL7 0x40015107\r
-#define CYREG_IDMUX_DRQ_CTL0 0x40015110\r
-#define CYREG_IDMUX_DRQ_CTL1 0x40015111\r
-#define CYREG_IDMUX_DRQ_CTL2 0x40015112\r
-#define CYREG_IDMUX_DRQ_CTL3 0x40015113\r
-#define CYREG_IDMUX_DRQ_CTL4 0x40015114\r
-#define CYREG_IDMUX_DRQ_CTL5 0x40015115\r
-#define CYDEV_CACHERAM_BASE 0x40030000\r
-#define CYDEV_CACHERAM_SIZE 0x00000400\r
-#define CYREG_CACHERAM_DATA_MBASE 0x40030000\r
-#define CYREG_CACHERAM_DATA_MSIZE 0x00000400\r
-#define CYDEV_SFR_BASE 0x40050100\r
-#define CYDEV_SFR_SIZE 0x000000fb\r
-#define CYREG_SFR_GPIO0 0x40050180\r
-#define CYREG_SFR_GPIRD0 0x40050189\r
-#define CYREG_SFR_GPIO0_SEL 0x4005018a\r
-#define CYREG_SFR_GPIO1 0x40050190\r
-#define CYREG_SFR_GPIRD1 0x40050191\r
-#define CYREG_SFR_GPIO2 0x40050198\r
-#define CYREG_SFR_GPIRD2 0x40050199\r
-#define CYREG_SFR_GPIO2_SEL 0x4005019a\r
-#define CYREG_SFR_GPIO1_SEL 0x400501a2\r
-#define CYREG_SFR_GPIO3 0x400501b0\r
-#define CYREG_SFR_GPIRD3 0x400501b1\r
-#define CYREG_SFR_GPIO3_SEL 0x400501b2\r
-#define CYREG_SFR_GPIO4 0x400501c0\r
-#define CYREG_SFR_GPIRD4 0x400501c1\r
-#define CYREG_SFR_GPIO4_SEL 0x400501c2\r
-#define CYREG_SFR_GPIO5 0x400501c8\r
-#define CYREG_SFR_GPIRD5 0x400501c9\r
-#define CYREG_SFR_GPIO5_SEL 0x400501ca\r
-#define CYREG_SFR_GPIO6 0x400501d8\r
-#define CYREG_SFR_GPIRD6 0x400501d9\r
-#define CYREG_SFR_GPIO6_SEL 0x400501da\r
-#define CYREG_SFR_GPIO12 0x400501e8\r
-#define CYREG_SFR_GPIRD12 0x400501e9\r
-#define CYREG_SFR_GPIO12_SEL 0x400501f2\r
-#define CYREG_SFR_GPIO15 0x400501f8\r
-#define CYREG_SFR_GPIRD15 0x400501f9\r
-#define CYREG_SFR_GPIO15_SEL 0x400501fa\r
-#define CYDEV_P3BA_BASE 0x40050300\r
-#define CYDEV_P3BA_SIZE 0x0000002b\r
-#define CYREG_P3BA_Y_START 0x40050300\r
-#define CYREG_P3BA_YROLL 0x40050301\r
-#define CYREG_P3BA_YCFG 0x40050302\r
-#define CYREG_P3BA_X_START1 0x40050303\r
-#define CYREG_P3BA_X_START2 0x40050304\r
-#define CYREG_P3BA_XROLL1 0x40050305\r
-#define CYREG_P3BA_XROLL2 0x40050306\r
-#define CYREG_P3BA_XINC 0x40050307\r
-#define CYREG_P3BA_XCFG 0x40050308\r
-#define CYREG_P3BA_OFFSETADDR1 0x40050309\r
-#define CYREG_P3BA_OFFSETADDR2 0x4005030a\r
-#define CYREG_P3BA_OFFSETADDR3 0x4005030b\r
-#define CYREG_P3BA_ABSADDR1 0x4005030c\r
-#define CYREG_P3BA_ABSADDR2 0x4005030d\r
-#define CYREG_P3BA_ABSADDR3 0x4005030e\r
-#define CYREG_P3BA_ABSADDR4 0x4005030f\r
-#define CYREG_P3BA_DATCFG1 0x40050310\r
-#define CYREG_P3BA_DATCFG2 0x40050311\r
-#define CYREG_P3BA_CMP_RSLT1 0x40050314\r
-#define CYREG_P3BA_CMP_RSLT2 0x40050315\r
-#define CYREG_P3BA_CMP_RSLT3 0x40050316\r
-#define CYREG_P3BA_CMP_RSLT4 0x40050317\r
-#define CYREG_P3BA_DATA_REG1 0x40050318\r
-#define CYREG_P3BA_DATA_REG2 0x40050319\r
-#define CYREG_P3BA_DATA_REG3 0x4005031a\r
-#define CYREG_P3BA_DATA_REG4 0x4005031b\r
-#define CYREG_P3BA_EXP_DATA1 0x4005031c\r
-#define CYREG_P3BA_EXP_DATA2 0x4005031d\r
-#define CYREG_P3BA_EXP_DATA3 0x4005031e\r
-#define CYREG_P3BA_EXP_DATA4 0x4005031f\r
-#define CYREG_P3BA_MSTR_HRDATA1 0x40050320\r
-#define CYREG_P3BA_MSTR_HRDATA2 0x40050321\r
-#define CYREG_P3BA_MSTR_HRDATA3 0x40050322\r
-#define CYREG_P3BA_MSTR_HRDATA4 0x40050323\r
-#define CYREG_P3BA_BIST_EN 0x40050324\r
-#define CYREG_P3BA_PHUB_MASTER_SSR 0x40050325\r
-#define CYREG_P3BA_SEQCFG1 0x40050326\r
-#define CYREG_P3BA_SEQCFG2 0x40050327\r
-#define CYREG_P3BA_Y_CURR 0x40050328\r
-#define CYREG_P3BA_X_CURR1 0x40050329\r
-#define CYREG_P3BA_X_CURR2 0x4005032a\r
-#define CYDEV_PANTHER_BASE 0x40080000\r
-#define CYDEV_PANTHER_SIZE 0x00000020\r
-#define CYREG_PANTHER_STCALIB_CFG 0x40080000\r
-#define CYREG_PANTHER_WAITPIPE 0x40080004\r
-#define CYREG_PANTHER_TRACE_CFG 0x40080008\r
-#define CYREG_PANTHER_DBG_CFG 0x4008000c\r
-#define CYREG_PANTHER_CM3_LCKRST_STAT 0x40080018\r
-#define CYREG_PANTHER_DEVICE_ID 0x4008001c\r
-#define CYDEV_FLSECC_BASE 0x48000000\r
-#define CYDEV_FLSECC_SIZE 0x00008000\r
-#define CYREG_FLSECC_DATA_MBASE 0x48000000\r
-#define CYREG_FLSECC_DATA_MSIZE 0x00008000\r
-#define CYDEV_FLSHID_BASE 0x49000000\r
-#define CYDEV_FLSHID_SIZE 0x00000200\r
-#define CYREG_FLSHID_RSVD_MBASE 0x49000000\r
-#define CYREG_FLSHID_RSVD_MSIZE 0x00000080\r
-#define CYREG_FLSHID_CUST_MDATA_MBASE 0x49000080\r
-#define CYREG_FLSHID_CUST_MDATA_MSIZE 0x00000080\r
-#define CYDEV_FLSHID_CUST_TABLES_BASE 0x49000100\r
-#define CYDEV_FLSHID_CUST_TABLES_SIZE 0x00000040\r
-#define CYREG_FLSHID_CUST_TABLES_Y_LOC 0x49000100\r
-#define CYREG_FLSHID_CUST_TABLES_X_LOC 0x49000101\r
-#define CYREG_FLSHID_CUST_TABLES_WAFER_NUM 0x49000102\r
-#define CYREG_FLSHID_CUST_TABLES_LOT_LSB 0x49000103\r
-#define CYREG_FLSHID_CUST_TABLES_LOT_MSB 0x49000104\r
-#define CYREG_FLSHID_CUST_TABLES_WRK_WK 0x49000105\r
-#define CYREG_FLSHID_CUST_TABLES_FAB_YR 0x49000106\r
-#define CYREG_FLSHID_CUST_TABLES_MINOR 0x49000107\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_3MHZ 0x49000108\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_6MHZ 0x49000109\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_12MHZ 0x4900010a\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_24MHZ 0x4900010b\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_67MHZ 0x4900010c\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_80MHZ 0x4900010d\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_92MHZ 0x4900010e\r
-#define CYREG_FLSHID_CUST_TABLES_IMO_USB 0x4900010f\r
-#define CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS 0x49000110\r
-#define CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS 0x49000111\r
-#define CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS 0x49000112\r
-#define CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS 0x49000113\r
-#define CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS 0x49000114\r
-#define CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS 0x49000115\r
-#define CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS 0x49000116\r
-#define CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS 0x49000117\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M1 0x49000118\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M2 0x49000119\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M3 0x4900011a\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M4 0x4900011b\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M5 0x4900011c\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M6 0x4900011d\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M7 0x4900011e\r
-#define CYREG_FLSHID_CUST_TABLES_DEC_M8 0x4900011f\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M1 0x49000120\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M2 0x49000121\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M3 0x49000122\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M4 0x49000123\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M5 0x49000124\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M6 0x49000125\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M7 0x49000126\r
-#define CYREG_FLSHID_CUST_TABLES_DAC0_M8 0x49000127\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M1 0x49000128\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M2 0x49000129\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M3 0x4900012a\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M4 0x4900012b\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M5 0x4900012c\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M6 0x4900012d\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M7 0x4900012e\r
-#define CYREG_FLSHID_CUST_TABLES_DAC2_M8 0x4900012f\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M1 0x49000130\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M2 0x49000131\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M3 0x49000132\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M4 0x49000133\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M5 0x49000134\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M6 0x49000135\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M7 0x49000136\r
-#define CYREG_FLSHID_CUST_TABLES_DAC1_M8 0x49000137\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M1 0x49000138\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M2 0x49000139\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M3 0x4900013a\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M4 0x4900013b\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M5 0x4900013c\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M6 0x4900013d\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M7 0x4900013e\r
-#define CYREG_FLSHID_CUST_TABLES_DAC3_M8 0x4900013f\r
-#define CYDEV_FLSHID_MFG_CFG_BASE 0x49000180\r
-#define CYDEV_FLSHID_MFG_CFG_SIZE 0x00000080\r
-#define CYREG_FLSHID_MFG_CFG_IMO_TR1 0x49000188\r
-#define CYREG_FLSHID_MFG_CFG_CMP0_TR0 0x490001ac\r
-#define CYREG_FLSHID_MFG_CFG_CMP1_TR0 0x490001ae\r
-#define CYREG_FLSHID_MFG_CFG_CMP2_TR0 0x490001b0\r
-#define CYREG_FLSHID_MFG_CFG_CMP3_TR0 0x490001b2\r
-#define CYREG_FLSHID_MFG_CFG_CMP0_TR1 0x490001b4\r
-#define CYREG_FLSHID_MFG_CFG_CMP1_TR1 0x490001b6\r
-#define CYREG_FLSHID_MFG_CFG_CMP2_TR1 0x490001b8\r
-#define CYREG_FLSHID_MFG_CFG_CMP3_TR1 0x490001ba\r
-#define CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM 0x490001ce\r
-#define CYDEV_EXTMEM_BASE 0x60000000\r
-#define CYDEV_EXTMEM_SIZE 0x00800000\r
-#define CYREG_EXTMEM_DATA_MBASE 0x60000000\r
-#define CYREG_EXTMEM_DATA_MSIZE 0x00800000\r
-#define CYDEV_ITM_BASE 0xe0000000\r
-#define CYDEV_ITM_SIZE 0x00001000\r
-#define CYREG_ITM_TRACE_EN 0xe0000e00\r
-#define CYREG_ITM_TRACE_PRIVILEGE 0xe0000e40\r
-#define CYREG_ITM_TRACE_CTRL 0xe0000e80\r
-#define CYREG_ITM_LOCK_ACCESS 0xe0000fb0\r
-#define CYREG_ITM_LOCK_STATUS 0xe0000fb4\r
-#define CYREG_ITM_PID4 0xe0000fd0\r
-#define CYREG_ITM_PID5 0xe0000fd4\r
-#define CYREG_ITM_PID6 0xe0000fd8\r
-#define CYREG_ITM_PID7 0xe0000fdc\r
-#define CYREG_ITM_PID0 0xe0000fe0\r
-#define CYREG_ITM_PID1 0xe0000fe4\r
-#define CYREG_ITM_PID2 0xe0000fe8\r
-#define CYREG_ITM_PID3 0xe0000fec\r
-#define CYREG_ITM_CID0 0xe0000ff0\r
-#define CYREG_ITM_CID1 0xe0000ff4\r
-#define CYREG_ITM_CID2 0xe0000ff8\r
-#define CYREG_ITM_CID3 0xe0000ffc\r
-#define CYDEV_DWT_BASE 0xe0001000\r
-#define CYDEV_DWT_SIZE 0x0000005c\r
-#define CYREG_DWT_CTRL 0xe0001000\r
-#define CYREG_DWT_CYCLE_COUNT 0xe0001004\r
-#define CYREG_DWT_CPI_COUNT 0xe0001008\r
-#define CYREG_DWT_EXC_OVHD_COUNT 0xe000100c\r
-#define CYREG_DWT_SLEEP_COUNT 0xe0001010\r
-#define CYREG_DWT_LSU_COUNT 0xe0001014\r
-#define CYREG_DWT_FOLD_COUNT 0xe0001018\r
-#define CYREG_DWT_PC_SAMPLE 0xe000101c\r
-#define CYREG_DWT_COMP_0 0xe0001020\r
-#define CYREG_DWT_MASK_0 0xe0001024\r
-#define CYREG_DWT_FUNCTION_0 0xe0001028\r
-#define CYREG_DWT_COMP_1 0xe0001030\r
-#define CYREG_DWT_MASK_1 0xe0001034\r
-#define CYREG_DWT_FUNCTION_1 0xe0001038\r
-#define CYREG_DWT_COMP_2 0xe0001040\r
-#define CYREG_DWT_MASK_2 0xe0001044\r
-#define CYREG_DWT_FUNCTION_2 0xe0001048\r
-#define CYREG_DWT_COMP_3 0xe0001050\r
-#define CYREG_DWT_MASK_3 0xe0001054\r
-#define CYREG_DWT_FUNCTION_3 0xe0001058\r
-#define CYDEV_FPB_BASE 0xe0002000\r
-#define CYDEV_FPB_SIZE 0x00001000\r
-#define CYREG_FPB_CTRL 0xe0002000\r
-#define CYREG_FPB_REMAP 0xe0002004\r
-#define CYREG_FPB_FP_COMP_0 0xe0002008\r
-#define CYREG_FPB_FP_COMP_1 0xe000200c\r
-#define CYREG_FPB_FP_COMP_2 0xe0002010\r
-#define CYREG_FPB_FP_COMP_3 0xe0002014\r
-#define CYREG_FPB_FP_COMP_4 0xe0002018\r
-#define CYREG_FPB_FP_COMP_5 0xe000201c\r
-#define CYREG_FPB_FP_COMP_6 0xe0002020\r
-#define CYREG_FPB_FP_COMP_7 0xe0002024\r
-#define CYREG_FPB_PID4 0xe0002fd0\r
-#define CYREG_FPB_PID5 0xe0002fd4\r
-#define CYREG_FPB_PID6 0xe0002fd8\r
-#define CYREG_FPB_PID7 0xe0002fdc\r
-#define CYREG_FPB_PID0 0xe0002fe0\r
-#define CYREG_FPB_PID1 0xe0002fe4\r
-#define CYREG_FPB_PID2 0xe0002fe8\r
-#define CYREG_FPB_PID3 0xe0002fec\r
-#define CYREG_FPB_CID0 0xe0002ff0\r
-#define CYREG_FPB_CID1 0xe0002ff4\r
-#define CYREG_FPB_CID2 0xe0002ff8\r
-#define CYREG_FPB_CID3 0xe0002ffc\r
-#define CYDEV_NVIC_BASE 0xe000e000\r
-#define CYDEV_NVIC_SIZE 0x00000d3c\r
-#define CYREG_NVIC_INT_CTL_TYPE 0xe000e004\r
-#define CYREG_NVIC_SYSTICK_CTL 0xe000e010\r
-#define CYREG_NVIC_SYSTICK_RELOAD 0xe000e014\r
-#define CYREG_NVIC_SYSTICK_CURRENT 0xe000e018\r
-#define CYREG_NVIC_SYSTICK_CAL 0xe000e01c\r
-#define CYREG_NVIC_SETENA0 0xe000e100\r
-#define CYREG_NVIC_CLRENA0 0xe000e180\r
-#define CYREG_NVIC_SETPEND0 0xe000e200\r
-#define CYREG_NVIC_CLRPEND0 0xe000e280\r
-#define CYREG_NVIC_ACTIVE0 0xe000e300\r
-#define CYREG_NVIC_PRI_0 0xe000e400\r
-#define CYREG_NVIC_PRI_1 0xe000e401\r
-#define CYREG_NVIC_PRI_2 0xe000e402\r
-#define CYREG_NVIC_PRI_3 0xe000e403\r
-#define CYREG_NVIC_PRI_4 0xe000e404\r
-#define CYREG_NVIC_PRI_5 0xe000e405\r
-#define CYREG_NVIC_PRI_6 0xe000e406\r
-#define CYREG_NVIC_PRI_7 0xe000e407\r
-#define CYREG_NVIC_PRI_8 0xe000e408\r
-#define CYREG_NVIC_PRI_9 0xe000e409\r
-#define CYREG_NVIC_PRI_10 0xe000e40a\r
-#define CYREG_NVIC_PRI_11 0xe000e40b\r
-#define CYREG_NVIC_PRI_12 0xe000e40c\r
-#define CYREG_NVIC_PRI_13 0xe000e40d\r
-#define CYREG_NVIC_PRI_14 0xe000e40e\r
-#define CYREG_NVIC_PRI_15 0xe000e40f\r
-#define CYREG_NVIC_PRI_16 0xe000e410\r
-#define CYREG_NVIC_PRI_17 0xe000e411\r
-#define CYREG_NVIC_PRI_18 0xe000e412\r
-#define CYREG_NVIC_PRI_19 0xe000e413\r
-#define CYREG_NVIC_PRI_20 0xe000e414\r
-#define CYREG_NVIC_PRI_21 0xe000e415\r
-#define CYREG_NVIC_PRI_22 0xe000e416\r
-#define CYREG_NVIC_PRI_23 0xe000e417\r
-#define CYREG_NVIC_PRI_24 0xe000e418\r
-#define CYREG_NVIC_PRI_25 0xe000e419\r
-#define CYREG_NVIC_PRI_26 0xe000e41a\r
-#define CYREG_NVIC_PRI_27 0xe000e41b\r
-#define CYREG_NVIC_PRI_28 0xe000e41c\r
-#define CYREG_NVIC_PRI_29 0xe000e41d\r
-#define CYREG_NVIC_PRI_30 0xe000e41e\r
-#define CYREG_NVIC_PRI_31 0xe000e41f\r
-#define CYREG_NVIC_CPUID_BASE 0xe000ed00\r
-#define CYREG_NVIC_INTR_CTRL_STATE 0xe000ed04\r
-#define CYREG_NVIC_VECT_OFFSET 0xe000ed08\r
-#define CYREG_NVIC_APPLN_INTR 0xe000ed0c\r
-#define CYREG_NVIC_SYSTEM_CONTROL 0xe000ed10\r
-#define CYREG_NVIC_CFG_CONTROL 0xe000ed14\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_4_7 0xe000ed18\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_8_11 0xe000ed1c\r
-#define CYREG_NVIC_SYS_PRIO_HANDLER_12_15 0xe000ed20\r
-#define CYREG_NVIC_SYS_HANDLER_CSR 0xe000ed24\r
-#define CYREG_NVIC_MEMMAN_FAULT_STATUS 0xe000ed28\r
-#define CYREG_NVIC_BUS_FAULT_STATUS 0xe000ed29\r
-#define CYREG_NVIC_USAGE_FAULT_STATUS 0xe000ed2a\r
-#define CYREG_NVIC_HARD_FAULT_STATUS 0xe000ed2c\r
-#define CYREG_NVIC_DEBUG_FAULT_STATUS 0xe000ed30\r
-#define CYREG_NVIC_MEMMAN_FAULT_ADD 0xe000ed34\r
-#define CYREG_NVIC_BUS_FAULT_ADD 0xe000ed38\r
-#define CYDEV_CORE_DBG_BASE 0xe000edf0\r
-#define CYDEV_CORE_DBG_SIZE 0x00000010\r
-#define CYREG_CORE_DBG_DBG_HLT_CS 0xe000edf0\r
-#define CYREG_CORE_DBG_DBG_REG_SEL 0xe000edf4\r
-#define CYREG_CORE_DBG_DBG_REG_DATA 0xe000edf8\r
-#define CYREG_CORE_DBG_EXC_MON_CTL 0xe000edfc\r
-#define CYDEV_TPIU_BASE 0xe0040000\r
-#define CYDEV_TPIU_SIZE 0x00001000\r
-#define CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ 0xe0040000\r
-#define CYREG_TPIU_CURRENT_SYNC_PRT_SZ 0xe0040004\r
-#define CYREG_TPIU_ASYNC_CLK_PRESCALER 0xe0040010\r
-#define CYREG_TPIU_PROTOCOL 0xe00400f0\r
-#define CYREG_TPIU_FORM_FLUSH_STAT 0xe0040300\r
-#define CYREG_TPIU_FORM_FLUSH_CTRL 0xe0040304\r
-#define CYREG_TPIU_TRIGGER 0xe0040ee8\r
-#define CYREG_TPIU_ITETMDATA 0xe0040eec\r
-#define CYREG_TPIU_ITATBCTR2 0xe0040ef0\r
-#define CYREG_TPIU_ITATBCTR0 0xe0040ef8\r
-#define CYREG_TPIU_ITITMDATA 0xe0040efc\r
-#define CYREG_TPIU_ITCTRL 0xe0040f00\r
-#define CYREG_TPIU_DEVID 0xe0040fc8\r
-#define CYREG_TPIU_DEVTYPE 0xe0040fcc\r
-#define CYREG_TPIU_PID4 0xe0040fd0\r
-#define CYREG_TPIU_PID5 0xe0040fd4\r
-#define CYREG_TPIU_PID6 0xe0040fd8\r
-#define CYREG_TPIU_PID7 0xe0040fdc\r
-#define CYREG_TPIU_PID0 0xe0040fe0\r
-#define CYREG_TPIU_PID1 0xe0040fe4\r
-#define CYREG_TPIU_PID2 0xe0040fe8\r
-#define CYREG_TPIU_PID3 0xe0040fec\r
-#define CYREG_TPIU_CID0 0xe0040ff0\r
-#define CYREG_TPIU_CID1 0xe0040ff4\r
-#define CYREG_TPIU_CID2 0xe0040ff8\r
-#define CYREG_TPIU_CID3 0xe0040ffc\r
-#define CYDEV_ETM_BASE 0xe0041000\r
-#define CYDEV_ETM_SIZE 0x00001000\r
-#define CYREG_ETM_CTL 0xe0041000\r
-#define CYREG_ETM_CFG_CODE 0xe0041004\r
-#define CYREG_ETM_TRIG_EVENT 0xe0041008\r
-#define CYREG_ETM_STATUS 0xe0041010\r
-#define CYREG_ETM_SYS_CFG 0xe0041014\r
-#define CYREG_ETM_TRACE_ENB_EVENT 0xe0041020\r
-#define CYREG_ETM_TRACE_EN_CTRL1 0xe0041024\r
-#define CYREG_ETM_FIFOFULL_LEVEL 0xe004102c\r
-#define CYREG_ETM_SYNC_FREQ 0xe00411e0\r
-#define CYREG_ETM_ETM_ID 0xe00411e4\r
-#define CYREG_ETM_CFG_CODE_EXT 0xe00411e8\r
-#define CYREG_ETM_TR_SS_EMBICE_CTRL 0xe00411f0\r
-#define CYREG_ETM_CS_TRACE_ID 0xe0041200\r
-#define CYREG_ETM_OS_LOCK_ACCESS 0xe0041300\r
-#define CYREG_ETM_OS_LOCK_STATUS 0xe0041304\r
-#define CYREG_ETM_PDSR 0xe0041314\r
-#define CYREG_ETM_ITMISCIN 0xe0041ee0\r
-#define CYREG_ETM_ITTRIGOUT 0xe0041ee8\r
-#define CYREG_ETM_ITATBCTR2 0xe0041ef0\r
-#define CYREG_ETM_ITATBCTR0 0xe0041ef8\r
-#define CYREG_ETM_INT_MODE_CTRL 0xe0041f00\r
-#define CYREG_ETM_CLM_TAG_SET 0xe0041fa0\r
-#define CYREG_ETM_CLM_TAG_CLR 0xe0041fa4\r
-#define CYREG_ETM_LOCK_ACCESS 0xe0041fb0\r
-#define CYREG_ETM_LOCK_STATUS 0xe0041fb4\r
-#define CYREG_ETM_AUTH_STATUS 0xe0041fb8\r
-#define CYREG_ETM_DEV_TYPE 0xe0041fcc\r
-#define CYREG_ETM_PID4 0xe0041fd0\r
-#define CYREG_ETM_PID5 0xe0041fd4\r
-#define CYREG_ETM_PID6 0xe0041fd8\r
-#define CYREG_ETM_PID7 0xe0041fdc\r
-#define CYREG_ETM_PID0 0xe0041fe0\r
-#define CYREG_ETM_PID1 0xe0041fe4\r
-#define CYREG_ETM_PID2 0xe0041fe8\r
-#define CYREG_ETM_PID3 0xe0041fec\r
-#define CYREG_ETM_CID0 0xe0041ff0\r
-#define CYREG_ETM_CID1 0xe0041ff4\r
-#define CYREG_ETM_CID2 0xe0041ff8\r
-#define CYREG_ETM_CID3 0xe0041ffc\r
-#define CYDEV_ROM_TABLE_BASE 0xe00ff000\r
-#define CYDEV_ROM_TABLE_SIZE 0x00001000\r
-#define CYREG_ROM_TABLE_NVIC 0xe00ff000\r
-#define CYREG_ROM_TABLE_DWT 0xe00ff004\r
-#define CYREG_ROM_TABLE_FPB 0xe00ff008\r
-#define CYREG_ROM_TABLE_ITM 0xe00ff00c\r
-#define CYREG_ROM_TABLE_TPIU 0xe00ff010\r
-#define CYREG_ROM_TABLE_ETM 0xe00ff014\r
-#define CYREG_ROM_TABLE_END 0xe00ff018\r
-#define CYREG_ROM_TABLE_MEMTYPE 0xe00fffcc\r
-#define CYREG_ROM_TABLE_PID4 0xe00fffd0\r
-#define CYREG_ROM_TABLE_PID5 0xe00fffd4\r
-#define CYREG_ROM_TABLE_PID6 0xe00fffd8\r
-#define CYREG_ROM_TABLE_PID7 0xe00fffdc\r
-#define CYREG_ROM_TABLE_PID0 0xe00fffe0\r
-#define CYREG_ROM_TABLE_PID1 0xe00fffe4\r
-#define CYREG_ROM_TABLE_PID2 0xe00fffe8\r
-#define CYREG_ROM_TABLE_PID3 0xe00fffec\r
-#define CYREG_ROM_TABLE_CID0 0xe00ffff0\r
-#define CYREG_ROM_TABLE_CID1 0xe00ffff4\r
-#define CYREG_ROM_TABLE_CID2 0xe00ffff8\r
-#define CYREG_ROM_TABLE_CID3 0xe00ffffc\r
-#define CYDEV_FLS_SIZE CYDEV_FLASH_SIZE\r
-#define CYDEV_ECC_BASE CYDEV_FLSECC_BASE\r
-#define CYDEV_FLS_SECTOR_SIZE 0x00010000\r
-#define CYDEV_FLS_ROW_SIZE 0x00000100\r
-#define CYDEV_ECC_SECTOR_SIZE 0x00002000\r
-#define CYDEV_ECC_ROW_SIZE 0x00000020\r
-#define CYDEV_EEPROM_SECTOR_SIZE 0x00000400\r
-#define CYDEV_EEPROM_ROW_SIZE 0x00000010\r
-#define CYDEV_PERIPH_BASE CYDEV_CLKDIST_BASE\r
-#define CYCLK_LD_DISABLE 0x00000004\r
-#define CYCLK_LD_SYNC_EN 0x00000002\r
-#define CYCLK_LD_LOAD 0x00000001\r
-#define CYCLK_PIPE 0x00000080\r
-#define CYCLK_SSS 0x00000040\r
-#define CYCLK_EARLY 0x00000020\r
-#define CYCLK_DUTY 0x00000010\r
-#define CYCLK_SYNC 0x00000008\r
-#define CYCLK_SRC_SEL_CLK_SYNC_D 0\r
-#define CYCLK_SRC_SEL_SYNC_DIG 0\r
-#define CYCLK_SRC_SEL_IMO 1\r
-#define CYCLK_SRC_SEL_XTAL_MHZ 2\r
-#define CYCLK_SRC_SEL_XTALM 2\r
-#define CYCLK_SRC_SEL_ILO 3\r
-#define CYCLK_SRC_SEL_PLL 4\r
-#define CYCLK_SRC_SEL_XTAL_KHZ 5\r
-#define CYCLK_SRC_SEL_XTALK 5\r
-#define CYCLK_SRC_SEL_DSI_G 6\r
-#define CYCLK_SRC_SEL_DSI_D 7\r
-#define CYCLK_SRC_SEL_CLK_SYNC_A 0\r
-#define CYCLK_SRC_SEL_DSI_A 7\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv.inc
deleted file mode 100755 (executable)
index 4ed74ed..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv.inc
+++ /dev/null
@@ -1,16039 +0,0 @@
-;\r
-; FILENAME: cydevicerv.inc\r
-; OBSOLETE: Do not use this file. Use the _trm version instead.\r
-; PSoC Creator 3.0 Component Pack 7\r
-;\r
-; DESCRIPTION:\r
-; This file provides all of the address values for the entire PSoC device.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions, \r
-; disclaimers, and limitations in the end user license agreement accompanying \r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-    IF :LNOT::DEF:CYDEV_FLASH_BASE\r
-CYDEV_FLASH_BASE EQU 0x00000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLASH_SIZE\r
-CYDEV_FLASH_SIZE EQU 0x00020000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLASH_DATA_MBASE\r
-CYDEV_FLASH_DATA_MBASE EQU 0x00000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLASH_DATA_MSIZE\r
-CYDEV_FLASH_DATA_MSIZE EQU 0x00020000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_BASE\r
-CYDEV_SRAM_BASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_SIZE\r
-CYDEV_SRAM_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE64K_MBASE\r
-CYDEV_SRAM_CODE64K_MBASE EQU 0x1fff8000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE64K_MSIZE\r
-CYDEV_SRAM_CODE64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE32K_MBASE\r
-CYDEV_SRAM_CODE32K_MBASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE32K_MSIZE\r
-CYDEV_SRAM_CODE32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE16K_MBASE\r
-CYDEV_SRAM_CODE16K_MBASE EQU 0x1fffe000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE16K_MSIZE\r
-CYDEV_SRAM_CODE16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE_MBASE\r
-CYDEV_SRAM_CODE_MBASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_CODE_MSIZE\r
-CYDEV_SRAM_CODE_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA_MBASE\r
-CYDEV_SRAM_DATA_MBASE EQU 0x20000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA_MSIZE\r
-CYDEV_SRAM_DATA_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA16K_MBASE\r
-CYDEV_SRAM_DATA16K_MBASE EQU 0x20001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA16K_MSIZE\r
-CYDEV_SRAM_DATA16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA32K_MBASE\r
-CYDEV_SRAM_DATA32K_MBASE EQU 0x20002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA32K_MSIZE\r
-CYDEV_SRAM_DATA32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA64K_MBASE\r
-CYDEV_SRAM_DATA64K_MBASE EQU 0x20004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_DATA64K_MSIZE\r
-CYDEV_SRAM_DATA64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_BASE\r
-CYDEV_DMA_BASE EQU 0x20008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SIZE\r
-CYDEV_DMA_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM64K_MBASE\r
-CYDEV_DMA_SRAM64K_MBASE EQU 0x20008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM64K_MSIZE\r
-CYDEV_DMA_SRAM64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM32K_MBASE\r
-CYDEV_DMA_SRAM32K_MBASE EQU 0x2000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM32K_MSIZE\r
-CYDEV_DMA_SRAM32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM16K_MBASE\r
-CYDEV_DMA_SRAM16K_MBASE EQU 0x2000e000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM16K_MSIZE\r
-CYDEV_DMA_SRAM16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM_MBASE\r
-CYDEV_DMA_SRAM_MBASE EQU 0x2000f000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SRAM_MSIZE\r
-CYDEV_DMA_SRAM_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_BASE\r
-CYDEV_CLKDIST_BASE EQU 0x40004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_SIZE\r
-CYDEV_CLKDIST_SIZE EQU 0x00000110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_CR\r
-CYDEV_CLKDIST_CR EQU 0x40004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_LD\r
-CYDEV_CLKDIST_LD EQU 0x40004001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_WRK0\r
-CYDEV_CLKDIST_WRK0 EQU 0x40004002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_WRK1\r
-CYDEV_CLKDIST_WRK1 EQU 0x40004003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_MSTR0\r
-CYDEV_CLKDIST_MSTR0 EQU 0x40004004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_MSTR1\r
-CYDEV_CLKDIST_MSTR1 EQU 0x40004005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_BCFG0\r
-CYDEV_CLKDIST_BCFG0 EQU 0x40004006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_BCFG1\r
-CYDEV_CLKDIST_BCFG1 EQU 0x40004007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_BCFG2\r
-CYDEV_CLKDIST_BCFG2 EQU 0x40004008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_UCFG\r
-CYDEV_CLKDIST_UCFG EQU 0x40004009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DLY0\r
-CYDEV_CLKDIST_DLY0 EQU 0x4000400a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DLY1\r
-CYDEV_CLKDIST_DLY1 EQU 0x4000400b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DMASK\r
-CYDEV_CLKDIST_DMASK EQU 0x40004010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_AMASK\r
-CYDEV_CLKDIST_AMASK EQU 0x40004014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_BASE\r
-CYDEV_CLKDIST_DCFG0_BASE EQU 0x40004080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_SIZE\r
-CYDEV_CLKDIST_DCFG0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_CFG0\r
-CYDEV_CLKDIST_DCFG0_CFG0 EQU 0x40004080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_CFG1\r
-CYDEV_CLKDIST_DCFG0_CFG1 EQU 0x40004081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_CFG2\r
-CYDEV_CLKDIST_DCFG0_CFG2 EQU 0x40004082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_BASE\r
-CYDEV_CLKDIST_DCFG1_BASE EQU 0x40004084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_SIZE\r
-CYDEV_CLKDIST_DCFG1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_CFG0\r
-CYDEV_CLKDIST_DCFG1_CFG0 EQU 0x40004084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_CFG1\r
-CYDEV_CLKDIST_DCFG1_CFG1 EQU 0x40004085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_CFG2\r
-CYDEV_CLKDIST_DCFG1_CFG2 EQU 0x40004086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_BASE\r
-CYDEV_CLKDIST_DCFG2_BASE EQU 0x40004088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_SIZE\r
-CYDEV_CLKDIST_DCFG2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_CFG0\r
-CYDEV_CLKDIST_DCFG2_CFG0 EQU 0x40004088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_CFG1\r
-CYDEV_CLKDIST_DCFG2_CFG1 EQU 0x40004089\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_CFG2\r
-CYDEV_CLKDIST_DCFG2_CFG2 EQU 0x4000408a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_BASE\r
-CYDEV_CLKDIST_DCFG3_BASE EQU 0x4000408c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_SIZE\r
-CYDEV_CLKDIST_DCFG3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_CFG0\r
-CYDEV_CLKDIST_DCFG3_CFG0 EQU 0x4000408c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_CFG1\r
-CYDEV_CLKDIST_DCFG3_CFG1 EQU 0x4000408d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_CFG2\r
-CYDEV_CLKDIST_DCFG3_CFG2 EQU 0x4000408e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_BASE\r
-CYDEV_CLKDIST_DCFG4_BASE EQU 0x40004090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_SIZE\r
-CYDEV_CLKDIST_DCFG4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_CFG0\r
-CYDEV_CLKDIST_DCFG4_CFG0 EQU 0x40004090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_CFG1\r
-CYDEV_CLKDIST_DCFG4_CFG1 EQU 0x40004091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_CFG2\r
-CYDEV_CLKDIST_DCFG4_CFG2 EQU 0x40004092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_BASE\r
-CYDEV_CLKDIST_DCFG5_BASE EQU 0x40004094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_SIZE\r
-CYDEV_CLKDIST_DCFG5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_CFG0\r
-CYDEV_CLKDIST_DCFG5_CFG0 EQU 0x40004094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_CFG1\r
-CYDEV_CLKDIST_DCFG5_CFG1 EQU 0x40004095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_CFG2\r
-CYDEV_CLKDIST_DCFG5_CFG2 EQU 0x40004096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_BASE\r
-CYDEV_CLKDIST_DCFG6_BASE EQU 0x40004098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_SIZE\r
-CYDEV_CLKDIST_DCFG6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_CFG0\r
-CYDEV_CLKDIST_DCFG6_CFG0 EQU 0x40004098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_CFG1\r
-CYDEV_CLKDIST_DCFG6_CFG1 EQU 0x40004099\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_CFG2\r
-CYDEV_CLKDIST_DCFG6_CFG2 EQU 0x4000409a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_BASE\r
-CYDEV_CLKDIST_DCFG7_BASE EQU 0x4000409c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_SIZE\r
-CYDEV_CLKDIST_DCFG7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_CFG0\r
-CYDEV_CLKDIST_DCFG7_CFG0 EQU 0x4000409c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_CFG1\r
-CYDEV_CLKDIST_DCFG7_CFG1 EQU 0x4000409d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_CFG2\r
-CYDEV_CLKDIST_DCFG7_CFG2 EQU 0x4000409e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_BASE\r
-CYDEV_CLKDIST_ACFG0_BASE EQU 0x40004100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_SIZE\r
-CYDEV_CLKDIST_ACFG0_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_CFG0\r
-CYDEV_CLKDIST_ACFG0_CFG0 EQU 0x40004100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_CFG1\r
-CYDEV_CLKDIST_ACFG0_CFG1 EQU 0x40004101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_CFG2\r
-CYDEV_CLKDIST_ACFG0_CFG2 EQU 0x40004102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_CFG3\r
-CYDEV_CLKDIST_ACFG0_CFG3 EQU 0x40004103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_BASE\r
-CYDEV_CLKDIST_ACFG1_BASE EQU 0x40004104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_SIZE\r
-CYDEV_CLKDIST_ACFG1_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_CFG0\r
-CYDEV_CLKDIST_ACFG1_CFG0 EQU 0x40004104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_CFG1\r
-CYDEV_CLKDIST_ACFG1_CFG1 EQU 0x40004105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_CFG2\r
-CYDEV_CLKDIST_ACFG1_CFG2 EQU 0x40004106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_CFG3\r
-CYDEV_CLKDIST_ACFG1_CFG3 EQU 0x40004107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_BASE\r
-CYDEV_CLKDIST_ACFG2_BASE EQU 0x40004108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_SIZE\r
-CYDEV_CLKDIST_ACFG2_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_CFG0\r
-CYDEV_CLKDIST_ACFG2_CFG0 EQU 0x40004108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_CFG1\r
-CYDEV_CLKDIST_ACFG2_CFG1 EQU 0x40004109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_CFG2\r
-CYDEV_CLKDIST_ACFG2_CFG2 EQU 0x4000410a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_CFG3\r
-CYDEV_CLKDIST_ACFG2_CFG3 EQU 0x4000410b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_BASE\r
-CYDEV_CLKDIST_ACFG3_BASE EQU 0x4000410c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_SIZE\r
-CYDEV_CLKDIST_ACFG3_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_CFG0\r
-CYDEV_CLKDIST_ACFG3_CFG0 EQU 0x4000410c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_CFG1\r
-CYDEV_CLKDIST_ACFG3_CFG1 EQU 0x4000410d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_CFG2\r
-CYDEV_CLKDIST_ACFG3_CFG2 EQU 0x4000410e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_CFG3\r
-CYDEV_CLKDIST_ACFG3_CFG3 EQU 0x4000410f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_BASE\r
-CYDEV_FASTCLK_BASE EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_SIZE\r
-CYDEV_FASTCLK_SIZE EQU 0x00000026\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_IMO_BASE\r
-CYDEV_FASTCLK_IMO_BASE EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_IMO_SIZE\r
-CYDEV_FASTCLK_IMO_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_IMO_CR\r
-CYDEV_FASTCLK_IMO_CR EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_BASE\r
-CYDEV_FASTCLK_XMHZ_BASE EQU 0x40004210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_SIZE\r
-CYDEV_FASTCLK_XMHZ_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_CSR\r
-CYDEV_FASTCLK_XMHZ_CSR EQU 0x40004210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_CFG0\r
-CYDEV_FASTCLK_XMHZ_CFG0 EQU 0x40004212\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_CFG1\r
-CYDEV_FASTCLK_XMHZ_CFG1 EQU 0x40004213\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_BASE\r
-CYDEV_FASTCLK_PLL_BASE EQU 0x40004220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_SIZE\r
-CYDEV_FASTCLK_PLL_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_CFG0\r
-CYDEV_FASTCLK_PLL_CFG0 EQU 0x40004220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_CFG1\r
-CYDEV_FASTCLK_PLL_CFG1 EQU 0x40004221\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_P\r
-CYDEV_FASTCLK_PLL_P EQU 0x40004222\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_Q\r
-CYDEV_FASTCLK_PLL_Q EQU 0x40004223\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_SR\r
-CYDEV_FASTCLK_PLL_SR EQU 0x40004225\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_BASE\r
-CYDEV_SLOWCLK_BASE EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_SIZE\r
-CYDEV_SLOWCLK_SIZE EQU 0x0000000b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_BASE\r
-CYDEV_SLOWCLK_ILO_BASE EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_SIZE\r
-CYDEV_SLOWCLK_ILO_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_CR0\r
-CYDEV_SLOWCLK_ILO_CR0 EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_CR1\r
-CYDEV_SLOWCLK_ILO_CR1 EQU 0x40004301\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_BASE\r
-CYDEV_SLOWCLK_X32_BASE EQU 0x40004308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_SIZE\r
-CYDEV_SLOWCLK_X32_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_CR\r
-CYDEV_SLOWCLK_X32_CR EQU 0x40004308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_CFG\r
-CYDEV_SLOWCLK_X32_CFG EQU 0x40004309\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_TST\r
-CYDEV_SLOWCLK_X32_TST EQU 0x4000430a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_BASE\r
-CYDEV_BOOST_BASE EQU 0x40004320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_SIZE\r
-CYDEV_BOOST_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_CR0\r
-CYDEV_BOOST_CR0 EQU 0x40004320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_CR1\r
-CYDEV_BOOST_CR1 EQU 0x40004321\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_CR2\r
-CYDEV_BOOST_CR2 EQU 0x40004322\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_CR3\r
-CYDEV_BOOST_CR3 EQU 0x40004323\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_SR\r
-CYDEV_BOOST_SR EQU 0x40004324\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_CR4\r
-CYDEV_BOOST_CR4 EQU 0x40004325\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_SR2\r
-CYDEV_BOOST_SR2 EQU 0x40004326\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_BASE\r
-CYDEV_PWRSYS_BASE EQU 0x40004330\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_SIZE\r
-CYDEV_PWRSYS_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_CR0\r
-CYDEV_PWRSYS_CR0 EQU 0x40004330\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_CR1\r
-CYDEV_PWRSYS_CR1 EQU 0x40004331\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_BASE\r
-CYDEV_PM_BASE EQU 0x40004380\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_SIZE\r
-CYDEV_PM_SIZE EQU 0x00000057\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_TW_CFG0\r
-CYDEV_PM_TW_CFG0 EQU 0x40004380\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_TW_CFG1\r
-CYDEV_PM_TW_CFG1 EQU 0x40004381\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_TW_CFG2\r
-CYDEV_PM_TW_CFG2 EQU 0x40004382\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_WDT_CFG\r
-CYDEV_PM_WDT_CFG EQU 0x40004383\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_WDT_CR\r
-CYDEV_PM_WDT_CR EQU 0x40004384\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_INT_SR\r
-CYDEV_PM_INT_SR EQU 0x40004390\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_MODE_CFG0\r
-CYDEV_PM_MODE_CFG0 EQU 0x40004391\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_MODE_CFG1\r
-CYDEV_PM_MODE_CFG1 EQU 0x40004392\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_MODE_CSR\r
-CYDEV_PM_MODE_CSR EQU 0x40004393\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_USB_CR0\r
-CYDEV_PM_USB_CR0 EQU 0x40004394\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_WAKEUP_CFG0\r
-CYDEV_PM_WAKEUP_CFG0 EQU 0x40004398\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_WAKEUP_CFG1\r
-CYDEV_PM_WAKEUP_CFG1 EQU 0x40004399\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_WAKEUP_CFG2\r
-CYDEV_PM_WAKEUP_CFG2 EQU 0x4000439a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_BASE\r
-CYDEV_PM_ACT_BASE EQU 0x400043a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_SIZE\r
-CYDEV_PM_ACT_SIZE EQU 0x0000000e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG0\r
-CYDEV_PM_ACT_CFG0 EQU 0x400043a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG1\r
-CYDEV_PM_ACT_CFG1 EQU 0x400043a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG2\r
-CYDEV_PM_ACT_CFG2 EQU 0x400043a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG3\r
-CYDEV_PM_ACT_CFG3 EQU 0x400043a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG4\r
-CYDEV_PM_ACT_CFG4 EQU 0x400043a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG5\r
-CYDEV_PM_ACT_CFG5 EQU 0x400043a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG6\r
-CYDEV_PM_ACT_CFG6 EQU 0x400043a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG7\r
-CYDEV_PM_ACT_CFG7 EQU 0x400043a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG8\r
-CYDEV_PM_ACT_CFG8 EQU 0x400043a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG9\r
-CYDEV_PM_ACT_CFG9 EQU 0x400043a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG10\r
-CYDEV_PM_ACT_CFG10 EQU 0x400043aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG11\r
-CYDEV_PM_ACT_CFG11 EQU 0x400043ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG12\r
-CYDEV_PM_ACT_CFG12 EQU 0x400043ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_CFG13\r
-CYDEV_PM_ACT_CFG13 EQU 0x400043ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_BASE\r
-CYDEV_PM_STBY_BASE EQU 0x400043b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_SIZE\r
-CYDEV_PM_STBY_SIZE EQU 0x0000000e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG0\r
-CYDEV_PM_STBY_CFG0 EQU 0x400043b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG1\r
-CYDEV_PM_STBY_CFG1 EQU 0x400043b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG2\r
-CYDEV_PM_STBY_CFG2 EQU 0x400043b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG3\r
-CYDEV_PM_STBY_CFG3 EQU 0x400043b3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG4\r
-CYDEV_PM_STBY_CFG4 EQU 0x400043b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG5\r
-CYDEV_PM_STBY_CFG5 EQU 0x400043b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG6\r
-CYDEV_PM_STBY_CFG6 EQU 0x400043b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG7\r
-CYDEV_PM_STBY_CFG7 EQU 0x400043b7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG8\r
-CYDEV_PM_STBY_CFG8 EQU 0x400043b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG9\r
-CYDEV_PM_STBY_CFG9 EQU 0x400043b9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG10\r
-CYDEV_PM_STBY_CFG10 EQU 0x400043ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG11\r
-CYDEV_PM_STBY_CFG11 EQU 0x400043bb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG12\r
-CYDEV_PM_STBY_CFG12 EQU 0x400043bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_CFG13\r
-CYDEV_PM_STBY_CFG13 EQU 0x400043bd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_BASE\r
-CYDEV_PM_AVAIL_BASE EQU 0x400043c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SIZE\r
-CYDEV_PM_AVAIL_SIZE EQU 0x00000017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR0\r
-CYDEV_PM_AVAIL_CR0 EQU 0x400043c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR1\r
-CYDEV_PM_AVAIL_CR1 EQU 0x400043c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR2\r
-CYDEV_PM_AVAIL_CR2 EQU 0x400043c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR3\r
-CYDEV_PM_AVAIL_CR3 EQU 0x400043c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR4\r
-CYDEV_PM_AVAIL_CR4 EQU 0x400043c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR5\r
-CYDEV_PM_AVAIL_CR5 EQU 0x400043c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_CR6\r
-CYDEV_PM_AVAIL_CR6 EQU 0x400043c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR0\r
-CYDEV_PM_AVAIL_SR0 EQU 0x400043d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR1\r
-CYDEV_PM_AVAIL_SR1 EQU 0x400043d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR2\r
-CYDEV_PM_AVAIL_SR2 EQU 0x400043d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR3\r
-CYDEV_PM_AVAIL_SR3 EQU 0x400043d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR4\r
-CYDEV_PM_AVAIL_SR4 EQU 0x400043d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR5\r
-CYDEV_PM_AVAIL_SR5 EQU 0x400043d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SR6\r
-CYDEV_PM_AVAIL_SR6 EQU 0x400043d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_BASE\r
-CYDEV_PICU_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SIZE\r
-CYDEV_PICU_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_BASE\r
-CYDEV_PICU_INTTYPE_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_SIZE\r
-CYDEV_PICU_INTTYPE_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_BASE\r
-CYDEV_PICU_INTTYPE_PICU0_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_SIZE\r
-CYDEV_PICU_INTTYPE_PICU0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE0 EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE1 EQU 0x40004501\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE2 EQU 0x40004502\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE3 EQU 0x40004503\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE4 EQU 0x40004504\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE5 EQU 0x40004505\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE6 EQU 0x40004506\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU0_INTTYPE7 EQU 0x40004507\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_BASE\r
-CYDEV_PICU_INTTYPE_PICU1_BASE EQU 0x40004508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_SIZE\r
-CYDEV_PICU_INTTYPE_PICU1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE0 EQU 0x40004508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE1 EQU 0x40004509\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE2 EQU 0x4000450a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE3 EQU 0x4000450b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE4 EQU 0x4000450c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE5 EQU 0x4000450d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE6 EQU 0x4000450e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU1_INTTYPE7 EQU 0x4000450f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_BASE\r
-CYDEV_PICU_INTTYPE_PICU2_BASE EQU 0x40004510\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_SIZE\r
-CYDEV_PICU_INTTYPE_PICU2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE0 EQU 0x40004510\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE1 EQU 0x40004511\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE2 EQU 0x40004512\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE3 EQU 0x40004513\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE4 EQU 0x40004514\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE5 EQU 0x40004515\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE6 EQU 0x40004516\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU2_INTTYPE7 EQU 0x40004517\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_BASE\r
-CYDEV_PICU_INTTYPE_PICU3_BASE EQU 0x40004518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_SIZE\r
-CYDEV_PICU_INTTYPE_PICU3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE0 EQU 0x40004518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE1 EQU 0x40004519\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE2 EQU 0x4000451a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE3 EQU 0x4000451b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE4 EQU 0x4000451c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE5 EQU 0x4000451d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE6 EQU 0x4000451e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU3_INTTYPE7 EQU 0x4000451f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_BASE\r
-CYDEV_PICU_INTTYPE_PICU4_BASE EQU 0x40004520\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_SIZE\r
-CYDEV_PICU_INTTYPE_PICU4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE0 EQU 0x40004520\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE1 EQU 0x40004521\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE2 EQU 0x40004522\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE3 EQU 0x40004523\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE4 EQU 0x40004524\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE5 EQU 0x40004525\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE6 EQU 0x40004526\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU4_INTTYPE7 EQU 0x40004527\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_BASE\r
-CYDEV_PICU_INTTYPE_PICU5_BASE EQU 0x40004528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_SIZE\r
-CYDEV_PICU_INTTYPE_PICU5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE0 EQU 0x40004528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE1 EQU 0x40004529\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE2 EQU 0x4000452a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE3 EQU 0x4000452b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE4 EQU 0x4000452c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE5 EQU 0x4000452d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE6 EQU 0x4000452e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU5_INTTYPE7 EQU 0x4000452f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_BASE\r
-CYDEV_PICU_INTTYPE_PICU6_BASE EQU 0x40004530\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_SIZE\r
-CYDEV_PICU_INTTYPE_PICU6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE0 EQU 0x40004530\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE1 EQU 0x40004531\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE2 EQU 0x40004532\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE3 EQU 0x40004533\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE4 EQU 0x40004534\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE5 EQU 0x40004535\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE6 EQU 0x40004536\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU6_INTTYPE7 EQU 0x40004537\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_BASE\r
-CYDEV_PICU_INTTYPE_PICU12_BASE EQU 0x40004560\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_SIZE\r
-CYDEV_PICU_INTTYPE_PICU12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE0 EQU 0x40004560\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE1 EQU 0x40004561\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE2 EQU 0x40004562\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE3 EQU 0x40004563\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE4 EQU 0x40004564\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE5 EQU 0x40004565\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE6 EQU 0x40004566\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU12_INTTYPE7 EQU 0x40004567\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_BASE\r
-CYDEV_PICU_INTTYPE_PICU15_BASE EQU 0x40004578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_SIZE\r
-CYDEV_PICU_INTTYPE_PICU15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE0\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE0 EQU 0x40004578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE1\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE1 EQU 0x40004579\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE2\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE2 EQU 0x4000457a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE3\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE3 EQU 0x4000457b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE4\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE4 EQU 0x4000457c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE5\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE5 EQU 0x4000457d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE6\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE6 EQU 0x4000457e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_INTTYPE7\r
-CYDEV_PICU_INTTYPE_PICU15_INTTYPE7 EQU 0x4000457f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_BASE\r
-CYDEV_PICU_STAT_BASE EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_SIZE\r
-CYDEV_PICU_STAT_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_BASE\r
-CYDEV_PICU_STAT_PICU0_BASE EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_SIZE\r
-CYDEV_PICU_STAT_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_INTSTAT\r
-CYDEV_PICU_STAT_PICU0_INTSTAT EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_BASE\r
-CYDEV_PICU_STAT_PICU1_BASE EQU 0x40004581\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_SIZE\r
-CYDEV_PICU_STAT_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_INTSTAT\r
-CYDEV_PICU_STAT_PICU1_INTSTAT EQU 0x40004581\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_BASE\r
-CYDEV_PICU_STAT_PICU2_BASE EQU 0x40004582\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_SIZE\r
-CYDEV_PICU_STAT_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_INTSTAT\r
-CYDEV_PICU_STAT_PICU2_INTSTAT EQU 0x40004582\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_BASE\r
-CYDEV_PICU_STAT_PICU3_BASE EQU 0x40004583\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_SIZE\r
-CYDEV_PICU_STAT_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_INTSTAT\r
-CYDEV_PICU_STAT_PICU3_INTSTAT EQU 0x40004583\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_BASE\r
-CYDEV_PICU_STAT_PICU4_BASE EQU 0x40004584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_SIZE\r
-CYDEV_PICU_STAT_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_INTSTAT\r
-CYDEV_PICU_STAT_PICU4_INTSTAT EQU 0x40004584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_BASE\r
-CYDEV_PICU_STAT_PICU5_BASE EQU 0x40004585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_SIZE\r
-CYDEV_PICU_STAT_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_INTSTAT\r
-CYDEV_PICU_STAT_PICU5_INTSTAT EQU 0x40004585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_BASE\r
-CYDEV_PICU_STAT_PICU6_BASE EQU 0x40004586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_SIZE\r
-CYDEV_PICU_STAT_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_INTSTAT\r
-CYDEV_PICU_STAT_PICU6_INTSTAT EQU 0x40004586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_BASE\r
-CYDEV_PICU_STAT_PICU12_BASE EQU 0x4000458c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_SIZE\r
-CYDEV_PICU_STAT_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_INTSTAT\r
-CYDEV_PICU_STAT_PICU12_INTSTAT EQU 0x4000458c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_BASE\r
-CYDEV_PICU_STAT_PICU15_BASE EQU 0x4000458f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_SIZE\r
-CYDEV_PICU_STAT_PICU15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_INTSTAT\r
-CYDEV_PICU_STAT_PICU15_INTSTAT EQU 0x4000458f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_BASE\r
-CYDEV_PICU_SNAP_BASE EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_SIZE\r
-CYDEV_PICU_SNAP_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_BASE\r
-CYDEV_PICU_SNAP_PICU0_BASE EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_SIZE\r
-CYDEV_PICU_SNAP_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_SNAP\r
-CYDEV_PICU_SNAP_PICU0_SNAP EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_BASE\r
-CYDEV_PICU_SNAP_PICU1_BASE EQU 0x40004591\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_SIZE\r
-CYDEV_PICU_SNAP_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_SNAP\r
-CYDEV_PICU_SNAP_PICU1_SNAP EQU 0x40004591\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_BASE\r
-CYDEV_PICU_SNAP_PICU2_BASE EQU 0x40004592\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_SIZE\r
-CYDEV_PICU_SNAP_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_SNAP\r
-CYDEV_PICU_SNAP_PICU2_SNAP EQU 0x40004592\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_BASE\r
-CYDEV_PICU_SNAP_PICU3_BASE EQU 0x40004593\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_SIZE\r
-CYDEV_PICU_SNAP_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_SNAP\r
-CYDEV_PICU_SNAP_PICU3_SNAP EQU 0x40004593\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_BASE\r
-CYDEV_PICU_SNAP_PICU4_BASE EQU 0x40004594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_SIZE\r
-CYDEV_PICU_SNAP_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_SNAP\r
-CYDEV_PICU_SNAP_PICU4_SNAP EQU 0x40004594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_BASE\r
-CYDEV_PICU_SNAP_PICU5_BASE EQU 0x40004595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_SIZE\r
-CYDEV_PICU_SNAP_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_SNAP\r
-CYDEV_PICU_SNAP_PICU5_SNAP EQU 0x40004595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_BASE\r
-CYDEV_PICU_SNAP_PICU6_BASE EQU 0x40004596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_SIZE\r
-CYDEV_PICU_SNAP_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_SNAP\r
-CYDEV_PICU_SNAP_PICU6_SNAP EQU 0x40004596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_BASE\r
-CYDEV_PICU_SNAP_PICU12_BASE EQU 0x4000459c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_SIZE\r
-CYDEV_PICU_SNAP_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_SNAP\r
-CYDEV_PICU_SNAP_PICU12_SNAP EQU 0x4000459c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_BASE\r
-CYDEV_PICU_SNAP_PICU_15_BASE EQU 0x4000459f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_SIZE\r
-CYDEV_PICU_SNAP_PICU_15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_SNAP_15\r
-CYDEV_PICU_SNAP_PICU_15_SNAP_15 EQU 0x4000459f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_BASE\r
-CYDEV_PICU_DISABLE_COR_BASE EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_SIZE\r
-CYDEV_PICU_DISABLE_COR_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU0_BASE EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU0_DISABLE_COR EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU1_BASE EQU 0x400045a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU1_DISABLE_COR EQU 0x400045a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU2_BASE EQU 0x400045a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU2_DISABLE_COR EQU 0x400045a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU3_BASE EQU 0x400045a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU3_DISABLE_COR EQU 0x400045a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU4_BASE EQU 0x400045a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU4_DISABLE_COR EQU 0x400045a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU5_BASE EQU 0x400045a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU5_DISABLE_COR EQU 0x400045a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU6_BASE EQU 0x400045a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU6_DISABLE_COR EQU 0x400045a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU12_BASE EQU 0x400045ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU12_DISABLE_COR EQU 0x400045ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU15_BASE EQU 0x400045af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR\r
-CYDEV_PICU_DISABLE_COR_PICU15_DISABLE_COR EQU 0x400045af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_BASE\r
-CYDEV_MFGCFG_BASE EQU 0x40004600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_SIZE\r
-CYDEV_MFGCFG_SIZE EQU 0x000000ed\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_BASE\r
-CYDEV_MFGCFG_ANAIF_BASE EQU 0x40004600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SIZE\r
-CYDEV_MFGCFG_ANAIF_SIZE EQU 0x00000038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC0_BASE EQU 0x40004608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_TR\r
-CYDEV_MFGCFG_ANAIF_DAC0_TR EQU 0x40004608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC1_BASE EQU 0x40004609\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_TR\r
-CYDEV_MFGCFG_ANAIF_DAC1_TR EQU 0x40004609\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC2_BASE EQU 0x4000460a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_TR\r
-CYDEV_MFGCFG_ANAIF_DAC2_TR EQU 0x4000460a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC3_BASE EQU 0x4000460b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_TR\r
-CYDEV_MFGCFG_ANAIF_DAC3_TR EQU 0x4000460b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE EQU 0x40004610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0\r
-CYDEV_MFGCFG_ANAIF_NPUMP_DSM_TR0 EQU 0x40004610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE EQU 0x40004611\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0\r
-CYDEV_MFGCFG_ANAIF_NPUMP_SC_TR0 EQU 0x40004611\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE EQU 0x40004612\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0\r
-CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_TR0 EQU 0x40004612\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_BASE\r
-CYDEV_MFGCFG_ANAIF_SAR0_BASE EQU 0x40004614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_SIZE\r
-CYDEV_MFGCFG_ANAIF_SAR0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_TR0\r
-CYDEV_MFGCFG_ANAIF_SAR0_TR0 EQU 0x40004614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_BASE\r
-CYDEV_MFGCFG_ANAIF_SAR1_BASE EQU 0x40004616\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_SIZE\r
-CYDEV_MFGCFG_ANAIF_SAR1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_TR0\r
-CYDEV_MFGCFG_ANAIF_SAR1_TR0 EQU 0x40004616\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_BASE EQU 0x40004620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_TR0\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_TR0 EQU 0x40004620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_TR1\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_TR1 EQU 0x40004621\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_BASE EQU 0x40004622\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_TR0\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_TR0 EQU 0x40004622\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_TR1\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_TR1 EQU 0x40004623\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_BASE EQU 0x40004624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_TR0\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_TR0 EQU 0x40004624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_TR1\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_TR1 EQU 0x40004625\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_BASE EQU 0x40004626\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_TR0\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_TR0 EQU 0x40004626\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_TR1\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_TR1 EQU 0x40004627\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP0_BASE EQU 0x40004630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_TR0\r
-CYDEV_MFGCFG_ANAIF_CMP0_TR0 EQU 0x40004630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_TR1\r
-CYDEV_MFGCFG_ANAIF_CMP0_TR1 EQU 0x40004631\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP1_BASE EQU 0x40004632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_TR0\r
-CYDEV_MFGCFG_ANAIF_CMP1_TR0 EQU 0x40004632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_TR1\r
-CYDEV_MFGCFG_ANAIF_CMP1_TR1 EQU 0x40004633\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP2_BASE EQU 0x40004634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_TR0\r
-CYDEV_MFGCFG_ANAIF_CMP2_TR0 EQU 0x40004634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_TR1\r
-CYDEV_MFGCFG_ANAIF_CMP2_TR1 EQU 0x40004635\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP3_BASE EQU 0x40004636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_TR0\r
-CYDEV_MFGCFG_ANAIF_CMP3_TR0 EQU 0x40004636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_TR1\r
-CYDEV_MFGCFG_ANAIF_CMP3_TR1 EQU 0x40004637\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BASE\r
-CYDEV_MFGCFG_PWRSYS_BASE EQU 0x40004680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_SIZE\r
-CYDEV_MFGCFG_PWRSYS_SIZE EQU 0x0000000b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_HIB_TR0\r
-CYDEV_MFGCFG_PWRSYS_HIB_TR0 EQU 0x40004680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_HIB_TR1\r
-CYDEV_MFGCFG_PWRSYS_HIB_TR1 EQU 0x40004681\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_I2C_TR\r
-CYDEV_MFGCFG_PWRSYS_I2C_TR EQU 0x40004682\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_SLP_TR\r
-CYDEV_MFGCFG_PWRSYS_SLP_TR EQU 0x40004683\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BUZZ_TR\r
-CYDEV_MFGCFG_PWRSYS_BUZZ_TR EQU 0x40004684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_WAKE_TR0\r
-CYDEV_MFGCFG_PWRSYS_WAKE_TR0 EQU 0x40004685\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_WAKE_TR1\r
-CYDEV_MFGCFG_PWRSYS_WAKE_TR1 EQU 0x40004686\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BREF_TR\r
-CYDEV_MFGCFG_PWRSYS_BREF_TR EQU 0x40004687\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BG_TR\r
-CYDEV_MFGCFG_PWRSYS_BG_TR EQU 0x40004688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_WAKE_TR2\r
-CYDEV_MFGCFG_PWRSYS_WAKE_TR2 EQU 0x40004689\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_WAKE_TR3\r
-CYDEV_MFGCFG_PWRSYS_WAKE_TR3 EQU 0x4000468a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_BASE\r
-CYDEV_MFGCFG_ILO_BASE EQU 0x40004690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_SIZE\r
-CYDEV_MFGCFG_ILO_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_TR0\r
-CYDEV_MFGCFG_ILO_TR0 EQU 0x40004690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_TR1\r
-CYDEV_MFGCFG_ILO_TR1 EQU 0x40004691\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_X32_BASE\r
-CYDEV_MFGCFG_X32_BASE EQU 0x40004698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_X32_SIZE\r
-CYDEV_MFGCFG_X32_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_X32_TR\r
-CYDEV_MFGCFG_X32_TR EQU 0x40004698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_BASE\r
-CYDEV_MFGCFG_IMO_BASE EQU 0x400046a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_SIZE\r
-CYDEV_MFGCFG_IMO_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_TR0\r
-CYDEV_MFGCFG_IMO_TR0 EQU 0x400046a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_TR1\r
-CYDEV_MFGCFG_IMO_TR1 EQU 0x400046a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_GAIN\r
-CYDEV_MFGCFG_IMO_GAIN EQU 0x400046a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_C36M\r
-CYDEV_MFGCFG_IMO_C36M EQU 0x400046a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_TR2\r
-CYDEV_MFGCFG_IMO_TR2 EQU 0x400046a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_BASE\r
-CYDEV_MFGCFG_XMHZ_BASE EQU 0x400046a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_SIZE\r
-CYDEV_MFGCFG_XMHZ_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_TR\r
-CYDEV_MFGCFG_XMHZ_TR EQU 0x400046a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_DLY\r
-CYDEV_MFGCFG_DLY EQU 0x400046c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_BASE\r
-CYDEV_MFGCFG_MLOGIC_BASE EQU 0x400046e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SIZE\r
-CYDEV_MFGCFG_MLOGIC_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_DMPSTR\r
-CYDEV_MFGCFG_MLOGIC_DMPSTR EQU 0x400046e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_BASE\r
-CYDEV_MFGCFG_MLOGIC_SEG_BASE EQU 0x400046e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_SIZE\r
-CYDEV_MFGCFG_MLOGIC_SEG_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_CR\r
-CYDEV_MFGCFG_MLOGIC_SEG_CR EQU 0x400046e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_CFG0\r
-CYDEV_MFGCFG_MLOGIC_SEG_CFG0 EQU 0x400046e5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_DEBUG\r
-CYDEV_MFGCFG_MLOGIC_DEBUG EQU 0x400046e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE\r
-CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE EQU 0x400046ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE\r
-CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR\r
-CYDEV_MFGCFG_MLOGIC_CPU_SCR_CPU_SCR EQU 0x400046ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_REV_ID\r
-CYDEV_MFGCFG_MLOGIC_REV_ID EQU 0x400046ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_BASE\r
-CYDEV_RESET_BASE EQU 0x400046f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SIZE\r
-CYDEV_RESET_SIZE EQU 0x0000000f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_IPOR_CR0\r
-CYDEV_RESET_IPOR_CR0 EQU 0x400046f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_IPOR_CR1\r
-CYDEV_RESET_IPOR_CR1 EQU 0x400046f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_IPOR_CR2\r
-CYDEV_RESET_IPOR_CR2 EQU 0x400046f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_IPOR_CR3\r
-CYDEV_RESET_IPOR_CR3 EQU 0x400046f3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR0\r
-CYDEV_RESET_CR0 EQU 0x400046f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR1\r
-CYDEV_RESET_CR1 EQU 0x400046f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR2\r
-CYDEV_RESET_CR2 EQU 0x400046f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR3\r
-CYDEV_RESET_CR3 EQU 0x400046f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR4\r
-CYDEV_RESET_CR4 EQU 0x400046f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_CR5\r
-CYDEV_RESET_CR5 EQU 0x400046f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SR0\r
-CYDEV_RESET_SR0 EQU 0x400046fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SR1\r
-CYDEV_RESET_SR1 EQU 0x400046fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SR2\r
-CYDEV_RESET_SR2 EQU 0x400046fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SR3\r
-CYDEV_RESET_SR3 EQU 0x400046fd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_TR\r
-CYDEV_RESET_TR EQU 0x400046fe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_BASE\r
-CYDEV_SPC_BASE EQU 0x40004700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_SIZE\r
-CYDEV_SPC_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_FM_EE_CR\r
-CYDEV_SPC_FM_EE_CR EQU 0x40004700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_FM_EE_WAKE_CNT\r
-CYDEV_SPC_FM_EE_WAKE_CNT EQU 0x40004701\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_EE_SCR\r
-CYDEV_SPC_EE_SCR EQU 0x40004702\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_EE_ERR\r
-CYDEV_SPC_EE_ERR EQU 0x40004703\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_CPU_DATA\r
-CYDEV_SPC_CPU_DATA EQU 0x40004720\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMA_DATA\r
-CYDEV_SPC_DMA_DATA EQU 0x40004721\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_SR\r
-CYDEV_SPC_SR EQU 0x40004722\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_CR\r
-CYDEV_SPC_CR EQU 0x40004723\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_BASE\r
-CYDEV_SPC_DMM_MAP_BASE EQU 0x40004780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_SIZE\r
-CYDEV_SPC_DMM_MAP_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_SRAM_MBASE\r
-CYDEV_SPC_DMM_MAP_SRAM_MBASE EQU 0x40004780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_SRAM_MSIZE\r
-CYDEV_SPC_DMM_MAP_SRAM_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_BASE\r
-CYDEV_CACHE_BASE EQU 0x40004800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_SIZE\r
-CYDEV_CACHE_SIZE EQU 0x0000009c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_CC_CTL\r
-CYDEV_CACHE_CC_CTL EQU 0x40004800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_ECC_CORR\r
-CYDEV_CACHE_ECC_CORR EQU 0x40004880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_ECC_ERR\r
-CYDEV_CACHE_ECC_ERR EQU 0x40004888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_FLASH_ERR\r
-CYDEV_CACHE_FLASH_ERR EQU 0x40004890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_HITMISS\r
-CYDEV_CACHE_HITMISS EQU 0x40004898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_BASE\r
-CYDEV_I2C_BASE EQU 0x40004900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_SIZE\r
-CYDEV_I2C_SIZE EQU 0x000000e1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_XCFG\r
-CYDEV_I2C_XCFG EQU 0x400049c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_ADR\r
-CYDEV_I2C_ADR EQU 0x400049ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_CFG\r
-CYDEV_I2C_CFG EQU 0x400049d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_CSR\r
-CYDEV_I2C_CSR EQU 0x400049d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_D\r
-CYDEV_I2C_D EQU 0x400049d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_MCSR\r
-CYDEV_I2C_MCSR EQU 0x400049d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_CLK_DIV1\r
-CYDEV_I2C_CLK_DIV1 EQU 0x400049db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_CLK_DIV2\r
-CYDEV_I2C_CLK_DIV2 EQU 0x400049dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_TMOUT_CSR\r
-CYDEV_I2C_TMOUT_CSR EQU 0x400049dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_TMOUT_SR\r
-CYDEV_I2C_TMOUT_SR EQU 0x400049de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_TMOUT_CFG0\r
-CYDEV_I2C_TMOUT_CFG0 EQU 0x400049df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_TMOUT_CFG1\r
-CYDEV_I2C_TMOUT_CFG1 EQU 0x400049e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_BASE\r
-CYDEV_DEC_BASE EQU 0x40004e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_SIZE\r
-CYDEV_DEC_SIZE EQU 0x00000015\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_CR\r
-CYDEV_DEC_CR EQU 0x40004e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_SR\r
-CYDEV_DEC_SR EQU 0x40004e01\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_SHIFT1\r
-CYDEV_DEC_SHIFT1 EQU 0x40004e02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_SHIFT2\r
-CYDEV_DEC_SHIFT2 EQU 0x40004e03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_DR2\r
-CYDEV_DEC_DR2 EQU 0x40004e04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_DR2H\r
-CYDEV_DEC_DR2H EQU 0x40004e05\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_DR1\r
-CYDEV_DEC_DR1 EQU 0x40004e06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OCOR\r
-CYDEV_DEC_OCOR EQU 0x40004e08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OCORM\r
-CYDEV_DEC_OCORM EQU 0x40004e09\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OCORH\r
-CYDEV_DEC_OCORH EQU 0x40004e0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_GCOR\r
-CYDEV_DEC_GCOR EQU 0x40004e0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_GCORH\r
-CYDEV_DEC_GCORH EQU 0x40004e0d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_GVAL\r
-CYDEV_DEC_GVAL EQU 0x40004e0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OUTSAMP\r
-CYDEV_DEC_OUTSAMP EQU 0x40004e10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OUTSAMPM\r
-CYDEV_DEC_OUTSAMPM EQU 0x40004e11\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OUTSAMPH\r
-CYDEV_DEC_OUTSAMPH EQU 0x40004e12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_OUTSAMPS\r
-CYDEV_DEC_OUTSAMPS EQU 0x40004e13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_COHER\r
-CYDEV_DEC_COHER EQU 0x40004e14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_BASE\r
-CYDEV_TMR0_BASE EQU 0x40004f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_SIZE\r
-CYDEV_TMR0_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CFG0\r
-CYDEV_TMR0_CFG0 EQU 0x40004f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CFG1\r
-CYDEV_TMR0_CFG1 EQU 0x40004f01\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CFG2\r
-CYDEV_TMR0_CFG2 EQU 0x40004f02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_SR0\r
-CYDEV_TMR0_SR0 EQU 0x40004f03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_PER0\r
-CYDEV_TMR0_PER0 EQU 0x40004f04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_PER1\r
-CYDEV_TMR0_PER1 EQU 0x40004f05\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CNT_CMP0\r
-CYDEV_TMR0_CNT_CMP0 EQU 0x40004f06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CNT_CMP1\r
-CYDEV_TMR0_CNT_CMP1 EQU 0x40004f07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CAP0\r
-CYDEV_TMR0_CAP0 EQU 0x40004f08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_CAP1\r
-CYDEV_TMR0_CAP1 EQU 0x40004f09\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_RT0\r
-CYDEV_TMR0_RT0 EQU 0x40004f0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_RT1\r
-CYDEV_TMR0_RT1 EQU 0x40004f0b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_BASE\r
-CYDEV_TMR1_BASE EQU 0x40004f0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_SIZE\r
-CYDEV_TMR1_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CFG0\r
-CYDEV_TMR1_CFG0 EQU 0x40004f0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CFG1\r
-CYDEV_TMR1_CFG1 EQU 0x40004f0d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CFG2\r
-CYDEV_TMR1_CFG2 EQU 0x40004f0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_SR0\r
-CYDEV_TMR1_SR0 EQU 0x40004f0f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_PER0\r
-CYDEV_TMR1_PER0 EQU 0x40004f10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_PER1\r
-CYDEV_TMR1_PER1 EQU 0x40004f11\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CNT_CMP0\r
-CYDEV_TMR1_CNT_CMP0 EQU 0x40004f12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CNT_CMP1\r
-CYDEV_TMR1_CNT_CMP1 EQU 0x40004f13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CAP0\r
-CYDEV_TMR1_CAP0 EQU 0x40004f14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_CAP1\r
-CYDEV_TMR1_CAP1 EQU 0x40004f15\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_RT0\r
-CYDEV_TMR1_RT0 EQU 0x40004f16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_RT1\r
-CYDEV_TMR1_RT1 EQU 0x40004f17\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_BASE\r
-CYDEV_TMR2_BASE EQU 0x40004f18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_SIZE\r
-CYDEV_TMR2_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CFG0\r
-CYDEV_TMR2_CFG0 EQU 0x40004f18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CFG1\r
-CYDEV_TMR2_CFG1 EQU 0x40004f19\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CFG2\r
-CYDEV_TMR2_CFG2 EQU 0x40004f1a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_SR0\r
-CYDEV_TMR2_SR0 EQU 0x40004f1b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_PER0\r
-CYDEV_TMR2_PER0 EQU 0x40004f1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_PER1\r
-CYDEV_TMR2_PER1 EQU 0x40004f1d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CNT_CMP0\r
-CYDEV_TMR2_CNT_CMP0 EQU 0x40004f1e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CNT_CMP1\r
-CYDEV_TMR2_CNT_CMP1 EQU 0x40004f1f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CAP0\r
-CYDEV_TMR2_CAP0 EQU 0x40004f20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_CAP1\r
-CYDEV_TMR2_CAP1 EQU 0x40004f21\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_RT0\r
-CYDEV_TMR2_RT0 EQU 0x40004f22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_RT1\r
-CYDEV_TMR2_RT1 EQU 0x40004f23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_BASE\r
-CYDEV_TMR3_BASE EQU 0x40004f24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_SIZE\r
-CYDEV_TMR3_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CFG0\r
-CYDEV_TMR3_CFG0 EQU 0x40004f24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CFG1\r
-CYDEV_TMR3_CFG1 EQU 0x40004f25\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CFG2\r
-CYDEV_TMR3_CFG2 EQU 0x40004f26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_SR0\r
-CYDEV_TMR3_SR0 EQU 0x40004f27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_PER0\r
-CYDEV_TMR3_PER0 EQU 0x40004f28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_PER1\r
-CYDEV_TMR3_PER1 EQU 0x40004f29\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CNT_CMP0\r
-CYDEV_TMR3_CNT_CMP0 EQU 0x40004f2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CNT_CMP1\r
-CYDEV_TMR3_CNT_CMP1 EQU 0x40004f2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CAP0\r
-CYDEV_TMR3_CAP0 EQU 0x40004f2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_CAP1\r
-CYDEV_TMR3_CAP1 EQU 0x40004f2d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_RT0\r
-CYDEV_TMR3_RT0 EQU 0x40004f2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_RT1\r
-CYDEV_TMR3_RT1 EQU 0x40004f2f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_BASE\r
-CYDEV_IO_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_SIZE\r
-CYDEV_IO_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_BASE\r
-CYDEV_IO_PC_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_SIZE\r
-CYDEV_IO_PC_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_BASE\r
-CYDEV_IO_PC_PRT0_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_SIZE\r
-CYDEV_IO_PC_PRT0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC0\r
-CYDEV_IO_PC_PRT0_PC0 EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC1\r
-CYDEV_IO_PC_PRT0_PC1 EQU 0x40005001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC2\r
-CYDEV_IO_PC_PRT0_PC2 EQU 0x40005002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC3\r
-CYDEV_IO_PC_PRT0_PC3 EQU 0x40005003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC4\r
-CYDEV_IO_PC_PRT0_PC4 EQU 0x40005004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC5\r
-CYDEV_IO_PC_PRT0_PC5 EQU 0x40005005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC6\r
-CYDEV_IO_PC_PRT0_PC6 EQU 0x40005006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_PC7\r
-CYDEV_IO_PC_PRT0_PC7 EQU 0x40005007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_BASE\r
-CYDEV_IO_PC_PRT1_BASE EQU 0x40005008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_SIZE\r
-CYDEV_IO_PC_PRT1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC0\r
-CYDEV_IO_PC_PRT1_PC0 EQU 0x40005008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC1\r
-CYDEV_IO_PC_PRT1_PC1 EQU 0x40005009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC2\r
-CYDEV_IO_PC_PRT1_PC2 EQU 0x4000500a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC3\r
-CYDEV_IO_PC_PRT1_PC3 EQU 0x4000500b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC4\r
-CYDEV_IO_PC_PRT1_PC4 EQU 0x4000500c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC5\r
-CYDEV_IO_PC_PRT1_PC5 EQU 0x4000500d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC6\r
-CYDEV_IO_PC_PRT1_PC6 EQU 0x4000500e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_PC7\r
-CYDEV_IO_PC_PRT1_PC7 EQU 0x4000500f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_BASE\r
-CYDEV_IO_PC_PRT2_BASE EQU 0x40005010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_SIZE\r
-CYDEV_IO_PC_PRT2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC0\r
-CYDEV_IO_PC_PRT2_PC0 EQU 0x40005010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC1\r
-CYDEV_IO_PC_PRT2_PC1 EQU 0x40005011\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC2\r
-CYDEV_IO_PC_PRT2_PC2 EQU 0x40005012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC3\r
-CYDEV_IO_PC_PRT2_PC3 EQU 0x40005013\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC4\r
-CYDEV_IO_PC_PRT2_PC4 EQU 0x40005014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC5\r
-CYDEV_IO_PC_PRT2_PC5 EQU 0x40005015\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC6\r
-CYDEV_IO_PC_PRT2_PC6 EQU 0x40005016\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_PC7\r
-CYDEV_IO_PC_PRT2_PC7 EQU 0x40005017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_BASE\r
-CYDEV_IO_PC_PRT3_BASE EQU 0x40005018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_SIZE\r
-CYDEV_IO_PC_PRT3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC0\r
-CYDEV_IO_PC_PRT3_PC0 EQU 0x40005018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC1\r
-CYDEV_IO_PC_PRT3_PC1 EQU 0x40005019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC2\r
-CYDEV_IO_PC_PRT3_PC2 EQU 0x4000501a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC3\r
-CYDEV_IO_PC_PRT3_PC3 EQU 0x4000501b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC4\r
-CYDEV_IO_PC_PRT3_PC4 EQU 0x4000501c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC5\r
-CYDEV_IO_PC_PRT3_PC5 EQU 0x4000501d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC6\r
-CYDEV_IO_PC_PRT3_PC6 EQU 0x4000501e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_PC7\r
-CYDEV_IO_PC_PRT3_PC7 EQU 0x4000501f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_BASE\r
-CYDEV_IO_PC_PRT4_BASE EQU 0x40005020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_SIZE\r
-CYDEV_IO_PC_PRT4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC0\r
-CYDEV_IO_PC_PRT4_PC0 EQU 0x40005020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC1\r
-CYDEV_IO_PC_PRT4_PC1 EQU 0x40005021\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC2\r
-CYDEV_IO_PC_PRT4_PC2 EQU 0x40005022\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC3\r
-CYDEV_IO_PC_PRT4_PC3 EQU 0x40005023\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC4\r
-CYDEV_IO_PC_PRT4_PC4 EQU 0x40005024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC5\r
-CYDEV_IO_PC_PRT4_PC5 EQU 0x40005025\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC6\r
-CYDEV_IO_PC_PRT4_PC6 EQU 0x40005026\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_PC7\r
-CYDEV_IO_PC_PRT4_PC7 EQU 0x40005027\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_BASE\r
-CYDEV_IO_PC_PRT5_BASE EQU 0x40005028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_SIZE\r
-CYDEV_IO_PC_PRT5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC0\r
-CYDEV_IO_PC_PRT5_PC0 EQU 0x40005028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC1\r
-CYDEV_IO_PC_PRT5_PC1 EQU 0x40005029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC2\r
-CYDEV_IO_PC_PRT5_PC2 EQU 0x4000502a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC3\r
-CYDEV_IO_PC_PRT5_PC3 EQU 0x4000502b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC4\r
-CYDEV_IO_PC_PRT5_PC4 EQU 0x4000502c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC5\r
-CYDEV_IO_PC_PRT5_PC5 EQU 0x4000502d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC6\r
-CYDEV_IO_PC_PRT5_PC6 EQU 0x4000502e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_PC7\r
-CYDEV_IO_PC_PRT5_PC7 EQU 0x4000502f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_BASE\r
-CYDEV_IO_PC_PRT6_BASE EQU 0x40005030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_SIZE\r
-CYDEV_IO_PC_PRT6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC0\r
-CYDEV_IO_PC_PRT6_PC0 EQU 0x40005030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC1\r
-CYDEV_IO_PC_PRT6_PC1 EQU 0x40005031\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC2\r
-CYDEV_IO_PC_PRT6_PC2 EQU 0x40005032\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC3\r
-CYDEV_IO_PC_PRT6_PC3 EQU 0x40005033\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC4\r
-CYDEV_IO_PC_PRT6_PC4 EQU 0x40005034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC5\r
-CYDEV_IO_PC_PRT6_PC5 EQU 0x40005035\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC6\r
-CYDEV_IO_PC_PRT6_PC6 EQU 0x40005036\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_PC7\r
-CYDEV_IO_PC_PRT6_PC7 EQU 0x40005037\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_BASE\r
-CYDEV_IO_PC_PRT12_BASE EQU 0x40005060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_SIZE\r
-CYDEV_IO_PC_PRT12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC0\r
-CYDEV_IO_PC_PRT12_PC0 EQU 0x40005060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC1\r
-CYDEV_IO_PC_PRT12_PC1 EQU 0x40005061\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC2\r
-CYDEV_IO_PC_PRT12_PC2 EQU 0x40005062\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC3\r
-CYDEV_IO_PC_PRT12_PC3 EQU 0x40005063\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC4\r
-CYDEV_IO_PC_PRT12_PC4 EQU 0x40005064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC5\r
-CYDEV_IO_PC_PRT12_PC5 EQU 0x40005065\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC6\r
-CYDEV_IO_PC_PRT12_PC6 EQU 0x40005066\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_PC7\r
-CYDEV_IO_PC_PRT12_PC7 EQU 0x40005067\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_BASE\r
-CYDEV_IO_PC_PRT15_BASE EQU 0x40005078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_SIZE\r
-CYDEV_IO_PC_PRT15_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC0\r
-CYDEV_IO_PC_PRT15_PC0 EQU 0x40005078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC1\r
-CYDEV_IO_PC_PRT15_PC1 EQU 0x40005079\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC2\r
-CYDEV_IO_PC_PRT15_PC2 EQU 0x4000507a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC3\r
-CYDEV_IO_PC_PRT15_PC3 EQU 0x4000507b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC4\r
-CYDEV_IO_PC_PRT15_PC4 EQU 0x4000507c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_PC5\r
-CYDEV_IO_PC_PRT15_PC5 EQU 0x4000507d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_BASE\r
-CYDEV_IO_PC_PRT15_7_6_BASE EQU 0x4000507e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_SIZE\r
-CYDEV_IO_PC_PRT15_7_6_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_PC0\r
-CYDEV_IO_PC_PRT15_7_6_PC0 EQU 0x4000507e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_PC1\r
-CYDEV_IO_PC_PRT15_7_6_PC1 EQU 0x4000507f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_BASE\r
-CYDEV_IO_DR_BASE EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_SIZE\r
-CYDEV_IO_DR_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT0_BASE\r
-CYDEV_IO_DR_PRT0_BASE EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT0_SIZE\r
-CYDEV_IO_DR_PRT0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT0_DR_ALIAS\r
-CYDEV_IO_DR_PRT0_DR_ALIAS EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT1_BASE\r
-CYDEV_IO_DR_PRT1_BASE EQU 0x40005081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT1_SIZE\r
-CYDEV_IO_DR_PRT1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT1_DR_ALIAS\r
-CYDEV_IO_DR_PRT1_DR_ALIAS EQU 0x40005081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT2_BASE\r
-CYDEV_IO_DR_PRT2_BASE EQU 0x40005082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT2_SIZE\r
-CYDEV_IO_DR_PRT2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT2_DR_ALIAS\r
-CYDEV_IO_DR_PRT2_DR_ALIAS EQU 0x40005082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT3_BASE\r
-CYDEV_IO_DR_PRT3_BASE EQU 0x40005083\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT3_SIZE\r
-CYDEV_IO_DR_PRT3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT3_DR_ALIAS\r
-CYDEV_IO_DR_PRT3_DR_ALIAS EQU 0x40005083\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT4_BASE\r
-CYDEV_IO_DR_PRT4_BASE EQU 0x40005084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT4_SIZE\r
-CYDEV_IO_DR_PRT4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT4_DR_ALIAS\r
-CYDEV_IO_DR_PRT4_DR_ALIAS EQU 0x40005084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT5_BASE\r
-CYDEV_IO_DR_PRT5_BASE EQU 0x40005085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT5_SIZE\r
-CYDEV_IO_DR_PRT5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT5_DR_ALIAS\r
-CYDEV_IO_DR_PRT5_DR_ALIAS EQU 0x40005085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT6_BASE\r
-CYDEV_IO_DR_PRT6_BASE EQU 0x40005086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT6_SIZE\r
-CYDEV_IO_DR_PRT6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT6_DR_ALIAS\r
-CYDEV_IO_DR_PRT6_DR_ALIAS EQU 0x40005086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT12_BASE\r
-CYDEV_IO_DR_PRT12_BASE EQU 0x4000508c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT12_SIZE\r
-CYDEV_IO_DR_PRT12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT12_DR_ALIAS\r
-CYDEV_IO_DR_PRT12_DR_ALIAS EQU 0x4000508c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT15_BASE\r
-CYDEV_IO_DR_PRT15_BASE EQU 0x4000508f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT15_SIZE\r
-CYDEV_IO_DR_PRT15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT15_DR_15_ALIAS\r
-CYDEV_IO_DR_PRT15_DR_15_ALIAS EQU 0x4000508f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_BASE\r
-CYDEV_IO_PS_BASE EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_SIZE\r
-CYDEV_IO_PS_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT0_BASE\r
-CYDEV_IO_PS_PRT0_BASE EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT0_SIZE\r
-CYDEV_IO_PS_PRT0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT0_PS_ALIAS\r
-CYDEV_IO_PS_PRT0_PS_ALIAS EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT1_BASE\r
-CYDEV_IO_PS_PRT1_BASE EQU 0x40005091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT1_SIZE\r
-CYDEV_IO_PS_PRT1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT1_PS_ALIAS\r
-CYDEV_IO_PS_PRT1_PS_ALIAS EQU 0x40005091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT2_BASE\r
-CYDEV_IO_PS_PRT2_BASE EQU 0x40005092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT2_SIZE\r
-CYDEV_IO_PS_PRT2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT2_PS_ALIAS\r
-CYDEV_IO_PS_PRT2_PS_ALIAS EQU 0x40005092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT3_BASE\r
-CYDEV_IO_PS_PRT3_BASE EQU 0x40005093\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT3_SIZE\r
-CYDEV_IO_PS_PRT3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT3_PS_ALIAS\r
-CYDEV_IO_PS_PRT3_PS_ALIAS EQU 0x40005093\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT4_BASE\r
-CYDEV_IO_PS_PRT4_BASE EQU 0x40005094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT4_SIZE\r
-CYDEV_IO_PS_PRT4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT4_PS_ALIAS\r
-CYDEV_IO_PS_PRT4_PS_ALIAS EQU 0x40005094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT5_BASE\r
-CYDEV_IO_PS_PRT5_BASE EQU 0x40005095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT5_SIZE\r
-CYDEV_IO_PS_PRT5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT5_PS_ALIAS\r
-CYDEV_IO_PS_PRT5_PS_ALIAS EQU 0x40005095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT6_BASE\r
-CYDEV_IO_PS_PRT6_BASE EQU 0x40005096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT6_SIZE\r
-CYDEV_IO_PS_PRT6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT6_PS_ALIAS\r
-CYDEV_IO_PS_PRT6_PS_ALIAS EQU 0x40005096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT12_BASE\r
-CYDEV_IO_PS_PRT12_BASE EQU 0x4000509c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT12_SIZE\r
-CYDEV_IO_PS_PRT12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT12_PS_ALIAS\r
-CYDEV_IO_PS_PRT12_PS_ALIAS EQU 0x4000509c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT15_BASE\r
-CYDEV_IO_PS_PRT15_BASE EQU 0x4000509f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT15_SIZE\r
-CYDEV_IO_PS_PRT15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT15_PS15_ALIAS\r
-CYDEV_IO_PS_PRT15_PS15_ALIAS EQU 0x4000509f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_BASE\r
-CYDEV_IO_PRT_BASE EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_SIZE\r
-CYDEV_IO_PRT_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BASE\r
-CYDEV_IO_PRT_PRT0_BASE EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_SIZE\r
-CYDEV_IO_PRT_PRT0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_DR\r
-CYDEV_IO_PRT_PRT0_DR EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_PS\r
-CYDEV_IO_PRT_PRT0_PS EQU 0x40005101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_DM0\r
-CYDEV_IO_PRT_PRT0_DM0 EQU 0x40005102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_DM1\r
-CYDEV_IO_PRT_PRT0_DM1 EQU 0x40005103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_DM2\r
-CYDEV_IO_PRT_PRT0_DM2 EQU 0x40005104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_SLW\r
-CYDEV_IO_PRT_PRT0_SLW EQU 0x40005105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BYP\r
-CYDEV_IO_PRT_PRT0_BYP EQU 0x40005106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BIE\r
-CYDEV_IO_PRT_PRT0_BIE EQU 0x40005107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_INP_DIS\r
-CYDEV_IO_PRT_PRT0_INP_DIS EQU 0x40005108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_CTL\r
-CYDEV_IO_PRT_PRT0_CTL EQU 0x40005109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_PRT\r
-CYDEV_IO_PRT_PRT0_PRT EQU 0x4000510a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BIT_MASK\r
-CYDEV_IO_PRT_PRT0_BIT_MASK EQU 0x4000510b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_AMUX\r
-CYDEV_IO_PRT_PRT0_AMUX EQU 0x4000510c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_AG\r
-CYDEV_IO_PRT_PRT0_AG EQU 0x4000510d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT0_LCD_COM_SEG EQU 0x4000510e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_LCD_EN\r
-CYDEV_IO_PRT_PRT0_LCD_EN EQU 0x4000510f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BASE\r
-CYDEV_IO_PRT_PRT1_BASE EQU 0x40005110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_SIZE\r
-CYDEV_IO_PRT_PRT1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_DR\r
-CYDEV_IO_PRT_PRT1_DR EQU 0x40005110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_PS\r
-CYDEV_IO_PRT_PRT1_PS EQU 0x40005111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_DM0\r
-CYDEV_IO_PRT_PRT1_DM0 EQU 0x40005112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_DM1\r
-CYDEV_IO_PRT_PRT1_DM1 EQU 0x40005113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_DM2\r
-CYDEV_IO_PRT_PRT1_DM2 EQU 0x40005114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_SLW\r
-CYDEV_IO_PRT_PRT1_SLW EQU 0x40005115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BYP\r
-CYDEV_IO_PRT_PRT1_BYP EQU 0x40005116\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BIE\r
-CYDEV_IO_PRT_PRT1_BIE EQU 0x40005117\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_INP_DIS\r
-CYDEV_IO_PRT_PRT1_INP_DIS EQU 0x40005118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_CTL\r
-CYDEV_IO_PRT_PRT1_CTL EQU 0x40005119\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_PRT\r
-CYDEV_IO_PRT_PRT1_PRT EQU 0x4000511a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BIT_MASK\r
-CYDEV_IO_PRT_PRT1_BIT_MASK EQU 0x4000511b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_AMUX\r
-CYDEV_IO_PRT_PRT1_AMUX EQU 0x4000511c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_AG\r
-CYDEV_IO_PRT_PRT1_AG EQU 0x4000511d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT1_LCD_COM_SEG EQU 0x4000511e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_LCD_EN\r
-CYDEV_IO_PRT_PRT1_LCD_EN EQU 0x4000511f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BASE\r
-CYDEV_IO_PRT_PRT2_BASE EQU 0x40005120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_SIZE\r
-CYDEV_IO_PRT_PRT2_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_DR\r
-CYDEV_IO_PRT_PRT2_DR EQU 0x40005120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_PS\r
-CYDEV_IO_PRT_PRT2_PS EQU 0x40005121\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_DM0\r
-CYDEV_IO_PRT_PRT2_DM0 EQU 0x40005122\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_DM1\r
-CYDEV_IO_PRT_PRT2_DM1 EQU 0x40005123\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_DM2\r
-CYDEV_IO_PRT_PRT2_DM2 EQU 0x40005124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_SLW\r
-CYDEV_IO_PRT_PRT2_SLW EQU 0x40005125\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BYP\r
-CYDEV_IO_PRT_PRT2_BYP EQU 0x40005126\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BIE\r
-CYDEV_IO_PRT_PRT2_BIE EQU 0x40005127\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_INP_DIS\r
-CYDEV_IO_PRT_PRT2_INP_DIS EQU 0x40005128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_CTL\r
-CYDEV_IO_PRT_PRT2_CTL EQU 0x40005129\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_PRT\r
-CYDEV_IO_PRT_PRT2_PRT EQU 0x4000512a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BIT_MASK\r
-CYDEV_IO_PRT_PRT2_BIT_MASK EQU 0x4000512b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_AMUX\r
-CYDEV_IO_PRT_PRT2_AMUX EQU 0x4000512c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_AG\r
-CYDEV_IO_PRT_PRT2_AG EQU 0x4000512d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT2_LCD_COM_SEG EQU 0x4000512e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_LCD_EN\r
-CYDEV_IO_PRT_PRT2_LCD_EN EQU 0x4000512f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BASE\r
-CYDEV_IO_PRT_PRT3_BASE EQU 0x40005130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_SIZE\r
-CYDEV_IO_PRT_PRT3_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_DR\r
-CYDEV_IO_PRT_PRT3_DR EQU 0x40005130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_PS\r
-CYDEV_IO_PRT_PRT3_PS EQU 0x40005131\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_DM0\r
-CYDEV_IO_PRT_PRT3_DM0 EQU 0x40005132\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_DM1\r
-CYDEV_IO_PRT_PRT3_DM1 EQU 0x40005133\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_DM2\r
-CYDEV_IO_PRT_PRT3_DM2 EQU 0x40005134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_SLW\r
-CYDEV_IO_PRT_PRT3_SLW EQU 0x40005135\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BYP\r
-CYDEV_IO_PRT_PRT3_BYP EQU 0x40005136\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BIE\r
-CYDEV_IO_PRT_PRT3_BIE EQU 0x40005137\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_INP_DIS\r
-CYDEV_IO_PRT_PRT3_INP_DIS EQU 0x40005138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_CTL\r
-CYDEV_IO_PRT_PRT3_CTL EQU 0x40005139\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_PRT\r
-CYDEV_IO_PRT_PRT3_PRT EQU 0x4000513a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BIT_MASK\r
-CYDEV_IO_PRT_PRT3_BIT_MASK EQU 0x4000513b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_AMUX\r
-CYDEV_IO_PRT_PRT3_AMUX EQU 0x4000513c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_AG\r
-CYDEV_IO_PRT_PRT3_AG EQU 0x4000513d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT3_LCD_COM_SEG EQU 0x4000513e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_LCD_EN\r
-CYDEV_IO_PRT_PRT3_LCD_EN EQU 0x4000513f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BASE\r
-CYDEV_IO_PRT_PRT4_BASE EQU 0x40005140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_SIZE\r
-CYDEV_IO_PRT_PRT4_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_DR\r
-CYDEV_IO_PRT_PRT4_DR EQU 0x40005140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_PS\r
-CYDEV_IO_PRT_PRT4_PS EQU 0x40005141\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_DM0\r
-CYDEV_IO_PRT_PRT4_DM0 EQU 0x40005142\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_DM1\r
-CYDEV_IO_PRT_PRT4_DM1 EQU 0x40005143\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_DM2\r
-CYDEV_IO_PRT_PRT4_DM2 EQU 0x40005144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_SLW\r
-CYDEV_IO_PRT_PRT4_SLW EQU 0x40005145\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BYP\r
-CYDEV_IO_PRT_PRT4_BYP EQU 0x40005146\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BIE\r
-CYDEV_IO_PRT_PRT4_BIE EQU 0x40005147\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_INP_DIS\r
-CYDEV_IO_PRT_PRT4_INP_DIS EQU 0x40005148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_CTL\r
-CYDEV_IO_PRT_PRT4_CTL EQU 0x40005149\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_PRT\r
-CYDEV_IO_PRT_PRT4_PRT EQU 0x4000514a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BIT_MASK\r
-CYDEV_IO_PRT_PRT4_BIT_MASK EQU 0x4000514b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_AMUX\r
-CYDEV_IO_PRT_PRT4_AMUX EQU 0x4000514c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_AG\r
-CYDEV_IO_PRT_PRT4_AG EQU 0x4000514d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT4_LCD_COM_SEG EQU 0x4000514e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_LCD_EN\r
-CYDEV_IO_PRT_PRT4_LCD_EN EQU 0x4000514f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BASE\r
-CYDEV_IO_PRT_PRT5_BASE EQU 0x40005150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_SIZE\r
-CYDEV_IO_PRT_PRT5_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_DR\r
-CYDEV_IO_PRT_PRT5_DR EQU 0x40005150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_PS\r
-CYDEV_IO_PRT_PRT5_PS EQU 0x40005151\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_DM0\r
-CYDEV_IO_PRT_PRT5_DM0 EQU 0x40005152\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_DM1\r
-CYDEV_IO_PRT_PRT5_DM1 EQU 0x40005153\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_DM2\r
-CYDEV_IO_PRT_PRT5_DM2 EQU 0x40005154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_SLW\r
-CYDEV_IO_PRT_PRT5_SLW EQU 0x40005155\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BYP\r
-CYDEV_IO_PRT_PRT5_BYP EQU 0x40005156\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BIE\r
-CYDEV_IO_PRT_PRT5_BIE EQU 0x40005157\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_INP_DIS\r
-CYDEV_IO_PRT_PRT5_INP_DIS EQU 0x40005158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_CTL\r
-CYDEV_IO_PRT_PRT5_CTL EQU 0x40005159\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_PRT\r
-CYDEV_IO_PRT_PRT5_PRT EQU 0x4000515a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BIT_MASK\r
-CYDEV_IO_PRT_PRT5_BIT_MASK EQU 0x4000515b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_AMUX\r
-CYDEV_IO_PRT_PRT5_AMUX EQU 0x4000515c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_AG\r
-CYDEV_IO_PRT_PRT5_AG EQU 0x4000515d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT5_LCD_COM_SEG EQU 0x4000515e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_LCD_EN\r
-CYDEV_IO_PRT_PRT5_LCD_EN EQU 0x4000515f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BASE\r
-CYDEV_IO_PRT_PRT6_BASE EQU 0x40005160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_SIZE\r
-CYDEV_IO_PRT_PRT6_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_DR\r
-CYDEV_IO_PRT_PRT6_DR EQU 0x40005160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_PS\r
-CYDEV_IO_PRT_PRT6_PS EQU 0x40005161\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_DM0\r
-CYDEV_IO_PRT_PRT6_DM0 EQU 0x40005162\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_DM1\r
-CYDEV_IO_PRT_PRT6_DM1 EQU 0x40005163\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_DM2\r
-CYDEV_IO_PRT_PRT6_DM2 EQU 0x40005164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_SLW\r
-CYDEV_IO_PRT_PRT6_SLW EQU 0x40005165\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BYP\r
-CYDEV_IO_PRT_PRT6_BYP EQU 0x40005166\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BIE\r
-CYDEV_IO_PRT_PRT6_BIE EQU 0x40005167\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_INP_DIS\r
-CYDEV_IO_PRT_PRT6_INP_DIS EQU 0x40005168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_CTL\r
-CYDEV_IO_PRT_PRT6_CTL EQU 0x40005169\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_PRT\r
-CYDEV_IO_PRT_PRT6_PRT EQU 0x4000516a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BIT_MASK\r
-CYDEV_IO_PRT_PRT6_BIT_MASK EQU 0x4000516b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_AMUX\r
-CYDEV_IO_PRT_PRT6_AMUX EQU 0x4000516c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_AG\r
-CYDEV_IO_PRT_PRT6_AG EQU 0x4000516d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT6_LCD_COM_SEG EQU 0x4000516e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_LCD_EN\r
-CYDEV_IO_PRT_PRT6_LCD_EN EQU 0x4000516f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BASE\r
-CYDEV_IO_PRT_PRT12_BASE EQU 0x400051c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIZE\r
-CYDEV_IO_PRT_PRT12_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_DR\r
-CYDEV_IO_PRT_PRT12_DR EQU 0x400051c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_PS\r
-CYDEV_IO_PRT_PRT12_PS EQU 0x400051c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_DM0\r
-CYDEV_IO_PRT_PRT12_DM0 EQU 0x400051c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_DM1\r
-CYDEV_IO_PRT_PRT12_DM1 EQU 0x400051c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_DM2\r
-CYDEV_IO_PRT_PRT12_DM2 EQU 0x400051c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SLW\r
-CYDEV_IO_PRT_PRT12_SLW EQU 0x400051c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BYP\r
-CYDEV_IO_PRT_PRT12_BYP EQU 0x400051c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BIE\r
-CYDEV_IO_PRT_PRT12_BIE EQU 0x400051c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_INP_DIS\r
-CYDEV_IO_PRT_PRT12_INP_DIS EQU 0x400051c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIO_HYST_EN\r
-CYDEV_IO_PRT_PRT12_SIO_HYST_EN EQU 0x400051c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_PRT\r
-CYDEV_IO_PRT_PRT12_PRT EQU 0x400051ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BIT_MASK\r
-CYDEV_IO_PRT_PRT12_BIT_MASK EQU 0x400051cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ\r
-CYDEV_IO_PRT_PRT12_SIO_REG_HIFREQ EQU 0x400051cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_AG\r
-CYDEV_IO_PRT_PRT12_AG EQU 0x400051cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIO_CFG\r
-CYDEV_IO_PRT_PRT12_SIO_CFG EQU 0x400051ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIO_DIFF\r
-CYDEV_IO_PRT_PRT12_SIO_DIFF EQU 0x400051cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BASE\r
-CYDEV_IO_PRT_PRT15_BASE EQU 0x400051f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_SIZE\r
-CYDEV_IO_PRT_PRT15_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_DR\r
-CYDEV_IO_PRT_PRT15_DR EQU 0x400051f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_PS\r
-CYDEV_IO_PRT_PRT15_PS EQU 0x400051f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_DM0\r
-CYDEV_IO_PRT_PRT15_DM0 EQU 0x400051f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_DM1\r
-CYDEV_IO_PRT_PRT15_DM1 EQU 0x400051f3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_DM2\r
-CYDEV_IO_PRT_PRT15_DM2 EQU 0x400051f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_SLW\r
-CYDEV_IO_PRT_PRT15_SLW EQU 0x400051f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BYP\r
-CYDEV_IO_PRT_PRT15_BYP EQU 0x400051f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BIE\r
-CYDEV_IO_PRT_PRT15_BIE EQU 0x400051f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_INP_DIS\r
-CYDEV_IO_PRT_PRT15_INP_DIS EQU 0x400051f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_CTL\r
-CYDEV_IO_PRT_PRT15_CTL EQU 0x400051f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_PRT\r
-CYDEV_IO_PRT_PRT15_PRT EQU 0x400051fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BIT_MASK\r
-CYDEV_IO_PRT_PRT15_BIT_MASK EQU 0x400051fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_AMUX\r
-CYDEV_IO_PRT_PRT15_AMUX EQU 0x400051fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_AG\r
-CYDEV_IO_PRT_PRT15_AG EQU 0x400051fd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_LCD_COM_SEG\r
-CYDEV_IO_PRT_PRT15_LCD_COM_SEG EQU 0x400051fe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_LCD_EN\r
-CYDEV_IO_PRT_PRT15_LCD_EN EQU 0x400051ff\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_BASE\r
-CYDEV_PRTDSI_BASE EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_SIZE\r
-CYDEV_PRTDSI_SIZE EQU 0x0000007f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_BASE\r
-CYDEV_PRTDSI_PRT0_BASE EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_SIZE\r
-CYDEV_PRTDSI_PRT0_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_OUT_SEL0\r
-CYDEV_PRTDSI_PRT0_OUT_SEL0 EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_OUT_SEL1\r
-CYDEV_PRTDSI_PRT0_OUT_SEL1 EQU 0x40005201\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_OE_SEL0\r
-CYDEV_PRTDSI_PRT0_OE_SEL0 EQU 0x40005202\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_OE_SEL1\r
-CYDEV_PRTDSI_PRT0_OE_SEL1 EQU 0x40005203\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT0_DBL_SYNC_IN EQU 0x40005204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_SYNC_OUT\r
-CYDEV_PRTDSI_PRT0_SYNC_OUT EQU 0x40005205\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_CAPS_SEL\r
-CYDEV_PRTDSI_PRT0_CAPS_SEL EQU 0x40005206\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_BASE\r
-CYDEV_PRTDSI_PRT1_BASE EQU 0x40005208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_SIZE\r
-CYDEV_PRTDSI_PRT1_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_OUT_SEL0\r
-CYDEV_PRTDSI_PRT1_OUT_SEL0 EQU 0x40005208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_OUT_SEL1\r
-CYDEV_PRTDSI_PRT1_OUT_SEL1 EQU 0x40005209\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_OE_SEL0\r
-CYDEV_PRTDSI_PRT1_OE_SEL0 EQU 0x4000520a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_OE_SEL1\r
-CYDEV_PRTDSI_PRT1_OE_SEL1 EQU 0x4000520b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT1_DBL_SYNC_IN EQU 0x4000520c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_SYNC_OUT\r
-CYDEV_PRTDSI_PRT1_SYNC_OUT EQU 0x4000520d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_CAPS_SEL\r
-CYDEV_PRTDSI_PRT1_CAPS_SEL EQU 0x4000520e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_BASE\r
-CYDEV_PRTDSI_PRT2_BASE EQU 0x40005210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_SIZE\r
-CYDEV_PRTDSI_PRT2_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_OUT_SEL0\r
-CYDEV_PRTDSI_PRT2_OUT_SEL0 EQU 0x40005210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_OUT_SEL1\r
-CYDEV_PRTDSI_PRT2_OUT_SEL1 EQU 0x40005211\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_OE_SEL0\r
-CYDEV_PRTDSI_PRT2_OE_SEL0 EQU 0x40005212\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_OE_SEL1\r
-CYDEV_PRTDSI_PRT2_OE_SEL1 EQU 0x40005213\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT2_DBL_SYNC_IN EQU 0x40005214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_SYNC_OUT\r
-CYDEV_PRTDSI_PRT2_SYNC_OUT EQU 0x40005215\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_CAPS_SEL\r
-CYDEV_PRTDSI_PRT2_CAPS_SEL EQU 0x40005216\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_BASE\r
-CYDEV_PRTDSI_PRT3_BASE EQU 0x40005218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_SIZE\r
-CYDEV_PRTDSI_PRT3_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_OUT_SEL0\r
-CYDEV_PRTDSI_PRT3_OUT_SEL0 EQU 0x40005218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_OUT_SEL1\r
-CYDEV_PRTDSI_PRT3_OUT_SEL1 EQU 0x40005219\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_OE_SEL0\r
-CYDEV_PRTDSI_PRT3_OE_SEL0 EQU 0x4000521a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_OE_SEL1\r
-CYDEV_PRTDSI_PRT3_OE_SEL1 EQU 0x4000521b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT3_DBL_SYNC_IN EQU 0x4000521c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_SYNC_OUT\r
-CYDEV_PRTDSI_PRT3_SYNC_OUT EQU 0x4000521d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_CAPS_SEL\r
-CYDEV_PRTDSI_PRT3_CAPS_SEL EQU 0x4000521e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_BASE\r
-CYDEV_PRTDSI_PRT4_BASE EQU 0x40005220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_SIZE\r
-CYDEV_PRTDSI_PRT4_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_OUT_SEL0\r
-CYDEV_PRTDSI_PRT4_OUT_SEL0 EQU 0x40005220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_OUT_SEL1\r
-CYDEV_PRTDSI_PRT4_OUT_SEL1 EQU 0x40005221\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_OE_SEL0\r
-CYDEV_PRTDSI_PRT4_OE_SEL0 EQU 0x40005222\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_OE_SEL1\r
-CYDEV_PRTDSI_PRT4_OE_SEL1 EQU 0x40005223\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT4_DBL_SYNC_IN EQU 0x40005224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_SYNC_OUT\r
-CYDEV_PRTDSI_PRT4_SYNC_OUT EQU 0x40005225\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_CAPS_SEL\r
-CYDEV_PRTDSI_PRT4_CAPS_SEL EQU 0x40005226\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_BASE\r
-CYDEV_PRTDSI_PRT5_BASE EQU 0x40005228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_SIZE\r
-CYDEV_PRTDSI_PRT5_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_OUT_SEL0\r
-CYDEV_PRTDSI_PRT5_OUT_SEL0 EQU 0x40005228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_OUT_SEL1\r
-CYDEV_PRTDSI_PRT5_OUT_SEL1 EQU 0x40005229\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_OE_SEL0\r
-CYDEV_PRTDSI_PRT5_OE_SEL0 EQU 0x4000522a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_OE_SEL1\r
-CYDEV_PRTDSI_PRT5_OE_SEL1 EQU 0x4000522b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT5_DBL_SYNC_IN EQU 0x4000522c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_SYNC_OUT\r
-CYDEV_PRTDSI_PRT5_SYNC_OUT EQU 0x4000522d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_CAPS_SEL\r
-CYDEV_PRTDSI_PRT5_CAPS_SEL EQU 0x4000522e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_BASE\r
-CYDEV_PRTDSI_PRT6_BASE EQU 0x40005230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_SIZE\r
-CYDEV_PRTDSI_PRT6_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_OUT_SEL0\r
-CYDEV_PRTDSI_PRT6_OUT_SEL0 EQU 0x40005230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_OUT_SEL1\r
-CYDEV_PRTDSI_PRT6_OUT_SEL1 EQU 0x40005231\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_OE_SEL0\r
-CYDEV_PRTDSI_PRT6_OE_SEL0 EQU 0x40005232\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_OE_SEL1\r
-CYDEV_PRTDSI_PRT6_OE_SEL1 EQU 0x40005233\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT6_DBL_SYNC_IN EQU 0x40005234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_SYNC_OUT\r
-CYDEV_PRTDSI_PRT6_SYNC_OUT EQU 0x40005235\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_CAPS_SEL\r
-CYDEV_PRTDSI_PRT6_CAPS_SEL EQU 0x40005236\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_BASE\r
-CYDEV_PRTDSI_PRT12_BASE EQU 0x40005260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_SIZE\r
-CYDEV_PRTDSI_PRT12_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_OUT_SEL0\r
-CYDEV_PRTDSI_PRT12_OUT_SEL0 EQU 0x40005260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_OUT_SEL1\r
-CYDEV_PRTDSI_PRT12_OUT_SEL1 EQU 0x40005261\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_OE_SEL0\r
-CYDEV_PRTDSI_PRT12_OE_SEL0 EQU 0x40005262\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_OE_SEL1\r
-CYDEV_PRTDSI_PRT12_OE_SEL1 EQU 0x40005263\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT12_DBL_SYNC_IN EQU 0x40005264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_SYNC_OUT\r
-CYDEV_PRTDSI_PRT12_SYNC_OUT EQU 0x40005265\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_BASE\r
-CYDEV_PRTDSI_PRT15_BASE EQU 0x40005278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_SIZE\r
-CYDEV_PRTDSI_PRT15_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_OUT_SEL0\r
-CYDEV_PRTDSI_PRT15_OUT_SEL0 EQU 0x40005278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_OUT_SEL1\r
-CYDEV_PRTDSI_PRT15_OUT_SEL1 EQU 0x40005279\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_OE_SEL0\r
-CYDEV_PRTDSI_PRT15_OE_SEL0 EQU 0x4000527a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_OE_SEL1\r
-CYDEV_PRTDSI_PRT15_OE_SEL1 EQU 0x4000527b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_DBL_SYNC_IN\r
-CYDEV_PRTDSI_PRT15_DBL_SYNC_IN EQU 0x4000527c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_SYNC_OUT\r
-CYDEV_PRTDSI_PRT15_SYNC_OUT EQU 0x4000527d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_CAPS_SEL\r
-CYDEV_PRTDSI_PRT15_CAPS_SEL EQU 0x4000527e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_BASE\r
-CYDEV_EMIF_BASE EQU 0x40005400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_SIZE\r
-CYDEV_EMIF_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_NO_UDB\r
-CYDEV_EMIF_NO_UDB EQU 0x40005400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_RP_WAIT_STATES\r
-CYDEV_EMIF_RP_WAIT_STATES EQU 0x40005401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_MEM_DWN\r
-CYDEV_EMIF_MEM_DWN EQU 0x40005402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_MEMCLK_DIV\r
-CYDEV_EMIF_MEMCLK_DIV EQU 0x40005403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_CLOCK_EN\r
-CYDEV_EMIF_CLOCK_EN EQU 0x40005404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_EM_TYPE\r
-CYDEV_EMIF_EM_TYPE EQU 0x40005405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_WP_WAIT_STATES\r
-CYDEV_EMIF_WP_WAIT_STATES EQU 0x40005406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_BASE\r
-CYDEV_ANAIF_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_SIZE\r
-CYDEV_ANAIF_SIZE EQU 0x000003a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BASE\r
-CYDEV_ANAIF_CFG_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SIZE\r
-CYDEV_ANAIF_CFG_SIZE EQU 0x0000010f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_BASE\r
-CYDEV_ANAIF_CFG_SC0_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_SIZE\r
-CYDEV_ANAIF_CFG_SC0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_CR0\r
-CYDEV_ANAIF_CFG_SC0_CR0 EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_CR1\r
-CYDEV_ANAIF_CFG_SC0_CR1 EQU 0x40005801\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_CR2\r
-CYDEV_ANAIF_CFG_SC0_CR2 EQU 0x40005802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_BASE\r
-CYDEV_ANAIF_CFG_SC1_BASE EQU 0x40005804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_SIZE\r
-CYDEV_ANAIF_CFG_SC1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_CR0\r
-CYDEV_ANAIF_CFG_SC1_CR0 EQU 0x40005804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_CR1\r
-CYDEV_ANAIF_CFG_SC1_CR1 EQU 0x40005805\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_CR2\r
-CYDEV_ANAIF_CFG_SC1_CR2 EQU 0x40005806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_BASE\r
-CYDEV_ANAIF_CFG_SC2_BASE EQU 0x40005808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_SIZE\r
-CYDEV_ANAIF_CFG_SC2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_CR0\r
-CYDEV_ANAIF_CFG_SC2_CR0 EQU 0x40005808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_CR1\r
-CYDEV_ANAIF_CFG_SC2_CR1 EQU 0x40005809\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_CR2\r
-CYDEV_ANAIF_CFG_SC2_CR2 EQU 0x4000580a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_BASE\r
-CYDEV_ANAIF_CFG_SC3_BASE EQU 0x4000580c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_SIZE\r
-CYDEV_ANAIF_CFG_SC3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_CR0\r
-CYDEV_ANAIF_CFG_SC3_CR0 EQU 0x4000580c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_CR1\r
-CYDEV_ANAIF_CFG_SC3_CR1 EQU 0x4000580d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_CR2\r
-CYDEV_ANAIF_CFG_SC3_CR2 EQU 0x4000580e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_BASE\r
-CYDEV_ANAIF_CFG_DAC0_BASE EQU 0x40005820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_SIZE\r
-CYDEV_ANAIF_CFG_DAC0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_CR0\r
-CYDEV_ANAIF_CFG_DAC0_CR0 EQU 0x40005820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_CR1\r
-CYDEV_ANAIF_CFG_DAC0_CR1 EQU 0x40005821\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_TST\r
-CYDEV_ANAIF_CFG_DAC0_TST EQU 0x40005822\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_BASE\r
-CYDEV_ANAIF_CFG_DAC1_BASE EQU 0x40005824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_SIZE\r
-CYDEV_ANAIF_CFG_DAC1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_CR0\r
-CYDEV_ANAIF_CFG_DAC1_CR0 EQU 0x40005824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_CR1\r
-CYDEV_ANAIF_CFG_DAC1_CR1 EQU 0x40005825\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_TST\r
-CYDEV_ANAIF_CFG_DAC1_TST EQU 0x40005826\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_BASE\r
-CYDEV_ANAIF_CFG_DAC2_BASE EQU 0x40005828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_SIZE\r
-CYDEV_ANAIF_CFG_DAC2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_CR0\r
-CYDEV_ANAIF_CFG_DAC2_CR0 EQU 0x40005828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_CR1\r
-CYDEV_ANAIF_CFG_DAC2_CR1 EQU 0x40005829\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_TST\r
-CYDEV_ANAIF_CFG_DAC2_TST EQU 0x4000582a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_BASE\r
-CYDEV_ANAIF_CFG_DAC3_BASE EQU 0x4000582c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_SIZE\r
-CYDEV_ANAIF_CFG_DAC3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_CR0\r
-CYDEV_ANAIF_CFG_DAC3_CR0 EQU 0x4000582c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_CR1\r
-CYDEV_ANAIF_CFG_DAC3_CR1 EQU 0x4000582d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_TST\r
-CYDEV_ANAIF_CFG_DAC3_TST EQU 0x4000582e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_BASE\r
-CYDEV_ANAIF_CFG_CMP0_BASE EQU 0x40005840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_SIZE\r
-CYDEV_ANAIF_CFG_CMP0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_CR\r
-CYDEV_ANAIF_CFG_CMP0_CR EQU 0x40005840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_BASE\r
-CYDEV_ANAIF_CFG_CMP1_BASE EQU 0x40005841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_SIZE\r
-CYDEV_ANAIF_CFG_CMP1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_CR\r
-CYDEV_ANAIF_CFG_CMP1_CR EQU 0x40005841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_BASE\r
-CYDEV_ANAIF_CFG_CMP2_BASE EQU 0x40005842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_SIZE\r
-CYDEV_ANAIF_CFG_CMP2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_CR\r
-CYDEV_ANAIF_CFG_CMP2_CR EQU 0x40005842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_BASE\r
-CYDEV_ANAIF_CFG_CMP3_BASE EQU 0x40005843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_SIZE\r
-CYDEV_ANAIF_CFG_CMP3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_CR\r
-CYDEV_ANAIF_CFG_CMP3_CR EQU 0x40005843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_BASE\r
-CYDEV_ANAIF_CFG_LUT0_BASE EQU 0x40005848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_SIZE\r
-CYDEV_ANAIF_CFG_LUT0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_CR\r
-CYDEV_ANAIF_CFG_LUT0_CR EQU 0x40005848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_MX\r
-CYDEV_ANAIF_CFG_LUT0_MX EQU 0x40005849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_BASE\r
-CYDEV_ANAIF_CFG_LUT1_BASE EQU 0x4000584a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_SIZE\r
-CYDEV_ANAIF_CFG_LUT1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_CR\r
-CYDEV_ANAIF_CFG_LUT1_CR EQU 0x4000584a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_MX\r
-CYDEV_ANAIF_CFG_LUT1_MX EQU 0x4000584b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_BASE\r
-CYDEV_ANAIF_CFG_LUT2_BASE EQU 0x4000584c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_SIZE\r
-CYDEV_ANAIF_CFG_LUT2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_CR\r
-CYDEV_ANAIF_CFG_LUT2_CR EQU 0x4000584c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_MX\r
-CYDEV_ANAIF_CFG_LUT2_MX EQU 0x4000584d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_BASE\r
-CYDEV_ANAIF_CFG_LUT3_BASE EQU 0x4000584e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_SIZE\r
-CYDEV_ANAIF_CFG_LUT3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_CR\r
-CYDEV_ANAIF_CFG_LUT3_CR EQU 0x4000584e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_MX\r
-CYDEV_ANAIF_CFG_LUT3_MX EQU 0x4000584f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_BASE\r
-CYDEV_ANAIF_CFG_OPAMP0_BASE EQU 0x40005858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_CR\r
-CYDEV_ANAIF_CFG_OPAMP0_CR EQU 0x40005858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_RSVD\r
-CYDEV_ANAIF_CFG_OPAMP0_RSVD EQU 0x40005859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_BASE\r
-CYDEV_ANAIF_CFG_OPAMP1_BASE EQU 0x4000585a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_CR\r
-CYDEV_ANAIF_CFG_OPAMP1_CR EQU 0x4000585a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_RSVD\r
-CYDEV_ANAIF_CFG_OPAMP1_RSVD EQU 0x4000585b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_BASE\r
-CYDEV_ANAIF_CFG_OPAMP2_BASE EQU 0x4000585c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_CR\r
-CYDEV_ANAIF_CFG_OPAMP2_CR EQU 0x4000585c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_RSVD\r
-CYDEV_ANAIF_CFG_OPAMP2_RSVD EQU 0x4000585d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_BASE\r
-CYDEV_ANAIF_CFG_OPAMP3_BASE EQU 0x4000585e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_CR\r
-CYDEV_ANAIF_CFG_OPAMP3_CR EQU 0x4000585e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_RSVD\r
-CYDEV_ANAIF_CFG_OPAMP3_RSVD EQU 0x4000585f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_BASE\r
-CYDEV_ANAIF_CFG_LCDDAC_BASE EQU 0x40005868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_SIZE\r
-CYDEV_ANAIF_CFG_LCDDAC_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_CR0\r
-CYDEV_ANAIF_CFG_LCDDAC_CR0 EQU 0x40005868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_CR1\r
-CYDEV_ANAIF_CFG_LCDDAC_CR1 EQU 0x40005869\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_BASE\r
-CYDEV_ANAIF_CFG_LCDDRV_BASE EQU 0x4000586a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_SIZE\r
-CYDEV_ANAIF_CFG_LCDDRV_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_CR\r
-CYDEV_ANAIF_CFG_LCDDRV_CR EQU 0x4000586a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_BASE\r
-CYDEV_ANAIF_CFG_LCDTMR_BASE EQU 0x4000586b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_SIZE\r
-CYDEV_ANAIF_CFG_LCDTMR_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_CFG\r
-CYDEV_ANAIF_CFG_LCDTMR_CFG EQU 0x4000586b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_BASE\r
-CYDEV_ANAIF_CFG_BG_BASE EQU 0x4000586c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_SIZE\r
-CYDEV_ANAIF_CFG_BG_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_CR0\r
-CYDEV_ANAIF_CFG_BG_CR0 EQU 0x4000586c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_RSVD\r
-CYDEV_ANAIF_CFG_BG_RSVD EQU 0x4000586d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_DFT0\r
-CYDEV_ANAIF_CFG_BG_DFT0 EQU 0x4000586e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_DFT1\r
-CYDEV_ANAIF_CFG_BG_DFT1 EQU 0x4000586f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_BASE\r
-CYDEV_ANAIF_CFG_CAPSL_BASE EQU 0x40005870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_SIZE\r
-CYDEV_ANAIF_CFG_CAPSL_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_CFG0\r
-CYDEV_ANAIF_CFG_CAPSL_CFG0 EQU 0x40005870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_CFG1\r
-CYDEV_ANAIF_CFG_CAPSL_CFG1 EQU 0x40005871\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_BASE\r
-CYDEV_ANAIF_CFG_CAPSR_BASE EQU 0x40005872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_SIZE\r
-CYDEV_ANAIF_CFG_CAPSR_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_CFG0\r
-CYDEV_ANAIF_CFG_CAPSR_CFG0 EQU 0x40005872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_CFG1\r
-CYDEV_ANAIF_CFG_CAPSR_CFG1 EQU 0x40005873\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_BASE\r
-CYDEV_ANAIF_CFG_PUMP_BASE EQU 0x40005876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_SIZE\r
-CYDEV_ANAIF_CFG_PUMP_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_CR0\r
-CYDEV_ANAIF_CFG_PUMP_CR0 EQU 0x40005876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_CR1\r
-CYDEV_ANAIF_CFG_PUMP_CR1 EQU 0x40005877\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_BASE\r
-CYDEV_ANAIF_CFG_LPF0_BASE EQU 0x40005878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_SIZE\r
-CYDEV_ANAIF_CFG_LPF0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_CR0\r
-CYDEV_ANAIF_CFG_LPF0_CR0 EQU 0x40005878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_RSVD\r
-CYDEV_ANAIF_CFG_LPF0_RSVD EQU 0x40005879\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_BASE\r
-CYDEV_ANAIF_CFG_LPF1_BASE EQU 0x4000587a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_SIZE\r
-CYDEV_ANAIF_CFG_LPF1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_CR0\r
-CYDEV_ANAIF_CFG_LPF1_CR0 EQU 0x4000587a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_RSVD\r
-CYDEV_ANAIF_CFG_LPF1_RSVD EQU 0x4000587b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_BASE\r
-CYDEV_ANAIF_CFG_MISC_BASE EQU 0x4000587c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_SIZE\r
-CYDEV_ANAIF_CFG_MISC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_CR0\r
-CYDEV_ANAIF_CFG_MISC_CR0 EQU 0x4000587c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BASE\r
-CYDEV_ANAIF_CFG_DSM0_BASE EQU 0x40005880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_SIZE\r
-CYDEV_ANAIF_CFG_DSM0_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR0\r
-CYDEV_ANAIF_CFG_DSM0_CR0 EQU 0x40005880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR1\r
-CYDEV_ANAIF_CFG_DSM0_CR1 EQU 0x40005881\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR2\r
-CYDEV_ANAIF_CFG_DSM0_CR2 EQU 0x40005882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR3\r
-CYDEV_ANAIF_CFG_DSM0_CR3 EQU 0x40005883\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR4\r
-CYDEV_ANAIF_CFG_DSM0_CR4 EQU 0x40005884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR5\r
-CYDEV_ANAIF_CFG_DSM0_CR5 EQU 0x40005885\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR6\r
-CYDEV_ANAIF_CFG_DSM0_CR6 EQU 0x40005886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR7\r
-CYDEV_ANAIF_CFG_DSM0_CR7 EQU 0x40005887\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR8\r
-CYDEV_ANAIF_CFG_DSM0_CR8 EQU 0x40005888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR9\r
-CYDEV_ANAIF_CFG_DSM0_CR9 EQU 0x40005889\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR10\r
-CYDEV_ANAIF_CFG_DSM0_CR10 EQU 0x4000588a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR11\r
-CYDEV_ANAIF_CFG_DSM0_CR11 EQU 0x4000588b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR12\r
-CYDEV_ANAIF_CFG_DSM0_CR12 EQU 0x4000588c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR13\r
-CYDEV_ANAIF_CFG_DSM0_CR13 EQU 0x4000588d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR14\r
-CYDEV_ANAIF_CFG_DSM0_CR14 EQU 0x4000588e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR15\r
-CYDEV_ANAIF_CFG_DSM0_CR15 EQU 0x4000588f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR16\r
-CYDEV_ANAIF_CFG_DSM0_CR16 EQU 0x40005890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_CR17\r
-CYDEV_ANAIF_CFG_DSM0_CR17 EQU 0x40005891\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_REF0\r
-CYDEV_ANAIF_CFG_DSM0_REF0 EQU 0x40005892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_REF1\r
-CYDEV_ANAIF_CFG_DSM0_REF1 EQU 0x40005893\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_REF2\r
-CYDEV_ANAIF_CFG_DSM0_REF2 EQU 0x40005894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_REF3\r
-CYDEV_ANAIF_CFG_DSM0_REF3 EQU 0x40005895\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_DEM0\r
-CYDEV_ANAIF_CFG_DSM0_DEM0 EQU 0x40005896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_DEM1\r
-CYDEV_ANAIF_CFG_DSM0_DEM1 EQU 0x40005897\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_TST0\r
-CYDEV_ANAIF_CFG_DSM0_TST0 EQU 0x40005898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_TST1\r
-CYDEV_ANAIF_CFG_DSM0_TST1 EQU 0x40005899\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BUF0\r
-CYDEV_ANAIF_CFG_DSM0_BUF0 EQU 0x4000589a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BUF1\r
-CYDEV_ANAIF_CFG_DSM0_BUF1 EQU 0x4000589b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BUF2\r
-CYDEV_ANAIF_CFG_DSM0_BUF2 EQU 0x4000589c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BUF3\r
-CYDEV_ANAIF_CFG_DSM0_BUF3 EQU 0x4000589d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_MISC\r
-CYDEV_ANAIF_CFG_DSM0_MISC EQU 0x4000589e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_RSVD1\r
-CYDEV_ANAIF_CFG_DSM0_RSVD1 EQU 0x4000589f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_BASE\r
-CYDEV_ANAIF_CFG_SAR0_BASE EQU 0x40005900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_SIZE\r
-CYDEV_ANAIF_CFG_SAR0_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR0\r
-CYDEV_ANAIF_CFG_SAR0_CSR0 EQU 0x40005900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR1\r
-CYDEV_ANAIF_CFG_SAR0_CSR1 EQU 0x40005901\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR2\r
-CYDEV_ANAIF_CFG_SAR0_CSR2 EQU 0x40005902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR3\r
-CYDEV_ANAIF_CFG_SAR0_CSR3 EQU 0x40005903\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR4\r
-CYDEV_ANAIF_CFG_SAR0_CSR4 EQU 0x40005904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR5\r
-CYDEV_ANAIF_CFG_SAR0_CSR5 EQU 0x40005905\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_CSR6\r
-CYDEV_ANAIF_CFG_SAR0_CSR6 EQU 0x40005906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_BASE\r
-CYDEV_ANAIF_CFG_SAR1_BASE EQU 0x40005908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_SIZE\r
-CYDEV_ANAIF_CFG_SAR1_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR0\r
-CYDEV_ANAIF_CFG_SAR1_CSR0 EQU 0x40005908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR1\r
-CYDEV_ANAIF_CFG_SAR1_CSR1 EQU 0x40005909\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR2\r
-CYDEV_ANAIF_CFG_SAR1_CSR2 EQU 0x4000590a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR3\r
-CYDEV_ANAIF_CFG_SAR1_CSR3 EQU 0x4000590b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR4\r
-CYDEV_ANAIF_CFG_SAR1_CSR4 EQU 0x4000590c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR5\r
-CYDEV_ANAIF_CFG_SAR1_CSR5 EQU 0x4000590d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_CSR6\r
-CYDEV_ANAIF_CFG_SAR1_CSR6 EQU 0x4000590e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BASE\r
-CYDEV_ANAIF_RT_BASE EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SIZE\r
-CYDEV_ANAIF_RT_SIZE EQU 0x00000162\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_BASE\r
-CYDEV_ANAIF_RT_SC0_BASE EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SIZE\r
-CYDEV_ANAIF_RT_SC0_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW0\r
-CYDEV_ANAIF_RT_SC0_SW0 EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW2\r
-CYDEV_ANAIF_RT_SC0_SW2 EQU 0x40005a02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW3\r
-CYDEV_ANAIF_RT_SC0_SW3 EQU 0x40005a03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW4\r
-CYDEV_ANAIF_RT_SC0_SW4 EQU 0x40005a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW6\r
-CYDEV_ANAIF_RT_SC0_SW6 EQU 0x40005a06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW7\r
-CYDEV_ANAIF_RT_SC0_SW7 EQU 0x40005a07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW8\r
-CYDEV_ANAIF_RT_SC0_SW8 EQU 0x40005a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SW10\r
-CYDEV_ANAIF_RT_SC0_SW10 EQU 0x40005a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_CLK\r
-CYDEV_ANAIF_RT_SC0_CLK EQU 0x40005a0b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_BST\r
-CYDEV_ANAIF_RT_SC0_BST EQU 0x40005a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_BASE\r
-CYDEV_ANAIF_RT_SC1_BASE EQU 0x40005a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SIZE\r
-CYDEV_ANAIF_RT_SC1_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW0\r
-CYDEV_ANAIF_RT_SC1_SW0 EQU 0x40005a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW2\r
-CYDEV_ANAIF_RT_SC1_SW2 EQU 0x40005a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW3\r
-CYDEV_ANAIF_RT_SC1_SW3 EQU 0x40005a13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW4\r
-CYDEV_ANAIF_RT_SC1_SW4 EQU 0x40005a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW6\r
-CYDEV_ANAIF_RT_SC1_SW6 EQU 0x40005a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW7\r
-CYDEV_ANAIF_RT_SC1_SW7 EQU 0x40005a17\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW8\r
-CYDEV_ANAIF_RT_SC1_SW8 EQU 0x40005a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SW10\r
-CYDEV_ANAIF_RT_SC1_SW10 EQU 0x40005a1a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_CLK\r
-CYDEV_ANAIF_RT_SC1_CLK EQU 0x40005a1b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_BST\r
-CYDEV_ANAIF_RT_SC1_BST EQU 0x40005a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_BASE\r
-CYDEV_ANAIF_RT_SC2_BASE EQU 0x40005a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SIZE\r
-CYDEV_ANAIF_RT_SC2_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW0\r
-CYDEV_ANAIF_RT_SC2_SW0 EQU 0x40005a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW2\r
-CYDEV_ANAIF_RT_SC2_SW2 EQU 0x40005a22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW3\r
-CYDEV_ANAIF_RT_SC2_SW3 EQU 0x40005a23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW4\r
-CYDEV_ANAIF_RT_SC2_SW4 EQU 0x40005a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW6\r
-CYDEV_ANAIF_RT_SC2_SW6 EQU 0x40005a26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW7\r
-CYDEV_ANAIF_RT_SC2_SW7 EQU 0x40005a27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW8\r
-CYDEV_ANAIF_RT_SC2_SW8 EQU 0x40005a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SW10\r
-CYDEV_ANAIF_RT_SC2_SW10 EQU 0x40005a2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_CLK\r
-CYDEV_ANAIF_RT_SC2_CLK EQU 0x40005a2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_BST\r
-CYDEV_ANAIF_RT_SC2_BST EQU 0x40005a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_BASE\r
-CYDEV_ANAIF_RT_SC3_BASE EQU 0x40005a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SIZE\r
-CYDEV_ANAIF_RT_SC3_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW0\r
-CYDEV_ANAIF_RT_SC3_SW0 EQU 0x40005a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW2\r
-CYDEV_ANAIF_RT_SC3_SW2 EQU 0x40005a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW3\r
-CYDEV_ANAIF_RT_SC3_SW3 EQU 0x40005a33\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW4\r
-CYDEV_ANAIF_RT_SC3_SW4 EQU 0x40005a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW6\r
-CYDEV_ANAIF_RT_SC3_SW6 EQU 0x40005a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW7\r
-CYDEV_ANAIF_RT_SC3_SW7 EQU 0x40005a37\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW8\r
-CYDEV_ANAIF_RT_SC3_SW8 EQU 0x40005a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SW10\r
-CYDEV_ANAIF_RT_SC3_SW10 EQU 0x40005a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_CLK\r
-CYDEV_ANAIF_RT_SC3_CLK EQU 0x40005a3b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_BST\r
-CYDEV_ANAIF_RT_SC3_BST EQU 0x40005a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_BASE\r
-CYDEV_ANAIF_RT_DAC0_BASE EQU 0x40005a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SIZE\r
-CYDEV_ANAIF_RT_DAC0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SW0\r
-CYDEV_ANAIF_RT_DAC0_SW0 EQU 0x40005a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SW2\r
-CYDEV_ANAIF_RT_DAC0_SW2 EQU 0x40005a82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SW3\r
-CYDEV_ANAIF_RT_DAC0_SW3 EQU 0x40005a83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SW4\r
-CYDEV_ANAIF_RT_DAC0_SW4 EQU 0x40005a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_STROBE\r
-CYDEV_ANAIF_RT_DAC0_STROBE EQU 0x40005a87\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_BASE\r
-CYDEV_ANAIF_RT_DAC1_BASE EQU 0x40005a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SIZE\r
-CYDEV_ANAIF_RT_DAC1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SW0\r
-CYDEV_ANAIF_RT_DAC1_SW0 EQU 0x40005a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SW2\r
-CYDEV_ANAIF_RT_DAC1_SW2 EQU 0x40005a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SW3\r
-CYDEV_ANAIF_RT_DAC1_SW3 EQU 0x40005a8b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SW4\r
-CYDEV_ANAIF_RT_DAC1_SW4 EQU 0x40005a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_STROBE\r
-CYDEV_ANAIF_RT_DAC1_STROBE EQU 0x40005a8f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_BASE\r
-CYDEV_ANAIF_RT_DAC2_BASE EQU 0x40005a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SIZE\r
-CYDEV_ANAIF_RT_DAC2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SW0\r
-CYDEV_ANAIF_RT_DAC2_SW0 EQU 0x40005a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SW2\r
-CYDEV_ANAIF_RT_DAC2_SW2 EQU 0x40005a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SW3\r
-CYDEV_ANAIF_RT_DAC2_SW3 EQU 0x40005a93\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SW4\r
-CYDEV_ANAIF_RT_DAC2_SW4 EQU 0x40005a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_STROBE\r
-CYDEV_ANAIF_RT_DAC2_STROBE EQU 0x40005a97\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_BASE\r
-CYDEV_ANAIF_RT_DAC3_BASE EQU 0x40005a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SIZE\r
-CYDEV_ANAIF_RT_DAC3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SW0\r
-CYDEV_ANAIF_RT_DAC3_SW0 EQU 0x40005a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SW2\r
-CYDEV_ANAIF_RT_DAC3_SW2 EQU 0x40005a9a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SW3\r
-CYDEV_ANAIF_RT_DAC3_SW3 EQU 0x40005a9b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SW4\r
-CYDEV_ANAIF_RT_DAC3_SW4 EQU 0x40005a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_STROBE\r
-CYDEV_ANAIF_RT_DAC3_STROBE EQU 0x40005a9f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_BASE\r
-CYDEV_ANAIF_RT_CMP0_BASE EQU 0x40005ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SIZE\r
-CYDEV_ANAIF_RT_CMP0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SW0\r
-CYDEV_ANAIF_RT_CMP0_SW0 EQU 0x40005ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SW2\r
-CYDEV_ANAIF_RT_CMP0_SW2 EQU 0x40005ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SW3\r
-CYDEV_ANAIF_RT_CMP0_SW3 EQU 0x40005ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SW4\r
-CYDEV_ANAIF_RT_CMP0_SW4 EQU 0x40005ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SW6\r
-CYDEV_ANAIF_RT_CMP0_SW6 EQU 0x40005ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_CLK\r
-CYDEV_ANAIF_RT_CMP0_CLK EQU 0x40005ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_BASE\r
-CYDEV_ANAIF_RT_CMP1_BASE EQU 0x40005ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SIZE\r
-CYDEV_ANAIF_RT_CMP1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SW0\r
-CYDEV_ANAIF_RT_CMP1_SW0 EQU 0x40005ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SW2\r
-CYDEV_ANAIF_RT_CMP1_SW2 EQU 0x40005aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SW3\r
-CYDEV_ANAIF_RT_CMP1_SW3 EQU 0x40005acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SW4\r
-CYDEV_ANAIF_RT_CMP1_SW4 EQU 0x40005acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SW6\r
-CYDEV_ANAIF_RT_CMP1_SW6 EQU 0x40005ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_CLK\r
-CYDEV_ANAIF_RT_CMP1_CLK EQU 0x40005acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_BASE\r
-CYDEV_ANAIF_RT_CMP2_BASE EQU 0x40005ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SIZE\r
-CYDEV_ANAIF_RT_CMP2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SW0\r
-CYDEV_ANAIF_RT_CMP2_SW0 EQU 0x40005ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SW2\r
-CYDEV_ANAIF_RT_CMP2_SW2 EQU 0x40005ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SW3\r
-CYDEV_ANAIF_RT_CMP2_SW3 EQU 0x40005ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SW4\r
-CYDEV_ANAIF_RT_CMP2_SW4 EQU 0x40005ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SW6\r
-CYDEV_ANAIF_RT_CMP2_SW6 EQU 0x40005ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_CLK\r
-CYDEV_ANAIF_RT_CMP2_CLK EQU 0x40005ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_BASE\r
-CYDEV_ANAIF_RT_CMP3_BASE EQU 0x40005ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SIZE\r
-CYDEV_ANAIF_RT_CMP3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SW0\r
-CYDEV_ANAIF_RT_CMP3_SW0 EQU 0x40005ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SW2\r
-CYDEV_ANAIF_RT_CMP3_SW2 EQU 0x40005ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SW3\r
-CYDEV_ANAIF_RT_CMP3_SW3 EQU 0x40005adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SW4\r
-CYDEV_ANAIF_RT_CMP3_SW4 EQU 0x40005adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SW6\r
-CYDEV_ANAIF_RT_CMP3_SW6 EQU 0x40005ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_CLK\r
-CYDEV_ANAIF_RT_CMP3_CLK EQU 0x40005adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_BASE\r
-CYDEV_ANAIF_RT_DSM0_BASE EQU 0x40005b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SIZE\r
-CYDEV_ANAIF_RT_DSM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SW0\r
-CYDEV_ANAIF_RT_DSM0_SW0 EQU 0x40005b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SW2\r
-CYDEV_ANAIF_RT_DSM0_SW2 EQU 0x40005b02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SW3\r
-CYDEV_ANAIF_RT_DSM0_SW3 EQU 0x40005b03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SW4\r
-CYDEV_ANAIF_RT_DSM0_SW4 EQU 0x40005b04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SW6\r
-CYDEV_ANAIF_RT_DSM0_SW6 EQU 0x40005b06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_CLK\r
-CYDEV_ANAIF_RT_DSM0_CLK EQU 0x40005b07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_BASE\r
-CYDEV_ANAIF_RT_SAR0_BASE EQU 0x40005b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SIZE\r
-CYDEV_ANAIF_RT_SAR0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SW0\r
-CYDEV_ANAIF_RT_SAR0_SW0 EQU 0x40005b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SW2\r
-CYDEV_ANAIF_RT_SAR0_SW2 EQU 0x40005b22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SW3\r
-CYDEV_ANAIF_RT_SAR0_SW3 EQU 0x40005b23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SW4\r
-CYDEV_ANAIF_RT_SAR0_SW4 EQU 0x40005b24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SW6\r
-CYDEV_ANAIF_RT_SAR0_SW6 EQU 0x40005b26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_CLK\r
-CYDEV_ANAIF_RT_SAR0_CLK EQU 0x40005b27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_BASE\r
-CYDEV_ANAIF_RT_SAR1_BASE EQU 0x40005b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SIZE\r
-CYDEV_ANAIF_RT_SAR1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SW0\r
-CYDEV_ANAIF_RT_SAR1_SW0 EQU 0x40005b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SW2\r
-CYDEV_ANAIF_RT_SAR1_SW2 EQU 0x40005b2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SW3\r
-CYDEV_ANAIF_RT_SAR1_SW3 EQU 0x40005b2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SW4\r
-CYDEV_ANAIF_RT_SAR1_SW4 EQU 0x40005b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SW6\r
-CYDEV_ANAIF_RT_SAR1_SW6 EQU 0x40005b2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_CLK\r
-CYDEV_ANAIF_RT_SAR1_CLK EQU 0x40005b2f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_BASE\r
-CYDEV_ANAIF_RT_OPAMP0_BASE EQU 0x40005b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_SIZE\r
-CYDEV_ANAIF_RT_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_MX\r
-CYDEV_ANAIF_RT_OPAMP0_MX EQU 0x40005b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_SW\r
-CYDEV_ANAIF_RT_OPAMP0_SW EQU 0x40005b41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_BASE\r
-CYDEV_ANAIF_RT_OPAMP1_BASE EQU 0x40005b42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_SIZE\r
-CYDEV_ANAIF_RT_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_MX\r
-CYDEV_ANAIF_RT_OPAMP1_MX EQU 0x40005b42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_SW\r
-CYDEV_ANAIF_RT_OPAMP1_SW EQU 0x40005b43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_BASE\r
-CYDEV_ANAIF_RT_OPAMP2_BASE EQU 0x40005b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_SIZE\r
-CYDEV_ANAIF_RT_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_MX\r
-CYDEV_ANAIF_RT_OPAMP2_MX EQU 0x40005b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_SW\r
-CYDEV_ANAIF_RT_OPAMP2_SW EQU 0x40005b45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_BASE\r
-CYDEV_ANAIF_RT_OPAMP3_BASE EQU 0x40005b46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_SIZE\r
-CYDEV_ANAIF_RT_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_MX\r
-CYDEV_ANAIF_RT_OPAMP3_MX EQU 0x40005b46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_SW\r
-CYDEV_ANAIF_RT_OPAMP3_SW EQU 0x40005b47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_BASE\r
-CYDEV_ANAIF_RT_LCDDAC_BASE EQU 0x40005b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SIZE\r
-CYDEV_ANAIF_RT_LCDDAC_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SW0\r
-CYDEV_ANAIF_RT_LCDDAC_SW0 EQU 0x40005b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SW1\r
-CYDEV_ANAIF_RT_LCDDAC_SW1 EQU 0x40005b51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SW2\r
-CYDEV_ANAIF_RT_LCDDAC_SW2 EQU 0x40005b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SW3\r
-CYDEV_ANAIF_RT_LCDDAC_SW3 EQU 0x40005b53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SW4\r
-CYDEV_ANAIF_RT_LCDDAC_SW4 EQU 0x40005b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_BASE\r
-CYDEV_ANAIF_RT_SC_BASE EQU 0x40005b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_SIZE\r
-CYDEV_ANAIF_RT_SC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_MISC\r
-CYDEV_ANAIF_RT_SC_MISC EQU 0x40005b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_BASE\r
-CYDEV_ANAIF_RT_BUS_BASE EQU 0x40005b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SIZE\r
-CYDEV_ANAIF_RT_BUS_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SW0\r
-CYDEV_ANAIF_RT_BUS_SW0 EQU 0x40005b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SW2\r
-CYDEV_ANAIF_RT_BUS_SW2 EQU 0x40005b5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SW3\r
-CYDEV_ANAIF_RT_BUS_SW3 EQU 0x40005b5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_BASE\r
-CYDEV_ANAIF_RT_DFT_BASE EQU 0x40005b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_SIZE\r
-CYDEV_ANAIF_RT_DFT_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR0\r
-CYDEV_ANAIF_RT_DFT_CR0 EQU 0x40005b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR1\r
-CYDEV_ANAIF_RT_DFT_CR1 EQU 0x40005b5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR2\r
-CYDEV_ANAIF_RT_DFT_CR2 EQU 0x40005b5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR3\r
-CYDEV_ANAIF_RT_DFT_CR3 EQU 0x40005b5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR4\r
-CYDEV_ANAIF_RT_DFT_CR4 EQU 0x40005b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_CR5\r
-CYDEV_ANAIF_RT_DFT_CR5 EQU 0x40005b61\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_BASE\r
-CYDEV_ANAIF_WRK_BASE EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SIZE\r
-CYDEV_ANAIF_WRK_SIZE EQU 0x00000029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_BASE\r
-CYDEV_ANAIF_WRK_DAC0_BASE EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_SIZE\r
-CYDEV_ANAIF_WRK_DAC0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_D\r
-CYDEV_ANAIF_WRK_DAC0_D EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_BASE\r
-CYDEV_ANAIF_WRK_DAC1_BASE EQU 0x40005b81\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_SIZE\r
-CYDEV_ANAIF_WRK_DAC1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_D\r
-CYDEV_ANAIF_WRK_DAC1_D EQU 0x40005b81\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_BASE\r
-CYDEV_ANAIF_WRK_DAC2_BASE EQU 0x40005b82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_SIZE\r
-CYDEV_ANAIF_WRK_DAC2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_D\r
-CYDEV_ANAIF_WRK_DAC2_D EQU 0x40005b82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_BASE\r
-CYDEV_ANAIF_WRK_DAC3_BASE EQU 0x40005b83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_SIZE\r
-CYDEV_ANAIF_WRK_DAC3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_D\r
-CYDEV_ANAIF_WRK_DAC3_D EQU 0x40005b83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_BASE\r
-CYDEV_ANAIF_WRK_DSM0_BASE EQU 0x40005b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_SIZE\r
-CYDEV_ANAIF_WRK_DSM0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_OUT0\r
-CYDEV_ANAIF_WRK_DSM0_OUT0 EQU 0x40005b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_OUT1\r
-CYDEV_ANAIF_WRK_DSM0_OUT1 EQU 0x40005b89\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_BASE\r
-CYDEV_ANAIF_WRK_LUT_BASE EQU 0x40005b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_SIZE\r
-CYDEV_ANAIF_WRK_LUT_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_SR\r
-CYDEV_ANAIF_WRK_LUT_SR EQU 0x40005b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_WRK1\r
-CYDEV_ANAIF_WRK_LUT_WRK1 EQU 0x40005b91\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_MSK\r
-CYDEV_ANAIF_WRK_LUT_MSK EQU 0x40005b92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_CLK\r
-CYDEV_ANAIF_WRK_LUT_CLK EQU 0x40005b93\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_CPTR\r
-CYDEV_ANAIF_WRK_LUT_CPTR EQU 0x40005b94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_BASE\r
-CYDEV_ANAIF_WRK_CMP_BASE EQU 0x40005b96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_SIZE\r
-CYDEV_ANAIF_WRK_CMP_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_WRK\r
-CYDEV_ANAIF_WRK_CMP_WRK EQU 0x40005b96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_TST\r
-CYDEV_ANAIF_WRK_CMP_TST EQU 0x40005b97\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_BASE\r
-CYDEV_ANAIF_WRK_SC_BASE EQU 0x40005b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_SIZE\r
-CYDEV_ANAIF_WRK_SC_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_SR\r
-CYDEV_ANAIF_WRK_SC_SR EQU 0x40005b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_WRK1\r
-CYDEV_ANAIF_WRK_SC_WRK1 EQU 0x40005b99\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_MSK\r
-CYDEV_ANAIF_WRK_SC_MSK EQU 0x40005b9a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_CMPINV\r
-CYDEV_ANAIF_WRK_SC_CMPINV EQU 0x40005b9b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_CPTR\r
-CYDEV_ANAIF_WRK_SC_CPTR EQU 0x40005b9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_BASE\r
-CYDEV_ANAIF_WRK_SAR0_BASE EQU 0x40005ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_SIZE\r
-CYDEV_ANAIF_WRK_SAR0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_WRK0\r
-CYDEV_ANAIF_WRK_SAR0_WRK0 EQU 0x40005ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_WRK1\r
-CYDEV_ANAIF_WRK_SAR0_WRK1 EQU 0x40005ba1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_BASE\r
-CYDEV_ANAIF_WRK_SAR1_BASE EQU 0x40005ba2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_SIZE\r
-CYDEV_ANAIF_WRK_SAR1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_WRK0\r
-CYDEV_ANAIF_WRK_SAR1_WRK0 EQU 0x40005ba2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_WRK1\r
-CYDEV_ANAIF_WRK_SAR1_WRK1 EQU 0x40005ba3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_BASE\r
-CYDEV_ANAIF_WRK_SARS_BASE EQU 0x40005ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_SIZE\r
-CYDEV_ANAIF_WRK_SARS_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_SOF\r
-CYDEV_ANAIF_WRK_SARS_SOF EQU 0x40005ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_BASE\r
-CYDEV_USB_BASE EQU 0x40006000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIZE\r
-CYDEV_USB_SIZE EQU 0x00000300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR0\r
-CYDEV_USB_EP0_DR0 EQU 0x40006000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR1\r
-CYDEV_USB_EP0_DR1 EQU 0x40006001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR2\r
-CYDEV_USB_EP0_DR2 EQU 0x40006002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR3\r
-CYDEV_USB_EP0_DR3 EQU 0x40006003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR4\r
-CYDEV_USB_EP0_DR4 EQU 0x40006004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR5\r
-CYDEV_USB_EP0_DR5 EQU 0x40006005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR6\r
-CYDEV_USB_EP0_DR6 EQU 0x40006006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_DR7\r
-CYDEV_USB_EP0_DR7 EQU 0x40006007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_CR0\r
-CYDEV_USB_CR0 EQU 0x40006008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_CR1\r
-CYDEV_USB_CR1 EQU 0x40006009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP_INT_EN\r
-CYDEV_USB_SIE_EP_INT_EN EQU 0x4000600a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP_INT_SR\r
-CYDEV_USB_SIE_EP_INT_SR EQU 0x4000600b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_BASE\r
-CYDEV_USB_SIE_EP1_BASE EQU 0x4000600c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_SIZE\r
-CYDEV_USB_SIE_EP1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_CNT0\r
-CYDEV_USB_SIE_EP1_CNT0 EQU 0x4000600c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_CNT1\r
-CYDEV_USB_SIE_EP1_CNT1 EQU 0x4000600d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_CR0\r
-CYDEV_USB_SIE_EP1_CR0 EQU 0x4000600e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_USBIO_CR0\r
-CYDEV_USB_USBIO_CR0 EQU 0x40006010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_USBIO_CR1\r
-CYDEV_USB_USBIO_CR1 EQU 0x40006012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_DYN_RECONFIG\r
-CYDEV_USB_DYN_RECONFIG EQU 0x40006014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SOF0\r
-CYDEV_USB_SOF0 EQU 0x40006018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SOF1\r
-CYDEV_USB_SOF1 EQU 0x40006019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_BASE\r
-CYDEV_USB_SIE_EP2_BASE EQU 0x4000601c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_SIZE\r
-CYDEV_USB_SIE_EP2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_CNT0\r
-CYDEV_USB_SIE_EP2_CNT0 EQU 0x4000601c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_CNT1\r
-CYDEV_USB_SIE_EP2_CNT1 EQU 0x4000601d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_CR0\r
-CYDEV_USB_SIE_EP2_CR0 EQU 0x4000601e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_CR\r
-CYDEV_USB_EP0_CR EQU 0x40006028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP0_CNT\r
-CYDEV_USB_EP0_CNT EQU 0x40006029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_BASE\r
-CYDEV_USB_SIE_EP3_BASE EQU 0x4000602c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_SIZE\r
-CYDEV_USB_SIE_EP3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_CNT0\r
-CYDEV_USB_SIE_EP3_CNT0 EQU 0x4000602c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_CNT1\r
-CYDEV_USB_SIE_EP3_CNT1 EQU 0x4000602d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_CR0\r
-CYDEV_USB_SIE_EP3_CR0 EQU 0x4000602e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_BASE\r
-CYDEV_USB_SIE_EP4_BASE EQU 0x4000603c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_SIZE\r
-CYDEV_USB_SIE_EP4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_CNT0\r
-CYDEV_USB_SIE_EP4_CNT0 EQU 0x4000603c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_CNT1\r
-CYDEV_USB_SIE_EP4_CNT1 EQU 0x4000603d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_CR0\r
-CYDEV_USB_SIE_EP4_CR0 EQU 0x4000603e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_BASE\r
-CYDEV_USB_SIE_EP5_BASE EQU 0x4000604c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_SIZE\r
-CYDEV_USB_SIE_EP5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_CNT0\r
-CYDEV_USB_SIE_EP5_CNT0 EQU 0x4000604c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_CNT1\r
-CYDEV_USB_SIE_EP5_CNT1 EQU 0x4000604d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_CR0\r
-CYDEV_USB_SIE_EP5_CR0 EQU 0x4000604e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_BASE\r
-CYDEV_USB_SIE_EP6_BASE EQU 0x4000605c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_SIZE\r
-CYDEV_USB_SIE_EP6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_CNT0\r
-CYDEV_USB_SIE_EP6_CNT0 EQU 0x4000605c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_CNT1\r
-CYDEV_USB_SIE_EP6_CNT1 EQU 0x4000605d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_CR0\r
-CYDEV_USB_SIE_EP6_CR0 EQU 0x4000605e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_BASE\r
-CYDEV_USB_SIE_EP7_BASE EQU 0x4000606c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_SIZE\r
-CYDEV_USB_SIE_EP7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_CNT0\r
-CYDEV_USB_SIE_EP7_CNT0 EQU 0x4000606c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_CNT1\r
-CYDEV_USB_SIE_EP7_CNT1 EQU 0x4000606d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_CR0\r
-CYDEV_USB_SIE_EP7_CR0 EQU 0x4000606e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_BASE\r
-CYDEV_USB_SIE_EP8_BASE EQU 0x4000607c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_SIZE\r
-CYDEV_USB_SIE_EP8_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_CNT0\r
-CYDEV_USB_SIE_EP8_CNT0 EQU 0x4000607c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_CNT1\r
-CYDEV_USB_SIE_EP8_CNT1 EQU 0x4000607d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_CR0\r
-CYDEV_USB_SIE_EP8_CR0 EQU 0x4000607e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_BASE\r
-CYDEV_USB_ARB_EP1_BASE EQU 0x40006080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_SIZE\r
-CYDEV_USB_ARB_EP1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_CFG\r
-CYDEV_USB_ARB_EP1_CFG EQU 0x40006080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_INT_EN\r
-CYDEV_USB_ARB_EP1_INT_EN EQU 0x40006081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_SR\r
-CYDEV_USB_ARB_EP1_SR EQU 0x40006082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_BASE\r
-CYDEV_USB_ARB_RW1_BASE EQU 0x40006084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_SIZE\r
-CYDEV_USB_ARB_RW1_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_WA\r
-CYDEV_USB_ARB_RW1_WA EQU 0x40006084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_WA_MSB\r
-CYDEV_USB_ARB_RW1_WA_MSB EQU 0x40006085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_RA\r
-CYDEV_USB_ARB_RW1_RA EQU 0x40006086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_RA_MSB\r
-CYDEV_USB_ARB_RW1_RA_MSB EQU 0x40006087\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_DR\r
-CYDEV_USB_ARB_RW1_DR EQU 0x40006088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_BUF_SIZE\r
-CYDEV_USB_BUF_SIZE EQU 0x4000608c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP_ACTIVE\r
-CYDEV_USB_EP_ACTIVE EQU 0x4000608e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_EP_TYPE\r
-CYDEV_USB_EP_TYPE EQU 0x4000608f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_BASE\r
-CYDEV_USB_ARB_EP2_BASE EQU 0x40006090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_SIZE\r
-CYDEV_USB_ARB_EP2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_CFG\r
-CYDEV_USB_ARB_EP2_CFG EQU 0x40006090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_INT_EN\r
-CYDEV_USB_ARB_EP2_INT_EN EQU 0x40006091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_SR\r
-CYDEV_USB_ARB_EP2_SR EQU 0x40006092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_BASE\r
-CYDEV_USB_ARB_RW2_BASE EQU 0x40006094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_SIZE\r
-CYDEV_USB_ARB_RW2_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_WA\r
-CYDEV_USB_ARB_RW2_WA EQU 0x40006094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_WA_MSB\r
-CYDEV_USB_ARB_RW2_WA_MSB EQU 0x40006095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_RA\r
-CYDEV_USB_ARB_RW2_RA EQU 0x40006096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_RA_MSB\r
-CYDEV_USB_ARB_RW2_RA_MSB EQU 0x40006097\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_DR\r
-CYDEV_USB_ARB_RW2_DR EQU 0x40006098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_CFG\r
-CYDEV_USB_ARB_CFG EQU 0x4000609c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_USB_CLK_EN\r
-CYDEV_USB_USB_CLK_EN EQU 0x4000609d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_INT_EN\r
-CYDEV_USB_ARB_INT_EN EQU 0x4000609e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_INT_SR\r
-CYDEV_USB_ARB_INT_SR EQU 0x4000609f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_BASE\r
-CYDEV_USB_ARB_EP3_BASE EQU 0x400060a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_SIZE\r
-CYDEV_USB_ARB_EP3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_CFG\r
-CYDEV_USB_ARB_EP3_CFG EQU 0x400060a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_INT_EN\r
-CYDEV_USB_ARB_EP3_INT_EN EQU 0x400060a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_SR\r
-CYDEV_USB_ARB_EP3_SR EQU 0x400060a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_BASE\r
-CYDEV_USB_ARB_RW3_BASE EQU 0x400060a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_SIZE\r
-CYDEV_USB_ARB_RW3_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_WA\r
-CYDEV_USB_ARB_RW3_WA EQU 0x400060a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_WA_MSB\r
-CYDEV_USB_ARB_RW3_WA_MSB EQU 0x400060a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_RA\r
-CYDEV_USB_ARB_RW3_RA EQU 0x400060a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_RA_MSB\r
-CYDEV_USB_ARB_RW3_RA_MSB EQU 0x400060a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_DR\r
-CYDEV_USB_ARB_RW3_DR EQU 0x400060a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_CWA\r
-CYDEV_USB_CWA EQU 0x400060ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_CWA_MSB\r
-CYDEV_USB_CWA_MSB EQU 0x400060ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_BASE\r
-CYDEV_USB_ARB_EP4_BASE EQU 0x400060b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_SIZE\r
-CYDEV_USB_ARB_EP4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_CFG\r
-CYDEV_USB_ARB_EP4_CFG EQU 0x400060b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_INT_EN\r
-CYDEV_USB_ARB_EP4_INT_EN EQU 0x400060b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_SR\r
-CYDEV_USB_ARB_EP4_SR EQU 0x400060b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_BASE\r
-CYDEV_USB_ARB_RW4_BASE EQU 0x400060b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_SIZE\r
-CYDEV_USB_ARB_RW4_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_WA\r
-CYDEV_USB_ARB_RW4_WA EQU 0x400060b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_WA_MSB\r
-CYDEV_USB_ARB_RW4_WA_MSB EQU 0x400060b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_RA\r
-CYDEV_USB_ARB_RW4_RA EQU 0x400060b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_RA_MSB\r
-CYDEV_USB_ARB_RW4_RA_MSB EQU 0x400060b7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_DR\r
-CYDEV_USB_ARB_RW4_DR EQU 0x400060b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_DMA_THRES\r
-CYDEV_USB_DMA_THRES EQU 0x400060bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_DMA_THRES_MSB\r
-CYDEV_USB_DMA_THRES_MSB EQU 0x400060bd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_BASE\r
-CYDEV_USB_ARB_EP5_BASE EQU 0x400060c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_SIZE\r
-CYDEV_USB_ARB_EP5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_CFG\r
-CYDEV_USB_ARB_EP5_CFG EQU 0x400060c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_INT_EN\r
-CYDEV_USB_ARB_EP5_INT_EN EQU 0x400060c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_SR\r
-CYDEV_USB_ARB_EP5_SR EQU 0x400060c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_BASE\r
-CYDEV_USB_ARB_RW5_BASE EQU 0x400060c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_SIZE\r
-CYDEV_USB_ARB_RW5_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_WA\r
-CYDEV_USB_ARB_RW5_WA EQU 0x400060c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_WA_MSB\r
-CYDEV_USB_ARB_RW5_WA_MSB EQU 0x400060c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_RA\r
-CYDEV_USB_ARB_RW5_RA EQU 0x400060c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_RA_MSB\r
-CYDEV_USB_ARB_RW5_RA_MSB EQU 0x400060c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_DR\r
-CYDEV_USB_ARB_RW5_DR EQU 0x400060c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_BUS_RST_CNT\r
-CYDEV_USB_BUS_RST_CNT EQU 0x400060cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_BASE\r
-CYDEV_USB_ARB_EP6_BASE EQU 0x400060d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_SIZE\r
-CYDEV_USB_ARB_EP6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_CFG\r
-CYDEV_USB_ARB_EP6_CFG EQU 0x400060d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_INT_EN\r
-CYDEV_USB_ARB_EP6_INT_EN EQU 0x400060d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_SR\r
-CYDEV_USB_ARB_EP6_SR EQU 0x400060d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_BASE\r
-CYDEV_USB_ARB_RW6_BASE EQU 0x400060d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_SIZE\r
-CYDEV_USB_ARB_RW6_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_WA\r
-CYDEV_USB_ARB_RW6_WA EQU 0x400060d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_WA_MSB\r
-CYDEV_USB_ARB_RW6_WA_MSB EQU 0x400060d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_RA\r
-CYDEV_USB_ARB_RW6_RA EQU 0x400060d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_RA_MSB\r
-CYDEV_USB_ARB_RW6_RA_MSB EQU 0x400060d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_DR\r
-CYDEV_USB_ARB_RW6_DR EQU 0x400060d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_BASE\r
-CYDEV_USB_ARB_EP7_BASE EQU 0x400060e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_SIZE\r
-CYDEV_USB_ARB_EP7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_CFG\r
-CYDEV_USB_ARB_EP7_CFG EQU 0x400060e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_INT_EN\r
-CYDEV_USB_ARB_EP7_INT_EN EQU 0x400060e1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_SR\r
-CYDEV_USB_ARB_EP7_SR EQU 0x400060e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_BASE\r
-CYDEV_USB_ARB_RW7_BASE EQU 0x400060e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_SIZE\r
-CYDEV_USB_ARB_RW7_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_WA\r
-CYDEV_USB_ARB_RW7_WA EQU 0x400060e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_WA_MSB\r
-CYDEV_USB_ARB_RW7_WA_MSB EQU 0x400060e5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_RA\r
-CYDEV_USB_ARB_RW7_RA EQU 0x400060e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_RA_MSB\r
-CYDEV_USB_ARB_RW7_RA_MSB EQU 0x400060e7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_DR\r
-CYDEV_USB_ARB_RW7_DR EQU 0x400060e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_BASE\r
-CYDEV_USB_ARB_EP8_BASE EQU 0x400060f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_SIZE\r
-CYDEV_USB_ARB_EP8_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_CFG\r
-CYDEV_USB_ARB_EP8_CFG EQU 0x400060f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_INT_EN\r
-CYDEV_USB_ARB_EP8_INT_EN EQU 0x400060f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_SR\r
-CYDEV_USB_ARB_EP8_SR EQU 0x400060f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_BASE\r
-CYDEV_USB_ARB_RW8_BASE EQU 0x400060f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_SIZE\r
-CYDEV_USB_ARB_RW8_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_WA\r
-CYDEV_USB_ARB_RW8_WA EQU 0x400060f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_WA_MSB\r
-CYDEV_USB_ARB_RW8_WA_MSB EQU 0x400060f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_RA\r
-CYDEV_USB_ARB_RW8_RA EQU 0x400060f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_RA_MSB\r
-CYDEV_USB_ARB_RW8_RA_MSB EQU 0x400060f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_DR\r
-CYDEV_USB_ARB_RW8_DR EQU 0x400060f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_BASE\r
-CYDEV_USB_MEM_BASE EQU 0x40006100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_SIZE\r
-CYDEV_USB_MEM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_DATA_MBASE\r
-CYDEV_USB_MEM_DATA_MBASE EQU 0x40006100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_DATA_MSIZE\r
-CYDEV_USB_MEM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_BASE\r
-CYDEV_UWRK_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_SIZE\r
-CYDEV_UWRK_SIZE EQU 0x00000b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_BASE\r
-CYDEV_UWRK_UWRK8_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_SIZE\r
-CYDEV_UWRK_UWRK8_SIZE EQU 0x000003b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_BASE\r
-CYDEV_UWRK_UWRK8_B0_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_SIZE\r
-CYDEV_UWRK_UWRK8_B0_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB00_A0 EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB01_A0 EQU 0x40006401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB02_A0 EQU 0x40006402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB03_A0 EQU 0x40006403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB04_A0 EQU 0x40006404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB05_A0 EQU 0x40006405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB06_A0 EQU 0x40006406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB07_A0 EQU 0x40006407\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB08_A0 EQU 0x40006408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB09_A0 EQU 0x40006409\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB10_A0 EQU 0x4000640a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB11_A0 EQU 0x4000640b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB12_A0 EQU 0x4000640c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB13_A0 EQU 0x4000640d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB14_A0 EQU 0x4000640e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_A0\r
-CYDEV_UWRK_UWRK8_B0_UDB15_A0 EQU 0x4000640f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB00_A1 EQU 0x40006410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB01_A1 EQU 0x40006411\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB02_A1 EQU 0x40006412\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB03_A1 EQU 0x40006413\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB04_A1 EQU 0x40006414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB05_A1 EQU 0x40006415\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB06_A1 EQU 0x40006416\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB07_A1 EQU 0x40006417\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB08_A1 EQU 0x40006418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB09_A1 EQU 0x40006419\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB10_A1 EQU 0x4000641a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB11_A1 EQU 0x4000641b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB12_A1 EQU 0x4000641c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB13_A1 EQU 0x4000641d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB14_A1 EQU 0x4000641e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_A1\r
-CYDEV_UWRK_UWRK8_B0_UDB15_A1 EQU 0x4000641f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB00_D0 EQU 0x40006420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB01_D0 EQU 0x40006421\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB02_D0 EQU 0x40006422\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB03_D0 EQU 0x40006423\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB04_D0 EQU 0x40006424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB05_D0 EQU 0x40006425\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB06_D0 EQU 0x40006426\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB07_D0 EQU 0x40006427\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB08_D0 EQU 0x40006428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB09_D0 EQU 0x40006429\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB10_D0 EQU 0x4000642a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB11_D0 EQU 0x4000642b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB12_D0 EQU 0x4000642c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB13_D0 EQU 0x4000642d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB14_D0 EQU 0x4000642e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_D0\r
-CYDEV_UWRK_UWRK8_B0_UDB15_D0 EQU 0x4000642f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB00_D1 EQU 0x40006430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB01_D1 EQU 0x40006431\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB02_D1 EQU 0x40006432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB03_D1 EQU 0x40006433\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB04_D1 EQU 0x40006434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB05_D1 EQU 0x40006435\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB06_D1 EQU 0x40006436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB07_D1 EQU 0x40006437\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB08_D1 EQU 0x40006438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB09_D1 EQU 0x40006439\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB10_D1 EQU 0x4000643a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB11_D1 EQU 0x4000643b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB12_D1 EQU 0x4000643c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB13_D1 EQU 0x4000643d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB14_D1 EQU 0x4000643e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_D1\r
-CYDEV_UWRK_UWRK8_B0_UDB15_D1 EQU 0x4000643f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB00_F0 EQU 0x40006440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB01_F0 EQU 0x40006441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB02_F0 EQU 0x40006442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB03_F0 EQU 0x40006443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB04_F0 EQU 0x40006444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB05_F0 EQU 0x40006445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB06_F0 EQU 0x40006446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB07_F0 EQU 0x40006447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB08_F0 EQU 0x40006448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB09_F0 EQU 0x40006449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB10_F0 EQU 0x4000644a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB11_F0 EQU 0x4000644b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB12_F0 EQU 0x4000644c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB13_F0 EQU 0x4000644d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB14_F0 EQU 0x4000644e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_F0\r
-CYDEV_UWRK_UWRK8_B0_UDB15_F0 EQU 0x4000644f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB00_F1 EQU 0x40006450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB01_F1 EQU 0x40006451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB02_F1 EQU 0x40006452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB03_F1 EQU 0x40006453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB04_F1 EQU 0x40006454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB05_F1 EQU 0x40006455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB06_F1 EQU 0x40006456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB07_F1 EQU 0x40006457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB08_F1 EQU 0x40006458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB09_F1 EQU 0x40006459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB10_F1 EQU 0x4000645a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB11_F1 EQU 0x4000645b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB12_F1 EQU 0x4000645c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB13_F1 EQU 0x4000645d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB14_F1 EQU 0x4000645e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_F1\r
-CYDEV_UWRK_UWRK8_B0_UDB15_F1 EQU 0x4000645f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB00_ST EQU 0x40006460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB01_ST EQU 0x40006461\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB02_ST EQU 0x40006462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB03_ST EQU 0x40006463\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB04_ST EQU 0x40006464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB05_ST EQU 0x40006465\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB06_ST EQU 0x40006466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB07_ST EQU 0x40006467\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB08_ST EQU 0x40006468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB09_ST EQU 0x40006469\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB10_ST EQU 0x4000646a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB11_ST EQU 0x4000646b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB12_ST EQU 0x4000646c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB13_ST EQU 0x4000646d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB14_ST EQU 0x4000646e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_ST\r
-CYDEV_UWRK_UWRK8_B0_UDB15_ST EQU 0x4000646f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB00_CTL EQU 0x40006470\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB01_CTL EQU 0x40006471\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB02_CTL EQU 0x40006472\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB03_CTL EQU 0x40006473\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB04_CTL EQU 0x40006474\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB05_CTL EQU 0x40006475\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB06_CTL EQU 0x40006476\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB07_CTL EQU 0x40006477\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB08_CTL EQU 0x40006478\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB09_CTL EQU 0x40006479\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB10_CTL EQU 0x4000647a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB11_CTL EQU 0x4000647b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB12_CTL EQU 0x4000647c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB13_CTL EQU 0x4000647d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB14_CTL EQU 0x4000647e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_CTL\r
-CYDEV_UWRK_UWRK8_B0_UDB15_CTL EQU 0x4000647f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB00_MSK EQU 0x40006480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB01_MSK EQU 0x40006481\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB02_MSK EQU 0x40006482\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB03_MSK EQU 0x40006483\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB04_MSK EQU 0x40006484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB05_MSK EQU 0x40006485\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB06_MSK EQU 0x40006486\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB07_MSK EQU 0x40006487\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB08_MSK EQU 0x40006488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB09_MSK EQU 0x40006489\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB10_MSK EQU 0x4000648a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB11_MSK EQU 0x4000648b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB12_MSK EQU 0x4000648c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB13_MSK EQU 0x4000648d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB14_MSK EQU 0x4000648e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_MSK\r
-CYDEV_UWRK_UWRK8_B0_UDB15_MSK EQU 0x4000648f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB00_ACTL EQU 0x40006490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB01_ACTL EQU 0x40006491\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB02_ACTL EQU 0x40006492\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB03_ACTL EQU 0x40006493\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB04_ACTL EQU 0x40006494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB05_ACTL EQU 0x40006495\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB06_ACTL EQU 0x40006496\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB07_ACTL EQU 0x40006497\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB08_ACTL EQU 0x40006498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB09_ACTL EQU 0x40006499\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB10_ACTL EQU 0x4000649a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB11_ACTL EQU 0x4000649b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB12_ACTL EQU 0x4000649c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB13_ACTL EQU 0x4000649d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB14_ACTL EQU 0x4000649e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_ACTL\r
-CYDEV_UWRK_UWRK8_B0_UDB15_ACTL EQU 0x4000649f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB00_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB00_MC EQU 0x400064a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB01_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB01_MC EQU 0x400064a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB02_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB02_MC EQU 0x400064a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB03_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB03_MC EQU 0x400064a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB04_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB04_MC EQU 0x400064a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB05_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB05_MC EQU 0x400064a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB06_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB06_MC EQU 0x400064a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB07_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB07_MC EQU 0x400064a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB08_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB08_MC EQU 0x400064a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB09_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB09_MC EQU 0x400064a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB10_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB10_MC EQU 0x400064aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB11_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB11_MC EQU 0x400064ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB12_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB12_MC EQU 0x400064ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB13_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB13_MC EQU 0x400064ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB14_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB14_MC EQU 0x400064ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_UDB15_MC\r
-CYDEV_UWRK_UWRK8_B0_UDB15_MC EQU 0x400064af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_BASE\r
-CYDEV_UWRK_UWRK8_B1_BASE EQU 0x40006500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_SIZE\r
-CYDEV_UWRK_UWRK8_B1_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB04_A0 EQU 0x40006504\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB05_A0 EQU 0x40006505\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB06_A0 EQU 0x40006506\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB07_A0 EQU 0x40006507\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB08_A0 EQU 0x40006508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB09_A0 EQU 0x40006509\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB10_A0 EQU 0x4000650a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_A0\r
-CYDEV_UWRK_UWRK8_B1_UDB11_A0 EQU 0x4000650b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB04_A1 EQU 0x40006514\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB05_A1 EQU 0x40006515\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB06_A1 EQU 0x40006516\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB07_A1 EQU 0x40006517\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB08_A1 EQU 0x40006518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB09_A1 EQU 0x40006519\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB10_A1 EQU 0x4000651a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_A1\r
-CYDEV_UWRK_UWRK8_B1_UDB11_A1 EQU 0x4000651b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB04_D0 EQU 0x40006524\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB05_D0 EQU 0x40006525\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB06_D0 EQU 0x40006526\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB07_D0 EQU 0x40006527\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB08_D0 EQU 0x40006528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB09_D0 EQU 0x40006529\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB10_D0 EQU 0x4000652a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_D0\r
-CYDEV_UWRK_UWRK8_B1_UDB11_D0 EQU 0x4000652b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB04_D1 EQU 0x40006534\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB05_D1 EQU 0x40006535\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB06_D1 EQU 0x40006536\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB07_D1 EQU 0x40006537\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB08_D1 EQU 0x40006538\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB09_D1 EQU 0x40006539\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB10_D1 EQU 0x4000653a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_D1\r
-CYDEV_UWRK_UWRK8_B1_UDB11_D1 EQU 0x4000653b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB04_F0 EQU 0x40006544\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB05_F0 EQU 0x40006545\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB06_F0 EQU 0x40006546\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB07_F0 EQU 0x40006547\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB08_F0 EQU 0x40006548\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB09_F0 EQU 0x40006549\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB10_F0 EQU 0x4000654a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_F0\r
-CYDEV_UWRK_UWRK8_B1_UDB11_F0 EQU 0x4000654b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB04_F1 EQU 0x40006554\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB05_F1 EQU 0x40006555\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB06_F1 EQU 0x40006556\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB07_F1 EQU 0x40006557\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB08_F1 EQU 0x40006558\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB09_F1 EQU 0x40006559\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB10_F1 EQU 0x4000655a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_F1\r
-CYDEV_UWRK_UWRK8_B1_UDB11_F1 EQU 0x4000655b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB04_ST EQU 0x40006564\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB05_ST EQU 0x40006565\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB06_ST EQU 0x40006566\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB07_ST EQU 0x40006567\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB08_ST EQU 0x40006568\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB09_ST EQU 0x40006569\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB10_ST EQU 0x4000656a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_ST\r
-CYDEV_UWRK_UWRK8_B1_UDB11_ST EQU 0x4000656b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB04_CTL EQU 0x40006574\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB05_CTL EQU 0x40006575\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB06_CTL EQU 0x40006576\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB07_CTL EQU 0x40006577\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB08_CTL EQU 0x40006578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB09_CTL EQU 0x40006579\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB10_CTL EQU 0x4000657a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_CTL\r
-CYDEV_UWRK_UWRK8_B1_UDB11_CTL EQU 0x4000657b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB04_MSK EQU 0x40006584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB05_MSK EQU 0x40006585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB06_MSK EQU 0x40006586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB07_MSK EQU 0x40006587\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB08_MSK EQU 0x40006588\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB09_MSK EQU 0x40006589\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB10_MSK EQU 0x4000658a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_MSK\r
-CYDEV_UWRK_UWRK8_B1_UDB11_MSK EQU 0x4000658b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB04_ACTL EQU 0x40006594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB05_ACTL EQU 0x40006595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB06_ACTL EQU 0x40006596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB07_ACTL EQU 0x40006597\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB08_ACTL EQU 0x40006598\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB09_ACTL EQU 0x40006599\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB10_ACTL EQU 0x4000659a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_ACTL\r
-CYDEV_UWRK_UWRK8_B1_UDB11_ACTL EQU 0x4000659b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB04_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB04_MC EQU 0x400065a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB05_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB05_MC EQU 0x400065a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB06_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB06_MC EQU 0x400065a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB07_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB07_MC EQU 0x400065a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB08_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB08_MC EQU 0x400065a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB09_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB09_MC EQU 0x400065a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB10_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB10_MC EQU 0x400065aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_UDB11_MC\r
-CYDEV_UWRK_UWRK8_B1_UDB11_MC EQU 0x400065ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_BASE\r
-CYDEV_UWRK_UWRK16_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_SIZE\r
-CYDEV_UWRK_UWRK16_SIZE EQU 0x00000760\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_BASE\r
-CYDEV_UWRK_UWRK16_CAT_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_SIZE EQU 0x00000760\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_BASE\r
-CYDEV_UWRK_UWRK16_CAT_B0_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_B0_SIZE EQU 0x00000160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_A0_A1 EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_A0_A1 EQU 0x40006802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_A0_A1 EQU 0x40006804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_A0_A1 EQU 0x40006806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_A0_A1 EQU 0x40006808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_A0_A1 EQU 0x4000680a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_A0_A1 EQU 0x4000680c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_A0_A1 EQU 0x4000680e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_A0_A1 EQU 0x40006810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_A0_A1 EQU 0x40006812\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_A0_A1 EQU 0x40006814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_A0_A1 EQU 0x40006816\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_A0_A1 EQU 0x40006818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_A0_A1 EQU 0x4000681a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_A0_A1 EQU 0x4000681c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_A0_A1 EQU 0x4000681e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_D0_D1 EQU 0x40006840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_D0_D1 EQU 0x40006842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_D0_D1 EQU 0x40006844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_D0_D1 EQU 0x40006846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_D0_D1 EQU 0x40006848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_D0_D1 EQU 0x4000684a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_D0_D1 EQU 0x4000684c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_D0_D1 EQU 0x4000684e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_D0_D1 EQU 0x40006850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_D0_D1 EQU 0x40006852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_D0_D1 EQU 0x40006854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_D0_D1 EQU 0x40006856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_D0_D1 EQU 0x40006858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_D0_D1 EQU 0x4000685a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_D0_D1 EQU 0x4000685c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_D0_D1 EQU 0x4000685e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_F0_F1 EQU 0x40006880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_F0_F1 EQU 0x40006882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_F0_F1 EQU 0x40006884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_F0_F1 EQU 0x40006886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_F0_F1 EQU 0x40006888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_F0_F1 EQU 0x4000688a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_F0_F1 EQU 0x4000688c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_F0_F1 EQU 0x4000688e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_F0_F1 EQU 0x40006890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_F0_F1 EQU 0x40006892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_F0_F1 EQU 0x40006894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_F0_F1 EQU 0x40006896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_F0_F1 EQU 0x40006898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_F0_F1 EQU 0x4000689a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_F0_F1 EQU 0x4000689c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_F0_F1 EQU 0x4000689e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_ST_CTL EQU 0x400068c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_ST_CTL EQU 0x400068c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_ST_CTL EQU 0x400068c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_ST_CTL EQU 0x400068c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_ST_CTL EQU 0x400068c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_ST_CTL EQU 0x400068ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_ST_CTL EQU 0x400068cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_ST_CTL EQU 0x400068ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_ST_CTL EQU 0x400068d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_ST_CTL EQU 0x400068d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_ST_CTL EQU 0x400068d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_ST_CTL EQU 0x400068d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_ST_CTL EQU 0x400068d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_ST_CTL EQU 0x400068da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_ST_CTL EQU 0x400068dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_ST_CTL EQU 0x400068de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MSK_ACTL EQU 0x40006900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MSK_ACTL EQU 0x40006902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MSK_ACTL EQU 0x40006904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MSK_ACTL EQU 0x40006906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MSK_ACTL EQU 0x40006908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MSK_ACTL EQU 0x4000690a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MSK_ACTL EQU 0x4000690c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MSK_ACTL EQU 0x4000690e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MSK_ACTL EQU 0x40006910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MSK_ACTL EQU 0x40006912\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MSK_ACTL EQU 0x40006914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MSK_ACTL EQU 0x40006916\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MSK_ACTL EQU 0x40006918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MSK_ACTL EQU 0x4000691a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MSK_ACTL EQU 0x4000691c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MSK_ACTL EQU 0x4000691e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB00_MC_00 EQU 0x40006940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB01_MC_00 EQU 0x40006942\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB02_MC_00 EQU 0x40006944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB03_MC_00 EQU 0x40006946\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB04_MC_00 EQU 0x40006948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB05_MC_00 EQU 0x4000694a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB06_MC_00 EQU 0x4000694c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB07_MC_00 EQU 0x4000694e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB08_MC_00 EQU 0x40006950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB09_MC_00 EQU 0x40006952\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB10_MC_00 EQU 0x40006954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB11_MC_00 EQU 0x40006956\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB12_MC_00 EQU 0x40006958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB13_MC_00 EQU 0x4000695a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB14_MC_00 EQU 0x4000695c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B0_UDB15_MC_00 EQU 0x4000695e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_BASE\r
-CYDEV_UWRK_UWRK16_CAT_B1_BASE EQU 0x40006a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_B1_SIZE EQU 0x00000160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_A0_A1 EQU 0x40006a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_A0_A1 EQU 0x40006a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_A0_A1 EQU 0x40006a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_A0_A1 EQU 0x40006a0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_A0_A1 EQU 0x40006a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_A0_A1 EQU 0x40006a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_A0_A1 EQU 0x40006a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_A0_A1 EQU 0x40006a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_D0_D1 EQU 0x40006a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_D0_D1 EQU 0x40006a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_D0_D1 EQU 0x40006a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_D0_D1 EQU 0x40006a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_D0_D1 EQU 0x40006a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_D0_D1 EQU 0x40006a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_D0_D1 EQU 0x40006a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_D0_D1 EQU 0x40006a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_F0_F1 EQU 0x40006a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_F0_F1 EQU 0x40006a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_F0_F1 EQU 0x40006a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_F0_F1 EQU 0x40006a8e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_F0_F1 EQU 0x40006a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_F0_F1 EQU 0x40006a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_F0_F1 EQU 0x40006a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_F0_F1 EQU 0x40006a96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_ST_CTL EQU 0x40006ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_ST_CTL EQU 0x40006aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_ST_CTL EQU 0x40006acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_ST_CTL EQU 0x40006ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_ST_CTL EQU 0x40006ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_ST_CTL EQU 0x40006ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_ST_CTL EQU 0x40006ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_ST_CTL EQU 0x40006ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MSK_ACTL EQU 0x40006b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MSK_ACTL EQU 0x40006b0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MSK_ACTL EQU 0x40006b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MSK_ACTL EQU 0x40006b0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MSK_ACTL EQU 0x40006b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MSK_ACTL EQU 0x40006b12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MSK_ACTL EQU 0x40006b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MSK_ACTL EQU 0x40006b16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB04_MC_00 EQU 0x40006b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB05_MC_00 EQU 0x40006b4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB06_MC_00 EQU 0x40006b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB07_MC_00 EQU 0x40006b4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB08_MC_00 EQU 0x40006b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB09_MC_00 EQU 0x40006b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB10_MC_00 EQU 0x40006b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00\r
-CYDEV_UWRK_UWRK16_CAT_B1_UDB11_MC_00 EQU 0x40006b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_BASE\r
-CYDEV_UWRK_UWRK16_DEF_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_SIZE EQU 0x0000075e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_BASE\r
-CYDEV_UWRK_UWRK16_DEF_B0_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_B0_SIZE EQU 0x0000015e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A0 EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A0 EQU 0x40006802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A0 EQU 0x40006804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A0 EQU 0x40006806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A0 EQU 0x40006808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A0 EQU 0x4000680a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A0 EQU 0x4000680c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A0 EQU 0x4000680e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A0 EQU 0x40006810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A0 EQU 0x40006812\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A0 EQU 0x40006814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A0 EQU 0x40006816\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A0 EQU 0x40006818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A0 EQU 0x4000681a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A0 EQU 0x4000681c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_A1 EQU 0x40006820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_A1 EQU 0x40006822\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_A1 EQU 0x40006824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_A1 EQU 0x40006826\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_A1 EQU 0x40006828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_A1 EQU 0x4000682a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_A1 EQU 0x4000682c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_A1 EQU 0x4000682e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_A1 EQU 0x40006830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_A1 EQU 0x40006832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_A1 EQU 0x40006834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_A1 EQU 0x40006836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_A1 EQU 0x40006838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_A1 EQU 0x4000683a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_A1 EQU 0x4000683c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D0 EQU 0x40006840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D0 EQU 0x40006842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D0 EQU 0x40006844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D0 EQU 0x40006846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D0 EQU 0x40006848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D0 EQU 0x4000684a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D0 EQU 0x4000684c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D0 EQU 0x4000684e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D0 EQU 0x40006850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D0 EQU 0x40006852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D0 EQU 0x40006854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D0 EQU 0x40006856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D0 EQU 0x40006858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D0 EQU 0x4000685a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D0 EQU 0x4000685c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_D1 EQU 0x40006860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_D1 EQU 0x40006862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_D1 EQU 0x40006864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_D1 EQU 0x40006866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_D1 EQU 0x40006868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_D1 EQU 0x4000686a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_D1 EQU 0x4000686c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_D1 EQU 0x4000686e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_D1 EQU 0x40006870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_D1 EQU 0x40006872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_D1 EQU 0x40006874\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_D1 EQU 0x40006876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_D1 EQU 0x40006878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_D1 EQU 0x4000687a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_D1 EQU 0x4000687c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F0 EQU 0x40006880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F0 EQU 0x40006882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F0 EQU 0x40006884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F0 EQU 0x40006886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F0 EQU 0x40006888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F0 EQU 0x4000688a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F0 EQU 0x4000688c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F0 EQU 0x4000688e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F0 EQU 0x40006890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F0 EQU 0x40006892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F0 EQU 0x40006894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F0 EQU 0x40006896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F0 EQU 0x40006898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F0 EQU 0x4000689a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F0 EQU 0x4000689c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_F1 EQU 0x400068a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_F1 EQU 0x400068a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_F1 EQU 0x400068a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_F1 EQU 0x400068a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_F1 EQU 0x400068a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_F1 EQU 0x400068aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_F1 EQU 0x400068ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_F1 EQU 0x400068ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_F1 EQU 0x400068b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_F1 EQU 0x400068b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_F1 EQU 0x400068b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_F1 EQU 0x400068b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_F1 EQU 0x400068b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_F1 EQU 0x400068ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_F1 EQU 0x400068bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ST EQU 0x400068c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ST EQU 0x400068c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ST EQU 0x400068c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ST EQU 0x400068c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ST EQU 0x400068c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ST EQU 0x400068ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ST EQU 0x400068cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ST EQU 0x400068ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ST EQU 0x400068d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ST EQU 0x400068d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ST EQU 0x400068d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ST EQU 0x400068d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ST EQU 0x400068d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ST EQU 0x400068da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ST EQU 0x400068dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_CTL EQU 0x400068e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_CTL EQU 0x400068e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_CTL EQU 0x400068e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_CTL EQU 0x400068e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_CTL EQU 0x400068e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_CTL EQU 0x400068ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_CTL EQU 0x400068ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_CTL EQU 0x400068ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_CTL EQU 0x400068f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_CTL EQU 0x400068f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_CTL EQU 0x400068f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_CTL EQU 0x400068f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_CTL EQU 0x400068f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_CTL EQU 0x400068fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_CTL EQU 0x400068fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MSK EQU 0x40006900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MSK EQU 0x40006902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MSK EQU 0x40006904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MSK EQU 0x40006906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MSK EQU 0x40006908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MSK EQU 0x4000690a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MSK EQU 0x4000690c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MSK EQU 0x4000690e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MSK EQU 0x40006910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MSK EQU 0x40006912\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MSK EQU 0x40006914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MSK EQU 0x40006916\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MSK EQU 0x40006918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MSK EQU 0x4000691a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MSK EQU 0x4000691c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_ACTL EQU 0x40006920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_ACTL EQU 0x40006922\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_ACTL EQU 0x40006924\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_ACTL EQU 0x40006926\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_ACTL EQU 0x40006928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_ACTL EQU 0x4000692a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_ACTL EQU 0x4000692c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_ACTL EQU 0x4000692e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_ACTL EQU 0x40006930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_ACTL EQU 0x40006932\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_ACTL EQU 0x40006934\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_ACTL EQU 0x40006936\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_ACTL EQU 0x40006938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_ACTL EQU 0x4000693a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_ACTL EQU 0x4000693c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB00_01_MC EQU 0x40006940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB01_02_MC EQU 0x40006942\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB02_03_MC EQU 0x40006944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB03_04_MC EQU 0x40006946\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB04_05_MC EQU 0x40006948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB05_06_MC EQU 0x4000694a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB06_07_MC EQU 0x4000694c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB07_08_MC EQU 0x4000694e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB08_09_MC EQU 0x40006950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB09_10_MC EQU 0x40006952\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB10_11_MC EQU 0x40006954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB11_12_MC EQU 0x40006956\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB12_13_MC EQU 0x40006958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB13_14_MC EQU 0x4000695a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC\r
-CYDEV_UWRK_UWRK16_DEF_B0_UDB14_15_MC EQU 0x4000695c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_BASE\r
-CYDEV_UWRK_UWRK16_DEF_B1_BASE EQU 0x40006a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_B1_SIZE EQU 0x0000015e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A0 EQU 0x40006a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A0 EQU 0x40006a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A0 EQU 0x40006a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A0 EQU 0x40006a0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A0 EQU 0x40006a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A0 EQU 0x40006a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A0 EQU 0x40006a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A0 EQU 0x40006a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_A1 EQU 0x40006a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_A1 EQU 0x40006a2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_A1 EQU 0x40006a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_A1 EQU 0x40006a2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_A1 EQU 0x40006a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_A1 EQU 0x40006a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_A1 EQU 0x40006a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_A1 EQU 0x40006a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D0 EQU 0x40006a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D0 EQU 0x40006a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D0 EQU 0x40006a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D0 EQU 0x40006a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D0 EQU 0x40006a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D0 EQU 0x40006a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D0 EQU 0x40006a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D0 EQU 0x40006a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_D1 EQU 0x40006a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_D1 EQU 0x40006a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_D1 EQU 0x40006a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_D1 EQU 0x40006a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_D1 EQU 0x40006a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_D1 EQU 0x40006a72\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_D1 EQU 0x40006a74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_D1 EQU 0x40006a76\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F0 EQU 0x40006a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F0 EQU 0x40006a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F0 EQU 0x40006a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F0 EQU 0x40006a8e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F0 EQU 0x40006a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F0 EQU 0x40006a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F0 EQU 0x40006a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F0 EQU 0x40006a96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_F1 EQU 0x40006aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_F1 EQU 0x40006aaa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_F1 EQU 0x40006aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_F1 EQU 0x40006aae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_F1 EQU 0x40006ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_F1 EQU 0x40006ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_F1 EQU 0x40006ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_F1 EQU 0x40006ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ST EQU 0x40006ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ST EQU 0x40006aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ST EQU 0x40006acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ST EQU 0x40006ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ST EQU 0x40006ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ST EQU 0x40006ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ST EQU 0x40006ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ST EQU 0x40006ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_CTL EQU 0x40006ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_CTL EQU 0x40006aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_CTL EQU 0x40006aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_CTL EQU 0x40006aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_CTL EQU 0x40006af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_CTL EQU 0x40006af2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_CTL EQU 0x40006af4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_CTL EQU 0x40006af6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MSK EQU 0x40006b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MSK EQU 0x40006b0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MSK EQU 0x40006b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MSK EQU 0x40006b0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MSK EQU 0x40006b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MSK EQU 0x40006b12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MSK EQU 0x40006b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MSK EQU 0x40006b16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_ACTL EQU 0x40006b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_ACTL EQU 0x40006b2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_ACTL EQU 0x40006b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_ACTL EQU 0x40006b2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_ACTL EQU 0x40006b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_ACTL EQU 0x40006b32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_ACTL EQU 0x40006b34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_ACTL EQU 0x40006b36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB04_05_MC EQU 0x40006b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB05_06_MC EQU 0x40006b4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB06_07_MC EQU 0x40006b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB07_08_MC EQU 0x40006b4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB08_09_MC EQU 0x40006b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB09_10_MC EQU 0x40006b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB10_11_MC EQU 0x40006b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC\r
-CYDEV_UWRK_UWRK16_DEF_B1_UDB11_12_MC EQU 0x40006b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_BASE\r
-CYDEV_PHUB_BASE EQU 0x40007000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_SIZE\r
-CYDEV_PHUB_SIZE EQU 0x00000c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFG\r
-CYDEV_PHUB_CFG EQU 0x40007000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_ERR\r
-CYDEV_PHUB_ERR EQU 0x40007004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_ERR_ADR\r
-CYDEV_PHUB_ERR_ADR EQU 0x40007008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_BASE\r
-CYDEV_PHUB_CH0_BASE EQU 0x40007010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_SIZE\r
-CYDEV_PHUB_CH0_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_BASIC_CFG\r
-CYDEV_PHUB_CH0_BASIC_CFG EQU 0x40007010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_ACTION\r
-CYDEV_PHUB_CH0_ACTION EQU 0x40007014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_BASIC_STATUS\r
-CYDEV_PHUB_CH0_BASIC_STATUS EQU 0x40007018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_BASE\r
-CYDEV_PHUB_CH1_BASE EQU 0x40007020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_SIZE\r
-CYDEV_PHUB_CH1_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_BASIC_CFG\r
-CYDEV_PHUB_CH1_BASIC_CFG EQU 0x40007020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_ACTION\r
-CYDEV_PHUB_CH1_ACTION EQU 0x40007024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_BASIC_STATUS\r
-CYDEV_PHUB_CH1_BASIC_STATUS EQU 0x40007028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_BASE\r
-CYDEV_PHUB_CH2_BASE EQU 0x40007030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_SIZE\r
-CYDEV_PHUB_CH2_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_BASIC_CFG\r
-CYDEV_PHUB_CH2_BASIC_CFG EQU 0x40007030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_ACTION\r
-CYDEV_PHUB_CH2_ACTION EQU 0x40007034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_BASIC_STATUS\r
-CYDEV_PHUB_CH2_BASIC_STATUS EQU 0x40007038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_BASE\r
-CYDEV_PHUB_CH3_BASE EQU 0x40007040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_SIZE\r
-CYDEV_PHUB_CH3_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_BASIC_CFG\r
-CYDEV_PHUB_CH3_BASIC_CFG EQU 0x40007040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_ACTION\r
-CYDEV_PHUB_CH3_ACTION EQU 0x40007044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_BASIC_STATUS\r
-CYDEV_PHUB_CH3_BASIC_STATUS EQU 0x40007048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_BASE\r
-CYDEV_PHUB_CH4_BASE EQU 0x40007050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_SIZE\r
-CYDEV_PHUB_CH4_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_BASIC_CFG\r
-CYDEV_PHUB_CH4_BASIC_CFG EQU 0x40007050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_ACTION\r
-CYDEV_PHUB_CH4_ACTION EQU 0x40007054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_BASIC_STATUS\r
-CYDEV_PHUB_CH4_BASIC_STATUS EQU 0x40007058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_BASE\r
-CYDEV_PHUB_CH5_BASE EQU 0x40007060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_SIZE\r
-CYDEV_PHUB_CH5_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_BASIC_CFG\r
-CYDEV_PHUB_CH5_BASIC_CFG EQU 0x40007060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_ACTION\r
-CYDEV_PHUB_CH5_ACTION EQU 0x40007064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_BASIC_STATUS\r
-CYDEV_PHUB_CH5_BASIC_STATUS EQU 0x40007068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_BASE\r
-CYDEV_PHUB_CH6_BASE EQU 0x40007070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_SIZE\r
-CYDEV_PHUB_CH6_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_BASIC_CFG\r
-CYDEV_PHUB_CH6_BASIC_CFG EQU 0x40007070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_ACTION\r
-CYDEV_PHUB_CH6_ACTION EQU 0x40007074\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_BASIC_STATUS\r
-CYDEV_PHUB_CH6_BASIC_STATUS EQU 0x40007078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_BASE\r
-CYDEV_PHUB_CH7_BASE EQU 0x40007080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_SIZE\r
-CYDEV_PHUB_CH7_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_BASIC_CFG\r
-CYDEV_PHUB_CH7_BASIC_CFG EQU 0x40007080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_ACTION\r
-CYDEV_PHUB_CH7_ACTION EQU 0x40007084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_BASIC_STATUS\r
-CYDEV_PHUB_CH7_BASIC_STATUS EQU 0x40007088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_BASE\r
-CYDEV_PHUB_CH8_BASE EQU 0x40007090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_SIZE\r
-CYDEV_PHUB_CH8_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_BASIC_CFG\r
-CYDEV_PHUB_CH8_BASIC_CFG EQU 0x40007090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_ACTION\r
-CYDEV_PHUB_CH8_ACTION EQU 0x40007094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_BASIC_STATUS\r
-CYDEV_PHUB_CH8_BASIC_STATUS EQU 0x40007098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_BASE\r
-CYDEV_PHUB_CH9_BASE EQU 0x400070a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_SIZE\r
-CYDEV_PHUB_CH9_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_BASIC_CFG\r
-CYDEV_PHUB_CH9_BASIC_CFG EQU 0x400070a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_ACTION\r
-CYDEV_PHUB_CH9_ACTION EQU 0x400070a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_BASIC_STATUS\r
-CYDEV_PHUB_CH9_BASIC_STATUS EQU 0x400070a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_BASE\r
-CYDEV_PHUB_CH10_BASE EQU 0x400070b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_SIZE\r
-CYDEV_PHUB_CH10_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_BASIC_CFG\r
-CYDEV_PHUB_CH10_BASIC_CFG EQU 0x400070b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_ACTION\r
-CYDEV_PHUB_CH10_ACTION EQU 0x400070b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_BASIC_STATUS\r
-CYDEV_PHUB_CH10_BASIC_STATUS EQU 0x400070b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_BASE\r
-CYDEV_PHUB_CH11_BASE EQU 0x400070c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_SIZE\r
-CYDEV_PHUB_CH11_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_BASIC_CFG\r
-CYDEV_PHUB_CH11_BASIC_CFG EQU 0x400070c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_ACTION\r
-CYDEV_PHUB_CH11_ACTION EQU 0x400070c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_BASIC_STATUS\r
-CYDEV_PHUB_CH11_BASIC_STATUS EQU 0x400070c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_BASE\r
-CYDEV_PHUB_CH12_BASE EQU 0x400070d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_SIZE\r
-CYDEV_PHUB_CH12_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_BASIC_CFG\r
-CYDEV_PHUB_CH12_BASIC_CFG EQU 0x400070d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_ACTION\r
-CYDEV_PHUB_CH12_ACTION EQU 0x400070d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_BASIC_STATUS\r
-CYDEV_PHUB_CH12_BASIC_STATUS EQU 0x400070d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_BASE\r
-CYDEV_PHUB_CH13_BASE EQU 0x400070e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_SIZE\r
-CYDEV_PHUB_CH13_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_BASIC_CFG\r
-CYDEV_PHUB_CH13_BASIC_CFG EQU 0x400070e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_ACTION\r
-CYDEV_PHUB_CH13_ACTION EQU 0x400070e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_BASIC_STATUS\r
-CYDEV_PHUB_CH13_BASIC_STATUS EQU 0x400070e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_BASE\r
-CYDEV_PHUB_CH14_BASE EQU 0x400070f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_SIZE\r
-CYDEV_PHUB_CH14_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_BASIC_CFG\r
-CYDEV_PHUB_CH14_BASIC_CFG EQU 0x400070f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_ACTION\r
-CYDEV_PHUB_CH14_ACTION EQU 0x400070f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_BASIC_STATUS\r
-CYDEV_PHUB_CH14_BASIC_STATUS EQU 0x400070f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_BASE\r
-CYDEV_PHUB_CH15_BASE EQU 0x40007100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_SIZE\r
-CYDEV_PHUB_CH15_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_BASIC_CFG\r
-CYDEV_PHUB_CH15_BASIC_CFG EQU 0x40007100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_ACTION\r
-CYDEV_PHUB_CH15_ACTION EQU 0x40007104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_BASIC_STATUS\r
-CYDEV_PHUB_CH15_BASIC_STATUS EQU 0x40007108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_BASE\r
-CYDEV_PHUB_CH16_BASE EQU 0x40007110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_SIZE\r
-CYDEV_PHUB_CH16_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_BASIC_CFG\r
-CYDEV_PHUB_CH16_BASIC_CFG EQU 0x40007110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_ACTION\r
-CYDEV_PHUB_CH16_ACTION EQU 0x40007114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_BASIC_STATUS\r
-CYDEV_PHUB_CH16_BASIC_STATUS EQU 0x40007118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_BASE\r
-CYDEV_PHUB_CH17_BASE EQU 0x40007120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_SIZE\r
-CYDEV_PHUB_CH17_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_BASIC_CFG\r
-CYDEV_PHUB_CH17_BASIC_CFG EQU 0x40007120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_ACTION\r
-CYDEV_PHUB_CH17_ACTION EQU 0x40007124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_BASIC_STATUS\r
-CYDEV_PHUB_CH17_BASIC_STATUS EQU 0x40007128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_BASE\r
-CYDEV_PHUB_CH18_BASE EQU 0x40007130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_SIZE\r
-CYDEV_PHUB_CH18_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_BASIC_CFG\r
-CYDEV_PHUB_CH18_BASIC_CFG EQU 0x40007130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_ACTION\r
-CYDEV_PHUB_CH18_ACTION EQU 0x40007134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_BASIC_STATUS\r
-CYDEV_PHUB_CH18_BASIC_STATUS EQU 0x40007138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_BASE\r
-CYDEV_PHUB_CH19_BASE EQU 0x40007140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_SIZE\r
-CYDEV_PHUB_CH19_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_BASIC_CFG\r
-CYDEV_PHUB_CH19_BASIC_CFG EQU 0x40007140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_ACTION\r
-CYDEV_PHUB_CH19_ACTION EQU 0x40007144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_BASIC_STATUS\r
-CYDEV_PHUB_CH19_BASIC_STATUS EQU 0x40007148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_BASE\r
-CYDEV_PHUB_CH20_BASE EQU 0x40007150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_SIZE\r
-CYDEV_PHUB_CH20_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_BASIC_CFG\r
-CYDEV_PHUB_CH20_BASIC_CFG EQU 0x40007150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_ACTION\r
-CYDEV_PHUB_CH20_ACTION EQU 0x40007154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_BASIC_STATUS\r
-CYDEV_PHUB_CH20_BASIC_STATUS EQU 0x40007158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_BASE\r
-CYDEV_PHUB_CH21_BASE EQU 0x40007160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_SIZE\r
-CYDEV_PHUB_CH21_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_BASIC_CFG\r
-CYDEV_PHUB_CH21_BASIC_CFG EQU 0x40007160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_ACTION\r
-CYDEV_PHUB_CH21_ACTION EQU 0x40007164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_BASIC_STATUS\r
-CYDEV_PHUB_CH21_BASIC_STATUS EQU 0x40007168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_BASE\r
-CYDEV_PHUB_CH22_BASE EQU 0x40007170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_SIZE\r
-CYDEV_PHUB_CH22_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_BASIC_CFG\r
-CYDEV_PHUB_CH22_BASIC_CFG EQU 0x40007170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_ACTION\r
-CYDEV_PHUB_CH22_ACTION EQU 0x40007174\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_BASIC_STATUS\r
-CYDEV_PHUB_CH22_BASIC_STATUS EQU 0x40007178\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_BASE\r
-CYDEV_PHUB_CH23_BASE EQU 0x40007180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_SIZE\r
-CYDEV_PHUB_CH23_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_BASIC_CFG\r
-CYDEV_PHUB_CH23_BASIC_CFG EQU 0x40007180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_ACTION\r
-CYDEV_PHUB_CH23_ACTION EQU 0x40007184\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_BASIC_STATUS\r
-CYDEV_PHUB_CH23_BASIC_STATUS EQU 0x40007188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_BASE\r
-CYDEV_PHUB_CFGMEM0_BASE EQU 0x40007600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_SIZE\r
-CYDEV_PHUB_CFGMEM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_CFG0\r
-CYDEV_PHUB_CFGMEM0_CFG0 EQU 0x40007600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_CFG1\r
-CYDEV_PHUB_CFGMEM0_CFG1 EQU 0x40007604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_BASE\r
-CYDEV_PHUB_CFGMEM1_BASE EQU 0x40007608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_SIZE\r
-CYDEV_PHUB_CFGMEM1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_CFG0\r
-CYDEV_PHUB_CFGMEM1_CFG0 EQU 0x40007608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_CFG1\r
-CYDEV_PHUB_CFGMEM1_CFG1 EQU 0x4000760c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_BASE\r
-CYDEV_PHUB_CFGMEM2_BASE EQU 0x40007610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_SIZE\r
-CYDEV_PHUB_CFGMEM2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_CFG0\r
-CYDEV_PHUB_CFGMEM2_CFG0 EQU 0x40007610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_CFG1\r
-CYDEV_PHUB_CFGMEM2_CFG1 EQU 0x40007614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_BASE\r
-CYDEV_PHUB_CFGMEM3_BASE EQU 0x40007618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_SIZE\r
-CYDEV_PHUB_CFGMEM3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_CFG0\r
-CYDEV_PHUB_CFGMEM3_CFG0 EQU 0x40007618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_CFG1\r
-CYDEV_PHUB_CFGMEM3_CFG1 EQU 0x4000761c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_BASE\r
-CYDEV_PHUB_CFGMEM4_BASE EQU 0x40007620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_SIZE\r
-CYDEV_PHUB_CFGMEM4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_CFG0\r
-CYDEV_PHUB_CFGMEM4_CFG0 EQU 0x40007620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_CFG1\r
-CYDEV_PHUB_CFGMEM4_CFG1 EQU 0x40007624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_BASE\r
-CYDEV_PHUB_CFGMEM5_BASE EQU 0x40007628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_SIZE\r
-CYDEV_PHUB_CFGMEM5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_CFG0\r
-CYDEV_PHUB_CFGMEM5_CFG0 EQU 0x40007628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_CFG1\r
-CYDEV_PHUB_CFGMEM5_CFG1 EQU 0x4000762c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_BASE\r
-CYDEV_PHUB_CFGMEM6_BASE EQU 0x40007630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_SIZE\r
-CYDEV_PHUB_CFGMEM6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_CFG0\r
-CYDEV_PHUB_CFGMEM6_CFG0 EQU 0x40007630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_CFG1\r
-CYDEV_PHUB_CFGMEM6_CFG1 EQU 0x40007634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_BASE\r
-CYDEV_PHUB_CFGMEM7_BASE EQU 0x40007638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_SIZE\r
-CYDEV_PHUB_CFGMEM7_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_CFG0\r
-CYDEV_PHUB_CFGMEM7_CFG0 EQU 0x40007638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_CFG1\r
-CYDEV_PHUB_CFGMEM7_CFG1 EQU 0x4000763c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_BASE\r
-CYDEV_PHUB_CFGMEM8_BASE EQU 0x40007640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_SIZE\r
-CYDEV_PHUB_CFGMEM8_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_CFG0\r
-CYDEV_PHUB_CFGMEM8_CFG0 EQU 0x40007640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_CFG1\r
-CYDEV_PHUB_CFGMEM8_CFG1 EQU 0x40007644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_BASE\r
-CYDEV_PHUB_CFGMEM9_BASE EQU 0x40007648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_SIZE\r
-CYDEV_PHUB_CFGMEM9_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_CFG0\r
-CYDEV_PHUB_CFGMEM9_CFG0 EQU 0x40007648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_CFG1\r
-CYDEV_PHUB_CFGMEM9_CFG1 EQU 0x4000764c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_BASE\r
-CYDEV_PHUB_CFGMEM10_BASE EQU 0x40007650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_SIZE\r
-CYDEV_PHUB_CFGMEM10_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_CFG0\r
-CYDEV_PHUB_CFGMEM10_CFG0 EQU 0x40007650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_CFG1\r
-CYDEV_PHUB_CFGMEM10_CFG1 EQU 0x40007654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_BASE\r
-CYDEV_PHUB_CFGMEM11_BASE EQU 0x40007658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_SIZE\r
-CYDEV_PHUB_CFGMEM11_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_CFG0\r
-CYDEV_PHUB_CFGMEM11_CFG0 EQU 0x40007658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_CFG1\r
-CYDEV_PHUB_CFGMEM11_CFG1 EQU 0x4000765c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_BASE\r
-CYDEV_PHUB_CFGMEM12_BASE EQU 0x40007660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_SIZE\r
-CYDEV_PHUB_CFGMEM12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_CFG0\r
-CYDEV_PHUB_CFGMEM12_CFG0 EQU 0x40007660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_CFG1\r
-CYDEV_PHUB_CFGMEM12_CFG1 EQU 0x40007664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_BASE\r
-CYDEV_PHUB_CFGMEM13_BASE EQU 0x40007668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_SIZE\r
-CYDEV_PHUB_CFGMEM13_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_CFG0\r
-CYDEV_PHUB_CFGMEM13_CFG0 EQU 0x40007668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_CFG1\r
-CYDEV_PHUB_CFGMEM13_CFG1 EQU 0x4000766c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_BASE\r
-CYDEV_PHUB_CFGMEM14_BASE EQU 0x40007670\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_SIZE\r
-CYDEV_PHUB_CFGMEM14_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_CFG0\r
-CYDEV_PHUB_CFGMEM14_CFG0 EQU 0x40007670\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_CFG1\r
-CYDEV_PHUB_CFGMEM14_CFG1 EQU 0x40007674\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_BASE\r
-CYDEV_PHUB_CFGMEM15_BASE EQU 0x40007678\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_SIZE\r
-CYDEV_PHUB_CFGMEM15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_CFG0\r
-CYDEV_PHUB_CFGMEM15_CFG0 EQU 0x40007678\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_CFG1\r
-CYDEV_PHUB_CFGMEM15_CFG1 EQU 0x4000767c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_BASE\r
-CYDEV_PHUB_CFGMEM16_BASE EQU 0x40007680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_SIZE\r
-CYDEV_PHUB_CFGMEM16_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_CFG0\r
-CYDEV_PHUB_CFGMEM16_CFG0 EQU 0x40007680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_CFG1\r
-CYDEV_PHUB_CFGMEM16_CFG1 EQU 0x40007684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_BASE\r
-CYDEV_PHUB_CFGMEM17_BASE EQU 0x40007688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_SIZE\r
-CYDEV_PHUB_CFGMEM17_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_CFG0\r
-CYDEV_PHUB_CFGMEM17_CFG0 EQU 0x40007688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_CFG1\r
-CYDEV_PHUB_CFGMEM17_CFG1 EQU 0x4000768c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_BASE\r
-CYDEV_PHUB_CFGMEM18_BASE EQU 0x40007690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_SIZE\r
-CYDEV_PHUB_CFGMEM18_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_CFG0\r
-CYDEV_PHUB_CFGMEM18_CFG0 EQU 0x40007690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_CFG1\r
-CYDEV_PHUB_CFGMEM18_CFG1 EQU 0x40007694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_BASE\r
-CYDEV_PHUB_CFGMEM19_BASE EQU 0x40007698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_SIZE\r
-CYDEV_PHUB_CFGMEM19_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_CFG0\r
-CYDEV_PHUB_CFGMEM19_CFG0 EQU 0x40007698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_CFG1\r
-CYDEV_PHUB_CFGMEM19_CFG1 EQU 0x4000769c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_BASE\r
-CYDEV_PHUB_CFGMEM20_BASE EQU 0x400076a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_SIZE\r
-CYDEV_PHUB_CFGMEM20_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_CFG0\r
-CYDEV_PHUB_CFGMEM20_CFG0 EQU 0x400076a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_CFG1\r
-CYDEV_PHUB_CFGMEM20_CFG1 EQU 0x400076a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_BASE\r
-CYDEV_PHUB_CFGMEM21_BASE EQU 0x400076a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_SIZE\r
-CYDEV_PHUB_CFGMEM21_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_CFG0\r
-CYDEV_PHUB_CFGMEM21_CFG0 EQU 0x400076a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_CFG1\r
-CYDEV_PHUB_CFGMEM21_CFG1 EQU 0x400076ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_BASE\r
-CYDEV_PHUB_CFGMEM22_BASE EQU 0x400076b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_SIZE\r
-CYDEV_PHUB_CFGMEM22_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_CFG0\r
-CYDEV_PHUB_CFGMEM22_CFG0 EQU 0x400076b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_CFG1\r
-CYDEV_PHUB_CFGMEM22_CFG1 EQU 0x400076b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_BASE\r
-CYDEV_PHUB_CFGMEM23_BASE EQU 0x400076b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_SIZE\r
-CYDEV_PHUB_CFGMEM23_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_CFG0\r
-CYDEV_PHUB_CFGMEM23_CFG0 EQU 0x400076b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_CFG1\r
-CYDEV_PHUB_CFGMEM23_CFG1 EQU 0x400076bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_BASE\r
-CYDEV_PHUB_TDMEM0_BASE EQU 0x40007800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_SIZE\r
-CYDEV_PHUB_TDMEM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_ORIG_TD0\r
-CYDEV_PHUB_TDMEM0_ORIG_TD0 EQU 0x40007800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_ORIG_TD1\r
-CYDEV_PHUB_TDMEM0_ORIG_TD1 EQU 0x40007804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_BASE\r
-CYDEV_PHUB_TDMEM1_BASE EQU 0x40007808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_SIZE\r
-CYDEV_PHUB_TDMEM1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_ORIG_TD0\r
-CYDEV_PHUB_TDMEM1_ORIG_TD0 EQU 0x40007808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_ORIG_TD1\r
-CYDEV_PHUB_TDMEM1_ORIG_TD1 EQU 0x4000780c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_BASE\r
-CYDEV_PHUB_TDMEM2_BASE EQU 0x40007810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_SIZE\r
-CYDEV_PHUB_TDMEM2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_ORIG_TD0\r
-CYDEV_PHUB_TDMEM2_ORIG_TD0 EQU 0x40007810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_ORIG_TD1\r
-CYDEV_PHUB_TDMEM2_ORIG_TD1 EQU 0x40007814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_BASE\r
-CYDEV_PHUB_TDMEM3_BASE EQU 0x40007818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_SIZE\r
-CYDEV_PHUB_TDMEM3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_ORIG_TD0\r
-CYDEV_PHUB_TDMEM3_ORIG_TD0 EQU 0x40007818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_ORIG_TD1\r
-CYDEV_PHUB_TDMEM3_ORIG_TD1 EQU 0x4000781c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_BASE\r
-CYDEV_PHUB_TDMEM4_BASE EQU 0x40007820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_SIZE\r
-CYDEV_PHUB_TDMEM4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_ORIG_TD0\r
-CYDEV_PHUB_TDMEM4_ORIG_TD0 EQU 0x40007820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_ORIG_TD1\r
-CYDEV_PHUB_TDMEM4_ORIG_TD1 EQU 0x40007824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_BASE\r
-CYDEV_PHUB_TDMEM5_BASE EQU 0x40007828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_SIZE\r
-CYDEV_PHUB_TDMEM5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_ORIG_TD0\r
-CYDEV_PHUB_TDMEM5_ORIG_TD0 EQU 0x40007828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_ORIG_TD1\r
-CYDEV_PHUB_TDMEM5_ORIG_TD1 EQU 0x4000782c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_BASE\r
-CYDEV_PHUB_TDMEM6_BASE EQU 0x40007830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_SIZE\r
-CYDEV_PHUB_TDMEM6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_ORIG_TD0\r
-CYDEV_PHUB_TDMEM6_ORIG_TD0 EQU 0x40007830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_ORIG_TD1\r
-CYDEV_PHUB_TDMEM6_ORIG_TD1 EQU 0x40007834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_BASE\r
-CYDEV_PHUB_TDMEM7_BASE EQU 0x40007838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_SIZE\r
-CYDEV_PHUB_TDMEM7_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_ORIG_TD0\r
-CYDEV_PHUB_TDMEM7_ORIG_TD0 EQU 0x40007838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_ORIG_TD1\r
-CYDEV_PHUB_TDMEM7_ORIG_TD1 EQU 0x4000783c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_BASE\r
-CYDEV_PHUB_TDMEM8_BASE EQU 0x40007840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_SIZE\r
-CYDEV_PHUB_TDMEM8_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_ORIG_TD0\r
-CYDEV_PHUB_TDMEM8_ORIG_TD0 EQU 0x40007840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_ORIG_TD1\r
-CYDEV_PHUB_TDMEM8_ORIG_TD1 EQU 0x40007844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_BASE\r
-CYDEV_PHUB_TDMEM9_BASE EQU 0x40007848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_SIZE\r
-CYDEV_PHUB_TDMEM9_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_ORIG_TD0\r
-CYDEV_PHUB_TDMEM9_ORIG_TD0 EQU 0x40007848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_ORIG_TD1\r
-CYDEV_PHUB_TDMEM9_ORIG_TD1 EQU 0x4000784c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_BASE\r
-CYDEV_PHUB_TDMEM10_BASE EQU 0x40007850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_SIZE\r
-CYDEV_PHUB_TDMEM10_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_ORIG_TD0\r
-CYDEV_PHUB_TDMEM10_ORIG_TD0 EQU 0x40007850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_ORIG_TD1\r
-CYDEV_PHUB_TDMEM10_ORIG_TD1 EQU 0x40007854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_BASE\r
-CYDEV_PHUB_TDMEM11_BASE EQU 0x40007858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_SIZE\r
-CYDEV_PHUB_TDMEM11_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_ORIG_TD0\r
-CYDEV_PHUB_TDMEM11_ORIG_TD0 EQU 0x40007858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_ORIG_TD1\r
-CYDEV_PHUB_TDMEM11_ORIG_TD1 EQU 0x4000785c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_BASE\r
-CYDEV_PHUB_TDMEM12_BASE EQU 0x40007860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_SIZE\r
-CYDEV_PHUB_TDMEM12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_ORIG_TD0\r
-CYDEV_PHUB_TDMEM12_ORIG_TD0 EQU 0x40007860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_ORIG_TD1\r
-CYDEV_PHUB_TDMEM12_ORIG_TD1 EQU 0x40007864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_BASE\r
-CYDEV_PHUB_TDMEM13_BASE EQU 0x40007868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_SIZE\r
-CYDEV_PHUB_TDMEM13_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_ORIG_TD0\r
-CYDEV_PHUB_TDMEM13_ORIG_TD0 EQU 0x40007868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_ORIG_TD1\r
-CYDEV_PHUB_TDMEM13_ORIG_TD1 EQU 0x4000786c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_BASE\r
-CYDEV_PHUB_TDMEM14_BASE EQU 0x40007870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_SIZE\r
-CYDEV_PHUB_TDMEM14_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_ORIG_TD0\r
-CYDEV_PHUB_TDMEM14_ORIG_TD0 EQU 0x40007870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_ORIG_TD1\r
-CYDEV_PHUB_TDMEM14_ORIG_TD1 EQU 0x40007874\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_BASE\r
-CYDEV_PHUB_TDMEM15_BASE EQU 0x40007878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_SIZE\r
-CYDEV_PHUB_TDMEM15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_ORIG_TD0\r
-CYDEV_PHUB_TDMEM15_ORIG_TD0 EQU 0x40007878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_ORIG_TD1\r
-CYDEV_PHUB_TDMEM15_ORIG_TD1 EQU 0x4000787c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_BASE\r
-CYDEV_PHUB_TDMEM16_BASE EQU 0x40007880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_SIZE\r
-CYDEV_PHUB_TDMEM16_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_ORIG_TD0\r
-CYDEV_PHUB_TDMEM16_ORIG_TD0 EQU 0x40007880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_ORIG_TD1\r
-CYDEV_PHUB_TDMEM16_ORIG_TD1 EQU 0x40007884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_BASE\r
-CYDEV_PHUB_TDMEM17_BASE EQU 0x40007888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_SIZE\r
-CYDEV_PHUB_TDMEM17_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_ORIG_TD0\r
-CYDEV_PHUB_TDMEM17_ORIG_TD0 EQU 0x40007888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_ORIG_TD1\r
-CYDEV_PHUB_TDMEM17_ORIG_TD1 EQU 0x4000788c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_BASE\r
-CYDEV_PHUB_TDMEM18_BASE EQU 0x40007890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_SIZE\r
-CYDEV_PHUB_TDMEM18_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_ORIG_TD0\r
-CYDEV_PHUB_TDMEM18_ORIG_TD0 EQU 0x40007890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_ORIG_TD1\r
-CYDEV_PHUB_TDMEM18_ORIG_TD1 EQU 0x40007894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_BASE\r
-CYDEV_PHUB_TDMEM19_BASE EQU 0x40007898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_SIZE\r
-CYDEV_PHUB_TDMEM19_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_ORIG_TD0\r
-CYDEV_PHUB_TDMEM19_ORIG_TD0 EQU 0x40007898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_ORIG_TD1\r
-CYDEV_PHUB_TDMEM19_ORIG_TD1 EQU 0x4000789c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_BASE\r
-CYDEV_PHUB_TDMEM20_BASE EQU 0x400078a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_SIZE\r
-CYDEV_PHUB_TDMEM20_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_ORIG_TD0\r
-CYDEV_PHUB_TDMEM20_ORIG_TD0 EQU 0x400078a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_ORIG_TD1\r
-CYDEV_PHUB_TDMEM20_ORIG_TD1 EQU 0x400078a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_BASE\r
-CYDEV_PHUB_TDMEM21_BASE EQU 0x400078a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_SIZE\r
-CYDEV_PHUB_TDMEM21_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_ORIG_TD0\r
-CYDEV_PHUB_TDMEM21_ORIG_TD0 EQU 0x400078a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_ORIG_TD1\r
-CYDEV_PHUB_TDMEM21_ORIG_TD1 EQU 0x400078ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_BASE\r
-CYDEV_PHUB_TDMEM22_BASE EQU 0x400078b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_SIZE\r
-CYDEV_PHUB_TDMEM22_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_ORIG_TD0\r
-CYDEV_PHUB_TDMEM22_ORIG_TD0 EQU 0x400078b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_ORIG_TD1\r
-CYDEV_PHUB_TDMEM22_ORIG_TD1 EQU 0x400078b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_BASE\r
-CYDEV_PHUB_TDMEM23_BASE EQU 0x400078b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_SIZE\r
-CYDEV_PHUB_TDMEM23_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_ORIG_TD0\r
-CYDEV_PHUB_TDMEM23_ORIG_TD0 EQU 0x400078b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_ORIG_TD1\r
-CYDEV_PHUB_TDMEM23_ORIG_TD1 EQU 0x400078bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_BASE\r
-CYDEV_PHUB_TDMEM24_BASE EQU 0x400078c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_SIZE\r
-CYDEV_PHUB_TDMEM24_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_ORIG_TD0\r
-CYDEV_PHUB_TDMEM24_ORIG_TD0 EQU 0x400078c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_ORIG_TD1\r
-CYDEV_PHUB_TDMEM24_ORIG_TD1 EQU 0x400078c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_BASE\r
-CYDEV_PHUB_TDMEM25_BASE EQU 0x400078c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_SIZE\r
-CYDEV_PHUB_TDMEM25_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_ORIG_TD0\r
-CYDEV_PHUB_TDMEM25_ORIG_TD0 EQU 0x400078c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_ORIG_TD1\r
-CYDEV_PHUB_TDMEM25_ORIG_TD1 EQU 0x400078cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_BASE\r
-CYDEV_PHUB_TDMEM26_BASE EQU 0x400078d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_SIZE\r
-CYDEV_PHUB_TDMEM26_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_ORIG_TD0\r
-CYDEV_PHUB_TDMEM26_ORIG_TD0 EQU 0x400078d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_ORIG_TD1\r
-CYDEV_PHUB_TDMEM26_ORIG_TD1 EQU 0x400078d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_BASE\r
-CYDEV_PHUB_TDMEM27_BASE EQU 0x400078d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_SIZE\r
-CYDEV_PHUB_TDMEM27_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_ORIG_TD0\r
-CYDEV_PHUB_TDMEM27_ORIG_TD0 EQU 0x400078d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_ORIG_TD1\r
-CYDEV_PHUB_TDMEM27_ORIG_TD1 EQU 0x400078dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_BASE\r
-CYDEV_PHUB_TDMEM28_BASE EQU 0x400078e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_SIZE\r
-CYDEV_PHUB_TDMEM28_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_ORIG_TD0\r
-CYDEV_PHUB_TDMEM28_ORIG_TD0 EQU 0x400078e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_ORIG_TD1\r
-CYDEV_PHUB_TDMEM28_ORIG_TD1 EQU 0x400078e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_BASE\r
-CYDEV_PHUB_TDMEM29_BASE EQU 0x400078e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_SIZE\r
-CYDEV_PHUB_TDMEM29_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_ORIG_TD0\r
-CYDEV_PHUB_TDMEM29_ORIG_TD0 EQU 0x400078e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_ORIG_TD1\r
-CYDEV_PHUB_TDMEM29_ORIG_TD1 EQU 0x400078ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_BASE\r
-CYDEV_PHUB_TDMEM30_BASE EQU 0x400078f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_SIZE\r
-CYDEV_PHUB_TDMEM30_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_ORIG_TD0\r
-CYDEV_PHUB_TDMEM30_ORIG_TD0 EQU 0x400078f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_ORIG_TD1\r
-CYDEV_PHUB_TDMEM30_ORIG_TD1 EQU 0x400078f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_BASE\r
-CYDEV_PHUB_TDMEM31_BASE EQU 0x400078f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_SIZE\r
-CYDEV_PHUB_TDMEM31_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_ORIG_TD0\r
-CYDEV_PHUB_TDMEM31_ORIG_TD0 EQU 0x400078f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_ORIG_TD1\r
-CYDEV_PHUB_TDMEM31_ORIG_TD1 EQU 0x400078fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_BASE\r
-CYDEV_PHUB_TDMEM32_BASE EQU 0x40007900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_SIZE\r
-CYDEV_PHUB_TDMEM32_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_ORIG_TD0\r
-CYDEV_PHUB_TDMEM32_ORIG_TD0 EQU 0x40007900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_ORIG_TD1\r
-CYDEV_PHUB_TDMEM32_ORIG_TD1 EQU 0x40007904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_BASE\r
-CYDEV_PHUB_TDMEM33_BASE EQU 0x40007908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_SIZE\r
-CYDEV_PHUB_TDMEM33_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_ORIG_TD0\r
-CYDEV_PHUB_TDMEM33_ORIG_TD0 EQU 0x40007908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_ORIG_TD1\r
-CYDEV_PHUB_TDMEM33_ORIG_TD1 EQU 0x4000790c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_BASE\r
-CYDEV_PHUB_TDMEM34_BASE EQU 0x40007910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_SIZE\r
-CYDEV_PHUB_TDMEM34_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_ORIG_TD0\r
-CYDEV_PHUB_TDMEM34_ORIG_TD0 EQU 0x40007910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_ORIG_TD1\r
-CYDEV_PHUB_TDMEM34_ORIG_TD1 EQU 0x40007914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_BASE\r
-CYDEV_PHUB_TDMEM35_BASE EQU 0x40007918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_SIZE\r
-CYDEV_PHUB_TDMEM35_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_ORIG_TD0\r
-CYDEV_PHUB_TDMEM35_ORIG_TD0 EQU 0x40007918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_ORIG_TD1\r
-CYDEV_PHUB_TDMEM35_ORIG_TD1 EQU 0x4000791c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_BASE\r
-CYDEV_PHUB_TDMEM36_BASE EQU 0x40007920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_SIZE\r
-CYDEV_PHUB_TDMEM36_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_ORIG_TD0\r
-CYDEV_PHUB_TDMEM36_ORIG_TD0 EQU 0x40007920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_ORIG_TD1\r
-CYDEV_PHUB_TDMEM36_ORIG_TD1 EQU 0x40007924\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_BASE\r
-CYDEV_PHUB_TDMEM37_BASE EQU 0x40007928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_SIZE\r
-CYDEV_PHUB_TDMEM37_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_ORIG_TD0\r
-CYDEV_PHUB_TDMEM37_ORIG_TD0 EQU 0x40007928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_ORIG_TD1\r
-CYDEV_PHUB_TDMEM37_ORIG_TD1 EQU 0x4000792c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_BASE\r
-CYDEV_PHUB_TDMEM38_BASE EQU 0x40007930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_SIZE\r
-CYDEV_PHUB_TDMEM38_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_ORIG_TD0\r
-CYDEV_PHUB_TDMEM38_ORIG_TD0 EQU 0x40007930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_ORIG_TD1\r
-CYDEV_PHUB_TDMEM38_ORIG_TD1 EQU 0x40007934\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_BASE\r
-CYDEV_PHUB_TDMEM39_BASE EQU 0x40007938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_SIZE\r
-CYDEV_PHUB_TDMEM39_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_ORIG_TD0\r
-CYDEV_PHUB_TDMEM39_ORIG_TD0 EQU 0x40007938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_ORIG_TD1\r
-CYDEV_PHUB_TDMEM39_ORIG_TD1 EQU 0x4000793c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_BASE\r
-CYDEV_PHUB_TDMEM40_BASE EQU 0x40007940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_SIZE\r
-CYDEV_PHUB_TDMEM40_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_ORIG_TD0\r
-CYDEV_PHUB_TDMEM40_ORIG_TD0 EQU 0x40007940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_ORIG_TD1\r
-CYDEV_PHUB_TDMEM40_ORIG_TD1 EQU 0x40007944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_BASE\r
-CYDEV_PHUB_TDMEM41_BASE EQU 0x40007948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_SIZE\r
-CYDEV_PHUB_TDMEM41_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_ORIG_TD0\r
-CYDEV_PHUB_TDMEM41_ORIG_TD0 EQU 0x40007948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_ORIG_TD1\r
-CYDEV_PHUB_TDMEM41_ORIG_TD1 EQU 0x4000794c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_BASE\r
-CYDEV_PHUB_TDMEM42_BASE EQU 0x40007950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_SIZE\r
-CYDEV_PHUB_TDMEM42_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_ORIG_TD0\r
-CYDEV_PHUB_TDMEM42_ORIG_TD0 EQU 0x40007950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_ORIG_TD1\r
-CYDEV_PHUB_TDMEM42_ORIG_TD1 EQU 0x40007954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_BASE\r
-CYDEV_PHUB_TDMEM43_BASE EQU 0x40007958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_SIZE\r
-CYDEV_PHUB_TDMEM43_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_ORIG_TD0\r
-CYDEV_PHUB_TDMEM43_ORIG_TD0 EQU 0x40007958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_ORIG_TD1\r
-CYDEV_PHUB_TDMEM43_ORIG_TD1 EQU 0x4000795c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_BASE\r
-CYDEV_PHUB_TDMEM44_BASE EQU 0x40007960\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_SIZE\r
-CYDEV_PHUB_TDMEM44_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_ORIG_TD0\r
-CYDEV_PHUB_TDMEM44_ORIG_TD0 EQU 0x40007960\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_ORIG_TD1\r
-CYDEV_PHUB_TDMEM44_ORIG_TD1 EQU 0x40007964\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_BASE\r
-CYDEV_PHUB_TDMEM45_BASE EQU 0x40007968\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_SIZE\r
-CYDEV_PHUB_TDMEM45_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_ORIG_TD0\r
-CYDEV_PHUB_TDMEM45_ORIG_TD0 EQU 0x40007968\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_ORIG_TD1\r
-CYDEV_PHUB_TDMEM45_ORIG_TD1 EQU 0x4000796c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_BASE\r
-CYDEV_PHUB_TDMEM46_BASE EQU 0x40007970\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_SIZE\r
-CYDEV_PHUB_TDMEM46_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_ORIG_TD0\r
-CYDEV_PHUB_TDMEM46_ORIG_TD0 EQU 0x40007970\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_ORIG_TD1\r
-CYDEV_PHUB_TDMEM46_ORIG_TD1 EQU 0x40007974\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_BASE\r
-CYDEV_PHUB_TDMEM47_BASE EQU 0x40007978\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_SIZE\r
-CYDEV_PHUB_TDMEM47_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_ORIG_TD0\r
-CYDEV_PHUB_TDMEM47_ORIG_TD0 EQU 0x40007978\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_ORIG_TD1\r
-CYDEV_PHUB_TDMEM47_ORIG_TD1 EQU 0x4000797c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_BASE\r
-CYDEV_PHUB_TDMEM48_BASE EQU 0x40007980\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_SIZE\r
-CYDEV_PHUB_TDMEM48_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_ORIG_TD0\r
-CYDEV_PHUB_TDMEM48_ORIG_TD0 EQU 0x40007980\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_ORIG_TD1\r
-CYDEV_PHUB_TDMEM48_ORIG_TD1 EQU 0x40007984\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_BASE\r
-CYDEV_PHUB_TDMEM49_BASE EQU 0x40007988\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_SIZE\r
-CYDEV_PHUB_TDMEM49_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_ORIG_TD0\r
-CYDEV_PHUB_TDMEM49_ORIG_TD0 EQU 0x40007988\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_ORIG_TD1\r
-CYDEV_PHUB_TDMEM49_ORIG_TD1 EQU 0x4000798c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_BASE\r
-CYDEV_PHUB_TDMEM50_BASE EQU 0x40007990\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_SIZE\r
-CYDEV_PHUB_TDMEM50_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_ORIG_TD0\r
-CYDEV_PHUB_TDMEM50_ORIG_TD0 EQU 0x40007990\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_ORIG_TD1\r
-CYDEV_PHUB_TDMEM50_ORIG_TD1 EQU 0x40007994\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_BASE\r
-CYDEV_PHUB_TDMEM51_BASE EQU 0x40007998\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_SIZE\r
-CYDEV_PHUB_TDMEM51_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_ORIG_TD0\r
-CYDEV_PHUB_TDMEM51_ORIG_TD0 EQU 0x40007998\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_ORIG_TD1\r
-CYDEV_PHUB_TDMEM51_ORIG_TD1 EQU 0x4000799c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_BASE\r
-CYDEV_PHUB_TDMEM52_BASE EQU 0x400079a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_SIZE\r
-CYDEV_PHUB_TDMEM52_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_ORIG_TD0\r
-CYDEV_PHUB_TDMEM52_ORIG_TD0 EQU 0x400079a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_ORIG_TD1\r
-CYDEV_PHUB_TDMEM52_ORIG_TD1 EQU 0x400079a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_BASE\r
-CYDEV_PHUB_TDMEM53_BASE EQU 0x400079a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_SIZE\r
-CYDEV_PHUB_TDMEM53_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_ORIG_TD0\r
-CYDEV_PHUB_TDMEM53_ORIG_TD0 EQU 0x400079a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_ORIG_TD1\r
-CYDEV_PHUB_TDMEM53_ORIG_TD1 EQU 0x400079ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_BASE\r
-CYDEV_PHUB_TDMEM54_BASE EQU 0x400079b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_SIZE\r
-CYDEV_PHUB_TDMEM54_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_ORIG_TD0\r
-CYDEV_PHUB_TDMEM54_ORIG_TD0 EQU 0x400079b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_ORIG_TD1\r
-CYDEV_PHUB_TDMEM54_ORIG_TD1 EQU 0x400079b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_BASE\r
-CYDEV_PHUB_TDMEM55_BASE EQU 0x400079b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_SIZE\r
-CYDEV_PHUB_TDMEM55_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_ORIG_TD0\r
-CYDEV_PHUB_TDMEM55_ORIG_TD0 EQU 0x400079b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_ORIG_TD1\r
-CYDEV_PHUB_TDMEM55_ORIG_TD1 EQU 0x400079bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_BASE\r
-CYDEV_PHUB_TDMEM56_BASE EQU 0x400079c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_SIZE\r
-CYDEV_PHUB_TDMEM56_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_ORIG_TD0\r
-CYDEV_PHUB_TDMEM56_ORIG_TD0 EQU 0x400079c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_ORIG_TD1\r
-CYDEV_PHUB_TDMEM56_ORIG_TD1 EQU 0x400079c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_BASE\r
-CYDEV_PHUB_TDMEM57_BASE EQU 0x400079c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_SIZE\r
-CYDEV_PHUB_TDMEM57_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_ORIG_TD0\r
-CYDEV_PHUB_TDMEM57_ORIG_TD0 EQU 0x400079c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_ORIG_TD1\r
-CYDEV_PHUB_TDMEM57_ORIG_TD1 EQU 0x400079cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_BASE\r
-CYDEV_PHUB_TDMEM58_BASE EQU 0x400079d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_SIZE\r
-CYDEV_PHUB_TDMEM58_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_ORIG_TD0\r
-CYDEV_PHUB_TDMEM58_ORIG_TD0 EQU 0x400079d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_ORIG_TD1\r
-CYDEV_PHUB_TDMEM58_ORIG_TD1 EQU 0x400079d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_BASE\r
-CYDEV_PHUB_TDMEM59_BASE EQU 0x400079d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_SIZE\r
-CYDEV_PHUB_TDMEM59_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_ORIG_TD0\r
-CYDEV_PHUB_TDMEM59_ORIG_TD0 EQU 0x400079d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_ORIG_TD1\r
-CYDEV_PHUB_TDMEM59_ORIG_TD1 EQU 0x400079dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_BASE\r
-CYDEV_PHUB_TDMEM60_BASE EQU 0x400079e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_SIZE\r
-CYDEV_PHUB_TDMEM60_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_ORIG_TD0\r
-CYDEV_PHUB_TDMEM60_ORIG_TD0 EQU 0x400079e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_ORIG_TD1\r
-CYDEV_PHUB_TDMEM60_ORIG_TD1 EQU 0x400079e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_BASE\r
-CYDEV_PHUB_TDMEM61_BASE EQU 0x400079e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_SIZE\r
-CYDEV_PHUB_TDMEM61_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_ORIG_TD0\r
-CYDEV_PHUB_TDMEM61_ORIG_TD0 EQU 0x400079e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_ORIG_TD1\r
-CYDEV_PHUB_TDMEM61_ORIG_TD1 EQU 0x400079ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_BASE\r
-CYDEV_PHUB_TDMEM62_BASE EQU 0x400079f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_SIZE\r
-CYDEV_PHUB_TDMEM62_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_ORIG_TD0\r
-CYDEV_PHUB_TDMEM62_ORIG_TD0 EQU 0x400079f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_ORIG_TD1\r
-CYDEV_PHUB_TDMEM62_ORIG_TD1 EQU 0x400079f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_BASE\r
-CYDEV_PHUB_TDMEM63_BASE EQU 0x400079f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_SIZE\r
-CYDEV_PHUB_TDMEM63_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_ORIG_TD0\r
-CYDEV_PHUB_TDMEM63_ORIG_TD0 EQU 0x400079f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_ORIG_TD1\r
-CYDEV_PHUB_TDMEM63_ORIG_TD1 EQU 0x400079fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_BASE\r
-CYDEV_PHUB_TDMEM64_BASE EQU 0x40007a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_SIZE\r
-CYDEV_PHUB_TDMEM64_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_ORIG_TD0\r
-CYDEV_PHUB_TDMEM64_ORIG_TD0 EQU 0x40007a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_ORIG_TD1\r
-CYDEV_PHUB_TDMEM64_ORIG_TD1 EQU 0x40007a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_BASE\r
-CYDEV_PHUB_TDMEM65_BASE EQU 0x40007a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_SIZE\r
-CYDEV_PHUB_TDMEM65_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_ORIG_TD0\r
-CYDEV_PHUB_TDMEM65_ORIG_TD0 EQU 0x40007a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_ORIG_TD1\r
-CYDEV_PHUB_TDMEM65_ORIG_TD1 EQU 0x40007a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_BASE\r
-CYDEV_PHUB_TDMEM66_BASE EQU 0x40007a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_SIZE\r
-CYDEV_PHUB_TDMEM66_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_ORIG_TD0\r
-CYDEV_PHUB_TDMEM66_ORIG_TD0 EQU 0x40007a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_ORIG_TD1\r
-CYDEV_PHUB_TDMEM66_ORIG_TD1 EQU 0x40007a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_BASE\r
-CYDEV_PHUB_TDMEM67_BASE EQU 0x40007a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_SIZE\r
-CYDEV_PHUB_TDMEM67_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_ORIG_TD0\r
-CYDEV_PHUB_TDMEM67_ORIG_TD0 EQU 0x40007a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_ORIG_TD1\r
-CYDEV_PHUB_TDMEM67_ORIG_TD1 EQU 0x40007a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_BASE\r
-CYDEV_PHUB_TDMEM68_BASE EQU 0x40007a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_SIZE\r
-CYDEV_PHUB_TDMEM68_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_ORIG_TD0\r
-CYDEV_PHUB_TDMEM68_ORIG_TD0 EQU 0x40007a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_ORIG_TD1\r
-CYDEV_PHUB_TDMEM68_ORIG_TD1 EQU 0x40007a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_BASE\r
-CYDEV_PHUB_TDMEM69_BASE EQU 0x40007a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_SIZE\r
-CYDEV_PHUB_TDMEM69_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_ORIG_TD0\r
-CYDEV_PHUB_TDMEM69_ORIG_TD0 EQU 0x40007a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_ORIG_TD1\r
-CYDEV_PHUB_TDMEM69_ORIG_TD1 EQU 0x40007a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_BASE\r
-CYDEV_PHUB_TDMEM70_BASE EQU 0x40007a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_SIZE\r
-CYDEV_PHUB_TDMEM70_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_ORIG_TD0\r
-CYDEV_PHUB_TDMEM70_ORIG_TD0 EQU 0x40007a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_ORIG_TD1\r
-CYDEV_PHUB_TDMEM70_ORIG_TD1 EQU 0x40007a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_BASE\r
-CYDEV_PHUB_TDMEM71_BASE EQU 0x40007a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_SIZE\r
-CYDEV_PHUB_TDMEM71_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_ORIG_TD0\r
-CYDEV_PHUB_TDMEM71_ORIG_TD0 EQU 0x40007a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_ORIG_TD1\r
-CYDEV_PHUB_TDMEM71_ORIG_TD1 EQU 0x40007a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_BASE\r
-CYDEV_PHUB_TDMEM72_BASE EQU 0x40007a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_SIZE\r
-CYDEV_PHUB_TDMEM72_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_ORIG_TD0\r
-CYDEV_PHUB_TDMEM72_ORIG_TD0 EQU 0x40007a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_ORIG_TD1\r
-CYDEV_PHUB_TDMEM72_ORIG_TD1 EQU 0x40007a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_BASE\r
-CYDEV_PHUB_TDMEM73_BASE EQU 0x40007a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_SIZE\r
-CYDEV_PHUB_TDMEM73_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_ORIG_TD0\r
-CYDEV_PHUB_TDMEM73_ORIG_TD0 EQU 0x40007a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_ORIG_TD1\r
-CYDEV_PHUB_TDMEM73_ORIG_TD1 EQU 0x40007a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_BASE\r
-CYDEV_PHUB_TDMEM74_BASE EQU 0x40007a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_SIZE\r
-CYDEV_PHUB_TDMEM74_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_ORIG_TD0\r
-CYDEV_PHUB_TDMEM74_ORIG_TD0 EQU 0x40007a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_ORIG_TD1\r
-CYDEV_PHUB_TDMEM74_ORIG_TD1 EQU 0x40007a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_BASE\r
-CYDEV_PHUB_TDMEM75_BASE EQU 0x40007a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_SIZE\r
-CYDEV_PHUB_TDMEM75_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_ORIG_TD0\r
-CYDEV_PHUB_TDMEM75_ORIG_TD0 EQU 0x40007a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_ORIG_TD1\r
-CYDEV_PHUB_TDMEM75_ORIG_TD1 EQU 0x40007a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_BASE\r
-CYDEV_PHUB_TDMEM76_BASE EQU 0x40007a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_SIZE\r
-CYDEV_PHUB_TDMEM76_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_ORIG_TD0\r
-CYDEV_PHUB_TDMEM76_ORIG_TD0 EQU 0x40007a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_ORIG_TD1\r
-CYDEV_PHUB_TDMEM76_ORIG_TD1 EQU 0x40007a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_BASE\r
-CYDEV_PHUB_TDMEM77_BASE EQU 0x40007a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_SIZE\r
-CYDEV_PHUB_TDMEM77_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_ORIG_TD0\r
-CYDEV_PHUB_TDMEM77_ORIG_TD0 EQU 0x40007a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_ORIG_TD1\r
-CYDEV_PHUB_TDMEM77_ORIG_TD1 EQU 0x40007a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_BASE\r
-CYDEV_PHUB_TDMEM78_BASE EQU 0x40007a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_SIZE\r
-CYDEV_PHUB_TDMEM78_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_ORIG_TD0\r
-CYDEV_PHUB_TDMEM78_ORIG_TD0 EQU 0x40007a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_ORIG_TD1\r
-CYDEV_PHUB_TDMEM78_ORIG_TD1 EQU 0x40007a74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_BASE\r
-CYDEV_PHUB_TDMEM79_BASE EQU 0x40007a78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_SIZE\r
-CYDEV_PHUB_TDMEM79_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_ORIG_TD0\r
-CYDEV_PHUB_TDMEM79_ORIG_TD0 EQU 0x40007a78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_ORIG_TD1\r
-CYDEV_PHUB_TDMEM79_ORIG_TD1 EQU 0x40007a7c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_BASE\r
-CYDEV_PHUB_TDMEM80_BASE EQU 0x40007a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_SIZE\r
-CYDEV_PHUB_TDMEM80_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_ORIG_TD0\r
-CYDEV_PHUB_TDMEM80_ORIG_TD0 EQU 0x40007a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_ORIG_TD1\r
-CYDEV_PHUB_TDMEM80_ORIG_TD1 EQU 0x40007a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_BASE\r
-CYDEV_PHUB_TDMEM81_BASE EQU 0x40007a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_SIZE\r
-CYDEV_PHUB_TDMEM81_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_ORIG_TD0\r
-CYDEV_PHUB_TDMEM81_ORIG_TD0 EQU 0x40007a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_ORIG_TD1\r
-CYDEV_PHUB_TDMEM81_ORIG_TD1 EQU 0x40007a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_BASE\r
-CYDEV_PHUB_TDMEM82_BASE EQU 0x40007a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_SIZE\r
-CYDEV_PHUB_TDMEM82_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_ORIG_TD0\r
-CYDEV_PHUB_TDMEM82_ORIG_TD0 EQU 0x40007a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_ORIG_TD1\r
-CYDEV_PHUB_TDMEM82_ORIG_TD1 EQU 0x40007a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_BASE\r
-CYDEV_PHUB_TDMEM83_BASE EQU 0x40007a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_SIZE\r
-CYDEV_PHUB_TDMEM83_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_ORIG_TD0\r
-CYDEV_PHUB_TDMEM83_ORIG_TD0 EQU 0x40007a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_ORIG_TD1\r
-CYDEV_PHUB_TDMEM83_ORIG_TD1 EQU 0x40007a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_BASE\r
-CYDEV_PHUB_TDMEM84_BASE EQU 0x40007aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_SIZE\r
-CYDEV_PHUB_TDMEM84_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_ORIG_TD0\r
-CYDEV_PHUB_TDMEM84_ORIG_TD0 EQU 0x40007aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_ORIG_TD1\r
-CYDEV_PHUB_TDMEM84_ORIG_TD1 EQU 0x40007aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_BASE\r
-CYDEV_PHUB_TDMEM85_BASE EQU 0x40007aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_SIZE\r
-CYDEV_PHUB_TDMEM85_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_ORIG_TD0\r
-CYDEV_PHUB_TDMEM85_ORIG_TD0 EQU 0x40007aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_ORIG_TD1\r
-CYDEV_PHUB_TDMEM85_ORIG_TD1 EQU 0x40007aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_BASE\r
-CYDEV_PHUB_TDMEM86_BASE EQU 0x40007ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_SIZE\r
-CYDEV_PHUB_TDMEM86_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_ORIG_TD0\r
-CYDEV_PHUB_TDMEM86_ORIG_TD0 EQU 0x40007ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_ORIG_TD1\r
-CYDEV_PHUB_TDMEM86_ORIG_TD1 EQU 0x40007ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_BASE\r
-CYDEV_PHUB_TDMEM87_BASE EQU 0x40007ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_SIZE\r
-CYDEV_PHUB_TDMEM87_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_ORIG_TD0\r
-CYDEV_PHUB_TDMEM87_ORIG_TD0 EQU 0x40007ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_ORIG_TD1\r
-CYDEV_PHUB_TDMEM87_ORIG_TD1 EQU 0x40007abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_BASE\r
-CYDEV_PHUB_TDMEM88_BASE EQU 0x40007ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_SIZE\r
-CYDEV_PHUB_TDMEM88_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_ORIG_TD0\r
-CYDEV_PHUB_TDMEM88_ORIG_TD0 EQU 0x40007ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_ORIG_TD1\r
-CYDEV_PHUB_TDMEM88_ORIG_TD1 EQU 0x40007ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_BASE\r
-CYDEV_PHUB_TDMEM89_BASE EQU 0x40007ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_SIZE\r
-CYDEV_PHUB_TDMEM89_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_ORIG_TD0\r
-CYDEV_PHUB_TDMEM89_ORIG_TD0 EQU 0x40007ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_ORIG_TD1\r
-CYDEV_PHUB_TDMEM89_ORIG_TD1 EQU 0x40007acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_BASE\r
-CYDEV_PHUB_TDMEM90_BASE EQU 0x40007ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_SIZE\r
-CYDEV_PHUB_TDMEM90_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_ORIG_TD0\r
-CYDEV_PHUB_TDMEM90_ORIG_TD0 EQU 0x40007ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_ORIG_TD1\r
-CYDEV_PHUB_TDMEM90_ORIG_TD1 EQU 0x40007ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_BASE\r
-CYDEV_PHUB_TDMEM91_BASE EQU 0x40007ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_SIZE\r
-CYDEV_PHUB_TDMEM91_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_ORIG_TD0\r
-CYDEV_PHUB_TDMEM91_ORIG_TD0 EQU 0x40007ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_ORIG_TD1\r
-CYDEV_PHUB_TDMEM91_ORIG_TD1 EQU 0x40007adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_BASE\r
-CYDEV_PHUB_TDMEM92_BASE EQU 0x40007ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_SIZE\r
-CYDEV_PHUB_TDMEM92_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_ORIG_TD0\r
-CYDEV_PHUB_TDMEM92_ORIG_TD0 EQU 0x40007ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_ORIG_TD1\r
-CYDEV_PHUB_TDMEM92_ORIG_TD1 EQU 0x40007ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_BASE\r
-CYDEV_PHUB_TDMEM93_BASE EQU 0x40007ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_SIZE\r
-CYDEV_PHUB_TDMEM93_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_ORIG_TD0\r
-CYDEV_PHUB_TDMEM93_ORIG_TD0 EQU 0x40007ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_ORIG_TD1\r
-CYDEV_PHUB_TDMEM93_ORIG_TD1 EQU 0x40007aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_BASE\r
-CYDEV_PHUB_TDMEM94_BASE EQU 0x40007af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_SIZE\r
-CYDEV_PHUB_TDMEM94_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_ORIG_TD0\r
-CYDEV_PHUB_TDMEM94_ORIG_TD0 EQU 0x40007af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_ORIG_TD1\r
-CYDEV_PHUB_TDMEM94_ORIG_TD1 EQU 0x40007af4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_BASE\r
-CYDEV_PHUB_TDMEM95_BASE EQU 0x40007af8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_SIZE\r
-CYDEV_PHUB_TDMEM95_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_ORIG_TD0\r
-CYDEV_PHUB_TDMEM95_ORIG_TD0 EQU 0x40007af8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_ORIG_TD1\r
-CYDEV_PHUB_TDMEM95_ORIG_TD1 EQU 0x40007afc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_BASE\r
-CYDEV_PHUB_TDMEM96_BASE EQU 0x40007b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_SIZE\r
-CYDEV_PHUB_TDMEM96_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_ORIG_TD0\r
-CYDEV_PHUB_TDMEM96_ORIG_TD0 EQU 0x40007b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_ORIG_TD1\r
-CYDEV_PHUB_TDMEM96_ORIG_TD1 EQU 0x40007b04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_BASE\r
-CYDEV_PHUB_TDMEM97_BASE EQU 0x40007b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_SIZE\r
-CYDEV_PHUB_TDMEM97_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_ORIG_TD0\r
-CYDEV_PHUB_TDMEM97_ORIG_TD0 EQU 0x40007b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_ORIG_TD1\r
-CYDEV_PHUB_TDMEM97_ORIG_TD1 EQU 0x40007b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_BASE\r
-CYDEV_PHUB_TDMEM98_BASE EQU 0x40007b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_SIZE\r
-CYDEV_PHUB_TDMEM98_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_ORIG_TD0\r
-CYDEV_PHUB_TDMEM98_ORIG_TD0 EQU 0x40007b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_ORIG_TD1\r
-CYDEV_PHUB_TDMEM98_ORIG_TD1 EQU 0x40007b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_BASE\r
-CYDEV_PHUB_TDMEM99_BASE EQU 0x40007b18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_SIZE\r
-CYDEV_PHUB_TDMEM99_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_ORIG_TD0\r
-CYDEV_PHUB_TDMEM99_ORIG_TD0 EQU 0x40007b18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_ORIG_TD1\r
-CYDEV_PHUB_TDMEM99_ORIG_TD1 EQU 0x40007b1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_BASE\r
-CYDEV_PHUB_TDMEM100_BASE EQU 0x40007b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_SIZE\r
-CYDEV_PHUB_TDMEM100_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_ORIG_TD0\r
-CYDEV_PHUB_TDMEM100_ORIG_TD0 EQU 0x40007b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_ORIG_TD1\r
-CYDEV_PHUB_TDMEM100_ORIG_TD1 EQU 0x40007b24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_BASE\r
-CYDEV_PHUB_TDMEM101_BASE EQU 0x40007b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_SIZE\r
-CYDEV_PHUB_TDMEM101_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_ORIG_TD0\r
-CYDEV_PHUB_TDMEM101_ORIG_TD0 EQU 0x40007b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_ORIG_TD1\r
-CYDEV_PHUB_TDMEM101_ORIG_TD1 EQU 0x40007b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_BASE\r
-CYDEV_PHUB_TDMEM102_BASE EQU 0x40007b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_SIZE\r
-CYDEV_PHUB_TDMEM102_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_ORIG_TD0\r
-CYDEV_PHUB_TDMEM102_ORIG_TD0 EQU 0x40007b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_ORIG_TD1\r
-CYDEV_PHUB_TDMEM102_ORIG_TD1 EQU 0x40007b34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_BASE\r
-CYDEV_PHUB_TDMEM103_BASE EQU 0x40007b38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_SIZE\r
-CYDEV_PHUB_TDMEM103_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_ORIG_TD0\r
-CYDEV_PHUB_TDMEM103_ORIG_TD0 EQU 0x40007b38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_ORIG_TD1\r
-CYDEV_PHUB_TDMEM103_ORIG_TD1 EQU 0x40007b3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_BASE\r
-CYDEV_PHUB_TDMEM104_BASE EQU 0x40007b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_SIZE\r
-CYDEV_PHUB_TDMEM104_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_ORIG_TD0\r
-CYDEV_PHUB_TDMEM104_ORIG_TD0 EQU 0x40007b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_ORIG_TD1\r
-CYDEV_PHUB_TDMEM104_ORIG_TD1 EQU 0x40007b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_BASE\r
-CYDEV_PHUB_TDMEM105_BASE EQU 0x40007b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_SIZE\r
-CYDEV_PHUB_TDMEM105_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_ORIG_TD0\r
-CYDEV_PHUB_TDMEM105_ORIG_TD0 EQU 0x40007b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_ORIG_TD1\r
-CYDEV_PHUB_TDMEM105_ORIG_TD1 EQU 0x40007b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_BASE\r
-CYDEV_PHUB_TDMEM106_BASE EQU 0x40007b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_SIZE\r
-CYDEV_PHUB_TDMEM106_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_ORIG_TD0\r
-CYDEV_PHUB_TDMEM106_ORIG_TD0 EQU 0x40007b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_ORIG_TD1\r
-CYDEV_PHUB_TDMEM106_ORIG_TD1 EQU 0x40007b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_BASE\r
-CYDEV_PHUB_TDMEM107_BASE EQU 0x40007b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_SIZE\r
-CYDEV_PHUB_TDMEM107_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_ORIG_TD0\r
-CYDEV_PHUB_TDMEM107_ORIG_TD0 EQU 0x40007b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_ORIG_TD1\r
-CYDEV_PHUB_TDMEM107_ORIG_TD1 EQU 0x40007b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_BASE\r
-CYDEV_PHUB_TDMEM108_BASE EQU 0x40007b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_SIZE\r
-CYDEV_PHUB_TDMEM108_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_ORIG_TD0\r
-CYDEV_PHUB_TDMEM108_ORIG_TD0 EQU 0x40007b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_ORIG_TD1\r
-CYDEV_PHUB_TDMEM108_ORIG_TD1 EQU 0x40007b64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_BASE\r
-CYDEV_PHUB_TDMEM109_BASE EQU 0x40007b68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_SIZE\r
-CYDEV_PHUB_TDMEM109_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_ORIG_TD0\r
-CYDEV_PHUB_TDMEM109_ORIG_TD0 EQU 0x40007b68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_ORIG_TD1\r
-CYDEV_PHUB_TDMEM109_ORIG_TD1 EQU 0x40007b6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_BASE\r
-CYDEV_PHUB_TDMEM110_BASE EQU 0x40007b70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_SIZE\r
-CYDEV_PHUB_TDMEM110_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_ORIG_TD0\r
-CYDEV_PHUB_TDMEM110_ORIG_TD0 EQU 0x40007b70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_ORIG_TD1\r
-CYDEV_PHUB_TDMEM110_ORIG_TD1 EQU 0x40007b74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_BASE\r
-CYDEV_PHUB_TDMEM111_BASE EQU 0x40007b78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_SIZE\r
-CYDEV_PHUB_TDMEM111_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_ORIG_TD0\r
-CYDEV_PHUB_TDMEM111_ORIG_TD0 EQU 0x40007b78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_ORIG_TD1\r
-CYDEV_PHUB_TDMEM111_ORIG_TD1 EQU 0x40007b7c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_BASE\r
-CYDEV_PHUB_TDMEM112_BASE EQU 0x40007b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_SIZE\r
-CYDEV_PHUB_TDMEM112_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_ORIG_TD0\r
-CYDEV_PHUB_TDMEM112_ORIG_TD0 EQU 0x40007b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_ORIG_TD1\r
-CYDEV_PHUB_TDMEM112_ORIG_TD1 EQU 0x40007b84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_BASE\r
-CYDEV_PHUB_TDMEM113_BASE EQU 0x40007b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_SIZE\r
-CYDEV_PHUB_TDMEM113_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_ORIG_TD0\r
-CYDEV_PHUB_TDMEM113_ORIG_TD0 EQU 0x40007b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_ORIG_TD1\r
-CYDEV_PHUB_TDMEM113_ORIG_TD1 EQU 0x40007b8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_BASE\r
-CYDEV_PHUB_TDMEM114_BASE EQU 0x40007b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_SIZE\r
-CYDEV_PHUB_TDMEM114_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_ORIG_TD0\r
-CYDEV_PHUB_TDMEM114_ORIG_TD0 EQU 0x40007b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_ORIG_TD1\r
-CYDEV_PHUB_TDMEM114_ORIG_TD1 EQU 0x40007b94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_BASE\r
-CYDEV_PHUB_TDMEM115_BASE EQU 0x40007b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_SIZE\r
-CYDEV_PHUB_TDMEM115_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_ORIG_TD0\r
-CYDEV_PHUB_TDMEM115_ORIG_TD0 EQU 0x40007b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_ORIG_TD1\r
-CYDEV_PHUB_TDMEM115_ORIG_TD1 EQU 0x40007b9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_BASE\r
-CYDEV_PHUB_TDMEM116_BASE EQU 0x40007ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_SIZE\r
-CYDEV_PHUB_TDMEM116_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_ORIG_TD0\r
-CYDEV_PHUB_TDMEM116_ORIG_TD0 EQU 0x40007ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_ORIG_TD1\r
-CYDEV_PHUB_TDMEM116_ORIG_TD1 EQU 0x40007ba4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_BASE\r
-CYDEV_PHUB_TDMEM117_BASE EQU 0x40007ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_SIZE\r
-CYDEV_PHUB_TDMEM117_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_ORIG_TD0\r
-CYDEV_PHUB_TDMEM117_ORIG_TD0 EQU 0x40007ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_ORIG_TD1\r
-CYDEV_PHUB_TDMEM117_ORIG_TD1 EQU 0x40007bac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_BASE\r
-CYDEV_PHUB_TDMEM118_BASE EQU 0x40007bb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_SIZE\r
-CYDEV_PHUB_TDMEM118_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_ORIG_TD0\r
-CYDEV_PHUB_TDMEM118_ORIG_TD0 EQU 0x40007bb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_ORIG_TD1\r
-CYDEV_PHUB_TDMEM118_ORIG_TD1 EQU 0x40007bb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_BASE\r
-CYDEV_PHUB_TDMEM119_BASE EQU 0x40007bb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_SIZE\r
-CYDEV_PHUB_TDMEM119_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_ORIG_TD0\r
-CYDEV_PHUB_TDMEM119_ORIG_TD0 EQU 0x40007bb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_ORIG_TD1\r
-CYDEV_PHUB_TDMEM119_ORIG_TD1 EQU 0x40007bbc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_BASE\r
-CYDEV_PHUB_TDMEM120_BASE EQU 0x40007bc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_SIZE\r
-CYDEV_PHUB_TDMEM120_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_ORIG_TD0\r
-CYDEV_PHUB_TDMEM120_ORIG_TD0 EQU 0x40007bc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_ORIG_TD1\r
-CYDEV_PHUB_TDMEM120_ORIG_TD1 EQU 0x40007bc4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_BASE\r
-CYDEV_PHUB_TDMEM121_BASE EQU 0x40007bc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_SIZE\r
-CYDEV_PHUB_TDMEM121_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_ORIG_TD0\r
-CYDEV_PHUB_TDMEM121_ORIG_TD0 EQU 0x40007bc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_ORIG_TD1\r
-CYDEV_PHUB_TDMEM121_ORIG_TD1 EQU 0x40007bcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_BASE\r
-CYDEV_PHUB_TDMEM122_BASE EQU 0x40007bd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_SIZE\r
-CYDEV_PHUB_TDMEM122_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_ORIG_TD0\r
-CYDEV_PHUB_TDMEM122_ORIG_TD0 EQU 0x40007bd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_ORIG_TD1\r
-CYDEV_PHUB_TDMEM122_ORIG_TD1 EQU 0x40007bd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_BASE\r
-CYDEV_PHUB_TDMEM123_BASE EQU 0x40007bd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_SIZE\r
-CYDEV_PHUB_TDMEM123_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_ORIG_TD0\r
-CYDEV_PHUB_TDMEM123_ORIG_TD0 EQU 0x40007bd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_ORIG_TD1\r
-CYDEV_PHUB_TDMEM123_ORIG_TD1 EQU 0x40007bdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_BASE\r
-CYDEV_PHUB_TDMEM124_BASE EQU 0x40007be0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_SIZE\r
-CYDEV_PHUB_TDMEM124_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_ORIG_TD0\r
-CYDEV_PHUB_TDMEM124_ORIG_TD0 EQU 0x40007be0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_ORIG_TD1\r
-CYDEV_PHUB_TDMEM124_ORIG_TD1 EQU 0x40007be4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_BASE\r
-CYDEV_PHUB_TDMEM125_BASE EQU 0x40007be8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_SIZE\r
-CYDEV_PHUB_TDMEM125_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_ORIG_TD0\r
-CYDEV_PHUB_TDMEM125_ORIG_TD0 EQU 0x40007be8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_ORIG_TD1\r
-CYDEV_PHUB_TDMEM125_ORIG_TD1 EQU 0x40007bec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_BASE\r
-CYDEV_PHUB_TDMEM126_BASE EQU 0x40007bf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_SIZE\r
-CYDEV_PHUB_TDMEM126_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_ORIG_TD0\r
-CYDEV_PHUB_TDMEM126_ORIG_TD0 EQU 0x40007bf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_ORIG_TD1\r
-CYDEV_PHUB_TDMEM126_ORIG_TD1 EQU 0x40007bf4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_BASE\r
-CYDEV_PHUB_TDMEM127_BASE EQU 0x40007bf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_SIZE\r
-CYDEV_PHUB_TDMEM127_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_ORIG_TD0\r
-CYDEV_PHUB_TDMEM127_ORIG_TD0 EQU 0x40007bf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_ORIG_TD1\r
-CYDEV_PHUB_TDMEM127_ORIG_TD1 EQU 0x40007bfc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_BASE\r
-CYDEV_EE_BASE EQU 0x40008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_SIZE\r
-CYDEV_EE_SIZE EQU 0x00000800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_DATA_MBASE\r
-CYDEV_EE_DATA_MBASE EQU 0x40008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_DATA_MSIZE\r
-CYDEV_EE_DATA_MSIZE EQU 0x00000800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_BASE\r
-CYDEV_CAN0_BASE EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_SIZE\r
-CYDEV_CAN0_SIZE EQU 0x000002a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_BASE\r
-CYDEV_CAN0_CSR_BASE EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_SIZE\r
-CYDEV_CAN0_CSR_SIZE EQU 0x00000018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_INT_SR\r
-CYDEV_CAN0_CSR_INT_SR EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_INT_EN\r
-CYDEV_CAN0_CSR_INT_EN EQU 0x4000a004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_BUF_SR\r
-CYDEV_CAN0_CSR_BUF_SR EQU 0x4000a008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_ERR_SR\r
-CYDEV_CAN0_CSR_ERR_SR EQU 0x4000a00c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_CMD\r
-CYDEV_CAN0_CSR_CMD EQU 0x4000a010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_CFG\r
-CYDEV_CAN0_CSR_CFG EQU 0x4000a014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_BASE\r
-CYDEV_CAN0_TX0_BASE EQU 0x4000a020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_SIZE\r
-CYDEV_CAN0_TX0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_CMD\r
-CYDEV_CAN0_TX0_CMD EQU 0x4000a020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_ID\r
-CYDEV_CAN0_TX0_ID EQU 0x4000a024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_DH\r
-CYDEV_CAN0_TX0_DH EQU 0x4000a028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_DL\r
-CYDEV_CAN0_TX0_DL EQU 0x4000a02c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_BASE\r
-CYDEV_CAN0_TX1_BASE EQU 0x4000a030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_SIZE\r
-CYDEV_CAN0_TX1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_CMD\r
-CYDEV_CAN0_TX1_CMD EQU 0x4000a030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_ID\r
-CYDEV_CAN0_TX1_ID EQU 0x4000a034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_DH\r
-CYDEV_CAN0_TX1_DH EQU 0x4000a038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_DL\r
-CYDEV_CAN0_TX1_DL EQU 0x4000a03c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_BASE\r
-CYDEV_CAN0_TX2_BASE EQU 0x4000a040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_SIZE\r
-CYDEV_CAN0_TX2_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_CMD\r
-CYDEV_CAN0_TX2_CMD EQU 0x4000a040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_ID\r
-CYDEV_CAN0_TX2_ID EQU 0x4000a044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_DH\r
-CYDEV_CAN0_TX2_DH EQU 0x4000a048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_DL\r
-CYDEV_CAN0_TX2_DL EQU 0x4000a04c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_BASE\r
-CYDEV_CAN0_TX3_BASE EQU 0x4000a050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_SIZE\r
-CYDEV_CAN0_TX3_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_CMD\r
-CYDEV_CAN0_TX3_CMD EQU 0x4000a050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_ID\r
-CYDEV_CAN0_TX3_ID EQU 0x4000a054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_DH\r
-CYDEV_CAN0_TX3_DH EQU 0x4000a058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_DL\r
-CYDEV_CAN0_TX3_DL EQU 0x4000a05c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_BASE\r
-CYDEV_CAN0_TX4_BASE EQU 0x4000a060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_SIZE\r
-CYDEV_CAN0_TX4_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_CMD\r
-CYDEV_CAN0_TX4_CMD EQU 0x4000a060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_ID\r
-CYDEV_CAN0_TX4_ID EQU 0x4000a064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_DH\r
-CYDEV_CAN0_TX4_DH EQU 0x4000a068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_DL\r
-CYDEV_CAN0_TX4_DL EQU 0x4000a06c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_BASE\r
-CYDEV_CAN0_TX5_BASE EQU 0x4000a070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_SIZE\r
-CYDEV_CAN0_TX5_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_CMD\r
-CYDEV_CAN0_TX5_CMD EQU 0x4000a070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_ID\r
-CYDEV_CAN0_TX5_ID EQU 0x4000a074\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_DH\r
-CYDEV_CAN0_TX5_DH EQU 0x4000a078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_DL\r
-CYDEV_CAN0_TX5_DL EQU 0x4000a07c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_BASE\r
-CYDEV_CAN0_TX6_BASE EQU 0x4000a080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_SIZE\r
-CYDEV_CAN0_TX6_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_CMD\r
-CYDEV_CAN0_TX6_CMD EQU 0x4000a080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_ID\r
-CYDEV_CAN0_TX6_ID EQU 0x4000a084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_DH\r
-CYDEV_CAN0_TX6_DH EQU 0x4000a088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_DL\r
-CYDEV_CAN0_TX6_DL EQU 0x4000a08c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_BASE\r
-CYDEV_CAN0_TX7_BASE EQU 0x4000a090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_SIZE\r
-CYDEV_CAN0_TX7_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_CMD\r
-CYDEV_CAN0_TX7_CMD EQU 0x4000a090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_ID\r
-CYDEV_CAN0_TX7_ID EQU 0x4000a094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_DH\r
-CYDEV_CAN0_TX7_DH EQU 0x4000a098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_DL\r
-CYDEV_CAN0_TX7_DL EQU 0x4000a09c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_BASE\r
-CYDEV_CAN0_RX0_BASE EQU 0x4000a0a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_SIZE\r
-CYDEV_CAN0_RX0_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_CMD\r
-CYDEV_CAN0_RX0_CMD EQU 0x4000a0a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_ID\r
-CYDEV_CAN0_RX0_ID EQU 0x4000a0a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_DH\r
-CYDEV_CAN0_RX0_DH EQU 0x4000a0a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_DL\r
-CYDEV_CAN0_RX0_DL EQU 0x4000a0ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_AMR\r
-CYDEV_CAN0_RX0_AMR EQU 0x4000a0b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_ACR\r
-CYDEV_CAN0_RX0_ACR EQU 0x4000a0b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_AMRD\r
-CYDEV_CAN0_RX0_AMRD EQU 0x4000a0b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_ACRD\r
-CYDEV_CAN0_RX0_ACRD EQU 0x4000a0bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_BASE\r
-CYDEV_CAN0_RX1_BASE EQU 0x4000a0c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_SIZE\r
-CYDEV_CAN0_RX1_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_CMD\r
-CYDEV_CAN0_RX1_CMD EQU 0x4000a0c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_ID\r
-CYDEV_CAN0_RX1_ID EQU 0x4000a0c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_DH\r
-CYDEV_CAN0_RX1_DH EQU 0x4000a0c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_DL\r
-CYDEV_CAN0_RX1_DL EQU 0x4000a0cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_AMR\r
-CYDEV_CAN0_RX1_AMR EQU 0x4000a0d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_ACR\r
-CYDEV_CAN0_RX1_ACR EQU 0x4000a0d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_AMRD\r
-CYDEV_CAN0_RX1_AMRD EQU 0x4000a0d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_ACRD\r
-CYDEV_CAN0_RX1_ACRD EQU 0x4000a0dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_BASE\r
-CYDEV_CAN0_RX2_BASE EQU 0x4000a0e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_SIZE\r
-CYDEV_CAN0_RX2_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_CMD\r
-CYDEV_CAN0_RX2_CMD EQU 0x4000a0e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_ID\r
-CYDEV_CAN0_RX2_ID EQU 0x4000a0e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_DH\r
-CYDEV_CAN0_RX2_DH EQU 0x4000a0e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_DL\r
-CYDEV_CAN0_RX2_DL EQU 0x4000a0ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_AMR\r
-CYDEV_CAN0_RX2_AMR EQU 0x4000a0f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_ACR\r
-CYDEV_CAN0_RX2_ACR EQU 0x4000a0f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_AMRD\r
-CYDEV_CAN0_RX2_AMRD EQU 0x4000a0f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_ACRD\r
-CYDEV_CAN0_RX2_ACRD EQU 0x4000a0fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_BASE\r
-CYDEV_CAN0_RX3_BASE EQU 0x4000a100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_SIZE\r
-CYDEV_CAN0_RX3_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_CMD\r
-CYDEV_CAN0_RX3_CMD EQU 0x4000a100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_ID\r
-CYDEV_CAN0_RX3_ID EQU 0x4000a104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_DH\r
-CYDEV_CAN0_RX3_DH EQU 0x4000a108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_DL\r
-CYDEV_CAN0_RX3_DL EQU 0x4000a10c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_AMR\r
-CYDEV_CAN0_RX3_AMR EQU 0x4000a110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_ACR\r
-CYDEV_CAN0_RX3_ACR EQU 0x4000a114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_AMRD\r
-CYDEV_CAN0_RX3_AMRD EQU 0x4000a118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_ACRD\r
-CYDEV_CAN0_RX3_ACRD EQU 0x4000a11c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_BASE\r
-CYDEV_CAN0_RX4_BASE EQU 0x4000a120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_SIZE\r
-CYDEV_CAN0_RX4_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_CMD\r
-CYDEV_CAN0_RX4_CMD EQU 0x4000a120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_ID\r
-CYDEV_CAN0_RX4_ID EQU 0x4000a124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_DH\r
-CYDEV_CAN0_RX4_DH EQU 0x4000a128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_DL\r
-CYDEV_CAN0_RX4_DL EQU 0x4000a12c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_AMR\r
-CYDEV_CAN0_RX4_AMR EQU 0x4000a130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_ACR\r
-CYDEV_CAN0_RX4_ACR EQU 0x4000a134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_AMRD\r
-CYDEV_CAN0_RX4_AMRD EQU 0x4000a138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_ACRD\r
-CYDEV_CAN0_RX4_ACRD EQU 0x4000a13c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_BASE\r
-CYDEV_CAN0_RX5_BASE EQU 0x4000a140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_SIZE\r
-CYDEV_CAN0_RX5_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_CMD\r
-CYDEV_CAN0_RX5_CMD EQU 0x4000a140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_ID\r
-CYDEV_CAN0_RX5_ID EQU 0x4000a144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_DH\r
-CYDEV_CAN0_RX5_DH EQU 0x4000a148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_DL\r
-CYDEV_CAN0_RX5_DL EQU 0x4000a14c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_AMR\r
-CYDEV_CAN0_RX5_AMR EQU 0x4000a150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_ACR\r
-CYDEV_CAN0_RX5_ACR EQU 0x4000a154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_AMRD\r
-CYDEV_CAN0_RX5_AMRD EQU 0x4000a158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_ACRD\r
-CYDEV_CAN0_RX5_ACRD EQU 0x4000a15c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_BASE\r
-CYDEV_CAN0_RX6_BASE EQU 0x4000a160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_SIZE\r
-CYDEV_CAN0_RX6_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_CMD\r
-CYDEV_CAN0_RX6_CMD EQU 0x4000a160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_ID\r
-CYDEV_CAN0_RX6_ID EQU 0x4000a164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_DH\r
-CYDEV_CAN0_RX6_DH EQU 0x4000a168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_DL\r
-CYDEV_CAN0_RX6_DL EQU 0x4000a16c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_AMR\r
-CYDEV_CAN0_RX6_AMR EQU 0x4000a170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_ACR\r
-CYDEV_CAN0_RX6_ACR EQU 0x4000a174\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_AMRD\r
-CYDEV_CAN0_RX6_AMRD EQU 0x4000a178\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_ACRD\r
-CYDEV_CAN0_RX6_ACRD EQU 0x4000a17c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_BASE\r
-CYDEV_CAN0_RX7_BASE EQU 0x4000a180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_SIZE\r
-CYDEV_CAN0_RX7_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_CMD\r
-CYDEV_CAN0_RX7_CMD EQU 0x4000a180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_ID\r
-CYDEV_CAN0_RX7_ID EQU 0x4000a184\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_DH\r
-CYDEV_CAN0_RX7_DH EQU 0x4000a188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_DL\r
-CYDEV_CAN0_RX7_DL EQU 0x4000a18c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_AMR\r
-CYDEV_CAN0_RX7_AMR EQU 0x4000a190\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_ACR\r
-CYDEV_CAN0_RX7_ACR EQU 0x4000a194\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_AMRD\r
-CYDEV_CAN0_RX7_AMRD EQU 0x4000a198\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_ACRD\r
-CYDEV_CAN0_RX7_ACRD EQU 0x4000a19c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_BASE\r
-CYDEV_CAN0_RX8_BASE EQU 0x4000a1a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_SIZE\r
-CYDEV_CAN0_RX8_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_CMD\r
-CYDEV_CAN0_RX8_CMD EQU 0x4000a1a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_ID\r
-CYDEV_CAN0_RX8_ID EQU 0x4000a1a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_DH\r
-CYDEV_CAN0_RX8_DH EQU 0x4000a1a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_DL\r
-CYDEV_CAN0_RX8_DL EQU 0x4000a1ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_AMR\r
-CYDEV_CAN0_RX8_AMR EQU 0x4000a1b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_ACR\r
-CYDEV_CAN0_RX8_ACR EQU 0x4000a1b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_AMRD\r
-CYDEV_CAN0_RX8_AMRD EQU 0x4000a1b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_ACRD\r
-CYDEV_CAN0_RX8_ACRD EQU 0x4000a1bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_BASE\r
-CYDEV_CAN0_RX9_BASE EQU 0x4000a1c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_SIZE\r
-CYDEV_CAN0_RX9_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_CMD\r
-CYDEV_CAN0_RX9_CMD EQU 0x4000a1c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_ID\r
-CYDEV_CAN0_RX9_ID EQU 0x4000a1c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_DH\r
-CYDEV_CAN0_RX9_DH EQU 0x4000a1c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_DL\r
-CYDEV_CAN0_RX9_DL EQU 0x4000a1cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_AMR\r
-CYDEV_CAN0_RX9_AMR EQU 0x4000a1d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_ACR\r
-CYDEV_CAN0_RX9_ACR EQU 0x4000a1d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_AMRD\r
-CYDEV_CAN0_RX9_AMRD EQU 0x4000a1d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_ACRD\r
-CYDEV_CAN0_RX9_ACRD EQU 0x4000a1dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_BASE\r
-CYDEV_CAN0_RX10_BASE EQU 0x4000a1e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_SIZE\r
-CYDEV_CAN0_RX10_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_CMD\r
-CYDEV_CAN0_RX10_CMD EQU 0x4000a1e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_ID\r
-CYDEV_CAN0_RX10_ID EQU 0x4000a1e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_DH\r
-CYDEV_CAN0_RX10_DH EQU 0x4000a1e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_DL\r
-CYDEV_CAN0_RX10_DL EQU 0x4000a1ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_AMR\r
-CYDEV_CAN0_RX10_AMR EQU 0x4000a1f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_ACR\r
-CYDEV_CAN0_RX10_ACR EQU 0x4000a1f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_AMRD\r
-CYDEV_CAN0_RX10_AMRD EQU 0x4000a1f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_ACRD\r
-CYDEV_CAN0_RX10_ACRD EQU 0x4000a1fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_BASE\r
-CYDEV_CAN0_RX11_BASE EQU 0x4000a200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_SIZE\r
-CYDEV_CAN0_RX11_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_CMD\r
-CYDEV_CAN0_RX11_CMD EQU 0x4000a200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_ID\r
-CYDEV_CAN0_RX11_ID EQU 0x4000a204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_DH\r
-CYDEV_CAN0_RX11_DH EQU 0x4000a208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_DL\r
-CYDEV_CAN0_RX11_DL EQU 0x4000a20c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_AMR\r
-CYDEV_CAN0_RX11_AMR EQU 0x4000a210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_ACR\r
-CYDEV_CAN0_RX11_ACR EQU 0x4000a214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_AMRD\r
-CYDEV_CAN0_RX11_AMRD EQU 0x4000a218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_ACRD\r
-CYDEV_CAN0_RX11_ACRD EQU 0x4000a21c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_BASE\r
-CYDEV_CAN0_RX12_BASE EQU 0x4000a220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_SIZE\r
-CYDEV_CAN0_RX12_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_CMD\r
-CYDEV_CAN0_RX12_CMD EQU 0x4000a220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_ID\r
-CYDEV_CAN0_RX12_ID EQU 0x4000a224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_DH\r
-CYDEV_CAN0_RX12_DH EQU 0x4000a228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_DL\r
-CYDEV_CAN0_RX12_DL EQU 0x4000a22c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_AMR\r
-CYDEV_CAN0_RX12_AMR EQU 0x4000a230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_ACR\r
-CYDEV_CAN0_RX12_ACR EQU 0x4000a234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_AMRD\r
-CYDEV_CAN0_RX12_AMRD EQU 0x4000a238\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_ACRD\r
-CYDEV_CAN0_RX12_ACRD EQU 0x4000a23c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_BASE\r
-CYDEV_CAN0_RX13_BASE EQU 0x4000a240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_SIZE\r
-CYDEV_CAN0_RX13_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_CMD\r
-CYDEV_CAN0_RX13_CMD EQU 0x4000a240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_ID\r
-CYDEV_CAN0_RX13_ID EQU 0x4000a244\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_DH\r
-CYDEV_CAN0_RX13_DH EQU 0x4000a248\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_DL\r
-CYDEV_CAN0_RX13_DL EQU 0x4000a24c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_AMR\r
-CYDEV_CAN0_RX13_AMR EQU 0x4000a250\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_ACR\r
-CYDEV_CAN0_RX13_ACR EQU 0x4000a254\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_AMRD\r
-CYDEV_CAN0_RX13_AMRD EQU 0x4000a258\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_ACRD\r
-CYDEV_CAN0_RX13_ACRD EQU 0x4000a25c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_BASE\r
-CYDEV_CAN0_RX14_BASE EQU 0x4000a260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_SIZE\r
-CYDEV_CAN0_RX14_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_CMD\r
-CYDEV_CAN0_RX14_CMD EQU 0x4000a260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_ID\r
-CYDEV_CAN0_RX14_ID EQU 0x4000a264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_DH\r
-CYDEV_CAN0_RX14_DH EQU 0x4000a268\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_DL\r
-CYDEV_CAN0_RX14_DL EQU 0x4000a26c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_AMR\r
-CYDEV_CAN0_RX14_AMR EQU 0x4000a270\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_ACR\r
-CYDEV_CAN0_RX14_ACR EQU 0x4000a274\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_AMRD\r
-CYDEV_CAN0_RX14_AMRD EQU 0x4000a278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_ACRD\r
-CYDEV_CAN0_RX14_ACRD EQU 0x4000a27c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_BASE\r
-CYDEV_CAN0_RX15_BASE EQU 0x4000a280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_SIZE\r
-CYDEV_CAN0_RX15_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_CMD\r
-CYDEV_CAN0_RX15_CMD EQU 0x4000a280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_ID\r
-CYDEV_CAN0_RX15_ID EQU 0x4000a284\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_DH\r
-CYDEV_CAN0_RX15_DH EQU 0x4000a288\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_DL\r
-CYDEV_CAN0_RX15_DL EQU 0x4000a28c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_AMR\r
-CYDEV_CAN0_RX15_AMR EQU 0x4000a290\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_ACR\r
-CYDEV_CAN0_RX15_ACR EQU 0x4000a294\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_AMRD\r
-CYDEV_CAN0_RX15_AMRD EQU 0x4000a298\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_ACRD\r
-CYDEV_CAN0_RX15_ACRD EQU 0x4000a29c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_BASE\r
-CYDEV_DFB0_BASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_SIZE\r
-CYDEV_DFB0_SIZE EQU 0x000007b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_BASE\r
-CYDEV_DFB0_DPA_SRAM_BASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_SIZE\r
-CYDEV_DFB0_DPA_SRAM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_DATA_MBASE\r
-CYDEV_DFB0_DPA_SRAM_DATA_MBASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_DPA_SRAM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_BASE\r
-CYDEV_DFB0_DPB_SRAM_BASE EQU 0x4000c200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_SIZE\r
-CYDEV_DFB0_DPB_SRAM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_DATA_MBASE\r
-CYDEV_DFB0_DPB_SRAM_DATA_MBASE EQU 0x4000c200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_DPB_SRAM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_BASE\r
-CYDEV_DFB0_CSA_SRAM_BASE EQU 0x4000c400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_SIZE\r
-CYDEV_DFB0_CSA_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_DATA_MBASE\r
-CYDEV_DFB0_CSA_SRAM_DATA_MBASE EQU 0x4000c400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_CSA_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_BASE\r
-CYDEV_DFB0_CSB_SRAM_BASE EQU 0x4000c500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_SIZE\r
-CYDEV_DFB0_CSB_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_DATA_MBASE\r
-CYDEV_DFB0_CSB_SRAM_DATA_MBASE EQU 0x4000c500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_CSB_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_BASE\r
-CYDEV_DFB0_FSM_SRAM_BASE EQU 0x4000c600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_SIZE\r
-CYDEV_DFB0_FSM_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_DATA_MBASE\r
-CYDEV_DFB0_FSM_SRAM_DATA_MBASE EQU 0x4000c600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_FSM_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_BASE\r
-CYDEV_DFB0_ACU_SRAM_BASE EQU 0x4000c700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_SIZE\r
-CYDEV_DFB0_ACU_SRAM_SIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_DATA_MBASE\r
-CYDEV_DFB0_ACU_SRAM_DATA_MBASE EQU 0x4000c700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_DATA_MSIZE\r
-CYDEV_DFB0_ACU_SRAM_DATA_MSIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CR\r
-CYDEV_DFB0_CR EQU 0x4000c780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_SR\r
-CYDEV_DFB0_SR EQU 0x4000c784\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_RAM_EN\r
-CYDEV_DFB0_RAM_EN EQU 0x4000c788\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_RAM_DIR\r
-CYDEV_DFB0_RAM_DIR EQU 0x4000c78c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_SEMA\r
-CYDEV_DFB0_SEMA EQU 0x4000c790\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DSI_CTRL\r
-CYDEV_DFB0_DSI_CTRL EQU 0x4000c794\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_INT_CTRL\r
-CYDEV_DFB0_INT_CTRL EQU 0x4000c798\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DMA_CTRL\r
-CYDEV_DFB0_DMA_CTRL EQU 0x4000c79c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEA\r
-CYDEV_DFB0_STAGEA EQU 0x4000c7a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEAM\r
-CYDEV_DFB0_STAGEAM EQU 0x4000c7a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEAH\r
-CYDEV_DFB0_STAGEAH EQU 0x4000c7a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEB\r
-CYDEV_DFB0_STAGEB EQU 0x4000c7a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEBM\r
-CYDEV_DFB0_STAGEBM EQU 0x4000c7a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_STAGEBH\r
-CYDEV_DFB0_STAGEBH EQU 0x4000c7a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDA\r
-CYDEV_DFB0_HOLDA EQU 0x4000c7a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDAM\r
-CYDEV_DFB0_HOLDAM EQU 0x4000c7a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDAH\r
-CYDEV_DFB0_HOLDAH EQU 0x4000c7aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDAS\r
-CYDEV_DFB0_HOLDAS EQU 0x4000c7ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDB\r
-CYDEV_DFB0_HOLDB EQU 0x4000c7ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDBM\r
-CYDEV_DFB0_HOLDBM EQU 0x4000c7ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDBH\r
-CYDEV_DFB0_HOLDBH EQU 0x4000c7ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_HOLDBS\r
-CYDEV_DFB0_HOLDBS EQU 0x4000c7af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_COHER\r
-CYDEV_DFB0_COHER EQU 0x4000c7b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DALIGN\r
-CYDEV_DFB0_DALIGN EQU 0x4000c7b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BASE\r
-CYDEV_UCFG_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_SIZE\r
-CYDEV_UCFG_SIZE EQU 0x00005040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_BASE\r
-CYDEV_UCFG_B0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_SIZE\r
-CYDEV_UCFG_B0_SIZE EQU 0x00000fef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_BASE\r
-CYDEV_UCFG_B0_P0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_SIZE\r
-CYDEV_UCFG_B0_P0_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_BASE\r
-CYDEV_UCFG_B0_P0_U0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_SIZE\r
-CYDEV_UCFG_B0_P0_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT0 EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT1 EQU 0x40010004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT2 EQU 0x40010008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT3 EQU 0x4001000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT4 EQU 0x40010010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT5 EQU 0x40010014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT6 EQU 0x40010018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT7 EQU 0x4001001c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT8 EQU 0x40010020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT9 EQU 0x40010024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT10 EQU 0x40010028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P0_U0_PLD_IT11 EQU 0x4001002c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P0_U0_PLD_ORT0 EQU 0x40010030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P0_U0_PLD_ORT1 EQU 0x40010032\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P0_U0_PLD_ORT2 EQU 0x40010034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P0_U0_PLD_ORT3 EQU 0x40010036\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P0_U0_MC_CFG_CEN_CONST EQU 0x40010038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P0_U0_MC_CFG_XORFB EQU 0x4001003a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P0_U0_MC_CFG_SET_RESET EQU 0x4001003c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P0_U0_MC_CFG_BYPASS EQU 0x4001003e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG0\r
-CYDEV_UCFG_B0_P0_U0_CFG0 EQU 0x40010040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG1\r
-CYDEV_UCFG_B0_P0_U0_CFG1 EQU 0x40010041\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG2\r
-CYDEV_UCFG_B0_P0_U0_CFG2 EQU 0x40010042\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG3\r
-CYDEV_UCFG_B0_P0_U0_CFG3 EQU 0x40010043\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG4\r
-CYDEV_UCFG_B0_P0_U0_CFG4 EQU 0x40010044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG5\r
-CYDEV_UCFG_B0_P0_U0_CFG5 EQU 0x40010045\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG6\r
-CYDEV_UCFG_B0_P0_U0_CFG6 EQU 0x40010046\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG7\r
-CYDEV_UCFG_B0_P0_U0_CFG7 EQU 0x40010047\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG8\r
-CYDEV_UCFG_B0_P0_U0_CFG8 EQU 0x40010048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG9\r
-CYDEV_UCFG_B0_P0_U0_CFG9 EQU 0x40010049\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG10\r
-CYDEV_UCFG_B0_P0_U0_CFG10 EQU 0x4001004a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG11\r
-CYDEV_UCFG_B0_P0_U0_CFG11 EQU 0x4001004b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG12\r
-CYDEV_UCFG_B0_P0_U0_CFG12 EQU 0x4001004c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG13\r
-CYDEV_UCFG_B0_P0_U0_CFG13 EQU 0x4001004d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG14\r
-CYDEV_UCFG_B0_P0_U0_CFG14 EQU 0x4001004e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG15\r
-CYDEV_UCFG_B0_P0_U0_CFG15 EQU 0x4001004f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG16\r
-CYDEV_UCFG_B0_P0_U0_CFG16 EQU 0x40010050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG17\r
-CYDEV_UCFG_B0_P0_U0_CFG17 EQU 0x40010051\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG18\r
-CYDEV_UCFG_B0_P0_U0_CFG18 EQU 0x40010052\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG19\r
-CYDEV_UCFG_B0_P0_U0_CFG19 EQU 0x40010053\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG20\r
-CYDEV_UCFG_B0_P0_U0_CFG20 EQU 0x40010054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG21\r
-CYDEV_UCFG_B0_P0_U0_CFG21 EQU 0x40010055\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG22\r
-CYDEV_UCFG_B0_P0_U0_CFG22 EQU 0x40010056\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG23\r
-CYDEV_UCFG_B0_P0_U0_CFG23 EQU 0x40010057\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG24\r
-CYDEV_UCFG_B0_P0_U0_CFG24 EQU 0x40010058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG25\r
-CYDEV_UCFG_B0_P0_U0_CFG25 EQU 0x40010059\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG26\r
-CYDEV_UCFG_B0_P0_U0_CFG26 EQU 0x4001005a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG27\r
-CYDEV_UCFG_B0_P0_U0_CFG27 EQU 0x4001005b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG28\r
-CYDEV_UCFG_B0_P0_U0_CFG28 EQU 0x4001005c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG29\r
-CYDEV_UCFG_B0_P0_U0_CFG29 EQU 0x4001005d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG30\r
-CYDEV_UCFG_B0_P0_U0_CFG30 EQU 0x4001005e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_CFG31\r
-CYDEV_UCFG_B0_P0_U0_CFG31 EQU 0x4001005f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG0\r
-CYDEV_UCFG_B0_P0_U0_DCFG0 EQU 0x40010060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG1\r
-CYDEV_UCFG_B0_P0_U0_DCFG1 EQU 0x40010062\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG2\r
-CYDEV_UCFG_B0_P0_U0_DCFG2 EQU 0x40010064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG3\r
-CYDEV_UCFG_B0_P0_U0_DCFG3 EQU 0x40010066\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG4\r
-CYDEV_UCFG_B0_P0_U0_DCFG4 EQU 0x40010068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG5\r
-CYDEV_UCFG_B0_P0_U0_DCFG5 EQU 0x4001006a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG6\r
-CYDEV_UCFG_B0_P0_U0_DCFG6 EQU 0x4001006c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_DCFG7\r
-CYDEV_UCFG_B0_P0_U0_DCFG7 EQU 0x4001006e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_BASE\r
-CYDEV_UCFG_B0_P0_U1_BASE EQU 0x40010080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_SIZE\r
-CYDEV_UCFG_B0_P0_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT0 EQU 0x40010080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT1 EQU 0x40010084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT2 EQU 0x40010088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT3 EQU 0x4001008c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT4 EQU 0x40010090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT5 EQU 0x40010094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT6 EQU 0x40010098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT7 EQU 0x4001009c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT8 EQU 0x400100a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT9 EQU 0x400100a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT10 EQU 0x400100a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P0_U1_PLD_IT11 EQU 0x400100ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P0_U1_PLD_ORT0 EQU 0x400100b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P0_U1_PLD_ORT1 EQU 0x400100b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P0_U1_PLD_ORT2 EQU 0x400100b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P0_U1_PLD_ORT3 EQU 0x400100b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P0_U1_MC_CFG_CEN_CONST EQU 0x400100b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P0_U1_MC_CFG_XORFB EQU 0x400100ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P0_U1_MC_CFG_SET_RESET EQU 0x400100bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P0_U1_MC_CFG_BYPASS EQU 0x400100be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG0\r
-CYDEV_UCFG_B0_P0_U1_CFG0 EQU 0x400100c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG1\r
-CYDEV_UCFG_B0_P0_U1_CFG1 EQU 0x400100c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG2\r
-CYDEV_UCFG_B0_P0_U1_CFG2 EQU 0x400100c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG3\r
-CYDEV_UCFG_B0_P0_U1_CFG3 EQU 0x400100c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG4\r
-CYDEV_UCFG_B0_P0_U1_CFG4 EQU 0x400100c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG5\r
-CYDEV_UCFG_B0_P0_U1_CFG5 EQU 0x400100c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG6\r
-CYDEV_UCFG_B0_P0_U1_CFG6 EQU 0x400100c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG7\r
-CYDEV_UCFG_B0_P0_U1_CFG7 EQU 0x400100c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG8\r
-CYDEV_UCFG_B0_P0_U1_CFG8 EQU 0x400100c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG9\r
-CYDEV_UCFG_B0_P0_U1_CFG9 EQU 0x400100c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG10\r
-CYDEV_UCFG_B0_P0_U1_CFG10 EQU 0x400100ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG11\r
-CYDEV_UCFG_B0_P0_U1_CFG11 EQU 0x400100cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG12\r
-CYDEV_UCFG_B0_P0_U1_CFG12 EQU 0x400100cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG13\r
-CYDEV_UCFG_B0_P0_U1_CFG13 EQU 0x400100cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG14\r
-CYDEV_UCFG_B0_P0_U1_CFG14 EQU 0x400100ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG15\r
-CYDEV_UCFG_B0_P0_U1_CFG15 EQU 0x400100cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG16\r
-CYDEV_UCFG_B0_P0_U1_CFG16 EQU 0x400100d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG17\r
-CYDEV_UCFG_B0_P0_U1_CFG17 EQU 0x400100d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG18\r
-CYDEV_UCFG_B0_P0_U1_CFG18 EQU 0x400100d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG19\r
-CYDEV_UCFG_B0_P0_U1_CFG19 EQU 0x400100d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG20\r
-CYDEV_UCFG_B0_P0_U1_CFG20 EQU 0x400100d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG21\r
-CYDEV_UCFG_B0_P0_U1_CFG21 EQU 0x400100d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG22\r
-CYDEV_UCFG_B0_P0_U1_CFG22 EQU 0x400100d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG23\r
-CYDEV_UCFG_B0_P0_U1_CFG23 EQU 0x400100d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG24\r
-CYDEV_UCFG_B0_P0_U1_CFG24 EQU 0x400100d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG25\r
-CYDEV_UCFG_B0_P0_U1_CFG25 EQU 0x400100d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG26\r
-CYDEV_UCFG_B0_P0_U1_CFG26 EQU 0x400100da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG27\r
-CYDEV_UCFG_B0_P0_U1_CFG27 EQU 0x400100db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG28\r
-CYDEV_UCFG_B0_P0_U1_CFG28 EQU 0x400100dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG29\r
-CYDEV_UCFG_B0_P0_U1_CFG29 EQU 0x400100dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG30\r
-CYDEV_UCFG_B0_P0_U1_CFG30 EQU 0x400100de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_CFG31\r
-CYDEV_UCFG_B0_P0_U1_CFG31 EQU 0x400100df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG0\r
-CYDEV_UCFG_B0_P0_U1_DCFG0 EQU 0x400100e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG1\r
-CYDEV_UCFG_B0_P0_U1_DCFG1 EQU 0x400100e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG2\r
-CYDEV_UCFG_B0_P0_U1_DCFG2 EQU 0x400100e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG3\r
-CYDEV_UCFG_B0_P0_U1_DCFG3 EQU 0x400100e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG4\r
-CYDEV_UCFG_B0_P0_U1_DCFG4 EQU 0x400100e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG5\r
-CYDEV_UCFG_B0_P0_U1_DCFG5 EQU 0x400100ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG6\r
-CYDEV_UCFG_B0_P0_U1_DCFG6 EQU 0x400100ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_DCFG7\r
-CYDEV_UCFG_B0_P0_U1_DCFG7 EQU 0x400100ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_BASE\r
-CYDEV_UCFG_B0_P0_ROUTE_BASE EQU 0x40010100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P0_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_BASE\r
-CYDEV_UCFG_B0_P1_BASE EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_SIZE\r
-CYDEV_UCFG_B0_P1_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_BASE\r
-CYDEV_UCFG_B0_P1_U0_BASE EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_SIZE\r
-CYDEV_UCFG_B0_P1_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT0 EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT1 EQU 0x40010204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT2 EQU 0x40010208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT3 EQU 0x4001020c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT4 EQU 0x40010210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT5 EQU 0x40010214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT6 EQU 0x40010218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT7 EQU 0x4001021c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT8 EQU 0x40010220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT9 EQU 0x40010224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT10 EQU 0x40010228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P1_U0_PLD_IT11 EQU 0x4001022c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P1_U0_PLD_ORT0 EQU 0x40010230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P1_U0_PLD_ORT1 EQU 0x40010232\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P1_U0_PLD_ORT2 EQU 0x40010234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P1_U0_PLD_ORT3 EQU 0x40010236\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P1_U0_MC_CFG_CEN_CONST EQU 0x40010238\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P1_U0_MC_CFG_XORFB EQU 0x4001023a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P1_U0_MC_CFG_SET_RESET EQU 0x4001023c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P1_U0_MC_CFG_BYPASS EQU 0x4001023e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG0\r
-CYDEV_UCFG_B0_P1_U0_CFG0 EQU 0x40010240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG1\r
-CYDEV_UCFG_B0_P1_U0_CFG1 EQU 0x40010241\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG2\r
-CYDEV_UCFG_B0_P1_U0_CFG2 EQU 0x40010242\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG3\r
-CYDEV_UCFG_B0_P1_U0_CFG3 EQU 0x40010243\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG4\r
-CYDEV_UCFG_B0_P1_U0_CFG4 EQU 0x40010244\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG5\r
-CYDEV_UCFG_B0_P1_U0_CFG5 EQU 0x40010245\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG6\r
-CYDEV_UCFG_B0_P1_U0_CFG6 EQU 0x40010246\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG7\r
-CYDEV_UCFG_B0_P1_U0_CFG7 EQU 0x40010247\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG8\r
-CYDEV_UCFG_B0_P1_U0_CFG8 EQU 0x40010248\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG9\r
-CYDEV_UCFG_B0_P1_U0_CFG9 EQU 0x40010249\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG10\r
-CYDEV_UCFG_B0_P1_U0_CFG10 EQU 0x4001024a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG11\r
-CYDEV_UCFG_B0_P1_U0_CFG11 EQU 0x4001024b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG12\r
-CYDEV_UCFG_B0_P1_U0_CFG12 EQU 0x4001024c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG13\r
-CYDEV_UCFG_B0_P1_U0_CFG13 EQU 0x4001024d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG14\r
-CYDEV_UCFG_B0_P1_U0_CFG14 EQU 0x4001024e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG15\r
-CYDEV_UCFG_B0_P1_U0_CFG15 EQU 0x4001024f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG16\r
-CYDEV_UCFG_B0_P1_U0_CFG16 EQU 0x40010250\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG17\r
-CYDEV_UCFG_B0_P1_U0_CFG17 EQU 0x40010251\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG18\r
-CYDEV_UCFG_B0_P1_U0_CFG18 EQU 0x40010252\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG19\r
-CYDEV_UCFG_B0_P1_U0_CFG19 EQU 0x40010253\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG20\r
-CYDEV_UCFG_B0_P1_U0_CFG20 EQU 0x40010254\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG21\r
-CYDEV_UCFG_B0_P1_U0_CFG21 EQU 0x40010255\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG22\r
-CYDEV_UCFG_B0_P1_U0_CFG22 EQU 0x40010256\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG23\r
-CYDEV_UCFG_B0_P1_U0_CFG23 EQU 0x40010257\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG24\r
-CYDEV_UCFG_B0_P1_U0_CFG24 EQU 0x40010258\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG25\r
-CYDEV_UCFG_B0_P1_U0_CFG25 EQU 0x40010259\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG26\r
-CYDEV_UCFG_B0_P1_U0_CFG26 EQU 0x4001025a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG27\r
-CYDEV_UCFG_B0_P1_U0_CFG27 EQU 0x4001025b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG28\r
-CYDEV_UCFG_B0_P1_U0_CFG28 EQU 0x4001025c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG29\r
-CYDEV_UCFG_B0_P1_U0_CFG29 EQU 0x4001025d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG30\r
-CYDEV_UCFG_B0_P1_U0_CFG30 EQU 0x4001025e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_CFG31\r
-CYDEV_UCFG_B0_P1_U0_CFG31 EQU 0x4001025f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG0\r
-CYDEV_UCFG_B0_P1_U0_DCFG0 EQU 0x40010260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG1\r
-CYDEV_UCFG_B0_P1_U0_DCFG1 EQU 0x40010262\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG2\r
-CYDEV_UCFG_B0_P1_U0_DCFG2 EQU 0x40010264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG3\r
-CYDEV_UCFG_B0_P1_U0_DCFG3 EQU 0x40010266\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG4\r
-CYDEV_UCFG_B0_P1_U0_DCFG4 EQU 0x40010268\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG5\r
-CYDEV_UCFG_B0_P1_U0_DCFG5 EQU 0x4001026a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG6\r
-CYDEV_UCFG_B0_P1_U0_DCFG6 EQU 0x4001026c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_DCFG7\r
-CYDEV_UCFG_B0_P1_U0_DCFG7 EQU 0x4001026e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_BASE\r
-CYDEV_UCFG_B0_P1_U1_BASE EQU 0x40010280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_SIZE\r
-CYDEV_UCFG_B0_P1_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT0 EQU 0x40010280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT1 EQU 0x40010284\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT2 EQU 0x40010288\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT3 EQU 0x4001028c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT4 EQU 0x40010290\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT5 EQU 0x40010294\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT6 EQU 0x40010298\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT7 EQU 0x4001029c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT8 EQU 0x400102a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT9 EQU 0x400102a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT10 EQU 0x400102a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P1_U1_PLD_IT11 EQU 0x400102ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P1_U1_PLD_ORT0 EQU 0x400102b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P1_U1_PLD_ORT1 EQU 0x400102b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P1_U1_PLD_ORT2 EQU 0x400102b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P1_U1_PLD_ORT3 EQU 0x400102b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P1_U1_MC_CFG_CEN_CONST EQU 0x400102b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P1_U1_MC_CFG_XORFB EQU 0x400102ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P1_U1_MC_CFG_SET_RESET EQU 0x400102bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P1_U1_MC_CFG_BYPASS EQU 0x400102be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG0\r
-CYDEV_UCFG_B0_P1_U1_CFG0 EQU 0x400102c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG1\r
-CYDEV_UCFG_B0_P1_U1_CFG1 EQU 0x400102c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG2\r
-CYDEV_UCFG_B0_P1_U1_CFG2 EQU 0x400102c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG3\r
-CYDEV_UCFG_B0_P1_U1_CFG3 EQU 0x400102c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG4\r
-CYDEV_UCFG_B0_P1_U1_CFG4 EQU 0x400102c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG5\r
-CYDEV_UCFG_B0_P1_U1_CFG5 EQU 0x400102c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG6\r
-CYDEV_UCFG_B0_P1_U1_CFG6 EQU 0x400102c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG7\r
-CYDEV_UCFG_B0_P1_U1_CFG7 EQU 0x400102c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG8\r
-CYDEV_UCFG_B0_P1_U1_CFG8 EQU 0x400102c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG9\r
-CYDEV_UCFG_B0_P1_U1_CFG9 EQU 0x400102c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG10\r
-CYDEV_UCFG_B0_P1_U1_CFG10 EQU 0x400102ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG11\r
-CYDEV_UCFG_B0_P1_U1_CFG11 EQU 0x400102cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG12\r
-CYDEV_UCFG_B0_P1_U1_CFG12 EQU 0x400102cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG13\r
-CYDEV_UCFG_B0_P1_U1_CFG13 EQU 0x400102cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG14\r
-CYDEV_UCFG_B0_P1_U1_CFG14 EQU 0x400102ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG15\r
-CYDEV_UCFG_B0_P1_U1_CFG15 EQU 0x400102cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG16\r
-CYDEV_UCFG_B0_P1_U1_CFG16 EQU 0x400102d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG17\r
-CYDEV_UCFG_B0_P1_U1_CFG17 EQU 0x400102d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG18\r
-CYDEV_UCFG_B0_P1_U1_CFG18 EQU 0x400102d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG19\r
-CYDEV_UCFG_B0_P1_U1_CFG19 EQU 0x400102d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG20\r
-CYDEV_UCFG_B0_P1_U1_CFG20 EQU 0x400102d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG21\r
-CYDEV_UCFG_B0_P1_U1_CFG21 EQU 0x400102d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG22\r
-CYDEV_UCFG_B0_P1_U1_CFG22 EQU 0x400102d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG23\r
-CYDEV_UCFG_B0_P1_U1_CFG23 EQU 0x400102d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG24\r
-CYDEV_UCFG_B0_P1_U1_CFG24 EQU 0x400102d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG25\r
-CYDEV_UCFG_B0_P1_U1_CFG25 EQU 0x400102d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG26\r
-CYDEV_UCFG_B0_P1_U1_CFG26 EQU 0x400102da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG27\r
-CYDEV_UCFG_B0_P1_U1_CFG27 EQU 0x400102db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG28\r
-CYDEV_UCFG_B0_P1_U1_CFG28 EQU 0x400102dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG29\r
-CYDEV_UCFG_B0_P1_U1_CFG29 EQU 0x400102dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG30\r
-CYDEV_UCFG_B0_P1_U1_CFG30 EQU 0x400102de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_CFG31\r
-CYDEV_UCFG_B0_P1_U1_CFG31 EQU 0x400102df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG0\r
-CYDEV_UCFG_B0_P1_U1_DCFG0 EQU 0x400102e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG1\r
-CYDEV_UCFG_B0_P1_U1_DCFG1 EQU 0x400102e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG2\r
-CYDEV_UCFG_B0_P1_U1_DCFG2 EQU 0x400102e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG3\r
-CYDEV_UCFG_B0_P1_U1_DCFG3 EQU 0x400102e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG4\r
-CYDEV_UCFG_B0_P1_U1_DCFG4 EQU 0x400102e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG5\r
-CYDEV_UCFG_B0_P1_U1_DCFG5 EQU 0x400102ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG6\r
-CYDEV_UCFG_B0_P1_U1_DCFG6 EQU 0x400102ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_DCFG7\r
-CYDEV_UCFG_B0_P1_U1_DCFG7 EQU 0x400102ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_BASE\r
-CYDEV_UCFG_B0_P1_ROUTE_BASE EQU 0x40010300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P1_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_BASE\r
-CYDEV_UCFG_B0_P2_BASE EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_SIZE\r
-CYDEV_UCFG_B0_P2_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_BASE\r
-CYDEV_UCFG_B0_P2_U0_BASE EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_SIZE\r
-CYDEV_UCFG_B0_P2_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT0 EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT1 EQU 0x40010404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT2 EQU 0x40010408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT3 EQU 0x4001040c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT4 EQU 0x40010410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT5 EQU 0x40010414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT6 EQU 0x40010418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT7 EQU 0x4001041c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT8 EQU 0x40010420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT9 EQU 0x40010424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT10 EQU 0x40010428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P2_U0_PLD_IT11 EQU 0x4001042c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P2_U0_PLD_ORT0 EQU 0x40010430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P2_U0_PLD_ORT1 EQU 0x40010432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P2_U0_PLD_ORT2 EQU 0x40010434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P2_U0_PLD_ORT3 EQU 0x40010436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P2_U0_MC_CFG_CEN_CONST EQU 0x40010438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P2_U0_MC_CFG_XORFB EQU 0x4001043a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P2_U0_MC_CFG_SET_RESET EQU 0x4001043c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P2_U0_MC_CFG_BYPASS EQU 0x4001043e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG0\r
-CYDEV_UCFG_B0_P2_U0_CFG0 EQU 0x40010440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG1\r
-CYDEV_UCFG_B0_P2_U0_CFG1 EQU 0x40010441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG2\r
-CYDEV_UCFG_B0_P2_U0_CFG2 EQU 0x40010442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG3\r
-CYDEV_UCFG_B0_P2_U0_CFG3 EQU 0x40010443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG4\r
-CYDEV_UCFG_B0_P2_U0_CFG4 EQU 0x40010444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG5\r
-CYDEV_UCFG_B0_P2_U0_CFG5 EQU 0x40010445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG6\r
-CYDEV_UCFG_B0_P2_U0_CFG6 EQU 0x40010446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG7\r
-CYDEV_UCFG_B0_P2_U0_CFG7 EQU 0x40010447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG8\r
-CYDEV_UCFG_B0_P2_U0_CFG8 EQU 0x40010448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG9\r
-CYDEV_UCFG_B0_P2_U0_CFG9 EQU 0x40010449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG10\r
-CYDEV_UCFG_B0_P2_U0_CFG10 EQU 0x4001044a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG11\r
-CYDEV_UCFG_B0_P2_U0_CFG11 EQU 0x4001044b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG12\r
-CYDEV_UCFG_B0_P2_U0_CFG12 EQU 0x4001044c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG13\r
-CYDEV_UCFG_B0_P2_U0_CFG13 EQU 0x4001044d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG14\r
-CYDEV_UCFG_B0_P2_U0_CFG14 EQU 0x4001044e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG15\r
-CYDEV_UCFG_B0_P2_U0_CFG15 EQU 0x4001044f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG16\r
-CYDEV_UCFG_B0_P2_U0_CFG16 EQU 0x40010450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG17\r
-CYDEV_UCFG_B0_P2_U0_CFG17 EQU 0x40010451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG18\r
-CYDEV_UCFG_B0_P2_U0_CFG18 EQU 0x40010452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG19\r
-CYDEV_UCFG_B0_P2_U0_CFG19 EQU 0x40010453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG20\r
-CYDEV_UCFG_B0_P2_U0_CFG20 EQU 0x40010454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG21\r
-CYDEV_UCFG_B0_P2_U0_CFG21 EQU 0x40010455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG22\r
-CYDEV_UCFG_B0_P2_U0_CFG22 EQU 0x40010456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG23\r
-CYDEV_UCFG_B0_P2_U0_CFG23 EQU 0x40010457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG24\r
-CYDEV_UCFG_B0_P2_U0_CFG24 EQU 0x40010458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG25\r
-CYDEV_UCFG_B0_P2_U0_CFG25 EQU 0x40010459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG26\r
-CYDEV_UCFG_B0_P2_U0_CFG26 EQU 0x4001045a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG27\r
-CYDEV_UCFG_B0_P2_U0_CFG27 EQU 0x4001045b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG28\r
-CYDEV_UCFG_B0_P2_U0_CFG28 EQU 0x4001045c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG29\r
-CYDEV_UCFG_B0_P2_U0_CFG29 EQU 0x4001045d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG30\r
-CYDEV_UCFG_B0_P2_U0_CFG30 EQU 0x4001045e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_CFG31\r
-CYDEV_UCFG_B0_P2_U0_CFG31 EQU 0x4001045f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG0\r
-CYDEV_UCFG_B0_P2_U0_DCFG0 EQU 0x40010460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG1\r
-CYDEV_UCFG_B0_P2_U0_DCFG1 EQU 0x40010462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG2\r
-CYDEV_UCFG_B0_P2_U0_DCFG2 EQU 0x40010464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG3\r
-CYDEV_UCFG_B0_P2_U0_DCFG3 EQU 0x40010466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG4\r
-CYDEV_UCFG_B0_P2_U0_DCFG4 EQU 0x40010468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG5\r
-CYDEV_UCFG_B0_P2_U0_DCFG5 EQU 0x4001046a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG6\r
-CYDEV_UCFG_B0_P2_U0_DCFG6 EQU 0x4001046c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_DCFG7\r
-CYDEV_UCFG_B0_P2_U0_DCFG7 EQU 0x4001046e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_BASE\r
-CYDEV_UCFG_B0_P2_U1_BASE EQU 0x40010480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_SIZE\r
-CYDEV_UCFG_B0_P2_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT0 EQU 0x40010480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT1 EQU 0x40010484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT2 EQU 0x40010488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT3 EQU 0x4001048c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT4 EQU 0x40010490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT5 EQU 0x40010494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT6 EQU 0x40010498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT7 EQU 0x4001049c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT8 EQU 0x400104a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT9 EQU 0x400104a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT10 EQU 0x400104a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P2_U1_PLD_IT11 EQU 0x400104ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P2_U1_PLD_ORT0 EQU 0x400104b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P2_U1_PLD_ORT1 EQU 0x400104b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P2_U1_PLD_ORT2 EQU 0x400104b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P2_U1_PLD_ORT3 EQU 0x400104b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P2_U1_MC_CFG_CEN_CONST EQU 0x400104b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P2_U1_MC_CFG_XORFB EQU 0x400104ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P2_U1_MC_CFG_SET_RESET EQU 0x400104bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P2_U1_MC_CFG_BYPASS EQU 0x400104be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG0\r
-CYDEV_UCFG_B0_P2_U1_CFG0 EQU 0x400104c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG1\r
-CYDEV_UCFG_B0_P2_U1_CFG1 EQU 0x400104c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG2\r
-CYDEV_UCFG_B0_P2_U1_CFG2 EQU 0x400104c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG3\r
-CYDEV_UCFG_B0_P2_U1_CFG3 EQU 0x400104c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG4\r
-CYDEV_UCFG_B0_P2_U1_CFG4 EQU 0x400104c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG5\r
-CYDEV_UCFG_B0_P2_U1_CFG5 EQU 0x400104c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG6\r
-CYDEV_UCFG_B0_P2_U1_CFG6 EQU 0x400104c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG7\r
-CYDEV_UCFG_B0_P2_U1_CFG7 EQU 0x400104c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG8\r
-CYDEV_UCFG_B0_P2_U1_CFG8 EQU 0x400104c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG9\r
-CYDEV_UCFG_B0_P2_U1_CFG9 EQU 0x400104c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG10\r
-CYDEV_UCFG_B0_P2_U1_CFG10 EQU 0x400104ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG11\r
-CYDEV_UCFG_B0_P2_U1_CFG11 EQU 0x400104cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG12\r
-CYDEV_UCFG_B0_P2_U1_CFG12 EQU 0x400104cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG13\r
-CYDEV_UCFG_B0_P2_U1_CFG13 EQU 0x400104cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG14\r
-CYDEV_UCFG_B0_P2_U1_CFG14 EQU 0x400104ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG15\r
-CYDEV_UCFG_B0_P2_U1_CFG15 EQU 0x400104cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG16\r
-CYDEV_UCFG_B0_P2_U1_CFG16 EQU 0x400104d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG17\r
-CYDEV_UCFG_B0_P2_U1_CFG17 EQU 0x400104d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG18\r
-CYDEV_UCFG_B0_P2_U1_CFG18 EQU 0x400104d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG19\r
-CYDEV_UCFG_B0_P2_U1_CFG19 EQU 0x400104d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG20\r
-CYDEV_UCFG_B0_P2_U1_CFG20 EQU 0x400104d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG21\r
-CYDEV_UCFG_B0_P2_U1_CFG21 EQU 0x400104d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG22\r
-CYDEV_UCFG_B0_P2_U1_CFG22 EQU 0x400104d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG23\r
-CYDEV_UCFG_B0_P2_U1_CFG23 EQU 0x400104d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG24\r
-CYDEV_UCFG_B0_P2_U1_CFG24 EQU 0x400104d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG25\r
-CYDEV_UCFG_B0_P2_U1_CFG25 EQU 0x400104d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG26\r
-CYDEV_UCFG_B0_P2_U1_CFG26 EQU 0x400104da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG27\r
-CYDEV_UCFG_B0_P2_U1_CFG27 EQU 0x400104db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG28\r
-CYDEV_UCFG_B0_P2_U1_CFG28 EQU 0x400104dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG29\r
-CYDEV_UCFG_B0_P2_U1_CFG29 EQU 0x400104dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG30\r
-CYDEV_UCFG_B0_P2_U1_CFG30 EQU 0x400104de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_CFG31\r
-CYDEV_UCFG_B0_P2_U1_CFG31 EQU 0x400104df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG0\r
-CYDEV_UCFG_B0_P2_U1_DCFG0 EQU 0x400104e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG1\r
-CYDEV_UCFG_B0_P2_U1_DCFG1 EQU 0x400104e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG2\r
-CYDEV_UCFG_B0_P2_U1_DCFG2 EQU 0x400104e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG3\r
-CYDEV_UCFG_B0_P2_U1_DCFG3 EQU 0x400104e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG4\r
-CYDEV_UCFG_B0_P2_U1_DCFG4 EQU 0x400104e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG5\r
-CYDEV_UCFG_B0_P2_U1_DCFG5 EQU 0x400104ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG6\r
-CYDEV_UCFG_B0_P2_U1_DCFG6 EQU 0x400104ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_DCFG7\r
-CYDEV_UCFG_B0_P2_U1_DCFG7 EQU 0x400104ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_BASE\r
-CYDEV_UCFG_B0_P2_ROUTE_BASE EQU 0x40010500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P2_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_BASE\r
-CYDEV_UCFG_B0_P3_BASE EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_SIZE\r
-CYDEV_UCFG_B0_P3_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_BASE\r
-CYDEV_UCFG_B0_P3_U0_BASE EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_SIZE\r
-CYDEV_UCFG_B0_P3_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT0 EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT1 EQU 0x40010604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT2 EQU 0x40010608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT3 EQU 0x4001060c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT4 EQU 0x40010610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT5 EQU 0x40010614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT6 EQU 0x40010618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT7 EQU 0x4001061c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT8 EQU 0x40010620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT9 EQU 0x40010624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT10 EQU 0x40010628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P3_U0_PLD_IT11 EQU 0x4001062c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P3_U0_PLD_ORT0 EQU 0x40010630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P3_U0_PLD_ORT1 EQU 0x40010632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P3_U0_PLD_ORT2 EQU 0x40010634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P3_U0_PLD_ORT3 EQU 0x40010636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P3_U0_MC_CFG_CEN_CONST EQU 0x40010638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P3_U0_MC_CFG_XORFB EQU 0x4001063a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P3_U0_MC_CFG_SET_RESET EQU 0x4001063c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P3_U0_MC_CFG_BYPASS EQU 0x4001063e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG0\r
-CYDEV_UCFG_B0_P3_U0_CFG0 EQU 0x40010640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG1\r
-CYDEV_UCFG_B0_P3_U0_CFG1 EQU 0x40010641\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG2\r
-CYDEV_UCFG_B0_P3_U0_CFG2 EQU 0x40010642\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG3\r
-CYDEV_UCFG_B0_P3_U0_CFG3 EQU 0x40010643\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG4\r
-CYDEV_UCFG_B0_P3_U0_CFG4 EQU 0x40010644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG5\r
-CYDEV_UCFG_B0_P3_U0_CFG5 EQU 0x40010645\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG6\r
-CYDEV_UCFG_B0_P3_U0_CFG6 EQU 0x40010646\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG7\r
-CYDEV_UCFG_B0_P3_U0_CFG7 EQU 0x40010647\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG8\r
-CYDEV_UCFG_B0_P3_U0_CFG8 EQU 0x40010648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG9\r
-CYDEV_UCFG_B0_P3_U0_CFG9 EQU 0x40010649\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG10\r
-CYDEV_UCFG_B0_P3_U0_CFG10 EQU 0x4001064a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG11\r
-CYDEV_UCFG_B0_P3_U0_CFG11 EQU 0x4001064b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG12\r
-CYDEV_UCFG_B0_P3_U0_CFG12 EQU 0x4001064c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG13\r
-CYDEV_UCFG_B0_P3_U0_CFG13 EQU 0x4001064d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG14\r
-CYDEV_UCFG_B0_P3_U0_CFG14 EQU 0x4001064e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG15\r
-CYDEV_UCFG_B0_P3_U0_CFG15 EQU 0x4001064f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG16\r
-CYDEV_UCFG_B0_P3_U0_CFG16 EQU 0x40010650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG17\r
-CYDEV_UCFG_B0_P3_U0_CFG17 EQU 0x40010651\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG18\r
-CYDEV_UCFG_B0_P3_U0_CFG18 EQU 0x40010652\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG19\r
-CYDEV_UCFG_B0_P3_U0_CFG19 EQU 0x40010653\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG20\r
-CYDEV_UCFG_B0_P3_U0_CFG20 EQU 0x40010654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG21\r
-CYDEV_UCFG_B0_P3_U0_CFG21 EQU 0x40010655\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG22\r
-CYDEV_UCFG_B0_P3_U0_CFG22 EQU 0x40010656\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG23\r
-CYDEV_UCFG_B0_P3_U0_CFG23 EQU 0x40010657\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG24\r
-CYDEV_UCFG_B0_P3_U0_CFG24 EQU 0x40010658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG25\r
-CYDEV_UCFG_B0_P3_U0_CFG25 EQU 0x40010659\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG26\r
-CYDEV_UCFG_B0_P3_U0_CFG26 EQU 0x4001065a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG27\r
-CYDEV_UCFG_B0_P3_U0_CFG27 EQU 0x4001065b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG28\r
-CYDEV_UCFG_B0_P3_U0_CFG28 EQU 0x4001065c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG29\r
-CYDEV_UCFG_B0_P3_U0_CFG29 EQU 0x4001065d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG30\r
-CYDEV_UCFG_B0_P3_U0_CFG30 EQU 0x4001065e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_CFG31\r
-CYDEV_UCFG_B0_P3_U0_CFG31 EQU 0x4001065f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG0\r
-CYDEV_UCFG_B0_P3_U0_DCFG0 EQU 0x40010660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG1\r
-CYDEV_UCFG_B0_P3_U0_DCFG1 EQU 0x40010662\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG2\r
-CYDEV_UCFG_B0_P3_U0_DCFG2 EQU 0x40010664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG3\r
-CYDEV_UCFG_B0_P3_U0_DCFG3 EQU 0x40010666\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG4\r
-CYDEV_UCFG_B0_P3_U0_DCFG4 EQU 0x40010668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG5\r
-CYDEV_UCFG_B0_P3_U0_DCFG5 EQU 0x4001066a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG6\r
-CYDEV_UCFG_B0_P3_U0_DCFG6 EQU 0x4001066c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_DCFG7\r
-CYDEV_UCFG_B0_P3_U0_DCFG7 EQU 0x4001066e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_BASE\r
-CYDEV_UCFG_B0_P3_U1_BASE EQU 0x40010680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_SIZE\r
-CYDEV_UCFG_B0_P3_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT0 EQU 0x40010680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT1 EQU 0x40010684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT2 EQU 0x40010688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT3 EQU 0x4001068c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT4 EQU 0x40010690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT5 EQU 0x40010694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT6 EQU 0x40010698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT7 EQU 0x4001069c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT8 EQU 0x400106a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT9 EQU 0x400106a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT10 EQU 0x400106a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P3_U1_PLD_IT11 EQU 0x400106ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P3_U1_PLD_ORT0 EQU 0x400106b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P3_U1_PLD_ORT1 EQU 0x400106b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P3_U1_PLD_ORT2 EQU 0x400106b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P3_U1_PLD_ORT3 EQU 0x400106b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P3_U1_MC_CFG_CEN_CONST EQU 0x400106b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P3_U1_MC_CFG_XORFB EQU 0x400106ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P3_U1_MC_CFG_SET_RESET EQU 0x400106bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P3_U1_MC_CFG_BYPASS EQU 0x400106be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG0\r
-CYDEV_UCFG_B0_P3_U1_CFG0 EQU 0x400106c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG1\r
-CYDEV_UCFG_B0_P3_U1_CFG1 EQU 0x400106c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG2\r
-CYDEV_UCFG_B0_P3_U1_CFG2 EQU 0x400106c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG3\r
-CYDEV_UCFG_B0_P3_U1_CFG3 EQU 0x400106c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG4\r
-CYDEV_UCFG_B0_P3_U1_CFG4 EQU 0x400106c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG5\r
-CYDEV_UCFG_B0_P3_U1_CFG5 EQU 0x400106c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG6\r
-CYDEV_UCFG_B0_P3_U1_CFG6 EQU 0x400106c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG7\r
-CYDEV_UCFG_B0_P3_U1_CFG7 EQU 0x400106c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG8\r
-CYDEV_UCFG_B0_P3_U1_CFG8 EQU 0x400106c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG9\r
-CYDEV_UCFG_B0_P3_U1_CFG9 EQU 0x400106c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG10\r
-CYDEV_UCFG_B0_P3_U1_CFG10 EQU 0x400106ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG11\r
-CYDEV_UCFG_B0_P3_U1_CFG11 EQU 0x400106cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG12\r
-CYDEV_UCFG_B0_P3_U1_CFG12 EQU 0x400106cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG13\r
-CYDEV_UCFG_B0_P3_U1_CFG13 EQU 0x400106cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG14\r
-CYDEV_UCFG_B0_P3_U1_CFG14 EQU 0x400106ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG15\r
-CYDEV_UCFG_B0_P3_U1_CFG15 EQU 0x400106cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG16\r
-CYDEV_UCFG_B0_P3_U1_CFG16 EQU 0x400106d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG17\r
-CYDEV_UCFG_B0_P3_U1_CFG17 EQU 0x400106d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG18\r
-CYDEV_UCFG_B0_P3_U1_CFG18 EQU 0x400106d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG19\r
-CYDEV_UCFG_B0_P3_U1_CFG19 EQU 0x400106d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG20\r
-CYDEV_UCFG_B0_P3_U1_CFG20 EQU 0x400106d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG21\r
-CYDEV_UCFG_B0_P3_U1_CFG21 EQU 0x400106d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG22\r
-CYDEV_UCFG_B0_P3_U1_CFG22 EQU 0x400106d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG23\r
-CYDEV_UCFG_B0_P3_U1_CFG23 EQU 0x400106d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG24\r
-CYDEV_UCFG_B0_P3_U1_CFG24 EQU 0x400106d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG25\r
-CYDEV_UCFG_B0_P3_U1_CFG25 EQU 0x400106d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG26\r
-CYDEV_UCFG_B0_P3_U1_CFG26 EQU 0x400106da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG27\r
-CYDEV_UCFG_B0_P3_U1_CFG27 EQU 0x400106db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG28\r
-CYDEV_UCFG_B0_P3_U1_CFG28 EQU 0x400106dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG29\r
-CYDEV_UCFG_B0_P3_U1_CFG29 EQU 0x400106dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG30\r
-CYDEV_UCFG_B0_P3_U1_CFG30 EQU 0x400106de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_CFG31\r
-CYDEV_UCFG_B0_P3_U1_CFG31 EQU 0x400106df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG0\r
-CYDEV_UCFG_B0_P3_U1_DCFG0 EQU 0x400106e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG1\r
-CYDEV_UCFG_B0_P3_U1_DCFG1 EQU 0x400106e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG2\r
-CYDEV_UCFG_B0_P3_U1_DCFG2 EQU 0x400106e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG3\r
-CYDEV_UCFG_B0_P3_U1_DCFG3 EQU 0x400106e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG4\r
-CYDEV_UCFG_B0_P3_U1_DCFG4 EQU 0x400106e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG5\r
-CYDEV_UCFG_B0_P3_U1_DCFG5 EQU 0x400106ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG6\r
-CYDEV_UCFG_B0_P3_U1_DCFG6 EQU 0x400106ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_DCFG7\r
-CYDEV_UCFG_B0_P3_U1_DCFG7 EQU 0x400106ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_BASE\r
-CYDEV_UCFG_B0_P3_ROUTE_BASE EQU 0x40010700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P3_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_BASE\r
-CYDEV_UCFG_B0_P4_BASE EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_SIZE\r
-CYDEV_UCFG_B0_P4_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_BASE\r
-CYDEV_UCFG_B0_P4_U0_BASE EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_SIZE\r
-CYDEV_UCFG_B0_P4_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT0 EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT1 EQU 0x40010804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT2 EQU 0x40010808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT3 EQU 0x4001080c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT4 EQU 0x40010810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT5 EQU 0x40010814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT6 EQU 0x40010818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT7 EQU 0x4001081c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT8 EQU 0x40010820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT9 EQU 0x40010824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT10 EQU 0x40010828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P4_U0_PLD_IT11 EQU 0x4001082c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P4_U0_PLD_ORT0 EQU 0x40010830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P4_U0_PLD_ORT1 EQU 0x40010832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P4_U0_PLD_ORT2 EQU 0x40010834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P4_U0_PLD_ORT3 EQU 0x40010836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P4_U0_MC_CFG_CEN_CONST EQU 0x40010838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P4_U0_MC_CFG_XORFB EQU 0x4001083a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P4_U0_MC_CFG_SET_RESET EQU 0x4001083c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P4_U0_MC_CFG_BYPASS EQU 0x4001083e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG0\r
-CYDEV_UCFG_B0_P4_U0_CFG0 EQU 0x40010840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG1\r
-CYDEV_UCFG_B0_P4_U0_CFG1 EQU 0x40010841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG2\r
-CYDEV_UCFG_B0_P4_U0_CFG2 EQU 0x40010842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG3\r
-CYDEV_UCFG_B0_P4_U0_CFG3 EQU 0x40010843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG4\r
-CYDEV_UCFG_B0_P4_U0_CFG4 EQU 0x40010844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG5\r
-CYDEV_UCFG_B0_P4_U0_CFG5 EQU 0x40010845\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG6\r
-CYDEV_UCFG_B0_P4_U0_CFG6 EQU 0x40010846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG7\r
-CYDEV_UCFG_B0_P4_U0_CFG7 EQU 0x40010847\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG8\r
-CYDEV_UCFG_B0_P4_U0_CFG8 EQU 0x40010848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG9\r
-CYDEV_UCFG_B0_P4_U0_CFG9 EQU 0x40010849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG10\r
-CYDEV_UCFG_B0_P4_U0_CFG10 EQU 0x4001084a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG11\r
-CYDEV_UCFG_B0_P4_U0_CFG11 EQU 0x4001084b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG12\r
-CYDEV_UCFG_B0_P4_U0_CFG12 EQU 0x4001084c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG13\r
-CYDEV_UCFG_B0_P4_U0_CFG13 EQU 0x4001084d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG14\r
-CYDEV_UCFG_B0_P4_U0_CFG14 EQU 0x4001084e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG15\r
-CYDEV_UCFG_B0_P4_U0_CFG15 EQU 0x4001084f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG16\r
-CYDEV_UCFG_B0_P4_U0_CFG16 EQU 0x40010850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG17\r
-CYDEV_UCFG_B0_P4_U0_CFG17 EQU 0x40010851\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG18\r
-CYDEV_UCFG_B0_P4_U0_CFG18 EQU 0x40010852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG19\r
-CYDEV_UCFG_B0_P4_U0_CFG19 EQU 0x40010853\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG20\r
-CYDEV_UCFG_B0_P4_U0_CFG20 EQU 0x40010854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG21\r
-CYDEV_UCFG_B0_P4_U0_CFG21 EQU 0x40010855\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG22\r
-CYDEV_UCFG_B0_P4_U0_CFG22 EQU 0x40010856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG23\r
-CYDEV_UCFG_B0_P4_U0_CFG23 EQU 0x40010857\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG24\r
-CYDEV_UCFG_B0_P4_U0_CFG24 EQU 0x40010858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG25\r
-CYDEV_UCFG_B0_P4_U0_CFG25 EQU 0x40010859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG26\r
-CYDEV_UCFG_B0_P4_U0_CFG26 EQU 0x4001085a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG27\r
-CYDEV_UCFG_B0_P4_U0_CFG27 EQU 0x4001085b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG28\r
-CYDEV_UCFG_B0_P4_U0_CFG28 EQU 0x4001085c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG29\r
-CYDEV_UCFG_B0_P4_U0_CFG29 EQU 0x4001085d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG30\r
-CYDEV_UCFG_B0_P4_U0_CFG30 EQU 0x4001085e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_CFG31\r
-CYDEV_UCFG_B0_P4_U0_CFG31 EQU 0x4001085f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG0\r
-CYDEV_UCFG_B0_P4_U0_DCFG0 EQU 0x40010860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG1\r
-CYDEV_UCFG_B0_P4_U0_DCFG1 EQU 0x40010862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG2\r
-CYDEV_UCFG_B0_P4_U0_DCFG2 EQU 0x40010864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG3\r
-CYDEV_UCFG_B0_P4_U0_DCFG3 EQU 0x40010866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG4\r
-CYDEV_UCFG_B0_P4_U0_DCFG4 EQU 0x40010868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG5\r
-CYDEV_UCFG_B0_P4_U0_DCFG5 EQU 0x4001086a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG6\r
-CYDEV_UCFG_B0_P4_U0_DCFG6 EQU 0x4001086c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_DCFG7\r
-CYDEV_UCFG_B0_P4_U0_DCFG7 EQU 0x4001086e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_BASE\r
-CYDEV_UCFG_B0_P4_U1_BASE EQU 0x40010880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_SIZE\r
-CYDEV_UCFG_B0_P4_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT0 EQU 0x40010880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT1 EQU 0x40010884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT2 EQU 0x40010888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT3 EQU 0x4001088c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT4 EQU 0x40010890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT5 EQU 0x40010894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT6 EQU 0x40010898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT7 EQU 0x4001089c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT8 EQU 0x400108a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT9 EQU 0x400108a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT10 EQU 0x400108a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P4_U1_PLD_IT11 EQU 0x400108ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P4_U1_PLD_ORT0 EQU 0x400108b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P4_U1_PLD_ORT1 EQU 0x400108b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P4_U1_PLD_ORT2 EQU 0x400108b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P4_U1_PLD_ORT3 EQU 0x400108b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P4_U1_MC_CFG_CEN_CONST EQU 0x400108b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P4_U1_MC_CFG_XORFB EQU 0x400108ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P4_U1_MC_CFG_SET_RESET EQU 0x400108bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P4_U1_MC_CFG_BYPASS EQU 0x400108be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG0\r
-CYDEV_UCFG_B0_P4_U1_CFG0 EQU 0x400108c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG1\r
-CYDEV_UCFG_B0_P4_U1_CFG1 EQU 0x400108c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG2\r
-CYDEV_UCFG_B0_P4_U1_CFG2 EQU 0x400108c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG3\r
-CYDEV_UCFG_B0_P4_U1_CFG3 EQU 0x400108c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG4\r
-CYDEV_UCFG_B0_P4_U1_CFG4 EQU 0x400108c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG5\r
-CYDEV_UCFG_B0_P4_U1_CFG5 EQU 0x400108c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG6\r
-CYDEV_UCFG_B0_P4_U1_CFG6 EQU 0x400108c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG7\r
-CYDEV_UCFG_B0_P4_U1_CFG7 EQU 0x400108c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG8\r
-CYDEV_UCFG_B0_P4_U1_CFG8 EQU 0x400108c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG9\r
-CYDEV_UCFG_B0_P4_U1_CFG9 EQU 0x400108c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG10\r
-CYDEV_UCFG_B0_P4_U1_CFG10 EQU 0x400108ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG11\r
-CYDEV_UCFG_B0_P4_U1_CFG11 EQU 0x400108cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG12\r
-CYDEV_UCFG_B0_P4_U1_CFG12 EQU 0x400108cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG13\r
-CYDEV_UCFG_B0_P4_U1_CFG13 EQU 0x400108cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG14\r
-CYDEV_UCFG_B0_P4_U1_CFG14 EQU 0x400108ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG15\r
-CYDEV_UCFG_B0_P4_U1_CFG15 EQU 0x400108cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG16\r
-CYDEV_UCFG_B0_P4_U1_CFG16 EQU 0x400108d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG17\r
-CYDEV_UCFG_B0_P4_U1_CFG17 EQU 0x400108d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG18\r
-CYDEV_UCFG_B0_P4_U1_CFG18 EQU 0x400108d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG19\r
-CYDEV_UCFG_B0_P4_U1_CFG19 EQU 0x400108d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG20\r
-CYDEV_UCFG_B0_P4_U1_CFG20 EQU 0x400108d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG21\r
-CYDEV_UCFG_B0_P4_U1_CFG21 EQU 0x400108d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG22\r
-CYDEV_UCFG_B0_P4_U1_CFG22 EQU 0x400108d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG23\r
-CYDEV_UCFG_B0_P4_U1_CFG23 EQU 0x400108d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG24\r
-CYDEV_UCFG_B0_P4_U1_CFG24 EQU 0x400108d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG25\r
-CYDEV_UCFG_B0_P4_U1_CFG25 EQU 0x400108d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG26\r
-CYDEV_UCFG_B0_P4_U1_CFG26 EQU 0x400108da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG27\r
-CYDEV_UCFG_B0_P4_U1_CFG27 EQU 0x400108db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG28\r
-CYDEV_UCFG_B0_P4_U1_CFG28 EQU 0x400108dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG29\r
-CYDEV_UCFG_B0_P4_U1_CFG29 EQU 0x400108dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG30\r
-CYDEV_UCFG_B0_P4_U1_CFG30 EQU 0x400108de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_CFG31\r
-CYDEV_UCFG_B0_P4_U1_CFG31 EQU 0x400108df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG0\r
-CYDEV_UCFG_B0_P4_U1_DCFG0 EQU 0x400108e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG1\r
-CYDEV_UCFG_B0_P4_U1_DCFG1 EQU 0x400108e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG2\r
-CYDEV_UCFG_B0_P4_U1_DCFG2 EQU 0x400108e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG3\r
-CYDEV_UCFG_B0_P4_U1_DCFG3 EQU 0x400108e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG4\r
-CYDEV_UCFG_B0_P4_U1_DCFG4 EQU 0x400108e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG5\r
-CYDEV_UCFG_B0_P4_U1_DCFG5 EQU 0x400108ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG6\r
-CYDEV_UCFG_B0_P4_U1_DCFG6 EQU 0x400108ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_DCFG7\r
-CYDEV_UCFG_B0_P4_U1_DCFG7 EQU 0x400108ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_BASE\r
-CYDEV_UCFG_B0_P4_ROUTE_BASE EQU 0x40010900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P4_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_BASE\r
-CYDEV_UCFG_B0_P5_BASE EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_SIZE\r
-CYDEV_UCFG_B0_P5_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_BASE\r
-CYDEV_UCFG_B0_P5_U0_BASE EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_SIZE\r
-CYDEV_UCFG_B0_P5_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT0 EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT1 EQU 0x40010a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT2 EQU 0x40010a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT3 EQU 0x40010a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT4 EQU 0x40010a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT5 EQU 0x40010a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT6 EQU 0x40010a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT7 EQU 0x40010a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT8 EQU 0x40010a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT9 EQU 0x40010a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT10 EQU 0x40010a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P5_U0_PLD_IT11 EQU 0x40010a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P5_U0_PLD_ORT0 EQU 0x40010a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P5_U0_PLD_ORT1 EQU 0x40010a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P5_U0_PLD_ORT2 EQU 0x40010a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P5_U0_PLD_ORT3 EQU 0x40010a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P5_U0_MC_CFG_CEN_CONST EQU 0x40010a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P5_U0_MC_CFG_XORFB EQU 0x40010a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P5_U0_MC_CFG_SET_RESET EQU 0x40010a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P5_U0_MC_CFG_BYPASS EQU 0x40010a3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG0\r
-CYDEV_UCFG_B0_P5_U0_CFG0 EQU 0x40010a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG1\r
-CYDEV_UCFG_B0_P5_U0_CFG1 EQU 0x40010a41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG2\r
-CYDEV_UCFG_B0_P5_U0_CFG2 EQU 0x40010a42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG3\r
-CYDEV_UCFG_B0_P5_U0_CFG3 EQU 0x40010a43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG4\r
-CYDEV_UCFG_B0_P5_U0_CFG4 EQU 0x40010a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG5\r
-CYDEV_UCFG_B0_P5_U0_CFG5 EQU 0x40010a45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG6\r
-CYDEV_UCFG_B0_P5_U0_CFG6 EQU 0x40010a46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG7\r
-CYDEV_UCFG_B0_P5_U0_CFG7 EQU 0x40010a47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG8\r
-CYDEV_UCFG_B0_P5_U0_CFG8 EQU 0x40010a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG9\r
-CYDEV_UCFG_B0_P5_U0_CFG9 EQU 0x40010a49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG10\r
-CYDEV_UCFG_B0_P5_U0_CFG10 EQU 0x40010a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG11\r
-CYDEV_UCFG_B0_P5_U0_CFG11 EQU 0x40010a4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG12\r
-CYDEV_UCFG_B0_P5_U0_CFG12 EQU 0x40010a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG13\r
-CYDEV_UCFG_B0_P5_U0_CFG13 EQU 0x40010a4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG14\r
-CYDEV_UCFG_B0_P5_U0_CFG14 EQU 0x40010a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG15\r
-CYDEV_UCFG_B0_P5_U0_CFG15 EQU 0x40010a4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG16\r
-CYDEV_UCFG_B0_P5_U0_CFG16 EQU 0x40010a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG17\r
-CYDEV_UCFG_B0_P5_U0_CFG17 EQU 0x40010a51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG18\r
-CYDEV_UCFG_B0_P5_U0_CFG18 EQU 0x40010a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG19\r
-CYDEV_UCFG_B0_P5_U0_CFG19 EQU 0x40010a53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG20\r
-CYDEV_UCFG_B0_P5_U0_CFG20 EQU 0x40010a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG21\r
-CYDEV_UCFG_B0_P5_U0_CFG21 EQU 0x40010a55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG22\r
-CYDEV_UCFG_B0_P5_U0_CFG22 EQU 0x40010a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG23\r
-CYDEV_UCFG_B0_P5_U0_CFG23 EQU 0x40010a57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG24\r
-CYDEV_UCFG_B0_P5_U0_CFG24 EQU 0x40010a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG25\r
-CYDEV_UCFG_B0_P5_U0_CFG25 EQU 0x40010a59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG26\r
-CYDEV_UCFG_B0_P5_U0_CFG26 EQU 0x40010a5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG27\r
-CYDEV_UCFG_B0_P5_U0_CFG27 EQU 0x40010a5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG28\r
-CYDEV_UCFG_B0_P5_U0_CFG28 EQU 0x40010a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG29\r
-CYDEV_UCFG_B0_P5_U0_CFG29 EQU 0x40010a5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG30\r
-CYDEV_UCFG_B0_P5_U0_CFG30 EQU 0x40010a5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_CFG31\r
-CYDEV_UCFG_B0_P5_U0_CFG31 EQU 0x40010a5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG0\r
-CYDEV_UCFG_B0_P5_U0_DCFG0 EQU 0x40010a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG1\r
-CYDEV_UCFG_B0_P5_U0_DCFG1 EQU 0x40010a62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG2\r
-CYDEV_UCFG_B0_P5_U0_DCFG2 EQU 0x40010a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG3\r
-CYDEV_UCFG_B0_P5_U0_DCFG3 EQU 0x40010a66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG4\r
-CYDEV_UCFG_B0_P5_U0_DCFG4 EQU 0x40010a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG5\r
-CYDEV_UCFG_B0_P5_U0_DCFG5 EQU 0x40010a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG6\r
-CYDEV_UCFG_B0_P5_U0_DCFG6 EQU 0x40010a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_DCFG7\r
-CYDEV_UCFG_B0_P5_U0_DCFG7 EQU 0x40010a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_BASE\r
-CYDEV_UCFG_B0_P5_U1_BASE EQU 0x40010a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_SIZE\r
-CYDEV_UCFG_B0_P5_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT0 EQU 0x40010a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT1 EQU 0x40010a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT2 EQU 0x40010a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT3 EQU 0x40010a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT4 EQU 0x40010a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT5 EQU 0x40010a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT6 EQU 0x40010a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT7 EQU 0x40010a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT8 EQU 0x40010aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT9 EQU 0x40010aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT10 EQU 0x40010aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P5_U1_PLD_IT11 EQU 0x40010aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P5_U1_PLD_ORT0 EQU 0x40010ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P5_U1_PLD_ORT1 EQU 0x40010ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P5_U1_PLD_ORT2 EQU 0x40010ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P5_U1_PLD_ORT3 EQU 0x40010ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P5_U1_MC_CFG_CEN_CONST EQU 0x40010ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P5_U1_MC_CFG_XORFB EQU 0x40010aba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P5_U1_MC_CFG_SET_RESET EQU 0x40010abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P5_U1_MC_CFG_BYPASS EQU 0x40010abe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG0\r
-CYDEV_UCFG_B0_P5_U1_CFG0 EQU 0x40010ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG1\r
-CYDEV_UCFG_B0_P5_U1_CFG1 EQU 0x40010ac1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG2\r
-CYDEV_UCFG_B0_P5_U1_CFG2 EQU 0x40010ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG3\r
-CYDEV_UCFG_B0_P5_U1_CFG3 EQU 0x40010ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG4\r
-CYDEV_UCFG_B0_P5_U1_CFG4 EQU 0x40010ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG5\r
-CYDEV_UCFG_B0_P5_U1_CFG5 EQU 0x40010ac5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG6\r
-CYDEV_UCFG_B0_P5_U1_CFG6 EQU 0x40010ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG7\r
-CYDEV_UCFG_B0_P5_U1_CFG7 EQU 0x40010ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG8\r
-CYDEV_UCFG_B0_P5_U1_CFG8 EQU 0x40010ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG9\r
-CYDEV_UCFG_B0_P5_U1_CFG9 EQU 0x40010ac9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG10\r
-CYDEV_UCFG_B0_P5_U1_CFG10 EQU 0x40010aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG11\r
-CYDEV_UCFG_B0_P5_U1_CFG11 EQU 0x40010acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG12\r
-CYDEV_UCFG_B0_P5_U1_CFG12 EQU 0x40010acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG13\r
-CYDEV_UCFG_B0_P5_U1_CFG13 EQU 0x40010acd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG14\r
-CYDEV_UCFG_B0_P5_U1_CFG14 EQU 0x40010ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG15\r
-CYDEV_UCFG_B0_P5_U1_CFG15 EQU 0x40010acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG16\r
-CYDEV_UCFG_B0_P5_U1_CFG16 EQU 0x40010ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG17\r
-CYDEV_UCFG_B0_P5_U1_CFG17 EQU 0x40010ad1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG18\r
-CYDEV_UCFG_B0_P5_U1_CFG18 EQU 0x40010ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG19\r
-CYDEV_UCFG_B0_P5_U1_CFG19 EQU 0x40010ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG20\r
-CYDEV_UCFG_B0_P5_U1_CFG20 EQU 0x40010ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG21\r
-CYDEV_UCFG_B0_P5_U1_CFG21 EQU 0x40010ad5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG22\r
-CYDEV_UCFG_B0_P5_U1_CFG22 EQU 0x40010ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG23\r
-CYDEV_UCFG_B0_P5_U1_CFG23 EQU 0x40010ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG24\r
-CYDEV_UCFG_B0_P5_U1_CFG24 EQU 0x40010ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG25\r
-CYDEV_UCFG_B0_P5_U1_CFG25 EQU 0x40010ad9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG26\r
-CYDEV_UCFG_B0_P5_U1_CFG26 EQU 0x40010ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG27\r
-CYDEV_UCFG_B0_P5_U1_CFG27 EQU 0x40010adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG28\r
-CYDEV_UCFG_B0_P5_U1_CFG28 EQU 0x40010adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG29\r
-CYDEV_UCFG_B0_P5_U1_CFG29 EQU 0x40010add\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG30\r
-CYDEV_UCFG_B0_P5_U1_CFG30 EQU 0x40010ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_CFG31\r
-CYDEV_UCFG_B0_P5_U1_CFG31 EQU 0x40010adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG0\r
-CYDEV_UCFG_B0_P5_U1_DCFG0 EQU 0x40010ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG1\r
-CYDEV_UCFG_B0_P5_U1_DCFG1 EQU 0x40010ae2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG2\r
-CYDEV_UCFG_B0_P5_U1_DCFG2 EQU 0x40010ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG3\r
-CYDEV_UCFG_B0_P5_U1_DCFG3 EQU 0x40010ae6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG4\r
-CYDEV_UCFG_B0_P5_U1_DCFG4 EQU 0x40010ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG5\r
-CYDEV_UCFG_B0_P5_U1_DCFG5 EQU 0x40010aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG6\r
-CYDEV_UCFG_B0_P5_U1_DCFG6 EQU 0x40010aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_DCFG7\r
-CYDEV_UCFG_B0_P5_U1_DCFG7 EQU 0x40010aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_BASE\r
-CYDEV_UCFG_B0_P5_ROUTE_BASE EQU 0x40010b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P5_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_BASE\r
-CYDEV_UCFG_B0_P6_BASE EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_SIZE\r
-CYDEV_UCFG_B0_P6_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_BASE\r
-CYDEV_UCFG_B0_P6_U0_BASE EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_SIZE\r
-CYDEV_UCFG_B0_P6_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT0 EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT1 EQU 0x40010c04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT2 EQU 0x40010c08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT3 EQU 0x40010c0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT4 EQU 0x40010c10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT5 EQU 0x40010c14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT6 EQU 0x40010c18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT7 EQU 0x40010c1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT8 EQU 0x40010c20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT9 EQU 0x40010c24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT10 EQU 0x40010c28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P6_U0_PLD_IT11 EQU 0x40010c2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P6_U0_PLD_ORT0 EQU 0x40010c30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P6_U0_PLD_ORT1 EQU 0x40010c32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P6_U0_PLD_ORT2 EQU 0x40010c34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P6_U0_PLD_ORT3 EQU 0x40010c36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P6_U0_MC_CFG_CEN_CONST EQU 0x40010c38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P6_U0_MC_CFG_XORFB EQU 0x40010c3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P6_U0_MC_CFG_SET_RESET EQU 0x40010c3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P6_U0_MC_CFG_BYPASS EQU 0x40010c3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG0\r
-CYDEV_UCFG_B0_P6_U0_CFG0 EQU 0x40010c40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG1\r
-CYDEV_UCFG_B0_P6_U0_CFG1 EQU 0x40010c41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG2\r
-CYDEV_UCFG_B0_P6_U0_CFG2 EQU 0x40010c42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG3\r
-CYDEV_UCFG_B0_P6_U0_CFG3 EQU 0x40010c43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG4\r
-CYDEV_UCFG_B0_P6_U0_CFG4 EQU 0x40010c44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG5\r
-CYDEV_UCFG_B0_P6_U0_CFG5 EQU 0x40010c45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG6\r
-CYDEV_UCFG_B0_P6_U0_CFG6 EQU 0x40010c46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG7\r
-CYDEV_UCFG_B0_P6_U0_CFG7 EQU 0x40010c47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG8\r
-CYDEV_UCFG_B0_P6_U0_CFG8 EQU 0x40010c48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG9\r
-CYDEV_UCFG_B0_P6_U0_CFG9 EQU 0x40010c49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG10\r
-CYDEV_UCFG_B0_P6_U0_CFG10 EQU 0x40010c4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG11\r
-CYDEV_UCFG_B0_P6_U0_CFG11 EQU 0x40010c4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG12\r
-CYDEV_UCFG_B0_P6_U0_CFG12 EQU 0x40010c4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG13\r
-CYDEV_UCFG_B0_P6_U0_CFG13 EQU 0x40010c4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG14\r
-CYDEV_UCFG_B0_P6_U0_CFG14 EQU 0x40010c4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG15\r
-CYDEV_UCFG_B0_P6_U0_CFG15 EQU 0x40010c4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG16\r
-CYDEV_UCFG_B0_P6_U0_CFG16 EQU 0x40010c50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG17\r
-CYDEV_UCFG_B0_P6_U0_CFG17 EQU 0x40010c51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG18\r
-CYDEV_UCFG_B0_P6_U0_CFG18 EQU 0x40010c52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG19\r
-CYDEV_UCFG_B0_P6_U0_CFG19 EQU 0x40010c53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG20\r
-CYDEV_UCFG_B0_P6_U0_CFG20 EQU 0x40010c54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG21\r
-CYDEV_UCFG_B0_P6_U0_CFG21 EQU 0x40010c55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG22\r
-CYDEV_UCFG_B0_P6_U0_CFG22 EQU 0x40010c56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG23\r
-CYDEV_UCFG_B0_P6_U0_CFG23 EQU 0x40010c57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG24\r
-CYDEV_UCFG_B0_P6_U0_CFG24 EQU 0x40010c58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG25\r
-CYDEV_UCFG_B0_P6_U0_CFG25 EQU 0x40010c59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG26\r
-CYDEV_UCFG_B0_P6_U0_CFG26 EQU 0x40010c5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG27\r
-CYDEV_UCFG_B0_P6_U0_CFG27 EQU 0x40010c5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG28\r
-CYDEV_UCFG_B0_P6_U0_CFG28 EQU 0x40010c5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG29\r
-CYDEV_UCFG_B0_P6_U0_CFG29 EQU 0x40010c5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG30\r
-CYDEV_UCFG_B0_P6_U0_CFG30 EQU 0x40010c5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_CFG31\r
-CYDEV_UCFG_B0_P6_U0_CFG31 EQU 0x40010c5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG0\r
-CYDEV_UCFG_B0_P6_U0_DCFG0 EQU 0x40010c60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG1\r
-CYDEV_UCFG_B0_P6_U0_DCFG1 EQU 0x40010c62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG2\r
-CYDEV_UCFG_B0_P6_U0_DCFG2 EQU 0x40010c64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG3\r
-CYDEV_UCFG_B0_P6_U0_DCFG3 EQU 0x40010c66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG4\r
-CYDEV_UCFG_B0_P6_U0_DCFG4 EQU 0x40010c68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG5\r
-CYDEV_UCFG_B0_P6_U0_DCFG5 EQU 0x40010c6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG6\r
-CYDEV_UCFG_B0_P6_U0_DCFG6 EQU 0x40010c6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_DCFG7\r
-CYDEV_UCFG_B0_P6_U0_DCFG7 EQU 0x40010c6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_BASE\r
-CYDEV_UCFG_B0_P6_U1_BASE EQU 0x40010c80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_SIZE\r
-CYDEV_UCFG_B0_P6_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT0 EQU 0x40010c80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT1 EQU 0x40010c84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT2 EQU 0x40010c88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT3 EQU 0x40010c8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT4 EQU 0x40010c90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT5 EQU 0x40010c94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT6 EQU 0x40010c98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT7 EQU 0x40010c9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT8 EQU 0x40010ca0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT9 EQU 0x40010ca4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT10 EQU 0x40010ca8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P6_U1_PLD_IT11 EQU 0x40010cac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P6_U1_PLD_ORT0 EQU 0x40010cb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P6_U1_PLD_ORT1 EQU 0x40010cb2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P6_U1_PLD_ORT2 EQU 0x40010cb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P6_U1_PLD_ORT3 EQU 0x40010cb6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P6_U1_MC_CFG_CEN_CONST EQU 0x40010cb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P6_U1_MC_CFG_XORFB EQU 0x40010cba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P6_U1_MC_CFG_SET_RESET EQU 0x40010cbc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P6_U1_MC_CFG_BYPASS EQU 0x40010cbe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG0\r
-CYDEV_UCFG_B0_P6_U1_CFG0 EQU 0x40010cc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG1\r
-CYDEV_UCFG_B0_P6_U1_CFG1 EQU 0x40010cc1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG2\r
-CYDEV_UCFG_B0_P6_U1_CFG2 EQU 0x40010cc2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG3\r
-CYDEV_UCFG_B0_P6_U1_CFG3 EQU 0x40010cc3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG4\r
-CYDEV_UCFG_B0_P6_U1_CFG4 EQU 0x40010cc4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG5\r
-CYDEV_UCFG_B0_P6_U1_CFG5 EQU 0x40010cc5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG6\r
-CYDEV_UCFG_B0_P6_U1_CFG6 EQU 0x40010cc6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG7\r
-CYDEV_UCFG_B0_P6_U1_CFG7 EQU 0x40010cc7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG8\r
-CYDEV_UCFG_B0_P6_U1_CFG8 EQU 0x40010cc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG9\r
-CYDEV_UCFG_B0_P6_U1_CFG9 EQU 0x40010cc9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG10\r
-CYDEV_UCFG_B0_P6_U1_CFG10 EQU 0x40010cca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG11\r
-CYDEV_UCFG_B0_P6_U1_CFG11 EQU 0x40010ccb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG12\r
-CYDEV_UCFG_B0_P6_U1_CFG12 EQU 0x40010ccc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG13\r
-CYDEV_UCFG_B0_P6_U1_CFG13 EQU 0x40010ccd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG14\r
-CYDEV_UCFG_B0_P6_U1_CFG14 EQU 0x40010cce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG15\r
-CYDEV_UCFG_B0_P6_U1_CFG15 EQU 0x40010ccf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG16\r
-CYDEV_UCFG_B0_P6_U1_CFG16 EQU 0x40010cd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG17\r
-CYDEV_UCFG_B0_P6_U1_CFG17 EQU 0x40010cd1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG18\r
-CYDEV_UCFG_B0_P6_U1_CFG18 EQU 0x40010cd2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG19\r
-CYDEV_UCFG_B0_P6_U1_CFG19 EQU 0x40010cd3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG20\r
-CYDEV_UCFG_B0_P6_U1_CFG20 EQU 0x40010cd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG21\r
-CYDEV_UCFG_B0_P6_U1_CFG21 EQU 0x40010cd5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG22\r
-CYDEV_UCFG_B0_P6_U1_CFG22 EQU 0x40010cd6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG23\r
-CYDEV_UCFG_B0_P6_U1_CFG23 EQU 0x40010cd7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG24\r
-CYDEV_UCFG_B0_P6_U1_CFG24 EQU 0x40010cd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG25\r
-CYDEV_UCFG_B0_P6_U1_CFG25 EQU 0x40010cd9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG26\r
-CYDEV_UCFG_B0_P6_U1_CFG26 EQU 0x40010cda\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG27\r
-CYDEV_UCFG_B0_P6_U1_CFG27 EQU 0x40010cdb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG28\r
-CYDEV_UCFG_B0_P6_U1_CFG28 EQU 0x40010cdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG29\r
-CYDEV_UCFG_B0_P6_U1_CFG29 EQU 0x40010cdd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG30\r
-CYDEV_UCFG_B0_P6_U1_CFG30 EQU 0x40010cde\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_CFG31\r
-CYDEV_UCFG_B0_P6_U1_CFG31 EQU 0x40010cdf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG0\r
-CYDEV_UCFG_B0_P6_U1_DCFG0 EQU 0x40010ce0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG1\r
-CYDEV_UCFG_B0_P6_U1_DCFG1 EQU 0x40010ce2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG2\r
-CYDEV_UCFG_B0_P6_U1_DCFG2 EQU 0x40010ce4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG3\r
-CYDEV_UCFG_B0_P6_U1_DCFG3 EQU 0x40010ce6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG4\r
-CYDEV_UCFG_B0_P6_U1_DCFG4 EQU 0x40010ce8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG5\r
-CYDEV_UCFG_B0_P6_U1_DCFG5 EQU 0x40010cea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG6\r
-CYDEV_UCFG_B0_P6_U1_DCFG6 EQU 0x40010cec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_DCFG7\r
-CYDEV_UCFG_B0_P6_U1_DCFG7 EQU 0x40010cee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_BASE\r
-CYDEV_UCFG_B0_P6_ROUTE_BASE EQU 0x40010d00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P6_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_BASE\r
-CYDEV_UCFG_B0_P7_BASE EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_SIZE\r
-CYDEV_UCFG_B0_P7_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_BASE\r
-CYDEV_UCFG_B0_P7_U0_BASE EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_SIZE\r
-CYDEV_UCFG_B0_P7_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT0\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT0 EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT1\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT1 EQU 0x40010e04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT2\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT2 EQU 0x40010e08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT3\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT3 EQU 0x40010e0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT4\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT4 EQU 0x40010e10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT5\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT5 EQU 0x40010e14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT6\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT6 EQU 0x40010e18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT7\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT7 EQU 0x40010e1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT8\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT8 EQU 0x40010e20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT9\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT9 EQU 0x40010e24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT10\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT10 EQU 0x40010e28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_IT11\r
-CYDEV_UCFG_B0_P7_U0_PLD_IT11 EQU 0x40010e2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_ORT0\r
-CYDEV_UCFG_B0_P7_U0_PLD_ORT0 EQU 0x40010e30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_ORT1\r
-CYDEV_UCFG_B0_P7_U0_PLD_ORT1 EQU 0x40010e32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_ORT2\r
-CYDEV_UCFG_B0_P7_U0_PLD_ORT2 EQU 0x40010e34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_PLD_ORT3\r
-CYDEV_UCFG_B0_P7_U0_PLD_ORT3 EQU 0x40010e36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P7_U0_MC_CFG_CEN_CONST EQU 0x40010e38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P7_U0_MC_CFG_XORFB EQU 0x40010e3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P7_U0_MC_CFG_SET_RESET EQU 0x40010e3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P7_U0_MC_CFG_BYPASS EQU 0x40010e3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG0\r
-CYDEV_UCFG_B0_P7_U0_CFG0 EQU 0x40010e40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG1\r
-CYDEV_UCFG_B0_P7_U0_CFG1 EQU 0x40010e41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG2\r
-CYDEV_UCFG_B0_P7_U0_CFG2 EQU 0x40010e42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG3\r
-CYDEV_UCFG_B0_P7_U0_CFG3 EQU 0x40010e43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG4\r
-CYDEV_UCFG_B0_P7_U0_CFG4 EQU 0x40010e44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG5\r
-CYDEV_UCFG_B0_P7_U0_CFG5 EQU 0x40010e45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG6\r
-CYDEV_UCFG_B0_P7_U0_CFG6 EQU 0x40010e46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG7\r
-CYDEV_UCFG_B0_P7_U0_CFG7 EQU 0x40010e47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG8\r
-CYDEV_UCFG_B0_P7_U0_CFG8 EQU 0x40010e48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG9\r
-CYDEV_UCFG_B0_P7_U0_CFG9 EQU 0x40010e49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG10\r
-CYDEV_UCFG_B0_P7_U0_CFG10 EQU 0x40010e4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG11\r
-CYDEV_UCFG_B0_P7_U0_CFG11 EQU 0x40010e4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG12\r
-CYDEV_UCFG_B0_P7_U0_CFG12 EQU 0x40010e4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG13\r
-CYDEV_UCFG_B0_P7_U0_CFG13 EQU 0x40010e4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG14\r
-CYDEV_UCFG_B0_P7_U0_CFG14 EQU 0x40010e4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG15\r
-CYDEV_UCFG_B0_P7_U0_CFG15 EQU 0x40010e4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG16\r
-CYDEV_UCFG_B0_P7_U0_CFG16 EQU 0x40010e50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG17\r
-CYDEV_UCFG_B0_P7_U0_CFG17 EQU 0x40010e51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG18\r
-CYDEV_UCFG_B0_P7_U0_CFG18 EQU 0x40010e52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG19\r
-CYDEV_UCFG_B0_P7_U0_CFG19 EQU 0x40010e53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG20\r
-CYDEV_UCFG_B0_P7_U0_CFG20 EQU 0x40010e54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG21\r
-CYDEV_UCFG_B0_P7_U0_CFG21 EQU 0x40010e55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG22\r
-CYDEV_UCFG_B0_P7_U0_CFG22 EQU 0x40010e56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG23\r
-CYDEV_UCFG_B0_P7_U0_CFG23 EQU 0x40010e57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG24\r
-CYDEV_UCFG_B0_P7_U0_CFG24 EQU 0x40010e58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG25\r
-CYDEV_UCFG_B0_P7_U0_CFG25 EQU 0x40010e59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG26\r
-CYDEV_UCFG_B0_P7_U0_CFG26 EQU 0x40010e5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG27\r
-CYDEV_UCFG_B0_P7_U0_CFG27 EQU 0x40010e5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG28\r
-CYDEV_UCFG_B0_P7_U0_CFG28 EQU 0x40010e5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG29\r
-CYDEV_UCFG_B0_P7_U0_CFG29 EQU 0x40010e5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG30\r
-CYDEV_UCFG_B0_P7_U0_CFG30 EQU 0x40010e5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_CFG31\r
-CYDEV_UCFG_B0_P7_U0_CFG31 EQU 0x40010e5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG0\r
-CYDEV_UCFG_B0_P7_U0_DCFG0 EQU 0x40010e60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG1\r
-CYDEV_UCFG_B0_P7_U0_DCFG1 EQU 0x40010e62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG2\r
-CYDEV_UCFG_B0_P7_U0_DCFG2 EQU 0x40010e64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG3\r
-CYDEV_UCFG_B0_P7_U0_DCFG3 EQU 0x40010e66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG4\r
-CYDEV_UCFG_B0_P7_U0_DCFG4 EQU 0x40010e68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG5\r
-CYDEV_UCFG_B0_P7_U0_DCFG5 EQU 0x40010e6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG6\r
-CYDEV_UCFG_B0_P7_U0_DCFG6 EQU 0x40010e6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_DCFG7\r
-CYDEV_UCFG_B0_P7_U0_DCFG7 EQU 0x40010e6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_BASE\r
-CYDEV_UCFG_B0_P7_U1_BASE EQU 0x40010e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_SIZE\r
-CYDEV_UCFG_B0_P7_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT0\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT0 EQU 0x40010e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT1\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT1 EQU 0x40010e84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT2\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT2 EQU 0x40010e88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT3\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT3 EQU 0x40010e8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT4\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT4 EQU 0x40010e90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT5\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT5 EQU 0x40010e94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT6\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT6 EQU 0x40010e98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT7\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT7 EQU 0x40010e9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT8\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT8 EQU 0x40010ea0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT9\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT9 EQU 0x40010ea4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT10\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT10 EQU 0x40010ea8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_IT11\r
-CYDEV_UCFG_B0_P7_U1_PLD_IT11 EQU 0x40010eac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_ORT0\r
-CYDEV_UCFG_B0_P7_U1_PLD_ORT0 EQU 0x40010eb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_ORT1\r
-CYDEV_UCFG_B0_P7_U1_PLD_ORT1 EQU 0x40010eb2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_ORT2\r
-CYDEV_UCFG_B0_P7_U1_PLD_ORT2 EQU 0x40010eb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_PLD_ORT3\r
-CYDEV_UCFG_B0_P7_U1_PLD_ORT3 EQU 0x40010eb6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B0_P7_U1_MC_CFG_CEN_CONST EQU 0x40010eb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B0_P7_U1_MC_CFG_XORFB EQU 0x40010eba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B0_P7_U1_MC_CFG_SET_RESET EQU 0x40010ebc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B0_P7_U1_MC_CFG_BYPASS EQU 0x40010ebe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG0\r
-CYDEV_UCFG_B0_P7_U1_CFG0 EQU 0x40010ec0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG1\r
-CYDEV_UCFG_B0_P7_U1_CFG1 EQU 0x40010ec1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG2\r
-CYDEV_UCFG_B0_P7_U1_CFG2 EQU 0x40010ec2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG3\r
-CYDEV_UCFG_B0_P7_U1_CFG3 EQU 0x40010ec3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG4\r
-CYDEV_UCFG_B0_P7_U1_CFG4 EQU 0x40010ec4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG5\r
-CYDEV_UCFG_B0_P7_U1_CFG5 EQU 0x40010ec5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG6\r
-CYDEV_UCFG_B0_P7_U1_CFG6 EQU 0x40010ec6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG7\r
-CYDEV_UCFG_B0_P7_U1_CFG7 EQU 0x40010ec7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG8\r
-CYDEV_UCFG_B0_P7_U1_CFG8 EQU 0x40010ec8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG9\r
-CYDEV_UCFG_B0_P7_U1_CFG9 EQU 0x40010ec9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG10\r
-CYDEV_UCFG_B0_P7_U1_CFG10 EQU 0x40010eca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG11\r
-CYDEV_UCFG_B0_P7_U1_CFG11 EQU 0x40010ecb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG12\r
-CYDEV_UCFG_B0_P7_U1_CFG12 EQU 0x40010ecc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG13\r
-CYDEV_UCFG_B0_P7_U1_CFG13 EQU 0x40010ecd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG14\r
-CYDEV_UCFG_B0_P7_U1_CFG14 EQU 0x40010ece\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG15\r
-CYDEV_UCFG_B0_P7_U1_CFG15 EQU 0x40010ecf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG16\r
-CYDEV_UCFG_B0_P7_U1_CFG16 EQU 0x40010ed0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG17\r
-CYDEV_UCFG_B0_P7_U1_CFG17 EQU 0x40010ed1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG18\r
-CYDEV_UCFG_B0_P7_U1_CFG18 EQU 0x40010ed2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG19\r
-CYDEV_UCFG_B0_P7_U1_CFG19 EQU 0x40010ed3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG20\r
-CYDEV_UCFG_B0_P7_U1_CFG20 EQU 0x40010ed4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG21\r
-CYDEV_UCFG_B0_P7_U1_CFG21 EQU 0x40010ed5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG22\r
-CYDEV_UCFG_B0_P7_U1_CFG22 EQU 0x40010ed6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG23\r
-CYDEV_UCFG_B0_P7_U1_CFG23 EQU 0x40010ed7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG24\r
-CYDEV_UCFG_B0_P7_U1_CFG24 EQU 0x40010ed8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG25\r
-CYDEV_UCFG_B0_P7_U1_CFG25 EQU 0x40010ed9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG26\r
-CYDEV_UCFG_B0_P7_U1_CFG26 EQU 0x40010eda\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG27\r
-CYDEV_UCFG_B0_P7_U1_CFG27 EQU 0x40010edb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG28\r
-CYDEV_UCFG_B0_P7_U1_CFG28 EQU 0x40010edc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG29\r
-CYDEV_UCFG_B0_P7_U1_CFG29 EQU 0x40010edd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG30\r
-CYDEV_UCFG_B0_P7_U1_CFG30 EQU 0x40010ede\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_CFG31\r
-CYDEV_UCFG_B0_P7_U1_CFG31 EQU 0x40010edf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG0\r
-CYDEV_UCFG_B0_P7_U1_DCFG0 EQU 0x40010ee0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG1\r
-CYDEV_UCFG_B0_P7_U1_DCFG1 EQU 0x40010ee2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG2\r
-CYDEV_UCFG_B0_P7_U1_DCFG2 EQU 0x40010ee4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG3\r
-CYDEV_UCFG_B0_P7_U1_DCFG3 EQU 0x40010ee6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG4\r
-CYDEV_UCFG_B0_P7_U1_DCFG4 EQU 0x40010ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG5\r
-CYDEV_UCFG_B0_P7_U1_DCFG5 EQU 0x40010eea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG6\r
-CYDEV_UCFG_B0_P7_U1_DCFG6 EQU 0x40010eec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_DCFG7\r
-CYDEV_UCFG_B0_P7_U1_DCFG7 EQU 0x40010eee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_BASE\r
-CYDEV_UCFG_B0_P7_ROUTE_BASE EQU 0x40010f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P7_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_BASE\r
-CYDEV_UCFG_B1_BASE EQU 0x40011000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_SIZE\r
-CYDEV_UCFG_B1_SIZE EQU 0x00000fef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_BASE\r
-CYDEV_UCFG_B1_P2_BASE EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_SIZE\r
-CYDEV_UCFG_B1_P2_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_BASE\r
-CYDEV_UCFG_B1_P2_U0_BASE EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_SIZE\r
-CYDEV_UCFG_B1_P2_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT0\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT0 EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT1\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT1 EQU 0x40011404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT2\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT2 EQU 0x40011408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT3\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT3 EQU 0x4001140c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT4\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT4 EQU 0x40011410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT5\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT5 EQU 0x40011414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT6\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT6 EQU 0x40011418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT7\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT7 EQU 0x4001141c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT8\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT8 EQU 0x40011420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT9\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT9 EQU 0x40011424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT10\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT10 EQU 0x40011428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_IT11\r
-CYDEV_UCFG_B1_P2_U0_PLD_IT11 EQU 0x4001142c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_ORT0\r
-CYDEV_UCFG_B1_P2_U0_PLD_ORT0 EQU 0x40011430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_ORT1\r
-CYDEV_UCFG_B1_P2_U0_PLD_ORT1 EQU 0x40011432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_ORT2\r
-CYDEV_UCFG_B1_P2_U0_PLD_ORT2 EQU 0x40011434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_PLD_ORT3\r
-CYDEV_UCFG_B1_P2_U0_PLD_ORT3 EQU 0x40011436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P2_U0_MC_CFG_CEN_CONST EQU 0x40011438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P2_U0_MC_CFG_XORFB EQU 0x4001143a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P2_U0_MC_CFG_SET_RESET EQU 0x4001143c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P2_U0_MC_CFG_BYPASS EQU 0x4001143e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG0\r
-CYDEV_UCFG_B1_P2_U0_CFG0 EQU 0x40011440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG1\r
-CYDEV_UCFG_B1_P2_U0_CFG1 EQU 0x40011441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG2\r
-CYDEV_UCFG_B1_P2_U0_CFG2 EQU 0x40011442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG3\r
-CYDEV_UCFG_B1_P2_U0_CFG3 EQU 0x40011443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG4\r
-CYDEV_UCFG_B1_P2_U0_CFG4 EQU 0x40011444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG5\r
-CYDEV_UCFG_B1_P2_U0_CFG5 EQU 0x40011445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG6\r
-CYDEV_UCFG_B1_P2_U0_CFG6 EQU 0x40011446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG7\r
-CYDEV_UCFG_B1_P2_U0_CFG7 EQU 0x40011447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG8\r
-CYDEV_UCFG_B1_P2_U0_CFG8 EQU 0x40011448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG9\r
-CYDEV_UCFG_B1_P2_U0_CFG9 EQU 0x40011449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG10\r
-CYDEV_UCFG_B1_P2_U0_CFG10 EQU 0x4001144a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG11\r
-CYDEV_UCFG_B1_P2_U0_CFG11 EQU 0x4001144b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG12\r
-CYDEV_UCFG_B1_P2_U0_CFG12 EQU 0x4001144c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG13\r
-CYDEV_UCFG_B1_P2_U0_CFG13 EQU 0x4001144d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG14\r
-CYDEV_UCFG_B1_P2_U0_CFG14 EQU 0x4001144e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG15\r
-CYDEV_UCFG_B1_P2_U0_CFG15 EQU 0x4001144f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG16\r
-CYDEV_UCFG_B1_P2_U0_CFG16 EQU 0x40011450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG17\r
-CYDEV_UCFG_B1_P2_U0_CFG17 EQU 0x40011451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG18\r
-CYDEV_UCFG_B1_P2_U0_CFG18 EQU 0x40011452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG19\r
-CYDEV_UCFG_B1_P2_U0_CFG19 EQU 0x40011453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG20\r
-CYDEV_UCFG_B1_P2_U0_CFG20 EQU 0x40011454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG21\r
-CYDEV_UCFG_B1_P2_U0_CFG21 EQU 0x40011455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG22\r
-CYDEV_UCFG_B1_P2_U0_CFG22 EQU 0x40011456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG23\r
-CYDEV_UCFG_B1_P2_U0_CFG23 EQU 0x40011457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG24\r
-CYDEV_UCFG_B1_P2_U0_CFG24 EQU 0x40011458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG25\r
-CYDEV_UCFG_B1_P2_U0_CFG25 EQU 0x40011459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG26\r
-CYDEV_UCFG_B1_P2_U0_CFG26 EQU 0x4001145a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG27\r
-CYDEV_UCFG_B1_P2_U0_CFG27 EQU 0x4001145b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG28\r
-CYDEV_UCFG_B1_P2_U0_CFG28 EQU 0x4001145c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG29\r
-CYDEV_UCFG_B1_P2_U0_CFG29 EQU 0x4001145d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG30\r
-CYDEV_UCFG_B1_P2_U0_CFG30 EQU 0x4001145e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_CFG31\r
-CYDEV_UCFG_B1_P2_U0_CFG31 EQU 0x4001145f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG0\r
-CYDEV_UCFG_B1_P2_U0_DCFG0 EQU 0x40011460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG1\r
-CYDEV_UCFG_B1_P2_U0_DCFG1 EQU 0x40011462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG2\r
-CYDEV_UCFG_B1_P2_U0_DCFG2 EQU 0x40011464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG3\r
-CYDEV_UCFG_B1_P2_U0_DCFG3 EQU 0x40011466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG4\r
-CYDEV_UCFG_B1_P2_U0_DCFG4 EQU 0x40011468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG5\r
-CYDEV_UCFG_B1_P2_U0_DCFG5 EQU 0x4001146a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG6\r
-CYDEV_UCFG_B1_P2_U0_DCFG6 EQU 0x4001146c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_DCFG7\r
-CYDEV_UCFG_B1_P2_U0_DCFG7 EQU 0x4001146e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_BASE\r
-CYDEV_UCFG_B1_P2_U1_BASE EQU 0x40011480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_SIZE\r
-CYDEV_UCFG_B1_P2_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT0\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT0 EQU 0x40011480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT1\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT1 EQU 0x40011484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT2\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT2 EQU 0x40011488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT3\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT3 EQU 0x4001148c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT4\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT4 EQU 0x40011490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT5\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT5 EQU 0x40011494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT6\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT6 EQU 0x40011498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT7\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT7 EQU 0x4001149c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT8\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT8 EQU 0x400114a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT9\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT9 EQU 0x400114a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT10\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT10 EQU 0x400114a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_IT11\r
-CYDEV_UCFG_B1_P2_U1_PLD_IT11 EQU 0x400114ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_ORT0\r
-CYDEV_UCFG_B1_P2_U1_PLD_ORT0 EQU 0x400114b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_ORT1\r
-CYDEV_UCFG_B1_P2_U1_PLD_ORT1 EQU 0x400114b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_ORT2\r
-CYDEV_UCFG_B1_P2_U1_PLD_ORT2 EQU 0x400114b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_PLD_ORT3\r
-CYDEV_UCFG_B1_P2_U1_PLD_ORT3 EQU 0x400114b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P2_U1_MC_CFG_CEN_CONST EQU 0x400114b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P2_U1_MC_CFG_XORFB EQU 0x400114ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P2_U1_MC_CFG_SET_RESET EQU 0x400114bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P2_U1_MC_CFG_BYPASS EQU 0x400114be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG0\r
-CYDEV_UCFG_B1_P2_U1_CFG0 EQU 0x400114c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG1\r
-CYDEV_UCFG_B1_P2_U1_CFG1 EQU 0x400114c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG2\r
-CYDEV_UCFG_B1_P2_U1_CFG2 EQU 0x400114c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG3\r
-CYDEV_UCFG_B1_P2_U1_CFG3 EQU 0x400114c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG4\r
-CYDEV_UCFG_B1_P2_U1_CFG4 EQU 0x400114c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG5\r
-CYDEV_UCFG_B1_P2_U1_CFG5 EQU 0x400114c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG6\r
-CYDEV_UCFG_B1_P2_U1_CFG6 EQU 0x400114c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG7\r
-CYDEV_UCFG_B1_P2_U1_CFG7 EQU 0x400114c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG8\r
-CYDEV_UCFG_B1_P2_U1_CFG8 EQU 0x400114c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG9\r
-CYDEV_UCFG_B1_P2_U1_CFG9 EQU 0x400114c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG10\r
-CYDEV_UCFG_B1_P2_U1_CFG10 EQU 0x400114ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG11\r
-CYDEV_UCFG_B1_P2_U1_CFG11 EQU 0x400114cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG12\r
-CYDEV_UCFG_B1_P2_U1_CFG12 EQU 0x400114cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG13\r
-CYDEV_UCFG_B1_P2_U1_CFG13 EQU 0x400114cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG14\r
-CYDEV_UCFG_B1_P2_U1_CFG14 EQU 0x400114ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG15\r
-CYDEV_UCFG_B1_P2_U1_CFG15 EQU 0x400114cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG16\r
-CYDEV_UCFG_B1_P2_U1_CFG16 EQU 0x400114d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG17\r
-CYDEV_UCFG_B1_P2_U1_CFG17 EQU 0x400114d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG18\r
-CYDEV_UCFG_B1_P2_U1_CFG18 EQU 0x400114d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG19\r
-CYDEV_UCFG_B1_P2_U1_CFG19 EQU 0x400114d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG20\r
-CYDEV_UCFG_B1_P2_U1_CFG20 EQU 0x400114d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG21\r
-CYDEV_UCFG_B1_P2_U1_CFG21 EQU 0x400114d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG22\r
-CYDEV_UCFG_B1_P2_U1_CFG22 EQU 0x400114d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG23\r
-CYDEV_UCFG_B1_P2_U1_CFG23 EQU 0x400114d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG24\r
-CYDEV_UCFG_B1_P2_U1_CFG24 EQU 0x400114d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG25\r
-CYDEV_UCFG_B1_P2_U1_CFG25 EQU 0x400114d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG26\r
-CYDEV_UCFG_B1_P2_U1_CFG26 EQU 0x400114da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG27\r
-CYDEV_UCFG_B1_P2_U1_CFG27 EQU 0x400114db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG28\r
-CYDEV_UCFG_B1_P2_U1_CFG28 EQU 0x400114dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG29\r
-CYDEV_UCFG_B1_P2_U1_CFG29 EQU 0x400114dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG30\r
-CYDEV_UCFG_B1_P2_U1_CFG30 EQU 0x400114de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_CFG31\r
-CYDEV_UCFG_B1_P2_U1_CFG31 EQU 0x400114df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG0\r
-CYDEV_UCFG_B1_P2_U1_DCFG0 EQU 0x400114e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG1\r
-CYDEV_UCFG_B1_P2_U1_DCFG1 EQU 0x400114e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG2\r
-CYDEV_UCFG_B1_P2_U1_DCFG2 EQU 0x400114e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG3\r
-CYDEV_UCFG_B1_P2_U1_DCFG3 EQU 0x400114e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG4\r
-CYDEV_UCFG_B1_P2_U1_DCFG4 EQU 0x400114e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG5\r
-CYDEV_UCFG_B1_P2_U1_DCFG5 EQU 0x400114ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG6\r
-CYDEV_UCFG_B1_P2_U1_DCFG6 EQU 0x400114ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_DCFG7\r
-CYDEV_UCFG_B1_P2_U1_DCFG7 EQU 0x400114ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_BASE\r
-CYDEV_UCFG_B1_P2_ROUTE_BASE EQU 0x40011500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P2_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_BASE\r
-CYDEV_UCFG_B1_P3_BASE EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_SIZE\r
-CYDEV_UCFG_B1_P3_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_BASE\r
-CYDEV_UCFG_B1_P3_U0_BASE EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_SIZE\r
-CYDEV_UCFG_B1_P3_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT0\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT0 EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT1\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT1 EQU 0x40011604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT2\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT2 EQU 0x40011608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT3\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT3 EQU 0x4001160c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT4\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT4 EQU 0x40011610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT5\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT5 EQU 0x40011614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT6\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT6 EQU 0x40011618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT7\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT7 EQU 0x4001161c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT8\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT8 EQU 0x40011620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT9\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT9 EQU 0x40011624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT10\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT10 EQU 0x40011628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_IT11\r
-CYDEV_UCFG_B1_P3_U0_PLD_IT11 EQU 0x4001162c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_ORT0\r
-CYDEV_UCFG_B1_P3_U0_PLD_ORT0 EQU 0x40011630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_ORT1\r
-CYDEV_UCFG_B1_P3_U0_PLD_ORT1 EQU 0x40011632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_ORT2\r
-CYDEV_UCFG_B1_P3_U0_PLD_ORT2 EQU 0x40011634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_PLD_ORT3\r
-CYDEV_UCFG_B1_P3_U0_PLD_ORT3 EQU 0x40011636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P3_U0_MC_CFG_CEN_CONST EQU 0x40011638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P3_U0_MC_CFG_XORFB EQU 0x4001163a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P3_U0_MC_CFG_SET_RESET EQU 0x4001163c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P3_U0_MC_CFG_BYPASS EQU 0x4001163e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG0\r
-CYDEV_UCFG_B1_P3_U0_CFG0 EQU 0x40011640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG1\r
-CYDEV_UCFG_B1_P3_U0_CFG1 EQU 0x40011641\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG2\r
-CYDEV_UCFG_B1_P3_U0_CFG2 EQU 0x40011642\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG3\r
-CYDEV_UCFG_B1_P3_U0_CFG3 EQU 0x40011643\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG4\r
-CYDEV_UCFG_B1_P3_U0_CFG4 EQU 0x40011644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG5\r
-CYDEV_UCFG_B1_P3_U0_CFG5 EQU 0x40011645\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG6\r
-CYDEV_UCFG_B1_P3_U0_CFG6 EQU 0x40011646\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG7\r
-CYDEV_UCFG_B1_P3_U0_CFG7 EQU 0x40011647\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG8\r
-CYDEV_UCFG_B1_P3_U0_CFG8 EQU 0x40011648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG9\r
-CYDEV_UCFG_B1_P3_U0_CFG9 EQU 0x40011649\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG10\r
-CYDEV_UCFG_B1_P3_U0_CFG10 EQU 0x4001164a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG11\r
-CYDEV_UCFG_B1_P3_U0_CFG11 EQU 0x4001164b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG12\r
-CYDEV_UCFG_B1_P3_U0_CFG12 EQU 0x4001164c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG13\r
-CYDEV_UCFG_B1_P3_U0_CFG13 EQU 0x4001164d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG14\r
-CYDEV_UCFG_B1_P3_U0_CFG14 EQU 0x4001164e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG15\r
-CYDEV_UCFG_B1_P3_U0_CFG15 EQU 0x4001164f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG16\r
-CYDEV_UCFG_B1_P3_U0_CFG16 EQU 0x40011650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG17\r
-CYDEV_UCFG_B1_P3_U0_CFG17 EQU 0x40011651\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG18\r
-CYDEV_UCFG_B1_P3_U0_CFG18 EQU 0x40011652\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG19\r
-CYDEV_UCFG_B1_P3_U0_CFG19 EQU 0x40011653\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG20\r
-CYDEV_UCFG_B1_P3_U0_CFG20 EQU 0x40011654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG21\r
-CYDEV_UCFG_B1_P3_U0_CFG21 EQU 0x40011655\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG22\r
-CYDEV_UCFG_B1_P3_U0_CFG22 EQU 0x40011656\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG23\r
-CYDEV_UCFG_B1_P3_U0_CFG23 EQU 0x40011657\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG24\r
-CYDEV_UCFG_B1_P3_U0_CFG24 EQU 0x40011658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG25\r
-CYDEV_UCFG_B1_P3_U0_CFG25 EQU 0x40011659\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG26\r
-CYDEV_UCFG_B1_P3_U0_CFG26 EQU 0x4001165a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG27\r
-CYDEV_UCFG_B1_P3_U0_CFG27 EQU 0x4001165b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG28\r
-CYDEV_UCFG_B1_P3_U0_CFG28 EQU 0x4001165c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG29\r
-CYDEV_UCFG_B1_P3_U0_CFG29 EQU 0x4001165d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG30\r
-CYDEV_UCFG_B1_P3_U0_CFG30 EQU 0x4001165e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_CFG31\r
-CYDEV_UCFG_B1_P3_U0_CFG31 EQU 0x4001165f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG0\r
-CYDEV_UCFG_B1_P3_U0_DCFG0 EQU 0x40011660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG1\r
-CYDEV_UCFG_B1_P3_U0_DCFG1 EQU 0x40011662\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG2\r
-CYDEV_UCFG_B1_P3_U0_DCFG2 EQU 0x40011664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG3\r
-CYDEV_UCFG_B1_P3_U0_DCFG3 EQU 0x40011666\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG4\r
-CYDEV_UCFG_B1_P3_U0_DCFG4 EQU 0x40011668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG5\r
-CYDEV_UCFG_B1_P3_U0_DCFG5 EQU 0x4001166a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG6\r
-CYDEV_UCFG_B1_P3_U0_DCFG6 EQU 0x4001166c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_DCFG7\r
-CYDEV_UCFG_B1_P3_U0_DCFG7 EQU 0x4001166e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_BASE\r
-CYDEV_UCFG_B1_P3_U1_BASE EQU 0x40011680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_SIZE\r
-CYDEV_UCFG_B1_P3_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT0\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT0 EQU 0x40011680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT1\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT1 EQU 0x40011684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT2\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT2 EQU 0x40011688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT3\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT3 EQU 0x4001168c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT4\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT4 EQU 0x40011690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT5\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT5 EQU 0x40011694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT6\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT6 EQU 0x40011698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT7\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT7 EQU 0x4001169c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT8\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT8 EQU 0x400116a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT9\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT9 EQU 0x400116a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT10\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT10 EQU 0x400116a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_IT11\r
-CYDEV_UCFG_B1_P3_U1_PLD_IT11 EQU 0x400116ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_ORT0\r
-CYDEV_UCFG_B1_P3_U1_PLD_ORT0 EQU 0x400116b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_ORT1\r
-CYDEV_UCFG_B1_P3_U1_PLD_ORT1 EQU 0x400116b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_ORT2\r
-CYDEV_UCFG_B1_P3_U1_PLD_ORT2 EQU 0x400116b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_PLD_ORT3\r
-CYDEV_UCFG_B1_P3_U1_PLD_ORT3 EQU 0x400116b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P3_U1_MC_CFG_CEN_CONST EQU 0x400116b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P3_U1_MC_CFG_XORFB EQU 0x400116ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P3_U1_MC_CFG_SET_RESET EQU 0x400116bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P3_U1_MC_CFG_BYPASS EQU 0x400116be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG0\r
-CYDEV_UCFG_B1_P3_U1_CFG0 EQU 0x400116c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG1\r
-CYDEV_UCFG_B1_P3_U1_CFG1 EQU 0x400116c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG2\r
-CYDEV_UCFG_B1_P3_U1_CFG2 EQU 0x400116c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG3\r
-CYDEV_UCFG_B1_P3_U1_CFG3 EQU 0x400116c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG4\r
-CYDEV_UCFG_B1_P3_U1_CFG4 EQU 0x400116c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG5\r
-CYDEV_UCFG_B1_P3_U1_CFG5 EQU 0x400116c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG6\r
-CYDEV_UCFG_B1_P3_U1_CFG6 EQU 0x400116c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG7\r
-CYDEV_UCFG_B1_P3_U1_CFG7 EQU 0x400116c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG8\r
-CYDEV_UCFG_B1_P3_U1_CFG8 EQU 0x400116c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG9\r
-CYDEV_UCFG_B1_P3_U1_CFG9 EQU 0x400116c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG10\r
-CYDEV_UCFG_B1_P3_U1_CFG10 EQU 0x400116ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG11\r
-CYDEV_UCFG_B1_P3_U1_CFG11 EQU 0x400116cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG12\r
-CYDEV_UCFG_B1_P3_U1_CFG12 EQU 0x400116cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG13\r
-CYDEV_UCFG_B1_P3_U1_CFG13 EQU 0x400116cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG14\r
-CYDEV_UCFG_B1_P3_U1_CFG14 EQU 0x400116ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG15\r
-CYDEV_UCFG_B1_P3_U1_CFG15 EQU 0x400116cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG16\r
-CYDEV_UCFG_B1_P3_U1_CFG16 EQU 0x400116d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG17\r
-CYDEV_UCFG_B1_P3_U1_CFG17 EQU 0x400116d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG18\r
-CYDEV_UCFG_B1_P3_U1_CFG18 EQU 0x400116d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG19\r
-CYDEV_UCFG_B1_P3_U1_CFG19 EQU 0x400116d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG20\r
-CYDEV_UCFG_B1_P3_U1_CFG20 EQU 0x400116d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG21\r
-CYDEV_UCFG_B1_P3_U1_CFG21 EQU 0x400116d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG22\r
-CYDEV_UCFG_B1_P3_U1_CFG22 EQU 0x400116d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG23\r
-CYDEV_UCFG_B1_P3_U1_CFG23 EQU 0x400116d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG24\r
-CYDEV_UCFG_B1_P3_U1_CFG24 EQU 0x400116d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG25\r
-CYDEV_UCFG_B1_P3_U1_CFG25 EQU 0x400116d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG26\r
-CYDEV_UCFG_B1_P3_U1_CFG26 EQU 0x400116da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG27\r
-CYDEV_UCFG_B1_P3_U1_CFG27 EQU 0x400116db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG28\r
-CYDEV_UCFG_B1_P3_U1_CFG28 EQU 0x400116dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG29\r
-CYDEV_UCFG_B1_P3_U1_CFG29 EQU 0x400116dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG30\r
-CYDEV_UCFG_B1_P3_U1_CFG30 EQU 0x400116de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_CFG31\r
-CYDEV_UCFG_B1_P3_U1_CFG31 EQU 0x400116df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG0\r
-CYDEV_UCFG_B1_P3_U1_DCFG0 EQU 0x400116e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG1\r
-CYDEV_UCFG_B1_P3_U1_DCFG1 EQU 0x400116e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG2\r
-CYDEV_UCFG_B1_P3_U1_DCFG2 EQU 0x400116e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG3\r
-CYDEV_UCFG_B1_P3_U1_DCFG3 EQU 0x400116e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG4\r
-CYDEV_UCFG_B1_P3_U1_DCFG4 EQU 0x400116e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG5\r
-CYDEV_UCFG_B1_P3_U1_DCFG5 EQU 0x400116ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG6\r
-CYDEV_UCFG_B1_P3_U1_DCFG6 EQU 0x400116ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_DCFG7\r
-CYDEV_UCFG_B1_P3_U1_DCFG7 EQU 0x400116ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_BASE\r
-CYDEV_UCFG_B1_P3_ROUTE_BASE EQU 0x40011700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P3_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_BASE\r
-CYDEV_UCFG_B1_P4_BASE EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_SIZE\r
-CYDEV_UCFG_B1_P4_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_BASE\r
-CYDEV_UCFG_B1_P4_U0_BASE EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_SIZE\r
-CYDEV_UCFG_B1_P4_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT0\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT0 EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT1\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT1 EQU 0x40011804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT2\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT2 EQU 0x40011808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT3\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT3 EQU 0x4001180c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT4\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT4 EQU 0x40011810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT5\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT5 EQU 0x40011814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT6\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT6 EQU 0x40011818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT7\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT7 EQU 0x4001181c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT8\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT8 EQU 0x40011820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT9\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT9 EQU 0x40011824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT10\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT10 EQU 0x40011828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_IT11\r
-CYDEV_UCFG_B1_P4_U0_PLD_IT11 EQU 0x4001182c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_ORT0\r
-CYDEV_UCFG_B1_P4_U0_PLD_ORT0 EQU 0x40011830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_ORT1\r
-CYDEV_UCFG_B1_P4_U0_PLD_ORT1 EQU 0x40011832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_ORT2\r
-CYDEV_UCFG_B1_P4_U0_PLD_ORT2 EQU 0x40011834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_PLD_ORT3\r
-CYDEV_UCFG_B1_P4_U0_PLD_ORT3 EQU 0x40011836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P4_U0_MC_CFG_CEN_CONST EQU 0x40011838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P4_U0_MC_CFG_XORFB EQU 0x4001183a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P4_U0_MC_CFG_SET_RESET EQU 0x4001183c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P4_U0_MC_CFG_BYPASS EQU 0x4001183e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG0\r
-CYDEV_UCFG_B1_P4_U0_CFG0 EQU 0x40011840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG1\r
-CYDEV_UCFG_B1_P4_U0_CFG1 EQU 0x40011841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG2\r
-CYDEV_UCFG_B1_P4_U0_CFG2 EQU 0x40011842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG3\r
-CYDEV_UCFG_B1_P4_U0_CFG3 EQU 0x40011843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG4\r
-CYDEV_UCFG_B1_P4_U0_CFG4 EQU 0x40011844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG5\r
-CYDEV_UCFG_B1_P4_U0_CFG5 EQU 0x40011845\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG6\r
-CYDEV_UCFG_B1_P4_U0_CFG6 EQU 0x40011846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG7\r
-CYDEV_UCFG_B1_P4_U0_CFG7 EQU 0x40011847\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG8\r
-CYDEV_UCFG_B1_P4_U0_CFG8 EQU 0x40011848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG9\r
-CYDEV_UCFG_B1_P4_U0_CFG9 EQU 0x40011849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG10\r
-CYDEV_UCFG_B1_P4_U0_CFG10 EQU 0x4001184a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG11\r
-CYDEV_UCFG_B1_P4_U0_CFG11 EQU 0x4001184b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG12\r
-CYDEV_UCFG_B1_P4_U0_CFG12 EQU 0x4001184c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG13\r
-CYDEV_UCFG_B1_P4_U0_CFG13 EQU 0x4001184d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG14\r
-CYDEV_UCFG_B1_P4_U0_CFG14 EQU 0x4001184e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG15\r
-CYDEV_UCFG_B1_P4_U0_CFG15 EQU 0x4001184f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG16\r
-CYDEV_UCFG_B1_P4_U0_CFG16 EQU 0x40011850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG17\r
-CYDEV_UCFG_B1_P4_U0_CFG17 EQU 0x40011851\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG18\r
-CYDEV_UCFG_B1_P4_U0_CFG18 EQU 0x40011852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG19\r
-CYDEV_UCFG_B1_P4_U0_CFG19 EQU 0x40011853\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG20\r
-CYDEV_UCFG_B1_P4_U0_CFG20 EQU 0x40011854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG21\r
-CYDEV_UCFG_B1_P4_U0_CFG21 EQU 0x40011855\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG22\r
-CYDEV_UCFG_B1_P4_U0_CFG22 EQU 0x40011856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG23\r
-CYDEV_UCFG_B1_P4_U0_CFG23 EQU 0x40011857\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG24\r
-CYDEV_UCFG_B1_P4_U0_CFG24 EQU 0x40011858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG25\r
-CYDEV_UCFG_B1_P4_U0_CFG25 EQU 0x40011859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG26\r
-CYDEV_UCFG_B1_P4_U0_CFG26 EQU 0x4001185a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG27\r
-CYDEV_UCFG_B1_P4_U0_CFG27 EQU 0x4001185b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG28\r
-CYDEV_UCFG_B1_P4_U0_CFG28 EQU 0x4001185c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG29\r
-CYDEV_UCFG_B1_P4_U0_CFG29 EQU 0x4001185d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG30\r
-CYDEV_UCFG_B1_P4_U0_CFG30 EQU 0x4001185e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_CFG31\r
-CYDEV_UCFG_B1_P4_U0_CFG31 EQU 0x4001185f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG0\r
-CYDEV_UCFG_B1_P4_U0_DCFG0 EQU 0x40011860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG1\r
-CYDEV_UCFG_B1_P4_U0_DCFG1 EQU 0x40011862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG2\r
-CYDEV_UCFG_B1_P4_U0_DCFG2 EQU 0x40011864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG3\r
-CYDEV_UCFG_B1_P4_U0_DCFG3 EQU 0x40011866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG4\r
-CYDEV_UCFG_B1_P4_U0_DCFG4 EQU 0x40011868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG5\r
-CYDEV_UCFG_B1_P4_U0_DCFG5 EQU 0x4001186a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG6\r
-CYDEV_UCFG_B1_P4_U0_DCFG6 EQU 0x4001186c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_DCFG7\r
-CYDEV_UCFG_B1_P4_U0_DCFG7 EQU 0x4001186e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_BASE\r
-CYDEV_UCFG_B1_P4_U1_BASE EQU 0x40011880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_SIZE\r
-CYDEV_UCFG_B1_P4_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT0\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT0 EQU 0x40011880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT1\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT1 EQU 0x40011884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT2\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT2 EQU 0x40011888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT3\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT3 EQU 0x4001188c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT4\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT4 EQU 0x40011890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT5\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT5 EQU 0x40011894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT6\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT6 EQU 0x40011898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT7\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT7 EQU 0x4001189c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT8\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT8 EQU 0x400118a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT9\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT9 EQU 0x400118a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT10\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT10 EQU 0x400118a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_IT11\r
-CYDEV_UCFG_B1_P4_U1_PLD_IT11 EQU 0x400118ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_ORT0\r
-CYDEV_UCFG_B1_P4_U1_PLD_ORT0 EQU 0x400118b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_ORT1\r
-CYDEV_UCFG_B1_P4_U1_PLD_ORT1 EQU 0x400118b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_ORT2\r
-CYDEV_UCFG_B1_P4_U1_PLD_ORT2 EQU 0x400118b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_PLD_ORT3\r
-CYDEV_UCFG_B1_P4_U1_PLD_ORT3 EQU 0x400118b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P4_U1_MC_CFG_CEN_CONST EQU 0x400118b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P4_U1_MC_CFG_XORFB EQU 0x400118ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P4_U1_MC_CFG_SET_RESET EQU 0x400118bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P4_U1_MC_CFG_BYPASS EQU 0x400118be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG0\r
-CYDEV_UCFG_B1_P4_U1_CFG0 EQU 0x400118c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG1\r
-CYDEV_UCFG_B1_P4_U1_CFG1 EQU 0x400118c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG2\r
-CYDEV_UCFG_B1_P4_U1_CFG2 EQU 0x400118c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG3\r
-CYDEV_UCFG_B1_P4_U1_CFG3 EQU 0x400118c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG4\r
-CYDEV_UCFG_B1_P4_U1_CFG4 EQU 0x400118c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG5\r
-CYDEV_UCFG_B1_P4_U1_CFG5 EQU 0x400118c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG6\r
-CYDEV_UCFG_B1_P4_U1_CFG6 EQU 0x400118c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG7\r
-CYDEV_UCFG_B1_P4_U1_CFG7 EQU 0x400118c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG8\r
-CYDEV_UCFG_B1_P4_U1_CFG8 EQU 0x400118c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG9\r
-CYDEV_UCFG_B1_P4_U1_CFG9 EQU 0x400118c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG10\r
-CYDEV_UCFG_B1_P4_U1_CFG10 EQU 0x400118ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG11\r
-CYDEV_UCFG_B1_P4_U1_CFG11 EQU 0x400118cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG12\r
-CYDEV_UCFG_B1_P4_U1_CFG12 EQU 0x400118cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG13\r
-CYDEV_UCFG_B1_P4_U1_CFG13 EQU 0x400118cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG14\r
-CYDEV_UCFG_B1_P4_U1_CFG14 EQU 0x400118ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG15\r
-CYDEV_UCFG_B1_P4_U1_CFG15 EQU 0x400118cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG16\r
-CYDEV_UCFG_B1_P4_U1_CFG16 EQU 0x400118d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG17\r
-CYDEV_UCFG_B1_P4_U1_CFG17 EQU 0x400118d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG18\r
-CYDEV_UCFG_B1_P4_U1_CFG18 EQU 0x400118d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG19\r
-CYDEV_UCFG_B1_P4_U1_CFG19 EQU 0x400118d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG20\r
-CYDEV_UCFG_B1_P4_U1_CFG20 EQU 0x400118d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG21\r
-CYDEV_UCFG_B1_P4_U1_CFG21 EQU 0x400118d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG22\r
-CYDEV_UCFG_B1_P4_U1_CFG22 EQU 0x400118d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG23\r
-CYDEV_UCFG_B1_P4_U1_CFG23 EQU 0x400118d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG24\r
-CYDEV_UCFG_B1_P4_U1_CFG24 EQU 0x400118d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG25\r
-CYDEV_UCFG_B1_P4_U1_CFG25 EQU 0x400118d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG26\r
-CYDEV_UCFG_B1_P4_U1_CFG26 EQU 0x400118da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG27\r
-CYDEV_UCFG_B1_P4_U1_CFG27 EQU 0x400118db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG28\r
-CYDEV_UCFG_B1_P4_U1_CFG28 EQU 0x400118dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG29\r
-CYDEV_UCFG_B1_P4_U1_CFG29 EQU 0x400118dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG30\r
-CYDEV_UCFG_B1_P4_U1_CFG30 EQU 0x400118de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_CFG31\r
-CYDEV_UCFG_B1_P4_U1_CFG31 EQU 0x400118df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG0\r
-CYDEV_UCFG_B1_P4_U1_DCFG0 EQU 0x400118e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG1\r
-CYDEV_UCFG_B1_P4_U1_DCFG1 EQU 0x400118e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG2\r
-CYDEV_UCFG_B1_P4_U1_DCFG2 EQU 0x400118e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG3\r
-CYDEV_UCFG_B1_P4_U1_DCFG3 EQU 0x400118e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG4\r
-CYDEV_UCFG_B1_P4_U1_DCFG4 EQU 0x400118e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG5\r
-CYDEV_UCFG_B1_P4_U1_DCFG5 EQU 0x400118ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG6\r
-CYDEV_UCFG_B1_P4_U1_DCFG6 EQU 0x400118ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_DCFG7\r
-CYDEV_UCFG_B1_P4_U1_DCFG7 EQU 0x400118ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_BASE\r
-CYDEV_UCFG_B1_P4_ROUTE_BASE EQU 0x40011900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P4_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_BASE\r
-CYDEV_UCFG_B1_P5_BASE EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_SIZE\r
-CYDEV_UCFG_B1_P5_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_BASE\r
-CYDEV_UCFG_B1_P5_U0_BASE EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_SIZE\r
-CYDEV_UCFG_B1_P5_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT0\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT0 EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT1\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT1 EQU 0x40011a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT2\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT2 EQU 0x40011a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT3\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT3 EQU 0x40011a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT4\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT4 EQU 0x40011a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT5\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT5 EQU 0x40011a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT6\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT6 EQU 0x40011a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT7\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT7 EQU 0x40011a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT8\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT8 EQU 0x40011a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT9\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT9 EQU 0x40011a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT10\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT10 EQU 0x40011a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_IT11\r
-CYDEV_UCFG_B1_P5_U0_PLD_IT11 EQU 0x40011a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_ORT0\r
-CYDEV_UCFG_B1_P5_U0_PLD_ORT0 EQU 0x40011a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_ORT1\r
-CYDEV_UCFG_B1_P5_U0_PLD_ORT1 EQU 0x40011a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_ORT2\r
-CYDEV_UCFG_B1_P5_U0_PLD_ORT2 EQU 0x40011a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_PLD_ORT3\r
-CYDEV_UCFG_B1_P5_U0_PLD_ORT3 EQU 0x40011a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P5_U0_MC_CFG_CEN_CONST EQU 0x40011a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P5_U0_MC_CFG_XORFB EQU 0x40011a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P5_U0_MC_CFG_SET_RESET EQU 0x40011a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P5_U0_MC_CFG_BYPASS EQU 0x40011a3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG0\r
-CYDEV_UCFG_B1_P5_U0_CFG0 EQU 0x40011a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG1\r
-CYDEV_UCFG_B1_P5_U0_CFG1 EQU 0x40011a41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG2\r
-CYDEV_UCFG_B1_P5_U0_CFG2 EQU 0x40011a42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG3\r
-CYDEV_UCFG_B1_P5_U0_CFG3 EQU 0x40011a43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG4\r
-CYDEV_UCFG_B1_P5_U0_CFG4 EQU 0x40011a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG5\r
-CYDEV_UCFG_B1_P5_U0_CFG5 EQU 0x40011a45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG6\r
-CYDEV_UCFG_B1_P5_U0_CFG6 EQU 0x40011a46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG7\r
-CYDEV_UCFG_B1_P5_U0_CFG7 EQU 0x40011a47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG8\r
-CYDEV_UCFG_B1_P5_U0_CFG8 EQU 0x40011a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG9\r
-CYDEV_UCFG_B1_P5_U0_CFG9 EQU 0x40011a49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG10\r
-CYDEV_UCFG_B1_P5_U0_CFG10 EQU 0x40011a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG11\r
-CYDEV_UCFG_B1_P5_U0_CFG11 EQU 0x40011a4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG12\r
-CYDEV_UCFG_B1_P5_U0_CFG12 EQU 0x40011a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG13\r
-CYDEV_UCFG_B1_P5_U0_CFG13 EQU 0x40011a4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG14\r
-CYDEV_UCFG_B1_P5_U0_CFG14 EQU 0x40011a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG15\r
-CYDEV_UCFG_B1_P5_U0_CFG15 EQU 0x40011a4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG16\r
-CYDEV_UCFG_B1_P5_U0_CFG16 EQU 0x40011a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG17\r
-CYDEV_UCFG_B1_P5_U0_CFG17 EQU 0x40011a51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG18\r
-CYDEV_UCFG_B1_P5_U0_CFG18 EQU 0x40011a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG19\r
-CYDEV_UCFG_B1_P5_U0_CFG19 EQU 0x40011a53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG20\r
-CYDEV_UCFG_B1_P5_U0_CFG20 EQU 0x40011a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG21\r
-CYDEV_UCFG_B1_P5_U0_CFG21 EQU 0x40011a55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG22\r
-CYDEV_UCFG_B1_P5_U0_CFG22 EQU 0x40011a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG23\r
-CYDEV_UCFG_B1_P5_U0_CFG23 EQU 0x40011a57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG24\r
-CYDEV_UCFG_B1_P5_U0_CFG24 EQU 0x40011a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG25\r
-CYDEV_UCFG_B1_P5_U0_CFG25 EQU 0x40011a59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG26\r
-CYDEV_UCFG_B1_P5_U0_CFG26 EQU 0x40011a5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG27\r
-CYDEV_UCFG_B1_P5_U0_CFG27 EQU 0x40011a5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG28\r
-CYDEV_UCFG_B1_P5_U0_CFG28 EQU 0x40011a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG29\r
-CYDEV_UCFG_B1_P5_U0_CFG29 EQU 0x40011a5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG30\r
-CYDEV_UCFG_B1_P5_U0_CFG30 EQU 0x40011a5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_CFG31\r
-CYDEV_UCFG_B1_P5_U0_CFG31 EQU 0x40011a5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG0\r
-CYDEV_UCFG_B1_P5_U0_DCFG0 EQU 0x40011a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG1\r
-CYDEV_UCFG_B1_P5_U0_DCFG1 EQU 0x40011a62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG2\r
-CYDEV_UCFG_B1_P5_U0_DCFG2 EQU 0x40011a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG3\r
-CYDEV_UCFG_B1_P5_U0_DCFG3 EQU 0x40011a66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG4\r
-CYDEV_UCFG_B1_P5_U0_DCFG4 EQU 0x40011a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG5\r
-CYDEV_UCFG_B1_P5_U0_DCFG5 EQU 0x40011a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG6\r
-CYDEV_UCFG_B1_P5_U0_DCFG6 EQU 0x40011a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_DCFG7\r
-CYDEV_UCFG_B1_P5_U0_DCFG7 EQU 0x40011a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_BASE\r
-CYDEV_UCFG_B1_P5_U1_BASE EQU 0x40011a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_SIZE\r
-CYDEV_UCFG_B1_P5_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT0\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT0 EQU 0x40011a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT1\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT1 EQU 0x40011a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT2\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT2 EQU 0x40011a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT3\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT3 EQU 0x40011a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT4\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT4 EQU 0x40011a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT5\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT5 EQU 0x40011a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT6\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT6 EQU 0x40011a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT7\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT7 EQU 0x40011a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT8\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT8 EQU 0x40011aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT9\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT9 EQU 0x40011aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT10\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT10 EQU 0x40011aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_IT11\r
-CYDEV_UCFG_B1_P5_U1_PLD_IT11 EQU 0x40011aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_ORT0\r
-CYDEV_UCFG_B1_P5_U1_PLD_ORT0 EQU 0x40011ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_ORT1\r
-CYDEV_UCFG_B1_P5_U1_PLD_ORT1 EQU 0x40011ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_ORT2\r
-CYDEV_UCFG_B1_P5_U1_PLD_ORT2 EQU 0x40011ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_PLD_ORT3\r
-CYDEV_UCFG_B1_P5_U1_PLD_ORT3 EQU 0x40011ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST\r
-CYDEV_UCFG_B1_P5_U1_MC_CFG_CEN_CONST EQU 0x40011ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB\r
-CYDEV_UCFG_B1_P5_U1_MC_CFG_XORFB EQU 0x40011aba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET\r
-CYDEV_UCFG_B1_P5_U1_MC_CFG_SET_RESET EQU 0x40011abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS\r
-CYDEV_UCFG_B1_P5_U1_MC_CFG_BYPASS EQU 0x40011abe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG0\r
-CYDEV_UCFG_B1_P5_U1_CFG0 EQU 0x40011ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG1\r
-CYDEV_UCFG_B1_P5_U1_CFG1 EQU 0x40011ac1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG2\r
-CYDEV_UCFG_B1_P5_U1_CFG2 EQU 0x40011ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG3\r
-CYDEV_UCFG_B1_P5_U1_CFG3 EQU 0x40011ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG4\r
-CYDEV_UCFG_B1_P5_U1_CFG4 EQU 0x40011ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG5\r
-CYDEV_UCFG_B1_P5_U1_CFG5 EQU 0x40011ac5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG6\r
-CYDEV_UCFG_B1_P5_U1_CFG6 EQU 0x40011ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG7\r
-CYDEV_UCFG_B1_P5_U1_CFG7 EQU 0x40011ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG8\r
-CYDEV_UCFG_B1_P5_U1_CFG8 EQU 0x40011ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG9\r
-CYDEV_UCFG_B1_P5_U1_CFG9 EQU 0x40011ac9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG10\r
-CYDEV_UCFG_B1_P5_U1_CFG10 EQU 0x40011aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG11\r
-CYDEV_UCFG_B1_P5_U1_CFG11 EQU 0x40011acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG12\r
-CYDEV_UCFG_B1_P5_U1_CFG12 EQU 0x40011acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG13\r
-CYDEV_UCFG_B1_P5_U1_CFG13 EQU 0x40011acd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG14\r
-CYDEV_UCFG_B1_P5_U1_CFG14 EQU 0x40011ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG15\r
-CYDEV_UCFG_B1_P5_U1_CFG15 EQU 0x40011acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG16\r
-CYDEV_UCFG_B1_P5_U1_CFG16 EQU 0x40011ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG17\r
-CYDEV_UCFG_B1_P5_U1_CFG17 EQU 0x40011ad1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG18\r
-CYDEV_UCFG_B1_P5_U1_CFG18 EQU 0x40011ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG19\r
-CYDEV_UCFG_B1_P5_U1_CFG19 EQU 0x40011ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG20\r
-CYDEV_UCFG_B1_P5_U1_CFG20 EQU 0x40011ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG21\r
-CYDEV_UCFG_B1_P5_U1_CFG21 EQU 0x40011ad5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG22\r
-CYDEV_UCFG_B1_P5_U1_CFG22 EQU 0x40011ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG23\r
-CYDEV_UCFG_B1_P5_U1_CFG23 EQU 0x40011ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG24\r
-CYDEV_UCFG_B1_P5_U1_CFG24 EQU 0x40011ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG25\r
-CYDEV_UCFG_B1_P5_U1_CFG25 EQU 0x40011ad9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG26\r
-CYDEV_UCFG_B1_P5_U1_CFG26 EQU 0x40011ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG27\r
-CYDEV_UCFG_B1_P5_U1_CFG27 EQU 0x40011adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG28\r
-CYDEV_UCFG_B1_P5_U1_CFG28 EQU 0x40011adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG29\r
-CYDEV_UCFG_B1_P5_U1_CFG29 EQU 0x40011add\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG30\r
-CYDEV_UCFG_B1_P5_U1_CFG30 EQU 0x40011ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_CFG31\r
-CYDEV_UCFG_B1_P5_U1_CFG31 EQU 0x40011adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG0\r
-CYDEV_UCFG_B1_P5_U1_DCFG0 EQU 0x40011ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG1\r
-CYDEV_UCFG_B1_P5_U1_DCFG1 EQU 0x40011ae2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG2\r
-CYDEV_UCFG_B1_P5_U1_DCFG2 EQU 0x40011ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG3\r
-CYDEV_UCFG_B1_P5_U1_DCFG3 EQU 0x40011ae6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG4\r
-CYDEV_UCFG_B1_P5_U1_DCFG4 EQU 0x40011ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG5\r
-CYDEV_UCFG_B1_P5_U1_DCFG5 EQU 0x40011aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG6\r
-CYDEV_UCFG_B1_P5_U1_DCFG6 EQU 0x40011aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_DCFG7\r
-CYDEV_UCFG_B1_P5_U1_DCFG7 EQU 0x40011aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_BASE\r
-CYDEV_UCFG_B1_P5_ROUTE_BASE EQU 0x40011b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P5_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI0_BASE\r
-CYDEV_UCFG_DSI0_BASE EQU 0x40014000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI0_SIZE\r
-CYDEV_UCFG_DSI0_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI1_BASE\r
-CYDEV_UCFG_DSI1_BASE EQU 0x40014100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI1_SIZE\r
-CYDEV_UCFG_DSI1_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI2_BASE\r
-CYDEV_UCFG_DSI2_BASE EQU 0x40014200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI2_SIZE\r
-CYDEV_UCFG_DSI2_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI3_BASE\r
-CYDEV_UCFG_DSI3_BASE EQU 0x40014300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI3_SIZE\r
-CYDEV_UCFG_DSI3_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI4_BASE\r
-CYDEV_UCFG_DSI4_BASE EQU 0x40014400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI4_SIZE\r
-CYDEV_UCFG_DSI4_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI5_BASE\r
-CYDEV_UCFG_DSI5_BASE EQU 0x40014500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI5_SIZE\r
-CYDEV_UCFG_DSI5_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI6_BASE\r
-CYDEV_UCFG_DSI6_BASE EQU 0x40014600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI6_SIZE\r
-CYDEV_UCFG_DSI6_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI7_BASE\r
-CYDEV_UCFG_DSI7_BASE EQU 0x40014700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI7_SIZE\r
-CYDEV_UCFG_DSI7_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI8_BASE\r
-CYDEV_UCFG_DSI8_BASE EQU 0x40014800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI8_SIZE\r
-CYDEV_UCFG_DSI8_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI9_BASE\r
-CYDEV_UCFG_DSI9_BASE EQU 0x40014900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI9_SIZE\r
-CYDEV_UCFG_DSI9_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI12_BASE\r
-CYDEV_UCFG_DSI12_BASE EQU 0x40014c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI12_SIZE\r
-CYDEV_UCFG_DSI12_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI13_BASE\r
-CYDEV_UCFG_DSI13_BASE EQU 0x40014d00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI13_SIZE\r
-CYDEV_UCFG_DSI13_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BASE\r
-CYDEV_UCFG_BCTL0_BASE EQU 0x40015000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_SIZE\r
-CYDEV_UCFG_BCTL0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_MDCLK_EN\r
-CYDEV_UCFG_BCTL0_MDCLK_EN EQU 0x40015000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_MBCLK_EN\r
-CYDEV_UCFG_BCTL0_MBCLK_EN EQU 0x40015001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_WAIT_CFG\r
-CYDEV_UCFG_BCTL0_WAIT_CFG EQU 0x40015002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BANK_CTL\r
-CYDEV_UCFG_BCTL0_BANK_CTL EQU 0x40015003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_UDB_TEST_3\r
-CYDEV_UCFG_BCTL0_UDB_TEST_3 EQU 0x40015007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_DCLK_EN0\r
-CYDEV_UCFG_BCTL0_DCLK_EN0 EQU 0x40015008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BCLK_EN0\r
-CYDEV_UCFG_BCTL0_BCLK_EN0 EQU 0x40015009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_DCLK_EN1\r
-CYDEV_UCFG_BCTL0_DCLK_EN1 EQU 0x4001500a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BCLK_EN1\r
-CYDEV_UCFG_BCTL0_BCLK_EN1 EQU 0x4001500b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_DCLK_EN2\r
-CYDEV_UCFG_BCTL0_DCLK_EN2 EQU 0x4001500c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BCLK_EN2\r
-CYDEV_UCFG_BCTL0_BCLK_EN2 EQU 0x4001500d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_DCLK_EN3\r
-CYDEV_UCFG_BCTL0_DCLK_EN3 EQU 0x4001500e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BCLK_EN3\r
-CYDEV_UCFG_BCTL0_BCLK_EN3 EQU 0x4001500f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BASE\r
-CYDEV_UCFG_BCTL1_BASE EQU 0x40015010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_SIZE\r
-CYDEV_UCFG_BCTL1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_MDCLK_EN\r
-CYDEV_UCFG_BCTL1_MDCLK_EN EQU 0x40015010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_MBCLK_EN\r
-CYDEV_UCFG_BCTL1_MBCLK_EN EQU 0x40015011\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_WAIT_CFG\r
-CYDEV_UCFG_BCTL1_WAIT_CFG EQU 0x40015012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BANK_CTL\r
-CYDEV_UCFG_BCTL1_BANK_CTL EQU 0x40015013\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_UDB_TEST_3\r
-CYDEV_UCFG_BCTL1_UDB_TEST_3 EQU 0x40015017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_DCLK_EN0\r
-CYDEV_UCFG_BCTL1_DCLK_EN0 EQU 0x40015018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BCLK_EN0\r
-CYDEV_UCFG_BCTL1_BCLK_EN0 EQU 0x40015019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_DCLK_EN1\r
-CYDEV_UCFG_BCTL1_DCLK_EN1 EQU 0x4001501a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BCLK_EN1\r
-CYDEV_UCFG_BCTL1_BCLK_EN1 EQU 0x4001501b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_DCLK_EN2\r
-CYDEV_UCFG_BCTL1_DCLK_EN2 EQU 0x4001501c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BCLK_EN2\r
-CYDEV_UCFG_BCTL1_BCLK_EN2 EQU 0x4001501d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_DCLK_EN3\r
-CYDEV_UCFG_BCTL1_DCLK_EN3 EQU 0x4001501e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BCLK_EN3\r
-CYDEV_UCFG_BCTL1_BCLK_EN3 EQU 0x4001501f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_BASE\r
-CYDEV_IDMUX_BASE EQU 0x40015100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_SIZE\r
-CYDEV_IDMUX_SIZE EQU 0x00000016\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL0\r
-CYDEV_IDMUX_IRQ_CTL0 EQU 0x40015100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL1\r
-CYDEV_IDMUX_IRQ_CTL1 EQU 0x40015101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL2\r
-CYDEV_IDMUX_IRQ_CTL2 EQU 0x40015102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL3\r
-CYDEV_IDMUX_IRQ_CTL3 EQU 0x40015103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL4\r
-CYDEV_IDMUX_IRQ_CTL4 EQU 0x40015104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL5\r
-CYDEV_IDMUX_IRQ_CTL5 EQU 0x40015105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL6\r
-CYDEV_IDMUX_IRQ_CTL6 EQU 0x40015106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_IRQ_CTL7\r
-CYDEV_IDMUX_IRQ_CTL7 EQU 0x40015107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL0\r
-CYDEV_IDMUX_DRQ_CTL0 EQU 0x40015110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL1\r
-CYDEV_IDMUX_DRQ_CTL1 EQU 0x40015111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL2\r
-CYDEV_IDMUX_DRQ_CTL2 EQU 0x40015112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL3\r
-CYDEV_IDMUX_DRQ_CTL3 EQU 0x40015113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL4\r
-CYDEV_IDMUX_DRQ_CTL4 EQU 0x40015114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_DRQ_CTL5\r
-CYDEV_IDMUX_DRQ_CTL5 EQU 0x40015115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_BASE\r
-CYDEV_CACHERAM_BASE EQU 0x40030000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_SIZE\r
-CYDEV_CACHERAM_SIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_DATA_MBASE\r
-CYDEV_CACHERAM_DATA_MBASE EQU 0x40030000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_DATA_MSIZE\r
-CYDEV_CACHERAM_DATA_MSIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_BASE\r
-CYDEV_SFR_BASE EQU 0x40050100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_SIZE\r
-CYDEV_SFR_SIZE EQU 0x000000fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO0\r
-CYDEV_SFR_GPIO0 EQU 0x40050180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD0\r
-CYDEV_SFR_GPIRD0 EQU 0x40050189\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO0_SEL\r
-CYDEV_SFR_GPIO0_SEL EQU 0x4005018a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO1\r
-CYDEV_SFR_GPIO1 EQU 0x40050190\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD1\r
-CYDEV_SFR_GPIRD1 EQU 0x40050191\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO2\r
-CYDEV_SFR_GPIO2 EQU 0x40050198\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD2\r
-CYDEV_SFR_GPIRD2 EQU 0x40050199\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO2_SEL\r
-CYDEV_SFR_GPIO2_SEL EQU 0x4005019a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO1_SEL\r
-CYDEV_SFR_GPIO1_SEL EQU 0x400501a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO3\r
-CYDEV_SFR_GPIO3 EQU 0x400501b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD3\r
-CYDEV_SFR_GPIRD3 EQU 0x400501b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO3_SEL\r
-CYDEV_SFR_GPIO3_SEL EQU 0x400501b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO4\r
-CYDEV_SFR_GPIO4 EQU 0x400501c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD4\r
-CYDEV_SFR_GPIRD4 EQU 0x400501c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO4_SEL\r
-CYDEV_SFR_GPIO4_SEL EQU 0x400501c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO5\r
-CYDEV_SFR_GPIO5 EQU 0x400501c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD5\r
-CYDEV_SFR_GPIRD5 EQU 0x400501c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO5_SEL\r
-CYDEV_SFR_GPIO5_SEL EQU 0x400501ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO6\r
-CYDEV_SFR_GPIO6 EQU 0x400501d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD6\r
-CYDEV_SFR_GPIRD6 EQU 0x400501d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO6_SEL\r
-CYDEV_SFR_GPIO6_SEL EQU 0x400501da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO12\r
-CYDEV_SFR_GPIO12 EQU 0x400501e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD12\r
-CYDEV_SFR_GPIRD12 EQU 0x400501e9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO12_SEL\r
-CYDEV_SFR_GPIO12_SEL EQU 0x400501f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO15\r
-CYDEV_SFR_GPIO15 EQU 0x400501f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIRD15\r
-CYDEV_SFR_GPIRD15 EQU 0x400501f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_GPIO15_SEL\r
-CYDEV_SFR_GPIO15_SEL EQU 0x400501fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_BASE\r
-CYDEV_P3BA_BASE EQU 0x40050300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_SIZE\r
-CYDEV_P3BA_SIZE EQU 0x0000002b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_Y_START\r
-CYDEV_P3BA_Y_START EQU 0x40050300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_YROLL\r
-CYDEV_P3BA_YROLL EQU 0x40050301\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_YCFG\r
-CYDEV_P3BA_YCFG EQU 0x40050302\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_X_START1\r
-CYDEV_P3BA_X_START1 EQU 0x40050303\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_X_START2\r
-CYDEV_P3BA_X_START2 EQU 0x40050304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_XROLL1\r
-CYDEV_P3BA_XROLL1 EQU 0x40050305\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_XROLL2\r
-CYDEV_P3BA_XROLL2 EQU 0x40050306\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_XINC\r
-CYDEV_P3BA_XINC EQU 0x40050307\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_XCFG\r
-CYDEV_P3BA_XCFG EQU 0x40050308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_OFFSETADDR1\r
-CYDEV_P3BA_OFFSETADDR1 EQU 0x40050309\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_OFFSETADDR2\r
-CYDEV_P3BA_OFFSETADDR2 EQU 0x4005030a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_OFFSETADDR3\r
-CYDEV_P3BA_OFFSETADDR3 EQU 0x4005030b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_ABSADDR1\r
-CYDEV_P3BA_ABSADDR1 EQU 0x4005030c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_ABSADDR2\r
-CYDEV_P3BA_ABSADDR2 EQU 0x4005030d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_ABSADDR3\r
-CYDEV_P3BA_ABSADDR3 EQU 0x4005030e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_ABSADDR4\r
-CYDEV_P3BA_ABSADDR4 EQU 0x4005030f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATCFG1\r
-CYDEV_P3BA_DATCFG1 EQU 0x40050310\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATCFG2\r
-CYDEV_P3BA_DATCFG2 EQU 0x40050311\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_CMP_RSLT1\r
-CYDEV_P3BA_CMP_RSLT1 EQU 0x40050314\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_CMP_RSLT2\r
-CYDEV_P3BA_CMP_RSLT2 EQU 0x40050315\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_CMP_RSLT3\r
-CYDEV_P3BA_CMP_RSLT3 EQU 0x40050316\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_CMP_RSLT4\r
-CYDEV_P3BA_CMP_RSLT4 EQU 0x40050317\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATA_REG1\r
-CYDEV_P3BA_DATA_REG1 EQU 0x40050318\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATA_REG2\r
-CYDEV_P3BA_DATA_REG2 EQU 0x40050319\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATA_REG3\r
-CYDEV_P3BA_DATA_REG3 EQU 0x4005031a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_DATA_REG4\r
-CYDEV_P3BA_DATA_REG4 EQU 0x4005031b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_EXP_DATA1\r
-CYDEV_P3BA_EXP_DATA1 EQU 0x4005031c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_EXP_DATA2\r
-CYDEV_P3BA_EXP_DATA2 EQU 0x4005031d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_EXP_DATA3\r
-CYDEV_P3BA_EXP_DATA3 EQU 0x4005031e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_EXP_DATA4\r
-CYDEV_P3BA_EXP_DATA4 EQU 0x4005031f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_MSTR_HRDATA1\r
-CYDEV_P3BA_MSTR_HRDATA1 EQU 0x40050320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_MSTR_HRDATA2\r
-CYDEV_P3BA_MSTR_HRDATA2 EQU 0x40050321\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_MSTR_HRDATA3\r
-CYDEV_P3BA_MSTR_HRDATA3 EQU 0x40050322\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_MSTR_HRDATA4\r
-CYDEV_P3BA_MSTR_HRDATA4 EQU 0x40050323\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_BIST_EN\r
-CYDEV_P3BA_BIST_EN EQU 0x40050324\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_PHUB_MASTER_SSR\r
-CYDEV_P3BA_PHUB_MASTER_SSR EQU 0x40050325\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_SEQCFG1\r
-CYDEV_P3BA_SEQCFG1 EQU 0x40050326\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_SEQCFG2\r
-CYDEV_P3BA_SEQCFG2 EQU 0x40050327\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_Y_CURR\r
-CYDEV_P3BA_Y_CURR EQU 0x40050328\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_X_CURR1\r
-CYDEV_P3BA_X_CURR1 EQU 0x40050329\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_X_CURR2\r
-CYDEV_P3BA_X_CURR2 EQU 0x4005032a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_BASE\r
-CYDEV_PANTHER_BASE EQU 0x40080000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_SIZE\r
-CYDEV_PANTHER_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_STCALIB_CFG\r
-CYDEV_PANTHER_STCALIB_CFG EQU 0x40080000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_WAITPIPE\r
-CYDEV_PANTHER_WAITPIPE EQU 0x40080004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_TRACE_CFG\r
-CYDEV_PANTHER_TRACE_CFG EQU 0x40080008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_DBG_CFG\r
-CYDEV_PANTHER_DBG_CFG EQU 0x4008000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_CM3_LCKRST_STAT\r
-CYDEV_PANTHER_CM3_LCKRST_STAT EQU 0x40080018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_DEVICE_ID\r
-CYDEV_PANTHER_DEVICE_ID EQU 0x4008001c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_BASE\r
-CYDEV_FLSECC_BASE EQU 0x48000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_SIZE\r
-CYDEV_FLSECC_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_DATA_MBASE\r
-CYDEV_FLSECC_DATA_MBASE EQU 0x48000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_DATA_MSIZE\r
-CYDEV_FLSECC_DATA_MSIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_BASE\r
-CYDEV_FLSHID_BASE EQU 0x49000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_SIZE\r
-CYDEV_FLSHID_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_RSVD_MBASE\r
-CYDEV_FLSHID_RSVD_MBASE EQU 0x49000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_RSVD_MSIZE\r
-CYDEV_FLSHID_RSVD_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_MDATA_MBASE\r
-CYDEV_FLSHID_CUST_MDATA_MBASE EQU 0x49000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_MDATA_MSIZE\r
-CYDEV_FLSHID_CUST_MDATA_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_BASE\r
-CYDEV_FLSHID_CUST_TABLES_BASE EQU 0x49000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_SIZE\r
-CYDEV_FLSHID_CUST_TABLES_SIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_Y_LOC\r
-CYDEV_FLSHID_CUST_TABLES_Y_LOC EQU 0x49000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_X_LOC\r
-CYDEV_FLSHID_CUST_TABLES_X_LOC EQU 0x49000101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_WAFER_NUM\r
-CYDEV_FLSHID_CUST_TABLES_WAFER_NUM EQU 0x49000102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_LOT_LSB\r
-CYDEV_FLSHID_CUST_TABLES_LOT_LSB EQU 0x49000103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_LOT_MSB\r
-CYDEV_FLSHID_CUST_TABLES_LOT_MSB EQU 0x49000104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_WRK_WK\r
-CYDEV_FLSHID_CUST_TABLES_WRK_WK EQU 0x49000105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_FAB_YR\r
-CYDEV_FLSHID_CUST_TABLES_FAB_YR EQU 0x49000106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_MINOR\r
-CYDEV_FLSHID_CUST_TABLES_MINOR EQU 0x49000107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_3MHZ EQU 0x49000108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_6MHZ EQU 0x49000109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_12MHZ EQU 0x4900010a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_24MHZ EQU 0x4900010b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_67MHZ EQU 0x4900010c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_80MHZ EQU 0x4900010d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ\r
-CYDEV_FLSHID_CUST_TABLES_IMO_92MHZ EQU 0x4900010e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_IMO_USB\r
-CYDEV_FLSHID_CUST_TABLES_IMO_USB EQU 0x4900010f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP0_TR0_HS EQU 0x49000110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP1_TR0_HS EQU 0x49000111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP2_TR0_HS EQU 0x49000112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP3_TR0_HS EQU 0x49000113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP0_TR1_HS EQU 0x49000114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP1_TR1_HS EQU 0x49000115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP2_TR1_HS EQU 0x49000116\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS\r
-CYDEV_FLSHID_CUST_TABLES_CMP3_TR1_HS EQU 0x49000117\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M1\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M1 EQU 0x49000118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M2\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M2 EQU 0x49000119\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M3\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M3 EQU 0x4900011a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M4\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M4 EQU 0x4900011b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M5\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M5 EQU 0x4900011c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M6\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M6 EQU 0x4900011d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M7\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M7 EQU 0x4900011e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DEC_M8\r
-CYDEV_FLSHID_CUST_TABLES_DEC_M8 EQU 0x4900011f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M1\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M1 EQU 0x49000120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M2\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M2 EQU 0x49000121\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M3\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M3 EQU 0x49000122\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M4\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M4 EQU 0x49000123\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M5\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M5 EQU 0x49000124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M6\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M6 EQU 0x49000125\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M7\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M7 EQU 0x49000126\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC0_M8\r
-CYDEV_FLSHID_CUST_TABLES_DAC0_M8 EQU 0x49000127\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M1\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M1 EQU 0x49000128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M2\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M2 EQU 0x49000129\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M3\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M3 EQU 0x4900012a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M4\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M4 EQU 0x4900012b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M5\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M5 EQU 0x4900012c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M6\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M6 EQU 0x4900012d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M7\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M7 EQU 0x4900012e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC2_M8\r
-CYDEV_FLSHID_CUST_TABLES_DAC2_M8 EQU 0x4900012f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M1\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M1 EQU 0x49000130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M2\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M2 EQU 0x49000131\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M3\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M3 EQU 0x49000132\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M4\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M4 EQU 0x49000133\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M5\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M5 EQU 0x49000134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M6\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M6 EQU 0x49000135\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M7\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M7 EQU 0x49000136\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC1_M8\r
-CYDEV_FLSHID_CUST_TABLES_DAC1_M8 EQU 0x49000137\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M1\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M1 EQU 0x49000138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M2\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M2 EQU 0x49000139\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M3\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M3 EQU 0x4900013a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M4\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M4 EQU 0x4900013b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M5\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M5 EQU 0x4900013c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M6\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M6 EQU 0x4900013d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M7\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M7 EQU 0x4900013e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_DAC3_M8\r
-CYDEV_FLSHID_CUST_TABLES_DAC3_M8 EQU 0x4900013f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_BASE\r
-CYDEV_FLSHID_MFG_CFG_BASE EQU 0x49000180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_SIZE\r
-CYDEV_FLSHID_MFG_CFG_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_IMO_TR1\r
-CYDEV_FLSHID_MFG_CFG_IMO_TR1 EQU 0x49000188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP0_TR0\r
-CYDEV_FLSHID_MFG_CFG_CMP0_TR0 EQU 0x490001ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP1_TR0\r
-CYDEV_FLSHID_MFG_CFG_CMP1_TR0 EQU 0x490001ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP2_TR0\r
-CYDEV_FLSHID_MFG_CFG_CMP2_TR0 EQU 0x490001b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP3_TR0\r
-CYDEV_FLSHID_MFG_CFG_CMP3_TR0 EQU 0x490001b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP0_TR1\r
-CYDEV_FLSHID_MFG_CFG_CMP0_TR1 EQU 0x490001b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP1_TR1\r
-CYDEV_FLSHID_MFG_CFG_CMP1_TR1 EQU 0x490001b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP2_TR1\r
-CYDEV_FLSHID_MFG_CFG_CMP2_TR1 EQU 0x490001b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_CMP3_TR1\r
-CYDEV_FLSHID_MFG_CFG_CMP3_TR1 EQU 0x490001ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM\r
-CYDEV_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM EQU 0x490001ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_BASE\r
-CYDEV_EXTMEM_BASE EQU 0x60000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_SIZE\r
-CYDEV_EXTMEM_SIZE EQU 0x00800000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_DATA_MBASE\r
-CYDEV_EXTMEM_DATA_MBASE EQU 0x60000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_DATA_MSIZE\r
-CYDEV_EXTMEM_DATA_MSIZE EQU 0x00800000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_BASE\r
-CYDEV_ITM_BASE EQU 0xe0000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_SIZE\r
-CYDEV_ITM_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_TRACE_EN\r
-CYDEV_ITM_TRACE_EN EQU 0xe0000e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_TRACE_PRIVILEGE\r
-CYDEV_ITM_TRACE_PRIVILEGE EQU 0xe0000e40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_TRACE_CTRL\r
-CYDEV_ITM_TRACE_CTRL EQU 0xe0000e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_LOCK_ACCESS\r
-CYDEV_ITM_LOCK_ACCESS EQU 0xe0000fb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_LOCK_STATUS\r
-CYDEV_ITM_LOCK_STATUS EQU 0xe0000fb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID4\r
-CYDEV_ITM_PID4 EQU 0xe0000fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID5\r
-CYDEV_ITM_PID5 EQU 0xe0000fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID6\r
-CYDEV_ITM_PID6 EQU 0xe0000fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID7\r
-CYDEV_ITM_PID7 EQU 0xe0000fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID0\r
-CYDEV_ITM_PID0 EQU 0xe0000fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID1\r
-CYDEV_ITM_PID1 EQU 0xe0000fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID2\r
-CYDEV_ITM_PID2 EQU 0xe0000fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_PID3\r
-CYDEV_ITM_PID3 EQU 0xe0000fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_CID0\r
-CYDEV_ITM_CID0 EQU 0xe0000ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_CID1\r
-CYDEV_ITM_CID1 EQU 0xe0000ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_CID2\r
-CYDEV_ITM_CID2 EQU 0xe0000ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_CID3\r
-CYDEV_ITM_CID3 EQU 0xe0000ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_BASE\r
-CYDEV_DWT_BASE EQU 0xe0001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_SIZE\r
-CYDEV_DWT_SIZE EQU 0x0000005c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_CTRL\r
-CYDEV_DWT_CTRL EQU 0xe0001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_CYCLE_COUNT\r
-CYDEV_DWT_CYCLE_COUNT EQU 0xe0001004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_CPI_COUNT\r
-CYDEV_DWT_CPI_COUNT EQU 0xe0001008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_EXC_OVHD_COUNT\r
-CYDEV_DWT_EXC_OVHD_COUNT EQU 0xe000100c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_SLEEP_COUNT\r
-CYDEV_DWT_SLEEP_COUNT EQU 0xe0001010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_LSU_COUNT\r
-CYDEV_DWT_LSU_COUNT EQU 0xe0001014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_FOLD_COUNT\r
-CYDEV_DWT_FOLD_COUNT EQU 0xe0001018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_PC_SAMPLE\r
-CYDEV_DWT_PC_SAMPLE EQU 0xe000101c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_COMP_0\r
-CYDEV_DWT_COMP_0 EQU 0xe0001020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_MASK_0\r
-CYDEV_DWT_MASK_0 EQU 0xe0001024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_FUNCTION_0\r
-CYDEV_DWT_FUNCTION_0 EQU 0xe0001028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_COMP_1\r
-CYDEV_DWT_COMP_1 EQU 0xe0001030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_MASK_1\r
-CYDEV_DWT_MASK_1 EQU 0xe0001034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_FUNCTION_1\r
-CYDEV_DWT_FUNCTION_1 EQU 0xe0001038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_COMP_2\r
-CYDEV_DWT_COMP_2 EQU 0xe0001040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_MASK_2\r
-CYDEV_DWT_MASK_2 EQU 0xe0001044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_FUNCTION_2\r
-CYDEV_DWT_FUNCTION_2 EQU 0xe0001048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_COMP_3\r
-CYDEV_DWT_COMP_3 EQU 0xe0001050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_MASK_3\r
-CYDEV_DWT_MASK_3 EQU 0xe0001054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_FUNCTION_3\r
-CYDEV_DWT_FUNCTION_3 EQU 0xe0001058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_BASE\r
-CYDEV_FPB_BASE EQU 0xe0002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_SIZE\r
-CYDEV_FPB_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_CTRL\r
-CYDEV_FPB_CTRL EQU 0xe0002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_REMAP\r
-CYDEV_FPB_REMAP EQU 0xe0002004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_0\r
-CYDEV_FPB_FP_COMP_0 EQU 0xe0002008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_1\r
-CYDEV_FPB_FP_COMP_1 EQU 0xe000200c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_2\r
-CYDEV_FPB_FP_COMP_2 EQU 0xe0002010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_3\r
-CYDEV_FPB_FP_COMP_3 EQU 0xe0002014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_4\r
-CYDEV_FPB_FP_COMP_4 EQU 0xe0002018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_5\r
-CYDEV_FPB_FP_COMP_5 EQU 0xe000201c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_6\r
-CYDEV_FPB_FP_COMP_6 EQU 0xe0002020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_FP_COMP_7\r
-CYDEV_FPB_FP_COMP_7 EQU 0xe0002024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID4\r
-CYDEV_FPB_PID4 EQU 0xe0002fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID5\r
-CYDEV_FPB_PID5 EQU 0xe0002fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID6\r
-CYDEV_FPB_PID6 EQU 0xe0002fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID7\r
-CYDEV_FPB_PID7 EQU 0xe0002fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID0\r
-CYDEV_FPB_PID0 EQU 0xe0002fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID1\r
-CYDEV_FPB_PID1 EQU 0xe0002fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID2\r
-CYDEV_FPB_PID2 EQU 0xe0002fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_PID3\r
-CYDEV_FPB_PID3 EQU 0xe0002fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_CID0\r
-CYDEV_FPB_CID0 EQU 0xe0002ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_CID1\r
-CYDEV_FPB_CID1 EQU 0xe0002ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_CID2\r
-CYDEV_FPB_CID2 EQU 0xe0002ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_CID3\r
-CYDEV_FPB_CID3 EQU 0xe0002ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_BASE\r
-CYDEV_NVIC_BASE EQU 0xe000e000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SIZE\r
-CYDEV_NVIC_SIZE EQU 0x00000d3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_INT_CTL_TYPE\r
-CYDEV_NVIC_INT_CTL_TYPE EQU 0xe000e004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYSTICK_CTL\r
-CYDEV_NVIC_SYSTICK_CTL EQU 0xe000e010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYSTICK_RELOAD\r
-CYDEV_NVIC_SYSTICK_RELOAD EQU 0xe000e014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYSTICK_CURRENT\r
-CYDEV_NVIC_SYSTICK_CURRENT EQU 0xe000e018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYSTICK_CAL\r
-CYDEV_NVIC_SYSTICK_CAL EQU 0xe000e01c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SETENA0\r
-CYDEV_NVIC_SETENA0 EQU 0xe000e100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_CLRENA0\r
-CYDEV_NVIC_CLRENA0 EQU 0xe000e180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SETPEND0\r
-CYDEV_NVIC_SETPEND0 EQU 0xe000e200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_CLRPEND0\r
-CYDEV_NVIC_CLRPEND0 EQU 0xe000e280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_ACTIVE0\r
-CYDEV_NVIC_ACTIVE0 EQU 0xe000e300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_0\r
-CYDEV_NVIC_PRI_0 EQU 0xe000e400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_1\r
-CYDEV_NVIC_PRI_1 EQU 0xe000e401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_2\r
-CYDEV_NVIC_PRI_2 EQU 0xe000e402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_3\r
-CYDEV_NVIC_PRI_3 EQU 0xe000e403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_4\r
-CYDEV_NVIC_PRI_4 EQU 0xe000e404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_5\r
-CYDEV_NVIC_PRI_5 EQU 0xe000e405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_6\r
-CYDEV_NVIC_PRI_6 EQU 0xe000e406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_7\r
-CYDEV_NVIC_PRI_7 EQU 0xe000e407\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_8\r
-CYDEV_NVIC_PRI_8 EQU 0xe000e408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_9\r
-CYDEV_NVIC_PRI_9 EQU 0xe000e409\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_10\r
-CYDEV_NVIC_PRI_10 EQU 0xe000e40a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_11\r
-CYDEV_NVIC_PRI_11 EQU 0xe000e40b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_12\r
-CYDEV_NVIC_PRI_12 EQU 0xe000e40c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_13\r
-CYDEV_NVIC_PRI_13 EQU 0xe000e40d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_14\r
-CYDEV_NVIC_PRI_14 EQU 0xe000e40e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_15\r
-CYDEV_NVIC_PRI_15 EQU 0xe000e40f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_16\r
-CYDEV_NVIC_PRI_16 EQU 0xe000e410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_17\r
-CYDEV_NVIC_PRI_17 EQU 0xe000e411\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_18\r
-CYDEV_NVIC_PRI_18 EQU 0xe000e412\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_19\r
-CYDEV_NVIC_PRI_19 EQU 0xe000e413\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_20\r
-CYDEV_NVIC_PRI_20 EQU 0xe000e414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_21\r
-CYDEV_NVIC_PRI_21 EQU 0xe000e415\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_22\r
-CYDEV_NVIC_PRI_22 EQU 0xe000e416\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_23\r
-CYDEV_NVIC_PRI_23 EQU 0xe000e417\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_24\r
-CYDEV_NVIC_PRI_24 EQU 0xe000e418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_25\r
-CYDEV_NVIC_PRI_25 EQU 0xe000e419\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_26\r
-CYDEV_NVIC_PRI_26 EQU 0xe000e41a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_27\r
-CYDEV_NVIC_PRI_27 EQU 0xe000e41b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_28\r
-CYDEV_NVIC_PRI_28 EQU 0xe000e41c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_29\r
-CYDEV_NVIC_PRI_29 EQU 0xe000e41d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_30\r
-CYDEV_NVIC_PRI_30 EQU 0xe000e41e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_PRI_31\r
-CYDEV_NVIC_PRI_31 EQU 0xe000e41f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_CPUID_BASE\r
-CYDEV_NVIC_CPUID_BASE EQU 0xe000ed00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_INTR_CTRL_STATE\r
-CYDEV_NVIC_INTR_CTRL_STATE EQU 0xe000ed04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_VECT_OFFSET\r
-CYDEV_NVIC_VECT_OFFSET EQU 0xe000ed08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_APPLN_INTR\r
-CYDEV_NVIC_APPLN_INTR EQU 0xe000ed0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYSTEM_CONTROL\r
-CYDEV_NVIC_SYSTEM_CONTROL EQU 0xe000ed10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_CFG_CONTROL\r
-CYDEV_NVIC_CFG_CONTROL EQU 0xe000ed14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYS_PRIO_HANDLER_4_7\r
-CYDEV_NVIC_SYS_PRIO_HANDLER_4_7 EQU 0xe000ed18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYS_PRIO_HANDLER_8_11\r
-CYDEV_NVIC_SYS_PRIO_HANDLER_8_11 EQU 0xe000ed1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYS_PRIO_HANDLER_12_15\r
-CYDEV_NVIC_SYS_PRIO_HANDLER_12_15 EQU 0xe000ed20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SYS_HANDLER_CSR\r
-CYDEV_NVIC_SYS_HANDLER_CSR EQU 0xe000ed24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_MEMMAN_FAULT_STATUS\r
-CYDEV_NVIC_MEMMAN_FAULT_STATUS EQU 0xe000ed28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_BUS_FAULT_STATUS\r
-CYDEV_NVIC_BUS_FAULT_STATUS EQU 0xe000ed29\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_USAGE_FAULT_STATUS\r
-CYDEV_NVIC_USAGE_FAULT_STATUS EQU 0xe000ed2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_HARD_FAULT_STATUS\r
-CYDEV_NVIC_HARD_FAULT_STATUS EQU 0xe000ed2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_DEBUG_FAULT_STATUS\r
-CYDEV_NVIC_DEBUG_FAULT_STATUS EQU 0xe000ed30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_MEMMAN_FAULT_ADD\r
-CYDEV_NVIC_MEMMAN_FAULT_ADD EQU 0xe000ed34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_BUS_FAULT_ADD\r
-CYDEV_NVIC_BUS_FAULT_ADD EQU 0xe000ed38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_BASE\r
-CYDEV_CORE_DBG_BASE EQU 0xe000edf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_SIZE\r
-CYDEV_CORE_DBG_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_DBG_HLT_CS\r
-CYDEV_CORE_DBG_DBG_HLT_CS EQU 0xe000edf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_DBG_REG_SEL\r
-CYDEV_CORE_DBG_DBG_REG_SEL EQU 0xe000edf4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_DBG_REG_DATA\r
-CYDEV_CORE_DBG_DBG_REG_DATA EQU 0xe000edf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_EXC_MON_CTL\r
-CYDEV_CORE_DBG_EXC_MON_CTL EQU 0xe000edfc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_BASE\r
-CYDEV_TPIU_BASE EQU 0xe0040000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_SIZE\r
-CYDEV_TPIU_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ\r
-CYDEV_TPIU_SUPPORTED_SYNC_PRT_SZ EQU 0xe0040000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_CURRENT_SYNC_PRT_SZ\r
-CYDEV_TPIU_CURRENT_SYNC_PRT_SZ EQU 0xe0040004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ASYNC_CLK_PRESCALER\r
-CYDEV_TPIU_ASYNC_CLK_PRESCALER EQU 0xe0040010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PROTOCOL\r
-CYDEV_TPIU_PROTOCOL EQU 0xe00400f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_FORM_FLUSH_STAT\r
-CYDEV_TPIU_FORM_FLUSH_STAT EQU 0xe0040300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_FORM_FLUSH_CTRL\r
-CYDEV_TPIU_FORM_FLUSH_CTRL EQU 0xe0040304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_TRIGGER\r
-CYDEV_TPIU_TRIGGER EQU 0xe0040ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ITETMDATA\r
-CYDEV_TPIU_ITETMDATA EQU 0xe0040eec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ITATBCTR2\r
-CYDEV_TPIU_ITATBCTR2 EQU 0xe0040ef0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ITATBCTR0\r
-CYDEV_TPIU_ITATBCTR0 EQU 0xe0040ef8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ITITMDATA\r
-CYDEV_TPIU_ITITMDATA EQU 0xe0040efc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_ITCTRL\r
-CYDEV_TPIU_ITCTRL EQU 0xe0040f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_DEVID\r
-CYDEV_TPIU_DEVID EQU 0xe0040fc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_DEVTYPE\r
-CYDEV_TPIU_DEVTYPE EQU 0xe0040fcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID4\r
-CYDEV_TPIU_PID4 EQU 0xe0040fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID5\r
-CYDEV_TPIU_PID5 EQU 0xe0040fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID6\r
-CYDEV_TPIU_PID6 EQU 0xe0040fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID7\r
-CYDEV_TPIU_PID7 EQU 0xe0040fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID0\r
-CYDEV_TPIU_PID0 EQU 0xe0040fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID1\r
-CYDEV_TPIU_PID1 EQU 0xe0040fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID2\r
-CYDEV_TPIU_PID2 EQU 0xe0040fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_PID3\r
-CYDEV_TPIU_PID3 EQU 0xe0040fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_CID0\r
-CYDEV_TPIU_CID0 EQU 0xe0040ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_CID1\r
-CYDEV_TPIU_CID1 EQU 0xe0040ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_CID2\r
-CYDEV_TPIU_CID2 EQU 0xe0040ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_CID3\r
-CYDEV_TPIU_CID3 EQU 0xe0040ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_BASE\r
-CYDEV_ETM_BASE EQU 0xe0041000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_SIZE\r
-CYDEV_ETM_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CTL\r
-CYDEV_ETM_CTL EQU 0xe0041000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CFG_CODE\r
-CYDEV_ETM_CFG_CODE EQU 0xe0041004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_TRIG_EVENT\r
-CYDEV_ETM_TRIG_EVENT EQU 0xe0041008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_STATUS\r
-CYDEV_ETM_STATUS EQU 0xe0041010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_SYS_CFG\r
-CYDEV_ETM_SYS_CFG EQU 0xe0041014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_TRACE_ENB_EVENT\r
-CYDEV_ETM_TRACE_ENB_EVENT EQU 0xe0041020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_TRACE_EN_CTRL1\r
-CYDEV_ETM_TRACE_EN_CTRL1 EQU 0xe0041024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_FIFOFULL_LEVEL\r
-CYDEV_ETM_FIFOFULL_LEVEL EQU 0xe004102c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_SYNC_FREQ\r
-CYDEV_ETM_SYNC_FREQ EQU 0xe00411e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_ETM_ID\r
-CYDEV_ETM_ETM_ID EQU 0xe00411e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CFG_CODE_EXT\r
-CYDEV_ETM_CFG_CODE_EXT EQU 0xe00411e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_TR_SS_EMBICE_CTRL\r
-CYDEV_ETM_TR_SS_EMBICE_CTRL EQU 0xe00411f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CS_TRACE_ID\r
-CYDEV_ETM_CS_TRACE_ID EQU 0xe0041200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_OS_LOCK_ACCESS\r
-CYDEV_ETM_OS_LOCK_ACCESS EQU 0xe0041300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_OS_LOCK_STATUS\r
-CYDEV_ETM_OS_LOCK_STATUS EQU 0xe0041304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PDSR\r
-CYDEV_ETM_PDSR EQU 0xe0041314\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_ITMISCIN\r
-CYDEV_ETM_ITMISCIN EQU 0xe0041ee0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_ITTRIGOUT\r
-CYDEV_ETM_ITTRIGOUT EQU 0xe0041ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_ITATBCTR2\r
-CYDEV_ETM_ITATBCTR2 EQU 0xe0041ef0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_ITATBCTR0\r
-CYDEV_ETM_ITATBCTR0 EQU 0xe0041ef8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_INT_MODE_CTRL\r
-CYDEV_ETM_INT_MODE_CTRL EQU 0xe0041f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CLM_TAG_SET\r
-CYDEV_ETM_CLM_TAG_SET EQU 0xe0041fa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CLM_TAG_CLR\r
-CYDEV_ETM_CLM_TAG_CLR EQU 0xe0041fa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_LOCK_ACCESS\r
-CYDEV_ETM_LOCK_ACCESS EQU 0xe0041fb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_LOCK_STATUS\r
-CYDEV_ETM_LOCK_STATUS EQU 0xe0041fb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_AUTH_STATUS\r
-CYDEV_ETM_AUTH_STATUS EQU 0xe0041fb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_DEV_TYPE\r
-CYDEV_ETM_DEV_TYPE EQU 0xe0041fcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID4\r
-CYDEV_ETM_PID4 EQU 0xe0041fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID5\r
-CYDEV_ETM_PID5 EQU 0xe0041fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID6\r
-CYDEV_ETM_PID6 EQU 0xe0041fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID7\r
-CYDEV_ETM_PID7 EQU 0xe0041fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID0\r
-CYDEV_ETM_PID0 EQU 0xe0041fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID1\r
-CYDEV_ETM_PID1 EQU 0xe0041fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID2\r
-CYDEV_ETM_PID2 EQU 0xe0041fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_PID3\r
-CYDEV_ETM_PID3 EQU 0xe0041fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CID0\r
-CYDEV_ETM_CID0 EQU 0xe0041ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CID1\r
-CYDEV_ETM_CID1 EQU 0xe0041ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CID2\r
-CYDEV_ETM_CID2 EQU 0xe0041ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_CID3\r
-CYDEV_ETM_CID3 EQU 0xe0041ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_BASE\r
-CYDEV_ROM_TABLE_BASE EQU 0xe00ff000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_SIZE\r
-CYDEV_ROM_TABLE_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_NVIC\r
-CYDEV_ROM_TABLE_NVIC EQU 0xe00ff000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_DWT\r
-CYDEV_ROM_TABLE_DWT EQU 0xe00ff004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_FPB\r
-CYDEV_ROM_TABLE_FPB EQU 0xe00ff008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_ITM\r
-CYDEV_ROM_TABLE_ITM EQU 0xe00ff00c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_TPIU\r
-CYDEV_ROM_TABLE_TPIU EQU 0xe00ff010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_ETM\r
-CYDEV_ROM_TABLE_ETM EQU 0xe00ff014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_END\r
-CYDEV_ROM_TABLE_END EQU 0xe00ff018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_MEMTYPE\r
-CYDEV_ROM_TABLE_MEMTYPE EQU 0xe00fffcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID4\r
-CYDEV_ROM_TABLE_PID4 EQU 0xe00fffd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID5\r
-CYDEV_ROM_TABLE_PID5 EQU 0xe00fffd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID6\r
-CYDEV_ROM_TABLE_PID6 EQU 0xe00fffd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID7\r
-CYDEV_ROM_TABLE_PID7 EQU 0xe00fffdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID0\r
-CYDEV_ROM_TABLE_PID0 EQU 0xe00fffe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID1\r
-CYDEV_ROM_TABLE_PID1 EQU 0xe00fffe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID2\r
-CYDEV_ROM_TABLE_PID2 EQU 0xe00fffe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_PID3\r
-CYDEV_ROM_TABLE_PID3 EQU 0xe00fffec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_CID0\r
-CYDEV_ROM_TABLE_CID0 EQU 0xe00ffff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_CID1\r
-CYDEV_ROM_TABLE_CID1 EQU 0xe00ffff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_CID2\r
-CYDEV_ROM_TABLE_CID2 EQU 0xe00ffff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_CID3\r
-CYDEV_ROM_TABLE_CID3 EQU 0xe00ffffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_SIZE\r
-CYDEV_FLS_SIZE EQU CYDEV_FLASH_SIZE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_BASE\r
-CYDEV_ECC_BASE EQU CYDEV_FLSECC_BASE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_SECTOR_SIZE\r
-CYDEV_FLS_SECTOR_SIZE EQU 0x00010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_ROW_SIZE\r
-CYDEV_FLS_ROW_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_SECTOR_SIZE\r
-CYDEV_ECC_SECTOR_SIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_ROW_SIZE\r
-CYDEV_ECC_ROW_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EEPROM_SECTOR_SIZE\r
-CYDEV_EEPROM_SECTOR_SIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EEPROM_ROW_SIZE\r
-CYDEV_EEPROM_ROW_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PERIPH_BASE\r
-CYDEV_PERIPH_BASE EQU CYDEV_CLKDIST_BASE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_DISABLE\r
-CYCLK_LD_DISABLE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_SYNC_EN\r
-CYCLK_LD_SYNC_EN EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_LOAD\r
-CYCLK_LD_LOAD EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_PIPE\r
-CYCLK_PIPE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SSS\r
-CYCLK_SSS EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_EARLY\r
-CYCLK_EARLY EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_DUTY\r
-CYCLK_DUTY EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SYNC\r
-CYCLK_SYNC EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_D\r
-CYCLK_SRC_SEL_CLK_SYNC_D EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_SYNC_DIG\r
-CYCLK_SRC_SEL_SYNC_DIG EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_IMO\r
-CYCLK_SRC_SEL_IMO EQU 1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_MHZ\r
-CYCLK_SRC_SEL_XTAL_MHZ EQU 2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTALM\r
-CYCLK_SRC_SEL_XTALM EQU 2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_ILO\r
-CYCLK_SRC_SEL_ILO EQU 3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_PLL\r
-CYCLK_SRC_SEL_PLL EQU 4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_KHZ\r
-CYCLK_SRC_SEL_XTAL_KHZ EQU 5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTALK\r
-CYCLK_SRC_SEL_XTALK EQU 5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_G\r
-CYCLK_SRC_SEL_DSI_G EQU 6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_D\r
-CYCLK_SRC_SEL_DSI_D EQU 7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_A\r
-CYCLK_SRC_SEL_CLK_SYNC_A EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_A\r
-CYCLK_SRC_SEL_DSI_A EQU 7\r
-    ENDIF\r
-    END\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv_trm.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv_trm.inc
deleted file mode 100755 (executable)
index d4d800c..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydevicerv_trm.inc
+++ /dev/null
@@ -1,16039 +0,0 @@
-;\r
-; FILENAME: cydevicerv_trm.inc\r
-; \r
-; PSoC Creator 3.0 Component Pack 7\r
-;\r
-; DESCRIPTION:\r
-; This file provides all of the address values for the entire PSoC device.\r
-;\r
-;-------------------------------------------------------------------------------\r
-; Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-; You may use this file only in accordance with the license, terms, conditions, \r
-; disclaimers, and limitations in the end user license agreement accompanying \r
-; the software package with which this file was provided.\r
-;-------------------------------------------------------------------------------\r
-\r
-    IF :LNOT::DEF:CYDEV_FLASH_BASE\r
-CYDEV_FLASH_BASE EQU 0x00000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLASH_SIZE\r
-CYDEV_FLASH_SIZE EQU 0x00020000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLASH_DATA_MBASE\r
-CYREG_FLASH_DATA_MBASE EQU 0x00000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLASH_DATA_MSIZE\r
-CYREG_FLASH_DATA_MSIZE EQU 0x00020000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_BASE\r
-CYDEV_SRAM_BASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SRAM_SIZE\r
-CYDEV_SRAM_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE64K_MBASE\r
-CYREG_SRAM_CODE64K_MBASE EQU 0x1fff8000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE64K_MSIZE\r
-CYREG_SRAM_CODE64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE32K_MBASE\r
-CYREG_SRAM_CODE32K_MBASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE32K_MSIZE\r
-CYREG_SRAM_CODE32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE16K_MBASE\r
-CYREG_SRAM_CODE16K_MBASE EQU 0x1fffe000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE16K_MSIZE\r
-CYREG_SRAM_CODE16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE_MBASE\r
-CYREG_SRAM_CODE_MBASE EQU 0x1fffc000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_CODE_MSIZE\r
-CYREG_SRAM_CODE_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA_MBASE\r
-CYREG_SRAM_DATA_MBASE EQU 0x20000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA_MSIZE\r
-CYREG_SRAM_DATA_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA16K_MBASE\r
-CYREG_SRAM_DATA16K_MBASE EQU 0x20001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA16K_MSIZE\r
-CYREG_SRAM_DATA16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA32K_MBASE\r
-CYREG_SRAM_DATA32K_MBASE EQU 0x20002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA32K_MSIZE\r
-CYREG_SRAM_DATA32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA64K_MBASE\r
-CYREG_SRAM_DATA64K_MBASE EQU 0x20004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SRAM_DATA64K_MSIZE\r
-CYREG_SRAM_DATA64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_BASE\r
-CYDEV_DMA_BASE EQU 0x20008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DMA_SIZE\r
-CYDEV_DMA_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM64K_MBASE\r
-CYREG_DMA_SRAM64K_MBASE EQU 0x20008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM64K_MSIZE\r
-CYREG_DMA_SRAM64K_MSIZE EQU 0x00004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM32K_MBASE\r
-CYREG_DMA_SRAM32K_MBASE EQU 0x2000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM32K_MSIZE\r
-CYREG_DMA_SRAM32K_MSIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM16K_MBASE\r
-CYREG_DMA_SRAM16K_MBASE EQU 0x2000e000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM16K_MSIZE\r
-CYREG_DMA_SRAM16K_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM_MBASE\r
-CYREG_DMA_SRAM_MBASE EQU 0x2000f000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DMA_SRAM_MSIZE\r
-CYREG_DMA_SRAM_MSIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_BASE\r
-CYDEV_CLKDIST_BASE EQU 0x40004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_SIZE\r
-CYDEV_CLKDIST_SIZE EQU 0x00000110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_CR\r
-CYREG_CLKDIST_CR EQU 0x40004000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_LD\r
-CYREG_CLKDIST_LD EQU 0x40004001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_WRK0\r
-CYREG_CLKDIST_WRK0 EQU 0x40004002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_WRK1\r
-CYREG_CLKDIST_WRK1 EQU 0x40004003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_MSTR0\r
-CYREG_CLKDIST_MSTR0 EQU 0x40004004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_MSTR1\r
-CYREG_CLKDIST_MSTR1 EQU 0x40004005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_BCFG0\r
-CYREG_CLKDIST_BCFG0 EQU 0x40004006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_BCFG1\r
-CYREG_CLKDIST_BCFG1 EQU 0x40004007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_BCFG2\r
-CYREG_CLKDIST_BCFG2 EQU 0x40004008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_UCFG\r
-CYREG_CLKDIST_UCFG EQU 0x40004009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DLY0\r
-CYREG_CLKDIST_DLY0 EQU 0x4000400a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DLY1\r
-CYREG_CLKDIST_DLY1 EQU 0x4000400b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DMASK\r
-CYREG_CLKDIST_DMASK EQU 0x40004010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_AMASK\r
-CYREG_CLKDIST_AMASK EQU 0x40004014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_BASE\r
-CYDEV_CLKDIST_DCFG0_BASE EQU 0x40004080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG0_SIZE\r
-CYDEV_CLKDIST_DCFG0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG0\r
-CYREG_CLKDIST_DCFG0_CFG0 EQU 0x40004080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG1\r
-CYREG_CLKDIST_DCFG0_CFG1 EQU 0x40004081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG0_CFG2\r
-CYREG_CLKDIST_DCFG0_CFG2 EQU 0x40004082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_BASE\r
-CYDEV_CLKDIST_DCFG1_BASE EQU 0x40004084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG1_SIZE\r
-CYDEV_CLKDIST_DCFG1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG0\r
-CYREG_CLKDIST_DCFG1_CFG0 EQU 0x40004084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG1\r
-CYREG_CLKDIST_DCFG1_CFG1 EQU 0x40004085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG1_CFG2\r
-CYREG_CLKDIST_DCFG1_CFG2 EQU 0x40004086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_BASE\r
-CYDEV_CLKDIST_DCFG2_BASE EQU 0x40004088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG2_SIZE\r
-CYDEV_CLKDIST_DCFG2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG0\r
-CYREG_CLKDIST_DCFG2_CFG0 EQU 0x40004088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG1\r
-CYREG_CLKDIST_DCFG2_CFG1 EQU 0x40004089\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG2_CFG2\r
-CYREG_CLKDIST_DCFG2_CFG2 EQU 0x4000408a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_BASE\r
-CYDEV_CLKDIST_DCFG3_BASE EQU 0x4000408c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG3_SIZE\r
-CYDEV_CLKDIST_DCFG3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG0\r
-CYREG_CLKDIST_DCFG3_CFG0 EQU 0x4000408c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG1\r
-CYREG_CLKDIST_DCFG3_CFG1 EQU 0x4000408d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG3_CFG2\r
-CYREG_CLKDIST_DCFG3_CFG2 EQU 0x4000408e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_BASE\r
-CYDEV_CLKDIST_DCFG4_BASE EQU 0x40004090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG4_SIZE\r
-CYDEV_CLKDIST_DCFG4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG0\r
-CYREG_CLKDIST_DCFG4_CFG0 EQU 0x40004090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG1\r
-CYREG_CLKDIST_DCFG4_CFG1 EQU 0x40004091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG4_CFG2\r
-CYREG_CLKDIST_DCFG4_CFG2 EQU 0x40004092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_BASE\r
-CYDEV_CLKDIST_DCFG5_BASE EQU 0x40004094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG5_SIZE\r
-CYDEV_CLKDIST_DCFG5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG0\r
-CYREG_CLKDIST_DCFG5_CFG0 EQU 0x40004094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG1\r
-CYREG_CLKDIST_DCFG5_CFG1 EQU 0x40004095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG5_CFG2\r
-CYREG_CLKDIST_DCFG5_CFG2 EQU 0x40004096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_BASE\r
-CYDEV_CLKDIST_DCFG6_BASE EQU 0x40004098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG6_SIZE\r
-CYDEV_CLKDIST_DCFG6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG0\r
-CYREG_CLKDIST_DCFG6_CFG0 EQU 0x40004098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG1\r
-CYREG_CLKDIST_DCFG6_CFG1 EQU 0x40004099\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG6_CFG2\r
-CYREG_CLKDIST_DCFG6_CFG2 EQU 0x4000409a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_BASE\r
-CYDEV_CLKDIST_DCFG7_BASE EQU 0x4000409c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_DCFG7_SIZE\r
-CYDEV_CLKDIST_DCFG7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG0\r
-CYREG_CLKDIST_DCFG7_CFG0 EQU 0x4000409c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG1\r
-CYREG_CLKDIST_DCFG7_CFG1 EQU 0x4000409d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_DCFG7_CFG2\r
-CYREG_CLKDIST_DCFG7_CFG2 EQU 0x4000409e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_BASE\r
-CYDEV_CLKDIST_ACFG0_BASE EQU 0x40004100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG0_SIZE\r
-CYDEV_CLKDIST_ACFG0_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG0\r
-CYREG_CLKDIST_ACFG0_CFG0 EQU 0x40004100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG1\r
-CYREG_CLKDIST_ACFG0_CFG1 EQU 0x40004101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG2\r
-CYREG_CLKDIST_ACFG0_CFG2 EQU 0x40004102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG0_CFG3\r
-CYREG_CLKDIST_ACFG0_CFG3 EQU 0x40004103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_BASE\r
-CYDEV_CLKDIST_ACFG1_BASE EQU 0x40004104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG1_SIZE\r
-CYDEV_CLKDIST_ACFG1_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG0\r
-CYREG_CLKDIST_ACFG1_CFG0 EQU 0x40004104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG1\r
-CYREG_CLKDIST_ACFG1_CFG1 EQU 0x40004105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG2\r
-CYREG_CLKDIST_ACFG1_CFG2 EQU 0x40004106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG1_CFG3\r
-CYREG_CLKDIST_ACFG1_CFG3 EQU 0x40004107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_BASE\r
-CYDEV_CLKDIST_ACFG2_BASE EQU 0x40004108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG2_SIZE\r
-CYDEV_CLKDIST_ACFG2_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG0\r
-CYREG_CLKDIST_ACFG2_CFG0 EQU 0x40004108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG1\r
-CYREG_CLKDIST_ACFG2_CFG1 EQU 0x40004109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG2\r
-CYREG_CLKDIST_ACFG2_CFG2 EQU 0x4000410a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG2_CFG3\r
-CYREG_CLKDIST_ACFG2_CFG3 EQU 0x4000410b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_BASE\r
-CYDEV_CLKDIST_ACFG3_BASE EQU 0x4000410c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CLKDIST_ACFG3_SIZE\r
-CYDEV_CLKDIST_ACFG3_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG0\r
-CYREG_CLKDIST_ACFG3_CFG0 EQU 0x4000410c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG1\r
-CYREG_CLKDIST_ACFG3_CFG1 EQU 0x4000410d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG2\r
-CYREG_CLKDIST_ACFG3_CFG2 EQU 0x4000410e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CLKDIST_ACFG3_CFG3\r
-CYREG_CLKDIST_ACFG3_CFG3 EQU 0x4000410f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_BASE\r
-CYDEV_FASTCLK_BASE EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_SIZE\r
-CYDEV_FASTCLK_SIZE EQU 0x00000026\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_IMO_BASE\r
-CYDEV_FASTCLK_IMO_BASE EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_IMO_SIZE\r
-CYDEV_FASTCLK_IMO_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_IMO_CR\r
-CYREG_FASTCLK_IMO_CR EQU 0x40004200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_BASE\r
-CYDEV_FASTCLK_XMHZ_BASE EQU 0x40004210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_XMHZ_SIZE\r
-CYDEV_FASTCLK_XMHZ_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CSR\r
-CYREG_FASTCLK_XMHZ_CSR EQU 0x40004210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CFG0\r
-CYREG_FASTCLK_XMHZ_CFG0 EQU 0x40004212\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_XMHZ_CFG1\r
-CYREG_FASTCLK_XMHZ_CFG1 EQU 0x40004213\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_BASE\r
-CYDEV_FASTCLK_PLL_BASE EQU 0x40004220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FASTCLK_PLL_SIZE\r
-CYDEV_FASTCLK_PLL_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_PLL_CFG0\r
-CYREG_FASTCLK_PLL_CFG0 EQU 0x40004220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_PLL_CFG1\r
-CYREG_FASTCLK_PLL_CFG1 EQU 0x40004221\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_PLL_P\r
-CYREG_FASTCLK_PLL_P EQU 0x40004222\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_PLL_Q\r
-CYREG_FASTCLK_PLL_Q EQU 0x40004223\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FASTCLK_PLL_SR\r
-CYREG_FASTCLK_PLL_SR EQU 0x40004225\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_BASE\r
-CYDEV_SLOWCLK_BASE EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_SIZE\r
-CYDEV_SLOWCLK_SIZE EQU 0x0000000b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_BASE\r
-CYDEV_SLOWCLK_ILO_BASE EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_ILO_SIZE\r
-CYDEV_SLOWCLK_ILO_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SLOWCLK_ILO_CR0\r
-CYREG_SLOWCLK_ILO_CR0 EQU 0x40004300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SLOWCLK_ILO_CR1\r
-CYREG_SLOWCLK_ILO_CR1 EQU 0x40004301\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_BASE\r
-CYDEV_SLOWCLK_X32_BASE EQU 0x40004308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SLOWCLK_X32_SIZE\r
-CYDEV_SLOWCLK_X32_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SLOWCLK_X32_CR\r
-CYREG_SLOWCLK_X32_CR EQU 0x40004308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SLOWCLK_X32_CFG\r
-CYREG_SLOWCLK_X32_CFG EQU 0x40004309\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SLOWCLK_X32_TST\r
-CYREG_SLOWCLK_X32_TST EQU 0x4000430a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_BASE\r
-CYDEV_BOOST_BASE EQU 0x40004320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_BOOST_SIZE\r
-CYDEV_BOOST_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_CR0\r
-CYREG_BOOST_CR0 EQU 0x40004320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_CR1\r
-CYREG_BOOST_CR1 EQU 0x40004321\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_CR2\r
-CYREG_BOOST_CR2 EQU 0x40004322\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_CR3\r
-CYREG_BOOST_CR3 EQU 0x40004323\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_SR\r
-CYREG_BOOST_SR EQU 0x40004324\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_CR4\r
-CYREG_BOOST_CR4 EQU 0x40004325\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BOOST_SR2\r
-CYREG_BOOST_SR2 EQU 0x40004326\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_BASE\r
-CYDEV_PWRSYS_BASE EQU 0x40004330\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PWRSYS_SIZE\r
-CYDEV_PWRSYS_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_CR0\r
-CYREG_PWRSYS_CR0 EQU 0x40004330\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_CR1\r
-CYREG_PWRSYS_CR1 EQU 0x40004331\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_BASE\r
-CYDEV_PM_BASE EQU 0x40004380\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_SIZE\r
-CYDEV_PM_SIZE EQU 0x00000057\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_TW_CFG0\r
-CYREG_PM_TW_CFG0 EQU 0x40004380\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_TW_CFG1\r
-CYREG_PM_TW_CFG1 EQU 0x40004381\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_TW_CFG2\r
-CYREG_PM_TW_CFG2 EQU 0x40004382\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_WDT_CFG\r
-CYREG_PM_WDT_CFG EQU 0x40004383\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_WDT_CR\r
-CYREG_PM_WDT_CR EQU 0x40004384\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_INT_SR\r
-CYREG_PM_INT_SR EQU 0x40004390\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_MODE_CFG0\r
-CYREG_PM_MODE_CFG0 EQU 0x40004391\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_MODE_CFG1\r
-CYREG_PM_MODE_CFG1 EQU 0x40004392\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_MODE_CSR\r
-CYREG_PM_MODE_CSR EQU 0x40004393\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_USB_CR0\r
-CYREG_PM_USB_CR0 EQU 0x40004394\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG0\r
-CYREG_PM_WAKEUP_CFG0 EQU 0x40004398\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG1\r
-CYREG_PM_WAKEUP_CFG1 EQU 0x40004399\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_WAKEUP_CFG2\r
-CYREG_PM_WAKEUP_CFG2 EQU 0x4000439a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_BASE\r
-CYDEV_PM_ACT_BASE EQU 0x400043a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_ACT_SIZE\r
-CYDEV_PM_ACT_SIZE EQU 0x0000000e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG0\r
-CYREG_PM_ACT_CFG0 EQU 0x400043a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG1\r
-CYREG_PM_ACT_CFG1 EQU 0x400043a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG2\r
-CYREG_PM_ACT_CFG2 EQU 0x400043a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG3\r
-CYREG_PM_ACT_CFG3 EQU 0x400043a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG4\r
-CYREG_PM_ACT_CFG4 EQU 0x400043a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG5\r
-CYREG_PM_ACT_CFG5 EQU 0x400043a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG6\r
-CYREG_PM_ACT_CFG6 EQU 0x400043a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG7\r
-CYREG_PM_ACT_CFG7 EQU 0x400043a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG8\r
-CYREG_PM_ACT_CFG8 EQU 0x400043a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG9\r
-CYREG_PM_ACT_CFG9 EQU 0x400043a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG10\r
-CYREG_PM_ACT_CFG10 EQU 0x400043aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG11\r
-CYREG_PM_ACT_CFG11 EQU 0x400043ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG12\r
-CYREG_PM_ACT_CFG12 EQU 0x400043ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_ACT_CFG13\r
-CYREG_PM_ACT_CFG13 EQU 0x400043ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_BASE\r
-CYDEV_PM_STBY_BASE EQU 0x400043b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_STBY_SIZE\r
-CYDEV_PM_STBY_SIZE EQU 0x0000000e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG0\r
-CYREG_PM_STBY_CFG0 EQU 0x400043b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG1\r
-CYREG_PM_STBY_CFG1 EQU 0x400043b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG2\r
-CYREG_PM_STBY_CFG2 EQU 0x400043b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG3\r
-CYREG_PM_STBY_CFG3 EQU 0x400043b3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG4\r
-CYREG_PM_STBY_CFG4 EQU 0x400043b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG5\r
-CYREG_PM_STBY_CFG5 EQU 0x400043b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG6\r
-CYREG_PM_STBY_CFG6 EQU 0x400043b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG7\r
-CYREG_PM_STBY_CFG7 EQU 0x400043b7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG8\r
-CYREG_PM_STBY_CFG8 EQU 0x400043b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG9\r
-CYREG_PM_STBY_CFG9 EQU 0x400043b9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG10\r
-CYREG_PM_STBY_CFG10 EQU 0x400043ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG11\r
-CYREG_PM_STBY_CFG11 EQU 0x400043bb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG12\r
-CYREG_PM_STBY_CFG12 EQU 0x400043bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_STBY_CFG13\r
-CYREG_PM_STBY_CFG13 EQU 0x400043bd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_BASE\r
-CYDEV_PM_AVAIL_BASE EQU 0x400043c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PM_AVAIL_SIZE\r
-CYDEV_PM_AVAIL_SIZE EQU 0x00000017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR0\r
-CYREG_PM_AVAIL_CR0 EQU 0x400043c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR1\r
-CYREG_PM_AVAIL_CR1 EQU 0x400043c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR2\r
-CYREG_PM_AVAIL_CR2 EQU 0x400043c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR3\r
-CYREG_PM_AVAIL_CR3 EQU 0x400043c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR4\r
-CYREG_PM_AVAIL_CR4 EQU 0x400043c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR5\r
-CYREG_PM_AVAIL_CR5 EQU 0x400043c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_CR6\r
-CYREG_PM_AVAIL_CR6 EQU 0x400043c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR0\r
-CYREG_PM_AVAIL_SR0 EQU 0x400043d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR1\r
-CYREG_PM_AVAIL_SR1 EQU 0x400043d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR2\r
-CYREG_PM_AVAIL_SR2 EQU 0x400043d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR3\r
-CYREG_PM_AVAIL_SR3 EQU 0x400043d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR4\r
-CYREG_PM_AVAIL_SR4 EQU 0x400043d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR5\r
-CYREG_PM_AVAIL_SR5 EQU 0x400043d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PM_AVAIL_SR6\r
-CYREG_PM_AVAIL_SR6 EQU 0x400043d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_BASE\r
-CYDEV_PICU_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SIZE\r
-CYDEV_PICU_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_BASE\r
-CYDEV_PICU_INTTYPE_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_SIZE\r
-CYDEV_PICU_INTTYPE_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_BASE\r
-CYDEV_PICU_INTTYPE_PICU0_BASE EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU0_SIZE\r
-CYDEV_PICU_INTTYPE_PICU0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE0\r
-CYREG_PICU0_INTTYPE0 EQU 0x40004500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE1\r
-CYREG_PICU0_INTTYPE1 EQU 0x40004501\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE2\r
-CYREG_PICU0_INTTYPE2 EQU 0x40004502\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE3\r
-CYREG_PICU0_INTTYPE3 EQU 0x40004503\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE4\r
-CYREG_PICU0_INTTYPE4 EQU 0x40004504\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE5\r
-CYREG_PICU0_INTTYPE5 EQU 0x40004505\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE6\r
-CYREG_PICU0_INTTYPE6 EQU 0x40004506\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTTYPE7\r
-CYREG_PICU0_INTTYPE7 EQU 0x40004507\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_BASE\r
-CYDEV_PICU_INTTYPE_PICU1_BASE EQU 0x40004508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU1_SIZE\r
-CYDEV_PICU_INTTYPE_PICU1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE0\r
-CYREG_PICU1_INTTYPE0 EQU 0x40004508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE1\r
-CYREG_PICU1_INTTYPE1 EQU 0x40004509\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE2\r
-CYREG_PICU1_INTTYPE2 EQU 0x4000450a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE3\r
-CYREG_PICU1_INTTYPE3 EQU 0x4000450b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE4\r
-CYREG_PICU1_INTTYPE4 EQU 0x4000450c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE5\r
-CYREG_PICU1_INTTYPE5 EQU 0x4000450d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE6\r
-CYREG_PICU1_INTTYPE6 EQU 0x4000450e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTTYPE7\r
-CYREG_PICU1_INTTYPE7 EQU 0x4000450f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_BASE\r
-CYDEV_PICU_INTTYPE_PICU2_BASE EQU 0x40004510\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU2_SIZE\r
-CYDEV_PICU_INTTYPE_PICU2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE0\r
-CYREG_PICU2_INTTYPE0 EQU 0x40004510\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE1\r
-CYREG_PICU2_INTTYPE1 EQU 0x40004511\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE2\r
-CYREG_PICU2_INTTYPE2 EQU 0x40004512\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE3\r
-CYREG_PICU2_INTTYPE3 EQU 0x40004513\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE4\r
-CYREG_PICU2_INTTYPE4 EQU 0x40004514\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE5\r
-CYREG_PICU2_INTTYPE5 EQU 0x40004515\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE6\r
-CYREG_PICU2_INTTYPE6 EQU 0x40004516\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTTYPE7\r
-CYREG_PICU2_INTTYPE7 EQU 0x40004517\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_BASE\r
-CYDEV_PICU_INTTYPE_PICU3_BASE EQU 0x40004518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU3_SIZE\r
-CYDEV_PICU_INTTYPE_PICU3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE0\r
-CYREG_PICU3_INTTYPE0 EQU 0x40004518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE1\r
-CYREG_PICU3_INTTYPE1 EQU 0x40004519\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE2\r
-CYREG_PICU3_INTTYPE2 EQU 0x4000451a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE3\r
-CYREG_PICU3_INTTYPE3 EQU 0x4000451b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE4\r
-CYREG_PICU3_INTTYPE4 EQU 0x4000451c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE5\r
-CYREG_PICU3_INTTYPE5 EQU 0x4000451d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE6\r
-CYREG_PICU3_INTTYPE6 EQU 0x4000451e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTTYPE7\r
-CYREG_PICU3_INTTYPE7 EQU 0x4000451f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_BASE\r
-CYDEV_PICU_INTTYPE_PICU4_BASE EQU 0x40004520\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU4_SIZE\r
-CYDEV_PICU_INTTYPE_PICU4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE0\r
-CYREG_PICU4_INTTYPE0 EQU 0x40004520\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE1\r
-CYREG_PICU4_INTTYPE1 EQU 0x40004521\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE2\r
-CYREG_PICU4_INTTYPE2 EQU 0x40004522\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE3\r
-CYREG_PICU4_INTTYPE3 EQU 0x40004523\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE4\r
-CYREG_PICU4_INTTYPE4 EQU 0x40004524\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE5\r
-CYREG_PICU4_INTTYPE5 EQU 0x40004525\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE6\r
-CYREG_PICU4_INTTYPE6 EQU 0x40004526\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTTYPE7\r
-CYREG_PICU4_INTTYPE7 EQU 0x40004527\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_BASE\r
-CYDEV_PICU_INTTYPE_PICU5_BASE EQU 0x40004528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU5_SIZE\r
-CYDEV_PICU_INTTYPE_PICU5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE0\r
-CYREG_PICU5_INTTYPE0 EQU 0x40004528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE1\r
-CYREG_PICU5_INTTYPE1 EQU 0x40004529\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE2\r
-CYREG_PICU5_INTTYPE2 EQU 0x4000452a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE3\r
-CYREG_PICU5_INTTYPE3 EQU 0x4000452b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE4\r
-CYREG_PICU5_INTTYPE4 EQU 0x4000452c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE5\r
-CYREG_PICU5_INTTYPE5 EQU 0x4000452d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE6\r
-CYREG_PICU5_INTTYPE6 EQU 0x4000452e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTTYPE7\r
-CYREG_PICU5_INTTYPE7 EQU 0x4000452f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_BASE\r
-CYDEV_PICU_INTTYPE_PICU6_BASE EQU 0x40004530\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU6_SIZE\r
-CYDEV_PICU_INTTYPE_PICU6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE0\r
-CYREG_PICU6_INTTYPE0 EQU 0x40004530\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE1\r
-CYREG_PICU6_INTTYPE1 EQU 0x40004531\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE2\r
-CYREG_PICU6_INTTYPE2 EQU 0x40004532\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE3\r
-CYREG_PICU6_INTTYPE3 EQU 0x40004533\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE4\r
-CYREG_PICU6_INTTYPE4 EQU 0x40004534\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE5\r
-CYREG_PICU6_INTTYPE5 EQU 0x40004535\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE6\r
-CYREG_PICU6_INTTYPE6 EQU 0x40004536\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTTYPE7\r
-CYREG_PICU6_INTTYPE7 EQU 0x40004537\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_BASE\r
-CYDEV_PICU_INTTYPE_PICU12_BASE EQU 0x40004560\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU12_SIZE\r
-CYDEV_PICU_INTTYPE_PICU12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE0\r
-CYREG_PICU12_INTTYPE0 EQU 0x40004560\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE1\r
-CYREG_PICU12_INTTYPE1 EQU 0x40004561\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE2\r
-CYREG_PICU12_INTTYPE2 EQU 0x40004562\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE3\r
-CYREG_PICU12_INTTYPE3 EQU 0x40004563\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE4\r
-CYREG_PICU12_INTTYPE4 EQU 0x40004564\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE5\r
-CYREG_PICU12_INTTYPE5 EQU 0x40004565\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE6\r
-CYREG_PICU12_INTTYPE6 EQU 0x40004566\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTTYPE7\r
-CYREG_PICU12_INTTYPE7 EQU 0x40004567\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_BASE\r
-CYDEV_PICU_INTTYPE_PICU15_BASE EQU 0x40004578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_INTTYPE_PICU15_SIZE\r
-CYDEV_PICU_INTTYPE_PICU15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE0\r
-CYREG_PICU15_INTTYPE0 EQU 0x40004578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE1\r
-CYREG_PICU15_INTTYPE1 EQU 0x40004579\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE2\r
-CYREG_PICU15_INTTYPE2 EQU 0x4000457a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE3\r
-CYREG_PICU15_INTTYPE3 EQU 0x4000457b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE4\r
-CYREG_PICU15_INTTYPE4 EQU 0x4000457c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE5\r
-CYREG_PICU15_INTTYPE5 EQU 0x4000457d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE6\r
-CYREG_PICU15_INTTYPE6 EQU 0x4000457e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTTYPE7\r
-CYREG_PICU15_INTTYPE7 EQU 0x4000457f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_BASE\r
-CYDEV_PICU_STAT_BASE EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_SIZE\r
-CYDEV_PICU_STAT_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_BASE\r
-CYDEV_PICU_STAT_PICU0_BASE EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU0_SIZE\r
-CYDEV_PICU_STAT_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_INTSTAT\r
-CYREG_PICU0_INTSTAT EQU 0x40004580\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_BASE\r
-CYDEV_PICU_STAT_PICU1_BASE EQU 0x40004581\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU1_SIZE\r
-CYDEV_PICU_STAT_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_INTSTAT\r
-CYREG_PICU1_INTSTAT EQU 0x40004581\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_BASE\r
-CYDEV_PICU_STAT_PICU2_BASE EQU 0x40004582\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU2_SIZE\r
-CYDEV_PICU_STAT_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_INTSTAT\r
-CYREG_PICU2_INTSTAT EQU 0x40004582\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_BASE\r
-CYDEV_PICU_STAT_PICU3_BASE EQU 0x40004583\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU3_SIZE\r
-CYDEV_PICU_STAT_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_INTSTAT\r
-CYREG_PICU3_INTSTAT EQU 0x40004583\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_BASE\r
-CYDEV_PICU_STAT_PICU4_BASE EQU 0x40004584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU4_SIZE\r
-CYDEV_PICU_STAT_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_INTSTAT\r
-CYREG_PICU4_INTSTAT EQU 0x40004584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_BASE\r
-CYDEV_PICU_STAT_PICU5_BASE EQU 0x40004585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU5_SIZE\r
-CYDEV_PICU_STAT_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_INTSTAT\r
-CYREG_PICU5_INTSTAT EQU 0x40004585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_BASE\r
-CYDEV_PICU_STAT_PICU6_BASE EQU 0x40004586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU6_SIZE\r
-CYDEV_PICU_STAT_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_INTSTAT\r
-CYREG_PICU6_INTSTAT EQU 0x40004586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_BASE\r
-CYDEV_PICU_STAT_PICU12_BASE EQU 0x4000458c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU12_SIZE\r
-CYDEV_PICU_STAT_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_INTSTAT\r
-CYREG_PICU12_INTSTAT EQU 0x4000458c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_BASE\r
-CYDEV_PICU_STAT_PICU15_BASE EQU 0x4000458f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_STAT_PICU15_SIZE\r
-CYDEV_PICU_STAT_PICU15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_INTSTAT\r
-CYREG_PICU15_INTSTAT EQU 0x4000458f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_BASE\r
-CYDEV_PICU_SNAP_BASE EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_SIZE\r
-CYDEV_PICU_SNAP_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_BASE\r
-CYDEV_PICU_SNAP_PICU0_BASE EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU0_SIZE\r
-CYDEV_PICU_SNAP_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_SNAP\r
-CYREG_PICU0_SNAP EQU 0x40004590\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_BASE\r
-CYDEV_PICU_SNAP_PICU1_BASE EQU 0x40004591\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU1_SIZE\r
-CYDEV_PICU_SNAP_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_SNAP\r
-CYREG_PICU1_SNAP EQU 0x40004591\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_BASE\r
-CYDEV_PICU_SNAP_PICU2_BASE EQU 0x40004592\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU2_SIZE\r
-CYDEV_PICU_SNAP_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_SNAP\r
-CYREG_PICU2_SNAP EQU 0x40004592\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_BASE\r
-CYDEV_PICU_SNAP_PICU3_BASE EQU 0x40004593\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU3_SIZE\r
-CYDEV_PICU_SNAP_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_SNAP\r
-CYREG_PICU3_SNAP EQU 0x40004593\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_BASE\r
-CYDEV_PICU_SNAP_PICU4_BASE EQU 0x40004594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU4_SIZE\r
-CYDEV_PICU_SNAP_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_SNAP\r
-CYREG_PICU4_SNAP EQU 0x40004594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_BASE\r
-CYDEV_PICU_SNAP_PICU5_BASE EQU 0x40004595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU5_SIZE\r
-CYDEV_PICU_SNAP_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_SNAP\r
-CYREG_PICU5_SNAP EQU 0x40004595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_BASE\r
-CYDEV_PICU_SNAP_PICU6_BASE EQU 0x40004596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU6_SIZE\r
-CYDEV_PICU_SNAP_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_SNAP\r
-CYREG_PICU6_SNAP EQU 0x40004596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_BASE\r
-CYDEV_PICU_SNAP_PICU12_BASE EQU 0x4000459c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU12_SIZE\r
-CYDEV_PICU_SNAP_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_SNAP\r
-CYREG_PICU12_SNAP EQU 0x4000459c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_BASE\r
-CYDEV_PICU_SNAP_PICU_15_BASE EQU 0x4000459f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_SNAP_PICU_15_SIZE\r
-CYDEV_PICU_SNAP_PICU_15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU_15_SNAP_15\r
-CYREG_PICU_15_SNAP_15 EQU 0x4000459f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_BASE\r
-CYDEV_PICU_DISABLE_COR_BASE EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_SIZE\r
-CYDEV_PICU_DISABLE_COR_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU0_BASE EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU0_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU0_DISABLE_COR\r
-CYREG_PICU0_DISABLE_COR EQU 0x400045a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU1_BASE EQU 0x400045a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU1_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU1_DISABLE_COR\r
-CYREG_PICU1_DISABLE_COR EQU 0x400045a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU2_BASE EQU 0x400045a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU2_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU2_DISABLE_COR\r
-CYREG_PICU2_DISABLE_COR EQU 0x400045a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU3_BASE EQU 0x400045a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU3_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU3_DISABLE_COR\r
-CYREG_PICU3_DISABLE_COR EQU 0x400045a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU4_BASE EQU 0x400045a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU4_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU4_DISABLE_COR\r
-CYREG_PICU4_DISABLE_COR EQU 0x400045a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU5_BASE EQU 0x400045a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU5_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU5_DISABLE_COR\r
-CYREG_PICU5_DISABLE_COR EQU 0x400045a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU6_BASE EQU 0x400045a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU6_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU6_DISABLE_COR\r
-CYREG_PICU6_DISABLE_COR EQU 0x400045a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU12_BASE EQU 0x400045ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU12_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU12_DISABLE_COR\r
-CYREG_PICU12_DISABLE_COR EQU 0x400045ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_BASE\r
-CYDEV_PICU_DISABLE_COR_PICU15_BASE EQU 0x400045af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PICU_DISABLE_COR_PICU15_SIZE\r
-CYDEV_PICU_DISABLE_COR_PICU15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PICU15_DISABLE_COR\r
-CYREG_PICU15_DISABLE_COR EQU 0x400045af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_BASE\r
-CYDEV_MFGCFG_BASE EQU 0x40004600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_SIZE\r
-CYDEV_MFGCFG_SIZE EQU 0x000000ed\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_BASE\r
-CYDEV_MFGCFG_ANAIF_BASE EQU 0x40004600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SIZE\r
-CYDEV_MFGCFG_ANAIF_SIZE EQU 0x00000038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC0_BASE EQU 0x40004608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC0_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_TR\r
-CYREG_DAC0_TR EQU 0x40004608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC1_BASE EQU 0x40004609\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC1_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_TR\r
-CYREG_DAC1_TR EQU 0x40004609\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC2_BASE EQU 0x4000460a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC2_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_TR\r
-CYREG_DAC2_TR EQU 0x4000460a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_BASE\r
-CYDEV_MFGCFG_ANAIF_DAC3_BASE EQU 0x4000460b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_DAC3_SIZE\r
-CYDEV_MFGCFG_ANAIF_DAC3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_TR\r
-CYREG_DAC3_TR EQU 0x4000460b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_DSM_BASE EQU 0x40004610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_DSM_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NPUMP_DSM_TR0\r
-CYREG_NPUMP_DSM_TR0 EQU 0x40004610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_SC_BASE EQU 0x40004611\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_SC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NPUMP_SC_TR0\r
-CYREG_NPUMP_SC_TR0 EQU 0x40004611\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_BASE EQU 0x40004612\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE\r
-CYDEV_MFGCFG_ANAIF_NPUMP_OPAMP_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NPUMP_OPAMP_TR0\r
-CYREG_NPUMP_OPAMP_TR0 EQU 0x40004612\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_BASE\r
-CYDEV_MFGCFG_ANAIF_SAR0_BASE EQU 0x40004614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR0_SIZE\r
-CYDEV_MFGCFG_ANAIF_SAR0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_TR0\r
-CYREG_SAR0_TR0 EQU 0x40004614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_BASE\r
-CYDEV_MFGCFG_ANAIF_SAR1_BASE EQU 0x40004616\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_SAR1_SIZE\r
-CYDEV_MFGCFG_ANAIF_SAR1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_TR0\r
-CYREG_SAR1_TR0 EQU 0x40004616\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_BASE EQU 0x40004620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_TR0\r
-CYREG_OPAMP0_TR0 EQU 0x40004620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_TR1\r
-CYREG_OPAMP0_TR1 EQU 0x40004621\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_BASE EQU 0x40004622\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_TR0\r
-CYREG_OPAMP1_TR0 EQU 0x40004622\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_TR1\r
-CYREG_OPAMP1_TR1 EQU 0x40004623\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_BASE EQU 0x40004624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_TR0\r
-CYREG_OPAMP2_TR0 EQU 0x40004624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_TR1\r
-CYREG_OPAMP2_TR1 EQU 0x40004625\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_BASE\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_BASE EQU 0x40004626\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE\r
-CYDEV_MFGCFG_ANAIF_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_TR0\r
-CYREG_OPAMP3_TR0 EQU 0x40004626\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_TR1\r
-CYREG_OPAMP3_TR1 EQU 0x40004627\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP0_BASE EQU 0x40004630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP0_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_TR0\r
-CYREG_CMP0_TR0 EQU 0x40004630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_TR1\r
-CYREG_CMP0_TR1 EQU 0x40004631\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP1_BASE EQU 0x40004632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP1_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_TR0\r
-CYREG_CMP1_TR0 EQU 0x40004632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_TR1\r
-CYREG_CMP1_TR1 EQU 0x40004633\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP2_BASE EQU 0x40004634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP2_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_TR0\r
-CYREG_CMP2_TR0 EQU 0x40004634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_TR1\r
-CYREG_CMP2_TR1 EQU 0x40004635\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_BASE\r
-CYDEV_MFGCFG_ANAIF_CMP3_BASE EQU 0x40004636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ANAIF_CMP3_SIZE\r
-CYDEV_MFGCFG_ANAIF_CMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_TR0\r
-CYREG_CMP3_TR0 EQU 0x40004636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_TR1\r
-CYREG_CMP3_TR1 EQU 0x40004637\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_BASE\r
-CYDEV_MFGCFG_PWRSYS_BASE EQU 0x40004680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_PWRSYS_SIZE\r
-CYDEV_MFGCFG_PWRSYS_SIZE EQU 0x0000000b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_HIB_TR0\r
-CYREG_PWRSYS_HIB_TR0 EQU 0x40004680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_HIB_TR1\r
-CYREG_PWRSYS_HIB_TR1 EQU 0x40004681\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_I2C_TR\r
-CYREG_PWRSYS_I2C_TR EQU 0x40004682\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_SLP_TR\r
-CYREG_PWRSYS_SLP_TR EQU 0x40004683\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_BUZZ_TR\r
-CYREG_PWRSYS_BUZZ_TR EQU 0x40004684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR0\r
-CYREG_PWRSYS_WAKE_TR0 EQU 0x40004685\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR1\r
-CYREG_PWRSYS_WAKE_TR1 EQU 0x40004686\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_BREF_TR\r
-CYREG_PWRSYS_BREF_TR EQU 0x40004687\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_BG_TR\r
-CYREG_PWRSYS_BG_TR EQU 0x40004688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR2\r
-CYREG_PWRSYS_WAKE_TR2 EQU 0x40004689\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PWRSYS_WAKE_TR3\r
-CYREG_PWRSYS_WAKE_TR3 EQU 0x4000468a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_BASE\r
-CYDEV_MFGCFG_ILO_BASE EQU 0x40004690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_ILO_SIZE\r
-CYDEV_MFGCFG_ILO_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ILO_TR0\r
-CYREG_ILO_TR0 EQU 0x40004690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ILO_TR1\r
-CYREG_ILO_TR1 EQU 0x40004691\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_X32_BASE\r
-CYDEV_MFGCFG_X32_BASE EQU 0x40004698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_X32_SIZE\r
-CYDEV_MFGCFG_X32_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_X32_TR\r
-CYREG_X32_TR EQU 0x40004698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_BASE\r
-CYDEV_MFGCFG_IMO_BASE EQU 0x400046a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_IMO_SIZE\r
-CYDEV_MFGCFG_IMO_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IMO_TR0\r
-CYREG_IMO_TR0 EQU 0x400046a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IMO_TR1\r
-CYREG_IMO_TR1 EQU 0x400046a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IMO_GAIN\r
-CYREG_IMO_GAIN EQU 0x400046a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IMO_C36M\r
-CYREG_IMO_C36M EQU 0x400046a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IMO_TR2\r
-CYREG_IMO_TR2 EQU 0x400046a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_BASE\r
-CYDEV_MFGCFG_XMHZ_BASE EQU 0x400046a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_XMHZ_SIZE\r
-CYDEV_MFGCFG_XMHZ_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_XMHZ_TR\r
-CYREG_XMHZ_TR EQU 0x400046a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MFGCFG_DLY\r
-CYREG_MFGCFG_DLY EQU 0x400046c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_BASE\r
-CYDEV_MFGCFG_MLOGIC_BASE EQU 0x400046e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SIZE\r
-CYDEV_MFGCFG_MLOGIC_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_DMPSTR\r
-CYREG_MLOGIC_DMPSTR EQU 0x400046e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_BASE\r
-CYDEV_MFGCFG_MLOGIC_SEG_BASE EQU 0x400046e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_SEG_SIZE\r
-CYDEV_MFGCFG_MLOGIC_SEG_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_SEG_CR\r
-CYREG_MLOGIC_SEG_CR EQU 0x400046e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_SEG_CFG0\r
-CYREG_MLOGIC_SEG_CFG0 EQU 0x400046e5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_DEBUG\r
-CYREG_MLOGIC_DEBUG EQU 0x400046e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE\r
-CYDEV_MFGCFG_MLOGIC_CPU_SCR_BASE EQU 0x400046ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE\r
-CYDEV_MFGCFG_MLOGIC_CPU_SCR_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_CPU_SCR_CPU_SCR\r
-CYREG_MLOGIC_CPU_SCR_CPU_SCR EQU 0x400046ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_MLOGIC_REV_ID\r
-CYREG_MLOGIC_REV_ID EQU 0x400046ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_BASE\r
-CYDEV_RESET_BASE EQU 0x400046f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_RESET_SIZE\r
-CYDEV_RESET_SIZE EQU 0x0000000f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_IPOR_CR0\r
-CYREG_RESET_IPOR_CR0 EQU 0x400046f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_IPOR_CR1\r
-CYREG_RESET_IPOR_CR1 EQU 0x400046f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_IPOR_CR2\r
-CYREG_RESET_IPOR_CR2 EQU 0x400046f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_IPOR_CR3\r
-CYREG_RESET_IPOR_CR3 EQU 0x400046f3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR0\r
-CYREG_RESET_CR0 EQU 0x400046f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR1\r
-CYREG_RESET_CR1 EQU 0x400046f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR2\r
-CYREG_RESET_CR2 EQU 0x400046f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR3\r
-CYREG_RESET_CR3 EQU 0x400046f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR4\r
-CYREG_RESET_CR4 EQU 0x400046f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_CR5\r
-CYREG_RESET_CR5 EQU 0x400046f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_SR0\r
-CYREG_RESET_SR0 EQU 0x400046fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_SR1\r
-CYREG_RESET_SR1 EQU 0x400046fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_SR2\r
-CYREG_RESET_SR2 EQU 0x400046fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_SR3\r
-CYREG_RESET_SR3 EQU 0x400046fd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_RESET_TR\r
-CYREG_RESET_TR EQU 0x400046fe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_BASE\r
-CYDEV_SPC_BASE EQU 0x40004700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_SIZE\r
-CYDEV_SPC_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_FM_EE_CR\r
-CYREG_SPC_FM_EE_CR EQU 0x40004700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_FM_EE_WAKE_CNT\r
-CYREG_SPC_FM_EE_WAKE_CNT EQU 0x40004701\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_EE_SCR\r
-CYREG_SPC_EE_SCR EQU 0x40004702\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_EE_ERR\r
-CYREG_SPC_EE_ERR EQU 0x40004703\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_CPU_DATA\r
-CYREG_SPC_CPU_DATA EQU 0x40004720\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_DMA_DATA\r
-CYREG_SPC_DMA_DATA EQU 0x40004721\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_SR\r
-CYREG_SPC_SR EQU 0x40004722\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_CR\r
-CYREG_SPC_CR EQU 0x40004723\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_BASE\r
-CYDEV_SPC_DMM_MAP_BASE EQU 0x40004780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SPC_DMM_MAP_SIZE\r
-CYDEV_SPC_DMM_MAP_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_DMM_MAP_SRAM_MBASE\r
-CYREG_SPC_DMM_MAP_SRAM_MBASE EQU 0x40004780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SPC_DMM_MAP_SRAM_MSIZE\r
-CYREG_SPC_DMM_MAP_SRAM_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_BASE\r
-CYDEV_CACHE_BASE EQU 0x40004800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHE_SIZE\r
-CYDEV_CACHE_SIZE EQU 0x0000009c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHE_CC_CTL\r
-CYREG_CACHE_CC_CTL EQU 0x40004800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHE_ECC_CORR\r
-CYREG_CACHE_ECC_CORR EQU 0x40004880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHE_ECC_ERR\r
-CYREG_CACHE_ECC_ERR EQU 0x40004888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHE_FLASH_ERR\r
-CYREG_CACHE_FLASH_ERR EQU 0x40004890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHE_HITMISS\r
-CYREG_CACHE_HITMISS EQU 0x40004898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_BASE\r
-CYDEV_I2C_BASE EQU 0x40004900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_I2C_SIZE\r
-CYDEV_I2C_SIZE EQU 0x000000e1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_XCFG\r
-CYREG_I2C_XCFG EQU 0x400049c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_ADR\r
-CYREG_I2C_ADR EQU 0x400049ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_CFG\r
-CYREG_I2C_CFG EQU 0x400049d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_CSR\r
-CYREG_I2C_CSR EQU 0x400049d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_D\r
-CYREG_I2C_D EQU 0x400049d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_MCSR\r
-CYREG_I2C_MCSR EQU 0x400049d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_CLK_DIV1\r
-CYREG_I2C_CLK_DIV1 EQU 0x400049db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_CLK_DIV2\r
-CYREG_I2C_CLK_DIV2 EQU 0x400049dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_TMOUT_CSR\r
-CYREG_I2C_TMOUT_CSR EQU 0x400049dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_TMOUT_SR\r
-CYREG_I2C_TMOUT_SR EQU 0x400049de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_TMOUT_CFG0\r
-CYREG_I2C_TMOUT_CFG0 EQU 0x400049df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_I2C_TMOUT_CFG1\r
-CYREG_I2C_TMOUT_CFG1 EQU 0x400049e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_BASE\r
-CYDEV_DEC_BASE EQU 0x40004e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DEC_SIZE\r
-CYDEV_DEC_SIZE EQU 0x00000015\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_CR\r
-CYREG_DEC_CR EQU 0x40004e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_SR\r
-CYREG_DEC_SR EQU 0x40004e01\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_SHIFT1\r
-CYREG_DEC_SHIFT1 EQU 0x40004e02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_SHIFT2\r
-CYREG_DEC_SHIFT2 EQU 0x40004e03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_DR2\r
-CYREG_DEC_DR2 EQU 0x40004e04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_DR2H\r
-CYREG_DEC_DR2H EQU 0x40004e05\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_DR1\r
-CYREG_DEC_DR1 EQU 0x40004e06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OCOR\r
-CYREG_DEC_OCOR EQU 0x40004e08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OCORM\r
-CYREG_DEC_OCORM EQU 0x40004e09\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OCORH\r
-CYREG_DEC_OCORH EQU 0x40004e0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_GCOR\r
-CYREG_DEC_GCOR EQU 0x40004e0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_GCORH\r
-CYREG_DEC_GCORH EQU 0x40004e0d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_GVAL\r
-CYREG_DEC_GVAL EQU 0x40004e0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OUTSAMP\r
-CYREG_DEC_OUTSAMP EQU 0x40004e10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OUTSAMPM\r
-CYREG_DEC_OUTSAMPM EQU 0x40004e11\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OUTSAMPH\r
-CYREG_DEC_OUTSAMPH EQU 0x40004e12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_OUTSAMPS\r
-CYREG_DEC_OUTSAMPS EQU 0x40004e13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DEC_COHER\r
-CYREG_DEC_COHER EQU 0x40004e14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_BASE\r
-CYDEV_TMR0_BASE EQU 0x40004f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR0_SIZE\r
-CYDEV_TMR0_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CFG0\r
-CYREG_TMR0_CFG0 EQU 0x40004f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CFG1\r
-CYREG_TMR0_CFG1 EQU 0x40004f01\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CFG2\r
-CYREG_TMR0_CFG2 EQU 0x40004f02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_SR0\r
-CYREG_TMR0_SR0 EQU 0x40004f03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_PER0\r
-CYREG_TMR0_PER0 EQU 0x40004f04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_PER1\r
-CYREG_TMR0_PER1 EQU 0x40004f05\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CNT_CMP0\r
-CYREG_TMR0_CNT_CMP0 EQU 0x40004f06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CNT_CMP1\r
-CYREG_TMR0_CNT_CMP1 EQU 0x40004f07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CAP0\r
-CYREG_TMR0_CAP0 EQU 0x40004f08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_CAP1\r
-CYREG_TMR0_CAP1 EQU 0x40004f09\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_RT0\r
-CYREG_TMR0_RT0 EQU 0x40004f0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR0_RT1\r
-CYREG_TMR0_RT1 EQU 0x40004f0b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_BASE\r
-CYDEV_TMR1_BASE EQU 0x40004f0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR1_SIZE\r
-CYDEV_TMR1_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CFG0\r
-CYREG_TMR1_CFG0 EQU 0x40004f0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CFG1\r
-CYREG_TMR1_CFG1 EQU 0x40004f0d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CFG2\r
-CYREG_TMR1_CFG2 EQU 0x40004f0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_SR0\r
-CYREG_TMR1_SR0 EQU 0x40004f0f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_PER0\r
-CYREG_TMR1_PER0 EQU 0x40004f10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_PER1\r
-CYREG_TMR1_PER1 EQU 0x40004f11\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CNT_CMP0\r
-CYREG_TMR1_CNT_CMP0 EQU 0x40004f12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CNT_CMP1\r
-CYREG_TMR1_CNT_CMP1 EQU 0x40004f13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CAP0\r
-CYREG_TMR1_CAP0 EQU 0x40004f14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_CAP1\r
-CYREG_TMR1_CAP1 EQU 0x40004f15\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_RT0\r
-CYREG_TMR1_RT0 EQU 0x40004f16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR1_RT1\r
-CYREG_TMR1_RT1 EQU 0x40004f17\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_BASE\r
-CYDEV_TMR2_BASE EQU 0x40004f18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR2_SIZE\r
-CYDEV_TMR2_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CFG0\r
-CYREG_TMR2_CFG0 EQU 0x40004f18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CFG1\r
-CYREG_TMR2_CFG1 EQU 0x40004f19\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CFG2\r
-CYREG_TMR2_CFG2 EQU 0x40004f1a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_SR0\r
-CYREG_TMR2_SR0 EQU 0x40004f1b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_PER0\r
-CYREG_TMR2_PER0 EQU 0x40004f1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_PER1\r
-CYREG_TMR2_PER1 EQU 0x40004f1d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CNT_CMP0\r
-CYREG_TMR2_CNT_CMP0 EQU 0x40004f1e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CNT_CMP1\r
-CYREG_TMR2_CNT_CMP1 EQU 0x40004f1f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CAP0\r
-CYREG_TMR2_CAP0 EQU 0x40004f20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_CAP1\r
-CYREG_TMR2_CAP1 EQU 0x40004f21\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_RT0\r
-CYREG_TMR2_RT0 EQU 0x40004f22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR2_RT1\r
-CYREG_TMR2_RT1 EQU 0x40004f23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_BASE\r
-CYDEV_TMR3_BASE EQU 0x40004f24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TMR3_SIZE\r
-CYDEV_TMR3_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CFG0\r
-CYREG_TMR3_CFG0 EQU 0x40004f24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CFG1\r
-CYREG_TMR3_CFG1 EQU 0x40004f25\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CFG2\r
-CYREG_TMR3_CFG2 EQU 0x40004f26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_SR0\r
-CYREG_TMR3_SR0 EQU 0x40004f27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_PER0\r
-CYREG_TMR3_PER0 EQU 0x40004f28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_PER1\r
-CYREG_TMR3_PER1 EQU 0x40004f29\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CNT_CMP0\r
-CYREG_TMR3_CNT_CMP0 EQU 0x40004f2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CNT_CMP1\r
-CYREG_TMR3_CNT_CMP1 EQU 0x40004f2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CAP0\r
-CYREG_TMR3_CAP0 EQU 0x40004f2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_CAP1\r
-CYREG_TMR3_CAP1 EQU 0x40004f2d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_RT0\r
-CYREG_TMR3_RT0 EQU 0x40004f2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TMR3_RT1\r
-CYREG_TMR3_RT1 EQU 0x40004f2f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_BASE\r
-CYDEV_IO_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_SIZE\r
-CYDEV_IO_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_BASE\r
-CYDEV_IO_PC_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_SIZE\r
-CYDEV_IO_PC_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_BASE\r
-CYDEV_IO_PC_PRT0_BASE EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT0_SIZE\r
-CYDEV_IO_PC_PRT0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC0\r
-CYREG_PRT0_PC0 EQU 0x40005000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC1\r
-CYREG_PRT0_PC1 EQU 0x40005001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC2\r
-CYREG_PRT0_PC2 EQU 0x40005002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC3\r
-CYREG_PRT0_PC3 EQU 0x40005003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC4\r
-CYREG_PRT0_PC4 EQU 0x40005004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC5\r
-CYREG_PRT0_PC5 EQU 0x40005005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC6\r
-CYREG_PRT0_PC6 EQU 0x40005006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PC7\r
-CYREG_PRT0_PC7 EQU 0x40005007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_BASE\r
-CYDEV_IO_PC_PRT1_BASE EQU 0x40005008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT1_SIZE\r
-CYDEV_IO_PC_PRT1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC0\r
-CYREG_PRT1_PC0 EQU 0x40005008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC1\r
-CYREG_PRT1_PC1 EQU 0x40005009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC2\r
-CYREG_PRT1_PC2 EQU 0x4000500a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC3\r
-CYREG_PRT1_PC3 EQU 0x4000500b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC4\r
-CYREG_PRT1_PC4 EQU 0x4000500c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC5\r
-CYREG_PRT1_PC5 EQU 0x4000500d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC6\r
-CYREG_PRT1_PC6 EQU 0x4000500e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PC7\r
-CYREG_PRT1_PC7 EQU 0x4000500f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_BASE\r
-CYDEV_IO_PC_PRT2_BASE EQU 0x40005010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT2_SIZE\r
-CYDEV_IO_PC_PRT2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC0\r
-CYREG_PRT2_PC0 EQU 0x40005010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC1\r
-CYREG_PRT2_PC1 EQU 0x40005011\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC2\r
-CYREG_PRT2_PC2 EQU 0x40005012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC3\r
-CYREG_PRT2_PC3 EQU 0x40005013\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC4\r
-CYREG_PRT2_PC4 EQU 0x40005014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC5\r
-CYREG_PRT2_PC5 EQU 0x40005015\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC6\r
-CYREG_PRT2_PC6 EQU 0x40005016\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PC7\r
-CYREG_PRT2_PC7 EQU 0x40005017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_BASE\r
-CYDEV_IO_PC_PRT3_BASE EQU 0x40005018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT3_SIZE\r
-CYDEV_IO_PC_PRT3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC0\r
-CYREG_PRT3_PC0 EQU 0x40005018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC1\r
-CYREG_PRT3_PC1 EQU 0x40005019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC2\r
-CYREG_PRT3_PC2 EQU 0x4000501a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC3\r
-CYREG_PRT3_PC3 EQU 0x4000501b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC4\r
-CYREG_PRT3_PC4 EQU 0x4000501c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC5\r
-CYREG_PRT3_PC5 EQU 0x4000501d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC6\r
-CYREG_PRT3_PC6 EQU 0x4000501e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PC7\r
-CYREG_PRT3_PC7 EQU 0x4000501f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_BASE\r
-CYDEV_IO_PC_PRT4_BASE EQU 0x40005020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT4_SIZE\r
-CYDEV_IO_PC_PRT4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC0\r
-CYREG_PRT4_PC0 EQU 0x40005020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC1\r
-CYREG_PRT4_PC1 EQU 0x40005021\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC2\r
-CYREG_PRT4_PC2 EQU 0x40005022\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC3\r
-CYREG_PRT4_PC3 EQU 0x40005023\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC4\r
-CYREG_PRT4_PC4 EQU 0x40005024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC5\r
-CYREG_PRT4_PC5 EQU 0x40005025\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC6\r
-CYREG_PRT4_PC6 EQU 0x40005026\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PC7\r
-CYREG_PRT4_PC7 EQU 0x40005027\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_BASE\r
-CYDEV_IO_PC_PRT5_BASE EQU 0x40005028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT5_SIZE\r
-CYDEV_IO_PC_PRT5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC0\r
-CYREG_PRT5_PC0 EQU 0x40005028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC1\r
-CYREG_PRT5_PC1 EQU 0x40005029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC2\r
-CYREG_PRT5_PC2 EQU 0x4000502a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC3\r
-CYREG_PRT5_PC3 EQU 0x4000502b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC4\r
-CYREG_PRT5_PC4 EQU 0x4000502c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC5\r
-CYREG_PRT5_PC5 EQU 0x4000502d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC6\r
-CYREG_PRT5_PC6 EQU 0x4000502e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PC7\r
-CYREG_PRT5_PC7 EQU 0x4000502f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_BASE\r
-CYDEV_IO_PC_PRT6_BASE EQU 0x40005030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT6_SIZE\r
-CYDEV_IO_PC_PRT6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC0\r
-CYREG_PRT6_PC0 EQU 0x40005030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC1\r
-CYREG_PRT6_PC1 EQU 0x40005031\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC2\r
-CYREG_PRT6_PC2 EQU 0x40005032\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC3\r
-CYREG_PRT6_PC3 EQU 0x40005033\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC4\r
-CYREG_PRT6_PC4 EQU 0x40005034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC5\r
-CYREG_PRT6_PC5 EQU 0x40005035\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC6\r
-CYREG_PRT6_PC6 EQU 0x40005036\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PC7\r
-CYREG_PRT6_PC7 EQU 0x40005037\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_BASE\r
-CYDEV_IO_PC_PRT12_BASE EQU 0x40005060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT12_SIZE\r
-CYDEV_IO_PC_PRT12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC0\r
-CYREG_PRT12_PC0 EQU 0x40005060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC1\r
-CYREG_PRT12_PC1 EQU 0x40005061\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC2\r
-CYREG_PRT12_PC2 EQU 0x40005062\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC3\r
-CYREG_PRT12_PC3 EQU 0x40005063\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC4\r
-CYREG_PRT12_PC4 EQU 0x40005064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC5\r
-CYREG_PRT12_PC5 EQU 0x40005065\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC6\r
-CYREG_PRT12_PC6 EQU 0x40005066\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PC7\r
-CYREG_PRT12_PC7 EQU 0x40005067\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_BASE\r
-CYDEV_IO_PC_PRT15_BASE EQU 0x40005078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_SIZE\r
-CYDEV_IO_PC_PRT15_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC0\r
-CYREG_IO_PC_PRT15_PC0 EQU 0x40005078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC1\r
-CYREG_IO_PC_PRT15_PC1 EQU 0x40005079\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC2\r
-CYREG_IO_PC_PRT15_PC2 EQU 0x4000507a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC3\r
-CYREG_IO_PC_PRT15_PC3 EQU 0x4000507b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC4\r
-CYREG_IO_PC_PRT15_PC4 EQU 0x4000507c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_PC5\r
-CYREG_IO_PC_PRT15_PC5 EQU 0x4000507d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_BASE\r
-CYDEV_IO_PC_PRT15_7_6_BASE EQU 0x4000507e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PC_PRT15_7_6_SIZE\r
-CYDEV_IO_PC_PRT15_7_6_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_7_6_PC0\r
-CYREG_IO_PC_PRT15_7_6_PC0 EQU 0x4000507e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IO_PC_PRT15_7_6_PC1\r
-CYREG_IO_PC_PRT15_7_6_PC1 EQU 0x4000507f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_BASE\r
-CYDEV_IO_DR_BASE EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_SIZE\r
-CYDEV_IO_DR_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT0_BASE\r
-CYDEV_IO_DR_PRT0_BASE EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT0_SIZE\r
-CYDEV_IO_DR_PRT0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DR_ALIAS\r
-CYREG_PRT0_DR_ALIAS EQU 0x40005080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT1_BASE\r
-CYDEV_IO_DR_PRT1_BASE EQU 0x40005081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT1_SIZE\r
-CYDEV_IO_DR_PRT1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DR_ALIAS\r
-CYREG_PRT1_DR_ALIAS EQU 0x40005081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT2_BASE\r
-CYDEV_IO_DR_PRT2_BASE EQU 0x40005082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT2_SIZE\r
-CYDEV_IO_DR_PRT2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DR_ALIAS\r
-CYREG_PRT2_DR_ALIAS EQU 0x40005082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT3_BASE\r
-CYDEV_IO_DR_PRT3_BASE EQU 0x40005083\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT3_SIZE\r
-CYDEV_IO_DR_PRT3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DR_ALIAS\r
-CYREG_PRT3_DR_ALIAS EQU 0x40005083\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT4_BASE\r
-CYDEV_IO_DR_PRT4_BASE EQU 0x40005084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT4_SIZE\r
-CYDEV_IO_DR_PRT4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DR_ALIAS\r
-CYREG_PRT4_DR_ALIAS EQU 0x40005084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT5_BASE\r
-CYDEV_IO_DR_PRT5_BASE EQU 0x40005085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT5_SIZE\r
-CYDEV_IO_DR_PRT5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DR_ALIAS\r
-CYREG_PRT5_DR_ALIAS EQU 0x40005085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT6_BASE\r
-CYDEV_IO_DR_PRT6_BASE EQU 0x40005086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT6_SIZE\r
-CYDEV_IO_DR_PRT6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DR_ALIAS\r
-CYREG_PRT6_DR_ALIAS EQU 0x40005086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT12_BASE\r
-CYDEV_IO_DR_PRT12_BASE EQU 0x4000508c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT12_SIZE\r
-CYDEV_IO_DR_PRT12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DR_ALIAS\r
-CYREG_PRT12_DR_ALIAS EQU 0x4000508c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT15_BASE\r
-CYDEV_IO_DR_PRT15_BASE EQU 0x4000508f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_DR_PRT15_SIZE\r
-CYDEV_IO_DR_PRT15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DR_15_ALIAS\r
-CYREG_PRT15_DR_15_ALIAS EQU 0x4000508f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_BASE\r
-CYDEV_IO_PS_BASE EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_SIZE\r
-CYDEV_IO_PS_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT0_BASE\r
-CYDEV_IO_PS_PRT0_BASE EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT0_SIZE\r
-CYDEV_IO_PS_PRT0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PS_ALIAS\r
-CYREG_PRT0_PS_ALIAS EQU 0x40005090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT1_BASE\r
-CYDEV_IO_PS_PRT1_BASE EQU 0x40005091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT1_SIZE\r
-CYDEV_IO_PS_PRT1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PS_ALIAS\r
-CYREG_PRT1_PS_ALIAS EQU 0x40005091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT2_BASE\r
-CYDEV_IO_PS_PRT2_BASE EQU 0x40005092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT2_SIZE\r
-CYDEV_IO_PS_PRT2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PS_ALIAS\r
-CYREG_PRT2_PS_ALIAS EQU 0x40005092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT3_BASE\r
-CYDEV_IO_PS_PRT3_BASE EQU 0x40005093\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT3_SIZE\r
-CYDEV_IO_PS_PRT3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PS_ALIAS\r
-CYREG_PRT3_PS_ALIAS EQU 0x40005093\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT4_BASE\r
-CYDEV_IO_PS_PRT4_BASE EQU 0x40005094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT4_SIZE\r
-CYDEV_IO_PS_PRT4_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PS_ALIAS\r
-CYREG_PRT4_PS_ALIAS EQU 0x40005094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT5_BASE\r
-CYDEV_IO_PS_PRT5_BASE EQU 0x40005095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT5_SIZE\r
-CYDEV_IO_PS_PRT5_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PS_ALIAS\r
-CYREG_PRT5_PS_ALIAS EQU 0x40005095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT6_BASE\r
-CYDEV_IO_PS_PRT6_BASE EQU 0x40005096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT6_SIZE\r
-CYDEV_IO_PS_PRT6_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PS_ALIAS\r
-CYREG_PRT6_PS_ALIAS EQU 0x40005096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT12_BASE\r
-CYDEV_IO_PS_PRT12_BASE EQU 0x4000509c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT12_SIZE\r
-CYDEV_IO_PS_PRT12_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PS_ALIAS\r
-CYREG_PRT12_PS_ALIAS EQU 0x4000509c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT15_BASE\r
-CYDEV_IO_PS_PRT15_BASE EQU 0x4000509f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PS_PRT15_SIZE\r
-CYDEV_IO_PS_PRT15_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_PS15_ALIAS\r
-CYREG_PRT15_PS15_ALIAS EQU 0x4000509f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_BASE\r
-CYDEV_IO_PRT_BASE EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_SIZE\r
-CYDEV_IO_PRT_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_BASE\r
-CYDEV_IO_PRT_PRT0_BASE EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT0_SIZE\r
-CYDEV_IO_PRT_PRT0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DR\r
-CYREG_PRT0_DR EQU 0x40005100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PS\r
-CYREG_PRT0_PS EQU 0x40005101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DM0\r
-CYREG_PRT0_DM0 EQU 0x40005102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DM1\r
-CYREG_PRT0_DM1 EQU 0x40005103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DM2\r
-CYREG_PRT0_DM2 EQU 0x40005104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_SLW\r
-CYREG_PRT0_SLW EQU 0x40005105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_BYP\r
-CYREG_PRT0_BYP EQU 0x40005106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_BIE\r
-CYREG_PRT0_BIE EQU 0x40005107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_INP_DIS\r
-CYREG_PRT0_INP_DIS EQU 0x40005108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_CTL\r
-CYREG_PRT0_CTL EQU 0x40005109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_PRT\r
-CYREG_PRT0_PRT EQU 0x4000510a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_BIT_MASK\r
-CYREG_PRT0_BIT_MASK EQU 0x4000510b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_AMUX\r
-CYREG_PRT0_AMUX EQU 0x4000510c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_AG\r
-CYREG_PRT0_AG EQU 0x4000510d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_LCD_COM_SEG\r
-CYREG_PRT0_LCD_COM_SEG EQU 0x4000510e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_LCD_EN\r
-CYREG_PRT0_LCD_EN EQU 0x4000510f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_BASE\r
-CYDEV_IO_PRT_PRT1_BASE EQU 0x40005110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT1_SIZE\r
-CYDEV_IO_PRT_PRT1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DR\r
-CYREG_PRT1_DR EQU 0x40005110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PS\r
-CYREG_PRT1_PS EQU 0x40005111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DM0\r
-CYREG_PRT1_DM0 EQU 0x40005112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DM1\r
-CYREG_PRT1_DM1 EQU 0x40005113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DM2\r
-CYREG_PRT1_DM2 EQU 0x40005114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_SLW\r
-CYREG_PRT1_SLW EQU 0x40005115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_BYP\r
-CYREG_PRT1_BYP EQU 0x40005116\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_BIE\r
-CYREG_PRT1_BIE EQU 0x40005117\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_INP_DIS\r
-CYREG_PRT1_INP_DIS EQU 0x40005118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_CTL\r
-CYREG_PRT1_CTL EQU 0x40005119\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_PRT\r
-CYREG_PRT1_PRT EQU 0x4000511a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_BIT_MASK\r
-CYREG_PRT1_BIT_MASK EQU 0x4000511b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_AMUX\r
-CYREG_PRT1_AMUX EQU 0x4000511c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_AG\r
-CYREG_PRT1_AG EQU 0x4000511d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_LCD_COM_SEG\r
-CYREG_PRT1_LCD_COM_SEG EQU 0x4000511e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_LCD_EN\r
-CYREG_PRT1_LCD_EN EQU 0x4000511f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_BASE\r
-CYDEV_IO_PRT_PRT2_BASE EQU 0x40005120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT2_SIZE\r
-CYDEV_IO_PRT_PRT2_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DR\r
-CYREG_PRT2_DR EQU 0x40005120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PS\r
-CYREG_PRT2_PS EQU 0x40005121\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DM0\r
-CYREG_PRT2_DM0 EQU 0x40005122\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DM1\r
-CYREG_PRT2_DM1 EQU 0x40005123\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DM2\r
-CYREG_PRT2_DM2 EQU 0x40005124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_SLW\r
-CYREG_PRT2_SLW EQU 0x40005125\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_BYP\r
-CYREG_PRT2_BYP EQU 0x40005126\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_BIE\r
-CYREG_PRT2_BIE EQU 0x40005127\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_INP_DIS\r
-CYREG_PRT2_INP_DIS EQU 0x40005128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_CTL\r
-CYREG_PRT2_CTL EQU 0x40005129\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_PRT\r
-CYREG_PRT2_PRT EQU 0x4000512a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_BIT_MASK\r
-CYREG_PRT2_BIT_MASK EQU 0x4000512b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_AMUX\r
-CYREG_PRT2_AMUX EQU 0x4000512c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_AG\r
-CYREG_PRT2_AG EQU 0x4000512d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_LCD_COM_SEG\r
-CYREG_PRT2_LCD_COM_SEG EQU 0x4000512e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_LCD_EN\r
-CYREG_PRT2_LCD_EN EQU 0x4000512f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_BASE\r
-CYDEV_IO_PRT_PRT3_BASE EQU 0x40005130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT3_SIZE\r
-CYDEV_IO_PRT_PRT3_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DR\r
-CYREG_PRT3_DR EQU 0x40005130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PS\r
-CYREG_PRT3_PS EQU 0x40005131\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DM0\r
-CYREG_PRT3_DM0 EQU 0x40005132\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DM1\r
-CYREG_PRT3_DM1 EQU 0x40005133\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DM2\r
-CYREG_PRT3_DM2 EQU 0x40005134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_SLW\r
-CYREG_PRT3_SLW EQU 0x40005135\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_BYP\r
-CYREG_PRT3_BYP EQU 0x40005136\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_BIE\r
-CYREG_PRT3_BIE EQU 0x40005137\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_INP_DIS\r
-CYREG_PRT3_INP_DIS EQU 0x40005138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_CTL\r
-CYREG_PRT3_CTL EQU 0x40005139\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_PRT\r
-CYREG_PRT3_PRT EQU 0x4000513a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_BIT_MASK\r
-CYREG_PRT3_BIT_MASK EQU 0x4000513b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_AMUX\r
-CYREG_PRT3_AMUX EQU 0x4000513c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_AG\r
-CYREG_PRT3_AG EQU 0x4000513d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_LCD_COM_SEG\r
-CYREG_PRT3_LCD_COM_SEG EQU 0x4000513e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_LCD_EN\r
-CYREG_PRT3_LCD_EN EQU 0x4000513f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_BASE\r
-CYDEV_IO_PRT_PRT4_BASE EQU 0x40005140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT4_SIZE\r
-CYDEV_IO_PRT_PRT4_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DR\r
-CYREG_PRT4_DR EQU 0x40005140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PS\r
-CYREG_PRT4_PS EQU 0x40005141\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DM0\r
-CYREG_PRT4_DM0 EQU 0x40005142\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DM1\r
-CYREG_PRT4_DM1 EQU 0x40005143\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DM2\r
-CYREG_PRT4_DM2 EQU 0x40005144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_SLW\r
-CYREG_PRT4_SLW EQU 0x40005145\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_BYP\r
-CYREG_PRT4_BYP EQU 0x40005146\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_BIE\r
-CYREG_PRT4_BIE EQU 0x40005147\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_INP_DIS\r
-CYREG_PRT4_INP_DIS EQU 0x40005148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_CTL\r
-CYREG_PRT4_CTL EQU 0x40005149\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_PRT\r
-CYREG_PRT4_PRT EQU 0x4000514a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_BIT_MASK\r
-CYREG_PRT4_BIT_MASK EQU 0x4000514b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_AMUX\r
-CYREG_PRT4_AMUX EQU 0x4000514c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_AG\r
-CYREG_PRT4_AG EQU 0x4000514d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_LCD_COM_SEG\r
-CYREG_PRT4_LCD_COM_SEG EQU 0x4000514e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_LCD_EN\r
-CYREG_PRT4_LCD_EN EQU 0x4000514f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_BASE\r
-CYDEV_IO_PRT_PRT5_BASE EQU 0x40005150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT5_SIZE\r
-CYDEV_IO_PRT_PRT5_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DR\r
-CYREG_PRT5_DR EQU 0x40005150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PS\r
-CYREG_PRT5_PS EQU 0x40005151\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DM0\r
-CYREG_PRT5_DM0 EQU 0x40005152\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DM1\r
-CYREG_PRT5_DM1 EQU 0x40005153\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DM2\r
-CYREG_PRT5_DM2 EQU 0x40005154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_SLW\r
-CYREG_PRT5_SLW EQU 0x40005155\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_BYP\r
-CYREG_PRT5_BYP EQU 0x40005156\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_BIE\r
-CYREG_PRT5_BIE EQU 0x40005157\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_INP_DIS\r
-CYREG_PRT5_INP_DIS EQU 0x40005158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_CTL\r
-CYREG_PRT5_CTL EQU 0x40005159\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_PRT\r
-CYREG_PRT5_PRT EQU 0x4000515a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_BIT_MASK\r
-CYREG_PRT5_BIT_MASK EQU 0x4000515b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_AMUX\r
-CYREG_PRT5_AMUX EQU 0x4000515c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_AG\r
-CYREG_PRT5_AG EQU 0x4000515d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_LCD_COM_SEG\r
-CYREG_PRT5_LCD_COM_SEG EQU 0x4000515e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_LCD_EN\r
-CYREG_PRT5_LCD_EN EQU 0x4000515f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_BASE\r
-CYDEV_IO_PRT_PRT6_BASE EQU 0x40005160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT6_SIZE\r
-CYDEV_IO_PRT_PRT6_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DR\r
-CYREG_PRT6_DR EQU 0x40005160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PS\r
-CYREG_PRT6_PS EQU 0x40005161\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DM0\r
-CYREG_PRT6_DM0 EQU 0x40005162\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DM1\r
-CYREG_PRT6_DM1 EQU 0x40005163\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DM2\r
-CYREG_PRT6_DM2 EQU 0x40005164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_SLW\r
-CYREG_PRT6_SLW EQU 0x40005165\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_BYP\r
-CYREG_PRT6_BYP EQU 0x40005166\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_BIE\r
-CYREG_PRT6_BIE EQU 0x40005167\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_INP_DIS\r
-CYREG_PRT6_INP_DIS EQU 0x40005168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_CTL\r
-CYREG_PRT6_CTL EQU 0x40005169\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_PRT\r
-CYREG_PRT6_PRT EQU 0x4000516a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_BIT_MASK\r
-CYREG_PRT6_BIT_MASK EQU 0x4000516b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_AMUX\r
-CYREG_PRT6_AMUX EQU 0x4000516c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_AG\r
-CYREG_PRT6_AG EQU 0x4000516d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_LCD_COM_SEG\r
-CYREG_PRT6_LCD_COM_SEG EQU 0x4000516e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_LCD_EN\r
-CYREG_PRT6_LCD_EN EQU 0x4000516f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_BASE\r
-CYDEV_IO_PRT_PRT12_BASE EQU 0x400051c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT12_SIZE\r
-CYDEV_IO_PRT_PRT12_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DR\r
-CYREG_PRT12_DR EQU 0x400051c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PS\r
-CYREG_PRT12_PS EQU 0x400051c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DM0\r
-CYREG_PRT12_DM0 EQU 0x400051c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DM1\r
-CYREG_PRT12_DM1 EQU 0x400051c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DM2\r
-CYREG_PRT12_DM2 EQU 0x400051c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SLW\r
-CYREG_PRT12_SLW EQU 0x400051c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_BYP\r
-CYREG_PRT12_BYP EQU 0x400051c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_BIE\r
-CYREG_PRT12_BIE EQU 0x400051c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_INP_DIS\r
-CYREG_PRT12_INP_DIS EQU 0x400051c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SIO_HYST_EN\r
-CYREG_PRT12_SIO_HYST_EN EQU 0x400051c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_PRT\r
-CYREG_PRT12_PRT EQU 0x400051ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_BIT_MASK\r
-CYREG_PRT12_BIT_MASK EQU 0x400051cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SIO_REG_HIFREQ\r
-CYREG_PRT12_SIO_REG_HIFREQ EQU 0x400051cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_AG\r
-CYREG_PRT12_AG EQU 0x400051cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SIO_CFG\r
-CYREG_PRT12_SIO_CFG EQU 0x400051ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SIO_DIFF\r
-CYREG_PRT12_SIO_DIFF EQU 0x400051cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_BASE\r
-CYDEV_IO_PRT_PRT15_BASE EQU 0x400051f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IO_PRT_PRT15_SIZE\r
-CYDEV_IO_PRT_PRT15_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DR\r
-CYREG_PRT15_DR EQU 0x400051f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_PS\r
-CYREG_PRT15_PS EQU 0x400051f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DM0\r
-CYREG_PRT15_DM0 EQU 0x400051f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DM1\r
-CYREG_PRT15_DM1 EQU 0x400051f3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DM2\r
-CYREG_PRT15_DM2 EQU 0x400051f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_SLW\r
-CYREG_PRT15_SLW EQU 0x400051f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_BYP\r
-CYREG_PRT15_BYP EQU 0x400051f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_BIE\r
-CYREG_PRT15_BIE EQU 0x400051f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_INP_DIS\r
-CYREG_PRT15_INP_DIS EQU 0x400051f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_CTL\r
-CYREG_PRT15_CTL EQU 0x400051f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_PRT\r
-CYREG_PRT15_PRT EQU 0x400051fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_BIT_MASK\r
-CYREG_PRT15_BIT_MASK EQU 0x400051fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_AMUX\r
-CYREG_PRT15_AMUX EQU 0x400051fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_AG\r
-CYREG_PRT15_AG EQU 0x400051fd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_LCD_COM_SEG\r
-CYREG_PRT15_LCD_COM_SEG EQU 0x400051fe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_LCD_EN\r
-CYREG_PRT15_LCD_EN EQU 0x400051ff\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_BASE\r
-CYDEV_PRTDSI_BASE EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_SIZE\r
-CYDEV_PRTDSI_SIZE EQU 0x0000007f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_BASE\r
-CYDEV_PRTDSI_PRT0_BASE EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT0_SIZE\r
-CYDEV_PRTDSI_PRT0_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_OUT_SEL0\r
-CYREG_PRT0_OUT_SEL0 EQU 0x40005200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_OUT_SEL1\r
-CYREG_PRT0_OUT_SEL1 EQU 0x40005201\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_OE_SEL0\r
-CYREG_PRT0_OE_SEL0 EQU 0x40005202\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_OE_SEL1\r
-CYREG_PRT0_OE_SEL1 EQU 0x40005203\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_DBL_SYNC_IN\r
-CYREG_PRT0_DBL_SYNC_IN EQU 0x40005204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_SYNC_OUT\r
-CYREG_PRT0_SYNC_OUT EQU 0x40005205\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT0_CAPS_SEL\r
-CYREG_PRT0_CAPS_SEL EQU 0x40005206\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_BASE\r
-CYDEV_PRTDSI_PRT1_BASE EQU 0x40005208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT1_SIZE\r
-CYDEV_PRTDSI_PRT1_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_OUT_SEL0\r
-CYREG_PRT1_OUT_SEL0 EQU 0x40005208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_OUT_SEL1\r
-CYREG_PRT1_OUT_SEL1 EQU 0x40005209\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_OE_SEL0\r
-CYREG_PRT1_OE_SEL0 EQU 0x4000520a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_OE_SEL1\r
-CYREG_PRT1_OE_SEL1 EQU 0x4000520b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_DBL_SYNC_IN\r
-CYREG_PRT1_DBL_SYNC_IN EQU 0x4000520c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_SYNC_OUT\r
-CYREG_PRT1_SYNC_OUT EQU 0x4000520d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT1_CAPS_SEL\r
-CYREG_PRT1_CAPS_SEL EQU 0x4000520e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_BASE\r
-CYDEV_PRTDSI_PRT2_BASE EQU 0x40005210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT2_SIZE\r
-CYDEV_PRTDSI_PRT2_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_OUT_SEL0\r
-CYREG_PRT2_OUT_SEL0 EQU 0x40005210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_OUT_SEL1\r
-CYREG_PRT2_OUT_SEL1 EQU 0x40005211\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_OE_SEL0\r
-CYREG_PRT2_OE_SEL0 EQU 0x40005212\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_OE_SEL1\r
-CYREG_PRT2_OE_SEL1 EQU 0x40005213\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_DBL_SYNC_IN\r
-CYREG_PRT2_DBL_SYNC_IN EQU 0x40005214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_SYNC_OUT\r
-CYREG_PRT2_SYNC_OUT EQU 0x40005215\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT2_CAPS_SEL\r
-CYREG_PRT2_CAPS_SEL EQU 0x40005216\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_BASE\r
-CYDEV_PRTDSI_PRT3_BASE EQU 0x40005218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT3_SIZE\r
-CYDEV_PRTDSI_PRT3_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_OUT_SEL0\r
-CYREG_PRT3_OUT_SEL0 EQU 0x40005218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_OUT_SEL1\r
-CYREG_PRT3_OUT_SEL1 EQU 0x40005219\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_OE_SEL0\r
-CYREG_PRT3_OE_SEL0 EQU 0x4000521a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_OE_SEL1\r
-CYREG_PRT3_OE_SEL1 EQU 0x4000521b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_DBL_SYNC_IN\r
-CYREG_PRT3_DBL_SYNC_IN EQU 0x4000521c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_SYNC_OUT\r
-CYREG_PRT3_SYNC_OUT EQU 0x4000521d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT3_CAPS_SEL\r
-CYREG_PRT3_CAPS_SEL EQU 0x4000521e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_BASE\r
-CYDEV_PRTDSI_PRT4_BASE EQU 0x40005220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT4_SIZE\r
-CYDEV_PRTDSI_PRT4_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_OUT_SEL0\r
-CYREG_PRT4_OUT_SEL0 EQU 0x40005220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_OUT_SEL1\r
-CYREG_PRT4_OUT_SEL1 EQU 0x40005221\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_OE_SEL0\r
-CYREG_PRT4_OE_SEL0 EQU 0x40005222\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_OE_SEL1\r
-CYREG_PRT4_OE_SEL1 EQU 0x40005223\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_DBL_SYNC_IN\r
-CYREG_PRT4_DBL_SYNC_IN EQU 0x40005224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_SYNC_OUT\r
-CYREG_PRT4_SYNC_OUT EQU 0x40005225\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT4_CAPS_SEL\r
-CYREG_PRT4_CAPS_SEL EQU 0x40005226\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_BASE\r
-CYDEV_PRTDSI_PRT5_BASE EQU 0x40005228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT5_SIZE\r
-CYDEV_PRTDSI_PRT5_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_OUT_SEL0\r
-CYREG_PRT5_OUT_SEL0 EQU 0x40005228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_OUT_SEL1\r
-CYREG_PRT5_OUT_SEL1 EQU 0x40005229\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_OE_SEL0\r
-CYREG_PRT5_OE_SEL0 EQU 0x4000522a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_OE_SEL1\r
-CYREG_PRT5_OE_SEL1 EQU 0x4000522b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_DBL_SYNC_IN\r
-CYREG_PRT5_DBL_SYNC_IN EQU 0x4000522c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_SYNC_OUT\r
-CYREG_PRT5_SYNC_OUT EQU 0x4000522d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT5_CAPS_SEL\r
-CYREG_PRT5_CAPS_SEL EQU 0x4000522e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_BASE\r
-CYDEV_PRTDSI_PRT6_BASE EQU 0x40005230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT6_SIZE\r
-CYDEV_PRTDSI_PRT6_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_OUT_SEL0\r
-CYREG_PRT6_OUT_SEL0 EQU 0x40005230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_OUT_SEL1\r
-CYREG_PRT6_OUT_SEL1 EQU 0x40005231\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_OE_SEL0\r
-CYREG_PRT6_OE_SEL0 EQU 0x40005232\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_OE_SEL1\r
-CYREG_PRT6_OE_SEL1 EQU 0x40005233\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_DBL_SYNC_IN\r
-CYREG_PRT6_DBL_SYNC_IN EQU 0x40005234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_SYNC_OUT\r
-CYREG_PRT6_SYNC_OUT EQU 0x40005235\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT6_CAPS_SEL\r
-CYREG_PRT6_CAPS_SEL EQU 0x40005236\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_BASE\r
-CYDEV_PRTDSI_PRT12_BASE EQU 0x40005260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT12_SIZE\r
-CYDEV_PRTDSI_PRT12_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_OUT_SEL0\r
-CYREG_PRT12_OUT_SEL0 EQU 0x40005260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_OUT_SEL1\r
-CYREG_PRT12_OUT_SEL1 EQU 0x40005261\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_OE_SEL0\r
-CYREG_PRT12_OE_SEL0 EQU 0x40005262\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_OE_SEL1\r
-CYREG_PRT12_OE_SEL1 EQU 0x40005263\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_DBL_SYNC_IN\r
-CYREG_PRT12_DBL_SYNC_IN EQU 0x40005264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT12_SYNC_OUT\r
-CYREG_PRT12_SYNC_OUT EQU 0x40005265\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_BASE\r
-CYDEV_PRTDSI_PRT15_BASE EQU 0x40005278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PRTDSI_PRT15_SIZE\r
-CYDEV_PRTDSI_PRT15_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_OUT_SEL0\r
-CYREG_PRT15_OUT_SEL0 EQU 0x40005278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_OUT_SEL1\r
-CYREG_PRT15_OUT_SEL1 EQU 0x40005279\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_OE_SEL0\r
-CYREG_PRT15_OE_SEL0 EQU 0x4000527a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_OE_SEL1\r
-CYREG_PRT15_OE_SEL1 EQU 0x4000527b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_DBL_SYNC_IN\r
-CYREG_PRT15_DBL_SYNC_IN EQU 0x4000527c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_SYNC_OUT\r
-CYREG_PRT15_SYNC_OUT EQU 0x4000527d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PRT15_CAPS_SEL\r
-CYREG_PRT15_CAPS_SEL EQU 0x4000527e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_BASE\r
-CYDEV_EMIF_BASE EQU 0x40005400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EMIF_SIZE\r
-CYDEV_EMIF_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_NO_UDB\r
-CYREG_EMIF_NO_UDB EQU 0x40005400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_RP_WAIT_STATES\r
-CYREG_EMIF_RP_WAIT_STATES EQU 0x40005401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_MEM_DWN\r
-CYREG_EMIF_MEM_DWN EQU 0x40005402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_MEMCLK_DIV\r
-CYREG_EMIF_MEMCLK_DIV EQU 0x40005403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_CLOCK_EN\r
-CYREG_EMIF_CLOCK_EN EQU 0x40005404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_EM_TYPE\r
-CYREG_EMIF_EM_TYPE EQU 0x40005405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EMIF_WP_WAIT_STATES\r
-CYREG_EMIF_WP_WAIT_STATES EQU 0x40005406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_BASE\r
-CYDEV_ANAIF_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_SIZE\r
-CYDEV_ANAIF_SIZE EQU 0x000003a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BASE\r
-CYDEV_ANAIF_CFG_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SIZE\r
-CYDEV_ANAIF_CFG_SIZE EQU 0x0000010f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_BASE\r
-CYDEV_ANAIF_CFG_SC0_BASE EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC0_SIZE\r
-CYDEV_ANAIF_CFG_SC0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_CR0\r
-CYREG_SC0_CR0 EQU 0x40005800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_CR1\r
-CYREG_SC0_CR1 EQU 0x40005801\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_CR2\r
-CYREG_SC0_CR2 EQU 0x40005802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_BASE\r
-CYDEV_ANAIF_CFG_SC1_BASE EQU 0x40005804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC1_SIZE\r
-CYDEV_ANAIF_CFG_SC1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_CR0\r
-CYREG_SC1_CR0 EQU 0x40005804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_CR1\r
-CYREG_SC1_CR1 EQU 0x40005805\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_CR2\r
-CYREG_SC1_CR2 EQU 0x40005806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_BASE\r
-CYDEV_ANAIF_CFG_SC2_BASE EQU 0x40005808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC2_SIZE\r
-CYDEV_ANAIF_CFG_SC2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_CR0\r
-CYREG_SC2_CR0 EQU 0x40005808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_CR1\r
-CYREG_SC2_CR1 EQU 0x40005809\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_CR2\r
-CYREG_SC2_CR2 EQU 0x4000580a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_BASE\r
-CYDEV_ANAIF_CFG_SC3_BASE EQU 0x4000580c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SC3_SIZE\r
-CYDEV_ANAIF_CFG_SC3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_CR0\r
-CYREG_SC3_CR0 EQU 0x4000580c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_CR1\r
-CYREG_SC3_CR1 EQU 0x4000580d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_CR2\r
-CYREG_SC3_CR2 EQU 0x4000580e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_BASE\r
-CYDEV_ANAIF_CFG_DAC0_BASE EQU 0x40005820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC0_SIZE\r
-CYDEV_ANAIF_CFG_DAC0_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_CR0\r
-CYREG_DAC0_CR0 EQU 0x40005820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_CR1\r
-CYREG_DAC0_CR1 EQU 0x40005821\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_TST\r
-CYREG_DAC0_TST EQU 0x40005822\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_BASE\r
-CYDEV_ANAIF_CFG_DAC1_BASE EQU 0x40005824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC1_SIZE\r
-CYDEV_ANAIF_CFG_DAC1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_CR0\r
-CYREG_DAC1_CR0 EQU 0x40005824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_CR1\r
-CYREG_DAC1_CR1 EQU 0x40005825\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_TST\r
-CYREG_DAC1_TST EQU 0x40005826\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_BASE\r
-CYDEV_ANAIF_CFG_DAC2_BASE EQU 0x40005828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC2_SIZE\r
-CYDEV_ANAIF_CFG_DAC2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_CR0\r
-CYREG_DAC2_CR0 EQU 0x40005828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_CR1\r
-CYREG_DAC2_CR1 EQU 0x40005829\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_TST\r
-CYREG_DAC2_TST EQU 0x4000582a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_BASE\r
-CYDEV_ANAIF_CFG_DAC3_BASE EQU 0x4000582c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DAC3_SIZE\r
-CYDEV_ANAIF_CFG_DAC3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_CR0\r
-CYREG_DAC3_CR0 EQU 0x4000582c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_CR1\r
-CYREG_DAC3_CR1 EQU 0x4000582d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_TST\r
-CYREG_DAC3_TST EQU 0x4000582e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_BASE\r
-CYDEV_ANAIF_CFG_CMP0_BASE EQU 0x40005840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP0_SIZE\r
-CYDEV_ANAIF_CFG_CMP0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_CR\r
-CYREG_CMP0_CR EQU 0x40005840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_BASE\r
-CYDEV_ANAIF_CFG_CMP1_BASE EQU 0x40005841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP1_SIZE\r
-CYDEV_ANAIF_CFG_CMP1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_CR\r
-CYREG_CMP1_CR EQU 0x40005841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_BASE\r
-CYDEV_ANAIF_CFG_CMP2_BASE EQU 0x40005842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP2_SIZE\r
-CYDEV_ANAIF_CFG_CMP2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_CR\r
-CYREG_CMP2_CR EQU 0x40005842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_BASE\r
-CYDEV_ANAIF_CFG_CMP3_BASE EQU 0x40005843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CMP3_SIZE\r
-CYDEV_ANAIF_CFG_CMP3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_CR\r
-CYREG_CMP3_CR EQU 0x40005843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_BASE\r
-CYDEV_ANAIF_CFG_LUT0_BASE EQU 0x40005848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT0_SIZE\r
-CYDEV_ANAIF_CFG_LUT0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT0_CR\r
-CYREG_LUT0_CR EQU 0x40005848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT0_MX\r
-CYREG_LUT0_MX EQU 0x40005849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_BASE\r
-CYDEV_ANAIF_CFG_LUT1_BASE EQU 0x4000584a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT1_SIZE\r
-CYDEV_ANAIF_CFG_LUT1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT1_CR\r
-CYREG_LUT1_CR EQU 0x4000584a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT1_MX\r
-CYREG_LUT1_MX EQU 0x4000584b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_BASE\r
-CYDEV_ANAIF_CFG_LUT2_BASE EQU 0x4000584c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT2_SIZE\r
-CYDEV_ANAIF_CFG_LUT2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT2_CR\r
-CYREG_LUT2_CR EQU 0x4000584c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT2_MX\r
-CYREG_LUT2_MX EQU 0x4000584d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_BASE\r
-CYDEV_ANAIF_CFG_LUT3_BASE EQU 0x4000584e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LUT3_SIZE\r
-CYDEV_ANAIF_CFG_LUT3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT3_CR\r
-CYREG_LUT3_CR EQU 0x4000584e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT3_MX\r
-CYREG_LUT3_MX EQU 0x4000584f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_BASE\r
-CYDEV_ANAIF_CFG_OPAMP0_BASE EQU 0x40005858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP0_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_CR\r
-CYREG_OPAMP0_CR EQU 0x40005858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_RSVD\r
-CYREG_OPAMP0_RSVD EQU 0x40005859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_BASE\r
-CYDEV_ANAIF_CFG_OPAMP1_BASE EQU 0x4000585a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP1_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_CR\r
-CYREG_OPAMP1_CR EQU 0x4000585a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_RSVD\r
-CYREG_OPAMP1_RSVD EQU 0x4000585b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_BASE\r
-CYDEV_ANAIF_CFG_OPAMP2_BASE EQU 0x4000585c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP2_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_CR\r
-CYREG_OPAMP2_CR EQU 0x4000585c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_RSVD\r
-CYREG_OPAMP2_RSVD EQU 0x4000585d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_BASE\r
-CYDEV_ANAIF_CFG_OPAMP3_BASE EQU 0x4000585e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_OPAMP3_SIZE\r
-CYDEV_ANAIF_CFG_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_CR\r
-CYREG_OPAMP3_CR EQU 0x4000585e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_RSVD\r
-CYREG_OPAMP3_RSVD EQU 0x4000585f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_BASE\r
-CYDEV_ANAIF_CFG_LCDDAC_BASE EQU 0x40005868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDAC_SIZE\r
-CYDEV_ANAIF_CFG_LCDDAC_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_CR0\r
-CYREG_LCDDAC_CR0 EQU 0x40005868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_CR1\r
-CYREG_LCDDAC_CR1 EQU 0x40005869\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_BASE\r
-CYDEV_ANAIF_CFG_LCDDRV_BASE EQU 0x4000586a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDDRV_SIZE\r
-CYDEV_ANAIF_CFG_LCDDRV_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDRV_CR\r
-CYREG_LCDDRV_CR EQU 0x4000586a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_BASE\r
-CYDEV_ANAIF_CFG_LCDTMR_BASE EQU 0x4000586b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LCDTMR_SIZE\r
-CYDEV_ANAIF_CFG_LCDTMR_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDTMR_CFG\r
-CYREG_LCDTMR_CFG EQU 0x4000586b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_BASE\r
-CYDEV_ANAIF_CFG_BG_BASE EQU 0x4000586c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_BG_SIZE\r
-CYDEV_ANAIF_CFG_BG_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BG_CR0\r
-CYREG_BG_CR0 EQU 0x4000586c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BG_RSVD\r
-CYREG_BG_RSVD EQU 0x4000586d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BG_DFT0\r
-CYREG_BG_DFT0 EQU 0x4000586e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BG_DFT1\r
-CYREG_BG_DFT1 EQU 0x4000586f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_BASE\r
-CYDEV_ANAIF_CFG_CAPSL_BASE EQU 0x40005870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSL_SIZE\r
-CYDEV_ANAIF_CFG_CAPSL_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAPSL_CFG0\r
-CYREG_CAPSL_CFG0 EQU 0x40005870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAPSL_CFG1\r
-CYREG_CAPSL_CFG1 EQU 0x40005871\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_BASE\r
-CYDEV_ANAIF_CFG_CAPSR_BASE EQU 0x40005872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_CAPSR_SIZE\r
-CYDEV_ANAIF_CFG_CAPSR_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAPSR_CFG0\r
-CYREG_CAPSR_CFG0 EQU 0x40005872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAPSR_CFG1\r
-CYREG_CAPSR_CFG1 EQU 0x40005873\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_BASE\r
-CYDEV_ANAIF_CFG_PUMP_BASE EQU 0x40005876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_PUMP_SIZE\r
-CYDEV_ANAIF_CFG_PUMP_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PUMP_CR0\r
-CYREG_PUMP_CR0 EQU 0x40005876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PUMP_CR1\r
-CYREG_PUMP_CR1 EQU 0x40005877\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_BASE\r
-CYDEV_ANAIF_CFG_LPF0_BASE EQU 0x40005878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF0_SIZE\r
-CYDEV_ANAIF_CFG_LPF0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LPF0_CR0\r
-CYREG_LPF0_CR0 EQU 0x40005878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LPF0_RSVD\r
-CYREG_LPF0_RSVD EQU 0x40005879\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_BASE\r
-CYDEV_ANAIF_CFG_LPF1_BASE EQU 0x4000587a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_LPF1_SIZE\r
-CYDEV_ANAIF_CFG_LPF1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LPF1_CR0\r
-CYREG_LPF1_CR0 EQU 0x4000587a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LPF1_RSVD\r
-CYREG_LPF1_RSVD EQU 0x4000587b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_BASE\r
-CYDEV_ANAIF_CFG_MISC_BASE EQU 0x4000587c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_MISC_SIZE\r
-CYDEV_ANAIF_CFG_MISC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ANAIF_CFG_MISC_CR0\r
-CYREG_ANAIF_CFG_MISC_CR0 EQU 0x4000587c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_BASE\r
-CYDEV_ANAIF_CFG_DSM0_BASE EQU 0x40005880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_DSM0_SIZE\r
-CYDEV_ANAIF_CFG_DSM0_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR0\r
-CYREG_DSM0_CR0 EQU 0x40005880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR1\r
-CYREG_DSM0_CR1 EQU 0x40005881\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR2\r
-CYREG_DSM0_CR2 EQU 0x40005882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR3\r
-CYREG_DSM0_CR3 EQU 0x40005883\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR4\r
-CYREG_DSM0_CR4 EQU 0x40005884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR5\r
-CYREG_DSM0_CR5 EQU 0x40005885\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR6\r
-CYREG_DSM0_CR6 EQU 0x40005886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR7\r
-CYREG_DSM0_CR7 EQU 0x40005887\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR8\r
-CYREG_DSM0_CR8 EQU 0x40005888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR9\r
-CYREG_DSM0_CR9 EQU 0x40005889\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR10\r
-CYREG_DSM0_CR10 EQU 0x4000588a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR11\r
-CYREG_DSM0_CR11 EQU 0x4000588b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR12\r
-CYREG_DSM0_CR12 EQU 0x4000588c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR13\r
-CYREG_DSM0_CR13 EQU 0x4000588d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR14\r
-CYREG_DSM0_CR14 EQU 0x4000588e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR15\r
-CYREG_DSM0_CR15 EQU 0x4000588f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR16\r
-CYREG_DSM0_CR16 EQU 0x40005890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CR17\r
-CYREG_DSM0_CR17 EQU 0x40005891\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_REF0\r
-CYREG_DSM0_REF0 EQU 0x40005892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_REF1\r
-CYREG_DSM0_REF1 EQU 0x40005893\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_REF2\r
-CYREG_DSM0_REF2 EQU 0x40005894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_REF3\r
-CYREG_DSM0_REF3 EQU 0x40005895\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_DEM0\r
-CYREG_DSM0_DEM0 EQU 0x40005896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_DEM1\r
-CYREG_DSM0_DEM1 EQU 0x40005897\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_TST0\r
-CYREG_DSM0_TST0 EQU 0x40005898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_TST1\r
-CYREG_DSM0_TST1 EQU 0x40005899\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_BUF0\r
-CYREG_DSM0_BUF0 EQU 0x4000589a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_BUF1\r
-CYREG_DSM0_BUF1 EQU 0x4000589b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_BUF2\r
-CYREG_DSM0_BUF2 EQU 0x4000589c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_BUF3\r
-CYREG_DSM0_BUF3 EQU 0x4000589d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_MISC\r
-CYREG_DSM0_MISC EQU 0x4000589e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_RSVD1\r
-CYREG_DSM0_RSVD1 EQU 0x4000589f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_BASE\r
-CYDEV_ANAIF_CFG_SAR0_BASE EQU 0x40005900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR0_SIZE\r
-CYDEV_ANAIF_CFG_SAR0_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR0\r
-CYREG_SAR0_CSR0 EQU 0x40005900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR1\r
-CYREG_SAR0_CSR1 EQU 0x40005901\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR2\r
-CYREG_SAR0_CSR2 EQU 0x40005902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR3\r
-CYREG_SAR0_CSR3 EQU 0x40005903\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR4\r
-CYREG_SAR0_CSR4 EQU 0x40005904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR5\r
-CYREG_SAR0_CSR5 EQU 0x40005905\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CSR6\r
-CYREG_SAR0_CSR6 EQU 0x40005906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_BASE\r
-CYDEV_ANAIF_CFG_SAR1_BASE EQU 0x40005908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_CFG_SAR1_SIZE\r
-CYDEV_ANAIF_CFG_SAR1_SIZE EQU 0x00000007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR0\r
-CYREG_SAR1_CSR0 EQU 0x40005908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR1\r
-CYREG_SAR1_CSR1 EQU 0x40005909\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR2\r
-CYREG_SAR1_CSR2 EQU 0x4000590a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR3\r
-CYREG_SAR1_CSR3 EQU 0x4000590b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR4\r
-CYREG_SAR1_CSR4 EQU 0x4000590c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR5\r
-CYREG_SAR1_CSR5 EQU 0x4000590d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CSR6\r
-CYREG_SAR1_CSR6 EQU 0x4000590e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BASE\r
-CYDEV_ANAIF_RT_BASE EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SIZE\r
-CYDEV_ANAIF_RT_SIZE EQU 0x00000162\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_BASE\r
-CYDEV_ANAIF_RT_SC0_BASE EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC0_SIZE\r
-CYDEV_ANAIF_RT_SC0_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW0\r
-CYREG_SC0_SW0 EQU 0x40005a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW2\r
-CYREG_SC0_SW2 EQU 0x40005a02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW3\r
-CYREG_SC0_SW3 EQU 0x40005a03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW4\r
-CYREG_SC0_SW4 EQU 0x40005a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW6\r
-CYREG_SC0_SW6 EQU 0x40005a06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW7\r
-CYREG_SC0_SW7 EQU 0x40005a07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW8\r
-CYREG_SC0_SW8 EQU 0x40005a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_SW10\r
-CYREG_SC0_SW10 EQU 0x40005a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_CLK\r
-CYREG_SC0_CLK EQU 0x40005a0b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC0_BST\r
-CYREG_SC0_BST EQU 0x40005a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_BASE\r
-CYDEV_ANAIF_RT_SC1_BASE EQU 0x40005a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC1_SIZE\r
-CYDEV_ANAIF_RT_SC1_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW0\r
-CYREG_SC1_SW0 EQU 0x40005a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW2\r
-CYREG_SC1_SW2 EQU 0x40005a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW3\r
-CYREG_SC1_SW3 EQU 0x40005a13\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW4\r
-CYREG_SC1_SW4 EQU 0x40005a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW6\r
-CYREG_SC1_SW6 EQU 0x40005a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW7\r
-CYREG_SC1_SW7 EQU 0x40005a17\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW8\r
-CYREG_SC1_SW8 EQU 0x40005a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_SW10\r
-CYREG_SC1_SW10 EQU 0x40005a1a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_CLK\r
-CYREG_SC1_CLK EQU 0x40005a1b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC1_BST\r
-CYREG_SC1_BST EQU 0x40005a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_BASE\r
-CYDEV_ANAIF_RT_SC2_BASE EQU 0x40005a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC2_SIZE\r
-CYDEV_ANAIF_RT_SC2_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW0\r
-CYREG_SC2_SW0 EQU 0x40005a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW2\r
-CYREG_SC2_SW2 EQU 0x40005a22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW3\r
-CYREG_SC2_SW3 EQU 0x40005a23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW4\r
-CYREG_SC2_SW4 EQU 0x40005a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW6\r
-CYREG_SC2_SW6 EQU 0x40005a26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW7\r
-CYREG_SC2_SW7 EQU 0x40005a27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW8\r
-CYREG_SC2_SW8 EQU 0x40005a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_SW10\r
-CYREG_SC2_SW10 EQU 0x40005a2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_CLK\r
-CYREG_SC2_CLK EQU 0x40005a2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC2_BST\r
-CYREG_SC2_BST EQU 0x40005a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_BASE\r
-CYDEV_ANAIF_RT_SC3_BASE EQU 0x40005a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC3_SIZE\r
-CYDEV_ANAIF_RT_SC3_SIZE EQU 0x0000000d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW0\r
-CYREG_SC3_SW0 EQU 0x40005a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW2\r
-CYREG_SC3_SW2 EQU 0x40005a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW3\r
-CYREG_SC3_SW3 EQU 0x40005a33\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW4\r
-CYREG_SC3_SW4 EQU 0x40005a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW6\r
-CYREG_SC3_SW6 EQU 0x40005a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW7\r
-CYREG_SC3_SW7 EQU 0x40005a37\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW8\r
-CYREG_SC3_SW8 EQU 0x40005a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_SW10\r
-CYREG_SC3_SW10 EQU 0x40005a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_CLK\r
-CYREG_SC3_CLK EQU 0x40005a3b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC3_BST\r
-CYREG_SC3_BST EQU 0x40005a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_BASE\r
-CYDEV_ANAIF_RT_DAC0_BASE EQU 0x40005a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC0_SIZE\r
-CYDEV_ANAIF_RT_DAC0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_SW0\r
-CYREG_DAC0_SW0 EQU 0x40005a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_SW2\r
-CYREG_DAC0_SW2 EQU 0x40005a82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_SW3\r
-CYREG_DAC0_SW3 EQU 0x40005a83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_SW4\r
-CYREG_DAC0_SW4 EQU 0x40005a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_STROBE\r
-CYREG_DAC0_STROBE EQU 0x40005a87\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_BASE\r
-CYDEV_ANAIF_RT_DAC1_BASE EQU 0x40005a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC1_SIZE\r
-CYDEV_ANAIF_RT_DAC1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_SW0\r
-CYREG_DAC1_SW0 EQU 0x40005a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_SW2\r
-CYREG_DAC1_SW2 EQU 0x40005a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_SW3\r
-CYREG_DAC1_SW3 EQU 0x40005a8b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_SW4\r
-CYREG_DAC1_SW4 EQU 0x40005a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_STROBE\r
-CYREG_DAC1_STROBE EQU 0x40005a8f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_BASE\r
-CYDEV_ANAIF_RT_DAC2_BASE EQU 0x40005a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC2_SIZE\r
-CYDEV_ANAIF_RT_DAC2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_SW0\r
-CYREG_DAC2_SW0 EQU 0x40005a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_SW2\r
-CYREG_DAC2_SW2 EQU 0x40005a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_SW3\r
-CYREG_DAC2_SW3 EQU 0x40005a93\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_SW4\r
-CYREG_DAC2_SW4 EQU 0x40005a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_STROBE\r
-CYREG_DAC2_STROBE EQU 0x40005a97\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_BASE\r
-CYDEV_ANAIF_RT_DAC3_BASE EQU 0x40005a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DAC3_SIZE\r
-CYDEV_ANAIF_RT_DAC3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_SW0\r
-CYREG_DAC3_SW0 EQU 0x40005a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_SW2\r
-CYREG_DAC3_SW2 EQU 0x40005a9a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_SW3\r
-CYREG_DAC3_SW3 EQU 0x40005a9b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_SW4\r
-CYREG_DAC3_SW4 EQU 0x40005a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_STROBE\r
-CYREG_DAC3_STROBE EQU 0x40005a9f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_BASE\r
-CYDEV_ANAIF_RT_CMP0_BASE EQU 0x40005ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP0_SIZE\r
-CYDEV_ANAIF_RT_CMP0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_SW0\r
-CYREG_CMP0_SW0 EQU 0x40005ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_SW2\r
-CYREG_CMP0_SW2 EQU 0x40005ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_SW3\r
-CYREG_CMP0_SW3 EQU 0x40005ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_SW4\r
-CYREG_CMP0_SW4 EQU 0x40005ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_SW6\r
-CYREG_CMP0_SW6 EQU 0x40005ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP0_CLK\r
-CYREG_CMP0_CLK EQU 0x40005ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_BASE\r
-CYDEV_ANAIF_RT_CMP1_BASE EQU 0x40005ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP1_SIZE\r
-CYDEV_ANAIF_RT_CMP1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_SW0\r
-CYREG_CMP1_SW0 EQU 0x40005ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_SW2\r
-CYREG_CMP1_SW2 EQU 0x40005aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_SW3\r
-CYREG_CMP1_SW3 EQU 0x40005acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_SW4\r
-CYREG_CMP1_SW4 EQU 0x40005acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_SW6\r
-CYREG_CMP1_SW6 EQU 0x40005ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP1_CLK\r
-CYREG_CMP1_CLK EQU 0x40005acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_BASE\r
-CYDEV_ANAIF_RT_CMP2_BASE EQU 0x40005ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP2_SIZE\r
-CYDEV_ANAIF_RT_CMP2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_SW0\r
-CYREG_CMP2_SW0 EQU 0x40005ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_SW2\r
-CYREG_CMP2_SW2 EQU 0x40005ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_SW3\r
-CYREG_CMP2_SW3 EQU 0x40005ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_SW4\r
-CYREG_CMP2_SW4 EQU 0x40005ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_SW6\r
-CYREG_CMP2_SW6 EQU 0x40005ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP2_CLK\r
-CYREG_CMP2_CLK EQU 0x40005ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_BASE\r
-CYDEV_ANAIF_RT_CMP3_BASE EQU 0x40005ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_CMP3_SIZE\r
-CYDEV_ANAIF_RT_CMP3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_SW0\r
-CYREG_CMP3_SW0 EQU 0x40005ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_SW2\r
-CYREG_CMP3_SW2 EQU 0x40005ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_SW3\r
-CYREG_CMP3_SW3 EQU 0x40005adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_SW4\r
-CYREG_CMP3_SW4 EQU 0x40005adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_SW6\r
-CYREG_CMP3_SW6 EQU 0x40005ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP3_CLK\r
-CYREG_CMP3_CLK EQU 0x40005adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_BASE\r
-CYDEV_ANAIF_RT_DSM0_BASE EQU 0x40005b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DSM0_SIZE\r
-CYDEV_ANAIF_RT_DSM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_SW0\r
-CYREG_DSM0_SW0 EQU 0x40005b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_SW2\r
-CYREG_DSM0_SW2 EQU 0x40005b02\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_SW3\r
-CYREG_DSM0_SW3 EQU 0x40005b03\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_SW4\r
-CYREG_DSM0_SW4 EQU 0x40005b04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_SW6\r
-CYREG_DSM0_SW6 EQU 0x40005b06\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_CLK\r
-CYREG_DSM0_CLK EQU 0x40005b07\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_BASE\r
-CYDEV_ANAIF_RT_SAR0_BASE EQU 0x40005b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR0_SIZE\r
-CYDEV_ANAIF_RT_SAR0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_SW0\r
-CYREG_SAR0_SW0 EQU 0x40005b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_SW2\r
-CYREG_SAR0_SW2 EQU 0x40005b22\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_SW3\r
-CYREG_SAR0_SW3 EQU 0x40005b23\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_SW4\r
-CYREG_SAR0_SW4 EQU 0x40005b24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_SW6\r
-CYREG_SAR0_SW6 EQU 0x40005b26\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_CLK\r
-CYREG_SAR0_CLK EQU 0x40005b27\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_BASE\r
-CYDEV_ANAIF_RT_SAR1_BASE EQU 0x40005b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SAR1_SIZE\r
-CYDEV_ANAIF_RT_SAR1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_SW0\r
-CYREG_SAR1_SW0 EQU 0x40005b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_SW2\r
-CYREG_SAR1_SW2 EQU 0x40005b2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_SW3\r
-CYREG_SAR1_SW3 EQU 0x40005b2b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_SW4\r
-CYREG_SAR1_SW4 EQU 0x40005b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_SW6\r
-CYREG_SAR1_SW6 EQU 0x40005b2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_CLK\r
-CYREG_SAR1_CLK EQU 0x40005b2f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_BASE\r
-CYDEV_ANAIF_RT_OPAMP0_BASE EQU 0x40005b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP0_SIZE\r
-CYDEV_ANAIF_RT_OPAMP0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_MX\r
-CYREG_OPAMP0_MX EQU 0x40005b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP0_SW\r
-CYREG_OPAMP0_SW EQU 0x40005b41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_BASE\r
-CYDEV_ANAIF_RT_OPAMP1_BASE EQU 0x40005b42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP1_SIZE\r
-CYDEV_ANAIF_RT_OPAMP1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_MX\r
-CYREG_OPAMP1_MX EQU 0x40005b42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP1_SW\r
-CYREG_OPAMP1_SW EQU 0x40005b43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_BASE\r
-CYDEV_ANAIF_RT_OPAMP2_BASE EQU 0x40005b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP2_SIZE\r
-CYDEV_ANAIF_RT_OPAMP2_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_MX\r
-CYREG_OPAMP2_MX EQU 0x40005b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP2_SW\r
-CYREG_OPAMP2_SW EQU 0x40005b45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_BASE\r
-CYDEV_ANAIF_RT_OPAMP3_BASE EQU 0x40005b46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_OPAMP3_SIZE\r
-CYDEV_ANAIF_RT_OPAMP3_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_MX\r
-CYREG_OPAMP3_MX EQU 0x40005b46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_OPAMP3_SW\r
-CYREG_OPAMP3_SW EQU 0x40005b47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_BASE\r
-CYDEV_ANAIF_RT_LCDDAC_BASE EQU 0x40005b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_LCDDAC_SIZE\r
-CYDEV_ANAIF_RT_LCDDAC_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_SW0\r
-CYREG_LCDDAC_SW0 EQU 0x40005b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_SW1\r
-CYREG_LCDDAC_SW1 EQU 0x40005b51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_SW2\r
-CYREG_LCDDAC_SW2 EQU 0x40005b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_SW3\r
-CYREG_LCDDAC_SW3 EQU 0x40005b53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LCDDAC_SW4\r
-CYREG_LCDDAC_SW4 EQU 0x40005b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_BASE\r
-CYDEV_ANAIF_RT_SC_BASE EQU 0x40005b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_SC_SIZE\r
-CYDEV_ANAIF_RT_SC_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_MISC\r
-CYREG_SC_MISC EQU 0x40005b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_BASE\r
-CYDEV_ANAIF_RT_BUS_BASE EQU 0x40005b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_BUS_SIZE\r
-CYDEV_ANAIF_RT_BUS_SIZE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BUS_SW0\r
-CYREG_BUS_SW0 EQU 0x40005b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BUS_SW2\r
-CYREG_BUS_SW2 EQU 0x40005b5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BUS_SW3\r
-CYREG_BUS_SW3 EQU 0x40005b5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_BASE\r
-CYDEV_ANAIF_RT_DFT_BASE EQU 0x40005b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_RT_DFT_SIZE\r
-CYDEV_ANAIF_RT_DFT_SIZE EQU 0x00000006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR0\r
-CYREG_DFT_CR0 EQU 0x40005b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR1\r
-CYREG_DFT_CR1 EQU 0x40005b5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR2\r
-CYREG_DFT_CR2 EQU 0x40005b5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR3\r
-CYREG_DFT_CR3 EQU 0x40005b5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR4\r
-CYREG_DFT_CR4 EQU 0x40005b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFT_CR5\r
-CYREG_DFT_CR5 EQU 0x40005b61\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_BASE\r
-CYDEV_ANAIF_WRK_BASE EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SIZE\r
-CYDEV_ANAIF_WRK_SIZE EQU 0x00000029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_BASE\r
-CYDEV_ANAIF_WRK_DAC0_BASE EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC0_SIZE\r
-CYDEV_ANAIF_WRK_DAC0_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC0_D\r
-CYREG_DAC0_D EQU 0x40005b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_BASE\r
-CYDEV_ANAIF_WRK_DAC1_BASE EQU 0x40005b81\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC1_SIZE\r
-CYDEV_ANAIF_WRK_DAC1_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC1_D\r
-CYREG_DAC1_D EQU 0x40005b81\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_BASE\r
-CYDEV_ANAIF_WRK_DAC2_BASE EQU 0x40005b82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC2_SIZE\r
-CYDEV_ANAIF_WRK_DAC2_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC2_D\r
-CYREG_DAC2_D EQU 0x40005b82\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_BASE\r
-CYDEV_ANAIF_WRK_DAC3_BASE EQU 0x40005b83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DAC3_SIZE\r
-CYDEV_ANAIF_WRK_DAC3_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DAC3_D\r
-CYREG_DAC3_D EQU 0x40005b83\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_BASE\r
-CYDEV_ANAIF_WRK_DSM0_BASE EQU 0x40005b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_DSM0_SIZE\r
-CYDEV_ANAIF_WRK_DSM0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_OUT0\r
-CYREG_DSM0_OUT0 EQU 0x40005b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DSM0_OUT1\r
-CYREG_DSM0_OUT1 EQU 0x40005b89\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_BASE\r
-CYDEV_ANAIF_WRK_LUT_BASE EQU 0x40005b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_LUT_SIZE\r
-CYDEV_ANAIF_WRK_LUT_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT_SR\r
-CYREG_LUT_SR EQU 0x40005b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT_WRK1\r
-CYREG_LUT_WRK1 EQU 0x40005b91\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT_MSK\r
-CYREG_LUT_MSK EQU 0x40005b92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT_CLK\r
-CYREG_LUT_CLK EQU 0x40005b93\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_LUT_CPTR\r
-CYREG_LUT_CPTR EQU 0x40005b94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_BASE\r
-CYDEV_ANAIF_WRK_CMP_BASE EQU 0x40005b96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_CMP_SIZE\r
-CYDEV_ANAIF_WRK_CMP_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP_WRK\r
-CYREG_CMP_WRK EQU 0x40005b96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CMP_TST\r
-CYREG_CMP_TST EQU 0x40005b97\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_BASE\r
-CYDEV_ANAIF_WRK_SC_BASE EQU 0x40005b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SC_SIZE\r
-CYDEV_ANAIF_WRK_SC_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_SR\r
-CYREG_SC_SR EQU 0x40005b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_WRK1\r
-CYREG_SC_WRK1 EQU 0x40005b99\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_MSK\r
-CYREG_SC_MSK EQU 0x40005b9a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_CMPINV\r
-CYREG_SC_CMPINV EQU 0x40005b9b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SC_CPTR\r
-CYREG_SC_CPTR EQU 0x40005b9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_BASE\r
-CYDEV_ANAIF_WRK_SAR0_BASE EQU 0x40005ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR0_SIZE\r
-CYDEV_ANAIF_WRK_SAR0_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_WRK0\r
-CYREG_SAR0_WRK0 EQU 0x40005ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR0_WRK1\r
-CYREG_SAR0_WRK1 EQU 0x40005ba1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_BASE\r
-CYDEV_ANAIF_WRK_SAR1_BASE EQU 0x40005ba2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SAR1_SIZE\r
-CYDEV_ANAIF_WRK_SAR1_SIZE EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_WRK0\r
-CYREG_SAR1_WRK0 EQU 0x40005ba2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SAR1_WRK1\r
-CYREG_SAR1_WRK1 EQU 0x40005ba3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_BASE\r
-CYDEV_ANAIF_WRK_SARS_BASE EQU 0x40005ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ANAIF_WRK_SARS_SIZE\r
-CYDEV_ANAIF_WRK_SARS_SIZE EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ANAIF_WRK_SARS_SOF\r
-CYREG_ANAIF_WRK_SARS_SOF EQU 0x40005ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_BASE\r
-CYDEV_USB_BASE EQU 0x40006000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIZE\r
-CYDEV_USB_SIZE EQU 0x00000300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR0\r
-CYREG_USB_EP0_DR0 EQU 0x40006000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR1\r
-CYREG_USB_EP0_DR1 EQU 0x40006001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR2\r
-CYREG_USB_EP0_DR2 EQU 0x40006002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR3\r
-CYREG_USB_EP0_DR3 EQU 0x40006003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR4\r
-CYREG_USB_EP0_DR4 EQU 0x40006004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR5\r
-CYREG_USB_EP0_DR5 EQU 0x40006005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR6\r
-CYREG_USB_EP0_DR6 EQU 0x40006006\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_DR7\r
-CYREG_USB_EP0_DR7 EQU 0x40006007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_CR0\r
-CYREG_USB_CR0 EQU 0x40006008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_CR1\r
-CYREG_USB_CR1 EQU 0x40006009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP_INT_EN\r
-CYREG_USB_SIE_EP_INT_EN EQU 0x4000600a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP_INT_SR\r
-CYREG_USB_SIE_EP_INT_SR EQU 0x4000600b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_BASE\r
-CYDEV_USB_SIE_EP1_BASE EQU 0x4000600c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP1_SIZE\r
-CYDEV_USB_SIE_EP1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP1_CNT0\r
-CYREG_USB_SIE_EP1_CNT0 EQU 0x4000600c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP1_CNT1\r
-CYREG_USB_SIE_EP1_CNT1 EQU 0x4000600d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP1_CR0\r
-CYREG_USB_SIE_EP1_CR0 EQU 0x4000600e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_USBIO_CR0\r
-CYREG_USB_USBIO_CR0 EQU 0x40006010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_USBIO_CR1\r
-CYREG_USB_USBIO_CR1 EQU 0x40006012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_DYN_RECONFIG\r
-CYREG_USB_DYN_RECONFIG EQU 0x40006014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SOF0\r
-CYREG_USB_SOF0 EQU 0x40006018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SOF1\r
-CYREG_USB_SOF1 EQU 0x40006019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_BASE\r
-CYDEV_USB_SIE_EP2_BASE EQU 0x4000601c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP2_SIZE\r
-CYDEV_USB_SIE_EP2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP2_CNT0\r
-CYREG_USB_SIE_EP2_CNT0 EQU 0x4000601c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP2_CNT1\r
-CYREG_USB_SIE_EP2_CNT1 EQU 0x4000601d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP2_CR0\r
-CYREG_USB_SIE_EP2_CR0 EQU 0x4000601e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_CR\r
-CYREG_USB_EP0_CR EQU 0x40006028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP0_CNT\r
-CYREG_USB_EP0_CNT EQU 0x40006029\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_BASE\r
-CYDEV_USB_SIE_EP3_BASE EQU 0x4000602c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP3_SIZE\r
-CYDEV_USB_SIE_EP3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP3_CNT0\r
-CYREG_USB_SIE_EP3_CNT0 EQU 0x4000602c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP3_CNT1\r
-CYREG_USB_SIE_EP3_CNT1 EQU 0x4000602d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP3_CR0\r
-CYREG_USB_SIE_EP3_CR0 EQU 0x4000602e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_BASE\r
-CYDEV_USB_SIE_EP4_BASE EQU 0x4000603c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP4_SIZE\r
-CYDEV_USB_SIE_EP4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP4_CNT0\r
-CYREG_USB_SIE_EP4_CNT0 EQU 0x4000603c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP4_CNT1\r
-CYREG_USB_SIE_EP4_CNT1 EQU 0x4000603d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP4_CR0\r
-CYREG_USB_SIE_EP4_CR0 EQU 0x4000603e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_BASE\r
-CYDEV_USB_SIE_EP5_BASE EQU 0x4000604c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP5_SIZE\r
-CYDEV_USB_SIE_EP5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP5_CNT0\r
-CYREG_USB_SIE_EP5_CNT0 EQU 0x4000604c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP5_CNT1\r
-CYREG_USB_SIE_EP5_CNT1 EQU 0x4000604d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP5_CR0\r
-CYREG_USB_SIE_EP5_CR0 EQU 0x4000604e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_BASE\r
-CYDEV_USB_SIE_EP6_BASE EQU 0x4000605c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP6_SIZE\r
-CYDEV_USB_SIE_EP6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP6_CNT0\r
-CYREG_USB_SIE_EP6_CNT0 EQU 0x4000605c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP6_CNT1\r
-CYREG_USB_SIE_EP6_CNT1 EQU 0x4000605d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP6_CR0\r
-CYREG_USB_SIE_EP6_CR0 EQU 0x4000605e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_BASE\r
-CYDEV_USB_SIE_EP7_BASE EQU 0x4000606c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP7_SIZE\r
-CYDEV_USB_SIE_EP7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP7_CNT0\r
-CYREG_USB_SIE_EP7_CNT0 EQU 0x4000606c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP7_CNT1\r
-CYREG_USB_SIE_EP7_CNT1 EQU 0x4000606d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP7_CR0\r
-CYREG_USB_SIE_EP7_CR0 EQU 0x4000606e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_BASE\r
-CYDEV_USB_SIE_EP8_BASE EQU 0x4000607c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_SIE_EP8_SIZE\r
-CYDEV_USB_SIE_EP8_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP8_CNT0\r
-CYREG_USB_SIE_EP8_CNT0 EQU 0x4000607c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP8_CNT1\r
-CYREG_USB_SIE_EP8_CNT1 EQU 0x4000607d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_SIE_EP8_CR0\r
-CYREG_USB_SIE_EP8_CR0 EQU 0x4000607e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_BASE\r
-CYDEV_USB_ARB_EP1_BASE EQU 0x40006080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP1_SIZE\r
-CYDEV_USB_ARB_EP1_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP1_CFG\r
-CYREG_USB_ARB_EP1_CFG EQU 0x40006080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP1_INT_EN\r
-CYREG_USB_ARB_EP1_INT_EN EQU 0x40006081\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP1_SR\r
-CYREG_USB_ARB_EP1_SR EQU 0x40006082\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_BASE\r
-CYDEV_USB_ARB_RW1_BASE EQU 0x40006084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW1_SIZE\r
-CYDEV_USB_ARB_RW1_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW1_WA\r
-CYREG_USB_ARB_RW1_WA EQU 0x40006084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW1_WA_MSB\r
-CYREG_USB_ARB_RW1_WA_MSB EQU 0x40006085\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW1_RA\r
-CYREG_USB_ARB_RW1_RA EQU 0x40006086\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW1_RA_MSB\r
-CYREG_USB_ARB_RW1_RA_MSB EQU 0x40006087\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW1_DR\r
-CYREG_USB_ARB_RW1_DR EQU 0x40006088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_BUF_SIZE\r
-CYREG_USB_BUF_SIZE EQU 0x4000608c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP_ACTIVE\r
-CYREG_USB_EP_ACTIVE EQU 0x4000608e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_EP_TYPE\r
-CYREG_USB_EP_TYPE EQU 0x4000608f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_BASE\r
-CYDEV_USB_ARB_EP2_BASE EQU 0x40006090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP2_SIZE\r
-CYDEV_USB_ARB_EP2_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP2_CFG\r
-CYREG_USB_ARB_EP2_CFG EQU 0x40006090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP2_INT_EN\r
-CYREG_USB_ARB_EP2_INT_EN EQU 0x40006091\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP2_SR\r
-CYREG_USB_ARB_EP2_SR EQU 0x40006092\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_BASE\r
-CYDEV_USB_ARB_RW2_BASE EQU 0x40006094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW2_SIZE\r
-CYDEV_USB_ARB_RW2_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW2_WA\r
-CYREG_USB_ARB_RW2_WA EQU 0x40006094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW2_WA_MSB\r
-CYREG_USB_ARB_RW2_WA_MSB EQU 0x40006095\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW2_RA\r
-CYREG_USB_ARB_RW2_RA EQU 0x40006096\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW2_RA_MSB\r
-CYREG_USB_ARB_RW2_RA_MSB EQU 0x40006097\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW2_DR\r
-CYREG_USB_ARB_RW2_DR EQU 0x40006098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_CFG\r
-CYREG_USB_ARB_CFG EQU 0x4000609c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_USB_CLK_EN\r
-CYREG_USB_USB_CLK_EN EQU 0x4000609d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_INT_EN\r
-CYREG_USB_ARB_INT_EN EQU 0x4000609e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_INT_SR\r
-CYREG_USB_ARB_INT_SR EQU 0x4000609f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_BASE\r
-CYDEV_USB_ARB_EP3_BASE EQU 0x400060a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP3_SIZE\r
-CYDEV_USB_ARB_EP3_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP3_CFG\r
-CYREG_USB_ARB_EP3_CFG EQU 0x400060a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP3_INT_EN\r
-CYREG_USB_ARB_EP3_INT_EN EQU 0x400060a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP3_SR\r
-CYREG_USB_ARB_EP3_SR EQU 0x400060a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_BASE\r
-CYDEV_USB_ARB_RW3_BASE EQU 0x400060a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW3_SIZE\r
-CYDEV_USB_ARB_RW3_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW3_WA\r
-CYREG_USB_ARB_RW3_WA EQU 0x400060a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW3_WA_MSB\r
-CYREG_USB_ARB_RW3_WA_MSB EQU 0x400060a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW3_RA\r
-CYREG_USB_ARB_RW3_RA EQU 0x400060a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW3_RA_MSB\r
-CYREG_USB_ARB_RW3_RA_MSB EQU 0x400060a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW3_DR\r
-CYREG_USB_ARB_RW3_DR EQU 0x400060a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_CWA\r
-CYREG_USB_CWA EQU 0x400060ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_CWA_MSB\r
-CYREG_USB_CWA_MSB EQU 0x400060ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_BASE\r
-CYDEV_USB_ARB_EP4_BASE EQU 0x400060b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP4_SIZE\r
-CYDEV_USB_ARB_EP4_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP4_CFG\r
-CYREG_USB_ARB_EP4_CFG EQU 0x400060b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP4_INT_EN\r
-CYREG_USB_ARB_EP4_INT_EN EQU 0x400060b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP4_SR\r
-CYREG_USB_ARB_EP4_SR EQU 0x400060b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_BASE\r
-CYDEV_USB_ARB_RW4_BASE EQU 0x400060b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW4_SIZE\r
-CYDEV_USB_ARB_RW4_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW4_WA\r
-CYREG_USB_ARB_RW4_WA EQU 0x400060b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW4_WA_MSB\r
-CYREG_USB_ARB_RW4_WA_MSB EQU 0x400060b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW4_RA\r
-CYREG_USB_ARB_RW4_RA EQU 0x400060b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW4_RA_MSB\r
-CYREG_USB_ARB_RW4_RA_MSB EQU 0x400060b7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW4_DR\r
-CYREG_USB_ARB_RW4_DR EQU 0x400060b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_DMA_THRES\r
-CYREG_USB_DMA_THRES EQU 0x400060bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_DMA_THRES_MSB\r
-CYREG_USB_DMA_THRES_MSB EQU 0x400060bd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_BASE\r
-CYDEV_USB_ARB_EP5_BASE EQU 0x400060c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP5_SIZE\r
-CYDEV_USB_ARB_EP5_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP5_CFG\r
-CYREG_USB_ARB_EP5_CFG EQU 0x400060c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP5_INT_EN\r
-CYREG_USB_ARB_EP5_INT_EN EQU 0x400060c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP5_SR\r
-CYREG_USB_ARB_EP5_SR EQU 0x400060c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_BASE\r
-CYDEV_USB_ARB_RW5_BASE EQU 0x400060c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW5_SIZE\r
-CYDEV_USB_ARB_RW5_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW5_WA\r
-CYREG_USB_ARB_RW5_WA EQU 0x400060c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW5_WA_MSB\r
-CYREG_USB_ARB_RW5_WA_MSB EQU 0x400060c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW5_RA\r
-CYREG_USB_ARB_RW5_RA EQU 0x400060c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW5_RA_MSB\r
-CYREG_USB_ARB_RW5_RA_MSB EQU 0x400060c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW5_DR\r
-CYREG_USB_ARB_RW5_DR EQU 0x400060c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_BUS_RST_CNT\r
-CYREG_USB_BUS_RST_CNT EQU 0x400060cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_BASE\r
-CYDEV_USB_ARB_EP6_BASE EQU 0x400060d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP6_SIZE\r
-CYDEV_USB_ARB_EP6_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP6_CFG\r
-CYREG_USB_ARB_EP6_CFG EQU 0x400060d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP6_INT_EN\r
-CYREG_USB_ARB_EP6_INT_EN EQU 0x400060d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP6_SR\r
-CYREG_USB_ARB_EP6_SR EQU 0x400060d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_BASE\r
-CYDEV_USB_ARB_RW6_BASE EQU 0x400060d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW6_SIZE\r
-CYDEV_USB_ARB_RW6_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW6_WA\r
-CYREG_USB_ARB_RW6_WA EQU 0x400060d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW6_WA_MSB\r
-CYREG_USB_ARB_RW6_WA_MSB EQU 0x400060d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW6_RA\r
-CYREG_USB_ARB_RW6_RA EQU 0x400060d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW6_RA_MSB\r
-CYREG_USB_ARB_RW6_RA_MSB EQU 0x400060d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW6_DR\r
-CYREG_USB_ARB_RW6_DR EQU 0x400060d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_BASE\r
-CYDEV_USB_ARB_EP7_BASE EQU 0x400060e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP7_SIZE\r
-CYDEV_USB_ARB_EP7_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP7_CFG\r
-CYREG_USB_ARB_EP7_CFG EQU 0x400060e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP7_INT_EN\r
-CYREG_USB_ARB_EP7_INT_EN EQU 0x400060e1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP7_SR\r
-CYREG_USB_ARB_EP7_SR EQU 0x400060e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_BASE\r
-CYDEV_USB_ARB_RW7_BASE EQU 0x400060e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW7_SIZE\r
-CYDEV_USB_ARB_RW7_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW7_WA\r
-CYREG_USB_ARB_RW7_WA EQU 0x400060e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW7_WA_MSB\r
-CYREG_USB_ARB_RW7_WA_MSB EQU 0x400060e5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW7_RA\r
-CYREG_USB_ARB_RW7_RA EQU 0x400060e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW7_RA_MSB\r
-CYREG_USB_ARB_RW7_RA_MSB EQU 0x400060e7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW7_DR\r
-CYREG_USB_ARB_RW7_DR EQU 0x400060e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_BASE\r
-CYDEV_USB_ARB_EP8_BASE EQU 0x400060f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_EP8_SIZE\r
-CYDEV_USB_ARB_EP8_SIZE EQU 0x00000003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP8_CFG\r
-CYREG_USB_ARB_EP8_CFG EQU 0x400060f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP8_INT_EN\r
-CYREG_USB_ARB_EP8_INT_EN EQU 0x400060f1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_EP8_SR\r
-CYREG_USB_ARB_EP8_SR EQU 0x400060f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_BASE\r
-CYDEV_USB_ARB_RW8_BASE EQU 0x400060f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_ARB_RW8_SIZE\r
-CYDEV_USB_ARB_RW8_SIZE EQU 0x00000005\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW8_WA\r
-CYREG_USB_ARB_RW8_WA EQU 0x400060f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW8_WA_MSB\r
-CYREG_USB_ARB_RW8_WA_MSB EQU 0x400060f5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW8_RA\r
-CYREG_USB_ARB_RW8_RA EQU 0x400060f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW8_RA_MSB\r
-CYREG_USB_ARB_RW8_RA_MSB EQU 0x400060f7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_ARB_RW8_DR\r
-CYREG_USB_ARB_RW8_DR EQU 0x400060f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_BASE\r
-CYDEV_USB_MEM_BASE EQU 0x40006100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_USB_MEM_SIZE\r
-CYDEV_USB_MEM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_MEM_DATA_MBASE\r
-CYREG_USB_MEM_DATA_MBASE EQU 0x40006100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_USB_MEM_DATA_MSIZE\r
-CYREG_USB_MEM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_BASE\r
-CYDEV_UWRK_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_SIZE\r
-CYDEV_UWRK_SIZE EQU 0x00000b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_BASE\r
-CYDEV_UWRK_UWRK8_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_SIZE\r
-CYDEV_UWRK_UWRK8_SIZE EQU 0x000003b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_BASE\r
-CYDEV_UWRK_UWRK8_B0_BASE EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B0_SIZE\r
-CYDEV_UWRK_UWRK8_B0_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_A0\r
-CYREG_B0_UDB00_A0 EQU 0x40006400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_A0\r
-CYREG_B0_UDB01_A0 EQU 0x40006401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_A0\r
-CYREG_B0_UDB02_A0 EQU 0x40006402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_A0\r
-CYREG_B0_UDB03_A0 EQU 0x40006403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_A0\r
-CYREG_B0_UDB04_A0 EQU 0x40006404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_A0\r
-CYREG_B0_UDB05_A0 EQU 0x40006405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_A0\r
-CYREG_B0_UDB06_A0 EQU 0x40006406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_A0\r
-CYREG_B0_UDB07_A0 EQU 0x40006407\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_A0\r
-CYREG_B0_UDB08_A0 EQU 0x40006408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_A0\r
-CYREG_B0_UDB09_A0 EQU 0x40006409\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_A0\r
-CYREG_B0_UDB10_A0 EQU 0x4000640a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_A0\r
-CYREG_B0_UDB11_A0 EQU 0x4000640b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_A0\r
-CYREG_B0_UDB12_A0 EQU 0x4000640c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_A0\r
-CYREG_B0_UDB13_A0 EQU 0x4000640d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_A0\r
-CYREG_B0_UDB14_A0 EQU 0x4000640e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_A0\r
-CYREG_B0_UDB15_A0 EQU 0x4000640f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_A1\r
-CYREG_B0_UDB00_A1 EQU 0x40006410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_A1\r
-CYREG_B0_UDB01_A1 EQU 0x40006411\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_A1\r
-CYREG_B0_UDB02_A1 EQU 0x40006412\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_A1\r
-CYREG_B0_UDB03_A1 EQU 0x40006413\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_A1\r
-CYREG_B0_UDB04_A1 EQU 0x40006414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_A1\r
-CYREG_B0_UDB05_A1 EQU 0x40006415\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_A1\r
-CYREG_B0_UDB06_A1 EQU 0x40006416\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_A1\r
-CYREG_B0_UDB07_A1 EQU 0x40006417\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_A1\r
-CYREG_B0_UDB08_A1 EQU 0x40006418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_A1\r
-CYREG_B0_UDB09_A1 EQU 0x40006419\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_A1\r
-CYREG_B0_UDB10_A1 EQU 0x4000641a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_A1\r
-CYREG_B0_UDB11_A1 EQU 0x4000641b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_A1\r
-CYREG_B0_UDB12_A1 EQU 0x4000641c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_A1\r
-CYREG_B0_UDB13_A1 EQU 0x4000641d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_A1\r
-CYREG_B0_UDB14_A1 EQU 0x4000641e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_A1\r
-CYREG_B0_UDB15_A1 EQU 0x4000641f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_D0\r
-CYREG_B0_UDB00_D0 EQU 0x40006420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_D0\r
-CYREG_B0_UDB01_D0 EQU 0x40006421\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_D0\r
-CYREG_B0_UDB02_D0 EQU 0x40006422\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_D0\r
-CYREG_B0_UDB03_D0 EQU 0x40006423\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_D0\r
-CYREG_B0_UDB04_D0 EQU 0x40006424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_D0\r
-CYREG_B0_UDB05_D0 EQU 0x40006425\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_D0\r
-CYREG_B0_UDB06_D0 EQU 0x40006426\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_D0\r
-CYREG_B0_UDB07_D0 EQU 0x40006427\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_D0\r
-CYREG_B0_UDB08_D0 EQU 0x40006428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_D0\r
-CYREG_B0_UDB09_D0 EQU 0x40006429\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_D0\r
-CYREG_B0_UDB10_D0 EQU 0x4000642a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_D0\r
-CYREG_B0_UDB11_D0 EQU 0x4000642b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_D0\r
-CYREG_B0_UDB12_D0 EQU 0x4000642c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_D0\r
-CYREG_B0_UDB13_D0 EQU 0x4000642d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_D0\r
-CYREG_B0_UDB14_D0 EQU 0x4000642e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_D0\r
-CYREG_B0_UDB15_D0 EQU 0x4000642f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_D1\r
-CYREG_B0_UDB00_D1 EQU 0x40006430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_D1\r
-CYREG_B0_UDB01_D1 EQU 0x40006431\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_D1\r
-CYREG_B0_UDB02_D1 EQU 0x40006432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_D1\r
-CYREG_B0_UDB03_D1 EQU 0x40006433\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_D1\r
-CYREG_B0_UDB04_D1 EQU 0x40006434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_D1\r
-CYREG_B0_UDB05_D1 EQU 0x40006435\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_D1\r
-CYREG_B0_UDB06_D1 EQU 0x40006436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_D1\r
-CYREG_B0_UDB07_D1 EQU 0x40006437\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_D1\r
-CYREG_B0_UDB08_D1 EQU 0x40006438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_D1\r
-CYREG_B0_UDB09_D1 EQU 0x40006439\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_D1\r
-CYREG_B0_UDB10_D1 EQU 0x4000643a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_D1\r
-CYREG_B0_UDB11_D1 EQU 0x4000643b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_D1\r
-CYREG_B0_UDB12_D1 EQU 0x4000643c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_D1\r
-CYREG_B0_UDB13_D1 EQU 0x4000643d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_D1\r
-CYREG_B0_UDB14_D1 EQU 0x4000643e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_D1\r
-CYREG_B0_UDB15_D1 EQU 0x4000643f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_F0\r
-CYREG_B0_UDB00_F0 EQU 0x40006440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_F0\r
-CYREG_B0_UDB01_F0 EQU 0x40006441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_F0\r
-CYREG_B0_UDB02_F0 EQU 0x40006442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_F0\r
-CYREG_B0_UDB03_F0 EQU 0x40006443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_F0\r
-CYREG_B0_UDB04_F0 EQU 0x40006444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_F0\r
-CYREG_B0_UDB05_F0 EQU 0x40006445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_F0\r
-CYREG_B0_UDB06_F0 EQU 0x40006446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_F0\r
-CYREG_B0_UDB07_F0 EQU 0x40006447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_F0\r
-CYREG_B0_UDB08_F0 EQU 0x40006448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_F0\r
-CYREG_B0_UDB09_F0 EQU 0x40006449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_F0\r
-CYREG_B0_UDB10_F0 EQU 0x4000644a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_F0\r
-CYREG_B0_UDB11_F0 EQU 0x4000644b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_F0\r
-CYREG_B0_UDB12_F0 EQU 0x4000644c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_F0\r
-CYREG_B0_UDB13_F0 EQU 0x4000644d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_F0\r
-CYREG_B0_UDB14_F0 EQU 0x4000644e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_F0\r
-CYREG_B0_UDB15_F0 EQU 0x4000644f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_F1\r
-CYREG_B0_UDB00_F1 EQU 0x40006450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_F1\r
-CYREG_B0_UDB01_F1 EQU 0x40006451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_F1\r
-CYREG_B0_UDB02_F1 EQU 0x40006452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_F1\r
-CYREG_B0_UDB03_F1 EQU 0x40006453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_F1\r
-CYREG_B0_UDB04_F1 EQU 0x40006454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_F1\r
-CYREG_B0_UDB05_F1 EQU 0x40006455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_F1\r
-CYREG_B0_UDB06_F1 EQU 0x40006456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_F1\r
-CYREG_B0_UDB07_F1 EQU 0x40006457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_F1\r
-CYREG_B0_UDB08_F1 EQU 0x40006458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_F1\r
-CYREG_B0_UDB09_F1 EQU 0x40006459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_F1\r
-CYREG_B0_UDB10_F1 EQU 0x4000645a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_F1\r
-CYREG_B0_UDB11_F1 EQU 0x4000645b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_F1\r
-CYREG_B0_UDB12_F1 EQU 0x4000645c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_F1\r
-CYREG_B0_UDB13_F1 EQU 0x4000645d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_F1\r
-CYREG_B0_UDB14_F1 EQU 0x4000645e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_F1\r
-CYREG_B0_UDB15_F1 EQU 0x4000645f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_ST\r
-CYREG_B0_UDB00_ST EQU 0x40006460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_ST\r
-CYREG_B0_UDB01_ST EQU 0x40006461\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_ST\r
-CYREG_B0_UDB02_ST EQU 0x40006462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_ST\r
-CYREG_B0_UDB03_ST EQU 0x40006463\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_ST\r
-CYREG_B0_UDB04_ST EQU 0x40006464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_ST\r
-CYREG_B0_UDB05_ST EQU 0x40006465\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_ST\r
-CYREG_B0_UDB06_ST EQU 0x40006466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_ST\r
-CYREG_B0_UDB07_ST EQU 0x40006467\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_ST\r
-CYREG_B0_UDB08_ST EQU 0x40006468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_ST\r
-CYREG_B0_UDB09_ST EQU 0x40006469\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_ST\r
-CYREG_B0_UDB10_ST EQU 0x4000646a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_ST\r
-CYREG_B0_UDB11_ST EQU 0x4000646b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_ST\r
-CYREG_B0_UDB12_ST EQU 0x4000646c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_ST\r
-CYREG_B0_UDB13_ST EQU 0x4000646d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_ST\r
-CYREG_B0_UDB14_ST EQU 0x4000646e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_ST\r
-CYREG_B0_UDB15_ST EQU 0x4000646f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_CTL\r
-CYREG_B0_UDB00_CTL EQU 0x40006470\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_CTL\r
-CYREG_B0_UDB01_CTL EQU 0x40006471\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_CTL\r
-CYREG_B0_UDB02_CTL EQU 0x40006472\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_CTL\r
-CYREG_B0_UDB03_CTL EQU 0x40006473\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_CTL\r
-CYREG_B0_UDB04_CTL EQU 0x40006474\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_CTL\r
-CYREG_B0_UDB05_CTL EQU 0x40006475\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_CTL\r
-CYREG_B0_UDB06_CTL EQU 0x40006476\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_CTL\r
-CYREG_B0_UDB07_CTL EQU 0x40006477\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_CTL\r
-CYREG_B0_UDB08_CTL EQU 0x40006478\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_CTL\r
-CYREG_B0_UDB09_CTL EQU 0x40006479\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_CTL\r
-CYREG_B0_UDB10_CTL EQU 0x4000647a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_CTL\r
-CYREG_B0_UDB11_CTL EQU 0x4000647b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_CTL\r
-CYREG_B0_UDB12_CTL EQU 0x4000647c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_CTL\r
-CYREG_B0_UDB13_CTL EQU 0x4000647d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_CTL\r
-CYREG_B0_UDB14_CTL EQU 0x4000647e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_CTL\r
-CYREG_B0_UDB15_CTL EQU 0x4000647f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_MSK\r
-CYREG_B0_UDB00_MSK EQU 0x40006480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_MSK\r
-CYREG_B0_UDB01_MSK EQU 0x40006481\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_MSK\r
-CYREG_B0_UDB02_MSK EQU 0x40006482\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_MSK\r
-CYREG_B0_UDB03_MSK EQU 0x40006483\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_MSK\r
-CYREG_B0_UDB04_MSK EQU 0x40006484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_MSK\r
-CYREG_B0_UDB05_MSK EQU 0x40006485\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_MSK\r
-CYREG_B0_UDB06_MSK EQU 0x40006486\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_MSK\r
-CYREG_B0_UDB07_MSK EQU 0x40006487\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_MSK\r
-CYREG_B0_UDB08_MSK EQU 0x40006488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_MSK\r
-CYREG_B0_UDB09_MSK EQU 0x40006489\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_MSK\r
-CYREG_B0_UDB10_MSK EQU 0x4000648a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_MSK\r
-CYREG_B0_UDB11_MSK EQU 0x4000648b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_MSK\r
-CYREG_B0_UDB12_MSK EQU 0x4000648c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_MSK\r
-CYREG_B0_UDB13_MSK EQU 0x4000648d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_MSK\r
-CYREG_B0_UDB14_MSK EQU 0x4000648e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_MSK\r
-CYREG_B0_UDB15_MSK EQU 0x4000648f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_ACTL\r
-CYREG_B0_UDB00_ACTL EQU 0x40006490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_ACTL\r
-CYREG_B0_UDB01_ACTL EQU 0x40006491\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_ACTL\r
-CYREG_B0_UDB02_ACTL EQU 0x40006492\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_ACTL\r
-CYREG_B0_UDB03_ACTL EQU 0x40006493\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_ACTL\r
-CYREG_B0_UDB04_ACTL EQU 0x40006494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_ACTL\r
-CYREG_B0_UDB05_ACTL EQU 0x40006495\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_ACTL\r
-CYREG_B0_UDB06_ACTL EQU 0x40006496\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_ACTL\r
-CYREG_B0_UDB07_ACTL EQU 0x40006497\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_ACTL\r
-CYREG_B0_UDB08_ACTL EQU 0x40006498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_ACTL\r
-CYREG_B0_UDB09_ACTL EQU 0x40006499\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_ACTL\r
-CYREG_B0_UDB10_ACTL EQU 0x4000649a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_ACTL\r
-CYREG_B0_UDB11_ACTL EQU 0x4000649b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_ACTL\r
-CYREG_B0_UDB12_ACTL EQU 0x4000649c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_ACTL\r
-CYREG_B0_UDB13_ACTL EQU 0x4000649d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_ACTL\r
-CYREG_B0_UDB14_ACTL EQU 0x4000649e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_ACTL\r
-CYREG_B0_UDB15_ACTL EQU 0x4000649f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_MC\r
-CYREG_B0_UDB00_MC EQU 0x400064a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_MC\r
-CYREG_B0_UDB01_MC EQU 0x400064a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_MC\r
-CYREG_B0_UDB02_MC EQU 0x400064a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_MC\r
-CYREG_B0_UDB03_MC EQU 0x400064a3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_MC\r
-CYREG_B0_UDB04_MC EQU 0x400064a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_MC\r
-CYREG_B0_UDB05_MC EQU 0x400064a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_MC\r
-CYREG_B0_UDB06_MC EQU 0x400064a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_MC\r
-CYREG_B0_UDB07_MC EQU 0x400064a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_MC\r
-CYREG_B0_UDB08_MC EQU 0x400064a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_MC\r
-CYREG_B0_UDB09_MC EQU 0x400064a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_MC\r
-CYREG_B0_UDB10_MC EQU 0x400064aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_MC\r
-CYREG_B0_UDB11_MC EQU 0x400064ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_MC\r
-CYREG_B0_UDB12_MC EQU 0x400064ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_MC\r
-CYREG_B0_UDB13_MC EQU 0x400064ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_MC\r
-CYREG_B0_UDB14_MC EQU 0x400064ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_MC\r
-CYREG_B0_UDB15_MC EQU 0x400064af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_BASE\r
-CYDEV_UWRK_UWRK8_B1_BASE EQU 0x40006500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK8_B1_SIZE\r
-CYDEV_UWRK_UWRK8_B1_SIZE EQU 0x000000b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_A0\r
-CYREG_B1_UDB04_A0 EQU 0x40006504\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_A0\r
-CYREG_B1_UDB05_A0 EQU 0x40006505\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_A0\r
-CYREG_B1_UDB06_A0 EQU 0x40006506\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_A0\r
-CYREG_B1_UDB07_A0 EQU 0x40006507\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_A0\r
-CYREG_B1_UDB08_A0 EQU 0x40006508\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_A0\r
-CYREG_B1_UDB09_A0 EQU 0x40006509\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_A0\r
-CYREG_B1_UDB10_A0 EQU 0x4000650a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_A0\r
-CYREG_B1_UDB11_A0 EQU 0x4000650b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_A1\r
-CYREG_B1_UDB04_A1 EQU 0x40006514\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_A1\r
-CYREG_B1_UDB05_A1 EQU 0x40006515\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_A1\r
-CYREG_B1_UDB06_A1 EQU 0x40006516\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_A1\r
-CYREG_B1_UDB07_A1 EQU 0x40006517\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_A1\r
-CYREG_B1_UDB08_A1 EQU 0x40006518\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_A1\r
-CYREG_B1_UDB09_A1 EQU 0x40006519\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_A1\r
-CYREG_B1_UDB10_A1 EQU 0x4000651a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_A1\r
-CYREG_B1_UDB11_A1 EQU 0x4000651b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_D0\r
-CYREG_B1_UDB04_D0 EQU 0x40006524\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_D0\r
-CYREG_B1_UDB05_D0 EQU 0x40006525\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_D0\r
-CYREG_B1_UDB06_D0 EQU 0x40006526\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_D0\r
-CYREG_B1_UDB07_D0 EQU 0x40006527\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_D0\r
-CYREG_B1_UDB08_D0 EQU 0x40006528\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_D0\r
-CYREG_B1_UDB09_D0 EQU 0x40006529\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_D0\r
-CYREG_B1_UDB10_D0 EQU 0x4000652a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_D0\r
-CYREG_B1_UDB11_D0 EQU 0x4000652b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_D1\r
-CYREG_B1_UDB04_D1 EQU 0x40006534\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_D1\r
-CYREG_B1_UDB05_D1 EQU 0x40006535\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_D1\r
-CYREG_B1_UDB06_D1 EQU 0x40006536\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_D1\r
-CYREG_B1_UDB07_D1 EQU 0x40006537\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_D1\r
-CYREG_B1_UDB08_D1 EQU 0x40006538\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_D1\r
-CYREG_B1_UDB09_D1 EQU 0x40006539\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_D1\r
-CYREG_B1_UDB10_D1 EQU 0x4000653a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_D1\r
-CYREG_B1_UDB11_D1 EQU 0x4000653b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_F0\r
-CYREG_B1_UDB04_F0 EQU 0x40006544\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_F0\r
-CYREG_B1_UDB05_F0 EQU 0x40006545\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_F0\r
-CYREG_B1_UDB06_F0 EQU 0x40006546\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_F0\r
-CYREG_B1_UDB07_F0 EQU 0x40006547\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_F0\r
-CYREG_B1_UDB08_F0 EQU 0x40006548\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_F0\r
-CYREG_B1_UDB09_F0 EQU 0x40006549\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_F0\r
-CYREG_B1_UDB10_F0 EQU 0x4000654a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_F0\r
-CYREG_B1_UDB11_F0 EQU 0x4000654b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_F1\r
-CYREG_B1_UDB04_F1 EQU 0x40006554\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_F1\r
-CYREG_B1_UDB05_F1 EQU 0x40006555\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_F1\r
-CYREG_B1_UDB06_F1 EQU 0x40006556\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_F1\r
-CYREG_B1_UDB07_F1 EQU 0x40006557\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_F1\r
-CYREG_B1_UDB08_F1 EQU 0x40006558\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_F1\r
-CYREG_B1_UDB09_F1 EQU 0x40006559\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_F1\r
-CYREG_B1_UDB10_F1 EQU 0x4000655a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_F1\r
-CYREG_B1_UDB11_F1 EQU 0x4000655b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_ST\r
-CYREG_B1_UDB04_ST EQU 0x40006564\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_ST\r
-CYREG_B1_UDB05_ST EQU 0x40006565\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_ST\r
-CYREG_B1_UDB06_ST EQU 0x40006566\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_ST\r
-CYREG_B1_UDB07_ST EQU 0x40006567\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_ST\r
-CYREG_B1_UDB08_ST EQU 0x40006568\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_ST\r
-CYREG_B1_UDB09_ST EQU 0x40006569\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_ST\r
-CYREG_B1_UDB10_ST EQU 0x4000656a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_ST\r
-CYREG_B1_UDB11_ST EQU 0x4000656b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_CTL\r
-CYREG_B1_UDB04_CTL EQU 0x40006574\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_CTL\r
-CYREG_B1_UDB05_CTL EQU 0x40006575\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_CTL\r
-CYREG_B1_UDB06_CTL EQU 0x40006576\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_CTL\r
-CYREG_B1_UDB07_CTL EQU 0x40006577\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_CTL\r
-CYREG_B1_UDB08_CTL EQU 0x40006578\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_CTL\r
-CYREG_B1_UDB09_CTL EQU 0x40006579\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_CTL\r
-CYREG_B1_UDB10_CTL EQU 0x4000657a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_CTL\r
-CYREG_B1_UDB11_CTL EQU 0x4000657b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_MSK\r
-CYREG_B1_UDB04_MSK EQU 0x40006584\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_MSK\r
-CYREG_B1_UDB05_MSK EQU 0x40006585\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_MSK\r
-CYREG_B1_UDB06_MSK EQU 0x40006586\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_MSK\r
-CYREG_B1_UDB07_MSK EQU 0x40006587\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_MSK\r
-CYREG_B1_UDB08_MSK EQU 0x40006588\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_MSK\r
-CYREG_B1_UDB09_MSK EQU 0x40006589\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_MSK\r
-CYREG_B1_UDB10_MSK EQU 0x4000658a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_MSK\r
-CYREG_B1_UDB11_MSK EQU 0x4000658b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_ACTL\r
-CYREG_B1_UDB04_ACTL EQU 0x40006594\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_ACTL\r
-CYREG_B1_UDB05_ACTL EQU 0x40006595\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_ACTL\r
-CYREG_B1_UDB06_ACTL EQU 0x40006596\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_ACTL\r
-CYREG_B1_UDB07_ACTL EQU 0x40006597\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_ACTL\r
-CYREG_B1_UDB08_ACTL EQU 0x40006598\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_ACTL\r
-CYREG_B1_UDB09_ACTL EQU 0x40006599\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_ACTL\r
-CYREG_B1_UDB10_ACTL EQU 0x4000659a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_ACTL\r
-CYREG_B1_UDB11_ACTL EQU 0x4000659b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_MC\r
-CYREG_B1_UDB04_MC EQU 0x400065a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_MC\r
-CYREG_B1_UDB05_MC EQU 0x400065a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_MC\r
-CYREG_B1_UDB06_MC EQU 0x400065a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_MC\r
-CYREG_B1_UDB07_MC EQU 0x400065a7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_MC\r
-CYREG_B1_UDB08_MC EQU 0x400065a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_MC\r
-CYREG_B1_UDB09_MC EQU 0x400065a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_MC\r
-CYREG_B1_UDB10_MC EQU 0x400065aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_MC\r
-CYREG_B1_UDB11_MC EQU 0x400065ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_BASE\r
-CYDEV_UWRK_UWRK16_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_SIZE\r
-CYDEV_UWRK_UWRK16_SIZE EQU 0x00000760\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_BASE\r
-CYDEV_UWRK_UWRK16_CAT_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_SIZE EQU 0x00000760\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_BASE\r
-CYDEV_UWRK_UWRK16_CAT_B0_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B0_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_B0_SIZE EQU 0x00000160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_A0_A1\r
-CYREG_B0_UDB00_A0_A1 EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_A0_A1\r
-CYREG_B0_UDB01_A0_A1 EQU 0x40006802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_A0_A1\r
-CYREG_B0_UDB02_A0_A1 EQU 0x40006804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_A0_A1\r
-CYREG_B0_UDB03_A0_A1 EQU 0x40006806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_A0_A1\r
-CYREG_B0_UDB04_A0_A1 EQU 0x40006808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_A0_A1\r
-CYREG_B0_UDB05_A0_A1 EQU 0x4000680a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_A0_A1\r
-CYREG_B0_UDB06_A0_A1 EQU 0x4000680c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_A0_A1\r
-CYREG_B0_UDB07_A0_A1 EQU 0x4000680e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_A0_A1\r
-CYREG_B0_UDB08_A0_A1 EQU 0x40006810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_A0_A1\r
-CYREG_B0_UDB09_A0_A1 EQU 0x40006812\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_A0_A1\r
-CYREG_B0_UDB10_A0_A1 EQU 0x40006814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_A0_A1\r
-CYREG_B0_UDB11_A0_A1 EQU 0x40006816\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_A0_A1\r
-CYREG_B0_UDB12_A0_A1 EQU 0x40006818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_A0_A1\r
-CYREG_B0_UDB13_A0_A1 EQU 0x4000681a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_A0_A1\r
-CYREG_B0_UDB14_A0_A1 EQU 0x4000681c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_A0_A1\r
-CYREG_B0_UDB15_A0_A1 EQU 0x4000681e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_D0_D1\r
-CYREG_B0_UDB00_D0_D1 EQU 0x40006840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_D0_D1\r
-CYREG_B0_UDB01_D0_D1 EQU 0x40006842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_D0_D1\r
-CYREG_B0_UDB02_D0_D1 EQU 0x40006844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_D0_D1\r
-CYREG_B0_UDB03_D0_D1 EQU 0x40006846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_D0_D1\r
-CYREG_B0_UDB04_D0_D1 EQU 0x40006848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_D0_D1\r
-CYREG_B0_UDB05_D0_D1 EQU 0x4000684a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_D0_D1\r
-CYREG_B0_UDB06_D0_D1 EQU 0x4000684c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_D0_D1\r
-CYREG_B0_UDB07_D0_D1 EQU 0x4000684e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_D0_D1\r
-CYREG_B0_UDB08_D0_D1 EQU 0x40006850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_D0_D1\r
-CYREG_B0_UDB09_D0_D1 EQU 0x40006852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_D0_D1\r
-CYREG_B0_UDB10_D0_D1 EQU 0x40006854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_D0_D1\r
-CYREG_B0_UDB11_D0_D1 EQU 0x40006856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_D0_D1\r
-CYREG_B0_UDB12_D0_D1 EQU 0x40006858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_D0_D1\r
-CYREG_B0_UDB13_D0_D1 EQU 0x4000685a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_D0_D1\r
-CYREG_B0_UDB14_D0_D1 EQU 0x4000685c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_D0_D1\r
-CYREG_B0_UDB15_D0_D1 EQU 0x4000685e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_F0_F1\r
-CYREG_B0_UDB00_F0_F1 EQU 0x40006880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_F0_F1\r
-CYREG_B0_UDB01_F0_F1 EQU 0x40006882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_F0_F1\r
-CYREG_B0_UDB02_F0_F1 EQU 0x40006884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_F0_F1\r
-CYREG_B0_UDB03_F0_F1 EQU 0x40006886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_F0_F1\r
-CYREG_B0_UDB04_F0_F1 EQU 0x40006888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_F0_F1\r
-CYREG_B0_UDB05_F0_F1 EQU 0x4000688a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_F0_F1\r
-CYREG_B0_UDB06_F0_F1 EQU 0x4000688c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_F0_F1\r
-CYREG_B0_UDB07_F0_F1 EQU 0x4000688e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_F0_F1\r
-CYREG_B0_UDB08_F0_F1 EQU 0x40006890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_F0_F1\r
-CYREG_B0_UDB09_F0_F1 EQU 0x40006892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_F0_F1\r
-CYREG_B0_UDB10_F0_F1 EQU 0x40006894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_F0_F1\r
-CYREG_B0_UDB11_F0_F1 EQU 0x40006896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_F0_F1\r
-CYREG_B0_UDB12_F0_F1 EQU 0x40006898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_F0_F1\r
-CYREG_B0_UDB13_F0_F1 EQU 0x4000689a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_F0_F1\r
-CYREG_B0_UDB14_F0_F1 EQU 0x4000689c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_F0_F1\r
-CYREG_B0_UDB15_F0_F1 EQU 0x4000689e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_ST_CTL\r
-CYREG_B0_UDB00_ST_CTL EQU 0x400068c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_ST_CTL\r
-CYREG_B0_UDB01_ST_CTL EQU 0x400068c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_ST_CTL\r
-CYREG_B0_UDB02_ST_CTL EQU 0x400068c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_ST_CTL\r
-CYREG_B0_UDB03_ST_CTL EQU 0x400068c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_ST_CTL\r
-CYREG_B0_UDB04_ST_CTL EQU 0x400068c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_ST_CTL\r
-CYREG_B0_UDB05_ST_CTL EQU 0x400068ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_ST_CTL\r
-CYREG_B0_UDB06_ST_CTL EQU 0x400068cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_ST_CTL\r
-CYREG_B0_UDB07_ST_CTL EQU 0x400068ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_ST_CTL\r
-CYREG_B0_UDB08_ST_CTL EQU 0x400068d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_ST_CTL\r
-CYREG_B0_UDB09_ST_CTL EQU 0x400068d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_ST_CTL\r
-CYREG_B0_UDB10_ST_CTL EQU 0x400068d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_ST_CTL\r
-CYREG_B0_UDB11_ST_CTL EQU 0x400068d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_ST_CTL\r
-CYREG_B0_UDB12_ST_CTL EQU 0x400068d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_ST_CTL\r
-CYREG_B0_UDB13_ST_CTL EQU 0x400068da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_ST_CTL\r
-CYREG_B0_UDB14_ST_CTL EQU 0x400068dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_ST_CTL\r
-CYREG_B0_UDB15_ST_CTL EQU 0x400068de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_MSK_ACTL\r
-CYREG_B0_UDB00_MSK_ACTL EQU 0x40006900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_MSK_ACTL\r
-CYREG_B0_UDB01_MSK_ACTL EQU 0x40006902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_MSK_ACTL\r
-CYREG_B0_UDB02_MSK_ACTL EQU 0x40006904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_MSK_ACTL\r
-CYREG_B0_UDB03_MSK_ACTL EQU 0x40006906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_MSK_ACTL\r
-CYREG_B0_UDB04_MSK_ACTL EQU 0x40006908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_MSK_ACTL\r
-CYREG_B0_UDB05_MSK_ACTL EQU 0x4000690a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_MSK_ACTL\r
-CYREG_B0_UDB06_MSK_ACTL EQU 0x4000690c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_MSK_ACTL\r
-CYREG_B0_UDB07_MSK_ACTL EQU 0x4000690e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_MSK_ACTL\r
-CYREG_B0_UDB08_MSK_ACTL EQU 0x40006910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_MSK_ACTL\r
-CYREG_B0_UDB09_MSK_ACTL EQU 0x40006912\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_MSK_ACTL\r
-CYREG_B0_UDB10_MSK_ACTL EQU 0x40006914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_MSK_ACTL\r
-CYREG_B0_UDB11_MSK_ACTL EQU 0x40006916\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_MSK_ACTL\r
-CYREG_B0_UDB12_MSK_ACTL EQU 0x40006918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_MSK_ACTL\r
-CYREG_B0_UDB13_MSK_ACTL EQU 0x4000691a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_MSK_ACTL\r
-CYREG_B0_UDB14_MSK_ACTL EQU 0x4000691c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_MSK_ACTL\r
-CYREG_B0_UDB15_MSK_ACTL EQU 0x4000691e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_MC_00\r
-CYREG_B0_UDB00_MC_00 EQU 0x40006940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_MC_00\r
-CYREG_B0_UDB01_MC_00 EQU 0x40006942\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_MC_00\r
-CYREG_B0_UDB02_MC_00 EQU 0x40006944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_MC_00\r
-CYREG_B0_UDB03_MC_00 EQU 0x40006946\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_MC_00\r
-CYREG_B0_UDB04_MC_00 EQU 0x40006948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_MC_00\r
-CYREG_B0_UDB05_MC_00 EQU 0x4000694a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_MC_00\r
-CYREG_B0_UDB06_MC_00 EQU 0x4000694c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_MC_00\r
-CYREG_B0_UDB07_MC_00 EQU 0x4000694e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_MC_00\r
-CYREG_B0_UDB08_MC_00 EQU 0x40006950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_MC_00\r
-CYREG_B0_UDB09_MC_00 EQU 0x40006952\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_MC_00\r
-CYREG_B0_UDB10_MC_00 EQU 0x40006954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_MC_00\r
-CYREG_B0_UDB11_MC_00 EQU 0x40006956\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_MC_00\r
-CYREG_B0_UDB12_MC_00 EQU 0x40006958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_MC_00\r
-CYREG_B0_UDB13_MC_00 EQU 0x4000695a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_MC_00\r
-CYREG_B0_UDB14_MC_00 EQU 0x4000695c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB15_MC_00\r
-CYREG_B0_UDB15_MC_00 EQU 0x4000695e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_BASE\r
-CYDEV_UWRK_UWRK16_CAT_B1_BASE EQU 0x40006a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_CAT_B1_SIZE\r
-CYDEV_UWRK_UWRK16_CAT_B1_SIZE EQU 0x00000160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_A0_A1\r
-CYREG_B1_UDB04_A0_A1 EQU 0x40006a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_A0_A1\r
-CYREG_B1_UDB05_A0_A1 EQU 0x40006a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_A0_A1\r
-CYREG_B1_UDB06_A0_A1 EQU 0x40006a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_A0_A1\r
-CYREG_B1_UDB07_A0_A1 EQU 0x40006a0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_A0_A1\r
-CYREG_B1_UDB08_A0_A1 EQU 0x40006a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_A0_A1\r
-CYREG_B1_UDB09_A0_A1 EQU 0x40006a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_A0_A1\r
-CYREG_B1_UDB10_A0_A1 EQU 0x40006a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_A0_A1\r
-CYREG_B1_UDB11_A0_A1 EQU 0x40006a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_D0_D1\r
-CYREG_B1_UDB04_D0_D1 EQU 0x40006a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_D0_D1\r
-CYREG_B1_UDB05_D0_D1 EQU 0x40006a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_D0_D1\r
-CYREG_B1_UDB06_D0_D1 EQU 0x40006a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_D0_D1\r
-CYREG_B1_UDB07_D0_D1 EQU 0x40006a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_D0_D1\r
-CYREG_B1_UDB08_D0_D1 EQU 0x40006a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_D0_D1\r
-CYREG_B1_UDB09_D0_D1 EQU 0x40006a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_D0_D1\r
-CYREG_B1_UDB10_D0_D1 EQU 0x40006a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_D0_D1\r
-CYREG_B1_UDB11_D0_D1 EQU 0x40006a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_F0_F1\r
-CYREG_B1_UDB04_F0_F1 EQU 0x40006a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_F0_F1\r
-CYREG_B1_UDB05_F0_F1 EQU 0x40006a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_F0_F1\r
-CYREG_B1_UDB06_F0_F1 EQU 0x40006a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_F0_F1\r
-CYREG_B1_UDB07_F0_F1 EQU 0x40006a8e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_F0_F1\r
-CYREG_B1_UDB08_F0_F1 EQU 0x40006a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_F0_F1\r
-CYREG_B1_UDB09_F0_F1 EQU 0x40006a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_F0_F1\r
-CYREG_B1_UDB10_F0_F1 EQU 0x40006a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_F0_F1\r
-CYREG_B1_UDB11_F0_F1 EQU 0x40006a96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_ST_CTL\r
-CYREG_B1_UDB04_ST_CTL EQU 0x40006ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_ST_CTL\r
-CYREG_B1_UDB05_ST_CTL EQU 0x40006aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_ST_CTL\r
-CYREG_B1_UDB06_ST_CTL EQU 0x40006acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_ST_CTL\r
-CYREG_B1_UDB07_ST_CTL EQU 0x40006ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_ST_CTL\r
-CYREG_B1_UDB08_ST_CTL EQU 0x40006ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_ST_CTL\r
-CYREG_B1_UDB09_ST_CTL EQU 0x40006ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_ST_CTL\r
-CYREG_B1_UDB10_ST_CTL EQU 0x40006ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_ST_CTL\r
-CYREG_B1_UDB11_ST_CTL EQU 0x40006ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_MSK_ACTL\r
-CYREG_B1_UDB04_MSK_ACTL EQU 0x40006b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_MSK_ACTL\r
-CYREG_B1_UDB05_MSK_ACTL EQU 0x40006b0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_MSK_ACTL\r
-CYREG_B1_UDB06_MSK_ACTL EQU 0x40006b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_MSK_ACTL\r
-CYREG_B1_UDB07_MSK_ACTL EQU 0x40006b0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_MSK_ACTL\r
-CYREG_B1_UDB08_MSK_ACTL EQU 0x40006b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_MSK_ACTL\r
-CYREG_B1_UDB09_MSK_ACTL EQU 0x40006b12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_MSK_ACTL\r
-CYREG_B1_UDB10_MSK_ACTL EQU 0x40006b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_MSK_ACTL\r
-CYREG_B1_UDB11_MSK_ACTL EQU 0x40006b16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_MC_00\r
-CYREG_B1_UDB04_MC_00 EQU 0x40006b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_MC_00\r
-CYREG_B1_UDB05_MC_00 EQU 0x40006b4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_MC_00\r
-CYREG_B1_UDB06_MC_00 EQU 0x40006b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_MC_00\r
-CYREG_B1_UDB07_MC_00 EQU 0x40006b4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_MC_00\r
-CYREG_B1_UDB08_MC_00 EQU 0x40006b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_MC_00\r
-CYREG_B1_UDB09_MC_00 EQU 0x40006b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_MC_00\r
-CYREG_B1_UDB10_MC_00 EQU 0x40006b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_MC_00\r
-CYREG_B1_UDB11_MC_00 EQU 0x40006b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_BASE\r
-CYDEV_UWRK_UWRK16_DEF_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_SIZE EQU 0x0000075e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_BASE\r
-CYDEV_UWRK_UWRK16_DEF_B0_BASE EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B0_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_B0_SIZE EQU 0x0000015e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_A0\r
-CYREG_B0_UDB00_01_A0 EQU 0x40006800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_A0\r
-CYREG_B0_UDB01_02_A0 EQU 0x40006802\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_A0\r
-CYREG_B0_UDB02_03_A0 EQU 0x40006804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_A0\r
-CYREG_B0_UDB03_04_A0 EQU 0x40006806\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_A0\r
-CYREG_B0_UDB04_05_A0 EQU 0x40006808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_A0\r
-CYREG_B0_UDB05_06_A0 EQU 0x4000680a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_A0\r
-CYREG_B0_UDB06_07_A0 EQU 0x4000680c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_A0\r
-CYREG_B0_UDB07_08_A0 EQU 0x4000680e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_A0\r
-CYREG_B0_UDB08_09_A0 EQU 0x40006810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_A0\r
-CYREG_B0_UDB09_10_A0 EQU 0x40006812\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_A0\r
-CYREG_B0_UDB10_11_A0 EQU 0x40006814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_A0\r
-CYREG_B0_UDB11_12_A0 EQU 0x40006816\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_A0\r
-CYREG_B0_UDB12_13_A0 EQU 0x40006818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_A0\r
-CYREG_B0_UDB13_14_A0 EQU 0x4000681a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_A0\r
-CYREG_B0_UDB14_15_A0 EQU 0x4000681c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_A1\r
-CYREG_B0_UDB00_01_A1 EQU 0x40006820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_A1\r
-CYREG_B0_UDB01_02_A1 EQU 0x40006822\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_A1\r
-CYREG_B0_UDB02_03_A1 EQU 0x40006824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_A1\r
-CYREG_B0_UDB03_04_A1 EQU 0x40006826\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_A1\r
-CYREG_B0_UDB04_05_A1 EQU 0x40006828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_A1\r
-CYREG_B0_UDB05_06_A1 EQU 0x4000682a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_A1\r
-CYREG_B0_UDB06_07_A1 EQU 0x4000682c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_A1\r
-CYREG_B0_UDB07_08_A1 EQU 0x4000682e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_A1\r
-CYREG_B0_UDB08_09_A1 EQU 0x40006830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_A1\r
-CYREG_B0_UDB09_10_A1 EQU 0x40006832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_A1\r
-CYREG_B0_UDB10_11_A1 EQU 0x40006834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_A1\r
-CYREG_B0_UDB11_12_A1 EQU 0x40006836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_A1\r
-CYREG_B0_UDB12_13_A1 EQU 0x40006838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_A1\r
-CYREG_B0_UDB13_14_A1 EQU 0x4000683a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_A1\r
-CYREG_B0_UDB14_15_A1 EQU 0x4000683c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_D0\r
-CYREG_B0_UDB00_01_D0 EQU 0x40006840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_D0\r
-CYREG_B0_UDB01_02_D0 EQU 0x40006842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_D0\r
-CYREG_B0_UDB02_03_D0 EQU 0x40006844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_D0\r
-CYREG_B0_UDB03_04_D0 EQU 0x40006846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_D0\r
-CYREG_B0_UDB04_05_D0 EQU 0x40006848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_D0\r
-CYREG_B0_UDB05_06_D0 EQU 0x4000684a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_D0\r
-CYREG_B0_UDB06_07_D0 EQU 0x4000684c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_D0\r
-CYREG_B0_UDB07_08_D0 EQU 0x4000684e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_D0\r
-CYREG_B0_UDB08_09_D0 EQU 0x40006850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_D0\r
-CYREG_B0_UDB09_10_D0 EQU 0x40006852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_D0\r
-CYREG_B0_UDB10_11_D0 EQU 0x40006854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_D0\r
-CYREG_B0_UDB11_12_D0 EQU 0x40006856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_D0\r
-CYREG_B0_UDB12_13_D0 EQU 0x40006858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_D0\r
-CYREG_B0_UDB13_14_D0 EQU 0x4000685a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_D0\r
-CYREG_B0_UDB14_15_D0 EQU 0x4000685c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_D1\r
-CYREG_B0_UDB00_01_D1 EQU 0x40006860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_D1\r
-CYREG_B0_UDB01_02_D1 EQU 0x40006862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_D1\r
-CYREG_B0_UDB02_03_D1 EQU 0x40006864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_D1\r
-CYREG_B0_UDB03_04_D1 EQU 0x40006866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_D1\r
-CYREG_B0_UDB04_05_D1 EQU 0x40006868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_D1\r
-CYREG_B0_UDB05_06_D1 EQU 0x4000686a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_D1\r
-CYREG_B0_UDB06_07_D1 EQU 0x4000686c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_D1\r
-CYREG_B0_UDB07_08_D1 EQU 0x4000686e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_D1\r
-CYREG_B0_UDB08_09_D1 EQU 0x40006870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_D1\r
-CYREG_B0_UDB09_10_D1 EQU 0x40006872\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_D1\r
-CYREG_B0_UDB10_11_D1 EQU 0x40006874\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_D1\r
-CYREG_B0_UDB11_12_D1 EQU 0x40006876\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_D1\r
-CYREG_B0_UDB12_13_D1 EQU 0x40006878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_D1\r
-CYREG_B0_UDB13_14_D1 EQU 0x4000687a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_D1\r
-CYREG_B0_UDB14_15_D1 EQU 0x4000687c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_F0\r
-CYREG_B0_UDB00_01_F0 EQU 0x40006880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_F0\r
-CYREG_B0_UDB01_02_F0 EQU 0x40006882\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_F0\r
-CYREG_B0_UDB02_03_F0 EQU 0x40006884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_F0\r
-CYREG_B0_UDB03_04_F0 EQU 0x40006886\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_F0\r
-CYREG_B0_UDB04_05_F0 EQU 0x40006888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_F0\r
-CYREG_B0_UDB05_06_F0 EQU 0x4000688a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_F0\r
-CYREG_B0_UDB06_07_F0 EQU 0x4000688c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_F0\r
-CYREG_B0_UDB07_08_F0 EQU 0x4000688e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_F0\r
-CYREG_B0_UDB08_09_F0 EQU 0x40006890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_F0\r
-CYREG_B0_UDB09_10_F0 EQU 0x40006892\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_F0\r
-CYREG_B0_UDB10_11_F0 EQU 0x40006894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_F0\r
-CYREG_B0_UDB11_12_F0 EQU 0x40006896\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_F0\r
-CYREG_B0_UDB12_13_F0 EQU 0x40006898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_F0\r
-CYREG_B0_UDB13_14_F0 EQU 0x4000689a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_F0\r
-CYREG_B0_UDB14_15_F0 EQU 0x4000689c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_F1\r
-CYREG_B0_UDB00_01_F1 EQU 0x400068a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_F1\r
-CYREG_B0_UDB01_02_F1 EQU 0x400068a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_F1\r
-CYREG_B0_UDB02_03_F1 EQU 0x400068a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_F1\r
-CYREG_B0_UDB03_04_F1 EQU 0x400068a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_F1\r
-CYREG_B0_UDB04_05_F1 EQU 0x400068a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_F1\r
-CYREG_B0_UDB05_06_F1 EQU 0x400068aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_F1\r
-CYREG_B0_UDB06_07_F1 EQU 0x400068ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_F1\r
-CYREG_B0_UDB07_08_F1 EQU 0x400068ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_F1\r
-CYREG_B0_UDB08_09_F1 EQU 0x400068b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_F1\r
-CYREG_B0_UDB09_10_F1 EQU 0x400068b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_F1\r
-CYREG_B0_UDB10_11_F1 EQU 0x400068b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_F1\r
-CYREG_B0_UDB11_12_F1 EQU 0x400068b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_F1\r
-CYREG_B0_UDB12_13_F1 EQU 0x400068b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_F1\r
-CYREG_B0_UDB13_14_F1 EQU 0x400068ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_F1\r
-CYREG_B0_UDB14_15_F1 EQU 0x400068bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_ST\r
-CYREG_B0_UDB00_01_ST EQU 0x400068c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_ST\r
-CYREG_B0_UDB01_02_ST EQU 0x400068c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_ST\r
-CYREG_B0_UDB02_03_ST EQU 0x400068c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_ST\r
-CYREG_B0_UDB03_04_ST EQU 0x400068c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_ST\r
-CYREG_B0_UDB04_05_ST EQU 0x400068c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_ST\r
-CYREG_B0_UDB05_06_ST EQU 0x400068ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_ST\r
-CYREG_B0_UDB06_07_ST EQU 0x400068cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_ST\r
-CYREG_B0_UDB07_08_ST EQU 0x400068ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_ST\r
-CYREG_B0_UDB08_09_ST EQU 0x400068d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_ST\r
-CYREG_B0_UDB09_10_ST EQU 0x400068d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_ST\r
-CYREG_B0_UDB10_11_ST EQU 0x400068d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_ST\r
-CYREG_B0_UDB11_12_ST EQU 0x400068d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_ST\r
-CYREG_B0_UDB12_13_ST EQU 0x400068d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_ST\r
-CYREG_B0_UDB13_14_ST EQU 0x400068da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_ST\r
-CYREG_B0_UDB14_15_ST EQU 0x400068dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_CTL\r
-CYREG_B0_UDB00_01_CTL EQU 0x400068e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_CTL\r
-CYREG_B0_UDB01_02_CTL EQU 0x400068e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_CTL\r
-CYREG_B0_UDB02_03_CTL EQU 0x400068e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_CTL\r
-CYREG_B0_UDB03_04_CTL EQU 0x400068e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_CTL\r
-CYREG_B0_UDB04_05_CTL EQU 0x400068e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_CTL\r
-CYREG_B0_UDB05_06_CTL EQU 0x400068ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_CTL\r
-CYREG_B0_UDB06_07_CTL EQU 0x400068ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_CTL\r
-CYREG_B0_UDB07_08_CTL EQU 0x400068ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_CTL\r
-CYREG_B0_UDB08_09_CTL EQU 0x400068f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_CTL\r
-CYREG_B0_UDB09_10_CTL EQU 0x400068f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_CTL\r
-CYREG_B0_UDB10_11_CTL EQU 0x400068f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_CTL\r
-CYREG_B0_UDB11_12_CTL EQU 0x400068f6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_CTL\r
-CYREG_B0_UDB12_13_CTL EQU 0x400068f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_CTL\r
-CYREG_B0_UDB13_14_CTL EQU 0x400068fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_CTL\r
-CYREG_B0_UDB14_15_CTL EQU 0x400068fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_MSK\r
-CYREG_B0_UDB00_01_MSK EQU 0x40006900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_MSK\r
-CYREG_B0_UDB01_02_MSK EQU 0x40006902\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_MSK\r
-CYREG_B0_UDB02_03_MSK EQU 0x40006904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_MSK\r
-CYREG_B0_UDB03_04_MSK EQU 0x40006906\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_MSK\r
-CYREG_B0_UDB04_05_MSK EQU 0x40006908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_MSK\r
-CYREG_B0_UDB05_06_MSK EQU 0x4000690a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_MSK\r
-CYREG_B0_UDB06_07_MSK EQU 0x4000690c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_MSK\r
-CYREG_B0_UDB07_08_MSK EQU 0x4000690e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_MSK\r
-CYREG_B0_UDB08_09_MSK EQU 0x40006910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_MSK\r
-CYREG_B0_UDB09_10_MSK EQU 0x40006912\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_MSK\r
-CYREG_B0_UDB10_11_MSK EQU 0x40006914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_MSK\r
-CYREG_B0_UDB11_12_MSK EQU 0x40006916\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_MSK\r
-CYREG_B0_UDB12_13_MSK EQU 0x40006918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_MSK\r
-CYREG_B0_UDB13_14_MSK EQU 0x4000691a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_MSK\r
-CYREG_B0_UDB14_15_MSK EQU 0x4000691c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_ACTL\r
-CYREG_B0_UDB00_01_ACTL EQU 0x40006920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_ACTL\r
-CYREG_B0_UDB01_02_ACTL EQU 0x40006922\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_ACTL\r
-CYREG_B0_UDB02_03_ACTL EQU 0x40006924\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_ACTL\r
-CYREG_B0_UDB03_04_ACTL EQU 0x40006926\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_ACTL\r
-CYREG_B0_UDB04_05_ACTL EQU 0x40006928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_ACTL\r
-CYREG_B0_UDB05_06_ACTL EQU 0x4000692a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_ACTL\r
-CYREG_B0_UDB06_07_ACTL EQU 0x4000692c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_ACTL\r
-CYREG_B0_UDB07_08_ACTL EQU 0x4000692e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_ACTL\r
-CYREG_B0_UDB08_09_ACTL EQU 0x40006930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_ACTL\r
-CYREG_B0_UDB09_10_ACTL EQU 0x40006932\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_ACTL\r
-CYREG_B0_UDB10_11_ACTL EQU 0x40006934\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_ACTL\r
-CYREG_B0_UDB11_12_ACTL EQU 0x40006936\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_ACTL\r
-CYREG_B0_UDB12_13_ACTL EQU 0x40006938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_ACTL\r
-CYREG_B0_UDB13_14_ACTL EQU 0x4000693a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_ACTL\r
-CYREG_B0_UDB14_15_ACTL EQU 0x4000693c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB00_01_MC\r
-CYREG_B0_UDB00_01_MC EQU 0x40006940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB01_02_MC\r
-CYREG_B0_UDB01_02_MC EQU 0x40006942\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB02_03_MC\r
-CYREG_B0_UDB02_03_MC EQU 0x40006944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB03_04_MC\r
-CYREG_B0_UDB03_04_MC EQU 0x40006946\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB04_05_MC\r
-CYREG_B0_UDB04_05_MC EQU 0x40006948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB05_06_MC\r
-CYREG_B0_UDB05_06_MC EQU 0x4000694a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB06_07_MC\r
-CYREG_B0_UDB06_07_MC EQU 0x4000694c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB07_08_MC\r
-CYREG_B0_UDB07_08_MC EQU 0x4000694e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB08_09_MC\r
-CYREG_B0_UDB08_09_MC EQU 0x40006950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB09_10_MC\r
-CYREG_B0_UDB09_10_MC EQU 0x40006952\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB10_11_MC\r
-CYREG_B0_UDB10_11_MC EQU 0x40006954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB11_12_MC\r
-CYREG_B0_UDB11_12_MC EQU 0x40006956\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB12_13_MC\r
-CYREG_B0_UDB12_13_MC EQU 0x40006958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB13_14_MC\r
-CYREG_B0_UDB13_14_MC EQU 0x4000695a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_UDB14_15_MC\r
-CYREG_B0_UDB14_15_MC EQU 0x4000695c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_BASE\r
-CYDEV_UWRK_UWRK16_DEF_B1_BASE EQU 0x40006a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UWRK_UWRK16_DEF_B1_SIZE\r
-CYDEV_UWRK_UWRK16_DEF_B1_SIZE EQU 0x0000015e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_A0\r
-CYREG_B1_UDB04_05_A0 EQU 0x40006a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_A0\r
-CYREG_B1_UDB05_06_A0 EQU 0x40006a0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_A0\r
-CYREG_B1_UDB06_07_A0 EQU 0x40006a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_A0\r
-CYREG_B1_UDB07_08_A0 EQU 0x40006a0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_A0\r
-CYREG_B1_UDB08_09_A0 EQU 0x40006a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_A0\r
-CYREG_B1_UDB09_10_A0 EQU 0x40006a12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_A0\r
-CYREG_B1_UDB10_11_A0 EQU 0x40006a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_A0\r
-CYREG_B1_UDB11_12_A0 EQU 0x40006a16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_A1\r
-CYREG_B1_UDB04_05_A1 EQU 0x40006a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_A1\r
-CYREG_B1_UDB05_06_A1 EQU 0x40006a2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_A1\r
-CYREG_B1_UDB06_07_A1 EQU 0x40006a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_A1\r
-CYREG_B1_UDB07_08_A1 EQU 0x40006a2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_A1\r
-CYREG_B1_UDB08_09_A1 EQU 0x40006a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_A1\r
-CYREG_B1_UDB09_10_A1 EQU 0x40006a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_A1\r
-CYREG_B1_UDB10_11_A1 EQU 0x40006a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_A1\r
-CYREG_B1_UDB11_12_A1 EQU 0x40006a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_D0\r
-CYREG_B1_UDB04_05_D0 EQU 0x40006a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_D0\r
-CYREG_B1_UDB05_06_D0 EQU 0x40006a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_D0\r
-CYREG_B1_UDB06_07_D0 EQU 0x40006a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_D0\r
-CYREG_B1_UDB07_08_D0 EQU 0x40006a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_D0\r
-CYREG_B1_UDB08_09_D0 EQU 0x40006a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_D0\r
-CYREG_B1_UDB09_10_D0 EQU 0x40006a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_D0\r
-CYREG_B1_UDB10_11_D0 EQU 0x40006a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_D0\r
-CYREG_B1_UDB11_12_D0 EQU 0x40006a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_D1\r
-CYREG_B1_UDB04_05_D1 EQU 0x40006a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_D1\r
-CYREG_B1_UDB05_06_D1 EQU 0x40006a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_D1\r
-CYREG_B1_UDB06_07_D1 EQU 0x40006a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_D1\r
-CYREG_B1_UDB07_08_D1 EQU 0x40006a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_D1\r
-CYREG_B1_UDB08_09_D1 EQU 0x40006a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_D1\r
-CYREG_B1_UDB09_10_D1 EQU 0x40006a72\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_D1\r
-CYREG_B1_UDB10_11_D1 EQU 0x40006a74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_D1\r
-CYREG_B1_UDB11_12_D1 EQU 0x40006a76\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_F0\r
-CYREG_B1_UDB04_05_F0 EQU 0x40006a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_F0\r
-CYREG_B1_UDB05_06_F0 EQU 0x40006a8a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_F0\r
-CYREG_B1_UDB06_07_F0 EQU 0x40006a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_F0\r
-CYREG_B1_UDB07_08_F0 EQU 0x40006a8e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_F0\r
-CYREG_B1_UDB08_09_F0 EQU 0x40006a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_F0\r
-CYREG_B1_UDB09_10_F0 EQU 0x40006a92\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_F0\r
-CYREG_B1_UDB10_11_F0 EQU 0x40006a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_F0\r
-CYREG_B1_UDB11_12_F0 EQU 0x40006a96\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_F1\r
-CYREG_B1_UDB04_05_F1 EQU 0x40006aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_F1\r
-CYREG_B1_UDB05_06_F1 EQU 0x40006aaa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_F1\r
-CYREG_B1_UDB06_07_F1 EQU 0x40006aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_F1\r
-CYREG_B1_UDB07_08_F1 EQU 0x40006aae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_F1\r
-CYREG_B1_UDB08_09_F1 EQU 0x40006ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_F1\r
-CYREG_B1_UDB09_10_F1 EQU 0x40006ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_F1\r
-CYREG_B1_UDB10_11_F1 EQU 0x40006ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_F1\r
-CYREG_B1_UDB11_12_F1 EQU 0x40006ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_ST\r
-CYREG_B1_UDB04_05_ST EQU 0x40006ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_ST\r
-CYREG_B1_UDB05_06_ST EQU 0x40006aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_ST\r
-CYREG_B1_UDB06_07_ST EQU 0x40006acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_ST\r
-CYREG_B1_UDB07_08_ST EQU 0x40006ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_ST\r
-CYREG_B1_UDB08_09_ST EQU 0x40006ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_ST\r
-CYREG_B1_UDB09_10_ST EQU 0x40006ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_ST\r
-CYREG_B1_UDB10_11_ST EQU 0x40006ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_ST\r
-CYREG_B1_UDB11_12_ST EQU 0x40006ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_CTL\r
-CYREG_B1_UDB04_05_CTL EQU 0x40006ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_CTL\r
-CYREG_B1_UDB05_06_CTL EQU 0x40006aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_CTL\r
-CYREG_B1_UDB06_07_CTL EQU 0x40006aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_CTL\r
-CYREG_B1_UDB07_08_CTL EQU 0x40006aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_CTL\r
-CYREG_B1_UDB08_09_CTL EQU 0x40006af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_CTL\r
-CYREG_B1_UDB09_10_CTL EQU 0x40006af2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_CTL\r
-CYREG_B1_UDB10_11_CTL EQU 0x40006af4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_CTL\r
-CYREG_B1_UDB11_12_CTL EQU 0x40006af6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_MSK\r
-CYREG_B1_UDB04_05_MSK EQU 0x40006b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_MSK\r
-CYREG_B1_UDB05_06_MSK EQU 0x40006b0a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_MSK\r
-CYREG_B1_UDB06_07_MSK EQU 0x40006b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_MSK\r
-CYREG_B1_UDB07_08_MSK EQU 0x40006b0e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_MSK\r
-CYREG_B1_UDB08_09_MSK EQU 0x40006b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_MSK\r
-CYREG_B1_UDB09_10_MSK EQU 0x40006b12\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_MSK\r
-CYREG_B1_UDB10_11_MSK EQU 0x40006b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_MSK\r
-CYREG_B1_UDB11_12_MSK EQU 0x40006b16\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_ACTL\r
-CYREG_B1_UDB04_05_ACTL EQU 0x40006b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_ACTL\r
-CYREG_B1_UDB05_06_ACTL EQU 0x40006b2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_ACTL\r
-CYREG_B1_UDB06_07_ACTL EQU 0x40006b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_ACTL\r
-CYREG_B1_UDB07_08_ACTL EQU 0x40006b2e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_ACTL\r
-CYREG_B1_UDB08_09_ACTL EQU 0x40006b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_ACTL\r
-CYREG_B1_UDB09_10_ACTL EQU 0x40006b32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_ACTL\r
-CYREG_B1_UDB10_11_ACTL EQU 0x40006b34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_ACTL\r
-CYREG_B1_UDB11_12_ACTL EQU 0x40006b36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB04_05_MC\r
-CYREG_B1_UDB04_05_MC EQU 0x40006b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB05_06_MC\r
-CYREG_B1_UDB05_06_MC EQU 0x40006b4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB06_07_MC\r
-CYREG_B1_UDB06_07_MC EQU 0x40006b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB07_08_MC\r
-CYREG_B1_UDB07_08_MC EQU 0x40006b4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB08_09_MC\r
-CYREG_B1_UDB08_09_MC EQU 0x40006b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB09_10_MC\r
-CYREG_B1_UDB09_10_MC EQU 0x40006b52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB10_11_MC\r
-CYREG_B1_UDB10_11_MC EQU 0x40006b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_UDB11_12_MC\r
-CYREG_B1_UDB11_12_MC EQU 0x40006b56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_BASE\r
-CYDEV_PHUB_BASE EQU 0x40007000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_SIZE\r
-CYDEV_PHUB_SIZE EQU 0x00000c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFG\r
-CYREG_PHUB_CFG EQU 0x40007000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_ERR\r
-CYREG_PHUB_ERR EQU 0x40007004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_ERR_ADR\r
-CYREG_PHUB_ERR_ADR EQU 0x40007008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_BASE\r
-CYDEV_PHUB_CH0_BASE EQU 0x40007010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH0_SIZE\r
-CYDEV_PHUB_CH0_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH0_BASIC_CFG\r
-CYREG_PHUB_CH0_BASIC_CFG EQU 0x40007010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH0_ACTION\r
-CYREG_PHUB_CH0_ACTION EQU 0x40007014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH0_BASIC_STATUS\r
-CYREG_PHUB_CH0_BASIC_STATUS EQU 0x40007018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_BASE\r
-CYDEV_PHUB_CH1_BASE EQU 0x40007020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH1_SIZE\r
-CYDEV_PHUB_CH1_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH1_BASIC_CFG\r
-CYREG_PHUB_CH1_BASIC_CFG EQU 0x40007020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH1_ACTION\r
-CYREG_PHUB_CH1_ACTION EQU 0x40007024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH1_BASIC_STATUS\r
-CYREG_PHUB_CH1_BASIC_STATUS EQU 0x40007028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_BASE\r
-CYDEV_PHUB_CH2_BASE EQU 0x40007030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH2_SIZE\r
-CYDEV_PHUB_CH2_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH2_BASIC_CFG\r
-CYREG_PHUB_CH2_BASIC_CFG EQU 0x40007030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH2_ACTION\r
-CYREG_PHUB_CH2_ACTION EQU 0x40007034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH2_BASIC_STATUS\r
-CYREG_PHUB_CH2_BASIC_STATUS EQU 0x40007038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_BASE\r
-CYDEV_PHUB_CH3_BASE EQU 0x40007040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH3_SIZE\r
-CYDEV_PHUB_CH3_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH3_BASIC_CFG\r
-CYREG_PHUB_CH3_BASIC_CFG EQU 0x40007040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH3_ACTION\r
-CYREG_PHUB_CH3_ACTION EQU 0x40007044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH3_BASIC_STATUS\r
-CYREG_PHUB_CH3_BASIC_STATUS EQU 0x40007048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_BASE\r
-CYDEV_PHUB_CH4_BASE EQU 0x40007050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH4_SIZE\r
-CYDEV_PHUB_CH4_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH4_BASIC_CFG\r
-CYREG_PHUB_CH4_BASIC_CFG EQU 0x40007050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH4_ACTION\r
-CYREG_PHUB_CH4_ACTION EQU 0x40007054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH4_BASIC_STATUS\r
-CYREG_PHUB_CH4_BASIC_STATUS EQU 0x40007058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_BASE\r
-CYDEV_PHUB_CH5_BASE EQU 0x40007060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH5_SIZE\r
-CYDEV_PHUB_CH5_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH5_BASIC_CFG\r
-CYREG_PHUB_CH5_BASIC_CFG EQU 0x40007060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH5_ACTION\r
-CYREG_PHUB_CH5_ACTION EQU 0x40007064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH5_BASIC_STATUS\r
-CYREG_PHUB_CH5_BASIC_STATUS EQU 0x40007068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_BASE\r
-CYDEV_PHUB_CH6_BASE EQU 0x40007070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH6_SIZE\r
-CYDEV_PHUB_CH6_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH6_BASIC_CFG\r
-CYREG_PHUB_CH6_BASIC_CFG EQU 0x40007070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH6_ACTION\r
-CYREG_PHUB_CH6_ACTION EQU 0x40007074\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH6_BASIC_STATUS\r
-CYREG_PHUB_CH6_BASIC_STATUS EQU 0x40007078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_BASE\r
-CYDEV_PHUB_CH7_BASE EQU 0x40007080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH7_SIZE\r
-CYDEV_PHUB_CH7_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH7_BASIC_CFG\r
-CYREG_PHUB_CH7_BASIC_CFG EQU 0x40007080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH7_ACTION\r
-CYREG_PHUB_CH7_ACTION EQU 0x40007084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH7_BASIC_STATUS\r
-CYREG_PHUB_CH7_BASIC_STATUS EQU 0x40007088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_BASE\r
-CYDEV_PHUB_CH8_BASE EQU 0x40007090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH8_SIZE\r
-CYDEV_PHUB_CH8_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH8_BASIC_CFG\r
-CYREG_PHUB_CH8_BASIC_CFG EQU 0x40007090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH8_ACTION\r
-CYREG_PHUB_CH8_ACTION EQU 0x40007094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH8_BASIC_STATUS\r
-CYREG_PHUB_CH8_BASIC_STATUS EQU 0x40007098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_BASE\r
-CYDEV_PHUB_CH9_BASE EQU 0x400070a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH9_SIZE\r
-CYDEV_PHUB_CH9_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH9_BASIC_CFG\r
-CYREG_PHUB_CH9_BASIC_CFG EQU 0x400070a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH9_ACTION\r
-CYREG_PHUB_CH9_ACTION EQU 0x400070a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH9_BASIC_STATUS\r
-CYREG_PHUB_CH9_BASIC_STATUS EQU 0x400070a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_BASE\r
-CYDEV_PHUB_CH10_BASE EQU 0x400070b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH10_SIZE\r
-CYDEV_PHUB_CH10_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH10_BASIC_CFG\r
-CYREG_PHUB_CH10_BASIC_CFG EQU 0x400070b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH10_ACTION\r
-CYREG_PHUB_CH10_ACTION EQU 0x400070b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH10_BASIC_STATUS\r
-CYREG_PHUB_CH10_BASIC_STATUS EQU 0x400070b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_BASE\r
-CYDEV_PHUB_CH11_BASE EQU 0x400070c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH11_SIZE\r
-CYDEV_PHUB_CH11_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH11_BASIC_CFG\r
-CYREG_PHUB_CH11_BASIC_CFG EQU 0x400070c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH11_ACTION\r
-CYREG_PHUB_CH11_ACTION EQU 0x400070c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH11_BASIC_STATUS\r
-CYREG_PHUB_CH11_BASIC_STATUS EQU 0x400070c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_BASE\r
-CYDEV_PHUB_CH12_BASE EQU 0x400070d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH12_SIZE\r
-CYDEV_PHUB_CH12_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH12_BASIC_CFG\r
-CYREG_PHUB_CH12_BASIC_CFG EQU 0x400070d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH12_ACTION\r
-CYREG_PHUB_CH12_ACTION EQU 0x400070d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH12_BASIC_STATUS\r
-CYREG_PHUB_CH12_BASIC_STATUS EQU 0x400070d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_BASE\r
-CYDEV_PHUB_CH13_BASE EQU 0x400070e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH13_SIZE\r
-CYDEV_PHUB_CH13_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH13_BASIC_CFG\r
-CYREG_PHUB_CH13_BASIC_CFG EQU 0x400070e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH13_ACTION\r
-CYREG_PHUB_CH13_ACTION EQU 0x400070e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH13_BASIC_STATUS\r
-CYREG_PHUB_CH13_BASIC_STATUS EQU 0x400070e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_BASE\r
-CYDEV_PHUB_CH14_BASE EQU 0x400070f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH14_SIZE\r
-CYDEV_PHUB_CH14_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH14_BASIC_CFG\r
-CYREG_PHUB_CH14_BASIC_CFG EQU 0x400070f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH14_ACTION\r
-CYREG_PHUB_CH14_ACTION EQU 0x400070f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH14_BASIC_STATUS\r
-CYREG_PHUB_CH14_BASIC_STATUS EQU 0x400070f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_BASE\r
-CYDEV_PHUB_CH15_BASE EQU 0x40007100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH15_SIZE\r
-CYDEV_PHUB_CH15_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH15_BASIC_CFG\r
-CYREG_PHUB_CH15_BASIC_CFG EQU 0x40007100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH15_ACTION\r
-CYREG_PHUB_CH15_ACTION EQU 0x40007104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH15_BASIC_STATUS\r
-CYREG_PHUB_CH15_BASIC_STATUS EQU 0x40007108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_BASE\r
-CYDEV_PHUB_CH16_BASE EQU 0x40007110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH16_SIZE\r
-CYDEV_PHUB_CH16_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH16_BASIC_CFG\r
-CYREG_PHUB_CH16_BASIC_CFG EQU 0x40007110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH16_ACTION\r
-CYREG_PHUB_CH16_ACTION EQU 0x40007114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH16_BASIC_STATUS\r
-CYREG_PHUB_CH16_BASIC_STATUS EQU 0x40007118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_BASE\r
-CYDEV_PHUB_CH17_BASE EQU 0x40007120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH17_SIZE\r
-CYDEV_PHUB_CH17_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH17_BASIC_CFG\r
-CYREG_PHUB_CH17_BASIC_CFG EQU 0x40007120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH17_ACTION\r
-CYREG_PHUB_CH17_ACTION EQU 0x40007124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH17_BASIC_STATUS\r
-CYREG_PHUB_CH17_BASIC_STATUS EQU 0x40007128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_BASE\r
-CYDEV_PHUB_CH18_BASE EQU 0x40007130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH18_SIZE\r
-CYDEV_PHUB_CH18_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH18_BASIC_CFG\r
-CYREG_PHUB_CH18_BASIC_CFG EQU 0x40007130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH18_ACTION\r
-CYREG_PHUB_CH18_ACTION EQU 0x40007134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH18_BASIC_STATUS\r
-CYREG_PHUB_CH18_BASIC_STATUS EQU 0x40007138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_BASE\r
-CYDEV_PHUB_CH19_BASE EQU 0x40007140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH19_SIZE\r
-CYDEV_PHUB_CH19_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH19_BASIC_CFG\r
-CYREG_PHUB_CH19_BASIC_CFG EQU 0x40007140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH19_ACTION\r
-CYREG_PHUB_CH19_ACTION EQU 0x40007144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH19_BASIC_STATUS\r
-CYREG_PHUB_CH19_BASIC_STATUS EQU 0x40007148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_BASE\r
-CYDEV_PHUB_CH20_BASE EQU 0x40007150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH20_SIZE\r
-CYDEV_PHUB_CH20_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH20_BASIC_CFG\r
-CYREG_PHUB_CH20_BASIC_CFG EQU 0x40007150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH20_ACTION\r
-CYREG_PHUB_CH20_ACTION EQU 0x40007154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH20_BASIC_STATUS\r
-CYREG_PHUB_CH20_BASIC_STATUS EQU 0x40007158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_BASE\r
-CYDEV_PHUB_CH21_BASE EQU 0x40007160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH21_SIZE\r
-CYDEV_PHUB_CH21_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH21_BASIC_CFG\r
-CYREG_PHUB_CH21_BASIC_CFG EQU 0x40007160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH21_ACTION\r
-CYREG_PHUB_CH21_ACTION EQU 0x40007164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH21_BASIC_STATUS\r
-CYREG_PHUB_CH21_BASIC_STATUS EQU 0x40007168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_BASE\r
-CYDEV_PHUB_CH22_BASE EQU 0x40007170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH22_SIZE\r
-CYDEV_PHUB_CH22_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH22_BASIC_CFG\r
-CYREG_PHUB_CH22_BASIC_CFG EQU 0x40007170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH22_ACTION\r
-CYREG_PHUB_CH22_ACTION EQU 0x40007174\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH22_BASIC_STATUS\r
-CYREG_PHUB_CH22_BASIC_STATUS EQU 0x40007178\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_BASE\r
-CYDEV_PHUB_CH23_BASE EQU 0x40007180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CH23_SIZE\r
-CYDEV_PHUB_CH23_SIZE EQU 0x0000000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH23_BASIC_CFG\r
-CYREG_PHUB_CH23_BASIC_CFG EQU 0x40007180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH23_ACTION\r
-CYREG_PHUB_CH23_ACTION EQU 0x40007184\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CH23_BASIC_STATUS\r
-CYREG_PHUB_CH23_BASIC_STATUS EQU 0x40007188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_BASE\r
-CYDEV_PHUB_CFGMEM0_BASE EQU 0x40007600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM0_SIZE\r
-CYDEV_PHUB_CFGMEM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM0_CFG0\r
-CYREG_PHUB_CFGMEM0_CFG0 EQU 0x40007600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM0_CFG1\r
-CYREG_PHUB_CFGMEM0_CFG1 EQU 0x40007604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_BASE\r
-CYDEV_PHUB_CFGMEM1_BASE EQU 0x40007608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM1_SIZE\r
-CYDEV_PHUB_CFGMEM1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM1_CFG0\r
-CYREG_PHUB_CFGMEM1_CFG0 EQU 0x40007608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM1_CFG1\r
-CYREG_PHUB_CFGMEM1_CFG1 EQU 0x4000760c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_BASE\r
-CYDEV_PHUB_CFGMEM2_BASE EQU 0x40007610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM2_SIZE\r
-CYDEV_PHUB_CFGMEM2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM2_CFG0\r
-CYREG_PHUB_CFGMEM2_CFG0 EQU 0x40007610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM2_CFG1\r
-CYREG_PHUB_CFGMEM2_CFG1 EQU 0x40007614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_BASE\r
-CYDEV_PHUB_CFGMEM3_BASE EQU 0x40007618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM3_SIZE\r
-CYDEV_PHUB_CFGMEM3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM3_CFG0\r
-CYREG_PHUB_CFGMEM3_CFG0 EQU 0x40007618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM3_CFG1\r
-CYREG_PHUB_CFGMEM3_CFG1 EQU 0x4000761c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_BASE\r
-CYDEV_PHUB_CFGMEM4_BASE EQU 0x40007620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM4_SIZE\r
-CYDEV_PHUB_CFGMEM4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM4_CFG0\r
-CYREG_PHUB_CFGMEM4_CFG0 EQU 0x40007620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM4_CFG1\r
-CYREG_PHUB_CFGMEM4_CFG1 EQU 0x40007624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_BASE\r
-CYDEV_PHUB_CFGMEM5_BASE EQU 0x40007628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM5_SIZE\r
-CYDEV_PHUB_CFGMEM5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM5_CFG0\r
-CYREG_PHUB_CFGMEM5_CFG0 EQU 0x40007628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM5_CFG1\r
-CYREG_PHUB_CFGMEM5_CFG1 EQU 0x4000762c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_BASE\r
-CYDEV_PHUB_CFGMEM6_BASE EQU 0x40007630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM6_SIZE\r
-CYDEV_PHUB_CFGMEM6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM6_CFG0\r
-CYREG_PHUB_CFGMEM6_CFG0 EQU 0x40007630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM6_CFG1\r
-CYREG_PHUB_CFGMEM6_CFG1 EQU 0x40007634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_BASE\r
-CYDEV_PHUB_CFGMEM7_BASE EQU 0x40007638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM7_SIZE\r
-CYDEV_PHUB_CFGMEM7_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM7_CFG0\r
-CYREG_PHUB_CFGMEM7_CFG0 EQU 0x40007638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM7_CFG1\r
-CYREG_PHUB_CFGMEM7_CFG1 EQU 0x4000763c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_BASE\r
-CYDEV_PHUB_CFGMEM8_BASE EQU 0x40007640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM8_SIZE\r
-CYDEV_PHUB_CFGMEM8_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM8_CFG0\r
-CYREG_PHUB_CFGMEM8_CFG0 EQU 0x40007640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM8_CFG1\r
-CYREG_PHUB_CFGMEM8_CFG1 EQU 0x40007644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_BASE\r
-CYDEV_PHUB_CFGMEM9_BASE EQU 0x40007648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM9_SIZE\r
-CYDEV_PHUB_CFGMEM9_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM9_CFG0\r
-CYREG_PHUB_CFGMEM9_CFG0 EQU 0x40007648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM9_CFG1\r
-CYREG_PHUB_CFGMEM9_CFG1 EQU 0x4000764c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_BASE\r
-CYDEV_PHUB_CFGMEM10_BASE EQU 0x40007650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM10_SIZE\r
-CYDEV_PHUB_CFGMEM10_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM10_CFG0\r
-CYREG_PHUB_CFGMEM10_CFG0 EQU 0x40007650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM10_CFG1\r
-CYREG_PHUB_CFGMEM10_CFG1 EQU 0x40007654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_BASE\r
-CYDEV_PHUB_CFGMEM11_BASE EQU 0x40007658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM11_SIZE\r
-CYDEV_PHUB_CFGMEM11_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM11_CFG0\r
-CYREG_PHUB_CFGMEM11_CFG0 EQU 0x40007658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM11_CFG1\r
-CYREG_PHUB_CFGMEM11_CFG1 EQU 0x4000765c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_BASE\r
-CYDEV_PHUB_CFGMEM12_BASE EQU 0x40007660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM12_SIZE\r
-CYDEV_PHUB_CFGMEM12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM12_CFG0\r
-CYREG_PHUB_CFGMEM12_CFG0 EQU 0x40007660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM12_CFG1\r
-CYREG_PHUB_CFGMEM12_CFG1 EQU 0x40007664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_BASE\r
-CYDEV_PHUB_CFGMEM13_BASE EQU 0x40007668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM13_SIZE\r
-CYDEV_PHUB_CFGMEM13_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM13_CFG0\r
-CYREG_PHUB_CFGMEM13_CFG0 EQU 0x40007668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM13_CFG1\r
-CYREG_PHUB_CFGMEM13_CFG1 EQU 0x4000766c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_BASE\r
-CYDEV_PHUB_CFGMEM14_BASE EQU 0x40007670\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM14_SIZE\r
-CYDEV_PHUB_CFGMEM14_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM14_CFG0\r
-CYREG_PHUB_CFGMEM14_CFG0 EQU 0x40007670\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM14_CFG1\r
-CYREG_PHUB_CFGMEM14_CFG1 EQU 0x40007674\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_BASE\r
-CYDEV_PHUB_CFGMEM15_BASE EQU 0x40007678\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM15_SIZE\r
-CYDEV_PHUB_CFGMEM15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM15_CFG0\r
-CYREG_PHUB_CFGMEM15_CFG0 EQU 0x40007678\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM15_CFG1\r
-CYREG_PHUB_CFGMEM15_CFG1 EQU 0x4000767c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_BASE\r
-CYDEV_PHUB_CFGMEM16_BASE EQU 0x40007680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM16_SIZE\r
-CYDEV_PHUB_CFGMEM16_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM16_CFG0\r
-CYREG_PHUB_CFGMEM16_CFG0 EQU 0x40007680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM16_CFG1\r
-CYREG_PHUB_CFGMEM16_CFG1 EQU 0x40007684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_BASE\r
-CYDEV_PHUB_CFGMEM17_BASE EQU 0x40007688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM17_SIZE\r
-CYDEV_PHUB_CFGMEM17_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM17_CFG0\r
-CYREG_PHUB_CFGMEM17_CFG0 EQU 0x40007688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM17_CFG1\r
-CYREG_PHUB_CFGMEM17_CFG1 EQU 0x4000768c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_BASE\r
-CYDEV_PHUB_CFGMEM18_BASE EQU 0x40007690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM18_SIZE\r
-CYDEV_PHUB_CFGMEM18_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM18_CFG0\r
-CYREG_PHUB_CFGMEM18_CFG0 EQU 0x40007690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM18_CFG1\r
-CYREG_PHUB_CFGMEM18_CFG1 EQU 0x40007694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_BASE\r
-CYDEV_PHUB_CFGMEM19_BASE EQU 0x40007698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM19_SIZE\r
-CYDEV_PHUB_CFGMEM19_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM19_CFG0\r
-CYREG_PHUB_CFGMEM19_CFG0 EQU 0x40007698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM19_CFG1\r
-CYREG_PHUB_CFGMEM19_CFG1 EQU 0x4000769c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_BASE\r
-CYDEV_PHUB_CFGMEM20_BASE EQU 0x400076a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM20_SIZE\r
-CYDEV_PHUB_CFGMEM20_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM20_CFG0\r
-CYREG_PHUB_CFGMEM20_CFG0 EQU 0x400076a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM20_CFG1\r
-CYREG_PHUB_CFGMEM20_CFG1 EQU 0x400076a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_BASE\r
-CYDEV_PHUB_CFGMEM21_BASE EQU 0x400076a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM21_SIZE\r
-CYDEV_PHUB_CFGMEM21_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM21_CFG0\r
-CYREG_PHUB_CFGMEM21_CFG0 EQU 0x400076a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM21_CFG1\r
-CYREG_PHUB_CFGMEM21_CFG1 EQU 0x400076ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_BASE\r
-CYDEV_PHUB_CFGMEM22_BASE EQU 0x400076b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM22_SIZE\r
-CYDEV_PHUB_CFGMEM22_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM22_CFG0\r
-CYREG_PHUB_CFGMEM22_CFG0 EQU 0x400076b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM22_CFG1\r
-CYREG_PHUB_CFGMEM22_CFG1 EQU 0x400076b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_BASE\r
-CYDEV_PHUB_CFGMEM23_BASE EQU 0x400076b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_CFGMEM23_SIZE\r
-CYDEV_PHUB_CFGMEM23_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM23_CFG0\r
-CYREG_PHUB_CFGMEM23_CFG0 EQU 0x400076b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_CFGMEM23_CFG1\r
-CYREG_PHUB_CFGMEM23_CFG1 EQU 0x400076bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_BASE\r
-CYDEV_PHUB_TDMEM0_BASE EQU 0x40007800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM0_SIZE\r
-CYDEV_PHUB_TDMEM0_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM0_ORIG_TD0\r
-CYREG_PHUB_TDMEM0_ORIG_TD0 EQU 0x40007800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM0_ORIG_TD1\r
-CYREG_PHUB_TDMEM0_ORIG_TD1 EQU 0x40007804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_BASE\r
-CYDEV_PHUB_TDMEM1_BASE EQU 0x40007808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM1_SIZE\r
-CYDEV_PHUB_TDMEM1_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM1_ORIG_TD0\r
-CYREG_PHUB_TDMEM1_ORIG_TD0 EQU 0x40007808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM1_ORIG_TD1\r
-CYREG_PHUB_TDMEM1_ORIG_TD1 EQU 0x4000780c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_BASE\r
-CYDEV_PHUB_TDMEM2_BASE EQU 0x40007810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM2_SIZE\r
-CYDEV_PHUB_TDMEM2_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM2_ORIG_TD0\r
-CYREG_PHUB_TDMEM2_ORIG_TD0 EQU 0x40007810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM2_ORIG_TD1\r
-CYREG_PHUB_TDMEM2_ORIG_TD1 EQU 0x40007814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_BASE\r
-CYDEV_PHUB_TDMEM3_BASE EQU 0x40007818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM3_SIZE\r
-CYDEV_PHUB_TDMEM3_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM3_ORIG_TD0\r
-CYREG_PHUB_TDMEM3_ORIG_TD0 EQU 0x40007818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM3_ORIG_TD1\r
-CYREG_PHUB_TDMEM3_ORIG_TD1 EQU 0x4000781c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_BASE\r
-CYDEV_PHUB_TDMEM4_BASE EQU 0x40007820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM4_SIZE\r
-CYDEV_PHUB_TDMEM4_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM4_ORIG_TD0\r
-CYREG_PHUB_TDMEM4_ORIG_TD0 EQU 0x40007820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM4_ORIG_TD1\r
-CYREG_PHUB_TDMEM4_ORIG_TD1 EQU 0x40007824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_BASE\r
-CYDEV_PHUB_TDMEM5_BASE EQU 0x40007828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM5_SIZE\r
-CYDEV_PHUB_TDMEM5_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM5_ORIG_TD0\r
-CYREG_PHUB_TDMEM5_ORIG_TD0 EQU 0x40007828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM5_ORIG_TD1\r
-CYREG_PHUB_TDMEM5_ORIG_TD1 EQU 0x4000782c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_BASE\r
-CYDEV_PHUB_TDMEM6_BASE EQU 0x40007830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM6_SIZE\r
-CYDEV_PHUB_TDMEM6_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM6_ORIG_TD0\r
-CYREG_PHUB_TDMEM6_ORIG_TD0 EQU 0x40007830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM6_ORIG_TD1\r
-CYREG_PHUB_TDMEM6_ORIG_TD1 EQU 0x40007834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_BASE\r
-CYDEV_PHUB_TDMEM7_BASE EQU 0x40007838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM7_SIZE\r
-CYDEV_PHUB_TDMEM7_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM7_ORIG_TD0\r
-CYREG_PHUB_TDMEM7_ORIG_TD0 EQU 0x40007838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM7_ORIG_TD1\r
-CYREG_PHUB_TDMEM7_ORIG_TD1 EQU 0x4000783c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_BASE\r
-CYDEV_PHUB_TDMEM8_BASE EQU 0x40007840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM8_SIZE\r
-CYDEV_PHUB_TDMEM8_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM8_ORIG_TD0\r
-CYREG_PHUB_TDMEM8_ORIG_TD0 EQU 0x40007840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM8_ORIG_TD1\r
-CYREG_PHUB_TDMEM8_ORIG_TD1 EQU 0x40007844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_BASE\r
-CYDEV_PHUB_TDMEM9_BASE EQU 0x40007848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM9_SIZE\r
-CYDEV_PHUB_TDMEM9_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM9_ORIG_TD0\r
-CYREG_PHUB_TDMEM9_ORIG_TD0 EQU 0x40007848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM9_ORIG_TD1\r
-CYREG_PHUB_TDMEM9_ORIG_TD1 EQU 0x4000784c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_BASE\r
-CYDEV_PHUB_TDMEM10_BASE EQU 0x40007850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM10_SIZE\r
-CYDEV_PHUB_TDMEM10_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM10_ORIG_TD0\r
-CYREG_PHUB_TDMEM10_ORIG_TD0 EQU 0x40007850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM10_ORIG_TD1\r
-CYREG_PHUB_TDMEM10_ORIG_TD1 EQU 0x40007854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_BASE\r
-CYDEV_PHUB_TDMEM11_BASE EQU 0x40007858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM11_SIZE\r
-CYDEV_PHUB_TDMEM11_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM11_ORIG_TD0\r
-CYREG_PHUB_TDMEM11_ORIG_TD0 EQU 0x40007858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM11_ORIG_TD1\r
-CYREG_PHUB_TDMEM11_ORIG_TD1 EQU 0x4000785c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_BASE\r
-CYDEV_PHUB_TDMEM12_BASE EQU 0x40007860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM12_SIZE\r
-CYDEV_PHUB_TDMEM12_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM12_ORIG_TD0\r
-CYREG_PHUB_TDMEM12_ORIG_TD0 EQU 0x40007860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM12_ORIG_TD1\r
-CYREG_PHUB_TDMEM12_ORIG_TD1 EQU 0x40007864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_BASE\r
-CYDEV_PHUB_TDMEM13_BASE EQU 0x40007868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM13_SIZE\r
-CYDEV_PHUB_TDMEM13_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM13_ORIG_TD0\r
-CYREG_PHUB_TDMEM13_ORIG_TD0 EQU 0x40007868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM13_ORIG_TD1\r
-CYREG_PHUB_TDMEM13_ORIG_TD1 EQU 0x4000786c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_BASE\r
-CYDEV_PHUB_TDMEM14_BASE EQU 0x40007870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM14_SIZE\r
-CYDEV_PHUB_TDMEM14_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM14_ORIG_TD0\r
-CYREG_PHUB_TDMEM14_ORIG_TD0 EQU 0x40007870\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM14_ORIG_TD1\r
-CYREG_PHUB_TDMEM14_ORIG_TD1 EQU 0x40007874\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_BASE\r
-CYDEV_PHUB_TDMEM15_BASE EQU 0x40007878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM15_SIZE\r
-CYDEV_PHUB_TDMEM15_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM15_ORIG_TD0\r
-CYREG_PHUB_TDMEM15_ORIG_TD0 EQU 0x40007878\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM15_ORIG_TD1\r
-CYREG_PHUB_TDMEM15_ORIG_TD1 EQU 0x4000787c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_BASE\r
-CYDEV_PHUB_TDMEM16_BASE EQU 0x40007880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM16_SIZE\r
-CYDEV_PHUB_TDMEM16_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM16_ORIG_TD0\r
-CYREG_PHUB_TDMEM16_ORIG_TD0 EQU 0x40007880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM16_ORIG_TD1\r
-CYREG_PHUB_TDMEM16_ORIG_TD1 EQU 0x40007884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_BASE\r
-CYDEV_PHUB_TDMEM17_BASE EQU 0x40007888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM17_SIZE\r
-CYDEV_PHUB_TDMEM17_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM17_ORIG_TD0\r
-CYREG_PHUB_TDMEM17_ORIG_TD0 EQU 0x40007888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM17_ORIG_TD1\r
-CYREG_PHUB_TDMEM17_ORIG_TD1 EQU 0x4000788c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_BASE\r
-CYDEV_PHUB_TDMEM18_BASE EQU 0x40007890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM18_SIZE\r
-CYDEV_PHUB_TDMEM18_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM18_ORIG_TD0\r
-CYREG_PHUB_TDMEM18_ORIG_TD0 EQU 0x40007890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM18_ORIG_TD1\r
-CYREG_PHUB_TDMEM18_ORIG_TD1 EQU 0x40007894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_BASE\r
-CYDEV_PHUB_TDMEM19_BASE EQU 0x40007898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM19_SIZE\r
-CYDEV_PHUB_TDMEM19_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM19_ORIG_TD0\r
-CYREG_PHUB_TDMEM19_ORIG_TD0 EQU 0x40007898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM19_ORIG_TD1\r
-CYREG_PHUB_TDMEM19_ORIG_TD1 EQU 0x4000789c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_BASE\r
-CYDEV_PHUB_TDMEM20_BASE EQU 0x400078a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM20_SIZE\r
-CYDEV_PHUB_TDMEM20_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM20_ORIG_TD0\r
-CYREG_PHUB_TDMEM20_ORIG_TD0 EQU 0x400078a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM20_ORIG_TD1\r
-CYREG_PHUB_TDMEM20_ORIG_TD1 EQU 0x400078a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_BASE\r
-CYDEV_PHUB_TDMEM21_BASE EQU 0x400078a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM21_SIZE\r
-CYDEV_PHUB_TDMEM21_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM21_ORIG_TD0\r
-CYREG_PHUB_TDMEM21_ORIG_TD0 EQU 0x400078a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM21_ORIG_TD1\r
-CYREG_PHUB_TDMEM21_ORIG_TD1 EQU 0x400078ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_BASE\r
-CYDEV_PHUB_TDMEM22_BASE EQU 0x400078b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM22_SIZE\r
-CYDEV_PHUB_TDMEM22_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM22_ORIG_TD0\r
-CYREG_PHUB_TDMEM22_ORIG_TD0 EQU 0x400078b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM22_ORIG_TD1\r
-CYREG_PHUB_TDMEM22_ORIG_TD1 EQU 0x400078b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_BASE\r
-CYDEV_PHUB_TDMEM23_BASE EQU 0x400078b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM23_SIZE\r
-CYDEV_PHUB_TDMEM23_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM23_ORIG_TD0\r
-CYREG_PHUB_TDMEM23_ORIG_TD0 EQU 0x400078b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM23_ORIG_TD1\r
-CYREG_PHUB_TDMEM23_ORIG_TD1 EQU 0x400078bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_BASE\r
-CYDEV_PHUB_TDMEM24_BASE EQU 0x400078c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM24_SIZE\r
-CYDEV_PHUB_TDMEM24_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM24_ORIG_TD0\r
-CYREG_PHUB_TDMEM24_ORIG_TD0 EQU 0x400078c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM24_ORIG_TD1\r
-CYREG_PHUB_TDMEM24_ORIG_TD1 EQU 0x400078c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_BASE\r
-CYDEV_PHUB_TDMEM25_BASE EQU 0x400078c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM25_SIZE\r
-CYDEV_PHUB_TDMEM25_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM25_ORIG_TD0\r
-CYREG_PHUB_TDMEM25_ORIG_TD0 EQU 0x400078c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM25_ORIG_TD1\r
-CYREG_PHUB_TDMEM25_ORIG_TD1 EQU 0x400078cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_BASE\r
-CYDEV_PHUB_TDMEM26_BASE EQU 0x400078d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM26_SIZE\r
-CYDEV_PHUB_TDMEM26_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM26_ORIG_TD0\r
-CYREG_PHUB_TDMEM26_ORIG_TD0 EQU 0x400078d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM26_ORIG_TD1\r
-CYREG_PHUB_TDMEM26_ORIG_TD1 EQU 0x400078d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_BASE\r
-CYDEV_PHUB_TDMEM27_BASE EQU 0x400078d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM27_SIZE\r
-CYDEV_PHUB_TDMEM27_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM27_ORIG_TD0\r
-CYREG_PHUB_TDMEM27_ORIG_TD0 EQU 0x400078d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM27_ORIG_TD1\r
-CYREG_PHUB_TDMEM27_ORIG_TD1 EQU 0x400078dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_BASE\r
-CYDEV_PHUB_TDMEM28_BASE EQU 0x400078e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM28_SIZE\r
-CYDEV_PHUB_TDMEM28_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM28_ORIG_TD0\r
-CYREG_PHUB_TDMEM28_ORIG_TD0 EQU 0x400078e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM28_ORIG_TD1\r
-CYREG_PHUB_TDMEM28_ORIG_TD1 EQU 0x400078e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_BASE\r
-CYDEV_PHUB_TDMEM29_BASE EQU 0x400078e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM29_SIZE\r
-CYDEV_PHUB_TDMEM29_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM29_ORIG_TD0\r
-CYREG_PHUB_TDMEM29_ORIG_TD0 EQU 0x400078e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM29_ORIG_TD1\r
-CYREG_PHUB_TDMEM29_ORIG_TD1 EQU 0x400078ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_BASE\r
-CYDEV_PHUB_TDMEM30_BASE EQU 0x400078f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM30_SIZE\r
-CYDEV_PHUB_TDMEM30_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM30_ORIG_TD0\r
-CYREG_PHUB_TDMEM30_ORIG_TD0 EQU 0x400078f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM30_ORIG_TD1\r
-CYREG_PHUB_TDMEM30_ORIG_TD1 EQU 0x400078f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_BASE\r
-CYDEV_PHUB_TDMEM31_BASE EQU 0x400078f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM31_SIZE\r
-CYDEV_PHUB_TDMEM31_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM31_ORIG_TD0\r
-CYREG_PHUB_TDMEM31_ORIG_TD0 EQU 0x400078f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM31_ORIG_TD1\r
-CYREG_PHUB_TDMEM31_ORIG_TD1 EQU 0x400078fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_BASE\r
-CYDEV_PHUB_TDMEM32_BASE EQU 0x40007900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM32_SIZE\r
-CYDEV_PHUB_TDMEM32_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM32_ORIG_TD0\r
-CYREG_PHUB_TDMEM32_ORIG_TD0 EQU 0x40007900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM32_ORIG_TD1\r
-CYREG_PHUB_TDMEM32_ORIG_TD1 EQU 0x40007904\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_BASE\r
-CYDEV_PHUB_TDMEM33_BASE EQU 0x40007908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM33_SIZE\r
-CYDEV_PHUB_TDMEM33_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM33_ORIG_TD0\r
-CYREG_PHUB_TDMEM33_ORIG_TD0 EQU 0x40007908\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM33_ORIG_TD1\r
-CYREG_PHUB_TDMEM33_ORIG_TD1 EQU 0x4000790c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_BASE\r
-CYDEV_PHUB_TDMEM34_BASE EQU 0x40007910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM34_SIZE\r
-CYDEV_PHUB_TDMEM34_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM34_ORIG_TD0\r
-CYREG_PHUB_TDMEM34_ORIG_TD0 EQU 0x40007910\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM34_ORIG_TD1\r
-CYREG_PHUB_TDMEM34_ORIG_TD1 EQU 0x40007914\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_BASE\r
-CYDEV_PHUB_TDMEM35_BASE EQU 0x40007918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM35_SIZE\r
-CYDEV_PHUB_TDMEM35_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM35_ORIG_TD0\r
-CYREG_PHUB_TDMEM35_ORIG_TD0 EQU 0x40007918\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM35_ORIG_TD1\r
-CYREG_PHUB_TDMEM35_ORIG_TD1 EQU 0x4000791c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_BASE\r
-CYDEV_PHUB_TDMEM36_BASE EQU 0x40007920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM36_SIZE\r
-CYDEV_PHUB_TDMEM36_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM36_ORIG_TD0\r
-CYREG_PHUB_TDMEM36_ORIG_TD0 EQU 0x40007920\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM36_ORIG_TD1\r
-CYREG_PHUB_TDMEM36_ORIG_TD1 EQU 0x40007924\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_BASE\r
-CYDEV_PHUB_TDMEM37_BASE EQU 0x40007928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM37_SIZE\r
-CYDEV_PHUB_TDMEM37_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM37_ORIG_TD0\r
-CYREG_PHUB_TDMEM37_ORIG_TD0 EQU 0x40007928\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM37_ORIG_TD1\r
-CYREG_PHUB_TDMEM37_ORIG_TD1 EQU 0x4000792c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_BASE\r
-CYDEV_PHUB_TDMEM38_BASE EQU 0x40007930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM38_SIZE\r
-CYDEV_PHUB_TDMEM38_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM38_ORIG_TD0\r
-CYREG_PHUB_TDMEM38_ORIG_TD0 EQU 0x40007930\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM38_ORIG_TD1\r
-CYREG_PHUB_TDMEM38_ORIG_TD1 EQU 0x40007934\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_BASE\r
-CYDEV_PHUB_TDMEM39_BASE EQU 0x40007938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM39_SIZE\r
-CYDEV_PHUB_TDMEM39_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM39_ORIG_TD0\r
-CYREG_PHUB_TDMEM39_ORIG_TD0 EQU 0x40007938\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM39_ORIG_TD1\r
-CYREG_PHUB_TDMEM39_ORIG_TD1 EQU 0x4000793c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_BASE\r
-CYDEV_PHUB_TDMEM40_BASE EQU 0x40007940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM40_SIZE\r
-CYDEV_PHUB_TDMEM40_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM40_ORIG_TD0\r
-CYREG_PHUB_TDMEM40_ORIG_TD0 EQU 0x40007940\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM40_ORIG_TD1\r
-CYREG_PHUB_TDMEM40_ORIG_TD1 EQU 0x40007944\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_BASE\r
-CYDEV_PHUB_TDMEM41_BASE EQU 0x40007948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM41_SIZE\r
-CYDEV_PHUB_TDMEM41_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM41_ORIG_TD0\r
-CYREG_PHUB_TDMEM41_ORIG_TD0 EQU 0x40007948\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM41_ORIG_TD1\r
-CYREG_PHUB_TDMEM41_ORIG_TD1 EQU 0x4000794c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_BASE\r
-CYDEV_PHUB_TDMEM42_BASE EQU 0x40007950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM42_SIZE\r
-CYDEV_PHUB_TDMEM42_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM42_ORIG_TD0\r
-CYREG_PHUB_TDMEM42_ORIG_TD0 EQU 0x40007950\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM42_ORIG_TD1\r
-CYREG_PHUB_TDMEM42_ORIG_TD1 EQU 0x40007954\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_BASE\r
-CYDEV_PHUB_TDMEM43_BASE EQU 0x40007958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM43_SIZE\r
-CYDEV_PHUB_TDMEM43_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM43_ORIG_TD0\r
-CYREG_PHUB_TDMEM43_ORIG_TD0 EQU 0x40007958\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM43_ORIG_TD1\r
-CYREG_PHUB_TDMEM43_ORIG_TD1 EQU 0x4000795c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_BASE\r
-CYDEV_PHUB_TDMEM44_BASE EQU 0x40007960\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM44_SIZE\r
-CYDEV_PHUB_TDMEM44_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM44_ORIG_TD0\r
-CYREG_PHUB_TDMEM44_ORIG_TD0 EQU 0x40007960\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM44_ORIG_TD1\r
-CYREG_PHUB_TDMEM44_ORIG_TD1 EQU 0x40007964\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_BASE\r
-CYDEV_PHUB_TDMEM45_BASE EQU 0x40007968\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM45_SIZE\r
-CYDEV_PHUB_TDMEM45_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM45_ORIG_TD0\r
-CYREG_PHUB_TDMEM45_ORIG_TD0 EQU 0x40007968\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM45_ORIG_TD1\r
-CYREG_PHUB_TDMEM45_ORIG_TD1 EQU 0x4000796c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_BASE\r
-CYDEV_PHUB_TDMEM46_BASE EQU 0x40007970\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM46_SIZE\r
-CYDEV_PHUB_TDMEM46_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM46_ORIG_TD0\r
-CYREG_PHUB_TDMEM46_ORIG_TD0 EQU 0x40007970\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM46_ORIG_TD1\r
-CYREG_PHUB_TDMEM46_ORIG_TD1 EQU 0x40007974\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_BASE\r
-CYDEV_PHUB_TDMEM47_BASE EQU 0x40007978\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM47_SIZE\r
-CYDEV_PHUB_TDMEM47_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM47_ORIG_TD0\r
-CYREG_PHUB_TDMEM47_ORIG_TD0 EQU 0x40007978\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM47_ORIG_TD1\r
-CYREG_PHUB_TDMEM47_ORIG_TD1 EQU 0x4000797c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_BASE\r
-CYDEV_PHUB_TDMEM48_BASE EQU 0x40007980\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM48_SIZE\r
-CYDEV_PHUB_TDMEM48_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM48_ORIG_TD0\r
-CYREG_PHUB_TDMEM48_ORIG_TD0 EQU 0x40007980\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM48_ORIG_TD1\r
-CYREG_PHUB_TDMEM48_ORIG_TD1 EQU 0x40007984\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_BASE\r
-CYDEV_PHUB_TDMEM49_BASE EQU 0x40007988\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM49_SIZE\r
-CYDEV_PHUB_TDMEM49_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM49_ORIG_TD0\r
-CYREG_PHUB_TDMEM49_ORIG_TD0 EQU 0x40007988\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM49_ORIG_TD1\r
-CYREG_PHUB_TDMEM49_ORIG_TD1 EQU 0x4000798c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_BASE\r
-CYDEV_PHUB_TDMEM50_BASE EQU 0x40007990\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM50_SIZE\r
-CYDEV_PHUB_TDMEM50_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM50_ORIG_TD0\r
-CYREG_PHUB_TDMEM50_ORIG_TD0 EQU 0x40007990\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM50_ORIG_TD1\r
-CYREG_PHUB_TDMEM50_ORIG_TD1 EQU 0x40007994\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_BASE\r
-CYDEV_PHUB_TDMEM51_BASE EQU 0x40007998\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM51_SIZE\r
-CYDEV_PHUB_TDMEM51_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM51_ORIG_TD0\r
-CYREG_PHUB_TDMEM51_ORIG_TD0 EQU 0x40007998\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM51_ORIG_TD1\r
-CYREG_PHUB_TDMEM51_ORIG_TD1 EQU 0x4000799c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_BASE\r
-CYDEV_PHUB_TDMEM52_BASE EQU 0x400079a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM52_SIZE\r
-CYDEV_PHUB_TDMEM52_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM52_ORIG_TD0\r
-CYREG_PHUB_TDMEM52_ORIG_TD0 EQU 0x400079a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM52_ORIG_TD1\r
-CYREG_PHUB_TDMEM52_ORIG_TD1 EQU 0x400079a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_BASE\r
-CYDEV_PHUB_TDMEM53_BASE EQU 0x400079a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM53_SIZE\r
-CYDEV_PHUB_TDMEM53_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM53_ORIG_TD0\r
-CYREG_PHUB_TDMEM53_ORIG_TD0 EQU 0x400079a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM53_ORIG_TD1\r
-CYREG_PHUB_TDMEM53_ORIG_TD1 EQU 0x400079ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_BASE\r
-CYDEV_PHUB_TDMEM54_BASE EQU 0x400079b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM54_SIZE\r
-CYDEV_PHUB_TDMEM54_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM54_ORIG_TD0\r
-CYREG_PHUB_TDMEM54_ORIG_TD0 EQU 0x400079b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM54_ORIG_TD1\r
-CYREG_PHUB_TDMEM54_ORIG_TD1 EQU 0x400079b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_BASE\r
-CYDEV_PHUB_TDMEM55_BASE EQU 0x400079b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM55_SIZE\r
-CYDEV_PHUB_TDMEM55_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM55_ORIG_TD0\r
-CYREG_PHUB_TDMEM55_ORIG_TD0 EQU 0x400079b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM55_ORIG_TD1\r
-CYREG_PHUB_TDMEM55_ORIG_TD1 EQU 0x400079bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_BASE\r
-CYDEV_PHUB_TDMEM56_BASE EQU 0x400079c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM56_SIZE\r
-CYDEV_PHUB_TDMEM56_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM56_ORIG_TD0\r
-CYREG_PHUB_TDMEM56_ORIG_TD0 EQU 0x400079c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM56_ORIG_TD1\r
-CYREG_PHUB_TDMEM56_ORIG_TD1 EQU 0x400079c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_BASE\r
-CYDEV_PHUB_TDMEM57_BASE EQU 0x400079c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM57_SIZE\r
-CYDEV_PHUB_TDMEM57_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM57_ORIG_TD0\r
-CYREG_PHUB_TDMEM57_ORIG_TD0 EQU 0x400079c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM57_ORIG_TD1\r
-CYREG_PHUB_TDMEM57_ORIG_TD1 EQU 0x400079cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_BASE\r
-CYDEV_PHUB_TDMEM58_BASE EQU 0x400079d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM58_SIZE\r
-CYDEV_PHUB_TDMEM58_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM58_ORIG_TD0\r
-CYREG_PHUB_TDMEM58_ORIG_TD0 EQU 0x400079d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM58_ORIG_TD1\r
-CYREG_PHUB_TDMEM58_ORIG_TD1 EQU 0x400079d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_BASE\r
-CYDEV_PHUB_TDMEM59_BASE EQU 0x400079d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM59_SIZE\r
-CYDEV_PHUB_TDMEM59_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM59_ORIG_TD0\r
-CYREG_PHUB_TDMEM59_ORIG_TD0 EQU 0x400079d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM59_ORIG_TD1\r
-CYREG_PHUB_TDMEM59_ORIG_TD1 EQU 0x400079dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_BASE\r
-CYDEV_PHUB_TDMEM60_BASE EQU 0x400079e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM60_SIZE\r
-CYDEV_PHUB_TDMEM60_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM60_ORIG_TD0\r
-CYREG_PHUB_TDMEM60_ORIG_TD0 EQU 0x400079e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM60_ORIG_TD1\r
-CYREG_PHUB_TDMEM60_ORIG_TD1 EQU 0x400079e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_BASE\r
-CYDEV_PHUB_TDMEM61_BASE EQU 0x400079e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM61_SIZE\r
-CYDEV_PHUB_TDMEM61_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM61_ORIG_TD0\r
-CYREG_PHUB_TDMEM61_ORIG_TD0 EQU 0x400079e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM61_ORIG_TD1\r
-CYREG_PHUB_TDMEM61_ORIG_TD1 EQU 0x400079ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_BASE\r
-CYDEV_PHUB_TDMEM62_BASE EQU 0x400079f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM62_SIZE\r
-CYDEV_PHUB_TDMEM62_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM62_ORIG_TD0\r
-CYREG_PHUB_TDMEM62_ORIG_TD0 EQU 0x400079f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM62_ORIG_TD1\r
-CYREG_PHUB_TDMEM62_ORIG_TD1 EQU 0x400079f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_BASE\r
-CYDEV_PHUB_TDMEM63_BASE EQU 0x400079f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM63_SIZE\r
-CYDEV_PHUB_TDMEM63_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM63_ORIG_TD0\r
-CYREG_PHUB_TDMEM63_ORIG_TD0 EQU 0x400079f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM63_ORIG_TD1\r
-CYREG_PHUB_TDMEM63_ORIG_TD1 EQU 0x400079fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_BASE\r
-CYDEV_PHUB_TDMEM64_BASE EQU 0x40007a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM64_SIZE\r
-CYDEV_PHUB_TDMEM64_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM64_ORIG_TD0\r
-CYREG_PHUB_TDMEM64_ORIG_TD0 EQU 0x40007a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM64_ORIG_TD1\r
-CYREG_PHUB_TDMEM64_ORIG_TD1 EQU 0x40007a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_BASE\r
-CYDEV_PHUB_TDMEM65_BASE EQU 0x40007a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM65_SIZE\r
-CYDEV_PHUB_TDMEM65_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM65_ORIG_TD0\r
-CYREG_PHUB_TDMEM65_ORIG_TD0 EQU 0x40007a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM65_ORIG_TD1\r
-CYREG_PHUB_TDMEM65_ORIG_TD1 EQU 0x40007a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_BASE\r
-CYDEV_PHUB_TDMEM66_BASE EQU 0x40007a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM66_SIZE\r
-CYDEV_PHUB_TDMEM66_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM66_ORIG_TD0\r
-CYREG_PHUB_TDMEM66_ORIG_TD0 EQU 0x40007a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM66_ORIG_TD1\r
-CYREG_PHUB_TDMEM66_ORIG_TD1 EQU 0x40007a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_BASE\r
-CYDEV_PHUB_TDMEM67_BASE EQU 0x40007a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM67_SIZE\r
-CYDEV_PHUB_TDMEM67_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM67_ORIG_TD0\r
-CYREG_PHUB_TDMEM67_ORIG_TD0 EQU 0x40007a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM67_ORIG_TD1\r
-CYREG_PHUB_TDMEM67_ORIG_TD1 EQU 0x40007a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_BASE\r
-CYDEV_PHUB_TDMEM68_BASE EQU 0x40007a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM68_SIZE\r
-CYDEV_PHUB_TDMEM68_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM68_ORIG_TD0\r
-CYREG_PHUB_TDMEM68_ORIG_TD0 EQU 0x40007a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM68_ORIG_TD1\r
-CYREG_PHUB_TDMEM68_ORIG_TD1 EQU 0x40007a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_BASE\r
-CYDEV_PHUB_TDMEM69_BASE EQU 0x40007a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM69_SIZE\r
-CYDEV_PHUB_TDMEM69_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM69_ORIG_TD0\r
-CYREG_PHUB_TDMEM69_ORIG_TD0 EQU 0x40007a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM69_ORIG_TD1\r
-CYREG_PHUB_TDMEM69_ORIG_TD1 EQU 0x40007a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_BASE\r
-CYDEV_PHUB_TDMEM70_BASE EQU 0x40007a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM70_SIZE\r
-CYDEV_PHUB_TDMEM70_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM70_ORIG_TD0\r
-CYREG_PHUB_TDMEM70_ORIG_TD0 EQU 0x40007a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM70_ORIG_TD1\r
-CYREG_PHUB_TDMEM70_ORIG_TD1 EQU 0x40007a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_BASE\r
-CYDEV_PHUB_TDMEM71_BASE EQU 0x40007a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM71_SIZE\r
-CYDEV_PHUB_TDMEM71_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM71_ORIG_TD0\r
-CYREG_PHUB_TDMEM71_ORIG_TD0 EQU 0x40007a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM71_ORIG_TD1\r
-CYREG_PHUB_TDMEM71_ORIG_TD1 EQU 0x40007a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_BASE\r
-CYDEV_PHUB_TDMEM72_BASE EQU 0x40007a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM72_SIZE\r
-CYDEV_PHUB_TDMEM72_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM72_ORIG_TD0\r
-CYREG_PHUB_TDMEM72_ORIG_TD0 EQU 0x40007a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM72_ORIG_TD1\r
-CYREG_PHUB_TDMEM72_ORIG_TD1 EQU 0x40007a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_BASE\r
-CYDEV_PHUB_TDMEM73_BASE EQU 0x40007a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM73_SIZE\r
-CYDEV_PHUB_TDMEM73_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM73_ORIG_TD0\r
-CYREG_PHUB_TDMEM73_ORIG_TD0 EQU 0x40007a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM73_ORIG_TD1\r
-CYREG_PHUB_TDMEM73_ORIG_TD1 EQU 0x40007a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_BASE\r
-CYDEV_PHUB_TDMEM74_BASE EQU 0x40007a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM74_SIZE\r
-CYDEV_PHUB_TDMEM74_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM74_ORIG_TD0\r
-CYREG_PHUB_TDMEM74_ORIG_TD0 EQU 0x40007a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM74_ORIG_TD1\r
-CYREG_PHUB_TDMEM74_ORIG_TD1 EQU 0x40007a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_BASE\r
-CYDEV_PHUB_TDMEM75_BASE EQU 0x40007a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM75_SIZE\r
-CYDEV_PHUB_TDMEM75_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM75_ORIG_TD0\r
-CYREG_PHUB_TDMEM75_ORIG_TD0 EQU 0x40007a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM75_ORIG_TD1\r
-CYREG_PHUB_TDMEM75_ORIG_TD1 EQU 0x40007a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_BASE\r
-CYDEV_PHUB_TDMEM76_BASE EQU 0x40007a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM76_SIZE\r
-CYDEV_PHUB_TDMEM76_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM76_ORIG_TD0\r
-CYREG_PHUB_TDMEM76_ORIG_TD0 EQU 0x40007a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM76_ORIG_TD1\r
-CYREG_PHUB_TDMEM76_ORIG_TD1 EQU 0x40007a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_BASE\r
-CYDEV_PHUB_TDMEM77_BASE EQU 0x40007a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM77_SIZE\r
-CYDEV_PHUB_TDMEM77_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM77_ORIG_TD0\r
-CYREG_PHUB_TDMEM77_ORIG_TD0 EQU 0x40007a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM77_ORIG_TD1\r
-CYREG_PHUB_TDMEM77_ORIG_TD1 EQU 0x40007a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_BASE\r
-CYDEV_PHUB_TDMEM78_BASE EQU 0x40007a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM78_SIZE\r
-CYDEV_PHUB_TDMEM78_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM78_ORIG_TD0\r
-CYREG_PHUB_TDMEM78_ORIG_TD0 EQU 0x40007a70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM78_ORIG_TD1\r
-CYREG_PHUB_TDMEM78_ORIG_TD1 EQU 0x40007a74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_BASE\r
-CYDEV_PHUB_TDMEM79_BASE EQU 0x40007a78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM79_SIZE\r
-CYDEV_PHUB_TDMEM79_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM79_ORIG_TD0\r
-CYREG_PHUB_TDMEM79_ORIG_TD0 EQU 0x40007a78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM79_ORIG_TD1\r
-CYREG_PHUB_TDMEM79_ORIG_TD1 EQU 0x40007a7c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_BASE\r
-CYDEV_PHUB_TDMEM80_BASE EQU 0x40007a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM80_SIZE\r
-CYDEV_PHUB_TDMEM80_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM80_ORIG_TD0\r
-CYREG_PHUB_TDMEM80_ORIG_TD0 EQU 0x40007a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM80_ORIG_TD1\r
-CYREG_PHUB_TDMEM80_ORIG_TD1 EQU 0x40007a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_BASE\r
-CYDEV_PHUB_TDMEM81_BASE EQU 0x40007a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM81_SIZE\r
-CYDEV_PHUB_TDMEM81_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM81_ORIG_TD0\r
-CYREG_PHUB_TDMEM81_ORIG_TD0 EQU 0x40007a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM81_ORIG_TD1\r
-CYREG_PHUB_TDMEM81_ORIG_TD1 EQU 0x40007a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_BASE\r
-CYDEV_PHUB_TDMEM82_BASE EQU 0x40007a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM82_SIZE\r
-CYDEV_PHUB_TDMEM82_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM82_ORIG_TD0\r
-CYREG_PHUB_TDMEM82_ORIG_TD0 EQU 0x40007a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM82_ORIG_TD1\r
-CYREG_PHUB_TDMEM82_ORIG_TD1 EQU 0x40007a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_BASE\r
-CYDEV_PHUB_TDMEM83_BASE EQU 0x40007a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM83_SIZE\r
-CYDEV_PHUB_TDMEM83_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM83_ORIG_TD0\r
-CYREG_PHUB_TDMEM83_ORIG_TD0 EQU 0x40007a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM83_ORIG_TD1\r
-CYREG_PHUB_TDMEM83_ORIG_TD1 EQU 0x40007a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_BASE\r
-CYDEV_PHUB_TDMEM84_BASE EQU 0x40007aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM84_SIZE\r
-CYDEV_PHUB_TDMEM84_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM84_ORIG_TD0\r
-CYREG_PHUB_TDMEM84_ORIG_TD0 EQU 0x40007aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM84_ORIG_TD1\r
-CYREG_PHUB_TDMEM84_ORIG_TD1 EQU 0x40007aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_BASE\r
-CYDEV_PHUB_TDMEM85_BASE EQU 0x40007aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM85_SIZE\r
-CYDEV_PHUB_TDMEM85_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM85_ORIG_TD0\r
-CYREG_PHUB_TDMEM85_ORIG_TD0 EQU 0x40007aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM85_ORIG_TD1\r
-CYREG_PHUB_TDMEM85_ORIG_TD1 EQU 0x40007aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_BASE\r
-CYDEV_PHUB_TDMEM86_BASE EQU 0x40007ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM86_SIZE\r
-CYDEV_PHUB_TDMEM86_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM86_ORIG_TD0\r
-CYREG_PHUB_TDMEM86_ORIG_TD0 EQU 0x40007ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM86_ORIG_TD1\r
-CYREG_PHUB_TDMEM86_ORIG_TD1 EQU 0x40007ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_BASE\r
-CYDEV_PHUB_TDMEM87_BASE EQU 0x40007ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM87_SIZE\r
-CYDEV_PHUB_TDMEM87_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM87_ORIG_TD0\r
-CYREG_PHUB_TDMEM87_ORIG_TD0 EQU 0x40007ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM87_ORIG_TD1\r
-CYREG_PHUB_TDMEM87_ORIG_TD1 EQU 0x40007abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_BASE\r
-CYDEV_PHUB_TDMEM88_BASE EQU 0x40007ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM88_SIZE\r
-CYDEV_PHUB_TDMEM88_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM88_ORIG_TD0\r
-CYREG_PHUB_TDMEM88_ORIG_TD0 EQU 0x40007ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM88_ORIG_TD1\r
-CYREG_PHUB_TDMEM88_ORIG_TD1 EQU 0x40007ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_BASE\r
-CYDEV_PHUB_TDMEM89_BASE EQU 0x40007ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM89_SIZE\r
-CYDEV_PHUB_TDMEM89_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM89_ORIG_TD0\r
-CYREG_PHUB_TDMEM89_ORIG_TD0 EQU 0x40007ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM89_ORIG_TD1\r
-CYREG_PHUB_TDMEM89_ORIG_TD1 EQU 0x40007acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_BASE\r
-CYDEV_PHUB_TDMEM90_BASE EQU 0x40007ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM90_SIZE\r
-CYDEV_PHUB_TDMEM90_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM90_ORIG_TD0\r
-CYREG_PHUB_TDMEM90_ORIG_TD0 EQU 0x40007ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM90_ORIG_TD1\r
-CYREG_PHUB_TDMEM90_ORIG_TD1 EQU 0x40007ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_BASE\r
-CYDEV_PHUB_TDMEM91_BASE EQU 0x40007ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM91_SIZE\r
-CYDEV_PHUB_TDMEM91_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM91_ORIG_TD0\r
-CYREG_PHUB_TDMEM91_ORIG_TD0 EQU 0x40007ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM91_ORIG_TD1\r
-CYREG_PHUB_TDMEM91_ORIG_TD1 EQU 0x40007adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_BASE\r
-CYDEV_PHUB_TDMEM92_BASE EQU 0x40007ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM92_SIZE\r
-CYDEV_PHUB_TDMEM92_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM92_ORIG_TD0\r
-CYREG_PHUB_TDMEM92_ORIG_TD0 EQU 0x40007ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM92_ORIG_TD1\r
-CYREG_PHUB_TDMEM92_ORIG_TD1 EQU 0x40007ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_BASE\r
-CYDEV_PHUB_TDMEM93_BASE EQU 0x40007ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM93_SIZE\r
-CYDEV_PHUB_TDMEM93_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM93_ORIG_TD0\r
-CYREG_PHUB_TDMEM93_ORIG_TD0 EQU 0x40007ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM93_ORIG_TD1\r
-CYREG_PHUB_TDMEM93_ORIG_TD1 EQU 0x40007aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_BASE\r
-CYDEV_PHUB_TDMEM94_BASE EQU 0x40007af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM94_SIZE\r
-CYDEV_PHUB_TDMEM94_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM94_ORIG_TD0\r
-CYREG_PHUB_TDMEM94_ORIG_TD0 EQU 0x40007af0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM94_ORIG_TD1\r
-CYREG_PHUB_TDMEM94_ORIG_TD1 EQU 0x40007af4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_BASE\r
-CYDEV_PHUB_TDMEM95_BASE EQU 0x40007af8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM95_SIZE\r
-CYDEV_PHUB_TDMEM95_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM95_ORIG_TD0\r
-CYREG_PHUB_TDMEM95_ORIG_TD0 EQU 0x40007af8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM95_ORIG_TD1\r
-CYREG_PHUB_TDMEM95_ORIG_TD1 EQU 0x40007afc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_BASE\r
-CYDEV_PHUB_TDMEM96_BASE EQU 0x40007b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM96_SIZE\r
-CYDEV_PHUB_TDMEM96_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM96_ORIG_TD0\r
-CYREG_PHUB_TDMEM96_ORIG_TD0 EQU 0x40007b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM96_ORIG_TD1\r
-CYREG_PHUB_TDMEM96_ORIG_TD1 EQU 0x40007b04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_BASE\r
-CYDEV_PHUB_TDMEM97_BASE EQU 0x40007b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM97_SIZE\r
-CYDEV_PHUB_TDMEM97_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM97_ORIG_TD0\r
-CYREG_PHUB_TDMEM97_ORIG_TD0 EQU 0x40007b08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM97_ORIG_TD1\r
-CYREG_PHUB_TDMEM97_ORIG_TD1 EQU 0x40007b0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_BASE\r
-CYDEV_PHUB_TDMEM98_BASE EQU 0x40007b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM98_SIZE\r
-CYDEV_PHUB_TDMEM98_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM98_ORIG_TD0\r
-CYREG_PHUB_TDMEM98_ORIG_TD0 EQU 0x40007b10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM98_ORIG_TD1\r
-CYREG_PHUB_TDMEM98_ORIG_TD1 EQU 0x40007b14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_BASE\r
-CYDEV_PHUB_TDMEM99_BASE EQU 0x40007b18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM99_SIZE\r
-CYDEV_PHUB_TDMEM99_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM99_ORIG_TD0\r
-CYREG_PHUB_TDMEM99_ORIG_TD0 EQU 0x40007b18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM99_ORIG_TD1\r
-CYREG_PHUB_TDMEM99_ORIG_TD1 EQU 0x40007b1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_BASE\r
-CYDEV_PHUB_TDMEM100_BASE EQU 0x40007b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM100_SIZE\r
-CYDEV_PHUB_TDMEM100_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM100_ORIG_TD0\r
-CYREG_PHUB_TDMEM100_ORIG_TD0 EQU 0x40007b20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM100_ORIG_TD1\r
-CYREG_PHUB_TDMEM100_ORIG_TD1 EQU 0x40007b24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_BASE\r
-CYDEV_PHUB_TDMEM101_BASE EQU 0x40007b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM101_SIZE\r
-CYDEV_PHUB_TDMEM101_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM101_ORIG_TD0\r
-CYREG_PHUB_TDMEM101_ORIG_TD0 EQU 0x40007b28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM101_ORIG_TD1\r
-CYREG_PHUB_TDMEM101_ORIG_TD1 EQU 0x40007b2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_BASE\r
-CYDEV_PHUB_TDMEM102_BASE EQU 0x40007b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM102_SIZE\r
-CYDEV_PHUB_TDMEM102_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM102_ORIG_TD0\r
-CYREG_PHUB_TDMEM102_ORIG_TD0 EQU 0x40007b30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM102_ORIG_TD1\r
-CYREG_PHUB_TDMEM102_ORIG_TD1 EQU 0x40007b34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_BASE\r
-CYDEV_PHUB_TDMEM103_BASE EQU 0x40007b38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM103_SIZE\r
-CYDEV_PHUB_TDMEM103_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM103_ORIG_TD0\r
-CYREG_PHUB_TDMEM103_ORIG_TD0 EQU 0x40007b38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM103_ORIG_TD1\r
-CYREG_PHUB_TDMEM103_ORIG_TD1 EQU 0x40007b3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_BASE\r
-CYDEV_PHUB_TDMEM104_BASE EQU 0x40007b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM104_SIZE\r
-CYDEV_PHUB_TDMEM104_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM104_ORIG_TD0\r
-CYREG_PHUB_TDMEM104_ORIG_TD0 EQU 0x40007b40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM104_ORIG_TD1\r
-CYREG_PHUB_TDMEM104_ORIG_TD1 EQU 0x40007b44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_BASE\r
-CYDEV_PHUB_TDMEM105_BASE EQU 0x40007b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM105_SIZE\r
-CYDEV_PHUB_TDMEM105_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM105_ORIG_TD0\r
-CYREG_PHUB_TDMEM105_ORIG_TD0 EQU 0x40007b48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM105_ORIG_TD1\r
-CYREG_PHUB_TDMEM105_ORIG_TD1 EQU 0x40007b4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_BASE\r
-CYDEV_PHUB_TDMEM106_BASE EQU 0x40007b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM106_SIZE\r
-CYDEV_PHUB_TDMEM106_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM106_ORIG_TD0\r
-CYREG_PHUB_TDMEM106_ORIG_TD0 EQU 0x40007b50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM106_ORIG_TD1\r
-CYREG_PHUB_TDMEM106_ORIG_TD1 EQU 0x40007b54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_BASE\r
-CYDEV_PHUB_TDMEM107_BASE EQU 0x40007b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM107_SIZE\r
-CYDEV_PHUB_TDMEM107_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM107_ORIG_TD0\r
-CYREG_PHUB_TDMEM107_ORIG_TD0 EQU 0x40007b58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM107_ORIG_TD1\r
-CYREG_PHUB_TDMEM107_ORIG_TD1 EQU 0x40007b5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_BASE\r
-CYDEV_PHUB_TDMEM108_BASE EQU 0x40007b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM108_SIZE\r
-CYDEV_PHUB_TDMEM108_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM108_ORIG_TD0\r
-CYREG_PHUB_TDMEM108_ORIG_TD0 EQU 0x40007b60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM108_ORIG_TD1\r
-CYREG_PHUB_TDMEM108_ORIG_TD1 EQU 0x40007b64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_BASE\r
-CYDEV_PHUB_TDMEM109_BASE EQU 0x40007b68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM109_SIZE\r
-CYDEV_PHUB_TDMEM109_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM109_ORIG_TD0\r
-CYREG_PHUB_TDMEM109_ORIG_TD0 EQU 0x40007b68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM109_ORIG_TD1\r
-CYREG_PHUB_TDMEM109_ORIG_TD1 EQU 0x40007b6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_BASE\r
-CYDEV_PHUB_TDMEM110_BASE EQU 0x40007b70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM110_SIZE\r
-CYDEV_PHUB_TDMEM110_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM110_ORIG_TD0\r
-CYREG_PHUB_TDMEM110_ORIG_TD0 EQU 0x40007b70\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM110_ORIG_TD1\r
-CYREG_PHUB_TDMEM110_ORIG_TD1 EQU 0x40007b74\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_BASE\r
-CYDEV_PHUB_TDMEM111_BASE EQU 0x40007b78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM111_SIZE\r
-CYDEV_PHUB_TDMEM111_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM111_ORIG_TD0\r
-CYREG_PHUB_TDMEM111_ORIG_TD0 EQU 0x40007b78\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM111_ORIG_TD1\r
-CYREG_PHUB_TDMEM111_ORIG_TD1 EQU 0x40007b7c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_BASE\r
-CYDEV_PHUB_TDMEM112_BASE EQU 0x40007b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM112_SIZE\r
-CYDEV_PHUB_TDMEM112_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM112_ORIG_TD0\r
-CYREG_PHUB_TDMEM112_ORIG_TD0 EQU 0x40007b80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM112_ORIG_TD1\r
-CYREG_PHUB_TDMEM112_ORIG_TD1 EQU 0x40007b84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_BASE\r
-CYDEV_PHUB_TDMEM113_BASE EQU 0x40007b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM113_SIZE\r
-CYDEV_PHUB_TDMEM113_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM113_ORIG_TD0\r
-CYREG_PHUB_TDMEM113_ORIG_TD0 EQU 0x40007b88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM113_ORIG_TD1\r
-CYREG_PHUB_TDMEM113_ORIG_TD1 EQU 0x40007b8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_BASE\r
-CYDEV_PHUB_TDMEM114_BASE EQU 0x40007b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM114_SIZE\r
-CYDEV_PHUB_TDMEM114_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM114_ORIG_TD0\r
-CYREG_PHUB_TDMEM114_ORIG_TD0 EQU 0x40007b90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM114_ORIG_TD1\r
-CYREG_PHUB_TDMEM114_ORIG_TD1 EQU 0x40007b94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_BASE\r
-CYDEV_PHUB_TDMEM115_BASE EQU 0x40007b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM115_SIZE\r
-CYDEV_PHUB_TDMEM115_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM115_ORIG_TD0\r
-CYREG_PHUB_TDMEM115_ORIG_TD0 EQU 0x40007b98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM115_ORIG_TD1\r
-CYREG_PHUB_TDMEM115_ORIG_TD1 EQU 0x40007b9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_BASE\r
-CYDEV_PHUB_TDMEM116_BASE EQU 0x40007ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM116_SIZE\r
-CYDEV_PHUB_TDMEM116_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM116_ORIG_TD0\r
-CYREG_PHUB_TDMEM116_ORIG_TD0 EQU 0x40007ba0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM116_ORIG_TD1\r
-CYREG_PHUB_TDMEM116_ORIG_TD1 EQU 0x40007ba4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_BASE\r
-CYDEV_PHUB_TDMEM117_BASE EQU 0x40007ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM117_SIZE\r
-CYDEV_PHUB_TDMEM117_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM117_ORIG_TD0\r
-CYREG_PHUB_TDMEM117_ORIG_TD0 EQU 0x40007ba8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM117_ORIG_TD1\r
-CYREG_PHUB_TDMEM117_ORIG_TD1 EQU 0x40007bac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_BASE\r
-CYDEV_PHUB_TDMEM118_BASE EQU 0x40007bb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM118_SIZE\r
-CYDEV_PHUB_TDMEM118_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM118_ORIG_TD0\r
-CYREG_PHUB_TDMEM118_ORIG_TD0 EQU 0x40007bb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM118_ORIG_TD1\r
-CYREG_PHUB_TDMEM118_ORIG_TD1 EQU 0x40007bb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_BASE\r
-CYDEV_PHUB_TDMEM119_BASE EQU 0x40007bb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM119_SIZE\r
-CYDEV_PHUB_TDMEM119_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM119_ORIG_TD0\r
-CYREG_PHUB_TDMEM119_ORIG_TD0 EQU 0x40007bb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM119_ORIG_TD1\r
-CYREG_PHUB_TDMEM119_ORIG_TD1 EQU 0x40007bbc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_BASE\r
-CYDEV_PHUB_TDMEM120_BASE EQU 0x40007bc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM120_SIZE\r
-CYDEV_PHUB_TDMEM120_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM120_ORIG_TD0\r
-CYREG_PHUB_TDMEM120_ORIG_TD0 EQU 0x40007bc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM120_ORIG_TD1\r
-CYREG_PHUB_TDMEM120_ORIG_TD1 EQU 0x40007bc4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_BASE\r
-CYDEV_PHUB_TDMEM121_BASE EQU 0x40007bc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM121_SIZE\r
-CYDEV_PHUB_TDMEM121_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM121_ORIG_TD0\r
-CYREG_PHUB_TDMEM121_ORIG_TD0 EQU 0x40007bc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM121_ORIG_TD1\r
-CYREG_PHUB_TDMEM121_ORIG_TD1 EQU 0x40007bcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_BASE\r
-CYDEV_PHUB_TDMEM122_BASE EQU 0x40007bd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM122_SIZE\r
-CYDEV_PHUB_TDMEM122_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM122_ORIG_TD0\r
-CYREG_PHUB_TDMEM122_ORIG_TD0 EQU 0x40007bd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM122_ORIG_TD1\r
-CYREG_PHUB_TDMEM122_ORIG_TD1 EQU 0x40007bd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_BASE\r
-CYDEV_PHUB_TDMEM123_BASE EQU 0x40007bd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM123_SIZE\r
-CYDEV_PHUB_TDMEM123_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM123_ORIG_TD0\r
-CYREG_PHUB_TDMEM123_ORIG_TD0 EQU 0x40007bd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM123_ORIG_TD1\r
-CYREG_PHUB_TDMEM123_ORIG_TD1 EQU 0x40007bdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_BASE\r
-CYDEV_PHUB_TDMEM124_BASE EQU 0x40007be0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM124_SIZE\r
-CYDEV_PHUB_TDMEM124_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM124_ORIG_TD0\r
-CYREG_PHUB_TDMEM124_ORIG_TD0 EQU 0x40007be0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM124_ORIG_TD1\r
-CYREG_PHUB_TDMEM124_ORIG_TD1 EQU 0x40007be4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_BASE\r
-CYDEV_PHUB_TDMEM125_BASE EQU 0x40007be8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM125_SIZE\r
-CYDEV_PHUB_TDMEM125_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM125_ORIG_TD0\r
-CYREG_PHUB_TDMEM125_ORIG_TD0 EQU 0x40007be8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM125_ORIG_TD1\r
-CYREG_PHUB_TDMEM125_ORIG_TD1 EQU 0x40007bec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_BASE\r
-CYDEV_PHUB_TDMEM126_BASE EQU 0x40007bf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM126_SIZE\r
-CYDEV_PHUB_TDMEM126_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM126_ORIG_TD0\r
-CYREG_PHUB_TDMEM126_ORIG_TD0 EQU 0x40007bf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM126_ORIG_TD1\r
-CYREG_PHUB_TDMEM126_ORIG_TD1 EQU 0x40007bf4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_BASE\r
-CYDEV_PHUB_TDMEM127_BASE EQU 0x40007bf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PHUB_TDMEM127_SIZE\r
-CYDEV_PHUB_TDMEM127_SIZE EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM127_ORIG_TD0\r
-CYREG_PHUB_TDMEM127_ORIG_TD0 EQU 0x40007bf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PHUB_TDMEM127_ORIG_TD1\r
-CYREG_PHUB_TDMEM127_ORIG_TD1 EQU 0x40007bfc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_BASE\r
-CYDEV_EE_BASE EQU 0x40008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EE_SIZE\r
-CYDEV_EE_SIZE EQU 0x00000800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EE_DATA_MBASE\r
-CYREG_EE_DATA_MBASE EQU 0x40008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EE_DATA_MSIZE\r
-CYREG_EE_DATA_MSIZE EQU 0x00000800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_BASE\r
-CYDEV_CAN0_BASE EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_SIZE\r
-CYDEV_CAN0_SIZE EQU 0x000002a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_BASE\r
-CYDEV_CAN0_CSR_BASE EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_CSR_SIZE\r
-CYDEV_CAN0_CSR_SIZE EQU 0x00000018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_INT_SR\r
-CYREG_CAN0_CSR_INT_SR EQU 0x4000a000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_INT_EN\r
-CYREG_CAN0_CSR_INT_EN EQU 0x4000a004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_BUF_SR\r
-CYREG_CAN0_CSR_BUF_SR EQU 0x4000a008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_ERR_SR\r
-CYREG_CAN0_CSR_ERR_SR EQU 0x4000a00c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_CMD\r
-CYREG_CAN0_CSR_CMD EQU 0x4000a010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_CSR_CFG\r
-CYREG_CAN0_CSR_CFG EQU 0x4000a014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_BASE\r
-CYDEV_CAN0_TX0_BASE EQU 0x4000a020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX0_SIZE\r
-CYDEV_CAN0_TX0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX0_CMD\r
-CYREG_CAN0_TX0_CMD EQU 0x4000a020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX0_ID\r
-CYREG_CAN0_TX0_ID EQU 0x4000a024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX0_DH\r
-CYREG_CAN0_TX0_DH EQU 0x4000a028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX0_DL\r
-CYREG_CAN0_TX0_DL EQU 0x4000a02c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_BASE\r
-CYDEV_CAN0_TX1_BASE EQU 0x4000a030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX1_SIZE\r
-CYDEV_CAN0_TX1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX1_CMD\r
-CYREG_CAN0_TX1_CMD EQU 0x4000a030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX1_ID\r
-CYREG_CAN0_TX1_ID EQU 0x4000a034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX1_DH\r
-CYREG_CAN0_TX1_DH EQU 0x4000a038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX1_DL\r
-CYREG_CAN0_TX1_DL EQU 0x4000a03c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_BASE\r
-CYDEV_CAN0_TX2_BASE EQU 0x4000a040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX2_SIZE\r
-CYDEV_CAN0_TX2_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX2_CMD\r
-CYREG_CAN0_TX2_CMD EQU 0x4000a040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX2_ID\r
-CYREG_CAN0_TX2_ID EQU 0x4000a044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX2_DH\r
-CYREG_CAN0_TX2_DH EQU 0x4000a048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX2_DL\r
-CYREG_CAN0_TX2_DL EQU 0x4000a04c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_BASE\r
-CYDEV_CAN0_TX3_BASE EQU 0x4000a050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX3_SIZE\r
-CYDEV_CAN0_TX3_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX3_CMD\r
-CYREG_CAN0_TX3_CMD EQU 0x4000a050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX3_ID\r
-CYREG_CAN0_TX3_ID EQU 0x4000a054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX3_DH\r
-CYREG_CAN0_TX3_DH EQU 0x4000a058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX3_DL\r
-CYREG_CAN0_TX3_DL EQU 0x4000a05c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_BASE\r
-CYDEV_CAN0_TX4_BASE EQU 0x4000a060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX4_SIZE\r
-CYDEV_CAN0_TX4_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX4_CMD\r
-CYREG_CAN0_TX4_CMD EQU 0x4000a060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX4_ID\r
-CYREG_CAN0_TX4_ID EQU 0x4000a064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX4_DH\r
-CYREG_CAN0_TX4_DH EQU 0x4000a068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX4_DL\r
-CYREG_CAN0_TX4_DL EQU 0x4000a06c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_BASE\r
-CYDEV_CAN0_TX5_BASE EQU 0x4000a070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX5_SIZE\r
-CYDEV_CAN0_TX5_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX5_CMD\r
-CYREG_CAN0_TX5_CMD EQU 0x4000a070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX5_ID\r
-CYREG_CAN0_TX5_ID EQU 0x4000a074\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX5_DH\r
-CYREG_CAN0_TX5_DH EQU 0x4000a078\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX5_DL\r
-CYREG_CAN0_TX5_DL EQU 0x4000a07c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_BASE\r
-CYDEV_CAN0_TX6_BASE EQU 0x4000a080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX6_SIZE\r
-CYDEV_CAN0_TX6_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX6_CMD\r
-CYREG_CAN0_TX6_CMD EQU 0x4000a080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX6_ID\r
-CYREG_CAN0_TX6_ID EQU 0x4000a084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX6_DH\r
-CYREG_CAN0_TX6_DH EQU 0x4000a088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX6_DL\r
-CYREG_CAN0_TX6_DL EQU 0x4000a08c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_BASE\r
-CYDEV_CAN0_TX7_BASE EQU 0x4000a090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_TX7_SIZE\r
-CYDEV_CAN0_TX7_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX7_CMD\r
-CYREG_CAN0_TX7_CMD EQU 0x4000a090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX7_ID\r
-CYREG_CAN0_TX7_ID EQU 0x4000a094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX7_DH\r
-CYREG_CAN0_TX7_DH EQU 0x4000a098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_TX7_DL\r
-CYREG_CAN0_TX7_DL EQU 0x4000a09c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_BASE\r
-CYDEV_CAN0_RX0_BASE EQU 0x4000a0a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX0_SIZE\r
-CYDEV_CAN0_RX0_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_CMD\r
-CYREG_CAN0_RX0_CMD EQU 0x4000a0a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_ID\r
-CYREG_CAN0_RX0_ID EQU 0x4000a0a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_DH\r
-CYREG_CAN0_RX0_DH EQU 0x4000a0a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_DL\r
-CYREG_CAN0_RX0_DL EQU 0x4000a0ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_AMR\r
-CYREG_CAN0_RX0_AMR EQU 0x4000a0b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_ACR\r
-CYREG_CAN0_RX0_ACR EQU 0x4000a0b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_AMRD\r
-CYREG_CAN0_RX0_AMRD EQU 0x4000a0b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX0_ACRD\r
-CYREG_CAN0_RX0_ACRD EQU 0x4000a0bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_BASE\r
-CYDEV_CAN0_RX1_BASE EQU 0x4000a0c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX1_SIZE\r
-CYDEV_CAN0_RX1_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_CMD\r
-CYREG_CAN0_RX1_CMD EQU 0x4000a0c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_ID\r
-CYREG_CAN0_RX1_ID EQU 0x4000a0c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_DH\r
-CYREG_CAN0_RX1_DH EQU 0x4000a0c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_DL\r
-CYREG_CAN0_RX1_DL EQU 0x4000a0cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_AMR\r
-CYREG_CAN0_RX1_AMR EQU 0x4000a0d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_ACR\r
-CYREG_CAN0_RX1_ACR EQU 0x4000a0d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_AMRD\r
-CYREG_CAN0_RX1_AMRD EQU 0x4000a0d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX1_ACRD\r
-CYREG_CAN0_RX1_ACRD EQU 0x4000a0dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_BASE\r
-CYDEV_CAN0_RX2_BASE EQU 0x4000a0e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX2_SIZE\r
-CYDEV_CAN0_RX2_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_CMD\r
-CYREG_CAN0_RX2_CMD EQU 0x4000a0e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_ID\r
-CYREG_CAN0_RX2_ID EQU 0x4000a0e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_DH\r
-CYREG_CAN0_RX2_DH EQU 0x4000a0e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_DL\r
-CYREG_CAN0_RX2_DL EQU 0x4000a0ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_AMR\r
-CYREG_CAN0_RX2_AMR EQU 0x4000a0f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_ACR\r
-CYREG_CAN0_RX2_ACR EQU 0x4000a0f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_AMRD\r
-CYREG_CAN0_RX2_AMRD EQU 0x4000a0f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX2_ACRD\r
-CYREG_CAN0_RX2_ACRD EQU 0x4000a0fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_BASE\r
-CYDEV_CAN0_RX3_BASE EQU 0x4000a100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX3_SIZE\r
-CYDEV_CAN0_RX3_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_CMD\r
-CYREG_CAN0_RX3_CMD EQU 0x4000a100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_ID\r
-CYREG_CAN0_RX3_ID EQU 0x4000a104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_DH\r
-CYREG_CAN0_RX3_DH EQU 0x4000a108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_DL\r
-CYREG_CAN0_RX3_DL EQU 0x4000a10c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_AMR\r
-CYREG_CAN0_RX3_AMR EQU 0x4000a110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_ACR\r
-CYREG_CAN0_RX3_ACR EQU 0x4000a114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_AMRD\r
-CYREG_CAN0_RX3_AMRD EQU 0x4000a118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX3_ACRD\r
-CYREG_CAN0_RX3_ACRD EQU 0x4000a11c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_BASE\r
-CYDEV_CAN0_RX4_BASE EQU 0x4000a120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX4_SIZE\r
-CYDEV_CAN0_RX4_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_CMD\r
-CYREG_CAN0_RX4_CMD EQU 0x4000a120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_ID\r
-CYREG_CAN0_RX4_ID EQU 0x4000a124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_DH\r
-CYREG_CAN0_RX4_DH EQU 0x4000a128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_DL\r
-CYREG_CAN0_RX4_DL EQU 0x4000a12c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_AMR\r
-CYREG_CAN0_RX4_AMR EQU 0x4000a130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_ACR\r
-CYREG_CAN0_RX4_ACR EQU 0x4000a134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_AMRD\r
-CYREG_CAN0_RX4_AMRD EQU 0x4000a138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX4_ACRD\r
-CYREG_CAN0_RX4_ACRD EQU 0x4000a13c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_BASE\r
-CYDEV_CAN0_RX5_BASE EQU 0x4000a140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX5_SIZE\r
-CYDEV_CAN0_RX5_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_CMD\r
-CYREG_CAN0_RX5_CMD EQU 0x4000a140\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_ID\r
-CYREG_CAN0_RX5_ID EQU 0x4000a144\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_DH\r
-CYREG_CAN0_RX5_DH EQU 0x4000a148\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_DL\r
-CYREG_CAN0_RX5_DL EQU 0x4000a14c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_AMR\r
-CYREG_CAN0_RX5_AMR EQU 0x4000a150\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_ACR\r
-CYREG_CAN0_RX5_ACR EQU 0x4000a154\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_AMRD\r
-CYREG_CAN0_RX5_AMRD EQU 0x4000a158\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX5_ACRD\r
-CYREG_CAN0_RX5_ACRD EQU 0x4000a15c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_BASE\r
-CYDEV_CAN0_RX6_BASE EQU 0x4000a160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX6_SIZE\r
-CYDEV_CAN0_RX6_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_CMD\r
-CYREG_CAN0_RX6_CMD EQU 0x4000a160\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_ID\r
-CYREG_CAN0_RX6_ID EQU 0x4000a164\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_DH\r
-CYREG_CAN0_RX6_DH EQU 0x4000a168\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_DL\r
-CYREG_CAN0_RX6_DL EQU 0x4000a16c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_AMR\r
-CYREG_CAN0_RX6_AMR EQU 0x4000a170\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_ACR\r
-CYREG_CAN0_RX6_ACR EQU 0x4000a174\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_AMRD\r
-CYREG_CAN0_RX6_AMRD EQU 0x4000a178\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX6_ACRD\r
-CYREG_CAN0_RX6_ACRD EQU 0x4000a17c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_BASE\r
-CYDEV_CAN0_RX7_BASE EQU 0x4000a180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX7_SIZE\r
-CYDEV_CAN0_RX7_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_CMD\r
-CYREG_CAN0_RX7_CMD EQU 0x4000a180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_ID\r
-CYREG_CAN0_RX7_ID EQU 0x4000a184\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_DH\r
-CYREG_CAN0_RX7_DH EQU 0x4000a188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_DL\r
-CYREG_CAN0_RX7_DL EQU 0x4000a18c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_AMR\r
-CYREG_CAN0_RX7_AMR EQU 0x4000a190\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_ACR\r
-CYREG_CAN0_RX7_ACR EQU 0x4000a194\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_AMRD\r
-CYREG_CAN0_RX7_AMRD EQU 0x4000a198\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX7_ACRD\r
-CYREG_CAN0_RX7_ACRD EQU 0x4000a19c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_BASE\r
-CYDEV_CAN0_RX8_BASE EQU 0x4000a1a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX8_SIZE\r
-CYDEV_CAN0_RX8_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_CMD\r
-CYREG_CAN0_RX8_CMD EQU 0x4000a1a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_ID\r
-CYREG_CAN0_RX8_ID EQU 0x4000a1a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_DH\r
-CYREG_CAN0_RX8_DH EQU 0x4000a1a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_DL\r
-CYREG_CAN0_RX8_DL EQU 0x4000a1ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_AMR\r
-CYREG_CAN0_RX8_AMR EQU 0x4000a1b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_ACR\r
-CYREG_CAN0_RX8_ACR EQU 0x4000a1b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_AMRD\r
-CYREG_CAN0_RX8_AMRD EQU 0x4000a1b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX8_ACRD\r
-CYREG_CAN0_RX8_ACRD EQU 0x4000a1bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_BASE\r
-CYDEV_CAN0_RX9_BASE EQU 0x4000a1c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX9_SIZE\r
-CYDEV_CAN0_RX9_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_CMD\r
-CYREG_CAN0_RX9_CMD EQU 0x4000a1c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_ID\r
-CYREG_CAN0_RX9_ID EQU 0x4000a1c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_DH\r
-CYREG_CAN0_RX9_DH EQU 0x4000a1c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_DL\r
-CYREG_CAN0_RX9_DL EQU 0x4000a1cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_AMR\r
-CYREG_CAN0_RX9_AMR EQU 0x4000a1d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_ACR\r
-CYREG_CAN0_RX9_ACR EQU 0x4000a1d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_AMRD\r
-CYREG_CAN0_RX9_AMRD EQU 0x4000a1d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX9_ACRD\r
-CYREG_CAN0_RX9_ACRD EQU 0x4000a1dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_BASE\r
-CYDEV_CAN0_RX10_BASE EQU 0x4000a1e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX10_SIZE\r
-CYDEV_CAN0_RX10_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_CMD\r
-CYREG_CAN0_RX10_CMD EQU 0x4000a1e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_ID\r
-CYREG_CAN0_RX10_ID EQU 0x4000a1e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_DH\r
-CYREG_CAN0_RX10_DH EQU 0x4000a1e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_DL\r
-CYREG_CAN0_RX10_DL EQU 0x4000a1ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_AMR\r
-CYREG_CAN0_RX10_AMR EQU 0x4000a1f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_ACR\r
-CYREG_CAN0_RX10_ACR EQU 0x4000a1f4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_AMRD\r
-CYREG_CAN0_RX10_AMRD EQU 0x4000a1f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX10_ACRD\r
-CYREG_CAN0_RX10_ACRD EQU 0x4000a1fc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_BASE\r
-CYDEV_CAN0_RX11_BASE EQU 0x4000a200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX11_SIZE\r
-CYDEV_CAN0_RX11_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_CMD\r
-CYREG_CAN0_RX11_CMD EQU 0x4000a200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_ID\r
-CYREG_CAN0_RX11_ID EQU 0x4000a204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_DH\r
-CYREG_CAN0_RX11_DH EQU 0x4000a208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_DL\r
-CYREG_CAN0_RX11_DL EQU 0x4000a20c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_AMR\r
-CYREG_CAN0_RX11_AMR EQU 0x4000a210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_ACR\r
-CYREG_CAN0_RX11_ACR EQU 0x4000a214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_AMRD\r
-CYREG_CAN0_RX11_AMRD EQU 0x4000a218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX11_ACRD\r
-CYREG_CAN0_RX11_ACRD EQU 0x4000a21c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_BASE\r
-CYDEV_CAN0_RX12_BASE EQU 0x4000a220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX12_SIZE\r
-CYDEV_CAN0_RX12_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_CMD\r
-CYREG_CAN0_RX12_CMD EQU 0x4000a220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_ID\r
-CYREG_CAN0_RX12_ID EQU 0x4000a224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_DH\r
-CYREG_CAN0_RX12_DH EQU 0x4000a228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_DL\r
-CYREG_CAN0_RX12_DL EQU 0x4000a22c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_AMR\r
-CYREG_CAN0_RX12_AMR EQU 0x4000a230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_ACR\r
-CYREG_CAN0_RX12_ACR EQU 0x4000a234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_AMRD\r
-CYREG_CAN0_RX12_AMRD EQU 0x4000a238\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX12_ACRD\r
-CYREG_CAN0_RX12_ACRD EQU 0x4000a23c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_BASE\r
-CYDEV_CAN0_RX13_BASE EQU 0x4000a240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX13_SIZE\r
-CYDEV_CAN0_RX13_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_CMD\r
-CYREG_CAN0_RX13_CMD EQU 0x4000a240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_ID\r
-CYREG_CAN0_RX13_ID EQU 0x4000a244\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_DH\r
-CYREG_CAN0_RX13_DH EQU 0x4000a248\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_DL\r
-CYREG_CAN0_RX13_DL EQU 0x4000a24c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_AMR\r
-CYREG_CAN0_RX13_AMR EQU 0x4000a250\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_ACR\r
-CYREG_CAN0_RX13_ACR EQU 0x4000a254\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_AMRD\r
-CYREG_CAN0_RX13_AMRD EQU 0x4000a258\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX13_ACRD\r
-CYREG_CAN0_RX13_ACRD EQU 0x4000a25c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_BASE\r
-CYDEV_CAN0_RX14_BASE EQU 0x4000a260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX14_SIZE\r
-CYDEV_CAN0_RX14_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_CMD\r
-CYREG_CAN0_RX14_CMD EQU 0x4000a260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_ID\r
-CYREG_CAN0_RX14_ID EQU 0x4000a264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_DH\r
-CYREG_CAN0_RX14_DH EQU 0x4000a268\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_DL\r
-CYREG_CAN0_RX14_DL EQU 0x4000a26c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_AMR\r
-CYREG_CAN0_RX14_AMR EQU 0x4000a270\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_ACR\r
-CYREG_CAN0_RX14_ACR EQU 0x4000a274\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_AMRD\r
-CYREG_CAN0_RX14_AMRD EQU 0x4000a278\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX14_ACRD\r
-CYREG_CAN0_RX14_ACRD EQU 0x4000a27c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_BASE\r
-CYDEV_CAN0_RX15_BASE EQU 0x4000a280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CAN0_RX15_SIZE\r
-CYDEV_CAN0_RX15_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_CMD\r
-CYREG_CAN0_RX15_CMD EQU 0x4000a280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_ID\r
-CYREG_CAN0_RX15_ID EQU 0x4000a284\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_DH\r
-CYREG_CAN0_RX15_DH EQU 0x4000a288\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_DL\r
-CYREG_CAN0_RX15_DL EQU 0x4000a28c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_AMR\r
-CYREG_CAN0_RX15_AMR EQU 0x4000a290\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_ACR\r
-CYREG_CAN0_RX15_ACR EQU 0x4000a294\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_AMRD\r
-CYREG_CAN0_RX15_AMRD EQU 0x4000a298\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CAN0_RX15_ACRD\r
-CYREG_CAN0_RX15_ACRD EQU 0x4000a29c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_BASE\r
-CYDEV_DFB0_BASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_SIZE\r
-CYDEV_DFB0_SIZE EQU 0x000007b5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_BASE\r
-CYDEV_DFB0_DPA_SRAM_BASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPA_SRAM_SIZE\r
-CYDEV_DFB0_DPA_SRAM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DPA_SRAM_DATA_MBASE\r
-CYREG_DFB0_DPA_SRAM_DATA_MBASE EQU 0x4000c000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DPA_SRAM_DATA_MSIZE\r
-CYREG_DFB0_DPA_SRAM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_BASE\r
-CYDEV_DFB0_DPB_SRAM_BASE EQU 0x4000c200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_DPB_SRAM_SIZE\r
-CYDEV_DFB0_DPB_SRAM_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DPB_SRAM_DATA_MBASE\r
-CYREG_DFB0_DPB_SRAM_DATA_MBASE EQU 0x4000c200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DPB_SRAM_DATA_MSIZE\r
-CYREG_DFB0_DPB_SRAM_DATA_MSIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_BASE\r
-CYDEV_DFB0_CSA_SRAM_BASE EQU 0x4000c400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSA_SRAM_SIZE\r
-CYDEV_DFB0_CSA_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_CSA_SRAM_DATA_MBASE\r
-CYREG_DFB0_CSA_SRAM_DATA_MBASE EQU 0x4000c400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_CSA_SRAM_DATA_MSIZE\r
-CYREG_DFB0_CSA_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_BASE\r
-CYDEV_DFB0_CSB_SRAM_BASE EQU 0x4000c500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_CSB_SRAM_SIZE\r
-CYDEV_DFB0_CSB_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_CSB_SRAM_DATA_MBASE\r
-CYREG_DFB0_CSB_SRAM_DATA_MBASE EQU 0x4000c500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_CSB_SRAM_DATA_MSIZE\r
-CYREG_DFB0_CSB_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_BASE\r
-CYDEV_DFB0_FSM_SRAM_BASE EQU 0x4000c600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_FSM_SRAM_SIZE\r
-CYDEV_DFB0_FSM_SRAM_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_FSM_SRAM_DATA_MBASE\r
-CYREG_DFB0_FSM_SRAM_DATA_MBASE EQU 0x4000c600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_FSM_SRAM_DATA_MSIZE\r
-CYREG_DFB0_FSM_SRAM_DATA_MSIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_BASE\r
-CYDEV_DFB0_ACU_SRAM_BASE EQU 0x4000c700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DFB0_ACU_SRAM_SIZE\r
-CYDEV_DFB0_ACU_SRAM_SIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_ACU_SRAM_DATA_MBASE\r
-CYREG_DFB0_ACU_SRAM_DATA_MBASE EQU 0x4000c700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_ACU_SRAM_DATA_MSIZE\r
-CYREG_DFB0_ACU_SRAM_DATA_MSIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_CR\r
-CYREG_DFB0_CR EQU 0x4000c780\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_SR\r
-CYREG_DFB0_SR EQU 0x4000c784\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_RAM_EN\r
-CYREG_DFB0_RAM_EN EQU 0x4000c788\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_RAM_DIR\r
-CYREG_DFB0_RAM_DIR EQU 0x4000c78c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_SEMA\r
-CYREG_DFB0_SEMA EQU 0x4000c790\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DSI_CTRL\r
-CYREG_DFB0_DSI_CTRL EQU 0x4000c794\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_INT_CTRL\r
-CYREG_DFB0_INT_CTRL EQU 0x4000c798\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DMA_CTRL\r
-CYREG_DFB0_DMA_CTRL EQU 0x4000c79c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEA\r
-CYREG_DFB0_STAGEA EQU 0x4000c7a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEAM\r
-CYREG_DFB0_STAGEAM EQU 0x4000c7a1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEAH\r
-CYREG_DFB0_STAGEAH EQU 0x4000c7a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEB\r
-CYREG_DFB0_STAGEB EQU 0x4000c7a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEBM\r
-CYREG_DFB0_STAGEBM EQU 0x4000c7a5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_STAGEBH\r
-CYREG_DFB0_STAGEBH EQU 0x4000c7a6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDA\r
-CYREG_DFB0_HOLDA EQU 0x4000c7a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDAM\r
-CYREG_DFB0_HOLDAM EQU 0x4000c7a9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDAH\r
-CYREG_DFB0_HOLDAH EQU 0x4000c7aa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDAS\r
-CYREG_DFB0_HOLDAS EQU 0x4000c7ab\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDB\r
-CYREG_DFB0_HOLDB EQU 0x4000c7ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDBM\r
-CYREG_DFB0_HOLDBM EQU 0x4000c7ad\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDBH\r
-CYREG_DFB0_HOLDBH EQU 0x4000c7ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_HOLDBS\r
-CYREG_DFB0_HOLDBS EQU 0x4000c7af\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_COHER\r
-CYREG_DFB0_COHER EQU 0x4000c7b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DFB0_DALIGN\r
-CYREG_DFB0_DALIGN EQU 0x4000c7b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BASE\r
-CYDEV_UCFG_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_SIZE\r
-CYDEV_UCFG_SIZE EQU 0x00005040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_BASE\r
-CYDEV_UCFG_B0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_SIZE\r
-CYDEV_UCFG_B0_SIZE EQU 0x00000fef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_BASE\r
-CYDEV_UCFG_B0_P0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_SIZE\r
-CYDEV_UCFG_B0_P0_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_BASE\r
-CYDEV_UCFG_B0_P0_U0_BASE EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U0_SIZE\r
-CYDEV_UCFG_B0_P0_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT0\r
-CYREG_B0_P0_U0_PLD_IT0 EQU 0x40010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT1\r
-CYREG_B0_P0_U0_PLD_IT1 EQU 0x40010004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT2\r
-CYREG_B0_P0_U0_PLD_IT2 EQU 0x40010008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT3\r
-CYREG_B0_P0_U0_PLD_IT3 EQU 0x4001000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT4\r
-CYREG_B0_P0_U0_PLD_IT4 EQU 0x40010010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT5\r
-CYREG_B0_P0_U0_PLD_IT5 EQU 0x40010014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT6\r
-CYREG_B0_P0_U0_PLD_IT6 EQU 0x40010018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT7\r
-CYREG_B0_P0_U0_PLD_IT7 EQU 0x4001001c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT8\r
-CYREG_B0_P0_U0_PLD_IT8 EQU 0x40010020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT9\r
-CYREG_B0_P0_U0_PLD_IT9 EQU 0x40010024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT10\r
-CYREG_B0_P0_U0_PLD_IT10 EQU 0x40010028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_IT11\r
-CYREG_B0_P0_U0_PLD_IT11 EQU 0x4001002c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT0\r
-CYREG_B0_P0_U0_PLD_ORT0 EQU 0x40010030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT1\r
-CYREG_B0_P0_U0_PLD_ORT1 EQU 0x40010032\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT2\r
-CYREG_B0_P0_U0_PLD_ORT2 EQU 0x40010034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_PLD_ORT3\r
-CYREG_B0_P0_U0_PLD_ORT3 EQU 0x40010036\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P0_U0_MC_CFG_CEN_CONST EQU 0x40010038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_XORFB\r
-CYREG_B0_P0_U0_MC_CFG_XORFB EQU 0x4001003a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P0_U0_MC_CFG_SET_RESET EQU 0x4001003c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_MC_CFG_BYPASS\r
-CYREG_B0_P0_U0_MC_CFG_BYPASS EQU 0x4001003e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG0\r
-CYREG_B0_P0_U0_CFG0 EQU 0x40010040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG1\r
-CYREG_B0_P0_U0_CFG1 EQU 0x40010041\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG2\r
-CYREG_B0_P0_U0_CFG2 EQU 0x40010042\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG3\r
-CYREG_B0_P0_U0_CFG3 EQU 0x40010043\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG4\r
-CYREG_B0_P0_U0_CFG4 EQU 0x40010044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG5\r
-CYREG_B0_P0_U0_CFG5 EQU 0x40010045\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG6\r
-CYREG_B0_P0_U0_CFG6 EQU 0x40010046\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG7\r
-CYREG_B0_P0_U0_CFG7 EQU 0x40010047\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG8\r
-CYREG_B0_P0_U0_CFG8 EQU 0x40010048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG9\r
-CYREG_B0_P0_U0_CFG9 EQU 0x40010049\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG10\r
-CYREG_B0_P0_U0_CFG10 EQU 0x4001004a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG11\r
-CYREG_B0_P0_U0_CFG11 EQU 0x4001004b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG12\r
-CYREG_B0_P0_U0_CFG12 EQU 0x4001004c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG13\r
-CYREG_B0_P0_U0_CFG13 EQU 0x4001004d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG14\r
-CYREG_B0_P0_U0_CFG14 EQU 0x4001004e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG15\r
-CYREG_B0_P0_U0_CFG15 EQU 0x4001004f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG16\r
-CYREG_B0_P0_U0_CFG16 EQU 0x40010050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG17\r
-CYREG_B0_P0_U0_CFG17 EQU 0x40010051\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG18\r
-CYREG_B0_P0_U0_CFG18 EQU 0x40010052\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG19\r
-CYREG_B0_P0_U0_CFG19 EQU 0x40010053\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG20\r
-CYREG_B0_P0_U0_CFG20 EQU 0x40010054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG21\r
-CYREG_B0_P0_U0_CFG21 EQU 0x40010055\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG22\r
-CYREG_B0_P0_U0_CFG22 EQU 0x40010056\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG23\r
-CYREG_B0_P0_U0_CFG23 EQU 0x40010057\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG24\r
-CYREG_B0_P0_U0_CFG24 EQU 0x40010058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG25\r
-CYREG_B0_P0_U0_CFG25 EQU 0x40010059\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG26\r
-CYREG_B0_P0_U0_CFG26 EQU 0x4001005a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG27\r
-CYREG_B0_P0_U0_CFG27 EQU 0x4001005b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG28\r
-CYREG_B0_P0_U0_CFG28 EQU 0x4001005c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG29\r
-CYREG_B0_P0_U0_CFG29 EQU 0x4001005d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG30\r
-CYREG_B0_P0_U0_CFG30 EQU 0x4001005e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_CFG31\r
-CYREG_B0_P0_U0_CFG31 EQU 0x4001005f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG0\r
-CYREG_B0_P0_U0_DCFG0 EQU 0x40010060\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG1\r
-CYREG_B0_P0_U0_DCFG1 EQU 0x40010062\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG2\r
-CYREG_B0_P0_U0_DCFG2 EQU 0x40010064\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG3\r
-CYREG_B0_P0_U0_DCFG3 EQU 0x40010066\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG4\r
-CYREG_B0_P0_U0_DCFG4 EQU 0x40010068\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG5\r
-CYREG_B0_P0_U0_DCFG5 EQU 0x4001006a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG6\r
-CYREG_B0_P0_U0_DCFG6 EQU 0x4001006c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U0_DCFG7\r
-CYREG_B0_P0_U0_DCFG7 EQU 0x4001006e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_BASE\r
-CYDEV_UCFG_B0_P0_U1_BASE EQU 0x40010080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_U1_SIZE\r
-CYDEV_UCFG_B0_P0_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT0\r
-CYREG_B0_P0_U1_PLD_IT0 EQU 0x40010080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT1\r
-CYREG_B0_P0_U1_PLD_IT1 EQU 0x40010084\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT2\r
-CYREG_B0_P0_U1_PLD_IT2 EQU 0x40010088\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT3\r
-CYREG_B0_P0_U1_PLD_IT3 EQU 0x4001008c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT4\r
-CYREG_B0_P0_U1_PLD_IT4 EQU 0x40010090\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT5\r
-CYREG_B0_P0_U1_PLD_IT5 EQU 0x40010094\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT6\r
-CYREG_B0_P0_U1_PLD_IT6 EQU 0x40010098\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT7\r
-CYREG_B0_P0_U1_PLD_IT7 EQU 0x4001009c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT8\r
-CYREG_B0_P0_U1_PLD_IT8 EQU 0x400100a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT9\r
-CYREG_B0_P0_U1_PLD_IT9 EQU 0x400100a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT10\r
-CYREG_B0_P0_U1_PLD_IT10 EQU 0x400100a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_IT11\r
-CYREG_B0_P0_U1_PLD_IT11 EQU 0x400100ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT0\r
-CYREG_B0_P0_U1_PLD_ORT0 EQU 0x400100b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT1\r
-CYREG_B0_P0_U1_PLD_ORT1 EQU 0x400100b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT2\r
-CYREG_B0_P0_U1_PLD_ORT2 EQU 0x400100b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_PLD_ORT3\r
-CYREG_B0_P0_U1_PLD_ORT3 EQU 0x400100b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P0_U1_MC_CFG_CEN_CONST EQU 0x400100b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_XORFB\r
-CYREG_B0_P0_U1_MC_CFG_XORFB EQU 0x400100ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P0_U1_MC_CFG_SET_RESET EQU 0x400100bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_MC_CFG_BYPASS\r
-CYREG_B0_P0_U1_MC_CFG_BYPASS EQU 0x400100be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG0\r
-CYREG_B0_P0_U1_CFG0 EQU 0x400100c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG1\r
-CYREG_B0_P0_U1_CFG1 EQU 0x400100c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG2\r
-CYREG_B0_P0_U1_CFG2 EQU 0x400100c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG3\r
-CYREG_B0_P0_U1_CFG3 EQU 0x400100c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG4\r
-CYREG_B0_P0_U1_CFG4 EQU 0x400100c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG5\r
-CYREG_B0_P0_U1_CFG5 EQU 0x400100c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG6\r
-CYREG_B0_P0_U1_CFG6 EQU 0x400100c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG7\r
-CYREG_B0_P0_U1_CFG7 EQU 0x400100c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG8\r
-CYREG_B0_P0_U1_CFG8 EQU 0x400100c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG9\r
-CYREG_B0_P0_U1_CFG9 EQU 0x400100c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG10\r
-CYREG_B0_P0_U1_CFG10 EQU 0x400100ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG11\r
-CYREG_B0_P0_U1_CFG11 EQU 0x400100cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG12\r
-CYREG_B0_P0_U1_CFG12 EQU 0x400100cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG13\r
-CYREG_B0_P0_U1_CFG13 EQU 0x400100cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG14\r
-CYREG_B0_P0_U1_CFG14 EQU 0x400100ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG15\r
-CYREG_B0_P0_U1_CFG15 EQU 0x400100cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG16\r
-CYREG_B0_P0_U1_CFG16 EQU 0x400100d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG17\r
-CYREG_B0_P0_U1_CFG17 EQU 0x400100d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG18\r
-CYREG_B0_P0_U1_CFG18 EQU 0x400100d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG19\r
-CYREG_B0_P0_U1_CFG19 EQU 0x400100d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG20\r
-CYREG_B0_P0_U1_CFG20 EQU 0x400100d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG21\r
-CYREG_B0_P0_U1_CFG21 EQU 0x400100d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG22\r
-CYREG_B0_P0_U1_CFG22 EQU 0x400100d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG23\r
-CYREG_B0_P0_U1_CFG23 EQU 0x400100d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG24\r
-CYREG_B0_P0_U1_CFG24 EQU 0x400100d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG25\r
-CYREG_B0_P0_U1_CFG25 EQU 0x400100d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG26\r
-CYREG_B0_P0_U1_CFG26 EQU 0x400100da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG27\r
-CYREG_B0_P0_U1_CFG27 EQU 0x400100db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG28\r
-CYREG_B0_P0_U1_CFG28 EQU 0x400100dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG29\r
-CYREG_B0_P0_U1_CFG29 EQU 0x400100dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG30\r
-CYREG_B0_P0_U1_CFG30 EQU 0x400100de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_CFG31\r
-CYREG_B0_P0_U1_CFG31 EQU 0x400100df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG0\r
-CYREG_B0_P0_U1_DCFG0 EQU 0x400100e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG1\r
-CYREG_B0_P0_U1_DCFG1 EQU 0x400100e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG2\r
-CYREG_B0_P0_U1_DCFG2 EQU 0x400100e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG3\r
-CYREG_B0_P0_U1_DCFG3 EQU 0x400100e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG4\r
-CYREG_B0_P0_U1_DCFG4 EQU 0x400100e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG5\r
-CYREG_B0_P0_U1_DCFG5 EQU 0x400100ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG6\r
-CYREG_B0_P0_U1_DCFG6 EQU 0x400100ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P0_U1_DCFG7\r
-CYREG_B0_P0_U1_DCFG7 EQU 0x400100ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_BASE\r
-CYDEV_UCFG_B0_P0_ROUTE_BASE EQU 0x40010100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P0_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P0_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_BASE\r
-CYDEV_UCFG_B0_P1_BASE EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_SIZE\r
-CYDEV_UCFG_B0_P1_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_BASE\r
-CYDEV_UCFG_B0_P1_U0_BASE EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U0_SIZE\r
-CYDEV_UCFG_B0_P1_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT0\r
-CYREG_B0_P1_U0_PLD_IT0 EQU 0x40010200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT1\r
-CYREG_B0_P1_U0_PLD_IT1 EQU 0x40010204\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT2\r
-CYREG_B0_P1_U0_PLD_IT2 EQU 0x40010208\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT3\r
-CYREG_B0_P1_U0_PLD_IT3 EQU 0x4001020c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT4\r
-CYREG_B0_P1_U0_PLD_IT4 EQU 0x40010210\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT5\r
-CYREG_B0_P1_U0_PLD_IT5 EQU 0x40010214\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT6\r
-CYREG_B0_P1_U0_PLD_IT6 EQU 0x40010218\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT7\r
-CYREG_B0_P1_U0_PLD_IT7 EQU 0x4001021c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT8\r
-CYREG_B0_P1_U0_PLD_IT8 EQU 0x40010220\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT9\r
-CYREG_B0_P1_U0_PLD_IT9 EQU 0x40010224\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT10\r
-CYREG_B0_P1_U0_PLD_IT10 EQU 0x40010228\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_IT11\r
-CYREG_B0_P1_U0_PLD_IT11 EQU 0x4001022c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT0\r
-CYREG_B0_P1_U0_PLD_ORT0 EQU 0x40010230\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT1\r
-CYREG_B0_P1_U0_PLD_ORT1 EQU 0x40010232\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT2\r
-CYREG_B0_P1_U0_PLD_ORT2 EQU 0x40010234\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_PLD_ORT3\r
-CYREG_B0_P1_U0_PLD_ORT3 EQU 0x40010236\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P1_U0_MC_CFG_CEN_CONST EQU 0x40010238\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_XORFB\r
-CYREG_B0_P1_U0_MC_CFG_XORFB EQU 0x4001023a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P1_U0_MC_CFG_SET_RESET EQU 0x4001023c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_MC_CFG_BYPASS\r
-CYREG_B0_P1_U0_MC_CFG_BYPASS EQU 0x4001023e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG0\r
-CYREG_B0_P1_U0_CFG0 EQU 0x40010240\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG1\r
-CYREG_B0_P1_U0_CFG1 EQU 0x40010241\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG2\r
-CYREG_B0_P1_U0_CFG2 EQU 0x40010242\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG3\r
-CYREG_B0_P1_U0_CFG3 EQU 0x40010243\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG4\r
-CYREG_B0_P1_U0_CFG4 EQU 0x40010244\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG5\r
-CYREG_B0_P1_U0_CFG5 EQU 0x40010245\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG6\r
-CYREG_B0_P1_U0_CFG6 EQU 0x40010246\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG7\r
-CYREG_B0_P1_U0_CFG7 EQU 0x40010247\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG8\r
-CYREG_B0_P1_U0_CFG8 EQU 0x40010248\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG9\r
-CYREG_B0_P1_U0_CFG9 EQU 0x40010249\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG10\r
-CYREG_B0_P1_U0_CFG10 EQU 0x4001024a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG11\r
-CYREG_B0_P1_U0_CFG11 EQU 0x4001024b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG12\r
-CYREG_B0_P1_U0_CFG12 EQU 0x4001024c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG13\r
-CYREG_B0_P1_U0_CFG13 EQU 0x4001024d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG14\r
-CYREG_B0_P1_U0_CFG14 EQU 0x4001024e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG15\r
-CYREG_B0_P1_U0_CFG15 EQU 0x4001024f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG16\r
-CYREG_B0_P1_U0_CFG16 EQU 0x40010250\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG17\r
-CYREG_B0_P1_U0_CFG17 EQU 0x40010251\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG18\r
-CYREG_B0_P1_U0_CFG18 EQU 0x40010252\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG19\r
-CYREG_B0_P1_U0_CFG19 EQU 0x40010253\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG20\r
-CYREG_B0_P1_U0_CFG20 EQU 0x40010254\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG21\r
-CYREG_B0_P1_U0_CFG21 EQU 0x40010255\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG22\r
-CYREG_B0_P1_U0_CFG22 EQU 0x40010256\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG23\r
-CYREG_B0_P1_U0_CFG23 EQU 0x40010257\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG24\r
-CYREG_B0_P1_U0_CFG24 EQU 0x40010258\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG25\r
-CYREG_B0_P1_U0_CFG25 EQU 0x40010259\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG26\r
-CYREG_B0_P1_U0_CFG26 EQU 0x4001025a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG27\r
-CYREG_B0_P1_U0_CFG27 EQU 0x4001025b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG28\r
-CYREG_B0_P1_U0_CFG28 EQU 0x4001025c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG29\r
-CYREG_B0_P1_U0_CFG29 EQU 0x4001025d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG30\r
-CYREG_B0_P1_U0_CFG30 EQU 0x4001025e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_CFG31\r
-CYREG_B0_P1_U0_CFG31 EQU 0x4001025f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG0\r
-CYREG_B0_P1_U0_DCFG0 EQU 0x40010260\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG1\r
-CYREG_B0_P1_U0_DCFG1 EQU 0x40010262\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG2\r
-CYREG_B0_P1_U0_DCFG2 EQU 0x40010264\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG3\r
-CYREG_B0_P1_U0_DCFG3 EQU 0x40010266\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG4\r
-CYREG_B0_P1_U0_DCFG4 EQU 0x40010268\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG5\r
-CYREG_B0_P1_U0_DCFG5 EQU 0x4001026a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG6\r
-CYREG_B0_P1_U0_DCFG6 EQU 0x4001026c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U0_DCFG7\r
-CYREG_B0_P1_U0_DCFG7 EQU 0x4001026e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_BASE\r
-CYDEV_UCFG_B0_P1_U1_BASE EQU 0x40010280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_U1_SIZE\r
-CYDEV_UCFG_B0_P1_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT0\r
-CYREG_B0_P1_U1_PLD_IT0 EQU 0x40010280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT1\r
-CYREG_B0_P1_U1_PLD_IT1 EQU 0x40010284\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT2\r
-CYREG_B0_P1_U1_PLD_IT2 EQU 0x40010288\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT3\r
-CYREG_B0_P1_U1_PLD_IT3 EQU 0x4001028c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT4\r
-CYREG_B0_P1_U1_PLD_IT4 EQU 0x40010290\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT5\r
-CYREG_B0_P1_U1_PLD_IT5 EQU 0x40010294\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT6\r
-CYREG_B0_P1_U1_PLD_IT6 EQU 0x40010298\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT7\r
-CYREG_B0_P1_U1_PLD_IT7 EQU 0x4001029c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT8\r
-CYREG_B0_P1_U1_PLD_IT8 EQU 0x400102a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT9\r
-CYREG_B0_P1_U1_PLD_IT9 EQU 0x400102a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT10\r
-CYREG_B0_P1_U1_PLD_IT10 EQU 0x400102a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_IT11\r
-CYREG_B0_P1_U1_PLD_IT11 EQU 0x400102ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT0\r
-CYREG_B0_P1_U1_PLD_ORT0 EQU 0x400102b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT1\r
-CYREG_B0_P1_U1_PLD_ORT1 EQU 0x400102b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT2\r
-CYREG_B0_P1_U1_PLD_ORT2 EQU 0x400102b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_PLD_ORT3\r
-CYREG_B0_P1_U1_PLD_ORT3 EQU 0x400102b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P1_U1_MC_CFG_CEN_CONST EQU 0x400102b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_XORFB\r
-CYREG_B0_P1_U1_MC_CFG_XORFB EQU 0x400102ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P1_U1_MC_CFG_SET_RESET EQU 0x400102bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_MC_CFG_BYPASS\r
-CYREG_B0_P1_U1_MC_CFG_BYPASS EQU 0x400102be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG0\r
-CYREG_B0_P1_U1_CFG0 EQU 0x400102c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG1\r
-CYREG_B0_P1_U1_CFG1 EQU 0x400102c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG2\r
-CYREG_B0_P1_U1_CFG2 EQU 0x400102c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG3\r
-CYREG_B0_P1_U1_CFG3 EQU 0x400102c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG4\r
-CYREG_B0_P1_U1_CFG4 EQU 0x400102c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG5\r
-CYREG_B0_P1_U1_CFG5 EQU 0x400102c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG6\r
-CYREG_B0_P1_U1_CFG6 EQU 0x400102c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG7\r
-CYREG_B0_P1_U1_CFG7 EQU 0x400102c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG8\r
-CYREG_B0_P1_U1_CFG8 EQU 0x400102c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG9\r
-CYREG_B0_P1_U1_CFG9 EQU 0x400102c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG10\r
-CYREG_B0_P1_U1_CFG10 EQU 0x400102ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG11\r
-CYREG_B0_P1_U1_CFG11 EQU 0x400102cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG12\r
-CYREG_B0_P1_U1_CFG12 EQU 0x400102cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG13\r
-CYREG_B0_P1_U1_CFG13 EQU 0x400102cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG14\r
-CYREG_B0_P1_U1_CFG14 EQU 0x400102ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG15\r
-CYREG_B0_P1_U1_CFG15 EQU 0x400102cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG16\r
-CYREG_B0_P1_U1_CFG16 EQU 0x400102d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG17\r
-CYREG_B0_P1_U1_CFG17 EQU 0x400102d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG18\r
-CYREG_B0_P1_U1_CFG18 EQU 0x400102d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG19\r
-CYREG_B0_P1_U1_CFG19 EQU 0x400102d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG20\r
-CYREG_B0_P1_U1_CFG20 EQU 0x400102d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG21\r
-CYREG_B0_P1_U1_CFG21 EQU 0x400102d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG22\r
-CYREG_B0_P1_U1_CFG22 EQU 0x400102d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG23\r
-CYREG_B0_P1_U1_CFG23 EQU 0x400102d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG24\r
-CYREG_B0_P1_U1_CFG24 EQU 0x400102d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG25\r
-CYREG_B0_P1_U1_CFG25 EQU 0x400102d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG26\r
-CYREG_B0_P1_U1_CFG26 EQU 0x400102da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG27\r
-CYREG_B0_P1_U1_CFG27 EQU 0x400102db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG28\r
-CYREG_B0_P1_U1_CFG28 EQU 0x400102dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG29\r
-CYREG_B0_P1_U1_CFG29 EQU 0x400102dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG30\r
-CYREG_B0_P1_U1_CFG30 EQU 0x400102de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_CFG31\r
-CYREG_B0_P1_U1_CFG31 EQU 0x400102df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG0\r
-CYREG_B0_P1_U1_DCFG0 EQU 0x400102e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG1\r
-CYREG_B0_P1_U1_DCFG1 EQU 0x400102e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG2\r
-CYREG_B0_P1_U1_DCFG2 EQU 0x400102e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG3\r
-CYREG_B0_P1_U1_DCFG3 EQU 0x400102e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG4\r
-CYREG_B0_P1_U1_DCFG4 EQU 0x400102e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG5\r
-CYREG_B0_P1_U1_DCFG5 EQU 0x400102ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG6\r
-CYREG_B0_P1_U1_DCFG6 EQU 0x400102ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P1_U1_DCFG7\r
-CYREG_B0_P1_U1_DCFG7 EQU 0x400102ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_BASE\r
-CYDEV_UCFG_B0_P1_ROUTE_BASE EQU 0x40010300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P1_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P1_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_BASE\r
-CYDEV_UCFG_B0_P2_BASE EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_SIZE\r
-CYDEV_UCFG_B0_P2_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_BASE\r
-CYDEV_UCFG_B0_P2_U0_BASE EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U0_SIZE\r
-CYDEV_UCFG_B0_P2_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT0\r
-CYREG_B0_P2_U0_PLD_IT0 EQU 0x40010400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT1\r
-CYREG_B0_P2_U0_PLD_IT1 EQU 0x40010404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT2\r
-CYREG_B0_P2_U0_PLD_IT2 EQU 0x40010408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT3\r
-CYREG_B0_P2_U0_PLD_IT3 EQU 0x4001040c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT4\r
-CYREG_B0_P2_U0_PLD_IT4 EQU 0x40010410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT5\r
-CYREG_B0_P2_U0_PLD_IT5 EQU 0x40010414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT6\r
-CYREG_B0_P2_U0_PLD_IT6 EQU 0x40010418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT7\r
-CYREG_B0_P2_U0_PLD_IT7 EQU 0x4001041c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT8\r
-CYREG_B0_P2_U0_PLD_IT8 EQU 0x40010420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT9\r
-CYREG_B0_P2_U0_PLD_IT9 EQU 0x40010424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT10\r
-CYREG_B0_P2_U0_PLD_IT10 EQU 0x40010428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_IT11\r
-CYREG_B0_P2_U0_PLD_IT11 EQU 0x4001042c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT0\r
-CYREG_B0_P2_U0_PLD_ORT0 EQU 0x40010430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT1\r
-CYREG_B0_P2_U0_PLD_ORT1 EQU 0x40010432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT2\r
-CYREG_B0_P2_U0_PLD_ORT2 EQU 0x40010434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_PLD_ORT3\r
-CYREG_B0_P2_U0_PLD_ORT3 EQU 0x40010436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P2_U0_MC_CFG_CEN_CONST EQU 0x40010438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_XORFB\r
-CYREG_B0_P2_U0_MC_CFG_XORFB EQU 0x4001043a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P2_U0_MC_CFG_SET_RESET EQU 0x4001043c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_MC_CFG_BYPASS\r
-CYREG_B0_P2_U0_MC_CFG_BYPASS EQU 0x4001043e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG0\r
-CYREG_B0_P2_U0_CFG0 EQU 0x40010440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG1\r
-CYREG_B0_P2_U0_CFG1 EQU 0x40010441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG2\r
-CYREG_B0_P2_U0_CFG2 EQU 0x40010442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG3\r
-CYREG_B0_P2_U0_CFG3 EQU 0x40010443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG4\r
-CYREG_B0_P2_U0_CFG4 EQU 0x40010444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG5\r
-CYREG_B0_P2_U0_CFG5 EQU 0x40010445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG6\r
-CYREG_B0_P2_U0_CFG6 EQU 0x40010446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG7\r
-CYREG_B0_P2_U0_CFG7 EQU 0x40010447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG8\r
-CYREG_B0_P2_U0_CFG8 EQU 0x40010448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG9\r
-CYREG_B0_P2_U0_CFG9 EQU 0x40010449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG10\r
-CYREG_B0_P2_U0_CFG10 EQU 0x4001044a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG11\r
-CYREG_B0_P2_U0_CFG11 EQU 0x4001044b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG12\r
-CYREG_B0_P2_U0_CFG12 EQU 0x4001044c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG13\r
-CYREG_B0_P2_U0_CFG13 EQU 0x4001044d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG14\r
-CYREG_B0_P2_U0_CFG14 EQU 0x4001044e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG15\r
-CYREG_B0_P2_U0_CFG15 EQU 0x4001044f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG16\r
-CYREG_B0_P2_U0_CFG16 EQU 0x40010450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG17\r
-CYREG_B0_P2_U0_CFG17 EQU 0x40010451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG18\r
-CYREG_B0_P2_U0_CFG18 EQU 0x40010452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG19\r
-CYREG_B0_P2_U0_CFG19 EQU 0x40010453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG20\r
-CYREG_B0_P2_U0_CFG20 EQU 0x40010454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG21\r
-CYREG_B0_P2_U0_CFG21 EQU 0x40010455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG22\r
-CYREG_B0_P2_U0_CFG22 EQU 0x40010456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG23\r
-CYREG_B0_P2_U0_CFG23 EQU 0x40010457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG24\r
-CYREG_B0_P2_U0_CFG24 EQU 0x40010458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG25\r
-CYREG_B0_P2_U0_CFG25 EQU 0x40010459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG26\r
-CYREG_B0_P2_U0_CFG26 EQU 0x4001045a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG27\r
-CYREG_B0_P2_U0_CFG27 EQU 0x4001045b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG28\r
-CYREG_B0_P2_U0_CFG28 EQU 0x4001045c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG29\r
-CYREG_B0_P2_U0_CFG29 EQU 0x4001045d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG30\r
-CYREG_B0_P2_U0_CFG30 EQU 0x4001045e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_CFG31\r
-CYREG_B0_P2_U0_CFG31 EQU 0x4001045f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG0\r
-CYREG_B0_P2_U0_DCFG0 EQU 0x40010460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG1\r
-CYREG_B0_P2_U0_DCFG1 EQU 0x40010462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG2\r
-CYREG_B0_P2_U0_DCFG2 EQU 0x40010464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG3\r
-CYREG_B0_P2_U0_DCFG3 EQU 0x40010466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG4\r
-CYREG_B0_P2_U0_DCFG4 EQU 0x40010468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG5\r
-CYREG_B0_P2_U0_DCFG5 EQU 0x4001046a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG6\r
-CYREG_B0_P2_U0_DCFG6 EQU 0x4001046c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U0_DCFG7\r
-CYREG_B0_P2_U0_DCFG7 EQU 0x4001046e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_BASE\r
-CYDEV_UCFG_B0_P2_U1_BASE EQU 0x40010480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_U1_SIZE\r
-CYDEV_UCFG_B0_P2_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT0\r
-CYREG_B0_P2_U1_PLD_IT0 EQU 0x40010480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT1\r
-CYREG_B0_P2_U1_PLD_IT1 EQU 0x40010484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT2\r
-CYREG_B0_P2_U1_PLD_IT2 EQU 0x40010488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT3\r
-CYREG_B0_P2_U1_PLD_IT3 EQU 0x4001048c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT4\r
-CYREG_B0_P2_U1_PLD_IT4 EQU 0x40010490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT5\r
-CYREG_B0_P2_U1_PLD_IT5 EQU 0x40010494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT6\r
-CYREG_B0_P2_U1_PLD_IT6 EQU 0x40010498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT7\r
-CYREG_B0_P2_U1_PLD_IT7 EQU 0x4001049c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT8\r
-CYREG_B0_P2_U1_PLD_IT8 EQU 0x400104a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT9\r
-CYREG_B0_P2_U1_PLD_IT9 EQU 0x400104a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT10\r
-CYREG_B0_P2_U1_PLD_IT10 EQU 0x400104a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_IT11\r
-CYREG_B0_P2_U1_PLD_IT11 EQU 0x400104ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT0\r
-CYREG_B0_P2_U1_PLD_ORT0 EQU 0x400104b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT1\r
-CYREG_B0_P2_U1_PLD_ORT1 EQU 0x400104b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT2\r
-CYREG_B0_P2_U1_PLD_ORT2 EQU 0x400104b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_PLD_ORT3\r
-CYREG_B0_P2_U1_PLD_ORT3 EQU 0x400104b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P2_U1_MC_CFG_CEN_CONST EQU 0x400104b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_XORFB\r
-CYREG_B0_P2_U1_MC_CFG_XORFB EQU 0x400104ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P2_U1_MC_CFG_SET_RESET EQU 0x400104bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_MC_CFG_BYPASS\r
-CYREG_B0_P2_U1_MC_CFG_BYPASS EQU 0x400104be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG0\r
-CYREG_B0_P2_U1_CFG0 EQU 0x400104c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG1\r
-CYREG_B0_P2_U1_CFG1 EQU 0x400104c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG2\r
-CYREG_B0_P2_U1_CFG2 EQU 0x400104c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG3\r
-CYREG_B0_P2_U1_CFG3 EQU 0x400104c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG4\r
-CYREG_B0_P2_U1_CFG4 EQU 0x400104c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG5\r
-CYREG_B0_P2_U1_CFG5 EQU 0x400104c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG6\r
-CYREG_B0_P2_U1_CFG6 EQU 0x400104c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG7\r
-CYREG_B0_P2_U1_CFG7 EQU 0x400104c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG8\r
-CYREG_B0_P2_U1_CFG8 EQU 0x400104c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG9\r
-CYREG_B0_P2_U1_CFG9 EQU 0x400104c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG10\r
-CYREG_B0_P2_U1_CFG10 EQU 0x400104ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG11\r
-CYREG_B0_P2_U1_CFG11 EQU 0x400104cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG12\r
-CYREG_B0_P2_U1_CFG12 EQU 0x400104cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG13\r
-CYREG_B0_P2_U1_CFG13 EQU 0x400104cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG14\r
-CYREG_B0_P2_U1_CFG14 EQU 0x400104ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG15\r
-CYREG_B0_P2_U1_CFG15 EQU 0x400104cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG16\r
-CYREG_B0_P2_U1_CFG16 EQU 0x400104d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG17\r
-CYREG_B0_P2_U1_CFG17 EQU 0x400104d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG18\r
-CYREG_B0_P2_U1_CFG18 EQU 0x400104d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG19\r
-CYREG_B0_P2_U1_CFG19 EQU 0x400104d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG20\r
-CYREG_B0_P2_U1_CFG20 EQU 0x400104d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG21\r
-CYREG_B0_P2_U1_CFG21 EQU 0x400104d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG22\r
-CYREG_B0_P2_U1_CFG22 EQU 0x400104d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG23\r
-CYREG_B0_P2_U1_CFG23 EQU 0x400104d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG24\r
-CYREG_B0_P2_U1_CFG24 EQU 0x400104d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG25\r
-CYREG_B0_P2_U1_CFG25 EQU 0x400104d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG26\r
-CYREG_B0_P2_U1_CFG26 EQU 0x400104da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG27\r
-CYREG_B0_P2_U1_CFG27 EQU 0x400104db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG28\r
-CYREG_B0_P2_U1_CFG28 EQU 0x400104dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG29\r
-CYREG_B0_P2_U1_CFG29 EQU 0x400104dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG30\r
-CYREG_B0_P2_U1_CFG30 EQU 0x400104de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_CFG31\r
-CYREG_B0_P2_U1_CFG31 EQU 0x400104df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG0\r
-CYREG_B0_P2_U1_DCFG0 EQU 0x400104e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG1\r
-CYREG_B0_P2_U1_DCFG1 EQU 0x400104e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG2\r
-CYREG_B0_P2_U1_DCFG2 EQU 0x400104e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG3\r
-CYREG_B0_P2_U1_DCFG3 EQU 0x400104e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG4\r
-CYREG_B0_P2_U1_DCFG4 EQU 0x400104e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG5\r
-CYREG_B0_P2_U1_DCFG5 EQU 0x400104ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG6\r
-CYREG_B0_P2_U1_DCFG6 EQU 0x400104ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P2_U1_DCFG7\r
-CYREG_B0_P2_U1_DCFG7 EQU 0x400104ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_BASE\r
-CYDEV_UCFG_B0_P2_ROUTE_BASE EQU 0x40010500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P2_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P2_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_BASE\r
-CYDEV_UCFG_B0_P3_BASE EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_SIZE\r
-CYDEV_UCFG_B0_P3_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_BASE\r
-CYDEV_UCFG_B0_P3_U0_BASE EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U0_SIZE\r
-CYDEV_UCFG_B0_P3_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT0\r
-CYREG_B0_P3_U0_PLD_IT0 EQU 0x40010600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT1\r
-CYREG_B0_P3_U0_PLD_IT1 EQU 0x40010604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT2\r
-CYREG_B0_P3_U0_PLD_IT2 EQU 0x40010608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT3\r
-CYREG_B0_P3_U0_PLD_IT3 EQU 0x4001060c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT4\r
-CYREG_B0_P3_U0_PLD_IT4 EQU 0x40010610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT5\r
-CYREG_B0_P3_U0_PLD_IT5 EQU 0x40010614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT6\r
-CYREG_B0_P3_U0_PLD_IT6 EQU 0x40010618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT7\r
-CYREG_B0_P3_U0_PLD_IT7 EQU 0x4001061c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT8\r
-CYREG_B0_P3_U0_PLD_IT8 EQU 0x40010620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT9\r
-CYREG_B0_P3_U0_PLD_IT9 EQU 0x40010624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT10\r
-CYREG_B0_P3_U0_PLD_IT10 EQU 0x40010628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_IT11\r
-CYREG_B0_P3_U0_PLD_IT11 EQU 0x4001062c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT0\r
-CYREG_B0_P3_U0_PLD_ORT0 EQU 0x40010630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT1\r
-CYREG_B0_P3_U0_PLD_ORT1 EQU 0x40010632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT2\r
-CYREG_B0_P3_U0_PLD_ORT2 EQU 0x40010634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_PLD_ORT3\r
-CYREG_B0_P3_U0_PLD_ORT3 EQU 0x40010636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P3_U0_MC_CFG_CEN_CONST EQU 0x40010638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_XORFB\r
-CYREG_B0_P3_U0_MC_CFG_XORFB EQU 0x4001063a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P3_U0_MC_CFG_SET_RESET EQU 0x4001063c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_MC_CFG_BYPASS\r
-CYREG_B0_P3_U0_MC_CFG_BYPASS EQU 0x4001063e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG0\r
-CYREG_B0_P3_U0_CFG0 EQU 0x40010640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG1\r
-CYREG_B0_P3_U0_CFG1 EQU 0x40010641\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG2\r
-CYREG_B0_P3_U0_CFG2 EQU 0x40010642\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG3\r
-CYREG_B0_P3_U0_CFG3 EQU 0x40010643\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG4\r
-CYREG_B0_P3_U0_CFG4 EQU 0x40010644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG5\r
-CYREG_B0_P3_U0_CFG5 EQU 0x40010645\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG6\r
-CYREG_B0_P3_U0_CFG6 EQU 0x40010646\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG7\r
-CYREG_B0_P3_U0_CFG7 EQU 0x40010647\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG8\r
-CYREG_B0_P3_U0_CFG8 EQU 0x40010648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG9\r
-CYREG_B0_P3_U0_CFG9 EQU 0x40010649\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG10\r
-CYREG_B0_P3_U0_CFG10 EQU 0x4001064a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG11\r
-CYREG_B0_P3_U0_CFG11 EQU 0x4001064b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG12\r
-CYREG_B0_P3_U0_CFG12 EQU 0x4001064c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG13\r
-CYREG_B0_P3_U0_CFG13 EQU 0x4001064d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG14\r
-CYREG_B0_P3_U0_CFG14 EQU 0x4001064e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG15\r
-CYREG_B0_P3_U0_CFG15 EQU 0x4001064f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG16\r
-CYREG_B0_P3_U0_CFG16 EQU 0x40010650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG17\r
-CYREG_B0_P3_U0_CFG17 EQU 0x40010651\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG18\r
-CYREG_B0_P3_U0_CFG18 EQU 0x40010652\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG19\r
-CYREG_B0_P3_U0_CFG19 EQU 0x40010653\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG20\r
-CYREG_B0_P3_U0_CFG20 EQU 0x40010654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG21\r
-CYREG_B0_P3_U0_CFG21 EQU 0x40010655\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG22\r
-CYREG_B0_P3_U0_CFG22 EQU 0x40010656\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG23\r
-CYREG_B0_P3_U0_CFG23 EQU 0x40010657\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG24\r
-CYREG_B0_P3_U0_CFG24 EQU 0x40010658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG25\r
-CYREG_B0_P3_U0_CFG25 EQU 0x40010659\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG26\r
-CYREG_B0_P3_U0_CFG26 EQU 0x4001065a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG27\r
-CYREG_B0_P3_U0_CFG27 EQU 0x4001065b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG28\r
-CYREG_B0_P3_U0_CFG28 EQU 0x4001065c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG29\r
-CYREG_B0_P3_U0_CFG29 EQU 0x4001065d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG30\r
-CYREG_B0_P3_U0_CFG30 EQU 0x4001065e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_CFG31\r
-CYREG_B0_P3_U0_CFG31 EQU 0x4001065f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG0\r
-CYREG_B0_P3_U0_DCFG0 EQU 0x40010660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG1\r
-CYREG_B0_P3_U0_DCFG1 EQU 0x40010662\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG2\r
-CYREG_B0_P3_U0_DCFG2 EQU 0x40010664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG3\r
-CYREG_B0_P3_U0_DCFG3 EQU 0x40010666\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG4\r
-CYREG_B0_P3_U0_DCFG4 EQU 0x40010668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG5\r
-CYREG_B0_P3_U0_DCFG5 EQU 0x4001066a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG6\r
-CYREG_B0_P3_U0_DCFG6 EQU 0x4001066c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U0_DCFG7\r
-CYREG_B0_P3_U0_DCFG7 EQU 0x4001066e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_BASE\r
-CYDEV_UCFG_B0_P3_U1_BASE EQU 0x40010680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_U1_SIZE\r
-CYDEV_UCFG_B0_P3_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT0\r
-CYREG_B0_P3_U1_PLD_IT0 EQU 0x40010680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT1\r
-CYREG_B0_P3_U1_PLD_IT1 EQU 0x40010684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT2\r
-CYREG_B0_P3_U1_PLD_IT2 EQU 0x40010688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT3\r
-CYREG_B0_P3_U1_PLD_IT3 EQU 0x4001068c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT4\r
-CYREG_B0_P3_U1_PLD_IT4 EQU 0x40010690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT5\r
-CYREG_B0_P3_U1_PLD_IT5 EQU 0x40010694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT6\r
-CYREG_B0_P3_U1_PLD_IT6 EQU 0x40010698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT7\r
-CYREG_B0_P3_U1_PLD_IT7 EQU 0x4001069c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT8\r
-CYREG_B0_P3_U1_PLD_IT8 EQU 0x400106a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT9\r
-CYREG_B0_P3_U1_PLD_IT9 EQU 0x400106a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT10\r
-CYREG_B0_P3_U1_PLD_IT10 EQU 0x400106a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_IT11\r
-CYREG_B0_P3_U1_PLD_IT11 EQU 0x400106ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT0\r
-CYREG_B0_P3_U1_PLD_ORT0 EQU 0x400106b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT1\r
-CYREG_B0_P3_U1_PLD_ORT1 EQU 0x400106b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT2\r
-CYREG_B0_P3_U1_PLD_ORT2 EQU 0x400106b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_PLD_ORT3\r
-CYREG_B0_P3_U1_PLD_ORT3 EQU 0x400106b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P3_U1_MC_CFG_CEN_CONST EQU 0x400106b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_XORFB\r
-CYREG_B0_P3_U1_MC_CFG_XORFB EQU 0x400106ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P3_U1_MC_CFG_SET_RESET EQU 0x400106bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_MC_CFG_BYPASS\r
-CYREG_B0_P3_U1_MC_CFG_BYPASS EQU 0x400106be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG0\r
-CYREG_B0_P3_U1_CFG0 EQU 0x400106c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG1\r
-CYREG_B0_P3_U1_CFG1 EQU 0x400106c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG2\r
-CYREG_B0_P3_U1_CFG2 EQU 0x400106c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG3\r
-CYREG_B0_P3_U1_CFG3 EQU 0x400106c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG4\r
-CYREG_B0_P3_U1_CFG4 EQU 0x400106c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG5\r
-CYREG_B0_P3_U1_CFG5 EQU 0x400106c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG6\r
-CYREG_B0_P3_U1_CFG6 EQU 0x400106c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG7\r
-CYREG_B0_P3_U1_CFG7 EQU 0x400106c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG8\r
-CYREG_B0_P3_U1_CFG8 EQU 0x400106c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG9\r
-CYREG_B0_P3_U1_CFG9 EQU 0x400106c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG10\r
-CYREG_B0_P3_U1_CFG10 EQU 0x400106ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG11\r
-CYREG_B0_P3_U1_CFG11 EQU 0x400106cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG12\r
-CYREG_B0_P3_U1_CFG12 EQU 0x400106cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG13\r
-CYREG_B0_P3_U1_CFG13 EQU 0x400106cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG14\r
-CYREG_B0_P3_U1_CFG14 EQU 0x400106ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG15\r
-CYREG_B0_P3_U1_CFG15 EQU 0x400106cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG16\r
-CYREG_B0_P3_U1_CFG16 EQU 0x400106d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG17\r
-CYREG_B0_P3_U1_CFG17 EQU 0x400106d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG18\r
-CYREG_B0_P3_U1_CFG18 EQU 0x400106d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG19\r
-CYREG_B0_P3_U1_CFG19 EQU 0x400106d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG20\r
-CYREG_B0_P3_U1_CFG20 EQU 0x400106d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG21\r
-CYREG_B0_P3_U1_CFG21 EQU 0x400106d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG22\r
-CYREG_B0_P3_U1_CFG22 EQU 0x400106d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG23\r
-CYREG_B0_P3_U1_CFG23 EQU 0x400106d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG24\r
-CYREG_B0_P3_U1_CFG24 EQU 0x400106d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG25\r
-CYREG_B0_P3_U1_CFG25 EQU 0x400106d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG26\r
-CYREG_B0_P3_U1_CFG26 EQU 0x400106da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG27\r
-CYREG_B0_P3_U1_CFG27 EQU 0x400106db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG28\r
-CYREG_B0_P3_U1_CFG28 EQU 0x400106dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG29\r
-CYREG_B0_P3_U1_CFG29 EQU 0x400106dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG30\r
-CYREG_B0_P3_U1_CFG30 EQU 0x400106de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_CFG31\r
-CYREG_B0_P3_U1_CFG31 EQU 0x400106df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG0\r
-CYREG_B0_P3_U1_DCFG0 EQU 0x400106e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG1\r
-CYREG_B0_P3_U1_DCFG1 EQU 0x400106e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG2\r
-CYREG_B0_P3_U1_DCFG2 EQU 0x400106e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG3\r
-CYREG_B0_P3_U1_DCFG3 EQU 0x400106e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG4\r
-CYREG_B0_P3_U1_DCFG4 EQU 0x400106e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG5\r
-CYREG_B0_P3_U1_DCFG5 EQU 0x400106ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG6\r
-CYREG_B0_P3_U1_DCFG6 EQU 0x400106ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P3_U1_DCFG7\r
-CYREG_B0_P3_U1_DCFG7 EQU 0x400106ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_BASE\r
-CYDEV_UCFG_B0_P3_ROUTE_BASE EQU 0x40010700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P3_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P3_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_BASE\r
-CYDEV_UCFG_B0_P4_BASE EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_SIZE\r
-CYDEV_UCFG_B0_P4_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_BASE\r
-CYDEV_UCFG_B0_P4_U0_BASE EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U0_SIZE\r
-CYDEV_UCFG_B0_P4_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT0\r
-CYREG_B0_P4_U0_PLD_IT0 EQU 0x40010800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT1\r
-CYREG_B0_P4_U0_PLD_IT1 EQU 0x40010804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT2\r
-CYREG_B0_P4_U0_PLD_IT2 EQU 0x40010808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT3\r
-CYREG_B0_P4_U0_PLD_IT3 EQU 0x4001080c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT4\r
-CYREG_B0_P4_U0_PLD_IT4 EQU 0x40010810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT5\r
-CYREG_B0_P4_U0_PLD_IT5 EQU 0x40010814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT6\r
-CYREG_B0_P4_U0_PLD_IT6 EQU 0x40010818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT7\r
-CYREG_B0_P4_U0_PLD_IT7 EQU 0x4001081c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT8\r
-CYREG_B0_P4_U0_PLD_IT8 EQU 0x40010820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT9\r
-CYREG_B0_P4_U0_PLD_IT9 EQU 0x40010824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT10\r
-CYREG_B0_P4_U0_PLD_IT10 EQU 0x40010828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_IT11\r
-CYREG_B0_P4_U0_PLD_IT11 EQU 0x4001082c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT0\r
-CYREG_B0_P4_U0_PLD_ORT0 EQU 0x40010830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT1\r
-CYREG_B0_P4_U0_PLD_ORT1 EQU 0x40010832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT2\r
-CYREG_B0_P4_U0_PLD_ORT2 EQU 0x40010834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_PLD_ORT3\r
-CYREG_B0_P4_U0_PLD_ORT3 EQU 0x40010836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P4_U0_MC_CFG_CEN_CONST EQU 0x40010838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_XORFB\r
-CYREG_B0_P4_U0_MC_CFG_XORFB EQU 0x4001083a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P4_U0_MC_CFG_SET_RESET EQU 0x4001083c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_MC_CFG_BYPASS\r
-CYREG_B0_P4_U0_MC_CFG_BYPASS EQU 0x4001083e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG0\r
-CYREG_B0_P4_U0_CFG0 EQU 0x40010840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG1\r
-CYREG_B0_P4_U0_CFG1 EQU 0x40010841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG2\r
-CYREG_B0_P4_U0_CFG2 EQU 0x40010842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG3\r
-CYREG_B0_P4_U0_CFG3 EQU 0x40010843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG4\r
-CYREG_B0_P4_U0_CFG4 EQU 0x40010844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG5\r
-CYREG_B0_P4_U0_CFG5 EQU 0x40010845\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG6\r
-CYREG_B0_P4_U0_CFG6 EQU 0x40010846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG7\r
-CYREG_B0_P4_U0_CFG7 EQU 0x40010847\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG8\r
-CYREG_B0_P4_U0_CFG8 EQU 0x40010848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG9\r
-CYREG_B0_P4_U0_CFG9 EQU 0x40010849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG10\r
-CYREG_B0_P4_U0_CFG10 EQU 0x4001084a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG11\r
-CYREG_B0_P4_U0_CFG11 EQU 0x4001084b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG12\r
-CYREG_B0_P4_U0_CFG12 EQU 0x4001084c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG13\r
-CYREG_B0_P4_U0_CFG13 EQU 0x4001084d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG14\r
-CYREG_B0_P4_U0_CFG14 EQU 0x4001084e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG15\r
-CYREG_B0_P4_U0_CFG15 EQU 0x4001084f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG16\r
-CYREG_B0_P4_U0_CFG16 EQU 0x40010850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG17\r
-CYREG_B0_P4_U0_CFG17 EQU 0x40010851\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG18\r
-CYREG_B0_P4_U0_CFG18 EQU 0x40010852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG19\r
-CYREG_B0_P4_U0_CFG19 EQU 0x40010853\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG20\r
-CYREG_B0_P4_U0_CFG20 EQU 0x40010854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG21\r
-CYREG_B0_P4_U0_CFG21 EQU 0x40010855\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG22\r
-CYREG_B0_P4_U0_CFG22 EQU 0x40010856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG23\r
-CYREG_B0_P4_U0_CFG23 EQU 0x40010857\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG24\r
-CYREG_B0_P4_U0_CFG24 EQU 0x40010858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG25\r
-CYREG_B0_P4_U0_CFG25 EQU 0x40010859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG26\r
-CYREG_B0_P4_U0_CFG26 EQU 0x4001085a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG27\r
-CYREG_B0_P4_U0_CFG27 EQU 0x4001085b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG28\r
-CYREG_B0_P4_U0_CFG28 EQU 0x4001085c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG29\r
-CYREG_B0_P4_U0_CFG29 EQU 0x4001085d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG30\r
-CYREG_B0_P4_U0_CFG30 EQU 0x4001085e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_CFG31\r
-CYREG_B0_P4_U0_CFG31 EQU 0x4001085f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG0\r
-CYREG_B0_P4_U0_DCFG0 EQU 0x40010860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG1\r
-CYREG_B0_P4_U0_DCFG1 EQU 0x40010862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG2\r
-CYREG_B0_P4_U0_DCFG2 EQU 0x40010864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG3\r
-CYREG_B0_P4_U0_DCFG3 EQU 0x40010866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG4\r
-CYREG_B0_P4_U0_DCFG4 EQU 0x40010868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG5\r
-CYREG_B0_P4_U0_DCFG5 EQU 0x4001086a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG6\r
-CYREG_B0_P4_U0_DCFG6 EQU 0x4001086c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U0_DCFG7\r
-CYREG_B0_P4_U0_DCFG7 EQU 0x4001086e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_BASE\r
-CYDEV_UCFG_B0_P4_U1_BASE EQU 0x40010880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_U1_SIZE\r
-CYDEV_UCFG_B0_P4_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT0\r
-CYREG_B0_P4_U1_PLD_IT0 EQU 0x40010880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT1\r
-CYREG_B0_P4_U1_PLD_IT1 EQU 0x40010884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT2\r
-CYREG_B0_P4_U1_PLD_IT2 EQU 0x40010888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT3\r
-CYREG_B0_P4_U1_PLD_IT3 EQU 0x4001088c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT4\r
-CYREG_B0_P4_U1_PLD_IT4 EQU 0x40010890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT5\r
-CYREG_B0_P4_U1_PLD_IT5 EQU 0x40010894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT6\r
-CYREG_B0_P4_U1_PLD_IT6 EQU 0x40010898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT7\r
-CYREG_B0_P4_U1_PLD_IT7 EQU 0x4001089c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT8\r
-CYREG_B0_P4_U1_PLD_IT8 EQU 0x400108a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT9\r
-CYREG_B0_P4_U1_PLD_IT9 EQU 0x400108a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT10\r
-CYREG_B0_P4_U1_PLD_IT10 EQU 0x400108a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_IT11\r
-CYREG_B0_P4_U1_PLD_IT11 EQU 0x400108ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT0\r
-CYREG_B0_P4_U1_PLD_ORT0 EQU 0x400108b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT1\r
-CYREG_B0_P4_U1_PLD_ORT1 EQU 0x400108b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT2\r
-CYREG_B0_P4_U1_PLD_ORT2 EQU 0x400108b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_PLD_ORT3\r
-CYREG_B0_P4_U1_PLD_ORT3 EQU 0x400108b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P4_U1_MC_CFG_CEN_CONST EQU 0x400108b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_XORFB\r
-CYREG_B0_P4_U1_MC_CFG_XORFB EQU 0x400108ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P4_U1_MC_CFG_SET_RESET EQU 0x400108bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_MC_CFG_BYPASS\r
-CYREG_B0_P4_U1_MC_CFG_BYPASS EQU 0x400108be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG0\r
-CYREG_B0_P4_U1_CFG0 EQU 0x400108c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG1\r
-CYREG_B0_P4_U1_CFG1 EQU 0x400108c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG2\r
-CYREG_B0_P4_U1_CFG2 EQU 0x400108c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG3\r
-CYREG_B0_P4_U1_CFG3 EQU 0x400108c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG4\r
-CYREG_B0_P4_U1_CFG4 EQU 0x400108c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG5\r
-CYREG_B0_P4_U1_CFG5 EQU 0x400108c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG6\r
-CYREG_B0_P4_U1_CFG6 EQU 0x400108c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG7\r
-CYREG_B0_P4_U1_CFG7 EQU 0x400108c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG8\r
-CYREG_B0_P4_U1_CFG8 EQU 0x400108c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG9\r
-CYREG_B0_P4_U1_CFG9 EQU 0x400108c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG10\r
-CYREG_B0_P4_U1_CFG10 EQU 0x400108ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG11\r
-CYREG_B0_P4_U1_CFG11 EQU 0x400108cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG12\r
-CYREG_B0_P4_U1_CFG12 EQU 0x400108cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG13\r
-CYREG_B0_P4_U1_CFG13 EQU 0x400108cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG14\r
-CYREG_B0_P4_U1_CFG14 EQU 0x400108ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG15\r
-CYREG_B0_P4_U1_CFG15 EQU 0x400108cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG16\r
-CYREG_B0_P4_U1_CFG16 EQU 0x400108d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG17\r
-CYREG_B0_P4_U1_CFG17 EQU 0x400108d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG18\r
-CYREG_B0_P4_U1_CFG18 EQU 0x400108d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG19\r
-CYREG_B0_P4_U1_CFG19 EQU 0x400108d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG20\r
-CYREG_B0_P4_U1_CFG20 EQU 0x400108d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG21\r
-CYREG_B0_P4_U1_CFG21 EQU 0x400108d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG22\r
-CYREG_B0_P4_U1_CFG22 EQU 0x400108d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG23\r
-CYREG_B0_P4_U1_CFG23 EQU 0x400108d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG24\r
-CYREG_B0_P4_U1_CFG24 EQU 0x400108d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG25\r
-CYREG_B0_P4_U1_CFG25 EQU 0x400108d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG26\r
-CYREG_B0_P4_U1_CFG26 EQU 0x400108da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG27\r
-CYREG_B0_P4_U1_CFG27 EQU 0x400108db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG28\r
-CYREG_B0_P4_U1_CFG28 EQU 0x400108dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG29\r
-CYREG_B0_P4_U1_CFG29 EQU 0x400108dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG30\r
-CYREG_B0_P4_U1_CFG30 EQU 0x400108de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_CFG31\r
-CYREG_B0_P4_U1_CFG31 EQU 0x400108df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG0\r
-CYREG_B0_P4_U1_DCFG0 EQU 0x400108e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG1\r
-CYREG_B0_P4_U1_DCFG1 EQU 0x400108e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG2\r
-CYREG_B0_P4_U1_DCFG2 EQU 0x400108e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG3\r
-CYREG_B0_P4_U1_DCFG3 EQU 0x400108e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG4\r
-CYREG_B0_P4_U1_DCFG4 EQU 0x400108e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG5\r
-CYREG_B0_P4_U1_DCFG5 EQU 0x400108ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG6\r
-CYREG_B0_P4_U1_DCFG6 EQU 0x400108ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P4_U1_DCFG7\r
-CYREG_B0_P4_U1_DCFG7 EQU 0x400108ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_BASE\r
-CYDEV_UCFG_B0_P4_ROUTE_BASE EQU 0x40010900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P4_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P4_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_BASE\r
-CYDEV_UCFG_B0_P5_BASE EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_SIZE\r
-CYDEV_UCFG_B0_P5_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_BASE\r
-CYDEV_UCFG_B0_P5_U0_BASE EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U0_SIZE\r
-CYDEV_UCFG_B0_P5_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT0\r
-CYREG_B0_P5_U0_PLD_IT0 EQU 0x40010a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT1\r
-CYREG_B0_P5_U0_PLD_IT1 EQU 0x40010a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT2\r
-CYREG_B0_P5_U0_PLD_IT2 EQU 0x40010a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT3\r
-CYREG_B0_P5_U0_PLD_IT3 EQU 0x40010a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT4\r
-CYREG_B0_P5_U0_PLD_IT4 EQU 0x40010a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT5\r
-CYREG_B0_P5_U0_PLD_IT5 EQU 0x40010a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT6\r
-CYREG_B0_P5_U0_PLD_IT6 EQU 0x40010a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT7\r
-CYREG_B0_P5_U0_PLD_IT7 EQU 0x40010a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT8\r
-CYREG_B0_P5_U0_PLD_IT8 EQU 0x40010a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT9\r
-CYREG_B0_P5_U0_PLD_IT9 EQU 0x40010a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT10\r
-CYREG_B0_P5_U0_PLD_IT10 EQU 0x40010a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_IT11\r
-CYREG_B0_P5_U0_PLD_IT11 EQU 0x40010a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT0\r
-CYREG_B0_P5_U0_PLD_ORT0 EQU 0x40010a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT1\r
-CYREG_B0_P5_U0_PLD_ORT1 EQU 0x40010a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT2\r
-CYREG_B0_P5_U0_PLD_ORT2 EQU 0x40010a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_PLD_ORT3\r
-CYREG_B0_P5_U0_PLD_ORT3 EQU 0x40010a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P5_U0_MC_CFG_CEN_CONST EQU 0x40010a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_XORFB\r
-CYREG_B0_P5_U0_MC_CFG_XORFB EQU 0x40010a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P5_U0_MC_CFG_SET_RESET EQU 0x40010a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_MC_CFG_BYPASS\r
-CYREG_B0_P5_U0_MC_CFG_BYPASS EQU 0x40010a3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG0\r
-CYREG_B0_P5_U0_CFG0 EQU 0x40010a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG1\r
-CYREG_B0_P5_U0_CFG1 EQU 0x40010a41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG2\r
-CYREG_B0_P5_U0_CFG2 EQU 0x40010a42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG3\r
-CYREG_B0_P5_U0_CFG3 EQU 0x40010a43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG4\r
-CYREG_B0_P5_U0_CFG4 EQU 0x40010a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG5\r
-CYREG_B0_P5_U0_CFG5 EQU 0x40010a45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG6\r
-CYREG_B0_P5_U0_CFG6 EQU 0x40010a46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG7\r
-CYREG_B0_P5_U0_CFG7 EQU 0x40010a47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG8\r
-CYREG_B0_P5_U0_CFG8 EQU 0x40010a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG9\r
-CYREG_B0_P5_U0_CFG9 EQU 0x40010a49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG10\r
-CYREG_B0_P5_U0_CFG10 EQU 0x40010a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG11\r
-CYREG_B0_P5_U0_CFG11 EQU 0x40010a4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG12\r
-CYREG_B0_P5_U0_CFG12 EQU 0x40010a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG13\r
-CYREG_B0_P5_U0_CFG13 EQU 0x40010a4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG14\r
-CYREG_B0_P5_U0_CFG14 EQU 0x40010a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG15\r
-CYREG_B0_P5_U0_CFG15 EQU 0x40010a4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG16\r
-CYREG_B0_P5_U0_CFG16 EQU 0x40010a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG17\r
-CYREG_B0_P5_U0_CFG17 EQU 0x40010a51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG18\r
-CYREG_B0_P5_U0_CFG18 EQU 0x40010a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG19\r
-CYREG_B0_P5_U0_CFG19 EQU 0x40010a53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG20\r
-CYREG_B0_P5_U0_CFG20 EQU 0x40010a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG21\r
-CYREG_B0_P5_U0_CFG21 EQU 0x40010a55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG22\r
-CYREG_B0_P5_U0_CFG22 EQU 0x40010a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG23\r
-CYREG_B0_P5_U0_CFG23 EQU 0x40010a57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG24\r
-CYREG_B0_P5_U0_CFG24 EQU 0x40010a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG25\r
-CYREG_B0_P5_U0_CFG25 EQU 0x40010a59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG26\r
-CYREG_B0_P5_U0_CFG26 EQU 0x40010a5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG27\r
-CYREG_B0_P5_U0_CFG27 EQU 0x40010a5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG28\r
-CYREG_B0_P5_U0_CFG28 EQU 0x40010a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG29\r
-CYREG_B0_P5_U0_CFG29 EQU 0x40010a5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG30\r
-CYREG_B0_P5_U0_CFG30 EQU 0x40010a5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_CFG31\r
-CYREG_B0_P5_U0_CFG31 EQU 0x40010a5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG0\r
-CYREG_B0_P5_U0_DCFG0 EQU 0x40010a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG1\r
-CYREG_B0_P5_U0_DCFG1 EQU 0x40010a62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG2\r
-CYREG_B0_P5_U0_DCFG2 EQU 0x40010a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG3\r
-CYREG_B0_P5_U0_DCFG3 EQU 0x40010a66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG4\r
-CYREG_B0_P5_U0_DCFG4 EQU 0x40010a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG5\r
-CYREG_B0_P5_U0_DCFG5 EQU 0x40010a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG6\r
-CYREG_B0_P5_U0_DCFG6 EQU 0x40010a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U0_DCFG7\r
-CYREG_B0_P5_U0_DCFG7 EQU 0x40010a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_BASE\r
-CYDEV_UCFG_B0_P5_U1_BASE EQU 0x40010a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_U1_SIZE\r
-CYDEV_UCFG_B0_P5_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT0\r
-CYREG_B0_P5_U1_PLD_IT0 EQU 0x40010a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT1\r
-CYREG_B0_P5_U1_PLD_IT1 EQU 0x40010a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT2\r
-CYREG_B0_P5_U1_PLD_IT2 EQU 0x40010a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT3\r
-CYREG_B0_P5_U1_PLD_IT3 EQU 0x40010a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT4\r
-CYREG_B0_P5_U1_PLD_IT4 EQU 0x40010a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT5\r
-CYREG_B0_P5_U1_PLD_IT5 EQU 0x40010a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT6\r
-CYREG_B0_P5_U1_PLD_IT6 EQU 0x40010a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT7\r
-CYREG_B0_P5_U1_PLD_IT7 EQU 0x40010a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT8\r
-CYREG_B0_P5_U1_PLD_IT8 EQU 0x40010aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT9\r
-CYREG_B0_P5_U1_PLD_IT9 EQU 0x40010aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT10\r
-CYREG_B0_P5_U1_PLD_IT10 EQU 0x40010aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_IT11\r
-CYREG_B0_P5_U1_PLD_IT11 EQU 0x40010aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT0\r
-CYREG_B0_P5_U1_PLD_ORT0 EQU 0x40010ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT1\r
-CYREG_B0_P5_U1_PLD_ORT1 EQU 0x40010ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT2\r
-CYREG_B0_P5_U1_PLD_ORT2 EQU 0x40010ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_PLD_ORT3\r
-CYREG_B0_P5_U1_PLD_ORT3 EQU 0x40010ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P5_U1_MC_CFG_CEN_CONST EQU 0x40010ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_XORFB\r
-CYREG_B0_P5_U1_MC_CFG_XORFB EQU 0x40010aba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P5_U1_MC_CFG_SET_RESET EQU 0x40010abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_MC_CFG_BYPASS\r
-CYREG_B0_P5_U1_MC_CFG_BYPASS EQU 0x40010abe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG0\r
-CYREG_B0_P5_U1_CFG0 EQU 0x40010ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG1\r
-CYREG_B0_P5_U1_CFG1 EQU 0x40010ac1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG2\r
-CYREG_B0_P5_U1_CFG2 EQU 0x40010ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG3\r
-CYREG_B0_P5_U1_CFG3 EQU 0x40010ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG4\r
-CYREG_B0_P5_U1_CFG4 EQU 0x40010ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG5\r
-CYREG_B0_P5_U1_CFG5 EQU 0x40010ac5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG6\r
-CYREG_B0_P5_U1_CFG6 EQU 0x40010ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG7\r
-CYREG_B0_P5_U1_CFG7 EQU 0x40010ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG8\r
-CYREG_B0_P5_U1_CFG8 EQU 0x40010ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG9\r
-CYREG_B0_P5_U1_CFG9 EQU 0x40010ac9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG10\r
-CYREG_B0_P5_U1_CFG10 EQU 0x40010aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG11\r
-CYREG_B0_P5_U1_CFG11 EQU 0x40010acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG12\r
-CYREG_B0_P5_U1_CFG12 EQU 0x40010acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG13\r
-CYREG_B0_P5_U1_CFG13 EQU 0x40010acd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG14\r
-CYREG_B0_P5_U1_CFG14 EQU 0x40010ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG15\r
-CYREG_B0_P5_U1_CFG15 EQU 0x40010acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG16\r
-CYREG_B0_P5_U1_CFG16 EQU 0x40010ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG17\r
-CYREG_B0_P5_U1_CFG17 EQU 0x40010ad1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG18\r
-CYREG_B0_P5_U1_CFG18 EQU 0x40010ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG19\r
-CYREG_B0_P5_U1_CFG19 EQU 0x40010ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG20\r
-CYREG_B0_P5_U1_CFG20 EQU 0x40010ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG21\r
-CYREG_B0_P5_U1_CFG21 EQU 0x40010ad5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG22\r
-CYREG_B0_P5_U1_CFG22 EQU 0x40010ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG23\r
-CYREG_B0_P5_U1_CFG23 EQU 0x40010ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG24\r
-CYREG_B0_P5_U1_CFG24 EQU 0x40010ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG25\r
-CYREG_B0_P5_U1_CFG25 EQU 0x40010ad9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG26\r
-CYREG_B0_P5_U1_CFG26 EQU 0x40010ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG27\r
-CYREG_B0_P5_U1_CFG27 EQU 0x40010adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG28\r
-CYREG_B0_P5_U1_CFG28 EQU 0x40010adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG29\r
-CYREG_B0_P5_U1_CFG29 EQU 0x40010add\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG30\r
-CYREG_B0_P5_U1_CFG30 EQU 0x40010ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_CFG31\r
-CYREG_B0_P5_U1_CFG31 EQU 0x40010adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG0\r
-CYREG_B0_P5_U1_DCFG0 EQU 0x40010ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG1\r
-CYREG_B0_P5_U1_DCFG1 EQU 0x40010ae2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG2\r
-CYREG_B0_P5_U1_DCFG2 EQU 0x40010ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG3\r
-CYREG_B0_P5_U1_DCFG3 EQU 0x40010ae6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG4\r
-CYREG_B0_P5_U1_DCFG4 EQU 0x40010ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG5\r
-CYREG_B0_P5_U1_DCFG5 EQU 0x40010aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG6\r
-CYREG_B0_P5_U1_DCFG6 EQU 0x40010aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P5_U1_DCFG7\r
-CYREG_B0_P5_U1_DCFG7 EQU 0x40010aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_BASE\r
-CYDEV_UCFG_B0_P5_ROUTE_BASE EQU 0x40010b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P5_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P5_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_BASE\r
-CYDEV_UCFG_B0_P6_BASE EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_SIZE\r
-CYDEV_UCFG_B0_P6_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_BASE\r
-CYDEV_UCFG_B0_P6_U0_BASE EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U0_SIZE\r
-CYDEV_UCFG_B0_P6_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT0\r
-CYREG_B0_P6_U0_PLD_IT0 EQU 0x40010c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT1\r
-CYREG_B0_P6_U0_PLD_IT1 EQU 0x40010c04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT2\r
-CYREG_B0_P6_U0_PLD_IT2 EQU 0x40010c08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT3\r
-CYREG_B0_P6_U0_PLD_IT3 EQU 0x40010c0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT4\r
-CYREG_B0_P6_U0_PLD_IT4 EQU 0x40010c10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT5\r
-CYREG_B0_P6_U0_PLD_IT5 EQU 0x40010c14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT6\r
-CYREG_B0_P6_U0_PLD_IT6 EQU 0x40010c18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT7\r
-CYREG_B0_P6_U0_PLD_IT7 EQU 0x40010c1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT8\r
-CYREG_B0_P6_U0_PLD_IT8 EQU 0x40010c20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT9\r
-CYREG_B0_P6_U0_PLD_IT9 EQU 0x40010c24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT10\r
-CYREG_B0_P6_U0_PLD_IT10 EQU 0x40010c28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_IT11\r
-CYREG_B0_P6_U0_PLD_IT11 EQU 0x40010c2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT0\r
-CYREG_B0_P6_U0_PLD_ORT0 EQU 0x40010c30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT1\r
-CYREG_B0_P6_U0_PLD_ORT1 EQU 0x40010c32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT2\r
-CYREG_B0_P6_U0_PLD_ORT2 EQU 0x40010c34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_PLD_ORT3\r
-CYREG_B0_P6_U0_PLD_ORT3 EQU 0x40010c36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P6_U0_MC_CFG_CEN_CONST EQU 0x40010c38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_XORFB\r
-CYREG_B0_P6_U0_MC_CFG_XORFB EQU 0x40010c3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P6_U0_MC_CFG_SET_RESET EQU 0x40010c3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_MC_CFG_BYPASS\r
-CYREG_B0_P6_U0_MC_CFG_BYPASS EQU 0x40010c3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG0\r
-CYREG_B0_P6_U0_CFG0 EQU 0x40010c40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG1\r
-CYREG_B0_P6_U0_CFG1 EQU 0x40010c41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG2\r
-CYREG_B0_P6_U0_CFG2 EQU 0x40010c42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG3\r
-CYREG_B0_P6_U0_CFG3 EQU 0x40010c43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG4\r
-CYREG_B0_P6_U0_CFG4 EQU 0x40010c44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG5\r
-CYREG_B0_P6_U0_CFG5 EQU 0x40010c45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG6\r
-CYREG_B0_P6_U0_CFG6 EQU 0x40010c46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG7\r
-CYREG_B0_P6_U0_CFG7 EQU 0x40010c47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG8\r
-CYREG_B0_P6_U0_CFG8 EQU 0x40010c48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG9\r
-CYREG_B0_P6_U0_CFG9 EQU 0x40010c49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG10\r
-CYREG_B0_P6_U0_CFG10 EQU 0x40010c4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG11\r
-CYREG_B0_P6_U0_CFG11 EQU 0x40010c4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG12\r
-CYREG_B0_P6_U0_CFG12 EQU 0x40010c4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG13\r
-CYREG_B0_P6_U0_CFG13 EQU 0x40010c4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG14\r
-CYREG_B0_P6_U0_CFG14 EQU 0x40010c4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG15\r
-CYREG_B0_P6_U0_CFG15 EQU 0x40010c4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG16\r
-CYREG_B0_P6_U0_CFG16 EQU 0x40010c50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG17\r
-CYREG_B0_P6_U0_CFG17 EQU 0x40010c51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG18\r
-CYREG_B0_P6_U0_CFG18 EQU 0x40010c52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG19\r
-CYREG_B0_P6_U0_CFG19 EQU 0x40010c53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG20\r
-CYREG_B0_P6_U0_CFG20 EQU 0x40010c54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG21\r
-CYREG_B0_P6_U0_CFG21 EQU 0x40010c55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG22\r
-CYREG_B0_P6_U0_CFG22 EQU 0x40010c56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG23\r
-CYREG_B0_P6_U0_CFG23 EQU 0x40010c57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG24\r
-CYREG_B0_P6_U0_CFG24 EQU 0x40010c58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG25\r
-CYREG_B0_P6_U0_CFG25 EQU 0x40010c59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG26\r
-CYREG_B0_P6_U0_CFG26 EQU 0x40010c5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG27\r
-CYREG_B0_P6_U0_CFG27 EQU 0x40010c5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG28\r
-CYREG_B0_P6_U0_CFG28 EQU 0x40010c5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG29\r
-CYREG_B0_P6_U0_CFG29 EQU 0x40010c5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG30\r
-CYREG_B0_P6_U0_CFG30 EQU 0x40010c5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_CFG31\r
-CYREG_B0_P6_U0_CFG31 EQU 0x40010c5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG0\r
-CYREG_B0_P6_U0_DCFG0 EQU 0x40010c60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG1\r
-CYREG_B0_P6_U0_DCFG1 EQU 0x40010c62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG2\r
-CYREG_B0_P6_U0_DCFG2 EQU 0x40010c64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG3\r
-CYREG_B0_P6_U0_DCFG3 EQU 0x40010c66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG4\r
-CYREG_B0_P6_U0_DCFG4 EQU 0x40010c68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG5\r
-CYREG_B0_P6_U0_DCFG5 EQU 0x40010c6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG6\r
-CYREG_B0_P6_U0_DCFG6 EQU 0x40010c6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U0_DCFG7\r
-CYREG_B0_P6_U0_DCFG7 EQU 0x40010c6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_BASE\r
-CYDEV_UCFG_B0_P6_U1_BASE EQU 0x40010c80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_U1_SIZE\r
-CYDEV_UCFG_B0_P6_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT0\r
-CYREG_B0_P6_U1_PLD_IT0 EQU 0x40010c80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT1\r
-CYREG_B0_P6_U1_PLD_IT1 EQU 0x40010c84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT2\r
-CYREG_B0_P6_U1_PLD_IT2 EQU 0x40010c88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT3\r
-CYREG_B0_P6_U1_PLD_IT3 EQU 0x40010c8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT4\r
-CYREG_B0_P6_U1_PLD_IT4 EQU 0x40010c90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT5\r
-CYREG_B0_P6_U1_PLD_IT5 EQU 0x40010c94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT6\r
-CYREG_B0_P6_U1_PLD_IT6 EQU 0x40010c98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT7\r
-CYREG_B0_P6_U1_PLD_IT7 EQU 0x40010c9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT8\r
-CYREG_B0_P6_U1_PLD_IT8 EQU 0x40010ca0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT9\r
-CYREG_B0_P6_U1_PLD_IT9 EQU 0x40010ca4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT10\r
-CYREG_B0_P6_U1_PLD_IT10 EQU 0x40010ca8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_IT11\r
-CYREG_B0_P6_U1_PLD_IT11 EQU 0x40010cac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT0\r
-CYREG_B0_P6_U1_PLD_ORT0 EQU 0x40010cb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT1\r
-CYREG_B0_P6_U1_PLD_ORT1 EQU 0x40010cb2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT2\r
-CYREG_B0_P6_U1_PLD_ORT2 EQU 0x40010cb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_PLD_ORT3\r
-CYREG_B0_P6_U1_PLD_ORT3 EQU 0x40010cb6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P6_U1_MC_CFG_CEN_CONST EQU 0x40010cb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_XORFB\r
-CYREG_B0_P6_U1_MC_CFG_XORFB EQU 0x40010cba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P6_U1_MC_CFG_SET_RESET EQU 0x40010cbc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_MC_CFG_BYPASS\r
-CYREG_B0_P6_U1_MC_CFG_BYPASS EQU 0x40010cbe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG0\r
-CYREG_B0_P6_U1_CFG0 EQU 0x40010cc0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG1\r
-CYREG_B0_P6_U1_CFG1 EQU 0x40010cc1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG2\r
-CYREG_B0_P6_U1_CFG2 EQU 0x40010cc2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG3\r
-CYREG_B0_P6_U1_CFG3 EQU 0x40010cc3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG4\r
-CYREG_B0_P6_U1_CFG4 EQU 0x40010cc4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG5\r
-CYREG_B0_P6_U1_CFG5 EQU 0x40010cc5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG6\r
-CYREG_B0_P6_U1_CFG6 EQU 0x40010cc6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG7\r
-CYREG_B0_P6_U1_CFG7 EQU 0x40010cc7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG8\r
-CYREG_B0_P6_U1_CFG8 EQU 0x40010cc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG9\r
-CYREG_B0_P6_U1_CFG9 EQU 0x40010cc9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG10\r
-CYREG_B0_P6_U1_CFG10 EQU 0x40010cca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG11\r
-CYREG_B0_P6_U1_CFG11 EQU 0x40010ccb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG12\r
-CYREG_B0_P6_U1_CFG12 EQU 0x40010ccc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG13\r
-CYREG_B0_P6_U1_CFG13 EQU 0x40010ccd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG14\r
-CYREG_B0_P6_U1_CFG14 EQU 0x40010cce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG15\r
-CYREG_B0_P6_U1_CFG15 EQU 0x40010ccf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG16\r
-CYREG_B0_P6_U1_CFG16 EQU 0x40010cd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG17\r
-CYREG_B0_P6_U1_CFG17 EQU 0x40010cd1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG18\r
-CYREG_B0_P6_U1_CFG18 EQU 0x40010cd2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG19\r
-CYREG_B0_P6_U1_CFG19 EQU 0x40010cd3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG20\r
-CYREG_B0_P6_U1_CFG20 EQU 0x40010cd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG21\r
-CYREG_B0_P6_U1_CFG21 EQU 0x40010cd5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG22\r
-CYREG_B0_P6_U1_CFG22 EQU 0x40010cd6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG23\r
-CYREG_B0_P6_U1_CFG23 EQU 0x40010cd7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG24\r
-CYREG_B0_P6_U1_CFG24 EQU 0x40010cd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG25\r
-CYREG_B0_P6_U1_CFG25 EQU 0x40010cd9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG26\r
-CYREG_B0_P6_U1_CFG26 EQU 0x40010cda\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG27\r
-CYREG_B0_P6_U1_CFG27 EQU 0x40010cdb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG28\r
-CYREG_B0_P6_U1_CFG28 EQU 0x40010cdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG29\r
-CYREG_B0_P6_U1_CFG29 EQU 0x40010cdd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG30\r
-CYREG_B0_P6_U1_CFG30 EQU 0x40010cde\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_CFG31\r
-CYREG_B0_P6_U1_CFG31 EQU 0x40010cdf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG0\r
-CYREG_B0_P6_U1_DCFG0 EQU 0x40010ce0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG1\r
-CYREG_B0_P6_U1_DCFG1 EQU 0x40010ce2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG2\r
-CYREG_B0_P6_U1_DCFG2 EQU 0x40010ce4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG3\r
-CYREG_B0_P6_U1_DCFG3 EQU 0x40010ce6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG4\r
-CYREG_B0_P6_U1_DCFG4 EQU 0x40010ce8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG5\r
-CYREG_B0_P6_U1_DCFG5 EQU 0x40010cea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG6\r
-CYREG_B0_P6_U1_DCFG6 EQU 0x40010cec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P6_U1_DCFG7\r
-CYREG_B0_P6_U1_DCFG7 EQU 0x40010cee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_BASE\r
-CYDEV_UCFG_B0_P6_ROUTE_BASE EQU 0x40010d00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P6_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P6_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_BASE\r
-CYDEV_UCFG_B0_P7_BASE EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_SIZE\r
-CYDEV_UCFG_B0_P7_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_BASE\r
-CYDEV_UCFG_B0_P7_U0_BASE EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U0_SIZE\r
-CYDEV_UCFG_B0_P7_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT0\r
-CYREG_B0_P7_U0_PLD_IT0 EQU 0x40010e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT1\r
-CYREG_B0_P7_U0_PLD_IT1 EQU 0x40010e04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT2\r
-CYREG_B0_P7_U0_PLD_IT2 EQU 0x40010e08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT3\r
-CYREG_B0_P7_U0_PLD_IT3 EQU 0x40010e0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT4\r
-CYREG_B0_P7_U0_PLD_IT4 EQU 0x40010e10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT5\r
-CYREG_B0_P7_U0_PLD_IT5 EQU 0x40010e14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT6\r
-CYREG_B0_P7_U0_PLD_IT6 EQU 0x40010e18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT7\r
-CYREG_B0_P7_U0_PLD_IT7 EQU 0x40010e1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT8\r
-CYREG_B0_P7_U0_PLD_IT8 EQU 0x40010e20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT9\r
-CYREG_B0_P7_U0_PLD_IT9 EQU 0x40010e24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT10\r
-CYREG_B0_P7_U0_PLD_IT10 EQU 0x40010e28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_IT11\r
-CYREG_B0_P7_U0_PLD_IT11 EQU 0x40010e2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT0\r
-CYREG_B0_P7_U0_PLD_ORT0 EQU 0x40010e30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT1\r
-CYREG_B0_P7_U0_PLD_ORT1 EQU 0x40010e32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT2\r
-CYREG_B0_P7_U0_PLD_ORT2 EQU 0x40010e34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_PLD_ORT3\r
-CYREG_B0_P7_U0_PLD_ORT3 EQU 0x40010e36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_CEN_CONST\r
-CYREG_B0_P7_U0_MC_CFG_CEN_CONST EQU 0x40010e38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_XORFB\r
-CYREG_B0_P7_U0_MC_CFG_XORFB EQU 0x40010e3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_SET_RESET\r
-CYREG_B0_P7_U0_MC_CFG_SET_RESET EQU 0x40010e3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_MC_CFG_BYPASS\r
-CYREG_B0_P7_U0_MC_CFG_BYPASS EQU 0x40010e3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG0\r
-CYREG_B0_P7_U0_CFG0 EQU 0x40010e40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG1\r
-CYREG_B0_P7_U0_CFG1 EQU 0x40010e41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG2\r
-CYREG_B0_P7_U0_CFG2 EQU 0x40010e42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG3\r
-CYREG_B0_P7_U0_CFG3 EQU 0x40010e43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG4\r
-CYREG_B0_P7_U0_CFG4 EQU 0x40010e44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG5\r
-CYREG_B0_P7_U0_CFG5 EQU 0x40010e45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG6\r
-CYREG_B0_P7_U0_CFG6 EQU 0x40010e46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG7\r
-CYREG_B0_P7_U0_CFG7 EQU 0x40010e47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG8\r
-CYREG_B0_P7_U0_CFG8 EQU 0x40010e48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG9\r
-CYREG_B0_P7_U0_CFG9 EQU 0x40010e49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG10\r
-CYREG_B0_P7_U0_CFG10 EQU 0x40010e4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG11\r
-CYREG_B0_P7_U0_CFG11 EQU 0x40010e4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG12\r
-CYREG_B0_P7_U0_CFG12 EQU 0x40010e4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG13\r
-CYREG_B0_P7_U0_CFG13 EQU 0x40010e4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG14\r
-CYREG_B0_P7_U0_CFG14 EQU 0x40010e4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG15\r
-CYREG_B0_P7_U0_CFG15 EQU 0x40010e4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG16\r
-CYREG_B0_P7_U0_CFG16 EQU 0x40010e50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG17\r
-CYREG_B0_P7_U0_CFG17 EQU 0x40010e51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG18\r
-CYREG_B0_P7_U0_CFG18 EQU 0x40010e52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG19\r
-CYREG_B0_P7_U0_CFG19 EQU 0x40010e53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG20\r
-CYREG_B0_P7_U0_CFG20 EQU 0x40010e54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG21\r
-CYREG_B0_P7_U0_CFG21 EQU 0x40010e55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG22\r
-CYREG_B0_P7_U0_CFG22 EQU 0x40010e56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG23\r
-CYREG_B0_P7_U0_CFG23 EQU 0x40010e57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG24\r
-CYREG_B0_P7_U0_CFG24 EQU 0x40010e58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG25\r
-CYREG_B0_P7_U0_CFG25 EQU 0x40010e59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG26\r
-CYREG_B0_P7_U0_CFG26 EQU 0x40010e5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG27\r
-CYREG_B0_P7_U0_CFG27 EQU 0x40010e5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG28\r
-CYREG_B0_P7_U0_CFG28 EQU 0x40010e5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG29\r
-CYREG_B0_P7_U0_CFG29 EQU 0x40010e5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG30\r
-CYREG_B0_P7_U0_CFG30 EQU 0x40010e5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_CFG31\r
-CYREG_B0_P7_U0_CFG31 EQU 0x40010e5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG0\r
-CYREG_B0_P7_U0_DCFG0 EQU 0x40010e60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG1\r
-CYREG_B0_P7_U0_DCFG1 EQU 0x40010e62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG2\r
-CYREG_B0_P7_U0_DCFG2 EQU 0x40010e64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG3\r
-CYREG_B0_P7_U0_DCFG3 EQU 0x40010e66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG4\r
-CYREG_B0_P7_U0_DCFG4 EQU 0x40010e68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG5\r
-CYREG_B0_P7_U0_DCFG5 EQU 0x40010e6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG6\r
-CYREG_B0_P7_U0_DCFG6 EQU 0x40010e6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U0_DCFG7\r
-CYREG_B0_P7_U0_DCFG7 EQU 0x40010e6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_BASE\r
-CYDEV_UCFG_B0_P7_U1_BASE EQU 0x40010e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_U1_SIZE\r
-CYDEV_UCFG_B0_P7_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT0\r
-CYREG_B0_P7_U1_PLD_IT0 EQU 0x40010e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT1\r
-CYREG_B0_P7_U1_PLD_IT1 EQU 0x40010e84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT2\r
-CYREG_B0_P7_U1_PLD_IT2 EQU 0x40010e88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT3\r
-CYREG_B0_P7_U1_PLD_IT3 EQU 0x40010e8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT4\r
-CYREG_B0_P7_U1_PLD_IT4 EQU 0x40010e90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT5\r
-CYREG_B0_P7_U1_PLD_IT5 EQU 0x40010e94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT6\r
-CYREG_B0_P7_U1_PLD_IT6 EQU 0x40010e98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT7\r
-CYREG_B0_P7_U1_PLD_IT7 EQU 0x40010e9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT8\r
-CYREG_B0_P7_U1_PLD_IT8 EQU 0x40010ea0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT9\r
-CYREG_B0_P7_U1_PLD_IT9 EQU 0x40010ea4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT10\r
-CYREG_B0_P7_U1_PLD_IT10 EQU 0x40010ea8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_IT11\r
-CYREG_B0_P7_U1_PLD_IT11 EQU 0x40010eac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT0\r
-CYREG_B0_P7_U1_PLD_ORT0 EQU 0x40010eb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT1\r
-CYREG_B0_P7_U1_PLD_ORT1 EQU 0x40010eb2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT2\r
-CYREG_B0_P7_U1_PLD_ORT2 EQU 0x40010eb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_PLD_ORT3\r
-CYREG_B0_P7_U1_PLD_ORT3 EQU 0x40010eb6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_CEN_CONST\r
-CYREG_B0_P7_U1_MC_CFG_CEN_CONST EQU 0x40010eb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_XORFB\r
-CYREG_B0_P7_U1_MC_CFG_XORFB EQU 0x40010eba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_SET_RESET\r
-CYREG_B0_P7_U1_MC_CFG_SET_RESET EQU 0x40010ebc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_MC_CFG_BYPASS\r
-CYREG_B0_P7_U1_MC_CFG_BYPASS EQU 0x40010ebe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG0\r
-CYREG_B0_P7_U1_CFG0 EQU 0x40010ec0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG1\r
-CYREG_B0_P7_U1_CFG1 EQU 0x40010ec1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG2\r
-CYREG_B0_P7_U1_CFG2 EQU 0x40010ec2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG3\r
-CYREG_B0_P7_U1_CFG3 EQU 0x40010ec3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG4\r
-CYREG_B0_P7_U1_CFG4 EQU 0x40010ec4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG5\r
-CYREG_B0_P7_U1_CFG5 EQU 0x40010ec5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG6\r
-CYREG_B0_P7_U1_CFG6 EQU 0x40010ec6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG7\r
-CYREG_B0_P7_U1_CFG7 EQU 0x40010ec7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG8\r
-CYREG_B0_P7_U1_CFG8 EQU 0x40010ec8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG9\r
-CYREG_B0_P7_U1_CFG9 EQU 0x40010ec9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG10\r
-CYREG_B0_P7_U1_CFG10 EQU 0x40010eca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG11\r
-CYREG_B0_P7_U1_CFG11 EQU 0x40010ecb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG12\r
-CYREG_B0_P7_U1_CFG12 EQU 0x40010ecc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG13\r
-CYREG_B0_P7_U1_CFG13 EQU 0x40010ecd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG14\r
-CYREG_B0_P7_U1_CFG14 EQU 0x40010ece\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG15\r
-CYREG_B0_P7_U1_CFG15 EQU 0x40010ecf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG16\r
-CYREG_B0_P7_U1_CFG16 EQU 0x40010ed0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG17\r
-CYREG_B0_P7_U1_CFG17 EQU 0x40010ed1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG18\r
-CYREG_B0_P7_U1_CFG18 EQU 0x40010ed2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG19\r
-CYREG_B0_P7_U1_CFG19 EQU 0x40010ed3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG20\r
-CYREG_B0_P7_U1_CFG20 EQU 0x40010ed4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG21\r
-CYREG_B0_P7_U1_CFG21 EQU 0x40010ed5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG22\r
-CYREG_B0_P7_U1_CFG22 EQU 0x40010ed6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG23\r
-CYREG_B0_P7_U1_CFG23 EQU 0x40010ed7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG24\r
-CYREG_B0_P7_U1_CFG24 EQU 0x40010ed8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG25\r
-CYREG_B0_P7_U1_CFG25 EQU 0x40010ed9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG26\r
-CYREG_B0_P7_U1_CFG26 EQU 0x40010eda\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG27\r
-CYREG_B0_P7_U1_CFG27 EQU 0x40010edb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG28\r
-CYREG_B0_P7_U1_CFG28 EQU 0x40010edc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG29\r
-CYREG_B0_P7_U1_CFG29 EQU 0x40010edd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG30\r
-CYREG_B0_P7_U1_CFG30 EQU 0x40010ede\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_CFG31\r
-CYREG_B0_P7_U1_CFG31 EQU 0x40010edf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG0\r
-CYREG_B0_P7_U1_DCFG0 EQU 0x40010ee0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG1\r
-CYREG_B0_P7_U1_DCFG1 EQU 0x40010ee2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG2\r
-CYREG_B0_P7_U1_DCFG2 EQU 0x40010ee4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG3\r
-CYREG_B0_P7_U1_DCFG3 EQU 0x40010ee6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG4\r
-CYREG_B0_P7_U1_DCFG4 EQU 0x40010ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG5\r
-CYREG_B0_P7_U1_DCFG5 EQU 0x40010eea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG6\r
-CYREG_B0_P7_U1_DCFG6 EQU 0x40010eec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B0_P7_U1_DCFG7\r
-CYREG_B0_P7_U1_DCFG7 EQU 0x40010eee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_BASE\r
-CYDEV_UCFG_B0_P7_ROUTE_BASE EQU 0x40010f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B0_P7_ROUTE_SIZE\r
-CYDEV_UCFG_B0_P7_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_BASE\r
-CYDEV_UCFG_B1_BASE EQU 0x40011000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_SIZE\r
-CYDEV_UCFG_B1_SIZE EQU 0x00000fef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_BASE\r
-CYDEV_UCFG_B1_P2_BASE EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_SIZE\r
-CYDEV_UCFG_B1_P2_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_BASE\r
-CYDEV_UCFG_B1_P2_U0_BASE EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U0_SIZE\r
-CYDEV_UCFG_B1_P2_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT0\r
-CYREG_B1_P2_U0_PLD_IT0 EQU 0x40011400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT1\r
-CYREG_B1_P2_U0_PLD_IT1 EQU 0x40011404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT2\r
-CYREG_B1_P2_U0_PLD_IT2 EQU 0x40011408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT3\r
-CYREG_B1_P2_U0_PLD_IT3 EQU 0x4001140c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT4\r
-CYREG_B1_P2_U0_PLD_IT4 EQU 0x40011410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT5\r
-CYREG_B1_P2_U0_PLD_IT5 EQU 0x40011414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT6\r
-CYREG_B1_P2_U0_PLD_IT6 EQU 0x40011418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT7\r
-CYREG_B1_P2_U0_PLD_IT7 EQU 0x4001141c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT8\r
-CYREG_B1_P2_U0_PLD_IT8 EQU 0x40011420\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT9\r
-CYREG_B1_P2_U0_PLD_IT9 EQU 0x40011424\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT10\r
-CYREG_B1_P2_U0_PLD_IT10 EQU 0x40011428\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_IT11\r
-CYREG_B1_P2_U0_PLD_IT11 EQU 0x4001142c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT0\r
-CYREG_B1_P2_U0_PLD_ORT0 EQU 0x40011430\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT1\r
-CYREG_B1_P2_U0_PLD_ORT1 EQU 0x40011432\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT2\r
-CYREG_B1_P2_U0_PLD_ORT2 EQU 0x40011434\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_PLD_ORT3\r
-CYREG_B1_P2_U0_PLD_ORT3 EQU 0x40011436\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_CEN_CONST\r
-CYREG_B1_P2_U0_MC_CFG_CEN_CONST EQU 0x40011438\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_XORFB\r
-CYREG_B1_P2_U0_MC_CFG_XORFB EQU 0x4001143a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_SET_RESET\r
-CYREG_B1_P2_U0_MC_CFG_SET_RESET EQU 0x4001143c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_MC_CFG_BYPASS\r
-CYREG_B1_P2_U0_MC_CFG_BYPASS EQU 0x4001143e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG0\r
-CYREG_B1_P2_U0_CFG0 EQU 0x40011440\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG1\r
-CYREG_B1_P2_U0_CFG1 EQU 0x40011441\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG2\r
-CYREG_B1_P2_U0_CFG2 EQU 0x40011442\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG3\r
-CYREG_B1_P2_U0_CFG3 EQU 0x40011443\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG4\r
-CYREG_B1_P2_U0_CFG4 EQU 0x40011444\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG5\r
-CYREG_B1_P2_U0_CFG5 EQU 0x40011445\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG6\r
-CYREG_B1_P2_U0_CFG6 EQU 0x40011446\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG7\r
-CYREG_B1_P2_U0_CFG7 EQU 0x40011447\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG8\r
-CYREG_B1_P2_U0_CFG8 EQU 0x40011448\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG9\r
-CYREG_B1_P2_U0_CFG9 EQU 0x40011449\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG10\r
-CYREG_B1_P2_U0_CFG10 EQU 0x4001144a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG11\r
-CYREG_B1_P2_U0_CFG11 EQU 0x4001144b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG12\r
-CYREG_B1_P2_U0_CFG12 EQU 0x4001144c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG13\r
-CYREG_B1_P2_U0_CFG13 EQU 0x4001144d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG14\r
-CYREG_B1_P2_U0_CFG14 EQU 0x4001144e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG15\r
-CYREG_B1_P2_U0_CFG15 EQU 0x4001144f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG16\r
-CYREG_B1_P2_U0_CFG16 EQU 0x40011450\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG17\r
-CYREG_B1_P2_U0_CFG17 EQU 0x40011451\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG18\r
-CYREG_B1_P2_U0_CFG18 EQU 0x40011452\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG19\r
-CYREG_B1_P2_U0_CFG19 EQU 0x40011453\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG20\r
-CYREG_B1_P2_U0_CFG20 EQU 0x40011454\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG21\r
-CYREG_B1_P2_U0_CFG21 EQU 0x40011455\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG22\r
-CYREG_B1_P2_U0_CFG22 EQU 0x40011456\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG23\r
-CYREG_B1_P2_U0_CFG23 EQU 0x40011457\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG24\r
-CYREG_B1_P2_U0_CFG24 EQU 0x40011458\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG25\r
-CYREG_B1_P2_U0_CFG25 EQU 0x40011459\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG26\r
-CYREG_B1_P2_U0_CFG26 EQU 0x4001145a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG27\r
-CYREG_B1_P2_U0_CFG27 EQU 0x4001145b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG28\r
-CYREG_B1_P2_U0_CFG28 EQU 0x4001145c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG29\r
-CYREG_B1_P2_U0_CFG29 EQU 0x4001145d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG30\r
-CYREG_B1_P2_U0_CFG30 EQU 0x4001145e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_CFG31\r
-CYREG_B1_P2_U0_CFG31 EQU 0x4001145f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG0\r
-CYREG_B1_P2_U0_DCFG0 EQU 0x40011460\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG1\r
-CYREG_B1_P2_U0_DCFG1 EQU 0x40011462\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG2\r
-CYREG_B1_P2_U0_DCFG2 EQU 0x40011464\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG3\r
-CYREG_B1_P2_U0_DCFG3 EQU 0x40011466\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG4\r
-CYREG_B1_P2_U0_DCFG4 EQU 0x40011468\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG5\r
-CYREG_B1_P2_U0_DCFG5 EQU 0x4001146a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG6\r
-CYREG_B1_P2_U0_DCFG6 EQU 0x4001146c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U0_DCFG7\r
-CYREG_B1_P2_U0_DCFG7 EQU 0x4001146e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_BASE\r
-CYDEV_UCFG_B1_P2_U1_BASE EQU 0x40011480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_U1_SIZE\r
-CYDEV_UCFG_B1_P2_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT0\r
-CYREG_B1_P2_U1_PLD_IT0 EQU 0x40011480\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT1\r
-CYREG_B1_P2_U1_PLD_IT1 EQU 0x40011484\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT2\r
-CYREG_B1_P2_U1_PLD_IT2 EQU 0x40011488\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT3\r
-CYREG_B1_P2_U1_PLD_IT3 EQU 0x4001148c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT4\r
-CYREG_B1_P2_U1_PLD_IT4 EQU 0x40011490\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT5\r
-CYREG_B1_P2_U1_PLD_IT5 EQU 0x40011494\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT6\r
-CYREG_B1_P2_U1_PLD_IT6 EQU 0x40011498\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT7\r
-CYREG_B1_P2_U1_PLD_IT7 EQU 0x4001149c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT8\r
-CYREG_B1_P2_U1_PLD_IT8 EQU 0x400114a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT9\r
-CYREG_B1_P2_U1_PLD_IT9 EQU 0x400114a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT10\r
-CYREG_B1_P2_U1_PLD_IT10 EQU 0x400114a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_IT11\r
-CYREG_B1_P2_U1_PLD_IT11 EQU 0x400114ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT0\r
-CYREG_B1_P2_U1_PLD_ORT0 EQU 0x400114b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT1\r
-CYREG_B1_P2_U1_PLD_ORT1 EQU 0x400114b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT2\r
-CYREG_B1_P2_U1_PLD_ORT2 EQU 0x400114b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_PLD_ORT3\r
-CYREG_B1_P2_U1_PLD_ORT3 EQU 0x400114b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_CEN_CONST\r
-CYREG_B1_P2_U1_MC_CFG_CEN_CONST EQU 0x400114b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_XORFB\r
-CYREG_B1_P2_U1_MC_CFG_XORFB EQU 0x400114ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_SET_RESET\r
-CYREG_B1_P2_U1_MC_CFG_SET_RESET EQU 0x400114bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_MC_CFG_BYPASS\r
-CYREG_B1_P2_U1_MC_CFG_BYPASS EQU 0x400114be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG0\r
-CYREG_B1_P2_U1_CFG0 EQU 0x400114c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG1\r
-CYREG_B1_P2_U1_CFG1 EQU 0x400114c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG2\r
-CYREG_B1_P2_U1_CFG2 EQU 0x400114c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG3\r
-CYREG_B1_P2_U1_CFG3 EQU 0x400114c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG4\r
-CYREG_B1_P2_U1_CFG4 EQU 0x400114c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG5\r
-CYREG_B1_P2_U1_CFG5 EQU 0x400114c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG6\r
-CYREG_B1_P2_U1_CFG6 EQU 0x400114c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG7\r
-CYREG_B1_P2_U1_CFG7 EQU 0x400114c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG8\r
-CYREG_B1_P2_U1_CFG8 EQU 0x400114c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG9\r
-CYREG_B1_P2_U1_CFG9 EQU 0x400114c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG10\r
-CYREG_B1_P2_U1_CFG10 EQU 0x400114ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG11\r
-CYREG_B1_P2_U1_CFG11 EQU 0x400114cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG12\r
-CYREG_B1_P2_U1_CFG12 EQU 0x400114cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG13\r
-CYREG_B1_P2_U1_CFG13 EQU 0x400114cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG14\r
-CYREG_B1_P2_U1_CFG14 EQU 0x400114ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG15\r
-CYREG_B1_P2_U1_CFG15 EQU 0x400114cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG16\r
-CYREG_B1_P2_U1_CFG16 EQU 0x400114d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG17\r
-CYREG_B1_P2_U1_CFG17 EQU 0x400114d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG18\r
-CYREG_B1_P2_U1_CFG18 EQU 0x400114d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG19\r
-CYREG_B1_P2_U1_CFG19 EQU 0x400114d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG20\r
-CYREG_B1_P2_U1_CFG20 EQU 0x400114d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG21\r
-CYREG_B1_P2_U1_CFG21 EQU 0x400114d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG22\r
-CYREG_B1_P2_U1_CFG22 EQU 0x400114d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG23\r
-CYREG_B1_P2_U1_CFG23 EQU 0x400114d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG24\r
-CYREG_B1_P2_U1_CFG24 EQU 0x400114d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG25\r
-CYREG_B1_P2_U1_CFG25 EQU 0x400114d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG26\r
-CYREG_B1_P2_U1_CFG26 EQU 0x400114da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG27\r
-CYREG_B1_P2_U1_CFG27 EQU 0x400114db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG28\r
-CYREG_B1_P2_U1_CFG28 EQU 0x400114dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG29\r
-CYREG_B1_P2_U1_CFG29 EQU 0x400114dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG30\r
-CYREG_B1_P2_U1_CFG30 EQU 0x400114de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_CFG31\r
-CYREG_B1_P2_U1_CFG31 EQU 0x400114df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG0\r
-CYREG_B1_P2_U1_DCFG0 EQU 0x400114e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG1\r
-CYREG_B1_P2_U1_DCFG1 EQU 0x400114e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG2\r
-CYREG_B1_P2_U1_DCFG2 EQU 0x400114e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG3\r
-CYREG_B1_P2_U1_DCFG3 EQU 0x400114e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG4\r
-CYREG_B1_P2_U1_DCFG4 EQU 0x400114e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG5\r
-CYREG_B1_P2_U1_DCFG5 EQU 0x400114ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG6\r
-CYREG_B1_P2_U1_DCFG6 EQU 0x400114ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P2_U1_DCFG7\r
-CYREG_B1_P2_U1_DCFG7 EQU 0x400114ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_BASE\r
-CYDEV_UCFG_B1_P2_ROUTE_BASE EQU 0x40011500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P2_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P2_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_BASE\r
-CYDEV_UCFG_B1_P3_BASE EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_SIZE\r
-CYDEV_UCFG_B1_P3_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_BASE\r
-CYDEV_UCFG_B1_P3_U0_BASE EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U0_SIZE\r
-CYDEV_UCFG_B1_P3_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT0\r
-CYREG_B1_P3_U0_PLD_IT0 EQU 0x40011600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT1\r
-CYREG_B1_P3_U0_PLD_IT1 EQU 0x40011604\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT2\r
-CYREG_B1_P3_U0_PLD_IT2 EQU 0x40011608\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT3\r
-CYREG_B1_P3_U0_PLD_IT3 EQU 0x4001160c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT4\r
-CYREG_B1_P3_U0_PLD_IT4 EQU 0x40011610\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT5\r
-CYREG_B1_P3_U0_PLD_IT5 EQU 0x40011614\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT6\r
-CYREG_B1_P3_U0_PLD_IT6 EQU 0x40011618\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT7\r
-CYREG_B1_P3_U0_PLD_IT7 EQU 0x4001161c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT8\r
-CYREG_B1_P3_U0_PLD_IT8 EQU 0x40011620\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT9\r
-CYREG_B1_P3_U0_PLD_IT9 EQU 0x40011624\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT10\r
-CYREG_B1_P3_U0_PLD_IT10 EQU 0x40011628\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_IT11\r
-CYREG_B1_P3_U0_PLD_IT11 EQU 0x4001162c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT0\r
-CYREG_B1_P3_U0_PLD_ORT0 EQU 0x40011630\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT1\r
-CYREG_B1_P3_U0_PLD_ORT1 EQU 0x40011632\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT2\r
-CYREG_B1_P3_U0_PLD_ORT2 EQU 0x40011634\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_PLD_ORT3\r
-CYREG_B1_P3_U0_PLD_ORT3 EQU 0x40011636\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_CEN_CONST\r
-CYREG_B1_P3_U0_MC_CFG_CEN_CONST EQU 0x40011638\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_XORFB\r
-CYREG_B1_P3_U0_MC_CFG_XORFB EQU 0x4001163a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_SET_RESET\r
-CYREG_B1_P3_U0_MC_CFG_SET_RESET EQU 0x4001163c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_MC_CFG_BYPASS\r
-CYREG_B1_P3_U0_MC_CFG_BYPASS EQU 0x4001163e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG0\r
-CYREG_B1_P3_U0_CFG0 EQU 0x40011640\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG1\r
-CYREG_B1_P3_U0_CFG1 EQU 0x40011641\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG2\r
-CYREG_B1_P3_U0_CFG2 EQU 0x40011642\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG3\r
-CYREG_B1_P3_U0_CFG3 EQU 0x40011643\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG4\r
-CYREG_B1_P3_U0_CFG4 EQU 0x40011644\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG5\r
-CYREG_B1_P3_U0_CFG5 EQU 0x40011645\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG6\r
-CYREG_B1_P3_U0_CFG6 EQU 0x40011646\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG7\r
-CYREG_B1_P3_U0_CFG7 EQU 0x40011647\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG8\r
-CYREG_B1_P3_U0_CFG8 EQU 0x40011648\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG9\r
-CYREG_B1_P3_U0_CFG9 EQU 0x40011649\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG10\r
-CYREG_B1_P3_U0_CFG10 EQU 0x4001164a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG11\r
-CYREG_B1_P3_U0_CFG11 EQU 0x4001164b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG12\r
-CYREG_B1_P3_U0_CFG12 EQU 0x4001164c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG13\r
-CYREG_B1_P3_U0_CFG13 EQU 0x4001164d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG14\r
-CYREG_B1_P3_U0_CFG14 EQU 0x4001164e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG15\r
-CYREG_B1_P3_U0_CFG15 EQU 0x4001164f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG16\r
-CYREG_B1_P3_U0_CFG16 EQU 0x40011650\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG17\r
-CYREG_B1_P3_U0_CFG17 EQU 0x40011651\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG18\r
-CYREG_B1_P3_U0_CFG18 EQU 0x40011652\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG19\r
-CYREG_B1_P3_U0_CFG19 EQU 0x40011653\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG20\r
-CYREG_B1_P3_U0_CFG20 EQU 0x40011654\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG21\r
-CYREG_B1_P3_U0_CFG21 EQU 0x40011655\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG22\r
-CYREG_B1_P3_U0_CFG22 EQU 0x40011656\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG23\r
-CYREG_B1_P3_U0_CFG23 EQU 0x40011657\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG24\r
-CYREG_B1_P3_U0_CFG24 EQU 0x40011658\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG25\r
-CYREG_B1_P3_U0_CFG25 EQU 0x40011659\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG26\r
-CYREG_B1_P3_U0_CFG26 EQU 0x4001165a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG27\r
-CYREG_B1_P3_U0_CFG27 EQU 0x4001165b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG28\r
-CYREG_B1_P3_U0_CFG28 EQU 0x4001165c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG29\r
-CYREG_B1_P3_U0_CFG29 EQU 0x4001165d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG30\r
-CYREG_B1_P3_U0_CFG30 EQU 0x4001165e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_CFG31\r
-CYREG_B1_P3_U0_CFG31 EQU 0x4001165f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG0\r
-CYREG_B1_P3_U0_DCFG0 EQU 0x40011660\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG1\r
-CYREG_B1_P3_U0_DCFG1 EQU 0x40011662\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG2\r
-CYREG_B1_P3_U0_DCFG2 EQU 0x40011664\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG3\r
-CYREG_B1_P3_U0_DCFG3 EQU 0x40011666\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG4\r
-CYREG_B1_P3_U0_DCFG4 EQU 0x40011668\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG5\r
-CYREG_B1_P3_U0_DCFG5 EQU 0x4001166a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG6\r
-CYREG_B1_P3_U0_DCFG6 EQU 0x4001166c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U0_DCFG7\r
-CYREG_B1_P3_U0_DCFG7 EQU 0x4001166e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_BASE\r
-CYDEV_UCFG_B1_P3_U1_BASE EQU 0x40011680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_U1_SIZE\r
-CYDEV_UCFG_B1_P3_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT0\r
-CYREG_B1_P3_U1_PLD_IT0 EQU 0x40011680\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT1\r
-CYREG_B1_P3_U1_PLD_IT1 EQU 0x40011684\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT2\r
-CYREG_B1_P3_U1_PLD_IT2 EQU 0x40011688\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT3\r
-CYREG_B1_P3_U1_PLD_IT3 EQU 0x4001168c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT4\r
-CYREG_B1_P3_U1_PLD_IT4 EQU 0x40011690\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT5\r
-CYREG_B1_P3_U1_PLD_IT5 EQU 0x40011694\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT6\r
-CYREG_B1_P3_U1_PLD_IT6 EQU 0x40011698\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT7\r
-CYREG_B1_P3_U1_PLD_IT7 EQU 0x4001169c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT8\r
-CYREG_B1_P3_U1_PLD_IT8 EQU 0x400116a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT9\r
-CYREG_B1_P3_U1_PLD_IT9 EQU 0x400116a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT10\r
-CYREG_B1_P3_U1_PLD_IT10 EQU 0x400116a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_IT11\r
-CYREG_B1_P3_U1_PLD_IT11 EQU 0x400116ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT0\r
-CYREG_B1_P3_U1_PLD_ORT0 EQU 0x400116b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT1\r
-CYREG_B1_P3_U1_PLD_ORT1 EQU 0x400116b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT2\r
-CYREG_B1_P3_U1_PLD_ORT2 EQU 0x400116b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_PLD_ORT3\r
-CYREG_B1_P3_U1_PLD_ORT3 EQU 0x400116b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_CEN_CONST\r
-CYREG_B1_P3_U1_MC_CFG_CEN_CONST EQU 0x400116b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_XORFB\r
-CYREG_B1_P3_U1_MC_CFG_XORFB EQU 0x400116ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_SET_RESET\r
-CYREG_B1_P3_U1_MC_CFG_SET_RESET EQU 0x400116bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_MC_CFG_BYPASS\r
-CYREG_B1_P3_U1_MC_CFG_BYPASS EQU 0x400116be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG0\r
-CYREG_B1_P3_U1_CFG0 EQU 0x400116c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG1\r
-CYREG_B1_P3_U1_CFG1 EQU 0x400116c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG2\r
-CYREG_B1_P3_U1_CFG2 EQU 0x400116c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG3\r
-CYREG_B1_P3_U1_CFG3 EQU 0x400116c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG4\r
-CYREG_B1_P3_U1_CFG4 EQU 0x400116c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG5\r
-CYREG_B1_P3_U1_CFG5 EQU 0x400116c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG6\r
-CYREG_B1_P3_U1_CFG6 EQU 0x400116c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG7\r
-CYREG_B1_P3_U1_CFG7 EQU 0x400116c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG8\r
-CYREG_B1_P3_U1_CFG8 EQU 0x400116c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG9\r
-CYREG_B1_P3_U1_CFG9 EQU 0x400116c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG10\r
-CYREG_B1_P3_U1_CFG10 EQU 0x400116ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG11\r
-CYREG_B1_P3_U1_CFG11 EQU 0x400116cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG12\r
-CYREG_B1_P3_U1_CFG12 EQU 0x400116cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG13\r
-CYREG_B1_P3_U1_CFG13 EQU 0x400116cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG14\r
-CYREG_B1_P3_U1_CFG14 EQU 0x400116ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG15\r
-CYREG_B1_P3_U1_CFG15 EQU 0x400116cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG16\r
-CYREG_B1_P3_U1_CFG16 EQU 0x400116d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG17\r
-CYREG_B1_P3_U1_CFG17 EQU 0x400116d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG18\r
-CYREG_B1_P3_U1_CFG18 EQU 0x400116d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG19\r
-CYREG_B1_P3_U1_CFG19 EQU 0x400116d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG20\r
-CYREG_B1_P3_U1_CFG20 EQU 0x400116d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG21\r
-CYREG_B1_P3_U1_CFG21 EQU 0x400116d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG22\r
-CYREG_B1_P3_U1_CFG22 EQU 0x400116d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG23\r
-CYREG_B1_P3_U1_CFG23 EQU 0x400116d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG24\r
-CYREG_B1_P3_U1_CFG24 EQU 0x400116d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG25\r
-CYREG_B1_P3_U1_CFG25 EQU 0x400116d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG26\r
-CYREG_B1_P3_U1_CFG26 EQU 0x400116da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG27\r
-CYREG_B1_P3_U1_CFG27 EQU 0x400116db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG28\r
-CYREG_B1_P3_U1_CFG28 EQU 0x400116dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG29\r
-CYREG_B1_P3_U1_CFG29 EQU 0x400116dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG30\r
-CYREG_B1_P3_U1_CFG30 EQU 0x400116de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_CFG31\r
-CYREG_B1_P3_U1_CFG31 EQU 0x400116df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG0\r
-CYREG_B1_P3_U1_DCFG0 EQU 0x400116e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG1\r
-CYREG_B1_P3_U1_DCFG1 EQU 0x400116e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG2\r
-CYREG_B1_P3_U1_DCFG2 EQU 0x400116e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG3\r
-CYREG_B1_P3_U1_DCFG3 EQU 0x400116e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG4\r
-CYREG_B1_P3_U1_DCFG4 EQU 0x400116e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG5\r
-CYREG_B1_P3_U1_DCFG5 EQU 0x400116ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG6\r
-CYREG_B1_P3_U1_DCFG6 EQU 0x400116ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P3_U1_DCFG7\r
-CYREG_B1_P3_U1_DCFG7 EQU 0x400116ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_BASE\r
-CYDEV_UCFG_B1_P3_ROUTE_BASE EQU 0x40011700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P3_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P3_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_BASE\r
-CYDEV_UCFG_B1_P4_BASE EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_SIZE\r
-CYDEV_UCFG_B1_P4_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_BASE\r
-CYDEV_UCFG_B1_P4_U0_BASE EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U0_SIZE\r
-CYDEV_UCFG_B1_P4_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT0\r
-CYREG_B1_P4_U0_PLD_IT0 EQU 0x40011800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT1\r
-CYREG_B1_P4_U0_PLD_IT1 EQU 0x40011804\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT2\r
-CYREG_B1_P4_U0_PLD_IT2 EQU 0x40011808\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT3\r
-CYREG_B1_P4_U0_PLD_IT3 EQU 0x4001180c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT4\r
-CYREG_B1_P4_U0_PLD_IT4 EQU 0x40011810\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT5\r
-CYREG_B1_P4_U0_PLD_IT5 EQU 0x40011814\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT6\r
-CYREG_B1_P4_U0_PLD_IT6 EQU 0x40011818\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT7\r
-CYREG_B1_P4_U0_PLD_IT7 EQU 0x4001181c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT8\r
-CYREG_B1_P4_U0_PLD_IT8 EQU 0x40011820\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT9\r
-CYREG_B1_P4_U0_PLD_IT9 EQU 0x40011824\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT10\r
-CYREG_B1_P4_U0_PLD_IT10 EQU 0x40011828\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_IT11\r
-CYREG_B1_P4_U0_PLD_IT11 EQU 0x4001182c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT0\r
-CYREG_B1_P4_U0_PLD_ORT0 EQU 0x40011830\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT1\r
-CYREG_B1_P4_U0_PLD_ORT1 EQU 0x40011832\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT2\r
-CYREG_B1_P4_U0_PLD_ORT2 EQU 0x40011834\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_PLD_ORT3\r
-CYREG_B1_P4_U0_PLD_ORT3 EQU 0x40011836\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_CEN_CONST\r
-CYREG_B1_P4_U0_MC_CFG_CEN_CONST EQU 0x40011838\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_XORFB\r
-CYREG_B1_P4_U0_MC_CFG_XORFB EQU 0x4001183a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_SET_RESET\r
-CYREG_B1_P4_U0_MC_CFG_SET_RESET EQU 0x4001183c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_MC_CFG_BYPASS\r
-CYREG_B1_P4_U0_MC_CFG_BYPASS EQU 0x4001183e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG0\r
-CYREG_B1_P4_U0_CFG0 EQU 0x40011840\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG1\r
-CYREG_B1_P4_U0_CFG1 EQU 0x40011841\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG2\r
-CYREG_B1_P4_U0_CFG2 EQU 0x40011842\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG3\r
-CYREG_B1_P4_U0_CFG3 EQU 0x40011843\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG4\r
-CYREG_B1_P4_U0_CFG4 EQU 0x40011844\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG5\r
-CYREG_B1_P4_U0_CFG5 EQU 0x40011845\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG6\r
-CYREG_B1_P4_U0_CFG6 EQU 0x40011846\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG7\r
-CYREG_B1_P4_U0_CFG7 EQU 0x40011847\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG8\r
-CYREG_B1_P4_U0_CFG8 EQU 0x40011848\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG9\r
-CYREG_B1_P4_U0_CFG9 EQU 0x40011849\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG10\r
-CYREG_B1_P4_U0_CFG10 EQU 0x4001184a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG11\r
-CYREG_B1_P4_U0_CFG11 EQU 0x4001184b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG12\r
-CYREG_B1_P4_U0_CFG12 EQU 0x4001184c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG13\r
-CYREG_B1_P4_U0_CFG13 EQU 0x4001184d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG14\r
-CYREG_B1_P4_U0_CFG14 EQU 0x4001184e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG15\r
-CYREG_B1_P4_U0_CFG15 EQU 0x4001184f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG16\r
-CYREG_B1_P4_U0_CFG16 EQU 0x40011850\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG17\r
-CYREG_B1_P4_U0_CFG17 EQU 0x40011851\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG18\r
-CYREG_B1_P4_U0_CFG18 EQU 0x40011852\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG19\r
-CYREG_B1_P4_U0_CFG19 EQU 0x40011853\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG20\r
-CYREG_B1_P4_U0_CFG20 EQU 0x40011854\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG21\r
-CYREG_B1_P4_U0_CFG21 EQU 0x40011855\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG22\r
-CYREG_B1_P4_U0_CFG22 EQU 0x40011856\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG23\r
-CYREG_B1_P4_U0_CFG23 EQU 0x40011857\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG24\r
-CYREG_B1_P4_U0_CFG24 EQU 0x40011858\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG25\r
-CYREG_B1_P4_U0_CFG25 EQU 0x40011859\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG26\r
-CYREG_B1_P4_U0_CFG26 EQU 0x4001185a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG27\r
-CYREG_B1_P4_U0_CFG27 EQU 0x4001185b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG28\r
-CYREG_B1_P4_U0_CFG28 EQU 0x4001185c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG29\r
-CYREG_B1_P4_U0_CFG29 EQU 0x4001185d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG30\r
-CYREG_B1_P4_U0_CFG30 EQU 0x4001185e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_CFG31\r
-CYREG_B1_P4_U0_CFG31 EQU 0x4001185f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG0\r
-CYREG_B1_P4_U0_DCFG0 EQU 0x40011860\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG1\r
-CYREG_B1_P4_U0_DCFG1 EQU 0x40011862\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG2\r
-CYREG_B1_P4_U0_DCFG2 EQU 0x40011864\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG3\r
-CYREG_B1_P4_U0_DCFG3 EQU 0x40011866\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG4\r
-CYREG_B1_P4_U0_DCFG4 EQU 0x40011868\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG5\r
-CYREG_B1_P4_U0_DCFG5 EQU 0x4001186a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG6\r
-CYREG_B1_P4_U0_DCFG6 EQU 0x4001186c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U0_DCFG7\r
-CYREG_B1_P4_U0_DCFG7 EQU 0x4001186e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_BASE\r
-CYDEV_UCFG_B1_P4_U1_BASE EQU 0x40011880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_U1_SIZE\r
-CYDEV_UCFG_B1_P4_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT0\r
-CYREG_B1_P4_U1_PLD_IT0 EQU 0x40011880\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT1\r
-CYREG_B1_P4_U1_PLD_IT1 EQU 0x40011884\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT2\r
-CYREG_B1_P4_U1_PLD_IT2 EQU 0x40011888\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT3\r
-CYREG_B1_P4_U1_PLD_IT3 EQU 0x4001188c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT4\r
-CYREG_B1_P4_U1_PLD_IT4 EQU 0x40011890\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT5\r
-CYREG_B1_P4_U1_PLD_IT5 EQU 0x40011894\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT6\r
-CYREG_B1_P4_U1_PLD_IT6 EQU 0x40011898\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT7\r
-CYREG_B1_P4_U1_PLD_IT7 EQU 0x4001189c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT8\r
-CYREG_B1_P4_U1_PLD_IT8 EQU 0x400118a0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT9\r
-CYREG_B1_P4_U1_PLD_IT9 EQU 0x400118a4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT10\r
-CYREG_B1_P4_U1_PLD_IT10 EQU 0x400118a8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_IT11\r
-CYREG_B1_P4_U1_PLD_IT11 EQU 0x400118ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT0\r
-CYREG_B1_P4_U1_PLD_ORT0 EQU 0x400118b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT1\r
-CYREG_B1_P4_U1_PLD_ORT1 EQU 0x400118b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT2\r
-CYREG_B1_P4_U1_PLD_ORT2 EQU 0x400118b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_PLD_ORT3\r
-CYREG_B1_P4_U1_PLD_ORT3 EQU 0x400118b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_CEN_CONST\r
-CYREG_B1_P4_U1_MC_CFG_CEN_CONST EQU 0x400118b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_XORFB\r
-CYREG_B1_P4_U1_MC_CFG_XORFB EQU 0x400118ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_SET_RESET\r
-CYREG_B1_P4_U1_MC_CFG_SET_RESET EQU 0x400118bc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_MC_CFG_BYPASS\r
-CYREG_B1_P4_U1_MC_CFG_BYPASS EQU 0x400118be\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG0\r
-CYREG_B1_P4_U1_CFG0 EQU 0x400118c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG1\r
-CYREG_B1_P4_U1_CFG1 EQU 0x400118c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG2\r
-CYREG_B1_P4_U1_CFG2 EQU 0x400118c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG3\r
-CYREG_B1_P4_U1_CFG3 EQU 0x400118c3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG4\r
-CYREG_B1_P4_U1_CFG4 EQU 0x400118c4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG5\r
-CYREG_B1_P4_U1_CFG5 EQU 0x400118c5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG6\r
-CYREG_B1_P4_U1_CFG6 EQU 0x400118c6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG7\r
-CYREG_B1_P4_U1_CFG7 EQU 0x400118c7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG8\r
-CYREG_B1_P4_U1_CFG8 EQU 0x400118c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG9\r
-CYREG_B1_P4_U1_CFG9 EQU 0x400118c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG10\r
-CYREG_B1_P4_U1_CFG10 EQU 0x400118ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG11\r
-CYREG_B1_P4_U1_CFG11 EQU 0x400118cb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG12\r
-CYREG_B1_P4_U1_CFG12 EQU 0x400118cc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG13\r
-CYREG_B1_P4_U1_CFG13 EQU 0x400118cd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG14\r
-CYREG_B1_P4_U1_CFG14 EQU 0x400118ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG15\r
-CYREG_B1_P4_U1_CFG15 EQU 0x400118cf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG16\r
-CYREG_B1_P4_U1_CFG16 EQU 0x400118d0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG17\r
-CYREG_B1_P4_U1_CFG17 EQU 0x400118d1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG18\r
-CYREG_B1_P4_U1_CFG18 EQU 0x400118d2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG19\r
-CYREG_B1_P4_U1_CFG19 EQU 0x400118d3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG20\r
-CYREG_B1_P4_U1_CFG20 EQU 0x400118d4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG21\r
-CYREG_B1_P4_U1_CFG21 EQU 0x400118d5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG22\r
-CYREG_B1_P4_U1_CFG22 EQU 0x400118d6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG23\r
-CYREG_B1_P4_U1_CFG23 EQU 0x400118d7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG24\r
-CYREG_B1_P4_U1_CFG24 EQU 0x400118d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG25\r
-CYREG_B1_P4_U1_CFG25 EQU 0x400118d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG26\r
-CYREG_B1_P4_U1_CFG26 EQU 0x400118da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG27\r
-CYREG_B1_P4_U1_CFG27 EQU 0x400118db\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG28\r
-CYREG_B1_P4_U1_CFG28 EQU 0x400118dc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG29\r
-CYREG_B1_P4_U1_CFG29 EQU 0x400118dd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG30\r
-CYREG_B1_P4_U1_CFG30 EQU 0x400118de\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_CFG31\r
-CYREG_B1_P4_U1_CFG31 EQU 0x400118df\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG0\r
-CYREG_B1_P4_U1_DCFG0 EQU 0x400118e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG1\r
-CYREG_B1_P4_U1_DCFG1 EQU 0x400118e2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG2\r
-CYREG_B1_P4_U1_DCFG2 EQU 0x400118e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG3\r
-CYREG_B1_P4_U1_DCFG3 EQU 0x400118e6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG4\r
-CYREG_B1_P4_U1_DCFG4 EQU 0x400118e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG5\r
-CYREG_B1_P4_U1_DCFG5 EQU 0x400118ea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG6\r
-CYREG_B1_P4_U1_DCFG6 EQU 0x400118ec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P4_U1_DCFG7\r
-CYREG_B1_P4_U1_DCFG7 EQU 0x400118ee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_BASE\r
-CYDEV_UCFG_B1_P4_ROUTE_BASE EQU 0x40011900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P4_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P4_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_BASE\r
-CYDEV_UCFG_B1_P5_BASE EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_SIZE\r
-CYDEV_UCFG_B1_P5_SIZE EQU 0x000001ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_BASE\r
-CYDEV_UCFG_B1_P5_U0_BASE EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U0_SIZE\r
-CYDEV_UCFG_B1_P5_U0_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT0\r
-CYREG_B1_P5_U0_PLD_IT0 EQU 0x40011a00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT1\r
-CYREG_B1_P5_U0_PLD_IT1 EQU 0x40011a04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT2\r
-CYREG_B1_P5_U0_PLD_IT2 EQU 0x40011a08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT3\r
-CYREG_B1_P5_U0_PLD_IT3 EQU 0x40011a0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT4\r
-CYREG_B1_P5_U0_PLD_IT4 EQU 0x40011a10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT5\r
-CYREG_B1_P5_U0_PLD_IT5 EQU 0x40011a14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT6\r
-CYREG_B1_P5_U0_PLD_IT6 EQU 0x40011a18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT7\r
-CYREG_B1_P5_U0_PLD_IT7 EQU 0x40011a1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT8\r
-CYREG_B1_P5_U0_PLD_IT8 EQU 0x40011a20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT9\r
-CYREG_B1_P5_U0_PLD_IT9 EQU 0x40011a24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT10\r
-CYREG_B1_P5_U0_PLD_IT10 EQU 0x40011a28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_IT11\r
-CYREG_B1_P5_U0_PLD_IT11 EQU 0x40011a2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT0\r
-CYREG_B1_P5_U0_PLD_ORT0 EQU 0x40011a30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT1\r
-CYREG_B1_P5_U0_PLD_ORT1 EQU 0x40011a32\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT2\r
-CYREG_B1_P5_U0_PLD_ORT2 EQU 0x40011a34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_PLD_ORT3\r
-CYREG_B1_P5_U0_PLD_ORT3 EQU 0x40011a36\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_CEN_CONST\r
-CYREG_B1_P5_U0_MC_CFG_CEN_CONST EQU 0x40011a38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_XORFB\r
-CYREG_B1_P5_U0_MC_CFG_XORFB EQU 0x40011a3a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_SET_RESET\r
-CYREG_B1_P5_U0_MC_CFG_SET_RESET EQU 0x40011a3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_MC_CFG_BYPASS\r
-CYREG_B1_P5_U0_MC_CFG_BYPASS EQU 0x40011a3e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG0\r
-CYREG_B1_P5_U0_CFG0 EQU 0x40011a40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG1\r
-CYREG_B1_P5_U0_CFG1 EQU 0x40011a41\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG2\r
-CYREG_B1_P5_U0_CFG2 EQU 0x40011a42\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG3\r
-CYREG_B1_P5_U0_CFG3 EQU 0x40011a43\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG4\r
-CYREG_B1_P5_U0_CFG4 EQU 0x40011a44\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG5\r
-CYREG_B1_P5_U0_CFG5 EQU 0x40011a45\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG6\r
-CYREG_B1_P5_U0_CFG6 EQU 0x40011a46\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG7\r
-CYREG_B1_P5_U0_CFG7 EQU 0x40011a47\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG8\r
-CYREG_B1_P5_U0_CFG8 EQU 0x40011a48\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG9\r
-CYREG_B1_P5_U0_CFG9 EQU 0x40011a49\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG10\r
-CYREG_B1_P5_U0_CFG10 EQU 0x40011a4a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG11\r
-CYREG_B1_P5_U0_CFG11 EQU 0x40011a4b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG12\r
-CYREG_B1_P5_U0_CFG12 EQU 0x40011a4c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG13\r
-CYREG_B1_P5_U0_CFG13 EQU 0x40011a4d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG14\r
-CYREG_B1_P5_U0_CFG14 EQU 0x40011a4e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG15\r
-CYREG_B1_P5_U0_CFG15 EQU 0x40011a4f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG16\r
-CYREG_B1_P5_U0_CFG16 EQU 0x40011a50\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG17\r
-CYREG_B1_P5_U0_CFG17 EQU 0x40011a51\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG18\r
-CYREG_B1_P5_U0_CFG18 EQU 0x40011a52\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG19\r
-CYREG_B1_P5_U0_CFG19 EQU 0x40011a53\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG20\r
-CYREG_B1_P5_U0_CFG20 EQU 0x40011a54\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG21\r
-CYREG_B1_P5_U0_CFG21 EQU 0x40011a55\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG22\r
-CYREG_B1_P5_U0_CFG22 EQU 0x40011a56\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG23\r
-CYREG_B1_P5_U0_CFG23 EQU 0x40011a57\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG24\r
-CYREG_B1_P5_U0_CFG24 EQU 0x40011a58\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG25\r
-CYREG_B1_P5_U0_CFG25 EQU 0x40011a59\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG26\r
-CYREG_B1_P5_U0_CFG26 EQU 0x40011a5a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG27\r
-CYREG_B1_P5_U0_CFG27 EQU 0x40011a5b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG28\r
-CYREG_B1_P5_U0_CFG28 EQU 0x40011a5c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG29\r
-CYREG_B1_P5_U0_CFG29 EQU 0x40011a5d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG30\r
-CYREG_B1_P5_U0_CFG30 EQU 0x40011a5e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_CFG31\r
-CYREG_B1_P5_U0_CFG31 EQU 0x40011a5f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG0\r
-CYREG_B1_P5_U0_DCFG0 EQU 0x40011a60\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG1\r
-CYREG_B1_P5_U0_DCFG1 EQU 0x40011a62\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG2\r
-CYREG_B1_P5_U0_DCFG2 EQU 0x40011a64\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG3\r
-CYREG_B1_P5_U0_DCFG3 EQU 0x40011a66\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG4\r
-CYREG_B1_P5_U0_DCFG4 EQU 0x40011a68\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG5\r
-CYREG_B1_P5_U0_DCFG5 EQU 0x40011a6a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG6\r
-CYREG_B1_P5_U0_DCFG6 EQU 0x40011a6c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U0_DCFG7\r
-CYREG_B1_P5_U0_DCFG7 EQU 0x40011a6e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_BASE\r
-CYDEV_UCFG_B1_P5_U1_BASE EQU 0x40011a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_U1_SIZE\r
-CYDEV_UCFG_B1_P5_U1_SIZE EQU 0x00000070\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT0\r
-CYREG_B1_P5_U1_PLD_IT0 EQU 0x40011a80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT1\r
-CYREG_B1_P5_U1_PLD_IT1 EQU 0x40011a84\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT2\r
-CYREG_B1_P5_U1_PLD_IT2 EQU 0x40011a88\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT3\r
-CYREG_B1_P5_U1_PLD_IT3 EQU 0x40011a8c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT4\r
-CYREG_B1_P5_U1_PLD_IT4 EQU 0x40011a90\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT5\r
-CYREG_B1_P5_U1_PLD_IT5 EQU 0x40011a94\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT6\r
-CYREG_B1_P5_U1_PLD_IT6 EQU 0x40011a98\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT7\r
-CYREG_B1_P5_U1_PLD_IT7 EQU 0x40011a9c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT8\r
-CYREG_B1_P5_U1_PLD_IT8 EQU 0x40011aa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT9\r
-CYREG_B1_P5_U1_PLD_IT9 EQU 0x40011aa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT10\r
-CYREG_B1_P5_U1_PLD_IT10 EQU 0x40011aa8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_IT11\r
-CYREG_B1_P5_U1_PLD_IT11 EQU 0x40011aac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT0\r
-CYREG_B1_P5_U1_PLD_ORT0 EQU 0x40011ab0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT1\r
-CYREG_B1_P5_U1_PLD_ORT1 EQU 0x40011ab2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT2\r
-CYREG_B1_P5_U1_PLD_ORT2 EQU 0x40011ab4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_PLD_ORT3\r
-CYREG_B1_P5_U1_PLD_ORT3 EQU 0x40011ab6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_CEN_CONST\r
-CYREG_B1_P5_U1_MC_CFG_CEN_CONST EQU 0x40011ab8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_XORFB\r
-CYREG_B1_P5_U1_MC_CFG_XORFB EQU 0x40011aba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_SET_RESET\r
-CYREG_B1_P5_U1_MC_CFG_SET_RESET EQU 0x40011abc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_MC_CFG_BYPASS\r
-CYREG_B1_P5_U1_MC_CFG_BYPASS EQU 0x40011abe\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG0\r
-CYREG_B1_P5_U1_CFG0 EQU 0x40011ac0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG1\r
-CYREG_B1_P5_U1_CFG1 EQU 0x40011ac1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG2\r
-CYREG_B1_P5_U1_CFG2 EQU 0x40011ac2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG3\r
-CYREG_B1_P5_U1_CFG3 EQU 0x40011ac3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG4\r
-CYREG_B1_P5_U1_CFG4 EQU 0x40011ac4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG5\r
-CYREG_B1_P5_U1_CFG5 EQU 0x40011ac5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG6\r
-CYREG_B1_P5_U1_CFG6 EQU 0x40011ac6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG7\r
-CYREG_B1_P5_U1_CFG7 EQU 0x40011ac7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG8\r
-CYREG_B1_P5_U1_CFG8 EQU 0x40011ac8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG9\r
-CYREG_B1_P5_U1_CFG9 EQU 0x40011ac9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG10\r
-CYREG_B1_P5_U1_CFG10 EQU 0x40011aca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG11\r
-CYREG_B1_P5_U1_CFG11 EQU 0x40011acb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG12\r
-CYREG_B1_P5_U1_CFG12 EQU 0x40011acc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG13\r
-CYREG_B1_P5_U1_CFG13 EQU 0x40011acd\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG14\r
-CYREG_B1_P5_U1_CFG14 EQU 0x40011ace\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG15\r
-CYREG_B1_P5_U1_CFG15 EQU 0x40011acf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG16\r
-CYREG_B1_P5_U1_CFG16 EQU 0x40011ad0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG17\r
-CYREG_B1_P5_U1_CFG17 EQU 0x40011ad1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG18\r
-CYREG_B1_P5_U1_CFG18 EQU 0x40011ad2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG19\r
-CYREG_B1_P5_U1_CFG19 EQU 0x40011ad3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG20\r
-CYREG_B1_P5_U1_CFG20 EQU 0x40011ad4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG21\r
-CYREG_B1_P5_U1_CFG21 EQU 0x40011ad5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG22\r
-CYREG_B1_P5_U1_CFG22 EQU 0x40011ad6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG23\r
-CYREG_B1_P5_U1_CFG23 EQU 0x40011ad7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG24\r
-CYREG_B1_P5_U1_CFG24 EQU 0x40011ad8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG25\r
-CYREG_B1_P5_U1_CFG25 EQU 0x40011ad9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG26\r
-CYREG_B1_P5_U1_CFG26 EQU 0x40011ada\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG27\r
-CYREG_B1_P5_U1_CFG27 EQU 0x40011adb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG28\r
-CYREG_B1_P5_U1_CFG28 EQU 0x40011adc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG29\r
-CYREG_B1_P5_U1_CFG29 EQU 0x40011add\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG30\r
-CYREG_B1_P5_U1_CFG30 EQU 0x40011ade\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_CFG31\r
-CYREG_B1_P5_U1_CFG31 EQU 0x40011adf\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG0\r
-CYREG_B1_P5_U1_DCFG0 EQU 0x40011ae0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG1\r
-CYREG_B1_P5_U1_DCFG1 EQU 0x40011ae2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG2\r
-CYREG_B1_P5_U1_DCFG2 EQU 0x40011ae4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG3\r
-CYREG_B1_P5_U1_DCFG3 EQU 0x40011ae6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG4\r
-CYREG_B1_P5_U1_DCFG4 EQU 0x40011ae8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG5\r
-CYREG_B1_P5_U1_DCFG5 EQU 0x40011aea\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG6\r
-CYREG_B1_P5_U1_DCFG6 EQU 0x40011aec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_B1_P5_U1_DCFG7\r
-CYREG_B1_P5_U1_DCFG7 EQU 0x40011aee\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_BASE\r
-CYDEV_UCFG_B1_P5_ROUTE_BASE EQU 0x40011b00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_B1_P5_ROUTE_SIZE\r
-CYDEV_UCFG_B1_P5_ROUTE_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI0_BASE\r
-CYDEV_UCFG_DSI0_BASE EQU 0x40014000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI0_SIZE\r
-CYDEV_UCFG_DSI0_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI1_BASE\r
-CYDEV_UCFG_DSI1_BASE EQU 0x40014100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI1_SIZE\r
-CYDEV_UCFG_DSI1_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI2_BASE\r
-CYDEV_UCFG_DSI2_BASE EQU 0x40014200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI2_SIZE\r
-CYDEV_UCFG_DSI2_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI3_BASE\r
-CYDEV_UCFG_DSI3_BASE EQU 0x40014300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI3_SIZE\r
-CYDEV_UCFG_DSI3_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI4_BASE\r
-CYDEV_UCFG_DSI4_BASE EQU 0x40014400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI4_SIZE\r
-CYDEV_UCFG_DSI4_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI5_BASE\r
-CYDEV_UCFG_DSI5_BASE EQU 0x40014500\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI5_SIZE\r
-CYDEV_UCFG_DSI5_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI6_BASE\r
-CYDEV_UCFG_DSI6_BASE EQU 0x40014600\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI6_SIZE\r
-CYDEV_UCFG_DSI6_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI7_BASE\r
-CYDEV_UCFG_DSI7_BASE EQU 0x40014700\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI7_SIZE\r
-CYDEV_UCFG_DSI7_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI8_BASE\r
-CYDEV_UCFG_DSI8_BASE EQU 0x40014800\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI8_SIZE\r
-CYDEV_UCFG_DSI8_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI9_BASE\r
-CYDEV_UCFG_DSI9_BASE EQU 0x40014900\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI9_SIZE\r
-CYDEV_UCFG_DSI9_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI12_BASE\r
-CYDEV_UCFG_DSI12_BASE EQU 0x40014c00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI12_SIZE\r
-CYDEV_UCFG_DSI12_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI13_BASE\r
-CYDEV_UCFG_DSI13_BASE EQU 0x40014d00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_DSI13_SIZE\r
-CYDEV_UCFG_DSI13_SIZE EQU 0x000000ef\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_BASE\r
-CYDEV_UCFG_BCTL0_BASE EQU 0x40015000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL0_SIZE\r
-CYDEV_UCFG_BCTL0_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_MDCLK_EN\r
-CYREG_BCTL0_MDCLK_EN EQU 0x40015000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_MBCLK_EN\r
-CYREG_BCTL0_MBCLK_EN EQU 0x40015001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_WAIT_CFG\r
-CYREG_BCTL0_WAIT_CFG EQU 0x40015002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_BANK_CTL\r
-CYREG_BCTL0_BANK_CTL EQU 0x40015003\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_UDB_TEST_3\r
-CYREG_BCTL0_UDB_TEST_3 EQU 0x40015007\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN0\r
-CYREG_BCTL0_DCLK_EN0 EQU 0x40015008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN0\r
-CYREG_BCTL0_BCLK_EN0 EQU 0x40015009\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN1\r
-CYREG_BCTL0_DCLK_EN1 EQU 0x4001500a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN1\r
-CYREG_BCTL0_BCLK_EN1 EQU 0x4001500b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN2\r
-CYREG_BCTL0_DCLK_EN2 EQU 0x4001500c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN2\r
-CYREG_BCTL0_BCLK_EN2 EQU 0x4001500d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_DCLK_EN3\r
-CYREG_BCTL0_DCLK_EN3 EQU 0x4001500e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL0_BCLK_EN3\r
-CYREG_BCTL0_BCLK_EN3 EQU 0x4001500f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_BASE\r
-CYDEV_UCFG_BCTL1_BASE EQU 0x40015010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_UCFG_BCTL1_SIZE\r
-CYDEV_UCFG_BCTL1_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_MDCLK_EN\r
-CYREG_BCTL1_MDCLK_EN EQU 0x40015010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_MBCLK_EN\r
-CYREG_BCTL1_MBCLK_EN EQU 0x40015011\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_WAIT_CFG\r
-CYREG_BCTL1_WAIT_CFG EQU 0x40015012\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_BANK_CTL\r
-CYREG_BCTL1_BANK_CTL EQU 0x40015013\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_UDB_TEST_3\r
-CYREG_BCTL1_UDB_TEST_3 EQU 0x40015017\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN0\r
-CYREG_BCTL1_DCLK_EN0 EQU 0x40015018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN0\r
-CYREG_BCTL1_BCLK_EN0 EQU 0x40015019\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN1\r
-CYREG_BCTL1_DCLK_EN1 EQU 0x4001501a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN1\r
-CYREG_BCTL1_BCLK_EN1 EQU 0x4001501b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN2\r
-CYREG_BCTL1_DCLK_EN2 EQU 0x4001501c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN2\r
-CYREG_BCTL1_BCLK_EN2 EQU 0x4001501d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_DCLK_EN3\r
-CYREG_BCTL1_DCLK_EN3 EQU 0x4001501e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_BCTL1_BCLK_EN3\r
-CYREG_BCTL1_BCLK_EN3 EQU 0x4001501f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_BASE\r
-CYDEV_IDMUX_BASE EQU 0x40015100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_IDMUX_SIZE\r
-CYDEV_IDMUX_SIZE EQU 0x00000016\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL0\r
-CYREG_IDMUX_IRQ_CTL0 EQU 0x40015100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL1\r
-CYREG_IDMUX_IRQ_CTL1 EQU 0x40015101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL2\r
-CYREG_IDMUX_IRQ_CTL2 EQU 0x40015102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL3\r
-CYREG_IDMUX_IRQ_CTL3 EQU 0x40015103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL4\r
-CYREG_IDMUX_IRQ_CTL4 EQU 0x40015104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL5\r
-CYREG_IDMUX_IRQ_CTL5 EQU 0x40015105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL6\r
-CYREG_IDMUX_IRQ_CTL6 EQU 0x40015106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_IRQ_CTL7\r
-CYREG_IDMUX_IRQ_CTL7 EQU 0x40015107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL0\r
-CYREG_IDMUX_DRQ_CTL0 EQU 0x40015110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL1\r
-CYREG_IDMUX_DRQ_CTL1 EQU 0x40015111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL2\r
-CYREG_IDMUX_DRQ_CTL2 EQU 0x40015112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL3\r
-CYREG_IDMUX_DRQ_CTL3 EQU 0x40015113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL4\r
-CYREG_IDMUX_DRQ_CTL4 EQU 0x40015114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_IDMUX_DRQ_CTL5\r
-CYREG_IDMUX_DRQ_CTL5 EQU 0x40015115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_BASE\r
-CYDEV_CACHERAM_BASE EQU 0x40030000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CACHERAM_SIZE\r
-CYDEV_CACHERAM_SIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHERAM_DATA_MBASE\r
-CYREG_CACHERAM_DATA_MBASE EQU 0x40030000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CACHERAM_DATA_MSIZE\r
-CYREG_CACHERAM_DATA_MSIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_BASE\r
-CYDEV_SFR_BASE EQU 0x40050100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_SFR_SIZE\r
-CYDEV_SFR_SIZE EQU 0x000000fb\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO0\r
-CYREG_SFR_GPIO0 EQU 0x40050180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD0\r
-CYREG_SFR_GPIRD0 EQU 0x40050189\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO0_SEL\r
-CYREG_SFR_GPIO0_SEL EQU 0x4005018a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO1\r
-CYREG_SFR_GPIO1 EQU 0x40050190\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD1\r
-CYREG_SFR_GPIRD1 EQU 0x40050191\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO2\r
-CYREG_SFR_GPIO2 EQU 0x40050198\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD2\r
-CYREG_SFR_GPIRD2 EQU 0x40050199\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO2_SEL\r
-CYREG_SFR_GPIO2_SEL EQU 0x4005019a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO1_SEL\r
-CYREG_SFR_GPIO1_SEL EQU 0x400501a2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO3\r
-CYREG_SFR_GPIO3 EQU 0x400501b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD3\r
-CYREG_SFR_GPIRD3 EQU 0x400501b1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO3_SEL\r
-CYREG_SFR_GPIO3_SEL EQU 0x400501b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO4\r
-CYREG_SFR_GPIO4 EQU 0x400501c0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD4\r
-CYREG_SFR_GPIRD4 EQU 0x400501c1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO4_SEL\r
-CYREG_SFR_GPIO4_SEL EQU 0x400501c2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO5\r
-CYREG_SFR_GPIO5 EQU 0x400501c8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD5\r
-CYREG_SFR_GPIRD5 EQU 0x400501c9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO5_SEL\r
-CYREG_SFR_GPIO5_SEL EQU 0x400501ca\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO6\r
-CYREG_SFR_GPIO6 EQU 0x400501d8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD6\r
-CYREG_SFR_GPIRD6 EQU 0x400501d9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO6_SEL\r
-CYREG_SFR_GPIO6_SEL EQU 0x400501da\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO12\r
-CYREG_SFR_GPIO12 EQU 0x400501e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD12\r
-CYREG_SFR_GPIRD12 EQU 0x400501e9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO12_SEL\r
-CYREG_SFR_GPIO12_SEL EQU 0x400501f2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO15\r
-CYREG_SFR_GPIO15 EQU 0x400501f8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIRD15\r
-CYREG_SFR_GPIRD15 EQU 0x400501f9\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_SFR_GPIO15_SEL\r
-CYREG_SFR_GPIO15_SEL EQU 0x400501fa\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_BASE\r
-CYDEV_P3BA_BASE EQU 0x40050300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_P3BA_SIZE\r
-CYDEV_P3BA_SIZE EQU 0x0000002b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_Y_START\r
-CYREG_P3BA_Y_START EQU 0x40050300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_YROLL\r
-CYREG_P3BA_YROLL EQU 0x40050301\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_YCFG\r
-CYREG_P3BA_YCFG EQU 0x40050302\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_X_START1\r
-CYREG_P3BA_X_START1 EQU 0x40050303\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_X_START2\r
-CYREG_P3BA_X_START2 EQU 0x40050304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_XROLL1\r
-CYREG_P3BA_XROLL1 EQU 0x40050305\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_XROLL2\r
-CYREG_P3BA_XROLL2 EQU 0x40050306\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_XINC\r
-CYREG_P3BA_XINC EQU 0x40050307\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_XCFG\r
-CYREG_P3BA_XCFG EQU 0x40050308\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR1\r
-CYREG_P3BA_OFFSETADDR1 EQU 0x40050309\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR2\r
-CYREG_P3BA_OFFSETADDR2 EQU 0x4005030a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_OFFSETADDR3\r
-CYREG_P3BA_OFFSETADDR3 EQU 0x4005030b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_ABSADDR1\r
-CYREG_P3BA_ABSADDR1 EQU 0x4005030c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_ABSADDR2\r
-CYREG_P3BA_ABSADDR2 EQU 0x4005030d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_ABSADDR3\r
-CYREG_P3BA_ABSADDR3 EQU 0x4005030e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_ABSADDR4\r
-CYREG_P3BA_ABSADDR4 EQU 0x4005030f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATCFG1\r
-CYREG_P3BA_DATCFG1 EQU 0x40050310\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATCFG2\r
-CYREG_P3BA_DATCFG2 EQU 0x40050311\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT1\r
-CYREG_P3BA_CMP_RSLT1 EQU 0x40050314\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT2\r
-CYREG_P3BA_CMP_RSLT2 EQU 0x40050315\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT3\r
-CYREG_P3BA_CMP_RSLT3 EQU 0x40050316\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_CMP_RSLT4\r
-CYREG_P3BA_CMP_RSLT4 EQU 0x40050317\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATA_REG1\r
-CYREG_P3BA_DATA_REG1 EQU 0x40050318\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATA_REG2\r
-CYREG_P3BA_DATA_REG2 EQU 0x40050319\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATA_REG3\r
-CYREG_P3BA_DATA_REG3 EQU 0x4005031a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_DATA_REG4\r
-CYREG_P3BA_DATA_REG4 EQU 0x4005031b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_EXP_DATA1\r
-CYREG_P3BA_EXP_DATA1 EQU 0x4005031c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_EXP_DATA2\r
-CYREG_P3BA_EXP_DATA2 EQU 0x4005031d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_EXP_DATA3\r
-CYREG_P3BA_EXP_DATA3 EQU 0x4005031e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_EXP_DATA4\r
-CYREG_P3BA_EXP_DATA4 EQU 0x4005031f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA1\r
-CYREG_P3BA_MSTR_HRDATA1 EQU 0x40050320\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA2\r
-CYREG_P3BA_MSTR_HRDATA2 EQU 0x40050321\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA3\r
-CYREG_P3BA_MSTR_HRDATA3 EQU 0x40050322\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_MSTR_HRDATA4\r
-CYREG_P3BA_MSTR_HRDATA4 EQU 0x40050323\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_BIST_EN\r
-CYREG_P3BA_BIST_EN EQU 0x40050324\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_PHUB_MASTER_SSR\r
-CYREG_P3BA_PHUB_MASTER_SSR EQU 0x40050325\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_SEQCFG1\r
-CYREG_P3BA_SEQCFG1 EQU 0x40050326\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_SEQCFG2\r
-CYREG_P3BA_SEQCFG2 EQU 0x40050327\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_Y_CURR\r
-CYREG_P3BA_Y_CURR EQU 0x40050328\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_X_CURR1\r
-CYREG_P3BA_X_CURR1 EQU 0x40050329\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_P3BA_X_CURR2\r
-CYREG_P3BA_X_CURR2 EQU 0x4005032a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_BASE\r
-CYDEV_PANTHER_BASE EQU 0x40080000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PANTHER_SIZE\r
-CYDEV_PANTHER_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_STCALIB_CFG\r
-CYREG_PANTHER_STCALIB_CFG EQU 0x40080000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_WAITPIPE\r
-CYREG_PANTHER_WAITPIPE EQU 0x40080004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_TRACE_CFG\r
-CYREG_PANTHER_TRACE_CFG EQU 0x40080008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_DBG_CFG\r
-CYREG_PANTHER_DBG_CFG EQU 0x4008000c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_CM3_LCKRST_STAT\r
-CYREG_PANTHER_CM3_LCKRST_STAT EQU 0x40080018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_PANTHER_DEVICE_ID\r
-CYREG_PANTHER_DEVICE_ID EQU 0x4008001c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_BASE\r
-CYDEV_FLSECC_BASE EQU 0x48000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSECC_SIZE\r
-CYDEV_FLSECC_SIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSECC_DATA_MBASE\r
-CYREG_FLSECC_DATA_MBASE EQU 0x48000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSECC_DATA_MSIZE\r
-CYREG_FLSECC_DATA_MSIZE EQU 0x00008000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_BASE\r
-CYDEV_FLSHID_BASE EQU 0x49000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_SIZE\r
-CYDEV_FLSHID_SIZE EQU 0x00000200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_RSVD_MBASE\r
-CYREG_FLSHID_RSVD_MBASE EQU 0x49000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_RSVD_MSIZE\r
-CYREG_FLSHID_RSVD_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_MDATA_MBASE\r
-CYREG_FLSHID_CUST_MDATA_MBASE EQU 0x49000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_MDATA_MSIZE\r
-CYREG_FLSHID_CUST_MDATA_MSIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_BASE\r
-CYDEV_FLSHID_CUST_TABLES_BASE EQU 0x49000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_CUST_TABLES_SIZE\r
-CYDEV_FLSHID_CUST_TABLES_SIZE EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_Y_LOC\r
-CYREG_FLSHID_CUST_TABLES_Y_LOC EQU 0x49000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_X_LOC\r
-CYREG_FLSHID_CUST_TABLES_X_LOC EQU 0x49000101\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_WAFER_NUM\r
-CYREG_FLSHID_CUST_TABLES_WAFER_NUM EQU 0x49000102\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_LOT_LSB\r
-CYREG_FLSHID_CUST_TABLES_LOT_LSB EQU 0x49000103\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_LOT_MSB\r
-CYREG_FLSHID_CUST_TABLES_LOT_MSB EQU 0x49000104\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_WRK_WK\r
-CYREG_FLSHID_CUST_TABLES_WRK_WK EQU 0x49000105\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_FAB_YR\r
-CYREG_FLSHID_CUST_TABLES_FAB_YR EQU 0x49000106\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_MINOR\r
-CYREG_FLSHID_CUST_TABLES_MINOR EQU 0x49000107\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_3MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_3MHZ EQU 0x49000108\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_6MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_6MHZ EQU 0x49000109\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_12MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_12MHZ EQU 0x4900010a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_24MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_24MHZ EQU 0x4900010b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_67MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_67MHZ EQU 0x4900010c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_80MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_80MHZ EQU 0x4900010d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_92MHZ\r
-CYREG_FLSHID_CUST_TABLES_IMO_92MHZ EQU 0x4900010e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_IMO_USB\r
-CYREG_FLSHID_CUST_TABLES_IMO_USB EQU 0x4900010f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP0_TR0_HS EQU 0x49000110\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP1_TR0_HS EQU 0x49000111\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP2_TR0_HS EQU 0x49000112\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP3_TR0_HS EQU 0x49000113\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP0_TR1_HS EQU 0x49000114\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP1_TR1_HS EQU 0x49000115\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP2_TR1_HS EQU 0x49000116\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS\r
-CYREG_FLSHID_CUST_TABLES_CMP3_TR1_HS EQU 0x49000117\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M1\r
-CYREG_FLSHID_CUST_TABLES_DEC_M1 EQU 0x49000118\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M2\r
-CYREG_FLSHID_CUST_TABLES_DEC_M2 EQU 0x49000119\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M3\r
-CYREG_FLSHID_CUST_TABLES_DEC_M3 EQU 0x4900011a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M4\r
-CYREG_FLSHID_CUST_TABLES_DEC_M4 EQU 0x4900011b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M5\r
-CYREG_FLSHID_CUST_TABLES_DEC_M5 EQU 0x4900011c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M6\r
-CYREG_FLSHID_CUST_TABLES_DEC_M6 EQU 0x4900011d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M7\r
-CYREG_FLSHID_CUST_TABLES_DEC_M7 EQU 0x4900011e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DEC_M8\r
-CYREG_FLSHID_CUST_TABLES_DEC_M8 EQU 0x4900011f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M1\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M1 EQU 0x49000120\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M2\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M2 EQU 0x49000121\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M3\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M3 EQU 0x49000122\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M4\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M4 EQU 0x49000123\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M5\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M5 EQU 0x49000124\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M6\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M6 EQU 0x49000125\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M7\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M7 EQU 0x49000126\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC0_M8\r
-CYREG_FLSHID_CUST_TABLES_DAC0_M8 EQU 0x49000127\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M1\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M1 EQU 0x49000128\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M2\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M2 EQU 0x49000129\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M3\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M3 EQU 0x4900012a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M4\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M4 EQU 0x4900012b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M5\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M5 EQU 0x4900012c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M6\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M6 EQU 0x4900012d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M7\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M7 EQU 0x4900012e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC2_M8\r
-CYREG_FLSHID_CUST_TABLES_DAC2_M8 EQU 0x4900012f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M1\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M1 EQU 0x49000130\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M2\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M2 EQU 0x49000131\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M3\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M3 EQU 0x49000132\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M4\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M4 EQU 0x49000133\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M5\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M5 EQU 0x49000134\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M6\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M6 EQU 0x49000135\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M7\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M7 EQU 0x49000136\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC1_M8\r
-CYREG_FLSHID_CUST_TABLES_DAC1_M8 EQU 0x49000137\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M1\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M1 EQU 0x49000138\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M2\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M2 EQU 0x49000139\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M3\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M3 EQU 0x4900013a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M4\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M4 EQU 0x4900013b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M5\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M5 EQU 0x4900013c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M6\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M6 EQU 0x4900013d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M7\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M7 EQU 0x4900013e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_CUST_TABLES_DAC3_M8\r
-CYREG_FLSHID_CUST_TABLES_DAC3_M8 EQU 0x4900013f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_BASE\r
-CYDEV_FLSHID_MFG_CFG_BASE EQU 0x49000180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLSHID_MFG_CFG_SIZE\r
-CYDEV_FLSHID_MFG_CFG_SIZE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_IMO_TR1\r
-CYREG_FLSHID_MFG_CFG_IMO_TR1 EQU 0x49000188\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP0_TR0\r
-CYREG_FLSHID_MFG_CFG_CMP0_TR0 EQU 0x490001ac\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP1_TR0\r
-CYREG_FLSHID_MFG_CFG_CMP1_TR0 EQU 0x490001ae\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP2_TR0\r
-CYREG_FLSHID_MFG_CFG_CMP2_TR0 EQU 0x490001b0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP3_TR0\r
-CYREG_FLSHID_MFG_CFG_CMP3_TR0 EQU 0x490001b2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP0_TR1\r
-CYREG_FLSHID_MFG_CFG_CMP0_TR1 EQU 0x490001b4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP1_TR1\r
-CYREG_FLSHID_MFG_CFG_CMP1_TR1 EQU 0x490001b6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP2_TR1\r
-CYREG_FLSHID_MFG_CFG_CMP2_TR1 EQU 0x490001b8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_CMP3_TR1\r
-CYREG_FLSHID_MFG_CFG_CMP3_TR1 EQU 0x490001ba\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM\r
-CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM EQU 0x490001ce\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_BASE\r
-CYDEV_EXTMEM_BASE EQU 0x60000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EXTMEM_SIZE\r
-CYDEV_EXTMEM_SIZE EQU 0x00800000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EXTMEM_DATA_MBASE\r
-CYREG_EXTMEM_DATA_MBASE EQU 0x60000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_EXTMEM_DATA_MSIZE\r
-CYREG_EXTMEM_DATA_MSIZE EQU 0x00800000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_BASE\r
-CYDEV_ITM_BASE EQU 0xe0000000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ITM_SIZE\r
-CYDEV_ITM_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_TRACE_EN\r
-CYREG_ITM_TRACE_EN EQU 0xe0000e00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_TRACE_PRIVILEGE\r
-CYREG_ITM_TRACE_PRIVILEGE EQU 0xe0000e40\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_TRACE_CTRL\r
-CYREG_ITM_TRACE_CTRL EQU 0xe0000e80\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_LOCK_ACCESS\r
-CYREG_ITM_LOCK_ACCESS EQU 0xe0000fb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_LOCK_STATUS\r
-CYREG_ITM_LOCK_STATUS EQU 0xe0000fb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID4\r
-CYREG_ITM_PID4 EQU 0xe0000fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID5\r
-CYREG_ITM_PID5 EQU 0xe0000fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID6\r
-CYREG_ITM_PID6 EQU 0xe0000fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID7\r
-CYREG_ITM_PID7 EQU 0xe0000fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID0\r
-CYREG_ITM_PID0 EQU 0xe0000fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID1\r
-CYREG_ITM_PID1 EQU 0xe0000fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID2\r
-CYREG_ITM_PID2 EQU 0xe0000fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_PID3\r
-CYREG_ITM_PID3 EQU 0xe0000fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_CID0\r
-CYREG_ITM_CID0 EQU 0xe0000ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_CID1\r
-CYREG_ITM_CID1 EQU 0xe0000ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_CID2\r
-CYREG_ITM_CID2 EQU 0xe0000ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ITM_CID3\r
-CYREG_ITM_CID3 EQU 0xe0000ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_BASE\r
-CYDEV_DWT_BASE EQU 0xe0001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_DWT_SIZE\r
-CYDEV_DWT_SIZE EQU 0x0000005c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_CTRL\r
-CYREG_DWT_CTRL EQU 0xe0001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_CYCLE_COUNT\r
-CYREG_DWT_CYCLE_COUNT EQU 0xe0001004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_CPI_COUNT\r
-CYREG_DWT_CPI_COUNT EQU 0xe0001008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_EXC_OVHD_COUNT\r
-CYREG_DWT_EXC_OVHD_COUNT EQU 0xe000100c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_SLEEP_COUNT\r
-CYREG_DWT_SLEEP_COUNT EQU 0xe0001010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_LSU_COUNT\r
-CYREG_DWT_LSU_COUNT EQU 0xe0001014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_FOLD_COUNT\r
-CYREG_DWT_FOLD_COUNT EQU 0xe0001018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_PC_SAMPLE\r
-CYREG_DWT_PC_SAMPLE EQU 0xe000101c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_COMP_0\r
-CYREG_DWT_COMP_0 EQU 0xe0001020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_MASK_0\r
-CYREG_DWT_MASK_0 EQU 0xe0001024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_FUNCTION_0\r
-CYREG_DWT_FUNCTION_0 EQU 0xe0001028\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_COMP_1\r
-CYREG_DWT_COMP_1 EQU 0xe0001030\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_MASK_1\r
-CYREG_DWT_MASK_1 EQU 0xe0001034\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_FUNCTION_1\r
-CYREG_DWT_FUNCTION_1 EQU 0xe0001038\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_COMP_2\r
-CYREG_DWT_COMP_2 EQU 0xe0001040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_MASK_2\r
-CYREG_DWT_MASK_2 EQU 0xe0001044\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_FUNCTION_2\r
-CYREG_DWT_FUNCTION_2 EQU 0xe0001048\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_COMP_3\r
-CYREG_DWT_COMP_3 EQU 0xe0001050\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_MASK_3\r
-CYREG_DWT_MASK_3 EQU 0xe0001054\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_DWT_FUNCTION_3\r
-CYREG_DWT_FUNCTION_3 EQU 0xe0001058\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_BASE\r
-CYDEV_FPB_BASE EQU 0xe0002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FPB_SIZE\r
-CYDEV_FPB_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_CTRL\r
-CYREG_FPB_CTRL EQU 0xe0002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_REMAP\r
-CYREG_FPB_REMAP EQU 0xe0002004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_0\r
-CYREG_FPB_FP_COMP_0 EQU 0xe0002008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_1\r
-CYREG_FPB_FP_COMP_1 EQU 0xe000200c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_2\r
-CYREG_FPB_FP_COMP_2 EQU 0xe0002010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_3\r
-CYREG_FPB_FP_COMP_3 EQU 0xe0002014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_4\r
-CYREG_FPB_FP_COMP_4 EQU 0xe0002018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_5\r
-CYREG_FPB_FP_COMP_5 EQU 0xe000201c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_6\r
-CYREG_FPB_FP_COMP_6 EQU 0xe0002020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_FP_COMP_7\r
-CYREG_FPB_FP_COMP_7 EQU 0xe0002024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID4\r
-CYREG_FPB_PID4 EQU 0xe0002fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID5\r
-CYREG_FPB_PID5 EQU 0xe0002fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID6\r
-CYREG_FPB_PID6 EQU 0xe0002fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID7\r
-CYREG_FPB_PID7 EQU 0xe0002fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID0\r
-CYREG_FPB_PID0 EQU 0xe0002fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID1\r
-CYREG_FPB_PID1 EQU 0xe0002fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID2\r
-CYREG_FPB_PID2 EQU 0xe0002fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_PID3\r
-CYREG_FPB_PID3 EQU 0xe0002fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_CID0\r
-CYREG_FPB_CID0 EQU 0xe0002ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_CID1\r
-CYREG_FPB_CID1 EQU 0xe0002ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_CID2\r
-CYREG_FPB_CID2 EQU 0xe0002ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_FPB_CID3\r
-CYREG_FPB_CID3 EQU 0xe0002ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_BASE\r
-CYDEV_NVIC_BASE EQU 0xe000e000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_NVIC_SIZE\r
-CYDEV_NVIC_SIZE EQU 0x00000d3c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_INT_CTL_TYPE\r
-CYREG_NVIC_INT_CTL_TYPE EQU 0xe000e004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CTL\r
-CYREG_NVIC_SYSTICK_CTL EQU 0xe000e010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYSTICK_RELOAD\r
-CYREG_NVIC_SYSTICK_RELOAD EQU 0xe000e014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CURRENT\r
-CYREG_NVIC_SYSTICK_CURRENT EQU 0xe000e018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYSTICK_CAL\r
-CYREG_NVIC_SYSTICK_CAL EQU 0xe000e01c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SETENA0\r
-CYREG_NVIC_SETENA0 EQU 0xe000e100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_CLRENA0\r
-CYREG_NVIC_CLRENA0 EQU 0xe000e180\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SETPEND0\r
-CYREG_NVIC_SETPEND0 EQU 0xe000e200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_CLRPEND0\r
-CYREG_NVIC_CLRPEND0 EQU 0xe000e280\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_ACTIVE0\r
-CYREG_NVIC_ACTIVE0 EQU 0xe000e300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_0\r
-CYREG_NVIC_PRI_0 EQU 0xe000e400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_1\r
-CYREG_NVIC_PRI_1 EQU 0xe000e401\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_2\r
-CYREG_NVIC_PRI_2 EQU 0xe000e402\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_3\r
-CYREG_NVIC_PRI_3 EQU 0xe000e403\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_4\r
-CYREG_NVIC_PRI_4 EQU 0xe000e404\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_5\r
-CYREG_NVIC_PRI_5 EQU 0xe000e405\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_6\r
-CYREG_NVIC_PRI_6 EQU 0xe000e406\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_7\r
-CYREG_NVIC_PRI_7 EQU 0xe000e407\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_8\r
-CYREG_NVIC_PRI_8 EQU 0xe000e408\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_9\r
-CYREG_NVIC_PRI_9 EQU 0xe000e409\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_10\r
-CYREG_NVIC_PRI_10 EQU 0xe000e40a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_11\r
-CYREG_NVIC_PRI_11 EQU 0xe000e40b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_12\r
-CYREG_NVIC_PRI_12 EQU 0xe000e40c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_13\r
-CYREG_NVIC_PRI_13 EQU 0xe000e40d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_14\r
-CYREG_NVIC_PRI_14 EQU 0xe000e40e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_15\r
-CYREG_NVIC_PRI_15 EQU 0xe000e40f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_16\r
-CYREG_NVIC_PRI_16 EQU 0xe000e410\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_17\r
-CYREG_NVIC_PRI_17 EQU 0xe000e411\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_18\r
-CYREG_NVIC_PRI_18 EQU 0xe000e412\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_19\r
-CYREG_NVIC_PRI_19 EQU 0xe000e413\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_20\r
-CYREG_NVIC_PRI_20 EQU 0xe000e414\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_21\r
-CYREG_NVIC_PRI_21 EQU 0xe000e415\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_22\r
-CYREG_NVIC_PRI_22 EQU 0xe000e416\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_23\r
-CYREG_NVIC_PRI_23 EQU 0xe000e417\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_24\r
-CYREG_NVIC_PRI_24 EQU 0xe000e418\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_25\r
-CYREG_NVIC_PRI_25 EQU 0xe000e419\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_26\r
-CYREG_NVIC_PRI_26 EQU 0xe000e41a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_27\r
-CYREG_NVIC_PRI_27 EQU 0xe000e41b\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_28\r
-CYREG_NVIC_PRI_28 EQU 0xe000e41c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_29\r
-CYREG_NVIC_PRI_29 EQU 0xe000e41d\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_30\r
-CYREG_NVIC_PRI_30 EQU 0xe000e41e\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_PRI_31\r
-CYREG_NVIC_PRI_31 EQU 0xe000e41f\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_CPUID_BASE\r
-CYREG_NVIC_CPUID_BASE EQU 0xe000ed00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_INTR_CTRL_STATE\r
-CYREG_NVIC_INTR_CTRL_STATE EQU 0xe000ed04\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_VECT_OFFSET\r
-CYREG_NVIC_VECT_OFFSET EQU 0xe000ed08\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_APPLN_INTR\r
-CYREG_NVIC_APPLN_INTR EQU 0xe000ed0c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYSTEM_CONTROL\r
-CYREG_NVIC_SYSTEM_CONTROL EQU 0xe000ed10\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_CFG_CONTROL\r
-CYREG_NVIC_CFG_CONTROL EQU 0xe000ed14\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_4_7\r
-CYREG_NVIC_SYS_PRIO_HANDLER_4_7 EQU 0xe000ed18\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_8_11\r
-CYREG_NVIC_SYS_PRIO_HANDLER_8_11 EQU 0xe000ed1c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYS_PRIO_HANDLER_12_15\r
-CYREG_NVIC_SYS_PRIO_HANDLER_12_15 EQU 0xe000ed20\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_SYS_HANDLER_CSR\r
-CYREG_NVIC_SYS_HANDLER_CSR EQU 0xe000ed24\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_MEMMAN_FAULT_STATUS\r
-CYREG_NVIC_MEMMAN_FAULT_STATUS EQU 0xe000ed28\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_BUS_FAULT_STATUS\r
-CYREG_NVIC_BUS_FAULT_STATUS EQU 0xe000ed29\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_USAGE_FAULT_STATUS\r
-CYREG_NVIC_USAGE_FAULT_STATUS EQU 0xe000ed2a\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_HARD_FAULT_STATUS\r
-CYREG_NVIC_HARD_FAULT_STATUS EQU 0xe000ed2c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_DEBUG_FAULT_STATUS\r
-CYREG_NVIC_DEBUG_FAULT_STATUS EQU 0xe000ed30\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_MEMMAN_FAULT_ADD\r
-CYREG_NVIC_MEMMAN_FAULT_ADD EQU 0xe000ed34\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_NVIC_BUS_FAULT_ADD\r
-CYREG_NVIC_BUS_FAULT_ADD EQU 0xe000ed38\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_BASE\r
-CYDEV_CORE_DBG_BASE EQU 0xe000edf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_CORE_DBG_SIZE\r
-CYDEV_CORE_DBG_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CORE_DBG_DBG_HLT_CS\r
-CYREG_CORE_DBG_DBG_HLT_CS EQU 0xe000edf0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CORE_DBG_DBG_REG_SEL\r
-CYREG_CORE_DBG_DBG_REG_SEL EQU 0xe000edf4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CORE_DBG_DBG_REG_DATA\r
-CYREG_CORE_DBG_DBG_REG_DATA EQU 0xe000edf8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_CORE_DBG_EXC_MON_CTL\r
-CYREG_CORE_DBG_EXC_MON_CTL EQU 0xe000edfc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_BASE\r
-CYDEV_TPIU_BASE EQU 0xe0040000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_TPIU_SIZE\r
-CYDEV_TPIU_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ\r
-CYREG_TPIU_SUPPORTED_SYNC_PRT_SZ EQU 0xe0040000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_CURRENT_SYNC_PRT_SZ\r
-CYREG_TPIU_CURRENT_SYNC_PRT_SZ EQU 0xe0040004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ASYNC_CLK_PRESCALER\r
-CYREG_TPIU_ASYNC_CLK_PRESCALER EQU 0xe0040010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PROTOCOL\r
-CYREG_TPIU_PROTOCOL EQU 0xe00400f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_FORM_FLUSH_STAT\r
-CYREG_TPIU_FORM_FLUSH_STAT EQU 0xe0040300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_FORM_FLUSH_CTRL\r
-CYREG_TPIU_FORM_FLUSH_CTRL EQU 0xe0040304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_TRIGGER\r
-CYREG_TPIU_TRIGGER EQU 0xe0040ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ITETMDATA\r
-CYREG_TPIU_ITETMDATA EQU 0xe0040eec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ITATBCTR2\r
-CYREG_TPIU_ITATBCTR2 EQU 0xe0040ef0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ITATBCTR0\r
-CYREG_TPIU_ITATBCTR0 EQU 0xe0040ef8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ITITMDATA\r
-CYREG_TPIU_ITITMDATA EQU 0xe0040efc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_ITCTRL\r
-CYREG_TPIU_ITCTRL EQU 0xe0040f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_DEVID\r
-CYREG_TPIU_DEVID EQU 0xe0040fc8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_DEVTYPE\r
-CYREG_TPIU_DEVTYPE EQU 0xe0040fcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID4\r
-CYREG_TPIU_PID4 EQU 0xe0040fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID5\r
-CYREG_TPIU_PID5 EQU 0xe0040fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID6\r
-CYREG_TPIU_PID6 EQU 0xe0040fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID7\r
-CYREG_TPIU_PID7 EQU 0xe0040fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID0\r
-CYREG_TPIU_PID0 EQU 0xe0040fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID1\r
-CYREG_TPIU_PID1 EQU 0xe0040fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID2\r
-CYREG_TPIU_PID2 EQU 0xe0040fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_PID3\r
-CYREG_TPIU_PID3 EQU 0xe0040fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_CID0\r
-CYREG_TPIU_CID0 EQU 0xe0040ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_CID1\r
-CYREG_TPIU_CID1 EQU 0xe0040ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_CID2\r
-CYREG_TPIU_CID2 EQU 0xe0040ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_TPIU_CID3\r
-CYREG_TPIU_CID3 EQU 0xe0040ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_BASE\r
-CYDEV_ETM_BASE EQU 0xe0041000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ETM_SIZE\r
-CYDEV_ETM_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CTL\r
-CYREG_ETM_CTL EQU 0xe0041000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CFG_CODE\r
-CYREG_ETM_CFG_CODE EQU 0xe0041004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_TRIG_EVENT\r
-CYREG_ETM_TRIG_EVENT EQU 0xe0041008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_STATUS\r
-CYREG_ETM_STATUS EQU 0xe0041010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_SYS_CFG\r
-CYREG_ETM_SYS_CFG EQU 0xe0041014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_TRACE_ENB_EVENT\r
-CYREG_ETM_TRACE_ENB_EVENT EQU 0xe0041020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_TRACE_EN_CTRL1\r
-CYREG_ETM_TRACE_EN_CTRL1 EQU 0xe0041024\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_FIFOFULL_LEVEL\r
-CYREG_ETM_FIFOFULL_LEVEL EQU 0xe004102c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_SYNC_FREQ\r
-CYREG_ETM_SYNC_FREQ EQU 0xe00411e0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_ETM_ID\r
-CYREG_ETM_ETM_ID EQU 0xe00411e4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CFG_CODE_EXT\r
-CYREG_ETM_CFG_CODE_EXT EQU 0xe00411e8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_TR_SS_EMBICE_CTRL\r
-CYREG_ETM_TR_SS_EMBICE_CTRL EQU 0xe00411f0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CS_TRACE_ID\r
-CYREG_ETM_CS_TRACE_ID EQU 0xe0041200\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_OS_LOCK_ACCESS\r
-CYREG_ETM_OS_LOCK_ACCESS EQU 0xe0041300\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_OS_LOCK_STATUS\r
-CYREG_ETM_OS_LOCK_STATUS EQU 0xe0041304\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PDSR\r
-CYREG_ETM_PDSR EQU 0xe0041314\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_ITMISCIN\r
-CYREG_ETM_ITMISCIN EQU 0xe0041ee0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_ITTRIGOUT\r
-CYREG_ETM_ITTRIGOUT EQU 0xe0041ee8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_ITATBCTR2\r
-CYREG_ETM_ITATBCTR2 EQU 0xe0041ef0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_ITATBCTR0\r
-CYREG_ETM_ITATBCTR0 EQU 0xe0041ef8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_INT_MODE_CTRL\r
-CYREG_ETM_INT_MODE_CTRL EQU 0xe0041f00\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CLM_TAG_SET\r
-CYREG_ETM_CLM_TAG_SET EQU 0xe0041fa0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CLM_TAG_CLR\r
-CYREG_ETM_CLM_TAG_CLR EQU 0xe0041fa4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_LOCK_ACCESS\r
-CYREG_ETM_LOCK_ACCESS EQU 0xe0041fb0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_LOCK_STATUS\r
-CYREG_ETM_LOCK_STATUS EQU 0xe0041fb4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_AUTH_STATUS\r
-CYREG_ETM_AUTH_STATUS EQU 0xe0041fb8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_DEV_TYPE\r
-CYREG_ETM_DEV_TYPE EQU 0xe0041fcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID4\r
-CYREG_ETM_PID4 EQU 0xe0041fd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID5\r
-CYREG_ETM_PID5 EQU 0xe0041fd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID6\r
-CYREG_ETM_PID6 EQU 0xe0041fd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID7\r
-CYREG_ETM_PID7 EQU 0xe0041fdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID0\r
-CYREG_ETM_PID0 EQU 0xe0041fe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID1\r
-CYREG_ETM_PID1 EQU 0xe0041fe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID2\r
-CYREG_ETM_PID2 EQU 0xe0041fe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_PID3\r
-CYREG_ETM_PID3 EQU 0xe0041fec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CID0\r
-CYREG_ETM_CID0 EQU 0xe0041ff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CID1\r
-CYREG_ETM_CID1 EQU 0xe0041ff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CID2\r
-CYREG_ETM_CID2 EQU 0xe0041ff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ETM_CID3\r
-CYREG_ETM_CID3 EQU 0xe0041ffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_BASE\r
-CYDEV_ROM_TABLE_BASE EQU 0xe00ff000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ROM_TABLE_SIZE\r
-CYDEV_ROM_TABLE_SIZE EQU 0x00001000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_NVIC\r
-CYREG_ROM_TABLE_NVIC EQU 0xe00ff000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_DWT\r
-CYREG_ROM_TABLE_DWT EQU 0xe00ff004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_FPB\r
-CYREG_ROM_TABLE_FPB EQU 0xe00ff008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_ITM\r
-CYREG_ROM_TABLE_ITM EQU 0xe00ff00c\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_TPIU\r
-CYREG_ROM_TABLE_TPIU EQU 0xe00ff010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_ETM\r
-CYREG_ROM_TABLE_ETM EQU 0xe00ff014\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_END\r
-CYREG_ROM_TABLE_END EQU 0xe00ff018\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_MEMTYPE\r
-CYREG_ROM_TABLE_MEMTYPE EQU 0xe00fffcc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID4\r
-CYREG_ROM_TABLE_PID4 EQU 0xe00fffd0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID5\r
-CYREG_ROM_TABLE_PID5 EQU 0xe00fffd4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID6\r
-CYREG_ROM_TABLE_PID6 EQU 0xe00fffd8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID7\r
-CYREG_ROM_TABLE_PID7 EQU 0xe00fffdc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID0\r
-CYREG_ROM_TABLE_PID0 EQU 0xe00fffe0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID1\r
-CYREG_ROM_TABLE_PID1 EQU 0xe00fffe4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID2\r
-CYREG_ROM_TABLE_PID2 EQU 0xe00fffe8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_PID3\r
-CYREG_ROM_TABLE_PID3 EQU 0xe00fffec\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_CID0\r
-CYREG_ROM_TABLE_CID0 EQU 0xe00ffff0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_CID1\r
-CYREG_ROM_TABLE_CID1 EQU 0xe00ffff4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_CID2\r
-CYREG_ROM_TABLE_CID2 EQU 0xe00ffff8\r
-    ENDIF\r
-    IF :LNOT::DEF:CYREG_ROM_TABLE_CID3\r
-CYREG_ROM_TABLE_CID3 EQU 0xe00ffffc\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_SIZE\r
-CYDEV_FLS_SIZE EQU CYDEV_FLASH_SIZE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_BASE\r
-CYDEV_ECC_BASE EQU CYDEV_FLSECC_BASE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_SECTOR_SIZE\r
-CYDEV_FLS_SECTOR_SIZE EQU 0x00010000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_FLS_ROW_SIZE\r
-CYDEV_FLS_ROW_SIZE EQU 0x00000100\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_SECTOR_SIZE\r
-CYDEV_ECC_SECTOR_SIZE EQU 0x00002000\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_ECC_ROW_SIZE\r
-CYDEV_ECC_ROW_SIZE EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EEPROM_SECTOR_SIZE\r
-CYDEV_EEPROM_SECTOR_SIZE EQU 0x00000400\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_EEPROM_ROW_SIZE\r
-CYDEV_EEPROM_ROW_SIZE EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYDEV_PERIPH_BASE\r
-CYDEV_PERIPH_BASE EQU CYDEV_CLKDIST_BASE\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_DISABLE\r
-CYCLK_LD_DISABLE EQU 0x00000004\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_SYNC_EN\r
-CYCLK_LD_SYNC_EN EQU 0x00000002\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_LD_LOAD\r
-CYCLK_LD_LOAD EQU 0x00000001\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_PIPE\r
-CYCLK_PIPE EQU 0x00000080\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SSS\r
-CYCLK_SSS EQU 0x00000040\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_EARLY\r
-CYCLK_EARLY EQU 0x00000020\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_DUTY\r
-CYCLK_DUTY EQU 0x00000010\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SYNC\r
-CYCLK_SYNC EQU 0x00000008\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_D\r
-CYCLK_SRC_SEL_CLK_SYNC_D EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_SYNC_DIG\r
-CYCLK_SRC_SEL_SYNC_DIG EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_IMO\r
-CYCLK_SRC_SEL_IMO EQU 1\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_MHZ\r
-CYCLK_SRC_SEL_XTAL_MHZ EQU 2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTALM\r
-CYCLK_SRC_SEL_XTALM EQU 2\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_ILO\r
-CYCLK_SRC_SEL_ILO EQU 3\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_PLL\r
-CYCLK_SRC_SEL_PLL EQU 4\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTAL_KHZ\r
-CYCLK_SRC_SEL_XTAL_KHZ EQU 5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_XTALK\r
-CYCLK_SRC_SEL_XTALK EQU 5\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_G\r
-CYCLK_SRC_SEL_DSI_G EQU 6\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_D\r
-CYCLK_SRC_SEL_DSI_D EQU 7\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_CLK_SYNC_A\r
-CYCLK_SRC_SEL_CLK_SYNC_A EQU 0\r
-    ENDIF\r
-    IF :LNOT::DEF:CYCLK_SRC_SEL_DSI_A\r
-CYCLK_SRC_SEL_DSI_A EQU 7\r
-    ENDIF\r
-    END\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydisabledsheets.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydisabledsheets.h
deleted file mode 100755 (executable)
index 7b6355f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cydisabledsheets.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifndef INCLUDED_CYDISABLEDSHEETS_H\r
-#define INCLUDED_CYDISABLEDSHEETS_H\r
-\r
-\r
-#endif /* INCLUDED_CYDISABLEDSHEETS_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter.h
deleted file mode 100755 (executable)
index c8ba646..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter.h
+++ /dev/null
@@ -1,1409 +0,0 @@
-#ifndef INCLUDED_CYFITTER_H\r
-#define INCLUDED_CYFITTER_H\r
-#include <cydevice.h>\r
-#include <cydevice_trm.h>\r
-\r
-/* USBFS_bus_reset */\r
-#define USBFS_bus_reset__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_bus_reset__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_bus_reset__INTC_MASK 0x800000u\r
-#define USBFS_bus_reset__INTC_NUMBER 23u\r
-#define USBFS_bus_reset__INTC_PRIOR_NUM 7u\r
-#define USBFS_bus_reset__INTC_PRIOR_REG CYREG_NVIC_PRI_23\r
-#define USBFS_bus_reset__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_bus_reset__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_arb_int */\r
-#define USBFS_arb_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_arb_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_arb_int__INTC_MASK 0x400000u\r
-#define USBFS_arb_int__INTC_NUMBER 22u\r
-#define USBFS_arb_int__INTC_PRIOR_NUM 7u\r
-#define USBFS_arb_int__INTC_PRIOR_REG CYREG_NVIC_PRI_22\r
-#define USBFS_arb_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_arb_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_sof_int */\r
-#define USBFS_sof_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_sof_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_sof_int__INTC_MASK 0x200000u\r
-#define USBFS_sof_int__INTC_NUMBER 21u\r
-#define USBFS_sof_int__INTC_PRIOR_NUM 7u\r
-#define USBFS_sof_int__INTC_PRIOR_REG CYREG_NVIC_PRI_21\r
-#define USBFS_sof_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_sof_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_Out_DBx */\r
-#define SCSI_Out_DBx__0__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__0__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__0__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__0__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__0__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__0__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__0__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__0__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__0__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__0__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__0__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__0__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__0__MASK 0x08u\r
-#define SCSI_Out_DBx__0__PC CYREG_PRT6_PC3\r
-#define SCSI_Out_DBx__0__PORT 6u\r
-#define SCSI_Out_DBx__0__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__0__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__0__SHIFT 3\r
-#define SCSI_Out_DBx__0__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__1__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__1__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__1__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__1__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__1__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__1__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__1__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__1__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__1__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__1__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__1__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__1__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__1__MASK 0x04u\r
-#define SCSI_Out_DBx__1__PC CYREG_PRT6_PC2\r
-#define SCSI_Out_DBx__1__PORT 6u\r
-#define SCSI_Out_DBx__1__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__1__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__1__SHIFT 2\r
-#define SCSI_Out_DBx__1__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__2__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__2__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__2__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__2__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__2__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__2__MASK 0x02u\r
-#define SCSI_Out_DBx__2__PC CYREG_PRT6_PC1\r
-#define SCSI_Out_DBx__2__PORT 6u\r
-#define SCSI_Out_DBx__2__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__2__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__2__SHIFT 1\r
-#define SCSI_Out_DBx__2__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__3__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__3__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__3__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__3__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__3__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__3__MASK 0x01u\r
-#define SCSI_Out_DBx__3__PC CYREG_PRT6_PC0\r
-#define SCSI_Out_DBx__3__PORT 6u\r
-#define SCSI_Out_DBx__3__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__3__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__3__SHIFT 0\r
-#define SCSI_Out_DBx__3__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__4__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__4__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__4__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__4__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__4__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__4__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__4__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__4__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__4__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__4__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__4__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__4__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__4__MASK 0x80u\r
-#define SCSI_Out_DBx__4__PC CYREG_PRT4_PC7\r
-#define SCSI_Out_DBx__4__PORT 4u\r
-#define SCSI_Out_DBx__4__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__4__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__4__SHIFT 7\r
-#define SCSI_Out_DBx__4__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__5__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__5__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__5__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__5__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__5__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__5__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__5__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__5__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__5__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__5__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__5__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__5__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__5__MASK 0x40u\r
-#define SCSI_Out_DBx__5__PC CYREG_PRT4_PC6\r
-#define SCSI_Out_DBx__5__PORT 4u\r
-#define SCSI_Out_DBx__5__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__5__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__5__SHIFT 6\r
-#define SCSI_Out_DBx__5__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__6__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__6__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__6__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__6__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__6__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__6__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__6__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__6__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__6__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__6__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__6__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__6__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__6__MASK 0x20u\r
-#define SCSI_Out_DBx__6__PC CYREG_PRT4_PC5\r
-#define SCSI_Out_DBx__6__PORT 4u\r
-#define SCSI_Out_DBx__6__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__6__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__6__SHIFT 5\r
-#define SCSI_Out_DBx__6__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__7__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__7__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__7__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__7__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__7__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__7__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__7__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__7__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__7__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__7__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__7__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__7__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__7__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__7__MASK 0x10u\r
-#define SCSI_Out_DBx__7__PC CYREG_PRT4_PC4\r
-#define SCSI_Out_DBx__7__PORT 4u\r
-#define SCSI_Out_DBx__7__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__7__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__7__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__7__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__7__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__7__SHIFT 4\r
-#define SCSI_Out_DBx__7__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__DB0__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB0__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB0__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB0__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB0__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB0__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB0__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB0__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB0__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB0__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB0__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB0__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB0__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB0__MASK 0x08u\r
-#define SCSI_Out_DBx__DB0__PC CYREG_PRT6_PC3\r
-#define SCSI_Out_DBx__DB0__PORT 6u\r
-#define SCSI_Out_DBx__DB0__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB0__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB0__SHIFT 3\r
-#define SCSI_Out_DBx__DB0__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB1__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB1__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB1__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB1__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB1__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB1__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB1__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB1__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB1__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB1__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB1__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB1__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB1__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB1__MASK 0x04u\r
-#define SCSI_Out_DBx__DB1__PC CYREG_PRT6_PC2\r
-#define SCSI_Out_DBx__DB1__PORT 6u\r
-#define SCSI_Out_DBx__DB1__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB1__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB1__SHIFT 2\r
-#define SCSI_Out_DBx__DB1__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB2__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB2__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB2__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB2__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB2__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB2__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB2__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB2__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB2__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB2__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB2__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB2__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB2__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB2__MASK 0x02u\r
-#define SCSI_Out_DBx__DB2__PC CYREG_PRT6_PC1\r
-#define SCSI_Out_DBx__DB2__PORT 6u\r
-#define SCSI_Out_DBx__DB2__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB2__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB2__SHIFT 1\r
-#define SCSI_Out_DBx__DB2__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB3__AG CYREG_PRT6_AG\r
-#define SCSI_Out_DBx__DB3__AMUX CYREG_PRT6_AMUX\r
-#define SCSI_Out_DBx__DB3__BIE CYREG_PRT6_BIE\r
-#define SCSI_Out_DBx__DB3__BIT_MASK CYREG_PRT6_BIT_MASK\r
-#define SCSI_Out_DBx__DB3__BYP CYREG_PRT6_BYP\r
-#define SCSI_Out_DBx__DB3__CTL CYREG_PRT6_CTL\r
-#define SCSI_Out_DBx__DB3__DM0 CYREG_PRT6_DM0\r
-#define SCSI_Out_DBx__DB3__DM1 CYREG_PRT6_DM1\r
-#define SCSI_Out_DBx__DB3__DM2 CYREG_PRT6_DM2\r
-#define SCSI_Out_DBx__DB3__DR CYREG_PRT6_DR\r
-#define SCSI_Out_DBx__DB3__INP_DIS CYREG_PRT6_INP_DIS\r
-#define SCSI_Out_DBx__DB3__LCD_COM_SEG CYREG_PRT6_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB3__LCD_EN CYREG_PRT6_LCD_EN\r
-#define SCSI_Out_DBx__DB3__MASK 0x01u\r
-#define SCSI_Out_DBx__DB3__PC CYREG_PRT6_PC0\r
-#define SCSI_Out_DBx__DB3__PORT 6u\r
-#define SCSI_Out_DBx__DB3__PRT CYREG_PRT6_PRT\r
-#define SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL CYREG_PRT6_CAPS_SEL\r
-#define SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN CYREG_PRT6_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 CYREG_PRT6_OE_SEL0\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 CYREG_PRT6_OE_SEL1\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 CYREG_PRT6_OUT_SEL0\r
-#define SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 CYREG_PRT6_OUT_SEL1\r
-#define SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT CYREG_PRT6_SYNC_OUT\r
-#define SCSI_Out_DBx__DB3__PS CYREG_PRT6_PS\r
-#define SCSI_Out_DBx__DB3__SHIFT 0\r
-#define SCSI_Out_DBx__DB3__SLW CYREG_PRT6_SLW\r
-#define SCSI_Out_DBx__DB4__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__DB4__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__DB4__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__DB4__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__DB4__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__DB4__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__DB4__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__DB4__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__DB4__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__DB4__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__DB4__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__DB4__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB4__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__DB4__MASK 0x80u\r
-#define SCSI_Out_DBx__DB4__PC CYREG_PRT4_PC7\r
-#define SCSI_Out_DBx__DB4__PORT 4u\r
-#define SCSI_Out_DBx__DB4__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__DB4__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__DB4__SHIFT 7\r
-#define SCSI_Out_DBx__DB4__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__DB5__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__DB5__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__DB5__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__DB5__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__DB5__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__DB5__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__DB5__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__DB5__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__DB5__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__DB5__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__DB5__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__DB5__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB5__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__DB5__MASK 0x40u\r
-#define SCSI_Out_DBx__DB5__PC CYREG_PRT4_PC6\r
-#define SCSI_Out_DBx__DB5__PORT 4u\r
-#define SCSI_Out_DBx__DB5__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__DB5__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__DB5__SHIFT 6\r
-#define SCSI_Out_DBx__DB5__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__DB6__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__DB6__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__DB6__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__DB6__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__DB6__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__DB6__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__DB6__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__DB6__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__DB6__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__DB6__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__DB6__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__DB6__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB6__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__DB6__MASK 0x20u\r
-#define SCSI_Out_DBx__DB6__PC CYREG_PRT4_PC5\r
-#define SCSI_Out_DBx__DB6__PORT 4u\r
-#define SCSI_Out_DBx__DB6__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__DB6__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__DB6__SHIFT 5\r
-#define SCSI_Out_DBx__DB6__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out_DBx__DB7__AG CYREG_PRT4_AG\r
-#define SCSI_Out_DBx__DB7__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out_DBx__DB7__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out_DBx__DB7__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out_DBx__DB7__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out_DBx__DB7__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out_DBx__DB7__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out_DBx__DB7__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out_DBx__DB7__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out_DBx__DB7__DR CYREG_PRT4_DR\r
-#define SCSI_Out_DBx__DB7__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out_DBx__DB7__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out_DBx__DB7__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out_DBx__DB7__MASK 0x10u\r
-#define SCSI_Out_DBx__DB7__PC CYREG_PRT4_PC4\r
-#define SCSI_Out_DBx__DB7__PORT 4u\r
-#define SCSI_Out_DBx__DB7__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out_DBx__DB7__PS CYREG_PRT4_PS\r
-#define SCSI_Out_DBx__DB7__SHIFT 4\r
-#define SCSI_Out_DBx__DB7__SLW CYREG_PRT4_SLW\r
-\r
-/* USBFS_dp_int */\r
-#define USBFS_dp_int__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_dp_int__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_dp_int__INTC_MASK 0x1000u\r
-#define USBFS_dp_int__INTC_NUMBER 12u\r
-#define USBFS_dp_int__INTC_PRIOR_NUM 7u\r
-#define USBFS_dp_int__INTC_PRIOR_REG CYREG_NVIC_PRI_12\r
-#define USBFS_dp_int__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_dp_int__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_0 */\r
-#define USBFS_ep_0__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_ep_0__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_ep_0__INTC_MASK 0x1000000u\r
-#define USBFS_ep_0__INTC_NUMBER 24u\r
-#define USBFS_ep_0__INTC_PRIOR_NUM 7u\r
-#define USBFS_ep_0__INTC_PRIOR_REG CYREG_NVIC_PRI_24\r
-#define USBFS_ep_0__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_ep_0__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_1 */\r
-#define USBFS_ep_1__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_ep_1__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_ep_1__INTC_MASK 0x01u\r
-#define USBFS_ep_1__INTC_NUMBER 0u\r
-#define USBFS_ep_1__INTC_PRIOR_NUM 7u\r
-#define USBFS_ep_1__INTC_PRIOR_REG CYREG_NVIC_PRI_0\r
-#define USBFS_ep_1__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_ep_1__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_2 */\r
-#define USBFS_ep_2__INTC_CLR_EN_REG CYREG_NVIC_CLRENA0\r
-#define USBFS_ep_2__INTC_CLR_PD_REG CYREG_NVIC_CLRPEND0\r
-#define USBFS_ep_2__INTC_MASK 0x02u\r
-#define USBFS_ep_2__INTC_NUMBER 1u\r
-#define USBFS_ep_2__INTC_PRIOR_NUM 7u\r
-#define USBFS_ep_2__INTC_PRIOR_REG CYREG_NVIC_PRI_1\r
-#define USBFS_ep_2__INTC_SET_EN_REG CYREG_NVIC_SETENA0\r
-#define USBFS_ep_2__INTC_SET_PD_REG CYREG_NVIC_SETPEND0\r
-\r
-/* SD_PULLUP */\r
-#define SD_PULLUP__0__MASK 0x02u\r
-#define SD_PULLUP__0__PC CYREG_PRT3_PC1\r
-#define SD_PULLUP__0__PORT 3u\r
-#define SD_PULLUP__0__SHIFT 1\r
-#define SD_PULLUP__1__MASK 0x04u\r
-#define SD_PULLUP__1__PC CYREG_PRT3_PC2\r
-#define SD_PULLUP__1__PORT 3u\r
-#define SD_PULLUP__1__SHIFT 2\r
-#define SD_PULLUP__2__MASK 0x08u\r
-#define SD_PULLUP__2__PC CYREG_PRT3_PC3\r
-#define SD_PULLUP__2__PORT 3u\r
-#define SD_PULLUP__2__SHIFT 3\r
-#define SD_PULLUP__3__MASK 0x10u\r
-#define SD_PULLUP__3__PC CYREG_PRT3_PC4\r
-#define SD_PULLUP__3__PORT 3u\r
-#define SD_PULLUP__3__SHIFT 4\r
-#define SD_PULLUP__4__MASK 0x20u\r
-#define SD_PULLUP__4__PC CYREG_PRT3_PC5\r
-#define SD_PULLUP__4__PORT 3u\r
-#define SD_PULLUP__4__SHIFT 5\r
-#define SD_PULLUP__AG CYREG_PRT3_AG\r
-#define SD_PULLUP__AMUX CYREG_PRT3_AMUX\r
-#define SD_PULLUP__BIE CYREG_PRT3_BIE\r
-#define SD_PULLUP__BIT_MASK CYREG_PRT3_BIT_MASK\r
-#define SD_PULLUP__BYP CYREG_PRT3_BYP\r
-#define SD_PULLUP__CTL CYREG_PRT3_CTL\r
-#define SD_PULLUP__DM0 CYREG_PRT3_DM0\r
-#define SD_PULLUP__DM1 CYREG_PRT3_DM1\r
-#define SD_PULLUP__DM2 CYREG_PRT3_DM2\r
-#define SD_PULLUP__DR CYREG_PRT3_DR\r
-#define SD_PULLUP__INP_DIS CYREG_PRT3_INP_DIS\r
-#define SD_PULLUP__LCD_COM_SEG CYREG_PRT3_LCD_COM_SEG\r
-#define SD_PULLUP__LCD_EN CYREG_PRT3_LCD_EN\r
-#define SD_PULLUP__MASK 0x3Eu\r
-#define SD_PULLUP__PORT 3u\r
-#define SD_PULLUP__PRT CYREG_PRT3_PRT\r
-#define SD_PULLUP__PRTDSI__CAPS_SEL CYREG_PRT3_CAPS_SEL\r
-#define SD_PULLUP__PRTDSI__DBL_SYNC_IN CYREG_PRT3_DBL_SYNC_IN\r
-#define SD_PULLUP__PRTDSI__OE_SEL0 CYREG_PRT3_OE_SEL0\r
-#define SD_PULLUP__PRTDSI__OE_SEL1 CYREG_PRT3_OE_SEL1\r
-#define SD_PULLUP__PRTDSI__OUT_SEL0 CYREG_PRT3_OUT_SEL0\r
-#define SD_PULLUP__PRTDSI__OUT_SEL1 CYREG_PRT3_OUT_SEL1\r
-#define SD_PULLUP__PRTDSI__SYNC_OUT CYREG_PRT3_SYNC_OUT\r
-#define SD_PULLUP__PS CYREG_PRT3_PS\r
-#define SD_PULLUP__SHIFT 1\r
-#define SD_PULLUP__SLW CYREG_PRT3_SLW\r
-\r
-/* USBFS_USB */\r
-#define USBFS_USB__ARB_CFG CYREG_USB_ARB_CFG\r
-#define USBFS_USB__ARB_EP1_CFG CYREG_USB_ARB_EP1_CFG\r
-#define USBFS_USB__ARB_EP1_INT_EN CYREG_USB_ARB_EP1_INT_EN\r
-#define USBFS_USB__ARB_EP1_SR CYREG_USB_ARB_EP1_SR\r
-#define USBFS_USB__ARB_EP2_CFG CYREG_USB_ARB_EP2_CFG\r
-#define USBFS_USB__ARB_EP2_INT_EN CYREG_USB_ARB_EP2_INT_EN\r
-#define USBFS_USB__ARB_EP2_SR CYREG_USB_ARB_EP2_SR\r
-#define USBFS_USB__ARB_EP3_CFG CYREG_USB_ARB_EP3_CFG\r
-#define USBFS_USB__ARB_EP3_INT_EN CYREG_USB_ARB_EP3_INT_EN\r
-#define USBFS_USB__ARB_EP3_SR CYREG_USB_ARB_EP3_SR\r
-#define USBFS_USB__ARB_EP4_CFG CYREG_USB_ARB_EP4_CFG\r
-#define USBFS_USB__ARB_EP4_INT_EN CYREG_USB_ARB_EP4_INT_EN\r
-#define USBFS_USB__ARB_EP4_SR CYREG_USB_ARB_EP4_SR\r
-#define USBFS_USB__ARB_EP5_CFG CYREG_USB_ARB_EP5_CFG\r
-#define USBFS_USB__ARB_EP5_INT_EN CYREG_USB_ARB_EP5_INT_EN\r
-#define USBFS_USB__ARB_EP5_SR CYREG_USB_ARB_EP5_SR\r
-#define USBFS_USB__ARB_EP6_CFG CYREG_USB_ARB_EP6_CFG\r
-#define USBFS_USB__ARB_EP6_INT_EN CYREG_USB_ARB_EP6_INT_EN\r
-#define USBFS_USB__ARB_EP6_SR CYREG_USB_ARB_EP6_SR\r
-#define USBFS_USB__ARB_EP7_CFG CYREG_USB_ARB_EP7_CFG\r
-#define USBFS_USB__ARB_EP7_INT_EN CYREG_USB_ARB_EP7_INT_EN\r
-#define USBFS_USB__ARB_EP7_SR CYREG_USB_ARB_EP7_SR\r
-#define USBFS_USB__ARB_EP8_CFG CYREG_USB_ARB_EP8_CFG\r
-#define USBFS_USB__ARB_EP8_INT_EN CYREG_USB_ARB_EP8_INT_EN\r
-#define USBFS_USB__ARB_EP8_SR CYREG_USB_ARB_EP8_SR\r
-#define USBFS_USB__ARB_INT_EN CYREG_USB_ARB_INT_EN\r
-#define USBFS_USB__ARB_INT_SR CYREG_USB_ARB_INT_SR\r
-#define USBFS_USB__ARB_RW1_DR CYREG_USB_ARB_RW1_DR\r
-#define USBFS_USB__ARB_RW1_RA CYREG_USB_ARB_RW1_RA\r
-#define USBFS_USB__ARB_RW1_RA_MSB CYREG_USB_ARB_RW1_RA_MSB\r
-#define USBFS_USB__ARB_RW1_WA CYREG_USB_ARB_RW1_WA\r
-#define USBFS_USB__ARB_RW1_WA_MSB CYREG_USB_ARB_RW1_WA_MSB\r
-#define USBFS_USB__ARB_RW2_DR CYREG_USB_ARB_RW2_DR\r
-#define USBFS_USB__ARB_RW2_RA CYREG_USB_ARB_RW2_RA\r
-#define USBFS_USB__ARB_RW2_RA_MSB CYREG_USB_ARB_RW2_RA_MSB\r
-#define USBFS_USB__ARB_RW2_WA CYREG_USB_ARB_RW2_WA\r
-#define USBFS_USB__ARB_RW2_WA_MSB CYREG_USB_ARB_RW2_WA_MSB\r
-#define USBFS_USB__ARB_RW3_DR CYREG_USB_ARB_RW3_DR\r
-#define USBFS_USB__ARB_RW3_RA CYREG_USB_ARB_RW3_RA\r
-#define USBFS_USB__ARB_RW3_RA_MSB CYREG_USB_ARB_RW3_RA_MSB\r
-#define USBFS_USB__ARB_RW3_WA CYREG_USB_ARB_RW3_WA\r
-#define USBFS_USB__ARB_RW3_WA_MSB CYREG_USB_ARB_RW3_WA_MSB\r
-#define USBFS_USB__ARB_RW4_DR CYREG_USB_ARB_RW4_DR\r
-#define USBFS_USB__ARB_RW4_RA CYREG_USB_ARB_RW4_RA\r
-#define USBFS_USB__ARB_RW4_RA_MSB CYREG_USB_ARB_RW4_RA_MSB\r
-#define USBFS_USB__ARB_RW4_WA CYREG_USB_ARB_RW4_WA\r
-#define USBFS_USB__ARB_RW4_WA_MSB CYREG_USB_ARB_RW4_WA_MSB\r
-#define USBFS_USB__ARB_RW5_DR CYREG_USB_ARB_RW5_DR\r
-#define USBFS_USB__ARB_RW5_RA CYREG_USB_ARB_RW5_RA\r
-#define USBFS_USB__ARB_RW5_RA_MSB CYREG_USB_ARB_RW5_RA_MSB\r
-#define USBFS_USB__ARB_RW5_WA CYREG_USB_ARB_RW5_WA\r
-#define USBFS_USB__ARB_RW5_WA_MSB CYREG_USB_ARB_RW5_WA_MSB\r
-#define USBFS_USB__ARB_RW6_DR CYREG_USB_ARB_RW6_DR\r
-#define USBFS_USB__ARB_RW6_RA CYREG_USB_ARB_RW6_RA\r
-#define USBFS_USB__ARB_RW6_RA_MSB CYREG_USB_ARB_RW6_RA_MSB\r
-#define USBFS_USB__ARB_RW6_WA CYREG_USB_ARB_RW6_WA\r
-#define USBFS_USB__ARB_RW6_WA_MSB CYREG_USB_ARB_RW6_WA_MSB\r
-#define USBFS_USB__ARB_RW7_DR CYREG_USB_ARB_RW7_DR\r
-#define USBFS_USB__ARB_RW7_RA CYREG_USB_ARB_RW7_RA\r
-#define USBFS_USB__ARB_RW7_RA_MSB CYREG_USB_ARB_RW7_RA_MSB\r
-#define USBFS_USB__ARB_RW7_WA CYREG_USB_ARB_RW7_WA\r
-#define USBFS_USB__ARB_RW7_WA_MSB CYREG_USB_ARB_RW7_WA_MSB\r
-#define USBFS_USB__ARB_RW8_DR CYREG_USB_ARB_RW8_DR\r
-#define USBFS_USB__ARB_RW8_RA CYREG_USB_ARB_RW8_RA\r
-#define USBFS_USB__ARB_RW8_RA_MSB CYREG_USB_ARB_RW8_RA_MSB\r
-#define USBFS_USB__ARB_RW8_WA CYREG_USB_ARB_RW8_WA\r
-#define USBFS_USB__ARB_RW8_WA_MSB CYREG_USB_ARB_RW8_WA_MSB\r
-#define USBFS_USB__BUF_SIZE CYREG_USB_BUF_SIZE\r
-#define USBFS_USB__BUS_RST_CNT CYREG_USB_BUS_RST_CNT\r
-#define USBFS_USB__CR0 CYREG_USB_CR0\r
-#define USBFS_USB__CR1 CYREG_USB_CR1\r
-#define USBFS_USB__CWA CYREG_USB_CWA\r
-#define USBFS_USB__CWA_MSB CYREG_USB_CWA_MSB\r
-#define USBFS_USB__DMA_THRES CYREG_USB_DMA_THRES\r
-#define USBFS_USB__DMA_THRES_MSB CYREG_USB_DMA_THRES_MSB\r
-#define USBFS_USB__DYN_RECONFIG CYREG_USB_DYN_RECONFIG\r
-#define USBFS_USB__EP0_CNT CYREG_USB_EP0_CNT\r
-#define USBFS_USB__EP0_CR CYREG_USB_EP0_CR\r
-#define USBFS_USB__EP0_DR0 CYREG_USB_EP0_DR0\r
-#define USBFS_USB__EP0_DR1 CYREG_USB_EP0_DR1\r
-#define USBFS_USB__EP0_DR2 CYREG_USB_EP0_DR2\r
-#define USBFS_USB__EP0_DR3 CYREG_USB_EP0_DR3\r
-#define USBFS_USB__EP0_DR4 CYREG_USB_EP0_DR4\r
-#define USBFS_USB__EP0_DR5 CYREG_USB_EP0_DR5\r
-#define USBFS_USB__EP0_DR6 CYREG_USB_EP0_DR6\r
-#define USBFS_USB__EP0_DR7 CYREG_USB_EP0_DR7\r
-#define USBFS_USB__EP_ACTIVE CYREG_USB_EP_ACTIVE\r
-#define USBFS_USB__EP_TYPE CYREG_USB_EP_TYPE\r
-#define USBFS_USB__MEM_DATA CYREG_USB_MEM_DATA_MBASE\r
-#define USBFS_USB__PM_ACT_CFG CYREG_PM_ACT_CFG5\r
-#define USBFS_USB__PM_ACT_MSK 0x01u\r
-#define USBFS_USB__PM_STBY_CFG CYREG_PM_STBY_CFG5\r
-#define USBFS_USB__PM_STBY_MSK 0x01u\r
-#define USBFS_USB__SIE_EP1_CNT0 CYREG_USB_SIE_EP1_CNT0\r
-#define USBFS_USB__SIE_EP1_CNT1 CYREG_USB_SIE_EP1_CNT1\r
-#define USBFS_USB__SIE_EP1_CR0 CYREG_USB_SIE_EP1_CR0\r
-#define USBFS_USB__SIE_EP2_CNT0 CYREG_USB_SIE_EP2_CNT0\r
-#define USBFS_USB__SIE_EP2_CNT1 CYREG_USB_SIE_EP2_CNT1\r
-#define USBFS_USB__SIE_EP2_CR0 CYREG_USB_SIE_EP2_CR0\r
-#define USBFS_USB__SIE_EP3_CNT0 CYREG_USB_SIE_EP3_CNT0\r
-#define USBFS_USB__SIE_EP3_CNT1 CYREG_USB_SIE_EP3_CNT1\r
-#define USBFS_USB__SIE_EP3_CR0 CYREG_USB_SIE_EP3_CR0\r
-#define USBFS_USB__SIE_EP4_CNT0 CYREG_USB_SIE_EP4_CNT0\r
-#define USBFS_USB__SIE_EP4_CNT1 CYREG_USB_SIE_EP4_CNT1\r
-#define USBFS_USB__SIE_EP4_CR0 CYREG_USB_SIE_EP4_CR0\r
-#define USBFS_USB__SIE_EP5_CNT0 CYREG_USB_SIE_EP5_CNT0\r
-#define USBFS_USB__SIE_EP5_CNT1 CYREG_USB_SIE_EP5_CNT1\r
-#define USBFS_USB__SIE_EP5_CR0 CYREG_USB_SIE_EP5_CR0\r
-#define USBFS_USB__SIE_EP6_CNT0 CYREG_USB_SIE_EP6_CNT0\r
-#define USBFS_USB__SIE_EP6_CNT1 CYREG_USB_SIE_EP6_CNT1\r
-#define USBFS_USB__SIE_EP6_CR0 CYREG_USB_SIE_EP6_CR0\r
-#define USBFS_USB__SIE_EP7_CNT0 CYREG_USB_SIE_EP7_CNT0\r
-#define USBFS_USB__SIE_EP7_CNT1 CYREG_USB_SIE_EP7_CNT1\r
-#define USBFS_USB__SIE_EP7_CR0 CYREG_USB_SIE_EP7_CR0\r
-#define USBFS_USB__SIE_EP8_CNT0 CYREG_USB_SIE_EP8_CNT0\r
-#define USBFS_USB__SIE_EP8_CNT1 CYREG_USB_SIE_EP8_CNT1\r
-#define USBFS_USB__SIE_EP8_CR0 CYREG_USB_SIE_EP8_CR0\r
-#define USBFS_USB__SIE_EP_INT_EN CYREG_USB_SIE_EP_INT_EN\r
-#define USBFS_USB__SIE_EP_INT_SR CYREG_USB_SIE_EP_INT_SR\r
-#define USBFS_USB__SOF0 CYREG_USB_SOF0\r
-#define USBFS_USB__SOF1 CYREG_USB_SOF1\r
-#define USBFS_USB__USBIO_CR0 CYREG_USB_USBIO_CR0\r
-#define USBFS_USB__USBIO_CR1 CYREG_USB_USBIO_CR1\r
-#define USBFS_USB__USB_CLK_EN CYREG_USB_USB_CLK_EN\r
-\r
-/* SCSI_Out */\r
-#define SCSI_Out__0__AG CYREG_PRT4_AG\r
-#define SCSI_Out__0__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__0__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__0__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__0__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__0__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__0__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__0__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__0__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__0__DR CYREG_PRT4_DR\r
-#define SCSI_Out__0__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__0__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__0__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__0__MASK 0x08u\r
-#define SCSI_Out__0__PC CYREG_PRT4_PC3\r
-#define SCSI_Out__0__PORT 4u\r
-#define SCSI_Out__0__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__0__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__0__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__0__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__0__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__0__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__0__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__0__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__0__PS CYREG_PRT4_PS\r
-#define SCSI_Out__0__SHIFT 3\r
-#define SCSI_Out__0__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__1__AG CYREG_PRT4_AG\r
-#define SCSI_Out__1__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__1__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__1__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__1__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__1__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__1__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__1__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__1__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__1__DR CYREG_PRT4_DR\r
-#define SCSI_Out__1__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__1__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__1__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__1__MASK 0x04u\r
-#define SCSI_Out__1__PC CYREG_PRT4_PC2\r
-#define SCSI_Out__1__PORT 4u\r
-#define SCSI_Out__1__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__1__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__1__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__1__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__1__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__1__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__1__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__1__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__1__PS CYREG_PRT4_PS\r
-#define SCSI_Out__1__SHIFT 2\r
-#define SCSI_Out__1__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__2__AG CYREG_PRT0_AG\r
-#define SCSI_Out__2__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__2__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__2__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__2__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__2__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__2__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__2__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__2__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__2__DR CYREG_PRT0_DR\r
-#define SCSI_Out__2__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__2__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__2__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__2__MASK 0x80u\r
-#define SCSI_Out__2__PC CYREG_PRT0_PC7\r
-#define SCSI_Out__2__PORT 0u\r
-#define SCSI_Out__2__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__2__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__2__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__2__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__2__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__2__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__2__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__2__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__2__PS CYREG_PRT0_PS\r
-#define SCSI_Out__2__SHIFT 7\r
-#define SCSI_Out__2__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__3__AG CYREG_PRT0_AG\r
-#define SCSI_Out__3__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__3__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__3__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__3__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__3__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__3__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__3__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__3__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__3__DR CYREG_PRT0_DR\r
-#define SCSI_Out__3__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__3__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__3__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__3__MASK 0x40u\r
-#define SCSI_Out__3__PC CYREG_PRT0_PC6\r
-#define SCSI_Out__3__PORT 0u\r
-#define SCSI_Out__3__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__3__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__3__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__3__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__3__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__3__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__3__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__3__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__3__PS CYREG_PRT0_PS\r
-#define SCSI_Out__3__SHIFT 6\r
-#define SCSI_Out__3__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__4__AG CYREG_PRT0_AG\r
-#define SCSI_Out__4__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__4__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__4__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__4__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__4__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__4__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__4__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__4__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__4__DR CYREG_PRT0_DR\r
-#define SCSI_Out__4__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__4__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__4__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__4__MASK 0x20u\r
-#define SCSI_Out__4__PC CYREG_PRT0_PC5\r
-#define SCSI_Out__4__PORT 0u\r
-#define SCSI_Out__4__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__4__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__4__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__4__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__4__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__4__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__4__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__4__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__4__PS CYREG_PRT0_PS\r
-#define SCSI_Out__4__SHIFT 5\r
-#define SCSI_Out__4__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__5__AG CYREG_PRT0_AG\r
-#define SCSI_Out__5__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__5__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__5__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__5__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__5__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__5__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__5__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__5__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__5__DR CYREG_PRT0_DR\r
-#define SCSI_Out__5__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__5__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__5__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__5__MASK 0x10u\r
-#define SCSI_Out__5__PC CYREG_PRT0_PC4\r
-#define SCSI_Out__5__PORT 0u\r
-#define SCSI_Out__5__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__5__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__5__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__5__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__5__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__5__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__5__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__5__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__5__PS CYREG_PRT0_PS\r
-#define SCSI_Out__5__SHIFT 4\r
-#define SCSI_Out__5__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__6__AG CYREG_PRT0_AG\r
-#define SCSI_Out__6__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__6__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__6__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__6__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__6__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__6__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__6__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__6__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__6__DR CYREG_PRT0_DR\r
-#define SCSI_Out__6__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__6__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__6__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__6__MASK 0x08u\r
-#define SCSI_Out__6__PC CYREG_PRT0_PC3\r
-#define SCSI_Out__6__PORT 0u\r
-#define SCSI_Out__6__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__6__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__6__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__6__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__6__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__6__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__6__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__6__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__6__PS CYREG_PRT0_PS\r
-#define SCSI_Out__6__SHIFT 3\r
-#define SCSI_Out__6__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__7__AG CYREG_PRT0_AG\r
-#define SCSI_Out__7__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__7__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__7__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__7__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__7__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__7__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__7__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__7__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__7__DR CYREG_PRT0_DR\r
-#define SCSI_Out__7__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__7__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__7__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__7__MASK 0x04u\r
-#define SCSI_Out__7__PC CYREG_PRT0_PC2\r
-#define SCSI_Out__7__PORT 0u\r
-#define SCSI_Out__7__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__7__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__7__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__7__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__7__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__7__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__7__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__7__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__7__PS CYREG_PRT0_PS\r
-#define SCSI_Out__7__SHIFT 2\r
-#define SCSI_Out__7__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__8__AG CYREG_PRT0_AG\r
-#define SCSI_Out__8__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__8__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__8__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__8__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__8__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__8__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__8__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__8__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__8__DR CYREG_PRT0_DR\r
-#define SCSI_Out__8__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__8__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__8__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__8__MASK 0x02u\r
-#define SCSI_Out__8__PC CYREG_PRT0_PC1\r
-#define SCSI_Out__8__PORT 0u\r
-#define SCSI_Out__8__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__8__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__8__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__8__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__8__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__8__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__8__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__8__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__8__PS CYREG_PRT0_PS\r
-#define SCSI_Out__8__SHIFT 1\r
-#define SCSI_Out__8__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__9__AG CYREG_PRT0_AG\r
-#define SCSI_Out__9__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__9__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__9__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__9__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__9__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__9__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__9__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__9__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__9__DR CYREG_PRT0_DR\r
-#define SCSI_Out__9__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__9__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__9__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__9__MASK 0x01u\r
-#define SCSI_Out__9__PC CYREG_PRT0_PC0\r
-#define SCSI_Out__9__PORT 0u\r
-#define SCSI_Out__9__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__9__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__9__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__9__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__9__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__9__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__9__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__9__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__9__PS CYREG_PRT0_PS\r
-#define SCSI_Out__9__SHIFT 0\r
-#define SCSI_Out__9__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__ACK__AG CYREG_PRT0_AG\r
-#define SCSI_Out__ACK__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__ACK__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__ACK__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__ACK__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__ACK__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__ACK__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__ACK__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__ACK__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__ACK__DR CYREG_PRT0_DR\r
-#define SCSI_Out__ACK__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__ACK__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__ACK__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__ACK__MASK 0x40u\r
-#define SCSI_Out__ACK__PC CYREG_PRT0_PC6\r
-#define SCSI_Out__ACK__PORT 0u\r
-#define SCSI_Out__ACK__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__ACK__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__ACK__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__ACK__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__ACK__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__ACK__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__ACK__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__ACK__PS CYREG_PRT0_PS\r
-#define SCSI_Out__ACK__SHIFT 6\r
-#define SCSI_Out__ACK__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__ATN__AG CYREG_PRT4_AG\r
-#define SCSI_Out__ATN__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__ATN__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__ATN__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__ATN__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__ATN__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__ATN__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__ATN__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__ATN__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__ATN__DR CYREG_PRT4_DR\r
-#define SCSI_Out__ATN__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__ATN__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__ATN__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__ATN__MASK 0x04u\r
-#define SCSI_Out__ATN__PC CYREG_PRT4_PC2\r
-#define SCSI_Out__ATN__PORT 4u\r
-#define SCSI_Out__ATN__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__ATN__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__ATN__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__ATN__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__ATN__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__ATN__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__ATN__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__ATN__PS CYREG_PRT4_PS\r
-#define SCSI_Out__ATN__SHIFT 2\r
-#define SCSI_Out__ATN__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__BSY__AG CYREG_PRT0_AG\r
-#define SCSI_Out__BSY__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__BSY__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__BSY__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__BSY__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__BSY__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__BSY__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__BSY__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__BSY__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__BSY__DR CYREG_PRT0_DR\r
-#define SCSI_Out__BSY__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__BSY__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__BSY__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__BSY__MASK 0x80u\r
-#define SCSI_Out__BSY__PC CYREG_PRT0_PC7\r
-#define SCSI_Out__BSY__PORT 0u\r
-#define SCSI_Out__BSY__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__BSY__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__BSY__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__BSY__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__BSY__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__BSY__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__BSY__PS CYREG_PRT0_PS\r
-#define SCSI_Out__BSY__SHIFT 7\r
-#define SCSI_Out__BSY__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__CD__AG CYREG_PRT0_AG\r
-#define SCSI_Out__CD__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__CD__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__CD__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__CD__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__CD__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__CD__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__CD__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__CD__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__CD__DR CYREG_PRT0_DR\r
-#define SCSI_Out__CD__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__CD__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__CD__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__CD__MASK 0x04u\r
-#define SCSI_Out__CD__PC CYREG_PRT0_PC2\r
-#define SCSI_Out__CD__PORT 0u\r
-#define SCSI_Out__CD__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__CD__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__CD__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__CD__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__CD__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__CD__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__CD__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__CD__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__CD__PS CYREG_PRT0_PS\r
-#define SCSI_Out__CD__SHIFT 2\r
-#define SCSI_Out__CD__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__DBP_raw__AG CYREG_PRT4_AG\r
-#define SCSI_Out__DBP_raw__AMUX CYREG_PRT4_AMUX\r
-#define SCSI_Out__DBP_raw__BIE CYREG_PRT4_BIE\r
-#define SCSI_Out__DBP_raw__BIT_MASK CYREG_PRT4_BIT_MASK\r
-#define SCSI_Out__DBP_raw__BYP CYREG_PRT4_BYP\r
-#define SCSI_Out__DBP_raw__CTL CYREG_PRT4_CTL\r
-#define SCSI_Out__DBP_raw__DM0 CYREG_PRT4_DM0\r
-#define SCSI_Out__DBP_raw__DM1 CYREG_PRT4_DM1\r
-#define SCSI_Out__DBP_raw__DM2 CYREG_PRT4_DM2\r
-#define SCSI_Out__DBP_raw__DR CYREG_PRT4_DR\r
-#define SCSI_Out__DBP_raw__INP_DIS CYREG_PRT4_INP_DIS\r
-#define SCSI_Out__DBP_raw__LCD_COM_SEG CYREG_PRT4_LCD_COM_SEG\r
-#define SCSI_Out__DBP_raw__LCD_EN CYREG_PRT4_LCD_EN\r
-#define SCSI_Out__DBP_raw__MASK 0x08u\r
-#define SCSI_Out__DBP_raw__PC CYREG_PRT4_PC3\r
-#define SCSI_Out__DBP_raw__PORT 4u\r
-#define SCSI_Out__DBP_raw__PRT CYREG_PRT4_PRT\r
-#define SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL CYREG_PRT4_CAPS_SEL\r
-#define SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT4_DBL_SYNC_IN\r
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 CYREG_PRT4_OE_SEL0\r
-#define SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 CYREG_PRT4_OE_SEL1\r
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 CYREG_PRT4_OUT_SEL0\r
-#define SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 CYREG_PRT4_OUT_SEL1\r
-#define SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT CYREG_PRT4_SYNC_OUT\r
-#define SCSI_Out__DBP_raw__PS CYREG_PRT4_PS\r
-#define SCSI_Out__DBP_raw__SHIFT 3\r
-#define SCSI_Out__DBP_raw__SLW CYREG_PRT4_SLW\r
-#define SCSI_Out__IO_raw__AG CYREG_PRT0_AG\r
-#define SCSI_Out__IO_raw__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__IO_raw__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__IO_raw__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__IO_raw__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__IO_raw__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__IO_raw__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__IO_raw__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__IO_raw__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__IO_raw__DR CYREG_PRT0_DR\r
-#define SCSI_Out__IO_raw__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__IO_raw__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__IO_raw__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__IO_raw__MASK 0x01u\r
-#define SCSI_Out__IO_raw__PC CYREG_PRT0_PC0\r
-#define SCSI_Out__IO_raw__PORT 0u\r
-#define SCSI_Out__IO_raw__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__IO_raw__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__IO_raw__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__IO_raw__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__IO_raw__PS CYREG_PRT0_PS\r
-#define SCSI_Out__IO_raw__SHIFT 0\r
-#define SCSI_Out__IO_raw__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__MSG__AG CYREG_PRT0_AG\r
-#define SCSI_Out__MSG__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__MSG__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__MSG__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__MSG__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__MSG__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__MSG__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__MSG__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__MSG__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__MSG__DR CYREG_PRT0_DR\r
-#define SCSI_Out__MSG__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__MSG__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__MSG__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__MSG__MASK 0x10u\r
-#define SCSI_Out__MSG__PC CYREG_PRT0_PC4\r
-#define SCSI_Out__MSG__PORT 0u\r
-#define SCSI_Out__MSG__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__MSG__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__MSG__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__MSG__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__MSG__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__MSG__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__MSG__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__MSG__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__MSG__PS CYREG_PRT0_PS\r
-#define SCSI_Out__MSG__SHIFT 4\r
-#define SCSI_Out__MSG__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__REQ__AG CYREG_PRT0_AG\r
-#define SCSI_Out__REQ__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__REQ__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__REQ__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__REQ__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__REQ__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__REQ__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__REQ__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__REQ__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__REQ__DR CYREG_PRT0_DR\r
-#define SCSI_Out__REQ__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__REQ__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__REQ__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__REQ__MASK 0x02u\r
-#define SCSI_Out__REQ__PC CYREG_PRT0_PC1\r
-#define SCSI_Out__REQ__PORT 0u\r
-#define SCSI_Out__REQ__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__REQ__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__REQ__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__REQ__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__REQ__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__REQ__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__REQ__PS CYREG_PRT0_PS\r
-#define SCSI_Out__REQ__SHIFT 1\r
-#define SCSI_Out__REQ__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__RST__AG CYREG_PRT0_AG\r
-#define SCSI_Out__RST__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__RST__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__RST__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__RST__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__RST__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__RST__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__RST__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__RST__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__RST__DR CYREG_PRT0_DR\r
-#define SCSI_Out__RST__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__RST__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__RST__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__RST__MASK 0x20u\r
-#define SCSI_Out__RST__PC CYREG_PRT0_PC5\r
-#define SCSI_Out__RST__PORT 0u\r
-#define SCSI_Out__RST__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__RST__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__RST__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__RST__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__RST__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__RST__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__RST__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__RST__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__RST__PS CYREG_PRT0_PS\r
-#define SCSI_Out__RST__SHIFT 5\r
-#define SCSI_Out__RST__SLW CYREG_PRT0_SLW\r
-#define SCSI_Out__SEL__AG CYREG_PRT0_AG\r
-#define SCSI_Out__SEL__AMUX CYREG_PRT0_AMUX\r
-#define SCSI_Out__SEL__BIE CYREG_PRT0_BIE\r
-#define SCSI_Out__SEL__BIT_MASK CYREG_PRT0_BIT_MASK\r
-#define SCSI_Out__SEL__BYP CYREG_PRT0_BYP\r
-#define SCSI_Out__SEL__CTL CYREG_PRT0_CTL\r
-#define SCSI_Out__SEL__DM0 CYREG_PRT0_DM0\r
-#define SCSI_Out__SEL__DM1 CYREG_PRT0_DM1\r
-#define SCSI_Out__SEL__DM2 CYREG_PRT0_DM2\r
-#define SCSI_Out__SEL__DR CYREG_PRT0_DR\r
-#define SCSI_Out__SEL__INP_DIS CYREG_PRT0_INP_DIS\r
-#define SCSI_Out__SEL__LCD_COM_SEG CYREG_PRT0_LCD_COM_SEG\r
-#define SCSI_Out__SEL__LCD_EN CYREG_PRT0_LCD_EN\r
-#define SCSI_Out__SEL__MASK 0x08u\r
-#define SCSI_Out__SEL__PC CYREG_PRT0_PC3\r
-#define SCSI_Out__SEL__PORT 0u\r
-#define SCSI_Out__SEL__PRT CYREG_PRT0_PRT\r
-#define SCSI_Out__SEL__PRTDSI__CAPS_SEL CYREG_PRT0_CAPS_SEL\r
-#define SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN CYREG_PRT0_DBL_SYNC_IN\r
-#define SCSI_Out__SEL__PRTDSI__OE_SEL0 CYREG_PRT0_OE_SEL0\r
-#define SCSI_Out__SEL__PRTDSI__OE_SEL1 CYREG_PRT0_OE_SEL1\r
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL0 CYREG_PRT0_OUT_SEL0\r
-#define SCSI_Out__SEL__PRTDSI__OUT_SEL1 CYREG_PRT0_OUT_SEL1\r
-#define SCSI_Out__SEL__PRTDSI__SYNC_OUT CYREG_PRT0_SYNC_OUT\r
-#define SCSI_Out__SEL__PS CYREG_PRT0_PS\r
-#define SCSI_Out__SEL__SHIFT 3\r
-#define SCSI_Out__SEL__SLW CYREG_PRT0_SLW\r
-\r
-/* USBFS_Dm */\r
-#define USBFS_Dm__0__MASK 0x80u\r
-#define USBFS_Dm__0__PC CYREG_IO_PC_PRT15_7_6_PC1\r
-#define USBFS_Dm__0__PORT 15u\r
-#define USBFS_Dm__0__SHIFT 7\r
-#define USBFS_Dm__AG CYREG_PRT15_AG\r
-#define USBFS_Dm__AMUX CYREG_PRT15_AMUX\r
-#define USBFS_Dm__BIE CYREG_PRT15_BIE\r
-#define USBFS_Dm__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define USBFS_Dm__BYP CYREG_PRT15_BYP\r
-#define USBFS_Dm__CTL CYREG_PRT15_CTL\r
-#define USBFS_Dm__DM0 CYREG_PRT15_DM0\r
-#define USBFS_Dm__DM1 CYREG_PRT15_DM1\r
-#define USBFS_Dm__DM2 CYREG_PRT15_DM2\r
-#define USBFS_Dm__DR CYREG_PRT15_DR\r
-#define USBFS_Dm__INP_DIS CYREG_PRT15_INP_DIS\r
-#define USBFS_Dm__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define USBFS_Dm__LCD_EN CYREG_PRT15_LCD_EN\r
-#define USBFS_Dm__MASK 0x80u\r
-#define USBFS_Dm__PORT 15u\r
-#define USBFS_Dm__PRT CYREG_PRT15_PRT\r
-#define USBFS_Dm__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define USBFS_Dm__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define USBFS_Dm__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define USBFS_Dm__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define USBFS_Dm__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define USBFS_Dm__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define USBFS_Dm__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define USBFS_Dm__PS CYREG_PRT15_PS\r
-#define USBFS_Dm__SHIFT 7\r
-#define USBFS_Dm__SLW CYREG_PRT15_SLW\r
-\r
-/* USBFS_Dp */\r
-#define USBFS_Dp__0__MASK 0x40u\r
-#define USBFS_Dp__0__PC CYREG_IO_PC_PRT15_7_6_PC0\r
-#define USBFS_Dp__0__PORT 15u\r
-#define USBFS_Dp__0__SHIFT 6\r
-#define USBFS_Dp__AG CYREG_PRT15_AG\r
-#define USBFS_Dp__AMUX CYREG_PRT15_AMUX\r
-#define USBFS_Dp__BIE CYREG_PRT15_BIE\r
-#define USBFS_Dp__BIT_MASK CYREG_PRT15_BIT_MASK\r
-#define USBFS_Dp__BYP CYREG_PRT15_BYP\r
-#define USBFS_Dp__CTL CYREG_PRT15_CTL\r
-#define USBFS_Dp__DM0 CYREG_PRT15_DM0\r
-#define USBFS_Dp__DM1 CYREG_PRT15_DM1\r
-#define USBFS_Dp__DM2 CYREG_PRT15_DM2\r
-#define USBFS_Dp__DR CYREG_PRT15_DR\r
-#define USBFS_Dp__INP_DIS CYREG_PRT15_INP_DIS\r
-#define USBFS_Dp__INTSTAT CYREG_PICU15_INTSTAT\r
-#define USBFS_Dp__LCD_COM_SEG CYREG_PRT15_LCD_COM_SEG\r
-#define USBFS_Dp__LCD_EN CYREG_PRT15_LCD_EN\r
-#define USBFS_Dp__MASK 0x40u\r
-#define USBFS_Dp__PORT 15u\r
-#define USBFS_Dp__PRT CYREG_PRT15_PRT\r
-#define USBFS_Dp__PRTDSI__CAPS_SEL CYREG_PRT15_CAPS_SEL\r
-#define USBFS_Dp__PRTDSI__DBL_SYNC_IN CYREG_PRT15_DBL_SYNC_IN\r
-#define USBFS_Dp__PRTDSI__OE_SEL0 CYREG_PRT15_OE_SEL0\r
-#define USBFS_Dp__PRTDSI__OE_SEL1 CYREG_PRT15_OE_SEL1\r
-#define USBFS_Dp__PRTDSI__OUT_SEL0 CYREG_PRT15_OUT_SEL0\r
-#define USBFS_Dp__PRTDSI__OUT_SEL1 CYREG_PRT15_OUT_SEL1\r
-#define USBFS_Dp__PRTDSI__SYNC_OUT CYREG_PRT15_SYNC_OUT\r
-#define USBFS_Dp__PS CYREG_PRT15_PS\r
-#define USBFS_Dp__SHIFT 6\r
-#define USBFS_Dp__SLW CYREG_PRT15_SLW\r
-#define USBFS_Dp__SNAP CYREG_PICU_15_SNAP_15\r
-\r
-/* Miscellaneous */\r
-/* -- WARNING: define names containing LEOPARD or PANTHER are deprecated and will be removed in a future release */\r
-#define CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO 0\r
-#define CYDEV_DEBUGGING_DPS_SWD_SWV 6\r
-#define CYDEV_CONFIG_UNUSED_IO_AllowButWarn 0\r
-#define CYDEV_CONFIGURATION_MODE_COMPRESSED 0\r
-#define CYDEV_CONFIG_FASTBOOT_ENABLED 1\r
-#define CYDEV_CHIP_REV_PSOC5LP_PRODUCTION 0u\r
-#define CYDEV_CHIP_REVISION_5B_PRODUCTION 0u\r
-#define CYDEV_CHIP_MEMBER_5B 4u\r
-#define CYDEV_CHIP_FAMILY_PSOC5 3u\r
-#define CYDEV_CHIP_DIE_PSOC5LP 4u\r
-#define CYDEV_CHIP_DIE_EXPECT CYDEV_CHIP_DIE_PSOC5LP\r
-#define CYDEV_BOOTLOADER_IO_COMP_USBFS 1\r
-#define BCLK__BUS_CLK__HZ 64000000U\r
-#define BCLK__BUS_CLK__KHZ 64000U\r
-#define BCLK__BUS_CLK__MHZ 64U\r
-#define CYDEV_BOOTLOADER_APPLICATIONS 1u\r
-#define CYDEV_BOOTLOADER_CHECKSUM_BASIC 0\r
-#define CYDEV_BOOTLOADER_CHECKSUM_CRC 1\r
-#define CYDEV_BOOTLOADER_IO_COMP CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-#define CYDEV_CHIP_DIE_ACTUAL CYDEV_CHIP_DIE_EXPECT\r
-#define CYDEV_CHIP_DIE_LEOPARD 1u\r
-#define CYDEV_CHIP_DIE_PANTHER 3u\r
-#define CYDEV_CHIP_DIE_PSOC4A 2u\r
-#define CYDEV_CHIP_DIE_UNKNOWN 0u\r
-#define CYDEV_CHIP_FAMILY_PSOC3 1u\r
-#define CYDEV_CHIP_FAMILY_PSOC4 2u\r
-#define CYDEV_CHIP_FAMILY_UNKNOWN 0u\r
-#define CYDEV_CHIP_FAMILY_USED CYDEV_CHIP_FAMILY_PSOC5\r
-#define CYDEV_CHIP_JTAG_ID 0x2E133069u\r
-#define CYDEV_CHIP_MEMBER_3A 1u\r
-#define CYDEV_CHIP_MEMBER_4A 2u\r
-#define CYDEV_CHIP_MEMBER_5A 3u\r
-#define CYDEV_CHIP_MEMBER_UNKNOWN 0u\r
-#define CYDEV_CHIP_MEMBER_USED CYDEV_CHIP_MEMBER_5B\r
-#define CYDEV_CHIP_REVISION_3A_ES1 0u\r
-#define CYDEV_CHIP_REVISION_3A_ES2 1u\r
-#define CYDEV_CHIP_REVISION_3A_ES3 3u\r
-#define CYDEV_CHIP_REVISION_3A_PRODUCTION 3u\r
-#define CYDEV_CHIP_REVISION_4A_ES0 17u\r
-#define CYDEV_CHIP_REVISION_4A_PRODUCTION 17u\r
-#define CYDEV_CHIP_REVISION_5A_ES0 0u\r
-#define CYDEV_CHIP_REVISION_5A_ES1 1u\r
-#define CYDEV_CHIP_REVISION_5A_PRODUCTION 1u\r
-#define CYDEV_CHIP_REVISION_5B_ES0 0u\r
-#define CYDEV_CHIP_REVISION_USED CYDEV_CHIP_REVISION_5B_PRODUCTION\r
-#define CYDEV_CHIP_REV_EXPECT CYDEV_CHIP_REV_PSOC5LP_PRODUCTION\r
-#define CYDEV_CHIP_REV_LEOPARD_ES1 0u\r
-#define CYDEV_CHIP_REV_LEOPARD_ES2 1u\r
-#define CYDEV_CHIP_REV_LEOPARD_ES3 3u\r
-#define CYDEV_CHIP_REV_LEOPARD_PRODUCTION 3u\r
-#define CYDEV_CHIP_REV_PANTHER_ES0 0u\r
-#define CYDEV_CHIP_REV_PANTHER_ES1 1u\r
-#define CYDEV_CHIP_REV_PANTHER_PRODUCTION 1u\r
-#define CYDEV_CHIP_REV_PSOC4A_ES0 17u\r
-#define CYDEV_CHIP_REV_PSOC4A_PRODUCTION 17u\r
-#define CYDEV_CHIP_REV_PSOC5LP_ES0 0u\r
-#define CYDEV_CONFIGURATION_COMPRESSED 1\r
-#define CYDEV_CONFIGURATION_DMA 0\r
-#define CYDEV_CONFIGURATION_ECC 0\r
-#define CYDEV_CONFIGURATION_IMOENABLED CYDEV_CONFIG_FASTBOOT_ENABLED\r
-#define CYDEV_CONFIGURATION_MODE CYDEV_CONFIGURATION_MODE_COMPRESSED\r
-#define CYDEV_CONFIGURATION_MODE_DMA 2\r
-#define CYDEV_CONFIGURATION_MODE_UNCOMPRESSED 1\r
-#define CYDEV_CONFIG_UNUSED_IO CYDEV_CONFIG_UNUSED_IO_AllowButWarn\r
-#define CYDEV_CONFIG_UNUSED_IO_AllowWithInfo 1\r
-#define CYDEV_CONFIG_UNUSED_IO_Disallowed 2\r
-#define CYDEV_DEBUGGING_DPS CYDEV_DEBUGGING_DPS_SWD_SWV\r
-#define CYDEV_DEBUGGING_DPS_Disable 3\r
-#define CYDEV_DEBUGGING_DPS_JTAG_4 1\r
-#define CYDEV_DEBUGGING_DPS_JTAG_5 0\r
-#define CYDEV_DEBUGGING_DPS_SWD 2\r
-#define CYDEV_DEBUGGING_ENABLE 1\r
-#define CYDEV_DEBUGGING_XRES 0\r
-#define CYDEV_DEBUG_ENABLE_MASK 0x20u\r
-#define CYDEV_DEBUG_ENABLE_REGISTER CYREG_MLOGIC_DEBUG\r
-#define CYDEV_DMA_CHANNELS_AVAILABLE 24u\r
-#define CYDEV_ECC_ENABLE 0\r
-#define CYDEV_HEAP_SIZE 0x0800\r
-#define CYDEV_INSTRUCT_CACHE_ENABLED 1\r
-#define CYDEV_INTR_RISING 0x00000000u\r
-#define CYDEV_PROJ_TYPE 1\r
-#define CYDEV_PROJ_TYPE_BOOTLOADER 1\r
-#define CYDEV_PROJ_TYPE_LOADABLE 2\r
-#define CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER 3\r
-#define CYDEV_PROJ_TYPE_STANDARD 0\r
-#define CYDEV_PROTECTION_ENABLE 0\r
-#define CYDEV_STACK_SIZE 0x2000\r
-#define CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP \r
-#define CYDEV_USE_BUNDLED_CMSIS 1\r
-#define CYDEV_VARIABLE_VDDA 0\r
-#define CYDEV_VDDA 5.0\r
-#define CYDEV_VDDA_MV 5000\r
-#define CYDEV_VDDD 5.0\r
-#define CYDEV_VDDD_MV 5000\r
-#define CYDEV_VDDIO0 5.0\r
-#define CYDEV_VDDIO0_MV 5000\r
-#define CYDEV_VDDIO1 5.0\r
-#define CYDEV_VDDIO1_MV 5000\r
-#define CYDEV_VDDIO2 5.0\r
-#define CYDEV_VDDIO2_MV 5000\r
-#define CYDEV_VDDIO3 5.0\r
-#define CYDEV_VDDIO3_MV 5000\r
-#define CYDEV_VIO0 5\r
-#define CYDEV_VIO0_MV 5000\r
-#define CYDEV_VIO1 5\r
-#define CYDEV_VIO1_MV 5000\r
-#define CYDEV_VIO2 5\r
-#define CYDEV_VIO2_MV 5000\r
-#define CYDEV_VIO3 5\r
-#define CYDEV_VIO3_MV 5000\r
-#define CyBtldr_Custom_Interface CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO\r
-#define CyBtldr_USBFS CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-#define DMA_CHANNELS_USED__MASK0 0x00000000u\r
-#define CYDEV_BOOTLOADER_ENABLE 1\r
-\r
-#endif /* INCLUDED_CYFITTER_H */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.c
deleted file mode 100755 (executable)
index c15b7b6..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.c
+++ /dev/null
@@ -1,435 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cyfitter_cfg.c\r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* Description:\r
-* This file is automatically generated by PSoC Creator with device \r
-* initialization code.  Except for the user defined sections in\r
-* CyClockStartupError(), this file should not be modified.\r
-*\r
-********************************************************************************\r
-* Copyright 2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-#include <string.h>\r
-#include <cytypes.h>\r
-#include <cydevice_trm.h>\r
-#include <cyfitter.h>\r
-#include <CyLib.h>\r
-#include <cyfitter_cfg.h>\r
-\r
-#define CY_NEED_CYCLOCKSTARTUPERROR 1\r
-\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-    #define CYPACKED \r
-    #define CYPACKED_ATTR __attribute__ ((packed))\r
-    #define CYALIGNED __attribute__ ((aligned))\r
-    #define CY_CFG_UNUSED __attribute__ ((unused))\r
-    #define CY_CFG_SECTION __attribute__ ((section(".psocinit")))\r
-    \r
-    #if defined(__ARMCC_VERSION)\r
-        #define CY_CFG_MEMORY_BARRIER() __memory_changed()\r
-    #else\r
-        #define CY_CFG_MEMORY_BARRIER() __sync_synchronize()\r
-    #endif\r
-    \r
-#elif defined(__ICCARM__)\r
-    #include <intrinsics.h>\r
-\r
-    #define CYPACKED __packed\r
-    #define CYPACKED_ATTR \r
-    #define CYALIGNED _Pragma("data_alignment=4")\r
-    #define CY_CFG_UNUSED _Pragma("diag_suppress=Pe177")\r
-    #define CY_CFG_SECTION _Pragma("location=\".psocinit\"")\r
-    \r
-    #define CY_CFG_MEMORY_BARRIER() __DMB()\r
-    \r
-#else\r
-    #error Unsupported toolchain\r
-#endif\r
-\r
-\r
-CY_CFG_UNUSED\r
-static void CYMEMZERO(void *s, size_t n);\r
-CY_CFG_UNUSED\r
-static void CYMEMZERO(void *s, size_t n)\r
-{\r
-       (void)memset(s, 0, n);\r
-}\r
-CY_CFG_UNUSED\r
-static void CYCONFIGCPY(void *dest, const void *src, size_t n);\r
-CY_CFG_UNUSED\r
-static void CYCONFIGCPY(void *dest, const void *src, size_t n)\r
-{\r
-       (void)memcpy(dest, src, n);\r
-}\r
-CY_CFG_UNUSED\r
-static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n);\r
-CY_CFG_UNUSED\r
-static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)\r
-{\r
-       (void)memcpy(dest, src, n);\r
-}\r
-\r
-\r
-\r
-/* Clock startup error codes                                                   */\r
-#define CYCLOCKSTART_NO_ERROR    0u\r
-#define CYCLOCKSTART_XTAL_ERROR  1u\r
-#define CYCLOCKSTART_32KHZ_ERROR 2u\r
-#define CYCLOCKSTART_PLL_ERROR   3u\r
-\r
-#ifdef CY_NEED_CYCLOCKSTARTUPERROR\r
-/*******************************************************************************\r
-* Function Name: CyClockStartupError\r
-********************************************************************************\r
-* Summary:\r
-*  If an error is encountered during clock configuration (crystal startup error,\r
-*  PLL lock error, etc.), the system will end up here.  Unless reimplemented by\r
-*  the customer, this function will stop in an infinite loop.\r
-*\r
-* Parameters:\r
-*   void\r
-*\r
-* Return:\r
-*   void\r
-*\r
-*******************************************************************************/\r
-CY_CFG_UNUSED\r
-static void CyClockStartupError(uint8 errorCode);\r
-CY_CFG_UNUSED\r
-static void CyClockStartupError(uint8 errorCode)\r
-{\r
-    /* To remove the compiler warning if errorCode not used.                */\r
-    errorCode = errorCode;\r
-\r
-    /* `#START CyClockStartupError` */\r
-\r
-    /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */\r
-    /* we will end up here to allow the customer to implement something to  */\r
-    /* deal with the clock condition.                                       */\r
-\r
-    /* `#END` */\r
-\r
-    /* If nothing else, stop here since the clocks have not started         */\r
-    /* correctly.                                                           */\r
-    while(1) {}\r
-}\r
-#endif\r
-\r
-#define CY_CFG_BASE_ADDR_COUNT 12u\r
-CYPACKED typedef struct\r
-{\r
-       uint8 offset;\r
-       uint8 value;\r
-} CYPACKED_ATTR cy_cfg_addrvalue_t;\r
-\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: cfg_write_bytes32\r
-********************************************************************************\r
-* Summary:\r
-*  This function is used for setting up the chip configuration areas that\r
-*  contain relatively sparse data.\r
-*\r
-* Parameters:\r
-*   void\r
-*\r
-* Return:\r
-*   void\r
-*\r
-*******************************************************************************/\r
-static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[]);\r
-static void cfg_write_bytes32(const uint32 addr_table[], const cy_cfg_addrvalue_t data_table[])\r
-{\r
-       /* For 32-bit little-endian architectures */\r
-       uint32 i, j = 0u;\r
-       for (i = 0u; i < CY_CFG_BASE_ADDR_COUNT; i++)\r
-       {\r
-               uint32 baseAddr = addr_table[i];\r
-               uint8 count = (uint8)baseAddr;\r
-               baseAddr &= 0xFFFFFF00u;\r
-               while (count != 0u)\r
-               {\r
-                       CY_SET_XTND_REG8((void CYFAR *)(baseAddr + data_table[j].offset), data_table[j].value);\r
-                       j++;\r
-                       count--;\r
-               }\r
-       }\r
-}\r
-\r
-/*******************************************************************************\r
-* Function Name: ClockSetup\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Performs the initialization of all of the clocks in the device based on the\r
-*  settings in the Clock tab of the DWR.  This includes enabling the requested\r
-*  clocks and setting the necessary dividers to produce the desired frequency. \r
-*\r
-* Parameters:\r
-*  void\r
-*\r
-* Return:\r
-*  void\r
-*\r
-*******************************************************************************/\r
-static void ClockSetup(void);\r
-static void ClockSetup(void)\r
-{\r
-       uint32 timeout;\r
-       uint8 pllLock;\r
-\r
-\r
-       /* Configure ILO based on settings from Clock DWR */\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_SLOWCLK_ILO_CR0), 0x06u);\r
-\r
-       /* Configure IMO based on settings from Clock DWR */\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_FASTCLK_IMO_CR), 0x52u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_IMO_TR1), (CY_GET_XTND_REG8((void CYFAR *)CYREG_FLSHID_CUST_TABLES_IMO_USB)));\r
-\r
-       /* Configure PLL based on settings from Clock DWR */\r
-       CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_P), 0x0818u);\r
-       CY_SET_XTND_REG16((void CYFAR *)(CYREG_FASTCLK_PLL_CFG0), 0x1251u);\r
-       /* Wait up to 250us for the PLL to lock */\r
-       pllLock = 0u;\r
-       for (timeout = 250u / 10u; (timeout > 0u) && (pllLock != 0x03u); timeout--)\r
-       { \r
-               pllLock = 0x03u & ((uint8)((uint8)pllLock << 1) | ((CY_GET_XTND_REG8((void CYFAR *)CYREG_FASTCLK_PLL_SR) & 0x01u) >> 0));\r
-               CyDelayCycles(10u * 48u); /* Delay 10us based on 48MHz clock */\r
-       }\r
-       /* If we ran out of time the PLL didn't lock so go to the error function */\r
-       if (timeout == 0u)\r
-       {\r
-               CyClockStartupError(CYCLOCKSTART_PLL_ERROR);\r
-       }\r
-\r
-       /* Configure Bus/Master Clock based on settings from Clock DWR */\r
-       CY_SET_XTND_REG16((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x0100u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x07u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG0), 0x00u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_BCFG2), 0x48u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_MSTR0), 0x00u);\r
-\r
-       /* Configure USB Clock based on settings from Clock DWR */\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_UCFG), 0x00u);\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CLKDIST_LD), 0x02u);\r
-}\r
-\r
-\r
-/* Analog API Functions */\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: AnalogSetDefault\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets up the analog portions of the chip to default values based on chip\r
-*  configuration options from the project.\r
-*\r
-* Parameters:\r
-*  void\r
-*\r
-* Return:\r
-*  void\r
-*\r
-*******************************************************************************/\r
-static void AnalogSetDefault(void);\r
-static void AnalogSetDefault(void)\r
-{\r
-       uint8 bg_xover_inl_trim = CY_GET_XTND_REG8((void CYFAR *)(CYREG_FLSHID_MFG_CFG_BG_XOVER_INL_TRIM + 1u));\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT0), (bg_xover_inl_trim & 0x07u));\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_BG_DFT1), ((bg_xover_inl_trim >> 4) & 0x0Fu));\r
-       CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, 0x44u);\r
-}\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: SetAnalogRoutingPumps\r
-********************************************************************************\r
-*\r
-* Summary:\r
-* Enables or disables the analog pumps feeding analog routing switches.\r
-* Intended to be called at startup, based on the Vdda system configuration;\r
-* may be called during operation when the user informs us that the Vdda voltage\r
-* crossed the pump threshold.\r
-*\r
-* Parameters:\r
-*  enabled - 1 to enable the pumps, 0 to disable the pumps\r
-*\r
-* Return:\r
-*  void\r
-*\r
-*******************************************************************************/\r
-void SetAnalogRoutingPumps(uint8 enabled)\r
-{\r
-       uint8 regValue = CY_GET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0);\r
-       if (enabled != 0u)\r
-       {\r
-               regValue |= 0x00u;\r
-       }\r
-       else\r
-       {\r
-               regValue &= (uint8)~0x00u;\r
-       }\r
-       CY_SET_XTND_REG8((void CYFAR *)CYREG_PUMP_CR0, regValue);\r
-}\r
-\r
-#define CY_AMUX_UNUSED CYREG_BOOST_SR\r
-\r
-\r
-/*******************************************************************************\r
-* Function Name: cyfitter_cfg\r
-********************************************************************************\r
-* Summary:\r
-*  This function is called by the start-up code for the selected device. It\r
-*  performs all of the necessary device configuration based on the design\r
-*  settings.  This includes settings from the Design Wide Resources (DWR) such\r
-*  as Clocks and Pins as well as any component configuration that is necessary.\r
-*\r
-* Parameters:  \r
-*   void\r
-*\r
-* Return:\r
-*   void\r
-*\r
-*******************************************************************************/\r
-\r
-void cyfitter_cfg(void)\r
-{\r
-       /* IOPINS0_0 Address: CYREG_PRT0_DM0 Size (bytes): 8 */\r
-       static const uint8 CYCODE BS_IOPINS0_0_VAL[] = {\r
-               0x00u, 0xFFu, 0xFFu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
-\r
-       /* IOPINS0_8 Address: CYREG_PRT15_DR Size (bytes): 10 */\r
-       static const uint8 CYCODE BS_IOPINS0_8_VAL[] = {\r
-               0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0xC0u, 0x00u};\r
-\r
-       /* IOPINS0_3 Address: CYREG_PRT3_DM0 Size (bytes): 8 */\r
-       static const uint8 CYCODE BS_IOPINS0_3_VAL[] = {\r
-               0x00u, 0x3Eu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
-\r
-       /* IOPINS0_4 Address: CYREG_PRT4_DM0 Size (bytes): 8 */\r
-       static const uint8 CYCODE BS_IOPINS0_4_VAL[] = {\r
-               0x00u, 0xFCu, 0xFCu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
-\r
-       /* IOPINS0_6 Address: CYREG_PRT6_DM0 Size (bytes): 8 */\r
-       static const uint8 CYCODE BS_IOPINS0_6_VAL[] = {\r
-               0x00u, 0x0Fu, 0x0Fu, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u};\r
-\r
-#ifdef CYGlobalIntDisable\r
-       /* Disable interrupts by default. Let user enable if/when they want. */\r
-       CYGlobalIntDisable\r
-#endif\r
-\r
-\r
-       /* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */\r
-       CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));\r
-       /* Setup clocks based on selections from Clock DWR */\r
-       ClockSetup();\r
-       /* Enable/Disable Debug functionality based on settings from System DWR */\r
-       CY_SET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG, (CY_GET_XTND_REG8((void CYFAR *)CYREG_MLOGIC_DEBUG) | 0x04u));\r
-\r
-       {\r
-               static const uint32 CYCODE cy_cfg_addr_table[] = {\r
-                       0x40004501u, /* Base address: 0x40004500 Count: 1 */\r
-                       0x40005202u, /* Base address: 0x40005200 Count: 2 */\r
-                       0x40011701u, /* Base address: 0x40011700 Count: 1 */\r
-                       0x40011901u, /* Base address: 0x40011900 Count: 1 */\r
-                       0x40014003u, /* Base address: 0x40014000 Count: 3 */\r
-                       0x40014102u, /* Base address: 0x40014100 Count: 2 */\r
-                       0x40014202u, /* Base address: 0x40014200 Count: 2 */\r
-                       0x40014302u, /* Base address: 0x40014300 Count: 2 */\r
-                       0x40014703u, /* Base address: 0x40014700 Count: 3 */\r
-                       0x40014803u, /* Base address: 0x40014800 Count: 3 */\r
-                       0x40014C02u, /* Base address: 0x40014C00 Count: 2 */\r
-                       0x40015101u, /* Base address: 0x40015100 Count: 1 */\r
-               };\r
-\r
-               static const cy_cfg_addrvalue_t CYCODE cy_cfg_data_table[] = {\r
-                       {0x7Eu, 0x02u},\r
-                       {0x1Cu, 0x3Eu},\r
-                       {0x7Cu, 0x40u},\r
-                       {0xEEu, 0x0Au},\r
-                       {0xEEu, 0x0Au},\r
-                       {0x33u, 0x80u},\r
-                       {0x36u, 0x40u},\r
-                       {0xCCu, 0x30u},\r
-                       {0xA6u, 0x40u},\r
-                       {0xA7u, 0x80u},\r
-                       {0xA6u, 0x40u},\r
-                       {0xA7u, 0x80u},\r
-                       {0xA6u, 0x40u},\r
-                       {0xA7u, 0x80u},\r
-                       {0x08u, 0x08u},\r
-                       {0x0Fu, 0x40u},\r
-                       {0xC2u, 0x0Cu},\r
-                       {0xAEu, 0x40u},\r
-                       {0xAFu, 0x80u},\r
-                       {0xEEu, 0x50u},\r
-                       {0xACu, 0x08u},\r
-                       {0xAFu, 0x40u},\r
-                       {0x00u, 0x0Au},\r
-               };\r
-\r
-\r
-\r
-               CYPACKED typedef struct {\r
-                       void CYFAR *address;\r
-                       uint16 size;\r
-               } CYPACKED_ATTR cfg_memset_t;\r
-\r
-               static const cfg_memset_t CYCODE cfg_memset_list [] = {\r
-                       /* address, size */\r
-                       {(void CYFAR *)(CYREG_PRT1_DR), 32u},\r
-                       {(void CYFAR *)(CYREG_PRT5_DR), 16u},\r
-                       {(void CYFAR *)(CYREG_PRT12_DR), 16u},\r
-                       {(void CYFAR *)(CYDEV_UCFG_B0_P0_U0_BASE), 4096u},\r
-                       {(void CYFAR *)(CYDEV_UCFG_B1_P2_U0_BASE), 2048u},\r
-                       {(void CYFAR *)(CYDEV_UCFG_DSI0_BASE), 2560u},\r
-                       {(void CYFAR *)(CYDEV_UCFG_DSI12_BASE), 512u},\r
-                       {(void CYFAR *)(CYREG_BCTL0_MDCLK_EN), 32u},\r
-               };\r
-\r
-               uint8 CYDATA i;\r
-\r
-               /* Zero out critical memory blocks before beginning configuration */\r
-               for (i = 0u; i < (sizeof(cfg_memset_list)/sizeof(cfg_memset_list[0])); i++)\r
-               {\r
-                       const cfg_memset_t CYCODE * CYDATA ms = &cfg_memset_list[i];\r
-                       CYMEMZERO(ms->address, (uint32)(ms->size));\r
-               }\r
-\r
-               cfg_write_bytes32(cy_cfg_addr_table, cy_cfg_data_table);\r
-\r
-               /* Enable digital routing */\r
-               CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL0_BANK_CTL) | 0x02u);\r
-               CY_SET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL, CY_GET_XTND_REG8((void CYFAR *)CYREG_BCTL1_BANK_CTL) | 0x02u);\r
-\r
-               /* Enable UDB array */\r
-               CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_ACT_CFG0) | 0x40u);\r
-               CY_SET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2, CY_GET_XTND_REG8((void CYFAR *)CYREG_PM_AVAIL_CR2) | 0x10u);\r
-       }\r
-\r
-       /* Perform second pass device configuration. These items must be configured in specific order after the regular configuration is done. */\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT0_DM0), (const void CYCODE *)(BS_IOPINS0_0_VAL), 8u);\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT15_DR), (const void CYCODE *)(BS_IOPINS0_8_VAL), 10u);\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT3_DM0), (const void CYCODE *)(BS_IOPINS0_3_VAL), 8u);\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT4_DM0), (const void CYCODE *)(BS_IOPINS0_4_VAL), 8u);\r
-       CYCONFIGCPYCODE((void CYFAR *)(CYREG_PRT6_DM0), (const void CYCODE *)(BS_IOPINS0_6_VAL), 8u);\r
-\r
-       /* Switch Boost to the precision bandgap reference from its internal reference */\r
-       CY_SET_REG8((void CYXDATA *)CYREG_BOOST_CR2, (CY_GET_REG8((void CYXDATA *)CYREG_BOOST_CR2) | 0x08u));\r
-\r
-       /* Perform basic analog initialization to defaults */\r
-       AnalogSetDefault();\r
-\r
-       /* Configure alternate active mode */\r
-       CYCONFIGCPY((void CYFAR *)CYDEV_PM_STBY_BASE, (const void CYFAR *)CYDEV_PM_ACT_BASE, 14u);\r
-}\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.h
deleted file mode 100755 (executable)
index 9481fd3..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitter_cfg.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cyfitter_cfg.h\r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* Description:\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2012, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-#ifndef CYFITTER_CFG_H\r
-#define CYFITTER_CFG_H\r
-\r
-#include <cytypes.h>\r
-\r
-extern void cyfitter_cfg(void);\r
-\r
-/* Analog Set/Unset methods */\r
-extern void SetAnalogRoutingPumps(uint8 enabled);\r
-\r
-\r
-#endif /* CYFITTER_CFG_H */\r
-\r
-/*[]*/\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfittergnu.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfittergnu.inc
deleted file mode 100755 (executable)
index e370ffa..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfittergnu.inc
+++ /dev/null
@@ -1,1402 +0,0 @@
-.ifndef INCLUDED_CYFITTERGNU_INC\r
-.set INCLUDED_CYFITTERGNU_INC, 1\r
-.include "cydevicegnu.inc"\r
-.include "cydevicegnu_trm.inc"\r
-\r
-/* USBFS_bus_reset */\r
-.set USBFS_bus_reset__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_bus_reset__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_bus_reset__INTC_MASK, 0x800000\r
-.set USBFS_bus_reset__INTC_NUMBER, 23\r
-.set USBFS_bus_reset__INTC_PRIOR_NUM, 7\r
-.set USBFS_bus_reset__INTC_PRIOR_REG, CYREG_NVIC_PRI_23\r
-.set USBFS_bus_reset__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_bus_reset__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_arb_int */\r
-.set USBFS_arb_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_arb_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_arb_int__INTC_MASK, 0x400000\r
-.set USBFS_arb_int__INTC_NUMBER, 22\r
-.set USBFS_arb_int__INTC_PRIOR_NUM, 7\r
-.set USBFS_arb_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_22\r
-.set USBFS_arb_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_arb_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_sof_int */\r
-.set USBFS_sof_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_sof_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_sof_int__INTC_MASK, 0x200000\r
-.set USBFS_sof_int__INTC_NUMBER, 21\r
-.set USBFS_sof_int__INTC_PRIOR_NUM, 7\r
-.set USBFS_sof_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_21\r
-.set USBFS_sof_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_sof_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_Out_DBx */\r
-.set SCSI_Out_DBx__0__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__0__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__0__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__0__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__0__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__0__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__0__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__0__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__0__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__0__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__0__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__0__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__0__MASK, 0x08\r
-.set SCSI_Out_DBx__0__PC, CYREG_PRT6_PC3\r
-.set SCSI_Out_DBx__0__PORT, 6\r
-.set SCSI_Out_DBx__0__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__0__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__0__SHIFT, 3\r
-.set SCSI_Out_DBx__0__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__1__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__1__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__1__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__1__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__1__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__1__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__1__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__1__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__1__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__1__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__1__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__1__MASK, 0x04\r
-.set SCSI_Out_DBx__1__PC, CYREG_PRT6_PC2\r
-.set SCSI_Out_DBx__1__PORT, 6\r
-.set SCSI_Out_DBx__1__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__1__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__1__SHIFT, 2\r
-.set SCSI_Out_DBx__1__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__2__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__2__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__2__MASK, 0x02\r
-.set SCSI_Out_DBx__2__PC, CYREG_PRT6_PC1\r
-.set SCSI_Out_DBx__2__PORT, 6\r
-.set SCSI_Out_DBx__2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__2__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__2__SHIFT, 1\r
-.set SCSI_Out_DBx__2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__3__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__3__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__3__MASK, 0x01\r
-.set SCSI_Out_DBx__3__PC, CYREG_PRT6_PC0\r
-.set SCSI_Out_DBx__3__PORT, 6\r
-.set SCSI_Out_DBx__3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__3__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__3__SHIFT, 0\r
-.set SCSI_Out_DBx__3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__4__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__4__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__4__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__4__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__4__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__4__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__4__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__4__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__4__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__4__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__4__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__4__MASK, 0x80\r
-.set SCSI_Out_DBx__4__PC, CYREG_PRT4_PC7\r
-.set SCSI_Out_DBx__4__PORT, 4\r
-.set SCSI_Out_DBx__4__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__4__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__4__SHIFT, 7\r
-.set SCSI_Out_DBx__4__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__5__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__5__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__5__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__5__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__5__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__5__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__5__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__5__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__5__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__5__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__5__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__5__MASK, 0x40\r
-.set SCSI_Out_DBx__5__PC, CYREG_PRT4_PC6\r
-.set SCSI_Out_DBx__5__PORT, 4\r
-.set SCSI_Out_DBx__5__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__5__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__5__SHIFT, 6\r
-.set SCSI_Out_DBx__5__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__6__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__6__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__6__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__6__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__6__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__6__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__6__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__6__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__6__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__6__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__6__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__6__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__6__MASK, 0x20\r
-.set SCSI_Out_DBx__6__PC, CYREG_PRT4_PC5\r
-.set SCSI_Out_DBx__6__PORT, 4\r
-.set SCSI_Out_DBx__6__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__6__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__6__SHIFT, 5\r
-.set SCSI_Out_DBx__6__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__7__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__7__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__7__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__7__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__7__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__7__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__7__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__7__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__7__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__7__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__7__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__7__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__7__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__7__MASK, 0x10\r
-.set SCSI_Out_DBx__7__PC, CYREG_PRT4_PC4\r
-.set SCSI_Out_DBx__7__PORT, 4\r
-.set SCSI_Out_DBx__7__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__7__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__7__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__7__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__7__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__7__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__7__SHIFT, 4\r
-.set SCSI_Out_DBx__7__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__DB0__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB0__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB0__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB0__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB0__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB0__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB0__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB0__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB0__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB0__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB0__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB0__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB0__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB0__MASK, 0x08\r
-.set SCSI_Out_DBx__DB0__PC, CYREG_PRT6_PC3\r
-.set SCSI_Out_DBx__DB0__PORT, 6\r
-.set SCSI_Out_DBx__DB0__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB0__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB0__SHIFT, 3\r
-.set SCSI_Out_DBx__DB0__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB1__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB1__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB1__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB1__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB1__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB1__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB1__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB1__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB1__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB1__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB1__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB1__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB1__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB1__MASK, 0x04\r
-.set SCSI_Out_DBx__DB1__PC, CYREG_PRT6_PC2\r
-.set SCSI_Out_DBx__DB1__PORT, 6\r
-.set SCSI_Out_DBx__DB1__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB1__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB1__SHIFT, 2\r
-.set SCSI_Out_DBx__DB1__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB2__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB2__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB2__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB2__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB2__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB2__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB2__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB2__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB2__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB2__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB2__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB2__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB2__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB2__MASK, 0x02\r
-.set SCSI_Out_DBx__DB2__PC, CYREG_PRT6_PC1\r
-.set SCSI_Out_DBx__DB2__PORT, 6\r
-.set SCSI_Out_DBx__DB2__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB2__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB2__SHIFT, 1\r
-.set SCSI_Out_DBx__DB2__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB3__AG, CYREG_PRT6_AG\r
-.set SCSI_Out_DBx__DB3__AMUX, CYREG_PRT6_AMUX\r
-.set SCSI_Out_DBx__DB3__BIE, CYREG_PRT6_BIE\r
-.set SCSI_Out_DBx__DB3__BIT_MASK, CYREG_PRT6_BIT_MASK\r
-.set SCSI_Out_DBx__DB3__BYP, CYREG_PRT6_BYP\r
-.set SCSI_Out_DBx__DB3__CTL, CYREG_PRT6_CTL\r
-.set SCSI_Out_DBx__DB3__DM0, CYREG_PRT6_DM0\r
-.set SCSI_Out_DBx__DB3__DM1, CYREG_PRT6_DM1\r
-.set SCSI_Out_DBx__DB3__DM2, CYREG_PRT6_DM2\r
-.set SCSI_Out_DBx__DB3__DR, CYREG_PRT6_DR\r
-.set SCSI_Out_DBx__DB3__INP_DIS, CYREG_PRT6_INP_DIS\r
-.set SCSI_Out_DBx__DB3__LCD_COM_SEG, CYREG_PRT6_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB3__LCD_EN, CYREG_PRT6_LCD_EN\r
-.set SCSI_Out_DBx__DB3__MASK, 0x01\r
-.set SCSI_Out_DBx__DB3__PC, CYREG_PRT6_PC0\r
-.set SCSI_Out_DBx__DB3__PORT, 6\r
-.set SCSI_Out_DBx__DB3__PRT, CYREG_PRT6_PRT\r
-.set SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL, CYREG_PRT6_CAPS_SEL\r
-.set SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN, CYREG_PRT6_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0, CYREG_PRT6_OE_SEL0\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1, CYREG_PRT6_OE_SEL1\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0, CYREG_PRT6_OUT_SEL0\r
-.set SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1, CYREG_PRT6_OUT_SEL1\r
-.set SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT, CYREG_PRT6_SYNC_OUT\r
-.set SCSI_Out_DBx__DB3__PS, CYREG_PRT6_PS\r
-.set SCSI_Out_DBx__DB3__SHIFT, 0\r
-.set SCSI_Out_DBx__DB3__SLW, CYREG_PRT6_SLW\r
-.set SCSI_Out_DBx__DB4__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__DB4__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__DB4__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__DB4__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__DB4__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__DB4__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__DB4__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__DB4__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__DB4__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__DB4__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__DB4__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__DB4__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB4__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__DB4__MASK, 0x80\r
-.set SCSI_Out_DBx__DB4__PC, CYREG_PRT4_PC7\r
-.set SCSI_Out_DBx__DB4__PORT, 4\r
-.set SCSI_Out_DBx__DB4__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__DB4__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__DB4__SHIFT, 7\r
-.set SCSI_Out_DBx__DB4__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__DB5__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__DB5__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__DB5__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__DB5__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__DB5__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__DB5__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__DB5__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__DB5__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__DB5__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__DB5__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__DB5__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__DB5__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB5__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__DB5__MASK, 0x40\r
-.set SCSI_Out_DBx__DB5__PC, CYREG_PRT4_PC6\r
-.set SCSI_Out_DBx__DB5__PORT, 4\r
-.set SCSI_Out_DBx__DB5__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__DB5__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__DB5__SHIFT, 6\r
-.set SCSI_Out_DBx__DB5__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__DB6__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__DB6__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__DB6__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__DB6__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__DB6__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__DB6__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__DB6__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__DB6__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__DB6__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__DB6__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__DB6__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__DB6__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB6__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__DB6__MASK, 0x20\r
-.set SCSI_Out_DBx__DB6__PC, CYREG_PRT4_PC5\r
-.set SCSI_Out_DBx__DB6__PORT, 4\r
-.set SCSI_Out_DBx__DB6__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__DB6__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__DB6__SHIFT, 5\r
-.set SCSI_Out_DBx__DB6__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out_DBx__DB7__AG, CYREG_PRT4_AG\r
-.set SCSI_Out_DBx__DB7__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out_DBx__DB7__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out_DBx__DB7__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out_DBx__DB7__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out_DBx__DB7__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out_DBx__DB7__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out_DBx__DB7__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out_DBx__DB7__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out_DBx__DB7__DR, CYREG_PRT4_DR\r
-.set SCSI_Out_DBx__DB7__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out_DBx__DB7__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out_DBx__DB7__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out_DBx__DB7__MASK, 0x10\r
-.set SCSI_Out_DBx__DB7__PC, CYREG_PRT4_PC4\r
-.set SCSI_Out_DBx__DB7__PORT, 4\r
-.set SCSI_Out_DBx__DB7__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out_DBx__DB7__PS, CYREG_PRT4_PS\r
-.set SCSI_Out_DBx__DB7__SHIFT, 4\r
-.set SCSI_Out_DBx__DB7__SLW, CYREG_PRT4_SLW\r
-\r
-/* USBFS_dp_int */\r
-.set USBFS_dp_int__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_dp_int__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_dp_int__INTC_MASK, 0x1000\r
-.set USBFS_dp_int__INTC_NUMBER, 12\r
-.set USBFS_dp_int__INTC_PRIOR_NUM, 7\r
-.set USBFS_dp_int__INTC_PRIOR_REG, CYREG_NVIC_PRI_12\r
-.set USBFS_dp_int__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_dp_int__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_0 */\r
-.set USBFS_ep_0__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_ep_0__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_ep_0__INTC_MASK, 0x1000000\r
-.set USBFS_ep_0__INTC_NUMBER, 24\r
-.set USBFS_ep_0__INTC_PRIOR_NUM, 7\r
-.set USBFS_ep_0__INTC_PRIOR_REG, CYREG_NVIC_PRI_24\r
-.set USBFS_ep_0__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_ep_0__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_1 */\r
-.set USBFS_ep_1__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_ep_1__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_ep_1__INTC_MASK, 0x01\r
-.set USBFS_ep_1__INTC_NUMBER, 0\r
-.set USBFS_ep_1__INTC_PRIOR_NUM, 7\r
-.set USBFS_ep_1__INTC_PRIOR_REG, CYREG_NVIC_PRI_0\r
-.set USBFS_ep_1__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_ep_1__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_2 */\r
-.set USBFS_ep_2__INTC_CLR_EN_REG, CYREG_NVIC_CLRENA0\r
-.set USBFS_ep_2__INTC_CLR_PD_REG, CYREG_NVIC_CLRPEND0\r
-.set USBFS_ep_2__INTC_MASK, 0x02\r
-.set USBFS_ep_2__INTC_NUMBER, 1\r
-.set USBFS_ep_2__INTC_PRIOR_NUM, 7\r
-.set USBFS_ep_2__INTC_PRIOR_REG, CYREG_NVIC_PRI_1\r
-.set USBFS_ep_2__INTC_SET_EN_REG, CYREG_NVIC_SETENA0\r
-.set USBFS_ep_2__INTC_SET_PD_REG, CYREG_NVIC_SETPEND0\r
-\r
-/* SD_PULLUP */\r
-.set SD_PULLUP__0__MASK, 0x02\r
-.set SD_PULLUP__0__PC, CYREG_PRT3_PC1\r
-.set SD_PULLUP__0__PORT, 3\r
-.set SD_PULLUP__0__SHIFT, 1\r
-.set SD_PULLUP__1__MASK, 0x04\r
-.set SD_PULLUP__1__PC, CYREG_PRT3_PC2\r
-.set SD_PULLUP__1__PORT, 3\r
-.set SD_PULLUP__1__SHIFT, 2\r
-.set SD_PULLUP__2__MASK, 0x08\r
-.set SD_PULLUP__2__PC, CYREG_PRT3_PC3\r
-.set SD_PULLUP__2__PORT, 3\r
-.set SD_PULLUP__2__SHIFT, 3\r
-.set SD_PULLUP__3__MASK, 0x10\r
-.set SD_PULLUP__3__PC, CYREG_PRT3_PC4\r
-.set SD_PULLUP__3__PORT, 3\r
-.set SD_PULLUP__3__SHIFT, 4\r
-.set SD_PULLUP__4__MASK, 0x20\r
-.set SD_PULLUP__4__PC, CYREG_PRT3_PC5\r
-.set SD_PULLUP__4__PORT, 3\r
-.set SD_PULLUP__4__SHIFT, 5\r
-.set SD_PULLUP__AG, CYREG_PRT3_AG\r
-.set SD_PULLUP__AMUX, CYREG_PRT3_AMUX\r
-.set SD_PULLUP__BIE, CYREG_PRT3_BIE\r
-.set SD_PULLUP__BIT_MASK, CYREG_PRT3_BIT_MASK\r
-.set SD_PULLUP__BYP, CYREG_PRT3_BYP\r
-.set SD_PULLUP__CTL, CYREG_PRT3_CTL\r
-.set SD_PULLUP__DM0, CYREG_PRT3_DM0\r
-.set SD_PULLUP__DM1, CYREG_PRT3_DM1\r
-.set SD_PULLUP__DM2, CYREG_PRT3_DM2\r
-.set SD_PULLUP__DR, CYREG_PRT3_DR\r
-.set SD_PULLUP__INP_DIS, CYREG_PRT3_INP_DIS\r
-.set SD_PULLUP__LCD_COM_SEG, CYREG_PRT3_LCD_COM_SEG\r
-.set SD_PULLUP__LCD_EN, CYREG_PRT3_LCD_EN\r
-.set SD_PULLUP__MASK, 0x3E\r
-.set SD_PULLUP__PORT, 3\r
-.set SD_PULLUP__PRT, CYREG_PRT3_PRT\r
-.set SD_PULLUP__PRTDSI__CAPS_SEL, CYREG_PRT3_CAPS_SEL\r
-.set SD_PULLUP__PRTDSI__DBL_SYNC_IN, CYREG_PRT3_DBL_SYNC_IN\r
-.set SD_PULLUP__PRTDSI__OE_SEL0, CYREG_PRT3_OE_SEL0\r
-.set SD_PULLUP__PRTDSI__OE_SEL1, CYREG_PRT3_OE_SEL1\r
-.set SD_PULLUP__PRTDSI__OUT_SEL0, CYREG_PRT3_OUT_SEL0\r
-.set SD_PULLUP__PRTDSI__OUT_SEL1, CYREG_PRT3_OUT_SEL1\r
-.set SD_PULLUP__PRTDSI__SYNC_OUT, CYREG_PRT3_SYNC_OUT\r
-.set SD_PULLUP__PS, CYREG_PRT3_PS\r
-.set SD_PULLUP__SHIFT, 1\r
-.set SD_PULLUP__SLW, CYREG_PRT3_SLW\r
-\r
-/* USBFS_USB */\r
-.set USBFS_USB__ARB_CFG, CYREG_USB_ARB_CFG\r
-.set USBFS_USB__ARB_EP1_CFG, CYREG_USB_ARB_EP1_CFG\r
-.set USBFS_USB__ARB_EP1_INT_EN, CYREG_USB_ARB_EP1_INT_EN\r
-.set USBFS_USB__ARB_EP1_SR, CYREG_USB_ARB_EP1_SR\r
-.set USBFS_USB__ARB_EP2_CFG, CYREG_USB_ARB_EP2_CFG\r
-.set USBFS_USB__ARB_EP2_INT_EN, CYREG_USB_ARB_EP2_INT_EN\r
-.set USBFS_USB__ARB_EP2_SR, CYREG_USB_ARB_EP2_SR\r
-.set USBFS_USB__ARB_EP3_CFG, CYREG_USB_ARB_EP3_CFG\r
-.set USBFS_USB__ARB_EP3_INT_EN, CYREG_USB_ARB_EP3_INT_EN\r
-.set USBFS_USB__ARB_EP3_SR, CYREG_USB_ARB_EP3_SR\r
-.set USBFS_USB__ARB_EP4_CFG, CYREG_USB_ARB_EP4_CFG\r
-.set USBFS_USB__ARB_EP4_INT_EN, CYREG_USB_ARB_EP4_INT_EN\r
-.set USBFS_USB__ARB_EP4_SR, CYREG_USB_ARB_EP4_SR\r
-.set USBFS_USB__ARB_EP5_CFG, CYREG_USB_ARB_EP5_CFG\r
-.set USBFS_USB__ARB_EP5_INT_EN, CYREG_USB_ARB_EP5_INT_EN\r
-.set USBFS_USB__ARB_EP5_SR, CYREG_USB_ARB_EP5_SR\r
-.set USBFS_USB__ARB_EP6_CFG, CYREG_USB_ARB_EP6_CFG\r
-.set USBFS_USB__ARB_EP6_INT_EN, CYREG_USB_ARB_EP6_INT_EN\r
-.set USBFS_USB__ARB_EP6_SR, CYREG_USB_ARB_EP6_SR\r
-.set USBFS_USB__ARB_EP7_CFG, CYREG_USB_ARB_EP7_CFG\r
-.set USBFS_USB__ARB_EP7_INT_EN, CYREG_USB_ARB_EP7_INT_EN\r
-.set USBFS_USB__ARB_EP7_SR, CYREG_USB_ARB_EP7_SR\r
-.set USBFS_USB__ARB_EP8_CFG, CYREG_USB_ARB_EP8_CFG\r
-.set USBFS_USB__ARB_EP8_INT_EN, CYREG_USB_ARB_EP8_INT_EN\r
-.set USBFS_USB__ARB_EP8_SR, CYREG_USB_ARB_EP8_SR\r
-.set USBFS_USB__ARB_INT_EN, CYREG_USB_ARB_INT_EN\r
-.set USBFS_USB__ARB_INT_SR, CYREG_USB_ARB_INT_SR\r
-.set USBFS_USB__ARB_RW1_DR, CYREG_USB_ARB_RW1_DR\r
-.set USBFS_USB__ARB_RW1_RA, CYREG_USB_ARB_RW1_RA\r
-.set USBFS_USB__ARB_RW1_RA_MSB, CYREG_USB_ARB_RW1_RA_MSB\r
-.set USBFS_USB__ARB_RW1_WA, CYREG_USB_ARB_RW1_WA\r
-.set USBFS_USB__ARB_RW1_WA_MSB, CYREG_USB_ARB_RW1_WA_MSB\r
-.set USBFS_USB__ARB_RW2_DR, CYREG_USB_ARB_RW2_DR\r
-.set USBFS_USB__ARB_RW2_RA, CYREG_USB_ARB_RW2_RA\r
-.set USBFS_USB__ARB_RW2_RA_MSB, CYREG_USB_ARB_RW2_RA_MSB\r
-.set USBFS_USB__ARB_RW2_WA, CYREG_USB_ARB_RW2_WA\r
-.set USBFS_USB__ARB_RW2_WA_MSB, CYREG_USB_ARB_RW2_WA_MSB\r
-.set USBFS_USB__ARB_RW3_DR, CYREG_USB_ARB_RW3_DR\r
-.set USBFS_USB__ARB_RW3_RA, CYREG_USB_ARB_RW3_RA\r
-.set USBFS_USB__ARB_RW3_RA_MSB, CYREG_USB_ARB_RW3_RA_MSB\r
-.set USBFS_USB__ARB_RW3_WA, CYREG_USB_ARB_RW3_WA\r
-.set USBFS_USB__ARB_RW3_WA_MSB, CYREG_USB_ARB_RW3_WA_MSB\r
-.set USBFS_USB__ARB_RW4_DR, CYREG_USB_ARB_RW4_DR\r
-.set USBFS_USB__ARB_RW4_RA, CYREG_USB_ARB_RW4_RA\r
-.set USBFS_USB__ARB_RW4_RA_MSB, CYREG_USB_ARB_RW4_RA_MSB\r
-.set USBFS_USB__ARB_RW4_WA, CYREG_USB_ARB_RW4_WA\r
-.set USBFS_USB__ARB_RW4_WA_MSB, CYREG_USB_ARB_RW4_WA_MSB\r
-.set USBFS_USB__ARB_RW5_DR, CYREG_USB_ARB_RW5_DR\r
-.set USBFS_USB__ARB_RW5_RA, CYREG_USB_ARB_RW5_RA\r
-.set USBFS_USB__ARB_RW5_RA_MSB, CYREG_USB_ARB_RW5_RA_MSB\r
-.set USBFS_USB__ARB_RW5_WA, CYREG_USB_ARB_RW5_WA\r
-.set USBFS_USB__ARB_RW5_WA_MSB, CYREG_USB_ARB_RW5_WA_MSB\r
-.set USBFS_USB__ARB_RW6_DR, CYREG_USB_ARB_RW6_DR\r
-.set USBFS_USB__ARB_RW6_RA, CYREG_USB_ARB_RW6_RA\r
-.set USBFS_USB__ARB_RW6_RA_MSB, CYREG_USB_ARB_RW6_RA_MSB\r
-.set USBFS_USB__ARB_RW6_WA, CYREG_USB_ARB_RW6_WA\r
-.set USBFS_USB__ARB_RW6_WA_MSB, CYREG_USB_ARB_RW6_WA_MSB\r
-.set USBFS_USB__ARB_RW7_DR, CYREG_USB_ARB_RW7_DR\r
-.set USBFS_USB__ARB_RW7_RA, CYREG_USB_ARB_RW7_RA\r
-.set USBFS_USB__ARB_RW7_RA_MSB, CYREG_USB_ARB_RW7_RA_MSB\r
-.set USBFS_USB__ARB_RW7_WA, CYREG_USB_ARB_RW7_WA\r
-.set USBFS_USB__ARB_RW7_WA_MSB, CYREG_USB_ARB_RW7_WA_MSB\r
-.set USBFS_USB__ARB_RW8_DR, CYREG_USB_ARB_RW8_DR\r
-.set USBFS_USB__ARB_RW8_RA, CYREG_USB_ARB_RW8_RA\r
-.set USBFS_USB__ARB_RW8_RA_MSB, CYREG_USB_ARB_RW8_RA_MSB\r
-.set USBFS_USB__ARB_RW8_WA, CYREG_USB_ARB_RW8_WA\r
-.set USBFS_USB__ARB_RW8_WA_MSB, CYREG_USB_ARB_RW8_WA_MSB\r
-.set USBFS_USB__BUF_SIZE, CYREG_USB_BUF_SIZE\r
-.set USBFS_USB__BUS_RST_CNT, CYREG_USB_BUS_RST_CNT\r
-.set USBFS_USB__CR0, CYREG_USB_CR0\r
-.set USBFS_USB__CR1, CYREG_USB_CR1\r
-.set USBFS_USB__CWA, CYREG_USB_CWA\r
-.set USBFS_USB__CWA_MSB, CYREG_USB_CWA_MSB\r
-.set USBFS_USB__DMA_THRES, CYREG_USB_DMA_THRES\r
-.set USBFS_USB__DMA_THRES_MSB, CYREG_USB_DMA_THRES_MSB\r
-.set USBFS_USB__DYN_RECONFIG, CYREG_USB_DYN_RECONFIG\r
-.set USBFS_USB__EP0_CNT, CYREG_USB_EP0_CNT\r
-.set USBFS_USB__EP0_CR, CYREG_USB_EP0_CR\r
-.set USBFS_USB__EP0_DR0, CYREG_USB_EP0_DR0\r
-.set USBFS_USB__EP0_DR1, CYREG_USB_EP0_DR1\r
-.set USBFS_USB__EP0_DR2, CYREG_USB_EP0_DR2\r
-.set USBFS_USB__EP0_DR3, CYREG_USB_EP0_DR3\r
-.set USBFS_USB__EP0_DR4, CYREG_USB_EP0_DR4\r
-.set USBFS_USB__EP0_DR5, CYREG_USB_EP0_DR5\r
-.set USBFS_USB__EP0_DR6, CYREG_USB_EP0_DR6\r
-.set USBFS_USB__EP0_DR7, CYREG_USB_EP0_DR7\r
-.set USBFS_USB__EP_ACTIVE, CYREG_USB_EP_ACTIVE\r
-.set USBFS_USB__EP_TYPE, CYREG_USB_EP_TYPE\r
-.set USBFS_USB__MEM_DATA, CYREG_USB_MEM_DATA_MBASE\r
-.set USBFS_USB__PM_ACT_CFG, CYREG_PM_ACT_CFG5\r
-.set USBFS_USB__PM_ACT_MSK, 0x01\r
-.set USBFS_USB__PM_STBY_CFG, CYREG_PM_STBY_CFG5\r
-.set USBFS_USB__PM_STBY_MSK, 0x01\r
-.set USBFS_USB__SIE_EP1_CNT0, CYREG_USB_SIE_EP1_CNT0\r
-.set USBFS_USB__SIE_EP1_CNT1, CYREG_USB_SIE_EP1_CNT1\r
-.set USBFS_USB__SIE_EP1_CR0, CYREG_USB_SIE_EP1_CR0\r
-.set USBFS_USB__SIE_EP2_CNT0, CYREG_USB_SIE_EP2_CNT0\r
-.set USBFS_USB__SIE_EP2_CNT1, CYREG_USB_SIE_EP2_CNT1\r
-.set USBFS_USB__SIE_EP2_CR0, CYREG_USB_SIE_EP2_CR0\r
-.set USBFS_USB__SIE_EP3_CNT0, CYREG_USB_SIE_EP3_CNT0\r
-.set USBFS_USB__SIE_EP3_CNT1, CYREG_USB_SIE_EP3_CNT1\r
-.set USBFS_USB__SIE_EP3_CR0, CYREG_USB_SIE_EP3_CR0\r
-.set USBFS_USB__SIE_EP4_CNT0, CYREG_USB_SIE_EP4_CNT0\r
-.set USBFS_USB__SIE_EP4_CNT1, CYREG_USB_SIE_EP4_CNT1\r
-.set USBFS_USB__SIE_EP4_CR0, CYREG_USB_SIE_EP4_CR0\r
-.set USBFS_USB__SIE_EP5_CNT0, CYREG_USB_SIE_EP5_CNT0\r
-.set USBFS_USB__SIE_EP5_CNT1, CYREG_USB_SIE_EP5_CNT1\r
-.set USBFS_USB__SIE_EP5_CR0, CYREG_USB_SIE_EP5_CR0\r
-.set USBFS_USB__SIE_EP6_CNT0, CYREG_USB_SIE_EP6_CNT0\r
-.set USBFS_USB__SIE_EP6_CNT1, CYREG_USB_SIE_EP6_CNT1\r
-.set USBFS_USB__SIE_EP6_CR0, CYREG_USB_SIE_EP6_CR0\r
-.set USBFS_USB__SIE_EP7_CNT0, CYREG_USB_SIE_EP7_CNT0\r
-.set USBFS_USB__SIE_EP7_CNT1, CYREG_USB_SIE_EP7_CNT1\r
-.set USBFS_USB__SIE_EP7_CR0, CYREG_USB_SIE_EP7_CR0\r
-.set USBFS_USB__SIE_EP8_CNT0, CYREG_USB_SIE_EP8_CNT0\r
-.set USBFS_USB__SIE_EP8_CNT1, CYREG_USB_SIE_EP8_CNT1\r
-.set USBFS_USB__SIE_EP8_CR0, CYREG_USB_SIE_EP8_CR0\r
-.set USBFS_USB__SIE_EP_INT_EN, CYREG_USB_SIE_EP_INT_EN\r
-.set USBFS_USB__SIE_EP_INT_SR, CYREG_USB_SIE_EP_INT_SR\r
-.set USBFS_USB__SOF0, CYREG_USB_SOF0\r
-.set USBFS_USB__SOF1, CYREG_USB_SOF1\r
-.set USBFS_USB__USBIO_CR0, CYREG_USB_USBIO_CR0\r
-.set USBFS_USB__USBIO_CR1, CYREG_USB_USBIO_CR1\r
-.set USBFS_USB__USB_CLK_EN, CYREG_USB_USB_CLK_EN\r
-\r
-/* SCSI_Out */\r
-.set SCSI_Out__0__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__0__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__0__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__0__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__0__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__0__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__0__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__0__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__0__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__0__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__0__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__0__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__0__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__0__MASK, 0x08\r
-.set SCSI_Out__0__PC, CYREG_PRT4_PC3\r
-.set SCSI_Out__0__PORT, 4\r
-.set SCSI_Out__0__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__0__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__0__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__0__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__0__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__0__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__0__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__0__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__0__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__0__SHIFT, 3\r
-.set SCSI_Out__0__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__1__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__1__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__1__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__1__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__1__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__1__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__1__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__1__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__1__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__1__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__1__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__1__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__1__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__1__MASK, 0x04\r
-.set SCSI_Out__1__PC, CYREG_PRT4_PC2\r
-.set SCSI_Out__1__PORT, 4\r
-.set SCSI_Out__1__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__1__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__1__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__1__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__1__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__1__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__1__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__1__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__1__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__1__SHIFT, 2\r
-.set SCSI_Out__1__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__2__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__2__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__2__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__2__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__2__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__2__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__2__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__2__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__2__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__2__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__2__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__2__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__2__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__2__MASK, 0x80\r
-.set SCSI_Out__2__PC, CYREG_PRT0_PC7\r
-.set SCSI_Out__2__PORT, 0\r
-.set SCSI_Out__2__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__2__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__2__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__2__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__2__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__2__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__2__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__2__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__2__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__2__SHIFT, 7\r
-.set SCSI_Out__2__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__3__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__3__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__3__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__3__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__3__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__3__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__3__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__3__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__3__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__3__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__3__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__3__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__3__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__3__MASK, 0x40\r
-.set SCSI_Out__3__PC, CYREG_PRT0_PC6\r
-.set SCSI_Out__3__PORT, 0\r
-.set SCSI_Out__3__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__3__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__3__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__3__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__3__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__3__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__3__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__3__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__3__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__3__SHIFT, 6\r
-.set SCSI_Out__3__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__4__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__4__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__4__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__4__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__4__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__4__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__4__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__4__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__4__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__4__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__4__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__4__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__4__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__4__MASK, 0x20\r
-.set SCSI_Out__4__PC, CYREG_PRT0_PC5\r
-.set SCSI_Out__4__PORT, 0\r
-.set SCSI_Out__4__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__4__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__4__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__4__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__4__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__4__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__4__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__4__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__4__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__4__SHIFT, 5\r
-.set SCSI_Out__4__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__5__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__5__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__5__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__5__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__5__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__5__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__5__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__5__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__5__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__5__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__5__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__5__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__5__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__5__MASK, 0x10\r
-.set SCSI_Out__5__PC, CYREG_PRT0_PC4\r
-.set SCSI_Out__5__PORT, 0\r
-.set SCSI_Out__5__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__5__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__5__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__5__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__5__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__5__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__5__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__5__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__5__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__5__SHIFT, 4\r
-.set SCSI_Out__5__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__6__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__6__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__6__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__6__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__6__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__6__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__6__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__6__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__6__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__6__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__6__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__6__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__6__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__6__MASK, 0x08\r
-.set SCSI_Out__6__PC, CYREG_PRT0_PC3\r
-.set SCSI_Out__6__PORT, 0\r
-.set SCSI_Out__6__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__6__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__6__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__6__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__6__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__6__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__6__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__6__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__6__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__6__SHIFT, 3\r
-.set SCSI_Out__6__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__7__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__7__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__7__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__7__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__7__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__7__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__7__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__7__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__7__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__7__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__7__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__7__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__7__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__7__MASK, 0x04\r
-.set SCSI_Out__7__PC, CYREG_PRT0_PC2\r
-.set SCSI_Out__7__PORT, 0\r
-.set SCSI_Out__7__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__7__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__7__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__7__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__7__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__7__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__7__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__7__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__7__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__7__SHIFT, 2\r
-.set SCSI_Out__7__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__8__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__8__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__8__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__8__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__8__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__8__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__8__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__8__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__8__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__8__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__8__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__8__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__8__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__8__MASK, 0x02\r
-.set SCSI_Out__8__PC, CYREG_PRT0_PC1\r
-.set SCSI_Out__8__PORT, 0\r
-.set SCSI_Out__8__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__8__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__8__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__8__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__8__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__8__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__8__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__8__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__8__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__8__SHIFT, 1\r
-.set SCSI_Out__8__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__9__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__9__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__9__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__9__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__9__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__9__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__9__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__9__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__9__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__9__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__9__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__9__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__9__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__9__MASK, 0x01\r
-.set SCSI_Out__9__PC, CYREG_PRT0_PC0\r
-.set SCSI_Out__9__PORT, 0\r
-.set SCSI_Out__9__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__9__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__9__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__9__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__9__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__9__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__9__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__9__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__9__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__9__SHIFT, 0\r
-.set SCSI_Out__9__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__ACK__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__ACK__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__ACK__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__ACK__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__ACK__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__ACK__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__ACK__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__ACK__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__ACK__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__ACK__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__ACK__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__ACK__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__ACK__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__ACK__MASK, 0x40\r
-.set SCSI_Out__ACK__PC, CYREG_PRT0_PC6\r
-.set SCSI_Out__ACK__PORT, 0\r
-.set SCSI_Out__ACK__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__ACK__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__ACK__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__ACK__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__ACK__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__ACK__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__ACK__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__ACK__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__ACK__SHIFT, 6\r
-.set SCSI_Out__ACK__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__ATN__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__ATN__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__ATN__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__ATN__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__ATN__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__ATN__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__ATN__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__ATN__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__ATN__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__ATN__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__ATN__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__ATN__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__ATN__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__ATN__MASK, 0x04\r
-.set SCSI_Out__ATN__PC, CYREG_PRT4_PC2\r
-.set SCSI_Out__ATN__PORT, 4\r
-.set SCSI_Out__ATN__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__ATN__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__ATN__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__ATN__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__ATN__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__ATN__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__ATN__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__ATN__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__ATN__SHIFT, 2\r
-.set SCSI_Out__ATN__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__BSY__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__BSY__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__BSY__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__BSY__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__BSY__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__BSY__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__BSY__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__BSY__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__BSY__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__BSY__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__BSY__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__BSY__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__BSY__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__BSY__MASK, 0x80\r
-.set SCSI_Out__BSY__PC, CYREG_PRT0_PC7\r
-.set SCSI_Out__BSY__PORT, 0\r
-.set SCSI_Out__BSY__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__BSY__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__BSY__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__BSY__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__BSY__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__BSY__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__BSY__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__BSY__SHIFT, 7\r
-.set SCSI_Out__BSY__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__CD__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__CD__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__CD__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__CD__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__CD__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__CD__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__CD__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__CD__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__CD__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__CD__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__CD__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__CD__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__CD__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__CD__MASK, 0x04\r
-.set SCSI_Out__CD__PC, CYREG_PRT0_PC2\r
-.set SCSI_Out__CD__PORT, 0\r
-.set SCSI_Out__CD__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__CD__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__CD__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__CD__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__CD__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__CD__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__CD__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__CD__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__CD__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__CD__SHIFT, 2\r
-.set SCSI_Out__CD__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__DBP_raw__AG, CYREG_PRT4_AG\r
-.set SCSI_Out__DBP_raw__AMUX, CYREG_PRT4_AMUX\r
-.set SCSI_Out__DBP_raw__BIE, CYREG_PRT4_BIE\r
-.set SCSI_Out__DBP_raw__BIT_MASK, CYREG_PRT4_BIT_MASK\r
-.set SCSI_Out__DBP_raw__BYP, CYREG_PRT4_BYP\r
-.set SCSI_Out__DBP_raw__CTL, CYREG_PRT4_CTL\r
-.set SCSI_Out__DBP_raw__DM0, CYREG_PRT4_DM0\r
-.set SCSI_Out__DBP_raw__DM1, CYREG_PRT4_DM1\r
-.set SCSI_Out__DBP_raw__DM2, CYREG_PRT4_DM2\r
-.set SCSI_Out__DBP_raw__DR, CYREG_PRT4_DR\r
-.set SCSI_Out__DBP_raw__INP_DIS, CYREG_PRT4_INP_DIS\r
-.set SCSI_Out__DBP_raw__LCD_COM_SEG, CYREG_PRT4_LCD_COM_SEG\r
-.set SCSI_Out__DBP_raw__LCD_EN, CYREG_PRT4_LCD_EN\r
-.set SCSI_Out__DBP_raw__MASK, 0x08\r
-.set SCSI_Out__DBP_raw__PC, CYREG_PRT4_PC3\r
-.set SCSI_Out__DBP_raw__PORT, 4\r
-.set SCSI_Out__DBP_raw__PRT, CYREG_PRT4_PRT\r
-.set SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL, CYREG_PRT4_CAPS_SEL\r
-.set SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT4_DBL_SYNC_IN\r
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL0, CYREG_PRT4_OE_SEL0\r
-.set SCSI_Out__DBP_raw__PRTDSI__OE_SEL1, CYREG_PRT4_OE_SEL1\r
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0, CYREG_PRT4_OUT_SEL0\r
-.set SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1, CYREG_PRT4_OUT_SEL1\r
-.set SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT, CYREG_PRT4_SYNC_OUT\r
-.set SCSI_Out__DBP_raw__PS, CYREG_PRT4_PS\r
-.set SCSI_Out__DBP_raw__SHIFT, 3\r
-.set SCSI_Out__DBP_raw__SLW, CYREG_PRT4_SLW\r
-.set SCSI_Out__IO_raw__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__IO_raw__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__IO_raw__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__IO_raw__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__IO_raw__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__IO_raw__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__IO_raw__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__IO_raw__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__IO_raw__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__IO_raw__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__IO_raw__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__IO_raw__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__IO_raw__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__IO_raw__MASK, 0x01\r
-.set SCSI_Out__IO_raw__PC, CYREG_PRT0_PC0\r
-.set SCSI_Out__IO_raw__PORT, 0\r
-.set SCSI_Out__IO_raw__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__IO_raw__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__IO_raw__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__IO_raw__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__IO_raw__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__IO_raw__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__IO_raw__SHIFT, 0\r
-.set SCSI_Out__IO_raw__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__MSG__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__MSG__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__MSG__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__MSG__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__MSG__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__MSG__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__MSG__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__MSG__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__MSG__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__MSG__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__MSG__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__MSG__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__MSG__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__MSG__MASK, 0x10\r
-.set SCSI_Out__MSG__PC, CYREG_PRT0_PC4\r
-.set SCSI_Out__MSG__PORT, 0\r
-.set SCSI_Out__MSG__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__MSG__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__MSG__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__MSG__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__MSG__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__MSG__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__MSG__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__MSG__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__MSG__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__MSG__SHIFT, 4\r
-.set SCSI_Out__MSG__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__REQ__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__REQ__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__REQ__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__REQ__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__REQ__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__REQ__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__REQ__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__REQ__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__REQ__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__REQ__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__REQ__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__REQ__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__REQ__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__REQ__MASK, 0x02\r
-.set SCSI_Out__REQ__PC, CYREG_PRT0_PC1\r
-.set SCSI_Out__REQ__PORT, 0\r
-.set SCSI_Out__REQ__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__REQ__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__REQ__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__REQ__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__REQ__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__REQ__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__REQ__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__REQ__SHIFT, 1\r
-.set SCSI_Out__REQ__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__RST__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__RST__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__RST__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__RST__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__RST__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__RST__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__RST__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__RST__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__RST__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__RST__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__RST__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__RST__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__RST__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__RST__MASK, 0x20\r
-.set SCSI_Out__RST__PC, CYREG_PRT0_PC5\r
-.set SCSI_Out__RST__PORT, 0\r
-.set SCSI_Out__RST__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__RST__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__RST__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__RST__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__RST__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__RST__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__RST__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__RST__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__RST__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__RST__SHIFT, 5\r
-.set SCSI_Out__RST__SLW, CYREG_PRT0_SLW\r
-.set SCSI_Out__SEL__AG, CYREG_PRT0_AG\r
-.set SCSI_Out__SEL__AMUX, CYREG_PRT0_AMUX\r
-.set SCSI_Out__SEL__BIE, CYREG_PRT0_BIE\r
-.set SCSI_Out__SEL__BIT_MASK, CYREG_PRT0_BIT_MASK\r
-.set SCSI_Out__SEL__BYP, CYREG_PRT0_BYP\r
-.set SCSI_Out__SEL__CTL, CYREG_PRT0_CTL\r
-.set SCSI_Out__SEL__DM0, CYREG_PRT0_DM0\r
-.set SCSI_Out__SEL__DM1, CYREG_PRT0_DM1\r
-.set SCSI_Out__SEL__DM2, CYREG_PRT0_DM2\r
-.set SCSI_Out__SEL__DR, CYREG_PRT0_DR\r
-.set SCSI_Out__SEL__INP_DIS, CYREG_PRT0_INP_DIS\r
-.set SCSI_Out__SEL__LCD_COM_SEG, CYREG_PRT0_LCD_COM_SEG\r
-.set SCSI_Out__SEL__LCD_EN, CYREG_PRT0_LCD_EN\r
-.set SCSI_Out__SEL__MASK, 0x08\r
-.set SCSI_Out__SEL__PC, CYREG_PRT0_PC3\r
-.set SCSI_Out__SEL__PORT, 0\r
-.set SCSI_Out__SEL__PRT, CYREG_PRT0_PRT\r
-.set SCSI_Out__SEL__PRTDSI__CAPS_SEL, CYREG_PRT0_CAPS_SEL\r
-.set SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN, CYREG_PRT0_DBL_SYNC_IN\r
-.set SCSI_Out__SEL__PRTDSI__OE_SEL0, CYREG_PRT0_OE_SEL0\r
-.set SCSI_Out__SEL__PRTDSI__OE_SEL1, CYREG_PRT0_OE_SEL1\r
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL0, CYREG_PRT0_OUT_SEL0\r
-.set SCSI_Out__SEL__PRTDSI__OUT_SEL1, CYREG_PRT0_OUT_SEL1\r
-.set SCSI_Out__SEL__PRTDSI__SYNC_OUT, CYREG_PRT0_SYNC_OUT\r
-.set SCSI_Out__SEL__PS, CYREG_PRT0_PS\r
-.set SCSI_Out__SEL__SHIFT, 3\r
-.set SCSI_Out__SEL__SLW, CYREG_PRT0_SLW\r
-\r
-/* USBFS_Dm */\r
-.set USBFS_Dm__0__MASK, 0x80\r
-.set USBFS_Dm__0__PC, CYREG_IO_PC_PRT15_7_6_PC1\r
-.set USBFS_Dm__0__PORT, 15\r
-.set USBFS_Dm__0__SHIFT, 7\r
-.set USBFS_Dm__AG, CYREG_PRT15_AG\r
-.set USBFS_Dm__AMUX, CYREG_PRT15_AMUX\r
-.set USBFS_Dm__BIE, CYREG_PRT15_BIE\r
-.set USBFS_Dm__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set USBFS_Dm__BYP, CYREG_PRT15_BYP\r
-.set USBFS_Dm__CTL, CYREG_PRT15_CTL\r
-.set USBFS_Dm__DM0, CYREG_PRT15_DM0\r
-.set USBFS_Dm__DM1, CYREG_PRT15_DM1\r
-.set USBFS_Dm__DM2, CYREG_PRT15_DM2\r
-.set USBFS_Dm__DR, CYREG_PRT15_DR\r
-.set USBFS_Dm__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set USBFS_Dm__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set USBFS_Dm__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set USBFS_Dm__MASK, 0x80\r
-.set USBFS_Dm__PORT, 15\r
-.set USBFS_Dm__PRT, CYREG_PRT15_PRT\r
-.set USBFS_Dm__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set USBFS_Dm__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set USBFS_Dm__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set USBFS_Dm__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set USBFS_Dm__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set USBFS_Dm__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set USBFS_Dm__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set USBFS_Dm__PS, CYREG_PRT15_PS\r
-.set USBFS_Dm__SHIFT, 7\r
-.set USBFS_Dm__SLW, CYREG_PRT15_SLW\r
-\r
-/* USBFS_Dp */\r
-.set USBFS_Dp__0__MASK, 0x40\r
-.set USBFS_Dp__0__PC, CYREG_IO_PC_PRT15_7_6_PC0\r
-.set USBFS_Dp__0__PORT, 15\r
-.set USBFS_Dp__0__SHIFT, 6\r
-.set USBFS_Dp__AG, CYREG_PRT15_AG\r
-.set USBFS_Dp__AMUX, CYREG_PRT15_AMUX\r
-.set USBFS_Dp__BIE, CYREG_PRT15_BIE\r
-.set USBFS_Dp__BIT_MASK, CYREG_PRT15_BIT_MASK\r
-.set USBFS_Dp__BYP, CYREG_PRT15_BYP\r
-.set USBFS_Dp__CTL, CYREG_PRT15_CTL\r
-.set USBFS_Dp__DM0, CYREG_PRT15_DM0\r
-.set USBFS_Dp__DM1, CYREG_PRT15_DM1\r
-.set USBFS_Dp__DM2, CYREG_PRT15_DM2\r
-.set USBFS_Dp__DR, CYREG_PRT15_DR\r
-.set USBFS_Dp__INP_DIS, CYREG_PRT15_INP_DIS\r
-.set USBFS_Dp__INTSTAT, CYREG_PICU15_INTSTAT\r
-.set USBFS_Dp__LCD_COM_SEG, CYREG_PRT15_LCD_COM_SEG\r
-.set USBFS_Dp__LCD_EN, CYREG_PRT15_LCD_EN\r
-.set USBFS_Dp__MASK, 0x40\r
-.set USBFS_Dp__PORT, 15\r
-.set USBFS_Dp__PRT, CYREG_PRT15_PRT\r
-.set USBFS_Dp__PRTDSI__CAPS_SEL, CYREG_PRT15_CAPS_SEL\r
-.set USBFS_Dp__PRTDSI__DBL_SYNC_IN, CYREG_PRT15_DBL_SYNC_IN\r
-.set USBFS_Dp__PRTDSI__OE_SEL0, CYREG_PRT15_OE_SEL0\r
-.set USBFS_Dp__PRTDSI__OE_SEL1, CYREG_PRT15_OE_SEL1\r
-.set USBFS_Dp__PRTDSI__OUT_SEL0, CYREG_PRT15_OUT_SEL0\r
-.set USBFS_Dp__PRTDSI__OUT_SEL1, CYREG_PRT15_OUT_SEL1\r
-.set USBFS_Dp__PRTDSI__SYNC_OUT, CYREG_PRT15_SYNC_OUT\r
-.set USBFS_Dp__PS, CYREG_PRT15_PS\r
-.set USBFS_Dp__SHIFT, 6\r
-.set USBFS_Dp__SLW, CYREG_PRT15_SLW\r
-.set USBFS_Dp__SNAP, CYREG_PICU_15_SNAP_15\r
-\r
-/* Miscellaneous */\r
-/* -- WARNING: define names containing LEOPARD or PANTHER are deprecated and will be removed in a future release */\r
-.set CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO, 0\r
-.set CYDEV_DEBUGGING_DPS_SWD_SWV, 6\r
-.set CYDEV_CONFIG_UNUSED_IO_AllowButWarn, 0\r
-.set CYDEV_CONFIGURATION_MODE_COMPRESSED, 0\r
-.set CYDEV_CONFIG_FASTBOOT_ENABLED, 1\r
-.set CYDEV_CHIP_REV_PSOC5LP_PRODUCTION, 0\r
-.set CYDEV_CHIP_REVISION_5B_PRODUCTION, 0\r
-.set CYDEV_CHIP_MEMBER_5B, 4\r
-.set CYDEV_CHIP_FAMILY_PSOC5, 3\r
-.set CYDEV_CHIP_DIE_PSOC5LP, 4\r
-.set CYDEV_CHIP_DIE_EXPECT, CYDEV_CHIP_DIE_PSOC5LP\r
-.set CYDEV_BOOTLOADER_IO_COMP_USBFS, 1\r
-.set BCLK__BUS_CLK__HZ, 64000000\r
-.set BCLK__BUS_CLK__KHZ, 64000\r
-.set BCLK__BUS_CLK__MHZ, 64\r
-.set CYDEV_BOOTLOADER_APPLICATIONS, 1\r
-.set CYDEV_BOOTLOADER_CHECKSUM_BASIC, 0\r
-.set CYDEV_BOOTLOADER_CHECKSUM_CRC, 1\r
-.set CYDEV_BOOTLOADER_IO_COMP, CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-.set CYDEV_CHIP_DIE_ACTUAL, CYDEV_CHIP_DIE_EXPECT\r
-.set CYDEV_CHIP_DIE_LEOPARD, 1\r
-.set CYDEV_CHIP_DIE_PANTHER, 3\r
-.set CYDEV_CHIP_DIE_PSOC4A, 2\r
-.set CYDEV_CHIP_DIE_UNKNOWN, 0\r
-.set CYDEV_CHIP_FAMILY_PSOC3, 1\r
-.set CYDEV_CHIP_FAMILY_PSOC4, 2\r
-.set CYDEV_CHIP_FAMILY_UNKNOWN, 0\r
-.set CYDEV_CHIP_FAMILY_USED, CYDEV_CHIP_FAMILY_PSOC5\r
-.set CYDEV_CHIP_JTAG_ID, 0x2E133069\r
-.set CYDEV_CHIP_MEMBER_3A, 1\r
-.set CYDEV_CHIP_MEMBER_4A, 2\r
-.set CYDEV_CHIP_MEMBER_5A, 3\r
-.set CYDEV_CHIP_MEMBER_UNKNOWN, 0\r
-.set CYDEV_CHIP_MEMBER_USED, CYDEV_CHIP_MEMBER_5B\r
-.set CYDEV_CHIP_REVISION_3A_ES1, 0\r
-.set CYDEV_CHIP_REVISION_3A_ES2, 1\r
-.set CYDEV_CHIP_REVISION_3A_ES3, 3\r
-.set CYDEV_CHIP_REVISION_3A_PRODUCTION, 3\r
-.set CYDEV_CHIP_REVISION_4A_ES0, 17\r
-.set CYDEV_CHIP_REVISION_4A_PRODUCTION, 17\r
-.set CYDEV_CHIP_REVISION_5A_ES0, 0\r
-.set CYDEV_CHIP_REVISION_5A_ES1, 1\r
-.set CYDEV_CHIP_REVISION_5A_PRODUCTION, 1\r
-.set CYDEV_CHIP_REVISION_5B_ES0, 0\r
-.set CYDEV_CHIP_REVISION_USED, CYDEV_CHIP_REVISION_5B_PRODUCTION\r
-.set CYDEV_CHIP_REV_EXPECT, CYDEV_CHIP_REV_PSOC5LP_PRODUCTION\r
-.set CYDEV_CHIP_REV_LEOPARD_ES1, 0\r
-.set CYDEV_CHIP_REV_LEOPARD_ES2, 1\r
-.set CYDEV_CHIP_REV_LEOPARD_ES3, 3\r
-.set CYDEV_CHIP_REV_LEOPARD_PRODUCTION, 3\r
-.set CYDEV_CHIP_REV_PANTHER_ES0, 0\r
-.set CYDEV_CHIP_REV_PANTHER_ES1, 1\r
-.set CYDEV_CHIP_REV_PANTHER_PRODUCTION, 1\r
-.set CYDEV_CHIP_REV_PSOC4A_ES0, 17\r
-.set CYDEV_CHIP_REV_PSOC4A_PRODUCTION, 17\r
-.set CYDEV_CHIP_REV_PSOC5LP_ES0, 0\r
-.set CYDEV_CONFIGURATION_COMPRESSED, 1\r
-.set CYDEV_CONFIGURATION_DMA, 0\r
-.set CYDEV_CONFIGURATION_ECC, 0\r
-.set CYDEV_CONFIGURATION_IMOENABLED, CYDEV_CONFIG_FASTBOOT_ENABLED\r
-.set CYDEV_CONFIGURATION_MODE, CYDEV_CONFIGURATION_MODE_COMPRESSED\r
-.set CYDEV_CONFIGURATION_MODE_DMA, 2\r
-.set CYDEV_CONFIGURATION_MODE_UNCOMPRESSED, 1\r
-.set CYDEV_CONFIG_UNUSED_IO, CYDEV_CONFIG_UNUSED_IO_AllowButWarn\r
-.set CYDEV_CONFIG_UNUSED_IO_AllowWithInfo, 1\r
-.set CYDEV_CONFIG_UNUSED_IO_Disallowed, 2\r
-.set CYDEV_DEBUGGING_DPS, CYDEV_DEBUGGING_DPS_SWD_SWV\r
-.set CYDEV_DEBUGGING_DPS_Disable, 3\r
-.set CYDEV_DEBUGGING_DPS_JTAG_4, 1\r
-.set CYDEV_DEBUGGING_DPS_JTAG_5, 0\r
-.set CYDEV_DEBUGGING_DPS_SWD, 2\r
-.set CYDEV_DEBUGGING_ENABLE, 1\r
-.set CYDEV_DEBUGGING_XRES, 0\r
-.set CYDEV_DEBUG_ENABLE_MASK, 0x20\r
-.set CYDEV_DEBUG_ENABLE_REGISTER, CYREG_MLOGIC_DEBUG\r
-.set CYDEV_DMA_CHANNELS_AVAILABLE, 24\r
-.set CYDEV_ECC_ENABLE, 0\r
-.set CYDEV_HEAP_SIZE, 0x0800\r
-.set CYDEV_INSTRUCT_CACHE_ENABLED, 1\r
-.set CYDEV_INTR_RISING, 0x00000000\r
-.set CYDEV_PROJ_TYPE, 1\r
-.set CYDEV_PROJ_TYPE_BOOTLOADER, 1\r
-.set CYDEV_PROJ_TYPE_LOADABLE, 2\r
-.set CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER, 3\r
-.set CYDEV_PROJ_TYPE_STANDARD, 0\r
-.set CYDEV_PROTECTION_ENABLE, 0\r
-.set CYDEV_STACK_SIZE, 0x2000\r
-.set CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP, 1\r
-.set CYDEV_USE_BUNDLED_CMSIS, 1\r
-.set CYDEV_VARIABLE_VDDA, 0\r
-.set CYDEV_VDDA_MV, 5000\r
-.set CYDEV_VDDD_MV, 5000\r
-.set CYDEV_VDDIO0_MV, 5000\r
-.set CYDEV_VDDIO1_MV, 5000\r
-.set CYDEV_VDDIO2_MV, 5000\r
-.set CYDEV_VDDIO3_MV, 5000\r
-.set CYDEV_VIO0, 5\r
-.set CYDEV_VIO0_MV, 5000\r
-.set CYDEV_VIO1, 5\r
-.set CYDEV_VIO1_MV, 5000\r
-.set CYDEV_VIO2, 5\r
-.set CYDEV_VIO2_MV, 5000\r
-.set CYDEV_VIO3, 5\r
-.set CYDEV_VIO3_MV, 5000\r
-.set CyBtldr_Custom_Interface, CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO\r
-.set CyBtldr_USBFS, CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-.set DMA_CHANNELS_USED__MASK0, 0x00000000\r
-.set CYDEV_BOOTLOADER_ENABLE, 1\r
-.endif\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitteriar.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitteriar.inc
deleted file mode 100755 (executable)
index fb84c62..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitteriar.inc
+++ /dev/null
@@ -1,1403 +0,0 @@
-#ifndef INCLUDED_CYFITTERIAR_INC\r
-#define INCLUDED_CYFITTERIAR_INC\r
-    INCLUDE cydeviceiar.inc\r
-    INCLUDE cydeviceiar_trm.inc\r
-\r
-/* USBFS_bus_reset */\r
-USBFS_bus_reset__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_bus_reset__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_bus_reset__INTC_MASK EQU 0x800000\r
-USBFS_bus_reset__INTC_NUMBER EQU 23\r
-USBFS_bus_reset__INTC_PRIOR_NUM EQU 7\r
-USBFS_bus_reset__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_23\r
-USBFS_bus_reset__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_bus_reset__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_arb_int */\r
-USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_arb_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_arb_int__INTC_MASK EQU 0x400000\r
-USBFS_arb_int__INTC_NUMBER EQU 22\r
-USBFS_arb_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_arb_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_22\r
-USBFS_arb_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_arb_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_sof_int */\r
-USBFS_sof_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_sof_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_sof_int__INTC_MASK EQU 0x200000\r
-USBFS_sof_int__INTC_NUMBER EQU 21\r
-USBFS_sof_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_sof_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_21\r
-USBFS_sof_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_sof_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SCSI_Out_DBx */\r
-SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__0__MASK EQU 0x08\r
-SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC3\r
-SCSI_Out_DBx__0__PORT EQU 6\r
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__0__SHIFT EQU 3\r
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__1__MASK EQU 0x04\r
-SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC2\r
-SCSI_Out_DBx__1__PORT EQU 6\r
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__1__SHIFT EQU 2\r
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__2__MASK EQU 0x02\r
-SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out_DBx__2__PORT EQU 6\r
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__2__SHIFT EQU 1\r
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__3__MASK EQU 0x01\r
-SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out_DBx__3__PORT EQU 6\r
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__3__SHIFT EQU 0\r
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__4__MASK EQU 0x80\r
-SCSI_Out_DBx__4__PC EQU CYREG_PRT4_PC7\r
-SCSI_Out_DBx__4__PORT EQU 4\r
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__4__SHIFT EQU 7\r
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__5__MASK EQU 0x40\r
-SCSI_Out_DBx__5__PC EQU CYREG_PRT4_PC6\r
-SCSI_Out_DBx__5__PORT EQU 4\r
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__5__SHIFT EQU 6\r
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__6__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__6__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__6__MASK EQU 0x20\r
-SCSI_Out_DBx__6__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out_DBx__6__PORT EQU 4\r
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__6__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__6__SHIFT EQU 5\r
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__7__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__7__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__7__MASK EQU 0x10\r
-SCSI_Out_DBx__7__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out_DBx__7__PORT EQU 4\r
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__7__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__7__SHIFT EQU 4\r
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB0__MASK EQU 0x08\r
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC3\r
-SCSI_Out_DBx__DB0__PORT EQU 6\r
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB0__SHIFT EQU 3\r
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB1__MASK EQU 0x04\r
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC2\r
-SCSI_Out_DBx__DB1__PORT EQU 6\r
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB1__SHIFT EQU 2\r
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB2__MASK EQU 0x02\r
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out_DBx__DB2__PORT EQU 6\r
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB2__SHIFT EQU 1\r
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB3__MASK EQU 0x01\r
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out_DBx__DB3__PORT EQU 6\r
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB3__SHIFT EQU 0\r
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB4__MASK EQU 0x80\r
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT4_PC7\r
-SCSI_Out_DBx__DB4__PORT EQU 4\r
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB4__SHIFT EQU 7\r
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB5__MASK EQU 0x40\r
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT4_PC6\r
-SCSI_Out_DBx__DB5__PORT EQU 4\r
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB5__SHIFT EQU 6\r
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB6__MASK EQU 0x20\r
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out_DBx__DB6__PORT EQU 4\r
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB6__SHIFT EQU 5\r
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB7__MASK EQU 0x10\r
-SCSI_Out_DBx__DB7__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out_DBx__DB7__PORT EQU 4\r
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB7__SHIFT EQU 4\r
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT4_SLW\r
-\r
-/* USBFS_dp_int */\r
-USBFS_dp_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_dp_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_dp_int__INTC_MASK EQU 0x1000\r
-USBFS_dp_int__INTC_NUMBER EQU 12\r
-USBFS_dp_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_dp_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_12\r
-USBFS_dp_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_dp_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_0 */\r
-USBFS_ep_0__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_0__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_0__INTC_MASK EQU 0x1000000\r
-USBFS_ep_0__INTC_NUMBER EQU 24\r
-USBFS_ep_0__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_0__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_24\r
-USBFS_ep_0__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_0__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_1 */\r
-USBFS_ep_1__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_1__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_1__INTC_MASK EQU 0x01\r
-USBFS_ep_1__INTC_NUMBER EQU 0\r
-USBFS_ep_1__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
-USBFS_ep_1__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_1__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* USBFS_ep_2 */\r
-USBFS_ep_2__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_2__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_2__INTC_MASK EQU 0x02\r
-USBFS_ep_2__INTC_NUMBER EQU 1\r
-USBFS_ep_2__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
-USBFS_ep_2__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_2__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-/* SD_PULLUP */\r
-SD_PULLUP__0__MASK EQU 0x02\r
-SD_PULLUP__0__PC EQU CYREG_PRT3_PC1\r
-SD_PULLUP__0__PORT EQU 3\r
-SD_PULLUP__0__SHIFT EQU 1\r
-SD_PULLUP__1__MASK EQU 0x04\r
-SD_PULLUP__1__PC EQU CYREG_PRT3_PC2\r
-SD_PULLUP__1__PORT EQU 3\r
-SD_PULLUP__1__SHIFT EQU 2\r
-SD_PULLUP__2__MASK EQU 0x08\r
-SD_PULLUP__2__PC EQU CYREG_PRT3_PC3\r
-SD_PULLUP__2__PORT EQU 3\r
-SD_PULLUP__2__SHIFT EQU 3\r
-SD_PULLUP__3__MASK EQU 0x10\r
-SD_PULLUP__3__PC EQU CYREG_PRT3_PC4\r
-SD_PULLUP__3__PORT EQU 3\r
-SD_PULLUP__3__SHIFT EQU 4\r
-SD_PULLUP__4__MASK EQU 0x20\r
-SD_PULLUP__4__PC EQU CYREG_PRT3_PC5\r
-SD_PULLUP__4__PORT EQU 3\r
-SD_PULLUP__4__SHIFT EQU 5\r
-SD_PULLUP__AG EQU CYREG_PRT3_AG\r
-SD_PULLUP__AMUX EQU CYREG_PRT3_AMUX\r
-SD_PULLUP__BIE EQU CYREG_PRT3_BIE\r
-SD_PULLUP__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_PULLUP__BYP EQU CYREG_PRT3_BYP\r
-SD_PULLUP__CTL EQU CYREG_PRT3_CTL\r
-SD_PULLUP__DM0 EQU CYREG_PRT3_DM0\r
-SD_PULLUP__DM1 EQU CYREG_PRT3_DM1\r
-SD_PULLUP__DM2 EQU CYREG_PRT3_DM2\r
-SD_PULLUP__DR EQU CYREG_PRT3_DR\r
-SD_PULLUP__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_PULLUP__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_PULLUP__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_PULLUP__MASK EQU 0x3E\r
-SD_PULLUP__PORT EQU 3\r
-SD_PULLUP__PRT EQU CYREG_PRT3_PRT\r
-SD_PULLUP__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_PULLUP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_PULLUP__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_PULLUP__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_PULLUP__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_PULLUP__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_PULLUP__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_PULLUP__PS EQU CYREG_PRT3_PS\r
-SD_PULLUP__SHIFT EQU 1\r
-SD_PULLUP__SLW EQU CYREG_PRT3_SLW\r
-\r
-/* USBFS_USB */\r
-USBFS_USB__ARB_CFG EQU CYREG_USB_ARB_CFG\r
-USBFS_USB__ARB_EP1_CFG EQU CYREG_USB_ARB_EP1_CFG\r
-USBFS_USB__ARB_EP1_INT_EN EQU CYREG_USB_ARB_EP1_INT_EN\r
-USBFS_USB__ARB_EP1_SR EQU CYREG_USB_ARB_EP1_SR\r
-USBFS_USB__ARB_EP2_CFG EQU CYREG_USB_ARB_EP2_CFG\r
-USBFS_USB__ARB_EP2_INT_EN EQU CYREG_USB_ARB_EP2_INT_EN\r
-USBFS_USB__ARB_EP2_SR EQU CYREG_USB_ARB_EP2_SR\r
-USBFS_USB__ARB_EP3_CFG EQU CYREG_USB_ARB_EP3_CFG\r
-USBFS_USB__ARB_EP3_INT_EN EQU CYREG_USB_ARB_EP3_INT_EN\r
-USBFS_USB__ARB_EP3_SR EQU CYREG_USB_ARB_EP3_SR\r
-USBFS_USB__ARB_EP4_CFG EQU CYREG_USB_ARB_EP4_CFG\r
-USBFS_USB__ARB_EP4_INT_EN EQU CYREG_USB_ARB_EP4_INT_EN\r
-USBFS_USB__ARB_EP4_SR EQU CYREG_USB_ARB_EP4_SR\r
-USBFS_USB__ARB_EP5_CFG EQU CYREG_USB_ARB_EP5_CFG\r
-USBFS_USB__ARB_EP5_INT_EN EQU CYREG_USB_ARB_EP5_INT_EN\r
-USBFS_USB__ARB_EP5_SR EQU CYREG_USB_ARB_EP5_SR\r
-USBFS_USB__ARB_EP6_CFG EQU CYREG_USB_ARB_EP6_CFG\r
-USBFS_USB__ARB_EP6_INT_EN EQU CYREG_USB_ARB_EP6_INT_EN\r
-USBFS_USB__ARB_EP6_SR EQU CYREG_USB_ARB_EP6_SR\r
-USBFS_USB__ARB_EP7_CFG EQU CYREG_USB_ARB_EP7_CFG\r
-USBFS_USB__ARB_EP7_INT_EN EQU CYREG_USB_ARB_EP7_INT_EN\r
-USBFS_USB__ARB_EP7_SR EQU CYREG_USB_ARB_EP7_SR\r
-USBFS_USB__ARB_EP8_CFG EQU CYREG_USB_ARB_EP8_CFG\r
-USBFS_USB__ARB_EP8_INT_EN EQU CYREG_USB_ARB_EP8_INT_EN\r
-USBFS_USB__ARB_EP8_SR EQU CYREG_USB_ARB_EP8_SR\r
-USBFS_USB__ARB_INT_EN EQU CYREG_USB_ARB_INT_EN\r
-USBFS_USB__ARB_INT_SR EQU CYREG_USB_ARB_INT_SR\r
-USBFS_USB__ARB_RW1_DR EQU CYREG_USB_ARB_RW1_DR\r
-USBFS_USB__ARB_RW1_RA EQU CYREG_USB_ARB_RW1_RA\r
-USBFS_USB__ARB_RW1_RA_MSB EQU CYREG_USB_ARB_RW1_RA_MSB\r
-USBFS_USB__ARB_RW1_WA EQU CYREG_USB_ARB_RW1_WA\r
-USBFS_USB__ARB_RW1_WA_MSB EQU CYREG_USB_ARB_RW1_WA_MSB\r
-USBFS_USB__ARB_RW2_DR EQU CYREG_USB_ARB_RW2_DR\r
-USBFS_USB__ARB_RW2_RA EQU CYREG_USB_ARB_RW2_RA\r
-USBFS_USB__ARB_RW2_RA_MSB EQU CYREG_USB_ARB_RW2_RA_MSB\r
-USBFS_USB__ARB_RW2_WA EQU CYREG_USB_ARB_RW2_WA\r
-USBFS_USB__ARB_RW2_WA_MSB EQU CYREG_USB_ARB_RW2_WA_MSB\r
-USBFS_USB__ARB_RW3_DR EQU CYREG_USB_ARB_RW3_DR\r
-USBFS_USB__ARB_RW3_RA EQU CYREG_USB_ARB_RW3_RA\r
-USBFS_USB__ARB_RW3_RA_MSB EQU CYREG_USB_ARB_RW3_RA_MSB\r
-USBFS_USB__ARB_RW3_WA EQU CYREG_USB_ARB_RW3_WA\r
-USBFS_USB__ARB_RW3_WA_MSB EQU CYREG_USB_ARB_RW3_WA_MSB\r
-USBFS_USB__ARB_RW4_DR EQU CYREG_USB_ARB_RW4_DR\r
-USBFS_USB__ARB_RW4_RA EQU CYREG_USB_ARB_RW4_RA\r
-USBFS_USB__ARB_RW4_RA_MSB EQU CYREG_USB_ARB_RW4_RA_MSB\r
-USBFS_USB__ARB_RW4_WA EQU CYREG_USB_ARB_RW4_WA\r
-USBFS_USB__ARB_RW4_WA_MSB EQU CYREG_USB_ARB_RW4_WA_MSB\r
-USBFS_USB__ARB_RW5_DR EQU CYREG_USB_ARB_RW5_DR\r
-USBFS_USB__ARB_RW5_RA EQU CYREG_USB_ARB_RW5_RA\r
-USBFS_USB__ARB_RW5_RA_MSB EQU CYREG_USB_ARB_RW5_RA_MSB\r
-USBFS_USB__ARB_RW5_WA EQU CYREG_USB_ARB_RW5_WA\r
-USBFS_USB__ARB_RW5_WA_MSB EQU CYREG_USB_ARB_RW5_WA_MSB\r
-USBFS_USB__ARB_RW6_DR EQU CYREG_USB_ARB_RW6_DR\r
-USBFS_USB__ARB_RW6_RA EQU CYREG_USB_ARB_RW6_RA\r
-USBFS_USB__ARB_RW6_RA_MSB EQU CYREG_USB_ARB_RW6_RA_MSB\r
-USBFS_USB__ARB_RW6_WA EQU CYREG_USB_ARB_RW6_WA\r
-USBFS_USB__ARB_RW6_WA_MSB EQU CYREG_USB_ARB_RW6_WA_MSB\r
-USBFS_USB__ARB_RW7_DR EQU CYREG_USB_ARB_RW7_DR\r
-USBFS_USB__ARB_RW7_RA EQU CYREG_USB_ARB_RW7_RA\r
-USBFS_USB__ARB_RW7_RA_MSB EQU CYREG_USB_ARB_RW7_RA_MSB\r
-USBFS_USB__ARB_RW7_WA EQU CYREG_USB_ARB_RW7_WA\r
-USBFS_USB__ARB_RW7_WA_MSB EQU CYREG_USB_ARB_RW7_WA_MSB\r
-USBFS_USB__ARB_RW8_DR EQU CYREG_USB_ARB_RW8_DR\r
-USBFS_USB__ARB_RW8_RA EQU CYREG_USB_ARB_RW8_RA\r
-USBFS_USB__ARB_RW8_RA_MSB EQU CYREG_USB_ARB_RW8_RA_MSB\r
-USBFS_USB__ARB_RW8_WA EQU CYREG_USB_ARB_RW8_WA\r
-USBFS_USB__ARB_RW8_WA_MSB EQU CYREG_USB_ARB_RW8_WA_MSB\r
-USBFS_USB__BUF_SIZE EQU CYREG_USB_BUF_SIZE\r
-USBFS_USB__BUS_RST_CNT EQU CYREG_USB_BUS_RST_CNT\r
-USBFS_USB__CR0 EQU CYREG_USB_CR0\r
-USBFS_USB__CR1 EQU CYREG_USB_CR1\r
-USBFS_USB__CWA EQU CYREG_USB_CWA\r
-USBFS_USB__CWA_MSB EQU CYREG_USB_CWA_MSB\r
-USBFS_USB__DMA_THRES EQU CYREG_USB_DMA_THRES\r
-USBFS_USB__DMA_THRES_MSB EQU CYREG_USB_DMA_THRES_MSB\r
-USBFS_USB__DYN_RECONFIG EQU CYREG_USB_DYN_RECONFIG\r
-USBFS_USB__EP0_CNT EQU CYREG_USB_EP0_CNT\r
-USBFS_USB__EP0_CR EQU CYREG_USB_EP0_CR\r
-USBFS_USB__EP0_DR0 EQU CYREG_USB_EP0_DR0\r
-USBFS_USB__EP0_DR1 EQU CYREG_USB_EP0_DR1\r
-USBFS_USB__EP0_DR2 EQU CYREG_USB_EP0_DR2\r
-USBFS_USB__EP0_DR3 EQU CYREG_USB_EP0_DR3\r
-USBFS_USB__EP0_DR4 EQU CYREG_USB_EP0_DR4\r
-USBFS_USB__EP0_DR5 EQU CYREG_USB_EP0_DR5\r
-USBFS_USB__EP0_DR6 EQU CYREG_USB_EP0_DR6\r
-USBFS_USB__EP0_DR7 EQU CYREG_USB_EP0_DR7\r
-USBFS_USB__EP_ACTIVE EQU CYREG_USB_EP_ACTIVE\r
-USBFS_USB__EP_TYPE EQU CYREG_USB_EP_TYPE\r
-USBFS_USB__MEM_DATA EQU CYREG_USB_MEM_DATA_MBASE\r
-USBFS_USB__PM_ACT_CFG EQU CYREG_PM_ACT_CFG5\r
-USBFS_USB__PM_ACT_MSK EQU 0x01\r
-USBFS_USB__PM_STBY_CFG EQU CYREG_PM_STBY_CFG5\r
-USBFS_USB__PM_STBY_MSK EQU 0x01\r
-USBFS_USB__SIE_EP1_CNT0 EQU CYREG_USB_SIE_EP1_CNT0\r
-USBFS_USB__SIE_EP1_CNT1 EQU CYREG_USB_SIE_EP1_CNT1\r
-USBFS_USB__SIE_EP1_CR0 EQU CYREG_USB_SIE_EP1_CR0\r
-USBFS_USB__SIE_EP2_CNT0 EQU CYREG_USB_SIE_EP2_CNT0\r
-USBFS_USB__SIE_EP2_CNT1 EQU CYREG_USB_SIE_EP2_CNT1\r
-USBFS_USB__SIE_EP2_CR0 EQU CYREG_USB_SIE_EP2_CR0\r
-USBFS_USB__SIE_EP3_CNT0 EQU CYREG_USB_SIE_EP3_CNT0\r
-USBFS_USB__SIE_EP3_CNT1 EQU CYREG_USB_SIE_EP3_CNT1\r
-USBFS_USB__SIE_EP3_CR0 EQU CYREG_USB_SIE_EP3_CR0\r
-USBFS_USB__SIE_EP4_CNT0 EQU CYREG_USB_SIE_EP4_CNT0\r
-USBFS_USB__SIE_EP4_CNT1 EQU CYREG_USB_SIE_EP4_CNT1\r
-USBFS_USB__SIE_EP4_CR0 EQU CYREG_USB_SIE_EP4_CR0\r
-USBFS_USB__SIE_EP5_CNT0 EQU CYREG_USB_SIE_EP5_CNT0\r
-USBFS_USB__SIE_EP5_CNT1 EQU CYREG_USB_SIE_EP5_CNT1\r
-USBFS_USB__SIE_EP5_CR0 EQU CYREG_USB_SIE_EP5_CR0\r
-USBFS_USB__SIE_EP6_CNT0 EQU CYREG_USB_SIE_EP6_CNT0\r
-USBFS_USB__SIE_EP6_CNT1 EQU CYREG_USB_SIE_EP6_CNT1\r
-USBFS_USB__SIE_EP6_CR0 EQU CYREG_USB_SIE_EP6_CR0\r
-USBFS_USB__SIE_EP7_CNT0 EQU CYREG_USB_SIE_EP7_CNT0\r
-USBFS_USB__SIE_EP7_CNT1 EQU CYREG_USB_SIE_EP7_CNT1\r
-USBFS_USB__SIE_EP7_CR0 EQU CYREG_USB_SIE_EP7_CR0\r
-USBFS_USB__SIE_EP8_CNT0 EQU CYREG_USB_SIE_EP8_CNT0\r
-USBFS_USB__SIE_EP8_CNT1 EQU CYREG_USB_SIE_EP8_CNT1\r
-USBFS_USB__SIE_EP8_CR0 EQU CYREG_USB_SIE_EP8_CR0\r
-USBFS_USB__SIE_EP_INT_EN EQU CYREG_USB_SIE_EP_INT_EN\r
-USBFS_USB__SIE_EP_INT_SR EQU CYREG_USB_SIE_EP_INT_SR\r
-USBFS_USB__SOF0 EQU CYREG_USB_SOF0\r
-USBFS_USB__SOF1 EQU CYREG_USB_SOF1\r
-USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0\r
-USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1\r
-USBFS_USB__USB_CLK_EN EQU CYREG_USB_USB_CLK_EN\r
-\r
-/* SCSI_Out */\r
-SCSI_Out__0__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__0__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__0__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__0__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__0__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__0__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__0__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__0__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__0__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__0__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__0__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__0__MASK EQU 0x08\r
-SCSI_Out__0__PC EQU CYREG_PRT4_PC3\r
-SCSI_Out__0__PORT EQU 4\r
-SCSI_Out__0__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__0__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__0__SHIFT EQU 3\r
-SCSI_Out__0__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__1__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__1__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__1__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__1__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__1__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__1__MASK EQU 0x04\r
-SCSI_Out__1__PC EQU CYREG_PRT4_PC2\r
-SCSI_Out__1__PORT EQU 4\r
-SCSI_Out__1__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__1__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__1__SHIFT EQU 2\r
-SCSI_Out__1__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__2__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__2__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__2__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__2__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__2__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__2__MASK EQU 0x80\r
-SCSI_Out__2__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__2__PORT EQU 0\r
-SCSI_Out__2__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__2__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__2__SHIFT EQU 7\r
-SCSI_Out__2__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__3__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__3__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__3__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__3__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__3__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__3__MASK EQU 0x40\r
-SCSI_Out__3__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__3__PORT EQU 0\r
-SCSI_Out__3__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__3__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__3__SHIFT EQU 6\r
-SCSI_Out__3__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__4__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__4__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__4__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__4__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__4__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__4__MASK EQU 0x20\r
-SCSI_Out__4__PC EQU CYREG_PRT0_PC5\r
-SCSI_Out__4__PORT EQU 0\r
-SCSI_Out__4__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__4__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__4__SHIFT EQU 5\r
-SCSI_Out__4__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__5__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__5__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__5__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__5__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__5__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__5__MASK EQU 0x10\r
-SCSI_Out__5__PC EQU CYREG_PRT0_PC4\r
-SCSI_Out__5__PORT EQU 0\r
-SCSI_Out__5__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__5__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__5__SHIFT EQU 4\r
-SCSI_Out__5__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__6__MASK EQU 0x08\r
-SCSI_Out__6__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__6__PORT EQU 0\r
-SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__6__SHIFT EQU 3\r
-SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__7__MASK EQU 0x04\r
-SCSI_Out__7__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__7__PORT EQU 0\r
-SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__7__SHIFT EQU 2\r
-SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__8__MASK EQU 0x02\r
-SCSI_Out__8__PC EQU CYREG_PRT0_PC1\r
-SCSI_Out__8__PORT EQU 0\r
-SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__8__SHIFT EQU 1\r
-SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__9__MASK EQU 0x01\r
-SCSI_Out__9__PC EQU CYREG_PRT0_PC0\r
-SCSI_Out__9__PORT EQU 0\r
-SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__9__SHIFT EQU 0\r
-SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ACK__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__ACK__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__ACK__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__ACK__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__ACK__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__ACK__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__ACK__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__ACK__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__ACK__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__ACK__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__ACK__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__ACK__MASK EQU 0x40\r
-SCSI_Out__ACK__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__ACK__PORT EQU 0\r
-SCSI_Out__ACK__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__ACK__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__ACK__SHIFT EQU 6\r
-SCSI_Out__ACK__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ATN__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__ATN__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__ATN__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__ATN__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__ATN__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__ATN__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__ATN__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__ATN__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__ATN__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__ATN__MASK EQU 0x04\r
-SCSI_Out__ATN__PC EQU CYREG_PRT4_PC2\r
-SCSI_Out__ATN__PORT EQU 4\r
-SCSI_Out__ATN__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__ATN__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__ATN__SHIFT EQU 2\r
-SCSI_Out__ATN__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__BSY__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__BSY__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__BSY__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__BSY__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__BSY__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__BSY__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__BSY__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__BSY__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__BSY__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__BSY__MASK EQU 0x80\r
-SCSI_Out__BSY__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__BSY__PORT EQU 0\r
-SCSI_Out__BSY__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__BSY__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__BSY__SHIFT EQU 7\r
-SCSI_Out__BSY__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__CD__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__CD__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__CD__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__CD__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__CD__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__CD__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__CD__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__CD__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__CD__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__CD__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__CD__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__CD__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__CD__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__CD__MASK EQU 0x04\r
-SCSI_Out__CD__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__CD__PORT EQU 0\r
-SCSI_Out__CD__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__CD__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__CD__SHIFT EQU 2\r
-SCSI_Out__CD__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__DBP_raw__MASK EQU 0x08\r
-SCSI_Out__DBP_raw__PC EQU CYREG_PRT4_PC3\r
-SCSI_Out__DBP_raw__PORT EQU 4\r
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__DBP_raw__SHIFT EQU 3\r
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__IO_raw__MASK EQU 0x01\r
-SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC0\r
-SCSI_Out__IO_raw__PORT EQU 0\r
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__IO_raw__SHIFT EQU 0\r
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__MSG__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__MSG__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__MSG__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__MSG__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__MSG__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__MSG__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__MSG__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__MSG__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__MSG__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__MSG__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__MSG__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__MSG__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__MSG__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__MSG__MASK EQU 0x10\r
-SCSI_Out__MSG__PC EQU CYREG_PRT0_PC4\r
-SCSI_Out__MSG__PORT EQU 0\r
-SCSI_Out__MSG__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__MSG__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__MSG__SHIFT EQU 4\r
-SCSI_Out__MSG__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__REQ__MASK EQU 0x02\r
-SCSI_Out__REQ__PC EQU CYREG_PRT0_PC1\r
-SCSI_Out__REQ__PORT EQU 0\r
-SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__REQ__SHIFT EQU 1\r
-SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__RST__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__RST__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__RST__MASK EQU 0x20\r
-SCSI_Out__RST__PC EQU CYREG_PRT0_PC5\r
-SCSI_Out__RST__PORT EQU 0\r
-SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__RST__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__RST__SHIFT EQU 5\r
-SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__SEL__MASK EQU 0x08\r
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__SEL__PORT EQU 0\r
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__SEL__SHIFT EQU 3\r
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
-\r
-/* USBFS_Dm */\r
-USBFS_Dm__0__MASK EQU 0x80\r
-USBFS_Dm__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC1\r
-USBFS_Dm__0__PORT EQU 15\r
-USBFS_Dm__0__SHIFT EQU 7\r
-USBFS_Dm__AG EQU CYREG_PRT15_AG\r
-USBFS_Dm__AMUX EQU CYREG_PRT15_AMUX\r
-USBFS_Dm__BIE EQU CYREG_PRT15_BIE\r
-USBFS_Dm__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-USBFS_Dm__BYP EQU CYREG_PRT15_BYP\r
-USBFS_Dm__CTL EQU CYREG_PRT15_CTL\r
-USBFS_Dm__DM0 EQU CYREG_PRT15_DM0\r
-USBFS_Dm__DM1 EQU CYREG_PRT15_DM1\r
-USBFS_Dm__DM2 EQU CYREG_PRT15_DM2\r
-USBFS_Dm__DR EQU CYREG_PRT15_DR\r
-USBFS_Dm__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-USBFS_Dm__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-USBFS_Dm__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-USBFS_Dm__MASK EQU 0x80\r
-USBFS_Dm__PORT EQU 15\r
-USBFS_Dm__PRT EQU CYREG_PRT15_PRT\r
-USBFS_Dm__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-USBFS_Dm__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-USBFS_Dm__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-USBFS_Dm__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-USBFS_Dm__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-USBFS_Dm__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-USBFS_Dm__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-USBFS_Dm__PS EQU CYREG_PRT15_PS\r
-USBFS_Dm__SHIFT EQU 7\r
-USBFS_Dm__SLW EQU CYREG_PRT15_SLW\r
-\r
-/* USBFS_Dp */\r
-USBFS_Dp__0__MASK EQU 0x40\r
-USBFS_Dp__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC0\r
-USBFS_Dp__0__PORT EQU 15\r
-USBFS_Dp__0__SHIFT EQU 6\r
-USBFS_Dp__AG EQU CYREG_PRT15_AG\r
-USBFS_Dp__AMUX EQU CYREG_PRT15_AMUX\r
-USBFS_Dp__BIE EQU CYREG_PRT15_BIE\r
-USBFS_Dp__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-USBFS_Dp__BYP EQU CYREG_PRT15_BYP\r
-USBFS_Dp__CTL EQU CYREG_PRT15_CTL\r
-USBFS_Dp__DM0 EQU CYREG_PRT15_DM0\r
-USBFS_Dp__DM1 EQU CYREG_PRT15_DM1\r
-USBFS_Dp__DM2 EQU CYREG_PRT15_DM2\r
-USBFS_Dp__DR EQU CYREG_PRT15_DR\r
-USBFS_Dp__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-USBFS_Dp__INTSTAT EQU CYREG_PICU15_INTSTAT\r
-USBFS_Dp__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-USBFS_Dp__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-USBFS_Dp__MASK EQU 0x40\r
-USBFS_Dp__PORT EQU 15\r
-USBFS_Dp__PRT EQU CYREG_PRT15_PRT\r
-USBFS_Dp__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-USBFS_Dp__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-USBFS_Dp__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-USBFS_Dp__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-USBFS_Dp__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-USBFS_Dp__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-USBFS_Dp__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-USBFS_Dp__PS EQU CYREG_PRT15_PS\r
-USBFS_Dp__SHIFT EQU 6\r
-USBFS_Dp__SLW EQU CYREG_PRT15_SLW\r
-USBFS_Dp__SNAP EQU CYREG_PICU_15_SNAP_15\r
-\r
-/* Miscellaneous */\r
-/* -- WARNING: define names containing LEOPARD or PANTHER are deprecated and will be removed in a future release */\r
-CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO EQU 0\r
-CYDEV_DEBUGGING_DPS_SWD_SWV EQU 6\r
-CYDEV_CONFIG_UNUSED_IO_AllowButWarn EQU 0\r
-CYDEV_CONFIGURATION_MODE_COMPRESSED EQU 0\r
-CYDEV_CONFIG_FASTBOOT_ENABLED EQU 1\r
-CYDEV_CHIP_REV_PSOC5LP_PRODUCTION EQU 0\r
-CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0\r
-CYDEV_CHIP_MEMBER_5B EQU 4\r
-CYDEV_CHIP_FAMILY_PSOC5 EQU 3\r
-CYDEV_CHIP_DIE_PSOC5LP EQU 4\r
-CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_DIE_PSOC5LP\r
-CYDEV_BOOTLOADER_IO_COMP_USBFS EQU 1\r
-BCLK__BUS_CLK__HZ EQU 64000000\r
-BCLK__BUS_CLK__KHZ EQU 64000\r
-BCLK__BUS_CLK__MHZ EQU 64\r
-CYDEV_BOOTLOADER_APPLICATIONS EQU 1\r
-CYDEV_BOOTLOADER_CHECKSUM_BASIC EQU 0\r
-CYDEV_BOOTLOADER_CHECKSUM_CRC EQU 1\r
-CYDEV_BOOTLOADER_IO_COMP EQU CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-CYDEV_CHIP_DIE_ACTUAL EQU CYDEV_CHIP_DIE_EXPECT\r
-CYDEV_CHIP_DIE_LEOPARD EQU 1\r
-CYDEV_CHIP_DIE_PANTHER EQU 3\r
-CYDEV_CHIP_DIE_PSOC4A EQU 2\r
-CYDEV_CHIP_DIE_UNKNOWN EQU 0\r
-CYDEV_CHIP_FAMILY_PSOC3 EQU 1\r
-CYDEV_CHIP_FAMILY_PSOC4 EQU 2\r
-CYDEV_CHIP_FAMILY_UNKNOWN EQU 0\r
-CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5\r
-CYDEV_CHIP_JTAG_ID EQU 0x2E133069\r
-CYDEV_CHIP_MEMBER_3A EQU 1\r
-CYDEV_CHIP_MEMBER_4A EQU 2\r
-CYDEV_CHIP_MEMBER_5A EQU 3\r
-CYDEV_CHIP_MEMBER_UNKNOWN EQU 0\r
-CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B\r
-CYDEV_CHIP_REVISION_3A_ES1 EQU 0\r
-CYDEV_CHIP_REVISION_3A_ES2 EQU 1\r
-CYDEV_CHIP_REVISION_3A_ES3 EQU 3\r
-CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3\r
-CYDEV_CHIP_REVISION_4A_ES0 EQU 17\r
-CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17\r
-CYDEV_CHIP_REVISION_5A_ES0 EQU 0\r
-CYDEV_CHIP_REVISION_5A_ES1 EQU 1\r
-CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1\r
-CYDEV_CHIP_REVISION_5B_ES0 EQU 0\r
-CYDEV_CHIP_REVISION_USED EQU CYDEV_CHIP_REVISION_5B_PRODUCTION\r
-CYDEV_CHIP_REV_EXPECT EQU CYDEV_CHIP_REV_PSOC5LP_PRODUCTION\r
-CYDEV_CHIP_REV_LEOPARD_ES1 EQU 0\r
-CYDEV_CHIP_REV_LEOPARD_ES2 EQU 1\r
-CYDEV_CHIP_REV_LEOPARD_ES3 EQU 3\r
-CYDEV_CHIP_REV_LEOPARD_PRODUCTION EQU 3\r
-CYDEV_CHIP_REV_PANTHER_ES0 EQU 0\r
-CYDEV_CHIP_REV_PANTHER_ES1 EQU 1\r
-CYDEV_CHIP_REV_PANTHER_PRODUCTION EQU 1\r
-CYDEV_CHIP_REV_PSOC4A_ES0 EQU 17\r
-CYDEV_CHIP_REV_PSOC4A_PRODUCTION EQU 17\r
-CYDEV_CHIP_REV_PSOC5LP_ES0 EQU 0\r
-CYDEV_CONFIGURATION_COMPRESSED EQU 1\r
-CYDEV_CONFIGURATION_DMA EQU 0\r
-CYDEV_CONFIGURATION_ECC EQU 0\r
-CYDEV_CONFIGURATION_IMOENABLED EQU CYDEV_CONFIG_FASTBOOT_ENABLED\r
-CYDEV_CONFIGURATION_MODE EQU CYDEV_CONFIGURATION_MODE_COMPRESSED\r
-CYDEV_CONFIGURATION_MODE_DMA EQU 2\r
-CYDEV_CONFIGURATION_MODE_UNCOMPRESSED EQU 1\r
-CYDEV_CONFIG_UNUSED_IO EQU CYDEV_CONFIG_UNUSED_IO_AllowButWarn\r
-CYDEV_CONFIG_UNUSED_IO_AllowWithInfo EQU 1\r
-CYDEV_CONFIG_UNUSED_IO_Disallowed EQU 2\r
-CYDEV_DEBUGGING_DPS EQU CYDEV_DEBUGGING_DPS_SWD_SWV\r
-CYDEV_DEBUGGING_DPS_Disable EQU 3\r
-CYDEV_DEBUGGING_DPS_JTAG_4 EQU 1\r
-CYDEV_DEBUGGING_DPS_JTAG_5 EQU 0\r
-CYDEV_DEBUGGING_DPS_SWD EQU 2\r
-CYDEV_DEBUGGING_ENABLE EQU 1\r
-CYDEV_DEBUGGING_XRES EQU 0\r
-CYDEV_DEBUG_ENABLE_MASK EQU 0x20\r
-CYDEV_DEBUG_ENABLE_REGISTER EQU CYREG_MLOGIC_DEBUG\r
-CYDEV_DMA_CHANNELS_AVAILABLE EQU 24\r
-CYDEV_ECC_ENABLE EQU 0\r
-CYDEV_HEAP_SIZE EQU 0x0800\r
-CYDEV_INSTRUCT_CACHE_ENABLED EQU 1\r
-CYDEV_INTR_RISING EQU 0x00000000\r
-CYDEV_PROJ_TYPE EQU 1\r
-CYDEV_PROJ_TYPE_BOOTLOADER EQU 1\r
-CYDEV_PROJ_TYPE_LOADABLE EQU 2\r
-CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER EQU 3\r
-CYDEV_PROJ_TYPE_STANDARD EQU 0\r
-CYDEV_PROTECTION_ENABLE EQU 0\r
-CYDEV_STACK_SIZE EQU 0x2000\r
-CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP EQU 1\r
-CYDEV_USE_BUNDLED_CMSIS EQU 1\r
-CYDEV_VARIABLE_VDDA EQU 0\r
-CYDEV_VDDA_MV EQU 5000\r
-CYDEV_VDDD_MV EQU 5000\r
-CYDEV_VDDIO0_MV EQU 5000\r
-CYDEV_VDDIO1_MV EQU 5000\r
-CYDEV_VDDIO2_MV EQU 5000\r
-CYDEV_VDDIO3_MV EQU 5000\r
-CYDEV_VIO0 EQU 5\r
-CYDEV_VIO0_MV EQU 5000\r
-CYDEV_VIO1 EQU 5\r
-CYDEV_VIO1_MV EQU 5000\r
-CYDEV_VIO2 EQU 5\r
-CYDEV_VIO2_MV EQU 5000\r
-CYDEV_VIO3 EQU 5\r
-CYDEV_VIO3_MV EQU 5000\r
-CyBtldr_Custom_Interface EQU CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO\r
-CyBtldr_USBFS EQU CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-DMA_CHANNELS_USED__MASK0 EQU 0x00000000\r
-CYDEV_BOOTLOADER_ENABLE EQU 1\r
-\r
-#endif /* INCLUDED_CYFITTERIAR_INC */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitterrv.inc b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitterrv.inc
deleted file mode 100755 (executable)
index 2f81aaf..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyfitterrv.inc
+++ /dev/null
@@ -1,1403 +0,0 @@
-    IF :LNOT::DEF:INCLUDED_CYFITTERRV_INC\r
-INCLUDED_CYFITTERRV_INC EQU 1\r
-    GET cydevicerv.inc\r
-    GET cydevicerv_trm.inc\r
-\r
-; USBFS_bus_reset\r
-USBFS_bus_reset__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_bus_reset__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_bus_reset__INTC_MASK EQU 0x800000\r
-USBFS_bus_reset__INTC_NUMBER EQU 23\r
-USBFS_bus_reset__INTC_PRIOR_NUM EQU 7\r
-USBFS_bus_reset__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_23\r
-USBFS_bus_reset__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_bus_reset__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; USBFS_arb_int\r
-USBFS_arb_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_arb_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_arb_int__INTC_MASK EQU 0x400000\r
-USBFS_arb_int__INTC_NUMBER EQU 22\r
-USBFS_arb_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_arb_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_22\r
-USBFS_arb_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_arb_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; USBFS_sof_int\r
-USBFS_sof_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_sof_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_sof_int__INTC_MASK EQU 0x200000\r
-USBFS_sof_int__INTC_NUMBER EQU 21\r
-USBFS_sof_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_sof_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_21\r
-USBFS_sof_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_sof_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SCSI_Out_DBx\r
-SCSI_Out_DBx__0__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__0__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__0__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__0__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__0__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__0__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__0__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__0__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__0__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__0__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__0__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__0__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__0__MASK EQU 0x08\r
-SCSI_Out_DBx__0__PC EQU CYREG_PRT6_PC3\r
-SCSI_Out_DBx__0__PORT EQU 6\r
-SCSI_Out_DBx__0__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__0__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__0__SHIFT EQU 3\r
-SCSI_Out_DBx__0__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__1__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__1__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__1__MASK EQU 0x04\r
-SCSI_Out_DBx__1__PC EQU CYREG_PRT6_PC2\r
-SCSI_Out_DBx__1__PORT EQU 6\r
-SCSI_Out_DBx__1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__1__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__1__SHIFT EQU 2\r
-SCSI_Out_DBx__1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__2__MASK EQU 0x02\r
-SCSI_Out_DBx__2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out_DBx__2__PORT EQU 6\r
-SCSI_Out_DBx__2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__2__SHIFT EQU 1\r
-SCSI_Out_DBx__2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__3__MASK EQU 0x01\r
-SCSI_Out_DBx__3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out_DBx__3__PORT EQU 6\r
-SCSI_Out_DBx__3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__3__SHIFT EQU 0\r
-SCSI_Out_DBx__3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__4__MASK EQU 0x80\r
-SCSI_Out_DBx__4__PC EQU CYREG_PRT4_PC7\r
-SCSI_Out_DBx__4__PORT EQU 4\r
-SCSI_Out_DBx__4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__4__SHIFT EQU 7\r
-SCSI_Out_DBx__4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__5__MASK EQU 0x40\r
-SCSI_Out_DBx__5__PC EQU CYREG_PRT4_PC6\r
-SCSI_Out_DBx__5__PORT EQU 4\r
-SCSI_Out_DBx__5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__5__SHIFT EQU 6\r
-SCSI_Out_DBx__5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__6__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__6__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__6__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__6__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__6__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__6__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__6__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__6__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__6__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__6__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__6__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__6__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__6__MASK EQU 0x20\r
-SCSI_Out_DBx__6__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out_DBx__6__PORT EQU 4\r
-SCSI_Out_DBx__6__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__6__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__6__SHIFT EQU 5\r
-SCSI_Out_DBx__6__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__7__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__7__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__7__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__7__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__7__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__7__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__7__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__7__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__7__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__7__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__7__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__7__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__7__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__7__MASK EQU 0x10\r
-SCSI_Out_DBx__7__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out_DBx__7__PORT EQU 4\r
-SCSI_Out_DBx__7__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__7__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__7__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__7__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__7__SHIFT EQU 4\r
-SCSI_Out_DBx__7__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB0__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB0__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB0__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB0__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB0__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB0__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB0__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB0__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB0__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB0__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB0__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB0__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB0__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB0__MASK EQU 0x08\r
-SCSI_Out_DBx__DB0__PC EQU CYREG_PRT6_PC3\r
-SCSI_Out_DBx__DB0__PORT EQU 6\r
-SCSI_Out_DBx__DB0__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB0__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB0__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB0__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB0__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB0__SHIFT EQU 3\r
-SCSI_Out_DBx__DB0__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB1__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB1__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB1__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB1__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB1__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB1__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB1__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB1__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB1__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB1__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB1__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB1__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB1__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB1__MASK EQU 0x04\r
-SCSI_Out_DBx__DB1__PC EQU CYREG_PRT6_PC2\r
-SCSI_Out_DBx__DB1__PORT EQU 6\r
-SCSI_Out_DBx__DB1__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB1__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB1__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB1__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB1__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB1__SHIFT EQU 2\r
-SCSI_Out_DBx__DB1__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB2__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB2__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB2__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB2__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB2__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB2__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB2__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB2__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB2__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB2__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB2__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB2__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB2__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB2__MASK EQU 0x02\r
-SCSI_Out_DBx__DB2__PC EQU CYREG_PRT6_PC1\r
-SCSI_Out_DBx__DB2__PORT EQU 6\r
-SCSI_Out_DBx__DB2__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB2__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB2__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB2__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB2__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB2__SHIFT EQU 1\r
-SCSI_Out_DBx__DB2__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB3__AG EQU CYREG_PRT6_AG\r
-SCSI_Out_DBx__DB3__AMUX EQU CYREG_PRT6_AMUX\r
-SCSI_Out_DBx__DB3__BIE EQU CYREG_PRT6_BIE\r
-SCSI_Out_DBx__DB3__BIT_MASK EQU CYREG_PRT6_BIT_MASK\r
-SCSI_Out_DBx__DB3__BYP EQU CYREG_PRT6_BYP\r
-SCSI_Out_DBx__DB3__CTL EQU CYREG_PRT6_CTL\r
-SCSI_Out_DBx__DB3__DM0 EQU CYREG_PRT6_DM0\r
-SCSI_Out_DBx__DB3__DM1 EQU CYREG_PRT6_DM1\r
-SCSI_Out_DBx__DB3__DM2 EQU CYREG_PRT6_DM2\r
-SCSI_Out_DBx__DB3__DR EQU CYREG_PRT6_DR\r
-SCSI_Out_DBx__DB3__INP_DIS EQU CYREG_PRT6_INP_DIS\r
-SCSI_Out_DBx__DB3__LCD_COM_SEG EQU CYREG_PRT6_LCD_COM_SEG\r
-SCSI_Out_DBx__DB3__LCD_EN EQU CYREG_PRT6_LCD_EN\r
-SCSI_Out_DBx__DB3__MASK EQU 0x01\r
-SCSI_Out_DBx__DB3__PC EQU CYREG_PRT6_PC0\r
-SCSI_Out_DBx__DB3__PORT EQU 6\r
-SCSI_Out_DBx__DB3__PRT EQU CYREG_PRT6_PRT\r
-SCSI_Out_DBx__DB3__PRTDSI__CAPS_SEL EQU CYREG_PRT6_CAPS_SEL\r
-SCSI_Out_DBx__DB3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT6_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL0 EQU CYREG_PRT6_OE_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OE_SEL1 EQU CYREG_PRT6_OE_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL0 EQU CYREG_PRT6_OUT_SEL0\r
-SCSI_Out_DBx__DB3__PRTDSI__OUT_SEL1 EQU CYREG_PRT6_OUT_SEL1\r
-SCSI_Out_DBx__DB3__PRTDSI__SYNC_OUT EQU CYREG_PRT6_SYNC_OUT\r
-SCSI_Out_DBx__DB3__PS EQU CYREG_PRT6_PS\r
-SCSI_Out_DBx__DB3__SHIFT EQU 0\r
-SCSI_Out_DBx__DB3__SLW EQU CYREG_PRT6_SLW\r
-SCSI_Out_DBx__DB4__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB4__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB4__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB4__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB4__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB4__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB4__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB4__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB4__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB4__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB4__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB4__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB4__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB4__MASK EQU 0x80\r
-SCSI_Out_DBx__DB4__PC EQU CYREG_PRT4_PC7\r
-SCSI_Out_DBx__DB4__PORT EQU 4\r
-SCSI_Out_DBx__DB4__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB4__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB4__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB4__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB4__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB4__SHIFT EQU 7\r
-SCSI_Out_DBx__DB4__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB5__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB5__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB5__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB5__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB5__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB5__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB5__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB5__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB5__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB5__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB5__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB5__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB5__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB5__MASK EQU 0x40\r
-SCSI_Out_DBx__DB5__PC EQU CYREG_PRT4_PC6\r
-SCSI_Out_DBx__DB5__PORT EQU 4\r
-SCSI_Out_DBx__DB5__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB5__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB5__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB5__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB5__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB5__SHIFT EQU 6\r
-SCSI_Out_DBx__DB5__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB6__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB6__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB6__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB6__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB6__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB6__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB6__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB6__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB6__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB6__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB6__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB6__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB6__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB6__MASK EQU 0x20\r
-SCSI_Out_DBx__DB6__PC EQU CYREG_PRT4_PC5\r
-SCSI_Out_DBx__DB6__PORT EQU 4\r
-SCSI_Out_DBx__DB6__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB6__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB6__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB6__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB6__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB6__SHIFT EQU 5\r
-SCSI_Out_DBx__DB6__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out_DBx__DB7__AG EQU CYREG_PRT4_AG\r
-SCSI_Out_DBx__DB7__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out_DBx__DB7__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out_DBx__DB7__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out_DBx__DB7__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out_DBx__DB7__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out_DBx__DB7__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out_DBx__DB7__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out_DBx__DB7__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out_DBx__DB7__DR EQU CYREG_PRT4_DR\r
-SCSI_Out_DBx__DB7__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out_DBx__DB7__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out_DBx__DB7__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out_DBx__DB7__MASK EQU 0x10\r
-SCSI_Out_DBx__DB7__PC EQU CYREG_PRT4_PC4\r
-SCSI_Out_DBx__DB7__PORT EQU 4\r
-SCSI_Out_DBx__DB7__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out_DBx__DB7__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out_DBx__DB7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out_DBx__DB7__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out_DBx__DB7__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out_DBx__DB7__PS EQU CYREG_PRT4_PS\r
-SCSI_Out_DBx__DB7__SHIFT EQU 4\r
-SCSI_Out_DBx__DB7__SLW EQU CYREG_PRT4_SLW\r
-\r
-; USBFS_dp_int\r
-USBFS_dp_int__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_dp_int__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_dp_int__INTC_MASK EQU 0x1000\r
-USBFS_dp_int__INTC_NUMBER EQU 12\r
-USBFS_dp_int__INTC_PRIOR_NUM EQU 7\r
-USBFS_dp_int__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_12\r
-USBFS_dp_int__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_dp_int__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; USBFS_ep_0\r
-USBFS_ep_0__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_0__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_0__INTC_MASK EQU 0x1000000\r
-USBFS_ep_0__INTC_NUMBER EQU 24\r
-USBFS_ep_0__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_0__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_24\r
-USBFS_ep_0__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_0__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; USBFS_ep_1\r
-USBFS_ep_1__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_1__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_1__INTC_MASK EQU 0x01\r
-USBFS_ep_1__INTC_NUMBER EQU 0\r
-USBFS_ep_1__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_1__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_0\r
-USBFS_ep_1__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_1__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; USBFS_ep_2\r
-USBFS_ep_2__INTC_CLR_EN_REG EQU CYREG_NVIC_CLRENA0\r
-USBFS_ep_2__INTC_CLR_PD_REG EQU CYREG_NVIC_CLRPEND0\r
-USBFS_ep_2__INTC_MASK EQU 0x02\r
-USBFS_ep_2__INTC_NUMBER EQU 1\r
-USBFS_ep_2__INTC_PRIOR_NUM EQU 7\r
-USBFS_ep_2__INTC_PRIOR_REG EQU CYREG_NVIC_PRI_1\r
-USBFS_ep_2__INTC_SET_EN_REG EQU CYREG_NVIC_SETENA0\r
-USBFS_ep_2__INTC_SET_PD_REG EQU CYREG_NVIC_SETPEND0\r
-\r
-; SD_PULLUP\r
-SD_PULLUP__0__MASK EQU 0x02\r
-SD_PULLUP__0__PC EQU CYREG_PRT3_PC1\r
-SD_PULLUP__0__PORT EQU 3\r
-SD_PULLUP__0__SHIFT EQU 1\r
-SD_PULLUP__1__MASK EQU 0x04\r
-SD_PULLUP__1__PC EQU CYREG_PRT3_PC2\r
-SD_PULLUP__1__PORT EQU 3\r
-SD_PULLUP__1__SHIFT EQU 2\r
-SD_PULLUP__2__MASK EQU 0x08\r
-SD_PULLUP__2__PC EQU CYREG_PRT3_PC3\r
-SD_PULLUP__2__PORT EQU 3\r
-SD_PULLUP__2__SHIFT EQU 3\r
-SD_PULLUP__3__MASK EQU 0x10\r
-SD_PULLUP__3__PC EQU CYREG_PRT3_PC4\r
-SD_PULLUP__3__PORT EQU 3\r
-SD_PULLUP__3__SHIFT EQU 4\r
-SD_PULLUP__4__MASK EQU 0x20\r
-SD_PULLUP__4__PC EQU CYREG_PRT3_PC5\r
-SD_PULLUP__4__PORT EQU 3\r
-SD_PULLUP__4__SHIFT EQU 5\r
-SD_PULLUP__AG EQU CYREG_PRT3_AG\r
-SD_PULLUP__AMUX EQU CYREG_PRT3_AMUX\r
-SD_PULLUP__BIE EQU CYREG_PRT3_BIE\r
-SD_PULLUP__BIT_MASK EQU CYREG_PRT3_BIT_MASK\r
-SD_PULLUP__BYP EQU CYREG_PRT3_BYP\r
-SD_PULLUP__CTL EQU CYREG_PRT3_CTL\r
-SD_PULLUP__DM0 EQU CYREG_PRT3_DM0\r
-SD_PULLUP__DM1 EQU CYREG_PRT3_DM1\r
-SD_PULLUP__DM2 EQU CYREG_PRT3_DM2\r
-SD_PULLUP__DR EQU CYREG_PRT3_DR\r
-SD_PULLUP__INP_DIS EQU CYREG_PRT3_INP_DIS\r
-SD_PULLUP__LCD_COM_SEG EQU CYREG_PRT3_LCD_COM_SEG\r
-SD_PULLUP__LCD_EN EQU CYREG_PRT3_LCD_EN\r
-SD_PULLUP__MASK EQU 0x3E\r
-SD_PULLUP__PORT EQU 3\r
-SD_PULLUP__PRT EQU CYREG_PRT3_PRT\r
-SD_PULLUP__PRTDSI__CAPS_SEL EQU CYREG_PRT3_CAPS_SEL\r
-SD_PULLUP__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT3_DBL_SYNC_IN\r
-SD_PULLUP__PRTDSI__OE_SEL0 EQU CYREG_PRT3_OE_SEL0\r
-SD_PULLUP__PRTDSI__OE_SEL1 EQU CYREG_PRT3_OE_SEL1\r
-SD_PULLUP__PRTDSI__OUT_SEL0 EQU CYREG_PRT3_OUT_SEL0\r
-SD_PULLUP__PRTDSI__OUT_SEL1 EQU CYREG_PRT3_OUT_SEL1\r
-SD_PULLUP__PRTDSI__SYNC_OUT EQU CYREG_PRT3_SYNC_OUT\r
-SD_PULLUP__PS EQU CYREG_PRT3_PS\r
-SD_PULLUP__SHIFT EQU 1\r
-SD_PULLUP__SLW EQU CYREG_PRT3_SLW\r
-\r
-; USBFS_USB\r
-USBFS_USB__ARB_CFG EQU CYREG_USB_ARB_CFG\r
-USBFS_USB__ARB_EP1_CFG EQU CYREG_USB_ARB_EP1_CFG\r
-USBFS_USB__ARB_EP1_INT_EN EQU CYREG_USB_ARB_EP1_INT_EN\r
-USBFS_USB__ARB_EP1_SR EQU CYREG_USB_ARB_EP1_SR\r
-USBFS_USB__ARB_EP2_CFG EQU CYREG_USB_ARB_EP2_CFG\r
-USBFS_USB__ARB_EP2_INT_EN EQU CYREG_USB_ARB_EP2_INT_EN\r
-USBFS_USB__ARB_EP2_SR EQU CYREG_USB_ARB_EP2_SR\r
-USBFS_USB__ARB_EP3_CFG EQU CYREG_USB_ARB_EP3_CFG\r
-USBFS_USB__ARB_EP3_INT_EN EQU CYREG_USB_ARB_EP3_INT_EN\r
-USBFS_USB__ARB_EP3_SR EQU CYREG_USB_ARB_EP3_SR\r
-USBFS_USB__ARB_EP4_CFG EQU CYREG_USB_ARB_EP4_CFG\r
-USBFS_USB__ARB_EP4_INT_EN EQU CYREG_USB_ARB_EP4_INT_EN\r
-USBFS_USB__ARB_EP4_SR EQU CYREG_USB_ARB_EP4_SR\r
-USBFS_USB__ARB_EP5_CFG EQU CYREG_USB_ARB_EP5_CFG\r
-USBFS_USB__ARB_EP5_INT_EN EQU CYREG_USB_ARB_EP5_INT_EN\r
-USBFS_USB__ARB_EP5_SR EQU CYREG_USB_ARB_EP5_SR\r
-USBFS_USB__ARB_EP6_CFG EQU CYREG_USB_ARB_EP6_CFG\r
-USBFS_USB__ARB_EP6_INT_EN EQU CYREG_USB_ARB_EP6_INT_EN\r
-USBFS_USB__ARB_EP6_SR EQU CYREG_USB_ARB_EP6_SR\r
-USBFS_USB__ARB_EP7_CFG EQU CYREG_USB_ARB_EP7_CFG\r
-USBFS_USB__ARB_EP7_INT_EN EQU CYREG_USB_ARB_EP7_INT_EN\r
-USBFS_USB__ARB_EP7_SR EQU CYREG_USB_ARB_EP7_SR\r
-USBFS_USB__ARB_EP8_CFG EQU CYREG_USB_ARB_EP8_CFG\r
-USBFS_USB__ARB_EP8_INT_EN EQU CYREG_USB_ARB_EP8_INT_EN\r
-USBFS_USB__ARB_EP8_SR EQU CYREG_USB_ARB_EP8_SR\r
-USBFS_USB__ARB_INT_EN EQU CYREG_USB_ARB_INT_EN\r
-USBFS_USB__ARB_INT_SR EQU CYREG_USB_ARB_INT_SR\r
-USBFS_USB__ARB_RW1_DR EQU CYREG_USB_ARB_RW1_DR\r
-USBFS_USB__ARB_RW1_RA EQU CYREG_USB_ARB_RW1_RA\r
-USBFS_USB__ARB_RW1_RA_MSB EQU CYREG_USB_ARB_RW1_RA_MSB\r
-USBFS_USB__ARB_RW1_WA EQU CYREG_USB_ARB_RW1_WA\r
-USBFS_USB__ARB_RW1_WA_MSB EQU CYREG_USB_ARB_RW1_WA_MSB\r
-USBFS_USB__ARB_RW2_DR EQU CYREG_USB_ARB_RW2_DR\r
-USBFS_USB__ARB_RW2_RA EQU CYREG_USB_ARB_RW2_RA\r
-USBFS_USB__ARB_RW2_RA_MSB EQU CYREG_USB_ARB_RW2_RA_MSB\r
-USBFS_USB__ARB_RW2_WA EQU CYREG_USB_ARB_RW2_WA\r
-USBFS_USB__ARB_RW2_WA_MSB EQU CYREG_USB_ARB_RW2_WA_MSB\r
-USBFS_USB__ARB_RW3_DR EQU CYREG_USB_ARB_RW3_DR\r
-USBFS_USB__ARB_RW3_RA EQU CYREG_USB_ARB_RW3_RA\r
-USBFS_USB__ARB_RW3_RA_MSB EQU CYREG_USB_ARB_RW3_RA_MSB\r
-USBFS_USB__ARB_RW3_WA EQU CYREG_USB_ARB_RW3_WA\r
-USBFS_USB__ARB_RW3_WA_MSB EQU CYREG_USB_ARB_RW3_WA_MSB\r
-USBFS_USB__ARB_RW4_DR EQU CYREG_USB_ARB_RW4_DR\r
-USBFS_USB__ARB_RW4_RA EQU CYREG_USB_ARB_RW4_RA\r
-USBFS_USB__ARB_RW4_RA_MSB EQU CYREG_USB_ARB_RW4_RA_MSB\r
-USBFS_USB__ARB_RW4_WA EQU CYREG_USB_ARB_RW4_WA\r
-USBFS_USB__ARB_RW4_WA_MSB EQU CYREG_USB_ARB_RW4_WA_MSB\r
-USBFS_USB__ARB_RW5_DR EQU CYREG_USB_ARB_RW5_DR\r
-USBFS_USB__ARB_RW5_RA EQU CYREG_USB_ARB_RW5_RA\r
-USBFS_USB__ARB_RW5_RA_MSB EQU CYREG_USB_ARB_RW5_RA_MSB\r
-USBFS_USB__ARB_RW5_WA EQU CYREG_USB_ARB_RW5_WA\r
-USBFS_USB__ARB_RW5_WA_MSB EQU CYREG_USB_ARB_RW5_WA_MSB\r
-USBFS_USB__ARB_RW6_DR EQU CYREG_USB_ARB_RW6_DR\r
-USBFS_USB__ARB_RW6_RA EQU CYREG_USB_ARB_RW6_RA\r
-USBFS_USB__ARB_RW6_RA_MSB EQU CYREG_USB_ARB_RW6_RA_MSB\r
-USBFS_USB__ARB_RW6_WA EQU CYREG_USB_ARB_RW6_WA\r
-USBFS_USB__ARB_RW6_WA_MSB EQU CYREG_USB_ARB_RW6_WA_MSB\r
-USBFS_USB__ARB_RW7_DR EQU CYREG_USB_ARB_RW7_DR\r
-USBFS_USB__ARB_RW7_RA EQU CYREG_USB_ARB_RW7_RA\r
-USBFS_USB__ARB_RW7_RA_MSB EQU CYREG_USB_ARB_RW7_RA_MSB\r
-USBFS_USB__ARB_RW7_WA EQU CYREG_USB_ARB_RW7_WA\r
-USBFS_USB__ARB_RW7_WA_MSB EQU CYREG_USB_ARB_RW7_WA_MSB\r
-USBFS_USB__ARB_RW8_DR EQU CYREG_USB_ARB_RW8_DR\r
-USBFS_USB__ARB_RW8_RA EQU CYREG_USB_ARB_RW8_RA\r
-USBFS_USB__ARB_RW8_RA_MSB EQU CYREG_USB_ARB_RW8_RA_MSB\r
-USBFS_USB__ARB_RW8_WA EQU CYREG_USB_ARB_RW8_WA\r
-USBFS_USB__ARB_RW8_WA_MSB EQU CYREG_USB_ARB_RW8_WA_MSB\r
-USBFS_USB__BUF_SIZE EQU CYREG_USB_BUF_SIZE\r
-USBFS_USB__BUS_RST_CNT EQU CYREG_USB_BUS_RST_CNT\r
-USBFS_USB__CR0 EQU CYREG_USB_CR0\r
-USBFS_USB__CR1 EQU CYREG_USB_CR1\r
-USBFS_USB__CWA EQU CYREG_USB_CWA\r
-USBFS_USB__CWA_MSB EQU CYREG_USB_CWA_MSB\r
-USBFS_USB__DMA_THRES EQU CYREG_USB_DMA_THRES\r
-USBFS_USB__DMA_THRES_MSB EQU CYREG_USB_DMA_THRES_MSB\r
-USBFS_USB__DYN_RECONFIG EQU CYREG_USB_DYN_RECONFIG\r
-USBFS_USB__EP0_CNT EQU CYREG_USB_EP0_CNT\r
-USBFS_USB__EP0_CR EQU CYREG_USB_EP0_CR\r
-USBFS_USB__EP0_DR0 EQU CYREG_USB_EP0_DR0\r
-USBFS_USB__EP0_DR1 EQU CYREG_USB_EP0_DR1\r
-USBFS_USB__EP0_DR2 EQU CYREG_USB_EP0_DR2\r
-USBFS_USB__EP0_DR3 EQU CYREG_USB_EP0_DR3\r
-USBFS_USB__EP0_DR4 EQU CYREG_USB_EP0_DR4\r
-USBFS_USB__EP0_DR5 EQU CYREG_USB_EP0_DR5\r
-USBFS_USB__EP0_DR6 EQU CYREG_USB_EP0_DR6\r
-USBFS_USB__EP0_DR7 EQU CYREG_USB_EP0_DR7\r
-USBFS_USB__EP_ACTIVE EQU CYREG_USB_EP_ACTIVE\r
-USBFS_USB__EP_TYPE EQU CYREG_USB_EP_TYPE\r
-USBFS_USB__MEM_DATA EQU CYREG_USB_MEM_DATA_MBASE\r
-USBFS_USB__PM_ACT_CFG EQU CYREG_PM_ACT_CFG5\r
-USBFS_USB__PM_ACT_MSK EQU 0x01\r
-USBFS_USB__PM_STBY_CFG EQU CYREG_PM_STBY_CFG5\r
-USBFS_USB__PM_STBY_MSK EQU 0x01\r
-USBFS_USB__SIE_EP1_CNT0 EQU CYREG_USB_SIE_EP1_CNT0\r
-USBFS_USB__SIE_EP1_CNT1 EQU CYREG_USB_SIE_EP1_CNT1\r
-USBFS_USB__SIE_EP1_CR0 EQU CYREG_USB_SIE_EP1_CR0\r
-USBFS_USB__SIE_EP2_CNT0 EQU CYREG_USB_SIE_EP2_CNT0\r
-USBFS_USB__SIE_EP2_CNT1 EQU CYREG_USB_SIE_EP2_CNT1\r
-USBFS_USB__SIE_EP2_CR0 EQU CYREG_USB_SIE_EP2_CR0\r
-USBFS_USB__SIE_EP3_CNT0 EQU CYREG_USB_SIE_EP3_CNT0\r
-USBFS_USB__SIE_EP3_CNT1 EQU CYREG_USB_SIE_EP3_CNT1\r
-USBFS_USB__SIE_EP3_CR0 EQU CYREG_USB_SIE_EP3_CR0\r
-USBFS_USB__SIE_EP4_CNT0 EQU CYREG_USB_SIE_EP4_CNT0\r
-USBFS_USB__SIE_EP4_CNT1 EQU CYREG_USB_SIE_EP4_CNT1\r
-USBFS_USB__SIE_EP4_CR0 EQU CYREG_USB_SIE_EP4_CR0\r
-USBFS_USB__SIE_EP5_CNT0 EQU CYREG_USB_SIE_EP5_CNT0\r
-USBFS_USB__SIE_EP5_CNT1 EQU CYREG_USB_SIE_EP5_CNT1\r
-USBFS_USB__SIE_EP5_CR0 EQU CYREG_USB_SIE_EP5_CR0\r
-USBFS_USB__SIE_EP6_CNT0 EQU CYREG_USB_SIE_EP6_CNT0\r
-USBFS_USB__SIE_EP6_CNT1 EQU CYREG_USB_SIE_EP6_CNT1\r
-USBFS_USB__SIE_EP6_CR0 EQU CYREG_USB_SIE_EP6_CR0\r
-USBFS_USB__SIE_EP7_CNT0 EQU CYREG_USB_SIE_EP7_CNT0\r
-USBFS_USB__SIE_EP7_CNT1 EQU CYREG_USB_SIE_EP7_CNT1\r
-USBFS_USB__SIE_EP7_CR0 EQU CYREG_USB_SIE_EP7_CR0\r
-USBFS_USB__SIE_EP8_CNT0 EQU CYREG_USB_SIE_EP8_CNT0\r
-USBFS_USB__SIE_EP8_CNT1 EQU CYREG_USB_SIE_EP8_CNT1\r
-USBFS_USB__SIE_EP8_CR0 EQU CYREG_USB_SIE_EP8_CR0\r
-USBFS_USB__SIE_EP_INT_EN EQU CYREG_USB_SIE_EP_INT_EN\r
-USBFS_USB__SIE_EP_INT_SR EQU CYREG_USB_SIE_EP_INT_SR\r
-USBFS_USB__SOF0 EQU CYREG_USB_SOF0\r
-USBFS_USB__SOF1 EQU CYREG_USB_SOF1\r
-USBFS_USB__USBIO_CR0 EQU CYREG_USB_USBIO_CR0\r
-USBFS_USB__USBIO_CR1 EQU CYREG_USB_USBIO_CR1\r
-USBFS_USB__USB_CLK_EN EQU CYREG_USB_USB_CLK_EN\r
-\r
-; SCSI_Out\r
-SCSI_Out__0__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__0__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__0__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__0__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__0__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__0__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__0__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__0__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__0__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__0__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__0__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__0__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__0__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__0__MASK EQU 0x08\r
-SCSI_Out__0__PC EQU CYREG_PRT4_PC3\r
-SCSI_Out__0__PORT EQU 4\r
-SCSI_Out__0__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__0__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__0__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__0__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__0__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__0__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__0__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__0__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__0__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__0__SHIFT EQU 3\r
-SCSI_Out__0__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__1__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__1__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__1__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__1__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__1__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__1__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__1__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__1__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__1__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__1__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__1__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__1__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__1__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__1__MASK EQU 0x04\r
-SCSI_Out__1__PC EQU CYREG_PRT4_PC2\r
-SCSI_Out__1__PORT EQU 4\r
-SCSI_Out__1__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__1__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__1__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__1__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__1__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__1__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__1__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__1__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__1__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__1__SHIFT EQU 2\r
-SCSI_Out__1__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__2__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__2__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__2__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__2__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__2__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__2__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__2__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__2__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__2__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__2__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__2__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__2__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__2__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__2__MASK EQU 0x80\r
-SCSI_Out__2__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__2__PORT EQU 0\r
-SCSI_Out__2__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__2__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__2__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__2__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__2__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__2__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__2__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__2__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__2__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__2__SHIFT EQU 7\r
-SCSI_Out__2__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__3__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__3__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__3__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__3__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__3__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__3__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__3__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__3__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__3__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__3__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__3__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__3__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__3__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__3__MASK EQU 0x40\r
-SCSI_Out__3__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__3__PORT EQU 0\r
-SCSI_Out__3__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__3__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__3__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__3__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__3__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__3__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__3__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__3__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__3__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__3__SHIFT EQU 6\r
-SCSI_Out__3__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__4__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__4__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__4__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__4__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__4__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__4__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__4__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__4__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__4__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__4__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__4__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__4__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__4__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__4__MASK EQU 0x20\r
-SCSI_Out__4__PC EQU CYREG_PRT0_PC5\r
-SCSI_Out__4__PORT EQU 0\r
-SCSI_Out__4__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__4__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__4__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__4__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__4__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__4__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__4__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__4__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__4__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__4__SHIFT EQU 5\r
-SCSI_Out__4__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__5__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__5__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__5__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__5__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__5__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__5__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__5__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__5__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__5__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__5__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__5__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__5__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__5__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__5__MASK EQU 0x10\r
-SCSI_Out__5__PC EQU CYREG_PRT0_PC4\r
-SCSI_Out__5__PORT EQU 0\r
-SCSI_Out__5__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__5__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__5__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__5__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__5__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__5__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__5__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__5__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__5__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__5__SHIFT EQU 4\r
-SCSI_Out__5__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__6__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__6__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__6__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__6__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__6__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__6__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__6__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__6__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__6__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__6__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__6__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__6__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__6__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__6__MASK EQU 0x08\r
-SCSI_Out__6__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__6__PORT EQU 0\r
-SCSI_Out__6__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__6__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__6__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__6__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__6__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__6__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__6__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__6__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__6__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__6__SHIFT EQU 3\r
-SCSI_Out__6__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__7__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__7__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__7__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__7__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__7__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__7__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__7__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__7__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__7__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__7__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__7__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__7__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__7__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__7__MASK EQU 0x04\r
-SCSI_Out__7__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__7__PORT EQU 0\r
-SCSI_Out__7__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__7__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__7__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__7__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__7__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__7__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__7__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__7__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__7__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__7__SHIFT EQU 2\r
-SCSI_Out__7__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__8__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__8__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__8__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__8__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__8__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__8__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__8__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__8__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__8__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__8__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__8__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__8__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__8__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__8__MASK EQU 0x02\r
-SCSI_Out__8__PC EQU CYREG_PRT0_PC1\r
-SCSI_Out__8__PORT EQU 0\r
-SCSI_Out__8__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__8__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__8__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__8__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__8__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__8__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__8__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__8__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__8__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__8__SHIFT EQU 1\r
-SCSI_Out__8__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__9__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__9__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__9__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__9__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__9__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__9__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__9__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__9__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__9__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__9__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__9__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__9__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__9__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__9__MASK EQU 0x01\r
-SCSI_Out__9__PC EQU CYREG_PRT0_PC0\r
-SCSI_Out__9__PORT EQU 0\r
-SCSI_Out__9__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__9__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__9__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__9__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__9__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__9__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__9__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__9__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__9__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__9__SHIFT EQU 0\r
-SCSI_Out__9__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ACK__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__ACK__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__ACK__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__ACK__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__ACK__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__ACK__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__ACK__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__ACK__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__ACK__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__ACK__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__ACK__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__ACK__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__ACK__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__ACK__MASK EQU 0x40\r
-SCSI_Out__ACK__PC EQU CYREG_PRT0_PC6\r
-SCSI_Out__ACK__PORT EQU 0\r
-SCSI_Out__ACK__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__ACK__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__ACK__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__ACK__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__ACK__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__ACK__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__ACK__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__ACK__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__ACK__SHIFT EQU 6\r
-SCSI_Out__ACK__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__ATN__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__ATN__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__ATN__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__ATN__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__ATN__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__ATN__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__ATN__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__ATN__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__ATN__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__ATN__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__ATN__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__ATN__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__ATN__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__ATN__MASK EQU 0x04\r
-SCSI_Out__ATN__PC EQU CYREG_PRT4_PC2\r
-SCSI_Out__ATN__PORT EQU 4\r
-SCSI_Out__ATN__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__ATN__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__ATN__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__ATN__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__ATN__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__ATN__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__ATN__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__ATN__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__ATN__SHIFT EQU 2\r
-SCSI_Out__ATN__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__BSY__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__BSY__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__BSY__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__BSY__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__BSY__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__BSY__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__BSY__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__BSY__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__BSY__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__BSY__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__BSY__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__BSY__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__BSY__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__BSY__MASK EQU 0x80\r
-SCSI_Out__BSY__PC EQU CYREG_PRT0_PC7\r
-SCSI_Out__BSY__PORT EQU 0\r
-SCSI_Out__BSY__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__BSY__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__BSY__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__BSY__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__BSY__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__BSY__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__BSY__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__BSY__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__BSY__SHIFT EQU 7\r
-SCSI_Out__BSY__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__CD__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__CD__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__CD__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__CD__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__CD__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__CD__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__CD__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__CD__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__CD__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__CD__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__CD__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__CD__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__CD__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__CD__MASK EQU 0x04\r
-SCSI_Out__CD__PC EQU CYREG_PRT0_PC2\r
-SCSI_Out__CD__PORT EQU 0\r
-SCSI_Out__CD__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__CD__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__CD__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__CD__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__CD__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__CD__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__CD__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__CD__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__CD__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__CD__SHIFT EQU 2\r
-SCSI_Out__CD__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__DBP_raw__AG EQU CYREG_PRT4_AG\r
-SCSI_Out__DBP_raw__AMUX EQU CYREG_PRT4_AMUX\r
-SCSI_Out__DBP_raw__BIE EQU CYREG_PRT4_BIE\r
-SCSI_Out__DBP_raw__BIT_MASK EQU CYREG_PRT4_BIT_MASK\r
-SCSI_Out__DBP_raw__BYP EQU CYREG_PRT4_BYP\r
-SCSI_Out__DBP_raw__CTL EQU CYREG_PRT4_CTL\r
-SCSI_Out__DBP_raw__DM0 EQU CYREG_PRT4_DM0\r
-SCSI_Out__DBP_raw__DM1 EQU CYREG_PRT4_DM1\r
-SCSI_Out__DBP_raw__DM2 EQU CYREG_PRT4_DM2\r
-SCSI_Out__DBP_raw__DR EQU CYREG_PRT4_DR\r
-SCSI_Out__DBP_raw__INP_DIS EQU CYREG_PRT4_INP_DIS\r
-SCSI_Out__DBP_raw__LCD_COM_SEG EQU CYREG_PRT4_LCD_COM_SEG\r
-SCSI_Out__DBP_raw__LCD_EN EQU CYREG_PRT4_LCD_EN\r
-SCSI_Out__DBP_raw__MASK EQU 0x08\r
-SCSI_Out__DBP_raw__PC EQU CYREG_PRT4_PC3\r
-SCSI_Out__DBP_raw__PORT EQU 4\r
-SCSI_Out__DBP_raw__PRT EQU CYREG_PRT4_PRT\r
-SCSI_Out__DBP_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT4_CAPS_SEL\r
-SCSI_Out__DBP_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT4_DBL_SYNC_IN\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT4_OE_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT4_OE_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT4_OUT_SEL0\r
-SCSI_Out__DBP_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT4_OUT_SEL1\r
-SCSI_Out__DBP_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT4_SYNC_OUT\r
-SCSI_Out__DBP_raw__PS EQU CYREG_PRT4_PS\r
-SCSI_Out__DBP_raw__SHIFT EQU 3\r
-SCSI_Out__DBP_raw__SLW EQU CYREG_PRT4_SLW\r
-SCSI_Out__IO_raw__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__IO_raw__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__IO_raw__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__IO_raw__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__IO_raw__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__IO_raw__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__IO_raw__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__IO_raw__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__IO_raw__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__IO_raw__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__IO_raw__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__IO_raw__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__IO_raw__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__IO_raw__MASK EQU 0x01\r
-SCSI_Out__IO_raw__PC EQU CYREG_PRT0_PC0\r
-SCSI_Out__IO_raw__PORT EQU 0\r
-SCSI_Out__IO_raw__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__IO_raw__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__IO_raw__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__IO_raw__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__IO_raw__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__IO_raw__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__IO_raw__SHIFT EQU 0\r
-SCSI_Out__IO_raw__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__MSG__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__MSG__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__MSG__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__MSG__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__MSG__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__MSG__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__MSG__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__MSG__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__MSG__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__MSG__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__MSG__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__MSG__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__MSG__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__MSG__MASK EQU 0x10\r
-SCSI_Out__MSG__PC EQU CYREG_PRT0_PC4\r
-SCSI_Out__MSG__PORT EQU 0\r
-SCSI_Out__MSG__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__MSG__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__MSG__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__MSG__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__MSG__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__MSG__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__MSG__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__MSG__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__MSG__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__MSG__SHIFT EQU 4\r
-SCSI_Out__MSG__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__REQ__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__REQ__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__REQ__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__REQ__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__REQ__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__REQ__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__REQ__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__REQ__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__REQ__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__REQ__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__REQ__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__REQ__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__REQ__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__REQ__MASK EQU 0x02\r
-SCSI_Out__REQ__PC EQU CYREG_PRT0_PC1\r
-SCSI_Out__REQ__PORT EQU 0\r
-SCSI_Out__REQ__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__REQ__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__REQ__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__REQ__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__REQ__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__REQ__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__REQ__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__REQ__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__REQ__SHIFT EQU 1\r
-SCSI_Out__REQ__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__RST__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__RST__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__RST__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__RST__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__RST__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__RST__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__RST__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__RST__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__RST__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__RST__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__RST__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__RST__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__RST__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__RST__MASK EQU 0x20\r
-SCSI_Out__RST__PC EQU CYREG_PRT0_PC5\r
-SCSI_Out__RST__PORT EQU 0\r
-SCSI_Out__RST__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__RST__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__RST__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__RST__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__RST__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__RST__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__RST__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__RST__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__RST__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__RST__SHIFT EQU 5\r
-SCSI_Out__RST__SLW EQU CYREG_PRT0_SLW\r
-SCSI_Out__SEL__AG EQU CYREG_PRT0_AG\r
-SCSI_Out__SEL__AMUX EQU CYREG_PRT0_AMUX\r
-SCSI_Out__SEL__BIE EQU CYREG_PRT0_BIE\r
-SCSI_Out__SEL__BIT_MASK EQU CYREG_PRT0_BIT_MASK\r
-SCSI_Out__SEL__BYP EQU CYREG_PRT0_BYP\r
-SCSI_Out__SEL__CTL EQU CYREG_PRT0_CTL\r
-SCSI_Out__SEL__DM0 EQU CYREG_PRT0_DM0\r
-SCSI_Out__SEL__DM1 EQU CYREG_PRT0_DM1\r
-SCSI_Out__SEL__DM2 EQU CYREG_PRT0_DM2\r
-SCSI_Out__SEL__DR EQU CYREG_PRT0_DR\r
-SCSI_Out__SEL__INP_DIS EQU CYREG_PRT0_INP_DIS\r
-SCSI_Out__SEL__LCD_COM_SEG EQU CYREG_PRT0_LCD_COM_SEG\r
-SCSI_Out__SEL__LCD_EN EQU CYREG_PRT0_LCD_EN\r
-SCSI_Out__SEL__MASK EQU 0x08\r
-SCSI_Out__SEL__PC EQU CYREG_PRT0_PC3\r
-SCSI_Out__SEL__PORT EQU 0\r
-SCSI_Out__SEL__PRT EQU CYREG_PRT0_PRT\r
-SCSI_Out__SEL__PRTDSI__CAPS_SEL EQU CYREG_PRT0_CAPS_SEL\r
-SCSI_Out__SEL__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT0_DBL_SYNC_IN\r
-SCSI_Out__SEL__PRTDSI__OE_SEL0 EQU CYREG_PRT0_OE_SEL0\r
-SCSI_Out__SEL__PRTDSI__OE_SEL1 EQU CYREG_PRT0_OE_SEL1\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL0 EQU CYREG_PRT0_OUT_SEL0\r
-SCSI_Out__SEL__PRTDSI__OUT_SEL1 EQU CYREG_PRT0_OUT_SEL1\r
-SCSI_Out__SEL__PRTDSI__SYNC_OUT EQU CYREG_PRT0_SYNC_OUT\r
-SCSI_Out__SEL__PS EQU CYREG_PRT0_PS\r
-SCSI_Out__SEL__SHIFT EQU 3\r
-SCSI_Out__SEL__SLW EQU CYREG_PRT0_SLW\r
-\r
-; USBFS_Dm\r
-USBFS_Dm__0__MASK EQU 0x80\r
-USBFS_Dm__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC1\r
-USBFS_Dm__0__PORT EQU 15\r
-USBFS_Dm__0__SHIFT EQU 7\r
-USBFS_Dm__AG EQU CYREG_PRT15_AG\r
-USBFS_Dm__AMUX EQU CYREG_PRT15_AMUX\r
-USBFS_Dm__BIE EQU CYREG_PRT15_BIE\r
-USBFS_Dm__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-USBFS_Dm__BYP EQU CYREG_PRT15_BYP\r
-USBFS_Dm__CTL EQU CYREG_PRT15_CTL\r
-USBFS_Dm__DM0 EQU CYREG_PRT15_DM0\r
-USBFS_Dm__DM1 EQU CYREG_PRT15_DM1\r
-USBFS_Dm__DM2 EQU CYREG_PRT15_DM2\r
-USBFS_Dm__DR EQU CYREG_PRT15_DR\r
-USBFS_Dm__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-USBFS_Dm__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-USBFS_Dm__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-USBFS_Dm__MASK EQU 0x80\r
-USBFS_Dm__PORT EQU 15\r
-USBFS_Dm__PRT EQU CYREG_PRT15_PRT\r
-USBFS_Dm__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-USBFS_Dm__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-USBFS_Dm__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-USBFS_Dm__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-USBFS_Dm__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-USBFS_Dm__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-USBFS_Dm__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-USBFS_Dm__PS EQU CYREG_PRT15_PS\r
-USBFS_Dm__SHIFT EQU 7\r
-USBFS_Dm__SLW EQU CYREG_PRT15_SLW\r
-\r
-; USBFS_Dp\r
-USBFS_Dp__0__MASK EQU 0x40\r
-USBFS_Dp__0__PC EQU CYREG_IO_PC_PRT15_7_6_PC0\r
-USBFS_Dp__0__PORT EQU 15\r
-USBFS_Dp__0__SHIFT EQU 6\r
-USBFS_Dp__AG EQU CYREG_PRT15_AG\r
-USBFS_Dp__AMUX EQU CYREG_PRT15_AMUX\r
-USBFS_Dp__BIE EQU CYREG_PRT15_BIE\r
-USBFS_Dp__BIT_MASK EQU CYREG_PRT15_BIT_MASK\r
-USBFS_Dp__BYP EQU CYREG_PRT15_BYP\r
-USBFS_Dp__CTL EQU CYREG_PRT15_CTL\r
-USBFS_Dp__DM0 EQU CYREG_PRT15_DM0\r
-USBFS_Dp__DM1 EQU CYREG_PRT15_DM1\r
-USBFS_Dp__DM2 EQU CYREG_PRT15_DM2\r
-USBFS_Dp__DR EQU CYREG_PRT15_DR\r
-USBFS_Dp__INP_DIS EQU CYREG_PRT15_INP_DIS\r
-USBFS_Dp__INTSTAT EQU CYREG_PICU15_INTSTAT\r
-USBFS_Dp__LCD_COM_SEG EQU CYREG_PRT15_LCD_COM_SEG\r
-USBFS_Dp__LCD_EN EQU CYREG_PRT15_LCD_EN\r
-USBFS_Dp__MASK EQU 0x40\r
-USBFS_Dp__PORT EQU 15\r
-USBFS_Dp__PRT EQU CYREG_PRT15_PRT\r
-USBFS_Dp__PRTDSI__CAPS_SEL EQU CYREG_PRT15_CAPS_SEL\r
-USBFS_Dp__PRTDSI__DBL_SYNC_IN EQU CYREG_PRT15_DBL_SYNC_IN\r
-USBFS_Dp__PRTDSI__OE_SEL0 EQU CYREG_PRT15_OE_SEL0\r
-USBFS_Dp__PRTDSI__OE_SEL1 EQU CYREG_PRT15_OE_SEL1\r
-USBFS_Dp__PRTDSI__OUT_SEL0 EQU CYREG_PRT15_OUT_SEL0\r
-USBFS_Dp__PRTDSI__OUT_SEL1 EQU CYREG_PRT15_OUT_SEL1\r
-USBFS_Dp__PRTDSI__SYNC_OUT EQU CYREG_PRT15_SYNC_OUT\r
-USBFS_Dp__PS EQU CYREG_PRT15_PS\r
-USBFS_Dp__SHIFT EQU 6\r
-USBFS_Dp__SLW EQU CYREG_PRT15_SLW\r
-USBFS_Dp__SNAP EQU CYREG_PICU_15_SNAP_15\r
-\r
-; Miscellaneous\r
-; -- WARNING: define names containing LEOPARD or PANTHER are deprecated and will be removed in a future release\r
-CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO EQU 0\r
-CYDEV_DEBUGGING_DPS_SWD_SWV EQU 6\r
-CYDEV_CONFIG_UNUSED_IO_AllowButWarn EQU 0\r
-CYDEV_CONFIGURATION_MODE_COMPRESSED EQU 0\r
-CYDEV_CONFIG_FASTBOOT_ENABLED EQU 1\r
-CYDEV_CHIP_REV_PSOC5LP_PRODUCTION EQU 0\r
-CYDEV_CHIP_REVISION_5B_PRODUCTION EQU 0\r
-CYDEV_CHIP_MEMBER_5B EQU 4\r
-CYDEV_CHIP_FAMILY_PSOC5 EQU 3\r
-CYDEV_CHIP_DIE_PSOC5LP EQU 4\r
-CYDEV_CHIP_DIE_EXPECT EQU CYDEV_CHIP_DIE_PSOC5LP\r
-CYDEV_BOOTLOADER_IO_COMP_USBFS EQU 1\r
-BCLK__BUS_CLK__HZ EQU 64000000\r
-BCLK__BUS_CLK__KHZ EQU 64000\r
-BCLK__BUS_CLK__MHZ EQU 64\r
-CYDEV_BOOTLOADER_APPLICATIONS EQU 1\r
-CYDEV_BOOTLOADER_CHECKSUM_BASIC EQU 0\r
-CYDEV_BOOTLOADER_CHECKSUM_CRC EQU 1\r
-CYDEV_BOOTLOADER_IO_COMP EQU CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-CYDEV_CHIP_DIE_ACTUAL EQU CYDEV_CHIP_DIE_EXPECT\r
-CYDEV_CHIP_DIE_LEOPARD EQU 1\r
-CYDEV_CHIP_DIE_PANTHER EQU 3\r
-CYDEV_CHIP_DIE_PSOC4A EQU 2\r
-CYDEV_CHIP_DIE_UNKNOWN EQU 0\r
-CYDEV_CHIP_FAMILY_PSOC3 EQU 1\r
-CYDEV_CHIP_FAMILY_PSOC4 EQU 2\r
-CYDEV_CHIP_FAMILY_UNKNOWN EQU 0\r
-CYDEV_CHIP_FAMILY_USED EQU CYDEV_CHIP_FAMILY_PSOC5\r
-CYDEV_CHIP_JTAG_ID EQU 0x2E133069\r
-CYDEV_CHIP_MEMBER_3A EQU 1\r
-CYDEV_CHIP_MEMBER_4A EQU 2\r
-CYDEV_CHIP_MEMBER_5A EQU 3\r
-CYDEV_CHIP_MEMBER_UNKNOWN EQU 0\r
-CYDEV_CHIP_MEMBER_USED EQU CYDEV_CHIP_MEMBER_5B\r
-CYDEV_CHIP_REVISION_3A_ES1 EQU 0\r
-CYDEV_CHIP_REVISION_3A_ES2 EQU 1\r
-CYDEV_CHIP_REVISION_3A_ES3 EQU 3\r
-CYDEV_CHIP_REVISION_3A_PRODUCTION EQU 3\r
-CYDEV_CHIP_REVISION_4A_ES0 EQU 17\r
-CYDEV_CHIP_REVISION_4A_PRODUCTION EQU 17\r
-CYDEV_CHIP_REVISION_5A_ES0 EQU 0\r
-CYDEV_CHIP_REVISION_5A_ES1 EQU 1\r
-CYDEV_CHIP_REVISION_5A_PRODUCTION EQU 1\r
-CYDEV_CHIP_REVISION_5B_ES0 EQU 0\r
-CYDEV_CHIP_REVISION_USED EQU CYDEV_CHIP_REVISION_5B_PRODUCTION\r
-CYDEV_CHIP_REV_EXPECT EQU CYDEV_CHIP_REV_PSOC5LP_PRODUCTION\r
-CYDEV_CHIP_REV_LEOPARD_ES1 EQU 0\r
-CYDEV_CHIP_REV_LEOPARD_ES2 EQU 1\r
-CYDEV_CHIP_REV_LEOPARD_ES3 EQU 3\r
-CYDEV_CHIP_REV_LEOPARD_PRODUCTION EQU 3\r
-CYDEV_CHIP_REV_PANTHER_ES0 EQU 0\r
-CYDEV_CHIP_REV_PANTHER_ES1 EQU 1\r
-CYDEV_CHIP_REV_PANTHER_PRODUCTION EQU 1\r
-CYDEV_CHIP_REV_PSOC4A_ES0 EQU 17\r
-CYDEV_CHIP_REV_PSOC4A_PRODUCTION EQU 17\r
-CYDEV_CHIP_REV_PSOC5LP_ES0 EQU 0\r
-CYDEV_CONFIGURATION_COMPRESSED EQU 1\r
-CYDEV_CONFIGURATION_DMA EQU 0\r
-CYDEV_CONFIGURATION_ECC EQU 0\r
-CYDEV_CONFIGURATION_IMOENABLED EQU CYDEV_CONFIG_FASTBOOT_ENABLED\r
-CYDEV_CONFIGURATION_MODE EQU CYDEV_CONFIGURATION_MODE_COMPRESSED\r
-CYDEV_CONFIGURATION_MODE_DMA EQU 2\r
-CYDEV_CONFIGURATION_MODE_UNCOMPRESSED EQU 1\r
-CYDEV_CONFIG_UNUSED_IO EQU CYDEV_CONFIG_UNUSED_IO_AllowButWarn\r
-CYDEV_CONFIG_UNUSED_IO_AllowWithInfo EQU 1\r
-CYDEV_CONFIG_UNUSED_IO_Disallowed EQU 2\r
-CYDEV_DEBUGGING_DPS EQU CYDEV_DEBUGGING_DPS_SWD_SWV\r
-CYDEV_DEBUGGING_DPS_Disable EQU 3\r
-CYDEV_DEBUGGING_DPS_JTAG_4 EQU 1\r
-CYDEV_DEBUGGING_DPS_JTAG_5 EQU 0\r
-CYDEV_DEBUGGING_DPS_SWD EQU 2\r
-CYDEV_DEBUGGING_ENABLE EQU 1\r
-CYDEV_DEBUGGING_XRES EQU 0\r
-CYDEV_DEBUG_ENABLE_MASK EQU 0x20\r
-CYDEV_DEBUG_ENABLE_REGISTER EQU CYREG_MLOGIC_DEBUG\r
-CYDEV_DMA_CHANNELS_AVAILABLE EQU 24\r
-CYDEV_ECC_ENABLE EQU 0\r
-CYDEV_HEAP_SIZE EQU 0x0800\r
-CYDEV_INSTRUCT_CACHE_ENABLED EQU 1\r
-CYDEV_INTR_RISING EQU 0x00000000\r
-CYDEV_PROJ_TYPE EQU 1\r
-CYDEV_PROJ_TYPE_BOOTLOADER EQU 1\r
-CYDEV_PROJ_TYPE_LOADABLE EQU 2\r
-CYDEV_PROJ_TYPE_MULTIAPPBOOTLOADER EQU 3\r
-CYDEV_PROJ_TYPE_STANDARD EQU 0\r
-CYDEV_PROTECTION_ENABLE EQU 0\r
-CYDEV_STACK_SIZE EQU 0x2000\r
-CYDEV_USB_CLK_OSC_LOCKING_ENABLED_AT_PWR_UP EQU 1\r
-CYDEV_USE_BUNDLED_CMSIS EQU 1\r
-CYDEV_VARIABLE_VDDA EQU 0\r
-CYDEV_VDDA_MV EQU 5000\r
-CYDEV_VDDD_MV EQU 5000\r
-CYDEV_VDDIO0_MV EQU 5000\r
-CYDEV_VDDIO1_MV EQU 5000\r
-CYDEV_VDDIO2_MV EQU 5000\r
-CYDEV_VDDIO3_MV EQU 5000\r
-CYDEV_VIO0 EQU 5\r
-CYDEV_VIO0_MV EQU 5000\r
-CYDEV_VIO1 EQU 5\r
-CYDEV_VIO1_MV EQU 5000\r
-CYDEV_VIO2 EQU 5\r
-CYDEV_VIO2_MV EQU 5000\r
-CYDEV_VIO3 EQU 5\r
-CYDEV_VIO3_MV EQU 5000\r
-CyBtldr_Custom_Interface EQU CYDEV_BOOTLOADER_IO_COMP_CUSTOM_IO\r
-CyBtldr_USBFS EQU CYDEV_BOOTLOADER_IO_COMP_USBFS\r
-DMA_CHANNELS_USED__MASK0 EQU 0x00000000\r
-CYDEV_BOOTLOADER_ENABLE EQU 1\r
-    ENDIF\r
-    END\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cymetadata.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cymetadata.c
deleted file mode 100755 (executable)
index 00c7240..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cymetadata.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cymetadata.c\r
-* \r
-* PSoC Creator 3.0 Component Pack 7\r
-*\r
-* DESCRIPTION:\r
-* This file defines all extra memory spaces that need to be included.\r
-* This file is automatically generated by PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions, \r
-* disclaimers, and limitations in the end user license agreement accompanying \r
-* the software package with which this file was provided.\r
-********************************************************************************/\r
-\r
-\r
-#include "cytypes.h"\r
-\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cyloadermeta"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cyloadermeta"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_meta_loader[] = {\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x01u, 0x00u, 0x01u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u\r
-};\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cyconfigecc"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cyconfigecc"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_meta_configecc[] = {\r
-    0x00u\r
-};\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cycustnvl"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cycustnvl"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_meta_custnvl[] = {\r
-    0x80u, 0x00u, 0x40u, 0x05u\r
-};\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cywolatch"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cywolatch"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_meta_wonvl[] = {\r
-    0xBCu, 0x90u, 0xACu, 0xAFu\r
-};\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cyflashprotect"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cyflashprotect"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_meta_flashprotect[] = {\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u,\r
-    0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u\r
-};\r
-\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION)\r
-__attribute__ ((__section__(".cymeta"), used))\r
-#elif defined(__ICCARM__)\r
-#pragma  location=".cymeta"\r
-#else\r
-#error "Unsupported toolchain"\r
-#endif\r
-const uint8 cy_metadata[] = {\r
-    0x00u, 0x01u, 0x2Eu, 0x13u, 0x30u, 0x69u, 0x00u, 0x01u,\r
-    0x00u, 0x00u, 0x00u, 0x00u\r
-};\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cypins.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cypins.h
deleted file mode 100755 (executable)
index 3af7484..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cypins.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/*******************************************************************************\r
-* File Name: cypins.h\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   This file contains the function prototypes and constants used for port/pin\r
-*   in access and control.\r
-*\r
-*  Note:\r
-*   Documentation of the API's in this file is located in the\r
-*   System Reference Guide provided with PSoC Creator.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYPINS_H)\r
-#define CY_BOOT_CYPINS_H\r
-\r
-#include "cyfitter.h"\r
-#include "cytypes.h"\r
-\r
-\r
-/**************************************\r
-*        API Parameter Constants\r
-**************************************/\r
-\r
-#define CY_PINS_PC_DRIVE_MODE_SHIFT (0x01u)\r
-#define CY_PINS_PC_DRIVE_MODE_MASK  ((uint8)(0x07u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_0     ((uint8)(0x00u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_1     ((uint8)(0x01u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_2     ((uint8)(0x02u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_3     ((uint8)(0x03u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_4     ((uint8)(0x04u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_5     ((uint8)(0x05u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_6     ((uint8)(0x06u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-#define CY_PINS_PC_DRIVE_MODE_7     ((uint8)(0x07u << CY_PINS_PC_DRIVE_MODE_SHIFT))\r
-\r
-\r
-/*  SetPinDriveMode */\r
-#define CY_PINS_DM_ALG_HIZ          (CY_PINS_PC_DRIVE_MODE_0)\r
-#define CY_PINS_DM_DIG_HIZ          (CY_PINS_PC_DRIVE_MODE_1)\r
-#define CY_PINS_DM_RES_UP           (CY_PINS_PC_DRIVE_MODE_2)\r
-#define CY_PINS_DM_RES_DWN          (CY_PINS_PC_DRIVE_MODE_3)\r
-#define CY_PINS_DM_OD_LO            (CY_PINS_PC_DRIVE_MODE_4)\r
-#define CY_PINS_DM_OD_HI            (CY_PINS_PC_DRIVE_MODE_5)\r
-#define CY_PINS_DM_STRONG           (CY_PINS_PC_DRIVE_MODE_6)\r
-#define CY_PINS_DM_RES_UPDWN        (CY_PINS_PC_DRIVE_MODE_7)\r
-\r
-\r
-/**************************************\r
-*       Register Constants\r
-**************************************/\r
-\r
-/* Port Pin Configuration Register */\r
-#define CY_PINS_PC_DATAOUT          (0x01u)\r
-#define CY_PINS_PC_PIN_FASTSLEW     (0xBFu)\r
-#define CY_PINS_PC_PIN_SLOWSLEW     (0x40u)\r
-#define CY_PINS_PC_PIN_STATE        (0x10u)\r
-#define CY_PINS_PC_BIDIR_EN         (0x20u)\r
-#define CY_PINS_PC_SLEW             (0x40u)\r
-#define CY_PINS_PC_BYPASS           (0x80u)\r
-\r
-\r
-/**************************************\r
-*       Pin API Macros\r
-**************************************/\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_ReadPin\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Reads the current value on the pin (pin state, PS).\r
-*\r
-* Parameters:\r
-*   pinPC: Port pin configuration register (uint16).\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-* Return:\r
-*   Pin state\r
-*    0: Logic low value\r
-*    Non-0: Logic high value\r
-*\r
-*******************************************************************************/\r
-#define CyPins_ReadPin(pinPC)    ( *(reg8 *)(pinPC) & CY_PINS_PC_PIN_STATE )\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_SetPin\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Set the output value for the pin (data register, DR) to a logic high.\r
-*\r
-*  Note that this only has an effect for pins configured as software pins that\r
-*  are not driven by hardware.\r
-*\r
-* Parameters:\r
-*   pinPC: Port pin configuration register (uint16).\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-#define CyPins_SetPin(pinPC)     ( *(reg8 *)(pinPC) |= CY_PINS_PC_DATAOUT)\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_ClearPin\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  This macro sets the state of the specified pin to 0\r
-*\r
-* Parameters:\r
-*   pinPC: address of a Pin Configuration register.\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-#define CyPins_ClearPin(pinPC)   ( *(reg8 *)(pinPC) &= ((uint8)(~CY_PINS_PC_DATAOUT)))\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_SetPinDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Sets the drive mode for the pin (DM).\r
-*\r
-* Parameters:\r
-*   pinPC: Port pin configuration register (uint16)\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-*   mode: Desired drive mode\r
-*\r
-*   Define                Source\r
-*   PIN_DM_ALG_HIZ        Analog HiZ\r
-*   PIN_DM_DIG_HIZ        Digital HiZ\r
-*   PIN_DM_RES_UP        Resistive pull up\r
-*   PIN_DM_RES_DWN        Resistive pull down\r
-*   PIN_DM_OD_LO        Open drain - drive low\r
-*   PIN_DM_OD_HI        Open drain - drive high\r
-*   PIN_DM_STRONG        Strong CMOS Output\r
-*   PIN_DM_RES_UPDWN    Resistive pull up/down\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-#define CyPins_SetPinDriveMode(pinPC, mode) \\r
-            ( *(reg8 *)(pinPC) = (*(reg8 *)(pinPC) & ((uint8)(~CY_PINS_PC_DRIVE_MODE_MASK))) | \\r
-            ((mode) & CY_PINS_PC_DRIVE_MODE_MASK))\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_ReadPinDriveMode\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Reads the drive mode for the pin (DM).\r
-*\r
-* Parameters:\r
-*   pinPC: Port pin configuration register (uint16)\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-*\r
-* Return:\r
-*   mode:  Current drive mode for the pin\r
-*\r
-*   Define                Source\r
-*   PIN_DM_ALG_HIZ        Analog HiZ\r
-*   PIN_DM_DIG_HIZ        Digital HiZ\r
-*   PIN_DM_RES_UP        Resistive pull up\r
-*   PIN_DM_RES_DWN        Resistive pull down\r
-*   PIN_DM_OD_LO        Open drain - drive low\r
-*   PIN_DM_OD_HI        Open drain - drive high\r
-*   PIN_DM_STRONG        Strong CMOS Output\r
-*   PIN_DM_RES_UPDWN    Resistive pull up/down\r
-*\r
-*******************************************************************************/\r
-#define CyPins_ReadPinDriveMode(pinPC)      (*(reg8 *)(pinPC) & CY_PINS_PC_DRIVE_MODE_MASK)\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_FastSlew\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Set the slew rate for the pin to fast edge rate.\r
-*  Note that this only applies for pins in strong output drive modes,\r
-*  not to resistive drive modes.\r
-*\r
-* Parameters:\r
-*   pinPC: address of a Pin Configuration register.\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-#define CyPins_FastSlew(pinPC)      (*(reg8 *)(pinPC) = (*(reg8 *)(pinPC) & CY_PINS_PC_PIN_FASTSLEW))\r
-\r
-\r
-/*******************************************************************************\r
-* Macro Name: CyPins_SlowSlew\r
-********************************************************************************\r
-*\r
-* Summary:\r
-*  Set the slew rate for the pin to slow edge rate.\r
-*  Note that this only applies for pins in strong output drive modes,\r
-*  not to resistive drive modes.\r
-*\r
-* Parameters:\r
-*   pinPC: address of a Pin Configuration register.\r
-*   #defines for each pin on a chip are provided in the cydevice_trm.h file\r
-*   in the form:\r
-*       CYREG_PRTx_PCy\r
-*\r
-*   where x is a port number 0 - 15 and y is a pin number 0 - 7\r
-*\r
-* Return:\r
-*   None\r
-*\r
-*******************************************************************************/\r
-#define CyPins_SlowSlew(pinPC)      (*(reg8 *)(pinPC) = (*(reg8 *)(pinPC) | CY_PINS_PC_PIN_SLOWSLEW))\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.30\r
-*******************************************************************************/\r
-#define PC_DRIVE_MODE_SHIFT (CY_PINS_PC_DRIVE_MODE_SHIFT)\r
-#define PC_DRIVE_MODE_MASK  (CY_PINS_PC_DRIVE_MODE_MASK)\r
-#define PC_DRIVE_MODE_0     (CY_PINS_PC_DRIVE_MODE_0)\r
-#define PC_DRIVE_MODE_1     (CY_PINS_PC_DRIVE_MODE_1)\r
-#define PC_DRIVE_MODE_2     (CY_PINS_PC_DRIVE_MODE_2)\r
-#define PC_DRIVE_MODE_3     (CY_PINS_PC_DRIVE_MODE_3)\r
-#define PC_DRIVE_MODE_4     (CY_PINS_PC_DRIVE_MODE_4)\r
-#define PC_DRIVE_MODE_5     (CY_PINS_PC_DRIVE_MODE_5)\r
-#define PC_DRIVE_MODE_6     (CY_PINS_PC_DRIVE_MODE_6)\r
-#define PC_DRIVE_MODE_7     (CY_PINS_PC_DRIVE_MODE_7)\r
-\r
-#define PIN_DM_ALG_HIZ      (CY_PINS_DM_ALG_HIZ)\r
-#define PIN_DM_DIG_HIZ      (CY_PINS_DM_DIG_HIZ)\r
-#define PIN_DM_RES_UP       (CY_PINS_DM_RES_UP)\r
-#define PIN_DM_RES_DWN      (CY_PINS_DM_RES_DWN)\r
-#define PIN_DM_OD_LO        (CY_PINS_DM_OD_LO)\r
-#define PIN_DM_OD_HI        (CY_PINS_DM_OD_HI)\r
-#define PIN_DM_STRONG       (CY_PINS_DM_STRONG)\r
-#define PIN_DM_RES_UPDWN    (CY_PINS_DM_RES_UPDWN)\r
-\r
-#define PC_DATAOUT          (CY_PINS_PC_DATAOUT)\r
-#define PC_PIN_FASTSLEW     (CY_PINS_PC_PIN_FASTSLEW)\r
-#define PC_PIN_SLOWSLEW     (CY_PINS_PC_PIN_SLOWSLEW)\r
-#define PC_PIN_STATE        (CY_PINS_PC_PIN_STATE)\r
-#define PC_BIDIR_EN         (CY_PINS_PC_BIDIR_EN)\r
-#define PC_SLEW             (CY_PINS_PC_SLEW)\r
-#define PC_BYPASS           (CY_PINS_PC_BYPASS)\r
-\r
-#endif /* (CY_BOOT_CYPINS_H) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cytypes.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cytypes.h
deleted file mode 100755 (executable)
index c2a20ad..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cytypes.h
+++ /dev/null
@@ -1,438 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cytypes.h\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*  CyTypes provides register access macros and approved types for use in\r
-*  firmware.\r
-*\r
-*  Note:\r
-*  Due to endiannesses of the hardware and some compilers, the register\r
-*  access macros for big endian compilers use some library calls to arrange\r
-*  data the correct way.\r
-*\r
-*  Register Access macros and functions perform their operations on an\r
-*  input of type pointer to void.  The arguments passed to it should be\r
-*  pointers to the type associated with the register size.\r
-*  (i.e. a "uint8 *" shouldn't be passed to obtain a 16-bit register value)\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#if !defined(CY_BOOT_CYTYPES_H)\r
-#define CY_BOOT_CYTYPES_H\r
-\r
-#if defined(__C51__)\r
-    #include <intrins.h>\r
-#endif  /* (__C51__) */\r
-\r
-/* ARM and C99 or later */\r
-#if defined(__GNUC__) || defined(__ARMCC_VERSION) || (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L)\r
-    #include <stdint.h>\r
-#endif  /* (__GNUC__) || defined(__ARMCC_VERSION) || (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) */\r
-\r
-#include "cyfitter.h"\r
-\r
-\r
-#if defined( __ICCARM__ )\r
-    /* Suppress warning for multiple volatile variables in an expression. */\r
-    /* This is common in component code and the usage is not order dependent. */\r
-    #pragma diag_suppress=Pa082\r
-#endif  /* defined( __ICCARM__ ) */\r
-\r
-\r
-/***************************************\r
-* Conditional Compilation Parameters\r
-***************************************/\r
-\r
-\r
-/*******************************************************************************\r
-* FAMILY encodes the overall architectural family\r
-*******************************************************************************/\r
-#define CY_PSOC3 (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC3)\r
-#define CY_PSOC4 (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC4)\r
-#define CY_PSOC5 (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC5)\r
-\r
-\r
-/*******************************************************************************\r
-* MEMBER encodes both the family and the detailed architecture\r
-*******************************************************************************/\r
-#define CY_PSOC4A  (CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_4A)\r
-#ifdef CYDEV_CHIP_MEMBER_4D\r
-    #define CY_PSOC4D   (CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_4D)\r
-    #define CY_PSOC4SF  (CY_PSOC4D)\r
-#else\r
-    #define CY_PSOC4D   (0u != 0u)\r
-    #define CY_PSOC4SF  (CY_PSOC4D)\r
-#endif  /* CYDEV_CHIP_MEMBER_4D */\r
-\r
-#define CY_PSOC5A  (CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_5A)\r
-#ifdef CYDEV_CHIP_MEMBER_5B\r
-    #define CY_PSOC5LP  (CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_5B)\r
-#else\r
-    #define CY_PSOC5LP  (0u != 0u)\r
-#endif  /* CYDEV_CHIP_MEMBER_5B */\r
-\r
-\r
-/*******************************************************************************\r
-* UDB revisions\r
-*******************************************************************************/\r
-#define CY_UDB_V0 (CY_PSOC5A)\r
-#define CY_UDB_V1 (!CY_UDB_V0)\r
-\r
-\r
-/*******************************************************************************\r
-*   Base Types. Acceptable types from MISRA-C specifying signedness and size.\r
-*******************************************************************************/\r
-typedef unsigned char   uint8;\r
-typedef unsigned short  uint16;\r
-typedef unsigned long   uint32;\r
-typedef signed   char   int8;\r
-typedef signed   short  int16;\r
-typedef signed   long   int32;\r
-typedef          float  float32;\r
-\r
-#if(!CY_PSOC3)\r
-\r
-    typedef               double float64;\r
-    typedef          long long   int64;\r
-    typedef unsigned long long   uint64;\r
-\r
-#endif  /* (!CY_PSOC3) */\r
-\r
-/* Signed or unsigned depending on the compiler selection */\r
-typedef          char   char8;\r
-\r
-\r
-/*******************************************************************************\r
-*   Memory address functions prototypes\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    /***************************************************************************\r
-    * Prototypes for absolute memory address functions (cymem.a51) with built-in\r
-    * endian conversion. These functions should be called through the\r
-    * CY_GET_XTND_REGxx and CY_SET_XTND_REGxx macros.\r
-    ***************************************************************************/\r
-    extern uint8  cyread8       (const volatile void far *addr);\r
-    extern void   cywrite8      (volatile void far *addr, uint8 value);\r
-\r
-    extern uint16 cyread16      (const volatile void far *addr);\r
-    extern uint16 cyread16_nodpx(const volatile void far *addr);\r
-\r
-    extern void   cywrite16      (volatile void far *addr, uint16 value);\r
-    extern void   cywrite16_nodpx(volatile void far *addr, uint16 value);\r
-\r
-    extern uint32 cyread24      (const volatile void far *addr);\r
-    extern uint32 cyread24_nodpx(const volatile void far *addr);\r
-\r
-    extern void   cywrite24      (volatile void far *addr, uint32 value);\r
-    extern void   cywrite24_nodpx(volatile void far *addr, uint32 value);\r
-\r
-    extern uint32 cyread32      (const volatile void far *addr);\r
-    extern uint32 cyread32_nodpx(const volatile void far *addr);\r
-\r
-    extern void   cywrite32      (volatile void far *addr, uint32 value);\r
-    extern void   cywrite32_nodpx(volatile void far *addr, uint32 value);\r
-\r
-\r
-    /***************************************************************************\r
-    * Memory access routines from cymem.a51 for the generated device\r
-    * configuration code. These functions may be subject to change in future\r
-    * revisions of the cy_boot component and they are not available for all\r
-    * devices. Most code should use memset or memcpy instead.\r
-    ***************************************************************************/\r
-    void cymemzero(void far *addr, uint16 size);\r
-    void cyconfigcpy(uint16 size, const void far *src, void far *dest) large;\r
-    void cyconfigcpycode(uint16 size, const void code *src, void far *dest);\r
-\r
-    #define CYCONFIGCPY_DECLARED    (1)\r
-\r
-#else\r
-\r
-    /* Prototype for function to set a 24-bit register. Located at cyutils.c */\r
-    extern void     CySetReg24(uint32 volatile * addr, uint32 value);\r
-\r
-    #if(CY_PSOC4)\r
-\r
-        extern uint32 CyGetReg24(uint32 const volatile * addr);\r
-\r
-    #endif  /* (CY_PSOC4) */\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-*   Memory model definitions. To allow code to be 8051-ARM agnostic.\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    #define CYBDATA     bdata\r
-    #define CYBIT       bit\r
-    #define CYCODE      code\r
-    #define CYCOMPACT   compact\r
-    #define CYDATA      data\r
-    #define CYFAR       far\r
-    #define CYIDATA     idata\r
-    #define CYLARGE     large\r
-    #define CYPDATA     pdata\r
-    #define CYREENTRANT reentrant\r
-    #define CYSMALL     small\r
-    #define CYXDATA     xdata\r
-    #define XDATA       xdata\r
-\r
-    #define CY_NOINIT\r
-\r
-#else\r
-\r
-    #define CYBDATA\r
-    #define CYBIT      uint8\r
-    #define CYCODE\r
-    #define CYCOMPACT\r
-    #define CYDATA\r
-    #define CYFAR\r
-    #define CYIDATA\r
-    #define CYLARGE\r
-    #define CYPDATA\r
-    #define CYREENTRANT\r
-    #define CYSMALL\r
-    #define CYXDATA\r
-    #define XDATA\r
-\r
-    #if defined(__ARMCC_VERSION)\r
-        #define CY_NOINIT           __attribute__ ((section(".noinit"), zero_init))\r
-        #define CY_NORETURN         __attribute__ ((noreturn))\r
-        #define CY_SECTION(name)    __attribute__ ((section(name)))\r
-        #define CY_ALIGN(align)     __align(align)\r
-    #elif defined (__GNUC__)\r
-        #define CY_NOINIT           __attribute__ ((section(".noinit")))\r
-        #define CY_NORETURN         __attribute__ ((noreturn))\r
-        #define CY_SECTION(name)    __attribute__ ((section(name)))\r
-        #define CY_ALIGN(align)     __attribute__ ((aligned(align)))\r
-    #elif defined (__ICCARM__)\r
-        #define CY_NOINIT           __no_init\r
-        #define CY_NORETURN         __noreturn\r
-    #endif  /* (__ARMCC_VERSION) */\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-#if(CY_PSOC3)\r
-\r
-    /* 8051 naturally returns an 8 bit value. */\r
-    typedef unsigned char cystatus;\r
-\r
-#else\r
-\r
-    /* ARM naturally returns a 32 bit value. */\r
-    typedef unsigned long cystatus;\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-*  Hardware Register Types.\r
-*******************************************************************************/\r
-typedef volatile uint8  CYXDATA reg8;\r
-typedef volatile uint16 CYXDATA reg16;\r
-typedef volatile uint32 CYXDATA reg32;\r
-\r
-\r
-/*******************************************************************************\r
-*  Interrupt Types and Macros\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    #define CY_ISR(FuncName)        void FuncName (void) interrupt 0\r
-    #define CY_ISR_PROTO(FuncName)  void FuncName (void)\r
-    typedef void (CYCODE * cyisraddress)(void);\r
-\r
-#else\r
-\r
-    #define CY_ISR(FuncName)        void FuncName (void)\r
-    #define CY_ISR_PROTO(FuncName)  void FuncName (void)\r
-    typedef void (* cyisraddress)(void);\r
-\r
-    #if defined (__ICCARM__)\r
-        typedef union { cyisraddress __fun; void * __ptr; } intvec_elem;\r
-    #endif  /* defined (__ICCARM__) */\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-*  Register Access\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-\r
-    /*******************************************************************************\r
-    * KEIL for the 8051 is a big endian compiler This causes problems as the on chip\r
-    * registers are little endian.  Byte swapping for two and four byte registers is\r
-    * implemented in the functions below.  This will require conditional compilation\r
-    * of function prototypes in code.\r
-    *******************************************************************************/\r
-\r
-    /* Access macros for 8, 16, 24 and 32-bit registers, IN THE FIRST 64K OF XDATA */\r
-\r
-    #define CY_GET_REG8(addr)               (*((const reg8 *)(addr)))\r
-    #define CY_SET_REG8(addr, value)        (*((reg8 *)(addr))  = (uint8)(value))\r
-\r
-    #define CY_GET_REG16(addr)              cyread16_nodpx ((const volatile void far *)(const reg16 *)(addr))\r
-    #define CY_SET_REG16(addr, value)       cywrite16_nodpx((volatile void far *)(reg16 *)(addr), value)\r
-\r
-    #define CY_GET_REG24(addr)              cyread24_nodpx ((const volatile void far *)(const reg32 *)(addr))\r
-    #define CY_SET_REG24(addr, value)       cywrite24_nodpx((volatile void far *)(reg32 *)(addr),value)\r
-\r
-    #define CY_GET_REG32(addr)              cyread32_nodpx ((const volatile void far *)(const reg32 *)(addr))\r
-    #define CY_SET_REG32(addr, value)       cywrite32_nodpx((volatile void far *)(reg32 *)(addr), value)\r
-\r
-    /* Access 8, 16, 24 and 32-bit registers, ABOVE THE FIRST 64K OF XDATA */\r
-    #define CY_GET_XTND_REG8(addr)          cyread8((const volatile void far *)(addr))\r
-    #define CY_SET_XTND_REG8(addr, value)   cywrite8((volatile void far *)(addr), value)\r
-\r
-    #define CY_GET_XTND_REG16(addr)         cyread16((const volatile void far *)(addr))\r
-    #define CY_SET_XTND_REG16(addr, value)  cywrite16((volatile void far *)(addr), value)\r
-\r
-    #define CY_GET_XTND_REG24(addr)         cyread24((const volatile void far *)(addr))\r
-    #define CY_SET_XTND_REG24(addr, value)  cywrite24((volatile void far *)(addr), value)\r
-\r
-    #define CY_GET_XTND_REG32(addr)         cyread32((const volatile void far *)(addr))\r
-    #define CY_SET_XTND_REG32(addr, value)  cywrite32((volatile void far *)(addr), value)\r
-\r
-#else\r
-\r
-    /* 8, 16, 24 and 32-bit register access macros */\r
-    #define CY_GET_REG8(addr)               (*((const reg8 *)(addr)))\r
-    #define CY_SET_REG8(addr, value)        (*((reg8 *)(addr))  = (uint8)(value))\r
-\r
-    #define CY_GET_REG16(addr)              (*((const reg16 *)(addr)))\r
-    #define CY_SET_REG16(addr, value)       (*((reg16 *)(addr)) = (uint16)(value))\r
-\r
-\r
-    #define CY_SET_REG24(addr, value)       CySetReg24((reg32 *) (addr), (value))\r
-    #if(CY_PSOC4)\r
-        #define CY_GET_REG24(addr)          CyGetReg24((const reg32 *) (addr))\r
-    #else\r
-        #define CY_GET_REG24(addr)          (*((const reg32 *)(addr)) & 0x00FFFFFFu)\r
-    #endif  /* (CY_PSOC4) */\r
-\r
-\r
-    #define CY_GET_REG32(addr)              (*((const reg32 *)(addr)))\r
-    #define CY_SET_REG32(addr, value)       (*((reg32 *)(addr)) = (uint32)(value))\r
-\r
-\r
-    /* To allow code to be 8051-ARM agnostic. */\r
-    #define CY_GET_XTND_REG8(addr)          CY_GET_REG8(addr)\r
-    #define CY_SET_XTND_REG8(addr, value)   CY_SET_REG8(addr, value)\r
-\r
-    #define CY_GET_XTND_REG16(addr)         CY_GET_REG16(addr)\r
-    #define CY_SET_XTND_REG16(addr, value)  CY_SET_REG16(addr, value)\r
-\r
-    #define CY_GET_XTND_REG24(addr)         CY_GET_REG24(addr)\r
-    #define CY_SET_XTND_REG24(addr, value)  CY_SET_REG24(addr, value)\r
-\r
-    #define CY_GET_XTND_REG32(addr)         CY_GET_REG32(addr)\r
-    #define CY_SET_XTND_REG32(addr, value)  CY_SET_REG32(addr, value)\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-\r
-/*******************************************************************************\r
-*  Data manipulation defines\r
-*******************************************************************************/\r
-\r
-/* Get 8 bits of a 16 bit value. */\r
-#define LO8(x)                  ((uint8) ((x) & 0xFFu))\r
-#define HI8(x)                  ((uint8) ((uint16)(x) >> 8))\r
-\r
-/* Get 16 bits of a 32 bit value. */\r
-#define LO16(x)                 ((uint16) ((x) & 0xFFFFu))\r
-#define HI16(x)                 ((uint16) ((uint32)(x) >> 16))\r
-\r
-/* Swap the byte ordering of a 32 bit value */\r
-#define CYSWAP_ENDIAN32(x)  \\r
-        ((uint32)(((x) >> 24) | (((x) & 0x00FF0000u) >> 8) | (((x) & 0x0000FF00u) << 8) | ((x) << 24)))\r
-\r
-/* Swap the byte ordering of a 16 bit value */\r
-#define CYSWAP_ENDIAN16(x)      ((uint16)(((x) << 8) | ((x) >> 8)))\r
-\r
-\r
-/*******************************************************************************\r
-* Defines the standard return values used PSoC content. A function is\r
-* not limited to these return values but can use them when returning standard\r
-* error values. Return values can be overloaded if documented in the function\r
-* header. On the 8051 a function can use a larger return type but still use the\r
-* defined return codes.\r
-*\r
-* Zero is successful, all other values indicate some form of failure. 1 - 0x7F -\r
-* standard defined values; 0x80 - ...  - user or content defined values.\r
-*******************************************************************************/\r
-#define CYRET_SUCCESS           (0x00u)           /* Successful */\r
-#define CYRET_BAD_PARAM         (0x01u)           /* One or more invalid parameters */\r
-#define CYRET_INVALID_OBJECT    (0x02u)           /* Invalid object specified */\r
-#define CYRET_MEMORY            (0x03u)           /* Memory related failure */\r
-#define CYRET_LOCKED            (0x04u)           /* Resource lock failure */\r
-#define CYRET_EMPTY             (0x05u)           /* No more objects available */\r
-#define CYRET_BAD_DATA          (0x06u)           /* Bad data received (CRC or other error check) */\r
-#define CYRET_STARTED           (0x07u)           /* Operation started, but not necessarily completed yet */\r
-#define CYRET_FINISHED          (0x08u)           /* Operation completed */\r
-#define CYRET_CANCELED          (0x09u)           /* Operation canceled */\r
-#define CYRET_TIMEOUT           (0x10u)           /* Operation timed out */\r
-#define CYRET_INVALID_STATE     (0x11u)           /* Operation not setup or is in an improper state */\r
-#define CYRET_UNKNOWN           ((cystatus) 0xFFFFFFFFu)    /* Unknown failure */\r
-\r
-\r
-/*******************************************************************************\r
-*   Intrinsic Defines: Processor NOP instruction\r
-*******************************************************************************/\r
-#if(CY_PSOC3)\r
-\r
-    #define CY_NOP          _nop_()\r
-\r
-#else\r
-\r
-    #if defined(__ARMCC_VERSION)\r
-\r
-        /* RealView */\r
-        #define CY_NOP      __nop()\r
-\r
-    #else\r
-\r
-        /* GCC */\r
-        #define CY_NOP      __asm("NOP\n")\r
-\r
-    #endif  /* defined(__ARMCC_VERSION) */\r
-\r
-#endif  /* (CY_PSOC3) */\r
-\r
-\r
-/*******************************************************************************\r
-* Following code are OBSOLETE and must not be used starting from cy_boot 3.10\r
-*******************************************************************************/\r
-\r
-/* Device is PSoC 3 and the revision is ES2 or earlier */\r
-#define CY_PSOC3_ES2 ((CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_3A) && \\r
-    (CYDEV_CHIP_REVISION_USED <= CYDEV_CHIP_REVISION_3A_ES2))\r
-\r
-/* Device is PSoC 3 and the revision is ES3 or later */\r
-#define CY_PSOC3_ES3 ((CYDEV_CHIP_MEMBER_USED == CYDEV_CHIP_MEMBER_3A) && \\r
-    (CYDEV_CHIP_REVISION_USED >= CYDEV_CHIP_REVISION_3A_ES3))\r
-\r
-/* Device is PSoC 5 and the revision is ES1 or earlier */\r
-#define CY_PSOC5_ES1 (CY_PSOC5A && \\r
-    (CYDEV_CHIP_REVISION_USED <= CYDEV_CHIP_REVISION_5A_ES1))\r
-\r
-/* Device is PSoC 5 and the revision is ES2 or later */\r
-#define CY_PSOC5_ES2 (CY_PSOC5A && \\r
-    (CYDEV_CHIP_REVISION_USED > CYDEV_CHIP_REVISION_5A_ES1))\r
-\r
-#endif  /* CY_BOOT_CYTYPES_H */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyutils.c b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyutils.c
deleted file mode 100755 (executable)
index 0a11231..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/cyutils.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*******************************************************************************\r
-* FILENAME: cyutils.c\r
-* Version 4.0\r
-*\r
-*  Description:\r
-*   CyUtils provides function to handle 24-bit value writes.\r
-*\r
-********************************************************************************\r
-* Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
-* You may use this file only in accordance with the license, terms, conditions,\r
-* disclaimers, and limitations in the end user license agreement accompanying\r
-* the software package with which this file was provided.\r
-*******************************************************************************/\r
-\r
-#include "cytypes.h"\r
-\r
-#if (!CY_PSOC3)\r
-\r
-    /***************************************************************************\r
-    * Function Name: CySetReg24\r
-    ****************************************************************************\r
-    *\r
-    * Summary:\r
-    *  Writes the 24-bit value to the specified register.\r
-    *\r
-    * Parameters:\r
-    *  addr : adress where data must be written\r
-    *  value: data that must be written\r
-    *\r
-    * Return:\r
-    *  None\r
-    *\r
-    * Reentrant:\r
-    *  No\r
-    *\r
-    ***************************************************************************/\r
-    void CySetReg24(uint32 volatile * addr, uint32 value)\r
-    {\r
-        uint8 volatile *tmpAddr;\r
-\r
-        tmpAddr = (uint8 volatile *) addr;\r
-\r
-        tmpAddr[0u] = (uint8) value;\r
-        tmpAddr[1u] = (uint8) (value >> 8u);\r
-        tmpAddr[2u] = (uint8) (value >> 16u);\r
-    }\r
-\r
-\r
-    #if(CY_PSOC4)\r
-\r
-        /***************************************************************************\r
-        * Function Name: CyGetReg24\r
-        ****************************************************************************\r
-        *\r
-        * Summary:\r
-        *  Reads the 24-bit value from the specified register.\r
-        *\r
-        * Parameters:\r
-        *  addr : adress where data must be read\r
-        *\r
-        * Return:\r
-        *  None\r
-        *\r
-        * Reentrant:\r
-        *  No\r
-        *\r
-        ***************************************************************************/\r
-        uint32 CyGetReg24(uint32 const volatile * addr)\r
-        {\r
-            uint8 const volatile *tmpAddr;\r
-            uint32 value;\r
-\r
-            tmpAddr = (uint8 const volatile *) addr;\r
-\r
-            value  =  (uint32) tmpAddr[0u];\r
-            value |= ((uint32) tmpAddr[1u] << 8u );\r
-            value |= ((uint32) tmpAddr[2u] << 16u);\r
-\r
-            return(value);\r
-        }\r
-\r
-    #endif  /*(CY_PSOC4)*/\r
-\r
-#endif  /* (!CY_PSOC3) */\r
-\r
-\r
-/* [] END OF FILE */\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/device.lib b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/device.lib
deleted file mode 100755 (executable)
index a40c9b3..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/device.lib
+++ /dev/null
@@ -1,3094 +0,0 @@
-/*\r
-   Copyright Cypress Semiconductor Corporation, 2010-2011\r
-*/\r
-/*library (leopard) {\r
-\r
-       timescale : 1ns;\r
-*/\r
-\r
-       cell (clockblockcell) {\r
-               bundle (dclk) {\r
-                       members (dclk_0, dclk_1, dclk_2, dclk_3, dclk_4, dclk_5, dclk_6, dclk_7);\r
-                       direction : output;\r
-               }\r
-               bundle (dclk_glb) {\r
-                       members (dclk_glb_0, dclk_glb_1, dclk_glb_2, dclk_glb_3, dclk_glb_4, dclk_glb_5, dclk_glb_6, dclk_glb_7);\r
-                       direction : output;\r
-               }\r
-               bundle (aclk) {\r
-                       members (aclk_0, aclk_1, aclk_2, aclk_3);\r
-                       direction : output;\r
-               }\r
-               bundle (aclk_glb) {\r
-                       members (aclk_glb_0, aclk_glb_1, aclk_glb_2, aclk_glb_3);\r
-                       direction : output;\r
-               }\r
-               bundle (clk_a_dig) {\r
-                       members (clk_a_dig_0, clk_a_dig_1, clk_a_dig_2, clk_a_dig_3);\r
-                       direction : output;\r
-               }\r
-               bundle (clk_a_dig_glb) {\r
-                       members (clk_a_dig_glb_0, clk_a_dig_glb_1, clk_a_dig_glb_2, clk_a_dig_glb_3);\r
-                       direction : output;\r
-               }\r
-               pin (clk_bus) { direction : output; }\r
-               pin (clk_bus_glb) { direction : output; }\r
-               pin (clk_sync) { direction : output; }\r
-               pin (clk_32k_xtal) { direction : output; }\r
-               pin (clk_100k) { direction : output; }\r
-               pin (clk_32k) { direction : output; }\r
-               pin (clk_1k) { direction : output; }\r
-               pin (clk_usb) { direction : output; }\r
-               pin (imo) { direction : output; }\r
-               pin (ilo) { direction : output; }\r
-               pin (xtal) { direction : output; }\r
-               pin (pllout) { direction : output; }\r
-               pin (xmhz_xerr) { direction : output; }\r
-               pin (pll_lock_out) { direction : output; }\r
-               bundle (dsi_dig_div) {\r
-                       members (dsi_dig_div_0, dsi_dig_div_1, dsi_dig_div_2, dsi_dig_div_3, dsi_dig_div_4, dsi_dig_div_5, dsi_dig_div_6, dsi_dig_div_7);\r
-                       direction : input;\r
-               }\r
-               bundle (dsi_ana_div) {\r
-                       members (dsi_ana_div_0, dsi_ana_div_1, dsi_ana_div_2, dsi_ana_div_3);\r
-                       direction : input;\r
-               }\r
-               pin (dsi_glb_div) { direction : input; }\r
-               pin (dsi_clkin_div) { direction : input; }\r
-       }\r
-\r
-       cell (carrycell) {\r
-       }\r
-\r
-       cell (interrupt) {\r
-               pin (clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (interrupt) {\r
-                       direction : input;\r
-               }\r
-       }\r
-\r
-       cell (logicalport) {\r
-               pin (interrupt) {\r
-                       direction : output;\r
-               }\r
-               pin (precharge) {\r
-                       direction : input;\r
-               }\r
-       }\r
-\r
-       cell (iocell) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 16.2;\r
-                               intrinsic_fall : 16.2;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_ireg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 16.2;\r
-                               intrinsic_fall : 16.2;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_oreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_ioreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 12.8;\r
-                               intrinsic_fall : 12.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (iocell_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 33.5;\r
-                               intrinsic_fall : 33.5;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_ireg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 33.5;\r
-                               intrinsic_fall : 33.5;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_oreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (iocell_ioreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 17;\r
-                               intrinsic_fall : 17;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_ireg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 17;\r
-                               intrinsic_fall : 17;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_oreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_ioreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 14.8;\r
-                               intrinsic_fall : 14.8;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 30.9;\r
-                               intrinsic_fall : 30.9;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_ireg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 30.9;\r
-                               intrinsic_fall : 30.9;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_oreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sio_ioreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 18.3;\r
-                               intrinsic_fall : 18.3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 20;\r
-                               intrinsic_fall : 20;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_ireg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 20;\r
-                               intrinsic_fall : 20;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_oreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 8.5;\r
-                               intrinsic_fall : 8.5;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_ioreg) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 22;\r
-                               intrinsic_fall : 22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 16.5;\r
-                               intrinsic_fall : 16.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 50;\r
-                               intrinsic_fall : 50;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_ireg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pin_input";\r
-                               intrinsic_rise : 50;\r
-                               intrinsic_fall : 50;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_oreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       function : "pad_in";\r
-                       timing() {\r
-                               timing_type : combinational;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "pad_in";\r
-                               intrinsic_rise : 11.83;\r
-                               intrinsic_fall : 11.83;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (usbio_ioreg_lv) {\r
-               pin (in_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (in_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (in_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (out_clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (out_clock_en) {\r
-                       direction : input;\r
-               }\r
-               pin (out_reset) {\r
-                       direction : input;\r
-               }\r
-               pin (pin_input) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 5.83;\r
-                               intrinsic_fall : 5.83;\r
-                       }\r
-               }\r
-        pin (pa_out) {\r
-                       direction : input;\r
-               }\r
-               pin (oe) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_in) {\r
-                       direction : input;\r
-               }\r
-               pin (pad_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : three_state_enable;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : three_state_disable;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "oe";\r
-                               intrinsic_rise : 52;\r
-                               intrinsic_fall : 52;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "out_clock";\r
-                               intrinsic_rise : 32.5;\r
-                               intrinsic_fall : 32.5;\r
-                       }\r
-               }\r
-               pin (fb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "in_clock";\r
-                               intrinsic_rise : 6.16;\r
-                               intrinsic_fall : 6.16;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (count7cell) {\r
-               pin (clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (clock_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (extclk) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (extclk_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (clk_en) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-               }\r
-               pin (reset) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : recovery_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               pin (load) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 4.22;\r
-                               intrinsic_fall : 4.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 4.22;\r
-                               intrinsic_fall : 4.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 6.22;\r
-                               intrinsic_fall : 6.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 6.22;\r
-                               intrinsic_fall : 6.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               pin (enable) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 3.34;\r
-                               intrinsic_fall : 3.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 3.34;\r
-                               intrinsic_fall : 3.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 5.34;\r
-                               intrinsic_fall : 5.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 5.34;\r
-                               intrinsic_fall : 5.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               bundle (count) {\r
-                       members (count_0, count_1, count_2, count_3, count_4, count_5, count_6);\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.11;\r
-                               intrinsic_fall : 2.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.92;\r
-                               intrinsic_fall : 1.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.11;\r
-                               intrinsic_fall : 2.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 1.92;\r
-                               intrinsic_fall : 1.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 4.11;\r
-                               intrinsic_fall : 4.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 3.92;\r
-                               intrinsic_fall : 3.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 4.11;\r
-                               intrinsic_fall : 4.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 3.92;\r
-                               intrinsic_fall : 3.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : clear;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 7.57;\r
-                               intrinsic_fall : 7.57;\r
-                       }\r
-                       timing() {\r
-                               timing_type : clear;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 6.24;\r
-                               intrinsic_fall : 6.24;\r
-                       }\r
-               }\r
-               pin (tc) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.58;\r
-                               intrinsic_fall : 2.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.04;\r
-                               intrinsic_fall : 2.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.58;\r
-                               intrinsic_fall : 2.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.04;\r
-                               intrinsic_fall : 2.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 4.58;\r
-                               intrinsic_fall : 4.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 4.04;\r
-                               intrinsic_fall : 4.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 4.58;\r
-                               intrinsic_fall : 4.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 4.04;\r
-                               intrinsic_fall : 4.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : preset;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 8.02;\r
-                               intrinsic_fall : 8.02;\r
-                       }\r
-                       timing() {\r
-                               timing_type : preset;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 6.19;\r
-                               intrinsic_fall : 6.19;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (count7cell_alt) {\r
-               pin (clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (clock_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (extclk) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (extclk_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-               pin (clk_en) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-               }\r
-               pin (reset) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : recovery_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : recovery_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : removal_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               pin (load) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 4.22;\r
-                               intrinsic_fall : 4.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 4.22;\r
-                               intrinsic_fall : 4.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 6.22;\r
-                               intrinsic_fall : 6.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 6.22;\r
-                               intrinsic_fall : 6.22;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               pin (enable) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 3.34;\r
-                               intrinsic_fall : 3.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 3.34;\r
-                               intrinsic_fall : 3.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 5.34;\r
-                               intrinsic_fall : 5.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 5.34;\r
-                               intrinsic_fall : 5.34;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-               }\r
-               bundle (count) {\r
-                       members (count_0, count_1, count_2, count_3, count_4, count_5, count_6);\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.11;\r
-                               intrinsic_fall : 2.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.92;\r
-                               intrinsic_fall : 1.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.11;\r
-                               intrinsic_fall : 2.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 1.92;\r
-                               intrinsic_fall : 1.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 4.11;\r
-                               intrinsic_fall : 4.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 3.92;\r
-                               intrinsic_fall : 3.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 4.11;\r
-                               intrinsic_fall : 4.11;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 3.92;\r
-                               intrinsic_fall : 3.92;\r
-                       }\r
-                       timing() {\r
-                               timing_type : clear;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 7.57;\r
-                               intrinsic_fall : 7.57;\r
-                       }\r
-                       timing() {\r
-                               timing_type : clear;\r
-                               timing_sense : negative_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 6.24;\r
-                               intrinsic_fall : 6.24;\r
-                       }\r
-               }\r
-               pin (tc) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 3.58;\r
-                               intrinsic_fall : 3.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.04;\r
-                               intrinsic_fall : 2.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 3.58;\r
-                               intrinsic_fall : 3.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.04;\r
-                               intrinsic_fall : 2.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 5.58;\r
-                               intrinsic_fall : 5.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 4.04;\r
-                               intrinsic_fall : 4.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 5.58;\r
-                               intrinsic_fall : 5.58;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 4.04;\r
-                               intrinsic_fall : 4.04;\r
-                       }\r
-                       timing() {\r
-                               timing_type : preset;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 8.02;\r
-                               intrinsic_fall : 8.02;\r
-                       }\r
-                       timing() {\r
-                               timing_type : preset;\r
-                               timing_sense : positive_unate;\r
-                               related_pin : "reset";\r
-                               intrinsic_rise : 6.19;\r
-                               intrinsic_fall : 6.19;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (synccell) {\r
-               pin (clock) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-\r
-               pin (clock_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-\r
-               pin (extclk) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-\r
-               pin (extclk_n) {\r
-                       direction : input;\r
-                       clock : true;\r
-               }\r
-\r
-               pin (clk_en) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 2.1;\r
-                               intrinsic_fall : 2.1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "clock_n";\r
-                               intrinsic_rise : 0.00;\r
-                               intrinsic_fall : 0.00;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "extclk";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-                       timing() {\r
-                               timing_type : setup_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_falling;\r
-                               related_pin : "extclk_n";\r
-                               intrinsic_rise : 0.6;\r
-                               intrinsic_fall : 0.6;\r
-                       }\r
-               }\r
-\r
-               pin (in) {\r
-                       direction : input;\r
-               }\r
-\r
-               pin (out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock"\r
-                               intrinsic_rise : 1.48;\r
-                               intrinsic_fall : 1.48;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock"\r
-                               intrinsic_rise : 1;\r
-                               intrinsic_fall : 1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n"\r
-                               intrinsic_rise : 1.48;\r
-                               intrinsic_fall : 1.48;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "clock_n"\r
-                               intrinsic_rise : 1;\r
-                               intrinsic_fall : 1;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk"\r
-                               intrinsic_rise : 3.48;\r
-                               intrinsic_fall : 3.48;\r
-                       }\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "extclk"\r
-                               intrinsic_rise : 3;\r
-                               intrinsic_fall : 3;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n"\r
-                               intrinsic_rise : 3.48;\r
-                               intrinsic_fall : 3.48;\r
-                       }\r
-                       timing() {\r
-                               timing_type : falling_edge;\r
-                               related_pin : "extclk_n"\r
-                               intrinsic_rise : 3;\r
-                               intrinsic_fall : 3;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (boostcell) {\r
-               pin (interrupt) { direction : output; }\r
-       }\r
-       \r
-       cell (cancell) {\r
-               pin (clock) { direction : input; clock: true; }\r
-               pin (can_rx) { direction : input; }\r
-               pin (can_tx) { direction : output; }\r
-               pin (can_tx_en) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (interrupt) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (comparatorcell) {\r
-               pin (out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (clk_udb) { direction : input; }\r
-               pin (clock) { direction : input; clock: true; }\r
-       }\r
-       \r
-       cell (capsensecell) {\r
-               pin (lft) { direction : input; }\r
-               pin (rt) { direction : input; }\r
-       }\r
-       \r
-       cell (csabufcell) {\r
-               pin (swon) { direction : input; }\r
-       }\r
-       \r
-       cell (decimatorcell) {\r
-               pin (aclock) { direction : input; clock: true; }\r
-               pin (mod_dat_0) { direction : input; }\r
-               pin (mod_dat_1) { direction : input; }\r
-               pin (mod_dat_2) { direction : input; }\r
-               pin (mod_dat_3) { direction : input; }\r
-               pin (ext_start) { direction : input; }\r
-               pin (modrst) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (interrupt) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (dfbcell) {\r
-               pin (clock) { direction : input; clock: true; }\r
-               pin (in_1) { direction : input; }\r
-               pin (in_2) { direction : input; }\r
-               pin (out_1) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (out_2) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dmareq_1) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dmareq_2) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (interrupt) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (dsmodcell) {\r
-               pin (aclock) { direction : input; clock: true; }\r
-               pin (modbitin_udb) { direction : input; }\r
-               pin (reset_udb) { direction : input; }\r
-               pin (reset_dec) { direction : input; }\r
-               pin (dec_clock) { direction : output; }\r
-               pin (mod_dat_0) { direction : output; }\r
-               pin (mod_dat_1) { direction : output; }\r
-               pin (mod_dat_2) { direction : output; }\r
-               pin (mod_dat_3) { direction : output; }\r
-               pin (dout_udb_0) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_1) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_2) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_3) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_4) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_5) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_6) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (dout_udb_7) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "aclock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (extclk_cp_udb) { direction : input; }\r
-               pin (clk_udb) { direction : input; }\r
-       }\r
-       \r
-       cell (emifcell) {\r
-               pin (busclk) { direction : input; clock: true; }\r
-               pin (EM_clock) { direction : output; }\r
-               pin (EM_CEn) { direction : output; }\r
-               pin (EM_OEn) { direction : output; }\r
-               pin (EM_ADSCn) { direction : output; }\r
-               pin (EM_sleep) { direction : output; }\r
-               pin (EM_WRn) { direction : output; }\r
-               pin (dataport_OE) { direction : output; }\r
-               pin (dataport_OEn) { direction : output; }\r
-               pin (wr) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "busclk";\r
-                               intrinsic_rise : 6.83;\r
-                               intrinsic_fall : 6.83;\r
-                       }\r
-               }\r
-               pin (rd) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "busclk";\r
-                               intrinsic_rise : 7.35;\r
-                               intrinsic_fall : 7.35;\r
-                       }\r
-               }\r
-               pin (udb_stall) { direction : input; }\r
-               pin (udb_ready) {\r
-                       direction : input;\r
-                       timing() {\r
-                               timing_type : setup_rising;\r
-                               related_pin : "busclk";\r
-                               intrinsic_rise : 0;\r
-                               intrinsic_fall : 0;\r
-                       }\r
-                       timing() {\r
-                               timing_type : hold_rising;\r
-                               related_pin : "busclk";\r
-                               intrinsic_rise : 2.9;\r
-                               intrinsic_fall : 2.9;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (i2ccell) {\r
-               pin (clock) { direction : input; clock: true; }\r
-               pin (scl_in) { direction : input; }\r
-               pin (sda_in) { direction : input; }\r
-               pin (scl_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (sda_out) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (interrupt) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (lcdctrlcell) {\r
-               pin (drive_en) { direction : input; }\r
-               pin (frame) { direction : input; }\r
-               pin (data_clk) { direction : input; }\r
-               pin (en_hi) { direction : input; }\r
-               pin (dac_dis) { direction : input; }\r
-               pin (chop_clk) { direction : input; }\r
-               pin (int_clr) { direction : input; }\r
-               pin (lp_ack_udb) { direction : input; }\r
-               pin (mode_1) { direction : input; }\r
-               pin (mode_2) { direction : input; }\r
-               pin (interrupt) { direction : output; }\r
-       }\r
-\r
-       cell (cachecell) {\r
-               pin (interrupt) { direction : output; }\r
-       }\r
-\r
-       cell (lvdcell) {\r
-               pin (interrupt) { direction : output; }\r
-       }\r
-       \r
-       cell (pmcell) {\r
-               pin (ctw_int) { direction : output; }\r
-               pin (ftw_int) { direction : output; }\r
-               pin (limact_int) { direction : output; }\r
-               pin (onepps_int) { direction : output; }\r
-               pin (pm_int) { direction : output; }\r
-       }\r
-\r
-       cell (sarcell) {\r
-               pin (clock) { direction : input; clock: true; }\r
-               pin (pump_clock) { direction : input; }\r
-               pin (clk_udb) { direction : input; }\r
-               pin (sof_udb) { direction : input; }\r
-               pin (vp_ctl_udb_0) { direction : input; }\r
-               pin (vp_ctl_udb_1) { direction : input; }\r
-               pin (vp_ctl_udb_2) { direction : input; }\r
-               pin (vp_ctl_udb_3) { direction : input; }\r
-               pin (vn_ctl_udb_0) { direction : input; }\r
-               pin (vn_ctl_udb_1) { direction : input; }\r
-               pin (vn_ctl_udb_2) { direction : input; }\r
-               pin (vn_ctl_udb_3) { direction : input; }\r
-               bundle (data_out_udb) {\r
-                       members (data_out_udb_0, data_out_udb_1, data_out_udb_2, data_out_udb_3,\r
-                               data_out_udb_4, data_out_udb_5, data_out_udb_6, data_out_udb_7,\r
-                               data_out_udb_8, data_out_udb_9, data_out_udb_10, data_out_udb_11);\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (eof_udb) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (irq) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (next) {\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-\r
-       cell (sccell) {\r
-               pin (aclk) { direction : input; }\r
-               pin (bst_clk) { direction : input; }\r
-               pin (clk_udb) { direction : input; }\r
-               pin (modout) { direction : output; }\r
-               pin (dyn_cntl_udb) { direction : input; }\r
-       }\r
-\r
-       cell (spccell) {\r
-               pin (data_ready) { direction : output; }\r
-               pin (eeprom_fault_int) { direction : output; }\r
-               pin (idle) { direction : output; }\r
-       }\r
-\r
-       cell (ssccell) {\r
-               pin (rst_n) { direction : input; }\r
-               pin (scli) { direction : input; }\r
-               pin (sdai) { direction : input; }\r
-               pin (csel) { direction : input; }\r
-               pin (sclo) { direction : output; }\r
-               pin (sdao) { direction : output; }\r
-               pin (irq) { direction : output; }\r
-       }\r
-       \r
-       cell (tfaultcell) {\r
-               pin (tfault_dsi) { direction : output; }\r
-       }\r
-\r
-       cell (timercell) {\r
-               pin (clock) { direction : input; clock: true; }\r
-               pin (kill) { direction : input; }\r
-               pin (enable) { direction : input; }\r
-               pin (capture) { direction : input; }\r
-               pin (timer_reset) { direction : input; }\r
-               pin (tc){\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (cmp){\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-               pin (irq){\r
-                       direction : output;\r
-                       timing() {\r
-                               timing_type : rising_edge;\r
-                               related_pin : "clock";\r
-                               intrinsic_rise : 1.0;\r
-                               intrinsic_fall : 1.0;\r
-                       }\r
-               }\r
-       }\r
-       \r
-       cell (usbcell) {\r
-               pin (sof_int) { direction : output; }\r
-               pin (arb_int) { direction : output; }\r
-               pin (usb_int) { direction : output; }\r
-               pin (ord_int) { direction : output; }\r
-               pin (ept_int_0) { direction : output; }\r
-               pin (ept_int_1) { direction : output; }\r
-               pin (ept_int_2) { direction : output; }\r
-               pin (ept_int_3) { direction : output; }\r
-               pin (ept_int_4) { direction : output; }\r
-               pin (ept_int_5) { direction : output; }\r
-               pin (ept_int_6) { direction : output; }\r
-               pin (ept_int_7) { direction : output; }\r
-               pin (ept_int_8) { direction : output; }\r
-               pin (dma_req_0) { direction : output; }\r
-               pin (dma_req_1) { direction : output; }\r
-               pin (dma_req_2) { direction : output; }\r
-               pin (dma_req_3) { direction : output; }\r
-               pin (dma_req_4) { direction : output; }\r
-               pin (dma_req_5) { direction : output; }\r
-               pin (dma_req_6) { direction : output; }\r
-               pin (dma_req_7) { direction : output; }\r
-               pin (dma_termin) { direction : output; }\r
-       }\r
-\r
-       cell (vidaccell) {\r
-               pin (data_0) { direction : input; }\r
-               pin (data_1) { direction : input; }\r
-               pin (data_2) { direction : input; }\r
-               pin (data_3) { direction : input; }\r
-               pin (data_4) { direction : input; }\r
-               pin (data_5) { direction : input; }\r
-               pin (data_6) { direction : input; }\r
-               pin (data_7) { direction : input; }\r
-               pin (strobe) { direction : input; }\r
-               pin (strobe_udb) { direction : input; }\r
-               pin (reset) { direction : input; }\r
-               pin (idir) { direction : input; }\r
-               pin (ioff) { direction : input; }\r
-       }\r
-\r
-/*}*/\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/eeprom.hex b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/eeprom.hex
deleted file mode 100755 (executable)
index e69de29..0000000

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/elab_dependencies.txt b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/elab_dependencies.txt
deleted file mode 100755 (executable)
index df6ae4f..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/elab_dependencies.txt
+++ /dev/null
@@ -1,397 +0,0 @@
-W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\TopDesign\TopDesign.cysch\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\USBFS_v2_60.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\USBFS_v2_60.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\USBFS_v2_60.cycdx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\USBFS_v2_60.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_audio.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_audio.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_boot.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_cdc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_cdc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_cls.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_descr.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_drv.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_episr.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_hid.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_hid.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_pm.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_std.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_vnd.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_cdc.inf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_midi.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_midi.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\API\USBFS_pvt.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\Properties\Resources.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyadvancedpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyadvancedpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyapicustomizer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyaudio.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyaudiodescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyaudiodescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cycdc.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cycdcdescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cycdcdescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cycustomizer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsconfig.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsconfig.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsdevice.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsdevice.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsendpoint.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsendpoint.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailshid.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailshid.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsinterface.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsinterface.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailslangid.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailslangid.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsstring.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsstring.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydevice.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydevicedescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydevicedescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyhiddescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyhiddescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportbase.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportbase.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportbits.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportbits.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportcustom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportcustom.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportlist.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportlist.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportnumber.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportnumber.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportunit.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportunit.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cystringdescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cystringdescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cytemplates.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyusbdescriptor.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyusbparameters.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyaudio2_0.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsepmngt.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsepmngt.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cymidi.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cymididescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cymididescriptorpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cymiditemplate.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsintassociation.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsintassociation.designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyusbconst.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cywrappercontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cybasedescriptorpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cybasedescriptorpage.designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\Properties\Resources.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyadvancedpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyaudiodescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cycdcdescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsconfig.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsdevice.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsendpoint.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailshid.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsinterface.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailslangid.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsstring.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydevicedescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyhiddescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportbits.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportcustom.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportlist.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportnumber.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cyreportunit.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cystringdescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsepmngt.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cymididescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cydetailsintassociation.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\Custom\cybasedescriptorpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\USBFS_v2_60\PSoC5\USBFS_v2_60.cysch\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_psoc3_usb_v1_0\cy_psoc3_usb_v1_0.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_psoc3_usb_v1_0\cy_psoc3_usb_v1_0.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\aliases.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\aliases.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.primitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\cy_isr_v1_70.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_isr_v1_70\PSoC5\API\intc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\cy_clock_v2_10.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\cy_clock_v2_10.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\cy_clock_v2_10.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\cy_clock_v2_10.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\API\clk.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\API\clk.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_clock_v2_10\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Bootloader_v1_20.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Bootloader_v1_20.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Bootloader_v1_20.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cycustomizer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cygeneralpage.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cygeneralpage.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cyparameters.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cywrappercontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\Properties\Resources.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\cygeneralpage.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\Custom\Properties\Resources.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\PSoC5\API\Bootloader.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\PSoC5\API\Bootloader.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\Bootloader_v1_20\PSoC5\API\Bootloader_PVT.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\aliases.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\aliases.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cyprimitive\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cysym\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.pdf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\cy_pins_v1_90.cystate\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\custom.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.Designer.cs\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cygeneralcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyinputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cymappingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyoutputcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinaliasdialog.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cypinscontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyporcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cytypecontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\Resource1.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\Custom\cyclockingcontrol.resx\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\aliases.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cyprimitives\CyPrimitives.cylib\cy_pins_v1_90\PSoC5\API\pins.h\r
-W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\USB_Bootloader.cydwr\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cm3gcc.ld\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\Cm3RealView.scat\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\Cm3Start.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\core_cm3.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\core_cm3_psoc5.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyBootAsmGnu.s\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyBootAsmRv.s\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyDmac.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyDmac.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyFlash.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyFlash.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyLib.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyLib.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cypins.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cyPm.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cyPm.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CySpc.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CySpc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cytypes.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\cyutils.c\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\core_cmFunc.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\core_cmInstr.h\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\Cm3Iar.icf\r
-C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\psoc\content\cycomponentlibrary\CyComponentLibrary.cylib\cy_boot_v4_0\PSoC5\API\CyBootAsmIar.s\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/generated_files.txt b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/generated_files.txt
deleted file mode 100755 (executable)
index da62bdd..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/generated_files.txt
+++ /dev/null
@@ -1,81 +0,0 @@
-<?xml version="1.0" encoding="us-ascii"?>\r
-\r
-<fileSet version="1" anchorPath="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp" xsi:schemaLocation="http://cypress.com/xsd/cypathdictionary cypathdictionary.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns="http://cypress.com/xsd/cypathdictionary">\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfitter_cfg.h" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfitter_cfg.c" value="ARM_C_FILE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\protect.hex" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\eeprom.hex" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cymetadata.c" value="ARM_C_FILE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevice.h" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevicegnu.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevicerv.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydeviceiar.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevice_trm.h" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevicegnu_trm.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydevicerv_trm.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydeviceiar_trm.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfittergnu.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfitterrv.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfitteriar.inc" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyfitter.h" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cydisabledsheets.h" value="NONE;" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_audio.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_audio.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_boot.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_cdc.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_cdc.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_cls.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_descr.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_drv.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_episr.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_hid.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_hid.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_pm.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_std.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_vnd.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_cdc.inf" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_midi.c" value="ARM_C_FILE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_midi.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_pvt.h" value="NONE;USBFS" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\BL.c" value="ARM_C_FILE;BL" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\BL.h" value="NONE;BL" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\BL_PVT.h" value="NONE;BL" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\SCSI_Out_DBx_aliases.h" value="NONE;SCSI_Out_DBx" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\SCSI_Out_aliases.h" value="NONE;SCSI_Out" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\SD_PULLUP_aliases.h" value="NONE;SD_PULLUP" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\SD_PULLUP.c" value="ARM_C_FILE;SD_PULLUP" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\SD_PULLUP.h" value="NONE;SD_PULLUP" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dm_aliases.h" value="NONE;USBFS_Dm" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dm.c" value="ARM_C_FILE;USBFS_Dm" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dm.h" value="NONE;USBFS_Dm" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dp_aliases.h" value="NONE;USBFS_Dp" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dp.c" value="ARM_C_FILE;USBFS_Dp" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\USBFS_Dp.h" value="NONE;USBFS_Dp" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cm3gcc.ld" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\Cm3RealView.scat" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\Cm3Start.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\core_cm3_psoc5.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\core_cm3.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyBootAsmGnu.s" value="GNU_ARM_ASM_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyBootAsmRv.s" value="REALVIEW_ARM_ASM_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyDmac.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyDmac.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyFlash.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyFlash.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyLib.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyLib.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cypins.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyPm.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyPm.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CySpc.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CySpc.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cytypes.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\cyutils.c" value="ARM_C_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\core_cmFunc.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\core_cmInstr.h" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\Cm3Iar.icf" value="NONE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\CyBootAsmIar.s" value="IAR_ASM_FILE;cy_boot" />\r
-  <file name="W:\SCSI2SD\software\SCSI2SD\USB_Bootloader.cydsn\codegentemp\project.h" value="NONE;" />\r
-</fileSet>
\ No newline at end of file

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/lcpsoc3/index b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/lcpsoc3/index
deleted file mode 100755 (executable)
index e427f5c..0000000
Binary files a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/lcpsoc3/index and /dev/null differ

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/liberty_reader.log b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/liberty_reader.log
deleted file mode 100755 (executable)
index d5e84d5..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/liberty_reader.log
+++ /dev/null
@@ -1,10 +0,0 @@
-       ... including file device.lib\r
-Error: space must precede Colon (:) at line 2617\r
-Error: space must precede Colon (:) at line 2651\r
-Error: space must precede Colon (:) at line 2664\r
-Error: space must precede Colon (:) at line 2691\r
-Error: space must precede Colon (:) at line 2742\r
-Error: space must precede Colon (:) at line 2828\r
-Error: space must precede Colon (:) at line 2874\r
-Error: space must precede Colon (:) at line 2937\r
-Error: space must precede Colon (:) at line 3019\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/placer.log b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/placer.log
deleted file mode 100755 (executable)
index ebb4048..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/placer.log
+++ /dev/null
@@ -1,76 +0,0 @@
-#***************************************************************************\r
-\r
-#sjplacer\r
-\r
-#Version:            1.1\r
-\r
-#Build Date:         Mar 26 2013 14:54:34\r
-\r
-#File Generated:     Mar 22 2014 22:32:51\r
-\r
-#Purpose:            \r
-\r
-#Copyright (C) 2010-2011 by Softjin Technologies Pvt Ltd. All rights reserved.\r
-\r
-#***************************************************************************\r
-\r
-Executing : C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\bin/sjplacer.exe --proj-name USB_Bootloader --netlist-vh2 USB_Bootloader_p.vh2 --arch-file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc3/placer.ark --rrg-file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/route_arch-rrg.cydata --irq-file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/irqconn.cydata --drq-file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/dmaconn.cydata --dsi-conn-file C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc5/psoc5lp/dsiconn.cydata --pins-file PSoC5_PSoC5LP_100-TQFP.xml --lib-file USB_Bootloader_p.lib --sdc-file USB_Bootloader.sdc --io-pcf USB_Bootloader.pci --outdir .\r
-\r
-               Softjin Techologies Placer, Version 1.1\r
-\r
-Build Date : Jul 22 2013       11:20:09\r
-\r
-D2004: Option and Settings Summary\r
-=============================================================\r
-Netlist vh2 file          - USB_Bootloader_p.vh2\r
-Architecture file         - C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc3/placer.ark\r
-Package                   - \r
-Defparam file             - \r
-SDC file                  - USB_Bootloader.sdc\r
-Output directory          - .\r
-Timing library            - USB_Bootloader_p.lib\r
-IO Placement file         - USB_Bootloader.pci\r
-\r
-D2050: Starting reading inputs for placer\r
-=============================================================\r
-D2065: Reading netlist file : "USB_Bootloader_p.vh2"\r
-D2065: Reading arch file : "C:\Program Files (x86)\Cypress\PSoC Creator\3.0\PSoC Creator\dev/psoc3/placer.ark"\r
-D2051: Reading of inputs for placer completed successfully\r
-\r
-D2053: Starting placement of the design\r
-=============================================================\r
-\r
-Phase 2\r
-Phase 3\r
-I2659: No Constrained paths were found. The placer will run in non-timing driven mode.\r
-\r
-Design Statistics after Packing\r
-    Number of Combinational MCs        :       0\r
-    Number of Sequential MCs           :       0\r
-    Number of DPs                      :       0\r
-    Number of Controls                 :       0\r
-    Number of Status                   :       0\r
-    Number of SyncCells                :       0\r
-    Number of count7cells              :       0\r
-\r
-Device Utilization Summary after Packing\r
-    Macrocells                  :      0/192\r
-    UDBS                        :      0/24\r
-    IOs                         :      25/72\r
-\r
-\r
-D2088: Phase 3, elapsed time : 0.0 (sec)\r
-\r
-Phase 4\r
-D2088: Phase 4, elapsed time : 0.0 (sec)\r
-\r
-Phase 5\r
-D2088: Phase 5, elapsed time : 0.0 (sec)\r
-\r
-Phase 8\r
-D2088: Phase 8, elapsed time : 0.0 (sec)\r
-\r
-D2054: Placement of the design completed successfully\r
-\r
-I2076: Total run-time: 1.2 sec.\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/project.h b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/project.h
deleted file mode 100755 (executable)
index 0027c91..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/project.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*******************************************************************************\r
- * File Name: project.h\r
- * PSoC Creator 3.0 Component Pack 7\r
- *\r
- *  Description:\r
- *  This file is automatically generated by PSoC Creator and should not \r
- *  be edited by hand.\r
- *\r
- *\r
- ********************************************************************************\r
- * Copyright 2008-2013, Cypress Semiconductor Corporation.  All rights reserved.\r
- * You may use this file only in accordance with the license, terms, conditions, \r
- * disclaimers, and limitations in the end user license agreement accompanying \r
- * the software package with which this file was provided.\r
- ********************************************************************************/\r
-\r
-#include <cyfitter_cfg.h>\r
-#include <cydevice.h>\r
-#include <cydevice_trm.h>\r
-#include <cyfitter.h>\r
-#include <cydisabledsheets.h>\r
-#include <USBFS.h>\r
-#include <USBFS_audio.h>\r
-#include <USBFS_cdc.h>\r
-#include <USBFS_hid.h>\r
-#include <USBFS_midi.h>\r
-#include <USBFS_pvt.h>\r
-#include <BL.h>\r
-#include <BL_PVT.h>\r
-#include <SCSI_Out_DBx_aliases.h>\r
-#include <SCSI_Out_aliases.h>\r
-#include <SD_PULLUP_aliases.h>\r
-#include <SD_PULLUP.h>\r
-#include <USBFS_Dm_aliases.h>\r
-#include <USBFS_Dm.h>\r
-#include <USBFS_Dp_aliases.h>\r
-#include <USBFS_Dp.h>\r
-#include <core_cm3_psoc5.h>\r
-#include <core_cm3.h>\r
-#include <CyDmac.h>\r
-#include <CyFlash.h>\r
-#include <CyLib.h>\r
-#include <cypins.h>\r
-#include <cyPm.h>\r
-#include <CySpc.h>\r
-#include <cytypes.h>\r
-#include <core_cmFunc.h>\r
-#include <core_cmInstr.h>\r
-\r
-/*[]*/\r
-\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/protect.hex b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/protect.hex
deleted file mode 100755 (executable)
index 8a6ef43..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/protect.hex
+++ /dev/null
@@ -1,3 +0,0 @@
-:4000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C0\r
-:400040000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080\r
-:00000001FF\r

diff --git a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/warp_dependencies.txt b/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/warp_dependencies.txt
deleted file mode 100755 (executable)
index 62f60e7..0000000
--- a/software/SCSI2SD/USB_Bootloader.cydsn/codegentemp/warp_dependencies.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-C:/Program\ Files\ (x86)/Cypress/PSoC\ Creator/3.0/PSoC\ Creator/warp/lib/ieee/work/stdlogic.vif : \r
-\r
-C:/Program\ Files\ (x86)/Cypress/PSoC\ Creator/3.0/PSoC\ Creator/warp/lib/common/stdlogic/mod_genv.vif : \r
-\r
-C:/Program\ Files\ (x86)/Cypress/PSoC\ Creator/3.0/PSoC\ Creator/warp/lib/common/stdlogic/rtlpkg.vif : \r
-\r